Architecture Seminar: Ranganathan, 6/10, 10:30am

Sheila D. Clark sdclark at cs.uiuc.edu
Fri May 13 11:25:35 CDT 2005


Architecture Seminar
Friday, June 10, 2005
10:30am, 4405 SC

Partha Ranganathan
Hewlett Packard Labs

Power Management from Handhelds to DataCenters:
Chasing the Next 10X Improvements


Energy and power are increasingly becoming critical challenges in the
design of future computing systems. The SmartPower project at hp labs
seeks to address these challenges through holistic solutions, across
multiple levels of the system, and optimized for the overall end-user
experience. In this talk, I will motivate the power management
challenge and present a systematic taxonomy of inefficiencies that
lead to overconsumption of power. I will then present results from
four major projects that address these inefficiencies - energy-aware
user interfaces, heterogeneity-based architectures, solution-level
power control, and integrated IT/facilities resource
provisioning. Though these approaches straddle different market
segments and different levels of the system, they all achieve dramatic
improvements, with factors of two to twenty reduction in the power
consumption. I will conclude with a discussion of some of the toolsets
developed as part of this project and ongoing and future work.


Speaker Bio

Partha Ranganathan is currently a principal research scientist at
Hewlett Packard Labs. His research interests are in computer
architecture and parallel processing with a focus on performance,
power, manageability, and evaluation. He currently leads the
SmartPower program at HP Labs, designing power-efficient solutions
across the entire computing continuum. Partha's past research has
focused on application-optimized architecture design, and performance,
programmability, and simulation of multiprocessing systems. Partha
received his B.Tech degree from the Indian Institute of Technology,
Madras and his M.S. and Ph.D. from Rice University, Houston. He was a
primary developer of the publicly distributed Rice Simulator for ILP
Multiprocessors (RSIM), and is a recipient of the Lodieska Stockbridge
Vaughan fellowship and an IIT Madras Alumni Award.



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