From gclayton at apple.com  Mon Feb 28 13:30:48 2011
From: gclayton at apple.com (Greg Clayton)
Date: Mon, 28 Feb 2011 11:30:48 -0800
Subject: [Lldb-commits] x86_32 linux support
In-Reply-To: <20110226215800.GA17824@fibrous.localdomain>
References: <AANLkTikW2U2dUwvMGKF1b0swT+85q=uroSQ8YONE2JFu@mail.gmail.com>
	<20110226002555.GA11412@fibrous.localdomain>
	<AANLkTi=VjMv340H-sNCYj2am4JNA7tas2FSyUf0sbG+4@mail.gmail.com>
	<20110226215800.GA17824@fibrous.localdomain>
Message-ID: <306AEF9B-A50B-4464-BE32-1FAC51DBAB4A@apple.com>


On Feb 26, 2011, at 1:58 PM, Stephen Wilson wrote:

> Marco, Greg,
> 
> On Sat, Feb 26, 2011 at 03:09:45PM +0100, Marco Minutoli wrote:
>> Here is the patch with the changes you have requested.
> 
> Nice.  This looks good.
> 
> 
> Greg, mind if I commit this one?  There is one trivial tweak needed to
> avoid a compile time warning. 

I am happy with letting you OK the any linux specific patches. If it touches anyting in the core that is significant, then let me know, else I will let you OK the linux patches, is that alright?

> 
>> Sorry for the duplicated header here It was late night(or maybe early
>> in the morning :D) when I sent the patch to the ML. Next time I'll be
>> more careful.
> 
> No worries!  We still have a bit of work to do to support i386 on linux
> but this is a significant step forward.  Thanks so much!
> 
> 
>> Best regards,
>> Marco
>> 
>> On Sat, Feb 26, 2011 at 1:25 AM, Stephen Wilson <wilsons at start.ca> wrote:
>>> On Fri, Feb 25, 2011 at 02:52:51AM +0100, Marco Minutoli wrote:
>>>> Hi everybody,
>>>> 
>>>> as suggested by Stephen I had a look at the user_32.h Linux header and
>>>> I fixed the UserArea structure.
>>>> 
>>>> In the attachment the revised patch. As ever comments and suggestions
>>>> are welcome :).
>>> 
>>> This looks good.  Only two small issues:  the patch for
>>> RegisterContextLinux_i386.h contains the old and new versions of your
>>> patch (the latter is protected behind an #ifndef).   Also, I think we
>>> need the following patch for LinuxThread.cpp:  Use a register context
>>> according to the host instead of the process target so we can debug and
>>> test lldb using 32-bit binaries on 64-bit systems.
>>> 
>>> I have not been able to test your patch much yet -- another issue has
>>> crept into the linux builds that I need to track down first... but with
>>> those changes I think the patches can go in.
>>> 
>>> 
>>> 
>>> Thanks again!
>>> 
>>> 
>>> diff --git a/source/Plugins/Process/Linux/LinuxThread.cpp b/source/Plugins/Process/Linux/LinuxThread.cpp
>>> index 397d31b..15bc9e3 100644
>>> --- a/source/Plugins/Process/Linux/LinuxThread.cpp
>>> +++ b/source/Plugins/Process/Linux/LinuxThread.cpp
>>> @@ -12,6 +12,7 @@
>>> 
>>>  // C++ Includes
>>>  // Other libraries and framework includes
>>> +#include "lldb/Host/Host.h"
>>>  #include "lldb/Target/Process.h"
>>>  #include "lldb/Target/StopInfo.h"
>>>  #include "lldb/Target/Target.h"
>>> @@ -19,6 +20,7 @@
>>>  #include "LinuxThread.h"
>>>  #include "ProcessLinux.h"
>>>  #include "ProcessMonitor.h"
>>> +#include "RegisterContextLinux_i386.h"
>>>  #include "RegisterContextLinux_x86_64.h"
>>>  #include "UnwindLLDB.h"
>>> 
>>> @@ -59,11 +61,9 @@ LinuxThread::GetInfo()
>>>  lldb::RegisterContextSP
>>>  LinuxThread::GetRegisterContext()
>>>  {
>>> -    ProcessLinux &process = static_cast<ProcessLinux&>(GetProcess());
>>> -
>>>     if (!m_reg_context_sp)
>>>     {
>>> -        ArchSpec arch = process.GetTarget().GetArchitecture();
>>> +        ArchSpec arch = Host::GetArchitecture();
>>> 
>>>         switch (arch.GetCore())
>>>         {
>>> @@ -71,6 +71,12 @@ LinuxThread::GetRegisterContext()
>>>             assert(false && "CPU type not supported!");
>>>             break;
>>> 
>>> +        case ArchSpec::eCore_x86_32_i386:
>>> +        case ArchSpec::eCore_x86_32_i486:
>>> +        case ArchSpec::eCore_x86_32_i486sx:
>>> +            m_reg_context_sp.reset(new RegisterContextLinux_i386(*this, 0));
>>> +            break;
>>> +
>>>         case ArchSpec::eCore_x86_64_x86_64:
>>>             m_reg_context_sp.reset(new RegisterContextLinux_x86_64(*this, 0));
>>>             break;
>>> 
>> 
>> 
>> 
>> -- 
>> Marco Minutoli
>> 
>> "If A is success in life, then A equals x plus y plus z. Work is x;
>> y is play; and z is keeping your mouth shut." --A. Einstein
> 
>> diff --git a/source/Plugins/Process/Linux/LinuxThread.cpp b/source/Plugins/Process/Linux/LinuxThread.cpp
>> index 397d31b..8f3a273 100644
>> --- a/source/Plugins/Process/Linux/LinuxThread.cpp
>> +++ b/source/Plugins/Process/Linux/LinuxThread.cpp
>> @@ -12,6 +12,7 @@
>> 
>> // C++ Includes
>> // Other libraries and framework includes
>> +#include "lldb/Host/Host.h"
>> #include "lldb/Target/Process.h"
>> #include "lldb/Target/StopInfo.h"
>> #include "lldb/Target/Target.h"
>> @@ -19,6 +20,7 @@
>> #include "LinuxThread.h"
>> #include "ProcessLinux.h"
>> #include "ProcessMonitor.h"
>> +#include "RegisterContextLinux_i386.h"
>> #include "RegisterContextLinux_x86_64.h"
>> #include "UnwindLLDB.h"
>> 
>> @@ -63,7 +65,7 @@ LinuxThread::GetRegisterContext()
>> 
>>     if (!m_reg_context_sp)
>>     {
>> -        ArchSpec arch = process.GetTarget().GetArchitecture();
>> +        ArchSpec arch = Host::GetArchitecture();
>> 
>>         switch (arch.GetCore())
>>         {
>> @@ -71,6 +73,12 @@ LinuxThread::GetRegisterContext()
>>             assert(false && "CPU type not supported!");
>>             break;
>> 
>> +        case ArchSpec::eCore_x86_32_i386:
>> +        case ArchSpec::eCore_x86_32_i486:
>> +        case ArchSpec::eCore_x86_32_i486sx:
>> +            m_reg_context_sp.reset(new RegisterContextLinux_i386(*this, 0));
>> +            break;
>> +
>>         case ArchSpec::eCore_x86_64_x86_64:
>>             m_reg_context_sp.reset(new RegisterContextLinux_x86_64(*this, 0));
>>             break;
>> diff --git a/source/Plugins/Process/Linux/RegisterContextLinux_i386.cpp b/source/Plugins/Process/Linux/RegisterContextLinux_i386.cpp
>> new file mode 100644
>> index 0000000..b7451d2
>> --- /dev/null
>> +++ b/source/Plugins/Process/Linux/RegisterContextLinux_i386.cpp
>> @@ -0,0 +1,633 @@
>> +//===-- RegisterContextLinux_i386.cpp ----------------------------*- C++ -*-===//
>> +//
>> +//                     The LLVM Compiler Infrastructure
>> +//
>> +// This file is distributed under the University of Illinois Open Source
>> +// License. See LICENSE.TXT for details.
>> +//
>> +//===----------------------------------------------------------------------===//
>> +
>> +#include "lldb/Core/DataExtractor.h"
>> +#include "lldb/Target/Thread.h"
>> +#include "lldb/Host/Endian.h"
>> +
>> +#include "ProcessLinux.h"
>> +#include "ProcessMonitor.h"
>> +#include "RegisterContextLinux_i386.h"
>> +
>> +using namespace lldb_private;
>> +using namespace lldb;
>> +
>> +enum
>> +{
>> +    k_first_gpr,
>> +    gpr_eax = k_first_gpr,
>> +    gpr_ebx,
>> +    gpr_ecx,
>> +    gpr_edx,
>> +    gpr_edi,
>> +    gpr_esi,
>> +    gpr_ebp,
>> +    gpr_esp,
>> +    gpr_ss,
>> +    gpr_eflags,
>> +    gpr_orig_ax,
>> +    gpr_eip,
>> +    gpr_cs,
>> +    gpr_ds,
>> +    gpr_es,
>> +    gpr_fs,
>> +    gpr_gs,
>> +    k_last_gpr = gpr_gs,
>> +
>> +    k_first_fpr,
>> +    fpu_fcw = k_first_fpr,
>> +    fpu_fsw,
>> +    fpu_ftw,
>> +    fpu_fop,
>> +    fpu_ip,
>> +    fpu_cs,
>> +    fpu_foo,
>> +    fpu_fos,
>> +    fpu_mxcsr,
>> +    fpu_stmm0,
>> +    fpu_stmm1,
>> +    fpu_stmm2,
>> +    fpu_stmm3,
>> +    fpu_stmm4,
>> +    fpu_stmm5,
>> +    fpu_stmm6,
>> +    fpu_stmm7,
>> +    fpu_xmm0,
>> +    fpu_xmm1,
>> +    fpu_xmm2,
>> +    fpu_xmm3,
>> +    fpu_xmm4,
>> +    fpu_xmm5,
>> +    fpu_xmm6,
>> +    fpu_xmm7,
>> +    k_last_fpr = fpu_xmm7,
>> +
>> +    k_num_registers,
>> +    k_num_gpr_registers = k_last_gpr - k_first_gpr + 1,
>> +    k_num_fpu_registers = k_last_fpr - k_first_fpr + 1
>> +};
>> +
>> +// Number of register sets provided by this context.
>> +enum
>> +{
>> +    k_num_register_sets = 2
>> +};
>> +
>> +enum
>> +{
>> +    gcc_eax = 0,
>> +    gcc_ecx,
>> +    gcc_edx,
>> +    gcc_ebx,
>> +    gcc_ebp,
>> +    gcc_esp,
>> +    gcc_esi,
>> +    gcc_edi,
>> +    gcc_eip,
>> +    gcc_eflags
>> +};
>> +
>> +enum
>> +{
>> +    dwarf_eax = 0,
>> +    dwarf_ecx,
>> +    dwarf_edx,
>> +    dwarf_ebx,
>> +    dwarf_esp,
>> +    dwarf_ebp,
>> +    dwarf_esi,
>> +    dwarf_edi,
>> +    dwarf_eip,
>> +    dwarf_eflags,
>> +    dwarf_stmm0 = 11,
>> +    dwarf_stmm1,
>> +    dwarf_stmm2,
>> +    dwarf_stmm3,
>> +    dwarf_stmm4,
>> +    dwarf_stmm5,
>> +    dwarf_stmm6,
>> +    dwarf_stmm7,
>> +    dwarf_xmm0 = 21,
>> +    dwarf_xmm1,
>> +    dwarf_xmm2,
>> +    dwarf_xmm3,
>> +    dwarf_xmm4,
>> +    dwarf_xmm5,
>> +    dwarf_xmm6,
>> +    dwarf_xmm7
>> +};
>> +
>> +enum
>> +{
>> +    gdb_eax        =  0,
>> +    gdb_ecx        =  1,
>> +    gdb_edx        =  2,
>> +    gdb_ebx        =  3,
>> +    gdb_esp        =  4,
>> +    gdb_ebp        =  5,
>> +    gdb_esi        =  6,
>> +    gdb_edi        =  7,
>> +    gdb_eip        =  8,
>> +    gdb_eflags     =  9,
>> +    gdb_cs         = 10,
>> +    gdb_ss         = 11,
>> +    gdb_ds         = 12,
>> +    gdb_es         = 13,
>> +    gdb_fs         = 14,
>> +    gdb_gs         = 15,
>> +    gdb_stmm0      = 16,
>> +    gdb_stmm1      = 17,
>> +    gdb_stmm2      = 18,
>> +    gdb_stmm3      = 19,
>> +    gdb_stmm4      = 20,
>> +    gdb_stmm5      = 21,
>> +    gdb_stmm6      = 22,
>> +    gdb_stmm7      = 23,
>> +    gdb_fcw        = 24,
>> +    gdb_fsw        = 25,
>> +    gdb_ftw        = 26,
>> +    gdb_fpu_cs     = 27,
>> +    gdb_ip         = 28,
>> +    gdb_fpu_ds     = 29,
>> +    gdb_dp         = 30,
>> +    gdb_fop        = 31,
>> +    gdb_xmm0       = 32,
>> +    gdb_xmm1       = 33,
>> +    gdb_xmm2       = 34,
>> +    gdb_xmm3       = 35,
>> +    gdb_xmm4       = 36,
>> +    gdb_xmm5       = 37,
>> +    gdb_xmm6       = 38,
>> +    gdb_xmm7       = 39,
>> +    gdb_mxcsr      = 40,
>> +    gdb_mm0        = 41,
>> +    gdb_mm1        = 42,
>> +    gdb_mm2        = 43,
>> +    gdb_mm3        = 44,
>> +    gdb_mm4        = 45,
>> +    gdb_mm5        = 46,
>> +    gdb_mm6        = 47,
>> +    gdb_mm7        = 48
>> +};
>> +
>> +static const
>> +uint32_t g_gpr_regnums[k_num_gpr_registers] =
>> +{
>> +    gpr_eax,
>> +    gpr_ebx,
>> +    gpr_ecx,
>> +    gpr_edx,
>> +    gpr_edi,
>> +    gpr_esi,
>> +    gpr_ebp,
>> +    gpr_esp,
>> +    gpr_ss,
>> +    gpr_eflags,
>> +    gpr_orig_ax,
>> +    gpr_eip,
>> +    gpr_cs,
>> +    gpr_ds,
>> +    gpr_es,
>> +    gpr_fs,
>> +    gpr_gs,
>> +};
>> +
>> +static const uint32_t
>> +g_fpu_regnums[k_num_fpu_registers] =
>> +{
>> +    fpu_fcw,
>> +    fpu_fsw,
>> +    fpu_ftw,
>> +    fpu_fop,
>> +    fpu_ip,
>> +    fpu_cs,
>> +    fpu_foo,
>> +    fpu_fos,
>> +    fpu_mxcsr,
>> +    fpu_stmm0,
>> +    fpu_stmm1,
>> +    fpu_stmm2,
>> +    fpu_stmm3,
>> +    fpu_stmm4,
>> +    fpu_stmm5,
>> +    fpu_stmm6,
>> +    fpu_stmm7,
>> +    fpu_xmm0,
>> +    fpu_xmm1,
>> +    fpu_xmm2,
>> +    fpu_xmm3,
>> +    fpu_xmm4,
>> +    fpu_xmm5,
>> +    fpu_xmm6,
>> +    fpu_xmm7,
>> +};
>> +
>> +static const RegisterSet
>> +g_reg_sets[k_num_register_sets] =
>> +{
>> +    { "General Purpose Registers", "gpr", k_num_gpr_registers, g_gpr_regnums },
>> +    { "Floating Point Registers",  "fpu", k_num_fpu_registers, g_fpu_regnums }
>> +};
>> +
>> +// Computes the offset of the given GPR in the user data area.
>> +#define GPR_OFFSET(regname) \
>> +    (offsetof(RegisterContextLinux_i386::UserArea, regs) + \
>> +     offsetof(RegisterContextLinux_i386::GPR, regname))
>> +
>> +// Computes the offset of the given FPR in the user data area.
>> +#define FPR_OFFSET(regname) \
>> +    (offsetof(RegisterContextLinux_i386::UserArea, i387) + \
>> +     offsetof(RegisterContextLinux_i386::FPU, regname))
>> +
>> +// Number of bytes needed to represent a GPR.
>> +#define GPR_SIZE(reg) sizeof(((RegisterContextLinux_i386::GPR*)NULL)->reg)
>> +
>> +// Number of bytes needed to represent a FPR.
>> +#define FPR_SIZE(reg) sizeof(((RegisterContextLinux_i386::FPU*)NULL)->reg)
>> +
>> +// Number of bytes needed to represent the i'th FP register.
>> +#define FP_SIZE sizeof(((RegisterContextLinux_i386::MMSReg*)NULL)->bytes)
>> +
>> +// Number of bytes needed to represent an XMM register.
>> +#define XMM_SIZE sizeof(RegisterContextLinux_i386::XMMReg)
>> +
>> +#define DEFINE_GPR(reg, alt, kind1, kind2, kind3, kind4)        \
>> +    { #reg, alt, GPR_SIZE(reg), GPR_OFFSET(reg), eEncodingUint, \
>> +      eFormatHex, { kind1, kind2, kind3, kind4, gpr_##reg } }
>> +
>> +#define DEFINE_FPR(reg, kind1, kind2, kind3, kind4)              \
>> +    { #reg, NULL, FPR_SIZE(reg), FPR_OFFSET(reg), eEncodingUint, \
>> +      eFormatHex, { kind1, kind2, kind3, kind4, fpu_##reg } }
>> +
>> +#define DEFINE_FP(reg, i)                                          \
>> +    { #reg#i, NULL, FP_SIZE, FPR_OFFSET(reg[i]), eEncodingVector,  \
>> +      eFormatVectorOfUInt8,                                        \
>> +      { dwarf_##reg##i, dwarf_##reg##i,                            \
>> +        LLDB_INVALID_REGNUM, gdb_##reg##i, fpu_##reg##i } }
>> +
>> +#define DEFINE_XMM(reg, i)                                         \
>> +    { #reg#i, NULL, XMM_SIZE, FPR_OFFSET(reg[i]), eEncodingVector, \
>> +      eFormatVectorOfUInt8,                                        \
>> +      { dwarf_##reg##i, dwarf_##reg##i,                            \
>> +        LLDB_INVALID_REGNUM, gdb_##reg##i, fpu_##reg##i } }
>> +
>> +static RegisterInfo
>> +g_register_infos[k_num_registers] =
>> +{
>> +    // General purpose registers.
>> +    DEFINE_GPR(eax,    NULL,    gcc_eax,    dwarf_eax,    LLDB_INVALID_REGNUM,    gdb_eax),
>> +    DEFINE_GPR(ebx,    NULL,    gcc_ebx,    dwarf_ebx,    LLDB_INVALID_REGNUM,    gdb_ebx),
>> +    DEFINE_GPR(ecx,    NULL,    gcc_ecx,    dwarf_ecx,    LLDB_INVALID_REGNUM,    gdb_ecx),
>> +    DEFINE_GPR(edx,    NULL,    gcc_edx,    dwarf_edx,    LLDB_INVALID_REGNUM,    gdb_edx),
>> +    DEFINE_GPR(edi,    NULL,    gcc_edi,    dwarf_edi,    LLDB_INVALID_REGNUM,    gdb_edi),
>> +    DEFINE_GPR(esi,    NULL,    gcc_esi,    dwarf_esi,    LLDB_INVALID_REGNUM,    gdb_esi),
>> +    DEFINE_GPR(ebp,    "fp",    gcc_ebp,    dwarf_ebp,    LLDB_INVALID_REGNUM,    gdb_ebp),
>> +    DEFINE_GPR(esp,    "sp",    gcc_esp,    dwarf_esp,    LLDB_INVALID_REGNUM,    gdb_esp),
>> +    DEFINE_GPR(ss,     NULL,    LLDB_INVALID_REGNUM,     LLDB_INVALID_REGNUM,     LLDB_INVALID_REGNUM,    gdb_ss),
>> +    DEFINE_GPR(eflags, "flags", gcc_eflags, dwarf_eflags, LLDB_INVALID_REGNUM,    gdb_eflags),
>> +    DEFINE_GPR(eip,    "pc",    gcc_eip,    dwarf_eip,    LLDB_INVALID_REGNUM,    gdb_eip),
>> +    DEFINE_GPR(cs,     NULL,    LLDB_INVALID_REGNUM,     LLDB_INVALID_REGNUM,     LLDB_INVALID_REGNUM,    gdb_cs),
>> +    DEFINE_GPR(ds,     NULL,    LLDB_INVALID_REGNUM,     LLDB_INVALID_REGNUM,     LLDB_INVALID_REGNUM,    gdb_ds),
>> +    DEFINE_GPR(es,     NULL,    LLDB_INVALID_REGNUM,     LLDB_INVALID_REGNUM,     LLDB_INVALID_REGNUM,    gdb_es),
>> +    DEFINE_GPR(fs,     NULL,    LLDB_INVALID_REGNUM,     LLDB_INVALID_REGNUM,     LLDB_INVALID_REGNUM,    gdb_fs),
>> +    DEFINE_GPR(gs,     NULL,    LLDB_INVALID_REGNUM,     LLDB_INVALID_REGNUM,     LLDB_INVALID_REGNUM,    gdb_gs),
>> +    
>> +    // Floating point registers.
>> +    DEFINE_FPR(fcw,       LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gdb_fcw),
>> +    DEFINE_FPR(fsw,       LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gdb_fsw),
>> +    DEFINE_FPR(ftw,       LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gdb_ftw),
>> +    DEFINE_FPR(fop,       LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gdb_fop),
>> +    DEFINE_FPR(ip,        LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gdb_ip),
>> +    DEFINE_FPR(cs,        LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gdb_fpu_cs),
>> +    DEFINE_FPR(foo,       LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gdb_dp),
>> +    DEFINE_FPR(fos,       LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gdb_fpu_ds),
>> +    DEFINE_FPR(mxcsr,     LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gdb_mxcsr),
>> +    
>> +    DEFINE_FP(stmm, 0),
>> +    DEFINE_FP(stmm, 1),
>> +    DEFINE_FP(stmm, 2),
>> +    DEFINE_FP(stmm, 3),
>> +    DEFINE_FP(stmm, 4),
>> +    DEFINE_FP(stmm, 5),
>> +    DEFINE_FP(stmm, 6),
>> +    DEFINE_FP(stmm, 7),
>> +
>> +    // XMM registers
>> +    DEFINE_XMM(xmm, 0),
>> +    DEFINE_XMM(xmm, 1),
>> +    DEFINE_XMM(xmm, 2),
>> +    DEFINE_XMM(xmm, 3),
>> +    DEFINE_XMM(xmm, 4),
>> +    DEFINE_XMM(xmm, 5),
>> +    DEFINE_XMM(xmm, 6),
>> +    DEFINE_XMM(xmm, 7),
>> +    
>> +};
>> +
>> +static unsigned GetRegOffset(unsigned reg)
>> +{
>> +    assert(reg < k_num_registers && "Invalid register number.");
>> +    return g_register_infos[reg].byte_offset;
>> +}
>> +
>> +static unsigned GetRegSize(unsigned reg)
>> +{
>> +    assert(reg < k_num_registers && "Invalid register number.");
>> +    return g_register_infos[reg].byte_size;
>> +}
>> +
>> +static bool IsGPR(unsigned reg)
>> +{
>> +    return reg <= k_last_gpr;   // GPR's come first.
>> +}
>> +
>> +static bool IsFPR(unsigned reg)
>> +{
>> +    return (k_first_fpr <= reg && reg <= k_last_fpr);
>> +}
>> +
>> +
>> +RegisterContextLinux_i386::RegisterContextLinux_i386(Thread &thread,
>> +                                                     uint32_t concrete_frame_idx)
>> +    : RegisterContextLinux(thread, concrete_frame_idx)
>> +{
>> +}
>> +
>> +RegisterContextLinux_i386::~RegisterContextLinux_i386()
>> +{
>> +}
>> +
>> +ProcessMonitor &
>> +RegisterContextLinux_i386::GetMonitor()
>> +{
>> +    ProcessLinux *process = static_cast<ProcessLinux*>(CalculateProcess());
>> +    return process->GetMonitor();
>> +}
>> +
>> +void
>> +RegisterContextLinux_i386::Invalidate()
>> +{
>> +}
>> +
>> +void
>> +RegisterContextLinux_i386::InvalidateAllRegisters()
>> +{
>> +}
>> +
>> +size_t
>> +RegisterContextLinux_i386::GetRegisterCount()
>> +{
>> +    return k_num_registers;
>> +}
>> +
>> +const RegisterInfo *
>> +RegisterContextLinux_i386::GetRegisterInfoAtIndex(uint32_t reg)
>> +{
>> +    if (reg < k_num_registers)
>> +        return &g_register_infos[reg];
>> +    else
>> +        return NULL;
>> +}
>> +
>> +size_t
>> +RegisterContextLinux_i386::GetRegisterSetCount()
>> +{
>> +    return k_num_register_sets;
>> +}
>> +
>> +const RegisterSet *
>> +RegisterContextLinux_i386::GetRegisterSet(uint32_t set)
>> +{
>> +    if (set < k_num_register_sets)
>> +        return &g_reg_sets[set];
>> +    else
>> +        return NULL;
>> +}
>> +
>> +bool
>> +RegisterContextLinux_i386::ReadRegisterValue(uint32_t reg,
>> +                                               Scalar &value)
>> +{
>> +    ProcessMonitor &monitor = GetMonitor();
>> +    return monitor.ReadRegisterValue(GetRegOffset(reg), value);
>> +}
>> +
>> +bool
>> +RegisterContextLinux_i386::ReadRegisterBytes(uint32_t reg,
>> +                                             DataExtractor &data)
>> +{
>> +    uint8_t *buf = reinterpret_cast<uint8_t*>(&user);
>> +    bool status;
>> +
>> +    if (IsGPR(reg))
>> +        status = ReadGPR();
>> +    else if (IsFPR(reg))
>> +        status = ReadFPR();
>> +    else 
>> +    {
>> +        assert(false && "invalid register number");
>> +        status = false;
>> +    }
>> +
>> +    if (status)
>> +        data.SetData(buf + GetRegOffset(reg), GetRegSize(reg), lldb::endian::InlHostByteOrder());
>> +
>> +    return status;
>> +}
>> +
>> +bool
>> +RegisterContextLinux_i386::ReadAllRegisterValues(DataBufferSP &data_sp)
>> +{
>> +    return false;
>> +}
>> +
>> +bool
>> +RegisterContextLinux_i386::WriteRegisterValue(uint32_t reg,
>> +                                              const Scalar &value)
>> +{
>> +    ProcessMonitor &monitor = GetMonitor();
>> +    return monitor.WriteRegisterValue(GetRegOffset(reg), value);
>> +}
>> +
>> +bool
>> +RegisterContextLinux_i386::WriteRegisterBytes(uint32_t reg,
>> +                                              DataExtractor &data,
>> +                                              uint32_t data_offset)
>> +{
>> +    return false;
>> +}
>> +
>> +bool
>> +RegisterContextLinux_i386::WriteAllRegisterValues(const DataBufferSP &data)
>> +{
>> +    return false;
>> +}
>> +
>> +bool
>> +RegisterContextLinux_i386::UpdateAfterBreakpoint()
>> +{
>> +    // PC points one byte past the int3 responsible for the breakpoint.
>> +    lldb::addr_t pc;
>> +
>> +    if ((pc = GetPC()) == LLDB_INVALID_ADDRESS)
>> +        return false;
>> +
>> +    SetPC(pc - 1);
>> +    return true;
>> +}
>> +
>> +uint32_t
>> +RegisterContextLinux_i386::ConvertRegisterKindToRegisterNumber(uint32_t kind,
>> +                                                               uint32_t num)
>> +{
>> +    if (kind == eRegisterKindGeneric)
>> +    {
>> +        switch (num)
>> +        {
>> +        case LLDB_REGNUM_GENERIC_PC:    return gpr_eip;
>> +        case LLDB_REGNUM_GENERIC_SP:    return gpr_esp;
>> +        case LLDB_REGNUM_GENERIC_FP:    return gpr_ebp;
>> +        case LLDB_REGNUM_GENERIC_FLAGS: return gpr_eflags;
>> +        case LLDB_REGNUM_GENERIC_RA:
>> +        default:
>> +            return LLDB_INVALID_REGNUM;
>> +        }
>> +    }
>> +
>> +    if (kind == eRegisterKindGCC || kind == eRegisterKindDWARF)
>> +    {
>> +        switch (num)
>> +        {
>> +        case dwarf_eax:  return gpr_eax;
>> +        case dwarf_edx:  return gpr_edx;
>> +        case dwarf_ecx:  return gpr_ecx;
>> +        case dwarf_ebx:  return gpr_ebx;
>> +        case dwarf_esi:  return gpr_esi;
>> +        case dwarf_edi:  return gpr_edi;
>> +        case dwarf_ebp:  return gpr_ebp;
>> +        case dwarf_esp:  return gpr_esp;
>> +        case dwarf_eip:  return gpr_eip;
>> +        case dwarf_xmm0: return fpu_xmm0;
>> +        case dwarf_xmm1: return fpu_xmm1;
>> +        case dwarf_xmm2: return fpu_xmm2;
>> +        case dwarf_xmm3: return fpu_xmm3;
>> +        case dwarf_xmm4: return fpu_xmm4;
>> +        case dwarf_xmm5: return fpu_xmm5;
>> +        case dwarf_xmm6: return fpu_xmm6;
>> +        case dwarf_xmm7: return fpu_xmm7;
>> +        case dwarf_stmm0: return fpu_stmm0;
>> +        case dwarf_stmm1: return fpu_stmm1;
>> +        case dwarf_stmm2: return fpu_stmm2;
>> +        case dwarf_stmm3: return fpu_stmm3;
>> +        case dwarf_stmm4: return fpu_stmm4;
>> +        case dwarf_stmm5: return fpu_stmm5;
>> +        case dwarf_stmm6: return fpu_stmm6;
>> +        case dwarf_stmm7: return fpu_stmm7;
>> +        default:
>> +            return LLDB_INVALID_REGNUM;
>> +        }
>> +    }
>> +
>> +    if (kind == eRegisterKindGDB)
>> +    {
>> +        switch (num)
>> +        {
>> +        case gdb_eax     : return gpr_eax;
>> +        case gdb_ebx     : return gpr_ebx;
>> +        case gdb_ecx     : return gpr_ecx;
>> +        case gdb_edx     : return gpr_edx;
>> +        case gdb_esi     : return gpr_esi;
>> +        case gdb_edi     : return gpr_edi;
>> +        case gdb_ebp     : return gpr_ebp;
>> +        case gdb_esp     : return gpr_esp;
>> +        case gdb_eip     : return gpr_eip;
>> +        case gdb_eflags  : return gpr_eflags;
>> +        case gdb_cs      : return gpr_cs;
>> +        case gdb_ss      : return gpr_ss;
>> +        case gdb_ds      : return gpr_ds;
>> +        case gdb_es      : return gpr_es;
>> +        case gdb_fs      : return gpr_fs;
>> +        case gdb_gs      : return gpr_gs;
>> +        case gdb_stmm0   : return fpu_stmm0;
>> +        case gdb_stmm1   : return fpu_stmm1;
>> +        case gdb_stmm2   : return fpu_stmm2;
>> +        case gdb_stmm3   : return fpu_stmm3;
>> +        case gdb_stmm4   : return fpu_stmm4;
>> +        case gdb_stmm5   : return fpu_stmm5;
>> +        case gdb_stmm6   : return fpu_stmm6;
>> +        case gdb_stmm7   : return fpu_stmm7;
>> +        case gdb_fcw     : return fpu_fcw;
>> +        case gdb_fsw     : return fpu_fsw;
>> +        case gdb_ftw     : return fpu_ftw;
>> +        case gdb_fpu_cs  : return fpu_cs;
>> +        case gdb_ip      : return fpu_ip;
>> +        case gdb_fpu_ds  : return fpu_fos;
>> +        case gdb_dp      : return fpu_foo;
>> +        case gdb_fop     : return fpu_fop;
>> +        case gdb_xmm0    : return fpu_xmm0;
>> +        case gdb_xmm1    : return fpu_xmm1;
>> +        case gdb_xmm2    : return fpu_xmm2;
>> +        case gdb_xmm3    : return fpu_xmm3;
>> +        case gdb_xmm4    : return fpu_xmm4;
>> +        case gdb_xmm5    : return fpu_xmm5;
>> +        case gdb_xmm6    : return fpu_xmm6;
>> +        case gdb_xmm7    : return fpu_xmm7;
>> +        case gdb_mxcsr   : return fpu_mxcsr;
>> +        default:
>> +            return LLDB_INVALID_REGNUM;
>> +        }
>> +    }
>> +    else if (kind == eRegisterKindLLDB)
>> +    {
>> +        return num;
>> +    }
>> +
>> +    return LLDB_INVALID_REGNUM;
>> +}
>> +
>> +bool
>> +RegisterContextLinux_i386::HardwareSingleStep(bool enable)
>> +{
>> +    enum { TRACE_BIT = 0x100 };
>> +    uint64_t eflags;
>> +
>> +    if ((eflags = ReadRegisterAsUnsigned(gpr_eflags, -1UL)) == -1UL)
>> +        return false;
>> +    
>> +    if (enable)
>> +    {
>> +        if (eflags & TRACE_BIT)
>> +            return true;
>> +
>> +        eflags |= TRACE_BIT;
>> +    }
>> +    else
>> +    {
>> +        if (!(eflags & TRACE_BIT))
>> +            return false;
>> +
>> +        eflags &= ~TRACE_BIT;
>> +    }
>> +
>> +    return WriteRegisterFromUnsigned(gpr_eflags, eflags);
>> +}
>> +
>> +bool
>> +RegisterContextLinux_i386::ReadGPR()
>> +{
>> +     ProcessMonitor &monitor = GetMonitor();
>> +     return monitor.ReadGPR(&user.regs);
>> +}
>> +
>> +bool
>> +RegisterContextLinux_i386::ReadFPR()
>> +{
>> +    ProcessMonitor &monitor = GetMonitor();
>> +    return monitor.ReadFPR(&user.i387);
>> +}
>> diff --git a/source/Plugins/Process/Linux/RegisterContextLinux_i386.h b/source/Plugins/Process/Linux/RegisterContextLinux_i386.h
>> new file mode 100644
>> index 0000000..30b3d70
>> --- /dev/null
>> +++ b/source/Plugins/Process/Linux/RegisterContextLinux_i386.h
>> @@ -0,0 +1,148 @@
>> +//===-- RegisterContextLinux_i386.h ------------------------------*- C++ -*-===//
>> +//
>> +//                     The LLVM Compiler Infrastructure
>> +//
>> +// This file is distributed under the University of Illinois Open Source
>> +// License. See LICENSE.TXT for details.
>> +//
>> +//===----------------------------------------------------------------------===//
>> +
>> +#ifndef liblldb_RegisterContextLinux_i386_h_
>> +#define liblldb_RegisterContextLinux_i386_h_
>> +
>> +// C Includes
>> +// C++ Includes
>> +// Other libraries and framework includes
>> +// Project includes
>> +#include "RegisterContextLinux.h"
>> +
>> +class RegisterContextLinux_i386 : public RegisterContextLinux
>> +{
>> +public:
>> +    RegisterContextLinux_i386(lldb_private::Thread &thread,
>> +                              uint32_t concreate_frame_idx);
>> +
>> +    ~RegisterContextLinux_i386();
>> +
>> +    void
>> +    Invalidate();
>> +
>> +    void
>> +    InvalidateAllRegisters();
>> +
>> +    size_t
>> +    GetRegisterCount();
>> +
>> +    const lldb::RegisterInfo *
>> +    GetRegisterInfoAtIndex(uint32_t reg);
>> +
>> +    size_t
>> +    GetRegisterSetCount();
>> +
>> +    const lldb::RegisterSet *
>> +    GetRegisterSet(uint32_t set);
>> +
>> +    bool
>> +    ReadRegisterValue(uint32_t reg, lldb_private::Scalar &value);
>> +
>> +    bool
>> +    ReadRegisterBytes(uint32_t reg, lldb_private::DataExtractor &data);
>> +
>> +    bool
>> +    ReadAllRegisterValues(lldb::DataBufferSP &data_sp);
>> +
>> +    bool
>> +    WriteRegisterValue(uint32_t reg, const lldb_private::Scalar &value);
>> +
>> +    bool
>> +    WriteRegisterBytes(uint32_t reg, lldb_private::DataExtractor &data,
>> +                       uint32_t data_offset = 0);
>> +
>> +    bool
>> +    WriteAllRegisterValues(const lldb::DataBufferSP &data_sp);
>> +
>> +    uint32_t
>> +    ConvertRegisterKindToRegisterNumber(uint32_t kind, uint32_t num);
>> +
>> +    bool
>> +    HardwareSingleStep(bool enable);
>> +
>> +    bool
>> +    UpdateAfterBreakpoint();
>> +
>> +    struct GPR
>> +    {
>> +        uint32_t ebx;
>> +        uint32_t ecx;
>> +        uint32_t edx;
>> +        uint32_t esi;
>> +        uint32_t edi;
>> +        uint32_t ebp;
>> +        uint32_t eax;
>> +        uint32_t ds;
>> +        uint32_t es;
>> +        uint32_t fs;
>> +        uint32_t gs;
>> +        uint32_t orig_ax;
>> +        uint32_t eip;
>> +        uint32_t cs;
>> +        uint32_t eflags;
>> +        uint32_t esp;
>> +        uint32_t ss;
>> +    };
>> +
>> +    struct MMSReg
>> +    {
>> +        uint8_t bytes[8];
>> +    };
>> +
>> +    struct XMMReg
>> +    {
>> +        uint8_t bytes[16];
>> +    };
>> +
>> +    struct FPU
>> +    {
>> +        uint16_t    fcw;
>> +        uint16_t    fsw;
>> +        uint16_t    ftw;
>> +        uint16_t    fop;
>> +        uint32_t    ip;
>> +        uint32_t    cs;
>> +        uint32_t    foo;
>> +        uint32_t    fos;
>> +        uint32_t    mxcsr;
>> +        uint32_t    reserved;
>> +        MMSReg      stmm[8];
>> +        XMMReg      xmm[8];
>> +        uint32_t    pad[56];
>> +    };
>> +
>> +    struct UserArea
>> +    {
>> +        GPR      regs;          // General purpose registers.
>> +        int32_t  fpvalid;       // True if FPU is being used.
>> +        FPU      i387;          // FPU registers.
>> +        uint32_t tsize;         // Text segment size.
>> +        uint32_t dsize;         // Data segment size.
>> +        uint32_t ssize;         // Stack segment size.
>> +        uint32_t start_code;    // VM address of text.
>> +        uint32_t start_stack;   // VM address of stack bottom (top in rsp).
>> +        int32_t  signal;        // Signal causing core dump.
>> +        int32_t  reserved;      // Unused.
>> +        uint32_t ar0;           // Location of GPR's.
>> +        FPU*     fpstate;       // Location of FPR's.
>> +        uint32_t magic;         // Identifier for core dumps.
>> +        char     u_comm[32];    // Command causing core dump.
>> +        uint32_t u_debugreg[8]; // Debug registers (DR0 - DR7).
>> +    };
>> +private:
>> +    UserArea user;
>> +
>> +    ProcessMonitor &GetMonitor();
>> +
>> +    bool ReadGPR();
>> +    bool ReadFPR();
>> +};
>> +
>> +#endif // #ifndef liblldb_RegisterContextLinux_i386_h_
> 
> 
> -- 
> steve
> 

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From ctice at apple.com  Mon Feb 28 16:39:58 2011
From: ctice at apple.com (Caroline Tice)
Date: Mon, 28 Feb 2011 22:39:58 -0000
Subject: [Lldb-commits] [lldb] r126692 - in
 /lldb/trunk/source/Plugins/Instruction/ARM: EmulateInstructionARM.cpp
 EmulateInstructionARM.h
Message-ID: <20110228223958.A70C02A6C12C@llvm.org>

Author: ctice
Date: Mon Feb 28 16:39:58 2011
New Revision: 126692

URL: http://llvm.org/viewvc/llvm-project?rev=126692&view=rev
Log:

Add code to emulate LDRH (immediate, Thumb) arm instruction.


Modified:
    lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
    lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.h

Modified: lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp?rev=126692&r1=126691&r2=126692&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp (original)
+++ lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp Mon Feb 28 16:39:58 2011
@@ -5870,6 +5870,159 @@
     }
     return true;
 }
+ 
+// LDRH (immediate, Thumb) calculates an address from a base register value and an immediate offset, loads a 
+// halfword from memory, zero-extends it to form a 32-bit word, and writes it to a register.  It can use offset, 
+// post-indexed, or pre-indexed addressing.
+bool
+EmulateInstructionARM::EmulateLDRHImmediate (ARMEncoding encoding)
+{
+#if 0
+    if ConditionPassed() then 
+        EncodingSpecificOperations(); NullCheckIfThumbEE(n); 
+        offset_addr = if add then (R[n] + imm32) else (R[n] - imm32); 
+        address = if index then offset_addr else R[n]; 
+        data = MemU[address,2]; 
+        if wback then R[n] = offset_addr; 
+        if UnalignedSupport() || address<0> = ???0??? then
+            R[t] = ZeroExtend(data, 32); 
+        else // Can only apply before ARMv7
+            R[t] = bits(32) UNKNOWN;
+#endif
+                  
+                  
+    bool success = false;
+    const uint32_t opcode = OpcodeAsUnsigned (&success);
+    if (!success)
+        return false;
+                  
+    if (ConditionPassed())
+    {
+        uint32_t t;
+        uint32_t n;
+        uint32_t imm32;
+        bool index;
+        bool add;
+        bool wback;
+                  
+        // EncodingSpecificOperations(); NullCheckIfThumbEE(n); 
+        switch (encoding)
+        {
+            case eEncodingT1:
+                // t = UInt(Rt); n = UInt(Rn); imm32 = ZeroExtend(imm5:???0???, 32);
+                t = Bits32 (opcode, 2, 0);
+                n = Bits32 (opcode, 5, 3);
+                imm32 = Bits32 (opcode, 10, 6) << 1;
+                  
+                // index = TRUE; add = TRUE; wback = FALSE;
+                index = true;
+                add = true;
+                wback = false;
+                  
+                break;
+                  
+            case eEncodingT2:
+                // if Rt == ???1111??? then SEE "Unallocated memory hints"; 
+                // if Rn == ???1111??? then SEE LDRH (literal); 
+                // t = UInt(Rt); n = UInt(Rn); imm32 = ZeroExtend(imm12, 32); 
+                t = Bits32 (opcode, 15, 12);
+                n = Bits32 (opcode, 19, 16);
+                imm32 = Bits32 (opcode, 11, 0);
+                  
+                // index = TRUE; add = TRUE; wback = FALSE; 
+                index = true;
+                add = true;
+                wback = false;
+                  
+                // if t == 13 then UNPREDICTABLE;
+                if (t == 13)
+                    return false;
+                break;
+                  
+            case eEncodingT3:
+                // if Rn == ???1111??? then SEE LDRH (literal); 
+                // if Rt == ???1111??? && P == ???1??? && U == ???0??? && W == ???0??? then SEE "Unallocated memory hints"; 
+                // if P == ???1??? && U == ???1??? && W == ???0??? then SEE LDRHT; 
+                // if P == ???0??? && W == ???0??? then UNDEFINED; 
+                if (BitIsClear (opcode, 10) && BitIsClear (opcode, 8))
+                    return false;
+                  
+                // t = UInt(Rt); n = UInt(Rn); imm32 = ZeroExtend(imm8, 32); 
+                t = Bits32 (opcode, 15, 12);
+                n = Bits32 (opcode, 19, 16);
+                imm32 = Bits32 (opcode, 7, 0);
+                  
+                // index = (P == ???1???); add = (U == ???1???); wback = (W == ???1???); 
+                index = BitIsSet (opcode, 10);
+                add = BitIsSet (opcode, 9);
+                wback = BitIsSet (opcode, 8);
+                  
+                // if BadReg(t) || (wback && n == t) then UNPREDICTABLE;
+                if (BadReg (t) || (wback && (n == t)))
+                    return false;
+                break;
+                  
+            default:
+                return false;
+        }
+            
+        // offset_addr = if add then (R[n] + imm32) else (R[n] - imm32); 
+        uint32_t Rn = ReadRegisterUnsigned (eRegisterKindDWARF, dwarf_r0 + n, 0, &success);
+        if (!success)
+            return false;
+                  
+        addr_t offset_addr;
+        addr_t address;
+        
+        if (add)
+            offset_addr = Rn + imm32;
+        else
+            offset_addr = Rn - imm32;
+                  
+        // address = if index then offset_addr else R[n]; 
+        if (index)
+            address = offset_addr;
+        else
+            address = Rn;
+                  
+        // data = MemU[address,2]; 
+        Register base_reg;
+        base_reg.SetRegister (eRegisterKindDWARF, dwarf_r0 + n);
+                  
+        EmulateInstruction::Context context;
+        context.type = eContextRegisterLoad;
+        context.SetRegisterPlusOffset (base_reg, address - Rn);
+                  
+        uint64_t data = MemURead (context, address, 2, 0, &success);
+        if (!success)
+            return false;
+                  
+        // if wback then R[n] = offset_addr;
+        if (wback)
+        {
+            context.type = eContextAdjustBaseRegister;
+            context.SetAddress (offset_addr);
+            if (!WriteRegisterUnsigned (context, eRegisterKindDWARF, dwarf_r0 + n, offset_addr))
+                return false;
+        }
+                  
+        // if UnalignedSupport() || address<0> = ???0??? then
+        if (UnalignedSupport () || BitIsClear (address, 0))
+        {
+            // R[t] = ZeroExtend(data, 32); 
+            context.type = eContextRegisterLoad;
+            context.SetRegisterPlusOffset (base_reg, address - Rn);
+            if (!WriteRegisterUnsigned (context, eRegisterKindDWARF, dwarf_r0 + t, data))
+                return false;
+        }
+        else // Can only apply before ARMv7
+        {
+            // R[t] = bits(32) UNKNOWN;
+            WriteBits32Unknown (t);
+        }
+    }
+    return true;
+}
                   
 // Bitwise Exclusive OR (immediate) performs a bitwise exclusive OR of a register value and an immediate value,
 // and writes the result to the destination register.  It can optionally update the condition flags based on
@@ -7242,7 +7395,7 @@
         { 0x0e500000, 0x04100000, ARMvAll,       eEncodingA1, eSize32, &EmulateInstructionARM::EmulateLDRImmediateARM, "ldr<c> <Rt> [<Rn> {#+/-<imm12>}]" },
         { 0x0e500010, 0x06100000, ARMvAll,       eEncodingA1, eSize32, &EmulateInstructionARM::EmulateLDRRegister, "ldr<c> <Rt> [<Rn> +/-<Rm> {<shift>}] {!}" },
         { 0x0e5f0000, 0x045f0000, ARMvAll,       eEncodingA1, eSize32, &EmulateInstructionARM::EmulateLDRBLiteral, "ldrb<c> <Rt>, [...]"},
-        { 0xfe500010, 0x06500000, ARMvAll,       eEncodingA1, eSize32, &EmulateInstructionARM::EmulateLDRBRegister, "ldrb<c> <Rt>, [<Rn>,+/-<Rm>{, <shift>}]{!}" }, 
+        { 0xfe500010, 0x06500000, ARMvAll,       eEncodingA1, eSize32, &EmulateInstructionARM::EmulateLDRBRegister, "ldrb<c> <Rt>, [<Rn>,+/-<Rm>{, <shift>}]{!}" },
                   
         //----------------------------------------------------------------------
         // Store instructions
@@ -7481,6 +7634,9 @@
         { 0xff7f0000, 0xf81f0000, ARMV6T2_ABOVE, eEncodingT1, eSize32, &EmulateInstructionARM::EmulateLDRBLiteral, "ldrb<c> <Rt>,[...]" },
         { 0xfffffe00, 0x00005c00, ARMV6T2_ABOVE, eEncodingT1, eSize16, &EmulateInstructionARM::EmulateLDRBRegister, "ldrb<c> <Rt>,[<Rn>,<Rm>]" },
         {  0xfff00fc0, 0xf8100000, ARMV6T2_ABOVE, eEncodingT2, eSize32,&EmulateInstructionARM::EmulateLDRBRegister, "ldrb<c>.w <Rt>,[<Rn>,<Rm>{,LSL #imm2>}]" },
+        { 0xfffff800, 0x00008800, ARMV4T_ABOVE,  eEncodingT1, eSize16, &EmulateInstructionARM::EmulateLDRHImmediate, "ldrh<c> <Rt>, [<Rn>{,#<imm>}]"  },
+        { 0xfff00000, 0xf8b00000, ARMV6T2_ABOVE, eEncodingT2, eSize32, &EmulateInstructionARM::EmulateLDRHImmediate, "ldrh<c>.w <Rt>,[<Rn>{,#<imm12>}]" },
+        { 0xfff00800, 0xf8300800, ARMV6T2_ABOVE, eEncodingT3, eSize32, &EmulateInstructionARM::EmulateLDRHImmediate, "ldrh<c> <Rt>,[<Rn>,#+/-<imm8>]{!}"  },
                   
         //----------------------------------------------------------------------
         // Store instructions

Modified: lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.h
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.h?rev=126692&r1=126691&r2=126692&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.h (original)
+++ lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.h Mon Feb 28 16:39:58 2011
@@ -600,7 +600,7 @@
     
     // A8.6.73 LDRH (immediate, Thumb) - Encoding T1, T2
     bool
-    EmulateLDRHImmediateThumb (ARMEncoding encoding);
+    EmulateLDRHImmediate (ARMEncoding encoding);
     
     // A8.6.75 LDRH (literal) - Encoding T1
     bool



From wilsons at start.ca  Mon Feb 28 16:52:38 2011
From: wilsons at start.ca (Stephen Wilson)
Date: Mon, 28 Feb 2011 22:52:38 -0000
Subject: [Lldb-commits] [lldb] r126696 - in
 /lldb/trunk/source/Plugins/Process/Linux: LinuxThread.cpp
 RegisterContextLinux_i386.cpp RegisterContextLinux_i386.h
Message-ID: <20110228225238.E58A72A6C12C@llvm.org>

Author: wilsons
Date: Mon Feb 28 16:52:38 2011
New Revision: 126696

URL: http://llvm.org/viewvc/llvm-project?rev=126696&view=rev
Log:

Add register context for i386 on Linux.

Patch by Marco Minutoli!


Added:
    lldb/trunk/source/Plugins/Process/Linux/RegisterContextLinux_i386.cpp
    lldb/trunk/source/Plugins/Process/Linux/RegisterContextLinux_i386.h
Modified:
    lldb/trunk/source/Plugins/Process/Linux/LinuxThread.cpp

Modified: lldb/trunk/source/Plugins/Process/Linux/LinuxThread.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Linux/LinuxThread.cpp?rev=126696&r1=126695&r2=126696&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Linux/LinuxThread.cpp (original)
+++ lldb/trunk/source/Plugins/Process/Linux/LinuxThread.cpp Mon Feb 28 16:52:38 2011
@@ -12,6 +12,7 @@
 
 // C++ Includes
 // Other libraries and framework includes
+#include "lldb/Host/Host.h"
 #include "lldb/Target/Process.h"
 #include "lldb/Target/StopInfo.h"
 #include "lldb/Target/Target.h"
@@ -19,6 +20,7 @@
 #include "LinuxThread.h"
 #include "ProcessLinux.h"
 #include "ProcessMonitor.h"
+#include "RegisterContextLinux_i386.h"
 #include "RegisterContextLinux_x86_64.h"
 #include "UnwindLLDB.h"
 
@@ -59,11 +61,9 @@
 lldb::RegisterContextSP
 LinuxThread::GetRegisterContext()
 {
-    ProcessLinux &process = static_cast<ProcessLinux&>(GetProcess());
-
     if (!m_reg_context_sp)
     {
-        ArchSpec arch = process.GetTarget().GetArchitecture();
+        ArchSpec arch = Host::GetArchitecture();
 
         switch (arch.GetCore())
         {
@@ -71,6 +71,12 @@
             assert(false && "CPU type not supported!");
             break;
 
+        case ArchSpec::eCore_x86_32_i386:
+        case ArchSpec::eCore_x86_32_i486:
+        case ArchSpec::eCore_x86_32_i486sx:
+            m_reg_context_sp.reset(new RegisterContextLinux_i386(*this, 0));
+            break;
+
         case ArchSpec::eCore_x86_64_x86_64:
             m_reg_context_sp.reset(new RegisterContextLinux_x86_64(*this, 0));
             break;
@@ -99,7 +105,7 @@
 
     if (frame)
         concrete_frame_idx = frame->GetConcreteFrameIndex();
-        
+
     if (concrete_frame_idx == 0)
         reg_ctx_sp = GetRegisterContext();
     else

Added: lldb/trunk/source/Plugins/Process/Linux/RegisterContextLinux_i386.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Linux/RegisterContextLinux_i386.cpp?rev=126696&view=auto
==============================================================================
--- lldb/trunk/source/Plugins/Process/Linux/RegisterContextLinux_i386.cpp (added)
+++ lldb/trunk/source/Plugins/Process/Linux/RegisterContextLinux_i386.cpp Mon Feb 28 16:52:38 2011
@@ -0,0 +1,633 @@
+//===-- RegisterContextLinux_i386.cpp ----------------------------*- C++ -*-===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#include "lldb/Core/DataExtractor.h"
+#include "lldb/Target/Thread.h"
+#include "lldb/Host/Endian.h"
+
+#include "ProcessLinux.h"
+#include "ProcessMonitor.h"
+#include "RegisterContextLinux_i386.h"
+
+using namespace lldb_private;
+using namespace lldb;
+
+enum
+{
+    k_first_gpr,
+    gpr_eax = k_first_gpr,
+    gpr_ebx,
+    gpr_ecx,
+    gpr_edx,
+    gpr_edi,
+    gpr_esi,
+    gpr_ebp,
+    gpr_esp,
+    gpr_ss,
+    gpr_eflags,
+    gpr_orig_ax,
+    gpr_eip,
+    gpr_cs,
+    gpr_ds,
+    gpr_es,
+    gpr_fs,
+    gpr_gs,
+    k_last_gpr = gpr_gs,
+
+    k_first_fpr,
+    fpu_fcw = k_first_fpr,
+    fpu_fsw,
+    fpu_ftw,
+    fpu_fop,
+    fpu_ip,
+    fpu_cs,
+    fpu_foo,
+    fpu_fos,
+    fpu_mxcsr,
+    fpu_stmm0,
+    fpu_stmm1,
+    fpu_stmm2,
+    fpu_stmm3,
+    fpu_stmm4,
+    fpu_stmm5,
+    fpu_stmm6,
+    fpu_stmm7,
+    fpu_xmm0,
+    fpu_xmm1,
+    fpu_xmm2,
+    fpu_xmm3,
+    fpu_xmm4,
+    fpu_xmm5,
+    fpu_xmm6,
+    fpu_xmm7,
+    k_last_fpr = fpu_xmm7,
+
+    k_num_registers,
+    k_num_gpr_registers = k_last_gpr - k_first_gpr + 1,
+    k_num_fpu_registers = k_last_fpr - k_first_fpr + 1
+};
+
+// Number of register sets provided by this context.
+enum
+{
+    k_num_register_sets = 2
+};
+
+enum
+{
+    gcc_eax = 0,
+    gcc_ecx,
+    gcc_edx,
+    gcc_ebx,
+    gcc_ebp,
+    gcc_esp,
+    gcc_esi,
+    gcc_edi,
+    gcc_eip,
+    gcc_eflags
+};
+
+enum
+{
+    dwarf_eax = 0,
+    dwarf_ecx,
+    dwarf_edx,
+    dwarf_ebx,
+    dwarf_esp,
+    dwarf_ebp,
+    dwarf_esi,
+    dwarf_edi,
+    dwarf_eip,
+    dwarf_eflags,
+    dwarf_stmm0 = 11,
+    dwarf_stmm1,
+    dwarf_stmm2,
+    dwarf_stmm3,
+    dwarf_stmm4,
+    dwarf_stmm5,
+    dwarf_stmm6,
+    dwarf_stmm7,
+    dwarf_xmm0 = 21,
+    dwarf_xmm1,
+    dwarf_xmm2,
+    dwarf_xmm3,
+    dwarf_xmm4,
+    dwarf_xmm5,
+    dwarf_xmm6,
+    dwarf_xmm7
+};
+
+enum
+{
+    gdb_eax        =  0,
+    gdb_ecx        =  1,
+    gdb_edx        =  2,
+    gdb_ebx        =  3,
+    gdb_esp        =  4,
+    gdb_ebp        =  5,
+    gdb_esi        =  6,
+    gdb_edi        =  7,
+    gdb_eip        =  8,
+    gdb_eflags     =  9,
+    gdb_cs         = 10,
+    gdb_ss         = 11,
+    gdb_ds         = 12,
+    gdb_es         = 13,
+    gdb_fs         = 14,
+    gdb_gs         = 15,
+    gdb_stmm0      = 16,
+    gdb_stmm1      = 17,
+    gdb_stmm2      = 18,
+    gdb_stmm3      = 19,
+    gdb_stmm4      = 20,
+    gdb_stmm5      = 21,
+    gdb_stmm6      = 22,
+    gdb_stmm7      = 23,
+    gdb_fcw        = 24,
+    gdb_fsw        = 25,
+    gdb_ftw        = 26,
+    gdb_fpu_cs     = 27,
+    gdb_ip         = 28,
+    gdb_fpu_ds     = 29,
+    gdb_dp         = 30,
+    gdb_fop        = 31,
+    gdb_xmm0       = 32,
+    gdb_xmm1       = 33,
+    gdb_xmm2       = 34,
+    gdb_xmm3       = 35,
+    gdb_xmm4       = 36,
+    gdb_xmm5       = 37,
+    gdb_xmm6       = 38,
+    gdb_xmm7       = 39,
+    gdb_mxcsr      = 40,
+    gdb_mm0        = 41,
+    gdb_mm1        = 42,
+    gdb_mm2        = 43,
+    gdb_mm3        = 44,
+    gdb_mm4        = 45,
+    gdb_mm5        = 46,
+    gdb_mm6        = 47,
+    gdb_mm7        = 48
+};
+
+static const
+uint32_t g_gpr_regnums[k_num_gpr_registers] =
+{
+    gpr_eax,
+    gpr_ebx,
+    gpr_ecx,
+    gpr_edx,
+    gpr_edi,
+    gpr_esi,
+    gpr_ebp,
+    gpr_esp,
+    gpr_ss,
+    gpr_eflags,
+    gpr_orig_ax,
+    gpr_eip,
+    gpr_cs,
+    gpr_ds,
+    gpr_es,
+    gpr_fs,
+    gpr_gs,
+};
+
+static const uint32_t
+g_fpu_regnums[k_num_fpu_registers] =
+{
+    fpu_fcw,
+    fpu_fsw,
+    fpu_ftw,
+    fpu_fop,
+    fpu_ip,
+    fpu_cs,
+    fpu_foo,
+    fpu_fos,
+    fpu_mxcsr,
+    fpu_stmm0,
+    fpu_stmm1,
+    fpu_stmm2,
+    fpu_stmm3,
+    fpu_stmm4,
+    fpu_stmm5,
+    fpu_stmm6,
+    fpu_stmm7,
+    fpu_xmm0,
+    fpu_xmm1,
+    fpu_xmm2,
+    fpu_xmm3,
+    fpu_xmm4,
+    fpu_xmm5,
+    fpu_xmm6,
+    fpu_xmm7,
+};
+
+static const RegisterSet
+g_reg_sets[k_num_register_sets] =
+{
+    { "General Purpose Registers", "gpr", k_num_gpr_registers, g_gpr_regnums },
+    { "Floating Point Registers",  "fpu", k_num_fpu_registers, g_fpu_regnums }
+};
+
+// Computes the offset of the given GPR in the user data area.
+#define GPR_OFFSET(regname) \
+    (offsetof(RegisterContextLinux_i386::UserArea, regs) + \
+     offsetof(RegisterContextLinux_i386::GPR, regname))
+
+// Computes the offset of the given FPR in the user data area.
+#define FPR_OFFSET(regname) \
+    (offsetof(RegisterContextLinux_i386::UserArea, i387) + \
+     offsetof(RegisterContextLinux_i386::FPU, regname))
+
+// Number of bytes needed to represent a GPR.
+#define GPR_SIZE(reg) sizeof(((RegisterContextLinux_i386::GPR*)NULL)->reg)
+
+// Number of bytes needed to represent a FPR.
+#define FPR_SIZE(reg) sizeof(((RegisterContextLinux_i386::FPU*)NULL)->reg)
+
+// Number of bytes needed to represent the i'th FP register.
+#define FP_SIZE sizeof(((RegisterContextLinux_i386::MMSReg*)NULL)->bytes)
+
+// Number of bytes needed to represent an XMM register.
+#define XMM_SIZE sizeof(RegisterContextLinux_i386::XMMReg)
+
+#define DEFINE_GPR(reg, alt, kind1, kind2, kind3, kind4)        \
+    { #reg, alt, GPR_SIZE(reg), GPR_OFFSET(reg), eEncodingUint, \
+      eFormatHex, { kind1, kind2, kind3, kind4, gpr_##reg } }
+
+#define DEFINE_FPR(reg, kind1, kind2, kind3, kind4)              \
+    { #reg, NULL, FPR_SIZE(reg), FPR_OFFSET(reg), eEncodingUint, \
+      eFormatHex, { kind1, kind2, kind3, kind4, fpu_##reg } }
+
+#define DEFINE_FP(reg, i)                                          \
+    { #reg#i, NULL, FP_SIZE, FPR_OFFSET(reg[i]), eEncodingVector,  \
+      eFormatVectorOfUInt8,                                        \
+      { dwarf_##reg##i, dwarf_##reg##i,                            \
+        LLDB_INVALID_REGNUM, gdb_##reg##i, fpu_##reg##i } }
+
+#define DEFINE_XMM(reg, i)                                         \
+    { #reg#i, NULL, XMM_SIZE, FPR_OFFSET(reg[i]), eEncodingVector, \
+      eFormatVectorOfUInt8,                                        \
+      { dwarf_##reg##i, dwarf_##reg##i,                            \
+        LLDB_INVALID_REGNUM, gdb_##reg##i, fpu_##reg##i } }
+
+static RegisterInfo
+g_register_infos[k_num_registers] =
+{
+    // General purpose registers.
+    DEFINE_GPR(eax,    NULL,    gcc_eax,    dwarf_eax,    LLDB_INVALID_REGNUM,    gdb_eax),
+    DEFINE_GPR(ebx,    NULL,    gcc_ebx,    dwarf_ebx,    LLDB_INVALID_REGNUM,    gdb_ebx),
+    DEFINE_GPR(ecx,    NULL,    gcc_ecx,    dwarf_ecx,    LLDB_INVALID_REGNUM,    gdb_ecx),
+    DEFINE_GPR(edx,    NULL,    gcc_edx,    dwarf_edx,    LLDB_INVALID_REGNUM,    gdb_edx),
+    DEFINE_GPR(edi,    NULL,    gcc_edi,    dwarf_edi,    LLDB_INVALID_REGNUM,    gdb_edi),
+    DEFINE_GPR(esi,    NULL,    gcc_esi,    dwarf_esi,    LLDB_INVALID_REGNUM,    gdb_esi),
+    DEFINE_GPR(ebp,    "fp",    gcc_ebp,    dwarf_ebp,    LLDB_INVALID_REGNUM,    gdb_ebp),
+    DEFINE_GPR(esp,    "sp",    gcc_esp,    dwarf_esp,    LLDB_INVALID_REGNUM,    gdb_esp),
+    DEFINE_GPR(ss,     NULL,    LLDB_INVALID_REGNUM,     LLDB_INVALID_REGNUM,     LLDB_INVALID_REGNUM,    gdb_ss),
+    DEFINE_GPR(eflags, "flags", gcc_eflags, dwarf_eflags, LLDB_INVALID_REGNUM,    gdb_eflags),
+    DEFINE_GPR(eip,    "pc",    gcc_eip,    dwarf_eip,    LLDB_INVALID_REGNUM,    gdb_eip),
+    DEFINE_GPR(cs,     NULL,    LLDB_INVALID_REGNUM,     LLDB_INVALID_REGNUM,     LLDB_INVALID_REGNUM,    gdb_cs),
+    DEFINE_GPR(ds,     NULL,    LLDB_INVALID_REGNUM,     LLDB_INVALID_REGNUM,     LLDB_INVALID_REGNUM,    gdb_ds),
+    DEFINE_GPR(es,     NULL,    LLDB_INVALID_REGNUM,     LLDB_INVALID_REGNUM,     LLDB_INVALID_REGNUM,    gdb_es),
+    DEFINE_GPR(fs,     NULL,    LLDB_INVALID_REGNUM,     LLDB_INVALID_REGNUM,     LLDB_INVALID_REGNUM,    gdb_fs),
+    DEFINE_GPR(gs,     NULL,    LLDB_INVALID_REGNUM,     LLDB_INVALID_REGNUM,     LLDB_INVALID_REGNUM,    gdb_gs),
+
+    // Floating point registers.
+    DEFINE_FPR(fcw,       LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gdb_fcw),
+    DEFINE_FPR(fsw,       LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gdb_fsw),
+    DEFINE_FPR(ftw,       LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gdb_ftw),
+    DEFINE_FPR(fop,       LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gdb_fop),
+    DEFINE_FPR(ip,        LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gdb_ip),
+    DEFINE_FPR(cs,        LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gdb_fpu_cs),
+    DEFINE_FPR(foo,       LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gdb_dp),
+    DEFINE_FPR(fos,       LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gdb_fpu_ds),
+    DEFINE_FPR(mxcsr,     LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gdb_mxcsr),
+
+    DEFINE_FP(stmm, 0),
+    DEFINE_FP(stmm, 1),
+    DEFINE_FP(stmm, 2),
+    DEFINE_FP(stmm, 3),
+    DEFINE_FP(stmm, 4),
+    DEFINE_FP(stmm, 5),
+    DEFINE_FP(stmm, 6),
+    DEFINE_FP(stmm, 7),
+
+    // XMM registers
+    DEFINE_XMM(xmm, 0),
+    DEFINE_XMM(xmm, 1),
+    DEFINE_XMM(xmm, 2),
+    DEFINE_XMM(xmm, 3),
+    DEFINE_XMM(xmm, 4),
+    DEFINE_XMM(xmm, 5),
+    DEFINE_XMM(xmm, 6),
+    DEFINE_XMM(xmm, 7),
+
+};
+
+static unsigned GetRegOffset(unsigned reg)
+{
+    assert(reg < k_num_registers && "Invalid register number.");
+    return g_register_infos[reg].byte_offset;
+}
+
+static unsigned GetRegSize(unsigned reg)
+{
+    assert(reg < k_num_registers && "Invalid register number.");
+    return g_register_infos[reg].byte_size;
+}
+
+static bool IsGPR(unsigned reg)
+{
+    return reg <= k_last_gpr;   // GPR's come first.
+}
+
+static bool IsFPR(unsigned reg)
+{
+    return (k_first_fpr <= reg && reg <= k_last_fpr);
+}
+
+
+RegisterContextLinux_i386::RegisterContextLinux_i386(Thread &thread,
+                                                     uint32_t concrete_frame_idx)
+    : RegisterContextLinux(thread, concrete_frame_idx)
+{
+}
+
+RegisterContextLinux_i386::~RegisterContextLinux_i386()
+{
+}
+
+ProcessMonitor &
+RegisterContextLinux_i386::GetMonitor()
+{
+    ProcessLinux *process = static_cast<ProcessLinux*>(CalculateProcess());
+    return process->GetMonitor();
+}
+
+void
+RegisterContextLinux_i386::Invalidate()
+{
+}
+
+void
+RegisterContextLinux_i386::InvalidateAllRegisters()
+{
+}
+
+size_t
+RegisterContextLinux_i386::GetRegisterCount()
+{
+    return k_num_registers;
+}
+
+const RegisterInfo *
+RegisterContextLinux_i386::GetRegisterInfoAtIndex(uint32_t reg)
+{
+    if (reg < k_num_registers)
+        return &g_register_infos[reg];
+    else
+        return NULL;
+}
+
+size_t
+RegisterContextLinux_i386::GetRegisterSetCount()
+{
+    return k_num_register_sets;
+}
+
+const RegisterSet *
+RegisterContextLinux_i386::GetRegisterSet(uint32_t set)
+{
+    if (set < k_num_register_sets)
+        return &g_reg_sets[set];
+    else
+        return NULL;
+}
+
+bool
+RegisterContextLinux_i386::ReadRegisterValue(uint32_t reg,
+                                               Scalar &value)
+{
+    ProcessMonitor &monitor = GetMonitor();
+    return monitor.ReadRegisterValue(GetRegOffset(reg), value);
+}
+
+bool
+RegisterContextLinux_i386::ReadRegisterBytes(uint32_t reg,
+                                             DataExtractor &data)
+{
+    uint8_t *buf = reinterpret_cast<uint8_t*>(&user);
+    bool status;
+
+    if (IsGPR(reg))
+        status = ReadGPR();
+    else if (IsFPR(reg))
+        status = ReadFPR();
+    else
+    {
+        assert(false && "invalid register number");
+        status = false;
+    }
+
+    if (status)
+        data.SetData(buf + GetRegOffset(reg), GetRegSize(reg), lldb::endian::InlHostByteOrder());
+
+    return status;
+}
+
+bool
+RegisterContextLinux_i386::ReadAllRegisterValues(DataBufferSP &data_sp)
+{
+    return false;
+}
+
+bool
+RegisterContextLinux_i386::WriteRegisterValue(uint32_t reg,
+                                              const Scalar &value)
+{
+    ProcessMonitor &monitor = GetMonitor();
+    return monitor.WriteRegisterValue(GetRegOffset(reg), value);
+}
+
+bool
+RegisterContextLinux_i386::WriteRegisterBytes(uint32_t reg,
+                                              DataExtractor &data,
+                                              uint32_t data_offset)
+{
+    return false;
+}
+
+bool
+RegisterContextLinux_i386::WriteAllRegisterValues(const DataBufferSP &data)
+{
+    return false;
+}
+
+bool
+RegisterContextLinux_i386::UpdateAfterBreakpoint()
+{
+    // PC points one byte past the int3 responsible for the breakpoint.
+    lldb::addr_t pc;
+
+    if ((pc = GetPC()) == LLDB_INVALID_ADDRESS)
+        return false;
+
+    SetPC(pc - 1);
+    return true;
+}
+
+uint32_t
+RegisterContextLinux_i386::ConvertRegisterKindToRegisterNumber(uint32_t kind,
+                                                               uint32_t num)
+{
+    if (kind == eRegisterKindGeneric)
+    {
+        switch (num)
+        {
+        case LLDB_REGNUM_GENERIC_PC:    return gpr_eip;
+        case LLDB_REGNUM_GENERIC_SP:    return gpr_esp;
+        case LLDB_REGNUM_GENERIC_FP:    return gpr_ebp;
+        case LLDB_REGNUM_GENERIC_FLAGS: return gpr_eflags;
+        case LLDB_REGNUM_GENERIC_RA:
+        default:
+            return LLDB_INVALID_REGNUM;
+        }
+    }
+
+    if (kind == eRegisterKindGCC || kind == eRegisterKindDWARF)
+    {
+        switch (num)
+        {
+        case dwarf_eax:  return gpr_eax;
+        case dwarf_edx:  return gpr_edx;
+        case dwarf_ecx:  return gpr_ecx;
+        case dwarf_ebx:  return gpr_ebx;
+        case dwarf_esi:  return gpr_esi;
+        case dwarf_edi:  return gpr_edi;
+        case dwarf_ebp:  return gpr_ebp;
+        case dwarf_esp:  return gpr_esp;
+        case dwarf_eip:  return gpr_eip;
+        case dwarf_xmm0: return fpu_xmm0;
+        case dwarf_xmm1: return fpu_xmm1;
+        case dwarf_xmm2: return fpu_xmm2;
+        case dwarf_xmm3: return fpu_xmm3;
+        case dwarf_xmm4: return fpu_xmm4;
+        case dwarf_xmm5: return fpu_xmm5;
+        case dwarf_xmm6: return fpu_xmm6;
+        case dwarf_xmm7: return fpu_xmm7;
+        case dwarf_stmm0: return fpu_stmm0;
+        case dwarf_stmm1: return fpu_stmm1;
+        case dwarf_stmm2: return fpu_stmm2;
+        case dwarf_stmm3: return fpu_stmm3;
+        case dwarf_stmm4: return fpu_stmm4;
+        case dwarf_stmm5: return fpu_stmm5;
+        case dwarf_stmm6: return fpu_stmm6;
+        case dwarf_stmm7: return fpu_stmm7;
+        default:
+            return LLDB_INVALID_REGNUM;
+        }
+    }
+
+    if (kind == eRegisterKindGDB)
+    {
+        switch (num)
+        {
+        case gdb_eax     : return gpr_eax;
+        case gdb_ebx     : return gpr_ebx;
+        case gdb_ecx     : return gpr_ecx;
+        case gdb_edx     : return gpr_edx;
+        case gdb_esi     : return gpr_esi;
+        case gdb_edi     : return gpr_edi;
+        case gdb_ebp     : return gpr_ebp;
+        case gdb_esp     : return gpr_esp;
+        case gdb_eip     : return gpr_eip;
+        case gdb_eflags  : return gpr_eflags;
+        case gdb_cs      : return gpr_cs;
+        case gdb_ss      : return gpr_ss;
+        case gdb_ds      : return gpr_ds;
+        case gdb_es      : return gpr_es;
+        case gdb_fs      : return gpr_fs;
+        case gdb_gs      : return gpr_gs;
+        case gdb_stmm0   : return fpu_stmm0;
+        case gdb_stmm1   : return fpu_stmm1;
+        case gdb_stmm2   : return fpu_stmm2;
+        case gdb_stmm3   : return fpu_stmm3;
+        case gdb_stmm4   : return fpu_stmm4;
+        case gdb_stmm5   : return fpu_stmm5;
+        case gdb_stmm6   : return fpu_stmm6;
+        case gdb_stmm7   : return fpu_stmm7;
+        case gdb_fcw     : return fpu_fcw;
+        case gdb_fsw     : return fpu_fsw;
+        case gdb_ftw     : return fpu_ftw;
+        case gdb_fpu_cs  : return fpu_cs;
+        case gdb_ip      : return fpu_ip;
+        case gdb_fpu_ds  : return fpu_fos;
+        case gdb_dp      : return fpu_foo;
+        case gdb_fop     : return fpu_fop;
+        case gdb_xmm0    : return fpu_xmm0;
+        case gdb_xmm1    : return fpu_xmm1;
+        case gdb_xmm2    : return fpu_xmm2;
+        case gdb_xmm3    : return fpu_xmm3;
+        case gdb_xmm4    : return fpu_xmm4;
+        case gdb_xmm5    : return fpu_xmm5;
+        case gdb_xmm6    : return fpu_xmm6;
+        case gdb_xmm7    : return fpu_xmm7;
+        case gdb_mxcsr   : return fpu_mxcsr;
+        default:
+            return LLDB_INVALID_REGNUM;
+        }
+    }
+    else if (kind == eRegisterKindLLDB)
+    {
+        return num;
+    }
+
+    return LLDB_INVALID_REGNUM;
+}
+
+bool
+RegisterContextLinux_i386::HardwareSingleStep(bool enable)
+{
+    enum { TRACE_BIT = 0x100 };
+    uint64_t eflags;
+
+    if ((eflags = ReadRegisterAsUnsigned(gpr_eflags, -1UL)) == -1UL)
+        return false;
+
+    if (enable)
+    {
+        if (eflags & TRACE_BIT)
+            return true;
+
+        eflags |= TRACE_BIT;
+    }
+    else
+    {
+        if (!(eflags & TRACE_BIT))
+            return false;
+
+        eflags &= ~TRACE_BIT;
+    }
+
+    return WriteRegisterFromUnsigned(gpr_eflags, eflags);
+}
+
+bool
+RegisterContextLinux_i386::ReadGPR()
+{
+     ProcessMonitor &monitor = GetMonitor();
+     return monitor.ReadGPR(&user.regs);
+}
+
+bool
+RegisterContextLinux_i386::ReadFPR()
+{
+    ProcessMonitor &monitor = GetMonitor();
+    return monitor.ReadFPR(&user.i387);
+}

Added: lldb/trunk/source/Plugins/Process/Linux/RegisterContextLinux_i386.h
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Linux/RegisterContextLinux_i386.h?rev=126696&view=auto
==============================================================================
--- lldb/trunk/source/Plugins/Process/Linux/RegisterContextLinux_i386.h (added)
+++ lldb/trunk/source/Plugins/Process/Linux/RegisterContextLinux_i386.h Mon Feb 28 16:52:38 2011
@@ -0,0 +1,148 @@
+//===-- RegisterContextLinux_i386.h ------------------------------*- C++ -*-===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef liblldb_RegisterContextLinux_i386_h_
+#define liblldb_RegisterContextLinux_i386_h_
+
+// C Includes
+// C++ Includes
+// Other libraries and framework includes
+// Project includes
+#include "RegisterContextLinux.h"
+
+class RegisterContextLinux_i386 : public RegisterContextLinux
+{
+public:
+    RegisterContextLinux_i386(lldb_private::Thread &thread,
+                              uint32_t concreate_frame_idx);
+
+    ~RegisterContextLinux_i386();
+
+    void
+    Invalidate();
+
+    void
+    InvalidateAllRegisters();
+
+    size_t
+    GetRegisterCount();
+
+    const lldb::RegisterInfo *
+    GetRegisterInfoAtIndex(uint32_t reg);
+
+    size_t
+    GetRegisterSetCount();
+
+    const lldb::RegisterSet *
+    GetRegisterSet(uint32_t set);
+
+    bool
+    ReadRegisterValue(uint32_t reg, lldb_private::Scalar &value);
+
+    bool
+    ReadRegisterBytes(uint32_t reg, lldb_private::DataExtractor &data);
+
+    bool
+    ReadAllRegisterValues(lldb::DataBufferSP &data_sp);
+
+    bool
+    WriteRegisterValue(uint32_t reg, const lldb_private::Scalar &value);
+
+    bool
+    WriteRegisterBytes(uint32_t reg, lldb_private::DataExtractor &data,
+                       uint32_t data_offset = 0);
+
+    bool
+    WriteAllRegisterValues(const lldb::DataBufferSP &data_sp);
+
+    uint32_t
+    ConvertRegisterKindToRegisterNumber(uint32_t kind, uint32_t num);
+
+    bool
+    HardwareSingleStep(bool enable);
+
+    bool
+    UpdateAfterBreakpoint();
+
+    struct GPR
+    {
+        uint32_t ebx;
+        uint32_t ecx;
+        uint32_t edx;
+        uint32_t esi;
+        uint32_t edi;
+        uint32_t ebp;
+        uint32_t eax;
+        uint32_t ds;
+        uint32_t es;
+        uint32_t fs;
+        uint32_t gs;
+        uint32_t orig_ax;
+        uint32_t eip;
+        uint32_t cs;
+        uint32_t eflags;
+        uint32_t esp;
+        uint32_t ss;
+    };
+
+    struct MMSReg
+    {
+        uint8_t bytes[8];
+    };
+
+    struct XMMReg
+    {
+        uint8_t bytes[16];
+    };
+
+    struct FPU
+    {
+        uint16_t    fcw;
+        uint16_t    fsw;
+        uint16_t    ftw;
+        uint16_t    fop;
+        uint32_t    ip;
+        uint32_t    cs;
+        uint32_t    foo;
+        uint32_t    fos;
+        uint32_t    mxcsr;
+        uint32_t    reserved;
+        MMSReg      stmm[8];
+        XMMReg      xmm[8];
+        uint32_t    pad[56];
+    };
+
+    struct UserArea
+    {
+        GPR      regs;          // General purpose registers.
+        int32_t  fpvalid;       // True if FPU is being used.
+        FPU      i387;          // FPU registers.
+        uint32_t tsize;         // Text segment size.
+        uint32_t dsize;         // Data segment size.
+        uint32_t ssize;         // Stack segment size.
+        uint32_t start_code;    // VM address of text.
+        uint32_t start_stack;   // VM address of stack bottom (top in rsp).
+        int32_t  signal;        // Signal causing core dump.
+        int32_t  reserved;      // Unused.
+        uint32_t ar0;           // Location of GPR's.
+        FPU*     fpstate;       // Location of FPR's.
+        uint32_t magic;         // Identifier for core dumps.
+        char     u_comm[32];    // Command causing core dump.
+        uint32_t u_debugreg[8]; // Debug registers (DR0 - DR7).
+    };
+private:
+    UserArea user;
+
+    ProcessMonitor &GetMonitor();
+
+    bool ReadGPR();
+    bool ReadFPR();
+};
+
+#endif // #ifndef liblldb_RegisterContextLinux_i386_h_



From wilsons at start.ca  Mon Feb 28 17:02:22 2011
From: wilsons at start.ca (Stephen Wilson)
Date: Mon, 28 Feb 2011 18:02:22 -0500
Subject: [Lldb-commits] x86_32 linux support
In-Reply-To: <306AEF9B-A50B-4464-BE32-1FAC51DBAB4A@apple.com>
References: <AANLkTikW2U2dUwvMGKF1b0swT+85q=uroSQ8YONE2JFu@mail.gmail.com>
	<20110226002555.GA11412@fibrous.localdomain>
	<AANLkTi=VjMv340H-sNCYj2am4JNA7tas2FSyUf0sbG+4@mail.gmail.com>
	<20110226215800.GA17824@fibrous.localdomain>
	<306AEF9B-A50B-4464-BE32-1FAC51DBAB4A@apple.com>
Message-ID: <20110228230221.GA26901@fibrous.localdomain>

On Mon, Feb 28, 2011 at 11:30:48AM -0800, Greg Clayton wrote:
> 
> On Feb 26, 2011, at 1:58 PM, Stephen Wilson wrote:
> 
> > Marco, Greg,
> > 
> > On Sat, Feb 26, 2011 at 03:09:45PM +0100, Marco Minutoli wrote:
> >> Here is the patch with the changes you have requested.
> > 
> > Nice.  This looks good.
> > 
> > 
> > Greg, mind if I commit this one?  There is one trivial tweak needed to
> > avoid a compile time warning. 
> 
> I am happy with letting you OK the any linux specific patches. If it
> touches anyting in the core that is significant, then let me know,
> else I will let you OK the linux patches, is that alright?

OK.  That sounds good to me.  Of course, I will always appreciate any
review/suggestions of the linux specific stuff post-commit.


Committed in r126696.


> > 
> >> Sorry for the duplicated header here It was late night(or maybe early
> >> in the morning :D) when I sent the patch to the ML. Next time I'll be
> >> more careful.
> > 
> > No worries!  We still have a bit of work to do to support i386 on linux
> > but this is a significant step forward.  Thanks so much!
> > 
> > 
> >> Best regards,
> >> Marco
> >> 
> >> On Sat, Feb 26, 2011 at 1:25 AM, Stephen Wilson <wilsons at start.ca> wrote:
> >>> On Fri, Feb 25, 2011 at 02:52:51AM +0100, Marco Minutoli wrote:
> >>>> Hi everybody,
> >>>> 
> >>>> as suggested by Stephen I had a look at the user_32.h Linux header and
> >>>> I fixed the UserArea structure.
> >>>> 
> >>>> In the attachment the revised patch. As ever comments and suggestions
> >>>> are welcome :).
> >>> 
> >>> This looks good.  Only two small issues:  the patch for
> >>> RegisterContextLinux_i386.h contains the old and new versions of your
> >>> patch (the latter is protected behind an #ifndef).   Also, I think we
> >>> need the following patch for LinuxThread.cpp:  Use a register context
> >>> according to the host instead of the process target so we can debug and
> >>> test lldb using 32-bit binaries on 64-bit systems.
> >>> 
> >>> I have not been able to test your patch much yet -- another issue has
> >>> crept into the linux builds that I need to track down first... but with
> >>> those changes I think the patches can go in.
> >>> 
> >>> 
> >>> 
> >>> Thanks again!
> >>> 
> >>> 
> >>> diff --git a/source/Plugins/Process/Linux/LinuxThread.cpp b/source/Plugins/Process/Linux/LinuxThread.cpp
> >>> index 397d31b..15bc9e3 100644
> >>> --- a/source/Plugins/Process/Linux/LinuxThread.cpp
> >>> +++ b/source/Plugins/Process/Linux/LinuxThread.cpp
> >>> @@ -12,6 +12,7 @@
> >>> 
> >>>  // C++ Includes
> >>>  // Other libraries and framework includes
> >>> +#include "lldb/Host/Host.h"
> >>>  #include "lldb/Target/Process.h"
> >>>  #include "lldb/Target/StopInfo.h"
> >>>  #include "lldb/Target/Target.h"
> >>> @@ -19,6 +20,7 @@
> >>>  #include "LinuxThread.h"
> >>>  #include "ProcessLinux.h"
> >>>  #include "ProcessMonitor.h"
> >>> +#include "RegisterContextLinux_i386.h"
> >>>  #include "RegisterContextLinux_x86_64.h"
> >>>  #include "UnwindLLDB.h"
> >>> 
> >>> @@ -59,11 +61,9 @@ LinuxThread::GetInfo()
> >>>  lldb::RegisterContextSP
> >>>  LinuxThread::GetRegisterContext()
> >>>  {
> >>> -    ProcessLinux &process = static_cast<ProcessLinux&>(GetProcess());
> >>> -
> >>>     if (!m_reg_context_sp)
> >>>     {
> >>> -        ArchSpec arch = process.GetTarget().GetArchitecture();
> >>> +        ArchSpec arch = Host::GetArchitecture();
> >>> 
> >>>         switch (arch.GetCore())
> >>>         {
> >>> @@ -71,6 +71,12 @@ LinuxThread::GetRegisterContext()
> >>>             assert(false && "CPU type not supported!");
> >>>             break;
> >>> 
> >>> +        case ArchSpec::eCore_x86_32_i386:
> >>> +        case ArchSpec::eCore_x86_32_i486:
> >>> +        case ArchSpec::eCore_x86_32_i486sx:
> >>> +            m_reg_context_sp.reset(new RegisterContextLinux_i386(*this, 0));
> >>> +            break;
> >>> +
> >>>         case ArchSpec::eCore_x86_64_x86_64:
> >>>             m_reg_context_sp.reset(new RegisterContextLinux_x86_64(*this, 0));
> >>>             break;
> >>> 
> >> 
> >> 
> >> 
> >> -- 
> >> Marco Minutoli
> >> 
> >> "If A is success in life, then A equals x plus y plus z. Work is x;
> >> y is play; and z is keeping your mouth shut." --A. Einstein
> > 
> >> diff --git a/source/Plugins/Process/Linux/LinuxThread.cpp b/source/Plugins/Process/Linux/LinuxThread.cpp
> >> index 397d31b..8f3a273 100644
> >> --- a/source/Plugins/Process/Linux/LinuxThread.cpp
> >> +++ b/source/Plugins/Process/Linux/LinuxThread.cpp
> >> @@ -12,6 +12,7 @@
> >> 
> >> // C++ Includes
> >> // Other libraries and framework includes
> >> +#include "lldb/Host/Host.h"
> >> #include "lldb/Target/Process.h"
> >> #include "lldb/Target/StopInfo.h"
> >> #include "lldb/Target/Target.h"
> >> @@ -19,6 +20,7 @@
> >> #include "LinuxThread.h"
> >> #include "ProcessLinux.h"
> >> #include "ProcessMonitor.h"
> >> +#include "RegisterContextLinux_i386.h"
> >> #include "RegisterContextLinux_x86_64.h"
> >> #include "UnwindLLDB.h"
> >> 
> >> @@ -63,7 +65,7 @@ LinuxThread::GetRegisterContext()
> >> 
> >>     if (!m_reg_context_sp)
> >>     {
> >> -        ArchSpec arch = process.GetTarget().GetArchitecture();
> >> +        ArchSpec arch = Host::GetArchitecture();
> >> 
> >>         switch (arch.GetCore())
> >>         {
> >> @@ -71,6 +73,12 @@ LinuxThread::GetRegisterContext()
> >>             assert(false && "CPU type not supported!");
> >>             break;
> >> 
> >> +        case ArchSpec::eCore_x86_32_i386:
> >> +        case ArchSpec::eCore_x86_32_i486:
> >> +        case ArchSpec::eCore_x86_32_i486sx:
> >> +            m_reg_context_sp.reset(new RegisterContextLinux_i386(*this, 0));
> >> +            break;
> >> +
> >>         case ArchSpec::eCore_x86_64_x86_64:
> >>             m_reg_context_sp.reset(new RegisterContextLinux_x86_64(*this, 0));
> >>             break;
> >> diff --git a/source/Plugins/Process/Linux/RegisterContextLinux_i386.cpp b/source/Plugins/Process/Linux/RegisterContextLinux_i386.cpp
> >> new file mode 100644
> >> index 0000000..b7451d2
> >> --- /dev/null
> >> +++ b/source/Plugins/Process/Linux/RegisterContextLinux_i386.cpp
> >> @@ -0,0 +1,633 @@
> >> +//===-- RegisterContextLinux_i386.cpp ----------------------------*- C++ -*-===//
> >> +//
> >> +//                     The LLVM Compiler Infrastructure
> >> +//
> >> +// This file is distributed under the University of Illinois Open Source
> >> +// License. See LICENSE.TXT for details.
> >> +//
> >> +//===----------------------------------------------------------------------===//
> >> +
> >> +#include "lldb/Core/DataExtractor.h"
> >> +#include "lldb/Target/Thread.h"
> >> +#include "lldb/Host/Endian.h"
> >> +
> >> +#include "ProcessLinux.h"
> >> +#include "ProcessMonitor.h"
> >> +#include "RegisterContextLinux_i386.h"
> >> +
> >> +using namespace lldb_private;
> >> +using namespace lldb;
> >> +
> >> +enum
> >> +{
> >> +    k_first_gpr,
> >> +    gpr_eax = k_first_gpr,
> >> +    gpr_ebx,
> >> +    gpr_ecx,
> >> +    gpr_edx,
> >> +    gpr_edi,
> >> +    gpr_esi,
> >> +    gpr_ebp,
> >> +    gpr_esp,
> >> +    gpr_ss,
> >> +    gpr_eflags,
> >> +    gpr_orig_ax,
> >> +    gpr_eip,
> >> +    gpr_cs,
> >> +    gpr_ds,
> >> +    gpr_es,
> >> +    gpr_fs,
> >> +    gpr_gs,
> >> +    k_last_gpr = gpr_gs,
> >> +
> >> +    k_first_fpr,
> >> +    fpu_fcw = k_first_fpr,
> >> +    fpu_fsw,
> >> +    fpu_ftw,
> >> +    fpu_fop,
> >> +    fpu_ip,
> >> +    fpu_cs,
> >> +    fpu_foo,
> >> +    fpu_fos,
> >> +    fpu_mxcsr,
> >> +    fpu_stmm0,
> >> +    fpu_stmm1,
> >> +    fpu_stmm2,
> >> +    fpu_stmm3,
> >> +    fpu_stmm4,
> >> +    fpu_stmm5,
> >> +    fpu_stmm6,
> >> +    fpu_stmm7,
> >> +    fpu_xmm0,
> >> +    fpu_xmm1,
> >> +    fpu_xmm2,
> >> +    fpu_xmm3,
> >> +    fpu_xmm4,
> >> +    fpu_xmm5,
> >> +    fpu_xmm6,
> >> +    fpu_xmm7,
> >> +    k_last_fpr = fpu_xmm7,
> >> +
> >> +    k_num_registers,
> >> +    k_num_gpr_registers = k_last_gpr - k_first_gpr + 1,
> >> +    k_num_fpu_registers = k_last_fpr - k_first_fpr + 1
> >> +};
> >> +
> >> +// Number of register sets provided by this context.
> >> +enum
> >> +{
> >> +    k_num_register_sets = 2
> >> +};
> >> +
> >> +enum
> >> +{
> >> +    gcc_eax = 0,
> >> +    gcc_ecx,
> >> +    gcc_edx,
> >> +    gcc_ebx,
> >> +    gcc_ebp,
> >> +    gcc_esp,
> >> +    gcc_esi,
> >> +    gcc_edi,
> >> +    gcc_eip,
> >> +    gcc_eflags
> >> +};
> >> +
> >> +enum
> >> +{
> >> +    dwarf_eax = 0,
> >> +    dwarf_ecx,
> >> +    dwarf_edx,
> >> +    dwarf_ebx,
> >> +    dwarf_esp,
> >> +    dwarf_ebp,
> >> +    dwarf_esi,
> >> +    dwarf_edi,
> >> +    dwarf_eip,
> >> +    dwarf_eflags,
> >> +    dwarf_stmm0 = 11,
> >> +    dwarf_stmm1,
> >> +    dwarf_stmm2,
> >> +    dwarf_stmm3,
> >> +    dwarf_stmm4,
> >> +    dwarf_stmm5,
> >> +    dwarf_stmm6,
> >> +    dwarf_stmm7,
> >> +    dwarf_xmm0 = 21,
> >> +    dwarf_xmm1,
> >> +    dwarf_xmm2,
> >> +    dwarf_xmm3,
> >> +    dwarf_xmm4,
> >> +    dwarf_xmm5,
> >> +    dwarf_xmm6,
> >> +    dwarf_xmm7
> >> +};
> >> +
> >> +enum
> >> +{
> >> +    gdb_eax        =  0,
> >> +    gdb_ecx        =  1,
> >> +    gdb_edx        =  2,
> >> +    gdb_ebx        =  3,
> >> +    gdb_esp        =  4,
> >> +    gdb_ebp        =  5,
> >> +    gdb_esi        =  6,
> >> +    gdb_edi        =  7,
> >> +    gdb_eip        =  8,
> >> +    gdb_eflags     =  9,
> >> +    gdb_cs         = 10,
> >> +    gdb_ss         = 11,
> >> +    gdb_ds         = 12,
> >> +    gdb_es         = 13,
> >> +    gdb_fs         = 14,
> >> +    gdb_gs         = 15,
> >> +    gdb_stmm0      = 16,
> >> +    gdb_stmm1      = 17,
> >> +    gdb_stmm2      = 18,
> >> +    gdb_stmm3      = 19,
> >> +    gdb_stmm4      = 20,
> >> +    gdb_stmm5      = 21,
> >> +    gdb_stmm6      = 22,
> >> +    gdb_stmm7      = 23,
> >> +    gdb_fcw        = 24,
> >> +    gdb_fsw        = 25,
> >> +    gdb_ftw        = 26,
> >> +    gdb_fpu_cs     = 27,
> >> +    gdb_ip         = 28,
> >> +    gdb_fpu_ds     = 29,
> >> +    gdb_dp         = 30,
> >> +    gdb_fop        = 31,
> >> +    gdb_xmm0       = 32,
> >> +    gdb_xmm1       = 33,
> >> +    gdb_xmm2       = 34,
> >> +    gdb_xmm3       = 35,
> >> +    gdb_xmm4       = 36,
> >> +    gdb_xmm5       = 37,
> >> +    gdb_xmm6       = 38,
> >> +    gdb_xmm7       = 39,
> >> +    gdb_mxcsr      = 40,
> >> +    gdb_mm0        = 41,
> >> +    gdb_mm1        = 42,
> >> +    gdb_mm2        = 43,
> >> +    gdb_mm3        = 44,
> >> +    gdb_mm4        = 45,
> >> +    gdb_mm5        = 46,
> >> +    gdb_mm6        = 47,
> >> +    gdb_mm7        = 48
> >> +};
> >> +
> >> +static const
> >> +uint32_t g_gpr_regnums[k_num_gpr_registers] =
> >> +{
> >> +    gpr_eax,
> >> +    gpr_ebx,
> >> +    gpr_ecx,
> >> +    gpr_edx,
> >> +    gpr_edi,
> >> +    gpr_esi,
> >> +    gpr_ebp,
> >> +    gpr_esp,
> >> +    gpr_ss,
> >> +    gpr_eflags,
> >> +    gpr_orig_ax,
> >> +    gpr_eip,
> >> +    gpr_cs,
> >> +    gpr_ds,
> >> +    gpr_es,
> >> +    gpr_fs,
> >> +    gpr_gs,
> >> +};
> >> +
> >> +static const uint32_t
> >> +g_fpu_regnums[k_num_fpu_registers] =
> >> +{
> >> +    fpu_fcw,
> >> +    fpu_fsw,
> >> +    fpu_ftw,
> >> +    fpu_fop,
> >> +    fpu_ip,
> >> +    fpu_cs,
> >> +    fpu_foo,
> >> +    fpu_fos,
> >> +    fpu_mxcsr,
> >> +    fpu_stmm0,
> >> +    fpu_stmm1,
> >> +    fpu_stmm2,
> >> +    fpu_stmm3,
> >> +    fpu_stmm4,
> >> +    fpu_stmm5,
> >> +    fpu_stmm6,
> >> +    fpu_stmm7,
> >> +    fpu_xmm0,
> >> +    fpu_xmm1,
> >> +    fpu_xmm2,
> >> +    fpu_xmm3,
> >> +    fpu_xmm4,
> >> +    fpu_xmm5,
> >> +    fpu_xmm6,
> >> +    fpu_xmm7,
> >> +};
> >> +
> >> +static const RegisterSet
> >> +g_reg_sets[k_num_register_sets] =
> >> +{
> >> +    { "General Purpose Registers", "gpr", k_num_gpr_registers, g_gpr_regnums },
> >> +    { "Floating Point Registers",  "fpu", k_num_fpu_registers, g_fpu_regnums }
> >> +};
> >> +
> >> +// Computes the offset of the given GPR in the user data area.
> >> +#define GPR_OFFSET(regname) \
> >> +    (offsetof(RegisterContextLinux_i386::UserArea, regs) + \
> >> +     offsetof(RegisterContextLinux_i386::GPR, regname))
> >> +
> >> +// Computes the offset of the given FPR in the user data area.
> >> +#define FPR_OFFSET(regname) \
> >> +    (offsetof(RegisterContextLinux_i386::UserArea, i387) + \
> >> +     offsetof(RegisterContextLinux_i386::FPU, regname))
> >> +
> >> +// Number of bytes needed to represent a GPR.
> >> +#define GPR_SIZE(reg) sizeof(((RegisterContextLinux_i386::GPR*)NULL)->reg)
> >> +
> >> +// Number of bytes needed to represent a FPR.
> >> +#define FPR_SIZE(reg) sizeof(((RegisterContextLinux_i386::FPU*)NULL)->reg)
> >> +
> >> +// Number of bytes needed to represent the i'th FP register.
> >> +#define FP_SIZE sizeof(((RegisterContextLinux_i386::MMSReg*)NULL)->bytes)
> >> +
> >> +// Number of bytes needed to represent an XMM register.
> >> +#define XMM_SIZE sizeof(RegisterContextLinux_i386::XMMReg)
> >> +
> >> +#define DEFINE_GPR(reg, alt, kind1, kind2, kind3, kind4)        \
> >> +    { #reg, alt, GPR_SIZE(reg), GPR_OFFSET(reg), eEncodingUint, \
> >> +      eFormatHex, { kind1, kind2, kind3, kind4, gpr_##reg } }
> >> +
> >> +#define DEFINE_FPR(reg, kind1, kind2, kind3, kind4)              \
> >> +    { #reg, NULL, FPR_SIZE(reg), FPR_OFFSET(reg), eEncodingUint, \
> >> +      eFormatHex, { kind1, kind2, kind3, kind4, fpu_##reg } }
> >> +
> >> +#define DEFINE_FP(reg, i)                                          \
> >> +    { #reg#i, NULL, FP_SIZE, FPR_OFFSET(reg[i]), eEncodingVector,  \
> >> +      eFormatVectorOfUInt8,                                        \
> >> +      { dwarf_##reg##i, dwarf_##reg##i,                            \
> >> +        LLDB_INVALID_REGNUM, gdb_##reg##i, fpu_##reg##i } }
> >> +
> >> +#define DEFINE_XMM(reg, i)                                         \
> >> +    { #reg#i, NULL, XMM_SIZE, FPR_OFFSET(reg[i]), eEncodingVector, \
> >> +      eFormatVectorOfUInt8,                                        \
> >> +      { dwarf_##reg##i, dwarf_##reg##i,                            \
> >> +        LLDB_INVALID_REGNUM, gdb_##reg##i, fpu_##reg##i } }
> >> +
> >> +static RegisterInfo
> >> +g_register_infos[k_num_registers] =
> >> +{
> >> +    // General purpose registers.
> >> +    DEFINE_GPR(eax,    NULL,    gcc_eax,    dwarf_eax,    LLDB_INVALID_REGNUM,    gdb_eax),
> >> +    DEFINE_GPR(ebx,    NULL,    gcc_ebx,    dwarf_ebx,    LLDB_INVALID_REGNUM,    gdb_ebx),
> >> +    DEFINE_GPR(ecx,    NULL,    gcc_ecx,    dwarf_ecx,    LLDB_INVALID_REGNUM,    gdb_ecx),
> >> +    DEFINE_GPR(edx,    NULL,    gcc_edx,    dwarf_edx,    LLDB_INVALID_REGNUM,    gdb_edx),
> >> +    DEFINE_GPR(edi,    NULL,    gcc_edi,    dwarf_edi,    LLDB_INVALID_REGNUM,    gdb_edi),
> >> +    DEFINE_GPR(esi,    NULL,    gcc_esi,    dwarf_esi,    LLDB_INVALID_REGNUM,    gdb_esi),
> >> +    DEFINE_GPR(ebp,    "fp",    gcc_ebp,    dwarf_ebp,    LLDB_INVALID_REGNUM,    gdb_ebp),
> >> +    DEFINE_GPR(esp,    "sp",    gcc_esp,    dwarf_esp,    LLDB_INVALID_REGNUM,    gdb_esp),
> >> +    DEFINE_GPR(ss,     NULL,    LLDB_INVALID_REGNUM,     LLDB_INVALID_REGNUM,     LLDB_INVALID_REGNUM,    gdb_ss),
> >> +    DEFINE_GPR(eflags, "flags", gcc_eflags, dwarf_eflags, LLDB_INVALID_REGNUM,    gdb_eflags),
> >> +    DEFINE_GPR(eip,    "pc",    gcc_eip,    dwarf_eip,    LLDB_INVALID_REGNUM,    gdb_eip),
> >> +    DEFINE_GPR(cs,     NULL,    LLDB_INVALID_REGNUM,     LLDB_INVALID_REGNUM,     LLDB_INVALID_REGNUM,    gdb_cs),
> >> +    DEFINE_GPR(ds,     NULL,    LLDB_INVALID_REGNUM,     LLDB_INVALID_REGNUM,     LLDB_INVALID_REGNUM,    gdb_ds),
> >> +    DEFINE_GPR(es,     NULL,    LLDB_INVALID_REGNUM,     LLDB_INVALID_REGNUM,     LLDB_INVALID_REGNUM,    gdb_es),
> >> +    DEFINE_GPR(fs,     NULL,    LLDB_INVALID_REGNUM,     LLDB_INVALID_REGNUM,     LLDB_INVALID_REGNUM,    gdb_fs),
> >> +    DEFINE_GPR(gs,     NULL,    LLDB_INVALID_REGNUM,     LLDB_INVALID_REGNUM,     LLDB_INVALID_REGNUM,    gdb_gs),
> >> +    
> >> +    // Floating point registers.
> >> +    DEFINE_FPR(fcw,       LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gdb_fcw),
> >> +    DEFINE_FPR(fsw,       LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gdb_fsw),
> >> +    DEFINE_FPR(ftw,       LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gdb_ftw),
> >> +    DEFINE_FPR(fop,       LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gdb_fop),
> >> +    DEFINE_FPR(ip,        LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gdb_ip),
> >> +    DEFINE_FPR(cs,        LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gdb_fpu_cs),
> >> +    DEFINE_FPR(foo,       LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gdb_dp),
> >> +    DEFINE_FPR(fos,       LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gdb_fpu_ds),
> >> +    DEFINE_FPR(mxcsr,     LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gdb_mxcsr),
> >> +    
> >> +    DEFINE_FP(stmm, 0),
> >> +    DEFINE_FP(stmm, 1),
> >> +    DEFINE_FP(stmm, 2),
> >> +    DEFINE_FP(stmm, 3),
> >> +    DEFINE_FP(stmm, 4),
> >> +    DEFINE_FP(stmm, 5),
> >> +    DEFINE_FP(stmm, 6),
> >> +    DEFINE_FP(stmm, 7),
> >> +
> >> +    // XMM registers
> >> +    DEFINE_XMM(xmm, 0),
> >> +    DEFINE_XMM(xmm, 1),
> >> +    DEFINE_XMM(xmm, 2),
> >> +    DEFINE_XMM(xmm, 3),
> >> +    DEFINE_XMM(xmm, 4),
> >> +    DEFINE_XMM(xmm, 5),
> >> +    DEFINE_XMM(xmm, 6),
> >> +    DEFINE_XMM(xmm, 7),
> >> +    
> >> +};
> >> +
> >> +static unsigned GetRegOffset(unsigned reg)
> >> +{
> >> +    assert(reg < k_num_registers && "Invalid register number.");
> >> +    return g_register_infos[reg].byte_offset;
> >> +}
> >> +
> >> +static unsigned GetRegSize(unsigned reg)
> >> +{
> >> +    assert(reg < k_num_registers && "Invalid register number.");
> >> +    return g_register_infos[reg].byte_size;
> >> +}
> >> +
> >> +static bool IsGPR(unsigned reg)
> >> +{
> >> +    return reg <= k_last_gpr;   // GPR's come first.
> >> +}
> >> +
> >> +static bool IsFPR(unsigned reg)
> >> +{
> >> +    return (k_first_fpr <= reg && reg <= k_last_fpr);
> >> +}
> >> +
> >> +
> >> +RegisterContextLinux_i386::RegisterContextLinux_i386(Thread &thread,
> >> +                                                     uint32_t concrete_frame_idx)
> >> +    : RegisterContextLinux(thread, concrete_frame_idx)
> >> +{
> >> +}
> >> +
> >> +RegisterContextLinux_i386::~RegisterContextLinux_i386()
> >> +{
> >> +}
> >> +
> >> +ProcessMonitor &
> >> +RegisterContextLinux_i386::GetMonitor()
> >> +{
> >> +    ProcessLinux *process = static_cast<ProcessLinux*>(CalculateProcess());
> >> +    return process->GetMonitor();
> >> +}
> >> +
> >> +void
> >> +RegisterContextLinux_i386::Invalidate()
> >> +{
> >> +}
> >> +
> >> +void
> >> +RegisterContextLinux_i386::InvalidateAllRegisters()
> >> +{
> >> +}
> >> +
> >> +size_t
> >> +RegisterContextLinux_i386::GetRegisterCount()
> >> +{
> >> +    return k_num_registers;
> >> +}
> >> +
> >> +const RegisterInfo *
> >> +RegisterContextLinux_i386::GetRegisterInfoAtIndex(uint32_t reg)
> >> +{
> >> +    if (reg < k_num_registers)
> >> +        return &g_register_infos[reg];
> >> +    else
> >> +        return NULL;
> >> +}
> >> +
> >> +size_t
> >> +RegisterContextLinux_i386::GetRegisterSetCount()
> >> +{
> >> +    return k_num_register_sets;
> >> +}
> >> +
> >> +const RegisterSet *
> >> +RegisterContextLinux_i386::GetRegisterSet(uint32_t set)
> >> +{
> >> +    if (set < k_num_register_sets)
> >> +        return &g_reg_sets[set];
> >> +    else
> >> +        return NULL;
> >> +}
> >> +
> >> +bool
> >> +RegisterContextLinux_i386::ReadRegisterValue(uint32_t reg,
> >> +                                               Scalar &value)
> >> +{
> >> +    ProcessMonitor &monitor = GetMonitor();
> >> +    return monitor.ReadRegisterValue(GetRegOffset(reg), value);
> >> +}
> >> +
> >> +bool
> >> +RegisterContextLinux_i386::ReadRegisterBytes(uint32_t reg,
> >> +                                             DataExtractor &data)
> >> +{
> >> +    uint8_t *buf = reinterpret_cast<uint8_t*>(&user);
> >> +    bool status;
> >> +
> >> +    if (IsGPR(reg))
> >> +        status = ReadGPR();
> >> +    else if (IsFPR(reg))
> >> +        status = ReadFPR();
> >> +    else 
> >> +    {
> >> +        assert(false && "invalid register number");
> >> +        status = false;
> >> +    }
> >> +
> >> +    if (status)
> >> +        data.SetData(buf + GetRegOffset(reg), GetRegSize(reg), lldb::endian::InlHostByteOrder());
> >> +
> >> +    return status;
> >> +}
> >> +
> >> +bool
> >> +RegisterContextLinux_i386::ReadAllRegisterValues(DataBufferSP &data_sp)
> >> +{
> >> +    return false;
> >> +}
> >> +
> >> +bool
> >> +RegisterContextLinux_i386::WriteRegisterValue(uint32_t reg,
> >> +                                              const Scalar &value)
> >> +{
> >> +    ProcessMonitor &monitor = GetMonitor();
> >> +    return monitor.WriteRegisterValue(GetRegOffset(reg), value);
> >> +}
> >> +
> >> +bool
> >> +RegisterContextLinux_i386::WriteRegisterBytes(uint32_t reg,
> >> +                                              DataExtractor &data,
> >> +                                              uint32_t data_offset)
> >> +{
> >> +    return false;
> >> +}
> >> +
> >> +bool
> >> +RegisterContextLinux_i386::WriteAllRegisterValues(const DataBufferSP &data)
> >> +{
> >> +    return false;
> >> +}
> >> +
> >> +bool
> >> +RegisterContextLinux_i386::UpdateAfterBreakpoint()
> >> +{
> >> +    // PC points one byte past the int3 responsible for the breakpoint.
> >> +    lldb::addr_t pc;
> >> +
> >> +    if ((pc = GetPC()) == LLDB_INVALID_ADDRESS)
> >> +        return false;
> >> +
> >> +    SetPC(pc - 1);
> >> +    return true;
> >> +}
> >> +
> >> +uint32_t
> >> +RegisterContextLinux_i386::ConvertRegisterKindToRegisterNumber(uint32_t kind,
> >> +                                                               uint32_t num)
> >> +{
> >> +    if (kind == eRegisterKindGeneric)
> >> +    {
> >> +        switch (num)
> >> +        {
> >> +        case LLDB_REGNUM_GENERIC_PC:    return gpr_eip;
> >> +        case LLDB_REGNUM_GENERIC_SP:    return gpr_esp;
> >> +        case LLDB_REGNUM_GENERIC_FP:    return gpr_ebp;
> >> +        case LLDB_REGNUM_GENERIC_FLAGS: return gpr_eflags;
> >> +        case LLDB_REGNUM_GENERIC_RA:
> >> +        default:
> >> +            return LLDB_INVALID_REGNUM;
> >> +        }
> >> +    }
> >> +
> >> +    if (kind == eRegisterKindGCC || kind == eRegisterKindDWARF)
> >> +    {
> >> +        switch (num)
> >> +        {
> >> +        case dwarf_eax:  return gpr_eax;
> >> +        case dwarf_edx:  return gpr_edx;
> >> +        case dwarf_ecx:  return gpr_ecx;
> >> +        case dwarf_ebx:  return gpr_ebx;
> >> +        case dwarf_esi:  return gpr_esi;
> >> +        case dwarf_edi:  return gpr_edi;
> >> +        case dwarf_ebp:  return gpr_ebp;
> >> +        case dwarf_esp:  return gpr_esp;
> >> +        case dwarf_eip:  return gpr_eip;
> >> +        case dwarf_xmm0: return fpu_xmm0;
> >> +        case dwarf_xmm1: return fpu_xmm1;
> >> +        case dwarf_xmm2: return fpu_xmm2;
> >> +        case dwarf_xmm3: return fpu_xmm3;
> >> +        case dwarf_xmm4: return fpu_xmm4;
> >> +        case dwarf_xmm5: return fpu_xmm5;
> >> +        case dwarf_xmm6: return fpu_xmm6;
> >> +        case dwarf_xmm7: return fpu_xmm7;
> >> +        case dwarf_stmm0: return fpu_stmm0;
> >> +        case dwarf_stmm1: return fpu_stmm1;
> >> +        case dwarf_stmm2: return fpu_stmm2;
> >> +        case dwarf_stmm3: return fpu_stmm3;
> >> +        case dwarf_stmm4: return fpu_stmm4;
> >> +        case dwarf_stmm5: return fpu_stmm5;
> >> +        case dwarf_stmm6: return fpu_stmm6;
> >> +        case dwarf_stmm7: return fpu_stmm7;
> >> +        default:
> >> +            return LLDB_INVALID_REGNUM;
> >> +        }
> >> +    }
> >> +
> >> +    if (kind == eRegisterKindGDB)
> >> +    {
> >> +        switch (num)
> >> +        {
> >> +        case gdb_eax     : return gpr_eax;
> >> +        case gdb_ebx     : return gpr_ebx;
> >> +        case gdb_ecx     : return gpr_ecx;
> >> +        case gdb_edx     : return gpr_edx;
> >> +        case gdb_esi     : return gpr_esi;
> >> +        case gdb_edi     : return gpr_edi;
> >> +        case gdb_ebp     : return gpr_ebp;
> >> +        case gdb_esp     : return gpr_esp;
> >> +        case gdb_eip     : return gpr_eip;
> >> +        case gdb_eflags  : return gpr_eflags;
> >> +        case gdb_cs      : return gpr_cs;
> >> +        case gdb_ss      : return gpr_ss;
> >> +        case gdb_ds      : return gpr_ds;
> >> +        case gdb_es      : return gpr_es;
> >> +        case gdb_fs      : return gpr_fs;
> >> +        case gdb_gs      : return gpr_gs;
> >> +        case gdb_stmm0   : return fpu_stmm0;
> >> +        case gdb_stmm1   : return fpu_stmm1;
> >> +        case gdb_stmm2   : return fpu_stmm2;
> >> +        case gdb_stmm3   : return fpu_stmm3;
> >> +        case gdb_stmm4   : return fpu_stmm4;
> >> +        case gdb_stmm5   : return fpu_stmm5;
> >> +        case gdb_stmm6   : return fpu_stmm6;
> >> +        case gdb_stmm7   : return fpu_stmm7;
> >> +        case gdb_fcw     : return fpu_fcw;
> >> +        case gdb_fsw     : return fpu_fsw;
> >> +        case gdb_ftw     : return fpu_ftw;
> >> +        case gdb_fpu_cs  : return fpu_cs;
> >> +        case gdb_ip      : return fpu_ip;
> >> +        case gdb_fpu_ds  : return fpu_fos;
> >> +        case gdb_dp      : return fpu_foo;
> >> +        case gdb_fop     : return fpu_fop;
> >> +        case gdb_xmm0    : return fpu_xmm0;
> >> +        case gdb_xmm1    : return fpu_xmm1;
> >> +        case gdb_xmm2    : return fpu_xmm2;
> >> +        case gdb_xmm3    : return fpu_xmm3;
> >> +        case gdb_xmm4    : return fpu_xmm4;
> >> +        case gdb_xmm5    : return fpu_xmm5;
> >> +        case gdb_xmm6    : return fpu_xmm6;
> >> +        case gdb_xmm7    : return fpu_xmm7;
> >> +        case gdb_mxcsr   : return fpu_mxcsr;
> >> +        default:
> >> +            return LLDB_INVALID_REGNUM;
> >> +        }
> >> +    }
> >> +    else if (kind == eRegisterKindLLDB)
> >> +    {
> >> +        return num;
> >> +    }
> >> +
> >> +    return LLDB_INVALID_REGNUM;
> >> +}
> >> +
> >> +bool
> >> +RegisterContextLinux_i386::HardwareSingleStep(bool enable)
> >> +{
> >> +    enum { TRACE_BIT = 0x100 };
> >> +    uint64_t eflags;
> >> +
> >> +    if ((eflags = ReadRegisterAsUnsigned(gpr_eflags, -1UL)) == -1UL)
> >> +        return false;
> >> +    
> >> +    if (enable)
> >> +    {
> >> +        if (eflags & TRACE_BIT)
> >> +            return true;
> >> +
> >> +        eflags |= TRACE_BIT;
> >> +    }
> >> +    else
> >> +    {
> >> +        if (!(eflags & TRACE_BIT))
> >> +            return false;
> >> +
> >> +        eflags &= ~TRACE_BIT;
> >> +    }
> >> +
> >> +    return WriteRegisterFromUnsigned(gpr_eflags, eflags);
> >> +}
> >> +
> >> +bool
> >> +RegisterContextLinux_i386::ReadGPR()
> >> +{
> >> +     ProcessMonitor &monitor = GetMonitor();
> >> +     return monitor.ReadGPR(&user.regs);
> >> +}
> >> +
> >> +bool
> >> +RegisterContextLinux_i386::ReadFPR()
> >> +{
> >> +    ProcessMonitor &monitor = GetMonitor();
> >> +    return monitor.ReadFPR(&user.i387);
> >> +}
> >> diff --git a/source/Plugins/Process/Linux/RegisterContextLinux_i386.h b/source/Plugins/Process/Linux/RegisterContextLinux_i386.h
> >> new file mode 100644
> >> index 0000000..30b3d70
> >> --- /dev/null
> >> +++ b/source/Plugins/Process/Linux/RegisterContextLinux_i386.h
> >> @@ -0,0 +1,148 @@
> >> +//===-- RegisterContextLinux_i386.h ------------------------------*- C++ -*-===//
> >> +//
> >> +//                     The LLVM Compiler Infrastructure
> >> +//
> >> +// This file is distributed under the University of Illinois Open Source
> >> +// License. See LICENSE.TXT for details.
> >> +//
> >> +//===----------------------------------------------------------------------===//
> >> +
> >> +#ifndef liblldb_RegisterContextLinux_i386_h_
> >> +#define liblldb_RegisterContextLinux_i386_h_
> >> +
> >> +// C Includes
> >> +// C++ Includes
> >> +// Other libraries and framework includes
> >> +// Project includes
> >> +#include "RegisterContextLinux.h"
> >> +
> >> +class RegisterContextLinux_i386 : public RegisterContextLinux
> >> +{
> >> +public:
> >> +    RegisterContextLinux_i386(lldb_private::Thread &thread,
> >> +                              uint32_t concreate_frame_idx);
> >> +
> >> +    ~RegisterContextLinux_i386();
> >> +
> >> +    void
> >> +    Invalidate();
> >> +
> >> +    void
> >> +    InvalidateAllRegisters();
> >> +
> >> +    size_t
> >> +    GetRegisterCount();
> >> +
> >> +    const lldb::RegisterInfo *
> >> +    GetRegisterInfoAtIndex(uint32_t reg);
> >> +
> >> +    size_t
> >> +    GetRegisterSetCount();
> >> +
> >> +    const lldb::RegisterSet *
> >> +    GetRegisterSet(uint32_t set);
> >> +
> >> +    bool
> >> +    ReadRegisterValue(uint32_t reg, lldb_private::Scalar &value);
> >> +
> >> +    bool
> >> +    ReadRegisterBytes(uint32_t reg, lldb_private::DataExtractor &data);
> >> +
> >> +    bool
> >> +    ReadAllRegisterValues(lldb::DataBufferSP &data_sp);
> >> +
> >> +    bool
> >> +    WriteRegisterValue(uint32_t reg, const lldb_private::Scalar &value);
> >> +
> >> +    bool
> >> +    WriteRegisterBytes(uint32_t reg, lldb_private::DataExtractor &data,
> >> +                       uint32_t data_offset = 0);
> >> +
> >> +    bool
> >> +    WriteAllRegisterValues(const lldb::DataBufferSP &data_sp);
> >> +
> >> +    uint32_t
> >> +    ConvertRegisterKindToRegisterNumber(uint32_t kind, uint32_t num);
> >> +
> >> +    bool
> >> +    HardwareSingleStep(bool enable);
> >> +
> >> +    bool
> >> +    UpdateAfterBreakpoint();
> >> +
> >> +    struct GPR
> >> +    {
> >> +        uint32_t ebx;
> >> +        uint32_t ecx;
> >> +        uint32_t edx;
> >> +        uint32_t esi;
> >> +        uint32_t edi;
> >> +        uint32_t ebp;
> >> +        uint32_t eax;
> >> +        uint32_t ds;
> >> +        uint32_t es;
> >> +        uint32_t fs;
> >> +        uint32_t gs;
> >> +        uint32_t orig_ax;
> >> +        uint32_t eip;
> >> +        uint32_t cs;
> >> +        uint32_t eflags;
> >> +        uint32_t esp;
> >> +        uint32_t ss;
> >> +    };
> >> +
> >> +    struct MMSReg
> >> +    {
> >> +        uint8_t bytes[8];
> >> +    };
> >> +
> >> +    struct XMMReg
> >> +    {
> >> +        uint8_t bytes[16];
> >> +    };
> >> +
> >> +    struct FPU
> >> +    {
> >> +        uint16_t    fcw;
> >> +        uint16_t    fsw;
> >> +        uint16_t    ftw;
> >> +        uint16_t    fop;
> >> +        uint32_t    ip;
> >> +        uint32_t    cs;
> >> +        uint32_t    foo;
> >> +        uint32_t    fos;
> >> +        uint32_t    mxcsr;
> >> +        uint32_t    reserved;
> >> +        MMSReg      stmm[8];
> >> +        XMMReg      xmm[8];
> >> +        uint32_t    pad[56];
> >> +    };
> >> +
> >> +    struct UserArea
> >> +    {
> >> +        GPR      regs;          // General purpose registers.
> >> +        int32_t  fpvalid;       // True if FPU is being used.
> >> +        FPU      i387;          // FPU registers.
> >> +        uint32_t tsize;         // Text segment size.
> >> +        uint32_t dsize;         // Data segment size.
> >> +        uint32_t ssize;         // Stack segment size.
> >> +        uint32_t start_code;    // VM address of text.
> >> +        uint32_t start_stack;   // VM address of stack bottom (top in rsp).
> >> +        int32_t  signal;        // Signal causing core dump.
> >> +        int32_t  reserved;      // Unused.
> >> +        uint32_t ar0;           // Location of GPR's.
> >> +        FPU*     fpstate;       // Location of FPR's.
> >> +        uint32_t magic;         // Identifier for core dumps.
> >> +        char     u_comm[32];    // Command causing core dump.
> >> +        uint32_t u_debugreg[8]; // Debug registers (DR0 - DR7).
> >> +    };
> >> +private:
> >> +    UserArea user;
> >> +
> >> +    ProcessMonitor &GetMonitor();
> >> +
> >> +    bool ReadGPR();
> >> +    bool ReadFPR();
> >> +};
> >> +
> >> +#endif // #ifndef liblldb_RegisterContextLinux_i386_h_
> > 
> > 
> > -- 
> > steve
> > 
> 

-- 
steve


From ctice at apple.com  Mon Feb 28 17:15:24 2011
From: ctice at apple.com (Caroline Tice)
Date: Mon, 28 Feb 2011 23:15:24 -0000
Subject: [Lldb-commits] [lldb] r126709 -
 /lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
Message-ID: <20110228231524.565DF2A6C12C@llvm.org>

Author: ctice
Date: Mon Feb 28 17:15:24 2011
New Revision: 126709

URL: http://llvm.org/viewvc/llvm-project?rev=126709&view=rev
Log:

Add code to emulate LDRH (literal) Arm instruction.


Modified:
    lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp

Modified: lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp?rev=126709&r1=126708&r2=126709&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp (original)
+++ lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp Mon Feb 28 17:15:24 2011
@@ -6024,6 +6024,117 @@
     return true;
 }
                   
+// LDRH (literal) caculates an address from the PC value and an immediate offset, loads a halfword from memory, 
+// zero-extends it to form a 32-bit word, and writes it to a register.            
+bool
+EmulateInstructionARM::EmulateLDRHLiteral (ARMEncoding encoding)
+{
+#if 0
+    if ConditionPassed() then 
+        EncodingSpecificOperations(); NullCheckIfThumbEE(15); 
+        base = Align(PC,4); 
+        address = if add then (base + imm32) else (base - imm32); 
+        data = MemU[address,2]; 
+        if UnalignedSupport() || address<0> = ???0??? then
+            R[t] = ZeroExtend(data, 32); 
+        else // Can only apply before ARMv7
+            R[t] = bits(32) UNKNOWN;
+#endif
+                  
+                  
+    bool success = false;
+    const uint32_t opcode = OpcodeAsUnsigned (&success);
+    if (!success)
+        return false;
+            
+    if (ConditionPassed())
+    {
+        uint32_t t;
+        uint32_t imm32;
+        bool add;
+                  
+        // EncodingSpecificOperations(); NullCheckIfThumbEE(15); 
+        switch (encoding)
+        {
+            case eEncodingT1:
+                // if Rt == ???1111??? then SEE "Unallocated memory hints"; 
+                // t = UInt(Rt); imm32 = ZeroExtend(imm12, 32); add = (U == ???1???); 
+                t = Bits32 (opcode, 15, 12);
+                imm32 = Bits32 (opcode, 11, 0);
+                add = BitIsSet (opcode, 23);
+                  
+                // if t == 13 then UNPREDICTABLE;
+                if (t == 13)
+                    return false;
+                  
+                break;
+                  
+            case eEncodingA1:
+            {
+                uint32_t imm4H = Bits32 (opcode, 11, 8);
+                uint32_t imm4L = Bits32 (opcode, 3, 0);
+                  
+                // t == UInt(Rt); imm32 = ZeroExtend(imm4H:imm4L, 32); add = (U == ???1???);
+                t = Bits32 (opcode, 15, 12);
+                imm32 = (imm4H << 4) & imm4L;
+                add = BitIsSet (opcode, 23);
+                  
+                // if t == 15 then UNPREDICTABLE;                  
+                if (t == 15)
+                    return false;
+                break;
+            }
+                  
+            default:
+                return false;
+        }
+                  
+        // base = Align(PC,4); 
+        uint64_t pc_value = ReadRegisterUnsigned (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_PC, 0, &success);
+        if (!success)
+            return false;
+                  
+        addr_t base = AlignPC (pc_value);
+        addr_t address;
+                  
+        // address = if add then (base + imm32) else (base - imm32); 
+        if (add)
+            address = base + imm32;
+        else
+            address = base - imm32;
+                  
+        // data = MemU[address,2]; 
+        Register base_reg;
+        base_reg.SetRegister (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_PC);
+                  
+        EmulateInstruction::Context context;
+        context.type = eContextRegisterLoad;
+        context.SetRegisterPlusOffset (base_reg, address - base);
+                  
+        uint64_t data = MemURead (context, address, 2, 0, &success);
+        if (!success)
+            return false;
+                  
+        
+        // if UnalignedSupport() || address<0> = ???0??? then
+        if (UnalignedSupport () || BitIsClear (address, 0))
+        {
+            // R[t] = ZeroExtend(data, 32); 
+            context.type = eContextRegisterLoad;
+            context.SetRegisterPlusOffset (base_reg, address - base);
+            if (!WriteRegisterUnsigned (context, eRegisterKindDWARF, dwarf_r0 + t, data))
+                return false;
+                  
+        }
+        else // Can only apply before ARMv7
+        {
+            // R[t] = bits(32) UNKNOWN;
+            WriteBits32Unknown (t);
+        }
+    }
+    return true;
+}
+                  
 // Bitwise Exclusive OR (immediate) performs a bitwise exclusive OR of a register value and an immediate value,
 // and writes the result to the destination register.  It can optionally update the condition flags based on
 // the result.
@@ -7396,6 +7507,7 @@
         { 0x0e500010, 0x06100000, ARMvAll,       eEncodingA1, eSize32, &EmulateInstructionARM::EmulateLDRRegister, "ldr<c> <Rt> [<Rn> +/-<Rm> {<shift>}] {!}" },
         { 0x0e5f0000, 0x045f0000, ARMvAll,       eEncodingA1, eSize32, &EmulateInstructionARM::EmulateLDRBLiteral, "ldrb<c> <Rt>, [...]"},
         { 0xfe500010, 0x06500000, ARMvAll,       eEncodingA1, eSize32, &EmulateInstructionARM::EmulateLDRBRegister, "ldrb<c> <Rt>, [<Rn>,+/-<Rm>{, <shift>}]{!}" },
+        { 0x0e5f00f0, 0x005f00b0, ARMvAll,       eEncodingA1, eSize32, &EmulateInstructionARM::EmulateLDRHLiteral, "ldrh<c> <Rt>, <label>" },
                   
         //----------------------------------------------------------------------
         // Store instructions
@@ -7637,6 +7749,7 @@
         { 0xfffff800, 0x00008800, ARMV4T_ABOVE,  eEncodingT1, eSize16, &EmulateInstructionARM::EmulateLDRHImmediate, "ldrh<c> <Rt>, [<Rn>{,#<imm>}]"  },
         { 0xfff00000, 0xf8b00000, ARMV6T2_ABOVE, eEncodingT2, eSize32, &EmulateInstructionARM::EmulateLDRHImmediate, "ldrh<c>.w <Rt>,[<Rn>{,#<imm12>}]" },
         { 0xfff00800, 0xf8300800, ARMV6T2_ABOVE, eEncodingT3, eSize32, &EmulateInstructionARM::EmulateLDRHImmediate, "ldrh<c> <Rt>,[<Rn>,#+/-<imm8>]{!}"  },
+        { 0xff7f0000, 0xf83f0000, ARMV6T2_ABOVE, eEncodingT1, eSize32, &EmulateInstructionARM::EmulateLDRHLiteral, "ldrh<c> <Rt>, <label>" },
                   
         //----------------------------------------------------------------------
         // Store instructions



From jingham at apple.com  Mon Feb 28 19:39:04 2011
From: jingham at apple.com (Jim Ingham)
Date: Tue, 01 Mar 2011 01:39:04 -0000
Subject: [Lldb-commits] [lldb] r126732 - in /lldb/trunk/scripts:
 Python/build-swig-Python.sh build-swig-wrapper-classes.sh
Message-ID: <20110301013904.890D22A6C12C@llvm.org>

Author: jingham
Date: Mon Feb 28 19:39:04 2011
New Revision: 126732

URL: http://llvm.org/viewvc/llvm-project?rev=126732&view=rev
Log:
Look for swig in /usr/bin and /usr/local/bin.

Modified:
    lldb/trunk/scripts/Python/build-swig-Python.sh
    lldb/trunk/scripts/build-swig-wrapper-classes.sh

Modified: lldb/trunk/scripts/Python/build-swig-Python.sh
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/scripts/Python/build-swig-Python.sh?rev=126732&r1=126731&r2=126732&view=diff
==============================================================================
--- lldb/trunk/scripts/Python/build-swig-Python.sh (original)
+++ lldb/trunk/scripts/Python/build-swig-Python.sh Mon Feb 28 19:39:04 2011
@@ -16,6 +16,7 @@
 CONFIG_BUILD_DIR=$3
 PYTHON_INSTALL_DIR=$4
 debug_flag=$5 
+SWIG=$6
 
 swig_output_file=${SRC_ROOT}/source/LLDBWrapPython.cpp
 swig_input_file=${SRC_ROOT}/scripts/lldb.swig
@@ -170,7 +171,7 @@
 
 # Build the SWIG C++ wrapper file for Python.
 
-swig -c++ -shadow -python -I"/usr/include" -I"${SRC_ROOT}/include" -I./. -outdir "${CONFIG_BUILD_DIR}" -o "${swig_output_file}" "${swig_input_file}"
+$SWIG -c++ -shadow -python -I"/usr/include" -I"${SRC_ROOT}/include" -I./. -outdir "${CONFIG_BUILD_DIR}" -o "${swig_output_file}" "${swig_input_file}"
 
 # Append global variable to lldb Python module.
 

Modified: lldb/trunk/scripts/build-swig-wrapper-classes.sh
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/scripts/build-swig-wrapper-classes.sh?rev=126732&r1=126731&r2=126732&view=diff
==============================================================================
--- lldb/trunk/scripts/build-swig-wrapper-classes.sh (original)
+++ lldb/trunk/scripts/build-swig-wrapper-classes.sh Mon Feb 28 19:39:04 2011
@@ -55,6 +55,27 @@
 fi
 
 #
+# Next look for swig
+#
+
+SWIG=
+if [ -f /usr/bin/swig ]
+then
+    SWIG=/usr/bin/swig
+else
+    if [ -f /usr/local/bin/swig ]
+    then
+        SWIG=/usr/local/bin/swig
+    fi
+fi
+
+if [ ${SWIG}a == a ]
+then
+    echo Error: could not find the swig binary
+    exit 1
+fi
+
+#
 # For each scripting language, make sure the build script for that language
 # exists, and if so, call it.
 #
@@ -98,7 +119,7 @@
                 echo "Executing $curlang build script..."
             fi
 
-            ./build-swig-${curlang}.sh  $SRC_ROOT $TARGET_DIR $CONFIG_BUILD_DIR "${PREFIX}" "${debug_flag}"
+            ./build-swig-${curlang}.sh  $SRC_ROOT $TARGET_DIR $CONFIG_BUILD_DIR "${PREFIX}" "${debug_flag}" "${SWIG}"
         fi
     fi
 done



From johnny.chen at apple.com  Mon Feb 28 20:20:14 2011
From: johnny.chen at apple.com (Johnny Chen)
Date: Tue, 01 Mar 2011 02:20:14 -0000
Subject: [Lldb-commits] [lldb] r126736 - in /lldb/trunk: scripts/lldb.swig
 test/python_api/process/ test/python_api/process/Makefile
 test/python_api/process/TestProcessAPI.py test/python_api/process/main.cpp
Message-ID: <20110301022014.DF61B2A6C12C@llvm.org>

Author: johnny
Date: Mon Feb 28 20:20:14 2011
New Revision: 126736

URL: http://llvm.org/viewvc/llvm-project?rev=126736&view=rev
Log:
Add TestProcessAPI.py which exercises some Python SBProcess API.  In particular, this tests
the SBProcess.ReadMemory() API, which, due to SWIG typemap'ing, expects 3 arguments (the location
to read from, the size in bytes to read, and an SBError object), and returns the result as a
Python string object.

On SnowLeopard where this has been tested, the SWIG script needs to be pampered (use the exact
same parameter names as in SBProcess.h) in order for this to work.

Added:
    lldb/trunk/test/python_api/process/
    lldb/trunk/test/python_api/process/Makefile
    lldb/trunk/test/python_api/process/TestProcessAPI.py
    lldb/trunk/test/python_api/process/main.cpp
Modified:
    lldb/trunk/scripts/lldb.swig

Modified: lldb/trunk/scripts/lldb.swig
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/scripts/lldb.swig?rev=126736&r1=126735&r2=126736&view=diff
==============================================================================
--- lldb/trunk/scripts/lldb.swig (original)
+++ lldb/trunk/scripts/lldb.swig Mon Feb 28 20:20:14 2011
@@ -56,7 +56,7 @@
 
 
 // typemap for an outgoing buffer
-%typemap(in) (const void *wbuffer, size_t len) {
+%typemap(in) (const void *buf, size_t size) {
    if (!PyString_Check($input)) {
        PyErr_SetString(PyExc_ValueError, "Expecting a string");
        return NULL;
@@ -66,7 +66,7 @@
 }
 
 // typemap for an incoming buffer
-%typemap(in) (void *rbuffer, size_t len) {
+%typemap(in) (void *buf, size_t size) {
    if (!PyInt_Check($input)) {
        PyErr_SetString(PyExc_ValueError, "Expecting an integer");
        return NULL;
@@ -80,14 +80,14 @@
 }
 
 // Return the buffer.  Discarding any previous return result
-%typemap(argout) (void *rbuffer, size_t len) {
+%typemap(argout) (void *buf, size_t size) {
    Py_XDECREF($result);   /* Blow away any previous result */
    if (result < 0) {      /* Check for I/O error */
        free($1);
        PyErr_SetFromErrno(PyExc_IOError);
        return NULL;
    }
-   $result = PyString_FromStringAndSize($1,result);
+   $result = PyString_FromStringAndSize(static_cast<const char*>($1),result);
    free($1);
 }
 

Added: lldb/trunk/test/python_api/process/Makefile
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/test/python_api/process/Makefile?rev=126736&view=auto
==============================================================================
--- lldb/trunk/test/python_api/process/Makefile (added)
+++ lldb/trunk/test/python_api/process/Makefile Mon Feb 28 20:20:14 2011
@@ -0,0 +1,5 @@
+LEVEL = ../../make
+
+CXX_SOURCES := main.cpp
+
+include $(LEVEL)/Makefile.rules

Added: lldb/trunk/test/python_api/process/TestProcessAPI.py
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/test/python_api/process/TestProcessAPI.py?rev=126736&view=auto
==============================================================================
--- lldb/trunk/test/python_api/process/TestProcessAPI.py (added)
+++ lldb/trunk/test/python_api/process/TestProcessAPI.py Mon Feb 28 20:20:14 2011
@@ -0,0 +1,102 @@
+"""
+Test symbol table access for main.m.
+"""
+
+import os, time
+import unittest2
+import lldb
+from lldbtest import *
+
+ at unittest2.skipUnless(sys.platform.startswith("darwin"), "requires Darwin")
+class ProcessAPITestCase(TestBase):
+
+    mydir = os.path.join("python_api", "process")
+
+    symbols_list = ['main',
+                    'my_char'
+                    ]
+
+    @python_api_test
+    def test_with_dsym_and_python_api(self):
+        """Test Python process APIs."""
+        self.buildDsym()
+        self.process_api()
+
+    @python_api_test
+    def test_with_dwarf_and_python_api(self):
+        """Test Python process APIs."""
+        self.buildDwarf()
+        self.process_api()
+
+    def setUp(self):
+        # Call super's setUp().
+        TestBase.setUp(self)
+        # Find the line number to break inside main().
+        self.line = line_number("main.cpp", "// Set break point at this line and check variable 'my_char'.")
+
+    def process_api(self):
+        """Test Python process APIs."""
+        exe = os.path.join(os.getcwd(), "a.out")
+        self.runCmd("file " + exe, CURRENT_EXECUTABLE_SET)
+
+        target = self.dbg.CreateTarget(exe)
+        self.assertTrue(target.IsValid(), VALID_TARGET)
+
+        breakpoint = target.BreakpointCreateByLocation("main.cpp", self.line)
+        self.assertTrue(breakpoint.IsValid(), VALID_BREAKPOINT)
+
+        # Launch the process, and do not stop at the entry point.
+        error = lldb.SBError()
+        self.process = target.Launch (self.dbg.GetListener(), None, None, os.ctermid(), os.ctermid(), os.ctermid(), None, 0, False, error)
+
+        thread = self.process.GetThreadAtIndex(0);
+        frame = thread.GetFrameAtIndex(0);
+
+        # Get the SBValue for the global variable 'my_char'.
+        val = frame.FindValue("my_char", lldb.eValueTypeVariableGlobal)
+        location = int(val.GetLocation(frame), 16)
+        self.DebugSBValue(frame, val)
+
+        # Due to the typemap magic (see lldb.swig), we pass in 1 to ReadMemory and
+        # expect to get a Python string as the result object!
+        content = self.process.ReadMemory(location, 1, error)
+        print "content:", content
+
+        self.expect(content, "Result from SBProcess.ReadMemory() matches our expected output: 'x'",
+                    exe=False,
+            startstr = 'x')
+
+        #
+        # Exercise Python APIs to access the symbol table entries.
+        #
+
+        # Create the filespec by which to locate our a.out module.
+        filespec = lldb.SBFileSpec(exe, False)
+
+        module = target.FindModule(filespec)
+        self.assertTrue(module.IsValid(), VALID_MODULE)
+
+        # Create the set of known symbols.  As we iterate through the symbol
+        # table, remove the symbol from the set if it is a known symbol.
+        expected_symbols = set(self.symbols_list)
+        from lldbutil import lldb_iter
+        for symbol in lldb_iter(module, 'GetNumSymbols', 'GetSymbolAtIndex'):
+            self.assertTrue(symbol.IsValid(), VALID_SYMBOL)
+            #print "symbol:", symbol
+            name = symbol.GetName()
+            if name in expected_symbols:
+                #print "Removing %s from known_symbols %s" % (name, expected_symbols)
+                expected_symbols.remove(name)
+
+        # At this point, the known_symbols set should have become an empty set.
+        # If not, raise an error.
+        #print "symbols unaccounted for:", expected_symbols
+        self.assertTrue(len(expected_symbols) == 0,
+                        "All the known symbols are accounted for")
+
+
+if __name__ == '__main__':
+    import atexit
+    lldb.SBDebugger.Initialize()
+    atexit.register(lambda: lldb.SBDebugger.Terminate())
+    unittest2.main()

Added: lldb/trunk/test/python_api/process/main.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/test/python_api/process/main.cpp?rev=126736&view=auto
==============================================================================
--- lldb/trunk/test/python_api/process/main.cpp (added)
+++ lldb/trunk/test/python_api/process/main.cpp Mon Feb 28 20:20:14 2011
@@ -0,0 +1,25 @@
+//===-- main.c --------------------------------------------------*- C++ -*-===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+#include <stdio.h>
+
+// This simple program is to test the lldb Python API related to process.
+
+char my_char = 'u';
+
+int main (int argc, char const *argv[])
+{
+    for (int i = 0; i < 3; ++i) {
+        printf("my_char='%c'\n", my_char);
+        ++my_char;
+    }
+
+    printf("after the loop: my_char='%c'\n", my_char); // 'my_char' should print out as 'x'.
+
+    return 0; // Set break point at this line and check variable 'my_char'.
+}



From ctice at apple.com  Tue Mar  1 12:00:42 2011
From: ctice at apple.com (Caroline Tice)
Date: Tue, 01 Mar 2011 18:00:42 -0000
Subject: [Lldb-commits] [lldb] r126758 -
 /lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
Message-ID: <20110301180043.029862A6C12E@llvm.org>

Author: ctice
Date: Tue Mar  1 12:00:42 2011
New Revision: 126758

URL: http://llvm.org/viewvc/llvm-project?rev=126758&view=rev
Log:

Add code to emulate LDRH (register) Arm instruction.


Modified:
    lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp

Modified: lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp?rev=126758&r1=126757&r2=126758&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp (original)
+++ lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp Tue Mar  1 12:00:42 2011
@@ -6040,8 +6040,7 @@
         else // Can only apply before ARMv7
             R[t] = bits(32) UNKNOWN;
 #endif
-                  
-                  
+                                    
     bool success = false;
     const uint32_t opcode = OpcodeAsUnsigned (&success);
     if (!success)
@@ -6135,6 +6134,183 @@
     return true;
 }
                   
+// LDRH (literal) calculates an address from a base register value and an offset register value, loads a halfword 
+// from memory, zero-extends it to form a 32-bit word, and writes it to a register.  The offset register value can 
+// be shifted left by 0, 1, 2, or 3 bits.
+bool
+EmulateInstructionARM::EmulateLDRHRegister (ARMEncoding encoding)
+{
+#if 0
+    if ConditionPassed() then 
+        EncodingSpecificOperations(); NullCheckIfThumbEE(n); 
+        offset = Shift(R[m], shift_t, shift_n, APSR.C); 
+        offset_addr = if add then (R[n] + offset) else (R[n] - offset); 
+        address = if index then offset_addr else R[n]; 
+        data = MemU[address,2]; 
+        if wback then R[n] = offset_addr; 
+        if UnalignedSupport() || address<0> = ???0??? then
+            R[t] = ZeroExtend(data, 32); 
+        else // Can only apply before ARMv7
+            R[t] = bits(32) UNKNOWN;
+#endif
+                  
+    bool success = false;
+    const uint32_t opcode = OpcodeAsUnsigned (&success);
+    if (!success)
+        return false;
+            
+    if (ConditionPassed())
+    {
+        uint32_t t;
+        uint32_t n;
+        uint32_t m;
+        bool index;
+        bool add;
+        bool wback;
+        ARM_ShifterType shift_t;
+        uint32_t shift_n;
+                  
+        // EncodingSpecificOperations(); NullCheckIfThumbEE(n); 
+        switch (encoding)
+        {
+            case eEncodingT1:
+                // if CurrentInstrSet() == InstrSet_ThumbEE then SEE "Modified operation in ThumbEE"; 
+                // t = UInt(Rt); n = UInt(Rn); m = UInt(Rm);
+                t = Bits32 (opcode, 2, 0);
+                n = Bits32 (opcode, 5, 3);
+                m = Bits32 (opcode, 8, 6);
+                  
+                // index = TRUE; add = TRUE; wback = FALSE; 
+                index = true;
+                add = true;
+                wback = false;
+                  
+                // (shift_t, shift_n) = (SRType_LSL, 0);
+                shift_t = SRType_LSL;
+                shift_n = 0;
+                  
+                break;
+                  
+            case eEncodingT2:
+                // if Rn == ???1111??? then SEE LDRH (literal); 
+                // if Rt == ???1111??? then SEE "Unallocated memory hints"; 
+                // t = UInt(Rt); n = UInt(Rn); m = UInt(Rm); 
+                t = Bits32 (opcode, 15, 12);
+                n = Bits32 (opcode, 19, 16);
+                m = Bits32 (opcode, 3, 0);
+                  
+                // index = TRUE; add = TRUE; wback = FALSE; 
+                index = true;
+                add = true;
+                wback = false;
+                  
+                // (shift_t, shift_n) = (SRType_LSL, UInt(imm2)); 
+                shift_t = SRType_LSL;
+                shift_n = Bits32 (opcode, 5, 4);
+                  
+                // if t == 13 || BadReg(m) then UNPREDICTABLE;
+                if ((t == 13) || BadReg (m))
+                    return false;
+                break;
+                  
+            case eEncodingA1:
+                // if P == ???0??? && W == ???1??? then SEE LDRHT; 
+                // t = UInt(Rt); n = UInt(Rn); m = UInt(Rm); 
+                t = Bits32 (opcode, 15, 12);
+                n = Bits32 (opcode, 19, 16);
+                m = Bits32 (opcode, 3, 0);
+                  
+                // index = (P == ???1???);	add = (U == ???1???);	wback = (P == ???0???) || (W == ???1???); 
+                index = BitIsSet (opcode, 24);
+                add = BitIsSet (opcode, 23);
+                wback = (BitIsClear (opcode, 24) || BitIsSet (opcode, 21));
+                  
+                // (shift_t, shift_n) = (SRType_LSL, 0); 
+                shift_t = SRType_LSL;
+                shift_n = 0;
+                  
+                // if t == 15 || m == 15 then UNPREDICTABLE; 
+                if ((t == 15) || (m == 15))
+                    return false;
+                  
+                // if wback && (n == 15 || n == t) then UNPREDICTABLE;
+                if (wback && ((n == 15) || (n == t)))
+                    return false;
+                  
+                break;
+                  
+            default:
+                return false;
+        }
+                  
+        // offset = Shift(R[m], shift_t, shift_n, APSR.C); 
+                  
+        uint64_t Rm  = ReadRegisterUnsigned (eRegisterKindDWARF, dwarf_r0 + m, 0, &success);
+        if (!success)
+            return false;
+                  
+        addr_t offset = Shift (Rm, shift_t, shift_n, APSR_C);
+                  
+        addr_t offset_addr;
+        addr_t address;
+                  
+        // offset_addr = if add then (R[n] + offset) else (R[n] - offset);
+        uint64_t Rn = ReadRegisterUnsigned (eRegisterKindDWARF, dwarf_r0 + n, 0, &success);
+        if (!success)
+            return false;
+                  
+        if (add)
+            offset_addr = Rn + offset;
+        else
+            offset_addr = Rn - offset;
+                  
+        // address = if index then offset_addr else R[n]; 
+        if (index)
+            address = offset_addr;
+        else
+            address = Rn;
+                  
+        // data = MemU[address,2]; 
+        Register base_reg;
+        Register offset_reg;
+        base_reg.SetRegister (eRegisterKindDWARF, dwarf_r0 + n);
+        offset_reg.SetRegister (eRegisterKindDWARF, dwarf_r0 + m);
+                  
+        EmulateInstruction::Context context;
+        context.type = eContextRegisterLoad;
+        context.SetRegisterPlusIndirectOffset (base_reg, offset_reg);
+        uint64_t data = MemURead (context, address, 2, 0, &success);
+        if (!success)
+            return false;
+                  
+        // if wback then R[n] = offset_addr; 
+        if (wback)
+        {
+            context.type = eContextAdjustBaseRegister;
+            context.SetAddress (offset_addr);
+            if (!WriteRegisterUnsigned (context, eRegisterKindDWARF, dwarf_r0 + n, offset_addr))
+                return false;
+        }
+                  
+        // if UnalignedSupport() || address<0> = ???0??? then
+        if (UnalignedSupport() || BitIsClear (address, 0))
+        {
+            // R[t] = ZeroExtend(data, 32);
+            context.type = eContextRegisterLoad;
+            context.SetRegisterPlusIndirectOffset (base_reg, offset_reg);
+            if (!WriteRegisterUnsigned (context, eRegisterKindDWARF, dwarf_r0 + t, data))
+                return false;
+        }
+        else // Can only apply before ARMv7
+        {
+            // R[t] = bits(32) UNKNOWN;
+            WriteBits32Unknown (t);
+        }
+    }              
+    return true;
+}
+                                                                            
+                  
 // Bitwise Exclusive OR (immediate) performs a bitwise exclusive OR of a register value and an immediate value,
 // and writes the result to the destination register.  It can optionally update the condition flags based on
 // the result.
@@ -7508,6 +7684,7 @@
         { 0x0e5f0000, 0x045f0000, ARMvAll,       eEncodingA1, eSize32, &EmulateInstructionARM::EmulateLDRBLiteral, "ldrb<c> <Rt>, [...]"},
         { 0xfe500010, 0x06500000, ARMvAll,       eEncodingA1, eSize32, &EmulateInstructionARM::EmulateLDRBRegister, "ldrb<c> <Rt>, [<Rn>,+/-<Rm>{, <shift>}]{!}" },
         { 0x0e5f00f0, 0x005f00b0, ARMvAll,       eEncodingA1, eSize32, &EmulateInstructionARM::EmulateLDRHLiteral, "ldrh<c> <Rt>, <label>" },
+        { 0x0e5000f0, 0x001000b0, ARMvAll,       eEncodingA1, eSize32, &EmulateInstructionARM::EmulateLDRHRegister, "ldrh<c> <Rt>,[<Rn>,+/-<Rm>]{!}"  }, 
                   
         //----------------------------------------------------------------------
         // Store instructions
@@ -7750,6 +7927,8 @@
         { 0xfff00000, 0xf8b00000, ARMV6T2_ABOVE, eEncodingT2, eSize32, &EmulateInstructionARM::EmulateLDRHImmediate, "ldrh<c>.w <Rt>,[<Rn>{,#<imm12>}]" },
         { 0xfff00800, 0xf8300800, ARMV6T2_ABOVE, eEncodingT3, eSize32, &EmulateInstructionARM::EmulateLDRHImmediate, "ldrh<c> <Rt>,[<Rn>,#+/-<imm8>]{!}"  },
         { 0xff7f0000, 0xf83f0000, ARMV6T2_ABOVE, eEncodingT1, eSize32, &EmulateInstructionARM::EmulateLDRHLiteral, "ldrh<c> <Rt>, <label>" },
+        { 0xfffffe00, 0x00005a00, ARMV4T_ABOVE,  eEncodingT1, eSize16, &EmulateInstructionARM::EmulateLDRHRegister, "ldrh<c> <Rt>, [<Rn>,<Rm>]" },
+        { 0xfff00fc0, 0xf8300000, ARMV6T2_ABOVE, eEncodingT2, eSize32, &EmulateInstructionARM::EmulateLDRHRegister, "ldrh<c>.w <Rt>,[<Rn>,<Rm>{,LSL #<imm2>}]" },
                   
         //----------------------------------------------------------------------
         // Store instructions



From johnny.chen at apple.com  Tue Mar  1 12:51:48 2011
From: johnny.chen at apple.com (Johnny Chen)
Date: Tue, 01 Mar 2011 18:51:48 -0000
Subject: [Lldb-commits] [lldb] r126769 -
	/lldb/trunk/test/python_api/process/TestProcessAPI.py
Message-ID: <20110301185148.1D9FC2A6C12C@llvm.org>

Author: johnny
Date: Tue Mar  1 12:51:47 2011
New Revision: 126769

URL: http://llvm.org/viewvc/llvm-project?rev=126769&view=rev
Log:
Add test methods for SBProcess.WriteMemory() API to the TestProcessAPI.py file.
This makes the number of total tests equal to 201.

Modified:
    lldb/trunk/test/python_api/process/TestProcessAPI.py

Modified: lldb/trunk/test/python_api/process/TestProcessAPI.py
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/test/python_api/process/TestProcessAPI.py?rev=126769&r1=126768&r2=126769&view=diff
==============================================================================
--- lldb/trunk/test/python_api/process/TestProcessAPI.py (original)
+++ lldb/trunk/test/python_api/process/TestProcessAPI.py Tue Mar  1 12:51:47 2011
@@ -1,5 +1,5 @@
 """
-Test symbol table access for main.m.
+Test SBProcess APIs, including ReadMemory(), WriteMemory(), and others.
 """
 
 import os, time
@@ -12,21 +12,31 @@
 
     mydir = os.path.join("python_api", "process")
 
-    symbols_list = ['main',
-                    'my_char'
-                    ]
+    @unittest2.skipUnless(sys.platform.startswith("darwin"), "requires Darwin")
+    @python_api_test
+    def test_read_memory_with_dsym(self):
+        """Test Python SBProcess.ReadMemory() API."""
+        self.buildDsym()
+        self.read_memory()
+
+    @python_api_test
+    def test_read_memory_with_dwarf(self):
+        """Test Python SBProcess.ReadMemory() API."""
+        self.buildDwarf()
+        self.read_memory()
 
+    @unittest2.skipUnless(sys.platform.startswith("darwin"), "requires Darwin")
     @python_api_test
-    def test_with_dsym_and_python_api(self):
-        """Test Python process APIs."""
+    def test_write_memory_with_dsym(self):
+        """Test Python SBProcess.WriteMemory() API."""
         self.buildDsym()
-        self.process_api()
+        self.write_memory()
 
     @python_api_test
-    def test_with_dwarf_and_python_api(self):
-        """Test Python process APIs."""
+    def test_write_memory_with_dwarf(self):
+        """Test Python SBProcess.WriteMemory() API."""
         self.buildDwarf()
-        self.process_api()
+        self.write_memory()
 
     def setUp(self):
         # Call super's setUp().
@@ -34,8 +44,8 @@
         # Find the line number to break inside main().
         self.line = line_number("main.cpp", "// Set break point at this line and check variable 'my_char'.")
 
-    def process_api(self):
-        """Test Python process APIs."""
+    def read_memory(self):
+        """Test Python SBProcess.ReadMemory() API."""
         exe = os.path.join(os.getcwd(), "a.out")
         self.runCmd("file " + exe, CURRENT_EXECUTABLE_SET)
 
@@ -54,45 +64,74 @@
 
         # Get the SBValue for the global variable 'my_char'.
         val = frame.FindValue("my_char", lldb.eValueTypeVariableGlobal)
-        location = int(val.GetLocation(frame), 16)
         self.DebugSBValue(frame, val)
 
+        # If the variable does not have a load address, there's no sense continuing.
+        if not val.GetLocation(frame).startswith("0x"):
+            return
+
+        # OK, let's get the hex location of the variable.
+        location = int(val.GetLocation(frame), 16)
+
         # Due to the typemap magic (see lldb.swig), we pass in 1 to ReadMemory and
         # expect to get a Python string as the result object!
         content = self.process.ReadMemory(location, 1, error)
-        print "content:", content
+        if not error.Success():
+            self.fail("SBProcess.ReadMemory() failed")
+        print "memory content:", content
 
         self.expect(content, "Result from SBProcess.ReadMemory() matches our expected output: 'x'",
                     exe=False,
             startstr = 'x')
 
-        #
-        # Exercise Python APIs to access the symbol table entries.
-        #
-
-        # Create the filespec by which to locate our a.out module.
-        filespec = lldb.SBFileSpec(exe, False)
-
-        module = target.FindModule(filespec)
-        self.assertTrue(module.IsValid(), VALID_MODULE)
-
-        # Create the set of known symbols.  As we iterate through the symbol
-        # table, remove the symbol from the set if it is a known symbol.
-        expected_symbols = set(self.symbols_list)
-        from lldbutil import lldb_iter
-        for symbol in lldb_iter(module, 'GetNumSymbols', 'GetSymbolAtIndex'):
-            self.assertTrue(symbol.IsValid(), VALID_SYMBOL)
-            #print "symbol:", symbol
-            name = symbol.GetName()
-            if name in expected_symbols:
-                #print "Removing %s from known_symbols %s" % (name, expected_symbols)
-                expected_symbols.remove(name)
-
-        # At this point, the known_symbols set should have become an empty set.
-        # If not, raise an error.
-        #print "symbols unaccounted for:", expected_symbols
-        self.assertTrue(len(expected_symbols) == 0,
-                        "All the known symbols are accounted for")
+    def write_memory(self):
+        """Test Python SBProcess.WriteMemory() API."""
+        exe = os.path.join(os.getcwd(), "a.out")
+        self.runCmd("file " + exe, CURRENT_EXECUTABLE_SET)
+
+        target = self.dbg.CreateTarget(exe)
+        self.assertTrue(target.IsValid(), VALID_TARGET)
+
+        breakpoint = target.BreakpointCreateByLocation("main.cpp", self.line)
+        self.assertTrue(breakpoint.IsValid(), VALID_BREAKPOINT)
+
+        # Launch the process, and do not stop at the entry point.
+        error = lldb.SBError()
+        self.process = target.Launch (self.dbg.GetListener(), None, None, os.ctermid(), os.ctermid(), os.ctermid(), None, 0, False, error)
+
+        thread = self.process.GetThreadAtIndex(0);
+        frame = thread.GetFrameAtIndex(0);
+
+        # Get the SBValue for the global variable 'my_char'.
+        val = frame.FindValue("my_char", lldb.eValueTypeVariableGlobal)
+        self.DebugSBValue(frame, val)
+
+        # If the variable does not have a load address, there's no sense continuing.
+        if not val.GetLocation(frame).startswith("0x"):
+            return
+
+        # OK, let's get the hex location of the variable.
+        location = int(val.GetLocation(frame), 16)
+
+        # The program logic makes the 'my_char' variable to have memory content as 'x'.
+        # But we want to use the WriteMemory() API to assign 'a' to the variable.
+
+        # Now use WriteMemory() API to write 'a' into the global variable.
+        result = self.process.WriteMemory(location, 'a', error)
+        if not error.Success() or result != 1:
+            self.fail("SBProcess.WriteMemory() failed")
+
+        # Read from the memory location.  This time it should be 'a'.
+        # Due to the typemap magic (see lldb.swig), we pass in 1 to ReadMemory and
+        # expect to get a Python string as the result object!
+        content = self.process.ReadMemory(location, 1, error)
+        if not error.Success():
+            self.fail("SBProcess.ReadMemory() failed")
+        print "memory content:", content
+
+        self.expect(content, "Result from SBProcess.ReadMemory() matches our expected output: 'a'",
+                    exe=False,
+            startstr = 'a')
 
 
 if __name__ == '__main__':



From johnny.chen at apple.com  Tue Mar  1 13:53:44 2011
From: johnny.chen at apple.com (Johnny Chen)
Date: Tue, 01 Mar 2011 19:53:44 -0000
Subject: [Lldb-commits] [lldb] r126774 -
	/lldb/trunk/test/python_api/process/TestProcessAPI.py
Message-ID: <20110301195344.6B0CC2A6C12C@llvm.org>

Author: johnny
Date: Tue Mar  1 13:53:43 2011
New Revision: 126774

URL: http://llvm.org/viewvc/llvm-project?rev=126774&view=rev
Log:
Fix wrong placement of skipUnless() decorator.

Modified:
    lldb/trunk/test/python_api/process/TestProcessAPI.py

Modified: lldb/trunk/test/python_api/process/TestProcessAPI.py
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/test/python_api/process/TestProcessAPI.py?rev=126774&r1=126773&r2=126774&view=diff
==============================================================================
--- lldb/trunk/test/python_api/process/TestProcessAPI.py (original)
+++ lldb/trunk/test/python_api/process/TestProcessAPI.py Tue Mar  1 13:53:43 2011
@@ -7,7 +7,6 @@
 import lldb
 from lldbtest import *
 
- at unittest2.skipUnless(sys.platform.startswith("darwin"), "requires Darwin")
 class ProcessAPITestCase(TestBase):
 
     mydir = os.path.join("python_api", "process")



From ctice at apple.com  Tue Mar  1 15:53:04 2011
From: ctice at apple.com (Caroline Tice)
Date: Tue, 01 Mar 2011 21:53:04 -0000
Subject: [Lldb-commits] [lldb] r126783 -
 /lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
Message-ID: <20110301215304.31A592A6C12C@llvm.org>

Author: ctice
Date: Tue Mar  1 15:53:03 2011
New Revision: 126783

URL: http://llvm.org/viewvc/llvm-project?rev=126783&view=rev
Log:

Add code to emulate LDRSB (immediate) Arm instruction.


Modified:
    lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp

Modified: lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp?rev=126783&r1=126782&r2=126783&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp (original)
+++ lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp Tue Mar  1 15:53:03 2011
@@ -6310,6 +6310,156 @@
     return true;
 }
                                                                             
+// LDRSB (immediate) calculates an address from a base register value and an immediate offset, loads a byte from 
+// memory, sign-extends it to form a 32-bit word, and writes it to a register.  It can use offset, post-indexed, 
+// or pre-indexed addressing.
+bool
+EmulateInstructionARM::EmulateLDRSBImmediate (ARMEncoding encoding)
+{
+#if 0
+    if ConditionPassed() then 
+        EncodingSpecificOperations(); NullCheckIfThumbEE(n); 
+        offset_addr = if add then (R[n] + imm32) else (R[n] - imm32); 
+        address = if index then offset_addr else R[n]; 
+        R[t] = SignExtend(MemU[address,1], 32); 
+        if wback then R[n] = offset_addr;
+#endif
+                  
+    bool success = false;
+    const uint32_t opcode = OpcodeAsUnsigned (&success);
+    if (!success)
+        return false;
+                  
+    if (ConditionPassed ())
+    {
+        uint32_t t;
+        uint32_t n;
+        uint32_t imm32;
+        bool index;
+        bool add;
+        bool wback;
+                  
+        // EncodingSpecificOperations(); NullCheckIfThumbEE(n); 
+        switch (encoding)
+        {
+            case eEncodingT1:
+                // if Rt == ???1111??? then SEE PLI; 
+                // if Rn == ???1111??? then SEE LDRSB (literal); 
+                // t = UInt(Rt); n = UInt(Rn); imm32 = ZeroExtend(imm12, 32); 
+                t = Bits32 (opcode, 15, 12);
+                n = Bits32 (opcode, 19, 16);
+                imm32 = Bits32 (opcode, 11, 0);
+                  
+                // index = TRUE; add = TRUE; wback = FALSE; 
+                index = true;
+                add = true;
+                wback = false;
+                  
+                // if t == 13 then UNPREDICTABLE;
+                if (t == 13)
+                    return false;
+                  
+                break;
+                  
+            case eEncodingT2:
+                // if Rt == ???1111??? && P == ???1??? && U == ???0??? && W == ???0??? then SEE PLI; 
+                // if Rn == ???1111??? then SEE LDRSB (literal); 
+                // if P == ???1??? && U == ???1??? && W == ???0??? then SEE LDRSBT; 
+                // if P == ???0??? && W == ???0??? then UNDEFINED;
+                if (BitIsClear (opcode, 10) && BitIsClear (opcode, 8))
+                    return false;
+                  
+                // t = UInt(Rt); n = UInt(Rn); imm32 = ZeroExtend(imm8, 32); 
+                t = Bits32 (opcode, 15, 12);
+                n = Bits32 (opcode, 19, 16);
+                imm32 = Bits32 (opcode, 7, 0);
+                  
+                // index = (P == ???1???); add = (U == ???1???); wback = (W == ???1???); 
+                index = BitIsSet (opcode, 10);
+                add = BitIsSet (opcode, 9);
+                wback = BitIsSet (opcode, 8);
+                  
+                // if BadReg(t) || (wback && n == t) then UNPREDICTABLE;
+                if (BadReg (t) || (wback && (n == t)))
+                    return false;
+                  
+                break;
+                  
+            case eEncodingA1:
+            {
+                // if Rn == ???1111??? then SEE LDRSB (literal); 
+                // if P == ???0??? && W == ???1??? then SEE LDRSBT; 
+                // t == UInt(Rt); n = UInt(Rn); imm32 = ZeroExtend(imm4H:imm4L, 32); 
+                t = Bits32 (opcode, 15, 12);
+                n = Bits32 (opcode, 19, 16);
+            
+                uint32_t imm4H = Bits32 (opcode, 11, 8);
+                uint32_t imm4L = Bits32 (opcode, 3, 0);
+                imm32 = (imm4H << 4) & imm4L;
+                  
+                // index = (P == ???1???);	add = (U == ???1???);	wback = (P == ???0???) || (W == ???1???); 
+                index = BitIsSet (opcode, 24);
+                add = BitIsSet (opcode, 23);
+                wback = (BitIsClear (opcode, 24) || BitIsSet (opcode, 21));
+                  
+                // if t == 15 || (wback && n == t) then UNPREDICTABLE;
+                if ((t == 15) || (wback && (n == t)))
+                    return false;
+                  
+                break;
+            }
+                  
+            default:
+                return false;
+        }
+                  
+        uint64_t Rn = ReadRegisterUnsigned (eRegisterKindDWARF, dwarf_r0 + n, 0, &success);
+        if (!success)
+            return false;
+                  
+        addr_t offset_addr;
+        addr_t address;
+                  
+        // offset_addr = if add then (R[n] + imm32) else (R[n] - imm32); 
+        if (add)
+            offset_addr = Rn + imm32;
+        else
+            offset_addr = Rn - imm32;
+                      
+        // address = if index then offset_addr else R[n]; 
+        if (index)
+            address = offset_addr;
+        else
+            address = Rn;
+        
+        // R[t] = SignExtend(MemU[address,1], 32);
+        Register base_reg;
+        base_reg.SetRegister (eRegisterKindDWARF, dwarf_r0 + n);
+                  
+        EmulateInstruction::Context context;
+        context.type = eContextRegisterLoad;
+        context.SetRegisterPlusOffset (base_reg, address - Rn);
+                  
+        uint64_t unsigned_data = MemURead (context, address, 1, 0, &success);
+        if (!success)
+            return false;
+                  
+        int64_t signed_data = llvm::SignExtend64<8>(unsigned_data);
+        if (!WriteRegisterUnsigned (context, eRegisterKindDWARF, dwarf_r0 + t, (uint64_t) signed_data))
+            return false;
+                  
+        // if wback then R[n] = offset_addr;
+        if (wback)
+        {
+            context.type = eContextAdjustBaseRegister;
+            context.SetAddress (offset_addr);
+            if (!WriteRegisterUnsigned (context, eRegisterKindDWARF, dwarf_r0 + n, offset_addr))
+                return false;
+        }
+    }
+                        
+    return true;
+}
                   
 // Bitwise Exclusive OR (immediate) performs a bitwise exclusive OR of a register value and an immediate value,
 // and writes the result to the destination register.  It can optionally update the condition flags based on
@@ -7685,6 +7835,7 @@
         { 0xfe500010, 0x06500000, ARMvAll,       eEncodingA1, eSize32, &EmulateInstructionARM::EmulateLDRBRegister, "ldrb<c> <Rt>, [<Rn>,+/-<Rm>{, <shift>}]{!}" },
         { 0x0e5f00f0, 0x005f00b0, ARMvAll,       eEncodingA1, eSize32, &EmulateInstructionARM::EmulateLDRHLiteral, "ldrh<c> <Rt>, <label>" },
         { 0x0e5000f0, 0x001000b0, ARMvAll,       eEncodingA1, eSize32, &EmulateInstructionARM::EmulateLDRHRegister, "ldrh<c> <Rt>,[<Rn>,+/-<Rm>]{!}"  }, 
+        { 0x0e5000f0, 0x005000d0, ARMvAll,       eEncodingA1, eSize32, &EmulateInstructionARM::EmulateLDRSBImmediate, "ldrsb<c> <Rt>, [<Rn>{,#+/-<imm8>}]" },
                   
         //----------------------------------------------------------------------
         // Store instructions
@@ -7929,6 +8080,8 @@
         { 0xff7f0000, 0xf83f0000, ARMV6T2_ABOVE, eEncodingT1, eSize32, &EmulateInstructionARM::EmulateLDRHLiteral, "ldrh<c> <Rt>, <label>" },
         { 0xfffffe00, 0x00005a00, ARMV4T_ABOVE,  eEncodingT1, eSize16, &EmulateInstructionARM::EmulateLDRHRegister, "ldrh<c> <Rt>, [<Rn>,<Rm>]" },
         { 0xfff00fc0, 0xf8300000, ARMV6T2_ABOVE, eEncodingT2, eSize32, &EmulateInstructionARM::EmulateLDRHRegister, "ldrh<c>.w <Rt>,[<Rn>,<Rm>{,LSL #<imm2>}]" },
+        { 0xfff00000, 0xf9900000, ARMV6T2_ABOVE, eEncodingT1, eSize32, &EmulateInstructionARM::EmulateLDRSBImmediate, "ldrsb<c> <Rt>,[<Rn>,#<imm12>]" },
+        { 0xfff00800, 0xf9100800, ARMV6T2_ABOVE, eEncodingT2, eSize32, &EmulateInstructionARM::EmulateLDRSBImmediate, "ldrsb<c> <Rt>,[<Rn>,#+/-<imm8>]" },
                   
         //----------------------------------------------------------------------
         // Store instructions



From ctice at apple.com  Tue Mar  1 16:25:18 2011
From: ctice at apple.com (Caroline Tice)
Date: Tue, 01 Mar 2011 22:25:18 -0000
Subject: [Lldb-commits] [lldb] r126789 -
 /lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
Message-ID: <20110301222518.2A5952A6C12C@llvm.org>

Author: ctice
Date: Tue Mar  1 16:25:17 2011
New Revision: 126789

URL: http://llvm.org/viewvc/llvm-project?rev=126789&view=rev
Log:

Add code to emulate LDRSB (literal) Arm instruction.


Modified:
    lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp

Modified: lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp?rev=126789&r1=126788&r2=126789&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp (original)
+++ lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp Tue Mar  1 16:25:17 2011
@@ -6461,6 +6461,99 @@
     return true;
 }
                   
+// LDRSB (literal) calculates an address from the PC value and an immediate offset, loads a byte from memory, 
+// sign-extends it to form a 32-bit word, and writes tit to a register.
+bool
+EmulateInstructionARM::EmulateLDRSBLiteral (ARMEncoding encoding)
+{
+#if 0
+    if ConditionPassed() then 
+        EncodingSpecificOperations(); NullCheckIfThumbEE(15); 
+        base = Align(PC,4); 
+        address = if add then (base + imm32) else (base - imm32); 
+        R[t] = SignExtend(MemU[address,1], 32);
+#endif
+                  
+    bool success = false;
+    const uint32_t opcode = OpcodeAsUnsigned (&success);
+    if (!success)
+        return false;
+            
+    if (ConditionPassed ())
+    {
+        uint32_t t;
+        uint32_t imm32;
+        bool add;
+                  
+        // EncodingSpecificOperations(); NullCheckIfThumbEE(15); 
+        switch (encoding)
+        {
+            case eEncodingT1:
+                // if Rt == ???1111??? then SEE PLI; 
+                // t = UInt(Rt); imm32 = ZeroExtend(imm12, 32); add = (U == ???1???); 
+                t = Bits32 (opcode, 15, 12);
+                imm32 = Bits32 (opcode, 11, 0);
+                add = BitIsSet (opcode, 23);
+                  
+                // if t == 13 then UNPREDICTABLE;
+                if (t == 13)
+                    return false;
+                  
+                break;
+                  
+            case eEncodingA1:
+            {
+                // t == UInt(Rt); imm32 = ZeroExtend(imm4H:imm4L, 32); add = (U == ???1???); 
+                t = Bits32 (opcode, 15, 12);
+                uint32_t imm4H = Bits32 (opcode, 11, 8);
+                uint32_t imm4L = Bits32 (opcode, 3, 0);
+                imm32 = (imm4H << 4) & imm4L;
+                add = BitIsSet (opcode, 23);
+                  
+                // if t == 15 then UNPREDICTABLE;
+                if (t == 15)
+                    return false;
+                  
+                break;
+            }
+                  
+            default:
+                return false;
+        }
+                  
+        // base = Align(PC,4); 
+        uint64_t pc_value = ReadRegisterUnsigned (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_PC, LLDB_INVALID_ADDRESS, 
+                                                  &success);
+        if (!success)
+            return false;
+        uint64_t base = AlignPC (pc_value);
+
+        // address = if add then (base + imm32) else (base - imm32); 
+        addr_t address;
+        if (add)
+            address = base + imm32;
+        else
+            address = base - imm32;
+                  
+        // R[t] = SignExtend(MemU[address,1], 32);
+        Register base_reg;
+        base_reg.SetRegister (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_PC);
+            
+        EmulateInstruction::Context context;
+        context.type = eContextRegisterLoad;
+        context.SetRegisterPlusOffset (base_reg, address - base);
+                  
+        uint64_t unsigned_data = MemURead (context, address, 1, 0, &success);
+        if (!success)
+            return false;
+                  
+        int64_t signed_data = llvm::SignExtend64<8>(unsigned_data);
+        if (!WriteRegisterUnsigned (context, eRegisterKindDWARF, dwarf_r0 + t, (uint64_t) signed_data))
+            return false;
+    }
+    return true;
+}
+                  
 // Bitwise Exclusive OR (immediate) performs a bitwise exclusive OR of a register value and an immediate value,
 // and writes the result to the destination register.  It can optionally update the condition flags based on
 // the result.
@@ -7836,6 +7929,7 @@
         { 0x0e5f00f0, 0x005f00b0, ARMvAll,       eEncodingA1, eSize32, &EmulateInstructionARM::EmulateLDRHLiteral, "ldrh<c> <Rt>, <label>" },
         { 0x0e5000f0, 0x001000b0, ARMvAll,       eEncodingA1, eSize32, &EmulateInstructionARM::EmulateLDRHRegister, "ldrh<c> <Rt>,[<Rn>,+/-<Rm>]{!}"  }, 
         { 0x0e5000f0, 0x005000d0, ARMvAll,       eEncodingA1, eSize32, &EmulateInstructionARM::EmulateLDRSBImmediate, "ldrsb<c> <Rt>, [<Rn>{,#+/-<imm8>}]" },
+        { 0x0e5f00f0, 0x005f00d0, ARMvAll,       eEncodingA1, eSize32, &EmulateInstructionARM::EmulateLDRSBLiteral, "ldrsb<c> <Rt> <label>" },
                   
         //----------------------------------------------------------------------
         // Store instructions
@@ -8082,6 +8176,7 @@
         { 0xfff00fc0, 0xf8300000, ARMV6T2_ABOVE, eEncodingT2, eSize32, &EmulateInstructionARM::EmulateLDRHRegister, "ldrh<c>.w <Rt>,[<Rn>,<Rm>{,LSL #<imm2>}]" },
         { 0xfff00000, 0xf9900000, ARMV6T2_ABOVE, eEncodingT1, eSize32, &EmulateInstructionARM::EmulateLDRSBImmediate, "ldrsb<c> <Rt>,[<Rn>,#<imm12>]" },
         { 0xfff00800, 0xf9100800, ARMV6T2_ABOVE, eEncodingT2, eSize32, &EmulateInstructionARM::EmulateLDRSBImmediate, "ldrsb<c> <Rt>,[<Rn>,#+/-<imm8>]" },
+        { 0xff7f0000, 0xf91f0000, ARMV6T2_ABOVE, eEncodingT1, eSize32, &EmulateInstructionARM::EmulateLDRSBLiteral, "ldrsb<c> <Rt>, <label>" },
                   
         //----------------------------------------------------------------------
         // Store instructions



From johnny.chen at apple.com  Tue Mar  1 16:56:31 2011
From: johnny.chen at apple.com (Johnny Chen)
Date: Tue, 01 Mar 2011 22:56:31 -0000
Subject: [Lldb-commits] [lldb] r126792 - in /lldb/trunk:
 include/lldb/API/SBProcess.h source/API/SBProcess.cpp
 test/python_api/process/TestProcessAPI.py test/python_api/process/main.cpp
Message-ID: <20110301225631.DC0CF2A6C12C@llvm.org>

Author: johnny
Date: Tue Mar  1 16:56:31 2011
New Revision: 126792

URL: http://llvm.org/viewvc/llvm-project?rev=126792&view=rev
Log:
Add an API SBProcess::GetByteOrder() and add test cases which utilizes GetByteOrder(),
among other SBProcess APIs, to write (int)256 into a memory location of a global variable
(int)my_int and reads/checks the variable afterwards.

Modified:
    lldb/trunk/include/lldb/API/SBProcess.h
    lldb/trunk/source/API/SBProcess.cpp
    lldb/trunk/test/python_api/process/TestProcessAPI.py
    lldb/trunk/test/python_api/process/main.cpp

Modified: lldb/trunk/include/lldb/API/SBProcess.h
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/include/lldb/API/SBProcess.h?rev=126792&r1=126791&r2=126792&view=diff
==============================================================================
--- lldb/trunk/include/lldb/API/SBProcess.h (original)
+++ lldb/trunk/include/lldb/API/SBProcess.h Tue Mar  1 16:56:31 2011
@@ -53,6 +53,9 @@
     lldb::SBTarget
     GetTarget() const;
 
+    lldb::ByteOrder
+    GetByteOrder() const;
+
     size_t
     PutSTDIN (const char *src, size_t src_len);
 

Modified: lldb/trunk/source/API/SBProcess.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/API/SBProcess.cpp?rev=126792&r1=126791&r2=126792&view=diff
==============================================================================
--- lldb/trunk/source/API/SBProcess.cpp (original)
+++ lldb/trunk/source/API/SBProcess.cpp Tue Mar  1 16:56:31 2011
@@ -366,6 +366,20 @@
     return ret_val;
 }
 
+ByteOrder
+SBProcess::GetByteOrder () const
+{
+    ByteOrder byteOrder = eByteOrderInvalid;
+    if (m_opaque_sp)
+        byteOrder = m_opaque_sp->GetTarget().GetArchitecture().GetByteOrder();
+    
+    LogSP log(lldb_private::GetLogIfAllCategoriesSet (LIBLLDB_LOG_API));
+    if (log)
+        log->Printf ("SBProcess(%p)::GetByteOrder () => %d", m_opaque_sp.get(), byteOrder);
+
+    return byteOrder;
+}
+
 uint32_t
 SBProcess::GetAddressByteSize () const
 {

Modified: lldb/trunk/test/python_api/process/TestProcessAPI.py
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/test/python_api/process/TestProcessAPI.py?rev=126792&r1=126791&r2=126792&view=diff
==============================================================================
--- lldb/trunk/test/python_api/process/TestProcessAPI.py (original)
+++ lldb/trunk/test/python_api/process/TestProcessAPI.py Tue Mar  1 16:56:31 2011
@@ -37,6 +37,19 @@
         self.buildDwarf()
         self.write_memory()
 
+    @unittest2.skipUnless(sys.platform.startswith("darwin"), "requires Darwin")
+    @python_api_test
+    def test_access_my_int_with_dsym(self):
+        """Test access 'my_int' using Python SBProcess.GetByteOrder() and other APIs."""
+        self.buildDsym()
+        self.access_my_int()
+
+    @python_api_test
+    def test_access_my_int_with_dwarf(self):
+        """Test access 'my_int' using Python SBProcess.GetByteOrder() and other APIs."""
+        self.buildDwarf()
+        self.access_my_int()
+
     def setUp(self):
         # Call super's setUp().
         TestBase.setUp(self)
@@ -132,6 +145,83 @@
                     exe=False,
             startstr = 'a')
 
+    def access_my_int(self):
+        """Test access 'my_int' using Python SBProcess.GetByteOrder() and other APIs."""
+        exe = os.path.join(os.getcwd(), "a.out")
+        self.runCmd("file " + exe, CURRENT_EXECUTABLE_SET)
+
+        target = self.dbg.CreateTarget(exe)
+        self.assertTrue(target.IsValid(), VALID_TARGET)
+
+        breakpoint = target.BreakpointCreateByLocation("main.cpp", self.line)
+        self.assertTrue(breakpoint.IsValid(), VALID_BREAKPOINT)
+
+        # Launch the process, and do not stop at the entry point.
+        error = lldb.SBError()
+        self.process = target.Launch (self.dbg.GetListener(), None, None, os.ctermid(), os.ctermid(), os.ctermid(), None, 0, False, error)
+
+        thread = self.process.GetThreadAtIndex(0);
+        frame = thread.GetFrameAtIndex(0);
+
+        # Get the SBValue for the global variable 'my_int'.
+        val = frame.FindValue("my_int", lldb.eValueTypeVariableGlobal)
+        self.DebugSBValue(frame, val)
+
+        # If the variable does not have a load address, there's no sense continuing.
+        if not val.GetLocation(frame).startswith("0x"):
+            return
+
+        # OK, let's get the hex location of the variable.
+        location = int(val.GetLocation(frame), 16)
+
+        byteSize = val.GetByteSize()
+        byteOrder = self.process.GetByteOrder()
+        bytes = bytearray(byteSize)
+
+        if byteOrder == lldb.eByteOrderBig:
+            # 256 in big endian => 0x00000100
+            # the second byte counted from the end is to be 0b00000001
+            bytes[-2] = 0b00000001
+        elif byteOrder == lldb.eByteOrderLittle:
+            # 256 in little endian => 0x00010000
+            # the second byte counted from the start is to be 0b00000001
+            bytes[1] = 0b00000001
+        else:
+            # Neither big endian nor little endian?  Return for now.
+            return
+
+        # The program logic makes the 'my_int' variable to have int type and value of 0.
+        # But we want to use the WriteMemory() API to assign 256 to the variable.
+
+        # Now use WriteMemory() API to write 256 into the global variable.
+        new_value = str(bytes)
+        result = self.process.WriteMemory(location, new_value, error)
+        if not error.Success() or result != byteSize:
+            self.fail("SBProcess.WriteMemory() failed")
+
+        # Get the SBValue for the global variable 'my_int' again, with its updated value.
+        val = frame.FindValue("my_int", lldb.eValueTypeVariableGlobal)
+        self.expect(val.GetValue(frame),
+                    "SBProcess.ReadMemory() successfully writes (int)256 to the memory location for 'my_int'",
+                    exe=False,
+            startstr = '256')
+
+        # Now read the memory content.  The bytearray should have (byte)1 as the second element.
+        content = self.process.ReadMemory(location, byteSize, error)
+        if not error.Success():
+            self.fail("SBProcess.ReadMemory() failed")
+        new_bytes = bytearray(content, "ascii")
+        if byteOrder == lldb.eByteOrderBig:
+            if new_bytes[-2] != 0b00000001:
+                self.fail("Memory content read from 'my_int' does not match (int)256")
+        elif byteOrder == lldb.eByteOrderLittle:
+            if new_bytes[1] != 0b00000001:
+                self.fail("Memory content read from 'my_int' does not match (int)256")
+
+        # Dump the memory content....
+        for i in new_bytes:
+            print "byte:", i
+
 
 if __name__ == '__main__':
     import atexit

Modified: lldb/trunk/test/python_api/process/main.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/test/python_api/process/main.cpp?rev=126792&r1=126791&r2=126792&view=diff
==============================================================================
--- lldb/trunk/test/python_api/process/main.cpp (original)
+++ lldb/trunk/test/python_api/process/main.cpp Tue Mar  1 16:56:31 2011
@@ -11,6 +11,7 @@
 // This simple program is to test the lldb Python API related to process.
 
 char my_char = 'u';
+int my_int = 0;
 
 int main (int argc, char const *argv[])
 {
@@ -22,4 +23,5 @@
     printf("after the loop: my_char='%c'\n", my_char); // 'my_char' should print out as 'x'.
 
     return 0; // Set break point at this line and check variable 'my_char'.
+              // Use lldb Python API to set memory content for my_int and check the result.
 }



From ctice at apple.com  Tue Mar  1 17:55:59 2011
From: ctice at apple.com (Caroline Tice)
Date: Tue, 01 Mar 2011 23:55:59 -0000
Subject: [Lldb-commits] [lldb] r126802 -
 /lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
Message-ID: <20110301235559.AEF972A6C12C@llvm.org>

Author: ctice
Date: Tue Mar  1 17:55:59 2011
New Revision: 126802

URL: http://llvm.org/viewvc/llvm-project?rev=126802&view=rev
Log:

Add code to emulate LDRSB (register) Arm instruction.


Modified:
    lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp

Modified: lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp?rev=126802&r1=126801&r2=126802&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp (original)
+++ lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp Tue Mar  1 17:55:59 2011
@@ -6554,6 +6554,165 @@
     return true;
 }
                   
+// LDRSB (register) calculates an address from a base register value and an offset register value, loadsa byte from 
+// memory, sign-extends it to form a 32-bit word, and writes it to a register.  The offset register value can be 
+// shifted left by 0, 1, 2, or 3 bits.
+bool
+EmulateInstructionARM::EmulateLDRSBRegister (ARMEncoding encoding)
+{
+#if 0
+    if ConditionPassed() then 
+        EncodingSpecificOperations(); NullCheckIfThumbEE(n); 
+        offset = Shift(R[m], shift_t, shift_n, APSR.C); 
+        offset_addr = if add then (R[n] + offset) else (R[n] - offset); 
+        address = if index then offset_addr else R[n]; 
+        R[t] = SignExtend(MemU[address,1], 32); 
+        if wback then R[n] = offset_addr;
+#endif
+                  
+    bool success = false;
+    const uint32_t opcode = OpcodeAsUnsigned (&success);
+    if (!success)
+        return false;
+            
+    if (ConditionPassed ())
+    {
+        uint32_t t;
+        uint32_t n;
+        uint32_t m;
+        bool index;
+        bool add;
+        bool wback;
+        ARM_ShifterType shift_t;
+        uint32_t shift_n;
+                  
+        // EncodingSpecificOperations(); NullCheckIfThumbEE(n); 
+        switch (encoding)
+        {
+            case eEncodingT1:
+                // t = UInt(Rt); n = UInt(Rn); m = UInt(Rm); 
+                t = Bits32 (opcode, 2, 0);
+                n = Bits32 (opcode, 5, 3);
+                m = Bits32 (opcode, 8, 6);
+                  
+                // index = TRUE; add = TRUE; wback = FALSE; 
+                index = true;
+                add = true;
+                wback = false;
+                  
+                // (shift_t, shift_n) = (SRType_LSL, 0);
+                shift_t = SRType_LSL;
+                shift_n = 0;
+                  
+                break;
+                  
+            case eEncodingT2:
+                // if Rt == ???1111??? then SEE PLI; 
+                // if Rn == ???1111??? then SEE LDRSB (literal); 
+                // t = UInt(Rt); n = UInt(Rn); m = UInt(Rm); 
+                t = Bits32 (opcode, 15, 12);
+                n = Bits32 (opcode, 19, 16);
+                m = Bits32 (opcode, 3, 0);
+                  
+                // index = TRUE; add = TRUE; wback = FALSE; 
+                index = true;
+                add = true;
+                wback = false;
+                  
+                // (shift_t, shift_n) = (SRType_LSL, UInt(imm2)); 
+                shift_t = SRType_LSL;
+                shift_n = Bits32 (opcode, 5, 4);
+                  
+                // if t == 13 || BadReg(m) then UNPREDICTABLE;
+                if ((t == 13) || BadReg (m))
+                    return false;
+                break;
+                  
+            case eEncodingA1:
+                // if P == ???0??? && W == ???1??? then SEE LDRSBT; 
+                // t = UInt(Rt); n = UInt(Rn); m = UInt(Rm); 
+                t = Bits32 (opcode, 15, 12);
+                n = Bits32 (opcode, 19, 16);
+                m = Bits32 (opcode, 3, 0);
+                  
+                // index = (P == ???1???);	add = (U == ???1???);	wback = (P == ???0???) || (W == ???1???); 
+                index = BitIsSet (opcode, 24);
+                add = BitIsSet (opcode, 23);
+                wback = BitIsClear (opcode, 24) || BitIsSet (opcode, 21);
+                  
+                // (shift_t, shift_n) = (SRType_LSL, 0); 
+                shift_t = SRType_LSL;
+                shift_n = 0;
+                  
+                // if t == 15 || m == 15 then UNPREDICTABLE; 
+                if ((t == 15) || (m == 15))
+                    return false;
+                  
+                // if wback && (n == 15 || n == t) then UNPREDICTABLE;
+                if (wback && ((n == 15) || (n == t)))
+                    return false;
+                break;
+                  
+            default:
+                return false;
+        }
+                  
+        uint64_t Rm =  ReadRegisterUnsigned (eRegisterKindDWARF, dwarf_r0 + m, 0, &success);
+        if (!success)
+            return false;
+                  
+        // offset = Shift(R[m], shift_t, shift_n, APSR.C); 
+        addr_t offset = Shift (Rm, shift_t, shift_n, APSR_C);
+            
+        addr_t offset_addr;
+        addr_t address;
+                  
+        // offset_addr = if add then (R[n] + offset) else (R[n] - offset); 
+        uint64_t Rn = ReadRegisterUnsigned (eRegisterKindDWARF, dwarf_r0 + n, 0, &success);
+        if (!success)
+            return false;
+                  
+        if (add)
+            offset_addr = Rn + offset;
+        else
+            offset_addr = Rn - offset;
+                  
+        // address = if index then offset_addr else R[n]; 
+        if (index)
+            address = offset_addr;
+        else
+            address = Rn;
+                  
+        // R[t] = SignExtend(MemU[address,1], 32); 
+        Register base_reg;
+        base_reg.SetRegister (eRegisterKindDWARF, dwarf_r0 + n);
+        Register offset_reg;
+        offset_reg.SetRegister (eRegisterKindDWARF, dwarf_r0 + m);          
+                  
+        EmulateInstruction::Context context;
+        context.type = eContextRegisterLoad;
+        context.SetRegisterPlusIndirectOffset (base_reg, offset_reg);
+                  
+        uint64_t unsigned_data = MemURead (context, address, 1, 0, &success);
+        if (!success)
+            return false;
+                  
+        int64_t signed_data = llvm::SignExtend64<8>(unsigned_data);
+        if (!WriteRegisterUnsigned (context, eRegisterKindDWARF, dwarf_r0 + t, (uint64_t) signed_data))
+            return false;
+                  
+        // if wback then R[n] = offset_addr;
+        if (wback)
+        {
+            context.type = eContextAdjustBaseRegister;
+            context.SetAddress (offset_addr);
+            if (!WriteRegisterUnsigned (context, eRegisterKindDWARF, dwarf_r0 + n, offset_addr))
+                return false;
+        }
+    }
+    return true;
+}
+                  
 // Bitwise Exclusive OR (immediate) performs a bitwise exclusive OR of a register value and an immediate value,
 // and writes the result to the destination register.  It can optionally update the condition flags based on
 // the result.
@@ -7930,6 +8089,7 @@
         { 0x0e5000f0, 0x001000b0, ARMvAll,       eEncodingA1, eSize32, &EmulateInstructionARM::EmulateLDRHRegister, "ldrh<c> <Rt>,[<Rn>,+/-<Rm>]{!}"  }, 
         { 0x0e5000f0, 0x005000d0, ARMvAll,       eEncodingA1, eSize32, &EmulateInstructionARM::EmulateLDRSBImmediate, "ldrsb<c> <Rt>, [<Rn>{,#+/-<imm8>}]" },
         { 0x0e5f00f0, 0x005f00d0, ARMvAll,       eEncodingA1, eSize32, &EmulateInstructionARM::EmulateLDRSBLiteral, "ldrsb<c> <Rt> <label>" },
+        { 0x0e5000f0, 0x001000d0, ARMvAll,       eEncodingA1, eSize32, &EmulateInstructionARM::EmulateLDRSBRegister, "ldrsb<c> <Rt>,[<Rn>,+/-<Rm>]{!}" },
                   
         //----------------------------------------------------------------------
         // Store instructions
@@ -8177,6 +8337,8 @@
         { 0xfff00000, 0xf9900000, ARMV6T2_ABOVE, eEncodingT1, eSize32, &EmulateInstructionARM::EmulateLDRSBImmediate, "ldrsb<c> <Rt>,[<Rn>,#<imm12>]" },
         { 0xfff00800, 0xf9100800, ARMV6T2_ABOVE, eEncodingT2, eSize32, &EmulateInstructionARM::EmulateLDRSBImmediate, "ldrsb<c> <Rt>,[<Rn>,#+/-<imm8>]" },
         { 0xff7f0000, 0xf91f0000, ARMV6T2_ABOVE, eEncodingT1, eSize32, &EmulateInstructionARM::EmulateLDRSBLiteral, "ldrsb<c> <Rt>, <label>" },
+        { 0xfffffe00, 0x00005600, ARMV4T_ABOVE,  eEncodingT1, eSize16, &EmulateInstructionARM::EmulateLDRSBRegister, "ldrsb<c> <Rt>,[<Rn>,<Rm>]" },
+        { 0xfff00fc0, 0xf9100000, ARMV6T2_ABOVE, eEncodingT2, eSize32, &EmulateInstructionARM::EmulateLDRSBRegister, "ldrsb<c>.w <Rt>,[<Rn>,<Rm>{,LSL #imm2>}]"  },
                   
         //----------------------------------------------------------------------
         // Store instructions



From ctice at apple.com  Tue Mar  1 18:39:42 2011
From: ctice at apple.com (Caroline Tice)
Date: Wed, 02 Mar 2011 00:39:42 -0000
Subject: [Lldb-commits] [lldb] r126807 -
 /lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
Message-ID: <20110302003942.6311F2A6C12C@llvm.org>

Author: ctice
Date: Tue Mar  1 18:39:42 2011
New Revision: 126807

URL: http://llvm.org/viewvc/llvm-project?rev=126807&view=rev
Log:

Add code to emulate LDRSH (immediate) Arm instruction.


Modified:
    lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp

Modified: lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp?rev=126807&r1=126806&r2=126807&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp (original)
+++ lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp Tue Mar  1 18:39:42 2011
@@ -6713,6 +6713,170 @@
     return true;
 }
                   
+// LDRSH (immediate) calculates an address from a base register value and an immediate offset, loads a halfword from 
+// memory, sign-extends it to form a 32-bit word, and writes it to a register.  It can use offset, post-indexed, or 
+// pre-indexed addressing.
+bool
+EmulateInstructionARM::EmulateLDRSHImmediate (ARMEncoding encoding)
+{
+#if 0
+    if ConditionPassed() then 
+        EncodingSpecificOperations(); NullCheckIfThumbEE(n); 
+        offset_addr = if add then (R[n] + imm32) else (R[n] - imm32); 
+        address = if index then offset_addr else R[n]; 
+        data = MemU[address,2]; 
+        if wback then R[n] = offset_addr; 
+        if UnalignedSupport() || address<0> = ???0??? then
+            R[t] = SignExtend(data, 32); 
+        else // Can only apply before ARMv7
+            R[t] = bits(32) UNKNOWN;
+#endif
+
+    bool success = false;
+    const uint32_t opcode = OpcodeAsUnsigned (&success);
+    if (!success)
+        return false;
+                  
+    if (ConditionPassed())
+    {
+        uint32_t t;
+        uint32_t n;
+        uint32_t imm32;
+        bool index;
+        bool add;
+        bool wback;
+                  
+        // EncodingSpecificOperations(); NullCheckIfThumbEE(n); 
+        switch (encoding)
+        {
+            case eEncodingT1:
+                // if Rn == ???1111??? then SEE LDRSH (literal); 
+                // if Rt == ???1111??? then SEE "Unallocated memory hints"; 
+                // t = UInt(Rt); n = UInt(Rn); imm32 = ZeroExtend(imm12, 32); 
+                t = Bits32 (opcode, 15, 12);
+                n = Bits32 (opcode, 19, 16);
+                imm32 = Bits32 (opcode, 11, 0);
+                  
+                // index = TRUE; add = TRUE; wback = FALSE; 
+                index = true;
+                add = true;
+                wback = false;
+                  
+                // if t == 13 then UNPREDICTABLE;
+                if (t == 13)
+                    return false;
+                  
+                break;
+                  
+            case eEncodingT2:
+                // if Rn == ???1111??? then SEE LDRSH (literal); 
+                // if Rt == ???1111??? && P == ???1??? && U == ???0??? && W == ???0??? then SEE "Unallocated memory hints"; 
+                // if P == ???1??? && U == ???1??? && W == ???0??? then SEE LDRSHT; 
+                // if P == ???0??? && W == ???0??? then UNDEFINED; 
+                  if (BitIsClear (opcode, 10) && BitIsClear (opcode, 8))
+                  return false;
+                  
+                // t = UInt(Rt); n = UInt(Rn); imm32 = ZeroExtend(imm8, 32); 
+                t = Bits32 (opcode, 15, 12);
+                n = Bits32 (opcode, 19, 16);
+                imm32 = Bits32 (opcode, 7, 0);
+                  
+                // index = (P == ???1???); add = (U == ???1???); wback = (W == ???1???); 
+                index = BitIsSet (opcode, 10);
+                add = BitIsSet (opcode, 9);
+                wback = BitIsSet (opcode, 8);
+                  
+                // if BadReg(t) || (wback && n == t) then UNPREDICTABLE;
+                if (BadReg (t) || (wback && (n == t)))
+                    return false;
+                  
+                break;
+                  
+            case eEncodingA1:
+            {
+                // if Rn == ???1111??? then SEE LDRSH (literal); 
+                // if P == ???0??? && W == ???1??? then SEE LDRSHT; 
+                // t == UInt(Rt); n = UInt(Rn); imm32 = ZeroExtend(imm4H:imm4L, 32); 
+                t = Bits32 (opcode, 15, 12);
+                n = Bits32 (opcode, 19, 16);
+                uint32_t imm4H = Bits32 (opcode, 11,8);
+                uint32_t imm4L = Bits32 (opcode, 3, 0);
+                imm32 = (imm4H << 4) & imm4L;
+                  
+                // index = (P == ???1???);	add = (U == ???1???);	wback = (P == ???0???) || (W == ???1???); 
+                index = BitIsSet (opcode, 24);
+                add = BitIsSet (opcode, 23);
+                wback = BitIsClear (opcode, 24) || BitIsSet (opcode, 21);
+                  
+                // if t == 15 || (wback && n == t) then UNPREDICTABLE;
+                if ((t == 15) || (wback && (n == t)))
+                    return false;
+                  
+                break;
+            }      
+                  
+            default:
+                return false;
+        }
+                  
+        // offset_addr = if add then (R[n] + imm32) else (R[n] - imm32); 
+        uint64_t Rn = ReadRegisterUnsigned (eRegisterKindDWARF, dwarf_r0 + n, 0, &success);
+        if (!success)
+            return false;
+                  
+        addr_t offset_addr;
+        if (add)
+            offset_addr = Rn + imm32;
+        else
+            offset_addr = Rn - imm32;
+                  
+        // address = if index then offset_addr else R[n]; 
+        addr_t address;
+        if (index)
+            address = offset_addr;
+        else
+            address = Rn;
+                  
+        // data = MemU[address,2]; 
+        Register base_reg;
+        base_reg.SetRegister (eRegisterKindDWARF, dwarf_r0 + n);
+                  
+        EmulateInstruction::Context context;
+        context.type = eContextRegisterLoad;
+        context.SetRegisterPlusOffset (base_reg, address - Rn);
+                  
+        uint64_t data = MemURead (context, address, 2, 0, &success);
+        if (!success)
+            return false;
+                  
+        // if wback then R[n] = offset_addr; 
+        if (wback)
+        {
+            context.type = eContextAdjustBaseRegister;
+            context.SetAddress (offset_addr);
+            if (!WriteRegisterUnsigned (context, eRegisterKindDWARF, dwarf_r0 + n, offset_addr))
+                return false;
+        }
+                  
+        // if UnalignedSupport() || address<0> = ???0??? then
+        if (UnalignedSupport() || BitIsClear (address, 0))
+        {
+            // R[t] = SignExtend(data, 32); 
+            int64_t signed_data = llvm::SignExtend64<16>(data);
+            context.type = eContextRegisterLoad;
+            context.SetRegisterPlusOffset (base_reg, address - Rn);
+            if (!WriteRegisterUnsigned (context, eRegisterKindDWARF, dwarf_r0 + t, (uint64_t) signed_data))
+                return false;
+        }
+        else // Can only apply before ARMv7
+        {
+            // R[t] = bits(32) UNKNOWN;
+            WriteBits32Unknown (t);
+        }
+    }
+    return true;
+}
+                  
 // Bitwise Exclusive OR (immediate) performs a bitwise exclusive OR of a register value and an immediate value,
 // and writes the result to the destination register.  It can optionally update the condition flags based on
 // the result.
@@ -8090,6 +8254,7 @@
         { 0x0e5000f0, 0x005000d0, ARMvAll,       eEncodingA1, eSize32, &EmulateInstructionARM::EmulateLDRSBImmediate, "ldrsb<c> <Rt>, [<Rn>{,#+/-<imm8>}]" },
         { 0x0e5f00f0, 0x005f00d0, ARMvAll,       eEncodingA1, eSize32, &EmulateInstructionARM::EmulateLDRSBLiteral, "ldrsb<c> <Rt> <label>" },
         { 0x0e5000f0, 0x001000d0, ARMvAll,       eEncodingA1, eSize32, &EmulateInstructionARM::EmulateLDRSBRegister, "ldrsb<c> <Rt>,[<Rn>,+/-<Rm>]{!}" },
+        { 0x0e5000f0, 0x005000f0, ARMvAll,       eEncodingA1, eSize32, &EmulateInstructionARM::EmulateLDRSHImmediate, "ldrsh<c> <Rt>,[<Rn>{,#+/-<imm8>}]"},
                   
         //----------------------------------------------------------------------
         // Store instructions
@@ -8339,6 +8504,8 @@
         { 0xff7f0000, 0xf91f0000, ARMV6T2_ABOVE, eEncodingT1, eSize32, &EmulateInstructionARM::EmulateLDRSBLiteral, "ldrsb<c> <Rt>, <label>" },
         { 0xfffffe00, 0x00005600, ARMV4T_ABOVE,  eEncodingT1, eSize16, &EmulateInstructionARM::EmulateLDRSBRegister, "ldrsb<c> <Rt>,[<Rn>,<Rm>]" },
         { 0xfff00fc0, 0xf9100000, ARMV6T2_ABOVE, eEncodingT2, eSize32, &EmulateInstructionARM::EmulateLDRSBRegister, "ldrsb<c>.w <Rt>,[<Rn>,<Rm>{,LSL #imm2>}]"  },
+        { 0xfff00000, 0xf9b00000, ARMV6T2_ABOVE, eEncodingT1, eSize32, &EmulateInstructionARM::EmulateLDRSHImmediate, "ldrsh<c> <Rt>,[<Rn>,#<imm12>]" },
+        { 0xfff00800, 0xf9300800, ARMV6T2_ABOVE, eEncodingT2, eSize32, &EmulateInstructionARM::EmulateLDRSHImmediate, "ldrsh<c> <Rt>,[<Rn>,#+/-<imm8>]" },
                   
         //----------------------------------------------------------------------
         // Store instructions



From johnny.chen at apple.com  Tue Mar  1 19:36:45 2011
From: johnny.chen at apple.com (Johnny Chen)
Date: Wed, 02 Mar 2011 01:36:45 -0000
Subject: [Lldb-commits] [lldb] r126813 - in /lldb/trunk/test: lldbutil.py
 python_api/process/TestProcessAPI.py
Message-ID: <20110302013645.E5A912A6C12D@llvm.org>

Author: johnny
Date: Tue Mar  1 19:36:45 2011
New Revision: 126813

URL: http://llvm.org/viewvc/llvm-project?rev=126813&view=rev
Log:
Add two utility functions to lldbutil.py:

o int_to_bytearray()
o bytearray_to_int()

They return/interpret the bytearray in the little endian format.
For big endian, simply perform ba.reverse() on the bytearray object.

And modify TestProcessAPI.py to take advantage of the functions.

Modified:
    lldb/trunk/test/lldbutil.py
    lldb/trunk/test/python_api/process/TestProcessAPI.py

Modified: lldb/trunk/test/lldbutil.py
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/test/lldbutil.py?rev=126813&r1=126812&r2=126813&view=diff
==============================================================================
--- lldb/trunk/test/lldbutil.py (original)
+++ lldb/trunk/test/lldbutil.py Tue Mar  1 19:36:45 2011
@@ -6,6 +6,63 @@
 import sys
 import StringIO
 
+# ==========================================================
+# Integer (byte size 1, 2, 4, and 8) to bytearray conversion
+# ==========================================================
+
+def int_to_bytearray(val, bytesize):
+    """Utility function to convert an integer into a bytearray.
+
+    It returns the bytearray in the little endian format.
+    It is easy to get the big endian representation, just do
+    ba.reverse() on the returned bytearray object.
+    """
+    from struct import *
+
+    if bytesize == 1:
+        return bytearray([val])
+
+    # Little endian followed by a format character.
+    template = "<%c"
+    if bytesize == 2:
+        fmt = template % 'h'
+    elif bytesize == 4:
+        fmt = template % 'i'
+    elif bytesize == 4:
+        fmt = template % 'q'
+    else:
+        return None
+
+    packed = pack(fmt, val)
+    return bytearray(map(ord, packed))
+
+def bytearray_to_int(bytes, bytesize):
+    """Utility function to convert a bytearray into an integer.
+
+    It interprets the bytearray in the little endian format.
+    It is easy to get the big endian representation, just do
+    ba.reverse() on the bytearray object before passing it in.
+    """
+    from struct import *
+
+    if bytesize == 1:
+        return ba[0]
+
+    # Little endian followed by a format character.
+    template = "<%c"
+    if bytesize == 2:
+        fmt = template % 'h'
+    elif bytesize == 4:
+        fmt = template % 'i'
+    elif bytesize == 4:
+        fmt = template % 'q'
+    else:
+        return None
+
+    unpacked = unpack(fmt, str(bytes))
+    return unpacked[0]
+
+
 # ===========================================
 # Iterator for lldb aggregate data structures
 # ===========================================

Modified: lldb/trunk/test/python_api/process/TestProcessAPI.py
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/test/python_api/process/TestProcessAPI.py?rev=126813&r1=126812&r2=126813&view=diff
==============================================================================
--- lldb/trunk/test/python_api/process/TestProcessAPI.py (original)
+++ lldb/trunk/test/python_api/process/TestProcessAPI.py Tue Mar  1 19:36:45 2011
@@ -174,20 +174,18 @@
         # OK, let's get the hex location of the variable.
         location = int(val.GetLocation(frame), 16)
 
+        from lldbutil import int_to_bytearray, bytearray_to_int
         byteSize = val.GetByteSize()
-        byteOrder = self.process.GetByteOrder()
-        bytes = bytearray(byteSize)
+        bytes = int_to_bytearray(256, byteSize)
 
+        byteOrder = self.process.GetByteOrder()
         if byteOrder == lldb.eByteOrderBig:
-            # 256 in big endian => 0x00000100
-            # the second byte counted from the end is to be 0b00000001
-            bytes[-2] = 0b00000001
+            bytes.reverse()
         elif byteOrder == lldb.eByteOrderLittle:
-            # 256 in little endian => 0x00010000
-            # the second byte counted from the start is to be 0b00000001
-            bytes[1] = 0b00000001
+            pass
         else:
             # Neither big endian nor little endian?  Return for now.
+            # Add more logic here if we want to handle other types.
             return
 
         # The program logic makes the 'my_int' variable to have int type and value of 0.
@@ -211,12 +209,14 @@
         if not error.Success():
             self.fail("SBProcess.ReadMemory() failed")
         new_bytes = bytearray(content, "ascii")
+
+        # The bytearray_to_int utility function expects a little endian bytearray.
         if byteOrder == lldb.eByteOrderBig:
-            if new_bytes[-2] != 0b00000001:
-                self.fail("Memory content read from 'my_int' does not match (int)256")
-        elif byteOrder == lldb.eByteOrderLittle:
-            if new_bytes[1] != 0b00000001:
-                self.fail("Memory content read from 'my_int' does not match (int)256")
+            new_bytes.reverse()
+
+        new_value = bytearray_to_int(new_bytes, byteSize)
+        if new_value != 256:
+            self.fail("Memory content read from 'my_int' does not match (int)256")
 
         # Dump the memory content....
         for i in new_bytes:



From ctice at apple.com  Wed Mar  2 13:45:34 2011
From: ctice at apple.com (Caroline Tice)
Date: Wed, 02 Mar 2011 19:45:34 -0000
Subject: [Lldb-commits] [lldb] r126866 -
 /lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
Message-ID: <20110302194535.184D72A6C12C@llvm.org>

Author: ctice
Date: Wed Mar  2 13:45:34 2011
New Revision: 126866

URL: http://llvm.org/viewvc/llvm-project?rev=126866&view=rev
Log:

Add code to emulate LDRSH (literal) Arm instruction.


Modified:
    lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp

Modified: lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp?rev=126866&r1=126865&r2=126866&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp (original)
+++ lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp Wed Mar  2 13:45:34 2011
@@ -6877,6 +6877,112 @@
     return true;
 }
                   
+// LDRSH (literal) calculates an address from the PC value and an immediate offset, loads a halfword from memory, 
+// sign-extends it to from a 32-bit word, and writes it to a register.
+bool
+EmulateInstructionARM::EmulateLDRSHLiteral (ARMEncoding encoding)
+{
+#if 0
+    if ConditionPassed() then 
+        EncodingSpecificOperations(); NullCheckIfThumbEE(15); 
+        base = Align(PC,4); 
+        address = if add then (base + imm32) else (base - imm32); 
+        data = MemU[address,2]; 
+        if UnalignedSupport() || address<0> = ???0??? then
+            R[t] = SignExtend(data, 32);
+        else // Can only apply before ARMv7
+            R[t] = bits(32) UNKNOWN;
+#endif
+                  
+    bool success = false;
+    const uint32_t opcode = OpcodeAsUnsigned (&success);
+    if (!success)
+        return false;
+                  
+    if (ConditionPassed())
+    {
+        uint32_t t;
+        uint32_t imm32;
+        bool add;
+                  
+        // EncodingSpecificOperations(); NullCheckIfThumbEE(15); 
+        switch (encoding)
+        {
+            case eEncodingT1:
+                // if Rt == ???1111??? then SEE "Unallocated memory hints"; 
+                // t = UInt(Rt); imm32 = ZeroExtend(imm12, 32); add = (U == ???1???); 
+                t = Bits32  (opcode, 15, 12);
+                imm32 = Bits32 (opcode, 11, 0);
+                add = BitIsSet (opcode, 23);
+                  
+                // if t == 13 then UNPREDICTABLE;
+                if (t == 13)
+                    return false;
+                  
+                break;
+                  
+            case eEncodingA1:
+            {
+                // t == UInt(Rt); imm32 = ZeroExtend(imm4H:imm4L, 32); add = (U == ???1???); 
+                t = Bits32 (opcode, 15, 12);
+                uint32_t imm4H = Bits32 (opcode, 11, 8);
+                uint32_t imm4L = Bits32 (opcode, 3, 0);
+                imm32 = (imm4H << 4) & imm4L;
+                add = BitIsSet (opcode, 23);
+                  
+                // if t == 15 then UNPREDICTABLE;
+                if (t == 15)
+                    return false;
+                  
+                break;
+            }      
+            default:
+                return false;
+        }
+            
+        // base = Align(PC,4); 
+        uint64_t pc_value = ReadRegisterUnsigned (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_PC, 0, &success);
+        if (!success)
+            return false;
+                  
+        uint64_t base = AlignPC (pc_value);
+        
+        addr_t address;
+        // address = if add then (base + imm32) else (base - imm32); 
+        if (add)
+            address = base + imm32;
+        else
+            address = base - imm32;
+                  
+        // data = MemU[address,2]; 
+        Register base_reg;
+        base_reg.SetRegister (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_PC);
+                  
+        EmulateInstruction::Context context;
+        context.type = eContextRegisterLoad;
+        context.SetRegisterPlusOffset (base_reg, imm32);
+                  
+        uint64_t data = MemURead (context, address, 2, 0, &success);
+        if (!success)
+            return false;
+                  
+        // if UnalignedSupport() || address<0> = ???0??? then
+        if (UnalignedSupport() || BitIsClear (address, 0))
+        {
+            // R[t] = SignExtend(data, 32);
+            int64_t signed_data = llvm::SignExtend64<16>(data);
+            if (!WriteRegisterUnsigned (context, eRegisterKindDWARF, dwarf_r0 + t, (uint64_t) signed_data))
+                return false;
+        }
+        else // Can only apply before ARMv7
+        {
+            // R[t] = bits(32) UNKNOWN;
+            WriteBits32Unknown (t);
+        }
+    }
+    return true;
+}
+                  
 // Bitwise Exclusive OR (immediate) performs a bitwise exclusive OR of a register value and an immediate value,
 // and writes the result to the destination register.  It can optionally update the condition flags based on
 // the result.
@@ -8255,6 +8361,7 @@
         { 0x0e5f00f0, 0x005f00d0, ARMvAll,       eEncodingA1, eSize32, &EmulateInstructionARM::EmulateLDRSBLiteral, "ldrsb<c> <Rt> <label>" },
         { 0x0e5000f0, 0x001000d0, ARMvAll,       eEncodingA1, eSize32, &EmulateInstructionARM::EmulateLDRSBRegister, "ldrsb<c> <Rt>,[<Rn>,+/-<Rm>]{!}" },
         { 0x0e5000f0, 0x005000f0, ARMvAll,       eEncodingA1, eSize32, &EmulateInstructionARM::EmulateLDRSHImmediate, "ldrsh<c> <Rt>,[<Rn>{,#+/-<imm8>}]"},
+        {  0x0e5f00f0, 0x005f00f0, ARMvAll,      eEncodingA1, eSize32, &EmulateInstructionARM::EmulateLDRSHLiteral, "ldrsh<c> <Rt>,<label>" },
                   
         //----------------------------------------------------------------------
         // Store instructions
@@ -8506,6 +8613,7 @@
         { 0xfff00fc0, 0xf9100000, ARMV6T2_ABOVE, eEncodingT2, eSize32, &EmulateInstructionARM::EmulateLDRSBRegister, "ldrsb<c>.w <Rt>,[<Rn>,<Rm>{,LSL #imm2>}]"  },
         { 0xfff00000, 0xf9b00000, ARMV6T2_ABOVE, eEncodingT1, eSize32, &EmulateInstructionARM::EmulateLDRSHImmediate, "ldrsh<c> <Rt>,[<Rn>,#<imm12>]" },
         { 0xfff00800, 0xf9300800, ARMV6T2_ABOVE, eEncodingT2, eSize32, &EmulateInstructionARM::EmulateLDRSHImmediate, "ldrsh<c> <Rt>,[<Rn>,#+/-<imm8>]" },
+        { 0xff7f0000, 0xf93f0000, ARMV6T2_ABOVE, eEncodingT1, eSize32, &EmulateInstructionARM::EmulateLDRSHLiteral, "ldrsh<c> <Rt>,<label>" },
                   
         //----------------------------------------------------------------------
         // Store instructions



From johnny.chen at apple.com  Wed Mar  2 13:49:27 2011
From: johnny.chen at apple.com (Johnny Chen)
Date: Wed, 02 Mar 2011 19:49:27 -0000
Subject: [Lldb-commits] [lldb] r126867 -
	/lldb/trunk/test/python_api/process/TestProcessAPI.py
Message-ID: <20110302194927.E4C1D2A6C12C@llvm.org>

Author: johnny
Date: Wed Mar  2 13:49:27 2011
New Revision: 126867

URL: http://llvm.org/viewvc/llvm-project?rev=126867&view=rev
Log:
Add some comments.

Modified:
    lldb/trunk/test/python_api/process/TestProcessAPI.py

Modified: lldb/trunk/test/python_api/process/TestProcessAPI.py
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/test/python_api/process/TestProcessAPI.py?rev=126867&r1=126866&r2=126867&view=diff
==============================================================================
--- lldb/trunk/test/python_api/process/TestProcessAPI.py (original)
+++ lldb/trunk/test/python_api/process/TestProcessAPI.py Wed Mar  2 13:49:27 2011
@@ -174,7 +174,9 @@
         # OK, let's get the hex location of the variable.
         location = int(val.GetLocation(frame), 16)
 
+        # Note that the canonical from of the bytearray is little endian.
         from lldbutil import int_to_bytearray, bytearray_to_int
+
         byteSize = val.GetByteSize()
         bytes = int_to_bytearray(256, byteSize)
 
@@ -208,6 +210,8 @@
         content = self.process.ReadMemory(location, byteSize, error)
         if not error.Success():
             self.fail("SBProcess.ReadMemory() failed")
+
+        # Use "ascii" as the encoding because each element of 'content' is in the range [0..255].
         new_bytes = bytearray(content, "ascii")
 
         # The bytearray_to_int utility function expects a little endian bytearray.



From jingham at apple.com  Wed Mar  2 13:58:15 2011
From: jingham at apple.com (Jim Ingham)
Date: Wed, 02 Mar 2011 19:58:15 -0000
Subject: [Lldb-commits] [lldb] r126868 -
	/lldb/trunk/include/lldb/Target/Process.h
Message-ID: <20110302195815.BE0D22A6C12C@llvm.org>

Author: jingham
Date: Wed Mar  2 13:58:15 2011
New Revision: 126868

URL: http://llvm.org/viewvc/llvm-project?rev=126868&view=rev
Log:
Add some function docs.

Modified:
    lldb/trunk/include/lldb/Target/Process.h

Modified: lldb/trunk/include/lldb/Target/Process.h
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/include/lldb/Target/Process.h?rev=126868&r1=126867&r2=126868&view=diff
==============================================================================
--- lldb/trunk/include/lldb/Target/Process.h (original)
+++ lldb/trunk/include/lldb/Target/Process.h Wed Mar  2 13:58:15 2011
@@ -1790,12 +1790,30 @@
         m_dynamic_checkers_ap.reset(dynamic_checkers);
     }
 
+    //------------------------------------------------------------------
+    /// Call this to set the lldb in the mode where it breaks on new thread
+    /// creations, and then auto-restarts.  This is useful when you are trying
+    /// to run only one thread, but either that thread or the kernel is creating
+    /// new threads in the process.  If you stop when the thread is created, you
+    /// can immediately suspend it, and keep executing only the one thread you intend.
+    ///
+    /// @return
+    ///     Returns \b true if we were able to start up the notification
+    ///     \b false otherwise.
+    //------------------------------------------------------------------
     virtual bool
     StartNoticingNewThreads()
     {   
         return true;
     }
     
+    //------------------------------------------------------------------
+    /// Call this to turn off the stop & notice new threads mode.
+    ///
+    /// @return
+    ///     Returns \b true if we were able to start up the notification
+    ///     \b false otherwise.
+    //------------------------------------------------------------------
     virtual bool
     StopNoticingNewThreads()
     {   



From johnny.chen at apple.com  Wed Mar  2 14:54:22 2011
From: johnny.chen at apple.com (Johnny Chen)
Date: Wed, 02 Mar 2011 20:54:22 -0000
Subject: [Lldb-commits] [lldb] r126877 - /lldb/trunk/test/lldbutil.py
Message-ID: <20110302205422.2E5E42A6C12C@llvm.org>

Author: johnny
Date: Wed Mar  2 14:54:22 2011
New Revision: 126877

URL: http://llvm.org/viewvc/llvm-project?rev=126877&view=rev
Log:
Clarified the docstrings for int_to_bytearray() and bytearray_to_int().

Modified:
    lldb/trunk/test/lldbutil.py

Modified: lldb/trunk/test/lldbutil.py
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/test/lldbutil.py?rev=126877&r1=126876&r2=126877&view=diff
==============================================================================
--- lldb/trunk/test/lldbutil.py (original)
+++ lldb/trunk/test/lldbutil.py Wed Mar  2 14:54:22 2011
@@ -13,9 +13,8 @@
 def int_to_bytearray(val, bytesize):
     """Utility function to convert an integer into a bytearray.
 
-    It returns the bytearray in the little endian format.
-    It is easy to get the big endian representation, just do
-    ba.reverse() on the returned bytearray object.
+    It returns the bytearray in the little endian format.  It is easy to get the
+    big endian format, just do ba.reverse() on the returned object.
     """
     from struct import *
 
@@ -39,9 +38,8 @@
 def bytearray_to_int(bytes, bytesize):
     """Utility function to convert a bytearray into an integer.
 
-    It interprets the bytearray in the little endian format.
-    It is easy to get the big endian representation, just do
-    ba.reverse() on the bytearray object before passing it in.
+    It interprets the bytearray in the little endian format. For a big endian
+    bytearray, just do ba.reverse() on the object before passing it in.
     """
     from struct import *
 



From ctice at apple.com  Wed Mar  2 15:13:44 2011
From: ctice at apple.com (Caroline Tice)
Date: Wed, 02 Mar 2011 21:13:44 -0000
Subject: [Lldb-commits] [lldb] r126881 -
 /lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
Message-ID: <20110302211344.657BB2A6C12C@llvm.org>

Author: ctice
Date: Wed Mar  2 15:13:44 2011
New Revision: 126881

URL: http://llvm.org/viewvc/llvm-project?rev=126881&view=rev
Log:

Add code to emulate LDRSH (register) Arm instruction.


Modified:
    lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp

Modified: lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp?rev=126881&r1=126880&r2=126881&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp (original)
+++ lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp Wed Mar  2 15:13:44 2011
@@ -6983,6 +6983,186 @@
     return true;
 }
                   
+// LDRSH (register) calculates an address from a base register value and an offset register value, loads a halfword
+// from memory, sign-extends it to form a 32-bit word, and writes it to a register.  The offset register value can be 
+// shifted left by 0, 1, 2, or 3 bits.
+bool
+EmulateInstructionARM::EmulateLDRSHRegister (ARMEncoding encoding)
+{
+#if 0
+    if ConditionPassed() then 
+        EncodingSpecificOperations(); NullCheckIfThumbEE(n); 
+        offset = Shift(R[m], shift_t, shift_n, APSR.C); 
+        offset_addr = if add then (R[n] + offset) else (R[n] - offset); 
+        address = if index then offset_addr else R[n]; 
+        data = MemU[address,2]; 
+        if wback then R[n] = offset_addr; 
+        if UnalignedSupport() || address<0> = ???0??? then
+            R[t] = SignExtend(data, 32); 
+        else // Can only apply before ARMv7
+            R[t] = bits(32) UNKNOWN;
+#endif
+                  
+    bool success = false;
+    const uint32_t opcode = OpcodeAsUnsigned (&success);
+    if (!success)
+        return false;
+                  
+    if (ConditionPassed())
+    {
+        uint32_t t;
+        uint32_t n;
+        uint32_t m;
+        bool index;
+        bool add;
+        bool wback;
+        ARM_ShifterType shift_t;
+        uint32_t shift_n;
+                  
+        // EncodingSpecificOperations(); NullCheckIfThumbEE(n); 
+        switch (encoding)
+        {
+            case eEncodingT1:
+                // if CurrentInstrSet() == InstrSet_ThumbEE then SEE "Modified operation in ThumbEE"; 
+                // t = UInt(Rt); n = UInt(Rn); m = UInt(Rm); 
+                t = Bits32 (opcode, 2, 0);
+                n = Bits32 (opcode, 5, 3);
+                m = Bits32 (opcode, 8, 6);
+                  
+                // index = TRUE; add = TRUE; wback = FALSE; 
+                index = true;
+                add = true;
+                wback = false;
+                  
+                // (shift_t, shift_n) = (SRType_LSL, 0);
+                shift_t = SRType_LSL;
+                shift_n = 0;
+                  
+                break;
+                  
+            case eEncodingT2:
+                // if Rn == ???1111??? then SEE LDRSH (literal); 
+                // if Rt == ???1111??? then SEE "Unallocated memory hints"; 
+                // t = UInt(Rt); n = UInt(Rn); m = UInt(Rm); 
+                t = Bits32 (opcode, 15, 12);
+                n = Bits32 (opcode, 19, 16);
+                m = Bits32 (opcode, 3, 0);
+                  
+                // index = TRUE; add = TRUE; wback = FALSE; 
+                index = true;
+                add = true;
+                wback = false;
+                  
+                // (shift_t, shift_n) = (SRType_LSL, UInt(imm2)); 
+                shift_t = SRType_LSL;
+                shift_n = Bits32 (opcode, 5, 4);
+                  
+                // if t == 13 || BadReg(m) then UNPREDICTABLE;
+                if ((t == 13) || BadReg (m))
+                    return false;
+                  
+                break;
+                  
+            case eEncodingA1:
+                // if P == ???0??? && W == ???1??? then SEE LDRSHT; 
+                // t = UInt(Rt); n = UInt(Rn); m = UInt(Rm); 
+                t = Bits32 (opcode, 15, 12);
+                n = Bits32 (opcode, 19, 16);
+                m = Bits32 (opcode, 3, 0);
+                  
+                // index = (P == ???1???);	add = (U == ???1???);	wback = (P == ???0???) || (W == ???1???); 
+                index = BitIsSet (opcode, 24);
+                add = BitIsSet (opcode, 23);
+                wback = BitIsClear (opcode, 24) || BitIsSet (opcode, 21);
+                  
+                // (shift_t, shift_n) = (SRType_LSL, 0); 
+                shift_t = SRType_LSL;
+                shift_n = 0;
+                  
+                // if t == 15 || m == 15 then UNPREDICTABLE; 
+                if ((t == 15) || (m == 15))
+                    return false;
+                  
+                // if wback && (n == 15 || n == t) then UNPREDICTABLE;
+                if (wback && ((n == 15) || (n == t)))
+                    return false;
+                  
+                break;
+                  
+            default:
+                break;
+        }
+                  
+        uint64_t Rm = ReadRegisterUnsigned (eRegisterKindDWARF, dwarf_r0 + m, 0, &success);
+        if (!success)
+            return false;
+                  
+        uint64_t Rn = ReadRegisterUnsigned (eRegisterKindDWARF, dwarf_r0 + n, 0, &success);
+        if (!success)
+            return false;
+                  
+        // offset = Shift(R[m], shift_t, shift_n, APSR.C); 
+        addr_t offset = Shift (Rm, shift_t, shift_n, APSR_C);
+                  
+        addr_t offset_addr;
+        addr_t address;
+                  
+        // offset_addr = if add then (R[n] + offset) else (R[n] - offset); 
+        if (add)
+            offset_addr = Rn + offset;
+        else
+            offset_addr = Rn - offset;
+                  
+        // address = if index then offset_addr else R[n]; 
+        if (index)
+            address = offset_addr;
+        else
+            address = Rn;
+                  
+        // data = MemU[address,2]; 
+        Register base_reg;
+        base_reg.SetRegister (eRegisterKindDWARF, dwarf_r0 + n);
+                  
+        Register offset_reg;
+        offset_reg.SetRegister (eRegisterKindDWARF, dwarf_r0 + m);
+                  
+        EmulateInstruction::Context context;
+        context.type = eContextRegisterLoad;
+        context.SetRegisterPlusIndirectOffset (base_reg, offset_reg);
+                  
+        uint64_t data = MemURead (context, address, 2, 0, &success);
+        if (!success)
+            return false;
+                  
+        // if wback then R[n] = offset_addr; 
+        if (wback)
+        {
+            context.type = eContextAdjustBaseRegister;
+            context.SetAddress (offset_addr);
+            if (!WriteRegisterUnsigned (context, eRegisterKindDWARF, dwarf_r0 + n, offset_addr))
+                return false;
+        }
+                  
+        // if UnalignedSupport() || address<0> = ???0??? then
+        if (UnalignedSupport() || BitIsClear (address, 0))
+        {
+            // R[t] = SignExtend(data, 32); 
+            context.type = eContextRegisterLoad;
+            context.SetRegisterPlusIndirectOffset (base_reg, offset_reg);
+            
+            int64_t signed_data = llvm::SignExtend64<16>(data);
+            if (!WriteRegisterUnsigned (context, eRegisterKindDWARF, dwarf_r0 + t, (uint64_t) signed_data))
+                return false;
+        }
+        else // Can only apply before ARMv7
+        {
+            // R[t] = bits(32) UNKNOWN;
+            WriteBits32Unknown (t);
+        }
+    }
+    return true;
+}
+                  
 // Bitwise Exclusive OR (immediate) performs a bitwise exclusive OR of a register value and an immediate value,
 // and writes the result to the destination register.  It can optionally update the condition flags based on
 // the result.
@@ -8361,7 +8541,8 @@
         { 0x0e5f00f0, 0x005f00d0, ARMvAll,       eEncodingA1, eSize32, &EmulateInstructionARM::EmulateLDRSBLiteral, "ldrsb<c> <Rt> <label>" },
         { 0x0e5000f0, 0x001000d0, ARMvAll,       eEncodingA1, eSize32, &EmulateInstructionARM::EmulateLDRSBRegister, "ldrsb<c> <Rt>,[<Rn>,+/-<Rm>]{!}" },
         { 0x0e5000f0, 0x005000f0, ARMvAll,       eEncodingA1, eSize32, &EmulateInstructionARM::EmulateLDRSHImmediate, "ldrsh<c> <Rt>,[<Rn>{,#+/-<imm8>}]"},
-        {  0x0e5f00f0, 0x005f00f0, ARMvAll,      eEncodingA1, eSize32, &EmulateInstructionARM::EmulateLDRSHLiteral, "ldrsh<c> <Rt>,<label>" },
+        { 0x0e5f00f0, 0x005f00f0, ARMvAll,       eEncodingA1, eSize32, &EmulateInstructionARM::EmulateLDRSHLiteral, "ldrsh<c> <Rt>,<label>" },
+        { 0x0e5000f0, 0x001000f0, ARMvAll,       eEncodingA1, eSize32, &EmulateInstructionARM::EmulateLDRSHRegister, "ldrsh<c> <Rt>,[<Rn>,+/-<Rm>]{!}" },
                   
         //----------------------------------------------------------------------
         // Store instructions
@@ -8614,6 +8795,8 @@
         { 0xfff00000, 0xf9b00000, ARMV6T2_ABOVE, eEncodingT1, eSize32, &EmulateInstructionARM::EmulateLDRSHImmediate, "ldrsh<c> <Rt>,[<Rn>,#<imm12>]" },
         { 0xfff00800, 0xf9300800, ARMV6T2_ABOVE, eEncodingT2, eSize32, &EmulateInstructionARM::EmulateLDRSHImmediate, "ldrsh<c> <Rt>,[<Rn>,#+/-<imm8>]" },
         { 0xff7f0000, 0xf93f0000, ARMV6T2_ABOVE, eEncodingT1, eSize32, &EmulateInstructionARM::EmulateLDRSHLiteral, "ldrsh<c> <Rt>,<label>" },
+        { 0xfffffe00, 0x00005e00, ARMV4T_ABOVE,  eEncodingT1, eSize16, &EmulateInstructionARM::EmulateLDRSHRegister, "ldrsh<c> <Rt>,[<Rn>,<Rm>]" },
+        { 0xfff00fc0, 0xf9300000, ARMV6T2_ABOVE, eEncodingT2, eSize32, &EmulateInstructionARM::EmulateLDRSHRegister, "ldrsh<c>.w <Rt>,[<Rn>,<Rm>{,LSL #<imm2>}]" },
                   
         //----------------------------------------------------------------------
         // Store instructions



From gclayton at apple.com  Wed Mar  2 15:34:46 2011
From: gclayton at apple.com (Greg Clayton)
Date: Wed, 02 Mar 2011 21:34:46 -0000
Subject: [Lldb-commits] [lldb] r126885 - in /lldb/trunk:
 include/lldb/API/SBSymbolContext.h include/lldb/API/SBTarget.h
 source/API/SBTarget.cpp
 source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
Message-ID: <20110302213447.03A422A6C12D@llvm.org>

Author: gclayton
Date: Wed Mar  2 15:34:46 2011
New Revision: 126885

URL: http://llvm.org/viewvc/llvm-project?rev=126885&view=rev
Log:
Added a missing API call in SBTarget that enables one to get
anything in a SBSymbolContext filled in given an SBAddress:

SBSymbolContext
SBTarget::ResolveSymbolContextForAddress (const SBAddress& addr, uint32_t resolve_scope);

Also did a little cleanup on the ProcessGDBRemote stdio file handle
code.


Modified:
    lldb/trunk/include/lldb/API/SBSymbolContext.h
    lldb/trunk/include/lldb/API/SBTarget.h
    lldb/trunk/source/API/SBTarget.cpp
    lldb/trunk/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp

Modified: lldb/trunk/include/lldb/API/SBSymbolContext.h
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/include/lldb/API/SBSymbolContext.h?rev=126885&r1=126884&r2=126885&view=diff
==============================================================================
--- lldb/trunk/include/lldb/API/SBSymbolContext.h (original)
+++ lldb/trunk/include/lldb/API/SBSymbolContext.h Wed Mar  2 15:34:46 2011
@@ -51,6 +51,7 @@
     friend class SBFrame;
     friend class SBModule;
     friend class SBThread;
+    friend class SBTarget;
     friend class SBSymbolContextList;
 
 #ifndef SWIG

Modified: lldb/trunk/include/lldb/API/SBTarget.h
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/include/lldb/API/SBTarget.h?rev=126885&r1=126884&r2=126885&view=diff
==============================================================================
--- lldb/trunk/include/lldb/API/SBTarget.h (original)
+++ lldb/trunk/include/lldb/API/SBTarget.h Wed Mar  2 15:34:46 2011
@@ -204,6 +204,10 @@
     ResolveLoadAddress (lldb::addr_t vm_addr, 
                         lldb::SBAddress& addr);
 
+    SBSymbolContext
+    ResolveSymbolContextForAddress (const SBAddress& addr, 
+                                    uint32_t resolve_scope);
+
     lldb::SBBreakpoint
     BreakpointCreateByLocation (const char *file, uint32_t line);
 

Modified: lldb/trunk/source/API/SBTarget.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/API/SBTarget.cpp?rev=126885&r1=126884&r2=126885&view=diff
==============================================================================
--- lldb/trunk/source/API/SBTarget.cpp (original)
+++ lldb/trunk/source/API/SBTarget.cpp Wed Mar  2 15:34:46 2011
@@ -442,6 +442,16 @@
     return false;    
 }
 
+SBSymbolContext
+SBTarget::ResolveSymbolContextForAddress (const SBAddress& addr, uint32_t resolve_scope)
+{
+    SBSymbolContext sc;
+    if (m_opaque_sp)
+        m_opaque_sp->GetImages().ResolveSymbolContextForAddress (*addr, resolve_scope, sc.ref());
+    return sc;
+}
+
+
 SBBreakpoint
 SBTarget::BreakpointCreateByLocation (const char *file, uint32_t line)
 {

Modified: lldb/trunk/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp?rev=126885&r1=126884&r2=126885&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp (original)
+++ lldb/trunk/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp Wed Mar  2 15:34:46 2011
@@ -460,13 +460,12 @@
         {
             lldb_utility::PseudoTerminal pty;
             const bool disable_stdio = (launch_flags & eLaunchFlagDisableSTDIO) != 0;
-            if (disable_stdio)
-            {
-                stdin_path = "/dev/null";
-                stdout_path = "/dev/null";
-                stderr_path = "/dev/null";
-            }
-            else
+
+            // If the debugserver is local and we aren't disabling STDIO, lets use
+            // a pseudo terminal to instead of relying on the 'O' packets for stdio
+            // since 'O' packets can really slow down debugging if the inferior 
+            // does a lot of output.
+            if (m_local_debugserver && !disable_stdio)
             {
                 const char *slave_name = NULL;
                 if (stdin_path == NULL || stdout_path == NULL || stderr_path == NULL)
@@ -484,13 +483,19 @@
                     stderr_path = slave_name;
             }
 
-            if (stdin_path == NULL && (stdout_path || stderr_path))
+            // Set STDIN to /dev/null if we want STDIO disabled or if either
+            // STDOUT or STDERR have been set to something and STDIN hasn't
+            if (disable_stdio || (stdin_path == NULL && (stdout_path || stderr_path)))
                 stdin_path = "/dev/null";
             
-            if (stdout_path == NULL && (stdin_path || stderr_path))
+            // Set STDOUT to /dev/null if we want STDIO disabled or if either
+            // STDIN or STDERR have been set to something and STDOUT hasn't
+            if (disable_stdio || (stdout_path == NULL && (stdin_path || stderr_path)))
                 stdout_path = "/dev/null";
             
-            if (stderr_path == NULL && (stdin_path || stdout_path))
+            // Set STDERR to /dev/null if we want STDIO disabled or if either
+            // STDIN or STDOUT have been set to something and STDERR hasn't
+            if (disable_stdio || (stderr_path == NULL && (stdin_path || stdout_path)))
                 stderr_path = "/dev/null";
 
             if (stdin_path) 



From ctice at apple.com  Wed Mar  2 16:43:55 2011
From: ctice at apple.com (Caroline Tice)
Date: Wed, 02 Mar 2011 22:43:55 -0000
Subject: [Lldb-commits] [lldb] r126891 - in /lldb/trunk:
 include/lldb/Core/EmulateInstruction.h
 source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
Message-ID: <20110302224355.281992A6C12C@llvm.org>

Author: ctice
Date: Wed Mar  2 16:43:54 2011
New Revision: 126891

URL: http://llvm.org/viewvc/llvm-project?rev=126891&view=rev
Log:

Add code to emulate MUL Arm instruction.

Add new context type & info structure for  mul instruction.


Modified:
    lldb/trunk/include/lldb/Core/EmulateInstruction.h
    lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp

Modified: lldb/trunk/include/lldb/Core/EmulateInstruction.h
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/include/lldb/Core/EmulateInstruction.h?rev=126891&r1=126890&r2=126891&view=diff
==============================================================================
--- lldb/trunk/include/lldb/Core/EmulateInstruction.h (original)
+++ lldb/trunk/include/lldb/Core/EmulateInstruction.h Wed Mar  2 16:43:54 2011
@@ -168,13 +168,16 @@
         // arg0 = target memory address
         // arg1 = don't care
         // arg2 = don't care
-        eContextWriteMemoryRandomBits
+        eContextWriteMemoryRandomBits,
+        
+        eContextMultiplication
     };
     
     enum InfoType {
         eInfoTypeRegisterPlusOffset,
         eInfoTypeRegisterPlusIndirectOffset,
         eInfoTypeRegisterToRegisterPlusOffset,
+        eInfoTypeRegisterRegisterOperands,
         eInfoTypeOffset,
         eInfoTypeRegister,
         eInfoTypeImmediate,
@@ -225,6 +228,12 @@
                 int64_t offset;     // offset for address calculation
             } RegisterToRegisterPlusOffset;
             
+            struct RegisterRegisterOperands
+            {
+                Register operand1;  // register containing first operand for binary op
+                Register operand2;  // register containing second operand for binary op
+            } RegisterRegisterOperands;
+            
             int64_t signed_offset; // signed offset by which to adjust self (for registers only)
             
             Register reg;          // plain register
@@ -281,6 +290,15 @@
         }
         
         void
+        SetRegisterRegisterOperands (Register op1_reg,
+                                     Register op2_reg)
+        {
+            info_type = eInfoTypeRegisterRegisterOperands;
+            info.RegisterRegisterOperands.operand1 = op1_reg;
+            info.RegisterRegisterOperands.operand2 = op2_reg;
+        }
+        
+        void
         SetOffset (int64_t signed_offset)
         {
             info_type = eInfoTypeOffset;

Modified: lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp?rev=126891&r1=126890&r2=126891&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp (original)
+++ lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp Wed Mar  2 16:43:54 2011
@@ -725,6 +725,140 @@
     return true;
 }
 
+// MUL multiplies two register values.  The least significant 32 bits of the result are written to the destination 
+// register.  These 32 bits do not depend on whether the source register values are considered to be signed values or 
+// unsigned values.
+//
+// Optionally, it can update the condition flags based on the result.  In the Thumb instruction set, this option is 
+// limited to only a few forms of the instruction.
+bool
+EmulateInstructionARM::EmulateMUL (ARMEncoding encoding)
+{
+#if 0
+    if ConditionPassed() then 
+        EncodingSpecificOperations(); 
+        operand1 = SInt(R[n]); // operand1 = UInt(R[n]) produces the same final results 
+        operand2 = SInt(R[m]); // operand2 = UInt(R[m]) produces the same final results 
+        result = operand1 * operand2; 
+        R[d] = result<31:0>; 
+        if setflags then
+            APSR.N = result<31>; 
+            APSR.Z = IsZeroBit(result); 
+            if ArchVersion() == 4 then
+                APSR.C = bit UNKNOWN; 
+            // else APSR.C unchanged 
+            // APSR.V always unchanged
+#endif
+                  
+    bool success = false;
+    const uint32_t opcode = OpcodeAsUnsigned (&success);
+    if (!success)
+        return false;
+    
+    if (ConditionPassed())
+    {
+        uint32_t d;
+        uint32_t n;
+        uint32_t m;
+        bool setflags;
+                  
+        // EncodingSpecificOperations(); 
+        switch (encoding)
+        {
+            case eEncodingT1:
+                // d = UInt(Rdm); n = UInt(Rn); m = UInt(Rdm); setflags = !InITBlock(); 
+                d = Bits32 (opcode, 2, 0);
+                n = Bits32 (opcode, 5, 3);
+                m = Bits32 (opcode, 2, 0);
+                setflags = !InITBlock();
+                  
+                // if ArchVersion() < 6 && d == n then UNPREDICTABLE;
+                if ((ArchVersion() < ARMv6) && (d == n))
+                    return false;
+                  
+                break;
+                  
+            case eEncodingT2:
+                // d = UInt(Rd); n = UInt(Rn); m = UInt(Rm); setflags = FALSE; 
+                d = Bits32 (opcode, 11, 8);
+                n = Bits32 (opcode, 19, 16);
+                m = Bits32 (opcode, 3, 0);
+                setflags = false;
+                  
+                // if BadReg(d) || BadReg(n) || BadReg(m) then UNPREDICTABLE;
+                if (BadReg (d) || BadReg (n) || BadReg (m))
+                    return false;
+                  
+                break;
+                  
+            case eEncodingA1:
+                // d = UInt(Rd); n = UInt(Rn); m = UInt(Rm); setflags = (S == ???1???); 
+                d = Bits32 (opcode, 19, 16);
+                n = Bits32 (opcode, 3, 0);
+                m = Bits32 (opcode, 11, 8);
+                setflags = BitIsSet (opcode, 20);
+                  
+                // if d == 15 || n == 15 || m == 15 then UNPREDICTABLE; 
+                if ((d == 15) ||  (n == 15) || (m == 15))
+                    return false;
+                  
+                // if ArchVersion() < 6 && d == n then UNPREDICTABLE;
+                if ((ArchVersion() < ARMv6) && (d == n))
+                    return false;
+                  
+                break;
+                  
+            default:
+                return false;
+        }
+                  
+        // operand1 = SInt(R[n]); // operand1 = UInt(R[n]) produces the same final results
+        uint64_t operand1 = ReadRegisterUnsigned (eRegisterKindDWARF, dwarf_r0 + n, 0, &success);
+        if (!success)
+            return false;
+                  
+        // operand2 = SInt(R[m]); // operand2 = UInt(R[m]) produces the same final results 
+        uint64_t operand2 = ReadRegisterUnsigned (eRegisterKindDWARF, dwarf_r0 + m, 0, &success);
+        if (!success)
+            return false;
+                  
+        // result = operand1 * operand2; 
+        uint64_t result = operand1 * operand2;
+                  
+        // R[d] = result<31:0>; 
+        Register op1_reg;
+        Register op2_reg;
+        op1_reg.SetRegister (eRegisterKindDWARF, dwarf_r0 + n);
+        op2_reg.SetRegister (eRegisterKindDWARF, dwarf_r0 + m);
+                  
+        EmulateInstruction::Context context;
+        context.type = eContextMultiplication;
+        context.SetRegisterRegisterOperands (op1_reg, op2_reg);
+                  
+        if (!WriteRegisterUnsigned (context, eRegisterKindDWARF, dwarf_r0 + d, (0x0000ffff & result)))
+            return false;
+                  
+        // if setflags then
+        if (setflags)
+        {
+            // APSR.N = result<31>; 
+            // APSR.Z = IsZeroBit(result);
+            m_new_inst_cpsr = m_inst_cpsr;
+            SetBit32 (m_new_inst_cpsr, CPSR_N_POS, Bit32 (result, 31));
+            SetBit32 (m_new_inst_cpsr, CPSR_Z_POS, result == 0 ? 1 : 0);
+            if (m_new_inst_cpsr != m_inst_cpsr)
+            {
+                if (!WriteRegisterUnsigned (context, eRegisterKindGeneric, LLDB_REGNUM_GENERIC_FLAGS, m_new_inst_cpsr))
+                    return false;
+            }
+            
+            // if ArchVersion() == 4 then
+                // APSR.C = bit UNKNOWN;   
+        }
+    }
+    return true;
+}
+                  
 // Bitwise NOT (immediate) writes the bitwise inverse of an immediate value to the destination register.
 // It can optionally update the condition flags based on the value.
 bool
@@ -8523,6 +8657,8 @@
         { 0x0fef0070, 0x01a00060, ARMvAll,       eEncodingA1, eSize32, &EmulateInstructionARM::EmulateRORImm, "ror{s}<c> <Rd>, <Rm>, #imm"},
         // ror (register)
         { 0x0fef00f0, 0x01a00070, ARMvAll,       eEncodingA1, eSize32, &EmulateInstructionARM::EmulateRORReg, "ror{s}<c> <Rd>, <Rn>, <Rm>"},
+        // mul
+        { 0x0fe000f0, 0x00000090, ARMvAll,       eEncodingA1, eSize32, &EmulateInstructionARM::EmulateMUL, "mul{s}<c> <Rd>,<R>,<Rm>" },
 
         //----------------------------------------------------------------------
         // Load instructions
@@ -8763,6 +8899,10 @@
         // ror (register)
         { 0xffffffc0, 0x000041c0, ARMvAll,       eEncodingT1, eSize16, &EmulateInstructionARM::EmulateRORReg, "rors|ror<c> <Rdn>, <Rm>"},
         { 0xffe0f0f0, 0xfa60f000, ARMV6T2_ABOVE, eEncodingT2, eSize32, &EmulateInstructionARM::EmulateRORReg, "ror{s}<c>.w <Rd>, <Rn>, <Rm>"},
+        // mul
+        { 0xffffffc0, 0x00004340, ARMV4T_ABOVE,  eEncodingT1, eSize16, &EmulateInstructionARM::EmulateMUL, "muls <Rdm>,<Rn>,<Rdm>" },
+        // mul
+        { 0xfff0f0f0, 0xfb00f000, ARMV6T2_ABOVE, eEncodingT2, eSize32, &EmulateInstructionARM::EmulateMUL, "mul<c> <Rd>,<Rn>,<Rm>" },
 
         //----------------------------------------------------------------------
         // Load instructions



From gclayton at apple.com  Wed Mar  2 17:01:18 2011
From: gclayton at apple.com (Greg Clayton)
Date: Wed, 02 Mar 2011 23:01:18 -0000
Subject: [Lldb-commits] [lldb] r126892 - in /lldb/trunk:
 include/lldb/API/SBAddress.h include/lldb/API/SBFunction.h
 include/lldb/API/SBSymbol.h source/API/SBFunction.cpp
 source/API/SBSymbol.cpp
Message-ID: <20110302230118.CC46D2A6C12F@llvm.org>

Author: gclayton
Date: Wed Mar  2 17:01:18 2011
New Revision: 126892

URL: http://llvm.org/viewvc/llvm-project?rev=126892&view=rev
Log:
Export the ability to get the start and end addresses for functions
and symbols, and also allow clients to get the prologue size in bytes:

    SBAddress
    SBFunction::GetStartAddress ();
    
    SBAddress
    SBFunction::GetEndAddress ();
    
    uint32_t
    SBFunction::GetPrologueByteSize ();

    SBAddress
    SBSymbol::GetStartAddress ();
    
    SBAddress
    SBSymbol::GetEndAddress ();
    
    uint32_t
    SBSymbol::GetPrologueByteSize ();


Modified:
    lldb/trunk/include/lldb/API/SBAddress.h
    lldb/trunk/include/lldb/API/SBFunction.h
    lldb/trunk/include/lldb/API/SBSymbol.h
    lldb/trunk/source/API/SBFunction.cpp
    lldb/trunk/source/API/SBSymbol.cpp

Modified: lldb/trunk/include/lldb/API/SBAddress.h
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/include/lldb/API/SBAddress.h?rev=126892&r1=126891&r2=126892&view=diff
==============================================================================
--- lldb/trunk/include/lldb/API/SBAddress.h (original)
+++ lldb/trunk/include/lldb/API/SBAddress.h Wed Mar  2 17:01:18 2011
@@ -50,9 +50,11 @@
 protected:
 
     friend class SBFrame;
+    friend class SBFunction;
     friend class SBLineEntry;
     friend class SBInstruction;
     friend class SBModule;
+    friend class SBSymbol;
     friend class SBSymbolContext;
     friend class SBTarget;
     friend class SBThread;

Modified: lldb/trunk/include/lldb/API/SBFunction.h
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/include/lldb/API/SBFunction.h?rev=126892&r1=126891&r2=126892&view=diff
==============================================================================
--- lldb/trunk/include/lldb/API/SBFunction.h (original)
+++ lldb/trunk/include/lldb/API/SBFunction.h Wed Mar  2 17:01:18 2011
@@ -11,6 +11,7 @@
 #define LLDB_SBFunction_h_
 
 #include "lldb/API/SBDefines.h"
+#include "lldb/API/SBAddress.h"
 #include "lldb/API/SBInstructionList.h"
 
 namespace lldb {
@@ -43,6 +44,15 @@
     lldb::SBInstructionList
     GetInstructions (lldb::SBTarget target);
 
+    SBAddress
+    GetStartAddress ();
+
+    SBAddress
+    GetEndAddress ();
+
+    uint32_t
+    GetPrologueByteSize ();
+
 #ifndef SWIG
     bool
     operator == (const lldb::SBFunction &rhs) const;

Modified: lldb/trunk/include/lldb/API/SBSymbol.h
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/include/lldb/API/SBSymbol.h?rev=126892&r1=126891&r2=126892&view=diff
==============================================================================
--- lldb/trunk/include/lldb/API/SBSymbol.h (original)
+++ lldb/trunk/include/lldb/API/SBSymbol.h Wed Mar  2 17:01:18 2011
@@ -11,6 +11,7 @@
 #define LLDB_SBSymbol_h_
 
 #include "lldb/API/SBDefines.h"
+#include "lldb/API/SBAddress.h"
 #include "lldb/API/SBInstructionList.h"
 #include "lldb/API/SBTarget.h"
 
@@ -44,6 +45,15 @@
     lldb::SBInstructionList
     GetInstructions (lldb::SBTarget target);
 
+    SBAddress
+    GetStartAddress ();
+    
+    SBAddress
+    GetEndAddress ();
+    
+    uint32_t
+    GetPrologueByteSize ();
+
 #ifndef SWIG
     bool
     operator == (const lldb::SBSymbol &rhs) const;

Modified: lldb/trunk/source/API/SBFunction.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/API/SBFunction.cpp?rev=126892&r1=126891&r2=126892&view=diff
==============================================================================
--- lldb/trunk/source/API/SBFunction.cpp (original)
+++ lldb/trunk/source/API/SBFunction.cpp Wed Mar  2 17:01:18 2011
@@ -156,3 +156,38 @@
     m_opaque_ptr = lldb_object_ptr;
 }
 
+SBAddress
+SBFunction::GetStartAddress ()
+{
+    SBAddress addr;
+    if (m_opaque_ptr)
+        addr.SetAddress (&m_opaque_ptr->GetAddressRange().GetBaseAddress());
+    return addr;
+}
+
+SBAddress
+SBFunction::GetEndAddress ()
+{
+    SBAddress addr;
+    if (m_opaque_ptr)
+    {
+        addr_t byte_size = m_opaque_ptr->GetAddressRange().GetByteSize();
+        if (byte_size > 0)
+        {
+            addr.SetAddress (&m_opaque_ptr->GetAddressRange().GetBaseAddress());
+            addr->Slide (byte_size);
+        }
+    }
+    return addr;
+}
+
+
+uint32_t
+SBFunction::GetPrologueByteSize ()
+{
+    if (m_opaque_ptr)
+        return m_opaque_ptr->GetPrologueByteSize();
+    return 0;
+}
+
+

Modified: lldb/trunk/source/API/SBSymbol.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/API/SBSymbol.cpp?rev=126892&r1=126891&r2=126892&view=diff
==============================================================================
--- lldb/trunk/source/API/SBSymbol.cpp (original)
+++ lldb/trunk/source/API/SBSymbol.cpp Wed Mar  2 17:01:18 2011
@@ -153,3 +153,47 @@
 {
     m_opaque_ptr = symbol;
 }
+
+SBAddress
+SBSymbol::GetStartAddress ()
+{
+    SBAddress addr;
+    if (m_opaque_ptr)
+    {
+        // Make sure the symbol is an address based symbol first:
+        AddressRange *symbol_arange_ptr = m_opaque_ptr->GetAddressRangePtr();
+        if (symbol_arange_ptr)
+        {
+            addr.SetAddress (&symbol_arange_ptr->GetBaseAddress());
+        }
+    }
+    return addr;
+}
+
+SBAddress
+SBSymbol::GetEndAddress ()
+{
+    SBAddress addr;
+    if (m_opaque_ptr)
+    {
+        AddressRange *symbol_arange_ptr = m_opaque_ptr->GetAddressRangePtr();
+        if (symbol_arange_ptr)
+        {
+            addr_t byte_size = symbol_arange_ptr->GetByteSize();
+            if (byte_size > 0)
+            {
+                addr.SetAddress (&symbol_arange_ptr->GetBaseAddress());
+                addr->Slide (byte_size);
+            }
+        }
+    }
+    return addr;
+}
+
+uint32_t
+SBSymbol::GetPrologueByteSize ()
+{
+    if (m_opaque_ptr)
+        return m_opaque_ptr->GetPrologueByteSize();
+    return 0;
+}



From ctice at apple.com  Wed Mar  2 17:57:02 2011
From: ctice at apple.com (Caroline Tice)
Date: Wed, 02 Mar 2011 23:57:02 -0000
Subject: [Lldb-commits] [lldb] r126903 - in /lldb/trunk:
 include/lldb/Core/EmulateInstruction.h
 source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
 source/Plugins/Instruction/ARM/EmulateInstructionARM.h
Message-ID: <20110302235702.5A9B62A6C12C@llvm.org>

Author: ctice
Date: Wed Mar  2 17:57:02 2011
New Revision: 126903

URL: http://llvm.org/viewvc/llvm-project?rev=126903&view=rev
Log:

Add code to emulate ADD (immediate, Thumb) Arm instruction.

Add addition context to EmulateInstruction contexts.


Modified:
    lldb/trunk/include/lldb/Core/EmulateInstruction.h
    lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
    lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.h

Modified: lldb/trunk/include/lldb/Core/EmulateInstruction.h
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/include/lldb/Core/EmulateInstruction.h?rev=126903&r1=126902&r2=126903&view=diff
==============================================================================
--- lldb/trunk/include/lldb/Core/EmulateInstruction.h (original)
+++ lldb/trunk/include/lldb/Core/EmulateInstruction.h Wed Mar  2 17:57:02 2011
@@ -170,7 +170,8 @@
         // arg2 = don't care
         eContextWriteMemoryRandomBits,
         
-        eContextMultiplication
+        eContextMultiplication,
+        eContextAddition
     };
     
     enum InfoType {

Modified: lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp?rev=126903&r1=126902&r2=126903&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp (original)
+++ lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp Wed Mar  2 17:57:02 2011
@@ -2249,6 +2249,122 @@
     return true;
 }
 
+// This instruction adds an immediate value to a register value, and writes the result to the destination register.  
+// It can optionally update the condition flags based on the result.
+bool
+EmulateInstructionARM::EmulateADDImmThumb (ARMEncoding encoding)
+{
+#if 0
+    if ConditionPassed() then 
+        EncodingSpecificOperations(); 
+        (result, carry, overflow) = AddWithCarry(R[n], imm32, ???0???); 
+        R[d] = result; 
+        if setflags then
+            APSR.N = result<31>;  
+            APSR.Z = IsZeroBit(result); 
+            APSR.C = carry;  
+            APSR.V = overflow;
+#endif
+                  
+    bool success = false;
+    const uint32_t opcode = OpcodeAsUnsigned (&success);
+    if (!success)
+        return false;
+                  
+    if (ConditionPassed())
+    {
+        uint32_t d;
+        uint32_t n;
+        bool setflags;
+        uint32_t imm32;
+        uint32_t carry_out;
+        
+        //EncodingSpecificOperations(); 
+        switch (encoding)
+        {
+            case eEncodingT1:
+                // d = UInt(Rd); n = UInt(Rn); setflags = !InITBlock(); imm32 = ZeroExtend(imm3, 32);
+                d = Bits32 (opcode, 2, 0);
+                n = Bits32 (opcode, 5, 3);
+                setflags = !InITBlock();
+                imm32 = Bits32 (opcode, 8,6);
+                
+                break;
+                
+            case eEncodingT2:
+                // d = UInt(Rdn); n = UInt(Rdn); setflags = !InITBlock(); imm32 = ZeroExtend(imm8, 32);
+                d = Bits32 (opcode, 10, 8);
+                n = Bits32 (opcode, 10, 8);
+                setflags = !InITBlock();
+                imm32 = Bits32 (opcode, 7, 0);
+                
+                break;
+                
+            case eEncodingT3:
+                // if Rd == ???1111??? && S == ???1??? then SEE CMN (immediate); 
+                // if Rn == ???1101??? then SEE ADD (SP plus immediate); 
+                // d = UInt(Rd); n = UInt(Rn); setflags = (S == ???1???); imm32 = ThumbExpandImm(i:imm3:imm8); 
+                d = Bits32 (opcode, 11, 8);
+                n = Bits32 (opcode, 19, 16);
+                setflags = BitIsSet (opcode, 20);
+                imm32 = ThumbExpandImm_C (opcode, APSR_C, carry_out);
+                
+                // if BadReg(d) || n == 15 then UNPREDICTABLE;
+                if (BadReg (d) || (n == 15))
+                    return false;
+                
+                break;
+                
+            case eEncodingT4:
+            {
+                // if Rn == ???1111??? then SEE ADR; 
+                // if Rn == ???1101??? then SEE ADD (SP plus immediate); 
+                // d = UInt(Rd); n = UInt(Rn); setflags = FALSE; imm32 = ZeroExtend(i:imm3:imm8, 32); 
+                d = Bits32 (opcode, 11, 8);
+                n = Bits32 (opcode, 19, 16);
+                setflags = false;
+                uint32_t i = Bit32 (opcode, 26);
+                uint32_t imm3 = Bits32 (opcode, 14, 12);
+                uint32_t imm8 = Bits32 (opcode, 7, 0);
+                imm32 = (i << 11) | (imm3 << 8) | imm8;
+                
+                // if BadReg(d) then UNPREDICTABLE;
+                if (BadReg (d))
+                    return false;
+                    
+                break;
+            }   
+            default:
+                return false;
+        }
+        
+        uint64_t Rn = ReadRegisterUnsigned (eRegisterKindDWARF, dwarf_r0 + n, 0, &success);
+        if (!success)
+            return false;
+        
+        //(result, carry, overflow) = AddWithCarry(R[n], imm32, ???0???); 
+        AddWithCarryResult res = AddWithCarry (Rn, imm32, 0);
+        
+        Register reg_n;
+        reg_n.SetRegister (eRegisterKindDWARF, dwarf_r0 + n);
+        
+        EmulateInstruction::Context context;
+        context.type = eContextAddition;
+        context.SetRegisterPlusOffset (reg_n, imm32);
+        
+        //R[d] = result; 
+        //if setflags then
+            //APSR.N = result<31>;  
+            //APSR.Z = IsZeroBit(result); 
+            //APSR.C = carry;  
+            //APSR.V = overflow;
+        if (!WriteCoreRegOptionalFlags (context, res.result, d, setflags, res.carry_out, res.overflow))
+            return false;
+        
+    }
+    return true;
+}
+                  
 // This instruction adds an immediate value to a register value, and writes the result to the destination
 // register.  It can optionally update the condition flags based on the result.
 bool
@@ -8829,6 +8945,11 @@
         // sbc (register)
         { 0xffffffc0, 0x00004180, ARMvAll,       eEncodingT1, eSize16, &EmulateInstructionARM::EmulateSBCReg, "sbcs|sbc<c> <Rdn>, <Rm>"},
         { 0xffe08000, 0xeb600000, ARMV6T2_ABOVE, eEncodingT2, eSize32, &EmulateInstructionARM::EmulateSBCReg, "sbc{s}<c>.w <Rd>, <Rn>, <Rm> {,<shift>}"},
+        // add (immediate, Thumb)
+        { 0xfffffe00, 0x00001c00, ARMV4T_ABOVE,  eEncodingT1, eSize16, &EmulateInstructionARM::EmulateADDImmThumb, "adds|add<c> <Rd>,<Rn>,#<imm3>" },
+        { 0xfffff800, 0x00003000, ARMV4T_ABOVE,  eEncodingT2, eSize16, &EmulateInstructionARM::EmulateADDImmThumb, "adds|add<c> <Rdn>,#<imm8>" },
+        { 0xfbe08000, 0xf1000000, ARMV6T2_ABOVE, eEncodingT3, eSize32, &EmulateInstructionARM::EmulateADDImmThumb, "add{s}<c>.w <Rd>,<Rn>,#<const>" },
+        { 0xfbf08000, 0xf2000000, ARMV6T2_ABOVE, eEncodingT4, eSize32, &EmulateInstructionARM::EmulateADDImmThumb, "addw<c> <Rd>,<Rn>,#<imm12>" },
         // sub (immediate, Thumb)
         { 0xfffffe00, 0x00001e00, ARMvAll,       eEncodingT1, eSize16, &EmulateInstructionARM::EmulateSUBImmThumb, "subs|sub<c> <Rd>, <Rn> #imm3"},
         { 0xfffff800, 0x00003800, ARMvAll,       eEncodingT2, eSize16, &EmulateInstructionARM::EmulateSUBImmThumb, "subs|sub<c> <Rdn>, #imm8"},

Modified: lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.h
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.h?rev=126903&r1=126902&r2=126903&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.h (original)
+++ lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.h Wed Mar  2 17:57:02 2011
@@ -414,6 +414,10 @@
     bool
     EmulateTB (ARMEncoding encoding);
 
+    // A8.6.4 ADD (immediate, Thumb)
+    bool
+    EmulateADDImmThumb (ARMEncoding encoding);
+
     // A8.6.5 ADD (immediate, ARM)
     bool
     EmulateADDImmARM (ARMEncoding encoding);



From ctice at apple.com  Wed Mar  2 18:07:02 2011
From: ctice at apple.com (Caroline Tice)
Date: Thu, 03 Mar 2011 00:07:02 -0000
Subject: [Lldb-commits] [lldb] r126904 -
 /lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
Message-ID: <20110303000702.DB03D2A6C12C@llvm.org>

Author: ctice
Date: Wed Mar  2 18:07:02 2011
New Revision: 126904

URL: http://llvm.org/viewvc/llvm-project?rev=126904&view=rev
Log:

Fix bug where bitwise-AND was being used and it should have been bitwise-OR.


Modified:
    lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp

Modified: lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp?rev=126904&r1=126903&r2=126904&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp (original)
+++ lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp Wed Mar  2 18:07:02 2011
@@ -6325,7 +6325,7 @@
                   
                 // t == UInt(Rt); imm32 = ZeroExtend(imm4H:imm4L, 32); add = (U == ???1???);
                 t = Bits32 (opcode, 15, 12);
-                imm32 = (imm4H << 4) & imm4L;
+                imm32 = (imm4H << 4) | imm4L;
                 add = BitIsSet (opcode, 23);
                   
                 // if t == 15 then UNPREDICTABLE;                  
@@ -6645,7 +6645,7 @@
             
                 uint32_t imm4H = Bits32 (opcode, 11, 8);
                 uint32_t imm4L = Bits32 (opcode, 3, 0);
-                imm32 = (imm4H << 4) & imm4L;
+                imm32 = (imm4H << 4) | imm4L;
                   
                 // index = (P == ???1???);	add = (U == ???1???);	wback = (P == ???0???) || (W == ???1???); 
                 index = BitIsSet (opcode, 24);
@@ -6757,7 +6757,7 @@
                 t = Bits32 (opcode, 15, 12);
                 uint32_t imm4H = Bits32 (opcode, 11, 8);
                 uint32_t imm4L = Bits32 (opcode, 3, 0);
-                imm32 = (imm4H << 4) & imm4L;
+                imm32 = (imm4H << 4) | imm4L;
                 add = BitIsSet (opcode, 23);
                   
                 // if t == 15 then UNPREDICTABLE;
@@ -7051,7 +7051,7 @@
                 n = Bits32 (opcode, 19, 16);
                 uint32_t imm4H = Bits32 (opcode, 11,8);
                 uint32_t imm4L = Bits32 (opcode, 3, 0);
-                imm32 = (imm4H << 4) & imm4L;
+                imm32 = (imm4H << 4) | imm4L;
                   
                 // index = (P == ???1???);	add = (U == ???1???);	wback = (P == ???0???) || (W == ???1???); 
                 index = BitIsSet (opcode, 24);
@@ -7177,7 +7177,7 @@
                 t = Bits32 (opcode, 15, 12);
                 uint32_t imm4H = Bits32 (opcode, 11, 8);
                 uint32_t imm4L = Bits32 (opcode, 3, 0);
-                imm32 = (imm4H << 4) & imm4L;
+                imm32 = (imm4H << 4) | imm4L;
                 add = BitIsSet (opcode, 23);
                   
                 // if t == 15 then UNPREDICTABLE;



From johnny.chen at apple.com  Wed Mar  2 19:41:57 2011
From: johnny.chen at apple.com (Johnny Chen)
Date: Thu, 03 Mar 2011 01:41:57 -0000
Subject: [Lldb-commits] [lldb] r126916 - in /lldb/trunk/test:
 breakpoint_conditions/TestBreakpointConditions.py
 breakpoint_ignore_count/TestBreakpointIgnoreCount.py lldbutil.py
 python_api/process/TestProcessAPI.py
 python_api/symbol-context/TestSymbolContext.py python_api/target/
 python_api/target/Makefile python_api/target/TestTargetAPI.py
 python_api/target/main.c
Message-ID: <20110303014157.66E2F2A6C12C@llvm.org>

Author: johnny
Date: Wed Mar  2 19:41:57 2011
New Revision: 126916

URL: http://llvm.org/viewvc/llvm-project?rev=126916&view=rev
Log:
Add TestTargetAPI.py:

// When stopped on breakppint 1, and then 2, we can get the line entries using
// SBFrame API SBFrame.GetLineEntry().  We'll get the start addresses for the
// two line entries; with the start address (of SBAddress type), we can then
// resolve the symbol context using the SBTarget API
// SBTarget.ResolveSymbolContextForAddress().
//
// The two symbol context should point to the same symbol, i.e., 'a' function.


Add two utility functions to lldbutil.py:

o get_stopped_threads(process, reason):

  return the list of threads with the specified stop reason or an empty list if not found

o get_stopped_thread(process, reason):

  return the first thread with the given stop reason or None if not found

Added:
    lldb/trunk/test/python_api/target/
    lldb/trunk/test/python_api/target/Makefile
    lldb/trunk/test/python_api/target/TestTargetAPI.py
    lldb/trunk/test/python_api/target/main.c
Modified:
    lldb/trunk/test/breakpoint_conditions/TestBreakpointConditions.py
    lldb/trunk/test/breakpoint_ignore_count/TestBreakpointIgnoreCount.py
    lldb/trunk/test/lldbutil.py
    lldb/trunk/test/python_api/process/TestProcessAPI.py
    lldb/trunk/test/python_api/symbol-context/TestSymbolContext.py

Modified: lldb/trunk/test/breakpoint_conditions/TestBreakpointConditions.py
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/test/breakpoint_conditions/TestBreakpointConditions.py?rev=126916&r1=126915&r2=126916&view=diff
==============================================================================
--- lldb/trunk/test/breakpoint_conditions/TestBreakpointConditions.py (original)
+++ lldb/trunk/test/breakpoint_conditions/TestBreakpointConditions.py Wed Mar  2 19:41:57 2011
@@ -146,7 +146,10 @@
         self.assertTrue(self.process.IsValid(), PROCESS_IS_VALID)
 
         # Frame #0 should be on self.line1 and the break condition should hold.
-        frame0 = self.process.GetThreadAtIndex(0).GetFrameAtIndex(0)
+        from lldbutil import get_stopped_thread
+        thread = get_stopped_thread(self.process, lldb.eStopReasonPlanComplete)
+        self.assertTrue(thread != None, "There should be a thread stopped due to breakpoint condition")
+        frame0 = thread.GetFrameAtIndex(0)
         var = frame0.FindValue('val', lldb.eValueTypeVariableArgument)
         self.assertTrue(frame0.GetLineEntry().GetLine() == self.line1 and
                         var.GetValue(frame0) == '3')

Modified: lldb/trunk/test/breakpoint_ignore_count/TestBreakpointIgnoreCount.py
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/test/breakpoint_ignore_count/TestBreakpointIgnoreCount.py?rev=126916&r1=126915&r2=126916&view=diff
==============================================================================
--- lldb/trunk/test/breakpoint_ignore_count/TestBreakpointIgnoreCount.py (original)
+++ lldb/trunk/test/breakpoint_ignore_count/TestBreakpointIgnoreCount.py Wed Mar  2 19:41:57 2011
@@ -110,9 +110,12 @@
         # Frame#0 should be on main.c:37, frame#1 should be on main.c:25, and
         # frame#2 should be on main.c:48.
         #lldbutil.PrintStackTraces(self.process)
-        frame0 = self.process.GetThreadAtIndex(0).GetFrameAtIndex(0)
-        frame1 = self.process.GetThreadAtIndex(0).GetFrameAtIndex(1)
-        frame2 = self.process.GetThreadAtIndex(0).GetFrameAtIndex(2)
+        from lldbutil import get_stopped_thread
+        thread = get_stopped_thread(self.process, lldb.eStopReasonBreakpoint)
+        self.assertTrue(thread != None, "There should be a thread stopped due to breakpoint")
+        frame0 = thread.GetFrameAtIndex(0)
+        frame1 = thread.GetFrameAtIndex(1)
+        frame2 = thread.GetFrameAtIndex(2)
         self.assertTrue(frame0.GetLineEntry().GetLine() == self.line1 and
                         frame1.GetLineEntry().GetLine() == self.line3 and
                         frame2.GetLineEntry().GetLine() == self.line4,

Modified: lldb/trunk/test/lldbutil.py
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/test/lldbutil.py?rev=126916&r1=126915&r2=126916&view=diff
==============================================================================
--- lldb/trunk/test/lldbutil.py (original)
+++ lldb/trunk/test/lldbutil.py Wed Mar  2 19:41:57 2011
@@ -6,6 +6,41 @@
 import sys
 import StringIO
 
+# ===========================================
+# Iterator for lldb aggregate data structures
+# ===========================================
+
+def lldb_iter(obj, getsize, getelem):
+    """A generator adaptor for lldb aggregate data structures.
+
+    API clients pass in an aggregate object or a container of it, the name of
+    the method to get the size of the aggregate, and the name of the method to
+    get the element by index.
+
+    Example usages:
+
+    1. Pass an aggregate as the first argument:
+
+    def disassemble_instructions (insts):
+        from lldbutil import lldb_iter
+        for i in lldb_iter(insts, 'GetSize', 'GetInstructionAtIndex'):
+            print i
+
+    2. Pass a container of aggregate which provides APIs to get to the size and
+       the element of the aggregate:
+
+    # Module is a container of symbol table 
+    module = target.FindModule(filespec)
+    for symbol in lldb_iter(module, 'GetNumSymbols', 'GetSymbolAtIndex'):
+        name = symbol.GetName()
+        ...
+    """
+    size = getattr(obj, getsize)
+    elem = getattr(obj, getelem)
+    for i in range(size()):
+        yield elem(i)
+
+
 # ==========================================================
 # Integer (byte size 1, 2, 4, and 8) to bytearray conversion
 # ==========================================================
@@ -61,40 +96,45 @@
     return unpacked[0]
 
 
-# ===========================================
-# Iterator for lldb aggregate data structures
-# ===========================================
-
-def lldb_iter(obj, getsize, getelem):
-    """A generator adaptor for lldb aggregate data structures.
-
-    API clients pass in an aggregate object or a container of it, the name of
-    the method to get the size of the aggregate, and the name of the method to
-    get the element by index.
+# ===========================================================
+# Returns the list of stopped thread(s) given an lldb process
+# ===========================================================
+
+def get_stopped_threads(process, reason):
+    """Returns the thread(s) with the specified stop reason in a list."""
+    threads = []
+    for t in lldb_iter(process, 'GetNumThreads', 'GetThreadAtIndex'):
+        if t.GetStopReason() == reason:
+            threads.append(t)
+    return threads
+
+def get_stopped_thread(process, reason):
+    """A convenience function which returns the first thread with the given stop
+    reason or None.
 
     Example usages:
 
-    1. Pass an aggregate as the first argument:
+    1. Get the stopped thread due to a breakpoint condition
 
-    def disassemble_instructions (insts):
-        from lldbutil import lldb_iter
-        for i in lldb_iter(insts, 'GetSize', 'GetInstructionAtIndex'):
-            print i
+    ...
+        from lldbutil import get_stopped_thread
+        thread = get_stopped_thread(self.process, lldb.eStopReasonPlanComplete)
+        self.assertTrue(thread != None, "There should be a thread stopped due to breakpoint condition")
+    ...
 
-    2. Pass a container of aggregate which provides APIs to get to the size and
-       the element of the aggregate:
+    2. Get the thread stopped due to a breakpoint
 
-    # Module is a container of symbol table 
-    module = target.FindModule(filespec)
-    for symbol in lldb_iter(module, 'GetNumSymbols', 'GetSymbolAtIndex'):
-        name = symbol.GetName()
-        ...
-    """
-    size = getattr(obj, getsize)
-    elem = getattr(obj, getelem)
-    for i in range(size()):
-        yield elem(i)
+    ...
+        from lldbutil import get_stopped_thread
+        thread = get_stopped_thread(self.process, lldb.eStopReasonBreakpoint)
+        self.assertTrue(thread != None, "There should be a thread stopped due to breakpoint")
+    ...
 
+    """
+    threads = get_stopped_threads(process, reason)
+    if len(threads) == 0:
+        return None
+    return threads[0]
 
 # =================================================
 # Convert some enum value to its string counterpart

Modified: lldb/trunk/test/python_api/process/TestProcessAPI.py
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/test/python_api/process/TestProcessAPI.py?rev=126916&r1=126915&r2=126916&view=diff
==============================================================================
--- lldb/trunk/test/python_api/process/TestProcessAPI.py (original)
+++ lldb/trunk/test/python_api/process/TestProcessAPI.py Wed Mar  2 19:41:57 2011
@@ -5,6 +5,7 @@
 import os, time
 import unittest2
 import lldb
+from lldbutil import get_stopped_thread
 from lldbtest import *
 
 class ProcessAPITestCase(TestBase):
@@ -71,8 +72,9 @@
         error = lldb.SBError()
         self.process = target.Launch (self.dbg.GetListener(), None, None, os.ctermid(), os.ctermid(), os.ctermid(), None, 0, False, error)
 
-        thread = self.process.GetThreadAtIndex(0);
-        frame = thread.GetFrameAtIndex(0);
+        thread = get_stopped_thread(self.process, lldb.eStopReasonBreakpoint)
+        self.assertTrue(thread != None, "There should be a thread stopped due to breakpoint")
+        frame = thread.GetFrameAtIndex(0)
 
         # Get the SBValue for the global variable 'my_char'.
         val = frame.FindValue("my_char", lldb.eValueTypeVariableGlobal)
@@ -111,8 +113,9 @@
         error = lldb.SBError()
         self.process = target.Launch (self.dbg.GetListener(), None, None, os.ctermid(), os.ctermid(), os.ctermid(), None, 0, False, error)
 
-        thread = self.process.GetThreadAtIndex(0);
-        frame = thread.GetFrameAtIndex(0);
+        thread = get_stopped_thread(self.process, lldb.eStopReasonBreakpoint)
+        self.assertTrue(thread != None, "There should be a thread stopped due to breakpoint")
+        frame = thread.GetFrameAtIndex(0)
 
         # Get the SBValue for the global variable 'my_char'.
         val = frame.FindValue("my_char", lldb.eValueTypeVariableGlobal)
@@ -160,8 +163,9 @@
         error = lldb.SBError()
         self.process = target.Launch (self.dbg.GetListener(), None, None, os.ctermid(), os.ctermid(), os.ctermid(), None, 0, False, error)
 
-        thread = self.process.GetThreadAtIndex(0);
-        frame = thread.GetFrameAtIndex(0);
+        thread = get_stopped_thread(self.process, lldb.eStopReasonBreakpoint)
+        self.assertTrue(thread != None, "There should be a thread stopped due to breakpoint")
+        frame = thread.GetFrameAtIndex(0)
 
         # Get the SBValue for the global variable 'my_int'.
         val = frame.FindValue("my_int", lldb.eValueTypeVariableGlobal)

Modified: lldb/trunk/test/python_api/symbol-context/TestSymbolContext.py
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/test/python_api/symbol-context/TestSymbolContext.py?rev=126916&r1=126915&r2=126916&view=diff
==============================================================================
--- lldb/trunk/test/python_api/symbol-context/TestSymbolContext.py (original)
+++ lldb/trunk/test/python_api/symbol-context/TestSymbolContext.py Wed Mar  2 19:41:57 2011
@@ -54,7 +54,10 @@
         self.assertTrue(self.process.IsValid(), PROCESS_IS_VALID)
 
         # Frame #0 should be on self.line.
-        frame0 = self.process.GetThreadAtIndex(0).GetFrameAtIndex(0)
+        from lldbutil import get_stopped_thread
+        thread = get_stopped_thread(self.process, lldb.eStopReasonBreakpoint)
+        self.assertTrue(thread != None, "There should be a thread stopped due to breakpoint")
+        frame0 = thread.GetFrameAtIndex(0)
         self.assertTrue(frame0.GetLineEntry().GetLine() == self.line)
 
         # Now get the SBSymbolContext from this frame.  We want everything. :-)
@@ -81,6 +84,7 @@
         #print "block:", block
 
         lineEntry = context.GetLineEntry()
+        #print "line entry:", lineEntry
         self.expect(lineEntry.GetFileSpec().GetDirectory(), "The line entry should have the correct directory",
                     exe=False,
             substrs = [self.mydir])

Added: lldb/trunk/test/python_api/target/Makefile
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/test/python_api/target/Makefile?rev=126916&view=auto
==============================================================================
--- lldb/trunk/test/python_api/target/Makefile (added)
+++ lldb/trunk/test/python_api/target/Makefile Wed Mar  2 19:41:57 2011
@@ -0,0 +1,5 @@
+LEVEL = ../../make
+
+C_SOURCES := main.c
+
+include $(LEVEL)/Makefile.rules

Added: lldb/trunk/test/python_api/target/TestTargetAPI.py
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/test/python_api/target/TestTargetAPI.py?rev=126916&view=auto
==============================================================================
--- lldb/trunk/test/python_api/target/TestTargetAPI.py (added)
+++ lldb/trunk/test/python_api/target/TestTargetAPI.py Wed Mar  2 19:41:57 2011
@@ -0,0 +1,114 @@
+"""
+Test SBTarget APIs.
+"""
+
+import os, time
+import re
+import unittest2
+import lldb, lldbutil
+from lldbtest import *
+
+class TargetAPITestCase(TestBase):
+
+    mydir = os.path.join("python_api", "target")
+
+    @unittest2.skipUnless(sys.platform.startswith("darwin"), "requires Darwin")
+    @python_api_test
+    def test_with_dsym(self):
+        """Exercise SBTaget APIs."""
+        self.buildDsym()
+        self.target_api()
+
+    @python_api_test
+    def test_with_dwarf(self):
+        """Exercise SBTarget APIs."""
+        self.buildDwarf()
+        self.target_api()
+
+    def setUp(self):
+        # Call super's setUp().
+        TestBase.setUp(self)
+        # Find the line number to of function 'c'.
+        self.line1 = line_number('main.c', '// Find the line number for breakpoint 1 here.')
+        self.line2 = line_number('main.c', '// Find the line number for breakpoint 2 here.')
+
+    def target_api(self):
+        """Exercise SBTarget APIs."""
+        exe = os.path.join(os.getcwd(), "a.out")
+
+        # Create a target by the debugger.
+        target = self.dbg.CreateTarget(exe)
+        self.assertTrue(target.IsValid(), VALID_TARGET)
+
+        # Now create the two breakpoints inside function 'a'.
+        breakpoint1 = target.BreakpointCreateByLocation('main.c', self.line1)
+        breakpoint2 = target.BreakpointCreateByLocation('main.c', self.line2)
+        print "breakpoint1:", breakpoint1
+        print "breakpoint2:", breakpoint2
+        self.assertTrue(breakpoint1.IsValid() and
+                        breakpoint1.GetNumLocations() == 1,
+                        VALID_BREAKPOINT)
+        self.assertTrue(breakpoint2.IsValid() and
+                        breakpoint2.GetNumLocations() == 1,
+                        VALID_BREAKPOINT)
+
+        # Now launch the process, and do not stop at entry point.
+        error = lldb.SBError()
+        self.process = target.Launch (self.dbg.GetListener(), None, None, os.ctermid(), os.ctermid(), os.ctermid(), None, 0, False, error)
+
+        self.process = target.GetProcess()
+        self.assertTrue(self.process.IsValid(), PROCESS_IS_VALID)
+
+        # Frame #0 should be on self.line1.
+        self.assertTrue(self.process.GetState() == lldb.eStateStopped)
+        thread = lldbutil.get_stopped_thread(self.process, lldb.eStopReasonBreakpoint)
+        self.runCmd("process status")
+        frame0 = thread.GetFrameAtIndex(0)
+        lineEntry = frame0.GetLineEntry()
+        self.assertTrue(lineEntry.GetLine() == self.line1)
+
+        address1 = lineEntry.GetStartAddress()
+
+        # Continue the inferior, the breakpoint 2 should be hit.
+        self.process.Continue()
+        self.assertTrue(self.process.GetState() == lldb.eStateStopped)
+        thread = lldbutil.get_stopped_thread(self.process, lldb.eStopReasonBreakpoint)
+        self.runCmd("process status")
+        frame0 = thread.GetFrameAtIndex(0)
+        lineEntry = frame0.GetLineEntry()
+        self.assertTrue(lineEntry.GetLine() == self.line2)
+
+        address2 = lineEntry.GetStartAddress()
+
+        print "address1:", address1
+        print "address2:", address2
+
+        # Now call SBTarget.ResolveSymbolContextForAddress() with the addresses from our line entry.
+        context1 = target.ResolveSymbolContextForAddress(address1, lldb.eSymbolContextEverything)
+        context2 = target.ResolveSymbolContextForAddress(address2, lldb.eSymbolContextEverything)
+
+        self.assertTrue(context1.IsValid() and context2.IsValid())
+        print "context1:", context1
+        print "context2:", context2
+
+        # Verify that the context point to the same function 'a'.
+        symbol1 = context1.GetSymbol()
+        symbol2 = context2.GetSymbol()
+        self.assertTrue(symbol1.IsValid() and symbol2.IsValid())
+        print "symbol1:", symbol1
+        print "symbol2:", symbol2
+
+        stream1 = lldb.SBStream()
+        symbol1.GetDescription(stream1)
+        stream2 = lldb.SBStream()
+        symbol2.GetDescription(stream2)
+        
+        self.expect(stream1.GetData(), "The two addresses should resolve to the same symbol", exe=False,
+            startstr = stream2.GetData())
+
+        
+if __name__ == '__main__':
+    import atexit
+    lldb.SBDebugger.Initialize()
+    atexit.register(lambda: lldb.SBDebugger.Terminate())
+    unittest2.main()

Added: lldb/trunk/test/python_api/target/main.c
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/test/python_api/target/main.c?rev=126916&view=auto
==============================================================================
--- lldb/trunk/test/python_api/target/main.c (added)
+++ lldb/trunk/test/python_api/target/main.c Wed Mar  2 19:41:57 2011
@@ -0,0 +1,57 @@
+//===-- main.c --------------------------------------------------*- C++ -*-===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+#include <stdio.h>
+
+// This simple program is to test the lldb Python API SBTarget.
+//
+// When stopped on breakppint 1, and then 2, we can get the line entries using
+// SBFrame API SBFrame.GetLineEntry().  We'll get the start addresses for the
+// two line entries; with the start address (of SBAddress type), we can then
+// resolve the symbol context using the SBTarget API
+// SBTarget.ResolveSymbolContextForAddress().
+//
+// The two symbol context should point to the same symbol, i.e., 'a' function.
+
+int a(int);
+int b(int);
+int c(int);
+
+int a(int val)
+{
+    if (val <= 1) // Find the line number for breakpoint 1 here.
+        val = b(val);
+    else if (val >= 3)
+        val = c(val);
+
+    return val; // Find the line number for breakpoint 2 here.
+}
+
+int b(int val)
+{
+    return c(val);
+}
+
+int c(int val)
+{
+    return val + 3;
+}
+
+int main (int argc, char const *argv[])
+{
+    int A1 = a(1);  // a(1) -> b(1) -> c(1)
+    printf("a(1) returns %d\n", A1);
+    
+    int B2 = b(2);  // b(2) -> c(2)
+    printf("b(2) returns %d\n", B2);
+    
+    int A3 = a(3);  // a(3) -> c(3)
+    printf("a(3) returns %d\n", A3);
+    
+    return 0;
+}



From ctice at apple.com  Thu Mar  3 11:42:58 2011
From: ctice at apple.com (Caroline Tice)
Date: Thu, 03 Mar 2011 17:42:58 -0000
Subject: [Lldb-commits] [lldb] r126949 -
 /lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
Message-ID: <20110303174258.DA5742A6C12C@llvm.org>

Author: ctice
Date: Thu Mar  3 11:42:58 2011
New Revision: 126949

URL: http://llvm.org/viewvc/llvm-project?rev=126949&view=rev
Log:

Add code to emulate SXTB Arm instruction.


Modified:
    lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp

Modified: lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp?rev=126949&r1=126948&r2=126949&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp (original)
+++ lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp Thu Mar  3 11:42:58 2011
@@ -130,6 +130,7 @@
 #define ARMV4T_ABOVE  (ARMv4T|ARMv5T|ARMv5TE|ARMv5TEJ|ARMv6|ARMv6K|ARMv6T2|ARMv7|ARMv8)
 #define ARMV5_ABOVE   (ARMv5T|ARMv5TE|ARMv5TEJ|ARMv6|ARMv6K|ARMv6T2|ARMv7|ARMv8)
 #define ARMV5J_ABOVE  (ARMv5TEJ|ARMv6|ARMv6K|ARMv6T2|ARMv7|ARMv8)
+#define ARMV6_ABOVE   (ARMv6|ARMv6K|ARMv6T2|ARMv7|ARMv8) 
 #define ARMV6T2_ABOVE (ARMv6T2|ARMv7|ARMv8)
 
 //----------------------------------------------------------------------
@@ -7412,6 +7413,91 @@
     }
     return true;
 }
+         
+// SXTB extracts an 8-bit value from a register, sign-extends it to 32 bits, and writes the result to the destination 
+// register.  You can specifiy a rotation by 0, 8, 16, or 24 bits before extracting the 8-bit value.
+bool 
+EmulateInstructionARM::EmulateSXTB (ARMEncoding encoding)
+{
+#if 0
+    if ConditionPassed() then 
+        EncodingSpecificOperations();
+        rotated = ROR(R[m], rotation); 
+        R[d] = SignExtend(rotated<7:0>, 32);
+#endif
+                  
+    bool success = false;
+    const uint32_t opcode = OpcodeAsUnsigned (&success);
+    if (!success)
+        return false;
+                  
+    if (ConditionPassed())
+    {
+        uint32_t d;
+        uint32_t m;
+        uint32_t rotation;
+                  
+        // EncodingSpecificOperations();
+        switch (encoding)
+        {
+            case eEncodingT1:
+                // d = UInt(Rd); m = UInt(Rm); rotation = 0;
+                d = Bits32 (opcode, 2, 0);
+                m = Bits32 (opcode, 5, 3);
+                rotation = 0;
+                  
+                break;
+                  
+            case eEncodingT2:
+                // d = UInt(Rd); m = UInt(Rm); rotation = UInt(rotate:???000???); 
+                d = Bits32 (opcode, 11, 8);
+                m = Bits32 (opcode, 3, 0);
+                rotation = Bits32 (opcode, 5, 4) << 3;
+                              
+                // if BadReg(d) || BadReg(m) then UNPREDICTABLE;
+                if (BadReg (d) || BadReg (m))
+                    return false;
+                  
+                break;
+                  
+            case eEncodingA1:
+                // d = UInt(Rd); m = UInt(Rm); rotation = UInt(rotate:???000???); 
+                d = Bits32 (opcode, 15, 12);
+                m = Bits32 (opcode, 3, 0);
+                rotation = Bits32 (opcode, 11, 10) << 3;
+                  
+                // if d == 15 || m == 15 then UNPREDICTABLE;
+                if ((d == 15) || (m == 15))
+                    return false;
+                  
+                break;
+                  
+            default:
+                return false;
+        }
+                  
+                  uint64_t Rm = ReadRegisterUnsigned (eRegisterKindDWARF, dwarf_r0 + m, 0, &success);
+                  if (!success)
+                  return false;
+                  
+        // rotated = ROR(R[m], rotation); 
+        uint64_t rotated = ROR (Rm, rotation);
+                  
+        // R[d] = SignExtend(rotated<7:0>, 32);
+        uint64_t data = llvm::SignExtend64<8>(rotated);
+                  
+        Register source_reg;
+        source_reg.SetRegister (eRegisterKindDWARF, dwarf_r0 + m);
+                  
+        EmulateInstruction::Context context;
+        context.type = eContextRegisterLoad;
+        context.SetRegister (source_reg);
+                  
+        if (!WriteRegisterUnsigned (context, eRegisterKindDWARF, dwarf_r0 + d, data))
+            return false;
+    }
+    return true;
+}
                   
 // Bitwise Exclusive OR (immediate) performs a bitwise exclusive OR of a register value and an immediate value,
 // and writes the result to the destination register.  It can optionally update the condition flags based on
@@ -8803,9 +8889,13 @@
         { 0x0fd00000, 0x08000000, ARMvAll,      eEncodingA1, eSize32, &EmulateInstructionARM::EmulateSTMDA, "stmda<c> <Rn>{!} <registers>" },
         { 0x0fd00000, 0x09000000, ARMvAll,      eEncodingA1, eSize32, &EmulateInstructionARM::EmulateSTMDB, "stmdb<c> <Rn>{!} <registers>" },
         { 0x0fd00000, 0x09800000, ARMvAll,      eEncodingA1, eSize32, &EmulateInstructionARM::EmulateSTMIB, "stmib<c> <Rn>{!} <registers>" },
-        { 0x0e500010, 0x06000000, ARMvAll,      eEncodingA1, eSize32, &EmulateInstructionARM::EmulateSTRRegister, "str<c> <Rt> [<Rn> +/-<Rm> {<shift>}]{!}" }
+        { 0x0e500010, 0x06000000, ARMvAll,      eEncodingA1, eSize32, &EmulateInstructionARM::EmulateSTRRegister, "str<c> <Rt> [<Rn> +/-<Rm> {<shift>}]{!}" },
+                  
+        //----------------------------------------------------------------------
+        // Other instructions
+        //----------------------------------------------------------------------
+        { 0x0fff00f0, 0x06af00f0, ARMV6_ABOVE,  eEncodingA1, eSize32, &EmulateInstructionARM::EmulateSXTB, "sxtb<c> <Rd>,<Rm>{,<rotation>}" }
                   
-        
     };
     static const size_t k_num_arm_opcodes = sizeof(g_arm_opcodes)/sizeof(ARMOpcode);
                   
@@ -9024,7 +9114,7 @@
         { 0xffffffc0, 0x00004340, ARMV4T_ABOVE,  eEncodingT1, eSize16, &EmulateInstructionARM::EmulateMUL, "muls <Rdm>,<Rn>,<Rdm>" },
         // mul
         { 0xfff0f0f0, 0xfb00f000, ARMV6T2_ABOVE, eEncodingT2, eSize32, &EmulateInstructionARM::EmulateMUL, "mul<c> <Rd>,<Rn>,<Rm>" },
-
+ 
         //----------------------------------------------------------------------
         // Load instructions
         //----------------------------------------------------------------------
@@ -9073,7 +9163,14 @@
         { 0xfff00fc0, 0xf8400000, ARMV6T2_ABOVE, eEncodingT2, eSize32, &EmulateInstructionARM::EmulateSTRRegister, "str<c>.w <Rt>, [<Rn>, <Rm> {lsl #imm2>}]" },
         { 0xfffff800, 0x00007000, ARMV4T_ABOVE,  eEncodingT1, eSize16, &EmulateInstructionARM::EmulateSTRBThumb, "strb<c> <Rt>, [<Rn>, #<imm5>]" },
         { 0xfff00000, 0xf8800000, ARMV6T2_ABOVE, eEncodingT2, eSize32, &EmulateInstructionARM::EmulateSTRBThumb, "strb<c>.w <Rt>, [<Rn>, #<imm12>]" },
-        { 0xfff00800, 0xf8000800, ARMV6T2_ABOVE, eEncodingT3, eSize32, &EmulateInstructionARM::EmulateSTRBThumb, "strb<c> <Rt> ,[<Rn>, #+/-<imm8>]{!}" }
+        { 0xfff00800, 0xf8000800, ARMV6T2_ABOVE, eEncodingT3, eSize32, &EmulateInstructionARM::EmulateSTRBThumb, "strb<c> <Rt> ,[<Rn>, #+/-<imm8>]{!}" },
+                  
+        //----------------------------------------------------------------------
+        // Other instructions
+        //----------------------------------------------------------------------
+        { 0xffffffc0, 0x0000b240, ARMV6_ABOVE,   eEncodingT1, eSize16, &EmulateInstructionARM::EmulateSXTB, "sxtb<c> <Rd>,<Rm>" },
+        { 0xfffff080, 0xfa4ff080, ARMV6_ABOVE,   eEncodingT2, eSize32, &EmulateInstructionARM::EmulateSXTB, "sxtb<c>.w <Rd>,<Rm>{,<rotation>}" }
+                  
     };
 
     const size_t k_num_thumb_opcodes = sizeof(g_thumb_opcodes)/sizeof(ARMOpcode);



From ctice at apple.com  Thu Mar  3 12:04:49 2011
From: ctice at apple.com (Caroline Tice)
Date: Thu, 03 Mar 2011 18:04:49 -0000
Subject: [Lldb-commits] [lldb] r126951 -
 /lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
Message-ID: <20110303180449.F055D2A6C12C@llvm.org>

Author: ctice
Date: Thu Mar  3 12:04:49 2011
New Revision: 126951

URL: http://llvm.org/viewvc/llvm-project?rev=126951&view=rev
Log:

Add code to emulate SXTH Arm instruction.


Modified:
    lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp

Modified: lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp?rev=126951&r1=126950&r2=126951&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp (original)
+++ lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp Thu Mar  3 12:04:49 2011
@@ -7476,9 +7476,9 @@
                 return false;
         }
                   
-                  uint64_t Rm = ReadRegisterUnsigned (eRegisterKindDWARF, dwarf_r0 + m, 0, &success);
-                  if (!success)
-                  return false;
+        uint64_t Rm = ReadRegisterUnsigned (eRegisterKindDWARF, dwarf_r0 + m, 0, &success);
+        if (!success)
+            return false;
                   
         // rotated = ROR(R[m], rotation); 
         uint64_t rotated = ROR (Rm, rotation);
@@ -7499,6 +7499,91 @@
     return true;
 }
                   
+// SXTH extracts a 16-bit value from a register, sign-extends it to 32 bits, and writes the result to the destination
+// register.  You can specify a rotation by 0, 8, 16, or 24 bits before extracting the 16-bit value.
+bool
+EmulateInstructionARM::EmulateSXTH (ARMEncoding encoding)
+{
+#if 0
+    if ConditionPassed() then 
+        EncodingSpecificOperations(); 
+        rotated = ROR(R[m], rotation); 
+        R[d] = SignExtend(rotated<15:0>, 32);
+#endif
+                  
+    bool success = false;
+    const uint32_t opcode = OpcodeAsUnsigned (&success);
+    if (!success)
+        return false;
+                  
+    if (ConditionPassed())
+    {
+        uint32_t d;
+        uint32_t m;
+        uint32_t rotation;
+                  
+        // EncodingSpecificOperations(); 
+        switch (encoding)
+        {
+            case eEncodingT1:
+                // d = UInt(Rd); m = UInt(Rm); rotation = 0;
+                d = Bits32 (opcode, 2, 0);
+                m = Bits32 (opcode, 5, 3);
+                rotation = 0;
+                  
+                break;
+                  
+            case eEncodingT2:
+                // d = UInt(Rd); m = UInt(Rm); rotation = UInt(rotate:???000???); 
+                d = Bits32 (opcode, 11, 8);
+                m = Bits32 (opcode, 3, 0);
+                rotation = Bits32 (opcode, 5, 4) << 3;
+                  
+                // if BadReg(d) || BadReg(m) then UNPREDICTABLE;
+                if (BadReg (d) || BadReg (m))
+                    return false;
+                  
+                break;
+                  
+            case eEncodingA1:
+                // d = UInt(Rd); m = UInt(Rm); rotation = UInt(rotate:???000???); 
+                d = Bits32 (opcode, 15, 12);
+                m = Bits32 (opcode, 3, 0);
+                rotation = Bits32 (opcode, 11, 10) << 3;
+                  
+                // if d == 15 || m == 15 then UNPREDICTABLE;
+                if ((d == 15) || (m == 15))
+                    return false;
+                  
+                break;
+                
+            default:
+                return false;
+        }
+                  
+        uint64_t Rm = ReadRegisterUnsigned (eRegisterKindDWARF, dwarf_r0 + m, 0, &success);
+        if (!success)
+            return false;
+                  
+        // rotated = ROR(R[m], rotation); 
+        uint64_t rotated = ROR (Rm, rotation);
+                  
+        // R[d] = SignExtend(rotated<15:0>, 32);
+        Register source_reg;
+        source_reg.SetRegister (eRegisterKindDWARF, dwarf_r0 + m);
+                  
+        EmulateInstruction::Context context;
+        context.type = eContextRegisterLoad;
+        context.SetRegister (source_reg);
+                  
+        uint64_t data = llvm::SignExtend64<16> (rotated);
+        if (!WriteRegisterUnsigned (context, eRegisterKindDWARF, dwarf_r0 + d, data))
+            return false;
+    }
+                  
+    return true;
+}
+                  
 // Bitwise Exclusive OR (immediate) performs a bitwise exclusive OR of a register value and an immediate value,
 // and writes the result to the destination register.  It can optionally update the condition flags based on
 // the result.
@@ -8894,7 +8979,8 @@
         //----------------------------------------------------------------------
         // Other instructions
         //----------------------------------------------------------------------
-        { 0x0fff00f0, 0x06af00f0, ARMV6_ABOVE,  eEncodingA1, eSize32, &EmulateInstructionARM::EmulateSXTB, "sxtb<c> <Rd>,<Rm>{,<rotation>}" }
+        { 0x0fff00f0, 0x06af00f0, ARMV6_ABOVE,  eEncodingA1, eSize32, &EmulateInstructionARM::EmulateSXTB, "sxtb<c> <Rd>,<Rm>{,<rotation>}" },
+        { 0x0fff00f0, 0x06bf0070, ARMV6_ABOVE,  eEncodingA1, eSize32, &EmulateInstructionARM::EmulateSXTH, "sxth<c> <Rd>,<Rm>{,<rotation>}" }
                   
     };
     static const size_t k_num_arm_opcodes = sizeof(g_arm_opcodes)/sizeof(ARMOpcode);
@@ -9169,7 +9255,9 @@
         // Other instructions
         //----------------------------------------------------------------------
         { 0xffffffc0, 0x0000b240, ARMV6_ABOVE,   eEncodingT1, eSize16, &EmulateInstructionARM::EmulateSXTB, "sxtb<c> <Rd>,<Rm>" },
-        { 0xfffff080, 0xfa4ff080, ARMV6_ABOVE,   eEncodingT2, eSize32, &EmulateInstructionARM::EmulateSXTB, "sxtb<c>.w <Rd>,<Rm>{,<rotation>}" }
+        { 0xfffff080, 0xfa4ff080, ARMV6_ABOVE,   eEncodingT2, eSize32, &EmulateInstructionARM::EmulateSXTB, "sxtb<c>.w <Rd>,<Rm>{,<rotation>}" },
+        { 0xffffffc0, 0x0000b200, ARMV6_ABOVE,   eEncodingT1, eSize16, &EmulateInstructionARM::EmulateSXTH, "sxth<c> <Rd>,<Rm>" },
+        { 0xfffff080, 0xfa0ff080, ARMV6T2_ABOVE, eEncodingT2, eSize32, &EmulateInstructionARM::EmulateSXTH, "sxth<c>.w <Rd>,<Rm>{,<rotation>}" }
                   
     };
 



From ctice at apple.com  Thu Mar  3 12:27:17 2011
From: ctice at apple.com (Caroline Tice)
Date: Thu, 03 Mar 2011 18:27:17 -0000
Subject: [Lldb-commits] [lldb] r126953 -
 /lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
Message-ID: <20110303182717.3F8872A6C12C@llvm.org>

Author: ctice
Date: Thu Mar  3 12:27:17 2011
New Revision: 126953

URL: http://llvm.org/viewvc/llvm-project?rev=126953&view=rev
Log:

Add code to emulate UXTB Arm instruction.


Modified:
    lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp

Modified: lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp?rev=126953&r1=126952&r2=126953&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp (original)
+++ lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp Thu Mar  3 12:27:17 2011
@@ -7484,7 +7484,7 @@
         uint64_t rotated = ROR (Rm, rotation);
                   
         // R[d] = SignExtend(rotated<7:0>, 32);
-        uint64_t data = llvm::SignExtend64<8>(rotated);
+        int64_t data = llvm::SignExtend64<8>(rotated);
                   
         Register source_reg;
         source_reg.SetRegister (eRegisterKindDWARF, dwarf_r0 + m);
@@ -7493,7 +7493,7 @@
         context.type = eContextRegisterLoad;
         context.SetRegister (source_reg);
                   
-        if (!WriteRegisterUnsigned (context, eRegisterKindDWARF, dwarf_r0 + d, data))
+        if (!WriteRegisterUnsigned (context, eRegisterKindDWARF, dwarf_r0 + d, (uint64_t) data))
             return false;
     }
     return true;
@@ -7576,14 +7576,97 @@
         context.type = eContextRegisterLoad;
         context.SetRegister (source_reg);
                   
-        uint64_t data = llvm::SignExtend64<16> (rotated);
-        if (!WriteRegisterUnsigned (context, eRegisterKindDWARF, dwarf_r0 + d, data))
+        int64_t data = llvm::SignExtend64<16> (rotated);
+        if (!WriteRegisterUnsigned (context, eRegisterKindDWARF, dwarf_r0 + d, (uint64_t) data))
             return false;
     }
                   
     return true;
 }
                   
+// UXTB extracts an 8-bit value from a register, zero-extneds it to 32 bits, and writes the result to the destination
+// register.  You can specify a rotation by 0, 8, 16, or 24 bits before extracting the 8-bit value.
+bool
+EmulateInstructionARM::EmulateUXTB (ARMEncoding encoding)
+{
+#if 0
+    if ConditionPassed() then 
+        EncodingSpecificOperations(); 
+        rotated = ROR(R[m], rotation); 
+        R[d] = ZeroExtend(rotated<7:0>, 32);
+#endif
+                  
+    bool success = false;
+    const uint32_t opcode = OpcodeAsUnsigned (&success);
+    if (!success)
+        return false;
+                  
+    if (ConditionPassed())
+    {
+        uint32_t d;
+        uint32_t m;
+        uint32_t rotation;
+                  
+        // EncodingSpecificOperations(); 
+        switch (encoding)
+        {
+            case eEncodingT1:
+                // d = UInt(Rd); m = UInt(Rm); rotation = 0;
+                d = Bits32 (opcode, 2, 0);
+                m = Bits32 (opcode, 5, 3);
+                rotation = 0;
+                  
+                break;
+                  
+            case eEncodingT2:
+                // d = UInt(Rd); m = UInt(Rm); rotation = UInt(rotate:???000???); 
+                d = Bits32 (opcode, 11, 8);
+                m = Bits32 (opcode, 3, 0);
+                  rotation = Bits32 (opcode, 5, 4) << 3;
+                  
+                // if BadReg(d) || BadReg(m) then UNPREDICTABLE;
+                if (BadReg (d) || BadReg (m))
+                  return false;
+                  
+                break;
+                  
+            case eEncodingA1:
+                // d = UInt(Rd); m = UInt(Rm); rotation = UInt(rotate:???000???); 
+                d = Bits32 (opcode, 15, 12);
+                m = Bits32 (opcode, 3, 0);
+                rotation = Bits32 (opcode, 11, 10) << 3;
+                  
+                // if d == 15 || m == 15 then UNPREDICTABLE;
+                if ((d == 15) || (m == 15))
+                    return false;
+                  
+                break;
+                  
+            default:
+                return false;
+        }
+                  
+        uint64_t Rm = ReadRegisterUnsigned (eRegisterKindDWARF, dwarf_r0 + m, 0, &success);
+        if (!success)
+            return false;
+                  
+        // rotated = ROR(R[m], rotation); 
+        uint64_t rotated = ROR (Rm, rotation);
+                  
+        // R[d] = ZeroExtend(rotated<7:0>, 32);
+        Register source_reg;
+        source_reg.SetRegister (eRegisterKindDWARF, dwarf_r0 + m);
+                  
+        EmulateInstruction::Context context;
+        context.type = eContextRegisterLoad;
+        context.SetRegister (source_reg);
+                  
+        if (!WriteRegisterUnsigned (context, eRegisterKindDWARF, dwarf_r0 + d, Bits32 (rotated, 7, 0)))
+            return false;
+    }
+    return true;
+}
+                  
 // Bitwise Exclusive OR (immediate) performs a bitwise exclusive OR of a register value and an immediate value,
 // and writes the result to the destination register.  It can optionally update the condition flags based on
 // the result.
@@ -8980,7 +9063,8 @@
         // Other instructions
         //----------------------------------------------------------------------
         { 0x0fff00f0, 0x06af00f0, ARMV6_ABOVE,  eEncodingA1, eSize32, &EmulateInstructionARM::EmulateSXTB, "sxtb<c> <Rd>,<Rm>{,<rotation>}" },
-        { 0x0fff00f0, 0x06bf0070, ARMV6_ABOVE,  eEncodingA1, eSize32, &EmulateInstructionARM::EmulateSXTH, "sxth<c> <Rd>,<Rm>{,<rotation>}" }
+        { 0x0fff00f0, 0x06bf0070, ARMV6_ABOVE,  eEncodingA1, eSize32, &EmulateInstructionARM::EmulateSXTH, "sxth<c> <Rd>,<Rm>{,<rotation>}" },
+        { 0x0fff00f0, 0x06ef0070, ARMV6_ABOVE,  eEncodingA1, eSize32, &EmulateInstructionARM::EmulateUXTB, "uxtb<c> <Rd>,<Rm>{,<rotation>}" }
                   
     };
     static const size_t k_num_arm_opcodes = sizeof(g_arm_opcodes)/sizeof(ARMOpcode);
@@ -9257,7 +9341,9 @@
         { 0xffffffc0, 0x0000b240, ARMV6_ABOVE,   eEncodingT1, eSize16, &EmulateInstructionARM::EmulateSXTB, "sxtb<c> <Rd>,<Rm>" },
         { 0xfffff080, 0xfa4ff080, ARMV6_ABOVE,   eEncodingT2, eSize32, &EmulateInstructionARM::EmulateSXTB, "sxtb<c>.w <Rd>,<Rm>{,<rotation>}" },
         { 0xffffffc0, 0x0000b200, ARMV6_ABOVE,   eEncodingT1, eSize16, &EmulateInstructionARM::EmulateSXTH, "sxth<c> <Rd>,<Rm>" },
-        { 0xfffff080, 0xfa0ff080, ARMV6T2_ABOVE, eEncodingT2, eSize32, &EmulateInstructionARM::EmulateSXTH, "sxth<c>.w <Rd>,<Rm>{,<rotation>}" }
+        { 0xfffff080, 0xfa0ff080, ARMV6T2_ABOVE, eEncodingT2, eSize32, &EmulateInstructionARM::EmulateSXTH, "sxth<c>.w <Rd>,<Rm>{,<rotation>}" },
+        { 0xffffffc0, 0x0000b2c0, ARMV6_ABOVE,   eEncodingT1, eSize16, &EmulateInstructionARM::EmulateUXTB, "uxtb<c> <Rd>,<Rm>" },
+        { 0xfffff080, 0xfa5ff080, ARMV6T2_ABOVE, eEncodingT2, eSize32, &EmulateInstructionARM::EmulateUXTB, "uxtb<c>.w <Rd>,<Rm>{,<rotation>}" }
                   
     };
 



From ctice at apple.com  Thu Mar  3 12:48:59 2011
From: ctice at apple.com (Caroline Tice)
Date: Thu, 03 Mar 2011 18:48:59 -0000
Subject: [Lldb-commits] [lldb] r126954 -
 /lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
Message-ID: <20110303184859.342A42A6C12C@llvm.org>

Author: ctice
Date: Thu Mar  3 12:48:58 2011
New Revision: 126954

URL: http://llvm.org/viewvc/llvm-project?rev=126954&view=rev
Log:

Add code to emulate UXTH Arm instruction.


Modified:
    lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp

Modified: lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp?rev=126954&r1=126953&r2=126954&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp (original)
+++ lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp Thu Mar  3 12:48:58 2011
@@ -7667,6 +7667,88 @@
     return true;
 }
                   
+// UXTH extracts a 16-bit value from a register, zero-extends it to 32 bits, and writes the result to the destination 
+// register.  You can specify a rotation by 0, 8, 16, or 24 bits before extracting the 16-bit value.
+bool 
+EmulateInstructionARM::EmulateUXTH (ARMEncoding encoding)
+{
+#if 0
+    if ConditionPassed() then 
+        EncodingSpecificOperations(); 
+        rotated = ROR(R[m], rotation); 
+        R[d] = ZeroExtend(rotated<15:0>, 32);
+#endif
+                  
+    bool success = false;
+    const uint32_t opcode = OpcodeAsUnsigned (&success);
+    if (!success)
+        return false;
+                  
+    if (ConditionPassed ())
+    {
+        uint32_t d;
+        uint32_t m;
+        uint32_t rotation;
+                  
+        switch (encoding)
+        {
+            case eEncodingT1:
+                // d = UInt(Rd); m = UInt(Rm); rotation = 0;
+                d = Bits32 (opcode, 2, 0);
+                m = Bits32 (opcode, 5, 3);
+                rotation = 0;
+                  
+                break;
+                  
+            case eEncodingT2:
+                // d = UInt(Rd); m = UInt(Rm); rotation = UInt(rotate:???000???); 
+                d = Bits32 (opcode, 11, 8);
+                m = Bits32 (opcode, 3, 0);
+                rotation = Bits32 (opcode, 5, 4) << 3;
+                  
+                // if BadReg(d) || BadReg(m) then UNPREDICTABLE;
+                if (BadReg (d) || BadReg (m))
+                  return false;
+                  
+                break;
+                  
+            case eEncodingA1:
+                // d = UInt(Rd); m = UInt(Rm); rotation = UInt(rotate:???000???); 
+                d = Bits32 (opcode, 15, 12);
+                m = Bits32 (opcode, 3, 0);
+                rotation = Bits32 (opcode, 11, 10) << 3;
+                  
+                // if d == 15 || m == 15 then UNPREDICTABLE;
+                if ((d == 15) || (m == 15))
+                    return false;
+                  
+                break;
+                  
+            default:
+                return false;
+        }
+                  
+        uint64_t Rm = ReadRegisterUnsigned (eRegisterKindDWARF, dwarf_r0 + m, 0, &success);
+        if (!success)
+            return false;
+                  
+        // rotated = ROR(R[m], rotation); 
+        uint64_t rotated = ROR (Rm, rotation);
+                  
+        // R[d] = ZeroExtend(rotated<15:0>, 32);
+        Register source_reg;
+        source_reg.SetRegister (eRegisterKindDWARF, dwarf_r0 + m);
+                  
+        EmulateInstruction::Context context;
+        context.type = eContextRegisterLoad;
+        context.SetRegister (source_reg);
+                  
+        if (!WriteRegisterUnsigned (context, eRegisterKindDWARF, dwarf_r0 + d, Bits32 (rotated, 15, 0)))
+            return false;
+    }
+    return true;
+}
+                  
 // Bitwise Exclusive OR (immediate) performs a bitwise exclusive OR of a register value and an immediate value,
 // and writes the result to the destination register.  It can optionally update the condition flags based on
 // the result.
@@ -9064,7 +9146,8 @@
         //----------------------------------------------------------------------
         { 0x0fff00f0, 0x06af00f0, ARMV6_ABOVE,  eEncodingA1, eSize32, &EmulateInstructionARM::EmulateSXTB, "sxtb<c> <Rd>,<Rm>{,<rotation>}" },
         { 0x0fff00f0, 0x06bf0070, ARMV6_ABOVE,  eEncodingA1, eSize32, &EmulateInstructionARM::EmulateSXTH, "sxth<c> <Rd>,<Rm>{,<rotation>}" },
-        { 0x0fff00f0, 0x06ef0070, ARMV6_ABOVE,  eEncodingA1, eSize32, &EmulateInstructionARM::EmulateUXTB, "uxtb<c> <Rd>,<Rm>{,<rotation>}" }
+        { 0x0fff00f0, 0x06ef0070, ARMV6_ABOVE,  eEncodingA1, eSize32, &EmulateInstructionARM::EmulateUXTB, "uxtb<c> <Rd>,<Rm>{,<rotation>}" },
+        { 0x0fff00f0, 0x06ff0070, ARMV6_ABOVE,  eEncodingA1, eSize32, &EmulateInstructionARM::EmulateUXTH, "uxth<c> <Rd>,<Rm>{,<rotation>}" }
                   
     };
     static const size_t k_num_arm_opcodes = sizeof(g_arm_opcodes)/sizeof(ARMOpcode);
@@ -9343,7 +9426,9 @@
         { 0xffffffc0, 0x0000b200, ARMV6_ABOVE,   eEncodingT1, eSize16, &EmulateInstructionARM::EmulateSXTH, "sxth<c> <Rd>,<Rm>" },
         { 0xfffff080, 0xfa0ff080, ARMV6T2_ABOVE, eEncodingT2, eSize32, &EmulateInstructionARM::EmulateSXTH, "sxth<c>.w <Rd>,<Rm>{,<rotation>}" },
         { 0xffffffc0, 0x0000b2c0, ARMV6_ABOVE,   eEncodingT1, eSize16, &EmulateInstructionARM::EmulateUXTB, "uxtb<c> <Rd>,<Rm>" },
-        { 0xfffff080, 0xfa5ff080, ARMV6T2_ABOVE, eEncodingT2, eSize32, &EmulateInstructionARM::EmulateUXTB, "uxtb<c>.w <Rd>,<Rm>{,<rotation>}" }
+        { 0xfffff080, 0xfa5ff080, ARMV6T2_ABOVE, eEncodingT2, eSize32, &EmulateInstructionARM::EmulateUXTB, "uxtb<c>.w <Rd>,<Rm>{,<rotation>}" },
+        { 0xffffffc0, 0x0000b280, ARMV6_ABOVE,   eEncodingT1, eSize16, &EmulateInstructionARM::EmulateUXTH, "uxth<c> <Rd>,<Rm>" },
+        { 0xfffff080, 0xfa1ff080, ARMV6T2_ABOVE, eEncodingT2, eSize32, &EmulateInstructionARM::EmulateUXTH, "uxth<c>.w <Rd>,<Rm>{,<rotation>}" }
                   
     };
 



From johnny.chen at apple.com  Thu Mar  3 13:14:00 2011
From: johnny.chen at apple.com (Johnny Chen)
Date: Thu, 03 Mar 2011 19:14:00 -0000
Subject: [Lldb-commits] [lldb] r126955 - in /lldb/trunk/test: lldbutil.py
 python_api/function_symbol/ python_api/function_symbol/Makefile
 python_api/function_symbol/TestDisasmAPI.py
 python_api/function_symbol/main.c python_api/target/TestTargetAPI.py
Message-ID: <20110303191400.411852A6C12C@llvm.org>

Author: johnny
Date: Thu Mar  3 13:14:00 2011
New Revision: 126955

URL: http://llvm.org/viewvc/llvm-project?rev=126955&view=rev
Log:
Add TestDisasmAPI.py which exercises the newly added SBFunction/SBSymbol.GetStartAddress(),
among other things:

// When stopped on breakppint 1, we can get the line entry using SBFrame API
// SBFrame.GetLineEntry().  We'll get the start address for the the line entry
// with the SBAddress type, resolve the symbol context using the SBTarget API
// SBTarget.ResolveSymbolContextForAddress() in order to get the SBSymbol.
//
// We then stop at breakpoint 2, get the SBFrame, and the the SBFunction object.
//
// The address from calling GetStartAddress() on the symbol and the function
// should point to the same address, and we also verify that.

And add one utility function disassemble(target, function_or_symbol) to lldbutil.py:

    """Disassemble the function or symbol given a target.

    It returns the disassembly content in a string object.
    """

TestDisasm.py uses the disassemble() function to do disassembly on the SBSymbol, and
then the SBFunction object.

Added:
    lldb/trunk/test/python_api/function_symbol/
    lldb/trunk/test/python_api/function_symbol/Makefile
    lldb/trunk/test/python_api/function_symbol/TestDisasmAPI.py
    lldb/trunk/test/python_api/function_symbol/main.c
Modified:
    lldb/trunk/test/lldbutil.py
    lldb/trunk/test/python_api/target/TestTargetAPI.py

Modified: lldb/trunk/test/lldbutil.py
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/test/lldbutil.py?rev=126955&r1=126954&r2=126955&view=diff
==============================================================================
--- lldb/trunk/test/lldbutil.py (original)
+++ lldb/trunk/test/lldbutil.py Thu Mar  3 13:14:00 2011
@@ -41,6 +41,22 @@
         yield elem(i)
 
 
+# ===================================================
+# Disassembly for an SBFunction or an SBSymbol object
+# ===================================================
+
+def disassemble(target, function_or_symbol):
+    """Disassemble the function or symbol given a target.
+
+    It returns the disassembly content in a string object.
+    """
+    buf = StringIO.StringIO()
+    insts = function_or_symbol.GetInstructions(target)
+    for i in lldb_iter(insts, 'GetSize', 'GetInstructionAtIndex'):
+        print >> buf, i
+    return buf.getvalue()
+
+
 # ==========================================================
 # Integer (byte size 1, 2, 4, and 8) to bytearray conversion
 # ==========================================================

Added: lldb/trunk/test/python_api/function_symbol/Makefile
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/test/python_api/function_symbol/Makefile?rev=126955&view=auto
==============================================================================
--- lldb/trunk/test/python_api/function_symbol/Makefile (added)
+++ lldb/trunk/test/python_api/function_symbol/Makefile Thu Mar  3 13:14:00 2011
@@ -0,0 +1,5 @@
+LEVEL = ../../make
+
+C_SOURCES := main.c
+
+include $(LEVEL)/Makefile.rules

Added: lldb/trunk/test/python_api/function_symbol/TestDisasmAPI.py
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/test/python_api/function_symbol/TestDisasmAPI.py?rev=126955&view=auto
==============================================================================
--- lldb/trunk/test/python_api/function_symbol/TestDisasmAPI.py (added)
+++ lldb/trunk/test/python_api/function_symbol/TestDisasmAPI.py Thu Mar  3 13:14:00 2011
@@ -0,0 +1,121 @@
+"""
+Test retrieval of SBAddress from function/symbol, disassembly, and SBAddress APIs.
+"""
+
+import os, time
+import re
+import unittest2
+import lldb, lldbutil
+from lldbtest import *
+
+class DisasmAPITestCase(TestBase):
+
+    mydir = os.path.join("python_api", "function_symbol")
+
+    @unittest2.skipUnless(sys.platform.startswith("darwin"), "requires Darwin")
+    @python_api_test
+    def test_with_dsym(self):
+        """Exercise getting SBAddress objects, disassembly, and SBAddress APIs."""
+        self.buildDsym()
+        self.disasm_and_address_api()
+
+    @python_api_test
+    def test_with_dwarf(self):
+        """Exercise getting SBAddress objects, disassembly, and SBAddress APIs."""
+        self.buildDwarf()
+        self.disasm_and_address_api()
+
+    def setUp(self):
+        # Call super's setUp().
+        TestBase.setUp(self)
+        # Find the line number to of function 'c'.
+        self.line1 = line_number('main.c', '// Find the line number for breakpoint 1 here.')
+        self.line2 = line_number('main.c', '// Find the line number for breakpoint 2 here.')
+
+    def disasm_and_address_api(self):
+        """Exercise getting SBAddress objects, disassembly, and SBAddress APIs."""
+        exe = os.path.join(os.getcwd(), "a.out")
+
+        # Create a target by the debugger.
+        target = self.dbg.CreateTarget(exe)
+        self.assertTrue(target.IsValid(), VALID_TARGET)
+
+        # Now create the two breakpoints inside function 'a'.
+        breakpoint1 = target.BreakpointCreateByLocation('main.c', self.line1)
+        breakpoint2 = target.BreakpointCreateByLocation('main.c', self.line2)
+        #print "breakpoint1:", breakpoint1
+        #print "breakpoint2:", breakpoint2
+        self.assertTrue(breakpoint1.IsValid() and
+                        breakpoint1.GetNumLocations() == 1,
+                        VALID_BREAKPOINT)
+        self.assertTrue(breakpoint2.IsValid() and
+                        breakpoint2.GetNumLocations() == 1,
+                        VALID_BREAKPOINT)
+
+        # Now launch the process, and do not stop at entry point.
+        error = lldb.SBError()
+        self.process = target.Launch (self.dbg.GetListener(), None, None, os.ctermid(), os.ctermid(), os.ctermid(), None, 0, False, error)
+
+        self.process = target.GetProcess()
+        self.assertTrue(self.process.IsValid(), PROCESS_IS_VALID)
+
+        # Frame #0 should be on self.line1.
+        self.assertTrue(self.process.GetState() == lldb.eStateStopped)
+        thread = lldbutil.get_stopped_thread(self.process, lldb.eStopReasonBreakpoint)
+        self.assertTrue(thread != None, "There should be a thread stopped due to breakpoint condition")
+        frame0 = thread.GetFrameAtIndex(0)
+        lineEntry = frame0.GetLineEntry()
+        self.assertTrue(lineEntry.GetLine() == self.line1)
+
+        address1 = lineEntry.GetStartAddress()
+        #print "address1:", address1
+
+        # Now call SBTarget.ResolveSymbolContextForAddress() with address1.
+        context1 = target.ResolveSymbolContextForAddress(address1, lldb.eSymbolContextEverything)
+
+        self.assertTrue(context1.IsValid())
+        print "context1:", context1
+
+        # Continue the inferior, the breakpoint 2 should be hit.
+        self.process.Continue()
+        self.assertTrue(self.process.GetState() == lldb.eStateStopped)
+        thread = lldbutil.get_stopped_thread(self.process, lldb.eStopReasonBreakpoint)
+        self.assertTrue(thread != None, "There should be a thread stopped due to breakpoint condition")
+        frame0 = thread.GetFrameAtIndex(0)
+        lineEntry = frame0.GetLineEntry()
+        self.assertTrue(lineEntry.GetLine() == self.line2)
+
+        # Verify that the symbol and the function has the same address range per function 'a'.
+        symbol = context1.GetSymbol()
+        function = frame0.GetFunction()
+        self.assertTrue(symbol.IsValid() and function.IsValid())
+
+        print "symbol:", symbol
+        print "disassembly=>\n", lldbutil.disassemble(target, symbol)
+
+        print "function:", function
+        print "disassembly=>\n", lldbutil.disassemble(target, function)
+
+        sa1 = symbol.GetStartAddress()
+        #print "sa1:", sa1
+        #ea1 = symbol.GetEndAddress()
+        #print "ea1:", ea1
+        sa2 = function.GetStartAddress()
+        #print "sa2:", sa2
+        #ea2 = function.GetEndAddress()
+        #print "ea2:", ea2
+
+        stream1 = lldb.SBStream()
+        sa1.GetDescription(stream1)
+        stream2 = lldb.SBStream()
+        sa2.GetDescription(stream2)
+
+        self.expect(stream1.GetData(), "The two starting addresses should be the same", exe=False,
+            startstr = stream2.GetData())
+
+        
+if __name__ == '__main__':
+    import atexit
+    lldb.SBDebugger.Initialize()
+    atexit.register(lambda: lldb.SBDebugger.Terminate())
+    unittest2.main()

Added: lldb/trunk/test/python_api/function_symbol/main.c
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/test/python_api/function_symbol/main.c?rev=126955&view=auto
==============================================================================
--- lldb/trunk/test/python_api/function_symbol/main.c (added)
+++ lldb/trunk/test/python_api/function_symbol/main.c Thu Mar  3 13:14:00 2011
@@ -0,0 +1,60 @@
+//===-- main.c --------------------------------------------------*- C++ -*-===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+#include <stdio.h>
+
+// This simple program is to test the lldb Python APIs SBTarget, SBFrame,
+// SBFunction, SBSymbol, and SBAddress.
+//
+// When stopped on breakppint 1, we can get the line entry using SBFrame API
+// SBFrame.GetLineEntry().  We'll get the start address for the the line entry
+// with the SBAddress type, resolve the symbol context using the SBTarget API
+// SBTarget.ResolveSymbolContextForAddress() in order to get the SBSymbol.
+//
+// We then stop at breakpoint 2, get the SBFrame, and the the SBFunction object.
+//
+// The address from calling GetStartAddress() on the symbol and the function
+// should point to the same address, and we also verify that.
+
+int a(int);
+int b(int);
+int c(int);
+
+int a(int val)
+{
+    if (val <= 1) // Find the line number for breakpoint 1 here.
+        val = b(val);
+    else if (val >= 3)
+        val = c(val);
+
+    return val; // Find the line number for breakpoint 2 here.
+}
+
+int b(int val)
+{
+    return c(val);
+}
+
+int c(int val)
+{
+    return val + 3;
+}
+
+int main (int argc, char const *argv[])
+{
+    int A1 = a(1);  // a(1) -> b(1) -> c(1)
+    printf("a(1) returns %d\n", A1);
+    
+    int B2 = b(2);  // b(2) -> c(2)
+    printf("b(2) returns %d\n", B2);
+    
+    int A3 = a(3);  // a(3) -> c(3)
+    printf("a(3) returns %d\n", A3);
+    
+    return 0;
+}

Modified: lldb/trunk/test/python_api/target/TestTargetAPI.py
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/test/python_api/target/TestTargetAPI.py?rev=126955&r1=126954&r2=126955&view=diff
==============================================================================
--- lldb/trunk/test/python_api/target/TestTargetAPI.py (original)
+++ lldb/trunk/test/python_api/target/TestTargetAPI.py Thu Mar  3 13:14:00 2011
@@ -43,8 +43,8 @@
         # Now create the two breakpoints inside function 'a'.
         breakpoint1 = target.BreakpointCreateByLocation('main.c', self.line1)
         breakpoint2 = target.BreakpointCreateByLocation('main.c', self.line2)
-        print "breakpoint1:", breakpoint1
-        print "breakpoint2:", breakpoint2
+        #print "breakpoint1:", breakpoint1
+        #print "breakpoint2:", breakpoint2
         self.assertTrue(breakpoint1.IsValid() and
                         breakpoint1.GetNumLocations() == 1,
                         VALID_BREAKPOINT)
@@ -62,7 +62,8 @@
         # Frame #0 should be on self.line1.
         self.assertTrue(self.process.GetState() == lldb.eStateStopped)
         thread = lldbutil.get_stopped_thread(self.process, lldb.eStopReasonBreakpoint)
-        self.runCmd("process status")
+        self.assertTrue(thread != None, "There should be a thread stopped due to breakpoint condition")
+        #self.runCmd("process status")
         frame0 = thread.GetFrameAtIndex(0)
         lineEntry = frame0.GetLineEntry()
         self.assertTrue(lineEntry.GetLine() == self.line1)
@@ -73,30 +74,31 @@
         self.process.Continue()
         self.assertTrue(self.process.GetState() == lldb.eStateStopped)
         thread = lldbutil.get_stopped_thread(self.process, lldb.eStopReasonBreakpoint)
-        self.runCmd("process status")
+        self.assertTrue(thread != None, "There should be a thread stopped due to breakpoint condition")
+        #self.runCmd("process status")
         frame0 = thread.GetFrameAtIndex(0)
         lineEntry = frame0.GetLineEntry()
         self.assertTrue(lineEntry.GetLine() == self.line2)
 
         address2 = lineEntry.GetStartAddress()
 
-        print "address1:", address1
-        print "address2:", address2
+        #print "address1:", address1
+        #print "address2:", address2
 
         # Now call SBTarget.ResolveSymbolContextForAddress() with the addresses from our line entry.
         context1 = target.ResolveSymbolContextForAddress(address1, lldb.eSymbolContextEverything)
         context2 = target.ResolveSymbolContextForAddress(address2, lldb.eSymbolContextEverything)
 
         self.assertTrue(context1.IsValid() and context2.IsValid())
-        print "context1:", context1
-        print "context2:", context2
+        #print "context1:", context1
+        #print "context2:", context2
 
         # Verify that the context point to the same function 'a'.
         symbol1 = context1.GetSymbol()
         symbol2 = context2.GetSymbol()
         self.assertTrue(symbol1.IsValid() and symbol2.IsValid())
-        print "symbol1:", symbol1
-        print "symbol2:", symbol2
+        #print "symbol1:", symbol1
+        #print "symbol2:", symbol2
 
         stream1 = lldb.SBStream()
         symbol1.GetDescription(stream1)



From ctice at apple.com  Thu Mar  3 16:37:46 2011
From: ctice at apple.com (Caroline Tice)
Date: Thu, 03 Mar 2011 22:37:46 -0000
Subject: [Lldb-commits] [lldb] r126965 - in /lldb/trunk:
 include/lldb/Core/EmulateInstruction.h
 source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
 source/Plugins/Instruction/ARM/EmulateInstructionARM.h
Message-ID: <20110303223746.EE91F2A6C12C@llvm.org>

Author: ctice
Date: Thu Mar  3 16:37:46 2011
New Revision: 126965

URL: http://llvm.org/viewvc/llvm-project?rev=126965&view=rev
Log:

Add code to emulate RFE Arm instruction.

Add new instruction context for RFE instruction.

Add several new helper functions to help emulate RFE instruction
(including CurrentModeIsPrivileged, BadMode, and CPSRWriteByInstr).



Modified:
    lldb/trunk/include/lldb/Core/EmulateInstruction.h
    lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
    lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.h

Modified: lldb/trunk/include/lldb/Core/EmulateInstruction.h
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/include/lldb/Core/EmulateInstruction.h?rev=126965&r1=126964&r2=126965&view=diff
==============================================================================
--- lldb/trunk/include/lldb/Core/EmulateInstruction.h (original)
+++ lldb/trunk/include/lldb/Core/EmulateInstruction.h Thu Mar  3 16:37:46 2011
@@ -171,7 +171,8 @@
         eContextWriteMemoryRandomBits,
         
         eContextMultiplication,
-        eContextAddition
+        eContextAddition,
+        eContextReturnFromException
     };
     
     enum InfoType {

Modified: lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp?rev=126965&r1=126964&r2=126965&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp (original)
+++ lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp Thu Mar  3 16:37:46 2011
@@ -7748,6 +7748,156 @@
     }
     return true;
 }
+                 
+// RFE (Return From Exception) loads the PC and the CPSR from the word at the specified address and the following 
+// word respectively.  
+bool
+EmulateInstructionARM::EmulateRFE (ARMEncoding encoding)
+{
+#if 0
+    if ConditionPassed() then 
+        EncodingSpecificOperations(); 
+        if !CurrentModeIsPrivileged() || CurrentInstrSet() == InstrSet_ThumbEE then
+            UNPREDICTABLE; 
+        else
+            address = if increment then R[n] else R[n]-8; 
+            if wordhigher then address = address+4; 
+            CPSRWriteByInstr(MemA[address+4,4], ???1111???, TRUE); 
+            BranchWritePC(MemA[address,4]);
+            if wback then R[n] = if increment then R[n]+8 else R[n]-8;
+#endif
+                  
+    bool success = false;
+    const uint32_t opcode = OpcodeAsUnsigned (&success);
+    if (!success)
+        return false;
+                  
+    if (ConditionPassed())
+    {
+        uint32_t n;
+        bool wback;
+        bool increment;
+        bool wordhigher;
+                  
+        // EncodingSpecificOperations(); 
+        switch (encoding)
+        {
+            case eEncodingT1:
+                // n = UInt(Rn); wback = (W == ???1???); increment = FALSE; wordhigher = FALSE; 
+                n = Bits32 (opcode, 19, 16);
+                wback = BitIsSet (opcode, 21);
+                increment = false;
+                wordhigher = false;
+                  
+                // if n == 15 then UNPREDICTABLE; 
+                if (n == 15)
+                    return false;
+                  
+                // if InITBlock() && !LastInITBlock() then UNPREDICTABLE;
+                if (InITBlock() && !LastInITBlock())
+                    return false;
+                  
+                break;
+                  
+            case eEncodingT2:
+                // n = UInt(Rn); wback = (W == ???1???); increment = TRUE; wordhigher = FALSE; 
+                n = Bits32 (opcode, 19, 16);
+                wback = BitIsSet (opcode, 21);
+                increment = true;
+                wordhigher = false;
+                  
+                // if n == 15 then UNPREDICTABLE; 
+                if (n == 15)
+                    return false;
+                  
+                // if InITBlock() && !LastInITBlock() then UNPREDICTABLE;
+                if (InITBlock() && !LastInITBlock())
+                    return false;
+                  
+                break;
+                  
+            case eEncodingA1:
+                // n = UInt(Rn); 
+                n = Bits32 (opcode, 19, 16);
+                  
+                // wback = (W == ???1???); inc = (U == ???1???); wordhigher = (P == U); 
+                wback = BitIsSet (opcode, 21);
+                increment = BitIsSet (opcode, 23);
+                wordhigher = (Bit32 (opcode, 24) == Bit32 (opcode, 23));
+                  
+                // if n == 15 then UNPREDICTABLE;
+                if (n == 15)
+                    return false;
+                  
+                break;
+                  
+            default:
+                return false;
+        }
+                                    
+        // if !CurrentModeIsPrivileged() || CurrentInstrSet() == InstrSet_ThumbEE then
+        if (!CurrentModeIsPrivileged ())
+            // UNPREDICTABLE; 
+            return false;
+        else
+        {
+            uint64_t Rn = ReadRegisterUnsigned (eRegisterKindDWARF, dwarf_r0 + n, 0, &success);
+            if (!success)
+                return false;
+                  
+            addr_t address;
+            // address = if increment then R[n] else R[n]-8; 
+            if (increment)
+                address = Rn;
+            else
+                address = Rn - 8;
+                  
+            // if wordhigher then address = address+4; 
+            if (wordhigher)
+                address = address + 4;
+                  
+            // CPSRWriteByInstr(MemA[address+4,4], ???1111???, TRUE);
+            Register base_reg;
+            base_reg.SetRegister (eRegisterKindDWARF, dwarf_r0 + n);
+                  
+            EmulateInstruction::Context context;
+            context.type = eContextReturnFromException;
+            context.SetRegisterPlusOffset (base_reg, address - Rn);
+                  
+            uint64_t data = MemARead (context, address + 4, 4, 0, &success);
+            if (!success)
+                return false;
+                  
+            CPSRWriteByInstr (data, 15, true);
+                  
+            // BranchWritePC(MemA[address,4]);
+            uint64_t data2 = MemARead (context, address, 4, 0, &success);
+            if (!success)
+                return false;
+                  
+            BranchWritePC (context, data2);
+                  
+            // if wback then R[n] = if increment then R[n]+8 else R[n]-8;
+            if (wback)
+            {
+                context.type = eContextAdjustBaseRegister;
+                if (increment)
+                {
+                    context.SetOffset (8);
+                    if (!WriteRegisterUnsigned (context, eRegisterKindDWARF, dwarf_r0 + n, Rn + 8))
+                        return false;
+                }
+                else
+                {
+                    context.SetOffset (-8);
+                    if (!WriteRegisterUnsigned (context, eRegisterKindDWARF, dwarf_r0 + n, Rn - 8))
+                        return false;
+                }
+            } // if wback
+        }
+    } // if ConditionPassed()
+    return true;
+}
                   
 // Bitwise Exclusive OR (immediate) performs a bitwise exclusive OR of a register value and an immediate value,
 // and writes the result to the destination register.  It can optionally update the condition flags based on
@@ -9147,7 +9297,8 @@
         { 0x0fff00f0, 0x06af00f0, ARMV6_ABOVE,  eEncodingA1, eSize32, &EmulateInstructionARM::EmulateSXTB, "sxtb<c> <Rd>,<Rm>{,<rotation>}" },
         { 0x0fff00f0, 0x06bf0070, ARMV6_ABOVE,  eEncodingA1, eSize32, &EmulateInstructionARM::EmulateSXTH, "sxth<c> <Rd>,<Rm>{,<rotation>}" },
         { 0x0fff00f0, 0x06ef0070, ARMV6_ABOVE,  eEncodingA1, eSize32, &EmulateInstructionARM::EmulateUXTB, "uxtb<c> <Rd>,<Rm>{,<rotation>}" },
-        { 0x0fff00f0, 0x06ff0070, ARMV6_ABOVE,  eEncodingA1, eSize32, &EmulateInstructionARM::EmulateUXTH, "uxth<c> <Rd>,<Rm>{,<rotation>}" }
+        { 0x0fff00f0, 0x06ff0070, ARMV6_ABOVE,  eEncodingA1, eSize32, &EmulateInstructionARM::EmulateUXTH, "uxth<c> <Rd>,<Rm>{,<rotation>}" },
+        { 0xfe500000, 0xf8100000, ARMV6_ABOVE,  eEncodingA1, eSize32, &EmulateInstructionARM::EmulateRFE, "rfe{<amode>} <Rn>{!}" }
                   
     };
     static const size_t k_num_arm_opcodes = sizeof(g_arm_opcodes)/sizeof(ARMOpcode);
@@ -9428,7 +9579,9 @@
         { 0xffffffc0, 0x0000b2c0, ARMV6_ABOVE,   eEncodingT1, eSize16, &EmulateInstructionARM::EmulateUXTB, "uxtb<c> <Rd>,<Rm>" },
         { 0xfffff080, 0xfa5ff080, ARMV6T2_ABOVE, eEncodingT2, eSize32, &EmulateInstructionARM::EmulateUXTB, "uxtb<c>.w <Rd>,<Rm>{,<rotation>}" },
         { 0xffffffc0, 0x0000b280, ARMV6_ABOVE,   eEncodingT1, eSize16, &EmulateInstructionARM::EmulateUXTH, "uxth<c> <Rd>,<Rm>" },
-        { 0xfffff080, 0xfa1ff080, ARMV6T2_ABOVE, eEncodingT2, eSize32, &EmulateInstructionARM::EmulateUXTH, "uxth<c>.w <Rd>,<Rm>{,<rotation>}" }
+        { 0xfffff080, 0xfa1ff080, ARMV6T2_ABOVE, eEncodingT2, eSize32, &EmulateInstructionARM::EmulateUXTH, "uxth<c>.w <Rd>,<Rm>{,<rotation>}" },
+        { 0xffd00000, 0xe8100000, ARMV6T2_ABOVE, eEncodingT1, eSize32, &EmulateInstructionARM::EmulateRFE, "rfedb<c> <Rn>{!}" },
+        { 0xffd00000, 0xe9900000, ARMV6T2_ABOVE, eEncodingT2, eSize32, &EmulateInstructionARM::EmulateRFE, "rfe{ia}<c> <Rn>{!}" }
                   
     };
 
@@ -9608,6 +9761,83 @@
     return CurrentInstrSet() == eModeThumb && m_it_session.LastInITBlock();
 }
 
+bool 
+EmulateInstructionARM::BadMode (uint32_t mode)
+{
+                  
+    switch (mode)
+    {
+        case 16: return false; // '10000'
+        case 17: return false; // '10001'
+        case 18: return false; // '10010'
+        case 19: return false; // '10011'
+        case 22: return false; // '10110'
+        case 23: return false; // '10111'
+        case 27: return false; // '11011'
+        case 31: return false; // '11111'
+        default: return true;
+    }
+    return true;
+}
+                
+bool
+EmulateInstructionARM::CurrentModeIsPrivileged ()
+{
+    uint32_t mode = Bits32 (m_inst_cpsr, 4, 0);
+                  
+    if (BadMode (mode))
+        return false;
+                  
+    if (mode == 16)
+                  return false;
+                
+    return true;
+}
+
+void
+EmulateInstructionARM::CPSRWriteByInstr (uint32_t value, uint32_t bytemask, bool affect_execstate)
+{
+    bool privileged = CurrentModeIsPrivileged();
+
+    uint32_t tmp_cpsr = 0;
+        
+    tmp_cpsr = tmp_cpsr | (Bits32 (m_inst_cpsr, 23, 20) << 20);
+                  
+    if (BitIsSet (bytemask, 3))
+    {
+        tmp_cpsr = tmp_cpsr | (Bits32 (value, 31, 27) << 27);
+        if (affect_execstate)
+            tmp_cpsr = tmp_cpsr | (Bits32 (value, 26, 24) << 24);
+    }
+                  
+    if (BitIsSet (bytemask, 2))
+    {
+        tmp_cpsr = tmp_cpsr | (Bits32 (value, 19, 16) << 16);
+    }
+                  
+    if (BitIsSet (bytemask, 1))
+    {
+        if (affect_execstate)
+            tmp_cpsr = tmp_cpsr | (Bits32 (value, 15, 10) << 10);
+        tmp_cpsr = tmp_cpsr | (Bit32 (value, 9) << 9);
+        if (privileged)
+            tmp_cpsr = tmp_cpsr | (Bit32 (value, 8) << 8);
+    }
+                
+    if (BitIsSet (bytemask, 0))
+    {
+        if (privileged)
+            tmp_cpsr = tmp_cpsr | (Bits32 (value, 7, 6) << 6);
+        if (affect_execstate)
+            tmp_cpsr = tmp_cpsr | (Bit32 (value, 5) << 5);
+        if (privileged)
+            tmp_cpsr = tmp_cpsr | Bits32 (value, 4, 0);
+    }
+                  
+    m_inst_cpsr = tmp_cpsr;
+}
+
+                  
 bool
 EmulateInstructionARM::BranchWritePC (const Context &context, uint32_t addr)
 {

Modified: lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.h
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.h?rev=126965&r1=126964&r2=126965&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.h (original)
+++ lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.h Thu Mar  3 16:37:46 2011
@@ -155,6 +155,15 @@
     // LastInITBlock - Returns true if we're in Thumb mode and the last instruction inside an IT Block.
     bool LastInITBlock();
 
+    bool 
+    BadMode (uint32_t mode);
+    
+    bool
+    CurrentModeIsPrivileged ();
+    
+    void
+    CPSRWriteByInstr (uint32_t value, uint32_t bytemask, bool affect_execstate);
+    
     bool
     BranchWritePC(const Context &context, uint32_t addr);
 



From scallanan at apple.com  Thu Mar  3 18:23:48 2011
From: scallanan at apple.com (Sean Callanan)
Date: Fri, 04 Mar 2011 00:23:48 -0000
Subject: [Lldb-commits] [lldb] r126973 -
	/lldb/trunk/source/Expression/ClangExpressionDeclMap.cpp
Message-ID: <20110304002348.2ACBB2A6C12C@llvm.org>

Author: spyffe
Date: Thu Mar  3 18:23:47 2011
New Revision: 126973

URL: http://llvm.org/viewvc/llvm-project?rev=126973&view=rev
Log:
Fixed a bug in the expression parser where the 'this'
or 'self' variable was not properly read if the compiler
optimized it into a register.

Modified:
    lldb/trunk/source/Expression/ClangExpressionDeclMap.cpp

Modified: lldb/trunk/source/Expression/ClangExpressionDeclMap.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Expression/ClangExpressionDeclMap.cpp?rev=126973&r1=126972&r2=126973&view=diff
==============================================================================
--- lldb/trunk/source/Expression/ClangExpressionDeclMap.cpp (original)
+++ lldb/trunk/source/Expression/ClangExpressionDeclMap.cpp Thu Mar  3 18:23:47 2011
@@ -551,41 +551,75 @@
         return false;
     }
     
-    if (location_value->GetValueType() == Value::eValueTypeLoadAddress)
+    switch (location_value->GetValueType())
     {
-        lldb::addr_t value_addr = location_value->GetScalar().ULongLong();
-        uint32_t address_byte_size = exe_ctx.target->GetArchitecture().GetAddressByteSize();
-        lldb::ByteOrder address_byte_order = exe_ctx.process->GetByteOrder();
-        
-        if (ClangASTType::GetClangTypeBitWidth(m_struct_vars->m_object_pointer_type.GetASTContext(), 
-                                               m_struct_vars->m_object_pointer_type.GetOpaqueQualType()) != address_byte_size * 8)
+    default:
+        err.SetErrorStringWithFormat("'%s' is not in memory; LLDB must be extended to handle registers", object_name.GetCString());
+        return false;
+    case Value::eValueTypeLoadAddress:
         {
-            err.SetErrorStringWithFormat("'%s' is not of an expected pointer size", object_name.GetCString());
-            return false;
+            lldb::addr_t value_addr = location_value->GetScalar().ULongLong();
+            uint32_t address_byte_size = exe_ctx.target->GetArchitecture().GetAddressByteSize();
+            lldb::ByteOrder address_byte_order = exe_ctx.process->GetByteOrder();
+            
+            if (ClangASTType::GetClangTypeBitWidth(m_struct_vars->m_object_pointer_type.GetASTContext(), 
+                                                   m_struct_vars->m_object_pointer_type.GetOpaqueQualType()) != address_byte_size * 8)
+            {
+                err.SetErrorStringWithFormat("'%s' is not of an expected pointer size", object_name.GetCString());
+                return false;
+            }
+            
+            DataBufferHeap data;
+            data.SetByteSize(address_byte_size);
+            Error read_error;
+            
+            if (exe_ctx.process->ReadMemory (value_addr, data.GetBytes(), address_byte_size, read_error) != address_byte_size)
+            {
+                err.SetErrorStringWithFormat("Coldn't read '%s' from the target: %s", object_name.GetCString(), read_error.AsCString());
+                return false;
+            }
+            
+            DataExtractor extractor(data.GetBytes(), data.GetByteSize(), address_byte_order, address_byte_size);
+            
+            uint32_t offset = 0;
+            
+            object_ptr = extractor.GetPointer(&offset);
+            
+            return true;
         }
-        
-        DataBufferHeap data;
-        data.SetByteSize(address_byte_size);
-        Error read_error;
-        
-        if (exe_ctx.process->ReadMemory (value_addr, data.GetBytes(), address_byte_size, read_error) != address_byte_size)
+    case Value::eValueTypeScalar:
         {
-            err.SetErrorStringWithFormat("Coldn't read '%s' from the target: %s", object_name.GetCString(), read_error.AsCString());
-            return false;
+            if (location_value->GetContextType() != Value::eContextTypeRegisterInfo)
+            {
+                StreamString ss;
+                location_value->Dump(&ss);
+                
+                err.SetErrorStringWithFormat("%s is a scalar of unhandled type: %s", object_name.GetCString(), ss.GetString().c_str());
+                return false;
+            }
+                        
+            lldb::RegisterInfo *register_info = location_value->GetRegisterInfo();
+            
+            if (!register_info)
+            {
+                err.SetErrorStringWithFormat("Couldn't get the register information for %s", object_name.GetCString());
+                return false;
+            }
+            
+            RegisterContext *register_context = exe_ctx.GetRegisterContext();
+            
+            if (!register_context)
+            {
+                err.SetErrorStringWithFormat("Couldn't read register context to read %s from %s", object_name.GetCString(), register_info->name);
+                return false;
+            }
+            
+            uint32_t register_number = register_info->kinds[lldb::eRegisterKindLLDB];
+            
+            object_ptr = register_context->ReadRegisterAsUnsigned(register_number, 0x0);
+            
+            return true;
         }
-        
-        DataExtractor extractor(data.GetBytes(), data.GetByteSize(), address_byte_order, address_byte_size);
-        
-        uint32_t offset = 0;
-        
-        object_ptr = extractor.GetPointer(&offset);
-        
-        return true;
-    }
-    else
-    {
-        err.SetErrorStringWithFormat("'%s' is not in memory; LLDB must be extended to handle registers", object_name.GetCString());
-        return false;
     }
 }
 



From johnny.chen at apple.com  Thu Mar  3 19:35:22 2011
From: johnny.chen at apple.com (Johnny Chen)
Date: Fri, 04 Mar 2011 01:35:22 -0000
Subject: [Lldb-commits] [lldb] r126979 - in /lldb/trunk/test: dotest.py
 logging/TestLogging.py source-manager/TestSourceManager.py
Message-ID: <20110304013522.408672A6C12C@llvm.org>

Author: johnny
Date: Thu Mar  3 19:35:22 2011
New Revision: 126979

URL: http://llvm.org/viewvc/llvm-project?rev=126979&view=rev
Log:
Add the ability for the test suite to specify a list of compilers and a list of architectures
on the command line.  For example, use '-A x86_64^i386' to launch the inferior use both x86_64
and i386.

This is an example of building the debuggee using both clang and gcc compiers:

[17:30:46] johnny:/Volumes/data/lldb/svn/trunk/test $ ./dotest.py -C clang^gcc -v -f SourceManagerTestCase.test_modify_source_file_while_debugging

Session logs for test failures/errors will go into directory '2011-03-03-17_31_39'
Command invoked: python ./dotest.py -C clang^gcc -v -f SourceManagerTestCase.test_modify_source_file_while_debugging

Configuration:  compiler=clang
----------------------------------------------------------------------
Collected 1 test

1: test_modify_source_file_while_debugging (TestSourceManager.SourceManagerTestCase)
   Modify a source file while debugging the executable. ... Command 'run' failed!

original content: #include <stdio.h>

int main(int argc, char const *argv[]) {
    printf("Hello world.\n"); // Set break point at this line.
    return 0;
}

new content: #include <stdio.h>

int main(int argc, char const *argv[]) {
    printf("Hello lldb.\n"); // Set break point at this line.
    return 0;
}

os.path.getmtime() after writing new content: 1299202305.0
content restored to: #include <stdio.h>

int main(int argc, char const *argv[]) {
    printf("Hello world.\n"); // Set break point at this line.
    return 0;
}

os.path.getmtime() after restore: 1299202307.0
ok

----------------------------------------------------------------------
Ran 1 test in 8.259s

OK

Configuration:  compiler=gcc
----------------------------------------------------------------------
Collected 1 test

1: test_modify_source_file_while_debugging (TestSourceManager.SourceManagerTestCase)
   Modify a source file while debugging the executable. ... original content: #include <stdio.h>

int main(int argc, char const *argv[]) {
    printf("Hello world.\n"); // Set break point at this line.
    return 0;
}

new content: #include <stdio.h>

int main(int argc, char const *argv[]) {
    printf("Hello lldb.\n"); // Set break point at this line.
    return 0;
}

os.path.getmtime() after writing new content: 1299202307.0
content restored to: #include <stdio.h>

int main(int argc, char const *argv[]) {
    printf("Hello world.\n"); // Set break point at this line.
    return 0;
}

os.path.getmtime() after restore: 1299202309.0
ok

----------------------------------------------------------------------
Ran 1 test in 2.301s

OK
[17:31:49] johnny:/Volumes/data/lldb/svn/trunk/test $ 

Modified:
    lldb/trunk/test/dotest.py
    lldb/trunk/test/logging/TestLogging.py
    lldb/trunk/test/source-manager/TestSourceManager.py

Modified: lldb/trunk/test/dotest.py
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/test/dotest.py?rev=126979&r1=126978&r2=126979&view=diff
==============================================================================
--- lldb/trunk/test/dotest.py (original)
+++ lldb/trunk/test/dotest.py Thu Mar  3 19:35:22 2011
@@ -69,6 +69,13 @@
 # The dictionary as a result of sourcing configFile.
 config = {}
 
+# The 'archs' and 'compilers' can be specified via either command line or configFile,
+# with the command line overriding the configFile.  When specified, they should be
+# of the list type.  For example, "-A x86_64^i386" => archs=['x86_64', 'i386'] and
+# "-C gcc^clang" => compilers=['gcc', 'clang'].
+archs = None
+compilers = None
+
 # Delay startup in order for the debugger to attach.
 delay = False
 
@@ -124,8 +131,12 @@
 Usage: dotest.py [option] [args]
 where options:
 -h   : print this help message and exit (also --help)
--A   : specify the architecture to launch for the inferior process
--C   : specify the compiler used to build the inferior executable
+-A   : specify the architecture(s) to launch for the inferior process
+       -A i386 => launch inferior with i386 architecture
+       -A x86_64^i386 => launch inferior with x86_64 and i386 architectures
+-C   : specify the compiler(s) used to build the inferior executable
+       -C clang => build debuggee using clang compiler
+       -C clang^gcc => build debuggee using clang and gcc compilers
 -D   : dump the Python sys.path variable
 -a   : don't do lldb Python API tests
        use @python_api_test to decorate a test case as lldb Python API test
@@ -133,6 +144,8 @@
        do not specify both '-a' and '+a' at the same time
 -b   : read a blacklist file specified after this option
 -c   : read a config file specified after this option
+       the architectures and compilers (note the plurals) specified via '-A' and '-C'
+       will override those specified via a config file
        (see also lldb-trunk/example/test/usage-config)
 -d   : delay startup for 10 seconds (in order for the debugger to attach)
 -F   : failfast, stop the test suite on the first error/failure
@@ -254,6 +267,8 @@
     global blacklist
     global blacklistConfig
     global configFile
+    global archs
+    global compilers
     global count
     global delay
     global dumpSysPath
@@ -288,14 +303,22 @@
             index += 1
             if index >= len(sys.argv) or sys.argv[index].startswith('-'):
                 usage()
-            os.environ["ARCH"] = sys.argv[index]
+            archSpec = sys.argv[index]
+            if archSpec.find('^') != -1:
+                archs = archSpec.split('^')
+            else:
+                os.environ["ARCH"] = archSpec
             index += 1
         elif sys.argv[index].startswith('-C'):
             # Increment by 1 to fetch the CC spec.
             index += 1
             if index >= len(sys.argv) or sys.argv[index].startswith('-'):
                 usage()
-            os.environ["CC"] = sys.argv[index]
+            ccSpec = sys.argv[index]
+            if ccSpec.find('^') != -1:
+                compilers = ccSpec.split('^')
+            else:
+                os.environ["CC"] = ccSpec
             index += 1
         elif sys.argv[index].startswith('-D'):
             dumpSysPath = True
@@ -737,20 +760,24 @@
 iterArchs = False
 iterCompilers = False
 
-from types import *
-if "archs" in config:
+if not archs and "archs" in config:
     archs = config["archs"]
-    if type(archs) is ListType and len(archs) >= 1:
-        iterArchs = True
-if "compilers" in config:
+
+if isinstance(archs, list) and len(archs) >= 1:
+    iterArchs = True
+
+if not compilers and "compilers" in config:
     compilers = config["compilers"]
-    if type(compilers) is ListType and len(compilers) >= 1:
-        iterCompilers = True
+
+if isinstance(compilers, list) and len(compilers) >= 1:
+    iterCompilers = True
 
 # Make a shallow copy of sys.path, we need to manipulate the search paths later.
 # This is only necessary if we are relocated and with different configurations.
-if rdir and (iterArchs or iterCompilers):
+if rdir:
     old_sys_path = sys.path[:]
+# If we iterate on archs or compilers, there is a chance we want to split stderr/stdout.
+if iterArchs or iterCompilers:
     old_stderr = sys.stderr
     old_stdout = sys.stdout
     new_stderr = None
@@ -770,37 +797,38 @@
             configString = archConfig
 
         if iterArchs or iterCompilers:
+            # Translate ' ' to '-' for pathname component.
+            from string import maketrans
+            tbl = maketrans(' ', '-')
+            configPostfix = configString.translate(tbl)
+
+            # Check whether we need to split stderr/stdout into configuration
+            # specific files.
+            if old_stderr.name != '<stderr>' and config.get('split_stderr'):
+                if new_stderr:
+                    new_stderr.close()
+                new_stderr = open("%s.%s" % (old_stderr.name, configPostfix), "w")
+                sys.stderr = new_stderr
+            if old_stdout.name != '<stdout>' and config.get('split_stdout'):
+                if new_stdout:
+                    new_stdout.close()
+                new_stdout = open("%s.%s" % (old_stdout.name, configPostfix), "w")
+                sys.stdout = new_stdout
+ 
             # If we specified a relocated directory to run the test suite, do
             # the extra housekeeping to copy the testdirs to a configStringified
             # directory and to update sys.path before invoking the test runner.
             # The purpose is to separate the configuration-specific directories
             # from each other.
             if rdir:
-                from string import maketrans
                 from shutil import copytree, ignore_patterns
 
-                # Translate ' ' to '-' for dir name.
-                tbl = maketrans(' ', '-')
-                configPostfix = configString.translate(tbl)
                 newrdir = "%s.%s" % (rdir, configPostfix)
 
                 # Copy the tree to a new directory with postfix name configPostfix.
                 copytree(rdir, newrdir, ignore=ignore_patterns('*.pyc', '*.o', '*.d'))
 
-                # Check whether we need to split stderr/stdout into configuration
-                # specific files.
-                if old_stderr.name != '<stderr>' and config.get('split_stderr'):
-                    if new_stderr:
-                        new_stderr.close()
-                    new_stderr = open("%s.%s" % (old_stderr.name, configPostfix), "w")
-                    sys.stderr = new_stderr
-                if old_stdout.name != '<stdout>' and config.get('split_stdout'):
-                    if new_stdout:
-                        new_stdout.close()
-                    new_stdout = open("%s.%s" % (old_stdout.name, configPostfix), "w")
-                    sys.stdout = new_stdout
-
-                # Update the LLDB_TEST environment variable to reflect new top
+               # Update the LLDB_TEST environment variable to reflect new top
                 # level test directory.
                 #
                 # See also lldbtest.TestBase.setUpClass(cls).

Modified: lldb/trunk/test/logging/TestLogging.py
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/test/logging/TestLogging.py?rev=126979&r1=126978&r2=126979&view=diff
==============================================================================
--- lldb/trunk/test/logging/TestLogging.py (original)
+++ lldb/trunk/test/logging/TestLogging.py Thu Mar  3 19:35:22 2011
@@ -25,7 +25,9 @@
         self.expect("file " + exe,
                     patterns = [ "Current executable set to .*a.out" ])
 
-        log_file = os.path.join (os.getcwd(), "lldb-commands-log-%s.txt" % type)
+        log_file = os.path.join (os.getcwd(), "lldb-commands-log-%s-%s-%s.txt" % (type,
+                                                                                  self.getCompiler(),
+                                                                                  self.getArchitecture()))
 
         if (os.path.exists (log_file)):
             os.remove (log_file)

Modified: lldb/trunk/test/source-manager/TestSourceManager.py
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/test/source-manager/TestSourceManager.py?rev=126979&r1=126978&r2=126979&view=diff
==============================================================================
--- lldb/trunk/test/source-manager/TestSourceManager.py (original)
+++ lldb/trunk/test/source-manager/TestSourceManager.py Thu Mar  3 19:35:22 2011
@@ -103,15 +103,24 @@
 
         # This is the function to restore the original content.
         def restore_file():
+            #print "os.path.getmtime() before restore:", os.path.getmtime('main.c')
+            time.sleep(1)
             with open('main.c', 'w') as f:
                 f.write(original_content)
             with open('main.c', 'r') as f:
                 print "content restored to:", f.read()
+            # Touch the file just to be sure.
+            os.utime('main.c', None)
+            print "os.path.getmtime() after restore:", os.path.getmtime('main.c')
+
+
 
         # Modify the source code file.
         with open('main.c', 'w') as f:
+            time.sleep(1)
             f.write(new_content)
             print "new content:", new_content
+            print "os.path.getmtime() after writing new content:", os.path.getmtime('main.c')
             # Add teardown hook to restore the file to the original content.
             self.addTearDownHook(restore_file)
 



From jmcilree at apple.com  Thu Mar  3 18:31:13 2011
From: jmcilree at apple.com (James McIlree)
Date: Fri, 04 Mar 2011 00:31:13 -0000
Subject: [Lldb-commits] [lldb] r126974 - in /lldb/trunk:
 include/lldb/API/SBProcess.h include/lldb/API/SBTarget.h
 source/API/SBProcess.cpp source/API/SBTarget.cpp
Message-ID: <20110304003113.938AE2A6C12C@llvm.org>

Author: jmcilree
Date: Thu Mar  3 18:31:13 2011
New Revision: 126974

URL: http://llvm.org/viewvc/llvm-project?rev=126974&view=rev
Log:
Expose ConnectRemote API through SBTarget and SBProcess.
Patch verified by Greg Clayton prior to checkin.


Modified:
    lldb/trunk/include/lldb/API/SBProcess.h
    lldb/trunk/include/lldb/API/SBTarget.h
    lldb/trunk/source/API/SBProcess.cpp
    lldb/trunk/source/API/SBTarget.cpp

Modified: lldb/trunk/include/lldb/API/SBProcess.h
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/include/lldb/API/SBProcess.h?rev=126974&r1=126973&r2=126974&view=diff
==============================================================================
--- lldb/trunk/include/lldb/API/SBProcess.h (original)
+++ lldb/trunk/include/lldb/API/SBProcess.h Thu Mar  3 18:31:13 2011
@@ -72,6 +72,27 @@
     AppendEventStateReport (const lldb::SBEvent &event, lldb::SBCommandReturnObject &result);
 
     //------------------------------------------------------------------
+    // Remote connection related functions. These will fail if the
+    // process is not in eStateConnected. They are intended for use
+    // when connecting to an externally managed debugserver instance.
+    //------------------------------------------------------------------
+    bool
+    RemoteAttachToProcessWithID (lldb::pid_t pid,
+                                 lldb::SBError& error);
+    
+    // See SBTarget.Launch for argument description and usage.
+    bool
+    RemoteLaunch (char const **argv,
+                  char const **envp,
+                  const char *stdin_path,
+                  const char *stdout_path,
+                  const char *stderr_path,
+                  const char *working_directory,
+                  uint32_t launch_flags,
+                  bool stop_at_entry,
+                  lldb::SBError& error);
+    
+    //------------------------------------------------------------------
     // Thread related functions
     //------------------------------------------------------------------
     uint32_t

Modified: lldb/trunk/include/lldb/API/SBTarget.h
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/include/lldb/API/SBTarget.h?rev=126974&r1=126973&r2=126974&view=diff
==============================================================================
--- lldb/trunk/include/lldb/API/SBTarget.h (original)
+++ lldb/trunk/include/lldb/API/SBTarget.h Thu Mar  3 18:31:13 2011
@@ -179,6 +179,12 @@
                              bool wait_for,     // if true wait for a new instance of "name" to be launched
                              lldb::SBError& error);   // An error explaining what went wrong if attach fails
 
+    lldb::SBProcess
+    ConnectRemote (SBListener &listener,
+                   const char *url,
+                   const char *plugin_name, // Can be NULL
+                   SBError& error);
+    
     lldb::SBFileSpec
     GetExecutable ();
 

Modified: lldb/trunk/source/API/SBProcess.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/API/SBProcess.cpp?rev=126974&r1=126973&r2=126974&view=diff
==============================================================================
--- lldb/trunk/source/API/SBProcess.cpp (original)
+++ lldb/trunk/source/API/SBProcess.cpp Thu Mar  3 18:31:13 2011
@@ -95,6 +95,88 @@
     return m_opaque_sp.get() != NULL;
 }
 
+bool
+SBProcess::RemoteLaunch (char const **argv,
+                         char const **envp,
+                         const char *stdin_path,
+                         const char *stdout_path,
+                         const char *stderr_path,
+                         const char *working_directory,
+                         uint32_t launch_flags,
+                         bool stop_at_entry,
+                         lldb::SBError& error)
+{
+    LogSP log(lldb_private::GetLogIfAllCategoriesSet (LIBLLDB_LOG_API));
+    if (log) {
+        log->Printf ("SBProcess(%p)::RemoteLaunch (argv=%p, envp=%p, stdin=%s, stdout=%s, stderr=%s, working-dir=%s, launch_flags=0x%x, stop_at_entry=%i, &error (%p))...",
+                     m_opaque_sp.get(), 
+                     argv, 
+                     envp, 
+                     stdin_path ? stdin_path : "NULL", 
+                     stdout_path ? stdout_path : "NULL", 
+                     stderr_path ? stderr_path : "NULL", 
+                     working_directory ? working_directory : "NULL",
+                     launch_flags, 
+                     stop_at_entry, 
+                     error.get());
+    }
+    
+    if (m_opaque_sp)
+    {
+        Mutex::Locker api_locker (m_opaque_sp->GetTarget().GetAPIMutex());
+        if (m_opaque_sp->GetState() == eStateConnected)
+        {
+            error.SetError (m_opaque_sp->Launch (argv, envp, launch_flags, stdin_path, stdout_path, stderr_path, working_directory));            
+        }
+        else
+        {
+            error.SetErrorString ("must be in eStateConnected to call RemoteLaunch");
+        }
+    }
+    else
+    {
+        error.SetErrorString ("unable to attach pid");
+    }
+    
+    if (log) {
+        SBStream sstr;
+        error.GetDescription (sstr);
+        log->Printf ("SBProcess(%p)::RemoteLaunch (...) => SBError (%p): %s", error.get(), sstr.GetData());
+    }
+    
+    return error.Success();
+}
+
+bool
+SBProcess::RemoteAttachToProcessWithID (lldb::pid_t pid, lldb::SBError& error)
+{
+    if (m_opaque_sp)
+    {
+        Mutex::Locker api_locker (m_opaque_sp->GetTarget().GetAPIMutex());
+        if (m_opaque_sp->GetState() == eStateConnected)
+        {
+            error.SetError (m_opaque_sp->Attach (pid));            
+        }
+        else
+        {
+            error.SetErrorString ("must be in eStateConnected to call RemoteAttachToProcessWithID");
+        }
+    }
+    else
+    {
+        error.SetErrorString ("unable to attach pid");
+    }
+
+    LogSP log(lldb_private::GetLogIfAllCategoriesSet (LIBLLDB_LOG_API));
+    if (log) {
+        SBStream sstr;
+        error.GetDescription (sstr);
+        log->Printf ("SBProcess(%p)::RemoteAttachToProcessWithID (%d) => SBError (%p): %s", error.get(), sstr.GetData());
+    }
+
+    return error.Success();
+}
+
 
 uint32_t
 SBProcess::GetNumThreads ()

Modified: lldb/trunk/source/API/SBTarget.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/API/SBTarget.cpp?rev=126974&r1=126973&r2=126974&view=diff
==============================================================================
--- lldb/trunk/source/API/SBTarget.cpp (original)
+++ lldb/trunk/source/API/SBTarget.cpp Thu Mar  3 18:31:13 2011
@@ -366,6 +366,41 @@
 
 }
 
+lldb::SBProcess
+SBTarget::ConnectRemote
+(
+    SBListener &listener,
+    const char *url,
+    const char *plugin_name,
+    SBError& error
+)
+{
+    SBProcess sb_process;
+    if (m_opaque_sp)
+    {
+        Mutex::Locker api_locker (m_opaque_sp->GetAPIMutex());
+        if (listener.IsValid())
+            sb_process.SetProcess (m_opaque_sp->CreateProcess (listener.ref(), plugin_name));
+        else
+            sb_process.SetProcess (m_opaque_sp->CreateProcess (m_opaque_sp->GetDebugger().GetListener(), plugin_name));
+        
+        
+        if (sb_process.IsValid())
+        {
+            error.SetError (sb_process->ConnectRemote (url));
+        }
+        else
+        {
+            error.SetErrorString ("unable to create lldb_private::Process");
+        }
+    }
+    else
+    {
+        error.SetErrorString ("SBTarget is invalid");
+    }
+    return sb_process;
+}
+
 SBFileSpec
 SBTarget::GetExecutable ()
 {



From johnny.chen at apple.com  Thu Mar  3 19:54:19 2011
From: johnny.chen at apple.com (Johnny Chen)
Date: Fri, 04 Mar 2011 01:54:19 -0000
Subject: [Lldb-commits] [lldb] r126980 - in /lldb/trunk/test/objc-optimized:
	./ Makefile main.m
Message-ID: <20110304015419.4B6652A6C12C@llvm.org>

Author: johnny
Date: Thu Mar  3 19:54:19 2011
New Revision: 126980

URL: http://llvm.org/viewvc/llvm-project?rev=126980&view=rev
Log:
Add objc source file and Makefile.  Test case to follow.

Added:
    lldb/trunk/test/objc-optimized/
    lldb/trunk/test/objc-optimized/Makefile
    lldb/trunk/test/objc-optimized/main.m

Added: lldb/trunk/test/objc-optimized/Makefile
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/test/objc-optimized/Makefile?rev=126980&view=auto
==============================================================================
--- lldb/trunk/test/objc-optimized/Makefile (added)
+++ lldb/trunk/test/objc-optimized/Makefile Thu Mar  3 19:54:19 2011
@@ -0,0 +1,8 @@
+LEVEL = ../make
+
+OBJC_SOURCES := main.m
+
+CFLAGS = -arch $(ARCH) -gdwarf-2 -O2
+LDFLAGS = $(CFLAGS) -lobjc -framework Foundation
+
+include $(LEVEL)/Makefile.rules

Added: lldb/trunk/test/objc-optimized/main.m
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/test/objc-optimized/main.m?rev=126980&view=auto
==============================================================================
--- lldb/trunk/test/objc-optimized/main.m (added)
+++ lldb/trunk/test/objc-optimized/main.m Thu Mar  3 19:54:19 2011
@@ -0,0 +1,45 @@
+#import <Foundation/Foundation.h>
+
+ at interface MyClass : NSObject {
+  int member;
+}
+
+- (id)initWithMember:(int)_member;
+- (NSString*)description;
+ at end
+
+ at implementation MyClass
+
+- (id)initWithMember:(int)_member
+{
+    if (self = [super init])
+    {
+      member = _member;
+    }
+    return self;
+}
+
+- (void)dealloc
+{
+    [super dealloc];
+}
+
+- (NSString *)description
+{
+    // Set a breakpoint on '-[MyClass description]' and test expressions: expr member
+
+    return [NSString stringWithFormat:@"%d", member];
+}
+ at end
+
+int main (int argc, char const *argv[])
+{
+    NSAutoreleasePool * pool = [[NSAutoreleasePool alloc] init];
+
+    MyClass *my_object = [[MyClass alloc] initWithMember:5];
+
+    NSLog(@"MyObject %@", [my_object description]);
+
+    [pool release];
+    return 0;
+}



From johnny.chen at apple.com  Fri Mar  4 12:17:50 2011
From: johnny.chen at apple.com (Johnny Chen)
Date: Fri, 04 Mar 2011 18:17:50 -0000
Subject: [Lldb-commits] [lldb] r127009 - in /lldb/trunk/test/objc-optimized:
 TestObjcOptimized.py main.m
Message-ID: <20110304181750.287832A6C12C@llvm.org>

Author: johnny
Date: Fri Mar  4 12:17:49 2011
New Revision: 127009

URL: http://llvm.org/viewvc/llvm-project?rev=127009&view=rev
Log:
Add TestObjcOptimized.py under the objc-optimized directory to
test that objective-c expression parser continues to work for optimized build.

Radar filed:
# rdar://problem/9087739
# test failure: objc_optimized does not work for "-C clang -A i386"

Added:
    lldb/trunk/test/objc-optimized/TestObjcOptimized.py
Modified:
    lldb/trunk/test/objc-optimized/main.m

Added: lldb/trunk/test/objc-optimized/TestObjcOptimized.py
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/test/objc-optimized/TestObjcOptimized.py?rev=127009&view=auto
==============================================================================
--- lldb/trunk/test/objc-optimized/TestObjcOptimized.py (added)
+++ lldb/trunk/test/objc-optimized/TestObjcOptimized.py Fri Mar  4 12:17:49 2011
@@ -0,0 +1,63 @@
+"""
+Test that objective-c expression parser continues to work for optimized build.
+
+http://llvm.org/viewvc/llvm-project?rev=126973&view=rev
+Fixed a bug in the expression parser where the 'this'
+or 'self' variable was not properly read if the compiler
+optimized it into a register.
+"""
+
+import os, time
+import unittest2
+import lldb
+from lldbtest import *
+
+# rdar://problem/9087739
+# test failure: objc_optimized does not work for "-C clang -A i386"
+ at unittest2.skipUnless(sys.platform.startswith("darwin"), "requires Darwin")
+class ObjcOptimizedTestCase(TestBase):
+
+    mydir = "objc-optimized"
+    myclass = "MyClass"
+    mymethod = "description"
+    method_spec = "-[%s %s]" % (myclass, mymethod)
+
+    def test_break_with_dsym(self):
+        """Test 'expr member' continues to work for optimized build."""
+        self.buildDsym()
+        self.objc_optimized()
+
+    def test_break_with_dwarf(self):
+        """Test 'expr member' continues to work for optimized build."""
+        self.buildDwarf()
+        self.objc_optimized()
+
+    def objc_optimized(self):
+        """Test 'expr member' continues to work for optimized build."""
+        exe = os.path.join(os.getcwd(), "a.out")
+        self.runCmd("file " + exe, CURRENT_EXECUTABLE_SET)
+
+        self.expect("breakpoint set -n '%s'" % self.method_spec,
+                    BREAKPOINT_CREATED,
+            startstr = "Breakpoint created: 1: name = '%s', locations = 1" % self.method_spec)
+
+        self.runCmd("run", RUN_SUCCEEDED)
+        self.expect("thread backtrace", STOPPED_DUE_TO_BREAKPOINT,
+            substrs = ["stop reason = breakpoint"],
+            patterns = ["frame.*0:.*%s %s" % (self.myclass, self.mymethod)])
+
+        self.expect('expression member',
+            startstr = "(int) $0 = 5")
+
+        self.expect('expression self',
+            startstr = "(%s *) $1 = " % self.myclass)
+
+        self.expect('expression self->non_member', error=True,
+            substrs = ["does not have a member named 'non_member'"])
+
+        
+if __name__ == '__main__':
+    import atexit
+    lldb.SBDebugger.Initialize()
+    atexit.register(lambda: lldb.SBDebugger.Terminate())
+    unittest2.main()

Modified: lldb/trunk/test/objc-optimized/main.m
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/test/objc-optimized/main.m?rev=127009&r1=127008&r2=127009&view=diff
==============================================================================
--- lldb/trunk/test/objc-optimized/main.m (original)
+++ lldb/trunk/test/objc-optimized/main.m Fri Mar  4 12:17:49 2011
@@ -24,10 +24,9 @@
     [super dealloc];
 }
 
+// Set a breakpoint on '-[MyClass description]' and test expressions: expr member
 - (NSString *)description
 {
-    // Set a breakpoint on '-[MyClass description]' and test expressions: expr member
-
     return [NSString stringWithFormat:@"%d", member];
 }
 @end



From johnny.chen at apple.com  Fri Mar  4 12:31:00 2011
From: johnny.chen at apple.com (Johnny Chen)
Date: Fri, 04 Mar 2011 18:31:00 -0000
Subject: [Lldb-commits] [lldb] r127011 -
	/lldb/trunk/test/objc-optimized/Makefile
Message-ID: <20110304183100.861872A6C12C@llvm.org>

Author: johnny
Date: Fri Mar  4 12:31:00 2011
New Revision: 127011

URL: http://llvm.org/viewvc/llvm-project?rev=127011&view=rev
Log:
Change the CFLAGS variable assignment operator to ?= (conditional variable assignment operator).
This allows us to override CFLAGS on the command line:

$ CFLAGS='-arch $(ARCH) -gdwarf-2 -O0' ./dotest.py -C clang -A i386 -v objc-optimized

Session logs for test failures/errors will go into directory '2011-03-04-10_33_57'
Command invoked: python ./dotest.py -C clang -A i386 -v objc-optimized
----------------------------------------------------------------------
Collected 2 tests

1: test_break_with_dsym (TestObjcOptimized.ObjcOptimizedTestCase)
   Test 'expr member' continues to work for optimized build. ... ok
2: test_break_with_dwarf (TestObjcOptimized.ObjcOptimizedTestCase)
   Test 'expr member' continues to work for optimized build. ... ok

----------------------------------------------------------------------
Ran 2 tests in 1.902s

OK
$

Modified:
    lldb/trunk/test/objc-optimized/Makefile

Modified: lldb/trunk/test/objc-optimized/Makefile
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/test/objc-optimized/Makefile?rev=127011&r1=127010&r2=127011&view=diff
==============================================================================
--- lldb/trunk/test/objc-optimized/Makefile (original)
+++ lldb/trunk/test/objc-optimized/Makefile Fri Mar  4 12:31:00 2011
@@ -2,7 +2,7 @@
 
 OBJC_SOURCES := main.m
 
-CFLAGS = -arch $(ARCH) -gdwarf-2 -O2
+CFLAGS ?= -arch $(ARCH) -gdwarf-2 -O2
 LDFLAGS = $(CFLAGS) -lobjc -framework Foundation
 
 include $(LEVEL)/Makefile.rules



From johnny.chen at apple.com  Fri Mar  4 13:47:52 2011
From: johnny.chen at apple.com (Johnny Chen)
Date: Fri, 04 Mar 2011 19:47:52 -0000
Subject: [Lldb-commits] [lldb] r127025 -
	/lldb/trunk/test/process_launch/TestProcessLaunch.py
Message-ID: <20110304194752.6E81A2A6C12C@llvm.org>

Author: johnny
Date: Fri Mar  4 13:47:52 2011
New Revision: 127025

URL: http://llvm.org/viewvc/llvm-project?rev=127025&view=rev
Log:
Add docstrings for unittest framework's test methods.

Modified:
    lldb/trunk/test/process_launch/TestProcessLaunch.py

Modified: lldb/trunk/test/process_launch/TestProcessLaunch.py
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/test/process_launch/TestProcessLaunch.py?rev=127025&r1=127024&r2=127025&view=diff
==============================================================================
--- lldb/trunk/test/process_launch/TestProcessLaunch.py (original)
+++ lldb/trunk/test/process_launch/TestProcessLaunch.py Fri Mar  4 13:47:52 2011
@@ -13,10 +13,12 @@
 
     @unittest2.skipUnless(sys.platform.startswith("darwin"), "requires Darwin")
     def test_io_with_dsym (self):
+        """Test that process launch I/O redirection flags work properly."""
         self.buildDsym ()
         self.process_io_test ()
 
     def test_io_with_dwarf (self):
+        """Test that process launch I/O redirection flags work properly."""
         self.buildDwarf ()
         self.process_io_test ()
 
@@ -100,11 +102,13 @@
 
     @unittest2.skipUnless(sys.platform.startswith("darwin"), "requires Darwin")
     def test_set_working_dir_with_dsym (self):
+        """Test that '-w dir' sets the working dir when running the inferior."""
         self.buildDsym(dictionary=self.d)
         self.setTearDownCleanup(self.d)
         self.my_working_dir_test()
 
     def test_set_working_dir_with_dwarf (self):
+        """Test that '-w dir' sets the working dir when running the inferior."""
         self.buildDwarf(dictionary=self.d)
         self.setTearDownCleanup(self.d)
         self.my_working_dir_test()



From gclayton at apple.com  Fri Mar  4 16:59:15 2011
From: gclayton at apple.com (Greg Clayton)
Date: Fri, 04 Mar 2011 22:59:15 -0000
Subject: [Lldb-commits] [lldb] r127044 -
 /lldb/trunk/source/Plugins/Process/Utility/UnwindMacOSXFrameBackchain.cpp
Message-ID: <20110304225915.2E3DE2A6C12C@llvm.org>

Author: gclayton
Date: Fri Mar  4 16:59:14 2011
New Revision: 127044

URL: http://llvm.org/viewvc/llvm-project?rev=127044&view=rev
Log:
Allow the macosx frame backchain to use 32/64 bit as the selector when
chosing which FP back-chain methods to use since we can rely upon generic 
register numbers after that.


Modified:
    lldb/trunk/source/Plugins/Process/Utility/UnwindMacOSXFrameBackchain.cpp

Modified: lldb/trunk/source/Plugins/Process/Utility/UnwindMacOSXFrameBackchain.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/UnwindMacOSXFrameBackchain.cpp?rev=127044&r1=127043&r2=127044&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/UnwindMacOSXFrameBackchain.cpp (original)
+++ lldb/trunk/source/Plugins/Process/Utility/UnwindMacOSXFrameBackchain.cpp Fri Mar  4 16:59:14 2011
@@ -35,11 +35,11 @@
         const ArchSpec& target_arch = m_thread.GetProcess().GetTarget().GetArchitecture ();
         // Frame zero should always be supplied by the thread...
         StackFrameSP frame_sp (m_thread.GetStackFrameAtIndex (0));
-        if (target_arch.GetMachine() == llvm::Triple::x86_64)
+        
+        if (target_arch.GetAddressByteSize() == 8)
             GetStackFrameData_x86_64 (frame_sp.get());
-        else if (target_arch.GetMachine() == llvm::Triple::x86)
+        else
             GetStackFrameData_i386 (frame_sp.get());
-
     }
     return m_cursors.size();
 }



From johnny.chen at apple.com  Fri Mar  4 17:40:07 2011
From: johnny.chen at apple.com (Johnny Chen)
Date: Fri, 04 Mar 2011 23:40:07 -0000
Subject: [Lldb-commits] [lldb] r127048 - in /lldb/trunk/test:
 connect_remote/ connect_remote/EchoServer.py
 connect_remote/TestConnectRemote.py python_api/target/TestTargetAPI.py
Message-ID: <20110304234007.1DC9F2A6C12C@llvm.org>

Author: johnny
Date: Fri Mar  4 17:40:06 2011
New Revision: 127048

URL: http://llvm.org/viewvc/llvm-project?rev=127048&view=rev
Log:
Add a test case for the lldb command 'process connect'.
We start a fake debugserver listening on localhost:12345 and issue the command
'process connect connect://localhost:12345' to connect to it.

Added:
    lldb/trunk/test/connect_remote/
    lldb/trunk/test/connect_remote/EchoServer.py   (with props)
    lldb/trunk/test/connect_remote/TestConnectRemote.py
Modified:
    lldb/trunk/test/python_api/target/TestTargetAPI.py

Added: lldb/trunk/test/connect_remote/EchoServer.py
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/test/connect_remote/EchoServer.py?rev=127048&view=auto
==============================================================================
--- lldb/trunk/test/connect_remote/EchoServer.py (added)
+++ lldb/trunk/test/connect_remote/EchoServer.py Fri Mar  4 17:40:06 2011
@@ -0,0 +1,23 @@
+#!/usr/bin/env python 
+
+""" 
+A simple echo server.
+Taken from http://docs.python.org/library/socket.html#example.
+"""
+
+import socket
+
+HOST = 'localhost'        # Symbolic name meaning local interfaces
+PORT = 12345              # Arbitrary non-privileged port
+s = socket.socket(socket.AF_INET, socket.SOCK_STREAM)
+s.bind((HOST, PORT))
+print '\nListening on %s:%d' % (HOST, PORT)
+s.listen(1)
+conn, addr = s.accept()
+print 'Connected by', addr
+while 1:
+    data = conn.recv(1024)
+    if not data: break
+    conn.send(data)
+    print 'Received:', data
+conn.close()

Propchange: lldb/trunk/test/connect_remote/EchoServer.py
------------------------------------------------------------------------------
    svn:executable = *

Added: lldb/trunk/test/connect_remote/TestConnectRemote.py
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/test/connect_remote/TestConnectRemote.py?rev=127048&view=auto
==============================================================================
--- lldb/trunk/test/connect_remote/TestConnectRemote.py (added)
+++ lldb/trunk/test/connect_remote/TestConnectRemote.py Fri Mar  4 17:40:06 2011
@@ -0,0 +1,33 @@
+"""
+Test lldb 'process connect' command.
+"""
+
+import os, time
+import unittest2
+import lldb
+from lldbtest import *
+
+class ConnectRemoteTestCase(TestBase):
+
+    mydir = "connect_remote"
+
+    def test_connect_remote(self):
+        """Test "process connect connect:://localhost:12345"."""
+
+        # First, we'll start a fake debugserver (a simple echo server).
+        import subprocess
+        fakeserver = subprocess.Popen('./EchoServer.py')
+        # This does the cleanup afterwards.
+        def cleanup_fakeserver():
+            fakeserver.kill()
+            fakeserver.wait()
+        self.addTearDownHook(cleanup_fakeserver)
+
+        self.runCmd("process connect connect://localhost:12345")
+
+
+if __name__ == '__main__':
+    import atexit
+    lldb.SBDebugger.Initialize()
+    atexit.register(lambda: lldb.SBDebugger.Terminate())
+    unittest2.main()

Modified: lldb/trunk/test/python_api/target/TestTargetAPI.py
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/test/python_api/target/TestTargetAPI.py?rev=127048&r1=127047&r2=127048&view=diff
==============================================================================
--- lldb/trunk/test/python_api/target/TestTargetAPI.py (original)
+++ lldb/trunk/test/python_api/target/TestTargetAPI.py Fri Mar  4 17:40:06 2011
@@ -14,16 +14,16 @@
 
     @unittest2.skipUnless(sys.platform.startswith("darwin"), "requires Darwin")
     @python_api_test
-    def test_with_dsym(self):
-        """Exercise SBTaget APIs."""
+    def test_resolve_symbol_context_with_address_with_dsym(self):
+        """Exercise SBTaget.ResolveSymbolContextForAddress() API."""
         self.buildDsym()
-        self.target_api()
+        self.resolve_symbol_context_with_address()
 
     @python_api_test
-    def test_with_dwarf(self):
-        """Exercise SBTarget APIs."""
+    def test_resolve_symbol_context_with_address_with_dwarf(self):
+        """Exercise SBTarget.ResolveSymbolContextForAddress() API."""
         self.buildDwarf()
-        self.target_api()
+        self.resolve_symbol_context_with_address()
 
     def setUp(self):
         # Call super's setUp().
@@ -32,8 +32,8 @@
         self.line1 = line_number('main.c', '// Find the line number for breakpoint 1 here.')
         self.line2 = line_number('main.c', '// Find the line number for breakpoint 2 here.')
 
-    def target_api(self):
-        """Exercise SBTarget APIs."""
+    def resolve_symbol_context_with_address(self):
+        """Exercise SBTaget.ResolveSymbolContextForAddress() API."""
         exe = os.path.join(os.getcwd(), "a.out")
 
         # Create a target by the debugger.



From gclayton at apple.com  Fri Mar  4 19:04:56 2011
From: gclayton at apple.com (Greg Clayton)
Date: Sat, 05 Mar 2011 01:04:56 -0000
Subject: [Lldb-commits] [lldb] r127053 - in /lldb/trunk:
 lldb.xcodeproj/project.pbxproj source/Plugins/DynamicLoader/Static/
 source/Plugins/DynamicLoader/Static/DynamicLoaderStatic.cpp
 source/Plugins/DynamicLoader/Static/DynamicLoaderStatic.h source/lldb.cpp
Message-ID: <20110305010456.3B07D2A6C12C@llvm.org>

Author: gclayton
Date: Fri Mar  4 19:04:56 2011
New Revision: 127053

URL: http://llvm.org/viewvc/llvm-project?rev=127053&view=rev
Log:
Added a DynamicLoaderStatic plug-in that will act as a static dynamic loader.
It will just load all files exactly where the files state they are (file
addresses == load addresses). This is used when the llvm::Triple::OSType is
set to llvm::Triple::UnknownOS or llvm::Triple::NoOS.



Added:
    lldb/trunk/source/Plugins/DynamicLoader/Static/
    lldb/trunk/source/Plugins/DynamicLoader/Static/DynamicLoaderStatic.cpp
    lldb/trunk/source/Plugins/DynamicLoader/Static/DynamicLoaderStatic.h
Modified:
    lldb/trunk/lldb.xcodeproj/project.pbxproj
    lldb/trunk/source/lldb.cpp

Modified: lldb/trunk/lldb.xcodeproj/project.pbxproj
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/lldb.xcodeproj/project.pbxproj?rev=127053&r1=127052&r2=127053&view=diff
==============================================================================
--- lldb/trunk/lldb.xcodeproj/project.pbxproj (original)
+++ lldb/trunk/lldb.xcodeproj/project.pbxproj Fri Mar  4 19:04:56 2011
@@ -78,6 +78,8 @@
 		266A42D6128E3FFB0090CF7C /* ClangNamespaceDecl.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 266A42D5128E3FFB0090CF7C /* ClangNamespaceDecl.cpp */; };
 		266A42D8128E40040090CF7C /* ClangNamespaceDecl.h in Headers */ = {isa = PBXBuildFile; fileRef = 266A42D7128E40040090CF7C /* ClangNamespaceDecl.h */; };
 		266F5CBC12FC846200DFCE33 /* Config.h in Headers */ = {isa = PBXBuildFile; fileRef = 266F5CBB12FC846200DFCE33 /* Config.h */; };
+		268A683F1321B53B000E3FB8 /* DynamicLoaderStatic.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 268A683D1321B53B000E3FB8 /* DynamicLoaderStatic.cpp */; };
+		268A68401321B53B000E3FB8 /* DynamicLoaderStatic.h in Headers */ = {isa = PBXBuildFile; fileRef = 268A683E1321B53B000E3FB8 /* DynamicLoaderStatic.h */; };
 		268DA872130095D000C9483A /* Terminal.h in Headers */ = {isa = PBXBuildFile; fileRef = 268DA871130095D000C9483A /* Terminal.h */; };
 		268DA874130095ED00C9483A /* Terminal.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 268DA873130095ED00C9483A /* Terminal.cpp */; };
 		268F9D53123AA15200B91E9B /* SBSymbolContextList.h in Headers */ = {isa = PBXBuildFile; fileRef = 268F9D52123AA15200B91E9B /* SBSymbolContextList.h */; settings = {ATTRIBUTES = (Public, ); }; };
@@ -611,6 +613,8 @@
 		2682F286115EF3BD00CCFF99 /* SBError.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; name = SBError.h; path = include/lldb/API/SBError.h; sourceTree = "<group>"; };
 		2689B0A4113EE3CD00A4AEDB /* Symbols.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; name = Symbols.h; path = include/lldb/Host/Symbols.h; sourceTree = "<group>"; };
 		2689B0B5113EE47E00A4AEDB /* Symbols.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; name = Symbols.cpp; path = source/Host/macosx/Symbols.cpp; sourceTree = "<group>"; };
+		268A683D1321B53B000E3FB8 /* DynamicLoaderStatic.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = DynamicLoaderStatic.cpp; sourceTree = "<group>"; };
+		268A683E1321B53B000E3FB8 /* DynamicLoaderStatic.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = DynamicLoaderStatic.h; sourceTree = "<group>"; };
 		268A813F115B19D000F645B0 /* UniqueCStringMap.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; name = UniqueCStringMap.h; path = include/lldb/Core/UniqueCStringMap.h; sourceTree = "<group>"; };
 		268DA871130095D000C9483A /* Terminal.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; name = Terminal.h; path = include/lldb/Host/Terminal.h; sourceTree = "<group>"; };
 		268DA873130095ED00C9483A /* Terminal.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = Terminal.cpp; sourceTree = "<group>"; };
@@ -1249,6 +1253,7 @@
 			isa = PBXGroup;
 			children = (
 				260C897910F57C5600BB2B04 /* MacOSX-DYLD */,
+				268A683C1321B505000E3FB8 /* Static */,
 			);
 			path = DynamicLoader;
 			sourceTree = "<group>";
@@ -1625,6 +1630,15 @@
 			name = Utility;
 			sourceTree = "<group>";
 		};
+		268A683C1321B505000E3FB8 /* Static */ = {
+			isa = PBXGroup;
+			children = (
+				268A683E1321B53B000E3FB8 /* DynamicLoaderStatic.h */,
+				268A683D1321B53B000E3FB8 /* DynamicLoaderStatic.cpp */,
+			);
+			path = Static;
+			sourceTree = "<group>";
+		};
 		26A3B4AB1181454800381BC2 /* BSD-Archive */ = {
 			isa = PBXGroup;
 			children = (
@@ -2370,6 +2384,7 @@
 				2618EE6A1315B29C001D6D71 /* ProcessGDBRemote.h in Headers */,
 				2618EE6C1315B29C001D6D71 /* ProcessGDBRemoteLog.h in Headers */,
 				2618EE6E1315B29C001D6D71 /* ThreadGDBRemote.h in Headers */,
+				268A68401321B53B000E3FB8 /* DynamicLoaderStatic.h in Headers */,
 			);
 			runOnlyForDeploymentPostprocessing = 0;
 		};
@@ -2876,6 +2891,7 @@
 				2618EE691315B29C001D6D71 /* ProcessGDBRemote.cpp in Sources */,
 				2618EE6B1315B29C001D6D71 /* ProcessGDBRemoteLog.cpp in Sources */,
 				2618EE6D1315B29C001D6D71 /* ThreadGDBRemote.cpp in Sources */,
+				268A683F1321B53B000E3FB8 /* DynamicLoaderStatic.cpp in Sources */,
 			);
 			runOnlyForDeploymentPostprocessing = 0;
 		};

Added: lldb/trunk/source/Plugins/DynamicLoader/Static/DynamicLoaderStatic.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/DynamicLoader/Static/DynamicLoaderStatic.cpp?rev=127053&view=auto
==============================================================================
--- lldb/trunk/source/Plugins/DynamicLoader/Static/DynamicLoaderStatic.cpp (added)
+++ lldb/trunk/source/Plugins/DynamicLoader/Static/DynamicLoaderStatic.cpp Fri Mar  4 19:04:56 2011
@@ -0,0 +1,216 @@
+//===-- DynamicLoaderStatic.cpp ---------------------------------*- C++ -*-===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#include "lldb/Core/Module.h"
+#include "lldb/Core/PluginManager.h"
+#include "lldb/Target/Target.h"
+
+#include "DynamicLoaderStatic.h"
+
+using namespace lldb;
+using namespace lldb_private;
+
+//----------------------------------------------------------------------
+// Create an instance of this class. This function is filled into
+// the plugin info class that gets handed out by the plugin factory and
+// allows the lldb to instantiate an instance of this class.
+//----------------------------------------------------------------------
+DynamicLoader *
+DynamicLoaderStatic::CreateInstance (Process* process, bool force)
+{
+    bool create = force;
+    if (!create)
+    {
+        const llvm::Triple &triple_ref = process->GetTarget().GetArchitecture().GetTriple();
+        const llvm::Triple::OSType os_type = triple_ref.getOS();
+        if ((os_type == llvm::Triple::UnknownOS) ||
+            (os_type == llvm::Triple::NoOS))
+            create = true;
+    }
+    
+    if (create)
+        return new DynamicLoaderStatic (process);
+    return NULL;
+}
+
+//----------------------------------------------------------------------
+// Constructor
+//----------------------------------------------------------------------
+DynamicLoaderStatic::DynamicLoaderStatic (Process* process) :
+    DynamicLoader(process)
+{
+}
+
+//----------------------------------------------------------------------
+// Destructor
+//----------------------------------------------------------------------
+DynamicLoaderStatic::~DynamicLoaderStatic()
+{
+}
+
+//------------------------------------------------------------------
+/// Called after attaching a process.
+///
+/// Allow DynamicLoader plug-ins to execute some code after
+/// attaching to a process.
+//------------------------------------------------------------------
+void
+DynamicLoaderStatic::DidAttach ()
+{
+    LoadAllImagesAtFileAddresses();
+}
+
+//------------------------------------------------------------------
+/// Called after attaching a process.
+///
+/// Allow DynamicLoader plug-ins to execute some code after
+/// attaching to a process.
+//------------------------------------------------------------------
+void
+DynamicLoaderStatic::DidLaunch ()
+{
+    LoadAllImagesAtFileAddresses();
+}
+
+void
+DynamicLoaderStatic::LoadAllImagesAtFileAddresses ()
+{
+    ModuleList &module_list = m_process->GetTarget().GetImages();
+    
+    ModuleList loaded_module_list;
+
+    const size_t num_modules = module_list.GetSize();
+    for (uint32_t idx = 0; idx < num_modules; ++idx)
+    {
+        ModuleSP module_sp (module_list.GetModuleAtIndex (idx));
+        if (module_sp)
+        {
+            bool changed = false;
+            ObjectFile *image_object_file = module_sp->GetObjectFile();
+            if (image_object_file)
+            {
+                SectionList *section_list = image_object_file->GetSectionList ();
+                if (section_list)
+                {
+                    // All sections listed in the dyld image info structure will all
+                    // either be fixed up already, or they will all be off by a single
+                    // slide amount that is determined by finding the first segment
+                    // that is at file offset zero which also has bytes (a file size
+                    // that is greater than zero) in the object file.
+
+                    // Determine the slide amount (if any)
+                    const size_t num_sections = section_list->GetSize();
+                    size_t sect_idx = 0;
+                    for (sect_idx = 0; sect_idx < num_sections; ++sect_idx)
+                    {
+                        // Iterate through the object file sections to find the
+                        // first section that starts of file offset zero and that
+                        // has bytes in the file...
+                        Section *section = section_list->GetSectionAtIndex (sect_idx).get();
+                        if (section)
+                        {
+                            if (m_process->GetTarget().GetSectionLoadList().SetSectionLoadAddress (section, section->GetFileAddress()))
+                                changed = true;
+                        }
+                    }
+                }
+            }
+            
+            if (changed)
+                loaded_module_list.AppendIfNeeded (module_sp);
+        }
+    }
+
+    if (loaded_module_list.GetSize())
+        m_process->GetTarget().ModulesDidLoad (loaded_module_list);
+}
+
+ThreadPlanSP
+DynamicLoaderStatic::GetStepThroughTrampolinePlan (Thread &thread, bool stop_others)
+{
+    return ThreadPlanSP();
+}
+
+Error
+DynamicLoaderStatic::CanLoadImage ()
+{
+    Error error;
+    error.SetErrorString ("can't load images on with a static debug session");
+    return error;
+}
+
+void
+DynamicLoaderStatic::Initialize()
+{
+    PluginManager::RegisterPlugin (GetPluginNameStatic(),
+                                   GetPluginDescriptionStatic(),
+                                   CreateInstance);
+}
+
+void
+DynamicLoaderStatic::Terminate()
+{
+    PluginManager::UnregisterPlugin (CreateInstance);
+}
+
+
+const char *
+DynamicLoaderStatic::GetPluginNameStatic()
+{
+    return "dynamic-loader.static";
+}
+
+const char *
+DynamicLoaderStatic::GetPluginDescriptionStatic()
+{
+    return "Dynamic loader plug-in that will load any images at the static addresses contained in each image.";
+}
+
+
+//------------------------------------------------------------------
+// PluginInterface protocol
+//------------------------------------------------------------------
+const char *
+DynamicLoaderStatic::GetPluginName()
+{
+    return "DynamicLoaderStatic";
+}
+
+const char *
+DynamicLoaderStatic::GetShortPluginName()
+{
+    return GetPluginNameStatic();
+}
+
+uint32_t
+DynamicLoaderStatic::GetPluginVersion()
+{
+    return 1;
+}
+
+void
+DynamicLoaderStatic::GetPluginCommandHelp (const char *command, Stream *strm)
+{
+}
+
+Error
+DynamicLoaderStatic::ExecutePluginCommand (Args &command, Stream *strm)
+{
+    Error error;
+    error.SetErrorString("No plug-in command are currently supported.");
+    return error;
+}
+
+Log *
+DynamicLoaderStatic::EnablePluginLogging (Stream *strm, Args &command)
+{
+    return NULL;
+}
+
+

Added: lldb/trunk/source/Plugins/DynamicLoader/Static/DynamicLoaderStatic.h
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/DynamicLoader/Static/DynamicLoaderStatic.h?rev=127053&view=auto
==============================================================================
--- lldb/trunk/source/Plugins/DynamicLoader/Static/DynamicLoaderStatic.h (added)
+++ lldb/trunk/source/Plugins/DynamicLoader/Static/DynamicLoaderStatic.h Fri Mar  4 19:04:56 2011
@@ -0,0 +1,100 @@
+//===-- DynamicLoaderStatic.h -----------------------------------*- C++ -*-===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef liblldb_DynamicLoaderStatic_h_
+#define liblldb_DynamicLoaderStatic_h_
+
+// C Includes
+// C++ Includes
+#include <map>
+#include <vector>
+#include <string>
+
+// Other libraries and framework includes
+#include "llvm/Support/MachO.h"
+
+#include "lldb/Target/DynamicLoader.h"
+#include "lldb/Host/FileSpec.h"
+#include "lldb/Core/UUID.h"
+#include "lldb/Host/Mutex.h"
+#include "lldb/Target/Process.h"
+
+class DynamicLoaderStatic : public lldb_private::DynamicLoader
+{
+public:
+    //------------------------------------------------------------------
+    // Static Functions
+    //------------------------------------------------------------------
+    static void
+    Initialize();
+
+    static void
+    Terminate();
+
+    static const char *
+    GetPluginNameStatic();
+
+    static const char *
+    GetPluginDescriptionStatic();
+
+    static lldb_private::DynamicLoader *
+    CreateInstance (lldb_private::Process *process, bool force);
+
+    DynamicLoaderStatic (lldb_private::Process *process);
+
+    virtual
+    ~DynamicLoaderStatic ();
+    //------------------------------------------------------------------
+    /// Called after attaching a process.
+    ///
+    /// Allow DynamicLoader plug-ins to execute some code after
+    /// attaching to a process.
+    //------------------------------------------------------------------
+    virtual void
+    DidAttach ();
+
+    virtual void
+    DidLaunch ();
+
+    virtual lldb::ThreadPlanSP
+    GetStepThroughTrampolinePlan (lldb_private::Thread &thread,
+                                  bool stop_others);
+
+    virtual lldb_private::Error
+    CanLoadImage ();
+
+    //------------------------------------------------------------------
+    // PluginInterface protocol
+    //------------------------------------------------------------------
+    virtual const char *
+    GetPluginName();
+
+    virtual const char *
+    GetShortPluginName();
+
+    virtual uint32_t
+    GetPluginVersion();
+
+    virtual void
+    GetPluginCommandHelp (const char *command, lldb_private::Stream *strm);
+
+    virtual lldb_private::Error
+    ExecutePluginCommand (lldb_private::Args &command, lldb_private::Stream *strm);
+
+    virtual lldb_private::Log *
+    EnablePluginLogging (lldb_private::Stream *strm, lldb_private::Args &command);
+
+private:
+    void
+    LoadAllImagesAtFileAddresses ();
+
+    DISALLOW_COPY_AND_ASSIGN (DynamicLoaderStatic);
+};
+
+#endif  // liblldb_DynamicLoaderStatic_h_

Modified: lldb/trunk/source/lldb.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/lldb.cpp?rev=127053&r1=127052&r2=127053&view=diff
==============================================================================
--- lldb/trunk/source/lldb.cpp (original)
+++ lldb/trunk/source/lldb.cpp Fri Mar  4 19:04:56 2011
@@ -48,6 +48,8 @@
 #include "Plugins/DynamicLoader/Linux-DYLD/DynamicLoaderLinuxDYLD.h"
 #endif
 
+#include "Plugins/DynamicLoader/Static/DynamicLoaderStatic.h"
+
 using namespace lldb;
 using namespace lldb_private;
 
@@ -99,6 +101,7 @@
         ProcessLinux::Initialize();
         DynamicLoaderLinuxDYLD::Initialize();
 #endif
+        DynamicLoaderStatic::Initialize();
         // Scan for any system or user LLDB plug-ins
         PluginManager::Initialize();
 
@@ -154,6 +157,8 @@
     ProcessLinux::Terminate();
     DynamicLoaderLinuxDYLD::Terminate();
 #endif
+    
+    DynamicLoaderStatic::Terminate();
 
     Log::Terminate();
 }



From johnny.chen at apple.com  Fri Mar  4 19:20:11 2011
From: johnny.chen at apple.com (Johnny Chen)
Date: Sat, 05 Mar 2011 01:20:11 -0000
Subject: [Lldb-commits] [lldb] r127055 - in /lldb/trunk:
 source/API/SBProcess.cpp test/lldbutil.py
 test/python_api/process/TestProcessAPI.py
Message-ID: <20110305012011.767782A6C12C@llvm.org>

Author: johnny
Date: Fri Mar  4 19:20:11 2011
New Revision: 127055

URL: http://llvm.org/viewvc/llvm-project?rev=127055&view=rev
Log:
Add a test case ProcessAPITestCase.test_remote_launch() which tests SBProcess.RemoteLaunch()
API with a process not in eStateConnected, and checks that the remote launch failed.

Modify SBProcess::RemoteLaunch()/RemoteAttachToProcessWithID()'s log statements to fix a
crasher when logging is turned on.

Modified:
    lldb/trunk/source/API/SBProcess.cpp
    lldb/trunk/test/lldbutil.py
    lldb/trunk/test/python_api/process/TestProcessAPI.py

Modified: lldb/trunk/source/API/SBProcess.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/API/SBProcess.cpp?rev=127055&r1=127054&r2=127055&view=diff
==============================================================================
--- lldb/trunk/source/API/SBProcess.cpp (original)
+++ lldb/trunk/source/API/SBProcess.cpp Fri Mar  4 19:20:11 2011
@@ -141,7 +141,7 @@
     if (log) {
         SBStream sstr;
         error.GetDescription (sstr);
-        log->Printf ("SBProcess(%p)::RemoteLaunch (...) => SBError (%p): %s", error.get(), sstr.GetData());
+        log->Printf ("SBProcess(%p)::RemoteLaunch (...) => SBError (%p): %s", m_opaque_sp.get(), error.get(), sstr.GetData());
     }
     
     return error.Success();
@@ -171,7 +171,7 @@
     if (log) {
         SBStream sstr;
         error.GetDescription (sstr);
-        log->Printf ("SBProcess(%p)::RemoteAttachToProcessWithID (%d) => SBError (%p): %s", error.get(), sstr.GetData());
+        log->Printf ("SBProcess(%p)::RemoteAttachToProcessWithID (%d) => SBError (%p): %s", m_opaque_sp.get(), pid, error.get(), sstr.GetData());
     }
 
     return error.Success();

Modified: lldb/trunk/test/lldbutil.py
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/test/lldbutil.py?rev=127055&r1=127054&r2=127055&view=diff
==============================================================================
--- lldb/trunk/test/lldbutil.py (original)
+++ lldb/trunk/test/lldbutil.py Fri Mar  4 19:20:11 2011
@@ -162,6 +162,8 @@
         return "invalid"
     elif enum == lldb.eStateUnloaded:
         return "unloaded"
+    elif enum == lldb.eStateConnected:
+        return "connected"
     elif enum == lldb.eStateAttaching:
         return "attaching"
     elif enum == lldb.eStateLaunching:
@@ -181,7 +183,7 @@
     elif enum == lldb.eStateSuspended:
         return "suspended"
     else:
-        raise Exception("Unknown stopReason enum")
+        raise Exception("Unknown StateType enum")
 
 def StopReasonString(enum):
     """Returns the stopReason string given an enum."""
@@ -202,7 +204,7 @@
     elif enum == lldb.eStopReasonPlanComplete:
         return "plancomplete"
     else:
-        raise Exception("Unknown stopReason enum")
+        raise Exception("Unknown StopReason enum")
 
 def ValueTypeString(enum):
     """Returns the valueType string given an enum."""
@@ -223,7 +225,7 @@
     elif enum == lldb.eValueTypeConstResult:
         return "constant_result"
     else:
-        raise Exception("Unknown valueType enum")
+        raise Exception("Unknown ValueType enum")
 
 
 # ==================================================

Modified: lldb/trunk/test/python_api/process/TestProcessAPI.py
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/test/python_api/process/TestProcessAPI.py?rev=127055&r1=127054&r2=127055&view=diff
==============================================================================
--- lldb/trunk/test/python_api/process/TestProcessAPI.py (original)
+++ lldb/trunk/test/python_api/process/TestProcessAPI.py Fri Mar  4 19:20:11 2011
@@ -5,7 +5,7 @@
 import os, time
 import unittest2
 import lldb
-from lldbutil import get_stopped_thread
+from lldbutil import get_stopped_thread, StateTypeString
 from lldbtest import *
 
 class ProcessAPITestCase(TestBase):
@@ -51,6 +51,12 @@
         self.buildDwarf()
         self.access_my_int()
 
+    @python_api_test
+    def test_remote_launch(self):
+        """Test SBProcess.RemoteLaunch() API with a process not in eStateConnected, and it should fail."""
+        self.buildDefault()
+        self.remote_launch_should_fail()
+
     def setUp(self):
         # Call super's setUp().
         TestBase.setUp(self)
@@ -230,6 +236,24 @@
         for i in new_bytes:
             print "byte:", i
 
+    def remote_launch_should_fail(self):
+        """Test SBProcess.RemoteLaunch() API with a process not in eStateConnected, and it should fail."""
+        exe = os.path.join(os.getcwd(), "a.out")
+        self.runCmd("file " + exe, CURRENT_EXECUTABLE_SET)
+
+        target = self.dbg.CreateTarget(exe)
+        self.assertTrue(target.IsValid(), VALID_TARGET)
+
+        # Launch the process, and do not stop at the entry point.
+        error = lldb.SBError()
+        process = target.Launch (self.dbg.GetListener(), None, None, os.ctermid(), os.ctermid(), os.ctermid(), None, 0, False, error)
+
+        print "process state:", StateTypeString(process.GetState())
+        self.assertTrue(process.GetState() != lldb.eStateConnected)
+
+        success = process.RemoteLaunch(None, None, None, None, None, None, 0, False, error)
+        self.assertTrue(not success, "RemoteLaunch() should fail for process state != eStateConnected")
+
 
 if __name__ == '__main__':
     import atexit