From lattner at cs.uiuc.edu Mon Oct 28 00:03:02 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon Oct 28 00:03:02 2002 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/MachineFunction.cpp Message-ID: <200210280602.AAA06612@apoc.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen: MachineFunction.cpp updated: 1.24 -> 1.25 --- Log message: Eliminate unneccesary use of MachineBasicBlock::get --- Diffs of the changes: Index: llvm/lib/CodeGen/MachineFunction.cpp diff -u llvm/lib/CodeGen/MachineFunction.cpp:1.24 llvm/lib/CodeGen/MachineFunction.cpp:1.25 --- llvm/lib/CodeGen/MachineFunction.cpp:1.24 Sun Oct 27 23:58:46 2002 +++ llvm/lib/CodeGen/MachineFunction.cpp Mon Oct 28 00:01:57 2002 @@ -312,13 +312,11 @@ std::cerr << "\n" << Fn->getReturnType() << " \"" << Fn->getName() << "\"\n"; - for (Function::const_iterator BB = Fn->begin(); BB != Fn->end(); ++BB) - { - std::cerr << "\n" << BB->getName() << " (" << (const void*)BB - << ")" << ":" << "\n"; - MachineBasicBlock& mvec = MachineBasicBlock::get(BB); - for (unsigned i=0; i < mvec.size(); i++) - std::cerr << "\t" << *mvec[i]; - } + for (const_iterator BB = begin(); BB != end(); ++BB) { + std::cerr << "\n" << BB->getBasicBlock()->getName() << " (" + << (const void*)BB->getBasicBlock() << ")" << ":" << "\n"; + for (MachineBasicBlock::const_iterator I = BB->begin(); I != BB->end(); ++I) + std::cerr << "\t" << *I; + } std::cerr << "\nEnd function \"" << Fn->getName() << "\"\n\n"; } From lattner at cs.uiuc.edu Mon Oct 28 12:02:00 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon Oct 28 12:02:00 2002 Subject: [llvm-commits] CVS: llvm/lib/Analysis/LiveVar/BBLiveVar.cpp BBLiveVar.h FunctionLiveVarInfo.cpp Message-ID: <200210281801.MAA14878@apoc.cs.uiuc.edu> Changes in directory llvm/lib/Analysis/LiveVar: BBLiveVar.cpp updated: 1.29 -> 1.30 BBLiveVar.h updated: 1.16 -> 1.17 FunctionLiveVarInfo.cpp updated: 1.40 -> 1.41 --- Log message: Eliminate uses of MachineBasicBlock::get --- Diffs of the changes: Index: llvm/lib/Analysis/LiveVar/BBLiveVar.cpp diff -u llvm/lib/Analysis/LiveVar/BBLiveVar.cpp:1.29 llvm/lib/Analysis/LiveVar/BBLiveVar.cpp:1.30 --- llvm/lib/Analysis/LiveVar/BBLiveVar.cpp:1.29 Sun Oct 27 19:40:34 2002 +++ llvm/lib/Analysis/LiveVar/BBLiveVar.cpp Mon Oct 28 12:01:21 2002 @@ -18,8 +18,9 @@ static AnnotationID AID(AnnotationManager::getID("Analysis::BBLiveVar")); -BBLiveVar *BBLiveVar::CreateOnBB(const BasicBlock &BB, unsigned POID) { - BBLiveVar *Result = new BBLiveVar(BB, POID); +BBLiveVar *BBLiveVar::CreateOnBB(const BasicBlock &BB, MachineBasicBlock &MBB, + unsigned POID) { + BBLiveVar *Result = new BBLiveVar(BB, MBB, POID); BB.addAnnotation(Result); return Result; } @@ -34,8 +35,8 @@ } -BBLiveVar::BBLiveVar(const BasicBlock &bb, unsigned id) - : Annotation(AID), BB(bb), POID(id) { +BBLiveVar::BBLiveVar(const BasicBlock &bb, MachineBasicBlock &mbb, unsigned id) + : Annotation(AID), BB(bb), MBB(mbb), POID(id) { InSetChanged = OutSetChanged = false; calcDefUseSets(); @@ -49,15 +50,12 @@ //----------------------------------------------------------------------------- void BBLiveVar::calcDefUseSets() { - // get the iterator for machine instructions - const MachineBasicBlock &MIVec = MachineBasicBlock::get(&BB); - // iterate over all the machine instructions in BB - for (MachineBasicBlock::const_reverse_iterator MII = MIVec.rbegin(), - MIE = MIVec.rend(); MII != MIE; ++MII) { + for (MachineBasicBlock::const_reverse_iterator MII = MBB.rbegin(), + MIE = MBB.rend(); MII != MIE; ++MII) { const MachineInstr *MI = *MII; - if (DEBUG_LV >= LV_DEBUG_Verbose) { // debug msg + if (DEBUG_LV >= LV_DEBUG_Verbose) { cerr << " *Iterating over machine instr "; MI->dump(); cerr << "\n"; Index: llvm/lib/Analysis/LiveVar/BBLiveVar.h diff -u llvm/lib/Analysis/LiveVar/BBLiveVar.h:1.16 llvm/lib/Analysis/LiveVar/BBLiveVar.h:1.17 --- llvm/lib/Analysis/LiveVar/BBLiveVar.h:1.16 Tue Jun 25 11:11:43 2002 +++ llvm/lib/Analysis/LiveVar/BBLiveVar.h Mon Oct 28 12:01:21 2002 @@ -13,6 +13,7 @@ #include class BasicBlock; class Value; +class MachineBasicBlock; enum LiveVarDebugLevel_t { LV_DEBUG_None, @@ -25,9 +26,10 @@ class BBLiveVar : public Annotation { const BasicBlock &BB; // pointer to BasicBlock + MachineBasicBlock &MBB; // Pointer to MachineBasicBlock unsigned POID; // Post-Order ID - ValueSet DefSet; // Def set (with no preceding uses) for LV analysis + ValueSet DefSet; // Def set (with no preceding uses) for LV analysis ValueSet InSet, OutSet; // In & Out for LV analysis bool InSetChanged, OutSetChanged; // set if the InSet/OutSet is modified @@ -49,15 +51,18 @@ void calcDefUseSets(); // calculates the Def & Use sets for this BB - BBLiveVar(const BasicBlock &BB, unsigned POID); + BBLiveVar(const BasicBlock &BB, MachineBasicBlock &MBB, unsigned POID); ~BBLiveVar() {} // make dtor private public: - static BBLiveVar *CreateOnBB(const BasicBlock &BB, unsigned POID); + static BBLiveVar *CreateOnBB(const BasicBlock &BB, MachineBasicBlock &MBB, + unsigned POID); static BBLiveVar *GetFromBB(const BasicBlock &BB); static void RemoveFromBB(const BasicBlock &BB); inline bool isInSetChanged() const { return InSetChanged; } inline bool isOutSetChanged() const { return OutSetChanged; } + + MachineBasicBlock &getMachineBasicBlock() const { return MBB; } inline unsigned getPOId() const { return POID; } Index: llvm/lib/Analysis/LiveVar/FunctionLiveVarInfo.cpp diff -u llvm/lib/Analysis/LiveVar/FunctionLiveVarInfo.cpp:1.40 llvm/lib/Analysis/LiveVar/FunctionLiveVarInfo.cpp:1.41 --- llvm/lib/Analysis/LiveVar/FunctionLiveVarInfo.cpp:1.40 Sun Oct 27 19:40:34 2002 +++ llvm/lib/Analysis/LiveVar/FunctionLiveVarInfo.cpp Mon Oct 28 12:01:21 2002 @@ -8,7 +8,7 @@ #include "llvm/Analysis/LiveVar/FunctionLiveVarInfo.h" #include "BBLiveVar.h" #include "llvm/CodeGen/MachineInstr.h" -#include "llvm/CodeGen/MachineBasicBlock.h" +#include "llvm/CodeGen/MachineFunction.h" #include "llvm/Support/CFG.h" #include "Support/PostOrderIterator.h" #include "Support/SetOperations.h" @@ -71,31 +71,36 @@ // constructs BBLiveVars and init Def and In sets //----------------------------------------------------------------------------- -void FunctionLiveVarInfo::constructBBs(const Function *M) { - unsigned int POId = 0; // Reverse Depth-first Order ID - - for(po_iterator BBI = po_begin(M), BBE = po_end(M); - BBI != BBE; ++BBI, ++POId) { - const BasicBlock &BB = **BBI; // get the current BB +void FunctionLiveVarInfo::constructBBs(const Function *F) { + unsigned POId = 0; // Reverse Depth-first Order ID + std::map PONumbering; + + for (po_iterator BBI = po_begin(M), BBE = po_end(M); + BBI != BBE; ++BBI) + PONumbering[*BBI] = POId++; + MachineFunction &MF = MachineFunction::get(F); + for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) { + const BasicBlock &BB = *I->getBasicBlock(); // get the current BB if (DEBUG_LV) std::cerr << " For BB " << RAV(BB) << ":\n"; - // create a new BBLiveVar - BBLiveVar *LVBB = BBLiveVar::CreateOnBB(BB, POId); + BBLiveVar *LVBB; + std::map::iterator POI = PONumbering.find(&BB); + if (POI != PONumbering.end()) { + // create a new BBLiveVar + LVBB = BBLiveVar::CreateOnBB(BB, *I, POId); + } else { + // The PO iterator does not discover unreachable blocks, but the random + // iterator later may access these blocks. We must make sure to + // initialize unreachable blocks as well. However, LV info is not correct + // for those blocks (they are not analyzed) + // + LVBB = BBLiveVar::CreateOnBB(BB, *I, ++POId); + } if (DEBUG_LV) LVBB->printAllSets(); } - - // Since the PO iterator does not discover unreachable blocks, - // go over the random iterator and init those blocks as well. - // However, LV info is not correct for those blocks (they are not - // analyzed) - // - for (Function::const_iterator BBRI = M->begin(), BBRE = M->end(); - BBRI != BBRE; ++BBRI, ++POId) - if (!BBLiveVar::GetFromBB(*BBRI)) // Not yet processed? - BBLiveVar::CreateOnBB(*BBRI, POId); } @@ -240,7 +245,9 @@ //----------------------------------------------------------------------------- void FunctionLiveVarInfo::calcLiveVarSetsForBB(const BasicBlock *BB) { - const MachineBasicBlock &MIVec = MachineBasicBlock::get(BB); + BBLiveVar *BBLV = BBLiveVar::GetFromBB(*BB); + assert(BBLV && "BBLiveVar annotation doesn't exist?"); + const MachineBasicBlock &MIVec = BBLV->getMachineBasicBlock(); if (DEBUG_LV >= LV_DEBUG_Instr) std::cerr << "\n======For BB " << BB->getName() From lattner at cs.uiuc.edu Mon Oct 28 12:51:01 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon Oct 28 12:51:01 2002 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/InstrSched/InstrScheduling.cpp SchedGraph.cpp SchedGraph.h SchedPriorities.cpp Message-ID: <200210281850.MAA17015@apoc.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/InstrSched: InstrScheduling.cpp updated: 1.47 -> 1.48 SchedGraph.cpp updated: 1.38 -> 1.39 SchedGraph.h updated: 1.24 -> 1.25 SchedPriorities.cpp updated: 1.22 -> 1.23 --- Log message: Remove usage of MachineBasicBlock::get --- Diffs of the changes: Index: llvm/lib/CodeGen/InstrSched/InstrScheduling.cpp diff -u llvm/lib/CodeGen/InstrSched/InstrScheduling.cpp:1.47 llvm/lib/CodeGen/InstrSched/InstrScheduling.cpp:1.48 --- llvm/lib/CodeGen/InstrSched/InstrScheduling.cpp:1.47 Sun Oct 27 22:53:02 2002 +++ llvm/lib/CodeGen/InstrSched/InstrScheduling.cpp Mon Oct 28 12:50:08 2002 @@ -628,16 +628,15 @@ // of the basic block, since they are not part of the schedule. // static void -RecordSchedule(const BasicBlock* bb, const SchedulingManager& S) +RecordSchedule(MachineBasicBlock &MBB, const SchedulingManager& S) { - MachineBasicBlock& mvec = MachineBasicBlock::get(bb); const MachineInstrInfo& mii = S.schedInfo.getInstrInfo(); #ifndef NDEBUG // Lets make sure we didn't lose any instructions, except possibly // some NOPs from delay slots. Also, PHIs are not included in the schedule. unsigned numInstr = 0; - for (MachineBasicBlock::iterator I=mvec.begin(); I != mvec.end(); ++I) + for (MachineBasicBlock::iterator I=MBB.begin(); I != MBB.end(); ++I) if (! mii.isNop((*I)->getOpCode()) && ! mii.isDummyPhiInstr((*I)->getOpCode())) ++numInstr; @@ -649,18 +648,18 @@ return; // empty basic block! // First find the dummy instructions at the start of the basic block - MachineBasicBlock::iterator I = mvec.begin(); - for ( ; I != mvec.end(); ++I) + MachineBasicBlock::iterator I = MBB.begin(); + for ( ; I != MBB.end(); ++I) if (! mii.isDummyPhiInstr((*I)->getOpCode())) break; - // Erase all except the dummy PHI instructions from mvec, and + // Erase all except the dummy PHI instructions from MBB, and // pre-allocate create space for the ones we will put back in. - mvec.erase(I, mvec.end()); + MBB.erase(I, MBB.end()); InstrSchedule::const_iterator NIend = S.isched.end(); for (InstrSchedule::const_iterator NI = S.isched.begin(); NI != NIend; ++NI) - mvec.push_back(const_cast((*NI)->getMachineInstr())); + MBB.push_back(const_cast((*NI)->getMachineInstr())); } @@ -1202,11 +1201,10 @@ // If not enough useful instructions were found, mark the NOPs to be used // for filling delay slots, otherwise, otherwise just discard them. // -void -ReplaceNopsWithUsefulInstr(SchedulingManager& S, - SchedGraphNode* node, - vector sdelayNodeVec, - SchedGraph* graph) +static void ReplaceNopsWithUsefulInstr(SchedulingManager& S, + SchedGraphNode* node, + vector sdelayNodeVec, + SchedGraph* graph) { vector nopNodeVec; // this will hold unused NOPs const MachineInstrInfo& mii = S.getInstrInfo(); @@ -1219,35 +1217,36 @@ // fill delay slots, otherwise, just discard them. // unsigned int firstDelaySlotIdx = node->getOrigIndexInBB() + 1; - MachineBasicBlock& bbMvec = MachineBasicBlock::get(node->getBB()); - assert(bbMvec[firstDelaySlotIdx - 1] == brInstr && + MachineBasicBlock& MBB = node->getMachineBasicBlock(); + assert(MBB[firstDelaySlotIdx - 1] == brInstr && "Incorrect instr. index in basic block for brInstr"); // First find all useful instructions already in the delay slots // and USE THEM. We'll throw away the unused alternatives below // for (unsigned i=firstDelaySlotIdx; i < firstDelaySlotIdx + ndelays; ++i) - if (! mii.isNop(bbMvec[i]->getOpCode())) + if (! mii.isNop(MBB[i]->getOpCode())) sdelayNodeVec.insert(sdelayNodeVec.begin(), - graph->getGraphNodeForInstr(bbMvec[i])); + graph->getGraphNodeForInstr(MBB[i])); // Then find the NOPs and keep only as many as are needed. // Put the rest in nopNodeVec to be deleted. for (unsigned i=firstDelaySlotIdx; i < firstDelaySlotIdx + ndelays; ++i) - if (mii.isNop(bbMvec[i]->getOpCode())) + if (mii.isNop(MBB[i]->getOpCode())) if (sdelayNodeVec.size() < ndelays) - sdelayNodeVec.push_back(graph->getGraphNodeForInstr(bbMvec[i])); + sdelayNodeVec.push_back(graph->getGraphNodeForInstr(MBB[i])); else { - nopNodeVec.push_back(graph->getGraphNodeForInstr(bbMvec[i])); + nopNodeVec.push_back(graph->getGraphNodeForInstr(MBB[i])); //remove the MI from the Machine Code For Instruction + TerminatorInst *TI = MBB.getBasicBlock()->getTerminator(); MachineCodeForInstruction& llvmMvec = - MachineCodeForInstruction::get((Instruction *) - (node->getBB()->getTerminator())); + MachineCodeForInstruction::get((Instruction *)TI); + for(MachineCodeForInstruction::iterator mciI=llvmMvec.begin(), mciE=llvmMvec.end(); mciI!=mciE; ++mciI){ - if(*mciI==bbMvec[i]) + if (*mciI==MBB[i]) llvmMvec.erase(mciI); } } @@ -1281,12 +1280,12 @@ // regalloc. // static void -ChooseInstructionsForDelaySlots(SchedulingManager& S, - const BasicBlock *bb, +ChooseInstructionsForDelaySlots(SchedulingManager& S, MachineBasicBlock &MBB, SchedGraph *graph) { const MachineInstrInfo& mii = S.getInstrInfo(); - const Instruction *termInstr = (Instruction*)bb->getTerminator(); + + Instruction *termInstr = (Instruction*)MBB.getBasicBlock()->getTerminator(); MachineCodeForInstruction &termMvec=MachineCodeForInstruction::get(termInstr); vector delayNodeVec; const MachineInstr* brInstr = NULL; @@ -1324,12 +1323,11 @@ // Simply passing in an empty delayNodeVec will have this effect. // delayNodeVec.clear(); - const MachineBasicBlock& bbMvec = MachineBasicBlock::get(bb); - for (unsigned i=0; i < bbMvec.size(); ++i) - if (bbMvec[i] != brInstr && - mii.getNumDelaySlots(bbMvec[i]->getOpCode()) > 0) + for (unsigned i=0; i < MBB.size(); ++i) + if (MBB[i] != brInstr && + mii.getNumDelaySlots(MBB[i]->getOpCode()) > 0) { - SchedGraphNode* node = graph->getGraphNodeForInstr(bbMvec[i]); + SchedGraphNode* node = graph->getGraphNodeForInstr(MBB[i]); ReplaceNopsWithUsefulInstr(S, node, delayNodeVec, graph); } } @@ -1520,9 +1518,7 @@ GI != GE; ++GI) { SchedGraph* graph = (*GI); - const vector &bbvec = graph->getBasicBlocks(); - assert(bbvec.size() == 1 && "Cannot schedule multiple basic blocks"); - const BasicBlock* bb = bbvec[0]; + MachineBasicBlock &MBB = graph->getBasicBlock(); if (SchedDebugLevel >= Sched_PrintSchedTrace) cerr << "\n*** TRACE OF INSTRUCTION SCHEDULING OPERATIONS\n\n"; @@ -1531,11 +1527,9 @@ SchedPriorities schedPrio(&F, graph,getAnalysis()); SchedulingManager S(target, graph, schedPrio); - ChooseInstructionsForDelaySlots(S, bb, graph); // modifies graph - + ChooseInstructionsForDelaySlots(S, MBB, graph); // modifies graph ForwardListSchedule(S); // computes schedule in S - - RecordSchedule(bb, S); // records schedule in BB + RecordSchedule(MBB, S); // records schedule in BB } if (SchedDebugLevel >= Sched_PrintMachineCode) Index: llvm/lib/CodeGen/InstrSched/SchedGraph.cpp diff -u llvm/lib/CodeGen/InstrSched/SchedGraph.cpp:1.38 llvm/lib/CodeGen/InstrSched/SchedGraph.cpp:1.39 --- llvm/lib/CodeGen/InstrSched/SchedGraph.cpp:1.38 Sun Oct 27 22:45:24 2002 +++ llvm/lib/CodeGen/InstrSched/SchedGraph.cpp Mon Oct 28 12:50:08 2002 @@ -9,7 +9,7 @@ #include "SchedGraph.h" #include "llvm/CodeGen/InstrSelection.h" #include "llvm/CodeGen/MachineCodeForInstruction.h" -#include "llvm/CodeGen/MachineBasicBlock.h" +#include "llvm/CodeGen/MachineFunction.h" #include "llvm/Target/MachineRegInfo.h" #include "llvm/Target/TargetMachine.h" #include "llvm/Target/MachineInstrInfo.h" @@ -27,7 +27,7 @@ // The following two types need to be classes, not typedefs, so we can use // opaque declarations in SchedGraph.h // -struct RefVec: public vector< pair > { +struct RefVec: public vector > { typedef vector< pair >:: iterator iterator; typedef vector< pair >::const_iterator const_iterator; }; @@ -135,23 +135,18 @@ // /*ctor*/ -SchedGraphNode::SchedGraphNode(unsigned int _nodeId, - const BasicBlock* _bb, - const MachineInstr* _minstr, +SchedGraphNode::SchedGraphNode(unsigned NID, + MachineBasicBlock *mbb, int indexInBB, - const TargetMachine& target) - : nodeId(_nodeId), - bb(_bb), - minstr(_minstr), - origIndexInBB(indexInBB), - latency(0) -{ + const TargetMachine& Target) + : nodeId(NID), MBB(mbb), minstr(mbb ? (*mbb)[indexInBB] : 0), + origIndexInBB(indexInBB), latency(0) { if (minstr) { MachineOpCode mopCode = minstr->getOpCode(); - latency = target.getInstrInfo().hasResultInterlock(mopCode) - ? target.getInstrInfo().minLatency(mopCode) - : target.getInstrInfo().maxLatency(mopCode); + latency = Target.getInstrInfo().hasResultInterlock(mopCode) + ? Target.getInstrInfo().minLatency(mopCode) + : Target.getInstrInfo().maxLatency(mopCode); } } @@ -215,10 +210,8 @@ /*ctor*/ -SchedGraph::SchedGraph(const BasicBlock* bb, - const TargetMachine& target) -{ - bbVec.push_back(bb); +SchedGraph::SchedGraph(MachineBasicBlock &mbb, const TargetMachine& target) + : MBB(mbb) { buildGraph(target); } @@ -236,13 +229,9 @@ void SchedGraph::dump() const { - cerr << " Sched Graph for Basic Blocks: "; - for (unsigned i=0, N=bbVec.size(); i < N; i++) - { - cerr << (bbVec[i]->hasName()? bbVec[i]->getName() : "block") - << " (" << bbVec[i] << ")" - << ((i == N-1)? "" : ", "); - } + cerr << " Sched Graph for Basic Block: "; + cerr << MBB.getBasicBlock()->getName() + << " (" << MBB.getBasicBlock() << ")"; cerr << "\n\n Actual Root nodes : "; for (unsigned i=0, N=graphRoot->outEdges.size(); i < N; i++) @@ -387,14 +376,12 @@ // Now add CD edges to the first branch instruction in the sequence from // all preceding instructions in the basic block. Use 0 latency again. // - const BasicBlock* bb = firstBrNode->getBB(); - const MachineBasicBlock& mvec = MachineBasicBlock::get(bb); - for (unsigned i=0, N=mvec.size(); i < N; i++) + for (unsigned i=0, N=MBB.size(); i < N; i++) { - if (mvec[i] == termMvec[first]) // reached the first branch + if (MBB[i] == termMvec[first]) // reached the first branch break; - SchedGraphNode* fromNode = this->getGraphNodeForInstr(mvec[i]); + SchedGraphNode* fromNode = this->getGraphNodeForInstr(MBB[i]); if (fromNode == NULL) continue; // dummy instruction, e.g., PHI @@ -406,12 +393,12 @@ // the terminator) that also have delay slots, add an outgoing edge // from the instruction to the instructions in the delay slots. // - unsigned d = mii.getNumDelaySlots(mvec[i]->getOpCode()); + unsigned d = mii.getNumDelaySlots(MBB[i]->getOpCode()); assert(i+d < N && "Insufficient delay slots for instruction?"); for (unsigned j=1; j <= d; j++) { - SchedGraphNode* toNode = this->getGraphNodeForInstr(mvec[i+j]); + SchedGraphNode* toNode = this->getGraphNodeForInstr(MBB[i+j]); assert(toNode && "No node for machine instr in delay slot?"); (void) new SchedGraphEdge(fromNode, toNode, SchedGraphEdge::CtrlDep, @@ -525,8 +512,6 @@ SchedGraph::addMachineRegEdges(RegToRefVecMap& regToRefVecMap, const TargetMachine& target) { - assert(bbVec.size() == 1 && "Only handling a single basic block here"); - // This assumes that such hardwired registers are never allocated // to any LLVM value (since register allocation happens later), i.e., // any uses or defs of this register have been made explicit! @@ -732,19 +717,17 @@ // Collect value defs. for implicit operands. The interface to extract // them assumes they must be virtual registers! // - for (int i=0, N = (int) minstr.getNumImplicitRefs(); i < N; ++i) + for (unsigned i=0, N = minstr.getNumImplicitRefs(); i != N; ++i) if (minstr.implicitRefIsDefined(i)) if (const Instruction* defInstr = dyn_cast_or_null(minstr.getImplicitRef(i))) - { - valueToDefVecMap[defInstr].push_back(std::make_pair(node, -i)); - } + valueToDefVecMap[defInstr].push_back(std::make_pair(node, -i)); } void -SchedGraph::buildNodesforBB(const TargetMachine& target, - const BasicBlock* bb, +SchedGraph::buildNodesForBB(const TargetMachine& target, + MachineBasicBlock& MBB, vector& memNodeVec, RegToRefVecMap& regToRefVecMap, ValueToDefVecMap& valueToDefVecMap) @@ -753,84 +736,21 @@ // Build graph nodes for each VM instruction and gather def/use info. // Do both those together in a single pass over all machine instructions. - const MachineBasicBlock& mvec = MachineBasicBlock::get(bb); - for (unsigned i=0; i < mvec.size(); i++) - if (! mii.isDummyPhiInstr(mvec[i]->getOpCode())) - { - SchedGraphNode* node = new SchedGraphNode(getNumNodes(), bb, - mvec[i], i, target); - this->noteGraphNodeForInstr(mvec[i], node); - - // Remember all register references and value defs - findDefUseInfoAtInstr(target, node, - memNodeVec, regToRefVecMap,valueToDefVecMap); - } - -#undef REALLY_NEED_TO_SEARCH_SUCCESSOR_PHIS -#ifdef REALLY_NEED_TO_SEARCH_SUCCESSOR_PHIS - // This is a BIG UGLY HACK. IT NEEDS TO BE ELIMINATED. - // Look for copy instructions inserted in this BB due to Phi instructions - // in the successor BBs. - // There MUST be exactly one copy per Phi in successor nodes. - // - for (BasicBlock::succ_const_iterator SI=bb->succ_begin(), SE=bb->succ_end(); - SI != SE; ++SI) - for (BasicBlock::const_iterator PI=(*SI)->begin(), PE=(*SI)->end(); - PI != PE; ++PI) - { - if ((*PI)->getOpcode() != Instruction::PHINode) - break; // No more Phis in this successor - - // Find the incoming value from block bb to block (*SI) - int bbIndex = cast(*PI)->getBasicBlockIndex(bb); - assert(bbIndex >= 0 && "But I know bb is a predecessor of (*SI)?"); - Value* inVal = cast(*PI)->getIncomingValue(bbIndex); - assert(inVal != NULL && "There must be an in-value on every edge"); - - // Find the machine instruction that makes a copy of inval to (*PI). - // This must be in the current basic block (bb). - const MachineCodeForVMInstr& mvec = MachineBasicBlock::get(*PI); - const MachineInstr* theCopy = NULL; - for (unsigned i=0; i < mvec.size() && theCopy == NULL; i++) - if (! mii.isDummyPhiInstr(mvec[i]->getOpCode())) - // not a Phi: assume this is a copy and examine its operands - for (int o=0, N=(int) mvec[i]->getNumOperands(); o < N; o++) - { - const MachineOperand& mop = mvec[i]->getOperand(o); - - if (mvec[i]->operandIsDefined(o)) - assert(mop.getVRegValue() == (*PI) && "dest shd be my Phi"); - - if (! mvec[i]->operandIsDefined(o) || - NOT NEEDED? mvec[i]->operandIsDefinedAndUsed(o)) - if (mop.getVRegValue() == inVal) - { // found the copy! - theCopy = mvec[i]; - break; - } - } - - // Found the dang instruction. Now create a node and do the rest... - if (theCopy != NULL) - { - SchedGraphNode* node = new SchedGraphNode(getNumNodes(), bb, - theCopy, origIndexInBB++, target); - this->noteGraphNodeForInstr(theCopy, node); - findDefUseInfoAtInstr(target, node, - memNodeVec, regToRefVecMap,valueToDefVecMap); - } - } -#endif //REALLY_NEED_TO_SEARCH_SUCCESSOR_PHIS + for (unsigned i=0; i < MBB.size(); i++) + if (!mii.isDummyPhiInstr(MBB[i]->getOpCode())) { + SchedGraphNode* node = new SchedGraphNode(getNumNodes(), &MBB, i, target); + noteGraphNodeForInstr(MBB[i], node); + + // Remember all register references and value defs + findDefUseInfoAtInstr(target, node, memNodeVec, regToRefVecMap, + valueToDefVecMap); + } } void SchedGraph::buildGraph(const TargetMachine& target) { - const BasicBlock* bb = bbVec[0]; - - assert(bbVec.size() == 1 && "Only handling a single basic block here"); - // Use this data structure to note all machine operands that compute // ordinary LLVM values. These must be computed defs (i.e., instructions). // Note that there may be multiple machine instructions that define @@ -854,8 +774,8 @@ RegToRefVecMap regToRefVecMap; // Make a dummy root node. We'll add edges to the real roots later. - graphRoot = new SchedGraphNode(0, NULL, NULL, -1, target); - graphLeaf = new SchedGraphNode(1, NULL, NULL, -1, target); + graphRoot = new SchedGraphNode(0, NULL, -1, target); + graphLeaf = new SchedGraphNode(1, NULL, -1, target); //---------------------------------------------------------------- // First add nodes for all the machine instructions in the basic block @@ -863,8 +783,8 @@ // Do this one VM instruction at a time since the SchedGraphNode needs that. // Also, remember the load/store instructions to add memory deps later. //---------------------------------------------------------------- - - buildNodesforBB(target, bb, memNodeVec, regToRefVecMap, valueToDefVecMap); + + buildNodesForBB(target, MBB, memNodeVec, regToRefVecMap, valueToDefVecMap); //---------------------------------------------------------------- // Now add edges for the following (all are incoming edges except (4)): @@ -882,21 +802,19 @@ // //---------------------------------------------------------------- - MachineBasicBlock& bbMvec = MachineBasicBlock::get(bb); - // First, add edges to the terminator instruction of the basic block. - this->addCDEdges(bb->getTerminator(), target); + this->addCDEdges(MBB.getBasicBlock()->getTerminator(), target); // Then add memory dep edges: store->load, load->store, and store->store. // Call instructions are treated as both load and store. this->addMemEdges(memNodeVec, target); // Then add edges between call instructions and CC set/use instructions - this->addCallCCEdges(memNodeVec, bbMvec, target); + this->addCallCCEdges(memNodeVec, MBB, target); // Then add incoming def-use (SSA) edges for each machine instruction. - for (unsigned i=0, N=bbMvec.size(); i < N; i++) - addEdgesForInstruction(*bbMvec[i], valueToDefVecMap, target); + for (unsigned i=0, N=MBB.size(); i < N; i++) + addEdgesForInstruction(*MBB[i], valueToDefVecMap, target); #ifdef NEED_SEPARATE_NONSSA_EDGES_CODE // Then add non-SSA edges for all VM instructions in the block. @@ -955,8 +873,9 @@ SchedGraphSet::buildGraphsForMethod(const Function *F, const TargetMachine& target) { - for (Function::const_iterator BI = F->begin(); BI != F->end(); ++BI) - addGraph(new SchedGraph(BI, target)); + MachineFunction &MF = MachineFunction::get(F); + for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) + addGraph(new SchedGraph(*I, target)); } Index: llvm/lib/CodeGen/InstrSched/SchedGraph.h diff -u llvm/lib/CodeGen/InstrSched/SchedGraph.h:1.24 llvm/lib/CodeGen/InstrSched/SchedGraph.h:1.25 --- llvm/lib/CodeGen/InstrSched/SchedGraph.h:1.24 Sun Oct 27 18:26:50 2002 +++ llvm/lib/CodeGen/InstrSched/SchedGraph.h Mon Oct 28 12:50:08 2002 @@ -132,9 +132,8 @@ class SchedGraphNode: public NonCopyable { -private: - unsigned int nodeId; - const BasicBlock* bb; + unsigned nodeId; + MachineBasicBlock *MBB; const MachineInstr* minstr; std::vector inEdges; std::vector outEdges; @@ -151,14 +150,14 @@ // // Accessor methods // - unsigned int getNodeId () const { return nodeId; } - const MachineInstr* getMachineInstr () const { return minstr; } - const MachineOpCode getOpCode () const { return minstr->getOpCode();} - int getLatency () const { return latency; } - unsigned int getNumInEdges () const { return inEdges.size(); } - unsigned int getNumOutEdges () const { return outEdges.size(); } + unsigned getNodeId () const { return nodeId; } + const MachineInstr* getMachineInstr () const { return minstr; } + const MachineOpCode getOpCode () const { return minstr->getOpCode(); } + int getLatency () const { return latency; } + unsigned getNumInEdges () const { return inEdges.size(); } + unsigned getNumOutEdges () const { return outEdges.size(); } bool isDummyNode () const { return (minstr == NULL); } - const BasicBlock* getBB () const { return bb; } + MachineBasicBlock &getMachineBasicBlock() const { return *MBB; } int getOrigIndexInBB() const { return origIndexInBB; } // @@ -194,11 +193,10 @@ // disable default constructor and provide a ctor for single-block graphs /*ctor*/ SchedGraphNode(); // DO NOT IMPLEMENT - /*ctor*/ SchedGraphNode (unsigned int _nodeId, - const BasicBlock* _bb, - const MachineInstr* _minstr, + /*ctor*/ SchedGraphNode (unsigned nodeId, + MachineBasicBlock *mbb, int indexInBB, - const TargetMachine& _target); + const TargetMachine& Target); /*dtor*/ ~SchedGraphNode (); }; @@ -208,8 +206,7 @@ public NonCopyable, private hash_map { -private: - std::vector bbVec; // basic blocks included in the graph + MachineBasicBlock &MBB; // basic blocks for this graph SchedGraphNode* graphRoot; // the root and leaf are not inserted SchedGraphNode* graphLeaf; // in the hash_map (see getNumNodes()) @@ -222,8 +219,8 @@ // // Accessor methods // - const std::vector& getBasicBlocks() const { return bbVec; } - const unsigned int getNumNodes() const { return size()+2; } + MachineBasicBlock &getBasicBlock() const { return MBB; } + unsigned getNumNodes() const { return size()+2; } SchedGraphNode* getRoot() const { return graphRoot; } SchedGraphNode* getLeaf() const { return graphLeaf; } @@ -272,8 +269,7 @@ friend class SchedGraphSet; // give access to ctor // disable default constructor and provide a ctor for single-block graphs - /*ctor*/ SchedGraph (); // DO NOT IMPLEMENT - /*ctor*/ SchedGraph (const BasicBlock* bb, + /*ctor*/ SchedGraph (MachineBasicBlock &bb, const TargetMachine& target); /*dtor*/ ~SchedGraph (); @@ -289,8 +285,8 @@ // void buildGraph (const TargetMachine& target); - void buildNodesforBB (const TargetMachine& target, - const BasicBlock* bb, + void buildNodesForBB (const TargetMachine& target, + MachineBasicBlock &MBB, std::vector& memNod, RegToRefVecMap& regToRefVecMap, ValueToDefVecMap& valueToDefVecMap); Index: llvm/lib/CodeGen/InstrSched/SchedPriorities.cpp diff -u llvm/lib/CodeGen/InstrSched/SchedPriorities.cpp:1.22 llvm/lib/CodeGen/InstrSched/SchedPriorities.cpp:1.23 --- llvm/lib/CodeGen/InstrSched/SchedPriorities.cpp:1.22 Fri Aug 9 15:07:54 2002 +++ llvm/lib/CodeGen/InstrSched/SchedPriorities.cpp Mon Oct 28 12:50:08 2002 @@ -12,6 +12,7 @@ #include "SchedPriorities.h" #include "llvm/Analysis/LiveVar/FunctionLiveVarInfo.h" +#include "llvm/CodeGen/MachineBasicBlock.h" #include "llvm/Support/CFG.h" #include "Support/PostOrderIterator.h" using std::cerr; @@ -269,7 +270,7 @@ // else check if instruction is a last use and save it in the hash_map bool hasLastUse = false; - const BasicBlock* bb = graphNode->getBB(); + const BasicBlock* bb = graphNode->getMachineBasicBlock().getBasicBlock(); const ValueSet &LVs = LVI.getLiveVarSetBeforeMInst(MI, bb); for (MachineInstr::const_val_op_iterator OI = MI->begin(), OE = MI->end(); From lattner at cs.uiuc.edu Mon Oct 28 13:02:01 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon Oct 28 13:02:01 2002 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/InstrSelection/InstrSelection.cpp Message-ID: <200210281901.NAA18320@apoc.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/InstrSelection: InstrSelection.cpp updated: 1.52 -> 1.53 --- Log message: Remove usage of MachineBasicBlock::get --- Diffs of the changes: Index: llvm/lib/CodeGen/InstrSelection/InstrSelection.cpp diff -u llvm/lib/CodeGen/InstrSelection/InstrSelection.cpp:1.52 llvm/lib/CodeGen/InstrSelection/InstrSelection.cpp:1.53 --- llvm/lib/CodeGen/InstrSelection/InstrSelection.cpp:1.52 Sun Oct 27 23:30:46 2002 +++ llvm/lib/CodeGen/InstrSelection/InstrSelection.cpp Mon Oct 28 13:01:16 2002 @@ -176,9 +176,9 @@ { // for all basic blocks in function // - for (Function::iterator BB = F.begin(); BB != F.end(); ++BB) { - BasicBlock::InstListType &InstList = BB->getInstList(); - for (BasicBlock::iterator IIt = InstList.begin(); + MachineFunction &MF = MachineFunction::get(&F); + for (MachineFunction::iterator BB = MF.begin(); BB != MF.end(); ++BB) { + for (BasicBlock::iterator IIt = BB->getBasicBlock()->begin(); PHINode *PN = dyn_cast(&*IIt); ++IIt) { // FIXME: This is probably wrong... Value *PhiCpRes = new PHINode(PN->getType(), "PhiCp:"); @@ -208,11 +208,7 @@ vector mvec; Target.getRegInfo().cpValue2Value(PhiCpRes, PN, mvec); - - // get an iterator to machine instructions in the BB - MachineBasicBlock& bbMvec = MachineBasicBlock::get(BB); - - bbMvec.insert(bbMvec.begin(), mvec.begin(), mvec.end()); + BB->insert(BB->begin(), mvec.begin(), mvec.end()); } // for each Phi Instr in BB } // for all BBs in function } @@ -229,21 +225,29 @@ Instruction *TermInst = (Instruction*)BB->getTerminator(); MachineCodeForInstruction &MC4Term = MachineCodeForInstruction::get(TermInst); MachineInstr *FirstMIOfTerm = MC4Term.front(); - assert (FirstMIOfTerm && "No Machine Instrs for terminator"); - - MachineBasicBlock &bbMvec = MachineBasicBlock::get(BB); + + MachineFunction &MF = MachineFunction::get(BB->getParent()); + MachineBasicBlock *MBB; + + // FIXME: if PHI instructions existed in the machine code, this would be + // unnecesary. + for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) + if (I->getBasicBlock() == BB) { + MBB = I; + break; + } // find the position of first machine instruction generated by the // terminator of this BB MachineBasicBlock::iterator MCIt = - std::find(bbMvec.begin(), bbMvec.end(), FirstMIOfTerm); + std::find(MBB->begin(), MBB->end(), FirstMIOfTerm); - assert( MCIt != bbMvec.end() && "Start inst of terminator not found"); + assert(MCIt != MBB->end() && "Start inst of terminator not found"); // insert the copy instructions just before the first machine instruction // generated for the terminator - bbMvec.insert(MCIt, CpVec.begin(), CpVec.end()); + MBB->insert(MCIt, CpVec.begin(), CpVec.end()); } From hldnbrnd at cs.uiuc.edu Mon Oct 28 13:06:01 2002 From: hldnbrnd at cs.uiuc.edu (Nicholas Hildenbrandt) Date: Mon Oct 28 13:06:01 2002 Subject: [llvm-commits] CVS: llvm/lib/CWriter/Writer.cpp Message-ID: <200210281905.NAA24865@niobe.cs.uiuc.edu> Changes in directory llvm/lib/CWriter: Writer.cpp updated: 1.66 -> 1.67 --- Log message: (null) --- Diffs of the changes: Index: llvm/lib/CWriter/Writer.cpp diff -u llvm/lib/CWriter/Writer.cpp:1.66 llvm/lib/CWriter/Writer.cpp:1.67 --- llvm/lib/CWriter/Writer.cpp:1.66 Wed Oct 23 13:59:40 2002 +++ llvm/lib/CWriter/Writer.cpp Mon Oct 28 13:05:12 2002 @@ -451,7 +451,7 @@ return; } - if (Operand->hasName()) { + if (Operand->hasName()) { Out << getValueName(Operand); } else if (Constant *CPV = dyn_cast(Operand)) { printConstant(CPV); @@ -575,6 +575,19 @@ Out << "extern void * malloc(size_t);\n\n"; } + // Output the global variable declerations + if (!M->gempty()) { + Out << "\n\n/* Global Variable Declerations */\n"; + for (Module::giterator I = M->gbegin(), E = M->gend(); I != E; ++I) + if (!I->isExternal()) { + Out << "extern "; + printType(I->getType()->getElementType(), getValueName(I)); + + Out << ";\n"; + } + } + + // Output the global variable definitions and contents... if (!M->gempty()) { Out << "\n\n/* Global Variable Definitions and Initialization */\n"; From lattner at cs.uiuc.edu Mon Oct 28 13:23:01 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon Oct 28 13:23:01 2002 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/RegAlloc/LiveRangeInfo.cpp PhyRegAlloc.cpp Message-ID: <200210281922.NAA18732@apoc.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/RegAlloc: LiveRangeInfo.cpp updated: 1.33 -> 1.34 PhyRegAlloc.cpp updated: 1.84 -> 1.85 --- Log message: Eliminate usage of MachineBasicBlock::get --- Diffs of the changes: Index: llvm/lib/CodeGen/RegAlloc/LiveRangeInfo.cpp diff -u llvm/lib/CodeGen/RegAlloc/LiveRangeInfo.cpp:1.33 llvm/lib/CodeGen/RegAlloc/LiveRangeInfo.cpp:1.34 --- llvm/lib/CodeGen/RegAlloc/LiveRangeInfo.cpp:1.33 Sun Oct 27 22:45:27 2002 +++ llvm/lib/CodeGen/RegAlloc/LiveRangeInfo.cpp Mon Oct 28 13:22:04 2002 @@ -8,7 +8,7 @@ #include "llvm/CodeGen/RegAllocCommon.h" #include "llvm/CodeGen/RegClass.h" #include "llvm/CodeGen/MachineInstr.h" -#include "llvm/CodeGen/MachineBasicBlock.h" +#include "llvm/CodeGen/MachineFunction.h" #include "llvm/Target/TargetMachine.h" #include "llvm/Target/MachineInstrInfo.h" #include "llvm/Function.h" @@ -146,13 +146,13 @@ // // Also, find CALL and RETURN instructions, which need extra work. // - for (Function::const_iterator BBI=Meth->begin(); BBI != Meth->end(); ++BBI){ - // get the vector of machine instructions for this basic block. - MachineBasicBlock& MIVec = MachineBasicBlock::get(BBI); + MachineFunction &MF = MachineFunction::get(Meth); + for (MachineFunction::iterator BBI = MF.begin(); BBI != MF.end(); ++BBI) { + MachineBasicBlock &MBB = *BBI; // iterate over all the machine instructions in BB - for(MachineBasicBlock::iterator MInstIterator = MIVec.begin(); - MInstIterator != MIVec.end(); ++MInstIterator) { + for(MachineBasicBlock::iterator MInstIterator = MBB.begin(); + MInstIterator != MBB.end(); ++MInstIterator) { MachineInstr *MInst = *MInstIterator; // If the machine instruction is a call/return instruction, add it to @@ -248,35 +248,30 @@ if(DEBUG_RA >= RA_DEBUG_LiveRanges) cerr << "\nCoalescing LRs ...\n"; - for(Function::const_iterator BBI = Meth->begin(), BBE = Meth->end(); - BBI != BBE; ++BBI) { - - // get the iterator for machine instructions - const MachineBasicBlock& MIVec = MachineBasicBlock::get(BBI); - MachineBasicBlock::const_iterator MInstIterator = MIVec.begin(); + MachineFunction &MF = MachineFunction::get(Meth); + for (MachineFunction::iterator BBI = MF.begin(); BBI != MF.end(); ++BBI) { + MachineBasicBlock &MBB = *BBI; // iterate over all the machine instructions in BB - for( ; MInstIterator != MIVec.end(); ++MInstIterator) { - const MachineInstr * MInst = *MInstIterator; + for(MachineBasicBlock::iterator MII = MBB.begin(); MII != MBB.end(); ++MII){ + const MachineInstr *MI = *MII; if( DEBUG_RA >= RA_DEBUG_LiveRanges) { cerr << " *Iterating over machine instr "; - MInst->dump(); + MI->dump(); cerr << "\n"; } - // iterate over MI operands to find defs - for(MachineInstr::const_val_op_iterator DefI = MInst->begin(), - DefE = MInst->end(); DefI != DefE; ++DefI) { + for(MachineInstr::const_val_op_iterator DefI = MI->begin(), + DefE = MI->end(); DefI != DefE; ++DefI) { if (DefI.isDef()) { // iff this operand is a def LiveRange *LROfDef = getLiveRangeForValue( *DefI ); RegClass *RCOfDef = LROfDef->getRegClass(); - MachineInstr::const_val_op_iterator UseI = MInst->begin(), - UseE = MInst->end(); - for( ; UseI != UseE; ++UseI){ // for all uses - + MachineInstr::const_val_op_iterator UseI = MI->begin(), + UseE = MI->end(); + for( ; UseI != UseE; ++UseI) { // for all uses LiveRange *LROfUse = getLiveRangeForValue( *UseI ); if (!LROfUse) { // if LR of use is not found //don't warn about labels Index: llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp diff -u llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp:1.84 llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp:1.85 --- llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp:1.84 Sun Oct 27 22:45:27 2002 +++ llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp Mon Oct 28 13:22:04 2002 @@ -77,16 +77,13 @@ //---------------------------------------------------------------------------- PhyRegAlloc::PhyRegAlloc(Function *F, const TargetMachine& tm, FunctionLiveVarInfo *Lvi, LoopInfo *LDC) - : TM(tm), Meth(F), - mcInfo(MachineFunction::get(F)), - LVI(Lvi), LRI(F, tm, RegClassList), - MRI(tm.getRegInfo()), - NumOfRegClasses(MRI.getNumOfRegClasses()), - LoopDepthCalc(LDC) { + : TM(tm), Fn(F), MF(MachineFunction::get(F)), LVI(Lvi), + LRI(F, tm, RegClassList), MRI(tm.getRegInfo()), + NumOfRegClasses(MRI.getNumOfRegClasses()), LoopDepthCalc(LDC) { // create each RegisterClass and put in RegClassList // - for (unsigned rc=0; rc < NumOfRegClasses; rc++) + for (unsigned rc=0; rc != NumOfRegClasses; rc++) RegClassList.push_back(new RegClass(F, MRI.getMachineRegClass(rc), &ResColList)); } @@ -266,29 +263,28 @@ cerr << "Creating interference graphs ...\n"; unsigned BBLoopDepthCost; - for (Function::const_iterator BBI = Meth->begin(), BBE = Meth->end(); + for (MachineFunction::iterator BBI = MF.begin(), BBE = MF.end(); BBI != BBE; ++BBI) { + const MachineBasicBlock &MBB = *BBI; + const BasicBlock *BB = MBB.getBasicBlock(); // find the 10^(loop_depth) of this BB // - BBLoopDepthCost = (unsigned)pow(10.0, LoopDepthCalc->getLoopDepth(BBI)); + BBLoopDepthCost = (unsigned)pow(10.0, LoopDepthCalc->getLoopDepth(BB)); // get the iterator for machine instructions // - const MachineBasicBlock& MIVec = MachineBasicBlock::get(BBI); - MachineBasicBlock::const_iterator MII = MIVec.begin(); + MachineBasicBlock::const_iterator MII = MBB.begin(); // iterate over all the machine instructions in BB // - for ( ; MII != MIVec.end(); ++MII) { - - const MachineInstr *MInst = *MII; + for ( ; MII != MBB.end(); ++MII) { + const MachineInstr *MInst = *MII; // get the LV set after the instruction // - const ValueSet &LVSetAI = LVI->getLiveVarSetAfterMInst(MInst, BBI); - - const bool isCallInst = TM.getInstrInfo().isCall(MInst->getOpCode()); + const ValueSet &LVSetAI = LVI->getLiveVarSetAfterMInst(MInst, BB); + bool isCallInst = TM.getInstrInfo().isCall(MInst->getOpCode()); if (isCallInst ) { // set the isCallInterference flag of each live range wich extends @@ -299,7 +295,6 @@ setCallInterferences(MInst, &LVSetAI); } - // iterate over all MI operands to find defs // for (MachineInstr::const_val_op_iterator OpI = MInst->begin(), @@ -394,9 +389,9 @@ void PhyRegAlloc::addInterferencesForArgs() { // get the InSet of root BB - const ValueSet &InSet = LVI->getInSetOfBB(&Meth->front()); + const ValueSet &InSet = LVI->getInSetOfBB(&Fn->front()); - for (Function::const_aiterator AI=Meth->abegin(); AI != Meth->aend(); ++AI) { + for (Function::const_aiterator AI = Fn->abegin(); AI != Fn->aend(); ++AI) { // add interferences between args and LVars at start addInterference(AI, &InSet, false); @@ -420,25 +415,25 @@ //----------------------------- inline void InsertBefore(MachineInstr* newMI, - MachineBasicBlock& MIVec, + MachineBasicBlock& MBB, MachineBasicBlock::iterator& MII) { - MII = MIVec.insert(MII, newMI); + MII = MBB.insert(MII, newMI); ++MII; } inline void InsertAfter(MachineInstr* newMI, - MachineBasicBlock& MIVec, + MachineBasicBlock& MBB, MachineBasicBlock::iterator& MII) { ++MII; // insert before the next instruction - MII = MIVec.insert(MII, newMI); + MII = MBB.insert(MII, newMI); } inline void SubstituteInPlace(MachineInstr* newMI, - MachineBasicBlock& MIVec, + MachineBasicBlock& MBB, MachineBasicBlock::iterator MII) { *MII = newMI; @@ -446,7 +441,7 @@ inline void PrependInstructions(vector &IBef, - MachineBasicBlock& MIVec, + MachineBasicBlock& MBB, MachineBasicBlock::iterator& MII, const std::string& msg) { @@ -460,14 +455,14 @@ if (OrigMI) cerr << "For MInst:\n " << *OrigMI; cerr << msg << "PREPENDed instr:\n " << **AdIt << "\n"; } - InsertBefore(*AdIt, MIVec, MII); + InsertBefore(*AdIt, MBB, MII); } } } inline void AppendInstructions(std::vector &IAft, - MachineBasicBlock& MIVec, + MachineBasicBlock& MBB, MachineBasicBlock::iterator& MII, const std::string& msg) { @@ -481,34 +476,30 @@ if (OrigMI) cerr << "For MInst:\n " << *OrigMI; cerr << msg << "APPENDed instr:\n " << **AdIt << "\n"; } - InsertAfter(*AdIt, MIVec, MII); + InsertAfter(*AdIt, MBB, MII); } } } -void PhyRegAlloc::updateMachineCode() -{ - MachineBasicBlock& MIVec = MachineBasicBlock::get(&Meth->getEntryNode()); - +void PhyRegAlloc::updateMachineCode() { // Insert any instructions needed at method entry - MachineBasicBlock::iterator MII = MIVec.begin(); - PrependInstructions(AddedInstrAtEntry.InstrnsBefore, MIVec, MII, + MachineBasicBlock::iterator MII = MF.front().begin(); + PrependInstructions(AddedInstrAtEntry.InstrnsBefore, MF.front(), MII, "At function entry: \n"); assert(AddedInstrAtEntry.InstrnsAfter.empty() && "InstrsAfter should be unnecessary since we are just inserting at " "the function entry point here."); - for (Function::const_iterator BBI = Meth->begin(), BBE = Meth->end(); + for (MachineFunction::iterator BBI = MF.begin(), BBE = MF.end(); BBI != BBE; ++BBI) { // iterate over all the machine instructions in BB - MachineBasicBlock &MIVec = MachineBasicBlock::get(BBI); - for (MachineBasicBlock::iterator MII = MIVec.begin(); - MII != MIVec.end(); ++MII) { - + MachineBasicBlock &MBB = *BBI; + for (MachineBasicBlock::iterator MII = MBB.begin(); + MII != MBB.end(); ++MII) { + MachineInstr *MInst = *MII; - unsigned Opcode = MInst->getOpCode(); // do not process Phis @@ -516,20 +507,19 @@ continue; // Reset tmp stack positions so they can be reused for each machine instr. - mcInfo.popAllTempValues(TM); + MF.popAllTempValues(TM); // Now insert speical instructions (if necessary) for call/return // instructions. // if (TM.getInstrInfo().isCall(Opcode) || - TM.getInstrInfo().isReturn(Opcode)) { - - AddedInstrns &AI = AddedInstrMap[MInst]; + TM.getInstrInfo().isReturn(Opcode)) { + AddedInstrns &AI = AddedInstrMap[MInst]; - if (TM.getInstrInfo().isCall(Opcode)) - MRI.colorCallArgs(MInst, LRI, &AI, *this, BBI); - else if (TM.getInstrInfo().isReturn(Opcode)) - MRI.colorRetValue(MInst, LRI, &AI); + if (TM.getInstrInfo().isCall(Opcode)) + MRI.colorCallArgs(MInst, LRI, &AI, *this, MBB.getBasicBlock()); + else if (TM.getInstrInfo().isReturn(Opcode)) + MRI.colorRetValue(MInst, LRI, &AI); } // Set the registers for operands in the machine instruction @@ -553,13 +543,13 @@ continue; } - if (LR->hasColor() ) + if (LR->hasColor()) MInst->SetRegForOperand(OpNum, MRI.getUnifiedRegNum(LR->getRegClass()->getID(), LR->getColor())); else // LR did NOT receive a color (register). Insert spill code. - insertCode4SpilledLR(LR, MInst, BBI, OpNum ); + insertCode4SpilledLR(LR, MInst, MBB.getBasicBlock(), OpNum); } } // for each operand @@ -573,7 +563,7 @@ // branch because putting code before or after it would be VERY BAD! // unsigned bumpIteratorBy = 0; - if (MII != MIVec.begin()) + if (MII != MBB.begin()) if (unsigned predDelaySlots = TM.getInstrInfo().getNumDelaySlots((*(MII-1))->getOpCode())) { @@ -585,10 +575,10 @@ // Current instruction is in the delay slot of a branch and it // needs spill code inserted before or after it. // Move it before the preceding branch. - InsertBefore(MInst, MIVec, --MII); + InsertBefore(MInst, MBB, --MII); MachineInstr* nopI = new MachineInstr(TM.getInstrInfo().getNOPOpCode()); - SubstituteInPlace(nopI, MIVec, MII+1); // replace orig with NOP + SubstituteInPlace(nopI, MBB, MII+1); // replace orig with NOP --MII; // point to MInst in new location bumpIteratorBy = 2; // later skip the branch and the NOP! } @@ -598,7 +588,7 @@ // instruction, add them now. // if (AddedInstrMap.count(MInst)) { - PrependInstructions(AddedInstrMap[MInst].InstrnsBefore, MIVec, MII,""); + PrependInstructions(AddedInstrMap[MInst].InstrnsBefore, MBB, MII,""); } // If there are instructions to be added *after* this machine @@ -627,7 +617,7 @@ else { // Here we can add the "instructions after" to the current // instruction since there are no delay slots for this instruction - AppendInstructions(AddedInstrMap[MInst].InstrnsAfter, MIVec, MII,""); + AppendInstructions(AddedInstrMap[MInst].InstrnsAfter, MBB, MII,""); } // if not delay } @@ -667,7 +657,7 @@ RegClass *RC = LR->getRegClass(); const ValueSet &LVSetBef = LVI->getLiveVarSetBeforeMInst(MInst, BB); - mcInfo.pushTempValue(TM, MRI.getSpilledRegSize(RegType) ); + MF.pushTempValue(TM, MRI.getSpilledRegSize(RegType) ); vector MIBef, MIAft; vector AdIMid; @@ -758,7 +748,7 @@ // we couldn't find an unused register. Generate code to free up a reg by // saving it on stack and restoring after the instruction - int TmpOff = mcInfo.pushTempValue(TM, MRI.getSpilledRegSize(RegType) ); + int TmpOff = MF.pushTempValue(TM, MRI.getSpilledRegSize(RegType) ); RegU = getUniRegNotUsedByThisInst(RC, MInst); @@ -950,19 +940,19 @@ void PhyRegAlloc::printMachineCode() { - cerr << "\n;************** Function " << Meth->getName() + cerr << "\n;************** Function " << Fn->getName() << " *****************\n"; - for (Function::const_iterator BBI = Meth->begin(), BBE = Meth->end(); + for (MachineFunction::iterator BBI = MF.begin(), BBE = MF.end(); BBI != BBE; ++BBI) { - cerr << "\n"; printLabel(BBI); cerr << ": "; + cerr << "\n"; printLabel(BBI->getBasicBlock()); cerr << ": "; // get the iterator for machine instructions - MachineBasicBlock& MIVec = MachineBasicBlock::get(BBI); - MachineBasicBlock::iterator MII = MIVec.begin(); + MachineBasicBlock& MBB = *BBI; + MachineBasicBlock::iterator MII = MBB.begin(); // iterate over all the machine instructions in BB - for ( ; MII != MIVec.end(); ++MII) { + for ( ; MII != MBB.end(); ++MII) { MachineInstr *const MInst = *MII; cerr << "\n\t"; @@ -1038,22 +1028,18 @@ //---------------------------------------------------------------------------- void PhyRegAlloc::colorIncomingArgs() { - const BasicBlock &FirstBB = Meth->front(); - const MachineInstr *FirstMI = MachineBasicBlock::get(&FirstBB).front(); - assert(FirstMI && "No machine instruction in entry BB"); - - MRI.colorMethodArgs(Meth, LRI, &AddedInstrAtEntry); + MRI.colorMethodArgs(Fn, LRI, &AddedInstrAtEntry); } //---------------------------------------------------------------------------- // Used to generate a label for a basic block //---------------------------------------------------------------------------- -void PhyRegAlloc::printLabel(const Value *const Val) { +void PhyRegAlloc::printLabel(const Value *Val) { if (Val->hasName()) cerr << Val->getName(); else - cerr << "Label" << Val; + cerr << "Label" << Val; } @@ -1106,7 +1092,7 @@ if (HMI->first && HMI->second) { LiveRange *L = HMI->second; // get the LiveRange if (!L->hasColor()) { // NOTE: ** allocating the size of long Type ** - int stackOffset = mcInfo.allocateSpilledValue(TM, Type::LongTy); + int stackOffset = MF.allocateSpilledValue(TM, Type::LongTy); L->setSpillOffFromFP(stackOffset); if (DEBUG_RA) cerr << " LR# " << L->getUserIGNode()->getIndex() @@ -1148,19 +1134,17 @@ for ( unsigned rc=0; rc < NumOfRegClasses ; rc++) RegClassList[rc]->printIG(); } - LRI.coalesceLRs(); // coalesce all live ranges - if (DEBUG_RA >= RA_DEBUG_LiveRanges) { // print all LRs in all reg classes - for ( unsigned rc=0; rc < NumOfRegClasses ; rc++) - RegClassList[ rc ]->printIGNodeList(); + for (unsigned rc=0; rc < NumOfRegClasses; rc++) + RegClassList[rc]->printIGNodeList(); // print IGs in all register classes - for ( unsigned rc=0; rc < NumOfRegClasses ; rc++) - RegClassList[ rc ]->printIG(); + for (unsigned rc=0; rc < NumOfRegClasses; rc++) + RegClassList[rc]->printIG(); } @@ -1172,14 +1156,14 @@ // color all register classes using the graph coloring algo for (unsigned rc=0; rc < NumOfRegClasses ; rc++) - RegClassList[ rc ]->colorAllRegs(); + RegClassList[rc]->colorAllRegs(); // Atter grpah coloring, if some LRs did not receive a color (i.e, spilled) // a poistion for such spilled LRs // allocateStackSpace4SpilledLRs(); - mcInfo.popAllTempValues(TM); // TODO **Check + MF.popAllTempValues(TM); // TODO **Check // color incoming args - if the correct color was not received // insert code to copy to the correct register @@ -1194,7 +1178,7 @@ if (DEBUG_RA) { cerr << "\n**** Machine Code After Register Allocation:\n\n"; - MachineFunction::get(Meth).dump(); + MF.dump(); } } From lattner at cs.uiuc.edu Mon Oct 28 13:33:01 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon Oct 28 13:33:01 2002 Subject: [llvm-commits] CVS: llvm/lib/Target/Sparc/SparcRegInfo.cpp Message-ID: <200210281932.NAA19612@apoc.cs.uiuc.edu> Changes in directory llvm/lib/Target/Sparc: SparcRegInfo.cpp updated: 1.77 -> 1.78 --- Log message: Fixes to work with updated RegAlloc --- Diffs of the changes: Index: llvm/lib/Target/Sparc/SparcRegInfo.cpp diff -u llvm/lib/Target/Sparc/SparcRegInfo.cpp:1.77 llvm/lib/Target/Sparc/SparcRegInfo.cpp:1.78 --- llvm/lib/Target/Sparc/SparcRegInfo.cpp:1.77 Sun Oct 27 22:45:29 2002 +++ llvm/lib/Target/Sparc/SparcRegInfo.cpp Mon Oct 28 13:32:07 2002 @@ -683,7 +683,7 @@ else { // Copy UniLRReg to the stack to pass the arg on stack. const MachineFrameInfo& frameInfo = target.getFrameInfo(); - int argOffset = frameInfo.getOutgoingArgOffset(PRA.mcInfo, argNo); + int argOffset = frameInfo.getOutgoingArgOffset(PRA.MF, argNo); cpReg2MemMI(CallAI->InstrnsBefore, UniLRReg, getStackPointer(), argOffset, regType); } @@ -705,10 +705,10 @@ // Use TmpOff to save TReg, since that may have a live value. // int TReg = PRA.getUniRegNotUsedByThisInst( LR->getRegClass(), CallMI ); - int TmpOff = PRA.mcInfo.pushTempValue(target, - getSpilledRegSize(getRegType(LR))); + int TmpOff = PRA.MF.pushTempValue(target, + getSpilledRegSize(getRegType(LR))); const MachineFrameInfo& frameInfo = target.getFrameInfo(); - int argOffset = frameInfo.getOutgoingArgOffset(PRA.mcInfo, argNo); + int argOffset = frameInfo.getOutgoingArgOffset(PRA.MF, argNo); MachineInstr *Ad1, *Ad2, *Ad3, *Ad4; @@ -1413,8 +1413,8 @@ // and add them to InstrnsBefore and InstrnsAfter of the // call instruction // - int StackOff = PRA.mcInfo.pushTempValue(target, - getSpilledRegSize(RegType)); + int StackOff = PRA.MF.pushTempValue(target, + getSpilledRegSize(RegType)); vector AdIBef, AdIAft; @@ -1709,12 +1709,12 @@ // Now we are processing %ox of 1. // We have to - const int UReg = DefOp.getMachineRegNum(); - const int RegType = getRegType(UReg); + int UReg = DefOp.getMachineRegNum(); + int RegType = getRegType(UReg); MachineInstr *AdIBef, *AdIAft; - const int StackOff = PRA.mcInfo.pushTempValue(target, - getSpilledRegSize(RegType)); + const int StackOff = PRA.MF.pushTempValue(target, + getSpilledRegSize(RegType)); // Save the UReg (%ox) on stack before it's destroyed vector mvec; From lattner at cs.uiuc.edu Mon Oct 28 13:44:00 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon Oct 28 13:44:00 2002 Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/PhyRegAlloc.h Message-ID: <200210281943.NAA22755@apoc.cs.uiuc.edu> Changes in directory llvm/include/llvm/CodeGen: PhyRegAlloc.h updated: 1.37 -> 1.38 --- Log message: Rename some regalloc fields --- Diffs of the changes: Index: llvm/include/llvm/CodeGen/PhyRegAlloc.h diff -u llvm/include/llvm/CodeGen/PhyRegAlloc.h:1.37 llvm/include/llvm/CodeGen/PhyRegAlloc.h:1.38 --- llvm/include/llvm/CodeGen/PhyRegAlloc.h:1.37 Sun Oct 27 18:25:36 2002 +++ llvm/include/llvm/CodeGen/PhyRegAlloc.h Mon Oct 28 13:43:23 2002 @@ -51,8 +51,8 @@ //---------------------------------------------------------------------------- struct AddedInstrns { - std::vector InstrnsBefore;// Added insts BEFORE an existing inst - std::vector InstrnsAfter; // Added insts AFTER an existing inst + std::vector InstrnsBefore;//Insts added BEFORE an existing inst + std::vector InstrnsAfter; //Insts added AFTER an existing inst }; typedef std::map AddedInstrMapType; @@ -70,8 +70,8 @@ std::vector RegClassList; // vector of register classes const TargetMachine &TM; // target machine - const Function *Meth; // name of the function we work on - MachineFunction &mcInfo; // descriptor for method's native code + const Function *Fn; // name of the function we work on + MachineFunction &MF; // descriptor for method's native code FunctionLiveVarInfo *const LVI; // LV information for this method // (already computed for BBs) LiveRangeInfo LRI; // LR info (will be computed) From lattner at cs.uiuc.edu Mon Oct 28 13:47:00 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon Oct 28 13:47:00 2002 Subject: [llvm-commits] CVS: llvm/lib/Target/Sparc/SparcRegInfo.cpp Message-ID: <200210281946.NAA23224@apoc.cs.uiuc.edu> Changes in directory llvm/lib/Target/Sparc: SparcRegInfo.cpp updated: 1.78 -> 1.79 --- Log message: Don't bother passing in default value --- Diffs of the changes: Index: llvm/lib/Target/Sparc/SparcRegInfo.cpp diff -u llvm/lib/Target/Sparc/SparcRegInfo.cpp:1.78 llvm/lib/Target/Sparc/SparcRegInfo.cpp:1.79 --- llvm/lib/Target/Sparc/SparcRegInfo.cpp:1.78 Mon Oct 28 13:32:07 2002 +++ llvm/lib/Target/Sparc/SparcRegInfo.cpp Mon Oct 28 13:46:25 2002 @@ -1151,8 +1151,8 @@ case IntRegType: assert(target.getInstrInfo().constantFitsInImmedField(STX, Offset)); MI = new MachineInstr(STX, 3); - MI->SetMachineOperandReg(0, SrcReg, false); - MI->SetMachineOperandReg(1, DestPtrReg, false); + MI->SetMachineOperandReg(0, SrcReg); + MI->SetMachineOperandReg(1, DestPtrReg); MI->SetMachineOperandConst(2, MachineOperand:: MO_SignExtendedImmed, (int64_t) Offset); mvec.push_back(MI); @@ -1161,8 +1161,8 @@ case FPSingleRegType: assert(target.getInstrInfo().constantFitsInImmedField(ST, Offset)); MI = new MachineInstr(ST, 3); - MI->SetMachineOperandReg(0, SrcReg, false); - MI->SetMachineOperandReg(1, DestPtrReg, false); + MI->SetMachineOperandReg(0, SrcReg); + MI->SetMachineOperandReg(1, DestPtrReg); MI->SetMachineOperandConst(2, MachineOperand:: MO_SignExtendedImmed, (int64_t) Offset); mvec.push_back(MI); @@ -1171,8 +1171,8 @@ case FPDoubleRegType: assert(target.getInstrInfo().constantFitsInImmedField(STD, Offset)); MI = new MachineInstr(STD, 3); - MI->SetMachineOperandReg(0, SrcReg, false); - MI->SetMachineOperandReg(1, DestPtrReg, false); + MI->SetMachineOperandReg(0, SrcReg); + MI->SetMachineOperandReg(1, DestPtrReg); MI->SetMachineOperandConst(2, MachineOperand:: MO_SignExtendedImmed, (int64_t) Offset); mvec.push_back(MI); @@ -1193,8 +1193,8 @@ assert(0 && "Tell Vikram if this assertion fails: we may have to mask out the other bits here"); assert(target.getInstrInfo().constantFitsInImmedField(STXFSR, Offset)); MI = new MachineInstr(STXFSR, 3); - MI->SetMachineOperandReg(0, SrcReg, false); - MI->SetMachineOperandReg(1, DestPtrReg, false); + MI->SetMachineOperandReg(0, SrcReg); + MI->SetMachineOperandReg(1, DestPtrReg); MI->SetMachineOperandConst(2, MachineOperand:: MO_SignExtendedImmed, (int64_t) Offset); mvec.push_back(MI); @@ -1224,7 +1224,7 @@ case IntRegType: assert(target.getInstrInfo().constantFitsInImmedField(LDX, Offset)); MI = new MachineInstr(LDX, 3); - MI->SetMachineOperandReg(0, SrcPtrReg, false); + MI->SetMachineOperandReg(0, SrcPtrReg); MI->SetMachineOperandConst(1, MachineOperand:: MO_SignExtendedImmed, (int64_t) Offset); MI->SetMachineOperandReg(2, DestReg, true); @@ -1234,7 +1234,7 @@ case FPSingleRegType: assert(target.getInstrInfo().constantFitsInImmedField(LD, Offset)); MI = new MachineInstr(LD, 3); - MI->SetMachineOperandReg(0, SrcPtrReg, false); + MI->SetMachineOperandReg(0, SrcPtrReg); MI->SetMachineOperandConst(1, MachineOperand:: MO_SignExtendedImmed, (int64_t) Offset); MI->SetMachineOperandReg(2, DestReg, true); @@ -1244,7 +1244,7 @@ case FPDoubleRegType: assert(target.getInstrInfo().constantFitsInImmedField(LDD, Offset)); MI = new MachineInstr(LDD, 3); - MI->SetMachineOperandReg(0, SrcPtrReg, false); + MI->SetMachineOperandReg(0, SrcPtrReg); MI->SetMachineOperandConst(1, MachineOperand:: MO_SignExtendedImmed, (int64_t) Offset); MI->SetMachineOperandReg(2, DestReg, true); @@ -1266,7 +1266,7 @@ assert(0 && "Tell Vikram if this assertion fails: we may have to mask out the other bits here"); assert(target.getInstrInfo().constantFitsInImmedField(LDXFSR, Offset)); MI = new MachineInstr(LDXFSR, 3); - MI->SetMachineOperandReg(0, SrcPtrReg, false); + MI->SetMachineOperandReg(0, SrcPtrReg); MI->SetMachineOperandConst(1, MachineOperand:: MO_SignExtendedImmed, (int64_t) Offset); MI->SetMachineOperandReg(2, DestReg, true); @@ -1299,7 +1299,7 @@ case IntRegType: MI = new MachineInstr(ADD, 3); MI->SetMachineOperandVal(0, MachineOperand:: MO_VirtualRegister, Src, false); - MI->SetMachineOperandReg(1, getZeroRegNum(), false); + MI->SetMachineOperandReg(1, getZeroRegNum()); MI->SetMachineOperandVal(2, MachineOperand:: MO_VirtualRegister, Dest, true); break; From lattner at cs.uiuc.edu Mon Oct 28 13:48:01 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon Oct 28 13:48:01 2002 Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h Message-ID: <200210281947.NAA23238@apoc.cs.uiuc.edu> Changes in directory llvm/include/llvm/CodeGen: MachineInstr.h updated: 1.74 -> 1.75 --- Log message: Remove two arguments that are never specified --- Diffs of the changes: Index: llvm/include/llvm/CodeGen/MachineInstr.h diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.74 llvm/include/llvm/CodeGen/MachineInstr.h:1.75 --- llvm/include/llvm/CodeGen/MachineInstr.h:1.74 Sun Oct 27 22:50:01 2002 +++ llvm/include/llvm/CodeGen/MachineInstr.h Mon Oct 28 13:46:57 2002 @@ -54,7 +54,6 @@ // //--------------------------------------------------------------------------- - class MachineOperand { public: enum MachineOperandType { @@ -326,8 +325,7 @@ void SetMachineOperandConst(unsigned i, MachineOperand::MachineOperandType operandType, int64_t intValue); - void SetMachineOperandReg(unsigned i, int regNum, bool isDef=false, - bool isDefAndUse=false, bool isCCReg=false); + void SetMachineOperandReg(unsigned i, int regNum, bool isDef=false); unsigned substituteValue(const Value* oldVal, Value* newVal, bool defsOnly = true); From lattner at cs.uiuc.edu Mon Oct 28 13:48:02 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon Oct 28 13:48:02 2002 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/MachineInstr.cpp Message-ID: <200210281947.NAA23245@apoc.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen: MachineInstr.cpp updated: 1.50 -> 1.51 --- Log message: Remove two arguments that are never specified --- Diffs of the changes: Index: llvm/lib/CodeGen/MachineInstr.cpp diff -u llvm/lib/CodeGen/MachineInstr.cpp:1.50 llvm/lib/CodeGen/MachineInstr.cpp:1.51 --- llvm/lib/CodeGen/MachineInstr.cpp:1.50 Sun Oct 27 22:24:49 2002 +++ llvm/lib/CodeGen/MachineInstr.cpp Mon Oct 28 13:46:59 2002 @@ -82,22 +82,16 @@ void MachineInstr::SetMachineOperandReg(unsigned i, int regNum, - bool isdef, - bool isDefAndUse, - bool isCCReg) -{ + bool isdef) { assert(i < operands.size()); - operands[i].opType = - isCCReg? MachineOperand::MO_CCRegister : MachineOperand::MO_MachineRegister; + operands[i].opType = MachineOperand::MO_MachineRegister; operands[i].value = NULL; operands[i].regNum = regNum; operands[i].flags = 0; if (isdef || TargetInstrDescriptors[opCode].resultPos == (int) i) operands[i].markDef(); - if (isDefAndUse) - operands[i].markDefAndUse(); insertUsedReg(regNum); } From hldnbrnd at cs.uiuc.edu Mon Oct 28 13:55:01 2002 From: hldnbrnd at cs.uiuc.edu (Nicholas Hildenbrandt) Date: Mon Oct 28 13:55:01 2002 Subject: [llvm-commits] CVS: llvm/lib/CWriter/Writer.cpp Message-ID: <200210281954.NAA25023@niobe.cs.uiuc.edu> Changes in directory llvm/lib/CWriter: Writer.cpp updated: 1.67 -> 1.68 --- Log message: Casting NULL can cause problems so lets just not cast NULL to anything. --- Diffs of the changes: Index: llvm/lib/CWriter/Writer.cpp diff -u llvm/lib/CWriter/Writer.cpp:1.67 llvm/lib/CWriter/Writer.cpp:1.68 --- llvm/lib/CWriter/Writer.cpp:1.67 Mon Oct 28 13:05:12 2002 +++ llvm/lib/CWriter/Writer.cpp Mon Oct 28 13:54:06 2002 @@ -426,9 +426,7 @@ case Type::PointerTyID: if (isa(CPV)) { - Out << "(("; - printType(CPV->getType(), ""); - Out << ")NULL)"; + Out << "(NULL)"; break; } else if (ConstantPointerRef *CPR = dyn_cast(CPV)) { writeOperand(CPR->getValue()); From brukman at cs.uiuc.edu Mon Oct 28 13:59:00 2002 From: brukman at cs.uiuc.edu (Misha Brukman) Date: Mon Oct 28 13:59:00 2002 Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineFunction.h Message-ID: <200210281958.NAA25541@apoc.cs.uiuc.edu> Changes in directory llvm/include/llvm/CodeGen: MachineFunction.h updated: 1.15 -> 1.16 --- Log message: Iterator functions now line up together. --- Diffs of the changes: Index: llvm/include/llvm/CodeGen/MachineFunction.h diff -u llvm/include/llvm/CodeGen/MachineFunction.h:1.15 llvm/include/llvm/CodeGen/MachineFunction.h:1.16 --- llvm/include/llvm/CodeGen/MachineFunction.h:1.15 Sun Oct 27 23:58:42 2002 +++ llvm/include/llvm/CodeGen/MachineFunction.h Mon Oct 28 13:58:38 2002 @@ -98,8 +98,8 @@ bool empty() const { return BasicBlocks.empty(); } const MachineBasicBlock &front() const { return BasicBlocks.front(); } MachineBasicBlock &front() { return BasicBlocks.front(); } - const MachineBasicBlock &back() const { return BasicBlocks.back(); } - MachineBasicBlock &back() { return BasicBlocks.back(); } + const MachineBasicBlock & back() const { return BasicBlocks.back(); } + MachineBasicBlock & back() { return BasicBlocks.back(); } //===--------------------------------------------------------------------===// // From brukman at cs.uiuc.edu Mon Oct 28 14:01:01 2002 From: brukman at cs.uiuc.edu (Misha Brukman) Date: Mon Oct 28 14:01:01 2002 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/Mapping/MappingInfo.cpp Message-ID: <200210282000.OAA25591@apoc.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/Mapping: MappingInfo.cpp updated: 1.3 -> 1.4 --- Log message: Replaced uses of deprecated `MachineFunction::get(BasicBlock *BB)'. --- Diffs of the changes: Index: llvm/lib/CodeGen/Mapping/MappingInfo.cpp diff -u llvm/lib/CodeGen/Mapping/MappingInfo.cpp:1.3 llvm/lib/CodeGen/Mapping/MappingInfo.cpp:1.4 --- llvm/lib/CodeGen/Mapping/MappingInfo.cpp:1.3 Sun Oct 27 19:41:20 2002 +++ llvm/lib/CodeGen/Mapping/MappingInfo.cpp Mon Oct 28 14:00:25 2002 @@ -10,7 +10,7 @@ #include "llvm/Pass.h" #include "llvm/Module.h" #include "llvm/CodeGen/MachineInstr.h" -#include "llvm/CodeGen/MachineBasicBlock.h" +#include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineCodeForInstruction.h" #include using std::vector; @@ -109,7 +109,7 @@ } //Assign a number to each Function -bool getMappingInfoForFunction::doInitialization(Module &M){ +bool getMappingInfoForFunction::doInitialization(Module &M) { unsigned i = 0; for (Module::iterator FI = M.begin(), FE = M.end(); FI != FE; ++FI){ @@ -122,24 +122,25 @@ } //Assign a Number to each BB -void getMappingInfoForFunction::create_BB_to_MInumber_Key(Function &FI){ +void getMappingInfoForFunction::create_BB_to_MInumber_Key(Function &FI) { unsigned i = 0; - for (Function::iterator BI = FI.begin(), BE = FI.end(); - BI != BE; ++BI){ - MachineBasicBlock &miBB = MachineBasicBlock::get(BI); + MachineFunction &MF = MachineFunction::get(&FI); + for (MachineFunction::iterator BI = MF.begin(), BE = MF.end(); + BI != BE; ++BI) { + MachineBasicBlock &miBB = *BI; BBkey[miBB[0]] = i; i = i+(miBB.size()); } } //Assign a number to each MI wrt beginning of the BB -void getMappingInfoForFunction::create_MI_to_number_Key(Function &FI){ - for (Function::iterator BI=FI.begin(), BE=FI.end(); - BI != BE; ++BI){ - MachineBasicBlock &miBB = MachineBasicBlock::get(BI); +void getMappingInfoForFunction::create_MI_to_number_Key(Function &FI) { + MachineFunction &MF = MachineFunction::get(&FI); + for (MachineFunction::iterator BI=MF.begin(), BE=MF.end(); BI != BE; ++BI) { + MachineBasicBlock &miBB = *BI; unsigned j = 0; for(MachineBasicBlock::iterator miI=miBB.begin(), miE=miBB.end(); - miI!=miE; ++miI, ++j){ + miI!=miE; ++miI, ++j) { MIkey[*miI]=j; } } @@ -148,10 +149,11 @@ //BBtoMImap: contains F#, BB#, // MI#[wrt beginning of F], #MI in BB void getMappingInfoForFunction::writeBBToMImap(Function &FI){ - unsigned bb=0; - for (Function::iterator BI = FI.begin(), - BE = FI.end(); BI != BE; ++BI, ++bb){ - MachineBasicBlock &miBB = MachineBasicBlock::get(BI); + unsigned bb = 0; + MachineFunction &MF = MachineFunction::get(&FI); + for (MachineFunction::iterator BI = MF.begin(), BE = MF.end(); + BI != BE; ++BI, ++bb) { + MachineBasicBlock &miBB = *BI; writeNumber(bb); //Out << " BB: "<<(void *)BI<<"\n"; //for(int i=0; ibegin(), - IE = BI->end(); II != IE; ++II, ++li){ + IE = BI->end(); II != IE; ++II, ++li) { //Out << "I: "<<*II<<"\n"; MachineCodeForInstruction& miI = MachineCodeForInstruction::get(II); From brukman at cs.uiuc.edu Mon Oct 28 14:01:02 2002 From: brukman at cs.uiuc.edu (Misha Brukman) Date: Mon Oct 28 14:01:02 2002 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/PostOpts/PeepholeOpts.cpp Message-ID: <200210282000.OAA25598@apoc.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/PostOpts: PeepholeOpts.cpp updated: 1.3 -> 1.4 --- Log message: Replaced uses of deprecated `MachineFunction::get(BasicBlock *BB)'. --- Diffs of the changes: Index: llvm/lib/CodeGen/PostOpts/PeepholeOpts.cpp diff -u llvm/lib/CodeGen/PostOpts/PeepholeOpts.cpp:1.3 llvm/lib/CodeGen/PostOpts/PeepholeOpts.cpp:1.4 --- llvm/lib/CodeGen/PostOpts/PeepholeOpts.cpp:1.3 Sun Oct 27 19:41:22 2002 +++ llvm/lib/CodeGen/PostOpts/PeepholeOpts.cpp Mon Oct 28 14:00:31 2002 @@ -6,7 +6,7 @@ //===----------------------------------------------------------------------===// #include "llvm/CodeGen/PeepholeOpts.h" -#include "llvm/CodeGen/MachineBasicBlock.h" +#include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineInstr.h" #include "llvm/Target/TargetMachine.h" #include "llvm/Target/MachineInstrInfo.h" @@ -100,7 +100,16 @@ PeepholeOpts::runOnBasicBlock(BasicBlock &BB) { // Get the machine instructions for this BB - MachineBasicBlock& mvec = MachineBasicBlock::get(&BB); + // FIXME: MachineBasicBlock::get() is deprecated, hence inlining the function + const Function *F = BB.getParent(); + MachineFunction &MF = MachineFunction::get(F); + MachineBasicBlock *MBB = NULL; + for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) { + if (I->getBasicBlock() == &BB) + MBB = I; + } + assert(MBB && "MachineBasicBlock object not found for specified block!"); + MachineBasicBlock &mvec = *MBB; // Iterate over all machine instructions in the BB // Use a reverse iterator to allow deletion of MI or any instruction after it. From brukman at cs.uiuc.edu Mon Oct 28 14:01:03 2002 From: brukman at cs.uiuc.edu (Misha Brukman) Date: Mon Oct 28 14:01:03 2002 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/MachineFunction.cpp Message-ID: <200210282001.OAA25607@apoc.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen: MachineFunction.cpp updated: 1.25 -> 1.26 --- Log message: Replaced uses of deprecated `MachineFunction::get(BasicBlock *BB)'. --- Diffs of the changes: Index: llvm/lib/CodeGen/MachineFunction.cpp diff -u llvm/lib/CodeGen/MachineFunction.cpp:1.25 llvm/lib/CodeGen/MachineFunction.cpp:1.26 --- llvm/lib/CodeGen/MachineFunction.cpp:1.25 Mon Oct 28 00:01:57 2002 +++ llvm/lib/CodeGen/MachineFunction.cpp Mon Oct 28 14:00:19 2002 @@ -72,21 +72,6 @@ } -// get - This deprecated static method returns the MachineBasicBlock object -// for the specified BasicBlock. -// -MachineBasicBlock& MachineBasicBlock::get(const BasicBlock *BB) { - const Function *F = BB->getParent(); - MachineFunction &MF = MachineFunction::get(F); - - for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) - if (I->getBasicBlock() == BB) - return *I; - assert(0 && "MachineBasicBlock object not found for specified block!"); - return get(BB); -} - - //===---------------------------------------------------------------------===// // MachineFunction implementation //===---------------------------------------------------------------------===// From brukman at cs.uiuc.edu Mon Oct 28 14:02:01 2002 From: brukman at cs.uiuc.edu (Misha Brukman) Date: Mon Oct 28 14:02:01 2002 Subject: [llvm-commits] CVS: llvm/lib/Target/Sparc/EmitAssembly.cpp PrologEpilogCodeInserter.cpp Message-ID: <200210282001.OAA25622@apoc.cs.uiuc.edu> Changes in directory llvm/lib/Target/Sparc: EmitAssembly.cpp updated: 1.67 -> 1.68 PrologEpilogCodeInserter.cpp updated: 1.17 -> 1.18 --- Log message: Rewrote uses of deprecated `MachineFunction::get(BasicBlock *BB)'. --- Diffs of the changes: Index: llvm/lib/Target/Sparc/EmitAssembly.cpp diff -u llvm/lib/Target/Sparc/EmitAssembly.cpp:1.67 llvm/lib/Target/Sparc/EmitAssembly.cpp:1.68 --- llvm/lib/Target/Sparc/EmitAssembly.cpp:1.67 Sun Oct 27 22:45:29 2002 +++ llvm/lib/Target/Sparc/EmitAssembly.cpp Mon Oct 28 14:01:13 2002 @@ -294,7 +294,7 @@ void emitFunction(const Function &F); private : - void emitBasicBlock(const BasicBlock *BB); + void emitBasicBlock(const MachineBasicBlock &MBB); void emitMachineInst(const MachineInstr *MI); unsigned int printOperands(const MachineInstr *MI, unsigned int opNum); @@ -462,16 +462,13 @@ } void -SparcFunctionAsmPrinter::emitBasicBlock(const BasicBlock *BB) +SparcFunctionAsmPrinter::emitBasicBlock(const MachineBasicBlock &MBB) { // Emit a label for the basic block - toAsm << getID(BB) << ":\n"; - - // Get the vector of machine instructions corresponding to this bb. - const MachineBasicBlock &MIs = MachineBasicBlock::get(BB); + toAsm << getID(MBB.getBasicBlock()) << ":\n"; // Loop over all of the instructions in the basic block... - for (MachineBasicBlock::const_iterator MII = MIs.begin(), MIE = MIs.end(); + for (MachineBasicBlock::const_iterator MII = MBB.begin(), MIE = MBB.end(); MII != MIE; ++MII) emitMachineInst(*MII); toAsm << "\n"; // Seperate BB's with newlines @@ -489,8 +486,9 @@ toAsm << methName << ":\n"; // Output code for all of the basic blocks in the function... - for (Function::const_iterator I = F.begin(), E = F.end(); I != E; ++I) - emitBasicBlock(I); + MachineFunction &MF = MachineFunction::get(&F); + for (MachineFunction::const_iterator I = MF.begin(), E = MF.end(); I != E; ++I) + emitBasicBlock(*I); // Output a .size directive so the debugger knows the extents of the function toAsm << ".EndOf_" << methName << ":\n\t.size " Index: llvm/lib/Target/Sparc/PrologEpilogCodeInserter.cpp diff -u llvm/lib/Target/Sparc/PrologEpilogCodeInserter.cpp:1.17 llvm/lib/Target/Sparc/PrologEpilogCodeInserter.cpp:1.18 --- llvm/lib/Target/Sparc/PrologEpilogCodeInserter.cpp:1.17 Sun Oct 27 20:01:37 2002 +++ llvm/lib/Target/Sparc/PrologEpilogCodeInserter.cpp Mon Oct 28 14:01:13 2002 @@ -117,14 +117,17 @@ mvec.push_back(M); } - MachineBasicBlock& bbMvec = MachineBasicBlock::get(&F.getEntryNode()); + MachineBasicBlock& bbMvec = mcInfo.front(); bbMvec.insert(bbMvec.begin(), mvec.begin(), mvec.end()); } void InsertPrologEpilogCode::InsertEpilogCode(Function &F) { - for (Function::iterator I = F.begin(), E = F.end(); I != E; ++I) { - Instruction *TermInst = (Instruction*)I->getTerminator(); + MachineFunction &MF = MachineFunction::get(&F); + for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) { + MachineBasicBlock &MBB = *I; + BasicBlock &BB = *I->getBasicBlock(); + Instruction *TermInst = (Instruction*)BB.getTerminator(); if (TermInst->getOpcode() == Instruction::Ret) { MachineInstr *Restore = new MachineInstr(RESTORE); @@ -133,7 +136,6 @@ (int64_t)0); Restore->SetMachineOperandReg(2, Target.getRegInfo().getZeroRegNum()); - MachineBasicBlock& bbMvec = MachineBasicBlock::get(I); MachineCodeForInstruction &termMvec = MachineCodeForInstruction::get(TermInst); @@ -142,12 +144,12 @@ unsigned numNOPs = 0; while (termMvec.back()->getOpCode() == NOP) { - assert( termMvec.back() == bbMvec.back()); - delete bbMvec.pop_back(); + assert( termMvec.back() == MBB.back()); + delete MBB.pop_back(); termMvec.pop_back(); ++numNOPs; } - assert(termMvec.back() == bbMvec.back()); + assert(termMvec.back() == MBB.back()); // Check that we found the right number of NOPs and have the right // number of instructions to replace them. @@ -156,7 +158,7 @@ assert(ndelays == 1 && "Cannot use epilog code for delay slots?"); // Append the epilog code to the end of the basic block. - bbMvec.push_back(Restore); + MBB.push_back(Restore); } } } From brukman at cs.uiuc.edu Mon Oct 28 14:03:01 2002 From: brukman at cs.uiuc.edu (Misha Brukman) Date: Mon Oct 28 14:03:01 2002 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86RegisterInfo.def Message-ID: <200210282002.OAA25637@apoc.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: X86RegisterInfo.def updated: 1.1 -> 1.2 --- Log message: Fixed spelling and grammar. --- Diffs of the changes: Index: llvm/lib/Target/X86/X86RegisterInfo.def diff -u llvm/lib/Target/X86/X86RegisterInfo.def:1.1 llvm/lib/Target/X86/X86RegisterInfo.def:1.2 --- llvm/lib/Target/X86/X86RegisterInfo.def:1.1 Fri Oct 25 17:55:53 2002 +++ llvm/lib/Target/X86/X86RegisterInfo.def Mon Oct 28 14:01:52 2002 @@ -1,9 +1,9 @@ //===-- X86RegisterInfo.def - X86 Register Information ----------*- C++ -*-===// // -// This file describes all of the registers that the X86 backend uses. It relys +// This file describes all of the registers that the X86 backend uses. It relies // on an external 'R' macro being defined that takes the arguments specified -// below, and is used to make all of the information relevant to an registers be -// in one place. +// below, and is used to make all of the information relevant to registers be in +// one place. // //===----------------------------------------------------------------------===// From lattner at cs.uiuc.edu Mon Oct 28 14:12:01 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon Oct 28 14:12:01 2002 Subject: [llvm-commits] CVS: llvm/lib/Target/Sparc/SparcInstrSelection.cpp Message-ID: <200210282011.OAA25799@apoc.cs.uiuc.edu> Changes in directory llvm/lib/Target/Sparc: SparcInstrSelection.cpp updated: 1.78 -> 1.79 --- Log message: Fix minor bug --- Diffs of the changes: Index: llvm/lib/Target/Sparc/SparcInstrSelection.cpp diff -u llvm/lib/Target/Sparc/SparcInstrSelection.cpp:1.78 llvm/lib/Target/Sparc/SparcInstrSelection.cpp:1.79 --- llvm/lib/Target/Sparc/SparcInstrSelection.cpp:1.78 Sun Oct 27 22:45:29 2002 +++ llvm/lib/Target/Sparc/SparcInstrSelection.cpp Mon Oct 28 14:11:17 2002 @@ -1240,10 +1240,10 @@ MachineCodeForInstruction::get(returnInstr).addTemp(returnReg); M = new MachineInstr(JMPLRET); - M->SetMachineOperandReg(0, MachineOperand::MO_VirtualRegister, - returnReg); + M->SetMachineOperandVal(0, MachineOperand::MO_VirtualRegister, + returnReg); M->SetMachineOperandConst(1,MachineOperand::MO_SignExtendedImmed, - (int64_t)8); + (int64_t)8); M->SetMachineOperandReg(2, target.getRegInfo().getZeroRegNum()); if (returnInstr->getReturnValue() != NULL) From lattner at cs.uiuc.edu Mon Oct 28 14:12:02 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon Oct 28 14:12:02 2002 Subject: [llvm-commits] CVS: llvm/lib/Target/Sparc/SparcRegInfo.cpp Message-ID: <200210282011.OAA25805@apoc.cs.uiuc.edu> Changes in directory llvm/lib/Target/Sparc: SparcRegInfo.cpp updated: 1.79 -> 1.80 --- Log message: Don't pass default args --- Diffs of the changes: Index: llvm/lib/Target/Sparc/SparcRegInfo.cpp diff -u llvm/lib/Target/Sparc/SparcRegInfo.cpp:1.79 llvm/lib/Target/Sparc/SparcRegInfo.cpp:1.80 --- llvm/lib/Target/Sparc/SparcRegInfo.cpp:1.79 Mon Oct 28 13:46:25 2002 +++ llvm/lib/Target/Sparc/SparcRegInfo.cpp Mon Oct 28 14:10:56 2002 @@ -1298,30 +1298,29 @@ switch( RegType ) { case IntRegType: MI = new MachineInstr(ADD, 3); - MI->SetMachineOperandVal(0, MachineOperand:: MO_VirtualRegister, Src, false); + MI->SetMachineOperandVal(0, MachineOperand::MO_VirtualRegister, Src); MI->SetMachineOperandReg(1, getZeroRegNum()); - MI->SetMachineOperandVal(2, MachineOperand:: MO_VirtualRegister, Dest, true); + MI->SetMachineOperandVal(2, MachineOperand::MO_VirtualRegister, Dest, true); break; case FPSingleRegType: MI = new MachineInstr(FMOVS, 2); - MI->SetMachineOperandVal(0, MachineOperand:: MO_VirtualRegister, Src, false); - MI->SetMachineOperandVal(1, MachineOperand:: MO_VirtualRegister, Dest, true); + MI->SetMachineOperandVal(0, MachineOperand::MO_VirtualRegister, Src); + MI->SetMachineOperandVal(1, MachineOperand::MO_VirtualRegister, Dest, true); break; case FPDoubleRegType: MI = new MachineInstr(FMOVD, 2); - MI->SetMachineOperandVal(0, MachineOperand:: MO_VirtualRegister, Src, false); - MI->SetMachineOperandVal(1, MachineOperand:: MO_VirtualRegister, Dest, true); + MI->SetMachineOperandVal(0, MachineOperand::MO_VirtualRegister, Src); + MI->SetMachineOperandVal(1, MachineOperand::MO_VirtualRegister, Dest, true); break; default: assert(0 && "Unknow RegType in CpValu2Value"); } - if (MI) - mvec.push_back(MI); + mvec.push_back(MI); } From lattner at cs.uiuc.edu Mon Oct 28 14:49:03 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon Oct 28 14:49:03 2002 Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h Message-ID: <200210282048.OAA27960@apoc.cs.uiuc.edu> Changes in directory llvm/include/llvm/CodeGen: MachineInstr.h updated: 1.75 -> 1.76 --- Log message: * Make MachineOperand ctors private, so MachineOperand can only be created by MachineInstr. * Add a bunch of new methods to allow incremental addition of operands to the machine instr instance. --- Diffs of the changes: Index: llvm/include/llvm/CodeGen/MachineInstr.h diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.75 llvm/include/llvm/CodeGen/MachineInstr.h:1.76 --- llvm/include/llvm/CodeGen/MachineInstr.h:1.75 Mon Oct 28 13:46:57 2002 +++ llvm/include/llvm/CodeGen/MachineInstr.h Mon Oct 28 14:48:33 2002 @@ -88,9 +88,20 @@ char flags; // see bit field definitions above int regNum; // register number for an explicit register // will be set for a value after reg allocation +private: + MachineOperand() + : immedVal(0), opType(MO_VirtualRegister), flags(0), regNum(-1) {} + MachineOperand(int64_t ImmVal, MachineOperandType OpTy) + : immedVal(ImmVal), opType(OpTy), flags(0), regNum(-1) {} + MachineOperand(int Reg, MachineOperandType OpTy, bool isDef = false) + : immedVal(0), opType(OpTy), flags(isDef ? DEFFLAG : 0), regNum(Reg) {} + MachineOperand(Value *V, MachineOperandType OpTy, + bool isDef = false, bool isDNU = false) + : value(V), opType(OpTy), regNum(-1) { + flags = (isDef ? DEFFLAG : 0) | (isDNU ? DEFUSEFLAG : 0); + } + public: - MachineOperand() : immedVal(0), opType(MO_VirtualRegister), - flags(0), regNum(-1) {} MachineOperand(const MachineOperand &M) : immedVal(M.immedVal), opType(M.opType), flags(M.flags), regNum(M.regNum) { } @@ -210,21 +221,26 @@ // regsUsed - all machine registers used for this instruction, including regs // used to save values across the instruction. This is a bitset of registers. std::vector regsUsed; + + // OperandComplete - Return true if it's illegal to add a new operand + bool OperandsComplete() const; public: - /*ctor*/ MachineInstr (MachineOpCode _opCode, - OpCodeMask _opCodeMask = 0); - /*ctor*/ MachineInstr (MachineOpCode _opCode, - unsigned numOperands, - OpCodeMask _opCodeMask = 0); - inline ~MachineInstr () {} + MachineInstr(MachineOpCode Opcode, OpCodeMask OpcodeMask = 0); + MachineInstr(MachineOpCode Opcode, unsigned numOperands, OpCodeMask Mask = 0); + + /// MachineInstr ctor - This constructor only does a _reserve_ of the + /// operands, not a resize for them. It is expected that if you use this that + /// you call add* methods below to fill up the operands, instead of the Set + /// methods. + /// + MachineInstr(MachineOpCode Opcode, unsigned numOperands, bool XX, bool YY); // // Support to rewrite a machine instruction in place: for now, simply // replace() and then set new operands with Set.*Operand methods below. // - void replace (MachineOpCode _opCode, - unsigned numOperands, - OpCodeMask _opCodeMask = 0x0); + void replace(MachineOpCode Opcode, unsigned numOperands, + OpCodeMask Mask = 0x0); // // The opcode. @@ -326,6 +342,67 @@ MachineOperand::MachineOperandType operandType, int64_t intValue); void SetMachineOperandReg(unsigned i, int regNum, bool isDef=false); + + //===--------------------------------------------------------------------===// + // Accessors to add operands when building up machine instructions + // + + /// addRegOperand - Add a MO_VirtualRegister operand to the end of the + /// operands list... + /// + void addRegOperand(Value *V, bool isDef=false, bool isDefAndUse=false) { + assert(!OperandsComplete() && + "Trying to add an operand to a machine instr that is already done!"); + operands.push_back(MachineOperand(V, MachineOperand::MO_VirtualRegister, + isDef, isDefAndUse)); + } + + /// addRegOperand - Add a symbolic virtual register reference... + /// + void addRegOperand(int reg) { + assert(!OperandsComplete() && + "Trying to add an operand to a machine instr that is already done!"); + operands.push_back(MachineOperand(reg, MachineOperand::MO_VirtualRegister)); + } + + /// addPCDispOperand - Add a PC relative displacement operand to the MI + /// + void addPCDispOperand(Value *V) { + assert(!OperandsComplete() && + "Trying to add an operand to a machine instr that is already done!"); + operands.push_back(MachineOperand(V, MachineOperand::MO_PCRelativeDisp)); + } + + /// addMachineRegOperand - Add a virtual register operand to this MachineInstr + /// + void addMachineRegOperand(int reg, bool isDef=false) { + assert(!OperandsComplete() && + "Trying to add an operand to a machine instr that is already done!"); + operands.push_back(MachineOperand(reg, MachineOperand::MO_MachineRegister, + isDef)); + insertUsedReg(reg); + } + + /// addZeroExtImmOperand - Add a zero extended constant argument to the + /// machine instruction. + /// + void addZeroExtImmOperand(int64_t intValue) { + assert(!OperandsComplete() && + "Trying to add an operand to a machine instr that is already done!"); + operands.push_back(MachineOperand(intValue, + MachineOperand::MO_UnextendedImmed)); + } + + /// addSignExtImmOperand - Add a zero extended constant argument to the + /// machine instruction. + /// + void addSignExtImmOperand(int64_t intValue) { + assert(!OperandsComplete() && + "Trying to add an operand to a machine instr that is already done!"); + operands.push_back(MachineOperand(intValue, + MachineOperand::MO_SignExtendedImmed)); + } + unsigned substituteValue(const Value* oldVal, Value* newVal, bool defsOnly = true); From lattner at cs.uiuc.edu Mon Oct 28 14:49:04 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon Oct 28 14:49:04 2002 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/MachineInstr.cpp Message-ID: <200210282048.OAA28080@apoc.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen: MachineInstr.cpp updated: 1.51 -> 1.52 --- Log message: * Make MachineOperand ctors private, so MachineOperand can only be created by MachineInstr. * Add a bunch of new methods to allow incremental addition of operands to the machine instr instance. --- Diffs of the changes: Index: llvm/lib/CodeGen/MachineInstr.cpp diff -u llvm/lib/CodeGen/MachineInstr.cpp:1.51 llvm/lib/CodeGen/MachineInstr.cpp:1.52 --- llvm/lib/CodeGen/MachineInstr.cpp:1.51 Mon Oct 28 13:46:59 2002 +++ llvm/lib/CodeGen/MachineInstr.cpp Mon Oct 28 14:48:39 2002 @@ -11,41 +11,42 @@ // Constructor for instructions with fixed #operands (nearly all) MachineInstr::MachineInstr(MachineOpCode _opCode, OpCodeMask _opCodeMask) - : opCode(_opCode), - opCodeMask(_opCodeMask), - operands(TargetInstrDescriptors[_opCode].numOperands) -{ + : opCode(_opCode), opCodeMask(_opCodeMask), + operands(TargetInstrDescriptors[_opCode].numOperands, MachineOperand()) { assert(TargetInstrDescriptors[_opCode].numOperands >= 0); } // Constructor for instructions with variable #operands -MachineInstr::MachineInstr(MachineOpCode _opCode, - unsigned numOperands, - OpCodeMask _opCodeMask) - : opCode(_opCode), - opCodeMask(_opCodeMask), - operands(numOperands) -{ +MachineInstr::MachineInstr(MachineOpCode OpCode, unsigned numOperands, + OpCodeMask OpCodeMask) + : opCode(OpCode), opCodeMask(OpCodeMask), + operands(numOperands, MachineOperand()) { } +// OperandComplete - Return true if it's illegal to add a new operand +bool MachineInstr::OperandsComplete() const { + int NumOperands = TargetInstrDescriptors[opCode].numOperands; + if (NumOperands >= 0 && operands.size() >= (unsigned)NumOperands) + return true; // Broken! + return false; +} + + // // Support for replacing opcode and operands of a MachineInstr in place. // This only resets the size of the operand vector and initializes it. // The new operands must be set explicitly later. // -void -MachineInstr::replace(MachineOpCode _opCode, - unsigned numOperands, - OpCodeMask _opCodeMask) -{ - opCode = _opCode; - opCodeMask = _opCodeMask; +void MachineInstr::replace(MachineOpCode Opcode, unsigned numOperands, + OpCodeMask Mask) { + opCode = Opcode; + opCodeMask = Mask; operands.clear(); - operands.resize(numOperands); + operands.resize(numOperands, MachineOperand()); } void -MachineInstr::SetMachineOperandVal(unsigned int i, +MachineInstr::SetMachineOperandVal(unsigned i, MachineOperand::MachineOperandType opType, Value* V, bool isdef, From lattner at cs.uiuc.edu Mon Oct 28 15:01:01 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon Oct 28 15:01:01 2002 Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h Message-ID: <200210282100.PAA29868@apoc.cs.uiuc.edu> Changes in directory llvm/include/llvm/CodeGen: MachineInstr.h updated: 1.76 -> 1.77 --- Log message: Remove default operands that are never used --- Diffs of the changes: Index: llvm/include/llvm/CodeGen/MachineInstr.h diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.76 llvm/include/llvm/CodeGen/MachineInstr.h:1.77 --- llvm/include/llvm/CodeGen/MachineInstr.h:1.76 Mon Oct 28 14:48:33 2002 +++ llvm/include/llvm/CodeGen/MachineInstr.h Mon Oct 28 14:59:47 2002 @@ -225,8 +225,8 @@ // OperandComplete - Return true if it's illegal to add a new operand bool OperandsComplete() const; public: - MachineInstr(MachineOpCode Opcode, OpCodeMask OpcodeMask = 0); - MachineInstr(MachineOpCode Opcode, unsigned numOperands, OpCodeMask Mask = 0); + MachineInstr(MachineOpCode Opcode); + MachineInstr(MachineOpCode Opcode, unsigned numOperands); /// MachineInstr ctor - This constructor only does a _reserve_ of the /// operands, not a resize for them. It is expected that if you use this that From lattner at cs.uiuc.edu Mon Oct 28 15:01:03 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon Oct 28 15:01:03 2002 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/MachineInstr.cpp Message-ID: <200210282100.PAA29873@apoc.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen: MachineInstr.cpp updated: 1.52 -> 1.53 --- Log message: Remove default operands that are never used --- Diffs of the changes: Index: llvm/lib/CodeGen/MachineInstr.cpp diff -u llvm/lib/CodeGen/MachineInstr.cpp:1.52 llvm/lib/CodeGen/MachineInstr.cpp:1.53 --- llvm/lib/CodeGen/MachineInstr.cpp:1.52 Mon Oct 28 14:48:39 2002 +++ llvm/lib/CodeGen/MachineInstr.cpp Mon Oct 28 14:59:49 2002 @@ -9,18 +9,22 @@ // Constructor for instructions with fixed #operands (nearly all) -MachineInstr::MachineInstr(MachineOpCode _opCode, - OpCodeMask _opCodeMask) - : opCode(_opCode), opCodeMask(_opCodeMask), +MachineInstr::MachineInstr(MachineOpCode _opCode) + : opCode(_opCode), opCodeMask(0), operands(TargetInstrDescriptors[_opCode].numOperands, MachineOperand()) { assert(TargetInstrDescriptors[_opCode].numOperands >= 0); } // Constructor for instructions with variable #operands -MachineInstr::MachineInstr(MachineOpCode OpCode, unsigned numOperands, - OpCodeMask OpCodeMask) - : opCode(OpCode), opCodeMask(OpCodeMask), +MachineInstr::MachineInstr(MachineOpCode OpCode, unsigned numOperands/*, + OpCodeMask OpCodeMask*/) + : opCode(OpCode), opCodeMask(0/*OpCodeMask*/), operands(numOperands, MachineOperand()) { +} + +MachineInstr::MachineInstr(MachineOpCode Opcode, unsigned numOperands, + bool XX, bool YY) : opCode(Opcode), opCodeMask(0) { + operands.reserve(numOperands); } // OperandComplete - Return true if it's illegal to add a new operand From lattner at cs.uiuc.edu Mon Oct 28 15:03:00 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon Oct 28 15:03:00 2002 Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h Message-ID: <200210282102.PAA30377@apoc.cs.uiuc.edu> Changes in directory llvm/include/llvm/CodeGen: MachineInstr.h updated: 1.77 -> 1.78 --- Log message: Remove more default arguments that are never used --- Diffs of the changes: Index: llvm/include/llvm/CodeGen/MachineInstr.h diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.77 llvm/include/llvm/CodeGen/MachineInstr.h:1.78 --- llvm/include/llvm/CodeGen/MachineInstr.h:1.77 Mon Oct 28 14:59:47 2002 +++ llvm/include/llvm/CodeGen/MachineInstr.h Mon Oct 28 15:02:38 2002 @@ -239,8 +239,7 @@ // Support to rewrite a machine instruction in place: for now, simply // replace() and then set new operands with Set.*Operand methods below. // - void replace(MachineOpCode Opcode, unsigned numOperands, - OpCodeMask Mask = 0x0); + void replace(MachineOpCode Opcode, unsigned numOperands); // // The opcode. From lattner at cs.uiuc.edu Mon Oct 28 15:03:02 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon Oct 28 15:03:02 2002 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/MachineInstr.cpp Message-ID: <200210282102.PAA30384@apoc.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen: MachineInstr.cpp updated: 1.53 -> 1.54 --- Log message: Remove more default arguments that are never used --- Diffs of the changes: Index: llvm/lib/CodeGen/MachineInstr.cpp diff -u llvm/lib/CodeGen/MachineInstr.cpp:1.53 llvm/lib/CodeGen/MachineInstr.cpp:1.54 --- llvm/lib/CodeGen/MachineInstr.cpp:1.53 Mon Oct 28 14:59:49 2002 +++ llvm/lib/CodeGen/MachineInstr.cpp Mon Oct 28 15:02:40 2002 @@ -16,10 +16,8 @@ } // Constructor for instructions with variable #operands -MachineInstr::MachineInstr(MachineOpCode OpCode, unsigned numOperands/*, - OpCodeMask OpCodeMask*/) - : opCode(OpCode), opCodeMask(0/*OpCodeMask*/), - operands(numOperands, MachineOperand()) { +MachineInstr::MachineInstr(MachineOpCode OpCode, unsigned numOperands) + : opCode(OpCode), opCodeMask(0), operands(numOperands, MachineOperand()) { } MachineInstr::MachineInstr(MachineOpCode Opcode, unsigned numOperands, @@ -41,10 +39,9 @@ // This only resets the size of the operand vector and initializes it. // The new operands must be set explicitly later. // -void MachineInstr::replace(MachineOpCode Opcode, unsigned numOperands, - OpCodeMask Mask) { +void MachineInstr::replace(MachineOpCode Opcode, unsigned numOperands) { opCode = Opcode; - opCodeMask = Mask; + opCodeMask = 0; operands.clear(); operands.resize(numOperands, MachineOperand()); } From lattner at cs.uiuc.edu Mon Oct 28 15:18:00 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon Oct 28 15:18:00 2002 Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h Message-ID: <200210282117.PAA32186@apoc.cs.uiuc.edu> Changes in directory llvm/include/llvm/CodeGen: MachineInstr.h updated: 1.78 -> 1.79 --- Log message: Remove all traces of the "Opcode Mask" field in the MachineInstr class --- Diffs of the changes: Index: llvm/include/llvm/CodeGen/MachineInstr.h diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.78 llvm/include/llvm/CodeGen/MachineInstr.h:1.79 --- llvm/include/llvm/CodeGen/MachineInstr.h:1.78 Mon Oct 28 15:02:38 2002 +++ llvm/include/llvm/CodeGen/MachineInstr.h Mon Oct 28 15:17:14 2002 @@ -17,7 +17,6 @@ class Function; typedef int MachineOpCode; -typedef int OpCodeMask; //--------------------------------------------------------------------------- // class MachineOperand @@ -185,13 +184,6 @@ // MachineOpCode must be an enum, defined separately for each target. // E.g., It is defined in SparcInstructionSelection.h for the SPARC. // -// opCodeMask is used to record variants of an instruction. -// E.g., each branch instruction on SPARC has 2 flags (i.e., 4 variants): -// ANNUL: if 1: Annul delay slot instruction. -// PREDICT-NOT-TAKEN: if 1: predict branch not taken. -// Instead of creating 4 different opcodes for BNZ, we create a single -// opcode and set bits in opCodeMask for each of these flags. -// // There are 2 kinds of operands: // // (1) Explicit operands of the machine instruction in vector operands[] @@ -204,7 +196,6 @@ class MachineInstr : public Annotable, // MachineInstrs are annotable public NonCopyable { // Disable copy operations MachineOpCode opCode; // the opcode - OpCodeMask opCodeMask; // extra bits for variants of an opcode std::vector operands; // the operands struct ImplicitRef { From lattner at cs.uiuc.edu Mon Oct 28 15:18:02 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon Oct 28 15:18:02 2002 Subject: [llvm-commits] CVS: llvm/include/llvm/Target/MachineInstrInfo.h Message-ID: <200210282117.PAA32193@apoc.cs.uiuc.edu> Changes in directory llvm/include/llvm/Target: MachineInstrInfo.h updated: 1.26 -> 1.27 --- Log message: Remove all traces of the "Opcode Mask" field in the MachineInstr class --- Diffs of the changes: Index: llvm/include/llvm/Target/MachineInstrInfo.h diff -u llvm/include/llvm/Target/MachineInstrInfo.h:1.26 llvm/include/llvm/Target/MachineInstrInfo.h:1.27 --- llvm/include/llvm/Target/MachineInstrInfo.h:1.26 Sun Oct 27 22:55:56 2002 +++ llvm/include/llvm/Target/MachineInstrInfo.h Mon Oct 28 15:17:16 2002 @@ -25,7 +25,6 @@ //--------------------------------------------------------------------------- typedef int MachineOpCode; -typedef int OpCodeMask; typedef unsigned InstrSchedClass; const MachineOpCode INVALID_MACHINE_OPCODE = -1; From lattner at cs.uiuc.edu Mon Oct 28 15:18:04 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon Oct 28 15:18:04 2002 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/MachineInstr.cpp Message-ID: <200210282117.PAA32201@apoc.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen: MachineInstr.cpp updated: 1.54 -> 1.55 --- Log message: Remove all traces of the "Opcode Mask" field in the MachineInstr class --- Diffs of the changes: Index: llvm/lib/CodeGen/MachineInstr.cpp diff -u llvm/lib/CodeGen/MachineInstr.cpp:1.54 llvm/lib/CodeGen/MachineInstr.cpp:1.55 --- llvm/lib/CodeGen/MachineInstr.cpp:1.54 Mon Oct 28 15:02:40 2002 +++ llvm/lib/CodeGen/MachineInstr.cpp Mon Oct 28 15:17:19 2002 @@ -10,18 +10,18 @@ // Constructor for instructions with fixed #operands (nearly all) MachineInstr::MachineInstr(MachineOpCode _opCode) - : opCode(_opCode), opCodeMask(0), + : opCode(_opCode), operands(TargetInstrDescriptors[_opCode].numOperands, MachineOperand()) { assert(TargetInstrDescriptors[_opCode].numOperands >= 0); } // Constructor for instructions with variable #operands MachineInstr::MachineInstr(MachineOpCode OpCode, unsigned numOperands) - : opCode(OpCode), opCodeMask(0), operands(numOperands, MachineOperand()) { + : opCode(OpCode), operands(numOperands, MachineOperand()) { } MachineInstr::MachineInstr(MachineOpCode Opcode, unsigned numOperands, - bool XX, bool YY) : opCode(Opcode), opCodeMask(0) { + bool XX, bool YY) : opCode(Opcode) { operands.reserve(numOperands); } @@ -41,7 +41,6 @@ // void MachineInstr::replace(MachineOpCode Opcode, unsigned numOperands) { opCode = Opcode; - opCodeMask = 0; operands.clear(); operands.resize(numOperands, MachineOperand()); } From lattner at cs.uiuc.edu Mon Oct 28 15:18:05 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon Oct 28 15:18:05 2002 Subject: [llvm-commits] CVS: llvm/lib/Target/Sparc/SparcInstr.def SparcInternals.h Message-ID: <200210282117.PAA32210@apoc.cs.uiuc.edu> Changes in directory llvm/lib/Target/Sparc: SparcInstr.def updated: 1.13 -> 1.14 SparcInternals.h updated: 1.69 -> 1.70 --- Log message: Remove all traces of the "Opcode Mask" field in the MachineInstr class --- Diffs of the changes: Index: llvm/lib/Target/Sparc/SparcInstr.def diff -u llvm/lib/Target/Sparc/SparcInstr.def:1.13 llvm/lib/Target/Sparc/SparcInstr.def:1.14 --- llvm/lib/Target/Sparc/SparcInstr.def:1.13 Thu Oct 24 20:43:26 2002 +++ llvm/lib/Target/Sparc/SparcInstr.def Mon Oct 28 15:17:20 2002 @@ -52,14 +52,12 @@ I(SETHI, "sethi", 2, 1, B22, false, 0, 1, SPARC_IEUN, M_INT_FLAG | M_LOGICAL_FLAG | M_ARITH_FLAG) // Add or add with carry. -// Immed bit specifies if second operand is immediate(1) or register(0) I(ADD , "add", 3, 2, B12, true , 0, 1, SPARC_IEUN, M_INT_FLAG | M_ARITH_FLAG) I(ADDcc , "addcc", 4, 2, B12, true , 0, 1, SPARC_IEU1, M_INT_FLAG | M_ARITH_FLAG | M_CC_FLAG ) I(ADDC , "addc", 3, 2, B12, true , 0, 1, SPARC_IEUN, M_INT_FLAG | M_ARITH_FLAG) I(ADDCcc, "addccc", 4, 2, B12, true , 0, 1, SPARC_IEU1, M_INT_FLAG | M_ARITH_FLAG | M_CC_FLAG ) // Subtract or subtract with carry. -// Immed bit specifies if second operand is immediate(1) or register(0) I(SUB , "sub", 3, 2, B12, true , 0, 1, SPARC_IEUN, M_INT_FLAG | M_ARITH_FLAG) I(SUBcc , "subcc", 4, 2, B12, true , 0, 1, SPARC_IEU1, M_INT_FLAG | M_ARITH_FLAG | M_CC_FLAG ) I(SUBC , "subc", 3, 2, B12, true , 0, 1, SPARC_IEUN, M_INT_FLAG | M_ARITH_FLAG) @@ -157,8 +155,6 @@ I(FITOQ, "fitoq", 2, 1, 0, false, 0, 0, SPARC_FPA, M_FLOAT_FLAG | M_INT_FLAG | M_ARITH_FLAG) // Branch on integer comparison with zero. -// Annul bit specifies if intruction in delay slot is annulled(1) or not(0). -// PredictTaken bit hints if branch should be predicted taken(1) or not(0). // Latency excludes the delay slot since it can be issued in same cycle. I(BRZ , "brz", 2, -1, B15, true , 1, 1, SPARC_CTI, M_INT_FLAG | M_BRANCH_FLAG) I(BRLEZ, "brlez", 2, -1, B15, true , 1, 1, SPARC_CTI, M_INT_FLAG | M_BRANCH_FLAG) @@ -170,8 +166,6 @@ // Branch on integer condition code. // The first argument specifies the ICC register: %icc or %xcc // Latency includes the delay slot. -// Annul bit specifies if intruction in delay slot is annulled(1) or not(0). -// PredictTaken bit hints if branch should be predicted taken(1) or not(0). I(BA , "ba", 1, -1, B21, true , 1, 2, SPARC_CTI, M_CC_FLAG | M_BRANCH_FLAG) I(BN , "bn", 2, -1, B21, true , 1, 2, SPARC_CTI, M_CC_FLAG | M_BRANCH_FLAG) I(BNE , "bne", 2, -1, B21, true , 1, 2, SPARC_CTI, M_CC_FLAG | M_BRANCH_FLAG) @@ -190,8 +184,6 @@ I(BVS , "bvs", 2, -1, B21, true , 1, 2, SPARC_CTI, M_CC_FLAG | M_BRANCH_FLAG) // Branch on floating point condition code. -// Annul bit specifies if intruction in delay slot is annulled(1) or not(0). -// PredictTaken bit hints if branch should be predicted taken(1) or not(0). // The first argument is the FCCn register (0 <= n <= 3). // Latency includes the delay slot. I(FBA , "fba", 2, -1, B18, true , 1, 2, SPARC_CTI, M_CC_FLAG | M_BRANCH_FLAG) Index: llvm/lib/Target/Sparc/SparcInternals.h diff -u llvm/lib/Target/Sparc/SparcInternals.h:1.69 llvm/lib/Target/Sparc/SparcInternals.h:1.70 --- llvm/lib/Target/Sparc/SparcInternals.h:1.69 Sun Oct 27 19:03:43 2002 +++ llvm/lib/Target/Sparc/SparcInternals.h Mon Oct 28 15:17:20 2002 @@ -22,13 +22,6 @@ class PhyRegAlloc; class Pass; -// OpCodeMask definitions for the Sparc V9 -// -const OpCodeMask Immed = 0x00002000; // immed or reg operand? -const OpCodeMask Annul = 0x20000000; // annul delay instr? -const OpCodeMask PredictTaken = 0x00080000; // predict branch taken? - - enum SparcInstrSchedClass { SPARC_NONE, /* Instructions with no scheduling restrictions */ SPARC_IEUN, /* Integer class that can use IEU0 or IEU1 */ From lattner at cs.uiuc.edu Mon Oct 28 15:32:01 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon Oct 28 15:32:01 2002 Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstrBuilder.h Message-ID: <200210282131.PAA32373@apoc.cs.uiuc.edu> Changes in directory llvm/include/llvm/CodeGen: MachineInstrBuilder.h added (r1.1) --- Log message: Initial checkin of MachineInstrBuilder class --- Diffs of the changes: From lattner at cs.uiuc.edu Mon Oct 28 15:45:01 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon Oct 28 15:45:01 2002 Subject: [llvm-commits] CVS: llvm/lib/Target/Sparc/PrologEpilogCodeInserter.cpp Message-ID: <200210282144.PAA32696@apoc.cs.uiuc.edu> Changes in directory llvm/lib/Target/Sparc: PrologEpilogCodeInserter.cpp updated: 1.18 -> 1.19 --- Log message: Use BuildMI instead of explicit code. --- Diffs of the changes: Index: llvm/lib/Target/Sparc/PrologEpilogCodeInserter.cpp diff -u llvm/lib/Target/Sparc/PrologEpilogCodeInserter.cpp:1.18 llvm/lib/Target/Sparc/PrologEpilogCodeInserter.cpp:1.19 --- llvm/lib/Target/Sparc/PrologEpilogCodeInserter.cpp:1.18 Mon Oct 28 14:01:13 2002 +++ llvm/lib/Target/Sparc/PrologEpilogCodeInserter.cpp Mon Oct 28 15:43:57 2002 @@ -13,7 +13,7 @@ #include "SparcRegClassInfo.h" #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineCodeForInstruction.h" -#include "llvm/CodeGen/MachineInstr.h" +#include "llvm/CodeGen/MachineInstrBuilder.h" #include "llvm/CodeGen/InstrSelectionSupport.h" #include "llvm/Pass.h" #include "llvm/Function.h" @@ -60,7 +60,7 @@ // See the comments below for the choice of this register. // MachineFunction& mcInfo = MachineFunction::get(&F); - unsigned int staticStackSize = mcInfo.getStaticStackSize(); + unsigned staticStackSize = mcInfo.getStaticStackSize(); if (staticStackSize < (unsigned) frameInfo.getMinStackFrameSize()) staticStackSize = (unsigned) frameInfo.getMinStackFrameSize(); @@ -69,51 +69,34 @@ (unsigned) frameInfo.getStackFrameSizeAlignment())) staticStackSize += frameInfo.getStackFrameSizeAlignment() - padsz; - if (Target.getInstrInfo().constantFitsInImmedField(SAVE, staticStackSize)) - { - M = new MachineInstr(SAVE); - M->SetMachineOperandReg(0, Target.getRegInfo().getStackPointer()); - M->SetMachineOperandConst(1, MachineOperand::MO_SignExtendedImmed, - - (int) staticStackSize); - M->SetMachineOperandReg(2, Target.getRegInfo().getStackPointer()); - mvec.push_back(M); - } - else - { + int32_t C = - (int) staticStackSize; + int SP = Target.getRegInfo().getStackPointer(); + if (Target.getInstrInfo().constantFitsInImmedField(SAVE, staticStackSize)) { + M = BuildMI(SAVE, 3).addMReg(SP).addSImm(C).addMReg(SP); + mvec.push_back(M); + } else { // We have to put the stack size value into a register before SAVE. // Use register %g1 since it is volatile across calls. Note that the // local (%l) and in (%i) registers cannot be used before the SAVE! // Do this by creating a code sequence equivalent to: // SETSW -(stackSize), %g1 - int32_t C = - (int) staticStackSize; int uregNum = Target.getRegInfo().getUnifiedRegNum( Target.getRegInfo().getRegClassIDOfType(Type::IntTy), SparcIntRegClass::g1); - M = new MachineInstr(SETHI); - M->SetMachineOperandConst(0, MachineOperand::MO_SignExtendedImmed, C); - M->SetMachineOperandReg(1, uregNum); + M = BuildMI(SETHI, 2).addSImm(C).addMReg(uregNum); M->setOperandHi32(0); mvec.push_back(M); - M = new MachineInstr(OR); - M->SetMachineOperandReg(0, uregNum); - M->SetMachineOperandConst(1, MachineOperand::MO_SignExtendedImmed, C); - M->SetMachineOperandReg(2, uregNum); + M = BuildMI(OR, 3).addMReg(uregNum).addSImm(C).addMReg(uregNum); M->setOperandLo32(1); mvec.push_back(M); - M = new MachineInstr(SRA); - M->SetMachineOperandReg(0, uregNum); - M->SetMachineOperandConst(1, MachineOperand::MO_UnextendedImmed, 0); - M->SetMachineOperandReg(2, uregNum); + M = BuildMI(SRA, 3).addMReg(uregNum).addZImm(0).addMReg(uregNum); mvec.push_back(M); // Now generate the SAVE using the value in register %g1 - M = new MachineInstr(SAVE); - M->SetMachineOperandReg(0, Target.getRegInfo().getStackPointer()); - M->SetMachineOperandReg(1, uregNum); - M->SetMachineOperandReg(2, Target.getRegInfo().getStackPointer()); + M = BuildMI(SAVE, 3).addMReg(SP).addMReg(uregNum).addMReg(SP); mvec.push_back(M); } @@ -130,11 +113,9 @@ Instruction *TermInst = (Instruction*)BB.getTerminator(); if (TermInst->getOpcode() == Instruction::Ret) { - MachineInstr *Restore = new MachineInstr(RESTORE); - Restore->SetMachineOperandReg(0, Target.getRegInfo().getZeroRegNum()); - Restore->SetMachineOperandConst(1, MachineOperand::MO_SignExtendedImmed, - (int64_t)0); - Restore->SetMachineOperandReg(2, Target.getRegInfo().getZeroRegNum()); + int ZR = Target.getRegInfo().getZeroRegNum(); + MachineInstr *Restore = + BuildMI(RESTORE, 3).addMReg(ZR).addSImm(0).addMReg(ZR); MachineCodeForInstruction &termMvec = MachineCodeForInstruction::get(TermInst); From lattner at cs.uiuc.edu Mon Oct 28 15:45:03 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon Oct 28 15:45:03 2002 Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstrBuilder.h Message-ID: <200210282144.PAA32701@apoc.cs.uiuc.edu> Changes in directory llvm/include/llvm/CodeGen: MachineInstrBuilder.h updated: 1.1 -> 1.2 --- Log message: Minor comment updates --- Diffs of the changes: Index: llvm/include/llvm/CodeGen/MachineInstrBuilder.h diff -u llvm/include/llvm/CodeGen/MachineInstrBuilder.h:1.1 llvm/include/llvm/CodeGen/MachineInstrBuilder.h:1.2 --- llvm/include/llvm/CodeGen/MachineInstrBuilder.h:1.1 Mon Oct 28 15:31:48 2002 +++ llvm/include/llvm/CodeGen/MachineInstrBuilder.h Mon Oct 28 15:43:42 2002 @@ -9,7 +9,7 @@ // // we can now use code like this: // -// M = BuildMI(X86::ADDrr8).addReg(argVal1).addReg(argVal2); +// M = BuildMI(X86::ADDrr8, 2).addReg(argVal1).addReg(argVal2); // //===----------------------------------------------------------------------===// @@ -27,23 +27,30 @@ /// operator MachineInstr*() const { return MI; } - /// addReg - Add a new register operand... + /// addReg - Add a new virtual register operand... /// MachineInstrBuilder &addReg(int RegNo) { MI->addRegOperand(RegNo); return *this; } + /// addReg - Add an LLVM value that is to be used as a register...x + /// MachineInstrBuilder &addReg(Value *V, bool isDef = false, bool isDNU = false){ MI->addRegOperand(V, isDef, isDNU); return *this; } + /// addPCDisp - Add an LLVM value to be treated as a PC relative + /// displacement... + /// MachineInstrBuilder &addPCDisp(Value *V) { MI->addPCDispOperand(V); return *this; } + /// addMReg - Add a machine register operand... + /// MachineInstrBuilder &addMReg(int Reg, bool isDef=false) { MI->addMachineRegOperand(Reg, isDef); return *this; From lattner at cs.uiuc.edu Mon Oct 28 17:31:13 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon Oct 28 17:31:13 2002 Subject: [llvm-commits] CVS: llvm/www/www-index.html Message-ID: <200210282330.RAA14386@tank.cs.uiuc.edu> Changes in directory llvm/www: www-index.html updated: 1.7 -> 1.8 --- Log message: Add links to new llvmbugs list --- Diffs of the changes: Index: llvm/www/www-index.html diff -u llvm/www/www-index.html:1.7 llvm/www/www-index.html:1.8 --- llvm/www/www-index.html:1.7 Sat Sep 7 00:41:23 2002 +++ llvm/www/www-index.html Mon Oct 28 17:30:43 2002 @@ -187,6 +187,14 @@ + + + + + From lattner at cs.uiuc.edu Mon Oct 28 17:54:01 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon Oct 28 17:54:01 2002 Subject: [llvm-commits] CVS: llvm/include/llvm/Target/MachineCacheInfo.h Message-ID: <200210282353.RAA02688@apoc.cs.uiuc.edu> Changes in directory llvm/include/llvm/Target: MachineCacheInfo.h updated: 1.5 -> 1.6 --- Log message: Inline some code from the cpp file --- Diffs of the changes: Index: llvm/include/llvm/Target/MachineCacheInfo.h diff -u llvm/include/llvm/Target/MachineCacheInfo.h:1.5 llvm/include/llvm/Target/MachineCacheInfo.h:1.6 --- llvm/include/llvm/Target/MachineCacheInfo.h:1.5 Sun Feb 3 23:55:08 2002 +++ llvm/include/llvm/Target/MachineCacheInfo.h Mon Oct 28 17:53:32 2002 @@ -1,4 +1,4 @@ -//===-- llvm/Target/MachineCacheInfo.h ---------------------------*- C++ -*-==// +//===-- llvm/Target/MachineCacheInfo.h --------------------------*- C++ -*-===// // // Describes properties of the target cache architecture. // @@ -19,7 +19,9 @@ std::vector cacheAssoc; public: - MachineCacheInfo(const TargetMachine& tgt); + MachineCacheInfo(const TargetMachine& tgt) : target(tgt) { + Initialize(); + } // Default parameters are: // NumLevels = 2 From lattner at cs.uiuc.edu Mon Oct 28 17:55:00 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon Oct 28 17:55:00 2002 Subject: [llvm-commits] CVS: llvm/include/llvm/Target/MachineInstrInfo.h Message-ID: <200210282354.RAA02712@apoc.cs.uiuc.edu> Changes in directory llvm/include/llvm/Target: MachineInstrInfo.h updated: 1.27 -> 1.28 --- Log message: Strip a bunch of #includes from the file, move some virtual functions to .cpp file --- Diffs of the changes: Index: llvm/include/llvm/Target/MachineInstrInfo.h diff -u llvm/include/llvm/Target/MachineInstrInfo.h:1.27 llvm/include/llvm/Target/MachineInstrInfo.h:1.28 --- llvm/include/llvm/Target/MachineInstrInfo.h:1.27 Mon Oct 28 15:17:16 2002 +++ llvm/include/llvm/Target/MachineInstrInfo.h Mon Oct 28 17:53:56 2002 @@ -7,16 +7,15 @@ #ifndef LLVM_TARGET_MACHINEINSTRINFO_H #define LLVM_TARGET_MACHINEINSTRINFO_H -#include "Support/NonCopyable.h" #include "Support/DataTypes.h" -#include "llvm/Constant.h" -#include "llvm/DerivedTypes.h" +#include class MachineInstrDescriptor; class MachineInstr; class TargetMachine; class Value; class Instruction; +class Constant; class Function; class MachineCodeForInstruction; @@ -50,7 +49,6 @@ // //--------------------------------------------------------------------------- - const unsigned M_NOP_FLAG = 1 << 0; const unsigned M_BRANCH_FLAG = 1 << 1; const unsigned M_CALL_FLAG = 1 << 2; @@ -82,7 +80,7 @@ }; -class MachineInstrInfo : public NonCopyableV { +class MachineInstrInfo { public: const TargetMachine& target; @@ -91,6 +89,8 @@ unsigned descSize; // number of entries in the desc array unsigned numRealOpCodes; // number of non-dummy op codes + MachineInstrInfo(const MachineInstrInfo &); // DO NOT IMPLEMENT + void operator=(const MachineInstrInfo &); // DO NOT IMPLEMENT public: MachineInstrInfo(const TargetMachine& tgt, const MachineInstrDescriptor *desc, unsigned descSize, @@ -241,14 +241,12 @@ // Queries about representation of LLVM quantities (e.g., constants) //------------------------------------------------------------------------- - // Test if this type of constant must be loaded from memory into - // a register, i.e., cannot be set bitwise in register and cannot - // use immediate fields of instructions. Note that this only makes - // sense for primitive types. - virtual bool ConstantTypeMustBeLoaded(const Constant* CV) const { - assert(CV->getType()->isPrimitiveType() || isa(CV->getType())); - return !(CV->getType()->isIntegral() || isa(CV->getType())); - } + /// ConstantTypeMustBeLoaded - Test if this type of constant must be loaded + /// from memory into a register, i.e., cannot be set bitwise in register and + /// cannot use immediate fields of instructions. Note that this only makes + /// sense for primitive types. + /// + virtual bool ConstantTypeMustBeLoaded(const Constant* CV) const; // Test if this constant may not fit in the immediate field of the // machine instructions (probably) generated for this instruction. From lattner at cs.uiuc.edu Mon Oct 28 17:55:02 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon Oct 28 17:55:02 2002 Subject: [llvm-commits] CVS: llvm/include/llvm/Target/MachineSchedInfo.h Message-ID: <200210282354.RAA02741@apoc.cs.uiuc.edu> Changes in directory llvm/include/llvm/Target: MachineSchedInfo.h updated: 1.11 -> 1.12 --- Log message: Minor cleanups, remove noncopyable so dot doesn't cluster unrelated stuff --- Diffs of the changes: Index: llvm/include/llvm/Target/MachineSchedInfo.h diff -u llvm/include/llvm/Target/MachineSchedInfo.h:1.11 llvm/include/llvm/Target/MachineSchedInfo.h:1.12 --- llvm/include/llvm/Target/MachineSchedInfo.h:1.11 Sun Oct 27 22:53:18 2002 +++ llvm/include/llvm/Target/MachineSchedInfo.h Mon Oct 28 17:54:23 2002 @@ -9,6 +9,7 @@ #include "llvm/Target/MachineInstrInfo.h" #include "Support/hash_map" +#include typedef long long cycles_t; static const cycles_t HUGE_LATENCY = ~((long long) 1 << (sizeof(cycles_t)-2)); @@ -174,7 +175,7 @@ // Common interface to machine information for instruction scheduling //--------------------------------------------------------------------------- -class MachineSchedInfo : public NonCopyableV { +class MachineSchedInfo { public: const TargetMachine& target; @@ -200,7 +201,10 @@ assert(sc < numSchedClasses); return classRUsages[sc]; } - + +private: + MachineSchedInfo(const MachineSchedInfo &); // DO NOT IMPLEMENT + void operator=(const MachineSchedInfo &); // DO NOT IMPLEMENT public: /*ctor*/ MachineSchedInfo (const TargetMachine& tgt, int _numSchedClasses, From lattner at cs.uiuc.edu Mon Oct 28 17:55:04 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon Oct 28 17:55:04 2002 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp Message-ID: <200210282354.RAA02757@apoc.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/InstrSelection: InstrSelectionSupport.cpp updated: 1.38 -> 1.39 --- Log message: MachineInstrInfo no longer #includes this header, so we must --- Diffs of the changes: Index: llvm/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp diff -u llvm/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp:1.38 llvm/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp:1.39 --- llvm/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp:1.38 Sun Oct 27 22:45:26 2002 +++ llvm/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp Mon Oct 28 17:54:47 2002 @@ -17,7 +17,7 @@ #include "llvm/Target/MachineInstrInfo.h" #include "llvm/Constants.h" #include "llvm/Function.h" -#include "llvm/Type.h" +#include "llvm/DerivedTypes.h" #include "llvm/iMemory.h" using std::vector; From lattner at cs.uiuc.edu Mon Oct 28 17:56:00 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon Oct 28 17:56:00 2002 Subject: [llvm-commits] CVS: llvm/lib/Target/MachineInstrInfo.cpp TargetMachine.cpp Message-ID: <200210282355.RAA02821@apoc.cs.uiuc.edu> Changes in directory llvm/lib/Target: MachineInstrInfo.cpp added (r1.1) TargetMachine.cpp updated: 1.14 -> 1.15 --- Log message: Seperate code out of TargetMachine into MachineInstrInfo --- Diffs of the changes: Index: llvm/lib/Target/TargetMachine.cpp diff -u llvm/lib/Target/TargetMachine.cpp:1.14 llvm/lib/Target/TargetMachine.cpp:1.15 --- llvm/lib/Target/TargetMachine.cpp:1.14 Sun Oct 27 19:03:41 2002 +++ llvm/lib/Target/TargetMachine.cpp Mon Oct 28 17:55:33 2002 @@ -1,14 +1,13 @@ //===-- TargetMachine.cpp - General Target Information ---------------------==// // // This file describes the general parts of a Target machine. -// This file also implements MachineInstrInfo and MachineCacheInfo. +// This file also implements MachineCacheInfo. // //===----------------------------------------------------------------------===// #include "llvm/Target/TargetMachine.h" -#include "llvm/Target/MachineInstrInfo.h" #include "llvm/Target/MachineCacheInfo.h" -#include "llvm/Function.h" +#include "llvm/Type.h" //--------------------------------------------------------------------------- // class TargetMachine @@ -45,71 +44,13 @@ //--------------------------------------------------------------------------- -// class MachineInstructionInfo -// Interface to description of machine instructions -//--------------------------------------------------------------------------- - - -/*ctor*/ -MachineInstrInfo::MachineInstrInfo(const TargetMachine& tgt, - const MachineInstrDescriptor* _desc, - unsigned int _descSize, - unsigned int _numRealOpCodes) - : target(tgt), - desc(_desc), descSize(_descSize), numRealOpCodes(_numRealOpCodes) -{ - // FIXME: TargetInstrDescriptors should not be global - assert(TargetInstrDescriptors == NULL && desc != NULL); - TargetInstrDescriptors = desc; // initialize global variable -} - - -MachineInstrInfo::~MachineInstrInfo() -{ - TargetInstrDescriptors = NULL; // reset global variable -} - - -bool -MachineInstrInfo::constantFitsInImmedField(MachineOpCode opCode, - int64_t intValue) const -{ - // First, check if opCode has an immed field. - bool isSignExtended; - uint64_t maxImmedValue = maxImmedConstant(opCode, isSignExtended); - if (maxImmedValue != 0) - { - // NEED TO HANDLE UNSIGNED VALUES SINCE THEY MAY BECOME MUCH - // SMALLER AFTER CASTING TO SIGN-EXTENDED int, short, or char. - // See CreateUIntSetInstruction in SparcInstrInfo.cpp. - - // Now check if the constant fits - if (intValue <= (int64_t) maxImmedValue && - intValue >= -((int64_t) maxImmedValue+1)) - return true; - } - - return false; -} - - -//--------------------------------------------------------------------------- // class MachineCacheInfo // // Purpose: // Describes properties of the target cache architecture. //--------------------------------------------------------------------------- -/*ctor*/ -MachineCacheInfo::MachineCacheInfo(const TargetMachine& tgt) - : target(tgt) -{ - Initialize(); -} - -void -MachineCacheInfo::Initialize() -{ +void MachineCacheInfo::Initialize() { numLevels = 2; cacheLineSizes.push_back(16); cacheLineSizes.push_back(32); cacheSizes.push_back(1 << 15); cacheSizes.push_back(1 << 20); From lattner at cs.uiuc.edu Mon Oct 28 17:56:02 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon Oct 28 17:56:02 2002 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/Printer.cpp X86.h X86InstructionInfo.h Message-ID: <200210282355.RAA02834@apoc.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: Printer.cpp updated: 1.1 -> 1.2 X86.h updated: 1.1 -> 1.2 X86InstructionInfo.h updated: 1.1 -> 1.2 --- Log message: Initial stab at MachineInstr'ication --- Diffs of the changes: Index: llvm/lib/Target/X86/Printer.cpp diff -u llvm/lib/Target/X86/Printer.cpp:1.1 llvm/lib/Target/X86/Printer.cpp:1.2 --- llvm/lib/Target/X86/Printer.cpp:1.1 Fri Oct 25 17:55:53 2002 +++ llvm/lib/Target/X86/Printer.cpp Mon Oct 28 17:55:19 2002 @@ -13,7 +13,7 @@ /// the function is in SSA form or not, although when in SSA form, we obviously /// don't care about being consumable by an assembler. /// -void X86PrintCode(const MFunction *MF, std::ostream &O) { +void X86PrintCode(const MachineFunction *MF, std::ostream &O) { O << "x86 printing not implemented yet!\n"; // This should use the X86InstructionInfo::print method to print assembly for Index: llvm/lib/Target/X86/X86.h diff -u llvm/lib/Target/X86/X86.h:1.1 llvm/lib/Target/X86/X86.h:1.2 --- llvm/lib/Target/X86/X86.h:1.1 Fri Oct 25 17:55:53 2002 +++ llvm/lib/Target/X86/X86.h Mon Oct 28 17:55:19 2002 @@ -11,32 +11,32 @@ #define TARGET_X86_H #include -class MFunction; +class MachineFunction; class Function; /// X86PrintCode - Print out the specified machine code function to the /// specified stream. This function should work regardless of whether or not /// the function is in SSA form or not. /// -void X86PrintCode(const MFunction *MF, std::ostream &O); +void X86PrintCode(const MachineFunction *MF, std::ostream &O); /// X86SimpleInstructionSelection - This function converts an LLVM function into /// a machine code representation is a very simple peep-hole fashion. The /// generated code sucks but the implementation is nice and simple. /// -MFunction *X86SimpleInstructionSelection(Function &F); +MachineFunction *X86SimpleInstructionSelection(Function &F); /// X86SimpleRegisterAllocation - This function converts the specified machine /// code function from SSA form to use explicit registers by spilling every /// register. Wow, great policy huh? /// -inline void X86SimpleRegisterAllocation(MFunction *MF) {} +inline void X86SimpleRegisterAllocation(MachineFunction *MF) {} /// X86EmitCodeToMemory - This function converts a register allocated function /// into raw machine code in a dynamically allocated chunk of memory. A pointer /// to the start of the function is returned. /// -inline void *X86EmitCodeToMemory(MFunction *MF) { return 0; } +inline void *X86EmitCodeToMemory(MachineFunction *MF) { return 0; } // Put symbolic names in a namespace to avoid causing these to clash with all Index: llvm/lib/Target/X86/X86InstructionInfo.h diff -u llvm/lib/Target/X86/X86InstructionInfo.h:1.1 llvm/lib/Target/X86/X86InstructionInfo.h:1.2 --- llvm/lib/Target/X86/X86InstructionInfo.h:1.1 Fri Oct 25 17:55:53 2002 +++ llvm/lib/Target/X86/X86InstructionInfo.h Mon Oct 28 17:55:19 2002 @@ -7,7 +7,7 @@ #ifndef X86INSTRUCTIONINFO_H #define X86INSTRUCTIONINFO_H -#include "llvm/Target/MInstructionInfo.h" +#include "llvm/Target/InstructionInfo.h" #include "X86RegisterInfo.h" class X86InstructionInfo : public MInstructionInfo { From lattner at cs.uiuc.edu Mon Oct 28 17:57:01 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon Oct 28 17:57:01 2002 Subject: [llvm-commits] CVS: llvm/lib/Target/Makefile Message-ID: <200210282356.RAA02848@apoc.cs.uiuc.edu> Changes in directory llvm/lib/Target: Makefile updated: 1.4 -> 1.5 --- Log message: Don't build X86 target until it builds properly again --- Diffs of the changes: Index: llvm/lib/Target/Makefile diff -u llvm/lib/Target/Makefile:1.4 llvm/lib/Target/Makefile:1.5 --- llvm/lib/Target/Makefile:1.4 Fri Oct 25 17:55:05 2002 +++ llvm/lib/Target/Makefile Mon Oct 28 17:56:41 2002 @@ -1,5 +1,5 @@ LEVEL = ../.. -DIRS = Sparc X86 +DIRS = Sparc LIBRARYNAME = target BUILD_ARCHIVE = 1 From lattner at cs.uiuc.edu Mon Oct 28 18:48:01 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon Oct 28 18:48:01 2002 Subject: [llvm-commits] CVS: llvm/www/www-index.html Message-ID: <200210290047.SAA14835@tank.cs.uiuc.edu> Changes in directory llvm/www: www-index.html updated: 1.8 -> 1.9 --- Log message: Reword --- Diffs of the changes: Index: llvm/www/www-index.html diff -u llvm/www/www-index.html:1.8 llvm/www/www-index.html:1.9 --- llvm/www/www-index.html:1.8 Mon Oct 28 17:30:43 2002 +++ llvm/www/www-index.html Mon Oct 28 18:47:36 2002 @@ -191,8 +191,8 @@ + list has been added for LLVM bug reports and patch + submissions. From lattner at cs.uiuc.edu Tue Oct 29 09:16:01 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 09:16:01 2002 Subject: [llvm-commits] CVS: llvm/Makefile.common Message-ID: <200210291515.JAA09429@apoc.cs.uiuc.edu> Changes in directory llvm: Makefile.common updated: 1.66 -> 1.67 --- Log message: Don't link tools with -g objects! --- Diffs of the changes: Index: llvm/Makefile.common diff -u llvm/Makefile.common:1.66 llvm/Makefile.common:1.67 --- llvm/Makefile.common:1.66 Fri Oct 25 09:32:42 2002 +++ llvm/Makefile.common Tue Oct 29 09:15:22 2002 @@ -404,7 +404,7 @@ $(TOOLEXENAME_O): $(ObjectsO) $(USED_LIB_PATHS_O) $(BUILD_ROOT_TOP)/tools/Release/.dir @echo ======= Linking $(TOOLNAME) release executable ======= - $(VERB) $(LinkO) -o $@ $(ObjectsG) $(USED_LIBS_OPTIONS_O) $(TOOLLINKOPTS) + $(VERB) $(LinkO) -o $@ $(ObjectsO) $(USED_LIBS_OPTIONS_O) $(TOOLLINKOPTS) $(TOOLEXENAME_P): $(ObjectsP) $(USED_LIB_PATHS_P) $(BUILD_ROOT_TOP)/tools/Profile/.dir @echo ======= Linking $(TOOLNAME) profile executable ======= From lattner at cs.uiuc.edu Tue Oct 29 09:45:01 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 09:45:01 2002 Subject: [llvm-commits] CVS: llvm/include/llvm/Target/MachineInstrInfo.h Message-ID: <200210291544.JAA10812@apoc.cs.uiuc.edu> Changes in directory llvm/include/llvm/Target: MachineInstrInfo.h updated: 1.28 -> 1.29 --- Log message: MachineInstrInfo doesn't need a TargetMachine member --- Diffs of the changes: Index: llvm/include/llvm/Target/MachineInstrInfo.h diff -u llvm/include/llvm/Target/MachineInstrInfo.h:1.28 llvm/include/llvm/Target/MachineInstrInfo.h:1.29 --- llvm/include/llvm/Target/MachineInstrInfo.h:1.28 Mon Oct 28 17:53:56 2002 +++ llvm/include/llvm/Target/MachineInstrInfo.h Tue Oct 29 09:44:40 2002 @@ -81,10 +81,7 @@ class MachineInstrInfo { -public: - const TargetMachine& target; - -protected: +private: const MachineInstrDescriptor* desc; // raw array to allow static init'n unsigned descSize; // number of entries in the desc array unsigned numRealOpCodes; // number of non-dummy op codes @@ -92,8 +89,7 @@ MachineInstrInfo(const MachineInstrInfo &); // DO NOT IMPLEMENT void operator=(const MachineInstrInfo &); // DO NOT IMPLEMENT public: - MachineInstrInfo(const TargetMachine& tgt, - const MachineInstrDescriptor *desc, unsigned descSize, + MachineInstrInfo(const MachineInstrDescriptor *desc, unsigned descSize, unsigned numRealOpCodes); virtual ~MachineInstrInfo(); From lattner at cs.uiuc.edu Tue Oct 29 09:46:01 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 09:46:01 2002 Subject: [llvm-commits] CVS: llvm/lib/Target/MachineInstrInfo.cpp Message-ID: <200210291545.JAA10841@apoc.cs.uiuc.edu> Changes in directory llvm/lib/Target: MachineInstrInfo.cpp updated: 1.1 -> 1.2 --- Log message: MachineInstrInfo doesn't need a TargetMachine --- Diffs of the changes: Index: llvm/lib/Target/MachineInstrInfo.cpp diff -u llvm/lib/Target/MachineInstrInfo.cpp:1.1 llvm/lib/Target/MachineInstrInfo.cpp:1.2 --- llvm/lib/Target/MachineInstrInfo.cpp:1.1 Mon Oct 28 17:55:33 2002 +++ llvm/lib/Target/MachineInstrInfo.cpp Tue Oct 29 09:45:18 2002 @@ -15,11 +15,10 @@ //--------------------------------------------------------------------------- -MachineInstrInfo::MachineInstrInfo(const TargetMachine& tgt, - const MachineInstrDescriptor* Desc, +MachineInstrInfo::MachineInstrInfo(const MachineInstrDescriptor* Desc, unsigned DescSize, unsigned NumRealOpCodes) - : target(tgt), desc(Desc), descSize(DescSize), numRealOpCodes(NumRealOpCodes) { + : desc(Desc), descSize(DescSize), numRealOpCodes(NumRealOpCodes) { // FIXME: TargetInstrDescriptors should not be global assert(TargetInstrDescriptors == NULL && desc != NULL); TargetInstrDescriptors = desc; // initialize global variable From lattner at cs.uiuc.edu Tue Oct 29 09:46:03 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 09:46:03 2002 Subject: [llvm-commits] CVS: llvm/lib/Target/Sparc/Sparc.cpp SparcInstrInfo.cpp SparcInternals.h Message-ID: <200210291545.JAA10852@apoc.cs.uiuc.edu> Changes in directory llvm/lib/Target/Sparc: Sparc.cpp updated: 1.50 -> 1.51 SparcInstrInfo.cpp updated: 1.31 -> 1.32 SparcInternals.h updated: 1.70 -> 1.71 --- Log message: MachineInstrInfo doesn't need a TargetMachine --- Diffs of the changes: Index: llvm/lib/Target/Sparc/Sparc.cpp diff -u llvm/lib/Target/Sparc/Sparc.cpp:1.50 llvm/lib/Target/Sparc/Sparc.cpp:1.51 --- llvm/lib/Target/Sparc/Sparc.cpp:1.50 Sun Oct 27 19:12:41 2002 +++ llvm/lib/Target/Sparc/Sparc.cpp Tue Oct 29 09:45:20 2002 @@ -126,7 +126,6 @@ UltraSparc::UltraSparc() : TargetMachine("UltraSparc-Native"), - instrInfo(*this), schedInfo(*this), regInfo(*this), frameInfo(*this), Index: llvm/lib/Target/Sparc/SparcInstrInfo.cpp diff -u llvm/lib/Target/Sparc/SparcInstrInfo.cpp:1.31 llvm/lib/Target/Sparc/SparcInstrInfo.cpp:1.32 --- llvm/lib/Target/Sparc/SparcInstrInfo.cpp:1.31 Sun Oct 27 18:28:31 2002 +++ llvm/lib/Target/Sparc/SparcInstrInfo.cpp Tue Oct 29 09:45:20 2002 @@ -324,8 +324,8 @@ //--------------------------------------------------------------------------- /*ctor*/ -UltraSparcInstrInfo::UltraSparcInstrInfo(const TargetMachine& tgt) - : MachineInstrInfo(tgt, SparcMachineInstrDesc, +UltraSparcInstrInfo::UltraSparcInstrInfo() + : MachineInstrInfo(SparcMachineInstrDesc, /*descSize = */ NUM_TOTAL_OPCODES, /*numRealOpCodes = */ NUM_REAL_OPCODES) { Index: llvm/lib/Target/Sparc/SparcInternals.h diff -u llvm/lib/Target/Sparc/SparcInternals.h:1.70 llvm/lib/Target/Sparc/SparcInternals.h:1.71 --- llvm/lib/Target/Sparc/SparcInternals.h:1.70 Mon Oct 28 15:17:20 2002 +++ llvm/lib/Target/Sparc/SparcInternals.h Tue Oct 29 09:45:20 2002 @@ -76,7 +76,7 @@ //--------------------------------------------------------------------------- struct UltraSparcInstrInfo : public MachineInstrInfo { - UltraSparcInstrInfo(const TargetMachine& tgt); + UltraSparcInstrInfo(); // // All immediate constants are in position 1 except the From lattner at cs.uiuc.edu Tue Oct 29 10:33:01 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 10:33:01 2002 Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/RegColorMap.h Message-ID: <200210291632.KAA01779@apoc.cs.uiuc.edu> Changes in directory llvm/include/llvm/CodeGen: RegColorMap.h (r1.1) removed --- Log message: Delete unused header file --- Diffs of the changes: From lattner at cs.uiuc.edu Tue Oct 29 10:35:01 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 10:35:01 2002 Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/RegisterAllocation.h Message-ID: <200210291634.KAA02059@apoc.cs.uiuc.edu> Changes in directory llvm/include/llvm/CodeGen: RegisterAllocation.h updated: 1.3 -> 1.4 --- Log message: Remove unneccesary #include --- Diffs of the changes: Index: llvm/include/llvm/CodeGen/RegisterAllocation.h diff -u llvm/include/llvm/CodeGen/RegisterAllocation.h:1.3 llvm/include/llvm/CodeGen/RegisterAllocation.h:1.4 --- llvm/include/llvm/CodeGen/RegisterAllocation.h:1.3 Sat Apr 27 01:49:02 2002 +++ llvm/include/llvm/CodeGen/RegisterAllocation.h Tue Oct 29 10:34:12 2002 @@ -7,7 +7,7 @@ #ifndef LLVM_CODEGEN_REGISTERALLOCATION_H #define LLVM_CODEGEN_REGISTERALLOCATION_H -#include "llvm/Pass.h" +class Pass; class TargetMachine; //---------------------------------------------------------------------------- From lattner at cs.uiuc.edu Tue Oct 29 10:43:00 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 10:43:00 2002 Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/InterferenceGraph.h Message-ID: <200210291642.KAA02992@apoc.cs.uiuc.edu> Changes in directory llvm/include/llvm/CodeGen: InterferenceGraph.h updated: 1.2 -> 1.3 --- Log message: Make assertIGNode be private to the InterferenceGraph.cpp file --- Diffs of the changes: Index: llvm/include/llvm/CodeGen/InterferenceGraph.h diff -u llvm/include/llvm/CodeGen/InterferenceGraph.h:1.2 llvm/include/llvm/CodeGen/InterferenceGraph.h:1.3 --- llvm/include/llvm/CodeGen/InterferenceGraph.h:1.2 Sun Jan 20 16:54:26 2002 +++ llvm/include/llvm/CodeGen/InterferenceGraph.h Tue Oct 29 10:42:31 2002 @@ -27,41 +27,32 @@ typedef std::vector IGNodeListType; -class InterferenceGraph -{ +class InterferenceGraph { char **IG; // a poiner to the interference graph unsigned int Size; // size of a side of the IG RegClass *const RegCl; // RegCl contains this IG IGNodeListType IGNodeList; // a list of all IGNodes in a reg class - // for asserting this IG node is infact in the IGNodeList of this class - inline void assertIGNode(const IGNode *const Node) const { - assert( IGNodeList[ Node->getIndex() ] == Node ); - } - - - public: - // the matrix is not yet created by the constructor. Call createGraph() // to create it after adding all IGNodes to the IGNodeList - - InterferenceGraph(RegClass *const RC); + InterferenceGraph(RegClass *RC); ~InterferenceGraph(); void createGraph(); - void addLRToIG(LiveRange *const LR); + void addLRToIG(LiveRange *LR); - void setInterference(const LiveRange *const LR1, - const LiveRange *const LR2 ); + void setInterference(const LiveRange *LR1, + const LiveRange *LR2); - unsigned getInterference(const LiveRange *const LR1, - const LiveRange *const LR2 ) const ; + unsigned getInterference(const LiveRange *LR1, + const LiveRange *LR2) const ; - void mergeIGNodesOfLRs(const LiveRange *const LR1, LiveRange *const LR2); + void mergeIGNodesOfLRs(const LiveRange *LR1, LiveRange *LR2); - inline IGNodeListType &getIGNodeList() { return IGNodeList; } + IGNodeListType &getIGNodeList() { return IGNodeList; } + const IGNodeListType &getIGNodeList() const { return IGNodeList; } void setCurDegreeOfIGNodes(); From lattner at cs.uiuc.edu Tue Oct 29 10:43:03 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 10:43:03 2002 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/RegAlloc/InterferenceGraph.cpp Message-ID: <200210291642.KAA02999@apoc.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/RegAlloc: InterferenceGraph.cpp updated: 1.10 -> 1.11 --- Log message: Make assertIGNode be private to the InterferenceGraph.cpp file --- Diffs of the changes: Index: llvm/lib/CodeGen/RegAlloc/InterferenceGraph.cpp diff -u llvm/lib/CodeGen/RegAlloc/InterferenceGraph.cpp:1.10 llvm/lib/CodeGen/RegAlloc/InterferenceGraph.cpp:1.11 --- llvm/lib/CodeGen/RegAlloc/InterferenceGraph.cpp:1.10 Sun Sep 15 10:33:48 2002 +++ llvm/lib/CodeGen/RegAlloc/InterferenceGraph.cpp Tue Oct 29 10:42:34 2002 @@ -10,6 +10,12 @@ #include using std::cerr; +// for asserting this IG node is infact in the IGNodeList of this class +inline static void assertIGNode(const InterferenceGraph *IG, + const IGNode *Node) { + assert(IG->getIGNodeList()[Node->getIndex()] == Node); +} + //----------------------------------------------------------------------------- // Constructor: Records the RegClass and initalizes IGNodeList. // The matrix is NOT yet created by the constructor. Call createGraph() @@ -79,14 +85,14 @@ const LiveRange *const LR2 ) { assert(LR1 != LR2); - IGNode *const IGNode1 = LR1->getUserIGNode(); - IGNode *const IGNode2 = LR2->getUserIGNode(); + IGNode *IGNode1 = LR1->getUserIGNode(); + IGNode *IGNode2 = LR2->getUserIGNode(); - assertIGNode( IGNode1 ); - assertIGNode( IGNode2 ); + assertIGNode(this, IGNode1); + assertIGNode(this, IGNode2); - const unsigned int row = IGNode1->getIndex(); - const unsigned int col = IGNode2->getIndex(); + unsigned row = IGNode1->getIndex(); + unsigned col = IGNode2->getIndex(); char *val; @@ -111,8 +117,8 @@ const LiveRange *const LR2 ) const { assert(LR1 != LR2); - assertIGNode( LR1->getUserIGNode() ); - assertIGNode( LR2->getUserIGNode() ); + assertIGNode(this, LR1->getUserIGNode()); + assertIGNode(this, LR2->getUserIGNode()); const unsigned int row = LR1->getUserIGNode()->getIndex(); const unsigned int col = LR2->getUserIGNode()->getIndex(); @@ -142,8 +148,8 @@ IGNode *const DestNode = LR1->getUserIGNode(); IGNode *SrcNode = LR2->getUserIGNode(); - assertIGNode( DestNode ); - assertIGNode( SrcNode ); + assertIGNode(this, DestNode); + assertIGNode(this, SrcNode); if( DEBUG_RA >= RA_DEBUG_Interference) { cerr << "Merging LRs: \""; printSet(*LR1); From lattner at cs.uiuc.edu Tue Oct 29 10:50:01 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 10:50:01 2002 Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/IGNode.h Message-ID: <200210291649.KAA03709@apoc.cs.uiuc.edu> Changes in directory llvm/include/llvm/CodeGen: IGNode.h updated: 1.10 -> 1.11 --- Log message: Remove forward decl --- Diffs of the changes: Index: llvm/include/llvm/CodeGen/IGNode.h diff -u llvm/include/llvm/CodeGen/IGNode.h:1.10 llvm/include/llvm/CodeGen/IGNode.h:1.11 --- llvm/include/llvm/CodeGen/IGNode.h:1.10 Thu Sep 19 19:55:04 2002 +++ llvm/include/llvm/CodeGen/IGNode.h Tue Oct 29 10:49:44 2002 @@ -26,7 +26,6 @@ #define IG_NODE_H #include "llvm/CodeGen/LiveRange.h" -class LiveRange; class RegClass; //---------------------------------------------------------------------------- From lattner at cs.uiuc.edu Tue Oct 29 10:51:00 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 10:51:00 2002 Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/RegClass.h Message-ID: <200210291650.KAA03735@apoc.cs.uiuc.edu> Changes in directory llvm/include/llvm/CodeGen: RegClass.h updated: 1.13 -> 1.14 --- Log message: De-inline methods --- Diffs of the changes: Index: llvm/include/llvm/CodeGen/RegClass.h diff -u llvm/include/llvm/CodeGen/RegClass.h:1.13 llvm/include/llvm/CodeGen/RegClass.h:1.14 --- llvm/include/llvm/CodeGen/RegClass.h:1.13 Thu May 23 10:49:59 2002 +++ llvm/include/llvm/CodeGen/RegClass.h Tue Oct 29 10:50:33 2002 @@ -108,15 +108,8 @@ inline std::vector &getIsColorUsedArr() { return IsColorUsedArr; } - inline void printIGNodeList() const { - std::cerr << "IG Nodes for Register Class " << RegClassID << ":" << "\n"; - IG.printIGNodeList(); - } - - inline void printIG() { - std::cerr << "IG for Register Class " << RegClassID << ":" << "\n"; - IG.printIG(); - } + void printIGNodeList() const; + void printIG(); }; #endif From lattner at cs.uiuc.edu Tue Oct 29 10:51:02 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 10:51:02 2002 Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/InterferenceGraph.h Message-ID: <200210291650.KAA03740@apoc.cs.uiuc.edu> Changes in directory llvm/include/llvm/CodeGen: InterferenceGraph.h updated: 1.3 -> 1.4 --- Log message: Remove unneeded #include --- Diffs of the changes: Index: llvm/include/llvm/CodeGen/InterferenceGraph.h diff -u llvm/include/llvm/CodeGen/InterferenceGraph.h:1.3 llvm/include/llvm/CodeGen/InterferenceGraph.h:1.4 --- llvm/include/llvm/CodeGen/InterferenceGraph.h:1.3 Tue Oct 29 10:42:31 2002 +++ llvm/include/llvm/CodeGen/InterferenceGraph.h Tue Oct 29 10:50:06 2002 @@ -18,20 +18,19 @@ */ -#ifndef INTERFERENCE_GRAPH_H -#define INTERFERENCE_GRAPH_H - - -#include "llvm/CodeGen/IGNode.h" - -typedef std::vector IGNodeListType; +#ifndef INTERFERENCE_GRAPH_H +#define INTERFERENCE_GRAPH_H +#include +class LiveRange; +class RegClass; +class IGNode; class InterferenceGraph { char **IG; // a poiner to the interference graph unsigned int Size; // size of a side of the IG RegClass *const RegCl; // RegCl contains this IG - IGNodeListType IGNodeList; // a list of all IGNodes in a reg class + std::vector IGNodeList; // a list of all IGNodes in a reg class public: // the matrix is not yet created by the constructor. Call createGraph() @@ -51,8 +50,8 @@ void mergeIGNodesOfLRs(const LiveRange *LR1, LiveRange *LR2); - IGNodeListType &getIGNodeList() { return IGNodeList; } - const IGNodeListType &getIGNodeList() const { return IGNodeList; } + std::vector &getIGNodeList() { return IGNodeList; } + const std::vector &getIGNodeList() const { return IGNodeList; } void setCurDegreeOfIGNodes(); From lattner at cs.uiuc.edu Tue Oct 29 10:52:01 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 10:52:01 2002 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/RegAlloc/InterferenceGraph.cpp LiveRangeInfo.cpp PhyRegAlloc.cpp RegClass.cpp Message-ID: <200210291651.KAA03762@apoc.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/RegAlloc: InterferenceGraph.cpp updated: 1.11 -> 1.12 LiveRangeInfo.cpp updated: 1.34 -> 1.35 PhyRegAlloc.cpp updated: 1.85 -> 1.86 RegClass.cpp updated: 1.18 -> 1.19 --- Log message: Add #includes that were eliminated from headers --- Diffs of the changes: Index: llvm/lib/CodeGen/RegAlloc/InterferenceGraph.cpp diff -u llvm/lib/CodeGen/RegAlloc/InterferenceGraph.cpp:1.11 llvm/lib/CodeGen/RegAlloc/InterferenceGraph.cpp:1.12 --- llvm/lib/CodeGen/RegAlloc/InterferenceGraph.cpp:1.11 Tue Oct 29 10:42:34 2002 +++ llvm/lib/CodeGen/RegAlloc/InterferenceGraph.cpp Tue Oct 29 10:51:05 2002 @@ -5,6 +5,7 @@ //===----------------------------------------------------------------------===// #include "llvm/CodeGen/InterferenceGraph.h" +#include "llvm/CodeGen/IGNode.h" #include "llvm/CodeGen/RegAllocCommon.h" #include "Support/STLExtras.h" #include Index: llvm/lib/CodeGen/RegAlloc/LiveRangeInfo.cpp diff -u llvm/lib/CodeGen/RegAlloc/LiveRangeInfo.cpp:1.34 llvm/lib/CodeGen/RegAlloc/LiveRangeInfo.cpp:1.35 --- llvm/lib/CodeGen/RegAlloc/LiveRangeInfo.cpp:1.34 Mon Oct 28 13:22:04 2002 +++ llvm/lib/CodeGen/RegAlloc/LiveRangeInfo.cpp Tue Oct 29 10:51:05 2002 @@ -7,6 +7,7 @@ #include "llvm/CodeGen/LiveRangeInfo.h" #include "llvm/CodeGen/RegAllocCommon.h" #include "llvm/CodeGen/RegClass.h" +#include "llvm/CodeGen/IGNode.h" #include "llvm/CodeGen/MachineInstr.h" #include "llvm/CodeGen/MachineFunction.h" #include "llvm/Target/TargetMachine.h" @@ -32,7 +33,7 @@ // live range. We have to make the other entries NULL when we delete // a live range. - for(LiveRange::iterator LI = LR->begin(); LI != LR->end(); ++LI) + for (LiveRange::iterator LI = LR->begin(); LI != LR->end(); ++LI) LiveRangeMap[*LI] = 0; delete LR; Index: llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp diff -u llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp:1.85 llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp:1.86 --- llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp:1.85 Mon Oct 28 13:22:04 2002 +++ llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp Tue Oct 29 10:51:05 2002 @@ -6,6 +6,7 @@ #include "llvm/CodeGen/RegisterAllocation.h" #include "llvm/CodeGen/RegAllocCommon.h" +#include "llvm/CodeGen/IGNode.h" #include "llvm/CodeGen/PhyRegAlloc.h" #include "llvm/CodeGen/MachineInstr.h" #include "llvm/CodeGen/MachineInstrAnnot.h" Index: llvm/lib/CodeGen/RegAlloc/RegClass.cpp diff -u llvm/lib/CodeGen/RegAlloc/RegClass.cpp:1.18 llvm/lib/CodeGen/RegAlloc/RegClass.cpp:1.19 --- llvm/lib/CodeGen/RegAlloc/RegClass.cpp:1.18 Tue Oct 22 18:33:57 2002 +++ llvm/lib/CodeGen/RegAlloc/RegClass.cpp Tue Oct 29 10:51:05 2002 @@ -6,6 +6,7 @@ #include "llvm/CodeGen/RegClass.h" #include "llvm/CodeGen/RegAllocCommon.h" +#include "llvm/CodeGen/IGNode.h" using std::cerr; //---------------------------------------------------------------------------- @@ -253,5 +254,14 @@ } +void RegClass::printIGNodeList() const { + std::cerr << "IG Nodes for Register Class " << RegClassID << ":" << "\n"; + IG.printIGNodeList(); +} + +void RegClass::printIG() { + std::cerr << "IG for Register Class " << RegClassID << ":" << "\n"; + IG.printIG(); +} From lattner at cs.uiuc.edu Tue Oct 29 10:52:03 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 10:52:03 2002 Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/LiveRange.h Message-ID: <200210291651.KAA03747@apoc.cs.uiuc.edu> Changes in directory llvm/include/llvm/CodeGen: LiveRange.h updated: 1.14 -> 1.15 --- Log message: Remove #include --- Diffs of the changes: Index: llvm/include/llvm/CodeGen/LiveRange.h diff -u llvm/include/llvm/CodeGen/LiveRange.h:1.14 llvm/include/llvm/CodeGen/LiveRange.h:1.15 --- llvm/include/llvm/CodeGen/LiveRange.h:1.14 Sun Mar 31 12:58:14 2002 +++ llvm/include/llvm/CodeGen/LiveRange.h Tue Oct 29 10:50:20 2002 @@ -13,7 +13,6 @@ #include "llvm/Analysis/LiveVar/ValueSet.h" #include "llvm/Value.h" -#include class RegClass; class IGNode; From lattner at cs.uiuc.edu Tue Oct 29 11:01:01 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 11:01:01 2002 Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/LiveRange.h Message-ID: <200210291700.LAA03830@apoc.cs.uiuc.edu> Changes in directory llvm/include/llvm/CodeGen: LiveRange.h updated: 1.15 -> 1.16 --- Log message: Remove long dead #if 0 --- Diffs of the changes: Index: llvm/include/llvm/CodeGen/LiveRange.h diff -u llvm/include/llvm/CodeGen/LiveRange.h:1.15 llvm/include/llvm/CodeGen/LiveRange.h:1.16 --- llvm/include/llvm/CodeGen/LiveRange.h:1.15 Tue Oct 29 10:50:20 2002 +++ llvm/include/llvm/CodeGen/LiveRange.h Tue Oct 29 11:00:19 2002 @@ -140,10 +140,6 @@ inline void setSuggestedColor(int Col) { if (SuggestedColor == -1) SuggestedColor = Col; -#if 0 - else if (DEBUG_RA) - std::cerr << "Already has a suggested color " << Col << "\n"; -#endif } inline unsigned getSuggestedColor() const { From lattner at cs.uiuc.edu Tue Oct 29 11:04:01 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 11:04:01 2002 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/RegAlloc/LiveRangeInfo.cpp Message-ID: <200210291703.LAA03893@apoc.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/RegAlloc: LiveRangeInfo.cpp updated: 1.35 -> 1.36 --- Log message: Inline typedef, eliminate unused method --- Diffs of the changes: Index: llvm/lib/CodeGen/RegAlloc/LiveRangeInfo.cpp diff -u llvm/lib/CodeGen/RegAlloc/LiveRangeInfo.cpp:1.35 llvm/lib/CodeGen/RegAlloc/LiveRangeInfo.cpp:1.36 --- llvm/lib/CodeGen/RegAlloc/LiveRangeInfo.cpp:1.35 Tue Oct 29 10:51:05 2002 +++ llvm/lib/CodeGen/RegAlloc/LiveRangeInfo.cpp Tue Oct 29 11:03:17 2002 @@ -205,24 +205,19 @@ // 1) suggest colors for call and return args. // 2) create new LRs for implicit defs in machine instructions //--------------------------------------------------------------------------- -void LiveRangeInfo::suggestRegs4CallRets() -{ - CallRetInstrListType::iterator It = CallRetInstrList.begin(); - for( ; It != CallRetInstrList.end(); ++It ) { - +void LiveRangeInfo::suggestRegs4CallRets() { + std::vector::iterator It = CallRetInstrList.begin(); + for( ; It != CallRetInstrList.end(); ++It) { MachineInstr *MInst = *It; - MachineOpCode OpCode = MInst->getOpCode(); - - if( (TM.getInstrInfo()).isReturn(OpCode) ) - MRI.suggestReg4RetValue( MInst, *this); + MachineOpCode OpCode = MInst->getOpCode(); - else if( (TM.getInstrInfo()).isCall( OpCode ) ) - MRI.suggestRegs4CallArgs( MInst, *this); - + if ((TM.getInstrInfo()).isReturn(OpCode)) + MRI.suggestReg4RetValue(MInst, *this); + else if ((TM.getInstrInfo()).isCall(OpCode)) + MRI.suggestRegs4CallArgs(MInst, *this); else - assert( 0 && "Non call/ret instr in CallRetInstrList" ); + assert( 0 && "Non call/ret instr in CallRetInstrList" ); } - } From lattner at cs.uiuc.edu Tue Oct 29 11:04:04 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 11:04:04 2002 Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/LiveRangeInfo.h Message-ID: <200210291703.LAA03900@apoc.cs.uiuc.edu> Changes in directory llvm/include/llvm/CodeGen: LiveRangeInfo.h updated: 1.13 -> 1.14 --- Log message: Inline typedef, eliminate unused method --- Diffs of the changes: Index: llvm/include/llvm/CodeGen/LiveRangeInfo.h diff -u llvm/include/llvm/CodeGen/LiveRangeInfo.h:1.13 llvm/include/llvm/CodeGen/LiveRangeInfo.h:1.14 --- llvm/include/llvm/CodeGen/LiveRangeInfo.h:1.13 Sat Sep 28 12:05:43 2002 +++ llvm/include/llvm/CodeGen/LiveRangeInfo.h Tue Oct 29 11:03:19 2002 @@ -32,7 +32,6 @@ class Instruction; typedef hash_map LiveRangeMapType; -typedef std::vector CallRetInstrListType; //---------------------------------------------------------------------------- // Class LiveRangeInfo @@ -53,7 +52,7 @@ const MachineRegInfo& MRI; // machine reg info - CallRetInstrListType CallRetInstrList; // a list of all call/ret instrs + std::vector CallRetInstrList; // a list of all call/ret instrs //------------ Private methods (see LiveRangeInfo.cpp for description)------- @@ -90,19 +89,13 @@ // return the common live range map for this method // - inline const LiveRangeMapType *const getLiveRangeMap() const + inline const LiveRangeMapType *getLiveRangeMap() const { return &LiveRangeMap; } // Method sed to get the corresponding live range of a Value // - inline LiveRange *getLiveRangeForValue( const Value *const Val) + inline LiveRange *getLiveRangeForValue( const Value *Val) { return LiveRangeMap[Val]; } - - // Method used to get the Call and Return instruction list - // - inline CallRetInstrListType &getCallRetInstrList() { - return CallRetInstrList; - } // Method for coalescing live ranges. Called only after interference info // is calculated. From lattner at cs.uiuc.edu Tue Oct 29 11:09:02 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 11:09:02 2002 Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/PhyRegAlloc.h Message-ID: <200210291708.LAA05001@apoc.cs.uiuc.edu> Changes in directory llvm/include/llvm/CodeGen: PhyRegAlloc.h updated: 1.38 -> 1.39 --- Log message: Remove #include, misleading comment, and a typedef used only once --- Diffs of the changes: Index: llvm/include/llvm/CodeGen/PhyRegAlloc.h diff -u llvm/include/llvm/CodeGen/PhyRegAlloc.h:1.38 llvm/include/llvm/CodeGen/PhyRegAlloc.h:1.39 --- llvm/include/llvm/CodeGen/PhyRegAlloc.h:1.38 Mon Oct 28 13:43:23 2002 +++ llvm/include/llvm/CodeGen/PhyRegAlloc.h Tue Oct 29 11:08:05 2002 @@ -14,17 +14,6 @@ * Machine dependent work: All parts of the register coloring algorithm except coloring of an individual node are machine independent. - - Register allocation must be done as: - - FunctionLiveVarInfo LVI(*FunctionI ); // compute LV info - LVI.analyze(); - - TargetMachine &target = .... - - - PhyRegAlloc PRA(*FunctionI, target, &LVI); // allocate regs - PRA.allocateRegisters(); */ #ifndef PHY_REG_ALLOC_H @@ -32,7 +21,6 @@ #include "llvm/CodeGen/RegClass.h" #include "llvm/CodeGen/LiveRangeInfo.h" -#include #include class MachineFunction; @@ -55,19 +43,13 @@ std::vector InstrnsAfter; //Insts added AFTER an existing inst }; -typedef std::map AddedInstrMapType; - - - //---------------------------------------------------------------------------- // class PhyRegAlloc: // Main class the register allocator. Call allocateRegisters() to allocate // registers for a Function. //---------------------------------------------------------------------------- - class PhyRegAlloc: public NonCopyable { - std::vector RegClassList; // vector of register classes const TargetMachine &TM; // target machine const Function *Fn; // name of the function we work on @@ -79,7 +61,9 @@ const unsigned NumOfRegClasses; // recorded here for efficiency - AddedInstrMapType AddedInstrMap; // to store instrns added in this phase + // AddedInstrMap - Used to store instrns added in this phase + std::map AddedInstrMap; + AddedInstrns AddedInstrAtEntry; // to store instrns added at entry LoopInfo *LoopDepthCalc; // to calculate loop depths ReservedColorListType ResColList; // A set of reserved regs if desired. @@ -105,11 +89,6 @@ private: - - - - //------- ------------------ private methods--------------------------------- - void addInterference(const Value *Def, const ValueSet *LVSet, bool isCallInst); @@ -140,8 +119,8 @@ void printLabel(const Value *const Val); void printMachineCode(); - friend class UltraSparcRegInfo; + friend class UltraSparcRegInfo; // FIXME: remove this int getUsableUniRegAtMI(int RegType, const ValueSet *LVSetBef, From lattner at cs.uiuc.edu Tue Oct 29 11:15:01 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 11:15:01 2002 Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineFunction.h Message-ID: <200210291714.LAA05458@apoc.cs.uiuc.edu> Changes in directory llvm/include/llvm/CodeGen: MachineFunction.h updated: 1.16 -> 1.17 --- Log message: Remove unneeded #include --- Diffs of the changes: Index: llvm/include/llvm/CodeGen/MachineFunction.h diff -u llvm/include/llvm/CodeGen/MachineFunction.h:1.16 llvm/include/llvm/CodeGen/MachineFunction.h:1.17 --- llvm/include/llvm/CodeGen/MachineFunction.h:1.16 Mon Oct 28 13:58:38 2002 +++ llvm/include/llvm/CodeGen/MachineFunction.h Tue Oct 29 11:14:10 2002 @@ -11,7 +11,6 @@ #include "llvm/CodeGen/MachineBasicBlock.h" #include "llvm/Annotation.h" -#include "Support/NonCopyable.h" #include "Support/HashExtras.h" #include "Support/hash_set" #include "Support/ilist" From lattner at cs.uiuc.edu Tue Oct 29 11:16:01 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 11:16:01 2002 Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/InstrScheduling.h Message-ID: <200210291715.LAA05480@apoc.cs.uiuc.edu> Changes in directory llvm/include/llvm/CodeGen: InstrScheduling.h updated: 1.9 -> 1.10 --- Log message: Remove old entrypoint --- Diffs of the changes: Index: llvm/include/llvm/CodeGen/InstrScheduling.h diff -u llvm/include/llvm/CodeGen/InstrScheduling.h:1.9 llvm/include/llvm/CodeGen/InstrScheduling.h:1.10 --- llvm/include/llvm/CodeGen/InstrScheduling.h:1.9 Sat Apr 27 01:49:02 2002 +++ llvm/include/llvm/CodeGen/InstrScheduling.h Tue Oct 29 11:15:01 2002 @@ -23,17 +23,4 @@ Pass *createInstructionSchedulingWithSSAPass(const TargetMachine &Target); - -//--------------------------------------------------------------------------- -// Function: ScheduleInstructions -// -// Purpose: -// Entry point for instruction scheduling on machine code. -// Schedules the machine instructions generated by instruction selection. -// Assumes that register allocation has been done. -//--------------------------------------------------------------------------- - -// Not implemented yet. -//bool ScheduleInstructions(Method *M, const TargetMachine &Target); - #endif From lattner at cs.uiuc.edu Tue Oct 29 11:26:01 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 11:26:01 2002 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp Message-ID: <200210291725.LAA06198@apoc.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/InstrSelection: InstrSelectionSupport.cpp updated: 1.39 -> 1.40 --- Log message: Use higher level method --- Diffs of the changes: Index: llvm/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp diff -u llvm/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp:1.39 llvm/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp:1.40 --- llvm/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp:1.39 Mon Oct 28 17:54:47 2002 +++ llvm/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp Tue Oct 29 11:25:41 2002 @@ -471,7 +471,7 @@ MachineOpCode opCode = minstr->getOpCode(); const MachineInstrInfo& instrInfo = target.getInstrInfo(); - const MachineInstrDescriptor& instrDesc = instrInfo.getDescriptor(opCode); + int resultPos = instrInfo.getResultPos(opCode); int immedPos = instrInfo.getImmedConstantPos(opCode); Function *F = vmInstr->getParent()->getParent(); @@ -482,7 +482,7 @@ // Skip the result position, preallocated machine registers, or operands // that cannot be constants (CC regs or PC-relative displacements) - if (instrDesc.resultPos == (int) op || + if (resultPos == (int)op || mop.getType() == MachineOperand::MO_MachineRegister || mop.getType() == MachineOperand::MO_CCRegister || mop.getType() == MachineOperand::MO_PCRelativeDisp) From lattner at cs.uiuc.edu Tue Oct 29 11:27:01 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 11:27:01 2002 Subject: [llvm-commits] CVS: llvm/include/llvm/Target/MachineInstrInfo.h Message-ID: <200210291726.LAA06518@apoc.cs.uiuc.edu> Changes in directory llvm/include/llvm/Target: MachineInstrInfo.h updated: 1.29 -> 1.30 --- Log message: Rename MachineInstrInfo::getDescriptor to MachineInstrInfo::get --- Diffs of the changes: Index: llvm/include/llvm/Target/MachineInstrInfo.h diff -u llvm/include/llvm/Target/MachineInstrInfo.h:1.29 llvm/include/llvm/Target/MachineInstrInfo.h:1.30 --- llvm/include/llvm/Target/MachineInstrInfo.h:1.29 Tue Oct 29 09:44:40 2002 +++ llvm/include/llvm/Target/MachineInstrInfo.h Tue Oct 29 11:26:26 2002 @@ -81,7 +81,6 @@ class MachineInstrInfo { -private: const MachineInstrDescriptor* desc; // raw array to allow static init'n unsigned descSize; // number of entries in the desc array unsigned numRealOpCodes; // number of non-dummy op codes @@ -96,25 +95,28 @@ unsigned getNumRealOpCodes() const { return numRealOpCodes; } unsigned getNumTotalOpCodes() const { return descSize; } - const MachineInstrDescriptor& getDescriptor(MachineOpCode opCode) const { + /// get - Return the machine instruction descriptor that corresponds to the + /// specified instruction opcode. + /// + const MachineInstrDescriptor& get(MachineOpCode opCode) const { assert(opCode >= 0 && opCode < (int)descSize); return desc[opCode]; } int getNumOperands(MachineOpCode opCode) const { - return getDescriptor(opCode).numOperands; + return get(opCode).numOperands; } int getResultPos(MachineOpCode opCode) const { - return getDescriptor(opCode).resultPos; + return get(opCode).resultPos; } unsigned getNumDelaySlots(MachineOpCode opCode) const { - return getDescriptor(opCode).numDelaySlots; + return get(opCode).numDelaySlots; } InstrSchedClass getSchedClass(MachineOpCode opCode) const { - return getDescriptor(opCode).schedClass; + return get(opCode).schedClass; } // @@ -122,66 +124,66 @@ // flags listed above. // unsigned getIClass(MachineOpCode opCode) const { - return getDescriptor(opCode).iclass; + return get(opCode).iclass; } bool isNop(MachineOpCode opCode) const { - return getDescriptor(opCode).iclass & M_NOP_FLAG; + return get(opCode).iclass & M_NOP_FLAG; } bool isBranch(MachineOpCode opCode) const { - return getDescriptor(opCode).iclass & M_BRANCH_FLAG; + return get(opCode).iclass & M_BRANCH_FLAG; } bool isCall(MachineOpCode opCode) const { - return getDescriptor(opCode).iclass & M_CALL_FLAG; + return get(opCode).iclass & M_CALL_FLAG; } bool isReturn(MachineOpCode opCode) const { - return getDescriptor(opCode).iclass & M_RET_FLAG; + return get(opCode).iclass & M_RET_FLAG; } bool isControlFlow(MachineOpCode opCode) const { - return getDescriptor(opCode).iclass & M_BRANCH_FLAG - || getDescriptor(opCode).iclass & M_CALL_FLAG - || getDescriptor(opCode).iclass & M_RET_FLAG; + return get(opCode).iclass & M_BRANCH_FLAG + || get(opCode).iclass & M_CALL_FLAG + || get(opCode).iclass & M_RET_FLAG; } bool isArith(MachineOpCode opCode) const { - return getDescriptor(opCode).iclass & M_ARITH_FLAG; + return get(opCode).iclass & M_ARITH_FLAG; } bool isCCInstr(MachineOpCode opCode) const { - return getDescriptor(opCode).iclass & M_CC_FLAG; + return get(opCode).iclass & M_CC_FLAG; } bool isLogical(MachineOpCode opCode) const { - return getDescriptor(opCode).iclass & M_LOGICAL_FLAG; + return get(opCode).iclass & M_LOGICAL_FLAG; } bool isIntInstr(MachineOpCode opCode) const { - return getDescriptor(opCode).iclass & M_INT_FLAG; + return get(opCode).iclass & M_INT_FLAG; } bool isFloatInstr(MachineOpCode opCode) const { - return getDescriptor(opCode).iclass & M_FLOAT_FLAG; + return get(opCode).iclass & M_FLOAT_FLAG; } bool isConditional(MachineOpCode opCode) const { - return getDescriptor(opCode).iclass & M_CONDL_FLAG; + return get(opCode).iclass & M_CONDL_FLAG; } bool isLoad(MachineOpCode opCode) const { - return getDescriptor(opCode).iclass & M_LOAD_FLAG; + return get(opCode).iclass & M_LOAD_FLAG; } bool isPrefetch(MachineOpCode opCode) const { - return getDescriptor(opCode).iclass & M_PREFETCH_FLAG; + return get(opCode).iclass & M_PREFETCH_FLAG; } bool isLoadOrPrefetch(MachineOpCode opCode) const { - return getDescriptor(opCode).iclass & M_LOAD_FLAG - || getDescriptor(opCode).iclass & M_PREFETCH_FLAG; + return get(opCode).iclass & M_LOAD_FLAG + || get(opCode).iclass & M_PREFETCH_FLAG; } bool isStore(MachineOpCode opCode) const { - return getDescriptor(opCode).iclass & M_STORE_FLAG; + return get(opCode).iclass & M_STORE_FLAG; } bool isMemoryAccess(MachineOpCode opCode) const { - return getDescriptor(opCode).iclass & M_LOAD_FLAG - || getDescriptor(opCode).iclass & M_PREFETCH_FLAG - || getDescriptor(opCode).iclass & M_STORE_FLAG; + return get(opCode).iclass & M_LOAD_FLAG + || get(opCode).iclass & M_PREFETCH_FLAG + || get(opCode).iclass & M_STORE_FLAG; } bool isDummyPhiInstr(const MachineOpCode opCode) const { - return getDescriptor(opCode).iclass & M_DUMMY_PHI_FLAG; + return get(opCode).iclass & M_DUMMY_PHI_FLAG; } bool isPseudoInstr(const MachineOpCode opCode) const { - return getDescriptor(opCode).iclass & M_PSEUDO_FLAG; + return get(opCode).iclass & M_PSEUDO_FLAG; } // Check if an instruction can be issued before its operands are ready, @@ -201,11 +203,11 @@ // Latencies for individual instructions and instruction pairs // virtual int minLatency(MachineOpCode opCode) const { - return getDescriptor(opCode).latency; + return get(opCode).latency; } virtual int maxLatency(MachineOpCode opCode) const { - return getDescriptor(opCode).latency; + return get(opCode).latency; } // @@ -229,8 +231,8 @@ // virtual uint64_t maxImmedConstant(MachineOpCode opCode, bool &isSignExtended) const { - isSignExtended = getDescriptor(opCode).immedIsSignExtended; - return getDescriptor(opCode).maxImmedConst; + isSignExtended = get(opCode).immedIsSignExtended; + return get(opCode).maxImmedConst; } //------------------------------------------------------------------------- From lattner at cs.uiuc.edu Tue Oct 29 11:36:01 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 11:36:01 2002 Subject: [llvm-commits] CVS: llvm/include/llvm/Target/MachineInstrInfo.h Message-ID: <200210291735.LAA07199@apoc.cs.uiuc.edu> Changes in directory llvm/include/llvm/Target: MachineInstrInfo.h updated: 1.30 -> 1.31 --- Log message: Rename opCodeString to Name, add new getName() method --- Diffs of the changes: Index: llvm/include/llvm/Target/MachineInstrInfo.h diff -u llvm/include/llvm/Target/MachineInstrInfo.h:1.30 llvm/include/llvm/Target/MachineInstrInfo.h:1.31 --- llvm/include/llvm/Target/MachineInstrInfo.h:1.30 Tue Oct 29 11:26:26 2002 +++ llvm/include/llvm/Target/MachineInstrInfo.h Tue Oct 29 11:35:09 2002 @@ -67,7 +67,7 @@ struct MachineInstrDescriptor { - const char * opCodeString; // Assembly language mnemonic for the opcode. + const char * Name; // Assembly language mnemonic for the opcode. int numOperands; // Number of args; -1 if variable #args int resultPos; // Position of the result; -1 if no result unsigned maxImmedConst; // Largest +ve constant in IMMMED field or 0. @@ -101,6 +101,10 @@ const MachineInstrDescriptor& get(MachineOpCode opCode) const { assert(opCode >= 0 && opCode < (int)descSize); return desc[opCode]; + } + + const char *getName(MachineOpCode opCode) const { + return get(opCode).Name; } int getNumOperands(MachineOpCode opCode) const { From lattner at cs.uiuc.edu Tue Oct 29 11:36:03 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 11:36:03 2002 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp Message-ID: <200210291735.LAA07216@apoc.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/RegAlloc: PhyRegAlloc.cpp updated: 1.86 -> 1.87 --- Log message: Use higher level methods, don't use TargetInstrDescriptors directly! --- Diffs of the changes: Index: llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp diff -u llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp:1.86 llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp:1.87 --- llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp:1.86 Tue Oct 29 10:51:05 2002 +++ llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp Tue Oct 29 11:35:37 2002 @@ -954,10 +954,10 @@ // iterate over all the machine instructions in BB for ( ; MII != MBB.end(); ++MII) { - MachineInstr *const MInst = *MII; + MachineInstr *MInst = *MII; cerr << "\n\t"; - cerr << TargetInstrDescriptors[MInst->getOpCode()].opCodeString; + cerr << TM.getInstrInfo().getName(MInst->getOpCode()); for (unsigned OpNum=0; OpNum < MInst->getNumOperands(); ++OpNum) { MachineOperand& Op = MInst->getOperand(OpNum); From lattner at cs.uiuc.edu Tue Oct 29 11:36:06 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 11:36:06 2002 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/MachineInstr.cpp Message-ID: <200210291735.LAA07237@apoc.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen: MachineInstr.cpp updated: 1.55 -> 1.56 --- Log message: Use higher level methods, don't use TargetInstrDescriptors directly! --- Diffs of the changes: Index: llvm/lib/CodeGen/MachineInstr.cpp diff -u llvm/lib/CodeGen/MachineInstr.cpp:1.55 llvm/lib/CodeGen/MachineInstr.cpp:1.56 --- llvm/lib/CodeGen/MachineInstr.cpp:1.55 Mon Oct 28 15:17:19 2002 +++ llvm/lib/CodeGen/MachineInstr.cpp Tue Oct 29 11:35:39 2002 @@ -157,7 +157,7 @@ std::ostream &operator<<(std::ostream& os, const MachineInstr& minstr) { - os << TargetInstrDescriptors[minstr.opCode].opCodeString; + os << TargetInstrDescriptors[minstr.opCode].Name; for (unsigned i=0, N=minstr.getNumOperands(); i < N; i++) { os << "\t" << minstr.getOperand(i); From lattner at cs.uiuc.edu Tue Oct 29 11:36:08 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 11:36:08 2002 Subject: [llvm-commits] CVS: llvm/lib/Target/Sparc/EmitAssembly.cpp Message-ID: <200210291735.LAA07244@apoc.cs.uiuc.edu> Changes in directory llvm/lib/Target/Sparc: EmitAssembly.cpp updated: 1.68 -> 1.69 --- Log message: (null) --- Diffs of the changes: Index: llvm/lib/Target/Sparc/EmitAssembly.cpp diff -u llvm/lib/Target/Sparc/EmitAssembly.cpp:1.68 llvm/lib/Target/Sparc/EmitAssembly.cpp:1.69 --- llvm/lib/Target/Sparc/EmitAssembly.cpp:1.68 Mon Oct 28 14:01:13 2002 +++ llvm/lib/Target/Sparc/EmitAssembly.cpp Tue Oct 29 11:35:41 2002 @@ -440,10 +440,10 @@ { unsigned Opcode = MI->getOpCode(); - if (TargetInstrDescriptors[Opcode].iclass & M_DUMMY_PHI_FLAG) + if (Target.getInstrInfo().isDummyPhiInstr(Opcode)); return; // IGNORE PHI NODES - toAsm << "\t" << TargetInstrDescriptors[Opcode].opCodeString << "\t"; + toAsm << "\t" << Target.getInstrInfo().getName(Opcode) << "\t"; unsigned Mask = getOperandMask(Opcode); From lattner at cs.uiuc.edu Tue Oct 29 11:38:00 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 11:38:00 2002 Subject: [llvm-commits] CVS: llvm/lib/Target/MachineInstrInfo.cpp MachineSchedInfo.cpp Message-ID: <200210291737.LAA07314@apoc.cs.uiuc.edu> Changes in directory llvm/lib/Target: MachineInstrInfo.cpp updated: 1.2 -> 1.3 MachineSchedInfo.cpp updated: 1.7 -> 1.8 --- Log message: Move TargetInstrDescriptors to MachineInstrInfo.cpp --- Diffs of the changes: Index: llvm/lib/Target/MachineInstrInfo.cpp diff -u llvm/lib/Target/MachineInstrInfo.cpp:1.2 llvm/lib/Target/MachineInstrInfo.cpp:1.3 --- llvm/lib/Target/MachineInstrInfo.cpp:1.2 Tue Oct 29 09:45:18 2002 +++ llvm/lib/Target/MachineInstrInfo.cpp Tue Oct 29 11:37:48 2002 @@ -9,6 +9,12 @@ #include "llvm/Constant.h" #include "llvm/DerivedTypes.h" +// External object describing the machine instructions +// Initialized only when the TargetMachine class is created +// and reset when that class is destroyed. +// +const MachineInstrDescriptor* TargetInstrDescriptors = 0; + //--------------------------------------------------------------------------- // class MachineInstructionInfo // Interface to description of machine instructions Index: llvm/lib/Target/MachineSchedInfo.cpp diff -u llvm/lib/Target/MachineSchedInfo.cpp:1.7 llvm/lib/Target/MachineSchedInfo.cpp:1.8 --- llvm/lib/Target/MachineSchedInfo.cpp:1.7 Sun Oct 27 22:59:43 2002 +++ llvm/lib/Target/MachineSchedInfo.cpp Tue Oct 29 11:37:48 2002 @@ -8,12 +8,6 @@ #include "llvm/Target/MachineSchedInfo.h" #include "llvm/Target/TargetMachine.h" -// External object describing the machine instructions -// Initialized only when the TargetMachine class is created -// and reset when that class is destroyed. -// -const MachineInstrDescriptor* TargetInstrDescriptors = 0; - resourceId_t MachineResource::nextId = 0; // Check if fromRVec and toRVec have *any* common entries. From lattner at cs.uiuc.edu Tue Oct 29 11:41:00 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 11:41:00 2002 Subject: [llvm-commits] CVS: llvm/include/llvm/Target/MachineInstrInfo.h Message-ID: <200210291740.LAA07771@apoc.cs.uiuc.edu> Changes in directory llvm/include/llvm/Target: MachineInstrInfo.h updated: 1.31 -> 1.32 --- Log message: Move TargetInstrDescriptors extern to the one .cpp file that refers to it: MachineInstr.cpp --- Diffs of the changes: Index: llvm/include/llvm/Target/MachineInstrInfo.h diff -u llvm/include/llvm/Target/MachineInstrInfo.h:1.31 llvm/include/llvm/Target/MachineInstrInfo.h:1.32 --- llvm/include/llvm/Target/MachineInstrInfo.h:1.31 Tue Oct 29 11:35:09 2002 +++ llvm/include/llvm/Target/MachineInstrInfo.h Tue Oct 29 11:40:28 2002 @@ -29,16 +29,6 @@ const MachineOpCode INVALID_MACHINE_OPCODE = -1; -// Global variable holding an array of descriptors for machine instructions. -// The actual object needs to be created separately for each target machine. -// This variable is initialized and reset by class MachineInstrInfo. -// -// FIXME: This should be a property of the target so that more than one target -// at a time can be active... -// -extern const MachineInstrDescriptor *TargetInstrDescriptors; - - //--------------------------------------------------------------------------- // struct MachineInstrDescriptor: // Predefined information about each machine instruction. From lattner at cs.uiuc.edu Tue Oct 29 11:41:03 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 11:41:03 2002 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/MachineInstr.cpp Message-ID: <200210291740.LAA07778@apoc.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen: MachineInstr.cpp updated: 1.56 -> 1.57 --- Log message: Move TargetInstrDescriptors extern to the one .cpp file that refers to it: MachineInstr.cpp --- Diffs of the changes: Index: llvm/lib/CodeGen/MachineInstr.cpp diff -u llvm/lib/CodeGen/MachineInstr.cpp:1.56 llvm/lib/CodeGen/MachineInstr.cpp:1.57 --- llvm/lib/CodeGen/MachineInstr.cpp:1.56 Tue Oct 29 11:35:39 2002 +++ llvm/lib/CodeGen/MachineInstr.cpp Tue Oct 29 11:40:30 2002 @@ -7,6 +7,14 @@ #include "llvm/Target/MachineInstrInfo.h" // FIXME: shouldn't need this! using std::cerr; +// Global variable holding an array of descriptors for machine instructions. +// The actual object needs to be created separately for each target machine. +// This variable is initialized and reset by class MachineInstrInfo. +// +// FIXME: This should be a property of the target so that more than one target +// at a time can be active... +// +extern const MachineInstrDescriptor *TargetInstrDescriptors; // Constructor for instructions with fixed #operands (nearly all) MachineInstr::MachineInstr(MachineOpCode _opCode) From lattner at cs.uiuc.edu Tue Oct 29 11:44:01 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 11:44:01 2002 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86InstructionInfo.h Message-ID: <200210291743.LAA07906@apoc.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: X86InstructionInfo.h updated: 1.2 -> 1.3 --- Log message: Implement MachineInstrInfo interface --- Diffs of the changes: Index: llvm/lib/Target/X86/X86InstructionInfo.h diff -u llvm/lib/Target/X86/X86InstructionInfo.h:1.2 llvm/lib/Target/X86/X86InstructionInfo.h:1.3 --- llvm/lib/Target/X86/X86InstructionInfo.h:1.2 Mon Oct 28 17:55:19 2002 +++ llvm/lib/Target/X86/X86InstructionInfo.h Tue Oct 29 11:42:56 2002 @@ -7,10 +7,10 @@ #ifndef X86INSTRUCTIONINFO_H #define X86INSTRUCTIONINFO_H -#include "llvm/Target/InstructionInfo.h" +#include "llvm/Target/MachineInstrInfo.h" #include "X86RegisterInfo.h" -class X86InstructionInfo : public MInstructionInfo { +class X86InstructionInfo : public MachineInstrInfo { const X86RegisterInfo RI; public: X86InstructionInfo(); @@ -23,7 +23,55 @@ /// print - Print out an x86 instruction in GAS syntax /// - virtual void print(const MInstruction *MI, std::ostream &O) const; + virtual void print(const MachineInstr *MI, std::ostream &O) const; + + + //===--------------------------------------------------------------------===// + // + // These are stubs for pure virtual methods that should be factored out of + // MachineInstrInfo. We never call them, we don't want them, but we need + // stubs so that we can instatiate our class. + // + MachineOpCode getNOPOpCode() const { abort(); } + void CreateCodeToLoadConst(const TargetMachine& target, Function* F, + Value *V, Instruction *I, + std::vector& mvec, + MachineCodeForInstruction& mcfi) const { abort(); } + void CreateCodeToCopyIntToFloat(const TargetMachine& target, + Function* F, Value* val, Instruction* dest, + std::vector& mvec, + MachineCodeForInstruction& mcfi) const { + abort(); + } + void CreateCodeToCopyFloatToInt(const TargetMachine& target, Function* F, + Value* val, Instruction* dest, + std::vector& mvec, + MachineCodeForInstruction& mcfi)const { + abort(); + } + void CreateCopyInstructionsByType(const TargetMachine& target, + Function* F, Value* src, + Instruction* dest, + std::vector& mvec, + MachineCodeForInstruction& mcfi)const { + abort(); + } + + void CreateSignExtensionInstructions(const TargetMachine& target, + Function* F, Value* srcVal, + Value* destVal, unsigned numLowBits, + std::vector& mvec, + MachineCodeForInstruction& mcfi) const { + abort(); + } + + void CreateZeroExtensionInstructions(const TargetMachine& target, + Function* F, Value* srcVal, + Value* destVal, unsigned srcSizeInBits, + std::vector& mvec, + MachineCodeForInstruction& mcfi) const { + abort(); + } }; From lattner at cs.uiuc.edu Tue Oct 29 11:44:04 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 11:44:04 2002 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86InstructionInfo.def Message-ID: <200210291743.LAA07915@apoc.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: X86InstructionInfo.def updated: 1.2 -> 1.3 --- Log message: Switch to different flag set --- Diffs of the changes: Index: llvm/lib/Target/X86/X86InstructionInfo.def diff -u llvm/lib/Target/X86/X86InstructionInfo.def:1.2 llvm/lib/Target/X86/X86InstructionInfo.def:1.3 --- llvm/lib/Target/X86/X86InstructionInfo.def:1.2 Sun Oct 27 15:16:44 2002 +++ llvm/lib/Target/X86/X86InstructionInfo.def Tue Oct 29 11:42:40 2002 @@ -29,7 +29,7 @@ I(NOOP , "nop", 0, 0) // nop 90 // Miscellaneous instructions -I(RET , "ret", MIF::RET, 0) // ret CB +I(RET , "ret", M_RET_FLAG, 0) // ret CB // Move instructions I(MOVir8 , "movb", 0, 0) // R = imm8 B0+ rb From lattner at cs.uiuc.edu Tue Oct 29 11:44:06 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 11:44:06 2002 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86InstructionInfo.cpp Message-ID: <200210291744.LAA07946@apoc.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: X86InstructionInfo.cpp updated: 1.1 -> 1.2 --- Log message: Implement MachineInstrInfo interface --- Diffs of the changes: Index: llvm/lib/Target/X86/X86InstructionInfo.cpp diff -u llvm/lib/Target/X86/X86InstructionInfo.cpp:1.1 llvm/lib/Target/X86/X86InstructionInfo.cpp:1.2 --- llvm/lib/Target/X86/X86InstructionInfo.cpp:1.1 Fri Oct 25 17:55:53 2002 +++ llvm/lib/Target/X86/X86InstructionInfo.cpp Tue Oct 29 11:43:19 2002 @@ -5,25 +5,26 @@ //===----------------------------------------------------------------------===// #include "X86InstructionInfo.h" -#include "llvm/CodeGen/MInstruction.h" -#include +#include "llvm/CodeGen/MachineInstr.h" +#include // X86Insts - Turn the InstructionInfo.def file into a bunch of instruction // descriptors // -static const MInstructionDesc X86Insts[] = { -#define I(ENUM, NAME, FLAGS, TSFLAGS) { NAME, FLAGS, TSFLAGS }, +static const MachineInstrDescriptor X86Insts[] = { +#define I(ENUM, NAME, FLAGS, TSFLAGS) \ + { NAME, -1, -1, 0, false, 0, 0, TSFLAGS, FLAGS }, #include "X86InstructionInfo.def" }; X86InstructionInfo::X86InstructionInfo() - : MInstructionInfo(X86Insts, sizeof(X86Insts)/sizeof(X86Insts[0])) { + : MachineInstrInfo(X86Insts, sizeof(X86Insts)/sizeof(X86Insts[0]), 0) { } // print - Print out an x86 instruction in GAS syntax -void X86InstructionInfo::print(const MInstruction *MI, std::ostream &O) const { +void X86InstructionInfo::print(const MachineInstr *MI, std::ostream &O) const { // FIXME: This sucks. - O << get(MI->getOpcode()).Name << "\n"; + O << getName(MI->getOpCode()) << "\n"; } From lattner at cs.uiuc.edu Tue Oct 29 11:45:01 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 11:45:01 2002 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/InstSelectSimple.cpp Message-ID: <200210291744.LAA07954@apoc.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: InstSelectSimple.cpp updated: 1.3 -> 1.4 --- Log message: Switch to generating machineinstr's instead of MInstructions --- Diffs of the changes: Index: llvm/lib/Target/X86/InstSelectSimple.cpp diff -u llvm/lib/Target/X86/InstSelectSimple.cpp:1.3 llvm/lib/Target/X86/InstSelectSimple.cpp:1.4 --- llvm/lib/Target/X86/InstSelectSimple.cpp:1.3 Sun Oct 27 15:23:43 2002 +++ llvm/lib/Target/X86/InstSelectSimple.cpp Tue Oct 29 11:43:55 2002 @@ -10,20 +10,20 @@ #include "llvm/iTerminators.h" #include "llvm/Type.h" #include "llvm/Constants.h" -#include "llvm/CodeGen/MFunction.h" -#include "llvm/CodeGen/MInstBuilder.h" +#include "llvm/CodeGen/MachineFunction.h" +#include "llvm/CodeGen/MachineInstrBuilder.h" #include "llvm/Support/InstVisitor.h" #include namespace { - struct ISel : public InstVisitor { // eventually will be a FunctionPass - MFunction *F; // The function we are compiling into - MBasicBlock *BB; // The current basic block we are compiling + struct ISel : public InstVisitor { // eventually will be a FunctionPass + MachineFunction *F; // The function we are compiling into + MachineBasicBlock *BB; // The current MBB we are compiling unsigned CurReg; std::map RegMap; // Mapping between Val's and SSA Regs - ISel(MFunction *f) + ISel(MachineFunction *f) : F(f), BB(0), CurReg(MRegisterInfo::FirstVirtualRegister) {} /// runOnFunction - Top level implementation of instruction selection for @@ -41,7 +41,7 @@ /// invoked for all instructions in the basic block. /// void visitBasicBlock(BasicBlock &LLVM_BB) { - BB = new MBasicBlock(); + BB = new MachineBasicBlock(); // FIXME: Use the auto-insert form when it's available F->getBasicBlockList().push_back(BB); } @@ -94,22 +94,22 @@ switch (C->getType()->getPrimitiveID()) { case Type::SByteTyID: - BuildMInst(BB, X86::MOVir8, R).addSImm(cast(C)->getValue()); + BuildMI(BB, X86::MOVir8, R).addSImm(cast(C)->getValue()); break; case Type::UByteTyID: - BuildMInst(BB, X86::MOVir8, R).addZImm(cast(C)->getValue()); + BuildMI(BB, X86::MOVir8, R).addZImm(cast(C)->getValue()); break; case Type::ShortTyID: - BuildMInst(BB, X86::MOVir16, R).addSImm(cast(C)->getValue()); + BuildMI(BB, X86::MOVir16, R).addSImm(cast(C)->getValue()); break; case Type::UShortTyID: - BuildMInst(BB, X86::MOVir16, R).addZImm(cast(C)->getValue()); + BuildMI(BB, X86::MOVir16, R).addZImm(cast(C)->getValue()); break; case Type::IntTyID: - BuildMInst(BB, X86::MOVir32, R).addSImm(cast(C)->getValue()); + BuildMI(BB, X86::MOVir32, R).addSImm(cast(C)->getValue()); break; case Type::UIntTyID: - BuildMInst(BB, X86::MOVir32, R).addZImm(cast(C)->getValue()); + BuildMI(BB, X86::MOVir32, R).addZImm(cast(C)->getValue()); break; default: assert(0 && "Type not handled yet!"); } @@ -135,7 +135,7 @@ // Emit a simple 'ret' instruction... appending it to the end of the basic // block - new MInstruction(BB, X86::RET); + BuildMI(BB, X86::RET, 0); } @@ -146,13 +146,13 @@ switch (B.getType()->getPrimitiveSize()) { case 1: // UByte, SByte - BuildMInst(BB, X86::ADDrr8, DestReg).addReg(Op0r).addReg(Op1r); + BuildMI(BB, X86::ADDrr8, DestReg).addReg(Op0r).addReg(Op1r); break; case 2: // UShort, Short - BuildMInst(BB, X86::ADDrr16, DestReg).addReg(Op0r).addReg(Op1r); + BuildMI(BB, X86::ADDrr16, DestReg).addReg(Op0r).addReg(Op1r); break; case 4: // UInt, Int - BuildMInst(BB, X86::ADDrr32, DestReg).addReg(Op0r).addReg(Op1r); + BuildMI(BB, X86::ADDrr32, DestReg).addReg(Op0r).addReg(Op1r); break; case 8: // ULong, Long @@ -167,8 +167,8 @@ /// a machine code representation is a very simple peep-hole fashion. The /// generated code sucks but the implementation is nice and simple. /// -MFunction *X86SimpleInstructionSelection(Function &F) { - MFunction *Result = new MFunction(); +MachineFunction *X86SimpleInstructionSelection(Function &F, TargetMachine &TM) { + MachineFunction *Result = new MachineFunction(&F, TM); ISel(Result).runOnFunction(F); return Result; } From lattner at cs.uiuc.edu Tue Oct 29 11:45:04 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 11:45:04 2002 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86.h Message-ID: <200210291744.LAA07973@apoc.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: X86.h updated: 1.2 -> 1.3 --- Log message: Be compatible with sparc backend --- Diffs of the changes: Index: llvm/lib/Target/X86/X86.h diff -u llvm/lib/Target/X86/X86.h:1.2 llvm/lib/Target/X86/X86.h:1.3 --- llvm/lib/Target/X86/X86.h:1.2 Mon Oct 28 17:55:19 2002 +++ llvm/lib/Target/X86/X86.h Tue Oct 29 11:43:38 2002 @@ -13,6 +13,7 @@ #include class MachineFunction; class Function; +class TargetMachine; /// X86PrintCode - Print out the specified machine code function to the /// specified stream. This function should work regardless of whether or not @@ -24,7 +25,7 @@ /// a machine code representation is a very simple peep-hole fashion. The /// generated code sucks but the implementation is nice and simple. /// -MachineFunction *X86SimpleInstructionSelection(Function &F); +MachineFunction *X86SimpleInstructionSelection(Function &F, TargetMachine &TM); /// X86SimpleRegisterAllocation - This function converts the specified machine /// code function from SSA form to use explicit registers by spilling every From vadve at cs.uiuc.edu Tue Oct 29 13:38:01 2002 From: vadve at cs.uiuc.edu (Vikram Adve) Date: Tue Oct 29 13:38:01 2002 Subject: [llvm-commits] CVS: llvm/lib/Target/Sparc/SparcInstrSelection.cpp Message-ID: <200210291937.NAA04408@psmith.cs.uiuc.edu> Changes in directory llvm/lib/Target/Sparc: SparcInstrSelection.cpp updated: 1.79 -> 1.80 --- Log message: Bug fix: align size for dynamic allocas according to stack pointer alignment restrictions. This is incomplete for one case. --- Diffs of the changes: Index: llvm/lib/Target/Sparc/SparcInstrSelection.cpp diff -u llvm/lib/Target/Sparc/SparcInstrSelection.cpp:1.79 llvm/lib/Target/Sparc/SparcInstrSelection.cpp:1.80 --- llvm/lib/Target/Sparc/SparcInstrSelection.cpp:1.79 Mon Oct 28 14:11:17 2002 +++ llvm/lib/Target/Sparc/SparcInstrSelection.cpp Tue Oct 29 13:37:31 2002 @@ -833,38 +833,65 @@ Value* numElementsVal, vector& getMvec) { + Value* totalSizeVal; MachineInstr* M; MachineCodeForInstruction& mcfi = MachineCodeForInstruction::get(result); + Function *F = result->getParent()->getParent(); - // Create a Value to hold the (constant) element size - Value* tsizeVal = ConstantSInt::get(Type::IntTy, tsize); + // Enforce the alignment constraints on the stack pointer at + // compile time if the total size is a known constant. + if (isa(numElementsVal)) + { + bool isValid; + int64_t numElem = GetConstantValueAsSignedInt(numElementsVal, isValid); + assert(isValid && "Unexpectedly large array dimension in alloca!"); + int64_t total = numElem * tsize; + if (int extra= total % target.getFrameInfo().getStackFrameSizeAlignment()) + total += target.getFrameInfo().getStackFrameSizeAlignment() - extra; + totalSizeVal = ConstantSInt::get(Type::IntTy, total); + } + else + { + // The size is not a constant. Generate code to compute it and + // code to pad the size for stack alignment. + // Create a Value to hold the (constant) element size + Value* tsizeVal = ConstantSInt::get(Type::IntTy, tsize); + + // Create temporary values to hold the result of MUL, SLL, SRL + // THIS CASE IS INCOMPLETE AND WILL BE FIXED SHORTLY. + TmpInstruction* tmpProd = new TmpInstruction(numElementsVal, tsizeVal); + TmpInstruction* tmpSLL = new TmpInstruction(numElementsVal, tmpProd); + TmpInstruction* tmpSRL = new TmpInstruction(numElementsVal, tmpSLL); + mcfi.addTemp(tmpProd); + mcfi.addTemp(tmpSLL); + mcfi.addTemp(tmpSRL); + + // Instruction 1: mul numElements, typeSize -> tmpProd + // This will optimize the MUL as far as possible. + CreateMulInstruction(target, F, numElementsVal, tsizeVal, tmpProd,getMvec, + mcfi, INVALID_MACHINE_OPCODE); + + assert(0 && "Need to insert padding instructions here!"); + + totalSizeVal = tmpProd; + } // Get the constant offset from SP for dynamically allocated storage // and create a temporary Value to hold it. - assert(result && result->getParent() && "Result value is not part of a fn?"); - Function *F = result->getParent()->getParent(); MachineFunction& mcInfo = MachineFunction::get(F); bool growUp; ConstantSInt* dynamicAreaOffset = ConstantSInt::get(Type::IntTy, - target.getFrameInfo().getDynamicAreaOffset(mcInfo,growUp)); + target.getFrameInfo().getDynamicAreaOffset(mcInfo,growUp)); assert(! growUp && "Has SPARC v9 stack frame convention changed?"); - // Create a temporary value to hold the result of MUL - TmpInstruction* tmpProd = new TmpInstruction(numElementsVal, tsizeVal); - mcfi.addTemp(tmpProd); - - // Instruction 1: mul numElements, typeSize -> tmpProd - CreateMulInstruction(target, F, numElementsVal, tsizeVal, tmpProd, getMvec, - mcfi, INVALID_MACHINE_OPCODE); - - // Instruction 2: sub %sp, tmpProd -> %sp + // Instruction 2: sub %sp, totalSizeVal -> %sp M = new MachineInstr(SUB); M->SetMachineOperandReg(0, target.getRegInfo().getStackPointer()); - M->SetMachineOperandVal(1, MachineOperand::MO_VirtualRegister, tmpProd); + M->SetMachineOperandVal(1, MachineOperand::MO_VirtualRegister, totalSizeVal); M->SetMachineOperandReg(2, target.getRegInfo().getStackPointer()); getMvec.push_back(M); - + // Instruction 3: add %sp, frameSizeBelowDynamicArea -> result M = new MachineInstr(ADD); M->SetMachineOperandReg(0, target.getRegInfo().getStackPointer()); @@ -1991,11 +2018,12 @@ bool isVarArgs = funcType->isVarArg(); bool noPrototype = isVarArgs && funcType->getNumParams() == 0; - // Use an annotation to pass information about call arguments - // to the register allocator. + // Use a descriptor to pass information about call arguments + // to the register allocator. This descriptor will be "owned" + // and freed automatically when the MachineCodeForInstruction + // object for the callInstr goes away. CallArgsDescriptor* argDesc = new CallArgsDescriptor(callInstr, retAddrReg, isVarArgs, noPrototype); - M->addAnnotation(argDesc); assert(callInstr->getOperand(0) == callee && "This is assumed in the loop below!"); From vadve at cs.uiuc.edu Tue Oct 29 13:39:00 2002 From: vadve at cs.uiuc.edu (Vikram Adve) Date: Tue Oct 29 13:39:00 2002 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/MachineCodeForInstruction.cpp Message-ID: <200210291938.NAA04427@psmith.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen: MachineCodeForInstruction.cpp updated: 1.6 -> 1.7 --- Log message: Move CallArgsDescriptor into this class instead of making it an annotation on the machine instruction. --- Diffs of the changes: Index: llvm/lib/CodeGen/MachineCodeForInstruction.cpp diff -u llvm/lib/CodeGen/MachineCodeForInstruction.cpp:1.6 llvm/lib/CodeGen/MachineCodeForInstruction.cpp:1.7 --- llvm/lib/CodeGen/MachineCodeForInstruction.cpp:1.6 Sun Oct 27 19:21:55 2002 +++ llvm/lib/CodeGen/MachineCodeForInstruction.cpp Tue Oct 29 13:38:33 2002 @@ -17,6 +17,7 @@ #include "llvm/CodeGen/MachineCodeForInstruction.h" #include "llvm/CodeGen/MachineInstr.h" +#include "llvm/CodeGen/MachineInstrAnnot.h" #include "llvm/CodeGen/InstrSelection.h" AnnotationID MCFI_AID( @@ -55,4 +56,8 @@ // Free the MachineInstr objects allocated, if any. for (unsigned i=0, N = size(); i < N; i++) delete (*this)[i]; + + // Free the CallArgsDescriptor if it exists. + if (callArgsDesc) + delete callArgsDesc; } From vadve at cs.uiuc.edu Tue Oct 29 13:39:03 2002 From: vadve at cs.uiuc.edu (Vikram Adve) Date: Tue Oct 29 13:39:03 2002 Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineCodeForInstruction.h Message-ID: <200210291938.NAA04436@psmith.cs.uiuc.edu> Changes in directory llvm/include/llvm/CodeGen: MachineCodeForInstruction.h updated: 1.5 -> 1.6 --- Log message: Move CallArgsDescriptor into this class instead of making it an annotation on the machine instruction. --- Diffs of the changes: Index: llvm/include/llvm/CodeGen/MachineCodeForInstruction.h diff -u llvm/include/llvm/CodeGen/MachineCodeForInstruction.h:1.5 llvm/include/llvm/CodeGen/MachineCodeForInstruction.h:1.6 --- llvm/include/llvm/CodeGen/MachineCodeForInstruction.h:1.5 Sun Oct 27 19:27:30 2002 +++ llvm/include/llvm/CodeGen/MachineCodeForInstruction.h Tue Oct 29 13:38:46 2002 @@ -23,12 +23,14 @@ class MachineInstr; class Instruction; class Value; +class CallArgsDescriptor; extern AnnotationID MCFI_AID; class MachineCodeForInstruction : public Annotation { - std::vector tempVec; // used by m/c instr but not VM instr - std::vector Contents; + std::vector tempVec; // used by m/c instr but not VM instr + std::vector Contents; // the machine instr for this VM instr + CallArgsDescriptor* callArgsDesc; // only used for CALL instructions public: MachineCodeForInstruction() : Annotation(MCFI_AID) {} ~MachineCodeForInstruction(); @@ -81,6 +83,9 @@ tempVec.push_back(tmp); return *this; } + + void setCallArgsDescriptor(CallArgsDescriptor* desc) { callArgsDesc = desc; } + CallArgsDescriptor* getCallArgsDescriptor() const { return callArgsDesc; } }; #endif From vadve at cs.uiuc.edu Tue Oct 29 13:41:01 2002 From: vadve at cs.uiuc.edu (Vikram Adve) Date: Tue Oct 29 13:41:01 2002 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/MachineInstr.cpp MachineInstrAnnot.cpp Message-ID: <200210291940.NAA04461@psmith.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen: MachineInstr.cpp updated: 1.57 -> 1.58 MachineInstrAnnot.cpp updated: 1.4 -> 1.5 --- Log message: Remove separate vector of implicit refs from MachineInstr, and instead record them as extra operands in the operands[] vector. Also, move CallArgsDescriptor into this class instead of making it an annotation on the machine instruction. --- Diffs of the changes: Index: llvm/lib/CodeGen/MachineInstr.cpp diff -u llvm/lib/CodeGen/MachineInstr.cpp:1.57 llvm/lib/CodeGen/MachineInstr.cpp:1.58 --- llvm/lib/CodeGen/MachineInstr.cpp:1.57 Tue Oct 29 11:40:30 2002 +++ llvm/lib/CodeGen/MachineInstr.cpp Tue Oct 29 13:40:17 2002 @@ -19,24 +19,33 @@ // Constructor for instructions with fixed #operands (nearly all) MachineInstr::MachineInstr(MachineOpCode _opCode) : opCode(_opCode), - operands(TargetInstrDescriptors[_opCode].numOperands, MachineOperand()) { + operands(TargetInstrDescriptors[_opCode].numOperands, MachineOperand()), + numImplicitRefs(0) +{ assert(TargetInstrDescriptors[_opCode].numOperands >= 0); } // Constructor for instructions with variable #operands MachineInstr::MachineInstr(MachineOpCode OpCode, unsigned numOperands) - : opCode(OpCode), operands(numOperands, MachineOperand()) { + : opCode(OpCode), + operands(numOperands, MachineOperand()), + numImplicitRefs(0) +{ } MachineInstr::MachineInstr(MachineOpCode Opcode, unsigned numOperands, - bool XX, bool YY) : opCode(Opcode) { + bool XX, bool YY) + : opCode(Opcode), + numImplicitRefs(0) +{ operands.reserve(numOperands); } // OperandComplete - Return true if it's illegal to add a new operand -bool MachineInstr::OperandsComplete() const { +bool MachineInstr::OperandsComplete() const +{ int NumOperands = TargetInstrDescriptors[opCode].numOperands; - if (NumOperands >= 0 && operands.size() >= (unsigned)NumOperands) + if (NumOperands >= 0 && getNumOperands() >= (unsigned)NumOperands) return true; // Broken! return false; } @@ -47,7 +56,10 @@ // This only resets the size of the operand vector and initializes it. // The new operands must be set explicitly later. // -void MachineInstr::replace(MachineOpCode Opcode, unsigned numOperands) { +void MachineInstr::replace(MachineOpCode Opcode, unsigned numOperands) +{ + assert(getNumImplicitRefs() == 0 && + "This is probably broken because implicit refs are going to be lost."); opCode = Opcode; operands.clear(); operands.resize(numOperands, MachineOperand()); @@ -60,7 +72,7 @@ bool isdef, bool isDefAndUse) { - assert(i < operands.size()); + assert(i < operands.size()); // may be explicit or implicit op operands[i].opType = opType; operands[i].value = V; operands[i].regNum = -1; @@ -77,7 +89,7 @@ MachineOperand::MachineOperandType operandType, int64_t intValue) { - assert(i < operands.size()); + assert(i < getNumOperands()); // must be explicit op assert(TargetInstrDescriptors[opCode].resultPos != (int) i && "immed. constant cannot be defined"); @@ -92,7 +104,7 @@ MachineInstr::SetMachineOperandReg(unsigned i, int regNum, bool isdef) { - assert(i < operands.size()); + assert(i < getNumOperands()); // must be explicit op operands[i].opType = MachineOperand::MO_MachineRegister; operands[i].value = NULL; @@ -107,6 +119,7 @@ void MachineInstr::SetRegForOperand(unsigned i, int regNum) { + assert(i < getNumOperands()); // must be explicit op operands[i].setRegForValue(regNum); insertUsedReg(regNum); } @@ -129,11 +142,11 @@ } // Subsitute implicit refs - for (unsigned i=0, N=implicitRefs.size(); i < N; ++i) + for (unsigned i=0, N=getNumImplicitRefs(); i < N; ++i) if (getImplicitRef(i) == oldVal) if (!defsOnly || implicitRefIsDefined(i)) { - implicitRefs[i].Val = newVal; + getImplicitOp(i).value = newVal; ++numSubst; } Index: llvm/lib/CodeGen/MachineInstrAnnot.cpp diff -u llvm/lib/CodeGen/MachineInstrAnnot.cpp:1.4 llvm/lib/CodeGen/MachineInstrAnnot.cpp:1.5 --- llvm/lib/CodeGen/MachineInstrAnnot.cpp:1.4 Sun Oct 27 20:28:34 2002 +++ llvm/lib/CodeGen/MachineInstrAnnot.cpp Tue Oct 29 13:40:17 2002 @@ -6,18 +6,17 @@ //===----------------------------------------------------------------------===// #include "llvm/CodeGen/MachineInstrAnnot.h" -#include "llvm/Annotation.h" +#include "llvm/CodeGen/InstrSelection.h" +#include "llvm/CodeGen/InstrSelectionSupport.h" +#include "llvm/CodeGen/MachineCodeForInstruction.h" #include "llvm/iOther.h" #include "llvm/Type.h" -AnnotationID CallArgsDescriptor::AID(AnnotationManager:: - getID("CodeGen::CallArgsDescriptor")); CallArgsDescriptor::CallArgsDescriptor(const CallInst* _callInstr, TmpInstruction* _retAddrReg, bool _isVarArgs, bool _noPrototype) - : Annotation(AID), - callInstr(_callInstr), + : callInstr(_callInstr), funcPtr(isa(_callInstr->getCalledValue()) ? NULL : _callInstr->getCalledValue()), retAddrReg(_retAddrReg), @@ -30,6 +29,10 @@ && "Operand 0 is ignored in the loop below!"); for (unsigned int i=1; i < numArgs; ++i) argInfoVec.push_back(CallArgInfo(callInstr->getOperand(i))); + + // Enter this object in the MachineCodeForInstr object of the CallInst. + // This transfers ownership of this object. + MachineCodeForInstruction::get(callInstr).setCallArgsDescriptor(this); } @@ -37,4 +40,27 @@ CallArgsDescriptor::getReturnValue() const { return (callInstr->getType() == Type::VoidTy? NULL : callInstr); +} + + +// Mechanism to get the descriptor for a CALL MachineInstr. +// We get the LLVM CallInstr from the ret. addr. register argument +// of the CALL MachineInstr, then get the CallArgsDescriptor from the +// MachineCodeForInstruction object for the CallInstr. +// This is roundabout but avoids adding a new map or annotation just +// to keep track of CallArgsDescriptors. +// +CallArgsDescriptor *CallArgsDescriptor::get(const MachineInstr* MI) +{ + const TmpInstruction* retAddrReg = + cast(MI->getImplicitRef(MI->getNumImplicitRefs()-1)); + assert(retAddrReg->getNumOperands() == 1 && + isa(retAddrReg->getOperand(0)) && + "Order of implicit args of CALL instr. changed. FIX THIS CODE!"); + const CallInst* callInstr = cast(retAddrReg->getOperand(0)); + + CallArgsDescriptor* desc = + MachineCodeForInstruction::get(callInstr).getCallArgsDescriptor(); + assert(desc->getCallInst()==callInstr && "Incorrect call args descriptor?"); + return desc; } From vadve at cs.uiuc.edu Tue Oct 29 13:42:01 2002 From: vadve at cs.uiuc.edu (Vikram Adve) Date: Tue Oct 29 13:42:01 2002 Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h MachineInstrAnnot.h Message-ID: <200210291941.NAA04484@psmith.cs.uiuc.edu> Changes in directory llvm/include/llvm/CodeGen: MachineInstr.h updated: 1.79 -> 1.80 MachineInstrAnnot.h updated: 1.6 -> 1.7 --- Log message: Remove separate vector of implicit refs from MachineInstr, and instead record them as extra operands in the operands[] vector. Also, move CallArgsDescriptor into this class instead of making it an annotation on the machine instruction. --- Diffs of the changes: Index: llvm/include/llvm/CodeGen/MachineInstr.h diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.79 llvm/include/llvm/CodeGen/MachineInstr.h:1.80 --- llvm/include/llvm/CodeGen/MachineInstr.h:1.79 Mon Oct 28 15:17:14 2002 +++ llvm/include/llvm/CodeGen/MachineInstr.h Tue Oct 29 13:41:18 2002 @@ -89,21 +89,38 @@ // will be set for a value after reg allocation private: MachineOperand() - : immedVal(0), opType(MO_VirtualRegister), flags(0), regNum(-1) {} + : immedVal(0), + opType(MO_VirtualRegister), + flags(0), + regNum(-1) {} + MachineOperand(int64_t ImmVal, MachineOperandType OpTy) - : immedVal(ImmVal), opType(OpTy), flags(0), regNum(-1) {} + : immedVal(ImmVal), + opType(OpTy), + flags(0), + regNum(-1) {} + MachineOperand(int Reg, MachineOperandType OpTy, bool isDef = false) - : immedVal(0), opType(OpTy), flags(isDef ? DEFFLAG : 0), regNum(Reg) {} + : immedVal(0), + opType(OpTy), + flags(isDef ? DEFFLAG : 0), + regNum(Reg) {} + MachineOperand(Value *V, MachineOperandType OpTy, bool isDef = false, bool isDNU = false) - : value(V), opType(OpTy), regNum(-1) { + : value(V), + opType(OpTy), + regNum(-1) { flags = (isDef ? DEFFLAG : 0) | (isDNU ? DEFUSEFLAG : 0); } public: MachineOperand(const MachineOperand &M) - : immedVal(M.immedVal), opType(M.opType), flags(M.flags), regNum(M.regNum) { - } + : immedVal(M.immedVal), + opType(M.opType), + flags(M.flags), + regNum(M.regNum) {} + ~MachineOperand() {} // Accessor methods. Caller is responsible for checking the @@ -193,21 +210,20 @@ // a CALL (if any), and return value of a RETURN. //--------------------------------------------------------------------------- -class MachineInstr : public Annotable, // MachineInstrs are annotable - public NonCopyable { // Disable copy operations +class MachineInstr: public NonCopyable { // Disable copy operations + MachineOpCode opCode; // the opcode std::vector operands; // the operands + unsigned numImplicitRefs; // number of implicit operands - struct ImplicitRef { - Value *Val; - bool isDef, isDefAndUse; - - ImplicitRef(Value *V, bool D, bool DU) : Val(V), isDef(D), isDefAndUse(DU){} - }; - - // implicitRefs - Values implicitly referenced by this machine instruction - // (eg, call args) - std::vector implicitRefs; + MachineOperand& getImplicitOp(unsigned i) { + assert(i < numImplicitRefs && "implicit ref# out of range!"); + return operands[i + operands.size() - numImplicitRefs]; + } + const MachineOperand& getImplicitOp(unsigned i) const { + assert(i < numImplicitRefs && "implicit ref# out of range!"); + return operands[i + operands.size() - numImplicitRefs]; + } // regsUsed - all machine registers used for this instruction, including regs // used to save values across the instruction. This is a bitset of registers. @@ -215,6 +231,7 @@ // OperandComplete - Return true if it's illegal to add a new operand bool OperandsComplete() const; + public: MachineInstr(MachineOpCode Opcode); MachineInstr(MachineOpCode Opcode, unsigned numOperands); @@ -240,14 +257,14 @@ // // Information about explicit operands of the instruction // - unsigned getNumOperands() const { return operands.size(); } + unsigned getNumOperands() const { return operands.size() - numImplicitRefs; } const MachineOperand& getOperand(unsigned i) const { - assert(i < operands.size() && "getOperand() out of range!"); + assert(i < getNumOperands() && "getOperand() out of range!"); return operands[i]; } MachineOperand& getOperand(unsigned i) { - assert(i < operands.size() && "getOperand() out of range!"); + assert(i < getNumOperands() && "getOperand() out of range!"); return operands[i]; } @@ -262,40 +279,30 @@ bool operandIsDefinedAndUsed(unsigned i) const { return getOperand(i).opIsDefAndUse(); } - + // // Information about implicit operands of the instruction // - unsigned getNumImplicitRefs() const{ return implicitRefs.size();} + unsigned getNumImplicitRefs() const{ return numImplicitRefs; } const Value* getImplicitRef(unsigned i) const { - assert(i < implicitRefs.size() && "getImplicitRef() out of range!"); - return implicitRefs[i].Val; + return getImplicitOp(i).getVRegValue(); } Value* getImplicitRef(unsigned i) { - assert(i < implicitRefs.size() && "getImplicitRef() out of range!"); - return implicitRefs[i].Val; + return getImplicitOp(i).getVRegValue(); } bool implicitRefIsDefined(unsigned i) const { - assert(i < implicitRefs.size() && "implicitRefIsDefined() out of range!"); - return implicitRefs[i].isDef; + return getImplicitOp(i).opIsDef(); } bool implicitRefIsDefinedAndUsed(unsigned i) const { - assert(i < implicitRefs.size() && "implicitRefIsDef&Used() out of range!"); - return implicitRefs[i].isDefAndUse; - } - - void addImplicitRef(Value* V, bool isDef=false, bool isDefAndUse=false) { - implicitRefs.push_back(ImplicitRef(V, isDef, isDefAndUse)); + return getImplicitOp(i).opIsDefAndUse(); } - - void setImplicitRef(unsigned i, Value* V, bool isDef=false, - bool isDefAndUse=false) { - assert(i < implicitRefs.size() && "setImplicitRef() out of range!"); - implicitRefs[i] = ImplicitRef(V, isDef, isDefAndUse); - } - + inline void addImplicitRef (Value* V, + bool isDef=false,bool isDefAndUse=false); + inline void setImplicitRef (unsigned i, Value* V, + bool isDef=false, bool isDefAndUse=false); + // // Information about registers used in this instruction // @@ -316,22 +323,28 @@ // // Define iterators to access the Value operands of the Machine Instruction. + // Note that these iterators only enumerate the explicit operands. // begin() and end() are defined to produce these iterators... // template class ValOpIterator; typedef ValOpIterator const_val_op_iterator; typedef ValOpIterator< MachineInstr*, Value*> val_op_iterator; - // Access to set the operands when building the machine instruction // - void SetMachineOperandVal(unsigned i, - MachineOperand::MachineOperandType operandType, - Value* V, bool isDef=false, bool isDefAndUse=false); - void SetMachineOperandConst(unsigned i, - MachineOperand::MachineOperandType operandType, - int64_t intValue); - void SetMachineOperandReg(unsigned i, int regNum, bool isDef=false); + void SetMachineOperandVal (unsigned i, + MachineOperand::MachineOperandType operandType, + Value* V, + bool isDef=false, + bool isDefAndUse=false); + + void SetMachineOperandConst (unsigned i, + MachineOperand::MachineOperandType operandType, + int64_t intValue); + + void SetMachineOperandReg (unsigned i, + int regNum, + bool isDef=false); //===--------------------------------------------------------------------===// // Accessors to add operands when building up machine instructions @@ -418,9 +431,9 @@ void skipToNextVal() { while (i < MI->getNumOperands() && - !((MI->getOperandType(i) == MachineOperand::MO_VirtualRegister || - MI->getOperandType(i) == MachineOperand::MO_CCRegister) - && MI->getOperand(i).getVRegValue() != 0)) + !( (MI->getOperandType(i) == MachineOperand::MO_VirtualRegister || + MI->getOperandType(i) == MachineOperand::MO_CCRegister) + && MI->getOperand(i).getVRegValue() != 0)) ++i; } @@ -473,14 +486,39 @@ } }; + +// Define here to enable inlining of the functions used. +// +void MachineInstr::addImplicitRef(Value* V, + bool isDef, + bool isDefAndUse) +{ + ++numImplicitRefs; + addRegOperand(V, isDef, isDefAndUse); +} + +void MachineInstr::setImplicitRef(unsigned i, + Value* V, + bool isDef, + bool isDefAndUse) +{ + assert(i < getNumImplicitRefs() && "setImplicitRef() out of range!"); + SetMachineOperandVal(i + getNumImplicitRefs(), + MachineOperand::MO_VirtualRegister, + V, isDef, isDefAndUse); +} + + //--------------------------------------------------------------------------- // Debugging Support //--------------------------------------------------------------------------- -std::ostream& operator<<(std::ostream& os, const MachineInstr& minstr); +std::ostream& operator<< (std::ostream& os, + const MachineInstr& minstr); -std::ostream& operator<<(std::ostream& os, const MachineOperand& mop); +std::ostream& operator<< (std::ostream& os, + const MachineOperand& mop); -void PrintMachineInstructions(const Function *F); +void PrintMachineInstructions (const Function *F); #endif Index: llvm/include/llvm/CodeGen/MachineInstrAnnot.h diff -u llvm/include/llvm/CodeGen/MachineInstrAnnot.h:1.6 llvm/include/llvm/CodeGen/MachineInstrAnnot.h:1.7 --- llvm/include/llvm/CodeGen/MachineInstrAnnot.h:1.6 Sat Sep 28 12:03:54 2002 +++ llvm/include/llvm/CodeGen/MachineInstrAnnot.h Tue Oct 29 13:41:18 2002 @@ -7,7 +7,6 @@ #ifndef MACHINE_INSTR_ANNOT_h #define MACHINE_INSTR_ANNOT_h -#include "llvm/Annotation.h" #include "llvm/CodeGen/MachineInstr.h" class Value; @@ -50,8 +49,8 @@ }; -class CallArgsDescriptor: public Annotation { // Annotation for a MachineInstr - static AnnotationID AID; // AnnotationID for this class +class CallArgsDescriptor { + std::vector argInfoVec; // Descriptor for each argument const CallInst* callInstr; // The call instruction == result value const Value* funcPtr; // Pointer for indirect calls @@ -68,18 +67,16 @@ unsigned int getNumArgs() const { return argInfoVec.size(); } CallArgInfo& getArgInfo(unsigned int op) { assert(op < argInfoVec.size()); return argInfoVec[op]; } + const CallInst* getCallInst() const { return callInstr; } const CallInst* getReturnValue() const; const Value* getIndirectFuncPtr() const { return funcPtr; } TmpInstruction* getReturnAddrReg() const { return retAddrReg; } bool isVarArgsFunc() const { return isVarArgs; } bool hasNoPrototype() const { return noPrototype; } - // Annotation mechanism to annotate a MachineInstr with the descriptor. - // This is not demand-driven because annotations can only be created - // at restricted points during code generation. - static inline CallArgsDescriptor *get(const MachineInstr* MI) { - return (CallArgsDescriptor *) MI->getAnnotation(AID); - } + // Mechanism to get the descriptor for a CALL MachineInstr. + // + static CallArgsDescriptor *get(const MachineInstr* MI); }; From lattner at cs.uiuc.edu Tue Oct 29 14:08:02 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 14:08:02 2002 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/MFunction.cpp Message-ID: <200210292007.OAA08188@apoc.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen: MFunction.cpp (r1.1) removed --- Log message: X86 merge is complete, eliminate unused code --- Diffs of the changes: From lattner at cs.uiuc.edu Tue Oct 29 14:08:08 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 14:08:08 2002 Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/MFunction.h Message-ID: <200210292007.OAA08207@apoc.cs.uiuc.edu> Changes in directory llvm/include/llvm/CodeGen: MFunction.h (r1.1) removed --- Log message: X86 merge is complete, eliminate unused code --- Diffs of the changes: From lattner at cs.uiuc.edu Tue Oct 29 14:09:01 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 14:09:01 2002 Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/MInstBuilder.h Message-ID: <200210292008.OAA08262@apoc.cs.uiuc.edu> Changes in directory llvm/include/llvm/CodeGen: MInstBuilder.h (r1.2) removed --- Log message: X86 merge complete, eliminate dead code --- Diffs of the changes: From lattner at cs.uiuc.edu Tue Oct 29 14:11:01 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 14:11:01 2002 Subject: [llvm-commits] CVS: llvm/include/llvm/Target/MInstructionInfo.h Message-ID: <200210292010.OAA08380@apoc.cs.uiuc.edu> Changes in directory llvm/include/llvm/Target: MInstructionInfo.h (r1.1) removed --- Log message: Merge to MachineInstrInfo.h --- Diffs of the changes: From lattner at cs.uiuc.edu Tue Oct 29 14:12:00 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 14:12:00 2002 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/MInstruction.cpp Message-ID: <200210292011.OAA08410@apoc.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen: MInstruction.cpp (r1.1) removed --- Log message: Merge with sparc backend --- Diffs of the changes: From lattner at cs.uiuc.edu Tue Oct 29 14:12:04 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 14:12:04 2002 Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/MBasicBlock.h MInstruction.h Message-ID: <200210292011.OAA08415@apoc.cs.uiuc.edu> Changes in directory llvm/include/llvm/CodeGen: MBasicBlock.h (r1.1) removed MInstruction.h (r1.1) removed --- Log message: Merge with sparc backend --- Diffs of the changes: From lattner at cs.uiuc.edu Tue Oct 29 14:30:01 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 14:30:01 2002 Subject: [llvm-commits] CVS: llvm/lib/Target/Makefile Message-ID: <200210292029.OAA10728@apoc.cs.uiuc.edu> Changes in directory llvm/lib/Target: Makefile updated: 1.5 -> 1.6 --- Log message: Reenable X86 backend, even though it doesn't do much, at least it compiles --- Diffs of the changes: Index: llvm/lib/Target/Makefile diff -u llvm/lib/Target/Makefile:1.5 llvm/lib/Target/Makefile:1.6 --- llvm/lib/Target/Makefile:1.5 Mon Oct 28 17:56:41 2002 +++ llvm/lib/Target/Makefile Tue Oct 29 14:29:34 2002 @@ -1,5 +1,5 @@ LEVEL = ../.. -DIRS = Sparc +DIRS = Sparc X86 LIBRARYNAME = target BUILD_ARCHIVE = 1 From lattner at cs.uiuc.edu Tue Oct 29 14:45:01 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 14:45:01 2002 Subject: [llvm-commits] CVS: llvm/include/llvm/Target/Sparc.h Message-ID: <200210292044.OAA11802@apoc.cs.uiuc.edu> Changes in directory llvm/include/llvm/Target: Sparc.h (r1.1) removed --- Log message: Move to TargetMachineImpls.h --- Diffs of the changes: From lattner at cs.uiuc.edu Tue Oct 29 14:46:00 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 14:46:00 2002 Subject: [llvm-commits] CVS: llvm/tools/llc/llc.cpp Message-ID: <200210292045.OAA11820@apoc.cs.uiuc.edu> Changes in directory llvm/tools/llc: llc.cpp updated: 1.60 -> 1.61 --- Log message: * Remove explicit strcmp calls * Rename Sparc.h to TargetMachineImpls.h --- Diffs of the changes: Index: llvm/tools/llc/llc.cpp diff -u llvm/tools/llc/llc.cpp:1.60 llvm/tools/llc/llc.cpp:1.61 --- llvm/tools/llc/llc.cpp:1.60 Wed Sep 25 18:47:49 2002 +++ llvm/tools/llc/llc.cpp Tue Oct 29 14:45:04 2002 @@ -5,7 +5,7 @@ //===----------------------------------------------------------------------===// #include "llvm/Bytecode/Reader.h" -#include "llvm/Target/Sparc.h" +#include "llvm/Target/TargetMachineImpls.h" #include "llvm/Target/TargetMachine.h" #include "llvm/Transforms/Instrumentation/TraceValues.h" #include "llvm/Transforms/Scalar.h" @@ -192,9 +192,9 @@ { const PassInfo *Opt = OptimizationList[i]; - if (strcmp(Opt->getPassArgument(), "trace") == 0) + if (std::string(Opt->getPassArgument()) == "trace") TraceFunctions = !(TraceBasicBlocks = true); - else if (strcmp(Opt->getPassArgument(), "tracem") == 0) + else if (std::string(Opt->getPassArgument()) == "tracem") TraceFunctions = !(TraceBasicBlocks = false); else { // handle other passes as normal optimization passes From lattner at cs.uiuc.edu Tue Oct 29 14:48:01 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 14:48:01 2002 Subject: [llvm-commits] CVS: llvm/lib/Target/Sparc/Sparc.cpp Message-ID: <200210292047.OAA12654@apoc.cs.uiuc.edu> Changes in directory llvm/lib/Target/Sparc: Sparc.cpp updated: 1.51 -> 1.52 --- Log message: Rename Sparc.h to TargetMachineImpls.h --- Diffs of the changes: Index: llvm/lib/Target/Sparc/Sparc.cpp diff -u llvm/lib/Target/Sparc/Sparc.cpp:1.51 llvm/lib/Target/Sparc/Sparc.cpp:1.52 --- llvm/lib/Target/Sparc/Sparc.cpp:1.51 Tue Oct 29 09:45:20 2002 +++ llvm/lib/Target/Sparc/Sparc.cpp Tue Oct 29 14:47:26 2002 @@ -6,7 +6,7 @@ //===----------------------------------------------------------------------===// #include "SparcInternals.h" -#include "llvm/Target/Sparc.h" +#include "llvm/Target/TargetMachineImpls.h" #include "llvm/Function.h" #include "llvm/PassManager.h" #include "llvm/Transforms/Scalar.h" From lattner at cs.uiuc.edu Tue Oct 29 14:48:04 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 14:48:04 2002 Subject: [llvm-commits] CVS: llvm/lib/Target/Sparc/SparcRegClassInfo.cpp SparcRegInfo.cpp Message-ID: <200210292047.OAA12673@apoc.cs.uiuc.edu> Changes in directory llvm/lib/Target/Sparc: SparcRegClassInfo.cpp updated: 1.16 -> 1.17 SparcRegInfo.cpp updated: 1.80 -> 1.81 --- Log message: Remove unneccesary #includes --- Diffs of the changes: Index: llvm/lib/Target/Sparc/SparcRegClassInfo.cpp diff -u llvm/lib/Target/Sparc/SparcRegClassInfo.cpp:1.16 llvm/lib/Target/Sparc/SparcRegClassInfo.cpp:1.17 --- llvm/lib/Target/Sparc/SparcRegClassInfo.cpp:1.16 Mon Aug 12 16:25:04 2002 +++ llvm/lib/Target/Sparc/SparcRegClassInfo.cpp Tue Oct 29 14:47:46 2002 @@ -6,7 +6,6 @@ #include "SparcRegClassInfo.h" #include "llvm/CodeGen/RegAllocCommon.h" -#include "llvm/Target/Sparc.h" #include "llvm/Type.h" using std::cerr; using std::vector; Index: llvm/lib/Target/Sparc/SparcRegInfo.cpp diff -u llvm/lib/Target/Sparc/SparcRegInfo.cpp:1.80 llvm/lib/Target/Sparc/SparcRegInfo.cpp:1.81 --- llvm/lib/Target/Sparc/SparcRegInfo.cpp:1.80 Mon Oct 28 14:10:56 2002 +++ llvm/lib/Target/Sparc/SparcRegInfo.cpp Tue Oct 29 14:47:46 2002 @@ -7,7 +7,6 @@ #include "SparcInternals.h" #include "SparcRegClassInfo.h" -#include "llvm/Target/Sparc.h" #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/PhyRegAlloc.h" #include "llvm/CodeGen/InstrSelection.h" From lattner at cs.uiuc.edu Tue Oct 29 14:49:01 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 14:49:01 2002 Subject: [llvm-commits] CVS: llvm/tools/opt/opt.cpp Message-ID: <200210292048.OAA12699@apoc.cs.uiuc.edu> Changes in directory llvm/tools/opt: opt.cpp updated: 1.73 -> 1.74 --- Log message: Rename Sparc.h TargetMachineImpls.h --- Diffs of the changes: Index: llvm/tools/opt/opt.cpp diff -u llvm/tools/opt/opt.cpp:1.73 llvm/tools/opt/opt.cpp:1.74 --- llvm/tools/opt/opt.cpp:1.73 Mon Sep 16 11:09:24 2002 +++ llvm/tools/opt/opt.cpp Tue Oct 29 14:48:09 2002 @@ -13,7 +13,7 @@ #include "llvm/Assembly/PrintModulePass.h" #include "llvm/Analysis/Verifier.h" #include "llvm/Target/TargetMachine.h" -#include "llvm/Target/Sparc.h" +#include "llvm/Target/TargetMachineImpls.h" #include "llvm/Support/PassNameParser.h" #include "Support/Signals.h" #include From lattner at cs.uiuc.edu Tue Oct 29 14:50:01 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 14:50:01 2002 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/InstSelectSimple.cpp X86InstructionInfo.cpp X86InstructionInfo.def X86InstructionInfo.h Message-ID: <200210292049.OAA13082@apoc.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: InstSelectSimple.cpp updated: 1.4 -> 1.5 X86InstructionInfo.cpp updated: 1.2 -> 1.3 X86InstructionInfo.def updated: 1.3 -> 1.4 X86InstructionInfo.h updated: 1.3 -> 1.4 --- Log message: Minor renaming --- Diffs of the changes: Index: llvm/lib/Target/X86/InstSelectSimple.cpp diff -u llvm/lib/Target/X86/InstSelectSimple.cpp:1.4 llvm/lib/Target/X86/InstSelectSimple.cpp:1.5 --- llvm/lib/Target/X86/InstSelectSimple.cpp:1.4 Tue Oct 29 11:43:55 2002 +++ llvm/lib/Target/X86/InstSelectSimple.cpp Tue Oct 29 14:48:56 2002 @@ -36,9 +36,9 @@ } /// visitBasicBlock - This method is called when we are visiting a new basic - /// block. This simply creates a new MBasicBlock to emit code into and adds - /// it to the current MFunction. Subsequent visit* for instructions will be - /// invoked for all instructions in the basic block. + /// block. This simply creates a new MachineBasicBlock to emit code into + /// and adds it to the current MachineFunction. Subsequent visit* for + /// instructions will be invoked for all instructions in the basic block. /// void visitBasicBlock(BasicBlock &LLVM_BB) { BB = new MachineBasicBlock(); Index: llvm/lib/Target/X86/X86InstructionInfo.cpp diff -u llvm/lib/Target/X86/X86InstructionInfo.cpp:1.2 llvm/lib/Target/X86/X86InstructionInfo.cpp:1.3 --- llvm/lib/Target/X86/X86InstructionInfo.cpp:1.2 Tue Oct 29 11:43:19 2002 +++ llvm/lib/Target/X86/X86InstructionInfo.cpp Tue Oct 29 14:48:56 2002 @@ -1,6 +1,6 @@ //===- X86InstructionInfo.cpp - X86 Instruction Information ---------------===// // -// This file contains the X86 implementation of the MInstructionInfo class. +// This file contains the X86 implementation of the MachineInstrInfo class. // //===----------------------------------------------------------------------===// Index: llvm/lib/Target/X86/X86InstructionInfo.def diff -u llvm/lib/Target/X86/X86InstructionInfo.def:1.3 llvm/lib/Target/X86/X86InstructionInfo.def:1.4 --- llvm/lib/Target/X86/X86InstructionInfo.def:1.3 Tue Oct 29 11:42:40 2002 +++ llvm/lib/Target/X86/X86InstructionInfo.def Tue Oct 29 14:48:56 2002 @@ -17,7 +17,7 @@ // #1: Enum name - This ends up being the opcode symbol in the X86 namespace // #2: Opcode name, as used by the gnu assembler // #3: Instruction Flags - This should be a field or'd together that contains -// constants from the MInstructionInfo.h file. +// constants from the MachineInstrInfo.h file. // #4: Target Specific Flags - Another bitfield containing X86 specific flags // that we are interested in for each instruction // Index: llvm/lib/Target/X86/X86InstructionInfo.h diff -u llvm/lib/Target/X86/X86InstructionInfo.h:1.3 llvm/lib/Target/X86/X86InstructionInfo.h:1.4 --- llvm/lib/Target/X86/X86InstructionInfo.h:1.3 Tue Oct 29 11:42:56 2002 +++ llvm/lib/Target/X86/X86InstructionInfo.h Tue Oct 29 14:48:56 2002 @@ -1,6 +1,6 @@ //===- X86InstructionInfo.h - X86 Instruction Information ---------*-C++-*-===// // -// This file contains the X86 implementation of the MInstructionInfo class. +// This file contains the X86 implementation of the MachineInstrInfo class. // //===----------------------------------------------------------------------===// @@ -15,7 +15,7 @@ public: X86InstructionInfo(); - /// getRegisterInfo - MInstructionInfo is a superset of MRegister info. As + /// getRegisterInfo - MachineInstrInfo is a superset of MRegister info. As /// such, whenever a client has an instance of instruction info, it should /// always be able to get register info as well (through this method). /// From lattner at cs.uiuc.edu Tue Oct 29 14:52:00 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 14:52:00 2002 Subject: [llvm-commits] CVS: llvm/include/llvm/Target/TargetMachineImpls.h Message-ID: <200210292051.OAA13245@apoc.cs.uiuc.edu> Changes in directory llvm/include/llvm/Target: TargetMachineImpls.h updated: 1.1 -> 1.2 --- Log message: Rename Sparc.h to TargetMachineImpls.h. Add hook for X86 target --- Diffs of the changes: Index: llvm/include/llvm/Target/TargetMachineImpls.h diff -u llvm/include/llvm/Target/TargetMachineImpls.h:1.1 llvm/include/llvm/Target/TargetMachineImpls.h:1.2 --- llvm/include/llvm/Target/TargetMachineImpls.h:1.1 Fri Sep 14 00:34:52 2001 +++ llvm/include/llvm/Target/TargetMachineImpls.h Tue Oct 29 14:51:29 2002 @@ -1,11 +1,12 @@ -//===-- llvm/CodeGen/Sparc.h - Sparc Target Description ----------*- C++ -*--=// +//===-- llvm/Target/TargetMachineImpls.h - Target Descriptions --*- C++ -*-===// // -// This file defines the Sparc processor targets +// This file defines the entry point to getting access to the various target +// machine implementations available to LLVM. // //===----------------------------------------------------------------------===// -#ifndef LLVM_CODEGEN_SPARC_H -#define LLVM_CODEGEN_SPARC_H +#ifndef LLVM_TARGET_TARGETMACHINEIMPLS_H +#define LLVM_TARGET_TARGETMACHINEIMPLS_H class TargetMachine; @@ -13,5 +14,10 @@ // that implements the Sparc backend. // TargetMachine *allocateSparcTargetMachine(); + +// allocateX86TargetMachine - Allocate and return a subclass of TargetMachine +// that implements the X86 backend. +// +TargetMachine *allocateX86TargetMachine(); #endif From lattner at cs.uiuc.edu Tue Oct 29 14:52:04 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 14:52:04 2002 Subject: [llvm-commits] CVS: llvm/include/llvm/Target/TargetMachine.h Message-ID: <200210292051.OAA13250@apoc.cs.uiuc.edu> Changes in directory llvm/include/llvm/Target: TargetMachine.h updated: 1.14 -> 1.15 --- Log message: Add hook for JIT compiler --- Diffs of the changes: Index: llvm/include/llvm/Target/TargetMachine.h diff -u llvm/include/llvm/Target/TargetMachine.h:1.14 llvm/include/llvm/Target/TargetMachine.h:1.15 --- llvm/include/llvm/Target/TargetMachine.h:1.14 Sun Oct 27 19:02:24 2002 +++ llvm/include/llvm/Target/TargetMachine.h Tue Oct 29 14:51:10 2002 @@ -78,6 +78,12 @@ /// virtual void addPassesToEmitAssembly(PassManager &PM, std::ostream &Out) = 0; + /// addPassesToJITCompile - Add passes to the specified pass manager to + /// implement a fast dynamic compiler for this target. Return true if this is + /// not supported for this target. + /// + virtual bool addPassesToJITCompile(PassManager &PM) { return true; } + /// getPrologEpilogCodeInserter - Create pass to insert prolog/epilog code. /// virtual Pass* getPrologEpilogInsertionPass() = 0; From lattner at cs.uiuc.edu Tue Oct 29 15:02:00 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 15:02:00 2002 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86InstrInfo.cpp X86InstrInfo.h Message-ID: <200210292101.PAA13459@apoc.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: X86InstrInfo.cpp updated: 1.3 -> 1.4 X86InstrInfo.h updated: 1.4 -> 1.5 --- Log message: Rename X86InstructionInfo to X86InstrInfo --- Diffs of the changes: Index: llvm/lib/Target/X86/X86InstrInfo.cpp diff -u llvm/lib/Target/X86/X86InstrInfo.cpp:1.3 llvm/lib/Target/X86/X86InstrInfo.cpp:1.4 --- llvm/lib/Target/X86/X86InstrInfo.cpp:1.3 Tue Oct 29 14:48:56 2002 +++ llvm/lib/Target/X86/X86InstrInfo.cpp Tue Oct 29 15:01:27 2002 @@ -1,29 +1,29 @@ -//===- X86InstructionInfo.cpp - X86 Instruction Information ---------------===// +//===- X86InstrInfo.cpp - X86 Instruction Information ---------------===// // // This file contains the X86 implementation of the MachineInstrInfo class. // //===----------------------------------------------------------------------===// -#include "X86InstructionInfo.h" +#include "X86InstrInfo.h" #include "llvm/CodeGen/MachineInstr.h" #include -// X86Insts - Turn the InstructionInfo.def file into a bunch of instruction +// X86Insts - Turn the InstrInfo.def file into a bunch of instruction // descriptors // static const MachineInstrDescriptor X86Insts[] = { #define I(ENUM, NAME, FLAGS, TSFLAGS) \ { NAME, -1, -1, 0, false, 0, 0, TSFLAGS, FLAGS }, -#include "X86InstructionInfo.def" +#include "X86InstrInfo.def" }; -X86InstructionInfo::X86InstructionInfo() +X86InstrInfo::X86InstrInfo() : MachineInstrInfo(X86Insts, sizeof(X86Insts)/sizeof(X86Insts[0]), 0) { } // print - Print out an x86 instruction in GAS syntax -void X86InstructionInfo::print(const MachineInstr *MI, std::ostream &O) const { +void X86InstrInfo::print(const MachineInstr *MI, std::ostream &O) const { // FIXME: This sucks. O << getName(MI->getOpCode()) << "\n"; } Index: llvm/lib/Target/X86/X86InstrInfo.h diff -u llvm/lib/Target/X86/X86InstrInfo.h:1.4 llvm/lib/Target/X86/X86InstrInfo.h:1.5 --- llvm/lib/Target/X86/X86InstrInfo.h:1.4 Tue Oct 29 14:48:56 2002 +++ llvm/lib/Target/X86/X86InstrInfo.h Tue Oct 29 15:01:27 2002 @@ -10,10 +10,10 @@ #include "llvm/Target/MachineInstrInfo.h" #include "X86RegisterInfo.h" -class X86InstructionInfo : public MachineInstrInfo { +class X86InstrInfo : public MachineInstrInfo { const X86RegisterInfo RI; public: - X86InstructionInfo(); + X86InstrInfo(); /// getRegisterInfo - MachineInstrInfo is a superset of MRegister info. As /// such, whenever a client has an instance of instruction info, it should From lattner at cs.uiuc.edu Tue Oct 29 15:06:01 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 15:06:01 2002 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86.h InstSelectSimple.cpp Message-ID: <200210292105.PAA13634@apoc.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: X86.h updated: 1.3 -> 1.4 InstSelectSimple.cpp updated: 1.5 -> 1.6 --- Log message: Rename X86InstructionInfo to X86InstrInfo --- Diffs of the changes: Index: llvm/lib/Target/X86/X86.h diff -u llvm/lib/Target/X86/X86.h:1.3 llvm/lib/Target/X86/X86.h:1.4 --- llvm/lib/Target/X86/X86.h:1.3 Tue Oct 29 11:43:38 2002 +++ llvm/lib/Target/X86/X86.h Tue Oct 29 15:05:24 2002 @@ -55,7 +55,7 @@ // This defines a large number of symbolic names for X86 instruction opcodes. enum Opcode { #define I(ENUM, NAME, FLAGS, TSFLAGS) ENUM, -#include "X86InstructionInfo.def" +#include "X86InstrInfo.def" }; } Index: llvm/lib/Target/X86/InstSelectSimple.cpp diff -u llvm/lib/Target/X86/InstSelectSimple.cpp:1.5 llvm/lib/Target/X86/InstSelectSimple.cpp:1.6 --- llvm/lib/Target/X86/InstSelectSimple.cpp:1.5 Tue Oct 29 14:48:56 2002 +++ llvm/lib/Target/X86/InstSelectSimple.cpp Tue Oct 29 15:05:24 2002 @@ -5,7 +5,7 @@ //===----------------------------------------------------------------------===// #include "X86.h" -#include "X86InstructionInfo.h" +#include "X86InstrInfo.h" #include "llvm/Function.h" #include "llvm/iTerminators.h" #include "llvm/Type.h" From lattner at cs.uiuc.edu Tue Oct 29 15:08:04 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 15:08:04 2002 Subject: [llvm-commits] CVS: llvm/tools/jello/jello.cpp Message-ID: <200210292107.PAA13665@apoc.cs.uiuc.edu> Changes in directory llvm/tools/jello: jello.cpp updated: 1.1 -> 1.2 --- Log message: Convert jello to use PassManager --- Diffs of the changes: Index: llvm/tools/jello/jello.cpp diff -u llvm/tools/jello/jello.cpp:1.1 llvm/tools/jello/jello.cpp:1.2 --- llvm/tools/jello/jello.cpp:1.1 Fri Oct 25 17:58:53 2002 +++ llvm/tools/jello/jello.cpp Tue Oct 29 15:06:58 2002 @@ -9,10 +9,10 @@ //===----------------------------------------------------------------------===// #include "llvm/Module.h" +#include "llvm/PassManager.h" #include "llvm/Bytecode/Reader.h" -#include "llvm/CodeGen/MFunction.h" -#include "../lib/Target/X86/X86.h" // FIXME: become generic eventually -#include "../lib/Target/X86/X86InstructionInfo.h" +#include "llvm/Target/TargetMachine.h" +#include "llvm/Target/TargetMachineImpls.h" #include "Support/CommandLine.h" #include "Support/Statistic.h" @@ -25,52 +25,39 @@ cl::value_desc("function name")); } - -/// ExecuteFunction - Compile the specified function to machine code, and -/// execute it. -/// -static void ExecuteFunction(Function &F) { - X86InstructionInfo II; - - // Perform instruction selection to turn the function into an x86 SSA form - MFunction *MF = X86SimpleInstructionSelection(F); - - // TODO: optional optimizations go here - - // If -debug is specified, output selected code to stderr - /*DEBUG*/(MF->print(std::cerr, II)); - - // Perform register allocation to convert to a concrete x86 representation - X86SimpleRegisterAllocation(MF); - - // If -debug is specified, output compiled code to stderr - /*DEBUG*/(X86PrintCode(MF, std::cerr)); - - // Emit register allocated X86 code now... - void *PFun = X86EmitCodeToMemory(MF); - - // We don't need the machine specific representation for this function anymore - delete MF; -} - - //===----------------------------------------------------------------------===// // main Driver function // int main(int argc, char **argv) { cl::ParseCommandLineOptions(argc, argv, " llvm just in time compiler\n"); + // Allocate a target... in the future this will be controllable on the + // command line. + std::auto_ptr target(allocateX86TargetMachine()); + assert(target.get() && "Could not allocate target machine!"); + + TargetMachine &Target = *target.get(); + + // Parse the input bytecode file... std::string ErrorMsg; - if (Module *M = ParseBytecodeFile(InputFile, &ErrorMsg)) { - for (Module::iterator I = M->begin(), E = M->end(); I != E; ++I) - if (I->getName() == MainFunction) - ExecuteFunction(*I); + std::auto_ptr M(ParseBytecodeFile(InputFile, &ErrorMsg)); + if (M.get() == 0) { + std::cerr << argv[0] << ": bytecode '" << InputFile + << "' didn't read correctly: << " << ErrorMsg << "\n"; + return 1; + } - delete M; - return 0; + PassManager Passes; + if (Target.addPassesToJITCompile(Passes)) { + std::cerr << argv[0] << ": target '" << Target.TargetName + << "' doesn't support JIT compilation!\n"; + return 1; } + + // JIT all of the methods in the module. Eventually this will JIT functions + // on demand. + Passes.run(*M.get()); - std::cerr << "Error parsing '" << InputFile << "': " << ErrorMsg << "\n"; return 1; } From lattner at cs.uiuc.edu Tue Oct 29 15:13:00 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 15:13:00 2002 Subject: [llvm-commits] CVS: llvm/include/llvm/Target/TargetMachine.h Message-ID: <200210292112.PAA14522@apoc.cs.uiuc.edu> Changes in directory llvm/include/llvm/Target: TargetMachine.h updated: 1.15 -> 1.16 --- Log message: Allow TargetMachine to refuse static code gen --- Diffs of the changes: Index: llvm/include/llvm/Target/TargetMachine.h diff -u llvm/include/llvm/Target/TargetMachine.h:1.15 llvm/include/llvm/Target/TargetMachine.h:1.16 --- llvm/include/llvm/Target/TargetMachine.h:1.15 Tue Oct 29 14:51:10 2002 +++ llvm/include/llvm/Target/TargetMachine.h Tue Oct 29 15:12:43 2002 @@ -51,7 +51,7 @@ ShortAl, ByteAl) { } public: virtual ~TargetMachine() {} - + // // Interfaces to the major aspects of target machine information: // -- Instruction opcode and operand information @@ -74,9 +74,12 @@ /// addPassesToEmitAssembly - Add passes to the specified pass manager to get /// assembly langage code emited. Typically this will involve several steps - /// of code generation. + /// of code generation. This method should return true if code generation is + /// not supported. /// - virtual void addPassesToEmitAssembly(PassManager &PM, std::ostream &Out) = 0; + virtual bool addPassesToEmitAssembly(PassManager &PM, std::ostream &Out) { + return true; + } /// addPassesToJITCompile - Add passes to the specified pass manager to /// implement a fast dynamic compiler for this target. Return true if this is From lattner at cs.uiuc.edu Tue Oct 29 15:13:04 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 15:13:04 2002 Subject: [llvm-commits] CVS: llvm/lib/Target/Sparc/Sparc.cpp SparcInternals.h Message-ID: <200210292112.PAA14531@apoc.cs.uiuc.edu> Changes in directory llvm/lib/Target/Sparc: Sparc.cpp updated: 1.52 -> 1.53 SparcInternals.h updated: 1.71 -> 1.72 --- Log message: Allow TargetMachine to refuse static code gen --- Diffs of the changes: Index: llvm/lib/Target/Sparc/Sparc.cpp diff -u llvm/lib/Target/Sparc/Sparc.cpp:1.52 llvm/lib/Target/Sparc/Sparc.cpp:1.53 --- llvm/lib/Target/Sparc/Sparc.cpp:1.52 Tue Oct 29 14:47:26 2002 +++ llvm/lib/Target/Sparc/Sparc.cpp Tue Oct 29 15:12:45 2002 @@ -141,7 +141,7 @@ // addPassesToEmitAssembly - This method controls the entire code generation // process for the ultra sparc. // -void UltraSparc::addPassesToEmitAssembly(PassManager &PM, std::ostream &Out) +bool UltraSparc::addPassesToEmitAssembly(PassManager &PM, std::ostream &Out) { // Construct and initialize the MachineFunction object for this fn. PM.add(createMachineCodeConstructionPass(*this)); @@ -189,4 +189,5 @@ // Emit bytecode to the assembly file into its special section next PM.add(getEmitBytecodeToAsmPass(Out)); PM.add(getFunctionInfo(Out)); + return false; } Index: llvm/lib/Target/Sparc/SparcInternals.h diff -u llvm/lib/Target/Sparc/SparcInternals.h:1.71 llvm/lib/Target/Sparc/SparcInternals.h:1.72 --- llvm/lib/Target/Sparc/SparcInternals.h:1.71 Tue Oct 29 09:45:20 2002 +++ llvm/lib/Target/Sparc/SparcInternals.h Tue Oct 29 15:12:45 2002 @@ -718,7 +718,7 @@ virtual const MachineCacheInfo &getCacheInfo() const { return cacheInfo; } virtual const MachineOptInfo &getOptInfo() const { return optInfo; } - virtual void addPassesToEmitAssembly(PassManager &PM, std::ostream &Out); + virtual bool addPassesToEmitAssembly(PassManager &PM, std::ostream &Out); // getPrologEpilogCodeInserter - Inserts prolog/epilog code. virtual Pass* getPrologEpilogInsertionPass(); From lattner at cs.uiuc.edu Tue Oct 29 15:13:08 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 15:13:08 2002 Subject: [llvm-commits] CVS: llvm/tools/llc/llc.cpp Message-ID: <200210292112.PAA14538@apoc.cs.uiuc.edu> Changes in directory llvm/tools/llc: llc.cpp updated: 1.61 -> 1.62 --- Log message: Allow TargetMachine to refuse static code gen --- Diffs of the changes: Index: llvm/tools/llc/llc.cpp diff -u llvm/tools/llc/llc.cpp:1.61 llvm/tools/llc/llc.cpp:1.62 --- llvm/tools/llc/llc.cpp:1.61 Tue Oct 29 14:45:04 2002 +++ llvm/tools/llc/llc.cpp Tue Oct 29 15:12:46 2002 @@ -281,10 +281,14 @@ } } - Target.addPassesToEmitAssembly(Passes, *Out); - - // Run our queue of passes all at once now, efficiently. - Passes.run(*M.get()); + // Ask the target to add backend passes as neccesary + if (Target.addPassesToEmitAssembly(Passes, *Out)) { + cerr << argv[0] << ": target '" << Target.TargetName + << " does not support static compilation!\n"; + } else { + // Run our queue of passes all at once now, efficiently. + Passes.run(*M.get()); + } // Delete the ostream if it's not a stdout stream if (Out != &std::cout) delete Out; From lattner at cs.uiuc.edu Tue Oct 29 15:48:00 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 15:48:00 2002 Subject: [llvm-commits] CVS: llvm/include/llvm/Target/TargetData.h TargetMachine.h Message-ID: <200210292147.PAA16715@apoc.cs.uiuc.edu> Changes in directory llvm/include/llvm/Target: TargetData.h updated: 1.11 -> 1.12 TargetMachine.h updated: 1.16 -> 1.17 --- Log message: * Privatize the TargetName * Move optSizeForSubWordData to TargetData * Remove unused fields --- Diffs of the changes: Index: llvm/include/llvm/Target/TargetData.h diff -u llvm/include/llvm/Target/TargetData.h:1.11 llvm/include/llvm/Target/TargetData.h:1.12 --- llvm/include/llvm/Target/TargetData.h:1.11 Mon Oct 14 17:41:09 2002 +++ llvm/include/llvm/Target/TargetData.h Tue Oct 29 15:47:17 2002 @@ -24,6 +24,7 @@ class TargetData : public ImmutablePass { bool LittleEndian; // Defaults to false + unsigned char SubWordDataSize; // Defaults to 1 byte (no rounding up) unsigned char ByteAlignment; // Defaults to 1 bytes unsigned char ShortAlignment; // Defaults to 2 bytes unsigned char IntAlignment; // Defaults to 4 bytes @@ -39,6 +40,7 @@ public: TargetData(const std::string &TargetName = "SparcV9", bool LittleEndian = false, + unsigned char SubWordDataSize = 1, unsigned char IntRegSize = 8, unsigned char PtrSize = 8, unsigned char PtrAl = 8, unsigned char DoubleAl = 8, @@ -52,6 +54,7 @@ bool isBigEndian() const { return !LittleEndian; } /// Target alignment constraints + unsigned char getSubWordDataSize() const { return SubWordDataSize; } unsigned char getByteAlignment() const { return ByteAlignment; } unsigned char getShortAlignment() const { return ShortAlignment; } unsigned char getIntAlignment() const { return IntAlignment; } Index: llvm/include/llvm/Target/TargetMachine.h diff -u llvm/include/llvm/Target/TargetMachine.h:1.16 llvm/include/llvm/Target/TargetMachine.h:1.17 --- llvm/include/llvm/Target/TargetMachine.h:1.16 Tue Oct 29 15:12:43 2002 +++ llvm/include/llvm/Target/TargetMachine.h Tue Oct 29 15:47:17 2002 @@ -31,27 +31,25 @@ //--------------------------------------------------------------------------- class TargetMachine : public NonCopyableV { + const std::string Name; public: - const std::string TargetName; const TargetData DataLayout; // Calculates type size & alignment - int optSizeForSubWordData; - int minMemOpWordSize; - int maxAtomicMemOpWordSize; protected: - TargetMachine(const std::string &targetname, // Can only create subclasses... - unsigned char IntRegSize = 8, + TargetMachine(const std::string &name, // Can only create subclasses... + unsigned char SubWordSize = 1, unsigned char IntRegSize = 8, unsigned char PtrSize = 8, unsigned char PtrAl = 8, unsigned char DoubleAl = 8, unsigned char FloatAl = 4, unsigned char LongAl = 8, unsigned char IntAl = 4, unsigned char ShortAl = 2, unsigned char ByteAl = 1) - : TargetName(targetname), DataLayout(targetname, IntRegSize, - PtrSize, PtrAl, - DoubleAl, FloatAl, LongAl, IntAl, - ShortAl, ByteAl) { } + : Name(name), DataLayout(name, SubWordSize, IntRegSize, PtrSize, PtrAl, + DoubleAl, FloatAl, LongAl, + IntAl, ShortAl, ByteAl) {} public: virtual ~TargetMachine() {} + const std::string &getName() const { return Name; } + // // Interfaces to the major aspects of target machine information: // -- Instruction opcode and operand information @@ -70,7 +68,7 @@ // Data storage information // - virtual unsigned int findOptimalStorageSize (const Type* ty) const; + virtual unsigned findOptimalStorageSize(const Type* ty) const; /// addPassesToEmitAssembly - Add passes to the specified pass manager to get /// assembly langage code emited. Typically this will involve several steps From lattner at cs.uiuc.edu Tue Oct 29 15:49:00 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 15:49:00 2002 Subject: [llvm-commits] CVS: llvm/lib/Target/TargetData.cpp Message-ID: <200210292148.PAA16742@apoc.cs.uiuc.edu> Changes in directory llvm/lib/Target: TargetData.cpp updated: 1.25 -> 1.26 --- Log message: * Privatize the TargetName * Move optSizeForSubWordData to TargetData * Remove unused fields --- Diffs of the changes: Index: llvm/lib/Target/TargetData.cpp diff -u llvm/lib/Target/TargetData.cpp:1.25 llvm/lib/Target/TargetData.cpp:1.26 --- llvm/lib/Target/TargetData.cpp:1.25 Mon Oct 14 17:41:13 2002 +++ llvm/lib/Target/TargetData.cpp Tue Oct 29 15:48:16 2002 @@ -81,7 +81,7 @@ //===----------------------------------------------------------------------===// TargetData::TargetData(const std::string &TargetName, - bool isLittleEndian, + bool isLittleEndian, unsigned char SubWordSize, unsigned char IntRegSize, unsigned char PtrSize, unsigned char PtrAl, unsigned char DoubleAl, unsigned char FloatAl, unsigned char LongAl, @@ -91,6 +91,7 @@ AnnotationManager::registerAnnotationFactory(AID, TypeAnFactory, this); LittleEndian = isLittleEndian; + SubWordDataSize = SubWordSize; IntegerRegSize = IntRegSize; PointerSize = PtrSize; PointerAlignment = PtrAl; From lattner at cs.uiuc.edu Tue Oct 29 15:49:04 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 15:49:04 2002 Subject: [llvm-commits] CVS: llvm/lib/Target/TargetMachine.cpp Message-ID: <200210292148.PAA16728@apoc.cs.uiuc.edu> Changes in directory llvm/lib/Target: TargetMachine.cpp updated: 1.15 -> 1.16 --- Log message: Implement findOptimalStorageSize a bit more generally --- Diffs of the changes: Index: llvm/lib/Target/TargetMachine.cpp diff -u llvm/lib/Target/TargetMachine.cpp:1.15 llvm/lib/Target/TargetMachine.cpp:1.16 --- llvm/lib/Target/TargetMachine.cpp:1.15 Mon Oct 28 17:55:33 2002 +++ llvm/lib/Target/TargetMachine.cpp Tue Oct 29 15:47:50 2002 @@ -25,21 +25,13 @@ // space equal to optSizeForSubWordData, and all other primitive data // items use space according to the type. // -unsigned int -TargetMachine::findOptimalStorageSize(const Type* ty) const -{ - switch(ty->getPrimitiveID()) - { - case Type::BoolTyID: - case Type::UByteTyID: - case Type::SByteTyID: - case Type::UShortTyID: - case Type::ShortTyID: - return optSizeForSubWordData; - - default: - return DataLayout.getTypeSize(ty); - } +unsigned TargetMachine::findOptimalStorageSize(const Type *Ty) const { + // Round integral values smaller than SubWordDataSize up to SubWordDataSize + if (Ty->isIntegral() && + Ty->getPrimitiveSize() < DataLayout.getSubWordDataSize()) + return DataLayout.getSubWordDataSize(); + + return DataLayout.getTypeSize(Ty); } From lattner at cs.uiuc.edu Tue Oct 29 15:49:07 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 15:49:07 2002 Subject: [llvm-commits] CVS: llvm/lib/Target/Sparc/Sparc.cpp Message-ID: <200210292148.PAA16749@apoc.cs.uiuc.edu> Changes in directory llvm/lib/Target/Sparc: Sparc.cpp updated: 1.53 -> 1.54 --- Log message: * Privatize the TargetName * Move optSizeForSubWordData to TargetData * Remove unused fields --- Diffs of the changes: Index: llvm/lib/Target/Sparc/Sparc.cpp diff -u llvm/lib/Target/Sparc/Sparc.cpp:1.53 llvm/lib/Target/Sparc/Sparc.cpp:1.54 --- llvm/lib/Target/Sparc/Sparc.cpp:1.53 Tue Oct 29 15:12:45 2002 +++ llvm/lib/Target/Sparc/Sparc.cpp Tue Oct 29 15:48:17 2002 @@ -125,16 +125,12 @@ //--------------------------------------------------------------------------- UltraSparc::UltraSparc() - : TargetMachine("UltraSparc-Native"), + : TargetMachine("UltraSparc-Native", 4), schedInfo(*this), regInfo(*this), frameInfo(*this), cacheInfo(*this), - optInfo(*this) -{ - optSizeForSubWordData = 4; - minMemOpWordSize = 8; - maxAtomicMemOpWordSize = 8; + optInfo(*this) { } From lattner at cs.uiuc.edu Tue Oct 29 15:49:11 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 15:49:11 2002 Subject: [llvm-commits] CVS: llvm/tools/jello/jello.cpp Message-ID: <200210292148.PAA16763@apoc.cs.uiuc.edu> Changes in directory llvm/tools/jello: jello.cpp updated: 1.2 -> 1.3 --- Log message: * Privatize the TargetName --- Diffs of the changes: Index: llvm/tools/jello/jello.cpp diff -u llvm/tools/jello/jello.cpp:1.2 llvm/tools/jello/jello.cpp:1.3 --- llvm/tools/jello/jello.cpp:1.2 Tue Oct 29 15:06:58 2002 +++ llvm/tools/jello/jello.cpp Tue Oct 29 15:48:31 2002 @@ -49,7 +49,7 @@ PassManager Passes; if (Target.addPassesToJITCompile(Passes)) { - std::cerr << argv[0] << ": target '" << Target.TargetName + std::cerr << argv[0] << ": target '" << Target.getName() << "' doesn't support JIT compilation!\n"; return 1; } From lattner at cs.uiuc.edu Tue Oct 29 15:49:14 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 15:49:14 2002 Subject: [llvm-commits] CVS: llvm/tools/llc/llc.cpp Message-ID: <200210292148.PAA16770@apoc.cs.uiuc.edu> Changes in directory llvm/tools/llc: llc.cpp updated: 1.62 -> 1.63 --- Log message: * Privatize the TargetName --- Diffs of the changes: Index: llvm/tools/llc/llc.cpp diff -u llvm/tools/llc/llc.cpp:1.62 llvm/tools/llc/llc.cpp:1.63 --- llvm/tools/llc/llc.cpp:1.62 Tue Oct 29 15:12:46 2002 +++ llvm/tools/llc/llc.cpp Tue Oct 29 15:48:33 2002 @@ -283,7 +283,7 @@ // Ask the target to add backend passes as neccesary if (Target.addPassesToEmitAssembly(Passes, *Out)) { - cerr << argv[0] << ": target '" << Target.TargetName + cerr << argv[0] << ": target '" << Target.getName() << " does not support static compilation!\n"; } else { // Run our queue of passes all at once now, efficiently. From lattner at cs.uiuc.edu Tue Oct 29 16:02:01 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 16:02:01 2002 Subject: [llvm-commits] CVS: llvm/include/llvm/Target/TargetMachine.h Message-ID: <200210292201.QAA17342@apoc.cs.uiuc.edu> Changes in directory llvm/include/llvm/Target: TargetMachine.h updated: 1.17 -> 1.18 --- Log message: Eliminate virtual methods that are sparc specific --- Diffs of the changes: Index: llvm/include/llvm/Target/TargetMachine.h diff -u llvm/include/llvm/Target/TargetMachine.h:1.17 llvm/include/llvm/Target/TargetMachine.h:1.18 --- llvm/include/llvm/Target/TargetMachine.h:1.17 Tue Oct 29 15:47:17 2002 +++ llvm/include/llvm/Target/TargetMachine.h Tue Oct 29 16:01:26 2002 @@ -84,25 +84,6 @@ /// not supported for this target. /// virtual bool addPassesToJITCompile(PassManager &PM) { return true; } - - /// getPrologEpilogCodeInserter - Create pass to insert prolog/epilog code. - /// - virtual Pass* getPrologEpilogInsertionPass() = 0; - - /// getFunctionAsmPrinterPass - Create a pass to write out the generated - /// machine code for a single function to the generated assembly file. - /// - virtual Pass* getFunctionAsmPrinterPass(std::ostream &Out) = 0; - - /// getModuleAsmPrinterPass - Create a pass to write out module-level - /// information to the generated assembly file. - /// - virtual Pass* getModuleAsmPrinterPass(std::ostream &Out) = 0; - - /// getEmitBytecodeToAsmPass - Create a pass to emit the final LLVM bytecode - /// to the generated assembly file. - /// - virtual Pass* getEmitBytecodeToAsmPass(std::ostream &Out) = 0; }; #endif From lattner at cs.uiuc.edu Tue Oct 29 16:02:05 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 16:02:05 2002 Subject: [llvm-commits] CVS: llvm/lib/Target/Sparc/SparcInternals.h Message-ID: <200210292201.QAA17351@apoc.cs.uiuc.edu> Changes in directory llvm/lib/Target/Sparc: SparcInternals.h updated: 1.72 -> 1.73 --- Log message: These are no longer virtual methods --- Diffs of the changes: Index: llvm/lib/Target/Sparc/SparcInternals.h diff -u llvm/lib/Target/Sparc/SparcInternals.h:1.72 llvm/lib/Target/Sparc/SparcInternals.h:1.73 --- llvm/lib/Target/Sparc/SparcInternals.h:1.72 Tue Oct 29 15:12:45 2002 +++ llvm/lib/Target/Sparc/SparcInternals.h Tue Oct 29 16:01:44 2002 @@ -720,17 +720,17 @@ virtual bool addPassesToEmitAssembly(PassManager &PM, std::ostream &Out); - // getPrologEpilogCodeInserter - Inserts prolog/epilog code. - virtual Pass* getPrologEpilogInsertionPass(); + // getPrologEpilogInsertionPass - Inserts prolog/epilog code. + Pass* getPrologEpilogInsertionPass(); // getFunctionAsmPrinterPass - Writes out machine code for a single function - virtual Pass* getFunctionAsmPrinterPass(std::ostream &Out); + Pass* getFunctionAsmPrinterPass(std::ostream &Out); // getModuleAsmPrinterPass - Writes generated machine code to assembly file. - virtual Pass* getModuleAsmPrinterPass(std::ostream &Out); + Pass* getModuleAsmPrinterPass(std::ostream &Out); // getEmitBytecodeToAsmPass - Emits final LLVM bytecode to assembly file. - virtual Pass* getEmitBytecodeToAsmPass(std::ostream &Out); + Pass* getEmitBytecodeToAsmPass(std::ostream &Out); }; #endif From lattner at cs.uiuc.edu Tue Oct 29 16:39:01 2002 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Oct 29 16:39:01 2002 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86TargetMachine.cpp X86TargetMachine.h InstSelectSimple.cpp Printer.cpp X86.h Message-ID: <200210292238.QAA18892@apoc.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: X86TargetMachine.cpp added (r1.1) X86TargetMachine.h added (r1.1) InstSelectSimple.cpp updated: 1.6 -> 1.7 Printer.cpp updated: 1.2 -> 1.3 X86.h updated: 1.4 -> 1.5 --- Log message: Convert backend to use passes, implement X86TargetMachine --- Diffs of the changes: Index: llvm/lib/Target/X86/InstSelectSimple.cpp diff -u llvm/lib/Target/X86/InstSelectSimple.cpp:1.6 llvm/lib/Target/X86/InstSelectSimple.cpp:1.7 --- llvm/lib/Target/X86/InstSelectSimple.cpp:1.6 Tue Oct 29 15:05:24 2002 +++ llvm/lib/Target/X86/InstSelectSimple.cpp Tue Oct 29 16:37:54 2002 @@ -10,28 +10,32 @@ #include "llvm/iTerminators.h" #include "llvm/Type.h" #include "llvm/Constants.h" +#include "llvm/Pass.h" #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineInstrBuilder.h" #include "llvm/Support/InstVisitor.h" #include namespace { - struct ISel : public InstVisitor { // eventually will be a FunctionPass + struct ISel : public FunctionPass, InstVisitor { + TargetMachine &TM; MachineFunction *F; // The function we are compiling into MachineBasicBlock *BB; // The current MBB we are compiling unsigned CurReg; std::map RegMap; // Mapping between Val's and SSA Regs - ISel(MachineFunction *f) - : F(f), BB(0), CurReg(MRegisterInfo::FirstVirtualRegister) {} + ISel(TargetMachine &tm) + : TM(tm), F(0), BB(0), CurReg(MRegisterInfo::FirstVirtualRegister) {} /// runOnFunction - Top level implementation of instruction selection for /// the entire function. /// - bool runOnFunction(Function &F) { - visit(F); + bool runOnFunction(Function &Fn) { + F = new MachineFunction(&Fn, TM); + visit(Fn); RegMap.clear(); + F = 0; return false; // We never modify the LLVM itself. } @@ -161,14 +165,10 @@ } } - - -/// X86SimpleInstructionSelection - This function converts an LLVM function into -/// a machine code representation is a very simple peep-hole fashion. The +/// createSimpleX86InstructionSelector - This pass converts an LLVM function +/// into a machine code representation is a very simple peep-hole fashion. The /// generated code sucks but the implementation is nice and simple. /// -MachineFunction *X86SimpleInstructionSelection(Function &F, TargetMachine &TM) { - MachineFunction *Result = new MachineFunction(&F, TM); - ISel(Result).runOnFunction(F); - return Result; +Pass *createSimpleX86InstructionSelector(TargetMachine &TM) { + return new ISel(TM); } Index: llvm/lib/Target/X86/Printer.cpp diff -u llvm/lib/Target/X86/Printer.cpp:1.2 llvm/lib/Target/X86/Printer.cpp:1.3 --- llvm/lib/Target/X86/Printer.cpp:1.2 Mon Oct 28 17:55:19 2002 +++ llvm/lib/Target/X86/Printer.cpp Tue Oct 29 16:37:54 2002 @@ -6,16 +6,37 @@ //===----------------------------------------------------------------------===// #include "X86.h" +#include "llvm/Pass.h" +#include "llvm/CodeGen/MachineFunction.h" #include -/// X86PrintCode - Print out the specified machine code function to the -/// specified stream. This function should work regardless of whether or not -/// the function is in SSA form or not, although when in SSA form, we obviously -/// don't care about being consumable by an assembler. -/// -void X86PrintCode(const MachineFunction *MF, std::ostream &O) { +namespace { + struct Printer : public FunctionPass { + TargetMachine &TM; + std::ostream &O; + + Printer(TargetMachine &tm, std::ostream &o) : TM(tm), O(o) {} + + bool runOnFunction(Function &F); + }; +} + +bool Printer::runOnFunction(Function &F) { + MachineFunction &MF = MachineFunction::get(&F); O << "x86 printing not implemented yet!\n"; + + // This should use the X86InstructionInfo::print method to print assembly + // for each instruction + return false; +} - // This should use the X86InstructionInfo::print method to print assembly for - // each instruction + + + +/// createX86CodePrinterPass - Print out the specified machine code function to +/// the specified stream. This function should work regardless of whether or +/// not the function is in SSA form or not. +/// +Pass *createX86CodePrinterPass(TargetMachine &TM, std::ostream &O) { + return new Printer(TM, O); } Index: llvm/lib/Target/X86/X86.h diff -u llvm/lib/Target/X86/X86.h:1.4 llvm/lib/Target/X86/X86.h:1.5 --- llvm/lib/Target/X86/X86.h:1.4 Tue Oct 29 15:05:24 2002 +++ llvm/lib/Target/X86/X86.h Tue Oct 29 16:37:54 2002 @@ -11,34 +11,32 @@ #define TARGET_X86_H #include -class MachineFunction; -class Function; class TargetMachine; +class Pass; -/// X86PrintCode - Print out the specified machine code function to the -/// specified stream. This function should work regardless of whether or not -/// the function is in SSA form or not. -/// -void X86PrintCode(const MachineFunction *MF, std::ostream &O); - -/// X86SimpleInstructionSelection - This function converts an LLVM function into -/// a machine code representation is a very simple peep-hole fashion. The +/// createSimpleX86InstructionSelector - This pass converts an LLVM function +/// into a machine code representation is a very simple peep-hole fashion. The /// generated code sucks but the implementation is nice and simple. /// -MachineFunction *X86SimpleInstructionSelection(Function &F, TargetMachine &TM); +Pass *createSimpleX86InstructionSelector(TargetMachine &TM); /// X86SimpleRegisterAllocation - This function converts the specified machine /// code function from SSA form to use explicit registers by spilling every /// register. Wow, great policy huh? /// -inline void X86SimpleRegisterAllocation(MachineFunction *MF) {} +Pass *createSimpleX86RegisterAllocator(TargetMachine &TM); + +/// createX86CodePrinterPass - Print out the specified machine code function to +/// the specified stream. This function should work regardless of whether or +/// not the function is in SSA form or not. +/// +Pass *createX86CodePrinterPass(TargetMachine &TM, std::ostream &O); /// X86EmitCodeToMemory - This function converts a register allocated function /// into raw machine code in a dynamically allocated chunk of memory. A pointer /// to the start of the function is returned. /// -inline void *X86EmitCodeToMemory(MachineFunction *MF) { return 0; } - +Pass *createEmitX86CodeToMemory(TargetMachine &TM); // Put symbolic names in a namespace to avoid causing these to clash with all // kinds of other things... From brukman at neo.cs.uiuc.edu Tue Oct 29 16:56:01 2002 From: brukman at neo.cs.uiuc.edu (Misha Brukman) Date: Tue Oct 29 16:56:01 2002 Subject: [llvm-commits] CVS: llvm/include/llvm/Analysis/DataStructure.h IntervalPartition.h Message-ID: <200210292255.g9TMtME10528@neo.cs.uiuc.edu> Changes in directory llvm/include/llvm/Analysis: DataStructure.h updated: 1.47 -> 1.48 IntervalPartition.h updated: 1.16 -> 1.17 --- Log message: Fixed spelling of `propagation'. --- Diffs of the changes: Index: llvm/include/llvm/Analysis/DataStructure.h diff -u llvm/include/llvm/Analysis/DataStructure.h:1.47 llvm/include/llvm/Analysis/DataStructure.h:1.48 --- llvm/include/llvm/Analysis/DataStructure.h:1.47 Tue Oct 22 10:58:23 2002 +++ llvm/include/llvm/Analysis/DataStructure.h Tue Oct 29 16:55:11 2002 @@ -62,7 +62,7 @@ // BUDataStructures - The analysis that computes the interprocedurally closed // data structure graphs for all of the functions in the program. This pass -// only performs a "Bottom Up" propogation (hence the name). +// only performs a "Bottom Up" propagation (hence the name). // class BUDataStructures : public Pass { // DSInfo, one graph for each function Index: llvm/include/llvm/Analysis/IntervalPartition.h diff -u llvm/include/llvm/Analysis/IntervalPartition.h:1.16 llvm/include/llvm/Analysis/IntervalPartition.h:1.17 --- llvm/include/llvm/Analysis/IntervalPartition.h:1.16 Wed Aug 21 12:09:19 2002 +++ llvm/include/llvm/Analysis/IntervalPartition.h Tue Oct 29 16:55:11 2002 @@ -89,7 +89,7 @@ // updatePredecessors - Interval generation only sets the successor fields of // the interval data structures. After interval generation is complete, - // run through all of the intervals and propogate successor info as + // run through all of the intervals and propagate successor info as // predecessor info. // void updatePredecessors(Interval *Int); From brukman at neo.cs.uiuc.edu Tue Oct 29 17:02:01 2002 From: brukman at neo.cs.uiuc.edu (Misha Brukman) Date: Tue Oct 29 17:02:01 2002 Subject: [llvm-commits] CVS: llvm/lib/Analysis/IntervalPartition.cpp Message-ID: <200210292301.g9TN1Qi10618@neo.cs.uiuc.edu> Changes in directory llvm/lib/Analysis: IntervalPartition.cpp updated: 1.20 -> 1.21 --- Log message: Fix spelling of `propagate'. --- Diffs of the changes: Index: llvm/lib/Analysis/IntervalPartition.cpp diff -u llvm/lib/Analysis/IntervalPartition.cpp:1.20 llvm/lib/Analysis/IntervalPartition.cpp:1.21 --- llvm/lib/Analysis/IntervalPartition.cpp:1.20 Wed Aug 21 12:09:29 2002 +++ llvm/lib/Analysis/IntervalPartition.cpp Tue Oct 29 17:01:15 2002 @@ -44,7 +44,7 @@ // updatePredecessors - Interval generation only sets the successor fields of // the interval data structures. After interval generation is complete, -// run through all of the intervals and propogate successor info as +// run through all of the intervals and propagate successor info as // predecessor info. // void IntervalPartition::updatePredecessors(Interval *Int) { @@ -70,7 +70,7 @@ for_each(I, intervals_end(&F), bind_obj(this, &IntervalPartition::addIntervalToPartition)); - // Now that we know all of the successor information, propogate this to the + // Now that we know all of the successor information, propagate this to the // predecessors for each block... for_each(Intervals.begin(), Intervals.end(), bind_obj(this, &IntervalPartition::updatePredecessors)); @@ -98,7 +98,7 @@ for_each(I, intervals_end(IP), bind_obj(this, &IntervalPartition::addIntervalToPartition)); - // Now that we know all of the successor information, propogate this to the + // Now that we know all of the successor information, propagate this to the // predecessors for each block... for_each(Intervals.begin(), Intervals.end(), bind_obj(this, &IntervalPartition::updatePredecessors)); From brukman at neo.cs.uiuc.edu Tue Oct 29 17:03:01 2002 From: brukman at neo.cs.uiuc.edu (Misha Brukman) Date: Tue Oct 29 17:03:01 2002 Subject: [llvm-commits] CVS: llvm/lib/Analysis/LiveVar/BBLiveVar.cpp BBLiveVar.h Message-ID: <200210292302.g9TN24Y10633@neo.cs.uiuc.edu> Changes in directory llvm/lib/Analysis/LiveVar: BBLiveVar.cpp updated: 1.30 -> 1.31 BBLiveVar.h updated: 1.17 -> 1.18 --- Log message: Fix spelling of `propagate'. --- Diffs of the changes: Index: llvm/lib/Analysis/LiveVar/BBLiveVar.cpp diff -u llvm/lib/Analysis/LiveVar/BBLiveVar.cpp:1.30 llvm/lib/Analysis/LiveVar/BBLiveVar.cpp:1.31 --- llvm/lib/Analysis/LiveVar/BBLiveVar.cpp:1.30 Mon Oct 28 12:01:21 2002 +++ llvm/lib/Analysis/LiveVar/BBLiveVar.cpp Tue Oct 29 17:01:54 2002 @@ -197,7 +197,7 @@ //----------------------------------------------------------------------------- -// propogates in set to OutSets of PREDECESSORs +// propagates in set to OutSets of PREDECESSORs //----------------------------------------------------------------------------- bool BBLiveVar::applyFlowFunc() { Index: llvm/lib/Analysis/LiveVar/BBLiveVar.h diff -u llvm/lib/Analysis/LiveVar/BBLiveVar.h:1.17 llvm/lib/Analysis/LiveVar/BBLiveVar.h:1.18 --- llvm/lib/Analysis/LiveVar/BBLiveVar.h:1.17 Mon Oct 28 12:01:21 2002 +++ llvm/lib/Analysis/LiveVar/BBLiveVar.h Tue Oct 29 17:01:54 2002 @@ -38,7 +38,7 @@ // treated differently from ordinary uses. std::map PredToEdgeInSetMap; - // method to propogate an InSet to OutSet of a predecessor + // method to propagate an InSet to OutSet of a predecessor bool setPropagate(ValueSet *OutSetOfPred, const ValueSet *InSetOfThisBB, const BasicBlock *PredBB); From brukman at neo.cs.uiuc.edu Tue Oct 29 17:04:00 2002 From: brukman at neo.cs.uiuc.edu (Misha Brukman) Date: Tue Oct 29 17:04:00 2002 Subject: [llvm-commits] CVS: llvm/lib/Transforms/Scalar/CorrelatedExprs.cpp InstructionCombining.cpp SCCP.cpp Message-ID: <200210292303.g9TN3Vt10660@neo.cs.uiuc.edu> Changes in directory llvm/lib/Transforms/Scalar: CorrelatedExprs.cpp updated: 1.6 -> 1.7 InstructionCombining.cpp updated: 1.62 -> 1.63 SCCP.cpp updated: 1.62 -> 1.63 --- Log message: Fix spelling of `propagate'. --- Diffs of the changes: Index: llvm/lib/Transforms/Scalar/CorrelatedExprs.cpp diff -u llvm/lib/Transforms/Scalar/CorrelatedExprs.cpp:1.6 llvm/lib/Transforms/Scalar/CorrelatedExprs.cpp:1.7 --- llvm/lib/Transforms/Scalar/CorrelatedExprs.cpp:1.6 Tue Oct 8 16:34:15 2002 +++ llvm/lib/Transforms/Scalar/CorrelatedExprs.cpp Tue Oct 29 17:03:20 2002 @@ -1,12 +1,12 @@ //===- CorrelatedExprs.cpp - Pass to detect and eliminated c.e.'s ---------===// // -// Correlated Expression Elimination propogates information from conditional -// branches to blocks dominated by destinations of the branch. It propogates +// Correlated Expression Elimination propagates information from conditional +// branches to blocks dominated by destinations of the branch. It propagates // information from the condition check itself into the body of the branch, // allowing transformations like these for example: // // if (i == 7) -// ... 4*i; // constant propogation +// ... 4*i; // constant propagation // // M = i+1; N = j+1; // if (i == j) @@ -91,7 +91,7 @@ // kept sorted by the Val field. std::vector Relationships; - // If information about this value is known or propogated from constant + // If information about this value is known or propagated from constant // expressions, this range contains the possible values this value may hold. ConstantRange Bounds; @@ -254,9 +254,9 @@ void InsertRegionExitMerges(PHINode *NewPHI, Instruction *OldVal, const std::vector &RegionExitBlocks); - void PropogateBranchInfo(BranchInst *BI); - void PropogateEquality(Value *Op0, Value *Op1, RegionInfo &RI); - void PropogateRelation(Instruction::BinaryOps Opcode, Value *Op0, + void PropagateBranchInfo(BranchInst *BI); + void PropagateEquality(Value *Op0, Value *Op1, RegionInfo &RI); + void PropagateRelation(Instruction::BinaryOps Opcode, Value *Op0, Value *Op1, RegionInfo &RI); void UpdateUsersOfValue(Value *V, RegionInfo &RI); void IncorporateInstruction(Instruction *Inst, RegionInfo &RI); @@ -331,11 +331,11 @@ // Loop over all of the blocks that this block is the immediate dominator for. // Because all information known in this region is also known in all of the - // blocks that are dominated by this one, we can safely propogate the + // blocks that are dominated by this one, we can safely propagate the // information down now. // DominatorTree::Node *BBN = (*DT)[BB]; - if (!RI.empty()) // Time opt: only propogate if we can change something + if (!RI.empty()) // Time opt: only propagate if we can change something for (unsigned i = 0, e = BBN->getChildren().size(); i != e; ++i) { BasicBlock *Dominated = BBN->getChildren()[i]->getNode(); assert(RegionInfoMap.find(Dominated) == RegionInfoMap.end() && @@ -344,11 +344,11 @@ } // Now that all of our successors have information if they deserve it, - // propogate any information our terminator instruction finds to our + // propagate any information our terminator instruction finds to our // successors. if (BranchInst *BI = dyn_cast(TI)) if (BI->isConditional()) - PropogateBranchInfo(BI); + PropagateBranchInfo(BI); // If this is a branch to a block outside our region that simply performs // another conditional branch, one whose outcome is known inside of this @@ -453,11 +453,11 @@ if (PHINode *PN = dyn_cast(&*I)) { int OpNum = PN->getBasicBlockIndex(BB); assert(OpNum != -1 && "PHI doesn't have incoming edge for predecessor!?"); - PropogateEquality(PN, PN->getIncomingValue(OpNum), NewRI); + PropagateEquality(PN, PN->getIncomingValue(OpNum), NewRI); } else if (SetCondInst *SCI = dyn_cast(&*I)) { Relation::KnownResult Res = getSetCCResult(SCI, NewRI); if (Res == Relation::Unknown) return false; - PropogateEquality(SCI, ConstantBool::get(Res), NewRI); + PropagateEquality(SCI, ConstantBool::get(Res), NewRI); } else { assert(isa(*I) && "Unexpected instruction type!"); } @@ -760,30 +760,30 @@ } -// PropogateBranchInfo - When this method is invoked, we need to propogate +// PropagateBranchInfo - When this method is invoked, we need to propagate // information derived from the branch condition into the true and false // branches of BI. Since we know that there aren't any critical edges in the // flow graph, this can proceed unconditionally. // -void CEE::PropogateBranchInfo(BranchInst *BI) { +void CEE::PropagateBranchInfo(BranchInst *BI) { assert(BI->isConditional() && "Must be a conditional branch!"); - // Propogate information into the true block... + // Propagate information into the true block... // - PropogateEquality(BI->getCondition(), ConstantBool::True, + PropagateEquality(BI->getCondition(), ConstantBool::True, getRegionInfo(BI->getSuccessor(0))); - // Propogate information into the false block... + // Propagate information into the false block... // - PropogateEquality(BI->getCondition(), ConstantBool::False, + PropagateEquality(BI->getCondition(), ConstantBool::False, getRegionInfo(BI->getSuccessor(1))); } -// PropogateEquality - If we discover that two values are equal to each other in -// a specified region, propogate this knowledge recursively. +// PropagateEquality - If we discover that two values are equal to each other in +// a specified region, propagate this knowledge recursively. // -void CEE::PropogateEquality(Value *Op0, Value *Op1, RegionInfo &RI) { +void CEE::PropagateEquality(Value *Op0, Value *Op1, RegionInfo &RI) { if (Op0 == Op1) return; // Gee whiz. Are these really equal each other? if (isa(Op0)) // Make sure the constant is always Op1 @@ -811,8 +811,8 @@ // as well. // if (CB->getValue() && Inst->getOpcode() == Instruction::And) { - PropogateEquality(Inst->getOperand(0), CB, RI); - PropogateEquality(Inst->getOperand(1), CB, RI); + PropagateEquality(Inst->getOperand(0), CB, RI); + PropagateEquality(Inst->getOperand(1), CB, RI); } // If we know that this instruction is an OR instruction, and the result @@ -820,8 +820,8 @@ // as well. // if (!CB->getValue() && Inst->getOpcode() == Instruction::Or) { - PropogateEquality(Inst->getOperand(0), CB, RI); - PropogateEquality(Inst->getOperand(1), CB, RI); + PropagateEquality(Inst->getOperand(0), CB, RI); + PropagateEquality(Inst->getOperand(1), CB, RI); } // If we know that this instruction is a NOT instruction, we know that the @@ -829,48 +829,48 @@ // if (BinaryOperator *BOp = dyn_cast(Inst)) if (BinaryOperator::isNot(BOp)) - PropogateEquality(BinaryOperator::getNotArgument(BOp), + PropagateEquality(BinaryOperator::getNotArgument(BOp), ConstantBool::get(!CB->getValue()), RI); - // If we know the value of a SetCC instruction, propogate the information + // If we know the value of a SetCC instruction, propagate the information // about the relation into this region as well. // if (SetCondInst *SCI = dyn_cast(Inst)) { if (CB->getValue()) { // If we know the condition is true... - // Propogate info about the LHS to the RHS & RHS to LHS - PropogateRelation(SCI->getOpcode(), SCI->getOperand(0), + // Propagate info about the LHS to the RHS & RHS to LHS + PropagateRelation(SCI->getOpcode(), SCI->getOperand(0), SCI->getOperand(1), RI); - PropogateRelation(SCI->getSwappedCondition(), + PropagateRelation(SCI->getSwappedCondition(), SCI->getOperand(1), SCI->getOperand(0), RI); } else { // If we know the condition is false... // We know the opposite of the condition is true... Instruction::BinaryOps C = SCI->getInverseCondition(); - PropogateRelation(C, SCI->getOperand(0), SCI->getOperand(1), RI); - PropogateRelation(SetCondInst::getSwappedCondition(C), + PropagateRelation(C, SCI->getOperand(0), SCI->getOperand(1), RI); + PropagateRelation(SetCondInst::getSwappedCondition(C), SCI->getOperand(1), SCI->getOperand(0), RI); } } } } - // Propogate information about Op0 to Op1 & visa versa - PropogateRelation(Instruction::SetEQ, Op0, Op1, RI); - PropogateRelation(Instruction::SetEQ, Op1, Op0, RI); + // Propagate information about Op0 to Op1 & visa versa + PropagateRelation(Instruction::SetEQ, Op0, Op1, RI); + PropagateRelation(Instruction::SetEQ, Op1, Op0, RI); } -// PropogateRelation - We know that the specified relation is true in all of the -// blocks in the specified region. Propogate the information about Op0 and +// PropagateRelation - We know that the specified relation is true in all of the +// blocks in the specified region. Propagate the information about Op0 and // anything derived from it into this region. // -void CEE::PropogateRelation(Instruction::BinaryOps Opcode, Value *Op0, +void CEE::PropagateRelation(Instruction::BinaryOps Opcode, Value *Op0, Value *Op1, RegionInfo &RI) { assert(Op0->getType() == Op1->getType() && "Equal types expected!"); // Constants are already pretty well understood. We will apply information - // about the constant to Op1 in another call to PropogateRelation. + // about the constant to Op1 in another call to PropagateRelation. // if (isa(Op0)) return; @@ -896,7 +896,7 @@ } // If the information propogted is new, then we want process the uses of this - // instruction to propogate the information down to them. + // instruction to propagate the information down to them. // if (Op1R.incorporate(Opcode, VI)) UpdateUsersOfValue(Op0, RI); @@ -904,16 +904,16 @@ // UpdateUsersOfValue - The information about V in this region has been updated. -// Propogate this to all consumers of the value. +// Propagate this to all consumers of the value. // void CEE::UpdateUsersOfValue(Value *V, RegionInfo &RI) { for (Value::use_iterator I = V->use_begin(), E = V->use_end(); I != E; ++I) if (Instruction *Inst = dyn_cast(*I)) { // If this is an instruction using a value that we know something about, - // try to propogate information to the value produced by the + // try to propagate information to the value produced by the // instruction. We can only do this if it is an instruction we can - // propogate information for (a setcc for example), and we only WANT to + // propagate information for (a setcc for example), and we only WANT to // do this if the instruction dominates this region. // // If the instruction doesn't dominate this region, then it cannot be @@ -937,7 +937,7 @@ // See if we can figure out a result for this instruction... Relation::KnownResult Result = getSetCCResult(SCI, RI); if (Result != Relation::Unknown) { - PropogateEquality(SCI, Result ? ConstantBool::True : ConstantBool::False, + PropagateEquality(SCI, Result ? ConstantBool::True : ConstantBool::False, RI); } } Index: llvm/lib/Transforms/Scalar/InstructionCombining.cpp diff -u llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.62 llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.63 --- llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.62 Mon Oct 21 15:00:26 2002 +++ llvm/lib/Transforms/Scalar/InstructionCombining.cpp Tue Oct 29 17:03:20 2002 @@ -726,7 +726,7 @@ Instruction *I = WorkList.back(); // Get an instruction from the worklist WorkList.pop_back(); - // Check to see if we can DCE or ConstantPropogate the instruction... + // Check to see if we can DCE or ConstantPropagate the instruction... // Check to see if we can DIE the instruction... if (isInstructionTriviallyDead(I)) { // Add operands to the worklist... @@ -742,7 +742,7 @@ } } - // Instruction isn't dead, see if we can constant propogate it... + // Instruction isn't dead, see if we can constant propagate it... if (Constant *C = ConstantFoldInstruction(I)) { // Add operands to the worklist... for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i) Index: llvm/lib/Transforms/Scalar/SCCP.cpp diff -u llvm/lib/Transforms/Scalar/SCCP.cpp:1.62 llvm/lib/Transforms/Scalar/SCCP.cpp:1.63 --- llvm/lib/Transforms/Scalar/SCCP.cpp:1.62 Mon Oct 21 15:00:26 2002 +++ llvm/lib/Transforms/Scalar/SCCP.cpp Tue Oct 29 17:03:20 2002 @@ -482,7 +482,7 @@ InstVal &VState = getValueState(V); if (VState.isOverdefined()) { // Inherit overdefinedness of operand markOverdefined(&I); - } else if (VState.isConstant()) { // Propogate constant value + } else if (VState.isConstant()) { // Propagate constant value Constant *Result = ConstantFoldCastInstruction(VState.getConstant(), I.getType()); From brukman at neo.cs.uiuc.edu Tue Oct 29 17:05:01 2002 From: brukman at neo.cs.uiuc.edu (Misha Brukman) Date: Tue Oct 29 17:05:01 2002 Subject: [llvm-commits] CVS: llvm/lib/Transforms/Utils/BasicBlockUtils.cpp SimplifyCFG.cpp Message-ID: <200210292304.g9TN4Bi10674@neo.cs.uiuc.edu> Changes in directory llvm/lib/Transforms/Utils: BasicBlockUtils.cpp updated: 1.3 -> 1.4 SimplifyCFG.cpp updated: 1.6 -> 1.7 --- Log message: Fix spelling of `propagate'. --- Diffs of the changes: Index: llvm/lib/Transforms/Utils/BasicBlockUtils.cpp diff -u llvm/lib/Transforms/Utils/BasicBlockUtils.cpp:1.3 llvm/lib/Transforms/Utils/BasicBlockUtils.cpp:1.4 --- llvm/lib/Transforms/Utils/BasicBlockUtils.cpp:1.3 Mon Jul 29 17:32:08 2002 +++ llvm/lib/Transforms/Utils/BasicBlockUtils.cpp Tue Oct 29 17:04:01 2002 @@ -26,7 +26,7 @@ // Delete the unneccesary instruction now... BI = BIL.erase(BI); - // Make sure to propogate a name if there is one already... + // Make sure to propagate a name if there is one already... if (OldName.size() && !V->hasName()) V->setName(OldName, BIL.getParent()->getSymbolTable()); } Index: llvm/lib/Transforms/Utils/SimplifyCFG.cpp diff -u llvm/lib/Transforms/Utils/SimplifyCFG.cpp:1.6 llvm/lib/Transforms/Utils/SimplifyCFG.cpp:1.7 --- llvm/lib/Transforms/Utils/SimplifyCFG.cpp:1.6 Tue Oct 8 16:36:33 2002 +++ llvm/lib/Transforms/Utils/SimplifyCFG.cpp Tue Oct 29 17:04:01 2002 @@ -11,7 +11,7 @@ #include #include -// PropogatePredecessors - This gets "Succ" ready to have the predecessors from +// PropagatePredecessors - This gets "Succ" ready to have the predecessors from // "BB". This is a little tricky because "Succ" has PHI nodes, which need to // have extra slots added to them to hold the merge edges from BB's // predecessors. This function returns true (failure) if the Succ BB already @@ -19,7 +19,7 @@ // // Assumption: Succ is the single successor for BB. // -static bool PropogatePredecessorsForPHIs(BasicBlock *BB, BasicBlock *Succ) { +static bool PropagatePredecessorsForPHIs(BasicBlock *BB, BasicBlock *Succ) { assert(*succ_begin(BB) == Succ && "Succ is not successor of BB!"); if (!isa(Succ->front())) @@ -112,7 +112,7 @@ // Be careful though, if this transformation fails (returns true) then // we cannot do this transformation! // - if (!PropogatePredecessorsForPHIs(BB, Succ)) { + if (!PropagatePredecessorsForPHIs(BB, Succ)) { //cerr << "Killing Trivial BB: \n" << BB; BB->replaceAllUsesWith(Succ); std::string OldName = BB->getName(); From brukman at neo.cs.uiuc.edu Tue Oct 29 17:06:01 2002 From: brukman at neo.cs.uiuc.edu (Misha Brukman) Date: Tue Oct 29 17:06:01 2002 Subject: [llvm-commits] CVS: llvm/lib/VMCore/PassManagerT.h Message-ID: <200210292305.g9TN5SJ10689@neo.cs.uiuc.edu> Changes in directory llvm/lib/VMCore: PassManagerT.h updated: 1.34 -> 1.35 --- Log message: Fix spelling of `propagate'. --- Diffs of the changes: Index: llvm/lib/VMCore/PassManagerT.h diff -u llvm/lib/VMCore/PassManagerT.h:1.34 llvm/lib/VMCore/PassManagerT.h:1.35 --- llvm/lib/VMCore/PassManagerT.h:1.34 Mon Oct 21 15:00:28 2002 +++ llvm/lib/VMCore/PassManagerT.h Tue Oct 29 17:05:17 2002 @@ -358,7 +358,7 @@ return 0; } - // {start/end}Pass - Called when a pass is started, it just propogates + // {start/end}Pass - Called when a pass is started, it just propagates // information up to the top level PassManagerT object to tell it that a pass // has started or ended. This is used to gather timing information about // passes. @@ -384,7 +384,7 @@ LastUseOf[I->second] = User; // Local pass, extend the lifetime } else { // Pass not in current available set, must be a higher level pass - // available to us, propogate to parent pass manager... We tell the + // available to us, propagate to parent pass manager... We tell the // parent that we (the passmanager) are using the analysis so that it // frees the analysis AFTER this pass manager runs. // From brukman at cs.uiuc.edu Tue Oct 29 17:07:01 2002 From: brukman at cs.uiuc.edu (Michael Brukman) Date: Tue Oct 29 17:07:01 2002 Subject: [llvm-commits] CVS: llvm/www/docs/LangRef.html Message-ID: <200210292306.RAA24905@tank.cs.uiuc.edu> Changes in directory llvm/www/docs: LangRef.html updated: 1.17 -> 1.18 --- Log message: Fix spelling of `propagate'. --- Diffs of the changes: Index: llvm/www/docs/LangRef.html diff -u llvm/www/docs/LangRef.html:1.17 llvm/www/docs/LangRef.html:1.18 --- llvm/www/docs/LangRef.html:1.17 Tue Sep 17 21:35:14 2002 +++ llvm/www/docs/LangRef.html Tue Oct 29 17:06:16 2002 @@ -621,7 +621,7 @@ When the 'ret' instruction is executed, control flow returns back to the calling function's context. If the instruction returns a value, that value -shall be propogated into the calling function's data space.

+shall be propagated into the calling function's data space.

Example:
@@ -1700,7 +1700,7 @@
 
Chris Lattner

 
 
-Last modified: Tue Sep 17 21:34:30 CDT 2002
+Last modified: Tue Oct 29 01:57:05 CST 2002
 
 
 




From lattner at cs.uiuc.edu  Tue Oct 29 17:19:00 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Oct 29 17:19:00 2002
Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h MachineInstrBuilder.h
Message-ID: <200210292318.RAA20728@apoc.cs.uiuc.edu>


Changes in directory llvm/include/llvm/CodeGen:

MachineInstr.h updated: 1.80 -> 1.81
MachineInstrBuilder.h updated: 1.2 -> 1.3

---
Log message:

Add capability to have machine instruction autoinsert when it is created


---
Diffs of the changes:

Index: llvm/include/llvm/CodeGen/MachineInstr.h
diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.80 llvm/include/llvm/CodeGen/MachineInstr.h:1.81
--- llvm/include/llvm/CodeGen/MachineInstr.h:1.80	Tue Oct 29 13:41:18 2002
+++ llvm/include/llvm/CodeGen/MachineInstr.h	Tue Oct 29 17:18:23 2002
@@ -15,6 +15,7 @@
 #include 
 class Value;
 class Function;
+class MachineBasicBlock;
 
 typedef int MachineOpCode;
 
@@ -239,19 +240,26 @@
   /// MachineInstr ctor - This constructor only does a _reserve_ of the
   /// operands, not a resize for them.  It is expected that if you use this that
   /// you call add* methods below to fill up the operands, instead of the Set
-  /// methods.
+  /// methods.  Eventually, the "resizing" ctors will be phased out.
   ///
   MachineInstr(MachineOpCode Opcode, unsigned numOperands, bool XX, bool YY);
 
-  // 
-  // Support to rewrite a machine instruction in place: for now, simply
-  // replace() and then set new operands with Set.*Operand methods below.
-  // 
+  /// MachineInstr ctor - Work exactly the same as the ctor above, except that
+  /// the MachineInstr is created and added to the end of the specified basic
+  /// block.
+  ///
+  MachineInstr(MachineBasicBlock *MBB, MachineOpCode Opcode, unsigned numOps);
+  
+
+  /// replace - Support to rewrite a machine instruction in place: for now,
+  /// simply replace() and then set new operands with Set.*Operand methods
+  /// below.
+  /// 
   void replace(MachineOpCode Opcode, unsigned numOperands);
   
-  //
   // The opcode.
   // 
+  const MachineOpCode getOpcode() const { return opCode; }
   const MachineOpCode getOpCode() const { return opCode; }
 
   //


Index: llvm/include/llvm/CodeGen/MachineInstrBuilder.h
diff -u llvm/include/llvm/CodeGen/MachineInstrBuilder.h:1.2 llvm/include/llvm/CodeGen/MachineInstrBuilder.h:1.3
--- llvm/include/llvm/CodeGen/MachineInstrBuilder.h:1.2	Mon Oct 28 15:43:42 2002
+++ llvm/include/llvm/CodeGen/MachineInstrBuilder.h	Tue Oct 29 17:18:23 2002
@@ -78,11 +78,9 @@
   return MachineInstrBuilder(new MachineInstr(Opcode, NumOperands, true, true));
 }
 
-#if 0
-inline MachineInstrBuilder BuildMI(MBasicBlock *BB, MachineOpCode Opcode,
-                                   unsigned DestReg = 0) {
-  return MachineInstrBuilder(new MachineInstr(BB, Opcode, DestReg));
+inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB, MachineOpCode Opcode,
+                                   unsigned NumOperands) {
+  return MachineInstrBuilder(new MachineInstr(BB, Opcode, NumOperands));
 }
-#endif
-                                
+
 #endif




From lattner at cs.uiuc.edu  Tue Oct 29 17:19:04 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Oct 29 17:19:04 2002
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/MachineFunction.cpp
Message-ID: <200210292318.RAA20739@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/CodeGen:

MachineFunction.cpp updated: 1.26 -> 1.27

---
Log message:

Rename annotation id


---
Diffs of the changes:

Index: llvm/lib/CodeGen/MachineFunction.cpp
diff -u llvm/lib/CodeGen/MachineFunction.cpp:1.26 llvm/lib/CodeGen/MachineFunction.cpp:1.27
--- llvm/lib/CodeGen/MachineFunction.cpp:1.26	Mon Oct 28 14:00:19 2002
+++ llvm/lib/CodeGen/MachineFunction.cpp	Tue Oct 29 17:18:43 2002
@@ -19,7 +19,7 @@
 
 const int INVALID_FRAME_OFFSET = INT_MAX; // std::numeric_limits::max();
 
-static AnnotationID MCFM_AID(
+static AnnotationID MF_AID(
                  AnnotationManager::getID("CodeGen::MachineCodeForFunction"));
 
 
@@ -86,7 +86,7 @@
 MachineFunction&
 MachineFunction::construct(const Function *Fn, const TargetMachine &Tar)
 {
-  assert(Fn->getAnnotation(MCFM_AID) == 0 &&
+  assert(Fn->getAnnotation(MF_AID) == 0 &&
          "Object already exists for this function!");
   MachineFunction* mcInfo = new MachineFunction(Fn, Tar);
   Fn->addAnnotation(mcInfo);
@@ -96,13 +96,13 @@
 void
 MachineFunction::destruct(const Function *Fn)
 {
-  bool Deleted = Fn->deleteAnnotation(MCFM_AID);
+  bool Deleted = Fn->deleteAnnotation(MF_AID);
   assert(Deleted && "Machine code did not exist for function!");
 }
 
 MachineFunction& MachineFunction::get(const Function *F)
 {
-  MachineFunction *mc = (MachineFunction*)F->getAnnotation(MCFM_AID);
+  MachineFunction *mc = (MachineFunction*)F->getAnnotation(MF_AID);
   assert(mc && "Call construct() method first to allocate the object");
   return *mc;
 }
@@ -176,7 +176,7 @@
 /*ctor*/
 MachineFunction::MachineFunction(const Function *F,
                                  const TargetMachine& target)
-  : Annotation(MCFM_AID),
+  : Annotation(MF_AID),
     Fn(F), Target(target), staticStackSize(0),
     automaticVarsSize(0), regSpillsSize(0),
     maxOptionalArgsSize(0), maxOptionalNumArgs(0),




From lattner at cs.uiuc.edu  Tue Oct 29 17:20:02 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Oct 29 17:20:02 2002
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/MachineInstr.cpp
Message-ID: <200210292319.RAA20750@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/CodeGen:

MachineInstr.cpp updated: 1.58 -> 1.59

---
Log message:

Implement autoinserting ctor


---
Diffs of the changes:

Index: llvm/lib/CodeGen/MachineInstr.cpp
diff -u llvm/lib/CodeGen/MachineInstr.cpp:1.58 llvm/lib/CodeGen/MachineInstr.cpp:1.59
--- llvm/lib/CodeGen/MachineInstr.cpp:1.58	Tue Oct 29 13:40:17 2002
+++ llvm/lib/CodeGen/MachineInstr.cpp	Tue Oct 29 17:19:00 2002
@@ -3,6 +3,7 @@
 //===----------------------------------------------------------------------===//
 
 #include "llvm/CodeGen/MachineInstr.h"
+#include "llvm/CodeGen/MachineBasicBlock.h"
 #include "llvm/Value.h"
 #include "llvm/Target/MachineInstrInfo.h"  // FIXME: shouldn't need this!
 using std::cerr;
@@ -33,6 +34,11 @@
 {
 }
 
+/// MachineInstr ctor - This constructor only does a _reserve_ of the operands,
+/// not a resize for them.  It is expected that if you use this that you call
+/// add* methods below to fill up the operands, instead of the Set methods.
+/// Eventually, the "resizing" ctors will be phased out.
+///
 MachineInstr::MachineInstr(MachineOpCode Opcode, unsigned numOperands,
                            bool XX, bool YY)
   : opCode(Opcode),
@@ -40,6 +46,20 @@
 {
   operands.reserve(numOperands);
 }
+
+/// MachineInstr ctor - Work exactly the same as the ctor above, except that the
+/// MachineInstr is created and added to the end of the specified basic block.
+///
+MachineInstr::MachineInstr(MachineBasicBlock *MBB, MachineOpCode Opcode,
+                           unsigned numOperands)
+  : opCode(Opcode),
+    numImplicitRefs(0)
+{
+  assert(MBB && "Cannot use inserting ctor with null basic block!");
+  operands.reserve(numOperands);
+  MBB->push_back(this);  // Add instruction to end of basic block!
+}
+
 
 // OperandComplete - Return true if it's illegal to add a new operand
 bool MachineInstr::OperandsComplete() const




From lattner at cs.uiuc.edu  Tue Oct 29 17:41:01 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Oct 29 17:41:01 2002
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/MachineFunction.cpp
Message-ID: <200210292340.RAA21933@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/CodeGen:

MachineFunction.cpp updated: 1.27 -> 1.28

---
Log message:

Make argsize calculation stuff optional, so that Targets without FrameInfo 
objects yet don't die


---
Diffs of the changes:

Index: llvm/lib/CodeGen/MachineFunction.cpp
diff -u llvm/lib/CodeGen/MachineFunction.cpp:1.27 llvm/lib/CodeGen/MachineFunction.cpp:1.28
--- llvm/lib/CodeGen/MachineFunction.cpp:1.27	Tue Oct 29 17:18:43 2002
+++ llvm/lib/CodeGen/MachineFunction.cpp	Tue Oct 29 17:40:03 2002
@@ -38,7 +38,7 @@
     }
     
     bool runOnFunction(Function &F) {
-      MachineFunction::construct(&F, Target);
+      MachineFunction::construct(&F, Target).CalculateArgSize();
       return false;
     }
   };
@@ -173,7 +173,6 @@
 }
 
 
-/*ctor*/
 MachineFunction::MachineFunction(const Function *F,
                                  const TargetMachine& target)
   : Annotation(MF_AID),
@@ -183,10 +182,13 @@
     currentTmpValuesSize(0), maxTmpValuesSize(0), compiledAsLeaf(false),
     spillsAreaFrozen(false), automaticVarsAreaFrozen(false)
 {
-  maxOptionalArgsSize = ComputeMaxOptionalArgsSize(target, Fn,
+}
+
+void MachineFunction::CalculateArgSize() {
+  maxOptionalArgsSize = ComputeMaxOptionalArgsSize(Target, Fn,
                                                    maxOptionalNumArgs);
   staticStackSize = maxOptionalArgsSize
-                    + target.getFrameInfo().getMinStackFrameSize();
+    + Target.getFrameInfo().getMinStackFrameSize();
 }
 
 int




From lattner at cs.uiuc.edu  Tue Oct 29 17:41:05 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Oct 29 17:41:05 2002
Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineFunction.h
Message-ID: <200210292340.RAA21946@apoc.cs.uiuc.edu>


Changes in directory llvm/include/llvm/CodeGen:

MachineFunction.h updated: 1.17 -> 1.18

---
Log message:

Add method


---
Diffs of the changes:

Index: llvm/include/llvm/CodeGen/MachineFunction.h
diff -u llvm/include/llvm/CodeGen/MachineFunction.h:1.17 llvm/include/llvm/CodeGen/MachineFunction.h:1.18
--- llvm/include/llvm/CodeGen/MachineFunction.h:1.17	Tue Oct 29 11:14:10 2002
+++ llvm/include/llvm/CodeGen/MachineFunction.h	Tue Oct 29 17:40:30 2002
@@ -49,6 +49,12 @@
 public:
   MachineFunction(const Function *Fn, const TargetMachine& target);
 
+
+  /// CalculateArgSize - Call this method to fill in the maxOptionalArgsSize &
+  /// staticStackSize fields...
+  ///
+  void CalculateArgSize();
+
   /// getFunction - Return the LLVM function that this machine code represents
   ///
   const Function *getFunction() const { return Fn; }




From lattner at cs.uiuc.edu  Tue Oct 29 17:42:01 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Oct 29 17:42:01 2002
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/InstSelectSimple.cpp
Message-ID: <200210292341.RAA21977@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Target/X86:

InstSelectSimple.cpp updated: 1.7 -> 1.8

---
Log message:

Construct annotation, to make sure it's attached to function


---
Diffs of the changes:

Index: llvm/lib/Target/X86/InstSelectSimple.cpp
diff -u llvm/lib/Target/X86/InstSelectSimple.cpp:1.7 llvm/lib/Target/X86/InstSelectSimple.cpp:1.8
--- llvm/lib/Target/X86/InstSelectSimple.cpp:1.7	Tue Oct 29 16:37:54 2002
+++ llvm/lib/Target/X86/InstSelectSimple.cpp	Tue Oct 29 17:40:58 2002
@@ -32,7 +32,7 @@
     /// the entire function.
     ///
     bool runOnFunction(Function &Fn) {
-      F = new MachineFunction(&Fn, TM);
+      F = &MachineFunction::construct(&Fn, TM);
       visit(Fn);
       RegMap.clear();
       F = 0;




From lattner at cs.uiuc.edu  Tue Oct 29 17:42:05 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Oct 29 17:42:05 2002
Subject: [llvm-commits] CVS: llvm/tools/Makefile
Message-ID: <200210292341.RAA21990@apoc.cs.uiuc.edu>


Changes in directory llvm/tools:

Makefile updated: 1.14 -> 1.15

---
Log message:

Jello now builds


---
Diffs of the changes:

Index: llvm/tools/Makefile
diff -u llvm/tools/Makefile:1.14 llvm/tools/Makefile:1.15
--- llvm/tools/Makefile:1.14	Tue Sep 17 22:25:58 2002
+++ llvm/tools/Makefile	Tue Oct 29 17:41:11 2002
@@ -1,5 +1,5 @@
 LEVEL = ..
-PARALLEL_DIRS = as dis opt gccas llc link lli gccld analyze extract
+PARALLEL_DIRS = as dis opt gccas llc link lli gccld analyze extract jello
 
 include $(LEVEL)/Makefile.common
 




From lattner at cs.uiuc.edu  Tue Oct 29 18:47:01 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Oct 29 18:47:01 2002
Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineFunction.h
Message-ID: <200210300046.SAA24567@apoc.cs.uiuc.edu>


Changes in directory llvm/include/llvm/CodeGen:

MachineFunction.h updated: 1.18 -> 1.19

---
Log message:

Improve comments, add methods for structured printing


---
Diffs of the changes:

Index: llvm/include/llvm/CodeGen/MachineFunction.h
diff -u llvm/include/llvm/CodeGen/MachineFunction.h:1.18 llvm/include/llvm/CodeGen/MachineFunction.h:1.19
--- llvm/include/llvm/CodeGen/MachineFunction.h:1.18	Tue Oct 29 17:40:30 2002
+++ llvm/include/llvm/CodeGen/MachineFunction.h	Tue Oct 29 18:46:31 2002
@@ -24,6 +24,7 @@
 
 Pass *createMachineCodeConstructionPass(TargetMachine &Target);
 Pass *createMachineCodeDestructionPass();
+Pass *createMachineFunctionPrinterPass();
 
 class MachineFunction : private Annotation {
   const Function *Fn;
@@ -49,12 +50,6 @@
 public:
   MachineFunction(const Function *Fn, const TargetMachine& target);
 
-
-  /// CalculateArgSize - Call this method to fill in the maxOptionalArgsSize &
-  /// staticStackSize fields...
-  ///
-  void CalculateArgSize();
-
   /// getFunction - Return the LLVM function that this machine code represents
   ///
   const Function *getFunction() const { return Fn; }
@@ -62,13 +57,29 @@
   /// getTarget - Return the target machine this machine code is compiled with
   ///
   const TargetMachine &getTarget() const { return Target; }
-  
-  // The next two methods are used to construct and to retrieve
-  // the MachineFunction object for the given method.
+
+  /// print - Print out the MachineFunction in a format suitable for debugging
+  /// to the specified stream.
+  ///
+  void print(std::ostream &OS) const;
+
+  /// dump - Print the current MachineFunction to cerr, useful for debugger use.
+  ///
+  void dump() const;
+
+  /// CalculateArgSize - Call this method to fill in the maxOptionalArgsSize &
+  /// staticStackSize fields...
+  ///
+  void CalculateArgSize();
+
+  // The next three methods are used to construct, destruct, and retrieve the
+  // MachineFunction object for the given method.
+  //
   // construct() -- Allocates and initializes for a given method and target
   // get()       -- Returns a handle to the object.
   //                This should not be called before "construct()"
   //                for a given Method.
+  // destruct()  -- Destroy the MachineFunction object
   // 
   static MachineFunction& construct(const Function *Fn,
                                     const TargetMachine &target);
@@ -157,8 +168,6 @@
   
   // int          getOffsetFromFP       (const Value* val) const;
   
-  void            dump                     () const;
-
 private:
   inline void     incrementAutomaticVarsSize(int incr) {
     automaticVarsSize+= incr;




From lattner at cs.uiuc.edu  Tue Oct 29 18:47:05 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Oct 29 18:47:05 2002
Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h
Message-ID: <200210300046.SAA24578@apoc.cs.uiuc.edu>


Changes in directory llvm/include/llvm/CodeGen:

MachineInstr.h updated: 1.81 -> 1.82

---
Log message:

Add support for structured printing


---
Diffs of the changes:

Index: llvm/include/llvm/CodeGen/MachineInstr.h
diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.81 llvm/include/llvm/CodeGen/MachineInstr.h:1.82
--- llvm/include/llvm/CodeGen/MachineInstr.h:1.81	Tue Oct 29 17:18:23 2002
+++ llvm/include/llvm/CodeGen/MachineInstr.h	Tue Oct 29 18:46:48 2002
@@ -16,6 +16,7 @@
 class Value;
 class Function;
 class MachineBasicBlock;
+class TargetMachine;
 
 typedef int MachineOpCode;
 
@@ -325,7 +326,8 @@
 
   //
   // Debugging support
-  // 
+  //
+  void print(std::ostream &OS, const TargetMachine &TM);
   void dump() const;
   friend std::ostream& operator<<(std::ostream& os, const MachineInstr& minstr);
 




From lattner at cs.uiuc.edu  Tue Oct 29 18:48:01 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Oct 29 18:48:01 2002
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/InstSelectSimple.cpp
Message-ID: <200210300047.SAA24595@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Target/X86:

InstSelectSimple.cpp updated: 1.8 -> 1.9

---
Log message:

Make sure to pass the LLVM basic block in


---
Diffs of the changes:

Index: llvm/lib/Target/X86/InstSelectSimple.cpp
diff -u llvm/lib/Target/X86/InstSelectSimple.cpp:1.8 llvm/lib/Target/X86/InstSelectSimple.cpp:1.9
--- llvm/lib/Target/X86/InstSelectSimple.cpp:1.8	Tue Oct 29 17:40:58 2002
+++ llvm/lib/Target/X86/InstSelectSimple.cpp	Tue Oct 29 18:47:40 2002
@@ -45,7 +45,7 @@
     /// instructions will be invoked for all instructions in the basic block.
     ///
     void visitBasicBlock(BasicBlock &LLVM_BB) {
-      BB = new MachineBasicBlock();
+      BB = new MachineBasicBlock(&LLVM_BB);
       // FIXME: Use the auto-insert form when it's available
       F->getBasicBlockList().push_back(BB);
     }




From lattner at cs.uiuc.edu  Tue Oct 29 18:48:05 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Oct 29 18:48:05 2002
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86TargetMachine.cpp
Message-ID: <200210300047.SAA24604@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Target/X86:

X86TargetMachine.cpp updated: 1.1 -> 1.2

---
Log message:

Print machine code after instruction selection


---
Diffs of the changes:

Index: llvm/lib/Target/X86/X86TargetMachine.cpp
diff -u llvm/lib/Target/X86/X86TargetMachine.cpp:1.1 llvm/lib/Target/X86/X86TargetMachine.cpp:1.2
--- llvm/lib/Target/X86/X86TargetMachine.cpp:1.1	Tue Oct 29 16:37:54 2002
+++ llvm/lib/Target/X86/X86TargetMachine.cpp	Tue Oct 29 18:47:49 2002
@@ -6,6 +6,7 @@
 
 #include "X86TargetMachine.h"
 #include "llvm/Target/TargetMachineImpls.h"
+#include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/PassManager.h"
 #include "X86.h"
 #include 
@@ -30,6 +31,9 @@
   PM.add(createSimpleX86InstructionSelector(*this));
 
   // TODO: optional optimizations go here
+
+  // Print the instruction selected machine code...
+  PM.add(createMachineFunctionPrinterPass());
 
   // Perform register allocation to convert to a concrete x86 representation
   //PM.add(createSimpleX86RegisterAllocator(*this));




From lattner at cs.uiuc.edu  Tue Oct 29 18:49:01 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Oct 29 18:49:01 2002
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/MachineFunction.cpp MachineInstr.cpp
Message-ID: <200210300048.SAA24615@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/CodeGen:

MachineFunction.cpp updated: 1.28 -> 1.29
MachineInstr.cpp updated: 1.59 -> 1.60

---
Log message:

Implement structured machine code printing


---
Diffs of the changes:

Index: llvm/lib/CodeGen/MachineFunction.cpp
diff -u llvm/lib/CodeGen/MachineFunction.cpp:1.28 llvm/lib/CodeGen/MachineFunction.cpp:1.29
--- llvm/lib/CodeGen/MachineFunction.cpp:1.28	Tue Oct 29 17:40:03 2002
+++ llvm/lib/CodeGen/MachineFunction.cpp	Tue Oct 29 18:48:05 2002
@@ -61,6 +61,19 @@
       return false;
     }
   };
+
+  struct Printer : public FunctionPass {
+    const char *getPassName() const { return "MachineFunction Printer"; }
+
+    virtual void getAnalysisUsage(AnalysisUsage &AU) const {
+      AU.setPreservesAll();
+    }
+
+    bool runOnFunction(Function &F) {
+      MachineFunction::get(&F).dump();
+      return false;
+    }
+  };
 }
 
 Pass *createMachineCodeConstructionPass(TargetMachine &Target) {
@@ -71,11 +84,44 @@
   return new DestroyMachineFunction();
 }
 
+Pass *createMachineFunctionPrinterPass() {
+  return new Printer();
+}
+
 
 //===---------------------------------------------------------------------===//
 // MachineFunction implementation
 //===---------------------------------------------------------------------===//
 
+MachineFunction::MachineFunction(const Function *F,
+                                 const TargetMachine& target)
+  : Annotation(MF_AID),
+    Fn(F), Target(target), staticStackSize(0),
+    automaticVarsSize(0), regSpillsSize(0),
+    maxOptionalArgsSize(0), maxOptionalNumArgs(0),
+    currentTmpValuesSize(0), maxTmpValuesSize(0), compiledAsLeaf(false),
+    spillsAreaFrozen(false), automaticVarsAreaFrozen(false)
+{
+}
+
+void MachineFunction::dump() const { print(std::cerr); }
+
+void MachineFunction::print(std::ostream &OS) const {
+  OS << "\n" << *(Value*)Fn->getReturnType() << " \"" << Fn->getName()<< "\"\n";
+  
+  for (const_iterator BB = begin(); BB != end(); ++BB) {
+    BasicBlock *LBB = BB->getBasicBlock();
+    OS << "\n" << LBB->getName() << " ("
+       << (const void*)BB->getBasicBlock() << "):\n";
+    for (MachineBasicBlock::const_iterator I = BB->begin(); I != BB->end();++I){
+      OS << "\t";
+      (*I)->print(OS, Target);
+    }
+  }
+  OS << "\nEnd function \"" << Fn->getName() << "\"\n\n";
+}
+
+
 // The next two methods are used to construct and to retrieve
 // the MachineCodeForFunction object for the given function.
 // construct() -- Allocates and initializes for a given function and target
@@ -173,17 +219,6 @@
 }
 
 
-MachineFunction::MachineFunction(const Function *F,
-                                 const TargetMachine& target)
-  : Annotation(MF_AID),
-    Fn(F), Target(target), staticStackSize(0),
-    automaticVarsSize(0), regSpillsSize(0),
-    maxOptionalArgsSize(0), maxOptionalNumArgs(0),
-    currentTmpValuesSize(0), maxTmpValuesSize(0), compiledAsLeaf(false),
-    spillsAreaFrozen(false), automaticVarsAreaFrozen(false)
-{
-}
-
 void MachineFunction::CalculateArgSize() {
   maxOptionalArgsSize = ComputeMaxOptionalArgsSize(Target, Fn,
                                                    maxOptionalNumArgs);
@@ -291,19 +326,4 @@
 {
   hash_map::const_iterator pair = offsets.find(val);
   return (pair == offsets.end()) ? INVALID_FRAME_OFFSET : pair->second;
-}
-
-void
-MachineFunction::dump() const
-{
-  std::cerr << "\n" << Fn->getReturnType()
-            << " \"" << Fn->getName() << "\"\n";
-  
-  for (const_iterator BB = begin(); BB != end(); ++BB) {
-    std::cerr << "\n" << BB->getBasicBlock()->getName() << " ("
-              << (const void*)BB->getBasicBlock() << ")" << ":" << "\n";
-    for (MachineBasicBlock::const_iterator I = BB->begin(); I != BB->end(); ++I)
-      std::cerr << "\t" << *I;
-  }
-  std::cerr << "\nEnd function \"" << Fn->getName() << "\"\n\n";
 }


Index: llvm/lib/CodeGen/MachineInstr.cpp
diff -u llvm/lib/CodeGen/MachineInstr.cpp:1.59 llvm/lib/CodeGen/MachineInstr.cpp:1.60
--- llvm/lib/CodeGen/MachineInstr.cpp:1.59	Tue Oct 29 17:19:00 2002
+++ llvm/lib/CodeGen/MachineInstr.cpp	Tue Oct 29 18:48:05 2002
@@ -6,6 +6,7 @@
 #include "llvm/CodeGen/MachineBasicBlock.h"
 #include "llvm/Value.h"
 #include "llvm/Target/MachineInstrInfo.h"  // FIXME: shouldn't need this!
+#include "llvm/Target/TargetMachine.h"
 using std::cerr;
 
 // Global variable holding an array of descriptors for machine instructions.
@@ -196,6 +197,96 @@
   return os << "%mreg(" << regNum << ")";
 }
 
+static void print(const MachineOperand &MO, std::ostream &OS,
+                  const TargetMachine &TM) {
+  bool CloseParen = true;
+  if (MO.opHiBits32())
+    OS << "%lm(";
+  else if (MO.opLoBits32())
+    OS << "%lo(";
+  else if (MO.opHiBits64())
+    OS << "%hh(";
+  else if (MO.opLoBits64())
+    OS << "%hm(";
+  else
+    CloseParen = false;
+  
+  switch (MO.getType()) {
+  case MachineOperand::MO_VirtualRegister:
+    if (MO.getVRegValue()) {
+      OS << "%reg";
+      OutputValue(OS, MO.getVRegValue());
+      if (MO.hasAllocatedReg())
+        OS << "==";
+    }
+    if (MO.hasAllocatedReg())
+      OutputReg(OS, MO.getAllocatedRegNum());
+    break;
+  case MachineOperand::MO_CCRegister:
+    OS << "%ccreg";
+    OutputValue(OS, MO.getVRegValue());
+    if (MO.hasAllocatedReg()) {
+      OS << "==";
+      OutputReg(OS, MO.getAllocatedRegNum());
+    }
+    break;
+  case MachineOperand::MO_MachineRegister:
+    OutputReg(OS, MO.getMachineRegNum());
+    break;
+  case MachineOperand::MO_SignExtendedImmed:
+    OS << (long)MO.getImmedValue();
+    break;
+  case MachineOperand::MO_UnextendedImmed:
+    OS << (long)MO.getImmedValue();
+    break;
+  case MachineOperand::MO_PCRelativeDisp: {
+    const Value* opVal = MO.getVRegValue();
+    bool isLabel = isa(opVal) || isa(opVal);
+    OS << "%disp(" << (isLabel? "label " : "addr-of-val ");
+    if (opVal->hasName())
+      OS << opVal->getName();
+    else
+      OS << (const void*) opVal;
+    OS << ")";
+    break;
+  }
+  default:
+    assert(0 && "Unrecognized operand type");
+  }
+
+  if (CloseParen)
+    OS << ")";
+}
+
+void MachineInstr::print(std::ostream &OS, const TargetMachine &TM) {
+  OS << TM.getInstrInfo().getName(getOpcode());
+  for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
+    OS << "\t";
+    ::print(getOperand(i), OS, TM);
+
+    if (operandIsDefinedAndUsed(i))
+      OS << "";
+    else if (operandIsDefined(i))
+      OS << "";
+  }
+
+  // code for printing implict references
+  if (getNumImplicitRefs()) {
+    OS << "\tImplicitRefs: ";
+    for(unsigned i = 0, e = getNumImplicitRefs(); i != e; ++i) {
+      OS << "\t";
+      OutputValue(OS, getImplicitRef(i)); 
+      if (implicitRefIsDefinedAndUsed(i))
+        OS << "";
+      else if (implicitRefIsDefined(i))
+        OS << "";
+    }
+  }
+  
+  OS << "\n";
+}
+
+
 std::ostream &operator<<(std::ostream& os, const MachineInstr& minstr)
 {
   os << TargetInstrDescriptors[minstr.opCode].Name;
@@ -234,28 +325,32 @@
   else if (mop.opLoBits64())
     os << "%hm(";
   
-  switch(mop.opType)
+  switch (mop.getType())
     {
     case MachineOperand::MO_VirtualRegister:
       os << "%reg";
       OutputValue(os, mop.getVRegValue());
-      if (mop.hasAllocatedReg())
-        os << "==" << OutputReg(os, mop.getAllocatedRegNum());
+      if (mop.hasAllocatedReg()) {
+        os << "==";
+        OutputReg(os, mop.getAllocatedRegNum());
+      }
       break;
     case MachineOperand::MO_CCRegister:
       os << "%ccreg";
       OutputValue(os, mop.getVRegValue());
-      if (mop.hasAllocatedReg())
-        os << "==" << OutputReg(os, mop.getAllocatedRegNum());
+      if (mop.hasAllocatedReg()) {
+        os << "==";
+        OutputReg(os, mop.getAllocatedRegNum());
+      }
       break;
     case MachineOperand::MO_MachineRegister:
       OutputReg(os, mop.getMachineRegNum());
       break;
     case MachineOperand::MO_SignExtendedImmed:
-      os << (long)mop.immedVal;
+      os << (long)mop.getImmedValue();
       break;
     case MachineOperand::MO_UnextendedImmed:
-      os << (long)mop.immedVal;
+      os << (long)mop.getImmedValue();
       break;
     case MachineOperand::MO_PCRelativeDisp:
       {




From lattner at cs.uiuc.edu  Tue Oct 29 18:54:01 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Oct 29 18:54:01 2002
Subject: [llvm-commits] CVS: llvm/include/llvm/Target/TargetMachine.h
Message-ID: <200210300053.SAA24957@apoc.cs.uiuc.edu>


Changes in directory llvm/include/llvm/Target:

TargetMachine.h updated: 1.18 -> 1.19

---
Log message:

Add new optional getRegisterInfo to TargetMachine


---
Diffs of the changes:

Index: llvm/include/llvm/Target/TargetMachine.h
diff -u llvm/include/llvm/Target/TargetMachine.h:1.18 llvm/include/llvm/Target/TargetMachine.h:1.19
--- llvm/include/llvm/Target/TargetMachine.h:1.18	Tue Oct 29 16:01:26 2002
+++ llvm/include/llvm/Target/TargetMachine.h	Tue Oct 29 18:53:02 2002
@@ -17,6 +17,7 @@
 class MachineFrameInfo;
 class MachineCacheInfo;
 class MachineOptInfo;
+class MRegisterInfo;
 class PassManager;
 class Pass;
 
@@ -65,6 +66,12 @@
   virtual const MachineFrameInfo&       getFrameInfo() const = 0;
   virtual const MachineCacheInfo&       getCacheInfo() const = 0;
   virtual const MachineOptInfo&         getOptInfo()   const = 0;
+
+  /// getRegisterInfo - If register information is available, return it.  If
+  /// not, return null.  This is kept seperate from RegInfo until RegInfo gets
+  /// straightened out.
+  ///
+  virtual const MRegisterInfo*          getRegisterInfo() const { return 0; }
 
   // Data storage information
   // 




From lattner at cs.uiuc.edu  Tue Oct 29 18:57:00 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Oct 29 18:57:00 2002
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86TargetMachine.h
Message-ID: <200210300056.SAA25266@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Target/X86:

X86TargetMachine.h updated: 1.1 -> 1.2

---
Log message:

Implement the new optional getRegisterInfo


---
Diffs of the changes:

Index: llvm/lib/Target/X86/X86TargetMachine.h
diff -u llvm/lib/Target/X86/X86TargetMachine.h:1.1 llvm/lib/Target/X86/X86TargetMachine.h:1.2
--- llvm/lib/Target/X86/X86TargetMachine.h:1.1	Tue Oct 29 16:37:54 2002
+++ llvm/lib/Target/X86/X86TargetMachine.h	Tue Oct 29 18:56:18 2002
@@ -21,6 +21,9 @@
   virtual const MachineFrameInfo &getFrameInfo() const { abort(); }
   virtual const MachineCacheInfo &getCacheInfo() const { abort(); }
   virtual const MachineOptInfo   &getOptInfo()   const { abort(); }
+  virtual const MRegisterInfo *getRegisterInfo() const {
+    return &instrInfo.getRegisterInfo();
+  }
 
   /// addPassesToJITCompile - Add passes to the specified pass manager to
   /// implement a fast dynamic compiler for this target.  Return true if this is




From lattner at cs.uiuc.edu  Tue Oct 29 18:59:01 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Oct 29 18:59:01 2002
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/MachineInstr.cpp
Message-ID: <200210300058.SAA25393@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/CodeGen:

MachineInstr.cpp updated: 1.60 -> 1.61

---
Log message:

Use MRegisterInfo, if available, to print symbolic register names


---
Diffs of the changes:

Index: llvm/lib/CodeGen/MachineInstr.cpp
diff -u llvm/lib/CodeGen/MachineInstr.cpp:1.60 llvm/lib/CodeGen/MachineInstr.cpp:1.61
--- llvm/lib/CodeGen/MachineInstr.cpp:1.60	Tue Oct 29 18:48:05 2002
+++ llvm/lib/CodeGen/MachineInstr.cpp	Tue Oct 29 18:58:19 2002
@@ -7,6 +7,7 @@
 #include "llvm/Value.h"
 #include "llvm/Target/MachineInstrInfo.h"  // FIXME: shouldn't need this!
 #include "llvm/Target/TargetMachine.h"
+#include "llvm/Target/MRegisterInfo.h"
 using std::cerr;
 
 // Global variable holding an array of descriptors for machine instructions.
@@ -191,14 +192,20 @@
     return os << (void*) val << ")";              // print address only
 }
 
-static inline std::ostream&
-OutputReg(std::ostream &os, unsigned int regNum)
-{
-  return os << "%mreg(" << regNum << ")";
+static inline void OutputReg(std::ostream &os, unsigned RegNo,
+                             const MRegisterInfo *MRI = 0) {
+  if (MRI) {
+    if (RegNo < MRegisterInfo::FirstVirtualRegister)
+      os << "%" << MRI->get(RegNo).Name;
+    else
+      os << "%reg" << RegNo;
+  } else
+    os << "%mreg(" << RegNo << ")";
 }
 
 static void print(const MachineOperand &MO, std::ostream &OS,
                   const TargetMachine &TM) {
+  const MRegisterInfo *MRI = TM.getRegisterInfo();
   bool CloseParen = true;
   if (MO.opHiBits32())
     OS << "%lm(";
@@ -220,18 +227,18 @@
         OS << "==";
     }
     if (MO.hasAllocatedReg())
-      OutputReg(OS, MO.getAllocatedRegNum());
+      OutputReg(OS, MO.getAllocatedRegNum(), MRI);
     break;
   case MachineOperand::MO_CCRegister:
     OS << "%ccreg";
     OutputValue(OS, MO.getVRegValue());
     if (MO.hasAllocatedReg()) {
       OS << "==";
-      OutputReg(OS, MO.getAllocatedRegNum());
+      OutputReg(OS, MO.getAllocatedRegNum(), MRI);
     }
     break;
   case MachineOperand::MO_MachineRegister:
-    OutputReg(OS, MO.getMachineRegNum());
+    OutputReg(OS, MO.getMachineRegNum(), MRI);
     break;
   case MachineOperand::MO_SignExtendedImmed:
     OS << (long)MO.getImmedValue();




From lattner at cs.uiuc.edu  Tue Oct 29 19:08:00 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Oct 29 19:08:00 2002
Subject: [llvm-commits] CVS: llvm/include/llvm/Target/MachineInstrInfo.h
Message-ID: <200210300107.TAA25453@apoc.cs.uiuc.edu>


Changes in directory llvm/include/llvm/Target:

MachineInstrInfo.h updated: 1.32 -> 1.33

---
Log message:

* Add new "Target Specific Flags" field to instruction descriptor
* Rename iclass to Flags



---
Diffs of the changes:

Index: llvm/include/llvm/Target/MachineInstrInfo.h
diff -u llvm/include/llvm/Target/MachineInstrInfo.h:1.32 llvm/include/llvm/Target/MachineInstrInfo.h:1.33
--- llvm/include/llvm/Target/MachineInstrInfo.h:1.32	Tue Oct 29 11:40:28 2002
+++ llvm/include/llvm/Target/MachineInstrInfo.h	Tue Oct 29 19:06:53 2002
@@ -62,11 +62,12 @@
   int             resultPos;     // Position of the result; -1 if no result
   unsigned        maxImmedConst; // Largest +ve constant in IMMMED field or 0.
   bool	          immedIsSignExtended; // Is IMMED field sign-extended? If so,
-				 //   smallest -ve value is -(maxImmedConst+1).
+                                 //   smallest -ve value is -(maxImmedConst+1).
   unsigned        numDelaySlots; // Number of delay slots after instruction
-  unsigned        latency;	 // Latency in machine cycles
-  InstrSchedClass schedClass;	 // enum  identifying instr sched class
-  unsigned        iclass;	 // flags identifying machine instr class
+  unsigned        latency;       // Latency in machine cycles
+  InstrSchedClass schedClass;    // enum  identifying instr sched class
+  unsigned        Flags;         // flags identifying machine instr class
+  unsigned        TSFlags;       // Target Specific Flag values
 };
 
 
@@ -117,67 +118,64 @@
   // Query instruction class flags according to the machine-independent
   // flags listed above.
   // 
-  unsigned getIClass(MachineOpCode opCode) const {
-    return get(opCode).iclass;
-  }
   bool isNop(MachineOpCode opCode) const {
-    return get(opCode).iclass & M_NOP_FLAG;
+    return get(opCode).Flags & M_NOP_FLAG;
   }
   bool isBranch(MachineOpCode opCode) const {
-    return get(opCode).iclass & M_BRANCH_FLAG;
+    return get(opCode).Flags & M_BRANCH_FLAG;
   }
   bool isCall(MachineOpCode opCode) const {
-    return get(opCode).iclass & M_CALL_FLAG;
+    return get(opCode).Flags & M_CALL_FLAG;
   }
   bool isReturn(MachineOpCode opCode) const {
-    return get(opCode).iclass & M_RET_FLAG;
+    return get(opCode).Flags & M_RET_FLAG;
   }
   bool isControlFlow(MachineOpCode opCode) const {
-    return get(opCode).iclass & M_BRANCH_FLAG
-        || get(opCode).iclass & M_CALL_FLAG
-        || get(opCode).iclass & M_RET_FLAG;
+    return get(opCode).Flags & M_BRANCH_FLAG
+        || get(opCode).Flags & M_CALL_FLAG
+        || get(opCode).Flags & M_RET_FLAG;
   }
   bool isArith(MachineOpCode opCode) const {
-    return get(opCode).iclass & M_ARITH_FLAG;
+    return get(opCode).Flags & M_ARITH_FLAG;
   }
   bool isCCInstr(MachineOpCode opCode) const {
-    return get(opCode).iclass & M_CC_FLAG;
+    return get(opCode).Flags & M_CC_FLAG;
   }
   bool isLogical(MachineOpCode opCode) const {
-    return get(opCode).iclass & M_LOGICAL_FLAG;
+    return get(opCode).Flags & M_LOGICAL_FLAG;
   }
   bool isIntInstr(MachineOpCode opCode) const {
-    return get(opCode).iclass & M_INT_FLAG;
+    return get(opCode).Flags & M_INT_FLAG;
   }
   bool isFloatInstr(MachineOpCode opCode) const {
-    return get(opCode).iclass & M_FLOAT_FLAG;
+    return get(opCode).Flags & M_FLOAT_FLAG;
   }
   bool isConditional(MachineOpCode opCode) const { 
-    return get(opCode).iclass & M_CONDL_FLAG;
+    return get(opCode).Flags & M_CONDL_FLAG;
   }
   bool isLoad(MachineOpCode opCode) const {
-    return get(opCode).iclass & M_LOAD_FLAG;
+    return get(opCode).Flags & M_LOAD_FLAG;
   }
   bool isPrefetch(MachineOpCode opCode) const {
-    return get(opCode).iclass & M_PREFETCH_FLAG;
+    return get(opCode).Flags & M_PREFETCH_FLAG;
   }
   bool isLoadOrPrefetch(MachineOpCode opCode) const {
-    return get(opCode).iclass & M_LOAD_FLAG
-        || get(opCode).iclass & M_PREFETCH_FLAG;
+    return get(opCode).Flags & M_LOAD_FLAG
+        || get(opCode).Flags & M_PREFETCH_FLAG;
   }
   bool isStore(MachineOpCode opCode) const {
-    return get(opCode).iclass & M_STORE_FLAG;
+    return get(opCode).Flags & M_STORE_FLAG;
   }
   bool isMemoryAccess(MachineOpCode opCode) const {
-    return get(opCode).iclass & M_LOAD_FLAG
-        || get(opCode).iclass & M_PREFETCH_FLAG
-        || get(opCode).iclass & M_STORE_FLAG;
+    return get(opCode).Flags & M_LOAD_FLAG
+        || get(opCode).Flags & M_PREFETCH_FLAG
+        || get(opCode).Flags & M_STORE_FLAG;
   }
   bool isDummyPhiInstr(const MachineOpCode opCode) const {
-    return get(opCode).iclass & M_DUMMY_PHI_FLAG;
+    return get(opCode).Flags & M_DUMMY_PHI_FLAG;
   }
   bool isPseudoInstr(const MachineOpCode opCode) const {
-    return get(opCode).iclass & M_PSEUDO_FLAG;
+    return get(opCode).Flags & M_PSEUDO_FLAG;
   }
 
   // Check if an instruction can be issued before its operands are ready,




From lattner at cs.uiuc.edu  Tue Oct 29 19:08:05 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Oct 29 19:08:05 2002
Subject: [llvm-commits] CVS: llvm/lib/Target/Sparc/Sparc.cpp
Message-ID: <200210300107.TAA25464@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Target/Sparc:

Sparc.cpp updated: 1.54 -> 1.55

---
Log message:

Sparc backend doesn't use target specific flags yet


---
Diffs of the changes:

Index: llvm/lib/Target/Sparc/Sparc.cpp
diff -u llvm/lib/Target/Sparc/Sparc.cpp:1.54 llvm/lib/Target/Sparc/Sparc.cpp:1.55
--- llvm/lib/Target/Sparc/Sparc.cpp:1.54	Tue Oct 29 15:48:17 2002
+++ llvm/lib/Target/Sparc/Sparc.cpp	Tue Oct 29 19:07:12 2002
@@ -28,7 +28,7 @@
 #define I(ENUM, OPCODESTRING, NUMOPERANDS, RESULTPOS, MAXIMM, IMMSE, \
           NUMDELAYSLOTS, LATENCY, SCHEDCLASS, INSTFLAGS)             \
   { OPCODESTRING, NUMOPERANDS, RESULTPOS, MAXIMM, IMMSE,             \
-          NUMDELAYSLOTS, LATENCY, SCHEDCLASS, INSTFLAGS },
+          NUMDELAYSLOTS, LATENCY, SCHEDCLASS, INSTFLAGS, 0 },
 #include "SparcInstr.def"
 };
 




From lattner at cs.uiuc.edu  Tue Oct 29 19:10:01 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Oct 29 19:10:01 2002
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86InstrInfo.def X86InstrInfo.h
Message-ID: <200210300109.TAA25484@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Target/X86:

X86InstrInfo.def updated: 1.4 -> 1.5
X86InstrInfo.h updated: 1.5 -> 1.6

---
Log message:

Add flag to specify when no value is produced by an instruction


---
Diffs of the changes:

Index: llvm/lib/Target/X86/X86InstrInfo.def
diff -u llvm/lib/Target/X86/X86InstrInfo.def:1.4 llvm/lib/Target/X86/X86InstrInfo.def:1.5
--- llvm/lib/Target/X86/X86InstrInfo.def:1.4	Tue Oct 29 14:48:56 2002
+++ llvm/lib/Target/X86/X86InstrInfo.def	Tue Oct 29 19:09:34 2002
@@ -19,28 +19,29 @@
 //  #3: Instruction Flags - This should be a field or'd together that contains
 //      constants from the MachineInstrInfo.h file.
 //  #4: Target Specific Flags - Another bitfield containing X86 specific flags
-//      that we are interested in for each instruction
+//      that we are interested in for each instruction.  These should be flags
+//      defined in X86InstrInfo.h in the X86II namespace.
 //
 
-// The first instruction must always be the PHI instruction:
+// The first instruction must always be the PHI instruction: (FIXME, not yet)
 I(PHI         , "phi",                0, 0)
 
-// The second instruction must always be the noop instruction
-I(NOOP        , "nop",                0, 0)      // nop          90
+// The second instruction must always be the noop instruction: (FIXME, not yet)
+I(NOOP        , "nop",                0, X86II::Void) // nop          90
 
 // Miscellaneous instructions
-I(RET         , "ret",       M_RET_FLAG, 0)      // ret          CB
+I(RET         , "ret",       M_RET_FLAG, X86II::Void) // ret          CB
 
 // Move instructions
-I(MOVir8      , "movb",               0, 0)      // R = imm8     B0+ rb
-I(MOVir16     , "movw",               0, 0)      // R = imm16    B8+ rw
-I(MOVir32     , "movl",               0, 0)      // R = imm32    B8+ rd
+I(MOVir8      , "movb",               0, 0)           // R = imm8     B0+ rb
+I(MOVir16     , "movw",               0, 0)           // R = imm16    B8+ rw
+I(MOVir32     , "movl",               0, 0)           // R = imm32    B8+ rd
 
 // Arithmetic instructions
-I(ADDrr8      , "addb",               0, 0)      // R8  += R8    00/r
-I(ADDrr16     , "addw",               0, 0)      // R16 += R16   01/r
-I(ADDrr32     , "addl",               0, 0)      // R32 += R32   02/r
+I(ADDrr8      , "addb",               0, 0)           // R8  += R8    00/r
+I(ADDrr16     , "addw",               0, 0)           // R16 += R16   01/r
+I(ADDrr32     , "addl",               0, 0)           // R32 += R32   02/r
 
 
-// At this point, I is dead to undefine the macro
+// At this point, I is dead, so undefine the macro
 #undef I


Index: llvm/lib/Target/X86/X86InstrInfo.h
diff -u llvm/lib/Target/X86/X86InstrInfo.h:1.5 llvm/lib/Target/X86/X86InstrInfo.h:1.6
--- llvm/lib/Target/X86/X86InstrInfo.h:1.5	Tue Oct 29 15:01:27 2002
+++ llvm/lib/Target/X86/X86InstrInfo.h	Tue Oct 29 19:09:34 2002
@@ -10,6 +10,15 @@
 #include "llvm/Target/MachineInstrInfo.h"
 #include "X86RegisterInfo.h"
 
+/// X86II - This namespace holds all of the target specific flags that
+/// instruction info tracks.
+///
+namespace X86II {
+  enum {
+    Void        = 1 << 0,  // Set if this instruction produces no value
+  };
+}
+
 class X86InstrInfo : public MachineInstrInfo {
   const X86RegisterInfo RI;
 public:




From lattner at cs.uiuc.edu  Tue Oct 29 19:16:01 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Oct 29 19:16:01 2002
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86InstrInfo.cpp X86InstrInfo.def
Message-ID: <200210300115.TAA26058@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Target/X86:

X86InstrInfo.cpp updated: 1.4 -> 1.5
X86InstrInfo.def updated: 1.5 -> 1.6

---
Log message:

Set the destination register field based on the target specific flags


---
Diffs of the changes:

Index: llvm/lib/Target/X86/X86InstrInfo.cpp
diff -u llvm/lib/Target/X86/X86InstrInfo.cpp:1.4 llvm/lib/Target/X86/X86InstrInfo.cpp:1.5
--- llvm/lib/Target/X86/X86InstrInfo.cpp:1.4	Tue Oct 29 15:01:27 2002
+++ llvm/lib/Target/X86/X86InstrInfo.cpp	Tue Oct 29 19:15:31 2002
@@ -12,8 +12,11 @@
 // descriptors
 //
 static const MachineInstrDescriptor X86Insts[] = {
-#define I(ENUM, NAME, FLAGS, TSFLAGS) \
-             { NAME, -1, -1, 0, false, 0, 0, TSFLAGS, FLAGS },
+#define I(ENUM, NAME, FLAGS, TSFLAGS)   \
+             { NAME,                    \
+               -1, /* Always vararg */  \
+               ((TSFLAGS) & X86II::Void) ? -1 : 0,  /* Result is in 0 */ \
+               0, false, 0, 0, TSFLAGS, FLAGS, TSFLAGS },
 #include "X86InstrInfo.def"
 };
 


Index: llvm/lib/Target/X86/X86InstrInfo.def
diff -u llvm/lib/Target/X86/X86InstrInfo.def:1.5 llvm/lib/Target/X86/X86InstrInfo.def:1.6
--- llvm/lib/Target/X86/X86InstrInfo.def:1.5	Tue Oct 29 19:09:34 2002
+++ llvm/lib/Target/X86/X86InstrInfo.def	Tue Oct 29 19:15:31 2002
@@ -5,6 +5,10 @@
 // specified below, and is used to make all of the information relevant to an
 // instruction be in one place.
 //
+// Note that X86 Instructions always have the destination register listed as
+// operand 0, unless it does not produce a value (in which case the TSFlags will
+// include X86II::Void).
+//
 //===----------------------------------------------------------------------===//
 
 // NOTE: No include guards desired




From lattner at cs.uiuc.edu  Tue Oct 29 19:49:00 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Oct 29 19:49:00 2002
Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h MachineInstrBuilder.h
Message-ID: <200210300148.TAA26586@apoc.cs.uiuc.edu>


Changes in directory llvm/include/llvm/CodeGen:

MachineInstr.h updated: 1.82 -> 1.83
MachineInstrBuilder.h updated: 1.3 -> 1.4

---
Log message:

Allow BuildMI that helps automate construction of SSA information


---
Diffs of the changes:

Index: llvm/include/llvm/CodeGen/MachineInstr.h
diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.82 llvm/include/llvm/CodeGen/MachineInstr.h:1.83
--- llvm/include/llvm/CodeGen/MachineInstr.h:1.82	Tue Oct 29 18:46:48 2002
+++ llvm/include/llvm/CodeGen/MachineInstr.h	Tue Oct 29 19:48:41 2002
@@ -372,10 +372,11 @@
 
   /// addRegOperand - Add a symbolic virtual register reference...
   ///
-  void addRegOperand(int reg) {
+  void addRegOperand(int reg, bool isDef = false) {
     assert(!OperandsComplete() &&
            "Trying to add an operand to a machine instr that is already done!");
-    operands.push_back(MachineOperand(reg, MachineOperand::MO_VirtualRegister));
+    operands.push_back(MachineOperand(reg, MachineOperand::MO_VirtualRegister,
+                                      isDef));
   }
 
   /// addPCDispOperand - Add a PC relative displacement operand to the MI


Index: llvm/include/llvm/CodeGen/MachineInstrBuilder.h
diff -u llvm/include/llvm/CodeGen/MachineInstrBuilder.h:1.3 llvm/include/llvm/CodeGen/MachineInstrBuilder.h:1.4
--- llvm/include/llvm/CodeGen/MachineInstrBuilder.h:1.3	Tue Oct 29 17:18:23 2002
+++ llvm/include/llvm/CodeGen/MachineInstrBuilder.h	Tue Oct 29 19:48:41 2002
@@ -29,8 +29,8 @@
 
   /// addReg - Add a new virtual register operand...
   ///
-  MachineInstrBuilder &addReg(int RegNo) {
-    MI->addRegOperand(RegNo);
+  MachineInstrBuilder &addReg(int RegNo, bool isDef = false) {
+    MI->addRegOperand(RegNo, isDef);
     return *this;
   }
 
@@ -72,15 +72,31 @@
 };
 
 /// BuildMI - Builder interface.  Specify how to create the initial instruction
-/// itself.
+/// itself.  NumOperands is the number of operands to the machine instruction to
+/// allow for memory efficient representation of machine instructions.
 ///
 inline MachineInstrBuilder BuildMI(MachineOpCode Opcode, unsigned NumOperands) {
   return MachineInstrBuilder(new MachineInstr(Opcode, NumOperands, true, true));
 }
 
+/// BuildMI - This version of the builder inserts the built MachineInstr into
+/// the specified MachineBasicBlock.
+///
 inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB, MachineOpCode Opcode,
                                    unsigned NumOperands) {
   return MachineInstrBuilder(new MachineInstr(BB, Opcode, NumOperands));
+}
+
+/// BuildMI - This version of the builder inserts the built MachineInstr into
+/// the specified MachineBasicBlock, and also sets up the first "operand" as a
+/// destination virtual register.  NumOperands is the number of additional add*
+/// calls that are expected, it does not include the destination register.
+///
+inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB, MachineOpCode Opcode,
+                                   unsigned NumOperands, unsigned DestReg) {
+  return MachineInstrBuilder(new MachineInstr(BB, Opcode,
+                                              NumOperands+1)).addReg(DestReg,
+                                                                     true);
 }
 
 #endif




From lattner at cs.uiuc.edu  Tue Oct 29 19:50:01 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Oct 29 19:50:01 2002
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/InstSelectSimple.cpp
Message-ID: <200210300149.TAA26597@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Target/X86:

InstSelectSimple.cpp updated: 1.9 -> 1.10

---
Log message:

Make sure to set the destination register correctly


---
Diffs of the changes:

Index: llvm/lib/Target/X86/InstSelectSimple.cpp
diff -u llvm/lib/Target/X86/InstSelectSimple.cpp:1.9 llvm/lib/Target/X86/InstSelectSimple.cpp:1.10
--- llvm/lib/Target/X86/InstSelectSimple.cpp:1.9	Tue Oct 29 18:47:40 2002
+++ llvm/lib/Target/X86/InstSelectSimple.cpp	Tue Oct 29 19:49:01 2002
@@ -85,7 +85,6 @@
 
       return Reg;
     }
-
   };
 }
 
@@ -98,22 +97,22 @@
 
   switch (C->getType()->getPrimitiveID()) {
   case Type::SByteTyID:
-    BuildMI(BB, X86::MOVir8, R).addSImm(cast(C)->getValue());
+    BuildMI(BB, X86::MOVir8, 1, R).addSImm(cast(C)->getValue());
     break;
   case Type::UByteTyID:
-    BuildMI(BB, X86::MOVir8, R).addZImm(cast(C)->getValue());
+    BuildMI(BB, X86::MOVir8, 1, R).addZImm(cast(C)->getValue());
     break;
   case Type::ShortTyID:
-    BuildMI(BB, X86::MOVir16, R).addSImm(cast(C)->getValue());
+    BuildMI(BB, X86::MOVir16, 1, R).addSImm(cast(C)->getValue());
     break;
   case Type::UShortTyID:
-    BuildMI(BB, X86::MOVir16, R).addZImm(cast(C)->getValue());
+    BuildMI(BB, X86::MOVir16, 1, R).addZImm(cast(C)->getValue());
     break;
   case Type::IntTyID:
-    BuildMI(BB, X86::MOVir32, R).addSImm(cast(C)->getValue());
+    BuildMI(BB, X86::MOVir32, 1, R).addSImm(cast(C)->getValue());
     break;
   case Type::UIntTyID:
-    BuildMI(BB, X86::MOVir32, R).addZImm(cast(C)->getValue());
+    BuildMI(BB, X86::MOVir32, 1, R).addZImm(cast(C)->getValue());
     break;
   default: assert(0 && "Type not handled yet!");      
   }
@@ -150,13 +149,13 @@
 
   switch (B.getType()->getPrimitiveSize()) {
   case 1:   // UByte, SByte
-    BuildMI(BB, X86::ADDrr8, DestReg).addReg(Op0r).addReg(Op1r);
+    BuildMI(BB, X86::ADDrr8, 2, DestReg).addReg(Op0r).addReg(Op1r);
     break;
   case 2:   // UShort, Short
-    BuildMI(BB, X86::ADDrr16, DestReg).addReg(Op0r).addReg(Op1r);
+    BuildMI(BB, X86::ADDrr16, 2, DestReg).addReg(Op0r).addReg(Op1r);
     break;
   case 4:   // UInt, Int
-    BuildMI(BB, X86::ADDrr32, DestReg).addReg(Op0r).addReg(Op1r);
+    BuildMI(BB, X86::ADDrr32, 2, DestReg).addReg(Op0r).addReg(Op1r);
     break;
 
   case 8:   // ULong, Long




From lattner at cs.uiuc.edu  Tue Oct 29 19:55:01 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Oct 29 19:55:01 2002
Subject: [llvm-commits] CVS: llvm/test/Regression/Jello/test0.ll
Message-ID: <200210300154.TAA26885@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Regression/Jello:

test0.ll updated: 1.2 -> 1.3

---
Log message:

Name the first basic block


---
Diffs of the changes:

Index: llvm/test/Regression/Jello/test0.ll
diff -u llvm/test/Regression/Jello/test0.ll:1.2 llvm/test/Regression/Jello/test0.ll:1.3
--- llvm/test/Regression/Jello/test0.ll:1.2	Sun Oct 27 15:18:06 2002
+++ llvm/test/Regression/Jello/test0.ll	Tue Oct 29 19:54:42 2002
@@ -1,5 +1,6 @@
 ; test ret
 void %main() {
+BB0:
 	add int 1, 2
 	ret void
 }




From lattner at cs.uiuc.edu  Tue Oct 29 19:56:01 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Oct 29 19:56:01 2002
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/MachineInstr.cpp
Message-ID: <200210300155.TAA26898@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/CodeGen:

MachineInstr.cpp updated: 1.61 -> 1.62

---
Log message:

Add special code to make printing SSA form machine instructions nicer


---
Diffs of the changes:

Index: llvm/lib/CodeGen/MachineInstr.cpp
diff -u llvm/lib/CodeGen/MachineInstr.cpp:1.61 llvm/lib/CodeGen/MachineInstr.cpp:1.62
--- llvm/lib/CodeGen/MachineInstr.cpp:1.61	Tue Oct 29 18:58:19 2002
+++ llvm/lib/CodeGen/MachineInstr.cpp	Tue Oct 29 19:55:38 2002
@@ -266,17 +266,28 @@
 }
 
 void MachineInstr::print(std::ostream &OS, const TargetMachine &TM) {
+  unsigned StartOp = 0;
+
+   // Specialize printing if op#0 is definition
+  if (getNumOperands() && operandIsDefined(0)) {
+    ::print(getOperand(0), OS, TM);
+    OS << " = ";
+    ++StartOp;   // Don't print this operand again!
+  }
   OS << TM.getInstrInfo().getName(getOpcode());
-  for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
-    OS << "\t";
+  
+  for (unsigned i = StartOp, e = getNumOperands(); i != e; ++i) {
+    if (i != StartOp)
+      OS << ",";
+    OS << " ";
     ::print(getOperand(i), OS, TM);
-
+    
     if (operandIsDefinedAndUsed(i))
       OS << "";
     else if (operandIsDefined(i))
       OS << "";
   }
-
+    
   // code for printing implict references
   if (getNumImplicitRefs()) {
     OS << "\tImplicitRefs: ";




From lattner at cs.uiuc.edu  Tue Oct 29 20:03:01 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Oct 29 20:03:01 2002
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/MachineInstr.cpp
Message-ID: <200210300202.UAA26957@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/CodeGen:

MachineInstr.cpp updated: 1.62 -> 1.63

---
Log message:

Remove fixme


---
Diffs of the changes:

Index: llvm/lib/CodeGen/MachineInstr.cpp
diff -u llvm/lib/CodeGen/MachineInstr.cpp:1.62 llvm/lib/CodeGen/MachineInstr.cpp:1.63
--- llvm/lib/CodeGen/MachineInstr.cpp:1.62	Tue Oct 29 19:55:38 2002
+++ llvm/lib/CodeGen/MachineInstr.cpp	Tue Oct 29 20:02:37 2002
@@ -5,8 +5,8 @@
 #include "llvm/CodeGen/MachineInstr.h"
 #include "llvm/CodeGen/MachineBasicBlock.h"
 #include "llvm/Value.h"
-#include "llvm/Target/MachineInstrInfo.h"  // FIXME: shouldn't need this!
 #include "llvm/Target/TargetMachine.h"
+#include "llvm/Target/MachineInstrInfo.h"
 #include "llvm/Target/MRegisterInfo.h"
 using std::cerr;
 




From lattner at cs.uiuc.edu  Tue Oct 29 20:05:01 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Oct 29 20:05:01 2002
Subject: [llvm-commits] CVS: llvm/test/Regression/Jello/test0.ll
Message-ID: <200210300204.UAA27122@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Regression/Jello:

test0.ll updated: 1.3 -> 1.4

---
Log message:

Make the testcase MORE complex


---
Diffs of the changes:

Index: llvm/test/Regression/Jello/test0.ll
diff -u llvm/test/Regression/Jello/test0.ll:1.3 llvm/test/Regression/Jello/test0.ll:1.4
--- llvm/test/Regression/Jello/test0.ll:1.3	Tue Oct 29 19:54:42 2002
+++ llvm/test/Regression/Jello/test0.ll	Tue Oct 29 20:03:59 2002
@@ -1,6 +1,7 @@
 ; test ret
 void %main() {
 BB0:
-	add int 1, 2
+	%X = add int 1, 2
+	%Y = add int %X, %X
 	ret void
 }




From brukman at cs.uiuc.edu  Tue Oct 29 20:19:01 2002
From: brukman at cs.uiuc.edu (Misha Brukman)
Date: Tue Oct 29 20:19:01 2002
Subject: [llvm-commits] CVS: llvm/tools/jello/jello.cpp
Message-ID: <200210300218.UAA29740@apoc.cs.uiuc.edu>


Changes in directory llvm/tools/jello:

jello.cpp updated: 1.3 -> 1.4

---
Log message:

Return 0 instead of 1 for correct execution. Makes automated testing happy.


---
Diffs of the changes:

Index: llvm/tools/jello/jello.cpp
diff -u llvm/tools/jello/jello.cpp:1.3 llvm/tools/jello/jello.cpp:1.4
--- llvm/tools/jello/jello.cpp:1.3	Tue Oct 29 15:48:31 2002
+++ llvm/tools/jello/jello.cpp	Tue Oct 29 20:18:29 2002
@@ -58,6 +58,6 @@
   // on demand.
   Passes.run(*M.get());
   
-  return 1;
+  return 0;
 }
 




From lattner at cs.uiuc.edu  Wed Oct 30 00:05:01 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed Oct 30 00:05:01 2002
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/README.txt
Message-ID: <200210300604.AAA30460@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Target/X86:

README.txt updated: 1.1 -> 1.2

---
Log message:

Add lots more info


---
Diffs of the changes:

Index: llvm/lib/Target/X86/README.txt
diff -u llvm/lib/Target/X86/README.txt:1.1 llvm/lib/Target/X86/README.txt:1.2
--- llvm/lib/Target/X86/README.txt:1.1	Fri Oct 25 17:55:53 2002
+++ llvm/lib/Target/X86/README.txt	Wed Oct 30 00:04:46 2002
@@ -25,28 +25,60 @@
 II. Architecture / Design Decisions
 ===================================
 
-We designed the infrastructure for the machine specific representation to be as
-light-weight as possible, while also being able to support as many targets as
-possible with our framework.  This framework should allow us to share many
-common machine specific transformations (register allocation, instruction
-scheduling, etc...) among all of the backends that may eventually be supported
-by the JIT, and unify the JIT and static compiler backends.
+We designed the infrastructure into the generic LLVM machine specific
+representation, which allows us to support as many targets as possible with our
+framework.  This framework should allow us to share many common machine specific
+transformations (register allocation, instruction scheduling, etc...) among all
+of the backends that may eventually be supported by LLVM, and ensures that the
+JIT and static compiler backends are largely shared.
 
 At the high-level, LLVM code is translated to a machine specific representation
-formed out of MFunction, MBasicBlock, and MInstruction instances (defined in
-include/llvm/CodeGen).  This representation is completely target agnostic,
-representing instructions in their most abstract form: an opcode, a destination,
-and a series of operands.  This representation is designed to support both SSA
-representation for machine code, as well as a register allocated, non-SSA form.
+formed out of MachineFunction, MachineBasicBlock, and MachineInstr instances
+(defined in include/llvm/CodeGen).  This representation is completely target
+agnostic, representing instructions in their most abstract form: an opcode, a
+destination, and a series of operands.  This representation is designed to
+support both SSA representation for machine code, as well as a register
+allocated, non-SSA form.
 
-Because the M* representation must work regardless of the target machine, it
-contains very little semantic information about the program.  To get semantic
+Because the Machine* representation must work regardless of the target machine,
+it contains very little semantic information about the program.  To get semantic
 information about the program, a layer of Target description datastructures are
 used, defined in include/llvm/Target.
 
-Currently the Sparc backend and the X86 backend do not share a common
-representation.  This is an intentional decision, and will be rectified in the
-future (after the project is done).
+Note that there is some amount of complexity that the X86 backend contains due
+to the Sparc backend's legacy requirements.  These should eventually fade away
+as the project progresses.
+
+
+SSA Instruction Representation
+------------------------------
+Target machine instructions are represented as instances of MachineInstr, and
+all specific machine instruction types should have an entry in the
+InstructionInfo table defined through X86InstrInfo.def.  In the X86 backend,
+there are two particularly interesting forms of machine instruction: those that
+produce a value (such as add), and those that do not (such as a store).
+
+Instructions that produce a value use Operand #0 as the "destination" register.
+When printing the assembly code with the built-in machine instruction printer,
+these destination registers will be printed to the left side of an '=' sign, as
+in: %reg1027 = addl %reg1026, %reg1025
+
+This 'addl' MachineInstruction contains three "operands": the first is the
+destination register (#1027), the second is the first source register (#1026)
+and the third is the second source register (#1025).  Never forget the
+destination register will show up in the MachineInstr operands vector.  The code
+to generate this instruction looks like this:
+
+  BuildMI(BB, X86::ADDrr32, 2, 1027).addReg(1026).addReg(1025);
+
+The first argument to BuildMI is the basic block to append the machine
+instruction to, the second is the opcode, the third is the number of operands,
+the fourth is the destination register.  The two addReg calls specify operands
+in order.
+
+MachineInstrs that do not produce a value do not have this implicit first
+operand, they simply have #operands = #uses.  To create them, simply do not
+specify a destination register to the BuildMI call.
 
 
 =======================
@@ -57,26 +89,25 @@
 
 include/llvm/CodeGen
 --------------------
-
 This directory contains header files that are used to represent the program in a
 machine specific representation.  It currently also contains a bunch of stuff
-used by the Sparc backend that we don't want to get mixed up in.
+used by the Sparc backend that we don't want to get mixed up in, such as
+register allocation internals.
 
 include/llvm/Target
 -------------------
-
 This directory contains header files that are used to interpret the machine
 specific representation of the program.  This allows us to write generic
 transformations that will work on any target that implements the interfaces
-defined in this directory.  Again, this also contains a bunch of stuff from the
-Sparc Backend that we don't want to deal with.
+defined in this directory.  The only classes used by the X86 backend so far are
+the TargetMachine, TargetData, MachineInstrInfo, and MRegisterInfo classes.
 
 lib/CodeGen
 -----------
 This directory will contain all of the target independant transformations (for
 example, register allocation) that we write.  These transformations should only
-use information exposed through the Target interface, it should not include any
-target specific header files.
+use information exposed through the Target interface, they should not include
+any target specific header files.
 
 lib/Target/X86
 --------------
@@ -86,7 +117,10 @@
 
 tools/jello
 -----------
-This directory contains the top-level code for the JIT compiler.
+This directory contains the top-level code for the JIT compiler.  This code
+basically boils down to a call to TargetMachine::addPassesToJITCompile.  As we
+progress with the project, this will also contain the compile-dispatch-recompile
+loop.
 
 test/Regression/Jello
 ---------------------
@@ -105,9 +139,7 @@
 
 0. Finish providing SSA form.  This involves keeping track of some information
    when instructions are added to the function, but should not affect that API
-   for creating new MInstructions or adding them to the program.  There are
-   also various FIXMEs in the M* files that need to get taken care of in the
-   near term.
+   for creating new MInstructions or adding them to the program.
 1. Finish dumb instruction selector
 2. Write dumb register allocator
 3. Write assembly language emitter
@@ -121,23 +153,23 @@
 After this project:
 -------------------
 1. Implement lots of nifty runtime optimizations
-2. Implement a static compiler backend for x86
-3. Migrate Sparc backend to new representation
-4. Implement new spiffy targets: IA64? X86-64? M68k?  Who knows...
+2. Implement a static compiler backend for x86 (might come almost for free...)
+3. Implement new spiffy targets: IA64? X86-64? M68k?  Who knows...
 
 Infrastructure Improvements:
 ----------------------------
 
 1. Bytecode is designed to be able to read particular functions from the
    bytecode without having to read the whole program.  Bytecode reader should be
-   extended to allow on demand loading of functions.
+   extended to allow on-demand loading of functions.
 
 2. PassManager needs to be able to run just a single function through a pipeline
-   of FunctionPass's.  When this happens, all of our code will become
-   FunctionPass's for real.
+   of FunctionPass's.
 
 3. llvmgcc needs to be modified to output 32-bit little endian LLVM files.
    Preferably it will be parameterizable so that multiple binaries need not
    exist.  Until this happens, we will be restricted to using type safe
    programs (most of the Olden suite and many smaller tests), which should be
-   sufficient for our 497 project.
+   sufficient for our 497 project.  Additionally there are a few places in the
+   LLVM infrastructure where we assume Sparc TargetData layout.  These should
+   be easy to factor out and identify though.




From vadve at cs.uiuc.edu  Wed Oct 30 14:17:00 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Wed Oct 30 14:17:00 2002
Subject: [llvm-commits] CVS: llvm/lib/Target/Sparc/EmitAssembly.cpp
Message-ID: <200210302016.OAA07979@psmith.cs.uiuc.edu>


Changes in directory llvm/lib/Target/Sparc:

EmitAssembly.cpp updated: 1.69 -> 1.70

---
Log message:

In getID(), don't call getValidSymbolName to mangle external names!


---
Diffs of the changes:

Index: llvm/lib/Target/Sparc/EmitAssembly.cpp
diff -u llvm/lib/Target/Sparc/EmitAssembly.cpp:1.69 llvm/lib/Target/Sparc/EmitAssembly.cpp:1.70
--- llvm/lib/Target/Sparc/EmitAssembly.cpp:1.69	Tue Oct 29 11:35:41 2002
+++ llvm/lib/Target/Sparc/EmitAssembly.cpp	Wed Oct 30 14:16:38 2002
@@ -139,9 +139,9 @@
   //
   string getID(const Value *V, const char *Prefix, const char *FPrefix = 0) {
     string Result = FPrefix ? FPrefix : "";  // "Forced prefix"
-    
+
     Result +=  V->hasName() ? V->getName() : string(Prefix);
-    
+
     // Qualify all internal names with a unique id.
     if (!isExternal(V)) {
       int valId = idTable->Table.getValSlot(V);
@@ -153,9 +153,12 @@
           valId = I->second;
       }
       Result = Result + "_" + itostr(valId);
+
+      // Replace or prefix problem characters in the name
+      Result = getValidSymbolName(Result);
     }
-    
-    return getValidSymbolName(Result);
+
+    return Result;
   }
   
   // getID Wrappers - Ensure consistent usage...




From vadve at cs.uiuc.edu  Wed Oct 30 14:39:00 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Wed Oct 30 14:39:00 2002
Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h
Message-ID: <200210302038.OAA08943@psmith.cs.uiuc.edu>


Changes in directory llvm/include/llvm/CodeGen:

MachineInstr.h updated: 1.83 -> 1.84

---
Log message:

Bug fix in setting an implicit ref.


---
Diffs of the changes:

Index: llvm/include/llvm/CodeGen/MachineInstr.h
diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.83 llvm/include/llvm/CodeGen/MachineInstr.h:1.84
--- llvm/include/llvm/CodeGen/MachineInstr.h:1.83	Tue Oct 29 19:48:41 2002
+++ llvm/include/llvm/CodeGen/MachineInstr.h	Wed Oct 30 14:38:16 2002
@@ -514,7 +514,7 @@
                                   bool isDefAndUse)
 {
   assert(i < getNumImplicitRefs() && "setImplicitRef() out of range!");
-  SetMachineOperandVal(i + getNumImplicitRefs(),
+  SetMachineOperandVal(i + getNumOperands(),
                        MachineOperand::MO_VirtualRegister,
                        V, isDef, isDefAndUse);
 }




From vadve at cs.uiuc.edu  Wed Oct 30 14:39:06 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Wed Oct 30 14:39:06 2002
Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineCodeForInstruction.h
Message-ID: <200210302038.OAA08956@psmith.cs.uiuc.edu>


Changes in directory llvm/include/llvm/CodeGen:

MachineCodeForInstruction.h updated: 1.6 -> 1.7

---
Log message:

Bug fix: need to initialize new CallArgsDescriptor pointer.


---
Diffs of the changes:

Index: llvm/include/llvm/CodeGen/MachineCodeForInstruction.h
diff -u llvm/include/llvm/CodeGen/MachineCodeForInstruction.h:1.6 llvm/include/llvm/CodeGen/MachineCodeForInstruction.h:1.7
--- llvm/include/llvm/CodeGen/MachineCodeForInstruction.h:1.6	Tue Oct 29 13:38:46 2002
+++ llvm/include/llvm/CodeGen/MachineCodeForInstruction.h	Wed Oct 30 14:38:49 2002
@@ -32,7 +32,7 @@
   std::vector Contents;  // the machine instr for this VM instr
   CallArgsDescriptor* callArgsDesc;     // only used for CALL instructions
 public:
-  MachineCodeForInstruction() : Annotation(MCFI_AID) {}
+  MachineCodeForInstruction() : Annotation(MCFI_AID), callArgsDesc(NULL) {}
   ~MachineCodeForInstruction();
   
   static MachineCodeForInstruction &get(const Instruction *I) {




From lattner at cs.uiuc.edu  Wed Oct 30 15:49:01 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed Oct 30 15:49:01 2002
Subject: [llvm-commits] CVS: llvm/tools/lli/Execution.cpp
Message-ID: <200210302148.PAA02115@apoc.cs.uiuc.edu>


Changes in directory llvm/tools/lli:

Execution.cpp updated: 1.69 -> 1.70

---
Log message:

Fix two problems:
  * Load Implementation can cause unaligned memory accesses, which caused 
    problems for sparc.
  * cast from pointer to pointer would zero the upper 32 bits of the pointer
    which obviously causes problems on 64 bit hosts.



---
Diffs of the changes:

Index: llvm/tools/lli/Execution.cpp
diff -u llvm/tools/lli/Execution.cpp:1.69 llvm/tools/lli/Execution.cpp:1.70
--- llvm/tools/lli/Execution.cpp:1.69	Fri Oct 25 20:57:15 2002
+++ llvm/tools/lli/Execution.cpp	Wed Oct 30 15:47:57 2002
@@ -842,29 +842,29 @@
     switch (I.getType()->getPrimitiveID()) {
     case Type::BoolTyID:
     case Type::UByteTyID:
-    case Type::SByteTyID:   Result.Untyped[0] = Ptr->UByteVal; break;
+    case Type::SByteTyID:   Result.UByteVal = Ptr->Untyped[0]; break;
     case Type::UShortTyID:
-    case Type::ShortTyID:   Result.Untyped[0] = Ptr->UShortVal & 255;
-                            Result.Untyped[1] = (Ptr->UShortVal >> 8) & 255;
+    case Type::ShortTyID:   Result.UShortVal = (unsigned)Ptr->Untyped[0] |
+                                              ((unsigned)Ptr->Untyped[1] << 8);
                             break;
     case Type::FloatTyID:
     case Type::UIntTyID:
-    case Type::IntTyID:     Result.Untyped[0] =  Ptr->UIntVal        & 255;
-                            Result.Untyped[1] = (Ptr->UIntVal >>  8) & 255;
-                            Result.Untyped[2] = (Ptr->UIntVal >> 16) & 255;
-                            Result.Untyped[3] = (Ptr->UIntVal >> 24) & 255;
+    case Type::IntTyID:     Result.UIntVal = (unsigned)Ptr->Untyped[0] |
+                                            ((unsigned)Ptr->Untyped[1] <<  8) |
+                                            ((unsigned)Ptr->Untyped[2] << 16) |
+                                            ((unsigned)Ptr->Untyped[3] << 24);
                             break;
     case Type::DoubleTyID:
     case Type::ULongTyID:
     case Type::LongTyID:    
-    case Type::PointerTyID: Result.Untyped[0] =  Ptr->ULongVal        & 255;
-                            Result.Untyped[1] = (Ptr->ULongVal >>  8) & 255;
-                            Result.Untyped[2] = (Ptr->ULongVal >> 16) & 255;
-                            Result.Untyped[3] = (Ptr->ULongVal >> 24) & 255;
-                            Result.Untyped[4] = (Ptr->ULongVal >> 32) & 255;
-                            Result.Untyped[5] = (Ptr->ULongVal >> 40) & 255;
-                            Result.Untyped[6] = (Ptr->ULongVal >> 48) & 255;
-                            Result.Untyped[7] = (Ptr->ULongVal >> 56) & 255;
+    case Type::PointerTyID: Result.ULongVal = (uint64_t)Ptr->Untyped[0] |
+                                             ((uint64_t)Ptr->Untyped[1] <<  8) |
+                                             ((uint64_t)Ptr->Untyped[2] << 16) |
+                                             ((uint64_t)Ptr->Untyped[3] << 24) |
+                                             ((uint64_t)Ptr->Untyped[4] << 32) |
+                                             ((uint64_t)Ptr->Untyped[5] << 40) |
+                                             ((uint64_t)Ptr->Untyped[6] << 48) |
+                                             ((uint64_t)Ptr->Untyped[7] << 56);
                             break;
     default:
       cout << "Cannot load value of type " << I.getType() << "!\n";
@@ -873,29 +873,29 @@
     switch (I.getType()->getPrimitiveID()) {
     case Type::BoolTyID:
     case Type::UByteTyID:
-    case Type::SByteTyID:   Result.Untyped[0] = Ptr->UByteVal; break;
+    case Type::SByteTyID:   Result.UByteVal = Ptr->Untyped[0]; break;
     case Type::UShortTyID:
-    case Type::ShortTyID:   Result.Untyped[1] = Ptr->UShortVal & 255;
-                            Result.Untyped[0] = (Ptr->UShortVal >> 8) & 255;
+    case Type::ShortTyID:   Result.UShortVal = (unsigned)Ptr->Untyped[1] |
+                                              ((unsigned)Ptr->Untyped[0] << 8);
                             break;
     case Type::FloatTyID:
     case Type::UIntTyID:
-    case Type::IntTyID:     Result.Untyped[3] =  Ptr->UIntVal        & 255;
-                            Result.Untyped[2] = (Ptr->UIntVal >>  8) & 255;
-                            Result.Untyped[1] = (Ptr->UIntVal >> 16) & 255;
-                            Result.Untyped[0] = (Ptr->UIntVal >> 24) & 255;
+    case Type::IntTyID:     Result.UIntVal = (unsigned)Ptr->Untyped[3] |
+                                            ((unsigned)Ptr->Untyped[2] <<  8) |
+                                            ((unsigned)Ptr->Untyped[1] << 16) |
+                                            ((unsigned)Ptr->Untyped[0] << 24);
                             break;
     case Type::DoubleTyID:
     case Type::ULongTyID:
     case Type::LongTyID:    
-    case Type::PointerTyID: Result.Untyped[7] =  Ptr->ULongVal        & 255;
-                            Result.Untyped[6] = (Ptr->ULongVal >>  8) & 255;
-                            Result.Untyped[5] = (Ptr->ULongVal >> 16) & 255;
-                            Result.Untyped[4] = (Ptr->ULongVal >> 24) & 255;
-                            Result.Untyped[3] = (Ptr->ULongVal >> 32) & 255;
-                            Result.Untyped[2] = (Ptr->ULongVal >> 40) & 255;
-                            Result.Untyped[1] = (Ptr->ULongVal >> 48) & 255;
-                            Result.Untyped[0] = (Ptr->ULongVal >> 56) & 255;
+    case Type::PointerTyID: Result.ULongVal = (uint64_t)Ptr->Untyped[7] |
+                                             ((uint64_t)Ptr->Untyped[6] <<  8) |
+                                             ((uint64_t)Ptr->Untyped[5] << 16) |
+                                             ((uint64_t)Ptr->Untyped[4] << 24) |
+                                             ((uint64_t)Ptr->Untyped[3] << 32) |
+                                             ((uint64_t)Ptr->Untyped[2] << 40) |
+                                             ((uint64_t)Ptr->Untyped[1] << 48) |
+                                             ((uint64_t)Ptr->Untyped[0] << 56);
                             break;
     default:
       cout << "Cannot load value of type " << I.getType() << "!\n";
@@ -1108,7 +1108,7 @@
     IMPLEMENT_CAST_CASE(Int    , (  signed int ));
     IMPLEMENT_CAST_CASE(ULong  , (uint64_t));
     IMPLEMENT_CAST_CASE(Long   , ( int64_t));
-    IMPLEMENT_CAST_CASE(Pointer, (PointerTy)(uint32_t));
+    IMPLEMENT_CAST_CASE(Pointer, (PointerTy));
     IMPLEMENT_CAST_CASE(Float  , (float));
     IMPLEMENT_CAST_CASE(Double , (double));
   default:




From lattner at cs.uiuc.edu  Wed Oct 30 19:26:01 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed Oct 30 19:26:01 2002
Subject: [llvm-commits] CVS: llvm/test/Regression/Transforms/DSAnalysis/basictest.ll indcalltest.ll simpletest.ll
Message-ID: <200210310125.TAA03764@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Regression/Transforms/DSAnalysis:

basictest.ll added (r1.1)
indcalltest.ll added (r1.1)
simpletest.ll added (r1.1)

---
Log message:

New testcases


---
Diffs of the changes:



From lattner at cs.uiuc.edu  Wed Oct 30 20:40:00 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed Oct 30 20:40:00 2002
Subject: [llvm-commits] CVS: llvm/include/llvm/Analysis/Dominators.h
Message-ID: <200210310239.UAA04030@apoc.cs.uiuc.edu>


Changes in directory llvm/include/llvm/Analysis:

Dominators.h updated: 1.29 -> 1.30

---
Log message:

Add interface to update domfrontier info, thanks to Casey Carter for impl



---
Diffs of the changes:

Index: llvm/include/llvm/Analysis/Dominators.h
diff -u llvm/include/llvm/Analysis/Dominators.h:1.29 llvm/include/llvm/Analysis/Dominators.h:1.30
--- llvm/include/llvm/Analysis/Dominators.h:1.29	Wed Oct 16 20:36:08 2002
+++ llvm/include/llvm/Analysis/Dominators.h	Wed Oct 30 20:39:48 2002
@@ -379,9 +379,27 @@
 
   // Accessor interface:
   typedef DomSetMapType::const_iterator const_iterator;
-  inline const_iterator begin() const { return Frontiers.begin(); }
-  inline const_iterator end()   const { return Frontiers.end(); }
-  inline const_iterator find(BasicBlock* B) const { return Frontiers.find(B); }
+  const_iterator begin() const { return Frontiers.begin(); }
+  const_iterator end()   const { return Frontiers.end(); }
+  const_iterator find(BasicBlock* B) const { return Frontiers.find(B); }
+
+  void addBasicBlock(BasicBlock *BB, const DomSetType &frontier) {
+    assert(find(BB) == end() && "Block already in DominanceFrontier!");
+    Frontiers.insert(std::make_pair(BB, frontier));
+  }
+
+  void addToFrontier(BasicBlock *BB, BasicBlock *Node) {
+    DomSetMapType::iterator I = Frontiers.find(BB);
+    assert(I != end() && "BB is not in DominanceFrontier!");
+    I->second.insert(Node);
+  }
+
+  void removeFromFrontier(BasicBlock *BB, BasicBlock *Node) {
+    DomSetMapType::iterator I = Frontiers.find(BB);
+    assert(I != end() && "BB is not in DominanceFrontier!");
+    assert(I->second.count(Node) && "Node is not in DominanceFrontier of BB");
+    I->second.erase(Node);
+  }
 
   // print - Convert to human readable form
   virtual void print(std::ostream &OS) const;




From lattner at cs.uiuc.edu  Wed Oct 30 20:45:01 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed Oct 30 20:45:01 2002
Subject: [llvm-commits] CVS: llvm/lib/Transforms/Scalar/BreakCriticalEdges.cpp
Message-ID: <200210310244.UAA04422@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Transforms/Scalar:

BreakCriticalEdges.cpp updated: 1.7 -> 1.8

---
Log message:

BreakCriticalEdges should update dominance frontier information as well as
other dominance stuff.  Patch contributed by Casey Carter



---
Diffs of the changes:

Index: llvm/lib/Transforms/Scalar/BreakCriticalEdges.cpp
diff -u llvm/lib/Transforms/Scalar/BreakCriticalEdges.cpp:1.7 llvm/lib/Transforms/Scalar/BreakCriticalEdges.cpp:1.8
--- llvm/lib/Transforms/Scalar/BreakCriticalEdges.cpp:1.7	Tue Oct  8 16:53:51 2002
+++ llvm/lib/Transforms/Scalar/BreakCriticalEdges.cpp	Wed Oct 30 20:44:36 2002
@@ -26,6 +26,7 @@
       AU.addPreserved();
       AU.addPreserved();
       AU.addPreserved();
+      AU.addPreserved();
       AU.addPreservedID(LoopPreheadersID);   // No preheaders deleted.
     }
   };
@@ -64,10 +65,11 @@
   assert(isCriticalEdge(TI, SuccNum) &&
          "Cannot break a critical edge, if it isn't a critical edge");
   BasicBlock *TIBB = TI->getParent();
+  BasicBlock *DestBB = TI->getSuccessor(SuccNum);
 
   // Create a new basic block, linking it into the CFG.
-  BasicBlock *NewBB = new BasicBlock(TIBB->getName()+"_crit_edge");
-  BasicBlock *DestBB = TI->getSuccessor(SuccNum);
+  BasicBlock *NewBB = new BasicBlock(TIBB->getName() + "." +
+                                     DestBB->getName() + "_crit_edge");
   // Create our unconditional branch...
   BranchInst *BI = new BranchInst(DestBB);
   NewBB->getInstList().push_back(BI);
@@ -120,6 +122,16 @@
     //
     if (TINode)        // Don't break unreachable code!
       DT->createNewNode(NewBB, TINode);
+  }
+
+  // Should we update DominanceFrontier information?
+  if (DominanceFrontier *DF = P->getAnalysisToUpdate()) {
+    // Since the new block is dominated by its only predecessor TIBB,
+    // it cannot be in any block's dominance frontier.  Its dominance
+    // frontier is {DestBB}.
+    DominanceFrontier::DomSetType NewDFSet;
+    NewDFSet.insert(DestBB);
+    DF->addBasicBlock(NewBB, NewDFSet);
   }
 }
 




From lattner at cs.uiuc.edu  Wed Oct 30 20:51:01 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed Oct 30 20:51:01 2002
Subject: [llvm-commits] CVS: llvm/include/Support/Statistic.h
Message-ID: <200210310250.UAA04837@apoc.cs.uiuc.edu>


Changes in directory llvm/include/Support:

Statistic.h updated: 1.4 -> 1.5

---
Log message:

Statistic class should return const reference to *this, not a reference to 
the data type.


---
Diffs of the changes:

Index: llvm/include/Support/Statistic.h
diff -u llvm/include/Support/Statistic.h:1.4 llvm/include/Support/Statistic.h:1.5
--- llvm/include/Support/Statistic.h:1.4	Tue Oct  1 17:35:42 2002
+++ llvm/include/Support/Statistic.h	Wed Oct 30 20:50:27 2002
@@ -84,12 +84,12 @@
   ~Statistic() { destroy(); }
 
   // Allow use of this class as the value itself...
-  inline operator DataType() const { return Value; }
-  inline const DataType &operator=(DataType Val) { Value = Val; return Value; }
-  inline const DataType &operator++() { return ++Value; }
-  inline DataType operator++(int) { return Value++; }
-  inline const DataType &operator+=(const DataType &V) { return Value += V; }
-  inline const DataType &operator-=(const DataType &V) { return Value -= V; }
+  operator DataType() const { return Value; }
+  const Statistic &operator=(DataType Val) { Value = Val; return *this; }
+  const Statistic &operator++() { ++Value; return *this; }
+  DataType operator++(int) { return Value++; }
+  const Statistic &operator+=(const DataType &V) { Value += V; return *this; }
+  const Statistic &operator-=(const DataType &V) { Value -= V; return *this; }
 };
 
 #endif




From lattner at cs.uiuc.edu  Wed Oct 30 22:15:01 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed Oct 30 22:15:01 2002
Subject: [llvm-commits] CVS: llvm/include/llvm/Instruction.h
Message-ID: <200210310414.WAA06744@apoc.cs.uiuc.edu>


Changes in directory llvm/include/llvm:

Instruction.h updated: 1.35 -> 1.36

---
Log message:

New isAssociative/isCommutative inspection methods, graciously contributed by 
Casey Carter.



---
Diffs of the changes:

Index: llvm/include/llvm/Instruction.h
diff -u llvm/include/llvm/Instruction.h:1.35 llvm/include/llvm/Instruction.h:1.36
--- llvm/include/llvm/Instruction.h:1.35	Sun Oct 13 14:39:07 2002
+++ llvm/include/llvm/Instruction.h	Wed Oct 30 22:13:59 2002
@@ -74,6 +74,27 @@
     return iType >= BinaryOpsBegin && iType < BinaryOpsEnd;
   }
 
+  /// isAssociative - Return true if the instruction is associative:
+  ///
+  ///   Associative operators satisfy:  x op (y op z) === (x op y) op z)
+  ///
+  /// In LLVM, the Add, Mul, And, Or, and Xor operators are associative, when
+  /// not applied to floating point types.
+  ///
+  bool isAssociative() const { return isAssociative(getOpcode(), getType()); }
+  static bool isAssociative(unsigned op, const Type *Ty);
+
+  /// isCommutative - Return true if the instruction is commutative:
+  ///
+  ///   Commutative operators satistify: (x op y) === (y op x)
+  ///
+  /// In LLVM, these are the associative operators, plus SetEQ and SetNE, when
+  /// applied to any type.
+  ///
+  bool isCommutative() const { return isCommutative(getOpcode()); }
+  static bool isCommutative(unsigned op);
+
+
   virtual void print(std::ostream &OS) const;
 
   /// Methods for support type inquiry through isa, cast, and dyn_cast:




From lattner at cs.uiuc.edu  Wed Oct 30 22:15:06 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed Oct 30 22:15:06 2002
Subject: [llvm-commits] CVS: llvm/lib/VMCore/Instruction.cpp
Message-ID: <200210310414.WAA06751@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/VMCore:

Instruction.cpp updated: 1.19 -> 1.20

---
Log message:

New isAssociative/isCommutative inspection methods, graciously contributed by 
Casey Carter.


---
Diffs of the changes:

Index: llvm/lib/VMCore/Instruction.cpp
diff -u llvm/lib/VMCore/Instruction.cpp:1.19 llvm/lib/VMCore/Instruction.cpp:1.20
--- llvm/lib/VMCore/Instruction.cpp:1.19	Tue Sep 10 10:45:53 2002
+++ llvm/lib/VMCore/Instruction.cpp	Wed Oct 30 22:14:01 2002
@@ -97,3 +97,42 @@
   
   return 0;
 }
+
+
+/// isAssociative - Return true if the instruction is associative:
+///
+///   Associative operators satisfy:  x op (y op z) === (x op y) op z)
+///
+/// In LLVM, the Add, Mul, And, Or, and Xor operators are associative, when not
+/// applied to floating point types.
+///
+bool Instruction::isAssociative(unsigned Opcode, const Type *Ty) {
+  if (Opcode == Add || Opcode == Mul ||
+      Opcode == And || Opcode == Or || Opcode == Xor) {
+    // Floating point operations do not associate!
+    return !Ty->isFloatingPoint();
+  }
+  return 0;
+}
+
+/// isCommutative - Return true if the instruction is commutative:
+///
+///   Commutative operators satistify: (x op y) === (y op x)
+///
+/// In LLVM, these are the associative operators, plus SetEQ and SetNE, when
+/// applied to any type.
+///
+bool Instruction::isCommutative(unsigned op) {
+  switch (op) {
+  case Add:
+  case Mul:
+  case And: 
+  case Or:
+  case Xor:
+  case SetEQ:
+  case SetNE:
+    return true;
+  default:
+    return false;
+  }
+}




From lattner at cs.uiuc.edu  Wed Oct 30 22:21:00 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed Oct 30 22:21:00 2002
Subject: [llvm-commits] CVS: llvm/lib/Analysis/ValueNumbering.cpp
Message-ID: <200210310420.WAA07474@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Analysis:

ValueNumbering.cpp updated: 1.3 -> 1.4

---
Log message:

Use new isCommutative interface, which gives us SetEQ and SetNE for free.
Thanks fly out to Casey Carter for this fix.


---
Diffs of the changes:

Index: llvm/lib/Analysis/ValueNumbering.cpp
diff -u llvm/lib/Analysis/ValueNumbering.cpp:1.3 llvm/lib/Analysis/ValueNumbering.cpp:1.4
--- llvm/lib/Analysis/ValueNumbering.cpp:1.3	Wed Sep 25 17:27:25 2002
+++ llvm/lib/Analysis/ValueNumbering.cpp	Wed Oct 30 22:20:07 2002
@@ -129,16 +129,12 @@
       I1.getOperand(1) == I2->getOperand(1))
     return true;
   
-  // If the instruction is commutative and associative, the instruction can
-  // match if the operands are swapped!
+  // If the instruction is commutative, the instruction can match if the
+  // operands are swapped!
   //
   if ((I1.getOperand(0) == I2->getOperand(1) &&
        I1.getOperand(1) == I2->getOperand(0)) &&
-      (I1.getOpcode() == Instruction::Add || 
-       I1.getOpcode() == Instruction::Mul ||
-       I1.getOpcode() == Instruction::And || 
-       I1.getOpcode() == Instruction::Or  ||
-       I1.getOpcode() == Instruction::Xor))
+      I1.isCommutative())
     return true;
 
   return false;




From lattner at cs.uiuc.edu  Wed Oct 30 22:25:01 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed Oct 30 22:25:01 2002
Subject: [llvm-commits] CVS: llvm/lib/VMCore/iOperators.cpp
Message-ID: <200210310424.WAA07777@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/VMCore:

iOperators.cpp updated: 1.19 -> 1.20

---
Log message:

Can simplify code now with the isCommutative() method.


---
Diffs of the changes:

Index: llvm/lib/VMCore/iOperators.cpp
diff -u llvm/lib/VMCore/iOperators.cpp:1.19 llvm/lib/VMCore/iOperators.cpp:1.20
--- llvm/lib/VMCore/iOperators.cpp:1.19	Tue Sep 10 14:57:53 2002
+++ llvm/lib/VMCore/iOperators.cpp	Wed Oct 30 22:24:23 2002
@@ -133,21 +133,13 @@
 // order dependant (SetLT f.e.) the opcode is changed.
 //
 bool BinaryOperator::swapOperands() {
-  if (SetCondInst *SCI = dyn_cast(this)) {
+  if (isCommutative())
+    ;  // If the instruction is commutative, it is safe to swap the operands
+  else if (SetCondInst *SCI = dyn_cast(this))
     iType = SCI->getSwappedCondition();
-    std::swap(Operands[0], Operands[1]);
-    return false;
-  }
+  else
+    return true;   // Can't commute operands
 
-  switch (getOpcode()) {
-    // Instructions that don't need opcode modification
-  case Add: case Mul:
-  case And: case Xor:
-  case Or:
-    // Error on the side of caution
-  default:
-    return true;
-  }
   std::swap(Operands[0], Operands[1]);
   return false;
 }




From lattner at cs.uiuc.edu  Wed Oct 30 22:49:01 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed Oct 30 22:49:01 2002
Subject: [llvm-commits] CVS: llvm/test/Regression/Transforms/DSAnalysis/arraytest.ll
Message-ID: <200210310448.WAA07909@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Regression/Transforms/DSAnalysis:

arraytest.ll added (r1.1)

---
Log message:

New testcase for the possible array merging scenarios


---
Diffs of the changes:



From lattner at cs.uiuc.edu  Wed Oct 30 23:00:01 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed Oct 30 23:00:01 2002
Subject: [llvm-commits] CVS: llvm/test/Regression/Transforms/DSAnalysis/.cvsignore
Message-ID: <200210310459.WAA07967@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Regression/Transforms/DSAnalysis:

.cvsignore added (r1.1)

---
Log message:

Tell cvs to ignore *.dot and *.ps files in this directory


---
Diffs of the changes:



From lattner at cs.uiuc.edu  Wed Oct 30 23:39:00 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed Oct 30 23:39:00 2002
Subject: [llvm-commits] CVS: llvm/test/Regression/Transforms/DSAnalysis/arraymerge.ll misctests.ll
Message-ID: <200210310538.XAA08116@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Regression/Transforms/DSAnalysis:

arraymerge.ll added (r1.1)
misctests.ll added (r1.1)

---
Log message:

New testcases


---
Diffs of the changes:



From lattner at cs.uiuc.edu  Wed Oct 30 23:45:01 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed Oct 30 23:45:01 2002
Subject: [llvm-commits] CVS: llvm/include/llvm/Analysis/DSGraph.h
Message-ID: <200210310544.XAA08138@apoc.cs.uiuc.edu>


Changes in directory llvm/include/llvm/Analysis:

DSGraph.h updated: 1.21 -> 1.22

---
Log message:

This fixes all kinds of problems with array handling.  There are still bugs to
be fixed, but we are getting much closer now.

    * Make DSNode::TypeRec a full fledged DSTypeRec type.
    * Add methods used to update and access the typerecords elements
    * Add methods to query if and to cause a node to be completely folded
    * DSGraph construction doesn't use the allocation type for anything at all,
      now nodes get their type information based on how they are used. 
    * Fixed a bug with global value handling introduced in the last checkin
    * GEP support is now much better, arrays are handled correctly.  The array
      flag is now updated in type records.  There are still cases that are not
      handled yet (we do not detect pessimizations), but getting much closer.



---
Diffs of the changes:

Index: llvm/include/llvm/Analysis/DSGraph.h
diff -u llvm/include/llvm/Analysis/DSGraph.h:1.21 llvm/include/llvm/Analysis/DSGraph.h:1.22
--- llvm/include/llvm/Analysis/DSGraph.h:1.21	Sun Oct 27 13:04:59 2002
+++ llvm/include/llvm/Analysis/DSGraph.h	Wed Oct 30 23:44:44 2002
@@ -83,6 +83,30 @@
 
 
 //===----------------------------------------------------------------------===//
+/// DSTypeRec - This structure is used to represent a single type that is held
+/// in a DSNode.
+///
+struct DSTypeRec {
+  const Type *Ty;                 // The type itself...
+  unsigned Offset;                // The offset in the node
+  bool isArray;                   // Have we accessed an array of elements?
+  
+  DSTypeRec() : Ty(0), Offset(0), isArray(false) {}
+  DSTypeRec(const Type *T, unsigned O) : Ty(T), Offset(O), isArray(false) {}
+  
+  bool operator<(const DSTypeRec &TR) const {
+    // Sort first by offset!
+    return Offset < TR.Offset || (Offset == TR.Offset && Ty < TR.Ty);
+  }
+  bool operator==(const DSTypeRec &TR) const {
+    return Ty == TR.Ty && Offset == TR.Offset;
+  }
+  bool operator!=(const DSTypeRec &TR) const { return !operator==(TR); }
+};
+
+
+
+//===----------------------------------------------------------------------===//
 /// DSNode - Data structure node class
 ///
 /// This class represents an untyped memory object of Size bytes.  It keeps
@@ -121,31 +145,11 @@
   ///
   std::vector Referrers;
 
-  /// TypeRec - This structure is used to represent a single type that is held
-  /// in a DSNode.
-  struct TypeRec {
-    const Type *Ty;                 // The type itself...
-    unsigned Offset;                // The offset in the node
-    bool isArray;                   // Have we accessed an array of elements?
-
-    TypeRec() : Ty(0), Offset(0), isArray(false) {}
-    TypeRec(const Type *T, unsigned O) : Ty(T), Offset(O), isArray(false) {}
-
-    bool operator<(const TypeRec &TR) const {
-      // Sort first by offset!
-      return Offset < TR.Offset || (Offset == TR.Offset && Ty < TR.Ty);
-    }
-    bool operator==(const TypeRec &TR) const {
-      return Ty == TR.Ty && Offset == TR.Offset;
-    }
-    bool operator!=(const TypeRec &TR) const { return !operator==(TR); }
-  };
-
   /// TypeEntries - As part of the merging process of this algorithm, nodes of
   /// different types can be represented by this single DSNode.  This vector is
   /// kept sorted.
   ///
-  std::vector TypeEntries;
+  std::vector TypeEntries;
 
   /// Globals - The list of global values that are merged into this node.
   ///
@@ -195,7 +199,7 @@
   unsigned getSize() const { return MergeMap.size(); }
 
   // getTypeEntries - Return the possible types and their offsets in this object
-  const std::vector &getTypeEntries() const { return TypeEntries; }
+  const std::vector &getTypeEntries() const { return TypeEntries; }
 
   /// getReferrers - Return a list of the pointers to this node...
   ///
@@ -229,11 +233,35 @@
     return 0;
   }
 
+  /// getMergeMapLabel - Return the merge map entry specified, to allow printing
+  /// out of DSNodes nicely for DOT graphs.
+  ///
   int getMergeMapLabel(unsigned i) const {
     assert(i < MergeMap.size() && "MergeMap index out of range!");
     return MergeMap[i];
   }
 
+  /// getTypeRec - This method returns the specified type record if it exists.
+  /// If it does not yet exist, the method checks to see whether or not the
+  /// request would result in an untrackable state.  If adding it would cause
+  /// untrackable state, we foldNodeCompletely the node and return the void
+  /// record, otherwise we add an new TypeEntry and return it.
+  ///
+  DSTypeRec &getTypeRec(const Type *Ty, unsigned Offset);
+
+  /// foldNodeCompletely - If we determine that this node has some funny
+  /// behavior happening to it that we cannot represent, we fold it down to a
+  /// single, completely pessimistic, node.  This node is represented as a
+  /// single byte with a single TypeEntry of "void".
+  ///
+  void foldNodeCompletely();
+
+  /// isNodeCompletelyFolded - Return true if this node has been completely
+  /// folded down to something that can never be expanded, effectively losing
+  /// all of the field sensitivity that may be present in the node.
+  ///
+  bool isNodeCompletelyFolded() const;
+
   /// setLink - Set the link at the specified offset to the specified
   /// NodeHandle, replacing what was there.  It is uncommon to use this method,
   /// instead one of the higher level methods should be used, below.
@@ -305,6 +333,16 @@
   /// rewriting the map entries.
   ///
   void mergeMappedValues(signed char V1, signed char V2);
+
+  /// growNode - Attempt to grow the node to the specified size.  This may do
+  /// one of three things:
+  ///   1. Grow the node, return false
+  ///   2. Refuse to grow the node, but maintain a trackable situation, return
+  ///      false.
+  ///   3. Be unable to track if node was that size, so collapse the node and
+  ///      return true.
+  ///
+  bool growNode(unsigned RequestedSize);
 };
 
 




From lattner at cs.uiuc.edu  Wed Oct 30 23:46:00 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed Oct 30 23:46:00 2002
Subject: [llvm-commits] CVS: llvm/lib/Analysis/DataStructure/DataStructure.cpp Local.cpp
Message-ID: <200210310545.XAA08155@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Analysis/DataStructure:

DataStructure.cpp updated: 1.35 -> 1.36
Local.cpp updated: 1.21 -> 1.22

---
Log message:

This fixes all kinds of problems with array handling.  There are still bugs to
be fixed, but we are getting much closer now.

    * Make DSNode::TypeRec a full fledged DSTypeRec type.
    * Add methods used to update and access the typerecords elements
    * Add methods to query if and to cause a node to be completely folded
    * DSGraph construction doesn't use the allocation type for anything at all,
      now nodes get their type information based on how they are used.
    * Fixed a bug with global value handling introduced in the last checkin
    * GEP support is now much better, arrays are handled correctly.  The array
      flag is now updated in type records.  There are still cases that are not
      handled yet (we do not detect pessimizations), but getting much closer.



---
Diffs of the changes:

Index: llvm/lib/Analysis/DataStructure/DataStructure.cpp
diff -u llvm/lib/Analysis/DataStructure/DataStructure.cpp:1.35 llvm/lib/Analysis/DataStructure/DataStructure.cpp:1.36
--- llvm/lib/Analysis/DataStructure/DataStructure.cpp:1.35	Mon Oct 21 14:50:29 2002
+++ llvm/lib/Analysis/DataStructure/DataStructure.cpp	Wed Oct 30 23:45:02 2002
@@ -31,38 +31,8 @@
 //===----------------------------------------------------------------------===//
 
 DSNode::DSNode(enum NodeTy NT, const Type *T) : NodeType(NT) {
-  // If this node is big enough to have pointer fields, add space for them now.
-  if (T != Type::VoidTy && !isa(T)) { // Avoid TargetData assert's
-    MergeMap.resize(TD.getTypeSize(T));
-
-    // Assign unique values to all of the elements of MergeMap
-    if (MergeMap.size() < 128) {
-      // Handle the common case of reasonable size structures...
-      for (unsigned i = 0, e = MergeMap.size(); i != e; ++i)
-        MergeMap[i] = -1-i;   // Assign -1, -2, -3, ...
-    } else {
-      // It's possible that we have something really big here.  In this case,
-      // divide the object into chunks until it will fit into 128 elements.
-      unsigned Multiple = MergeMap.size()/128;
-
-      // It's probably an array, and probably some power of two in size.
-      // Because of this, find the biggest power of two that is bigger than
-      // multiple to use as our real Multiple.
-      unsigned RealMultiple = 2;
-      while (RealMultiple <= Multiple) RealMultiple <<= 1;
-
-      unsigned RealBound = MergeMap.size()/RealMultiple;
-      assert(RealBound <= 128 && "Math didn't work out right");
-
-      // Now go through and assign indexes that are between -1 and -128
-      // inclusive
-      //
-      for (unsigned i = 0, e = MergeMap.size(); i != e; ++i)
-        MergeMap[i] = -1-(i % RealBound);   // Assign -1, -2, -3...
-    }
-  }
-
-  TypeEntries.push_back(TypeRec(T, 0));
+  // Add the type entry if it is specified...
+  if (T) getTypeRec(T, 0);
 }
 
 // DSNode copy constructor... do not copy over the referrers list!
@@ -95,6 +65,44 @@
   }
 }
 
+/// foldNodeCompletely - If we determine that this node has some funny
+/// behavior happening to it that we cannot represent, we fold it down to a
+/// single, completely pessimistic, node.  This node is represented as a
+/// single byte with a single TypeEntry of "void".
+///
+void DSNode::foldNodeCompletely() {
+  // We are no longer typed at all...
+  TypeEntries.clear();
+  TypeEntries.push_back(DSTypeRec(Type::VoidTy, 0));
+
+  // Loop over all of our referrers, making them point to our one byte of space.
+  for (vector::iterator I = Referrers.begin(), E=Referrers.end();
+       I != E; ++I)
+    (*I)->setOffset(0);
+
+  // Fold the MergeMap down to a single byte of space...
+  MergeMap.resize(1);
+  MergeMap[0] = -1;
+
+  // If we have links, merge all of our outgoing links together...
+  if (!Links.empty()) {
+    MergeMap[0] = 0;      // We now contain an outgoing edge...
+    for (unsigned i = 1, e = Links.size(); i != e; ++i)
+      Links[0].mergeWith(Links[i]);
+    Links.resize(1);
+  }
+}
+
+/// isNodeCompletelyFolded - Return true if this node has been completely
+/// folded down to something that can never be expanded, effectively losing
+/// all of the field sensitivity that may be present in the node.
+///
+bool DSNode::isNodeCompletelyFolded() const {
+  return getSize() == 1 && TypeEntries.size() == 1 &&
+         TypeEntries[0].Ty == Type::VoidTy;
+}
+
+
 
 /// setLink - Set the link at the specified offset to the specified
 /// NodeHandle, replacing what was there.  It is uncommon to use this method,
@@ -144,6 +152,108 @@
   }
 }
 
+/// getTypeRec - This method returns the specified type record if it exists.
+/// If it does not yet exist, the method checks to see whether or not the
+/// request would result in an untrackable state.  If adding it would cause
+/// untrackable state, we foldNodeCompletely the node and return the void
+/// record, otherwise we add an new TypeEntry and return it.
+///
+DSTypeRec &DSNode::getTypeRec(const Type *Ty, unsigned Offset) {
+  // If the node is already collapsed, we can't do anything... bail out early
+  if (isNodeCompletelyFolded()) {
+    assert(TypeEntries.size() == 1 && "Node folded and Entries.size() != 1?");
+    return TypeEntries[0];
+  }
+
+  // First search to see if we already have a record for this...
+  DSTypeRec SearchFor(Ty, Offset);
+
+  std::vector::iterator I;
+  if (TypeEntries.size() < 5) {  // Linear search if we have few entries.
+    I = TypeEntries.begin();
+    while (I != TypeEntries.end() && *I < SearchFor)
+      ++I;
+  } else {
+    I = std::lower_bound(TypeEntries.begin(), TypeEntries.end(), SearchFor);
+  }
+  
+  // At this point, I either points to the right entry or it points to the entry
+  // we are to insert the new entry in front of...
+  //
+  if (I != TypeEntries.end() && *I == SearchFor)
+    return *I;
+  
+  // ASSUME that it's okay to add this type entry.
+  // FIXME: This should check to make sure it's ok.
+  
+  // If the data size is different then our current size, try to resize the node
+  unsigned ReqSize = Ty->isSized() ? TD.getTypeSize(Ty) : 0;
+  if (getSize() < ReqSize) {
+    // If we are trying to make it bigger, and we can grow the node, do so.
+    if (growNode(ReqSize)) {
+      assert(isNodeCompletelyFolded() && "Node isn't folded?");
+      return TypeEntries[0];
+    }
+
+  } else if (getSize() > ReqSize) {
+    // If we are trying to make the node smaller, we don't have to do anything.
+
+  }
+
+  return *TypeEntries.insert(I, SearchFor);
+}
+
+/// growNode - Attempt to grow the node to the specified size.  This may do one
+/// of three things:
+///   1. Grow the node, return false
+///   2. Refuse to grow the node, but maintain a trackable situation, return
+///      false.
+///   3. Be unable to track if node was that size, so collapse the node and
+///      return true.
+///
+bool DSNode::growNode(unsigned ReqSize) {
+  unsigned OldSize = getSize();
+
+  if (0) {
+    // FIXME: DSNode::growNode() doesn't perform correct safety checks yet!
+    
+    foldNodeCompletely();
+    return true;
+  }
+
+  assert(ReqSize > OldSize && "Not growing node!");
+
+  // Resize the merge map to have enough space...
+  MergeMap.resize(ReqSize);
+
+  // Assign unique values to all of the elements of MergeMap
+  if (ReqSize < 128) {
+    // Handle the common case of reasonable size structures...
+    for (unsigned i = OldSize; i != ReqSize; ++i)
+      MergeMap[i] = -1-i;   // Assign -1, -2, -3, ...
+  } else {
+    // It's possible that we have something really big here.  In this case,
+    // divide the object into chunks until it will fit into 128 elements.
+    unsigned Multiple = ReqSize/128;
+    
+    // It's probably an array, and probably some power of two in size.
+    // Because of this, find the biggest power of two that is bigger than
+    // multiple to use as our real Multiple.
+    unsigned RealMultiple = 2;
+    while (RealMultiple <= Multiple) RealMultiple <<= 1;
+    
+    unsigned RealBound = ReqSize/RealMultiple;
+    assert(RealBound <= 128 && "Math didn't work out right");
+    
+    // Now go through and assign indexes that are between -1 and -128
+    // inclusive
+    //
+    for (unsigned i = OldSize; i != ReqSize; ++i)
+      MergeMap[i] = -1-(i % RealBound);   // Assign -1, -2, -3...
+  }
+  return false;
+}
+
 /// mergeMappedValues - This is the higher level form of rewriteMergeMap.  It is
 /// fully capable of merging links together if neccesary as well as simply
 /// rewriting the map entries.
@@ -236,11 +346,21 @@
 void DSNode::mergeWith(const DSNodeHandle &NH, unsigned Offset) {
   DSNode *N = NH.getNode();
   if (N == 0 || (N == this && NH.getOffset() == Offset))
-      return;  // Noop
+    return;  // Noop
 
   assert(NH.getNode() != this &&
          "Cannot merge two portions of the same node yet!");
 
+  // If we are merging a node with a completely folded node, then both nodes are
+  // now completely folded.
+  //
+  if (isNodeCompletelyFolded()) {
+    NH.getNode()->foldNodeCompletely();
+  } else if (NH.getNode()->isNodeCompletelyFolded()) {
+    foldNodeCompletely();
+    Offset = 0;
+  }
+
   // If both nodes are not at offset 0, make sure that we are merging the node
   // at an later offset into the node with the zero offset.
   //
@@ -322,27 +442,18 @@
   NodeType |= N->NodeType;
   N->NodeType = 0;   // N is now a dead node.
 
-  // If this merging into node has more than just void nodes in it, merge!
-  assert(!N->TypeEntries.empty() && "TypeEntries is empty for a node?");
-  if (N->TypeEntries.size() != 1 || N->TypeEntries[0].Ty != Type::VoidTy) {
-    // If the current node just has a Void entry in it, remove it.
-    if (TypeEntries.size() == 1 && TypeEntries[0].Ty == Type::VoidTy)
-      TypeEntries.clear();
-
-    // Adjust all of the type entries we are merging in by the offset... and add
-    // them to the TypeEntries list.
-    //
-    if (NOffset != 0) {  // This case is common enough to optimize for
-      // Offset all of the TypeEntries in N with their new offset
-      for (unsigned i = 0, e = N->TypeEntries.size(); i != e; ++i)
-        N->TypeEntries[i].Offset += NOffset;
-    }
-
-    MergeSortedVectors(TypeEntries, N->TypeEntries);
-
-    N->TypeEntries.clear();
+  // Adjust all of the type entries we are merging in by the offset...
+  //
+  if (NOffset != 0) {  // This case is common enough to optimize for
+    // Offset all of the TypeEntries in N with their new offset
+    for (unsigned i = 0, e = N->TypeEntries.size(); i != e; ++i)
+      N->TypeEntries[i].Offset += NOffset;
   }
 
+  // ... now add them to the TypeEntries list.
+  MergeSortedVectors(TypeEntries, N->TypeEntries);
+  N->TypeEntries.clear();   // N is dead, no type-entries need exist
+
   // Merge the globals list...
   if (!N->Globals.empty()) {
     MergeSortedVectors(Globals, N->Globals);
@@ -408,6 +519,7 @@
 
 /// remapLinks - Change all of the Links in the current node according to the
 /// specified mapping.
+///
 void DSNode::remapLinks(std::map &OldNodeMap) {
   for (unsigned i = 0, e = Links.size(); i != e; ++i) 
     Links[i].setNode(OldNodeMap[Links[i].getNode()]);


Index: llvm/lib/Analysis/DataStructure/Local.cpp
diff -u llvm/lib/Analysis/DataStructure/Local.cpp:1.21 llvm/lib/Analysis/DataStructure/Local.cpp:1.22
--- llvm/lib/Analysis/DataStructure/Local.cpp:1.21	Mon Oct 21 08:51:30 2002
+++ llvm/lib/Analysis/DataStructure/Local.cpp	Wed Oct 30 23:45:02 2002
@@ -61,6 +61,7 @@
     vector &Nodes;
     DSNodeHandle &RetNode;               // Node that gets returned...
     map &ValueMap;
+    map GlobalScalarValueMap;
     vector &FunctionCalls;
 
   public:
@@ -112,7 +113,7 @@
     /// value.  This either returns the already existing node, or creates a new
     /// one and adds it to the graph, if none exists.
     ///
-    DSNodeHandle getValueNode(Value &V);
+    DSNodeHandle &getValueNode(Value &V);
 
     /// getValueDest - Return the DSNode that the actual value points to.  This
     /// is basically the same thing as: getLink(getValueNode(V), 0)
@@ -184,25 +185,37 @@
 // This either returns the already existing node, or creates a new one and adds
 // it to the graph, if none exists.
 //
-DSNodeHandle GraphBuilder::getValueNode(Value &V) {
+DSNodeHandle &GraphBuilder::getValueNode(Value &V) {
   assert(isPointerType(V.getType()) && "Should only use pointer scalars!");
 
-  DSNodeHandle &NH = ValueMap[&V];
-  if (NH.getNode()) return NH;     // Already have a node?  Just return it...
-  
-  // Otherwise we need to create a new scalar node...
-  DSNode *N = createNode(DSNode::ScalarNode, V.getType());
-
-  // If this is a global value, create the global pointed to.
   if (GlobalValue *GV = dyn_cast(&V)) {
+    // The GlobalScalarValueMap keeps track of the scalar nodes that point to
+    // global values...  The ValueMap contains pointers to the global memory
+    // object itself, not the scalar constant that points to the memory.
+    //
+    DSNodeHandle &NH = GlobalScalarValueMap[GV];
+    if (NH.getNode()) return NH;
+
+    // If this is a global value, create the global pointed to.
+    DSNode *N = createNode(DSNode::ScalarNode, V.getType());
+    NH.setOffset(0);
+    NH.setNode(N);
+
     N->addEdgeTo(0, getGlobalNode(*GV));
-    return DSNodeHandle(N, 0);
+    return NH;
+    
   } else {
+    DSNodeHandle &NH = ValueMap[&V];
+    if (NH.getNode())
+      return NH;     // Already have a node?  Just return it...
+  
+    // Otherwise we need to create a new scalar node...
+    DSNode *N = createNode(DSNode::ScalarNode, V.getType());
+
     NH.setOffset(0);
     NH.setNode(N);
+    return NH;
   }
-
-  return NH;
 }
 
 /// getValueDest - Return the DSNode that the actual value points to.  This
@@ -220,27 +233,25 @@
 /// type should be linked to if we need to create a new node.
 ///
 DSNodeHandle &GraphBuilder::getLink(const DSNodeHandle &node,
-                                    unsigned LinkNo, const Type *FieldTy) {
+                                    unsigned LinkNo,
+                                    const Type *FieldTy  // FIXME: eliminate
+                                    ) {
   DSNodeHandle &Node = const_cast(node);
-
   DSNodeHandle *Link = Node.getLink(LinkNo);
   if (Link) return *Link;
-  
-  // If the link hasn't been created yet, make and return a new shadow node of
-  // the appropriate type for FieldTy...
-  //
 
+#if 0    // FIXME: delete
   // If we are indexing with a typed pointer, then the thing we are pointing
   // to is of the pointed type.  If we are pointing to it with an integer
   // (because of cast to an integer), we represent it with a void type.
   //
-  const Type *ReqTy;
+  const Type *ReqTy = 0;
   if (const PointerType *Ptr = dyn_cast(FieldTy))
     ReqTy = Ptr->getElementType();
-  else
-    ReqTy = Type::VoidTy;
+#endif
   
-  DSNode *N = createNode(DSNode::ShadowNode, ReqTy);
+  // If the link hasn't been created yet, make and return a new shadow node
+  DSNode *N = createNode(DSNode::ShadowNode, 0);
   Node.setLink(LinkNo, N);
   return *Node.getLink(LinkNo);
 }
@@ -254,8 +265,7 @@
 /// object, pointing the scalar to it.
 ///
 void GraphBuilder::handleAlloc(AllocationInst &AI, DSNode::NodeTy NodeType) {
-  //DSNode *New = createNode(NodeType, Type::VoidTy);
-  DSNode *New = createNode(NodeType, AI.getAllocatedType());
+  DSNode *New = createNode(NodeType, 0);
 
   // Make the scalar point to the new node...
   getValueNode(AI).addEdgeTo(New);
@@ -277,18 +287,50 @@
   DSNodeHandle Value = getValueDest(*GEP.getOperand(0));
 
   unsigned Offset = 0;
-  const Type *CurTy = GEP.getOperand(0)->getType();
+  const PointerType *PTy = cast(GEP.getOperand(0)->getType());
+  const Type *CurTy = PTy->getElementType();
+  DSTypeRec &TopTypeRec =
+    Value.getNode()->getTypeRec(PTy->getElementType(), Value.getOffset());
+
+  // If the node had to be folded... exit quickly
+  if (TopTypeRec.Ty == Type::VoidTy) {
+    getValueNode(GEP).addEdgeTo(Value);  // GEP result points to folded node
+    return;
+  }
+
+  // Handle the pointer index specially...
+  if (GEP.getNumOperands() > 1 &&
+      GEP.getOperand(1) != ConstantSInt::getNullValue(Type::LongTy)) {
+
+    // If we already know this is an array being accessed, don't do anything...
+    if (!TopTypeRec.isArray) {
+      TopTypeRec.isArray = true;
+
+      // If we are treating some inner field pointer as an array, fold the node
+      // up because we cannot handle it right.  This can come because of
+      // something like this:  &((&Pt->X)[1]) == &Pt->Y
+      //
+      if (Value.getOffset()) {
+        // Value is now the pointer we want to GEP to be...
+        Value.getNode()->foldNodeCompletely();
+        getValueNode(GEP).addEdgeTo(Value);  // GEP result points to folded node
+        return;
+      } else {
+        // This is a pointer to the first byte of the node.  Make sure that we
+        // are pointing to the outter most type in the node.
+        // FIXME: We need to check one more case here...
+      }
+    }
+  }
 
-  for (unsigned i = 1, e = GEP.getNumOperands(); i != e; ++i)
+  // All of these subscripts are indexing INTO the elements we have...
+  for (unsigned i = 2, e = GEP.getNumOperands(); i < e; ++i)
     if (GEP.getOperand(i)->getType() == Type::LongTy) {
       // Get the type indexing into...
       const SequentialType *STy = cast(CurTy);
       CurTy = STy->getElementType();
       if (ConstantSInt *CS = dyn_cast(GEP.getOperand(i))) {
-        if (isa(STy))
-          std::cerr << "Pointer indexing not handled yet!\n";
-        else 
-          Offset += CS->getValue()*TD.getTypeSize(CurTy);
+        Offset += CS->getValue()*TD.getTypeSize(CurTy);
       } else {
         // Variable index into a node.  We must merge all of the elements of the
         // sequential type here.
@@ -326,6 +368,9 @@
 void GraphBuilder::visitLoadInst(LoadInst &LI) {
   DSNodeHandle &Ptr = getValueDest(*LI.getOperand(0));
   Ptr.getNode()->NodeType |= DSNode::Read;
+
+  // Ensure a typerecord exists...
+  Ptr.getNode()->getTypeRec(LI.getType(), Ptr.getOffset());
   
   if (isPointerType(LI.getType()))
     getValueNode(LI).addEdgeTo(getLink(Ptr, 0, LI.getType()));
@@ -334,9 +379,13 @@
 void GraphBuilder::visitStoreInst(StoreInst &SI) {
   DSNodeHandle &Dest = getValueDest(*SI.getOperand(1));
   Dest.getNode()->NodeType |= DSNode::Modified;
+  const Type *StoredTy = SI.getOperand(0)->getType();
+
+  // Ensure a typerecord exists...
+  Dest.getNode()->getTypeRec(StoredTy, Dest.getOffset());
 
   // Avoid adding edges from null, or processing non-"pointer" stores
-  if (isPointerType(SI.getOperand(0)->getType()) &&
+  if (isPointerType(StoredTy) &&
       !isa(SI.getOperand(0))) {
     Dest.addEdgeTo(getValueDest(*SI.getOperand(0)));
   }




From brukman at cs.uiuc.edu  Thu Oct 31 00:35:01 2002
From: brukman at cs.uiuc.edu (Misha Brukman)
Date: Thu Oct 31 00:35:01 2002
Subject: [llvm-commits] CVS: llvm/include/llvm/Analysis/DSNode.h DSSupport.h DSGraph.h
Message-ID: <200210310634.AAA10610@apoc.cs.uiuc.edu>


Changes in directory llvm/include/llvm/Analysis:

DSNode.h added (r1.1)
DSSupport.h added (r1.1)
DSGraph.h updated: 1.22 -> 1.23

---
Log message:

Refactored DSGraph.h:
* DSGraph.h   contains DSGraph
* DSNode.h    contains DSNode (soon UDSNode and MDSNode)
* DSSupport.h contains DSCallsite, DSTypeRec, and DSNodeHandler


---
Diffs of the changes:

Index: llvm/include/llvm/Analysis/DSGraph.h
diff -u llvm/include/llvm/Analysis/DSGraph.h:1.22 llvm/include/llvm/Analysis/DSGraph.h:1.23
--- llvm/include/llvm/Analysis/DSGraph.h:1.22	Wed Oct 30 23:44:44 2002
+++ llvm/include/llvm/Analysis/DSGraph.h	Thu Oct 31 00:34:18 2002
@@ -1,13 +1,13 @@
 //===- DSGraph.h - Represent a collection of data structures ----*- C++ -*-===//
 //
-// This header defines the primative classes that make up a data structure
-// graph.
+// This header defines the data structure graph.
 //
 //===----------------------------------------------------------------------===//
 
 #ifndef LLVM_ANALYSIS_DSGRAPH_H
 #define LLVM_ANALYSIS_DSGRAPH_H
 
+#include "llvm/Analysis/DSNode.h"
 #include 
 #include 
 #include 
@@ -22,489 +22,6 @@
 class DSNode;                  // Each node in the graph
 class DSGraph;                 // A graph for a function
 class DSNodeIterator;          // Data structure graph traversal iterator
-
-
-//===----------------------------------------------------------------------===//
-/// DSNodeHandle - Implement a "handle" to a data structure node that takes care
-/// of all of the add/un'refing of the node to prevent the backpointers in the
-/// graph from getting out of date.  This class represents a "pointer" in the
-/// graph, whose destination is an indexed offset into a node.
-///
-class DSNodeHandle {
-  DSNode *N;
-  unsigned Offset;
-public:
-  // Allow construction, destruction, and assignment...
-  DSNodeHandle(DSNode *n = 0, unsigned offs = 0) : N(0), Offset(offs) {
-    setNode(n);
-  }
-  DSNodeHandle(const DSNodeHandle &H) : N(0), Offset(H.Offset) { setNode(H.N); }
-  ~DSNodeHandle() { setNode((DSNode*)0); }
-  DSNodeHandle &operator=(const DSNodeHandle &H) {
-    setNode(H.N); Offset = H.Offset;
-    return *this;
-  }
-
-  bool operator<(const DSNodeHandle &H) const {  // Allow sorting
-    return N < H.N || (N == H.N && Offset < H.Offset);
-  }
-  bool operator>(const DSNodeHandle &H) const { return H < *this; }
-  bool operator==(const DSNodeHandle &H) const { // Allow comparison
-    return N == H.N && Offset == H.Offset;
-  }
-  bool operator!=(const DSNodeHandle &H) const { return !operator==(H); }
-
-  // Allow explicit conversion to DSNode...
-  DSNode *getNode() const { return N; }
-  unsigned getOffset() const { return Offset; }
-
-  inline void setNode(DSNode *N);  // Defined inline later...
-  void setOffset(unsigned O) { Offset = O; }
-
-  void addEdgeTo(unsigned LinkNo, const DSNodeHandle &N);
-  void addEdgeTo(const DSNodeHandle &N) { addEdgeTo(0, N); }
-
-  /// mergeWith - Merge the logical node pointed to by 'this' with the node
-  /// pointed to by 'N'.
-  ///
-  void mergeWith(const DSNodeHandle &N);
-
-  // hasLink - Return true if there is a link at the specified offset...
-  inline bool hasLink(unsigned Num) const;
-
-  /// getLink - Treat this current node pointer as a pointer to a structure of
-  /// some sort.  This method will return the pointer a mem[this+Num]
-  ///
-  inline const DSNodeHandle *getLink(unsigned Num) const;
-  inline DSNodeHandle *getLink(unsigned Num);
-
-  inline void setLink(unsigned Num, const DSNodeHandle &NH);
-};
-
-
-//===----------------------------------------------------------------------===//
-/// DSTypeRec - This structure is used to represent a single type that is held
-/// in a DSNode.
-///
-struct DSTypeRec {
-  const Type *Ty;                 // The type itself...
-  unsigned Offset;                // The offset in the node
-  bool isArray;                   // Have we accessed an array of elements?
-  
-  DSTypeRec() : Ty(0), Offset(0), isArray(false) {}
-  DSTypeRec(const Type *T, unsigned O) : Ty(T), Offset(O), isArray(false) {}
-  
-  bool operator<(const DSTypeRec &TR) const {
-    // Sort first by offset!
-    return Offset < TR.Offset || (Offset == TR.Offset && Ty < TR.Ty);
-  }
-  bool operator==(const DSTypeRec &TR) const {
-    return Ty == TR.Ty && Offset == TR.Offset;
-  }
-  bool operator!=(const DSTypeRec &TR) const { return !operator==(TR); }
-};
-
-
-
-//===----------------------------------------------------------------------===//
-/// DSNode - Data structure node class
-///
-/// This class represents an untyped memory object of Size bytes.  It keeps
-/// track of any pointers that have been stored into the object as well as the
-/// different types represented in this object.
-///
-class DSNode {
-  /// Links - Contains one entry for every _distinct_ pointer field in the
-  /// memory block.  These are demand allocated and indexed by the MergeMap
-  /// vector.
-  ///
-  std::vector Links;
-
-  /// MergeMap - Maps from every byte in the object to a signed byte number.
-  /// This map is neccesary due to the merging that is possible as part of the
-  /// unification algorithm.  To merge two distinct bytes of the object together
-  /// into a single logical byte, the indexes for the two bytes are set to the
-  /// same value.  This fully general merging is capable of representing all
-  /// manners of array merging if neccesary.
-  ///
-  /// This map is also used to map outgoing pointers to various byte offsets in
-  /// this data structure node.  If this value is >= 0, then it indicates that
-  /// the numbered entry in the Links vector contains the outgoing edge for this
-  /// byte offset.  In this way, the Links vector can be demand allocated and
-  /// byte elements of the node may be merged without needing a Link allocated
-  /// for it.
-  ///
-  /// Initially, each each element of the MergeMap is assigned a unique negative
-  /// number, which are then merged as the unification occurs.
-  ///
-  std::vector MergeMap;
-
-  /// Referrers - Keep track of all of the node handles that point to this
-  /// DSNode.  These pointers may need to be updated to point to a different
-  /// node if this node gets merged with it.
-  ///
-  std::vector Referrers;
-
-  /// TypeEntries - As part of the merging process of this algorithm, nodes of
-  /// different types can be represented by this single DSNode.  This vector is
-  /// kept sorted.
-  ///
-  std::vector TypeEntries;
-
-  /// Globals - The list of global values that are merged into this node.
-  ///
-  std::vector Globals;
-
-  void operator=(const DSNode &); // DO NOT IMPLEMENT
-public:
-  enum NodeTy {
-    ShadowNode = 0,        // Nothing is known about this node...
-    ScalarNode = 1 << 0,   // Scalar of the current function contains this value
-    AllocaNode = 1 << 1,   // This node was allocated with alloca
-    NewNode    = 1 << 2,   // This node was allocated with malloc
-    GlobalNode = 1 << 3,   // This node was allocated by a global var decl
-    Incomplete = 1 << 4,   // This node may not be complete
-    Modified   = 1 << 5,   // This node is modified in this context
-    Read       = 1 << 6,   // This node is read in this context
-  };
-  
-  /// NodeType - A union of the above bits.  "Shadow" nodes do not add any flags
-  /// to the nodes in the data structure graph, so it is possible to have nodes
-  /// with a value of 0 for their NodeType.  Scalar and Alloca markers go away
-  /// when function graphs are inlined.
-  ///
-  unsigned char NodeType;
-
-  DSNode(enum NodeTy NT, const Type *T);
-  DSNode(const DSNode &);
-
-  ~DSNode() {
-#ifndef NDEBUG
-    dropAllReferences();  // Only needed to satisfy assertion checks...
-    assert(Referrers.empty() && "Referrers to dead node exist!");
-#endif
-  }
-
-  // Iterator for graph interface...
-  typedef DSNodeIterator iterator;
-  typedef DSNodeIterator const_iterator;
-  inline iterator begin() const;   // Defined in DSGraphTraits.h
-  inline iterator end() const;
-
-  //===--------------------------------------------------
-  // Accessors
-
-  /// getSize - Return the maximum number of bytes occupied by this object...
-  ///
-  unsigned getSize() const { return MergeMap.size(); }
-
-  // getTypeEntries - Return the possible types and their offsets in this object
-  const std::vector &getTypeEntries() const { return TypeEntries; }
-
-  /// getReferrers - Return a list of the pointers to this node...
-  ///
-  const std::vector &getReferrers() const { return Referrers; }
-
-  /// isModified - Return true if this node may be modified in this context
-  ///
-  bool isModified() const { return (NodeType & Modified) != 0; }
-
-  /// isRead - Return true if this node may be read in this context
-  ///
-  bool isRead() const { return (NodeType & Read) != 0; }
-
-
-  /// hasLink - Return true if this memory object has a link at the specified
-  /// location.
-  ///
-  bool hasLink(unsigned i) const {
-    assert(i < getSize() && "Field Link index is out of range!");
-    return MergeMap[i] >= 0;
-  }
-
-  DSNodeHandle *getLink(unsigned i) {
-    if (hasLink(i))
-      return &Links[MergeMap[i]];
-    return 0;
-  }
-  const DSNodeHandle *getLink(unsigned i) const {
-    if (hasLink(i))
-      return &Links[MergeMap[i]];
-    return 0;
-  }
-
-  /// getMergeMapLabel - Return the merge map entry specified, to allow printing
-  /// out of DSNodes nicely for DOT graphs.
-  ///
-  int getMergeMapLabel(unsigned i) const {
-    assert(i < MergeMap.size() && "MergeMap index out of range!");
-    return MergeMap[i];
-  }
-
-  /// getTypeRec - This method returns the specified type record if it exists.
-  /// If it does not yet exist, the method checks to see whether or not the
-  /// request would result in an untrackable state.  If adding it would cause
-  /// untrackable state, we foldNodeCompletely the node and return the void
-  /// record, otherwise we add an new TypeEntry and return it.
-  ///
-  DSTypeRec &getTypeRec(const Type *Ty, unsigned Offset);
-
-  /// foldNodeCompletely - If we determine that this node has some funny
-  /// behavior happening to it that we cannot represent, we fold it down to a
-  /// single, completely pessimistic, node.  This node is represented as a
-  /// single byte with a single TypeEntry of "void".
-  ///
-  void foldNodeCompletely();
-
-  /// isNodeCompletelyFolded - Return true if this node has been completely
-  /// folded down to something that can never be expanded, effectively losing
-  /// all of the field sensitivity that may be present in the node.
-  ///
-  bool isNodeCompletelyFolded() const;
-
-  /// setLink - Set the link at the specified offset to the specified
-  /// NodeHandle, replacing what was there.  It is uncommon to use this method,
-  /// instead one of the higher level methods should be used, below.
-  ///
-  void setLink(unsigned i, const DSNodeHandle &NH);
-
-  /// addEdgeTo - Add an edge from the current node to the specified node.  This
-  /// can cause merging of nodes in the graph.
-  ///
-  void addEdgeTo(unsigned Offset, const DSNodeHandle &NH);
-
-  /// mergeWith - Merge this node and the specified node, moving all links to
-  /// and from the argument node into the current node, deleting the node
-  /// argument.  Offset indicates what offset the specified node is to be merged
-  /// into the current node.
-  ///
-  /// The specified node may be a null pointer (in which case, nothing happens).
-  ///
-  void mergeWith(const DSNodeHandle &NH, unsigned Offset);
-
-  /// mergeIndexes - If we discover that two indexes are equivalent and must be
-  /// merged, this function is used to do the dirty work.
-  ///
-  void mergeIndexes(unsigned idx1, unsigned idx2) {
-    assert(idx1 < getSize() && idx2 < getSize() && "Indexes out of range!");
-    signed char MV1 = MergeMap[idx1];
-    signed char MV2 = MergeMap[idx2];
-    if (MV1 != MV2)
-      mergeMappedValues(MV1, MV2);
-  }
-
-
-  /// addGlobal - Add an entry for a global value to the Globals list.  This
-  /// also marks the node with the 'G' flag if it does not already have it.
-  ///
-  void addGlobal(GlobalValue *GV);
-  const std::vector &getGlobals() const { return Globals; }
-  std::vector &getGlobals() { return Globals; }
-
-  void print(std::ostream &O, const DSGraph *G) const;
-  void dump() const;
-
-  void dropAllReferences() {
-    Links.clear();
-  }
-
-  /// remapLinks - Change all of the Links in the current node according to the
-  /// specified mapping.
-  void remapLinks(std::map &OldNodeMap);
-
-private:
-  friend class DSNodeHandle;
-  // addReferrer - Keep the referrer set up to date...
-  void addReferrer(DSNodeHandle *H) { Referrers.push_back(H); }
-  void removeReferrer(DSNodeHandle *H);
-
-  /// rewriteMergeMap - Loop over the mergemap, replacing any references to the
-  /// index From to be references to the index To.
-  ///
-  void rewriteMergeMap(signed char From, signed char To) {
-    assert(From != To && "Cannot change something into itself!");
-    for (unsigned i = 0, e = MergeMap.size(); i != e; ++i)
-      if (MergeMap[i] == From)
-        MergeMap[i] = To;
-  }
-
-  /// mergeMappedValues - This is the higher level form of rewriteMergeMap.  It
-  /// is fully capable of merging links together if neccesary as well as simply
-  /// rewriting the map entries.
-  ///
-  void mergeMappedValues(signed char V1, signed char V2);
-
-  /// growNode - Attempt to grow the node to the specified size.  This may do
-  /// one of three things:
-  ///   1. Grow the node, return false
-  ///   2. Refuse to grow the node, but maintain a trackable situation, return
-  ///      false.
-  ///   3. Be unable to track if node was that size, so collapse the node and
-  ///      return true.
-  ///
-  bool growNode(unsigned RequestedSize);
-};
-
-
-//===----------------------------------------------------------------------===//
-// Define inline DSNodeHandle functions that depend on the definition of DSNode
-//
-
-inline void DSNodeHandle::setNode(DSNode *n) {
-  if (N) N->removeReferrer(this);
-  N = n;
-  if (N) N->addReferrer(this);
-}
-
-inline bool DSNodeHandle::hasLink(unsigned Num) const {
-  assert(N && "DSNodeHandle does not point to a node yet!");
-  return N->hasLink(Num+Offset);
-}
-
-
-/// getLink - Treat this current node pointer as a pointer to a structure of
-/// some sort.  This method will return the pointer a mem[this+Num]
-///
-inline const DSNodeHandle *DSNodeHandle::getLink(unsigned Num) const {
-  assert(N && "DSNodeHandle does not point to a node yet!");
-  return N->getLink(Num+Offset);
-}
-inline DSNodeHandle *DSNodeHandle::getLink(unsigned Num) {
-  assert(N && "DSNodeHandle does not point to a node yet!");
-  return N->getLink(Num+Offset);
-}
-
-inline void DSNodeHandle::setLink(unsigned Num, const DSNodeHandle &NH) {
-  assert(N && "DSNodeHandle does not point to a node yet!");
-  N->setLink(Num+Offset, NH);
-}
-
-///  addEdgeTo - Add an edge from the current node to the specified node.  This
-/// can cause merging of nodes in the graph.
-///
-inline void DSNodeHandle::addEdgeTo(unsigned LinkNo, const DSNodeHandle &Node) {
-  assert(N && "DSNodeHandle does not point to a node yet!");
-  N->addEdgeTo(LinkNo+Offset, Node);
-}
-
-/// mergeWith - Merge the logical node pointed to by 'this' with the node
-/// pointed to by 'N'.
-///
-inline void DSNodeHandle::mergeWith(const DSNodeHandle &Node) {
-  assert(N && "DSNodeHandle does not point to a node yet!");
-  N->mergeWith(Node, Offset);
-}
-
-
-//===----------------------------------------------------------------------===//
-/// DSCallSite - Representation of a call site via its call instruction,
-/// the DSNode handle for the callee function (or function pointer), and
-/// the DSNode handles for the function arguments.
-///
-/// One unusual aspect of this callsite record is the ResolvingCaller member.
-/// If this is non-null, then it indicates the function that allowed a call-site
-/// to finally be resolved.  Because of indirect calls, this function may not
-/// actually be the function that contains the Call instruction itself.  This is
-/// used by the BU and TD passes to communicate.
-/// 
-class DSCallSite {
-  CallInst    *Inst;                    // Actual call site
-  DSNodeHandle RetVal;                  // Returned value
-  DSNodeHandle Callee;                  // The function node called
-  std::vector CallArgs;   // The pointer arguments
-  Function    *ResolvingCaller;         // See comments above
-
-  static void InitNH(DSNodeHandle &NH, const DSNodeHandle &Src,
-                     const std::map &NodeMap) {
-    if (DSNode *N = Src.getNode()) {
-      std::map::const_iterator I = NodeMap.find(N);
-      assert(I != NodeMap.end() && "Not not in mapping!");
-
-      NH.setOffset(Src.getOffset());
-      NH.setNode(I->second);
-    }
-  }
-
-  static void InitNH(DSNodeHandle &NH, const DSNodeHandle &Src,
-                     const std::map &NodeMap) {
-    if (DSNode *N = Src.getNode()) {
-      std::map::const_iterator I = NodeMap.find(N);
-      assert(I != NodeMap.end() && "Not not in mapping!");
-
-      NH.setOffset(Src.getOffset()+I->second.getOffset());
-      NH.setNode(I->second.getNode());
-    }
-  }
-
-  DSCallSite();                         // DO NOT IMPLEMENT
-public:
-  /// Constructor.  Note - This ctor destroys the argument vector passed in.  On
-  /// exit, the argument vector is empty.
-  ///
-  DSCallSite(CallInst &inst, const DSNodeHandle &rv, const DSNodeHandle &callee,
-             std::vector &Args)
-    : Inst(&inst), RetVal(rv), Callee(callee), ResolvingCaller(0) {
-    Args.swap(CallArgs);
-  }
-
-  DSCallSite(const DSCallSite &DSCS)   // Simple copy ctor
-    : Inst(DSCS.Inst), RetVal(DSCS.RetVal),
-      Callee(DSCS.Callee), CallArgs(DSCS.CallArgs),
-      ResolvingCaller(DSCS.ResolvingCaller) {}
-
-  /// Mapping copy constructor - This constructor takes a preexisting call site
-  /// to copy plus a map that specifies how the links should be transformed.
-  /// This is useful when moving a call site from one graph to another.
-  ///
-  template
-  DSCallSite(const DSCallSite &FromCall, const MapTy &NodeMap) {
-    Inst = FromCall.Inst;
-    InitNH(RetVal, FromCall.RetVal, NodeMap);
-    InitNH(Callee, FromCall.Callee, NodeMap);
-
-    CallArgs.resize(FromCall.CallArgs.size());
-    for (unsigned i = 0, e = FromCall.CallArgs.size(); i != e; ++i)
-      InitNH(CallArgs[i], FromCall.CallArgs[i], NodeMap);
-    ResolvingCaller = FromCall.ResolvingCaller;
-  }
-
-  // Accessor functions...
-  Function           &getCaller()     const;
-  CallInst           &getCallInst()   const { return *Inst; }
-        DSNodeHandle &getRetVal()           { return RetVal; }
-        DSNodeHandle &getCallee()           { return Callee; }
-  const DSNodeHandle &getRetVal()     const { return RetVal; }
-  const DSNodeHandle &getCallee()     const { return Callee; }
-  void setCallee(const DSNodeHandle &H) { Callee = H; }
-
-  unsigned            getNumPtrArgs() const { return CallArgs.size(); }
-
-  Function           *getResolvingCaller() const { return ResolvingCaller; }
-  void setResolvingCaller(Function *F) { ResolvingCaller = F; }
-
-  DSNodeHandle &getPtrArg(unsigned i) {
-    assert(i < CallArgs.size() && "Argument to getPtrArgNode is out of range!");
-    return CallArgs[i];
-  }
-  const DSNodeHandle &getPtrArg(unsigned i) const {
-    assert(i < CallArgs.size() && "Argument to getPtrArgNode is out of range!");
-    return CallArgs[i];
-  }
-
-  bool operator<(const DSCallSite &CS) const {
-    if (RetVal < CS.RetVal) return true;
-    if (RetVal > CS.RetVal) return false;
-    if (Callee < CS.Callee) return true;
-    if (Callee > CS.Callee) return false;
-    return CallArgs < CS.CallArgs;
-  }
-
-  bool operator==(const DSCallSite &CS) const {
-    return RetVal == CS.RetVal && Callee == CS.Callee &&
-           CallArgs == CS.CallArgs;
-  }
-};
-
 
 //===----------------------------------------------------------------------===//
 /// DSGraph - The graph that represents a function.




From lattner at cs.uiuc.edu  Thu Oct 31 00:53:02 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu Oct 31 00:53:02 2002
Subject: [llvm-commits] CVS: llvm/lib/Analysis/DataStructure/Local.cpp
Message-ID: <200210310652.AAA11296@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Analysis/DataStructure:

Local.cpp updated: 1.22 -> 1.23

---
Log message:

Remove dead code


---
Diffs of the changes:

Index: llvm/lib/Analysis/DataStructure/Local.cpp
diff -u llvm/lib/Analysis/DataStructure/Local.cpp:1.22 llvm/lib/Analysis/DataStructure/Local.cpp:1.23
--- llvm/lib/Analysis/DataStructure/Local.cpp:1.22	Wed Oct 30 23:45:02 2002
+++ llvm/lib/Analysis/DataStructure/Local.cpp	Thu Oct 31 00:52:26 2002
@@ -116,7 +116,7 @@
     DSNodeHandle &getValueNode(Value &V);
 
     /// getValueDest - Return the DSNode that the actual value points to.  This
-    /// is basically the same thing as: getLink(getValueNode(V), 0)
+    /// is the same thing as: getLink(getValueNode(V))
     ///
     DSNodeHandle &getValueDest(Value &V);
 
@@ -127,12 +127,9 @@
 
     /// getLink - This method is used to return the specified link in the
     /// specified node if one exists.  If a link does not already exist (it's
-    /// null), then we create a new node, link it, then return it.  We must
-    /// specify the type of the Node field we are accessing so that we know what
-    /// type should be linked to if we need to create a new node.
+    /// null), then we create a new node, link it, then return it.
     ///
-    DSNodeHandle &getLink(const DSNodeHandle &Node, unsigned Link,
-                          const Type *FieldTy);
+    DSNodeHandle &getLink(const DSNodeHandle &Node, unsigned Link = 0);
   };
 }
 
@@ -218,11 +215,11 @@
   }
 }
 
-/// getValueDest - Return the DSNode that the actual value points to.  This
-/// is basically the same thing as: getLink(getValueNode(V), 0)
+/// getValueDest - Return the DSNode that the actual value points to.  This is
+/// the same thing as: getLink(getValueNode(V), 0)
 ///
 DSNodeHandle &GraphBuilder::getValueDest(Value &V) {
-  return getLink(getValueNode(V), 0, V.getType());
+  return getLink(getValueNode(V));
 }
 
 
@@ -232,24 +229,11 @@
 /// specify the type of the Node field we are accessing so that we know what
 /// type should be linked to if we need to create a new node.
 ///
-DSNodeHandle &GraphBuilder::getLink(const DSNodeHandle &node,
-                                    unsigned LinkNo,
-                                    const Type *FieldTy  // FIXME: eliminate
-                                    ) {
+DSNodeHandle &GraphBuilder::getLink(const DSNodeHandle &node, unsigned LinkNo) {
   DSNodeHandle &Node = const_cast(node);
   DSNodeHandle *Link = Node.getLink(LinkNo);
   if (Link) return *Link;
 
-#if 0    // FIXME: delete
-  // If we are indexing with a typed pointer, then the thing we are pointing
-  // to is of the pointed type.  If we are pointing to it with an integer
-  // (because of cast to an integer), we represent it with a void type.
-  //
-  const Type *ReqTy = 0;
-  if (const PointerType *Ptr = dyn_cast(FieldTy))
-    ReqTy = Ptr->getElementType();
-#endif
-  
   // If the link hasn't been created yet, make and return a new shadow node
   DSNode *N = createNode(DSNode::ShadowNode, 0);
   Node.setLink(LinkNo, N);
@@ -373,7 +357,7 @@
   Ptr.getNode()->getTypeRec(LI.getType(), Ptr.getOffset());
   
   if (isPointerType(LI.getType()))
-    getValueNode(LI).addEdgeTo(getLink(Ptr, 0, LI.getType()));
+    getValueNode(LI).addEdgeTo(getLink(Ptr));
 }
 
 void GraphBuilder::visitStoreInst(StoreInst &SI) {
@@ -404,15 +388,14 @@
   // Set up the return value...
   DSNodeHandle RetVal;
   if (isPointerType(CI.getType()))
-    RetVal = getLink(getValueNode(CI), 0, CI.getType());
+    RetVal = getLink(getValueNode(CI));
 
   DSNodeHandle Callee;
   // Special case for a direct call, avoid creating spurious scalar node...
   if (GlobalValue *GV = dyn_cast(CI.getOperand(0)))
     Callee = getGlobalNode(*GV);
   else
-    Callee = getLink(getValueNode(*CI.getOperand(0)), 0,
-                     CI.getOperand(0)->getType());
+    Callee = getLink(getValueNode(*CI.getOperand(0)));
 
   std::vector Args;
   Args.reserve(CI.getNumOperands()-1);
@@ -420,8 +403,7 @@
   // Calculate the arguments vector...
   for (unsigned i = 1, e = CI.getNumOperands(); i != e; ++i)
     if (isPointerType(CI.getOperand(i)->getType()))
-      Args.push_back(getLink(getValueNode(*CI.getOperand(i)), 0,
-                             CI.getOperand(i)->getType()));
+      Args.push_back(getLink(getValueNode(*CI.getOperand(i))));
 
   // Add a new function call entry...
   FunctionCalls.push_back(DSCallSite(CI, RetVal, Callee, Args));
@@ -430,8 +412,7 @@
 /// Handle casts...
 void GraphBuilder::visitCastInst(CastInst &CI) {
   if (isPointerType(CI.getType()) && isPointerType(CI.getOperand(0)->getType()))
-    getValueNode(CI).addEdgeTo(getLink(getValueNode(*CI.getOperand(0)), 0,
-                                       CI.getOperand(0)->getType()));
+    getValueNode(CI).addEdgeTo(getLink(getValueNode(*CI.getOperand(0))));
 }
 
 




From vadve at cs.uiuc.edu  Thu Oct 31 09:33:01 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Thu Oct 31 09:33:01 2002
Subject: [llvm-commits] CVS: llvm/utils/cvsupdate
Message-ID: <200210311532.JAA12541@psmith.cs.uiuc.edu>


Changes in directory llvm/utils:

cvsupdate updated: 1.4 -> 1.5

---
Log message:

Do not print "NEW FILES AND DIRECTORIES" unless requested separately
because this is usually such a long list that it makes the output
useless anyway.

Disable checking exit status until we can find something more precise.
The exit status is too coarse-grain to be useful.


---
Diffs of the changes:

Index: llvm/utils/cvsupdate
diff -u llvm/utils/cvsupdate:1.4 llvm/utils/cvsupdate:1.5
--- llvm/utils/cvsupdate:1.4	Mon Sep 16 13:09:42 2002
+++ llvm/utils/cvsupdate	Thu Oct 31 09:32:24 2002
@@ -16,6 +16,7 @@
 alias usage 'echo "USAGE: $0:t [-h][-n]"; set pstatus = 1; goto cleanup'
 
 set doit = 1
+set printnew = 0
 unset options_done
 while ( !( $?options_done ) && ($#argv > 0))
     switch ($argv[1])
@@ -23,6 +24,8 @@
 	    usage
 	case -n :
 	    set doit = 0; shift argv; breaksw
+	case -new :
+	    set printnew = 1; shift argv; breaksw
 	default :
 	    set options_done; breaksw
     endsw
@@ -31,13 +34,13 @@
 if ($doit == 1) then
     /bin/mv -f cvs.out cvs.out.bak
     cvs update -P -d >& cvs.out
-    if ($status != 0) then
-        echo "ERROR: CVS update failed: "
-	cat cvs.out
-	exit 1
+##    if ($status != 0) then
+##        echo "ERROR: CVS update failed: "
+##	cat cvs.out
+##	exit 1
     endif
 else
-    echo ""; echo "Not updating files."; echo ""
+    echo ""; echo "NOT UPDATING FILES.  RESULTS FROM LAST RUN:"; echo ""
 endif
 
 echo ""; echo "	FILES UPDATED:"
@@ -53,7 +56,11 @@
 grep '^M' cvs.out | grep -v Merging
 
 echo ""; echo "	NEW FILES AND DIRECTORIES:"
-grep '^\?' cvs.out | & grep -v '\.bc' | grep -v Updating | grep -v cvsup | grep -v 'cvs.out' | grep -v gnumake.out | grep -v '\.mc$' | grep -v '\.s$' | grep -v '\.native'
+if ($printnew != 0) then
+    grep '^\?' cvs.out | & grep -v '\.bc' | grep -v Updating | grep -v cvsup | grep -v 'cvs.out' | grep -v gnumake.out | grep -v '\.mc$' | grep -v '\.s$' | grep -v '\.native'
+else
+    echo '(USE "cvsupdate -n -new" TO SEE NEW FILES AND DIRECTORIES.)'
+endif
 
 echo ""
 




From vadve at cs.uiuc.edu  Thu Oct 31 09:35:00 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Thu Oct 31 09:35:00 2002
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/MachineInstrAnnot.cpp
Message-ID: <200210311534.JAA12593@psmith.cs.uiuc.edu>


Changes in directory llvm/lib/CodeGen:

MachineInstrAnnot.cpp updated: 1.5 -> 1.6

---
Log message:

Restore support for indirect function calls (which briefly wasn't working
after I removed annotations on MachineInstr for the CallDescriptor).


---
Diffs of the changes:

Index: llvm/lib/CodeGen/MachineInstrAnnot.cpp
diff -u llvm/lib/CodeGen/MachineInstrAnnot.cpp:1.5 llvm/lib/CodeGen/MachineInstrAnnot.cpp:1.6
--- llvm/lib/CodeGen/MachineInstrAnnot.cpp:1.5	Tue Oct 29 13:40:17 2002
+++ llvm/lib/CodeGen/MachineInstrAnnot.cpp	Thu Oct 31 09:34:48 2002
@@ -45,18 +45,24 @@
 
 // Mechanism to get the descriptor for a CALL MachineInstr.
 // We get the LLVM CallInstr from the ret. addr. register argument
-// of the CALL MachineInstr, then get the CallArgsDescriptor from the
-// MachineCodeForInstruction object for the CallInstr.
+// of the CALL MachineInstr (which is explicit operand #3 for indirect
+// calls or the last implicit operand for direct calls).  We then get
+// the CallArgsDescriptor from the MachineCodeForInstruction object for
+// the CallInstr.
 // This is roundabout but avoids adding a new map or annotation just
 // to keep track of CallArgsDescriptors.
 // 
 CallArgsDescriptor *CallArgsDescriptor::get(const MachineInstr* MI)
 {
   const TmpInstruction* retAddrReg =
-    cast(MI->getImplicitRef(MI->getNumImplicitRefs()-1));
+    cast(isa(MI->getOperand(0).getVRegValue())
+                         ? MI->getImplicitRef(MI->getNumImplicitRefs()-1)
+                         : MI->getOperand(2).getVRegValue());
+
   assert(retAddrReg->getNumOperands() == 1 &&
          isa(retAddrReg->getOperand(0)) &&
-         "Order of implicit args of CALL instr. changed. FIX THIS CODE!");
+         "Location of callInstr arg for CALL instr. changed? FIX THIS CODE!");
+
   const CallInst* callInstr = cast(retAddrReg->getOperand(0));
 
   CallArgsDescriptor* desc =




From lattner at cs.uiuc.edu  Thu Oct 31 11:10:02 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu Oct 31 11:10:02 2002
Subject: [llvm-commits] CVS: llvm/lib/VMCore/iOperators.cpp
Message-ID: <200210311709.LAA15997@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/VMCore:

iOperators.cpp updated: 1.20 -> 1.21

---
Log message:

Fix nasty bug in ::isNeg()


---
Diffs of the changes:

Index: llvm/lib/VMCore/iOperators.cpp
diff -u llvm/lib/VMCore/iOperators.cpp:1.20 llvm/lib/VMCore/iOperators.cpp:1.21
--- llvm/lib/VMCore/iOperators.cpp:1.20	Wed Oct 30 22:24:23 2002
+++ llvm/lib/VMCore/iOperators.cpp	Thu Oct 31 11:09:06 2002
@@ -91,7 +91,7 @@
 bool BinaryOperator::isNeg(const Value *V) {
   if (const BinaryOperator *Bop = dyn_cast(V))
     return Bop->getOpcode() == Instruction::Sub &&
-      isa(Bop->getOperand(0)) && cast(V)->isNullValue();
+      Bop->getOperand(0) == Constant::getNullValue(Bop->getType());
   return false;
 }
 




From lattner at cs.uiuc.edu  Thu Oct 31 11:14:01 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu Oct 31 11:14:01 2002
Subject: [llvm-commits] CVS: llvm/lib/Transforms/Scalar/Reassociate.cpp
Message-ID: <200210311713.LAA16022@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Transforms/Scalar:

Reassociate.cpp updated: 1.12 -> 1.13

---
Log message:

Fixes to the reassociate pass to make it respect dominance properties

Huge thanks go to Casey Carter for writing this fix, reassociate is now
reoperational!



---
Diffs of the changes:

Index: llvm/lib/Transforms/Scalar/Reassociate.cpp
diff -u llvm/lib/Transforms/Scalar/Reassociate.cpp:1.12 llvm/lib/Transforms/Scalar/Reassociate.cpp:1.13
--- llvm/lib/Transforms/Scalar/Reassociate.cpp:1.12	Mon Oct 21 15:00:26 2002
+++ llvm/lib/Transforms/Scalar/Reassociate.cpp	Thu Oct 31 11:12:59 2002
@@ -14,6 +14,9 @@
 // (starting at 2), which effectively gives values in deep loops higher rank
 // than values not in loops.
 //
+// This code was originally written by Chris Lattner, and was then cleaned up
+// and perfected by Casey Carter.
+//
 //===----------------------------------------------------------------------===//
 
 #include "llvm/Transforms/Scalar.h"
@@ -86,24 +89,6 @@
 }
 
 
-// isCommutativeOperator - Return true if the specified instruction is
-// commutative and associative.  If the instruction is not commutative and
-// associative, we can not reorder its operands!
-//
-static inline BinaryOperator *isCommutativeOperator(Instruction *I) {
-  // Floating point operations do not commute!
-  if (I->getType()->isFloatingPoint()) return 0;
-
-  if (I->getOpcode() == Instruction::Add || 
-      I->getOpcode() == Instruction::Mul ||
-      I->getOpcode() == Instruction::And || 
-      I->getOpcode() == Instruction::Or  ||
-      I->getOpcode() == Instruction::Xor)
-    return cast(I);
-  return 0;    
-}
-
-
 bool Reassociate::ReassociateExpr(BinaryOperator *I) {
   Value *LHS = I->getOperand(0);
   Value *RHS = I->getOperand(1);
@@ -114,7 +99,9 @@
 
   // Make sure the LHS of the operand always has the greater rank...
   if (LHSRank < RHSRank) {
-    I->swapOperands();
+    bool Success = !I->swapOperands();
+    assert(Success && "swapOperands failed");
+
     std::swap(LHS, RHS);
     std::swap(LHSRank, RHSRank);
     Changed = true;
@@ -137,15 +124,28 @@
 
         // Convert ((a + 12) + 10) into (a + (12 + 10))
         I->setOperand(0, LHSI->getOperand(TakeOp));
-        LHSI->setOperand(TakeOp, RHS);
-        I->setOperand(1, LHSI);
+
+        // Move the LHS expression forward, to ensure that it is dominated by
+        // its operands.
+        std::string Name = LHSI->getName();
+        LHSI->setName("");
+        BinaryOperator *NewLHS =
+          BinaryOperator::create(LHSI->getOpcode(),
+                                 LHSI->getOperand(0), LHSI->getOperand(1),
+                                 Name, I);
+
+        NewLHS->setOperand(TakeOp, RHS);
+        I->setOperand(1, NewLHS);
+
+        assert(LHSI->use_size() == 0 && "References to LHS shouldn't exist!");
+        LHSI->getParent()->getInstList().erase(LHSI);
 
         ++NumChanged;
         DEBUG(std::cerr << "Reassociated: " << I << " Result BB: "
                         << I->getParent());
 
         // Since we modified the RHS instruction, make sure that we recheck it.
-        ReassociateExpr(LHSI);
+        ReassociateExpr(NewLHS);
         return true;
       }
     }
@@ -159,7 +159,7 @@
 // version of the value is returned, and BI is left pointing at the instruction
 // that should be processed next by the reassociation pass.
 //
-static Value *NegateValue(Value *V, BasicBlock *BB, BasicBlock::iterator &BI) {
+static Value *NegateValue(Value *V, BasicBlock::iterator &BI) {
   // We are trying to expose opportunity for reassociation.  One of the things
   // that we want to do to achieve this is to push a negation as deep into an
   // expression chain as possible, to expose the add instructions.  In practice,
@@ -171,8 +171,8 @@
   //
   if (Instruction *I = dyn_cast(V))
     if (I->getOpcode() == Instruction::Add && I->use_size() == 1) {
-      Value *RHS = NegateValue(I->getOperand(1), BB, BI);
-      Value *LHS = NegateValue(I->getOperand(0), BB, BI);
+      Value *RHS = NegateValue(I->getOperand(1), BI);
+      Value *LHS = NegateValue(I->getOperand(0), BI);
 
       // We must actually insert a new add instruction here, because the neg
       // instructions do not dominate the old add instruction in general.  By
@@ -187,12 +187,7 @@
   // Insert a 'neg' instruction that subtracts the value from zero to get the
   // negation.
   //
-  Instruction *Neg =
-    BinaryOperator::create(Instruction::Sub,
-                           Constant::getNullValue(V->getType()), V,
-                           V->getName()+".neg", BI);
-  --BI;
-  return Neg;
+  return BI = BinaryOperator::createNeg(V, V->getName() + ".neg", BI);
 }
 
 
@@ -200,10 +195,37 @@
   bool Changed = false;
   for (BasicBlock::iterator BI = BB->begin(); BI != BB->end(); ++BI) {
 
+    if (BI->getOpcode() == Instruction::Sub && !BinaryOperator::isNeg(BI)) {
+      // Convert a subtract into an add and a neg instruction... so that sub
+      // instructions can be commuted with other add instructions...
+      //
+      // Calculate the negative value of Operand 1 of the sub instruction...
+      // and set it as the RHS of the add instruction we just made...
+      //
+      std::string Name = BI->getName();
+      BI->setName("");
+      Instruction *New =
+        BinaryOperator::create(Instruction::Add, BI->getOperand(0),
+                               BI->getOperand(1), Name, BI);
+
+      // Everyone now refers to the add instruction...
+      BI->replaceAllUsesWith(New);
+
+      // Put the new add in the place of the subtract... deleting the subtract
+      BB->getInstList().erase(BI);
+
+      BI = New;
+      New->setOperand(1, NegateValue(New->getOperand(1), BI));
+      
+      Changed = true;
+      DEBUG(std::cerr << "Negated: " << New << " Result BB: " << BB);
+    }
+
     // If this instruction is a commutative binary operator, and the ranks of
     // the two operands are sorted incorrectly, fix it now.
     //
-    if (BinaryOperator *I = isCommutativeOperator(BI)) {
+    if (BI->isAssociative()) {
+      BinaryOperator *I = cast(&*BI);
       if (!I->use_empty()) {
         // Make sure that we don't have a tree-shaped computation.  If we do,
         // linearize it.  Convert (A+B)+(C+D) into ((A+B)+C)+D
@@ -234,31 +256,6 @@
         //
         Changed |= ReassociateExpr(I);
       }
-
-    } else if (BI->getOpcode() == Instruction::Sub &&
-               BI->getOperand(0) != Constant::getNullValue(BI->getType())) {
-      // Convert a subtract into an add and a neg instruction... so that sub
-      // instructions can be commuted with other add instructions...
-      //
-      Instruction *New = BinaryOperator::create(Instruction::Add,
-                                                BI->getOperand(0),
-                                                BI->getOperand(1),
-                                                BI->getName());
-      Value *NegatedValue = BI->getOperand(1);
-
-      // Everyone now refers to the add instruction...
-      BI->replaceAllUsesWith(New);
-
-      // Put the new add in the place of the subtract... deleting the subtract
-      BI = BB->getInstList().erase(BI);
-      BI = ++BB->getInstList().insert(BI, New);
-
-      // Calculate the negative value of Operand 1 of the sub instruction...
-      // and set it as the RHS of the add instruction we just made...
-      New->setOperand(1, NegateValue(NegatedValue, BB, BI));
-      --BI;
-      Changed = true;
-      DEBUG(std::cerr << "Negated: " << New << " Result BB: " << BB);
     }
   }
 




From lattner at cs.uiuc.edu  Thu Oct 31 11:14:07 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu Oct 31 11:14:07 2002
Subject: [llvm-commits] CVS: llvm/tools/gccas/gccas.cpp
Message-ID: <200210311713.LAA16031@apoc.cs.uiuc.edu>


Changes in directory llvm/tools/gccas:

gccas.cpp updated: 1.52 -> 1.53

---
Log message:

Reassociate now works


---
Diffs of the changes:

Index: llvm/tools/gccas/gccas.cpp
diff -u llvm/tools/gccas/gccas.cpp:1.52 llvm/tools/gccas/gccas.cpp:1.53
--- llvm/tools/gccas/gccas.cpp:1.52	Sun Sep 22 13:50:22 2002
+++ llvm/tools/gccas/gccas.cpp	Thu Oct 31 11:13:11 2002
@@ -75,9 +75,8 @@
   addPass(PM, createRaisePointerReferencesPass(TD));// Recover type information
   addPass(PM, createInstructionCombiningPass()); // Combine silly seq's
   addPass(PM, createPromoteMemoryToRegister());  // Promote alloca's to regs
-  // Disabling until this is fixed -- Vikram, 7/7/02.
-  // addPass(PM, createReassociatePass());          // Reassociate expressions
-  addPass(PM, createCorrelatedExpressionEliminationPass());
+  addPass(PM, createReassociatePass());          // Reassociate expressions
+  addPass(PM, createCorrelatedExpressionEliminationPass());// Kill corr branches
   addPass(PM, createInstructionCombiningPass()); // Combine silly seq's
   addPass(PM, createCFGSimplificationPass());    // Merge & remove BBs
   addPass(PM, createLICMPass());                 // Hoist loop invariants




From lattner at cs.uiuc.edu  Thu Oct 31 11:17:01 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu Oct 31 11:17:01 2002
Subject: [llvm-commits] CVS: llvm/lib/Target/Sparc/Sparc.cpp
Message-ID: <200210311716.LAA16275@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Target/Sparc:

Sparc.cpp updated: 1.55 -> 1.56

---
Log message:

Reassociate pass now works


---
Diffs of the changes:

Index: llvm/lib/Target/Sparc/Sparc.cpp
diff -u llvm/lib/Target/Sparc/Sparc.cpp:1.55 llvm/lib/Target/Sparc/Sparc.cpp:1.56
--- llvm/lib/Target/Sparc/Sparc.cpp:1.55	Tue Oct 29 19:07:12 2002
+++ llvm/lib/Target/Sparc/Sparc.cpp	Thu Oct 31 11:16:18 2002
@@ -151,7 +151,7 @@
   if (!DisablePreSelect)
     {
       PM.add(createPreSelectionPass(*this));
-      /* PM.add(createReassociatePass()); */
+      PM.add(createReassociatePass());
       PM.add(createLICMPass());
       PM.add(createGCSEPass());
     }




From hldnbrnd at cs.uiuc.edu  Thu Oct 31 12:24:01 2002
From: hldnbrnd at cs.uiuc.edu (Nicholas Hildenbrandt)
Date: Thu Oct 31 12:24:01 2002
Subject: [llvm-commits] CVS: llvm/test/Regression/CBackend/2002-10-30-FunctionPointerAlloca.ll Makefile
Message-ID: <200210311823.MAA10788@trinity.cs.uiuc.edu>


Changes in directory llvm/test/Regression/CBackend:

2002-10-30-FunctionPointerAlloca.ll added (r1.1)
Makefile updated: 1.4 -> 1.5

---
Log message:

CBE doesn't alloc correctly


---
Diffs of the changes:

Index: llvm/test/Regression/CBackend/Makefile
diff -u llvm/test/Regression/CBackend/Makefile:1.4 llvm/test/Regression/CBackend/Makefile:1.5
--- llvm/test/Regression/CBackend/Makefile:1.4	Fri Sep 20 17:32:00 2002
+++ llvm/test/Regression/CBackend/Makefile	Thu Oct 31 12:23:09 2002
@@ -15,9 +15,9 @@
 
 
 Output/%.to: Output/%.c
-	$(CC) -c -W -Wall $< -o $@ || \
+	$(CC) -c $< -o $@ #|| \
 		(rm -f $@; $(FAILURE) $@ )
 
 Output/%.c: %.ll Output/.dir $(LAS) $(LDIS)
-	$(LAS) < $< | $(LDIS) -c > $@ || \
+	$(LAS) < $< | $(LDIS) -c > $@ #|| \
 		(rm -f $@; $(FAILURE) $@ )




From lattner at cs.uiuc.edu  Thu Oct 31 15:25:01 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu Oct 31 15:25:01 2002
Subject: [llvm-commits] CVS: llvm/include/llvm/Analysis/DSGraph.h DSNode.h
Message-ID: <200210312124.PAA17350@apoc.cs.uiuc.edu>


Changes in directory llvm/include/llvm/Analysis:

DSGraph.h updated: 1.23 -> 1.24
DSNode.h updated: 1.1 -> 1.2

---
Log message:

Eliminate some unneccesary #includes and forward decls


---
Diffs of the changes:

Index: llvm/include/llvm/Analysis/DSGraph.h
diff -u llvm/include/llvm/Analysis/DSGraph.h:1.23 llvm/include/llvm/Analysis/DSGraph.h:1.24
--- llvm/include/llvm/Analysis/DSGraph.h:1.23	Thu Oct 31 00:34:18 2002
+++ llvm/include/llvm/Analysis/DSGraph.h	Thu Oct 31 15:24:10 2002
@@ -8,20 +8,6 @@
 #define LLVM_ANALYSIS_DSGRAPH_H
 
 #include "llvm/Analysis/DSNode.h"
-#include 
-#include 
-#include 
-#include 
-
-class Function;
-class CallInst;
-class Value;
-class GlobalValue;
-class Type;
-
-class DSNode;                  // Each node in the graph
-class DSGraph;                 // A graph for a function
-class DSNodeIterator;          // Data structure graph traversal iterator
 
 //===----------------------------------------------------------------------===//
 /// DSGraph - The graph that represents a function.


Index: llvm/include/llvm/Analysis/DSNode.h
diff -u llvm/include/llvm/Analysis/DSNode.h:1.1 llvm/include/llvm/Analysis/DSNode.h:1.2
--- llvm/include/llvm/Analysis/DSNode.h:1.1	Thu Oct 31 00:34:18 2002
+++ llvm/include/llvm/Analysis/DSNode.h	Thu Oct 31 15:24:10 2002
@@ -8,20 +8,6 @@
 #define LLVM_ANALYSIS_DSNODE_H
 
 #include "llvm/Analysis/DSSupport.h"
-#include 
-#include 
-#include 
-#include 
-
-class Function;
-class CallInst;
-class Value;
-class GlobalValue;
-class Type;
-
-class DSNode;                  // Each node in the graph
-class DSGraph;                 // A graph for a function
-class DSNodeIterator;          // Data structure graph traversal iterator
 
 //===----------------------------------------------------------------------===//
 /// DSNode - Data structure node class




From lattner at cs.uiuc.edu  Thu Oct 31 16:42:00 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu Oct 31 16:42:00 2002
Subject: [llvm-commits] CVS: llvm/lib/Analysis/DataStructure/DataStructure.cpp
Message-ID: <200210312241.QAA18070@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Analysis/DataStructure:

DataStructure.cpp updated: 1.36 -> 1.37

---
Log message:

     * Minor optimization: when merging nodes, merge the smaller one into the
       larger one.
     * Handle the case where we are merging two nodes of different size better.


---
Diffs of the changes:

Index: llvm/lib/Analysis/DataStructure/DataStructure.cpp
diff -u llvm/lib/Analysis/DataStructure/DataStructure.cpp:1.36 llvm/lib/Analysis/DataStructure/DataStructure.cpp:1.37
--- llvm/lib/Analysis/DataStructure/DataStructure.cpp:1.36	Wed Oct 30 23:45:02 2002
+++ llvm/lib/Analysis/DataStructure/DataStructure.cpp	Thu Oct 31 16:41:15 2002
@@ -355,7 +355,7 @@
   // now completely folded.
   //
   if (isNodeCompletelyFolded()) {
-    NH.getNode()->foldNodeCompletely();
+    N->foldNodeCompletely();
   } else if (NH.getNode()->isNodeCompletelyFolded()) {
     foldNodeCompletely();
     Offset = 0;
@@ -367,6 +367,10 @@
   if (Offset > NH.getOffset()) {
     N->mergeWith(DSNodeHandle(this, Offset), NH.getOffset());
     return;
+  } else if (Offset == NH.getOffset() && getSize() < N->getSize()) {
+    // If the offsets are the same, merge the smaller node into the bigger node
+    N->mergeWith(DSNodeHandle(this, Offset), NH.getOffset());
+    return;
   }
 
 #if 0
@@ -381,9 +385,15 @@
   //
   unsigned NOffset = NH.getOffset()-Offset;
 
+  // If our destination node is too small... try to grow it.
+  if (N->getSize()+NOffset > getSize() &&
+      growNode(N->getSize()+NOffset)) {
+    // Catastrophic failure occured and we had to collapse the node.  In this
+    // case, collapse the other node as well.
+    N->foldNodeCompletely();
+    NOffset = 0;
+  }
   unsigned NSize = N->getSize();
-  assert(NSize+NOffset <= getSize() &&
-         "Don't know how to merge extend a merged nodes size yet!");
 
   // Remove all edges pointing at N, causing them to point to 'this' instead.
   // Make sure to adjust their offset, not just the node pointer.




From llvm at cs.uiuc.edu  Thu Oct 31 17:05:01 2002
From: llvm at cs.uiuc.edu (LLVM)
Date: Thu Oct 31 17:05:01 2002
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/InstSelectSimple.cpp X86InstrInfo.def
Message-ID: <200210312304.RAA15823@psmith.cs.uiuc.edu>


Changes in directory llvm/lib/Target/X86:

InstSelectSimple.cpp updated: 1.10 -> 1.11
X86InstrInfo.def updated: 1.6 -> 1.7

---
Log message:

InstSelectSimple.cpp: Include llvm/iOther.h for ShiftInst.
 Add ISel::visitShiftInst() to instruction select shift instructions.
 Add a comment in visitAdd about how to do 64 bit adds. 

X86InstrInfo.def: Add register-to-register move opcodes and shift opcodes.


---
Diffs of the changes:

Index: llvm/lib/Target/X86/InstSelectSimple.cpp
diff -u llvm/lib/Target/X86/InstSelectSimple.cpp:1.10 llvm/lib/Target/X86/InstSelectSimple.cpp:1.11
--- llvm/lib/Target/X86/InstSelectSimple.cpp:1.10	Tue Oct 29 19:49:01 2002
+++ llvm/lib/Target/X86/InstSelectSimple.cpp	Thu Oct 31 17:03:59 2002
@@ -8,6 +8,7 @@
 #include "X86InstrInfo.h"
 #include "llvm/Function.h"
 #include "llvm/iTerminators.h"
+#include "llvm/iOther.h"
 #include "llvm/Type.h"
 #include "llvm/Constants.h"
 #include "llvm/Pass.h"
@@ -55,6 +56,7 @@
     //
     void visitReturnInst(ReturnInst &RI);
     void visitAdd(BinaryOperator &B);
+    void visitShiftInst(ShiftInst &I);
 
     void visitInstruction(Instruction &I) {
       std::cerr << "Cannot instruction select: " << I;
@@ -141,6 +143,186 @@
   BuildMI(BB, X86::RET, 0);
 }
 
+/// Shift instructions: 'shl', 'sar', 'shr' - Some special cases here
+/// for constant immediate shift values, and for constant immediate
+/// shift values equal to 1. Even the general case is sort of special,
+/// because the shift amount has to be in CL, not just any old register.
+///
+void
+ISel::visitShiftInst (ShiftInst & I)
+{
+  unsigned Op0r = getReg (I.getOperand (0));
+  unsigned DestReg = getReg (I);
+  unsigned operandSize = I.getOperand (0)->getType ()->getPrimitiveSize ();
+  bool isRightShift = (I.getOpcode () == Instruction::Shr);
+  bool isOperandUnsigned = I.getType ()->isUnsigned ();
+  bool isConstantShiftAmount = (isa  (I.getOperand (1)));
+  if (ConstantUInt *CUI = dyn_cast  (I.getOperand (1)))
+    {
+      // The shift amount is constant. Get its value.
+      uint64_t shAmt = CUI->getValue ();
+      // Emit:  reg, shamt  (shift-by-immediate opcode "ir" form.)
+      if (isRightShift)
+	{
+	  if (isOperandUnsigned)
+	    {
+	      // This is a shift right logical (SHR).
+	      switch (operandSize)
+		{
+		case 1:
+		  BuildMI (BB, X86::SHRir8, 2,
+			   DestReg).addReg (Op0r).addZImm (shAmt);
+		  break;
+		case 2:
+		  BuildMI (BB, X86::SHRir16, 2,
+			   DestReg).addReg (Op0r).addZImm (shAmt);
+		  break;
+		case 4:
+		  BuildMI (BB, X86::SHRir32, 2,
+			   DestReg).addReg (Op0r).addZImm (shAmt);
+		  break;
+		case 8:
+		default:
+		  visitInstruction (I);
+		  break;
+		}
+	    }
+	  else
+	    {
+	      // This is a shift right arithmetic (SAR).
+	      switch (operandSize)
+		{
+		case 1:
+		  BuildMI (BB, X86::SARir8, 2,
+			   DestReg).addReg (Op0r).addZImm (shAmt);
+		  break;
+		case 2:
+		  BuildMI (BB, X86::SARir16, 2,
+			   DestReg).addReg (Op0r).addZImm (shAmt);
+		  break;
+		case 4:
+		  BuildMI (BB, X86::SARir32, 2,
+			   DestReg).addReg (Op0r).addZImm (shAmt);
+		  break;
+		case 8:
+		default:
+		  visitInstruction (I);
+		  break;
+		}
+	    }
+	}
+      else
+	{
+	  // This is a left shift (SHL).
+	  switch (operandSize)
+	    {
+	    case 1:
+	      BuildMI (BB, X86::SHLir8, 2,
+		       DestReg).addReg (Op0r).addZImm (shAmt);
+	      break;
+	    case 2:
+	      BuildMI (BB, X86::SHLir16, 2,
+		       DestReg).addReg (Op0r).addZImm (shAmt);
+	      break;
+	    case 4:
+	      BuildMI (BB, X86::SHLir32, 2,
+		       DestReg).addReg (Op0r).addZImm (shAmt);
+	      break;
+	    case 8:
+	    default:
+	      visitInstruction (I);
+	      break;
+	    }
+	}
+    }
+  else
+    {
+      // The shift amount is non-constant.
+      //
+      // In fact, you can only shift with a variable shift amount if
+      // that amount is already in the CL register, so we have to put it
+      // there first.
+      //
+      // Get it from the register it's in.
+      unsigned Op1r = getReg (I.getOperand (1));
+      // Emit: move cl, shiftAmount (put the shift amount in CL.)
+      BuildMI (BB, X86::MOVrr8, 2, X86::CL).addReg (Op1r);
+      // Emit:  reg, cl       (shift-by-CL opcode; "rr" form.)
+      if (isRightShift)
+	{
+	  if (isOperandUnsigned)
+	    {
+	      // This is a shift right logical (SHR).
+	      switch (operandSize)
+		{
+		case 1:
+		  BuildMI (BB, X86::SHRrr8, 2,
+			   DestReg).addReg (Op0r).addReg (X86::CL);
+		  break;
+		case 2:
+		  BuildMI (BB, X86::SHRrr16, 2,
+			   DestReg).addReg (Op0r).addReg (X86::CL);
+		  break;
+		case 4:
+		  BuildMI (BB, X86::SHRrr32, 2,
+			   DestReg).addReg (Op0r).addReg (X86::CL);
+		  break;
+		case 8:
+		default:
+		  visitInstruction (I);
+		  break;
+		}
+	    }
+	  else
+	    {
+	      // This is a shift right arithmetic (SAR).
+	      switch (operandSize)
+		{
+		case 1:
+		  BuildMI (BB, X86::SARrr8, 2,
+			   DestReg).addReg (Op0r).addReg (X86::CL);
+		  break;
+		case 2:
+		  BuildMI (BB, X86::SARrr16, 2,
+			   DestReg).addReg (Op0r).addReg (X86::CL);
+		  break;
+		case 4:
+		  BuildMI (BB, X86::SARrr32, 2,
+			   DestReg).addReg (Op0r).addReg (X86::CL);
+		  break;
+		case 8:
+		default:
+		  visitInstruction (I);
+		  break;
+		}
+	    }
+	}
+      else
+	{
+	  // This is a left shift (SHL).
+	  switch (operandSize)
+	    {
+	    case 1:
+	      BuildMI (BB, X86::SHLrr8, 2,
+		       DestReg).addReg (Op0r).addReg (X86::CL);
+	      break;
+	    case 2:
+	      BuildMI (BB, X86::SHLrr16, 2,
+		       DestReg).addReg (Op0r).addReg (X86::CL);
+	      break;
+	    case 4:
+	      BuildMI (BB, X86::SHLrr32, 2,
+		       DestReg).addReg (Op0r).addReg (X86::CL);
+	      break;
+	    case 8:
+	    default:
+	      visitInstruction (I);
+	      break;
+	    }
+	}
+    }
+}
+
 
 /// 'add' instruction - Simply turn this into an x86 reg,reg add instruction.
 void ISel::visitAdd(BinaryOperator &B) {
@@ -157,12 +339,17 @@
   case 4:   // UInt, Int
     BuildMI(BB, X86::ADDrr32, 2, DestReg).addReg(Op0r).addReg(Op1r);
     break;
-
   case 8:   // ULong, Long
+    // Here we have a pair of operands each occupying a pair of registers.
+    // We need to do an ADDrr32 of the least-significant pair immediately
+    // followed by an ADCrr32 (Add with Carry) of the most-significant pair.
+    // I don't know how we are representing these multi-register arguments.
   default:
     visitInstruction(B);  // abort
   }
 }
+
+
 
 /// createSimpleX86InstructionSelector - This pass converts an LLVM function
 /// into a machine code representation is a very simple peep-hole fashion.  The


Index: llvm/lib/Target/X86/X86InstrInfo.def
diff -u llvm/lib/Target/X86/X86InstrInfo.def:1.6 llvm/lib/Target/X86/X86InstrInfo.def:1.7
--- llvm/lib/Target/X86/X86InstrInfo.def:1.6	Tue Oct 29 19:15:31 2002
+++ llvm/lib/Target/X86/X86InstrInfo.def	Thu Oct 31 17:03:59 2002
@@ -37,15 +37,37 @@
 I(RET         , "ret",       M_RET_FLAG, X86II::Void) // ret          CB
 
 // Move instructions
-I(MOVir8      , "movb",               0, 0)           // R = imm8     B0+ rb
-I(MOVir16     , "movw",               0, 0)           // R = imm16    B8+ rw
-I(MOVir32     , "movl",               0, 0)           // R = imm32    B8+ rd
+I(MOVrr8      , "movb",               0, 0)           // R8  = R8     88/r
+I(MOVrr16     , "movw",               0, 0)           // R16 = R16    89/r
+I(MOVrr32     , "movl",               0, 0)           // R32 = R32    89/r
+I(MOVir8      , "movb",               0, 0)           // R8  = imm8   B0+ rb
+I(MOVir16     , "movw",               0, 0)           // R16 = imm16  B8+ rw
+I(MOVir32     , "movl",               0, 0)           // R32 = imm32  B8+ rd
 
 // Arithmetic instructions
 I(ADDrr8      , "addb",               0, 0)           // R8  += R8    00/r
 I(ADDrr16     , "addw",               0, 0)           // R16 += R16   01/r
 I(ADDrr32     , "addl",               0, 0)           // R32 += R32   02/r
 
+// Shift instructions
+I(SHLrr8      , "shlb",               0, 0)           // R8   <<= cl   D2/4
+I(SHLir8      , "shlb",               0, 0)           // R8   <<= imm8 C0/4 ib
+I(SHLrr16     , "shlw",               0, 0)           // R16  <<= cl   D3/4
+I(SHLir16     , "shlw",               0, 0)           // R16  <<= imm8 C1/4 ib
+I(SHLrr32     , "shll",               0, 0)           // R32  <<= cl   D3/4
+I(SHLir32     , "shll",               0, 0)           // R32  <<= imm8 C1/4 ib
+I(SHRrr8      , "shrb",               0, 0)           // R8  >>>= cl   D2/5
+I(SHRir8      , "shrb",               0, 0)           // R8  >>>= imm8 C0/5 ib
+I(SHRrr16     , "shrw",               0, 0)           // R16 >>>= cl   D3/5
+I(SHRir16     , "shrw",               0, 0)           // R16 >>>= imm8 C1/5 ib
+I(SHRrr32     , "shrl",               0, 0)           // R32 >>>= cl   D3/5
+I(SHRir32     , "shrl",               0, 0)           // R32 >>>= imm8 C1/5 ib
+I(SARrr8      , "sarb",               0, 0)           // R8   >>= cl   D2/7
+I(SARir8      , "sarb",               0, 0)           // R8   >>= imm8 C0/7 ib
+I(SARrr16     , "sarw",               0, 0)           // R16  >>= cl   D3/7
+I(SARir16     , "sarw",               0, 0)           // R16  >>= imm8 C1/7 ib
+I(SARrr32     , "sarl",               0, 0)           // R32  >>= cl   D3/7
+I(SARir32     , "sarl",               0, 0)           // R32  >>= imm8 C1/7 ib
 
 // At this point, I is dead, so undefine the macro
 #undef I




From llvm at cs.uiuc.edu  Thu Oct 31 17:06:01 2002
From: llvm at cs.uiuc.edu (LLVM)
Date: Thu Oct 31 17:06:01 2002
Subject: [llvm-commits] CVS: llvm/test/Regression/Jello/test-shift.ll
Message-ID: <200210312305.RAA15837@psmith.cs.uiuc.edu>


Changes in directory llvm/test/Regression/Jello:

test-shift.ll added (r1.1)

---
Log message:

A new test case that tries to generate all the different possible shift
opcodes.


---
Diffs of the changes:



From lattner at cs.uiuc.edu  Thu Oct 31 17:25:01 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu Oct 31 17:25:01 2002
Subject: [llvm-commits] CVS: llvm/lib/Analysis/DataStructure/BottomUpClosure.cpp
Message-ID: <200210312324.RAA18185@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Analysis/DataStructure:

BottomUpClosure.cpp updated: 1.25 -> 1.26

---
Log message:

Add a fixme


---
Diffs of the changes:

Index: llvm/lib/Analysis/DataStructure/BottomUpClosure.cpp
diff -u llvm/lib/Analysis/DataStructure/BottomUpClosure.cpp:1.25 llvm/lib/Analysis/DataStructure/BottomUpClosure.cpp:1.26
--- llvm/lib/Analysis/DataStructure/BottomUpClosure.cpp:1.25	Tue Oct 22 10:58:46 2002
+++ llvm/lib/Analysis/DataStructure/BottomUpClosure.cpp	Thu Oct 31 17:24:00 2002
@@ -172,6 +172,8 @@
           } else if (FI.getName() == "printf" || FI.getName() == "sscanf" ||
                      FI.getName() == "fprintf" || FI.getName() == "open" ||
                      FI.getName() == "sprintf") {
+            // FIXME: These special cases should go away when we can define
+            // functions that take a variable number of arguments.
 
             // Erase the entry in the globals vector
             Callees.erase(Callees.begin()+c--);




From lattner at cs.uiuc.edu  Thu Oct 31 21:17:01 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu Oct 31 21:17:01 2002
Subject: [llvm-commits] CVS: llvm/utils/Burg/Makefile
Message-ID: <200211010316.VAA19539@apoc.cs.uiuc.edu>


Changes in directory llvm/utils/Burg:

Makefile updated: 1.11 -> 1.12

---
Log message:

Fix burg build problem.


---
Diffs of the changes:

Index: llvm/utils/Burg/Makefile
diff -u llvm/utils/Burg/Makefile:1.11 llvm/utils/Burg/Makefile:1.12
--- llvm/utils/Burg/Makefile:1.11	Sun Oct 27 13:06:56 2002
+++ llvm/utils/Burg/Makefile	Thu Oct 31 21:16:45 2002
@@ -1,4 +1,4 @@
-# $Id: Makefile,v 1.11 2002/10/27 19:06:56 lattner Exp $
+# $Id: Makefile,v 1.12 2002/11/01 03:16:45 lattner Exp $
 LEVEL = ../..
 TOOLNAME = burg
 EXTRASOURCES = gram.tab.c
@@ -7,6 +7,8 @@
 
 gram.tab.c gram.tab.h: gram.yc
 	$(VERB) $(BISON) -o gram.tab.c -d $<
+
+lex.c: gram.tab.h
 
 clean::
 	rm -ff gram.tab.h gram.tab.c core* *.aux *.log *.dvi sample sample.c tmp




From lattner at cs.uiuc.edu  Thu Oct 31 22:50:01 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu Oct 31 22:50:01 2002
Subject: [llvm-commits] CVS: llvm/lib/Transforms/ExprTypeConvert.cpp
Message-ID: <200211010449.WAA20306@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Transforms:

ExprTypeConvert.cpp updated: 1.62 -> 1.63

---
Log message:

Make sure to include name information if we have it


---
Diffs of the changes:

Index: llvm/lib/Transforms/ExprTypeConvert.cpp
diff -u llvm/lib/Transforms/ExprTypeConvert.cpp:1.62 llvm/lib/Transforms/ExprTypeConvert.cpp:1.63
--- llvm/lib/Transforms/ExprTypeConvert.cpp:1.62	Tue Oct  8 19:16:00 2002
+++ llvm/lib/Transforms/ExprTypeConvert.cpp	Thu Oct 31 22:49:06 2002
@@ -1134,7 +1134,8 @@
           // Create a cast to convert it to the right type, we know that this
           // is a lossless cast...
           //
-          Params[i] = new CastInst(Params[i], PTs[i], "call.resolve.cast", It);
+          Params[i] = new CastInst(Params[i], PTs[i],  "callarg.cast." +
+                                   Params[i]->getName(), It);
         }
       Meth = NewVal;  // Update call destination to new value
 




From lattner at cs.uiuc.edu  Fri Nov  1 10:47:01 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri Nov  1 10:47:01 2002
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/InstrSched/SchedPriorities.h
Message-ID: <200211011646.KAA22855@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/CodeGen/InstrSched:

SchedPriorities.h updated: 1.20 -> 1.21

---
Log message:

New iostream definitions


---
Diffs of the changes:

Index: llvm/lib/CodeGen/InstrSched/SchedPriorities.h
diff -u llvm/lib/CodeGen/InstrSched/SchedPriorities.h:1.20 llvm/lib/CodeGen/InstrSched/SchedPriorities.h:1.21
--- llvm/lib/CodeGen/InstrSched/SchedPriorities.h:1.20	Sun Oct 27 20:11:53 2002
+++ llvm/lib/CodeGen/InstrSched/SchedPriorities.h	Fri Nov  1 10:46:05 2002
@@ -18,6 +18,7 @@
 #include "llvm/Target/MachineSchedInfo.h"
 #include "Support/hash_set"
 #include 
+#include 
 
 class Function;
 class MachineInstr;




From vadve at cs.uiuc.edu  Fri Nov  1 10:50:00 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Fri Nov  1 10:50:00 2002
Subject: [llvm-commits] CVS: llvm/test/Regression/Transforms/DSAnalysis/Makefile
Message-ID: <200211011649.KAA17131@psmith.cs.uiuc.edu>


Changes in directory llvm/test/Regression/Transforms/DSAnalysis:

Makefile updated: 1.1 -> 1.2

---
Log message:

Use absolute path name for "analyze" since we are changing directories.


---
Diffs of the changes:

Index: llvm/test/Regression/Transforms/DSAnalysis/Makefile
diff -u llvm/test/Regression/Transforms/DSAnalysis/Makefile:1.1 llvm/test/Regression/Transforms/DSAnalysis/Makefile:1.2
--- llvm/test/Regression/Transforms/DSAnalysis/Makefile:1.1	Mon Sep 30 14:24:07 2002
+++ llvm/test/Regression/Transforms/DSAnalysis/Makefile	Fri Nov  1 10:49:10 2002
@@ -8,13 +8,16 @@
 LEVEL = ../../../..
 include $(LEVEL)/test/Makefile.tests
 
+## Get absolute pathname for analyze
+LANALYZE_ABS := $(shell cd `dirname $(LANALYZE)`; pwd)/analyze
+
 TESTS := $(wildcard *.ll)
 FTESTS := $(wildcard *.llx)   # Freeform tests
 
 all:: $(addprefix Output/, $(TESTS:%.ll=%.out))
 
 Output/%.out: %.ll $(LANALYZE) Output/.dir
-	(cd Output/; $(LANALYZE) -datastructure ../$< || \
+	(cd Output/; $(LANALYZE_ABS) -datastructure ../$< || \
                  ( rm -f ../$@; ../$(FAILURE) ../$@ ))
 
 all:: $(addprefix Output/, $(FTESTS:%.llx=%.llx.out))




From lattner at cs.uiuc.edu  Fri Nov  1 11:30:01 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri Nov  1 11:30:01 2002
Subject: [llvm-commits] CVS: llvm/test/Regression/Transforms/CorrelatedExprs/nullpointer.ll
Message-ID: <200211011729.LAA23207@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Regression/Transforms/CorrelatedExprs:

nullpointer.ll added (r1.1)

---
Log message:

Add a testcase cee should eventually pass


---
Diffs of the changes:



From lattner at cs.uiuc.edu  Fri Nov  1 11:35:00 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri Nov  1 11:35:00 2002
Subject: [llvm-commits] CVS: llvm/lib/Analysis/DataStructure/Steensgaard.cpp
Message-ID: <200211011734.LAA23236@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Analysis/DataStructure:

Steensgaard.cpp updated: 1.5 -> 1.6

---
Log message:

Fix comments, steens is context sensitive, we just haven't implemented 
mod/ref apis yet


---
Diffs of the changes:

Index: llvm/lib/Analysis/DataStructure/Steensgaard.cpp
diff -u llvm/lib/Analysis/DataStructure/Steensgaard.cpp:1.5 llvm/lib/Analysis/DataStructure/Steensgaard.cpp:1.6
--- llvm/lib/Analysis/DataStructure/Steensgaard.cpp:1.5	Sun Oct 20 21:08:03 2002
+++ llvm/lib/Analysis/DataStructure/Steensgaard.cpp	Fri Nov  1 11:34:23 2002
@@ -50,16 +50,16 @@
     // alias - This is the only method here that does anything interesting...
     Result alias(const Value *V1, const Value *V2) const;
     
-    /// canCallModify - We are not interprocedural, so we do nothing exciting.
+    /// canCallModify - Not implemented yet: FIXME
     ///
     Result canCallModify(const CallInst &CI, const Value *Ptr) const {
       return MayAlias;
     }
     
-    /// canInvokeModify - We are not interprocedural, so we do nothing exciting.
+    /// canInvokeModify - Not implemented yet: FIXME
     ///
     Result canInvokeModify(const InvokeInst &I, const Value *Ptr) const {
-      return MayAlias;  // We are not interprocedural
+      return MayAlias;
     }
 
   private:




From hldnbrnd at cs.uiuc.edu  Fri Nov  1 11:38:01 2002
From: hldnbrnd at cs.uiuc.edu (Nicholas Hildenbrandt)
Date: Fri Nov  1 11:38:01 2002
Subject: [llvm-commits] CVS: llvm/lib/CWriter/Writer.cpp
Message-ID: <200211011737.LAA12193@niobe.cs.uiuc.edu>


Changes in directory llvm/lib/CWriter:

Writer.cpp updated: 1.68 -> 1.69

---
Log message:

Fixed bug in Regression/CBackend/2002-10-30-FunctionPointerAlloca.ll


---
Diffs of the changes:

Index: llvm/lib/CWriter/Writer.cpp
diff -u llvm/lib/CWriter/Writer.cpp:1.68 llvm/lib/CWriter/Writer.cpp:1.69
--- llvm/lib/CWriter/Writer.cpp:1.68	Mon Oct 28 13:54:06 2002
+++ llvm/lib/CWriter/Writer.cpp	Fri Nov  1 11:37:09 2002
@@ -208,7 +208,7 @@
   case Type::FunctionTyID: {
     const FunctionType *MTy = cast(Ty);
     printType(MTy->getReturnType(), "");
-    Out << " " << NameSoFar << " (";
+    Out << " (" << NameSoFar << ") (";
 
     for (FunctionType::ParamTypes::const_iterator
            I = MTy->getParamTypes().begin(),




From lattner at cs.uiuc.edu  Fri Nov  1 18:12:01 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri Nov  1 18:12:01 2002
Subject: [llvm-commits] CVS: llvm/include/llvm/Analysis/DSNode.h
Message-ID: <200211020011.SAA24522@apoc.cs.uiuc.edu>


Changes in directory llvm/include/llvm/Analysis:

DSNode.h updated: 1.2 -> 1.3

---
Log message:

* Eliminate Scalar node type (renumber other node types)
* Allow DSNodeHandle::mergeWith to work if a node handle isn't pointing to a node yet


---
Diffs of the changes:

Index: llvm/include/llvm/Analysis/DSNode.h
diff -u llvm/include/llvm/Analysis/DSNode.h:1.2 llvm/include/llvm/Analysis/DSNode.h:1.3
--- llvm/include/llvm/Analysis/DSNode.h:1.2	Thu Oct 31 15:24:10 2002
+++ llvm/include/llvm/Analysis/DSNode.h	Fri Nov  1 18:11:12 2002
@@ -62,13 +62,12 @@
 public:
   enum NodeTy {
     ShadowNode = 0,        // Nothing is known about this node...
-    ScalarNode = 1 << 0,   // Scalar of the current function contains this value
-    AllocaNode = 1 << 1,   // This node was allocated with alloca
-    NewNode    = 1 << 2,   // This node was allocated with malloc
-    GlobalNode = 1 << 3,   // This node was allocated by a global var decl
-    Incomplete = 1 << 4,   // This node may not be complete
-    Modified   = 1 << 5,   // This node is modified in this context
-    Read       = 1 << 6,   // This node is read in this context
+    AllocaNode = 1 << 0,   // This node was allocated with alloca
+    NewNode    = 1 << 1,   // This node was allocated with malloc
+    GlobalNode = 1 << 2,   // This node was allocated by a global var decl
+    Incomplete = 1 << 3,   // This node may not be complete
+    Modified   = 1 << 4,   // This node is modified in this context
+    Read       = 1 << 5,   // This node is read in this context
   };
   
   /// NodeType - A union of the above bits.  "Shadow" nodes do not add any flags
@@ -294,8 +293,11 @@
 /// pointed to by 'N'.
 ///
 inline void DSNodeHandle::mergeWith(const DSNodeHandle &Node) {
-  assert(N && "DSNodeHandle does not point to a node yet!");
-  N->mergeWith(Node, Offset);
+  if (N != 0)
+    N->mergeWith(Node, Offset);
+  else {   // No node to merge with, so just point to Node
+    *this = Node;
+  }
 }
 
 #endif




From lattner at cs.uiuc.edu  Fri Nov  1 18:14:01 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri Nov  1 18:14:01 2002
Subject: [llvm-commits] CVS: llvm/lib/Analysis/DataStructure/BottomUpClosure.cpp DataStructure.cpp Local.cpp Printer.cpp
Message-ID: <200211020013.SAA24541@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Analysis/DataStructure:

BottomUpClosure.cpp updated: 1.26 -> 1.27
DataStructure.cpp updated: 1.37 -> 1.38
Local.cpp updated: 1.23 -> 1.24
Printer.cpp updated: 1.27 -> 1.28

---
Log message:

Stop representing scalars as explicit nodes in the graph.  Now the only
nodes in the graph are memory objects, which is very nice.  This also greatly 
reduces the size and memory footprint for DSGraphs.  For example, the local
DSGraph for llu went from 65 to 13 nodes with this change.  As a side bonus,
dot seems to lay out the graphs slightly better too.  :)



---
Diffs of the changes:

Index: llvm/lib/Analysis/DataStructure/BottomUpClosure.cpp
diff -u llvm/lib/Analysis/DataStructure/BottomUpClosure.cpp:1.26 llvm/lib/Analysis/DataStructure/BottomUpClosure.cpp:1.27
--- llvm/lib/Analysis/DataStructure/BottomUpClosure.cpp:1.26	Thu Oct 31 17:24:00 2002
+++ llvm/lib/Analysis/DataStructure/BottomUpClosure.cpp	Fri Nov  1 18:13:20 2002
@@ -16,8 +16,7 @@
 static RegisterAnalysis
 X("budatastructure", "Bottom-up Data Structure Analysis Closure");
 
-// TODO: FIXME
-namespace DataStructureAnalysis {
+namespace DataStructureAnalysis { // TODO: FIXME: Eliminate
   // isPointerType - Return true if this first class type is big enough to hold
   // a pointer.
   //
@@ -60,14 +59,12 @@
                              map &ValueMap) {
   // Resolve all of the function arguments...
   Function::aiterator AI = F.abegin();
-  for (unsigned i = 0, e = Call.getNumPtrArgs(); i != e; ++i) {
+  for (unsigned i = 0, e = Call.getNumPtrArgs(); i != e; ++i, ++AI) {
     // Advance the argument iterator to the first pointer argument...
     while (!isPointerType(AI->getType())) ++AI;
     
     // Add the link from the argument scalar to the provided value
-    DSNodeHandle &NN = ValueMap[AI];
-    NN.addEdgeTo(Call.getPtrArg(i));
-    ++AI;
+    ValueMap[AI].mergeWith(Call.getPtrArg(i));
   }
 }
 
@@ -118,8 +115,7 @@
             DEBUG(std::cerr << "\t[BU] Self Inlining: " << F.getName() << "\n");
 
             // Handle the return value if present...
-            if (Call.getRetVal().getNode())
-              Graph->getRetNode().mergeWith(Call.getRetVal());
+            Graph->getRetNode().mergeWith(Call.getRetVal());
 
             // Resolve the arguments in the call to the actual values...
             ResolveArguments(Call, F, Graph->getValueMap());
@@ -143,11 +139,12 @@
             // Record that the original DSCallSite was a call site of FI.
             // This may or may not have been known when the DSCallSite was
             // originally created.
+#if 1  /// FIXME: Reenable
             std::vector &CallSitesForFunc = CallSites[&FI];
             CallSitesForFunc.push_back(Call);
             CallSitesForFunc.back().setResolvingCaller(&F);
             CallSitesForFunc.back().setCallee(0);
-
+#endif
             // Clone the callee's graph into the current graph, keeping
             // track of where scalars in the old graph _used_ to point,
             // and of the new nodes matching nodes of the old graph.
@@ -163,8 +160,8 @@
             // Resolve the arguments in the call to the actual values...
             ResolveArguments(Call, FI, OldValMap);
 
-            if (Call.getRetVal().getNode())// Handle the return value if present
-              RetVal.mergeWith(Call.getRetVal());
+            // Handle the return value if present...
+            RetVal.mergeWith(Call.getRetVal());
 
             // Erase the entry in the Callees vector
             Callees.erase(Callees.begin()+c--);
@@ -172,9 +169,10 @@
           } else if (FI.getName() == "printf" || FI.getName() == "sscanf" ||
                      FI.getName() == "fprintf" || FI.getName() == "open" ||
                      FI.getName() == "sprintf") {
-            // FIXME: These special cases should go away when we can define
-            // functions that take a variable number of arguments.
+            // FIXME: These special cases (eg printf) should go away when we can
+            // define functions that take a variable number of arguments.
 
+            // FIXME: at the very least, this should update mod/ref info
             // Erase the entry in the globals vector
             Callees.erase(Callees.begin()+c--);
           }


Index: llvm/lib/Analysis/DataStructure/DataStructure.cpp
diff -u llvm/lib/Analysis/DataStructure/DataStructure.cpp:1.37 llvm/lib/Analysis/DataStructure/DataStructure.cpp:1.38
--- llvm/lib/Analysis/DataStructure/DataStructure.cpp:1.37	Thu Oct 31 16:41:15 2002
+++ llvm/lib/Analysis/DataStructure/DataStructure.cpp	Fri Nov  1 18:13:20 2002
@@ -16,8 +16,7 @@
 
 using std::vector;
 
-// TODO: FIXME
-namespace DataStructureAnalysis {
+namespace DataStructureAnalysis {   // TODO: FIXME
   // isPointerType - Return true if this first class type is big enough to hold
   // a pointer.
   //
@@ -538,14 +537,15 @@
 
 // cloneInto - Clone the specified DSGraph into the current graph, returning the
 // Return node of the graph.  The translated ValueMap for the old function is
-// filled into the OldValMap member.  If StripLocals is set to true, Scalar and
-// Alloca markers are removed from the graph, as the graph is being cloned into
-// a calling function's graph.
+// filled into the OldValMap member.  If StripAllocas is set to true, Alloca
+// markers are removed from the graph, as the graph is being cloned into a
+// calling function's graph.
 //
 DSNodeHandle DSGraph::cloneInto(const DSGraph &G, 
                                 std::map &OldValMap,
                                 std::map &OldNodeMap,
-                                bool StripScalars, bool StripAllocas) {
+                                bool StripScalars,  // FIXME: Kill StripScalars
+                                bool StripAllocas) {
   assert(OldNodeMap.empty() && "Returned OldNodeMap should be empty!");
 
   unsigned FN = Nodes.size();           // First new node...
@@ -564,8 +564,7 @@
     Nodes[i]->remapLinks(OldNodeMap);
 
   // Remove local markers as specified
-  unsigned char StripBits = (StripScalars ? DSNode::ScalarNode : 0) |
-                            (StripAllocas ? DSNode::AllocaNode : 0);
+  unsigned char StripBits = StripAllocas ? DSNode::AllocaNode : 0;
   if (StripBits)
     for (unsigned i = FN, e = Nodes.size(); i != e; ++i)
       Nodes[i]->NodeType &= ~StripBits;
@@ -574,7 +573,8 @@
   for (std::map::const_iterator I = G.ValueMap.begin(),
          E = G.ValueMap.end(); I != E; ++I) {
     DSNodeHandle &H = OldValMap[I->first];
-    H = DSNodeHandle(OldNodeMap[I->second.getNode()], I->second.getOffset());
+    H.setNode(OldNodeMap[I->second.getNode()]);
+    H.setOffset(I->second.getOffset());
 
     if (isa(I->first)) {  // Is this a global?
       std::map::iterator GVI = ValueMap.find(I->first);
@@ -655,11 +655,8 @@
   // Mark any incoming arguments as incomplete...
   if (markFormalArgs && Func)
     for (Function::aiterator I = Func->abegin(), E = Func->aend(); I != E; ++I)
-      if (isPointerType(I->getType()) && ValueMap.find(I) != ValueMap.end()) {
-        DSNodeHandle &INH = ValueMap[I];
-        if (INH.getNode() && INH.hasLink(0))
-          markIncompleteNode(ValueMap[I].getLink(0)->getNode());
-      }
+      if (isPointerType(I->getType()) && ValueMap.find(I) != ValueMap.end())
+        markIncompleteNode(ValueMap[I].getNode());
 
   // Mark stuff passed into functions calls as being incomplete...
   for (unsigned i = 0, e = FunctionCalls.size(); i != e; ++i) {
@@ -667,17 +664,16 @@
     // Then the return value is certainly incomplete!
     markIncompleteNode(Call.getRetVal().getNode());
 
-    // The call does not make the function argument incomplete...
- 
-    // All arguments to the function call are incomplete though!
+    // All objects pointed to by function arguments are incomplete though!
     for (unsigned i = 0, e = Call.getNumPtrArgs(); i != e; ++i)
       markIncompleteNode(Call.getPtrArg(i).getNode());
   }
 
-  // Mark all of the nodes pointed to by global or cast nodes as incomplete...
+  // Mark all of the nodes pointed to by global nodes as incomplete...
   for (unsigned i = 0, e = Nodes.size(); i != e; ++i)
     if (Nodes[i]->NodeType & DSNode::GlobalNode) {
       DSNode *N = Nodes[i];
+      // FIXME: Make more efficient by looking over Links directly
       for (unsigned i = 0, e = N->getSize(); i != e; ++i)
         if (DSNodeHandle *DSNH = N->getLink(i))
           markIncompleteNode(DSNH->getNode());
@@ -706,9 +702,7 @@
     return true;
 
   // Is it a function node or some other trivially unused global?
-  if (N->NodeType != 0 &&
-      (N->NodeType & ~DSNode::GlobalNode) == 0 && 
-      N->getSize() == 0 &&
+  if ((N->NodeType & ~DSNode::GlobalNode) == 0 && N->getSize() == 0 &&
       N->getReferrers().size() == N->getGlobals().size()) {
 
     // Remove the globals from the ValueMap, so that the referrer count will go
@@ -758,6 +752,7 @@
   if (N == 0) return;
 
   Alive.insert(N);
+  // FIXME: Make more efficient by looking over Links directly
   for (unsigned i = 0, e = N->getSize(); i != e; ++i)
     if (DSNodeHandle *DSNH = N->getLink(i))
       if (!Alive.count(DSNH->getNode()))
@@ -887,7 +882,7 @@
   markGlobalsIteration(GlobalNodes, Calls, Alive, FilterCalls);
 
   // Free up references to dead globals from the ValueMap
-  std::set::iterator I=GlobalNodes.begin(), E=GlobalNodes.end();
+  std::set::iterator I = GlobalNodes.begin(), E = GlobalNodes.end();
   for( ; I != E; ++I)
     if (Alive.count(*I) == 0)
       removeRefsToGlobal(*I, G.getValueMap());
@@ -931,20 +926,21 @@
       markAlive(FunctionCalls[i].getCallee().getNode(), Alive);
     }
 
+  // Mark all nodes reachable by scalar nodes as alive...
+  for (std::map::iterator I = ValueMap.begin(),
+         E = ValueMap.end(); I != E; ++I)
+    markAlive(I->second.getNode(), Alive);
+
 #if 0
-  for (unsigned i = 0, e = OrigFunctionCalls.size(); i != e; ++i)
-    for (unsigned j = 0, e = OrigFunctionCalls[i].size(); j != e; ++j)
-      markAlive(OrigFunctionCalls[i][j].getNode(), Alive);
+  // Marge all nodes reachable by global nodes, as alive.  Isn't this covered by
+  // the ValueMap?
+  //
+  if (KeepAllGlobals)
+    for (unsigned i = 0, e = Nodes.size(); i != e; ++i)
+      if (Nodes[i]->NodeType & DSNode::GlobalNode)
+        markAlive(Nodes[i], Alive);
 #endif
 
-  // Mark all nodes reachable by scalar nodes (and global nodes, if
-  // keeping them was specified) as alive...
-  unsigned char keepBits = DSNode::ScalarNode |
-                           (KeepAllGlobals ? DSNode::GlobalNode : 0);
-  for (unsigned i = 0, e = Nodes.size(); i != e; ++i)
-    if (Nodes[i]->NodeType & keepBits)
-      markAlive(Nodes[i], Alive);
-
   // The return value is alive as well...
   markAlive(RetNode.getNode(), Alive);
 
@@ -952,7 +948,7 @@
   // This also marks all nodes reachable from such nodes as alive.
   // Of course, if KeepAllGlobals is specified, they would be live already.
   if (!KeepAllGlobals)
-    markGlobalsAlive(*this, Alive, ! KeepCalls);
+    markGlobalsAlive(*this, Alive, !KeepCalls);
 
   // Loop over all unreachable nodes, dropping their references...
   vector DeadNodes;


Index: llvm/lib/Analysis/DataStructure/Local.cpp
diff -u llvm/lib/Analysis/DataStructure/Local.cpp:1.23 llvm/lib/Analysis/DataStructure/Local.cpp:1.24
--- llvm/lib/Analysis/DataStructure/Local.cpp:1.23	Thu Oct 31 00:52:26 2002
+++ llvm/lib/Analysis/DataStructure/Local.cpp	Fri Nov  1 18:13:20 2002
@@ -61,7 +61,6 @@
     vector &Nodes;
     DSNodeHandle &RetNode;               // Node that gets returned...
     map &ValueMap;
-    map GlobalScalarValueMap;
     vector &FunctionCalls;
 
   public:
@@ -107,23 +106,21 @@
     /// createNode - Create a new DSNode, ensuring that it is properly added to
     /// the graph.
     ///
-    DSNode *createNode(DSNode::NodeTy NodeType, const Type *Ty);
-
-    /// getValueNode - Return a DSNode that corresponds the the specified LLVM
-    /// value.  This either returns the already existing node, or creates a new
-    /// one and adds it to the graph, if none exists.
-    ///
-    DSNodeHandle &getValueNode(Value &V);
+    DSNode *createNode(DSNode::NodeTy NodeType, const Type *Ty = 0) {
+      DSNode *N = new DSNode(NodeType, Ty);   // Create the node
+      Nodes.push_back(N);                     // Add node to nodes list
+      return N;
+    }
 
-    /// getValueDest - Return the DSNode that the actual value points to.  This
-    /// is the same thing as: getLink(getValueNode(V))
+    /// setDestTo - Set the ValueMap entry for the specified value to point to
+    /// the specified destination.  If the Value already points to a node, make
+    /// sure to merge the two destinations together.
     ///
-    DSNodeHandle &getValueDest(Value &V);
+    void setDestTo(Value &V, const DSNodeHandle &NH);
 
-    /// getGlobalNode - Just like getValueNode, except the global node itself is
-    /// returned, not a scalar node pointing to a global.
+    /// getValueDest - Return the DSNode that the actual value points to. 
     ///
-    DSNodeHandle &getGlobalNode(GlobalValue &V);
+    DSNodeHandle getValueDest(Value &V);
 
     /// getLink - This method is used to return the specified link in the
     /// specified node if one exists.  If a link does not already exist (it's
@@ -148,78 +145,34 @@
 //
 
 
-// createNode - Create a new DSNode, ensuring that it is properly added to the
-// graph.
-//
-DSNode *GraphBuilder::createNode(DSNode::NodeTy NodeType, const Type *Ty) {
-  DSNode *N = new DSNode(NodeType, Ty);
-  Nodes.push_back(N);
-  return N;
-}
+/// getValueDest - Return the DSNode that the actual value points to.
+///
+DSNodeHandle GraphBuilder::getValueDest(Value &V) {
+  if (Constant *C = dyn_cast(&V)) {
+    // FIXME: Return null NH for constants like 10 or null
+    // FIXME: Handle constant exprs here.
 
+    return 0;   // Constant doesn't point to anything.
+  }
 
-// getGlobalNode - Just like getValueNode, except the global node itself is
-// returned, not a scalar node pointing to a global.
-//
-DSNodeHandle &GraphBuilder::getGlobalNode(GlobalValue &V) {
   DSNodeHandle &NH = ValueMap[&V];
-  if (NH.getNode()) return NH;       // Already have a node?  Just return it...
-
-  // Create a new global node for this global variable...
-  DSNode *G = createNode(DSNode::GlobalNode, V.getType()->getElementType());
-  G->addGlobal(&V);
-
-  // If this node has outgoing edges, make sure to recycle the same node for
-  // each use.  For functions and other global variables, this is unneccesary,
-  // so avoid excessive merging by cloning these nodes on demand.
-  //
-  NH.setNode(G);
-  return NH;
-}
-
-
-// getValueNode - Return a DSNode that corresponds the the specified LLVM value.
-// This either returns the already existing node, or creates a new one and adds
-// it to the graph, if none exists.
-//
-DSNodeHandle &GraphBuilder::getValueNode(Value &V) {
-  assert(isPointerType(V.getType()) && "Should only use pointer scalars!");
+  if (NH.getNode())
+    return NH;     // Already have a node?  Just return it...
 
+  // Otherwise we need to create a new node to point to...
+  DSNode *N;
   if (GlobalValue *GV = dyn_cast(&V)) {
-    // The GlobalScalarValueMap keeps track of the scalar nodes that point to
-    // global values...  The ValueMap contains pointers to the global memory
-    // object itself, not the scalar constant that points to the memory.
-    //
-    DSNodeHandle &NH = GlobalScalarValueMap[GV];
-    if (NH.getNode()) return NH;
-
-    // If this is a global value, create the global pointed to.
-    DSNode *N = createNode(DSNode::ScalarNode, V.getType());
-    NH.setOffset(0);
-    NH.setNode(N);
-
-    N->addEdgeTo(0, getGlobalNode(*GV));
-    return NH;
-    
+    // Create a new global node for this global variable...
+    N = createNode(DSNode::GlobalNode, GV->getType()->getElementType());
+    N->addGlobal(GV);
   } else {
-    DSNodeHandle &NH = ValueMap[&V];
-    if (NH.getNode())
-      return NH;     // Already have a node?  Just return it...
-  
-    // Otherwise we need to create a new scalar node...
-    DSNode *N = createNode(DSNode::ScalarNode, V.getType());
-
-    NH.setOffset(0);
-    NH.setNode(N);
-    return NH;
+    // Otherwise just create a shadow node
+    N = createNode(DSNode::ShadowNode);
   }
-}
 
-/// getValueDest - Return the DSNode that the actual value points to.  This is
-/// the same thing as: getLink(getValueNode(V), 0)
-///
-DSNodeHandle &GraphBuilder::getValueDest(Value &V) {
-  return getLink(getValueNode(V));
+  NH.setNode(N);      // Remember that we are pointing to it...
+  NH.setOffset(0);
+  return NH;
 }
 
 
@@ -235,12 +188,25 @@
   if (Link) return *Link;
 
   // If the link hasn't been created yet, make and return a new shadow node
-  DSNode *N = createNode(DSNode::ShadowNode, 0);
+  DSNode *N = createNode(DSNode::ShadowNode);
   Node.setLink(LinkNo, N);
   return *Node.getLink(LinkNo);
 }
 
 
+/// setDestTo - Set the ValueMap entry for the specified value to point to the
+/// specified destination.  If the Value already points to a node, make sure to
+/// merge the two destinations together.
+///
+void GraphBuilder::setDestTo(Value &V, const DSNodeHandle &NH) {
+  DSNodeHandle &AINH = ValueMap[&V];
+  if (AINH.getNode() == 0)   // Not pointing to anything yet?
+    AINH = NH;               // Just point directly to NH
+  else
+    AINH.mergeWith(NH);
+}
+
+
 //===----------------------------------------------------------------------===//
 // Specific instruction type handler implementations...
 //
@@ -249,10 +215,7 @@
 /// object, pointing the scalar to it.
 ///
 void GraphBuilder::handleAlloc(AllocationInst &AI, DSNode::NodeTy NodeType) {
-  DSNode *New = createNode(NodeType, 0);
-
-  // Make the scalar point to the new node...
-  getValueNode(AI).addEdgeTo(New);
+  setDestTo(AI, createNode(NodeType));
 }
 
 // PHINode - Make the scalar for the PHI node point to all of the things the
@@ -261,14 +224,14 @@
 void GraphBuilder::visitPHINode(PHINode &PN) {
   if (!isPointerType(PN.getType())) return; // Only pointer PHIs
 
-  DSNodeHandle &ScalarDest = getValueDest(PN);
+  DSNodeHandle &PNDest = ValueMap[&PN];
   for (unsigned i = 0, e = PN.getNumIncomingValues(); i != e; ++i)
-    if (!isa(PN.getIncomingValue(i)))
-      ScalarDest.mergeWith(getValueDest(*PN.getIncomingValue(i)));
+    PNDest.mergeWith(getValueDest(*PN.getIncomingValue(i)));
 }
 
 void GraphBuilder::visitGetElementPtrInst(GetElementPtrInst &GEP) {
   DSNodeHandle Value = getValueDest(*GEP.getOperand(0));
+  if (Value.getNode() == 0) return;
 
   unsigned Offset = 0;
   const PointerType *PTy = cast(GEP.getOperand(0)->getType());
@@ -278,7 +241,7 @@
 
   // If the node had to be folded... exit quickly
   if (TopTypeRec.Ty == Type::VoidTy) {
-    getValueNode(GEP).addEdgeTo(Value);  // GEP result points to folded node
+    setDestTo(GEP, Value);  // GEP result points to folded node
     return;
   }
 
@@ -297,7 +260,7 @@
       if (Value.getOffset()) {
         // Value is now the pointer we want to GEP to be...
         Value.getNode()->foldNodeCompletely();
-        getValueNode(GEP).addEdgeTo(Value);  // GEP result points to folded node
+        setDestTo(GEP, Value);  // GEP result points to folded node
         return;
       } else {
         // This is a pointer to the first byte of the node.  Make sure that we
@@ -346,56 +309,51 @@
   Value.setOffset(Value.getOffset()+Offset);
 
   // Value is now the pointer we want to GEP to be...
-  getValueNode(GEP).addEdgeTo(Value);
+  setDestTo(GEP, Value);
 }
 
 void GraphBuilder::visitLoadInst(LoadInst &LI) {
-  DSNodeHandle &Ptr = getValueDest(*LI.getOperand(0));
+  DSNodeHandle Ptr = getValueDest(*LI.getOperand(0));
+  if (Ptr.getNode() == 0) return;
+
+  // Make that the node is read from...
   Ptr.getNode()->NodeType |= DSNode::Read;
 
   // Ensure a typerecord exists...
   Ptr.getNode()->getTypeRec(LI.getType(), Ptr.getOffset());
-  
+
   if (isPointerType(LI.getType()))
-    getValueNode(LI).addEdgeTo(getLink(Ptr));
+    setDestTo(LI, getLink(Ptr));
 }
 
 void GraphBuilder::visitStoreInst(StoreInst &SI) {
-  DSNodeHandle &Dest = getValueDest(*SI.getOperand(1));
-  Dest.getNode()->NodeType |= DSNode::Modified;
   const Type *StoredTy = SI.getOperand(0)->getType();
+  DSNodeHandle Dest = getValueDest(*SI.getOperand(1));
+  if (Dest.getNode() == 0) return;
+
+  // Make that the node is written to...
+  Dest.getNode()->NodeType |= DSNode::Modified;
 
   // Ensure a typerecord exists...
   Dest.getNode()->getTypeRec(StoredTy, Dest.getOffset());
 
   // Avoid adding edges from null, or processing non-"pointer" stores
-  if (isPointerType(StoredTy) &&
-      !isa(SI.getOperand(0))) {
+  if (isPointerType(StoredTy))
     Dest.addEdgeTo(getValueDest(*SI.getOperand(0)));
-  }
 }
 
 void GraphBuilder::visitReturnInst(ReturnInst &RI) {
-  if (RI.getNumOperands() && isPointerType(RI.getOperand(0)->getType()) &&
-      !isa(RI.getOperand(0))) {
-    DSNodeHandle &Value = getValueDest(*RI.getOperand(0));
-    Value.mergeWith(RetNode);
-    RetNode = Value;
-  }
+  if (RI.getNumOperands() && isPointerType(RI.getOperand(0)->getType()))
+    RetNode.mergeWith(getValueDest(*RI.getOperand(0)));
 }
 
 void GraphBuilder::visitCallInst(CallInst &CI) {
   // Set up the return value...
   DSNodeHandle RetVal;
   if (isPointerType(CI.getType()))
-    RetVal = getLink(getValueNode(CI));
+    RetVal = getValueDest(CI);
 
-  DSNodeHandle Callee;
-  // Special case for a direct call, avoid creating spurious scalar node...
-  if (GlobalValue *GV = dyn_cast(CI.getOperand(0)))
-    Callee = getGlobalNode(*GV);
-  else
-    Callee = getLink(getValueNode(*CI.getOperand(0)));
+  DSNodeHandle Callee = getValueDest(*CI.getOperand(0));
 
   std::vector Args;
   Args.reserve(CI.getNumOperands()-1);
@@ -403,7 +361,7 @@
   // Calculate the arguments vector...
   for (unsigned i = 1, e = CI.getNumOperands(); i != e; ++i)
     if (isPointerType(CI.getOperand(i)->getType()))
-      Args.push_back(getLink(getValueNode(*CI.getOperand(i))));
+      Args.push_back(getValueDest(*CI.getOperand(i)));
 
   // Add a new function call entry...
   FunctionCalls.push_back(DSCallSite(CI, RetVal, Callee, Args));
@@ -411,8 +369,12 @@
 
 /// Handle casts...
 void GraphBuilder::visitCastInst(CastInst &CI) {
-  if (isPointerType(CI.getType()) && isPointerType(CI.getOperand(0)->getType()))
-    getValueNode(CI).addEdgeTo(getLink(getValueNode(*CI.getOperand(0))));
+  if (isPointerType(CI.getType())) {
+    if (isPointerType(CI.getOperand(0)->getType()))
+      setDestTo(CI, getValueDest(*CI.getOperand(0)));
+    else
+      ; // FIXME: "Other" node
+  }
 }
 
 


Index: llvm/lib/Analysis/DataStructure/Printer.cpp
diff -u llvm/lib/Analysis/DataStructure/Printer.cpp:1.27 llvm/lib/Analysis/DataStructure/Printer.cpp:1.28
--- llvm/lib/Analysis/DataStructure/Printer.cpp:1.27	Mon Oct 21 08:47:57 2002
+++ llvm/lib/Analysis/DataStructure/Printer.cpp	Fri Nov  1 18:13:20 2002
@@ -36,7 +36,6 @@
     OS << "\n";
   }
 
-  if (N->NodeType & DSNode::ScalarNode) OS << "S";
   if (N->NodeType & DSNode::AllocaNode) OS << "A";
   if (N->NodeType & DSNode::NewNode   ) OS << "N";
   if (N->NodeType & DSNode::GlobalNode) OS << "G";
@@ -49,15 +48,6 @@
     OS << "\n";
   }
 
-  if ((N->NodeType & DSNode::ScalarNode) && G) {
-    const std::map &VM = G->getValueMap();
-    for (std::map::const_iterator I = VM.begin(),
-           E = VM.end(); I != E; ++I)
-      if (I->second.getNode() == N) {
-        WriteAsOperand(OS, I->first, false, true, M);
-        OS << "\n";
-      }
-  }
   return OS.str();
 }
 
@@ -94,6 +84,23 @@
   ///
   static void addCustomGraphFeatures(const DSGraph *G,
                                      GraphWriter &GW) {
+    // Add scalar nodes to the graph...
+    const std::map &VM = G->getValueMap();
+    for (std::map::const_iterator I = VM.begin();
+         I != VM.end(); ++I)
+      if (!isa(I->first)) {
+        std::stringstream OS;
+        WriteAsOperand(OS, I->first, false, true, G->getFunction().getParent());
+        GW.emitSimpleNode(I->first, "plaintext=circle", OS.str());
+        
+        // Add edge from return node to real destination
+        int EdgeDest = I->second.getOffset();
+        if (EdgeDest == 0) EdgeDest = -1;
+        GW.emitEdge(I->first, -1, I->second.getNode(),
+                    EdgeDest, "arrowtail=tee,color=gray63");
+      }
+
+
     // Output the returned value pointer...
     if (G->getRetNode().getNode() != 0) {
       // Output the return node...




From lattner at cs.uiuc.edu  Fri Nov  1 18:27:01 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri Nov  1 18:27:01 2002
Subject: [llvm-commits] CVS: llvm/lib/Analysis/DataStructure/BottomUpClosure.cpp
Message-ID: <200211020026.SAA24808@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Analysis/DataStructure:

BottomUpClosure.cpp updated: 1.27 -> 1.28

---
Log message:

Oops, this was not meant to be checked in


---
Diffs of the changes:

Index: llvm/lib/Analysis/DataStructure/BottomUpClosure.cpp
diff -u llvm/lib/Analysis/DataStructure/BottomUpClosure.cpp:1.27 llvm/lib/Analysis/DataStructure/BottomUpClosure.cpp:1.28
--- llvm/lib/Analysis/DataStructure/BottomUpClosure.cpp:1.27	Fri Nov  1 18:13:20 2002
+++ llvm/lib/Analysis/DataStructure/BottomUpClosure.cpp	Fri Nov  1 18:26:32 2002
@@ -139,12 +139,11 @@
             // Record that the original DSCallSite was a call site of FI.
             // This may or may not have been known when the DSCallSite was
             // originally created.
-#if 1  /// FIXME: Reenable
             std::vector &CallSitesForFunc = CallSites[&FI];
             CallSitesForFunc.push_back(Call);
             CallSitesForFunc.back().setResolvingCaller(&F);
             CallSitesForFunc.back().setCallee(0);
-#endif
+
             // Clone the callee's graph into the current graph, keeping
             // track of where scalars in the old graph _used_ to point,
             // and of the new nodes matching nodes of the old graph.




From lattner at cs.uiuc.edu  Fri Nov  1 18:37:01 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri Nov  1 18:37:01 2002
Subject: [llvm-commits] CVS: llvm/lib/Analysis/DataStructure/Local.cpp Printer.cpp
Message-ID: <200211020036.SAA24931@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Analysis/DataStructure:

Local.cpp updated: 1.24 -> 1.25
Printer.cpp updated: 1.28 -> 1.29

---
Log message:

Implement the "unknown flag" which mainly consists of aligning printing code


---
Diffs of the changes:

Index: llvm/lib/Analysis/DataStructure/Local.cpp
diff -u llvm/lib/Analysis/DataStructure/Local.cpp:1.24 llvm/lib/Analysis/DataStructure/Local.cpp:1.25
--- llvm/lib/Analysis/DataStructure/Local.cpp:1.24	Fri Nov  1 18:13:20 2002
+++ llvm/lib/Analysis/DataStructure/Local.cpp	Fri Nov  1 18:36:02 2002
@@ -369,12 +369,17 @@
 
 /// Handle casts...
 void GraphBuilder::visitCastInst(CastInst &CI) {
-  if (isPointerType(CI.getType())) {
-    if (isPointerType(CI.getOperand(0)->getType()))
+  if (isPointerType(CI.getType()))
+    if (isPointerType(CI.getOperand(0)->getType())) {
+      // Cast one pointer to the other, just act like a copy instruction
       setDestTo(CI, getValueDest(*CI.getOperand(0)));
-    else
-      ; // FIXME: "Other" node
-  }
+    } else {
+      // Cast something (floating point, small integer) to a pointer.  We need
+      // to track the fact that the node points to SOMETHING, just something we
+      // don't know about.  Make an "Unknown" node.
+      //
+      setDestTo(CI, createNode(DSNode::UnknownNode));
+    }
 }
 
 


Index: llvm/lib/Analysis/DataStructure/Printer.cpp
diff -u llvm/lib/Analysis/DataStructure/Printer.cpp:1.28 llvm/lib/Analysis/DataStructure/Printer.cpp:1.29
--- llvm/lib/Analysis/DataStructure/Printer.cpp:1.28	Fri Nov  1 18:13:20 2002
+++ llvm/lib/Analysis/DataStructure/Printer.cpp	Fri Nov  1 18:36:02 2002
@@ -36,12 +36,13 @@
     OS << "\n";
   }
 
-  if (N->NodeType & DSNode::AllocaNode) OS << "A";
-  if (N->NodeType & DSNode::NewNode   ) OS << "N";
-  if (N->NodeType & DSNode::GlobalNode) OS << "G";
-  if (N->NodeType & DSNode::Incomplete) OS << "I";
-  if (N->NodeType & DSNode::Modified  ) OS << "M";
-  if (N->NodeType & DSNode::Read      ) OS << "R";
+  if (N->NodeType & DSNode::AllocaNode ) OS << "A";
+  if (N->NodeType & DSNode::NewNode    ) OS << "N";
+  if (N->NodeType & DSNode::GlobalNode ) OS << "G";
+  if (N->NodeType & DSNode::UnknownNode) OS << "U";
+  if (N->NodeType & DSNode::Incomplete ) OS << "I";
+  if (N->NodeType & DSNode::Modified   ) OS << "M";
+  if (N->NodeType & DSNode::Read       ) OS << "R";
 
   for (unsigned i = 0, e = N->getGlobals().size(); i != e; ++i) {
     WriteAsOperand(OS, N->getGlobals()[i], false, true, M);




From lattner at cs.uiuc.edu  Fri Nov  1 18:37:07 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri Nov  1 18:37:07 2002
Subject: [llvm-commits] CVS: llvm/include/llvm/Analysis/DSNode.h
Message-ID: <200211020036.SAA24938@apoc.cs.uiuc.edu>


Changes in directory llvm/include/llvm/Analysis:

DSNode.h updated: 1.3 -> 1.4

---
Log message:

Implement the "unknown flag" which mainly consists of aligning printing code



---
Diffs of the changes:

Index: llvm/include/llvm/Analysis/DSNode.h
diff -u llvm/include/llvm/Analysis/DSNode.h:1.3 llvm/include/llvm/Analysis/DSNode.h:1.4
--- llvm/include/llvm/Analysis/DSNode.h:1.3	Fri Nov  1 18:11:12 2002
+++ llvm/include/llvm/Analysis/DSNode.h	Fri Nov  1 18:36:03 2002
@@ -61,13 +61,14 @@
   void operator=(const DSNode &); // DO NOT IMPLEMENT
 public:
   enum NodeTy {
-    ShadowNode = 0,        // Nothing is known about this node...
-    AllocaNode = 1 << 0,   // This node was allocated with alloca
-    NewNode    = 1 << 1,   // This node was allocated with malloc
-    GlobalNode = 1 << 2,   // This node was allocated by a global var decl
-    Incomplete = 1 << 3,   // This node may not be complete
-    Modified   = 1 << 4,   // This node is modified in this context
-    Read       = 1 << 5,   // This node is read in this context
+    ShadowNode  = 0,        // Nothing is known about this node...
+    AllocaNode  = 1 << 0,   // This node was allocated with alloca
+    NewNode     = 1 << 1,   // This node was allocated with malloc
+    GlobalNode  = 1 << 2,   // This node was allocated by a global var decl
+    UnknownNode = 1 << 3,   // This node points to unknown allocated memory 
+    Incomplete  = 1 << 4,   // This node may not be complete
+    Modified    = 1 << 5,   // This node is modified in this context
+    Read        = 1 << 6,   // This node is read in this context
   };
   
   /// NodeType - A union of the above bits.  "Shadow" nodes do not add any flags




From lattner at cs.uiuc.edu  Fri Nov  1 18:45:01 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri Nov  1 18:45:01 2002
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/InstSelectSimple.cpp
Message-ID: <200211020044.SAA25102@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Target/X86:

InstSelectSimple.cpp updated: 1.11 -> 1.12

---
Log message:

* Remove dead variable
* Shift amount is always guaranteed to be 8 bits


---
Diffs of the changes:

Index: llvm/lib/Target/X86/InstSelectSimple.cpp
diff -u llvm/lib/Target/X86/InstSelectSimple.cpp:1.11 llvm/lib/Target/X86/InstSelectSimple.cpp:1.12
--- llvm/lib/Target/X86/InstSelectSimple.cpp:1.11	Thu Oct 31 17:03:59 2002
+++ llvm/lib/Target/X86/InstSelectSimple.cpp	Fri Nov  1 18:44:25 2002
@@ -153,14 +153,16 @@
 {
   unsigned Op0r = getReg (I.getOperand (0));
   unsigned DestReg = getReg (I);
-  unsigned operandSize = I.getOperand (0)->getType ()->getPrimitiveSize ();
+  unsigned operandSize = I.getType ()->getPrimitiveSize ();
   bool isRightShift = (I.getOpcode () == Instruction::Shr);
   bool isOperandUnsigned = I.getType ()->isUnsigned ();
-  bool isConstantShiftAmount = (isa  (I.getOperand (1)));
+
   if (ConstantUInt *CUI = dyn_cast  (I.getOperand (1)))
     {
-      // The shift amount is constant. Get its value.
-      uint64_t shAmt = CUI->getValue ();
+      // The shift amount is constant, guaranteed to be a ubyte. Get its value.
+      assert(CUI->getType() == Type::UByteTy && "Shift amount not a ubyte?");
+      unsigned char shAmt = CUI->getValue();
+
       // Emit:  reg, shamt  (shift-by-immediate opcode "ir" form.)
       if (isRightShift)
 	{




From lattner at cs.uiuc.edu  Fri Nov  1 18:51:01 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri Nov  1 18:51:01 2002
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/InstSelectSimple.cpp
Message-ID: <200211020050.SAA25163@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Target/X86:

InstSelectSimple.cpp updated: 1.12 -> 1.13

---
Log message:

Make switch statements denser, but only because of the follow-on patch


---
Diffs of the changes:

Index: llvm/lib/Target/X86/InstSelectSimple.cpp
diff -u llvm/lib/Target/X86/InstSelectSimple.cpp:1.12 llvm/lib/Target/X86/InstSelectSimple.cpp:1.13
--- llvm/lib/Target/X86/InstSelectSimple.cpp:1.12	Fri Nov  1 18:44:25 2002
+++ llvm/lib/Target/X86/InstSelectSimple.cpp	Fri Nov  1 18:49:56 2002
@@ -143,6 +143,20 @@
   BuildMI(BB, X86::RET, 0);
 }
 
+/// SimpleLog2 - Compute and return Log2 of the input, valid only for inputs 1,
+/// 2, 4, & 8.  Used to convert operand size into dense classes.
+///
+static inline unsigned SimpleLog2(unsigned N) {
+  switch (N) {
+  case 1: return 0;
+  case 2: return 1;
+  case 4: return 2;
+  case 8: return 3;
+  default: assert(0 && "Invalid operand to SimpleLog2!");
+  }
+  return 0;  // not reached
+}
+
 /// Shift instructions: 'shl', 'sar', 'shr' - Some special cases here
 /// for constant immediate shift values, and for constant immediate
 /// shift values equal to 1. Even the general case is sort of special,
@@ -153,9 +167,9 @@
 {
   unsigned Op0r = getReg (I.getOperand (0));
   unsigned DestReg = getReg (I);
-  unsigned operandSize = I.getType ()->getPrimitiveSize ();
   bool isRightShift = (I.getOpcode () == Instruction::Shr);
   bool isOperandUnsigned = I.getType ()->isUnsigned ();
+  unsigned OperandClass = SimpleLog2(I.getType()->getPrimitiveSize());
 
   if (ConstantUInt *CUI = dyn_cast  (I.getOperand (1)))
     {
@@ -169,21 +183,21 @@
 	  if (isOperandUnsigned)
 	    {
 	      // This is a shift right logical (SHR).
-	      switch (operandSize)
+	      switch (OperandClass)
 		{
-		case 1:
+		case 0:
 		  BuildMI (BB, X86::SHRir8, 2,
 			   DestReg).addReg (Op0r).addZImm (shAmt);
 		  break;
-		case 2:
+		case 1:
 		  BuildMI (BB, X86::SHRir16, 2,
 			   DestReg).addReg (Op0r).addZImm (shAmt);
 		  break;
-		case 4:
+		case 2:
 		  BuildMI (BB, X86::SHRir32, 2,
 			   DestReg).addReg (Op0r).addZImm (shAmt);
 		  break;
-		case 8:
+		case 3:
 		default:
 		  visitInstruction (I);
 		  break;
@@ -192,21 +206,21 @@
 	  else
 	    {
 	      // This is a shift right arithmetic (SAR).
-	      switch (operandSize)
+	      switch (OperandClass)
 		{
-		case 1:
+		case 0:
 		  BuildMI (BB, X86::SARir8, 2,
 			   DestReg).addReg (Op0r).addZImm (shAmt);
 		  break;
-		case 2:
+		case 1:
 		  BuildMI (BB, X86::SARir16, 2,
 			   DestReg).addReg (Op0r).addZImm (shAmt);
 		  break;
-		case 4:
+		case 2:
 		  BuildMI (BB, X86::SARir32, 2,
 			   DestReg).addReg (Op0r).addZImm (shAmt);
 		  break;
-		case 8:
+		case 3:
 		default:
 		  visitInstruction (I);
 		  break;
@@ -216,21 +230,21 @@
       else
 	{
 	  // This is a left shift (SHL).
-	  switch (operandSize)
+	  switch (OperandClass)
 	    {
-	    case 1:
+	    case 0:
 	      BuildMI (BB, X86::SHLir8, 2,
 		       DestReg).addReg (Op0r).addZImm (shAmt);
 	      break;
-	    case 2:
+	    case 1:
 	      BuildMI (BB, X86::SHLir16, 2,
 		       DestReg).addReg (Op0r).addZImm (shAmt);
 	      break;
-	    case 4:
+	    case 2:
 	      BuildMI (BB, X86::SHLir32, 2,
 		       DestReg).addReg (Op0r).addZImm (shAmt);
 	      break;
-	    case 8:
+	    case 3:
 	    default:
 	      visitInstruction (I);
 	      break;
@@ -252,24 +266,24 @@
       // Emit:  reg, cl       (shift-by-CL opcode; "rr" form.)
       if (isRightShift)
 	{
-	  if (isOperandUnsigned)
+	  if (OperandClass)
 	    {
 	      // This is a shift right logical (SHR).
-	      switch (operandSize)
+	      switch (OperandClass)
 		{
-		case 1:
+		case 0:
 		  BuildMI (BB, X86::SHRrr8, 2,
 			   DestReg).addReg (Op0r).addReg (X86::CL);
 		  break;
-		case 2:
+		case 1:
 		  BuildMI (BB, X86::SHRrr16, 2,
 			   DestReg).addReg (Op0r).addReg (X86::CL);
 		  break;
-		case 4:
+		case 2:
 		  BuildMI (BB, X86::SHRrr32, 2,
 			   DestReg).addReg (Op0r).addReg (X86::CL);
 		  break;
-		case 8:
+		case 3:
 		default:
 		  visitInstruction (I);
 		  break;
@@ -278,21 +292,21 @@
 	  else
 	    {
 	      // This is a shift right arithmetic (SAR).
-	      switch (operandSize)
+	      switch (OperandClass)
 		{
-		case 1:
+		case 0:
 		  BuildMI (BB, X86::SARrr8, 2,
 			   DestReg).addReg (Op0r).addReg (X86::CL);
 		  break;
-		case 2:
+		case 1:
 		  BuildMI (BB, X86::SARrr16, 2,
 			   DestReg).addReg (Op0r).addReg (X86::CL);
 		  break;
-		case 4:
+		case 2:
 		  BuildMI (BB, X86::SARrr32, 2,
 			   DestReg).addReg (Op0r).addReg (X86::CL);
 		  break;
-		case 8:
+		case 3:
 		default:
 		  visitInstruction (I);
 		  break;
@@ -302,21 +316,21 @@
       else
 	{
 	  // This is a left shift (SHL).
-	  switch (operandSize)
+	  switch (OperandClass)
 	    {
-	    case 1:
+	    case 0:
 	      BuildMI (BB, X86::SHLrr8, 2,
 		       DestReg).addReg (Op0r).addReg (X86::CL);
 	      break;
-	    case 2:
+	    case 1:
 	      BuildMI (BB, X86::SHLrr16, 2,
 		       DestReg).addReg (Op0r).addReg (X86::CL);
 	      break;
-	    case 4:
+	    case 2:
 	      BuildMI (BB, X86::SHLrr32, 2,
 		       DestReg).addReg (Op0r).addReg (X86::CL);
 	      break;
-	    case 8:
+	    case 3:
 	    default:
 	      visitInstruction (I);
 	      break;




From lattner at cs.uiuc.edu  Fri Nov  1 19:16:02 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri Nov  1 19:16:02 2002
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/InstSelectSimple.cpp
Message-ID: <200211020115.TAA05176@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Target/X86:

InstSelectSimple.cpp updated: 1.13 -> 1.14

---
Log message:

Use a more table driven approach to handling types.  Seems to simplify the
code a bit


---
Diffs of the changes:

Index: llvm/lib/Target/X86/InstSelectSimple.cpp
diff -u llvm/lib/Target/X86/InstSelectSimple.cpp:1.13 llvm/lib/Target/X86/InstSelectSimple.cpp:1.14
--- llvm/lib/Target/X86/InstSelectSimple.cpp:1.13	Fri Nov  1 18:49:56 2002
+++ llvm/lib/Target/X86/InstSelectSimple.cpp	Fri Nov  1 19:15:18 2002
@@ -90,6 +90,28 @@
   };
 }
 
+/// getClass - Turn a primitive type into a "class" number which is based on the
+/// size of the type, and whether or not it is floating point.
+///
+static inline unsigned getClass(const Type *Ty) {
+  switch (Ty->getPrimitiveID()) {
+  case Type::SByteTyID:
+  case Type::UByteTyID:   return 0;          // Byte operands are class #0
+  case Type::ShortTyID:
+  case Type::UShortTyID:  return 1;          // Short operands are class #1
+  case Type::IntTyID:
+  case Type::UIntTyID:
+  case Type::PointerTyID: return 2;          // Int's and pointers are class #2
+
+  case Type::LongTyID:
+  case Type::ULongTyID:   return 3;          // Longs are class #3
+  case Type::FloatTyID:   return 4;          // Float is class #4
+  case Type::DoubleTyID:  return 5;          // Doubles are class #5
+  default:
+    assert(0 && "Invalid type to getClass!");
+    return 0;  // not reached
+  }
+}
 
 /// copyConstantToRegister - Output the instructions required to put the
 /// specified constant into the specified register.
@@ -97,26 +119,23 @@
 void ISel::copyConstantToRegister(Constant *C, unsigned R) {
   assert (!isa(C) && "Constant expressions not yet handled!\n");
 
-  switch (C->getType()->getPrimitiveID()) {
-  case Type::SByteTyID:
-    BuildMI(BB, X86::MOVir8, 1, R).addSImm(cast(C)->getValue());
-    break;
-  case Type::UByteTyID:
-    BuildMI(BB, X86::MOVir8, 1, R).addZImm(cast(C)->getValue());
-    break;
-  case Type::ShortTyID:
-    BuildMI(BB, X86::MOVir16, 1, R).addSImm(cast(C)->getValue());
-    break;
-  case Type::UShortTyID:
-    BuildMI(BB, X86::MOVir16, 1, R).addZImm(cast(C)->getValue());
-    break;
-  case Type::IntTyID:
-    BuildMI(BB, X86::MOVir32, 1, R).addSImm(cast(C)->getValue());
-    break;
-  case Type::UIntTyID:
-    BuildMI(BB, X86::MOVir32, 1, R).addZImm(cast(C)->getValue());
-    break;
-  default: assert(0 && "Type not handled yet!");      
+  if (C->getType()->isIntegral()) {
+    unsigned Class = getClass(C->getType());
+    assert(Class != 3 && "Type not handled yet!");
+
+    static const unsigned IntegralOpcodeTab[] = {
+      X86::MOVir8, X86::MOVir16, X86::MOVir32
+    };
+
+    if (C->getType()->isSigned()) {
+      ConstantSInt *CSI = cast(C);
+      BuildMI(BB, IntegralOpcodeTab[Class], 1, R).addSImm(CSI->getValue());
+    } else {
+      ConstantUInt *CUI = cast(C);
+      BuildMI(BB, IntegralOpcodeTab[Class], 1, R).addZImm(CUI->getValue());
+    }
+  } else {
+    assert(0 && "Type not handled yet!");
   }
 }
 
@@ -143,20 +162,6 @@
   BuildMI(BB, X86::RET, 0);
 }
 
-/// SimpleLog2 - Compute and return Log2 of the input, valid only for inputs 1,
-/// 2, 4, & 8.  Used to convert operand size into dense classes.
-///
-static inline unsigned SimpleLog2(unsigned N) {
-  switch (N) {
-  case 1: return 0;
-  case 2: return 1;
-  case 4: return 2;
-  case 8: return 3;
-  default: assert(0 && "Invalid operand to SimpleLog2!");
-  }
-  return 0;  // not reached
-}
-
 /// Shift instructions: 'shl', 'sar', 'shr' - Some special cases here
 /// for constant immediate shift values, and for constant immediate
 /// shift values equal to 1. Even the general case is sort of special,
@@ -169,7 +174,10 @@
   unsigned DestReg = getReg (I);
   bool isRightShift = (I.getOpcode () == Instruction::Shr);
   bool isOperandUnsigned = I.getType ()->isUnsigned ();
-  unsigned OperandClass = SimpleLog2(I.getType()->getPrimitiveSize());
+  unsigned OperandClass = getClass(I.getType());
+
+  if (OperandClass > 2)
+    visitInstruction(I); // Can't handle longs yet!
 
   if (ConstantUInt *CUI = dyn_cast  (I.getOperand (1)))
     {
@@ -177,79 +185,34 @@
       assert(CUI->getType() == Type::UByteTy && "Shift amount not a ubyte?");
       unsigned char shAmt = CUI->getValue();
 
+      // This is a shift right (SHR).
+      static const unsigned SHRUnsignedConstantOperand[] = {
+        X86::SHRir8, X86::SHRir16, X86::SHRir32
+      };
+
+      // This is a shift right arithmetic (SAR).
+      static const unsigned SHRSignedConstantOperand[] = {
+        X86::SARir8, X86::SARir16, X86::SARir32
+      };
+
+      // This is a shift left (SHL).
+      static const unsigned SHLConstantOperand[] = {
+        X86::SHLir8, X86::SHLir16, X86::SHLir32
+      };
+
+      const unsigned *OpTab = 0;  // Figure out the operand table to use
+      if (isRightShift) {
+        if (isOperandUnsigned)
+          OpTab = SHRUnsignedConstantOperand;
+        else
+          OpTab = SHRSignedConstantOperand;
+      } else {
+        // This is a left shift (SHL).
+        OpTab = SHLConstantOperand;
+      }
+
       // Emit:  reg, shamt  (shift-by-immediate opcode "ir" form.)
-      if (isRightShift)
-	{
-	  if (isOperandUnsigned)
-	    {
-	      // This is a shift right logical (SHR).
-	      switch (OperandClass)
-		{
-		case 0:
-		  BuildMI (BB, X86::SHRir8, 2,
-			   DestReg).addReg (Op0r).addZImm (shAmt);
-		  break;
-		case 1:
-		  BuildMI (BB, X86::SHRir16, 2,
-			   DestReg).addReg (Op0r).addZImm (shAmt);
-		  break;
-		case 2:
-		  BuildMI (BB, X86::SHRir32, 2,
-			   DestReg).addReg (Op0r).addZImm (shAmt);
-		  break;
-		case 3:
-		default:
-		  visitInstruction (I);
-		  break;
-		}
-	    }
-	  else
-	    {
-	      // This is a shift right arithmetic (SAR).
-	      switch (OperandClass)
-		{
-		case 0:
-		  BuildMI (BB, X86::SARir8, 2,
-			   DestReg).addReg (Op0r).addZImm (shAmt);
-		  break;
-		case 1:
-		  BuildMI (BB, X86::SARir16, 2,
-			   DestReg).addReg (Op0r).addZImm (shAmt);
-		  break;
-		case 2:
-		  BuildMI (BB, X86::SARir32, 2,
-			   DestReg).addReg (Op0r).addZImm (shAmt);
-		  break;
-		case 3:
-		default:
-		  visitInstruction (I);
-		  break;
-		}
-	    }
-	}
-      else
-	{
-	  // This is a left shift (SHL).
-	  switch (OperandClass)
-	    {
-	    case 0:
-	      BuildMI (BB, X86::SHLir8, 2,
-		       DestReg).addReg (Op0r).addZImm (shAmt);
-	      break;
-	    case 1:
-	      BuildMI (BB, X86::SHLir16, 2,
-		       DestReg).addReg (Op0r).addZImm (shAmt);
-	      break;
-	    case 2:
-	      BuildMI (BB, X86::SHLir32, 2,
-		       DestReg).addReg (Op0r).addZImm (shAmt);
-	      break;
-	    case 3:
-	    default:
-	      visitInstruction (I);
-	      break;
-	    }
-	}
+      BuildMI(BB, OpTab[OperandClass], 2, DestReg).addReg(Op0r).addZImm(shAmt);
     }
   else
     {
@@ -263,79 +226,37 @@
       unsigned Op1r = getReg (I.getOperand (1));
       // Emit: move cl, shiftAmount (put the shift amount in CL.)
       BuildMI (BB, X86::MOVrr8, 2, X86::CL).addReg (Op1r);
+
+      // This is a shift right (SHR).
+      static const unsigned SHRUnsignedOperand[] = {
+        X86::SHRrr8, X86::SHRrr16, X86::SHRrr32
+      };
+
+      // This is a shift right arithmetic (SAR).
+      static const unsigned SHRSignedOperand[] = {
+        X86::SARrr8, X86::SARrr16, X86::SARrr32
+      };
+
+      // This is a shift left (SHL).
+      static const unsigned SHLOperand[] = {
+        X86::SHLrr8, X86::SHLrr16, X86::SHLrr32
+      };
+
       // Emit:  reg, cl       (shift-by-CL opcode; "rr" form.)
-      if (isRightShift)
-	{
-	  if (OperandClass)
-	    {
-	      // This is a shift right logical (SHR).
-	      switch (OperandClass)
-		{
-		case 0:
-		  BuildMI (BB, X86::SHRrr8, 2,
-			   DestReg).addReg (Op0r).addReg (X86::CL);
-		  break;
-		case 1:
-		  BuildMI (BB, X86::SHRrr16, 2,
-			   DestReg).addReg (Op0r).addReg (X86::CL);
-		  break;
-		case 2:
-		  BuildMI (BB, X86::SHRrr32, 2,
-			   DestReg).addReg (Op0r).addReg (X86::CL);
-		  break;
-		case 3:
-		default:
-		  visitInstruction (I);
-		  break;
-		}
-	    }
-	  else
-	    {
-	      // This is a shift right arithmetic (SAR).
-	      switch (OperandClass)
-		{
-		case 0:
-		  BuildMI (BB, X86::SARrr8, 2,
-			   DestReg).addReg (Op0r).addReg (X86::CL);
-		  break;
-		case 1:
-		  BuildMI (BB, X86::SARrr16, 2,
-			   DestReg).addReg (Op0r).addReg (X86::CL);
-		  break;
-		case 2:
-		  BuildMI (BB, X86::SARrr32, 2,
-			   DestReg).addReg (Op0r).addReg (X86::CL);
-		  break;
-		case 3:
-		default:
-		  visitInstruction (I);
-		  break;
-		}
-	    }
-	}
-      else
-	{
-	  // This is a left shift (SHL).
-	  switch (OperandClass)
-	    {
-	    case 0:
-	      BuildMI (BB, X86::SHLrr8, 2,
-		       DestReg).addReg (Op0r).addReg (X86::CL);
-	      break;
-	    case 1:
-	      BuildMI (BB, X86::SHLrr16, 2,
-		       DestReg).addReg (Op0r).addReg (X86::CL);
-	      break;
-	    case 2:
-	      BuildMI (BB, X86::SHLrr32, 2,
-		       DestReg).addReg (Op0r).addReg (X86::CL);
-	      break;
-	    case 3:
-	    default:
-	      visitInstruction (I);
-	      break;
-	    }
-	}
+      const unsigned *OpTab = 0;  // Figure out the operand table to use
+      if (isRightShift) {
+        if (isOperandUnsigned)
+          OpTab = SHRUnsignedOperand;
+        else
+          OpTab = SHRSignedOperand;
+      } else {
+        // This is a left shift (SHL).
+        OpTab = SHLOperand;
+      }
+
+
+      BuildMI (BB, X86::SHLrr32, 2,
+               DestReg).addReg (Op0r).addReg (X86::CL);
     }
 }
 
@@ -344,25 +265,19 @@
 void ISel::visitAdd(BinaryOperator &B) {
   unsigned Op0r = getReg(B.getOperand(0)), Op1r = getReg(B.getOperand(1));
   unsigned DestReg = getReg(B);
+  unsigned Class = getClass(B.getType());
 
-  switch (B.getType()->getPrimitiveSize()) {
-  case 1:   // UByte, SByte
-    BuildMI(BB, X86::ADDrr8, 2, DestReg).addReg(Op0r).addReg(Op1r);
-    break;
-  case 2:   // UShort, Short
-    BuildMI(BB, X86::ADDrr16, 2, DestReg).addReg(Op0r).addReg(Op1r);
-    break;
-  case 4:   // UInt, Int
-    BuildMI(BB, X86::ADDrr32, 2, DestReg).addReg(Op0r).addReg(Op1r);
-    break;
-  case 8:   // ULong, Long
-    // Here we have a pair of operands each occupying a pair of registers.
-    // We need to do an ADDrr32 of the least-significant pair immediately
-    // followed by an ADCrr32 (Add with Carry) of the most-significant pair.
-    // I don't know how we are representing these multi-register arguments.
-  default:
-    visitInstruction(B);  // abort
-  }
+  static const unsigned Opcodes[] = { X86::ADDrr8, X86::ADDrr16, X86::ADDrr32 };
+
+  if (Class >= sizeof(Opcodes)/sizeof(Opcodes[0]))
+    visitInstruction(B);  // Not handled class yet...
+
+  BuildMI(BB, Opcodes[Class], 2, DestReg).addReg(Op0r).addReg(Op1r);
+
+  // For Longs: Here we have a pair of operands each occupying a pair of
+  // registers.  We need to do an ADDrr32 of the least-significant pair
+  // immediately followed by an ADCrr32 (Add with Carry) of the most-significant
+  // pair.  I don't know how we are representing these multi-register arguments.
 }
 
 




From lattner at cs.uiuc.edu  Fri Nov  1 19:41:01 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri Nov  1 19:41:01 2002
Subject: [llvm-commits] CVS: llvm/test/Regression/Jello/Makefile
Message-ID: <200211020140.TAA10361@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Regression/Jello:

Makefile updated: 1.1 -> 1.2

---
Log message:

Tests results are invalidated when jello is rebuilt


---
Diffs of the changes:

Index: llvm/test/Regression/Jello/Makefile
diff -u llvm/test/Regression/Jello/Makefile:1.1 llvm/test/Regression/Jello/Makefile:1.2
--- llvm/test/Regression/Jello/Makefile:1.1	Fri Oct 25 18:01:51 2002
+++ llvm/test/Regression/Jello/Makefile	Fri Nov  1 19:40:24 2002
@@ -10,7 +10,7 @@
 
 all:: $(addprefix Output/, $(TESTS:%.ll=%.out))
 
-Output/%.out: Output/%.bc
+Output/%.out: Output/%.bc $(LJELLO)
 	@echo "======== Running $< ==================="
 	$(VERB) jello $< > $@ 2>&1 || \
                  ( cat $@; rm -f $@; $(FAILURE) $@ )
@@ -18,6 +18,6 @@
 
 all:: $(addprefix Output/, $(FTESTS:%.llx=%.llx.out))
 
-Output/%.llx.out: %.llx Output/.dir $(LAS)
+Output/%.llx.out: %.llx Output/.dir $(LJELLO)
 	-$(TESTRUNR) $<
 




From lattner at cs.uiuc.edu  Fri Nov  1 19:42:01 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri Nov  1 19:42:01 2002
Subject: [llvm-commits] CVS: llvm/test/Makefile.tests
Message-ID: <200211020141.TAA10373@apoc.cs.uiuc.edu>


Changes in directory llvm/test:

Makefile.tests updated: 1.47 -> 1.48

---
Log message:

Expose a LJELLO variable


---
Diffs of the changes:

Index: llvm/test/Makefile.tests
diff -u llvm/test/Makefile.tests:1.47 llvm/test/Makefile.tests:1.48
--- llvm/test/Makefile.tests:1.47	Mon Oct 14 01:12:10 2002
+++ llvm/test/Makefile.tests	Fri Nov  1 19:41:07 2002
@@ -38,6 +38,7 @@
 LOPT     = $(TOOLS)/opt
 LLINK    = $(TOOLS)/link
 LANALYZE = $(TOOLS)/analyze
+LJELLO   = $(TOOLS)/jello
 
 LCCFLAGS  += -O2 -Wall
 LLCFLAGS =




From lattner at cs.uiuc.edu  Fri Nov  1 19:43:01 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri Nov  1 19:43:01 2002
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/InstSelectSimple.cpp
Message-ID: <200211020142.TAA10387@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Target/X86:

InstSelectSimple.cpp updated: 1.14 -> 1.15

---
Log message:

* Fix nonconstant shift case
* Turn table into 2d table


---
Diffs of the changes:

Index: llvm/lib/Target/X86/InstSelectSimple.cpp
diff -u llvm/lib/Target/X86/InstSelectSimple.cpp:1.14 llvm/lib/Target/X86/InstSelectSimple.cpp:1.15
--- llvm/lib/Target/X86/InstSelectSimple.cpp:1.14	Fri Nov  1 19:15:18 2002
+++ llvm/lib/Target/X86/InstSelectSimple.cpp	Fri Nov  1 19:41:55 2002
@@ -172,8 +172,8 @@
 {
   unsigned Op0r = getReg (I.getOperand (0));
   unsigned DestReg = getReg (I);
-  bool isRightShift = (I.getOpcode () == Instruction::Shr);
-  bool isOperandUnsigned = I.getType ()->isUnsigned ();
+  bool isLeftShift = I.getOpcode() == Instruction::Shl;
+  bool isOperandSigned = I.getType()->isUnsigned();
   unsigned OperandClass = getClass(I.getType());
 
   if (OperandClass > 2)
@@ -185,31 +185,15 @@
       assert(CUI->getType() == Type::UByteTy && "Shift amount not a ubyte?");
       unsigned char shAmt = CUI->getValue();
 
-      // This is a shift right (SHR).
-      static const unsigned SHRUnsignedConstantOperand[] = {
-        X86::SHRir8, X86::SHRir16, X86::SHRir32
-      };
-
-      // This is a shift right arithmetic (SAR).
-      static const unsigned SHRSignedConstantOperand[] = {
-        X86::SARir8, X86::SARir16, X86::SARir32
+      static const unsigned ConstantOperand[][4] = {
+        { X86::SHRir8, X86::SHRir16, X86::SHRir32, 0 },  // SHR
+        { X86::SARir8, X86::SARir16, X86::SARir32, 0 },  // SAR
+        { X86::SHLir8, X86::SHLir16, X86::SHLir32, 0 },  // SHL
+        { X86::SHLir8, X86::SHLir16, X86::SHLir32, 0 },  // SAL = SHL
       };
 
-      // This is a shift left (SHL).
-      static const unsigned SHLConstantOperand[] = {
-        X86::SHLir8, X86::SHLir16, X86::SHLir32
-      };
-
-      const unsigned *OpTab = 0;  // Figure out the operand table to use
-      if (isRightShift) {
-        if (isOperandUnsigned)
-          OpTab = SHRUnsignedConstantOperand;
-        else
-          OpTab = SHRSignedConstantOperand;
-      } else {
-        // This is a left shift (SHL).
-        OpTab = SHLConstantOperand;
-      }
+      const unsigned *OpTab = // Figure out the operand table to use
+        ConstantOperand[isLeftShift*2+isOperandSigned];
 
       // Emit:  reg, shamt  (shift-by-immediate opcode "ir" form.)
       BuildMI(BB, OpTab[OperandClass], 2, DestReg).addReg(Op0r).addZImm(shAmt);
@@ -222,41 +206,22 @@
       // that amount is already in the CL register, so we have to put it
       // there first.
       //
-      // Get it from the register it's in.
-      unsigned Op1r = getReg (I.getOperand (1));
+
       // Emit: move cl, shiftAmount (put the shift amount in CL.)
-      BuildMI (BB, X86::MOVrr8, 2, X86::CL).addReg (Op1r);
+      BuildMI (BB, X86::MOVrr8, 2, X86::CL).addReg(getReg(I.getOperand(1)));
 
       // This is a shift right (SHR).
-      static const unsigned SHRUnsignedOperand[] = {
-        X86::SHRrr8, X86::SHRrr16, X86::SHRrr32
+      static const unsigned NonConstantOperand[][4] = {
+        { X86::SHRrr8, X86::SHRrr16, X86::SHRrr32, 0 },  // SHR
+        { X86::SARrr8, X86::SARrr16, X86::SARrr32, 0 },  // SAR
+        { X86::SHLrr8, X86::SHLrr16, X86::SHLrr32, 0 },  // SHL
+        { X86::SHLrr8, X86::SHLrr16, X86::SHLrr32, 0 },  // SAL = SHL
       };
 
-      // This is a shift right arithmetic (SAR).
-      static const unsigned SHRSignedOperand[] = {
-        X86::SARrr8, X86::SARrr16, X86::SARrr32
-      };
-
-      // This is a shift left (SHL).
-      static const unsigned SHLOperand[] = {
-        X86::SHLrr8, X86::SHLrr16, X86::SHLrr32
-      };
-
-      // Emit:  reg, cl       (shift-by-CL opcode; "rr" form.)
-      const unsigned *OpTab = 0;  // Figure out the operand table to use
-      if (isRightShift) {
-        if (isOperandUnsigned)
-          OpTab = SHRUnsignedOperand;
-        else
-          OpTab = SHRSignedOperand;
-      } else {
-        // This is a left shift (SHL).
-        OpTab = SHLOperand;
-      }
-
+      const unsigned *OpTab = // Figure out the operand table to use
+        NonConstantOperand[isLeftShift*2+isOperandSigned];
 
-      BuildMI (BB, X86::SHLrr32, 2,
-               DestReg).addReg (Op0r).addReg (X86::CL);
+      BuildMI(BB, OpTab[OperandClass], 2, DestReg).addReg(Op0r).addReg(X86::CL);
     }
 }
 




From lattner at cs.uiuc.edu  Sat Nov  2 13:28:01 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sat Nov  2 13:28:01 2002
Subject: [llvm-commits] CVS: llvm/test/Regression/Jello/test3.ll
Message-ID: <200211021927.NAA12570@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Regression/Jello:

test3.ll updated: 1.1 -> 1.2

---
Log message:

Only test that uncond branch works


---
Diffs of the changes:

Index: llvm/test/Regression/Jello/test3.ll
diff -u llvm/test/Regression/Jello/test3.ll:1.1 llvm/test/Regression/Jello/test3.ll:1.2
--- llvm/test/Regression/Jello/test3.ll:1.1	Fri Oct 25 18:01:51 2002
+++ llvm/test/Regression/Jello/test3.ll	Sat Nov  2 13:27:45 2002
@@ -1,6 +1,6 @@
 ; test unconditional branch
-int %main() {
+void %main() {
 	br label %Test
 Test:
-	ret int 0
+	ret void
 }




From lattner at cs.uiuc.edu  Sat Nov  2 13:29:01 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sat Nov  2 13:29:01 2002
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/InstSelectSimple.cpp X86InstrInfo.def
Message-ID: <200211021928.NAA12584@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Target/X86:

InstSelectSimple.cpp updated: 1.15 -> 1.16
X86InstrInfo.def updated: 1.7 -> 1.8

---
Log message:

Implement unconditional branching support


---
Diffs of the changes:

Index: llvm/lib/Target/X86/InstSelectSimple.cpp
diff -u llvm/lib/Target/X86/InstSelectSimple.cpp:1.15 llvm/lib/Target/X86/InstSelectSimple.cpp:1.16
--- llvm/lib/Target/X86/InstSelectSimple.cpp:1.15	Fri Nov  1 19:41:55 2002
+++ llvm/lib/Target/X86/InstSelectSimple.cpp	Sat Nov  2 13:27:56 2002
@@ -55,6 +55,7 @@
     // fixed X86 code for each instruction.
     //
     void visitReturnInst(ReturnInst &RI);
+    void visitBranchInst(BranchInst &BI);
     void visitAdd(BinaryOperator &B);
     void visitShiftInst(ShiftInst &I);
 
@@ -161,6 +162,14 @@
   // block
   BuildMI(BB, X86::RET, 0);
 }
+
+void ISel::visitBranchInst(BranchInst &BI) {
+  if (BI.isConditional())   // Only handles unconditional branches so far...
+    visitInstruction(BI);
+
+  BuildMI(BB, X86::JMP, 1).addPCDisp(BI.getSuccessor(0));
+}
+
 
 /// Shift instructions: 'shl', 'sar', 'shr' - Some special cases here
 /// for constant immediate shift values, and for constant immediate


Index: llvm/lib/Target/X86/X86InstrInfo.def
diff -u llvm/lib/Target/X86/X86InstrInfo.def:1.7 llvm/lib/Target/X86/X86InstrInfo.def:1.8
--- llvm/lib/Target/X86/X86InstrInfo.def:1.7	Thu Oct 31 17:03:59 2002
+++ llvm/lib/Target/X86/X86InstrInfo.def	Sat Nov  2 13:27:56 2002
@@ -33,8 +33,9 @@
 // The second instruction must always be the noop instruction: (FIXME, not yet)
 I(NOOP        , "nop",                0, X86II::Void) // nop          90
 
-// Miscellaneous instructions
+// Flow control instructions
 I(RET         , "ret",       M_RET_FLAG, X86II::Void) // ret          CB
+I(JMP         , "jmp",    M_BRANCH_FLAG, X86II::Void) // jmp foo      EB|E9 cb|w
 
 // Move instructions
 I(MOVrr8      , "movb",               0, 0)           // R8  = R8     88/r




From lattner at cs.uiuc.edu  Sat Nov  2 13:46:00 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sat Nov  2 13:46:00 2002
Subject: [llvm-commits] CVS: llvm/test/Regression/Jello/test4.ll
Message-ID: <200211021945.NAA12809@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Regression/Jello:

test4.ll updated: 1.1 -> 1.2

---
Log message:

Make phi test a bit more challenging


---
Diffs of the changes:

Index: llvm/test/Regression/Jello/test4.ll
diff -u llvm/test/Regression/Jello/test4.ll:1.1 llvm/test/Regression/Jello/test4.ll:1.2
--- llvm/test/Regression/Jello/test4.ll:1.1	Fri Oct 25 18:01:51 2002
+++ llvm/test/Regression/Jello/test4.ll	Sat Nov  2 13:45:30 2002
@@ -1,7 +1,10 @@
 ; test phi node
-int %main() {
+void %main() {
 	br label %Test
 Test:
-	%X = phi int [7, %0]
-	ret int %X
+	%X = phi int [7, %0], [%Y, %Dead]
+	ret void
+Dead:
+	%Y = shr int 12, ubyte 4
+	br label %Test
 }




From lattner at cs.uiuc.edu  Sat Nov  2 13:46:07 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sat Nov  2 13:46:07 2002
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/InstSelectSimple.cpp
Message-ID: <200211021945.NAA12820@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Target/X86:

InstSelectSimple.cpp updated: 1.16 -> 1.17

---
Log message:

Add PHI node support, add comment for branch function


---
Diffs of the changes:

Index: llvm/lib/Target/X86/InstSelectSimple.cpp
diff -u llvm/lib/Target/X86/InstSelectSimple.cpp:1.16 llvm/lib/Target/X86/InstSelectSimple.cpp:1.17
--- llvm/lib/Target/X86/InstSelectSimple.cpp:1.16	Sat Nov  2 13:27:56 2002
+++ llvm/lib/Target/X86/InstSelectSimple.cpp	Sat Nov  2 13:45:49 2002
@@ -9,6 +9,7 @@
 #include "llvm/Function.h"
 #include "llvm/iTerminators.h"
 #include "llvm/iOther.h"
+#include "llvm/iPHINode.h"
 #include "llvm/Type.h"
 #include "llvm/Constants.h"
 #include "llvm/Pass.h"
@@ -54,6 +55,7 @@
     // Visitation methods for various instructions.  These methods simply emit
     // fixed X86 code for each instruction.
     //
+    void visitPHINode(PHINode &I);
     void visitReturnInst(ReturnInst &RI);
     void visitBranchInst(BranchInst &BI);
     void visitAdd(BinaryOperator &B);
@@ -140,6 +142,20 @@
   }
 }
 
+/// visitPHINode - Turn an LLVM PHI node into an X86 PHI node...
+///
+void ISel::visitPHINode(PHINode &PN) {
+  MachineInstr *MI = BuildMI(BB, X86::PHI, PN.getNumOperands(), getReg(PN));
+
+  for (unsigned i = 0, e = PN.getNumIncomingValues(); i != e; ++i) {
+    // FIXME: This will put constants after the PHI nodes in the block, which
+    // is invalid.  They should be put inline into the PHI node eventually.
+    //
+    MI->addRegOperand(getReg(PN.getIncomingValue(i)));
+    MI->addPCDispOperand(PN.getIncomingBlock(i));
+  }
+}
+
 
 /// 'ret' instruction - Here we are interested in meeting the x86 ABI.  As such,
 /// we have the following possibilities:
@@ -163,6 +179,11 @@
   BuildMI(BB, X86::RET, 0);
 }
 
+/// visitBranchInst - Handle conditional and unconditional branches here.  Note
+/// that since code layout is frozen at this point, that if we are trying to
+/// jump to a block that is the immediate successor of the current block, we can
+/// just make a fall-through. (but we don't currently).
+///
 void ISel::visitBranchInst(BranchInst &BI) {
   if (BI.isConditional())   // Only handles unconditional branches so far...
     visitInstruction(BI);




From lattner at cs.uiuc.edu  Sat Nov  2 14:05:01 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sat Nov  2 14:05:01 2002
Subject: [llvm-commits] CVS: llvm/test/Regression/Jello/test-logical.ll
Message-ID: <200211022004.OAA13208@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Regression/Jello:

test-logical.ll added (r1.1)

---
Log message:

New testcase for logical operators


---
Diffs of the changes:



From lattner at cs.uiuc.edu  Sat Nov  2 14:05:09 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sat Nov  2 14:05:09 2002
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/InstSelectSimple.cpp X86InstrInfo.def
Message-ID: <200211022004.OAA13223@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Target/X86:

InstSelectSimple.cpp updated: 1.17 -> 1.18
X86InstrInfo.def updated: 1.8 -> 1.9

---
Log message:

shuffle code around a bit, implement and, or, xor


---
Diffs of the changes:

Index: llvm/lib/Target/X86/InstSelectSimple.cpp
diff -u llvm/lib/Target/X86/InstSelectSimple.cpp:1.17 llvm/lib/Target/X86/InstSelectSimple.cpp:1.18
--- llvm/lib/Target/X86/InstSelectSimple.cpp:1.17	Sat Nov  2 13:45:49 2002
+++ llvm/lib/Target/X86/InstSelectSimple.cpp	Sat Nov  2 14:04:26 2002
@@ -55,11 +55,23 @@
     // Visitation methods for various instructions.  These methods simply emit
     // fixed X86 code for each instruction.
     //
-    void visitPHINode(PHINode &I);
     void visitReturnInst(ReturnInst &RI);
     void visitBranchInst(BranchInst &BI);
+
+    // Arithmetic operators
     void visitAdd(BinaryOperator &B);
+
+    // Bitwise operators
+    void visitAnd(BinaryOperator &B) { visitBitwise(B, 0); }
+    void visitOr (BinaryOperator &B) { visitBitwise(B, 1); }
+    void visitXor(BinaryOperator &B) { visitBitwise(B, 2); }
+    void visitBitwise(BinaryOperator &B, unsigned OpcodeClass);
+
+    // Binary comparison operators
+
+    // Other operators
     void visitShiftInst(ShiftInst &I);
+    void visitPHINode(PHINode &I);
 
     void visitInstruction(Instruction &I) {
       std::cerr << "Cannot instruction select: " << I;
@@ -142,19 +154,6 @@
   }
 }
 
-/// visitPHINode - Turn an LLVM PHI node into an X86 PHI node...
-///
-void ISel::visitPHINode(PHINode &PN) {
-  MachineInstr *MI = BuildMI(BB, X86::PHI, PN.getNumOperands(), getReg(PN));
-
-  for (unsigned i = 0, e = PN.getNumIncomingValues(); i != e; ++i) {
-    // FIXME: This will put constants after the PHI nodes in the block, which
-    // is invalid.  They should be put inline into the PHI node eventually.
-    //
-    MI->addRegOperand(getReg(PN.getIncomingValue(i)));
-    MI->addPCDispOperand(PN.getIncomingBlock(i));
-  }
-}
 
 
 /// 'ret' instruction - Here we are interested in meeting the x86 ABI.  As such,
@@ -192,6 +191,50 @@
 }
 
 
+
+/// 'add' instruction - Simply turn this into an x86 reg,reg add instruction.
+void ISel::visitAdd(BinaryOperator &B) {
+  unsigned Op0r = getReg(B.getOperand(0)), Op1r = getReg(B.getOperand(1));
+  unsigned DestReg = getReg(B);
+  unsigned Class = getClass(B.getType());
+
+  static const unsigned Opcodes[] = { X86::ADDrr8, X86::ADDrr16, X86::ADDrr32 };
+
+  if (Class >= sizeof(Opcodes)/sizeof(Opcodes[0]))
+    visitInstruction(B);  // Not handled class yet...
+
+  BuildMI(BB, Opcodes[Class], 2, DestReg).addReg(Op0r).addReg(Op1r);
+
+  // For Longs: Here we have a pair of operands each occupying a pair of
+  // registers.  We need to do an ADDrr32 of the least-significant pair
+  // immediately followed by an ADCrr32 (Add with Carry) of the most-significant
+  // pair.  I don't know how we are representing these multi-register arguments.
+}
+
+/// visitBitwise - Implement the three bitwise operators for integral types...
+/// OperatorClass is one of: 0 for And, 1 for Or, 2 for Xor.
+void ISel::visitBitwise(BinaryOperator &B, unsigned OperatorClass) {
+  if (B.getType() == Type::BoolTy)  // FIXME: Handle bools
+    visitInstruction(B);
+
+  unsigned Class = getClass(B.getType());
+  if (Class > 2)  // FIXME: Handle longs
+    visitInstruction(B);
+
+  static const unsigned OpcodeTab[][4] = {
+    { X86::ANDrr8, X86::ANDrr16, X86::ANDrr32, 0 },  // AND
+    { X86:: ORrr8, X86:: ORrr16, X86:: ORrr32, 0 },  // OR
+    { X86::XORrr8, X86::XORrr16, X86::XORrr32, 0 },  // XOR
+  };
+  
+  unsigned Opcode = OpcodeTab[OperatorClass][Class];
+  unsigned Op0r = getReg(B.getOperand(0));
+  unsigned Op1r = getReg(B.getOperand(1));
+  BuildMI(BB, Opcode, 2, getReg(B)).addReg(Op0r).addReg(Op1r);
+}
+
+
+
 /// Shift instructions: 'shl', 'sar', 'shr' - Some special cases here
 /// for constant immediate shift values, and for constant immediate
 /// shift values equal to 1. Even the general case is sort of special,
@@ -255,26 +298,19 @@
     }
 }
 
+/// visitPHINode - Turn an LLVM PHI node into an X86 PHI node...
+///
+void ISel::visitPHINode(PHINode &PN) {
+  MachineInstr *MI = BuildMI(BB, X86::PHI, PN.getNumOperands(), getReg(PN));
 
-/// 'add' instruction - Simply turn this into an x86 reg,reg add instruction.
-void ISel::visitAdd(BinaryOperator &B) {
-  unsigned Op0r = getReg(B.getOperand(0)), Op1r = getReg(B.getOperand(1));
-  unsigned DestReg = getReg(B);
-  unsigned Class = getClass(B.getType());
-
-  static const unsigned Opcodes[] = { X86::ADDrr8, X86::ADDrr16, X86::ADDrr32 };
-
-  if (Class >= sizeof(Opcodes)/sizeof(Opcodes[0]))
-    visitInstruction(B);  // Not handled class yet...
-
-  BuildMI(BB, Opcodes[Class], 2, DestReg).addReg(Op0r).addReg(Op1r);
-
-  // For Longs: Here we have a pair of operands each occupying a pair of
-  // registers.  We need to do an ADDrr32 of the least-significant pair
-  // immediately followed by an ADCrr32 (Add with Carry) of the most-significant
-  // pair.  I don't know how we are representing these multi-register arguments.
+  for (unsigned i = 0, e = PN.getNumIncomingValues(); i != e; ++i) {
+    // FIXME: This will put constants after the PHI nodes in the block, which
+    // is invalid.  They should be put inline into the PHI node eventually.
+    //
+    MI->addRegOperand(getReg(PN.getIncomingValue(i)));
+    MI->addPCDispOperand(PN.getIncomingBlock(i));
+  }
 }
-
 
 
 /// createSimpleX86InstructionSelector - This pass converts an LLVM function


Index: llvm/lib/Target/X86/X86InstrInfo.def
diff -u llvm/lib/Target/X86/X86InstrInfo.def:1.8 llvm/lib/Target/X86/X86InstrInfo.def:1.9
--- llvm/lib/Target/X86/X86InstrInfo.def:1.8	Sat Nov  2 13:27:56 2002
+++ llvm/lib/Target/X86/X86InstrInfo.def	Sat Nov  2 14:04:26 2002
@@ -48,7 +48,18 @@
 // Arithmetic instructions
 I(ADDrr8      , "addb",               0, 0)           // R8  += R8    00/r
 I(ADDrr16     , "addw",               0, 0)           // R16 += R16   01/r
-I(ADDrr32     , "addl",               0, 0)           // R32 += R32   02/r
+I(ADDrr32     , "addl",               0, 0)           // R32 += R32   01/r
+
+// Logical operators
+I(ANDrr8      , "andb",               0, 0)           // R8  &= R8    20/r
+I(ANDrr16     , "andw",               0, 0)           // R16 &= R16   21/r
+I(ANDrr32     , "andl",               0, 0)           // R32 &= R32   21/r
+I(ORrr8       , "orb",                0, 0)           // R8  |= R8    08/r
+I(ORrr16      , "orw",                0, 0)           // R16 |= R16   09/r
+I(ORrr32      , "orl",                0, 0)           // R32 |= R32   09/r
+I(XORrr8      , "xorb",               0, 0)           // R8  ^= R8    30/r
+I(XORrr16     , "xorw",               0, 0)           // R16 ^= R16   31/r
+I(XORrr32     , "xorl",               0, 0)           // R32 ^= R32   31/r
 
 // Shift instructions
 I(SHLrr8      , "shlb",               0, 0)           // R8   <<= cl   D2/4




From lattner at cs.uiuc.edu  Sat Nov  2 14:14:01 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sat Nov  2 14:14:01 2002
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/InstSelectSimple.cpp X86InstrInfo.def
Message-ID: <200211022013.OAA13330@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Target/X86:

InstSelectSimple.cpp updated: 1.18 -> 1.19
X86InstrInfo.def updated: 1.9 -> 1.10

---
Log message:

* Implement subtract
* Merge add code into logical code



---
Diffs of the changes:

Index: llvm/lib/Target/X86/InstSelectSimple.cpp
diff -u llvm/lib/Target/X86/InstSelectSimple.cpp:1.18 llvm/lib/Target/X86/InstSelectSimple.cpp:1.19
--- llvm/lib/Target/X86/InstSelectSimple.cpp:1.18	Sat Nov  2 14:04:26 2002
+++ llvm/lib/Target/X86/InstSelectSimple.cpp	Sat Nov  2 14:13:22 2002
@@ -59,13 +59,14 @@
     void visitBranchInst(BranchInst &BI);
 
     // Arithmetic operators
-    void visitAdd(BinaryOperator &B);
+    void visitAdd(BinaryOperator &B) { visitSimpleBinary(B, 0); }
+    void visitSub(BinaryOperator &B) { visitSimpleBinary(B, 1); }
 
     // Bitwise operators
-    void visitAnd(BinaryOperator &B) { visitBitwise(B, 0); }
-    void visitOr (BinaryOperator &B) { visitBitwise(B, 1); }
-    void visitXor(BinaryOperator &B) { visitBitwise(B, 2); }
-    void visitBitwise(BinaryOperator &B, unsigned OpcodeClass);
+    void visitAnd(BinaryOperator &B) { visitSimpleBinary(B, 2); }
+    void visitOr (BinaryOperator &B) { visitSimpleBinary(B, 3); }
+    void visitXor(BinaryOperator &B) { visitSimpleBinary(B, 4); }
+    void visitSimpleBinary(BinaryOperator &B, unsigned OpcodeClass);
 
     // Binary comparison operators
 
@@ -191,30 +192,12 @@
 }
 
 
-
-/// 'add' instruction - Simply turn this into an x86 reg,reg add instruction.
-void ISel::visitAdd(BinaryOperator &B) {
-  unsigned Op0r = getReg(B.getOperand(0)), Op1r = getReg(B.getOperand(1));
-  unsigned DestReg = getReg(B);
-  unsigned Class = getClass(B.getType());
-
-  static const unsigned Opcodes[] = { X86::ADDrr8, X86::ADDrr16, X86::ADDrr32 };
-
-  if (Class >= sizeof(Opcodes)/sizeof(Opcodes[0]))
-    visitInstruction(B);  // Not handled class yet...
-
-  BuildMI(BB, Opcodes[Class], 2, DestReg).addReg(Op0r).addReg(Op1r);
-
-  // For Longs: Here we have a pair of operands each occupying a pair of
-  // registers.  We need to do an ADDrr32 of the least-significant pair
-  // immediately followed by an ADCrr32 (Add with Carry) of the most-significant
-  // pair.  I don't know how we are representing these multi-register arguments.
-}
-
-/// visitBitwise - Implement the three bitwise operators for integral types...
-/// OperatorClass is one of: 0 for And, 1 for Or, 2 for Xor.
-void ISel::visitBitwise(BinaryOperator &B, unsigned OperatorClass) {
-  if (B.getType() == Type::BoolTy)  // FIXME: Handle bools
+/// visitSimpleBinary - Implement simple binary operators for integral types...
+/// OperatorClass is one of: 0 for Add, 1 for Sub, 2 for And, 3 for Or,
+/// 4 for Xor.
+///
+void ISel::visitSimpleBinary(BinaryOperator &B, unsigned OperatorClass) {
+  if (B.getType() == Type::BoolTy)  // FIXME: Handle bools for logicals
     visitInstruction(B);
 
   unsigned Class = getClass(B.getType());
@@ -222,6 +205,11 @@
     visitInstruction(B);
 
   static const unsigned OpcodeTab[][4] = {
+    // Arithmetic operators
+    { X86::ADDrr8, X86::ADDrr16, X86::ADDrr32, 0 },  // ADD
+    { X86::SUBrr8, X86::SUBrr16, X86::SUBrr32, 0 },  // SUB
+
+    // Bitwise operators
     { X86::ANDrr8, X86::ANDrr16, X86::ANDrr32, 0 },  // AND
     { X86:: ORrr8, X86:: ORrr16, X86:: ORrr32, 0 },  // OR
     { X86::XORrr8, X86::XORrr16, X86::XORrr32, 0 },  // XOR


Index: llvm/lib/Target/X86/X86InstrInfo.def
diff -u llvm/lib/Target/X86/X86InstrInfo.def:1.9 llvm/lib/Target/X86/X86InstrInfo.def:1.10
--- llvm/lib/Target/X86/X86InstrInfo.def:1.9	Sat Nov  2 14:04:26 2002
+++ llvm/lib/Target/X86/X86InstrInfo.def	Sat Nov  2 14:13:22 2002
@@ -49,6 +49,9 @@
 I(ADDrr8      , "addb",               0, 0)           // R8  += R8    00/r
 I(ADDrr16     , "addw",               0, 0)           // R16 += R16   01/r
 I(ADDrr32     , "addl",               0, 0)           // R32 += R32   01/r
+I(SUBrr8      , "subb",               0, 0)           // R8  -= R8    2A/r
+I(SUBrr16     , "subw",               0, 0)           // R16 -= R16   2B/r
+I(SUBrr32     , "subl",               0, 0)           // R32 -= R32   2B/r
 
 // Logical operators
 I(ANDrr8      , "andb",               0, 0)           // R8  &= R8    20/r




From lattner at cs.uiuc.edu  Sat Nov  2 14:14:07 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sat Nov  2 14:14:07 2002
Subject: [llvm-commits] CVS: llvm/test/Regression/Jello/test-arith.ll
Message-ID: <200211022013.OAA13345@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Regression/Jello:

test-arith.ll added (r1.1)

---
Log message:

New testcase for arithmetic operations


---
Diffs of the changes:



From lattner at cs.uiuc.edu  Sat Nov  2 14:29:01 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sat Nov  2 14:29:01 2002
Subject: [llvm-commits] CVS: llvm/test/Regression/Jello/test-arith.ll
Message-ID: <200211022028.OAA13672@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Regression/Jello:

test-arith.ll updated: 1.1 -> 1.2

---
Log message:

Enable multiply tests


---
Diffs of the changes:

Index: llvm/test/Regression/Jello/test-arith.ll
diff -u llvm/test/Regression/Jello/test-arith.ll:1.1 llvm/test/Regression/Jello/test-arith.ll:1.2
--- llvm/test/Regression/Jello/test-arith.ll:1.1	Sat Nov  2 14:13:40 2002
+++ llvm/test/Regression/Jello/test-arith.ll	Sat Nov  2 14:28:47 2002
@@ -2,7 +2,7 @@
 void %test() {
 	%A = add sbyte 0, 12
 	%B = sub sbyte %A, %A
-	;%C = mul sbyte %B, %B
+	%C = mul sbyte %B, %B
 	;%D = div sbyte %C, %C
 	;%E = rem sbyte %D, %D
 	;%F = div ubyte 5, 6
@@ -10,7 +10,7 @@
 
 	%A = add short 0, 12
 	%B = sub short %A, %A
-	;%C = mul short %B, %B
+	%C = mul short %B, %B
 	;%D = div short %C, %C
 	;%E = rem short %D, %D
 	;%F = div ushort 5, 6
@@ -18,7 +18,7 @@
 
 	%A = add int 0, 12
 	%B = sub int %A, %A
-	;%C = mul int %B, %B
+	%C = mul int %B, %B
 	;%D = div int %C, %C
 	;%E = rem int %D, %D
 	;%F = div uint 5, 6




From lattner at cs.uiuc.edu  Sat Nov  2 14:30:01 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sat Nov  2 14:30:01 2002
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/InstSelectSimple.cpp X86InstrInfo.def
Message-ID: <200211022029.OAA13683@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Target/X86:

InstSelectSimple.cpp updated: 1.19 -> 1.20
X86InstrInfo.def updated: 1.10 -> 1.11

---
Log message:

Implement multiply operator


---
Diffs of the changes:

Index: llvm/lib/Target/X86/InstSelectSimple.cpp
diff -u llvm/lib/Target/X86/InstSelectSimple.cpp:1.19 llvm/lib/Target/X86/InstSelectSimple.cpp:1.20
--- llvm/lib/Target/X86/InstSelectSimple.cpp:1.19	Sat Nov  2 14:13:22 2002
+++ llvm/lib/Target/X86/InstSelectSimple.cpp	Sat Nov  2 14:28:58 2002
@@ -61,6 +61,7 @@
     // Arithmetic operators
     void visitAdd(BinaryOperator &B) { visitSimpleBinary(B, 0); }
     void visitSub(BinaryOperator &B) { visitSimpleBinary(B, 1); }
+    void visitMul(BinaryOperator &B);
 
     // Bitwise operators
     void visitAnd(BinaryOperator &B) { visitSimpleBinary(B, 2); }
@@ -221,7 +222,33 @@
   BuildMI(BB, Opcode, 2, getReg(B)).addReg(Op0r).addReg(Op1r);
 }
 
+/// visitMul - Multiplies are not simple binary operators because they must deal
+/// with the EAX register explicitly.
+///
+void ISel::visitMul(BinaryOperator &I) {
+  unsigned Class = getClass(I.getType());
+  if (Class > 2)  // FIXME: Handle longs
+    visitInstruction(I);
 
+  static const unsigned Regs[]     ={ X86::AL    , X86::AX     , X86::EAX     };
+  static const unsigned MulOpcode[]={ X86::MULrr8, X86::MULrr16, X86::MULrr32 };
+  static const unsigned MovOpcode[]={ X86::MOVrr8, X86::MOVrr16, X86::MOVrr32 };
+
+  unsigned Reg = Regs[Class];
+  unsigned Op0Reg = getReg(I.getOperand(1));
+  unsigned Op1Reg = getReg(I.getOperand(1));
+
+  // Put the first operand into one of the A registers...
+  BuildMI(BB, MovOpcode[Class], 1, Reg).addReg(Op0Reg);
+  
+  // Emit the appropriate multiple instruction...
+  // FIXME: We need to mark that this modified AH, DX, or EDX also!!
+  BuildMI(BB, MulOpcode[Class], 2, Reg).addReg(Reg).addReg(Op1Reg);
+
+  // Put the result into the destination register...
+  BuildMI(BB, MovOpcode[Class], 1, getReg(I)).addReg(Reg);
+
+}
 
 /// Shift instructions: 'shl', 'sar', 'shr' - Some special cases here
 /// for constant immediate shift values, and for constant immediate
@@ -269,7 +296,7 @@
       //
 
       // Emit: move cl, shiftAmount (put the shift amount in CL.)
-      BuildMI (BB, X86::MOVrr8, 2, X86::CL).addReg(getReg(I.getOperand(1)));
+      BuildMI(BB, X86::MOVrr8, 1, X86::CL).addReg(getReg(I.getOperand(1)));
 
       // This is a shift right (SHR).
       static const unsigned NonConstantOperand[][4] = {


Index: llvm/lib/Target/X86/X86InstrInfo.def
diff -u llvm/lib/Target/X86/X86InstrInfo.def:1.10 llvm/lib/Target/X86/X86InstrInfo.def:1.11
--- llvm/lib/Target/X86/X86InstrInfo.def:1.10	Sat Nov  2 14:13:22 2002
+++ llvm/lib/Target/X86/X86InstrInfo.def	Sat Nov  2 14:28:58 2002
@@ -52,6 +52,10 @@
 I(SUBrr8      , "subb",               0, 0)           // R8  -= R8    2A/r
 I(SUBrr16     , "subw",               0, 0)           // R16 -= R16   2B/r
 I(SUBrr32     , "subl",               0, 0)           // R32 -= R32   2B/r
+I(MULrr8      , "mulb",               0, 0)           // AX   = AL*R8  F6/4
+I(MULrr16     , "mulw",               0, 0)           // DX:AX= AX*R16 F7/4
+I(MULrr32     , "mull",               0, 0)           // ED:EA= EA*R32 F7/4
+
 
 // Logical operators
 I(ANDrr8      , "andb",               0, 0)           // R8  &= R8    20/r




From lattner at cs.uiuc.edu  Sat Nov  2 14:55:01 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sat Nov  2 14:55:01 2002
Subject: [llvm-commits] CVS: llvm/test/Regression/Jello/test-arith.ll
Message-ID: <200211022054.OAA14091@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Regression/Jello:

test-arith.ll updated: 1.2 -> 1.3

---
Log message:

Enable div and mod tests


---
Diffs of the changes:

Index: llvm/test/Regression/Jello/test-arith.ll
diff -u llvm/test/Regression/Jello/test-arith.ll:1.2 llvm/test/Regression/Jello/test-arith.ll:1.3
--- llvm/test/Regression/Jello/test-arith.ll:1.2	Sat Nov  2 14:28:47 2002
+++ llvm/test/Regression/Jello/test-arith.ll	Sat Nov  2 14:54:11 2002
@@ -3,26 +3,26 @@
 	%A = add sbyte 0, 12
 	%B = sub sbyte %A, %A
 	%C = mul sbyte %B, %B
-	;%D = div sbyte %C, %C
-	;%E = rem sbyte %D, %D
-	;%F = div ubyte 5, 6
-	;%G = rem ubyte 6, 5
+	%D = div sbyte %C, %C
+	%E = rem sbyte %D, %D
+	%F = div ubyte 5, 6
+	%G = rem ubyte 6, 5
 
 	%A = add short 0, 12
 	%B = sub short %A, %A
 	%C = mul short %B, %B
-	;%D = div short %C, %C
-	;%E = rem short %D, %D
-	;%F = div ushort 5, 6
-	;%G = rem uint 6, 5
+	%D = div short %C, %C
+	%E = rem short %D, %D
+	%F = div ushort 5, 6
+	%G = rem uint 6, 5
 
 	%A = add int 0, 12
 	%B = sub int %A, %A
 	%C = mul int %B, %B
-	;%D = div int %C, %C
-	;%E = rem int %D, %D
-	;%F = div uint 5, 6
-	;%G = rem uint 6, 5
+	%D = div int %C, %C
+	%E = rem int %D, %D
+	%F = div uint 5, 6
+	%G = rem uint 6, 5
 
 	ret void
 }




From lattner at cs.uiuc.edu  Sat Nov  2 14:55:08 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sat Nov  2 14:55:08 2002
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/InstSelectSimple.cpp X86InstrInfo.def
Message-ID: <200211022054.OAA14130@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Target/X86:

InstSelectSimple.cpp updated: 1.20 -> 1.21
X86InstrInfo.def updated: 1.11 -> 1.12

---
Log message:

Implement signed and unsigned division and remainder


---
Diffs of the changes:

Index: llvm/lib/Target/X86/InstSelectSimple.cpp
diff -u llvm/lib/Target/X86/InstSelectSimple.cpp:1.20 llvm/lib/Target/X86/InstSelectSimple.cpp:1.21
--- llvm/lib/Target/X86/InstSelectSimple.cpp:1.20	Sat Nov  2 14:28:58 2002
+++ llvm/lib/Target/X86/InstSelectSimple.cpp	Sat Nov  2 14:54:46 2002
@@ -59,15 +59,19 @@
     void visitBranchInst(BranchInst &BI);
 
     // Arithmetic operators
+    void visitSimpleBinary(BinaryOperator &B, unsigned OpcodeClass);
     void visitAdd(BinaryOperator &B) { visitSimpleBinary(B, 0); }
     void visitSub(BinaryOperator &B) { visitSimpleBinary(B, 1); }
     void visitMul(BinaryOperator &B);
 
+    void visitDiv(BinaryOperator &B) { visitDivRem(B); }
+    void visitRem(BinaryOperator &B) { visitDivRem(B); }
+    void visitDivRem(BinaryOperator &B);
+
     // Bitwise operators
     void visitAnd(BinaryOperator &B) { visitSimpleBinary(B, 2); }
     void visitOr (BinaryOperator &B) { visitSimpleBinary(B, 3); }
     void visitXor(BinaryOperator &B) { visitSimpleBinary(B, 4); }
-    void visitSimpleBinary(BinaryOperator &B, unsigned OpcodeClass);
 
     // Binary comparison operators
 
@@ -247,7 +251,55 @@
 
   // Put the result into the destination register...
   BuildMI(BB, MovOpcode[Class], 1, getReg(I)).addReg(Reg);
+}
+
+/// visitDivRem - Handle division and remainder instructions... these
+/// instruction both require the same instructions to be generated, they just
+/// select the result from a different register.  Note that both of these
+/// instructions work differently for signed and unsigned operands.
+///
+void ISel::visitDivRem(BinaryOperator &I) {
+  unsigned Class = getClass(I.getType());
+  if (Class > 2)  // FIXME: Handle longs
+    visitInstruction(I);
 
+  static const unsigned Regs[]     ={ X86::AL    , X86::AX     , X86::EAX     };
+  static const unsigned MovOpcode[]={ X86::MOVrr8, X86::MOVrr16, X86::MOVrr32 };
+  static const unsigned ExtOpcode[]={ X86::CBW   , X86::CWD    , X86::CWQ     };
+  static const unsigned ClrOpcode[]={ X86::XORrr8, X86::XORrr16, X86::XORrr32 };
+  static const unsigned ExtRegs[]  ={ X86::AH    , X86::DX     , X86::EDX     };
+
+  static const unsigned DivOpcode[][4] = {
+    { X86::DIVrr8 , X86::DIVrr16 , X86::DIVrr32 , 0 },  // Unsigned division
+    { X86::IDIVrr8, X86::IDIVrr16, X86::IDIVrr32, 0 },  // Signed division
+  };
+
+  bool isSigned   = I.getType()->isSigned();
+  unsigned Reg    = Regs[Class];
+  unsigned ExtReg = ExtRegs[Class];
+  unsigned Op0Reg = getReg(I.getOperand(1));
+  unsigned Op1Reg = getReg(I.getOperand(1));
+
+  // Put the first operand into one of the A registers...
+  BuildMI(BB, MovOpcode[Class], 1, Reg).addReg(Op0Reg);
+
+  if (isSigned) {
+    // Emit a sign extension instruction...
+    BuildMI(BB, ExtOpcode[Class], 1, ExtReg).addReg(Reg);
+  } else {
+    // If unsigned, emit a zeroing instruction... (reg = xor reg, reg)
+    BuildMI(BB, ClrOpcode[Class], 2, ExtReg).addReg(ExtReg).addReg(ExtReg);
+  }
+
+  // Figure out which register we want to pick the result out of...
+  unsigned DestReg = (I.getOpcode() == Instruction::Div) ? Reg : ExtReg;
+  
+  // Emit the appropriate multiple instruction...
+  // FIXME: We need to mark that this modified AH, DX, or EDX also!!
+  BuildMI(BB,DivOpcode[isSigned][Class], 2, DestReg).addReg(Reg).addReg(Op1Reg);
+
+  // Put the result into the destination register...
+  BuildMI(BB, MovOpcode[Class], 1, getReg(I)).addReg(DestReg);
 }
 
 /// Shift instructions: 'shl', 'sar', 'shr' - Some special cases here
@@ -255,11 +307,9 @@
 /// shift values equal to 1. Even the general case is sort of special,
 /// because the shift amount has to be in CL, not just any old register.
 ///
-void
-ISel::visitShiftInst (ShiftInst & I)
-{
-  unsigned Op0r = getReg (I.getOperand (0));
-  unsigned DestReg = getReg (I);
+void ISel::visitShiftInst (ShiftInst &I) {
+  unsigned Op0r = getReg (I.getOperand(0));
+  unsigned DestReg = getReg(I);
   bool isLeftShift = I.getOpcode() == Instruction::Shl;
   bool isOperandSigned = I.getType()->isUnsigned();
   unsigned OperandClass = getClass(I.getType());


Index: llvm/lib/Target/X86/X86InstrInfo.def
diff -u llvm/lib/Target/X86/X86InstrInfo.def:1.11 llvm/lib/Target/X86/X86InstrInfo.def:1.12
--- llvm/lib/Target/X86/X86InstrInfo.def:1.11	Sat Nov  2 14:28:58 2002
+++ llvm/lib/Target/X86/X86InstrInfo.def	Sat Nov  2 14:54:46 2002
@@ -56,6 +56,16 @@
 I(MULrr16     , "mulw",               0, 0)           // DX:AX= AX*R16 F7/4
 I(MULrr32     , "mull",               0, 0)           // ED:EA= EA*R32 F7/4
 
+// unsigned division/remainder
+I(DIVrr8      , "divb",               0, 0)           // AX/r8= AL&AH  F6/6
+I(DIVrr16     , "divw",               0, 0)           // DA/r16=AX&DX  F7/6
+I(DIVrr32     , "divl",               0, 0)           // DA/r32=EAX&DX F7/6
+
+// signed division/remainder
+I(IDIVrr8     , "idivb",              0, 0)           // AX/r8= AL&AH  F6/6
+I(IDIVrr16    , "idivw",              0, 0)           // DA/r16=AX&DX  F7/6
+I(IDIVrr32    , "idivl",              0, 0)           // DA/r32=EAX&DX F7/6
+
 
 // Logical operators
 I(ANDrr8      , "andb",               0, 0)           // R8  &= R8    20/r
@@ -87,6 +97,12 @@
 I(SARir16     , "sarw",               0, 0)           // R16  >>= imm8 C1/7 ib
 I(SARrr32     , "sarl",               0, 0)           // R32  >>= cl   D3/7
 I(SARir32     , "sarl",               0, 0)           // R32  >>= imm8 C1/7 ib
+
+
+// Miscellaneous instructions...
+I(CBW         , "cbw",                0, 0)           // AH = signext(AL)  98
+I(CWD         , "cwd",                0, 0)           // DX = signext(AX)  99
+I(CWQ         , "cwq",                0, 0)           // EDX= signext(EAX) 99
 
 // At this point, I is dead, so undefine the macro
 #undef I




From brukman at neo.cs.uiuc.edu  Sat Nov  2 15:19:00 2002
From: brukman at neo.cs.uiuc.edu (Misha Brukman)
Date: Sat Nov  2 15:19:00 2002
Subject: [llvm-commits] CVS: llvm/include/llvm/Analysis/DSNode.h DSSupport.h
Message-ID: <200211022119.gA2LJ3S32413@neo.cs.uiuc.edu>


Changes in directory llvm/include/llvm/Analysis:

DSNode.h updated: 1.4 -> 1.5
DSSupport.h updated: 1.1 -> 1.2

---
Log message:

Fixed comment on top of DSNode.h, added note to DSSupport.h as to why
functions were split out from DSNode class.


---
Diffs of the changes:

Index: llvm/include/llvm/Analysis/DSNode.h
diff -u llvm/include/llvm/Analysis/DSNode.h:1.4 llvm/include/llvm/Analysis/DSNode.h:1.5
--- llvm/include/llvm/Analysis/DSNode.h:1.4	Fri Nov  1 18:36:03 2002
+++ llvm/include/llvm/Analysis/DSNode.h	Sat Nov  2 15:18:53 2002
@@ -1,6 +1,6 @@
-//===- DSSupport.h - Support for datastructure graphs -----------*- C++ -*-===//
+//===- DSNode.h - Node definition for datastructure graphs ------*- C++ -*-===//
 //
-// Support for graph nodes, call sites, and types.
+// Data structure graph nodes and some implementation of DSNodeHandle.
 //
 //===----------------------------------------------------------------------===//
 


Index: llvm/include/llvm/Analysis/DSSupport.h
diff -u llvm/include/llvm/Analysis/DSSupport.h:1.1 llvm/include/llvm/Analysis/DSSupport.h:1.2
--- llvm/include/llvm/Analysis/DSSupport.h:1.1	Thu Oct 31 00:34:18 2002
+++ llvm/include/llvm/Analysis/DSSupport.h	Sat Nov  2 15:18:53 2002
@@ -28,6 +28,10 @@
 /// graph from getting out of date.  This class represents a "pointer" in the
 /// graph, whose destination is an indexed offset into a node.
 ///
+/// Note: some functions that are marked as inline in DSNodeHandle are actually
+/// defined in DSNode.h because they need knowledge of DSNode operation. Putting
+/// them in a CPP file wouldn't help making them inlined and keeping DSNode and
+/// DSNodeHandle (and friends) in one file complicates things.
 class DSNodeHandle {
   DSNode *N;
   unsigned Offset;




From lattner at cs.uiuc.edu  Sat Nov  2 16:09:00 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sat Nov  2 16:09:00 2002
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/InstrSched/SchedPriorities.cpp SchedPriorities.h
Message-ID: <200211022208.QAA30329@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/CodeGen/InstrSched:

SchedPriorities.cpp updated: 1.23 -> 1.24
SchedPriorities.h updated: 1.21 -> 1.22

---
Log message:

Move function to cpp file from header


---
Diffs of the changes:

Index: llvm/lib/CodeGen/InstrSched/SchedPriorities.cpp
diff -u llvm/lib/CodeGen/InstrSched/SchedPriorities.cpp:1.23 llvm/lib/CodeGen/InstrSched/SchedPriorities.cpp:1.24
--- llvm/lib/CodeGen/InstrSched/SchedPriorities.cpp:1.23	Mon Oct 28 12:50:08 2002
+++ llvm/lib/CodeGen/InstrSched/SchedPriorities.cpp	Sat Nov  2 16:07:51 2002
@@ -17,6 +17,12 @@
 #include "Support/PostOrderIterator.h"
 using std::cerr;
 
+std::ostream &operator<<(std::ostream &os, const NodeDelayPair* nd) {
+  return os << "Delay for node " << nd->node->getNodeId()
+	    << " = " << (long)nd->delay << "\n";
+}
+
+
 SchedPriorities::SchedPriorities(const Function *, const SchedGraph *G,
                                  FunctionLiveVarInfo &LVI)
   : curTime(0), graph(G), methodLiveVarInfo(LVI),


Index: llvm/lib/CodeGen/InstrSched/SchedPriorities.h
diff -u llvm/lib/CodeGen/InstrSched/SchedPriorities.h:1.21 llvm/lib/CodeGen/InstrSched/SchedPriorities.h:1.22
--- llvm/lib/CodeGen/InstrSched/SchedPriorities.h:1.21	Fri Nov  1 10:46:05 2002
+++ llvm/lib/CodeGen/InstrSched/SchedPriorities.h	Sat Nov  2 16:07:51 2002
@@ -18,7 +18,6 @@
 #include "llvm/Target/MachineSchedInfo.h"
 #include "Support/hash_set"
 #include 
-#include 
 
 class Function;
 class MachineInstr;
@@ -202,9 +201,6 @@
   mcands.clear();
 }
 
-inline std::ostream &operator<<(std::ostream &os, const NodeDelayPair* nd) {
-  return os << "Delay for node " << nd->node->getNodeId()
-	    << " = " << (long)nd->delay << "\n";
-}
+std::ostream &operator<<(std::ostream &os, const NodeDelayPair* nd);
 
 #endif




From ashukla at cs.uiuc.edu  Sat Nov  2 19:44:00 2002
From: ashukla at cs.uiuc.edu (Anand Shukla)
Date: Sat Nov  2 19:44:00 2002
Subject: [llvm-commits] CVS: llvm/lib/Reoptimizer/Makefile
Message-ID: <200211030143.TAA10531@trinity.cs.uiuc.edu>


Changes in directory llvm/lib/Reoptimizer:

Makefile updated: 1.6 -> 1.7

---
Log message:

Added light wt optimizer


---
Diffs of the changes:

Index: llvm/lib/Reoptimizer/Makefile
diff -u llvm/lib/Reoptimizer/Makefile:1.6 llvm/lib/Reoptimizer/Makefile:1.7
--- llvm/lib/Reoptimizer/Makefile:1.6	Sun Sep 15 15:38:43 2002
+++ llvm/lib/Reoptimizer/Makefile	Sat Nov  2 19:43:25 2002
@@ -1,4 +1,4 @@
 
 LEVEL = ../..
-DIRS = Mapping TraceCache
+DIRS = Mapping TraceCache LightWtProfiling
 include $(LEVEL)/Makefile.common




From ashukla at cs.uiuc.edu  Sat Nov  2 19:44:08 2002
From: ashukla at cs.uiuc.edu (Anand Shukla)
Date: Sat Nov  2 19:44:08 2002
Subject: [llvm-commits] CVS: llvm/lib/Reoptimizer/LightWtProfiling/
Message-ID: <200211030143.TAA10539@trinity.cs.uiuc.edu>


Changes in directory llvm/lib/Reoptimizer/LightWtProfiling:


---
Log message:

Directory /home/vadve/vadve/Research/DynOpt/CVSRepository/llvm/lib/Reoptimizer/LightWtProfiling added to the repository


---
Diffs of the changes:



From ashukla at cs.uiuc.edu  Sat Nov  2 19:44:15 2002
From: ashukla at cs.uiuc.edu (Anand Shukla)
Date: Sat Nov  2 19:44:15 2002
Subject: [llvm-commits] CVS: llvm/lib/Reoptimizer/LightWtProfiling/Instrument/
Message-ID: <200211030143.TAA10555@trinity.cs.uiuc.edu>


Changes in directory llvm/lib/Reoptimizer/LightWtProfiling/Instrument:


---
Log message:

Directory /home/vadve/vadve/Research/DynOpt/CVSRepository/llvm/lib/Reoptimizer/LightWtProfiling/Instrument added to the repository


---
Diffs of the changes:



From ashukla at cs.uiuc.edu  Sat Nov  2 19:45:01 2002
From: ashukla at cs.uiuc.edu (Anand Shukla)
Date: Sat Nov  2 19:45:01 2002
Subject: [llvm-commits] CVS: llvm/lib/Reoptimizer/LightWtProfiling/Makefile
Message-ID: <200211030144.TAA10573@trinity.cs.uiuc.edu>


Changes in directory llvm/lib/Reoptimizer/LightWtProfiling:

Makefile added (r1.1)

---
Log message:

Makefile for new dir


---
Diffs of the changes:



From ashukla at cs.uiuc.edu  Sat Nov  2 19:45:08 2002
From: ashukla at cs.uiuc.edu (Anand Shukla)
Date: Sat Nov  2 19:45:08 2002
Subject: [llvm-commits] CVS: llvm/lib/Reoptimizer/LightWtProfiling/Instrument/Makefile
Message-ID: <200211030144.TAA10583@trinity.cs.uiuc.edu>


Changes in directory llvm/lib/Reoptimizer/LightWtProfiling/Instrument:

Makefile added (r1.1)

---
Log message:

Makefile for new dir


---
Diffs of the changes:



From ashukla at cs.uiuc.edu  Sat Nov  2 19:45:15 2002
From: ashukla at cs.uiuc.edu (Anand Shukla)
Date: Sat Nov  2 19:45:15 2002
Subject: [llvm-commits] CVS: llvm/lib/Reoptimizer/LightWtProfiling/Trigger/
Message-ID: <200211030144.TAA10561@trinity.cs.uiuc.edu>


Changes in directory llvm/lib/Reoptimizer/LightWtProfiling/Trigger:


---
Log message:

Directory /home/vadve/vadve/Research/DynOpt/CVSRepository/llvm/lib/Reoptimizer/LightWtProfiling/Trigger added to the repository


---
Diffs of the changes:



From ashukla at cs.uiuc.edu  Sat Nov  2 19:46:00 2002
From: ashukla at cs.uiuc.edu (Anand Shukla)
Date: Sat Nov  2 19:46:00 2002
Subject: [llvm-commits] CVS: llvm/lib/Reoptimizer/LightWtProfiling/Instrument/InstLoops.cpp
Message-ID: <200211030145.TAA10597@trinity.cs.uiuc.edu>


Changes in directory llvm/lib/Reoptimizer/LightWtProfiling/Instrument:

InstLoops.cpp added (r1.1)

---
Log message:

code to lightly instrument at branches


---
Diffs of the changes:



From ashukla at cs.uiuc.edu  Sat Nov  2 19:47:00 2002
From: ashukla at cs.uiuc.edu (Anand Shukla)
Date: Sat Nov  2 19:47:00 2002
Subject: [llvm-commits] CVS: llvm/lib/Reoptimizer/LightWtProfiling/Trigger/Makefile
Message-ID: <200211030146.TAA10611@trinity.cs.uiuc.edu>


Changes in directory llvm/lib/Reoptimizer/LightWtProfiling/Trigger:

Makefile added (r1.1)

---
Log message:

Makefile for new dir


---
Diffs of the changes:



From ashukla at cs.uiuc.edu  Sat Nov  2 19:49:01 2002
From: ashukla at cs.uiuc.edu (Anand Shukla)
Date: Sat Nov  2 19:49:01 2002
Subject: [llvm-commits] CVS: llvm/lib/Reoptimizer/LightWtProfiling/Trigger/FirstTrigger.cpp
Message-ID: <200211030148.TAA10626@trinity.cs.uiuc.edu>


Changes in directory llvm/lib/Reoptimizer/LightWtProfiling/Trigger:

FirstTrigger.cpp added (r1.1)

---
Log message:

First level trigger


---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:00:04 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:00:04 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/
Message-ID: <200211031236.GAA13685@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs:


---
Log message:

Directory /home/vadve/vadve/Research/DynOpt/CVSRepository/llvm/test/DSGraphs added to the repository


---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:00:12 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:00:12 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/ackermann/
Message-ID: <200211031236.GAA13692@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/ackermann:


---
Log message:

Directory /home/vadve/vadve/Research/DynOpt/CVSRepository/llvm/test/DSGraphs/ackermann added to the repository


---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:00:19 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:00:19 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/fib2/
Message-ID: <200211031236.GAA13702@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/fib2:


---
Log message:

Directory /home/vadve/vadve/Research/DynOpt/CVSRepository/llvm/test/DSGraphs/fib2 added to the repository


---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:00:26 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:00:26 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/hash/
Message-ID: <200211031236.GAA13705@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/hash:


---
Log message:

Directory /home/vadve/vadve/Research/DynOpt/CVSRepository/llvm/test/DSGraphs/hash added to the repository


---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:00:33 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:00:33 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/ary3/
Message-ID: <200211031236.GAA13697@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/ary3:


---
Log message:

Directory /home/vadve/vadve/Research/DynOpt/CVSRepository/llvm/test/DSGraphs/ary3 added to the repository


---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:00:41 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:00:41 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/hello/
Message-ID: <200211031236.GAA13715@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/hello:


---
Log message:

Directory /home/vadve/vadve/Research/DynOpt/CVSRepository/llvm/test/DSGraphs/hello added to the repository


---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:00:48 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:00:48 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/llubenchmark/
Message-ID: <200211031236.GAA13725@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/llubenchmark:


---
Log message:

Directory /home/vadve/vadve/Research/DynOpt/CVSRepository/llvm/test/DSGraphs/llubenchmark added to the repository


---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:00:55 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:00:55 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/lists/
Message-ID: <200211031236.GAA13722@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/lists:


---
Log message:

Directory /home/vadve/vadve/Research/DynOpt/CVSRepository/llvm/test/DSGraphs/lists added to the repository


---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:01:03 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:01:03 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/matrix/
Message-ID: <200211031236.GAA13732@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/matrix:


---
Log message:

Directory /home/vadve/vadve/Research/DynOpt/CVSRepository/llvm/test/DSGraphs/matrix added to the repository


---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:01:10 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:01:10 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/matrixTranspose/
Message-ID: <200211031236.GAA13735@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/matrixTranspose:


---
Log message:

Directory /home/vadve/vadve/Research/DynOpt/CVSRepository/llvm/test/DSGraphs/matrixTranspose added to the repository


---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:01:17 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:01:17 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/heapsort/
Message-ID: <200211031236.GAA13710@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/heapsort:


---
Log message:

Directory /home/vadve/vadve/Research/DynOpt/CVSRepository/llvm/test/DSGraphs/heapsort added to the repository


---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:01:24 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:01:24 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/pi/
Message-ID: <200211031236.GAA13750@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/pi:


---
Log message:

Directory /home/vadve/vadve/Research/DynOpt/CVSRepository/llvm/test/DSGraphs/pi added to the repository


---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:01:32 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:01:32 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/methcall/
Message-ID: <200211031236.GAA13738@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/methcall:


---
Log message:

Directory /home/vadve/vadve/Research/DynOpt/CVSRepository/llvm/test/DSGraphs/methcall added to the repository


---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:01:39 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:01:39 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/objinst/
Message-ID: <200211031236.GAA13743@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/objinst:


---
Log message:

Directory /home/vadve/vadve/Research/DynOpt/CVSRepository/llvm/test/DSGraphs/objinst added to the repository


---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:01:52 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:01:52 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/sumarray2d/
Message-ID: <200211031236.GAA13765@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/sumarray2d:


---
Log message:

Directory /home/vadve/vadve/Research/DynOpt/CVSRepository/llvm/test/DSGraphs/sumarray2d added to the repository


---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:01:59 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:01:59 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/sumarray/
Message-ID: <200211031236.GAA13764@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/sumarray:


---
Log message:

Directory /home/vadve/vadve/Research/DynOpt/CVSRepository/llvm/test/DSGraphs/sumarray added to the repository


---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:02:07 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:02:07 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/printargs/
Message-ID: <200211031236.GAA13762@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/printargs:


---
Log message:

Directory /home/vadve/vadve/Research/DynOpt/CVSRepository/llvm/test/DSGraphs/printargs added to the repository


---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:02:14 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:02:14 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/sumarraymalloc/
Message-ID: <200211031236.GAA13768@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/sumarraymalloc:


---
Log message:

Directory /home/vadve/vadve/Research/DynOpt/CVSRepository/llvm/test/DSGraphs/sumarraymalloc added to the repository


---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:02:21 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:02:21 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/Olden-bh/
Message-ID: <200211031236.GAA13775@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/Olden-bh:


---
Log message:

Directory /home/vadve/vadve/Research/DynOpt/CVSRepository/llvm/test/DSGraphs/Olden-bh added to the repository


---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:02:29 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:02:29 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/random/
Message-ID: <200211031236.GAA13769@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/random:


---
Log message:

Directory /home/vadve/vadve/Research/DynOpt/CVSRepository/llvm/test/DSGraphs/random added to the repository


---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:02:36 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:02:36 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/Olden-em3d/
Message-ID: <200211031236.GAA13793@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/Olden-em3d:


---
Log message:

Directory /home/vadve/vadve/Research/DynOpt/CVSRepository/llvm/test/DSGraphs/Olden-em3d added to the repository


---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:02:44 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:02:44 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/Olden-health/
Message-ID: <200211031236.GAA13800@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/Olden-health:


---
Log message:

Directory /home/vadve/vadve/Research/DynOpt/CVSRepository/llvm/test/DSGraphs/Olden-health added to the repository


---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:02:52 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:02:52 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/test_indvars/
Message-ID: <200211031236.GAA13772@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/test_indvars:


---
Log message:

Directory /home/vadve/vadve/Research/DynOpt/CVSRepository/llvm/test/DSGraphs/test_indvars added to the repository


---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:02:59 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:02:59 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/Olden-perimeter/
Message-ID: <200211031236.GAA13812@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/Olden-perimeter:


---
Log message:

Directory /home/vadve/vadve/Research/DynOpt/CVSRepository/llvm/test/DSGraphs/Olden-perimeter added to the repository


---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:03:07 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:03:07 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/Olden-treeadd/
Message-ID: <200211031236.GAA13822@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/Olden-treeadd:


---
Log message:

Directory /home/vadve/vadve/Research/DynOpt/CVSRepository/llvm/test/DSGraphs/Olden-treeadd added to the repository


---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:03:15 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:03:15 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/Olden-bisort/
Message-ID: <200211031236.GAA13784@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/Olden-bisort:


---
Log message:

Directory /home/vadve/vadve/Research/DynOpt/CVSRepository/llvm/test/DSGraphs/Olden-bisort added to the repository


---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:03:22 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:03:22 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/Olden-mst/
Message-ID: <200211031236.GAA13805@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/Olden-mst:


---
Log message:

Directory /home/vadve/vadve/Research/DynOpt/CVSRepository/llvm/test/DSGraphs/Olden-mst added to the repository


---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:03:30 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:03:30 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/Olden-voronoi/
Message-ID: <200211031236.GAA13832@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/Olden-voronoi:


---
Log message:

Directory /home/vadve/vadve/Research/DynOpt/CVSRepository/llvm/test/DSGraphs/Olden-voronoi added to the repository


---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:03:38 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:03:38 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/300.twolf/
Message-ID: <200211031236.GAA13887@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/300.twolf:


---
Log message:

Directory /home/vadve/vadve/Research/DynOpt/CVSRepository/llvm/test/DSGraphs/300.twolf added to the repository


---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:03:46 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:03:46 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/Olden-power/
Message-ID: <200211031236.GAA13815@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/Olden-power:


---
Log message:

Directory /home/vadve/vadve/Research/DynOpt/CVSRepository/llvm/test/DSGraphs/Olden-power added to the repository


---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:03:55 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:03:55 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/Olden-tsp/
Message-ID: <200211031236.GAA13825@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/Olden-tsp:


---
Log message:

Directory /home/vadve/vadve/Research/DynOpt/CVSRepository/llvm/test/DSGraphs/Olden-tsp added to the repository


---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:04:03 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:04:03 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/OptimizerEval/
Message-ID: <200211031236.GAA13837@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/OptimizerEval:


---
Log message:

Directory /home/vadve/vadve/Research/DynOpt/CVSRepository/llvm/test/DSGraphs/OptimizerEval added to the repository


---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:04:12 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:04:12 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/sgefa/
Message-ID: <200211031236.GAA13840@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/sgefa:


---
Log message:

Directory /home/vadve/vadve/Research/DynOpt/CVSRepository/llvm/test/DSGraphs/sgefa added to the repository


---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:04:21 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:04:21 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/164.gzip/
Message-ID: <200211031236.GAA13855@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/164.gzip:


---
Log message:

Directory /home/vadve/vadve/Research/DynOpt/CVSRepository/llvm/test/DSGraphs/164.gzip added to the repository


---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:05:01 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:05:01 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/Makefile Makefile.DSGraphs
Message-ID: <200211031237.GAA13901@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs:

Makefile added (r1.1)
Makefile.DSGraphs added (r1.1)

---
Log message:

Makefiles for testing data structure analysis on the programs
in test/Programs/SingleSource and test/Programs/MultiSource.


---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:05:09 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:05:09 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/164.gzip/Makefile
Message-ID: <200211031238.GAA13913@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/164.gzip:

Makefile added (r1.1)

---
Log message:

Makefile for testing data structure analysis.


---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:05:18 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:05:18 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/181.mcf/Makefile
Message-ID: <200211031238.GAA13999@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/181.mcf:

Makefile added (r1.1)

---
Log message:

(null)

---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:05:27 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:05:27 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/197.parser/Makefile
Message-ID: <200211031238.GAA14002@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/197.parser:

Makefile added (r1.1)

---
Log message:

(null)

---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:05:36 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:05:36 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/256.bzip2/Makefile
Message-ID: <200211031238.GAA14019@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/256.bzip2:

Makefile added (r1.1)

---
Log message:

(null)

---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:05:45 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:05:45 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/254.gap/Makefile
Message-ID: <200211031238.GAA14009@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/254.gap:

Makefile added (r1.1)

---
Log message:

(null)

---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:05:54 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:05:54 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/255.vortex/Makefile
Message-ID: <200211031238.GAA14014@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/255.vortex:

Makefile added (r1.1)

---
Log message:

(null)

---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:06:03 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:06:03 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/ary3/Makefile
Message-ID: <200211031238.GAA14035@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/ary3:

Makefile added (r1.1)

---
Log message:

(null)

---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:06:12 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:06:12 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/300.twolf/Makefile
Message-ID: <200211031238.GAA14024@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/300.twolf:

Makefile added (r1.1)

---
Log message:

(null)

---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:06:21 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:06:21 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/ackermann/Makefile
Message-ID: <200211031238.GAA14032@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/ackermann:

Makefile added (r1.1)

---
Log message:

(null)

---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:06:29 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:06:29 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/fib2/Makefile
Message-ID: <200211031238.GAA14041@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/fib2:

Makefile added (r1.1)

---
Log message:

(null)

---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:06:38 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:06:38 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/matrix/Makefile
Message-ID: <200211031238.GAA14075@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/matrix:

Makefile added (r1.1)

---
Log message:

(null)

---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:06:48 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:06:48 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/dummylib.c
Message-ID: <200211031239.GAA14219@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs:

dummylib.c added (r1.1)

---
Log message:

Dummy library routines to expose their semantics to program analysis.


---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:06:57 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:06:57 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/sim/
Message-ID: <200211031236.GAA13848@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/sim:


---
Log message:

Directory /home/vadve/vadve/Research/DynOpt/CVSRepository/llvm/test/DSGraphs/sim added to the repository


---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:07:07 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:07:07 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/sieve/
Message-ID: <200211031236.GAA13845@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/sieve:


---
Log message:

Directory /home/vadve/vadve/Research/DynOpt/CVSRepository/llvm/test/DSGraphs/sieve added to the repository


---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:07:16 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:07:16 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/254.gap/
Message-ID: <200211031236.GAA13872@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/254.gap:


---
Log message:

Directory /home/vadve/vadve/Research/DynOpt/CVSRepository/llvm/test/DSGraphs/254.gap added to the repository


---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:07:26 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:07:26 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/197.parser/
Message-ID: <200211031236.GAA13867@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/197.parser:


---
Log message:

Directory /home/vadve/vadve/Research/DynOpt/CVSRepository/llvm/test/DSGraphs/197.parser added to the repository


---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:07:35 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:07:35 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/181.mcf/
Message-ID: <200211031236.GAA13862@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/181.mcf:


---
Log message:

Directory /home/vadve/vadve/Research/DynOpt/CVSRepository/llvm/test/DSGraphs/181.mcf added to the repository


---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:07:45 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:07:45 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/Burg/Makefile
Message-ID: <200211031238.GAA14040@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/Burg:

Makefile added (r1.1)

---
Log message:

(null)

---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:07:54 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:07:54 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/255.vortex/
Message-ID: <200211031236.GAA13875@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/255.vortex:


---
Log message:

Directory /home/vadve/vadve/Research/DynOpt/CVSRepository/llvm/test/DSGraphs/255.vortex added to the repository


---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:08:04 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:08:04 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/Burg/
Message-ID: <200211031236.GAA13892@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/Burg:


---
Log message:

Directory /home/vadve/vadve/Research/DynOpt/CVSRepository/llvm/test/DSGraphs/Burg added to the repository


---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:08:14 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:08:14 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/256.bzip2/
Message-ID: <200211031236.GAA13882@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/256.bzip2:


---
Log message:

Directory /home/vadve/vadve/Research/DynOpt/CVSRepository/llvm/test/DSGraphs/256.bzip2 added to the repository


---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:08:23 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:08:23 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/llubenchmark/Makefile
Message-ID: <200211031238.GAA14072@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/llubenchmark:

Makefile added (r1.1)

---
Log message:

(null)

---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:08:33 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:08:33 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/Olden-bh/Makefile
Message-ID: <200211031238.GAA14097@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/Olden-bh:

Makefile added (r1.1)

---
Log message:

(null)

---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:08:43 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:08:43 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/Olden-em3d/Makefile
Message-ID: <200211031238.GAA14107@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/Olden-em3d:

Makefile added (r1.1)

---
Log message:

(null)

---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:08:52 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:08:52 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/lists/Makefile
Message-ID: <200211031238.GAA14061@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/lists:

Makefile added (r1.1)

---
Log message:

(null)

---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:09:03 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:09:03 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/Olden-bisort/Makefile
Message-ID: <200211031238.GAA14102@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/Olden-bisort:

Makefile added (r1.1)

---
Log message:

(null)

---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:09:12 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:09:12 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/matrixTranspose/Makefile
Message-ID: <200211031238.GAA14082@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/matrixTranspose:

Makefile added (r1.1)

---
Log message:

(null)

---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:09:21 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:09:21 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/Olden-perimeter/Makefile
Message-ID: <200211031238.GAA14122@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/Olden-perimeter:

Makefile added (r1.1)

---
Log message:

(null)

---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:09:30 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:09:30 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/Olden-power/Makefile
Message-ID: <200211031238.GAA14125@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/Olden-power:

Makefile added (r1.1)

---
Log message:

(null)

---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:09:39 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:09:39 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/heapsort/Makefile
Message-ID: <200211031238.GAA14053@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/heapsort:

Makefile added (r1.1)

---
Log message:

(null)

---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:09:49 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:09:49 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/objinst/Makefile
Message-ID: <200211031238.GAA14092@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/objinst:

Makefile added (r1.1)

---
Log message:

(null)

---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:09:59 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:09:59 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/methcall/Makefile
Message-ID: <200211031238.GAA14087@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/methcall:

Makefile added (r1.1)

---
Log message:

(null)

---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:10:09 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:10:09 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/sgefa/Makefile
Message-ID: <200211031238.GAA14167@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/sgefa:

Makefile added (r1.1)

---
Log message:

(null)

---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:10:18 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:10:18 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/Olden-mst/Makefile
Message-ID: <200211031238.GAA14117@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/Olden-mst:

Makefile added (r1.1)

---
Log message:

(null)

---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:10:26 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:10:26 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/hello/Makefile
Message-ID: <200211031238.GAA14058@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/hello:

Makefile added (r1.1)

---
Log message:

(null)

---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:10:34 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:10:34 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/Olden-voronoi/Makefile
Message-ID: <200211031238.GAA14140@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/Olden-voronoi:

Makefile added (r1.1)

---
Log message:

(null)

---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:10:43 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:10:43 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/sumarray2d/Makefile
Message-ID: <200211031238.GAA14182@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/sumarray2d:

Makefile added (r1.1)

---
Log message:

(null)

---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:10:51 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:10:51 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/hash/Makefile
Message-ID: <200211031238.GAA14048@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/hash:

Makefile added (r1.1)

---
Log message:

(null)

---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:11:00 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:11:00 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/sumarraymalloc/Makefile
Message-ID: <200211031238.GAA14192@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/sumarraymalloc:

Makefile added (r1.1)

---
Log message:

(null)

---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:11:08 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:11:08 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/Olden-health/Makefile
Message-ID: <200211031238.GAA14112@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/Olden-health:

Makefile added (r1.1)

---
Log message:

(null)

---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:11:16 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:11:16 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/Olden-treeadd/Makefile
Message-ID: <200211031238.GAA14130@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/Olden-treeadd:

Makefile added (r1.1)

---
Log message:

(null)

---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:11:25 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:11:25 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/Olden-tsp/Makefile
Message-ID: <200211031238.GAA14137@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/Olden-tsp:

Makefile added (r1.1)

---
Log message:

(null)

---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:11:33 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:11:33 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/pi/Makefile
Message-ID: <200211031238.GAA14152@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/pi:

Makefile added (r1.1)

---
Log message:

(null)

---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:11:42 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:11:42 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/printargs/Makefile
Message-ID: <200211031238.GAA14157@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/printargs:

Makefile added (r1.1)

---
Log message:

(null)

---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:11:50 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:11:50 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/random/Makefile
Message-ID: <200211031238.GAA14162@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/random:

Makefile added (r1.1)

---
Log message:

(null)

---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:11:59 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:11:59 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/sieve/Makefile
Message-ID: <200211031238.GAA14170@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/sieve:

Makefile added (r1.1)

---
Log message:

(null)

---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:12:07 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:12:07 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/OptimizerEval/Makefile
Message-ID: <200211031238.GAA14147@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/OptimizerEval:

Makefile added (r1.1)

---
Log message:

(null)

---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:12:16 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:12:16 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/sim/Makefile
Message-ID: <200211031238.GAA14173@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/sim:

Makefile added (r1.1)

---
Log message:

(null)

---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:12:24 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:12:24 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/sumarray/Makefile
Message-ID: <200211031238.GAA14185@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/sumarray:

Makefile added (r1.1)

---
Log message:

(null)

---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:12:33 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:12:33 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/test_indvars/Makefile
Message-ID: <200211031238.GAA14195@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/test_indvars:

Makefile added (r1.1)

---
Log message:

(null)

---
Diffs of the changes:



From vadve at cs.uiuc.edu  Sun Nov  3 09:13:01 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 09:13:01 2002
Subject: [llvm-commits] CVS: llvm/tools/gccas/gccas.cpp
Message-ID: <200211031242.GAA14273@psmith.cs.uiuc.edu>


Changes in directory llvm/tools/gccas:

gccas.cpp updated: 1.53 -> 1.54

---
Log message:

Disable correlated expressions pass until it is reliable.


---
Diffs of the changes:

Index: llvm/tools/gccas/gccas.cpp
diff -u llvm/tools/gccas/gccas.cpp:1.53 llvm/tools/gccas/gccas.cpp:1.54
--- llvm/tools/gccas/gccas.cpp:1.53	Thu Oct 31 11:13:11 2002
+++ llvm/tools/gccas/gccas.cpp	Sun Nov  3 06:41:50 2002
@@ -76,7 +76,7 @@
   addPass(PM, createInstructionCombiningPass()); // Combine silly seq's
   addPass(PM, createPromoteMemoryToRegister());  // Promote alloca's to regs
   addPass(PM, createReassociatePass());          // Reassociate expressions
-  addPass(PM, createCorrelatedExpressionEliminationPass());// Kill corr branches
+  //addPass(PM, createCorrelatedExpressionEliminationPass());// Kill corr branches
   addPass(PM, createInstructionCombiningPass()); // Combine silly seq's
   addPass(PM, createCFGSimplificationPass());    // Merge & remove BBs
   addPass(PM, createLICMPass());                 // Hoist loop invariants




From vadve at cs.uiuc.edu  Sun Nov  3 11:25:01 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 11:25:01 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/Makefile.DSGraphs
Message-ID: <200211031501.JAA15184@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs:

Makefile.DSGraphs updated: 1.1 -> 1.2

---
Log message:

Improve rule for clean to delete .bc file copy and analyze*.out.


---
Diffs of the changes:

Index: llvm/test/DSGraphs/Makefile.DSGraphs
diff -u llvm/test/DSGraphs/Makefile.DSGraphs:1.1 llvm/test/DSGraphs/Makefile.DSGraphs:1.2
--- llvm/test/DSGraphs/Makefile.DSGraphs:1.1	Sun Nov  3 06:37:14 2002
+++ llvm/test/DSGraphs/Makefile.DSGraphs	Sun Nov  3 09:01:20 2002
@@ -1,4 +1,4 @@
-## $Id: Makefile.DSGraphs,v 1.1 2002/11/03 12:37:14 vadve Exp $
+## $Id: Makefile.DSGraphs,v 1.2 2002/11/03 15:01:20 vadve Exp $
 ##---------------------------------------------------------------------------- 
 ## Common makefile rules for testing DSGraph analysis.
 ## 
@@ -32,4 +32,4 @@
 	dot -Tps < $(PASS).main.dot > $@
 
 clean::
-	/bin/rm -f core* *.dot *.ps *.lib.bc
+	/bin/rm -f core* *.dot *.ps *.lib.bc *.analyze*.out $(PROG)




From vadve at cs.uiuc.edu  Sun Nov  3 11:56:01 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 11:56:01 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/Makefile Makefile.DSGraphs
Message-ID: <200211031531.JAA16074@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs:

Makefile updated: 1.1 -> 1.2
Makefile.DSGraphs updated: 1.2 -> 1.3

---
Log message:

Fail gracefully if bytecode file $(PROGSOURCE) does not exist.


---
Diffs of the changes:

Index: llvm/test/DSGraphs/Makefile
diff -u llvm/test/DSGraphs/Makefile:1.1 llvm/test/DSGraphs/Makefile:1.2
--- llvm/test/DSGraphs/Makefile:1.1	Sun Nov  3 06:37:14 2002
+++ llvm/test/DSGraphs/Makefile	Sun Nov  3 09:31:45 2002
@@ -1,6 +1,6 @@
 LEVEL = ../..
 
-DIRS  = \
+PARALLEL_DIRS  = \
 	ackermann \
 	ary3 \
 	fib2 \


Index: llvm/test/DSGraphs/Makefile.DSGraphs
diff -u llvm/test/DSGraphs/Makefile.DSGraphs:1.2 llvm/test/DSGraphs/Makefile.DSGraphs:1.3
--- llvm/test/DSGraphs/Makefile.DSGraphs:1.2	Sun Nov  3 09:01:20 2002
+++ llvm/test/DSGraphs/Makefile.DSGraphs	Sun Nov  3 09:31:45 2002
@@ -1,4 +1,4 @@
-## $Id: Makefile.DSGraphs,v 1.2 2002/11/03 15:01:20 vadve Exp $
+## $Id: Makefile.DSGraphs,v 1.3 2002/11/03 15:31:45 vadve Exp $
 ##---------------------------------------------------------------------------- 
 ## Common makefile rules for testing DSGraph analysis.
 ## 
@@ -16,7 +16,11 @@
 	llvmgcc -c $<
 
 $(PROG): $(PROGPATH)
-	/bin/cp -p $(PROGPATH) $(PROG)
+	test -f $(PROGPATH) && /bin/cp -p $(PROGPATH) $(PROG)
+
+ $(PROGPATH):
+	@echo "Bytecode file does not exist: Ignoring test $(PROG)."
+	@exit 1	## force make to discontinue
 
 .PRECIOUS: %.lib.bc
 




From lattner at cs.uiuc.edu  Sun Nov  3 12:43:01 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sun Nov  3 12:43:01 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/Makefile
Message-ID: <200211031842.MAA18324@apoc.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs:

Makefile updated: 1.2 -> 1.3

---
Log message:

Make sure to build dummylib.o before making subdirectories


---
Diffs of the changes:

Index: llvm/test/DSGraphs/Makefile
diff -u llvm/test/DSGraphs/Makefile:1.2 llvm/test/DSGraphs/Makefile:1.3
--- llvm/test/DSGraphs/Makefile:1.2	Sun Nov  3 09:31:45 2002
+++ llvm/test/DSGraphs/Makefile	Sun Nov  3 12:42:28 2002
@@ -43,4 +43,9 @@
 	300.twolf \
 	Burg
 
+all:: dummylib.o
+
 include ../Makefile.tests
+
+dummylib.o: dummylib.c $(LCC1)
+	$(LCC) $< -c




From vadve at cs.uiuc.edu  Sun Nov  3 12:56:01 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 12:56:01 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/Makefile.DSGraphs
Message-ID: <200211031632.KAA16633@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs:

Makefile.DSGraphs updated: 1.3 -> 1.4

---
Log message:

Make sure dummylib.o is rebuilt when running an individual test manually.


---
Diffs of the changes:

Index: llvm/test/DSGraphs/Makefile.DSGraphs
diff -u llvm/test/DSGraphs/Makefile.DSGraphs:1.3 llvm/test/DSGraphs/Makefile.DSGraphs:1.4
--- llvm/test/DSGraphs/Makefile.DSGraphs:1.3	Sun Nov  3 09:31:45 2002
+++ llvm/test/DSGraphs/Makefile.DSGraphs	Sun Nov  3 10:32:31 2002
@@ -1,4 +1,4 @@
-## $Id: Makefile.DSGraphs,v 1.3 2002/11/03 15:31:45 vadve Exp $
+## $Id: Makefile.DSGraphs,v 1.4 2002/11/03 16:32:31 vadve Exp $
 ##---------------------------------------------------------------------------- 
 ## Common makefile rules for testing DSGraph analysis.
 ## 
@@ -13,7 +13,7 @@
 PASS = td
 
 ../dummylib.o: ../dummylib.c
-	llvmgcc -c $<
+	cd ..; $(MAKE) dummylib.o
 
 $(PROG): $(PROGPATH)
 	test -f $(PROGPATH) && /bin/cp -p $(PROGPATH) $(PROG)




From lattner at cs.uiuc.edu  Sun Nov  3 13:25:00 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sun Nov  3 13:25:00 2002
Subject: [llvm-commits] CVS: llvm/lib/Reoptimizer/LightWtProfiling/Trigger/FirstTrigger.cpp
Message-ID: <200211031924.NAA20104@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Reoptimizer/LightWtProfiling/Trigger:

FirstTrigger.cpp updated: 1.1 -> 1.2

---
Log message:

Make this code almost compile


---
Diffs of the changes:

Index: llvm/lib/Reoptimizer/LightWtProfiling/Trigger/FirstTrigger.cpp
diff -u llvm/lib/Reoptimizer/LightWtProfiling/Trigger/FirstTrigger.cpp:1.1 llvm/lib/Reoptimizer/LightWtProfiling/Trigger/FirstTrigger.cpp:1.2
--- llvm/lib/Reoptimizer/LightWtProfiling/Trigger/FirstTrigger.cpp:1.1	Sat Nov  2 19:48:02 2002
+++ llvm/lib/Reoptimizer/LightWtProfiling/Trigger/FirstTrigger.cpp	Sun Nov  3 13:24:28 2002
@@ -10,7 +10,8 @@
 #include "llvm/Reoptimizer/VirtualMem.h"
 #include "llvm/Reoptimizer/InstrUtils.h"
 #include 
-#include 
+#include 
+//#include 
 #include 
 
 int reopt_threshold;




From lattner at cs.uiuc.edu  Sun Nov  3 13:26:01 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sun Nov  3 13:26:01 2002
Subject: [llvm-commits] CVS: llvm/include/llvm/Reoptimizer/InstLoops.h
Message-ID: <200211031925.NAA20310@apoc.cs.uiuc.edu>


Changes in directory llvm/include/llvm/Reoptimizer:

InstLoops.h added (r1.1)

---
Log message:

Check in header file that was missing, thus broke the build


---
Diffs of the changes:



From lattner at cs.uiuc.edu  Sun Nov  3 13:28:01 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sun Nov  3 13:28:01 2002
Subject: [llvm-commits] CVS: llvm/lib/Reoptimizer/LightWtProfiling/Trigger/FirstTrigger.cpp
Message-ID: <200211031927.NAA21053@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Reoptimizer/LightWtProfiling/Trigger:

FirstTrigger.cpp updated: 1.2 -> 1.3

---
Log message:

Hack to make build work successfully on x86


---
Diffs of the changes:

Index: llvm/lib/Reoptimizer/LightWtProfiling/Trigger/FirstTrigger.cpp
diff -u llvm/lib/Reoptimizer/LightWtProfiling/Trigger/FirstTrigger.cpp:1.2 llvm/lib/Reoptimizer/LightWtProfiling/Trigger/FirstTrigger.cpp:1.3
--- llvm/lib/Reoptimizer/LightWtProfiling/Trigger/FirstTrigger.cpp:1.2	Sun Nov  3 13:24:28 2002
+++ llvm/lib/Reoptimizer/LightWtProfiling/Trigger/FirstTrigger.cpp	Sun Nov  3 13:27:17 2002
@@ -11,7 +11,7 @@
 #include "llvm/Reoptimizer/InstrUtils.h"
 #include 
 #include 
-//#include 
+#include 
 #include 
 
 int reopt_threshold;
@@ -22,14 +22,14 @@
 static struct timeval llvm_trigger_time;
 
 extern "C" void llvm_time_start(){
-  gettimeofday(&llvm_trace_time, (void *)0);
+  gettimeofday(&llvm_trace_time, 0);
 }
 
 extern "C" void llvm_time_end(){
   static std::ofstream f_out("llvm_last_run");
 
   struct timeval time_end;
-  gettimeofday(&time_end, (void *)0);
+  gettimeofday(&time_end, 0);
   
   long time = (time_end.tv_sec - llvm_trace_time.tv_sec)*1000000 + 
     (time_end.tv_usec - llvm_trace_time.tv_usec);
@@ -38,14 +38,14 @@
 }
 
 void llvm_trigger_time_start(){
-  gettimeofday(&llvm_trigger_time, (void *)0);
+  gettimeofday(&llvm_trigger_time, 0);
 }
 
 void llvm_trigger_time_end(){
   static std::ofstream f_out("llvm_trigger_last_run");
     
   struct timeval time_end;
-  gettimeofday(&time_end, (void *)0);
+  gettimeofday(&time_end, 0);
   
   long time = (time_end.tv_sec - llvm_trigger_time.tv_sec)*1000000 + 
     (time_end.tv_usec - llvm_trigger_time.tv_usec);
@@ -78,7 +78,9 @@
 
   std::cerr<<"Count = "<<*cnt<<"\n";
 
+#if 0   // FIXME: This breaks x86 build
   asm("add %%i7, %1, %0":"=r"(brAddr):"i" (0));
+#endif
 
   unsigned int brInst = vm->readInstrFrmVm(brAddr+8);
   assert(isBranchInstr(brInst) && "Not a branch!");




From lattner at cs.uiuc.edu  Sun Nov  3 13:47:01 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sun Nov  3 13:47:01 2002
Subject: [llvm-commits] CVS: llvm/lib/Analysis/DataStructure/Printer.cpp
Message-ID: <200211031946.NAA21102@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Analysis/DataStructure:

Printer.cpp updated: 1.29 -> 1.30

---
Log message:

Change the letters used to represent stack and heap allocations to "S" and "H" 
respectively.  This is to make presentation easier in the paper.


---
Diffs of the changes:

Index: llvm/lib/Analysis/DataStructure/Printer.cpp
diff -u llvm/lib/Analysis/DataStructure/Printer.cpp:1.29 llvm/lib/Analysis/DataStructure/Printer.cpp:1.30
--- llvm/lib/Analysis/DataStructure/Printer.cpp:1.29	Fri Nov  1 18:36:02 2002
+++ llvm/lib/Analysis/DataStructure/Printer.cpp	Sun Nov  3 13:46:15 2002
@@ -36,8 +36,8 @@
     OS << "\n";
   }
 
-  if (N->NodeType & DSNode::AllocaNode ) OS << "A";
-  if (N->NodeType & DSNode::NewNode    ) OS << "N";
+  if (N->NodeType & DSNode::AllocaNode ) OS << "S";
+  if (N->NodeType & DSNode::NewNode    ) OS << "H";
   if (N->NodeType & DSNode::GlobalNode ) OS << "G";
   if (N->NodeType & DSNode::UnknownNode) OS << "U";
   if (N->NodeType & DSNode::Incomplete ) OS << "I";




From ashukla at cs.uiuc.edu  Sun Nov  3 14:53:01 2002
From: ashukla at cs.uiuc.edu (Anand Shukla)
Date: Sun Nov  3 14:53:01 2002
Subject: [llvm-commits] CVS: llvm/lib/Reoptimizer/Makefile
Message-ID: <200211032052.OAA14559@trinity.cs.uiuc.edu>


Changes in directory llvm/lib/Reoptimizer:

Makefile updated: 1.7 -> 1.8

---
Log message:

Removed LightWtProfiling from default comilation


---
Diffs of the changes:

Index: llvm/lib/Reoptimizer/Makefile
diff -u llvm/lib/Reoptimizer/Makefile:1.7 llvm/lib/Reoptimizer/Makefile:1.8
--- llvm/lib/Reoptimizer/Makefile:1.7	Sat Nov  2 19:43:25 2002
+++ llvm/lib/Reoptimizer/Makefile	Sun Nov  3 14:52:39 2002
@@ -1,4 +1,4 @@
 
 LEVEL = ../..
-DIRS = Mapping TraceCache LightWtProfiling
+DIRS = Mapping TraceCache
 include $(LEVEL)/Makefile.common




From lattner at cs.uiuc.edu  Sun Nov  3 15:25:00 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sun Nov  3 15:25:00 2002
Subject: [llvm-commits] CVS: llvm/include/llvm/Analysis/DSNode.h
Message-ID: <200211032124.PAA22764@apoc.cs.uiuc.edu>


Changes in directory llvm/include/llvm/Analysis:

DSNode.h updated: 1.5 -> 1.6

---
Log message:

Rename NewNode flag to HeapNode


---
Diffs of the changes:

Index: llvm/include/llvm/Analysis/DSNode.h
diff -u llvm/include/llvm/Analysis/DSNode.h:1.5 llvm/include/llvm/Analysis/DSNode.h:1.6
--- llvm/include/llvm/Analysis/DSNode.h:1.5	Sat Nov  2 15:18:53 2002
+++ llvm/include/llvm/Analysis/DSNode.h	Sun Nov  3 15:23:56 2002
@@ -63,7 +63,7 @@
   enum NodeTy {
     ShadowNode  = 0,        // Nothing is known about this node...
     AllocaNode  = 1 << 0,   // This node was allocated with alloca
-    NewNode     = 1 << 1,   // This node was allocated with malloc
+    HeapNode    = 1 << 1,   // This node was allocated with malloc
     GlobalNode  = 1 << 2,   // This node was allocated by a global var decl
     UnknownNode = 1 << 3,   // This node points to unknown allocated memory 
     Incomplete  = 1 << 4,   // This node may not be complete




From lattner at cs.uiuc.edu  Sun Nov  3 15:25:09 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sun Nov  3 15:25:09 2002
Subject: [llvm-commits] CVS: llvm/lib/Analysis/DataStructure/DataStructure.cpp Local.cpp Printer.cpp
Message-ID: <200211032124.PAA22775@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Analysis/DataStructure:

DataStructure.cpp updated: 1.38 -> 1.39
Local.cpp updated: 1.25 -> 1.26
Printer.cpp updated: 1.30 -> 1.31

---
Log message:

Rename NewNode flag to HeapNode


---
Diffs of the changes:

Index: llvm/lib/Analysis/DataStructure/DataStructure.cpp
diff -u llvm/lib/Analysis/DataStructure/DataStructure.cpp:1.38 llvm/lib/Analysis/DataStructure/DataStructure.cpp:1.39
--- llvm/lib/Analysis/DataStructure/DataStructure.cpp:1.38	Fri Nov  1 18:13:20 2002
+++ llvm/lib/Analysis/DataStructure/DataStructure.cpp	Sun Nov  3 15:24:04 2002
@@ -1003,10 +1003,11 @@
   }
 }
 
+#if 0
 // Bits used in the next function
-static const char ExternalTypeBits = DSNode::GlobalNode | DSNode::NewNode;
+static const char ExternalTypeBits = DSNode::GlobalNode | DSNode::HeapNode;
+
 
-#if 0
 // GlobalDSGraph::cloneNodeInto - Clone a global node and all its externally
 // visible target links (and recursively their such links) into this graph.
 // NodeCache maps the node being cloned to its clone in the Globals graph,


Index: llvm/lib/Analysis/DataStructure/Local.cpp
diff -u llvm/lib/Analysis/DataStructure/Local.cpp:1.25 llvm/lib/Analysis/DataStructure/Local.cpp:1.26
--- llvm/lib/Analysis/DataStructure/Local.cpp:1.25	Fri Nov  1 18:36:02 2002
+++ llvm/lib/Analysis/DataStructure/Local.cpp	Sun Nov  3 15:24:04 2002
@@ -84,7 +84,7 @@
   private:
     // Visitor functions, used to handle each instruction type we encounter...
     friend class InstVisitor;
-    void visitMallocInst(MallocInst &MI) { handleAlloc(MI, DSNode::NewNode); }
+    void visitMallocInst(MallocInst &MI) { handleAlloc(MI, DSNode::HeapNode); }
     void visitAllocaInst(AllocaInst &AI) { handleAlloc(AI, DSNode::AllocaNode);}
     void handleAlloc(AllocationInst &AI, DSNode::NodeTy NT);
 


Index: llvm/lib/Analysis/DataStructure/Printer.cpp
diff -u llvm/lib/Analysis/DataStructure/Printer.cpp:1.30 llvm/lib/Analysis/DataStructure/Printer.cpp:1.31
--- llvm/lib/Analysis/DataStructure/Printer.cpp:1.30	Sun Nov  3 13:46:15 2002
+++ llvm/lib/Analysis/DataStructure/Printer.cpp	Sun Nov  3 15:24:04 2002
@@ -37,7 +37,7 @@
   }
 
   if (N->NodeType & DSNode::AllocaNode ) OS << "S";
-  if (N->NodeType & DSNode::NewNode    ) OS << "H";
+  if (N->NodeType & DSNode::HeapNode   ) OS << "H";
   if (N->NodeType & DSNode::GlobalNode ) OS << "G";
   if (N->NodeType & DSNode::UnknownNode) OS << "U";
   if (N->NodeType & DSNode::Incomplete ) OS << "I";




From lattner at cs.uiuc.edu  Sun Nov  3 15:28:00 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sun Nov  3 15:28:00 2002
Subject: [llvm-commits] CVS: llvm/include/llvm/Analysis/DSGraph.h
Message-ID: <200211032127.PAA22859@apoc.cs.uiuc.edu>


Changes in directory llvm/include/llvm/Analysis:

DSGraph.h updated: 1.24 -> 1.25

---
Log message:

Rename ValueMap to ScalarMap


---
Diffs of the changes:

Index: llvm/include/llvm/Analysis/DSGraph.h
diff -u llvm/include/llvm/Analysis/DSGraph.h:1.24 llvm/include/llvm/Analysis/DSGraph.h:1.25
--- llvm/include/llvm/Analysis/DSGraph.h:1.24	Thu Oct 31 15:24:10 2002
+++ llvm/include/llvm/Analysis/DSGraph.h	Sun Nov  3 15:27:46 2002
@@ -16,7 +16,7 @@
   Function *Func;
   std::vector Nodes;
   DSNodeHandle RetNode;                          // Node that gets returned...
-  std::map ValueMap;
+  std::map ScalarMap;
 
 #if 0
   // GlobalsGraph -- Reference to the common graph of globally visible objects.
@@ -58,11 +58,11 @@
   ///
   void addNode(DSNode *N) { Nodes.push_back(N); }
 
-  /// getValueMap - Get a map that describes what the nodes the scalars in this
+  /// getScalarMap - Get a map that describes what the nodes the scalars in this
   /// function point to...
   ///
-  std::map &getValueMap() { return ValueMap; }
-  const std::map &getValueMap() const { return ValueMap;}
+  std::map &getScalarMap() { return ScalarMap; }
+  const std::map &getScalarMap() const {return ScalarMap;}
 
   std::vector &getFunctionCalls() {
     return FunctionCalls;
@@ -74,7 +74,7 @@
   /// getNodeForValue - Given a value that is used or defined in the body of the
   /// current function, return the DSNode that it points to.
   ///
-  DSNodeHandle &getNodeForValue(Value *V) { return ValueMap[V]; }
+  DSNodeHandle &getNodeForValue(Value *V) { return ScalarMap[V]; }
 
   const DSNodeHandle &getRetNode() const { return RetNode; }
         DSNodeHandle &getRetNode()       { return RetNode; }
@@ -119,10 +119,10 @@
   void removeDeadNodes(bool KeepAllGlobals = false, bool KeepCalls = true);
 
   // cloneInto - Clone the specified DSGraph into the current graph, returning
-  // the Return node of the graph.  The translated ValueMap for the old function
-  // is filled into the OldValMap member.
-  // If StripScalars (StripAllocas) is set to true, Scalar (Alloca) markers
-  // are removed from the graph as the graph is being cloned.
+  // the Return node of the graph.  The translated ScalarMap for the old
+  // function is filled into the OldValMap member.  If StripScalars
+  // (StripAllocas) is set to true, Scalar (Alloca) markers are removed from the
+  // graph as the graph is being cloned.
   //
   DSNodeHandle cloneInto(const DSGraph &G,
                          std::map &OldValMap,
@@ -135,8 +135,8 @@
   // 
   DSNode* cloneGlobalInto(const DSNode* GNode);
   DSNode* cloneGlobalInto(GlobalValue* GV) {
-    assert(!GV || (((DSGraph*) GlobalsGraph)->ValueMap[GV] != 0));
-    return GV? cloneGlobalInto(((DSGraph*) GlobalsGraph)->ValueMap[GV]) : 0;
+    assert(!GV || (((DSGraph*) GlobalsGraph)->ScalarMap[GV] != 0));
+    return GV? cloneGlobalInto(((DSGraph*) GlobalsGraph)->ScalarMap[GV]) : 0;
   }
 #endif
 




From lattner at cs.uiuc.edu  Sun Nov  3 15:28:09 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sun Nov  3 15:28:09 2002
Subject: [llvm-commits] CVS: llvm/lib/Analysis/DataStructure/BottomUpClosure.cpp DataStructure.cpp Local.cpp Printer.cpp Steensgaard.cpp
Message-ID: <200211032127.PAA22874@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Analysis/DataStructure:

BottomUpClosure.cpp updated: 1.28 -> 1.29
DataStructure.cpp updated: 1.39 -> 1.40
Local.cpp updated: 1.26 -> 1.27
Printer.cpp updated: 1.31 -> 1.32
Steensgaard.cpp updated: 1.6 -> 1.7

---
Log message:

Rename ValueMap to ScalarMap



---
Diffs of the changes:

Index: llvm/lib/Analysis/DataStructure/BottomUpClosure.cpp
diff -u llvm/lib/Analysis/DataStructure/BottomUpClosure.cpp:1.28 llvm/lib/Analysis/DataStructure/BottomUpClosure.cpp:1.29
--- llvm/lib/Analysis/DataStructure/BottomUpClosure.cpp:1.28	Fri Nov  1 18:26:32 2002
+++ llvm/lib/Analysis/DataStructure/BottomUpClosure.cpp	Sun Nov  3 15:27:48 2002
@@ -56,7 +56,7 @@
 // call.
 //
 static void ResolveArguments(DSCallSite &Call, Function &F,
-                             map &ValueMap) {
+                             map &ScalarMap) {
   // Resolve all of the function arguments...
   Function::aiterator AI = F.abegin();
   for (unsigned i = 0, e = Call.getNumPtrArgs(); i != e; ++i, ++AI) {
@@ -64,7 +64,7 @@
     while (!isPointerType(AI->getType())) ++AI;
     
     // Add the link from the argument scalar to the provided value
-    ValueMap[AI].mergeWith(Call.getPtrArg(i));
+    ScalarMap[AI].mergeWith(Call.getPtrArg(i));
   }
 }
 
@@ -118,7 +118,7 @@
             Graph->getRetNode().mergeWith(Call.getRetVal());
 
             // Resolve the arguments in the call to the actual values...
-            ResolveArguments(Call, F, Graph->getValueMap());
+            ResolveArguments(Call, F, Graph->getScalarMap());
 
             // Erase the entry in the callees vector
             Callees.erase(Callees.begin()+c--);


Index: llvm/lib/Analysis/DataStructure/DataStructure.cpp
diff -u llvm/lib/Analysis/DataStructure/DataStructure.cpp:1.39 llvm/lib/Analysis/DataStructure/DataStructure.cpp:1.40
--- llvm/lib/Analysis/DataStructure/DataStructure.cpp:1.39	Sun Nov  3 15:24:04 2002
+++ llvm/lib/Analysis/DataStructure/DataStructure.cpp	Sun Nov  3 15:27:48 2002
@@ -488,17 +488,17 @@
 
 DSGraph::DSGraph(const DSGraph &G) : Func(G.Func) {
   std::map NodeMap;
-  RetNode = cloneInto(G, ValueMap, NodeMap);
+  RetNode = cloneInto(G, ScalarMap, NodeMap);
 }
 
 DSGraph::DSGraph(const DSGraph &G, std::map &NodeMap)
   : Func(G.Func) {
-  RetNode = cloneInto(G, ValueMap, NodeMap);
+  RetNode = cloneInto(G, ScalarMap, NodeMap);
 }
 
 DSGraph::~DSGraph() {
   FunctionCalls.clear();
-  ValueMap.clear();
+  ScalarMap.clear();
   RetNode.setNode(0);
 
 #ifndef NDEBUG
@@ -536,7 +536,7 @@
 
 
 // cloneInto - Clone the specified DSGraph into the current graph, returning the
-// Return node of the graph.  The translated ValueMap for the old function is
+// Return node of the graph.  The translated ScalarMap for the old function is
 // filled into the OldValMap member.  If StripAllocas is set to true, Alloca
 // markers are removed from the graph, as the graph is being cloned into a
 // calling function's graph.
@@ -570,18 +570,18 @@
       Nodes[i]->NodeType &= ~StripBits;
 
   // Copy the value map... and merge all of the global nodes...
-  for (std::map::const_iterator I = G.ValueMap.begin(),
-         E = G.ValueMap.end(); I != E; ++I) {
+  for (std::map::const_iterator I = G.ScalarMap.begin(),
+         E = G.ScalarMap.end(); I != E; ++I) {
     DSNodeHandle &H = OldValMap[I->first];
     H.setNode(OldNodeMap[I->second.getNode()]);
     H.setOffset(I->second.getOffset());
 
     if (isa(I->first)) {  // Is this a global?
-      std::map::iterator GVI = ValueMap.find(I->first);
-      if (GVI != ValueMap.end()) {   // Is the global value in this fun already?
+      std::map::iterator GVI = ScalarMap.find(I->first);
+      if (GVI != ScalarMap.end()) {   // Is the global value in this fn already?
         GVI->second.mergeWith(H);
       } else {
-        ValueMap[I->first] = H;      // Add global pointer to this graph
+        ScalarMap[I->first] = H;      // Add global pointer to this graph
       }
     }
   }
@@ -601,7 +601,7 @@
   if (GNode == 0 || GNode->getGlobals().size() == 0) return 0;
 
   // If a clone has already been created for GNode, return it.
-  DSNodeHandle& ValMapEntry = ValueMap[GNode->getGlobals()[0]];
+  DSNodeHandle& ValMapEntry = ScalarMap[GNode->getGlobals()[0]];
   if (ValMapEntry != 0)
     return ValMapEntry;
 
@@ -610,7 +610,7 @@
   ValMapEntry = NewNode;                // j=0 case of loop below!
   Nodes.push_back(NewNode);
   for (unsigned j = 1, N = NewNode->getGlobals().size(); j < N; ++j)
-    ValueMap[NewNode->getGlobals()[j]] = NewNode;
+    ScalarMap[NewNode->getGlobals()[j]] = NewNode;
 
   // Rewrite the links in the new node to point into the current graph.
   for (unsigned j = 0, e = GNode->getNumLinks(); j != e; ++j)
@@ -655,8 +655,8 @@
   // Mark any incoming arguments as incomplete...
   if (markFormalArgs && Func)
     for (Function::aiterator I = Func->abegin(), E = Func->aend(); I != E; ++I)
-      if (isPointerType(I->getType()) && ValueMap.find(I) != ValueMap.end())
-        markIncompleteNode(ValueMap[I].getNode());
+      if (isPointerType(I->getType()) && ScalarMap.find(I) != ScalarMap.end())
+        markIncompleteNode(ScalarMap[I].getNode());
 
   // Mark stuff passed into functions calls as being incomplete...
   for (unsigned i = 0, e = FunctionCalls.size(); i != e; ++i) {
@@ -681,13 +681,13 @@
 }
 
 // removeRefsToGlobal - Helper function that removes globals from the
-// ValueMap so that the referrer count will go down to zero.
+// ScalarMap so that the referrer count will go down to zero.
 static void removeRefsToGlobal(DSNode* N,
-                               std::map &ValueMap) {
+                               std::map &ScalarMap) {
   while (!N->getGlobals().empty()) {
     GlobalValue *GV = N->getGlobals().back();
     N->getGlobals().pop_back();      
-    ValueMap.erase(GV);
+    ScalarMap.erase(GV);
   }
 }
 
@@ -705,9 +705,9 @@
   if ((N->NodeType & ~DSNode::GlobalNode) == 0 && N->getSize() == 0 &&
       N->getReferrers().size() == N->getGlobals().size()) {
 
-    // Remove the globals from the ValueMap, so that the referrer count will go
+    // Remove the globals from the ScalarMap, so that the referrer count will go
     // down to zero.
-    removeRefsToGlobal(N, ValueMap);
+    removeRefsToGlobal(N, ScalarMap);
     assert(N->getReferrers().empty() && "Referrers should all be gone now!");
     return true;
   }
@@ -881,11 +881,11 @@
   // This would be a simple iterative loop if function calls were real nodes!
   markGlobalsIteration(GlobalNodes, Calls, Alive, FilterCalls);
 
-  // Free up references to dead globals from the ValueMap
+  // Free up references to dead globals from the ScalarMap
   std::set::iterator I = GlobalNodes.begin(), E = GlobalNodes.end();
   for( ; I != E; ++I)
     if (Alive.count(*I) == 0)
-      removeRefsToGlobal(*I, G.getValueMap());
+      removeRefsToGlobal(*I, G.getScalarMap());
 
   // Delete dead function calls
   if (FilterCalls)
@@ -927,13 +927,13 @@
     }
 
   // Mark all nodes reachable by scalar nodes as alive...
-  for (std::map::iterator I = ValueMap.begin(),
-         E = ValueMap.end(); I != E; ++I)
+  for (std::map::iterator I = ScalarMap.begin(),
+         E = ScalarMap.end(); I != E; ++I)
     markAlive(I->second.getNode(), Alive);
 
 #if 0
   // Marge all nodes reachable by global nodes, as alive.  Isn't this covered by
-  // the ValueMap?
+  // the ScalarMap?
   //
   if (KeepAllGlobals)
     for (unsigned i = 0, e = Nodes.size(); i != e; ++i)
@@ -1039,7 +1039,7 @@
   // an identical list of globals and return it if it exists.
   //
   for (unsigned j = 0, N = OldNode->getGlobals().size(); j != N; ++j)
-    if (DSNode *PrevNode = ValueMap[OldNode->getGlobals()[j]].getNode()) {
+    if (DSNode *PrevNode = ScalarMap[OldNode->getGlobals()[j]].getNode()) {
       if (NewNode == 0) {
         NewNode = PrevNode;             // first existing node found
         if (GlobalsAreFinal && j == 0)
@@ -1051,11 +1051,11 @@
       else if (NewNode != PrevNode) {   // found another, different from prev
         // update ValMap *before* merging PrevNode into NewNode
         for (unsigned k = 0, NK = PrevNode->getGlobals().size(); k < NK; ++k)
-          ValueMap[PrevNode->getGlobals()[k]] = NewNode;
+          ScalarMap[PrevNode->getGlobals()[k]] = NewNode;
         NewNode->mergeWith(PrevNode);
       }
     } else if (NewNode != 0) {
-      ValueMap[OldNode->getGlobals()[j]] = NewNode; // add the merged node
+      ScalarMap[OldNode->getGlobals()[j]] = NewNode; // add the merged node
     }
 
   // If no existing node was found, clone the node and update the ValMap.
@@ -1065,7 +1065,7 @@
     for (unsigned j = 0, e = NewNode->getNumLinks(); j != e; ++j)
       NewNode->setLink(j, 0);
     for (unsigned j = 0, N = NewNode->getGlobals().size(); j < N; ++j)
-      ValueMap[NewNode->getGlobals()[j]] = NewNode;
+      ScalarMap[NewNode->getGlobals()[j]] = NewNode;
   }
   else
     NewNode->NodeType |= OldNode->NodeType; // Markers may be different!


Index: llvm/lib/Analysis/DataStructure/Local.cpp
diff -u llvm/lib/Analysis/DataStructure/Local.cpp:1.26 llvm/lib/Analysis/DataStructure/Local.cpp:1.27
--- llvm/lib/Analysis/DataStructure/Local.cpp:1.26	Sun Nov  3 15:24:04 2002
+++ llvm/lib/Analysis/DataStructure/Local.cpp	Sun Nov  3 15:27:48 2002
@@ -60,14 +60,14 @@
     DSGraph &G;
     vector &Nodes;
     DSNodeHandle &RetNode;               // Node that gets returned...
-    map &ValueMap;
+    map &ScalarMap;
     vector &FunctionCalls;
 
   public:
     GraphBuilder(DSGraph &g, vector &nodes, DSNodeHandle &retNode,
-                 map &vm,
+                 map &SM,
                  vector &fc)
-      : G(g), Nodes(nodes), RetNode(retNode), ValueMap(vm), FunctionCalls(fc) {
+      : G(g), Nodes(nodes), RetNode(retNode), ScalarMap(SM), FunctionCalls(fc) {
 
       // Create scalar nodes for all pointer arguments...
       for (Function::aiterator I = G.getFunction().abegin(),
@@ -112,7 +112,7 @@
       return N;
     }
 
-    /// setDestTo - Set the ValueMap entry for the specified value to point to
+    /// setDestTo - Set the ScalarMap entry for the specified value to point to
     /// the specified destination.  If the Value already points to a node, make
     /// sure to merge the two destinations together.
     ///
@@ -135,7 +135,7 @@
 // graph.
 DSGraph::DSGraph(Function &F) : Func(&F) {
   // Use the graph builder to construct the local version of the graph
-  GraphBuilder B(*this, Nodes, RetNode, ValueMap, FunctionCalls);
+  GraphBuilder B(*this, Nodes, RetNode, ScalarMap, FunctionCalls);
   markIncompleteNodes();
 }
 
@@ -155,7 +155,7 @@
     return 0;   // Constant doesn't point to anything.
   }
 
-  DSNodeHandle &NH = ValueMap[&V];
+  DSNodeHandle &NH = ScalarMap[&V];
   if (NH.getNode())
     return NH;     // Already have a node?  Just return it...
 
@@ -194,12 +194,12 @@
 }
 
 
-/// setDestTo - Set the ValueMap entry for the specified value to point to the
+/// setDestTo - Set the ScalarMap entry for the specified value to point to the
 /// specified destination.  If the Value already points to a node, make sure to
 /// merge the two destinations together.
 ///
 void GraphBuilder::setDestTo(Value &V, const DSNodeHandle &NH) {
-  DSNodeHandle &AINH = ValueMap[&V];
+  DSNodeHandle &AINH = ScalarMap[&V];
   if (AINH.getNode() == 0)   // Not pointing to anything yet?
     AINH = NH;               // Just point directly to NH
   else
@@ -224,7 +224,7 @@
 void GraphBuilder::visitPHINode(PHINode &PN) {
   if (!isPointerType(PN.getType())) return; // Only pointer PHIs
 
-  DSNodeHandle &PNDest = ValueMap[&PN];
+  DSNodeHandle &PNDest = ScalarMap[&PN];
   for (unsigned i = 0, e = PN.getNumIncomingValues(); i != e; ++i)
     PNDest.mergeWith(getValueDest(*PN.getIncomingValue(i)));
 }


Index: llvm/lib/Analysis/DataStructure/Printer.cpp
diff -u llvm/lib/Analysis/DataStructure/Printer.cpp:1.31 llvm/lib/Analysis/DataStructure/Printer.cpp:1.32
--- llvm/lib/Analysis/DataStructure/Printer.cpp:1.31	Sun Nov  3 15:24:04 2002
+++ llvm/lib/Analysis/DataStructure/Printer.cpp	Sun Nov  3 15:27:48 2002
@@ -86,7 +86,7 @@
   static void addCustomGraphFeatures(const DSGraph *G,
                                      GraphWriter &GW) {
     // Add scalar nodes to the graph...
-    const std::map &VM = G->getValueMap();
+    const std::map &VM = G->getScalarMap();
     for (std::map::const_iterator I = VM.begin();
          I != VM.end(); ++I)
       if (!isa(I->first)) {


Index: llvm/lib/Analysis/DataStructure/Steensgaard.cpp
diff -u llvm/lib/Analysis/DataStructure/Steensgaard.cpp:1.6 llvm/lib/Analysis/DataStructure/Steensgaard.cpp:1.7
--- llvm/lib/Analysis/DataStructure/Steensgaard.cpp:1.6	Fri Nov  1 11:34:23 2002
+++ llvm/lib/Analysis/DataStructure/Steensgaard.cpp	Sun Nov  3 15:27:48 2002
@@ -84,7 +84,7 @@
                                  const DSCallSite &Call,
                                  DSNodeHandle &RetVal) {
   assert(ResultGraph != 0 && "Result graph not allocated!");
-  std::map &ValMap = ResultGraph->getValueMap();
+  std::map &ValMap = ResultGraph->getScalarMap();
 
   // Handle the return value of the function...
   if (Call.getRetVal().getNode() && RetVal.getNode())
@@ -135,8 +135,9 @@
           RetValMap[I] = RetNode;
       }
 
-      // Incorporate the inlined Function's ValueMap into the global ValueMap...
-      std::map &GVM = ResultGraph->getValueMap();
+      // Incorporate the inlined Function's ScalarMap into the global
+      // ScalarMap...
+      std::map &GVM = ResultGraph->getScalarMap();
 
       while (!ValMap.empty()) { // Loop over value map, moving entries over...
         const std::pair &DSN = *ValMap.begin();
@@ -198,7 +199,7 @@
 AliasAnalysis::Result Steens::alias(const Value *V1, const Value *V2) const {
   assert(ResultGraph && "Result grcaph has not yet been computed!");
 
-  std::map &GVM = ResultGraph->getValueMap();
+  std::map &GVM = ResultGraph->getScalarMap();
 
   std::map::iterator I = GVM.find(const_cast(V1));
   if (I != GVM.end() && I->second.getNode()) {




From lattner at cs.uiuc.edu  Sun Nov  3 18:22:01 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sun Nov  3 18:22:01 2002
Subject: [llvm-commits] CVS: llvm/include/llvm/Analysis/CallGraph.h
Message-ID: <200211040021.SAA26572@apoc.cs.uiuc.edu>


Changes in directory llvm/include/llvm/Analysis:

CallGraph.h updated: 1.22 -> 1.23

---
Log message:

Allow the call graph to be called from analyze naturally with print implemented


---
Diffs of the changes:

Index: llvm/include/llvm/Analysis/CallGraph.h
diff -u llvm/include/llvm/Analysis/CallGraph.h:1.22 llvm/include/llvm/Analysis/CallGraph.h:1.23
--- llvm/include/llvm/Analysis/CallGraph.h:1.22	Wed Aug 21 12:09:18 2002
+++ llvm/include/llvm/Analysis/CallGraph.h	Sun Nov  3 18:21:18 2002
@@ -137,6 +137,12 @@
     destroy();
   }
 
+  /// Print the types found in the module.  If the optional Module parameter is
+  /// passed in, then the types are printed symbolically if possible, using the
+  /// symbol table from the module.
+  ///
+  void print(std::ostream &o, const Module *M) const;
+
 private:
   //===---------------------------------------------------------------------
   // Implementation of CallGraph construction
@@ -249,22 +255,5 @@
     return CGN->getExternalNode();
   }
 };
-
-
-//===----------------------------------------------------------------------===//
-// Printing support for Call Graphs
-//
-
-// Stuff for printing out a callgraph...
-
-void WriteToOutput(const CallGraph &, std::ostream &o);
-inline std::ostream &operator <<(std::ostream &o, const CallGraph &CG) {
-  WriteToOutput(CG, o); return o;
-}
-  
-void WriteToOutput(const CallGraphNode *, std::ostream &o);
-inline std::ostream &operator <<(std::ostream &o, const CallGraphNode *CGN) {
-  WriteToOutput(CGN, o); return o;
-}
 
 #endif




From lattner at cs.uiuc.edu  Sun Nov  3 18:22:10 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sun Nov  3 18:22:10 2002
Subject: [llvm-commits] CVS: llvm/lib/Analysis/IPA/CallGraph.cpp
Message-ID: <200211040021.SAA26579@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Analysis/IPA:

CallGraph.cpp updated: 1.22 -> 1.23

---
Log message:

Allow the call graph to be called from analyze naturally with print implemented



---
Diffs of the changes:

Index: llvm/lib/Analysis/IPA/CallGraph.cpp
diff -u llvm/lib/Analysis/IPA/CallGraph.cpp:1.22 llvm/lib/Analysis/IPA/CallGraph.cpp:1.23
--- llvm/lib/Analysis/IPA/CallGraph.cpp:1.22	Wed Aug 21 12:09:39 2002
+++ llvm/lib/Analysis/IPA/CallGraph.cpp	Sun Nov  3 18:21:19 2002
@@ -130,8 +130,7 @@
   FunctionMap.clear();
 }
 
-
-void WriteToOutput(const CallGraphNode *CGN, std::ostream &o) {
+static void WriteToOutput(const CallGraphNode *CGN, std::ostream &o) {
   if (CGN->getFunction())
     o << "Call graph node for function: '"
       << CGN->getFunction()->getName() <<"'\n";
@@ -146,11 +145,11 @@
   o << "\n";
 }
 
-void WriteToOutput(const CallGraph &CG, std::ostream &o) {
-  o << "CallGraph Root is:\n" << CG.getRoot();
+void CallGraph::print(std::ostream &o, const Module *M) const {
+  o << "CallGraph Root is:\n" << getRoot();
 
-  for (CallGraph::const_iterator I = CG.begin(), E = CG.end(); I != E; ++I)
-    o << I->second;
+  for (CallGraph::const_iterator I = begin(), E = end(); I != E; ++I)
+    WriteToOutput(I->second, o);
 }
 
 




From lattner at cs.uiuc.edu  Sun Nov  3 18:33:00 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sun Nov  3 18:33:00 2002
Subject: [llvm-commits] CVS: llvm/lib/Support/Timer.cpp
Message-ID: <200211040032.SAA27032@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Support:

Timer.cpp updated: 1.3 -> 1.4

---
Log message:

Implement MaxRSS in terms of mallinfo instead of the system RSS.  This gives 
us much more accurate numbers and actually WORKS.


---
Diffs of the changes:

Index: llvm/lib/Support/Timer.cpp
diff -u llvm/lib/Support/Timer.cpp:1.3 llvm/lib/Support/Timer.cpp:1.4
--- llvm/lib/Support/Timer.cpp:1.3	Sun Oct 27 13:08:03 2002
+++ llvm/lib/Support/Timer.cpp	Sun Nov  3 18:32:44 2002
@@ -9,6 +9,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -63,20 +64,6 @@
 };
 
 static TimeRecord getTimeRecord() {
-  static unsigned long PageSize = 0;
-
-  if (PageSize == 0) {
-#ifdef _SC_PAGE_SIZE
-    PageSize = sysconf(_SC_PAGE_SIZE);
-#else
-#ifdef _SC_PAGESIZE
-    PageSize = sysconf(_SC_PAGESIZE);
-#else
-    PageSize = getpagesize();
-#endif
-#endif
-  }
-
   struct rusage RU;
   struct timeval T;
   gettimeofday(&T, 0);
@@ -84,15 +71,16 @@
     perror("getrusage call failed: -time-passes info incorrect!");
   }
 
+  struct mallinfo MI = mallinfo();
+
   TimeRecord Result;
   Result.Elapsed    =           T.tv_sec +           T.tv_usec/1000000.0;
   Result.UserTime   = RU.ru_utime.tv_sec + RU.ru_utime.tv_usec/1000000.0;
   Result.SystemTime = RU.ru_stime.tv_sec + RU.ru_stime.tv_usec/1000000.0;
-  Result.MaxRSS = RU.ru_maxrss*PageSize;
+  Result.MaxRSS     = MI.uordblks+MI.usmblks;
   return Result;
 }
 
-
 void Timer::startTimer() {
   Started = true;
   TimeRecord TR = getTimeRecord();
@@ -108,6 +96,8 @@
   UserTime   += TR.UserTime;
   SystemTime += TR.SystemTime;
   MaxRSS     += TR.MaxRSS;
+  if ((signed long)MaxRSS < 0)
+    MaxRSS = 0;
 }
 
 void Timer::sum(const Timer &T) {
@@ -140,7 +130,7 @@
   fprintf(stderr, "  ");
 
   if (Total.MaxRSS)
-    std::cerr << MaxRSS << "\t";
+    fprintf(stderr, " %8ld  ", MaxRSS);
   std::cerr << Name << "\n";
 
   Started = false;  // Once printed, don't print again
@@ -182,7 +172,7 @@
       std::cerr << "   ---Wall Time---";
       
       if (Total.getMaxRSS())
-        std::cerr << " ---Mem---";
+        std::cerr << "  ---Mem---";
       std::cerr << "  --- Name ---\n";
       
       // Loop through all of the timing data, printing it out...




From lattner at cs.uiuc.edu  Sun Nov  3 18:34:00 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sun Nov  3 18:34:00 2002
Subject: [llvm-commits] CVS: llvm/test/Regression/Transforms/DSAnalysis/Makefile
Message-ID: <200211040033.SAA27043@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Regression/Transforms/DSAnalysis:

Makefile updated: 1.2 -> 1.3

---
Log message:

Improve the clean target


---
Diffs of the changes:

Index: llvm/test/Regression/Transforms/DSAnalysis/Makefile
diff -u llvm/test/Regression/Transforms/DSAnalysis/Makefile:1.2 llvm/test/Regression/Transforms/DSAnalysis/Makefile:1.3
--- llvm/test/Regression/Transforms/DSAnalysis/Makefile:1.2	Fri Nov  1 10:49:10 2002
+++ llvm/test/Regression/Transforms/DSAnalysis/Makefile	Sun Nov  3 18:33:19 2002
@@ -22,6 +22,9 @@
 
 all:: $(addprefix Output/, $(FTESTS:%.llx=%.llx.out))
 
+clean::
+	rm -f *.ps *.dot
+
 Output/%.llx.out: %.llx Output/.dir $(LAS)
 	-$(TESTRUNR) $<
 




From vadve at cs.uiuc.edu  Sun Nov  3 19:04:01 2002
From: vadve at cs.uiuc.edu (Vikram Adve)
Date: Sun Nov  3 19:04:01 2002
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/llubenchmark/Makefile
Message-ID: <200211040103.TAA29473@psmith.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs/llubenchmark:

Makefile updated: 1.1 -> 1.2

---
Log message:

Fix spurious PROG entry.


---
Diffs of the changes:

Index: llvm/test/DSGraphs/llubenchmark/Makefile
diff -u llvm/test/DSGraphs/llubenchmark/Makefile:1.1 llvm/test/DSGraphs/llubenchmark/Makefile:1.2
--- llvm/test/DSGraphs/llubenchmark/Makefile:1.1	Sun Nov  3 06:38:19 2002
+++ llvm/test/DSGraphs/llubenchmark/Makefile	Sun Nov  3 19:02:54 2002
@@ -3,7 +3,7 @@
 ## 
 LEVEL = ../../..
 
-PROG = llubenchmark.llvm.bc llubenchmark.llvm.lib.bc.KEEP
+PROG = llubenchmark.llvm.bc
 
 PROGPATH = $(LEVEL)/test/Programs/SingleSource/Output/llubenchmark.llvm.bc
 




From lattner at cs.uiuc.edu  Sun Nov  3 19:50:01 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sun Nov  3 19:50:01 2002
Subject: [llvm-commits] CVS: llvm/lib/Support/Timer.cpp
Message-ID: <200211040149.TAA28148@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Support:

Timer.cpp updated: 1.4 -> 1.5

---
Log message:

Minor fix to space accounting


---
Diffs of the changes:

Index: llvm/lib/Support/Timer.cpp
diff -u llvm/lib/Support/Timer.cpp:1.4 llvm/lib/Support/Timer.cpp:1.5
--- llvm/lib/Support/Timer.cpp:1.4	Sun Nov  3 18:32:44 2002
+++ llvm/lib/Support/Timer.cpp	Sun Nov  3 19:49:45 2002
@@ -77,7 +77,7 @@
   Result.Elapsed    =           T.tv_sec +           T.tv_usec/1000000.0;
   Result.UserTime   = RU.ru_utime.tv_sec + RU.ru_utime.tv_usec/1000000.0;
   Result.SystemTime = RU.ru_stime.tv_sec + RU.ru_stime.tv_usec/1000000.0;
-  Result.MaxRSS     = MI.uordblks+MI.usmblks;
+  Result.MaxRSS     = MI.uordblks;
   return Result;
 }
 




From lattner at cs.uiuc.edu  Sun Nov  3 20:30:01 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sun Nov  3 20:30:01 2002
Subject: [llvm-commits] CVS: llvm/lib/Analysis/DataStructure/BottomUpClosure.cpp
Message-ID: <200211040229.UAA32060@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Analysis/DataStructure:

BottomUpClosure.cpp updated: 1.29 -> 1.30

---
Log message:

Give a better error message in an unhandled case 


---
Diffs of the changes:

Index: llvm/lib/Analysis/DataStructure/BottomUpClosure.cpp
diff -u llvm/lib/Analysis/DataStructure/BottomUpClosure.cpp:1.29 llvm/lib/Analysis/DataStructure/BottomUpClosure.cpp:1.30
--- llvm/lib/Analysis/DataStructure/BottomUpClosure.cpp:1.29	Sun Nov  3 15:27:48 2002
+++ llvm/lib/Analysis/DataStructure/BottomUpClosure.cpp	Sun Nov  3 20:29:15 2002
@@ -61,7 +61,14 @@
   Function::aiterator AI = F.abegin();
   for (unsigned i = 0, e = Call.getNumPtrArgs(); i != e; ++i, ++AI) {
     // Advance the argument iterator to the first pointer argument...
-    while (!isPointerType(AI->getType())) ++AI;
+    while (!isPointerType(AI->getType())) {
+      ++AI;
+#ifndef NDEBUG
+      if (AI == F.aend())
+        std::cerr << "Bad call to Function: " << F.getName() << "\n";
+#endif
+      assert(AI != F.aend() && "# Args provided is not # Args required!");
+    }
     
     // Add the link from the argument scalar to the provided value
     ScalarMap[AI].mergeWith(Call.getPtrArg(i));




From lattner at cs.uiuc.edu  Sun Nov  3 20:54:01 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sun Nov  3 20:54:01 2002
Subject: [llvm-commits] CVS: llvm/include/llvm/Analysis/CallGraph.h
Message-ID: <200211040253.UAA32441@apoc.cs.uiuc.edu>


Changes in directory llvm/include/llvm/Analysis:

CallGraph.h updated: 1.23 -> 1.24

---
Log message:

Implement methods needed to print out call graph


---
Diffs of the changes:

Index: llvm/include/llvm/Analysis/CallGraph.h
diff -u llvm/include/llvm/Analysis/CallGraph.h:1.23 llvm/include/llvm/Analysis/CallGraph.h:1.24
--- llvm/include/llvm/Analysis/CallGraph.h:1.23	Sun Nov  3 18:21:18 2002
+++ llvm/include/llvm/Analysis/CallGraph.h	Sun Nov  3 20:53:39 2002
@@ -42,6 +42,7 @@
 #define LLVM_ANALYSIS_CALLGRAPH_H
 
 #include "Support/GraphTraits.h"
+#include "Support/STLExtras.h"
 #include "llvm/Pass.h"
 class Function;
 class Module;
@@ -242,18 +243,36 @@
   static inline ChildIteratorType child_end  (NodeType *N) { return N->end(); }
 };
 
-
-template<> struct GraphTraits :
-  public GraphTraits {
+template<> struct GraphTraits : public GraphTraits {
   static NodeType *getEntryNode(CallGraph *CGN) {
     return CGN->getExternalNode();  // Start at the external node!
   }
+  typedef std::pair PairTy;
+  typedef std::pointer_to_unary_function DerefFun;
+
+  // nodes_iterator/begin/end - Allow iteration over all nodes in the graph
+  typedef mapped_iterator nodes_iterator;
+  static nodes_iterator nodes_begin(CallGraph *CG) {
+    return map_iterator(CG->begin(), DerefFun(CGdereference));
+  }
+  static nodes_iterator nodes_end  (CallGraph *CG) {
+    return map_iterator(CG->end(), DerefFun(CGdereference));
+  }
+
+  static CallGraphNode &CGdereference (std::pair P) {
+    return *P.second;
+  }
 };
 template<> struct GraphTraits :
   public GraphTraits {
   static NodeType *getEntryNode(const CallGraph *CGN) {
     return CGN->getExternalNode();
   }
+  // nodes_iterator/begin/end - Allow iteration over all nodes in the graph
+  typedef CallGraph::const_iterator nodes_iterator;
+  static nodes_iterator nodes_begin(const CallGraph *CG) { return CG->begin(); }
+  static nodes_iterator nodes_end  (const CallGraph *CG) { return CG->end(); }
 };
 
 #endif




From lattner at cs.uiuc.edu  Sun Nov  3 20:55:01 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sun Nov  3 20:55:01 2002
Subject: [llvm-commits] CVS: llvm/lib/Transforms/Scalar/SCCP.cpp
Message-ID: <200211040254.UAA32457@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Transforms/Scalar:

SCCP.cpp updated: 1.63 -> 1.64

---
Log message:

Make sure to _delete_ memory allocated by worklists


---
Diffs of the changes:

Index: llvm/lib/Transforms/Scalar/SCCP.cpp
diff -u llvm/lib/Transforms/Scalar/SCCP.cpp:1.63 llvm/lib/Transforms/Scalar/SCCP.cpp:1.64
--- llvm/lib/Transforms/Scalar/SCCP.cpp:1.63	Tue Oct 29 17:03:20 2002
+++ llvm/lib/Transforms/Scalar/SCCP.cpp	Sun Nov  3 20:54:22 2002
@@ -314,6 +314,8 @@
   // Reset state so that the next invocation will have empty data structures
   BBExecutable.clear();
   ValueState.clear();
+  std::vector().swap(InstWorkList);
+  std::vector().swap(BBWorkList);
 
   return MadeChanges;
 }




From lattner at cs.uiuc.edu  Sun Nov  3 20:56:01 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sun Nov  3 20:56:01 2002
Subject: [llvm-commits] CVS: llvm/tools/analyze/GraphPrinters.cpp
Message-ID: <200211040255.UAA32469@apoc.cs.uiuc.edu>


Changes in directory llvm/tools/analyze:

GraphPrinters.cpp updated: 1.1 -> 1.2

---
Log message:

Implement a new -print-callgraph analysis that turns a callgraph into a dot
graph


---
Diffs of the changes:

Index: llvm/tools/analyze/GraphPrinters.cpp
diff -u llvm/tools/analyze/GraphPrinters.cpp:1.1 llvm/tools/analyze/GraphPrinters.cpp:1.2
--- llvm/tools/analyze/GraphPrinters.cpp:1.1	Mon Oct  7 13:38:01 2002
+++ llvm/tools/analyze/GraphPrinters.cpp	Sun Nov  3 20:55:30 2002
@@ -10,10 +10,15 @@
 #include "Support/GraphWriter.h"
 #include "llvm/Pass.h"
 #include "llvm/iTerminators.h"
+#include "llvm/Analysis/CallGraph.h"
 #include "llvm/Support/CFG.h"
 #include 
 #include 
 
+//===----------------------------------------------------------------------===//
+//                         Control Flow Graph Printer
+//===----------------------------------------------------------------------===//
+
 template<>
 struct DOTGraphTraits : public DefaultDOTGraphTraits {
   static std::string getGraphName(Function *F) {
@@ -70,7 +75,6 @@
 
 namespace {
   struct CFGPrinter : public FunctionPass {
-    Function *F;
     virtual bool runOnFunction(Function &Func) {
       WriteGraphToFile(std::cerr, "cfg."+Func.getName(), &Func);
       return false;
@@ -85,4 +89,44 @@
 
   RegisterAnalysis P1("print-cfg",
                                   "Print CFG of function to 'dot' file");
+};
+
+
+
+//===----------------------------------------------------------------------===//
+//                              Call Graph Printer
+//===----------------------------------------------------------------------===//
+
+template<>
+struct DOTGraphTraits : public DefaultDOTGraphTraits {
+  static std::string getGraphName(CallGraph *F) {
+    return "Call Graph";
+  }
+
+  static std::string getNodeLabel(CallGraphNode *Node, CallGraph *Graph) {
+    if (Node->getFunction())
+      return Node->getFunction()->getName();
+    else
+      return "Indirect call node";
+  }
+};
+
+
+namespace {
+  struct CallGraphPrinter : public Pass {
+    virtual bool run(Module &M) {
+      WriteGraphToFile(std::cerr, "callgraph", &getAnalysis());
+      return false;
+    }
+
+    void print(std::ostream &OS) const {}
+    
+    virtual void getAnalysisUsage(AnalysisUsage &AU) const {
+      AU.addRequired();
+      AU.setPreservesAll();
+    }
+  };
+
+  RegisterAnalysis P2("print-callgraph",
+                                        "Print Call Graph to 'dot' file");
 };




From lattner at cs.uiuc.edu  Sun Nov  3 23:47:01 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sun Nov  3 23:47:01 2002
Subject: [llvm-commits] CVS: llvm/lib/Transforms/ExprTypeConvert.cpp
Message-ID: <200211040546.XAA04382@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Transforms:

ExprTypeConvert.cpp updated: 1.63 -> 1.64

---
Log message:

Be more generous about level raising constant expressions don't force each 
constant to one particular type.


---
Diffs of the changes:

Index: llvm/lib/Transforms/ExprTypeConvert.cpp
diff -u llvm/lib/Transforms/ExprTypeConvert.cpp:1.63 llvm/lib/Transforms/ExprTypeConvert.cpp:1.64
--- llvm/lib/Transforms/ExprTypeConvert.cpp:1.63	Thu Oct 31 22:49:06 2002
+++ llvm/lib/Transforms/ExprTypeConvert.cpp	Sun Nov  3 23:46:37 2002
@@ -139,22 +139,18 @@
   ValueTypeCache::iterator CTMI = CTMap.find(V);
   if (CTMI != CTMap.end()) return CTMI->second == Ty;
 
+  // If it's a constant... all constants can be converted to a different type We
+  // just ask the constant propogator to see if it can convert the value...
+  //
+  if (Constant *CPV = dyn_cast(V))
+    return ConstantFoldCastInstruction(CPV, Ty);
+  
+
   CTMap[V] = Ty;
   if (V->getType() == Ty) return true;  // Expression already correct type!
 
   Instruction *I = dyn_cast(V);
-  if (I == 0) {
-    // It's not an instruction, check to see if it's a constant... all constants
-    // can be converted to an equivalent value (except pointers, they can't be
-    // const prop'd in general).  We just ask the constant propogator to see if
-    // it can convert the value...
-    //
-    if (Constant *CPV = dyn_cast(V))
-      if (ConstantFoldCastInstruction(CPV, Ty))
-        return true;  // Don't worry about deallocating, it's a constant.
-
-    return false;              // Otherwise, we can't convert!
-  }
+  if (I == 0) return false;              // Otherwise, we can't convert!
 
   switch (I->getOpcode()) {
   case Instruction::Cast:
@@ -323,18 +319,18 @@
   DEBUG(cerr << "CETT: " << (void*)V << " " << V);
 
   Instruction *I = dyn_cast(V);
-  if (I == 0)
-    if (Constant *CPV = cast(V)) {
-      // Constants are converted by constant folding the cast that is required.
-      // We assume here that all casts are implemented for constant prop.
-      Value *Result = ConstantFoldCastInstruction(CPV, Ty);
-      assert(Result && "ConstantFoldCastInstruction Failed!!!");
-      assert(Result->getType() == Ty && "Const prop of cast failed!");
-
-      // Add the instruction to the expression map
-      VMC.ExprMap[V] = Result;
-      return Result;
-    }
+  if (I == 0) {
+    Constant *CPV = cast(V)) {
+    // Constants are converted by constant folding the cast that is required.
+    // We assume here that all casts are implemented for constant prop.
+    Value *Result = ConstantFoldCastInstruction(CPV, Ty);
+    assert(Result && "ConstantFoldCastInstruction Failed!!!");
+    assert(Result->getType() == Ty && "Const prop of cast failed!");
+
+    // Add the instruction to the expression map
+    //VMC.ExprMap[V] = Result;
+    return Result;
+  }
 
 
   BasicBlock *BB = I->getParent();




From lattner at cs.uiuc.edu  Sun Nov  3 23:51:00 2002
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sun Nov  3 23:51:00 2002
Subject: [llvm-commits] CVS: llvm/lib/Transforms/ExprTypeConvert.cpp
Message-ID: <200211040550.XAA04487@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Transforms:

ExprTypeConvert.cpp updated: 1.64 -> 1.65

---
Log message:

Ack: Fix bug in previous checkin.


---
Diffs of the changes:

Index: llvm/lib/Transforms/ExprTypeConvert.cpp
diff -u llvm/lib/Transforms/ExprTypeConvert.cpp:1.64 llvm/lib/Transforms/ExprTypeConvert.cpp:1.65
--- llvm/lib/Transforms/ExprTypeConvert.cpp:1.64	Sun Nov  3 23:46:37 2002
+++ llvm/lib/Transforms/ExprTypeConvert.cpp	Sun Nov  3 23:50:42 2002
@@ -320,7 +320,7 @@
 
   Instruction *I = dyn_cast(V);
   if (I == 0) {
-    Constant *CPV = cast(V)) {
+    Constant *CPV = cast(V);
     // Constants are converted by constant folding the cast that is required.
     // We assume here that all casts are implemented for constant prop.
     Value *Result = ConstantFoldCastInstruction(CPV, Ty);
Oct 28th, 2002 -A new mailing + list has been added for discussion about bugs in + LLVM and for patch submissions.
Sep 5th, 2002 - An initial draft of the CommandLine library reference manual
  • The LLVM CVS Commits Archive
    • +
  • The LLVM Bugs & Patches Archive

    		•
    A new mailing - list has been added for discussion about bugs in - LLVM and for patch submissions.
    Sep 5th, 2002 -