From lattner at cs.uiuc.edu  Mon Jan 13 14:02:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Mon Jan 13 14:02:01 2003
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/LiveVariables.cpp PHIElimination.cpp
Message-ID: <200301132001.OAA27275@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/CodeGen:

LiveVariables.cpp added (r1.1)
PHIElimination.cpp added (r1.1)

---
Log message:

New files


---
Diffs of the changes:



From lattner at cs.uiuc.edu  Mon Jan 13 14:03:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Mon Jan 13 14:03:01 2003
Subject: [llvm-commits] CVS: llvm/test/Regression/Jello/2003-01-04-PhiTest.llx
Message-ID: <200301132002.OAA27502@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Regression/Jello:

2003-01-04-PhiTest.llx added (r1.1)

---
Log message:

New testcase


---
Diffs of the changes:



From lattner at cs.uiuc.edu  Tue Jan 14 13:05:02 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Jan 14 13:05:02 2003
Subject: [llvm-commits] CVS: llvm/lib/Transforms/ExprTypeConvert.cpp
Message-ID: <200301141904.NAA00654@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Transforms:

ExprTypeConvert.cpp updated: 1.66 -> 1.67

---
Log message:

Fix bug


---
Diffs of the changes:

Index: llvm/lib/Transforms/ExprTypeConvert.cpp
diff -u llvm/lib/Transforms/ExprTypeConvert.cpp:1.66 llvm/lib/Transforms/ExprTypeConvert.cpp:1.67
--- llvm/lib/Transforms/ExprTypeConvert.cpp:1.66	Wed Nov 13 00:54:20 2002
+++ llvm/lib/Transforms/ExprTypeConvert.cpp	Tue Jan 14 13:04:43 2003
@@ -274,6 +274,7 @@
     //
     if (GEP->getNumOperands() == 2 && 
         GEP->getOperand(1)->getType() == Type::LongTy &&
+        PTy->getElementType()->isSized() &&
         TD.getTypeSize(PTy->getElementType()) == 
         TD.getTypeSize(GEP->getType()->getElementType())) {
       const PointerType *NewSrcTy = PointerType::get(PVTy);




From lattner at cs.uiuc.edu  Tue Jan 14 13:43:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Jan 14 13:43:01 2003
Subject: [llvm-commits] CVS: llvm/lib/VMCore/Type.cpp
Message-ID: <200301141942.NAA00899@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/VMCore:

Type.cpp updated: 1.43 -> 1.44

---
Log message:

Make type resolution a bit more efficient


---
Diffs of the changes:

Index: llvm/lib/VMCore/Type.cpp
diff -u llvm/lib/VMCore/Type.cpp:1.43 llvm/lib/VMCore/Type.cpp:1.44
--- llvm/lib/VMCore/Type.cpp:1.43	Mon Sep  2 20:08:13 2002
+++ llvm/lib/VMCore/Type.cpp	Tue Jan 14 13:42:39 2003
@@ -259,13 +259,12 @@
 //
 static string getTypeProps(const Type *Ty, vector<const Type *> &TypeStack,
 			   bool &isAbstract, bool &isRecursive) {
-  string Result;
   if (!Ty->isAbstract() && !Ty->isRecursive() && // Base case for the recursion
       Ty->getDescription().size()) {
-    Result = Ty->getDescription();               // Primitive = leaf type
+    return Ty->getDescription();                 // Primitive = leaf type
   } else if (isa<OpaqueType>(Ty)) {              // Base case for the recursion
-    Result = Ty->getDescription();               // Opaque = leaf type
     isAbstract = true;                           // This whole type is abstract!
+    return Ty->getDescription();                 // Opaque = leaf type
   } else {
     // Check to see if the Type is already on the stack...
     unsigned Slot = 0, CurSize = TypeStack.size();
@@ -276,9 +275,10 @@
     // Generate the appropriate upreference to handle this.
     // 
     if (Slot < CurSize) {
-      Result = "\\" + utostr(CurSize-Slot);       // Here's the upreference
       isRecursive = true;                         // We know we are recursive
+      return "\\" + utostr(CurSize-Slot);         // Here's the upreference
     } else {                      // Recursive case: abstract derived type...
+      string Result;
       TypeStack.push_back(Ty);    // Add us to the stack..
       
       switch (Ty->getPrimitiveID()) {
@@ -334,9 +334,9 @@
       }
 
       TypeStack.pop_back();       // Remove self from stack...
+      return Result;
     }
   }
-  return Result;
 }
 
 
@@ -1043,7 +1043,7 @@
        << OldType->getDescription() << "], " << (void*)NewType << " [" 
        << NewType->getDescription() << "])\n";
 #endif
-  for (unsigned i = 0, e = ETypes.size(); i != e; ++i)
+  for (int i = ETypes.size()-1; i >= 0; --i)
     if (ETypes[i] == OldType) {
       ETypes[i].removeUserFromConcrete();
 




From lattner at cs.uiuc.edu  Tue Jan 14 14:33:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Jan 14 14:33:01 2003
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/PreOpts/PreSelection.cpp
Message-ID: <200301142032.OAA01179@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/CodeGen/PreOpts:

PreSelection.cpp updated: 1.5 -> 1.6

---
Log message:

Minor cleanups


---
Diffs of the changes:

Index: llvm/lib/CodeGen/PreOpts/PreSelection.cpp
diff -u llvm/lib/CodeGen/PreOpts/PreSelection.cpp:1.5 llvm/lib/CodeGen/PreOpts/PreSelection.cpp:1.6
--- llvm/lib/CodeGen/PreOpts/PreSelection.cpp:1.5	Sun Oct 27 13:09:51 2002
+++ llvm/lib/CodeGen/PreOpts/PreSelection.cpp	Tue Jan 14 14:32:10 2003
@@ -20,11 +20,8 @@
 #include "llvm/iOther.h"
 #include "llvm/DerivedTypes.h"
 #include "llvm/Pass.h"
-#include "llvm/Annotation.h"
 #include "Support/CommandLine.h"
-#include "Support/NonCopyable.h"
 #include <algorithm>
-using namespace std;
 
 namespace {
   //===--------------------------------------------------------------------===//
@@ -135,8 +132,8 @@
 
     bool doFinalization(Function &F) {
       if (PreSelectDebugLevel >= PreSelect_PrintOutput)
-        cerr << "\n\n*** LLVM code after pre-selection for function "
-             << F.getName() << ":\n\n" << F;
+        std::cerr << "\n\n*** LLVM code after pre-selection for function "
+                  << F.getName() << ":\n\n" << F;
       return false;
     }
 




From lattner at cs.uiuc.edu  Tue Jan 14 15:27:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Jan 14 15:27:01 2003
Subject: [llvm-commits] CVS: llvm/lib/VMCore/Annotation.cpp
Message-ID: <200301142126.PAA01989@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/VMCore:

Annotation.cpp updated: 1.7 -> 1.8

---
Log message:

Move annotation to support library


---
Diffs of the changes:

Index: llvm/lib/VMCore/Annotation.cpp
diff -u llvm/lib/VMCore/Annotation.cpp:1.7 llvm/lib/VMCore/Annotation.cpp:1.8
--- llvm/lib/VMCore/Annotation.cpp:1.7	Sun Jan 12 18:52:43 2003
+++ llvm/lib/VMCore/Annotation.cpp	Tue Jan 14 15:26:46 2003
@@ -5,7 +5,7 @@
 //===----------------------------------------------------------------------===//
 
 #include <map>
-#include "llvm/Annotation.h"
+#include "Support/Annotation.h"
 using std::string;
 using std::map;
 using std::pair;




From lattner at cs.uiuc.edu  Tue Jan 14 15:30:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Jan 14 15:30:01 2003
Subject: [llvm-commits] CVS: llvm/include/Support/Annotation.h
Message-ID: <200301142129.PAA02676@apoc.cs.uiuc.edu>


Changes in directory llvm/include/Support:

Annotation.h updated: 1.6 -> 1.7

---
Log message:

Move annotation to support library


---
Diffs of the changes:

Index: llvm/include/Support/Annotation.h
diff -u llvm/include/Support/Annotation.h:1.6 llvm/include/Support/Annotation.h:1.7
--- llvm/include/Support/Annotation.h:1.6	Wed Jul 24 15:01:57 2002
+++ llvm/include/Support/Annotation.h	Tue Jan 14 15:29:07 2003
@@ -1,21 +1,19 @@
-//===-- llvm/Annotation.h - Annotation classes -------------------*- C++ -*--=//
+//===-- Support/Annotation.h - Annotation classes ---------------*- C++ -*-===//
 //
 // This file contains the declarations for two classes: Annotation & Annotable.
 // Using these two simple classes, anything that derives from Annotable can have
 // Annotation subclasses attached to them, ready for easy retrieval.
 //
-// Annotations are designed to be easily attachable to LLVM code (as all Value's
-// are Annotable), and can even be serialized to bytecode and to assembly.
+// Annotations are designed to be easily attachable to various classes.
 //
-// The AnnotationManager class (defined in AnnotationManager.h) is essential for
-// using these classes.  It is responsible for turning Annotation name strings
-// into tokens [unique id #'s] that may be used to search for and create
-// annotations.
+// The AnnotationManager class is essential for using these classes.  It is
+// responsible for turning Annotation name strings into tokens [unique id #'s]
+// that may be used to search for and create annotations.
 //
 //===----------------------------------------------------------------------===//
 
-#ifndef LLVM_ANNOTATION_H
-#define LLVM_ANNOTATION_H
+#ifndef SUPPORT_ANNOTATION_H
+#define SUPPORT_ANNOTATION_H
 
 #include <string>
 class AnnotationID;




From lattner at cs.uiuc.edu  Tue Jan 14 15:30:03 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Jan 14 15:30:03 2003
Subject: [llvm-commits] CVS: llvm/include/llvm/Target/TargetData.h
Message-ID: <200301142129.PAA02853@apoc.cs.uiuc.edu>


Changes in directory llvm/include/llvm/Target:

TargetData.h updated: 1.12 -> 1.13

---
Log message:

Move annotation to support library


---
Diffs of the changes:

Index: llvm/include/llvm/Target/TargetData.h
diff -u llvm/include/llvm/Target/TargetData.h:1.12 llvm/include/llvm/Target/TargetData.h:1.13
--- llvm/include/llvm/Target/TargetData.h:1.12	Tue Oct 29 15:47:17 2002
+++ llvm/include/llvm/Target/TargetData.h	Tue Jan 14 15:29:37 2003
@@ -13,8 +13,8 @@
 #ifndef LLVM_TARGET_TARGETDATA_H
 #define LLVM_TARGET_TARGETDATA_H
 
-#include "llvm/Annotation.h"
 #include "llvm/Pass.h"
+#include "Support/Annotation.h"
 #include "Support/DataTypes.h"
 #include <vector>
 class Value;




From lattner at cs.uiuc.edu  Tue Jan 14 15:30:03 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Jan 14 15:30:03 2003
Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineCodeForInstruction.h MachineFunction.h MachineInstr.h
Message-ID: <200301142129.PAA02868@apoc.cs.uiuc.edu>


Changes in directory llvm/include/llvm/CodeGen:

MachineCodeForInstruction.h updated: 1.7 -> 1.8
MachineFunction.h updated: 1.25 -> 1.26
MachineInstr.h updated: 1.95 -> 1.96

---
Log message:

Move annotation to support library



---
Diffs of the changes:

Index: llvm/include/llvm/CodeGen/MachineCodeForInstruction.h
diff -u llvm/include/llvm/CodeGen/MachineCodeForInstruction.h:1.7 llvm/include/llvm/CodeGen/MachineCodeForInstruction.h:1.8
--- llvm/include/llvm/CodeGen/MachineCodeForInstruction.h:1.7	Wed Oct 30 14:38:49 2002
+++ llvm/include/llvm/CodeGen/MachineCodeForInstruction.h	Tue Jan 14 15:29:39 2003
@@ -18,7 +18,7 @@
 #ifndef LLVM_CODEGEN_MACHINECODE_FOR_INSTRUCTION_H
 #define LLVM_CODEGEN_MACHINECODE_FOR_INSTRUCTION_H
 
-#include "llvm/Annotation.h"
+#include "Support/Annotation.h"
 #include <vector>
 class MachineInstr;
 class Instruction;


Index: llvm/include/llvm/CodeGen/MachineFunction.h
diff -u llvm/include/llvm/CodeGen/MachineFunction.h:1.25 llvm/include/llvm/CodeGen/MachineFunction.h:1.26
--- llvm/include/llvm/CodeGen/MachineFunction.h:1.25	Sun Jan 12 18:16:10 2003
+++ llvm/include/llvm/CodeGen/MachineFunction.h	Tue Jan 14 15:29:39 2003
@@ -12,7 +12,7 @@
 #define LLVM_CODEGEN_MACHINEFUNCTION_H
 
 #include "llvm/CodeGen/MachineBasicBlock.h"
-#include "llvm/Annotation.h"
+#include "Support/Annotation.h"
 #include "Support/ilist"
 
 class Function;


Index: llvm/include/llvm/CodeGen/MachineInstr.h
diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.95 llvm/include/llvm/CodeGen/MachineInstr.h:1.96
--- llvm/include/llvm/CodeGen/MachineInstr.h:1.95	Sun Jan 12 18:18:17 2003
+++ llvm/include/llvm/CodeGen/MachineInstr.h	Tue Jan 14 15:29:39 2003
@@ -9,11 +9,10 @@
 #ifndef LLVM_CODEGEN_MACHINEINSTR_H
 #define LLVM_CODEGEN_MACHINEINSTR_H
 
-#include "llvm/Annotation.h"
 #include "llvm/Target/MRegisterInfo.h"
-#include "Support/iterator"
+#include "Support/Annotation.h"
 #include "Support/NonCopyable.h"
-#include <vector>
+#include "Support/iterator"
 class Value;
 class Function;
 class MachineBasicBlock;




From lattner at cs.uiuc.edu  Tue Jan 14 15:31:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Jan 14 15:31:01 2003
Subject: [llvm-commits] CVS: llvm/include/llvm/Value.h
Message-ID: <200301142130.PAA03032@apoc.cs.uiuc.edu>


Changes in directory llvm/include/llvm:

Value.h updated: 1.39 -> 1.40

---
Log message:

Move annotation to support library


---
Diffs of the changes:

Index: llvm/include/llvm/Value.h
diff -u llvm/include/llvm/Value.h:1.39 llvm/include/llvm/Value.h:1.40
--- llvm/include/llvm/Value.h:1.39	Tue Oct  8 19:42:03 2002
+++ llvm/include/llvm/Value.h	Tue Jan 14 15:29:58 2003
@@ -10,8 +10,8 @@
 #ifndef LLVM_VALUE_H
 #define LLVM_VALUE_H
 
-#include "llvm/Annotation.h"
 #include "llvm/AbstractTypeUser.h"
+#include "Support/Annotation.h"
 #include "Support/Casting.h"
 #include <iostream>
 #include <vector>




From lattner at cs.uiuc.edu  Tue Jan 14 15:31:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Jan 14 15:31:01 2003
Subject: [llvm-commits] CVS: llvm/tools/bugpoint/Makefile
Message-ID: <200301142130.PAA03155@apoc.cs.uiuc.edu>


Changes in directory llvm/tools/bugpoint:

Makefile updated: 1.2 -> 1.3

---
Log message:

Link in lots o libraries


---
Diffs of the changes:

Index: llvm/tools/bugpoint/Makefile
diff -u llvm/tools/bugpoint/Makefile:1.2 llvm/tools/bugpoint/Makefile:1.3
--- llvm/tools/bugpoint/Makefile:1.2	Mon Dec 23 17:49:59 2002
+++ llvm/tools/bugpoint/Makefile	Tue Jan 14 15:30:30 2003
@@ -2,7 +2,7 @@
 
 TOOLNAME = bugpoint
 
-#OPTLIBS  = instrument profpaths 
+OPTLIBS  = transforms instrument profpaths 
 ANALIBS  = datastructure ipa target.a 
 
 USEDLIBS = ipo scalaropts analysis $(OPTLIBS) $(ANALIBS) \




From lattner at cs.uiuc.edu  Tue Jan 14 15:31:02 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Jan 14 15:31:02 2003
Subject: [llvm-commits] CVS: llvm/include/llvm/AbstractTypeUser.h
Message-ID: <200301142130.PAA03009@apoc.cs.uiuc.edu>


Changes in directory llvm/include/llvm:

AbstractTypeUser.h updated: 1.5 -> 1.6

---
Log message:

Must #include assert.h


---
Diffs of the changes:

Index: llvm/include/llvm/AbstractTypeUser.h
diff -u llvm/include/llvm/AbstractTypeUser.h:1.5 llvm/include/llvm/AbstractTypeUser.h:1.6
--- llvm/include/llvm/AbstractTypeUser.h:1.5	Thu Apr  4 16:16:59 2002
+++ llvm/include/llvm/AbstractTypeUser.h	Tue Jan 14 15:29:52 2003
@@ -21,6 +21,7 @@
 #ifndef LLVM_ABSTRACT_TYPE_USER_H
 #define LLVM_ABSTRACT_TYPE_USER_H
 
+#include <assert.h>
 class Type;
 class DerivedType;
 




From lattner at cs.uiuc.edu  Tue Jan 14 15:32:00 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Jan 14 15:32:00 2003
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/Makefile
Message-ID: <200301142131.PAA03331@apoc.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs:

Makefile updated: 1.8 -> 1.9

---
Log message:

Add test for other programs


---
Diffs of the changes:

Index: llvm/test/DSGraphs/Makefile
diff -u llvm/test/DSGraphs/Makefile:1.8 llvm/test/DSGraphs/Makefile:1.9
--- llvm/test/DSGraphs/Makefile:1.8	Fri Nov  8 15:29:01 2002
+++ llvm/test/DSGraphs/Makefile	Tue Jan 14 15:31:03 2003
@@ -41,7 +41,8 @@
 	255.vortex \
 	256.bzip2 \
 	300.twolf \
-	Burg
+	Burg \
+	ptrdist-anagram  ptrdist-bc  ptrdist-ft  ptrdist-ks  ptrdist-yacr2
 
 all:: dummylib.o
 
@@ -62,8 +63,6 @@
 	gmake recursive_reports 2>&1 | tee report.raw.out	
 
 report: report.raw.out
-	-mv -f report.no-times.txt report.no-times.old.txt
-	-mv -f report.txt report.old.txt
 	./generate_report.pl -no-times report.raw.out > report.no-times.txt
 	./generate_report.pl report.raw.out > report.txt
 	@head -n1 report.txt




From lattner at cs.uiuc.edu  Tue Jan 14 15:32:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Jan 14 15:32:01 2003
Subject: [llvm-commits] CVS: llvm/lib/Analysis/LiveVar/BBLiveVar.h
Message-ID: <200301142131.PAA03438@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Analysis/LiveVar:

BBLiveVar.h updated: 1.18 -> 1.19

---
Log message:

Move annotations to support library


---
Diffs of the changes:

Index: llvm/lib/Analysis/LiveVar/BBLiveVar.h
diff -u llvm/lib/Analysis/LiveVar/BBLiveVar.h:1.18 llvm/lib/Analysis/LiveVar/BBLiveVar.h:1.19
--- llvm/lib/Analysis/LiveVar/BBLiveVar.h:1.18	Tue Oct 29 17:01:54 2002
+++ llvm/lib/Analysis/LiveVar/BBLiveVar.h	Tue Jan 14 15:31:39 2003
@@ -9,7 +9,7 @@
 #define LIVE_VAR_BB_H
 
 #include "llvm/Analysis/LiveVar/ValueSet.h"
-#include "llvm/Annotation.h"
+#include "Support/Annotation.h"
 #include <map>
 class BasicBlock;
 class Value;




From lattner at cs.uiuc.edu  Tue Jan 14 15:40:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Jan 14 15:40:01 2003
Subject: [llvm-commits] CVS: llvm/include/llvm/Annotation.h
Message-ID: <200301142139.PAA04024@apoc.cs.uiuc.edu>


Changes in directory llvm/include/llvm:

Annotation.h (r1.6) removed

---
Log message:

Move llvm/Annotation.h to Support/Annotation.h


---
Diffs of the changes:



From lattner at cs.uiuc.edu  Tue Jan 14 15:59:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Jan 14 15:59:01 2003
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/LiveVariables.cpp MachineInstr.cpp PHIElimination.cpp PrologEpilogInserter.cpp RegAllocLocal.cpp RegAllocSimple.cpp
Message-ID: <200301142158.PAA08732@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/CodeGen:

LiveVariables.cpp updated: 1.1 -> 1.2
MachineInstr.cpp updated: 1.68 -> 1.69
PHIElimination.cpp updated: 1.1 -> 1.2
PrologEpilogInserter.cpp updated: 1.4 -> 1.5
RegAllocLocal.cpp updated: 1.11 -> 1.12
RegAllocSimple.cpp updated: 1.37 -> 1.38

---
Log message:

Rename MachineInstrInfo -> TargetInstrInfo


---
Diffs of the changes:

Index: llvm/lib/CodeGen/LiveVariables.cpp
diff -u llvm/lib/CodeGen/LiveVariables.cpp:1.1 llvm/lib/CodeGen/LiveVariables.cpp:1.2
--- llvm/lib/CodeGen/LiveVariables.cpp:1.1	Mon Jan 13 14:01:16 2003
+++ llvm/lib/CodeGen/LiveVariables.cpp	Tue Jan 14 15:58:41 2003
@@ -6,7 +6,7 @@
 
 #include "llvm/CodeGen/LiveVariables.h"
 #include "llvm/CodeGen/MachineInstr.h"
-#include "llvm/Target/MachineInstrInfo.h"
+#include "llvm/Target/TargetInstrInfo.h"
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/Support/CFG.h"
 #include "Support/DepthFirstIterator.h"


Index: llvm/lib/CodeGen/MachineInstr.cpp
diff -u llvm/lib/CodeGen/MachineInstr.cpp:1.68 llvm/lib/CodeGen/MachineInstr.cpp:1.69
--- llvm/lib/CodeGen/MachineInstr.cpp:1.68	Sun Jan 12 18:23:24 2003
+++ llvm/lib/CodeGen/MachineInstr.cpp	Tue Jan 14 15:58:41 2003
@@ -6,19 +6,19 @@
 #include "llvm/CodeGen/MachineBasicBlock.h"
 #include "llvm/Value.h"
 #include "llvm/Target/TargetMachine.h"
-#include "llvm/Target/MachineInstrInfo.h"
+#include "llvm/Target/TargetInstrInfo.h"
 #include "llvm/Target/MRegisterInfo.h"
 using std::cerr;
 
 
 // Global variable holding an array of descriptors for machine instructions.
 // The actual object needs to be created separately for each target machine.
-// This variable is initialized and reset by class MachineInstrInfo.
+// This variable is initialized and reset by class TargetInstrInfo.
 // 
 // FIXME: This should be a property of the target so that more than one target
 // at a time can be active...
 //
-extern const MachineInstrDescriptor *TargetInstrDescriptors;
+extern const TargetInstrDescriptor *TargetInstrDescriptors;
 
 // Constructor for instructions with fixed #operands (nearly all)
 MachineInstr::MachineInstr(MachineOpCode _opCode)


Index: llvm/lib/CodeGen/PHIElimination.cpp
diff -u llvm/lib/CodeGen/PHIElimination.cpp:1.1 llvm/lib/CodeGen/PHIElimination.cpp:1.2
--- llvm/lib/CodeGen/PHIElimination.cpp:1.1	Mon Jan 13 14:01:16 2003
+++ llvm/lib/CodeGen/PHIElimination.cpp	Tue Jan 14 15:58:41 2003
@@ -10,7 +10,7 @@
 #include "llvm/CodeGen/MachineInstr.h"
 #include "llvm/CodeGen/SSARegMap.h"
 #include "llvm/CodeGen/LiveVariables.h"
-#include "llvm/Target/MachineInstrInfo.h"
+#include "llvm/Target/TargetInstrInfo.h"
 #include "llvm/Target/TargetMachine.h"
 
 namespace {


Index: llvm/lib/CodeGen/PrologEpilogInserter.cpp
diff -u llvm/lib/CodeGen/PrologEpilogInserter.cpp:1.4 llvm/lib/CodeGen/PrologEpilogInserter.cpp:1.5
--- llvm/lib/CodeGen/PrologEpilogInserter.cpp:1.4	Sun Jan 12 18:23:41 2003
+++ llvm/lib/CodeGen/PrologEpilogInserter.cpp	Tue Jan 14 15:58:41 2003
@@ -16,7 +16,7 @@
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/Target/MRegisterInfo.h"
 #include "llvm/Target/TargetFrameInfo.h"
-#include "llvm/Target/MachineInstrInfo.h"
+#include "llvm/Target/TargetInstrInfo.h"
 
 namespace {
   struct PEI : public MachineFunctionPass {
@@ -157,10 +157,10 @@
   }
 
   // Add code to restore the callee-save registers in each exiting block.
-  const MachineInstrInfo &MII = Fn.getTarget().getInstrInfo();
+  const TargetInstrInfo &TII = Fn.getTarget().getInstrInfo();
   for (MachineFunction::iterator FI = Fn.begin(), E = Fn.end(); FI != E; ++FI) {
     // If last instruction is a return instruction, add an epilogue
-    if (MII.isReturn(FI->back()->getOpcode())) {
+    if (TII.isReturn(FI->back()->getOpcode())) {
       MBB = FI; I = MBB->end()-1;
 
       for (unsigned i = 0, e = RegsToSave.size(); i != e; ++i) {
@@ -237,10 +237,10 @@
   Fn.getTarget().getRegisterInfo()->emitPrologue(Fn);
 
   // Add epilogue to restore the callee-save registers in each exiting block
-  const MachineInstrInfo &MII = Fn.getTarget().getInstrInfo();
+  const TargetInstrInfo &TII = Fn.getTarget().getInstrInfo();
   for (MachineFunction::iterator I = Fn.begin(), E = Fn.end(); I != E; ++I) {
     // If last instruction is a return instruction, add an epilogue
-    if (MII.isReturn(I->back()->getOpcode()))
+    if (TII.isReturn(I->back()->getOpcode()))
       Fn.getTarget().getRegisterInfo()->emitEpilogue(Fn, *I);
   }
 }


Index: llvm/lib/CodeGen/RegAllocLocal.cpp
diff -u llvm/lib/CodeGen/RegAllocLocal.cpp:1.11 llvm/lib/CodeGen/RegAllocLocal.cpp:1.12
--- llvm/lib/CodeGen/RegAllocLocal.cpp:1.11	Sun Jan 12 18:25:40 2003
+++ llvm/lib/CodeGen/RegAllocLocal.cpp	Tue Jan 14 15:58:41 2003
@@ -11,7 +11,7 @@
 #include "llvm/CodeGen/SSARegMap.h"
 #include "llvm/CodeGen/MachineFrameInfo.h"
 #include "llvm/CodeGen/LiveVariables.h"
-#include "llvm/Target/MachineInstrInfo.h"
+#include "llvm/Target/TargetInstrInfo.h"
 #include "llvm/Target/TargetMachine.h"
 #include "Support/Statistic.h"
 #include "Support/CommandLine.h"
@@ -442,11 +442,11 @@
   MachineBasicBlock::iterator I = MBB.begin();
   for (; I != MBB.end(); ++I) {
     MachineInstr *MI = *I;
-    const MachineInstrDescriptor &MID = TM->getInstrInfo().get(MI->getOpcode());
+    const TargetInstrDescriptor &TID = TM->getInstrInfo().get(MI->getOpcode());
 
     // Loop over the implicit uses, making sure that they are at the head of the
     // use order list, so they don't get reallocated.
-    if (const unsigned *ImplicitUses = MID.ImplicitUses)
+    if (const unsigned *ImplicitUses = TID.ImplicitUses)
       for (unsigned i = 0; ImplicitUses[i]; ++i)
         MarkPhysRegRecentlyUsed(ImplicitUses[i]);
 
@@ -498,7 +498,7 @@
       }
 
     // Loop over the implicit defs, spilling them as well.
-    if (const unsigned *ImplicitDefs = MID.ImplicitDefs)
+    if (const unsigned *ImplicitDefs = TID.ImplicitDefs)
       for (unsigned i = 0; ImplicitDefs[i]; ++i) {
         unsigned Reg = ImplicitDefs[i];
 	spillPhysReg(MBB, I, Reg);
@@ -571,9 +571,9 @@
   }
 
   // Rewind the iterator to point to the first flow control instruction...
-  const MachineInstrInfo &MII = TM->getInstrInfo();
+  const TargetInstrInfo &TII = TM->getInstrInfo();
   I = MBB.end()-1;
-  while (I != MBB.begin() && MII.isTerminatorInstr((*(I-1))->getOpcode()))
+  while (I != MBB.begin() && TII.isTerminatorInstr((*(I-1))->getOpcode()))
     --I;
 
   // Spill all physical registers holding virtual registers now.


Index: llvm/lib/CodeGen/RegAllocSimple.cpp
diff -u llvm/lib/CodeGen/RegAllocSimple.cpp:1.37 llvm/lib/CodeGen/RegAllocSimple.cpp:1.38
--- llvm/lib/CodeGen/RegAllocSimple.cpp:1.37	Sun Jan 12 18:26:08 2003
+++ llvm/lib/CodeGen/RegAllocSimple.cpp	Tue Jan 14 15:58:41 2003
@@ -12,7 +12,7 @@
 #include "llvm/CodeGen/MachineInstr.h"
 #include "llvm/CodeGen/SSARegMap.h"
 #include "llvm/CodeGen/MachineFrameInfo.h"
-#include "llvm/Target/MachineInstrInfo.h"
+#include "llvm/Target/TargetInstrInfo.h"
 #include "llvm/Target/TargetMachine.h"
 #include "Support/Statistic.h"
 #include <iostream>
@@ -150,7 +150,7 @@
     // a preliminary pass that will invalidate any registers that
     // are used by the instruction (including implicit uses)
     unsigned Opcode = MI->getOpcode();
-    const MachineInstrDescriptor &Desc = TM->getInstrInfo().get(Opcode);
+    const TargetInstrDescriptor &Desc = TM->getInstrInfo().get(Opcode);
     if (const unsigned *Regs = Desc.ImplicitUses)
       while (*Regs)
 	RegsUsed[*Regs++] = true;




From lattner at cs.uiuc.edu  Tue Jan 14 15:59:02 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Jan 14 15:59:02 2003
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/InstrSched/InstrScheduling.cpp SchedGraph.cpp
Message-ID: <200301142158.PAA08741@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/CodeGen/InstrSched:

InstrScheduling.cpp updated: 1.49 -> 1.50
SchedGraph.cpp updated: 1.40 -> 1.41

---
Log message:

Rename MachineInstrInfo -> TargetInstrInfo



---
Diffs of the changes:

Index: llvm/lib/CodeGen/InstrSched/InstrScheduling.cpp
diff -u llvm/lib/CodeGen/InstrSched/InstrScheduling.cpp:1.49 llvm/lib/CodeGen/InstrSched/InstrScheduling.cpp:1.50
--- llvm/lib/CodeGen/InstrSched/InstrScheduling.cpp:1.49	Sat Dec 28 21:12:55 2002
+++ llvm/lib/CodeGen/InstrSched/InstrScheduling.cpp	Tue Jan 14 15:58:42 2003
@@ -370,7 +370,7 @@
   // Simplify access to the machine instruction info
   //----------------------------------------------------------------------
   
-  inline const MachineInstrInfo& getInstrInfo	() const {
+  inline const TargetInstrInfo& getInstrInfo	() const {
     return schedInfo.getInstrInfo();
   }
   
@@ -630,7 +630,7 @@
 static void
 RecordSchedule(MachineBasicBlock &MBB, const SchedulingManager& S)
 {
-  const MachineInstrInfo& mii = S.schedInfo.getInstrInfo();
+  const TargetInstrInfo& mii = S.schedInfo.getInstrInfo();
   
 #ifndef NDEBUG
   // Lets make sure we didn't lose any instructions, except possibly
@@ -1075,7 +1075,7 @@
     return false;
   
   // don't put a load-use dependence in the delay slot of a branch
-  const MachineInstrInfo& mii = S.getInstrInfo();
+  const TargetInstrInfo& mii = S.getInstrInfo();
   
   for (SchedGraphNode::const_iterator EI = node->beginInEdges();
        EI != node->endInEdges(); ++EI)
@@ -1143,7 +1143,7 @@
                                     SchedGraphNode* brNode,
                                     vector<SchedGraphNode*>& sdelayNodeVec)
 {
-  const MachineInstrInfo& mii = S.getInstrInfo();
+  const TargetInstrInfo& mii = S.getInstrInfo();
   unsigned ndelays =
     mii.getNumDelaySlots(brNode->getOpCode());
   
@@ -1207,7 +1207,7 @@
                                        SchedGraph* graph)
 {
   vector<SchedGraphNode*> nopNodeVec;   // this will hold unused NOPs
-  const MachineInstrInfo& mii = S.getInstrInfo();
+  const TargetInstrInfo& mii = S.getInstrInfo();
   const MachineInstr* brInstr = node->getMachineInstr();
   unsigned ndelays= mii.getNumDelaySlots(brInstr->getOpCode());
   assert(ndelays > 0 && "Unnecessary call to replace NOPs");
@@ -1283,7 +1283,7 @@
 ChooseInstructionsForDelaySlots(SchedulingManager& S, MachineBasicBlock &MBB,
 				SchedGraph *graph)
 {
-  const MachineInstrInfo& mii = S.getInstrInfo();
+  const TargetInstrInfo& mii = S.getInstrInfo();
 
   Instruction *termInstr = (Instruction*)MBB.getBasicBlock()->getTerminator();
   MachineCodeForInstruction &termMvec=MachineCodeForInstruction::get(termInstr);


Index: llvm/lib/CodeGen/InstrSched/SchedGraph.cpp
diff -u llvm/lib/CodeGen/InstrSched/SchedGraph.cpp:1.40 llvm/lib/CodeGen/InstrSched/SchedGraph.cpp:1.41
--- llvm/lib/CodeGen/InstrSched/SchedGraph.cpp:1.40	Sat Dec 28 21:12:55 2002
+++ llvm/lib/CodeGen/InstrSched/SchedGraph.cpp	Tue Jan 14 15:58:42 2003
@@ -12,7 +12,7 @@
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/Target/TargetRegInfo.h"
 #include "llvm/Target/TargetMachine.h"
-#include "llvm/Target/MachineInstrInfo.h"
+#include "llvm/Target/TargetInstrInfo.h"
 #include "llvm/Function.h"
 #include "llvm/iOther.h"
 #include "Support/StringExtras.h"
@@ -325,7 +325,7 @@
 SchedGraph::addCDEdges(const TerminatorInst* term,
 		       const TargetMachine& target)
 {
-  const MachineInstrInfo& mii = target.getInstrInfo();
+  const TargetInstrInfo& mii = target.getInstrInfo();
   MachineCodeForInstruction &termMvec = MachineCodeForInstruction::get(term);
   
   // Find the first branch instr in the sequence of machine instrs for term
@@ -434,7 +434,7 @@
 SchedGraph::addMemEdges(const vector<SchedGraphNode*>& memNodeVec,
 			const TargetMachine& target)
 {
-  const MachineInstrInfo& mii = target.getInstrInfo();
+  const TargetInstrInfo& mii = target.getInstrInfo();
   
   // Instructions in memNodeVec are in execution order within the basic block,
   // so simply look at all pairs <memNodeVec[i], memNodeVec[j: j > i]>.
@@ -471,7 +471,7 @@
                            MachineBasicBlock& bbMvec,
                            const TargetMachine& target)
 {
-  const MachineInstrInfo& mii = target.getInstrInfo();
+  const TargetInstrInfo& mii = target.getInstrInfo();
   vector<SchedGraphNode*> callNodeVec;
   
   // Find the call instruction nodes and put them in a vector.
@@ -675,7 +675,7 @@
                                   RegToRefVecMap& regToRefVecMap,
                                   ValueToDefVecMap& valueToDefVecMap)
 {
-  const MachineInstrInfo& mii = target.getInstrInfo();
+  const TargetInstrInfo& mii = target.getInstrInfo();
   
   
   MachineOpCode opCode = node->getOpCode();
@@ -732,7 +732,7 @@
                             RegToRefVecMap& regToRefVecMap,
                             ValueToDefVecMap& valueToDefVecMap)
 {
-  const MachineInstrInfo& mii = target.getInstrInfo();
+  const TargetInstrInfo& mii = target.getInstrInfo();
   
   // Build graph nodes for each VM instruction and gather def/use info.
   // Do both those together in a single pass over all machine instructions.




From lattner at cs.uiuc.edu  Tue Jan 14 15:59:03 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Jan 14 15:59:03 2003
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp
Message-ID: <200301142158.PAA08748@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/CodeGen/InstrSelection:

InstrSelectionSupport.cpp updated: 1.41 -> 1.42

---
Log message:

Rename MachineInstrInfo -> TargetInstrInfo


---
Diffs of the changes:

Index: llvm/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp
diff -u llvm/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp:1.41 llvm/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp:1.42
--- llvm/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp:1.41	Sat Dec 28 21:12:57 2002
+++ llvm/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp	Tue Jan 14 15:58:44 2003
@@ -14,7 +14,7 @@
 #include "llvm/CodeGen/InstrForest.h"
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/Target/TargetRegInfo.h"
-#include "llvm/Target/MachineInstrInfo.h"
+#include "llvm/Target/TargetInstrInfo.h"
 #include "llvm/Constants.h"
 #include "llvm/Function.h"
 #include "llvm/DerivedTypes.h"
@@ -470,7 +470,7 @@
   vector<MachineInstr*> loadConstVec;
   
   MachineOpCode opCode = minstr->getOpCode();
-  const MachineInstrInfo& instrInfo = target.getInstrInfo();
+  const TargetInstrInfo& instrInfo = target.getInstrInfo();
   int resultPos = instrInfo.getResultPos(opCode);
   int immedPos = instrInfo.getImmedConstantPos(opCode);
 




From lattner at cs.uiuc.edu  Tue Jan 14 15:59:04 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Jan 14 15:59:04 2003
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/Mapping/StackSlots.cpp
Message-ID: <200301142158.PAA08755@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/CodeGen/Mapping:

StackSlots.cpp updated: 1.4 -> 1.5

---
Log message:

Rename MachineInstrInfo -> TargetInstrInfo



---
Diffs of the changes:

Index: llvm/lib/CodeGen/Mapping/StackSlots.cpp
diff -u llvm/lib/CodeGen/Mapping/StackSlots.cpp:1.4 llvm/lib/CodeGen/Mapping/StackSlots.cpp:1.5
--- llvm/lib/CodeGen/Mapping/StackSlots.cpp:1.4	Sat Dec 28 14:42:56 2002
+++ llvm/lib/CodeGen/Mapping/StackSlots.cpp	Tue Jan 14 15:58:45 2003
@@ -8,16 +8,14 @@
 
 #include "llvm/CodeGen/StackSlots.h"
 #include "llvm/Target/TargetMachine.h"
-#include "llvm/Target/MachineInstrInfo.h"
 #include "llvm/Constant.h"
 #include "llvm/Function.h"
 #include "llvm/DerivedTypes.h"
-#include "llvm/Pass.h"
-#include "llvm/CodeGen/MachineFunction.h"
+#include "llvm/CodeGen/MachineFunctionPass.h"
 #include "llvm/CodeGen/MachineFunctionInfo.h"
 
 namespace {
-  class StackSlots : public FunctionPass {
+  class StackSlots : public MachineFunctionPass {
     const TargetMachine &Target;
   public:
     StackSlots(const TargetMachine &T) : Target(T) {}
@@ -30,12 +28,12 @@
       AU.setPreservesCFG();
     }
     
-    bool runOnFunction(Function &F) {
+    bool runOnMachineFunction(MachineFunction &MF) {
       const Type *PtrInt = PointerType::get(Type::IntTy);
       unsigned Size = Target.getTargetData().getTypeSize(PtrInt);
       
       Value *V = Constant::getNullValue(Type::IntTy);
-      MachineFunction::get(&F).getInfo()->allocateLocalVar(V, 2*Size);
+      MF.getInfo()->allocateLocalVar(V, 2*Size);
       return true;
     }
   };




From lattner at cs.uiuc.edu  Tue Jan 14 15:59:05 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Jan 14 15:59:05 2003
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/PostOpts/PeepholeOpts.cpp
Message-ID: <200301142158.PAA08764@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/CodeGen/PostOpts:

PeepholeOpts.cpp updated: 1.5 -> 1.6

---
Log message:

Rename MachineInstrInfo -> TargetInstrInfo


---
Diffs of the changes:

Index: llvm/lib/CodeGen/PostOpts/PeepholeOpts.cpp
diff -u llvm/lib/CodeGen/PostOpts/PeepholeOpts.cpp:1.5 llvm/lib/CodeGen/PostOpts/PeepholeOpts.cpp:1.6
--- llvm/lib/CodeGen/PostOpts/PeepholeOpts.cpp:1.5	Sat Dec 28 20:50:29 2002
+++ llvm/lib/CodeGen/PostOpts/PeepholeOpts.cpp	Tue Jan 14 15:58:47 2003
@@ -9,7 +9,7 @@
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/MachineInstr.h"
 #include "llvm/Target/TargetMachine.h"
-#include "llvm/Target/MachineInstrInfo.h"
+#include "llvm/Target/TargetInstrInfo.h"
 #include "llvm/Target/TargetOptInfo.h"
 #include "llvm/BasicBlock.h"
 #include "llvm/Pass.h"
@@ -24,7 +24,7 @@
   // Check if this instruction is in a delay slot of its predecessor.
   if (BBI != mvec.begin())
     {
-      const MachineInstrInfo& mii = target.getInstrInfo();
+      const TargetInstrInfo& mii = target.getInstrInfo();
       MachineInstr* predMI = *(BBI-1);
       if (unsigned ndelay = mii.getNumDelaySlots(predMI->getOpCode()))
         {




From lattner at cs.uiuc.edu  Tue Jan 14 15:59:06 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Jan 14 15:59:06 2003
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/PreOpts/PreSelection.cpp
Message-ID: <200301142158.PAA08771@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/CodeGen/PreOpts:

PreSelection.cpp updated: 1.6 -> 1.7

---
Log message:

Rename MachineInstrInfo -> TargetInstrInfo



---
Diffs of the changes:

Index: llvm/lib/CodeGen/PreOpts/PreSelection.cpp
diff -u llvm/lib/CodeGen/PreOpts/PreSelection.cpp:1.6 llvm/lib/CodeGen/PreOpts/PreSelection.cpp:1.7
--- llvm/lib/CodeGen/PreOpts/PreSelection.cpp:1.6	Tue Jan 14 14:32:10 2003
+++ llvm/lib/CodeGen/PreOpts/PreSelection.cpp	Tue Jan 14 15:58:48 2003
@@ -10,7 +10,7 @@
 
 #include "llvm/CodeGen/PreSelection.h"
 #include "llvm/Target/TargetMachine.h"
-#include "llvm/Target/MachineInstrInfo.h"
+#include "llvm/Target/TargetInstrInfo.h"
 #include "llvm/Transforms/Scalar.h"
 #include "llvm/Support/InstVisitor.h"
 #include "llvm/Module.h"




From lattner at cs.uiuc.edu  Tue Jan 14 15:59:07 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Jan 14 15:59:07 2003
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/RegAlloc/LiveRangeInfo.cpp PhyRegAlloc.cpp
Message-ID: <200301142158.PAA08780@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/CodeGen/RegAlloc:

LiveRangeInfo.cpp updated: 1.36 -> 1.37
PhyRegAlloc.cpp updated: 1.89 -> 1.90

---
Log message:

Rename MachineInstrInfo -> TargetInstrInfo


---
Diffs of the changes:

Index: llvm/lib/CodeGen/RegAlloc/LiveRangeInfo.cpp
diff -u llvm/lib/CodeGen/RegAlloc/LiveRangeInfo.cpp:1.36 llvm/lib/CodeGen/RegAlloc/LiveRangeInfo.cpp:1.37
--- llvm/lib/CodeGen/RegAlloc/LiveRangeInfo.cpp:1.36	Tue Oct 29 11:03:17 2002
+++ llvm/lib/CodeGen/RegAlloc/LiveRangeInfo.cpp	Tue Jan 14 15:58:49 2003
@@ -11,7 +11,7 @@
 #include "llvm/CodeGen/MachineInstr.h"
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/Target/TargetMachine.h"
-#include "llvm/Target/MachineInstrInfo.h"
+#include "llvm/Target/TargetInstrInfo.h"
 #include "llvm/Function.h"
 #include "Support/SetOperations.h"
 using std::cerr;


Index: llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp
diff -u llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp:1.89 llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp:1.90
--- llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp:1.89	Sat Dec 28 15:00:19 2002
+++ llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp	Tue Jan 14 15:58:49 2003
@@ -16,7 +16,7 @@
 #include "llvm/Analysis/LoopInfo.h"
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/Target/TargetFrameInfo.h"
-#include "llvm/Target/MachineInstrInfo.h"
+#include "llvm/Target/TargetInstrInfo.h"
 #include "llvm/Function.h"
 #include "llvm/Type.h"
 #include "llvm/iOther.h"




From lattner at cs.uiuc.edu  Tue Jan 14 16:00:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Jan 14 16:00:01 2003
Subject: [llvm-commits] CVS: llvm/lib/Target/MachineInstrInfo.cpp
Message-ID: <200301142159.PAA08798@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Target:

MachineInstrInfo.cpp updated: 1.6 -> 1.7

---
Log message:

Rename MachineInstrInfo -> TargetInstrInfo


---
Diffs of the changes:

Index: llvm/lib/Target/MachineInstrInfo.cpp
diff -u llvm/lib/Target/MachineInstrInfo.cpp:1.6 llvm/lib/Target/MachineInstrInfo.cpp:1.7
--- llvm/lib/Target/MachineInstrInfo.cpp:1.6	Sun Jan 12 18:26:36 2003
+++ llvm/lib/Target/MachineInstrInfo.cpp	Tue Jan 14 15:59:13 2003
@@ -3,7 +3,7 @@
 //
 //===----------------------------------------------------------------------===//
 
-#include "llvm/Target/MachineInstrInfo.h"
+#include "llvm/Target/TargetInstrInfo.h"
 #include "llvm/CodeGen/MachineInstr.h"
 #include "llvm/Constant.h"
 #include "llvm/DerivedTypes.h"




From lattner at cs.uiuc.edu  Tue Jan 14 16:00:02 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Jan 14 16:00:02 2003
Subject: [llvm-commits] CVS: llvm/lib/Target/Sparc/PrologEpilogCodeInserter.cpp Sparc.cpp SparcInstr.def SparcInstrInfo.cpp SparcInternals.h
Message-ID: <200301142159.PAA08813@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Target/Sparc:

PrologEpilogCodeInserter.cpp updated: 1.20 -> 1.21
Sparc.cpp updated: 1.59 -> 1.60
SparcInstr.def updated: 1.14 -> 1.15
SparcInstrInfo.cpp updated: 1.33 -> 1.34
SparcInternals.h updated: 1.77 -> 1.78

---
Log message:

Rename MachineInstrInfo -> TargetInstrInfo



---
Diffs of the changes:

Index: llvm/lib/Target/Sparc/PrologEpilogCodeInserter.cpp
diff -u llvm/lib/Target/Sparc/PrologEpilogCodeInserter.cpp:1.20 llvm/lib/Target/Sparc/PrologEpilogCodeInserter.cpp:1.21
--- llvm/lib/Target/Sparc/PrologEpilogCodeInserter.cpp:1.20	Sat Dec 28 14:16:08 2002
+++ llvm/lib/Target/Sparc/PrologEpilogCodeInserter.cpp	Tue Jan 14 15:59:15 2003
@@ -96,7 +96,7 @@
 void InsertPrologEpilogCode::InsertEpilogCode(MachineFunction &MF)
 {
   const TargetMachine &TM = MF.getTarget();
-  const MachineInstrInfo &MII = TM.getInstrInfo();
+  const TargetInstrInfo &MII = TM.getInstrInfo();
 
   for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) {
     MachineBasicBlock &MBB = *I;


Index: llvm/lib/Target/Sparc/Sparc.cpp
diff -u llvm/lib/Target/Sparc/Sparc.cpp:1.59 llvm/lib/Target/Sparc/Sparc.cpp:1.60
--- llvm/lib/Target/Sparc/Sparc.cpp:1.59	Sat Dec 28 14:17:43 2002
+++ llvm/lib/Target/Sparc/Sparc.cpp	Tue Jan 14 15:59:15 2003
@@ -26,7 +26,7 @@
 
 static const unsigned ImplicitRegUseList[] = { 0 }; /* not used yet */
 // Build the MachineInstruction Description Array...
-const MachineInstrDescriptor SparcMachineInstrDesc[] = {
+const TargetInstrDescriptor SparcMachineInstrDesc[] = {
 #define I(ENUM, OPCODESTRING, NUMOPERANDS, RESULTPOS, MAXIMM, IMMSE, \
           NUMDELAYSLOTS, LATENCY, SCHEDCLASS, INSTFLAGS)             \
   { OPCODESTRING, NUMOPERANDS, RESULTPOS, MAXIMM, IMMSE,             \
@@ -124,7 +124,7 @@
 //   Primary interface to machine description for the UltraSPARC.
 //   Primarily just initializes machine-dependent parameters in
 //   class TargetMachine, and creates machine-dependent subclasses
-//   for classes such as MachineInstrInfo. 
+//   for classes such as TargetInstrInfo. 
 // 
 //---------------------------------------------------------------------------
 


Index: llvm/lib/Target/Sparc/SparcInstr.def
diff -u llvm/lib/Target/Sparc/SparcInstr.def:1.14 llvm/lib/Target/Sparc/SparcInstr.def:1.15
--- llvm/lib/Target/Sparc/SparcInstr.def:1.14	Mon Oct 28 15:17:20 2002
+++ llvm/lib/Target/Sparc/SparcInstr.def	Tue Jan 14 15:59:15 2003
@@ -35,7 +35,7 @@
 //                                numDelaySlots (in cycles)
 //					latency (in cycles)
 //					    instr sched class (defined above)
-//						instr class flags (defined in MachineInstrInfo.h)
+//						instr class flags (defined in TargetInstrInfo.h)
 
 
 


Index: llvm/lib/Target/Sparc/SparcInstrInfo.cpp
diff -u llvm/lib/Target/Sparc/SparcInstrInfo.cpp:1.33 llvm/lib/Target/Sparc/SparcInstrInfo.cpp:1.34
--- llvm/lib/Target/Sparc/SparcInstrInfo.cpp:1.33	Sat Dec 28 14:18:21 2002
+++ llvm/lib/Target/Sparc/SparcInstrInfo.cpp	Tue Jan 14 15:59:15 2003
@@ -321,14 +321,14 @@
 //   Information about individual instructions.
 //   Most information is stored in the SparcMachineInstrDesc array above.
 //   Other information is computed on demand, and most such functions
-//   default to member functions in base class MachineInstrInfo. 
+//   default to member functions in base class TargetInstrInfo. 
 //---------------------------------------------------------------------------
 
 /*ctor*/
 UltraSparcInstrInfo::UltraSparcInstrInfo()
-  : MachineInstrInfo(SparcMachineInstrDesc,
-		     /*descSize = */ NUM_TOTAL_OPCODES,
-		     /*numRealOpCodes = */ NUM_REAL_OPCODES)
+  : TargetInstrInfo(SparcMachineInstrDesc,
+                    /*descSize = */ NUM_TOTAL_OPCODES,
+                    /*numRealOpCodes = */ NUM_REAL_OPCODES)
 {
   InitializeMaxConstantsTable();
 }


Index: llvm/lib/Target/Sparc/SparcInternals.h
diff -u llvm/lib/Target/Sparc/SparcInternals.h:1.77 llvm/lib/Target/Sparc/SparcInternals.h:1.78
--- llvm/lib/Target/Sparc/SparcInternals.h:1.77	Sat Dec 28 21:13:02 2002
+++ llvm/lib/Target/Sparc/SparcInternals.h	Tue Jan 14 15:59:15 2003
@@ -41,7 +41,7 @@
 
 //---------------------------------------------------------------------------
 // enum SparcMachineOpCode. 
-// const MachineInstrDescriptor SparcMachineInstrDesc[]
+// const TargetInstrDescriptor SparcMachineInstrDesc[]
 // 
 // Purpose:
 //   Description of UltraSparc machine instructions.
@@ -62,7 +62,7 @@
 
 
 // Array of machine instruction descriptions...
-extern const MachineInstrDescriptor SparcMachineInstrDesc[];
+extern const TargetInstrDescriptor SparcMachineInstrDesc[];
 
 
 //---------------------------------------------------------------------------
@@ -72,10 +72,10 @@
 //   Information about individual instructions.
 //   Most information is stored in the SparcMachineInstrDesc array above.
 //   Other information is computed on demand, and most such functions
-//   default to member functions in base class MachineInstrInfo. 
+//   default to member functions in base class TargetInstrInfo. 
 //---------------------------------------------------------------------------
 
-struct UltraSparcInstrInfo : public MachineInstrInfo {
+struct UltraSparcInstrInfo : public TargetInstrInfo {
   UltraSparcInstrInfo();
 
   //
@@ -733,7 +733,7 @@
 public:
   UltraSparc();
 
-  virtual const MachineInstrInfo &getInstrInfo() const { return instrInfo; }
+  virtual const TargetInstrInfo  &getInstrInfo() const { return instrInfo; }
   virtual const TargetSchedInfo  &getSchedInfo() const { return schedInfo; }
   virtual const TargetRegInfo    &getRegInfo()   const { return regInfo; }
   virtual const TargetFrameInfo  &getFrameInfo() const { return frameInfo; }




From lattner at cs.uiuc.edu  Tue Jan 14 16:00:03 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Jan 14 16:00:03 2003
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/FloatingPoint.cpp InstSelectSimple.cpp MachineCodeEmitter.cpp Printer.cpp X86InstrInfo.cpp X86InstrInfo.def X86InstrInfo.h
Message-ID: <200301142159.PAA08832@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Target/X86:

FloatingPoint.cpp updated: 1.1 -> 1.2
InstSelectSimple.cpp updated: 1.81 -> 1.82
MachineCodeEmitter.cpp updated: 1.18 -> 1.19
Printer.cpp updated: 1.33 -> 1.34
X86InstrInfo.cpp updated: 1.11 -> 1.12
X86InstrInfo.def updated: 1.48 -> 1.49
X86InstrInfo.h updated: 1.20 -> 1.21

---
Log message:

Rename MachineInstrInfo -> TargetInstrInfo


---
Diffs of the changes:

Index: llvm/lib/Target/X86/FloatingPoint.cpp
diff -u llvm/lib/Target/X86/FloatingPoint.cpp:1.1 llvm/lib/Target/X86/FloatingPoint.cpp:1.2
--- llvm/lib/Target/X86/FloatingPoint.cpp:1.1	Sun Jan 12 19:01:59 2003
+++ llvm/lib/Target/X86/FloatingPoint.cpp	Tue Jan 14 15:59:16 2003
@@ -10,7 +10,7 @@
 #include "llvm/CodeGen/MachineFunctionPass.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
 #include "llvm/CodeGen/LiveVariables.h"
-#include "llvm/Target/MachineInstrInfo.h"
+#include "llvm/Target/TargetInstrInfo.h"
 #include "llvm/Target/TargetMachine.h"
 #include "Support/Statistic.h"
 #include <algorithm>


Index: llvm/lib/Target/X86/InstSelectSimple.cpp
diff -u llvm/lib/Target/X86/InstSelectSimple.cpp:1.81 llvm/lib/Target/X86/InstSelectSimple.cpp:1.82
--- llvm/lib/Target/X86/InstSelectSimple.cpp:1.81	Sun Jan 12 18:32:26 2003
+++ llvm/lib/Target/X86/InstSelectSimple.cpp	Tue Jan 14 15:59:16 2003
@@ -437,7 +437,7 @@
 /// the current one.
 ///
 void ISel::SelectPHINodes() {
-  const MachineInstrInfo &MII = TM.getInstrInfo();
+  const TargetInstrInfo &TII = TM.getInstrInfo();
   const Function &LF = *F->getFunction();  // The LLVM function...
   for (Function::const_iterator I = LF.begin(), E = LF.end(); I != E; ++I) {
     const BasicBlock *BB = I;
@@ -468,7 +468,7 @@
         //
 	MachineBasicBlock::iterator PI = PredMBB->end();
 	while (PI != PredMBB->begin() &&
-	       MII.isTerminatorInstr((*(PI-1))->getOpcode()))
+	       TII.isTerminatorInstr((*(PI-1))->getOpcode()))
 	  --PI;
 	unsigned ValReg = getReg(PN->getIncomingValue(i), PredMBB, PI);
 	PhiMI->addRegOperand(ValReg);


Index: llvm/lib/Target/X86/MachineCodeEmitter.cpp
diff -u llvm/lib/Target/X86/MachineCodeEmitter.cpp:1.18 llvm/lib/Target/X86/MachineCodeEmitter.cpp:1.19
--- llvm/lib/Target/X86/MachineCodeEmitter.cpp:1.18	Sun Jan 12 18:33:59 2003
+++ llvm/lib/Target/X86/MachineCodeEmitter.cpp	Tue Jan 14 15:59:16 2003
@@ -220,7 +220,7 @@
   }
 }
 
-unsigned sizeOfPtr (const MachineInstrDescriptor &Desc) {
+unsigned sizeOfPtr(const TargetInstrDescriptor &Desc) {
   switch (Desc.TSFlags & X86II::ArgMask) {
   case X86II::Arg8:   return 1;
   case X86II::Arg16:  return 2;
@@ -236,7 +236,7 @@
 
 void Emitter::emitInstruction(MachineInstr &MI) {
   unsigned Opcode = MI.getOpcode();
-  const MachineInstrDescriptor &Desc = II->get(Opcode);
+  const TargetInstrDescriptor &Desc = II->get(Opcode);
 
   // Emit instruction prefixes if neccesary
   if (Desc.TSFlags & X86II::OpSize) MCE.emitByte(0x66);// Operand size...


Index: llvm/lib/Target/X86/Printer.cpp
diff -u llvm/lib/Target/X86/Printer.cpp:1.33 llvm/lib/Target/X86/Printer.cpp:1.34
--- llvm/lib/Target/X86/Printer.cpp:1.33	Sun Jan 12 18:35:03 2003
+++ llvm/lib/Target/X86/Printer.cpp	Tue Jan 14 15:59:16 2003
@@ -59,7 +59,7 @@
 bool Printer::runOnMachineFunction(MachineFunction &MF) {
   static unsigned BBNumber = 0;
   const TargetMachine &TM = MF.getTarget();
-  const MachineInstrInfo &MII = TM.getInstrInfo();
+  const TargetInstrInfo &TII = TM.getInstrInfo();
 
   // Print out constants referenced by the function
   printConstantPool(MF.getConstantPool(), TM.getTargetData());
@@ -80,7 +80,7 @@
 	 II != E; ++II) {
       // Print the assembly for the instruction.
       O << "\t";
-      MII.print(*II, O, TM);
+      TII.print(*II, O, TM);
     }
   }
 
@@ -136,7 +136,7 @@
   }
 }
 
-static const std::string sizePtr(const MachineInstrDescriptor &Desc) {
+static const std::string sizePtr(const TargetInstrDescriptor &Desc) {
   switch (Desc.TSFlags & X86II::ArgMask) {
     default: assert(0 && "Unknown arg size!");
     case X86II::Arg8:   return "BYTE PTR"; 
@@ -204,7 +204,7 @@
 void X86InstrInfo::print(const MachineInstr *MI, std::ostream &O,
                          const TargetMachine &TM) const {
   unsigned Opcode = MI->getOpcode();
-  const MachineInstrDescriptor &Desc = get(Opcode);
+  const TargetInstrDescriptor &Desc = get(Opcode);
 
   switch (Desc.TSFlags & X86II::FormMask) {
   case X86II::Pseudo:


Index: llvm/lib/Target/X86/X86InstrInfo.cpp
diff -u llvm/lib/Target/X86/X86InstrInfo.cpp:1.11 llvm/lib/Target/X86/X86InstrInfo.cpp:1.12
--- llvm/lib/Target/X86/X86InstrInfo.cpp:1.11	Tue Dec 17 19:05:54 2002
+++ llvm/lib/Target/X86/X86InstrInfo.cpp	Tue Jan 14 15:59:16 2003
@@ -1,6 +1,6 @@
 //===- X86InstrInfo.cpp - X86 Instruction Information -----------*- C++ -*-===//
 //
-// This file contains the X86 implementation of the MachineInstrInfo class.
+// This file contains the X86 implementation of the TargetInstrInfo class.
 //
 //===----------------------------------------------------------------------===//
 
@@ -17,7 +17,7 @@
 // X86Insts - Turn the InstrInfo.def file into a bunch of instruction
 // descriptors
 //
-static const MachineInstrDescriptor X86Insts[] = {
+static const TargetInstrDescriptor X86Insts[] = {
 #define I(ENUM, NAME, BASEOPCODE, FLAGS, TSFLAGS, IMPUSES, IMPDEFS)   \
              { NAME,                    \
                -1, /* Always vararg */  \
@@ -35,7 +35,7 @@
 };
 
 X86InstrInfo::X86InstrInfo()
-  : MachineInstrInfo(X86Insts, sizeof(X86Insts)/sizeof(X86Insts[0]), 0) {
+  : TargetInstrInfo(X86Insts, sizeof(X86Insts)/sizeof(X86Insts[0]), 0) {
 }
 
 


Index: llvm/lib/Target/X86/X86InstrInfo.def
diff -u llvm/lib/Target/X86/X86InstrInfo.def:1.48 llvm/lib/Target/X86/X86InstrInfo.def:1.49
--- llvm/lib/Target/X86/X86InstrInfo.def:1.48	Sun Jan 12 18:48:46 2003
+++ llvm/lib/Target/X86/X86InstrInfo.def	Tue Jan 14 15:59:16 2003
@@ -51,7 +51,7 @@
 //  #2: Opcode name, as used by the gnu assembler
 //  #3: The base opcode for the instruction
 //  #4: Instruction Flags - This should be a field or'd together that contains
-//      constants from the MachineInstrInfo.h file.
+//      constants from the TargetInstrInfo.h file.
 //  #5: Target Specific Flags - Another bitfield containing X86 specific flags
 //      that we are interested in for each instruction.  These should be flags
 //      defined in X86InstrInfo.h in the X86II namespace.


Index: llvm/lib/Target/X86/X86InstrInfo.h
diff -u llvm/lib/Target/X86/X86InstrInfo.h:1.20 llvm/lib/Target/X86/X86InstrInfo.h:1.21
--- llvm/lib/Target/X86/X86InstrInfo.h:1.20	Sun Jan 12 18:49:24 2003
+++ llvm/lib/Target/X86/X86InstrInfo.h	Tue Jan 14 15:59:16 2003
@@ -1,13 +1,13 @@
 //===- X86InstructionInfo.h - X86 Instruction Information ---------*-C++-*-===//
 //
-// This file contains the X86 implementation of the MachineInstrInfo class.
+// This file contains the X86 implementation of the TargetInstrInfo class.
 //
 //===----------------------------------------------------------------------===//
 
 #ifndef X86INSTRUCTIONINFO_H
 #define X86INSTRUCTIONINFO_H
 
-#include "llvm/Target/MachineInstrInfo.h"
+#include "llvm/Target/TargetInstrInfo.h"
 #include "X86RegisterInfo.h"
 
 /// X86II - This namespace holds all of the target specific flags that
@@ -137,12 +137,12 @@
   };
 }
 
-class X86InstrInfo : public MachineInstrInfo {
+class X86InstrInfo : public TargetInstrInfo {
   const X86RegisterInfo RI;
 public:
   X86InstrInfo();
 
-  /// getRegisterInfo - MachineInstrInfo is a superset of MRegister info.  As
+  /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info.  As
   /// such, whenever a client has an instance of instruction info, it should
   /// always be able to get register info as well (through this method).
   ///




From lattner at cs.uiuc.edu  Tue Jan 14 16:01:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Jan 14 16:01:01 2003
Subject: [llvm-commits] CVS: llvm/include/llvm/Target/TargetInstrInfo.h TargetRegInfo.h TargetSchedInfo.h
Message-ID: <200301142200.QAA08864@apoc.cs.uiuc.edu>


Changes in directory llvm/include/llvm/Target:

TargetInstrInfo.h updated: 1.41 -> 1.42
TargetRegInfo.h updated: 1.30 -> 1.31
TargetSchedInfo.h updated: 1.13 -> 1.14

---
Log message:

Rename MachineInstrInfo -> TargetInstrInfo


---
Diffs of the changes:

Index: llvm/include/llvm/Target/TargetInstrInfo.h
diff -u llvm/include/llvm/Target/TargetInstrInfo.h:1.41 llvm/include/llvm/Target/TargetInstrInfo.h:1.42
--- llvm/include/llvm/Target/TargetInstrInfo.h:1.41	Sun Jan 12 18:21:19 2003
+++ llvm/include/llvm/Target/TargetInstrInfo.h	Tue Jan 14 15:59:58 2003
@@ -4,8 +4,8 @@
 //
 //===----------------------------------------------------------------------===//
 
-#ifndef LLVM_TARGET_MACHINEINSTRINFO_H
-#define LLVM_TARGET_MACHINEINSTRINFO_H
+#ifndef LLVM_TARGET_TARGETINSTRINFO_H
+#define LLVM_TARGET_TARGETINSTRINFO_H
 
 #include "Support/DataTypes.h"
 #include <vector>
@@ -29,14 +29,10 @@
 
 
 //---------------------------------------------------------------------------
-// struct MachineInstrDescriptor:
+// struct TargetInstrDescriptor:
 //	Predefined information about each machine instruction.
 //	Designed to initialized statically.
-// 
-// class MachineInstructionInfo
-//	Interface to description of machine instructions
-// 
-//---------------------------------------------------------------------------
+//
 
 const unsigned M_NOP_FLAG		= 1 << 0;
 const unsigned M_BRANCH_FLAG		= 1 << 1;
@@ -78,8 +74,11 @@
   const unsigned *ImplicitDefs;  // Registers implicitly defined by this instr
 };
 
-typedef TargetInstrDescriptor MachineInstrDescriptor;
 
+//---------------------------------------------------------------------------
+/// 
+/// TargetInstrInfo - Interface to description of machine instructions
+/// 
 class TargetInstrInfo {
   const TargetInstrDescriptor* desc;    // raw array to allow static init'n
   unsigned descSize;                    // number of entries in the desc array
@@ -380,7 +379,5 @@
     abort();
   }
 };
-
-typedef TargetInstrInfo MachineInstrInfo;
 
 #endif


Index: llvm/include/llvm/Target/TargetRegInfo.h
diff -u llvm/include/llvm/Target/TargetRegInfo.h:1.30 llvm/include/llvm/Target/TargetRegInfo.h:1.31
--- llvm/include/llvm/Target/TargetRegInfo.h:1.30	Sat Dec 28 21:12:54 2002
+++ llvm/include/llvm/Target/TargetRegInfo.h	Tue Jan 14 15:59:58 2003
@@ -126,7 +126,7 @@
 
   // The following methods are used to generate "copy" machine instructions
   // for an architecture. Currently they are used in TargetRegClass 
-  // interface. However, they can be moved to MachineInstrInfo interface if
+  // interface. However, they can be moved to TargetInstrInfo interface if
   // necessary.
   //
   // The function regTypeNeedsScratchReg() can be used to check whether a


Index: llvm/include/llvm/Target/TargetSchedInfo.h
diff -u llvm/include/llvm/Target/TargetSchedInfo.h:1.13 llvm/include/llvm/Target/TargetSchedInfo.h:1.14
--- llvm/include/llvm/Target/TargetSchedInfo.h:1.13	Sat Dec 28 21:12:54 2002
+++ llvm/include/llvm/Target/TargetSchedInfo.h	Tue Jan 14 15:59:58 2003
@@ -7,7 +7,7 @@
 #ifndef LLVM_TARGET_TARGETSCHEDINFO_H
 #define LLVM_TARGET_TARGETSCHEDINFO_H
 
-#include "llvm/Target/MachineInstrInfo.h"
+#include "llvm/Target/TargetInstrInfo.h"
 #include "Support/hash_map"
 #include <string>
 
@@ -211,7 +211,7 @@
 					 unsigned _numIssueDeltas);
   /*dtor*/ virtual ~TargetSchedInfo() {}
   
-  inline const MachineInstrInfo& getInstrInfo() const {
+  inline const TargetInstrInfo& getInstrInfo() const {
     return *mii;
   }
   
@@ -283,7 +283,7 @@
   
 protected:
   unsigned	           numSchedClasses;
-  const MachineInstrInfo*  mii;
+  const TargetInstrInfo*   mii;
   const	InstrClassRUsage*  classRUsages;        // raw array by sclass
   const	InstrRUsageDelta*  usageDeltas;	        // raw array [1:numUsageDeltas]
   const InstrIssueDelta*   issueDeltas;	        // raw array [1:numIssueDeltas]




From lattner at cs.uiuc.edu  Tue Jan 14 16:01:02 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Jan 14 16:01:02 2003
Subject: [llvm-commits] CVS: llvm/include/llvm/Target/MachineInstrInfo.h
Message-ID: <200301142200.QAA08890@apoc.cs.uiuc.edu>


Changes in directory llvm/include/llvm/Target:

MachineInstrInfo.h (r1.41) removed

---
Log message:

Rename MachineInstrInfo -> TargetInstrInfo


---
Diffs of the changes:



From lattner at cs.uiuc.edu  Tue Jan 14 16:20:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Jan 14 16:20:01 2003
Subject: [llvm-commits] CVS: llvm/lib/VMCore/Verifier.cpp iMemory.cpp
Message-ID: <200301142219.QAA09214@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/VMCore:

Verifier.cpp updated: 1.43 -> 1.44
iMemory.cpp updated: 1.28 -> 1.29

---
Log message:

Fix bug Regression/Verifier/2002-11-05-GetelementptrPointers.ll


---
Diffs of the changes:

Index: llvm/lib/VMCore/Verifier.cpp
diff -u llvm/lib/VMCore/Verifier.cpp:1.43 llvm/lib/VMCore/Verifier.cpp:1.44
--- llvm/lib/VMCore/Verifier.cpp:1.43	Thu Nov 21 10:54:22 2002
+++ llvm/lib/VMCore/Verifier.cpp	Tue Jan 14 16:19:44 2003
@@ -23,7 +23,6 @@
 //  * All Instructions must be embeded into a basic block
 //  . Function's cannot take a void typed parameter
 //  * Verify that a function's argument list agrees with it's declared type.
-//  . Verify that arrays and structures have fixed elements: No unsized arrays.
 //  * It is illegal to specify a name for a void value.
 //  * It is illegal to have a internal global value with no intitalizer
 //  * It is illegal to have a ret instruction that returns a value that does not


Index: llvm/lib/VMCore/iMemory.cpp
diff -u llvm/lib/VMCore/iMemory.cpp:1.28 llvm/lib/VMCore/iMemory.cpp:1.29
--- llvm/lib/VMCore/iMemory.cpp:1.28	Fri Sep 13 17:28:30 2002
+++ llvm/lib/VMCore/iMemory.cpp	Tue Jan 14 16:19:44 2003
@@ -116,16 +116,18 @@
   // Handle the special case of the empty set index set...
   if (Idx.empty()) return cast<PointerType>(Ptr)->getElementType();
  
-  unsigned CurIDX = 0;
+  unsigned CurIdx = 0;
   while (const CompositeType *CT = dyn_cast<CompositeType>(Ptr)) {
-    if (Idx.size() == CurIDX) {
+    if (Idx.size() == CurIdx) {
       if (AllowCompositeLeaf || CT->isFirstClassType()) return Ptr;
       return 0;   // Can't load a whole structure or array!?!?
     }
 
-    Value *Index = Idx[CurIDX++];
+    Value *Index = Idx[CurIdx++];
+    if (isa<PointerType>(CT) && CurIdx != 1)
+      return 0;  // Can only index into pointer types at the first index!
     if (!CT->indexValid(Index)) return 0;
     Ptr = CT->getTypeAtIndex(Index);
   }
-  return CurIDX == Idx.size() ? Ptr : 0;
+  return CurIdx == Idx.size() ? Ptr : 0;
 }




From lattner at cs.uiuc.edu  Tue Jan 14 16:29:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Jan 14 16:29:01 2003
Subject: [llvm-commits] CVS: llvm/include/llvm/Transforms/Instrumentation/ProfilePaths.h
Message-ID: <200301142228.QAA09396@apoc.cs.uiuc.edu>


Changes in directory llvm/include/llvm/Transforms/Instrumentation:

ProfilePaths.h (r1.2) removed

---
Log message:

Remove unused header


---
Diffs of the changes:



From lattner at cs.uiuc.edu  Tue Jan 14 16:31:00 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Jan 14 16:31:00 2003
Subject: [llvm-commits] CVS: llvm/include/llvm/Transforms/Instrumentation/EmitFunctions.h
Message-ID: <200301142230.QAA09447@apoc.cs.uiuc.edu>


Changes in directory llvm/include/llvm/Transforms/Instrumentation:

EmitFunctions.h (r1.1) removed

---
Log message:

REmove unused header file


---
Diffs of the changes:



From lattner at cs.uiuc.edu  Tue Jan 14 16:35:00 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Jan 14 16:35:00 2003
Subject: [llvm-commits] CVS: llvm/lib/Transforms/Instrumentation/ProfilePaths/EdgeCode.cpp Graph.cpp GraphAuxillary.cpp ProfilePaths.cpp RetracePath.cpp
Message-ID: <200301142234.QAA09571@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Transforms/Instrumentation/ProfilePaths:

EdgeCode.cpp updated: 1.17 -> 1.18
Graph.cpp updated: 1.7 -> 1.8
GraphAuxillary.cpp updated: 1.13 -> 1.14
ProfilePaths.cpp updated: 1.23 -> 1.24
RetracePath.cpp updated: 1.1 -> 1.2

---
Log message:

Clean up #includes
Move graph.h into local directory


---
Diffs of the changes:

Index: llvm/lib/Transforms/Instrumentation/ProfilePaths/EdgeCode.cpp
diff -u llvm/lib/Transforms/Instrumentation/ProfilePaths/EdgeCode.cpp:1.17 llvm/lib/Transforms/Instrumentation/ProfilePaths/EdgeCode.cpp:1.18
--- llvm/lib/Transforms/Instrumentation/ProfilePaths/EdgeCode.cpp:1.17	Fri Sep 20 11:43:38 2002
+++ llvm/lib/Transforms/Instrumentation/ProfilePaths/EdgeCode.cpp	Tue Jan 14 16:33:56 2003
@@ -7,7 +7,7 @@
 //top block of cfg
 //===----------------------------------------------------------------------===//
 
-#include "llvm/Transforms/Instrumentation/Graph.h"
+#include "Graph.h"
 #include "llvm/Constants.h"
 #include "llvm/DerivedTypes.h"
 #include "llvm/iMemory.h"
@@ -16,7 +16,6 @@
 #include "llvm/iOperators.h"
 #include "llvm/iPHINode.h"
 #include "llvm/Module.h"
-#include "llvm/Instruction.h"
 #include <stdio.h>
 
 #define INSERT_LOAD_COUNT


Index: llvm/lib/Transforms/Instrumentation/ProfilePaths/Graph.cpp
diff -u llvm/lib/Transforms/Instrumentation/ProfilePaths/Graph.cpp:1.7 llvm/lib/Transforms/Instrumentation/ProfilePaths/Graph.cpp:1.8
--- llvm/lib/Transforms/Instrumentation/ProfilePaths/Graph.cpp:1.7	Tue Oct  1 17:38:37 2002
+++ llvm/lib/Transforms/Instrumentation/ProfilePaths/Graph.cpp	Tue Jan 14 16:33:56 2003
@@ -5,14 +5,11 @@
 //
 //===----------------------------------------------------------------------===//
 
-#include "llvm/Transforms/Instrumentation/Graph.h"
+#include "Graph.h"
 #include "llvm/iTerminators.h"
-#include "llvm/BasicBlock.h"
 #include "Support/Statistic.h"
 #include <algorithm>
 
-//using std::list;
-//using std::set;
 using std::map;
 using std::vector;
 using std::cerr;


Index: llvm/lib/Transforms/Instrumentation/ProfilePaths/GraphAuxillary.cpp
diff -u llvm/lib/Transforms/Instrumentation/ProfilePaths/GraphAuxillary.cpp:1.13 llvm/lib/Transforms/Instrumentation/ProfilePaths/GraphAuxillary.cpp:1.14
--- llvm/lib/Transforms/Instrumentation/ProfilePaths/GraphAuxillary.cpp:1.13	Tue Oct  1 17:38:37 2002
+++ llvm/lib/Transforms/Instrumentation/ProfilePaths/GraphAuxillary.cpp	Tue Jan 14 16:33:56 2003
@@ -7,12 +7,12 @@
 //===----------------------------------------------------------------------===//
 
 #include "llvm/Transforms/Utils/UnifyFunctionExitNodes.h"
-#include "llvm/Transforms/Instrumentation/Graph.h"
 #include "llvm/Pass.h"
 #include "llvm/Module.h"
 #include "llvm/iTerminators.h"
 #include "Support/Statistic.h"
 #include <algorithm>
+#include "Graph.h"
 
 //using std::list;
 using std::map;


Index: llvm/lib/Transforms/Instrumentation/ProfilePaths/ProfilePaths.cpp
diff -u llvm/lib/Transforms/Instrumentation/ProfilePaths/ProfilePaths.cpp:1.23 llvm/lib/Transforms/Instrumentation/ProfilePaths/ProfilePaths.cpp:1.24
--- llvm/lib/Transforms/Instrumentation/ProfilePaths/ProfilePaths.cpp:1.23	Fri Nov  8 18:49:30 2002
+++ llvm/lib/Transforms/Instrumentation/ProfilePaths/ProfilePaths.cpp	Tue Jan 14 16:33:56 2003
@@ -24,16 +24,13 @@
 // update can be collapsed into minimum number of edges.
 //===----------------------------------------------------------------------===//
 
-#include "llvm/Transforms/Instrumentation/ProfilePaths.h"
 #include "llvm/Transforms/Utils/UnifyFunctionExitNodes.h"
-#include "llvm/Transforms/Instrumentation/Graph.h"
 #include "llvm/Support/CFG.h"
 #include "llvm/Constants.h"
 #include "llvm/DerivedTypes.h"
 #include "llvm/iMemory.h"
-#include "llvm/GlobalVariable.h"
 #include "llvm/Module.h"
-#include <iostream>
+#include "Graph.h"
 #include <fstream>
 
 using std::vector;
@@ -50,13 +47,6 @@
 };
 
 static RegisterOpt<ProfilePaths> X("paths", "Profile Paths");
-
-// createProfilePathsPass - Create a new pass to add path profiling
-//
-Pass *createProfilePathsPass() {
-  return new ProfilePaths();
-}
-
 
 static Node *findBB(std::vector<Node *> &st, BasicBlock *BB){
   for(std::vector<Node *>::iterator si=st.begin(); si!=st.end(); ++si){


Index: llvm/lib/Transforms/Instrumentation/ProfilePaths/RetracePath.cpp
diff -u llvm/lib/Transforms/Instrumentation/ProfilePaths/RetracePath.cpp:1.1 llvm/lib/Transforms/Instrumentation/ProfilePaths/RetracePath.cpp:1.2
--- llvm/lib/Transforms/Instrumentation/ProfilePaths/RetracePath.cpp:1.1	Tue Sep 17 22:55:26 2002
+++ llvm/lib/Transforms/Instrumentation/ProfilePaths/RetracePath.cpp	Tue Jan 14 16:33:56 2003
@@ -4,17 +4,11 @@
 //
 //===----------------------------------------------------------------------===//
 
-#include "llvm/Transforms/Instrumentation/Graph.h"
 #include "llvm/Module.h"
-#include "llvm/BasicBlock.h"
 #include "llvm/iTerminators.h"
-#include "llvm/Support/CFG.h"
-#include "llvm/Function.h"
 #include "llvm/iOther.h"
-#include "Support/Casting.h"
-#include <iostream>
-#include <vector>
-#include <map>
+#include "llvm/Support/CFG.h"
+#include "Graph.h"
 
 using std::vector;
 using std::map;




From lattner at cs.uiuc.edu  Tue Jan 14 16:35:02 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Jan 14 16:35:02 2003
Subject: [llvm-commits] CVS: llvm/lib/Transforms/Instrumentation/EmitFunctions.cpp
Message-ID: <200301142234.QAA09585@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Transforms/Instrumentation:

EmitFunctions.cpp updated: 1.3 -> 1.4

---
Log message:

Remove unused header and function


---
Diffs of the changes:

Index: llvm/lib/Transforms/Instrumentation/EmitFunctions.cpp
diff -u llvm/lib/Transforms/Instrumentation/EmitFunctions.cpp:1.3 llvm/lib/Transforms/Instrumentation/EmitFunctions.cpp:1.4
--- llvm/lib/Transforms/Instrumentation/EmitFunctions.cpp:1.3	Fri Jul 26 16:12:36 2002
+++ llvm/lib/Transforms/Instrumentation/EmitFunctions.cpp	Tue Jan 14 16:34:13 2003
@@ -4,7 +4,6 @@
 //
 //===----------------------------------------------------------------------===//
 
-#include "llvm/Transforms/Instrumentation/EmitFunctions.h"
 #include "llvm/Constants.h"
 #include "llvm/DerivedTypes.h"
 #include "llvm/Constants.h"
@@ -18,12 +17,6 @@
   };
   
   RegisterOpt<EmitFunctionTable> X("emitfuncs", "Emit a Function Table");
-}
-
-// Create a new pass to add function table
-//
-Pass *createEmitFunctionTablePass() {
-  return new EmitFunctionTable();
 }
 
 // Per Module pass for inserting function table




From lattner at cs.uiuc.edu  Tue Jan 14 16:35:03 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Jan 14 16:35:03 2003
Subject: [llvm-commits] CVS: llvm/lib/Reoptimizer/LightWtProfiling/Instrument/InstLoops.cpp
Message-ID: <200301142234.QAA09597@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Reoptimizer/LightWtProfiling/Instrument:

InstLoops.cpp updated: 1.1 -> 1.2

---
Log message:

Fix typeo


---
Diffs of the changes:

Index: llvm/lib/Reoptimizer/LightWtProfiling/Instrument/InstLoops.cpp
diff -u llvm/lib/Reoptimizer/LightWtProfiling/Instrument/InstLoops.cpp:1.1 llvm/lib/Reoptimizer/LightWtProfiling/Instrument/InstLoops.cpp:1.2
--- llvm/lib/Reoptimizer/LightWtProfiling/Instrument/InstLoops.cpp:1.1	Sat Nov  2 19:45:20 2002
+++ llvm/lib/Reoptimizer/LightWtProfiling/Instrument/InstLoops.cpp	Tue Jan 14 16:34:36 2003
@@ -33,7 +33,7 @@
 
 static RegisterOpt<InstLoops> X("instloops", "Instrument backedges for profiling");
 
-// createProfilePathsPass - Create a new pass to add path profiling
+// createInstLoopsPass - Create a new pass to add path profiling
 //
 Pass *createInstLoopsPass() {
   return new InstLoops();




From lattner at cs.uiuc.edu  Tue Jan 14 16:37:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Jan 14 16:37:01 2003
Subject: [llvm-commits] CVS: llvm/include/llvm/Transforms/Instrumentation/TraceValues.h
Message-ID: <200301142236.QAA09618@apoc.cs.uiuc.edu>


Changes in directory llvm/include/llvm/Transforms/Instrumentation:

TraceValues.h (r1.9) removed

---
Log message:

Move to Instrumentation.h


---
Diffs of the changes:



From lattner at cs.uiuc.edu  Tue Jan 14 16:38:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Jan 14 16:38:01 2003
Subject: [llvm-commits] CVS: llvm/include/llvm/Transforms/Instrumentation.h
Message-ID: <200301142237.QAA09632@apoc.cs.uiuc.edu>


Changes in directory llvm/include/llvm/Transforms:

Instrumentation.h added (r1.1)

---
Log message:

New header


---
Diffs of the changes:



From lattner at cs.uiuc.edu  Tue Jan 14 16:40:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Jan 14 16:40:01 2003
Subject: [llvm-commits] CVS: llvm/lib/Transforms/Instrumentation/EmitFunctions.cpp TraceValues.cpp
Message-ID: <200301142239.QAA10189@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Transforms/Instrumentation:

EmitFunctions.cpp updated: 1.4 -> 1.5
TraceValues.cpp updated: 1.52 -> 1.53

---
Log message:

Rename include/llvm/Transforms/Instrumentation/TraceFunctions.h to Instrumentation.h


---
Diffs of the changes:

Index: llvm/lib/Transforms/Instrumentation/EmitFunctions.cpp
diff -u llvm/lib/Transforms/Instrumentation/EmitFunctions.cpp:1.4 llvm/lib/Transforms/Instrumentation/EmitFunctions.cpp:1.5
--- llvm/lib/Transforms/Instrumentation/EmitFunctions.cpp:1.4	Tue Jan 14 16:34:13 2003
+++ llvm/lib/Transforms/Instrumentation/EmitFunctions.cpp	Tue Jan 14 16:39:29 2003
@@ -6,8 +6,8 @@
 
 #include "llvm/Constants.h"
 #include "llvm/DerivedTypes.h"
-#include "llvm/Constants.h"
 #include "llvm/Module.h"
+#include "llvm/Pass.h"
 
 using std::vector;
 


Index: llvm/lib/Transforms/Instrumentation/TraceValues.cpp
diff -u llvm/lib/Transforms/Instrumentation/TraceValues.cpp:1.52 llvm/lib/Transforms/Instrumentation/TraceValues.cpp:1.53
--- llvm/lib/Transforms/Instrumentation/TraceValues.cpp:1.52	Sun Jan 12 18:52:14 2003
+++ llvm/lib/Transforms/Instrumentation/TraceValues.cpp	Tue Jan 14 16:39:29 2003
@@ -5,7 +5,7 @@
 //
 //===----------------------------------------------------------------------===//
 
-#include "llvm/Transforms/Instrumentation/TraceValues.h"
+#include "llvm/Transforms/Instrumentation.h"
 #include "llvm/Constants.h"
 #include "llvm/DerivedTypes.h"
 #include "llvm/iMemory.h"




From lattner at cs.uiuc.edu  Tue Jan 14 16:57:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Jan 14 16:57:01 2003
Subject: [llvm-commits] CVS: llvm/include/llvm/Analysis/LiveVar/FunctionLiveVarInfo.h
Message-ID: <200301142256.QAA11394@apoc.cs.uiuc.edu>


Changes in directory llvm/include/llvm/Analysis/LiveVar:

FunctionLiveVarInfo.h updated: 1.25 -> 1.26

---
Log message:

Move llvm/Analysis/LiveVar/ValueSet.h to CodeGen/ValueSet.h


---
Diffs of the changes:

Index: llvm/include/llvm/Analysis/LiveVar/FunctionLiveVarInfo.h
diff -u llvm/include/llvm/Analysis/LiveVar/FunctionLiveVarInfo.h:1.25 llvm/include/llvm/Analysis/LiveVar/FunctionLiveVarInfo.h:1.26
--- llvm/include/llvm/Analysis/LiveVar/FunctionLiveVarInfo.h:1.25	Wed Aug 21 12:09:21 2002
+++ llvm/include/llvm/Analysis/LiveVar/FunctionLiveVarInfo.h	Tue Jan 14 16:56:12 2003
@@ -62,7 +62,7 @@
 #define FUNCTION_LIVE_VAR_INFO_H
 
 #include "llvm/Pass.h"
-#include "llvm/Analysis/LiveVar/ValueSet.h"
+#include "llvm/CodeGen/ValueSet.h"
 
 class BBLiveVar;
 class MachineInstr;




From lattner at cs.uiuc.edu  Tue Jan 14 16:57:03 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Jan 14 16:57:03 2003
Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/LiveRange.h LiveRangeInfo.h ValueSet.h
Message-ID: <200301142256.QAA11407@apoc.cs.uiuc.edu>


Changes in directory llvm/include/llvm/CodeGen:

LiveRange.h updated: 1.16 -> 1.17
LiveRangeInfo.h updated: 1.15 -> 1.16
ValueSet.h updated: 1.10 -> 1.11

---
Log message:

Move llvm/Analysis/LiveVar/ValueSet.h to CodeGen/ValueSet.h



---
Diffs of the changes:

Index: llvm/include/llvm/CodeGen/LiveRange.h
diff -u llvm/include/llvm/CodeGen/LiveRange.h:1.16 llvm/include/llvm/CodeGen/LiveRange.h:1.17
--- llvm/include/llvm/CodeGen/LiveRange.h:1.16	Tue Oct 29 11:00:19 2002
+++ llvm/include/llvm/CodeGen/LiveRange.h	Tue Jan 14 16:56:14 2003
@@ -11,7 +11,7 @@
 #ifndef LIVE_RANGE_H
 #define LIVE_RANGE_H
 
-#include "llvm/Analysis/LiveVar/ValueSet.h"
+#include "llvm/CodeGen/ValueSet.h"
 #include "llvm/Value.h"
 
 class RegClass;


Index: llvm/include/llvm/CodeGen/LiveRangeInfo.h
diff -u llvm/include/llvm/CodeGen/LiveRangeInfo.h:1.15 llvm/include/llvm/CodeGen/LiveRangeInfo.h:1.16
--- llvm/include/llvm/CodeGen/LiveRangeInfo.h:1.15	Sat Dec 28 21:12:52 2002
+++ llvm/include/llvm/CodeGen/LiveRangeInfo.h	Tue Jan 14 16:56:14 2003
@@ -20,7 +20,7 @@
 #define LIVE_RANGE_INFO_H
 
 #include "Support/HashExtras.h"
-#include "llvm/Analysis/LiveVar/ValueSet.h"
+#include "llvm/CodeGen/ValueSet.h"
 
 class LiveRange;
 class MachineInstr;


Index: llvm/include/llvm/CodeGen/ValueSet.h
diff -u llvm/include/llvm/CodeGen/ValueSet.h:1.10 llvm/include/llvm/CodeGen/ValueSet.h:1.11
--- llvm/include/llvm/CodeGen/ValueSet.h:1.10	Tue Jun 25 11:10:57 2002
+++ llvm/include/llvm/CodeGen/ValueSet.h	Tue Jan 14 16:56:14 2003
@@ -1,3 +1,8 @@
+//
+// VALUESET.H - This header is OBSOLETE, do not use it for new code.
+//
+// FIXME: Eliminate this file.
+
 #ifndef VALUE_SET_H
 #define VALUE_SET_H
 




From lattner at cs.uiuc.edu  Tue Jan 14 16:57:04 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Jan 14 16:57:04 2003
Subject: [llvm-commits] CVS: llvm/lib/Analysis/LiveVar/BBLiveVar.h ValueSet.cpp
Message-ID: <200301142256.QAA11420@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Analysis/LiveVar:

BBLiveVar.h updated: 1.19 -> 1.20
ValueSet.cpp updated: 1.13 -> 1.14

---
Log message:

Move llvm/Analysis/LiveVar/ValueSet.h to CodeGen/ValueSet.h


---
Diffs of the changes:

Index: llvm/lib/Analysis/LiveVar/BBLiveVar.h
diff -u llvm/lib/Analysis/LiveVar/BBLiveVar.h:1.19 llvm/lib/Analysis/LiveVar/BBLiveVar.h:1.20
--- llvm/lib/Analysis/LiveVar/BBLiveVar.h:1.19	Tue Jan 14 15:31:39 2003
+++ llvm/lib/Analysis/LiveVar/BBLiveVar.h	Tue Jan 14 16:56:23 2003
@@ -8,7 +8,7 @@
 #ifndef LIVE_VAR_BB_H
 #define LIVE_VAR_BB_H
 
-#include "llvm/Analysis/LiveVar/ValueSet.h"
+#include "llvm/CodeGen/ValueSet.h"
 #include "Support/Annotation.h"
 #include <map>
 class BasicBlock;


Index: llvm/lib/Analysis/LiveVar/ValueSet.cpp
diff -u llvm/lib/Analysis/LiveVar/ValueSet.cpp:1.13 llvm/lib/Analysis/LiveVar/ValueSet.cpp:1.14
--- llvm/lib/Analysis/LiveVar/ValueSet.cpp:1.13	Tue Jun 25 11:11:43 2002
+++ llvm/lib/Analysis/LiveVar/ValueSet.cpp	Tue Jan 14 16:56:23 2003
@@ -1,7 +1,7 @@
 
+// FIXME: Eliminate this file.
 
-
-#include "llvm/Analysis/LiveVar/ValueSet.h"
+#include "llvm/CodeGen/ValueSet.h"
 #include "llvm/Value.h"
 #include <iostream>
 




From lattner at cs.uiuc.edu  Tue Jan 14 16:57:05 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Jan 14 16:57:05 2003
Subject: [llvm-commits] CVS: llvm/include/llvm/Analysis/LiveVar/ValueSet.h
Message-ID: <200301142256.QAA11500@apoc.cs.uiuc.edu>


Changes in directory llvm/include/llvm/Analysis/LiveVar:

ValueSet.h (r1.10) removed

---
Log message:

Move llvm/Analysis/LiveVar/ValueSet.h to CodeGen/ValueSet.h


---
Diffs of the changes:



From lattner at cs.uiuc.edu  Tue Jan 14 16:58:00 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Jan 14 16:58:00 2003
Subject: [llvm-commits] CVS: llvm/tools/llc/llc.cpp
Message-ID: <200301142257.QAA11728@apoc.cs.uiuc.edu>


Changes in directory llvm/tools/llc:

llc.cpp updated: 1.64 -> 1.65

---
Log message:

Rename header


---
Diffs of the changes:

Index: llvm/tools/llc/llc.cpp
diff -u llvm/tools/llc/llc.cpp:1.64 llvm/tools/llc/llc.cpp:1.65
--- llvm/tools/llc/llc.cpp:1.64	Sat Dec 28 14:00:00 2002
+++ llvm/tools/llc/llc.cpp	Tue Jan 14 16:57:15 2003
@@ -7,7 +7,7 @@
 #include "llvm/Bytecode/Reader.h"
 #include "llvm/Target/TargetMachineImpls.h"
 #include "llvm/Target/TargetMachine.h"
-#include "llvm/Transforms/Instrumentation/TraceValues.h"
+#include "llvm/Transforms/Instrumentation.h"
 #include "llvm/Transforms/Scalar.h"
 #include "llvm/Transforms/Utils/Linker.h"
 #include "llvm/Assembly/PrintModulePass.h"




From lattner at cs.uiuc.edu  Tue Jan 14 17:06:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Jan 14 17:06:01 2003
Subject: [llvm-commits] CVS: llvm/lib/Analysis/LiveVar/BBLiveVar.cpp FunctionLiveVarInfo.cpp
Message-ID: <200301142305.RAA13136@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Analysis/LiveVar:

BBLiveVar.cpp updated: 1.31 -> 1.32
FunctionLiveVarInfo.cpp updated: 1.41 -> 1.42

---
Log message:

Rename llvm/Analysis/LiveVar/FunctionLiveVarInfo.h -> llvm/CodeGen/FunctionLiveVarInfo.h



---
Diffs of the changes:

Index: llvm/lib/Analysis/LiveVar/BBLiveVar.cpp
diff -u llvm/lib/Analysis/LiveVar/BBLiveVar.cpp:1.31 llvm/lib/Analysis/LiveVar/BBLiveVar.cpp:1.32
--- llvm/lib/Analysis/LiveVar/BBLiveVar.cpp:1.31	Tue Oct 29 17:01:54 2002
+++ llvm/lib/Analysis/LiveVar/BBLiveVar.cpp	Tue Jan 14 17:05:00 2003
@@ -5,7 +5,7 @@
 //===----------------------------------------------------------------------===//
 
 #include "BBLiveVar.h"
-#include "llvm/Analysis/LiveVar/FunctionLiveVarInfo.h"
+#include "llvm/CodeGen/FunctionLiveVarInfo.h"
 #include "llvm/CodeGen/MachineInstr.h"
 #include "llvm/CodeGen/MachineBasicBlock.h"
 #include "llvm/Support/CFG.h"


Index: llvm/lib/Analysis/LiveVar/FunctionLiveVarInfo.cpp
diff -u llvm/lib/Analysis/LiveVar/FunctionLiveVarInfo.cpp:1.41 llvm/lib/Analysis/LiveVar/FunctionLiveVarInfo.cpp:1.42
--- llvm/lib/Analysis/LiveVar/FunctionLiveVarInfo.cpp:1.41	Mon Oct 28 12:01:21 2002
+++ llvm/lib/Analysis/LiveVar/FunctionLiveVarInfo.cpp	Tue Jan 14 17:05:00 2003
@@ -5,14 +5,14 @@
 //
 //===----------------------------------------------------------------------===//
 
-#include "llvm/Analysis/LiveVar/FunctionLiveVarInfo.h"
-#include "BBLiveVar.h"
+#include "llvm/CodeGen/FunctionLiveVarInfo.h"
 #include "llvm/CodeGen/MachineInstr.h"
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/Support/CFG.h"
 #include "Support/PostOrderIterator.h"
 #include "Support/SetOperations.h"
 #include "Support/CommandLine.h"
+#include "BBLiveVar.h"
 
 static RegisterAnalysis<FunctionLiveVarInfo>
 X("livevar", "Live Variable Analysis");




From lattner at cs.uiuc.edu  Tue Jan 14 17:06:04 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Jan 14 17:06:04 2003
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/InstrSched/InstrScheduling.cpp SchedPriorities.cpp
Message-ID: <200301142305.RAA13145@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/CodeGen/InstrSched:

InstrScheduling.cpp updated: 1.50 -> 1.51
SchedPriorities.cpp updated: 1.24 -> 1.25

---
Log message:

Rename llvm/Analysis/LiveVar/FunctionLiveVarInfo.h -> llvm/CodeGen/FunctionLiveVarInfo.h


---
Diffs of the changes:

Index: llvm/lib/CodeGen/InstrSched/InstrScheduling.cpp
diff -u llvm/lib/CodeGen/InstrSched/InstrScheduling.cpp:1.50 llvm/lib/CodeGen/InstrSched/InstrScheduling.cpp:1.51
--- llvm/lib/CodeGen/InstrSched/InstrScheduling.cpp:1.50	Tue Jan 14 15:58:42 2003
+++ llvm/lib/CodeGen/InstrSched/InstrScheduling.cpp	Tue Jan 14 17:05:03 2003
@@ -9,7 +9,7 @@
 #include "llvm/CodeGen/MachineInstr.h"
 #include "llvm/CodeGen/MachineCodeForInstruction.h"
 #include "llvm/CodeGen/MachineFunction.h"
-#include "llvm/Analysis/LiveVar/FunctionLiveVarInfo.h" // FIXME: Remove when modularized better
+#include "llvm/CodeGen/FunctionLiveVarInfo.h"
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/BasicBlock.h"
 #include "Support/CommandLine.h"
@@ -1524,7 +1524,7 @@
         cerr << "\n*** TRACE OF INSTRUCTION SCHEDULING OPERATIONS\n\n";
       
       // expensive!
-      SchedPriorities schedPrio(&F, graph,getAnalysis<FunctionLiveVarInfo>());
+      SchedPriorities schedPrio(&F, graph, getAnalysis<FunctionLiveVarInfo>());
       SchedulingManager S(target, graph, schedPrio);
           
       ChooseInstructionsForDelaySlots(S, MBB, graph); // modifies graph


Index: llvm/lib/CodeGen/InstrSched/SchedPriorities.cpp
diff -u llvm/lib/CodeGen/InstrSched/SchedPriorities.cpp:1.24 llvm/lib/CodeGen/InstrSched/SchedPriorities.cpp:1.25
--- llvm/lib/CodeGen/InstrSched/SchedPriorities.cpp:1.24	Sat Nov  2 16:07:51 2002
+++ llvm/lib/CodeGen/InstrSched/SchedPriorities.cpp	Tue Jan 14 17:05:04 2003
@@ -11,7 +11,7 @@
 //===----------------------------------------------------------------------===//
 
 #include "SchedPriorities.h"
-#include "llvm/Analysis/LiveVar/FunctionLiveVarInfo.h"
+#include "llvm/CodeGen/FunctionLiveVarInfo.h"
 #include "llvm/CodeGen/MachineBasicBlock.h"
 #include "llvm/Support/CFG.h"
 #include "Support/PostOrderIterator.h"




From lattner at cs.uiuc.edu  Tue Jan 14 17:06:06 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Jan 14 17:06:06 2003
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp
Message-ID: <200301142305.RAA13152@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/CodeGen/RegAlloc:

PhyRegAlloc.cpp updated: 1.90 -> 1.91

---
Log message:

Rename llvm/Analysis/LiveVar/FunctionLiveVarInfo.h -> llvm/CodeGen/FunctionLiveVarInfo.h


---
Diffs of the changes:

Index: llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp
diff -u llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp:1.90 llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp:1.91
--- llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp:1.90	Tue Jan 14 15:58:49 2003
+++ llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp	Tue Jan 14 17:05:06 2003
@@ -12,7 +12,7 @@
 #include "llvm/CodeGen/MachineInstrAnnot.h"
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/MachineFunctionInfo.h"
-#include "llvm/Analysis/LiveVar/FunctionLiveVarInfo.h"
+#include "llvm/CodeGen/FunctionLiveVarInfo.h"
 #include "llvm/Analysis/LoopInfo.h"
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/Target/TargetFrameInfo.h"




From lattner at cs.uiuc.edu  Tue Jan 14 17:06:08 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Jan 14 17:06:08 2003
Subject: [llvm-commits] CVS: llvm/lib/Target/Sparc/SparcRegInfo.cpp
Message-ID: <200301142305.RAA13159@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Target/Sparc:

SparcRegInfo.cpp updated: 1.83 -> 1.84

---
Log message:

Rename llvm/Analysis/LiveVar/FunctionLiveVarInfo.h -> llvm/CodeGen/FunctionLiveVarInfo.h



---
Diffs of the changes:

Index: llvm/lib/Target/Sparc/SparcRegInfo.cpp
diff -u llvm/lib/Target/Sparc/SparcRegInfo.cpp:1.83 llvm/lib/Target/Sparc/SparcRegInfo.cpp:1.84
--- llvm/lib/Target/Sparc/SparcRegInfo.cpp:1.83	Sat Dec 28 21:13:02 2002
+++ llvm/lib/Target/Sparc/SparcRegInfo.cpp	Tue Jan 14 17:05:08 2003
@@ -15,15 +15,18 @@
 #include "llvm/CodeGen/MachineInstr.h"
 #include "llvm/CodeGen/MachineInstrAnnot.h"
 #include "llvm/CodeGen/RegAllocCommon.h"
-#include "llvm/Analysis/LiveVar/FunctionLiveVarInfo.h"
+#include "llvm/CodeGen/FunctionLiveVarInfo.h"   // FIXME: Remove
 #include "llvm/iTerminators.h"
 #include "llvm/iOther.h"
 #include "llvm/Function.h"
 #include "llvm/DerivedTypes.h"
-#include <values.h>
 using std::cerr;
 using std::vector;
 
+enum {
+  BadRegClass = ~0
+};
+
 UltraSparcRegInfo::UltraSparcRegInfo(const UltraSparc &tgt)
   : TargetRegInfo(tgt), NumOfIntArgRegs(6), 
     NumOfFloatArgRegs(32), InvalidRegNum(1000) {
@@ -390,7 +393,7 @@
     assert(LR && "No live range found for method arg");
     
     unsigned regType = getRegType(LR);
-    unsigned regClassIDOfArgReg = MAXINT; // reg class of chosen reg (unused)
+    unsigned regClassIDOfArgReg = BadRegClass; // reg class of chosen reg (unused)
     
     int regNum = (regType == IntRegType)
       ? regNumForIntArg(/*inCallee*/ true, isVarArgs,
@@ -434,7 +437,7 @@
     //
     bool isArgInReg = false;
     unsigned UniArgReg = InvalidRegNum;	// reg that LR MUST be colored with
-    unsigned regClassIDOfArgReg = MAXINT; // reg class of chosen reg
+    unsigned regClassIDOfArgReg = BadRegClass; // reg class of chosen reg
     
     int regNum = (regType == IntRegType)
       ? regNumForIntArg(/*inCallee*/ true, isVarArgs,
@@ -605,7 +608,7 @@
                   "all args (even consts) must be defined before");
 
     unsigned regType = getRegType( LR );
-    unsigned regClassIDOfArgReg = MAXINT; // reg class of chosen reg (unused)
+    unsigned regClassIDOfArgReg = BadRegClass; // reg class of chosen reg (unused)
 
     // Choose a register for this arg depending on whether it is
     // an INT or FP value.  Here we ignore whether or not it is a
@@ -657,7 +660,7 @@
 {
   MachineInstr *AdMI;
   bool isArgInReg = false;
-  unsigned UniArgReg = MAXINT;          // unused unless initialized below
+  unsigned UniArgReg = BadRegClass;          // unused unless initialized below
   if (UniArgRegOrNone != InvalidRegNum)
     {
       isArgInReg = true;
@@ -847,7 +850,7 @@
     //
     bool isArgInReg = false;
     unsigned UniArgReg = InvalidRegNum;	  // reg that LR MUST be colored with
-    unsigned regClassIDOfArgReg = MAXINT; // reg class of chosen reg
+    unsigned regClassIDOfArgReg = BadRegClass; // reg class of chosen reg
     
     // Find the register that must be used for this arg, depending on
     // whether it is an INT or FP value.  Here we ignore whether or not it




From lattner at cs.uiuc.edu  Tue Jan 14 17:06:10 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Jan 14 17:06:10 2003
Subject: [llvm-commits] CVS: llvm/include/llvm/Analysis/LiveVar/FunctionLiveVarInfo.h
Message-ID: <200301142305.RAA13173@apoc.cs.uiuc.edu>


Changes in directory llvm/include/llvm/Analysis/LiveVar:

FunctionLiveVarInfo.h (r1.26) removed

---
Log message:

Move to include/llvm/CodeGen


---
Diffs of the changes:



From lattner at cs.uiuc.edu  Tue Jan 14 18:03:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Jan 14 18:03:01 2003
Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/InstrSelectionSupport.h
Message-ID: <200301150002.SAA15929@apoc.cs.uiuc.edu>


Changes in directory llvm/include/llvm/CodeGen:

InstrSelectionSupport.h updated: 1.17 -> 1.18

---
Log message:

* Eliminate a bunch of inline functions.
* Convert callers to use BuildMI instead



---
Diffs of the changes:

Index: llvm/include/llvm/CodeGen/InstrSelectionSupport.h
diff -u llvm/include/llvm/CodeGen/InstrSelectionSupport.h:1.17 llvm/include/llvm/CodeGen/InstrSelectionSupport.h:1.18
--- llvm/include/llvm/CodeGen/InstrSelectionSupport.h:1.17	Sun Oct 27 20:29:46 2002
+++ llvm/include/llvm/CodeGen/InstrSelectionSupport.h	Tue Jan 14 18:02:41 2003
@@ -8,12 +8,11 @@
 #ifndef LLVM_CODEGEN_INSTR_SELECTION_SUPPORT_H
 #define LLVM_CODEGEN_INSTR_SELECTION_SUPPORT_H
 
-#include "llvm/Instruction.h"
 #include "llvm/CodeGen/MachineInstr.h"
 #include "Support/DataTypes.h"
 class InstructionNode;
 class TargetMachine;
-
+class Instruction;
 
 //---------------------------------------------------------------------------
 // Function GetConstantValueAsUnsignedInt
@@ -80,7 +79,7 @@
 //		     in the machine instruction the 3 operands (arg1, arg2
 //		     and result) should go.
 // 
-// RETURN VALUE: unsigned int flags, where
+// RETURN VALUE: unsigned flags, where
 //	flags & 0x01	=> operand 1 is constant and needs a register
 //	flags & 0x02	=> operand 2 is constant and needs a register
 //------------------------------------------------------------------------ 
@@ -115,7 +114,7 @@
 }
 
 inline MachineInstr*
-Create1OperandInstr_UImmed(MachineOpCode opCode, unsigned int unextendedImmed)
+Create1OperandInstr_UImmed(MachineOpCode opCode, unsigned unextendedImmed)
 {
   MachineInstr* M = new MachineInstr(opCode);
   M->SetMachineOperandConst(0, MachineOperand::MO_UnextendedImmed,
@@ -163,7 +162,7 @@
 
 inline MachineInstr*
 Create2OperandInstr_UImmed(MachineOpCode opCode,
-                           unsigned int unextendedImmed, Value* argVal2)
+                           unsigned unextendedImmed, Value* argVal2)
 {
   MachineInstr* M = new MachineInstr(opCode);
   M->SetMachineOperandConst(0, MachineOperand::MO_UnextendedImmed,
@@ -195,7 +194,7 @@
 
 inline MachineInstr*
 Create2OperandInstr_Reg(MachineOpCode opCode,
-                        Value* argVal1, unsigned int regNum)
+                        Value* argVal1, unsigned regNum)
 {
   MachineInstr* M = new MachineInstr(opCode);
   M->SetMachineOperandVal(0, MachineOperand::MO_VirtualRegister, argVal1);
@@ -205,7 +204,7 @@
 
 inline MachineInstr*
 Create2OperandInstr_Reg(MachineOpCode opCode,
-                        unsigned int regNum1, unsigned int regNum2)
+                        unsigned regNum1, unsigned regNum2)
                  
 {
   MachineInstr* M = new MachineInstr(opCode);
@@ -215,66 +214,8 @@
 }
 
 inline MachineInstr*
-Create3OperandInstr(MachineOpCode opCode,
-                    Value* argVal1, MachineOperand::MachineOperandType type1,
-                    Value* argVal2, MachineOperand::MachineOperandType type2,
-                    Value* argVal3, MachineOperand::MachineOperandType type3)
-{
-  MachineInstr* M = new MachineInstr(opCode);
-  M->SetMachineOperandVal(0, type1, argVal1);
-  M->SetMachineOperandVal(1, type2, argVal2);
-  M->SetMachineOperandVal(2, type3, argVal3);
-  return M;
-}
-
-inline MachineInstr*
-Create3OperandInstr(MachineOpCode opCode, Value* argVal1,
-                    Value* argVal2, Value* argVal3)
-{
-  return Create3OperandInstr(opCode,
-                             argVal1, MachineOperand::MO_VirtualRegister, 
-                             argVal2, MachineOperand::MO_VirtualRegister, 
-                             argVal3, MachineOperand::MO_VirtualRegister); 
-}
-
-inline MachineInstr*
-Create3OperandInstr_UImmed(MachineOpCode opCode, Value* argVal1,
-                           unsigned int unextendedImmed, Value* argVal3)
-{
-  MachineInstr* M = new MachineInstr(opCode);
-  M->SetMachineOperandVal(0, MachineOperand::MO_VirtualRegister, argVal1);
-  M->SetMachineOperandConst(1, MachineOperand::MO_UnextendedImmed,
-                                 unextendedImmed);
-  M->SetMachineOperandVal(2, MachineOperand::MO_VirtualRegister, argVal3);
-  return M;
-}
-
-inline MachineInstr*
-Create3OperandInstr_SImmed(MachineOpCode opCode, Value* argVal1,
-                           int signExtendedImmed, Value* argVal3)
-{
-  MachineInstr* M = new MachineInstr(opCode);
-  M->SetMachineOperandVal(0, MachineOperand::MO_VirtualRegister, argVal1);
-  M->SetMachineOperandConst(1, MachineOperand::MO_SignExtendedImmed,
-                                 signExtendedImmed);
-  M->SetMachineOperandVal(2, MachineOperand::MO_VirtualRegister, argVal3);
-  return M;
-}
-
-inline MachineInstr*
-Create3OperandInstr_Addr(MachineOpCode opCode, Value* argVal1,
-                         Value* label, Value* argVal3)
-{
-  MachineInstr* M = new MachineInstr(opCode);
-  M->SetMachineOperandVal(0, MachineOperand::MO_VirtualRegister, argVal1);
-  M->SetMachineOperandVal(1, MachineOperand::MO_PCRelativeDisp,  label);
-  M->SetMachineOperandVal(2, MachineOperand::MO_VirtualRegister, argVal3);
-  return M;
-}
-
-inline MachineInstr*
 Create3OperandInstr_Reg(MachineOpCode opCode, Value* argVal1,
-                        unsigned int regNum, Value* argVal3)
+                        unsigned regNum, Value* argVal3)
 {
   MachineInstr* M = new MachineInstr(opCode);
   M->SetMachineOperandVal(0, MachineOperand::MO_VirtualRegister, argVal1);
@@ -284,8 +225,8 @@
 }
 
 inline MachineInstr*
-Create3OperandInstr_Reg(MachineOpCode opCode, unsigned int regNum1,
-                        unsigned int regNum2, Value* argVal3)
+Create3OperandInstr_Reg(MachineOpCode opCode, unsigned regNum1,
+                        unsigned regNum2, Value* argVal3)
                  
 {
   MachineInstr* M = new MachineInstr(opCode);
@@ -296,8 +237,8 @@
 }
 
 inline MachineInstr*
-Create3OperandInstr_Reg(MachineOpCode opCode, unsigned int regNum1,
-                        unsigned int regNum2, unsigned int regNum3)
+Create3OperandInstr_Reg(MachineOpCode opCode, unsigned regNum1,
+                        unsigned regNum2, unsigned regNum3)
                  
 {
   MachineInstr* M = new MachineInstr(opCode);
@@ -320,7 +261,7 @@
                                          MachineOpCode opCode,
                                          const TargetMachine& targetMachine,
                                          bool canUseImmed,
-                                         unsigned int& getMachineRegNum,
+                                         unsigned& getMachineRegNum,
                                          int64_t& getImmedValue);
 
 MachineOperand::MachineOperandType ChooseRegOrImmed(int64_t intValue,
@@ -328,7 +269,7 @@
                                          MachineOpCode opCode,
                                          const TargetMachine& target,
                                          bool canUseImmed,
-                                         unsigned int& getMachineRegNum,
+                                         unsigned& getMachineRegNum,
                                          int64_t& getImmedValue);
 
 




From lattner at cs.uiuc.edu  Tue Jan 14 18:04:00 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Jan 14 18:04:00 2003
Subject: [llvm-commits] CVS: llvm/lib/Target/Sparc/PrologEpilogCodeInserter.cpp SparcInstrInfo.cpp SparcInstrSelection.cpp
Message-ID: <200301150003.SAA15944@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Target/Sparc:

PrologEpilogCodeInserter.cpp updated: 1.21 -> 1.22
SparcInstrInfo.cpp updated: 1.34 -> 1.35
SparcInstrSelection.cpp updated: 1.81 -> 1.82

---
Log message:

* Elimiante a bunch of functions from InstrSelectionSupport.h, replacing users
  of them with BUildMI calls instead.
* Fix def information in instructions generated by prologepilog inserter




---
Diffs of the changes:

Index: llvm/lib/Target/Sparc/PrologEpilogCodeInserter.cpp
diff -u llvm/lib/Target/Sparc/PrologEpilogCodeInserter.cpp:1.21 llvm/lib/Target/Sparc/PrologEpilogCodeInserter.cpp:1.22
--- llvm/lib/Target/Sparc/PrologEpilogCodeInserter.cpp:1.21	Tue Jan 14 15:59:15 2003
+++ llvm/lib/Target/Sparc/PrologEpilogCodeInserter.cpp	Tue Jan 14 18:03:28 2003
@@ -63,7 +63,8 @@
   int32_t C = - (int) staticStackSize;
   int SP = TM.getRegInfo().getStackPointer();
   if (TM.getInstrInfo().constantFitsInImmedField(SAVE, staticStackSize)) {
-    mvec.push_back(BuildMI(SAVE, 3).addMReg(SP).addSImm(C).addMReg(SP));
+    mvec.push_back(BuildMI(SAVE, 3).addMReg(SP).addSImm(C).addMReg(SP,
+                                                                   MOTy::Def));
   } else {
     // We have to put the stack size value into a register before SAVE.
     // Use register %g1 since it is volatile across calls.  Note that the
@@ -74,19 +75,19 @@
 			 TM.getRegInfo().getRegClassIDOfType(Type::IntTy),
 			 SparcIntRegClass::g1);
 
-    MachineInstr* M = BuildMI(SETHI, 2).addSImm(C).addMReg(uregNum);
+    MachineInstr* M = BuildMI(SETHI, 2).addSImm(C).addMReg(uregNum, MOTy::Def);
     M->setOperandHi32(0);
     mvec.push_back(M);
     
-    M = BuildMI(OR, 3).addMReg(uregNum).addSImm(C).addMReg(uregNum);
+    M = BuildMI(OR, 3).addMReg(uregNum).addSImm(C).addMReg(uregNum, MOTy::Def);
     M->setOperandLo32(1);
     mvec.push_back(M);
     
-    M = BuildMI(SRA, 3).addMReg(uregNum).addZImm(0).addMReg(uregNum);
+    M = BuildMI(SRA, 3).addMReg(uregNum).addZImm(0).addMReg(uregNum, MOTy::Def);
     mvec.push_back(M);
     
     // Now generate the SAVE using the value in register %g1
-    M = BuildMI(SAVE, 3).addMReg(SP).addMReg(uregNum).addMReg(SP);
+    M = BuildMI(SAVE, 3).addMReg(SP).addMReg(uregNum).addMReg(SP, MOTy::Def);
     mvec.push_back(M);
   }
 
@@ -106,7 +107,7 @@
       {
         int ZR = TM.getRegInfo().getZeroRegNum();
         MachineInstr *Restore =
-          BuildMI(RESTORE, 3).addMReg(ZR).addSImm(0).addMReg(ZR);
+          BuildMI(RESTORE, 3).addMReg(ZR).addSImm(0).addMReg(ZR, MOTy::Def);
         
         MachineCodeForInstruction &termMvec =
           MachineCodeForInstruction::get(TermInst);


Index: llvm/lib/Target/Sparc/SparcInstrInfo.cpp
diff -u llvm/lib/Target/Sparc/SparcInstrInfo.cpp:1.34 llvm/lib/Target/Sparc/SparcInstrInfo.cpp:1.35
--- llvm/lib/Target/Sparc/SparcInstrInfo.cpp:1.34	Tue Jan 14 15:59:15 2003
+++ llvm/lib/Target/Sparc/SparcInstrInfo.cpp	Tue Jan 14 18:03:28 2003
@@ -9,6 +9,7 @@
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/MachineFunctionInfo.h"
 #include "llvm/CodeGen/MachineCodeForInstruction.h"
+#include "llvm/CodeGen/MachineInstrBuilder.h"
 #include "llvm/Function.h"
 #include "llvm/Constants.h"
 #include "llvm/DerivedTypes.h"
@@ -63,7 +64,7 @@
     {
       if (miSETHI)
         { // unsigned value with high-order bits set using SETHI
-          miOR = Create3OperandInstr_UImmed(OR, dest, C, dest);
+          miOR = BuildMI(OR, 3).addReg(dest).addZImm(C).addReg(dest, MOTy::Def);
           miOR->setOperandLo32(1);
         }
       else
@@ -97,17 +98,13 @@
 CreateSETSWConst(const TargetMachine& target, int32_t C,
                  Instruction* dest, vector<MachineInstr*>& mvec)
 {
-  MachineInstr* MI;
-
   // Set the low 32 bits of dest
   CreateSETUWConst(target, (uint32_t) C,  dest, mvec, /*isSigned*/true);
 
   // Sign-extend to the high 32 bits if needed
   if (C < 0 && (-C) > (int32_t) MAXSIMM)
-    {
-      MI = Create3OperandInstr_UImmed(SRA, dest, 0, dest);
-      mvec.push_back(MI);
-    }
+    mvec.push_back(BuildMI(SRA, 3).addReg(dest).addZImm(0).addReg(dest,
+                                                                  MOTy::Def));
 }
 
 
@@ -134,15 +131,15 @@
   CreateSETUWConst(target, (C >> 32), tmpReg, mvec);
   
   // Shift tmpReg left by 32 bits
-  MI = Create3OperandInstr_UImmed(SLLX, tmpReg, 32, tmpReg);
-  mvec.push_back(MI);
+  mvec.push_back(BuildMI(SLLX, 3).addReg(tmpReg).addZImm(32).addReg(tmpReg,
+                                                                    MOTy::Def));
   
   // Code to set the low 32 bits of the value in register `dest'
   CreateSETUWConst(target, C, dest, mvec);
   
   // dest = OR(tmpReg, dest)
-  MI = Create3OperandInstr(OR, dest, tmpReg, dest);
-  mvec.push_back(MI);
+  mvec.push_back(BuildMI(OR, 3).addReg(dest).addReg(tmpReg).addReg(dest,
+                                                                   MOTy::Def));
 }
 
 
@@ -164,7 +161,7 @@
   mvec.push_back(MI);
   
   // Set the low 10 bits in dest
-  MI = Create3OperandInstr(OR, dest, val, dest);
+  MI = BuildMI(OR, 3).addReg(dest).addReg(val).addReg(dest, MOTy::Def);
   MI->setOperandLo32(1);
   mvec.push_back(MI);
 }
@@ -190,21 +187,20 @@
   MI->setOperandHi64(0);
   mvec.push_back(MI);
   
-  MI = Create3OperandInstr_Addr(OR, tmpReg, val, tmpReg);
+  MI = BuildMI(OR, 3).addReg(tmpReg).addPCDisp(val).addReg(tmpReg, MOTy::Def);
   MI->setOperandLo64(1);
   mvec.push_back(MI);
   
-  MI = Create3OperandInstr_UImmed(SLLX, tmpReg, 32, tmpReg);
-  mvec.push_back(MI);
-  
+  mvec.push_back(BuildMI(SLLX, 3).addReg(tmpReg).addZImm(32).addReg(tmpReg,
+                                                                    MOTy::Def));
   MI = Create2OperandInstr_Addr(SETHI, val, dest);
   MI->setOperandHi32(0);
   mvec.push_back(MI);
   
-  MI = Create3OperandInstr(OR, dest, tmpReg, dest);
+  MI = BuildMI(OR, 3).addReg(dest).addReg(tmpReg).addReg(dest, MOTy::Def);
   mvec.push_back(MI);
   
-  MI = Create3OperandInstr_Addr(OR, dest, val, dest);
+  MI = BuildMI(OR, 3).addReg(dest).addPCDisp(val).addReg(dest, MOTy::Def);
   MI->setOperandLo32(1);
   mvec.push_back(MI);
 }
@@ -456,10 +452,9 @@
       
       // Generate the load instruction
       int64_t zeroOffset = 0;           // to avoid ambiguity with (Value*) 0
-      MachineInstr* MI =
-        Create3OperandInstr_SImmed(ChooseLoadInstruction(val->getType()),
-                                   addrReg, zeroOffset, dest);
-      mvec.push_back(MI);
+      unsigned Opcode = ChooseLoadInstruction(val->getType());
+      mvec.push_back(BuildMI(Opcode, 3).addReg(addrReg).
+                     addSImm(zeroOffset).addReg(dest, MOTy::Def));
       
       // Make sure constant is emitted to constant pool in assembly code.
       MachineFunction::get(F).getInfo()->addToConstantPool(cast<Constant>(val));
@@ -630,12 +625,11 @@
       // Make `src' the second operand, in case it is a constant
       // Use (unsigned long) 0 for a NULL pointer value.
       // 
-      const Type* zeroValueType =
-        isa<PointerType>(resultType) ? Type::ULongTy : resultType;
-      MachineInstr* minstr =
-        Create3OperandInstr(opCode, Constant::getNullValue(zeroValueType),
-                            src, dest);
-      mvec.push_back(minstr);
+      const Type* Ty =isa<PointerType>(resultType) ? Type::ULongTy : resultType;
+      MachineInstr* MI =
+        BuildMI(opCode, 3).addReg(Constant::getNullValue(Ty))
+                          .addReg(src).addReg(dest, MOTy::Def);
+      mvec.push_back(MI);
     }
 }
 
@@ -661,14 +655,13 @@
       TmpInstruction *tmpI = new TmpInstruction(destVal->getType(),
                                                 srcVal, destVal, "make32");
       mcfi.addTemp(tmpI);
-      M = Create3OperandInstr_UImmed(SLLX, srcVal, 32-numLowBits, tmpI);
-      mvec.push_back(M);
+      mvec.push_back(BuildMI(SLLX, 3).addReg(srcVal).addZImm(32-numLowBits)
+                                     .addReg(tmpI, MOTy::Def));
       srcVal = tmpI;
     }
 
-  M = Create3OperandInstr_UImmed(signExtend? SRA : SRL,
-                                 srcVal, 32-numLowBits, destVal);
-  mvec.push_back(M);
+  mvec.push_back(BuildMI(signExtend? SRA : SRL, 3).addReg(srcVal)
+                         .addZImm(32-numLowBits).addReg(destVal, MOTy::Def));
 }
 
 


Index: llvm/lib/Target/Sparc/SparcInstrSelection.cpp
diff -u llvm/lib/Target/Sparc/SparcInstrSelection.cpp:1.81 llvm/lib/Target/Sparc/SparcInstrSelection.cpp:1.82
--- llvm/lib/Target/Sparc/SparcInstrSelection.cpp:1.81	Sat Dec 28 14:19:44 2002
+++ llvm/lib/Target/Sparc/SparcInstrSelection.cpp	Tue Jan 14 18:03:28 2003
@@ -8,7 +8,7 @@
 #include "SparcInstrSelectionSupport.h"
 #include "SparcRegClassInfo.h"
 #include "llvm/CodeGen/InstrSelectionSupport.h"
-#include "llvm/CodeGen/MachineInstr.h"
+#include "llvm/CodeGen/MachineInstrBuilder.h"
 #include "llvm/CodeGen/MachineInstrAnnot.h"
 #include "llvm/CodeGen/InstrForest.h"
 #include "llvm/CodeGen/InstrSelection.h"
@@ -546,8 +546,10 @@
     }
   
   MachineInstr* M = (optArgVal2 != NULL)
-    ? Create3OperandInstr(shiftOpCode, argVal1, optArgVal2, shiftDest)
-    : Create3OperandInstr_UImmed(shiftOpCode, argVal1, optShiftNum, shiftDest);
+    ? BuildMI(shiftOpCode, 3).addReg(argVal1).addReg(optArgVal2)
+                             .addReg(shiftDest, MOTy::Def)
+    : BuildMI(shiftOpCode, 3).addReg(argVal1).addZImm(optShiftNum)
+                             .addReg(shiftDest, MOTy::Def);
   mvec.push_back(M);
   
   if (shiftDest != destVal)
@@ -601,14 +603,10 @@
           if (C == 0 || C == 1)
             {
               cost = target.getInstrInfo().minLatency(ADD);
+              unsigned ZeroReg = target.getRegInfo().getZeroRegNum();
               MachineInstr* M = (C == 0)
-                ? Create3OperandInstr_Reg(ADD,
-                                          target.getRegInfo().getZeroRegNum(),
-                                          target.getRegInfo().getZeroRegNum(),
-                                          destVal)
-                : Create3OperandInstr_Reg(ADD, lval,
-                                          target.getRegInfo().getZeroRegNum(),
-                                          destVal);
+                ? Create3OperandInstr_Reg(ADD, ZeroReg, ZeroReg, destVal)
+                : Create3OperandInstr_Reg(ADD, lval, ZeroReg, destVal);
               mvec.push_back(M);
             }
           else if (isPowerOf2(C, pow))
@@ -1728,10 +1726,11 @@
         M->SetMachineOperandVal(2, MachineOperand::MO_VirtualRegister,quot);
         mvec.push_back(M);
         
-        M = Create3OperandInstr(ChooseMulInstructionByType(
-                                   subtreeRoot->getInstruction()->getType()),
-                                quot, subtreeRoot->rightChild()->getValue(),
-                                prod);
+        unsigned MulOpcode =
+          ChooseMulInstructionByType(subtreeRoot->getInstruction()->getType());
+        Value *MulRHS = subtreeRoot->rightChild()->getValue();
+        M = BuildMI(MulOpcode, 3).addReg(quot).addReg(MulRHS).addReg(prod,
+                                                                     MOTy::Def);
         mvec.push_back(M);
         
         M = new MachineInstr(ChooseSubInstructionByType(
@@ -1759,9 +1758,10 @@
         Value* notArg = BinaryOperator::getNotArgument(
                            cast<BinaryOperator>(notNode->getInstruction()));
         notNode->markFoldedIntoParent();
-        mvec.push_back(Create3OperandInstr(ANDN,
-                                           subtreeRoot->leftChild()->getValue(),
-                                           notArg, subtreeRoot->getValue()));
+        Value *LHS = subtreeRoot->leftChild()->getValue();
+        Value *Dest = subtreeRoot->getValue();
+        mvec.push_back(BuildMI(ANDN, 3).addReg(LHS).addReg(notArg)
+                                       .addReg(Dest, MOTy::Def));
         break;
       }
 
@@ -1781,9 +1781,10 @@
         Value* notArg = BinaryOperator::getNotArgument(
                            cast<BinaryOperator>(notNode->getInstruction()));
         notNode->markFoldedIntoParent();
-        mvec.push_back(Create3OperandInstr(ORN,
-                                           subtreeRoot->leftChild()->getValue(),
-                                           notArg, subtreeRoot->getValue()));
+        Value *LHS = subtreeRoot->leftChild()->getValue();
+        Value *Dest = subtreeRoot->getValue();
+        mvec.push_back(BuildMI(ORN, 3).addReg(LHS).addReg(notArg)
+                                      .addReg(Dest, MOTy::Def));
         break;
       }
 
@@ -1803,9 +1804,10 @@
         Value* notArg = BinaryOperator::getNotArgument(
                            cast<BinaryOperator>(notNode->getInstruction()));
         notNode->markFoldedIntoParent();
-        mvec.push_back(Create3OperandInstr(XNOR,
-                                           subtreeRoot->leftChild()->getValue(),
-                                           notArg, subtreeRoot->getValue()));
+        Value *LHS = subtreeRoot->leftChild()->getValue();
+        Value *Dest = subtreeRoot->getValue();
+        mvec.push_back(BuildMI(XNOR, 3).addReg(LHS).addReg(notArg)
+                                       .addReg(Dest, MOTy::Def));
         break;
       }
 
@@ -2010,8 +2012,8 @@
         if (isa<Function>(callee))      // direct function call
           M = Create1OperandInstr_Addr(CALL, callee);
         else                            // indirect function call
-          M = Create3OperandInstr_SImmed(JMPLCALL, callee,
-                                         (int64_t) 0, retAddrReg);
+          M = BuildMI(JMPLCALL,
+                      3).addReg(callee).addSImm((int64_t)0).addReg(retAddrReg);
         mvec.push_back(M);
 
         const FunctionType* funcType =
@@ -2172,7 +2174,8 @@
               for (unsigned i=0, N=mvec.size(); i < N; ++i)
                 mvec[i]->substituteValue(dest, tmpI);
 
-              M = Create3OperandInstr_UImmed(SRL, tmpI, 8*(4-destSize), dest);
+              M = BuildMI(SRL, 3).addReg(tmpI).addZImm(8*(4-destSize))
+                                 .addReg(dest, MOTy::Def);
               mvec.push_back(M);
             }
           else if (destSize < target.getTargetData().getIntegerRegize())




From lattner at cs.uiuc.edu  Tue Jan 14 18:05:00 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue Jan 14 18:05:00 2003
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86InstrBuilder.h
Message-ID: <200301150004.SAA15963@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Target/X86:

X86InstrBuilder.h updated: 1.5 -> 1.6

---
Log message:

X86 backend should never use addMReg


---
Diffs of the changes:

Index: llvm/lib/Target/X86/X86InstrBuilder.h
diff -u llvm/lib/Target/X86/X86InstrBuilder.h:1.5 llvm/lib/Target/X86/X86InstrBuilder.h:1.6
--- llvm/lib/Target/X86/X86InstrBuilder.h:1.5	Sun Jan 12 18:45:53 2003
+++ llvm/lib/Target/X86/X86InstrBuilder.h	Tue Jan 14 18:04:14 2003
@@ -27,7 +27,7 @@
                                                unsigned Reg) {
   // Because memory references are always represented with four
   // values, this adds: Reg, [1, NoReg, 0] to the instruction.
-  return MIB.addReg(Reg).addZImm(1).addMReg(0).addSImm(0);
+  return MIB.addReg(Reg).addZImm(1).addReg(0).addSImm(0);
 }
 
 
@@ -37,7 +37,7 @@
 ///
 inline const MachineInstrBuilder &addRegOffset(const MachineInstrBuilder &MIB,
                                                unsigned Reg, int Offset) {
-  return MIB.addReg(Reg).addZImm(1).addMReg(0).addSImm(Offset);
+  return MIB.addReg(Reg).addZImm(1).addReg(0).addSImm(Offset);
 }
 
 /// addFrameReference - This function is used to add a reference to the base of
@@ -47,7 +47,7 @@
 ///
 inline const MachineInstrBuilder &
 addFrameReference(const MachineInstrBuilder &MIB, int FI, int Offset = 0) {
-  return MIB.addFrameIndex(FI).addZImm(1).addMReg(0).addSImm(Offset);
+  return MIB.addFrameIndex(FI).addZImm(1).addReg(0).addSImm(Offset);
 }
 
 /// addConstantPoolReference - This function is used to add a reference to the
@@ -59,7 +59,7 @@
 inline const MachineInstrBuilder &
 addConstantPoolReference(const MachineInstrBuilder &MIB, unsigned CPI,
 			 int Offset = 0) {
-  return MIB.addConstantPoolIndex(CPI).addZImm(1).addMReg(0).addSImm(Offset);
+  return MIB.addConstantPoolIndex(CPI).addZImm(1).addReg(0).addSImm(Offset);
 }
 
 #endif




From lattner at cs.uiuc.edu  Wed Jan 15 11:19:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed Jan 15 11:19:01 2003
Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstrBuilder.h
Message-ID: <200301151718.LAA18187@apoc.cs.uiuc.edu>


Changes in directory llvm/include/llvm/CodeGen:

MachineInstrBuilder.h updated: 1.11 -> 1.12

---
Log message:

Add new helper method addRegDef


---
Diffs of the changes:

Index: llvm/include/llvm/CodeGen/MachineInstrBuilder.h
diff -u llvm/include/llvm/CodeGen/MachineInstrBuilder.h:1.11 llvm/include/llvm/CodeGen/MachineInstrBuilder.h:1.12
--- llvm/include/llvm/CodeGen/MachineInstrBuilder.h:1.11	Sun Jan 12 18:18:44 2003
+++ llvm/include/llvm/CodeGen/MachineInstrBuilder.h	Wed Jan 15 11:18:22 2003
@@ -43,13 +43,11 @@
     return *this;
   }
 
-  /// addClobber - Assert that this MI is going to clobber a specific
-  /// register. Useful for instructions that always clobber certain hard regs.
-  /// (Same as addReg(RegNo, true) but shorter and more obvious).
+  /// addRegDef - Add an LLVM value that is to be defined as a register... this
+  /// is the same as addReg(V, MOTy::Def).
   ///
-  const MachineInstrBuilder &addClobber(int RegNo) const {
-    MI->addRegOperand(RegNo, MOTy::Def);
-    return *this;
+  const MachineInstrBuilder &addRegDef(Value *V) const {
+    return addReg(V, MOTy::Def);
   }
 
   /// addPCDisp - Add an LLVM value to be treated as a PC relative




From lattner at cs.uiuc.edu  Wed Jan 15 11:36:00 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed Jan 15 11:36:00 2003
Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/InstrSelectionSupport.h
Message-ID: <200301151735.LAA19432@apoc.cs.uiuc.edu>


Changes in directory llvm/include/llvm/CodeGen:

InstrSelectionSupport.h updated: 1.18 -> 1.19

---
Log message:

Remove a ton of functions that are no longer used, instead using BuildMI


---
Diffs of the changes:

Index: llvm/include/llvm/CodeGen/InstrSelectionSupport.h
diff -u llvm/include/llvm/CodeGen/InstrSelectionSupport.h:1.18 llvm/include/llvm/CodeGen/InstrSelectionSupport.h:1.19
--- llvm/include/llvm/CodeGen/InstrSelectionSupport.h:1.18	Tue Jan 14 18:02:41 2003
+++ llvm/include/llvm/CodeGen/InstrSelectionSupport.h	Wed Jan 15 11:35:44 2003
@@ -100,155 +100,6 @@
 					 int resultPosition = 2);
 
 
-//------------------------------------------------------------------------ 
-// Common machine instruction operand combinations
-// to simplify code generation.
-//------------------------------------------------------------------------ 
-
-inline MachineInstr*
-Create1OperandInstr(MachineOpCode opCode, Value* argVal1)
-{
-  MachineInstr* M = new MachineInstr(opCode);
-  M->SetMachineOperandVal(0, MachineOperand::MO_VirtualRegister, argVal1);
-  return M;
-}
-
-inline MachineInstr*
-Create1OperandInstr_UImmed(MachineOpCode opCode, unsigned unextendedImmed)
-{
-  MachineInstr* M = new MachineInstr(opCode);
-  M->SetMachineOperandConst(0, MachineOperand::MO_UnextendedImmed,
-                               unextendedImmed);
-  return M;
-}
-
-inline MachineInstr*
-Create1OperandInstr_SImmed(MachineOpCode opCode, int signExtendedImmed)
-{
-  MachineInstr* M = new MachineInstr(opCode);
-  M->SetMachineOperandConst(0, MachineOperand::MO_SignExtendedImmed,
-                               signExtendedImmed);
-  return M;
-}
-
-inline MachineInstr*
-Create1OperandInstr_Addr(MachineOpCode opCode, Value* label)
-{
-  MachineInstr* M = new MachineInstr(opCode);
-  M->SetMachineOperandVal(0, MachineOperand::MO_PCRelativeDisp, label);
-  return M;
-}
-
-inline MachineInstr*
-Create2OperandInstr(MachineOpCode opCode, Value* argVal1, Value* argVal2)
-{
-  MachineInstr* M = new MachineInstr(opCode);
-  M->SetMachineOperandVal(0, MachineOperand::MO_VirtualRegister, argVal1);
-  M->SetMachineOperandVal(1, MachineOperand::MO_VirtualRegister, argVal2);
-  return M;
-}
-
-inline MachineInstr*
-Create2OperandInstr(MachineOpCode opCode,
-                    Value* argVal1, MachineOperand::MachineOperandType type1,
-                    Value* argVal2, MachineOperand::MachineOperandType type2)
-{
-  MachineInstr* M = new MachineInstr(opCode);
-  M->SetMachineOperandVal(0, type1, argVal1);
-  M->SetMachineOperandVal(1, type2, argVal2);
-  return M;
-}
-
-
-inline MachineInstr*
-Create2OperandInstr_UImmed(MachineOpCode opCode,
-                           unsigned unextendedImmed, Value* argVal2)
-{
-  MachineInstr* M = new MachineInstr(opCode);
-  M->SetMachineOperandConst(0, MachineOperand::MO_UnextendedImmed,
-                               unextendedImmed);
-  M->SetMachineOperandVal(1, MachineOperand::MO_VirtualRegister, argVal2);
-  return M;
-}
-
-inline MachineInstr*
-Create2OperandInstr_SImmed(MachineOpCode opCode,
-                           int signExtendedImmed, Value* argVal2)
-{
-  MachineInstr* M = new MachineInstr(opCode);
-  M->SetMachineOperandConst(0, MachineOperand::MO_SignExtendedImmed,
-                               signExtendedImmed);
-  M->SetMachineOperandVal(1, MachineOperand::MO_VirtualRegister, argVal2);
-  return M;
-}
-
-inline MachineInstr*
-Create2OperandInstr_Addr(MachineOpCode opCode,
-                         Value* label, Value* argVal2)
-{
-  MachineInstr* M = new MachineInstr(opCode);
-  M->SetMachineOperandVal(0, MachineOperand::MO_PCRelativeDisp,  label);
-  M->SetMachineOperandVal(1, MachineOperand::MO_VirtualRegister, argVal2);
-  return M;
-}
-
-inline MachineInstr*
-Create2OperandInstr_Reg(MachineOpCode opCode,
-                        Value* argVal1, unsigned regNum)
-{
-  MachineInstr* M = new MachineInstr(opCode);
-  M->SetMachineOperandVal(0, MachineOperand::MO_VirtualRegister, argVal1);
-  M->SetMachineOperandReg(1, regNum);
-  return M;
-}
-
-inline MachineInstr*
-Create2OperandInstr_Reg(MachineOpCode opCode,
-                        unsigned regNum1, unsigned regNum2)
-                 
-{
-  MachineInstr* M = new MachineInstr(opCode);
-  M->SetMachineOperandReg(0, regNum1);
-  M->SetMachineOperandReg(1, regNum2);
-  return M;
-}
-
-inline MachineInstr*
-Create3OperandInstr_Reg(MachineOpCode opCode, Value* argVal1,
-                        unsigned regNum, Value* argVal3)
-{
-  MachineInstr* M = new MachineInstr(opCode);
-  M->SetMachineOperandVal(0, MachineOperand::MO_VirtualRegister, argVal1);
-  M->SetMachineOperandReg(1, regNum);
-  M->SetMachineOperandVal(2, MachineOperand::MO_VirtualRegister, argVal3);
-  return M;
-}
-
-inline MachineInstr*
-Create3OperandInstr_Reg(MachineOpCode opCode, unsigned regNum1,
-                        unsigned regNum2, Value* argVal3)
-                 
-{
-  MachineInstr* M = new MachineInstr(opCode);
-  M->SetMachineOperandReg(0, regNum1);
-  M->SetMachineOperandReg(1, regNum2);
-  M->SetMachineOperandVal(2, MachineOperand::MO_VirtualRegister, argVal3);
-  return M;
-}
-
-inline MachineInstr*
-Create3OperandInstr_Reg(MachineOpCode opCode, unsigned regNum1,
-                        unsigned regNum2, unsigned regNum3)
-                 
-{
-  MachineInstr* M = new MachineInstr(opCode);
-  M->SetMachineOperandReg(0, regNum1);
-  M->SetMachineOperandReg(1, regNum2);
-  M->SetMachineOperandReg(2, regNum3);
-  return M;
-}
-
-
 //---------------------------------------------------------------------------
 // Function: ChooseRegOrImmed
 // 




From lattner at cs.uiuc.edu  Wed Jan 15 11:48:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed Jan 15 11:48:01 2003
Subject: [llvm-commits] CVS: llvm/lib/Target/Sparc/SparcInstrInfo.cpp SparcInstrSelection.cpp SparcRegInfo.cpp
Message-ID: <200301151747.LAA19624@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Target/Sparc:

SparcInstrInfo.cpp updated: 1.35 -> 1.36
SparcInstrSelection.cpp updated: 1.82 -> 1.83
SparcRegInfo.cpp updated: 1.84 -> 1.85

---
Log message:

Use BuildMI more, Create*Instruction less


---
Diffs of the changes:

Index: llvm/lib/Target/Sparc/SparcInstrInfo.cpp
diff -u llvm/lib/Target/Sparc/SparcInstrInfo.cpp:1.35 llvm/lib/Target/Sparc/SparcInstrInfo.cpp:1.36
--- llvm/lib/Target/Sparc/SparcInstrInfo.cpp:1.35	Tue Jan 14 18:03:28 2003
+++ llvm/lib/Target/Sparc/SparcInstrInfo.cpp	Wed Jan 15 11:47:49 2003
@@ -53,7 +53,7 @@
   // Set the high 22 bits in dest if non-zero and simm13 field of OR not enough
   if (!smallNegValue && (C & ~MAXLO) && C > MAXSIMM)
     {
-      miSETHI = Create2OperandInstr_UImmed(SETHI, C, dest);
+      miSETHI = BuildMI(SETHI, 2).addZImm(C).addRegDef(dest);
       miSETHI->setOperandHi32(0);
       mvec.push_back(miSETHI);
     }
@@ -64,7 +64,7 @@
     {
       if (miSETHI)
         { // unsigned value with high-order bits set using SETHI
-          miOR = BuildMI(OR, 3).addReg(dest).addZImm(C).addReg(dest, MOTy::Def);
+          miOR = BuildMI(OR, 3).addReg(dest).addZImm(C).addRegDef(dest);
           miOR->setOperandLo32(1);
         }
       else
@@ -103,8 +103,7 @@
 
   // Sign-extend to the high 32 bits if needed
   if (C < 0 && (-C) > (int32_t) MAXSIMM)
-    mvec.push_back(BuildMI(SRA, 3).addReg(dest).addZImm(0).addReg(dest,
-                                                                  MOTy::Def));
+    mvec.push_back(BuildMI(SRA, 3).addReg(dest).addZImm(0).addRegDef(dest));
 }
 
 
@@ -131,15 +130,13 @@
   CreateSETUWConst(target, (C >> 32), tmpReg, mvec);
   
   // Shift tmpReg left by 32 bits
-  mvec.push_back(BuildMI(SLLX, 3).addReg(tmpReg).addZImm(32).addReg(tmpReg,
-                                                                    MOTy::Def));
+  mvec.push_back(BuildMI(SLLX, 3).addReg(tmpReg).addZImm(32).addRegDef(tmpReg));
   
   // Code to set the low 32 bits of the value in register `dest'
   CreateSETUWConst(target, C, dest, mvec);
   
   // dest = OR(tmpReg, dest)
-  mvec.push_back(BuildMI(OR, 3).addReg(dest).addReg(tmpReg).addReg(dest,
-                                                                   MOTy::Def));
+  mvec.push_back(BuildMI(OR, 3).addReg(dest).addReg(tmpReg).addRegDef(dest));
 }
 
 
@@ -156,12 +153,12 @@
   MachineInstr* MI;
   
   // Set the high 22 bits in dest
-  MI = Create2OperandInstr(SETHI, val, dest);
+  MI = BuildMI(SETHI, 2).addReg(val).addRegDef(dest);
   MI->setOperandHi32(0);
   mvec.push_back(MI);
   
   // Set the low 10 bits in dest
-  MI = BuildMI(OR, 3).addReg(dest).addReg(val).addReg(dest, MOTy::Def);
+  MI = BuildMI(OR, 3).addReg(dest).addReg(val).addRegDef(dest);
   MI->setOperandLo32(1);
   mvec.push_back(MI);
 }
@@ -183,24 +180,23 @@
   
   MachineInstr* MI;
   
-  MI = Create2OperandInstr_Addr(SETHI, val, tmpReg);
+  MI = BuildMI(SETHI, 2).addReg(val).addRegDef(tmpReg);
   MI->setOperandHi64(0);
   mvec.push_back(MI);
   
-  MI = BuildMI(OR, 3).addReg(tmpReg).addPCDisp(val).addReg(tmpReg, MOTy::Def);
+  MI = BuildMI(OR, 3).addReg(tmpReg).addPCDisp(val).addRegDef(tmpReg);
   MI->setOperandLo64(1);
   mvec.push_back(MI);
   
-  mvec.push_back(BuildMI(SLLX, 3).addReg(tmpReg).addZImm(32).addReg(tmpReg,
-                                                                    MOTy::Def));
-  MI = Create2OperandInstr_Addr(SETHI, val, dest);
+  mvec.push_back(BuildMI(SLLX, 3).addReg(tmpReg).addZImm(32).addRegDef(tmpReg));
+  MI = BuildMI(SETHI, 2).addPCDisp(val).addRegDef(dest);
   MI->setOperandHi32(0);
   mvec.push_back(MI);
   
-  MI = BuildMI(OR, 3).addReg(dest).addReg(tmpReg).addReg(dest, MOTy::Def);
+  MI = BuildMI(OR, 3).addReg(dest).addReg(tmpReg).addRegDef(dest);
   mvec.push_back(MI);
   
-  MI = BuildMI(OR, 3).addReg(dest).addPCDisp(val).addReg(dest, MOTy::Def);
+  MI = BuildMI(OR, 3).addReg(dest).addPCDisp(val).addRegDef(dest);
   MI->setOperandLo32(1);
   mvec.push_back(MI);
 }
@@ -454,7 +450,7 @@
       int64_t zeroOffset = 0;           // to avoid ambiguity with (Value*) 0
       unsigned Opcode = ChooseLoadInstruction(val->getType());
       mvec.push_back(BuildMI(Opcode, 3).addReg(addrReg).
-                     addSImm(zeroOffset).addReg(dest, MOTy::Def));
+                     addSImm(zeroOffset).addRegDef(dest));
       
       // Make sure constant is emitted to constant pool in assembly code.
       MachineFunction::get(F).getInfo()->addToConstantPool(cast<Constant>(val));
@@ -628,7 +624,7 @@
       const Type* Ty =isa<PointerType>(resultType) ? Type::ULongTy : resultType;
       MachineInstr* MI =
         BuildMI(opCode, 3).addReg(Constant::getNullValue(Ty))
-                          .addReg(src).addReg(dest, MOTy::Def);
+                          .addReg(src).addRegDef(dest);
       mvec.push_back(MI);
     }
 }
@@ -656,12 +652,12 @@
                                                 srcVal, destVal, "make32");
       mcfi.addTemp(tmpI);
       mvec.push_back(BuildMI(SLLX, 3).addReg(srcVal).addZImm(32-numLowBits)
-                                     .addReg(tmpI, MOTy::Def));
+                                     .addRegDef(tmpI));
       srcVal = tmpI;
     }
 
   mvec.push_back(BuildMI(signExtend? SRA : SRL, 3).addReg(srcVal)
-                         .addZImm(32-numLowBits).addReg(destVal, MOTy::Def));
+                         .addZImm(32-numLowBits).addRegDef(destVal));
 }
 
 


Index: llvm/lib/Target/Sparc/SparcInstrSelection.cpp
diff -u llvm/lib/Target/Sparc/SparcInstrSelection.cpp:1.82 llvm/lib/Target/Sparc/SparcInstrSelection.cpp:1.83
--- llvm/lib/Target/Sparc/SparcInstrSelection.cpp:1.82	Tue Jan 14 18:03:28 2003
+++ llvm/lib/Target/Sparc/SparcInstrSelection.cpp	Wed Jan 15 11:47:49 2003
@@ -303,11 +303,7 @@
 {
   MachineOpCode opCode = ChooseConvertFPToIntInstr(destTID, srcVal->getType());
   assert(opCode != INVALID_OPCODE && "Expected to need conversion!");
-  
-  MachineInstr* M = new MachineInstr(opCode);
-  M->SetMachineOperandVal(0, MachineOperand::MO_VirtualRegister, srcVal);
-  M->SetMachineOperandVal(1, MachineOperand::MO_VirtualRegister, destVal);
-  return M;
+  return BuildMI(opCode, 2).addReg(srcVal).addRegDef(destVal);
 }
 
 // CreateCodeToConvertFloatToInt: Convert FP value to signed or unsigned integer
@@ -367,13 +363,9 @@
 CreateMovFloatInstruction(const InstructionNode* instrNode,
                           const Type* resultType)
 {
-  MachineInstr* minstr = new MachineInstr((resultType == Type::FloatTy)
-                                          ? FMOVS : FMOVD);
-  minstr->SetMachineOperandVal(0, MachineOperand::MO_VirtualRegister,
-                               instrNode->leftChild()->getValue());
-  minstr->SetMachineOperandVal(1, MachineOperand::MO_VirtualRegister,
-                               instrNode->getValue());
-  return minstr;
+  return BuildMI((resultType == Type::FloatTy) ? FMOVS : FMOVD, 2)
+                   .addReg(instrNode->leftChild()->getValue())
+                   .addRegDef(instrNode->getValue());
 }
 
 static inline MachineInstr* 
@@ -501,11 +493,8 @@
 CreateIntNegInstruction(const TargetMachine& target,
                         Value* vreg)
 {
-  MachineInstr* minstr = new MachineInstr(SUB);
-  minstr->SetMachineOperandReg(0, target.getRegInfo().getZeroRegNum());
-  minstr->SetMachineOperandVal(1, MachineOperand::MO_VirtualRegister, vreg);
-  minstr->SetMachineOperandVal(2, MachineOperand::MO_VirtualRegister, vreg);
-  return minstr;
+  return BuildMI(SUB, 3).addMReg(target.getRegInfo().getZeroRegNum())
+                        .addReg(vreg).addRegDef(vreg);
 }
 
 
@@ -600,15 +589,16 @@
               C = -C;
             }
           
-          if (C == 0 || C == 1)
-            {
-              cost = target.getInstrInfo().minLatency(ADD);
-              unsigned ZeroReg = target.getRegInfo().getZeroRegNum();
-              MachineInstr* M = (C == 0)
-                ? Create3OperandInstr_Reg(ADD, ZeroReg, ZeroReg, destVal)
-                : Create3OperandInstr_Reg(ADD, lval, ZeroReg, destVal);
-              mvec.push_back(M);
-            }
+          if (C == 0 || C == 1) {
+            cost = target.getInstrInfo().minLatency(ADD);
+            unsigned Zero = target.getRegInfo().getZeroRegNum();
+            MachineInstr* M;
+            if (C == 0)
+              M = BuildMI(ADD,3).addMReg(Zero).addMReg(Zero).addRegDef(destVal);
+            else
+              M = BuildMI(ADD,3).addReg(lval).addMReg(Zero).addRegDef(destVal);
+            mvec.push_back(M);
+          }
           else if (isPowerOf2(C, pow))
             {
               unsigned opSize = target.getTargetData().getTypeSize(resultType);
@@ -634,8 +624,7 @@
               MachineOpCode opCode =  (dval < 0)
                 ? (resultType == Type::FloatTy? FNEGS : FNEGD)
                 : (resultType == Type::FloatTy? FMOVS : FMOVD);
-              MachineInstr* M = Create2OperandInstr(opCode, lval, destVal);
-              mvec.push_back(M);
+              mvec.push_back(BuildMI(opCode,2).addReg(lval).addRegDef(destVal));
             } 
         }
     }
@@ -695,11 +684,8 @@
       MachineOpCode mulOp = ((forceMulOp != INVALID_MACHINE_OPCODE)
                              ? forceMulOp 
                              : ChooseMulInstructionByType(destVal->getType()));
-      MachineInstr* M = new MachineInstr(mulOp);
-      M->SetMachineOperandVal(0, MachineOperand::MO_VirtualRegister, lval);
-      M->SetMachineOperandVal(1, MachineOperand::MO_VirtualRegister, rval);
-      M->SetMachineOperandVal(2, MachineOperand::MO_VirtualRegister, destVal);
-      mvec.push_back(M);
+      mvec.push_back(BuildMI(mulOp, 3).addReg(lval).addReg(rval)
+                                      .addRegDef(destVal));
     }
 }
 
@@ -1438,9 +1424,9 @@
       { // First find the unary operand. It may be left or right, usually right.
         Value* notArg = BinaryOperator::getNotArgument(
                            cast<BinaryOperator>(subtreeRoot->getInstruction()));
-        mvec.push_back(Create3OperandInstr_Reg(XNOR, notArg,
-                                          target.getRegInfo().getZeroRegNum(),
-                                          subtreeRoot->getValue()));
+        unsigned ZeroReg = target.getRegInfo().getZeroRegNum();
+        mvec.push_back(BuildMI(XNOR, 3).addReg(notArg).addMReg(ZeroReg)
+                                       .addRegDef(subtreeRoot->getValue()));
         break;
       }
 
@@ -2010,7 +1996,7 @@
         // Use JMPL for indirect calls.
         // 
         if (isa<Function>(callee))      // direct function call
-          M = Create1OperandInstr_Addr(CALL, callee);
+          M = BuildMI(CALL, 1).addPCDisp(callee);
         else                            // indirect function call
           M = BuildMI(JMPLCALL,
                       3).addReg(callee).addSImm((int64_t)0).addReg(retAddrReg);


Index: llvm/lib/Target/Sparc/SparcRegInfo.cpp
diff -u llvm/lib/Target/Sparc/SparcRegInfo.cpp:1.84 llvm/lib/Target/Sparc/SparcRegInfo.cpp:1.85
--- llvm/lib/Target/Sparc/SparcRegInfo.cpp:1.84	Tue Jan 14 17:05:08 2003
+++ llvm/lib/Target/Sparc/SparcRegInfo.cpp	Wed Jan 15 11:47:49 2003
@@ -12,7 +12,7 @@
 #include "llvm/CodeGen/PhyRegAlloc.h"
 #include "llvm/CodeGen/InstrSelection.h"
 #include "llvm/CodeGen/InstrSelectionSupport.h"
-#include "llvm/CodeGen/MachineInstr.h"
+#include "llvm/CodeGen/MachineInstrBuilder.h"
 #include "llvm/CodeGen/MachineInstrAnnot.h"
 #include "llvm/CodeGen/RegAllocCommon.h"
 #include "llvm/CodeGen/FunctionLiveVarInfo.h"   // FIXME: Remove
@@ -1100,14 +1100,14 @@
     if (getRegType(DestReg) == IntRegType)
       { // copy intCC reg to int reg
         // Use SrcReg+1 to get the name "%ccr" instead of "%xcc" for RDCCR
-        MI = Create2OperandInstr_Reg(RDCCR, SrcReg+1, DestReg);
+        MI = BuildMI(RDCCR, 2).addMReg(SrcReg+1).addMReg(DestReg, MOTy::Def);
       }
     else 
       { // copy int reg to intCC reg
         // Use DestReg+1 to get the name "%ccr" instead of "%xcc" for WRCCR
         assert(getRegType(SrcReg) == IntRegType
                && "Can only copy CC reg to/from integer reg");
-        MI = Create2OperandInstr_Reg(WRCCR, SrcReg, DestReg+1);
+        MI = BuildMI(WRCCR, 2).addMReg(SrcReg).addMReg(DestReg+1, MOTy::Def);
       }
     break;
     
@@ -1116,15 +1116,16 @@
     break;
     
   case IntRegType:
-    MI = Create3OperandInstr_Reg(ADD, SrcReg, getZeroRegNum(), DestReg);
+    MI = BuildMI(ADD, 3).addMReg(SrcReg).addMReg(getZeroRegNum())
+                        .addMReg(DestReg, MOTy::Def);
     break;
     
   case FPSingleRegType:
-    MI = Create2OperandInstr_Reg(FMOVS, SrcReg, DestReg);
+    MI = BuildMI(FMOVS, 2).addMReg(SrcReg).addMReg(DestReg, MOTy::Def);
     break;
 
   case FPDoubleRegType:
-    MI = Create2OperandInstr_Reg(FMOVD, SrcReg, DestReg);
+    MI = BuildMI(FMOVD, 2).addMReg(SrcReg).addMReg(DestReg, MOTy::Def);
     break;
 
   default:
@@ -1149,35 +1150,20 @@
                                int Offset, int RegType,
                                int scratchReg) const {
   MachineInstr * MI = NULL;
-  switch( RegType ) {
+  switch (RegType) {
   case IntRegType:
     assert(target.getInstrInfo().constantFitsInImmedField(STX, Offset));
-    MI = new MachineInstr(STX, 3);
-    MI->SetMachineOperandReg(0, SrcReg);
-    MI->SetMachineOperandReg(1, DestPtrReg);
-    MI->SetMachineOperandConst(2, MachineOperand:: MO_SignExtendedImmed, 
-                               (int64_t) Offset);
-    mvec.push_back(MI);
+    MI = BuildMI(STX, 3).addMReg(SrcReg).addMReg(DestPtrReg).addSImm(Offset);
     break;
 
   case FPSingleRegType:
     assert(target.getInstrInfo().constantFitsInImmedField(ST, Offset));
-    MI = new MachineInstr(ST, 3);
-    MI->SetMachineOperandReg(0, SrcReg);
-    MI->SetMachineOperandReg(1, DestPtrReg);
-    MI->SetMachineOperandConst(2, MachineOperand:: MO_SignExtendedImmed, 
-                               (int64_t) Offset);
-    mvec.push_back(MI);
+    MI = BuildMI(ST, 3).addMReg(SrcReg).addMReg(DestPtrReg).addSImm(Offset);
     break;
 
   case FPDoubleRegType:
     assert(target.getInstrInfo().constantFitsInImmedField(STD, Offset));
-    MI = new MachineInstr(STD, 3);
-    MI->SetMachineOperandReg(0, SrcReg);
-    MI->SetMachineOperandReg(1, DestPtrReg);
-    MI->SetMachineOperandConst(2, MachineOperand:: MO_SignExtendedImmed, 
-                               (int64_t) Offset);
-    mvec.push_back(MI);
+    MI = BuildMI(STD, 3).addMReg(SrcReg).addMReg(DestPtrReg).addSImm(Offset);
     break;
 
   case IntCCRegType:
@@ -1185,26 +1171,22 @@
     assert(getRegType(scratchReg) ==IntRegType && "Invalid scratch reg");
     
     // Use SrcReg+1 to get the name "%ccr" instead of "%xcc" for RDCCR
-    MI = Create2OperandInstr_Reg(RDCCR, SrcReg+1, scratchReg);
+    MI = BuildMI(RDCCR, 2).addMReg(SrcReg+1).addMReg(scratchReg, MOTy::Def);
     mvec.push_back(MI);
     
     cpReg2MemMI(mvec, scratchReg, DestPtrReg, Offset, IntRegType);
-    break;
+    return;
     
   case FloatCCRegType: 
     assert(0 && "Tell Vikram if this assertion fails: we may have to mask out the other bits here");
     assert(target.getInstrInfo().constantFitsInImmedField(STXFSR, Offset));
-    MI = new MachineInstr(STXFSR, 3);
-    MI->SetMachineOperandReg(0, SrcReg);
-    MI->SetMachineOperandReg(1, DestPtrReg);
-    MI->SetMachineOperandConst(2, MachineOperand:: MO_SignExtendedImmed, 
-                               (int64_t) Offset);
-    mvec.push_back(MI);
+    MI = BuildMI(STXFSR, 3).addMReg(SrcReg).addMReg(DestPtrReg).addSImm(Offset);
     break;
     
   default:
     assert(0 && "Unknown RegType in cpReg2MemMI");
   }
+  mvec.push_back(MI);
 }
 
 
@@ -1225,32 +1207,20 @@
   switch (RegType) {
   case IntRegType:
     assert(target.getInstrInfo().constantFitsInImmedField(LDX, Offset));
-    MI = new MachineInstr(LDX, 3);
-    MI->SetMachineOperandReg(0, SrcPtrReg);
-    MI->SetMachineOperandConst(1, MachineOperand:: MO_SignExtendedImmed, 
-                               (int64_t) Offset);
-    MI->SetMachineOperandReg(2, DestReg, true);
-    mvec.push_back(MI);
+    MI = BuildMI(LDX, 3).addMReg(SrcPtrReg).addSImm(Offset)
+                        .addMReg(DestReg, MOTy::Def);
     break;
 
   case FPSingleRegType:
     assert(target.getInstrInfo().constantFitsInImmedField(LD, Offset));
-    MI = new MachineInstr(LD, 3);
-    MI->SetMachineOperandReg(0, SrcPtrReg);
-    MI->SetMachineOperandConst(1, MachineOperand:: MO_SignExtendedImmed, 
-                               (int64_t) Offset);
-    MI->SetMachineOperandReg(2, DestReg, true);
-    mvec.push_back(MI);
+    MI = BuildMI(LD, 3).addMReg(SrcPtrReg).addSImm(Offset)
+                       .addMReg(DestReg, MOTy::Def);
     break;
 
   case FPDoubleRegType:
     assert(target.getInstrInfo().constantFitsInImmedField(LDD, Offset));
-    MI = new MachineInstr(LDD, 3);
-    MI->SetMachineOperandReg(0, SrcPtrReg);
-    MI->SetMachineOperandConst(1, MachineOperand:: MO_SignExtendedImmed, 
-                               (int64_t) Offset);
-    MI->SetMachineOperandReg(2, DestReg, true);
-    mvec.push_back(MI);
+    MI = BuildMI(LDD, 3).addMReg(SrcPtrReg).addSImm(Offset).addMReg(DestReg,
+                                                                    MOTy::Def);
     break;
 
   case IntCCRegType:
@@ -1259,25 +1229,21 @@
     cpMem2RegMI(mvec, SrcPtrReg, Offset, scratchReg, IntRegType);
     
     // Use DestReg+1 to get the name "%ccr" instead of "%xcc" for WRCCR
-    MI = Create2OperandInstr_Reg(WRCCR, scratchReg, DestReg+1);
-    mvec.push_back(MI);
-
+    MI = BuildMI(WRCCR, 2).addMReg(scratchReg).addMReg(DestReg+1, MOTy::Def);
     break;
     
   case FloatCCRegType: 
-    assert(0 && "Tell Vikram if this assertion fails: we may have to mask out the other bits here");
+    assert(0 && "Tell Vikram if this assertion fails: we may have to mask "
+           "out the other bits here");
     assert(target.getInstrInfo().constantFitsInImmedField(LDXFSR, Offset));
-    MI = new MachineInstr(LDXFSR, 3);
-    MI->SetMachineOperandReg(0, SrcPtrReg);
-    MI->SetMachineOperandConst(1, MachineOperand:: MO_SignExtendedImmed, 
-                               (int64_t) Offset);
-    MI->SetMachineOperandReg(2, DestReg, true);
-    mvec.push_back(MI);
+    MI = BuildMI(LDXFSR, 3).addMReg(SrcPtrReg).addSImm(Offset)
+                           .addMReg(DestReg, MOTy::Def);
     break;
 
   default:
     assert(0 && "Unknown RegType in cpMem2RegMI");
   }
+  mvec.push_back(MI);
 }
 
 
@@ -1288,8 +1254,7 @@
 
 
 void
-UltraSparcRegInfo::cpValue2Value(Value *Src,
-                                 Value *Dest,
+UltraSparcRegInfo::cpValue2Value(Value *Src, Value *Dest,
                                  vector<MachineInstr*>& mvec) const {
   int RegType = getRegType( Src );
 
@@ -1299,25 +1264,14 @@
 
   switch( RegType ) {
   case IntRegType:
-    MI = new MachineInstr(ADD, 3);
-    MI->SetMachineOperandVal(0, MachineOperand::MO_VirtualRegister, Src);
-    MI->SetMachineOperandReg(1, getZeroRegNum());
-    MI->SetMachineOperandVal(2, MachineOperand::MO_VirtualRegister, Dest, true);
+    MI = BuildMI(ADD, 3).addReg(Src).addMReg(getZeroRegNum()).addRegDef(Dest);
     break;
-
   case FPSingleRegType:
-    MI = new MachineInstr(FMOVS, 2);
-    MI->SetMachineOperandVal(0, MachineOperand::MO_VirtualRegister, Src);
-    MI->SetMachineOperandVal(1, MachineOperand::MO_VirtualRegister, Dest, true);
+    MI = BuildMI(FMOVS, 2).addReg(Src).addRegDef(Dest);
     break;
-
-
   case FPDoubleRegType:
-    MI = new MachineInstr(FMOVD, 2);
-    MI->SetMachineOperandVal(0, MachineOperand::MO_VirtualRegister, Src);
-    MI->SetMachineOperandVal(1, MachineOperand::MO_VirtualRegister, Dest, true);
+    MI = BuildMI(FMOVD, 2).addReg(Src).addRegDef(Dest);
     break;
-
   default:
     assert(0 && "Unknow RegType in CpValu2Value");
   }




From lattner at cs.uiuc.edu  Wed Jan 15 12:07:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed Jan 15 12:07:01 2003
Subject: [llvm-commits] CVS: llvm/test/Regression/LLC/badFoldGEP.ll select.ll spillccr.ll
Message-ID: <200301151806.MAA20627@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Regression/LLC:

badFoldGEP.ll updated: 1.1 -> 1.2
select.ll updated: 1.7 -> 1.8
spillccr.ll updated: 1.2 -> 1.3

---
Log message:

Cleanup testcase


---
Diffs of the changes:

Index: llvm/test/Regression/LLC/badFoldGEP.ll
diff -u llvm/test/Regression/LLC/badFoldGEP.ll:1.1 llvm/test/Regression/LLC/badFoldGEP.ll:1.2
--- llvm/test/Regression/LLC/badFoldGEP.ll:1.1	Sat Sep 28 13:09:05 2002
+++ llvm/test/Regression/LLC/badFoldGEP.ll	Wed Jan 15 12:06:37 2003
@@ -10,7 +10,7 @@
 ;; 
 
 %Domain = type { sbyte*, int, int*, int, int, int*, %Domain* }
-%domain_array = internal uninitialized global [497 x %Domain] 
+%domain_array = uninitialized global [497 x %Domain] 
 
 implementation; Functions:
 


Index: llvm/test/Regression/LLC/select.ll
diff -u llvm/test/Regression/LLC/select.ll:1.7 llvm/test/Regression/LLC/select.ll:1.8
--- llvm/test/Regression/LLC/select.ll:1.7	Sat Oct 12 19:44:00 2002
+++ llvm/test/Regression/LLC/select.ll	Wed Jan 15 12:06:37 2003
@@ -201,7 +201,7 @@
 ;
 int "checkFoldGEP"(%Domain* %D, long %idx)
 begin
-        %reg841 = getelementptr %Domain* %D, long 0, ubyte 2, long %idx
+        %reg841 = getelementptr %Domain* %D, long 0, ubyte 1
         %reg820 = load int* %reg841
         ret int %reg820
 end


Index: llvm/test/Regression/LLC/spillccr.ll
diff -u llvm/test/Regression/LLC/spillccr.ll:1.2 llvm/test/Regression/LLC/spillccr.ll:1.3
--- llvm/test/Regression/LLC/spillccr.ll:1.2	Thu Aug  1 15:50:03 2002
+++ llvm/test/Regression/LLC/spillccr.ll	Wed Jan 15 12:06:37 2003
@@ -16,7 +16,7 @@
 	%struct.hash = type { %HashEntry*, int (uint)*, int }
 	%struct.hash_entry = type { uint, sbyte*, %HashEntry }
 	%struct.vert_st = type { int, %Vertex, %Hash }
-%HashRange = internal uninitialized global int		; <int*> [#uses=1]
+%HashRange = uninitialized global int		; <int*> [#uses=1]
 %.LC0 = internal global [13 x sbyte] c"Make phase 2\00"		; <[13 x sbyte]*> [#uses=1]
 %.LC1 = internal global [13 x sbyte] c"Make phase 3\00"		; <[13 x sbyte]*> [#uses=1]
 %.LC2 = internal global [13 x sbyte] c"Make phase 4\00"		; <[13 x sbyte]*> [#uses=1]




From lattner at cs.uiuc.edu  Wed Jan 15 12:09:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed Jan 15 12:09:01 2003
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp
Message-ID: <200301151808.MAA20708@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/CodeGen/RegAlloc:

PhyRegAlloc.cpp updated: 1.91 -> 1.92

---
Log message:

Use buildmi not MI ctor directly


---
Diffs of the changes:

Index: llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp
diff -u llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp:1.91 llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp:1.92
--- llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp:1.91	Tue Jan 14 17:05:06 2003
+++ llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp	Wed Jan 15 12:08:07 2003
@@ -8,7 +8,7 @@
 #include "llvm/CodeGen/RegAllocCommon.h"
 #include "llvm/CodeGen/IGNode.h"
 #include "llvm/CodeGen/PhyRegAlloc.h"
-#include "llvm/CodeGen/MachineInstr.h"
+#include "llvm/CodeGen/MachineInstrBuilder.h"
 #include "llvm/CodeGen/MachineInstrAnnot.h"
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/MachineFunctionInfo.h"
@@ -578,8 +578,7 @@
               // needs spill code inserted before or after it.
               // Move it before the preceding branch.
               InsertBefore(MInst, MBB, --MII);
-              MachineInstr* nopI =
-                new MachineInstr(TM.getInstrInfo().getNOPOpCode());
+              MachineInstr* nopI = BuildMI(TM.getInstrInfo().getNOPOpCode(),1);
               SubstituteInPlace(nopI, MBB, MII+1); // replace orig with NOP
               --MII;                  // point to MInst in new location
               bumpIteratorBy = 2;     // later skip the branch and the NOP!




From lattner at cs.uiuc.edu  Wed Jan 15 12:12:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed Jan 15 12:12:01 2003
Subject: [llvm-commits] CVS: llvm/lib/Target/Sparc/SparcInstrSelection.cpp
Message-ID: <200301151811.MAA20730@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Target/Sparc:

SparcInstrSelection.cpp updated: 1.83 -> 1.84

---
Log message:

Fix bug found by regtests


---
Diffs of the changes:

Index: llvm/lib/Target/Sparc/SparcInstrSelection.cpp
diff -u llvm/lib/Target/Sparc/SparcInstrSelection.cpp:1.83 llvm/lib/Target/Sparc/SparcInstrSelection.cpp:1.84
--- llvm/lib/Target/Sparc/SparcInstrSelection.cpp:1.83	Wed Jan 15 11:47:49 2003
+++ llvm/lib/Target/Sparc/SparcInstrSelection.cpp	Wed Jan 15 12:11:11 2003
@@ -1251,18 +1251,14 @@
         Instruction* returnReg = new TmpInstruction(returnInstr);
         MachineCodeForInstruction::get(returnInstr).addTemp(returnReg);
         
-        M = new MachineInstr(JMPLRET);
-        M->SetMachineOperandVal(0, MachineOperand::MO_VirtualRegister,
-                                returnReg);
-        M->SetMachineOperandConst(1,MachineOperand::MO_SignExtendedImmed,
-                                  (int64_t)8);
-        M->SetMachineOperandReg(2, target.getRegInfo().getZeroRegNum());
+        M = BuildMI(JMPLRET, 3).addReg(returnReg).addSImm(8)
+                       .addMReg(target.getRegInfo().getZeroRegNum(), MOTy::Def);
         
         if (returnInstr->getReturnValue() != NULL)
           M->addImplicitRef(returnInstr->getReturnValue());
         
         mvec.push_back(M);
-        mvec.push_back(new MachineInstr(NOP));
+        mvec.push_back(BuildMI(NOP, 0));
         
         break;
       }  
@@ -1998,8 +1994,8 @@
         if (isa<Function>(callee))      // direct function call
           M = BuildMI(CALL, 1).addPCDisp(callee);
         else                            // indirect function call
-          M = BuildMI(JMPLCALL,
-                      3).addReg(callee).addSImm((int64_t)0).addReg(retAddrReg);
+          M = BuildMI(JMPLCALL, 3).addReg(callee).addSImm((int64_t)0)
+                                  .addRegDef(retAddrReg);
         mvec.push_back(M);
 
         const FunctionType* funcType =




From lattner at cs.uiuc.edu  Wed Jan 15 13:23:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed Jan 15 13:23:01 2003
Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/InstrSelectionSupport.h
Message-ID: <200301151922.NAA22588@apoc.cs.uiuc.edu>


Changes in directory llvm/include/llvm/CodeGen:

InstrSelectionSupport.h updated: 1.19 -> 1.20

---
Log message:

Remove more unused methods


---
Diffs of the changes:

Index: llvm/include/llvm/CodeGen/InstrSelectionSupport.h
diff -u llvm/include/llvm/CodeGen/InstrSelectionSupport.h:1.19 llvm/include/llvm/CodeGen/InstrSelectionSupport.h:1.20
--- llvm/include/llvm/CodeGen/InstrSelectionSupport.h:1.19	Wed Jan 15 11:35:44 2003
+++ llvm/include/llvm/CodeGen/InstrSelectionSupport.h	Wed Jan 15 13:21:50 2003
@@ -58,48 +58,6 @@
                                  bool& allConstantIndices);
 
 
-//------------------------------------------------------------------------ 
-// Function Set2OperandsFromInstr
-// Function Set3OperandsFromInstr
-// 
-// Purpose:
-// 
-// For the common case of 2- and 3-operand arithmetic/logical instructions,
-// set the m/c instr. operands directly from the VM instruction's operands.
-// Check whether the first or second operand is 0 and can use a dedicated
-// "0" register.
-// Check whether the second operand should use an immediate field or register.
-// (First and third operands are never immediates for such instructions.)
-// 
-// Arguments:
-// canDiscardResult: Specifies that the result operand can be discarded
-//		     by using the dedicated "0"
-// 
-// op1position, op2position and resultPosition: Specify in which position
-//		     in the machine instruction the 3 operands (arg1, arg2
-//		     and result) should go.
-// 
-// RETURN VALUE: unsigned flags, where
-//	flags & 0x01	=> operand 1 is constant and needs a register
-//	flags & 0x02	=> operand 2 is constant and needs a register
-//------------------------------------------------------------------------ 
-
-void		Set2OperandsFromInstr	(MachineInstr* minstr,
-					 InstructionNode* vmInstrNode,
-					 const TargetMachine& targetMachine,
-					 bool canDiscardResult = false,
-					 int op1Position = 0,
-					 int resultPosition = 1);
-
-void		Set3OperandsFromInstr	(MachineInstr* minstr,
-					 InstructionNode* vmInstrNode,
-					 const TargetMachine& targetMachine,
-					 bool canDiscardResult = false,
-					 int op1Position = 0,
-					 int op2Position = 1,
-					 int resultPosition = 2);
-
-
 //---------------------------------------------------------------------------
 // Function: ChooseRegOrImmed
 // 




From lattner at cs.uiuc.edu  Wed Jan 15 13:23:03 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed Jan 15 13:23:03 2003
Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstrBuilder.h
Message-ID: <200301151922.NAA22595@apoc.cs.uiuc.edu>


Changes in directory llvm/include/llvm/CodeGen:

MachineInstrBuilder.h updated: 1.12 -> 1.13

---
Log message:

ADd support for CC registers for Sparc BE


---
Diffs of the changes:

Index: llvm/include/llvm/CodeGen/MachineInstrBuilder.h
diff -u llvm/include/llvm/CodeGen/MachineInstrBuilder.h:1.12 llvm/include/llvm/CodeGen/MachineInstrBuilder.h:1.13
--- llvm/include/llvm/CodeGen/MachineInstrBuilder.h:1.12	Wed Jan 15 11:18:22 2003
+++ llvm/include/llvm/CodeGen/MachineInstrBuilder.h	Wed Jan 15 13:22:23 2003
@@ -43,6 +43,14 @@
     return *this;
   }
 
+  /// addReg - Add an LLVM value that is to be used as a register...
+  ///
+  const MachineInstrBuilder &addCCReg(Value *V,
+                                      MOTy::UseType Ty = MOTy::Use) const {
+    MI->addCCRegOperand(V, Ty);
+    return *this;
+  }
+
   /// addRegDef - Add an LLVM value that is to be defined as a register... this
   /// is the same as addReg(V, MOTy::Def).
   ///




From lattner at cs.uiuc.edu  Wed Jan 15 13:23:05 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed Jan 15 13:23:05 2003
Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h
Message-ID: <200301151922.NAA22604@apoc.cs.uiuc.edu>


Changes in directory llvm/include/llvm/CodeGen:

MachineInstr.h updated: 1.96 -> 1.97

---
Log message:

Add support for the CC registers for Sparc BE


---
Diffs of the changes:

Index: llvm/include/llvm/CodeGen/MachineInstr.h
diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.96 llvm/include/llvm/CodeGen/MachineInstr.h:1.97
--- llvm/include/llvm/CodeGen/MachineInstr.h:1.96	Tue Jan 14 15:29:39 2003
+++ llvm/include/llvm/CodeGen/MachineInstr.h	Wed Jan 15 13:22:06 2003
@@ -473,6 +473,14 @@
                                       UTy, isPCRelative));
   }
 
+  void addCCRegOperand(Value *V, MOTy::UseType UTy = MOTy::Use) {
+    assert(!OperandsComplete() &&
+           "Trying to add an operand to a machine instr that is already done!");
+    operands.push_back(MachineOperand(V, MachineOperand::MO_CCRegister, UTy,
+                                      false));
+  }
+
+
   /// addRegOperand - Add a symbolic virtual register reference...
   ///
   void addRegOperand(int reg, bool isDef) {




From lattner at cs.uiuc.edu  Wed Jan 15 13:23:08 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed Jan 15 13:23:08 2003
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp
Message-ID: <200301151922.NAA22611@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/CodeGen/InstrSelection:

InstrSelectionSupport.cpp updated: 1.42 -> 1.43

---
Log message:

Remove dead code


---
Diffs of the changes:

Index: llvm/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp
diff -u llvm/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp:1.42 llvm/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp:1.43
--- llvm/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp:1.42	Tue Jan 14 15:58:44 2003
+++ llvm/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp	Wed Jan 15 13:22:38 2003
@@ -302,73 +302,6 @@
                   : ptrVal;
 }
 
-
-//------------------------------------------------------------------------ 
-// Function Set2OperandsFromInstr
-// Function Set3OperandsFromInstr
-// 
-// For the common case of 2- and 3-operand arithmetic/logical instructions,
-// set the m/c instr. operands directly from the VM instruction's operands.
-// Check whether the first or second operand is 0 and can use a dedicated "0"
-// register.
-// Check whether the second operand should use an immediate field or register.
-// (First and third operands are never immediates for such instructions.)
-// 
-// Arguments:
-// canDiscardResult: Specifies that the result operand can be discarded
-//		     by using the dedicated "0"
-// 
-// op1position, op2position and resultPosition: Specify in which position
-//		     in the machine instruction the 3 operands (arg1, arg2
-//		     and result) should go.
-// 
-//------------------------------------------------------------------------ 
-
-void
-Set2OperandsFromInstr(MachineInstr* minstr,
-		      InstructionNode* vmInstrNode,
-		      const TargetMachine& target,
-		      bool canDiscardResult,
-		      int op1Position,
-		      int resultPosition)
-{
-  Set3OperandsFromInstr(minstr, vmInstrNode, target,
-			canDiscardResult, op1Position,
-			/*op2Position*/ -1, resultPosition);
-}
-
-
-void
-Set3OperandsFromInstr(MachineInstr* minstr,
-		      InstructionNode* vmInstrNode,
-		      const TargetMachine& target,
-		      bool canDiscardResult,
-		      int op1Position,
-		      int op2Position,
-		      int resultPosition)
-{
-  assert(op1Position >= 0);
-  assert(resultPosition >= 0);
-  
-  // operand 1
-  minstr->SetMachineOperandVal(op1Position, MachineOperand::MO_VirtualRegister,
-			    vmInstrNode->leftChild()->getValue());   
-  
-  // operand 2 (if any)
-  if (op2Position >= 0)
-    minstr->SetMachineOperandVal(op2Position, MachineOperand::MO_VirtualRegister,
-			      vmInstrNode->rightChild()->getValue());   
-  
-  // result operand: if it can be discarded, use a dead register if one exists
-  if (canDiscardResult && target.getRegInfo().getZeroRegNum() >= 0)
-    minstr->SetMachineOperandReg(resultPosition,
-			      target.getRegInfo().getZeroRegNum());
-  else
-    minstr->SetMachineOperandVal(resultPosition,
-			      MachineOperand::MO_VirtualRegister, vmInstrNode->getValue());
-}
-
-
 MachineOperand::MachineOperandType
 ChooseRegOrImmed(int64_t intValue,
                  bool isSigned,




From lattner at cs.uiuc.edu  Wed Jan 15 13:24:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed Jan 15 13:24:01 2003
Subject: [llvm-commits] CVS: llvm/lib/Target/Sparc/SparcInstrInfo.cpp SparcInstrSelection.cpp
Message-ID: <200301151923.NAA22625@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Target/Sparc:

SparcInstrInfo.cpp updated: 1.36 -> 1.37
SparcInstrSelection.cpp updated: 1.84 -> 1.85

---
Log message:

Use BuildMI more


---
Diffs of the changes:

Index: llvm/lib/Target/Sparc/SparcInstrInfo.cpp
diff -u llvm/lib/Target/Sparc/SparcInstrInfo.cpp:1.36 llvm/lib/Target/Sparc/SparcInstrInfo.cpp:1.37
--- llvm/lib/Target/Sparc/SparcInstrInfo.cpp:1.36	Wed Jan 15 11:47:49 2003
+++ llvm/lib/Target/Sparc/SparcInstrInfo.cpp	Wed Jan 15 13:23:34 2003
@@ -70,11 +70,8 @@
       else
         { // unsigned or small signed value that fits in simm13 field of OR
           assert(smallNegValue || (C & ~MAXSIMM) == 0);
-          miOR = new MachineInstr(OR);
-          miOR->SetMachineOperandReg(0, target.getRegInfo().getZeroRegNum());
-          miOR->SetMachineOperandConst(1, MachineOperand::MO_SignExtendedImmed,
-                                       sC);
-          miOR->SetMachineOperandVal(2,MachineOperand::MO_VirtualRegister,dest);
+          miOR = BuildMI(OR, 3).addMReg(target.getRegInfo().getZeroRegNum())
+                               .addSImm(sC).addRegDef(dest);
         }
       mvec.push_back(miOR);
     }
@@ -180,7 +177,7 @@
   
   MachineInstr* MI;
   
-  MI = BuildMI(SETHI, 2).addReg(val).addRegDef(tmpReg);
+  MI = BuildMI(SETHI, 2).addPCDisp(val).addRegDef(tmpReg);
   MI->setOperandHi64(0);
   mvec.push_back(MI);
   
@@ -501,11 +498,10 @@
         CreateZeroExtensionInstructions(target, F, val, storeVal, 8*srcSize,
                                         mvec, mcfi);
     }
-  MachineInstr* store=new MachineInstr(ChooseStoreInstruction(storeType));
-  store->SetMachineOperandVal(0, MachineOperand::MO_VirtualRegister, storeVal);
-  store->SetMachineOperandReg(1, target.getRegInfo().getFramePointer());
-  store->SetMachineOperandConst(2,MachineOperand::MO_SignExtendedImmed,offset);
-  mvec.push_back(store);
+
+  unsigned FPReg = target.getRegInfo().getFramePointer();
+  mvec.push_back(BuildMI(ChooseStoreInstruction(storeType), 3)
+                 .addReg(storeVal).addMReg(FPReg).addSImm(offset));
 
   // Load instruction loads [%fp+offset] to `dest'.
   // The type of the load opCode is the floating point type that matches the
@@ -513,11 +509,8 @@
   // On SparcV9: float for int or smaller, double for long.
   // 
   const Type* loadType = (srcSize <= 4)? Type::FloatTy : Type::DoubleTy;
-  MachineInstr* load = new MachineInstr(ChooseLoadInstruction(loadType));
-  load->SetMachineOperandReg(0, target.getRegInfo().getFramePointer());
-  load->SetMachineOperandConst(1, MachineOperand::MO_SignExtendedImmed,offset);
-  load->SetMachineOperandVal(2, MachineOperand::MO_VirtualRegister, dest);
-  mvec.push_back(load);
+  mvec.push_back(BuildMI(ChooseLoadInstruction(loadType), 3)
+                 .addMReg(FPReg).addSImm(offset).addRegDef(dest));
 }
 
 // Similarly, create an instruction sequence to copy an FP register
@@ -543,14 +536,13 @@
 
   int offset = MachineFunction::get(F).getInfo()->allocateLocalVar(val); 
 
+  unsigned FPReg = target.getRegInfo().getFramePointer();
+
   // Store instruction stores `val' to [%fp+offset].
   // The store opCode is based only the source value being copied.
   // 
-  MachineInstr* store=new MachineInstr(ChooseStoreInstruction(opTy));
-  store->SetMachineOperandVal(0, MachineOperand::MO_VirtualRegister, val);
-  store->SetMachineOperandReg(1, target.getRegInfo().getFramePointer());
-  store->SetMachineOperandConst(2,MachineOperand::MO_SignExtendedImmed,offset);
-  mvec.push_back(store);
+  mvec.push_back(BuildMI(ChooseStoreInstruction(opTy), 3)
+                 .addReg(val).addMReg(FPReg).addSImm(offset));
 
   // Load instruction loads [%fp+offset] to `dest'.
   // The type of the load opCode is the integer type that matches the
@@ -560,11 +552,8 @@
   // ensure correct sign-extension for UByte, UShort or UInt:
   // 
   const Type* loadTy = (opTy == Type::FloatTy)? Type::IntTy : Type::LongTy;
-  MachineInstr* load = new MachineInstr(ChooseLoadInstruction(loadTy));
-  load->SetMachineOperandReg(0, target.getRegInfo().getFramePointer());
-  load->SetMachineOperandConst(1, MachineOperand::MO_SignExtendedImmed,offset);
-  load->SetMachineOperandVal(2, MachineOperand::MO_VirtualRegister, dest);
-  mvec.push_back(load);
+  mvec.push_back(BuildMI(ChooseLoadInstruction(loadTy), 3).addMReg(FPReg)
+                 .addSImm(offset).addRegDef(dest));
 }
 
 


Index: llvm/lib/Target/Sparc/SparcInstrSelection.cpp
diff -u llvm/lib/Target/Sparc/SparcInstrSelection.cpp:1.84 llvm/lib/Target/Sparc/SparcInstrSelection.cpp:1.85
--- llvm/lib/Target/Sparc/SparcInstrSelection.cpp:1.84	Wed Jan 15 12:11:11 2003
+++ llvm/lib/Target/Sparc/SparcInstrSelection.cpp	Wed Jan 15 13:23:34 2003
@@ -26,6 +26,16 @@
 #include <math.h>
 using std::vector;
 
+static inline void Add3OperandInstr(unsigned Opcode, InstructionNode* Node,
+                                    vector<MachineInstr*>& mvec) {
+  mvec.push_back(BuildMI(Opcode, 3).addReg(Node->leftChild()->getValue())
+                                   .addReg(Node->rightChild()->getValue())
+                                   .addRegDef(Node->getValue()));
+}
+
+
+
+
 //************************ Internal Functions ******************************/
 
 
@@ -716,25 +726,26 @@
 }
 
 
-// Return NULL if we cannot exploit constant to create a cheaper instruction
+// Return if we cannot exploit constant to create a cheaper instruction
 static inline void
 CreateDivConstInstruction(TargetMachine &target,
                           const InstructionNode* instrNode,
                           vector<MachineInstr*>& mvec)
 {
-  MachineInstr* minstr1 = NULL;
-  MachineInstr* minstr2 = NULL;
-  
+  Value* LHS  = instrNode->leftChild()->getValue();
   Value* constOp = ((InstrTreeNode*) instrNode->rightChild())->getValue();
-  if (! isa<Constant>(constOp))
+  if (!isa<Constant>(constOp))
     return;
+
+  Value* DestVal = instrNode->getValue();
+  unsigned ZeroReg = target.getRegInfo().getZeroRegNum();
   
   // Cases worth optimizing are:
   // (1) Divide by 1 for any type: replace with copy (ADD or FMOV)
   // (2) Divide by 2^x for integer types: replace with SR[L or A]{X}
   // 
   const Type* resultType = instrNode->getInstruction()->getType();
-  
+ 
   if (resultType->isInteger())
     {
       unsigned pow;
@@ -743,39 +754,25 @@
       if (isValidConst)
         {
           bool needNeg = false;
-          if (C < 0)
-            {
-              needNeg = true;
-              C = -C;
-            }
+          if (C < 0) {
+            needNeg = true;
+            C = -C;
+          }
           
-          if (C == 1)
-            {
-              minstr1 = new MachineInstr(ADD);
-              minstr1->SetMachineOperandVal(0,
-                                           MachineOperand::MO_VirtualRegister,
-                                           instrNode->leftChild()->getValue());
-              minstr1->SetMachineOperandReg(1,
-                                        target.getRegInfo().getZeroRegNum());
-            }
-          else if (isPowerOf2(C, pow))
-            {
-              MachineOpCode opCode= ((resultType->isSigned())
-                                     ? (resultType==Type::LongTy)? SRAX : SRA
-                                     : (resultType==Type::LongTy)? SRLX : SRL);
-              minstr1 = new MachineInstr(opCode);
-              minstr1->SetMachineOperandVal(0,
-                                           MachineOperand::MO_VirtualRegister,
-                                           instrNode->leftChild()->getValue());
-              minstr1->SetMachineOperandConst(1,
-                                          MachineOperand::MO_UnextendedImmed,
-                                          pow);
-            }
+          if (C == 1) {
+            mvec.push_back(BuildMI(ADD, 3).addReg(LHS).addMReg(ZeroReg)
+                                          .addRegDef(DestVal));
+          } else if (isPowerOf2(C, pow)) {
+            unsigned opCode= ((resultType->isSigned())
+                              ? (resultType==Type::LongTy) ? SRAX : SRA
+                              : (resultType==Type::LongTy) ? SRLX : SRL);
+            mvec.push_back(BuildMI(opCode, 3).addReg(LHS).addZImm(pow)
+                                             .addRegDef(DestVal));
+          }
           
-          if (minstr1 && needNeg)
+          if (needNeg && (C == 1 || isPowerOf2(C, pow)))
             { // insert <reg = SUB 0, reg> after the instr to flip the sign
-              minstr2 = CreateIntNegInstruction(target,
-                                                   instrNode->getValue());
+              mvec.push_back(CreateIntNegInstruction(target, DestVal));
             }
         }
     }
@@ -786,28 +783,14 @@
           double dval = FPC->getValue();
           if (fabs(dval) == 1)
             {
-              bool needNeg = (dval < 0);
+              unsigned opCode = 
+                (dval < 0) ? (resultType == Type::FloatTy? FNEGS : FNEGD)
+                           : (resultType == Type::FloatTy? FMOVS : FMOVD);
               
-              MachineOpCode opCode = needNeg
-                ? (resultType == Type::FloatTy? FNEGS : FNEGD)
-                : (resultType == Type::FloatTy? FMOVS : FMOVD);
-              
-              minstr1 = new MachineInstr(opCode);
-              minstr1->SetMachineOperandVal(0,
-                                           MachineOperand::MO_VirtualRegister,
-                                           instrNode->leftChild()->getValue());
+              mvec.push_back(BuildMI(opCode, 2).addReg(LHS).addRegDef(DestVal));
             } 
         }
     }
-  
-  if (minstr1 != NULL)
-    minstr1->SetMachineOperandVal(2, MachineOperand::MO_VirtualRegister,
-                                 instrNode->getValue());   
-  
-  if (minstr1)
-    mvec.push_back(minstr1);
-  if (minstr2)
-    mvec.push_back(minstr2);
 }
 
 
@@ -870,20 +853,15 @@
                      target.getFrameInfo().getDynamicAreaOffset(mcInfo,growUp));
   assert(! growUp && "Has SPARC v9 stack frame convention changed?");
 
+  unsigned SPReg = target.getRegInfo().getStackPointer();
+
   // Instruction 2: sub %sp, totalSizeVal -> %sp
-  M = new MachineInstr(SUB);
-  M->SetMachineOperandReg(0, target.getRegInfo().getStackPointer());
-  M->SetMachineOperandVal(1, MachineOperand::MO_VirtualRegister, totalSizeVal);
-  M->SetMachineOperandReg(2, target.getRegInfo().getStackPointer());
-  getMvec.push_back(M);
+  getMvec.push_back(BuildMI(SUB, 3).addMReg(SPReg).addReg(totalSizeVal)
+                                   .addMReg(SPReg,MOTy::Def));
 
   // Instruction 3: add %sp, frameSizeBelowDynamicArea -> result
-  M = new MachineInstr(ADD);
-  M->SetMachineOperandReg(0, target.getRegInfo().getStackPointer());
-  M->SetMachineOperandVal(1, MachineOperand::MO_VirtualRegister,
-			  dynamicAreaOffset);
-  M->SetMachineOperandVal(2, MachineOperand::MO_VirtualRegister, result);
-  getMvec.push_back(M);
+  getMvec.push_back(BuildMI(ADD, 3).addMReg(SPReg).addReg(dynamicAreaOffset)
+                                   .addRegDef(result));
 }        
 
 
@@ -923,12 +901,9 @@
   ConstantSInt* offsetVal = ConstantSInt::get(Type::IntTy, offsetFromFP);
   
   // Instruction 1: add %fp, offsetFromFP -> result
-  MachineInstr* M = new MachineInstr(ADD);
-  M->SetMachineOperandReg(0, target.getRegInfo().getFramePointer());
-  M->SetMachineOperandVal(1, MachineOperand::MO_VirtualRegister, offsetVal); 
-  M->SetMachineOperandVal(2, MachineOperand::MO_VirtualRegister, result);
-  
-  getMvec.push_back(M);
+  unsigned FPReg = target.getRegInfo().getFramePointer();
+  getMvec.push_back(BuildMI(ADD, 3).addMReg(FPReg).addReg(offsetVal)
+                                   .addRegDef(result));
 }
 
 
@@ -949,13 +924,12 @@
 //------------------------------------------------------------------------ 
 
 static void
-SetOperandsForMemInstr(vector<MachineInstr*>& mvec,
+SetOperandsForMemInstr(unsigned Opcode,
+                       vector<MachineInstr*>& mvec,
                        InstructionNode* vmInstrNode,
                        const TargetMachine& target)
 {
   Instruction* memInst = vmInstrNode->getInstruction();
-  vector<MachineInstr*>::iterator mvecI = mvec.end() - 1;
-
   // Index vector, ptr value, and flag if all indices are const.
   vector<Value*> idxVec;
   bool allConstantIndices;
@@ -1020,12 +994,8 @@
                                mulVec, MachineCodeForInstruction::get(memInst),
                                INVALID_MACHINE_OPCODE);
 
-          // Insert mulVec[] before *mvecI in mvec[] and update mvecI
-          // to point to the same instruction it pointed to before.
           assert(mulVec.size() > 0 && "No multiply code created?");
-          vector<MachineInstr*>::iterator oldMvecI = mvecI;
-          for (unsigned i=0, N=mulVec.size(); i < N; ++i)
-            mvecI = mvec.insert(mvecI, mulVec[i]) + 1;  // pts to mem instr
+          mvec.insert(mvec.end(), mulVec.begin(), mulVec.end());
 
           valueForRegOffset = addr;
         }
@@ -1042,33 +1012,23 @@
   //   Operand 0 is ptr, operand 1 is offset, operand 2 is result.
   // 
   unsigned offsetOpNum, ptrOpNum;
-  if (memInst->getOpcode() == Instruction::Store)
-    {
-      (*mvecI)->SetMachineOperandVal(0, MachineOperand::MO_VirtualRegister,
-                                     vmInstrNode->leftChild()->getValue());
-      ptrOpNum = 1;
-      offsetOpNum = 2;
-    }
-  else
-    {
-      ptrOpNum = 0;
-      offsetOpNum = 1;
-      (*mvecI)->SetMachineOperandVal(2, MachineOperand::MO_VirtualRegister,
-                                     memInst);
-    }
-  
-  (*mvecI)->SetMachineOperandVal(ptrOpNum, MachineOperand::MO_VirtualRegister,
-                                 ptrVal);
-  
-  if (offsetOpType == MachineOperand::MO_VirtualRegister)
-    {
-      assert(valueForRegOffset != NULL);
-      (*mvecI)->SetMachineOperandVal(offsetOpNum, offsetOpType,
-                                     valueForRegOffset); 
-    }
-  else
-    (*mvecI)->SetMachineOperandConst(offsetOpNum, offsetOpType,
-                                     smallConstOffset);
+  MachineInstr *MI;
+  if (memInst->getOpcode() == Instruction::Store) {
+    if (offsetOpType == MachineOperand::MO_VirtualRegister)
+      MI = BuildMI(Opcode, 3).addReg(vmInstrNode->leftChild()->getValue())
+                             .addReg(ptrVal).addReg(valueForRegOffset);
+    else
+      MI = BuildMI(Opcode, 3).addReg(vmInstrNode->leftChild()->getValue())
+                             .addReg(ptrVal).addSImm(smallConstOffset);
+  } else {
+    if (offsetOpType == MachineOperand::MO_VirtualRegister)
+      MI = BuildMI(Opcode, 3).addReg(ptrVal).addReg(valueForRegOffset)
+                             .addRegDef(memInst);
+    else
+      MI = BuildMI(Opcode, 3).addReg(ptrVal).addSImm(smallConstOffset)
+                             .addRegDef(memInst);
+  }
+  mvec.push_back(MI);
 }
 
 
@@ -1265,21 +1225,20 @@
         
       case 3:	// stmt:   Store(reg,reg)
       case 4:	// stmt:   Store(reg,ptrreg)
-        mvec.push_back(new MachineInstr(
-                         ChooseStoreInstruction(
-                            subtreeRoot->leftChild()->getValue()->getType())));
-        SetOperandsForMemInstr(mvec, subtreeRoot, target);
+        SetOperandsForMemInstr(ChooseStoreInstruction(
+                        subtreeRoot->leftChild()->getValue()->getType()),
+                               mvec, subtreeRoot, target);
         break;
 
       case 5:	// stmt:   BrUncond
-        M = new MachineInstr(BA);
-        M->SetMachineOperandVal(0, MachineOperand::MO_PCRelativeDisp,
-             cast<BranchInst>(subtreeRoot->getInstruction())->getSuccessor(0));
-        mvec.push_back(M);
+        {
+          BranchInst *BI = cast<BranchInst>(subtreeRoot->getInstruction());
+          mvec.push_back(BuildMI(BA, 1).addPCDisp(BI->getSuccessor(0)));
         
-        // delay slot
-        mvec.push_back(new MachineInstr(NOP));
-        break;
+          // delay slot
+          mvec.push_back(BuildMI(NOP, 0));
+          break;
+        }
 
       case 206:	// stmt:   BrCond(setCCconst)
       { // setCCconst => boolean was computed with `%b = setCC type reg1 const'
@@ -1308,25 +1267,19 @@
             
             BranchInst* brInst=cast<BranchInst>(subtreeRoot->getInstruction());
             
-            M = new MachineInstr(ChooseBprInstruction(subtreeRoot));
-            M->SetMachineOperandVal(0, MachineOperand::MO_VirtualRegister,
-                                    setCCNode->leftChild()->getValue());
-            M->SetMachineOperandVal(1, MachineOperand::MO_PCRelativeDisp,
-                                    brInst->getSuccessor(0));
+            M = BuildMI(ChooseBprInstruction(subtreeRoot), 2)
+                                .addReg(setCCNode->leftChild()->getValue())
+                                .addPCDisp(brInst->getSuccessor(0));
             mvec.push_back(M);
             
             // delay slot
-            mvec.push_back(new MachineInstr(NOP));
+            mvec.push_back(BuildMI(NOP, 0));
 
             // false branch
-            M = new MachineInstr(BA);
-            M->SetMachineOperandVal(0, MachineOperand::MO_PCRelativeDisp,
-                                    brInst->getSuccessor(1));
-            mvec.push_back(M);
+            mvec.push_back(BuildMI(BA, 1).addPCDisp(brInst->getSuccessor(1)));
             
             // delay slot
-            mvec.push_back(new MachineInstr(NOP));
-            
+            mvec.push_back(BuildMI(NOP, 0));
             break;
           }
         // ELSE FALL THROUGH
@@ -1340,28 +1293,22 @@
         // 
         BranchInst* brInst = cast<BranchInst>(subtreeRoot->getInstruction());
         bool isFPBranch;
-        M = new MachineInstr(ChooseBccInstruction(subtreeRoot, isFPBranch));
-
+        unsigned Opcode = ChooseBccInstruction(subtreeRoot, isFPBranch);
         Value* ccValue = GetTmpForCC(subtreeRoot->leftChild()->getValue(),
                                      brInst->getParent()->getParent(),
                                      isFPBranch? Type::FloatTy : Type::IntTy);
-        
-        M->SetMachineOperandVal(0, MachineOperand::MO_CCRegister, ccValue);
-        M->SetMachineOperandVal(1, MachineOperand::MO_PCRelativeDisp,
-                                   brInst->getSuccessor(0));
+        M = BuildMI(Opcode, 2).addCCReg(ccValue)
+                              .addPCDisp(brInst->getSuccessor(0));
         mvec.push_back(M);
 
         // delay slot
-        mvec.push_back(new MachineInstr(NOP));
+        mvec.push_back(BuildMI(NOP, 0));
 
         // false branch
-        M = new MachineInstr(BA);
-        M->SetMachineOperandVal(0, MachineOperand::MO_PCRelativeDisp,
-                                   brInst->getSuccessor(1));
-        mvec.push_back(M);
+        mvec.push_back(BuildMI(BA, 1).addPCDisp(brInst->getSuccessor(1)));
 
         // delay slot
-        mvec.push_back(new MachineInstr(NOP));
+        mvec.push_back(BuildMI(NOP, 0));
         break;
       }
         
@@ -1372,13 +1319,12 @@
           cast<Constant>(subtreeRoot->leftChild()->getValue());
         unsigned dest = cast<ConstantBool>(constVal)->getValue()? 0 : 1;
         
-        M = new MachineInstr(BA);
-        M->SetMachineOperandVal(0, MachineOperand::MO_PCRelativeDisp,
+        M = BuildMI(BA, 1).addPCDisp(
           cast<BranchInst>(subtreeRoot->getInstruction())->getSuccessor(dest));
         mvec.push_back(M);
         
         // delay slot
-        mvec.push_back(new MachineInstr(NOP));
+        mvec.push_back(BuildMI(NOP, 0));
         break;
       }
         
@@ -1386,24 +1332,19 @@
       { // boolreg   => boolean is stored in an existing register.
         // Just use the branch-on-integer-register instruction!
         // 
-        M = new MachineInstr(BRNZ);
-        M->SetMachineOperandVal(0, MachineOperand::MO_VirtualRegister,
-                                      subtreeRoot->leftChild()->getValue());
-        M->SetMachineOperandVal(1, MachineOperand::MO_PCRelativeDisp,
-              cast<BranchInst>(subtreeRoot->getInstruction())->getSuccessor(0));
+        BranchInst *BI = cast<BranchInst>(subtreeRoot->getInstruction());
+        M = BuildMI(BRNZ, 2).addReg(subtreeRoot->leftChild()->getValue())
+          .addPCDisp(BI->getSuccessor(0));
         mvec.push_back(M);
 
         // delay slot
-        mvec.push_back(new MachineInstr(NOP));
+        mvec.push_back(BuildMI(NOP, 0));
 
         // false branch
-        M = new MachineInstr(BA);
-        M->SetMachineOperandVal(0, MachineOperand::MO_PCRelativeDisp,
-              cast<BranchInst>(subtreeRoot->getInstruction())->getSuccessor(1));
-        mvec.push_back(M);
+        mvec.push_back(BuildMI(BA, 1).addPCDisp(BI->getSuccessor(1)));
         
         // delay slot
-        mvec.push_back(new MachineInstr(NOP));
+        mvec.push_back(BuildMI(NOP, 0));
         break;
       }  
       
@@ -1589,11 +1530,7 @@
                 else
                   srcForCast = leftVal;
 
-                M = new MachineInstr(opCode);
-                M->SetMachineOperandVal(0, MachineOperand::MO_VirtualRegister,
-                                           srcForCast);
-                M->SetMachineOperandVal(1, MachineOperand::MO_VirtualRegister,
-                                           dest);
+                M = BuildMI(opCode, 2).addReg(srcForCast).addRegDef(dest);
                 mvec.push_back(M);
               }
           }
@@ -1616,8 +1553,7 @@
         
       case 33:	// reg:   Add(reg, reg)
         maskUnsignedResult = true;
-        mvec.push_back(new MachineInstr(ChooseAddInstruction(subtreeRoot)));
-        Set3OperandsFromInstr(mvec.back(), subtreeRoot, target);
+        Add3OperandInstr(ChooseAddInstruction(subtreeRoot), subtreeRoot, mvec);
         break;
 
       case 234:	// reg:   Sub(reg, Constant)
@@ -1632,9 +1568,9 @@
         
       case 34:	// reg:   Sub(reg, reg)
         maskUnsignedResult = true;
-        mvec.push_back(new MachineInstr(ChooseSubInstructionByType(
-                                   subtreeRoot->getInstruction()->getType())));
-        Set3OperandsFromInstr(mvec.back(), subtreeRoot, target);
+        Add3OperandInstr(ChooseSubInstructionByType(
+                                   subtreeRoot->getInstruction()->getType()),
+                         subtreeRoot, mvec);
         break;
 
       case 135:	// reg:   Mul(todouble, todouble)
@@ -1684,9 +1620,8 @@
       
       case 36:	// reg:   Div(reg, reg)
         maskUnsignedResult = true;
-        mvec.push_back(new MachineInstr(ChooseDivInstruction(target,
-							     subtreeRoot)));
-        Set3OperandsFromInstr(mvec.back(), subtreeRoot, target);
+        Add3OperandInstr(ChooseDivInstruction(target, subtreeRoot),
+                         subtreeRoot, mvec);
         break;
 
       case  37:	// reg:   Rem(reg, reg)
@@ -1703,9 +1638,10 @@
                                         subtreeRoot->rightChild()->getValue());
         MachineCodeForInstruction::get(remInstr).addTemp(quot).addTemp(prod); 
         
-        M = new MachineInstr(ChooseDivInstruction(target, subtreeRoot));
-        Set3OperandsFromInstr(M, subtreeRoot, target);
-        M->SetMachineOperandVal(2, MachineOperand::MO_VirtualRegister,quot);
+        M = BuildMI(ChooseDivInstruction(target, subtreeRoot), 3)
+                             .addReg(subtreeRoot->leftChild()->getValue())
+                             .addReg(subtreeRoot->rightChild()->getValue())
+                             .addRegDef(quot);
         mvec.push_back(M);
         
         unsigned MulOpcode =
@@ -1715,12 +1651,11 @@
                                                                      MOTy::Def);
         mvec.push_back(M);
         
-        M = new MachineInstr(ChooseSubInstructionByType(
-                                   subtreeRoot->getInstruction()->getType()));
-        Set3OperandsFromInstr(M, subtreeRoot, target);
-        M->SetMachineOperandVal(1, MachineOperand::MO_VirtualRegister,prod);
+        unsigned Opcode = ChooseSubInstructionByType(
+                                   subtreeRoot->getInstruction()->getType());
+        M = BuildMI(Opcode, 3).addReg(subtreeRoot->leftChild()->getValue())
+                              .addReg(prod).addRegDef(subtreeRoot->getValue());
         mvec.push_back(M);
-        
         break;
       }
       
@@ -1728,8 +1663,7 @@
       case 238:	// bool:   And(bool, boolconst)
       case 338:	// reg :   BAnd(reg, reg)
       case 538:	// reg :   BAnd(reg, Constant)
-        mvec.push_back(new MachineInstr(AND));
-        Set3OperandsFromInstr(mvec.back(), subtreeRoot, target);
+        Add3OperandInstr(AND, subtreeRoot, mvec);
         break;
 
       case 138:	// bool:   And(bool, not)
@@ -1751,8 +1685,7 @@
       case 239:	// bool:   Or(bool, boolconst)
       case 339:	// reg :   BOr(reg, reg)
       case 539:	// reg :   BOr(reg, Constant)
-        mvec.push_back(new MachineInstr(OR));
-        Set3OperandsFromInstr(mvec.back(), subtreeRoot, target);
+        Add3OperandInstr(OR, subtreeRoot, mvec);
         break;
 
       case 139:	// bool:   Or(bool, not)
@@ -1774,8 +1707,7 @@
       case 240:	// bool:   Xor(bool, boolconst)
       case 340:	// reg :   BXor(reg, reg)
       case 540:	// reg :   BXor(reg, Constant)
-        mvec.push_back(new MachineInstr(XOR));
-        Set3OperandsFromInstr(mvec.back(), subtreeRoot, target);
+        Add3OperandInstr(XOR, subtreeRoot, mvec);
         break;
 
       case 140:	// bool:   Xor(bool, not)
@@ -1854,10 +1786,17 @@
             // a separate instruction to compute the bool result, so discard
             // result of SUBcc instruction anyway.
             // 
-            M = new MachineInstr(SUBcc);
-            Set3OperandsFromInstr(M, subtreeRoot, target, ! keepSubVal);
-            M->SetMachineOperandVal(3, MachineOperand::MO_CCRegister,
-                                    tmpForCC, /*def*/true);
+            if (keepSubVal) {
+              M = BuildMI(SUBcc, 4).addReg(subtreeRoot->leftChild()->getValue())
+                                  .addReg(subtreeRoot->rightChild()->getValue())
+                                  .addRegDef(subtreeRoot->getValue())
+                                  .addCCReg(tmpForCC, MOTy::Def);
+            } else {
+              M = BuildMI(SUBcc, 4).addReg(subtreeRoot->leftChild()->getValue())
+                                  .addReg(subtreeRoot->rightChild()->getValue())
+                        .addMReg(target.getRegInfo().getZeroRegNum(), MOTy::Def)
+                                  .addCCReg(tmpForCC, MOTy::Def);
+            }
             mvec.push_back(M);
             
             if (computeBoolVal)
@@ -1869,13 +1808,10 @@
         else
           {
             // FP condition: dest of FCMP should be some FCCn register
-            M = new MachineInstr(ChooseFcmpInstruction(subtreeRoot));
-            M->SetMachineOperandVal(0, MachineOperand::MO_CCRegister,
-                                          tmpForCC);
-            M->SetMachineOperandVal(1,MachineOperand::MO_VirtualRegister,
-                                         subtreeRoot->leftChild()->getValue());
-            M->SetMachineOperandVal(2,MachineOperand::MO_VirtualRegister,
-                                        subtreeRoot->rightChild()->getValue());
+            M = BuildMI(ChooseFcmpInstruction(subtreeRoot), 3)
+                         .addCCReg(tmpForCC, MOTy::Def)
+                         .addReg(subtreeRoot->leftChild()->getValue())
+                         .addRegDef(subtreeRoot->rightChild()->getValue());
             mvec.push_back(M);
             
             if (computeBoolVal)
@@ -1890,25 +1826,15 @@
           {
             if (mustClearReg)
               {// Unconditionally set register to 0
-                M = new MachineInstr(SETHI);
-                M->SetMachineOperandConst(0,MachineOperand::MO_UnextendedImmed,
-                                          (int64_t)0);
-                M->SetMachineOperandVal(1, MachineOperand::MO_VirtualRegister,
-                                        setCCInstr);
+                M = BuildMI(SETHI, 2).addZImm(0).addRegDef(setCCInstr);
                 mvec.push_back(M);
               }
             
             // Now conditionally move `valueToMove' (0 or 1) into the register
             // Mark the register as a use (as well as a def) because the old
             // value should be retained if the condition is false.
-            M = new MachineInstr(movOpCode);
-            M->SetMachineOperandVal(0, MachineOperand::MO_CCRegister,
-                                    tmpForCC);
-            M->SetMachineOperandConst(1, MachineOperand::MO_UnextendedImmed,
-                                      valueToMove);
-            M->SetMachineOperandVal(2, MachineOperand::MO_VirtualRegister,
-                                    setCCInstr, /*isDef*/ true,
-                                    /*isDefAndUse*/ true);
+            M = BuildMI(movOpCode, 3).addCCReg(tmpForCC).addZImm(valueToMove)
+                                     .addReg(setCCInstr, MOTy::UseAndDef);
             mvec.push_back(M);
           }
         break;
@@ -1916,17 +1842,16 @@
 
       case 51:	// reg:   Load(reg)
       case 52:	// reg:   Load(ptrreg)
-        mvec.push_back(new MachineInstr(ChooseLoadInstruction(
-                                     subtreeRoot->getValue()->getType())));
-        SetOperandsForMemInstr(mvec, subtreeRoot, target);
+        SetOperandsForMemInstr(ChooseLoadInstruction(
+                                   subtreeRoot->getValue()->getType()),
+                               mvec, subtreeRoot, target);
         break;
 
       case 55:	// reg:   GetElemPtr(reg)
       case 56:	// reg:   GetElemPtrIdx(reg,reg)
         // If the GetElemPtr was folded into the user (parent), it will be
         // caught above.  For other cases, we have to compute the address.
-        mvec.push_back(new MachineInstr(ADD));
-        SetOperandsForMemInstr(mvec, subtreeRoot, target);
+        SetOperandsForMemInstr(ADD, mvec, subtreeRoot, target);
         break;
 
       case 57:	// reg:  Alloca: Implement as 1 instruction:
@@ -2069,7 +1994,7 @@
           mvec.back()->addImplicitRef(retAddrReg, /*isDef*/ true);
         
         // delay slot
-        mvec.push_back(new MachineInstr(NOP));
+        mvec.push_back(BuildMI(NOP, 0));
         break;
       }
       
@@ -2094,10 +2019,10 @@
       { const Type* opType = subtreeRoot->leftChild()->getValue()->getType();
         assert((opType->isInteger() || isa<PointerType>(opType)) &&
                "Shr unsupported for other types");
-        mvec.push_back(new MachineInstr((opType->isSigned()
-                                   ? ((opType == Type::LongTy)? SRAX : SRA)
-                                   : ((opType == Type::LongTy)? SRLX : SRL))));
-        Set3OperandsFromInstr(mvec.back(), subtreeRoot, target);
+        Add3OperandInstr(opType->isSigned()
+                               ? (opType == Type::LongTy ? SRAX : SRA)
+                               : (opType == Type::LongTy ? SRLX : SRL),
+                         subtreeRoot, mvec);
         break;
       }
       




From lattner at cs.uiuc.edu  Wed Jan 15 13:48:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed Jan 15 13:48:01 2003
Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h
Message-ID: <200301151947.NAA25629@apoc.cs.uiuc.edu>


Changes in directory llvm/include/llvm/CodeGen:

MachineInstr.h updated: 1.97 -> 1.98

---
Log message:

Remove obsolete ctor


---
Diffs of the changes:

Index: llvm/include/llvm/CodeGen/MachineInstr.h
diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.97 llvm/include/llvm/CodeGen/MachineInstr.h:1.98
--- llvm/include/llvm/CodeGen/MachineInstr.h:1.97	Wed Jan 15 13:22:06 2003
+++ llvm/include/llvm/CodeGen/MachineInstr.h	Wed Jan 15 13:46:51 2003
@@ -349,7 +349,6 @@
   bool OperandsComplete() const;
 
 public:
-  MachineInstr(MachineOpCode Opcode);
   MachineInstr(MachineOpCode Opcode, unsigned numOperands);
 
   /// MachineInstr ctor - This constructor only does a _reserve_ of the




From lattner at cs.uiuc.edu  Wed Jan 15 13:48:04 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed Jan 15 13:48:04 2003
Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/InstrSelectionSupport.h
Message-ID: <200301151947.NAA25642@apoc.cs.uiuc.edu>


Changes in directory llvm/include/llvm/CodeGen:

InstrSelectionSupport.h updated: 1.20 -> 1.21

---
Log message:

Remove internal helper fn


---
Diffs of the changes:

Index: llvm/include/llvm/CodeGen/InstrSelectionSupport.h
diff -u llvm/include/llvm/CodeGen/InstrSelectionSupport.h:1.20 llvm/include/llvm/CodeGen/InstrSelectionSupport.h:1.21
--- llvm/include/llvm/CodeGen/InstrSelectionSupport.h:1.20	Wed Jan 15 13:21:50 2003
+++ llvm/include/llvm/CodeGen/InstrSelectionSupport.h	Wed Jan 15 13:46:39 2003
@@ -81,24 +81,4 @@
                                          unsigned& getMachineRegNum,
                                          int64_t& getImmedValue);
 
-
-//---------------------------------------------------------------------------
-// Function: FixConstantOperandsForInstr
-// 
-// Purpose:
-// Special handling for constant operands of a machine instruction
-// -- if the constant is 0, use the hardwired 0 register, if any;
-// -- if the constant fits in the IMMEDIATE field, use that field;
-// -- else create instructions to put the constant into a register, either
-//    directly or by loading explicitly from the constant pool.
-// 
-// In the first 2 cases, the operand of `minstr' is modified in place.
-// Returns a vector of machine instructions generated for operands that
-// fall under case 3; these must be inserted before `minstr'.
-//---------------------------------------------------------------------------
-
-std::vector<MachineInstr*> FixConstantOperandsForInstr (Instruction* vmInstr,
-                                                        MachineInstr* minstr,
-                                                        TargetMachine& target);
-
 #endif




From lattner at cs.uiuc.edu  Wed Jan 15 13:48:07 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed Jan 15 13:48:07 2003
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/MachineInstrAnnot.cpp
Message-ID: <200301151947.NAA25649@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/CodeGen:

MachineInstrAnnot.cpp updated: 1.6 -> 1.7

---
Log message:

Prune #includes


---
Diffs of the changes:

Index: llvm/lib/CodeGen/MachineInstrAnnot.cpp
diff -u llvm/lib/CodeGen/MachineInstrAnnot.cpp:1.6 llvm/lib/CodeGen/MachineInstrAnnot.cpp:1.7
--- llvm/lib/CodeGen/MachineInstrAnnot.cpp:1.6	Thu Oct 31 09:34:48 2002
+++ llvm/lib/CodeGen/MachineInstrAnnot.cpp	Wed Jan 15 13:47:12 2003
@@ -7,7 +7,6 @@
 
 #include "llvm/CodeGen/MachineInstrAnnot.h"
 #include "llvm/CodeGen/InstrSelection.h"
-#include "llvm/CodeGen/InstrSelectionSupport.h"
 #include "llvm/CodeGen/MachineCodeForInstruction.h"
 #include "llvm/iOther.h"
 #include "llvm/Type.h"




From lattner at cs.uiuc.edu  Wed Jan 15 13:48:09 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed Jan 15 13:48:09 2003
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/MachineInstr.cpp
Message-ID: <200301151947.NAA25659@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/CodeGen:

MachineInstr.cpp updated: 1.69 -> 1.70

---
Log message:

Remove obsolete ctor


---
Diffs of the changes:

Index: llvm/lib/CodeGen/MachineInstr.cpp
diff -u llvm/lib/CodeGen/MachineInstr.cpp:1.69 llvm/lib/CodeGen/MachineInstr.cpp:1.70
--- llvm/lib/CodeGen/MachineInstr.cpp:1.69	Tue Jan 14 15:58:41 2003
+++ llvm/lib/CodeGen/MachineInstr.cpp	Wed Jan 15 13:47:02 2003
@@ -20,15 +20,6 @@
 //
 extern const TargetInstrDescriptor *TargetInstrDescriptors;
 
-// Constructor for instructions with fixed #operands (nearly all)
-MachineInstr::MachineInstr(MachineOpCode _opCode)
-  : opCode(_opCode),
-    operands(TargetInstrDescriptors[_opCode].numOperands, MachineOperand()),
-    numImplicitRefs(0)
-{
-  assert(TargetInstrDescriptors[_opCode].numOperands >= 0);
-}
-
 // Constructor for instructions with variable #operands
 MachineInstr::MachineInstr(MachineOpCode OpCode, unsigned  numOperands)
   : opCode(OpCode),




From lattner at cs.uiuc.edu  Wed Jan 15 13:48:12 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed Jan 15 13:48:12 2003
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/InstrSelection/InstrSelection.cpp
Message-ID: <200301151947.NAA25666@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/CodeGen/InstrSelection:

InstrSelection.cpp updated: 1.55 -> 1.56

---
Log message:

Minor changes


---
Diffs of the changes:

Index: llvm/lib/CodeGen/InstrSelection/InstrSelection.cpp
diff -u llvm/lib/CodeGen/InstrSelection/InstrSelection.cpp:1.55 llvm/lib/CodeGen/InstrSelection/InstrSelection.cpp:1.56
--- llvm/lib/CodeGen/InstrSelection/InstrSelection.cpp:1.55	Sat Dec 28 21:12:57 2002
+++ llvm/lib/CodeGen/InstrSelection/InstrSelection.cpp	Wed Jan 15 13:47:36 2003
@@ -19,9 +19,12 @@
 #include "llvm/Pass.h"
 #include "Support/CommandLine.h"
 #include "Support/LeakDetector.h"
-using std::cerr;
 using std::vector;
 
+std::vector<MachineInstr*>
+FixConstantOperandsForInstr(Instruction* vmInstr, MachineInstr* minstr,
+                            TargetMachine& target);
+
 namespace {
   //===--------------------------------------------------------------------===//
   // SelectDebugLevel - Allow command line control over debugging.
@@ -108,10 +111,10 @@
   
   if (SelectDebugLevel >= Select_DebugInstTrees)
     {
-      cerr << "\n\n*** Input to instruction selection for function "
-	   << F.getName() << "\n\n" << F
-           << "\n\n*** Instruction trees for function "
-	   << F.getName() << "\n\n";
+      std::cerr << "\n\n*** Input to instruction selection for function "
+	        << F.getName() << "\n\n" << F
+                << "\n\n*** Instruction trees for function "
+                << F.getName() << "\n\n";
       instrForest.dump();
     }
   
@@ -130,7 +133,7 @@
       if (SelectDebugLevel >= Select_DebugBurgTrees)
 	{
 	  printcover(basicNode, 1, 0);
-	  cerr << "\nCover cost == " << treecost(basicNode, 1, 0) << "\n\n";
+	  std::cerr << "\nCover cost == " << treecost(basicNode, 1, 0) <<"\n\n";
 	  printMatches(basicNode);
 	}
       
@@ -159,7 +162,7 @@
   
   if (SelectDebugLevel >= Select_PrintMachineCode)
     {
-      cerr << "\n*** Machine instructions after INSTRUCTION SELECTION\n";
+      std::cerr << "\n*** Machine instructions after INSTRUCTION SELECTION\n";
       MachineFunction::get(&F).dump();
     }
   
@@ -276,7 +279,7 @@
   int ruleForNode = burm_rule(treeRoot->state, goalnt);
   
   if (ruleForNode == 0) {
-    cerr << "Could not match instruction tree for instr selection\n";
+    std::cerr << "Could not match instruction tree for instr selection\n";
     abort();
   }
   
@@ -375,4 +378,3 @@
 Pass *createInstructionSelectionPass(TargetMachine &T) {
   return new InstructionSelection(T);
 }
-




From lattner at cs.uiuc.edu  Wed Jan 15 13:49:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed Jan 15 13:49:01 2003
Subject: [llvm-commits] CVS: llvm/lib/Target/Sparc/SparcRegInfo.cpp
Message-ID: <200301151948.NAA25694@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Target/Sparc:

SparcRegInfo.cpp updated: 1.85 -> 1.86

---
Log message:

Prune #includes


---
Diffs of the changes:

Index: llvm/lib/Target/Sparc/SparcRegInfo.cpp
diff -u llvm/lib/Target/Sparc/SparcRegInfo.cpp:1.85 llvm/lib/Target/Sparc/SparcRegInfo.cpp:1.86
--- llvm/lib/Target/Sparc/SparcRegInfo.cpp:1.85	Wed Jan 15 11:47:49 2003
+++ llvm/lib/Target/Sparc/SparcRegInfo.cpp	Wed Jan 15 13:48:13 2003
@@ -11,7 +11,6 @@
 #include "llvm/CodeGen/MachineFunctionInfo.h"
 #include "llvm/CodeGen/PhyRegAlloc.h"
 #include "llvm/CodeGen/InstrSelection.h"
-#include "llvm/CodeGen/InstrSelectionSupport.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
 #include "llvm/CodeGen/MachineInstrAnnot.h"
 #include "llvm/CodeGen/RegAllocCommon.h"




From lattner at cs.uiuc.edu  Wed Jan 15 13:49:04 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed Jan 15 13:49:04 2003
Subject: [llvm-commits] CVS: llvm/lib/Target/Sparc/PrologEpilogCodeInserter.cpp
Message-ID: <200301151948.NAA25700@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Target/Sparc:

PrologEpilogCodeInserter.cpp updated: 1.22 -> 1.23

---
Log message:

Prune #includes


---
Diffs of the changes:

Index: llvm/lib/Target/Sparc/PrologEpilogCodeInserter.cpp
diff -u llvm/lib/Target/Sparc/PrologEpilogCodeInserter.cpp:1.22 llvm/lib/Target/Sparc/PrologEpilogCodeInserter.cpp:1.23
--- llvm/lib/Target/Sparc/PrologEpilogCodeInserter.cpp:1.22	Tue Jan 14 18:03:28 2003
+++ llvm/lib/Target/Sparc/PrologEpilogCodeInserter.cpp	Wed Jan 15 13:48:02 2003
@@ -15,7 +15,6 @@
 #include "llvm/CodeGen/MachineFunctionInfo.h"
 #include "llvm/CodeGen/MachineCodeForInstruction.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
-#include "llvm/CodeGen/InstrSelectionSupport.h"
 #include "llvm/Pass.h"
 #include "llvm/Function.h"
 




From lattner at cs.uiuc.edu  Wed Jan 15 13:49:06 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed Jan 15 13:49:06 2003
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp
Message-ID: <200301151948.NAA25681@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/CodeGen/InstrSelection:

InstrSelectionSupport.cpp updated: 1.43 -> 1.44

---
Log message:

Minor changes


---
Diffs of the changes:

Index: llvm/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp
diff -u llvm/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp:1.43 llvm/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp:1.44
--- llvm/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp:1.43	Wed Jan 15 13:22:38 2003
+++ llvm/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp	Wed Jan 15 13:47:53 2003
@@ -298,8 +298,8 @@
 
   // If there are no indices, return the current pointer.
   // Else extract the pointer from the GEP and fold the indices.
-  return (gepNode)? GetGEPInstArgs(gepNode, idxVec, allConstantIndices)
-                  : ptrVal;
+  return gepNode ? GetGEPInstArgs(gepNode, idxVec, allConstantIndices)
+                 : ptrVal;
 }
 
 MachineOperand::MachineOperandType
@@ -380,6 +380,7 @@
 }
 
 
+
 //---------------------------------------------------------------------------
 // Function: FixConstantOperandsForInstr
 // 
@@ -400,7 +401,7 @@
                             MachineInstr* minstr,
                             TargetMachine& target)
 {
-  vector<MachineInstr*> loadConstVec;
+  vector<MachineInstr*> MVec;
   
   MachineOpCode opCode = minstr->getOpCode();
   const TargetInstrInfo& instrInfo = target.getInstrInfo();
@@ -432,22 +433,18 @@
       if (mop.getType() == MachineOperand::MO_VirtualRegister)
         {
           assert(mop.getVRegValue() != NULL);
-          opValue = mop.getVRegValue();
-          if (Constant *opConst = dyn_cast<Constant>(opValue))
-            {
-              opType = ChooseRegOrImmed(opConst, opCode, target,
-                             (immedPos == (int)op), machineRegNum, immedValue);
-              if (opType == MachineOperand::MO_VirtualRegister)
-                constantThatMustBeLoaded = true;
-            }
+          if (Constant *opConst = dyn_cast<Constant>(mop.getVRegValue())) {
+            opType = ChooseRegOrImmed(opConst, opCode, target,
+                                      (immedPos == (int)op), machineRegNum,
+                                      immedValue);
+            if (opType == MachineOperand::MO_VirtualRegister)
+              constantThatMustBeLoaded = true;
+          }
         }
       else
         {
-          assert(mop.getType() == MachineOperand::MO_SignExtendedImmed ||
-                 mop.getType() == MachineOperand::MO_UnextendedImmed);
-
-          bool isSigned = (mop.getType() ==
-                           MachineOperand::MO_SignExtendedImmed);
+          assert(mop.isImmediate());
+          bool isSigned = mop.getType() == MachineOperand::MO_SignExtendedImmed;
 
           // Bit-selection flags indicate an instruction that is extracting
           // bits from its operand so ignore this even if it is a big constant.
@@ -481,7 +478,7 @@
         { // opValue is a constant that must be explicitly loaded into a reg
           assert(opValue);
           TmpInstruction* tmpReg = InsertCodeToLoadConstant(F, opValue, vmInstr,
-                                                        loadConstVec, target);
+                                                            MVec, target);
           minstr->SetMachineOperandVal(op, MachineOperand::MO_VirtualRegister,
                                        tmpReg);
         }
@@ -509,7 +506,7 @@
       {
         Value* oldVal = minstr->getImplicitRef(i);
         TmpInstruction* tmpReg =
-          InsertCodeToLoadConstant(F, oldVal, vmInstr, loadConstVec, target);
+          InsertCodeToLoadConstant(F, oldVal, vmInstr, MVec, target);
         minstr->setImplicitRef(i, tmpReg);
         
         if (isCall)
@@ -524,7 +521,5 @@
           }
       }
   
-  return loadConstVec;
+  return MVec;
 }
-
-




From lattner at cs.uiuc.edu  Wed Jan 15 13:51:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed Jan 15 13:51:01 2003
Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/RegAllocCommon.h
Message-ID: <200301151950.NAA25981@apoc.cs.uiuc.edu>


Changes in directory llvm/include/llvm/CodeGen:

RegAllocCommon.h (r1.9) removed

---
Log message:

Move private header to private dir


---
Diffs of the changes:



From lattner at cs.uiuc.edu  Wed Jan 15 13:51:04 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed Jan 15 13:51:04 2003
Subject: [llvm-commits] CVS: llvm/lib/Target/Sparc/SparcRegClassInfo.cpp SparcRegInfo.cpp
Message-ID: <200301151950.NAA25993@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Target/Sparc:

SparcRegClassInfo.cpp updated: 1.17 -> 1.18
SparcRegInfo.cpp updated: 1.86 -> 1.87

---
Log message:

Move private header to private directory


---
Diffs of the changes:

Index: llvm/lib/Target/Sparc/SparcRegClassInfo.cpp
diff -u llvm/lib/Target/Sparc/SparcRegClassInfo.cpp:1.17 llvm/lib/Target/Sparc/SparcRegClassInfo.cpp:1.18
--- llvm/lib/Target/Sparc/SparcRegClassInfo.cpp:1.17	Tue Oct 29 14:47:46 2002
+++ llvm/lib/Target/Sparc/SparcRegClassInfo.cpp	Wed Jan 15 13:50:44 2003
@@ -5,8 +5,8 @@
 //===----------------------------------------------------------------------===//
 
 #include "SparcRegClassInfo.h"
-#include "llvm/CodeGen/RegAllocCommon.h"
 #include "llvm/Type.h"
+#include "../../CodeGen/RegAlloc/RegAllocCommon.h"   // FIXME!
 using std::cerr;
 using std::vector;
 


Index: llvm/lib/Target/Sparc/SparcRegInfo.cpp
diff -u llvm/lib/Target/Sparc/SparcRegInfo.cpp:1.86 llvm/lib/Target/Sparc/SparcRegInfo.cpp:1.87
--- llvm/lib/Target/Sparc/SparcRegInfo.cpp:1.86	Wed Jan 15 13:48:13 2003
+++ llvm/lib/Target/Sparc/SparcRegInfo.cpp	Wed Jan 15 13:50:44 2003
@@ -13,8 +13,8 @@
 #include "llvm/CodeGen/InstrSelection.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
 #include "llvm/CodeGen/MachineInstrAnnot.h"
-#include "llvm/CodeGen/RegAllocCommon.h"
 #include "llvm/CodeGen/FunctionLiveVarInfo.h"   // FIXME: Remove
+#include "../../CodeGen/RegAlloc/RegAllocCommon.h"   // FIXME!
 #include "llvm/iTerminators.h"
 #include "llvm/iOther.h"
 #include "llvm/Function.h"




From lattner at cs.uiuc.edu  Wed Jan 15 13:57:00 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed Jan 15 13:57:00 2003
Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/PhyRegAlloc.h
Message-ID: <200301151956.NAA27449@apoc.cs.uiuc.edu>


Changes in directory llvm/include/llvm/CodeGen:

PhyRegAlloc.h updated: 1.40 -> 1.41

---
Log message:

Remvoe dependency on RegClass.h


---
Diffs of the changes:

Index: llvm/include/llvm/CodeGen/PhyRegAlloc.h
diff -u llvm/include/llvm/CodeGen/PhyRegAlloc.h:1.40 llvm/include/llvm/CodeGen/PhyRegAlloc.h:1.41
--- llvm/include/llvm/CodeGen/PhyRegAlloc.h:1.40	Sat Dec 28 21:12:52 2002
+++ llvm/include/llvm/CodeGen/PhyRegAlloc.h	Wed Jan 15 13:56:21 2003
@@ -19,8 +19,8 @@
 #ifndef PHY_REG_ALLOC_H
 #define PHY_REG_ALLOC_H
 
-#include "llvm/CodeGen/RegClass.h"
 #include "llvm/CodeGen/LiveRangeInfo.h"
+#include "Support/NonCopyable.h"
 #include <map>
 
 class MachineFunction;
@@ -28,6 +28,7 @@
 class FunctionLiveVarInfo;
 class MachineInstr;
 class LoopInfo;
+class RegClass;
 
 //----------------------------------------------------------------------------
 // Class AddedInstrns:
@@ -49,7 +50,7 @@
 // registers for a Function.
 //----------------------------------------------------------------------------
 
-class PhyRegAlloc: public NonCopyable {
+class PhyRegAlloc : public NonCopyable {
   std::vector<RegClass *> RegClassList; // vector of register classes
   const TargetMachine &TM;              // target machine
   const Function *Fn;                   // name of the function we work on
@@ -66,7 +67,7 @@
 
   AddedInstrns AddedInstrAtEntry;       // to store instrns added at entry
   LoopInfo *LoopDepthCalc;              // to calculate loop depths 
-  ReservedColorListType ResColList;     // A set of reserved regs if desired.
+  std::vector<unsigned> ResColList;     // A set of reserved regs if desired.
                                         // currently not used
 
 public:




From lattner at cs.uiuc.edu  Wed Jan 15 13:58:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed Jan 15 13:58:01 2003
Subject: [llvm-commits] CVS: llvm/lib/Target/Sparc/SparcRegInfo.cpp
Message-ID: <200301151957.NAA27478@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Target/Sparc:

SparcRegInfo.cpp updated: 1.87 -> 1.88

---
Log message:

#include RegClass.h explicitly


---
Diffs of the changes:

Index: llvm/lib/Target/Sparc/SparcRegInfo.cpp
diff -u llvm/lib/Target/Sparc/SparcRegInfo.cpp:1.87 llvm/lib/Target/Sparc/SparcRegInfo.cpp:1.88
--- llvm/lib/Target/Sparc/SparcRegInfo.cpp:1.87	Wed Jan 15 13:50:44 2003
+++ llvm/lib/Target/Sparc/SparcRegInfo.cpp	Wed Jan 15 13:57:07 2003
@@ -14,6 +14,7 @@
 #include "llvm/CodeGen/MachineInstrBuilder.h"
 #include "llvm/CodeGen/MachineInstrAnnot.h"
 #include "llvm/CodeGen/FunctionLiveVarInfo.h"   // FIXME: Remove
+#include "llvm/CodeGen/RegClass.h"
 #include "../../CodeGen/RegAlloc/RegAllocCommon.h"   // FIXME!
 #include "llvm/iTerminators.h"
 #include "llvm/iOther.h"




From lattner at cs.uiuc.edu  Wed Jan 15 13:58:04 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed Jan 15 13:58:04 2003
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/RegAlloc/InterferenceGraph.cpp LiveRangeInfo.cpp PhyRegAlloc.cpp RegClass.cpp
Message-ID: <200301151957.NAA27469@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/CodeGen/RegAlloc:

InterferenceGraph.cpp updated: 1.12 -> 1.13
LiveRangeInfo.cpp updated: 1.37 -> 1.38
PhyRegAlloc.cpp updated: 1.92 -> 1.93
RegClass.cpp updated: 1.20 -> 1.21

---
Log message:

#include RegClass.h explicitly


---
Diffs of the changes:

Index: llvm/lib/CodeGen/RegAlloc/InterferenceGraph.cpp
diff -u llvm/lib/CodeGen/RegAlloc/InterferenceGraph.cpp:1.12 llvm/lib/CodeGen/RegAlloc/InterferenceGraph.cpp:1.13
--- llvm/lib/CodeGen/RegAlloc/InterferenceGraph.cpp:1.12	Tue Oct 29 10:51:05 2002
+++ llvm/lib/CodeGen/RegAlloc/InterferenceGraph.cpp	Wed Jan 15 13:56:50 2003
@@ -4,9 +4,9 @@
 // 
 //===----------------------------------------------------------------------===//
 
+#include "RegAllocCommon.h"
 #include "llvm/CodeGen/InterferenceGraph.h"
 #include "llvm/CodeGen/IGNode.h"
-#include "llvm/CodeGen/RegAllocCommon.h"
 #include "Support/STLExtras.h"
 #include <algorithm>
 using std::cerr;


Index: llvm/lib/CodeGen/RegAlloc/LiveRangeInfo.cpp
diff -u llvm/lib/CodeGen/RegAlloc/LiveRangeInfo.cpp:1.37 llvm/lib/CodeGen/RegAlloc/LiveRangeInfo.cpp:1.38
--- llvm/lib/CodeGen/RegAlloc/LiveRangeInfo.cpp:1.37	Tue Jan 14 15:58:49 2003
+++ llvm/lib/CodeGen/RegAlloc/LiveRangeInfo.cpp	Wed Jan 15 13:56:50 2003
@@ -5,7 +5,7 @@
 //===----------------------------------------------------------------------===//
 
 #include "llvm/CodeGen/LiveRangeInfo.h"
-#include "llvm/CodeGen/RegAllocCommon.h"
+#include "RegAllocCommon.h"
 #include "llvm/CodeGen/RegClass.h"
 #include "llvm/CodeGen/IGNode.h"
 #include "llvm/CodeGen/MachineInstr.h"


Index: llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp
diff -u llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp:1.92 llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp:1.93
--- llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp:1.92	Wed Jan 15 12:08:07 2003
+++ llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp	Wed Jan 15 13:56:50 2003
@@ -5,8 +5,9 @@
 //===----------------------------------------------------------------------===//
 
 #include "llvm/CodeGen/RegisterAllocation.h"
-#include "llvm/CodeGen/RegAllocCommon.h"
+#include "RegAllocCommon.h"
 #include "llvm/CodeGen/IGNode.h"
+#include "llvm/CodeGen/RegClass.h"
 #include "llvm/CodeGen/PhyRegAlloc.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
 #include "llvm/CodeGen/MachineInstrAnnot.h"


Index: llvm/lib/CodeGen/RegAlloc/RegClass.cpp
diff -u llvm/lib/CodeGen/RegAlloc/RegClass.cpp:1.20 llvm/lib/CodeGen/RegAlloc/RegClass.cpp:1.21
--- llvm/lib/CodeGen/RegAlloc/RegClass.cpp:1.20	Sat Dec 28 21:12:58 2002
+++ llvm/lib/CodeGen/RegAlloc/RegClass.cpp	Wed Jan 15 13:56:50 2003
@@ -5,7 +5,7 @@
 //===----------------------------------------------------------------------===//
 
 #include "llvm/CodeGen/RegClass.h"
-#include "llvm/CodeGen/RegAllocCommon.h"
+#include "RegAllocCommon.h"
 #include "llvm/CodeGen/IGNode.h"
 using std::cerr;
 




From lattner at cs.uiuc.edu  Wed Jan 15 14:27:00 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed Jan 15 14:27:00 2003
Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/RegClass.h InterferenceGraph.h
Message-ID: <200301152026.OAA30184@apoc.cs.uiuc.edu>


Changes in directory llvm/include/llvm/CodeGen:

RegClass.h (r1.15) removed
InterferenceGraph.h (r1.4) removed

---
Log message:

Move private headers into private regalloc directory


---
Diffs of the changes:



From lattner at cs.uiuc.edu  Wed Jan 15 14:29:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed Jan 15 14:29:01 2003
Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/LiveRange.h
Message-ID: <200301152028.OAA30273@apoc.cs.uiuc.edu>


Changes in directory llvm/include/llvm/CodeGen:

LiveRange.h updated: 1.17 -> 1.18

---
Log message:

Add new method


---
Diffs of the changes:

Index: llvm/include/llvm/CodeGen/LiveRange.h
diff -u llvm/include/llvm/CodeGen/LiveRange.h:1.17 llvm/include/llvm/CodeGen/LiveRange.h:1.18
--- llvm/include/llvm/CodeGen/LiveRange.h:1.17	Tue Jan 14 16:56:14 2003
+++ llvm/include/llvm/CodeGen/LiveRange.h	Wed Jan 15 14:28:36 2003
@@ -81,6 +81,7 @@
   void setRegClass(RegClass *RC) { MyRegClass = RC; }
 
   RegClass *getRegClass() const { assert(MyRegClass); return MyRegClass; }
+  unsigned getRegClassID() const;
 
   bool hasColor() const { return Color != -1; }
   




From lattner at cs.uiuc.edu  Wed Jan 15 14:33:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed Jan 15 14:33:01 2003
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp
Message-ID: <200301152032.OAA30322@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/CodeGen/InstrSelection:

InstrSelectionSupport.cpp updated: 1.44 -> 1.45

---
Log message:

Fix bug in previous checkin


---
Diffs of the changes:

Index: llvm/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp
diff -u llvm/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp:1.44 llvm/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp:1.45
--- llvm/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp:1.44	Wed Jan 15 13:47:53 2003
+++ llvm/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp	Wed Jan 15 14:32:15 2003
@@ -433,7 +433,8 @@
       if (mop.getType() == MachineOperand::MO_VirtualRegister)
         {
           assert(mop.getVRegValue() != NULL);
-          if (Constant *opConst = dyn_cast<Constant>(mop.getVRegValue())) {
+          opValue = mop.getVRegValue();
+          if (Constant *opConst = dyn_cast<Constant>(opValue)) {
             opType = ChooseRegOrImmed(opConst, opCode, target,
                                       (immedPos == (int)op), machineRegNum,
                                       immedValue);




From lattner at cs.uiuc.edu  Wed Jan 15 15:01:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed Jan 15 15:01:01 2003
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/RegAlloc/InterferenceGraph.cpp
Message-ID: <200301152100.PAA31708@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/CodeGen/RegAlloc:

InterferenceGraph.cpp updated: 1.13 -> 1.14

---
Log message:

Header is moved into local directory


---
Diffs of the changes:

Index: llvm/lib/CodeGen/RegAlloc/InterferenceGraph.cpp
diff -u llvm/lib/CodeGen/RegAlloc/InterferenceGraph.cpp:1.13 llvm/lib/CodeGen/RegAlloc/InterferenceGraph.cpp:1.14
--- llvm/lib/CodeGen/RegAlloc/InterferenceGraph.cpp:1.13	Wed Jan 15 13:56:50 2003
+++ llvm/lib/CodeGen/RegAlloc/InterferenceGraph.cpp	Wed Jan 15 15:00:02 2003
@@ -5,7 +5,7 @@
 //===----------------------------------------------------------------------===//
 
 #include "RegAllocCommon.h"
-#include "llvm/CodeGen/InterferenceGraph.h"
+#include "InterferenceGraph.h"
 #include "llvm/CodeGen/IGNode.h"
 #include "Support/STLExtras.h"
 #include <algorithm>
@@ -115,8 +115,7 @@
 // return whether two live ranges interfere
 //----------------------------------------------------------------------------
 unsigned InterferenceGraph::getInterference(const LiveRange *const LR1,
-					   const LiveRange *const LR2 ) const {
-
+                                            const LiveRange *const LR2) const {
   assert(LR1 != LR2);
   assertIGNode(this, LR1->getUserIGNode());  
   assertIGNode(this, LR2->getUserIGNode());




From lattner at cs.uiuc.edu  Wed Jan 15 15:03:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed Jan 15 15:03:01 2003
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/RegAlloc/RegClass.cpp RegClass.h
Message-ID: <200301152102.PAA32124@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/CodeGen/RegAlloc:

RegClass.cpp updated: 1.21 -> 1.22
RegClass.h updated: 1.15 -> 1.16

---
Log message:

Move headers around


---
Diffs of the changes:

Index: llvm/lib/CodeGen/RegAlloc/RegClass.cpp
diff -u llvm/lib/CodeGen/RegAlloc/RegClass.cpp:1.21 llvm/lib/CodeGen/RegAlloc/RegClass.cpp:1.22
--- llvm/lib/CodeGen/RegAlloc/RegClass.cpp:1.21	Wed Jan 15 13:56:50 2003
+++ llvm/lib/CodeGen/RegAlloc/RegClass.cpp	Wed Jan 15 15:02:16 2003
@@ -4,7 +4,7 @@
 // 
 //===----------------------------------------------------------------------===//
 
-#include "llvm/CodeGen/RegClass.h"
+#include "RegClass.h"
 #include "RegAllocCommon.h"
 #include "llvm/CodeGen/IGNode.h"
 using std::cerr;


Index: llvm/lib/CodeGen/RegAlloc/RegClass.h
diff -u llvm/lib/CodeGen/RegAlloc/RegClass.h:1.15 llvm/lib/CodeGen/RegAlloc/RegClass.h:1.16
--- llvm/lib/CodeGen/RegAlloc/RegClass.h:1.15	Sat Dec 28 21:12:52 2002
+++ llvm/lib/CodeGen/RegAlloc/RegClass.h	Wed Jan 15 15:02:16 2003
@@ -8,8 +8,8 @@
 #ifndef REG_CLASS_H
 #define REG_CLASS_H
 
-#include "llvm/CodeGen/InterferenceGraph.h"
 #include "llvm/Target/TargetRegInfo.h"
+#include "InterferenceGraph.h"
 #include <stack>
 class TargetRegClassInfo;
 




From lattner at cs.uiuc.edu  Wed Jan 15 15:14:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed Jan 15 15:14:01 2003
Subject: [llvm-commits] CVS: llvm/include/llvm/Target/TargetRegInfo.h
Message-ID: <200301152113.PAA00339@apoc.cs.uiuc.edu>


Changes in directory llvm/include/llvm/Target:

TargetRegInfo.h updated: 1.31 -> 1.32

---
Log message:

Simplify the interface


---
Diffs of the changes:

Index: llvm/include/llvm/Target/TargetRegInfo.h
diff -u llvm/include/llvm/Target/TargetRegInfo.h:1.31 llvm/include/llvm/Target/TargetRegInfo.h:1.32
--- llvm/include/llvm/Target/TargetRegInfo.h:1.31	Tue Jan 14 15:59:58 2003
+++ llvm/include/llvm/Target/TargetRegInfo.h	Wed Jan 15 15:13:32 2003
@@ -76,8 +76,6 @@
   // class (eg. int, float) must be returned.
   virtual unsigned getRegClassIDOfType  (const Type *type,
 					 bool isCCReg = false) const =0;
-  virtual unsigned getRegClassIDOfValue (const Value *Val,
-					 bool isCCReg = false) const =0;
   virtual unsigned getRegClassIDOfReg   (int unifiedRegNum)    const =0;
   virtual unsigned getRegClassIDOfRegType(int regType)         const =0;
   
@@ -179,14 +177,8 @@
   // Returns the assembly-language name of the specified machine register.
   virtual const char * const getUnifiedRegName(int UnifiedRegNum) const = 0;
 
-  // The following 4 methods are used to find the RegType (a target-specific
-  // enum) for a reg class and a given primitive type, a LiveRange, a Value,
-  // or a particular machine register.
-  // The fifth function gives the reg class of the given RegType.
-  // 
-  virtual int getRegType(unsigned regClassID, const Type* type) const = 0;
+  virtual int getRegType(const Type* type) const = 0;
   virtual int getRegType(const LiveRange *LR) const = 0;
-  virtual int getRegType(const Value *Val) const = 0;
   virtual int getRegType(int unifiedRegNum) const = 0;
   
   // The following methods are used to get the frame/stack pointers




From lattner at cs.uiuc.edu  Wed Jan 15 15:15:00 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed Jan 15 15:15:00 2003
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/RegAlloc/LiveRangeInfo.cpp PhyRegAlloc.cpp
Message-ID: <200301152114.PAA00352@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/CodeGen/RegAlloc:

LiveRangeInfo.cpp updated: 1.38 -> 1.39
PhyRegAlloc.cpp updated: 1.93 -> 1.94

---
Log message:

Adjust to new interfaces


---
Diffs of the changes:

Index: llvm/lib/CodeGen/RegAlloc/LiveRangeInfo.cpp
diff -u llvm/lib/CodeGen/RegAlloc/LiveRangeInfo.cpp:1.38 llvm/lib/CodeGen/RegAlloc/LiveRangeInfo.cpp:1.39
--- llvm/lib/CodeGen/RegAlloc/LiveRangeInfo.cpp:1.38	Wed Jan 15 13:56:50 2003
+++ llvm/lib/CodeGen/RegAlloc/LiveRangeInfo.cpp	Wed Jan 15 15:14:01 2003
@@ -6,7 +6,7 @@
 
 #include "llvm/CodeGen/LiveRangeInfo.h"
 #include "RegAllocCommon.h"
-#include "llvm/CodeGen/RegClass.h"
+#include "RegClass.h"
 #include "llvm/CodeGen/IGNode.h"
 #include "llvm/CodeGen/MachineInstr.h"
 #include "llvm/CodeGen/MachineFunction.h"
@@ -16,6 +16,8 @@
 #include "Support/SetOperations.h"
 using std::cerr;
 
+unsigned LiveRange::getRegClassID() const { return getRegClass()->getID(); }
+
 LiveRangeInfo::LiveRangeInfo(const Function *F, const TargetMachine &tm,
 			     std::vector<RegClass *> &RCL)
   : Meth(F), TM(tm), RegClassList(RCL), MRI(tm.getRegInfo()) { }
@@ -93,7 +95,8 @@
   LiveRangeMap[Def] = DefRange;           // and update the map.
 
   // set the register class of the new live range
-  DefRange->setRegClass(RegClassList[MRI.getRegClassIDOfValue(Def, isCC)]);
+  DefRange->setRegClass(RegClassList[MRI.getRegClassIDOfType(Def->getType(),
+                                                             isCC)]);
 
   if (DEBUG_RA >= RA_DEBUG_LiveRanges) {
     cerr << "  Creating a LR for def ";
@@ -280,7 +283,6 @@
 	      continue;
 
 	    if (MRI.getRegType(LROfDef) == MRI.getRegType(LROfUse)) {
-
 	      // If the two RegTypes are the same
 	      if (!RCOfDef->getInterference(LROfDef, LROfUse) ) {
 


Index: llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp
diff -u llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp:1.93 llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp:1.94
--- llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp:1.93	Wed Jan 15 13:56:50 2003
+++ llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp	Wed Jan 15 15:14:01 2003
@@ -6,8 +6,8 @@
 
 #include "llvm/CodeGen/RegisterAllocation.h"
 #include "RegAllocCommon.h"
+#include "RegClass.h"
 #include "llvm/CodeGen/IGNode.h"
-#include "llvm/CodeGen/RegClass.h"
 #include "llvm/CodeGen/PhyRegAlloc.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
 #include "llvm/CodeGen/MachineInstrAnnot.h"
@@ -654,7 +654,7 @@
   MachineOperand& Op = MInst->getOperand(OpNum);
   bool isDef =  MInst->operandIsDefined(OpNum);
   bool isDefAndUse =  MInst->operandIsDefinedAndUsed(OpNum);
-  unsigned RegType = MRI.getRegType( LR );
+  unsigned RegType = MRI.getRegType(LR);
   int SpillOff = LR->getSpillOffFromFP();
   RegClass *RC = LR->getRegClass();
   const ValueSet &LVSetBef = LVI->getLiveVarSetBeforeMInst(MInst, BB);
@@ -888,7 +888,7 @@
       if (MInst->getOperandType(OpNum) == MachineOperand::MO_VirtualRegister || 
           MInst->getOperandType(OpNum) == MachineOperand::MO_CCRegister)
         if (const Value* Val = Op.getVRegValue())
-          if (MRI.getRegClassIDOfValue(Val) == RC->getID())
+          if (MRI.getRegClassIDOfType(Val->getType()) == RC->getID())
             if (Op.getAllocatedRegNum() == -1)
               if (LiveRange *LROfVal = LRI.getLiveRangeForValue(Val))
                 if (LROfVal->hasColor() )




From lattner at cs.uiuc.edu  Wed Jan 15 15:15:04 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed Jan 15 15:15:04 2003
Subject: [llvm-commits] CVS: llvm/lib/Target/Sparc/SparcInternals.h SparcRegInfo.cpp
Message-ID: <200301152114.PAA00366@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Target/Sparc:

SparcInternals.h updated: 1.78 -> 1.79
SparcRegInfo.cpp updated: 1.88 -> 1.89

---
Log message:

Adjust to simpler interfaces
Eliminate dependency on RegClass.h


---
Diffs of the changes:

Index: llvm/lib/Target/Sparc/SparcInternals.h
diff -u llvm/lib/Target/Sparc/SparcInternals.h:1.78 llvm/lib/Target/Sparc/SparcInternals.h:1.79
--- llvm/lib/Target/Sparc/SparcInternals.h:1.78	Tue Jan 14 15:59:15 2003
+++ llvm/lib/Target/Sparc/SparcInternals.h	Wed Jan 15 15:14:32 2003
@@ -275,14 +275,8 @@
                              std::vector<MachineInstr *>& AddedInstrnsBefore)
     const;
   
-  // The following 4 methods are used to find the RegType (see enum above)
-  // for a reg class and a given primitive type, a LiveRange, a Value,
-  // or a particular machine register.
-  // The fifth function gives the reg class of the given RegType.
-  // 
-  int getRegType(unsigned regClassID, const Type* type) const;
+  int getRegType(const Type* type) const;
   int getRegType(const LiveRange *LR) const;
-  int getRegType(const Value *Val) const;
   int getRegType(int unifiedRegNum) const;
 
   // Used to generate a copy instruction based on the register class of
@@ -322,13 +316,6 @@
   //
   unsigned getRegClassIDOfType(const Type *type,
                                bool isCCReg = false) const;
-
-  // To find the register class of a Value
-  //
-  inline unsigned getRegClassIDOfValue(const Value *Val,
-                                       bool isCCReg = false) const {
-    return getRegClassIDOfType(Val->getType(), isCCReg);
-  }
 
   // To find the register class to which a specified register belongs
   //


Index: llvm/lib/Target/Sparc/SparcRegInfo.cpp
diff -u llvm/lib/Target/Sparc/SparcRegInfo.cpp:1.88 llvm/lib/Target/Sparc/SparcRegInfo.cpp:1.89
--- llvm/lib/Target/Sparc/SparcRegInfo.cpp:1.88	Wed Jan 15 13:57:07 2003
+++ llvm/lib/Target/Sparc/SparcRegInfo.cpp	Wed Jan 15 15:14:32 2003
@@ -14,7 +14,6 @@
 #include "llvm/CodeGen/MachineInstrBuilder.h"
 #include "llvm/CodeGen/MachineInstrAnnot.h"
 #include "llvm/CodeGen/FunctionLiveVarInfo.h"   // FIXME: Remove
-#include "llvm/CodeGen/RegClass.h"
 #include "../../CodeGen/RegAlloc/RegAllocCommon.h"   // FIXME!
 #include "llvm/iTerminators.h"
 #include "llvm/iOther.h"
@@ -233,8 +232,8 @@
 // The following 4  methods are used to find the RegType (SparcInternals.h)
 // of a LiveRange, a Value, and for a given register unified reg number.
 //
-int UltraSparcRegInfo::getRegType(unsigned regClassID,
-                                  const Type* type) const {
+int UltraSparcRegInfo::getRegType(const Type* type) const {
+  unsigned regClassID = getRegClassIDOfType(type);
   switch (regClassID) {
   case IntRegClassID: return IntRegType; 
   case FloatRegClassID: {
@@ -251,13 +250,25 @@
 }
 
 int UltraSparcRegInfo::getRegType(const LiveRange *LR) const {
-  return getRegType(LR->getRegClass()->getID(), LR->getType());
-}
+  const Type* type = LR->getType();
 
-int UltraSparcRegInfo::getRegType(const Value *Val) const {
-  return getRegType(getRegClassIDOfValue(Val), Val->getType());
+  unsigned regClassID = LR->getRegClassID();
+  switch (regClassID) {
+  case IntRegClassID: return IntRegType;
+  case FloatRegClassID:
+    if (type == Type::FloatTy) 
+      return FPSingleRegType;
+    else if (type == Type::DoubleTy)
+      return FPDoubleRegType;
+    break;
+    assert(0 && "Unknown type in FloatRegClass");
+  case IntCCRegClassID:   return IntCCRegType; break; 
+  case FloatCCRegClassID: return FloatCCRegType; break; 
+  default: assert( 0 && "Unknown reg class ID"); return 0;
+  }
 }
 
+
 int UltraSparcRegInfo::getRegType(int unifiedRegNum) const {
   if (unifiedRegNum < 32) 
     return IntRegType;
@@ -294,8 +305,8 @@
     return 0;
   }
   
-  if(isCCReg)
-    return res + 2;      // corresponidng condition code regiser 
+  if (isCCReg)
+    return res + 2;      // corresponding condition code register 
   else 
     return res;
 }
@@ -365,7 +376,7 @@
   LiveRange *RetAddrLR = LRI.getLiveRangeForValue(RetAddrVal);
   assert(RetAddrLR && "INTERNAL ERROR: No LR for return address of call!");
 
-  unsigned RegClassID = RetAddrLR->getRegClass()->getID();
+  unsigned RegClassID = RetAddrLR->getRegClassID();
   RetAddrLR->setColor(getUnifiedRegNum(IntRegClassID, SparcIntRegClass::o7));
 }
 
@@ -429,8 +440,8 @@
     LiveRange *LR = LRI.getLiveRangeForValue(I);
     assert( LR && "No live range found for method arg");
 
-    unsigned regType = getRegType( LR );
-    unsigned RegClassID = (LR->getRegClass())->getID();
+    unsigned regType = getRegType(LR);
+    unsigned RegClassID = LR->getRegClassID();
     
     // Find whether this argument is coming in a register (if not, on stack)
     // Also find the correct register the argument must use (UniArgReg)
@@ -580,7 +591,7 @@
     LiveRange *RetValLR = LRI.getLiveRangeForValue(RetVal);
     assert(RetValLR && "No LR for return Value of call!");
 
-    unsigned RegClassID = RetValLR->getRegClass()->getID();
+    unsigned RegClassID = RetValLR->getRegClassID();
 
     // now suggest a register depending on the register class of ret arg
     if( RegClassID == IntRegClassID ) 
@@ -607,7 +618,7 @@
     assert (LR && "Must have a LR for all arguments since "
                   "all args (even consts) must be defined before");
 
-    unsigned regType = getRegType( LR );
+    unsigned regType = getRegType(LR);
     unsigned regClassIDOfArgReg = BadRegClass; // reg class of chosen reg (unused)
 
     // Choose a register for this arg depending on whether it is
@@ -706,7 +717,7 @@
       // Use TReg to load and store the value.
       // Use TmpOff to save TReg, since that may have a live value.
       // 
-      int TReg = PRA.getUniRegNotUsedByThisInst( LR->getRegClass(), CallMI );
+      int TReg = PRA.getUniRegNotUsedByThisInst(LR->getRegClass(), CallMI);
       int TmpOff = PRA.MF.getInfo()->
 	             pushTempValue(getSpilledRegSize(getRegType(LR)));
       const TargetFrameInfo& frameInfo = target.getFrameInfo();
@@ -772,7 +783,7 @@
       assert(RetValLR && "ERR:No LR for non-void return value");
     }
 
-    unsigned RegClassID = (RetValLR->getRegClass())->getID();    
+    unsigned RegClassID = RetValLR->getRegClassID();
     bool recvCorrectColor;
     unsigned CorrectCol;                // correct color for ret value
     unsigned UniRetReg;                 // unified number for CorrectCol
@@ -800,7 +811,7 @@
     // put copy instruction
     if( !recvCorrectColor ) {
       
-      unsigned regType = getRegType( RetValLR );
+      unsigned regType = getRegType(RetValLR);
 
       if( RetValLR->hasColor() ) {
 	
@@ -842,8 +853,8 @@
     // get the LR of call operand (parameter)
     LiveRange *const LR = LRI.getLiveRangeForValue(CallArg); 
 
-    unsigned RegClassID = getRegClassIDOfValue( CallArg);
-    unsigned regType = getRegType( RegClassID, CallArg->getType() );
+    unsigned RegClassID = getRegClassIDOfType(CallArg->getType());
+    unsigned regType = getRegType(CallArg->getType());
     
     // Find whether this argument is coming in a register (if not, on stack)
     // Also find the correct register the argument must use (UniArgReg)
@@ -889,8 +900,8 @@
         assert(regType != IntRegType && argCopy->getType()->isInteger()
                && "Must be passing copy of FP argument in int register");
         
-        unsigned copyRegClassID = getRegClassIDOfValue(argCopy);
-        unsigned copyRegType = getRegType(copyRegClassID, argCopy->getType());
+        unsigned copyRegClassID = getRegClassIDOfType(argCopy->getType());
+        unsigned copyRegType = getRegType(argCopy->getType());
         
         int copyRegNum = regNumForIntArg(/*inCallee*/false, /*isVarArgs*/false,
                                          argNo, intArgNo, fpArgNo-1,
@@ -974,8 +985,7 @@
       assert(0 && "No LR for return value of non-void method");
     }
 
-    unsigned RegClassID = (LR->getRegClass())->getID();
-      
+    unsigned RegClassID = LR->getRegClassID();
     if (RegClassID == IntRegClassID) 
       LR->setSuggestedColor(SparcIntRegClass::i0);
     else if (RegClassID == FloatRegClassID) 
@@ -1011,8 +1021,8 @@
       return;
     }
 
-    unsigned RegClassID =  getRegClassIDOfValue(RetVal);
-    unsigned regType = getRegType( RetVal );
+    unsigned RegClassID = getRegClassIDOfType(RetVal->getType());
+    unsigned regType = getRegType(RetVal->getType());
 
     unsigned CorrectCol;
     if(RegClassID == IntRegClassID)
@@ -1256,10 +1266,7 @@
 void
 UltraSparcRegInfo::cpValue2Value(Value *Src, Value *Dest,
                                  vector<MachineInstr*>& mvec) const {
-  int RegType = getRegType( Src );
-
-  assert( (RegType==getRegType(Src))  && "Src & Dest are diff types");
-
+  int RegType = getRegType(Src->getType());
   MachineInstr * MI = NULL;
 
   switch( RegType ) {
@@ -1328,9 +1335,8 @@
     assert(RetValLR && "No LR for RetValue of call");
 
     if (RetValLR->hasColor())
-      PushedRegSet.insert(
-	 getUnifiedRegNum((RetValLR->getRegClass())->getID(), 
-				      RetValLR->getColor() ) );
+      PushedRegSet.insert(getUnifiedRegNum(RetValLR->getRegClassID(),
+                                           RetValLR->getColor()));
   }
 
   const ValueSet &LVSetAft =  PRA.LVI->getLiveVarSetAfterMInst(CallMI, BB);
@@ -1348,7 +1354,7 @@
       
       if( LR->hasColor() ) {
 
-	unsigned RCID = (LR->getRegClass())->getID();
+	unsigned RCID = LR->getRegClassID();
 	unsigned Color = LR->getColor();
 
 	if ( isRegVolatile(RCID, Color) ) {
@@ -1362,7 +1368,7 @@
 	    
 	    // if we haven't already pushed that register
 
-	    unsigned RegType = getRegType( LR );
+	    unsigned RegType = getRegType(LR);
 
 	    // Now get two instructions - to push on stack and pop from stack
 	    // and add them to InstrnsBefore and InstrnsAfter of the
@@ -1458,7 +1464,7 @@
 //---------------------------------------------------------------------------
 
 void UltraSparcRegInfo::printReg(const LiveRange *LR) {
-  unsigned RegClassID = (LR->getRegClass())->getID();
+  unsigned RegClassID = LR->getRegClassID();
   cerr << " *Node " << (LR->getUserIGNode())->getIndex();
 
   if (!LR->hasColor()) {




From lattner at cs.uiuc.edu  Wed Jan 15 15:37:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed Jan 15 15:37:01 2003
Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/InstrSelectionSupport.h
Message-ID: <200301152136.PAA02012@apoc.cs.uiuc.edu>


Changes in directory llvm/include/llvm/CodeGen:

InstrSelectionSupport.h updated: 1.21 -> 1.22

---
Log message:

Move sparc specific code into the Sparc backend


---
Diffs of the changes:

Index: llvm/include/llvm/CodeGen/InstrSelectionSupport.h
diff -u llvm/include/llvm/CodeGen/InstrSelectionSupport.h:1.21 llvm/include/llvm/CodeGen/InstrSelectionSupport.h:1.22
--- llvm/include/llvm/CodeGen/InstrSelectionSupport.h:1.21	Wed Jan 15 13:46:39 2003
+++ llvm/include/llvm/CodeGen/InstrSelectionSupport.h	Wed Jan 15 15:36:48 2003
@@ -15,50 +15,6 @@
 class Instruction;
 
 //---------------------------------------------------------------------------
-// Function GetConstantValueAsUnsignedInt
-// Function GetConstantValueAsSignedInt
-// 
-// Convenience functions to get the value of an integer constant, for an
-// appropriate integer or non-integer type that can be held in a signed
-// or unsigned integer respectively.  The type of the argument must be
-// the following:
-//      Signed or unsigned integer
-//      Boolean
-//      Pointer
-// 
-// isValidConstant is set to true if a valid constant was found.
-//---------------------------------------------------------------------------
-
-uint64_t        GetConstantValueAsUnsignedInt   (const Value *V,
-                                                 bool &isValidConstant);
-
-int64_t         GetConstantValueAsSignedInt     (const Value *V,
-                                                 bool &isValidConstant);
-
-
-//---------------------------------------------------------------------------
-// Function: GetMemInstArgs
-// 
-// Purpose:
-//   Get the pointer value and the index vector for a memory operation
-//   (GetElementPtr, Load, or Store).  If all indices of the given memory
-//   operation are constant, fold in constant indices in a chain of
-//   preceding GetElementPtr instructions (if any), and return the
-//   pointer value of the first instruction in the chain.
-//   All folded instructions are marked so no code is generated for them.
-//
-// Return values:
-//   Returns the pointer Value to use.
-//   Returns the resulting IndexVector in idxVec.
-//   Returns true/false in allConstantIndices if all indices are/aren't const.
-//---------------------------------------------------------------------------
-
-Value*          GetMemInstArgs  (InstructionNode* memInstrNode,
-                                 std::vector<Value*>& idxVec,
-                                 bool& allConstantIndices);
-
-
-//---------------------------------------------------------------------------
 // Function: ChooseRegOrImmed
 // 
 // Purpose:




From lattner at cs.uiuc.edu  Wed Jan 15 15:37:05 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed Jan 15 15:37:05 2003
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp
Message-ID: <200301152136.PAA02019@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/CodeGen/InstrSelection:

InstrSelectionSupport.cpp updated: 1.45 -> 1.46

---
Log message:

Move sparc specific code into the Sparc backend



---
Diffs of the changes:

Index: llvm/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp
diff -u llvm/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp:1.45 llvm/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp:1.46
--- llvm/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp:1.45	Wed Jan 15 14:32:15 2003
+++ llvm/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp	Wed Jan 15 15:36:49 2003
@@ -7,18 +7,15 @@
 
 #include "llvm/CodeGen/InstrSelectionSupport.h"
 #include "llvm/CodeGen/InstrSelection.h"
-#include "llvm/CodeGen/MachineInstr.h"
 #include "llvm/CodeGen/MachineInstrAnnot.h"
 #include "llvm/CodeGen/MachineCodeForInstruction.h"
-#include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/InstrForest.h"
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/Target/TargetRegInfo.h"
 #include "llvm/Target/TargetInstrInfo.h"
 #include "llvm/Constants.h"
-#include "llvm/Function.h"
+#include "llvm/BasicBlock.h"
 #include "llvm/DerivedTypes.h"
-#include "llvm/iMemory.h"
 using std::vector;
 
 //*************************** Local Functions ******************************/
@@ -51,257 +48,6 @@
 }
 
 
-//---------------------------------------------------------------------------
-// Function GetConstantValueAsUnsignedInt
-// Function GetConstantValueAsSignedInt
-// 
-// Convenience functions to get the value of an integral constant, for an
-// appropriate integer or non-integer type that can be held in a signed
-// or unsigned integer respectively.  The type of the argument must be
-// the following:
-//      Signed or unsigned integer
-//      Boolean
-//      Pointer
-// 
-// isValidConstant is set to true if a valid constant was found.
-//---------------------------------------------------------------------------
-
-uint64_t
-GetConstantValueAsUnsignedInt(const Value *V,
-                              bool &isValidConstant)
-{
-  isValidConstant = true;
-
-  if (isa<Constant>(V))
-    if (const ConstantBool *CB = dyn_cast<ConstantBool>(V))
-      return (int64_t)CB->getValue();
-    else if (const ConstantSInt *CS = dyn_cast<ConstantSInt>(V))
-      return (uint64_t)CS->getValue();
-    else if (const ConstantUInt *CU = dyn_cast<ConstantUInt>(V))
-      return CU->getValue();
-
-  isValidConstant = false;
-  return 0;
-}
-
-int64_t
-GetConstantValueAsSignedInt(const Value *V,
-                            bool &isValidConstant)
-{
-  uint64_t C = GetConstantValueAsUnsignedInt(V, isValidConstant);
-  if (isValidConstant) {
-    if (V->getType()->isSigned() || C < INT64_MAX) // safe to cast to signed
-      return (int64_t) C;
-    else
-      isValidConstant = false;
-  }
-  return 0;
-}
-
-
-//---------------------------------------------------------------------------
-// Function: FoldGetElemChain
-// 
-// Purpose:
-//   Fold a chain of GetElementPtr instructions containing only
-//   constant offsets into an equivalent (Pointer, IndexVector) pair.
-//   Returns the pointer Value, and stores the resulting IndexVector
-//   in argument chainIdxVec. This is a helper function for
-//   FoldConstantIndices that does the actual folding. 
-//---------------------------------------------------------------------------
-
-
-// Check for a constant 0.
-inline bool
-IsZero(Value* idx)
-{
-  return (idx == ConstantSInt::getNullValue(idx->getType()));
-}
-
-static Value*
-FoldGetElemChain(InstrTreeNode* ptrNode, vector<Value*>& chainIdxVec,
-                 bool lastInstHasLeadingNonZero)
-{
-  InstructionNode* gepNode = dyn_cast<InstructionNode>(ptrNode);
-  GetElementPtrInst* gepInst =
-    dyn_cast_or_null<GetElementPtrInst>(gepNode ? gepNode->getInstruction() :0);
-
-  // ptr value is not computed in this tree or ptr value does not come from GEP
-  // instruction
-  if (gepInst == NULL)
-    return NULL;
-
-  // Return NULL if we don't fold any instructions in.
-  Value* ptrVal = NULL;
-
-  // Now chase the chain of getElementInstr instructions, if any.
-  // Check for any non-constant indices and stop there.
-  // Also, stop if the first index of child is a non-zero array index
-  // and the last index of the current node is a non-array index:
-  // in that case, a non-array declared type is being accessed as an array
-  // which is not type-safe, but could be legal.
-  // 
-  InstructionNode* ptrChild = gepNode;
-  while (ptrChild && (ptrChild->getOpLabel() == Instruction::GetElementPtr ||
-                      ptrChild->getOpLabel() == GetElemPtrIdx))
-    {
-      // Child is a GetElemPtr instruction
-      gepInst = cast<GetElementPtrInst>(ptrChild->getValue());
-      User::op_iterator OI, firstIdx = gepInst->idx_begin();
-      User::op_iterator lastIdx = gepInst->idx_end();
-      bool allConstantOffsets = true;
-
-      // The first index of every GEP must be an array index.
-      assert((*firstIdx)->getType() == Type::LongTy &&
-             "INTERNAL ERROR: Structure index for a pointer type!");
-
-      // If the last instruction had a leading non-zero index, check if the
-      // current one references a sequential (i.e., indexable) type.
-      // If not, the code is not type-safe and we would create an illegal GEP
-      // by folding them, so don't fold any more instructions.
-      // 
-      if (lastInstHasLeadingNonZero)
-        if (! isa<SequentialType>(gepInst->getType()->getElementType()))
-          break;   // cannot fold in any preceding getElementPtr instrs.
-
-      // Check that all offsets are constant for this instruction
-      for (OI = firstIdx; allConstantOffsets && OI != lastIdx; ++OI)
-        allConstantOffsets = isa<ConstantInt>(*OI);
-
-      if (allConstantOffsets)
-        { // Get pointer value out of ptrChild.
-          ptrVal = gepInst->getPointerOperand();
-
-          // Remember if it has leading zero index: it will be discarded later.
-          lastInstHasLeadingNonZero = ! IsZero(*firstIdx);
-
-          // Insert its index vector at the start, skipping any leading [0]
-          chainIdxVec.insert(chainIdxVec.begin(),
-                             firstIdx + !lastInstHasLeadingNonZero, lastIdx);
-
-          // Mark the folded node so no code is generated for it.
-          ((InstructionNode*) ptrChild)->markFoldedIntoParent();
-
-          // Get the previous GEP instruction and continue trying to fold
-          ptrChild = dyn_cast<InstructionNode>(ptrChild->leftChild());
-        }
-      else // cannot fold this getElementPtr instr. or any preceding ones
-        break;
-    }
-
-  // If the first getElementPtr instruction had a leading [0], add it back.
-  // Note that this instruction is the *last* one successfully folded above.
-  if (ptrVal && ! lastInstHasLeadingNonZero) 
-    chainIdxVec.insert(chainIdxVec.begin(), ConstantSInt::get(Type::LongTy,0));
-
-  return ptrVal;
-}
-
-
-//---------------------------------------------------------------------------
-// Function: GetGEPInstArgs
-// 
-// Purpose:
-//   Helper function for GetMemInstArgs that handles the final getElementPtr
-//   instruction used by (or same as) the memory operation.
-//   Extracts the indices of the current instruction and tries to fold in
-//   preceding ones if all indices of the current one are constant.
-//---------------------------------------------------------------------------
-
-Value*
-GetGEPInstArgs(InstructionNode* gepNode,
-               vector<Value*>& idxVec,
-               bool& allConstantIndices)
-{
-  allConstantIndices = true;
-  GetElementPtrInst* gepI = cast<GetElementPtrInst>(gepNode->getInstruction());
-
-  // Default pointer is the one from the current instruction.
-  Value* ptrVal = gepI->getPointerOperand();
-  InstrTreeNode* ptrChild = gepNode->leftChild(); 
-
-  // Extract the index vector of the GEP instructin.
-  // If all indices are constant and first index is zero, try to fold
-  // in preceding GEPs with all constant indices.
-  for (User::op_iterator OI=gepI->idx_begin(),  OE=gepI->idx_end();
-       allConstantIndices && OI != OE; ++OI)
-    if (! isa<Constant>(*OI))
-      allConstantIndices = false;     // note: this also terminates loop!
-
-  // If we have only constant indices, fold chains of constant indices
-  // in this and any preceding GetElemPtr instructions.
-  bool foldedGEPs = false;
-  bool leadingNonZeroIdx = gepI && ! IsZero(*gepI->idx_begin());
-  if (allConstantIndices)
-    if (Value* newPtr = FoldGetElemChain(ptrChild, idxVec, leadingNonZeroIdx))
-      {
-        ptrVal = newPtr;
-        foldedGEPs = true;
-      }
-
-  // Append the index vector of the current instruction.
-  // Skip the leading [0] index if preceding GEPs were folded into this.
-  idxVec.insert(idxVec.end(),
-                gepI->idx_begin() + (foldedGEPs && !leadingNonZeroIdx),
-                gepI->idx_end());
-
-  return ptrVal;
-}
-
-//---------------------------------------------------------------------------
-// Function: GetMemInstArgs
-// 
-// Purpose:
-//   Get the pointer value and the index vector for a memory operation
-//   (GetElementPtr, Load, or Store).  If all indices of the given memory
-//   operation are constant, fold in constant indices in a chain of
-//   preceding GetElementPtr instructions (if any), and return the
-//   pointer value of the first instruction in the chain.
-//   All folded instructions are marked so no code is generated for them.
-//
-// Return values:
-//   Returns the pointer Value to use.
-//   Returns the resulting IndexVector in idxVec.
-//   Returns true/false in allConstantIndices if all indices are/aren't const.
-//---------------------------------------------------------------------------
-
-Value*
-GetMemInstArgs(InstructionNode* memInstrNode,
-               vector<Value*>& idxVec,
-               bool& allConstantIndices)
-{
-  allConstantIndices = false;
-  Instruction* memInst = memInstrNode->getInstruction();
-  assert(idxVec.size() == 0 && "Need empty vector to return indices");
-
-  // If there is a GetElemPtr instruction to fold in to this instr,
-  // it must be in the left child for Load and GetElemPtr, and in the
-  // right child for Store instructions.
-  InstrTreeNode* ptrChild = (memInst->getOpcode() == Instruction::Store
-                             ? memInstrNode->rightChild()
-                             : memInstrNode->leftChild()); 
-  
-  // Default pointer is the one from the current instruction.
-  Value* ptrVal = ptrChild->getValue(); 
-
-  // Find the "last" GetElemPtr instruction: this one or the immediate child.
-  // There will be none if this is a load or a store from a scalar pointer.
-  InstructionNode* gepNode = NULL;
-  if (isa<GetElementPtrInst>(memInst))
-    gepNode = memInstrNode;
-  else if (isa<InstructionNode>(ptrChild) && isa<GetElementPtrInst>(ptrVal))
-    { // Child of load/store is a GEP and memInst is its only use.
-      // Use its indices and mark it as folded.
-      gepNode = cast<InstructionNode>(ptrChild);
-      gepNode->markFoldedIntoParent();
-    }
-
-  // If there are no indices, return the current pointer.
-  // Else extract the pointer from the GEP and fold the indices.
-  return gepNode ? GetGEPInstArgs(gepNode, idxVec, allConstantIndices)
-                 : ptrVal;
-}
-
 MachineOperand::MachineOperandType
 ChooseRegOrImmed(int64_t intValue,
                  bool isSigned,
@@ -316,7 +62,7 @@
   getImmedValue = 0;
 
   if (canUseImmed &&
-	   target.getInstrInfo().constantFitsInImmedField(opCode, intValue))
+      target.getInstrInfo().constantFitsInImmedField(opCode, intValue))
     {
       opType = isSigned? MachineOperand::MO_SignExtendedImmed
                        : MachineOperand::MO_UnextendedImmed;




From lattner at cs.uiuc.edu  Wed Jan 15 15:38:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed Jan 15 15:38:01 2003
Subject: [llvm-commits] CVS: llvm/lib/Target/Sparc/SparcRegInfo.cpp
Message-ID: <200301152137.PAA02035@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Target/Sparc:

SparcRegInfo.cpp updated: 1.89 -> 1.90

---
Log message:

Fix warnings


---
Diffs of the changes:

Index: llvm/lib/Target/Sparc/SparcRegInfo.cpp
diff -u llvm/lib/Target/Sparc/SparcRegInfo.cpp:1.89 llvm/lib/Target/Sparc/SparcRegInfo.cpp:1.90
--- llvm/lib/Target/Sparc/SparcRegInfo.cpp:1.89	Wed Jan 15 15:14:32 2003
+++ llvm/lib/Target/Sparc/SparcRegInfo.cpp	Wed Jan 15 15:36:30 2003
@@ -254,17 +254,16 @@
 
   unsigned regClassID = LR->getRegClassID();
   switch (regClassID) {
+  default: assert( 0 && "Unknown reg class ID");
   case IntRegClassID: return IntRegType;
   case FloatRegClassID:
     if (type == Type::FloatTy) 
       return FPSingleRegType;
     else if (type == Type::DoubleTy)
       return FPDoubleRegType;
-    break;
     assert(0 && "Unknown type in FloatRegClass");
-  case IntCCRegClassID:   return IntCCRegType; break; 
-  case FloatCCRegClassID: return FloatCCRegType; break; 
-  default: assert( 0 && "Unknown reg class ID"); return 0;
+  case IntCCRegClassID:   return IntCCRegType;
+  case FloatCCRegClassID: return FloatCCRegType;
   }
 }
 




From lattner at cs.uiuc.edu  Wed Jan 15 15:38:04 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed Jan 15 15:38:04 2003
Subject: [llvm-commits] CVS: llvm/lib/Target/Sparc/SparcInstrInfo.cpp SparcInstrSelection.cpp SparcInternals.h
Message-ID: <200301152137.PAA02030@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Target/Sparc:

SparcInstrInfo.cpp updated: 1.37 -> 1.38
SparcInstrSelection.cpp updated: 1.85 -> 1.86
SparcInternals.h updated: 1.79 -> 1.80

---
Log message:

Move sparc specific code into the Sparc backend


---
Diffs of the changes:

Index: llvm/lib/Target/Sparc/SparcInstrInfo.cpp
diff -u llvm/lib/Target/Sparc/SparcInstrInfo.cpp:1.37 llvm/lib/Target/Sparc/SparcInstrInfo.cpp:1.38
--- llvm/lib/Target/Sparc/SparcInstrInfo.cpp:1.37	Wed Jan 15 13:23:34 2003
+++ llvm/lib/Target/Sparc/SparcInstrInfo.cpp	Wed Jan 15 15:36:50 2003
@@ -20,6 +20,53 @@
 static const uint32_t MAXSIMM = (1 << 12) - 1; // set bits in simm13 field of OR
 
 
+//---------------------------------------------------------------------------
+// Function GetConstantValueAsUnsignedInt
+// Function GetConstantValueAsSignedInt
+// 
+// Convenience functions to get the value of an integral constant, for an
+// appropriate integer or non-integer type that can be held in a signed
+// or unsigned integer respectively.  The type of the argument must be
+// the following:
+//      Signed or unsigned integer
+//      Boolean
+//      Pointer
+// 
+// isValidConstant is set to true if a valid constant was found.
+//---------------------------------------------------------------------------
+
+static uint64_t
+GetConstantValueAsUnsignedInt(const Value *V,
+                              bool &isValidConstant)
+{
+  isValidConstant = true;
+
+  if (isa<Constant>(V))
+    if (const ConstantBool *CB = dyn_cast<ConstantBool>(V))
+      return (int64_t)CB->getValue();
+    else if (const ConstantSInt *CS = dyn_cast<ConstantSInt>(V))
+      return (uint64_t)CS->getValue();
+    else if (const ConstantUInt *CU = dyn_cast<ConstantUInt>(V))
+      return CU->getValue();
+
+  isValidConstant = false;
+  return 0;
+}
+
+int64_t
+GetConstantValueAsSignedInt(const Value *V, bool &isValidConstant)
+{
+  uint64_t C = GetConstantValueAsUnsignedInt(V, isValidConstant);
+  if (isValidConstant) {
+    if (V->getType()->isSigned() || C < INT64_MAX) // safe to cast to signed
+      return (int64_t) C;
+    else
+      isValidConstant = false;
+  }
+  return 0;
+}
+
+
 //----------------------------------------------------------------------------
 // Function: CreateSETUWConst
 // 


Index: llvm/lib/Target/Sparc/SparcInstrSelection.cpp
diff -u llvm/lib/Target/Sparc/SparcInstrSelection.cpp:1.85 llvm/lib/Target/Sparc/SparcInstrSelection.cpp:1.86
--- llvm/lib/Target/Sparc/SparcInstrSelection.cpp:1.85	Wed Jan 15 13:23:34 2003
+++ llvm/lib/Target/Sparc/SparcInstrSelection.cpp	Wed Jan 15 15:36:50 2003
@@ -35,6 +35,227 @@
 
 
 
+//---------------------------------------------------------------------------
+// Function: GetMemInstArgs
+// 
+// Purpose:
+//   Get the pointer value and the index vector for a memory operation
+//   (GetElementPtr, Load, or Store).  If all indices of the given memory
+//   operation are constant, fold in constant indices in a chain of
+//   preceding GetElementPtr instructions (if any), and return the
+//   pointer value of the first instruction in the chain.
+//   All folded instructions are marked so no code is generated for them.
+//
+// Return values:
+//   Returns the pointer Value to use.
+//   Returns the resulting IndexVector in idxVec.
+//   Returns true/false in allConstantIndices if all indices are/aren't const.
+//---------------------------------------------------------------------------
+
+
+//---------------------------------------------------------------------------
+// Function: FoldGetElemChain
+// 
+// Purpose:
+//   Fold a chain of GetElementPtr instructions containing only
+//   constant offsets into an equivalent (Pointer, IndexVector) pair.
+//   Returns the pointer Value, and stores the resulting IndexVector
+//   in argument chainIdxVec. This is a helper function for
+//   FoldConstantIndices that does the actual folding. 
+//---------------------------------------------------------------------------
+
+
+// Check for a constant 0.
+inline bool
+IsZero(Value* idx)
+{
+  return (idx == ConstantSInt::getNullValue(idx->getType()));
+}
+
+static Value*
+FoldGetElemChain(InstrTreeNode* ptrNode, vector<Value*>& chainIdxVec,
+                 bool lastInstHasLeadingNonZero)
+{
+  InstructionNode* gepNode = dyn_cast<InstructionNode>(ptrNode);
+  GetElementPtrInst* gepInst =
+    dyn_cast_or_null<GetElementPtrInst>(gepNode ? gepNode->getInstruction() :0);
+
+  // ptr value is not computed in this tree or ptr value does not come from GEP
+  // instruction
+  if (gepInst == NULL)
+    return NULL;
+
+  // Return NULL if we don't fold any instructions in.
+  Value* ptrVal = NULL;
+
+  // Now chase the chain of getElementInstr instructions, if any.
+  // Check for any non-constant indices and stop there.
+  // Also, stop if the first index of child is a non-zero array index
+  // and the last index of the current node is a non-array index:
+  // in that case, a non-array declared type is being accessed as an array
+  // which is not type-safe, but could be legal.
+  // 
+  InstructionNode* ptrChild = gepNode;
+  while (ptrChild && (ptrChild->getOpLabel() == Instruction::GetElementPtr ||
+                      ptrChild->getOpLabel() == GetElemPtrIdx))
+    {
+      // Child is a GetElemPtr instruction
+      gepInst = cast<GetElementPtrInst>(ptrChild->getValue());
+      User::op_iterator OI, firstIdx = gepInst->idx_begin();
+      User::op_iterator lastIdx = gepInst->idx_end();
+      bool allConstantOffsets = true;
+
+      // The first index of every GEP must be an array index.
+      assert((*firstIdx)->getType() == Type::LongTy &&
+             "INTERNAL ERROR: Structure index for a pointer type!");
+
+      // If the last instruction had a leading non-zero index, check if the
+      // current one references a sequential (i.e., indexable) type.
+      // If not, the code is not type-safe and we would create an illegal GEP
+      // by folding them, so don't fold any more instructions.
+      // 
+      if (lastInstHasLeadingNonZero)
+        if (! isa<SequentialType>(gepInst->getType()->getElementType()))
+          break;   // cannot fold in any preceding getElementPtr instrs.
+
+      // Check that all offsets are constant for this instruction
+      for (OI = firstIdx; allConstantOffsets && OI != lastIdx; ++OI)
+        allConstantOffsets = isa<ConstantInt>(*OI);
+
+      if (allConstantOffsets)
+        { // Get pointer value out of ptrChild.
+          ptrVal = gepInst->getPointerOperand();
+
+          // Remember if it has leading zero index: it will be discarded later.
+          lastInstHasLeadingNonZero = ! IsZero(*firstIdx);
+
+          // Insert its index vector at the start, skipping any leading [0]
+          chainIdxVec.insert(chainIdxVec.begin(),
+                             firstIdx + !lastInstHasLeadingNonZero, lastIdx);
+
+          // Mark the folded node so no code is generated for it.
+          ((InstructionNode*) ptrChild)->markFoldedIntoParent();
+
+          // Get the previous GEP instruction and continue trying to fold
+          ptrChild = dyn_cast<InstructionNode>(ptrChild->leftChild());
+        }
+      else // cannot fold this getElementPtr instr. or any preceding ones
+        break;
+    }
+
+  // If the first getElementPtr instruction had a leading [0], add it back.
+  // Note that this instruction is the *last* one successfully folded above.
+  if (ptrVal && ! lastInstHasLeadingNonZero) 
+    chainIdxVec.insert(chainIdxVec.begin(), ConstantSInt::get(Type::LongTy,0));
+
+  return ptrVal;
+}
+
+
+//---------------------------------------------------------------------------
+// Function: GetGEPInstArgs
+// 
+// Purpose:
+//   Helper function for GetMemInstArgs that handles the final getElementPtr
+//   instruction used by (or same as) the memory operation.
+//   Extracts the indices of the current instruction and tries to fold in
+//   preceding ones if all indices of the current one are constant.
+//---------------------------------------------------------------------------
+
+static Value *
+GetGEPInstArgs(InstructionNode* gepNode,
+               vector<Value*>& idxVec,
+               bool& allConstantIndices)
+{
+  allConstantIndices = true;
+  GetElementPtrInst* gepI = cast<GetElementPtrInst>(gepNode->getInstruction());
+
+  // Default pointer is the one from the current instruction.
+  Value* ptrVal = gepI->getPointerOperand();
+  InstrTreeNode* ptrChild = gepNode->leftChild(); 
+
+  // Extract the index vector of the GEP instructin.
+  // If all indices are constant and first index is zero, try to fold
+  // in preceding GEPs with all constant indices.
+  for (User::op_iterator OI=gepI->idx_begin(),  OE=gepI->idx_end();
+       allConstantIndices && OI != OE; ++OI)
+    if (! isa<Constant>(*OI))
+      allConstantIndices = false;     // note: this also terminates loop!
+
+  // If we have only constant indices, fold chains of constant indices
+  // in this and any preceding GetElemPtr instructions.
+  bool foldedGEPs = false;
+  bool leadingNonZeroIdx = gepI && ! IsZero(*gepI->idx_begin());
+  if (allConstantIndices)
+    if (Value* newPtr = FoldGetElemChain(ptrChild, idxVec, leadingNonZeroIdx))
+      {
+        ptrVal = newPtr;
+        foldedGEPs = true;
+      }
+
+  // Append the index vector of the current instruction.
+  // Skip the leading [0] index if preceding GEPs were folded into this.
+  idxVec.insert(idxVec.end(),
+                gepI->idx_begin() + (foldedGEPs && !leadingNonZeroIdx),
+                gepI->idx_end());
+
+  return ptrVal;
+}
+
+//---------------------------------------------------------------------------
+// Function: GetMemInstArgs
+// 
+// Purpose:
+//   Get the pointer value and the index vector for a memory operation
+//   (GetElementPtr, Load, or Store).  If all indices of the given memory
+//   operation are constant, fold in constant indices in a chain of
+//   preceding GetElementPtr instructions (if any), and return the
+//   pointer value of the first instruction in the chain.
+//   All folded instructions are marked so no code is generated for them.
+//
+// Return values:
+//   Returns the pointer Value to use.
+//   Returns the resulting IndexVector in idxVec.
+//   Returns true/false in allConstantIndices if all indices are/aren't const.
+//---------------------------------------------------------------------------
+
+static Value*
+GetMemInstArgs(InstructionNode* memInstrNode,
+               vector<Value*>& idxVec,
+               bool& allConstantIndices)
+{
+  allConstantIndices = false;
+  Instruction* memInst = memInstrNode->getInstruction();
+  assert(idxVec.size() == 0 && "Need empty vector to return indices");
+
+  // If there is a GetElemPtr instruction to fold in to this instr,
+  // it must be in the left child for Load and GetElemPtr, and in the
+  // right child for Store instructions.
+  InstrTreeNode* ptrChild = (memInst->getOpcode() == Instruction::Store
+                             ? memInstrNode->rightChild()
+                             : memInstrNode->leftChild()); 
+  
+  // Default pointer is the one from the current instruction.
+  Value* ptrVal = ptrChild->getValue(); 
+
+  // Find the "last" GetElemPtr instruction: this one or the immediate child.
+  // There will be none if this is a load or a store from a scalar pointer.
+  InstructionNode* gepNode = NULL;
+  if (isa<GetElementPtrInst>(memInst))
+    gepNode = memInstrNode;
+  else if (isa<InstructionNode>(ptrChild) && isa<GetElementPtrInst>(ptrVal))
+    { // Child of load/store is a GEP and memInst is its only use.
+      // Use its indices and mark it as folded.
+      gepNode = cast<InstructionNode>(ptrChild);
+      gepNode->markFoldedIntoParent();
+    }
+
+  // If there are no indices, return the current pointer.
+  // Else extract the pointer from the GEP and fold the indices.
+  return gepNode ? GetGEPInstArgs(gepNode, idxVec, allConstantIndices)
+                 : ptrVal;
+}
+
 
 //************************ Internal Functions ******************************/
 
@@ -964,8 +1185,7 @@
           // offset.  (An extra leading zero offset, if any, can be ignored.)
           // Generate code sequence to compute address from index.
           // 
-          bool firstIdxIsZero =
-            (idxVec[0] == Constant::getNullValue(idxVec[0]->getType()));
+          bool firstIdxIsZero = IsZero(idxVec[0]);
           assert(idxVec.size() == 1U + firstIdxIsZero 
                  && "Array refs must be lowered before Instruction Selection");
 


Index: llvm/lib/Target/Sparc/SparcInternals.h
diff -u llvm/lib/Target/Sparc/SparcInternals.h:1.79 llvm/lib/Target/Sparc/SparcInternals.h:1.80
--- llvm/lib/Target/Sparc/SparcInternals.h:1.79	Wed Jan 15 15:14:32 2003
+++ llvm/lib/Target/Sparc/SparcInternals.h	Wed Jan 15 15:36:50 2003
@@ -742,4 +742,6 @@
   Pass* getEmitBytecodeToAsmPass(std::ostream &Out);
 };
 
+int64_t GetConstantValueAsSignedInt(const Value *V, bool &isValidConstant);
+
 #endif




From lattner at cs.uiuc.edu  Wed Jan 15 16:53:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed Jan 15 16:53:01 2003
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/PrologEpilogInserter.cpp
Message-ID: <200301152252.QAA04335@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/CodeGen:

PrologEpilogInserter.cpp updated: 1.5 -> 1.6

---
Log message:

* Insert prolog/epilog code before rewriting indexes
* Fix calculation of frame offsets when there is an offset.



---
Diffs of the changes:

Index: llvm/lib/CodeGen/PrologEpilogInserter.cpp
diff -u llvm/lib/CodeGen/PrologEpilogInserter.cpp:1.5 llvm/lib/CodeGen/PrologEpilogInserter.cpp:1.6
--- llvm/lib/CodeGen/PrologEpilogInserter.cpp:1.5	Tue Jan 14 15:58:41 2003
+++ llvm/lib/CodeGen/PrologEpilogInserter.cpp	Wed Jan 15 16:52:34 2003
@@ -41,13 +41,13 @@
       // Calculate actual frame offsets for all of the abstract stack objects...
       calculateFrameObjectOffsets(Fn);
 
+      // Add prolog and epilog code to the function.
+      insertPrologEpilogCode(Fn);
+
       // Replace all MO_FrameIndex operands with physical register references
       // and actual offsets.
       //
       replaceFrameIndices(Fn);
-
-      // Add prolog and epilog code to the function.
-      insertPrologEpilogCode(Fn);
       return true;
     }
 
@@ -187,7 +187,7 @@
   MachineFrameInfo *FFI = Fn.getFrameInfo();
 
   // Start at the beginning of the local area...
-  int Offset = -TFI.getOffsetOfLocalArea();
+  int Offset = TFI.getOffsetOfLocalArea();
   for (unsigned i = 0, e = FFI->getObjectIndexEnd(); i != e; ++i) {
     Offset += FFI->getObjectSize(i);         // Allocate Size bytes...
 
@@ -202,7 +202,25 @@
   Offset = (Offset+StackAlign-1)/StackAlign*StackAlign;
 
   // Set the final value of the stack pointer...
-  FFI->setStackSize(Offset);
+  FFI->setStackSize(Offset-TFI.getOffsetOfLocalArea());
+}
+
+
+/// insertPrologEpilogCode - Scan the function for modified caller saved
+/// registers, insert spill code for these caller saved registers, then add
+/// prolog and epilog code to the function.
+///
+void PEI::insertPrologEpilogCode(MachineFunction &Fn) {
+  // Add prologue to the function...
+  Fn.getTarget().getRegisterInfo()->emitPrologue(Fn);
+
+  // Add epilogue to restore the callee-save registers in each exiting block
+  const TargetInstrInfo &TII = Fn.getTarget().getInstrInfo();
+  for (MachineFunction::iterator I = Fn.begin(), E = Fn.end(); I != E; ++I) {
+    // If last instruction is a return instruction, add an epilogue
+    if (TII.isReturn(I->back()->getOpcode()))
+      Fn.getTarget().getRegisterInfo()->emitEpilogue(Fn, *I);
+  }
 }
 
 
@@ -225,22 +243,4 @@
 	  MRI.eliminateFrameIndex(Fn, I);
 	  break;
 	}
-}
-
-
-/// insertPrologEpilogCode - Scan the function for modified caller saved
-/// registers, insert spill code for these caller saved registers, then add
-/// prolog and epilog code to the function.
-///
-void PEI::insertPrologEpilogCode(MachineFunction &Fn) {
-  // Add prologue to the function...
-  Fn.getTarget().getRegisterInfo()->emitPrologue(Fn);
-
-  // Add epilogue to restore the callee-save registers in each exiting block
-  const TargetInstrInfo &TII = Fn.getTarget().getInstrInfo();
-  for (MachineFunction::iterator I = Fn.begin(), E = Fn.end(); I != E; ++I) {
-    // If last instruction is a return instruction, add an epilogue
-    if (TII.isReturn(I->back()->getOpcode()))
-      Fn.getTarget().getRegisterInfo()->emitEpilogue(Fn, *I);
-  }
 }




From lattner at cs.uiuc.edu  Wed Jan 15 16:58:00 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed Jan 15 16:58:00 2003
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86RegisterInfo.cpp
Message-ID: <200301152257.QAA04723@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Target/X86:

X86RegisterInfo.cpp updated: 1.28 -> 1.29

---
Log message:

Handle frame offset due to return address pushed on the stack


---
Diffs of the changes:

Index: llvm/lib/Target/X86/X86RegisterInfo.cpp
diff -u llvm/lib/Target/X86/X86RegisterInfo.cpp:1.28 llvm/lib/Target/X86/X86RegisterInfo.cpp:1.29
--- llvm/lib/Target/X86/X86RegisterInfo.cpp:1.28	Sun Jan 12 18:50:33 2003
+++ llvm/lib/Target/X86/X86RegisterInfo.cpp	Wed Jan 15 16:57:35 2003
@@ -138,11 +138,11 @@
 
   // Now add the frame object offset to the offset from EBP.
   int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex) +
-               MI.getOperand(i+3).getImmedValue();
+               MI.getOperand(i+3).getImmedValue()+4;
 
   if (!hasFP(MF) && hasSPAdjust(MF)) {
     const MachineFrameInfo *MFI = MF.getFrameInfo();
-    Offset += MFI->getStackSize() + MFI->getMaxCallFrameSize();
+    Offset += MFI->getStackSize();
   }
 
   MI.SetMachineOperandConst(i+3, MachineOperand::MO_SignExtendedImmed, Offset);
@@ -161,7 +161,7 @@
 void X86RegisterInfo::emitPrologue(MachineFunction &MF) const {
   MachineBasicBlock &MBB = MF.front();   // Prolog goes in entry BB
   MachineBasicBlock::iterator MBBI = MBB.begin();
-  const MachineFrameInfo *MFI = MF.getFrameInfo();
+  MachineFrameInfo *MFI = MF.getFrameInfo();
   MachineInstr *MI;
 
   // Get the number of bytes to allocate from the FrameInfo
@@ -169,7 +169,7 @@
   if (hasFP(MF)) {
     // Get the offset of the stack slot for the EBP register... which is
     // guaranteed to be the last slot by processFunctionBeforeFrameFinalized.
-    int EBPOffset = MFI->getObjectOffset(MFI->getObjectIndexEnd()-1);
+    int EBPOffset = MFI->getObjectOffset(MFI->getObjectIndexEnd()-1)+4;
 
     MI = addRegOffset(BuildMI(X86::MOVrm32, 5),    // mov [ESP-<offset>], EBP
 		      X86::ESP, EBPOffset).addReg(X86::EBP);
@@ -190,6 +190,9 @@
     // eliminates the need for add/sub ESP brackets around call sites.
     //
     NumBytes += MFI->getMaxCallFrameSize();
+
+    // Update frame info to pretend that this is part of the stack...
+    MFI->setStackSize(NumBytes);
   }
 
   if (NumBytes) {
@@ -210,7 +213,7 @@
   if (hasFP(MF)) {
     // Get the offset of the stack slot for the EBP register... which is
     // guaranteed to be the last slot by processFunctionBeforeFrameFinalized.
-    int EBPOffset = MFI->getObjectOffset(MFI->getObjectIndexEnd()-1);
+    int EBPOffset = MFI->getObjectOffset(MFI->getObjectIndexEnd()-1)+4;
     
     // mov ESP, EBP
     MI = BuildMI(X86::MOVrr32, 1,X86::ESP).addReg(X86::EBP);
@@ -224,7 +227,6 @@
 
     // Get the number of bytes allocated from the FrameInfo...
     unsigned NumBytes = MFI->getStackSize();
-    NumBytes += MFI->getMaxCallFrameSize();
 
     if (NumBytes) {    // adjust stack pointer back: ESP += numbytes
       MI =BuildMI(X86::ADDri32, 2, X86::ESP).addReg(X86::ESP).addZImm(NumBytes);




From lattner at cs.uiuc.edu  Wed Jan 15 20:21:00 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed Jan 15 20:21:00 2003
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/InstSelectSimple.cpp X86RegisterInfo.cpp X86TargetMachine.cpp
Message-ID: <200301160220.UAA05774@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Target/X86:

InstSelectSimple.cpp updated: 1.82 -> 1.83
X86RegisterInfo.cpp updated: 1.29 -> 1.30
X86TargetMachine.cpp updated: 1.12 -> 1.13

---
Log message:

Implement code to keep the stack pointer aligned to an 8 byte boundary.
This improves the performance of the power benchmark by a few percent.
This will be neccesary for SSE code, which requires 16 byte alignment of
the stack.


---
Diffs of the changes:

Index: llvm/lib/Target/X86/InstSelectSimple.cpp
diff -u llvm/lib/Target/X86/InstSelectSimple.cpp:1.82 llvm/lib/Target/X86/InstSelectSimple.cpp:1.83
--- llvm/lib/Target/X86/InstSelectSimple.cpp:1.82	Tue Jan 14 15:59:16 2003
+++ llvm/lib/Target/X86/InstSelectSimple.cpp	Wed Jan 15 20:20:12 2003
@@ -386,7 +386,7 @@
   // [ESP + 8] -- second argument, if first argument is four bytes in size
   //    ... 
   //
-  unsigned ArgOffset = 4;
+  unsigned ArgOffset = 0;   // Frame mechanisms handle retaddr slot
   MachineFrameInfo *MFI = F->getFrameInfo();
 
   for (Function::aiterator I = Fn.abegin(), E = Fn.aend(); I != E; ++I) {


Index: llvm/lib/Target/X86/X86RegisterInfo.cpp
diff -u llvm/lib/Target/X86/X86RegisterInfo.cpp:1.29 llvm/lib/Target/X86/X86RegisterInfo.cpp:1.30
--- llvm/lib/Target/X86/X86RegisterInfo.cpp:1.29	Wed Jan 15 16:57:35 2003
+++ llvm/lib/Target/X86/X86RegisterInfo.cpp	Wed Jan 15 20:20:12 2003
@@ -13,6 +13,8 @@
 #include "llvm/CodeGen/MachineInstrBuilder.h"
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/MachineFrameInfo.h"
+#include "llvm/Target/TargetMachine.h"
+#include "llvm/Target/TargetFrameInfo.h"
 #include "Support/CommandLine.h"
 
 namespace {
@@ -105,6 +107,12 @@
     // <amt>'
     unsigned Amount = Old->getOperand(0).getImmedValue();
     if (Amount != 0) {
+      // We need to keep the stack aligned properly.  To do this, we round the
+      // amount of space needed for the outgoing arguments up to the next
+      // alignment boundary.
+      unsigned Align = MF.getTarget().getFrameInfo().getStackAlignment();
+      Amount = (Amount+Align-1)/Align*Align;
+
       if (Old->getOpcode() == X86::ADJCALLSTACKDOWN) {
 	New=BuildMI(X86::SUBri32, 2, X86::ESP).addReg(X86::ESP).addZImm(Amount);
       } else {
@@ -190,6 +198,11 @@
     // eliminates the need for add/sub ESP brackets around call sites.
     //
     NumBytes += MFI->getMaxCallFrameSize();
+
+    // Round the size to a multiple of the alignment (don't forget the 4 byte
+    // offset though).
+    unsigned Align = MF.getTarget().getFrameInfo().getStackAlignment();
+    NumBytes = ((NumBytes+4)+Align-1)/Align*Align - 4;
 
     // Update frame info to pretend that this is part of the stack...
     MFI->setStackSize(NumBytes);


Index: llvm/lib/Target/X86/X86TargetMachine.cpp
diff -u llvm/lib/Target/X86/X86TargetMachine.cpp:1.12 llvm/lib/Target/X86/X86TargetMachine.cpp:1.13
--- llvm/lib/Target/X86/X86TargetMachine.cpp:1.12	Sun Jan 12 18:51:23 2003
+++ llvm/lib/Target/X86/X86TargetMachine.cpp	Wed Jan 15 20:20:12 2003
@@ -37,7 +37,7 @@
 		  1, 4, 
 		  (Config & TM::PtrSizeMask) == TM::PtrSize64 ? 8 : 4,
 		  (Config & TM::PtrSizeMask) == TM::PtrSize64 ? 8 : 4),
-  FrameInfo(TargetFrameInfo::StackGrowsDown, 1/*16*/, 0) {
+  FrameInfo(TargetFrameInfo::StackGrowsDown, 8/*16 for SSE*/, 4) {
 }
 
 /// addPassesToJITCompile - Add passes to the specified pass manager to




From lattner at cs.uiuc.edu  Wed Jan 15 20:23:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed Jan 15 20:23:01 2003
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/PrologEpilogInserter.cpp
Message-ID: <200301160222.UAA05842@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/CodeGen:

PrologEpilogInserter.cpp updated: 1.6 -> 1.7

---
Log message:

Add assertion


---
Diffs of the changes:

Index: llvm/lib/CodeGen/PrologEpilogInserter.cpp
diff -u llvm/lib/CodeGen/PrologEpilogInserter.cpp:1.6 llvm/lib/CodeGen/PrologEpilogInserter.cpp:1.7
--- llvm/lib/CodeGen/PrologEpilogInserter.cpp:1.6	Wed Jan 15 16:52:34 2003
+++ llvm/lib/CodeGen/PrologEpilogInserter.cpp	Wed Jan 15 20:22:08 2003
@@ -186,20 +186,23 @@
   // Loop over all of the stack objects, assigning sequential addresses...
   MachineFrameInfo *FFI = Fn.getFrameInfo();
 
+  unsigned StackAlign = TFI.getStackAlignment();
+
   // Start at the beginning of the local area...
   int Offset = TFI.getOffsetOfLocalArea();
   for (unsigned i = 0, e = FFI->getObjectIndexEnd(); i != e; ++i) {
     Offset += FFI->getObjectSize(i);         // Allocate Size bytes...
 
     unsigned Align = FFI->getObjectAlignment(i);
+    assert(Align < StackAlign && "Cannot align stack object to higher "
+           "alignment boundary than the stack itself!");
     Offset = (Offset+Align-1)/Align*Align;   // Adjust to Alignment boundary...
     
     FFI->setObjectOffset(i, -Offset);        // Set the computed offset
   }
 
   // Align the final stack pointer offset...
-  unsigned StackAlign = TFI.getStackAlignment();
-  Offset = (Offset+StackAlign-1)/StackAlign*StackAlign;
+  Offset = (Offset+StackAlignment-1)/StackAlignment*StackAlignment;
 
   // Set the final value of the stack pointer...
   FFI->setStackSize(Offset-TFI.getOffsetOfLocalArea());




From lattner at cs.uiuc.edu  Wed Jan 15 20:25:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed Jan 15 20:25:01 2003
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/PrologEpilogInserter.cpp
Message-ID: <200301160224.UAA06168@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/CodeGen:

PrologEpilogInserter.cpp updated: 1.7 -> 1.8

---
Log message:

Arg, fix bugs in previous checkin...


---
Diffs of the changes:

Index: llvm/lib/CodeGen/PrologEpilogInserter.cpp
diff -u llvm/lib/CodeGen/PrologEpilogInserter.cpp:1.7 llvm/lib/CodeGen/PrologEpilogInserter.cpp:1.8
--- llvm/lib/CodeGen/PrologEpilogInserter.cpp:1.7	Wed Jan 15 20:22:08 2003
+++ llvm/lib/CodeGen/PrologEpilogInserter.cpp	Wed Jan 15 20:24:20 2003
@@ -186,7 +186,7 @@
   // Loop over all of the stack objects, assigning sequential addresses...
   MachineFrameInfo *FFI = Fn.getFrameInfo();
 
-  unsigned StackAlign = TFI.getStackAlignment();
+  unsigned StackAlignment = TFI.getStackAlignment();
 
   // Start at the beginning of the local area...
   int Offset = TFI.getOffsetOfLocalArea();
@@ -194,7 +194,7 @@
     Offset += FFI->getObjectSize(i);         // Allocate Size bytes...
 
     unsigned Align = FFI->getObjectAlignment(i);
-    assert(Align < StackAlign && "Cannot align stack object to higher "
+    assert(Align <= StackAlignment && "Cannot align stack object to higher "
            "alignment boundary than the stack itself!");
     Offset = (Offset+Align-1)/Align*Align;   // Adjust to Alignment boundary...
     




From lattner at cs.uiuc.edu  Thu Jan 16 10:44:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu Jan 16 10:44:01 2003
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/InstSelectSimple.cpp
Message-ID: <200301161643.KAA07915@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Target/X86:

InstSelectSimple.cpp updated: 1.83 -> 1.84

---
Log message:

Implement optimization folding setcc into branch.


---
Diffs of the changes:

Index: llvm/lib/Target/X86/InstSelectSimple.cpp
diff -u llvm/lib/Target/X86/InstSelectSimple.cpp:1.83 llvm/lib/Target/X86/InstSelectSimple.cpp:1.84
--- llvm/lib/Target/X86/InstSelectSimple.cpp:1.83	Wed Jan 15 20:20:12 2003
+++ llvm/lib/Target/X86/InstSelectSimple.cpp	Thu Jan 16 10:43:00 2003
@@ -151,14 +151,9 @@
     void visitOr (BinaryOperator &B) { visitSimpleBinary(B, 3); }
     void visitXor(BinaryOperator &B) { visitSimpleBinary(B, 4); }
 
-    // Binary comparison operators
-    void visitSetCCInst(SetCondInst &I, unsigned OpNum);
-    void visitSetEQ(SetCondInst &I) { visitSetCCInst(I, 0); }
-    void visitSetNE(SetCondInst &I) { visitSetCCInst(I, 1); }
-    void visitSetLT(SetCondInst &I) { visitSetCCInst(I, 2); }
-    void visitSetGT(SetCondInst &I) { visitSetCCInst(I, 3); }
-    void visitSetLE(SetCondInst &I) { visitSetCCInst(I, 4); }
-    void visitSetGE(SetCondInst &I) { visitSetCCInst(I, 5); }
+    // Comparison operators...
+    void visitSetCondInst(SetCondInst &I);
+    bool EmitComparisonGetSignedness(unsigned OpNum, Value *Op0, Value *Op1);
 
     // Memory Instructions
     MachineInstr *doFPLoad(MachineBasicBlock *MBB,
@@ -482,31 +477,59 @@
   }
 }
 
+// canFoldSetCCIntoBranch - Return the setcc instruction if we can fold it into
+// the conditional branch instruction which is the only user of the cc
+// instruction.  This is the case if the conditional branch is the only user of
+// the setcc, and if the setcc is in the same basic block as the conditional
+// branch.  We also don't handle long arguments below, so we reject them here as
+// well.
+//
+static SetCondInst *canFoldSetCCIntoBranch(Value *V) {
+  if (SetCondInst *SCI = dyn_cast<SetCondInst>(V))
+    if (SCI->use_size() == 1 && isa<BranchInst>(SCI->use_back()) &&
+        SCI->getParent() == cast<BranchInst>(SCI->use_back())->getParent()) {
+      const Type *Ty = SCI->getOperand(0)->getType();
+      if (Ty != Type::LongTy && Ty != Type::ULongTy)
+        return SCI;
+    }
+  return 0;
+}
 
+// Return a fixed numbering for setcc instructions which does not depend on the
+// order of the opcodes.
+//
+static unsigned getSetCCNumber(unsigned Opcode) {
+  switch(Opcode) {
+  default: assert(0 && "Unknown setcc instruction!");
+  case Instruction::SetEQ: return 0;
+  case Instruction::SetNE: return 1;
+  case Instruction::SetLT: return 2;
+  case Instruction::SetGT: return 3;
+  case Instruction::SetLE: return 4;
+  case Instruction::SetGE: return 5;
+  }
+}
+
+// LLVM  -> X86 signed  X86 unsigned
+// -----    ----------  ------------
+// seteq -> sete        sete
+// setne -> setne       setne
+// setlt -> setl        setb
+// setgt -> setg        seta
+// setle -> setle       setbe
+// setge -> setge       setae
+static const unsigned SetCCOpcodeTab[2][6] = {
+  {X86::SETEr, X86::SETNEr, X86::SETBr, X86::SETAr, X86::SETBEr, X86::SETAEr},
+  {X86::SETEr, X86::SETNEr, X86::SETLr, X86::SETGr, X86::SETLEr, X86::SETGEr},
+};
+
+bool ISel::EmitComparisonGetSignedness(unsigned OpNum, Value *Op0, Value *Op1) {
 
-/// SetCC instructions - Here we just emit boilerplate code to set a byte-sized
-/// register, then move it to wherever the result should be. 
-///
-void ISel::visitSetCCInst(SetCondInst &I, unsigned OpNum) {
   // The arguments are already supposed to be of the same type.
-  const Type *CompTy = I.getOperand(0)->getType();
+  const Type *CompTy = Op0->getType();
   bool isSigned = CompTy->isSigned();
-  unsigned reg1 = getReg(I.getOperand(0));
-  unsigned reg2 = getReg(I.getOperand(1));
-  unsigned DestReg = getReg(I);
-
-  // LLVM  -> X86 signed  X86 unsigned
-  // -----    ----------  ------------
-  // seteq -> sete        sete
-  // setne -> setne       setne
-  // setlt -> setl        setb
-  // setgt -> setg        seta
-  // setle -> setle       setbe
-  // setge -> setge       setae
-  static const unsigned OpcodeTab[2][6] = {
-    {X86::SETEr, X86::SETNEr, X86::SETBr, X86::SETAr, X86::SETBEr, X86::SETAEr},
-    {X86::SETEr, X86::SETNEr, X86::SETLr, X86::SETGr, X86::SETLEr, X86::SETGEr},
-  };
+  unsigned reg1 = getReg(Op0);
+  unsigned reg2 = getReg(Op1);
 
   unsigned Class = getClassB(CompTy);
   switch (Class) {
@@ -549,21 +572,43 @@
       // dest = hi(op1) == hi(op2) ? AL : BL;
       //
 
-      // FIXME: This would be much better if we had heirarchical register
+      // FIXME: This would be much better if we had hierarchical register
       // classes!  Until then, hardcode registers so that we can deal with their
       // aliases (because we don't have conditional byte moves).
       //
       BuildMI(BB, X86::CMPrr32, 2).addReg(reg1).addReg(reg2);
-      BuildMI(BB, OpcodeTab[0][OpNum], 0, X86::AL);
+      BuildMI(BB, SetCCOpcodeTab[0][OpNum], 0, X86::AL);
       BuildMI(BB, X86::CMPrr32, 2).addReg(reg1+1).addReg(reg2+1);
-      BuildMI(BB, OpcodeTab[isSigned][OpNum], 0, X86::BL);
+      BuildMI(BB, SetCCOpcodeTab[isSigned][OpNum], 0, X86::BL);
       BuildMI(BB, X86::CMOVErr16, 2, X86::BX).addReg(X86::BX).addReg(X86::AX);
-      BuildMI(BB, X86::MOVrr8, 1, DestReg).addReg(X86::BL);
-      return;
+      // NOTE: visitSetCondInst knows that the value is dumped into the BL
+      // register at this point for long values...
+      return isSigned;
     }
   }
+  return isSigned;
+}
 
-  BuildMI(BB, OpcodeTab[isSigned][OpNum], 0, DestReg);
+
+/// SetCC instructions - Here we just emit boilerplate code to set a byte-sized
+/// register, then move it to wherever the result should be. 
+///
+void ISel::visitSetCondInst(SetCondInst &I) {
+  if (canFoldSetCCIntoBranch(&I)) return;  // Fold this into a branch...
+
+  unsigned OpNum = getSetCCNumber(I.getOpcode());
+  unsigned DestReg = getReg(I);
+  bool isSigned = EmitComparisonGetSignedness(OpNum, I.getOperand(0),
+                                              I.getOperand(1));
+
+  if (getClassB(I.getOperand(0)->getType()) != cLong || OpNum < 2) {
+    // Handle normal comparisons with a setcc instruction...
+    BuildMI(BB, SetCCOpcodeTab[isSigned][OpNum], 0, DestReg);
+  } else {
+    // Handle long comparisons by copying the value which is already in BL into
+    // the register we want...
+    BuildMI(BB, X86::MOVrr8, 1, DestReg).addReg(X86::BL);
+  }
 }
 
 /// promote32 - Emit instructions to turn a narrow operand into a 32-bit-wide
@@ -636,15 +681,45 @@
 /// visitBranchInst - Handle conditional and unconditional branches here.  Note
 /// that since code layout is frozen at this point, that if we are trying to
 /// jump to a block that is the immediate successor of the current block, we can
-/// just make a fall-through. (but we don't currently).
+/// just make a fall-through (but we don't currently).
 ///
 void ISel::visitBranchInst(BranchInst &BI) {
-  if (BI.isConditional()) {
+  if (!BI.isConditional()) {
+    BuildMI(BB, X86::JMP, 1).addPCDisp(BI.getSuccessor(0));
+    return;
+  }
+
+  // See if we can fold the setcc into the branch itself...
+  SetCondInst *SCI = canFoldSetCCIntoBranch(BI.getCondition());
+  if (SCI == 0) {
+    // Nope, cannot fold setcc into this branch.  Emit a branch on a condition
+    // computed some other way...
     unsigned condReg = getReg(BI.getCondition());
     BuildMI(BB, X86::CMPri8, 2).addReg(condReg).addZImm(0);
     BuildMI(BB, X86::JE, 1).addPCDisp(BI.getSuccessor(1));
+    BuildMI(BB, X86::JMP, 1).addPCDisp(BI.getSuccessor(0));
+    return;
   }
-  BuildMI(BB, X86::JMP, 1).addPCDisp(BI.getSuccessor(0));
+
+  unsigned OpNum = getSetCCNumber(SCI->getOpcode());
+  bool isSigned = EmitComparisonGetSignedness(OpNum, SCI->getOperand(0),
+                                              SCI->getOperand(1));
+  
+  // LLVM  -> X86 signed  X86 unsigned
+  // -----    ----------  ------------
+  // seteq -> je          je
+  // setne -> jne         jne
+  // setlt -> jl          jb
+  // setgt -> jg          ja
+  // setle -> jle         jbe
+  // setge -> jge         jae
+  static const unsigned OpcodeTab[2][6] = {
+    { X86::JE, X86::JNE, X86::JB, X86::JA, X86::JBE, X86::JAE },
+    { X86::JE, X86::JNE, X86::JL, X86::JG, X86::JLE, X86::JGE },
+  };
+  
+  BuildMI(BB, OpcodeTab[isSigned][OpNum], 1).addPCDisp(BI.getSuccessor(0));
+  BuildMI(BB, X86::JMP, 1).addPCDisp(BI.getSuccessor(1));
 }
 
 




From lattner at cs.uiuc.edu  Thu Jan 16 10:44:06 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu Jan 16 10:44:06 2003
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86InstrInfo.def
Message-ID: <200301161643.KAA07920@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Target/X86:

X86InstrInfo.def updated: 1.49 -> 1.50

---
Log message:

Add more flavors of branch instructions


---
Diffs of the changes:

Index: llvm/lib/Target/X86/X86InstrInfo.def
diff -u llvm/lib/Target/X86/X86InstrInfo.def:1.49 llvm/lib/Target/X86/X86InstrInfo.def:1.50
--- llvm/lib/Target/X86/X86InstrInfo.def:1.49	Tue Jan 14 15:59:16 2003
+++ llvm/lib/Target/X86/X86InstrInfo.def	Thu Jan 16 10:42:45 2003
@@ -81,9 +81,19 @@
 
 // Flow control instructions
 I(RET         , "ret",   0xC3,    M_RET_FLAG | M_TERMINATOR_FLAG, X86II::RawFrm | X86II::Void, NoIR, NoIR)             // ret
+
 I(JMP         , "jmp",   0xE9, M_BRANCH_FLAG | M_TERMINATOR_FLAG, X86II::RawFrm | X86II::Void, NoIR, NoIR)             // jmp foo
-I(JNE         , "jne",   0x85, M_BRANCH_FLAG | M_TERMINATOR_FLAG, X86II::RawFrm | X86II::TB | X86II::Void, NoIR, NoIR) // jne foo
+I(JB          , "jb" ,   0x82, M_BRANCH_FLAG | M_TERMINATOR_FLAG, X86II::RawFrm | X86II::TB | X86II::Void, NoIR, NoIR) // jne foo
+I(JAE         , "jae",   0x83, M_BRANCH_FLAG | M_TERMINATOR_FLAG, X86II::RawFrm | X86II::TB | X86II::Void, NoIR, NoIR) // jne foo
 I(JE          , "je",    0x84, M_BRANCH_FLAG | M_TERMINATOR_FLAG, X86II::RawFrm | X86II::TB | X86II::Void, NoIR, NoIR) // je foo
+I(JNE         , "jne",   0x85, M_BRANCH_FLAG | M_TERMINATOR_FLAG, X86II::RawFrm | X86II::TB | X86II::Void, NoIR, NoIR) // jne foo
+I(JBE         , "jbe",   0x86, M_BRANCH_FLAG | M_TERMINATOR_FLAG, X86II::RawFrm | X86II::TB | X86II::Void, NoIR, NoIR) // jne foo
+I(JA          , "ja" ,   0x87, M_BRANCH_FLAG | M_TERMINATOR_FLAG, X86II::RawFrm | X86II::TB | X86II::Void, NoIR, NoIR) // jne foo
+I(JL          , "jl" ,   0x8C, M_BRANCH_FLAG | M_TERMINATOR_FLAG, X86II::RawFrm | X86II::TB | X86II::Void, NoIR, NoIR) // jne foo
+I(JGE         , "jge",   0x8D, M_BRANCH_FLAG | M_TERMINATOR_FLAG, X86II::RawFrm | X86II::TB | X86II::Void, NoIR, NoIR) // jne foo
+I(JLE         , "jle",   0x8E, M_BRANCH_FLAG | M_TERMINATOR_FLAG, X86II::RawFrm | X86II::TB | X86II::Void, NoIR, NoIR) // jne foo
+I(JG          , "jg" ,   0x8F, M_BRANCH_FLAG | M_TERMINATOR_FLAG, X86II::RawFrm | X86II::TB | X86II::Void, NoIR, NoIR) // jne foo
+
 I(CALLpcrel32 , "call",  0xE8,   M_CALL_FLAG, X86II::Void | X86II::RawFrm, NoIR, C_CLOBBER)        // call pc+42
 I(CALLr32     , "call",  0xFF,   M_CALL_FLAG, X86II::Void | X86II::MRMS2r | X86II::Arg32,
                                               NoIR, C_CLOBBER)                                     // call [r32]




From lattner at cs.uiuc.edu  Thu Jan 16 11:50:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu Jan 16 11:50:01 2003
Subject: [llvm-commits] CVS: llvm/test/Programs/SingleSource/UnitTests/2002-05-02-ManyArguments.c
Message-ID: <200301161749.LAA10571@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Programs/SingleSource/UnitTests:

2002-05-02-ManyArguments.c updated: 1.2 -> 1.3

---
Log message:

Fix bug in testcase


---
Diffs of the changes:

Index: llvm/test/Programs/SingleSource/UnitTests/2002-05-02-ManyArguments.c
diff -u llvm/test/Programs/SingleSource/UnitTests/2002-05-02-ManyArguments.c:1.2 llvm/test/Programs/SingleSource/UnitTests/2002-05-02-ManyArguments.c:1.3
--- llvm/test/Programs/SingleSource/UnitTests/2002-05-02-ManyArguments.c:1.2	Fri Aug  2 17:19:28 2002
+++ llvm/test/Programs/SingleSource/UnitTests/2002-05-02-ManyArguments.c	Thu Jan 16 11:49:31 2003
@@ -3,7 +3,7 @@
 
 void printfn(int a, short b, double C, float D, signed char E, char F, void *G, double *H, int I, long long J) {
 	printf("%d, %d, %f, %f, %d\n", a, b, C, D, E);
-	printf("%d, 0x%p, 0x%p, %d, %ld\n", F, G, H, I, J);
+	printf("%d, 0x%p, 0x%p, %d, %lld\n", F, G, H, I, J);
 }
 
 int main() {




From lattner at cs.uiuc.edu  Thu Jan 16 12:07:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu Jan 16 12:07:01 2003
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/PHIElimination.cpp PrologEpilogInserter.cpp RegAllocLocal.cpp
Message-ID: <200301161806.MAA10872@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/CodeGen:

PHIElimination.cpp updated: 1.2 -> 1.3
PrologEpilogInserter.cpp updated: 1.8 -> 1.9
RegAllocLocal.cpp updated: 1.12 -> 1.13

---
Log message:

Fix problems with empty basic blocks


---
Diffs of the changes:

Index: llvm/lib/CodeGen/PHIElimination.cpp
diff -u llvm/lib/CodeGen/PHIElimination.cpp:1.2 llvm/lib/CodeGen/PHIElimination.cpp:1.3
--- llvm/lib/CodeGen/PHIElimination.cpp:1.2	Tue Jan 14 15:58:41 2003
+++ llvm/lib/CodeGen/PHIElimination.cpp	Thu Jan 16 12:06:43 2003
@@ -50,7 +50,7 @@
 /// predecessor basic blocks.
 ///
 bool PNE::EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB) {
-  if (MBB.front()->getOpcode() != TargetInstrInfo::PHI)
+  if (MBB.empty() || MBB.front()->getOpcode() != TargetInstrInfo::PHI)
     return false;   // Quick exit for normal case...
 
   LiveVariables *LV = getAnalysisToUpdate<LiveVariables>();
@@ -76,7 +76,8 @@
     // into the phi node destination.
     //
     MachineBasicBlock::iterator AfterPHIsIt = MBB.begin();
-    while ((*AfterPHIsIt)->getOpcode() == TargetInstrInfo::PHI) ++AfterPHIsIt;
+    if (AfterPHIsIt != MBB.end())
+      while ((*AfterPHIsIt)->getOpcode() == TargetInstrInfo::PHI) ++AfterPHIsIt;
     RegInfo->copyRegToReg(MBB, AfterPHIsIt, DestReg, IncomingReg, RC);
 
     // Add information to LiveVariables to know that the incoming value is dead
@@ -108,16 +109,19 @@
         }
 
       if (HaveNotEmitted) {
-        MachineBasicBlock::iterator I = opBlock.end()-1;
-        
-        // must backtrack over ALL the branches in the previous block
-        while (MII.isTerminatorInstr((*I)->getOpcode()) && I != opBlock.begin())
+        MachineBasicBlock::iterator I = opBlock.end();
+        if (I != opBlock.begin()) {  // Handle empty blocks
           --I;
+          // must backtrack over ALL the branches in the previous block
+          while (MII.isTerminatorInstr((*I)->getOpcode()) &&
+                 I != opBlock.begin())
+            --I;
         
-        // move back to the first branch instruction so new instructions
-        // are inserted right in front of it and not in front of a non-branch
-        if (!MII.isTerminatorInstr((*I)->getOpcode()))
-          ++I;
+          // move back to the first branch instruction so new instructions
+          // are inserted right in front of it and not in front of a non-branch
+          if (!MII.isTerminatorInstr((*I)->getOpcode()))
+            ++I;
+        }
 
 	assert(opVal.isVirtualRegister() &&
 	       "Machine PHI Operands must all be virtual registers!");


Index: llvm/lib/CodeGen/PrologEpilogInserter.cpp
diff -u llvm/lib/CodeGen/PrologEpilogInserter.cpp:1.8 llvm/lib/CodeGen/PrologEpilogInserter.cpp:1.9
--- llvm/lib/CodeGen/PrologEpilogInserter.cpp:1.8	Wed Jan 15 20:24:20 2003
+++ llvm/lib/CodeGen/PrologEpilogInserter.cpp	Thu Jan 16 12:06:43 2003
@@ -221,7 +221,7 @@
   const TargetInstrInfo &TII = Fn.getTarget().getInstrInfo();
   for (MachineFunction::iterator I = Fn.begin(), E = Fn.end(); I != E; ++I) {
     // If last instruction is a return instruction, add an epilogue
-    if (TII.isReturn(I->back()->getOpcode()))
+    if (!I->empty() && TII.isReturn(I->back()->getOpcode()))
       Fn.getTarget().getRegisterInfo()->emitEpilogue(Fn, *I);
   }
 }


Index: llvm/lib/CodeGen/RegAllocLocal.cpp
diff -u llvm/lib/CodeGen/RegAllocLocal.cpp:1.12 llvm/lib/CodeGen/RegAllocLocal.cpp:1.13
--- llvm/lib/CodeGen/RegAllocLocal.cpp:1.12	Tue Jan 14 15:58:41 2003
+++ llvm/lib/CodeGen/RegAllocLocal.cpp	Thu Jan 16 12:06:43 2003
@@ -572,7 +572,7 @@
 
   // Rewind the iterator to point to the first flow control instruction...
   const TargetInstrInfo &TII = TM->getInstrInfo();
-  I = MBB.end()-1;
+  I = MBB.end();
   while (I != MBB.begin() && TII.isTerminatorInstr((*(I-1))->getOpcode()))
     --I;
 




From lattner at cs.uiuc.edu  Thu Jan 16 12:08:00 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu Jan 16 12:08:00 2003
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/PeepholeOptimizer.cpp
Message-ID: <200301161807.MAA10887@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Target/X86:

PeepholeOptimizer.cpp updated: 1.1 -> 1.2

---
Log message:

Fix problem with invalidated iterator


---
Diffs of the changes:

Index: llvm/lib/Target/X86/PeepholeOptimizer.cpp
diff -u llvm/lib/Target/X86/PeepholeOptimizer.cpp:1.1 llvm/lib/Target/X86/PeepholeOptimizer.cpp:1.2
--- llvm/lib/Target/X86/PeepholeOptimizer.cpp:1.1	Sun Jan 12 19:01:59 2003
+++ llvm/lib/Target/X86/PeepholeOptimizer.cpp	Thu Jan 16 12:07:13 2003
@@ -25,7 +25,7 @@
   bool Changed = false;
 
   for (MachineFunction::iterator BI = MF.begin(), E = MF.end(); BI != E; ++BI)
-    for (MachineBasicBlock::iterator I = BI->begin(), E = BI->end(); I != E; )
+    for (MachineBasicBlock::iterator I = BI->begin(); I != BI->end(); )
       if (PeepholeOptimize(*BI, I))
 	Changed = true;
       else




From lattner at cs.uiuc.edu  Thu Jan 16 12:08:04 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu Jan 16 12:08:04 2003
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/InstSelectSimple.cpp
Message-ID: <200301161807.MAA10895@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Target/X86:

InstSelectSimple.cpp updated: 1.84 -> 1.85

---
Log message:

Don't emit unneccesary branch instructions!


---
Diffs of the changes:

Index: llvm/lib/Target/X86/InstSelectSimple.cpp
diff -u llvm/lib/Target/X86/InstSelectSimple.cpp:1.84 llvm/lib/Target/X86/InstSelectSimple.cpp:1.85
--- llvm/lib/Target/X86/InstSelectSimple.cpp:1.84	Thu Jan 16 10:43:00 2003
+++ llvm/lib/Target/X86/InstSelectSimple.cpp	Thu Jan 16 12:07:23 2003
@@ -504,9 +504,9 @@
   case Instruction::SetEQ: return 0;
   case Instruction::SetNE: return 1;
   case Instruction::SetLT: return 2;
-  case Instruction::SetGT: return 3;
-  case Instruction::SetLE: return 4;
-  case Instruction::SetGE: return 5;
+  case Instruction::SetGE: return 3;
+  case Instruction::SetGT: return 4;
+  case Instruction::SetLE: return 5;
   }
 }
 
@@ -515,12 +515,12 @@
 // seteq -> sete        sete
 // setne -> setne       setne
 // setlt -> setl        setb
+// setge -> setge       setae
 // setgt -> setg        seta
 // setle -> setle       setbe
-// setge -> setge       setae
 static const unsigned SetCCOpcodeTab[2][6] = {
-  {X86::SETEr, X86::SETNEr, X86::SETBr, X86::SETAr, X86::SETBEr, X86::SETAEr},
-  {X86::SETEr, X86::SETNEr, X86::SETLr, X86::SETGr, X86::SETLEr, X86::SETGEr},
+  {X86::SETEr, X86::SETNEr, X86::SETBr, X86::SETAEr, X86::SETAr, X86::SETBEr},
+  {X86::SETEr, X86::SETNEr, X86::SETLr, X86::SETGEr, X86::SETGr, X86::SETLEr},
 };
 
 bool ISel::EmitComparisonGetSignedness(unsigned OpNum, Value *Op0, Value *Op1) {
@@ -678,14 +678,24 @@
   BuildMI(BB, X86::RET, 0);
 }
 
+// getBlockAfter - Return the basic block which occurs lexically after the
+// specified one.
+static inline BasicBlock *getBlockAfter(BasicBlock *BB) {
+  Function::iterator I = BB; ++I;  // Get iterator to next block
+  return I != BB->getParent()->end() ? &*I : 0;
+}
+
 /// visitBranchInst - Handle conditional and unconditional branches here.  Note
 /// that since code layout is frozen at this point, that if we are trying to
 /// jump to a block that is the immediate successor of the current block, we can
 /// just make a fall-through (but we don't currently).
 ///
 void ISel::visitBranchInst(BranchInst &BI) {
-  if (!BI.isConditional()) {
-    BuildMI(BB, X86::JMP, 1).addPCDisp(BI.getSuccessor(0));
+  BasicBlock *NextBB = getBlockAfter(BI.getParent());  // BB after current one
+
+  if (!BI.isConditional()) {  // Unconditional branch?
+    if (BI.getSuccessor(0) != NextBB)
+      BuildMI(BB, X86::JMP, 1).addPCDisp(BI.getSuccessor(0));
     return;
   }
 
@@ -696,8 +706,15 @@
     // computed some other way...
     unsigned condReg = getReg(BI.getCondition());
     BuildMI(BB, X86::CMPri8, 2).addReg(condReg).addZImm(0);
-    BuildMI(BB, X86::JE, 1).addPCDisp(BI.getSuccessor(1));
-    BuildMI(BB, X86::JMP, 1).addPCDisp(BI.getSuccessor(0));
+    if (BI.getSuccessor(1) == NextBB) {
+      if (BI.getSuccessor(0) != NextBB)
+        BuildMI(BB, X86::JNE, 1).addPCDisp(BI.getSuccessor(0));
+    } else {
+      BuildMI(BB, X86::JE, 1).addPCDisp(BI.getSuccessor(1));
+      
+      if (BI.getSuccessor(0) != NextBB)
+        BuildMI(BB, X86::JMP, 1).addPCDisp(BI.getSuccessor(0));
+    }
     return;
   }
 
@@ -710,16 +727,25 @@
   // seteq -> je          je
   // setne -> jne         jne
   // setlt -> jl          jb
+  // setge -> jge         jae
   // setgt -> jg          ja
   // setle -> jle         jbe
-  // setge -> jge         jae
   static const unsigned OpcodeTab[2][6] = {
-    { X86::JE, X86::JNE, X86::JB, X86::JA, X86::JBE, X86::JAE },
-    { X86::JE, X86::JNE, X86::JL, X86::JG, X86::JLE, X86::JGE },
+    { X86::JE, X86::JNE, X86::JB, X86::JAE, X86::JA, X86::JBE },
+    { X86::JE, X86::JNE, X86::JL, X86::JGE, X86::JG, X86::JLE },
   };
   
-  BuildMI(BB, OpcodeTab[isSigned][OpNum], 1).addPCDisp(BI.getSuccessor(0));
-  BuildMI(BB, X86::JMP, 1).addPCDisp(BI.getSuccessor(1));
+  if (BI.getSuccessor(0) != NextBB) {
+    BuildMI(BB, OpcodeTab[isSigned][OpNum], 1).addPCDisp(BI.getSuccessor(0));
+    if (BI.getSuccessor(1) != NextBB)
+      BuildMI(BB, X86::JMP, 1).addPCDisp(BI.getSuccessor(1));
+  } else {
+    // Change to the inverse condition...
+    if (BI.getSuccessor(1) != NextBB) {
+      OpNum ^= 1;
+      BuildMI(BB, OpcodeTab[isSigned][OpNum], 1).addPCDisp(BI.getSuccessor(1));
+    }
+  }
 }
 
 




From lattner at cs.uiuc.edu  Thu Jan 16 12:37:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu Jan 16 12:37:01 2003
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/MachineFunction.cpp
Message-ID: <200301161836.MAA11363@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/CodeGen:

MachineFunction.cpp updated: 1.37 -> 1.38

---
Log message:

Print machine frame objects with the frame offset intrinsic to the machine


---
Diffs of the changes:

Index: llvm/lib/CodeGen/MachineFunction.cpp
diff -u llvm/lib/CodeGen/MachineFunction.cpp:1.37 llvm/lib/CodeGen/MachineFunction.cpp:1.38
--- llvm/lib/CodeGen/MachineFunction.cpp:1.37	Sun Jan 12 18:23:03 2003
+++ llvm/lib/CodeGen/MachineFunction.cpp	Thu Jan 16 12:35:56 2003
@@ -120,7 +120,7 @@
      << "\"\n";
 
   // Print Frame Information
-  getFrameInfo()->print(OS);
+  getFrameInfo()->print(*this, OS);
 
   // Print Constant Pool
   getConstantPool()->print(OS);
@@ -188,7 +188,9 @@
 }
 
 
-void MachineFrameInfo::print(std::ostream &OS) const {
+void MachineFrameInfo::print(const MachineFunction &MF, std::ostream &OS) const{
+  int ValOffset = MF.getTarget().getFrameInfo().getOffsetOfLocalArea();
+
   for (unsigned i = 0, e = Objects.size(); i != e; ++i) {
     const StackObject &SO = Objects[i];
     OS << "  <fi #" << (int)(i-NumFixedObjects) << "> is ";
@@ -200,11 +202,12 @@
     if (i < NumFixedObjects)
       OS << " fixed";
     if (i < NumFixedObjects || SO.SPOffset != -1) {
+      int Off = SO.SPOffset + ValOffset;
       OS << " at location [SP";
-      if (SO.SPOffset > 0)
-	OS << "+" << SO.SPOffset;
-      else if (SO.SPOffset < 0)
-	OS << SO.SPOffset;
+      if (Off > 0)
+	OS << "+" << Off;
+      else if (Off < 0)
+	OS << Off;
       OS << "]";
     }
     OS << "\n";
@@ -214,7 +217,9 @@
     OS << "  Stack frame contains variable sized objects\n";
 }
 
-void MachineFrameInfo::dump() const { print(std::cerr); }
+void MachineFrameInfo::dump(const MachineFunction &MF) const {
+  print(MF, std::cerr);
+}
 
 
 //===----------------------------------------------------------------------===//




From lattner at cs.uiuc.edu  Thu Jan 16 12:37:05 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu Jan 16 12:37:05 2003
Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineFrameInfo.h
Message-ID: <200301161836.MAA11370@apoc.cs.uiuc.edu>


Changes in directory llvm/include/llvm/CodeGen:

MachineFrameInfo.h updated: 1.3 -> 1.4

---
Log message:

Print machine frame objects with the frame offset intrinsic to the machine



---
Diffs of the changes:

Index: llvm/include/llvm/CodeGen/MachineFrameInfo.h
diff -u llvm/include/llvm/CodeGen/MachineFrameInfo.h:1.3 llvm/include/llvm/CodeGen/MachineFrameInfo.h:1.4
--- llvm/include/llvm/CodeGen/MachineFrameInfo.h:1.3	Sun Jan 12 18:15:24 2003
+++ llvm/include/llvm/CodeGen/MachineFrameInfo.h	Thu Jan 16 12:35:57 2003
@@ -33,6 +33,7 @@
 
 class TargetData;
 class TargetRegisterClass;
+class MachineFunction;
 #include <vector>
 
 class MachineFrameInfo {
@@ -205,10 +206,10 @@
   /// print - Used by the MachineFunction printer to print information about
   /// stack objects.  Implemented in MachineFunction.cpp
   ///
-  void print(std::ostream &OS) const;
+  void print(const MachineFunction &MF, std::ostream &OS) const;
 
-  /// dump - Call print(std::cerr) to be called from the debugger.
-  void dump() const;
+  /// dump - Call print(MF, std::cerr) to be called from the debugger.
+  void dump(const MachineFunction &MF) const;
 };
 
 #endif




From lattner at cs.uiuc.edu  Thu Jan 16 13:44:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu Jan 16 13:44:01 2003
Subject: [llvm-commits] CVS: llvm/test/Regression/Jello/test-cast.ll
Message-ID: <200301161943.NAA18250@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Regression/Jello:

test-cast.ll updated: 1.2 -> 1.3

---
Log message:

Add more testcases


---
Diffs of the changes:

Index: llvm/test/Regression/Jello/test-cast.ll
diff -u llvm/test/Regression/Jello/test-cast.ll:1.2 llvm/test/Regression/Jello/test-cast.ll:1.3
--- llvm/test/Regression/Jello/test-cast.ll:1.2	Sun Jan 12 18:56:37 2003
+++ llvm/test/Regression/Jello/test-cast.ll	Thu Jan 16 13:43:11 2003
@@ -7,6 +7,10 @@
   ; cast bool to ...
   cast bool true to bool
   cast bool true to int
+  cast bool true to long
+  cast bool true to ulong
+  cast bool true to float
+  cast bool true to double
 
   ; cast sbyte to ...
   cast sbyte 0 to sbyte
@@ -46,10 +50,12 @@
   cast long 0 to double
   
   ; cast float to ...
+  ;cast float 0.0 to bool
   cast float 0.0 to float
   cast float 0.0 to double
 
   ; cast double to ...
+  ;cast double 0.0 to bool
   cast double 0.0 to sbyte
   cast double 0.0 to ubyte
   cast double 0.0 to short




From lattner at cs.uiuc.edu  Thu Jan 16 13:55:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu Jan 16 13:55:01 2003
Subject: [llvm-commits] CVS: llvm/test/Programs/Makefile
Message-ID: <200301161954.NAA18296@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Programs:

Makefile updated: 1.4 -> 1.5

---
Log message:

Build stuff in parallel


---
Diffs of the changes:

Index: llvm/test/Programs/Makefile
diff -u llvm/test/Programs/Makefile:1.4 llvm/test/Programs/Makefile:1.5
--- llvm/test/Programs/Makefile:1.4	Sat Oct 12 19:46:21 2002
+++ llvm/test/Programs/Makefile	Thu Jan 16 13:54:39 2003
@@ -1,4 +1,4 @@
 LEVEL = ../..
-DIRS  = SingleSource MultiSource
+PARALLEL_DIRS  = SingleSource MultiSource
 
 include ${LEVEL}/test/Makefile.tests




From lattner at cs.uiuc.edu  Thu Jan 16 13:55:05 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu Jan 16 13:55:05 2003
Subject: [llvm-commits] CVS: llvm/test/Programs/SingleSource/Makefile
Message-ID: <200301161954.NAA18303@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Programs/SingleSource:

Makefile updated: 1.3 -> 1.4

---
Log message:

Build stuff in parallel



---
Diffs of the changes:

Index: llvm/test/Programs/SingleSource/Makefile
diff -u llvm/test/Programs/SingleSource/Makefile:1.3 llvm/test/Programs/SingleSource/Makefile:1.4
--- llvm/test/Programs/SingleSource/Makefile:1.3	Mon Nov  4 13:57:36 2002
+++ llvm/test/Programs/SingleSource/Makefile	Thu Jan 16 13:54:41 2003
@@ -1,4 +1,4 @@
 LEVEL = ../../..
-DIRS  = UnitTests Shootout Ptrdist-anagram
+PARALLEL_DIRS  = UnitTests Shootout Ptrdist-anagram
 
 include Makefile.singlesrc




From lattner at cs.uiuc.edu  Thu Jan 16 14:03:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu Jan 16 14:03:01 2003
Subject: [llvm-commits] CVS: llvm/Makefile.common
Message-ID: <200301162002.OAA18599@apoc.cs.uiuc.edu>


Changes in directory llvm:

Makefile.common updated: 1.70 -> 1.71

---
Log message:

Add support for a recursive test target


---
Diffs of the changes:

Index: llvm/Makefile.common
diff -u llvm/Makefile.common:1.70 llvm/Makefile.common:1.71
--- llvm/Makefile.common:1.70	Sun Dec 15 19:31:18 2002
+++ llvm/Makefile.common	Thu Jan 16 14:02:30 2003
@@ -215,7 +215,7 @@
 #---------------------------------------------------------
 
 ifdef DIRS
-all install clean ::
+all install clean test ::
 	$(VERB) for dir in ${DIRS}; do \
 		(cd $$dir; $(MAKE) $@) || exit 1; \
 	done
@@ -226,8 +226,9 @@
 all     :: $(addsuffix /.makeall    , $(PARALLEL_DIRS))
 install :: $(addsuffix /.makeinstall, $(PARALLEL_DIRS))
 clean   :: $(addsuffix /.makeclean  , $(PARALLEL_DIRS))
+test    :: $(addsuffix /.maketest   , $(PARALLEL_DIRS))
 
-%/.makeall %/.makeinstall %/.makeclean:
+%/.makeall %/.makeinstall %/.makeclean %/.maketest:
 	$(VERB) cd $(@D); $(MAKE) $(subst $(@D)/.make,,$@)
 
 endif




From lattner at cs.uiuc.edu  Thu Jan 16 14:27:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu Jan 16 14:27:01 2003
Subject: [llvm-commits] CVS: llvm/test/Makefile.tests
Message-ID: <200301162026.OAA19744@apoc.cs.uiuc.edu>


Changes in directory llvm/test:

Makefile.tests updated: 1.51 -> 1.52

---
Log message:

Add support for make TEST=foo


---
Diffs of the changes:

Index: llvm/test/Makefile.tests
diff -u llvm/test/Makefile.tests:1.51 llvm/test/Makefile.tests:1.52
--- llvm/test/Makefile.tests:1.51	Mon Dec 23 17:47:20 2002
+++ llvm/test/Makefile.tests	Thu Jan 16 14:26:29 2003
@@ -5,6 +5,14 @@
 
 ## NOTE: This is preliminary and will change in the future
 
+# If the user specified a TEST= option on the command line, we do not want to do
+# the default testing type.  Instead, we change the default target to be the
+# test:: target.
+#
+ifdef TEST
+test::
+endif
+
 include ${LEVEL}/Makefile.common
 
 # Specify ENABLE_STATS on the command line to enable -stats output from gccas




From lattner at cs.uiuc.edu  Thu Jan 16 14:28:00 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu Jan 16 14:28:00 2003
Subject: [llvm-commits] CVS: llvm/test/Programs/Makefile.programs
Message-ID: <200301162027.OAA19756@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Programs:

Makefile.programs updated: 1.21 -> 1.22

---
Log message:

Implement support for 'make TEST=foo'


---
Diffs of the changes:

Index: llvm/test/Programs/Makefile.programs
diff -u llvm/test/Programs/Makefile.programs:1.21 llvm/test/Programs/Makefile.programs:1.22
--- llvm/test/Programs/Makefile.programs:1.21	Sun Jan 12 18:53:13 2003
+++ llvm/test/Programs/Makefile.programs	Thu Jan 16 14:27:30 2003
@@ -150,3 +150,28 @@
 Output/%.diff-cbe: Output/%.out-nat Output/%.out-cbe
 	$(DIFFPROG) cbe $(subst Output/,,$(@:.diff-cbe=))
 
+# Support for the TEST= option... when TEST= is specified on the command line,
+# the default target is the test target.  Here we dispatch to a specific set of
+# tests.
+#
+test:: $(addprefix test.$(TEST).,$(PROGRAMS_TO_TEST))
+
+# If they just say 'make test' then we print out an error telling the user to
+# specify a TEST= option.
+test..%:
+	@echo "***************************************************************"
+	@echo "ERROR: you cannot type '$(MAKE) test' directly."
+	@echo "Instead, use '$(MAKE) TEST=foo' where foo is the name of a test."
+	@echo "Tests should be defined in llvm/test/Programs/Makefile.TEST.*."
+	@echo "Alternatively, just use '$(MAKE)' to run comparisons."
+	@echo "***************************************************************"
+	@echo
+	@exit 1
+
+# Include all makefiles which define tests... These makefiles must define
+# test.<testname>.%  given input from Output/%.llvm.bc
+#
+TestMakefiles := $(wildcard $(LEVEL)/test/Programs/Makefile.TEST.*)
+ifneq ($(TestMakefiles),)
+-include $(TestMakefiles)
+endif




From lattner at cs.uiuc.edu  Thu Jan 16 14:40:03 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu Jan 16 14:40:03 2003
Subject: [llvm-commits] CVS: llvm/test/Programs/Makefile.TEST.example
Message-ID: <200301162039.OAA21974@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Programs:

Makefile.TEST.example added (r1.1)

---
Log message:

New example custom test


---
Diffs of the changes:



From lattner at cs.uiuc.edu  Thu Jan 16 14:40:07 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu Jan 16 14:40:07 2003
Subject: [llvm-commits] CVS: llvm/test/Programs/Makefile.programs
Message-ID: <200301162039.OAA21983@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Programs:

Makefile.programs updated: 1.22 -> 1.23

---
Log message:

Add more documentation


---
Diffs of the changes:

Index: llvm/test/Programs/Makefile.programs
diff -u llvm/test/Programs/Makefile.programs:1.22 llvm/test/Programs/Makefile.programs:1.23
--- llvm/test/Programs/Makefile.programs:1.22	Thu Jan 16 14:27:30 2003
+++ llvm/test/Programs/Makefile.programs	Thu Jan 16 14:39:36 2003
@@ -1,9 +1,9 @@
-#===-----------------------------------------------------------*-Makefile-*-===#
-#                        test/Programs/Makefile.programs
+##===- test/Programs/Makefile.programs ---------------------*- Makefile -*-===##
 #
 # This makefile contains all of the makefile machinery that is common to
-# building stuff in the Programs directory.  The main job of this is to take
-# executables for the following targets:
+# building stuff in the Programs directory.  This script can be used in two
+# different ways.  The main job of this is to take executables for the following
+# targets:
 #
 #   1. The native platform compiler
 #   2. LLVM Bytecode Compiler + LLI interpreter (if ENABLE_LLI is enabled)
@@ -12,19 +12,29 @@
 #   5. LLVM Bytecode Compiler + LLI Just-In-Time Compiler
 #
 # Running them, and then diffing the output.  If there are any failures, they
-# are flagged.
+# are flagged.  The other mode is used in conjunction with the TEST=<testname>
+# argument on the make command line.  In this case, a Makefile.TEST.<testname>
+# makefile is used to run tests on the program (see below).
 #
 # Input to this makefile should be the PROGRAMS_TO_TEST variable, which contains
 # a list of programs that should be run.  The makefile can also optionally
 # specify a INPUT_FILENAME variable, which contains a filename that is piped
 # into the program as it is being executed.
 #
-# If the user of this script specified 'make ENABLE_LLI=1', then the program is
-# interpreted with LLI and diff'd as well.
-#
 #  FIXME: There should be a way to specify the command line for a program
 #
-#-------------------------------------------------------------------------------
+##===----------------------------------------------------------------------===##
+#
+#                            Running Custom Tests
+#
+# This makefile provides facilities for defining custom tests that are to be run
+# on all of the programs in the test suite.  In order to define one of these
+# tests, create a llvm/test/Programs/Makefile.TEST.<testname> file.  This file
+# should define a rule 'test.<testname>.%' which is run once for each program in
+# the suite (the % passed in is the program name).  For a simple example, see
+# Makefile.TEST.example.
+#
+##===----------------------------------------------------------------------===##
 
 # Dependencies on header files need to be determined explicitly because
 # we do not automatically compute dependencies




From lattner at cs.uiuc.edu  Thu Jan 16 14:48:00 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu Jan 16 14:48:00 2003
Subject: [llvm-commits] CVS: llvm/test/Programs/Makefile.programs
Message-ID: <200301162047.OAA22301@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Programs:

Makefile.programs updated: 1.23 -> 1.24

---
Log message:

Only include makefiles for tests being performed


---
Diffs of the changes:

Index: llvm/test/Programs/Makefile.programs
diff -u llvm/test/Programs/Makefile.programs:1.23 llvm/test/Programs/Makefile.programs:1.24
--- llvm/test/Programs/Makefile.programs:1.23	Thu Jan 16 14:39:36 2003
+++ llvm/test/Programs/Makefile.programs	Thu Jan 16 14:47:13 2003
@@ -181,7 +181,9 @@
 # Include all makefiles which define tests... These makefiles must define
 # test.<testname>.%  given input from Output/%.llvm.bc
 #
-TestMakefiles := $(wildcard $(LEVEL)/test/Programs/Makefile.TEST.*)
+ifdef TEST
+TestMakefiles := $(wildcard $(LEVEL)/test/Programs/Makefile.TEST.$(TEST)*)
 ifneq ($(TestMakefiles),)
 -include $(TestMakefiles)
+endif
 endif




From lattner at cs.uiuc.edu  Thu Jan 16 14:56:00 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu Jan 16 14:56:00 2003
Subject: [llvm-commits] CVS: llvm/test/Programs/Makefile.programs
Message-ID: <200301162055.OAA22621@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Programs:

Makefile.programs updated: 1.24 -> 1.25

---
Log message:

Further refinement to be useful


---
Diffs of the changes:

Index: llvm/test/Programs/Makefile.programs
diff -u llvm/test/Programs/Makefile.programs:1.24 llvm/test/Programs/Makefile.programs:1.25
--- llvm/test/Programs/Makefile.programs:1.24	Thu Jan 16 14:47:13 2003
+++ llvm/test/Programs/Makefile.programs	Thu Jan 16 14:55:06 2003
@@ -45,11 +45,13 @@
 .PRECIOUS: Output/%.llvm Output/%.native Output/%.llc Output/%.llc.s
 .PRECIOUS: Output/%.cbe Output/%.cbe.c Output/%.llvm.bc
 
+PROGDIR = $(LEVEL)/test/Programs
+
 # TIMEPROG - The program used to get timing results for a program
-TIMEPROG = $(LEVEL)/test/Programs/TimeProgram.sh
+TIMEPROG = $(PROGDIR)/TimeProgram.sh
 
 # DIFFPROG - The program used to diff the output
-DIFFPROG = $(LEVEL)/test/Programs/DiffOutput.sh
+DIFFPROG = $(PROGDIR)/DiffOutput.sh
 
 # We will be working in the Output directory... 
 PREFIXED_PROGRAMS_TO_TEST := $(addprefix Output/,$(PROGRAMS_TO_TEST))
@@ -166,14 +168,20 @@
 #
 test:: $(addprefix test.$(TEST).,$(PROGRAMS_TO_TEST))
 
+# AVAILABLE_TESTS - Compute the set of tests available for user help
+#
+TEST_FILES = $(filter-out %~, $(wildcard $(PROGDIR)/Makefile.TEST.*))
+AVAILABLE_TESTS = $(subst $(PROGDIR)/Makefile.TEST.,,$(TEST_FILES))
+
 # If they just say 'make test' then we print out an error telling the user to
 # specify a TEST= option.
 test..%:
+	@echo
 	@echo "***************************************************************"
-	@echo "ERROR: you cannot type '$(MAKE) test' directly."
-	@echo "Instead, use '$(MAKE) TEST=foo' where foo is the name of a test."
-	@echo "Tests should be defined in llvm/test/Programs/Makefile.TEST.*."
-	@echo "Alternatively, just use '$(MAKE)' to run comparisons."
+	@echo "  ERROR: you cannot type '$(MAKE) test' directly."
+	@echo "  Instead, use '$(MAKE) TEST=X' where X is the name of a test."
+	@echo "  Tests available: $(AVAILABLE_TESTS)"
+	@echo "  Alternatively, just use '$(MAKE)' to run comparisons."
 	@echo "***************************************************************"
 	@echo
 	@exit 1
@@ -185,5 +193,14 @@
 TestMakefiles := $(wildcard $(LEVEL)/test/Programs/Makefile.TEST.$(TEST)*)
 ifneq ($(TestMakefiles),)
 -include $(TestMakefiles)
+else
+test.$(TEST).%:
+	@echo
+	@echo "***************************************************************"
+	@echo "  ERROR: Test '$(TEST)' is not a known test!"
+	@echo "  Tests available: $(AVAILABLE_TESTS)"
+	@echo "***************************************************************"
+	@echo
+	@exit 1
 endif
 endif




From lattner at cs.uiuc.edu  Thu Jan 16 15:00:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu Jan 16 15:00:01 2003
Subject: [llvm-commits] CVS: llvm/test/Programs/Makefile.TEST.example
Message-ID: <200301162059.OAA22924@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Programs:

Makefile.TEST.example updated: 1.1 -> 1.2

---
Log message:

Simplify example


---
Diffs of the changes:

Index: llvm/test/Programs/Makefile.TEST.example
diff -u llvm/test/Programs/Makefile.TEST.example:1.1 llvm/test/Programs/Makefile.TEST.example:1.2
--- llvm/test/Programs/Makefile.TEST.example:1.1	Thu Jan 16 14:39:24 2003
+++ llvm/test/Programs/Makefile.TEST.example	Thu Jan 16 14:59:38 2003
@@ -5,7 +5,9 @@
 #
 ##===----------------------------------------------------------------------===##
 
+TESTNAME = $(subst test.example.,,$@)
+
 test.example.%: Output/%.llvm.bc
 	@echo "========================================="
-	@echo "Running 'example' test on '$(subst test.example.,,$@)' program"
+	@echo "Running 'example' test on '$(TESTNAME)' program"
 	wc $<




From lattner at cs.uiuc.edu  Thu Jan 16 15:02:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu Jan 16 15:02:01 2003
Subject: [llvm-commits] CVS: llvm/test/Programs/MultiSource/Makefile.multisrc
Message-ID: <200301162101.PAA23372@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Programs/MultiSource:

Makefile.multisrc updated: 1.16 -> 1.17

---
Log message:

Remove pool allocate tests


---
Diffs of the changes:

Index: llvm/test/Programs/MultiSource/Makefile.multisrc
diff -u llvm/test/Programs/MultiSource/Makefile.multisrc:1.16 llvm/test/Programs/MultiSource/Makefile.multisrc:1.17
--- llvm/test/Programs/MultiSource/Makefile.multisrc:1.16	Mon Sep 30 14:23:40 2002
+++ llvm/test/Programs/MultiSource/Makefile.multisrc	Thu Jan 16 15:01:41 2003
@@ -79,64 +79,3 @@
 
 typesafe: Output/$(PROG).linked.bc
 	$(LANALYZE) -unsafepointertypes $<
-
-
-#
-# If performing pool allocation tests, add a bunch of targets to the makefile...
-#
-ifdef ENABLE_POOLALLOC
-
-.PRECIOUS: Output/%.poolalloc.bc
-
-N32Objects := $(addprefix Output/n32/,$(NObjs))
-.PRECIOUS: $(N32Objects) Output/n32/.dir
-Output/%.native32: $(N32Objects)
-	$(CC) -o $@ $(N32Objects) $(LDFLAGS)
-
-Output/n32/%.o: %.c Output/n32/.dir
-	$(CC) -DTORONTO -g -xarch=v8 -c $< -o $@
-
-.PRECIOUS: Output/%.poolalloc8.llvm.bc Output/%.poolalloc16.llvm.bc Output/%.poolalloc32.llvm.bc Output/%.poolalloc16nle.llvm.bc Output/%.poolalloc32nle.llvm.bc
-
-# Pool allocate memory objects if possible
-Output/%.poolalloc8.llvm.bc: Output/%.linked.bc $(LOPT)
-	$(LOPT) -internalize -poolalloc -ptrsize=8 -globaldce -instcombine -die -gcse < $< -o $@ -f
-Output/%.poolalloc16.llvm.bc: Output/%.linked.bc $(LOPT)
-	$(LOPT) -internalize -poolalloc -ptrsize=16 -globaldce -instcombine -die -gcse < $< -o $@ -f
-Output/%.poolalloc32.llvm.bc: Output/%.linked.bc $(LOPT)
-	$(LOPT) -internalize -poolalloc -ptrsize=32 -globaldce -instcombine -die -gcse < $< -o $@ -f
-
-Output/%.poolalloc8nle.llvm.bc: Output/%.linked.bc $(LOPT)
-	$(LOPT) -internalize -poolalloc -no-pool-load-elim -ptrsize=8 -globaldce -instcombine -die < $< -o $@ -f
-Output/%.poolalloc16nle.llvm.bc: Output/%.linked.bc $(LOPT)
-	$(LOPT) -internalize -poolalloc -no-pool-load-elim -ptrsize=16 -globaldce -instcombine -die < $< -o $@ -f
-Output/%.poolalloc32nle.llvm.bc: Output/%.linked.bc $(LOPT)
-	$(LOPT) -internalize -poolalloc -no-pool-load-elim -ptrsize=32 -globaldce -instcombine -die < $< -o $@ -f
-
-
-
-# Link the pool allocator into the programs...
-LLC_PROG_LIBS += /home/vadve/lattner/PoolAllocated/PoolAllocator.o
-
-.PRECIOUS: Output/%.out-pa Output/%.diff-pa
-Output/%.out-pa: Output/%.llc
-	-$< > $@ 2>&1
-
-Output/%.diff-pa: Output/%.out-pa Output/%.out-llc
-	@echo "DIFFING pool allocated vs nonpoolallocated output:"
-	diff $< $(<:%-pa=%-llc)
-	@touch $@
-
-all:: Output/$(PROG).poolalloc32.diff-pa Output/$(PROG).poolalloc32.llc Output/$(PROG).poolalloc16.llc Output/$(PROG).poolalloc32nle.llc Output/$(PROG).poolalloc16nle.llc Output/$(PROG).native32
-
-timing: all
-	$(TIMEPROG) 'Normal LLC build...' Output/$(PROG).llc
-	$(TIMEPROG) '32 bit pool alloc NLE...' Output/$(PROG).poolalloc32nle.llc
-	$(TIMEPROG) '32 bit pool allocation...' Output/$(PROG).poolalloc32.llc
-	$(TIMEPROG) '16 bit pool alloc NLE...' Output/$(PROG).poolalloc16nle.llc
-	$(TIMEPROG) '16 bit pool allocation...' Output/$(PROG).poolalloc16.llc
-
-	$(TIMEPROG) 'Native Sun CC 64...' Output/$(PROG).native
-	$(TIMEPROG) 'Native Sun CC 32...' Output/$(PROG).native32
-
-endif




From lattner at cs.uiuc.edu  Thu Jan 16 15:03:00 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu Jan 16 15:03:00 2003
Subject: [llvm-commits] CVS: llvm/test/Programs/Makefile.TEST.poolalloc
Message-ID: <200301162102.PAA23390@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Programs:

Makefile.TEST.poolalloc added (r1.1)

---
Log message:

Move poolallocation testing here from test/Programs/MultiSource/Makefile.multisrc


---
Diffs of the changes:



From lattner at cs.uiuc.edu  Thu Jan 16 15:07:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu Jan 16 15:07:01 2003
Subject: [llvm-commits] CVS: llvm/Makefile.common
Message-ID: <200301162106.PAA23413@apoc.cs.uiuc.edu>


Changes in directory llvm:

Makefile.common updated: 1.71 -> 1.72

---
Log message:

Add helper


---
Diffs of the changes:

Index: llvm/Makefile.common
diff -u llvm/Makefile.common:1.71 llvm/Makefile.common:1.72
--- llvm/Makefile.common:1.71	Thu Jan 16 14:02:30 2003
+++ llvm/Makefile.common	Thu Jan 16 15:06:18 2003
@@ -468,6 +468,10 @@
 	$(VERB) mkdir -p $(@D)
 	@date > $@
 
+# To create postscript files from dot files...
+%.ps: %.dot
+	dot -Tps < $< > $@
+
 # 'make clean' nukes the tree
 clean::
 	$(VERB) rm -rf $(BUILD_ROOT)/Debug $(BUILD_ROOT)/Release $(BUILD_ROOT)/Profile $(BUILD_ROOT)/Depend




From lattner at cs.uiuc.edu  Thu Jan 16 15:09:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu Jan 16 15:09:01 2003
Subject: [llvm-commits] CVS: llvm/test/Programs/Makefile.TEST.typesafe Makefile.TEST.example
Message-ID: <200301162108.PAA23602@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Programs:

Makefile.TEST.typesafe added (r1.1)
Makefile.TEST.example updated: 1.2 -> 1.3

---
Log message:

* New test to check for typesafe programs
* Simplify the example to make it more cut-n-paste-able



---
Diffs of the changes:

Index: llvm/test/Programs/Makefile.TEST.example
diff -u llvm/test/Programs/Makefile.TEST.example:1.2 llvm/test/Programs/Makefile.TEST.example:1.3
--- llvm/test/Programs/Makefile.TEST.example:1.2	Thu Jan 16 14:59:38 2003
+++ llvm/test/Programs/Makefile.TEST.example	Thu Jan 16 15:08:41 2003
@@ -5,9 +5,9 @@
 #
 ##===----------------------------------------------------------------------===##
 
-TESTNAME = $(subst test.example.,,$@)
+TESTNAME = $(subst test.$(TEST).,,$@)
 
-test.example.%: Output/%.llvm.bc
+test.$(TEST).%: Output/%.llvm.bc
 	@echo "========================================="
-	@echo "Running 'example' test on '$(TESTNAME)' program"
+	@echo "Running '$(TEST)' test on '$(TESTNAME)' program"
 	wc $<




From lattner at cs.uiuc.edu  Thu Jan 16 16:33:00 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu Jan 16 16:33:00 2003
Subject: [llvm-commits] CVS: llvm/test/Programs/Makefile.programs
Message-ID: <200301162232.QAA03937@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Programs:

Makefile.programs updated: 1.25 -> 1.26

---
Log message:

Add pseudo targets for test startup/finish


---
Diffs of the changes:

Index: llvm/test/Programs/Makefile.programs
diff -u llvm/test/Programs/Makefile.programs:1.25 llvm/test/Programs/Makefile.programs:1.26
--- llvm/test/Programs/Makefile.programs:1.25	Thu Jan 16 14:55:06 2003
+++ llvm/test/Programs/Makefile.programs	Thu Jan 16 16:32:26 2003
@@ -166,7 +166,10 @@
 # the default target is the test target.  Here we dispatch to a specific set of
 # tests.
 #
-test:: $(addprefix test.$(TEST).,$(PROGRAMS_TO_TEST))
+.PHONY: test-setup test-finish
+test-setup::
+test-finish::
+test:: test-setup $(PROGRAMS_TO_TEST:%=test.$(TEST).%) test-finish
 
 # AVAILABLE_TESTS - Compute the set of tests available for user help
 #
@@ -190,9 +193,9 @@
 # test.<testname>.%  given input from Output/%.llvm.bc
 #
 ifdef TEST
-TestMakefiles := $(wildcard $(LEVEL)/test/Programs/Makefile.TEST.$(TEST)*)
-ifneq ($(TestMakefiles),)
--include $(TestMakefiles)
+TestMakefile := $(wildcard $(LEVEL)/test/Programs/Makefile.TEST.$(TEST))
+ifneq ($(TestMakefile),)
+-include $(TestMakefile)
 else
 test.$(TEST).%:
 	@echo




From lattner at cs.uiuc.edu  Thu Jan 16 16:34:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu Jan 16 16:34:01 2003
Subject: [llvm-commits] CVS: llvm/test/Programs/Makefile.TEST.buildrepo
Message-ID: <200301162233.QAA03957@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Programs:

Makefile.TEST.buildrepo added (r1.1)

---
Log message:

Pass to copy compiled programs into a cannonical location


---
Diffs of the changes:



From lattner at cs.uiuc.edu  Thu Jan 16 16:34:05 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu Jan 16 16:34:05 2003
Subject: [llvm-commits] CVS: llvm/test/Programs/Makefile.TEST.example Makefile.TEST.typesafe
Message-ID: <200301162233.QAA03970@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Programs:

Makefile.TEST.example updated: 1.3 -> 1.4
Makefile.TEST.typesafe updated: 1.1 -> 1.2

---
Log message:

Minor tweaks


---
Diffs of the changes:

Index: llvm/test/Programs/Makefile.TEST.example
diff -u llvm/test/Programs/Makefile.TEST.example:1.3 llvm/test/Programs/Makefile.TEST.example:1.4
--- llvm/test/Programs/Makefile.TEST.example:1.3	Thu Jan 16 15:08:41 2003
+++ llvm/test/Programs/Makefile.TEST.example	Thu Jan 16 16:33:18 2003
@@ -5,7 +5,7 @@
 #
 ##===----------------------------------------------------------------------===##
 
-TESTNAME = $(subst test.$(TEST).,,$@)
+TESTNAME = $*
 
 test.$(TEST).%: Output/%.llvm.bc
 	@echo "========================================="


Index: llvm/test/Programs/Makefile.TEST.typesafe
diff -u llvm/test/Programs/Makefile.TEST.typesafe:1.1 llvm/test/Programs/Makefile.TEST.typesafe:1.2
--- llvm/test/Programs/Makefile.TEST.typesafe:1.1	Thu Jan 16 15:08:41 2003
+++ llvm/test/Programs/Makefile.TEST.typesafe	Thu Jan 16 16:33:18 2003
@@ -5,7 +5,5 @@
 #
 ##===----------------------------------------------------------------------===##
 
-TESTNAME = $(subst test.$(TEST).,,$@)
-
 test.$(TEST).%: Output/%.llvm.bc
 	$(LANALYZE) -unsafepointertypes $<




From lattner at cs.uiuc.edu  Thu Jan 16 16:45:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu Jan 16 16:45:01 2003
Subject: [llvm-commits] CVS: llvm/Makefile.common
Message-ID: <200301162244.QAA04597@apoc.cs.uiuc.edu>


Changes in directory llvm:

Makefile.common updated: 1.72 -> 1.73

---
Log message:

Simplify and correct rules for building lex/yacc files.  Make sure to delete 
output upon make clean


---
Diffs of the changes:

Index: llvm/Makefile.common
diff -u llvm/Makefile.common:1.72 llvm/Makefile.common:1.73
--- llvm/Makefile.common:1.72	Thu Jan 16 15:06:18 2003
+++ llvm/Makefile.common	Thu Jan 16 16:44:19 2003
@@ -451,6 +451,15 @@
 $(BUILD_ROOT)/Debug/%.o: %.c $(BUILD_ROOT)/Debug/.dir 
 	$(VERB) $(CompileCG) $< -o $@
 
+#
+# Rules for building lex/yacc files
+#
+LEX_FILES   = $(filter %.l, $(Source))
+LEX_OUTPUT  = $(LEX_FILES:%.l=%.cpp)
+YACC_FILES  = $(filter %.y, $(Source))
+YACC_OUTPUT = $(addprefix $(YACC_FILES:%.y=%), .h .cpp .output)
+.PRECIOUS: $(LEX_OUTPUT) $(YACC_OUTPUT)
+
 # Create a .cpp source file from a flex input file... this uses sed to cut down
 # on the warnings emited by GCC...
 %.cpp: %.l
@@ -459,13 +468,13 @@
 # Rule for building the bison parsers...
 
 %.cpp %.h : %.y
-	$(VERB) $(BISON) -v -d -p $(<:%Parser.y=%) $(basename $@).y
-	$(VERB) mv -f $(basename $@).tab.c $(basename $@).cpp
-	$(VERB) mv -f $(basename $@).tab.h $(basename $@).h
+	$(VERB) $(BISON) -v -d -p $(<:%Parser.y=%) $*.y
+	$(VERB) mv -f $*.tab.c $*.cpp
+	$(VERB) mv -f $*.tab.h $*.h
 
 # To create the directories...
 %/.dir:
-	$(VERB) mkdir -p $(@D)
+	$(VERB) mkdir -p $*
 	@date > $@
 
 # To create postscript files from dot files...
@@ -476,6 +485,7 @@
 clean::
 	$(VERB) rm -rf $(BUILD_ROOT)/Debug $(BUILD_ROOT)/Release $(BUILD_ROOT)/Profile $(BUILD_ROOT)/Depend
 	$(VERB) rm -f core core.[0-9][0-9]* *.o *.d *.so *~ *.flc
+	$(VERB) rm -f $(LEX_OUTPUT) $(YACC_OUTPUT)
 
 # If dependancies were generated for the file that included this file,
 # include the dependancies now...




From lattner at cs.uiuc.edu  Thu Jan 16 16:46:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu Jan 16 16:46:01 2003
Subject: [llvm-commits] CVS: llvm/test/Programs/MultiSource/Makefile.multisrc
Message-ID: <200301162245.QAA04613@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Programs/MultiSource:

Makefile.multisrc updated: 1.17 -> 1.18

---
Log message:

Eliminate old crud


---
Diffs of the changes:

Index: llvm/test/Programs/MultiSource/Makefile.multisrc
diff -u llvm/test/Programs/MultiSource/Makefile.multisrc:1.17 llvm/test/Programs/MultiSource/Makefile.multisrc:1.18
--- llvm/test/Programs/MultiSource/Makefile.multisrc:1.17	Thu Jan 16 15:01:41 2003
+++ llvm/test/Programs/MultiSource/Makefile.multisrc	Thu Jan 16 16:44:55 2003
@@ -69,13 +69,4 @@
 final: Output/$(PROG).llvm
 	-ls -l Output/$(PROG).llvm.bc $(HOME)/LLVMPrograms/$(PROG).llvm.bc
 	-cp $(HOME)/LLVMPrograms/$(PROG).llvm.bc $(HOME)/LLVMPrograms/$(PROG).llvm.old.bc
-	cp Output/$(PROG).llvm.bc $(HOME)/LLVMPrograms
-
-ds: Output/$(PROG).linked.bc
-	$(LANALYZE) -datastructure $< -t
-
-%.ps: %.dot
-	dot -Tps < $< > $@
-
-typesafe: Output/$(PROG).linked.bc
-	$(LANALYZE) -unsafepointertypes $<
+	cp Output/$(PROG).llvm.bc $(HOME)/LLVMPrograms
\ No newline at end of file




From lattner at cs.uiuc.edu  Thu Jan 16 16:52:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu Jan 16 16:52:01 2003
Subject: [llvm-commits] CVS: llvm/test/Programs/SingleSource/Makefile.singlesrc
Message-ID: <200301162251.QAA06408@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Programs/SingleSource:

Makefile.singlesrc updated: 1.12 -> 1.13

---
Log message:

Simplify makefile with $*


---
Diffs of the changes:

Index: llvm/test/Programs/SingleSource/Makefile.singlesrc
diff -u llvm/test/Programs/SingleSource/Makefile.singlesrc:1.12 llvm/test/Programs/SingleSource/Makefile.singlesrc:1.13
--- llvm/test/Programs/SingleSource/Makefile.singlesrc:1.12	Mon Sep 30 14:23:55 2002
+++ llvm/test/Programs/SingleSource/Makefile.singlesrc	Thu Jan 16 16:51:14 2003
@@ -30,4 +30,4 @@
 #
 # FIXME: LIBS should be specified, not hardcoded to -lc -lm
 Output/%.llvm Output/%.llvm.bc: Output/%.bc
-	$(LGCCLD) $(STATS) $< -lgcc -lc -lm -o $(<:.bc=.llvm)
+	$(LGCCLD) $(STATS) $< -lgcc -lc -lm -o Output/$*.llvm




From lattner at cs.uiuc.edu  Thu Jan 16 16:55:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu Jan 16 16:55:01 2003
Subject: [llvm-commits] CVS: llvm/test/Programs/MultiSource/Makefile.multisrc
Message-ID: <200301162254.QAA06447@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Programs/MultiSource:

Makefile.multisrc updated: 1.18 -> 1.19

---
Log message:

Simplify makefile with $*


---
Diffs of the changes:

Index: llvm/test/Programs/MultiSource/Makefile.multisrc
diff -u llvm/test/Programs/MultiSource/Makefile.multisrc:1.18 llvm/test/Programs/MultiSource/Makefile.multisrc:1.19
--- llvm/test/Programs/MultiSource/Makefile.multisrc:1.18	Thu Jan 16 16:44:55 2003
+++ llvm/test/Programs/MultiSource/Makefile.multisrc	Thu Jan 16 16:54:22 2003
@@ -1,5 +1,4 @@
-##-----------------------------------------------------------*-Makefile-*-
-#                   test/Programs/MultiSource/Makefile.multisrc
+##- test/Programs/MultiSource/Makefile.multisrc ---------------*- Makefile -*-##
 #
 # This makefile should be used by subdirectories that have multiple source files
 # to be linked together.  This contains all of the common makefile code required
@@ -9,7 +8,7 @@
 #
 # 1. LEVEL - Must be set as per normal semantics: The depth from the top of tree
 #
-##------------------------------------------------------------------------
+##----------------------------------------------------------------------------##
 
 LCCFLAGS := $(CFLAGS) $(CPPFLAGS)
 PROGRAMS_TO_TEST := $(PROG)
@@ -58,7 +57,7 @@
 # Link the program to the libraries it uses, then perform postlink
 # optimization...
 Output/%.llvm Output/%.llvm.bc: Output/%.linked.bc
-	$(LGCCLD) $(STATS) $< -lgcc -lc $(LIBS) -o $(<:.linked.bc=.llvm)
+	$(LGCCLD) $(STATS) $< -lgcc -lc $(LIBS) -o Output/$*.llvm
 
 Output/%.native: $(NObjects)
 	$(CC) -o $@ $(NObjects) $(LDFLAGS) $(CFLAGS)




From lattner at cs.uiuc.edu  Thu Jan 16 16:55:05 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu Jan 16 16:55:05 2003
Subject: [llvm-commits] CVS: llvm/test/Programs/Makefile.programs
Message-ID: <200301162254.QAA06460@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Programs:

Makefile.programs updated: 1.26 -> 1.27

---
Log message:

Simplify makefile with $*


---
Diffs of the changes:

Index: llvm/test/Programs/Makefile.programs
diff -u llvm/test/Programs/Makefile.programs:1.26 llvm/test/Programs/Makefile.programs:1.27
--- llvm/test/Programs/Makefile.programs:1.26	Thu Jan 16 16:32:26 2003
+++ llvm/test/Programs/Makefile.programs	Thu Jan 16 16:54:32 2003
@@ -151,16 +151,16 @@
 
 # Rules to diff test output...
 Output/%.diff-lli: Output/%.out-nat Output/%.out-lli
-	$(DIFFPROG) lli $(subst Output/,,$(@:.diff-lli=))
+	$(DIFFPROG) lli $*
 
 Output/%.diff-jit: Output/%.out-nat Output/%.out-jit
-	$(DIFFPROG) jit $(subst Output/,,$(@:.diff-jit=))
+	$(DIFFPROG) jit $*
 
 Output/%.diff-llc: Output/%.out-nat Output/%.out-llc
-	$(DIFFPROG) llc $(subst Output/,,$(@:.diff-llc=))
+	$(DIFFPROG) llc $*
 
 Output/%.diff-cbe: Output/%.out-nat Output/%.out-cbe
-	$(DIFFPROG) cbe $(subst Output/,,$(@:.diff-cbe=))
+	$(DIFFPROG) cbe $*
 
 # Support for the TEST= option... when TEST= is specified on the command line,
 # the default target is the test target.  Here we dispatch to a specific set of




From lattner at cs.uiuc.edu  Thu Jan 16 16:57:00 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu Jan 16 16:57:00 2003
Subject: [llvm-commits] CVS: llvm/test/Programs/MultiSource/Makefile.multisrc
Message-ID: <200301162256.QAA06500@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Programs/MultiSource:

Makefile.multisrc updated: 1.19 -> 1.20

---
Log message:

Remove hack


---
Diffs of the changes:

Index: llvm/test/Programs/MultiSource/Makefile.multisrc
diff -u llvm/test/Programs/MultiSource/Makefile.multisrc:1.19 llvm/test/Programs/MultiSource/Makefile.multisrc:1.20
--- llvm/test/Programs/MultiSource/Makefile.multisrc:1.19	Thu Jan 16 16:54:22 2003
+++ llvm/test/Programs/MultiSource/Makefile.multisrc	Thu Jan 16 16:56:16 2003
@@ -1,4 +1,4 @@
-##- test/Programs/MultiSource/Makefile.multisrc ---------------*- Makefile -*-##
+##==- test/Programs/MultiSource/Makefile.multisrc ----------*- Makefile -*-===##
 #
 # This makefile should be used by subdirectories that have multiple source files
 # to be linked together.  This contains all of the common makefile code required
@@ -8,7 +8,7 @@
 #
 # 1. LEVEL - Must be set as per normal semantics: The depth from the top of tree
 #
-##----------------------------------------------------------------------------##
+##===----------------------------------------------------------------------===##
 
 LCCFLAGS := $(CFLAGS) $(CPPFLAGS)
 PROGRAMS_TO_TEST := $(PROG)
@@ -62,10 +62,3 @@
 Output/%.native: $(NObjects)
 	$(CC) -o $@ $(NObjects) $(LDFLAGS) $(CFLAGS)
 
-
-
-# Hackish productions that are useful for testing stuff.
-final: Output/$(PROG).llvm
-	-ls -l Output/$(PROG).llvm.bc $(HOME)/LLVMPrograms/$(PROG).llvm.bc
-	-cp $(HOME)/LLVMPrograms/$(PROG).llvm.bc $(HOME)/LLVMPrograms/$(PROG).llvm.old.bc
-	cp Output/$(PROG).llvm.bc $(HOME)/LLVMPrograms
\ No newline at end of file




From lattner at cs.uiuc.edu  Thu Jan 16 16:59:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu Jan 16 16:59:01 2003
Subject: [llvm-commits] CVS: llvm/test/Programs/SingleSource/FloatPrecision.c StructModifyTest.c TestLoop.c
Message-ID: <200301162258.QAA06944@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Programs/SingleSource:

FloatPrecision.c added (r1.1)
StructModifyTest.c added (r1.1)
TestLoop.c added (r1.1)

---
Log message:

These testcases have been in my tree a long long time


---
Diffs of the changes:



From lattner at cs.uiuc.edu  Fri Jan 17 11:37:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri Jan 17 11:37:01 2003
Subject: [llvm-commits] CVS: llvm/Makefile.config
Message-ID: <200301171736.LAA08930@apoc.cs.uiuc.edu>


Changes in directory llvm:

Makefile.config updated: 1.10 -> 1.11

---
Log message:

Add new support for a bytecode repository


---
Diffs of the changes:

Index: llvm/Makefile.config
diff -u llvm/Makefile.config:1.10 llvm/Makefile.config:1.11
--- llvm/Makefile.config:1.10	Sun Sep 22 18:35:11 2002
+++ llvm/Makefile.config	Fri Jan 17 11:36:47 2003
@@ -30,8 +30,22 @@
 #
 #LLVMGCCDIR := /home/vadve/lattner/cvs/gcc_install_x86
 
+# When this setting is set to true, programs in the llvm/test/Programs hierarchy
+# are not recompiled from source code.  Instead, the bytecode for the file is
+# pulled from the BYTECODE_REPOSITORY directory.  This can be useful when disk
+# space is limited or when you just don't want to spend time running the C
+# frontend.
+#
+#USE_PRECOMPILED_BYTECODE := 1
+
+# This path specifies the cannonical location of bytecode files for compiled
+# versions of the test/Programs/* programs.  This is used as the bytecode source
+# when USE_PRECOMPILED_BYTECODE is specified or when source code is not
+# available for the program (such as SPEC).
+#
+BYTECODE_REPOSITORY := /home/vadve/lattner/LLVMPrograms
+
 # Path to location for purify, this is only needed if you build with
 # ENABLE_PURIFY=1
 # 
 PURIFY = /usr/dcs/applications/purify/bin/purify
-




From lattner at cs.uiuc.edu  Fri Jan 17 11:48:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri Jan 17 11:48:01 2003
Subject: [llvm-commits] CVS: llvm/test/Programs/Makefile.TEST.buildrepo
Message-ID: <200301171747.LAA10739@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Programs:

Makefile.TEST.buildrepo updated: 1.1 -> 1.2

---
Log message:

Cleanups: move BYTECODE_REPOSITORY to Mf.config


---
Diffs of the changes:

Index: llvm/test/Programs/Makefile.TEST.buildrepo
diff -u llvm/test/Programs/Makefile.TEST.buildrepo:1.1 llvm/test/Programs/Makefile.TEST.buildrepo:1.2
--- llvm/test/Programs/Makefile.TEST.buildrepo:1.1	Thu Jan 16 16:33:02 2003
+++ llvm/test/Programs/Makefile.TEST.buildrepo	Fri Jan 17 11:47:07 2003
@@ -4,8 +4,6 @@
 #
 ##===----------------------------------------------------------------------===##
 
-BYTECODE_REPOSITORY := /home/vadve/lattner/LLVMPrograms
-
 ifeq ($(BYTECODE_REPOSITORY),)
 ERROR: BYTECODE_REPOSITORY must be defined to build a repository!
 endif
@@ -17,10 +15,7 @@
 PROGDIR := $(shell cd $(LEVEL)/test/Programs; pwd)
 DESTDIR := $(BYTECODE_REPOSITORY)/$(subst $(PROGDIR),,$(CURDIR))
 
-TESTNAME = $*
-
 .PRECIOUS: $(DESTDIR)/.dir $(DESTDIR)/%.bc
-#.PHONY: test.$(TEST).%
 
 test-setup:: $(DESTDIR)/.dir
 




From lattner at cs.uiuc.edu  Fri Jan 17 11:48:06 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri Jan 17 11:48:06 2003
Subject: [llvm-commits] CVS: llvm/test/Programs/Makefile.programs
Message-ID: <200301171747.LAA10748@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Programs:

Makefile.programs updated: 1.27 -> 1.28

---
Log message:

* Add more designators to work better if directories aren't created yet
* Implement USE_PRECOMPILED_BYTECODE


---
Diffs of the changes:

Index: llvm/test/Programs/Makefile.programs
diff -u llvm/test/Programs/Makefile.programs:1.27 llvm/test/Programs/Makefile.programs:1.28
--- llvm/test/Programs/Makefile.programs:1.27	Thu Jan 16 16:54:32 2003
+++ llvm/test/Programs/Makefile.programs	Fri Jan 17 11:47:43 2003
@@ -138,29 +138,61 @@
 endif
 
 # Rules to build the test output...
+$(PROGRAMS_TO_TEST:%=Output/%.out-nat): \
 Output/%.out-nat: Output/%.native
 	-$< > $@ 2>&1 $(RUN_OPTIONS)
+$(PROGRAMS_TO_TEST:%=Output/%.out-lli): \
 Output/%.out-lli: Output/%.llvm.bc $(LLI)
 	-$(LLI) -q -abort-on-exception -force-interpreter=true $< > $@ 2>&1 $(RUN_OPTIONS)
+
+$(PROGRAMS_TO_TEST:%=Output/%.out-jit): \
 Output/%.out-jit: Output/%.llvm.bc $(LLI)
 	-$(LLI) -force-interpreter=false $< > $@ 2>&1 $(RUN_OPTIONS)
+$(PROGRAMS_TO_TEST:%=Output/%.out-llc): \
 Output/%.out-llc: Output/%.llc
 	-$< > $@ 2>&1 $(RUN_OPTIONS)
+$(PROGRAMS_TO_TEST:%=Output/%.out-cbe): \
 Output/%.out-cbe: Output/%.cbe
 	-$< > $@ 2>&1 $(RUN_OPTIONS)
 
 # Rules to diff test output...
+$(PROGRAMS_TO_TEST:%=Output/%.diff-lli): \
 Output/%.diff-lli: Output/%.out-nat Output/%.out-lli
 	$(DIFFPROG) lli $*
 
+$(PROGRAMS_TO_TEST:%=Output/%.diff-jit): \
 Output/%.diff-jit: Output/%.out-nat Output/%.out-jit
 	$(DIFFPROG) jit $*
 
+$(PROGRAMS_TO_TEST:%=Output/%.diff-llc): \
 Output/%.diff-llc: Output/%.out-nat Output/%.out-llc
 	$(DIFFPROG) llc $*
 
+$(PROGRAMS_TO_TEST:%=Output/%.diff-cbe): \
 Output/%.diff-cbe: Output/%.out-nat Output/%.out-cbe
 	$(DIFFPROG) cbe $*
+
+
+# Rules to support the USE_PRECOMPILED_BYTECODE setting If set, submakefiles
+# will not know how to make output bytecode files for the programs in this
+# directory.  Instead, this makefile just copies them out of the bytecode
+# repository.
+ifdef USE_PRECOMPILED_BYTECODE
+
+# Calculate the directory we should copy the bytecode file into.  This is
+# relative to BYTECODE_REPOSITORY and the current directory this program is in.
+#
+CURDIR  := $(shell cd .; pwd)
+PROGDIR := $(shell cd $(LEVEL)/test/Programs; pwd)
+SRCDIR  := $(BYTECODE_REPOSITORY)/$(subst $(PROGDIR),,$(CURDIR))
+
+# To Make a file up-to-date, just copy it over.
+$(PROGRAMS_TO_TEST:%=Output/%.llvm.bc): \
+Output/%.llvm.bc: $(SRCDIR)/%.bc Output/.dir
+	cp $< $@
+
+endif
+
 
 # Support for the TEST= option... when TEST= is specified on the command line,
 # the default target is the test target.  Here we dispatch to a specific set of




From lattner at cs.uiuc.edu  Fri Jan 17 11:49:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri Jan 17 11:49:01 2003
Subject: [llvm-commits] CVS: llvm/test/Programs/MultiSource/Makefile.multisrc
Message-ID: <200301171748.LAA10760@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Programs/MultiSource:

Makefile.multisrc updated: 1.20 -> 1.21

---
Log message:

Implement USE_PRECOMPILED_BYTECODE


---
Diffs of the changes:

Index: llvm/test/Programs/MultiSource/Makefile.multisrc
diff -u llvm/test/Programs/MultiSource/Makefile.multisrc:1.20 llvm/test/Programs/MultiSource/Makefile.multisrc:1.21
--- llvm/test/Programs/MultiSource/Makefile.multisrc:1.20	Thu Jan 16 16:56:16 2003
+++ llvm/test/Programs/MultiSource/Makefile.multisrc	Fri Jan 17 11:48:00 2003
@@ -54,10 +54,14 @@
 Output/%.linked.bc: Output/%.linked.rll $(LGCCAS)
 	$(LGCCAS) $(STATS) $< -o $@
 
+ifndef USE_PRECOMPILED_BYTECODE
+
 # Link the program to the libraries it uses, then perform postlink
 # optimization...
 Output/%.llvm Output/%.llvm.bc: Output/%.linked.bc
 	$(LGCCLD) $(STATS) $< -lgcc -lc $(LIBS) -o Output/$*.llvm
+
+endif
 
 Output/%.native: $(NObjects)
 	$(CC) -o $@ $(NObjects) $(LDFLAGS) $(CFLAGS)




From lattner at cs.uiuc.edu  Fri Jan 17 11:49:05 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri Jan 17 11:49:05 2003
Subject: [llvm-commits] CVS: llvm/test/Programs/SingleSource/Makefile.singlesrc
Message-ID: <200301171748.LAA10767@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Programs/SingleSource:

Makefile.singlesrc updated: 1.13 -> 1.14

---
Log message:

Implement USE_PRECOMPILED_BYTECODE



---
Diffs of the changes:

Index: llvm/test/Programs/SingleSource/Makefile.singlesrc
diff -u llvm/test/Programs/SingleSource/Makefile.singlesrc:1.13 llvm/test/Programs/SingleSource/Makefile.singlesrc:1.14
--- llvm/test/Programs/SingleSource/Makefile.singlesrc:1.13	Thu Jan 16 16:51:14 2003
+++ llvm/test/Programs/SingleSource/Makefile.singlesrc	Fri Jan 17 11:48:06 2003
@@ -25,9 +25,12 @@
 Output/%.native: %.c Output/.dir
 	$(CC) $(CFLAGS) $< -lm -o $@
 
+ifndef USE_PRECOMPILED_BYTECODE
+
 # Since this is just a single source program, the linked version of the program
 # is the same as the unlinked version...
 #
 # FIXME: LIBS should be specified, not hardcoded to -lc -lm
 Output/%.llvm Output/%.llvm.bc: Output/%.bc
 	$(LGCCLD) $(STATS) $< -lgcc -lc -lm -o Output/$*.llvm
+endif




From lattner at cs.uiuc.edu  Fri Jan 17 12:57:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri Jan 17 12:57:01 2003
Subject: [llvm-commits] CVS: llvm/test/Programs/MultiSource/SPEC/Makefile.spec
Message-ID: <200301171856.MAA11698@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Programs/MultiSource/SPEC:

Makefile.spec updated: 1.3 -> 1.4

---
Log message:

Unify makefile with Makefile.programs


---
Diffs of the changes:

Index: llvm/test/Programs/MultiSource/SPEC/Makefile.spec
diff -u llvm/test/Programs/MultiSource/SPEC/Makefile.spec:1.3 llvm/test/Programs/MultiSource/SPEC/Makefile.spec:1.4
--- llvm/test/Programs/MultiSource/SPEC/Makefile.spec:1.3	Wed Nov  6 17:44:37 2002
+++ llvm/test/Programs/MultiSource/SPEC/Makefile.spec	Fri Jan 17 12:56:06 2003
@@ -1,89 +1,56 @@
-## -*-Makefile-*-
+##===- test/Programs/MultiSource/SPEC/Makefile.spec --------*- Makefile -*-===##
+#
+# This makefile is used for testing the SPEC programs
+#
+##===----------------------------------------------------------------------===##
+
+# RUN_TYPE - Either ref, test, or train.  Maybe be specified on the command line
+RUN_TYPE := test
+
+# We do not distribute source code for the SPEC benchmarks, so we always start
+# with precompiled bytecode here.
+#
+USE_PRECOMPILED_BYTECODE := 1
 
-default: all
-
-## $(BENCH) should be the name of the benchmark "nnn.name".
-## If not specified, this defaults to the name of the benchmark directory.
-ifndef BENCH
-  BENCH = $(notdir $(PWD))
-endif
-BENCHBC = $(BENCH).bc
+## $(PROG) should be the name of the benchmark "nnn.name".
+PROG := $(notdir $(PWD))
 
 ## $(BENCHOUT) should be the name of the file to which stdout should go.
 ## It should be one of the standard output files in data/test/output/
 ifndef BENCHOUT
-BENCHOUT = $(BENCH).out
+BENCHOUT = $(PROG).out
 endif
 
-PROGRAMS_TO_TEST = $(BENCH)
+PROGRAMS_TO_TEST := $(PROG)
 
+include	$(LEVEL)/test/Programs/Makefile.programs
 
-include	$(LEVEL)/test/Makefile.tests
-
-data:
-	@test -L data || ln -s $(BENCHDATADIR)
-
-all:: $(BENCHBC)
-
-ifndef DISABLE_LLC
-all :: Output/$(BENCH).diff-llc
-endif
 
-ifndef DISABLE_CBE
-all :: Output/$(BENCH).diff-cbe
-endif
+##--- SPEC-dependent rules to do a test run or a reportable reference run
 
+SPECROOT := /home/vadve/shared/benchmarks/speccpu2000/benchspec
 
-##--- SPEC-dependent rules to do a test run or a reportable reference run
+# DATADIR - The directory holding expected SPEC benchmark results
+DATADIR := $(SPECROOT)/CINT2000/$(PROG)/data
 
-# BENCHDATADIR - The directory holding expected SPEC benchmark results
-BENCHDATADIR = /home/vadve/shared/Benchmarks/speccpu2000/benchspec/CINT2000/$(BENCH)/data
+data:
+	@test -L data || ln -s $(DATADIR)
 
-## BENCHMARK_OUTPUTS includes all the output files provided in the output dir.
+## REFERENCE_OUTPUTS includes all the output files provided in the output dir.
 ## $(BENCHOUT) defined above should be one of these output files.
 ## 
-BENCHMARK_OUTPUTS = $(wildcard $(BENCHDATADIR)/test/output/*.out)
-LLC_OUTPUTS = $(subst $(BENCHDATADIR)/test/output/,,$(BENCHMARK_OUTPUTS))
-CBE_OUTPUTS = $(LLC_OUTPUTS)
-
-check:
-	echo orig = $(BENCHMARK_OUTPUTS)
-	echo llc = $(LLC_OUTPUTS)
+REFERENCE_OUTPUTS := $(wildcard $(DATADIR)/$(RUN_TYPE)/output/*.out)
+LOCAL_OUTPUTS     := $(notdir $(REFERENCE_OUTPUTS))
 
-ref: Output/$(BENCH).llc
-	Output/$(BENCH).llc $(REFOPTS)
+check-paths:
+	@echo orig = $(REFERENCE_OUTPUTS)
+	@echo local = $(LOCAL_OUTPUTS)
 
+gen-ref-output:
+	cat $(REFERENCE_OUTPUTS) > $(SRCDIR)/$(PROG).reference_output
 
 ##--- LLVM-specific rules to compile and run the benchmark ---
 
-.PRECIOUS: Output/%.llc.s Output/%.llc
-.PRECIOUS: Output/%.cbe.c Output/%.cbe
-.PRECIOUS: Output/%.out-llc Output/%.out-cbe Output/%.out-nat 
-
-# DIFFPROG - The program used to diff the output
-DIFFPROG = $(LEVEL)/test/Programs/DiffOutput.sh
-
-# BENCHCODEDIR - The global directory holding SPEC benchmark bytecodes
-BENCHCODEDIR = /home/vadve/lattner/LLVMPrograms/SPEC
-
-$(BENCHBC): $(BENCHCODEDIR)/$(BENCHBC)
-	$(CP) $< $@
-
-Output/%.llc.s: %.bc Output/.dir
-	$(LLC) $(LLCFLAGS) -f $< -o $@
-
-Output/%.llc: Output/%.llc.s Output/.dir
-	$(CC) $(CFLAGS) $< $(LLCLIBS) -o $@
-
-Output/%.cbe.c: %.bc $(LDIS) Output/.dir
-	$(LDIS) -c < $< > $@
-
-Output/%.cbe: Output/%.cbe.c
-	$(CC) -o $@ $< $(LDFLAGS) $(CFLAGS)
-
-Output/%.out-nat: $(BENCHMARK_OUTPUTS) Output/.dir
-	cat $(BENCHMARK_OUTPUTS) > $@
-
 ifdef COPYFILES
 Output/.copy:
 	/bin/cp -p -r $(COPYFILES) Output/
@@ -96,26 +63,9 @@
 Output/%.out-llc: Output/%.llc Output/.copy Output/.dir
 	(cd Output; \
 	  ../$< $(TESTOPTS) > $(BENCHOUT); \
-	  cat $(LLC_OUTPUTS) > ../$@;)
+	  cat $(LOCAL_OUTPUTS) > ../$@;)
 
 Output/%.out-cbe: Output/%.cbe Output/.copy Output/.dir CBEOutput/.dir
 	(cd CBEOutput; \
 	  ../$< $(TESTOPTS) > $(BENCHOUT); \
-	  cat $(CBE_OUTPUTS) > ../$@; )
-
-Output/%.diff-llc: Output/%.out-nat Output/%.out-llc Output/.dir
-	$(DIFFPROG) llc $(subst Output/,,$(@:.diff-llc=))
-
-Output/%.diff-cbe: data Output/%.out-nat Output/%.out-cbe Output/.dir
-	$(DIFFPROG) cbe $(subst Output/,,$(@:.diff-cbe=))
-
-
-clean::
-	$(RM) -rf CBEOutput/
-
-## %.diff-llc: %.out-cbe %.out-llc
-## 	gdiff -u $* > $@ || ( \
-## 	  echo "*********** TEST $@ FAILED *********"; \
-## 	  cat $@; \
-## 	  rm $@; \
-## 	  echo "*********** TEST $@ FAILED *********"; )
+	  cat $(LOCAL_OUTPUTS) > ../$@; )




From lattner at cs.uiuc.edu  Fri Jan 17 12:58:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri Jan 17 12:58:01 2003
Subject: [llvm-commits] CVS: llvm/test/Programs/Makefile.programs
Message-ID: <200301171857.MAA11718@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Programs:

Makefile.programs updated: 1.28 -> 1.29

---
Log message:

Add support for USE_PRECOMPILED_BYTECODE to copy over reference outputs


---
Diffs of the changes:

Index: llvm/test/Programs/Makefile.programs
diff -u llvm/test/Programs/Makefile.programs:1.28 llvm/test/Programs/Makefile.programs:1.29
--- llvm/test/Programs/Makefile.programs:1.28	Fri Jan 17 11:47:43 2003
+++ llvm/test/Programs/Makefile.programs	Fri Jan 17 12:57:35 2003
@@ -127,35 +127,46 @@
 all:: $(LLIDIFFS)
 endif
 
+#
+# Rules to compile the program for the C Back End
+#
 Output/%.cbe.c: Output/%.llvm.bc $(LDIS)
 	$(LDIS) -c < $< > $@
 
 Output/%.cbe: Output/%.cbe.c
 	$(CC) -o $@ $< $(LDFLAGS) $(CFLAGS)
 
+#
+# Rules to execute the program
+#
+RUN_OPTIONS += 2>&1
 ifdef INPUT_FILENAME
 RUN_OPTIONS += < $(INPUT_FILENAME)
 endif
 
 # Rules to build the test output...
+ifndef USE_PRECOMPILED_BYTECODE
 $(PROGRAMS_TO_TEST:%=Output/%.out-nat): \
 Output/%.out-nat: Output/%.native
 	-$< > $@ 2>&1 $(RUN_OPTIONS)
+endif
 $(PROGRAMS_TO_TEST:%=Output/%.out-lli): \
 Output/%.out-lli: Output/%.llvm.bc $(LLI)
-	-$(LLI) -q -abort-on-exception -force-interpreter=true $< > $@ 2>&1 $(RUN_OPTIONS)
+	-$(LLI) -q -abort-on-exception -force-interpreter=true $< > $@ $(RUN_OPTIONS)
 
 $(PROGRAMS_TO_TEST:%=Output/%.out-jit): \
 Output/%.out-jit: Output/%.llvm.bc $(LLI)
-	-$(LLI) -force-interpreter=false $< > $@ 2>&1 $(RUN_OPTIONS)
+	-$(LLI) -force-interpreter=false $< > $@ $(RUN_OPTIONS)
 $(PROGRAMS_TO_TEST:%=Output/%.out-llc): \
 Output/%.out-llc: Output/%.llc
-	-$< > $@ 2>&1 $(RUN_OPTIONS)
+	-$< > $@ $(RUN_OPTIONS)
 $(PROGRAMS_TO_TEST:%=Output/%.out-cbe): \
 Output/%.out-cbe: Output/%.cbe
-	-$< > $@ 2>&1 $(RUN_OPTIONS)
+	-$< > $@ $(RUN_OPTIONS)
 
+#
 # Rules to diff test output...
+#
 $(PROGRAMS_TO_TEST:%=Output/%.diff-lli): \
 Output/%.diff-lli: Output/%.out-nat Output/%.out-lli
 	$(DIFFPROG) lli $*
@@ -186,7 +197,13 @@
 PROGDIR := $(shell cd $(LEVEL)/test/Programs; pwd)
 SRCDIR  := $(BYTECODE_REPOSITORY)/$(subst $(PROGDIR),,$(CURDIR))
 
-# To Make a file up-to-date, just copy it over.
+# Because we don't have source code, we cannot build a native version of the
+# executable.  Copy over pregenerated reference output.
+$(PROGRAMS_TO_TEST:%=Output/%.out-nat): \
+Output/%.out-nat: $(SRCDIR)/%.reference_output Output/.dir
+	cp $< $@
+
+# To make a bytecode file up-to-date, just copy it over.
 $(PROGRAMS_TO_TEST:%=Output/%.llvm.bc): \
 Output/%.llvm.bc: $(SRCDIR)/%.bc Output/.dir
 	cp $< $@




From lattner at cs.uiuc.edu  Fri Jan 17 13:08:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri Jan 17 13:08:01 2003
Subject: [llvm-commits] CVS: llvm/test/Libraries/libdummy/
Message-ID: <200301171907.NAA11808@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Libraries/libdummy:


---
Log message:

Directory /home/vadve/vadve/Research/DynOpt/CVSRepository/llvm/test/Libraries/libdummy added to the repository


---
Diffs of the changes:



From lattner at cs.uiuc.edu  Fri Jan 17 13:09:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri Jan 17 13:09:01 2003
Subject: [llvm-commits] CVS: llvm/test/DSGraphs/dummylib.c
Message-ID: <200301171908.NAA11828@apoc.cs.uiuc.edu>


Changes in directory llvm/test/DSGraphs:

dummylib.c (r1.3) removed

---
Log message:

Move to test/libraries


---
Diffs of the changes:



From lattner at cs.uiuc.edu  Fri Jan 17 13:10:00 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri Jan 17 13:10:00 2003
Subject: [llvm-commits] CVS: llvm/test/Libraries/libdummy/Makefile dummylib.c
Message-ID: <200301171909.NAA11864@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Libraries/libdummy:

Makefile added (r1.1)
dummylib.c added (r1.1)

---
Log message:

Initial checkin of dummylib


---
Diffs of the changes:



From lattner at cs.uiuc.edu  Fri Jan 17 13:43:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri Jan 17 13:43:01 2003
Subject: [llvm-commits] CVS: llvm/test/Programs/Makefile.TEST.example Makefile.TEST.typesafe
Message-ID: <200301171942.NAA12783@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Programs:

Makefile.TEST.example updated: 1.4 -> 1.5
Makefile.TEST.typesafe updated: 1.2 -> 1.3

---
Log message:

Make tests work better


---
Diffs of the changes:

Index: llvm/test/Programs/Makefile.TEST.example
diff -u llvm/test/Programs/Makefile.TEST.example:1.4 llvm/test/Programs/Makefile.TEST.example:1.5
--- llvm/test/Programs/Makefile.TEST.example:1.4	Thu Jan 16 16:33:18 2003
+++ llvm/test/Programs/Makefile.TEST.example	Fri Jan 17 13:42:37 2003
@@ -7,6 +7,7 @@
 
 TESTNAME = $*
 
+$(PROGRAMS_TO_TEST:%=test.$(TEST).%): \
 test.$(TEST).%: Output/%.llvm.bc
 	@echo "========================================="
 	@echo "Running '$(TEST)' test on '$(TESTNAME)' program"


Index: llvm/test/Programs/Makefile.TEST.typesafe
diff -u llvm/test/Programs/Makefile.TEST.typesafe:1.2 llvm/test/Programs/Makefile.TEST.typesafe:1.3
--- llvm/test/Programs/Makefile.TEST.typesafe:1.2	Thu Jan 16 16:33:18 2003
+++ llvm/test/Programs/Makefile.TEST.typesafe	Fri Jan 17 13:42:37 2003
@@ -5,5 +5,6 @@
 #
 ##===----------------------------------------------------------------------===##
 
+$(PROGRAMS_TO_TEST:%=test.$(TEST).%): \
 test.$(TEST).%: Output/%.llvm.bc
 	$(LANALYZE) -unsafepointertypes $<




From lattner at cs.uiuc.edu  Fri Jan 17 13:44:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri Jan 17 13:44:01 2003
Subject: [llvm-commits] CVS: llvm/test/Programs/Makefile.TEST.dsgraph
Message-ID: <200301171943.NAA12801@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Programs:

Makefile.TEST.dsgraph added (r1.1)

---
Log message:

Initial checkin of implemention of test/DSGraph


---
Diffs of the changes:



From lattner at cs.uiuc.edu  Fri Jan 17 13:45:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri Jan 17 13:45:01 2003
Subject: [llvm-commits] CVS: llvm/test/sched.ll
Message-ID: <200301171944.NAA12817@apoc.cs.uiuc.edu>


Changes in directory llvm/test:

sched.ll (r1.3) removed

---
Log message:

Remove obsolete test


---
Diffs of the changes:



From lattner at cs.uiuc.edu  Fri Jan 17 13:46:00 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri Jan 17 13:46:00 2003
Subject: [llvm-commits] CVS: llvm/test/inlinetest.ll inductionvars.ll
Message-ID: <200301171945.NAA12836@apoc.cs.uiuc.edu>


Changes in directory llvm/test:

inlinetest.ll (r1.3) removed
inductionvars.ll (r1.2) removed

---
Log message:

Remove obsolete tests


---
Diffs of the changes:



From lattner at cs.uiuc.edu  Fri Jan 17 13:46:05 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri Jan 17 13:46:05 2003
Subject: [llvm-commits] CVS: llvm/test/exprtest.ll globaldce.ll
Message-ID: <200301171945.NAA12857@apoc.cs.uiuc.edu>


Changes in directory llvm/test:

exprtest.ll (r1.1) removed
globaldce.ll (r1.2) removed

---
Log message:

Remove obsolete tests


---
Diffs of the changes:



From lattner at cs.uiuc.edu  Fri Jan 17 13:52:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri Jan 17 13:52:01 2003
Subject: [llvm-commits] CVS: llvm/test/Programs/generate_report.pl
Message-ID: <200301171951.NAA12921@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Programs:

generate_report.pl added (r1.1)

---
Log message:

Initial checkin of DSGraph/generate_report.pl


---
Diffs of the changes:



From lattner at cs.uiuc.edu  Fri Jan 17 13:52:06 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri Jan 17 13:52:06 2003
Subject: [llvm-commits] CVS: llvm/test/Programs/Makefile
Message-ID: <200301171951.NAA12926@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Programs:

Makefile updated: 1.5 -> 1.6

---
Log message:

Allow TESTs to add rules to top-level makefile


---
Diffs of the changes:

Index: llvm/test/Programs/Makefile
diff -u llvm/test/Programs/Makefile:1.5 llvm/test/Programs/Makefile:1.6
--- llvm/test/Programs/Makefile:1.5	Thu Jan 16 13:54:39 2003
+++ llvm/test/Programs/Makefile	Fri Jan 17 13:50:36 2003
@@ -2,3 +2,14 @@
 PARALLEL_DIRS  = SingleSource MultiSource
 
 include ${LEVEL}/test/Makefile.tests
+
+# Include all makefiles which define tests... These makefiles must define
+# test.<testname>.%  given input from Output/%.llvm.bc
+#
+ifdef TEST
+TestMakefile := $(wildcard $(LEVEL)/test/Programs/Makefile.TEST.$(TEST))
+ifneq ($(TestMakefile),)
+-include $(TestMakefile)
+endif
+endif
+




From lattner at cs.uiuc.edu  Fri Jan 17 14:05:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri Jan 17 14:05:01 2003
Subject: [llvm-commits] CVS: llvm/test/Programs/htmlcoldiff.pl
Message-ID: <200301172004.OAA16545@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Programs:

htmlcoldiff.pl added (r1.1)

---
Log message:

Move from test/DSGraph


---
Diffs of the changes:



From lattner at cs.uiuc.edu  Fri Jan 17 14:10:02 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri Jan 17 14:10:02 2003
Subject: [llvm-commits] CVS: llvm/test/Programs/Makefile.TEST.dsgraph generate_report.pl
Message-ID: <200301172009.OAA16597@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Programs:

Makefile.TEST.dsgraph updated: 1.1 -> 1.2
generate_report.pl updated: 1.1 -> 1.2

---
Log message:

Finish reestablishing dsgraph tests


---
Diffs of the changes:

Index: llvm/test/Programs/Makefile.TEST.dsgraph
diff -u llvm/test/Programs/Makefile.TEST.dsgraph:1.1 llvm/test/Programs/Makefile.TEST.dsgraph:1.2
--- llvm/test/Programs/Makefile.TEST.dsgraph:1.1	Fri Jan 17 13:43:09 2003
+++ llvm/test/Programs/Makefile.TEST.dsgraph	Fri Jan 17 14:09:44 2003
@@ -37,3 +37,21 @@
 	@echo ">>> ========= '$*' Program"
 	@echo "---------------------------------------------------------------"
 	@cat $<
+
+
+#
+# Rules for building a report from 'make report TEST=dsgraph' at Programs level
+#
+
+report.raw.out: $(DUMMYLIB) $(LANALYZE)
+	gmake TEST=$(TEST) 2>&1 | tee $@
+
+## FIXME: This should be genericized and put into Programs/Makefile as a nice
+## report target.
+report: report.raw.out
+	./generate_report.pl report.raw.out > report.txt
+	@head -n1 report.txt
+	@sed '/^Name:/d' < report.txt | sort --key=2 -r -g
+
+clean::
+	rm -f report.raw.out report.txt
\ No newline at end of file


Index: llvm/test/Programs/generate_report.pl
diff -u llvm/test/Programs/generate_report.pl:1.1 llvm/test/Programs/generate_report.pl:1.2
--- llvm/test/Programs/generate_report.pl:1.1	Fri Jan 17 13:50:51 2003
+++ llvm/test/Programs/generate_report.pl	Fri Jan 17 14:09:44 2003
@@ -28,7 +28,7 @@
 # Now split it up into records.  Each benchmarks starts with a line with a >>>
 # prefix
 
-my @Records = split />>> =========  /, $FILE;
+my @Records = split />>> ========= /, $FILE;
 
 # Delete the first "entry" which is really stuff printed prior to starting the
 # first test.
@@ -38,12 +38,12 @@
 # Output the headers for the report....
 printf("%-20s ", "Name:");
 if ($SHOW_TIMES) {
-  printf("%6s %-6s %-6s %-6s %-8s %-8s     ",
-         "Anlyz:", "LocTm:", "BUTim:", "TDTim:", "TimeSum:", "BCTime:");
+  printf("%6s %-6s %-6s %-6s %-8s     ",
+         "Anlyz:", "LocTm:", "BUTim:", "TDTim:", "TimeSum:");
 }
 
-printf("%-8s %-8s %-8s %-8s %-8s   ",
-       "LocSize:", "BUSize:", "TDSize:", "BUTDSz:", "BCSize:");
+printf("%-8s %-8s %-8s %-8s   ",
+       "LocSize:", "BUSize:", "TDSize:", "BUTDSz:");
 printf("%-8s %-10s %-6s %-6s %-6s " . "| %-5s %-5s %-5s %-5s %-5s %-5s" .
        " | %7s %9s %5s\n",
        "NumFold", "NumNodes", "MaxSz", "GlobGr", "MaxSCC",
@@ -52,7 +52,7 @@
 
 foreach $Record (@Records) {
   # Print BM name
-  printField('======= ([-a-zA-Z0-9.]+) Program', $Record, -20);
+  printField('\'([^\']+)\' Program', $Record, -20);
 
   if ($Record =~ m/Assertion/) {
     # If an assertion failure occured, print it out.
@@ -65,7 +65,6 @@
       printField('([0-9.]+) \([^)]+\)[ 0-9]+Bottom', $Record, -6);
       my $T = printField('([0-9.]+) \([^)]+\)[ 0-9]+Top'   , $Record, -6);
       printf("%-8s ", $L+$B+$T);
-      printField('([0-9.]+) \([^)]+\)[ ]*[0-9]+  Bytecode', $Record, -8);
       print "|   ";
     }
 
@@ -74,7 +73,6 @@
     my $B = printField("([0-9]+)  Bottom-up", $Record, -8);
     my $T = printField("([0-9]+)  Top-down", $Record, -8);
     printf("%-8s ", $B+$T);
-    printField("([0-9]+)  Bytecode", $Record, -8);
 
     print "|    ";
     printField("([0-9]+).*Number of folded nodes ", $Record, -5);
@@ -84,11 +82,11 @@
     printField("([0-9]+).*Maximum SCC Size in Call Graph", $Record, -6);
 
     print "| ";
-    my $I = printField("([0-9]+).*Number of LoadInsts", $Record, -5);
-    $I += printField("([0-9]+).*Number of StoreInsts", $Record, -5);
-    $I += printField("([0-9]+).*Number of CallInsts", $Record, -5);
-    $I += printField("([0-9]+).*Number of AllocaInsts", $Record, -5);
-    $I += printField("([0-9]+).*Number of MallocInsts", $Record, -5);
+    my $I = printField("([0-9]+).*Number of Load insts", $Record, -5);
+    $I += printField("([0-9]+).*Number of Store insts", $Record, -5);
+    $I += printField("([0-9]+).*Number of Call insts", $Record, -5);
+    $I += printField("([0-9]+).*Number of Alloca insts", $Record, -5);
+    $I += printField("([0-9]+).*Number of Malloc insts", $Record, -5);
     printf("%-5s ", $I);
 
     print "| ";




From lattner at cs.uiuc.edu  Fri Jan 17 14:11:02 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri Jan 17 14:11:02 2003
Subject: [llvm-commits] CVS: llvm/test/Programs/MultiSource/SPEC/Makefile
Message-ID: <200301172010.OAA16605@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Programs/MultiSource/SPEC:

Makefile updated: 1.1 -> 1.2

---
Log message:

Make spec programs play nicely with tests


---
Diffs of the changes:

Index: llvm/test/Programs/MultiSource/SPEC/Makefile
diff -u llvm/test/Programs/MultiSource/SPEC/Makefile:1.1 llvm/test/Programs/MultiSource/SPEC/Makefile:1.2
--- llvm/test/Programs/MultiSource/SPEC/Makefile:1.1	Wed Oct  9 16:50:27 2002
+++ llvm/test/Programs/MultiSource/SPEC/Makefile	Fri Jan 17 14:09:25 2003
@@ -3,4 +3,4 @@
 LEVEL = ../../../..
 PARALLEL_DIRS  := CINT2000
 
-include ${LEVEL}/Makefile.common
+include $(LEVEL)/test/Makefile.tests




From lattner at cs.uiuc.edu  Fri Jan 17 16:17:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri Jan 17 16:17:01 2003
Subject: [llvm-commits] CVS: llvm/test/Programs/Makefile.TEST.dsgraph generate_report.pl
Message-ID: <200301172216.QAA17908@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Programs:

Makefile.TEST.dsgraph updated: 1.2 -> 1.3
generate_report.pl updated: 1.2 -> 1.3

---
Log message:

Genericize generate_report.pl


---
Diffs of the changes:

Index: llvm/test/Programs/Makefile.TEST.dsgraph
diff -u llvm/test/Programs/Makefile.TEST.dsgraph:1.2 llvm/test/Programs/Makefile.TEST.dsgraph:1.3
--- llvm/test/Programs/Makefile.TEST.dsgraph:1.2	Fri Jan 17 14:09:44 2003
+++ llvm/test/Programs/Makefile.TEST.dsgraph	Fri Jan 17 16:16:41 2003
@@ -38,7 +38,6 @@
 	@echo "---------------------------------------------------------------"
 	@cat $<
 
-
 #
 # Rules for building a report from 'make report TEST=dsgraph' at Programs level
 #
@@ -49,9 +48,7 @@
 ## FIXME: This should be genericized and put into Programs/Makefile as a nice
 ## report target.
 report: report.raw.out
-	./generate_report.pl report.raw.out > report.txt
-	@head -n1 report.txt
-	@sed '/^Name:/d' < report.txt | sort --key=2 -r -g
+	./generate_report.pl report.raw.out | tee report.txt
 
 clean::
 	rm -f report.raw.out report.txt


Index: llvm/test/Programs/generate_report.pl
diff -u llvm/test/Programs/generate_report.pl:1.2 llvm/test/Programs/generate_report.pl:1.3
--- llvm/test/Programs/generate_report.pl:1.2	Fri Jan 17 14:09:44 2003
+++ llvm/test/Programs/generate_report.pl	Fri Jan 17 16:16:41 2003
@@ -34,83 +34,143 @@
 # first test.
 shift @Records;
 
-
-# Output the headers for the report....
-printf("%-20s ", "Name:");
-if ($SHOW_TIMES) {
-  printf("%6s %-6s %-6s %-6s %-8s     ",
-         "Anlyz:", "LocTm:", "BUTim:", "TDTim:", "TimeSum:");
+# The column to sort by, to be overridden as neccesary by the report description
+my $SortCol = 2;
+my $SortReverse = 1;
+
+sub SumCols {
+  my ($Cols, $Col, $NumRows) = @_;
+  $Val = 0;
+  while ($NumRows) {
+    $Col--; $NumRows--;
+    $Val += $Cols->[$Col] if ($Cols->[$Col] ne "*");
+  }
+  return $Val;
 }
 
-printf("%-8s %-8s %-8s %-8s   ",
-       "LocSize:", "BUSize:", "TDSize:", "BUTDSz:");
-printf("%-8s %-10s %-6s %-6s %-6s " . "| %-5s %-5s %-5s %-5s %-5s %-5s" .
-       " | %7s %9s %5s\n",
-       "NumFold", "NumNodes", "MaxSz", "GlobGr", "MaxSCC",
-       "Loads", "Store", "Calls", "Allca", "Mallc", "Sum",
-       "num/ind", "indcallee", "ratio");
+sub Ratio {
+  my ($Cols, $Col) = @_;
+  if ($Cols->[$Col-2] ne "*" and
+      $Cols->[$Col-2] != "0") {
+    return $Cols->[$Col-1]/$Cols->[$Col-2];
+  } else {
+    return "n/a";
+  }
+}
 
+my @Fields = (
+# Name
+            ["Name:" , '\'([^\']+)\' Program'],
+            [],
+# Times
+            ["Anlyz:", '([0-9.]+) \([^)]+\)[ 0-9]+TOTAL'],
+            ["LocTm:", '([0-9.]+) \([^)]+\)[ 0-9]+Local'],
+            ["BUTim:", '([0-9.]+) \([^)]+\)[ 0-9]+Bottom'],
+            ["TDTim:", '([0-9.]+) \([^)]+\)[ 0-9]+Top'],
+            ["SumTm:", sub { return SumCols(@_, 3); }],
+            [],
+# Sizes
+            ["LocSize:", '([0-9]+)  Local'],
+            ["BUSize:" , '([0-9]+)  Bottom-up'],
+            ["TDSize:" , '([0-9]+)  Top-down'],
+            ["BU+TDSz:", sub { return SumCols(@_, 3); }],
+            [],
+# Misc stuff
+            ["NumFold" , '([0-9]+).*Number of folded nodes '],
+            ["NumNodes", 'Graphs contain \\[([0-9+]+)\\] nodes total'],
+            ["MaxSz"   , '([0-9]+).*Maximum graph size'],
+            ["GlobGr"  , '\\.GlobalsGraph\\.dot\'... \\[([0-9+]+)\\]'],
+            ["MaxSCC"  , '([0-9]+).*Maximum SCC Size in Call Graph'],
+            [],
+            ["Loads"   , '([0-9]+).*Number of Load insts'],
+            ["Store"   , '([0-9]+).*Number of Store insts'],
+            ["Calls"   , '([0-9]+).*Number of Call insts'],
+            ["Allca"   , '([0-9]+).*Number of Alloca insts'],
+            ["Mallc"   , '([0-9]+).*Number of Malloc insts'],
+            [" Sum "   , sub { return SumCols(@_, 5); }],
+            #[" Sum "   , sub { return $_[0]->[$_[1]-1]; }],
+            [],
+            ["num/ind" , '([0-9]+).*number of indirect call sites'],
+            ["indcallee",'([0-9]+).*number of callee functions at'],
+            ["ratio"   , \&Ratio],  # B / A if A != 0 else "n/a"
+            []
+           );
+
+my @Values;
+
+#
+# Read data into the table of values...
+#
 foreach $Record (@Records) {
-  # Print BM name
-  printField('\'([^\']+)\' Program', $Record, -20);
+  my @RowValues;
+  my $Col = 0;
+  for $Row (@Fields) {
+    if (scalar(@$Row)) {            # An actual value to read?
+      if (ref ($Row->[1])) {          # Code to be executed?
+        push @RowValues, &{$Row->[1]}(\@RowValues, $Col);
+      } else {                      # Field to be read...
+        $Record =~ m/$Row->[1]/;
+        if (!defined($1)) {
+          push @RowValues, "*";
+        } else {
+          push @RowValues, $1;
+        }
+      }
+    } else {                        # Just add a seperator...
+      push @RowValues, "|";
+    }
+    $Col++;
+  }
 
+  my $Assert = "";
   if ($Record =~ m/Assertion/) {
     # If an assertion failure occured, print it out.
-    print (grep /Assertion/, (split "\n", $Record));
-  } else {
-    if ($SHOW_TIMES) {
-      # Print Times
-      my $B = printField('([0-9.]+) \([^)]+\)[ 0-9]+Bottom', $Record, -6);
-      my $L = printField('([0-9.]+) \([^)]+\)[ 0-9]+Local' , $Record, -6);
-      printField('([0-9.]+) \([^)]+\)[ 0-9]+Bottom', $Record, -6);
-      my $T = printField('([0-9.]+) \([^)]+\)[ 0-9]+Top'   , $Record, -6);
-      printf("%-8s ", $L+$B+$T);
-      print "|   ";
-    }
+    $Assert = sprintf "\n\t\t\t%s", (grep /Assertion/, (split "\n", $Record));
+  }
+  push @RowValues, $Assert;
+  push @Values, [@RowValues];
+}
 
-    # Print Sizes
-    printField("([0-9]+)  Local", $Record, -8);
-    my $B = printField("([0-9]+)  Bottom-up", $Record, -8);
-    my $T = printField("([0-9]+)  Top-down", $Record, -8);
-    printf("%-8s ", $B+$T);
-
-    print "|    ";
-    printField("([0-9]+).*Number of folded nodes ", $Record, -5);
-    printField("Graphs contain \\[([0-9+]+)\\] nodes total", $Record, -10);
-    printField("([0-9]+).*Maximum graph size", $Record, -6);
-    printField("\\.GlobalsGraph\\.dot'... \\[([0-9+]+)\\]", $Record, -6);
-    printField("([0-9]+).*Maximum SCC Size in Call Graph", $Record, -6);
-
-    print "| ";
-    my $I = printField("([0-9]+).*Number of Load insts", $Record, -5);
-    $I += printField("([0-9]+).*Number of Store insts", $Record, -5);
-    $I += printField("([0-9]+).*Number of Call insts", $Record, -5);
-    $I += printField("([0-9]+).*Number of Alloca insts", $Record, -5);
-    $I += printField("([0-9]+).*Number of Malloc insts", $Record, -5);
-    printf("%-5s ", $I);
-
-    print "| ";
-    my $NI = printField("([0-9]+).*number of indirect call sites", $Record, -7);
-    my $NC = printField("([0-9]+).*number of callee functions at", $Record, -9);
-    if ($NI != 0) {
-      printf("%-5s ", $NC/$NI);
-    } else {
-      printf("%-5s ", "n/a");
-    }
+#
+# Sort table now...
+#
+ at Values = sort { $a->[$SortCol] cmp $b->[$SortCol] } @Values;
+ at Values = reverse @Values if ($SortReverse);
+
+#
+# Add the header for the report to the table after sorting...
+#
+my @Header;
+for $Row (@Fields) {
+  if (scalar(@$Row)) {   # Non-empty row?
+    push @Header, $Row->[0];
+  } else {               # Empty row, just add seperator
+    push @Header, "|";
+  }
+}
+unshift @Values, [@Header];
 
+#
+# Figure out how wide each field should be...
+#
+my @FieldWidths = (0) x scalar(@Fields);
+foreach $Value (@Values) {
+  for ($i = 0; $i < @$Value-1; $i++) {
+    if (length($$Value[$i]) > $FieldWidths[$i]) {
+      $FieldWidths[$i] = length($$Value[$i])
+    }
   }
-  print "\n";
 }
 
-sub printField {
-  ($Regex, $Record, $FieldWidth) = @_;
-  #print "Args: '$Regex' '$Record'\n";
-  $Record =~ m/$Regex/;
-  if (!defined($1)) {
-    printf("%${FieldWidth}s ", "*");
-    return "0";
-  } else {
-    printf("%${FieldWidth}s ", $1);
+
+#
+# Print out the table now...
+#
+foreach $Value (@Values) {
+  for ($i = 0; $i < @$Value-1; $i++) {
+    printf "%-$FieldWidths[$i]s ", $$Value[$i];
   }
-  return $1;
+
+  # Print the assertion message if existant...
+  print "$$Value[@$Value-1]\n";
 }




From lattner at cs.uiuc.edu  Fri Jan 17 16:52:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri Jan 17 16:52:01 2003
Subject: [llvm-commits] CVS: llvm/test/Programs/Makefile
Message-ID: <200301172251.QAA20124@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Programs:

Makefile updated: 1.6 -> 1.7

---
Log message:

Add generic support for reports


---
Diffs of the changes:

Index: llvm/test/Programs/Makefile
diff -u llvm/test/Programs/Makefile:1.6 llvm/test/Programs/Makefile:1.7
--- llvm/test/Programs/Makefile:1.6	Fri Jan 17 13:50:36 2003
+++ llvm/test/Programs/Makefile	Fri Jan 17 16:51:36 2003
@@ -1,3 +1,11 @@
+##===- test/Programs/Makefile ------------------------------*- Makefile -*-===##
+#
+# This recursively traverses the programs, building them as neccesary.  This
+# makefile also implements 'make report TEST=<x>'.
+#
+##===----------------------------------------------------------------------===##
+
+
 LEVEL = ../..
 PARALLEL_DIRS  = SingleSource MultiSource
 
@@ -13,3 +21,15 @@
 endif
 endif
 
+#
+# Rules for building a report from 'make report TEST=<x>'
+#
+
+report.$(TEST).raw.out: $(REPORT_DEPENDENCIES)
+	gmake TEST=$(TEST) 2>&1 | tee $@
+
+report: report.$(TEST).raw.out
+	./generate_report.pl TEST.$(TEST).report < $< | tee report.$(TEST).txt
+
+clean::
+	rm -f report.*.raw.out report.*.txt




From lattner at cs.uiuc.edu  Fri Jan 17 16:53:00 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri Jan 17 16:53:00 2003
Subject: [llvm-commits] CVS: llvm/test/Programs/TEST.dsgraph.report
Message-ID: <200301172252.QAA20154@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Programs:

TEST.dsgraph.report added (r1.1)

---
Log message:

Add report description for dsgraphs


---
Diffs of the changes:



From lattner at cs.uiuc.edu  Fri Jan 17 16:53:05 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri Jan 17 16:53:05 2003
Subject: [llvm-commits] CVS: llvm/test/Programs/Makefile.TEST.dsgraph generate_report.pl
Message-ID: <200301172252.QAA20163@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Programs:

Makefile.TEST.dsgraph updated: 1.3 -> 1.4
generate_report.pl updated: 1.3 -> 1.4

---
Log message:

Genericize reporting


---
Diffs of the changes:

Index: llvm/test/Programs/Makefile.TEST.dsgraph
diff -u llvm/test/Programs/Makefile.TEST.dsgraph:1.3 llvm/test/Programs/Makefile.TEST.dsgraph:1.4
--- llvm/test/Programs/Makefile.TEST.dsgraph:1.3	Fri Jan 17 16:16:41 2003
+++ llvm/test/Programs/Makefile.TEST.dsgraph	Fri Jan 17 16:52:15 2003
@@ -27,28 +27,18 @@
 
 ANALYZE_OPTS := -stats -time-passes -only-print-main-ds -dsstats -instcount
 
-$(PROGRAMS_TO_TEST:%=Output/%.report.txt): \
-Output/%.report.txt: Output/%.lib.bc $(LANALYZE)
+$(PROGRAMS_TO_TEST:%=Output/%.$(TEST).report.txt): \
+Output/%.$(TEST).report.txt: Output/%.lib.bc $(LANALYZE)
 	-(time -p $(LANALYZE) -$(PASS)datastructure $(ANALYZE_OPTS) $<)> $@ 2>&1
 
 $(PROGRAMS_TO_TEST:%=test.$(TEST).%): \
-test.dsgraph.%: Output/%.report.txt
+test.dsgraph.%: Output/%.$(TEST).report.txt
 	@echo "---------------------------------------------------------------"
 	@echo ">>> ========= '$*' Program"
 	@echo "---------------------------------------------------------------"
 	@cat $<
 
+# Define REPORT_DEPENDENCIES so that the report is regenerated if analyze or
+# dummylib is updated.
 #
-# Rules for building a report from 'make report TEST=dsgraph' at Programs level
-#
-
-report.raw.out: $(DUMMYLIB) $(LANALYZE)
-	gmake TEST=$(TEST) 2>&1 | tee $@
-
-## FIXME: This should be genericized and put into Programs/Makefile as a nice
-## report target.
-report: report.raw.out
-	./generate_report.pl report.raw.out | tee report.txt
-
-clean::
-	rm -f report.raw.out report.txt
\ No newline at end of file
+REPORT_DEPENDENCIES := $(DUMMYLIB) $(LANALYZE)
\ No newline at end of file


Index: llvm/test/Programs/generate_report.pl
diff -u llvm/test/Programs/generate_report.pl:1.3 llvm/test/Programs/generate_report.pl:1.4
--- llvm/test/Programs/generate_report.pl:1.3	Fri Jan 17 16:16:41 2003
+++ llvm/test/Programs/generate_report.pl	Fri Jan 17 16:52:15 2003
@@ -1,43 +1,14 @@
 #!/usr/dcs/software/supported/bin/perl -w
 
-# Default values for arguments
-$SHOW_TIMES = 1;
-
-# Parse arguments...
-while ($_ = $ARGV[0], /^[-+]/) {
-  shift;
-  last if /^--$/;  # Stop processing arguments on --
-
-  # List command line options here...
-  if (/^-no-times$/) { $SHOW_TIMES = 0; next; }
-
-  print "Unknown option: $_ : ignoring!\n";
-}
-
-my $InputFN = $ARGV[0];
-#print "Reading input from $InputFN\n";
-
-open(INPUT, $InputFN) or die "Couldn't open '$InputFN'!";
-
-# Read all input...
-my @Lines = <INPUT>;
-
-# Turn it into one big string...
-my $FILE = join "\n", @Lines;
-
-# Now split it up into records.  Each benchmarks starts with a line with a >>>
-# prefix
-
-my @Records = split />>> ========= /, $FILE;
-
-# Delete the first "entry" which is really stuff printed prior to starting the
-# first test.
-shift @Records;
+#
+# Parameters which may be overriden by the report description file.
+#
 
 # The column to sort by, to be overridden as neccesary by the report description
-my $SortCol = 2;
-my $SortReverse = 1;
+my $SortCol = 0;
+my $SortReverse = 0;
 
+# Helper functions which may be called by the report description files...
 sub SumCols {
   my ($Cols, $Col, $NumRows) = @_;
   $Val = 0;
@@ -48,59 +19,36 @@
   return $Val;
 }
 
-sub Ratio {
-  my ($Cols, $Col) = @_;
-  if ($Cols->[$Col-2] ne "*" and
-      $Cols->[$Col-2] != "0") {
-    return $Cols->[$Col-1]/$Cols->[$Col-2];
-  } else {
-    return "n/a";
-  }
-}
+# Check command line arguments...
+die "Must specify a report description option" if (scalar(@ARGV) < 1);
 
-my @Fields = (
-# Name
-            ["Name:" , '\'([^\']+)\' Program'],
-            [],
-# Times
-            ["Anlyz:", '([0-9.]+) \([^)]+\)[ 0-9]+TOTAL'],
-            ["LocTm:", '([0-9.]+) \([^)]+\)[ 0-9]+Local'],
-            ["BUTim:", '([0-9.]+) \([^)]+\)[ 0-9]+Bottom'],
-            ["TDTim:", '([0-9.]+) \([^)]+\)[ 0-9]+Top'],
-            ["SumTm:", sub { return SumCols(@_, 3); }],
-            [],
-# Sizes
-            ["LocSize:", '([0-9]+)  Local'],
-            ["BUSize:" , '([0-9]+)  Bottom-up'],
-            ["TDSize:" , '([0-9]+)  Top-down'],
-            ["BU+TDSz:", sub { return SumCols(@_, 3); }],
-            [],
-# Misc stuff
-            ["NumFold" , '([0-9]+).*Number of folded nodes '],
-            ["NumNodes", 'Graphs contain \\[([0-9+]+)\\] nodes total'],
-            ["MaxSz"   , '([0-9]+).*Maximum graph size'],
-            ["GlobGr"  , '\\.GlobalsGraph\\.dot\'... \\[([0-9+]+)\\]'],
-            ["MaxSCC"  , '([0-9]+).*Maximum SCC Size in Call Graph'],
-            [],
-            ["Loads"   , '([0-9]+).*Number of Load insts'],
-            ["Store"   , '([0-9]+).*Number of Store insts'],
-            ["Calls"   , '([0-9]+).*Number of Call insts'],
-            ["Allca"   , '([0-9]+).*Number of Alloca insts'],
-            ["Mallc"   , '([0-9]+).*Number of Malloc insts'],
-            [" Sum "   , sub { return SumCols(@_, 5); }],
-            #[" Sum "   , sub { return $_[0]->[$_[1]-1]; }],
-            [],
-            ["num/ind" , '([0-9]+).*number of indirect call sites'],
-            ["indcallee",'([0-9]+).*number of callee functions at'],
-            ["ratio"   , \&Ratio],  # B / A if A != 0 else "n/a"
-            []
-           );
+# Read file input in one big gulp...
+undef $/;
+
+# Read raw data file and split it up into records.  Each benchmarks starts with
+# a line with a >>> prefix
+#
+my @Records = split />>> ========= /, <STDIN>;
+
+# Delete the first "entry" which is really stuff printed prior to starting the
+# first test.
+shift @Records;
+
+# Read and eval the report description file now.  This defines the Fields array
+# and may potentially modify some of our global settings like the sort key.
+#
+my $ReportFN = $ARGV[0];
+#print "Reading report description from $ReportFN\n";
+open(REPORTDESC, $ReportFN) or
+  die "Couldn't open report description '$ReportFN'!";
+
+my @Fields = eval <REPORTDESC>;
 
-my @Values;
 
 #
 # Read data into the table of values...
 #
+my @Values;
 foreach $Record (@Records) {
   my @RowValues;
   my $Col = 0;




From lattner at cs.uiuc.edu  Fri Jan 17 17:00:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri Jan 17 17:00:01 2003
Subject: [llvm-commits] CVS: llvm/test/Programs/Makefile Makefile.programs TEST.buildrepo.Makefile TEST.dsgraph.Makefile TEST.example.Makefile TEST.poolalloc.Makefile TEST.typesafe.Makefile
Message-ID: <200301172258.QAA21092@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Programs:

Makefile updated: 1.7 -> 1.8
Makefile.programs updated: 1.29 -> 1.30
TEST.buildrepo.Makefile updated: 1.2 -> 1.3
TEST.dsgraph.Makefile updated: 1.4 -> 1.5
TEST.example.Makefile updated: 1.5 -> 1.6
TEST.poolalloc.Makefile updated: 1.1 -> 1.2
TEST.typesafe.Makefile updated: 1.3 -> 1.4

---
Log message:

Rename files.


---
Diffs of the changes:

Index: llvm/test/Programs/Makefile
diff -u llvm/test/Programs/Makefile:1.7 llvm/test/Programs/Makefile:1.8
--- llvm/test/Programs/Makefile:1.7	Fri Jan 17 16:51:36 2003
+++ llvm/test/Programs/Makefile	Fri Jan 17 16:58:49 2003
@@ -5,9 +5,8 @@
 #
 ##===----------------------------------------------------------------------===##
 
-
 LEVEL = ../..
-PARALLEL_DIRS  = SingleSource MultiSource
+PARALLEL_DIRS = SingleSource MultiSource
 
 include ${LEVEL}/test/Makefile.tests
 
@@ -15,7 +14,7 @@
 # test.<testname>.%  given input from Output/%.llvm.bc
 #
 ifdef TEST
-TestMakefile := $(wildcard $(LEVEL)/test/Programs/Makefile.TEST.$(TEST))
+TestMakefile := $(wildcard $(LEVEL)/test/Programs/TEST.$(TEST).Makefile)
 ifneq ($(TestMakefile),)
 -include $(TestMakefile)
 endif
@@ -29,7 +28,7 @@
 	gmake TEST=$(TEST) 2>&1 | tee $@
 
 report: report.$(TEST).raw.out
-	./generate_report.pl TEST.$(TEST).report < $< | tee report.$(TEST).txt
+	./GenerateReport.pl TEST.$(TEST).report < $< | tee report.$(TEST).txt
 
 clean::
 	rm -f report.*.raw.out report.*.txt


Index: llvm/test/Programs/Makefile.programs
diff -u llvm/test/Programs/Makefile.programs:1.29 llvm/test/Programs/Makefile.programs:1.30
--- llvm/test/Programs/Makefile.programs:1.29	Fri Jan 17 12:57:35 2003
+++ llvm/test/Programs/Makefile.programs	Fri Jan 17 16:58:49 2003
@@ -242,7 +242,7 @@
 # test.<testname>.%  given input from Output/%.llvm.bc
 #
 ifdef TEST
-TestMakefile := $(wildcard $(LEVEL)/test/Programs/Makefile.TEST.$(TEST))
+TestMakefile := $(wildcard $(LEVEL)/test/Programs/TEST.$(TEST).Makefile)
 ifneq ($(TestMakefile),)
 -include $(TestMakefile)
 else


Index: llvm/test/Programs/TEST.buildrepo.Makefile
diff -u llvm/test/Programs/TEST.buildrepo.Makefile:1.2 llvm/test/Programs/TEST.buildrepo.Makefile:1.3
--- llvm/test/Programs/TEST.buildrepo.Makefile:1.2	Fri Jan 17 11:47:07 2003
+++ llvm/test/Programs/TEST.buildrepo.Makefile	Fri Jan 17 16:58:49 2003
@@ -1,4 +1,4 @@
-##===- test/Programs/Makefile.TEST.buildrepo ---------------*- Makefile -*-===##
+##===- test/Programs/TEST.buildrepo.Makefile ---------------*- Makefile -*-===##
 #
 # This "test" is used to copy all compiled bytecode files into the repository.
 #


Index: llvm/test/Programs/TEST.dsgraph.Makefile
diff -u llvm/test/Programs/TEST.dsgraph.Makefile:1.4 llvm/test/Programs/TEST.dsgraph.Makefile:1.5
--- llvm/test/Programs/TEST.dsgraph.Makefile:1.4	Fri Jan 17 16:52:15 2003
+++ llvm/test/Programs/TEST.dsgraph.Makefile	Fri Jan 17 16:58:49 2003
@@ -1,4 +1,4 @@
-##===- test/Programs/Makefile.TEST.dsgraph -----------------*- Makefile -*-===##
+##===- test/Programs/TEST.dsgraph.Makefile -----------------*- Makefile -*-===##
 #
 # This recursively traverses the programs, computing DSGraphs for each of the
 # programs in the testsuite.


Index: llvm/test/Programs/TEST.example.Makefile
diff -u llvm/test/Programs/TEST.example.Makefile:1.5 llvm/test/Programs/TEST.example.Makefile:1.6
--- llvm/test/Programs/TEST.example.Makefile:1.5	Fri Jan 17 13:42:37 2003
+++ llvm/test/Programs/TEST.example.Makefile	Fri Jan 17 16:58:49 2003
@@ -1,4 +1,4 @@
-##===- test/Programs/Makefile.TEST.example -----------------*- Makefile -*-===##
+##===- test/Programs/TEST.example.Makefile -----------------*- Makefile -*-===##
 #
 # Example to show a custom test.  This test just prints the size of the bytecode
 # file for each program.


Index: llvm/test/Programs/TEST.poolalloc.Makefile
diff -u llvm/test/Programs/TEST.poolalloc.Makefile:1.1 llvm/test/Programs/TEST.poolalloc.Makefile:1.2
--- llvm/test/Programs/TEST.poolalloc.Makefile:1.1	Thu Jan 16 15:02:12 2003
+++ llvm/test/Programs/TEST.poolalloc.Makefile	Fri Jan 17 16:58:49 2003
@@ -1,4 +1,4 @@
-##===- test/Programs/Makefile.TEST.poolalloc ---------------*- Makefile -*-===##
+##===- test/Programs/TEST.poolalloc.Makefile ---------------*- Makefile -*-===##
 #
 # Old tests for pool allocation.  These will almost certainly have to be updated
 # to be useful in the future.


Index: llvm/test/Programs/TEST.typesafe.Makefile
diff -u llvm/test/Programs/TEST.typesafe.Makefile:1.3 llvm/test/Programs/TEST.typesafe.Makefile:1.4
--- llvm/test/Programs/TEST.typesafe.Makefile:1.3	Fri Jan 17 13:42:37 2003
+++ llvm/test/Programs/TEST.typesafe.Makefile	Fri Jan 17 16:58:49 2003
@@ -1,4 +1,4 @@
-##===- test/Programs/Makefile.TEST.typesafe ----------------*- Makefile -*-===##
+##===- test/Programs/TEST.typesafe.Makefile ----------------*- Makefile -*-===##
 #
 # This test simply checks to see if programs are typesafe according to the
 # -unsafepointertypes analysis.
@@ -8,3 +8,4 @@
 $(PROGRAMS_TO_TEST:%=test.$(TEST).%): \
 test.$(TEST).%: Output/%.llvm.bc
 	$(LANALYZE) -unsafepointertypes $<
+




From lattner at cs.uiuc.edu  Fri Jan 17 17:26:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri Jan 17 17:26:01 2003
Subject: [llvm-commits] CVS: llvm/test/Programs/TEST.dsgraph.Makefile TEST.dsgraph.report
Message-ID: <200301172325.RAA24358@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Programs:

TEST.dsgraph.Makefile updated: 1.5 -> 1.6
TEST.dsgraph.report updated: 1.1 -> 1.2

---
Log message:

Small cleanups


---
Diffs of the changes:

Index: llvm/test/Programs/TEST.dsgraph.Makefile
diff -u llvm/test/Programs/TEST.dsgraph.Makefile:1.5 llvm/test/Programs/TEST.dsgraph.Makefile:1.6
--- llvm/test/Programs/TEST.dsgraph.Makefile:1.5	Fri Jan 17 16:58:49 2003
+++ llvm/test/Programs/TEST.dsgraph.Makefile	Fri Jan 17 17:25:08 2003
@@ -32,7 +32,7 @@
 	-(time -p $(LANALYZE) -$(PASS)datastructure $(ANALYZE_OPTS) $<)> $@ 2>&1
 
 $(PROGRAMS_TO_TEST:%=test.$(TEST).%): \
-test.dsgraph.%: Output/%.$(TEST).report.txt
+test.$(TEST).%: Output/%.$(TEST).report.txt
 	@echo "---------------------------------------------------------------"
 	@echo ">>> ========= '$*' Program"
 	@echo "---------------------------------------------------------------"
@@ -41,4 +41,4 @@
 # Define REPORT_DEPENDENCIES so that the report is regenerated if analyze or
 # dummylib is updated.
 #
-REPORT_DEPENDENCIES := $(DUMMYLIB) $(LANALYZE)
\ No newline at end of file
+REPORT_DEPENDENCIES := $(DUMMYLIB) $(LANALYZE)


Index: llvm/test/Programs/TEST.dsgraph.report
diff -u llvm/test/Programs/TEST.dsgraph.report:1.1 llvm/test/Programs/TEST.dsgraph.report:1.2
--- llvm/test/Programs/TEST.dsgraph.report:1.1	Fri Jan 17 16:52:27 2003
+++ llvm/test/Programs/TEST.dsgraph.report	Fri Jan 17 17:25:08 2003
@@ -1,4 +1,4 @@
-##=== dsgraph.report-desc - Report description for dsgraph -----*- perl -*-===##
+##=== TEST.dsgraph.report - Report description for dsgraph -----*- perl -*-===##
 #
 # This file defines a report to be generated for the dsgraph test.
 #




From lattner at cs.uiuc.edu  Fri Jan 17 17:26:06 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri Jan 17 17:26:06 2003
Subject: [llvm-commits] CVS: llvm/test/Programs/TEST.jit.Makefile TEST.jit.report
Message-ID: <200301172325.RAA24369@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Programs:

TEST.jit.Makefile added (r1.1)
TEST.jit.report added (r1.1)

---
Log message:

Add a new jit evaluation report


---
Diffs of the changes:



From lattner at cs.uiuc.edu  Sun Jan 19 12:08:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sun Jan 19 12:08:01 2003
Subject: [llvm-commits] CVS: llvm/test/Programs/RunSafely.sh
Message-ID: <200301191807.MAA04627@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Programs:

RunSafely.sh added (r1.1)

---
Log message:

New helper script


---
Diffs of the changes:



From lattner at cs.uiuc.edu  Sun Jan 19 12:16:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sun Jan 19 12:16:01 2003
Subject: [llvm-commits] CVS: llvm/test/Programs/Makefile.programs
Message-ID: <200301191815.MAA04918@apoc.cs.uiuc.edu>


Changes in directory llvm/test/Programs:

Makefile.programs updated: 1.30 -> 1.31

---
Log message:

Use the new runsafely script to run programs so we get stack traces


---
Diffs of the changes:

Index: llvm/test/Programs/Makefile.programs
diff -u llvm/test/Programs/Makefile.programs:1.30 llvm/test/Programs/Makefile.programs:1.31
--- llvm/test/Programs/Makefile.programs:1.30	Fri Jan 17 16:58:49 2003
+++ llvm/test/Programs/Makefile.programs	Sun Jan 19 12:15:41 2003
@@ -47,12 +47,26 @@
 
 PROGDIR = $(LEVEL)/test/Programs
 
+#
+# Scripts in the Programs directory...
+#
+
 # TIMEPROG - The program used to get timing results for a program
 TIMEPROG = $(PROGDIR)/TimeProgram.sh
 
 # DIFFPROG - The program used to diff the output
 DIFFPROG = $(PROGDIR)/DiffOutput.sh
 
+# RUNSAFELY - This program simply runs another program.  If the program works
+# correctly, this script has no effect, otherwise it will do things like print a
+# stack trace of a core dump.  It always returns "successful" so that tests will
+# continue to be run.
+RUNSAFELY = $(PROGDIR)/RunSafely.sh
+
+#
+# Targets to build for the default target...
+#
+
 # We will be working in the Output directory... 
 PREFIXED_PROGRAMS_TO_TEST := $(addprefix Output/,$(PROGRAMS_TO_TEST))
 
@@ -148,21 +162,23 @@
 ifndef USE_PRECOMPILED_BYTECODE
 $(PROGRAMS_TO_TEST:%=Output/%.out-nat): \
 Output/%.out-nat: Output/%.native
-	-$< > $@ 2>&1 $(RUN_OPTIONS)
+	$(RUNSAFELY) $< > $@ $(RUN_OPTIONS)
 endif
+
+LLI_OPTS := -q -abort-on-exception -force-interpreter=true
 $(PROGRAMS_TO_TEST:%=Output/%.out-lli): \
 Output/%.out-lli: Output/%.llvm.bc $(LLI)
-	-$(LLI) -q -abort-on-exception -force-interpreter=true $< > $@ $(RUN_OPTIONS)
+	$(RUNSAFELY) $(LLI) $(LLI_OPTS) $< > $@ $(RUN_OPTIONS)
 
 $(PROGRAMS_TO_TEST:%=Output/%.out-jit): \
 Output/%.out-jit: Output/%.llvm.bc $(LLI)
-	-$(LLI) -force-interpreter=false $< > $@ $(RUN_OPTIONS)
+	$(RUNSAFELY) $(LLI) -force-interpreter=false $< > $@ $(RUN_OPTIONS)
 $(PROGRAMS_TO_TEST:%=Output/%.out-llc): \
 Output/%.out-llc: Output/%.llc
-	-$< > $@ $(RUN_OPTIONS)
+	$(RUNSAFELY) $< > $@ $(RUN_OPTIONS)
 $(PROGRAMS_TO_TEST:%=Output/%.out-cbe): \
 Output/%.out-cbe: Output/%.cbe
-	-$< > $@ $(RUN_OPTIONS)
+	$(RUNSAFELY) $< > $@ $(RUN_OPTIONS)
 
 #
 # Rules to diff test output...




From lattner at cs.uiuc.edu  Sun Jan 19 15:56:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sun Jan 19 15:56:01 2003
Subject: [llvm-commits] CVS: llvm/tools/llc/Makefile
Message-ID: <200301192155.PAA08580@apoc.cs.uiuc.edu>


Changes in directory llvm/tools/llc:

Makefile updated: 1.33 -> 1.34

---
Log message:

* Prune down library list.  In particular, llc doesn't need all of IPO, and none of data structure and IPA completely!
* Do not keep symbols by default!


---
Diffs of the changes:

Index: llvm/tools/llc/Makefile
diff -u llvm/tools/llc/Makefile:1.33 llvm/tools/llc/Makefile:1.34
--- llvm/tools/llc/Makefile:1.33	Sun Dec  8 23:53:11 2002
+++ llvm/tools/llc/Makefile	Sun Jan 19 15:55:43 2003
@@ -11,20 +11,16 @@
            target.a \
            instrument \
            livevar \
+           ipo.a \
+	   scalaropts.a \
+           transforms.a \
+           analysis.a \
+           transformutils.a \
            bcreader \
-           bcwriter \
-           ipo \
-	   scalaropts \
-           transforms \
-           analysis \
-           ipa \
-           datastructure \
-           transformutils \
+	   bcwriter \
            vmcore \
            support
 TOOLLINKOPTS = -ldl
-
-KEEP_SYMBOLS = 1
 
 include $(LEVEL)/Makefile.common
 




From lattner at cs.uiuc.edu  Sun Jan 19 16:48:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sun Jan 19 16:48:01 2003
Subject: [llvm-commits] CVS: CVSROOT/history
Message-ID: <200301192247.QAA08660@apoc.cs.uiuc.edu>


Changes in directory CVSROOT:

history added (r1.1)

---
Log message:

Allow CVS to start keeping track of history so cvs history command works


---
Diffs of the changes:



From lattner at cs.uiuc.edu  Sun Jan 19 16:49:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sun Jan 19 16:49:01 2003
Subject: [llvm-commits] CVS: CVSROOT/history
Message-ID: <200301192248.QAA08677@apoc.cs.uiuc.edu>


Changes in directory CVSROOT:

history (r1.1) removed

---
Log message:

Ok, I'm silly and have no clue what I'm doing.  :)



---
Diffs of the changes:



From lattner at cs.uiuc.edu  Sun Jan 19 17:42:00 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sun Jan 19 17:42:00 2003
Subject: [llvm-commits] CVS: llvm/lib/Reoptimizer/Mapping/getLLVMinfo.cpp
Message-ID: <200301192341.RAA08921@apoc.cs.uiuc.edu>


Changes in directory llvm/lib/Reoptimizer/Mapping:

getLLVMinfo.cpp updated: 1.8 -> 1.9

---
Log message:

Squash warning


---
Diffs of the changes:

Index: llvm/lib/Reoptimizer/Mapping/getLLVMinfo.cpp
diff -u llvm/lib/Reoptimizer/Mapping/getLLVMinfo.cpp:1.8 llvm/lib/Reoptimizer/Mapping/getLLVMinfo.cpp:1.9
--- llvm/lib/Reoptimizer/Mapping/getLLVMinfo.cpp:1.8	Mon Oct  7 03:22:36 2002
+++ llvm/lib/Reoptimizer/Mapping/getLLVMinfo.cpp	Sun Jan 19 17:41:36 2003
@@ -131,7 +131,7 @@
   pair<unsigned, unsigned> &BBnoVec = getBasicBlockInfo(Fno, BBno);
   //std::cerr<<"got BBnoVec\n";
   //unsigned *Fadd = (unsigned *)llvmFunctionTable[Fno];
-  uint64_t Fadd = (uint64_t)llvmFunctionTable[Fno];
+  uint64_t Fadd = (uint64_t)(intptr_t)llvmFunctionTable[Fno];
   //std::cerr<<"########### Function add:"<<(void *)Fadd<<"\n";
 
   uint64_t BBstartAdd = Fadd + BBnoVec.first*4;//anand-- added *4




From lattner at cs.uiuc.edu  Sun Jan 19 23:36:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sun Jan 19 23:36:01 2003
Subject: [llvm-commits] CVS: llvm/www/testresults/
Message-ID: <200301200535.XAA18659@apoc.cs.uiuc.edu>


Changes in directory llvm/www/testresults:


---
Log message:

Directory /home/vadve/vadve/Research/DynOpt/CVSRepository/llvm/www/testresults added to the repository


---
Diffs of the changes:



From lattner at cs.uiuc.edu  Sun Jan 19 23:46:01 2003
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sun Jan 19 23:46:01 2003
Subject: [llvm-commits] CVS: llvm/www/testresults/index.html
Message-ID: <200301200545.XAA11504@tank.cs.uiuc.edu>


Changes in directory llvm/www/testresults:

index.html added (r1.1)

---
Log message:

Initial test results page


---
Diffs of the changes: