Abstract:

Modern software development practices lack portable, precise and powerful -mechanisms for describing -performance properties of application code. Traditional approaches rely almost -solely on performance -instrumentation libraries, which have significant drawbacks in certain types -(e.g., adaptive) -of applications, present the end user with integration challenges and complex -APIs, and often pose -portability problems of their own. This thesis proposes a small set of C-like -language extensions -that facilitate the treatment of performance properties as intrinsic -properties of application code. -The proposed language extensions allow the application developer to encode -performance expectations, -gather and aggregate various types of performance information, and more, all -at the language -level. Furthermore, this thesis demonstrates many novel compiler -implementation techniques that -make the the presented approach possible with an arbitrary (third-party) -compiler, and that minimize -performance perturbation by enabling compiler optimizations that are commonly -inhibited by -traditional approaches. This thesis describes the fundamental contribution of -language-level performance -properties, the language extensions themselves, the implementation of the -compilation and -runtime system, together with a standard library of widely-used metrics, and -demonstrates the role -that the extensions and compilation system can play in describing the -performance-oriented aspects -of both a production-quality raytracing application and a long-running -adaptive server code. +mechanisms for describing performance properties of application code. +Traditional approaches rely almost solely on performance instrumentation +libraries, which have significant drawbacks in certain types (e.g., adaptive) of +applications, present the end user with integration challenges and complex APIs, +and often pose portability problems of their own. This thesis proposes a small +set of C-like language extensions that facilitate the treatment of performance +properties as intrinsic properties of application code. The proposed language +extensions allow the application developer to encode performance expectations, +gather and aggregate various types of performance information, and more, all at +the language level. Furthermore, this thesis demonstrates many novel compiler +implementation techniques that make the the presented approach possible with an +arbitrary (third-party) compiler, and that minimize performance perturbation by +enabling compiler optimizations that are commonly inhibited by traditional +approaches. This thesis describes the fundamental contribution of +language-level performance properties, the language extensions themselves, the +implementation of the compilation and runtime system, together with a standard +library of widely-used metrics, and demonstrates the role that the extensions +and compilation system can play in describing the performance-oriented aspects +of both a production-quality raytracing application and a long-running adaptive +server code.

Published:

- Language Extensions for Performance-Oriented Programming, Joel Stanley.
+ "Language Extensions for Performance-Oriented Programming", Joel Stanley.
+ Masters Thesis, Computer Science Dept., University of Illinois at Urbana-Champaign, July 2003.

BibTeX Entry:

" Memory Safety Without Runtime Checks or Garbage Collection"
From gaeke at cs.uiuc.edu Mon Feb 23 15:13:00 2004 From: gaeke at cs.uiuc.edu (Brian Gaeke) Date: Mon Feb 23 15:13:00 2004 Subject: [llvm-commits] CVS: llvm/autoconf/acinclude.m4 Message-ID: <200402232112.PAA04690@zion.cs.uiuc.edu> Changes in directory llvm/autoconf: acinclude.m4 updated: 1.4 -> 1.5 --- Log message: Remove check for slist --- Diffs of the changes: (+0 -31) Index: llvm/autoconf/acinclude.m4 diff -u llvm/autoconf/acinclude.m4:1.4 llvm/autoconf/acinclude.m4:1.5 --- llvm/autoconf/acinclude.m4:1.4 Mon Feb 23 12:56:03 2004 +++ llvm/autoconf/acinclude.m4 Mon Feb 23 15:12:44 2004 @@ -6080,37 +6080,6 @@ AC_SUBST(HAVE_FWD_ITERATOR)]) # -# Check for slist extension. This is from -# http://www.gnu.org/software/ac-archive/htmldoc/ac_cxx_have_ext_slist.html -# -AC_DEFUN([AC_CXX_HAVE_EXT_SLIST], -[AC_CACHE_CHECK(whether the compiler has ext/slist, -ac_cv_cxx_have_ext_slist, -[AC_REQUIRE([AC_CXX_NAMESPACES]) - AC_LANG_SAVE - AC_LANG_CPLUSPLUS - AC_TRY_COMPILE([#include -#ifdef HAVE_NAMESPACES -using namespace std; -#endif],[slist s; return 0;], - ac_cv_cxx_have_ext_slist=std, ac_cv_cxx_have_ext_slist=no) - AC_TRY_COMPILE([#include -#ifdef HAVE_NAMESPACES -using namespace __gnu_cxx; -#endif],[slist s; return 0;], - ac_cv_cxx_have_ext_slist=gnu, ac_cv_cxx_have_ext_slist=no) - - AC_LANG_RESTORE -]) -if test "$ac_cv_cxx_have_ext_slist" = std; then - AC_DEFINE(HAVE_EXT_SLIST,std,[define if the compiler has ext/slist]) -fi -if test "$ac_cv_cxx_have_ext_slist" = gnu; then - AC_DEFINE(HAVE_EXT_SLIST,gnu,[define if the compiler has ext/slist]) -fi -]) - -# # Check for FLEX. This is modified from # http://www.gnu.org/software/ac-archive/htmldoc/ac_cxx_namespaces.html # From gaeke at cs.uiuc.edu Mon Feb 23 15:14:02 2004 From: gaeke at cs.uiuc.edu (Brian Gaeke) Date: Mon Feb 23 15:14:02 2004 Subject: [llvm-commits] CVS: llvm/autoconf/configure.ac Message-ID: <200402232113.PAA04701@zion.cs.uiuc.edu> Changes in directory llvm/autoconf: configure.ac updated: 1.75 -> 1.76 --- Log message: Remove check for slist --- Diffs of the changes: (+0 -1) Index: llvm/autoconf/configure.ac diff -u llvm/autoconf/configure.ac:1.75 llvm/autoconf/configure.ac:1.76 --- llvm/autoconf/configure.ac:1.75 Mon Feb 23 12:56:05 2004 +++ llvm/autoconf/configure.ac Mon Feb 23 15:12:58 2004 @@ -250,7 +250,6 @@ dnl Check for C++ extensions AC_CXX_HAVE_HASH_MAP AC_CXX_HAVE_HASH_SET -AC_CXX_HAVE_EXT_SLIST AC_CXX_HAVE_STD_ITERATOR AC_CXX_HAVE_BI_ITERATOR AC_CXX_HAVE_FWD_ITERATOR From gaeke at cs.uiuc.edu Mon Feb 23 15:31:01 2004 From: gaeke at cs.uiuc.edu (Brian Gaeke) Date: Mon Feb 23 15:31:01 2004 Subject: [llvm-commits] CVS: llvm/include/Config/config.h.in Message-ID: <200402232130.PAA24531@zion.cs.uiuc.edu> Changes in directory llvm/include/Config: config.h.in updated: 1.14 -> 1.15 --- Log message: Regenerated with autoheader-2.57. --- Diffs of the changes: (+0 -7) Index: llvm/include/Config/config.h.in diff -u llvm/include/Config/config.h.in:1.14 llvm/include/Config/config.h.in:1.15 --- llvm/include/Config/config.h.in:1.14 Mon Feb 23 12:56:04 2004 +++ llvm/include/Config/config.h.in Mon Feb 23 15:30:39 2004 @@ -27,9 +27,6 @@ /* Define to 1 if you have the header file. */ #undef HAVE_EXECINFO_H -/* define if the compiler has ext/slist */ -#undef HAVE_EXT_SLIST - /* Define to 1 if you have the header file. */ #undef HAVE_FCNTL_H @@ -85,10 +82,6 @@ /* Define to have the %a format string */ #undef HAVE_PRINTF_A - -/* Define if PThread mutexes (e.g., pthread_mutex_lock) are available in the - system's thread library. */ -#undef HAVE_PTHREAD_MUTEX_LOCK /* Define to 1 if you have the header file. */ #undef HAVE_STDINT_H From gaeke at cs.uiuc.edu Mon Feb 23 15:31:30 2004 From: gaeke at cs.uiuc.edu (Brian Gaeke) Date: Mon Feb 23 15:31:30 2004 Subject: [llvm-commits] CVS: llvm/configure Message-ID: <200402232130.PAA24526@zion.cs.uiuc.edu> Changes in directory llvm: configure updated: 1.78 -> 1.79 --- Log message: Regenerated with autoconf-2.57. --- Diffs of the changes: (+8 -125) Index: llvm/configure diff -u llvm/configure:1.78 llvm/configure:1.79 --- llvm/configure:1.78 Mon Feb 23 12:56:02 2004 +++ llvm/configure Mon Feb 23 15:30:37 2004 @@ -465,7 +465,7 @@ #endif" ac_unique_file=""Makefile.config.in"" -ac_subst_vars='SHELL PATH_SEPARATOR PACKAGE_NAME PACKAGE_TARNAME PACKAGE_VERSION PACKAGE_STRING PACKAGE_BUGREPORT exec_prefix prefix program_transform_name bindir sbindir libexecdir datadir sysconfdir sharedstatedir localstatedir libdir includedir oldincludedir infodir mandir build_alias host_alias target_alias DEFS ECHO_C ECHO_N ECHO_T LIBS subdirs INSTALL_PROGRAM INSTALL_SCRIPT INSTALL_DATA build build_cpu build_vendor build_os host host_cpu host_vendor host_os target target_cpu target_vendor target_os OS LLVMGCCDIR ARCH CXX CXXFLAGS LDFLAGS CPPFLAGS ac_ct_CXX EXEEXT OBJEXT CC CFLAGS ac_ct_CC CPP ifGNUmake LEX LEXLIB LEX_OUTPUT_ROOT YACC BISON EGREP LN_S ECHO AR ac_ct_AR RANLIB ac_ct_RANLIB STRIP ac_ct_STRIP CXXCPP F77 FFLAGS ac_ct_F77 LIBTOOL DOT ETAGS ETAGSFLAGS PYTHON QMTEST ENDIAN HAVE_STD_EXT_HASH_MAP HAVE_GNU_EXT_HASH_MAP HAVE_GLOBAL_HASH_MAP HAVE_STD_EXT_HASH_SET HAVE_GNU_EXT_HASH_SET HAVE_GLOBAL_HASH_SET HAVE_STD_ITERATOR HAVE_BI_ITERATOR HAVE_FWD_ITERATOR ALLOCA ! MMAP_FILE ENABLE_OPTIMIZED SPEC_ROOT USE_SPEC SPEC95_ROOT USE_SPEC95 POVRAY_ROOT USE_POVRAY UPB DISABLE_LLC_DIFFS JIT LLVMCC1 LLVMCC1PLUS BCR PAPIDIR SHLIBEXT LIBOBJS LTLIBOBJS' +ac_subst_vars='SHELL PATH_SEPARATOR PACKAGE_NAME PACKAGE_TARNAME PACKAGE_VERSION PACKAGE_STRING PACKAGE_BUGREPORT exec_prefix prefix program_transform_name bindir sbindir libexecdir datadir sysconfdir sharedstatedir localstatedir libdir includedir oldincludedir infodir mandir build_alias host_alias target_alias DEFS ECHO_C ECHO_N ECHO_T LIBS subdirs INSTALL_PROGRAM INSTALL_SCRIPT INSTALL_DATA build build_cpu build_vendor build_os host host_cpu host_vendor host_os target target_cpu target_vendor target_os OS LLVMGCCDIR ARCH CXX CXXFLAGS LDFLAGS CPPFLAGS ac_ct_CXX EXEEXT OBJEXT CC CFLAGS ac_ct_CC CPP ifGNUmake LEX LEXLIB LEX_OUTPUT_ROOT YACC BISON EGREP LN_S ECHO AR ac_ct_AR RANLIB ac_ct_RANLIB STRIP ac_ct_STRIP CXXCPP F77 FFLAGS ac_ct_F77 LIBTOOL DOT ETAGS ETAGSFLAGS PYTHON QMTEST HAVE_PTHREAD_MUTEX_LOCK ENDIAN HAVE_STD_EXT_HASH_MAP HAVE_GNU_EXT_HASH_MAP HAVE_GLOBAL_HASH_MAP HAVE_STD_EXT_HASH_SET HAVE_GNU_EXT_HASH_SET HAVE_GLOBAL_HASH_SET HAVE_STD_ITERATOR HAVE_BI_ITERATOR H! AVE_FWD_ITERATOR ALLOCA MMAP_FILE ENABLE_OPTIMIZED SPEC_ROOT USE_SPEC SPEC95_ROOT USE_SPEC95 POVRAY_ROOT USE_POVRAY UPB DISABLE_LLC_DIFFS JIT LLVMCC1 LLVMCC1PLUS BCR PAPIDIR SHLIBEXT LIBOBJS LTLIBOBJS' ac_subst_files='' # Initialize some variables set by options. @@ -18674,14 +18674,13 @@ echo "${ECHO_T}$ac_cv_search_pthread_mutex_lock" >&6 if test "$ac_cv_search_pthread_mutex_lock" != no; then test "$ac_cv_search_pthread_mutex_lock" = "none required" || LIBS="$ac_cv_search_pthread_mutex_lock $LIBS" - -cat >>confdefs.h <<\_ACEOF -#define HAVE_PTHREAD_MUTEX_LOCK 1 -_ACEOF - + HAVE_PTHREAD_MUTEX_LOCK=1 +else + HAVE_PTHREAD_MUTEX_LOCK=0 fi + echo "$as_me:$LINENO: checking for ANSI C header files" >&5 echo $ECHO_N "checking for ANSI C header files... $ECHO_C" >&6 if test "${ac_cv_header_stdc+set}" = set; then @@ -20155,124 +20154,6 @@ HAVE_GLOBAL_HASH_SET=1 fi -echo "$as_me:$LINENO: checking whether the compiler has ext/slist" >&5 -echo $ECHO_N "checking whether the compiler has ext/slist... $ECHO_C" >&6 -if test "${ac_cv_cxx_have_ext_slist+set}" = set; then - echo $ECHO_N "(cached) $ECHO_C" >&6 -else - - - - ac_ext=cc -ac_cpp='$CXXCPP $CPPFLAGS' -ac_compile='$CXX -c $CXXFLAGS $CPPFLAGS conftest.$ac_ext >&5' -ac_link='$CXX -o conftest$ac_exeext $CXXFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' -ac_compiler_gnu=$ac_cv_cxx_compiler_gnu - - cat >conftest.$ac_ext <<_ACEOF -#line $LINENO "configure" -/* confdefs.h. */ -_ACEOF -cat confdefs.h >>conftest.$ac_ext -cat >>conftest.$ac_ext <<_ACEOF -/* end confdefs.h. */ -#include -#ifdef HAVE_NAMESPACES -using namespace std; -#endif -int -main () -{ -slist s; return 0; - ; - return 0; -} -_ACEOF -rm -f conftest.$ac_objext -if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 - (eval $ac_compile) 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && - { ac_try='test -s conftest.$ac_objext' - { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 - (eval $ac_try) 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; }; then - ac_cv_cxx_have_ext_slist=std -else - echo "$as_me: failed program was:" >&5 -sed 's/^/| /' conftest.$ac_ext >&5 - -ac_cv_cxx_have_ext_slist=no -fi -rm -f conftest.$ac_objext conftest.$ac_ext - cat >conftest.$ac_ext <<_ACEOF -#line $LINENO "configure" -/* confdefs.h. */ -_ACEOF -cat confdefs.h >>conftest.$ac_ext -cat >>conftest.$ac_ext <<_ACEOF -/* end confdefs.h. */ -#include -#ifdef HAVE_NAMESPACES -using namespace __gnu_cxx; -#endif -int -main () -{ -slist s; return 0; - ; - return 0; -} -_ACEOF -rm -f conftest.$ac_objext -if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 - (eval $ac_compile) 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && - { ac_try='test -s conftest.$ac_objext' - { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 - (eval $ac_try) 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; }; then - ac_cv_cxx_have_ext_slist=gnu -else - echo "$as_me: failed program was:" >&5 -sed 's/^/| /' conftest.$ac_ext >&5 - -ac_cv_cxx_have_ext_slist=no -fi -rm -f conftest.$ac_objext conftest.$ac_ext - - ac_ext=c -ac_cpp='$CPP $CPPFLAGS' -ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' -ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' -ac_compiler_gnu=$ac_cv_c_compiler_gnu - - -fi -echo "$as_me:$LINENO: result: $ac_cv_cxx_have_ext_slist" >&5 -echo "${ECHO_T}$ac_cv_cxx_have_ext_slist" >&6 -if test "$ac_cv_cxx_have_ext_slist" = std; then - -cat >>confdefs.h <<\_ACEOF -#define HAVE_EXT_SLIST std -_ACEOF - -fi -if test "$ac_cv_cxx_have_ext_slist" = gnu; then - -cat >>confdefs.h <<\_ACEOF -#define HAVE_EXT_SLIST gnu -_ACEOF - -fi - echo "$as_me:$LINENO: checking whether the compiler has the standard iterator" >&5 echo $ECHO_N "checking whether the compiler has the standard iterator... $ECHO_C" >&6 if test "${ac_cv_cxx_have_std_iterator+set}" = set; then @@ -21916,7 +21797,7 @@ _ACEOF - ac_config_files="$ac_config_files Makefile.config include/Support/iterator include/Support/hash_map include/Support/hash_set" + ac_config_files="$ac_config_files Makefile.config include/Support/iterator include/Support/hash_map include/Support/hash_set include/Support/ThreadSupport.h" cat >confcache <<\_ACEOF # This file is a shell script that caches the results of configure # tests run on this system so they can be shared between configure @@ -22502,6 +22383,7 @@ "include/Support/iterator" ) CONFIG_FILES="$CONFIG_FILES include/Support/iterator" ;; "include/Support/hash_map" ) CONFIG_FILES="$CONFIG_FILES include/Support/hash_map" ;; "include/Support/hash_set" ) CONFIG_FILES="$CONFIG_FILES include/Support/hash_set" ;; + "include/Support/ThreadSupport.h" ) CONFIG_FILES="$CONFIG_FILES include/Support/ThreadSupport.h" ;; "Makefile" ) CONFIG_COMMANDS="$CONFIG_COMMANDS Makefile" ;; "Makefile.common" ) CONFIG_COMMANDS="$CONFIG_COMMANDS Makefile.common" ;; "lib/Makefile" ) CONFIG_COMMANDS="$CONFIG_COMMANDS lib/Makefile" ;; @@ -22691,6 +22573,7 @@ s, at ETAGSFLAGS@,$ETAGSFLAGS,;t t s, at PYTHON@,$PYTHON,;t t s, at QMTEST@,$QMTEST,;t t +s, at HAVE_PTHREAD_MUTEX_LOCK@,$HAVE_PTHREAD_MUTEX_LOCK,;t t s, at ENDIAN@,$ENDIAN,;t t s, at HAVE_STD_EXT_HASH_MAP@,$HAVE_STD_EXT_HASH_MAP,;t t s, at HAVE_GNU_EXT_HASH_MAP@,$HAVE_GNU_EXT_HASH_MAP,;t t From gaeke at cs.uiuc.edu Mon Feb 23 15:32:00 2004 From: gaeke at cs.uiuc.edu (Brian Gaeke) Date: Mon Feb 23 15:32:00 2004 Subject: [llvm-commits] CVS: llvm/autoconf/configure.ac Message-ID: <200402232130.PAA24519@zion.cs.uiuc.edu> Changes in directory llvm/autoconf: configure.ac updated: 1.76 -> 1.77 --- Log message: Change test for pthreads to use AC_SUBST; add ThreadSupport.h as an AC_OUTPUT. --- Diffs of the changes: (+4 -2) Index: llvm/autoconf/configure.ac diff -u llvm/autoconf/configure.ac:1.76 llvm/autoconf/configure.ac:1.77 --- llvm/autoconf/configure.ac:1.76 Mon Feb 23 15:12:58 2004 +++ llvm/autoconf/configure.ac Mon Feb 23 15:30:36 2004 @@ -222,7 +222,8 @@ dnl pthread locking functions are optional - but llvm will not be thread-safe dnl without locks. -AC_SEARCH_LIBS(pthread_mutex_lock,pthread,AC_DEFINE(HAVE_PTHREAD_MUTEX_LOCK,1,[Define if PThread mutexes (e.g., pthread_mutex_lock) are available in the system's thread library.])) +AC_SEARCH_LIBS(pthread_mutex_lock,pthread,HAVE_PTHREAD_MUTEX_LOCK=1,HAVE_PTHREAD_MUTEX_LOCK=0) +AC_SUBST(HAVE_PTHREAD_MUTEX_LOCK) dnl Checks for header files. dnl We don't check for ancient stuff or things that are guaranteed to be there @@ -447,7 +448,8 @@ AC_OUTPUT(Makefile.config include/Support/iterator include/Support/hash_map - include/Support/hash_set) + include/Support/hash_set + include/Support/ThreadSupport.h) dnl Warn loudly if llvm-gcc was not obviously working if test $llvmgccwarn = yes From gaeke at cs.uiuc.edu Mon Feb 23 15:32:29 2004 From: gaeke at cs.uiuc.edu (Brian Gaeke) Date: Mon Feb 23 15:32:29 2004 Subject: [llvm-commits] CVS: llvm/include/Support/ThreadSupport.h.in ThreadSupport.h Message-ID: <200402232130.PAA24512@zion.cs.uiuc.edu> Changes in directory llvm/include/Support: ThreadSupport.h.in added (r1.1) ThreadSupport.h (r1.3) removed --- Log message: ThreadSupport.h is now output from configure. --- Diffs of the changes: (+40 -0) Index: llvm/include/Support/ThreadSupport.h.in diff -c /dev/null llvm/include/Support/ThreadSupport.h.in:1.1 *** /dev/null Mon Feb 23 15:30:41 2004 --- llvm/include/Support/ThreadSupport.h.in Mon Feb 23 15:30:29 2004 *************** *** 0 **** --- 1,40 ---- + //===-- Support/ThreadSupport.h - Generic threading support -----*- C++ -*-===// + // + // The LLVM Compiler Infrastructure + // + // This file was developed by the LLVM research group and is distributed under + // the University of Illinois Open Source License. See LICENSE.TXT for details. + // + //===----------------------------------------------------------------------===// + // + // This file defines platform-agnostic interfaces that can be used to write + // multi-threaded programs. Autoconf is used to chose the correct + // implementation of these interfaces, or default to a non-thread-capable system + // if no matching system support is available. + // + //===----------------------------------------------------------------------===// + + #ifndef SUPPORT_THREADSUPPORT_H + #define SUPPORT_THREADSUPPORT_H + + #if @HAVE_PTHREAD_MUTEX_LOCK@ + #include "Support/ThreadSupport-PThreads.h" + #else + #include "Support/ThreadSupport-NoSupport.h" + #endif // If no system support is available + + namespace llvm { + /// MutexLocker - Instances of this class acquire a given Lock when + /// constructed and hold that lock until destruction. + /// + class MutexLocker { + Mutex &M; + MutexLocker(const MutexLocker &); // DO NOT IMPLEMENT + void operator=(const MutexLocker &); // DO NOT IMPLEMENT + public: + MutexLocker(Mutex &m) : M(m) { M.acquire(); } + ~MutexLocker() { M.release(); } + }; + } + + #endif // SUPPORT_THREADSUPPORT_H From lattner at cs.uiuc.edu Mon Feb 23 15:48:01 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon Feb 23 15:48:01 2004 Subject: [llvm-commits] CVS: llvm/lib/Transforms/Scalar/InstructionCombining.cpp Message-ID: <200402232147.PAA28499@zion.cs.uiuc.edu> Changes in directory llvm/lib/Transforms/Scalar: InstructionCombining.cpp updated: 1.162 -> 1.163 --- Log message: Fix a small typeo in my checkin last night that broke vortex and other programs :( --- Diffs of the changes: (+1 -1) Index: llvm/lib/Transforms/Scalar/InstructionCombining.cpp diff -u llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.162 llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.163 --- llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.162 Mon Feb 23 14:30:06 2004 +++ llvm/lib/Transforms/Scalar/InstructionCombining.cpp Mon Feb 23 15:46:42 2004 @@ -1398,7 +1398,7 @@ else if (I.getOpcode() == Instruction::SetGT && cast(CI)->getValue() == -1) // X > -1 => x < 128 - return BinaryOperator::create(Instruction::SetGT, CastOp, + return BinaryOperator::create(Instruction::SetLT, CastOp, ConstantUInt::get(SrcTy, 1ULL << (SrcTySize*8-1))); } else { ConstantUInt *CUI = cast(CI); From lattner at cs.uiuc.edu Mon Feb 23 15:48:30 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon Feb 23 15:48:30 2004 Subject: [llvm-commits] CVS: llvm/lib/Transforms/Scalar/InstructionCombining.cpp Message-ID: <200402232147.PAA28324@zion.cs.uiuc.edu> Changes in directory llvm/lib/Transforms/Scalar: InstructionCombining.cpp updated: 1.163 -> 1.164 --- Log message: Generate much more efficient code in programs like pifft --- Diffs of the changes: (+8 -0) Index: llvm/lib/Transforms/Scalar/InstructionCombining.cpp diff -u llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.163 llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.164 --- llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.163 Mon Feb 23 15:46:42 2004 +++ llvm/lib/Transforms/Scalar/InstructionCombining.cpp Mon Feb 23 15:46:58 2004 @@ -2163,6 +2163,14 @@ // Replace: gep (gep %P, long B), long A, ... // With: T = long A+B; gep %P, T, ... // + // Note that if our source is a gep chain itself that we wait for that + // chain to be resolved before we perform this transformation. This + // avoids us creating a TON of code in some cases. + // + if (isa(Src->getOperand(0)) && + cast(Src->getOperand(0))->getNumOperands() == 2) + return 0; // Wait until our source is folded to completion. + Value *Sum = BinaryOperator::create(Instruction::Add, Src->getOperand(1), GEP.getOperand(1), Src->getName()+".sum", &GEP); From gaeke at cs.uiuc.edu Mon Feb 23 16:08:01 2004 From: gaeke at cs.uiuc.edu (Brian Gaeke) Date: Mon Feb 23 16:08:01 2004 Subject: [llvm-commits] CVS: llvm/include/Support/DataTypes.h.in DataTypes.h Message-ID: <200402232207.QAA07051@zion.cs.uiuc.edu> Changes in directory llvm/include/Support: DataTypes.h.in added (r1.1) DataTypes.h (r1.18) removed --- Log message: DataTypes.h is now output from configure, and shortened --- Diffs of the changes: (+45 -0) Index: llvm/include/Support/DataTypes.h.in diff -c /dev/null llvm/include/Support/DataTypes.h.in:1.1 *** /dev/null Mon Feb 23 16:07:36 2004 --- llvm/include/Support/DataTypes.h.in Mon Feb 23 16:07:26 2004 *************** *** 0 **** --- 1,45 ---- + //===-- include/Support/DataTypes.h - Define fixed size types ---*- C++ -*-===// + // + // The LLVM Compiler Infrastructure + // + // This file was developed by the LLVM research group and is distributed under + // the University of Illinois Open Source License. See LICENSE.TXT for details. + // + //===----------------------------------------------------------------------===// + // + // This file contains definitions to figure out the size of _HOST_ data types. + // This file is important because different host OS's define different macros, + // which makes portability tough. This file exports the following definitions: + // + // int64_t : is a typedef for the signed 64 bit system type + // uint64_t : is a typedef for the unsigned 64 bit system type + // INT64_MAX : is a #define specifying the max value for int64_t's + // + // No library is required when using these functinons. + // + //===----------------------------------------------------------------------===// + + #ifndef SUPPORT_DATATYPES_H + #define SUPPORT_DATATYPES_H + + // Note that this header's correct operation depends on __STDC_LIMIT_MACROS + // being defined. We would define it here, but in order to prevent Bad Things + // happening when system headers or C++ STL headers include stdint.h before + // we define it here, we define it on the g++ command line (in Makefile.rules). + #if !defined(__STDC_LIMIT_MACROS) + # error "Must #define __STDC_LIMIT_MACROS before #including Support/DataTypes.h" + #endif + + // Note that includes , if this is a C99 system. + @INCLUDE_INTTYPES_H@ + @INCLUDE_SYS_TYPES_H@ + + #if !defined(INT64_MAX) + /* We couldn't determine INT64_MAX; default it. */ + # define INT64_MAX 9223372036854775807LL + #endif + #if !defined(UINT64_MAX) + # define UINT64_MAX 0xffffffffffffffffULL + #endif + + #endif /* SUPPORT_DATATYPES_H */ From gaeke at cs.uiuc.edu Mon Feb 23 16:08:33 2004 From: gaeke at cs.uiuc.edu (Brian Gaeke) Date: Mon Feb 23 16:08:33 2004 Subject: [llvm-commits] CVS: llvm/autoconf/configure.ac Message-ID: <200402232207.QAA06990@zion.cs.uiuc.edu> Changes in directory llvm/autoconf: configure.ac updated: 1.77 -> 1.78 --- Log message: Add SUBSTing checks for sys/types.h and inttypes.h; add DataTypes.h to AC_OUTPUT. --- Diffs of the changes: (+15 -2) Index: llvm/autoconf/configure.ac diff -u llvm/autoconf/configure.ac:1.77 llvm/autoconf/configure.ac:1.78 --- llvm/autoconf/configure.ac:1.77 Mon Feb 23 15:30:36 2004 +++ llvm/autoconf/configure.ac Mon Feb 23 16:07:01 2004 @@ -234,6 +234,18 @@ dnl Checks for POSIX and other various system-specific header files AC_CHECK_HEADERS(fcntl.h limits.h sys/time.h unistd.h malloc.h sys/mman.h sys/resource.h dlfcn.h link.h execinfo.h) +dnl Check for things that need to be included in public headers, and so +dnl for which we may not have access to a HAVE_* preprocessor #define. +dnl (primarily used in DataTypes.h) +AC_CHECK_HEADER([sys/types.h], + [INCLUDE_SYS_TYPES_H='#include '], + [INCLUDE_SYS_TYPES_H='']) +AC_SUBST(INCLUDE_SYS_TYPES_H) +AC_CHECK_HEADER([inttypes.h], + [INCLUDE_INTTYPES_H='#include '], + [INCLUDE_INTTYPES_H='']) +AC_SUBST(INCLUDE_INTTYPES_H) + dnl Check for types AC_TYPE_PID_T AC_TYPE_SIZE_T @@ -446,10 +458,11 @@ dnl Create the output files AC_OUTPUT(Makefile.config - include/Support/iterator + include/Support/DataTypes.h + include/Support/ThreadSupport.h include/Support/hash_map include/Support/hash_set - include/Support/ThreadSupport.h) + include/Support/iterator) dnl Warn loudly if llvm-gcc was not obviously working if test $llvmgccwarn = yes From gaeke at cs.uiuc.edu Mon Feb 23 16:09:02 2004 From: gaeke at cs.uiuc.edu (Brian Gaeke) Date: Mon Feb 23 16:09:02 2004 Subject: [llvm-commits] CVS: llvm/configure Message-ID: <200402232207.QAA06982@zion.cs.uiuc.edu> Changes in directory llvm: configure updated: 1.79 -> 1.80 --- Log message: Regenerated with autoconf-2.57. --- Diffs of the changes: (+282 -4) Index: llvm/configure diff -u llvm/configure:1.79 llvm/configure:1.80 --- llvm/configure:1.79 Mon Feb 23 15:30:37 2004 +++ llvm/configure Mon Feb 23 16:07:00 2004 @@ -465,7 +465,7 @@ #endif" ac_unique_file=""Makefile.config.in"" -ac_subst_vars='SHELL PATH_SEPARATOR PACKAGE_NAME PACKAGE_TARNAME PACKAGE_VERSION PACKAGE_STRING PACKAGE_BUGREPORT exec_prefix prefix program_transform_name bindir sbindir libexecdir datadir sysconfdir sharedstatedir localstatedir libdir includedir oldincludedir infodir mandir build_alias host_alias target_alias DEFS ECHO_C ECHO_N ECHO_T LIBS subdirs INSTALL_PROGRAM INSTALL_SCRIPT INSTALL_DATA build build_cpu build_vendor build_os host host_cpu host_vendor host_os target target_cpu target_vendor target_os OS LLVMGCCDIR ARCH CXX CXXFLAGS LDFLAGS CPPFLAGS ac_ct_CXX EXEEXT OBJEXT CC CFLAGS ac_ct_CC CPP ifGNUmake LEX LEXLIB LEX_OUTPUT_ROOT YACC BISON EGREP LN_S ECHO AR ac_ct_AR RANLIB ac_ct_RANLIB STRIP ac_ct_STRIP CXXCPP F77 FFLAGS ac_ct_F77 LIBTOOL DOT ETAGS ETAGSFLAGS PYTHON QMTEST HAVE_PTHREAD_MUTEX_LOCK ENDIAN HAVE_STD_EXT_HASH_MAP HAVE_GNU_EXT_HASH_MAP HAVE_GLOBAL_HASH_MAP HAVE_STD_EXT_HASH_SET HAVE_GNU_EXT_HASH_SET HAVE_GLOBAL_HASH_SET HAVE_STD_ITERATOR HAVE_BI_ITERATOR H! AVE_FWD_ITERATOR ALLOCA MMAP_FILE ENABLE_OPTIMIZED SPEC_ROOT USE_SPEC SPEC95_ROOT USE_SPEC95 POVRAY_ROOT USE_POVRAY UPB DISABLE_LLC_DIFFS JIT LLVMCC1 LLVMCC1PLUS BCR PAPIDIR SHLIBEXT LIBOBJS LTLIBOBJS' +ac_subst_vars='SHELL PATH_SEPARATOR PACKAGE_NAME PACKAGE_TARNAME PACKAGE_VERSION PACKAGE_STRING PACKAGE_BUGREPORT exec_prefix prefix program_transform_name bindir sbindir libexecdir datadir sysconfdir sharedstatedir localstatedir libdir includedir oldincludedir infodir mandir build_alias host_alias target_alias DEFS ECHO_C ECHO_N ECHO_T LIBS subdirs INSTALL_PROGRAM INSTALL_SCRIPT INSTALL_DATA build build_cpu build_vendor build_os host host_cpu host_vendor host_os target target_cpu target_vendor target_os OS LLVMGCCDIR ARCH CXX CXXFLAGS LDFLAGS CPPFLAGS ac_ct_CXX EXEEXT OBJEXT CC CFLAGS ac_ct_CC CPP ifGNUmake LEX LEXLIB LEX_OUTPUT_ROOT YACC BISON EGREP LN_S ECHO AR ac_ct_AR RANLIB ac_ct_RANLIB STRIP ac_ct_STRIP CXXCPP F77 FFLAGS ac_ct_F77 LIBTOOL DOT ETAGS ETAGSFLAGS PYTHON QMTEST HAVE_PTHREAD_MUTEX_LOCK INCLUDE_SYS_TYPES_H INCLUDE_INTTYPES_H ENDIAN HAVE_STD_EXT_HASH_MAP HAVE_GNU_EXT_HASH_MAP HAVE_GLOBAL_HASH_MAP HAVE_STD_EXT_HASH_SET HAVE_GNU_EXT_HASH_SET HAVE_GLOBAL_HASH_S! ET HAVE_STD_ITERATOR HAVE_BI_ITERATOR HAVE_FWD_ITERATOR ALLOCA MMAP_FILE ENABLE_OPTIMIZED SPEC_ROOT USE_SPEC SPEC95_ROOT USE_SPEC95 POVRAY_ROOT USE_POVRAY UPB DISABLE_LLC_DIFFS JIT LLVMCC1 LLVMCC1PLUS BCR PAPIDIR SHLIBEXT LIBOBJS LTLIBOBJS' ac_subst_files='' # Initialize some variables set by options. @@ -19056,6 +19056,281 @@ done +if test "${ac_cv_header_sys_types_h+set}" = set; then + echo "$as_me:$LINENO: checking for sys/types.h" >&5 +echo $ECHO_N "checking for sys/types.h... $ECHO_C" >&6 +if test "${ac_cv_header_sys_types_h+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +fi +echo "$as_me:$LINENO: result: $ac_cv_header_sys_types_h" >&5 +echo "${ECHO_T}$ac_cv_header_sys_types_h" >&6 +else + # Is the header compilable? +echo "$as_me:$LINENO: checking sys/types.h usability" >&5 +echo $ECHO_N "checking sys/types.h usability... $ECHO_C" >&6 +cat >conftest.$ac_ext <<_ACEOF +#line $LINENO "configure" +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default +#include +_ACEOF +rm -f conftest.$ac_objext +if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 + (eval $ac_compile) 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -s conftest.$ac_objext' + { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 + (eval $ac_try) 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_header_compiler=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + +ac_header_compiler=no +fi +rm -f conftest.$ac_objext conftest.$ac_ext +echo "$as_me:$LINENO: result: $ac_header_compiler" >&5 +echo "${ECHO_T}$ac_header_compiler" >&6 + +# Is the header present? +echo "$as_me:$LINENO: checking sys/types.h presence" >&5 +echo $ECHO_N "checking sys/types.h presence... $ECHO_C" >&6 +cat >conftest.$ac_ext <<_ACEOF +#line $LINENO "configure" +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include +_ACEOF +if { (eval echo "$as_me:$LINENO: \"$ac_cpp conftest.$ac_ext\"") >&5 + (eval $ac_cpp conftest.$ac_ext) 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } >/dev/null; then + if test -s conftest.err; then + ac_cpp_err=$ac_c_preproc_warn_flag + else + ac_cpp_err= + fi +else + ac_cpp_err=yes +fi +if test -z "$ac_cpp_err"; then + ac_header_preproc=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_header_preproc=no +fi +rm -f conftest.err conftest.$ac_ext +echo "$as_me:$LINENO: result: $ac_header_preproc" >&5 +echo "${ECHO_T}$ac_header_preproc" >&6 + +# So? What about this header? +case $ac_header_compiler:$ac_header_preproc in + yes:no ) + { echo "$as_me:$LINENO: WARNING: sys/types.h: accepted by the compiler, rejected by the preprocessor!" >&5 +echo "$as_me: WARNING: sys/types.h: accepted by the compiler, rejected by the preprocessor!" >&2;} + { echo "$as_me:$LINENO: WARNING: sys/types.h: proceeding with the preprocessor's result" >&5 +echo "$as_me: WARNING: sys/types.h: proceeding with the preprocessor's result" >&2;} + ( + cat <<\_ASBOX +## ------------------------------------ ## +## Report this to bug-autoconf at gnu.org. ## +## ------------------------------------ ## +_ASBOX + ) | + sed "s/^/$as_me: WARNING: /" >&2 + ;; + no:yes ) + { echo "$as_me:$LINENO: WARNING: sys/types.h: present but cannot be compiled" >&5 +echo "$as_me: WARNING: sys/types.h: present but cannot be compiled" >&2;} + { echo "$as_me:$LINENO: WARNING: sys/types.h: check for missing prerequisite headers?" >&5 +echo "$as_me: WARNING: sys/types.h: check for missing prerequisite headers?" >&2;} + { echo "$as_me:$LINENO: WARNING: sys/types.h: proceeding with the preprocessor's result" >&5 +echo "$as_me: WARNING: sys/types.h: proceeding with the preprocessor's result" >&2;} + ( + cat <<\_ASBOX +## ------------------------------------ ## +## Report this to bug-autoconf at gnu.org. ## +## ------------------------------------ ## +_ASBOX + ) | + sed "s/^/$as_me: WARNING: /" >&2 + ;; +esac +echo "$as_me:$LINENO: checking for sys/types.h" >&5 +echo $ECHO_N "checking for sys/types.h... $ECHO_C" >&6 +if test "${ac_cv_header_sys_types_h+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + ac_cv_header_sys_types_h=$ac_header_preproc +fi +echo "$as_me:$LINENO: result: $ac_cv_header_sys_types_h" >&5 +echo "${ECHO_T}$ac_cv_header_sys_types_h" >&6 + +fi +if test $ac_cv_header_sys_types_h = yes; then + INCLUDE_SYS_TYPES_H='#include ' +else + INCLUDE_SYS_TYPES_H='' +fi + + + +if test "${ac_cv_header_inttypes_h+set}" = set; then + echo "$as_me:$LINENO: checking for inttypes.h" >&5 +echo $ECHO_N "checking for inttypes.h... $ECHO_C" >&6 +if test "${ac_cv_header_inttypes_h+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +fi +echo "$as_me:$LINENO: result: $ac_cv_header_inttypes_h" >&5 +echo "${ECHO_T}$ac_cv_header_inttypes_h" >&6 +else + # Is the header compilable? +echo "$as_me:$LINENO: checking inttypes.h usability" >&5 +echo $ECHO_N "checking inttypes.h usability... $ECHO_C" >&6 +cat >conftest.$ac_ext <<_ACEOF +#line $LINENO "configure" +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default +#include +_ACEOF +rm -f conftest.$ac_objext +if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 + (eval $ac_compile) 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -s conftest.$ac_objext' + { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 + (eval $ac_try) 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_header_compiler=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + +ac_header_compiler=no +fi +rm -f conftest.$ac_objext conftest.$ac_ext +echo "$as_me:$LINENO: result: $ac_header_compiler" >&5 +echo "${ECHO_T}$ac_header_compiler" >&6 + +# Is the header present? +echo "$as_me:$LINENO: checking inttypes.h presence" >&5 +echo $ECHO_N "checking inttypes.h presence... $ECHO_C" >&6 +cat >conftest.$ac_ext <<_ACEOF +#line $LINENO "configure" +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include +_ACEOF +if { (eval echo "$as_me:$LINENO: \"$ac_cpp conftest.$ac_ext\"") >&5 + (eval $ac_cpp conftest.$ac_ext) 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } >/dev/null; then + if test -s conftest.err; then + ac_cpp_err=$ac_c_preproc_warn_flag + else + ac_cpp_err= + fi +else + ac_cpp_err=yes +fi +if test -z "$ac_cpp_err"; then + ac_header_preproc=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_header_preproc=no +fi +rm -f conftest.err conftest.$ac_ext +echo "$as_me:$LINENO: result: $ac_header_preproc" >&5 +echo "${ECHO_T}$ac_header_preproc" >&6 + +# So? What about this header? +case $ac_header_compiler:$ac_header_preproc in + yes:no ) + { echo "$as_me:$LINENO: WARNING: inttypes.h: accepted by the compiler, rejected by the preprocessor!" >&5 +echo "$as_me: WARNING: inttypes.h: accepted by the compiler, rejected by the preprocessor!" >&2;} + { echo "$as_me:$LINENO: WARNING: inttypes.h: proceeding with the preprocessor's result" >&5 +echo "$as_me: WARNING: inttypes.h: proceeding with the preprocessor's result" >&2;} + ( + cat <<\_ASBOX +## ------------------------------------ ## +## Report this to bug-autoconf at gnu.org. ## +## ------------------------------------ ## +_ASBOX + ) | + sed "s/^/$as_me: WARNING: /" >&2 + ;; + no:yes ) + { echo "$as_me:$LINENO: WARNING: inttypes.h: present but cannot be compiled" >&5 +echo "$as_me: WARNING: inttypes.h: present but cannot be compiled" >&2;} + { echo "$as_me:$LINENO: WARNING: inttypes.h: check for missing prerequisite headers?" >&5 +echo "$as_me: WARNING: inttypes.h: check for missing prerequisite headers?" >&2;} + { echo "$as_me:$LINENO: WARNING: inttypes.h: proceeding with the preprocessor's result" >&5 +echo "$as_me: WARNING: inttypes.h: proceeding with the preprocessor's result" >&2;} + ( + cat <<\_ASBOX +## ------------------------------------ ## +## Report this to bug-autoconf at gnu.org. ## +## ------------------------------------ ## +_ASBOX + ) | + sed "s/^/$as_me: WARNING: /" >&2 + ;; +esac +echo "$as_me:$LINENO: checking for inttypes.h" >&5 +echo $ECHO_N "checking for inttypes.h... $ECHO_C" >&6 +if test "${ac_cv_header_inttypes_h+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + ac_cv_header_inttypes_h=$ac_header_preproc +fi +echo "$as_me:$LINENO: result: $ac_cv_header_inttypes_h" >&5 +echo "${ECHO_T}$ac_cv_header_inttypes_h" >&6 + +fi +if test $ac_cv_header_inttypes_h = yes; then + INCLUDE_INTTYPES_H='#include ' +else + INCLUDE_INTTYPES_H='' +fi + + + + echo "$as_me:$LINENO: checking for pid_t" >&5 echo $ECHO_N "checking for pid_t... $ECHO_C" >&6 if test "${ac_cv_type_pid_t+set}" = set; then @@ -21797,7 +22072,7 @@ _ACEOF - ac_config_files="$ac_config_files Makefile.config include/Support/iterator include/Support/hash_map include/Support/hash_set include/Support/ThreadSupport.h" + ac_config_files="$ac_config_files Makefile.config include/Support/DataTypes.h include/Support/ThreadSupport.h include/Support/hash_map include/Support/hash_set include/Support/iterator" cat >confcache <<\_ACEOF # This file is a shell script that caches the results of configure # tests run on this system so they can be shared between configure @@ -22380,10 +22655,11 @@ case "$ac_config_target" in # Handling of arguments. "Makefile.config" ) CONFIG_FILES="$CONFIG_FILES Makefile.config" ;; - "include/Support/iterator" ) CONFIG_FILES="$CONFIG_FILES include/Support/iterator" ;; + "include/Support/DataTypes.h" ) CONFIG_FILES="$CONFIG_FILES include/Support/DataTypes.h" ;; + "include/Support/ThreadSupport.h" ) CONFIG_FILES="$CONFIG_FILES include/Support/ThreadSupport.h" ;; "include/Support/hash_map" ) CONFIG_FILES="$CONFIG_FILES include/Support/hash_map" ;; "include/Support/hash_set" ) CONFIG_FILES="$CONFIG_FILES include/Support/hash_set" ;; - "include/Support/ThreadSupport.h" ) CONFIG_FILES="$CONFIG_FILES include/Support/ThreadSupport.h" ;; + "include/Support/iterator" ) CONFIG_FILES="$CONFIG_FILES include/Support/iterator" ;; "Makefile" ) CONFIG_COMMANDS="$CONFIG_COMMANDS Makefile" ;; "Makefile.common" ) CONFIG_COMMANDS="$CONFIG_COMMANDS Makefile.common" ;; "lib/Makefile" ) CONFIG_COMMANDS="$CONFIG_COMMANDS lib/Makefile" ;; @@ -22574,6 +22850,8 @@ s, at PYTHON@,$PYTHON,;t t s, at QMTEST@,$QMTEST,;t t s, at HAVE_PTHREAD_MUTEX_LOCK@,$HAVE_PTHREAD_MUTEX_LOCK,;t t +s, at INCLUDE_SYS_TYPES_H@,$INCLUDE_SYS_TYPES_H,;t t +s, at INCLUDE_INTTYPES_H@,$INCLUDE_INTTYPES_H,;t t s, at ENDIAN@,$ENDIAN,;t t s, at HAVE_STD_EXT_HASH_MAP@,$HAVE_STD_EXT_HASH_MAP,;t t s, at HAVE_GNU_EXT_HASH_MAP@,$HAVE_GNU_EXT_HASH_MAP,;t t From alkis at niobe.cs.uiuc.edu Mon Feb 23 16:44:01 2004 From: alkis at niobe.cs.uiuc.edu (Alkis Evlogimenos) Date: Mon Feb 23 16:44:01 2004 Subject: [llvm-commits] CVS: llvm/tools/gccld/Linker.cpp Message-ID: <200402232243.i1NMh9t16659@niobe.cs.uiuc.edu> Changes in directory llvm/tools/gccld: Linker.cpp updated: 1.22 -> 1.23 --- Log message: Include Config/config.h for SHLIBEXT. --- Diffs of the changes: (+1 -0) Index: llvm/tools/gccld/Linker.cpp diff -u llvm/tools/gccld/Linker.cpp:1.22 llvm/tools/gccld/Linker.cpp:1.23 --- llvm/tools/gccld/Linker.cpp:1.22 Mon Jan 26 14:59:41 2004 +++ llvm/tools/gccld/Linker.cpp Mon Feb 23 16:42:51 2004 @@ -21,6 +21,7 @@ #include "llvm/Transforms/IPO.h" #include "llvm/Transforms/Scalar.h" #include "llvm/Transforms/Utils/Linker.h" +#include "Config/config.h" #include "Support/CommandLine.h" #include "Support/FileUtilities.h" #include "Support/Signals.h" From alkis at niobe.cs.uiuc.edu Mon Feb 23 17:09:04 2004 From: alkis at niobe.cs.uiuc.edu (Alkis Evlogimenos) Date: Mon Feb 23 17:09:04 2004 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/VirtRegMap.h VirtRegMap.cpp RegAllocLinearScan.cpp Message-ID: <200402232308.i1NN8MF04213@niobe.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen: VirtRegMap.h added (r1.1) VirtRegMap.cpp added (r1.1) RegAllocLinearScan.cpp updated: 1.61 -> 1.62 --- Log message: Refactor VirtRegMap out of RegAllocLinearScan as the first part of bug 251 (providing a generic machine code rewriter/spiller). --- Diffs of the changes: (+195 -136) Index: llvm/lib/CodeGen/VirtRegMap.h diff -c /dev/null llvm/lib/CodeGen/VirtRegMap.h:1.1 *** /dev/null Mon Feb 23 17:08:21 2004 --- llvm/lib/CodeGen/VirtRegMap.h Mon Feb 23 17:08:11 2004 *************** *** 0 **** --- 1,95 ---- + //===-- llvm/CodeGen/VirtRegMap.h - Virtual Register Map -*- C++ -*--------===// + // + // The LLVM Compiler Infrastructure + // + // This file was developed by the LLVM research group and is distributed under + // the University of Illinois Open Source License. See LICENSE.TXT for details. + // + //===----------------------------------------------------------------------===// + // + // This file implements a virtual register map. This maps virtual + // registers to physical registers and virtual registers to stack + // slots. It is created and updated by a register allocator and then + // used by a machine code rewriter that adds spill code and rewrites + // virtual into physical register references. + // + //===----------------------------------------------------------------------===// + + #ifndef LLVM_CODEGEN_VIRTREGMAP_H + #define LLVM_CODEGEN_VIRTREGMAP_H + + #include "llvm/CodeGen/MachineFunction.h" + #include "llvm/CodeGen/SSARegMap.h" + #include + + namespace llvm { + + class VirtRegMap { + public: + typedef std::vector Virt2PhysMap; + typedef std::vector Virt2StackSlotMap; + + enum { + NO_PHYS_REG = 0, + NO_STACK_SLOT = INT_MAX + }; + + private: + MachineFunction* mf_; + Virt2PhysMap v2pMap_; + Virt2StackSlotMap v2ssMap_; + + // do not implement + VirtRegMap(const VirtRegMap& rhs); + const VirtRegMap& operator=(const VirtRegMap& rhs); + + static unsigned toIndex(unsigned virtReg) { + return virtReg - MRegisterInfo::FirstVirtualRegister; + } + static unsigned fromIndex(unsigned index) { + return index + MRegisterInfo::FirstVirtualRegister; + } + + public: + VirtRegMap(MachineFunction& mf) + : mf_(&mf), + v2pMap_(mf.getSSARegMap()->getNumVirtualRegs(), NO_PHYS_REG), + v2ssMap_(mf.getSSARegMap()->getNumVirtualRegs(), NO_STACK_SLOT) { + } + + unsigned getPhys4Virt(unsigned virtReg) const { + assert(MRegisterInfo::isVirtualRegister(virtReg)); + return v2pMap_[toIndex(virtReg)]; + } + + void assignVirt2Phys(unsigned virtReg, unsigned physReg) { + assert(MRegisterInfo::isVirtualRegister(virtReg) && + MRegisterInfo::isPhysicalRegister(physReg)); + assert(v2pMap_[toIndex(virtReg)] == NO_PHYS_REG && + "attempt to assign physical register to already mapped " + "virtual register"); + v2pMap_[toIndex(virtReg)] = physReg; + } + + void clearVirtReg(unsigned virtReg) { + assert(MRegisterInfo::isVirtualRegister(virtReg)); + assert(v2pMap_[toIndex(virtReg)] != NO_PHYS_REG && + "attempt to clear a not assigned virtual register"); + v2pMap_[toIndex(virtReg)] = NO_PHYS_REG; + } + + int getStackSlot4Virt(unsigned virtReg) const { + assert(MRegisterInfo::isVirtualRegister(virtReg)); + return v2ssMap_[toIndex(virtReg)]; + } + + int assignVirt2StackSlot(unsigned virtReg); + + friend std::ostream& operator<<(std::ostream& os, const VirtRegMap& li); + }; + + std::ostream& operator<<(std::ostream& os, const VirtRegMap& li); + + } // End llvm namespace + + #endif Index: llvm/lib/CodeGen/VirtRegMap.cpp diff -c /dev/null llvm/lib/CodeGen/VirtRegMap.cpp:1.1 *** /dev/null Mon Feb 23 17:08:21 2004 --- llvm/lib/CodeGen/VirtRegMap.cpp Mon Feb 23 17:08:11 2004 *************** *** 0 **** --- 1,55 ---- + //===-- llvm/CodeGen/VirtRegMap.cpp - Virtual Register Map ----------------===// + // + // The LLVM Compiler Infrastructure + // + // This file was developed by the LLVM research group and is distributed under + // the University of Illinois Open Source License. See LICENSE.TXT for details. + // + //===----------------------------------------------------------------------===// + // + // This file implements the virtual register map. + // + //===----------------------------------------------------------------------===// + + #include "VirtRegMap.h" + #include "llvm/CodeGen/MachineFrameInfo.h" + #include "llvm/Target/TargetMachine.h" + #include "Support/Statistic.h" + #include + + using namespace llvm; + + namespace { + Statistic<> numSpills("ra-linearscan", "Number of register spills"); + } + + int VirtRegMap::assignVirt2StackSlot(unsigned virtReg) + { + assert(MRegisterInfo::isVirtualRegister(virtReg)); + assert(v2ssMap_[toIndex(virtReg)] == NO_STACK_SLOT && + "attempt to assign stack slot to already spilled register"); + const TargetRegisterClass* rc = + mf_->getSSARegMap()->getRegClass(virtReg); + int frameIndex = mf_->getFrameInfo()->CreateStackObject(rc); + v2ssMap_[toIndex(virtReg)] = frameIndex; + ++numSpills; + return frameIndex; + } + + std::ostream& llvm::operator<<(std::ostream& os, const VirtRegMap& vrm) + { + const MRegisterInfo* mri = vrm.mf_->getTarget().getRegisterInfo(); + + std::cerr << "********** REGISTER MAP **********\n"; + for (unsigned i = 0, e = vrm.v2pMap_.size(); i != e; ++i) { + if (vrm.v2pMap_[i] != VirtRegMap::NO_PHYS_REG) + std::cerr << "[reg" << VirtRegMap::fromIndex(i) << " -> " + << mri->getName(vrm.v2pMap_[i]) << "]\n"; + } + for (unsigned i = 0, e = vrm.v2ssMap_.size(); i != e; ++i) { + if (vrm.v2ssMap_[i] != VirtRegMap::NO_STACK_SLOT) + std::cerr << "[reg" << VirtRegMap::fromIndex(i) << " -> fi#" + << vrm.v2ssMap_[i] << "]\n"; + } + return std::cerr << '\n'; + } Index: llvm/lib/CodeGen/RegAllocLinearScan.cpp diff -u llvm/lib/CodeGen/RegAllocLinearScan.cpp:1.61 llvm/lib/CodeGen/RegAllocLinearScan.cpp:1.62 --- llvm/lib/CodeGen/RegAllocLinearScan.cpp:1.61 Mon Feb 23 12:45:32 2004 +++ llvm/lib/CodeGen/RegAllocLinearScan.cpp Mon Feb 23 17:08:11 2004 @@ -13,7 +13,6 @@ #define DEBUG_TYPE "regalloc" #include "llvm/Function.h" #include "llvm/CodeGen/LiveVariables.h" -#include "llvm/CodeGen/MachineFrameInfo.h" #include "llvm/CodeGen/MachineFunctionPass.h" #include "llvm/CodeGen/MachineInstr.h" #include "llvm/CodeGen/Passes.h" @@ -28,13 +27,13 @@ #include "Support/STLExtras.h" #include "LiveIntervals.h" #include "PhysRegTracker.h" +#include "VirtRegMap.h" #include using namespace llvm; namespace { Statistic<> numStores("ra-linearscan", "Number of stores added"); Statistic<> numLoads ("ra-linearscan", "Number of loads added"); - Statistic<> numSpills("ra-linearscan", "Number of register spills"); class RA : public MachineFunctionPass { private: @@ -47,12 +46,7 @@ IntervalPtrs unhandled_, fixed_, active_, inactive_, handled_; std::auto_ptr prt_; - - typedef std::map Virt2PhysMap; - Virt2PhysMap v2pMap_; - - typedef std::map Virt2StackSlotMap; - Virt2StackSlotMap v2ssMap_; + std::auto_ptr vrm_; int instrAdded_; @@ -109,40 +103,10 @@ /// 0 unsigned getFreePhysReg(IntervalPtrs::value_type cur); - /// assignVirt2PhysReg - assigns the free physical register to - /// the virtual register passed as arguments - Virt2PhysMap::iterator - assignVirt2PhysReg(unsigned virtReg, unsigned physReg); - - /// clearVirtReg - free the physical register associated with this - /// virtual register and disassociate virtual->physical and - /// physical->virtual mappings - void clearVirtReg(Virt2PhysMap::iterator it); - /// assignVirt2StackSlot - assigns this virtual register to a /// stack slot. returns the stack slot int assignVirt2StackSlot(unsigned virtReg); - /// getStackSlot - returns the offset of the specified - /// register on the stack - int getStackSlot(unsigned virtReg); - - void printVirtRegAssignment() const { - std::cerr << "register assignment:\n"; - - for (Virt2PhysMap::const_iterator - i = v2pMap_.begin(), e = v2pMap_.end(); i != e; ++i) { - assert(i->second != 0); - std::cerr << "[reg" << i->first << " -> " - << mri_->getName(i->second) << "]\n"; - } - for (Virt2StackSlotMap::const_iterator - i = v2ssMap_.begin(), e = v2ssMap_.end(); i != e; ++i) { - std::cerr << '[' << i->first << " -> ss#" << i->second << "]\n"; - } - std::cerr << '\n'; - } - void printIntervals(const char* const str, RA::IntervalPtrs::const_iterator i, RA::IntervalPtrs::const_iterator e) const { @@ -151,36 +115,33 @@ std::cerr << "\t" << **i << " -> "; unsigned reg = (*i)->reg; if (MRegisterInfo::isVirtualRegister(reg)) { - Virt2PhysMap::const_iterator it = v2pMap_.find(reg); - reg = (it == v2pMap_.end() ? 0 : it->second); + reg = vrm_->getPhys4Virt(reg); } std::cerr << mri_->getName(reg) << '\n'; } } - void verifyAssignment() const { - for (Virt2PhysMap::const_iterator i = v2pMap_.begin(), - e = v2pMap_.end(); i != e; ++i) - for (Virt2PhysMap::const_iterator i2 = next(i); i2 != e; ++i2) - if (MRegisterInfo::isVirtualRegister(i->second) && - (i->second == i2->second || - mri_->areAliases(i->second, i2->second))) { - const LiveIntervals::Interval - &in = li_->getInterval(i->second), - &in2 = li_->getInterval(i2->second); - if (in.overlaps(in2)) { - std::cerr << in << " overlaps " << in2 << '\n'; - assert(0); - } - } - } +// void verifyAssignment() const { +// for (Virt2PhysMap::const_iterator i = v2pMap_.begin(), +// e = v2pMap_.end(); i != e; ++i) +// for (Virt2PhysMap::const_iterator i2 = next(i); i2 != e; ++i2) +// if (MRegisterInfo::isVirtualRegister(i->second) && +// (i->second == i2->second || +// mri_->areAliases(i->second, i2->second))) { +// const LiveIntervals::Interval +// &in = li_->getInterval(i->second), +// &in2 = li_->getInterval(i2->second); +// if (in.overlaps(in2)) { +// std::cerr << in << " overlaps " << in2 << '\n'; +// assert(0); +// } +// } +// } }; } void RA::releaseMemory() { - v2pMap_.clear(); - v2ssMap_.clear(); unhandled_.clear(); active_.clear(); inactive_.clear(); @@ -195,6 +156,7 @@ mri_ = tm_->getRegisterInfo(); li_ = &getAnalysis(); if (!prt_.get()) prt_.reset(new PhysRegTracker(*mri_)); + vrm_.reset(new VirtRegMap(*mf_)); initIntervalSets(li_->getIntervals()); @@ -255,13 +217,12 @@ for (IntervalPtrs::iterator i = active_.begin(); i != active_.end(); ++i) { unsigned reg = (*i)->reg; DEBUG(std::cerr << "\tinterval " << **i << " expired\n"); - if (MRegisterInfo::isVirtualRegister(reg)) { - reg = v2pMap_[reg]; - } + if (MRegisterInfo::isVirtualRegister(reg)) + reg = vrm_->getPhys4Virt(reg); prt_->delRegUse(reg); } - DEBUG(printVirtRegAssignment()); + DEBUG(std::cerr << *vrm_); DEBUG(std::cerr << "********** REWRITE MACHINE CODE **********\n"); DEBUG(std::cerr << "********** Function: " @@ -292,11 +253,7 @@ if (op.isRegister() && MRegisterInfo::isVirtualRegister(op.getReg())) { unsigned virtReg = op.getReg(); - Virt2PhysMap::iterator it = v2pMap_.find(virtReg); - assert(it != v2pMap_.end() && - "all virtual registers must be allocated"); - unsigned physReg = it->second; - assert(MRegisterInfo::isPhysicalRegister(physReg)); + unsigned physReg = vrm_->getPhys4Virt(virtReg); DEBUG(std::cerr << "\t[reg" << virtReg << " -> " << mri_->getName(physReg) << ']'); mii->SetMachineOperandReg(i, physReg); @@ -348,9 +305,8 @@ // remove expired intervals if ((*i)->expiredAt(cur->start())) { DEBUG(std::cerr << "\t\tinterval " << **i << " expired\n"); - if (MRegisterInfo::isVirtualRegister(reg)) { - reg = v2pMap_[reg]; - } + if (MRegisterInfo::isVirtualRegister(reg)) + reg = vrm_->getPhys4Virt(reg); prt_->delRegUse(reg); // remove from active i = active_.erase(i); @@ -358,9 +314,8 @@ // move inactive intervals to inactive list else if (!(*i)->liveAt(cur->start())) { DEBUG(std::cerr << "\t\tinterval " << **i << " inactive\n"); - if (MRegisterInfo::isVirtualRegister(reg)) { - reg = v2pMap_[reg]; - } + if (MRegisterInfo::isVirtualRegister(reg)) + reg = vrm_->getPhys4Virt(reg); prt_->delRegUse(reg); // add to inactive inactive_.push_back(*i); @@ -388,9 +343,8 @@ // move re-activated intervals in active list else if ((*i)->liveAt(cur->start())) { DEBUG(std::cerr << "\t\tinterval " << **i << " active\n"); - if (MRegisterInfo::isVirtualRegister(reg)) { - reg = v2pMap_[reg]; - } + if (MRegisterInfo::isVirtualRegister(reg)) + reg = vrm_->getPhys4Virt(reg); prt_->addRegUse(reg); // add to active active_.push_back(*i); @@ -423,7 +377,7 @@ i != e; ++i) { unsigned reg = (*i)->reg; if (MRegisterInfo::isVirtualRegister(reg)) - reg = v2pMap_[reg]; + reg = vrm_->getPhys4Virt(reg); updateSpillWeights(reg, (*i)->weight); } @@ -434,7 +388,7 @@ if (cur->overlaps(**i)) { unsigned reg = (*i)->reg; if (MRegisterInfo::isVirtualRegister(reg)) - reg = v2pMap_[reg]; + reg = vrm_->getPhys4Virt(reg); prt_->addRegUse(reg); updateSpillWeights(reg, (*i)->weight); } @@ -459,7 +413,8 @@ // list. if (physReg) { DEBUG(std::cerr << mri_->getName(physReg) << '\n'); - assignVirt2PhysReg(cur->reg, physReg); + vrm_->assignVirt2Phys(cur->reg, physReg); + prt_->addRegUse(physReg); active_.push_back(cur); handled_.push_back(cur); return; @@ -487,7 +442,7 @@ // again if (cur->weight <= minWeight) { DEBUG(std::cerr << "\t\t\tspilling(c): " << *cur << '\n';); - int slot = assignVirt2StackSlot(cur->reg); + int slot = vrm_->assignVirt2StackSlot(cur->reg); li_->updateSpilledInterval(*cur, slot); // if we didn't eliminate the interval find where to add it @@ -523,11 +478,11 @@ for (IntervalPtrs::iterator i = active_.begin(); i != active_.end(); ++i) { unsigned reg = (*i)->reg; if (MRegisterInfo::isVirtualRegister(reg) && - toSpill[v2pMap_[reg]] && + toSpill[vrm_->getPhys4Virt(reg)] && cur->overlaps(**i)) { DEBUG(std::cerr << "\t\t\tspilling(a): " << **i << '\n'); earliestStart = std::min(earliestStart, (*i)->start()); - int slot = assignVirt2StackSlot((*i)->reg); + int slot = vrm_->assignVirt2StackSlot((*i)->reg); li_->updateSpilledInterval(**i, slot); addSpillCode(*i, slot); } @@ -536,11 +491,11 @@ i != inactive_.end(); ++i) { unsigned reg = (*i)->reg; if (MRegisterInfo::isVirtualRegister(reg) && - toSpill[v2pMap_[reg]] && + toSpill[vrm_->getPhys4Virt(reg)] && cur->overlaps(**i)) { DEBUG(std::cerr << "\t\t\tspilling(i): " << **i << '\n'); earliestStart = std::min(earliestStart, (*i)->start()); - int slot = assignVirt2StackSlot((*i)->reg); + int slot = vrm_->assignVirt2StackSlot((*i)->reg); li_->updateSpilledInterval(**i, slot); addSpillCode(*i, slot); } @@ -564,9 +519,8 @@ prt_->delRegUse(i->reg); } else { - Virt2PhysMap::iterator v2pIt = v2pMap_.find(i->reg); - clearVirtReg(v2pIt); - prt_->delRegUse(v2pIt->second); + prt_->delRegUse(vrm_->getPhys4Virt(i->reg)); + vrm_->clearVirtReg(i->reg); if (i->spilled()) { if (!i->empty()) { IntervalPtrs::iterator it = unhandled_.begin(); @@ -586,8 +540,7 @@ if (MRegisterInfo::isPhysicalRegister(i->reg)) fixed_.push_front(i); else { - Virt2PhysMap::iterator v2pIt = v2pMap_.find(i->reg); - clearVirtReg(v2pIt); + vrm_->clearVirtReg(i->reg); if (i->spilled()) { if (!i->empty()) { IntervalPtrs::iterator it = unhandled_.begin(); @@ -605,8 +558,7 @@ if (MRegisterInfo::isPhysicalRegister(i->reg)) fixed_.push_front(i); else { - Virt2PhysMap::iterator v2pIt = v2pMap_.find(i->reg); - clearVirtReg(v2pIt); + vrm_->clearVirtReg(i->reg); unhandled_.push_front(i); } } @@ -622,10 +574,8 @@ active_.push_back(*i); if (MRegisterInfo::isPhysicalRegister((*i)->reg)) prt_->addRegUse((*i)->reg); - else { - assert(v2pMap_.count((*i)->reg)); - prt_->addRegUse(v2pMap_.find((*i)->reg)->second); - } + else + prt_->addRegUse(vrm_->getPhys4Virt((*i)->reg)); } } } @@ -706,47 +656,6 @@ return reg; } return 0; -} - -RA::Virt2PhysMap::iterator -RA::assignVirt2PhysReg(unsigned virtReg, unsigned physReg) -{ - bool inserted; - Virt2PhysMap::iterator it; - tie(it, inserted) = v2pMap_.insert(std::make_pair(virtReg, physReg)); - assert(inserted && "attempting to assign a virt->phys mapping to an " - "already mapped register"); - prt_->addRegUse(physReg); - return it; -} - -void RA::clearVirtReg(Virt2PhysMap::iterator it) -{ - assert(it != v2pMap_.end() && - "attempting to clear a not allocated virtual register"); - unsigned physReg = it->second; - v2pMap_.erase(it); - DEBUG(std::cerr << "\t\t\tcleared register " << mri_->getName(physReg) - << "\n"); -} - - -int RA::assignVirt2StackSlot(unsigned virtReg) -{ - const TargetRegisterClass* rc = mf_->getSSARegMap()->getRegClass(virtReg); - int frameIndex = mf_->getFrameInfo()->CreateStackObject(rc); - - bool inserted = v2ssMap_.insert(std::make_pair(virtReg, frameIndex)).second; - assert(inserted && "attempt to assign stack slot to spilled register!"); - ++numSpills; - return frameIndex; -} - -int RA::getStackSlot(unsigned virtReg) -{ - assert(v2ssMap_.count(virtReg) && - "attempt to get stack slot for a non spilled register"); - return v2ssMap_.find(virtReg)->second; } FunctionPass* llvm::createLinearScanRegisterAllocator() { From alkis at niobe.cs.uiuc.edu Mon Feb 23 17:48:01 2004 From: alkis at niobe.cs.uiuc.edu (Alkis Evlogimenos) Date: Mon Feb 23 17:48:01 2004 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/VirtRegMap.h RegAllocLinearScan.cpp Message-ID: <200402232347.i1NNlKu08583@niobe.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen: VirtRegMap.h updated: 1.1 -> 1.2 RegAllocLinearScan.cpp updated: 1.62 -> 1.63 --- Log message: Remove '4Virt' from member function names as it is obvious. --- Diffs of the changes: (+15 -15) Index: llvm/lib/CodeGen/VirtRegMap.h diff -u llvm/lib/CodeGen/VirtRegMap.h:1.1 llvm/lib/CodeGen/VirtRegMap.h:1.2 --- llvm/lib/CodeGen/VirtRegMap.h:1.1 Mon Feb 23 17:08:11 2004 +++ llvm/lib/CodeGen/VirtRegMap.h Mon Feb 23 17:47:10 2004 @@ -28,7 +28,7 @@ public: typedef std::vector Virt2PhysMap; typedef std::vector Virt2StackSlotMap; - + enum { NO_PHYS_REG = 0, NO_STACK_SLOT = INT_MAX @@ -57,7 +57,7 @@ v2ssMap_(mf.getSSARegMap()->getNumVirtualRegs(), NO_STACK_SLOT) { } - unsigned getPhys4Virt(unsigned virtReg) const { + unsigned getPhys(unsigned virtReg) const { assert(MRegisterInfo::isVirtualRegister(virtReg)); return v2pMap_[toIndex(virtReg)]; } @@ -78,7 +78,7 @@ v2pMap_[toIndex(virtReg)] = NO_PHYS_REG; } - int getStackSlot4Virt(unsigned virtReg) const { + int getStackSlot(unsigned virtReg) const { assert(MRegisterInfo::isVirtualRegister(virtReg)); return v2ssMap_[toIndex(virtReg)]; } Index: llvm/lib/CodeGen/RegAllocLinearScan.cpp diff -u llvm/lib/CodeGen/RegAllocLinearScan.cpp:1.62 llvm/lib/CodeGen/RegAllocLinearScan.cpp:1.63 --- llvm/lib/CodeGen/RegAllocLinearScan.cpp:1.62 Mon Feb 23 17:08:11 2004 +++ llvm/lib/CodeGen/RegAllocLinearScan.cpp Mon Feb 23 17:47:10 2004 @@ -115,7 +115,7 @@ std::cerr << "\t" << **i << " -> "; unsigned reg = (*i)->reg; if (MRegisterInfo::isVirtualRegister(reg)) { - reg = vrm_->getPhys4Virt(reg); + reg = vrm_->getPhys(reg); } std::cerr << mri_->getName(reg) << '\n'; } @@ -218,7 +218,7 @@ unsigned reg = (*i)->reg; DEBUG(std::cerr << "\tinterval " << **i << " expired\n"); if (MRegisterInfo::isVirtualRegister(reg)) - reg = vrm_->getPhys4Virt(reg); + reg = vrm_->getPhys(reg); prt_->delRegUse(reg); } @@ -253,7 +253,7 @@ if (op.isRegister() && MRegisterInfo::isVirtualRegister(op.getReg())) { unsigned virtReg = op.getReg(); - unsigned physReg = vrm_->getPhys4Virt(virtReg); + unsigned physReg = vrm_->getPhys(virtReg); DEBUG(std::cerr << "\t[reg" << virtReg << " -> " << mri_->getName(physReg) << ']'); mii->SetMachineOperandReg(i, physReg); @@ -306,7 +306,7 @@ if ((*i)->expiredAt(cur->start())) { DEBUG(std::cerr << "\t\tinterval " << **i << " expired\n"); if (MRegisterInfo::isVirtualRegister(reg)) - reg = vrm_->getPhys4Virt(reg); + reg = vrm_->getPhys(reg); prt_->delRegUse(reg); // remove from active i = active_.erase(i); @@ -315,7 +315,7 @@ else if (!(*i)->liveAt(cur->start())) { DEBUG(std::cerr << "\t\tinterval " << **i << " inactive\n"); if (MRegisterInfo::isVirtualRegister(reg)) - reg = vrm_->getPhys4Virt(reg); + reg = vrm_->getPhys(reg); prt_->delRegUse(reg); // add to inactive inactive_.push_back(*i); @@ -344,7 +344,7 @@ else if ((*i)->liveAt(cur->start())) { DEBUG(std::cerr << "\t\tinterval " << **i << " active\n"); if (MRegisterInfo::isVirtualRegister(reg)) - reg = vrm_->getPhys4Virt(reg); + reg = vrm_->getPhys(reg); prt_->addRegUse(reg); // add to active active_.push_back(*i); @@ -377,7 +377,7 @@ i != e; ++i) { unsigned reg = (*i)->reg; if (MRegisterInfo::isVirtualRegister(reg)) - reg = vrm_->getPhys4Virt(reg); + reg = vrm_->getPhys(reg); updateSpillWeights(reg, (*i)->weight); } @@ -388,7 +388,7 @@ if (cur->overlaps(**i)) { unsigned reg = (*i)->reg; if (MRegisterInfo::isVirtualRegister(reg)) - reg = vrm_->getPhys4Virt(reg); + reg = vrm_->getPhys(reg); prt_->addRegUse(reg); updateSpillWeights(reg, (*i)->weight); } @@ -478,7 +478,7 @@ for (IntervalPtrs::iterator i = active_.begin(); i != active_.end(); ++i) { unsigned reg = (*i)->reg; if (MRegisterInfo::isVirtualRegister(reg) && - toSpill[vrm_->getPhys4Virt(reg)] && + toSpill[vrm_->getPhys(reg)] && cur->overlaps(**i)) { DEBUG(std::cerr << "\t\t\tspilling(a): " << **i << '\n'); earliestStart = std::min(earliestStart, (*i)->start()); @@ -491,7 +491,7 @@ i != inactive_.end(); ++i) { unsigned reg = (*i)->reg; if (MRegisterInfo::isVirtualRegister(reg) && - toSpill[vrm_->getPhys4Virt(reg)] && + toSpill[vrm_->getPhys(reg)] && cur->overlaps(**i)) { DEBUG(std::cerr << "\t\t\tspilling(i): " << **i << '\n'); earliestStart = std::min(earliestStart, (*i)->start()); @@ -519,7 +519,7 @@ prt_->delRegUse(i->reg); } else { - prt_->delRegUse(vrm_->getPhys4Virt(i->reg)); + prt_->delRegUse(vrm_->getPhys(i->reg)); vrm_->clearVirtReg(i->reg); if (i->spilled()) { if (!i->empty()) { @@ -575,7 +575,7 @@ if (MRegisterInfo::isPhysicalRegister((*i)->reg)) prt_->addRegUse((*i)->reg); else - prt_->addRegUse(vrm_->getPhys4Virt((*i)->reg)); + prt_->addRegUse(vrm_->getPhys((*i)->reg)); } } } From alkis at niobe.cs.uiuc.edu Mon Feb 23 17:50:01 2004 From: alkis at niobe.cs.uiuc.edu (Alkis Evlogimenos) Date: Mon Feb 23 17:50:01 2004 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/VirtRegMap.h Message-ID: <200402232349.i1NNnpu10374@niobe.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen: VirtRegMap.h updated: 1.2 -> 1.3 --- Log message: Make enum private as it is an implementation detail. --- Diffs of the changes: (+5 -5) Index: llvm/lib/CodeGen/VirtRegMap.h diff -u llvm/lib/CodeGen/VirtRegMap.h:1.2 llvm/lib/CodeGen/VirtRegMap.h:1.3 --- llvm/lib/CodeGen/VirtRegMap.h:1.2 Mon Feb 23 17:47:10 2004 +++ llvm/lib/CodeGen/VirtRegMap.h Mon Feb 23 17:49:40 2004 @@ -29,11 +29,6 @@ typedef std::vector Virt2PhysMap; typedef std::vector Virt2StackSlotMap; - enum { - NO_PHYS_REG = 0, - NO_STACK_SLOT = INT_MAX - }; - private: MachineFunction* mf_; Virt2PhysMap v2pMap_; @@ -49,6 +44,11 @@ static unsigned fromIndex(unsigned index) { return index + MRegisterInfo::FirstVirtualRegister; } + + enum { + NO_PHYS_REG = 0, + NO_STACK_SLOT = INT_MAX + }; public: VirtRegMap(MachineFunction& mf) From lattner at cs.uiuc.edu Mon Feb 23 21:48:01 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon Feb 23 21:48:01 2004 Subject: [llvm-commits] CVS: llvm/include/Support/STLExtras.h Message-ID: <200402240347.VAA09728@zion.cs.uiuc.edu> Changes in directory llvm/include/Support: STLExtras.h updated: 1.14 -> 1.15 --- Log message: Noone cares about similarity to boost --- Diffs of the changes: (+0 -2) Index: llvm/include/Support/STLExtras.h diff -u llvm/include/Support/STLExtras.h:1.14 llvm/include/Support/STLExtras.h:1.15 --- llvm/include/Support/STLExtras.h:1.14 Fri Feb 13 19:17:28 2004 +++ llvm/include/Support/STLExtras.h Mon Feb 23 21:47:25 2004 @@ -73,8 +73,6 @@ // mapped_iterator - This is a simple iterator adapter that causes a function to // be dereferenced whenever operator* is invoked on the iterator. // -// It turns out that this is disturbingly similar to boost::transform_iterator -// template class mapped_iterator { RootIt current; From lattner at cs.uiuc.edu Mon Feb 23 21:51:08 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon Feb 23 21:51:08 2004 Subject: [llvm-commits] CVS: llvm/docs/ReleaseNotes.html Message-ID: <200402240350.VAA17284@zion.cs.uiuc.edu> Changes in directory llvm/docs: ReleaseNotes.html updated: 1.132 -> 1.133 --- Log message: Now that's a new feature! --- Diffs of the changes: (+2 -1) Index: llvm/docs/ReleaseNotes.html diff -u llvm/docs/ReleaseNotes.html:1.132 llvm/docs/ReleaseNotes.html:1.133 --- llvm/docs/ReleaseNotes.html:1.132 Sun Feb 22 21:51:34 2004 +++ llvm/docs/ReleaseNotes.html Mon Feb 23 21:50:24 2004 @@ -91,6 +91,7 @@

LLVM can now feed profile information back into optimizers for Profile Guided Optimization, and includes a simple basic block reordering pass.

The LLVM JIT lazily initializes global variables, reducing startup time for programs with lots of globals (like C++ programs).

The "tblgen" tool is now documented.

The LLVM Compiler Infrastructure

::value idiom zero cost. it + // evaluates to a constant 1 or 0 depending on whether the + // parameter T is a class or not (respectively). + template char is_class_helper(void(T::*)(void)); + template double is_class_helper(...); + } + + template + struct is_class + { + // is_class<> metafunction due to Paul Mensonides (leavings at attbi.com). For + // more details: + // http://groups.google.com/groups?hl=en&selm=000001c1cc83%24e154d5e0%247772e50c%40c161550a&rnum=1 + public: + enum { value = sizeof(char) == sizeof(dont_use::is_class_helper(0)) }; + }; + + } + + #endif From lattner at cs.uiuc.edu Mon Feb 23 21:52:06 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon Feb 23 21:52:06 2004 Subject: [llvm-commits] CVS: llvm/include/Support/CommandLine.h Message-ID: <200402240350.VAA16716@zion.cs.uiuc.edu> Changes in directory llvm/include/Support: CommandLine.h updated: 1.29 -> 1.30 --- Log message: Use the new LLVM is_class template instead of the boost one, allowing us to remove our dependency on boost! Thanks to Reid Spencer for making this possible! --- Diffs of the changes: (+3 -2) Index: llvm/include/Support/CommandLine.h diff -u llvm/include/Support/CommandLine.h:1.29 llvm/include/Support/CommandLine.h:1.30 --- llvm/include/Support/CommandLine.h:1.29 Sun Nov 16 14:21:13 2003 +++ llvm/include/Support/CommandLine.h Mon Feb 23 21:50:05 2004 @@ -20,14 +20,15 @@ #ifndef SUPPORT_COMMANDLINE_H #define SUPPORT_COMMANDLINE_H +#include "Support/type_traits.h" #include #include #include #include #include -#include "boost/type_traits/object_traits.hpp" namespace llvm { + /// cl Namespace - This namespace contains all of the command line option /// processing machinery. It is intentionally a short name to make qualified /// usage concise. @@ -719,7 +720,7 @@ class ParserClass = parser > class opt : public Option, public opt_storage::value> { + is_class::value> { ParserClass Parser; virtual bool handleOccurrence(const char *ArgName, const std::string &Arg) { From lattner at cs.uiuc.edu Mon Feb 23 21:54:00 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon Feb 23 21:54:00 2004 Subject: [llvm-commits] CVS: llvm/include/boost/type_traits/alignment_traits.hpp arithmetic_traits.hpp array_traits.hpp composite_traits.hpp conversion_traits.hpp cv_traits.hpp function_traits.hpp fwd.hpp ice.hpp is_class.hpp object_traits.hpp reference_traits.hpp same_traits.hpp transform_traits.hpp transform_traits_spec.hpp type_traits_test.hpp utility.hpp Message-ID: <200402240353.VAA19021@zion.cs.uiuc.edu> Changes in directory llvm/include/boost/type_traits: alignment_traits.hpp (r1.1) removed arithmetic_traits.hpp (r1.1) removed array_traits.hpp (r1.1) removed composite_traits.hpp (r1.1) removed conversion_traits.hpp (r1.1) removed cv_traits.hpp (r1.1) removed function_traits.hpp (r1.1) removed fwd.hpp (r1.1) removed ice.hpp (r1.1) removed is_class.hpp (r1.1) removed object_traits.hpp (r1.1) removed reference_traits.hpp (r1.1) removed same_traits.hpp (r1.1) removed transform_traits.hpp (r1.1) removed transform_traits_spec.hpp (r1.1) removed type_traits_test.hpp (r1.1) removed utility.hpp (r1.1) removed --- Log message: Boost is now unneeded, thanks to the fix for PR253, contributed by Reid Spencer! --- Diffs of the changes: (+0 -0) From lattner at cs.uiuc.edu Mon Feb 23 21:54:29 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon Feb 23 21:54:29 2004 Subject: [llvm-commits] CVS: llvm/include/boost/config/stdlib/dinkumware.hpp libstdcpp3.hpp modena.hpp msl.hpp roguewave.hpp sgi.hpp stlport.hpp vacpp.hpp Message-ID: <200402240353.VAA19007@zion.cs.uiuc.edu> Changes in directory llvm/include/boost/config/stdlib: dinkumware.hpp (r1.1) removed libstdcpp3.hpp (r1.1) removed modena.hpp (r1.1) removed msl.hpp (r1.1) removed roguewave.hpp (r1.1) removed sgi.hpp (r1.1) removed stlport.hpp (r1.1) removed vacpp.hpp (r1.1) removed --- Log message: Boost is now unneeded, thanks to the fix for PR253, contributed by Reid Spencer! --- Diffs of the changes: (+0 -0) From lattner at cs.uiuc.edu Mon Feb 23 21:54:58 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon Feb 23 21:54:58 2004 Subject: [llvm-commits] CVS: llvm/include/boost/config/platform/aix.hpp amigaos.hpp beos.hpp bsd.hpp cygwin.hpp hpux.hpp irix.hpp linux.hpp macos.hpp solaris.hpp win32.hpp Message-ID: <200402240353.VAA18995@zion.cs.uiuc.edu> Changes in directory llvm/include/boost/config/platform: aix.hpp (r1.1) removed amigaos.hpp (r1.1) removed beos.hpp (r1.1) removed bsd.hpp (r1.1) removed cygwin.hpp (r1.1) removed hpux.hpp (r1.1) removed irix.hpp (r1.1) removed linux.hpp (r1.1) removed macos.hpp (r1.1) removed solaris.hpp (r1.1) removed win32.hpp (r1.1) removed --- Log message: Boost is now unneeded, thanks to the fix for PR253, contributed by Reid Spencer! --- Diffs of the changes: (+0 -0) From lattner at cs.uiuc.edu Mon Feb 23 21:55:27 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon Feb 23 21:55:27 2004 Subject: [llvm-commits] CVS: llvm/include/boost/config/compiler/borland.hpp comeau.hpp common_edg.hpp compaq_cxx.hpp gcc.hpp greenhills.hpp hp_acc.hpp intel.hpp kai.hpp metrowerks.hpp mpw.hpp sgi_mipspro.hpp sunpro_cc.hpp vacpp.hpp visualc.hpp Message-ID: <200402240353.VAA18985@zion.cs.uiuc.edu> Changes in directory llvm/include/boost/config/compiler: borland.hpp (r1.1) removed comeau.hpp (r1.1) removed common_edg.hpp (r1.1) removed compaq_cxx.hpp (r1.1) removed gcc.hpp (r1.4) removed greenhills.hpp (r1.1) removed hp_acc.hpp (r1.1) removed intel.hpp (r1.1) removed kai.hpp (r1.1) removed metrowerks.hpp (r1.1) removed mpw.hpp (r1.1) removed sgi_mipspro.hpp (r1.1) removed sunpro_cc.hpp (r1.1) removed vacpp.hpp (r1.1) removed visualc.hpp (r1.1) removed --- Log message: Boost is now unneeded, thanks to the fix for PR253, contributed by Reid Spencer! --- Diffs of the changes: (+0 -0) From lattner at cs.uiuc.edu Mon Feb 23 21:56:01 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon Feb 23 21:56:01 2004 Subject: [llvm-commits] CVS: llvm/include/boost/config/posix_features.hpp select_compiler_config.hpp select_platform_config.hpp select_stdlib_config.hpp suffix.hpp user.hpp Message-ID: <200402240354.VAA19216@zion.cs.uiuc.edu> Changes in directory llvm/include/boost/config: posix_features.hpp (r1.1) removed select_compiler_config.hpp (r1.1) removed select_platform_config.hpp (r1.1) removed select_stdlib_config.hpp (r1.1) removed suffix.hpp (r1.1) removed user.hpp (r1.1) removed --- Log message: Hrm, my find must have been faulty. It didn't remove these as well. --- Diffs of the changes: (+0 -0) From lattner at cs.uiuc.edu Mon Feb 23 21:56:30 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon Feb 23 21:56:30 2004 Subject: [llvm-commits] CVS: llvm/include/boost/LICENSE.TXT README.boost.llvm config.hpp type_traits.hpp Message-ID: <200402240354.VAA19204@zion.cs.uiuc.edu> Changes in directory llvm/include/boost: LICENSE.TXT (r1.1) removed README.boost.llvm (r1.1) removed config.hpp (r1.1) removed type_traits.hpp (r1.1) removed --- Log message: Hrm, my find must have been faulty. It didn't remove these as well. --- Diffs of the changes: (+0 -0) From lattner at cs.uiuc.edu Mon Feb 23 22:03:00 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon Feb 23 22:03:00 2004 Subject: [llvm-commits] CVS: llvm/LICENSE.TXT Message-ID: <200402240402.WAA20173@zion.cs.uiuc.edu> Changes in directory llvm: LICENSE.TXT updated: 1.9 -> 1.10 --- Log message: we no longer include boost --- Diffs of the changes: (+1 -2) Index: llvm/LICENSE.TXT diff -u llvm/LICENSE.TXT:1.9 llvm/LICENSE.TXT:1.10 --- llvm/LICENSE.TXT:1.9 Wed Feb 18 14:00:05 2004 +++ llvm/LICENSE.TXT Mon Feb 23 22:02:20 2004 @@ -77,7 +77,7 @@ Ptrdist: llvm/test/Programs/MultiSource/Benchmarks/Ptrdist LLUBenchmark: llvm/test/Programs/MultiSource/Benchmarks/llubenchmark SIM: llvm/test/Programs/MultiSource/Benchmarks/sim -cfrac: llvm/test/Programs/MultiSource/Benchmarks/MallocBench/cfrac +cfrac: llvm/test/Programs/MultiSource/Benchmarks/MallocBench/cfrac espresso: llvm/test/Programs/MultiSource/Benchmarks/MallocBench/espresso gs: llvm/test/Programs/MultiSource/Benchmarks/MallocBench/gs p2c: llvm/test/Programs/MultiSource/Benchmarks/MallocBench/p2c @@ -88,7 +88,6 @@ SingleSource Tests: llvm/test/Programs/SingleSource/Benchmarks/Misc llvm/test/Programs/SingleSource/CustomChecked llvm/test/Programs/SingleSource/Gizmos -Boost: llvm/include/boost GNU Libc: llvm/runtime/GCCLibraries/libc Zlib Library: llvm/runtime/zlib PNG Library: llvm/runtime/libpng From lattner at cs.uiuc.edu Mon Feb 23 22:55:01 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon Feb 23 22:55:01 2004 Subject: [llvm-commits] CVS: llvm/docs/LangRef.html Message-ID: <200402240454.WAA25893@zion.cs.uiuc.edu> Changes in directory llvm/docs: LangRef.html updated: 1.48 -> 1.49 --- Log message: Wow, the description of the 'switch' instruction was out of date. --- Diffs of the changes: (+43 -22) Index: llvm/docs/LangRef.html diff -u llvm/docs/LangRef.html:1.48 llvm/docs/LangRef.html:1.49 --- llvm/docs/LangRef.html:1.48 Sat Feb 14 13:27:26 2004 +++ llvm/docs/LangRef.html Mon Feb 23 22:54:45 2004 @@ -748,40 +748,61 @@ href="#i_ret">ret int 1
IfUnequal:
ret int 0
-

'switch' -Instruction

+ 'switch' Instruction +

Syntax:

  switch uint <value>, label <defaultdest> [ int <val>, label <dest>, ... ]

+ +

+  switch <intty> <value>, label <defaultdest> [ <intty> <val>, label <dest> ... ]
+

Overview:

The 'switch' instruction is used to transfer control flow -to one of several different places. It is a generalization of the 'br' + +

The 'switch' instruction is used to transfer control flow to one of +several different places. It is a generalization of the 'br' instruction, allowing a branch to occur to one of many possible destinations.

+ +

Arguments:

The 'switch' instruction uses three parameters: a 'uint' -comparison value 'value', a default 'label' -destination, and an array of pairs of comparison value constants and 'label's.

+ +

The 'switch' instruction uses three parameters: an integer +comparison value 'value', a default 'label' destination, and +an array of pairs of comparison value constants and 'label's. The +table is not allowed to contain duplicate constant entries.

Semantics:

The switch instruction specifies a table of values and destinations. When the 'switch' instruction is executed, this table is searched for the given value. If the value is found, the corresponding destination is branched to, otherwise the default value it transfered to.

Implementation:

Depending on properties of the target machine and the particular switch -instruction, this instruction may be code generated as a series of -chained conditional branches, or with a lookup table.

Example:

; Emulate a conditional br instruction - %Val = cast bool %value to uint
switch uint %Val, label %truedest [int 0, label %falsedest ]

; Emulate an unconditional br instruction - switch uint 0, label %dest [ ] - - ; Implement a jump table: - switch uint %val, label %otherwise [ int 0, label %onzero, - int 1, label %onone, - int 2, label %ontwo ] + +

Depending on properties of the target machine and the particular +switch instruction, this instruction may be code generated in different +ways, for example as a series of chained conditional branches, or with a lookup +table.

+ +

Example:

+ +

+ ; Emulate a conditional br instruction
+ %Val = cast bool %value to int
+ switch int %Val, label %truedest [int 0, label %falsedest ]
+
+ ; Emulate an unconditional br instruction
+ switch uint 0, label %dest [ ]
+
+ ; Implement a jump table:
+ switch uint %val, label %otherwise [ uint 0, label %onzero 
+                                      uint 1, label %onone 
+                                      uint 2, label %ontwo ]

@@ -2032,6 +2053,6 @@

Chris Lattner

The LLVM Compiler Infrastructure
-Last modified: $Date: 2004/02/14 19:27:26 $

+Last modified: $Date: 2004/02/24 04:54:45 $ From lattner at cs.uiuc.edu Mon Feb 23 23:35:01 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon Feb 23 23:35:01 2004 Subject: [llvm-commits] CVS: llvm/test/Regression/Transforms/SimplifyCFG/switch_create.ll Message-ID: <200402240534.XAA32592@zion.cs.uiuc.edu> Changes in directory llvm/test/Regression/Transforms/SimplifyCFG: switch_create.ll added (r1.1) --- Log message: The simplifycfg pass should be able to turn stuff like: if (X == 4 || X == 7) and if (X != 4 && X != 7) into switch instructions. --- Diffs of the changes: (+33 -0) Index: llvm/test/Regression/Transforms/SimplifyCFG/switch_create.ll diff -c /dev/null llvm/test/Regression/Transforms/SimplifyCFG/switch_create.ll:1.1 *** /dev/null Mon Feb 23 23:34:55 2004 --- llvm/test/Regression/Transforms/SimplifyCFG/switch_create.ll Mon Feb 23 23:34:44 2004 *************** *** 0 **** --- 1,33 ---- + ; RUN: llvm-as < %s | opt -simplifycfg | llvm-dis | not grep br + + declare void %foo1() + declare void %foo2() + + void %test1(uint %V) { + %C1 = seteq uint %V, 4 + %C2 = seteq uint %V, 17 + %CN = or bool %C1, %C2 + br bool %CN, label %T, label %F + T: + call void %foo1() + ret void + F: + call void %foo2() + ret void + } + + + void %test2(int %V) { + %C1 = setne int %V, 4 + %C2 = setne int %V, 17 + %CN = and bool %C1, %C2 + br bool %CN, label %T, label %F + T: + call void %foo1() + ret void + F: + call void %foo2() + ret void + } + + From lattner at cs.uiuc.edu Mon Feb 23 23:39:01 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon Feb 23 23:39:01 2004 Subject: [llvm-commits] CVS: llvm/lib/Transforms/Utils/SimplifyCFG.cpp Message-ID: <200402240538.XAA01183@zion.cs.uiuc.edu> Changes in directory llvm/lib/Transforms/Utils: SimplifyCFG.cpp updated: 1.23 -> 1.24 --- Log message: Implement: test/Regression/Transforms/SimplifyCFG/switch_create.ll This turns code like this: if (X == 4 | X == 7) and if (X != 4 & X != 7) into switch instructions. --- Diffs of the changes: (+140 -7) Index: llvm/lib/Transforms/Utils/SimplifyCFG.cpp diff -u llvm/lib/Transforms/Utils/SimplifyCFG.cpp:1.23 llvm/lib/Transforms/Utils/SimplifyCFG.cpp:1.24 --- llvm/lib/Transforms/Utils/SimplifyCFG.cpp:1.23 Mon Feb 16 00:35:48 2004 +++ llvm/lib/Transforms/Utils/SimplifyCFG.cpp Mon Feb 23 23:38:11 2004 @@ -14,17 +14,18 @@ #include "llvm/Transforms/Utils/Local.h" #include "llvm/Constants.h" #include "llvm/Instructions.h" +#include "llvm/Type.h" #include "llvm/Support/CFG.h" #include #include using namespace llvm; -// PropagatePredecessors - This gets "Succ" ready to have the predecessors from -// "BB". This is a little tricky because "Succ" has PHI nodes, which need to -// have extra slots added to them to hold the merge edges from BB's -// predecessors, and BB itself might have had PHI nodes in it. This function -// returns true (failure) if the Succ BB already has a predecessor that is a -// predecessor of BB and incoming PHI arguments would not be discernible. +// PropagatePredecessorsForPHIs - This gets "Succ" ready to have the +// predecessors from "BB". This is a little tricky because "Succ" has PHI +// nodes, which need to have extra slots added to them to hold the merge edges +// from BB's predecessors, and BB itself might have had PHI nodes in it. This +// function returns true (failure) if the Succ BB already has a predecessor that +// is a predecessor of BB and incoming PHI arguments would not be discernible. // // Assumption: Succ is the single successor for BB. // @@ -200,6 +201,91 @@ return true; } +// GatherConstantSetEQs - Given a potentially 'or'd together collection of seteq +// instructions that compare a value against a constant, return the value being +// compared, and stick the constant into the Values vector. +static Value *GatherConstantSetEQs(Value *V, std::vector &Values) { + if (Instruction *Inst = dyn_cast(V)) + if (Inst->getOpcode() == Instruction::SetEQ) { + if (Constant *C = dyn_cast(Inst->getOperand(1))) { + Values.push_back(C); + return Inst->getOperand(0); + } else if (Constant *C = dyn_cast(Inst->getOperand(0))) { + Values.push_back(C); + return Inst->getOperand(1); + } + } else if (Inst->getOpcode() == Instruction::Or) { + if (Value *LHS = GatherConstantSetEQs(Inst->getOperand(0), Values)) + if (Value *RHS = GatherConstantSetEQs(Inst->getOperand(1), Values)) + if (LHS == RHS) + return LHS; + } + return 0; +} + +// GatherConstantSetNEs - Given a potentially 'and'd together collection of +// setne instructions that compare a value against a constant, return the value +// being compared, and stick the constant into the Values vector. +static Value *GatherConstantSetNEs(Value *V, std::vector &Values) { + if (Instruction *Inst = dyn_cast(V)) + if (Inst->getOpcode() == Instruction::SetNE) { + if (Constant *C = dyn_cast(Inst->getOperand(1))) { + Values.push_back(C); + return Inst->getOperand(0); + } else if (Constant *C = dyn_cast(Inst->getOperand(0))) { + Values.push_back(C); + return Inst->getOperand(1); + } + } else if (Inst->getOpcode() == Instruction::Cast) { + // Cast of X to bool is really a comparison against zero. + assert(Inst->getType() == Type::BoolTy && "Can only handle bool values!"); + Values.push_back(Constant::getNullValue(Inst->getOperand(0)->getType())); + return Inst->getOperand(0); + } else if (Inst->getOpcode() == Instruction::And) { + if (Value *LHS = GatherConstantSetNEs(Inst->getOperand(0), Values)) + if (Value *RHS = GatherConstantSetNEs(Inst->getOperand(1), Values)) + if (LHS == RHS) + return LHS; + } + return 0; +} + + + +/// GatherValueComparisons - If the specified Cond is an 'and' or 'or' of a +/// bunch of comparisons of one value against constants, return the value and +/// the constants being compared. +static bool GatherValueComparisons(Instruction *Cond, Value *&CompVal, + std::vector &Values) { + if (Cond->getOpcode() == Instruction::Or) { + CompVal = GatherConstantSetEQs(Cond, Values); + + // Return true to indicate that the condition is true if the CompVal is + // equal to one of the constants. + return true; + } else if (Cond->getOpcode() == Instruction::And) { + CompVal = GatherConstantSetNEs(Cond, Values); + + // Return false to indicate that the condition is false if the CompVal is + // equal to one of the constants. + return false; + } + return false; +} + +/// ErasePossiblyDeadInstructionTree - If the specified instruction is dead and +/// has no side effects, nuke it. If it uses any instructions that become dead +/// because the instruction is now gone, nuke them too. +static void ErasePossiblyDeadInstructionTree(Instruction *I) { + if (isInstructionTriviallyDead(I)) { + std::vector Operands(I->op_begin(), I->op_end()); + I->getParent()->getInstList().erase(I); + for (unsigned i = 0, e = Operands.size(); i != e; ++i) + if (Instruction *OpI = dyn_cast(Operands[i])) + ErasePossiblyDeadInstructionTree(OpI); + } +} + // SimplifyCFG - This function is used to do simplification of a CFG. For // example, it adjusts branches to branches to eliminate the extra hop, it // eliminates unreachable basic blocks, and does other "peephole" optimization @@ -389,7 +475,6 @@ } } - // Merge basic blocks into their predecessor if there is only one distinct // pred, and if there is only one distinct successor of the predecessor, and // if there are no PHI nodes. @@ -451,6 +536,54 @@ return true; } + + for (pred_iterator PI = pred_begin(BB), E = pred_end(BB); PI != E; ++PI) + if (BranchInst *BI = dyn_cast((*PI)->getTerminator())) + // Change br (X == 0 | X == 1), T, F into a switch instruction. + if (BI->isConditional() && isa(BI->getCondition())) { + Instruction *Cond = cast(BI->getCondition()); + // If this is a bunch of seteq's or'd together, or if it's a bunch of + // 'setne's and'ed together, collect them. + Value *CompVal = 0; + std::vector Values; + bool TrueWhenEqual = GatherValueComparisons(Cond, CompVal, Values); + if (CompVal && CompVal->getType()->isInteger()) { + // There might be duplicate constants in the list, which the switch + // instruction can't handle, remove them now. + std::sort(Values.begin(), Values.end()); + Values.erase(std::unique(Values.begin(), Values.end()), Values.end()); + + // Figure out which block is which destination. + BasicBlock *DefaultBB = BI->getSuccessor(1); + BasicBlock *EdgeBB = BI->getSuccessor(0); + if (!TrueWhenEqual) std::swap(DefaultBB, EdgeBB); + + // Create the new switch instruction now. + SwitchInst *New = new SwitchInst(CompVal, DefaultBB, BI); + + // Add all of the 'cases' to the switch instruction. + for (unsigned i = 0, e = Values.size(); i != e; ++i) + New->addCase(Values[i], EdgeBB); + + // We added edges from PI to the EdgeBB. As such, if there were any + // PHI nodes in EdgeBB, they need entries to be added corresponding to + // the number of edges added. + for (BasicBlock::iterator BBI = EdgeBB->begin(); + PHINode *PN = dyn_cast(BBI); ++BBI) { + Value *InVal = PN->getIncomingValueForBlock(*PI); + for (unsigned i = 0, e = Values.size()-1; i != e; ++i) + PN->addIncoming(InVal, *PI); + } + + // Erase the old branch instruction. + (*PI)->getInstList().erase(BI); + + // Erase the potentially condition tree that was used to computed the + // branch condition. + ErasePossiblyDeadInstructionTree(Cond); + return true; + } + } // If there is a trivial two-entry PHI node in this basic block, and we can // eliminate it, do so now. From lattner at cs.uiuc.edu Mon Feb 23 23:55:01 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon Feb 23 23:55:01 2004 Subject: [llvm-commits] CVS: llvm/lib/Transforms/Utils/SimplifyCFG.cpp Message-ID: <200402240554.XAA02814@zion.cs.uiuc.edu> Changes in directory llvm/lib/Transforms/Utils: SimplifyCFG.cpp updated: 1.24 -> 1.25 --- Log message: Rearrange code a bit --- Diffs of the changes: (+27 -30) Index: llvm/lib/Transforms/Utils/SimplifyCFG.cpp diff -u llvm/lib/Transforms/Utils/SimplifyCFG.cpp:1.24 llvm/lib/Transforms/Utils/SimplifyCFG.cpp:1.25 --- llvm/lib/Transforms/Utils/SimplifyCFG.cpp:1.24 Mon Feb 23 23:38:11 2004 +++ llvm/lib/Transforms/Utils/SimplifyCFG.cpp Mon Feb 23 23:54:22 2004 @@ -301,36 +301,6 @@ assert(BB->getTerminator() && "Degenerate basic block encountered!"); assert(&BB->getParent()->front() != BB && "Can't Simplify entry block!"); - // Check to see if the first instruction in this block is just an unwind. If - // so, replace any invoke instructions which use this as an exception - // destination with call instructions. - // - if (UnwindInst *UI = dyn_cast(BB->getTerminator())) - if (BB->begin() == BasicBlock::iterator(UI)) { // Empty block? - std::vector Preds(pred_begin(BB), pred_end(BB)); - while (!Preds.empty()) { - BasicBlock *Pred = Preds.back(); - if (InvokeInst *II = dyn_cast(Pred->getTerminator())) - if (II->getUnwindDest() == BB) { - // Insert a new branch instruction before the invoke, because this - // is now a fall through... - BranchInst *BI = new BranchInst(II->getNormalDest(), II); - Pred->getInstList().remove(II); // Take out of symbol table - - // Insert the call now... - std::vector Args(II->op_begin()+3, II->op_end()); - CallInst *CI = new CallInst(II->getCalledValue(), Args, - II->getName(), BI); - // If the invoke produced a value, the Call now does instead - II->replaceAllUsesWith(CI); - delete II; - Changed = true; - } - - Preds.pop_back(); - } - } - // Remove basic blocks that have no predecessors... which are unreachable. if (pred_begin(BB) == pred_end(BB)) { //cerr << "Removing BB: \n" << BB; @@ -472,6 +442,33 @@ return true; } + } + } else if (UnwindInst *UI = dyn_cast(BB->begin())) { + // Check to see if the first instruction in this block is just an unwind. + // If so, replace any invoke instructions which use this as an exception + // destination with call instructions. + // + std::vector Preds(pred_begin(BB), pred_end(BB)); + while (!Preds.empty()) { + BasicBlock *Pred = Preds.back(); + if (InvokeInst *II = dyn_cast(Pred->getTerminator())) + if (II->getUnwindDest() == BB) { + // Insert a new branch instruction before the invoke, because this + // is now a fall through... + BranchInst *BI = new BranchInst(II->getNormalDest(), II); + Pred->getInstList().remove(II); // Take out of symbol table + + // Insert the call now... + std::vector Args(II->op_begin()+3, II->op_end()); + CallInst *CI = new CallInst(II->getCalledValue(), Args, + II->getName(), BI); + // If the invoke produced a value, the Call now does instead + II->replaceAllUsesWith(CI); + delete II; + Changed = true; + } + + Preds.pop_back(); } } From lattner at cs.uiuc.edu Tue Feb 24 00:27:08 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Feb 24 00:27:08 2004 Subject: [llvm-commits] CVS: llvm/include/llvm/iTerminators.h Message-ID: <200402240626.AAA14706@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm: iTerminators.h updated: 1.38 -> 1.39 --- Log message: Add some helpful methods for dealing with switch instructions --- Diffs of the changes: (+30 -0) Index: llvm/include/llvm/iTerminators.h diff -u llvm/include/llvm/iTerminators.h:1.38 llvm/include/llvm/iTerminators.h:1.39 --- llvm/include/llvm/iTerminators.h:1.38 Sun Feb 8 15:43:20 2004 +++ llvm/include/llvm/iTerminators.h Tue Feb 24 00:26:00 2004 @@ -178,6 +178,36 @@ return cast(Operands[1].get()); } + /// getNumCases - return the number of 'cases' in this switch instruction. + /// Note that case #0 is always the default case. + unsigned getNumCases() const { + return Operands.size()/2; + } + + /// getCaseValue - Return the specified case value. Note that case #0, the + /// default destination, does not have a case value. + Constant *getCaseValue(unsigned i) { + assert(i && i < getNumCases() && "Illegal case value to get!"); + return getSuccessorValue(i); + } + + /// getCaseValue - Return the specified case value. Note that case #0, the + /// default destination, does not have a case value. + const Constant *getCaseValue(unsigned i) const { + assert(i && i < getNumCases() && "Illegal case value to get!"); + return getSuccessorValue(i); + } + + /// findCaseValue - Search all of the case values for the specified constant. + /// If it is explicitly handled, return the case number of it, otherwise + /// return 0 to indicate that it is handled by the default handler. + unsigned findCaseValue(const Constant *C) const { + for (unsigned i = 1, e = getNumCases(); i != e; ++i) + if (getCaseValue(i) == C) + return i; + return 0; + } + /// addCase - Add an entry to the switch instruction... /// void addCase(Constant *OnVal, BasicBlock *Dest); From alkis at niobe.cs.uiuc.edu Tue Feb 24 00:31:01 2004 From: alkis at niobe.cs.uiuc.edu (Alkis Evlogimenos) Date: Tue Feb 24 00:31:01 2004 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/VirtRegMap.h Message-ID: <200402240630.i1O6UkS27847@niobe.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen: VirtRegMap.h updated: 1.3 -> 1.4 --- Log message: Add predicates for checking if a virtual register has a physical register mapping or a stack slot mapping. --- Diffs of the changes: (+8 -0) Index: llvm/lib/CodeGen/VirtRegMap.h diff -u llvm/lib/CodeGen/VirtRegMap.h:1.3 llvm/lib/CodeGen/VirtRegMap.h:1.4 --- llvm/lib/CodeGen/VirtRegMap.h:1.3 Mon Feb 23 17:49:40 2004 +++ llvm/lib/CodeGen/VirtRegMap.h Tue Feb 24 00:30:36 2004 @@ -57,6 +57,10 @@ v2ssMap_(mf.getSSARegMap()->getNumVirtualRegs(), NO_STACK_SLOT) { } + bool hasPhys(unsigned virtReg) const { + return getPhys(virtReg) != NO_PHYS_REG; + } + unsigned getPhys(unsigned virtReg) const { assert(MRegisterInfo::isVirtualRegister(virtReg)); return v2pMap_[toIndex(virtReg)]; @@ -76,6 +80,10 @@ assert(v2pMap_[toIndex(virtReg)] != NO_PHYS_REG && "attempt to clear a not assigned virtual register"); v2pMap_[toIndex(virtReg)] = NO_PHYS_REG; + } + + bool hasStackSlot(unsigned virtReg) const { + return getStackSlot(virtReg) != NO_STACK_SLOT; } int getStackSlot(unsigned virtReg) const { From lattner at cs.uiuc.edu Tue Feb 24 01:22:01 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Feb 24 01:22:01 2004 Subject: [llvm-commits] CVS: llvm/test/Regression/Transforms/SimplifyCFG/switch_switch_fold.ll Message-ID: <200402240721.BAA27154@zion.cs.uiuc.edu> Changes in directory llvm/test/Regression/Transforms/SimplifyCFG: switch_switch_fold.ll added (r1.1) --- Log message: New testcase. Switch instructions that go to switch instructions should be merged. --- Diffs of the changes: (+46 -0) Index: llvm/test/Regression/Transforms/SimplifyCFG/switch_switch_fold.ll diff -c /dev/null llvm/test/Regression/Transforms/SimplifyCFG/switch_switch_fold.ll:1.1 *** /dev/null Tue Feb 24 01:21:19 2004 --- llvm/test/Regression/Transforms/SimplifyCFG/switch_switch_fold.ll Tue Feb 24 01:21:09 2004 *************** *** 0 **** --- 1,46 ---- + ; RUN: llvm-as < %s | opt -simplifycfg | llvm-dis | grep switch | wc -l | grep 1 + + ; Test that a switch going to a switch on the same value can be merged. All + ; three switches in this example can be merged into one big one. + + declare void %foo1() + declare void %foo2() + declare void %foo3() + declare void %foo4() + + void %test1(uint %V) { + switch uint %V, label %F [ + uint 4, label %T + uint 17, label %T + uint 5, label %T + uint 1234, label %F + ] + + T: + switch uint %V, label %F [ + uint 4, label %A + uint 17, label %B + uint 42, label %C + ] + A: + call void %foo1() + ret void + + B: + call void %foo2() + ret void + C: + call void %foo3() + ret void + + F: + switch uint %V, label %F [ + uint 4, label %B + uint 18, label %B + uint 42, label %D + ] + D: + call void %foo4() + ret void + } + From lattner at cs.uiuc.edu Tue Feb 24 01:25:04 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Feb 24 01:25:04 2004 Subject: [llvm-commits] CVS: llvm/lib/Transforms/Utils/SimplifyCFG.cpp Message-ID: <200402240724.BAA27464@zion.cs.uiuc.edu> Changes in directory llvm/lib/Transforms/Utils: SimplifyCFG.cpp updated: 1.25 -> 1.26 --- Log message: Implement SimplifyCFG/switch_switch_fold.ll This case occurs many times in various benchmarks, especially when combined with the previous patch. This allows it to get stuff like: if (X == 4 || X == 3) if (X == 5 || X == 8) and switch (X) { case 4: case 5: case 6: if (X == 4 || X == 5) --- Diffs of the changes: (+150 -2) Index: llvm/lib/Transforms/Utils/SimplifyCFG.cpp diff -u llvm/lib/Transforms/Utils/SimplifyCFG.cpp:1.25 llvm/lib/Transforms/Utils/SimplifyCFG.cpp:1.26 --- llvm/lib/Transforms/Utils/SimplifyCFG.cpp:1.25 Mon Feb 23 23:54:22 2004 +++ llvm/lib/Transforms/Utils/SimplifyCFG.cpp Tue Feb 24 01:23:58 2004 @@ -18,6 +18,7 @@ #include "llvm/Support/CFG.h" #include #include +#include using namespace llvm; // PropagatePredecessorsForPHIs - This gets "Succ" ready to have the @@ -286,6 +287,47 @@ } } +/// SafeToMergeTerminators - Return true if it is safe to merge these two +/// terminator instructions together. +/// +static bool SafeToMergeTerminators(TerminatorInst *SI1, TerminatorInst *SI2) { + if (SI1 == SI2) return false; // Can't merge with self! + + // It is not safe to merge these two switch instructions if they have a common + // successor, and if that successor has a PHI node, and if that PHI node has + // conflicting incoming values from the two switch blocks. + BasicBlock *SI1BB = SI1->getParent(); + BasicBlock *SI2BB = SI2->getParent(); + std::set SI1Succs(succ_begin(SI1BB), succ_end(SI1BB)); + + for (succ_iterator I = succ_begin(SI2BB), E = succ_end(SI2BB); I != E; ++I) + if (SI1Succs.count(*I)) + for (BasicBlock::iterator BBI = (*I)->begin(); + PHINode *PN = dyn_cast(BBI); ++BBI) + if (PN->getIncomingValueForBlock(SI1BB) != + PN->getIncomingValueForBlock(SI2BB)) + return false; + + return true; +} + +/// AddPredecessorToBlock - Update PHI nodes in Succ to indicate that there will +/// now be entries in it from the 'NewPred' block. The values that will be +/// flowing into the PHI nodes will be the same as those coming in from +/// ExistPred, and existing predecessor of Succ. +static void AddPredecessorToBlock(BasicBlock *Succ, BasicBlock *NewPred, + BasicBlock *ExistPred) { + assert(std::find(succ_begin(ExistPred), succ_end(ExistPred), Succ) != + succ_end(ExistPred) && "ExistPred is not a predecessor of Succ!"); + if (!isa(Succ->begin())) return; // Quick exit if nothing to do + + for (BasicBlock::iterator I = Succ->begin(); + PHINode *PN = dyn_cast(I); ++I) { + Value *V = PN->getIncomingValueForBlock(ExistPred); + PN->addIncoming(V, NewPred); + } +} + // SimplifyCFG - This function is used to do simplification of a CFG. For // example, it adjusts branches to branches to eliminate the extra hop, it // eliminates unreachable basic blocks, and does other "peephole" optimization @@ -302,7 +344,8 @@ assert(&BB->getParent()->front() != BB && "Can't Simplify entry block!"); // Remove basic blocks that have no predecessors... which are unreachable. - if (pred_begin(BB) == pred_end(BB)) { + if (pred_begin(BB) == pred_end(BB) || + *pred_begin(BB) == BB && ++pred_begin(BB) == pred_end(BB)) { //cerr << "Removing BB: \n" << BB; // Loop through all of our successors and make sure they know that one @@ -439,7 +482,6 @@ // We know there are no successors, so just nuke the block. M->getBasicBlockList().erase(BB); - return true; } } @@ -470,6 +512,112 @@ Preds.pop_back(); } + } else if (SwitchInst *SI = dyn_cast(BB->begin())) { + // If the only instruction in this block is a switch instruction, see if we + // can fold the switch instruction into a switch in a predecessor block. + std::vector Preds(pred_begin(BB), pred_end(BB)); + while (!Preds.empty()) { + BasicBlock *Pred = Preds.back(); + Preds.pop_back(); + + // If the two blocks are switching on the same value, we can merge this + // switch into the predecessor's switch. + if (SwitchInst *PSI = dyn_cast(Pred->getTerminator())) + if (PSI->getCondition() == SI->getCondition() && + SafeToMergeTerminators(SI, PSI)) { + // Figure out which 'cases' to copy from SI to PSI. + std::vector > Cases; + BasicBlock *NewDefault = 0; + if (PSI->getDefaultDest() == BB) { + // If this is the default destination from PSI, only the edges in SI + // that don't occur in PSI, or that branch to BB will be activated. + std::set PSIHandled; + for (unsigned i = 1, e = PSI->getNumSuccessors(); i != e; ++i) + if (PSI->getSuccessor(i) != BB) + PSIHandled.insert(PSI->getCaseValue(i)); + else { + // This entry will be replaced. + PSI->removeCase(i); + --i; --e; + } + + NewDefault = SI->getDefaultDest(); + for (unsigned i = 1, e = SI->getNumSuccessors(); i != e; ++i) { + Constant *C = SI->getCaseValue(i); + if (!PSIHandled.count(C)) + Cases.push_back(std::make_pair(C, SI->getSuccessor(i))); + } + + } else { + // If this is not the default destination from PSI, only the edges + // in SI that occur in PSI with a destination of BB will be + // activated. + std::set PSIHandled; + for (unsigned i = 1, e = PSI->getNumSuccessors(); i != e; ++i) + if (PSI->getSuccessor(i) == BB) { + // We know that BB doesn't have any PHI nodes in it, so just + // drop the edges. + PSIHandled.insert(PSI->getCaseValue(i)); + PSI->removeCase(i); + --i; --e; + } + + // Okay, now we know which constants were sent to BB from the + // predecessor. Figure out where they will all go now. + for (unsigned i = 1, e = SI->getNumSuccessors(); i != e; ++i) { + Constant *C = SI->getCaseValue(i); + if (PSIHandled.count(C)) { + // If this is one we are capable of getting... + Cases.push_back(std::make_pair(C, SI->getSuccessor(i))); + PSIHandled.erase(C); // This constant is taken care of + } + } + + // If there are any constants vectored to BB that SI doesn't handle, + // they must go to the default destination of SI. + for (std::set::iterator I = PSIHandled.begin(), + E = PSIHandled.end(); I != E; ++I) + Cases.push_back(std::make_pair(*I, SI->getDefaultDest())); + } + + // Okay, at this point, we know which cases need to be added to the + // PSI switch and which destinations they go to. If PSI needs its + // default destination changed, NewDefault is set. Start changing + // stuff now. + if (NewDefault) { + AddPredecessorToBlock(NewDefault, Pred, BB); + PSI->setSuccessor(0, NewDefault); + } + + // Okay, add all of the cases now. + for (unsigned i = 0, e = Cases.size(); i != e; ++i) { + AddPredecessorToBlock(Cases[i].second, Pred, BB); + PSI->addCase(Cases[i].first, Cases[i].second); + } + + // Okay, last check. If BB is still a successor of PSI, then we must + // have an infinite loop case. If so, add an infinitely looping block + // to handle the case to preserve the behavior of the code. + BasicBlock *InfLoopBlock = 0; + for (unsigned i = 0, e = PSI->getNumSuccessors(); i != e; ++i) + if (PSI->getSuccessor(i) == BB) { + if (InfLoopBlock == 0) { + // Insert it at the end of the loop, because it's either code, + // or it won't matter if it's hot. :) + InfLoopBlock = new BasicBlock("infloop", BB->getParent()); + new BranchInst(InfLoopBlock, InfLoopBlock); + } + PSI->setSuccessor(i, InfLoopBlock); + } + + Changed = true; + } + } + + // If we removed all predecessors of this block, recursively call + // SimplifyCFG to remove it. + if (pred_begin(BB) == pred_end(BB)) + return SimplifyCFG(BB); } // Merge basic blocks into their predecessor if there is only one distinct From alkis at niobe.cs.uiuc.edu Tue Feb 24 02:59:01 2004 From: alkis at niobe.cs.uiuc.edu (Alkis Evlogimenos) Date: Tue Feb 24 02:59:01 2004 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/VirtRegMap.h VirtRegMap.cpp RegAllocLinearScan.cpp Message-ID: <200402240858.i1O8whW21194@niobe.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen: VirtRegMap.h updated: 1.4 -> 1.5 VirtRegMap.cpp updated: 1.1 -> 1.2 RegAllocLinearScan.cpp updated: 1.63 -> 1.64 --- Log message: Move machine code rewriter and spiller outside the register allocator. The implementation is completely rewritten and now employs several optimizations not exercised before. For example for 164.gzip we have 997 loads and 699 stores vs the 1221 loads and 880 stores we have before. --- Diffs of the changes: (+176 -143) Index: llvm/lib/CodeGen/VirtRegMap.h diff -u llvm/lib/CodeGen/VirtRegMap.h:1.4 llvm/lib/CodeGen/VirtRegMap.h:1.5 --- llvm/lib/CodeGen/VirtRegMap.h:1.4 Tue Feb 24 00:30:36 2004 +++ llvm/lib/CodeGen/VirtRegMap.h Tue Feb 24 02:58:29 2004 @@ -98,6 +98,8 @@ std::ostream& operator<<(std::ostream& os, const VirtRegMap& li); + void eliminateVirtRegs(MachineFunction& mf, const VirtRegMap& vrm); + } // End llvm namespace #endif Index: llvm/lib/CodeGen/VirtRegMap.cpp diff -u llvm/lib/CodeGen/VirtRegMap.cpp:1.1 llvm/lib/CodeGen/VirtRegMap.cpp:1.2 --- llvm/lib/CodeGen/VirtRegMap.cpp:1.1 Mon Feb 23 17:08:11 2004 +++ llvm/lib/CodeGen/VirtRegMap.cpp Tue Feb 24 02:58:29 2004 @@ -7,20 +7,32 @@ // //===----------------------------------------------------------------------===// // -// This file implements the virtual register map. +// This file implements the virtual register map. It also implements +// the eliminateVirtRegs() function that given a virtual register map +// and a machine function it eliminates all virtual references by +// replacing them with physical register references and adds spill +// code as necessary. // //===----------------------------------------------------------------------===// +#define DEBUG_TYPE "regalloc" #include "VirtRegMap.h" +#include "llvm/Function.h" #include "llvm/CodeGen/MachineFrameInfo.h" #include "llvm/Target/TargetMachine.h" +#include "llvm/Target/TargetInstrInfo.h" #include "Support/Statistic.h" +#include "Support/Debug.h" +#include "Support/STLExtras.h" #include using namespace llvm; namespace { - Statistic<> numSpills("ra-linearscan", "Number of register spills"); + Statistic<> numSpills("spiller", "Number of register spills"); + Statistic<> numStores("spiller", "Number of stores added"); + Statistic<> numLoads ("spiller", "Number of loads added"); + } int VirtRegMap::assignVirt2StackSlot(unsigned virtReg) @@ -52,4 +64,149 @@ << vrm.v2ssMap_[i] << "]\n"; } return std::cerr << '\n'; +} + +namespace { + + class Spiller { + typedef std::vector Phys2VirtMap; + typedef std::vector PhysFlag; + + MachineFunction& mf_; + const TargetMachine& tm_; + const TargetInstrInfo& tii_; + const MRegisterInfo& mri_; + const VirtRegMap& vrm_; + Phys2VirtMap p2vMap_; + PhysFlag dirty_; + + public: + Spiller(MachineFunction& mf, const VirtRegMap& vrm) + : mf_(mf), + tm_(mf_.getTarget()), + tii_(tm_.getInstrInfo()), + mri_(*tm_.getRegisterInfo()), + vrm_(vrm), + p2vMap_(mri_.getNumRegs()), + dirty_(mri_.getNumRegs()) { + DEBUG(std::cerr << "********** REWRITE MACHINE CODE **********\n"); + DEBUG(std::cerr << "********** Function: " + << mf_.getFunction()->getName() << '\n'); + } + + void eliminateVirtRegs() { + for (MachineFunction::iterator mbbi = mf_.begin(), + mbbe = mf_.end(); mbbi != mbbe; ++mbbi) { + // clear map and dirty flag + p2vMap_.assign(p2vMap_.size(), 0); + dirty_.assign(dirty_.size(), false); + DEBUG(std::cerr << mbbi->getBasicBlock()->getName() << ":\n"); + eliminateVirtRegsInMbb(*mbbi); + } + } + + private: + void vacateJustPhysReg(MachineBasicBlock& mbb, + MachineBasicBlock::iterator mii, + unsigned physReg) { + unsigned virtReg = p2vMap_[physReg]; + if (dirty_[physReg] && vrm_.hasStackSlot(virtReg)) { + mri_.storeRegToStackSlot(mbb, mii, physReg, + vrm_.getStackSlot(virtReg), + mri_.getRegClass(physReg)); + ++numStores; + DEBUG(std::cerr << "*\t"; prior(mii)->print(std::cerr, tm_)); + } + p2vMap_[physReg] = 0; + dirty_[physReg] = false; + } + + void vacatePhysReg(MachineBasicBlock& mbb, + MachineBasicBlock::iterator mii, + unsigned physReg) { + vacateJustPhysReg(mbb, mii, physReg); + for (const unsigned* as = mri_.getAliasSet(physReg); *as; ++as) + vacateJustPhysReg(mbb, mii, *as); + } + + void handleUse(MachineBasicBlock& mbb, + MachineBasicBlock::iterator mii, + unsigned virtReg, + unsigned physReg) { + // check if we are replacing a previous mapping + if (p2vMap_[physReg] != virtReg) { + vacatePhysReg(mbb, mii, physReg); + p2vMap_[physReg] = virtReg; + // load if necessary + if (vrm_.hasStackSlot(virtReg)) { + mri_.loadRegFromStackSlot(mbb, mii, physReg, + vrm_.getStackSlot(virtReg), + mri_.getRegClass(physReg)); + ++numLoads; + DEBUG(std::cerr << "*\t"; prior(mii)->print(std::cerr,tm_)); + } + } + } + + void handleDef(MachineBasicBlock& mbb, + MachineBasicBlock::iterator mii, + unsigned virtReg, + unsigned physReg) { + // check if we are replacing a previous mapping + if (p2vMap_[physReg] != virtReg) + vacatePhysReg(mbb, mii, physReg); + + p2vMap_[physReg] = virtReg; + dirty_[physReg] = true; + } + + void eliminateVirtRegsInMbb(MachineBasicBlock& mbb) { + for (MachineBasicBlock::iterator mii = mbb.begin(), + mie = mbb.end(); mii != mie; ++mii) { + // rewrite all used operands + for (unsigned i = 0, e = mii->getNumOperands(); i != e; ++i) { + MachineOperand& op = mii->getOperand(i); + if (op.isRegister() && op.isUse() && + MRegisterInfo::isVirtualRegister(op.getReg())) { + unsigned physReg = vrm_.getPhys(op.getReg()); + handleUse(mbb, mii, op.getReg(), physReg); + mii->SetMachineOperandReg(i, physReg); + // mark as dirty if this is def&use + if (op.isDef()) dirty_[physReg] = true; + } + } + + // spill implicit defs + const TargetInstrDescriptor& tid =tii_.get(mii->getOpcode()); + for (const unsigned* id = tid.ImplicitDefs; *id; ++id) + vacatePhysReg(mbb, mii, *id); + + // rewrite def operands (def&use was handled with the + // uses so don't check for those here) + for (unsigned i = 0, e = mii->getNumOperands(); i != e; ++i) { + MachineOperand& op = mii->getOperand(i); + if (op.isRegister() && !op.isUse()) + if (MRegisterInfo::isPhysicalRegister(op.getReg())) + vacatePhysReg(mbb, mii, op.getReg()); + else { + unsigned physReg = vrm_.getPhys(op.getReg()); + handleDef(mbb, mii, op.getReg(), physReg); + mii->SetMachineOperandReg(i, physReg); + } + } + + DEBUG(std::cerr << '\t'; mii->print(std::cerr, tm_)); + } + + for (unsigned i = 1, e = p2vMap_.size(); i != e; ++i) + vacateJustPhysReg(mbb, mbb.getFirstTerminator(), i); + + } + }; +} + + +void llvm::eliminateVirtRegs(MachineFunction& mf, const VirtRegMap& vrm) +{ + Spiller(mf, vrm).eliminateVirtRegs(); } Index: llvm/lib/CodeGen/RegAllocLinearScan.cpp diff -u llvm/lib/CodeGen/RegAllocLinearScan.cpp:1.63 llvm/lib/CodeGen/RegAllocLinearScan.cpp:1.64 --- llvm/lib/CodeGen/RegAllocLinearScan.cpp:1.63 Mon Feb 23 17:47:10 2004 +++ llvm/lib/CodeGen/RegAllocLinearScan.cpp Tue Feb 24 02:58:30 2004 @@ -10,6 +10,7 @@ // This file implements a linear scan register allocator. // //===----------------------------------------------------------------------===// + #define DEBUG_TYPE "regalloc" #include "llvm/Function.h" #include "llvm/CodeGen/LiveVariables.h" @@ -18,28 +19,21 @@ #include "llvm/CodeGen/Passes.h" #include "llvm/CodeGen/SSARegMap.h" #include "llvm/Target/MRegisterInfo.h" -#include "llvm/Target/TargetInstrInfo.h" #include "llvm/Target/TargetMachine.h" -#include "llvm/Support/CFG.h" #include "Support/Debug.h" -#include "Support/DepthFirstIterator.h" -#include "Support/Statistic.h" -#include "Support/STLExtras.h" #include "LiveIntervals.h" #include "PhysRegTracker.h" #include "VirtRegMap.h" #include +#include + using namespace llvm; namespace { - Statistic<> numStores("ra-linearscan", "Number of stores added"); - Statistic<> numLoads ("ra-linearscan", "Number of loads added"); - class RA : public MachineFunctionPass { private: MachineFunction* mf_; const TargetMachine* tm_; - const TargetInstrInfo* tii_; const MRegisterInfo* mri_; LiveIntervals* li_; typedef std::list IntervalPtrs; @@ -48,8 +42,6 @@ std::auto_ptr prt_; std::auto_ptr vrm_; - int instrAdded_; - typedef std::vector SpillWeights; SpillWeights spillWeights_; @@ -70,6 +62,9 @@ void releaseMemory(); private: + /// linearScan - the linear scan algorithm + void linearScan(); + /// initIntervalSets - initializa the four interval sets: /// unhandled, fixed, active and inactive void initIntervalSets(LiveIntervals::Intervals& li); @@ -90,10 +85,6 @@ /// is available, or spill. void assignRegOrStackSlotAtInterval(IntervalPtrs::value_type cur); - /// addSpillCode - adds spill code for interval. The interval - /// must be modified by LiveIntervals::updateIntervalForSpill. - void addSpillCode(IntervalPtrs::value_type li, int slot); - /// /// register handling helpers /// @@ -152,7 +143,6 @@ bool RA::runOnMachineFunction(MachineFunction &fn) { mf_ = &fn; tm_ = &fn.getTarget(); - tii_ = &tm_->getInstrInfo(); mri_ = tm_->getRegisterInfo(); li_ = &getAnalysis(); if (!prt_.get()) prt_.reset(new PhysRegTracker(*mri_)); @@ -160,6 +150,15 @@ initIntervalSets(li_->getIntervals()); + linearScan(); + + eliminateVirtRegs(*mf_, *vrm_); + + return true; +} + +void RA::linearScan() +{ // linear scan algorithm DEBUG(std::cerr << "********** LINEAR SCAN **********\n"); DEBUG(std::cerr << "********** Function: " @@ -223,63 +222,6 @@ } DEBUG(std::cerr << *vrm_); - - DEBUG(std::cerr << "********** REWRITE MACHINE CODE **********\n"); - DEBUG(std::cerr << "********** Function: " - << mf_->getFunction()->getName() << '\n'); - - for (MachineFunction::iterator mbbi = mf_->begin(), mbbe = mf_->end(); - mbbi != mbbe; ++mbbi) { - instrAdded_ = 0; - - for (MachineBasicBlock::iterator mii = mbbi->begin(), mie = mbbi->end(); - mii != mie; ++mii) { - DEBUG( - std::cerr << '['; - unsigned index = li_->getInstructionIndex(mii); - if (index == std::numeric_limits::max()) - std::cerr << '*'; - else - std::cerr << index; - std::cerr << "]\t"; - mii->print(std::cerr, *tm_)); - - // use our current mapping and actually replace every - // virtual register with its allocated physical registers - DEBUG(std::cerr << "\t"); - for (unsigned i = 0, e = mii->getNumOperands(); - i != e; ++i) { - MachineOperand& op = mii->getOperand(i); - if (op.isRegister() && - MRegisterInfo::isVirtualRegister(op.getReg())) { - unsigned virtReg = op.getReg(); - unsigned physReg = vrm_->getPhys(virtReg); - DEBUG(std::cerr << "\t[reg" << virtReg - << " -> " << mri_->getName(physReg) << ']'); - mii->SetMachineOperandReg(i, physReg); - } - } - DEBUG(std::cerr << '\n'); - } - } - - DEBUG(std::cerr << "********** MACHINEINSTRS **********\n"); - DEBUG( - for (MachineFunction::iterator mbbi = mf_->begin(), mbbe = mf_->end(); - mbbi != mbbe; ++mbbi) { - std::cerr << mbbi->getBasicBlock()->getName() << ":\n"; - for (MachineBasicBlock::iterator mii = mbbi->begin(), - mie = mbbi->end(); mii != mie; ++mii) { - unsigned index = li_->getInstructionIndex(mii); - if (index == std::numeric_limits::max()) - std::cerr << "*\t"; - else - std::cerr << index << '\t'; - mii->print(std::cerr, *tm_); - } - }); - - return true; } void RA::initIntervalSets(LiveIntervals::Intervals& li) @@ -450,7 +392,6 @@ // sorted on earliest start point and we may have changed our // start point. if (!cur->empty()) { - addSpillCode(cur, slot); IntervalPtrs::iterator it = unhandled_.begin(); while (it != unhandled_.end() && (*it)->start() < cur->start()) ++it; @@ -484,7 +425,6 @@ earliestStart = std::min(earliestStart, (*i)->start()); int slot = vrm_->assignVirt2StackSlot((*i)->reg); li_->updateSpilledInterval(**i, slot); - addSpillCode(*i, slot); } } for (IntervalPtrs::iterator i = inactive_.begin(); @@ -497,7 +437,6 @@ earliestStart = std::min(earliestStart, (*i)->start()); int slot = vrm_->assignVirt2StackSlot((*i)->reg); li_->updateSpilledInterval(**i, slot); - addSpillCode(*i, slot); } } @@ -576,71 +515,6 @@ prt_->addRegUse((*i)->reg); else prt_->addRegUse(vrm_->getPhys((*i)->reg)); - } - } -} - -void RA::addSpillCode(IntervalPtrs::value_type li, int slot) -{ - // We scan the instructions corresponding to each range. We load - // when we have a use and spill at end of basic blocks or end of - // ranges only if the register was modified. - const TargetRegisterClass* rc = mf_->getSSARegMap()->getRegClass(li->reg); - - for (LiveIntervals::Interval::Ranges::iterator i = li->ranges.begin(), - e = li->ranges.end(); i != e; ++i) { - unsigned index = i->first; - unsigned end = i->second; - - bool loaded = false; - - // skip deleted instructions. getInstructionFromIndex returns - // null if the instruction was deleted (because of coalescing - // for example) - while (!li_->getInstructionFromIndex(index)) - index += LiveIntervals::InstrSlots::NUM; - MachineBasicBlock::iterator mi = li_->getInstructionFromIndex(index); - MachineBasicBlock* mbb = mi->getParent(); - assert(mbb && "machine instruction not bound to basic block"); - - for (; index < end; index += LiveIntervals::InstrSlots::NUM) { - // ignore deleted instructions - while (!li_->getInstructionFromIndex(index)) index += 2; - mi = li_->getInstructionFromIndex(index); - DEBUG(std::cerr << "\t\t\t\texamining: \t\t\t\t\t" - << LiveIntervals::getBaseIndex(index) << '\t'; - mi->print(std::cerr, *tm_)); - - // if it is used in this instruction load it - for (unsigned i = 0; i < mi->getNumOperands(); ++i) { - MachineOperand& mop = mi->getOperand(i); - if (mop.isRegister() && mop.getReg() == li->reg && - mop.isUse() && !loaded) { - loaded = true; - mri_->loadRegFromStackSlot(*mbb, mi, li->reg, slot, rc); - ++numLoads; - DEBUG(std::cerr << "\t\t\t\tadded load for reg" << li->reg - << " from ss#" << slot << " before: \t" - << LiveIntervals::getBaseIndex(index) << '\t'; - mi->print(std::cerr, *tm_)); - } - } - - // if it is defined in this instruction mark as dirty - for (unsigned i = 0; i < mi->getNumOperands(); ++i) { - MachineOperand& mop = mi->getOperand(i); - if (mop.isRegister() && mop.getReg() == li->reg && - mop.isDef()) { - loaded = true; - - mri_->storeRegToStackSlot(*mbb, next(mi), li->reg, slot,rc); - ++numStores; - DEBUG(std::cerr << "\t\t\t\tadded store for reg" << li->reg - << " to ss#" << slot << " after: \t\t" - << LiveIntervals::getBaseIndex(index) << " \t"; - mi->print(std::cerr, *tm_)); - } - } } } } From lattner at cs.uiuc.edu Tue Feb 24 10:10:04 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Feb 24 10:10:04 2004 Subject: [llvm-commits] CVS: llvm/lib/Transforms/Utils/SimplifyCFG.cpp Message-ID: <200402241609.KAA09997@zion.cs.uiuc.edu> Changes in directory llvm/lib/Transforms/Utils: SimplifyCFG.cpp updated: 1.26 -> 1.27 --- Log message: If a block is made dead, make sure to promptly remove it. --- Diffs of the changes: (+8 -0) Index: llvm/lib/Transforms/Utils/SimplifyCFG.cpp diff -u llvm/lib/Transforms/Utils/SimplifyCFG.cpp:1.26 llvm/lib/Transforms/Utils/SimplifyCFG.cpp:1.27 --- llvm/lib/Transforms/Utils/SimplifyCFG.cpp:1.26 Tue Feb 24 01:23:58 2004 +++ llvm/lib/Transforms/Utils/SimplifyCFG.cpp Tue Feb 24 10:09:21 2004 @@ -512,6 +512,14 @@ Preds.pop_back(); } + + // If this block is now dead, remove it. + if (pred_begin(BB) == pred_end(BB)) { + // We know there are no successors, so just nuke the block. + M->getBasicBlockList().erase(BB); + return true; + } + } else if (SwitchInst *SI = dyn_cast(BB->begin())) { // If the only instruction in this block is a switch instruction, see if we // can fold the switch instruction into a switch in a predecessor block. From criswell at cs.uiuc.edu Tue Feb 24 10:15:01 2004 From: criswell at cs.uiuc.edu (John Criswell) Date: Tue Feb 24 10:15:01 2004 Subject: [llvm-commits] CVS: llvm/docs/LangRef.html Message-ID: <200402241614.KAA27692@choi.cs.uiuc.edu> Changes in directory llvm/docs: LangRef.html updated: 1.49 -> 1.50 --- Log message: Fixed minor typos. --- Diffs of the changes: (+3 -3) Index: llvm/docs/LangRef.html diff -u llvm/docs/LangRef.html:1.49 llvm/docs/LangRef.html:1.50 --- llvm/docs/LangRef.html:1.49 Mon Feb 23 22:54:45 2004 +++ llvm/docs/LangRef.html Tue Feb 24 10:13:56 2004 @@ -1283,8 +1283,8 @@

The 'malloc' instruction allocates memory from the system heap and returns a pointer to it.

Arguments:

The the 'malloc' instruction allocates sizeof(<type>)*NumElements -bytes of memory from the operating system, and returns a pointer of the +

The 'malloc' instruction allocates sizeof(<type>)*NumElements +bytes of memory from the operating system and returns a pointer of the appropriate type to the program. The second form of the instruction is a shorter version of the first instruction that defaults to allocating one element.

@@ -2053,6 +2053,6 @@

Chris Lattner

The LLVM Compiler Infrastructure
-Last modified: $Date: 2004/02/24 04:54:45 $

+Last modified: $Date: 2004/02/24 16:13:56 $ From lattner at cs.uiuc.edu Tue Feb 24 12:11:02 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Feb 24 12:11:02 2004 Subject: [llvm-commits] CVS: llvm/lib/Transforms/Scalar/InstructionCombining.cpp Message-ID: <200402241810.MAA08249@apoc.cs.uiuc.edu> Changes in directory llvm/lib/Transforms/Scalar: InstructionCombining.cpp updated: 1.164 -> 1.165 --- Log message: Fix a faulty optimization on FP values --- Diffs of the changes: (+2 -1) Index: llvm/lib/Transforms/Scalar/InstructionCombining.cpp diff -u llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.164 llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.165 --- llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.164 Mon Feb 23 15:46:58 2004 +++ llvm/lib/Transforms/Scalar/InstructionCombining.cpp Tue Feb 24 12:10:14 2004 @@ -441,7 +441,8 @@ Value *LHS = I.getOperand(0), *RHS = I.getOperand(1); // X + 0 --> X - if (RHS == Constant::getNullValue(I.getType())) + if (!I.getType()->isFloatingPoint() && // -0 + +0 = +0, so it's not a noop + RHS == Constant::getNullValue(I.getType())) return ReplaceInstUsesWith(I, LHS); // X + X --> X << 1 From lattner at cs.uiuc.edu Tue Feb 24 12:21:01 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Feb 24 12:21:01 2004 Subject: [llvm-commits] CVS: llvm/test/Programs/Makefile.programs Message-ID: <200402241820.MAA24784@zion.cs.uiuc.edu> Changes in directory llvm/test/Programs: Makefile.programs updated: 1.120 -> 1.121 --- Log message: Add a couple of missing dependencies Remove the Output/%.noopt-linked.bc target, using linked.rbc instead --- Diffs of the changes: (+4 -9) Index: llvm/test/Programs/Makefile.programs diff -u llvm/test/Programs/Makefile.programs:1.120 llvm/test/Programs/Makefile.programs:1.121 --- llvm/test/Programs/Makefile.programs:1.120 Fri Feb 13 17:39:16 2004 +++ llvm/test/Programs/Makefile.programs Tue Feb 24 12:19:44 2004 @@ -209,11 +209,6 @@ $(LOPT) -mstrip $< -o $@ -f -$(PROGRAMS_TO_TEST:%=Output/%.noopt-linked.bc): \ -Output/%.noopt-linked.bc: Output/%.linked.rll $(LGCCAS) - $(LGCCAS) $(STATS) -disable-opt $< -o $@ - - ifndef DISABLE_FOR_LLVM_PROGRAMS # Rule to produce final program bytecode file from linked, optimized, bytecode. # Link the program to the libraries it uses, then perform postlink @@ -236,19 +231,19 @@ endif $(PROGRAMS_TO_TEST:%=Output/%.noopt-llvm.bc): \ -Output/%.noopt-llvm.bc: Output/%.noopt-linked.bc $(LGCCLDPROG) +Output/%.noopt-llvm.bc: Output/%.linked.rbc $(LGCCLDPROG) $(LGCCLD) -disable-opt $(STATS) $< -lc $(LIBS) -lcrtend -o Output/$*.noopt-llvm $(PROGRAMS_TO_TEST:%=Output/%.noopt-llvm): \ -Output/%.noopt-llvm: Output/%.noopt-linked.bc $(LGCCLDPROG) +Output/%.noopt-llvm: Output/%.linked.rbc $(LGCCLDPROG) $(LGCCLD) -disable-opt $(STATS) $< -lc $(LIBS) -lcrtend -o Output/$*.noopt-llvm endif # ifndef DISABLE_FOR_LLVM_PROGRAMS # Targets to get the pass arguments that gccas and gccld are using... -Output/gccas-pass-args: $(LGCCAS) +Output/gccas-pass-args: $(LGCCAS) Output/.dir $(LGCCAS) /dev/null -o /dev/null -debug-pass=Arguments > $@.1 2>&1 sed 's/Pass Arguments: //' < $@.1 > $@ -Output/gccld-pass-args: $(LGCCLDPROG) +Output/gccld-pass-args: $(LGCCLDPROG) Output/.dir $(LLVMAS) < /dev/null > Output/gccld.test.bc $(LGCCLD) -disable-inlining Output/gccld.test.bc -o Output/gccld.test-out -debug-pass=Arguments > $@.1 2>&1 sed 's/Pass Arguments: //' < $@.1 > $@ From lattner at cs.uiuc.edu Tue Feb 24 12:35:01 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Feb 24 12:35:01 2004 Subject: [llvm-commits] CVS: llvm/lib/Target/CBackend/Writer.cpp Message-ID: <200402241834.MAA06650@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/CBackend: Writer.cpp updated: 1.163 -> 1.164 --- Log message: Fix some unexpected fallout from the config.h changes. Because the CBE no longer was getting this #include, it always fell back on the less precise floating point initializer values, causing some testsuite failures. --- Diffs of the changes: (+1 -0) Index: llvm/lib/Target/CBackend/Writer.cpp diff -u llvm/lib/Target/CBackend/Writer.cpp:1.163 llvm/lib/Target/CBackend/Writer.cpp:1.164 --- llvm/lib/Target/CBackend/Writer.cpp:1.163 Thu Feb 19 23:49:22 2004 +++ llvm/lib/Target/CBackend/Writer.cpp Tue Feb 24 12:34:10 2004 @@ -31,6 +31,7 @@ #include "llvm/Support/InstVisitor.h" #include "llvm/Support/Mangler.h" #include "Support/StringExtras.h" +#include "Config/config.h" #include #include using namespace llvm; From gaeke at cs.uiuc.edu Tue Feb 24 13:46:01 2004 From: gaeke at cs.uiuc.edu (Brian Gaeke) Date: Tue Feb 24 13:46:01 2004 Subject: [llvm-commits] CVS: llvm/lib/Target/Sparc/RegAlloc/PhyRegAlloc.cpp Message-ID: <200402241945.NAA21038@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/Sparc/RegAlloc: PhyRegAlloc.cpp updated: 1.137 -> 1.138 --- Log message: FunctionLiveVarInfo.h moved: include/llvm/CodeGen -> lib/Target/Sparc/LiveVar --- Diffs of the changes: (+1 -1) Index: llvm/lib/Target/Sparc/RegAlloc/PhyRegAlloc.cpp diff -u llvm/lib/Target/Sparc/RegAlloc/PhyRegAlloc.cpp:1.137 llvm/lib/Target/Sparc/RegAlloc/PhyRegAlloc.cpp:1.138 --- llvm/lib/Target/Sparc/RegAlloc/PhyRegAlloc.cpp:1.137 Fri Feb 13 19:18:33 2004 +++ llvm/lib/Target/Sparc/RegAlloc/PhyRegAlloc.cpp Tue Feb 24 13:45:45 2004 @@ -25,13 +25,13 @@ #include "PhyRegAlloc.h" #include "RegAllocCommon.h" #include "RegClass.h" +#include "../LiveVar/FunctionLiveVarInfo.h" #include "llvm/Constants.h" #include "llvm/DerivedTypes.h" #include "llvm/iOther.h" #include "llvm/Module.h" #include "llvm/Type.h" #include "llvm/Analysis/LoopInfo.h" -#include "llvm/CodeGen/FunctionLiveVarInfo.h" #include "llvm/CodeGen/InstrSelection.h" #include "llvm/CodeGen/MachineCodeForInstruction.h" #include "llvm/CodeGen/MachineFunction.h" From gaeke at cs.uiuc.edu Tue Feb 24 13:46:35 2004 From: gaeke at cs.uiuc.edu (Brian Gaeke) Date: Tue Feb 24 13:46:35 2004 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/InstrSched/InstrScheduling.cpp SchedPriorities.cpp Message-ID: <200402241945.NAA21024@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/InstrSched: InstrScheduling.cpp updated: 1.66 -> 1.67 SchedPriorities.cpp updated: 1.30 -> 1.31 --- Log message: FunctionLiveVarInfo.h moved: include/llvm/CodeGen -> lib/Target/Sparc/LiveVar --- Diffs of the changes: (+2 -2) Index: llvm/lib/CodeGen/InstrSched/InstrScheduling.cpp diff -u llvm/lib/CodeGen/InstrSched/InstrScheduling.cpp:1.66 llvm/lib/CodeGen/InstrSched/InstrScheduling.cpp:1.67 --- llvm/lib/CodeGen/InstrSched/InstrScheduling.cpp:1.66 Wed Feb 18 10:38:18 2004 +++ llvm/lib/CodeGen/InstrSched/InstrScheduling.cpp Tue Feb 24 13:45:44 2004 @@ -16,7 +16,7 @@ #include "llvm/CodeGen/MachineInstr.h" #include "llvm/CodeGen/MachineCodeForInstruction.h" #include "llvm/CodeGen/MachineFunction.h" -#include "llvm/CodeGen/FunctionLiveVarInfo.h" +#include "../../Target/Sparc/LiveVar/FunctionLiveVarInfo.h" #include "llvm/Target/TargetMachine.h" #include "llvm/BasicBlock.h" #include "Support/CommandLine.h" Index: llvm/lib/CodeGen/InstrSched/SchedPriorities.cpp diff -u llvm/lib/CodeGen/InstrSched/SchedPriorities.cpp:1.30 llvm/lib/CodeGen/InstrSched/SchedPriorities.cpp:1.31 --- llvm/lib/CodeGen/InstrSched/SchedPriorities.cpp:1.30 Wed Feb 11 19:34:05 2004 +++ llvm/lib/CodeGen/InstrSched/SchedPriorities.cpp Tue Feb 24 13:45:44 2004 @@ -18,7 +18,7 @@ //===----------------------------------------------------------------------===// #include "SchedPriorities.h" -#include "llvm/CodeGen/FunctionLiveVarInfo.h" +#include "../../Target/Sparc/LiveVar/FunctionLiveVarInfo.h" #include "llvm/CodeGen/MachineBasicBlock.h" #include "llvm/Support/CFG.h" #include "Support/PostOrderIterator.h" From gaeke at cs.uiuc.edu Tue Feb 24 13:47:06 2004 From: gaeke at cs.uiuc.edu (Brian Gaeke) Date: Tue Feb 24 13:47:06 2004 Subject: [llvm-commits] CVS: llvm/lib/Target/Sparc/LiveVar/FunctionLiveVarInfo.h BBLiveVar.cpp FunctionLiveVarInfo.cpp Message-ID: <200402241945.NAA21033@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/Sparc/LiveVar: FunctionLiveVarInfo.h added (r1.1) BBLiveVar.cpp updated: 1.44 -> 1.45 FunctionLiveVarInfo.cpp updated: 1.53 -> 1.54 --- Log message: FunctionLiveVarInfo.h moved: include/llvm/CodeGen -> lib/Target/Sparc/LiveVar --- Diffs of the changes: (+113 -2) Index: llvm/lib/Target/Sparc/LiveVar/FunctionLiveVarInfo.h diff -c /dev/null llvm/lib/Target/Sparc/LiveVar/FunctionLiveVarInfo.h:1.1 *** /dev/null Tue Feb 24 13:45:55 2004 --- llvm/lib/Target/Sparc/LiveVar/FunctionLiveVarInfo.h Tue Feb 24 13:45:45 2004 *************** *** 0 **** --- 1,111 ---- + //===-- CodeGen/FunctionLiveVarInfo.h - LiveVar Analysis --------*- C++ -*-===// + // + // The LLVM Compiler Infrastructure + // + // This file was developed by the LLVM research group and is distributed under + // the University of Illinois Open Source License. See LICENSE.TXT for details. + // + //===----------------------------------------------------------------------===// + // + // This is the interface for live variable info of a function that is required + // by any other part of the compiler + // + // After the analysis, getInSetOfBB or getOutSetofBB can be called to get + // live var info of a BB. + // + // The live var set before an instruction can be obtained in 2 ways: + // + // 1. Use the method getLiveVarSetAfterInst(Instruction *) to get the LV Info + // just after an instruction. (also exists getLiveVarSetBeforeInst(..)) + // + // This function caluclates the LV info for a BB only once and caches that + // info. If the cache does not contain the LV info of the instruction, it + // calculates the LV info for the whole BB and caches them. + // + // Getting liveVar info this way uses more memory since, LV info should be + // cached. However, if you need LV info of nearly all the instructions of a + // BB, this is the best and simplest interfrace. + // + // 2. Use the OutSet and applyTranferFuncForInst(const Instruction *const Inst) + // declared in LiveVarSet and traverse the instructions of a basic block in + // reverse (using const_reverse_iterator in the BB class). + // + //===----------------------------------------------------------------------===// + + #ifndef FUNCTION_LIVE_VAR_INFO_H + #define FUNCTION_LIVE_VAR_INFO_H + + #include "Support/hash_map" + #include "llvm/Pass.h" + #include "llvm/CodeGen/ValueSet.h" + + namespace llvm { + + class BBLiveVar; + class MachineInstr; + + class FunctionLiveVarInfo : public FunctionPass { + // Machine Instr to LiveVarSet Map for providing LVset BEFORE each inst + // These sets are owned by this map and will be freed in releaseMemory(). + hash_map MInst2LVSetBI; + + // Machine Instr to LiveVarSet Map for providing LVset AFTER each inst. + // These sets are just pointers to sets in MInst2LVSetBI or BBLiveVar. + hash_map MInst2LVSetAI; + + hash_map BBLiveVarInfo; + + // Stored Function that the data is computed with respect to + const Function *M; + + // --------- private methods ----------------------------------------- + + // constructs BBLiveVars and init Def and In sets + void constructBBs(const Function *F); + + // do one backward pass over the CFG + bool doSingleBackwardPass(const Function *F, unsigned int iter); + + // calculates live var sets for instructions in a BB + void calcLiveVarSetsForBB(const BasicBlock *BB); + + public: + // --------- Implement the FunctionPass interface ---------------------- + + // runOnFunction - Perform analysis, update internal data structures. + virtual bool runOnFunction(Function &F); + + // releaseMemory - After LiveVariable analysis has been used, forget! + virtual void releaseMemory(); + + // getAnalysisUsage - Provide self! + virtual void getAnalysisUsage(AnalysisUsage &AU) const { + AU.setPreservesAll(); + } + + // --------- Functions to access analysis results ------------------- + + // get OutSet of a BB + const ValueSet &getOutSetOfBB(const BasicBlock *BB) const; + ValueSet &getOutSetOfBB(const BasicBlock *BB) ; + + // get InSet of a BB + const ValueSet &getInSetOfBB(const BasicBlock *BB) const; + ValueSet &getInSetOfBB(const BasicBlock *BB) ; + + // gets the Live var set BEFORE an instruction. + // if BB is specified and the live var set has not yet been computed, + // it will be computed on demand. + const ValueSet &getLiveVarSetBeforeMInst(const MachineInstr *MI, + const BasicBlock *BB = 0); + + // gets the Live var set AFTER an instruction + // if BB is specified and the live var set has not yet been computed, + // it will be computed on demand. + const ValueSet &getLiveVarSetAfterMInst(const MachineInstr *MI, + const BasicBlock *BB = 0); + }; + + } // End llvm namespace + + #endif Index: llvm/lib/Target/Sparc/LiveVar/BBLiveVar.cpp diff -u llvm/lib/Target/Sparc/LiveVar/BBLiveVar.cpp:1.44 llvm/lib/Target/Sparc/LiveVar/BBLiveVar.cpp:1.45 --- llvm/lib/Target/Sparc/LiveVar/BBLiveVar.cpp:1.44 Wed Feb 11 20:27:09 2004 +++ llvm/lib/Target/Sparc/LiveVar/BBLiveVar.cpp Tue Feb 24 13:45:45 2004 @@ -12,7 +12,7 @@ //===----------------------------------------------------------------------===// #include "BBLiveVar.h" -#include "llvm/CodeGen/FunctionLiveVarInfo.h" +#include "FunctionLiveVarInfo.h" #include "llvm/CodeGen/MachineInstr.h" #include "llvm/CodeGen/MachineBasicBlock.h" #include "llvm/Support/CFG.h" Index: llvm/lib/Target/Sparc/LiveVar/FunctionLiveVarInfo.cpp diff -u llvm/lib/Target/Sparc/LiveVar/FunctionLiveVarInfo.cpp:1.53 llvm/lib/Target/Sparc/LiveVar/FunctionLiveVarInfo.cpp:1.54 --- llvm/lib/Target/Sparc/LiveVar/FunctionLiveVarInfo.cpp:1.53 Wed Feb 11 20:27:09 2004 +++ llvm/lib/Target/Sparc/LiveVar/FunctionLiveVarInfo.cpp Tue Feb 24 13:45:45 2004 @@ -12,7 +12,7 @@ // //===----------------------------------------------------------------------===// -#include "llvm/CodeGen/FunctionLiveVarInfo.h" +#include "FunctionLiveVarInfo.h" #include "llvm/CodeGen/MachineInstr.h" #include "llvm/CodeGen/MachineFunction.h" #include "llvm/Target/TargetMachine.h" From gaeke at cs.uiuc.edu Tue Feb 24 13:48:01 2004 From: gaeke at cs.uiuc.edu (Brian Gaeke) Date: Tue Feb 24 13:48:01 2004 Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/FunctionLiveVarInfo.h Message-ID: <200402241946.NAA21070@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/CodeGen: FunctionLiveVarInfo.h (r1.32) removed --- Log message: FunctionLiveVarInfo.h moved: include/llvm/CodeGen -> lib/Target/Sparc/LiveVar --- Diffs of the changes: (+0 -0) From gaeke at cs.uiuc.edu Tue Feb 24 14:43:01 2004 From: gaeke at cs.uiuc.edu (Brian Gaeke) Date: Tue Feb 24 14:43:01 2004 Subject: [llvm-commits] CVS: reopt/lib/Inst/lib/Phase1/Phase1.cpp PrimInfo.cpp Message-ID: <200402242042.OAA15174@kain.cs.uiuc.edu> Changes in directory reopt/lib/Inst/lib/Phase1: Phase1.cpp updated: 1.30 -> 1.31 PrimInfo.cpp updated: 1.18 -> 1.19 --- Log message: Fix ConstantAggregateZero bit rot --- Diffs of the changes: (+4 -5) Index: reopt/lib/Inst/lib/Phase1/Phase1.cpp diff -u reopt/lib/Inst/lib/Phase1/Phase1.cpp:1.30 reopt/lib/Inst/lib/Phase1/Phase1.cpp:1.31 --- reopt/lib/Inst/lib/Phase1/Phase1.cpp:1.30 Wed Nov 19 14:49:53 2003 +++ reopt/lib/Inst/lib/Phase1/Phase1.cpp Tue Feb 24 14:42:03 2004 @@ -256,10 +256,9 @@ // Make the GBT itself, and the corresponding global variable. ArrayType* gbtType = ArrayType::get(PrimInfo::getStructType(), gbtElems.size()); - ConstantArray* gbtContents = ConstantArray::get(gbtType, gbtElems); - GlobalVariable* gbt = new GlobalVariable(gbtType, true, - GlobalVariable::ExternalLinkage, - gbtContents, "ppGBT", m_module); + GlobalVariable* gbt = + new GlobalVariable(gbtType, true, GlobalVariable::ExternalLinkage, + ConstantArray::get(gbtType, gbtElems), "ppGBT", m_module); // Record the GBT size ConstantUInt* size = ConstantUInt::get(Type::UIntTy, gbtElems.size()); Index: reopt/lib/Inst/lib/Phase1/PrimInfo.cpp diff -u reopt/lib/Inst/lib/Phase1/PrimInfo.cpp:1.18 reopt/lib/Inst/lib/Phase1/PrimInfo.cpp:1.19 --- reopt/lib/Inst/lib/Phase1/PrimInfo.cpp:1.18 Wed Nov 19 14:49:53 2003 +++ reopt/lib/Inst/lib/Phase1/PrimInfo.cpp Tue Feb 24 14:42:03 2004 @@ -78,7 +78,7 @@ module->addTypeName("PrimInfo", sm_structType); } -static ConstantStruct* makeConstStruct(StructType* st, +static Constant* makeConstStruct(StructType* st, unsigned siteID, unsigned gbtType, GlobalVariable* loadVar) From lattner at cs.uiuc.edu Tue Feb 24 15:03:00 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Feb 24 15:03:00 2004 Subject: [llvm-commits] CVS: poolalloc/test/TEST.poolalloc.Makefile Message-ID: <200402242102.PAA04376@zion.cs.uiuc.edu> Changes in directory poolalloc/test: TEST.poolalloc.Makefile updated: 1.13 -> 1.14 --- Log message: Correct dependencies --- Diffs of the changes: (+1 -1) Index: poolalloc/test/TEST.poolalloc.Makefile diff -u poolalloc/test/TEST.poolalloc.Makefile:1.13 poolalloc/test/TEST.poolalloc.Makefile:1.14 --- poolalloc/test/TEST.poolalloc.Makefile:1.13 Sat Feb 21 22:09:24 2004 +++ poolalloc/test/TEST.poolalloc.Makefile Tue Feb 24 15:02:05 2004 @@ -100,4 +100,4 @@ @echo "---------------------------------------------------------------" @cat $< -REPORT_DEPENDENCIES := $(PA_RT_O) $(PA_SO) $(PROGRAMS_TO_TEST:%=Output/%.llvm.bc) +REPORT_DEPENDENCIES := $(PA_RT_O) $(PA_SO) $(PROGRAMS_TO_TEST:%=Output/%.llvm.bc) $(LLC) From lattner at cs.uiuc.edu Tue Feb 24 15:04:01 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Feb 24 15:04:01 2004 Subject: [llvm-commits] CVS: poolalloc/runtime/FL2Allocator/FreeListAllocator.cpp Message-ID: <200402242103.PAA05155@zion.cs.uiuc.edu> Changes in directory poolalloc/runtime/FL2Allocator: FreeListAllocator.cpp updated: 1.3 -> 1.4 --- Log message: Add these two lines: + if (LAH->Next) + LAH->Next->Prev = &LAH->Next; Which fix a really nasty memory corruption problem, and makes pcompress2 work! :) --- Diffs of the changes: (+13 -0) Index: poolalloc/runtime/FL2Allocator/FreeListAllocator.cpp diff -u poolalloc/runtime/FL2Allocator/FreeListAllocator.cpp:1.3 poolalloc/runtime/FL2Allocator/FreeListAllocator.cpp:1.4 --- poolalloc/runtime/FL2Allocator/FreeListAllocator.cpp:1.3 Thu Feb 19 23:25:48 2004 +++ poolalloc/runtime/FL2Allocator/FreeListAllocator.cpp Tue Feb 24 15:02:56 2004 @@ -74,6 +74,8 @@ Pool->Slabs = 0; Pool->FreeNodeList = 0; Pool->LargeArrays = 0; + + //printf("init pool 0x%X\n", Pool); } // pooldestroy - Release all memory allocated for a pool @@ -81,6 +83,8 @@ void pooldestroy(PoolTy *Pool) { assert(Pool && "Null pool pointer passed in to pooldestroy!\n"); + //printf("destroy pool 0x%X\n", Pool); + // Free all allocated slabs. PoolSlab *PS = Pool->Slabs; while (PS) { @@ -117,10 +121,12 @@ NextNodes->NormalHeader.Next = FirstNode->NormalHeader.Next; Pool->FreeNodeList = NextNodes; FirstNode->NormalHeader.ObjectSize = NumBytes; + //printf("alloc 0x%X -> 0x%X\n", Pool, &FirstNode->NormalHeader+1); return &FirstNode->NormalHeader+1; } else if (FirstNodeSize > NumBytes) { Pool->FreeNodeList = FirstNode->NormalHeader.Next; // Unlink FirstNode->NormalHeader.ObjectSize = FirstNodeSize; + //printf("alloc 0x%X -> 0x%X\n", Pool, &FirstNode->NormalHeader+1); return &FirstNode->NormalHeader+1; } } @@ -148,10 +154,12 @@ NextNodes->NormalHeader.Next = FNN->NormalHeader.Next; *FN = NextNodes; FNN->NormalHeader.ObjectSize = NumBytes; + //printf("alloc 0x%X -> 0x%X\n", Pool, &FNN->NormalHeader+1); return &FNN->NormalHeader+1; } else { *FN = FNN->NormalHeader.Next; // Unlink FNN->NormalHeader.ObjectSize = FNN->Size; + //printf("alloc 0x%X -> 0x%X\n", Pool, &FNN->NormalHeader+1); return &FNN->NormalHeader+1; } } @@ -167,9 +175,12 @@ LargeArrayHeader *LAH = (LargeArrayHeader*)malloc(sizeof(LargeArrayHeader) + NumBytes); LAH->Next = Pool->LargeArrays; + if (LAH->Next) + LAH->Next->Prev = &LAH->Next; Pool->LargeArrays = LAH; LAH->Prev = &Pool->LargeArrays; LAH->Marker = ~0U; + //printf("alloc large 0x%X -> 0x%X\n", Pool, LAH+1); return LAH+1; } @@ -177,6 +188,8 @@ void poolfree(PoolTy *Pool, void *Node) { assert(Pool && "Null pool pointer passed in to poolfree!\n"); if (Node == 0) return; + + //printf("free 0x%X <- 0x%X\n", Pool, Node); // Check to see how many elements were allocated to this node... FreedNodeHeader *FNH = (FreedNodeHeader*)((char*)Node-sizeof(NodeHeader)); From alkis at cs.uiuc.edu Tue Feb 24 15:16:01 2004 From: alkis at cs.uiuc.edu (Alkis Evlogimenos) Date: Tue Feb 24 15:16:01 2004 Subject: [llvm-commits] CVS: llvm/test/Programs/External/SPEC/Makefile.spec Message-ID: <200402242115.PAA07462@zion.cs.uiuc.edu> Changes in directory llvm/test/Programs/External/SPEC: Makefile.spec updated: 1.23 -> 1.24 --- Log message: Add jit-ls for SPEC tests. --- Diffs of the changes: (+8 -0) Index: llvm/test/Programs/External/SPEC/Makefile.spec diff -u llvm/test/Programs/External/SPEC/Makefile.spec:1.23 llvm/test/Programs/External/SPEC/Makefile.spec:1.24 --- llvm/test/Programs/External/SPEC/Makefile.spec:1.23 Wed Feb 11 13:09:00 2004 +++ llvm/test/Programs/External/SPEC/Makefile.spec Tue Feb 24 15:15:03 2004 @@ -86,6 +86,14 @@ -(cd Output/jit-$(RUN_TYPE); cat $(LOCAL_OUTPUTS)) > $@ -cp Output/jit-$(RUN_TYPE)/$(STDOUT_FILENAME).time $@.time +$(PROGRAMS_TO_TEST:%=Output/%.out-jit-ls): \ +Output/%.out-jit-ls: Output/%.llvm.bc $(LLI) + $(SPEC_SANDBOX) jit-ls-$(RUN_TYPE) $@ $(REF_IN_DIR) \ + $(RUNSAFELY) $(STDIN_FILENAME) $(STDOUT_FILENAME) \ + $(LLI) -regalloc=linearscan $(JIT_OPTS) ../../$< $(RUN_OPTIONS) + -(cd Output/jit-ls-$(RUN_TYPE); cat $(LOCAL_OUTPUTS)) > $@ + -cp Output/jit-ls-$(RUN_TYPE)/$(STDOUT_FILENAME).time $@.time + $(PROGRAMS_TO_TEST:%=Output/%.out-llc): \ Output/%.out-llc: Output/%.llc $(SPEC_SANDBOX) llc-$(RUN_TYPE) $@ $(REF_IN_DIR) \ From alkis at cs.uiuc.edu Tue Feb 24 15:17:01 2004 From: alkis at cs.uiuc.edu (Alkis Evlogimenos) Date: Tue Feb 24 15:17:01 2004 Subject: [llvm-commits] CVS: llvm/test/Programs/External/SPEC/Makefile.spec95 Message-ID: <200402242116.PAA07481@zion.cs.uiuc.edu> Changes in directory llvm/test/Programs/External/SPEC: Makefile.spec95 updated: 1.3 -> 1.4 --- Log message: Add jit-ls for SPEC tests. --- Diffs of the changes: (+8 -0) Index: llvm/test/Programs/External/SPEC/Makefile.spec95 diff -u llvm/test/Programs/External/SPEC/Makefile.spec95:1.3 llvm/test/Programs/External/SPEC/Makefile.spec95:1.4 --- llvm/test/Programs/External/SPEC/Makefile.spec95:1.3 Thu Feb 19 23:53:09 2004 +++ llvm/test/Programs/External/SPEC/Makefile.spec95 Tue Feb 24 15:16:06 2004 @@ -86,6 +86,14 @@ -(cd Output/jit-$(RUN_TYPE); cat $(LOCAL_OUTPUTS)) > $@ -cp Output/jit-$(RUN_TYPE)/$(STDOUT_FILENAME).time $@.time +$(PROGRAMS_TO_TEST:%=Output/%.out-jit-ls): \ +Output/%.out-jit-ls: Output/%.llvm.bc $(LLI) + $(SPEC_SANDBOX) jit-ls-$(RUN_TYPE) $@ $(REF_IN_DIR) \ + $(RUNSAFELY) $(STDIN_FILENAME) $(STDOUT_FILENAME) \ + $(LLI) -regalloc=linearscan $(JIT_OPTS) ../../$< $(RUN_OPTIONS) + -(cd Output/jit-ls-$(RUN_TYPE); cat $(LOCAL_OUTPUTS)) > $@ + -cp Output/jit-ls-$(RUN_TYPE)/$(STDOUT_FILENAME).time $@.time + $(PROGRAMS_TO_TEST:%=Output/%.out-llc): \ Output/%.out-llc: Output/%.llc $(SPEC_SANDBOX) llc-$(RUN_TYPE) $@ $(REF_IN_DIR) \ From criswell at cs.uiuc.edu Tue Feb 24 15:35:01 2004 From: criswell at cs.uiuc.edu (John Criswell) Date: Tue Feb 24 15:35:01 2004 Subject: [llvm-commits] CVS: llvm/test/Programs/TEST.vtl.Makefile Message-ID: <200402242134.PAA31613@choi.cs.uiuc.edu> Changes in directory llvm/test/Programs: TEST.vtl.Makefile added (r1.1) --- Log message: Initial commit of VTune tests for the LLVM Build system. --- Diffs of the changes: (+46 -0) Index: llvm/test/Programs/TEST.vtl.Makefile diff -c /dev/null llvm/test/Programs/TEST.vtl.Makefile:1.1 *** /dev/null Tue Feb 24 15:34:43 2004 --- llvm/test/Programs/TEST.vtl.Makefile Tue Feb 24 15:34:32 2004 *************** *** 0 **** --- 1,46 ---- + ##===- test/Programs/TEST.example.Makefile -----------------*- Makefile -*-===## + # + # Example to show a custom test. This test just prints the size of the bytecode + # file for each program. + # + ##===----------------------------------------------------------------------===## + + TESTNAME = $* + + VTL := /opt/intel/vtune/bin/vtl + + # + # Events: These will need to be modified for every different CPU that is used + # (i.e. the Pentium 3 on Cypher has a different set of available events than + # the Pentium 4 on Zion). + # + P4_EVENTS := "-ec en='2nd Level Cache Read Misses' en='2nd-Level Cache Read References'" + P3_EVENTS := "-ec en='L2 Cache Request Misses (highly correlated)'" + + EVENTS := $(P3_EVENTS) + + # + # Generate events for LLC + # + #$(PROGRAMS_TO_TEST:%=test.$(TEST).%): \ + #test.$(TEST).%: Output/%.llc + #@echo "=========================================" + #@echo "Running '$(TEST)' test on '$(TESTNAME)' program" + #$(VERB) $(VTL) activity $* -d 50 -c sampling -o $(EVENTS) -app $< + #-$(VERB) $(VTL) run $* + #-$(VERB) $(VTL) view > $@ + #$(VERB) $(VTL) delete $* -f + + # + # Generate events for CBE + # + $(PROGRAMS_TO_TEST:%=test.$(TEST).%): \ + test.$(TEST).%: Output/%.cbe + @echo "=========================================" + @echo "Running '$(TEST)' test on '$(TESTNAME)' program" + $(VERB) $(VTL) activity $* -d 50 -c sampling -o $(EVENTS) -app $< + -$(VERB) $(VTL) run $* + -$(VERB) $(VTL) view > $@ + $(VERB) $(VTL) delete $* -f + + From criswell at cs.uiuc.edu Tue Feb 24 15:44:01 2004 From: criswell at cs.uiuc.edu (John Criswell) Date: Tue Feb 24 15:44:01 2004 Subject: [llvm-commits] CVS: llvm/autoconf/configure.ac Message-ID: <200402242143.PAA31739@choi.cs.uiuc.edu> Changes in directory llvm/autoconf: configure.ac updated: 1.78 -> 1.79 --- Log message: Added the VTune tests. --- Diffs of the changes: (+1 -0) Index: llvm/autoconf/configure.ac diff -u llvm/autoconf/configure.ac:1.78 llvm/autoconf/configure.ac:1.79 --- llvm/autoconf/configure.ac:1.78 Mon Feb 23 16:07:01 2004 +++ llvm/autoconf/configure.ac Tue Feb 24 15:43:38 2004 @@ -52,6 +52,7 @@ AC_CONFIG_MAKEFILE(test/Programs/TEST.typesafe.Makefile) AC_CONFIG_MAKEFILE(test/Programs/TEST.dsgraph.gnuplot) AC_CONFIG_MAKEFILE(test/Programs/TEST.micro.Makefile) +AC_CONFIG_MAKEFILE(test/Programs/TEST.vtl.Makefile) AC_CONFIG_MAKEFILE(test/Programs/External/Makefile) AC_CONFIG_MAKEFILE(test/Programs/External/SPEC/Makefile) AC_CONFIG_MAKEFILE(test/Programs/External/SPEC/Makefile.spec) From criswell at cs.uiuc.edu Tue Feb 24 15:44:31 2004 From: criswell at cs.uiuc.edu (John Criswell) Date: Tue Feb 24 15:44:31 2004 Subject: [llvm-commits] CVS: llvm/configure Message-ID: <200402242143.PAA31730@choi.cs.uiuc.edu> Changes in directory llvm: configure updated: 1.80 -> 1.81 --- Log message: Added the VTune tests. --- Diffs of the changes: (+34 -28) Index: llvm/configure diff -u llvm/configure:1.80 llvm/configure:1.81 --- llvm/configure:1.80 Mon Feb 23 16:07:00 2004 +++ llvm/configure Tue Feb 24 15:43:36 2004 @@ -1607,6 +1607,9 @@ ac_config_commands="$ac_config_commands test/Programs/TEST.micro.Makefile" + ac_config_commands="$ac_config_commands test/Programs/TEST.vtl.Makefile" + + ac_config_commands="$ac_config_commands test/Programs/External/Makefile" @@ -4041,7 +4044,7 @@ ;; *-*-irix6*) # Find out which ABI we are using. - echo '#line 4044 "configure"' > conftest.$ac_ext + echo '#line 4047 "configure"' > conftest.$ac_ext if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 (eval $ac_compile) 2>&5 ac_status=$? @@ -4882,7 +4885,7 @@ # Provide some information about the compiler. -echo "$as_me:4885:" \ +echo "$as_me:4888:" \ "checking for Fortran 77 compiler version" >&5 ac_compiler=`set X $ac_compile; echo $2` { (eval echo "$as_me:$LINENO: \"$ac_compiler --version &5\"") >&5 @@ -5887,11 +5890,11 @@ -e 's:.*FLAGS}? :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:5890: $lt_compile\"" >&5) + (eval echo "\"\$as_me:5893: $lt_compile\"" >&5) (eval "$lt_compile" 2>conftest.err) ac_status=$? cat conftest.err >&5 - echo "$as_me:5894: \$? = $ac_status" >&5 + echo "$as_me:5897: \$? = $ac_status" >&5 if (exit $ac_status) && test -s "$ac_outfile"; then # The compiler can only warn and ignore the option if not recognized # So say no if there are warnings @@ -6119,11 +6122,11 @@ -e 's:.*FLAGS}? :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:6122: $lt_compile\"" >&5) + (eval echo "\"\$as_me:6125: $lt_compile\"" >&5) (eval "$lt_compile" 2>conftest.err) ac_status=$? cat conftest.err >&5 - echo "$as_me:6126: \$? = $ac_status" >&5 + echo "$as_me:6129: \$? = $ac_status" >&5 if (exit $ac_status) && test -s "$ac_outfile"; then # The compiler can only warn and ignore the option if not recognized # So say no if there are warnings @@ -6186,11 +6189,11 @@ -e 's:.*FLAGS}? :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:6189: $lt_compile\"" >&5) + (eval echo "\"\$as_me:6192: $lt_compile\"" >&5) (eval "$lt_compile" 2>out/conftest.err) ac_status=$? cat out/conftest.err >&5 - echo "$as_me:6193: \$? = $ac_status" >&5 + echo "$as_me:6196: \$? = $ac_status" >&5 if (exit $ac_status) && test -s out/conftest2.$ac_objext then # The compiler can only warn and ignore the option if not recognized @@ -8198,7 +8201,7 @@ lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 lt_status=$lt_dlunknown cat > conftest.$ac_ext < conftest.$ac_ext <&5) + (eval echo "\"\$as_me:10434: $lt_compile\"" >&5) (eval "$lt_compile" 2>conftest.err) ac_status=$? cat conftest.err >&5 - echo "$as_me:10435: \$? = $ac_status" >&5 + echo "$as_me:10438: \$? = $ac_status" >&5 if (exit $ac_status) && test -s "$ac_outfile"; then # The compiler can only warn and ignore the option if not recognized # So say no if there are warnings @@ -10495,11 +10498,11 @@ -e 's:.*FLAGS}? :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:10498: $lt_compile\"" >&5) + (eval echo "\"\$as_me:10501: $lt_compile\"" >&5) (eval "$lt_compile" 2>out/conftest.err) ac_status=$? cat out/conftest.err >&5 - echo "$as_me:10502: \$? = $ac_status" >&5 + echo "$as_me:10505: \$? = $ac_status" >&5 if (exit $ac_status) && test -s out/conftest2.$ac_objext then # The compiler can only warn and ignore the option if not recognized @@ -11738,7 +11741,7 @@ lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 lt_status=$lt_dlunknown cat > conftest.$ac_ext < conftest.$ac_ext <&5) + (eval echo "\"\$as_me:12664: $lt_compile\"" >&5) (eval "$lt_compile" 2>conftest.err) ac_status=$? cat conftest.err >&5 - echo "$as_me:12665: \$? = $ac_status" >&5 + echo "$as_me:12668: \$? = $ac_status" >&5 if (exit $ac_status) && test -s "$ac_outfile"; then # The compiler can only warn and ignore the option if not recognized # So say no if there are warnings @@ -12725,11 +12728,11 @@ -e 's:.*FLAGS}? :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:12728: $lt_compile\"" >&5) + (eval echo "\"\$as_me:12731: $lt_compile\"" >&5) (eval "$lt_compile" 2>out/conftest.err) ac_status=$? cat out/conftest.err >&5 - echo "$as_me:12732: \$? = $ac_status" >&5 + echo "$as_me:12735: \$? = $ac_status" >&5 if (exit $ac_status) && test -s out/conftest2.$ac_objext then # The compiler can only warn and ignore the option if not recognized @@ -14665,11 +14668,11 @@ -e 's:.*FLAGS}? :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:14668: $lt_compile\"" >&5) + (eval echo "\"\$as_me:14671: $lt_compile\"" >&5) (eval "$lt_compile" 2>conftest.err) ac_status=$? cat conftest.err >&5 - echo "$as_me:14672: \$? = $ac_status" >&5 + echo "$as_me:14675: \$? = $ac_status" >&5 if (exit $ac_status) && test -s "$ac_outfile"; then # The compiler can only warn and ignore the option if not recognized # So say no if there are warnings @@ -14897,11 +14900,11 @@ -e 's:.*FLAGS}? :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:14900: $lt_compile\"" >&5) + (eval echo "\"\$as_me:14903: $lt_compile\"" >&5) (eval "$lt_compile" 2>conftest.err) ac_status=$? cat conftest.err >&5 - echo "$as_me:14904: \$? = $ac_status" >&5 + echo "$as_me:14907: \$? = $ac_status" >&5 if (exit $ac_status) && test -s "$ac_outfile"; then # The compiler can only warn and ignore the option if not recognized # So say no if there are warnings @@ -14964,11 +14967,11 @@ -e 's:.*FLAGS}? :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:14967: $lt_compile\"" >&5) + (eval echo "\"\$as_me:14970: $lt_compile\"" >&5) (eval "$lt_compile" 2>out/conftest.err) ac_status=$? cat out/conftest.err >&5 - echo "$as_me:14971: \$? = $ac_status" >&5 + echo "$as_me:14974: \$? = $ac_status" >&5 if (exit $ac_status) && test -s out/conftest2.$ac_objext then # The compiler can only warn and ignore the option if not recognized @@ -16976,7 +16979,7 @@ lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 lt_status=$lt_dlunknown cat > conftest.$ac_ext < conftest.$ac_ext < Changes in directory llvm/lib/Analysis/DataStructure: Local.cpp updated: 1.86 -> 1.87 --- Log message: Add support for remove, fwrite, and fread Also fix problem where we didn't check to see if a node pointer was null. Though fclose(null) doesn't make a lot of sense, 300.twolf does it. --- Diffs of the changes: (+53 -22) Index: llvm/lib/Analysis/DataStructure/Local.cpp diff -u llvm/lib/Analysis/DataStructure/Local.cpp:1.86 llvm/lib/Analysis/DataStructure/Local.cpp:1.87 --- llvm/lib/Analysis/DataStructure/Local.cpp:1.86 Fri Feb 20 17:27:09 2004 +++ llvm/lib/Analysis/DataStructure/Local.cpp Tue Feb 24 16:02:48 2004 @@ -483,7 +483,8 @@ if (DSNode *N = RetNH.getNode()) N->setHeapNodeMarker()->setModifiedMarker()->setReadMarker(); return; - } else if (F->getName() == "atoi" || F->getName() == "atof") { + } else if (F->getName() == "atoi" || F->getName() == "atof" || + F->getName() == "remove") { // atoi reads its argument. if (DSNode *N = getValueDest(**CS.arg_begin()).getNode()) N->setReadMarker(); @@ -500,21 +501,30 @@ // fopen allocates in an unknown way and writes to the file // descriptor. Also, merge the allocated type into the node. DSNodeHandle Result = getValueDest(*CS.getInstruction()); - Result.getNode()->setModifiedMarker()->setUnknownNodeMarker(); - const Type *RetTy = F->getFunctionType()->getReturnType(); - if (const PointerType *PTy = dyn_cast(RetTy)) - Result.getNode()->mergeTypeInfo(PTy->getElementType(), - Result.getOffset()); + if (DSNode *N = Result.getNode()) { + N->setModifiedMarker()->setUnknownNodeMarker(); + const Type *RetTy = F->getFunctionType()->getReturnType(); + if (const PointerType *PTy = dyn_cast(RetTy)) + N->mergeTypeInfo(PTy->getElementType(), Result.getOffset()); + } + return; + } else if (F->getName() == "memcmp" && CS.arg_end()-CS.arg_begin() ==3){ + // memcmp reads the memory pointed to by the first two operands. + if (DSNode *N = getValueDest(**CS.arg_begin()).getNode()) + N->setReadMarker(); + if (DSNode *N = getValueDest(**++CS.arg_begin()).getNode()) + N->setReadMarker(); return; } else if (F->getName() == "fclose" && CS.arg_end()-CS.arg_begin() ==1){ // fclose reads and deallocates the memory in an unknown way for the // file descriptor. It merges the FILE type into the descriptor. DSNodeHandle H = getValueDest(**CS.arg_begin()); - H.getNode()->setReadMarker()->setUnknownNodeMarker(); - - const Type *ArgTy = *F->getFunctionType()->param_begin(); - if (const PointerType *PTy = dyn_cast(ArgTy)) - H.getNode()->mergeTypeInfo(PTy->getElementType(), H.getOffset()); + if (DSNode *N = H.getNode()) { + N->setReadMarker()->setUnknownNodeMarker(); + const Type *ArgTy = F->getFunctionType()->getParamType(0); + if (const PointerType *PTy = dyn_cast(ArgTy)) + N->mergeTypeInfo(PTy->getElementType(), H.getOffset()); + } return; } else if (CS.arg_end()-CS.arg_begin() == 1 && (F->getName() == "fflush" || F->getName() == "feof" || @@ -523,11 +533,32 @@ // fflush reads and writes the memory for the file descriptor. It // merges the FILE type into the descriptor. DSNodeHandle H = getValueDest(**CS.arg_begin()); - H.getNode()->setReadMarker()->setModifiedMarker(); + if (DSNode *N = H.getNode()) { + N->setReadMarker()->setModifiedMarker(); - const Type *ArgTy = *F->getFunctionType()->param_begin(); - if (const PointerType *PTy = dyn_cast(ArgTy)) - H.getNode()->mergeTypeInfo(PTy->getElementType(), H.getOffset()); + const Type *ArgTy = F->getFunctionType()->getParamType(0); + if (const PointerType *PTy = dyn_cast(ArgTy)) + N->mergeTypeInfo(PTy->getElementType(), H.getOffset()); + } + return; + } else if (CS.arg_end()-CS.arg_begin() == 4 && + (F->getName() == "fwrite" || F->getName() == "fread")) { + // fread writes the first operand, fwrite reads it. They both + // read/write the FILE descriptor, and merges the FILE type. + DSNodeHandle H = getValueDest(**--CS.arg_end()); + if (DSNode *N = H.getNode()) { + N->setReadMarker()->setModifiedMarker(); + const Type *ArgTy = F->getFunctionType()->getParamType(3); + if (const PointerType *PTy = dyn_cast(ArgTy)) + N->mergeTypeInfo(PTy->getElementType(), H.getOffset()); + } + + H = getValueDest(**CS.arg_begin()); + if (DSNode *N = H.getNode()) + if (F->getName() == "fwrite") + N->setReadMarker(); + else + N->setModifiedMarker(); return; } else if (F->getName() == "fgets" && CS.arg_end()-CS.arg_begin() == 3){ // fgets reads and writes the memory for the file descriptor. It @@ -542,11 +573,12 @@ // Reads and writes file descriptor, merge in FILE type. H = getValueDest(**CS.arg_begin()); - if (DSNode *N = H.getNode()) + if (DSNode *N = H.getNode()) { N->setReadMarker()->setModifiedMarker(); - const Type *ArgTy = *(F->getFunctionType()->param_begin()+2); - if (const PointerType *PTy = dyn_cast(ArgTy)) - H.getNode()->mergeTypeInfo(PTy->getElementType(), H.getOffset()); + const Type *ArgTy = *(F->getFunctionType()->param_begin()+2); + if (const PointerType *PTy = dyn_cast(ArgTy)) + N->mergeTypeInfo(PTy->getElementType(), H.getOffset()); + } return; } else if (F->getName() == "printf" || F->getName() == "fprintf" || F->getName() == "sprintf") { @@ -688,9 +720,8 @@ void GraphBuilder::visitFreeInst(FreeInst &FI) { // Mark that the node is written to... - DSNode *N = getValueDest(*FI.getOperand(0)).getNode(); - N->setModifiedMarker(); - N->setHeapNodeMarker(); + if (DSNode *N = getValueDest(*FI.getOperand(0)).getNode()) + N->setModifiedMarker()->setHeapNodeMarker(); } /// Handle casts... From lattner at cs.uiuc.edu Tue Feb 24 16:07:03 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Feb 24 16:07:03 2004 Subject: [llvm-commits] CVS: llvm/lib/VMCore/Verifier.cpp Message-ID: <200402242206.QAA02284@zion.cs.uiuc.edu> Changes in directory llvm/lib/VMCore: Verifier.cpp updated: 1.81 -> 1.82 --- Log message: Make the verifier a little more explicit about this problem. --- Diffs of the changes: (+2 -2) Index: llvm/lib/VMCore/Verifier.cpp diff -u llvm/lib/VMCore/Verifier.cpp:1.81 llvm/lib/VMCore/Verifier.cpp:1.82 --- llvm/lib/VMCore/Verifier.cpp:1.81 Fri Feb 13 20:47:17 2004 +++ llvm/lib/VMCore/Verifier.cpp Tue Feb 24 16:06:07 2004 @@ -386,9 +386,9 @@ // Verify that all arguments to the call match the function type... for (unsigned i = 0, e = FTy->getNumParams(); i != e; ++i) - Assert2(CI.getOperand(i+1)->getType() == FTy->getParamType(i), + Assert3(CI.getOperand(i+1)->getType() == FTy->getParamType(i), "Call parameter type does not match function signature!", - CI.getOperand(i+1), FTy->getParamType(i)); + CI.getOperand(i+1), FTy->getParamType(i), &CI); if (Function *F = CI.getCalledFunction()) if (Intrinsic::ID ID = (Intrinsic::ID)F->getIntrinsicID()) From lattner at cs.uiuc.edu Tue Feb 24 16:10:01 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Feb 24 16:10:01 2004 Subject: [llvm-commits] CVS: poolalloc/lib/PoolAllocate/TransformFunctionBody.cpp Message-ID: <200402242209.QAA12804@zion.cs.uiuc.edu> Changes in directory poolalloc/lib/PoolAllocate: TransformFunctionBody.cpp updated: 1.19 -> 1.20 --- Log message: Fix a problem where we were passing an int parameter where poolalloc expected a uint --- Diffs of the changes: (+3 -0) Index: poolalloc/lib/PoolAllocate/TransformFunctionBody.cpp diff -u poolalloc/lib/PoolAllocate/TransformFunctionBody.cpp:1.19 poolalloc/lib/PoolAllocate/TransformFunctionBody.cpp:1.20 --- poolalloc/lib/PoolAllocate/TransformFunctionBody.cpp:1.19 Sat Feb 21 22:09:50 2004 +++ poolalloc/lib/PoolAllocate/TransformFunctionBody.cpp Tue Feb 24 16:09:41 2004 @@ -134,6 +134,9 @@ Value *Size) { std::string Name = I->getName(); I->setName(""); + if (Size->getType() != Type::UIntTy) + Size = new CastInst(Size, Type::UIntTy, Size->getName(), I); + // Insert a call to poolalloc Value *PH = getPoolHandle(I); Instruction *V = new CallInst(PAInfo.PoolAlloc, make_vector(PH, Size, 0), From lattner at cs.uiuc.edu Tue Feb 24 16:18:01 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Feb 24 16:18:01 2004 Subject: [llvm-commits] CVS: llvm/lib/Analysis/DataStructure/Local.cpp Message-ID: <200402242217.QAA16801@zion.cs.uiuc.edu> Changes in directory llvm/lib/Analysis/DataStructure: Local.cpp updated: 1.87 -> 1.88 --- Log message: Add support for 'rename' --- Diffs of the changes: (+9 -4) Index: llvm/lib/Analysis/DataStructure/Local.cpp diff -u llvm/lib/Analysis/DataStructure/Local.cpp:1.87 llvm/lib/Analysis/DataStructure/Local.cpp:1.88 --- llvm/lib/Analysis/DataStructure/Local.cpp:1.87 Tue Feb 24 16:02:48 2004 +++ llvm/lib/Analysis/DataStructure/Local.cpp Tue Feb 24 16:17:00 2004 @@ -484,10 +484,15 @@ N->setHeapNodeMarker()->setModifiedMarker()->setReadMarker(); return; } else if (F->getName() == "atoi" || F->getName() == "atof" || - F->getName() == "remove") { - // atoi reads its argument. - if (DSNode *N = getValueDest(**CS.arg_begin()).getNode()) - N->setReadMarker(); + F->getName() == "remove" || F->getName() == "unlink" || + F->getName() == "rename") { + // These functions read all of their pointer operands. + for (CallSite::arg_iterator AI = CS.arg_begin(), E = CS.arg_end(); + AI != E; ++AI) { + if (isPointerType((*AI)->getType())) + if (DSNode *N = getValueDest(**AI).getNode()) + N->setReadMarker(); + } return; } else if (F->getName() == "fopen" && CS.arg_end()-CS.arg_begin() == 2){ From gaeke at cs.uiuc.edu Tue Feb 24 16:59:01 2004 From: gaeke at cs.uiuc.edu (Brian Gaeke) Date: Tue Feb 24 16:59:01 2004 Subject: [llvm-commits] CVS: llvm/autoconf/AutoRegen.sh Message-ID: <200402242258.QAA17349@zion.cs.uiuc.edu> Changes in directory llvm/autoconf: AutoRegen.sh updated: 1.1 -> 1.2 --- Log message: small portability fix. --- Diffs of the changes: (+2 -1) Index: llvm/autoconf/AutoRegen.sh diff -u llvm/autoconf/AutoRegen.sh:1.1 llvm/autoconf/AutoRegen.sh:1.2 --- llvm/autoconf/AutoRegen.sh:1.1 Sun Feb 8 01:44:48 2004 +++ llvm/autoconf/AutoRegen.sh Tue Feb 24 16:58:31 2004 @@ -7,7 +7,8 @@ [ -f configure.ac ] || die "Can't find 'autoconf' dir; please cd into it first" echo "Regenerating aclocal.m4 with aclocal" aclocal || die "aclocal failed" -if ! autoconf --version | egrep '2\.5[0-9]' > /dev/null +autoconf --version | egrep '2\.5[0-9]' > /dev/null +if test $? -ne 0 then die "Your autoconf was not detected as being 2.5x" fi From gaeke at cs.uiuc.edu Tue Feb 24 19:54:01 2004 From: gaeke at cs.uiuc.edu (Brian Gaeke) Date: Tue Feb 24 19:54:01 2004 Subject: [llvm-commits] CVS: llvm/include/Support/MathExtras.h Message-ID: <200402250153.TAA21223@zion.cs.uiuc.edu> Changes in directory llvm/include/Support: MathExtras.h updated: 1.10 -> 1.11 --- Log message: Cygwin defines log2 as a macro. Undef it here IFF it has already been defined, so that we always get the inline function instead. Remember, kids, like it says in the GCC manual, "An Inline Function is As Fast As a Macro." --- Diffs of the changes: (+4 -0) Index: llvm/include/Support/MathExtras.h diff -u llvm/include/Support/MathExtras.h:1.10 llvm/include/Support/MathExtras.h:1.11 --- llvm/include/Support/MathExtras.h:1.10 Sun Nov 16 14:21:13 2003 +++ llvm/include/Support/MathExtras.h Tue Feb 24 19:53:45 2004 @@ -18,6 +18,10 @@ namespace llvm { +#if defined(log2) +# undef log2 +#endif + inline unsigned log2(uint64_t C) { unsigned getPow; for (getPow = 0; C > 1; ++getPow) From lattner at cs.uiuc.edu Tue Feb 24 20:58:01 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Feb 24 20:58:01 2004 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/InstSelectSimple.cpp Message-ID: <200402250257.UAA31218@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: InstSelectSimple.cpp updated: 1.174 -> 1.175 --- Log message: Implement special case for storing an immediate into memory so that we don't need an intermediate register. --- Diffs of the changes: (+29 -13) Index: llvm/lib/Target/X86/InstSelectSimple.cpp diff -u llvm/lib/Target/X86/InstSelectSimple.cpp:1.174 llvm/lib/Target/X86/InstSelectSimple.cpp:1.175 --- llvm/lib/Target/X86/InstSelectSimple.cpp:1.174 Mon Feb 23 12:14:47 2004 +++ llvm/lib/Target/X86/InstSelectSimple.cpp Tue Feb 24 20:56:58 2004 @@ -1907,24 +1907,40 @@ /// instruction. /// void ISel::visitStoreInst(StoreInst &I) { - unsigned ValReg = getReg(I.getOperand(0)); unsigned AddressReg = getReg(I.getOperand(1)); - const Type *ValTy = I.getOperand(0)->getType(); unsigned Class = getClassB(ValTy); - if (Class == cLong) { - addDirectMem(BuildMI(BB, X86::MOVmr32, 1+4), AddressReg).addReg(ValReg); - addRegOffset(BuildMI(BB, X86::MOVmr32, 1+4), AddressReg,4).addReg(ValReg+1); - return; + if (ConstantInt *CI = dyn_cast(I.getOperand(0))) { + uint64_t Val = CI->getRawValue(); + if (Class == cLong) { + addDirectMem(BuildMI(BB, X86::MOVmi32, 5), AddressReg).addZImm(Val & ~0U); + addRegOffset(BuildMI(BB, X86::MOVmi32, 5), AddressReg,4).addZImm(Val>>32); + } else { + static const unsigned Opcodes[] = { + X86::MOVmi8, X86::MOVmi16, X86::MOVmi32 + }; + unsigned Opcode = Opcodes[Class]; + addDirectMem(BuildMI(BB, Opcode, 5), AddressReg).addZImm(Val); + } + } else if (ConstantBool *CB = dyn_cast(I.getOperand(0))) { + addDirectMem(BuildMI(BB, X86::MOVmi8, 5), + AddressReg).addZImm(CB->getValue()); + } else { + if (Class == cLong) { + unsigned ValReg = getReg(I.getOperand(0)); + addDirectMem(BuildMI(BB, X86::MOVmr32, 5), AddressReg).addReg(ValReg); + addRegOffset(BuildMI(BB, X86::MOVmr32, 5), AddressReg,4).addReg(ValReg+1); + } else { + unsigned ValReg = getReg(I.getOperand(0)); + static const unsigned Opcodes[] = { + X86::MOVmr8, X86::MOVmr16, X86::MOVmr32, X86::FSTr32 + }; + unsigned Opcode = Opcodes[Class]; + if (ValTy == Type::DoubleTy) Opcode = X86::FSTr64; + addDirectMem(BuildMI(BB, Opcode, 1+4), AddressReg).addReg(ValReg); + } } - - static const unsigned Opcodes[] = { - X86::MOVmr8, X86::MOVmr16, X86::MOVmr32, X86::FSTr32 - }; - unsigned Opcode = Opcodes[Class]; - if (ValTy == Type::DoubleTy) Opcode = X86::FSTr64; - addDirectMem(BuildMI(BB, Opcode, 1+4), AddressReg).addReg(ValReg); } From lattner at cs.uiuc.edu Tue Feb 24 21:47:01 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue Feb 24 21:47:01 2004 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/InstSelectSimple.cpp Message-ID: <200402250346.VAA00623@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: InstSelectSimple.cpp updated: 1.175 -> 1.176 --- Log message: add an inefficient way of folding structure and constant array indexes together into a single LEA instruction. This should improve the code generated for things like X->A.B.C[12].D. The bigger benefit is still coming though. Note that this uses an LEA instruction instead of an add, giving the register allocator more freedom. We should probably never generate ADDri32's. --- Diffs of the changes: (+90 -22) Index: llvm/lib/Target/X86/InstSelectSimple.cpp diff -u llvm/lib/Target/X86/InstSelectSimple.cpp:1.175 llvm/lib/Target/X86/InstSelectSimple.cpp:1.176 --- llvm/lib/Target/X86/InstSelectSimple.cpp:1.175 Tue Feb 24 20:56:58 2004 +++ llvm/lib/Target/X86/InstSelectSimple.cpp Tue Feb 24 21:45:50 2004 @@ -2308,6 +2308,76 @@ I.op_begin()+1, I.op_end(), outputReg); } +/// getGEPIndex - Inspect the getelementptr operands specified with GEPOps and +/// GEPTypes (the derived types being stepped through at each level). On return +/// from this function, if some indexes of the instruction are representable as +/// an X86 lea instruction, the machine operands are put into the Ops +/// instruction and the consumed indexes are poped from the GEPOps/GEPTypes +/// lists. Otherwise, GEPOps.size() is returned. If this returns a an +/// addressing mode that only partially consumes the input, the BaseReg input of +/// the addressing mode must be left free. +/// +/// Note that there is one fewer entry in GEPTypes than there is in GEPOps. +/// +static void getGEPIndex(std::vector &GEPOps, + std::vector &GEPTypes, + MachineInstr *Ops, const TargetData &TD){ + // Clear out the state we are working with... + Ops->getOperand(0).setReg(0); // No base register + Ops->getOperand(1).setImmedValue(1); // Unit scale + Ops->getOperand(2).setReg(0); // No index register + Ops->getOperand(3).setImmedValue(0); // No displacement + + // While there are GEP indexes that can be folded into the current address, + // keep processing them. + while (!GEPTypes.empty()) { + if (const StructType *StTy = dyn_cast(GEPTypes.back())) { + // It's a struct access. CUI is the index into the structure, + // which names the field. This index must have unsigned type. + const ConstantUInt *CUI = cast(GEPOps.back()); + + // Use the TargetData structure to pick out what the layout of the + // structure is in memory. Since the structure index must be constant, we + // can get its value and use it to find the right byte offset from the + // StructLayout class's list of structure member offsets. + unsigned idxValue = CUI->getValue(); + unsigned FieldOff = TD.getStructLayout(StTy)->MemberOffsets[idxValue]; + if (FieldOff) { + if (Ops->getOperand(2).getReg()) + return; // Already has an index, can't add offset. + Ops->getOperand(3).setImmedValue(FieldOff+ + Ops->getOperand(3).getImmedValue()); + } + GEPOps.pop_back(); // Consume a GEP operand + GEPTypes.pop_back(); + } else { + // It's an array or pointer access: [ArraySize x ElementType]. + const SequentialType *SqTy = cast(GEPTypes.back()); + Value *idx = GEPOps.back(); + + // idx is the index into the array. Unlike with structure + // indices, we may not know its actual value at code-generation + // time. + assert(idx->getType() == Type::LongTy && "Bad GEP array index!"); + + // If idx is a constant, fold it into the offset. + if (ConstantSInt *CSI = dyn_cast(idx)) { + unsigned elementSize = TD.getTypeSize(SqTy->getElementType()); + unsigned Offset = elementSize*CSI->getValue(); + Ops->getOperand(3).setImmedValue(Offset+ + Ops->getOperand(3).getImmedValue()); + } else { + // If we can't handle it, return. + return; + } + + GEPOps.pop_back(); // Consume a GEP operand + GEPTypes.pop_back(); + } + } +} + + void ISel::emitGEPOperation(MachineBasicBlock *MBB, MachineBasicBlock::iterator IP, Value *Src, User::op_iterator IdxBegin, @@ -2326,11 +2396,28 @@ GEPTypes.assign(gep_type_begin(Src->getType(), IdxBegin, IdxEnd), gep_type_end(Src->getType(), IdxBegin, IdxEnd)); + // DummyMI - A dummy instruction to pass into getGEPIndex. The opcode doesn't + // matter, we just need 4 MachineOperands. + MachineInstr *DummyMI = + BuildMI(X86::PHI, 4).addReg(0).addZImm(1).addReg(0).addSImm(0); + // Keep emitting instructions until we consume the entire GEP instruction. while (!GEPOps.empty()) { unsigned OldSize = GEPOps.size(); + getGEPIndex(GEPOps, GEPTypes, DummyMI, TD); - if (GEPTypes.empty()) { + if (GEPOps.size() != OldSize) { + // getGEPIndex consumed some of the input. Build an LEA instruction here. + assert(DummyMI->getOperand(0).getReg() == 0 && + DummyMI->getOperand(1).getImmedValue() == 1 && + DummyMI->getOperand(2).getReg() == 0 && + "Unhandled GEP fold!"); + if (unsigned Offset = DummyMI->getOperand(3).getImmedValue()) { + unsigned Reg = makeAnotherReg(Type::UIntTy); + addRegOffset(BMI(MBB, IP, X86::LEAr32, 5, TargetReg), Reg, Offset); + TargetReg = Reg; + } + } else if (GEPTypes.empty()) { // The getGEPIndex operation didn't want to build an LEA. Check to see if // all operands are consumed but the base pointer. If so, just load it // into the register. @@ -2341,27 +2428,6 @@ BMI(MBB, IP, X86::MOVrr32, 1, TargetReg).addReg(BaseReg); } break; // we are now done - } else if (const StructType *StTy = dyn_cast(GEPTypes.back())) { - // It's a struct access. CUI is the index into the structure, - // which names the field. This index must have unsigned type. - const ConstantUInt *CUI = cast(GEPOps.back()); - GEPOps.pop_back(); // Consume a GEP operand - GEPTypes.pop_back(); - - // Use the TargetData structure to pick out what the layout of the - // structure is in memory. Since the structure index must be constant, we - // can get its value and use it to find the right byte offset from the - // StructLayout class's list of structure member offsets. - unsigned idxValue = CUI->getValue(); - unsigned FieldOff = TD.getStructLayout(StTy)->MemberOffsets[idxValue]; - if (FieldOff) { - unsigned Reg = makeAnotherReg(Type::UIntTy); - // Emit an ADD to add FieldOff to the basePtr. - BMI(MBB, IP, X86::ADDri32, 2, TargetReg).addReg(Reg).addZImm(FieldOff); - --IP; // Insert the next instruction before this one. - TargetReg = Reg; // Codegen the rest of the GEP into this - } - } else { // It's an array or pointer access: [ArraySize x ElementType]. const SequentialType *SqTy = cast(GEPTypes.back()); @@ -2430,6 +2496,8 @@ } } } + + delete DummyMI; } From lattner at cs.uiuc.edu Wed Feb 25 00:02:01 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Wed Feb 25 00:02:01 2004 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86InstrBuilder.h Message-ID: <200402250601.AAA14830@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: X86InstrBuilder.h updated: 1.9 -> 1.10 --- Log message: Add a helper to create an addressing mode given all of the pieces. --- Diffs of the changes: (+8 -0) Index: llvm/lib/Target/X86/X86InstrBuilder.h diff -u llvm/lib/Target/X86/X86InstrBuilder.h:1.9 llvm/lib/Target/X86/X86InstrBuilder.h:1.10 --- llvm/lib/Target/X86/X86InstrBuilder.h:1.9 Tue Nov 11 16:41:33 2003 +++ llvm/lib/Target/X86/X86InstrBuilder.h Wed Feb 25 00:01:07 2004 @@ -49,6 +49,14 @@ return MIB.addReg(Reg).addZImm(1).addReg(0).addSImm(Offset); } +inline const MachineInstrBuilder &addFullAddress(const MachineInstrBuilder &MIB, + unsigned BaseReg, + unsigned Scale, + unsigned IndexReg, + unsigned Disp) { + return MIB.addReg(BaseReg).addZImm(Scale).addReg(IndexReg).addSImm(Disp); +} + /// addFrameReference - This function is used to add a reference to the base of /// an abstract object on the stack frame of the current function. This /// reference has base register as the FrameIndex offset until it is resolved. From lattner at cs.uiuc.edu Wed Feb 25 00:14:03 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Wed Feb 25 00:14:03 2004 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/InstSelectSimple.cpp Message-ID: <200402250613.AAA16013@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: InstSelectSimple.cpp updated: 1.176 -> 1.177 --- Log message: * Make the previous patch more efficient by not allocating a temporary MachineInstr to do analysis. *** FOLD getelementptr instructions into loads and stores when possible, making use of some of the crazy X86 addressing modes. For example, the following C++ program fragment: struct complex { double re, im; complex(double r, double i) : re(r), im(i) {} }; inline complex operator+(const complex& a, const complex& b) { return complex(a.re+b.re, a.im+b.im); } complex addone(const complex& arg) { return arg + complex(1,0); } Used to be compiled to: _Z6addoneRK7complex: mov %EAX, DWORD PTR [%ESP + 4] mov %ECX, DWORD PTR [%ESP + 8] *** mov %EDX, %ECX fld QWORD PTR [%EDX] fld1 faddp %ST(1) *** add %ECX, 8 fld QWORD PTR [%ECX] fldz faddp %ST(1) *** mov %ECX, %EAX fxch %ST(1) fstp QWORD PTR [%ECX] *** add %EAX, 8 fstp QWORD PTR [%EAX] ret Now it is compiled to: _Z6addoneRK7complex: mov %EAX, DWORD PTR [%ESP + 4] mov %ECX, DWORD PTR [%ESP + 8] fld QWORD PTR [%ECX] fld1 faddp %ST(1) fld QWORD PTR [%ECX + 8] fldz faddp %ST(1) fxch %ST(1) fstp QWORD PTR [%EAX] fstp QWORD PTR [%EAX + 8] ret Other programs should see similar improvements, across the board. Note that in addition to reducing instruction count, this also reduces register pressure a lot, always a good thing on X86. :) --- Diffs of the changes: (+184 -56) Index: llvm/lib/Target/X86/InstSelectSimple.cpp diff -u llvm/lib/Target/X86/InstSelectSimple.cpp:1.176 llvm/lib/Target/X86/InstSelectSimple.cpp:1.177 --- llvm/lib/Target/X86/InstSelectSimple.cpp:1.176 Tue Feb 24 21:45:50 2004 +++ llvm/lib/Target/X86/InstSelectSimple.cpp Wed Feb 25 00:13:04 2004 @@ -222,6 +222,20 @@ /// void promote32(unsigned targetReg, const ValueRecord &VR); + // getGEPIndex - This is used to fold GEP instructions into X86 addressing + // expressions. + void getGEPIndex(MachineBasicBlock *MBB, MachineBasicBlock::iterator IP, + std::vector &GEPOps, + std::vector &GEPTypes, unsigned &BaseReg, + unsigned &Scale, unsigned &IndexReg, unsigned &Disp); + + /// isGEPFoldable - Return true if the specified GEP can be completely + /// folded into the addressing mode of a load/store or lea instruction. + bool isGEPFoldable(MachineBasicBlock *MBB, + Value *Src, User::op_iterator IdxBegin, + User::op_iterator IdxEnd, unsigned &BaseReg, + unsigned &Scale, unsigned &IndexReg, unsigned &Disp); + /// emitGEPOperation - Common code shared between visitGetElementPtrInst and /// constant expression GEP support. /// @@ -1884,14 +1898,32 @@ /// need to worry about the memory layout of the target machine. /// void ISel::visitLoadInst(LoadInst &I) { - unsigned SrcAddrReg = getReg(I.getOperand(0)); unsigned DestReg = getReg(I); + unsigned BaseReg = 0, Scale = 1, IndexReg = 0, Disp = 0; + Value *Addr = I.getOperand(0); + if (GetElementPtrInst *GEP = dyn_cast(Addr)) { + if (isGEPFoldable(BB, GEP->getOperand(0), GEP->op_begin()+1, GEP->op_end(), + BaseReg, Scale, IndexReg, Disp)) + Addr = 0; // Address is consumed! + } else if (ConstantExpr *CE = dyn_cast(Addr)) { + if (CE->getOpcode() == Instruction::GetElementPtr) + if (isGEPFoldable(BB, CE->getOperand(0), CE->op_begin()+1, CE->op_end(), + BaseReg, Scale, IndexReg, Disp)) + Addr = 0; + } + + if (Addr) { + // If it's not foldable, reset addr mode. + BaseReg = getReg(Addr); + Scale = 1; IndexReg = 0; Disp = 0; + } unsigned Class = getClassB(I.getType()); - if (Class == cLong) { - addDirectMem(BuildMI(BB, X86::MOVrm32, 4, DestReg), SrcAddrReg); - addRegOffset(BuildMI(BB, X86::MOVrm32, 4, DestReg+1), SrcAddrReg, 4); + addFullAddress(BuildMI(BB, X86::MOVrm32, 4, DestReg), + BaseReg, Scale, IndexReg, Disp); + addFullAddress(BuildMI(BB, X86::MOVrm32, 4, DestReg+1), + BaseReg, Scale, IndexReg, Disp+4); return; } @@ -1900,37 +1932,61 @@ }; unsigned Opcode = Opcodes[Class]; if (I.getType() == Type::DoubleTy) Opcode = X86::FLDr64; - addDirectMem(BuildMI(BB, Opcode, 4, DestReg), SrcAddrReg); + addFullAddress(BuildMI(BB, Opcode, 4, DestReg), + BaseReg, Scale, IndexReg, Disp); } /// visitStoreInst - Implement LLVM store instructions in terms of the x86 'mov' /// instruction. /// void ISel::visitStoreInst(StoreInst &I) { - unsigned AddressReg = getReg(I.getOperand(1)); + unsigned BaseReg = 0, Scale = 1, IndexReg = 0, Disp = 0; + Value *Addr = I.getOperand(1); + if (GetElementPtrInst *GEP = dyn_cast(Addr)) { + if (isGEPFoldable(BB, GEP->getOperand(0), GEP->op_begin()+1, GEP->op_end(), + BaseReg, Scale, IndexReg, Disp)) + Addr = 0; // Address is consumed! + } else if (ConstantExpr *CE = dyn_cast(Addr)) { + if (CE->getOpcode() == Instruction::GetElementPtr) + if (isGEPFoldable(BB, CE->getOperand(0), CE->op_begin()+1, CE->op_end(), + BaseReg, Scale, IndexReg, Disp)) + Addr = 0; + } + + if (Addr) { + // If it's not foldable, reset addr mode. + BaseReg = getReg(Addr); + Scale = 1; IndexReg = 0; Disp = 0; + } + const Type *ValTy = I.getOperand(0)->getType(); unsigned Class = getClassB(ValTy); if (ConstantInt *CI = dyn_cast(I.getOperand(0))) { uint64_t Val = CI->getRawValue(); if (Class == cLong) { - addDirectMem(BuildMI(BB, X86::MOVmi32, 5), AddressReg).addZImm(Val & ~0U); - addRegOffset(BuildMI(BB, X86::MOVmi32, 5), AddressReg,4).addZImm(Val>>32); + addFullAddress(BuildMI(BB, X86::MOVmi32, 5), + BaseReg, Scale, IndexReg, Disp).addZImm(Val & ~0U); + addFullAddress(BuildMI(BB, X86::MOVmi32, 5), + BaseReg, Scale, IndexReg, Disp+4).addZImm(Val>>32); } else { static const unsigned Opcodes[] = { X86::MOVmi8, X86::MOVmi16, X86::MOVmi32 }; unsigned Opcode = Opcodes[Class]; - addDirectMem(BuildMI(BB, Opcode, 5), AddressReg).addZImm(Val); + addFullAddress(BuildMI(BB, Opcode, 5), + BaseReg, Scale, IndexReg, Disp).addZImm(Val); } } else if (ConstantBool *CB = dyn_cast(I.getOperand(0))) { - addDirectMem(BuildMI(BB, X86::MOVmi8, 5), - AddressReg).addZImm(CB->getValue()); + addFullAddress(BuildMI(BB, X86::MOVmi8, 5), + BaseReg, Scale, IndexReg, Disp).addZImm(CB->getValue()); } else { if (Class == cLong) { unsigned ValReg = getReg(I.getOperand(0)); - addDirectMem(BuildMI(BB, X86::MOVmr32, 5), AddressReg).addReg(ValReg); - addRegOffset(BuildMI(BB, X86::MOVmr32, 5), AddressReg,4).addReg(ValReg+1); + addFullAddress(BuildMI(BB, X86::MOVmr32, 5), + BaseReg, Scale, IndexReg, Disp).addReg(ValReg); + addFullAddress(BuildMI(BB, X86::MOVmr32, 5), + BaseReg, Scale, IndexReg, Disp+4).addReg(ValReg+1); } else { unsigned ValReg = getReg(I.getOperand(0)); static const unsigned Opcodes[] = { @@ -1938,7 +1994,8 @@ }; unsigned Opcode = Opcodes[Class]; if (ValTy == Type::DoubleTy) Opcode = X86::FSTr64; - addDirectMem(BuildMI(BB, Opcode, 1+4), AddressReg).addReg(ValReg); + addFullAddress(BuildMI(BB, Opcode, 1+4), + BaseReg, Scale, IndexReg, Disp).addReg(ValReg); } } } @@ -2138,7 +2195,8 @@ } // Spill the integer to memory and reload it from there... - int FrameIdx = F->getFrameInfo()->CreateStackObject(SrcTy, TM.getTargetData()); + int FrameIdx = + F->getFrameInfo()->CreateStackObject(SrcTy, TM.getTargetData()); if (SrcClass == cLong) { addFrameReference(BMI(BB, IP, X86::MOVmr32, 5), FrameIdx).addReg(SrcReg); @@ -2160,15 +2218,18 @@ // Emit a test instruction to see if the dynamic input value was signed. BMI(BB, IP, X86::TESTrr32, 2).addReg(SrcReg+1).addReg(SrcReg+1); - // If the sign bit is set, get a pointer to an offset, otherwise get a pointer to a zero. + // If the sign bit is set, get a pointer to an offset, otherwise get a + // pointer to a zero. MachineConstantPool *CP = F->getConstantPool(); unsigned Zero = makeAnotherReg(Type::IntTy); + Constant *Null = Constant::getNullValue(Type::UIntTy); addConstantPoolReference(BMI(BB, IP, X86::LEAr32, 5, Zero), - CP->getConstantPoolIndex(Constant::getNullValue(Type::UIntTy))); + CP->getConstantPoolIndex(Null)); unsigned Offset = makeAnotherReg(Type::IntTy); + Constant *OffsetCst = ConstantUInt::get(Type::UIntTy, 0x5f800000); + addConstantPoolReference(BMI(BB, IP, X86::LEAr32, 5, Offset), - CP->getConstantPoolIndex(ConstantUInt::get(Type::UIntTy, - 0x5f800000))); + CP->getConstantPoolIndex(OffsetCst)); unsigned Addr = makeAnotherReg(Type::IntTy); BMI(BB, IP, X86::CMOVSrr32, 2, Addr).addReg(Zero).addReg(Offset); @@ -2303,6 +2364,26 @@ void ISel::visitGetElementPtrInst(GetElementPtrInst &I) { + // If this GEP instruction will be folded into all of its users, we don't need + // to explicitly calculate it! + unsigned A, B, C, D; + if (isGEPFoldable(0, I.getOperand(0), I.op_begin()+1, I.op_end(), A,B,C,D)) { + // Check all of the users of the instruction to see if they are loads and + // stores. + bool AllWillFold = true; + for (Value::use_iterator UI = I.use_begin(), E = I.use_end(); UI != E; ++UI) + if (cast(*UI)->getOpcode() != Instruction::Load) + if (cast(*UI)->getOpcode() != Instruction::Store || + cast(*UI)->getOperand(0) == &I) { + AllWillFold = false; + break; + } + + // If the instruction is foldable, and will be folded into all users, don't + // emit it! + if (AllWillFold) return; + } + unsigned outputReg = getReg(I); emitGEPOperation(BB, BB->end(), I.getOperand(0), I.op_begin()+1, I.op_end(), outputReg); @@ -2319,15 +2400,18 @@ /// /// Note that there is one fewer entry in GEPTypes than there is in GEPOps. /// -static void getGEPIndex(std::vector &GEPOps, - std::vector &GEPTypes, - MachineInstr *Ops, const TargetData &TD){ +void ISel::getGEPIndex(MachineBasicBlock *MBB, MachineBasicBlock::iterator IP, + std::vector &GEPOps, + std::vector &GEPTypes, unsigned &BaseReg, + unsigned &Scale, unsigned &IndexReg, unsigned &Disp) { + const TargetData &TD = TM.getTargetData(); + // Clear out the state we are working with... - Ops->getOperand(0).setReg(0); // No base register - Ops->getOperand(1).setImmedValue(1); // Unit scale - Ops->getOperand(2).setReg(0); // No index register - Ops->getOperand(3).setImmedValue(0); // No displacement - + BaseReg = 0; // No base register + Scale = 1; // Unit scale + IndexReg = 0; // No index register + Disp = 0; // No displacement + // While there are GEP indexes that can be folded into the current address, // keep processing them. while (!GEPTypes.empty()) { @@ -2340,14 +2424,7 @@ // structure is in memory. Since the structure index must be constant, we // can get its value and use it to find the right byte offset from the // StructLayout class's list of structure member offsets. - unsigned idxValue = CUI->getValue(); - unsigned FieldOff = TD.getStructLayout(StTy)->MemberOffsets[idxValue]; - if (FieldOff) { - if (Ops->getOperand(2).getReg()) - return; // Already has an index, can't add offset. - Ops->getOperand(3).setImmedValue(FieldOff+ - Ops->getOperand(3).getImmedValue()); - } + Disp += TD.getStructLayout(StTy)->MemberOffsets[CUI->getValue()]; GEPOps.pop_back(); // Consume a GEP operand GEPTypes.pop_back(); } else { @@ -2362,10 +2439,7 @@ // If idx is a constant, fold it into the offset. if (ConstantSInt *CSI = dyn_cast(idx)) { - unsigned elementSize = TD.getTypeSize(SqTy->getElementType()); - unsigned Offset = elementSize*CSI->getValue(); - Ops->getOperand(3).setImmedValue(Offset+ - Ops->getOperand(3).getImmedValue()); + Disp += TD.getTypeSize(SqTy->getElementType())*CSI->getValue(); } else { // If we can't handle it, return. return; @@ -2375,15 +2449,49 @@ GEPTypes.pop_back(); } } + + // GEPTypes is empty, which means we have a single operand left. See if we + // can set it as the base register. + // + // FIXME: When addressing modes are more powerful/correct, we could load + // global addresses directly as 32-bit immediates. + assert(BaseReg == 0); + BaseReg = MBB ? getReg(GEPOps[0], MBB, IP) : 0; + GEPOps.pop_back(); // Consume the last GEP operand } +/// isGEPFoldable - Return true if the specified GEP can be completely +/// folded into the addressing mode of a load/store or lea instruction. +bool ISel::isGEPFoldable(MachineBasicBlock *MBB, + Value *Src, User::op_iterator IdxBegin, + User::op_iterator IdxEnd, unsigned &BaseReg, + unsigned &Scale, unsigned &IndexReg, unsigned &Disp) { + if (ConstantPointerRef *CPR = dyn_cast(Src)) + Src = CPR->getValue(); + + std::vector GEPOps; + GEPOps.resize(IdxEnd-IdxBegin+1); + GEPOps[0] = Src; + std::copy(IdxBegin, IdxEnd, GEPOps.begin()+1); + + std::vector GEPTypes; + GEPTypes.assign(gep_type_begin(Src->getType(), IdxBegin, IdxEnd), + gep_type_end(Src->getType(), IdxBegin, IdxEnd)); + + MachineBasicBlock::iterator IP; + if (MBB) IP = MBB->end(); + getGEPIndex(MBB, IP, GEPOps, GEPTypes, BaseReg, Scale, IndexReg, Disp); + + // We can fold it away iff the getGEPIndex call eliminated all operands. + return GEPOps.empty(); +} + void ISel::emitGEPOperation(MachineBasicBlock *MBB, MachineBasicBlock::iterator IP, Value *Src, User::op_iterator IdxBegin, User::op_iterator IdxEnd, unsigned TargetReg) { const TargetData &TD = TM.getTargetData(); - if (ConstantPointerRef *CPR = dyn_cast(Src)) Src = CPR->getValue(); @@ -2396,27 +2504,28 @@ GEPTypes.assign(gep_type_begin(Src->getType(), IdxBegin, IdxEnd), gep_type_end(Src->getType(), IdxBegin, IdxEnd)); - // DummyMI - A dummy instruction to pass into getGEPIndex. The opcode doesn't - // matter, we just need 4 MachineOperands. - MachineInstr *DummyMI = - BuildMI(X86::PHI, 4).addReg(0).addZImm(1).addReg(0).addSImm(0); - // Keep emitting instructions until we consume the entire GEP instruction. while (!GEPOps.empty()) { unsigned OldSize = GEPOps.size(); - getGEPIndex(GEPOps, GEPTypes, DummyMI, TD); + unsigned BaseReg, Scale, IndexReg, Disp; + getGEPIndex(MBB, IP, GEPOps, GEPTypes, BaseReg, Scale, IndexReg, Disp); if (GEPOps.size() != OldSize) { // getGEPIndex consumed some of the input. Build an LEA instruction here. - assert(DummyMI->getOperand(0).getReg() == 0 && - DummyMI->getOperand(1).getImmedValue() == 1 && - DummyMI->getOperand(2).getReg() == 0 && - "Unhandled GEP fold!"); - if (unsigned Offset = DummyMI->getOperand(3).getImmedValue()) { - unsigned Reg = makeAnotherReg(Type::UIntTy); - addRegOffset(BMI(MBB, IP, X86::LEAr32, 5, TargetReg), Reg, Offset); - TargetReg = Reg; + unsigned NextTarget = 0; + if (!GEPOps.empty()) { + assert(BaseReg == 0 && + "getGEPIndex should have left the base register open for chaining!"); + NextTarget = BaseReg = makeAnotherReg(Type::UIntTy); } + + if (IndexReg == 0 && Disp == 0) + BMI(MBB, IP, X86::MOVrr32, 1, TargetReg).addReg(BaseReg); + else + addFullAddress(BMI(MBB, IP, X86::LEAr32, 5, TargetReg), + BaseReg, Scale, IndexReg, Disp); + --IP; + TargetReg = NextTarget; } else if (GEPTypes.empty()) { // The getGEPIndex operation didn't want to build an LEA. Check to see if // all operands are consumed but the base pointer. If so, just load it @@ -2428,6 +2537,27 @@ BMI(MBB, IP, X86::MOVrr32, 1, TargetReg).addReg(BaseReg); } break; // we are now done + + } else if (const StructType *StTy = dyn_cast(GEPTypes.back())) { + // It's a struct access. CUI is the index into the structure, + // which names the field. This index must have unsigned type. + const ConstantUInt *CUI = cast(GEPOps.back()); + GEPOps.pop_back(); // Consume a GEP operand + GEPTypes.pop_back(); + + // Use the TargetData structure to pick out what the layout of the + // structure is in memory. Since the structure index must be constant, we + // can get its value and use it to find the right byte offset from the + // StructLayout class's list of structure member offsets. + unsigned idxValue = CUI->getValue(); + unsigned FieldOff = TD.getStructLayout(StTy)->MemberOffsets[idxValue]; + if (FieldOff) { + unsigned Reg = makeAnotherReg(Type::UIntTy); + // Emit an ADD to add FieldOff to the basePtr. + BMI(MBB, IP, X86::ADDri32, 2, TargetReg).addReg(Reg).addZImm(FieldOff); + --IP; // Insert the next instruction before this one. + TargetReg = Reg; // Codegen the rest of the GEP into this + } } else { // It's an array or pointer access: [ArraySize x ElementType]. const SequentialType *SqTy = cast(GEPTypes.back()); @@ -2496,8 +2626,6 @@ } } } - - delete DummyMI; } From lattner at cs.uiuc.edu Wed Feb 25 01:02:03 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Wed Feb 25 01:02:03 2004 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/InstSelectSimple.cpp Message-ID: <200402250701.BAA23681@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: InstSelectSimple.cpp updated: 1.177 -> 1.178 --- Log message: Teach the instruction selector how to transform 'array' GEP computations into X86 scaled indexes. This allows us to compile GEP's like this: int* %test([10 x { int, { int } }]* %X, int %Idx) { %Idx = cast int %Idx to long %X = getelementptr [10 x { int, { int } }]* %X, long 0, long %Idx, ubyte 1, ubyte 0 ret int* %X } Into a single address computation: test: mov %EAX, DWORD PTR [%ESP + 4] mov %ECX, DWORD PTR [%ESP + 8] lea %EAX, DWORD PTR [%EAX + 8*%ECX + 4] ret Before it generated: test: mov %EAX, DWORD PTR [%ESP + 4] mov %ECX, DWORD PTR [%ESP + 8] shl %ECX, 3 add %EAX, %ECX lea %EAX, DWORD PTR [%EAX + 4] ret This is useful for things like int/float/double arrays, as the indexing can be folded into the loads&stores, reducing register pressure and decreasing the pressure on the decode unit. With these changes, I expect our performance on 256.bzip2 and gzip to improve a lot. On bzip2 for example, we go from this: 10665 asm-printer - Number of machine instrs printed 40 ra-local - Number of loads/stores folded into instructions 1708 ra-local - Number of loads added 1532 ra-local - Number of stores added 1354 twoaddressinstruction - Number of instructions added 1354 twoaddressinstruction - Number of two-address instructions 2794 x86-peephole - Number of peephole optimization performed to this: 9873 asm-printer - Number of machine instrs printed 41 ra-local - Number of loads/stores folded into instructions 1710 ra-local - Number of loads added 1521 ra-local - Number of stores added 789 twoaddressinstruction - Number of instructions added 789 twoaddressinstruction - Number of two-address instructions 2142 x86-peephole - Number of peephole optimization performed ... and these types of instructions are often in tight loops. Linear scan is also helped, but not as much. It goes from: 8787 asm-printer - Number of machine instrs printed 2389 liveintervals - Number of identity moves eliminated after coalescing 2288 liveintervals - Number of interval joins performed 3522 liveintervals - Number of intervals after coalescing 5810 liveintervals - Number of original intervals 700 spiller - Number of loads added 487 spiller - Number of stores added 303 spiller - Number of register spills 1354 twoaddressinstruction - Number of instructions added 1354 twoaddressinstruction - Number of two-address instructions 363 x86-peephole - Number of peephole optimization performed to: 7982 asm-printer - Number of machine instrs printed 1759 liveintervals - Number of identity moves eliminated after coalescing 1658 liveintervals - Number of interval joins performed 3282 liveintervals - Number of intervals after coalescing 4940 liveintervals - Number of original intervals 635 spiller - Number of loads added 452 spiller - Number of stores added 288 spiller - Number of register spills 789 twoaddressinstruction - Number of instructions added 789 twoaddressinstruction - Number of two-address instructions 258 x86-peephole - Number of peephole optimization performed Though I'm not complaining about the drop in the number of intervals. :) --- Diffs of the changes: (+23 -24) Index: llvm/lib/Target/X86/InstSelectSimple.cpp diff -u llvm/lib/Target/X86/InstSelectSimple.cpp:1.177 llvm/lib/Target/X86/InstSelectSimple.cpp:1.178 --- llvm/lib/Target/X86/InstSelectSimple.cpp:1.177 Wed Feb 25 00:13:04 2004 +++ llvm/lib/Target/X86/InstSelectSimple.cpp Wed Feb 25 01:00:55 2004 @@ -2438,11 +2438,30 @@ assert(idx->getType() == Type::LongTy && "Bad GEP array index!"); // If idx is a constant, fold it into the offset. + unsigned TypeSize = TD.getTypeSize(SqTy->getElementType()); if (ConstantSInt *CSI = dyn_cast(idx)) { - Disp += TD.getTypeSize(SqTy->getElementType())*CSI->getValue(); + Disp += TypeSize*CSI->getValue(); } else { - // If we can't handle it, return. - return; + // If the index reg is already taken, we can't handle this index. + if (IndexReg) return; + + // If this is a size that we can handle, then add the index as + switch (TypeSize) { + case 1: case 2: case 4: case 8: + // These are all acceptable scales on X86. + Scale = TypeSize; + break; + default: + // Otherwise, we can't handle this scale + return; + } + + if (CastInst *CI = dyn_cast(idx)) + if (CI->getOperand(0)->getType() == Type::IntTy || + CI->getOperand(0)->getType() == Type::UIntTy) + idx = CI->getOperand(0); + + IndexReg = MBB ? getReg(idx, MBB, IP) : 1; } GEPOps.pop_back(); // Consume a GEP operand @@ -2456,7 +2475,7 @@ // FIXME: When addressing modes are more powerful/correct, we could load // global addresses directly as 32-bit immediates. assert(BaseReg == 0); - BaseReg = MBB ? getReg(GEPOps[0], MBB, IP) : 0; + BaseReg = MBB ? getReg(GEPOps[0], MBB, IP) : 1; GEPOps.pop_back(); // Consume the last GEP operand } @@ -2538,26 +2557,6 @@ } break; // we are now done - } else if (const StructType *StTy = dyn_cast(GEPTypes.back())) { - // It's a struct access. CUI is the index into the structure, - // which names the field. This index must have unsigned type. - const ConstantUInt *CUI = cast(GEPOps.back()); - GEPOps.pop_back(); // Consume a GEP operand - GEPTypes.pop_back(); - - // Use the TargetData structure to pick out what the layout of the - // structure is in memory. Since the structure index must be constant, we - // can get its value and use it to find the right byte offset from the - // StructLayout class's list of structure member offsets. - unsigned idxValue = CUI->getValue(); - unsigned FieldOff = TD.getStructLayout(StTy)->MemberOffsets[idxValue]; - if (FieldOff) { - unsigned Reg = makeAnotherReg(Type::UIntTy); - // Emit an ADD to add FieldOff to the basePtr. - BMI(MBB, IP, X86::ADDri32, 2, TargetReg).addReg(Reg).addZImm(FieldOff); - --IP; // Insert the next instruction before this one. - TargetReg = Reg; // Codegen the rest of the GEP into this - } } else { // It's an array or pointer access: [ArraySize x ElementType]. const SequentialType *SqTy = cast(GEPTypes.back()); From lattner at cs.uiuc.edu Wed Feb 25 09:16:01 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Wed Feb 25 09:16:01 2004 Subject: [llvm-commits] CVS: llvm/lib/Transforms/Scalar/LowerSwitch.cpp Message-ID: <200402251515.JAA05683@zion.cs.uiuc.edu> Changes in directory llvm/lib/Transforms/Scalar: LowerSwitch.cpp updated: 1.10 -> 1.11 --- Log message: Fix incorrect debug code --- Diffs of the changes: (+2 -1) Index: llvm/lib/Transforms/Scalar/LowerSwitch.cpp diff -u llvm/lib/Transforms/Scalar/LowerSwitch.cpp:1.10 llvm/lib/Transforms/Scalar/LowerSwitch.cpp:1.11 --- llvm/lib/Transforms/Scalar/LowerSwitch.cpp:1.10 Fri Jan 9 00:02:20 2004 +++ llvm/lib/Transforms/Scalar/LowerSwitch.cpp Wed Feb 25 09:15:04 2004 @@ -115,7 +115,8 @@ Case& Pivot = *(Begin + Mid); DEBUG(std::cerr << "Pivot ==> " - << cast(Pivot.first)->getValue() << "\n"); + << (int64_t)cast(Pivot.first)->getRawValue() + << "\n"); BasicBlock* LBranch = switchConvert(LHS.begin(), LHS.end(), Val, OrigBlock, Default); From lattner at cs.uiuc.edu Wed Feb 25 10:38:02 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Wed Feb 25 10:38:02 2004 Subject: [llvm-commits] CVS: llvm/docs/ReleaseNotes.html Message-ID: <200402251637.KAA01611@zion.cs.uiuc.edu> Changes in directory llvm/docs: ReleaseNotes.html updated: 1.133 -> 1.134 --- Log message: Substantial improvements and cleanups for the release notes. We were missing a bunch of stuff! :) --- Diffs of the changes: (+37 -20) Index: llvm/docs/ReleaseNotes.html diff -u llvm/docs/ReleaseNotes.html:1.133 llvm/docs/ReleaseNotes.html:1.134 --- llvm/docs/ReleaseNotes.html:1.133 Mon Feb 23 21:50:24 2004 +++ llvm/docs/ReleaseNotes.html Wed Feb 25 10:36:51 2004 @@ -69,20 +69,28 @@

This is the third public release of the LLVM compiler infrastructure. +

+This is the third public release of the LLVM compiler infrastructure. This +release incorporates several new features (including +exception handling support for the native code generators, the start of a +source-level debugger, and profile guided optimizer components), many speedups and code quality +improvements, documentation improvements, and a small collection of important bug fixes. Overall, this is our highest quality release to +date, and we encourage you to upgrade if you are using LLVM 1.0 or 1.1.

At this time, LLVM is known to correctly compile and run all C +

FIXME: UPDATE: +At this time, LLVM is known to correctly compile and run all C & C++ SPEC CPU2000 benchmarks, the Olden benchmarks, and the Ptrdist benchmarks. It has also been used to compile many other programs. LLVM now also works with a broad variety of C++ programs, though it has still received less testing than the C front-end.

-This release implements the following new features: +This release implements the following new features:

LLVM 1.2 encodes bytecode files for large programs in 10-30% less space.
LLVM can now feed profile information back into optimizers for Profile Guided Optimization, and includes a simple basic block reordering pass.
The LLVM JIT lazily initializes global variables, reducing startup time for programs with lots of globals (like C++ programs).
The build and installation infrastructure in this release is dramatically +improved. There is now an autoconf/AutoRegen.sh script +that you can run to rebuild the configure script and its associated +files as well as beta support for "make install" and RPM package generation.
The "tblgen" tool is now documented.
The LLVM code generator can now fold spill code into instructions on targets +that support it.
LLVM now no longer depends on the boost library.
The X86 backend now generates substantially better native code, and is faster.
The C backend has been turned moved from the "llvm-dis" tool to the "llc" +tool. You can activate it with "llc -march=c foo.bc -o foo.c".

@@ -110,7 +133,7 @@

-In this release, the following Quality of Implementation issues were fixed: +In this release, the following Quality of Implementation issues were fixed:

-LLVM gained several improvements to its build and installation -infrastructure in this release. There is now -a autoconf/AutoRegen.sh script that you can run to rebuild the -configure script and its associated files -(Bug 105) as well as beta support -for "make install" (Bug 208 and -Bug 220) and RPM package generation -(Bug 203). -Additionally, in this release, the following build problems were fixed: +In this release, the following build problems were fixed:

-In this release, the following Code Quality issues were fixed: +In this release, the following Code Quality issues were fixed:

[loopsimplify] Many pointless phi nodes are created
The X86 backend didn't generate fchs to negate floating point numbers
The X86 backend didn't expand memcpy() into the rep movs instruction
[x86] wierd stack/frame pointer manipulation
The X86 backend now generate fchs to negate floating point numbers, +compiles memcpy() into the rep movs instruction, and makes much better +use of powerful addressing modes and instructions.

-In this release, the following bugs in the previous release were fixed: +In this release, the following bugs in the previous release were fixed:

Bugs in the LLVM Core:

[llvmg++] Dynamically initialized constants cannot be marked 'constant'
[llvmgcc] floating-point unary minus is incorrect for +0.0
[llvm-gcc] miscompilation of 'X = Y = Z' with aggregate values
[llvmgcc] Structure copies result in a LOT of code
[llvm-gcc] miscompilation when a function is re-declared as static

@@ -589,7 +606,7 @@ src="http://www.w3.org/Icons/valid-html401" alt="Valid HTML 4.01!" /> The LLVM Compiler Infrastructure
- Last modified: $Date: 2004/02/24 03:50:24 $ + Last modified: $Date: 2004/02/25 16:36:51 $ From criswell at cs.uiuc.edu Wed Feb 25 11:16:01 2004 From: criswell at cs.uiuc.edu (John Criswell) Date: Wed Feb 25 11:16:01 2004 Subject: [llvm-commits] CVS: llvm/utils/llvm-native-gcc Message-ID: <200402251715.LAA16320@choi.cs.uiuc.edu> Changes in directory llvm/utils: llvm-native-gcc updated: 1.1 -> 1.2 --- Log message: Updated to use llc to generate CBE code. --- Diffs of the changes: (+2 -2) Index: llvm/utils/llvm-native-gcc diff -u llvm/utils/llvm-native-gcc:1.1 llvm/utils/llvm-native-gcc:1.2 --- llvm/utils/llvm-native-gcc:1.1 Tue Dec 9 16:23:24 2003 +++ llvm/utils/llvm-native-gcc Wed Feb 25 11:15:02 2004 @@ -114,7 +114,7 @@ } else { $GeneratedCode = "/tmp/nativebuild-$$.c"; } - run "llvm-dis -c -f -o $GeneratedCode $BCFile"; + run "llc -march=c -f -o $GeneratedCode $BCFile"; } elsif ($Backend eq 'llc') { if ($SaveTemps) { $GeneratedCode = "${OutputFile}.s"; @@ -145,7 +145,7 @@ my $GeneratedCode; if ($Backend eq 'cbe') { $GeneratedCode = "${OutputFile}.cbe.c"; - run "llvm-dis -c -f -o $GeneratedCode $BCFile"; + run "llc -march=c -f -o $GeneratedCode $BCFile"; } elsif ($Backend eq 'llc') { $GeneratedCode = "${OutputFile}.llc.s"; run "llc -f -o $GeneratedCode $BCFile"; From lattner at cs.uiuc.edu Wed Feb 25 11:44:01 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Wed Feb 25 11:44:01 2004 Subject: [llvm-commits] CVS: llvm/lib/Analysis/DataStructure/Local.cpp Message-ID: <200402251743.LAA27179@zion.cs.uiuc.edu> Changes in directory llvm/lib/Analysis/DataStructure: Local.cpp updated: 1.88 -> 1.89 --- Log message: Add a bunch more functions used by perlbmk --- Diffs of the changes: (+50 -14) Index: llvm/lib/Analysis/DataStructure/Local.cpp diff -u llvm/lib/Analysis/DataStructure/Local.cpp:1.88 llvm/lib/Analysis/DataStructure/Local.cpp:1.89 --- llvm/lib/Analysis/DataStructure/Local.cpp:1.88 Tue Feb 24 16:17:00 2004 +++ llvm/lib/Analysis/DataStructure/Local.cpp Wed Feb 25 11:43:20 2004 @@ -484,8 +484,13 @@ N->setHeapNodeMarker()->setModifiedMarker()->setReadMarker(); return; } else if (F->getName() == "atoi" || F->getName() == "atof" || + F->getName() == "atol" || F->getName() == "atoll" || F->getName() == "remove" || F->getName() == "unlink" || - F->getName() == "rename") { + F->getName() == "rename" || F->getName() == "memcmp" || + F->getName() == "strcmp" || F->getName() == "strncmp" || + F->getName() == "execl" || F->getName() == "execlp" || + F->getName() == "execle" || F->getName() == "execv" || + F->getName() == "execvp" || F->getName() == "chmod") { // These functions read all of their pointer operands. for (CallSite::arg_iterator AI = CS.arg_begin(), E = CS.arg_end(); AI != E; ++AI) { @@ -494,13 +499,35 @@ N->setReadMarker(); } return; + } else if (F->getName() == "stat" || F->getName() == "fstat" || + F->getName() == "lstat") { + // These functions read their first operand if its a pointer. + CallSite::arg_iterator AI = CS.arg_begin(); + if (isPointerType((*AI)->getType())) { + DSNodeHandle Path = getValueDest(**AI); + if (DSNode *N = Path.getNode()) N->setReadMarker(); + } + + // Then they write into the stat buffer. + DSNodeHandle StatBuf = getValueDest(**++AI); + if (DSNode *N = StatBuf.getNode()) { + N->setModifiedMarker(); + const Type *StatTy = F->getFunctionType()->getParamType(1); + if (const PointerType *PTy = dyn_cast(StatTy)) + N->mergeTypeInfo(PTy->getElementType(), StatBuf.getOffset()); + } - } else if (F->getName() == "fopen" && CS.arg_end()-CS.arg_begin() == 2){ + + return; + } else if (F->getName() == "fopen" || F->getName() == "fdopen") { // fopen reads the mode argument strings. CallSite::arg_iterator AI = CS.arg_begin(); - DSNodeHandle Path = getValueDest(**AI); + if (isPointerType((*AI)->getType())) { + DSNodeHandle Path = getValueDest(**AI); + if (DSNode *N = Path.getNode()) N->setReadMarker(); + } + DSNodeHandle Mode = getValueDest(**++AI); - if (DSNode *N = Path.getNode()) N->setReadMarker(); if (DSNode *N = Mode.getNode()) N->setReadMarker(); // fopen allocates in an unknown way and writes to the file @@ -513,13 +540,6 @@ N->mergeTypeInfo(PTy->getElementType(), Result.getOffset()); } return; - } else if (F->getName() == "memcmp" && CS.arg_end()-CS.arg_begin() ==3){ - // memcmp reads the memory pointed to by the first two operands. - if (DSNode *N = getValueDest(**CS.arg_begin()).getNode()) - N->setReadMarker(); - if (DSNode *N = getValueDest(**++CS.arg_begin()).getNode()) - N->setReadMarker(); - return; } else if (F->getName() == "fclose" && CS.arg_end()-CS.arg_begin() ==1){ // fclose reads and deallocates the memory in an unknown way for the // file descriptor. It merges the FILE type into the descriptor. @@ -577,10 +597,20 @@ ++AI; ++AI; // Reads and writes file descriptor, merge in FILE type. - H = getValueDest(**CS.arg_begin()); + H = getValueDest(**AI); + if (DSNode *N = H.getNode()) { + N->setReadMarker()->setModifiedMarker(); + const Type *ArgTy = F->getFunctionType()->getParamType(2); + if (const PointerType *PTy = dyn_cast(ArgTy)) + N->mergeTypeInfo(PTy->getElementType(), H.getOffset()); + } + return; + } else if (F->getName() == "ungetc" &&CS.arg_end()-CS.arg_begin() == 2){ + // ungetc reads and writes the memory for the file descriptor. + DSNodeHandle H = getValueDest(**--CS.arg_end()); if (DSNode *N = H.getNode()) { N->setReadMarker()->setModifiedMarker(); - const Type *ArgTy = *(F->getFunctionType()->param_begin()+2); + const Type *ArgTy = F->getFunctionType()->getParamType(1); if (const PointerType *PTy = dyn_cast(ArgTy)) N->mergeTypeInfo(PTy->getElementType(), H.getOffset()); } @@ -608,7 +638,6 @@ if (const PointerType *PTy = dyn_cast(ArgTy)) N->mergeTypeInfo(PTy->getElementType(), H.getOffset()); } - } for (; AI != E; ++AI) { @@ -671,6 +700,13 @@ if (const PointerType *PTy = dyn_cast(ArgTy)) N->mergeTypeInfo(PTy->getElementType(), H.getOffset()); } + return; + } else if (F->getName() == "strchr" || F->getName() == "strrchr") { + // These read their first argument, and return it. + DSNodeHandle H = getValueDest(**CS.arg_begin()); + if (DSNode *N = H.getNode()) + N->setReadMarker(); + H.mergeWith(getValueDest(*CS.getInstruction())); // Returns buffer return; } else { From gaeke at cs.uiuc.edu Wed Feb 25 12:29:02 2004 From: gaeke at cs.uiuc.edu (Brian Gaeke) Date: Wed Feb 25 12:29:02 2004 Subject: [llvm-commits] CVS: llvm/lib/Target/SparcV9/ Message-ID: <200402251825.MAA15146@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/SparcV9: --- Log message: Directory /home/vadve/shared/PublicCVS/llvm/lib/Target/SparcV9 added to the repository --- Diffs of the changes: (+0 -0) From alkis at cs.uiuc.edu Wed Feb 25 12:39:02 2004 From: alkis at cs.uiuc.edu (Alkis Evlogimenos) Date: Wed Feb 25 12:39:02 2004 Subject: [llvm-commits] CVS: llvm/test/Programs/TEST.nightly.report Message-ID: <200402251838.MAA20410@zion.cs.uiuc.edu> Changes in directory llvm/test/Programs: TEST.nightly.report updated: 1.22 -> 1.23 --- Log message: Update column offsets after jit-ls addition. --- Diffs of the changes: (+6 -6) Index: llvm/test/Programs/TEST.nightly.report diff -u llvm/test/Programs/TEST.nightly.report:1.22 llvm/test/Programs/TEST.nightly.report:1.23 --- llvm/test/Programs/TEST.nightly.report:1.22 Mon Feb 23 10:21:11 2004 +++ llvm/test/Programs/TEST.nightly.report Wed Feb 25 12:38:17 2004 @@ -21,8 +21,8 @@ sub GCCCBERatio { my ($Cols, $Col) = @_; - my $GCC = $Cols->[$Col-5]; - my $CBE = $Cols->[$Col-4]; + my $GCC = $Cols->[$Col-6]; + my $CBE = $Cols->[$Col-5]; if ($GCC ne "*" and $CBE ne "*" and $CBE != "0") { return sprintf("%3.2f", $GCC/$CBE); } else { @@ -32,8 +32,8 @@ sub GCCLLCRatio { my ($Cols, $Col) = @_; - my $GCC = $Cols->[$Col-6]; - my $LLC = $Cols->[$Col-4]; + my $GCC = $Cols->[$Col-7]; + my $LLC = $Cols->[$Col-5]; if ($GCC ne "*" and $LLC ne "*" and $LLC != "0") { return sprintf("%3.2f", $GCC/$LLC); } else { @@ -43,8 +43,8 @@ sub GCCLLC_LSRatio { my ($Cols, $Col) = @_; - my $GCC = $Cols->[$Col-7]; - my $LLC_LS = $Cols->[$Col-4]; + my $GCC = $Cols->[$Col-8]; + my $LLC_LS = $Cols->[$Col-5]; if ($GCC ne "*" and $LLC_LS ne "*" and $LLC_LS != "0") { return sprintf("%3.2f", $GCC/$LLC_LS); } else { From gaeke at cs.uiuc.edu Wed Feb 25 12:45:02 2004 From: gaeke at cs.uiuc.edu (Brian Gaeke) Date: Wed Feb 25 12:45:02 2004 Subject: [llvm-commits] CVS: llvm/lib/Target/SparcV9/EmitBytecodeToAssembly.cpp Makefile MappingInfo.h SparcV9.burg.in SparcV9.td SparcV9AsmPrinter.cpp SparcV9CodeEmitter.cpp SparcV9FrameInfo.cpp SparcV9FrameInfo.h SparcV9InstrInfo.cpp SparcV9InstrInfo.h SparcV9InstrSelection.cpp SparcV9InstrSelectionSupport.h SparcV9Internals.h SparcV9JITInfo.h SparcV9PeepholeOpts.cpp SparcV9PreSelection.cpp SparcV9PrologEpilogInserter.cpp SparcV9RegClassInfo.cpp SparcV9RegClassInfo.h SparcV9RegInfo.cpp SparcV9RegInfo.h SparcV9SchedInfo.cpp SparcV9TargetMachine.cpp SparcV9TargetMachine.h SparcV9_F2.td SparcV9_F3.td SparcV9_F4.td SparcV9_Reg.td Message-ID: <200402251844.MAA32315@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/SparcV9: EmitBytecodeToAssembly.cpp updated: 1.12 -> 1.13 Makefile updated: 1.40 -> 1.41 MappingInfo.h updated: 1.6 -> 1.7 SparcV9.burg.in updated: 1.11 -> 1.12 SparcV9.td updated: 1.29 -> 1.30 SparcV9AsmPrinter.cpp updated: 1.107 -> 1.108 SparcV9CodeEmitter.cpp updated: 1.57 -> 1.58 SparcV9FrameInfo.cpp updated: 1.1 -> 1.2 SparcV9FrameInfo.h updated: 1.1 -> 1.2 SparcV9InstrInfo.cpp updated: 1.59 -> 1.60 SparcV9InstrInfo.h updated: 1.2 -> 1.3 SparcV9InstrSelection.cpp updated: 1.133 -> 1.134 SparcV9InstrSelectionSupport.h updated: 1.13 -> 1.14 SparcV9Internals.h updated: 1.110 -> 1.111 SparcV9JITInfo.h updated: 1.3 -> 1.4 SparcV9PeepholeOpts.cpp updated: 1.21 -> 1.22 SparcV9PreSelection.cpp updated: 1.27 -> 1.28 SparcV9PrologEpilogInserter.cpp updated: 1.35 -> 1.36 SparcV9RegClassInfo.cpp updated: 1.34 -> 1.35 SparcV9RegClassInfo.h updated: 1.23 -> 1.24 SparcV9RegInfo.cpp updated: 1.119 -> 1.120 SparcV9RegInfo.h updated: 1.9 -> 1.10 SparcV9SchedInfo.cpp updated: 1.9 -> 1.10 SparcV9TargetMachine.cpp updated: 1.99 -> 1.100 SparcV9TargetMachine.h updated: 1.4 -> 1.5 SparcV9_F2.td updated: 1.8 -> 1.9 SparcV9_F3.td updated: 1.17 -> 1.18 SparcV9_F4.td updated: 1.10 -> 1.11 SparcV9_Reg.td updated: 1.7 -> 1.8 --- Log message: Great renaming: Sparc --> SparcV9 --- Diffs of the changes: (+370 -370) Index: llvm/lib/Target/SparcV9/EmitBytecodeToAssembly.cpp diff -u llvm/lib/Target/SparcV9/EmitBytecodeToAssembly.cpp:1.12 llvm/lib/Target/SparcV9/EmitBytecodeToAssembly.cpp:1.13 --- llvm/lib/Target/SparcV9/EmitBytecodeToAssembly.cpp:1.12 Wed Nov 12 18:19:02 2003 +++ llvm/lib/Target/SparcV9/EmitBytecodeToAssembly.cpp Wed Feb 25 12:44:15 2004 @@ -1,4 +1,4 @@ -//===-- EmitBytecodeToAssembly.cpp - Emit bytecode to Sparc .s File --------==// +//===-- EmitBytecodeToAssembly.cpp - Emit bytecode to SparcV9 .s File --------==// // // The LLVM Compiler Infrastructure // @@ -13,7 +13,7 @@ // //===----------------------------------------------------------------------===// -#include "SparcInternals.h" +#include "SparcV9Internals.h" #include "llvm/Pass.h" #include "llvm/Bytecode/Writer.h" #include @@ -86,13 +86,13 @@ << "\n"; } - // SparcBytecodeWriter - Write bytecode out to a stream that is sparc'ified - class SparcBytecodeWriter : public Pass { + // SparcV9BytecodeWriter - Write bytecode out to a stream that is sparc'ified + class SparcV9BytecodeWriter : public Pass { std::ostream &Out; public: - SparcBytecodeWriter(std::ostream &out) : Out(out) {} + SparcV9BytecodeWriter(std::ostream &out) : Out(out) {} - const char *getPassName() const { return "Emit Bytecode to Sparc Assembly";} + const char *getPassName() const { return "Emit Bytecode to SparcV9 Assembly";} virtual bool run(Module &M) { // Write an object containing the bytecode to the SPARC assembly stream @@ -113,7 +113,7 @@ } // end anonymous namespace Pass *createBytecodeAsmPrinterPass(std::ostream &Out) { - return new SparcBytecodeWriter(Out); + return new SparcV9BytecodeWriter(Out); } } // End llvm namespace Index: llvm/lib/Target/SparcV9/Makefile diff -u llvm/lib/Target/SparcV9/Makefile:1.40 llvm/lib/Target/SparcV9/Makefile:1.41 --- llvm/lib/Target/SparcV9/Makefile:1.40 Fri Jan 9 12:15:22 2004 +++ llvm/lib/Target/SparcV9/Makefile Wed Feb 25 12:44:15 2004 @@ -1,4 +1,4 @@ -##===- lib/Target/Sparc/Makefile ---------------------------*- Makefile -*-===## +##===- lib/Target/SparcV9/Makefile ---------------------------*- Makefile -*-===## # # The LLVM Compiler Infrastructure # @@ -7,10 +7,10 @@ # ##===----------------------------------------------------------------------===## LEVEL = ../../.. -LIBRARYNAME = sparc +LIBRARYNAME = sparcv9 DIRS = InstrSelection RegAlloc LiveVar -ExtraSource = Sparc.burm.cpp +ExtraSource = SparcV9.burm.cpp include $(LEVEL)/Makefile.common @@ -20,26 +20,26 @@ DEBUG_FLAG = -D_DEBUG endif -Sparc.burg.in1 : $(SourceDir)/Sparc.burg.in +SparcV9.burg.in1 : $(SourceDir)/SparcV9.burg.in $(CXX) -E -I$(LLVM_SRC_ROOT)/include $(DEBUG_FLAG) -x c++ $< | $(SED) '/^#/d' | $(SED) 's/Ydefine/#define/' > $@ -Sparc.burm : Sparc.burg.in1 +SparcV9.burm : SparcV9.burg.in1 $(CXX) -E -I$(LLVM_SRC_ROOT)/include $(DEBUG_FLAG) -x c++ $< | $(SED) '/^#/d' | $(SED) 's/^Xinclude/#include/' | $(SED) 's/^Xdefine/#define/' > $@ -Sparc.burm.cpp: Sparc.burm +SparcV9.burm.cpp: SparcV9.burm @echo "Burging `basename $<`" $(RunBurg) $< -o $@ -$(BUILD_OBJ_DIR)/Debug/Sparc.burm.lo: Sparc.burm.cpp +$(BUILD_OBJ_DIR)/Debug/SparcV9.burm.lo: SparcV9.burm.cpp $(CompileG) $< -o $@ -$(BUILD_OBJ_DIR)/Release/Sparc.burm.lo: Sparc.burm.cpp +$(BUILD_OBJ_DIR)/Release/SparcV9.burm.lo: SparcV9.burm.cpp $(CompileO) $< -o $@ -$(BUILD_OBJ_DIR)/Profile/Sparc.burm.lo: Sparc.burm.cpp +$(BUILD_OBJ_DIR)/Profile/SparcV9.burm.lo: SparcV9.burm.cpp $(CompileP) $< -o $@ -$(BUILD_OBJ_DIR)/Depend/Sparc.burm.d: $(BUILD_OBJ_DIR)/Depend/.dir +$(BUILD_OBJ_DIR)/Depend/SparcV9.burm.d: $(BUILD_OBJ_DIR)/Depend/.dir touch $@ TARGET_NAME := SparcV9 @@ -56,5 +56,5 @@ $(TBLGEN) -I $(SourceDir) $< -gen-emitter -o $@ clean:: - $(RM) -f $(TARGET_NAME)CodeEmitter.inc Sparc.burg.in1 Sparc.burm Sparc.burm.cpp + $(RM) -f $(TARGET_NAME)CodeEmitter.inc SparcV9.burg.in1 SparcV9.burm SparcV9.burm.cpp Index: llvm/lib/Target/SparcV9/MappingInfo.h diff -u llvm/lib/Target/SparcV9/MappingInfo.h:1.6 llvm/lib/Target/SparcV9/MappingInfo.h:1.7 --- llvm/lib/Target/SparcV9/MappingInfo.h:1.6 Tue Nov 11 16:41:33 2003 +++ llvm/lib/Target/SparcV9/MappingInfo.h Wed Feb 25 12:44:15 2004 @@ -1,4 +1,4 @@ -//===- lib/Target/Sparc/MappingInfo.h ---------------------------*- C++ -*-===// +//===- lib/Target/SparcV9/MappingInfo.h ---------------------------*- C++ -*-===// // // The LLVM Compiler Infrastructure // Index: llvm/lib/Target/SparcV9/SparcV9.burg.in diff -u llvm/lib/Target/SparcV9/SparcV9.burg.in:1.11 llvm/lib/Target/SparcV9/SparcV9.burg.in:1.12 --- llvm/lib/Target/SparcV9/SparcV9.burg.in:1.11 Tue Nov 11 16:41:33 2003 +++ llvm/lib/Target/SparcV9/SparcV9.burg.in Wed Feb 25 12:44:15 2004 @@ -46,7 +46,7 @@ %term Or=OrOPCODE %term Xor=XorOPCODE /* Use the next 4 to distinguish bitwise operators from - * logical operators. This is no longer used for Sparc, + * logical operators. This is no longer used for SparcV9, * but may be useful for other target machines. * The last one is the bitwise Not(val) == XOR val, 11..1. * Note that it is also a binary operator, not unary. Index: llvm/lib/Target/SparcV9/SparcV9.td diff -u llvm/lib/Target/SparcV9/SparcV9.td:1.29 llvm/lib/Target/SparcV9/SparcV9.td:1.30 --- llvm/lib/Target/SparcV9/SparcV9.td:1.29 Tue Oct 21 10:17:13 2003 +++ llvm/lib/Target/SparcV9/SparcV9.td Wed Feb 25 12:44:15 2004 @@ -1,4 +1,4 @@ -//===- SparcV9.td - Target Description for Sparc V9 Target ----------------===// +//===- SparcV9.td - Target Description for SparcV9 V9 Target ----------------===// // // The LLVM Compiler Infrastructure // @@ -19,7 +19,7 @@ // Instructions //===----------------------------------------------------------------------===// -class InstV9 : Instruction { // Sparc instruction baseline +class InstV9 : Instruction { // SparcV9 instruction baseline field bits<32> Inst; let Namespace = "V9"; @@ -27,7 +27,7 @@ bits<2> op; let Inst{31-30} = op; // Top two bits are the 'op' field - // Bit attributes specific to Sparc instructions + // Bit attributes specific to SparcV9 instructions bit isPasi = 0; // Does this instruction affect an alternate addr space? bit isDeprecated = 0; // Is this instruction deprecated? bit isPrivileged = 0; // Is this a privileged instruction? @@ -62,7 +62,7 @@ } // Section A.4: Branch on Floating-Point Condition Codes (FBfcc) p140 -// The following deprecated instructions don't seem to play nice on Sparc +// The following deprecated instructions don't seem to play nice on SparcV9 /* let isDeprecated = 1 in { let op2 = 0b110 in { @@ -107,7 +107,7 @@ } // Section A.5: Branch on FP condition codes with prediction - p143 -// Not used in the Sparc backend (directly) +// Not used in the SparcV9 backend (directly) /* let op2 = 0b101 in { def FBPA : F2_3<0b1000, "fba">; // Branch always @@ -176,7 +176,7 @@ } // Section A.7: Branch on integer condition codes with prediction - p148 -// Not used in the Sparc backend +// Not used in the SparcV9 backend /* let op2 = 0b001 in { def BPA : F2_3<0b1000, "bpa">; // Branch always @@ -212,7 +212,7 @@ // Section A.10: Divide (64-bit / 32-bit) - p178 -// Not used in the Sparc backend +// Not used in the SparcV9 backend /* let isDeprecated = 1 in { def UDIVr : F3_1<2, 0b001110, "udiv">; // udiv r, r, r @@ -227,7 +227,7 @@ */ // Section A.11: DONE and RETRY - p181 -// Not used in the Sparc backend +// Not used in the SparcV9 backend /* let isPrivileged = 1 in { def DONE : F3_18<0, "done">; // done @@ -247,7 +247,7 @@ def FCMPS : F3_15<2, 0b110101, 0b001010001, "fcmps">; // fcmps %fcc, r1, r2 def FCMPD : F3_15<2, 0b110101, 0b001010010, "fcmpd">; // fcmpd %fcc, r1, r2 def FCMPQ : F3_15<2, 0b110101, 0b001010011, "fcmpq">; // fcmpq %fcc, r1, r2 -// Currently unused in the Sparc backend +// Currently unused in the SparcV9 backend /* def FCMPES : F3_15<2, 0b110101, 0b001010101, "fcmpes">; // fcmpes %fcc, r1, r2 def FCMPED : F3_15<2, 0b110101, 0b001010110, "fcmped">; // fcmped %fcc, r1, r2 @@ -317,7 +317,7 @@ // Not currently used // Section A.24: Jump and Link - p172 -// Mimicking the Sparc's instr def... +// Mimicking the SparcV9's instr def... def JMPLCALLr : F3_1<2, 0b111000, "jmpl">; // jmpl [rs1+rs2], rd def JMPLCALLi : F3_2<2, 0b111000, "jmpl">; // jmpl [rs1+imm], rd def JMPLRETr : F3_1<2, 0b111000, "jmpl">; // jmpl [rs1+rs2], rd @@ -393,7 +393,7 @@ def XNORcci : F3_2<2, 0b010111, "xnorcc">; // xnorcc rs1, imm, rd // Section A.32: Memory Barrier - p186 -// Not currently used in the Sparc backend +// Not currently used in the SparcV9 backend // Section A.33: Move Floating-Point Register on Condition (FMOVcc) // ======================= Single Floating Point ====================== @@ -622,7 +622,7 @@ def UDIVXi : F3_2<2, 0b001101, "udivx">; // udivx r, i, r // Section A.38: Multiply (32-bit) - p200 -// Not used in the Sparc backend +// Not used in the SparcV9 backend /* let Inst{13} = 0 in { def UMULr : F3_1<2, 0b001010, "umul">; // umul r, r, r @@ -639,7 +639,7 @@ */ // Section A.39: Multiply Step - p202 -// Not currently used in the Sparc backend +// Not currently used in the SparcV9 backend // Section A.40: No operation - p204 // NOP is really a pseudo-instruction (special case of SETHI) @@ -652,13 +652,13 @@ } // Section A.41: Population Count - p205 -// Not currently used in the Sparc backend +// Not currently used in the SparcV9 backend // Section A.42: Prefetch Data - p206 -// Not currently used in the Sparc backend +// Not currently used in the SparcV9 backend // Section A.43: Read Privileged Register - p211 -// Not currently used in the Sparc backend +// Not currently used in the SparcV9 backend // Section A.44: Read State Register // The only instr from this section currently used is RDCCR @@ -679,7 +679,7 @@ def RESTOREi : F3_2<2, 0b111101, "restore">; // restore r, i, r // Section A.47: SAVED and RESTORED - p219 -// Not currently used in Sparc backend +// Not currently used in SparcV9 backend // Section A.48: SETHI - p220 let op2 = 0b100 in { @@ -687,7 +687,7 @@ } // Section A.49: Shift - p221 -// Not currently used in the Sparc backend +// Not currently used in the SparcV9 backend /* uses 5 least significant bits of rs2 let x = 0 in { @@ -720,10 +720,10 @@ def SRAXi6 : F3_13<2, 0b100111, "srax">; // srax r, shcnt64, r // Section A.50: Sofware-Initiated Reset - p223 -// Not currently used in the Sparc backend +// Not currently used in the SparcV9 backend // Section A.51: Store Barrier - p224 -// Not currently used in the Sparc backend +// Not currently used in the SparcV9 backend // Section A.52: Store Floating-point - p225 // Store instructions all want their rd register first @@ -732,7 +732,7 @@ def STDFr : F3_1rd<3, 0b100111, "std">; // std r, [r+r] def STDFi : F3_2rd<3, 0b100111, "std">; // std r, [r+i] -// Not currently used in the Sparc backend +// Not currently used in the SparcV9 backend /* def STQFr : F3_1rd<3, 0b100110, "stq">; // stq r, [r+r] def STQFi : F3_2rd<3, 0b100110, "stq">; // stq r, [r+i] @@ -740,7 +740,7 @@ // FIXME: An encoding needs to be chosen here, because STFSRx expect rd=0, // while STXFSRx expect rd=1, but assembly syntax dictates %fsr as first arg. -// These are being disabled because they aren't used in the Sparc backend. +// These are being disabled because they aren't used in the SparcV9 backend. /* let isDeprecated = 1 in { def STFSRr : F3_1<3, 0b100101, "st">; // st %fsr, [r+r] @@ -751,7 +751,7 @@ def STXFSRi : F3_2<3, 0b100101, "stx">; // stx %fsr, [r+i] // Section A.53: Store Floating-Point into Alternate Space - p227 -// Not currently used in the Sparc backend +// Not currently used in the SparcV9 backend // Section A.54: Store Integer - p229 // Store instructions all want their rd register first @@ -765,7 +765,7 @@ def STXi : F3_2rd<3, 0b001110, "stx">; // stx r, [r+i] // Section A.55: Store Integer into Alternate Space - p231 -// Not currently used in the Sparc backend +// Not currently used in the SparcV9 backend // Section A.56: Subtract - p233 def SUBr : F3_1<2, 0b000100, "sub">; // sub r, r, r Index: llvm/lib/Target/SparcV9/SparcV9AsmPrinter.cpp diff -u llvm/lib/Target/SparcV9/SparcV9AsmPrinter.cpp:1.107 llvm/lib/Target/SparcV9/SparcV9AsmPrinter.cpp:1.108 --- llvm/lib/Target/SparcV9/SparcV9AsmPrinter.cpp:1.107 Sat Feb 14 23:55:07 2004 +++ llvm/lib/Target/SparcV9/SparcV9AsmPrinter.cpp Wed Feb 25 12:44:15 2004 @@ -1,4 +1,4 @@ -//===-- EmitAssembly.cpp - Emit Sparc Specific .s File ---------------------==// +//===-- EmitAssembly.cpp - Emit SparcV9 Specific .s File ---------------------==// // // The LLVM Compiler Infrastructure // @@ -30,7 +30,7 @@ #include "llvm/Support/Mangler.h" #include "Support/StringExtras.h" #include "Support/Statistic.h" -#include "SparcInternals.h" +#include "SparcV9Internals.h" #include using namespace llvm; @@ -251,7 +251,7 @@ } // getID Wrappers - Ensure consistent usage - // Symbol names in Sparc assembly language have these rules: + // Symbol names in SparcV9 assembly language have these rules: // (a) Must match { letter | _ | . | $ } { letter | _ | . | $ | digit }* // (b) A name beginning in "." is treated as a local name. std::string getID(const Function *F) { @@ -504,19 +504,19 @@ //===----------------------------------------------------------------------===// -// SparcAsmPrinter Code +// SparcV9AsmPrinter Code //===----------------------------------------------------------------------===// namespace { - struct SparcAsmPrinter : public FunctionPass, public AsmPrinter { - inline SparcAsmPrinter(std::ostream &os, const TargetMachine &t) + struct SparcV9AsmPrinter : public FunctionPass, public AsmPrinter { + inline SparcV9AsmPrinter(std::ostream &os, const TargetMachine &t) : AsmPrinter(os, t) {} const Function *currFunction; const char *getPassName() const { - return "Output Sparc Assembly for Functions"; + return "Output SparcV9 Assembly for Functions"; } virtual bool doInitialization(Module &M) { @@ -565,7 +565,7 @@ } // End anonymous namespace inline bool -SparcAsmPrinter::OpIsBranchTargetLabel(const MachineInstr *MI, +SparcV9AsmPrinter::OpIsBranchTargetLabel(const MachineInstr *MI, unsigned int opNum) { switch (MI->getOpcode()) { case V9::JMPLCALLr: @@ -579,7 +579,7 @@ } inline bool -SparcAsmPrinter::OpIsMemoryAddressBase(const MachineInstr *MI, +SparcV9AsmPrinter::OpIsMemoryAddressBase(const MachineInstr *MI, unsigned int opNum) { if (Target.getInstrInfo().isLoad(MI->getOpcode())) return (opNum == 0); @@ -596,7 +596,7 @@ printOneOperand(mop2, opCode); unsigned int -SparcAsmPrinter::printOperands(const MachineInstr *MI, +SparcV9AsmPrinter::printOperands(const MachineInstr *MI, unsigned int opNum) { const MachineOperand& mop = MI->getOperand(opNum); @@ -616,7 +616,7 @@ } void -SparcAsmPrinter::printOneOperand(const MachineOperand &mop, +SparcV9AsmPrinter::printOneOperand(const MachineOperand &mop, MachineOpCode opCode) { bool needBitsFlag = true; @@ -659,7 +659,7 @@ case MachineOperand::MO_PCRelativeDisp: { const Value *Val = mop.getVRegValue(); - assert(Val && "\tNULL Value in SparcAsmPrinter"); + assert(Val && "\tNULL Value in SparcV9AsmPrinter"); if (const BasicBlock *BB = dyn_cast(Val)) toAsm << getID(BB); @@ -670,7 +670,7 @@ else if (const Constant *CV = dyn_cast(Val)) toAsm << getID(CV); else - assert(0 && "Unrecognized value in SparcAsmPrinter"); + assert(0 && "Unrecognized value in SparcV9AsmPrinter"); break; } @@ -691,7 +691,7 @@ toAsm << ")"; } -void SparcAsmPrinter::emitMachineInst(const MachineInstr *MI) { +void SparcV9AsmPrinter::emitMachineInst(const MachineInstr *MI) { unsigned Opcode = MI->getOpcode(); if (Target.getInstrInfo().isDummyPhiInstr(Opcode)) @@ -715,7 +715,7 @@ ++EmittedInsts; } -void SparcAsmPrinter::emitBasicBlock(const MachineBasicBlock &MBB) { +void SparcV9AsmPrinter::emitBasicBlock(const MachineBasicBlock &MBB) { // Emit a label for the basic block toAsm << getID(MBB.getBasicBlock()) << ":\n"; @@ -726,7 +726,7 @@ toAsm << "\n"; // Separate BB's with newlines } -void SparcAsmPrinter::emitFunction(const Function &F) { +void SparcV9AsmPrinter::emitFunction(const Function &F) { std::string methName = getID(&F); toAsm << "!****** Outputing Function: " << methName << " ******\n"; @@ -760,7 +760,7 @@ toAsm << "\n\n"; } -void SparcAsmPrinter::printGlobalVariable(const GlobalVariable* GV) { +void SparcV9AsmPrinter::printGlobalVariable(const GlobalVariable* GV) { if (GV->hasExternalLinkage()) toAsm << "\t.global\t" << getID(GV) << "\n"; @@ -776,7 +776,7 @@ } } -void SparcAsmPrinter::emitGlobals(const Module &M) { +void SparcV9AsmPrinter::emitGlobals(const Module &M) { // Output global variables... for (Module::const_giterator GI = M.gbegin(), GE = M.gend(); GI != GE; ++GI) if (! GI->isExternal()) { @@ -796,5 +796,5 @@ FunctionPass *llvm::createAsmPrinterPass(std::ostream &Out, const TargetMachine &TM) { - return new SparcAsmPrinter(Out, TM); + return new SparcV9AsmPrinter(Out, TM); } Index: llvm/lib/Target/SparcV9/SparcV9CodeEmitter.cpp diff -u llvm/lib/Target/SparcV9/SparcV9CodeEmitter.cpp:1.57 llvm/lib/Target/SparcV9/SparcV9CodeEmitter.cpp:1.58 --- llvm/lib/Target/SparcV9/SparcV9CodeEmitter.cpp:1.57 Sun Feb 22 13:23:26 2004 +++ llvm/lib/Target/SparcV9/SparcV9CodeEmitter.cpp Wed Feb 25 12:44:15 2004 @@ -34,9 +34,9 @@ #include "Support/Debug.h" #include "Support/hash_set" #include "Support/Statistic.h" -#include "SparcInternals.h" -#include "SparcTargetMachine.h" -#include "SparcRegInfo.h" +#include "SparcV9Internals.h" +#include "SparcV9TargetMachine.h" +#include "SparcV9RegInfo.h" #include "SparcV9CodeEmitter.h" #include "Config/alloca.h" @@ -48,12 +48,12 @@ Statistic<> CallbackCalls("callback", "Number CompilationCallback() calls"); } -bool SparcTargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM, +bool SparcV9TargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM, MachineCodeEmitter &MCE) { MachineCodeEmitter *M = &MCE; DEBUG(M = MachineCodeEmitter::createFilePrinterEmitter(MCE)); PM.add(new SparcV9CodeEmitter(*this, *M)); - PM.add(createSparcMachineCodeDestructionPass()); //Free stuff no longer needed + PM.add(createSparcV9MachineCodeDestructionPass()); //Free stuff no longer needed return false; } @@ -179,8 +179,8 @@ void JITResolver::insertFarJumpAtAddr(int64_t Target, uint64_t Addr) { static const unsigned - o6 = SparcIntRegClass::o6, g0 = SparcIntRegClass::g0, - g1 = SparcIntRegClass::g1, g5 = SparcIntRegClass::g5; + o6 = SparcV9IntRegClass::o6, g0 = SparcV9IntRegClass::g0, + g1 = SparcV9IntRegClass::g1, g5 = SparcV9IntRegClass::g5; MachineInstr* BinaryCode[] = { // @@ -362,7 +362,7 @@ // Rewrite the call target so that we don't fault every time we execute it. // - static const unsigned o6 = SparcIntRegClass::o6; + static const unsigned o6 = SparcV9IntRegClass::o6; // Subtract enough to overwrite up to the 'save' instruction // This depends on whether we made a short call (1 instruction) or the @@ -418,7 +418,7 @@ DEBUG(std::cerr << "Emitting stub at addr: 0x" << std::hex << MCE.getCurrentPCValue() << "\n"); - unsigned o6 = SparcIntRegClass::o6, g0 = SparcIntRegClass::g0; + unsigned o6 = SparcV9IntRegClass::o6, g0 = SparcV9IntRegClass::g0; // restore %g0, 0, %g0 MachineInstr *R = BuildMI(V9::RESTOREi, 3).addMReg(g0).addSImm(0) @@ -485,8 +485,8 @@ fakeReg = RI.getClassRegNum(fakeReg, regClass); switch (regClass) { - case SparcRegInfo::IntRegClassID: { - // Sparc manual, p31 + case SparcV9RegInfo::IntRegClassID: { + // SparcV9 manual, p31 static const unsigned IntRegMap[] = { // "o0", "o1", "o2", "o3", "o4", "o5", "o7", 8, 9, 10, 11, 12, 13, 15, @@ -503,14 +503,14 @@ return IntRegMap[fakeReg]; break; } - case SparcRegInfo::FloatRegClassID: { + case SparcV9RegInfo::FloatRegClassID: { DEBUG(std::cerr << "FP reg: " << fakeReg << "\n"); - if (regType == SparcRegInfo::FPSingleRegType) { + if (regType == SparcV9RegInfo::FPSingleRegType) { // only numbered 0-31, hence can already fit into 5 bits (and 6) DEBUG(std::cerr << "FP single reg, returning: " << fakeReg << "\n"); - } else if (regType == SparcRegInfo::FPDoubleRegType) { + } else if (regType == SparcV9RegInfo::FPDoubleRegType) { // FIXME: This assumes that we only have 5-bit register fields! - // From Sparc Manual, page 40. + // From SparcV9 Manual, page 40. // The bit layout becomes: b[4], b[3], b[2], b[1], b[5] fakeReg |= (fakeReg >> 5) & 1; fakeReg &= 0x1f; @@ -518,7 +518,7 @@ } return fakeReg; } - case SparcRegInfo::IntCCRegClassID: { + case SparcV9RegInfo::IntCCRegClassID: { /* xcc, icc, ccr */ static const unsigned IntCCReg[] = { 6, 4, 2 }; @@ -527,7 +527,7 @@ DEBUG(std::cerr << "IntCC reg: " << IntCCReg[fakeReg] << "\n"); return IntCCReg[fakeReg]; } - case SparcRegInfo::FloatCCRegClassID: { + case SparcV9RegInfo::FloatCCRegClassID: { /* These are laid out %fcc0 - %fcc3 => 0 - 3, so are correct */ DEBUG(std::cerr << "FP CC reg: " << fakeReg << "\n"); return fakeReg; @@ -542,9 +542,9 @@ // WARNING: if the call used the delay slot to do meaningful work, that's not // being accounted for, and the behavior will be incorrect!! inline void SparcV9CodeEmitter::emitFarCall(uint64_t Target, Function *F) { - static const unsigned o6 = SparcIntRegClass::o6, - o7 = SparcIntRegClass::o7, g0 = SparcIntRegClass::g0, - g1 = SparcIntRegClass::g1, g5 = SparcIntRegClass::g5; + static const unsigned o6 = SparcV9IntRegClass::o6, + o7 = SparcV9IntRegClass::o7, g0 = SparcV9IntRegClass::g0, + g1 = SparcV9IntRegClass::g1, g5 = SparcV9IntRegClass::g5; MachineInstr* BinaryCode[] = { // @@ -582,7 +582,7 @@ } } -void SparcJITInfo::replaceMachineCodeForFunction (void *Old, void *New) { +void SparcV9JITInfo::replaceMachineCodeForFunction (void *Old, void *New) { assert (TheJITResolver && "Can only call replaceMachineCodeForFunction from within JIT"); uint64_t Target = (uint64_t)(intptr_t)New; @@ -658,7 +658,7 @@ } } else if (MO.isRegister() || MO.getType() == MachineOperand::MO_CCRegister) { - // This is necessary because the Sparc backend doesn't actually lay out + // This is necessary because the SparcV9 backend doesn't actually lay out // registers in the real fashion -- it skips those that it chooses not to // allocate, i.e. those that are the FP, SP, etc. unsigned fakeReg = MO.getReg(); @@ -677,17 +677,17 @@ MI, MO.isPCRelative()); } else if (MO.isMachineBasicBlock()) { // Duplicate code of the above case for VirtualRegister, BasicBlock... - // It should really hit this case, but Sparc backend uses VRegs instead + // It should really hit this case, but SparcV9 backend uses VRegs instead DEBUG(std::cerr << "Saving reference to MBB\n"); const BasicBlock *BB = MO.getMachineBasicBlock()->getBasicBlock(); unsigned* CurrPC = (unsigned*)(intptr_t)MCE.getCurrentPCValue(); BBRefs.push_back(std::make_pair(BB, std::make_pair(CurrPC, &MI))); } else if (MO.isExternalSymbol()) { - // Sparc backend doesn't generate this (yet...) + // SparcV9 backend doesn't generate this (yet...) std::cerr << "ERROR: External symbol unhandled: " << MO << "\n"; abort(); } else if (MO.isFrameIndex()) { - // Sparc backend doesn't generate this (yet...) + // SparcV9 backend doesn't generate this (yet...) int FrameIndex = MO.getFrameIndex(); std::cerr << "ERROR: Frame index unhandled.\n"; abort(); @@ -703,13 +703,13 @@ // are used in SPARC assembly. (Some of these make no sense in combination // with some of the above; we'll trust that the instruction selector // will not produce nonsense, and not check for valid combinations here.) - if (MO.isLoBits32()) { // %lo(val) == %lo() in Sparc ABI doc + if (MO.isLoBits32()) { // %lo(val) == %lo() in SparcV9 ABI doc return rv & 0x03ff; - } else if (MO.isHiBits32()) { // %lm(val) == %hi() in Sparc ABI doc + } else if (MO.isHiBits32()) { // %lm(val) == %hi() in SparcV9 ABI doc return (rv >> 10) & 0x03fffff; - } else if (MO.isLoBits64()) { // %hm(val) == %ulo() in Sparc ABI doc + } else if (MO.isLoBits64()) { // %hm(val) == %ulo() in SparcV9 ABI doc return (rv >> 32) & 0x03ff; - } else if (MO.isHiBits64()) { // %hh(val) == %uhi() in Sparc ABI doc + } else if (MO.isHiBits64()) { // %hh(val) == %uhi() in SparcV9 ABI doc return rv >> 42; } else { // (unadorned) val return rv; Index: llvm/lib/Target/SparcV9/SparcV9FrameInfo.cpp diff -u llvm/lib/Target/SparcV9/SparcV9FrameInfo.cpp:1.1 llvm/lib/Target/SparcV9/SparcV9FrameInfo.cpp:1.2 --- llvm/lib/Target/SparcV9/SparcV9FrameInfo.cpp:1.1 Wed Dec 17 16:04:00 2003 +++ llvm/lib/Target/SparcV9/SparcV9FrameInfo.cpp Wed Feb 25 12:44:15 2004 @@ -1,4 +1,4 @@ -//===-- Sparc.cpp - General implementation file for the Sparc Target ------===// +//===-- SparcV9.cpp - General implementation file for the SparcV9 Target ------===// // // The LLVM Compiler Infrastructure // @@ -16,18 +16,18 @@ #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineFunctionInfo.h" #include "llvm/Target/TargetFrameInfo.h" -#include "SparcFrameInfo.h" +#include "SparcV9FrameInfo.h" using namespace llvm; int -SparcFrameInfo::getFirstAutomaticVarOffset(MachineFunction&, bool& pos) const { +SparcV9FrameInfo::getFirstAutomaticVarOffset(MachineFunction&, bool& pos) const { pos = false; // static stack area grows downwards return StaticAreaOffsetFromFP; } int -SparcFrameInfo::getRegSpillAreaOffset(MachineFunction& mcInfo, bool& pos) const +SparcV9FrameInfo::getRegSpillAreaOffset(MachineFunction& mcInfo, bool& pos) const { // ensure no more auto vars are added mcInfo.getInfo()->freezeAutomaticVarsArea(); @@ -37,7 +37,7 @@ return StaticAreaOffsetFromFP - autoVarsSize; } -int SparcFrameInfo::getTmpAreaOffset(MachineFunction& mcInfo, bool& pos) const { +int SparcV9FrameInfo::getTmpAreaOffset(MachineFunction& mcInfo, bool& pos) const { MachineFunctionInfo *MFI = mcInfo.getInfo(); MFI->freezeAutomaticVarsArea(); // ensure no more auto vars are added MFI->freezeSpillsArea(); // ensure no more spill slots are added @@ -50,7 +50,7 @@ } int -SparcFrameInfo::getDynamicAreaOffset(MachineFunction& mcInfo, bool& pos) const { +SparcV9FrameInfo::getDynamicAreaOffset(MachineFunction& mcInfo, bool& pos) const { // Dynamic stack area grows downwards starting at top of opt-args area. // The opt-args, required-args, and register-save areas are empty except // during calls and traps, so they are shifted downwards on each Index: llvm/lib/Target/SparcV9/SparcV9FrameInfo.h diff -u llvm/lib/Target/SparcV9/SparcV9FrameInfo.h:1.1 llvm/lib/Target/SparcV9/SparcV9FrameInfo.h:1.2 --- llvm/lib/Target/SparcV9/SparcV9FrameInfo.h:1.1 Wed Dec 17 16:04:00 2003 +++ llvm/lib/Target/SparcV9/SparcV9FrameInfo.h Wed Feb 25 12:44:15 2004 @@ -1,4 +1,4 @@ -//===-- SparcFrameInfo.h - Define TargetFrameInfo for Sparc -----*- C++ -*-===// +//===-- SparcV9FrameInfo.h - Define TargetFrameInfo for SparcV9 -----*- C++ -*-===// // // The LLVM Compiler Infrastructure // @@ -22,10 +22,10 @@ namespace llvm { -class SparcFrameInfo: public TargetFrameInfo { +class SparcV9FrameInfo: public TargetFrameInfo { const TargetMachine ⌖ public: - SparcFrameInfo(const TargetMachine &TM) + SparcV9FrameInfo(const TargetMachine &TM) : TargetFrameInfo(StackGrowsDown, StackFrameSizeAlignment, 0), target(TM) {} public: @@ -114,10 +114,10 @@ private: /*---------------------------------------------------------------------- - This diagram shows the stack frame layout used by llc on Sparc V9. + This diagram shows the stack frame layout used by llc on SparcV9 V9. Note that only the location of automatic variables, spill area, temporary storage, and dynamically allocated stack area are chosen - by us. The rest conform to the Sparc V9 ABI. + by us. The rest conform to the SparcV9 V9 ABI. All stack addresses are offset by OFFSET = 0x7ff (2047). Alignment assumptions and other invariants: @@ -156,7 +156,7 @@ *----------------------------------------------------------------------*/ - // All stack addresses must be offset by 0x7ff (2047) on Sparc V9. + // All stack addresses must be offset by 0x7ff (2047) on SparcV9 V9. static const int OFFSET = (int) 0x7ff; static const int StackFrameSizeAlignment = 16; static const int MinStackFrameSize = 176; Index: llvm/lib/Target/SparcV9/SparcV9InstrInfo.cpp diff -u llvm/lib/Target/SparcV9/SparcV9InstrInfo.cpp:1.59 llvm/lib/Target/SparcV9/SparcV9InstrInfo.cpp:1.60 --- llvm/lib/Target/SparcV9/SparcV9InstrInfo.cpp:1.59 Wed Dec 17 16:04:00 2003 +++ llvm/lib/Target/SparcV9/SparcV9InstrInfo.cpp Wed Feb 25 12:44:15 2004 @@ -1,4 +1,4 @@ -//===-- SparcInstrInfo.cpp ------------------------------------------------===// +//===-- SparcV9InstrInfo.cpp ------------------------------------------------===// // // The LLVM Compiler Infrastructure // @@ -20,9 +20,9 @@ #include "llvm/CodeGen/MachineFunctionInfo.h" #include "llvm/CodeGen/MachineCodeForInstruction.h" #include "llvm/CodeGen/MachineInstrBuilder.h" -#include "SparcInternals.h" -#include "SparcInstrSelectionSupport.h" -#include "SparcInstrInfo.h" +#include "SparcV9Internals.h" +#include "SparcV9InstrSelectionSupport.h" +#include "SparcV9InstrInfo.h" namespace llvm { @@ -42,7 +42,7 @@ //--------------------------------------------------------------------------- uint64_t -SparcInstrInfo::ConvertConstantToIntType(const TargetMachine &target, +SparcV9InstrInfo::ConvertConstantToIntType(const TargetMachine &target, const Value *V, const Type *destType, bool &isValidConstant) const @@ -386,7 +386,7 @@ default: break; }; - return (modelOpCode < 0)? 0: SparcMachineInstrDesc[modelOpCode].maxImmedConst; + return (modelOpCode < 0)? 0: SparcV9MachineInstrDesc[modelOpCode].maxImmedConst; } static void @@ -407,18 +407,18 @@ //--------------------------------------------------------------------------- -// class SparcInstrInfo +// class SparcV9InstrInfo // // Purpose: // Information about individual instructions. -// Most information is stored in the SparcMachineInstrDesc array above. +// Most information is stored in the SparcV9MachineInstrDesc array above. // Other information is computed on demand, and most such functions // default to member functions in base class TargetInstrInfo. //--------------------------------------------------------------------------- /*ctor*/ -SparcInstrInfo::SparcInstrInfo() - : TargetInstrInfo(SparcMachineInstrDesc, +SparcV9InstrInfo::SparcV9InstrInfo() + : TargetInstrInfo(SparcV9MachineInstrDesc, /*descSize = */ V9::NUM_TOTAL_OPCODES, /*numRealOpCodes = */ V9::NUM_REAL_OPCODES) { @@ -426,7 +426,7 @@ } bool -SparcInstrInfo::ConstantMayNotFitInImmedField(const Constant* CV, +SparcV9InstrInfo::ConstantMayNotFitInImmedField(const Constant* CV, const Instruction* I) const { if (I->getOpcode() >= MaxConstantsTable.size()) // user-defined op (or bug!) @@ -456,7 +456,7 @@ // Any stack space required is allocated via MachineFunction. // void -SparcInstrInfo::CreateCodeToLoadConst(const TargetMachine& target, +SparcV9InstrInfo::CreateCodeToLoadConst(const TargetMachine& target, Function* F, Value* val, Instruction* dest, @@ -553,7 +553,7 @@ // Any stack space required is allocated via MachineFunction. // void -SparcInstrInfo::CreateCodeToCopyIntToFloat(const TargetMachine& target, +SparcV9InstrInfo::CreateCodeToCopyIntToFloat(const TargetMachine& target, Function* F, Value* val, Instruction* dest, @@ -614,7 +614,7 @@ // Temporary stack space required is allocated via MachineFunction. // void -SparcInstrInfo::CreateCodeToCopyFloatToInt(const TargetMachine& target, +SparcV9InstrInfo::CreateCodeToCopyFloatToInt(const TargetMachine& target, Function* F, Value* val, Instruction* dest, @@ -665,7 +665,7 @@ // Any stack space required is allocated via MachineFunction. // void -SparcInstrInfo::CreateCopyInstructionsByType(const TargetMachine& target, +SparcV9InstrInfo::CreateCopyInstructionsByType(const TargetMachine& target, Function *F, Value* src, Instruction* dest, @@ -761,7 +761,7 @@ // Any stack space required is allocated via MachineFunction. // void -SparcInstrInfo::CreateSignExtensionInstructions( +SparcV9InstrInfo::CreateSignExtensionInstructions( const TargetMachine& target, Function* F, Value* srcVal, @@ -783,7 +783,7 @@ // Any stack space required is allocated via MachineFunction. // void -SparcInstrInfo::CreateZeroExtensionInstructions( +SparcV9InstrInfo::CreateZeroExtensionInstructions( const TargetMachine& target, Function* F, Value* srcVal, Index: llvm/lib/Target/SparcV9/SparcV9InstrInfo.h diff -u llvm/lib/Target/SparcV9/SparcV9InstrInfo.h:1.2 llvm/lib/Target/SparcV9/SparcV9InstrInfo.h:1.3 --- llvm/lib/Target/SparcV9/SparcV9InstrInfo.h:1.2 Tue Feb 10 15:12:06 2004 +++ llvm/lib/Target/SparcV9/SparcV9InstrInfo.h Wed Feb 25 12:44:15 2004 @@ -1,4 +1,4 @@ -//===-- SparcInstrInfo.h - Define TargetInstrInfo for Sparc -----*- C++ -*-===// +//===-- SparcV9InstrInfo.h - Define TargetInstrInfo for SparcV9 -----*- C++ -*-===// // // The LLVM Compiler Infrastructure // @@ -8,7 +8,7 @@ //===----------------------------------------------------------------------===// // // This class contains information about individual instructions. -// Most information is stored in the SparcMachineInstrDesc array above. +// Most information is stored in the SparcV9MachineInstrDesc array above. // Other information is computed on demand, and most such functions // default to member functions in base class TargetInstrInfo. // @@ -19,12 +19,12 @@ #include "llvm/Target/TargetInstrInfo.h" #include "llvm/CodeGen/MachineInstr.h" -#include "SparcInternals.h" +#include "SparcV9Internals.h" namespace llvm { -struct SparcInstrInfo : public TargetInstrInfo { - SparcInstrInfo(); +struct SparcV9InstrInfo : public TargetInstrInfo { + SparcV9InstrInfo(); // All immediate constants are in position 1 except the // store instructions and SETxx. @@ -53,7 +53,7 @@ /// another instruction, e.g. X86: xchg ax, ax; SparcV9: sethi 0, g0 /// MachineInstr* createNOPinstr() const { - return BuildMI(V9::SETHI, 2).addZImm(0).addReg(SparcIntRegClass::g0); + return BuildMI(V9::SETHI, 2).addZImm(0).addReg(SparcV9IntRegClass::g0); } /// isNOPinstr - not having a special NOP opcode, we need to know if a given @@ -66,7 +66,7 @@ const MachineOperand &op0 = MI.getOperand(0), &op1 = MI.getOperand(1); if (op0.isImmediate() && op0.getImmedValue() == 0 && op1.getType() == MachineOperand::MO_MachineRegister && - op1.getMachineRegNum() == SparcIntRegClass::g0) + op1.getMachineRegNum() == SparcV9IntRegClass::g0) { return true; } Index: llvm/lib/Target/SparcV9/SparcV9InstrSelection.cpp diff -u llvm/lib/Target/SparcV9/SparcV9InstrSelection.cpp:1.133 llvm/lib/Target/SparcV9/SparcV9InstrSelection.cpp:1.134 --- llvm/lib/Target/SparcV9/SparcV9InstrSelection.cpp:1.133 Sun Feb 22 13:23:26 2004 +++ llvm/lib/Target/SparcV9/SparcV9InstrSelection.cpp Wed Feb 25 12:44:15 2004 @@ -1,4 +1,4 @@ -//===-- SparcInstrSelection.cpp -------------------------------------------===// +//===-- SparcV9InstrSelection.cpp -------------------------------------------===// // // The LLVM Compiler Infrastructure // @@ -24,10 +24,10 @@ #include "llvm/CodeGen/MachineFunctionInfo.h" #include "llvm/CodeGen/MachineInstrBuilder.h" #include "llvm/CodeGen/MachineInstrAnnot.h" -#include "SparcInstrSelectionSupport.h" -#include "SparcInternals.h" -#include "SparcRegClassInfo.h" -#include "SparcRegInfo.h" +#include "SparcV9InstrSelectionSupport.h" +#include "SparcV9Internals.h" +#include "SparcV9RegClassInfo.h" +#include "SparcV9RegInfo.h" #include "Support/MathExtras.h" #include #include @@ -1413,7 +1413,7 @@ } case Intrinsic::va_end: - return true; // no-op on Sparc + return true; // no-op on SparcV9 case Intrinsic::va_copy: // Simple copy of current va_list (arg1) to new va_list (result) @@ -1543,13 +1543,13 @@ // -- For non-FP values, create an add-with-0 instruction // if (retVal != NULL) { - const SparcRegInfo& regInfo = - (SparcRegInfo&) target.getRegInfo(); + const SparcV9RegInfo& regInfo = + (SparcV9RegInfo&) target.getRegInfo(); const Type* retType = retVal->getType(); unsigned regClassID = regInfo.getRegClassIDOfType(retType); unsigned retRegNum = (retType->isFloatingPoint() - ? (unsigned) SparcFloatRegClass::f0 - : (unsigned) SparcIntRegClass::i0); + ? (unsigned) SparcV9FloatRegClass::f0 + : (unsigned) SparcV9IntRegClass::i0); retRegNum = regInfo.getUnifiedRegNum(regClassID, retRegNum); // () Insert sign-extension instructions for small signed values. @@ -2450,8 +2450,8 @@ MachineFunction& MF = MachineFunction::get(currentFunc); MachineCodeForInstruction& mcfi = MachineCodeForInstruction::get(callInstr); - const SparcRegInfo& regInfo = - (SparcRegInfo&) target.getRegInfo(); + const SparcV9RegInfo& regInfo = + (SparcV9RegInfo&) target.getRegInfo(); const TargetFrameInfo& frameInfo = target.getFrameInfo(); // Create hidden virtual register for return address with type void* @@ -2701,8 +2701,8 @@ const Type* retType = callInstr->getType(); int regNum = (retType->isFloatingPoint() - ? (unsigned) SparcFloatRegClass::f0 - : (unsigned) SparcIntRegClass::o0); + ? (unsigned) SparcV9FloatRegClass::f0 + : (unsigned) SparcV9IntRegClass::o0); unsigned regClassID = regInfo.getRegClassIDOfType(retType); regNum = regInfo.getUnifiedRegNum(regClassID, regNum); Index: llvm/lib/Target/SparcV9/SparcV9InstrSelectionSupport.h diff -u llvm/lib/Target/SparcV9/SparcV9InstrSelectionSupport.h:1.13 llvm/lib/Target/SparcV9/SparcV9InstrSelectionSupport.h:1.14 --- llvm/lib/Target/SparcV9/SparcV9InstrSelectionSupport.h:1.13 Tue Nov 11 16:41:33 2003 +++ llvm/lib/Target/SparcV9/SparcV9InstrSelectionSupport.h Wed Feb 25 12:44:15 2004 @@ -1,4 +1,4 @@ -//===-- llvm/CodeGen/SparcInstrSelectionSupport.h ---------------*- C++ -*-===// +//===-- llvm/CodeGen/SparcV9InstrSelectionSupport.h ---------------*- C++ -*-===// // // The LLVM Compiler Infrastructure // @@ -15,7 +15,7 @@ #define SPARC_INSTR_SELECTION_SUPPORT_h #include "llvm/DerivedTypes.h" -#include "SparcInternals.h" +#include "SparcV9Internals.h" namespace llvm { @@ -90,7 +90,7 @@ } -// Because the Sparc instruction selector likes to re-write operands to +// Because the SparcV9 instruction selector likes to re-write operands to // instructions, making them change from a Value* (virtual register) to a // Constant* (making an immediate field), we need to change the opcode from a // register-based instruction to an immediate-based instruction, hence this Index: llvm/lib/Target/SparcV9/SparcV9Internals.h diff -u llvm/lib/Target/SparcV9/SparcV9Internals.h:1.110 llvm/lib/Target/SparcV9/SparcV9Internals.h:1.111 --- llvm/lib/Target/SparcV9/SparcV9Internals.h:1.110 Sat Dec 20 03:17:40 2003 +++ llvm/lib/Target/SparcV9/SparcV9Internals.h Wed Feb 25 12:44:15 2004 @@ -1,4 +1,4 @@ -//===-- SparcInternals.h ----------------------------------------*- C++ -*-===// +//===-- SparcV9Internals.h ----------------------------------------*- C++ -*-===// // // The LLVM Compiler Infrastructure // @@ -7,7 +7,7 @@ // //===----------------------------------------------------------------------===// // -// This file defines stuff that is to be private to the Sparc backend, but is +// This file defines stuff that is to be private to the SparcV9 backend, but is // shared among different portions of the backend. // //===----------------------------------------------------------------------===// @@ -22,16 +22,16 @@ #include "llvm/Target/TargetCacheInfo.h" #include "llvm/Target/TargetRegInfo.h" #include "llvm/Type.h" -#include "SparcRegClassInfo.h" +#include "SparcV9RegClassInfo.h" #include "Config/sys/types.h" namespace llvm { class LiveRange; -class SparcTargetMachine; +class SparcV9TargetMachine; class Pass; -enum SparcInstrSchedClass { +enum SparcV9InstrSchedClass { SPARC_NONE, /* Instructions with no scheduling restrictions */ SPARC_IEUN, /* Integer class that can use IEU0 or IEU1 */ SPARC_IEU0, /* Integer class IEU0 */ @@ -49,20 +49,20 @@ //--------------------------------------------------------------------------- -// enum SparcMachineOpCode. -// const TargetInstrDescriptor SparcMachineInstrDesc[] +// enum SparcV9MachineOpCode. +// const TargetInstrDescriptor SparcV9MachineInstrDesc[] // // Purpose: -// Description of UltraSparc machine instructions. +// Description of UltraSparcV9 machine instructions. // //--------------------------------------------------------------------------- namespace V9 { - enum SparcMachineOpCode { + enum SparcV9MachineOpCode { #define I(ENUM, OPCODESTRING, NUMOPERANDS, RESULTPOS, MAXIMM, IMMSE, \ NUMDELAYSLOTS, LATENCY, SCHEDCLASS, INSTFLAGS) \ ENUM, -#include "SparcInstr.def" +#include "SparcV9Instr.def" // End-of-array marker INVALID_OPCODE, @@ -72,33 +72,33 @@ } // Array of machine instruction descriptions... -extern const TargetInstrDescriptor SparcMachineInstrDesc[]; +extern const TargetInstrDescriptor SparcV9MachineInstrDesc[]; //--------------------------------------------------------------------------- -// class SparcSchedInfo +// class SparcV9SchedInfo // // Purpose: // Interface to instruction scheduling information for UltraSPARC. // The parameter values above are based on UltraSPARC IIi. //--------------------------------------------------------------------------- -class SparcSchedInfo: public TargetSchedInfo { +class SparcV9SchedInfo: public TargetSchedInfo { public: - SparcSchedInfo(const TargetMachine &tgt); + SparcV9SchedInfo(const TargetMachine &tgt); protected: virtual void initializeResources(); }; //--------------------------------------------------------------------------- -// class SparcCacheInfo +// class SparcV9CacheInfo // // Purpose: // Interface to cache parameters for the UltraSPARC. // Just use defaults for now. //--------------------------------------------------------------------------- -struct SparcCacheInfo: public TargetCacheInfo { - SparcCacheInfo(const TargetMachine &T) : TargetCacheInfo(T) {} +struct SparcV9CacheInfo: public TargetCacheInfo { + SparcV9CacheInfo(const TargetMachine &T) : TargetCacheInfo(T) {} }; @@ -127,7 +127,7 @@ /// Pass* createBytecodeAsmPrinterPass(std::ostream &Out); -FunctionPass *createSparcMachineCodeDestructionPass(); +FunctionPass *createSparcV9MachineCodeDestructionPass(); } // End llvm namespace Index: llvm/lib/Target/SparcV9/SparcV9JITInfo.h diff -u llvm/lib/Target/SparcV9/SparcV9JITInfo.h:1.3 llvm/lib/Target/SparcV9/SparcV9JITInfo.h:1.4 --- llvm/lib/Target/SparcV9/SparcV9JITInfo.h:1.3 Sun Dec 28 15:23:38 2003 +++ llvm/lib/Target/SparcV9/SparcV9JITInfo.h Wed Feb 25 12:44:15 2004 @@ -1,4 +1,4 @@ -//===- SparcJITInfo.h - Sparc implementation of the JIT interface -*-C++-*-===// +//===- SparcV9JITInfo.h - SparcV9 implementation of the JIT interface -*-C++-*-===// // // The LLVM Compiler Infrastructure // @@ -7,7 +7,7 @@ // //===----------------------------------------------------------------------===// // -// This file contains the Sparc implementation of the TargetJITInfo class. +// This file contains the SparcV9 implementation of the TargetJITInfo class. // //===----------------------------------------------------------------------===// @@ -19,10 +19,10 @@ namespace llvm { class TargetMachine; - class SparcJITInfo : public TargetJITInfo { + class SparcV9JITInfo : public TargetJITInfo { TargetMachine &TM; public: - SparcJITInfo(TargetMachine &tm) : TM(tm) {} + SparcV9JITInfo(TargetMachine &tm) : TM(tm) {} /// addPassesToJITCompile - Add passes to the specified pass manager to /// implement a fast dynamic compiler for this target. Return true if this Index: llvm/lib/Target/SparcV9/SparcV9PeepholeOpts.cpp diff -u llvm/lib/Target/SparcV9/SparcV9PeepholeOpts.cpp:1.21 llvm/lib/Target/SparcV9/SparcV9PeepholeOpts.cpp:1.22 --- llvm/lib/Target/SparcV9/SparcV9PeepholeOpts.cpp:1.21 Fri Feb 13 19:18:34 2004 +++ llvm/lib/Target/SparcV9/SparcV9PeepholeOpts.cpp Wed Feb 25 12:44:15 2004 @@ -12,7 +12,7 @@ // //===----------------------------------------------------------------------===// -#include "SparcInternals.h" +#include "SparcV9Internals.h" #include "llvm/BasicBlock.h" #include "llvm/Pass.h" #include "llvm/CodeGen/MachineFunction.h" Index: llvm/lib/Target/SparcV9/SparcV9PreSelection.cpp diff -u llvm/lib/Target/SparcV9/SparcV9PreSelection.cpp:1.27 llvm/lib/Target/SparcV9/SparcV9PreSelection.cpp:1.28 --- llvm/lib/Target/SparcV9/SparcV9PreSelection.cpp:1.27 Wed Dec 17 16:06:08 2003 +++ llvm/lib/Target/SparcV9/SparcV9PreSelection.cpp Wed Feb 25 12:44:15 2004 @@ -15,7 +15,7 @@ // //===----------------------------------------------------------------------===// -#include "SparcInternals.h" +#include "SparcV9Internals.h" #include "llvm/Constants.h" #include "llvm/DerivedTypes.h" #include "llvm/iMemory.h" Index: llvm/lib/Target/SparcV9/SparcV9PrologEpilogInserter.cpp diff -u llvm/lib/Target/SparcV9/SparcV9PrologEpilogInserter.cpp:1.35 llvm/lib/Target/SparcV9/SparcV9PrologEpilogInserter.cpp:1.36 --- llvm/lib/Target/SparcV9/SparcV9PrologEpilogInserter.cpp:1.35 Sun Feb 22 13:23:26 2004 +++ llvm/lib/Target/SparcV9/SparcV9PrologEpilogInserter.cpp Wed Feb 25 12:44:15 2004 @@ -16,8 +16,8 @@ // //===----------------------------------------------------------------------===// -#include "SparcInternals.h" -#include "SparcRegClassInfo.h" +#include "SparcV9Internals.h" +#include "SparcV9RegClassInfo.h" #include "llvm/CodeGen/MachineFunctionPass.h" #include "llvm/CodeGen/MachineFunctionInfo.h" #include "llvm/CodeGen/MachineCodeForInstruction.h" @@ -31,7 +31,7 @@ namespace { struct InsertPrologEpilogCode : public MachineFunctionPass { - const char *getPassName() const { return "Sparc Prolog/Epilog Inserter"; } + const char *getPassName() const { return "SparcV9 Prolog/Epilog Inserter"; } bool runOnMachineFunction(MachineFunction &F) { if (!F.getInfo()->isCompiledAsLeafMethod()) { @@ -83,7 +83,7 @@ // SETSW -(stackSize), %g1 int uregNum = TM.getRegInfo().getUnifiedRegNum( TM.getRegInfo().getRegClassIDOfType(Type::IntTy), - SparcIntRegClass::g1); + SparcV9IntRegClass::g1); MachineInstr* M = BuildMI(V9::SETHI, 2).addSImm(C) .addMReg(uregNum, MachineOperand::Def); @@ -119,7 +119,7 @@ bool ignore; int firstArgReg = TM.getRegInfo().getUnifiedRegNum( TM.getRegInfo().getRegClassIDOfType(Type::IntTy), - SparcIntRegClass::i0); + SparcV9IntRegClass::i0); int fpReg = TM.getFrameInfo().getIncomingArgBaseRegNum(); int argSize = TM.getFrameInfo().getSizeOfEachArgOnStack(); int firstArgOffset=TM.getFrameInfo().getFirstIncomingArgOffset(MF,ignore); Index: llvm/lib/Target/SparcV9/SparcV9RegClassInfo.cpp diff -u llvm/lib/Target/SparcV9/SparcV9RegClassInfo.cpp:1.34 llvm/lib/Target/SparcV9/SparcV9RegClassInfo.cpp:1.35 --- llvm/lib/Target/SparcV9/SparcV9RegClassInfo.cpp:1.34 Fri Jan 9 10:17:09 2004 +++ llvm/lib/Target/SparcV9/SparcV9RegClassInfo.cpp Wed Feb 25 12:44:15 2004 @@ -1,4 +1,4 @@ -//===-- SparcRegClassInfo.cpp - Register class def'ns for Sparc -----------===// +//===-- SparcV9RegClassInfo.cpp - Register class def'ns for SparcV9 -----------===// // // The LLVM Compiler Infrastructure // @@ -7,14 +7,14 @@ // //===----------------------------------------------------------------------===// // -// This file defines the register classes used by the Sparc target description. +// This file defines the register classes used by the SparcV9 target description. // //===----------------------------------------------------------------------===// #include "llvm/Type.h" -#include "SparcRegClassInfo.h" -#include "SparcInternals.h" -#include "SparcRegInfo.h" +#include "SparcV9RegClassInfo.h" +#include "SparcV9Internals.h" +#include "SparcV9RegInfo.h" #include "RegAlloc/RegAllocCommon.h" #include "RegAlloc/IGNode.h" @@ -33,7 +33,7 @@ // If both above fail, spill. // //----------------------------------------------------------------------------- -void SparcIntRegClass::colorIGNode(IGNode * Node, +void SparcV9IntRegClass::colorIGNode(IGNode * Node, const std::vector &IsColorUsedArr) const { LiveRange *LR = Node->getParentLR(); @@ -69,16 +69,16 @@ //if this Node is between calls if (! LR->isCallInterference()) { // start with volatiles (we can allocate volatiles safely) - SearchStart = SparcIntRegClass::StartOfAllRegs; + SearchStart = SparcV9IntRegClass::StartOfAllRegs; } else { // start with non volatiles (no non-volatiles) - SearchStart = SparcIntRegClass::StartOfNonVolatileRegs; + SearchStart = SparcV9IntRegClass::StartOfNonVolatileRegs; } unsigned c=0; // color // find first unused color - for (c=SearchStart; c < SparcIntRegClass::NumOfAvailRegs; c++) { + for (c=SearchStart; c < SparcV9IntRegClass::NumOfAvailRegs; c++) { if (!IsColorUsedArr[c]) { ColorFound = true; break; @@ -95,10 +95,10 @@ // else if (LR->isCallInterference()) { // start from 0 - try to find even a volatile this time - SearchStart = SparcIntRegClass::StartOfAllRegs; + SearchStart = SparcV9IntRegClass::StartOfAllRegs; // find first unused volatile color - for(c=SearchStart; c < SparcIntRegClass::StartOfNonVolatileRegs; c++) { + for(c=SearchStart; c < SparcV9IntRegClass::StartOfNonVolatileRegs; c++) { if (! IsColorUsedArr[c]) { ColorFound = true; break; @@ -140,7 +140,7 @@ // Note: The third name (%ccr) is essentially an assembly mnemonic and // depends solely on the opcode, so the name can be chosen in EmitAssembly. //----------------------------------------------------------------------------- -void SparcIntCCRegClass::colorIGNode(IGNode *Node, +void SparcV9IntCCRegClass::colorIGNode(IGNode *Node, const std::vector &IsColorUsedArr) const { if (Node->getNumOfNeighbors() > 0) @@ -173,7 +173,7 @@ } -void SparcFloatCCRegClass::colorIGNode(IGNode *Node, +void SparcV9FloatCCRegClass::colorIGNode(IGNode *Node, const std::vector &IsColorUsedArr) const { for(unsigned c = 0; c != 4; ++c) if (!IsColorUsedArr[c]) { // find unused color @@ -201,7 +201,7 @@ // If a color is still not fond, mark for spilling // //---------------------------------------------------------------------------- -void SparcFloatRegClass::colorIGNode(IGNode * Node, +void SparcV9FloatRegClass::colorIGNode(IGNode * Node, const std::vector &IsColorUsedArr) const { LiveRange *LR = Node->getParentLR(); @@ -211,11 +211,11 @@ // // FIXME: This is old code that is no longer needed. Temporarily converting // it into a big assertion just to check that the replacement logic - // (invoking SparcFloatRegClass::markColorsUsed() directly from + // (invoking SparcV9FloatRegClass::markColorsUsed() directly from // RegClass::colorIGNode) works correctly. // // In fact, this entire function should be identical to - // SparcIntRegClass::colorIGNode(), and perhaps can be + // SparcV9IntRegClass::colorIGNode(), and perhaps can be // made into a general case in CodeGen/RegAlloc/RegClass.cpp. // unsigned NumNeighbors = Node->getNumOfNeighbors(); // total # of neighbors @@ -242,7 +242,7 @@ // **NOTE: We don't check for call interferences in allocating suggested // color in this class since ALL registers are volatile. If this fact // changes, we should change the following part - //- see SparcIntRegClass::colorIGNode() + //- see SparcV9IntRegClass::colorIGNode() // if( LR->hasSuggestedColor() ) { if( ! IsColorUsedArr[ LR->getSuggestedColor() ] ) { @@ -280,10 +280,10 @@ //if this Node is between calls (i.e., no call interferences ) if (! isCallInterf) { // start with volatiles (we can allocate volatiles safely) - SearchStart = SparcFloatRegClass::StartOfAllRegs; + SearchStart = SparcV9FloatRegClass::StartOfAllRegs; } else { // start with non volatiles (no non-volatiles) - SearchStart = SparcFloatRegClass::StartOfNonVolatileRegs; + SearchStart = SparcV9FloatRegClass::StartOfNonVolatileRegs; } ColorFound = findFloatColor(LR, SearchStart, 32, IsColorUsedArr); @@ -296,8 +296,8 @@ // We are here because there is a call interference and no non-volatile // color could be found. // Now try to allocate even a volatile color - ColorFound = findFloatColor(LR, SparcFloatRegClass::StartOfAllRegs, - SparcFloatRegClass::StartOfNonVolatileRegs, + ColorFound = findFloatColor(LR, SparcV9FloatRegClass::StartOfAllRegs, + SparcV9FloatRegClass::StartOfNonVolatileRegs, IsColorUsedArr); } @@ -316,13 +316,13 @@ // for double-precision registers. //----------------------------------------------------------------------------- -void SparcFloatRegClass::markColorsUsed(unsigned RegInClass, +void SparcV9FloatRegClass::markColorsUsed(unsigned RegInClass, int UserRegType, int RegTypeWanted, std::vector &IsColorUsedArr) const { - if (UserRegType == SparcRegInfo::FPDoubleRegType || - RegTypeWanted == SparcRegInfo::FPDoubleRegType) { + if (UserRegType == SparcV9RegInfo::FPDoubleRegType || + RegTypeWanted == SparcV9RegInfo::FPDoubleRegType) { // This register is used as or is needed as a double-precision reg. // We need to mark the [even,odd] pair corresponding to this reg. // Get the even numbered register corresponding to this reg. @@ -346,10 +346,10 @@ // for double-precision registers // It returns -1 if no unused color is found. // -int SparcFloatRegClass::findUnusedColor(int RegTypeWanted, +int SparcV9FloatRegClass::findUnusedColor(int RegTypeWanted, const std::vector &IsColorUsedArr) const { - if (RegTypeWanted == SparcRegInfo::FPDoubleRegType) { + if (RegTypeWanted == SparcV9RegInfo::FPDoubleRegType) { unsigned NC = 2 * this->getNumOfAvailRegs(); assert(IsColorUsedArr.size() == NC && "Invalid colors-used array"); for (unsigned c = 0; c < NC; c+=2) @@ -369,7 +369,7 @@ // type of the Node (i.e., float/double) //----------------------------------------------------------------------------- -int SparcFloatRegClass::findFloatColor(const LiveRange *LR, +int SparcV9FloatRegClass::findFloatColor(const LiveRange *LR, unsigned Start, unsigned End, const std::vector &IsColorUsedArr) const @@ -380,7 +380,7 @@ for (unsigned c=Start; c < End ; c+= 2) if (!IsColorUsedArr[c]) { assert(!IsColorUsedArr[c+1] && - "Incorrect marking of used regs for Sparc FP double!"); + "Incorrect marking of used regs for SparcV9 FP double!"); return c; } } else { Index: llvm/lib/Target/SparcV9/SparcV9RegClassInfo.h diff -u llvm/lib/Target/SparcV9/SparcV9RegClassInfo.h:1.23 llvm/lib/Target/SparcV9/SparcV9RegClassInfo.h:1.24 --- llvm/lib/Target/SparcV9/SparcV9RegClassInfo.h:1.23 Tue Nov 11 16:41:33 2003 +++ llvm/lib/Target/SparcV9/SparcV9RegClassInfo.h Wed Feb 25 12:44:15 2004 @@ -1,4 +1,4 @@ -//===-- SparcRegClassInfo.h - Register class def'ns for Sparc ---*- C++ -*-===// +//===-- SparcV9RegClassInfo.h - Register class def'ns for SparcV9 ---*- C++ -*-===// // // The LLVM Compiler Infrastructure // @@ -7,7 +7,7 @@ // //===----------------------------------------------------------------------===// // -// This file defines the register classes used by the Sparc target description. +// This file defines the register classes used by the SparcV9 target description. // //===----------------------------------------------------------------------===// @@ -22,8 +22,8 @@ // Integer Register Class //----------------------------------------------------------------------------- -struct SparcIntRegClass : public TargetRegClassInfo { - SparcIntRegClass(unsigned ID) +struct SparcV9IntRegClass : public TargetRegClassInfo { + SparcV9IntRegClass(unsigned ID) : TargetRegClassInfo(ID, NumOfAvailRegs, NumOfAllRegs) { } void colorIGNode(IGNode *Node, @@ -87,12 +87,12 @@ // Float Register Class //----------------------------------------------------------------------------- -class SparcFloatRegClass : public TargetRegClassInfo { +class SparcV9FloatRegClass : public TargetRegClassInfo { int findFloatColor(const LiveRange *LR, unsigned Start, unsigned End, const std::vector &IsColorUsedArr) const; public: - SparcFloatRegClass(unsigned ID) + SparcV9FloatRegClass(unsigned ID) : TargetRegClassInfo(ID, NumOfAvailRegs, NumOfAllRegs) {} // This method marks the registers used for a given register number. @@ -116,7 +116,7 @@ void colorIGNode(IGNode *Node, const std::vector &IsColorUsedArr) const; - // according to Sparc 64 ABI, all %fp regs are volatile + // according to SparcV9 64 ABI, all %fp regs are volatile inline bool isRegVolatile(int Reg) const { return true; } enum { @@ -153,14 +153,14 @@ // allocated for the three names. //----------------------------------------------------------------------------- -struct SparcIntCCRegClass : public TargetRegClassInfo { - SparcIntCCRegClass(unsigned ID) +struct SparcV9IntCCRegClass : public TargetRegClassInfo { + SparcV9IntCCRegClass(unsigned ID) : TargetRegClassInfo(ID, 1, 3) { } void colorIGNode(IGNode *Node, const std::vector &IsColorUsedArr) const; - // according to Sparc 64 ABI, %ccr is volatile + // according to SparcV9 64 ABI, %ccr is volatile // inline bool isRegVolatile(int Reg) const { return true; } @@ -177,14 +177,14 @@ // Only 4 Float CC registers are available for allocation. //----------------------------------------------------------------------------- -struct SparcFloatCCRegClass : public TargetRegClassInfo { - SparcFloatCCRegClass(unsigned ID) +struct SparcV9FloatCCRegClass : public TargetRegClassInfo { + SparcV9FloatCCRegClass(unsigned ID) : TargetRegClassInfo(ID, 4, 5) { } void colorIGNode(IGNode *Node, const std::vector &IsColorUsedArr) const; - // according to Sparc 64 ABI, all %fp CC regs are volatile + // according to SparcV9 64 ABI, all %fp CC regs are volatile // inline bool isRegVolatile(int Reg) const { return true; } @@ -196,17 +196,17 @@ }; //----------------------------------------------------------------------------- -// Sparc special register class. These registers are not used for allocation +// SparcV9 special register class. These registers are not used for allocation // but are used as arguments of some instructions. //----------------------------------------------------------------------------- -struct SparcSpecialRegClass : public TargetRegClassInfo { - SparcSpecialRegClass(unsigned ID) +struct SparcV9SpecialRegClass : public TargetRegClassInfo { + SparcV9SpecialRegClass(unsigned ID) : TargetRegClassInfo(ID, 0, 1) { } void colorIGNode(IGNode *Node, const std::vector &IsColorUsedArr) const { - assert(0 && "SparcSpecialRegClass should never be used for allocation"); + assert(0 && "SparcV9SpecialRegClass should never be used for allocation"); } // all currently included special regs are volatile Index: llvm/lib/Target/SparcV9/SparcV9RegInfo.cpp diff -u llvm/lib/Target/SparcV9/SparcV9RegInfo.cpp:1.119 llvm/lib/Target/SparcV9/SparcV9RegInfo.cpp:1.120 --- llvm/lib/Target/SparcV9/SparcV9RegInfo.cpp:1.119 Sun Feb 22 13:23:26 2004 +++ llvm/lib/Target/SparcV9/SparcV9RegInfo.cpp Wed Feb 25 12:44:15 2004 @@ -1,4 +1,4 @@ -//===-- SparcRegInfo.cpp - Sparc Target Register Information --------------===// +//===-- SparcV9RegInfo.cpp - SparcV9 Target Register Information --------------===// // // The LLVM Compiler Infrastructure // @@ -7,7 +7,7 @@ // //===----------------------------------------------------------------------===// // -// This file contains implementation of Sparc specific helper methods +// This file contains implementation of SparcV9 specific helper methods // used for register allocation. // //===----------------------------------------------------------------------===// @@ -24,10 +24,10 @@ #include "llvm/Function.h" #include "llvm/iTerminators.h" #include "llvm/iOther.h" -#include "SparcInternals.h" -#include "SparcRegClassInfo.h" -#include "SparcRegInfo.h" -#include "SparcTargetMachine.h" +#include "SparcV9Internals.h" +#include "SparcV9RegClassInfo.h" +#include "SparcV9RegInfo.h" +#include "SparcV9TargetMachine.h" namespace llvm { @@ -35,16 +35,16 @@ BadRegClass = ~0 }; -SparcRegInfo::SparcRegInfo(const SparcTargetMachine &tgt) +SparcV9RegInfo::SparcV9RegInfo(const SparcV9TargetMachine &tgt) : TargetRegInfo(tgt), NumOfIntArgRegs(6), NumOfFloatArgRegs(32) { - MachineRegClassArr.push_back(new SparcIntRegClass(IntRegClassID)); - MachineRegClassArr.push_back(new SparcFloatRegClass(FloatRegClassID)); - MachineRegClassArr.push_back(new SparcIntCCRegClass(IntCCRegClassID)); - MachineRegClassArr.push_back(new SparcFloatCCRegClass(FloatCCRegClassID)); - MachineRegClassArr.push_back(new SparcSpecialRegClass(SpecialRegClassID)); + MachineRegClassArr.push_back(new SparcV9IntRegClass(IntRegClassID)); + MachineRegClassArr.push_back(new SparcV9FloatRegClass(FloatRegClassID)); + MachineRegClassArr.push_back(new SparcV9IntCCRegClass(IntCCRegClassID)); + MachineRegClassArr.push_back(new SparcV9FloatCCRegClass(FloatCCRegClassID)); + MachineRegClassArr.push_back(new SparcV9SpecialRegClass(SpecialRegClassID)); - assert(SparcFloatRegClass::StartOfNonVolatileRegs == 32 && + assert(SparcV9FloatRegClass::StartOfNonVolatileRegs == 32 && "32 Float regs are used for float arg passing"); } @@ -52,31 +52,31 @@ // getZeroRegNum - returns the register that contains always zero. // this is the unified register number // -unsigned SparcRegInfo::getZeroRegNum() const { - return getUnifiedRegNum(SparcRegInfo::IntRegClassID, - SparcIntRegClass::g0); +unsigned SparcV9RegInfo::getZeroRegNum() const { + return getUnifiedRegNum(SparcV9RegInfo::IntRegClassID, + SparcV9IntRegClass::g0); } // getCallAddressReg - returns the reg used for pushing the address when a // method is called. This can be used for other purposes between calls // -unsigned SparcRegInfo::getCallAddressReg() const { - return getUnifiedRegNum(SparcRegInfo::IntRegClassID, - SparcIntRegClass::o7); +unsigned SparcV9RegInfo::getCallAddressReg() const { + return getUnifiedRegNum(SparcV9RegInfo::IntRegClassID, + SparcV9IntRegClass::o7); } // Returns the register containing the return address. // It should be made sure that this register contains the return // value when a return instruction is reached. // -unsigned SparcRegInfo::getReturnAddressReg() const { - return getUnifiedRegNum(SparcRegInfo::IntRegClassID, - SparcIntRegClass::i7); +unsigned SparcV9RegInfo::getReturnAddressReg() const { + return getUnifiedRegNum(SparcV9RegInfo::IntRegClassID, + SparcV9IntRegClass::i7); } // Register get name implementations... -// Int register names in same order as enum in class SparcIntRegClass +// Int register names in same order as enum in class SparcV9IntRegClass static const char * const IntRegNames[] = { "o0", "o1", "o2", "o3", "o4", "o5", "o7", "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7", @@ -86,7 +86,7 @@ "o6" }; -const char * const SparcIntRegClass::getRegName(unsigned reg) const { +const char * const SparcV9IntRegClass::getRegName(unsigned reg) const { assert(reg < NumOfAllRegs); return IntRegNames[reg]; } @@ -101,7 +101,7 @@ "f60", "f61", "f62", "f63" }; -const char * const SparcFloatRegClass::getRegName(unsigned reg) const { +const char * const SparcV9FloatRegClass::getRegName(unsigned reg) const { assert (reg < NumOfAllRegs); return FloatRegNames[reg]; } @@ -111,7 +111,7 @@ "xcc", "icc", "ccr" }; -const char * const SparcIntCCRegClass::getRegName(unsigned reg) const { +const char * const SparcV9IntCCRegClass::getRegName(unsigned reg) const { assert(reg < 3); return IntCCRegNames[reg]; } @@ -120,7 +120,7 @@ "fcc0", "fcc1", "fcc2", "fcc3" }; -const char * const SparcFloatCCRegClass::getRegName(unsigned reg) const { +const char * const SparcV9FloatCCRegClass::getRegName(unsigned reg) const { assert (reg < 5); return FloatCCRegNames[reg]; } @@ -129,21 +129,21 @@ "fsr" }; -const char * const SparcSpecialRegClass::getRegName(unsigned reg) const { +const char * const SparcV9SpecialRegClass::getRegName(unsigned reg) const { assert (reg < 1); return SpecialRegNames[reg]; } // Get unified reg number for frame pointer -unsigned SparcRegInfo::getFramePointer() const { - return getUnifiedRegNum(SparcRegInfo::IntRegClassID, - SparcIntRegClass::i6); +unsigned SparcV9RegInfo::getFramePointer() const { + return getUnifiedRegNum(SparcV9RegInfo::IntRegClassID, + SparcV9IntRegClass::i6); } // Get unified reg number for stack pointer -unsigned SparcRegInfo::getStackPointer() const { - return getUnifiedRegNum(SparcRegInfo::IntRegClassID, - SparcIntRegClass::o6); +unsigned SparcV9RegInfo::getStackPointer() const { + return getUnifiedRegNum(SparcV9RegInfo::IntRegClassID, + SparcV9IntRegClass::o6); } @@ -175,14 +175,14 @@ // regClassId is set to the register class ID. // int -SparcRegInfo::regNumForIntArg(bool inCallee, bool isVarArgsCall, +SparcV9RegInfo::regNumForIntArg(bool inCallee, bool isVarArgsCall, unsigned argNo, unsigned& regClassId) const { regClassId = IntRegClassID; if (argNo >= NumOfIntArgRegs) return getInvalidRegNum(); else - return argNo + (inCallee? SparcIntRegClass::i0 : SparcIntRegClass::o0); + return argNo + (inCallee? SparcV9IntRegClass::i0 : SparcV9IntRegClass::o0); } // Get the register number for the specified FP argument #argNo, @@ -194,7 +194,7 @@ // regClassId is set to the register class ID. // int -SparcRegInfo::regNumForFPArg(unsigned regType, +SparcV9RegInfo::regNumForFPArg(unsigned regType, bool inCallee, bool isVarArgsCall, unsigned argNo, unsigned& regClassId) const { @@ -205,10 +205,10 @@ regClassId = FloatRegClassID; if (regType == FPSingleRegType) return (argNo*2+1 >= NumOfFloatArgRegs)? - getInvalidRegNum() : SparcFloatRegClass::f0 + (argNo * 2 + 1); + getInvalidRegNum() : SparcV9FloatRegClass::f0 + (argNo * 2 + 1); else if (regType == FPDoubleRegType) return (argNo*2 >= NumOfFloatArgRegs)? - getInvalidRegNum() : SparcFloatRegClass::f0 + (argNo * 2); + getInvalidRegNum() : SparcV9FloatRegClass::f0 + (argNo * 2); else assert(0 && "Illegal FP register type"); return 0; @@ -220,10 +220,10 @@ // Finds the return address of a call sparc specific call instruction //--------------------------------------------------------------------------- -// The following 4 methods are used to find the RegType (SparcInternals.h) +// The following 4 methods are used to find the RegType (SparcV9Internals.h) // of a LiveRange, a Value, and for a given register unified reg number. // -int SparcRegInfo::getRegTypeForClassAndType(unsigned regClassID, +int SparcV9RegInfo::getRegTypeForClassAndType(unsigned regClassID, const Type* type) const { switch (regClassID) { @@ -239,17 +239,17 @@ } } -int SparcRegInfo::getRegTypeForDataType(const Type* type) const +int SparcV9RegInfo::getRegTypeForDataType(const Type* type) const { return getRegTypeForClassAndType(getRegClassIDOfType(type), type); } -int SparcRegInfo::getRegTypeForLR(const LiveRange *LR) const +int SparcV9RegInfo::getRegTypeForLR(const LiveRange *LR) const { return getRegTypeForClassAndType(LR->getRegClassID(), LR->getType()); } -int SparcRegInfo::getRegType(int unifiedRegNum) const +int SparcV9RegInfo::getRegType(int unifiedRegNum) const { if (unifiedRegNum < 32) return IntRegType; @@ -269,7 +269,7 @@ // To find the register class used for a specified Type // -unsigned SparcRegInfo::getRegClassIDOfType(const Type *type, +unsigned SparcV9RegInfo::getRegClassIDOfType(const Type *type, bool isCCReg) const { Type::PrimitiveID ty = type->getPrimitiveID(); unsigned res; @@ -292,7 +292,7 @@ return res; } -unsigned SparcRegInfo::getRegClassIDOfRegType(int regType) const { +unsigned SparcV9RegInfo::getRegClassIDOfRegType(int regType) const { switch(regType) { case IntRegType: return IntRegClassID; case FPSingleRegType: @@ -309,14 +309,14 @@ // Suggests a register for the ret address in the RET machine instruction. // We always suggest %i7 by convention. //--------------------------------------------------------------------------- -void SparcRegInfo::suggestReg4RetAddr(MachineInstr *RetMI, +void SparcV9RegInfo::suggestReg4RetAddr(MachineInstr *RetMI, LiveRangeInfo& LRI) const { assert(target.getInstrInfo().isReturn(RetMI->getOpcode())); // return address is always mapped to i7 so set it immediately RetMI->SetRegForOperand(0, getUnifiedRegNum(IntRegClassID, - SparcIntRegClass::i7)); + SparcV9IntRegClass::i7)); // Possible Optimization: // Instead of setting the color, we can suggest one. In that case, @@ -329,16 +329,16 @@ // assert( RetAddrVal && "LR for ret address must be created at start"); // LiveRange * RetAddrLR = LRI.getLiveRangeForValue( RetAddrVal); // RetAddrLR->setSuggestedColor(getUnifiedRegNum( IntRegClassID, - // SparcIntRegOrdr::i7) ); + // SparcV9IntRegOrdr::i7) ); } //--------------------------------------------------------------------------- // Suggests a register for the ret address in the JMPL/CALL machine instr. -// Sparc ABI dictates that %o7 be used for this purpose. +// SparcV9 ABI dictates that %o7 be used for this purpose. //--------------------------------------------------------------------------- void -SparcRegInfo::suggestReg4CallAddr(MachineInstr * CallMI, +SparcV9RegInfo::suggestReg4CallAddr(MachineInstr * CallMI, LiveRangeInfo& LRI) const { CallArgsDescriptor* argDesc = CallArgsDescriptor::get(CallMI); @@ -350,19 +350,19 @@ assert(RetAddrLR && "INTERNAL ERROR: No LR for return address of call!"); unsigned RegClassID = RetAddrLR->getRegClassID(); - RetAddrLR->setColor(getUnifiedRegNum(IntRegClassID, SparcIntRegClass::o7)); + RetAddrLR->setColor(getUnifiedRegNum(IntRegClassID, SparcV9IntRegClass::o7)); } //--------------------------------------------------------------------------- // This method will suggest colors to incoming args to a method. -// According to the Sparc ABI, the first 6 incoming args are in +// According to the SparcV9 ABI, the first 6 incoming args are in // %i0 - %i5 (if they are integer) OR in %f0 - %f31 (if they are float). // If the arg is passed on stack due to the lack of regs, NOTHING will be // done - it will be colored (or spilled) as a normal live range. //--------------------------------------------------------------------------- -void SparcRegInfo::suggestRegs4MethodArgs(const Function *Meth, +void SparcV9RegInfo::suggestRegs4MethodArgs(const Function *Meth, LiveRangeInfo& LRI) const { // Check if this is a varArgs function. needed for choosing regs. @@ -395,7 +395,7 @@ // the correct hardware registers if they did not receive the correct // (suggested) color through graph coloring. //--------------------------------------------------------------------------- -void SparcRegInfo::colorMethodArgs(const Function *Meth, +void SparcV9RegInfo::colorMethodArgs(const Function *Meth, LiveRangeInfo &LRI, std::vector& InstrnsBefore, std::vector& InstrnsAfter) const { @@ -568,7 +568,7 @@ // This method is called before graph coloring to suggest colors to the // outgoing call args and the return value of the call. //--------------------------------------------------------------------------- -void SparcRegInfo::suggestRegs4CallArgs(MachineInstr *CallMI, +void SparcV9RegInfo::suggestRegs4CallArgs(MachineInstr *CallMI, LiveRangeInfo& LRI) const { assert ( (target.getInstrInfo()).isCall(CallMI->getOpcode()) ); @@ -588,9 +588,9 @@ // now suggest a register depending on the register class of ret arg if( RegClassID == IntRegClassID ) - RetValLR->setSuggestedColor(SparcIntRegClass::o0); + RetValLR->setSuggestedColor(SparcV9IntRegClass::o0); else if (RegClassID == FloatRegClassID ) - RetValLR->setSuggestedColor(SparcFloatRegClass::f0 ); + RetValLR->setSuggestedColor(SparcV9FloatRegClass::f0 ); else assert( 0 && "Unknown reg class for return value of call\n"); } @@ -636,7 +636,7 @@ // this method is called for an LLVM return instruction to identify which // values will be returned from this method and to suggest colors. //--------------------------------------------------------------------------- -void SparcRegInfo::suggestReg4RetValue(MachineInstr *RetMI, +void SparcV9RegInfo::suggestReg4RetValue(MachineInstr *RetMI, LiveRangeInfo& LRI) const { assert( (target.getInstrInfo()).isReturn( RetMI->getOpcode() ) ); @@ -650,8 +650,8 @@ if (const Value *RetVal = retI->getReturnValue()) if (LiveRange *const LR = LRI.getLiveRangeForValue(RetVal)) LR->setSuggestedColor(LR->getRegClassID() == IntRegClassID - ? (unsigned) SparcIntRegClass::i0 - : (unsigned) SparcFloatRegClass::f0); + ? (unsigned) SparcV9IntRegClass::i0 + : (unsigned) SparcV9FloatRegClass::f0); } //--------------------------------------------------------------------------- @@ -664,7 +664,7 @@ //--------------------------------------------------------------------------- bool -SparcRegInfo::regTypeNeedsScratchReg(int RegType, +SparcV9RegInfo::regTypeNeedsScratchReg(int RegType, int& scratchRegType) const { if (RegType == IntCCRegType) @@ -681,7 +681,7 @@ //--------------------------------------------------------------------------- void -SparcRegInfo::cpReg2RegMI(std::vector& mvec, +SparcV9RegInfo::cpReg2RegMI(std::vector& mvec, unsigned SrcReg, unsigned DestReg, int RegType) const { @@ -697,8 +697,8 @@ if (getRegType(DestReg) == IntRegType) { // copy intCC reg to int reg MI = (BuildMI(V9::RDCCR, 2) - .addMReg(getUnifiedRegNum(SparcRegInfo::IntCCRegClassID, - SparcIntCCRegClass::ccr)) + .addMReg(getUnifiedRegNum(SparcV9RegInfo::IntCCRegClassID, + SparcV9IntCCRegClass::ccr)) .addMReg(DestReg,MachineOperand::Def)); } else { // copy int reg to intCC reg @@ -706,9 +706,9 @@ && "Can only copy CC reg to/from integer reg"); MI = (BuildMI(V9::WRCCRr, 3) .addMReg(SrcReg) - .addMReg(SparcIntRegClass::g0) - .addMReg(getUnifiedRegNum(SparcRegInfo::IntCCRegClassID, - SparcIntCCRegClass::ccr), + .addMReg(SparcV9IntRegClass::g0) + .addMReg(getUnifiedRegNum(SparcV9RegInfo::IntCCRegClassID, + SparcV9IntCCRegClass::ccr), MachineOperand::Def)); } break; @@ -748,7 +748,7 @@ void -SparcRegInfo::cpReg2MemMI(std::vector& mvec, +SparcV9RegInfo::cpReg2MemMI(std::vector& mvec, unsigned SrcReg, unsigned PtrReg, int Offset, int RegType, @@ -768,8 +768,8 @@ OffReg = PRA.getUnusedUniRegAtMI(RC, RegType, MInst, LVSetBef); #else // Default to using register g4 for holding large offsets - OffReg = getUnifiedRegNum(SparcRegInfo::IntRegClassID, - SparcIntRegClass::g4); + OffReg = getUnifiedRegNum(SparcV9RegInfo::IntRegClassID, + SparcV9IntRegClass::g4); #endif assert(OffReg >= 0 && "FIXME: cpReg2MemMI cannot find an unused reg."); mvec.push_back(BuildMI(V9::SETSW, 2).addZImm(Offset).addReg(OffReg)); @@ -801,8 +801,8 @@ assert(scratchReg >= 0 && "Need scratch reg to store %ccr to memory"); assert(getRegType(scratchReg) ==IntRegType && "Invalid scratch reg"); MI = (BuildMI(V9::RDCCR, 2) - .addMReg(getUnifiedRegNum(SparcRegInfo::IntCCRegClassID, - SparcIntCCRegClass::ccr)) + .addMReg(getUnifiedRegNum(SparcV9RegInfo::IntCCRegClassID, + SparcV9IntCCRegClass::ccr)) .addMReg(scratchReg, MachineOperand::Def)); mvec.push_back(MI); @@ -810,8 +810,8 @@ return; case FloatCCRegType: { - unsigned fsrReg = getUnifiedRegNum(SparcRegInfo::SpecialRegClassID, - SparcSpecialRegClass::fsr); + unsigned fsrReg = getUnifiedRegNum(SparcV9RegInfo::SpecialRegClassID, + SparcV9SpecialRegClass::fsr); if (target.getInstrInfo().constantFitsInImmedField(V9::STXFSRi, Offset)) MI=BuildMI(V9::STXFSRi,3).addMReg(fsrReg).addMReg(PtrReg).addSImm(Offset); else @@ -832,7 +832,7 @@ void -SparcRegInfo::cpMem2RegMI(std::vector& mvec, +SparcV9RegInfo::cpMem2RegMI(std::vector& mvec, unsigned PtrReg, int Offset, unsigned DestReg, @@ -853,8 +853,8 @@ OffReg = PRA.getUnusedUniRegAtMI(RC, RegType, MInst, LVSetBef); #else // Default to using register g4 for holding large offsets - OffReg = getUnifiedRegNum(SparcRegInfo::IntRegClassID, - SparcIntRegClass::g4); + OffReg = getUnifiedRegNum(SparcV9RegInfo::IntRegClassID, + SparcV9IntRegClass::g4); #endif assert(OffReg >= 0 && "FIXME: cpReg2MemMI cannot find an unused reg."); mvec.push_back(BuildMI(V9::SETSW, 2).addZImm(Offset).addReg(OffReg)); @@ -894,14 +894,14 @@ cpMem2RegMI(mvec, PtrReg, Offset, scratchReg, IntRegType); MI = (BuildMI(V9::WRCCRr, 3) .addMReg(scratchReg) - .addMReg(SparcIntRegClass::g0) - .addMReg(getUnifiedRegNum(SparcRegInfo::IntCCRegClassID, - SparcIntCCRegClass::ccr), MachineOperand::Def)); + .addMReg(SparcV9IntRegClass::g0) + .addMReg(getUnifiedRegNum(SparcV9RegInfo::IntCCRegClassID, + SparcV9IntCCRegClass::ccr), MachineOperand::Def)); break; case FloatCCRegType: { - unsigned fsrRegNum = getUnifiedRegNum(SparcRegInfo::SpecialRegClassID, - SparcSpecialRegClass::fsr); + unsigned fsrRegNum = getUnifiedRegNum(SparcV9RegInfo::SpecialRegClassID, + SparcV9SpecialRegClass::fsr); if (target.getInstrInfo().constantFitsInImmedField(V9::LDXFSRi, Offset)) MI = BuildMI(V9::LDXFSRi, 3).addMReg(PtrReg).addSImm(Offset) .addMReg(fsrRegNum, MachineOperand::UseAndDef); @@ -924,7 +924,7 @@ void -SparcRegInfo::cpValue2Value(Value *Src, Value *Dest, +SparcV9RegInfo::cpValue2Value(Value *Src, Value *Dest, std::vector& mvec) const { int RegType = getRegTypeForDataType(Src->getType()); MachineInstr * MI = NULL; @@ -953,7 +953,7 @@ // Print the register assigned to a LR //--------------------------------------------------------------------------- -void SparcRegInfo::printReg(const LiveRange *LR) const { +void SparcV9RegInfo::printReg(const LiveRange *LR) const { unsigned RegClassID = LR->getRegClassID(); std::cerr << " Node "; Index: llvm/lib/Target/SparcV9/SparcV9RegInfo.h diff -u llvm/lib/Target/SparcV9/SparcV9RegInfo.h:1.9 llvm/lib/Target/SparcV9/SparcV9RegInfo.h:1.10 --- llvm/lib/Target/SparcV9/SparcV9RegInfo.h:1.9 Fri Feb 13 15:01:20 2004 +++ llvm/lib/Target/SparcV9/SparcV9RegInfo.h Wed Feb 25 12:44:15 2004 @@ -1,4 +1,4 @@ -//===-- SparcRegInfo.h - Define TargetRegInfo for Sparc ---------*- C++ -*-===// +//===-- SparcV9RegInfo.h - Define TargetRegInfo for SparcV9 ---------*- C++ -*-===// // // The LLVM Compiler Infrastructure // @@ -7,7 +7,7 @@ // //===----------------------------------------------------------------------===// // -// This class implements the virtual class TargetRegInfo for Sparc. +// This class implements the virtual class TargetRegInfo for SparcV9. // //---------------------------------------------------------------------------- @@ -18,9 +18,9 @@ namespace llvm { -class SparcTargetMachine; +class SparcV9TargetMachine; -class SparcRegInfo : public TargetRegInfo { +class SparcV9RegInfo : public TargetRegInfo { private: @@ -34,7 +34,7 @@ // The following methods are used to color special live ranges (e.g. // function args and return values etc.) with specific hardware registers - // as required. See SparcRegInfo.cpp for the implementation. + // as required. See SparcV9RegInfo.cpp for the implementation. // void suggestReg4RetAddr(MachineInstr *RetMI, LiveRangeInfo &LRI) const; @@ -45,7 +45,7 @@ int getRegTypeForClassAndType(unsigned regClassID, const Type* type) const; public: - // Type of registers available in Sparc. There can be several reg types + // Type of registers available in SparcV9. There can be several reg types // in the same class. For instace, the float reg class has Single/Double // types // @@ -58,7 +58,7 @@ SpecialRegType }; - // The actual register classes in the Sparc + // The actual register classes in the SparcV9 // // **** WARNING: If this enum order is changed, also modify // getRegisterClassOfValue method below since it assumes this particular @@ -72,7 +72,7 @@ SpecialRegClassID // Special (unallocated) registers }; - SparcRegInfo(const SparcTargetMachine &tgt); + SparcV9RegInfo(const SparcV9TargetMachine &tgt); // To find the register class used for a specified Type // @@ -115,7 +115,7 @@ // The following methods are used to color special live ranges (e.g. // function args and return values etc.) with specific hardware registers - // as required. See SparcRegInfo.cpp for the implementation for Sparc. + // as required. See SparcV9RegInfo.cpp for the implementation for SparcV9. // void suggestRegs4MethodArgs(const Function *Meth, LiveRangeInfo& LRI) const; @@ -135,7 +135,7 @@ void printReg(const LiveRange *LR) const; // returns the # of bytes of stack space allocated for each register - // type. For Sparc, currently we allocate 8 bytes on stack for all + // type. For SparcV9, currently we allocate 8 bytes on stack for all // register types. We can optimize this later if necessary to save stack // space (However, should make sure that stack alignment is correct) // Index: llvm/lib/Target/SparcV9/SparcV9SchedInfo.cpp diff -u llvm/lib/Target/SparcV9/SparcV9SchedInfo.cpp:1.9 llvm/lib/Target/SparcV9/SparcV9SchedInfo.cpp:1.10 --- llvm/lib/Target/SparcV9/SparcV9SchedInfo.cpp:1.9 Wed Dec 17 16:04:00 2003 +++ llvm/lib/Target/SparcV9/SparcV9SchedInfo.cpp Wed Feb 25 12:44:15 2004 @@ -1,4 +1,4 @@ -//===-- UltraSparcSchedInfo.cpp -------------------------------------------===// +//===-- UltraSparcV9SchedInfo.cpp -------------------------------------------===// // // The LLVM Compiler Infrastructure // @@ -7,11 +7,11 @@ // //===----------------------------------------------------------------------===// // -// Describe the scheduling characteristics of the UltraSparc +// Describe the scheduling characteristics of the UltraSparcV9 // //===----------------------------------------------------------------------===// -#include "SparcInternals.h" +#include "SparcV9Internals.h" using namespace llvm; @@ -129,7 +129,7 @@ //--------------------------------------------------------------------------- -// const InstrClassRUsage SparcRUsageDesc[] +// const InstrClassRUsage SparcV9RUsageDesc[] // // Purpose: // Resource usage information for instruction in each scheduling class. @@ -396,7 +396,7 @@ }; -static const InstrClassRUsage SparcRUsageDesc[] = { +static const InstrClassRUsage SparcV9RUsageDesc[] = { NoneClassRUsage, IEUNClassRUsage, IEU0ClassRUsage, @@ -412,14 +412,14 @@ //--------------------------------------------------------------------------- -// const InstrIssueDelta SparcInstrIssueDeltas[] +// const InstrIssueDelta SparcV9InstrIssueDeltas[] // // Purpose: // Changes to issue restrictions information in InstrClassRUsage for // instructions that differ from other instructions in their class. //--------------------------------------------------------------------------- -static const InstrIssueDelta SparcInstrIssueDeltas[] = { +static const InstrIssueDelta SparcV9InstrIssueDeltas[] = { // opCode, isSingleIssue, breaksGroup, numBubbles @@ -504,14 +504,14 @@ //--------------------------------------------------------------------------- -// const InstrRUsageDelta SparcInstrUsageDeltas[] +// const InstrRUsageDelta SparcV9InstrUsageDeltas[] // // Purpose: // Changes to resource usage information in InstrClassRUsage for // instructions that differ from other instructions in their class. //--------------------------------------------------------------------------- -static const InstrRUsageDelta SparcInstrUsageDeltas[] = { +static const InstrRUsageDelta SparcV9InstrUsageDeltas[] = { // MachineOpCode, Resource, Start cycle, Num cycles @@ -601,7 +601,7 @@ #ifdef EXPLICIT_BUBBLES_NEEDED // // MULScc inserts one bubble. - // This means it breaks the current group (captured in UltraSparcSchedInfo) + // This means it breaks the current group (captured in UltraSparcV9SchedInfo) // *and occupies all issue slots for the next cycle // //{ V9::MULScc, AllIssueSlots.rid, 2, 2-1 }, @@ -728,7 +728,7 @@ //--------------------------------------------------------------------------- -// class SparcSchedInfo +// class SparcV9SchedInfo // // Purpose: // Scheduling information for the UltraSPARC. @@ -737,14 +737,14 @@ //--------------------------------------------------------------------------- /*ctor*/ -SparcSchedInfo::SparcSchedInfo(const TargetMachine& tgt) +SparcV9SchedInfo::SparcV9SchedInfo(const TargetMachine& tgt) : TargetSchedInfo(tgt, (unsigned int) SPARC_NUM_SCHED_CLASSES, - SparcRUsageDesc, - SparcInstrUsageDeltas, - SparcInstrIssueDeltas, - sizeof(SparcInstrUsageDeltas)/sizeof(InstrRUsageDelta), - sizeof(SparcInstrIssueDeltas)/sizeof(InstrIssueDelta)) + SparcV9RUsageDesc, + SparcV9InstrUsageDeltas, + SparcV9InstrIssueDeltas, + sizeof(SparcV9InstrUsageDeltas)/sizeof(InstrRUsageDelta), + sizeof(SparcV9InstrIssueDeltas)/sizeof(InstrIssueDelta)) { maxNumIssueTotal = 4; longestIssueConflict = 0; // computed from issuesGaps[] @@ -764,7 +764,7 @@ } void -SparcSchedInfo::initializeResources() +SparcV9SchedInfo::initializeResources() { // Compute TargetSchedInfo::instrRUsages and TargetSchedInfo::issueGaps TargetSchedInfo::initializeResources(); Index: llvm/lib/Target/SparcV9/SparcV9TargetMachine.cpp diff -u llvm/lib/Target/SparcV9/SparcV9TargetMachine.cpp:1.99 llvm/lib/Target/SparcV9/SparcV9TargetMachine.cpp:1.100 --- llvm/lib/Target/SparcV9/SparcV9TargetMachine.cpp:1.99 Mon Feb 9 17:18:42 2004 +++ llvm/lib/Target/SparcV9/SparcV9TargetMachine.cpp Wed Feb 25 12:44:15 2004 @@ -1,4 +1,4 @@ -//===-- Sparc.cpp - General implementation file for the Sparc Target ------===// +//===-- SparcV9.cpp - General implementation file for the SparcV9 Target ------===// // // The LLVM Compiler Infrastructure // @@ -26,21 +26,21 @@ #include "llvm/Target/TargetMachineImpls.h" #include "llvm/Transforms/Scalar.h" #include "MappingInfo.h" -#include "SparcInternals.h" -#include "SparcTargetMachine.h" +#include "SparcV9Internals.h" +#include "SparcV9TargetMachine.h" #include "Support/CommandLine.h" using namespace llvm; static const unsigned ImplicitRegUseList[] = { 0 }; /* not used yet */ // Build the MachineInstruction Description Array... -const TargetInstrDescriptor llvm::SparcMachineInstrDesc[] = { +const TargetInstrDescriptor llvm::SparcV9MachineInstrDesc[] = { #define I(ENUM, OPCODESTRING, NUMOPERANDS, RESULTPOS, MAXIMM, IMMSE, \ NUMDELAYSLOTS, LATENCY, SCHEDCLASS, INSTFLAGS) \ { OPCODESTRING, NUMOPERANDS, RESULTPOS, MAXIMM, IMMSE, \ NUMDELAYSLOTS, LATENCY, SCHEDCLASS, INSTFLAGS, 0, \ ImplicitRegUseList, ImplicitRegUseList }, -#include "SparcInstr.def" +#include "SparcV9Instr.def" }; //--------------------------------------------------------------------------- @@ -106,13 +106,13 @@ } } -FunctionPass *llvm::createSparcMachineCodeDestructionPass() { +FunctionPass *llvm::createSparcV9MachineCodeDestructionPass() { return new DestroyMachineFunction(); } -SparcTargetMachine::SparcTargetMachine(IntrinsicLowering *il) - : TargetMachine("UltraSparc-Native", il, false), +SparcV9TargetMachine::SparcV9TargetMachine(IntrinsicLowering *il) + : TargetMachine("UltraSparcV9-Native", il, false), schedInfo(*this), regInfo(*this), frameInfo(*this), @@ -124,7 +124,7 @@ /// process for the ultra sparc. /// bool -SparcTargetMachine::addPassesToEmitAssembly(PassManager &PM, std::ostream &Out) +SparcV9TargetMachine::addPassesToEmitAssembly(PassManager &PM, std::ostream &Out) { // The following 3 passes used to be inserted specially by llc. // Replace malloc and free instructions with library calls. @@ -177,7 +177,7 @@ // allowing machine code representations for functions to be free'd after the // function has been emitted. PM.add(createAsmPrinterPass(Out, *this)); - PM.add(createSparcMachineCodeDestructionPass()); // Free mem no longer needed + PM.add(createSparcV9MachineCodeDestructionPass()); // Free mem no longer needed // Emit bytecode to the assembly file into its special section next if (EmitMappingInfo) @@ -187,9 +187,9 @@ } /// addPassesToJITCompile - This method controls the JIT method of code -/// generation for the UltraSparc. +/// generation for the UltraSparcV9. /// -void SparcJITInfo::addPassesToJITCompile(FunctionPassManager &PM) { +void SparcV9JITInfo::addPassesToJITCompile(FunctionPassManager &PM) { const TargetData &TD = TM.getTargetData(); PM.add(new TargetData("lli", TD.isLittleEndian(), TD.getPointerSize(), @@ -229,10 +229,10 @@ PM.add(createPeepholeOptsPass(TM)); } -/// allocateSparcTargetMachine - Allocate and return a subclass of TargetMachine -/// that implements the Sparc backend. (the llvm/CodeGen/Sparc.h interface) +/// allocateSparcV9TargetMachine - Allocate and return a subclass of TargetMachine +/// that implements the SparcV9 backend. (the llvm/CodeGen/SparcV9.h interface) /// -TargetMachine *llvm::allocateSparcTargetMachine(const Module &M, +TargetMachine *llvm::allocateSparcV9TargetMachine(const Module &M, IntrinsicLowering *IL) { - return new SparcTargetMachine(IL); + return new SparcV9TargetMachine(IL); } Index: llvm/lib/Target/SparcV9/SparcV9TargetMachine.h diff -u llvm/lib/Target/SparcV9/SparcV9TargetMachine.h:1.4 llvm/lib/Target/SparcV9/SparcV9TargetMachine.h:1.5 --- llvm/lib/Target/SparcV9/SparcV9TargetMachine.h:1.4 Sun Dec 28 15:23:38 2003 +++ llvm/lib/Target/SparcV9/SparcV9TargetMachine.h Wed Feb 25 12:44:15 2004 @@ -1,4 +1,4 @@ -//===-- SparcTargetMachine.h - Define TargetMachine for Sparc ---*- C++ -*-===// +//===-- SparcV9TargetMachine.h - Define TargetMachine for SparcV9 ---*- C++ -*-===// // // The LLVM Compiler Infrastructure // @@ -16,24 +16,24 @@ #include "llvm/Target/TargetFrameInfo.h" #include "llvm/Target/TargetMachine.h" -#include "SparcInstrInfo.h" -#include "SparcInternals.h" -#include "SparcRegInfo.h" -#include "SparcFrameInfo.h" -#include "SparcJITInfo.h" +#include "SparcV9InstrInfo.h" +#include "SparcV9Internals.h" +#include "SparcV9RegInfo.h" +#include "SparcV9FrameInfo.h" +#include "SparcV9JITInfo.h" namespace llvm { class PassManager; -class SparcTargetMachine : public TargetMachine { - SparcInstrInfo instrInfo; - SparcSchedInfo schedInfo; - SparcRegInfo regInfo; - SparcFrameInfo frameInfo; - SparcCacheInfo cacheInfo; - SparcJITInfo jitInfo; +class SparcV9TargetMachine : public TargetMachine { + SparcV9InstrInfo instrInfo; + SparcV9SchedInfo schedInfo; + SparcV9RegInfo regInfo; + SparcV9FrameInfo frameInfo; + SparcV9CacheInfo cacheInfo; + SparcV9JITInfo jitInfo; public: - SparcTargetMachine(IntrinsicLowering *IL); + SparcV9TargetMachine(IntrinsicLowering *IL); virtual const TargetInstrInfo &getInstrInfo() const { return instrInfo; } virtual const TargetSchedInfo &getSchedInfo() const { return schedInfo; } Index: llvm/lib/Target/SparcV9/SparcV9_F2.td diff -u llvm/lib/Target/SparcV9/SparcV9_F2.td:1.8 llvm/lib/Target/SparcV9/SparcV9_F2.td:1.9 --- llvm/lib/Target/SparcV9/SparcV9_F2.td:1.8 Tue Oct 21 10:17:13 2003 +++ llvm/lib/Target/SparcV9/SparcV9_F2.td Wed Feb 25 12:44:15 2004 @@ -1,4 +1,4 @@ -//===- SparcV9_F2.td - Format 2 instructions: Sparc V9 Target -------------===// +//===- SparcV9_F2.td - Format 2 instructions: SparcV9 V9 Target -------------===// // // The LLVM Compiler Infrastructure // @@ -32,7 +32,7 @@ class F2_2 cond, string name> : F2_br { // Format 2.2 instructions bits<22> disp; - bit annul = 0; // currently unused by Sparc backend + bit annul = 0; // currently unused by SparcV9 backend let Name = name; let Inst{29} = annul; @@ -44,7 +44,7 @@ bits<2> cc; bits<19> disp; bit predict = 1; - bit annul = 0; // currently unused by Sparc backend + bit annul = 0; // currently unused by SparcV9 backend let Name = name; let Inst{29} = annul; @@ -58,7 +58,7 @@ bits<5> rs1; bits<16> disp; bit predict = 1; - bit annul = 0; // currently unused by Sparc backend + bit annul = 0; // currently unused by SparcV9 backend let Name = name; let Inst{29} = annul; Index: llvm/lib/Target/SparcV9/SparcV9_F3.td diff -u llvm/lib/Target/SparcV9/SparcV9_F3.td:1.17 llvm/lib/Target/SparcV9/SparcV9_F3.td:1.18 --- llvm/lib/Target/SparcV9/SparcV9_F3.td:1.17 Tue Oct 21 10:17:13 2003 +++ llvm/lib/Target/SparcV9/SparcV9_F3.td Wed Feb 25 12:44:15 2004 @@ -1,4 +1,4 @@ -//===- SparcV9_F3.td - Format 3 Instructions: Sparc V9 Target -------------===// +//===- SparcV9_F3.td - Format 3 Instructions: SparcV9 V9 Target -------------===// // // The LLVM Compiler Infrastructure // Index: llvm/lib/Target/SparcV9/SparcV9_F4.td diff -u llvm/lib/Target/SparcV9/SparcV9_F4.td:1.10 llvm/lib/Target/SparcV9/SparcV9_F4.td:1.11 --- llvm/lib/Target/SparcV9/SparcV9_F4.td:1.10 Tue Oct 21 10:17:13 2003 +++ llvm/lib/Target/SparcV9/SparcV9_F4.td Wed Feb 25 12:44:15 2004 @@ -1,4 +1,4 @@ -//===- SparcV9_F4.td - Format 4 instructions: Sparc V9 Target -------------===// +//===- SparcV9_F4.td - Format 4 instructions: SparcV9 V9 Target -------------===// // // The LLVM Compiler Infrastructure // Index: llvm/lib/Target/SparcV9/SparcV9_Reg.td diff -u llvm/lib/Target/SparcV9/SparcV9_Reg.td:1.7 llvm/lib/Target/SparcV9/SparcV9_Reg.td:1.8 --- llvm/lib/Target/SparcV9/SparcV9_Reg.td:1.7 Sat Nov 8 12:12:24 2003 +++ llvm/lib/Target/SparcV9/SparcV9_Reg.td Wed Feb 25 12:44:15 2004 @@ -1,4 +1,4 @@ -//===- SparcV9_Reg.td - Sparc V9 Register definitions ---------------------===// +//===- SparcV9_Reg.td - SparcV9 V9 Register definitions ---------------------===// // // The LLVM Compiler Infrastructure // @@ -8,7 +8,7 @@ //===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===// -// Declarations that describe the Sparc register file +// Declarations that describe the SparcV9 register file //===----------------------------------------------------------------------===// // Ri - One of the 32 64 bit integer registers From gaeke at cs.uiuc.edu Wed Feb 25 12:45:35 2004 From: gaeke at cs.uiuc.edu (Brian Gaeke) Date: Wed Feb 25 12:45:35 2004 Subject: [llvm-commits] CVS: llvm/lib/Target/SparcV9/InstrSelection/InstrSelectionSupport.cpp Makefile Message-ID: <200402251844.MAA32248@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/SparcV9/InstrSelection: InstrSelectionSupport.cpp updated: 1.63 -> 1.64 Makefile updated: 1.4 -> 1.5 --- Log message: Great renaming: Sparc --> SparcV9 --- Diffs of the changes: (+2 -2) Index: llvm/lib/Target/SparcV9/InstrSelection/InstrSelectionSupport.cpp diff -u llvm/lib/Target/SparcV9/InstrSelection/InstrSelectionSupport.cpp:1.63 llvm/lib/Target/SparcV9/InstrSelection/InstrSelectionSupport.cpp:1.64 --- llvm/lib/Target/SparcV9/InstrSelection/InstrSelectionSupport.cpp:1.63 Fri Feb 13 15:01:19 2004 +++ llvm/lib/Target/SparcV9/InstrSelection/InstrSelectionSupport.cpp Wed Feb 25 12:44:15 2004 @@ -23,7 +23,7 @@ #include "llvm/Constants.h" #include "llvm/BasicBlock.h" #include "llvm/DerivedTypes.h" -#include "../SparcInstrSelectionSupport.h" +#include "../SparcV9InstrSelectionSupport.h" namespace llvm { Index: llvm/lib/Target/SparcV9/InstrSelection/Makefile diff -u llvm/lib/Target/SparcV9/InstrSelection/Makefile:1.4 llvm/lib/Target/SparcV9/InstrSelection/Makefile:1.5 --- llvm/lib/Target/SparcV9/InstrSelection/Makefile:1.4 Fri Jan 9 00:22:34 2004 +++ llvm/lib/Target/SparcV9/InstrSelection/Makefile Wed Feb 25 12:44:15 2004 @@ -9,6 +9,6 @@ LEVEL = ../../../.. DIRS = -LIBRARYNAME = select +LIBRARYNAME = sparcv9select include $(LEVEL)/Makefile.common From gaeke at cs.uiuc.edu Wed Feb 25 12:46:08 2004 From: gaeke at cs.uiuc.edu (Brian Gaeke) Date: Wed Feb 25 12:46:08 2004 Subject: [llvm-commits] CVS: llvm/lib/Target/SparcV9/RegAlloc/Makefile Message-ID: <200402251844.MAA32264@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/SparcV9/RegAlloc: Makefile updated: 1.4 -> 1.5 --- Log message: Great renaming: Sparc --> SparcV9 --- Diffs of the changes: (+1 -1) Index: llvm/lib/Target/SparcV9/RegAlloc/Makefile diff -u llvm/lib/Target/SparcV9/RegAlloc/Makefile:1.4 llvm/lib/Target/SparcV9/RegAlloc/Makefile:1.5 --- llvm/lib/Target/SparcV9/RegAlloc/Makefile:1.4 Fri Jan 9 00:16:12 2004 +++ llvm/lib/Target/SparcV9/RegAlloc/Makefile Wed Feb 25 12:44:15 2004 @@ -10,7 +10,7 @@ DIRS = -LIBRARYNAME = regalloc +LIBRARYNAME = sparcv9regalloc BUILD_ARCHIVE = 1 From gaeke at cs.uiuc.edu Wed Feb 25 12:46:39 2004 From: gaeke at cs.uiuc.edu (Brian Gaeke) Date: Wed Feb 25 12:46:39 2004 Subject: [llvm-commits] CVS: llvm/lib/Target/SparcV9/LiveVar/BBLiveVar.cpp Makefile Message-ID: <200402251844.MAA32262@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/SparcV9/LiveVar: BBLiveVar.cpp updated: 1.45 -> 1.46 Makefile updated: 1.4 -> 1.5 --- Log message: Great renaming: Sparc --> SparcV9 --- Diffs of the changes: (+2 -2) Index: llvm/lib/Target/SparcV9/LiveVar/BBLiveVar.cpp diff -u llvm/lib/Target/SparcV9/LiveVar/BBLiveVar.cpp:1.45 llvm/lib/Target/SparcV9/LiveVar/BBLiveVar.cpp:1.46 --- llvm/lib/Target/SparcV9/LiveVar/BBLiveVar.cpp:1.45 Tue Feb 24 13:45:45 2004 +++ llvm/lib/Target/SparcV9/LiveVar/BBLiveVar.cpp Wed Feb 25 12:44:15 2004 @@ -17,7 +17,7 @@ #include "llvm/CodeGen/MachineBasicBlock.h" #include "llvm/Support/CFG.h" #include "Support/SetOperations.h" -#include "../SparcInternals.h" +#include "../SparcV9Internals.h" namespace llvm { Index: llvm/lib/Target/SparcV9/LiveVar/Makefile diff -u llvm/lib/Target/SparcV9/LiveVar/Makefile:1.4 llvm/lib/Target/SparcV9/LiveVar/Makefile:1.5 --- llvm/lib/Target/SparcV9/LiveVar/Makefile:1.4 Fri Jan 9 12:15:24 2004 +++ llvm/lib/Target/SparcV9/LiveVar/Makefile Wed Feb 25 12:44:15 2004 @@ -8,7 +8,7 @@ ##===----------------------------------------------------------------------===## LEVEL = ../../../.. -LIBRARYNAME = livevar +LIBRARYNAME = sparcv9livevar include $(LEVEL)/Makefile.common From gaeke at cs.uiuc.edu Wed Feb 25 13:09:07 2004 From: gaeke at cs.uiuc.edu (Brian Gaeke) Date: Wed Feb 25 13:09:07 2004 Subject: [llvm-commits] CVS: llvm/tools/llc/Makefile llc.cpp Message-ID: <200402251908.NAA23845@zion.cs.uiuc.edu> Changes in directory llvm/tools/llc: Makefile updated: 1.47 -> 1.48 llc.cpp updated: 1.92 -> 1.93 --- Log message: Great renaming part II: Sparc --> SparcV9 (also includes command-line options and Makefiles) --- Diffs of the changes: (+10 -10) Index: llvm/tools/llc/Makefile diff -u llvm/tools/llc/Makefile:1.47 llvm/tools/llc/Makefile:1.48 --- llvm/tools/llc/Makefile:1.47 Fri Feb 13 17:19:09 2004 +++ llvm/tools/llc/Makefile Wed Feb 25 13:08:11 2004 @@ -9,16 +9,16 @@ LEVEL = ../.. TOOLNAME = llc USEDLIBS = cwriter \ - sparc \ + sparcv9 \ x86 \ powerpc \ selectiondag \ - regalloc \ + sparcv9regalloc \ sched \ - select \ + sparcv9select \ codegen \ target.a \ - livevar \ + sparcv9livevar \ ipa.a \ transforms.a \ scalaropts.a \ Index: llvm/tools/llc/llc.cpp diff -u llvm/tools/llc/llc.cpp:1.92 llvm/tools/llc/llc.cpp:1.93 --- llvm/tools/llc/llc.cpp:1.92 Thu Feb 19 14:32:38 2004 +++ llvm/tools/llc/llc.cpp Wed Feb 25 13:08:11 2004 @@ -37,12 +37,12 @@ static cl::opt Force("f", cl::desc("Overwrite output files")); -enum ArchName { noarch, X86, Sparc, PowerPC, CBackend }; +enum ArchName { noarch, X86, SparcV9, PowerPC, CBackend }; static cl::opt Arch("march", cl::desc("Architecture to generate assembly for:"), cl::Prefix, cl::values(clEnumValN(X86, "x86", " IA-32 (Pentium and above)"), - clEnumValN(Sparc, "sparc", " SPARC V9"), + clEnumValN(SparcV9, "sparcv9", " SPARC V9"), clEnumValN(PowerPC, "powerpc", " PowerPC"), clEnumValN(CBackend, "c", " C backend"), 0), @@ -90,8 +90,8 @@ case X86: TargetMachineAllocator = allocateX86TargetMachine; break; - case Sparc: - TargetMachineAllocator = allocateSparcTargetMachine; + case SparcV9: + TargetMachineAllocator = allocateSparcV9TargetMachine; break; case PowerPC: TargetMachineAllocator = allocatePowerPCTargetMachine; @@ -109,14 +109,14 @@ TargetMachineAllocator = allocatePowerPCTargetMachine; } else if (mod.getEndianness() == Module::BigEndian && mod.getPointerSize() == Module::Pointer64) { - TargetMachineAllocator = allocateSparcTargetMachine; + TargetMachineAllocator = allocateSparcV9TargetMachine; } else { // If the module is target independent, favor a target which matches the // current build system. #if defined(i386) || defined(__i386__) || defined(__x86__) TargetMachineAllocator = allocateX86TargetMachine; #elif defined(sparc) || defined(__sparc__) || defined(__sparcv9) - TargetMachineAllocator = allocateSparcTargetMachine; + TargetMachineAllocator = allocateSparcV9TargetMachine; #elif defined(__POWERPC__) || defined(__ppc__) || defined(__APPLE__) TargetMachineAllocator = allocatePowerPCTargetMachine; #else From gaeke at cs.uiuc.edu Wed Feb 25 13:09:42 2004 From: gaeke at cs.uiuc.edu (Brian Gaeke) Date: Wed Feb 25 13:09:42 2004 Subject: [llvm-commits] CVS: llvm/tools/llvm-db/Makefile Message-ID: <200402251908.NAA23858@zion.cs.uiuc.edu> Changes in directory llvm/tools/llvm-db: Makefile updated: 1.1 -> 1.2 --- Log message: Great renaming part II: Sparc --> SparcV9 (also includes command-line options and Makefiles) --- Diffs of the changes: (+4 -4) Index: llvm/tools/llvm-db/Makefile diff -u llvm/tools/llvm-db/Makefile:1.1 llvm/tools/llvm-db/Makefile:1.2 --- llvm/tools/llvm-db/Makefile:1.1 Sun Jan 4 23:27:31 2004 +++ llvm/tools/llvm-db/Makefile Wed Feb 25 13:08:12 2004 @@ -41,10 +41,10 @@ # What the Sparc JIT requires ifdef ENABLE_SPARC_JIT CPPFLAGS += -DENABLE_SPARC_JIT - JITLIBS += sparc - ARCHLIBS += sched livevar instrument.a profpaths \ - bcwriter transforms.a ipo.a ipa.a datastructure.a regalloc \ - select + JITLIBS += sparcv9 + ARCHLIBS += sched sparcv9livevar instrument.a profpaths \ + bcwriter transforms.a ipo.a ipa.a datastructure.a \ + sparcv9regalloc sparcv9select endif USEDLIBS = lli-interpreter $(JITLIBS) $(ARCHLIBS) scalaropts analysis.a \ From gaeke at cs.uiuc.edu Wed Feb 25 13:10:15 2004 From: gaeke at cs.uiuc.edu (Brian Gaeke) Date: Wed Feb 25 13:10:15 2004 Subject: [llvm-commits] CVS: llvm/include/llvm/Target/TargetMachineImpls.h Message-ID: <200402251908.NAA23784@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/Target: TargetMachineImpls.h updated: 1.10 -> 1.11 --- Log message: Great renaming part II: Sparc --> SparcV9 (also includes command-line options and Makefiles) --- Diffs of the changes: (+2 -2) Index: llvm/include/llvm/Target/TargetMachineImpls.h diff -u llvm/include/llvm/Target/TargetMachineImpls.h:1.10 llvm/include/llvm/Target/TargetMachineImpls.h:1.11 --- llvm/include/llvm/Target/TargetMachineImpls.h:1.10 Fri Feb 13 17:36:03 2004 +++ llvm/include/llvm/Target/TargetMachineImpls.h Wed Feb 25 13:08:11 2004 @@ -29,12 +29,12 @@ TargetMachine *allocateCTargetMachine(const Module &M, IntrinsicLowering *IL = 0); - // allocateSparcTargetMachine - Allocate and return a subclass of + // allocateSparcV9TargetMachine - Allocate and return a subclass of // TargetMachine that implements the Sparc backend. This takes ownership of // the IntrinsicLowering pointer, deleting it when the target machine is // destroyed. // - TargetMachine *allocateSparcTargetMachine(const Module &M, + TargetMachine *allocateSparcV9TargetMachine(const Module &M, IntrinsicLowering *IL = 0); // allocateX86TargetMachine - Allocate and return a subclass of TargetMachine From gaeke at cs.uiuc.edu Wed Feb 25 13:10:50 2004 From: gaeke at cs.uiuc.edu (Brian Gaeke) Date: Wed Feb 25 13:10:50 2004 Subject: [llvm-commits] CVS: llvm/lib/ExecutionEngine/JIT/TargetSelect.cpp Message-ID: <200402251908.NAA23808@zion.cs.uiuc.edu> Changes in directory llvm/lib/ExecutionEngine/JIT: TargetSelect.cpp updated: 1.2 -> 1.3 --- Log message: Great renaming part II: Sparc --> SparcV9 (also includes command-line options and Makefiles) --- Diffs of the changes: (+5 -5) Index: llvm/lib/ExecutionEngine/JIT/TargetSelect.cpp diff -u llvm/lib/ExecutionEngine/JIT/TargetSelect.cpp:1.2 llvm/lib/ExecutionEngine/JIT/TargetSelect.cpp:1.3 --- llvm/lib/ExecutionEngine/JIT/TargetSelect.cpp:1.2 Sun Dec 28 03:44:37 2003 +++ llvm/lib/ExecutionEngine/JIT/TargetSelect.cpp Wed Feb 25 13:08:11 2004 @@ -28,7 +28,7 @@ #endif namespace { - enum ArchName { x86, Sparc }; + enum ArchName { x86, SparcV9 }; #ifndef NO_JITS_ENABLED cl::opt @@ -38,13 +38,13 @@ clEnumVal(x86, " IA-32 (Pentium and above)"), #endif #ifdef ENABLE_SPARC_JIT - clEnumValN(Sparc, "sparc", " Sparc-V9"), + clEnumValN(Sparc, "sparcv9", " Sparc-V9"), #endif 0), #if defined(ENABLE_X86_JIT) cl::init(x86) #elif defined(ENABLE_SPARC_JIT) - cl::init(Sparc) + cl::init(SparcV9) #endif ); #endif /* NO_JITS_ENABLED */ @@ -69,8 +69,8 @@ break; #endif #ifdef ENABLE_SPARC_JIT - case Sparc: - TargetMachineAllocator = allocateSparcTargetMachine; + case SparcV9: + TargetMachineAllocator = allocateSparcV9TargetMachine; break; #endif default: From gaeke at cs.uiuc.edu Wed Feb 25 13:11:25 2004 From: gaeke at cs.uiuc.edu (Brian Gaeke) Date: Wed Feb 25 13:11:25 2004 Subject: [llvm-commits] CVS: llvm/tools/lli/Makefile Message-ID: <200402251908.NAA23851@zion.cs.uiuc.edu> Changes in directory llvm/tools/lli: Makefile updated: 1.41 -> 1.42 --- Log message: Great renaming part II: Sparc --> SparcV9 (also includes command-line options and Makefiles) --- Diffs of the changes: (+4 -4) Index: llvm/tools/lli/Makefile diff -u llvm/tools/lli/Makefile:1.41 llvm/tools/lli/Makefile:1.42 --- llvm/tools/lli/Makefile:1.41 Mon Oct 20 17:27:26 2003 +++ llvm/tools/lli/Makefile Wed Feb 25 13:08:11 2004 @@ -40,10 +40,10 @@ # What the Sparc JIT requires ifdef ENABLE_SPARC_JIT CPPFLAGS += -DENABLE_SPARC_JIT - JITLIBS += sparc - ARCHLIBS += sched livevar instrument.a profpaths \ - bcwriter transforms.a ipo.a ipa.a datastructure.a regalloc \ - select + JITLIBS += sparcv9 + ARCHLIBS += sched sparcv9livevar instrument.a profpaths \ + bcwriter transforms.a ipo.a ipa.a datastructure.a \ + sparcv9regalloc sparcv9select endif USEDLIBS = lli-interpreter $(JITLIBS) $(ARCHLIBS) scalaropts analysis.a \ From gaeke at cs.uiuc.edu Wed Feb 25 13:12:00 2004 From: gaeke at cs.uiuc.edu (Brian Gaeke) Date: Wed Feb 25 13:12:00 2004 Subject: [llvm-commits] CVS: llvm/lib/Target/SparcV9/SparcV9StackSlots.cpp Message-ID: <200402251908.NAA23835@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/SparcV9: SparcV9StackSlots.cpp updated: 1.9 -> 1.10 --- Log message: Great renaming part II: Sparc --> SparcV9 (also includes command-line options and Makefiles) --- Diffs of the changes: (+1 -1) Index: llvm/lib/Target/SparcV9/SparcV9StackSlots.cpp diff -u llvm/lib/Target/SparcV9/SparcV9StackSlots.cpp:1.9 llvm/lib/Target/SparcV9/SparcV9StackSlots.cpp:1.10 --- llvm/lib/Target/SparcV9/SparcV9StackSlots.cpp:1.9 Tue Nov 11 16:41:33 2003 +++ llvm/lib/Target/SparcV9/SparcV9StackSlots.cpp Wed Feb 25 13:08:11 2004 @@ -13,7 +13,7 @@ // //===----------------------------------------------------------------------===// -#include "SparcInternals.h" +#include "SparcV9Internals.h" #include "llvm/Constant.h" #include "llvm/DerivedTypes.h" #include "llvm/Function.h" From gaeke at cs.uiuc.edu Wed Feb 25 13:12:34 2004 From: gaeke at cs.uiuc.edu (Brian Gaeke) Date: Wed Feb 25 13:12:34 2004 Subject: [llvm-commits] CVS: llvm/lib/Target/Makefile Message-ID: <200402251908.NAA23819@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target: Makefile updated: 1.11 -> 1.12 --- Log message: Great renaming part II: Sparc --> SparcV9 (also includes command-line options and Makefiles) --- Diffs of the changes: (+1 -1) Index: llvm/lib/Target/Makefile diff -u llvm/lib/Target/Makefile:1.11 llvm/lib/Target/Makefile:1.12 --- llvm/lib/Target/Makefile:1.11 Fri Feb 13 17:29:20 2004 +++ llvm/lib/Target/Makefile Wed Feb 25 13:08:11 2004 @@ -7,7 +7,7 @@ # ##===----------------------------------------------------------------------===## LEVEL = ../.. -DIRS = CBackend X86 Sparc PowerPC +DIRS = CBackend X86 SparcV9 PowerPC LIBRARYNAME = target BUILD_ARCHIVE = 1 From brukman at cs.uiuc.edu Wed Feb 25 13:20:01 2004 From: brukman at cs.uiuc.edu (Misha Brukman) Date: Wed Feb 25 13:20:01 2004 Subject: [llvm-commits] CVS: llvm/lib/Target/Sparc/RegAlloc/AllocInfo.h IGNode.cpp IGNode.h InterferenceGraph.cpp InterferenceGraph.h LiveRange.h LiveRangeInfo.cpp LiveRangeInfo.h Makefile PhyRegAlloc.cpp PhyRegAlloc.h RegAllocCommon.h RegClass.cpp RegClass.h Message-ID: <200402251919.NAA26649@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/Sparc/RegAlloc: AllocInfo.h (r1.6) removed IGNode.cpp (r1.12) removed IGNode.h (r1.20) removed InterferenceGraph.cpp (r1.19) removed InterferenceGraph.h (r1.7) removed LiveRange.h (r1.25) removed LiveRangeInfo.cpp (r1.51) removed LiveRangeInfo.h (r1.23) removed Makefile (r1.4) removed PhyRegAlloc.cpp (r1.138) removed PhyRegAlloc.h (r1.62) removed RegAllocCommon.h (r1.12) removed RegClass.cpp (r1.28) removed RegClass.h (r1.21) removed --- Log message: Great Sparc renaming part III: Sparc --> SparcV9. --- Diffs of the changes: (+0 -0) From brukman at cs.uiuc.edu Wed Feb 25 13:20:33 2004 From: brukman at cs.uiuc.edu (Misha Brukman) Date: Wed Feb 25 13:20:33 2004 Subject: [llvm-commits] CVS: llvm/lib/Target/Sparc/LiveVar/BBLiveVar.cpp BBLiveVar.h FunctionLiveVarInfo.cpp FunctionLiveVarInfo.h Makefile ValueSet.cpp Message-ID: <200402251919.NAA26644@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/Sparc/LiveVar: BBLiveVar.cpp (r1.45) removed BBLiveVar.h (r1.26) removed FunctionLiveVarInfo.cpp (r1.54) removed FunctionLiveVarInfo.h (r1.1) removed Makefile (r1.4) removed ValueSet.cpp (r1.16) removed --- Log message: Great Sparc renaming part III: Sparc --> SparcV9. --- Diffs of the changes: (+0 -0) From brukman at cs.uiuc.edu Wed Feb 25 13:21:05 2004 From: brukman at cs.uiuc.edu (Misha Brukman) Date: Wed Feb 25 13:21:05 2004 Subject: [llvm-commits] CVS: llvm/lib/Target/Sparc/InstrSelection/InstrForest.cpp InstrSelection.cpp InstrSelectionSupport.cpp Makefile Message-ID: <200402251919.NAA26558@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/Sparc/InstrSelection: InstrForest.cpp (r1.50) removed InstrSelection.cpp (r1.69) removed InstrSelectionSupport.cpp (r1.63) removed Makefile (r1.4) removed --- Log message: Great Sparc renaming part III: Sparc --> SparcV9. --- Diffs of the changes: (+0 -0) From brukman at cs.uiuc.edu Wed Feb 25 13:21:38 2004 From: brukman at cs.uiuc.edu (Misha Brukman) Date: Wed Feb 25 13:21:38 2004 Subject: [llvm-commits] CVS: llvm/lib/Target/Sparc/.cvsignore EmitAssembly.cpp EmitBytecodeToAssembly.cpp Makefile MappingInfo.cpp MappingInfo.h PeepholeOpts.cpp PreSelection.cpp PrologEpilogCodeInserter.cpp Sparc.burg.in SparcFrameInfo.cpp SparcFrameInfo.h SparcInstr.def SparcInstrInfo.cpp SparcInstrInfo.h SparcInstrSelection.cpp SparcInstrSelectionSupport.h SparcInternals.h SparcJITInfo.h SparcRegClassInfo.cpp SparcRegClassInfo.h SparcRegInfo.cpp SparcRegInfo.h SparcTargetMachine.cpp SparcTargetMachine.h SparcV9.td SparcV9CodeEmitter.cpp SparcV9CodeEmitter.h SparcV9_F2.td SparcV9_F3.td SparcV9_F4.td SparcV9_Reg.td StackSlots.cpp UltraSparcSchedInfo.cpp Message-ID: <200402251919.NAA26364@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/Sparc: .cvsignore (r1.2) removed EmitAssembly.cpp (r1.107) removed EmitBytecodeToAssembly.cpp (r1.12) removed Makefile (r1.40) removed MappingInfo.cpp (r1.16) removed MappingInfo.h (r1.6) removed PeepholeOpts.cpp (r1.21) removed PreSelection.cpp (r1.27) removed PrologEpilogCodeInserter.cpp (r1.35) removed Sparc.burg.in (r1.11) removed SparcFrameInfo.cpp (r1.1) removed SparcFrameInfo.h (r1.1) removed SparcInstr.def (r1.23) removed SparcInstrInfo.cpp (r1.59) removed SparcInstrInfo.h (r1.2) removed SparcInstrSelection.cpp (r1.133) removed SparcInstrSelectionSupport.h (r1.13) removed SparcInternals.h (r1.110) removed SparcJITInfo.h (r1.3) removed SparcRegClassInfo.cpp (r1.34) removed SparcRegClassInfo.h (r1.23) removed SparcRegInfo.cpp (r1.119) removed SparcRegInfo.h (r1.9) removed SparcTargetMachine.cpp (r1.99) removed SparcTargetMachine.h (r1.4) removed SparcV9.td (r1.29) removed SparcV9CodeEmitter.cpp (r1.57) removed SparcV9CodeEmitter.h (r1.17) removed SparcV9_F2.td (r1.8) removed SparcV9_F3.td (r1.17) removed SparcV9_F4.td (r1.10) removed SparcV9_Reg.td (r1.7) removed StackSlots.cpp (r1.9) removed UltraSparcSchedInfo.cpp (r1.9) removed --- Log message: Great Sparc renaming part III: Sparc --> SparcV9. --- Diffs of the changes: (+0 -0) From brukman at cs.uiuc.edu Wed Feb 25 13:23:00 2004 From: brukman at cs.uiuc.edu (Misha Brukman) Date: Wed Feb 25 13:23:00 2004 Subject: [llvm-commits] CVS: llvm/lib/Target/SparcV8/ Message-ID: <200402251920.NAA27219@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/SparcV8: --- Log message: Directory /home/vadve/shared/PublicCVS/llvm/lib/Target/SparcV8 added to the repository --- Diffs of the changes: (+0 -0) From gaeke at cs.uiuc.edu Wed Feb 25 13:29:02 2004 From: gaeke at cs.uiuc.edu (Brian Gaeke) Date: Wed Feb 25 13:29:02 2004 Subject: [llvm-commits] CVS: llvm/lib/Target/SparcV8/Makefile README.txt SparcV8.h SparcV8.td SparcV8CodeEmitter.cpp SparcV8InstrInfo.cpp SparcV8InstrInfo.h SparcV8Instrs.td SparcV8JITInfo.h SparcV8Reg.td SparcV8RegisterInfo.cpp SparcV8RegisterInfo.h SparcV8TargetMachine.cpp SparcV8TargetMachine.h Message-ID: <200402251928.NAA30661@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/SparcV8: Makefile added (r1.1) README.txt added (r1.1) SparcV8.h added (r1.1) SparcV8.td added (r1.1) SparcV8CodeEmitter.cpp added (r1.1) SparcV8InstrInfo.cpp added (r1.1) SparcV8InstrInfo.h added (r1.1) SparcV8Instrs.td added (r1.1) SparcV8JITInfo.h added (r1.1) SparcV8Reg.td added (r1.1) SparcV8RegisterInfo.cpp added (r1.1) SparcV8RegisterInfo.h added (r1.1) SparcV8TargetMachine.cpp added (r1.1) SparcV8TargetMachine.h added (r1.1) --- Log message: SparcV8 skeleton --- Diffs of the changes: (+736 -0) Index: llvm/lib/Target/SparcV8/Makefile diff -c /dev/null llvm/lib/Target/SparcV8/Makefile:1.1 *** /dev/null Wed Feb 25 13:28:29 2004 --- llvm/lib/Target/SparcV8/Makefile Wed Feb 25 13:28:19 2004 *************** *** 0 **** --- 1,55 ---- + ##===- lib/Target/SparcV8/Makefile -------------------------*- Makefile -*-===## + # + # The LLVM Compiler Infrastructure + # + # This file was developed by the LLVM research group and is distributed under + # the University of Illinois Open Source License. See LICENSE.TXT for details. + # + ##===----------------------------------------------------------------------===## + LEVEL = ../../.. + LIBRARYNAME = sparcv8 + include $(LEVEL)/Makefile.common + + # Make sure that tblgen is run, first thing. + $(SourceDepend): SparcV8GenRegisterInfo.h.inc SparcV8GenRegisterNames.inc \ + SparcV8GenRegisterInfo.inc SparcV8GenInstrNames.inc \ + SparcV8GenInstrInfo.inc SparcV8GenInstrSelector.inc + + SparcV8GenRegisterNames.inc:: $(SourceDir)/SparcV8.td \ + $(SourceDir)/SparcV8Reg.td \ + $(SourceDir)/../Target.td $(TBLGEN) + @echo "Building SparcV8.td register names with tblgen" + $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-register-enums -o $@ + + SparcV8GenRegisterInfo.h.inc:: $(SourceDir)/SparcV8.td \ + $(SourceDir)/SparcV8Reg.td \ + $(SourceDir)/../Target.td $(TBLGEN) + @echo "Building SparcV8.td register information header with tblgen" + $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-register-desc-header -o $@ + + SparcV8GenRegisterInfo.inc:: $(SourceDir)/SparcV8.td \ + $(SourceDir)/SparcV8Reg.td \ + $(SourceDir)/../Target.td $(TBLGEN) + @echo "Building SparcV8.td register information implementation with tblgen" + $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-register-desc -o $@ + + SparcV8GenInstrNames.inc:: $(SourceDir)/SparcV8.td \ + $(SourceDir)/SparcV8Instrs.td \ + $(SourceDir)/../Target.td $(TBLGEN) + @echo "Building SparcV8.td instruction names with tblgen" + $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-instr-enums -o $@ + + SparcV8GenInstrInfo.inc:: $(SourceDir)/SparcV8.td \ + $(SourceDir)/SparcV8Instrs.td \ + $(SourceDir)/../Target.td $(TBLGEN) + @echo "Building SparcV8.td instruction information with tblgen" + $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-instr-desc -o $@ + + SparcV8GenInstrSelector.inc:: $(SourceDir)/SparcV8.td \ + $(SourceDir)/SparcV8Instrs.td \ + $(SourceDir)/../Target.td $(TBLGEN) + @echo "Building SparcV8.td instruction selector with tblgen" + $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-instr-selector -o $@ + + clean:: + $(VERB) rm -f *.inc Index: llvm/lib/Target/SparcV8/README.txt diff -c /dev/null llvm/lib/Target/SparcV8/README.txt:1.1 *** /dev/null Wed Feb 25 13:28:29 2004 --- llvm/lib/Target/SparcV8/README.txt Wed Feb 25 13:28:19 2004 *************** *** 0 **** --- 1,9 ---- + + SparcV8 backend skeleton + ------------------------ + + This directory will house a 32-bit SPARC V8 backend employing a expander-based + instruction selector. Watch this space for more news coming soon! + + $Date: 2004/02/25 19:28:19 $ + Index: llvm/lib/Target/SparcV8/SparcV8.h diff -c /dev/null llvm/lib/Target/SparcV8/SparcV8.h:1.1 *** /dev/null Wed Feb 25 13:28:29 2004 --- llvm/lib/Target/SparcV8/SparcV8.h Wed Feb 25 13:28:19 2004 *************** *** 0 **** --- 1,42 ---- + //===-- SparcV8.h - Top-level interface for SparcV8 representation -*- C++ -*-// + // + // The LLVM Compiler Infrastructure + // + // This file was developed by the LLVM research group and is distributed under + // the University of Illinois Open Source License. See LICENSE.TXT for details. + // + //===----------------------------------------------------------------------===// + // + // This file contains the entry points for global functions defined in the LLVM + // SparcV8 back-end. + // + //===----------------------------------------------------------------------===// + + #ifndef TARGET_SPARCV8_H + #define TARGET_SPARCV8_H + + #include + + namespace llvm { + + class FunctionPass; + class TargetMachine; + + // Here is where you would define factory methods for sparcv8-specific + // passes. For example: + // FunctionPass *createSparcV8SimpleInstructionSelector (TargetMachine &TM); + // FunctionPass *createSparcV8CodePrinterPass(std::ostream &OS, + // TargetMachine &TM); + + } // end namespace llvm; + + // Defines symbolic names for SparcV8 registers. This defines a mapping from + // register name to register number. + // + #include "SparcV8GenRegisterNames.inc" + + // Defines symbolic names for the SparcV8 instructions. + // + #include "SparcV8GenInstrNames.inc" + + #endif Index: llvm/lib/Target/SparcV8/SparcV8.td diff -c /dev/null llvm/lib/Target/SparcV8/SparcV8.td:1.1 *** /dev/null Wed Feb 25 13:28:29 2004 --- llvm/lib/Target/SparcV8/SparcV8.td Wed Feb 25 13:28:19 2004 *************** *** 0 **** --- 1,41 ---- + //===- SparcV8.td - Describe the SparcV8 Target Machine ---------*- C++ -*-===// + // + // The LLVM Compiler Infrastructure + // + // This file was developed by the LLVM research group and is distributed under + // the University of Illinois Open Source License. See LICENSE.TXT for details. + // + //===----------------------------------------------------------------------===// + // + // + //===----------------------------------------------------------------------===// + + // Get the target-independent interfaces which we are implementing... + // + include "../Target.td" + + //===----------------------------------------------------------------------===// + // Register File Description + //===----------------------------------------------------------------------===// + + include "SparcV8Reg.td" + include "SparcV8Instrs.td" + + def SparcV8InstrInfo : InstrInfo { + let PHIInst = PHI; + } + + def SparcV8 : Target { + // Pointers are 32-bits in size. + let PointerType = i32; + + // According to the Mach-O Runtime ABI, these regs are nonvolatile across + // calls: + let CalleeSavedRegisters = [R1, R13, R14, R15, R16, R17, R18, R19, + R20, R21, R22, R23, R24, R25, R26, R27, R28, R29, R30, R31, F14, F15, + F16, F17, F18, F19, F20, F21, F22, F23, F24, F25, F26, F27, F28, F29, + F30, F31, CR2, CR3, CR4]; + + // Pull in Instruction Info: + let InstructionSet = SparcV8InstrInfo; + } Index: llvm/lib/Target/SparcV8/SparcV8CodeEmitter.cpp diff -c /dev/null llvm/lib/Target/SparcV8/SparcV8CodeEmitter.cpp:1.1 *** /dev/null Wed Feb 25 13:28:29 2004 --- llvm/lib/Target/SparcV8/SparcV8CodeEmitter.cpp Wed Feb 25 13:28:19 2004 *************** *** 0 **** --- 1,43 ---- + //===-- SparcV8CodeEmitter.cpp - JIT Code Emitter for SparcV8 -----*- C++ -*-=// + // + // The LLVM Compiler Infrastructure + // + // This file was developed by the LLVM research group and is distributed under + // the University of Illinois Open Source License. See LICENSE.TXT for details. + // + //===----------------------------------------------------------------------===// + // + // + //===----------------------------------------------------------------------===// + + #include "SparcV8TargetMachine.h" + + namespace llvm { + + /// addPassesToEmitMachineCode - Add passes to the specified pass manager to get + /// machine code emitted. This uses a MachineCodeEmitter object to handle + /// actually outputting the machine code and resolving things like the address + /// of functions. This method should returns true if machine code emission is + /// not supported. + /// + bool SparcV8TargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM, + MachineCodeEmitter &MCE) { + return true; + // It should go something like this: + // PM.add(new Emitter(MCE)); // Machine code emitter pass for SparcV8 + // Delete machine code for this function after emitting it: + // PM.add(createMachineCodeDeleter()); + } + + void *SparcV8JITInfo::getJITStubForFunction(Function *F, + MachineCodeEmitter &MCE) { + assert (0 && "SparcV8JITInfo::getJITStubForFunction not implemented"); + return 0; + } + + void SparcV8JITInfo::replaceMachineCodeForFunction (void *Old, void *New) { + assert (0 && "SparcV8JITInfo::replaceMachineCodeForFunction not implemented"); + } + + } // end llvm namespace + Index: llvm/lib/Target/SparcV8/SparcV8InstrInfo.cpp diff -c /dev/null llvm/lib/Target/SparcV8/SparcV8InstrInfo.cpp:1.1 *** /dev/null Wed Feb 25 13:28:29 2004 --- llvm/lib/Target/SparcV8/SparcV8InstrInfo.cpp Wed Feb 25 13:28:19 2004 *************** *** 0 **** --- 1,42 ---- + //===- SparcV8InstrInfo.cpp - SparcV8 Instruction Information ---*- C++ -*-===// + // + // The LLVM Compiler Infrastructure + // + // This file was developed by the LLVM research group and is distributed under + // the University of Illinois Open Source License. See LICENSE.TXT for details. + // + //===----------------------------------------------------------------------===// + // + // This file contains the SparcV8 implementation of the TargetInstrInfo class. + // + //===----------------------------------------------------------------------===// + + #include "SparcV8InstrInfo.h" + #include "llvm/CodeGen/MachineInstrBuilder.h" + #include "SparcV8GenInstrInfo.inc" + + namespace llvm { + + SparcV8InstrInfo::SparcV8InstrInfo() + : TargetInstrInfo(SparcV8Insts, + sizeof(SparcV8Insts)/sizeof(SparcV8Insts[0]), 0) { + } + + // createNOPinstr - returns the target's implementation of NOP, which is + // usually a pseudo-instruction, implemented by a degenerate version of + // another instruction. + // + MachineInstr* SparcV8InstrInfo::createNOPinstr() const { + return 0; + } + + /// isNOPinstr - not having a special NOP opcode, we need to know if a given + /// instruction is interpreted as an `official' NOP instr, i.e., there may be + /// more than one way to `do nothing' but only one canonical way to slack off. + // + bool SparcV8InstrInfo::isNOPinstr(const MachineInstr &MI) const { + return false; + } + + } // end namespace llvm + Index: llvm/lib/Target/SparcV8/SparcV8InstrInfo.h diff -c /dev/null llvm/lib/Target/SparcV8/SparcV8InstrInfo.h:1.1 *** /dev/null Wed Feb 25 13:28:29 2004 --- llvm/lib/Target/SparcV8/SparcV8InstrInfo.h Wed Feb 25 13:28:19 2004 *************** *** 0 **** --- 1,48 ---- + //===- SparcV8InstrInfo.h - SparcV8 Instruction Information -----*- C++ -*-===// + // + // The LLVM Compiler Infrastructure + // + // This file was developed by the LLVM research group and is distributed under + // the University of Illinois Open Source License. See LICENSE.TXT for details. + // + //===----------------------------------------------------------------------===// + // + // This file contains the SparcV8 implementation of the TargetInstrInfo class. + // + //===----------------------------------------------------------------------===// + + #ifndef SPARCV8INSTRUCTIONINFO_H + #define SPARCV8INSTRUCTIONINFO_H + + #include "llvm/Target/TargetInstrInfo.h" + #include "SparcV8RegisterInfo.h" + + namespace llvm { + + class SparcV8InstrInfo : public TargetInstrInfo { + const SparcV8RegisterInfo RI; + public: + SparcV8InstrInfo(); + + /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As + /// such, whenever a client has an instance of instruction info, it should + /// always be able to get register info as well (through this method). + /// + virtual const MRegisterInfo &getRegisterInfo() const { return RI; } + + /// createNOPinstr - returns the target's implementation of NOP, which is + /// usually a pseudo-instruction, implemented by a degenerate version of + /// another instruction. + /// + MachineInstr* createNOPinstr() const; + + /// isNOPinstr - not having a special NOP opcode, we need to know if a given + /// instruction is interpreted as an `official' NOP instr, i.e., there may be + /// more than one way to `do nothing' but only one canonical way to slack off. + /// + bool isNOPinstr(const MachineInstr &MI) const; + }; + + } + + #endif Index: llvm/lib/Target/SparcV8/SparcV8Instrs.td diff -c /dev/null llvm/lib/Target/SparcV8/SparcV8Instrs.td:1.1 *** /dev/null Wed Feb 25 13:28:29 2004 --- llvm/lib/Target/SparcV8/SparcV8Instrs.td Wed Feb 25 13:28:19 2004 *************** *** 0 **** --- 1,46 ---- + //===- SparcV8InstrInfo.td - Describe the SparcV8 Instruction Set -*- C++ -*-=// + // + // The LLVM Compiler Infrastructure + // + // This file was developed by the LLVM research group and is distributed under + // the University of Illinois Open Source License. See LICENSE.TXT for details. + // + //===----------------------------------------------------------------------===// + // + // + //===----------------------------------------------------------------------===// + + class Format val> { + bits<4> Value = val; + } + + // All of the SparcV8 instruction formats, plus a pseudo-instruction format: + def Pseudo : Format<0>; + def IForm : Format<1>; + def BForm : Format<2>; + def SCForm : Format<3>; + def DForm : Format<4>; + def XForm : Format<5>; + def XLForm : Format<6>; + def XFXForm : Format<7>; + def XFLForm : Format<8>; + def XOForm : Format<9>; + def AForm : Format<10>; + def MForm : Format<11>; + + class PPCInst opcd, Format f> : Instruction { + let Namespace = "SparcV8"; + + let Name = nm; + bits<6> Opcode = opcd; + Format Form = f; + bits<4> FormBits = Form.Value; + } + + // Pseudo-instructions: + def PHI : PPCInst<"PHI", 0, Pseudo>; // PHI node... + def NOP : PPCInst<"NOP", 0, Pseudo>; // No-op + def ADJCALLSTACKDOWN : PPCInst<"ADJCALLSTACKDOWN", 0, Pseudo>; + def ADJCALLSTACKUP : PPCInst<"ADJCALLSTACKUP", 0, Pseudo>; + + Index: llvm/lib/Target/SparcV8/SparcV8JITInfo.h diff -c /dev/null llvm/lib/Target/SparcV8/SparcV8JITInfo.h:1.1 *** /dev/null Wed Feb 25 13:28:29 2004 --- llvm/lib/Target/SparcV8/SparcV8JITInfo.h Wed Feb 25 13:28:19 2004 *************** *** 0 **** --- 1,49 ---- + //===- SparcV8JITInfo.h - SparcV8 impl. of the JIT interface ----*- C++ -*-===// + // + // The LLVM Compiler Infrastructure + // + // This file was developed by the LLVM research group and is distributed under + // the University of Illinois Open Source License. See LICENSE.TXT for details. + // + //===----------------------------------------------------------------------===// + // + // This file contains the SparcV8 implementation of the TargetJITInfo class. + // + //===----------------------------------------------------------------------===// + + #ifndef SPARCV8JITINFO_H + #define SPARCV8JITINFO_H + + #include "llvm/Target/TargetJITInfo.h" + + namespace llvm { + class TargetMachine; + class IntrinsicLowering; + + class SparcV8JITInfo : public TargetJITInfo { + TargetMachine &TM; + public: + SparcV8JITInfo(TargetMachine &tm) : TM(tm) {} + + /// addPassesToJITCompile - Add passes to the specified pass manager to + /// implement a fast dynamic compiler for this target. Return true if this + /// is not supported for this target. + /// + virtual void addPassesToJITCompile(FunctionPassManager &PM); + + /// replaceMachineCodeForFunction - Make it so that calling the function + /// whose machine code is at OLD turns into a call to NEW, perhaps by + /// overwriting OLD with a branch to NEW. This is used for self-modifying + /// code. + /// + virtual void replaceMachineCodeForFunction(void *Old, void *New); + + /// getJITStubForFunction - Create or return a stub for the specified + /// function. This stub acts just like the specified function, except that + /// it allows the "address" of the function to be taken without having to + /// generate code for it. + virtual void *getJITStubForFunction(Function *F, MachineCodeEmitter &MCE); + }; + } + + #endif Index: llvm/lib/Target/SparcV8/SparcV8Reg.td diff -c /dev/null llvm/lib/Target/SparcV8/SparcV8Reg.td:1.1 *** /dev/null Wed Feb 25 13:28:29 2004 --- llvm/lib/Target/SparcV8/SparcV8Reg.td Wed Feb 25 13:28:19 2004 *************** *** 0 **** --- 1,82 ---- + //===- SparcV8Reg.td - Describe the SparcV8 Register File -------*- C++ -*-===// + // + // The LLVM Compiler Infrastructure + // + // This file was developed by the LLVM research group and is distributed under + // the University of Illinois Open Source License. See LICENSE.TXT for details. + // + //===----------------------------------------------------------------------===// + // + // + //===----------------------------------------------------------------------===// + + class PPCReg : Register { + let Namespace = "SparcV8"; + } + + // We identify all our registers with a 5-bit ID, for consistency's sake. + + // GPR - One of the 32 32-bit general-purpose registers + class GPR num> : PPCReg { + field bits<5> Num = num; + } + + // SPR - One of the 32-bit special-purpose registers + class SPR num> : PPCReg { + field bits<5> Num = num; + } + + // FPR - One of the 32 64-bit floating-point registers + class FPR num> : PPCReg { + field bits<5> Num = num; + } + + // CR - One of the 8 4-bit condition registers + class CR num> : PPCReg { + field bits<5> Num = num; + } + + // General-purpose registers + def R0 : GPR< 0>; def R1 : GPR< 1>; def R2 : GPR< 2>; def R3 : GPR< 3>; + def R4 : GPR< 4>; def R5 : GPR< 5>; def R6 : GPR< 6>; def R7 : GPR< 7>; + def R8 : GPR< 8>; def R9 : GPR< 9>; def R10 : GPR<10>; def R11 : GPR<11>; + def R12 : GPR<12>; def R13 : GPR<13>; def R14 : GPR<14>; def R15 : GPR<15>; + def R16 : GPR<16>; def R17 : GPR<17>; def R18 : GPR<18>; def R19 : GPR<19>; + def R20 : GPR<20>; def R21 : GPR<21>; def R22 : GPR<22>; def R23 : GPR<23>; + def R24 : GPR<24>; def R25 : GPR<25>; def R26 : GPR<26>; def R27 : GPR<27>; + def R28 : GPR<28>; def R29 : GPR<29>; def R30 : GPR<30>; def R31 : GPR<31>; + + // Floating-point registers + def F0 : FPR< 0>; def F1 : FPR< 1>; def F2 : FPR< 2>; def F3 : FPR< 3>; + def F4 : FPR< 4>; def F5 : FPR< 5>; def F6 : FPR< 6>; def F7 : FPR< 7>; + def F8 : FPR< 8>; def F9 : FPR< 9>; def F10 : FPR<10>; def F11 : FPR<11>; + def F12 : FPR<12>; def F13 : FPR<13>; def F14 : FPR<14>; def F15 : FPR<15>; + def F16 : FPR<16>; def F17 : FPR<17>; def F18 : FPR<18>; def F19 : FPR<19>; + def F20 : FPR<20>; def F21 : FPR<21>; def F22 : FPR<22>; def F23 : FPR<23>; + def F24 : FPR<24>; def F25 : FPR<25>; def F26 : FPR<26>; def F27 : FPR<27>; + def F28 : FPR<28>; def F29 : FPR<29>; def F30 : FPR<30>; def F31 : FPR<31>; + + // Condition registers + def CR0 : CR<0>; def CR1 : CR<1>; def CR2 : CR<2>; def CR3 : CR<3>; + def CR4 : CR<4>; def CR5 : CR<5>; def CR6 : CR<6>; def CR7 : CR<7>; + + // Floating-point status and control register + def FPSCR : SPR<0>; + // fiXed-point Exception Register? :-) + def XER : SPR<1>; + // Link register + def LR : SPR<2>; + // Count register + def CTR : SPR<3>; + // These are the "time base" registers which are read-only in user mode. + def TBL : SPR<4>; + def TBU : SPR<5>; + + /// Register classes: one for floats and another for non-floats. + def GPRC : RegisterClass; + def FPRC : RegisterClass; + Index: llvm/lib/Target/SparcV8/SparcV8RegisterInfo.cpp diff -c /dev/null llvm/lib/Target/SparcV8/SparcV8RegisterInfo.cpp:1.1 *** /dev/null Wed Feb 25 13:28:29 2004 --- llvm/lib/Target/SparcV8/SparcV8RegisterInfo.cpp Wed Feb 25 13:28:19 2004 *************** *** 0 **** --- 1,99 ---- + //===- SparcV8RegisterInfo.cpp - SparcV8 Register Information ---*- C++ -*-===// + // + // The LLVM Compiler Infrastructure + // + // This file was developed by the LLVM research group and is distributed under + // the University of Illinois Open Source License. See LICENSE.TXT for details. + // + //===----------------------------------------------------------------------===// + // + // This file contains the SparcV8 implementation of the MRegisterInfo class. + // + //===----------------------------------------------------------------------===// + + #include "SparcV8.h" + #include "SparcV8RegisterInfo.h" + #include "llvm/Type.h" + using namespace llvm; + + SparcV8RegisterInfo::SparcV8RegisterInfo() + : SparcV8GenRegisterInfo(SparcV8::ADJCALLSTACKDOWN, + SparcV8::ADJCALLSTACKUP) {} + + int SparcV8RegisterInfo::storeRegToStackSlot( + MachineBasicBlock &MBB, + MachineBasicBlock::iterator MBBI, + unsigned SrcReg, int FrameIdx, + const TargetRegisterClass *RC) const + { + abort(); + return -1; + } + + int SparcV8RegisterInfo::loadRegFromStackSlot( + MachineBasicBlock &MBB, + MachineBasicBlock::iterator MBBI, + unsigned DestReg, int FrameIdx, + const TargetRegisterClass *RC) const + { + abort(); + return -1; + } + + int SparcV8RegisterInfo::copyRegToReg(MachineBasicBlock &MBB, + MachineBasicBlock::iterator MBBI, + unsigned DestReg, unsigned SrcReg, + const TargetRegisterClass *RC) const { + abort(); + return -1; + } + + void SparcV8RegisterInfo:: + eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, + MachineBasicBlock::iterator I) const { + abort(); + } + + void + SparcV8RegisterInfo::eliminateFrameIndex(MachineFunction &MF, + MachineBasicBlock::iterator II) const { + abort(); + } + + void SparcV8RegisterInfo::processFunctionBeforeFrameFinalized( + MachineFunction &MF) const { + abort(); + } + + void SparcV8RegisterInfo::emitPrologue(MachineFunction &MF) const { + abort(); + } + + void SparcV8RegisterInfo::emitEpilogue(MachineFunction &MF, + MachineBasicBlock &MBB) const { + abort(); + } + + + #include "SparcV8GenRegisterInfo.inc" + + const TargetRegisterClass* + SparcV8RegisterInfo::getRegClassForType(const Type* Ty) const { + switch (Ty->getPrimitiveID()) { + case Type::LongTyID: + case Type::ULongTyID: assert(0 && "Long values can't fit in registers!"); + default: assert(0 && "Invalid type to getClass!"); + case Type::BoolTyID: + case Type::SByteTyID: + case Type::UByteTyID: + case Type::ShortTyID: + case Type::UShortTyID: + case Type::IntTyID: + case Type::UIntTyID: + case Type::PointerTyID: return &GPRCInstance; + + case Type::FloatTyID: + case Type::DoubleTyID: return &FPRCInstance; + } + } + Index: llvm/lib/Target/SparcV8/SparcV8RegisterInfo.h diff -c /dev/null llvm/lib/Target/SparcV8/SparcV8RegisterInfo.h:1.1 *** /dev/null Wed Feb 25 13:28:29 2004 --- llvm/lib/Target/SparcV8/SparcV8RegisterInfo.h Wed Feb 25 13:28:19 2004 *************** *** 0 **** --- 1,58 ---- + //===- SparcV8RegisterInfo.h - SparcV8 Register Information Impl -*- C++ -*-==// + // + // The LLVM Compiler Infrastructure + // + // This file was developed by the LLVM research group and is distributed under + // the University of Illinois Open Source License. See LICENSE.TXT for details. + // + //===----------------------------------------------------------------------===// + // + // This file contains the SparcV8 implementation of the MRegisterInfo class. + // + //===----------------------------------------------------------------------===// + + #ifndef SPARCV8REGISTERINFO_H + #define SPARCV8REGISTERINFO_H + + #include "llvm/Target/MRegisterInfo.h" + #include "SparcV8GenRegisterInfo.h.inc" + + namespace llvm { + + class Type; + + struct SparcV8RegisterInfo : public SparcV8GenRegisterInfo { + SparcV8RegisterInfo(); + const TargetRegisterClass* getRegClassForType(const Type* Ty) const; + + /// Code Generation virtual methods... + int storeRegToStackSlot(MachineBasicBlock &MBB, + MachineBasicBlock::iterator MBBI, + unsigned SrcReg, int FrameIndex, + const TargetRegisterClass *RC) const; + + int loadRegFromStackSlot(MachineBasicBlock &MBB, + MachineBasicBlock::iterator MBBI, + unsigned DestReg, int FrameIndex, + const TargetRegisterClass *RC) const; + + int copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, + unsigned DestReg, unsigned SrcReg, + const TargetRegisterClass *RC) const; + + void eliminateCallFramePseudoInstr(MachineFunction &MF, + MachineBasicBlock &MBB, + MachineBasicBlock::iterator I) const; + + void eliminateFrameIndex(MachineFunction &MF, + MachineBasicBlock::iterator II) const; + + void processFunctionBeforeFrameFinalized(MachineFunction &MF) const; + + void emitPrologue(MachineFunction &MF) const; + void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const; + }; + + } // end namespace llvm + + #endif Index: llvm/lib/Target/SparcV8/SparcV8TargetMachine.cpp diff -c /dev/null llvm/lib/Target/SparcV8/SparcV8TargetMachine.cpp:1.1 *** /dev/null Wed Feb 25 13:28:29 2004 --- llvm/lib/Target/SparcV8/SparcV8TargetMachine.cpp Wed Feb 25 13:28:19 2004 *************** *** 0 **** --- 1,61 ---- + //===-- SparcV8TargetMachine.cpp - Define TargetMachine for SparcV8 -------===// + // + // The LLVM Compiler Infrastructure + // + // This file was developed by the LLVM research group and is distributed under + // the University of Illinois Open Source License. See LICENSE.TXT for details. + // + //===----------------------------------------------------------------------===// + // + // + //===----------------------------------------------------------------------===// + + #include "SparcV8TargetMachine.h" + #include "SparcV8.h" + #include "llvm/Module.h" + #include "llvm/PassManager.h" + #include "llvm/Target/TargetMachineImpls.h" + #include "llvm/CodeGen/MachineFunction.h" + #include "llvm/CodeGen/Passes.h" + + namespace llvm { + + // allocateSparcV8TargetMachine - Allocate and return a subclass of + // TargetMachine that implements the SparcV8 backend. + // + TargetMachine *allocateSparcV8TargetMachine(const Module &M, + IntrinsicLowering *IL) { + return new SparcV8TargetMachine(M, IL); + } + + /// SparcV8TargetMachine ctor - Create an ILP32 architecture model + /// + SparcV8TargetMachine::SparcV8TargetMachine(const Module &M, + IntrinsicLowering *IL) + : TargetMachine("SparcV8", IL, true, 4, 4, 4, 4, 4), + FrameInfo(TargetFrameInfo::StackGrowsDown, 8, 4), JITInfo(*this) { + } + + /// addPassesToEmitAssembly - Add passes to the specified pass manager + /// to implement a static compiler for this target. + /// + bool SparcV8TargetMachine::addPassesToEmitAssembly(PassManager &PM, + std::ostream &Out) { + // + PM.add(createRegisterAllocator()); + PM.add(createPrologEpilogCodeInserter()); + // + PM.add(createMachineCodeDeleter()); + return true; // change to `return false' when this actually works. + } + + /// addPassesToJITCompile - Add passes to the specified pass manager to + /// implement a fast dynamic compiler for this target. + /// + void SparcV8JITInfo::addPassesToJITCompile(FunctionPassManager &PM) { + // + PM.add(createRegisterAllocator()); + PM.add(createPrologEpilogCodeInserter()); + } + + } // end namespace llvm Index: llvm/lib/Target/SparcV8/SparcV8TargetMachine.h diff -c /dev/null llvm/lib/Target/SparcV8/SparcV8TargetMachine.h:1.1 *** /dev/null Wed Feb 25 13:28:29 2004 --- llvm/lib/Target/SparcV8/SparcV8TargetMachine.h Wed Feb 25 13:28:19 2004 *************** *** 0 **** --- 1,61 ---- + //===-- SparcV8TargetMachine.h - Define TargetMachine for SparcV8 -*- C++ -*-=// + // + // The LLVM Compiler Infrastructure + // + // This file was developed by the LLVM research group and is distributed under + // the University of Illinois Open Source License. See LICENSE.TXT for details. + // + //===----------------------------------------------------------------------===// + // + // This file declares the SparcV8 specific subclass of TargetMachine. + // + //===----------------------------------------------------------------------===// + + #ifndef SPARCV8TARGETMACHINE_H + #define SPARCV8TARGETMACHINE_H + + #include "llvm/Target/TargetMachine.h" + #include "llvm/Target/TargetFrameInfo.h" + #include "llvm/PassManager.h" + #include "SparcV8InstrInfo.h" + #include "SparcV8JITInfo.h" + + namespace llvm { + + class IntrinsicLowering; + + class SparcV8TargetMachine : public TargetMachine { + SparcV8InstrInfo InstrInfo; + TargetFrameInfo FrameInfo; + SparcV8JITInfo JITInfo; + public: + SparcV8TargetMachine(const Module &M, IntrinsicLowering *IL); + + virtual const SparcV8InstrInfo &getInstrInfo() const { return InstrInfo; } + virtual const TargetFrameInfo &getFrameInfo() const { return FrameInfo; } + virtual const MRegisterInfo *getRegisterInfo() const { + return &InstrInfo.getRegisterInfo(); + } + virtual TargetJITInfo *getJITInfo() { + return &JITInfo; + } + + virtual const TargetSchedInfo &getSchedInfo() const { abort(); } + virtual const TargetRegInfo &getRegInfo() const { abort(); } + virtual const TargetCacheInfo &getCacheInfo() const { abort(); } + + /// addPassesToEmitMachineCode - Add passes to the specified pass manager to + /// get machine code emitted. This uses a MachineCodeEmitter object to handle + /// actually outputting the machine code and resolving things like the address + /// of functions. This method should returns true if machine code emission is + /// not supported. + /// + virtual bool addPassesToEmitMachineCode(FunctionPassManager &PM, + MachineCodeEmitter &MCE); + + virtual bool addPassesToEmitAssembly(PassManager &PM, std::ostream &Out); + }; + + } // end namespace llvm + + #endif From lattner at cs.uiuc.edu Wed Feb 25 13:31:02 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Wed Feb 25 13:31:02 2004 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86TargetMachine.cpp Message-ID: <200402251930.NAA30720@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: X86TargetMachine.cpp updated: 1.48 -> 1.49 --- Log message: Fix failures in 099.go due to the cfgsimplify pass creating switch instructions where there did not used to be any before --- Diffs of the changes: (+6 -5) Index: llvm/lib/Target/X86/X86TargetMachine.cpp diff -u llvm/lib/Target/X86/X86TargetMachine.cpp:1.48 llvm/lib/Target/X86/X86TargetMachine.cpp:1.49 --- llvm/lib/Target/X86/X86TargetMachine.cpp:1.48 Sat Feb 14 18:03:15 2004 +++ llvm/lib/Target/X86/X86TargetMachine.cpp Wed Feb 25 13:30:19 2004 @@ -59,9 +59,6 @@ // does to emit statically compiled machine code. bool X86TargetMachine::addPassesToEmitAssembly(PassManager &PM, std::ostream &Out) { - // FIXME: Implement the switch instruction in the instruction selector! - PM.add(createLowerSwitchPass()); - // FIXME: Implement the invoke/unwind instructions! PM.add(createLowerInvokePass()); @@ -69,6 +66,9 @@ // unreachable basic blocks. PM.add(createCFGSimplificationPass()); + // FIXME: Implement the switch instruction in the instruction selector! + PM.add(createLowerSwitchPass()); + if (NoPatternISel) PM.add(createX86SimpleInstructionSelector(*this)); else @@ -115,8 +115,6 @@ /// not supported for this target. /// void X86JITInfo::addPassesToJITCompile(FunctionPassManager &PM) { - // FIXME: Implement the switch instruction in the instruction selector! - PM.add(createLowerSwitchPass()); // FIXME: Implement the invoke/unwind instructions! PM.add(createLowerInvokePass()); @@ -124,6 +122,9 @@ // FIXME: The code generator does not properly handle functions with // unreachable basic blocks. PM.add(createCFGSimplificationPass()); + + // FIXME: Implement the switch instruction in the instruction selector! + PM.add(createLowerSwitchPass()); if (NoPatternISel) PM.add(createX86SimpleInstructionSelector(TM)); From lattner at cs.uiuc.edu Wed Feb 25 13:38:00 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Wed Feb 25 13:38:00 2004 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/RegAllocLinearScan.cpp Message-ID: <200402251937.NAA12594@apoc.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen: RegAllocLinearScan.cpp updated: 1.64 -> 1.65 --- Log message: Add an assertion --- Diffs of the changes: (+1 -0) Index: llvm/lib/CodeGen/RegAllocLinearScan.cpp diff -u llvm/lib/CodeGen/RegAllocLinearScan.cpp:1.64 llvm/lib/CodeGen/RegAllocLinearScan.cpp:1.65 --- llvm/lib/CodeGen/RegAllocLinearScan.cpp:1.64 Tue Feb 24 02:58:30 2004 +++ llvm/lib/CodeGen/RegAllocLinearScan.cpp Wed Feb 25 13:37:44 2004 @@ -378,6 +378,7 @@ } DEBUG(std::cerr << "\t\tregister with min weight: " << mri_->getName(minReg) << " (" << minWeight << ")\n"); + assert(minReg != 0 && "Didn't find a register to spill?"); // if the current has the minimum weight, we need to modify it, // push it back in unhandled and let the linear scan algorithm run From gaeke at gally.cs.uiuc.edu Wed Feb 25 14:35:01 2004 From: gaeke at gally.cs.uiuc.edu (Brian Gaeke) Date: Wed Feb 25 14:35:01 2004 Subject: [llvm-commits] CVS: llvm/test/Regression/Assembler/2002-05-02-ParseError.ll Message-ID: <200402252034.i1PKYCW18306@gally.cs.uiuc.edu> Changes in directory llvm/test/Regression/Assembler: 2002-05-02-ParseError.ll updated: 1.3 -> 1.4 --- Log message: Note that this test is currently expected to fail. --- Diffs of the changes: (+1 -0) Index: llvm/test/Regression/Assembler/2002-05-02-ParseError.ll diff -u llvm/test/Regression/Assembler/2002-05-02-ParseError.ll:1.3 llvm/test/Regression/Assembler/2002-05-02-ParseError.ll:1.4 --- llvm/test/Regression/Assembler/2002-05-02-ParseError.ll:1.3 Thu Mar 6 13:59:08 2003 +++ llvm/test/Regression/Assembler/2002-05-02-ParseError.ll Wed Feb 25 14:34:02 2004 @@ -1,5 +1,6 @@ ; This should parse correctly without an 'implementation', but our current YACC ; based parser doesn't have the required 2 token lookahead... +; XFAIL %T = type int * From brukman at cs.uiuc.edu Wed Feb 25 14:53:02 2004 From: brukman at cs.uiuc.edu (Misha Brukman) Date: Wed Feb 25 14:53:02 2004 Subject: [llvm-commits] CVS: llvm/lib/Target/SparcV8/SparcV8Instrs_F2.td SparcV8Instrs_F3.td Message-ID: <200402252052.OAA32696@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/SparcV8: SparcV8Instrs_F2.td added (r1.1) SparcV8Instrs_F3.td added (r1.1) --- Log message: SparcV8 has different types of instructions, but F1 is only used for CALL. --- Diffs of the changes: (+105 -0) Index: llvm/lib/Target/SparcV8/SparcV8Instrs_F2.td diff -c /dev/null llvm/lib/Target/SparcV8/SparcV8Instrs_F2.td:1.1 *** /dev/null Wed Feb 25 14:52:30 2004 --- llvm/lib/Target/SparcV8/SparcV8Instrs_F2.td Wed Feb 25 14:52:20 2004 *************** *** 0 **** --- 1,44 ---- + //===- SparcV8Instrs_F2.td - Format 2 instructions: SparcV8 Target --------===// + // + // The LLVM Compiler Infrastructure + // + // This file was developed by the LLVM research group and is distributed under + // the University of Illinois Open Source License. See LICENSE.TXT for details. + // + //===----------------------------------------------------------------------===// + // + // Format #2 instruction classes in the SparcV8 + // + //===----------------------------------------------------------------------===// + + class F2 : InstV8 { // Format 2 instructions + bits<3> op2; + bits<22> imm22; + let op = 0; // op = 0 + let Inst{24-22} = op2; + let Inst{21-0} = imm22; + } + + // Specific F2 classes: SparcV8 manual, page 44 + // + class F2_1 op2Val, string name> : F2 { + bits<5> rd; + bits<22> imm; + + let op2 = op2Val; + let Name = name; + + let Inst{29-25} = rd; + } + + class F2_2 cond, bits<3> op2Val, string name> : F2 { + bits<4> cond; + bit annul = 0; // currently unused + + let cond = condVal; + let op2 = op2Val; + let Name = name; + + let Inst{29} = annul; + let Inst{28-25} = cond; + } Index: llvm/lib/Target/SparcV8/SparcV8Instrs_F3.td diff -c /dev/null llvm/lib/Target/SparcV8/SparcV8Instrs_F3.td:1.1 *** /dev/null Wed Feb 25 14:52:30 2004 --- llvm/lib/Target/SparcV8/SparcV8Instrs_F3.td Wed Feb 25 14:52:20 2004 *************** *** 0 **** --- 1,61 ---- + //===- SparcV8Instrs_F3.td - Format 3 Instructions: SparcV8 Target --------===// + // + // The LLVM Compiler Infrastructure + // + // This file was developed by the LLVM research group and is distributed under + // the University of Illinois Open Source License. See LICENSE.TXT for details. + // + //===----------------------------------------------------------------------===// + // + // Format #3 instruction classes in the SparcV8 + // + //===----------------------------------------------------------------------===// + + class F3 : InstV8 { + bits<5> rd; + bits<6> op3; + bits<5> rs1; + let op{1} = 1; // Op = 2 or 3 + let Inst{29-25} = rd; + let Inst{24-19} = op3; + let Inst{18-14} = rs1; + } + + // Specific F3 classes: SparcV8 manual, page 44 + // + class F3_1 opVal, bits<6> op3val, string name> : F3 { + bits<8> asi; + bits<5> rs2; + + let op = opVal; + let op3 = op3val; + let Name = name; + + let Inst{13} = 0; // i field = 0 + let Inst{12-5} = asi; // address space identifier + let Inst{4-0} = rs2; + } + + class F3_2 opVal, bits<6> op3val, string name> : F3 { + bits<13> simm13; + + let op = opVal; + let op3 = op3val; + let Name = name; + + let Inst{13} = 1; // i field = 1 + let Inst{12-0} = simm13; + } + + class F3_3 opVal, bits<6> op3val, bits<9> opfVal, string name> + : F3_rs1rs2 { + bits<5> rs2; + + let op = opVal; + let op3 = op3val; + let Name = name; + + let Inst{13-5} = opfVal; + let Inst{4-0} = rs2; + } + From brukman at cs.uiuc.edu Wed Feb 25 15:01:01 2004 From: brukman at cs.uiuc.edu (Misha Brukman) Date: Wed Feb 25 15:01:01 2004 Subject: [llvm-commits] CVS: llvm/lib/Target/SparcV8/SparcV8Reg.td Message-ID: <200402252100.PAA09664@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/SparcV8: SparcV8Reg.td updated: 1.1 -> 1.2 --- Log message: Fix the SparcV8 register definitions that were imported from PPC template. --- Diffs of the changes: (+24 -64) Index: llvm/lib/Target/SparcV8/SparcV8Reg.td diff -u llvm/lib/Target/SparcV8/SparcV8Reg.td:1.1 llvm/lib/Target/SparcV8/SparcV8Reg.td:1.2 --- llvm/lib/Target/SparcV8/SparcV8Reg.td:1.1 Wed Feb 25 13:28:19 2004 +++ llvm/lib/Target/SparcV8/SparcV8Reg.td Wed Feb 25 15:00:05 2004 @@ -7,76 +7,36 @@ // //===----------------------------------------------------------------------===// // +// Declarations that describe the SparcV8 register file // //===----------------------------------------------------------------------===// -class PPCReg : Register { - let Namespace = "SparcV8"; +// Ri - 32-bit integer registers +class Ri num> : Register { + field bits<5> Num = num; // Numbers are identified with a 5 bit ID } -// We identify all our registers with a 5-bit ID, for consistency's sake. +let Namespace = "SparcV8" in { + def G0 : Ri< 0>; def G1 : Ri< 1>; def G2 : Ri< 2>; def G3 : Ri< 3>; + def G4 : Ri< 4>; def G5 : Ri< 5>; def G6 : Ri< 6>; def G7 : Ri< 7>; + def O0 : Ri< 8>; def O1 : Ri< 9>; def O2 : Ri<10>; def O3 : Ri<11>; + def O4 : Ri<12>; def O5 : Ri<13>; def O6 : Ri<14>; def O7 : Ri<15>; + def L0 : Ri<16>; def L1 : Ri<17>; def L2 : Ri<18>; def L3 : Ri<19>; + def L4 : Ri<20>; def L5 : Ri<21>; def L6 : Ri<22>; def L7 : Ri<23>; + def I0 : Ri<24>; def I1 : Ri<25>; def I2 : Ri<26>; def I3 : Ri<27>; + def I4 : Ri<28>; def I5 : Ri<29>; def I6 : Ri<30>; def I7 : Ri<31>; -// GPR - One of the 32 32-bit general-purpose registers -class GPR num> : PPCReg { - field bits<5> Num = num; + // Floating-point registers? + // ... } -// SPR - One of the 32-bit special-purpose registers -class SPR num> : PPCReg { - field bits<5> Num = num; -} - -// FPR - One of the 32 64-bit floating-point registers -class FPR num> : PPCReg { - field bits<5> Num = num; -} - -// CR - One of the 8 4-bit condition registers -class CR num> : PPCReg { - field bits<5> Num = num; -} - -// General-purpose registers -def R0 : GPR< 0>; def R1 : GPR< 1>; def R2 : GPR< 2>; def R3 : GPR< 3>; -def R4 : GPR< 4>; def R5 : GPR< 5>; def R6 : GPR< 6>; def R7 : GPR< 7>; -def R8 : GPR< 8>; def R9 : GPR< 9>; def R10 : GPR<10>; def R11 : GPR<11>; -def R12 : GPR<12>; def R13 : GPR<13>; def R14 : GPR<14>; def R15 : GPR<15>; -def R16 : GPR<16>; def R17 : GPR<17>; def R18 : GPR<18>; def R19 : GPR<19>; -def R20 : GPR<20>; def R21 : GPR<21>; def R22 : GPR<22>; def R23 : GPR<23>; -def R24 : GPR<24>; def R25 : GPR<25>; def R26 : GPR<26>; def R27 : GPR<27>; -def R28 : GPR<28>; def R29 : GPR<29>; def R30 : GPR<30>; def R31 : GPR<31>; - -// Floating-point registers -def F0 : FPR< 0>; def F1 : FPR< 1>; def F2 : FPR< 2>; def F3 : FPR< 3>; -def F4 : FPR< 4>; def F5 : FPR< 5>; def F6 : FPR< 6>; def F7 : FPR< 7>; -def F8 : FPR< 8>; def F9 : FPR< 9>; def F10 : FPR<10>; def F11 : FPR<11>; -def F12 : FPR<12>; def F13 : FPR<13>; def F14 : FPR<14>; def F15 : FPR<15>; -def F16 : FPR<16>; def F17 : FPR<17>; def F18 : FPR<18>; def F19 : FPR<19>; -def F20 : FPR<20>; def F21 : FPR<21>; def F22 : FPR<22>; def F23 : FPR<23>; -def F24 : FPR<24>; def F25 : FPR<25>; def F26 : FPR<26>; def F27 : FPR<27>; -def F28 : FPR<28>; def F29 : FPR<29>; def F30 : FPR<30>; def F31 : FPR<31>; - -// Condition registers -def CR0 : CR<0>; def CR1 : CR<1>; def CR2 : CR<2>; def CR3 : CR<3>; -def CR4 : CR<4>; def CR5 : CR<5>; def CR6 : CR<6>; def CR7 : CR<7>; - -// Floating-point status and control register -def FPSCR : SPR<0>; -// fiXed-point Exception Register? :-) -def XER : SPR<1>; -// Link register -def LR : SPR<2>; -// Count register -def CTR : SPR<3>; -// These are the "time base" registers which are read-only in user mode. -def TBL : SPR<4>; -def TBU : SPR<5>; - -/// Register classes: one for floats and another for non-floats. -def GPRC : RegisterClass; -def FPRC : RegisterClass; +// For fun, specify a register class. +// +// FIXME: the register order should be defined in terms of the preferred +// allocation order... +// +def IntRegs : RegisterClass; From brukman at cs.uiuc.edu Wed Feb 25 15:03:02 2004 From: brukman at cs.uiuc.edu (Misha Brukman) Date: Wed Feb 25 15:03:02 2004 Subject: [llvm-commits] CVS: llvm/lib/Target/SparcV8/SparcV8Instrs.td SparcV8.td Message-ID: <200402252102.PAA15892@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/SparcV8: SparcV8Instrs.td updated: 1.1 -> 1.2 SparcV8.td updated: 1.1 -> 1.2 --- Log message: Clean up the tablegen descriptions for SparcV8. --- Diffs of the changes: (+22 -35) Index: llvm/lib/Target/SparcV8/SparcV8Instrs.td diff -u llvm/lib/Target/SparcV8/SparcV8Instrs.td:1.1 llvm/lib/Target/SparcV8/SparcV8Instrs.td:1.2 --- llvm/lib/Target/SparcV8/SparcV8Instrs.td:1.1 Wed Feb 25 13:28:19 2004 +++ llvm/lib/Target/SparcV8/SparcV8Instrs.td Wed Feb 25 15:02:21 2004 @@ -1,4 +1,4 @@ -//===- SparcV8InstrInfo.td - Describe the SparcV8 Instruction Set -*- C++ -*-=// +//===- SparcV8Instrs.td - Target Description for SparcV8 Target -----------===// // // The LLVM Compiler Infrastructure // @@ -7,40 +7,30 @@ // //===----------------------------------------------------------------------===// // +// This file describes the SparcV8 instructions in TableGen format. // //===----------------------------------------------------------------------===// -class Format val> { - bits<4> Value = val; -} +include "../Target.td" +include "SparcV8Reg.td" -// All of the SparcV8 instruction formats, plus a pseudo-instruction format: -def Pseudo : Format<0>; -def IForm : Format<1>; -def BForm : Format<2>; -def SCForm : Format<3>; -def DForm : Format<4>; -def XForm : Format<5>; -def XLForm : Format<6>; -def XFXForm : Format<7>; -def XFLForm : Format<8>; -def XOForm : Format<9>; -def AForm : Format<10>; -def MForm : Format<11>; - -class PPCInst opcd, Format f> : Instruction { - let Namespace = "SparcV8"; - - let Name = nm; - bits<6> Opcode = opcd; - Format Form = f; - bits<4> FormBits = Form.Value; -} +//===----------------------------------------------------------------------===// +// Instructions +//===----------------------------------------------------------------------===// -// Pseudo-instructions: -def PHI : PPCInst<"PHI", 0, Pseudo>; // PHI node... -def NOP : PPCInst<"NOP", 0, Pseudo>; // No-op -def ADJCALLSTACKDOWN : PPCInst<"ADJCALLSTACKDOWN", 0, Pseudo>; -def ADJCALLSTACKUP : PPCInst<"ADJCALLSTACKUP", 0, Pseudo>; +class InstV8 : Instruction { // SparcV8 instruction baseline + field bits<32> Inst; + + let Namespace = "V8"; + + bits<2> op; + let Inst{31-30} = op; // Top two bits are the 'op' field + + // Bit attributes specific to SparcV8 instructions + bit isPasi = 0; // Does this instruction affect an alternate addr space? + bit isPrivileged = 0; // Is this a privileged instruction? +} +include "SparcV8Instrs_F2.td" +include "SparcV8Instrs_F3.td" Index: llvm/lib/Target/SparcV8/SparcV8.td diff -u llvm/lib/Target/SparcV8/SparcV8.td:1.1 llvm/lib/Target/SparcV8/SparcV8.td:1.2 --- llvm/lib/Target/SparcV8/SparcV8.td:1.1 Wed Feb 25 13:28:19 2004 +++ llvm/lib/Target/SparcV8/SparcV8.td Wed Feb 25 15:02:21 2004 @@ -31,10 +31,7 @@ // According to the Mach-O Runtime ABI, these regs are nonvolatile across // calls: - let CalleeSavedRegisters = [R1, R13, R14, R15, R16, R17, R18, R19, - R20, R21, R22, R23, R24, R25, R26, R27, R28, R29, R30, R31, F14, F15, - F16, F17, F18, F19, F20, F21, F22, F23, F24, F25, F26, F27, F28, F29, - F30, F31, CR2, CR3, CR4]; + let CalleeSavedRegisters = []; // Pull in Instruction Info: let InstructionSet = SparcV8InstrInfo; From brukman at cs.uiuc.edu Wed Feb 25 15:04:01 2004 From: brukman at cs.uiuc.edu (Misha Brukman) Date: Wed Feb 25 15:04:01 2004 Subject: [llvm-commits] CVS: llvm/lib/Target/SparcV8/SparcV8Reg.td Message-ID: <200402252103.PAA18598@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/SparcV8: SparcV8Reg.td updated: 1.2 -> 1.3 --- Log message: SparcV8 regs are really 32-bit, not 64! Thanks, Chris. --- Diffs of the changes: (+1 -1) Index: llvm/lib/Target/SparcV8/SparcV8Reg.td diff -u llvm/lib/Target/SparcV8/SparcV8Reg.td:1.2 llvm/lib/Target/SparcV8/SparcV8Reg.td:1.3 --- llvm/lib/Target/SparcV8/SparcV8Reg.td:1.2 Wed Feb 25 15:00:05 2004 +++ llvm/lib/Target/SparcV8/SparcV8Reg.td Wed Feb 25 15:03:02 2004 @@ -36,7 +36,7 @@ // FIXME: the register order should be defined in terms of the preferred // allocation order... // -def IntRegs : RegisterClass; From lattner at cs.uiuc.edu Wed Feb 25 15:35:01 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Wed Feb 25 15:35:01 2004 Subject: [llvm-commits] CVS: llvm/lib/Transforms/IPO/GlobalConstifier.cpp Message-ID: <200402252134.PAA25170@zion.cs.uiuc.edu> Changes in directory llvm/lib/Transforms/IPO: GlobalConstifier.cpp added (r1.1) --- Log message: My faith in programmers has been found to be totally misplaced. One would assume that if they don't intend to write to a global variable, that they would mark it as constant. However, there are people that don't understand that the compiler can do nice things for them if they give it the information it needs. This pass looks for blatently obvious globals that are only ever read from. Though it uses a trivially simple "alias analysis" of sorts, it is still able to do amazing things to important benchmarks. 253.perlbmk, for example, contains several ***GIANT*** function pointer tables that are not marked constant and should be. Marking them constant allows the optimizer to turn a whole bunch of indirect calls into direct calls. Note that only a link-time optimizer can do this transformation, but perlbmk does have several strings and other minor globals that can be marked constant by this pass when run from GCCAS. 176.gcc has a ton of strings and large tables that are marked constant, both at compile time (38 of them) and at link time (48 more). Other benchmarks give similar results, though it seems like big ones have disproportionally more than small ones. This pass is extremely quick and does good things. I'm going to enable it in gccas & gccld. Not bad for 50 SLOC. --- Diffs of the changes: (+82 -0) Index: llvm/lib/Transforms/IPO/GlobalConstifier.cpp diff -c /dev/null llvm/lib/Transforms/IPO/GlobalConstifier.cpp:1.1 *** /dev/null Wed Feb 25 15:34:46 2004 --- llvm/lib/Transforms/IPO/GlobalConstifier.cpp Wed Feb 25 15:34:36 2004 *************** *** 0 **** --- 1,82 ---- + //===- GlobalConstifier.cpp - Mark read-only globals constant -------------===// + // + // The LLVM Compiler Infrastructure + // + // This file was developed by the LLVM research group and is distributed under + // the University of Illinois Open Source License. See LICENSE.TXT for details. + // + //===----------------------------------------------------------------------===// + // + // This pass loops over the non-constant internal global variables in the + // program. If it can prove that they are never written to, it marks them + // constant. + // + // NOTE: this should eventually use the alias analysis interfaces to do the + // transformation, but for now we just stick with a simple solution. DSA in + // particular could give a much more accurate answer to the mod/ref query, but + // it's not quite ready for this. + // + //===----------------------------------------------------------------------===// + + #include "llvm/Transforms/IPO.h" + #include "llvm/Constants.h" + #include "llvm/iMemory.h" + #include "llvm/Module.h" + #include "llvm/Pass.h" + #include "Support/Debug.h" + #include "Support/Statistic.h" + using namespace llvm; + + namespace { + Statistic<> NumMarked("constify", "Number of globals marked constant"); + + struct Constifier : public Pass { + bool run(Module &M); + }; + + RegisterOpt X("constify", "Global Constifier"); + } + + Pass *llvm::createGlobalConstifierPass() { return new Constifier(); } + + /// isStoredThrough - Return false if the specified pointer is provably never + /// stored through. If we can't tell, we must conservatively assume it might. + /// + static bool isStoredThrough(Value *V) { + for (Value::use_iterator UI = V->use_begin(), E = V->use_end(); UI != E; ++UI) + if (Constant *C = dyn_cast(*UI)) { + if (ConstantExpr *CE = dyn_cast(C)) { + if (isStoredThrough(CE)) + return true; + } else if (ConstantPointerRef *CPR = dyn_cast(C)) { + if (isStoredThrough(CPR)) return true; + } else { + // Must be an element of a constant array or something. + return true; + } + } else if (Instruction *I = dyn_cast(*UI)) { + if (I->getOpcode() == Instruction::GetElementPtr) { + if (isStoredThrough(I)) return true; + } else if (!isa(*UI)) + return true; // Any other non-load instruction might store! + } else { + // Otherwise must be a global or some other user. + return true; + } + + return false; + } + + bool Constifier::run(Module &M) { + bool Changed = false; + for (Module::giterator GV = M.gbegin(), E = M.gend(); GV != E; ++GV) + if (!GV->isConstant() && GV->hasInternalLinkage() && GV->hasInitializer()) { + if (!isStoredThrough(GV)) { + DEBUG(std::cerr << "MARKING CONSTANT: " << *GV << "\n"); + GV->setConstant(true); + ++NumMarked; + Changed = true; + } + } + return Changed; + } From lattner at cs.uiuc.edu Wed Feb 25 15:36:00 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Wed Feb 25 15:36:00 2004 Subject: [llvm-commits] CVS: llvm/tools/gccld/GenerateCode.cpp Message-ID: <200402252135.PAA25231@zion.cs.uiuc.edu> Changes in directory llvm/tools/gccld: GenerateCode.cpp updated: 1.18 -> 1.19 --- Log message: Add a new pass, run internalize first --- Diffs of the changes: (+11 -7) Index: llvm/tools/gccld/GenerateCode.cpp diff -u llvm/tools/gccld/GenerateCode.cpp:1.18 llvm/tools/gccld/GenerateCode.cpp:1.19 --- llvm/tools/gccld/GenerateCode.cpp:1.18 Mon Jan 26 17:51:10 2004 +++ llvm/tools/gccld/GenerateCode.cpp Wed Feb 25 15:35:13 2004 @@ -81,6 +81,17 @@ addPass(Passes, createFunctionResolvingPass()); if (!DisableOptimizations) { + if (Internalize) { + // Now that composite has been compiled, scan through the module, looking + // for a main function. If main is defined, mark all other functions + // internal. + addPass(Passes, createInternalizePass()); + } + + // Now that we internalized some globals, see if we can mark any globals as + // being constant! + addPass(Passes, createGlobalConstifierPass()); + // Linking modules together can lead to duplicated global constants, only // keep one copy of each constant... addPass(Passes, createConstantMergePass()); @@ -90,13 +101,6 @@ // supporting. if (Strip) addPass(Passes, createSymbolStrippingPass()); - - if (Internalize) { - // Now that composite has been compiled, scan through the module, looking - // for a main function. If main is defined, mark all other functions - // internal. - addPass(Passes, createInternalizePass()); - } // Propagate constants at call sites into the functions they call. addPass(Passes, createIPConstantPropagationPass()); From lattner at cs.uiuc.edu Wed Feb 25 15:36:33 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Wed Feb 25 15:36:33 2004 Subject: [llvm-commits] CVS: llvm/tools/gccas/gccas.cpp Message-ID: <200402252135.PAA25222@zion.cs.uiuc.edu> Changes in directory llvm/tools/gccas: gccas.cpp updated: 1.93 -> 1.94 --- Log message: Add a new pass --- Diffs of the changes: (+1 -0) Index: llvm/tools/gccas/gccas.cpp diff -u llvm/tools/gccas/gccas.cpp:1.93 llvm/tools/gccas/gccas.cpp:1.94 --- llvm/tools/gccas/gccas.cpp:1.93 Thu Feb 19 14:32:39 2004 +++ llvm/tools/gccas/gccas.cpp Wed Feb 25 15:35:02 2004 @@ -68,6 +68,7 @@ addPass(PM, createRaiseAllocationsPass()); // call %malloc -> malloc inst addPass(PM, createCFGSimplificationPass()); // Clean up disgusting code addPass(PM, createPromoteMemoryToRegister()); // Kill useless allocas + addPass(PM, createGlobalConstifierPass()); // Mark read-only globals const addPass(PM, createGlobalDCEPass()); // Remove unused globals addPass(PM, createIPConstantPropagationPass());// IP Constant Propagation addPass(PM, createDeadArgEliminationPass()); // Dead argument elimination From lattner at cs.uiuc.edu Wed Feb 25 15:37:05 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Wed Feb 25 15:37:05 2004 Subject: [llvm-commits] CVS: llvm/include/llvm/Transforms/IPO.h Message-ID: <200402252135.PAA25210@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/Transforms: IPO.h updated: 1.26 -> 1.27 --- Log message: Add prototype --- Diffs of the changes: (+7 -0) Index: llvm/include/llvm/Transforms/IPO.h diff -u llvm/include/llvm/Transforms/IPO.h:1.26 llvm/include/llvm/Transforms/IPO.h:1.27 --- llvm/include/llvm/Transforms/IPO.h:1.26 Tue Dec 16 15:55:45 2003 +++ llvm/include/llvm/Transforms/IPO.h Wed Feb 25 15:34:51 2004 @@ -38,6 +38,13 @@ //===----------------------------------------------------------------------===// +// createGlobalConstifierPass - This function returns a new pass that marks +// internal globals "constant" if they are provably never written to. +// +Pass *createGlobalConstifierPass(); + + +//===----------------------------------------------------------------------===// // createRaiseAllocationsPass - Return a new pass that transforms malloc and // free function calls into malloc and free instructions. // From alkis at niobe.cs.uiuc.edu Wed Feb 25 15:56:01 2004 From: alkis at niobe.cs.uiuc.edu (Alkis Evlogimenos) Date: Wed Feb 25 15:56:01 2004 Subject: [llvm-commits] CVS: llvm/include/llvm/Target/MRegisterInfo.h Message-ID: <200402252155.i1PLtu624306@niobe.cs.uiuc.edu> Changes in directory llvm/include/llvm/Target: MRegisterInfo.h updated: 1.34 -> 1.35 --- Log message: Add DenseMap template and actually use it for for mapping virtual regs to objects. --- Diffs of the changes: (+9 -1) Index: llvm/include/llvm/Target/MRegisterInfo.h diff -u llvm/include/llvm/Target/MRegisterInfo.h:1.34 llvm/include/llvm/Target/MRegisterInfo.h:1.35 --- llvm/include/llvm/Target/MRegisterInfo.h:1.34 Wed Feb 18 19:10:55 2004 +++ llvm/include/llvm/Target/MRegisterInfo.h Wed Feb 25 15:55:45 2004 @@ -16,8 +16,9 @@ #ifndef LLVM_TARGET_MREGISTERINFO_H #define LLVM_TARGET_MREGISTERINFO_H -#include #include "llvm/CodeGen/MachineBasicBlock.h" +#include +#include namespace llvm { @@ -317,6 +318,13 @@ virtual void emitPrologue(MachineFunction &MF) const = 0; virtual void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const = 0; +}; + +// This is useful when building DenseMap's keyed on virtual registers +struct VirtReg2IndexFunctor : std::unary_function { + unsigned operator()(unsigned Reg) const { + return Reg - MRegisterInfo::FirstVirtualRegister; + } }; } // End llvm namespace From alkis at niobe.cs.uiuc.edu Wed Feb 25 15:56:34 2004 From: alkis at niobe.cs.uiuc.edu (Alkis Evlogimenos) Date: Wed Feb 25 15:56:34 2004 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/VirtRegMap.h VirtRegMap.cpp RegAllocLocal.cpp Message-ID: <200402252155.i1PLtur24326@niobe.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen: VirtRegMap.h updated: 1.5 -> 1.6 VirtRegMap.cpp updated: 1.2 -> 1.3 RegAllocLocal.cpp updated: 1.57 -> 1.58 --- Log message: Add DenseMap template and actually use it for for mapping virtual regs to objects. --- Diffs of the changes: (+29 -36) Index: llvm/lib/CodeGen/VirtRegMap.h diff -u llvm/lib/CodeGen/VirtRegMap.h:1.5 llvm/lib/CodeGen/VirtRegMap.h:1.6 --- llvm/lib/CodeGen/VirtRegMap.h:1.5 Tue Feb 24 02:58:29 2004 +++ llvm/lib/CodeGen/VirtRegMap.h Wed Feb 25 15:55:44 2004 @@ -20,14 +20,15 @@ #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/SSARegMap.h" +#include "Support/DenseMap.h" #include namespace llvm { class VirtRegMap { public: - typedef std::vector Virt2PhysMap; - typedef std::vector Virt2StackSlotMap; + typedef DenseMap Virt2PhysMap; + typedef DenseMap Virt2StackSlotMap; private: MachineFunction* mf_; @@ -38,13 +39,6 @@ VirtRegMap(const VirtRegMap& rhs); const VirtRegMap& operator=(const VirtRegMap& rhs); - static unsigned toIndex(unsigned virtReg) { - return virtReg - MRegisterInfo::FirstVirtualRegister; - } - static unsigned fromIndex(unsigned index) { - return index + MRegisterInfo::FirstVirtualRegister; - } - enum { NO_PHYS_REG = 0, NO_STACK_SLOT = INT_MAX @@ -53,8 +47,10 @@ public: VirtRegMap(MachineFunction& mf) : mf_(&mf), - v2pMap_(mf.getSSARegMap()->getNumVirtualRegs(), NO_PHYS_REG), - v2ssMap_(mf.getSSARegMap()->getNumVirtualRegs(), NO_STACK_SLOT) { + v2pMap_(NO_PHYS_REG), + v2ssMap_(NO_STACK_SLOT) { + v2pMap_.grow(mf.getSSARegMap()->getLastVirtReg()); + v2ssMap_.grow(mf.getSSARegMap()->getLastVirtReg()); } bool hasPhys(unsigned virtReg) const { @@ -63,23 +59,23 @@ unsigned getPhys(unsigned virtReg) const { assert(MRegisterInfo::isVirtualRegister(virtReg)); - return v2pMap_[toIndex(virtReg)]; + return v2pMap_[virtReg]; } void assignVirt2Phys(unsigned virtReg, unsigned physReg) { assert(MRegisterInfo::isVirtualRegister(virtReg) && MRegisterInfo::isPhysicalRegister(physReg)); - assert(v2pMap_[toIndex(virtReg)] == NO_PHYS_REG && + assert(v2pMap_[virtReg] == NO_PHYS_REG && "attempt to assign physical register to already mapped " "virtual register"); - v2pMap_[toIndex(virtReg)] = physReg; + v2pMap_[virtReg] = physReg; } void clearVirtReg(unsigned virtReg) { assert(MRegisterInfo::isVirtualRegister(virtReg)); - assert(v2pMap_[toIndex(virtReg)] != NO_PHYS_REG && + assert(v2pMap_[virtReg] != NO_PHYS_REG && "attempt to clear a not assigned virtual register"); - v2pMap_[toIndex(virtReg)] = NO_PHYS_REG; + v2pMap_[virtReg] = NO_PHYS_REG; } bool hasStackSlot(unsigned virtReg) const { @@ -88,7 +84,7 @@ int getStackSlot(unsigned virtReg) const { assert(MRegisterInfo::isVirtualRegister(virtReg)); - return v2ssMap_[toIndex(virtReg)]; + return v2ssMap_[virtReg]; } int assignVirt2StackSlot(unsigned virtReg); Index: llvm/lib/CodeGen/VirtRegMap.cpp diff -u llvm/lib/CodeGen/VirtRegMap.cpp:1.2 llvm/lib/CodeGen/VirtRegMap.cpp:1.3 --- llvm/lib/CodeGen/VirtRegMap.cpp:1.2 Tue Feb 24 02:58:29 2004 +++ llvm/lib/CodeGen/VirtRegMap.cpp Wed Feb 25 15:55:44 2004 @@ -38,12 +38,12 @@ int VirtRegMap::assignVirt2StackSlot(unsigned virtReg) { assert(MRegisterInfo::isVirtualRegister(virtReg)); - assert(v2ssMap_[toIndex(virtReg)] == NO_STACK_SLOT && + assert(v2ssMap_[virtReg] == NO_STACK_SLOT && "attempt to assign stack slot to already spilled register"); const TargetRegisterClass* rc = mf_->getSSARegMap()->getRegClass(virtReg); int frameIndex = mf_->getFrameInfo()->CreateStackObject(rc); - v2ssMap_[toIndex(virtReg)] = frameIndex; + v2ssMap_[virtReg] = frameIndex; ++numSpills; return frameIndex; } @@ -53,14 +53,16 @@ const MRegisterInfo* mri = vrm.mf_->getTarget().getRegisterInfo(); std::cerr << "********** REGISTER MAP **********\n"; - for (unsigned i = 0, e = vrm.v2pMap_.size(); i != e; ++i) { + for (unsigned i = MRegisterInfo::FirstVirtualRegister, + e = vrm.mf_->getSSARegMap()->getLastVirtReg(); i <= e; ++i) { if (vrm.v2pMap_[i] != VirtRegMap::NO_PHYS_REG) - std::cerr << "[reg" << VirtRegMap::fromIndex(i) << " -> " + std::cerr << "[reg" << i << " -> " << mri->getName(vrm.v2pMap_[i]) << "]\n"; } - for (unsigned i = 0, e = vrm.v2ssMap_.size(); i != e; ++i) { + for (unsigned i = MRegisterInfo::FirstVirtualRegister, + e = vrm.mf_->getSSARegMap()->getLastVirtReg(); i <= e; ++i) { if (vrm.v2ssMap_[i] != VirtRegMap::NO_STACK_SLOT) - std::cerr << "[reg" << VirtRegMap::fromIndex(i) << " -> fi#" + std::cerr << "[reg" << i << " -> fi#" << vrm.v2ssMap_[i] << "]\n"; } return std::cerr << '\n'; Index: llvm/lib/CodeGen/RegAllocLocal.cpp diff -u llvm/lib/CodeGen/RegAllocLocal.cpp:1.57 llvm/lib/CodeGen/RegAllocLocal.cpp:1.58 --- llvm/lib/CodeGen/RegAllocLocal.cpp:1.57 Mon Feb 23 12:14:48 2004 +++ llvm/lib/CodeGen/RegAllocLocal.cpp Wed Feb 25 15:55:44 2004 @@ -23,6 +23,7 @@ #include "llvm/Target/TargetMachine.h" #include "Support/CommandLine.h" #include "Support/Debug.h" +#include "Support/DenseMap.h" #include "Support/Statistic.h" #include using namespace llvm; @@ -43,19 +44,11 @@ std::map StackSlotForVirtReg; // Virt2PhysRegMap - This map contains entries for each virtual register - // that is currently available in a physical register. This is "logically" - // a map from virtual register numbers to physical register numbers. - // Instead of using a map, however, which is slow, we use a vector. The - // index is the VREG number - FirstVirtualRegister. If the entry is zero, - // then it is logically "not in the map". - // - std::vector Virt2PhysRegMap; + // that is currently available in a physical register. + DenseMap Virt2PhysRegMap; unsigned &getVirt2PhysRegMapSlot(unsigned VirtReg) { - assert(MRegisterInfo::isVirtualRegister(VirtReg) &&"Illegal VREG #"); - assert(VirtReg-MRegisterInfo::FirstVirtualRegister getSSARegMap()->getLastVirtReg(); i <= e; ++i) if (unsigned PR = Virt2PhysRegMap[i]) { std::cerr << "Register still mapped: " << i << " -> " << PR << "\n"; AllOk = false; @@ -689,7 +683,8 @@ // initialize the virtual->physical register map to have a 'null' // mapping for all virtual registers - Virt2PhysRegMap.assign(MF->getSSARegMap()->getNumVirtualRegs(), 0); + Virt2PhysRegMap.clear(); + Virt2PhysRegMap.grow(MF->getSSARegMap()->getLastVirtReg()); // Loop over all of the basic blocks, eliminating virtual register references for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end(); From alkis at niobe.cs.uiuc.edu Wed Feb 25 15:57:07 2004 From: alkis at niobe.cs.uiuc.edu (Alkis Evlogimenos) Date: Wed Feb 25 15:57:07 2004 Subject: [llvm-commits] CVS: llvm/include/Support/DenseMap.h Message-ID: <200402252155.i1PLtu224314@niobe.cs.uiuc.edu> Changes in directory llvm/include/Support: DenseMap.h added (r1.1) --- Log message: Add DenseMap template and actually use it for for mapping virtual regs to objects. --- Diffs of the changes: (+61 -0) Index: llvm/include/Support/DenseMap.h diff -c /dev/null llvm/include/Support/DenseMap.h:1.1 *** /dev/null Wed Feb 25 15:55:56 2004 --- llvm/include/Support/DenseMap.h Wed Feb 25 15:55:45 2004 *************** *** 0 **** --- 1,61 ---- + //===- DenseMap.h - A dense map implmentation -------------------*- C++ -*-===// + // + // The LLVM Compiler Infrastructure + // + // This file was developed by the LLVM research group and is distributed under + // the University of Illinois Open Source License. See LICENSE.TXT for details. + // + //===----------------------------------------------------------------------===// + // + // This file implements a dense map. A dense map template takes two + // types. The first is the mapped type and the second is a functor + // that maps its argument to a size_t. On instanciation a "null" value + // can be provided to be used as a "does not exist" indicator in the + // map. A member function grow() is provided that given the value of + // the maximally indexed key (the argument of the functor) makes sure + // the map has enough space for it. + // + //===----------------------------------------------------------------------===// + + #ifndef SUPPORT_DENSEMAP_H + #define SUPPORT_DENSEMAP_H + + #include + + namespace llvm { + + template + class DenseMap { + typedef typename ToIndexT::argument_type IndexT; + typedef std::vector StorageT; + StorageT storage_; + T nullVal_; + ToIndexT toIndex_; + + public: + DenseMap() { } + + explicit DenseMap(const T& val) : nullVal_(val) { } + + typename StorageT::reference operator[](IndexT n) { + assert(toIndex_(n) < storage_.size() && "index out of bounds!"); + return storage_[toIndex_(n)]; + } + + typename StorageT::const_reference operator[](IndexT n) const { + assert(toIndex_(n) < storage_.size() && "index out of bounds!"); + return storage_[toIndex_(n)]; + } + + void clear() { + storage_.assign(storage_.size(), nullVal_); + } + + void grow(IndexT n) { + storage_.resize(toIndex_(n) + 1, nullVal_); + } + }; + + } // End llvm namespace + + #endif From alkis at niobe.cs.uiuc.edu Wed Feb 25 15:57:43 2004 From: alkis at niobe.cs.uiuc.edu (Alkis Evlogimenos) Date: Wed Feb 25 15:57:43 2004 Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/SSARegMap.h Message-ID: <200402252155.i1PLtuG24309@niobe.cs.uiuc.edu> Changes in directory llvm/include/llvm/CodeGen: SSARegMap.h updated: 1.9 -> 1.10 --- Log message: Add DenseMap template and actually use it for for mapping virtual regs to objects. --- Diffs of the changes: (+11 -12) Index: llvm/include/llvm/CodeGen/SSARegMap.h diff -u llvm/include/llvm/CodeGen/SSARegMap.h:1.9 llvm/include/llvm/CodeGen/SSARegMap.h:1.10 --- llvm/include/llvm/CodeGen/SSARegMap.h:1.9 Fri Feb 13 12:07:06 2004 +++ llvm/include/llvm/CodeGen/SSARegMap.h Wed Feb 25 15:55:45 2004 @@ -18,35 +18,34 @@ #define LLVM_CODEGEN_SSAREGMAP_H #include "llvm/Target/MRegisterInfo.h" +#include "Support/DenseMap.h" namespace llvm { class TargetRegisterClass; class SSARegMap { - std::vector RegClassMap; - - unsigned rescale(unsigned Reg) { - return Reg - MRegisterInfo::FirstVirtualRegister; - } + DenseMap RegClassMap; + unsigned NextRegNum; public: + SSARegMap() : NextRegNum(MRegisterInfo::FirstVirtualRegister) { } + const TargetRegisterClass* getRegClass(unsigned Reg) { - unsigned actualReg = rescale(Reg); - assert(actualReg < RegClassMap.size() && "Register out of bounds"); - return RegClassMap[actualReg]; + return RegClassMap[Reg]; } /// createVirtualRegister - Create and return a new virtual register in the /// function with the specified register class. /// unsigned createVirtualRegister(const TargetRegisterClass *RegClass) { - RegClassMap.push_back(RegClass); - return RegClassMap.size()+MRegisterInfo::FirstVirtualRegister-1; + RegClassMap.grow(NextRegNum); + RegClassMap[NextRegNum] = RegClass; + return NextRegNum++; } - unsigned getNumVirtualRegs() const { - return RegClassMap.size(); + unsigned getLastVirtReg() const { + return NextRegNum - 1; } }; From alkis at niobe.cs.uiuc.edu Wed Feb 25 16:02:01 2004 From: alkis at niobe.cs.uiuc.edu (Alkis Evlogimenos) Date: Wed Feb 25 16:02:01 2004 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/RegAllocLinearScan.cpp Message-ID: <200402252201.i1PM1HZ24384@niobe.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen: RegAllocLinearScan.cpp updated: 1.65 -> 1.66 --- Log message: Remove asssert since it is breaking cases that it shouldn't. --- Diffs of the changes: (+0 -1) Index: llvm/lib/CodeGen/RegAllocLinearScan.cpp diff -u llvm/lib/CodeGen/RegAllocLinearScan.cpp:1.65 llvm/lib/CodeGen/RegAllocLinearScan.cpp:1.66 --- llvm/lib/CodeGen/RegAllocLinearScan.cpp:1.65 Wed Feb 25 13:37:44 2004 +++ llvm/lib/CodeGen/RegAllocLinearScan.cpp Wed Feb 25 16:01:06 2004 @@ -378,7 +378,6 @@ } DEBUG(std::cerr << "\t\tregister with min weight: " << mri_->getName(minReg) << " (" << minWeight << ")\n"); - assert(minReg != 0 && "Didn't find a register to spill?"); // if the current has the minimum weight, we need to modify it, // push it back in unhandled and let the linear scan algorithm run From alkis at niobe.cs.uiuc.edu Wed Feb 25 16:05:01 2004 From: alkis at niobe.cs.uiuc.edu (Alkis Evlogimenos) Date: Wed Feb 25 16:05:01 2004 Subject: [llvm-commits] CVS: llvm/include/llvm/Target/MRegisterInfo.h Message-ID: <200402252204.i1PM4cm24791@niobe.cs.uiuc.edu> Changes in directory llvm/include/llvm/Target: MRegisterInfo.h updated: 1.35 -> 1.36 --- Log message: Add assert to isPhysicalRegister and isVirtualRegister to fail when passed the special 'register' 0. --- Diffs of the changes: (+2 -0) Index: llvm/include/llvm/Target/MRegisterInfo.h diff -u llvm/include/llvm/Target/MRegisterInfo.h:1.35 llvm/include/llvm/Target/MRegisterInfo.h:1.36 --- llvm/include/llvm/Target/MRegisterInfo.h:1.35 Wed Feb 25 15:55:45 2004 +++ llvm/include/llvm/Target/MRegisterInfo.h Wed Feb 25 16:04:28 2004 @@ -141,12 +141,14 @@ /// isPhysicalRegister - Return true if the specified register number is in /// the physical register namespace. static bool isPhysicalRegister(unsigned Reg) { + assert(Reg && "this is not a register!"; return Reg < FirstVirtualRegister; } /// isVirtualRegister - Return true if the specified register number is in /// the virtual register namespace. static bool isVirtualRegister(unsigned Reg) { + assert(Reg && "this is not a register!"; return Reg >= FirstVirtualRegister; } From alkis at niobe.cs.uiuc.edu Wed Feb 25 16:08:01 2004 From: alkis at niobe.cs.uiuc.edu (Alkis Evlogimenos) Date: Wed Feb 25 16:08:01 2004 Subject: [llvm-commits] CVS: llvm/include/llvm/Target/MRegisterInfo.h Message-ID: <200402252207.i1PM7Q825528@niobe.cs.uiuc.edu> Changes in directory llvm/include/llvm/Target: MRegisterInfo.h updated: 1.36 -> 1.37 --- Log message: Duh, forgot to close the parenthesis. --- Diffs of the changes: (+2 -2) Index: llvm/include/llvm/Target/MRegisterInfo.h diff -u llvm/include/llvm/Target/MRegisterInfo.h:1.36 llvm/include/llvm/Target/MRegisterInfo.h:1.37 --- llvm/include/llvm/Target/MRegisterInfo.h:1.36 Wed Feb 25 16:04:28 2004 +++ llvm/include/llvm/Target/MRegisterInfo.h Wed Feb 25 16:07:14 2004 @@ -141,14 +141,14 @@ /// isPhysicalRegister - Return true if the specified register number is in /// the physical register namespace. static bool isPhysicalRegister(unsigned Reg) { - assert(Reg && "this is not a register!"; + assert(Reg && "this is not a register!"); return Reg < FirstVirtualRegister; } /// isVirtualRegister - Return true if the specified register number is in /// the virtual register namespace. static bool isVirtualRegister(unsigned Reg) { - assert(Reg && "this is not a register!"; + assert(Reg && "this is not a register!"); return Reg >= FirstVirtualRegister; } From gaeke at cs.uiuc.edu Wed Feb 25 16:10:02 2004 From: gaeke at cs.uiuc.edu (Brian Gaeke) Date: Wed Feb 25 16:10:02 2004 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/InstrSched/InstrScheduling.cpp SchedPriorities.cpp Message-ID: <200402252209.QAA03738@seraph.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/InstrSched: InstrScheduling.cpp updated: 1.67 -> 1.68 SchedPriorities.cpp updated: 1.31 -> 1.32 --- Log message: Great sparc renaming fallout IV: Sparc --> SparcV9. --- Diffs of the changes: (+2 -2) Index: llvm/lib/CodeGen/InstrSched/InstrScheduling.cpp diff -u llvm/lib/CodeGen/InstrSched/InstrScheduling.cpp:1.67 llvm/lib/CodeGen/InstrSched/InstrScheduling.cpp:1.68 --- llvm/lib/CodeGen/InstrSched/InstrScheduling.cpp:1.67 Tue Feb 24 13:45:44 2004 +++ llvm/lib/CodeGen/InstrSched/InstrScheduling.cpp Wed Feb 25 16:09:35 2004 @@ -16,7 +16,7 @@ #include "llvm/CodeGen/MachineInstr.h" #include "llvm/CodeGen/MachineCodeForInstruction.h" #include "llvm/CodeGen/MachineFunction.h" -#include "../../Target/Sparc/LiveVar/FunctionLiveVarInfo.h" +#include "../../Target/SparcV9/LiveVar/FunctionLiveVarInfo.h" #include "llvm/Target/TargetMachine.h" #include "llvm/BasicBlock.h" #include "Support/CommandLine.h" Index: llvm/lib/CodeGen/InstrSched/SchedPriorities.cpp diff -u llvm/lib/CodeGen/InstrSched/SchedPriorities.cpp:1.31 llvm/lib/CodeGen/InstrSched/SchedPriorities.cpp:1.32 --- llvm/lib/CodeGen/InstrSched/SchedPriorities.cpp:1.31 Tue Feb 24 13:45:44 2004 +++ llvm/lib/CodeGen/InstrSched/SchedPriorities.cpp Wed Feb 25 16:09:35 2004 @@ -18,7 +18,7 @@ //===----------------------------------------------------------------------===// #include "SchedPriorities.h" -#include "../../Target/Sparc/LiveVar/FunctionLiveVarInfo.h" +#include "../../Target/SparcV9/LiveVar/FunctionLiveVarInfo.h" #include "llvm/CodeGen/MachineBasicBlock.h" #include "llvm/Support/CFG.h" #include "Support/PostOrderIterator.h" From gaeke at cs.uiuc.edu Wed Feb 25 16:10:42 2004 From: gaeke at cs.uiuc.edu (Brian Gaeke) Date: Wed Feb 25 16:10:42 2004 Subject: [llvm-commits] CVS: llvm/lib/ExecutionEngine/JIT/TargetSelect.cpp Message-ID: <200402252209.QAA03729@seraph.cs.uiuc.edu> Changes in directory llvm/lib/ExecutionEngine/JIT: TargetSelect.cpp updated: 1.3 -> 1.4 --- Log message: Great sparc renaming fallout IV: Sparc --> SparcV9. --- Diffs of the changes: (+1 -1) Index: llvm/lib/ExecutionEngine/JIT/TargetSelect.cpp diff -u llvm/lib/ExecutionEngine/JIT/TargetSelect.cpp:1.3 llvm/lib/ExecutionEngine/JIT/TargetSelect.cpp:1.4 --- llvm/lib/ExecutionEngine/JIT/TargetSelect.cpp:1.3 Wed Feb 25 13:08:11 2004 +++ llvm/lib/ExecutionEngine/JIT/TargetSelect.cpp Wed Feb 25 16:09:36 2004 @@ -38,7 +38,7 @@ clEnumVal(x86, " IA-32 (Pentium and above)"), #endif #ifdef ENABLE_SPARC_JIT - clEnumValN(Sparc, "sparcv9", " Sparc-V9"), + clEnumValN(SparcV9, "sparcv9", " Sparc-V9"), #endif 0), #if defined(ENABLE_X86_JIT) From gaeke at cs.uiuc.edu Wed Feb 25 17:02:00 2004 From: gaeke at cs.uiuc.edu (Brian Gaeke) Date: Wed Feb 25 17:02:00 2004 Subject: [llvm-commits] CVS: llvm/include/llvm/ExecutionEngine/GenericValue.h Message-ID: <200402252301.RAA13200@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/ExecutionEngine: GenericValue.h updated: 1.4 -> 1.5 --- Log message: Represent va_list in interpreter as a (ec-stack-depth . var-arg-index) pair, and look up varargs in the execution stack every time, instead of just pushing iterators (which can be invalidated during callFunction()) around. (union GenericValue now has a "pair of uints" member, to support this mechanism.) Fixes Bug 234. --- Diffs of the changes: (+1 -0) Index: llvm/include/llvm/ExecutionEngine/GenericValue.h diff -u llvm/include/llvm/ExecutionEngine/GenericValue.h:1.4 llvm/include/llvm/ExecutionEngine/GenericValue.h:1.5 --- llvm/include/llvm/ExecutionEngine/GenericValue.h:1.4 Thu Dec 11 23:06:09 2003 +++ llvm/include/llvm/ExecutionEngine/GenericValue.h Wed Feb 25 17:01:46 2004 @@ -33,6 +33,7 @@ int64_t LongVal; double DoubleVal; float FloatVal; + struct { unsigned int first; unsigned int second; } UIntPairVal; PointerTy PointerVal; unsigned char Untyped[8]; From gaeke at cs.uiuc.edu Wed Feb 25 17:02:34 2004 From: gaeke at cs.uiuc.edu (Brian Gaeke) Date: Wed Feb 25 17:02:34 2004 Subject: [llvm-commits] CVS: llvm/lib/ExecutionEngine/Interpreter/Execution.cpp Message-ID: <200402252301.RAA13203@zion.cs.uiuc.edu> Changes in directory llvm/lib/ExecutionEngine/Interpreter: Execution.cpp updated: 1.123 -> 1.124 --- Log message: Represent va_list in interpreter as a (ec-stack-depth . var-arg-index) pair, and look up varargs in the execution stack every time, instead of just pushing iterators (which can be invalidated during callFunction()) around. (union GenericValue now has a "pair of uints" member, to support this mechanism.) Fixes Bug 234. --- Diffs of the changes: (+14 -11) Index: llvm/lib/ExecutionEngine/Interpreter/Execution.cpp diff -u llvm/lib/ExecutionEngine/Interpreter/Execution.cpp:1.123 llvm/lib/ExecutionEngine/Interpreter/Execution.cpp:1.124 --- llvm/lib/ExecutionEngine/Interpreter/Execution.cpp:1.123 Thu Feb 12 23:48:00 2004 +++ llvm/lib/ExecutionEngine/Interpreter/Execution.cpp Wed Feb 25 17:01:48 2004 @@ -774,9 +774,13 @@ switch (F->getIntrinsicID()) { case Intrinsic::not_intrinsic: break; - case Intrinsic::va_start: // va_start: implemented by getFirstVarArg() - SetValue(CS.getInstruction(), getFirstVarArg(), SF); + case Intrinsic::va_start: { // va_start + GenericValue ArgIndex; + ArgIndex.UIntPairVal.first = ECStack.size() - 1; + ArgIndex.UIntPairVal.second = 0; + SetValue(CS.getInstruction(), ArgIndex, SF); return; + } case Intrinsic::va_end: // va_end is a noop for the interpreter return; case Intrinsic::va_copy: // va_copy: dest = src @@ -960,14 +964,12 @@ void Interpreter::visitVANextInst(VANextInst &I) { ExecutionContext &SF = ECStack.back(); - // Get the incoming valist parameter. LLI treats the valist as a pointer - // to the next argument. + // Get the incoming valist parameter. LLI treats the valist as a + // (ec-stack-depth var-arg-index) pair. GenericValue VAList = getOperandValue(I.getOperand(0), SF); // Move the pointer to the next vararg. - GenericValue *ArgPtr = (GenericValue *) GVTOP (VAList); - ++ArgPtr; - VAList = PTOGV (ArgPtr); + ++VAList.UIntPairVal.second; SetValue(&I, VAList, SF); } @@ -977,11 +979,12 @@ void Interpreter::visitVAArgInst(VAArgInst &I) { ExecutionContext &SF = ECStack.back(); - // Get the incoming valist parameter. LLI treats the valist as a pointer - // to the next argument. + // Get the incoming valist parameter. LLI treats the valist as a + // (ec-stack-depth var-arg-index) pair. GenericValue VAList = getOperandValue(I.getOperand(0), SF); - assert (GVTOP (VAList) != 0 && "VAList was null in vaarg instruction"); - GenericValue Dest, Src = *(GenericValue *) GVTOP (VAList); + GenericValue Dest; + GenericValue Src = ECStack[VAList.UIntPairVal.first] + .VarArgs[VAList.UIntPairVal.second]; const Type *Ty = I.getType(); switch (Ty->getPrimitiveID()) { IMPLEMENT_VAARG(UByte); From lattner at cs.uiuc.edu Wed Feb 25 17:07:01 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Wed Feb 25 17:07:01 2004 Subject: [llvm-commits] CVS: llvm/lib/Analysis/DataStructure/Local.cpp Message-ID: <200402252306.RAA13549@zion.cs.uiuc.edu> Changes in directory llvm/lib/Analysis/DataStructure: Local.cpp updated: 1.89 -> 1.90 --- Log message: Add a bunch more functions --- Diffs of the changes: (+55 -8) Index: llvm/lib/Analysis/DataStructure/Local.cpp diff -u llvm/lib/Analysis/DataStructure/Local.cpp:1.89 llvm/lib/Analysis/DataStructure/Local.cpp:1.90 --- llvm/lib/Analysis/DataStructure/Local.cpp:1.89 Wed Feb 25 11:43:20 2004 +++ llvm/lib/Analysis/DataStructure/Local.cpp Wed Feb 25 17:06:40 2004 @@ -490,7 +490,11 @@ F->getName() == "strcmp" || F->getName() == "strncmp" || F->getName() == "execl" || F->getName() == "execlp" || F->getName() == "execle" || F->getName() == "execv" || - F->getName() == "execvp" || F->getName() == "chmod") { + F->getName() == "execvp" || F->getName() == "chmod" || + F->getName() == "puts" || F->getName() == "write" || + F->getName() == "open" || F->getName() == "create" || + F->getName() == "truncate" || F->getName() == "chdir" || + F->getName() == "mkdir" || F->getName() == "rmdir") { // These functions read all of their pointer operands. for (CallSite::arg_iterator AI = CS.arg_begin(), E = CS.arg_end(); AI != E; ++AI) { @@ -499,6 +503,16 @@ N->setReadMarker(); } return; + } else if (F->getName() == "read" || F->getName() == "pipe" || + F->getName() == "wait") { + // These functions write all of their pointer operands. + for (CallSite::arg_iterator AI = CS.arg_begin(), E = CS.arg_end(); + AI != E; ++AI) { + if (isPointerType((*AI)->getType())) + if (DSNode *N = getValueDest(**AI).getNode()) + N->setModifiedMarker(); + } + return; } else if (F->getName() == "stat" || F->getName() == "fstat" || F->getName() == "lstat") { // These functions read their first operand if its a pointer. @@ -516,8 +530,6 @@ if (const PointerType *PTy = dyn_cast(StatTy)) N->mergeTypeInfo(PTy->getElementType(), StatBuf.getOffset()); } - - return; } else if (F->getName() == "fopen" || F->getName() == "fdopen") { // fopen reads the mode argument strings. @@ -554,7 +566,8 @@ } else if (CS.arg_end()-CS.arg_begin() == 1 && (F->getName() == "fflush" || F->getName() == "feof" || F->getName() == "fileno" || F->getName() == "clearerr" || - F->getName() == "rewind" || F->getName() == "ftell")) { + F->getName() == "rewind" || F->getName() == "ftell" || + F->getName() == "ferror")) { // fflush reads and writes the memory for the file descriptor. It // merges the FILE type into the descriptor. DSNodeHandle H = getValueDest(**CS.arg_begin()); @@ -605,15 +618,42 @@ N->mergeTypeInfo(PTy->getElementType(), H.getOffset()); } return; - } else if (F->getName() == "ungetc" &&CS.arg_end()-CS.arg_begin() == 2){ - // ungetc reads and writes the memory for the file descriptor. + } else if (F->getName() == "ungetc" || F->getName() == "fputc" || + F->getName() == "fputs" || F->getName() == "putc" || + F->getName() == "ftell" || F->getName() == "rewind") { + // These functions read and write the memory for the file descriptor. DSNodeHandle H = getValueDest(**--CS.arg_end()); if (DSNode *N = H.getNode()) { N->setReadMarker()->setModifiedMarker(); - const Type *ArgTy = F->getFunctionType()->getParamType(1); + const Type *ArgTy = *--F->getFunctionType()->param_end(); if (const PointerType *PTy = dyn_cast(ArgTy)) N->mergeTypeInfo(PTy->getElementType(), H.getOffset()); } + + // Any pointer arguments are read. + for (CallSite::arg_iterator AI = CS.arg_begin(), E = CS.arg_end(); + AI != E; ++AI) + if (isPointerType((*AI)->getType())) + if (DSNode *N = getValueDest(**AI).getNode()) + N->setReadMarker(); + return; + } else if (F->getName() == "fseek" || F->getName() == "fgetpos" || + F->getName() == "fsetpos") { + // These functions read and write the memory for the file descriptor, + // and read/write all other arguments. + DSNodeHandle H = getValueDest(**CS.arg_begin()); + if (DSNode *N = H.getNode()) { + const Type *ArgTy = *--F->getFunctionType()->param_end(); + if (const PointerType *PTy = dyn_cast(ArgTy)) + N->mergeTypeInfo(PTy->getElementType(), H.getOffset()); + } + + // Any pointer arguments are read. + for (CallSite::arg_iterator AI = CS.arg_begin(), E = CS.arg_end(); + AI != E; ++AI) + if (isPointerType((*AI)->getType())) + if (DSNode *N = getValueDest(**AI).getNode()) + N->setReadMarker()->setModifiedMarker(); return; } else if (F->getName() == "printf" || F->getName() == "fprintf" || F->getName() == "sprintf") { @@ -708,7 +748,14 @@ N->setReadMarker(); H.mergeWith(getValueDest(*CS.getInstruction())); // Returns buffer return; - + } else if (F->getName() == "modf" && CS.arg_end()-CS.arg_begin() == 2) { + // This writes its second argument, and forces it to double. + DSNodeHandle H = getValueDest(**--CS.arg_end()); + if (DSNode *N = H.getNode()) { + N->setModifiedMarker(); + N->mergeTypeInfo(Type::DoubleTy, H.getOffset()); + } + return; } else { // Unknown function, warn if it returns a pointer type or takes a // pointer argument. From lattner at cs.uiuc.edu Wed Feb 25 17:07:37 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Wed Feb 25 17:07:37 2004 Subject: [llvm-commits] CVS: llvm/lib/Analysis/DataStructure/Printer.cpp Message-ID: <200402252306.RAA13540@zion.cs.uiuc.edu> Changes in directory llvm/lib/Analysis/DataStructure: Printer.cpp updated: 1.65 -> 1.66 --- Log message: Try harder to get symbol info --- Diffs of the changes: (+3 -0) Index: llvm/lib/Analysis/DataStructure/Printer.cpp diff -u llvm/lib/Analysis/DataStructure/Printer.cpp:1.65 llvm/lib/Analysis/DataStructure/Printer.cpp:1.66 --- llvm/lib/Analysis/DataStructure/Printer.cpp:1.65 Sat Feb 21 16:27:31 2004 +++ llvm/lib/Analysis/DataStructure/Printer.cpp Wed Feb 25 17:06:30 2004 @@ -39,6 +39,9 @@ static std::string getCaption(const DSNode *N, const DSGraph *G) { std::stringstream OS; Module *M = 0; + + if (G) G = N->getParentGraph(); + // Get the module from ONE of the functions in the graph it is available. if (G && !G->getReturnNodes().empty()) M = G->getReturnNodes().begin()->first->getParent(); From lattner at cs.uiuc.edu Wed Feb 25 17:09:00 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Wed Feb 25 17:09:00 2004 Subject: [llvm-commits] CVS: llvm/lib/Analysis/DataStructure/DataStructure.cpp Message-ID: <200402252308.RAA13568@zion.cs.uiuc.edu> Changes in directory llvm/lib/Analysis/DataStructure: DataStructure.cpp updated: 1.158 -> 1.159 --- Log message: Simplify the dead node elimination stuff Make the incompleteness marker faster by looping directly over the globals instead of over the scalars to find the globals Fix a bug where we didn't mark a global incomplete if it didn't have any outgoing edges. This wouldn't break any current clients but is still wrong. --- Diffs of the changes: (+12 -10) Index: llvm/lib/Analysis/DataStructure/DataStructure.cpp diff -u llvm/lib/Analysis/DataStructure/DataStructure.cpp:1.158 llvm/lib/Analysis/DataStructure/DataStructure.cpp:1.159 --- llvm/lib/Analysis/DataStructure/DataStructure.cpp:1.158 Sat Feb 21 18:53:54 2004 +++ llvm/lib/Analysis/DataStructure/DataStructure.cpp Wed Feb 25 17:08:00 2004 @@ -1351,9 +1351,9 @@ // Mark all global nodes as incomplete... if ((Flags & DSGraph::IgnoreGlobals) == 0) - for (node_iterator NI = node_begin(), E = node_end(); NI != E; ++NI) - if ((*NI)->isGlobalNode() && (*NI)->getNumLinks()) - markIncompleteNode(*NI); + for (DSScalarMap::global_iterator I = ScalarMap.global_begin(), + E = ScalarMap.global_end(); I != E; ++I) + markIncompleteNode(ScalarMap[*I].getNode()); } static inline void killIfUselessEdge(DSNodeHandle &Edge) { @@ -1773,16 +1773,18 @@ // std::vector DeadNodes; DeadNodes.reserve(Nodes.size()); - for (NodeListTy::iterator NI = Nodes.begin(), E = Nodes.end(); NI != E;) - if (!Alive.count(NI)) { - ++NumDNE; - DSNode *N = Nodes.remove(NI++); + for (NodeListTy::iterator NI = Nodes.begin(), E = Nodes.end(); NI != E;) { + DSNode *N = NI++; + assert(!N->isForwarding() && "Forwarded node in nodes list?"); + + if (!Alive.count(N)) { + Nodes.remove(N); + assert(!N->isForwarding() && "Cannot remove a forwarding node!"); DeadNodes.push_back(N); N->dropAllReferences(); - } else { - assert(NI->getForwardNode() == 0 && "Alive forwarded node?"); - ++NI; + ++NumDNE; } + } // Remove all unreachable globals from the ScalarMap. // If flag RemoveUnreachableGlobals is set, GlobalNodes has only dead nodes. From alkis at niobe.cs.uiuc.edu Wed Feb 25 17:21:01 2004 From: alkis at niobe.cs.uiuc.edu (Alkis Evlogimenos) Date: Wed Feb 25 17:21:01 2004 Subject: [llvm-commits] CVS: llvm/autoconf/configure.ac Message-ID: <200402252320.i1PNKmn25271@niobe.cs.uiuc.edu> Changes in directory llvm/autoconf: configure.ac updated: 1.79 -> 1.80 --- Log message: Fix bugs found with recent addition of assertions in MRegisterInfo::is{Physical,Virtual}Register. --- Diffs of the changes: (+7 -7) Index: llvm/autoconf/configure.ac diff -u llvm/autoconf/configure.ac:1.79 llvm/autoconf/configure.ac:1.80 --- llvm/autoconf/configure.ac:1.79 Tue Feb 24 15:43:38 2004 +++ llvm/autoconf/configure.ac Wed Feb 25 17:20:27 2004 @@ -304,20 +304,20 @@ then if test -d /home/vadve/shared/benchmarks/speccpu2000/benchspec then - AC_SUBST(SPEC_ROOT,[/home/vadve/shared/benchmarks/speccpu2000/benchspec]) - AC_SUBST(USE_SPEC,[[USE_SPEC=1]]) + AC_SUBST(SPEC2000_ROOT,[/home/vadve/shared/benchmarks/speccpu2000/benchspec]) + AC_SUBST(USE_SPEC2000,[[USE_SPEC2000=1]]) else - AC_SUBST(USE_SPEC,[[]]) - AC_SUBST(SPEC_ROOT,[]) + AC_SUBST(USE_SPEC2000,[[]]) + AC_SUBST(SPEC2000_ROOT,[]) fi else if test ${enableval} = "" then - AC_SUBST(SPEC_ROOT,[/home/vadve/shared/benchmarks/speccpu2000/benchspec]) + AC_SUBST(SPEC2000_ROOT,[/home/vadve/shared/benchmarks/speccpu2000/benchspec]) else - AC_SUBST(SPEC_ROOT,[${enableval}]) + AC_SUBST(SPEC2000_ROOT,[${enableval}]) fi - AC_SUBST(USE_SPEC,[[USE_SPEC=1]]) + AC_SUBST(USE_SPEC2000,[[USE_SPEC2000=1]]) fi dnl Spec 95 Benchmarks From alkis at niobe.cs.uiuc.edu Wed Feb 25 17:23:00 2004 From: alkis at niobe.cs.uiuc.edu (Alkis Evlogimenos) Date: Wed Feb 25 17:23:00 2004 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/VirtRegMap.cpp Message-ID: <200402252322.i1PNM4U25497@niobe.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen: VirtRegMap.cpp updated: 1.3 -> 1.4 --- Log message: Fix bugs found with recent addition of assertions in MRegisterInfo::is{Physical,Virtual}Register. --- Diffs of the changes: (+2 -2) Index: llvm/lib/CodeGen/VirtRegMap.cpp diff -u llvm/lib/CodeGen/VirtRegMap.cpp:1.3 llvm/lib/CodeGen/VirtRegMap.cpp:1.4 --- llvm/lib/CodeGen/VirtRegMap.cpp:1.3 Wed Feb 25 15:55:44 2004 +++ llvm/lib/CodeGen/VirtRegMap.cpp Wed Feb 25 17:21:52 2004 @@ -168,7 +168,7 @@ // rewrite all used operands for (unsigned i = 0, e = mii->getNumOperands(); i != e; ++i) { MachineOperand& op = mii->getOperand(i); - if (op.isRegister() && op.isUse() && + if (op.isRegister() && op.getReg() && op.isUse() && MRegisterInfo::isVirtualRegister(op.getReg())) { unsigned physReg = vrm_.getPhys(op.getReg()); handleUse(mbb, mii, op.getReg(), physReg); @@ -187,7 +187,7 @@ // uses so don't check for those here) for (unsigned i = 0, e = mii->getNumOperands(); i != e; ++i) { MachineOperand& op = mii->getOperand(i); - if (op.isRegister() && !op.isUse()) + if (op.isRegister() && op.getReg() && !op.isUse()) if (MRegisterInfo::isPhysicalRegister(op.getReg())) vacatePhysReg(mbb, mii, op.getReg()); else { From lattner at cs.uiuc.edu Wed Feb 25 17:32:00 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Wed Feb 25 17:32:00 2004 Subject: [llvm-commits] CVS: llvm/lib/Analysis/DataStructure/Local.cpp Message-ID: <200402252331.RAA14742@zion.cs.uiuc.edu> Changes in directory llvm/lib/Analysis/DataStructure: Local.cpp updated: 1.90 -> 1.91 --- Log message: When building local graphs, clone the initializer for constant globals into each local graph that uses the global. --- Diffs of the changes: (+21 -7) Index: llvm/lib/Analysis/DataStructure/Local.cpp diff -u llvm/lib/Analysis/DataStructure/Local.cpp:1.90 llvm/lib/Analysis/DataStructure/Local.cpp:1.91 --- llvm/lib/Analysis/DataStructure/Local.cpp:1.90 Wed Feb 25 17:06:40 2004 +++ llvm/lib/Analysis/DataStructure/Local.cpp Wed Feb 25 17:31:02 2004 @@ -177,6 +177,18 @@ else ++I; + // If there are any constant globals referenced in this function, merge their + // initializers into the local graph from the globals graph. + if (ScalarMap.global_begin() != ScalarMap.global_end()) { + ReachabilityCloner RC(*this, *GG, 0); + + for (DSScalarMap::global_iterator I = ScalarMap.global_begin(); + I != ScalarMap.global_end(); ++I) + if (GlobalVariable *GV = dyn_cast(*I)) + if (GV->isConstant()) + RC.merge(ScalarMap[GV], GG->ScalarMap[GV]); + } + markIncompleteNodes(DSGraph::MarkFormalArgs); // Remove any nodes made dead due to merging... @@ -894,17 +906,19 @@ const TargetData &TD = getAnalysis(); + { + GraphBuilder GGB(*GlobalsGraph); + + // Add initializers for all of the globals to the globals graph... + for (Module::giterator I = M.gbegin(), E = M.gend(); I != E; ++I) + if (!I->isExternal()) + GGB.mergeInGlobalInitializer(I); + } + // Calculate all of the graphs... for (Module::iterator I = M.begin(), E = M.end(); I != E; ++I) if (!I->isExternal()) DSInfo.insert(std::make_pair(I, new DSGraph(TD, *I, GlobalsGraph))); - - GraphBuilder GGB(*GlobalsGraph); - - // Add initializers for all of the globals to the globals graph... - for (Module::giterator I = M.gbegin(), E = M.gend(); I != E; ++I) - if (!I->isExternal()) - GGB.mergeInGlobalInitializer(I); GlobalsGraph->removeTriviallyDeadNodes(); GlobalsGraph->markIncompleteNodes(DSGraph::MarkFormalArgs); From lattner at cs.uiuc.edu Wed Feb 25 17:35:01 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Wed Feb 25 17:35:01 2004 Subject: [llvm-commits] CVS: llvm/test/Regression/Analysis/DSGraph/constant_globals.ll Message-ID: <200402252334.RAA15256@zion.cs.uiuc.edu> Changes in directory llvm/test/Regression/Analysis/DSGraph: constant_globals.ll added (r1.1) --- Log message: New testcase --- Diffs of the changes: (+22 -0) Index: llvm/test/Regression/Analysis/DSGraph/constant_globals.ll diff -c /dev/null llvm/test/Regression/Analysis/DSGraph/constant_globals.ll:1.1 *** /dev/null Wed Feb 25 17:34:14 2004 --- llvm/test/Regression/Analysis/DSGraph/constant_globals.ll Wed Feb 25 17:34:04 2004 *************** *** 0 **** --- 1,22 ---- + ; RUN: analyze %s -datastructure-gc -dsgc-dspass=bu -dsgc-check-flags=A:SM + ; Constant globals should not mark stuff incomplete. This should allow the + ; bu pass to resolve the indirect call immediately in "test", allowing %A to + ; be marked complete and the store to happen. + + ; This is the common case for handling vtables aggressively. + + %G = constant void (int*)* %foo + + implementation + + void %foo(int *%X) { + store int 0, int* %X + ret void + } + + void %test() { + %Fp = load void (int*)** %G + %A = alloca int + call void %Fp(int* %A) + ret void + } From lattner at cs.uiuc.edu Wed Feb 25 17:37:02 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Wed Feb 25 17:37:02 2004 Subject: [llvm-commits] CVS: llvm/lib/Analysis/DataStructure/DataStructure.cpp Message-ID: <200402252336.RAA15273@zion.cs.uiuc.edu> Changes in directory llvm/lib/Analysis/DataStructure: DataStructure.cpp updated: 1.159 -> 1.160 --- Log message: Two changes: 1. Functions do not make things incomplete, only variables 2. Constant global variables no longer need to be marked incomplete, because we are guaranteed that the initializer for the global will be in the graph we are hacking on now. This makes resolution of indirect calls happen a lot more in the bu pass, supports things like vtables and the C counterparts (giant constant arrays of function pointers), etc... Testcase here: test/Regression/Analysis/DSGraph/constant_globals.ll --- Diffs of the changes: (+4 -1) Index: llvm/lib/Analysis/DataStructure/DataStructure.cpp diff -u llvm/lib/Analysis/DataStructure/DataStructure.cpp:1.159 llvm/lib/Analysis/DataStructure/DataStructure.cpp:1.160 --- llvm/lib/Analysis/DataStructure/DataStructure.cpp:1.159 Wed Feb 25 17:08:00 2004 +++ llvm/lib/Analysis/DataStructure/DataStructure.cpp Wed Feb 25 17:36:08 2004 @@ -13,6 +13,7 @@ #include "llvm/Analysis/DSGraph.h" #include "llvm/Function.h" +#include "llvm/GlobalVariable.h" #include "llvm/iOther.h" #include "llvm/DerivedTypes.h" #include "llvm/Target/TargetData.h" @@ -1353,7 +1354,9 @@ if ((Flags & DSGraph::IgnoreGlobals) == 0) for (DSScalarMap::global_iterator I = ScalarMap.global_begin(), E = ScalarMap.global_end(); I != E; ++I) - markIncompleteNode(ScalarMap[*I].getNode()); + if (GlobalVariable *GV = dyn_cast(*I)) + if (!GV->isConstant()) + markIncompleteNode(ScalarMap[GV].getNode()); } static inline void killIfUselessEdge(DSNodeHandle &Edge) { From alkis at niobe.cs.uiuc.edu Wed Feb 25 17:42:01 2004 From: alkis at niobe.cs.uiuc.edu (Alkis Evlogimenos) Date: Wed Feb 25 17:42:01 2004 Subject: [llvm-commits] CVS: llvm/configure Makefile.config.in Message-ID: <200402252341.i1PNfhC00936@niobe.cs.uiuc.edu> Changes in directory llvm: configure updated: 1.81 -> 1.82 Makefile.config.in updated: 1.22 -> 1.23 --- Log message: Complete the SPEC_ROOT and USE_SPEC to SPEC2000_ROOT and USE_SPEC200 rename. --- Diffs of the changes: (+13 -15) Index: llvm/configure diff -u llvm/configure:1.81 llvm/configure:1.82 --- llvm/configure:1.81 Tue Feb 24 15:43:36 2004 +++ llvm/configure Wed Feb 25 17:41:30 2004 @@ -465,7 +465,7 @@ #endif" ac_unique_file=""Makefile.config.in"" -ac_subst_vars='SHELL PATH_SEPARATOR PACKAGE_NAME PACKAGE_TARNAME PACKAGE_VERSION PACKAGE_STRING PACKAGE_BUGREPORT exec_prefix prefix program_transform_name bindir sbindir libexecdir datadir sysconfdir sharedstatedir localstatedir libdir includedir oldincludedir infodir mandir build_alias host_alias target_alias DEFS ECHO_C ECHO_N ECHO_T LIBS subdirs INSTALL_PROGRAM INSTALL_SCRIPT INSTALL_DATA build build_cpu build_vendor build_os host host_cpu host_vendor host_os target target_cpu target_vendor target_os OS LLVMGCCDIR ARCH CXX CXXFLAGS LDFLAGS CPPFLAGS ac_ct_CXX EXEEXT OBJEXT CC CFLAGS ac_ct_CC CPP ifGNUmake LEX LEXLIB LEX_OUTPUT_ROOT YACC BISON EGREP LN_S ECHO AR ac_ct_AR RANLIB ac_ct_RANLIB STRIP ac_ct_STRIP CXXCPP F77 FFLAGS ac_ct_F77 LIBTOOL DOT ETAGS ETAGSFLAGS PYTHON QMTEST HAVE_PTHREAD_MUTEX_LOCK INCLUDE_SYS_TYPES_H INCLUDE_INTTYPES_H ENDIAN HAVE_STD_EXT_HASH_MAP HAVE_GNU_EXT_HASH_MAP HAVE_GLOBAL_HASH_MAP HAVE_STD_EXT_HASH_SET HAVE_GNU_EXT_HASH_SET HAVE_GLOBAL_HASH_S! ET HAVE_STD_ITERATOR HAVE_BI_ITERATOR HAVE_FWD_ITERATOR ALLOCA MMAP_FILE ENABLE_OPTIMIZED SPEC_ROOT USE_SPEC SPEC95_ROOT USE_SPEC95 POVRAY_ROOT USE_POVRAY UPB DISABLE_LLC_DIFFS JIT LLVMCC1 LLVMCC1PLUS BCR PAPIDIR SHLIBEXT LIBOBJS LTLIBOBJS' +ac_subst_vars='SHELL PATH_SEPARATOR PACKAGE_NAME PACKAGE_TARNAME PACKAGE_VERSION PACKAGE_STRING PACKAGE_BUGREPORT exec_prefix prefix program_transform_name bindir sbindir libexecdir datadir sysconfdir sharedstatedir localstatedir libdir includedir oldincludedir infodir mandir build_alias host_alias target_alias DEFS ECHO_C ECHO_N ECHO_T LIBS subdirs INSTALL_PROGRAM INSTALL_SCRIPT INSTALL_DATA build build_cpu build_vendor build_os host host_cpu host_vendor host_os target target_cpu target_vendor target_os OS LLVMGCCDIR ARCH CXX CXXFLAGS LDFLAGS CPPFLAGS ac_ct_CXX EXEEXT OBJEXT CC CFLAGS ac_ct_CC CPP ifGNUmake LEX LEXLIB LEX_OUTPUT_ROOT YACC BISON EGREP LN_S ECHO AR ac_ct_AR RANLIB ac_ct_RANLIB STRIP ac_ct_STRIP CXXCPP F77 FFLAGS ac_ct_F77 LIBTOOL DOT ETAGS ETAGSFLAGS PYTHON QMTEST HAVE_PTHREAD_MUTEX_LOCK INCLUDE_SYS_TYPES_H INCLUDE_INTTYPES_H ENDIAN HAVE_STD_EXT_HASH_MAP HAVE_GNU_EXT_HASH_MAP HAVE_GLOBAL_HASH_MAP HAVE_STD_EXT_HASH_SET HAVE_GNU_EXT_HASH_SET HAVE_GLOBAL_HASH_S! ET HAVE_STD_ITERATOR HAVE_BI_ITERATOR HAVE_FWD_ITERATOR ALLOCA MMAP_FILE ENABLE_OPTIMIZED SPEC2000_ROOT USE_SPEC2000 SPEC95_ROOT USE_SPEC95 POVRAY_ROOT USE_POVRAY UPB DISABLE_LLC_DIFFS JIT LLVMCC1 LLVMCC1PLUS BCR PAPIDIR SHLIBEXT LIBOBJS LTLIBOBJS' ac_subst_files='' # Initialize some variables set by options. @@ -21841,25 +21841,25 @@ then if test -d /home/vadve/shared/benchmarks/speccpu2000/benchspec then - SPEC_ROOT=/home/vadve/shared/benchmarks/speccpu2000/benchspec + SPEC2000_ROOT=/home/vadve/shared/benchmarks/speccpu2000/benchspec - USE_SPEC=USE_SPEC=1 + USE_SPEC2000=USE_SPEC2000=1 else - USE_SPEC= + USE_SPEC2000= fi else if test ${enableval} = "" then - SPEC_ROOT=/home/vadve/shared/benchmarks/speccpu2000/benchspec + SPEC2000_ROOT=/home/vadve/shared/benchmarks/speccpu2000/benchspec else - SPEC_ROOT=${enableval} + SPEC2000_ROOT=${enableval} fi - USE_SPEC=USE_SPEC=1 + USE_SPEC2000=USE_SPEC2000=1 fi @@ -22870,8 +22870,8 @@ s, at ALLOCA@,$ALLOCA,;t t s, at MMAP_FILE@,$MMAP_FILE,;t t s, at ENABLE_OPTIMIZED@,$ENABLE_OPTIMIZED,;t t -s, at SPEC_ROOT@,$SPEC_ROOT,;t t -s, at USE_SPEC@,$USE_SPEC,;t t +s, at SPEC2000_ROOT@,$SPEC2000_ROOT,;t t +s, at USE_SPEC2000@,$USE_SPEC2000,;t t s, at SPEC95_ROOT@,$SPEC95_ROOT,;t t s, at USE_SPEC95@,$USE_SPEC95,;t t s, at POVRAY_ROOT@,$POVRAY_ROOT,;t t Index: llvm/Makefile.config.in diff -u llvm/Makefile.config.in:1.22 llvm/Makefile.config.in:1.23 --- llvm/Makefile.config.in:1.22 Fri Feb 20 16:30:46 2004 +++ llvm/Makefile.config.in Wed Feb 25 17:41:32 2004 @@ -84,15 +84,13 @@ BYTECODE_REPOSITORY := @BCR@ # SPEC benchmarks: -# Set the USE_SPEC variable to enable the use of the SPEC benchmarks. +# If these are set then run the SPEC benchmarks. # You must provide the SPEC benchmarks on your own. - at USE_SPEC@ + at USE_SPEC2000@ @USE_SPEC95@ -# Path to the SPEC benchmarks. If you have the SPEC benchmarks, place the -# path here. -#SPEC_ROOT := /home/vadve/shared/benchmarks/speccpu2000/benchspec -SPEC_ROOT := @SPEC_ROOT@ +# Path to the SPEC benchmarks. +SPEC_ROOT := @SPEC2000_ROOT@ SPEC95_ROOT := @SPEC95_ROOT@ # Path to the Povray source code. From alkis at niobe.cs.uiuc.edu Wed Feb 25 17:48:01 2004 From: alkis at niobe.cs.uiuc.edu (Alkis Evlogimenos) Date: Wed Feb 25 17:48:01 2004 Subject: [llvm-commits] CVS: llvm/Makefile.config.in Message-ID: <200402252347.i1PNlTw08337@niobe.cs.uiuc.edu> Changes in directory llvm: Makefile.config.in updated: 1.23 -> 1.24 --- Log message: Fix typo. I wonder how this actually worked. --- Diffs of the changes: (+1 -1) Index: llvm/Makefile.config.in diff -u llvm/Makefile.config.in:1.23 llvm/Makefile.config.in:1.24 --- llvm/Makefile.config.in:1.23 Wed Feb 25 17:41:32 2004 +++ llvm/Makefile.config.in Wed Feb 25 17:47:17 2004 @@ -90,7 +90,7 @@ @USE_SPEC95@ # Path to the SPEC benchmarks. -SPEC_ROOT := @SPEC2000_ROOT@ +SPEC2000_ROOT := @SPEC2000_ROOT@ SPEC95_ROOT := @SPEC95_ROOT@ # Path to the Povray source code. From alkis at niobe.cs.uiuc.edu Wed Feb 25 18:02:01 2004 From: alkis at niobe.cs.uiuc.edu (Alkis Evlogimenos) Date: Wed Feb 25 18:02:01 2004 Subject: [llvm-commits] CVS: llvm/test/Programs/External/SPEC/CFP2000/183.equake/Makefile Message-ID: <200402260001.i1Q01VW16718@niobe.cs.uiuc.edu> Changes in directory llvm/test/Programs/External/SPEC/CFP2000/183.equake: Makefile updated: 1.1 -> 1.2 --- Log message: Make SPEC tests share a common Makefile. --- Diffs of the changes: (+1 -1) Index: llvm/test/Programs/External/SPEC/CFP2000/183.equake/Makefile diff -u llvm/test/Programs/External/SPEC/CFP2000/183.equake/Makefile:1.1 llvm/test/Programs/External/SPEC/CFP2000/183.equake/Makefile:1.2 --- llvm/test/Programs/External/SPEC/CFP2000/183.equake/Makefile:1.1 Mon Jun 23 12:19:45 2003 +++ llvm/test/Programs/External/SPEC/CFP2000/183.equake/Makefile Wed Feb 25 18:01:21 2004 @@ -3,4 +3,4 @@ STDIN_FILENAME = inp.in STDOUT_FILENAME = inp.out CPPFLAGS = -include ../../Makefile.spec +include ../../Makefile.spec2000 From alkis at niobe.cs.uiuc.edu Wed Feb 25 18:02:34 2004 From: alkis at niobe.cs.uiuc.edu (Alkis Evlogimenos) Date: Wed Feb 25 18:02:34 2004 Subject: [llvm-commits] CVS: llvm/test/Programs/External/SPEC/Makefile.spec2000 Makefile.spec95 Makefile.spec Message-ID: <200402260001.i1Q01VR16751@niobe.cs.uiuc.edu> Changes in directory llvm/test/Programs/External/SPEC: Makefile.spec2000 added (r1.1) Makefile.spec95 updated: 1.4 -> 1.5 Makefile.spec updated: 1.25 -> 1.26 --- Log message: Make SPEC tests share a common Makefile. --- Diffs of the changes: (+21 -195) Index: llvm/test/Programs/External/SPEC/Makefile.spec2000 diff -c /dev/null llvm/test/Programs/External/SPEC/Makefile.spec2000:1.1 *** /dev/null Wed Feb 25 18:01:31 2004 --- llvm/test/Programs/External/SPEC/Makefile.spec2000 Wed Feb 25 18:01:21 2004 *************** *** 0 **** --- 1,12 ---- + ##===- Makefile.spec2000 -----------------------------------*- Makefile -*-===## + # + # This makefile contains information for building SPEC2000 as an external test. + # + ##===----------------------------------------------------------------------===## + + include $(LEVEL)/Makefile.config + + SPEC_ROOT := $(SPEC2000_ROOT) + CPPFLAGS += -DSPEC_CPU2000 + + include $(LEVEL)/test/Programs/External/SPEC/Makefile.spec Index: llvm/test/Programs/External/SPEC/Makefile.spec95 diff -u llvm/test/Programs/External/SPEC/Makefile.spec95:1.4 llvm/test/Programs/External/SPEC/Makefile.spec95:1.5 --- llvm/test/Programs/External/SPEC/Makefile.spec95:1.4 Tue Feb 24 15:16:06 2004 +++ llvm/test/Programs/External/SPEC/Makefile.spec95 Wed Feb 25 18:01:21 2004 @@ -1,198 +1,12 @@ -##===- Makefile.spec ---------------------------------------*- Makefile -*-===## +##===- Makefile.spec95 -------------------------------------*- Makefile -*-===## # -# This makefile contains information for building SPEC as an external test. +# This makefile contains information for building SPEC95 as an external test. # ##===----------------------------------------------------------------------===## include $(LEVEL)/Makefile.config -# RUN_TYPE - Either ref, test, or train. May be specified on the command line. -ifdef LARGE_PROBLEM_SIZE -RUN_TYPE := train -else -RUN_TYPE := test -endif - -## Information the test should have provided... -ifndef STDOUT_FILENAME -STDOUT_FILENAME := standard.out -endif -ifndef LDFLAGS -LDFLAGS = -lm -endif - -# Get the current directory, the name of the benchmark, and the current -# subdirectory of the SPEC directory we are in (ie, CINT2000/164.gzip) -# -CURRENT_DIR := $(shell cd .; pwd) -BENCH_NAME := $(subst $(shell cd .. ; pwd),,$(CURRENT_DIR)) -SPEC_SUBDIR := $(subst $(shell cd ../..; pwd),,$(CURRENT_DIR)) - -# Remove any leading /'s from the paths -BENCH_NAME := $(patsubst /%,%,$(BENCH_NAME)) -SPEC_SUBDIR := $(patsubst /%,%,$(SPEC_SUBDIR)) - -SPEC_BENCH_DIR := $(SPEC95_ROOT)/$(SPEC_SUBDIR) - -PROG := $(BENCH_NAME) -ifndef Source -Source := $(wildcard $(SPEC_BENCH_DIR)/src/*.c $(SPEC_BENCH_DIR)/src/*.cc) -endif - -# Disable the default Output/%.out-* targets... -PROGRAMS_HAVE_CUSTOM_RUN_RULES := 1 -SourceDir := $(SPEC_BENCH_DIR)/src/ - -include $(LEVEL)/test/Programs/MultiSource/Makefile.multisrc - -# Do not pass -Wall to compile commands... -LCCFLAGS := -O2 -LCXXFLAGS := -O2 - -CPPFLAGS += -DSPEC_CPU2000 -I $(SPEC_BENCH_DIR)/src/ -SPEC_SANDBOX := $(LLVM_SRC_ROOT)/test/Programs/External/SPEC/Sandbox.sh - -# Information about testing the program... -REF_IN_DIR := $(SPEC_BENCH_DIR)/data/$(RUN_TYPE)/input/ -REF_OUT_DIR := $(SPEC_BENCH_DIR)/data/$(RUN_TYPE)/output/ -LOCAL_OUTPUTS := $(notdir $(wildcard $(REF_OUT_DIR)/*)) - - -# Specify how to generate output from the SPEC programs. Basically we just run -# the program in a sandbox (a special directory we create), then we cat all of -# the outputs together. - -$(PROGRAMS_TO_TEST:%=Output/%.out-nat): \ -Output/%.out-nat: Output/%.native - $(SPEC_SANDBOX) nat-$(RUN_TYPE) $@ $(REF_IN_DIR) \ - $(RUNSAFELY) $(STDIN_FILENAME) $(STDOUT_FILENAME) \ - ../../$< $(RUN_OPTIONS) - -(cd Output/nat-$(RUN_TYPE); cat $(LOCAL_OUTPUTS)) > $@ - -cp Output/nat-$(RUN_TYPE)/$(STDOUT_FILENAME).time $@.time - -$(PROGRAMS_TO_TEST:%=Output/%.out-lli): \ -Output/%.out-lli: Output/%.llvm.bc $(LLI) - $(SPEC_SANDBOX) lli-$(RUN_TYPE) $@ $(REF_IN_DIR) \ - $(RUNSAFELY) $(STDIN_FILENAME) $(STDOUT_FILENAME) \ - $(LLI) $(LLI_OPTS) ../../$< $(RUN_OPTIONS) - -(cd Output/lli-$(RUN_TYPE); cat $(LOCAL_OUTPUTS)) > $@ - -cp Output/lli-$(RUN_TYPE)/$(STDOUT_FILENAME).time $@.time - -$(PROGRAMS_TO_TEST:%=Output/%.out-jit): \ -Output/%.out-jit: Output/%.llvm.bc $(LLI) - $(SPEC_SANDBOX) jit-$(RUN_TYPE) $@ $(REF_IN_DIR) \ - $(RUNSAFELY) $(STDIN_FILENAME) $(STDOUT_FILENAME) \ - $(LLI) $(JIT_OPTS) ../../$< $(RUN_OPTIONS) - -(cd Output/jit-$(RUN_TYPE); cat $(LOCAL_OUTPUTS)) > $@ - -cp Output/jit-$(RUN_TYPE)/$(STDOUT_FILENAME).time $@.time - -$(PROGRAMS_TO_TEST:%=Output/%.out-jit-ls): \ -Output/%.out-jit-ls: Output/%.llvm.bc $(LLI) - $(SPEC_SANDBOX) jit-ls-$(RUN_TYPE) $@ $(REF_IN_DIR) \ - $(RUNSAFELY) $(STDIN_FILENAME) $(STDOUT_FILENAME) \ - $(LLI) -regalloc=linearscan $(JIT_OPTS) ../../$< $(RUN_OPTIONS) - -(cd Output/jit-ls-$(RUN_TYPE); cat $(LOCAL_OUTPUTS)) > $@ - -cp Output/jit-ls-$(RUN_TYPE)/$(STDOUT_FILENAME).time $@.time - -$(PROGRAMS_TO_TEST:%=Output/%.out-llc): \ -Output/%.out-llc: Output/%.llc - $(SPEC_SANDBOX) llc-$(RUN_TYPE) $@ $(REF_IN_DIR) \ - $(RUNSAFELY) $(STDIN_FILENAME) $(STDOUT_FILENAME) \ - ../../$< $(RUN_OPTIONS) - -(cd Output/llc-$(RUN_TYPE); cat $(LOCAL_OUTPUTS)) > $@ - -cp Output/llc-$(RUN_TYPE)/$(STDOUT_FILENAME).time $@.time - -$(PROGRAMS_TO_TEST:%=Output/%.out-llc-ls): \ -Output/%.out-llc-ls: Output/%.llc-ls - $(SPEC_SANDBOX) llc-ls-$(RUN_TYPE) $@ $(REF_IN_DIR) \ - $(RUNSAFELY) $(STDIN_FILENAME) $(STDOUT_FILENAME) \ - ../../$< $(RUN_OPTIONS) - -(cd Output/llc-ls-$(RUN_TYPE); cat $(LOCAL_OUTPUTS)) > $@ - -cp Output/llc-ls-$(RUN_TYPE)/$(STDOUT_FILENAME).time $@.time - -$(PROGRAMS_TO_TEST:%=Output/%.out-cbe): \ -Output/%.out-cbe: Output/%.cbe - $(SPEC_SANDBOX) cbe-$(RUN_TYPE) $@ $(REF_IN_DIR) \ - $(RUNSAFELY) $(STDIN_FILENAME) $(STDOUT_FILENAME) \ - ../../$< $(RUN_OPTIONS) - -(cd Output/cbe-$(RUN_TYPE); cat $(LOCAL_OUTPUTS)) > $@ - -cp Output/cbe-$(RUN_TYPE)/$(STDOUT_FILENAME).time $@.time - -$(PROGRAMS_TO_TEST:%=Output/%.trace-out-llc): \ -Output/%.trace-out-llc: Output/%.trace.llc - $(SPEC_SANDBOX) llc-$(RUN_TYPE) $@ $(REF_IN_DIR) \ - $(RUNSAFELY) $(STDIN_FILENAME) $(STDOUT_FILENAME) \ - ../../$< $(RUN_OPTIONS) - -(cd Output/llc-$(RUN_TYPE); cat $(LOCAL_OUTPUTS)) > $@ - -cp Output/llc-$(RUN_TYPE)/$(STDOUT_FILENAME).time $@.time - -$(PROGRAMS_TO_TEST:%=Output/%.trace-out-cbe): \ -Output/%.trace-out-cbe: Output/%.trace.cbe - $(SPEC_SANDBOX) cbe-$(RUN_TYPE) $@ $(REF_IN_DIR) \ - $(RUNSAFELY) $(STDIN_FILENAME) $(STDOUT_FILENAME) \ - ../../$< $(RUN_OPTIONS) - -(cd Output/cbe-$(RUN_TYPE); cat $(LOCAL_OUTPUTS)) > $@ - -cp Output/cbe-$(RUN_TYPE)/$(STDOUT_FILENAME).time $@.time - - -# Specify stdin, reference output, and command line options for the program... -BUGPOINT_OPTIONS += -input=$(STDIN_FILENAME) -output=../$*.out-nat -BUGPOINT_OPTIONS += --args -- $(RUN_OPTIONS) - -# Rules to bugpoint the GCCAS, GCCLD, LLC, or LLI commands... -$(PROGRAMS_TO_TEST:%=Output/%.bugpoint-gccas): \ -Output/%.bugpoint-gccas: Output/%.noopt-llvm.bc $(LBUGPOINT) \ - Output/gccas-pass-args Output/%.out-nat - $(SPEC_SANDBOX) bugpoint-$(RUN_TYPE) $@ $(REF_IN_DIR) \ - $(LBUGPOINT) ../../$< `cat Output/gccas-pass-args` $(BUGPOINT_OPTIONS) - @echo "===> Leaving Output/bugpoint-$(RUN_TYPE)" - -$(PROGRAMS_TO_TEST:%=Output/%.bugpoint-gccld): \ -Output/%.bugpoint-gccld: Output/%.noopt-llvm.bc $(LBUGPOINT) \ - Output/gccld-pass-args Output/%.out-nat - $(SPEC_SANDBOX) bugpoint-$(RUN_TYPE) $@ $(REF_IN_DIR) \ - $(LBUGPOINT) ../../$< `cat Output/gccld-pass-args` $(BUGPOINT_OPTIONS) - @echo "===> Leaving Output/bugpoint-$(RUN_TYPE)" - -$(PROGRAMS_TO_TEST:%=Output/%.bugpoint-llc): \ -Output/%.bugpoint-llc: Output/%.llvm.bc $(LBUGPOINT) Output/%.out-nat - $(SPEC_SANDBOX) bugpoint-$(RUN_TYPE) $@ $(REF_IN_DIR) \ - $(LBUGPOINT) ../../$< -run-llc $(BUGPOINT_OPTIONS) - @echo "===> Leaving Output/bugpoint-$(RUN_TYPE)" - -$(PROGRAMS_TO_TEST:%=Output/%.bugpoint-jit): \ -Output/%.bugpoint-jit: Output/%.llvm.bc $(LBUGPOINT) Output/%.out-nat - $(SPEC_SANDBOX) bugpoint-$(RUN_TYPE) $@ $(REF_IN_DIR) \ - $(LBUGPOINT) ../../$< -run-jit $(BUGPOINT_OPTIONS) - @echo "===> Leaving Output/bugpoint-$(RUN_TYPE)" - - -LIBPROFILESO = $(LEVEL)/lib/Debug/libprofile_rt.so - -$(PROGRAMS_TO_TEST:%=Output/%.prof): \ -Output/%.prof: Output/%.llvm-prof.bc Output/%.out-nat $(LIBPROFILESO) - @rm -f $@ - $(SPEC_SANDBOX) profile-$(RUN_TYPE) Output/$*.out-prof $(REF_IN_DIR) \ - $(RUNSAFELY) $(STDIN_FILENAME) $(STDOUT_FILENAME) $(LLI) $(JIT_OPTS)\ - -fake-argv0 '../$*.llvm.bc' -load ../../$(LIBPROFILESO) ../../$< -llvmprof-output ../../$@ $(RUN_OPTIONS) - -(cd Output/profile-$(RUN_TYPE); cat $(LOCAL_OUTPUTS)) > Output/$*.out-prof - -cp Output/profile-$(RUN_TYPE)/$(STDOUT_FILENAME).time $@.time - @cmp -s Output/$*.out-prof Output/$*.out-nat || \ - printf "***\n***\n*** WARNING: Output of profiled program (Output/$*.out-prof)\n*** doesn't match the output of the native program (Output/$*.out-nat)!\n***\n***\n"; - - - - - -$(PROGRAMS_TO_TEST:%=Output/%.out-tracing): \ -Output/%.out-tracing: Output/%.trace - $(SPEC_SANDBOX) trace-$(RUN_TYPE) $@ $(REF_IN_DIR) \ - $(RUNSAFELY) $(STDIN_FILENAME) $(STDOUT_FILENAME) \ - ../../$< $(RUN_OPTIONS) - -(cd Output/trace-$(RUN_TYPE); cat $(LOCAL_OUTPUTS)) > $@ - -cp Output/trace-$(RUN_TYPE)/$(STDOUT_FILENAME).time $@.time - -$(PROGRAMS_TO_TEST:%=Output/%.performance): \ -Output/%.performance: Output/%.out-llc Output/%.out-tracing - -$(TIMESCRIPT) $* Output/$*.out-llc.time Output/$*.out-tracing.time $@ +SPEC_ROOT := $(SPEC95_ROOT) +CPPFLAGS += -DSPEC_CPU95 +include $(LEVEL)/test/Programs/External/SPEC/Makefile.spec Index: llvm/test/Programs/External/SPEC/Makefile.spec diff -u llvm/test/Programs/External/SPEC/Makefile.spec:1.25 llvm/test/Programs/External/SPEC/Makefile.spec:1.26 --- llvm/test/Programs/External/SPEC/Makefile.spec:1.25 Wed Feb 25 17:19:24 2004 +++ llvm/test/Programs/External/SPEC/Makefile.spec Wed Feb 25 18:01:21 2004 @@ -1,6 +1,7 @@ ##===- Makefile.spec ---------------------------------------*- Makefile -*-===## # -# This makefile contains information for building SPEC as an external test. +# This makefile is a template for building SPEC as an external +# test. It is included by Makefile.spec2000 and Makefile.spec95. # ##===----------------------------------------------------------------------===## @@ -32,7 +33,7 @@ BENCH_NAME := $(patsubst /%,%,$(BENCH_NAME)) SPEC_SUBDIR := $(patsubst /%,%,$(SPEC_SUBDIR)) -SPEC_BENCH_DIR := $(SPEC2000_ROOT)/$(SPEC_SUBDIR) +SPEC_BENCH_DIR := $(SPEC_ROOT)/$(SPEC_SUBDIR) PROG := $(BENCH_NAME) ifndef Source @@ -49,7 +50,7 @@ LCCFLAGS := -O3 LCXXFLAGS := -O3 -CPPFLAGS += -DSPEC_CPU2000 -I $(SPEC_BENCH_DIR)/src/ +CPPFLAGS += -I $(SPEC_BENCH_DIR)/src/ SPEC_SANDBOX := $(LLVM_SRC_ROOT)/test/Programs/External/SPEC/Sandbox.sh # Information about testing the program... @@ -195,4 +196,3 @@ $(PROGRAMS_TO_TEST:%=Output/%.performance): \ Output/%.performance: Output/%.out-llc Output/%.out-tracing -$(TIMESCRIPT) $* Output/$*.out-llc.time Output/$*.out-tracing.time $@ - From alkis at niobe.cs.uiuc.edu Wed Feb 25 18:03:08 2004 From: alkis at niobe.cs.uiuc.edu (Alkis Evlogimenos) Date: Wed Feb 25 18:03:08 2004 Subject: [llvm-commits] CVS: llvm/test/Programs/External/SPEC/CFP2000/177.mesa/Makefile Message-ID: <200402260001.i1Q01Vm16734@niobe.cs.uiuc.edu> Changes in directory llvm/test/Programs/External/SPEC/CFP2000/177.mesa: Makefile updated: 1.2 -> 1.3 --- Log message: Make SPEC tests share a common Makefile. --- Diffs of the changes: (+1 -1) Index: llvm/test/Programs/External/SPEC/CFP2000/177.mesa/Makefile diff -u llvm/test/Programs/External/SPEC/CFP2000/177.mesa/Makefile:1.2 llvm/test/Programs/External/SPEC/CFP2000/177.mesa/Makefile:1.3 --- llvm/test/Programs/External/SPEC/CFP2000/177.mesa/Makefile:1.2 Tue Sep 30 12:29:18 2003 +++ llvm/test/Programs/External/SPEC/CFP2000/177.mesa/Makefile Wed Feb 25 18:01:21 2004 @@ -20,4 +20,4 @@ texstate.c texture.c triangle.c varray.c vb.c vbfill.c vbrender.c \ vbxform.c winpos.c xform.c mesa4.c) -include ../../Makefile.spec +include ../../Makefile.spec2000 From alkis at niobe.cs.uiuc.edu Wed Feb 25 18:03:41 2004 From: alkis at niobe.cs.uiuc.edu (Alkis Evlogimenos) Date: Wed Feb 25 18:03:41 2004 Subject: [llvm-commits] CVS: llvm/test/Programs/External/SPEC/CINT2000/175.vpr/Makefile Message-ID: <200402260001.i1Q01Vp16697@niobe.cs.uiuc.edu> Changes in directory llvm/test/Programs/External/SPEC/CINT2000/175.vpr: Makefile updated: 1.2 -> 1.3 --- Log message: Make SPEC tests share a common Makefile. --- Diffs of the changes: (+1 -1) Index: llvm/test/Programs/External/SPEC/CINT2000/175.vpr/Makefile diff -u llvm/test/Programs/External/SPEC/CINT2000/175.vpr/Makefile:1.2 llvm/test/Programs/External/SPEC/CINT2000/175.vpr/Makefile:1.3 --- llvm/test/Programs/External/SPEC/CINT2000/175.vpr/Makefile:1.2 Fri Jun 20 18:02:13 2003 +++ llvm/test/Programs/External/SPEC/CINT2000/175.vpr/Makefile Wed Feb 25 18:01:20 2004 @@ -3,4 +3,4 @@ RUN_OPTIONS = net.in arch.in place.out dum.out -nodisp -place_only -init_t 5 -exit_t 0.005 -alpha_t 0.9412 -inner_num 2 STDOUT_FILENAME := place_log.out CPPFLAGS := -DNO_GRAPHICS -include ../../Makefile.spec +include ../../Makefile.spec2000 From alkis at niobe.cs.uiuc.edu Wed Feb 25 18:04:14 2004 From: alkis at niobe.cs.uiuc.edu (Alkis Evlogimenos) Date: Wed Feb 25 18:04:14 2004 Subject: [llvm-commits] CVS: llvm/test/Programs/External/SPEC/CFP2000/188.ammp/Makefile Message-ID: <200402260001.i1Q01VZ16717@niobe.cs.uiuc.edu> Changes in directory llvm/test/Programs/External/SPEC/CFP2000/188.ammp: Makefile updated: 1.1 -> 1.2 --- Log message: Make SPEC tests share a common Makefile. --- Diffs of the changes: (+1 -1) Index: llvm/test/Programs/External/SPEC/CFP2000/188.ammp/Makefile diff -u llvm/test/Programs/External/SPEC/CFP2000/188.ammp/Makefile:1.1 llvm/test/Programs/External/SPEC/CFP2000/188.ammp/Makefile:1.2 --- llvm/test/Programs/External/SPEC/CFP2000/188.ammp/Makefile:1.1 Mon Jun 23 13:17:18 2003 +++ llvm/test/Programs/External/SPEC/CFP2000/188.ammp/Makefile Wed Feb 25 18:01:21 2004 @@ -3,4 +3,4 @@ STDIN_FILENAME = ammp.in STDOUT_FILENAME = ammp.out CPPFLAGS = -include ../../Makefile.spec +include ../../Makefile.spec2000 From alkis at niobe.cs.uiuc.edu Wed Feb 25 18:04:48 2004 From: alkis at niobe.cs.uiuc.edu (Alkis Evlogimenos) Date: Wed Feb 25 18:04:48 2004 Subject: [llvm-commits] CVS: llvm/test/Programs/External/SPEC/CFP2000/179.art/Makefile Message-ID: <200402260001.i1Q01Vj16730@niobe.cs.uiuc.edu> Changes in directory llvm/test/Programs/External/SPEC/CFP2000/179.art: Makefile updated: 1.1 -> 1.2 --- Log message: Make SPEC tests share a common Makefile. --- Diffs of the changes: (+1 -1) Index: llvm/test/Programs/External/SPEC/CFP2000/179.art/Makefile diff -u llvm/test/Programs/External/SPEC/CFP2000/179.art/Makefile:1.1 llvm/test/Programs/External/SPEC/CFP2000/179.art/Makefile:1.2 --- llvm/test/Programs/External/SPEC/CFP2000/179.art/Makefile:1.1 Mon Jun 23 12:15:18 2003 +++ llvm/test/Programs/External/SPEC/CFP2000/179.art/Makefile Wed Feb 25 18:01:21 2004 @@ -8,4 +8,4 @@ STDOUT_FILENAME = $(RUN_TYPE).out CPPFLAGS = -include ../../Makefile.spec +include ../../Makefile.spec2000 From alkis at niobe.cs.uiuc.edu Wed Feb 25 18:05:22 2004 From: alkis at niobe.cs.uiuc.edu (Alkis Evlogimenos) Date: Wed Feb 25 18:05:22 2004 Subject: [llvm-commits] CVS: llvm/test/Programs/External/SPEC/CINT2000/181.mcf/Makefile Message-ID: <200402260001.i1Q01V416683@niobe.cs.uiuc.edu> Changes in directory llvm/test/Programs/External/SPEC/CINT2000/181.mcf: Makefile updated: 1.1 -> 1.2 --- Log message: Make SPEC tests share a common Makefile. --- Diffs of the changes: (+1 -1) Index: llvm/test/Programs/External/SPEC/CINT2000/181.mcf/Makefile diff -u llvm/test/Programs/External/SPEC/CINT2000/181.mcf/Makefile:1.1 llvm/test/Programs/External/SPEC/CINT2000/181.mcf/Makefile:1.2 --- llvm/test/Programs/External/SPEC/CINT2000/181.mcf/Makefile:1.1 Wed May 14 18:20:17 2003 +++ llvm/test/Programs/External/SPEC/CINT2000/181.mcf/Makefile Wed Feb 25 18:01:20 2004 @@ -1,4 +1,4 @@ LEVEL = ../../../../../.. RUN_OPTIONS := inp.in STDOUT_FILENAME := inp.out -include ../../Makefile.spec +include ../../Makefile.spec2000 From alkis at niobe.cs.uiuc.edu Wed Feb 25 18:05:56 2004 From: alkis at niobe.cs.uiuc.edu (Alkis Evlogimenos) Date: Wed Feb 25 18:05:56 2004 Subject: [llvm-commits] CVS: llvm/test/Programs/External/SPEC/CINT2000/164.gzip/Makefile Message-ID: <200402260001.i1Q01VB16701@niobe.cs.uiuc.edu> Changes in directory llvm/test/Programs/External/SPEC/CINT2000/164.gzip: Makefile updated: 1.1 -> 1.2 --- Log message: Make SPEC tests share a common Makefile. --- Diffs of the changes: (+1 -1) Index: llvm/test/Programs/External/SPEC/CINT2000/164.gzip/Makefile diff -u llvm/test/Programs/External/SPEC/CINT2000/164.gzip/Makefile:1.1 llvm/test/Programs/External/SPEC/CINT2000/164.gzip/Makefile:1.2 --- llvm/test/Programs/External/SPEC/CINT2000/164.gzip/Makefile:1.1 Wed May 14 18:27:46 2003 +++ llvm/test/Programs/External/SPEC/CINT2000/164.gzip/Makefile Wed Feb 25 18:01:20 2004 @@ -1,4 +1,4 @@ LEVEL = ../../../../../.. RUN_OPTIONS = `cat $(REF_IN_DIR)control` STDOUT_FILENAME := input.compressed.out -include ../../Makefile.spec +include ../../Makefile.spec2000 From alkis at niobe.cs.uiuc.edu Wed Feb 25 18:06:30 2004 From: alkis at niobe.cs.uiuc.edu (Alkis Evlogimenos) Date: Wed Feb 25 18:06:30 2004 Subject: [llvm-commits] CVS: llvm/test/Programs/External/SPEC/CINT2000/252.eon/Makefile Message-ID: <200402260001.i1Q01U016660@niobe.cs.uiuc.edu> Changes in directory llvm/test/Programs/External/SPEC/CINT2000/252.eon: Makefile updated: 1.6 -> 1.7 --- Log message: Make SPEC tests share a common Makefile. --- Diffs of the changes: (+1 -1) Index: llvm/test/Programs/External/SPEC/CINT2000/252.eon/Makefile diff -u llvm/test/Programs/External/SPEC/CINT2000/252.eon/Makefile:1.6 llvm/test/Programs/External/SPEC/CINT2000/252.eon/Makefile:1.7 --- llvm/test/Programs/External/SPEC/CINT2000/252.eon/Makefile:1.6 Tue Jan 27 16:07:21 2004 +++ llvm/test/Programs/External/SPEC/CINT2000/252.eon/Makefile Wed Feb 25 18:01:20 2004 @@ -49,7 +49,7 @@ mrInstance.cc mrMaterial.cc mrPhongAreaTriangleLuminaire.cc \ mrSolidTexture.cc mrSphere.cc mrSurface.cc mrSurfaceTexture.cc \ mrXYRectangle.cc mrXZRectangle.cc mrYZRectangle.cc myrand.cc) -include ../../Makefile.spec +include ../../Makefile.spec2000 LDFLAGS = -lstdc++ -lm LIBS = -lstdc++ -lm From alkis at niobe.cs.uiuc.edu Wed Feb 25 18:07:04 2004 From: alkis at niobe.cs.uiuc.edu (Alkis Evlogimenos) Date: Wed Feb 25 18:07:04 2004 Subject: [llvm-commits] CVS: llvm/test/Programs/External/SPEC/CINT2000/197.parser/Makefile Message-ID: <200402260001.i1Q01Um16667@niobe.cs.uiuc.edu> Changes in directory llvm/test/Programs/External/SPEC/CINT2000/197.parser: Makefile updated: 1.2 -> 1.3 --- Log message: Make SPEC tests share a common Makefile. --- Diffs of the changes: (+1 -1) Index: llvm/test/Programs/External/SPEC/CINT2000/197.parser/Makefile diff -u llvm/test/Programs/External/SPEC/CINT2000/197.parser/Makefile:1.2 llvm/test/Programs/External/SPEC/CINT2000/197.parser/Makefile:1.3 --- llvm/test/Programs/External/SPEC/CINT2000/197.parser/Makefile:1.2 Sat May 31 18:17:26 2003 +++ llvm/test/Programs/External/SPEC/CINT2000/197.parser/Makefile Wed Feb 25 18:01:20 2004 @@ -3,4 +3,4 @@ STDIN_FILENAME = $(RUN_TYPE).in STDOUT_FILENAME = $(RUN_TYPE).out CPPFLAGS = -include ../../Makefile.spec +include ../../Makefile.spec2000 From alkis at niobe.cs.uiuc.edu Wed Feb 25 18:07:39 2004 From: alkis at niobe.cs.uiuc.edu (Alkis Evlogimenos) Date: Wed Feb 25 18:07:39 2004 Subject: [llvm-commits] CVS: llvm/test/Programs/External/SPEC/CINT2000/176.gcc/Makefile Message-ID: <200402260001.i1Q01Vp16691@niobe.cs.uiuc.edu> Changes in directory llvm/test/Programs/External/SPEC/CINT2000/176.gcc: Makefile updated: 1.3 -> 1.4 --- Log message: Make SPEC tests share a common Makefile. --- Diffs of the changes: (+1 -1) Index: llvm/test/Programs/External/SPEC/CINT2000/176.gcc/Makefile diff -u llvm/test/Programs/External/SPEC/CINT2000/176.gcc/Makefile:1.3 llvm/test/Programs/External/SPEC/CINT2000/176.gcc/Makefile:1.4 --- llvm/test/Programs/External/SPEC/CINT2000/176.gcc/Makefile:1.3 Fri Jul 4 06:20:19 2003 +++ llvm/test/Programs/External/SPEC/CINT2000/176.gcc/Makefile Wed Feb 25 18:01:20 2004 @@ -1,7 +1,7 @@ LEVEL = ../../../../../.. RUN_OPTIONS = cccp.i -o cccp.s STDOUT_FILENAME = cccp.out -include ../../Makefile.spec +include ../../Makefile.spec2000 ifeq ($(ARCH),Sparc) ## SPEC portability note for GCC says to use these flags and cross fingers: CPPFLAGS += -DHOST_WORDS_BIG_ENDIAN -DSPEC_CPU2000_LP64 From alkis at niobe.cs.uiuc.edu Wed Feb 25 18:08:14 2004 From: alkis at niobe.cs.uiuc.edu (Alkis Evlogimenos) Date: Wed Feb 25 18:08:14 2004 Subject: [llvm-commits] CVS: llvm/test/Programs/External/SPEC/CINT2000/186.crafty/Makefile Message-ID: <200402260001.i1Q01Uh16672@niobe.cs.uiuc.edu> Changes in directory llvm/test/Programs/External/SPEC/CINT2000/186.crafty: Makefile updated: 1.4 -> 1.5 --- Log message: Make SPEC tests share a common Makefile. --- Diffs of the changes: (+1 -1) Index: llvm/test/Programs/External/SPEC/CINT2000/186.crafty/Makefile diff -u llvm/test/Programs/External/SPEC/CINT2000/186.crafty/Makefile:1.4 llvm/test/Programs/External/SPEC/CINT2000/186.crafty/Makefile:1.5 --- llvm/test/Programs/External/SPEC/CINT2000/186.crafty/Makefile:1.4 Fri Jun 20 14:00:11 2003 +++ llvm/test/Programs/External/SPEC/CINT2000/186.crafty/Makefile Wed Feb 25 18:01:20 2004 @@ -5,4 +5,4 @@ CPPFLAGS = -DSPEC_CPU2000 -DLINUX_i386 Source = $(addprefix $(SPEC_BENCH_DIR)/src/, attacks.c draw.c enprise.c init.c iterate.c make.c nexte.c output.c preeval.c resign.c searchr.c swap.c utility.c boolean.c drawn.c evaluate.c input.c lookup.c movgen.c nextr.c phase.c quiesce.c root.c setboard.c time.c validate.c edit.c history.c interupt.c main.c next.c option.c ponder.c repeat.c search.c store.c unmake.c valid.c) -include ../../Makefile.spec +include ../../Makefile.spec2000 From alkis at niobe.cs.uiuc.edu Wed Feb 25 18:08:50 2004 From: alkis at niobe.cs.uiuc.edu (Alkis Evlogimenos) Date: Wed Feb 25 18:08:50 2004 Subject: [llvm-commits] CVS: llvm/test/Programs/External/SPEC/CINT2000/254.gap/Makefile Message-ID: <200402260001.i1Q01UB16641@niobe.cs.uiuc.edu> Changes in directory llvm/test/Programs/External/SPEC/CINT2000/254.gap: Makefile updated: 1.3 -> 1.4 --- Log message: Make SPEC tests share a common Makefile. --- Diffs of the changes: (+1 -1) Index: llvm/test/Programs/External/SPEC/CINT2000/254.gap/Makefile diff -u llvm/test/Programs/External/SPEC/CINT2000/254.gap/Makefile:1.3 llvm/test/Programs/External/SPEC/CINT2000/254.gap/Makefile:1.4 --- llvm/test/Programs/External/SPEC/CINT2000/254.gap/Makefile:1.3 Tue Jul 29 17:40:03 2003 +++ llvm/test/Programs/External/SPEC/CINT2000/254.gap/Makefile Wed Feb 25 18:01:20 2004 @@ -3,7 +3,7 @@ STDOUT_FILENAME = $(RUN_TYPE).out STDIN_FILENAME = $(RUN_TYPE).in CPPFLAGS = -DSYS_IS_USG -DSYS_HAS_CALLOC_PROTO -DSYS_HAS_IOCTL_PROTO -DSYS_HAS_TIME_PROTO -include ../../Makefile.spec +include ../../Makefile.spec2000 ifeq ($(ARCH),Sparc) CPPFLAGS+= -DSPEC_CPU2000_LP64 endif From alkis at niobe.cs.uiuc.edu Wed Feb 25 18:09:25 2004 From: alkis at niobe.cs.uiuc.edu (Alkis Evlogimenos) Date: Wed Feb 25 18:09:25 2004 Subject: [llvm-commits] CVS: llvm/test/Programs/External/SPEC/CINT2000/255.vortex/Makefile Message-ID: <200402260001.i1Q01UA16634@niobe.cs.uiuc.edu> Changes in directory llvm/test/Programs/External/SPEC/CINT2000/255.vortex: Makefile updated: 1.5 -> 1.6 --- Log message: Make SPEC tests share a common Makefile. --- Diffs of the changes: (+1 -1) Index: llvm/test/Programs/External/SPEC/CINT2000/255.vortex/Makefile diff -u llvm/test/Programs/External/SPEC/CINT2000/255.vortex/Makefile:1.5 llvm/test/Programs/External/SPEC/CINT2000/255.vortex/Makefile:1.6 --- llvm/test/Programs/External/SPEC/CINT2000/255.vortex/Makefile:1.5 Wed Jul 30 10:55:36 2003 +++ llvm/test/Programs/External/SPEC/CINT2000/255.vortex/Makefile Wed Feb 25 18:01:20 2004 @@ -1,7 +1,7 @@ LEVEL = ../../../../../.. #STDOUT_FILENAME := input.random.out -include ../../Makefile.spec +include ../../Makefile.spec2000 ifeq ($(ARCH),Sparc) ## SPEC portability note for vortex says to use this flag on 64-bit machines From alkis at niobe.cs.uiuc.edu Wed Feb 25 18:10:00 2004 From: alkis at niobe.cs.uiuc.edu (Alkis Evlogimenos) Date: Wed Feb 25 18:10:00 2004 Subject: [llvm-commits] CVS: llvm/test/Programs/External/SPEC/CINT2000/253.perlbmk/Makefile Message-ID: <200402260001.i1Q01U216650@niobe.cs.uiuc.edu> Changes in directory llvm/test/Programs/External/SPEC/CINT2000/253.perlbmk: Makefile updated: 1.4 -> 1.5 --- Log message: Make SPEC tests share a common Makefile. --- Diffs of the changes: (+1 -1) Index: llvm/test/Programs/External/SPEC/CINT2000/253.perlbmk/Makefile diff -u llvm/test/Programs/External/SPEC/CINT2000/253.perlbmk/Makefile:1.4 llvm/test/Programs/External/SPEC/CINT2000/253.perlbmk/Makefile:1.5 --- llvm/test/Programs/External/SPEC/CINT2000/253.perlbmk/Makefile:1.4 Sun Feb 8 16:23:10 2004 +++ llvm/test/Programs/External/SPEC/CINT2000/253.perlbmk/Makefile Wed Feb 25 18:01:20 2004 @@ -8,4 +8,4 @@ CPPFLAGS += -D__LITTLE_ENDIAN__ endif -include ../../Makefile.spec +include ../../Makefile.spec2000 From alkis at niobe.cs.uiuc.edu Wed Feb 25 18:10:36 2004 From: alkis at niobe.cs.uiuc.edu (Alkis Evlogimenos) Date: Wed Feb 25 18:10:36 2004 Subject: [llvm-commits] CVS: llvm/test/Programs/External/SPEC/CINT2000/256.bzip2/Makefile Message-ID: <200402260001.i1Q01UO16625@niobe.cs.uiuc.edu> Changes in directory llvm/test/Programs/External/SPEC/CINT2000/256.bzip2: Makefile updated: 1.1 -> 1.2 --- Log message: Make SPEC tests share a common Makefile. --- Diffs of the changes: (+1 -1) Index: llvm/test/Programs/External/SPEC/CINT2000/256.bzip2/Makefile diff -u llvm/test/Programs/External/SPEC/CINT2000/256.bzip2/Makefile:1.1 llvm/test/Programs/External/SPEC/CINT2000/256.bzip2/Makefile:1.2 --- llvm/test/Programs/External/SPEC/CINT2000/256.bzip2/Makefile:1.1 Thu May 15 13:11:06 2003 +++ llvm/test/Programs/External/SPEC/CINT2000/256.bzip2/Makefile Wed Feb 25 18:01:20 2004 @@ -1,4 +1,4 @@ LEVEL = ../../../../../.. RUN_OPTIONS = `cat $(REF_IN_DIR)control` STDOUT_FILENAME := input.random.out -include ../../Makefile.spec +include ../../Makefile.spec2000 From alkis at niobe.cs.uiuc.edu Wed Feb 25 18:11:12 2004 From: alkis at niobe.cs.uiuc.edu (Alkis Evlogimenos) Date: Wed Feb 25 18:11:12 2004 Subject: [llvm-commits] CVS: llvm/test/Programs/External/SPEC/CINT2000/300.twolf/Makefile Message-ID: <200402260001.i1Q01Ub16619@niobe.cs.uiuc.edu> Changes in directory llvm/test/Programs/External/SPEC/CINT2000/300.twolf: Makefile updated: 1.3 -> 1.4 --- Log message: Make SPEC tests share a common Makefile. --- Diffs of the changes: (+1 -1) Index: llvm/test/Programs/External/SPEC/CINT2000/300.twolf/Makefile diff -u llvm/test/Programs/External/SPEC/CINT2000/300.twolf/Makefile:1.3 llvm/test/Programs/External/SPEC/CINT2000/300.twolf/Makefile:1.4 --- llvm/test/Programs/External/SPEC/CINT2000/300.twolf/Makefile:1.3 Mon Sep 29 16:09:16 2003 +++ llvm/test/Programs/External/SPEC/CINT2000/300.twolf/Makefile Wed Feb 25 18:01:18 2004 @@ -2,5 +2,5 @@ LDFLAGS = -lm RUN_OPTIONS = $(RUN_TYPE) STDOUT_FILENAME = $(RUN_TYPE).net.stdout -include ../../Makefile.spec +include ../../Makefile.spec2000 From gaeke at cs.uiuc.edu Wed Feb 25 18:12:13 2004 From: gaeke at cs.uiuc.edu (Brian Gaeke) Date: Wed Feb 25 18:12:13 2004 Subject: [llvm-commits] CVS: llvm/docs/ReleaseNotes.html Message-ID: <200402260008.SAA16811@zion.cs.uiuc.edu> Changes in directory llvm/docs: ReleaseNotes.html updated: 1.134 -> 1.135 --- Log message: One B00g fixed. --- Diffs of the changes: (+2 -1) Index: llvm/docs/ReleaseNotes.html diff -u llvm/docs/ReleaseNotes.html:1.134 llvm/docs/ReleaseNotes.html:1.135 --- llvm/docs/ReleaseNotes.html:1.134 Wed Feb 25 10:36:51 2004 +++ llvm/docs/ReleaseNotes.html Wed Feb 25 18:08:25 2004 @@ -199,6 +199,7 @@

[loopsimplify] Loopsimplify incorrectly updates dominator information

[pruneeh] -pruneeh pass removes invoke instructions it shouldn't

[sparc] Boolean constants are emitted as true and false

[interpreter] va_list values silently corrupted by function calls

Tablegen aborts on errors

[inliner] Error inlining intrinsic calls into invoke instructions

Linking weak and strong global variables is dependent on link order

@@ -606,7 +607,7 @@ src="http://www.w3.org/Icons/valid-html401" alt="Valid HTML 4.01!" /> The LLVM Compiler Infrastructure
- Last modified: $Date: 2004/02/25 16:36:51 $ + Last modified: $Date: 2004/02/26 00:08:25 $ From gaeke at cs.uiuc.edu Wed Feb 25 18:12:48 2004 From: gaeke at cs.uiuc.edu (Brian Gaeke) Date: Wed Feb 25 18:12:48 2004 Subject: [llvm-commits] CVS: llvm-www/releases/1.1/docs/ReleaseNotes.html Message-ID: <200402260007.SAA16693@zion.cs.uiuc.edu> Changes in directory llvm-www/releases/1.1/docs: ReleaseNotes.html updated: 1.28 -> 1.29 --- Log message: One Boog found. --- Diffs of the changes: (+2 -1) Index: llvm-www/releases/1.1/docs/ReleaseNotes.html diff -u llvm-www/releases/1.1/docs/ReleaseNotes.html:1.28 llvm-www/releases/1.1/docs/ReleaseNotes.html:1.29 --- llvm-www/releases/1.1/docs/ReleaseNotes.html:1.28 Sun Feb 22 21:36:48 2004 +++ llvm-www/releases/1.1/docs/ReleaseNotes.html Wed Feb 25 18:06:51 2004 @@ -391,6 +391,7 @@

make tools-only doesn't make lib/Support

[loopsimplify] Loopsimplify incorrectly updates dominator information

[pruneeh] -pruneeh pass removes invoke instructions it shouldn't

[interpreter] va_list values silently corrupted by function calls

[inliner] Error inlining intrinsic calls into invoke instructions

Linking weak and strong global variables is dependent on link order

[X86] Missing cast from ULong -> Double, cast FP -> bool and support for -9223372036854775808

@@ -753,7 +754,7 @@ src="http://www.w3.org/Icons/valid-html401" alt="Valid HTML 4.01!" /> The LLVM Compiler Infrastructure
- Last modified: $Date: 2004/02/23 03:36:48 $ + Last modified: $Date: 2004/02/26 00:06:51 $ From lattner at cs.uiuc.edu Wed Feb 25 19:21:01 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Wed Feb 25 19:21:01 2004 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/InstSelectSimple.cpp Message-ID: <200402260120.TAA18140@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: InstSelectSimple.cpp updated: 1.178 -> 1.179 --- Log message: Fix some warnings, some of which were spurious, and some of which were real bugs. Thanks Brian! --- Diffs of the changes: (+6 -6) Index: llvm/lib/Target/X86/InstSelectSimple.cpp diff -u llvm/lib/Target/X86/InstSelectSimple.cpp:1.178 llvm/lib/Target/X86/InstSelectSimple.cpp:1.179 --- llvm/lib/Target/X86/InstSelectSimple.cpp:1.178 Wed Feb 25 01:00:55 2004 +++ llvm/lib/Target/X86/InstSelectSimple.cpp Wed Feb 25 19:20:02 2004 @@ -1293,7 +1293,6 @@ } // Turn the byte code into # iterations - unsigned ByteReg; unsigned CountReg; unsigned Opcode; switch (Align & 3) { @@ -1302,6 +1301,7 @@ CountReg = getReg(ConstantUInt::get(Type::UIntTy, I->getRawValue()/2)); } else { CountReg = makeAnotherReg(Type::IntTy); + unsigned ByteReg = getReg(CI.getOperand(3)); BuildMI(BB, X86::SHRri32, 2, CountReg).addReg(ByteReg).addZImm(1); } Opcode = X86::REP_MOVSW; @@ -1311,12 +1311,12 @@ CountReg = getReg(ConstantUInt::get(Type::UIntTy, I->getRawValue()/4)); } else { CountReg = makeAnotherReg(Type::IntTy); + unsigned ByteReg = getReg(CI.getOperand(3)); BuildMI(BB, X86::SHRri32, 2, CountReg).addReg(ByteReg).addZImm(2); } Opcode = X86::REP_MOVSD; break; - case 1: // BYTE aligned - case 3: // BYTE aligned + default: // BYTE aligned CountReg = getReg(CI.getOperand(3)); Opcode = X86::REP_MOVSB; break; @@ -1341,7 +1341,6 @@ } // Turn the byte code into # iterations - unsigned ByteReg; unsigned CountReg; unsigned Opcode; if (ConstantInt *ValC = dyn_cast(CI.getOperand(2))) { @@ -1354,6 +1353,7 @@ CountReg =getReg(ConstantUInt::get(Type::UIntTy, I->getRawValue()/2)); } else { CountReg = makeAnotherReg(Type::IntTy); + unsigned ByteReg = getReg(CI.getOperand(3)); BuildMI(BB, X86::SHRri32, 2, CountReg).addReg(ByteReg).addZImm(1); } BuildMI(BB, X86::MOVri16, 1, X86::AX).addZImm((Val << 8) | Val); @@ -1364,14 +1364,14 @@ CountReg =getReg(ConstantUInt::get(Type::UIntTy, I->getRawValue()/4)); } else { CountReg = makeAnotherReg(Type::IntTy); + unsigned ByteReg = getReg(CI.getOperand(3)); BuildMI(BB, X86::SHRri32, 2, CountReg).addReg(ByteReg).addZImm(2); } Val = (Val << 8) | Val; BuildMI(BB, X86::MOVri32, 1, X86::EAX).addZImm((Val << 16) | Val); Opcode = X86::REP_STOSD; break; - case 1: // BYTE aligned - case 3: // BYTE aligned + default: // BYTE aligned CountReg = getReg(CI.getOperand(3)); BuildMI(BB, X86::MOVri8, 1, X86::AL).addZImm(Val); Opcode = X86::REP_STOSB; From alkis at cs.uiuc.edu Wed Feb 25 21:22:01 2004 From: alkis at cs.uiuc.edu (Alkis Evlogimenos) Date: Wed Feb 25 21:22:01 2004 Subject: [llvm-commits] CVS: llvm/test/Programs/SingleSource/UnitTests/SetjmpLongjmp/C/ Message-ID: <200402260321.VAA27892@zion.cs.uiuc.edu> Changes in directory llvm/test/Programs/SingleSource/UnitTests/SetjmpLongjmp/C: --- Log message: Directory /home/vadve/shared/PublicCVS/llvm/test/Programs/SingleSource/UnitTests/SetjmpLongjmp/C added to the repository --- Diffs of the changes: (+0 -0) From alkis at cs.uiuc.edu Wed Feb 25 21:22:35 2004 From: alkis at cs.uiuc.edu (Alkis Evlogimenos) Date: Wed Feb 25 21:22:35 2004 Subject: [llvm-commits] CVS: llvm/test/Programs/SingleSource/UnitTests/SetjmpLongjmp/C++/ Message-ID: <200402260321.VAA27891@zion.cs.uiuc.edu> Changes in directory llvm/test/Programs/SingleSource/UnitTests/SetjmpLongjmp/C++: --- Log message: Directory /home/vadve/shared/PublicCVS/llvm/test/Programs/SingleSource/UnitTests/SetjmpLongjmp/C++ added to the repository --- Diffs of the changes: (+0 -0) From alkis at cs.uiuc.edu Wed Feb 25 21:33:01 2004 From: alkis at cs.uiuc.edu (Alkis Evlogimenos) Date: Wed Feb 25 21:33:01 2004 Subject: [llvm-commits] CVS: llvm/test/Programs/SingleSource/UnitTests/SetjmpLongjmp/C/Makefile Message-ID: <200402260332.VAA28318@zion.cs.uiuc.edu> Changes in directory llvm/test/Programs/SingleSource/UnitTests/SetjmpLongjmp/C: Makefile added (r1.1) --- Log message: Split SetjmpLongjmp tests in C and C++ subdirectories --- Diffs of the changes: (+5 -0) Index: llvm/test/Programs/SingleSource/UnitTests/SetjmpLongjmp/C/Makefile diff -c /dev/null llvm/test/Programs/SingleSource/UnitTests/SetjmpLongjmp/C/Makefile:1.1 *** /dev/null Wed Feb 25 21:32:43 2004 --- llvm/test/Programs/SingleSource/UnitTests/SetjmpLongjmp/C/Makefile Wed Feb 25 21:32:33 2004 *************** *** 0 **** --- 1,5 ---- + # Programs/SingleSource/UnitTests/SetjmpLongjmp/Makefile + LEVEL = ../../../../../.. + include $(LEVEL)/test/Programs/SingleSource/Makefile.singlesrc + + From alkis at cs.uiuc.edu Wed Feb 25 21:33:35 2004 From: alkis at cs.uiuc.edu (Alkis Evlogimenos) Date: Wed Feb 25 21:33:35 2004 Subject: [llvm-commits] CVS: llvm/test/Programs/SingleSource/UnitTests/SetjmpLongjmp/Makefile C++Catch.cpp FarJump.c Looping.c MultipleSetjmp.c SimpleC++Test.cpp SimpleCTest.c WhileLoop.c Message-ID: <200402260332.VAA28313@zion.cs.uiuc.edu> Changes in directory llvm/test/Programs/SingleSource/UnitTests/SetjmpLongjmp: Makefile updated: 1.5 -> 1.6 C++Catch.cpp (r1.1) removed FarJump.c (r1.1) removed Looping.c (r1.2) removed MultipleSetjmp.c (r1.1) removed SimpleC++Test.cpp (r1.1) removed SimpleCTest.c (r1.1) removed WhileLoop.c (r1.1) removed --- Log message: Split SetjmpLongjmp tests in C and C++ subdirectories --- Diffs of the changes: (+2 -2) Index: llvm/test/Programs/SingleSource/UnitTests/SetjmpLongjmp/Makefile diff -u llvm/test/Programs/SingleSource/UnitTests/SetjmpLongjmp/Makefile:1.5 llvm/test/Programs/SingleSource/UnitTests/SetjmpLongjmp/Makefile:1.6 --- llvm/test/Programs/SingleSource/UnitTests/SetjmpLongjmp/Makefile:1.5 Fri Feb 13 00:20:58 2004 +++ llvm/test/Programs/SingleSource/UnitTests/SetjmpLongjmp/Makefile Wed Feb 25 21:32:32 2004 @@ -1,7 +1,7 @@ # Programs/SingleSource/UnitTests/SetjmpLongjmp/Makefile + +DIRS = C C++ LEVEL = ../../../../.. -REQUIRES_EH_SUPPORT = 1 -LIBS = -lstdc++ include $(LEVEL)/test/Programs/SingleSource/Makefile.singlesrc From alkis at cs.uiuc.edu Wed Feb 25 21:34:09 2004 From: alkis at cs.uiuc.edu (Alkis Evlogimenos) Date: Wed Feb 25 21:34:09 2004 Subject: [llvm-commits] CVS: llvm/test/Programs/SingleSource/UnitTests/SetjmpLongjmp/C++/Makefile Message-ID: <200402260332.VAA28327@zion.cs.uiuc.edu> Changes in directory llvm/test/Programs/SingleSource/UnitTests/SetjmpLongjmp/C++: Makefile added (r1.1) --- Log message: Split SetjmpLongjmp tests in C and C++ subdirectories --- Diffs of the changes: (+7 -0) Index: llvm/test/Programs/SingleSource/UnitTests/SetjmpLongjmp/C++/Makefile diff -c /dev/null llvm/test/Programs/SingleSource/UnitTests/SetjmpLongjmp/C++/Makefile:1.1 *** /dev/null Wed Feb 25 21:32:43 2004 --- llvm/test/Programs/SingleSource/UnitTests/SetjmpLongjmp/C++/Makefile Wed Feb 25 21:32:33 2004 *************** *** 0 **** --- 1,7 ---- + # Programs/SingleSource/UnitTests/SetjmpLongjmp/Makefile + LEVEL = ../../../../../.. + REQUIRES_EH_SUPPORT = 1 + LIBS = -lstdc++ + include $(LEVEL)/test/Programs/SingleSource/Makefile.singlesrc + + From lattner at cs.uiuc.edu Wed Feb 25 21:35:01 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Wed Feb 25 21:35:01 2004 Subject: [llvm-commits] CVS: llvm/tools/gccld/GenerateCode.cpp Message-ID: <200402260334.VAA28373@zion.cs.uiuc.edu> Changes in directory llvm/tools/gccld: GenerateCode.cpp updated: 1.19 -> 1.20 --- Log message: We have this snazzy link-time optimizer. How about we start using it? This removes some cruft from 255.vortex, cleaning up after DAE and IPCP, which do horrible, beautiful, things to vortex. --- Diffs of the changes: (+6 -2) Index: llvm/tools/gccld/GenerateCode.cpp diff -u llvm/tools/gccld/GenerateCode.cpp:1.19 llvm/tools/gccld/GenerateCode.cpp:1.20 --- llvm/tools/gccld/GenerateCode.cpp:1.19 Wed Feb 25 15:35:13 2004 +++ llvm/tools/gccld/GenerateCode.cpp Wed Feb 25 21:34:30 2004 @@ -111,6 +111,11 @@ if (!DisableInline) addPass(Passes, createFunctionInliningPass()); // Inline small functions + // The IPO passes may leave cruft around. Clean up after them. + addPass(Passes, createInstructionCombiningPass()); + + addPass(Passes, createScalarReplAggregatesPass()); // Break up allocas + // Run a few AA driven optimizations here and now, to cleanup the code. // Eventually we should put an IP AA in place here. @@ -118,8 +123,7 @@ addPass(Passes, createLoadValueNumberingPass()); // GVN for load instrs addPass(Passes, createGCSEPass()); // Remove common subexprs - // The FuncResolve pass may leave cruft around if functions were prototyped - // differently than they were defined. Remove this cruft. + // Cleanup and simplify the code after the scalar optimizations. addPass(Passes, createInstructionCombiningPass()); // Delete basic blocks, which optimization passes may have killed... From lattner at cs.uiuc.edu Wed Feb 25 21:44:00 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Wed Feb 25 21:44:00 2004 Subject: [llvm-commits] CVS: llvm/lib/Analysis/DataStructure/Local.cpp Message-ID: <200402260343.VAA28445@zion.cs.uiuc.edu> Changes in directory llvm/lib/Analysis/DataStructure: Local.cpp updated: 1.91 -> 1.92 --- Log message: Add _more_ functions --- Diffs of the changes: (+20 -3) Index: llvm/lib/Analysis/DataStructure/Local.cpp diff -u llvm/lib/Analysis/DataStructure/Local.cpp:1.91 llvm/lib/Analysis/DataStructure/Local.cpp:1.92 --- llvm/lib/Analysis/DataStructure/Local.cpp:1.91 Wed Feb 25 17:31:02 2004 +++ llvm/lib/Analysis/DataStructure/Local.cpp Wed Feb 25 21:43:08 2004 @@ -495,6 +495,15 @@ if (DSNode *N = RetNH.getNode()) N->setHeapNodeMarker()->setModifiedMarker()->setReadMarker(); return; + } else if (F->getName() == "memmove") { + // Merge the first & second arguments, and mark the memory read and + // modified. + DSNodeHandle RetNH = getValueDest(**CS.arg_begin()); + RetNH.mergeWith(getValueDest(**(CS.arg_begin()+1))); + if (DSNode *N = RetNH.getNode()) + N->setModifiedMarker()->setReadMarker(); + return; + } else if (F->getName() == "atoi" || F->getName() == "atof" || F->getName() == "atol" || F->getName() == "atoll" || F->getName() == "remove" || F->getName() == "unlink" || @@ -753,12 +762,20 @@ N->mergeTypeInfo(PTy->getElementType(), H.getOffset()); } return; - } else if (F->getName() == "strchr" || F->getName() == "strrchr") { - // These read their first argument, and return it. + } else if (F->getName() == "strchr" || F->getName() == "strrchr" || + F->getName() == "strstr") { + // These read their arguments, and return the first one DSNodeHandle H = getValueDest(**CS.arg_begin()); + H.mergeWith(getValueDest(*CS.getInstruction())); // Returns buffer + + for (CallSite::arg_iterator AI = CS.arg_begin(), E = CS.arg_end(); + AI != E; ++AI) + if (isPointerType((*AI)->getType())) + if (DSNode *N = getValueDest(**AI).getNode()) + N->setReadMarker(); + if (DSNode *N = H.getNode()) N->setReadMarker(); - H.mergeWith(getValueDest(*CS.getInstruction())); // Returns buffer return; } else if (F->getName() == "modf" && CS.arg_end()-CS.arg_begin() == 2) { // This writes its second argument, and forces it to double. From lattner at cs.uiuc.edu Wed Feb 25 21:44:33 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Wed Feb 25 21:44:33 2004 Subject: [llvm-commits] CVS: llvm/lib/Analysis/DataStructure/DataStructure.cpp Message-ID: <200402260343.VAA28440@zion.cs.uiuc.edu> Changes in directory llvm/lib/Analysis/DataStructure: DataStructure.cpp updated: 1.160 -> 1.161 --- Log message: The node doesn't have to be _no_ node flags, it just has to be complete and not have any globals. --- Diffs of the changes: (+3 -2) Index: llvm/lib/Analysis/DataStructure/DataStructure.cpp diff -u llvm/lib/Analysis/DataStructure/DataStructure.cpp:1.160 llvm/lib/Analysis/DataStructure/DataStructure.cpp:1.161 --- llvm/lib/Analysis/DataStructure/DataStructure.cpp:1.160 Wed Feb 25 17:36:08 2004 +++ llvm/lib/Analysis/DataStructure/DataStructure.cpp Wed Feb 25 21:43:43 2004 @@ -1393,9 +1393,10 @@ // If the Callee is a useless edge, this must be an unreachable call site, // eliminate it. if (CS.isIndirectCall() && CS.getCalleeNode()->getNumReferrers() == 1 && - CS.getCalleeNode()->getNodeFlags() == 0) { // No useful info? + CS.getCalleeNode()->isComplete() && + CS.getCalleeNode()->getGlobals.empty()) { // No useful info? #ifndef NDEBUG - std::cerr << "WARNING: Useless call site found??\n"; + std::cerr << "WARNING: Useless call site found.\n"; #endif CS.swap(Calls.back()); Calls.pop_back(); From lattner at cs.uiuc.edu Wed Feb 25 21:46:01 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Wed Feb 25 21:46:01 2004 Subject: [llvm-commits] CVS: llvm/lib/Analysis/DataStructure/DataStructure.cpp Message-ID: <200402260345.VAA28816@zion.cs.uiuc.edu> Changes in directory llvm/lib/Analysis/DataStructure: DataStructure.cpp updated: 1.161 -> 1.162 --- Log message: Fix typo --- Diffs of the changes: (+1 -1) Index: llvm/lib/Analysis/DataStructure/DataStructure.cpp diff -u llvm/lib/Analysis/DataStructure/DataStructure.cpp:1.161 llvm/lib/Analysis/DataStructure/DataStructure.cpp:1.162 --- llvm/lib/Analysis/DataStructure/DataStructure.cpp:1.161 Wed Feb 25 21:43:43 2004 +++ llvm/lib/Analysis/DataStructure/DataStructure.cpp Wed Feb 25 21:45:03 2004 @@ -1394,7 +1394,7 @@ // eliminate it. if (CS.isIndirectCall() && CS.getCalleeNode()->getNumReferrers() == 1 && CS.getCalleeNode()->isComplete() && - CS.getCalleeNode()->getGlobals.empty()) { // No useful info? + CS.getCalleeNode()->getGlobals().empty()) { // No useful info? #ifndef NDEBUG std::cerr << "WARNING: Useless call site found.\n"; #endif From lattner at cs.uiuc.edu Wed Feb 25 22:08:00 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Wed Feb 25 22:08:00 2004 Subject: [llvm-commits] CVS: llvm/include/Support/DenseMap.h Message-ID: <200402260407.WAA00398@zion.cs.uiuc.edu> Changes in directory llvm/include/Support: DenseMap.h updated: 1.1 -> 1.2 --- Log message: Fix typeo. grow() cannot shrink storage. clear() should really nuke storage --- Diffs of the changes: (+5 -3) Index: llvm/include/Support/DenseMap.h diff -u llvm/include/Support/DenseMap.h:1.1 llvm/include/Support/DenseMap.h:1.2 --- llvm/include/Support/DenseMap.h:1.1 Wed Feb 25 15:55:45 2004 +++ llvm/include/Support/DenseMap.h Wed Feb 25 22:07:12 2004 @@ -9,7 +9,7 @@ // // This file implements a dense map. A dense map template takes two // types. The first is the mapped type and the second is a functor -// that maps its argument to a size_t. On instanciation a "null" value +// that maps its argument to a size_t. On instantiation a "null" value // can be provided to be used as a "does not exist" indicator in the // map. A member function grow() is provided that given the value of // the maximally indexed key (the argument of the functor) makes sure @@ -48,11 +48,13 @@ } void clear() { - storage_.assign(storage_.size(), nullVal_); + storage_.clear(); } void grow(IndexT n) { - storage_.resize(toIndex_(n) + 1, nullVal_); + unsigned NewSize = toIndex_(n) + 1; + if (NewSize > storage_.size()) + storage_.resize(NewSize, nullVal_); } }; From alkis at cs.uiuc.edu Wed Feb 25 22:15:01 2004 From: alkis at cs.uiuc.edu (Alkis Evlogimenos) Date: Wed Feb 25 22:15:01 2004 Subject: [llvm-commits] CVS: llvm/autoconf/configure.ac Message-ID: <200402260414.WAA00843@zion.cs.uiuc.edu> Changes in directory llvm/autoconf: configure.ac updated: 1.80 -> 1.81 --- Log message: Remove .micro references as those files no longer exist and add some more recent Makefile additions to the list --- Diffs of the changes: (+2 -2) Index: llvm/autoconf/configure.ac diff -u llvm/autoconf/configure.ac:1.80 llvm/autoconf/configure.ac:1.81 --- llvm/autoconf/configure.ac:1.80 Wed Feb 25 17:20:27 2004 +++ llvm/autoconf/configure.ac Wed Feb 25 22:14:10 2004 @@ -40,7 +40,6 @@ AC_CONFIG_MAKEFILE(test/Programs/Makefile.programs) AC_CONFIG_MAKEFILE(test/Programs/TEST.aa.Makefile) AC_CONFIG_MAKEFILE(test/Programs/TEST.dsgraph.report) -AC_CONFIG_MAKEFILE(test/Programs/TEST.micro.report) AC_CONFIG_MAKEFILE(test/Programs/TEST.aa.report) AC_CONFIG_MAKEFILE(test/Programs/TEST.example.Makefile) AC_CONFIG_MAKEFILE(test/Programs/TEST.nightly.Makefile) @@ -51,11 +50,11 @@ AC_CONFIG_MAKEFILE(test/Programs/TEST.jit.report) AC_CONFIG_MAKEFILE(test/Programs/TEST.typesafe.Makefile) AC_CONFIG_MAKEFILE(test/Programs/TEST.dsgraph.gnuplot) -AC_CONFIG_MAKEFILE(test/Programs/TEST.micro.Makefile) AC_CONFIG_MAKEFILE(test/Programs/TEST.vtl.Makefile) AC_CONFIG_MAKEFILE(test/Programs/External/Makefile) AC_CONFIG_MAKEFILE(test/Programs/External/SPEC/Makefile) AC_CONFIG_MAKEFILE(test/Programs/External/SPEC/Makefile.spec) +AC_CONFIG_MAKEFILE(test/Programs/External/SPEC/Makefile.spec2000) AC_CONFIG_MAKEFILE(test/Programs/External/SPEC/Makefile.spec95) AC_CONFIG_MAKEFILE(test/Programs/MultiSource/Makefile) AC_CONFIG_MAKEFILE(test/Programs/MultiSource/Makefile.multisrc) @@ -74,6 +73,7 @@ AC_CONFIG_MAKEFILE(test/Programs/MultiSource/Benchmarks/FreeBench/pifft/test.in) AC_CONFIG_MAKEFILE(test/Programs/SingleSource/Makefile) AC_CONFIG_MAKEFILE(test/Programs/SingleSource/Makefile.singlesrc) +AC_CONFIG_MAKEFILE(test/Programs/SingleSource/UnitTests/SetjmpLongjmp/Makefile) AC_CONFIG_MAKEFILE(tools/Makefile) AC_CONFIG_MAKEFILE(utils/Makefile) AC_CONFIG_MAKEFILE(projects/Makefile) From alkis at cs.uiuc.edu Wed Feb 25 22:15:34 2004 From: alkis at cs.uiuc.edu (Alkis Evlogimenos) Date: Wed Feb 25 22:15:34 2004 Subject: [llvm-commits] CVS: llvm/configure Message-ID: <200402260414.WAA00842@zion.cs.uiuc.edu> Changes in directory llvm: configure updated: 1.82 -> 1.83 --- Log message: Remove .micro references as those files no longer exist and add some more recent Makefile additions to the list --- Diffs of the changes: (+12 -12) Index: llvm/configure diff -u llvm/configure:1.82 llvm/configure:1.83 --- llvm/configure:1.82 Wed Feb 25 17:41:30 2004 +++ llvm/configure Wed Feb 25 22:14:10 2004 @@ -1571,9 +1571,6 @@ ac_config_commands="$ac_config_commands test/Programs/TEST.dsgraph.report" - ac_config_commands="$ac_config_commands test/Programs/TEST.micro.report" - - ac_config_commands="$ac_config_commands test/Programs/TEST.aa.report" @@ -1604,9 +1601,6 @@ ac_config_commands="$ac_config_commands test/Programs/TEST.dsgraph.gnuplot" - ac_config_commands="$ac_config_commands test/Programs/TEST.micro.Makefile" - - ac_config_commands="$ac_config_commands test/Programs/TEST.vtl.Makefile" @@ -1619,6 +1613,9 @@ ac_config_commands="$ac_config_commands test/Programs/External/SPEC/Makefile.spec" + ac_config_commands="$ac_config_commands test/Programs/External/SPEC/Makefile.spec2000" + + ac_config_commands="$ac_config_commands test/Programs/External/SPEC/Makefile.spec95" @@ -1673,6 +1670,9 @@ ac_config_commands="$ac_config_commands test/Programs/SingleSource/Makefile.singlesrc" + ac_config_commands="$ac_config_commands test/Programs/SingleSource/UnitTests/SetjmpLongjmp/Makefile" + + ac_config_commands="$ac_config_commands tools/Makefile" @@ -22611,7 +22611,6 @@ ${srcdir}/autoconf/mkinstalldirs `dirname test/Programs/Makefile.programs` ${srcdir}/autoconf/mkinstalldirs `dirname test/Programs/TEST.aa.Makefile` ${srcdir}/autoconf/mkinstalldirs `dirname test/Programs/TEST.dsgraph.report` -${srcdir}/autoconf/mkinstalldirs `dirname test/Programs/TEST.micro.report` ${srcdir}/autoconf/mkinstalldirs `dirname test/Programs/TEST.aa.report` ${srcdir}/autoconf/mkinstalldirs `dirname test/Programs/TEST.example.Makefile` ${srcdir}/autoconf/mkinstalldirs `dirname test/Programs/TEST.nightly.Makefile` @@ -22622,11 +22621,11 @@ ${srcdir}/autoconf/mkinstalldirs `dirname test/Programs/TEST.jit.report` ${srcdir}/autoconf/mkinstalldirs `dirname test/Programs/TEST.typesafe.Makefile` ${srcdir}/autoconf/mkinstalldirs `dirname test/Programs/TEST.dsgraph.gnuplot` -${srcdir}/autoconf/mkinstalldirs `dirname test/Programs/TEST.micro.Makefile` ${srcdir}/autoconf/mkinstalldirs `dirname test/Programs/TEST.vtl.Makefile` ${srcdir}/autoconf/mkinstalldirs `dirname test/Programs/External/Makefile` ${srcdir}/autoconf/mkinstalldirs `dirname test/Programs/External/SPEC/Makefile` ${srcdir}/autoconf/mkinstalldirs `dirname test/Programs/External/SPEC/Makefile.spec` +${srcdir}/autoconf/mkinstalldirs `dirname test/Programs/External/SPEC/Makefile.spec2000` ${srcdir}/autoconf/mkinstalldirs `dirname test/Programs/External/SPEC/Makefile.spec95` ${srcdir}/autoconf/mkinstalldirs `dirname test/Programs/MultiSource/Makefile` ${srcdir}/autoconf/mkinstalldirs `dirname test/Programs/MultiSource/Makefile.multisrc` @@ -22645,6 +22644,7 @@ ${srcdir}/autoconf/mkinstalldirs `dirname test/Programs/MultiSource/Benchmarks/FreeBench/pifft/test.in` ${srcdir}/autoconf/mkinstalldirs `dirname test/Programs/SingleSource/Makefile` ${srcdir}/autoconf/mkinstalldirs `dirname test/Programs/SingleSource/Makefile.singlesrc` +${srcdir}/autoconf/mkinstalldirs `dirname test/Programs/SingleSource/UnitTests/SetjmpLongjmp/Makefile` ${srcdir}/autoconf/mkinstalldirs `dirname tools/Makefile` ${srcdir}/autoconf/mkinstalldirs `dirname utils/Makefile` ${srcdir}/autoconf/mkinstalldirs `dirname projects/Makefile` @@ -22676,7 +22676,6 @@ "test/Programs/Makefile.programs" ) CONFIG_COMMANDS="$CONFIG_COMMANDS test/Programs/Makefile.programs" ;; "test/Programs/TEST.aa.Makefile" ) CONFIG_COMMANDS="$CONFIG_COMMANDS test/Programs/TEST.aa.Makefile" ;; "test/Programs/TEST.dsgraph.report" ) CONFIG_COMMANDS="$CONFIG_COMMANDS test/Programs/TEST.dsgraph.report" ;; - "test/Programs/TEST.micro.report" ) CONFIG_COMMANDS="$CONFIG_COMMANDS test/Programs/TEST.micro.report" ;; "test/Programs/TEST.aa.report" ) CONFIG_COMMANDS="$CONFIG_COMMANDS test/Programs/TEST.aa.report" ;; "test/Programs/TEST.example.Makefile" ) CONFIG_COMMANDS="$CONFIG_COMMANDS test/Programs/TEST.example.Makefile" ;; "test/Programs/TEST.nightly.Makefile" ) CONFIG_COMMANDS="$CONFIG_COMMANDS test/Programs/TEST.nightly.Makefile" ;; @@ -22687,11 +22686,11 @@ "test/Programs/TEST.jit.report" ) CONFIG_COMMANDS="$CONFIG_COMMANDS test/Programs/TEST.jit.report" ;; "test/Programs/TEST.typesafe.Makefile" ) CONFIG_COMMANDS="$CONFIG_COMMANDS test/Programs/TEST.typesafe.Makefile" ;; "test/Programs/TEST.dsgraph.gnuplot" ) CONFIG_COMMANDS="$CONFIG_COMMANDS test/Programs/TEST.dsgraph.gnuplot" ;; - "test/Programs/TEST.micro.Makefile" ) CONFIG_COMMANDS="$CONFIG_COMMANDS test/Programs/TEST.micro.Makefile" ;; "test/Programs/TEST.vtl.Makefile" ) CONFIG_COMMANDS="$CONFIG_COMMANDS test/Programs/TEST.vtl.Makefile" ;; "test/Programs/External/Makefile" ) CONFIG_COMMANDS="$CONFIG_COMMANDS test/Programs/External/Makefile" ;; "test/Programs/External/SPEC/Makefile" ) CONFIG_COMMANDS="$CONFIG_COMMANDS test/Programs/External/SPEC/Makefile" ;; "test/Programs/External/SPEC/Makefile.spec" ) CONFIG_COMMANDS="$CONFIG_COMMANDS test/Programs/External/SPEC/Makefile.spec" ;; + "test/Programs/External/SPEC/Makefile.spec2000" ) CONFIG_COMMANDS="$CONFIG_COMMANDS test/Programs/External/SPEC/Makefile.spec2000" ;; "test/Programs/External/SPEC/Makefile.spec95" ) CONFIG_COMMANDS="$CONFIG_COMMANDS test/Programs/External/SPEC/Makefile.spec95" ;; "test/Programs/MultiSource/Makefile" ) CONFIG_COMMANDS="$CONFIG_COMMANDS test/Programs/MultiSource/Makefile" ;; "test/Programs/MultiSource/Makefile.multisrc" ) CONFIG_COMMANDS="$CONFIG_COMMANDS test/Programs/MultiSource/Makefile.multisrc" ;; @@ -22710,6 +22709,7 @@ "test/Programs/MultiSource/Benchmarks/FreeBench/pifft/test.in" ) CONFIG_COMMANDS="$CONFIG_COMMANDS test/Programs/MultiSource/Benchmarks/FreeBench/pifft/test.in" ;; "test/Programs/SingleSource/Makefile" ) CONFIG_COMMANDS="$CONFIG_COMMANDS test/Programs/SingleSource/Makefile" ;; "test/Programs/SingleSource/Makefile.singlesrc" ) CONFIG_COMMANDS="$CONFIG_COMMANDS test/Programs/SingleSource/Makefile.singlesrc" ;; + "test/Programs/SingleSource/UnitTests/SetjmpLongjmp/Makefile" ) CONFIG_COMMANDS="$CONFIG_COMMANDS test/Programs/SingleSource/UnitTests/SetjmpLongjmp/Makefile" ;; "tools/Makefile" ) CONFIG_COMMANDS="$CONFIG_COMMANDS tools/Makefile" ;; "utils/Makefile" ) CONFIG_COMMANDS="$CONFIG_COMMANDS utils/Makefile" ;; "projects/Makefile" ) CONFIG_COMMANDS="$CONFIG_COMMANDS projects/Makefile" ;; @@ -23381,7 +23381,6 @@ test/Programs/Makefile.programs ) ${SHELL} ${srcdir}/autoconf/install-sh -c ${srcdir}/test/Programs/Makefile.programs test/Programs/Makefile.programs ;; test/Programs/TEST.aa.Makefile ) ${SHELL} ${srcdir}/autoconf/install-sh -c ${srcdir}/test/Programs/TEST.aa.Makefile test/Programs/TEST.aa.Makefile ;; test/Programs/TEST.dsgraph.report ) ${SHELL} ${srcdir}/autoconf/install-sh -c ${srcdir}/test/Programs/TEST.dsgraph.report test/Programs/TEST.dsgraph.report ;; - test/Programs/TEST.micro.report ) ${SHELL} ${srcdir}/autoconf/install-sh -c ${srcdir}/test/Programs/TEST.micro.report test/Programs/TEST.micro.report ;; test/Programs/TEST.aa.report ) ${SHELL} ${srcdir}/autoconf/install-sh -c ${srcdir}/test/Programs/TEST.aa.report test/Programs/TEST.aa.report ;; test/Programs/TEST.example.Makefile ) ${SHELL} ${srcdir}/autoconf/install-sh -c ${srcdir}/test/Programs/TEST.example.Makefile test/Programs/TEST.example.Makefile ;; test/Programs/TEST.nightly.Makefile ) ${SHELL} ${srcdir}/autoconf/install-sh -c ${srcdir}/test/Programs/TEST.nightly.Makefile test/Programs/TEST.nightly.Makefile ;; @@ -23392,11 +23391,11 @@ test/Programs/TEST.jit.report ) ${SHELL} ${srcdir}/autoconf/install-sh -c ${srcdir}/test/Programs/TEST.jit.report test/Programs/TEST.jit.report ;; test/Programs/TEST.typesafe.Makefile ) ${SHELL} ${srcdir}/autoconf/install-sh -c ${srcdir}/test/Programs/TEST.typesafe.Makefile test/Programs/TEST.typesafe.Makefile ;; test/Programs/TEST.dsgraph.gnuplot ) ${SHELL} ${srcdir}/autoconf/install-sh -c ${srcdir}/test/Programs/TEST.dsgraph.gnuplot test/Programs/TEST.dsgraph.gnuplot ;; - test/Programs/TEST.micro.Makefile ) ${SHELL} ${srcdir}/autoconf/install-sh -c ${srcdir}/test/Programs/TEST.micro.Makefile test/Programs/TEST.micro.Makefile ;; test/Programs/TEST.vtl.Makefile ) ${SHELL} ${srcdir}/autoconf/install-sh -c ${srcdir}/test/Programs/TEST.vtl.Makefile test/Programs/TEST.vtl.Makefile ;; test/Programs/External/Makefile ) ${SHELL} ${srcdir}/autoconf/install-sh -c ${srcdir}/test/Programs/External/Makefile test/Programs/External/Makefile ;; test/Programs/External/SPEC/Makefile ) ${SHELL} ${srcdir}/autoconf/install-sh -c ${srcdir}/test/Programs/External/SPEC/Makefile test/Programs/External/SPEC/Makefile ;; test/Programs/External/SPEC/Makefile.spec ) ${SHELL} ${srcdir}/autoconf/install-sh -c ${srcdir}/test/Programs/External/SPEC/Makefile.spec test/Programs/External/SPEC/Makefile.spec ;; + test/Programs/External/SPEC/Makefile.spec2000 ) ${SHELL} ${srcdir}/autoconf/install-sh -c ${srcdir}/test/Programs/External/SPEC/Makefile.spec2000 test/Programs/External/SPEC/Makefile.spec2000 ;; test/Programs/External/SPEC/Makefile.spec95 ) ${SHELL} ${srcdir}/autoconf/install-sh -c ${srcdir}/test/Programs/External/SPEC/Makefile.spec95 test/Programs/External/SPEC/Makefile.spec95 ;; test/Programs/MultiSource/Makefile ) ${SHELL} ${srcdir}/autoconf/install-sh -c ${srcdir}/test/Programs/MultiSource/Makefile test/Programs/MultiSource/Makefile ;; test/Programs/MultiSource/Makefile.multisrc ) ${SHELL} ${srcdir}/autoconf/install-sh -c ${srcdir}/test/Programs/MultiSource/Makefile.multisrc test/Programs/MultiSource/Makefile.multisrc ;; @@ -23415,6 +23414,7 @@ test/Programs/MultiSource/Benchmarks/FreeBench/pifft/test.in ) ${SHELL} ${srcdir}/autoconf/install-sh -c ${srcdir}/test/Programs/MultiSource/Benchmarks/FreeBench/pifft/test.in test/Programs/MultiSource/Benchmarks/FreeBench/pifft/test.in ;; test/Programs/SingleSource/Makefile ) ${SHELL} ${srcdir}/autoconf/install-sh -c ${srcdir}/test/Programs/SingleSource/Makefile test/Programs/SingleSource/Makefile ;; test/Programs/SingleSource/Makefile.singlesrc ) ${SHELL} ${srcdir}/autoconf/install-sh -c ${srcdir}/test/Programs/SingleSource/Makefile.singlesrc test/Programs/SingleSource/Makefile.singlesrc ;; + test/Programs/SingleSource/UnitTests/SetjmpLongjmp/Makefile ) ${SHELL} ${srcdir}/autoconf/install-sh -c ${srcdir}/test/Programs/SingleSource/UnitTests/SetjmpLongjmp/Makefile test/Programs/SingleSource/UnitTests/SetjmpLongjmp/Makefile ;; tools/Makefile ) ${SHELL} ${srcdir}/autoconf/install-sh -c ${srcdir}/tools/Makefile tools/Makefile ;; utils/Makefile ) ${SHELL} ${srcdir}/autoconf/install-sh -c ${srcdir}/utils/Makefile utils/Makefile ;; projects/Makefile ) ${SHELL} ${srcdir}/autoconf/install-sh -c ${srcdir}/projects/Makefile projects/Makefile ;; From lattner at cs.uiuc.edu Wed Feb 25 23:01:07 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Wed Feb 25 23:01:07 2004 Subject: [llvm-commits] CVS: llvm/include/Support/DenseMap.h Message-ID: <200402260500.XAA03795@zion.cs.uiuc.edu> Changes in directory llvm/include/Support: DenseMap.h updated: 1.2 -> 1.3 --- Log message: Fix a bug in the densemap that was killing the local allocator, and probably other clients. The problem is that the nullVal member was left to the default constructor to initialize, which for int's does nothing (ie, leaves it unspecified). To get a zero value, we must use T(). It's C++ wonderful? :) --- Diffs of the changes: (+1 -1) Index: llvm/include/Support/DenseMap.h diff -u llvm/include/Support/DenseMap.h:1.2 llvm/include/Support/DenseMap.h:1.3 --- llvm/include/Support/DenseMap.h:1.2 Wed Feb 25 22:07:12 2004 +++ llvm/include/Support/DenseMap.h Wed Feb 25 23:00:15 2004 @@ -33,7 +33,7 @@ ToIndexT toIndex_; public: - DenseMap() { } + DenseMap() : nullVal_(T()) { } explicit DenseMap(const T& val) : nullVal_(val) { } From alkis at uiuc.edu Wed Feb 25 23:22:01 2004 From: alkis at uiuc.edu (Alkis Evlogimenos) Date: Wed Feb 25 23:22:01 2004 Subject: [llvm-commits] CVS: llvm/include/Support/DenseMap.h In-Reply-To: <200402260500.XAA03795@zion.cs.uiuc.edu> References: <200402260500.XAA03795@zion.cs.uiuc.edu> Message-ID: <200402252319.50802.alkis@uiuc.edu> On Wednesday 25 February 2004 11:00 pm, Chris Lattner wrote: > > Changes in directory llvm/include/Support: > > DenseMap.h updated: 1.2 -> 1.3 > > --- > Log message: > > Fix a bug in the densemap that was killing the local allocator, and probably > other clients. The problem is that the nullVal member was left to the default > constructor to initialize, which for int's does nothing (ie, leaves it unspecified). > > To get a zero value, we must use T(). It's C++ wonderful? :) Wow... I always thought that all members had T() called if you didn't specify it. -- Alkis From lattner at cs.uiuc.edu Wed Feb 25 23:22:36 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Wed Feb 25 23:22:36 2004 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/RegAllocLocal.cpp Message-ID: <200402260521.XAA05192@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen: RegAllocLocal.cpp updated: 1.58 -> 1.59 --- Log message: No need to clear the map here, it will always be empty --- Diffs of the changes: (+0 -1) Index: llvm/lib/CodeGen/RegAllocLocal.cpp diff -u llvm/lib/CodeGen/RegAllocLocal.cpp:1.58 llvm/lib/CodeGen/RegAllocLocal.cpp:1.59 --- llvm/lib/CodeGen/RegAllocLocal.cpp:1.58 Wed Feb 25 15:55:44 2004 +++ llvm/lib/CodeGen/RegAllocLocal.cpp Wed Feb 25 23:21:21 2004 @@ -683,7 +683,6 @@ // initialize the virtual->physical register map to have a 'null' // mapping for all virtual registers - Virt2PhysRegMap.clear(); Virt2PhysRegMap.grow(MF->getSSARegMap()->getLastVirtReg()); // Loop over all of the basic blocks, eliminating virtual register references From sabre at nondot.org Wed Feb 25 23:25:01 2004 From: sabre at nondot.org (Chris Lattner) Date: Wed Feb 25 23:25:01 2004 Subject: [llvm-commits] CVS: llvm/include/Support/DenseMap.h In-Reply-To: <200402252319.50802.alkis@uiuc.edu> Message-ID: On Wed, 25 Feb 2004, Alkis Evlogimenos wrote: > > Fix a bug in the densemap that was killing the local allocator, and probably > > other clients. The problem is that the nullVal member was left to the default > > constructor to initialize, which for int's does nothing (ie, leaves it unspecified). > > > > To get a zero value, we must use T(). It's C++ wonderful? :) > > Wow... I always thought that all members had T() called if you didn't > specify it. Nope. Strange but true: T v; and T v = T(); act differently when T is an int, pointer or other primitive type. I personally think that this is foolish, as even a dumb compiler can eliminate default dead initializations of primitives, but the C++ commitee didn't ask me. :) -Chris -- http://llvm.cs.uiuc.edu/ http://www.nondot.org/~sabre/Projects/ From alkis at cs.uiuc.edu Wed Feb 25 23:58:01 2004 From: alkis at cs.uiuc.edu (Alkis Evlogimenos) Date: Wed Feb 25 23:58:01 2004 Subject: [llvm-commits] CVS: llvm/test/Programs/External/SPEC/Makefile.spec Message-ID: <200402260557.XAA06583@zion.cs.uiuc.edu> Changes in directory llvm/test/Programs/External/SPEC: Makefile.spec updated: 1.26 -> 1.27 --- Log message: Fix problem -lm not being passed to the linker --- Diffs of the changes: (+1 -3) Index: llvm/test/Programs/External/SPEC/Makefile.spec diff -u llvm/test/Programs/External/SPEC/Makefile.spec:1.26 llvm/test/Programs/External/SPEC/Makefile.spec:1.27 --- llvm/test/Programs/External/SPEC/Makefile.spec:1.26 Wed Feb 25 18:01:21 2004 +++ llvm/test/Programs/External/SPEC/Makefile.spec Wed Feb 25 23:57:20 2004 @@ -18,9 +18,7 @@ ifndef STDOUT_FILENAME STDOUT_FILENAME := standard.out endif -ifndef LDFLAGS -LDFLAGS = -lm -endif +LDFLAGS += -lm # Get the current directory, the name of the benchmark, and the current # subdirectory of the SPEC directory we are in (ie, CINT2000/164.gzip) From lattner at cs.uiuc.edu Thu Feb 26 01:14:01 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Thu Feb 26 01:14:01 2004 Subject: [llvm-commits] CVS: llvm/lib/Transforms/Utils/SimplifyCFG.cpp Message-ID: <200402260713.BAA15129@zion.cs.uiuc.edu> Changes in directory llvm/lib/Transforms/Utils: SimplifyCFG.cpp updated: 1.27 -> 1.28 --- Log message: turn things like: if (X == 0 || X == 2) ...where the comparisons and branches are in different blocks... into a switch instruction. This comes up a lot in various programs, and works well with the switch/switch merging code I checked earlier. For example, this testcase: int switchtest(int C) { return C == 0 ? f(123) : C == 1 ? f(3123) : C == 4 ? f(312) : C == 5 ? f(1234): f(444); } is converted into this: switch int %C, label %cond_false.3 [ int 0, label %cond_true.0 int 1, label %cond_true.1 int 4, label %cond_true.2 int 5, label %cond_true.3 ] instead of a whole bunch of conditional branches. Admittedly the code is ugly, and incomplete. To be complete, we need to add br -> switch merging and switch -> br merging. For example, this testcase: struct foo { int Q, R, Z; }; #define A (X->Q+X->R * 123) int test(struct foo *X) { return A == 123 ? X1() : A == 12321 ? X2(): (A == 111 || A == 222) ? X3() : A == 875 ? X4() : X5(); } Gets compiled to this: switch int %tmp.7, label %cond_false.2 [ int 123, label %cond_true.0 int 12321, label %cond_true.1 int 111, label %cond_true.2 int 222, label %cond_true.2 ] ... cond_false.2: ; preds = %entry %tmp.52 = seteq int %tmp.7, 875 ; [#uses=1] br bool %tmp.52, label %cond_true.3, label %cond_false.3 where the branch could be folded into the switch. This kind of thing occurs *ALL OF THE TIME*, especially in programs like 176.gcc, which is a horrible mess of code. It contains stuff like *shudder*: #define SWITCH_TAKES_ARG(CHAR) \ ( (CHAR) == 'D' \ || (CHAR) == 'U' \ || (CHAR) == 'o' \ || (CHAR) == 'e' \ || (CHAR) == 'u' \ || (CHAR) == 'I' \ || (CHAR) == 'm' \ || (CHAR) == 'L' \ || (CHAR) == 'A' \ || (CHAR) == 'h' \ || (CHAR) == 'z') and #define CONST_OK_FOR_LETTER_P(VALUE, C) \ ((C) == 'I' ? SMALL_INTVAL (VALUE) \ : (C) == 'J' ? SMALL_INTVAL (-(VALUE)) \ : (C) == 'K' ? (unsigned)(VALUE) < 32 \ : (C) == 'L' ? ((VALUE) & 0xffff) == 0 \ : (C) == 'M' ? integer_ok_for_set (VALUE) \ : (C) == 'N' ? (VALUE) < 0 \ : (C) == 'O' ? (VALUE) == 0 \ : (C) == 'P' ? (VALUE) >= 0 \ : 0) and #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \ { \ if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 1))) \ (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \ copy_to_mode_reg (SImode, XEXP (X, 1))); \ if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 0))) \ (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \ copy_to_mode_reg (SImode, XEXP (X, 0))); \ if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == MULT) \ (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \ force_operand (XEXP (X, 0), 0)); \ if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == MULT) \ (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \ force_operand (XEXP (X, 1), 0)); \ if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == PLUS) \ (X) = gen_rtx (PLUS, Pmode, force_operand (XEXP (X, 0), NULL_RTX),\ XEXP (X, 1)); \ if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == PLUS) \ (X) = gen_rtx (PLUS, Pmode, XEXP (X, 0), \ force_operand (XEXP (X, 1), NULL_RTX)); \ if (GET_CODE (X) == SYMBOL_REF || GET_CODE (X) == CONST \ || GET_CODE (X) == LABEL_REF) \ (X) = legitimize_address (flag_pic, X, 0, 0); \ if (memory_address_p (MODE, X)) \ goto WIN; } and others. These macros get used multiple times of course. These are such lovely candidates for macros, aren't they? :) This code also nicely handles LLVM constructs that look like this: if (isa(I)) ... else if (isa(I)) ... else if (isa(I)) ... else if (isa(I)) ... else if (isa(I)) ... where the isa can obviously be a dyn_cast as well. Switch instructions are a good thing. --- Diffs of the changes: (+74 -0) Index: llvm/lib/Transforms/Utils/SimplifyCFG.cpp diff -u llvm/lib/Transforms/Utils/SimplifyCFG.cpp:1.27 llvm/lib/Transforms/Utils/SimplifyCFG.cpp:1.28 --- llvm/lib/Transforms/Utils/SimplifyCFG.cpp:1.27 Tue Feb 24 10:09:21 2004 +++ llvm/lib/Transforms/Utils/SimplifyCFG.cpp Thu Feb 26 01:13:46 2004 @@ -690,6 +690,80 @@ return true; } + // If there is a single predecessor for this block, and if this block is a + // simple value comparison block (ie, contains X == C), see if we can fold + // this comparison into the comparison in our predecessor block, making the + // predecessor block terminator into a switch (or adding cases to a + // preexisting switch). + if (OnlyPred) { + if (SetCondInst *SCI = dyn_cast(BB->begin())) + if (SCI->getOpcode() == Instruction::SetEQ && SCI->hasOneUse() && + isa(SCI->use_back()) && + SCI->getNext() == cast(SCI->use_back())) { + // Okay, we know we have a block containing (only) a seteq and a + // conditional branch instruction. If an integer value is being + // compared, if the comparison value is a constant, then check the + // predecessor. + BranchInst *BBBr = cast(BB->getTerminator()); + Value *CompVal = SCI->getOperand(0); + if (ConstantInt *CVal = dyn_cast(SCI->getOperand(1))) { + // We can do the merge if the predecessor contains either a + // conditional branch or a switch instruction which is operating on + // the CompVal. + if (BranchInst *BI = dyn_cast(OnlyPred->getTerminator())){ + // If it is a branch, then it must be a conditional branch, + // otherwise we would have merged it in before. We can only handle + // this if the block we are looking at is the 'false' branch. + assert(BI->isConditional() && + "Should have previously merged blocks!"); + if (SetCondInst *PredSCC= dyn_cast(BI->getCondition())) + if (PredSCC->getOperand(0) == CompVal && + PredSCC->getOpcode() == Instruction::SetEQ && + isa(PredSCC->getOperand(1)) && + BB == BI->getSuccessor(1) && + SafeToMergeTerminators(BI, BBBr)) { + // If the constants being compared are the same, then the + // comparison in this block could never come true. + if (SCI->getOperand(1) == PredSCC->getOperand(1)) { + // Tell the block to skip over us, making us dead. + BI->setSuccessor(1, BBBr->getSuccessor(1)); + AddPredecessorToBlock(BBBr->getSuccessor(1), OnlyPred, BB); + return SimplifyCFG(BB); + } + + // Otherwise, create the switch instruction! + SwitchInst *SI = new SwitchInst(CompVal, BBBr->getSuccessor(1), + BI); + // Add the edge from our predecessor, and remove the + // predecessors (now obsolete branch instruction). This makes + // the current block dead. + SI->addCase(cast(PredSCC->getOperand(1)), + BI->getSuccessor(0)); + OnlyPred->getInstList().erase(BI); + if (PredSCC->use_empty()) + PredSCC->getParent()->getInstList().erase(PredSCC); + + // Add our case... + SI->addCase(cast(SCI->getOperand(1)), + BBBr->getSuccessor(0)); + + AddPredecessorToBlock(BBBr->getSuccessor(0), OnlyPred, BB); + AddPredecessorToBlock(BBBr->getSuccessor(1), OnlyPred, BB); + + //std::cerr << "Formed Switch: " << SI; + + // Made a big change! Now this block is dead, so remove it. + return SimplifyCFG(BB); + } + + } else if (SwitchInst *SI = + dyn_cast(OnlyPred->getTerminator())) { + + } + } + } + } + for (pred_iterator PI = pred_begin(BB), E = pred_end(BB); PI != E; ++PI) if (BranchInst *BI = dyn_cast((*PI)->getTerminator())) // Change br (X == 0 | X == 1), T, F into a switch instruction. From lattner at cs.uiuc.edu Thu Feb 26 01:25:02 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Thu Feb 26 01:25:02 2004 Subject: [llvm-commits] CVS: llvm/lib/VMCore/Type.cpp Message-ID: <200402260724.BAA25893@zion.cs.uiuc.edu> Changes in directory llvm/lib/VMCore: Type.cpp updated: 1.95 -> 1.96 --- Log message: Make sure that at least one virtual method is defined in a .cpp file to avoid having the compiler emit RTTI and vtables to EVERY translation unit. --- Diffs of the changes: (+1 -0) Index: llvm/lib/VMCore/Type.cpp diff -u llvm/lib/VMCore/Type.cpp:1.95 llvm/lib/VMCore/Type.cpp:1.96 --- llvm/lib/VMCore/Type.cpp:1.95 Mon Feb 16 21:03:47 2004 +++ llvm/lib/VMCore/Type.cpp Thu Feb 26 01:24:18 2004 @@ -26,6 +26,7 @@ // //#define DEBUG_MERGE_TYPES 1 +AbstractTypeUser::~AbstractTypeUser() {} //===----------------------------------------------------------------------===// // Type Class Implementation From lattner at cs.uiuc.edu Thu Feb 26 01:25:43 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Thu Feb 26 01:25:43 2004 Subject: [llvm-commits] CVS: llvm/include/llvm/AbstractTypeUser.h Message-ID: <200402260724.BAA25410@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm: AbstractTypeUser.h updated: 1.18 -> 1.19 --- Log message: Make sure that at least one virtual method is defined in a .cpp file to avoid having the compiler emit RTTI and vtables to EVERY translation unit. --- Diffs of the changes: (+1 -1) Index: llvm/include/llvm/AbstractTypeUser.h diff -u llvm/include/llvm/AbstractTypeUser.h:1.18 llvm/include/llvm/AbstractTypeUser.h:1.19 --- llvm/include/llvm/AbstractTypeUser.h:1.18 Tue Dec 23 17:25:21 2003 +++ llvm/include/llvm/AbstractTypeUser.h Thu Feb 26 01:24:08 2004 @@ -44,7 +44,7 @@ class AbstractTypeUser { protected: - virtual ~AbstractTypeUser() {} // Derive from me + virtual ~AbstractTypeUser(); // Derive from me public: /// refineAbstractType - The callback method invoked when an abstract type is From lattner at cs.uiuc.edu Thu Feb 26 01:26:21 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Thu Feb 26 01:26:21 2004 Subject: [llvm-commits] CVS: llvm/lib/Support/Annotation.cpp Message-ID: <200402260724.BAA25218@zion.cs.uiuc.edu> Changes in directory llvm/lib/Support: Annotation.cpp updated: 1.13 -> 1.14 --- Log message: Make sure that at least one virtual method is defined in a .cpp file to avoid having the compiler emit RTTI and vtables to EVERY translation unit. --- Diffs of the changes: (+12 -1) Index: llvm/lib/Support/Annotation.cpp diff -u llvm/lib/Support/Annotation.cpp:1.13 llvm/lib/Support/Annotation.cpp:1.14 --- llvm/lib/Support/Annotation.cpp:1.13 Sun Dec 14 15:35:53 2003 +++ llvm/lib/Support/Annotation.cpp Thu Feb 26 01:23:57 2004 @@ -15,6 +15,18 @@ #include "Support/Annotation.h" using namespace llvm; +Annotation::~Annotation() {} // Designed to be subclassed + +Annotable::~Annotable() { // Virtual because it's designed to be subclassed... + Annotation *A = AnnotationList; + while (A) { + Annotation *Next = A->getNext(); + delete A; + A = Next; + } +} + + typedef std::map IDMapType; static unsigned IDCounter = 0; // Unique ID counter @@ -40,7 +52,6 @@ TheFactMap = 0; } } - AnnotationID AnnotationManager::getID(const std::string &Name) { // Name -> ID IDMapType::iterator I = getIDMap().find(Name); From lattner at cs.uiuc.edu Thu Feb 26 01:27:02 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Thu Feb 26 01:27:02 2004 Subject: [llvm-commits] CVS: llvm/include/Support/Annotation.h Message-ID: <200402260724.BAA24928@zion.cs.uiuc.edu> Changes in directory llvm/include/Support: Annotation.h updated: 1.13 -> 1.14 --- Log message: Make sure that at least one virtual method is defined in a .cpp file to avoid having the compiler emit RTTI and vtables to EVERY translation unit. --- Diffs of the changes: (+2 -9) Index: llvm/include/Support/Annotation.h diff -u llvm/include/Support/Annotation.h:1.13 llvm/include/Support/Annotation.h:1.14 --- llvm/include/Support/Annotation.h:1.13 Tue Nov 11 16:41:29 2003 +++ llvm/include/Support/Annotation.h Thu Feb 26 01:23:53 2004 @@ -68,7 +68,7 @@ Annotation *Next; // The next annotation in the linked list public: inline Annotation(AnnotationID id) : ID(id), Next(0) {} - virtual ~Annotation() {} // Designed to be subclassed + virtual ~Annotation(); // Designed to be subclassed // getID - Return the unique ID# of this annotation inline AnnotationID getID() const { return ID; } @@ -95,14 +95,7 @@ void operator=(const Annotable &); // Do not implement public: Annotable() : AnnotationList(0) {} - virtual ~Annotable() { // Virtual because it's designed to be subclassed... - Annotation *A = AnnotationList; - while (A) { - Annotation *Next = A->getNext(); - delete A; - A = Next; - } - } + virtual ~Annotable(); // Virtual because it's designed to be subclassed... // getAnnotation - Search the list for annotations of the specified ID. The // pointer returned is either null (if no annotations of the specified ID From lattner at cs.uiuc.edu Thu Feb 26 02:00:02 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Thu Feb 26 02:00:02 2004 Subject: [llvm-commits] CVS: llvm/lib/ExecutionEngine/Interpreter/Interpreter.h Message-ID: <200402260759.BAA26428@zion.cs.uiuc.edu> Changes in directory llvm/lib/ExecutionEngine/Interpreter: Interpreter.h updated: 1.60 -> 1.61 --- Log message: remove obsolete comment --- Diffs of the changes: (+1 -1) Index: llvm/lib/ExecutionEngine/Interpreter/Interpreter.h diff -u llvm/lib/ExecutionEngine/Interpreter/Interpreter.h:1.60 llvm/lib/ExecutionEngine/Interpreter/Interpreter.h:1.61 --- llvm/lib/ExecutionEngine/Interpreter/Interpreter.h:1.60 Fri Feb 13 00:18:39 2004 +++ llvm/lib/ExecutionEngine/Interpreter/Interpreter.h Thu Feb 26 01:59:22 2004 @@ -24,7 +24,7 @@ namespace llvm { -struct FunctionInfo; // Defined in ExecutionAnnotations.h +struct FunctionInfo; class gep_type_iterator; class ConstantExpr; From lattner at cs.uiuc.edu Thu Feb 26 02:02:01 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Thu Feb 26 02:02:01 2004 Subject: [llvm-commits] CVS: llvm/include/Config/sys/resource.h stat.h time.h types.h wait.h Message-ID: <200402260801.CAA27233@zion.cs.uiuc.edu> Changes in directory llvm/include/Config/sys: resource.h updated: 1.3 -> 1.4 stat.h updated: 1.3 -> 1.4 time.h updated: 1.3 -> 1.4 types.h updated: 1.3 -> 1.4 wait.h updated: 1.3 -> 1.4 --- Log message: Eliminate copy-and-paste comments --- Diffs of the changes: (+5 -5) Index: llvm/include/Config/sys/resource.h diff -u llvm/include/Config/sys/resource.h:1.3 llvm/include/Config/sys/resource.h:1.4 --- llvm/include/Config/sys/resource.h:1.3 Mon Oct 20 15:11:42 2003 +++ llvm/include/Config/sys/resource.h Thu Feb 26 02:01:30 2004 @@ -1,4 +1,4 @@ -/*===-- Config/sys/resource.h - Annotation classes --------------*- C++ -*-===// +/*===-- Config/sys/resource.h -----------------------------------*- C++ -*-===// * * The LLVM Compiler Infrastructure * Index: llvm/include/Config/sys/stat.h diff -u llvm/include/Config/sys/stat.h:1.3 llvm/include/Config/sys/stat.h:1.4 --- llvm/include/Config/sys/stat.h:1.3 Mon Oct 20 15:11:42 2003 +++ llvm/include/Config/sys/stat.h Thu Feb 26 02:01:30 2004 @@ -1,4 +1,4 @@ -/*===-- Config/sys/stat.h - Annotation classes --------------*- ----C++ -*-===// +/*===-- Config/sys/stat.h -----------------------------------*- ----C++ -*-===// * * The LLVM Compiler Infrastructure * Index: llvm/include/Config/sys/time.h diff -u llvm/include/Config/sys/time.h:1.3 llvm/include/Config/sys/time.h:1.4 --- llvm/include/Config/sys/time.h:1.3 Mon Oct 20 15:11:43 2003 +++ llvm/include/Config/sys/time.h Thu Feb 26 02:01:30 2004 @@ -1,4 +1,4 @@ -/*===-- Config/sys/time.h - Annotation classes ------------------*- C++ -*-===// +/*===-- Config/sys/time.h ---------------------------------------*- C++ -*-===// * * The LLVM Compiler Infrastructure * Index: llvm/include/Config/sys/types.h diff -u llvm/include/Config/sys/types.h:1.3 llvm/include/Config/sys/types.h:1.4 --- llvm/include/Config/sys/types.h:1.3 Mon Oct 20 15:11:43 2003 +++ llvm/include/Config/sys/types.h Thu Feb 26 02:01:30 2004 @@ -1,4 +1,4 @@ -/*===-- Config/sys/types.h - Annotation classes --------------*- C++ -*-===// +/*===-- Config/sys/types.h --------------------------------------*- C++ -*-===// * * The LLVM Compiler Infrastructure * Index: llvm/include/Config/sys/wait.h diff -u llvm/include/Config/sys/wait.h:1.3 llvm/include/Config/sys/wait.h:1.4 --- llvm/include/Config/sys/wait.h:1.3 Mon Oct 20 15:11:43 2003 +++ llvm/include/Config/sys/wait.h Thu Feb 26 02:01:30 2004 @@ -1,4 +1,4 @@ -/*===-- Config/sys/wait.h - Annotation classes ------------------*- C++ -*-===// +/*===-- Config/sys/wait.h ---------------------------------------*- C++ -*-===// * * The LLVM Compiler Infrastructure * From lattner at cs.uiuc.edu Thu Feb 26 02:03:03 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Thu Feb 26 02:03:03 2004 Subject: [llvm-commits] CVS: llvm/lib/Target/TargetData.cpp Message-ID: <200402260802.CAA27320@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target: TargetData.cpp updated: 1.42 -> 1.43 --- Log message: Use a map instead of annotations --- Diffs of the changes: (+36 -23) Index: llvm/lib/Target/TargetData.cpp diff -u llvm/lib/Target/TargetData.cpp:1.42 llvm/lib/Target/TargetData.cpp:1.43 --- llvm/lib/Target/TargetData.cpp:1.42 Sun Feb 8 22:37:30 2004 +++ llvm/lib/Target/TargetData.cpp Thu Feb 26 02:02:17 2004 @@ -8,8 +8,7 @@ //===----------------------------------------------------------------------===// // // This file defines target properties related to datatype size/offset/alignment -// information. It uses lazy annotations to cache information about how -// structure types are laid out and used. +// information. // // This structure should be created once, filled in if the defaults are not // correct and then passed around by const&. None of the members functions @@ -33,11 +32,10 @@ uint64_t &Size, unsigned char &Alignment); //===----------------------------------------------------------------------===// -// Support for StructLayout Annotation +// Support for StructLayout //===----------------------------------------------------------------------===// -StructLayout::StructLayout(const StructType *ST, const TargetData &TD) - : Annotation(TD.getStructLayoutAID()) { +StructLayout::StructLayout(const StructType *ST, const TargetData &TD) { StructAlignment = 0; StructSize = 0; @@ -71,16 +69,6 @@ StructSize = (StructSize/StructAlignment + 1) * StructAlignment; } -Annotation *TargetData::TypeAnFactory(AnnotationID AID, const Annotable *T, - void *D) { - const TargetData &TD = *(const TargetData*)D; - assert(AID == TD.AID && "Target data annotation ID mismatch!"); - const Type *Ty = cast((const Value *)T); - assert(isa(Ty) && - "Can only create StructLayout annotation on structs!"); - return new StructLayout(cast(Ty), TD); -} - //===----------------------------------------------------------------------===// // TargetData Class Implementation //===----------------------------------------------------------------------===// @@ -90,9 +78,7 @@ unsigned char PtrAl, unsigned char DoubleAl, unsigned char FloatAl, unsigned char LongAl, unsigned char IntAl, unsigned char ShortAl, - unsigned char ByteAl) - : AID(AnnotationManager::getID("TargetData::" + TargetName)) { - AnnotationManager::registerAnnotationFactory(AID, TypeAnFactory, this); + unsigned char ByteAl) { // If this assert triggers, a pass "required" TargetData information, but the // top level tool did not provide once for it. We do not want to default @@ -114,10 +100,7 @@ ByteAlignment = ByteAl; } -TargetData::TargetData(const std::string &ToolName, const Module *M) - : AID(AnnotationManager::getID("TargetData::" + ToolName)) { - AnnotationManager::registerAnnotationFactory(AID, TypeAnFactory, this); - +TargetData::TargetData(const std::string &ToolName, const Module *M) { LittleEndian = M->getEndianness() != Module::BigEndian; PointerSize = M->getPointerSize() != Module::Pointer64 ? 4 : 8; PointerAlignment = PointerSize; @@ -129,8 +112,38 @@ ByteAlignment = 1; } +static std::map, + StructLayout> *Layouts = 0; + + TargetData::~TargetData() { - AnnotationManager::registerAnnotationFactory(AID, 0); // Deregister factory + if (Layouts) { + // Remove any layouts for this TD. + std::map, StructLayout>::iterator + I = Layouts->lower_bound(std::make_pair(this, (const StructType*)0)); + while (I != Layouts->end() && I->first.first == this) + Layouts->erase(I++); + if (Layouts->empty()) { + delete Layouts; + Layouts = 0; + } + } +} + +const StructLayout *TargetData::getStructLayout(const StructType *Ty) const { + if (Layouts == 0) + Layouts = new std::map, + StructLayout>(); + std::map, + StructLayout>::iterator + I = Layouts->lower_bound(std::make_pair(this, Ty)); + if (I != Layouts->end() && I->first.first == this && I->first.second == Ty) + return &I->second; + else { + return &Layouts->insert(I, std::make_pair(std::make_pair(this, Ty), + StructLayout(Ty, *this)))->second; + } } static inline void getTypeInfo(const Type *Ty, const TargetData *TD, From lattner at cs.uiuc.edu Thu Feb 26 02:03:41 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Thu Feb 26 02:03:41 2004 Subject: [llvm-commits] CVS: llvm/include/llvm/Target/TargetData.h Message-ID: <200402260802.CAA27272@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/Target: TargetData.h updated: 1.22 -> 1.23 --- Log message: Make TargetData no longer use annotations! --- Diffs of the changes: (+6 -14) Index: llvm/include/llvm/Target/TargetData.h diff -u llvm/include/llvm/Target/TargetData.h:1.22 llvm/include/llvm/Target/TargetData.h:1.23 --- llvm/include/llvm/Target/TargetData.h:1.22 Sun Dec 21 23:00:45 2003 +++ llvm/include/llvm/Target/TargetData.h Thu Feb 26 02:01:57 2004 @@ -21,9 +21,9 @@ #define LLVM_TARGET_TARGETDATA_H #include "llvm/Pass.h" -#include "Support/Annotation.h" #include "Support/DataTypes.h" #include +#include namespace llvm { @@ -42,9 +42,6 @@ unsigned char DoubleAlignment; // Defaults to 8 bytes unsigned char PointerSize; // Defaults to 8 bytes unsigned char PointerAlignment; // Defaults to 8 bytes - AnnotationID AID; // AID for structure layout annotation - - static Annotation *TypeAnFactory(AnnotationID, const Annotable *, void *); public: TargetData(const std::string &TargetName = "", bool LittleEndian = false, @@ -69,7 +66,6 @@ unsigned char getDoubleAlignment() const { return DoubleAlignment; } unsigned char getPointerAlignment() const { return PointerAlignment; } unsigned char getPointerSize() const { return PointerSize; } - AnnotationID getStructLayoutAID() const { return AID; } /// getTypeSize - Return the number of bytes necessary to hold the specified /// type @@ -89,23 +85,19 @@ uint64_t getIndexedOffset(const Type *Ty, const std::vector &Indices) const; - inline const StructLayout *getStructLayout(const StructType *Ty) const { - return (const StructLayout*) - ((const Annotable*)Ty)->getOrCreateAnnotation(AID); - } + const StructLayout *getStructLayout(const StructType *Ty) const; }; -// This annotation (attached ONLY to StructType classes) is used to lazily -// calculate structure layout information for a target machine, based on the -// TargetData structure. +// This object is used to lazily calculate structure layout information for a +// target machine, based on the TargetData structure. // -struct StructLayout : public Annotation { +struct StructLayout { std::vector MemberOffsets; uint64_t StructSize; unsigned StructAlignment; private: friend class TargetData; // Only TargetData can create this class - inline StructLayout(const StructType *ST, const TargetData &TD); + StructLayout(const StructType *ST, const TargetData &TD); }; } // End llvm namespace From lattner at cs.uiuc.edu Thu Feb 26 02:05:01 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Thu Feb 26 02:05:01 2004 Subject: [llvm-commits] CVS: llvm/docs/ReleaseNotes.html Message-ID: <200402260803.CAA27381@zion.cs.uiuc.edu> Changes in directory llvm/docs: ReleaseNotes.html updated: 1.135 -> 1.136 --- Log message: add note --- Diffs of the changes: (+3 -1) Index: llvm/docs/ReleaseNotes.html diff -u llvm/docs/ReleaseNotes.html:1.135 llvm/docs/ReleaseNotes.html:1.136 --- llvm/docs/ReleaseNotes.html:1.135 Wed Feb 25 18:08:25 2004 +++ llvm/docs/ReleaseNotes.html Thu Feb 26 02:02:57 2004 @@ -115,6 +115,8 @@

The X86 backend now generates substantially better native code, and is faster.

The C backend has been turned moved from the "llvm-dis" tool to the "llc" tool. You can activate it with "llc -march=c foo.bc -o foo.c".

LLVM includes a new interprocedural optimization that marks global variables +"constant" when they are provably never written to.

@@ -607,7 +609,7 @@ src="http://www.w3.org/Icons/valid-html401" alt="Valid HTML 4.01!" /> The LLVM Compiler Infrastructure
- Last modified: $Date: 2004/02/26 00:08:25 $ + Last modified: $Date: 2004/02/26 08:02:57 $ From lattner at cs.uiuc.edu Thu Feb 26 02:05:42 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Thu Feb 26 02:05:42 2004 Subject: [llvm-commits] CVS: poolalloc/test/TEST.poolalloc.Makefile Message-ID: <200402260804.CAA27822@zion.cs.uiuc.edu> Changes in directory poolalloc/test: TEST.poolalloc.Makefile updated: 1.14 -> 1.15 --- Log message: correct dependencies --- Diffs of the changes: (+2 -2) Index: poolalloc/test/TEST.poolalloc.Makefile diff -u poolalloc/test/TEST.poolalloc.Makefile:1.14 poolalloc/test/TEST.poolalloc.Makefile:1.15 --- poolalloc/test/TEST.poolalloc.Makefile:1.14 Tue Feb 24 15:02:05 2004 +++ poolalloc/test/TEST.poolalloc.Makefile Thu Feb 26 02:04:07 2004 @@ -31,7 +31,7 @@ # This rule runs the pool allocator on the .llvm.bc file to produce a new .bc # file $(PROGRAMS_TO_TEST:%=Output/%.$(TEST).transformed.bc): \ -Output/%.$(TEST).transformed.bc: Output/%.llvm.bc $(PA_SO) +Output/%.$(TEST).transformed.bc: Output/%.llvm.bc $(PA_SO) $(LOPT) - at rm -f $(CURDIR)/$@.info -$(OPT_PA_STATS) -q -poolalloc $(EXTRA_PA_FLAGS) -globaldce -ipconstprop -deadargelim $< -o $@ -f 2>&1 > $@.out @@ -100,4 +100,4 @@ @echo "---------------------------------------------------------------" @cat $< -REPORT_DEPENDENCIES := $(PA_RT_O) $(PA_SO) $(PROGRAMS_TO_TEST:%=Output/%.llvm.bc) $(LLC) +REPORT_DEPENDENCIES := $(PA_RT_O) $(PA_SO) $(PROGRAMS_TO_TEST:%=Output/%.llvm.bc) $(LLC) $(LOPT) From lattner at cs.uiuc.edu Thu Feb 26 02:09:00 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Thu Feb 26 02:09:00 2004 Subject: [llvm-commits] CVS: llvm/include/llvm/Function.h Value.h Message-ID: <200402260808.CAA28298@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm: Function.h updated: 1.49 -> 1.50 Value.h updated: 1.49 -> 1.50 --- Log message: Annotations are evil. This makes Value not derive from Annotable, which makes all dynamically allocated LLVM values 4 bytes smaller, eliminate some vtables, and make Value's destructor faster. This makes Function derive from Annotation now because it is the only core LLVM class that still has an annotation stuck onto it: MachineFunction. MachineFunction is obviously horrible and gross (like most other annotations), but will be the subject of refactorings later in the future. Besides many fewer Function objects are dynamically allocated that instructions blocks, constants, types, etc... :) --- Diffs of the changes: (+3 -3) Index: llvm/include/llvm/Function.h diff -u llvm/include/llvm/Function.h:1.49 llvm/include/llvm/Function.h:1.50 --- llvm/include/llvm/Function.h:1.49 Tue Nov 11 16:41:29 2003 +++ llvm/include/llvm/Function.h Thu Feb 26 02:08:38 2004 @@ -21,6 +21,7 @@ #include "llvm/GlobalValue.h" #include "llvm/BasicBlock.h" #include "llvm/Argument.h" +#include "Support/Annotation.h" namespace llvm { @@ -44,7 +45,7 @@ static iplist &getList(Function *F); }; -class Function : public GlobalValue { +class Function : public GlobalValue, public Annotable { public: typedef iplist ArgumentListType; typedef iplist BasicBlockListType; Index: llvm/include/llvm/Value.h diff -u llvm/include/llvm/Value.h:1.49 llvm/include/llvm/Value.h:1.50 --- llvm/include/llvm/Value.h:1.49 Sat Jan 10 15:40:29 2004 +++ llvm/include/llvm/Value.h Thu Feb 26 02:08:38 2004 @@ -19,7 +19,6 @@ #include "llvm/AbstractTypeUser.h" #include "llvm/Use.h" -#include "Support/Annotation.h" #include "Support/Casting.h" #include @@ -42,7 +41,7 @@ /// Value - The base class of all values computed by a program that may be used /// as operands to other values. /// -struct Value : public Annotable { // Values are annotable +struct Value { enum ValueTy { TypeVal, // This is an instance of Type ConstantVal, // This is an instance of Constant From lattner at cs.uiuc.edu Thu Feb 26 14:03:01 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Thu Feb 26 14:03:01 2004 Subject: [llvm-commits] CVS: llvm/lib/Transforms/IPO/DeadTypeElimination.cpp Message-ID: <200402262002.OAA04920@zion.cs.uiuc.edu> Changes in directory llvm/lib/Transforms/IPO: DeadTypeElimination.cpp updated: 1.48 -> 1.49 --- Log message: Since LLVM uses structure type equivalence, it isn't useful to keep around multiple type names for the same structural type. Make DTE eliminate all but one of the type names --- Diffs of the changes: (+11 -10) Index: llvm/lib/Transforms/IPO/DeadTypeElimination.cpp diff -u llvm/lib/Transforms/IPO/DeadTypeElimination.cpp:1.48 llvm/lib/Transforms/IPO/DeadTypeElimination.cpp:1.49 --- llvm/lib/Transforms/IPO/DeadTypeElimination.cpp:1.48 Fri Nov 21 15:54:21 2003 +++ llvm/lib/Transforms/IPO/DeadTypeElimination.cpp Thu Feb 26 14:02:23 2004 @@ -49,12 +49,12 @@ // ShouldNukeSymtabEntry - Return true if this module level symbol table entry // should be eliminated. // -static inline bool ShouldNukeSymtabEntry(const std::pair&E){ +static inline bool ShouldNukeSymtabEntry(const Type *Ty){ // Nuke all names for primitive types! - if (cast(E.second)->isPrimitiveType()) return true; + if (Ty->isPrimitiveType()) return true; // Nuke all pointers to primitive types as well... - if (const PointerType *PT = dyn_cast(E.second)) + if (const PointerType *PT = dyn_cast(Ty)) if (PT->getElementType()->isPrimitiveType()) return true; return false; @@ -69,8 +69,7 @@ bool Changed = false; SymbolTable &ST = M.getSymbolTable(); - const std::set &UsedTypes = - getAnalysis().getTypes(); + std::set UsedTypes = getAnalysis().getTypes(); // Check the symbol table for superfluous type entries... // @@ -79,18 +78,20 @@ if (STI != ST.end()) { // Loop over all entries in the type plane... SymbolTable::VarMap &Plane = STI->second; - for (SymbolTable::VarMap::iterator PI = Plane.begin(); PI != Plane.end();) + for (SymbolTable::VarMap::iterator PI = Plane.begin(); PI != Plane.end();) { // If this entry should be unconditionally removed, or if we detect that // the type is not used, remove it. - if (ShouldNukeSymtabEntry(*PI) || - !UsedTypes.count(cast(PI->second))) { - SymbolTable::VarMap::iterator PJ = PI++; - Plane.erase(PJ); + const Type *RHS = cast(PI->second); + if (ShouldNukeSymtabEntry(RHS) || !UsedTypes.count(RHS)) { + Plane.erase(PI++); ++NumKilled; Changed = true; } else { ++PI; + // We only need to leave one name for each type. + UsedTypes.erase(RHS); } + } } return Changed; From criswell at cs.uiuc.edu Thu Feb 26 14:17:01 2004 From: criswell at cs.uiuc.edu (John Criswell) Date: Thu Feb 26 14:17:01 2004 Subject: [llvm-commits] CVS: llvm/test/Programs/External/Povray/Makefile Message-ID: <200402262016.OAA23532@choi.cs.uiuc.edu> Changes in directory llvm/test/Programs/External/Povray: Makefile updated: 1.3 -> 1.4 --- Log message: Makefile for Povray 3.1g. --- Diffs of the changes: (+5 -4) Index: llvm/test/Programs/External/Povray/Makefile diff -u llvm/test/Programs/External/Povray/Makefile:1.3 llvm/test/Programs/External/Povray/Makefile:1.4 --- llvm/test/Programs/External/Povray/Makefile:1.3 Fri Feb 20 16:10:33 2004 +++ llvm/test/Programs/External/Povray/Makefile Thu Feb 26 14:16:01 2004 @@ -3,11 +3,12 @@ include $(LEVEL)/Makefile.config PROG = povray -CPPFLAGS += -I$(BUILD_SRC_ROOT)/runtime/libpng -DPREFIX=\"$(BUILD_OBJ_DIR)\" -DSYSCONFDIR=\"$(POVRAY_ROOT)\" -DPOV_LIB_DIR=\"$(BUILD_OBJ_DIR)/lib\" -IOutput/src -UHAVE_LIBVGA -LIBS += -lz -lpng -lstdc++ -ltiff -LDFLAGS += -L$(BUILD_OBJ_ROOT)/lib/$(CONFIGURATION) -lz -lpng -lstdc++ -ltiff -SourceDir = $(POVRAY_ROOT)/src +SourceDir = $(POVRAY_ROOT)/source + +CPPFLAGS += -I$(POVRAY_ROOT)/source/unix -I$(BUILD_SRC_ROOT)/runtime/libpng -DPREFIX=\"$(BUILD_OBJ_DIR)\" -DSYSCONFDIR=\"$(POVRAY_ROOT)\" -DPOV_LIB_DIR=\"$(BUILD_OBJ_DIR)/lib\" -IOutput/src -UHAVE_LIBVGA +LIBS += -lz -lpng -lstdc++ -ltiff -ljpeg +LDFLAGS += -L$(BUILD_OBJ_ROOT)/lib/$(CONFIGURATION) -lz -lpng -lstdc++ -ltiff -ljpeg RUN_OPTIONS = -I$(POVRAY_ROOT)/scenes/advanced/chess2.pov -L$(POVRAY_ROOT)/include -GA$<.junk -O- include ../../MultiSource/Makefile.multisrc From criswell at cs.uiuc.edu Thu Feb 26 14:24:01 2004 From: criswell at cs.uiuc.edu (John Criswell) Date: Thu Feb 26 14:24:01 2004 Subject: [llvm-commits] CVS: llvm/autoconf/configure.ac Message-ID: <200402262023.OAA31016@choi.cs.uiuc.edu> Changes in directory llvm/autoconf: configure.ac updated: 1.81 -> 1.82 --- Log message: Modified the default pathname for Povray. --- Diffs of the changes: (+3 -3) Index: llvm/autoconf/configure.ac diff -u llvm/autoconf/configure.ac:1.81 llvm/autoconf/configure.ac:1.82 --- llvm/autoconf/configure.ac:1.81 Wed Feb 25 22:14:10 2004 +++ llvm/autoconf/configure.ac Thu Feb 26 14:22:59 2004 @@ -346,9 +346,9 @@ AC_ARG_ENABLE(povray,AC_HELP_STRING([--enable-povray],[Compile Povray benchmark (default is NO)]),,enableval=no) if test ${enableval} = "no" then - if test -d /home/vadve/criswell/Downloads/povray-3.50c + if test -d /home/vadve/shared/benchmarks/povray31 then - AC_SUBST(POVRAY_ROOT,[/home/vadve/criswell/Downloads/povray-3.50c]) + AC_SUBST(POVRAY_ROOT,[/home/vadve/shared/benchmarks/povray31]) AC_SUBST(USE_POVRAY,[[USE_POVRAY=1]]) else AC_SUBST(USE_POVRAY,[[]]) @@ -357,7 +357,7 @@ else if test ${enableval} = "" then - AC_SUBST(POVRAY_ROOT,[/home/vadve/criswell/Downloads/povray-3.50c]) + AC_SUBST(POVRAY_ROOT,[/home/vadve/shared/benchmarks/povray31]) else AC_SUBST(POVRAY_ROOT,[${enableval}]) fi From criswell at cs.uiuc.edu Thu Feb 26 14:24:40 2004 From: criswell at cs.uiuc.edu (John Criswell) Date: Thu Feb 26 14:24:40 2004 Subject: [llvm-commits] CVS: llvm/configure Message-ID: <200402262023.OAA31009@choi.cs.uiuc.edu> Changes in directory llvm: configure updated: 1.83 -> 1.84 --- Log message: Modified the default pathname for Povray. --- Diffs of the changes: (+3 -3) Index: llvm/configure diff -u llvm/configure:1.83 llvm/configure:1.84 --- llvm/configure:1.83 Wed Feb 25 22:14:10 2004 +++ llvm/configure Thu Feb 26 14:22:57 2004 @@ -21905,9 +21905,9 @@ fi; if test ${enableval} = "no" then - if test -d /home/vadve/criswell/Downloads/povray-3.50c + if test -d /home/vadve/shared/benchmarks/povray31 then - POVRAY_ROOT=/home/vadve/criswell/Downloads/povray-3.50c + POVRAY_ROOT=/home/vadve/shared/benchmarks/povray31 USE_POVRAY=USE_POVRAY=1 @@ -21919,7 +21919,7 @@ else if test ${enableval} = "" then - POVRAY_ROOT=/home/vadve/criswell/Downloads/povray-3.50c + POVRAY_ROOT=/home/vadve/shared/benchmarks/povray31 else POVRAY_ROOT=${enableval} From alkis at cs.uiuc.edu Thu Feb 26 16:01:01 2004 From: alkis at cs.uiuc.edu (Alkis Evlogimenos) Date: Thu Feb 26 16:01:01 2004 Subject: [llvm-commits] CVS: llvm/include/llvm/Target/MRegisterInfo.h Message-ID: <200402262200.QAA24536@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/Target: MRegisterInfo.h updated: 1.38 -> 1.39 --- Log message: Uncomment assertions that register# != 0 on calls to MRegisterInfo::is{Physical,Virtual}Register. Apply appropriate fixes to relevant files. --- Diffs of the changes: (+2 -2) Index: llvm/include/llvm/Target/MRegisterInfo.h diff -u llvm/include/llvm/Target/MRegisterInfo.h:1.38 llvm/include/llvm/Target/MRegisterInfo.h:1.39 --- llvm/include/llvm/Target/MRegisterInfo.h:1.38 Wed Feb 25 17:56:36 2004 +++ llvm/include/llvm/Target/MRegisterInfo.h Thu Feb 26 16:00:20 2004 @@ -141,14 +141,14 @@ /// isPhysicalRegister - Return true if the specified register number is in /// the physical register namespace. static bool isPhysicalRegister(unsigned Reg) { -// assert(Reg && "this is not a register!"); + assert(Reg && "this is not a register!"); return Reg < FirstVirtualRegister; } /// isVirtualRegister - Return true if the specified register number is in /// the virtual register namespace. static bool isVirtualRegister(unsigned Reg) { -// assert(Reg && "this is not a register!"); + assert(Reg && "this is not a register!"); return Reg >= FirstVirtualRegister; } From alkis at cs.uiuc.edu Thu Feb 26 16:01:38 2004 From: alkis at cs.uiuc.edu (Alkis Evlogimenos) Date: Thu Feb 26 16:01:38 2004 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/InstSelectSimple.cpp Message-ID: <200402262200.QAA24522@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: InstSelectSimple.cpp updated: 1.179 -> 1.180 --- Log message: Uncomment assertions that register# != 0 on calls to MRegisterInfo::is{Physical,Virtual}Register. Apply appropriate fixes to relevant files. --- Diffs of the changes: (+5 -4) Index: llvm/lib/Target/X86/InstSelectSimple.cpp diff -u llvm/lib/Target/X86/InstSelectSimple.cpp:1.179 llvm/lib/Target/X86/InstSelectSimple.cpp:1.180 --- llvm/lib/Target/X86/InstSelectSimple.cpp:1.179 Wed Feb 25 19:20:02 2004 +++ llvm/lib/Target/X86/InstSelectSimple.cpp Thu Feb 26 16:00:19 2004 @@ -696,14 +696,15 @@ for (MachineFunction::iterator BB = F->begin(), E = F->end(); BB != E; ++BB) { for (MachineBasicBlock::iterator I = BB->begin(), E = BB->end(); I!=E; ++I) - for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i) - if (I->getOperand(i).isRegister()) { - unsigned Reg = I->getOperand(i).getReg(); + for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i) { + MachineOperand& MO = I->getOperand(i); + if (MO.isRegister() && MO.getReg()) { + unsigned Reg = MO.getReg(); if (MRegisterInfo::isVirtualRegister(Reg)) if (RegMap.getRegClass(Reg)->getSize() == 10) goto UsesFPReg; } - + } // If we haven't found an FP register use or def in this basic block, check // to see if any of our successors has an FP PHI node, which will cause a // copy to be inserted into this block. From alkis at cs.uiuc.edu Thu Feb 26 16:02:15 2004 From: alkis at cs.uiuc.edu (Alkis Evlogimenos) Date: Thu Feb 26 16:02:15 2004 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/RegAllocLocal.cpp LiveVariables.cpp LiveIntervals.cpp Message-ID: <200402262200.QAA24531@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen: RegAllocLocal.cpp updated: 1.59 -> 1.60 LiveVariables.cpp updated: 1.26 -> 1.27 LiveIntervals.cpp updated: 1.63 -> 1.64 --- Log message: Uncomment assertions that register# != 0 on calls to MRegisterInfo::is{Physical,Virtual}Register. Apply appropriate fixes to relevant files. --- Diffs of the changes: (+23 -17) Index: llvm/lib/CodeGen/RegAllocLocal.cpp diff -u llvm/lib/CodeGen/RegAllocLocal.cpp:1.59 llvm/lib/CodeGen/RegAllocLocal.cpp:1.60 --- llvm/lib/CodeGen/RegAllocLocal.cpp:1.59 Wed Feb 25 23:21:21 2004 +++ llvm/lib/CodeGen/RegAllocLocal.cpp Thu Feb 26 16:00:20 2004 @@ -542,11 +542,13 @@ // physical register is referenced by the instruction, that it is guaranteed // to be live-in, or the input is badly hosed. // - for (unsigned i = 0; i != MI->getNumOperands(); ++i) - if (MI->getOperand(i).isUse() && - !MI->getOperand(i).isDef() && MI->getOperand(i).isRegister() && - MRegisterInfo::isVirtualRegister(MI->getOperand(i).getReg())) + for (unsigned i = 0; i != MI->getNumOperands(); ++i) { + MachineOperand& MO = MI->getOperand(i); + // here we are looking for only used operands (never def&use) + if (!MO.isDef() && MO.isRegister() && MO.getReg() && + MRegisterInfo::isVirtualRegister(MO.getReg())) MI = reloadVirtReg(MBB, MI, i); + } // If this instruction is the last user of anything in registers, kill the // value, freeing the register being used, so it doesn't need to be @@ -573,10 +575,11 @@ // Loop over all of the operands of the instruction, spilling registers that // are defined, and marking explicit destinations in the PhysRegsUsed map. - for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) - if (MI->getOperand(i).isDef() && MI->getOperand(i).isRegister() && - MRegisterInfo::isPhysicalRegister(MI->getOperand(i).getReg())) { - unsigned Reg = MI->getOperand(i).getReg(); + for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { + MachineOperand& MO = MI->getOperand(i); + if (MO.isDef() && MO.isRegister() && MO.getReg() && + MRegisterInfo::isPhysicalRegister(MO.getReg())) { + unsigned Reg = MO.getReg(); spillPhysReg(MBB, MI, Reg, true); // Spill any existing value in the reg PhysRegsUsed[Reg] = 0; // It is free and reserved now PhysRegsUseOrder.push_back(Reg); @@ -586,6 +589,7 @@ PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now } } + } // Loop over the implicit defs, spilling them as well. for (const unsigned *ImplicitDefs = TID.ImplicitDefs; @@ -606,10 +610,11 @@ // implicit defs and assign them to a register, spilling incoming values if // we need to scavenge a register. // - for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) - if (MI->getOperand(i).isDef() && MI->getOperand(i).isRegister() && - MRegisterInfo::isVirtualRegister(MI->getOperand(i).getReg())) { - unsigned DestVirtReg = MI->getOperand(i).getReg(); + for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { + MachineOperand& MO = MI->getOperand(i); + if (MO.isDef() && MO.isRegister() && MO.getReg() && + MRegisterInfo::isVirtualRegister(MO.getReg())) { + unsigned DestVirtReg = MO.getReg(); unsigned DestPhysReg; // If DestVirtReg already has a value, use it. @@ -618,6 +623,7 @@ markVirtRegModified(DestVirtReg); MI->SetMachineOperandReg(i, DestPhysReg); // Assign the output register } + } // If this instruction defines any registers that are immediately dead, // kill them now. Index: llvm/lib/CodeGen/LiveVariables.cpp diff -u llvm/lib/CodeGen/LiveVariables.cpp:1.26 llvm/lib/CodeGen/LiveVariables.cpp:1.27 --- llvm/lib/CodeGen/LiveVariables.cpp:1.26 Thu Feb 19 12:32:29 2004 +++ llvm/lib/CodeGen/LiveVariables.cpp Thu Feb 26 16:00:20 2004 @@ -232,7 +232,7 @@ // Process all explicit uses... for (unsigned i = 0; i != NumOperandsToProcess; ++i) { MachineOperand &MO = MI->getOperand(i); - if (MO.isUse() && MO.isRegister()) { + if (MO.isUse() && MO.isRegister() && MO.getReg()) { if (MRegisterInfo::isVirtualRegister(MO.getReg())){ HandleVirtRegUse(getVarInfo(MO.getReg()), MBB, MI); } else if (MRegisterInfo::isPhysicalRegister(MO.getReg()) && @@ -250,7 +250,7 @@ // Process all explicit defs... for (unsigned i = 0; i != NumOperandsToProcess; ++i) { MachineOperand &MO = MI->getOperand(i); - if (MO.isDef() && MO.isRegister()) { + if (MO.isDef() && MO.isRegister() && MO.getReg()) { if (MRegisterInfo::isVirtualRegister(MO.getReg())) { VarInfo &VRInfo = getVarInfo(MO.getReg()); @@ -325,7 +325,7 @@ // the instruction. for (unsigned i = 0, e = NewMI->getNumOperands(); i != e; ++i) { MachineOperand &MO = NewMI->getOperand(i); - if (MO.isRegister() && MO.isDef() && + if (MO.isRegister() && MO.isDef() && MO.getReg() && MRegisterInfo::isVirtualRegister(MO.getReg())) { unsigned Reg = MO.getReg(); VarInfo &VI = getVarInfo(Reg); Index: llvm/lib/CodeGen/LiveIntervals.cpp diff -u llvm/lib/CodeGen/LiveIntervals.cpp:1.63 llvm/lib/CodeGen/LiveIntervals.cpp:1.64 --- llvm/lib/CodeGen/LiveIntervals.cpp:1.63 Sun Feb 22 19:01:21 2004 +++ llvm/lib/CodeGen/LiveIntervals.cpp Thu Feb 26 16:00:20 2004 @@ -134,7 +134,7 @@ mii != mie; ) { for (unsigned i = 0; i < mii->getNumOperands(); ++i) { const MachineOperand& mop = mii->getOperand(i); - if (mop.isRegister()) { + if (mop.isRegister() && mop.getReg()) { // replace register with representative register unsigned reg = rep(mop.getReg()); mii->SetMachineOperandReg(i, reg); @@ -421,7 +421,7 @@ for (int i = mi->getNumOperands() - 1; i >= 0; --i) { MachineOperand& mop = mi->getOperand(i); // handle register defs - build intervals - if (mop.isRegister() && mop.isDef()) + if (mop.isRegister() && mop.getReg() && mop.isDef()) handleRegisterDef(mbb, mi, mop.getReg()); } } From lattner at cs.uiuc.edu Thu Feb 26 16:08:01 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Thu Feb 26 16:08:01 2004 Subject: [llvm-commits] CVS: llvm/lib/Analysis/DataStructure/Local.cpp Message-ID: <200402262207.QAA25578@zion.cs.uiuc.edu> Changes in directory llvm/lib/Analysis/DataStructure: Local.cpp updated: 1.92 -> 1.93 --- Log message: Be a good little compiler and handle direct calls efficiently, even if there are beastly ConstantPointerRefs in the way... --- Diffs of the changes: (+13 -10) Index: llvm/lib/Analysis/DataStructure/Local.cpp diff -u llvm/lib/Analysis/DataStructure/Local.cpp:1.92 llvm/lib/Analysis/DataStructure/Local.cpp:1.93 --- llvm/lib/Analysis/DataStructure/Local.cpp:1.92 Wed Feb 25 21:43:08 2004 +++ llvm/lib/Analysis/DataStructure/Local.cpp Thu Feb 26 16:07:22 2004 @@ -465,8 +465,12 @@ } void GraphBuilder::visitCallSite(CallSite CS) { + Value *Callee = CS.getCalledValue(); + if (ConstantPointerRef *CPR = dyn_cast(Callee)) + Callee = CPR->getValue(); + // Special case handling of certain libc allocation functions here. - if (Function *F = CS.getCalledFunction()) + if (Function *F = dyn_cast(Callee)) if (F->isExternal()) switch (F->getIntrinsicID()) { case Intrinsic::memmove: @@ -809,12 +813,11 @@ if (isPointerType(I->getType())) RetVal = getValueDest(*I); - DSNode *Callee = 0; - if (DisableDirectCallOpt || !isa(CS.getCalledValue())) { - Callee = getValueDest(*CS.getCalledValue()).getNode(); - if (Callee == 0) { - std::cerr << "WARNING: Program is calling through a null pointer?\n" - << *I; + DSNode *CalleeNode = 0; + if (DisableDirectCallOpt || !isa(Callee)) { + CalleeNode = getValueDest(*Callee).getNode(); + if (CalleeNode == 0) { + std::cerr << "WARNING: Program is calling through a null pointer?\n"<< *I; return; // Calling a null pointer? } } @@ -828,10 +831,10 @@ Args.push_back(getValueDest(**I)); // Add a new function call entry... - if (Callee) - FunctionCalls->push_back(DSCallSite(CS, RetVal, Callee, Args)); + if (CalleeNode) + FunctionCalls->push_back(DSCallSite(CS, RetVal, CalleeNode, Args)); else - FunctionCalls->push_back(DSCallSite(CS, RetVal, CS.getCalledFunction(), + FunctionCalls->push_back(DSCallSite(CS, RetVal, cast(Callee), Args)); } From criswell at cs.uiuc.edu Thu Feb 26 16:22:00 2004 From: criswell at cs.uiuc.edu (John Criswell) Date: Thu Feb 26 16:22:00 2004 Subject: [llvm-commits] CVS: llvm/lib/Target/CBackend/Writer.cpp Message-ID: <200402262221.QAA32530@choi.cs.uiuc.edu> Changes in directory llvm/lib/Target/CBackend: Writer.cpp updated: 1.164 -> 1.165 --- Log message: Fixes for PR258 and PR259. Functions with linkonce linkage are declared with weak linkage. Global floating point constants used to represent unprintable values (such as NaN and infinity) are declared static so that they don't interfere with other CBE generated translation units. --- Diffs of the changes: (+3 -3) Index: llvm/lib/Target/CBackend/Writer.cpp diff -u llvm/lib/Target/CBackend/Writer.cpp:1.164 llvm/lib/Target/CBackend/Writer.cpp:1.165 --- llvm/lib/Target/CBackend/Writer.cpp:1.164 Tue Feb 24 12:34:10 2004 +++ llvm/lib/Target/CBackend/Writer.cpp Thu Feb 26 16:20:58 2004 @@ -690,6 +690,7 @@ if (!I->getIntrinsicID()) { printFunctionSignature(I, true); if (I->hasWeakLinkage()) Out << " __ATTRIBUTE_WEAK__"; + if (I->hasLinkOnceLinkage()) Out << " __ATTRIBUTE_WEAK__"; Out << ";\n"; } } @@ -788,12 +789,12 @@ if (FPC->getType() == Type::DoubleTy) { DBLUnion.D = Val; - Out << "const ConstantDoubleTy FPConstant" << FPCounter++ + Out << "static const ConstantDoubleTy FPConstant" << FPCounter++ << " = 0x" << std::hex << DBLUnion.U << std::dec << "ULL; /* " << Val << " */\n"; } else if (FPC->getType() == Type::FloatTy) { FLTUnion.F = Val; - Out << "const ConstantFloatTy FPConstant" << FPCounter++ + Out << "static const ConstantFloatTy FPConstant" << FPCounter++ << " = 0x" << std::hex << FLTUnion.U << std::dec << "U; /* " << Val << " */\n"; } else @@ -890,7 +891,6 @@ void CWriter::printFunctionSignature(const Function *F, bool Prototype) { if (F->hasInternalLinkage()) Out << "static "; - if (F->hasLinkOnceLinkage()) Out << "inline "; // Loop over the arguments, printing them... const FunctionType *FT = cast(F->getFunctionType()); From criswell at cs.uiuc.edu Thu Feb 26 17:01:42 2004 From: criswell at cs.uiuc.edu (John Criswell) Date: Thu Feb 26 17:01:42 2004 Subject: [llvm-commits] CVS: llvm/test/Regression/CodeGen/CBackend/2004-02-26-FPNotPrintableConstants.llx 2004-02-26-LinkOnceFunctions.llx Message-ID: <200402262255.QAA02056@choi.cs.uiuc.edu> Changes in directory llvm/test/Regression/CodeGen/CBackend: 2004-02-26-FPNotPrintableConstants.llx added (r1.1) 2004-02-26-LinkOnceFunctions.llx added (r1.1) --- Log message: Regression tests for PR258 and PR259. 2004-02-26-FPNotPrintableConstants.llx ensures that constants used in an LLVM program are declared static if they are assigned to global variables. 2004-02-26-LinkOnceFunctions.llx ensures that linkonce functions get the weak attribute. --- Diffs of the changes: (+16 -0) Index: llvm/test/Regression/CodeGen/CBackend/2004-02-26-FPNotPrintableConstants.llx diff -c /dev/null llvm/test/Regression/CodeGen/CBackend/2004-02-26-FPNotPrintableConstants.llx:1.1 *** /dev/null Thu Feb 26 16:55:21 2004 --- llvm/test/Regression/CodeGen/CBackend/2004-02-26-FPNotPrintableConstants.llx Thu Feb 26 16:55:11 2004 *************** *** 0 **** --- 1,8 ---- + ; This is a non-normal FP value: it's a nan. + ; RUN: llvm-as < %s | llc -march=c + ; llvm-as < %s | llc -march=c | grep FPConstant | grep static + + float %func () { + ret float 0xFF20000000000000 + } + Index: llvm/test/Regression/CodeGen/CBackend/2004-02-26-LinkOnceFunctions.llx diff -c /dev/null llvm/test/Regression/CodeGen/CBackend/2004-02-26-LinkOnceFunctions.llx:1.1 *** /dev/null Thu Feb 26 16:55:21 2004 --- llvm/test/Regression/CodeGen/CBackend/2004-02-26-LinkOnceFunctions.llx Thu Feb 26 16:55:11 2004 *************** *** 0 **** --- 1,8 ---- + ; RUN: llvm-as < %s | llc -march=c | grep func1 | grep WEAK + + implementation + + linkonce int %func1 () { + ret int 5 + } + From criswell at cs.uiuc.edu Thu Feb 26 17:03:01 2004 From: criswell at cs.uiuc.edu (John Criswell) Date: Thu Feb 26 17:03:01 2004 Subject: [llvm-commits] CVS: llvm/utils/llvm-native-gxx Message-ID: <200402262301.RAA05931@choi.cs.uiuc.edu> Changes in directory llvm/utils: llvm-native-gxx added (r1.1) --- Log message: C++ version of llvm-native-gcc. --- Diffs of the changes: (+249 -0) Index: llvm/utils/llvm-native-gxx diff -c /dev/null llvm/utils/llvm-native-gxx:1.1 *** /dev/null Thu Feb 26 17:01:33 2004 --- llvm/utils/llvm-native-gxx Thu Feb 26 17:01:21 2004 *************** *** 0 **** --- 1,249 ---- + #!/usr/bin/perl + # Wrapper around LLVM tools to generate a native .o from llvm-gxx using an + # LLVM back-end (CBE by default). + + # set up defaults. + $Verbose = 0; + $SaveTemps = 1; + $PreprocessOnly = 0; + $CompileDontLink = 0; + $Backend = 'cbe'; + chomp ($ProgramName = `basename $0`); + + sub boldprint { + print "[1m", @_, "[0m"; + } + + # process command-line options. + # most of these are passed on to llvm-gxx. + $GCCOptions = ""; + for ($i = 0; $i <= $#ARGV; ++$i) { + if ($ARGV[$i] =~ /-mllvm-backend=([a-z0-9]*)/) { + $Backend = $1; + if ($ProgramName =~ /llvm-native-gxx/) { + splice (@ARGV, $i, 1); + --$i; + } + } elsif ($ARGV[$i] eq "-E") { + $PreprocessOnly = 1; + } elsif ($ARGV[$i] eq "-c") { + $GCCOptions .= " " . $ARGV[$i]; + $CompileDontLink = 1; + } elsif ($ARGV[$i] eq "-v") { + $GCCOptions .= " " . $ARGV[$i]; + $Verbose = 1; + } elsif ($ARGV[$i] eq "-o") { + $OutputFile = $ARGV[$i + 1]; + } elsif ($ARGV[$i] eq "-save-temps") { + $GCCOptions .= " " . $ARGV[$i]; + $SaveTemps = 1; + } elsif ($ARGV[$i] =~ /\.bc$/) { + push (@BytecodeFiles, $ARGV[$i]); + } elsif ($ARGV[$i] =~ /^-L/) { + $GCCOptions .= " " . $ARGV[$i]; + push (@LibDirs, $ARGV[$i]); + } elsif ($ARGV[$i] =~ /^-l/) { + $GCCOptions .= " " . $ARGV[$i]; + push (@Libs, $ARGV[$i]); + } elsif ($ARGV[$i] =~ /\.(c|cpp|cc|i|ii|C)$/) { + $LastCFile = $ARGV[$i]; + } + } + + sub GetDefaultOutputFileName { + my $DefaultOutputFileBase; + + if ($ProgramName =~ /llvm-native-gxx/) { + $DefaultOutputFileBase = $LastCFile; + } elsif ($ProgramName =~ /native-build/) { + $DefaultOutputFileBase = $BytecodeFiles[0]; + } + + my $def = $DefaultOutputFileBase; + + die "Can't figure out name of output file.\n" + unless $DefaultOutputFileBase + && (($ProgramName !~ /native-build/) + || $#BytecodeFiles == 0); + + print "Warning: defaulting output file name ", + "based on '$DefaultOutputFileBase'\n" if $Verbose; + + if ($ProgramName =~ /llvm-native-gxx/) { + $def =~ s/\.(c|cpp|cc|i|ii|C)$/.o/; + } elsif ($ProgramName =~ /native-build/) { + $def =~ s/\.bc$/.$Backend/; + if ($CompileDontLink) { + $def .= ".o"; + } + } + + return $def; + } + + # run a command, optionally echoing, and quitting if it fails: + sub run { + my $command = join(" ", @_); + print "$command\n" if $Verbose; + $command =~ s/\"/\\\"/g; + system $command and die "$0: $command failed"; + } + + sub LinkBytecodeFilesIntoTemporary { + my $FinalOutputFileName = shift @_; + my @BytecodeFiles = @_; + + my $BCFiles = join (" ", @BytecodeFiles); + my $LinkedBCFile; + if ($SaveTemps) { + $LinkedBCFile = "${FinalOutputFileName}.llvm.bc"; + } else { + $LinkedBCFile = "/tmp/nativebuild-$$.llvm.bc"; + } + run "llvm-link -o $LinkedBCFile $BCFiles"; + return $LinkedBCFile; + } + + sub CompileBytecodeToNative { + my ($BCFile, $Backend, $OutputFile) = @_; + + my $GeneratedCode; + if ($Backend eq 'cbe') { + if ($SaveTemps) { + $GeneratedCode = "${OutputFile}.c"; + } else { + $GeneratedCode = "/tmp/nativebuild-$$.c"; + } + run "llc -march=c -f -o $GeneratedCode $BCFile"; + } elsif ($Backend eq 'llc') { + if ($SaveTemps) { + $GeneratedCode = "${OutputFile}.s"; + } else { + $GeneratedCode = "/tmp/nativebuild-$$.s"; + } + run "llc -f -o $GeneratedCode $BCFile"; + } + my $LibDirs = join (" ", @LibDirs); + my $Libs = join (" ", @Libs); + run "gcc $GCCOptions $GeneratedCode -o $OutputFile $LibDirs $Libs"; + run "rm $BCFile $GeneratedCode" + unless $SaveTemps; + } + + sub CompileCToNative { + my ($LLVMGCCCommand, $Backend, $OutputFile) = @_; + run $LLVMGCCCommand; + if ($PreprocessOnly) { + return; + } + my $BCFile = "${OutputFile}.llvm.bc"; + if ($CompileDontLink) { + run "mv ${OutputFile} $BCFile"; + } else { # gccld messes with the output file name + run "mv ${OutputFile}.bc $BCFile"; + } + my $GeneratedCode; + if ($Backend eq 'cbe') { + $GeneratedCode = "${OutputFile}.cbe.c"; + run "llc -march=c -f -o $GeneratedCode $BCFile"; + } elsif ($Backend eq 'llc') { + $GeneratedCode = "${OutputFile}.llc.s"; + run "llc -f -o $GeneratedCode $BCFile"; + } + my $NativeGCCOptions = ""; + if ($CompileDontLink) { + $NativeGCCOptions = "-c"; + } + run "gcc $NativeGCCOptions $GeneratedCode -o $OutputFile"; + run "rm ${OutputFile}.llvm.bc $GeneratedCode" + unless $SaveTemps; + } + + # guess the name of the output file, if -o was not specified. + $OutputFile = GetDefaultOutputFileName () unless $OutputFile; + print "Output file is $OutputFile\n" if $Verbose; + # do all the dirty work: + if ($ProgramName eq /native-build/) { + my $LinkedBCFile = LinkBytecodeFilesIntoTemporary (@BytecodeFiles); + CompileBytecodeToNative ($LinkedBCFile, $Backend, $OutputFile); + } elsif ($ProgramName =~ /llvm-native-gxx/) { + # build the llvm-gxx command line. + $LLVMGCCCommand = join (" ", ("llvm-g++", @ARGV)); + CompileCToNative ($LLVMGCCCommand, $Backend, $OutputFile); + } + + # we're done. + exit 0; + + __END__ + + =pod + + =head1 NAME + + llvm-native-gxx + + =head1 SYNOPSIS + + llvm-native-g++ [OPTIONS...] FILE + + native-build [OPTIONS...] FILE + + =head1 DESCRIPTION + + llvm-native-g++ is a wrapper around the LLVM command-line tools which generates + a native object (.o) file by compiling FILE with llvm-g++, and then running + an LLVM back-end (CBE by default) over the resulting bytecode, and then + compiling the resulting code to a native object file. + + If called as "native-build", it compiles bytecode to native code, and takes + different options. + + =head1 OPTIONS + + llvm-native-g++ takes the same options as llvm-gcc. All options + except -mllvm-backend=... are passed on to llvm-g++. + + =over 4 + + =item -mllvm-backend=BACKEND + + Use BACKEND for native code generation. + + =item -v + + Print command lines that llvm-native-g++ runs. + + =item -o FILE + + llvm-native-g++ tries to guess the name of the llvm-g++ output file by looking + for this option in the command line. If it can't find it, it finds the last C + or C++ source file named on the command line, and turns its suffix into .o. See + BUGS. + + =item -save-temps + + Save temporary files used by llvm-native-g++ (and llvm-g++, and g++). + + =back + + =head1 BUGS + + llvm-native-g++ only handles the case where llvm-g++ compiles a single + file per invocation. llvm-native-g++ has weak command-line argument + parsing and is a poor substitute for making g++/g++.c do this stuff. + + This manual page does not adequately document native-build mode. + + llvm-native-g++ is pretty gross because it represents the blind merging of two + other scripts that predated it. It could use some code clean-up. + + =head1 SEE ALSO + + g++(1) + + =head1 AUTHOR + + Brian R. Gaeke + + =cut From criswell at cs.uiuc.edu Thu Feb 26 17:04:04 2004 From: criswell at cs.uiuc.edu (John Criswell) Date: Thu Feb 26 17:04:04 2004 Subject: [llvm-commits] CVS: llvm/test/Regression/CodeGen/CBackend/2004-02-26-FPNotPrintableConstants.llx Message-ID: <200402262256.QAA02202@choi.cs.uiuc.edu> Changes in directory llvm/test/Regression/CodeGen/CBackend: 2004-02-26-FPNotPrintableConstants.llx updated: 1.1 -> 1.2 --- Log message: Fixed test case to actually check for the static declaration. Oops. --- Diffs of the changes: (+1 -2) Index: llvm/test/Regression/CodeGen/CBackend/2004-02-26-FPNotPrintableConstants.llx diff -u llvm/test/Regression/CodeGen/CBackend/2004-02-26-FPNotPrintableConstants.llx:1.1 llvm/test/Regression/CodeGen/CBackend/2004-02-26-FPNotPrintableConstants.llx:1.2 --- llvm/test/Regression/CodeGen/CBackend/2004-02-26-FPNotPrintableConstants.llx:1.1 Thu Feb 26 16:55:11 2004 +++ llvm/test/Regression/CodeGen/CBackend/2004-02-26-FPNotPrintableConstants.llx Thu Feb 26 16:56:13 2004 @@ -1,6 +1,5 @@ ; This is a non-normal FP value: it's a nan. -; RUN: llvm-as < %s | llc -march=c -; llvm-as < %s | llc -march=c | grep FPConstant | grep static +; RUN: llvm-as < %s | llc -march=c | grep FPConstant | grep static float %func () { ret float 0xFF20000000000000 From criswell at cs.uiuc.edu Thu Feb 26 17:04:43 2004 From: criswell at cs.uiuc.edu (John Criswell) Date: Thu Feb 26 17:04:43 2004 Subject: [llvm-commits] CVS: llvm/utils/check-each-file Message-ID: <200402262302.RAA05945@choi.cs.uiuc.edu> Changes in directory llvm/utils: check-each-file updated: 1.3 -> 1.4 --- Log message: Added support for C++ compilation. Made removing the object files a separate sh command so that it can easily be commented out. --- Diffs of the changes: (+3 -2) Index: llvm/utils/check-each-file diff -u llvm/utils/check-each-file:1.3 llvm/utils/check-each-file:1.4 --- llvm/utils/check-each-file:1.3 Wed Feb 11 12:52:05 2004 +++ llvm/utils/check-each-file Thu Feb 26 17:02:25 2004 @@ -10,7 +10,7 @@ linker=./link-$program echo "Building $program with llvm-native-gcc" rm -f $program - gmake -s $program CC=llvm-native-gcc + gmake -e $program CC=llvm-native-gcc CXX=llvm-native-gxx echo "Erasing $program and re-linking it" rm -f $program echo "rm -f $program" > $linker @@ -113,7 +113,8 @@ echo "Recompiling everything with llvm-native-gcc" for f in $files do - rm -f $f && gmake $f CC=llvm-native-gcc + rm -f $f + gmake $f CC=llvm-native-gcc CXX=llvm-native-gxx done rm -f $program $linker From criswell at cs.uiuc.edu Thu Feb 26 17:14:01 2004 From: criswell at cs.uiuc.edu (John Criswell) Date: Thu Feb 26 17:14:01 2004 Subject: [llvm-commits] CVS: llvm/docs/ReleaseNotes.html Message-ID: <200402262313.RAA06019@choi.cs.uiuc.edu> Changes in directory llvm/docs: ReleaseNotes.html updated: 1.136 -> 1.137 --- Log message: Added PR258 and 259. --- Diffs of the changes: (+3 -1) Index: llvm/docs/ReleaseNotes.html diff -u llvm/docs/ReleaseNotes.html:1.136 llvm/docs/ReleaseNotes.html:1.137 --- llvm/docs/ReleaseNotes.html:1.136 Thu Feb 26 02:02:57 2004 +++ llvm/docs/ReleaseNotes.html Thu Feb 26 17:13:34 2004 @@ -205,6 +205,8 @@

Tablegen aborts on errors

[inliner] Error inlining intrinsic calls into invoke instructions

Linking weak and strong global variables is dependent on link order

Variables used to define non-printable FP constants are externally visible

CBE gives linkonce functions wrong linkage semantics

@@ -609,7 +611,7 @@ src="http://www.w3.org/Icons/valid-html401" alt="Valid HTML 4.01!" /> The LLVM Compiler Infrastructure
- Last modified: $Date: 2004/02/26 08:02:57 $ + Last modified: $Date: 2004/02/26 23:13:34 $ From brukman at cs.uiuc.edu Thu Feb 26 17:21:01 2004 From: brukman at cs.uiuc.edu (Misha Brukman) Date: Thu Feb 26 17:21:01 2004 Subject: [llvm-commits] CVS: llvm/include/llvm/iTerminators.h Message-ID: <200402262320.RAA30315@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm: iTerminators.h updated: 1.39 -> 1.40 --- Log message: Doxygenify comments. --- Diffs of the changes: (+9 -10) Index: llvm/include/llvm/iTerminators.h diff -u llvm/include/llvm/iTerminators.h:1.39 llvm/include/llvm/iTerminators.h:1.40 --- llvm/include/llvm/iTerminators.h:1.39 Tue Feb 24 00:26:00 2004 +++ llvm/include/llvm/iTerminators.h Thu Feb 26 17:20:29 2004 @@ -21,9 +21,9 @@ namespace llvm { //===--------------------------------------------------------------------------- -// ReturnInst - Return a value (possibly void), from a function. Execution does -// not continue in this function any longer. -// +/// ReturnInst - Return a value (possibly void), from a function. Execution +/// does not continue in this function any longer. +/// class ReturnInst : public TerminatorInst { ReturnInst(const ReturnInst &RI) : TerminatorInst(Instruction::Ret) { if (RI.Operands.size()) { @@ -83,8 +83,8 @@ }; //===--------------------------------------------------------------------------- -// BranchInst - Conditional or Unconditional Branch instruction. -// +/// BranchInst - Conditional or Unconditional Branch instruction. +/// class BranchInst : public TerminatorInst { BranchInst(const BranchInst &BI); public: @@ -153,8 +153,8 @@ //===--------------------------------------------------------------------------- -// SwitchInst - Multiway switch -// +/// SwitchInst - Multiway switch +/// class SwitchInst : public TerminatorInst { // Operand[0] = Value to switch on // Operand[1] = Default basic block destination @@ -254,10 +254,9 @@ } }; - //===--------------------------------------------------------------------------- -// InvokeInst - Invoke instruction -// +/// InvokeInst - Invoke instruction +/// class InvokeInst : public TerminatorInst { InvokeInst(const InvokeInst &BI); public: From brukman at cs.uiuc.edu Thu Feb 26 17:21:36 2004 From: brukman at cs.uiuc.edu (Misha Brukman) Date: Thu Feb 26 17:21:36 2004 Subject: [llvm-commits] CVS: llvm/include/llvm/iPHINode.h Message-ID: <200402262320.RAA29545@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm: iPHINode.h updated: 1.15 -> 1.16 --- Log message: Doxygenify and tersify comments. --- Diffs of the changes: (+5 -2) Index: llvm/include/llvm/iPHINode.h diff -u llvm/include/llvm/iPHINode.h:1.15 llvm/include/llvm/iPHINode.h:1.16 --- llvm/include/llvm/iPHINode.h:1.15 Sun Nov 16 14:21:15 2003 +++ llvm/include/llvm/iPHINode.h Thu Feb 26 17:20:08 2004 @@ -38,11 +38,12 @@ virtual Instruction *clone() const { return new PHINode(*this); } - /// getNumIncomingValues - Return the number of incoming edges the PHI node - /// has + /// getNumIncomingValues - Return the number of incoming edges + /// unsigned getNumIncomingValues() const { return Operands.size()/2; } /// getIncomingValue - Return incoming value #x + /// Value *getIncomingValue(unsigned i) const { assert(i*2 < Operands.size() && "Invalid value number!"); return Operands[i*2]; @@ -56,6 +57,7 @@ } /// getIncomingBlock - Return incoming basic block #x + /// BasicBlock *getIncomingBlock(unsigned i) const { assert(i*2+1 < Operands.size() && "Invalid value number!"); return reinterpret_cast(Operands[i*2+1].get()); @@ -69,6 +71,7 @@ } /// addIncoming - Add an incoming value to the end of the PHI list + /// void addIncoming(Value *D, BasicBlock *BB) { assert(getType() == D->getType() && "All operands to PHI node must be the same type as the PHI node!"); From alkis at niobe.cs.uiuc.edu Thu Feb 26 17:23:02 2004 From: alkis at niobe.cs.uiuc.edu (Alkis Evlogimenos) Date: Thu Feb 26 17:23:02 2004 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/VirtRegMap.cpp Message-ID: <200402262322.i1QNMYa05694@niobe.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen: VirtRegMap.cpp updated: 1.4 -> 1.5 --- Log message: Clear maps right after basic block is processed. --- Diffs of the changes: (+4 -4) Index: llvm/lib/CodeGen/VirtRegMap.cpp diff -u llvm/lib/CodeGen/VirtRegMap.cpp:1.4 llvm/lib/CodeGen/VirtRegMap.cpp:1.5 --- llvm/lib/CodeGen/VirtRegMap.cpp:1.4 Wed Feb 25 17:21:52 2004 +++ llvm/lib/CodeGen/VirtRegMap.cpp Thu Feb 26 17:22:23 2004 @@ -89,8 +89,8 @@ tii_(tm_.getInstrInfo()), mri_(*tm_.getRegisterInfo()), vrm_(vrm), - p2vMap_(mri_.getNumRegs()), - dirty_(mri_.getNumRegs()) { + p2vMap_(mri_.getNumRegs(), 0), + dirty_(mri_.getNumRegs(), false) { DEBUG(std::cerr << "********** REWRITE MACHINE CODE **********\n"); DEBUG(std::cerr << "********** Function: " << mf_.getFunction()->getName() << '\n'); @@ -99,11 +99,11 @@ void eliminateVirtRegs() { for (MachineFunction::iterator mbbi = mf_.begin(), mbbe = mf_.end(); mbbi != mbbe; ++mbbi) { + DEBUG(std::cerr << mbbi->getBasicBlock()->getName() << ":\n"); + eliminateVirtRegsInMbb(*mbbi); // clear map and dirty flag p2vMap_.assign(p2vMap_.size(), 0); dirty_.assign(dirty_.size(), false); - DEBUG(std::cerr << mbbi->getBasicBlock()->getName() << ":\n"); - eliminateVirtRegsInMbb(*mbbi); } } From criswell at cs.uiuc.edu Thu Feb 26 17:26:01 2004 From: criswell at cs.uiuc.edu (John Criswell) Date: Thu Feb 26 17:26:01 2004 Subject: [llvm-commits] CVS: llvm/test/Programs/External/Makefile Message-ID: <200402262325.RAA06109@choi.cs.uiuc.edu> Changes in directory llvm/test/Programs/External: Makefile updated: 1.5 -> 1.6 --- Log message: Enable Povray for testing. --- Diffs of the changes: (+5 -1) Index: llvm/test/Programs/External/Makefile diff -u llvm/test/Programs/External/Makefile:1.5 llvm/test/Programs/External/Makefile:1.6 --- llvm/test/Programs/External/Makefile:1.5 Tue Feb 10 16:34:42 2004 +++ llvm/test/Programs/External/Makefile Thu Feb 26 17:25:31 2004 @@ -8,6 +8,10 @@ # # Create the list of directories to compile # -DIRS := SPEC +DIRS := Povray SPEC + +ifndef USE_POVRAY +DIRS := $(filter-out Povray/, $(DIRS)) +endif include ${LEVEL}/test/Programs/Makefile.programs From alkis at niobe.cs.uiuc.edu Thu Feb 26 19:53:01 2004 From: alkis at niobe.cs.uiuc.edu (Alkis Evlogimenos) Date: Thu Feb 26 19:53:01 2004 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/MachineInstr.cpp Message-ID: <200402270152.i1R1qjl24005@niobe.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen: MachineInstr.cpp updated: 1.93 -> 1.94 --- Log message: Fix crash caused by passing register 0 to MRegisterInfo::isPhysicalRegister(). --- Diffs of the changes: (+1 -1) Index: llvm/lib/CodeGen/MachineInstr.cpp diff -u llvm/lib/CodeGen/MachineInstr.cpp:1.93 llvm/lib/CodeGen/MachineInstr.cpp:1.94 --- llvm/lib/CodeGen/MachineInstr.cpp:1.93 Mon Feb 23 12:40:08 2004 +++ llvm/lib/CodeGen/MachineInstr.cpp Thu Feb 26 19:52:34 2004 @@ -199,7 +199,7 @@ static inline void OutputReg(std::ostream &os, unsigned RegNo, const MRegisterInfo *MRI = 0) { - if (MRegisterInfo::isPhysicalRegister(RegNo)) { + if (!RegNo || MRegisterInfo::isPhysicalRegister(RegNo)) { if (MRI) os << "%" << MRI->get(RegNo).Name; else From alkis at niobe.cs.uiuc.edu Thu Feb 26 22:52:00 2004 From: alkis at niobe.cs.uiuc.edu (Alkis Evlogimenos) Date: Thu Feb 26 22:52:00 2004 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/VirtRegMap.cpp Message-ID: <200402270451.i1R4pkp25551@niobe.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen: VirtRegMap.cpp updated: 1.5 -> 1.6 --- Log message: Make spiller push stores right after the definition of a register so that they are as far away from the loads as possible. --- Diffs of the changes: (+33 -8) Index: llvm/lib/CodeGen/VirtRegMap.cpp diff -u llvm/lib/CodeGen/VirtRegMap.cpp:1.5 llvm/lib/CodeGen/VirtRegMap.cpp:1.6 --- llvm/lib/CodeGen/VirtRegMap.cpp:1.5 Thu Feb 26 17:22:23 2004 +++ llvm/lib/CodeGen/VirtRegMap.cpp Thu Feb 26 22:51:35 2004 @@ -23,6 +23,7 @@ #include "llvm/Target/TargetInstrInfo.h" #include "Support/Statistic.h" #include "Support/Debug.h" +#include "Support/DenseMap.h" #include "Support/STLExtras.h" #include @@ -73,6 +74,7 @@ class Spiller { typedef std::vector Phys2VirtMap; typedef std::vector PhysFlag; + typedef DenseMap Virt2MI; MachineFunction& mf_; const TargetMachine& tm_; @@ -81,6 +83,7 @@ const VirtRegMap& vrm_; Phys2VirtMap p2vMap_; PhysFlag dirty_; + Virt2MI lastDef_; public: Spiller(MachineFunction& mf, const VirtRegMap& vrm) @@ -90,7 +93,8 @@ mri_(*tm_.getRegisterInfo()), vrm_(vrm), p2vMap_(mri_.getNumRegs(), 0), - dirty_(mri_.getNumRegs(), false) { + dirty_(mri_.getNumRegs(), false), + lastDef_() { DEBUG(std::cerr << "********** REWRITE MACHINE CODE **********\n"); DEBUG(std::cerr << "********** Function: " << mf_.getFunction()->getName() << '\n'); @@ -99,11 +103,13 @@ void eliminateVirtRegs() { for (MachineFunction::iterator mbbi = mf_.begin(), mbbe = mf_.end(); mbbi != mbbe; ++mbbi) { + lastDef_.grow(mf_.getSSARegMap()->getLastVirtReg()); DEBUG(std::cerr << mbbi->getBasicBlock()->getName() << ":\n"); eliminateVirtRegsInMbb(*mbbi); - // clear map and dirty flag + // clear map, dirty flag and last ref p2vMap_.assign(p2vMap_.size(), 0); dirty_.assign(dirty_.size(), false); + lastDef_.clear(); } } @@ -113,11 +119,21 @@ unsigned physReg) { unsigned virtReg = p2vMap_[physReg]; if (dirty_[physReg] && vrm_.hasStackSlot(virtReg)) { - mri_.storeRegToStackSlot(mbb, mii, physReg, + assert(lastDef_[virtReg] && "virtual register is mapped " + "to a register and but was not defined!"); + MachineBasicBlock::iterator lastDef = lastDef_[virtReg]; + MachineBasicBlock::iterator nextLastRef = next(lastDef); + mri_.storeRegToStackSlot(*lastDef->getParent(), + nextLastRef, + physReg, vrm_.getStackSlot(virtReg), mri_.getRegClass(physReg)); ++numStores; - DEBUG(std::cerr << "*\t"; prior(mii)->print(std::cerr, tm_)); + DEBUG(std::cerr << "\t\tadded: "; + prior(nextLastRef)->print(std::cerr, tm_); + std::cerr << "\t\tafter: "; + lastDef->print(std::cerr, tm_)); + lastDef_[virtReg] = 0; } p2vMap_[physReg] = 0; dirty_[physReg] = false; @@ -145,7 +161,11 @@ vrm_.getStackSlot(virtReg), mri_.getRegClass(physReg)); ++numLoads; - DEBUG(std::cerr << "*\t"; prior(mii)->print(std::cerr,tm_)); + DEBUG(std::cerr << "\t\tadded: "; + prior(mii)->print(std::cerr,tm_); + std::cerr << "\t\tbefore: "; + mii->print(std::cerr, tm_)); + lastDef_[virtReg] = mii; } } } @@ -160,6 +180,7 @@ p2vMap_[physReg] = virtReg; dirty_[physReg] = true; + lastDef_[virtReg] = mii; } void eliminateVirtRegsInMbb(MachineBasicBlock& mbb) { @@ -170,11 +191,15 @@ MachineOperand& op = mii->getOperand(i); if (op.isRegister() && op.getReg() && op.isUse() && MRegisterInfo::isVirtualRegister(op.getReg())) { - unsigned physReg = vrm_.getPhys(op.getReg()); - handleUse(mbb, mii, op.getReg(), physReg); + unsigned virtReg = op.getReg(); + unsigned physReg = vrm_.getPhys(virtReg); + handleUse(mbb, mii, virtReg, physReg); mii->SetMachineOperandReg(i, physReg); // mark as dirty if this is def&use - if (op.isDef()) dirty_[physReg] = true; + if (op.isDef()) { + dirty_[physReg] = true; + lastDef_[virtReg] = mii; + } } } From alkis at cs.uiuc.edu Thu Feb 26 23:27:01 2004 From: alkis at cs.uiuc.edu (Alkis Evlogimenos) Date: Thu Feb 26 23:27:01 2004 Subject: [llvm-commits] CVS: llvm/docs/ReleaseNotes.html Message-ID: <200402270526.XAA32740@zion.cs.uiuc.edu> Changes in directory llvm/docs: ReleaseNotes.html updated: 1.137 -> 1.138 --- Log message: Add improvements to the code generator. --- Diffs of the changes: (+11 -3) Index: llvm/docs/ReleaseNotes.html diff -u llvm/docs/ReleaseNotes.html:1.137 llvm/docs/ReleaseNotes.html:1.138 --- llvm/docs/ReleaseNotes.html:1.137 Thu Feb 26 17:13:34 2004 +++ llvm/docs/ReleaseNotes.html Thu Feb 26 23:26:23 2004 @@ -109,8 +109,16 @@ href="http://llvm.cs.uiuc.edu/PR203">RPM package generation.

The "tblgen" tool is now documented.

The LLVM code generator can now fold spill code into instructions on targets -that support it.

The LLVM code generator got a multitude of improvements: +

It can now fold spill code into instructions on targets that support it.
A generic machine code spiller/rewriter was added. It provides an API for +global register allocators to eliminate virtual registers and add the +appropriate spill code.
The represenation of machine basic blocks got cleaned up and improved to +allow easier development and more efficient implementation.

LLVM now no longer depends on the boost library.

The X86 backend now generates substantially better native code, and is faster.

The C backend has been turned moved from the "llvm-dis" tool to the "llc" @@ -611,7 +619,7 @@ src="http://www.w3.org/Icons/valid-html401" alt="Valid HTML 4.01!" /> The LLVM Compiler Infrastructure
- Last modified: $Date: 2004/02/26 23:13:34 $ + Last modified: $Date: 2004/02/27 05:26:23 $ From lattner at cs.uiuc.edu Fri Feb 27 00:00:02 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Fri Feb 27 00:00:02 2004 Subject: [llvm-commits] CVS: llvm/test/Programs/External/Makefile Message-ID: <200402270559.XAA00542@zion.cs.uiuc.edu> Changes in directory llvm/test/Programs/External: Makefile updated: 1.6 -> 1.7 --- Log message: Run povray after spec, in case it doesn't work. --- Diffs of the changes: (+1 -1) Index: llvm/test/Programs/External/Makefile diff -u llvm/test/Programs/External/Makefile:1.6 llvm/test/Programs/External/Makefile:1.7 --- llvm/test/Programs/External/Makefile:1.6 Thu Feb 26 17:25:31 2004 +++ llvm/test/Programs/External/Makefile Thu Feb 26 23:59:09 2004 @@ -8,7 +8,7 @@ # # Create the list of directories to compile # -DIRS := Povray SPEC +DIRS := SPEC Povray ifndef USE_POVRAY DIRS := $(filter-out Povray/, $(DIRS)) From alkis at niobe.cs.uiuc.edu Fri Feb 27 00:12:01 2004 From: alkis at niobe.cs.uiuc.edu (Alkis Evlogimenos) Date: Fri Feb 27 00:12:01 2004 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/VirtRegMap.h RegAllocLinearScan.cpp Message-ID: <200402270611.i1R6BQb07757@niobe.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen: VirtRegMap.h updated: 1.6 -> 1.7 RegAllocLinearScan.cpp updated: 1.66 -> 1.67 --- Log message: Rename member function to be consistent with the rest. --- Diffs of the changes: (+4 -4) Index: llvm/lib/CodeGen/VirtRegMap.h diff -u llvm/lib/CodeGen/VirtRegMap.h:1.6 llvm/lib/CodeGen/VirtRegMap.h:1.7 --- llvm/lib/CodeGen/VirtRegMap.h:1.6 Wed Feb 25 15:55:44 2004 +++ llvm/lib/CodeGen/VirtRegMap.h Fri Feb 27 00:11:15 2004 @@ -71,7 +71,7 @@ v2pMap_[virtReg] = physReg; } - void clearVirtReg(unsigned virtReg) { + void clearVirt(unsigned virtReg) { assert(MRegisterInfo::isVirtualRegister(virtReg)); assert(v2pMap_[virtReg] != NO_PHYS_REG && "attempt to clear a not assigned virtual register"); Index: llvm/lib/CodeGen/RegAllocLinearScan.cpp diff -u llvm/lib/CodeGen/RegAllocLinearScan.cpp:1.66 llvm/lib/CodeGen/RegAllocLinearScan.cpp:1.67 --- llvm/lib/CodeGen/RegAllocLinearScan.cpp:1.66 Wed Feb 25 16:01:06 2004 +++ llvm/lib/CodeGen/RegAllocLinearScan.cpp Fri Feb 27 00:11:15 2004 @@ -459,7 +459,7 @@ } else { prt_->delRegUse(vrm_->getPhys(i->reg)); - vrm_->clearVirtReg(i->reg); + vrm_->clearVirt(i->reg); if (i->spilled()) { if (!i->empty()) { IntervalPtrs::iterator it = unhandled_.begin(); @@ -479,7 +479,7 @@ if (MRegisterInfo::isPhysicalRegister(i->reg)) fixed_.push_front(i); else { - vrm_->clearVirtReg(i->reg); + vrm_->clearVirt(i->reg); if (i->spilled()) { if (!i->empty()) { IntervalPtrs::iterator it = unhandled_.begin(); @@ -497,7 +497,7 @@ if (MRegisterInfo::isPhysicalRegister(i->reg)) fixed_.push_front(i); else { - vrm_->clearVirtReg(i->reg); + vrm_->clearVirt(i->reg); unhandled_.push_front(i); } } From lattner at cs.uiuc.edu Fri Feb 27 00:28:01 2004 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Fri Feb 27 00:28:01 2004 Subject: [llvm-commits] CVS: llvm/lib/Transforms/Scalar/InstructionCombining.cpp Message-ID: <200402270627.AAA11281@zion.cs.uiuc.edu> Changes in directory llvm/lib/Transforms/Scalar: InstructionCombining.cpp updated: 1.165 -> 1.166 --- Log message: Implement test/Regression/Transforms/InstCombine/canonicalize_branch.ll This is a really minor thing, but might help out the 'switch statement induction' code in simplifycfg. --- Diffs of the changes: (+23 -1) Index: llvm/lib/Transforms/Scalar/InstructionCombining.cpp diff -u llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.165 llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.166 --- llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.165 Tue Feb 24 12:10:14 2004 +++ llvm/lib/Transforms/Scalar/InstructionCombining.cpp Fri Feb 27 00:27:46 2004 @@ -2343,7 +2343,7 @@ Instruction *InstCombiner::visitBranchInst(BranchInst &BI) { // Change br (not X), label True, label False to: br X, label False, True - if (BI.isConditional() && !isa(BI.getCondition())) + if (BI.isConditional() && !isa(BI.getCondition())) { if (Value *V = dyn_castNotVal(BI.getCondition())) { BasicBlock *TrueDest = BI.getSuccessor(0); BasicBlock *FalseDest = BI.getSuccessor(1); @@ -2352,7 +2352,29 @@ BI.setSuccessor(0, FalseDest); BI.setSuccessor(1, TrueDest); return &BI; + } else if (SetCondInst *I = dyn_cast(BI.getCondition())) { + // Cannonicalize setne -> seteq + if ((I->getOpcode() == Instruction::SetNE || + I->getOpcode() == Instruction::SetLE || + I->getOpcode() == Instruction::SetGE) && I->hasOneUse()) { + std::string Name = I->getName(); I->setName(""); + Instruction::BinaryOps NewOpcode = + SetCondInst::getInverseCondition(I->getOpcode()); + Value *NewSCC = BinaryOperator::create(NewOpcode, I->getOperand(0),