From lattner at cs.uiuc.edu  Mon Oct 24 00:03:57 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Mon, 24 Oct 2005 00:03:57 -0500
Subject: [llvm-commits] CVS: llvm/include/llvm/Support/CommandLine.h 
Message-ID: <200510240503.AAA29475@zion.cs.uiuc.edu>



Changes in directory llvm/include/llvm/Support:

CommandLine.h updated: 1.51 -> 1.52
---
Log message:

Move the END_WITH_NULL marker.  Vladimir suggests that this works better with
GCC 4.1.  I tried it with 4.0 and 3.3 and it seems fine.


---
Diffs of the changes:  (+2 -7)

 CommandLine.h |    9 ++-------
 1 files changed, 2 insertions(+), 7 deletions(-)


Index: llvm/include/llvm/Support/CommandLine.h
diff -u llvm/include/llvm/Support/CommandLine.h:1.51 llvm/include/llvm/Support/CommandLine.h:1.52
--- llvm/include/llvm/Support/CommandLine.h:1.51	Sun Oct 23 10:22:50 2005
+++ llvm/include/llvm/Support/CommandLine.h	Mon Oct 24 00:03:46 2005
@@ -334,14 +334,9 @@
   }
 };
 
-// Silly GCC doesn't allow attributes on a function definition.
 template<class DataType>
-ValuesClass<DataType> values(const char *Arg, DataType Val, const char *Desc,
-                             ...) END_WITH_NULL;
-
-template<class DataType>
-ValuesClass<DataType> values(const char *Arg, DataType Val, const char *Desc,
-                             ...) {
+ValuesClass<DataType> END_WITH_NULL values(const char *Arg, DataType Val, 
+                                           const char *Desc, ...) {
     va_list ValueArgs;
     va_start(ValueArgs, Desc);
     ValuesClass<DataType> Vals(Arg, Val, Desc, ValueArgs);





From wanderer at rsu.ru  Mon Oct 24 00:10:00 2005
From: wanderer at rsu.ru (Vladimir A. Merzliakov)
Date: Mon, 24 Oct 2005 09:10:00 +0400
Subject: [llvm-commits] CVS: llvm/include/llvm/Support/CommandLine.h 
References: <200510240503.AAA29475@zion.cs.uiuc.edu>
Message-ID: <021601c5d859$2f51dbf0$10fcd0c3@cc.rsu.ru>

> Move the END_WITH_NULL marker.  Vladimir suggests that this works better 
> with
> GCC 4.1.  I tried it with 4.0 and 3.3 and it seems fine.
Just for note: this suggested by Jeff Cohen in 
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20051017/028884.html
I only check for 4.1.0 and post patch :)

Vladimir



From lattner at cs.uiuc.edu  Mon Oct 24 01:04:09 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Mon, 24 Oct 2005 01:04:09 -0500
Subject: [llvm-commits] 
	CVS: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
Message-ID: <200510240604.BAA29720@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Transforms/Scalar:

InstructionCombining.cpp updated: 1.388 -> 1.389
---
Log message:

Pull some code out into a function, no functionality change


---
Diffs of the changes:  (+36 -25)

 InstructionCombining.cpp |   61 +++++++++++++++++++++++++++--------------------
 1 files changed, 36 insertions(+), 25 deletions(-)


Index: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
diff -u llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.388 llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.389
--- llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.388	Mon Oct 17 15:18:38 2005
+++ llvm/lib/Transforms/Scalar/InstructionCombining.cpp	Mon Oct 24 01:03:58 2005
@@ -227,6 +227,7 @@
                               bool isSub, Instruction &I);
     Instruction *InsertRangeTest(Value *V, Constant *Lo, Constant *Hi,
                                  bool Inside, Instruction &IB);
+    Instruction *PromoteCastOfAllocation(CastInst &CI, AllocationInst &AI);
   };
 
   RegisterOpt<InstCombiner> X("instcombine", "Combine redundant instructions");
@@ -3761,6 +3762,39 @@
   return CI;
 }
 
+/// PromoteCastOfAllocation - If we find a cast of an allocation instruction,
+/// try to eliminate the cast by moving the type information into the alloc.
+Instruction *InstCombiner::PromoteCastOfAllocation(CastInst &CI,
+                                                   AllocationInst &AI) {
+  const PointerType *PTy = dyn_cast<PointerType>(CI.getType());
+  if (AI.isArrayAllocation() || !PTy) return 0;
+  
+  if (!AI.hasOneUse()) return 0;
+  
+  // Get the type really allocated and the type casted to.
+  const Type *AllocElTy = AI.getAllocatedType();
+  const Type *CastElTy = PTy->getElementType();
+  if (!AllocElTy->isSized() || !CastElTy->isSized()) return 0;
+  
+  uint64_t AllocElTySize = TD->getTypeSize(AllocElTy);
+  uint64_t CastElTySize = TD->getTypeSize(CastElTy);
+  
+  // If the allocation is for an even multiple of the cast type size
+  if (CastElTySize == 0 || AllocElTySize % CastElTySize != 0)
+    return 0;
+  Value *Amt = ConstantUInt::get(Type::UIntTy,
+                                 AllocElTySize/CastElTySize);
+  std::string Name = AI.getName(); AI.setName("");
+  AllocationInst *New;
+  if (isa<MallocInst>(AI))
+    New = new MallocInst(CastElTy, Amt, Name);
+  else
+    New = new AllocaInst(CastElTy, Amt, Name);
+  InsertNewInstBefore(New, AI);
+  return ReplaceInstUsesWith(CI, New);
+}
+
+
 // CastInst simplification
 //
 Instruction *InstCombiner::visitCastInst(CastInst &CI) {
@@ -3839,30 +3873,8 @@
   // size, rewrite the allocation instruction to allocate the "right" type.
   //
   if (AllocationInst *AI = dyn_cast<AllocationInst>(Src))
-    if (AI->hasOneUse() && !AI->isArrayAllocation())
-      if (const PointerType *PTy = dyn_cast<PointerType>(CI.getType())) {
-        // Get the type really allocated and the type casted to...
-        const Type *AllocElTy = AI->getAllocatedType();
-        const Type *CastElTy = PTy->getElementType();
-        if (AllocElTy->isSized() && CastElTy->isSized()) {
-          uint64_t AllocElTySize = TD->getTypeSize(AllocElTy);
-          uint64_t CastElTySize = TD->getTypeSize(CastElTy);
-
-          // If the allocation is for an even multiple of the cast type size
-          if (CastElTySize && (AllocElTySize % CastElTySize == 0)) {
-            Value *Amt = ConstantUInt::get(Type::UIntTy,
-                                         AllocElTySize/CastElTySize);
-            std::string Name = AI->getName(); AI->setName("");
-            AllocationInst *New;
-            if (isa<MallocInst>(AI))
-              New = new MallocInst(CastElTy, Amt, Name);
-            else
-              New = new AllocaInst(CastElTy, Amt, Name);
-            InsertNewInstBefore(New, *AI);
-            return ReplaceInstUsesWith(CI, New);
-          }
-        }
-      }
+    if (Instruction *V = PromoteCastOfAllocation(CI, *AI))
+      return V;
 
   if (SelectInst *SI = dyn_cast<SelectInst>(Src))
     if (Instruction *NV = FoldOpIntoSelect(CI, SI, this))
@@ -5596,7 +5608,6 @@
   return 0;
 }
 
-
 void InstCombiner::removeFromWorkList(Instruction *I) {
   WorkList.erase(std::remove(WorkList.begin(), WorkList.end(), I),
                  WorkList.end());





From lattner at cs.uiuc.edu  Mon Oct 24 01:22:24 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Mon, 24 Oct 2005 01:22:24 -0500
Subject: [llvm-commits] 
	CVS: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
Message-ID: <200510240622.BAA29810@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Transforms/Scalar:

InstructionCombining.cpp updated: 1.389 -> 1.390
---
Log message:

Before promoting a malloc type, remove dead uses.  This makes instcombine
more effective at promoting these allocations, catching them earlier in the
compile process.


---
Diffs of the changes:  (+20 -0)

 InstructionCombining.cpp |   20 ++++++++++++++++++++
 1 files changed, 20 insertions(+)


Index: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
diff -u llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.389 llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.390
--- llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.389	Mon Oct 24 01:03:58 2005
+++ llvm/lib/Transforms/Scalar/InstructionCombining.cpp	Mon Oct 24 01:22:12 2005
@@ -3769,6 +3769,26 @@
   const PointerType *PTy = dyn_cast<PointerType>(CI.getType());
   if (AI.isArrayAllocation() || !PTy) return 0;
   
+  // Remove any uses of AI that are dead.
+  assert(!CI.use_empty() && "Dead instructions should be removed earlier!");
+  std::vector<Instruction*> DeadUsers;
+  for (Value::use_iterator UI = AI.use_begin(), E = AI.use_end(); UI != E; ) {
+    Instruction *User = cast<Instruction>(*UI++);
+    if (isInstructionTriviallyDead(User)) {
+      while (UI != E && *UI == User)
+        ++UI; // If this instruction uses AI more than once, don't break UI.
+      
+      // Add operands to the worklist.
+      AddUsesToWorkList(*User);
+      ++NumDeadInst;
+      DEBUG(std::cerr << "IC: DCE: " << *User);
+      
+      User->eraseFromParent();
+      removeFromWorkList(User);
+    }
+  }
+  
+  // Finally, if the instruction now has one use, delete it.
   if (!AI.hasOneUse()) return 0;
   
   // Get the type really allocated and the type casted to.





From lattner at cs.uiuc.edu  Mon Oct 24 01:26:29 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Mon, 24 Oct 2005 01:26:29 -0500
Subject: [llvm-commits] 
	CVS: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
Message-ID: <200510240626.BAA29878@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Transforms/Scalar:

InstructionCombining.cpp updated: 1.390 -> 1.391
---
Log message:

Fix a bug where we would 'promote' an allocation from one type to another
where the second has less alignment required.  If we had explicit alignment
support in the IR, we could handle this case, but we can't until we do.


---
Diffs of the changes:  (+6 -2)

 InstructionCombining.cpp |    8 ++++++--
 1 files changed, 6 insertions(+), 2 deletions(-)


Index: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
diff -u llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.390 llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.391
--- llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.390	Mon Oct 24 01:22:12 2005
+++ llvm/lib/Transforms/Scalar/InstructionCombining.cpp	Mon Oct 24 01:26:18 2005
@@ -3795,10 +3795,14 @@
   const Type *AllocElTy = AI.getAllocatedType();
   const Type *CastElTy = PTy->getElementType();
   if (!AllocElTy->isSized() || !CastElTy->isSized()) return 0;
-  
+
+  unsigned AllocElTyAlign = TD->getTypeSize(AllocElTy);
+  unsigned CastElTyAlign = TD->getTypeSize(CastElTy);
+  if (CastElTyAlign < AllocElTyAlign) return 0;
+
   uint64_t AllocElTySize = TD->getTypeSize(AllocElTy);
   uint64_t CastElTySize = TD->getTypeSize(CastElTy);
-  
+
   // If the allocation is for an even multiple of the cast type size
   if (CastElTySize == 0 || AllocElTySize % CastElTySize != 0)
     return 0;





From lattner at cs.uiuc.edu  Mon Oct 24 01:35:30 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Mon, 24 Oct 2005 01:35:30 -0500
Subject: [llvm-commits] 
	CVS: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
Message-ID: <200510240635.BAA29953@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Transforms/Scalar:

InstructionCombining.cpp updated: 1.391 -> 1.392
---
Log message:

Handle allocations that, even after removing dead uses, still have more than
one use (but one is a cast).  This handles the very common case of:

 X = alloc [n x byte]
 Y = cast X to somethingbetter
 seteq X, null

In order to avoid infinite looping when there are multiple casts, we only
allow this if the xform is strictly increasing the alignment of the 
allocation.



---
Diffs of the changes:  (+15 -3)

 InstructionCombining.cpp |   18 +++++++++++++++---
 1 files changed, 15 insertions(+), 3 deletions(-)


Index: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
diff -u llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.391 llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.392
--- llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.391	Mon Oct 24 01:26:18 2005
+++ llvm/lib/Transforms/Scalar/InstructionCombining.cpp	Mon Oct 24 01:35:18 2005
@@ -3788,9 +3788,6 @@
     }
   }
   
-  // Finally, if the instruction now has one use, delete it.
-  if (!AI.hasOneUse()) return 0;
-  
   // Get the type really allocated and the type casted to.
   const Type *AllocElTy = AI.getAllocatedType();
   const Type *CastElTy = PTy->getElementType();
@@ -3800,6 +3797,11 @@
   unsigned CastElTyAlign = TD->getTypeSize(CastElTy);
   if (CastElTyAlign < AllocElTyAlign) return 0;
 
+  // If the allocation has multiple uses, only promote it if we are strictly
+  // increasing the alignment of the resultant allocation.  If we keep it the
+  // same, we open the door to infinite loops of various kinds.
+  if (!AI.hasOneUse() && CastElTyAlign == AllocElTyAlign) return 0;
+
   uint64_t AllocElTySize = TD->getTypeSize(AllocElTy);
   uint64_t CastElTySize = TD->getTypeSize(CastElTy);
 
@@ -3815,6 +3817,16 @@
   else
     New = new AllocaInst(CastElTy, Amt, Name);
   InsertNewInstBefore(New, AI);
+  
+  // If the allocation has multiple uses, insert a cast and change all things
+  // that used it to use the new cast.  This will also hack on CI, but it will
+  // die soon.
+  if (!AI.hasOneUse()) {
+    AddUsesToWorkList(AI);
+    CastInst *NewCast = new CastInst(New, AI.getType(), "tmpcast");
+    InsertNewInstBefore(NewCast, AI);
+    AI.replaceAllUsesWith(NewCast);
+  }
   return ReplaceInstUsesWith(CI, New);
 }
 





From lattner at cs.uiuc.edu  Mon Oct 24 01:38:46 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Mon, 24 Oct 2005 01:38:46 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/SparcV8/SparcV8CodeEmitter.cpp 
Message-ID: <200510240638.BAA29987@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/SparcV8:

SparcV8CodeEmitter.cpp updated: 1.5 -> 1.6
---
Log message:

do not wrap this whole file in namespace llvm


---
Diffs of the changes:  (+1 -4)

 SparcV8CodeEmitter.cpp |    5 +----
 1 files changed, 1 insertion(+), 4 deletions(-)


Index: llvm/lib/Target/SparcV8/SparcV8CodeEmitter.cpp
diff -u llvm/lib/Target/SparcV8/SparcV8CodeEmitter.cpp:1.5 llvm/lib/Target/SparcV8/SparcV8CodeEmitter.cpp:1.6
--- llvm/lib/Target/SparcV8/SparcV8CodeEmitter.cpp:1.5	Sun Oct 23 23:51:35 2005
+++ llvm/lib/Target/SparcV8/SparcV8CodeEmitter.cpp	Mon Oct 24 01:38:35 2005
@@ -20,8 +20,7 @@
 #include <cstdlib>
 #include <map>
 #include <vector>
-
-namespace llvm {
+using namespace llvm;
 
 namespace {
   class SparcV8CodeEmitter : public MachineFunctionPass {
@@ -181,6 +180,4 @@
   abort();
 }
 
-} // end llvm namespace
-
 #include "SparcV8GenCodeEmitter.inc"





From criswell at cs.uiuc.edu  Mon Oct 24 09:10:49 2005
From: criswell at cs.uiuc.edu (John Criswell)
Date: Mon, 24 Oct 2005 09:10:49 -0500
Subject: [llvm-commits] [release_16] CVS: llvm-gcc/gcc/version.c 
Message-ID: <200510241410.JAA14240@choi.cs.uiuc.edu>



Changes in directory llvm-gcc/gcc:

version.c updated: 1.3 -> 1.3.10.1
---
Log message:

Changed the version and build date.


---
Diffs of the changes:  (+1 -1)

 version.c |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm-gcc/gcc/version.c
diff -u llvm-gcc/gcc/version.c:1.3 llvm-gcc/gcc/version.c:1.3.10.1
--- llvm-gcc/gcc/version.c:1.3	Thu Feb  5 10:05:45 2004
+++ llvm-gcc/gcc/version.c	Mon Oct 24 09:10:29 2005
@@ -5,7 +5,7 @@
    please modify this string to indicate that, e.g. by putting your
    organization's name in parentheses at the end of the string.  */
 
-const char version_string[] = "3.4-llvm 20030924 (experimental)";
+const char version_string[] = "3.4-llvm 20051104 (LLVM 1.6)";
 
 /* This is the location of the online document giving instructions for
    reporting bugs.  If you distribute a modified version of GCC,





From lattner at cs.uiuc.edu  Mon Oct 24 10:04:26 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Mon, 24 Oct 2005 10:04:26 -0500
Subject: [llvm-commits] CVS: llvm/utils/TableGen/CodeEmitterGen.cpp 
Message-ID: <200510241504.KAA24475@zion.cs.uiuc.edu>



Changes in directory llvm/utils/TableGen:

CodeEmitterGen.cpp updated: 1.41 -> 1.42
---
Log message:

Fix an incompatibility with GCC 4.1, thanks to Vladimir Merzliakov
for pointing this out!


---
Diffs of the changes:  (+0 -3)

 CodeEmitterGen.cpp |    3 ---
 1 files changed, 3 deletions(-)


Index: llvm/utils/TableGen/CodeEmitterGen.cpp
diff -u llvm/utils/TableGen/CodeEmitterGen.cpp:1.41 llvm/utils/TableGen/CodeEmitterGen.cpp:1.42
--- llvm/utils/TableGen/CodeEmitterGen.cpp:1.41	Thu Aug 18 20:04:33 2005
+++ llvm/utils/TableGen/CodeEmitterGen.cpp	Mon Oct 24 10:04:15 2005
@@ -76,7 +76,6 @@
   std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction");
 
   EmitSourceFileHeader("Machine Code Emitter", o);
-  o << "namespace llvm {\n\n";
   std::string Namespace = Insts[0]->getValueAsString("Namespace") + "::";
 
   // Emit function declaration
@@ -255,6 +254,4 @@
     << "  }\n"
     << "  return Value;\n"
     << "}\n\n";
-
-  o << "} // End llvm namespace \n";
 }





From lattner at cs.uiuc.edu  Mon Oct 24 10:16:34 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Mon, 24 Oct 2005 10:16:34 -0500
Subject: [llvm-commits] 
	CVS: llvm-www/pubs/2005-08-EUROPAR-PerformanceLibs.html
	2005-08-EUROPAR-PerformanceLibs.pdf index.html 
Message-ID: <200510241516.KAA24596@zion.cs.uiuc.edu>



Changes in directory llvm-www/pubs:

2005-08-EUROPAR-PerformanceLibs.html added (r1.1)
2005-08-EUROPAR-PerformanceLibs.pdf added (r1.1)
index.html updated: 1.31 -> 1.32
---
Log message:

Add another paper


---
Diffs of the changes:  (+53 -0)

 2005-08-EUROPAR-PerformanceLibs.html |   47 +++++++++++++++++++++++++++++++++++
 2005-08-EUROPAR-PerformanceLibs.pdf  |    0 
 index.html                           |    6 ++++
 3 files changed, 53 insertions(+)


Index: llvm-www/pubs/2005-08-EUROPAR-PerformanceLibs.html
diff -c /dev/null llvm-www/pubs/2005-08-EUROPAR-PerformanceLibs.html:1.1
*** /dev/null	Mon Oct 24 10:16:33 2005
--- llvm-www/pubs/2005-08-EUROPAR-PerformanceLibs.html	Mon Oct 24 10:16:23 2005
***************
*** 0 ****
--- 1,47 ----
+ <!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
+ <html>
+ <head>
+   <meta http-equiv="Content-Type" content="text/html; charset=UTF-8" />
+   <link rel="stylesheet" href="../llvm.css" type="text/css" media="screen" />
+   <title>Deciding Where to Call Performance Libraries</title>
+ </head>
+ <body>
+ 
+ <div class="pub_title">
+   Deciding Where to Call Performance Libraries
+ </div>
+ <div class="pub_author">
+   C. Alias and D. Barthou
+ </div>
+ 
+ 
+ <h2>Abstract:</h2>
+ <blockquote>
+ 
+ <p>As both programs and machines are becoming more complex, writing high
+ performance codes is an increasingly difficult task.  In order to bridge the gap
+ between the compiled-code and peak performance, resorting to domain or
+ architecture-specific libraries has become compulsory.  However, deciding when
+ and where to use a library function must be specified by the programmer.  This
+ partition between library and user code is not questioned by the compiler
+ although it has great impact on performance.  We propose in this paper a new
+ method that helps the user find in its application all code fragments that can 
+ be replaced with library calls.  The same technique can be used to change or
+ fusion multiple calls into more efficient ones.  The results of the alternative
+ detection of BLAS 1 and 2 in SPEC are presented.</p>
+ </blockquote>
+ 
+ <h2>Published:</h2>
+ <blockquote>
+   "Deciding Where to Call Performance Libraries"<br>
+   By C. Alias and D. Barthou<br>
+   <i>Proceedings of the International IEEE Euro-Par Conference</i>, August, 2005<br>
+ </blockquote>
+ 
+ <h2>Download:</h2>
+ <ul>
+   <li><a href="2005-08-EUROPAR-PerformanceLibs.pdf">Deciding Where to Call Performance Libraries</a> (PDF)</li>
+ </ul>
+ 
+ </body>
+ </html>


Index: llvm-www/pubs/2005-08-EUROPAR-PerformanceLibs.pdf


Index: llvm-www/pubs/index.html
diff -u llvm-www/pubs/index.html:1.31 llvm-www/pubs/index.html:1.32
--- llvm-www/pubs/index.html:1.31	Sun Oct 23 18:59:11 2005
+++ llvm-www/pubs/index.html	Mon Oct 24 10:16:23 2005
@@ -48,6 +48,12 @@
   Architecture, and Synthesis for Embedded Systems (CASES'05)</i>,
   San Francisco, CA, September, 2005</li>
   
+  
+<li>"<a href="2005-08-EUROPAR-PerformanceLibs.html">Deciding Where to Call
+    Performance Libraries</a>"<br>
+  By C. Alias and D. Barthou<br>
+  <i>Proc. of the International IEEE Euro-Par Conference</i>, August, 2005</li>
+  
 <li>"<a href="2005-06-17-LattnerMSThesis.html">An Implementation of Swing Modulo Scheduling with Extensions for Superblocks</a>"<br>
 Tanya M. Lattner.<br> <i>M.S. Thesis</i>, Computer Science Dept., University of Illinois at
 Urbana-Champaign, June 2005.</li>





From jeffc at jolt-lang.org  Mon Oct 24 10:22:10 2005
From: jeffc at jolt-lang.org (Jeff Cohen)
Date: Mon, 24 Oct 2005 10:22:10 -0500
Subject: [llvm-commits] CVS: llvm/win32/CodeGen/CodeGen.vcproj 
Message-ID: <200510241522.KAA24617@zion.cs.uiuc.edu>



Changes in directory llvm/win32/CodeGen:

CodeGen.vcproj updated: 1.14 -> 1.15
---
Log message:

Keep Visual Studio up to date.

---
Diffs of the changes:  (+0 -3)

 CodeGen.vcproj |    3 ---
 1 files changed, 3 deletions(-)


Index: llvm/win32/CodeGen/CodeGen.vcproj
diff -u llvm/win32/CodeGen/CodeGen.vcproj:1.14 llvm/win32/CodeGen/CodeGen.vcproj:1.15
--- llvm/win32/CodeGen/CodeGen.vcproj:1.14	Sun Sep 25 14:04:43 2005
+++ llvm/win32/CodeGen/CodeGen.vcproj	Mon Oct 24 10:21:58 2005
@@ -149,9 +149,6 @@
 				RelativePath="..\..\lib\CodeGen\PrologEpilogInserter.cpp">
 			</File>
 			<File
-				RelativePath="..\..\lib\CodeGen\RegAllocIterativeScan.cpp">
-			</File>
-			<File
 				RelativePath="..\..\lib\CodeGen\RegAllocLinearScan.cpp">
 			</File>
 			<File





From criswell at cs.uiuc.edu  Mon Oct 24 11:17:40 2005
From: criswell at cs.uiuc.edu (John Criswell)
Date: Mon, 24 Oct 2005 11:17:40 -0500
Subject: [llvm-commits] CVS: llvm/docs/LangRef.html 
Message-ID: <200510241617.LAA17367@choi.cs.uiuc.edu>



Changes in directory llvm/docs:

LangRef.html updated: 1.112 -> 1.113
---
Log message:

Grammar and punctuation fixes.


---
Diffs of the changes:  (+11 -11)

 LangRef.html |   22 +++++++++++-----------
 1 files changed, 11 insertions(+), 11 deletions(-)


Index: llvm/docs/LangRef.html
diff -u llvm/docs/LangRef.html:1.112 llvm/docs/LangRef.html:1.113
--- llvm/docs/LangRef.html:1.112	Wed Jul 20 20:29:16 2005
+++ llvm/docs/LangRef.html	Mon Oct 24 11:17:18 2005
@@ -495,11 +495,11 @@
 
 <p>Global variables define regions of memory allocated at compilation time
 instead of run-time.  Global variables may optionally be initialized.  A
-variable may be defined as a global "constant", which indicates that the
+variable may be defined as a global "constant," which indicates that the
 contents of the variable will <b>never</b> be modified (enabling better
 optimization, allowing the global data to be placed in the read-only section of
 an executable, etc).  Note that variables that need runtime initialization
-cannot be marked "constant", as there is a store to the variable.</p>
+cannot be marked "constant" as there is a store to the variable.</p>
 
 <p>
 LLVM explicitly allows <em>declarations</em> of global variables to be marked
@@ -720,8 +720,8 @@
   </tr>
 </table>
 
-<p>Note that 'variable sized arrays' can be implemented in LLVM With a zero 
-length array.  Normally accesses past the end of an array are undefined in
+<p>Note that 'variable sized arrays' can be implemented in LLVM with a zero 
+length array.  Normally, accesses past the end of an array are undefined in
 LLVM (e.g. it is illegal to access the 5th element of a 3 element array).
 As a special case, however, zero length arrays are recognized to be variable
 length.  This allows implementation of 'pascal style arrays' with the  LLVM
@@ -743,7 +743,7 @@
 </p>
 <h5>Syntax:</h5>
 <pre>  &lt;returntype&gt; (&lt;parameter list&gt;)<br></pre>
-<p>Where '<tt>&lt;parameter list&gt;</tt>' is a comma-separated list of type
+<p>...where '<tt>&lt;parameter list&gt;</tt>' is a comma-separated list of type
 specifiers.  Optionally, the parameter list may include a type <tt>...</tt>,
 which indicates that the function takes a variable number of arguments.
 Variable argument functions can access their arguments with the <a
@@ -997,7 +997,7 @@
   <dd>The string '<tt>zeroinitializer</tt>' can be used to zero initialize a
   value to zero of <em>any</em> type, including scalar and aggregate types.
   This is often used to avoid having to print large zero initializers (e.g. for
-  large arrays), and is always exactly equivalent to using explicit zero
+  large arrays) and is always exactly equivalent to using explicit zero
   initializers.
   </dd>
 </dl>
@@ -1486,7 +1486,7 @@
 <p>This returns the <i>remainder</i> of a division (where the result
 has the same sign as the divisor), not the <i>modulus</i> (where the
 result has the same sign as the dividend) of a value.  For more
-information about the difference, see: <a
+information about the difference, see <a
  href="http://mathforum.org/dr.math/problems/anne.4.28.99.html">The
 Math Forum</a>.</p>
 <h5>Example:</h5>
@@ -1863,9 +1863,9 @@
 <p>The '<tt>load</tt>' instruction is used to read from memory.</p>
 <h5>Arguments:</h5>
 <p>The argument to the '<tt>load</tt>' instruction specifies the memory
-address to load from.  The pointer must point to a <a
+address from which to load.  The pointer must point to a <a
  href="#t_firstclass">first class</a> type.  If the <tt>load</tt> is
-marked as <tt>volatile</tt> then the optimizer is not allowed to modify
+marked as <tt>volatile</tt>, then the optimizer is not allowed to modify
 the number or order of execution of this <tt>load</tt> with other
 volatile <tt>load</tt> and <tt><a href="#i_store">store</a></tt>
 instructions. </p>
@@ -1889,7 +1889,7 @@
 <p>The '<tt>store</tt>' instruction is used to write to memory.</p>
 <h5>Arguments:</h5>
 <p>There are two arguments to the '<tt>store</tt>' instruction: a value
-to store and an address to store it into.  The type of the '<tt>&lt;pointer&gt;</tt>'
+to store and an address in which to store it.  The type of the '<tt>&lt;pointer&gt;</tt>'
 operand must be a pointer to the type of the '<tt>&lt;value&gt;</tt>'
 operand. If the <tt>store</tt> is marked as <tt>volatile</tt>, then the
 optimizer is not allowed to modify the number or order of execution of
@@ -3314,7 +3314,7 @@
 
   <a href="mailto:sabre at nondot.org">Chris Lattner</a><br>
   <a href="http://llvm.cs.uiuc.edu">The LLVM Compiler Infrastructure</a><br>
-  Last modified: $Date: 2005/07/21 01:29:16 $
+  Last modified: $Date: 2005/10/24 16:17:18 $
 </address>
 </body>
 </html>





From criswell at cs.uiuc.edu  Mon Oct 24 11:20:25 2005
From: criswell at cs.uiuc.edu (John Criswell)
Date: Mon, 24 Oct 2005 11:20:25 -0500
Subject: [llvm-commits] CVS: llvm/docs/BytecodeFormat.html 
Message-ID: <200510241620.LAA17395@choi.cs.uiuc.edu>



Changes in directory llvm/docs:

BytecodeFormat.html updated: 1.41 -> 1.42
---
Log message:

Fixed a grammar issue.


---
Diffs of the changes:  (+2 -2)

 BytecodeFormat.html |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)


Index: llvm/docs/BytecodeFormat.html
diff -u llvm/docs/BytecodeFormat.html:1.41 llvm/docs/BytecodeFormat.html:1.42
--- llvm/docs/BytecodeFormat.html:1.41	Fri May 13 20:30:15 2005
+++ llvm/docs/BytecodeFormat.html	Mon Oct 24 11:20:10 2005
@@ -732,7 +732,7 @@
 </table>
 <p>
 Of particular note, the bytecode format number is simply a 28-bit
-monotonically increase integer that identifies the version of the bytecode
+monotonically increasing integer that identifies the version of the bytecode
 format (which is not directly related to the LLVM release number). The
 bytecode versions defined so far are (note that this document only
 describes the latest version, 1.3):</p>
@@ -1935,7 +1935,7 @@
 <a href="mailto:rspencer at x10sys.com">Reid Spencer</a> and <a
  href="mailto:sabre at nondot.org">Chris Lattner</a><br>
 <a href="http://llvm.cs.uiuc.edu">The LLVM Compiler Infrastructure</a><br>
-Last modified: $Date: 2005/05/14 01:30:15 $
+Last modified: $Date: 2005/10/24 16:20:10 $
 </address>
 </body>
 </html>





From lattner at cs.uiuc.edu  Mon Oct 24 11:36:48 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Mon, 24 Oct 2005 11:36:48 -0500
Subject: [llvm-commits] CVS: llvm/docs/ReleaseNotes.html 
Message-ID: <200510241636.LAA24977@zion.cs.uiuc.edu>



Changes in directory llvm/docs:

ReleaseNotes.html updated: 1.335 -> 1.336
---
Log message:

Andrew says that alpha basically works


---
Diffs of the changes:  (+2 -2)

 ReleaseNotes.html |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)


Index: llvm/docs/ReleaseNotes.html
diff -u llvm/docs/ReleaseNotes.html:1.335 llvm/docs/ReleaseNotes.html:1.336
--- llvm/docs/ReleaseNotes.html:1.335	Sun Oct 23 23:15:09 2005
+++ llvm/docs/ReleaseNotes.html	Mon Oct 24 11:36:36 2005
@@ -171,7 +171,7 @@
     releases: <tt>-cee, -pre</tt></li>
 <li>The <tt>llvm-db</tt> tool is in a very early stage of development, but can
     be used to step through programs and inspect the stack.</li>
-<li>The SparcV8, Alpha, and IA64 code generators are experimental.</li>
+<li>The SparcV8 and IA64 code generators are experimental.</li>
 </ul>
 
 </div>
@@ -586,7 +586,7 @@
   src="http://www.w3.org/Icons/valid-html401" alt="Valid HTML 4.01!" /></a>
 
   <a href="http://llvm.cs.uiuc.edu">The LLVM Compiler Infrastructure</a><br>
-  Last modified: $Date: 2005/10/24 04:15:09 $
+  Last modified: $Date: 2005/10/24 16:36:36 $
 </address>
 
 </body>





From criswell at cs.uiuc.edu  Mon Oct 24 11:37:47 2005
From: criswell at cs.uiuc.edu (John Criswell)
Date: Mon, 24 Oct 2005 11:37:47 -0500
Subject: [llvm-commits] CVS: llvm/docs/CFEBuildInstrs.html 
Message-ID: <200510241637.LAA17442@choi.cs.uiuc.edu>



Changes in directory llvm/docs:

CFEBuildInstrs.html updated: 1.53 -> 1.54
---
Log message:

Attempt to make terminology more consistent.


---
Diffs of the changes:  (+4 -3)

 CFEBuildInstrs.html |    7 ++++---
 1 files changed, 4 insertions(+), 3 deletions(-)


Index: llvm/docs/CFEBuildInstrs.html
diff -u llvm/docs/CFEBuildInstrs.html:1.53 llvm/docs/CFEBuildInstrs.html:1.54
--- llvm/docs/CFEBuildInstrs.html:1.53	Tue Sep 20 22:56:26 2005
+++ llvm/docs/CFEBuildInstrs.html	Mon Oct 24 11:37:24 2005
@@ -68,9 +68,10 @@
 and Settings" directory).  We welcome patches to fix this issue.
 </p>
 <p>It has been found that the GCC 3.3.3 compiler provided with recent Cygwin
-versions is incapable of compiling the LLVM CFE correctly. If your Cygwin
+versions is incapable of compiling the LLVM GCC front-end correctly. If your
+Cygwin
 installation includes GCC 3.3.3, we <i>strongly</i> recommend that you download
-GCC 3.4.3, build it separately, and use it for compiling LLVM CFE. This has been
+GCC 3.4.3, build it separately, and use it for compiling the LLVM GCC front-end. This has been
 shown to work correctly.</p>
 <p>Some versions of Cygwin utilize an experimental version of GNU binutils that
 will cause the GNU <tt>ld</tt> linker to fail an assertion when linking
@@ -356,7 +357,7 @@
 
   Brian Gaeke<br>
   <a href="http://llvm.cs.uiuc.edu">LLVM Compiler Infrastructure</a><br>
-  Last modified: $Date: 2005/09/21 03:56:26 $
+  Last modified: $Date: 2005/10/24 16:37:24 $
 </address>
 
 </body>





From criswell at cs.uiuc.edu  Mon Oct 24 11:43:27 2005
From: criswell at cs.uiuc.edu (John Criswell)
Date: Mon, 24 Oct 2005 11:43:27 -0500
Subject: [llvm-commits] CVS: llvm/docs/Projects.html 
Message-ID: <200510241643.LAA17484@choi.cs.uiuc.edu>



Changes in directory llvm/docs:

Projects.html updated: 1.18 -> 1.19
---
Log message:

Added a note to remove CVS directories when copying the sample project to
a new project.
Kudos to Rob for suggesting that I add this important step.


---
Diffs of the changes:  (+7 -1)

 Projects.html |    8 +++++++-
 1 files changed, 7 insertions(+), 1 deletion(-)


Index: llvm/docs/Projects.html
diff -u llvm/docs/Projects.html:1.18 llvm/docs/Projects.html:1.19
--- llvm/docs/Projects.html:1.18	Sun Feb 27 19:10:48 2005
+++ llvm/docs/Projects.html	Mon Oct 24 11:43:08 2005
@@ -87,6 +87,12 @@
 choosing.  You can place it anywhere you like.  Rename the directory to match
 the name of your project.</li>
 
+<li>
+If you downloaded LLVM using CVS, remove all the directories named CVS (and all
+the files therein) from your project's new source tree.  This will keep CVS
+from thinking that your project is inside <tt>llvm/projects/sample</tt>.
+</li>
+
 <li>Add your source code and Makefiles to your source tree.</li>
 
 <li>If you want your project to be configured with the <tt>configure</tt> script
@@ -447,7 +453,7 @@
   <a href="mailto:criswell at uiuc.edu">John Criswell</a><br>
   <a href="http://llvm.cs.uiuc.edu">The LLVM Compiler Infrastructure</a>
   <br>
-  Last modified: $Date: 2005/02/28 01:10:48 $
+  Last modified: $Date: 2005/10/24 16:43:08 $
 </address>
 
 </body>





From criswell at cs.uiuc.edu  Mon Oct 24 11:47:55 2005
From: criswell at cs.uiuc.edu (John Criswell)
Date: Mon, 24 Oct 2005 11:47:55 -0500
Subject: [llvm-commits] CVS: llvm/docs/MakefileGuide.html 
Message-ID: <200510241647.LAA17508@choi.cs.uiuc.edu>



Changes in directory llvm/docs:

MakefileGuide.html updated: 1.25 -> 1.26
---
Log message:

Fixed spelling.


---
Diffs of the changes:  (+2 -2)

 MakefileGuide.html |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)


Index: llvm/docs/MakefileGuide.html
diff -u llvm/docs/MakefileGuide.html:1.25 llvm/docs/MakefileGuide.html:1.26
--- llvm/docs/MakefileGuide.html:1.25	Tue May 10 17:06:14 2005
+++ llvm/docs/MakefileGuide.html	Mon Oct 24 11:47:40 2005
@@ -552,7 +552,7 @@
 <div class="doc_text">
   <p>This utility target, only available when <tt>$(PROJ_OBJ_ROOT)</tt> is not 
   the same as <tt>$(PROJ_SRC_ROOT)</tt>, will completely clean the
-  <tt>$(PROJ_OBJ_ROOT)</tt> directoy by removing its content entirely and 
+  <tt>$(PROJ_OBJ_ROOT)</tt> directory by removing its content entirely and 
   reconfiguring the directory. This returns the <tt>$(PROJ_OBJ_ROOT)</tt> 
   directory to a completely fresh state. All content in the directory except 
   configured files and top-level makefiles will be lost.</p>
@@ -999,7 +999,7 @@
 
   <a href="mailto:rspencer at x10sys.com">Reid Spencer</a><br>
   <a href="http://llvm.cs.uiuc.edu">The LLVM Compiler Infrastructure</a><br>
-  Last modified: $Date: 2005/05/10 22:06:14 $
+  Last modified: $Date: 2005/10/24 16:47:40 $
 </address>
 
 </body>





From jeffc at jolt-lang.org  Mon Oct 24 11:55:07 2005
From: jeffc at jolt-lang.org (Jeff Cohen)
Date: Mon, 24 Oct 2005 11:55:07 -0500
Subject: [llvm-commits] CVS: llvm/docs/CodeGenerator.html
	TableGenFundamentals.html 
Message-ID: <200510241655.LAA25254@zion.cs.uiuc.edu>



Changes in directory llvm/docs:

CodeGenerator.html updated: 1.27 -> 1.28
TableGenFundamentals.html updated: 1.13 -> 1.14
---
Log message:

Fix spelling of 'separate'.

---
Diffs of the changes:  (+5 -5)

 CodeGenerator.html        |    4 ++--
 TableGenFundamentals.html |    6 +++---
 2 files changed, 5 insertions(+), 5 deletions(-)


Index: llvm/docs/CodeGenerator.html
diff -u llvm/docs/CodeGenerator.html:1.27 llvm/docs/CodeGenerator.html:1.28
--- llvm/docs/CodeGenerator.html:1.27	Mon Oct 17 10:19:24 2005
+++ llvm/docs/CodeGenerator.html	Mon Oct 24 11:54:55 2005
@@ -1117,7 +1117,7 @@
 Selection DAG is destroyed.
 </p>
 
-<p>Note that this phase is logically seperate from the instruction selection
+<p>Note that this phase is logically separate from the instruction selection
 phase, but is tied to it closely in the code because it operates on
 SelectionDAGs.</p>
 
@@ -1297,7 +1297,7 @@
 
   <a href="mailto:sabre at nondot.org">Chris Lattner</a><br>
   <a href="http://llvm.cs.uiuc.edu">The LLVM Compiler Infrastructure</a><br>
-  Last modified: $Date: 2005/10/17 15:19:24 $
+  Last modified: $Date: 2005/10/24 16:54:55 $
 </address>
 
 </body>


Index: llvm/docs/TableGenFundamentals.html
diff -u llvm/docs/TableGenFundamentals.html:1.13 llvm/docs/TableGenFundamentals.html:1.14
--- llvm/docs/TableGenFundamentals.html:1.13	Thu Sep  8 13:47:21 2005
+++ llvm/docs/TableGenFundamentals.html	Mon Oct 24 11:54:55 2005
@@ -337,7 +337,7 @@
 information that TableGen collects.  Records are defined with a <tt>def</tt> or
 <tt>class</tt> keyword, the record name, and an optional list of "<a
 href="#templateargs">template arguments</a>".  If the record has superclasses,
-they are specified as a comma seperated list that starts with a colon character
+they are specified as a comma separated list that starts with a colon character
 (":").  If <a href="#valuedef">value definitions</a> or <a href="#recordlet">let
 expressions</a> are needed for the class, they are enclosed in curly braces
 ("{}"); otherwise, the record ends with a semicolon.  Here is a simple TableGen
@@ -517,7 +517,7 @@
 File-scope let expressions are really just another way that TableGen allows the
 end-user to factor out commonality from the records.</p>
 
-<p>File-scope "let" expressions take a comma-seperated list of bindings to
+<p>File-scope "let" expressions take a comma-separated list of bindings to
 apply, and one of more records to bind the values in.  Here are some
 examples:</p>
 
@@ -560,7 +560,7 @@
 
   <a href="mailto:sabre at nondot.org">Chris Lattner</a><br>
   <a href="http://llvm.cs.uiuc.edu">LLVM Compiler Infrastructure</a><br>
-  Last modified: $Date: 2005/09/08 18:47:21 $
+  Last modified: $Date: 2005/10/24 16:54:55 $
 </address>
 
 </body>





From criswell at cs.uiuc.edu  Mon Oct 24 12:11:16 2005
From: criswell at cs.uiuc.edu (John Criswell)
Date: Mon, 24 Oct 2005 12:11:16 -0500
Subject: [llvm-commits] CVS: llvm/docs/BytecodeFormat.html 
Message-ID: <200510241711.MAA17594@choi.cs.uiuc.edu>



Changes in directory llvm/docs:

BytecodeFormat.html updated: 1.42 -> 1.43
---
Log message:

Updated bytecode version numbers.


---
Diffs of the changes:  (+4 -2)

 BytecodeFormat.html |    6 ++++--
 1 files changed, 4 insertions(+), 2 deletions(-)


Index: llvm/docs/BytecodeFormat.html
diff -u llvm/docs/BytecodeFormat.html:1.42 llvm/docs/BytecodeFormat.html:1.43
--- llvm/docs/BytecodeFormat.html:1.42	Mon Oct 24 11:20:10 2005
+++ llvm/docs/BytecodeFormat.html	Mon Oct 24 12:10:57 2005
@@ -740,7 +740,9 @@
   <li>#0: LLVM 1.0 &amp; 1.1</li>
   <li>#1: LLVM 1.2</li>
   <li>#2: LLVM 1.2.5 (not released)</li>
-  <li>#3: LLVM 1.3<br>
+  <li>#3: LLVM 1.3</li>
+  <li>#4: LLVM 1.3.x (not released)</li>
+  <li>#5: LLVM 1.4, 1.5, 1.6</li>
   </li>
 </ul>
 <p>Note that we plan to eventually expand the target description
@@ -1935,7 +1937,7 @@
 <a href="mailto:rspencer at x10sys.com">Reid Spencer</a> and <a
  href="mailto:sabre at nondot.org">Chris Lattner</a><br>
 <a href="http://llvm.cs.uiuc.edu">The LLVM Compiler Infrastructure</a><br>
-Last modified: $Date: 2005/10/24 16:20:10 $
+Last modified: $Date: 2005/10/24 17:10:57 $
 </address>
 </body>
 </html>





From jlaskey at apple.com  Mon Oct 24 20:03:48 2005
From: jlaskey at apple.com (Jim Laskey)
Date: Mon, 24 Oct 2005 20:03:48 -0500
Subject: [llvm-commits] CVS: llvm-www/developers.cgi developers.txt 
Message-ID: <200510250103.UAA27806@zion.cs.uiuc.edu>



Changes in directory llvm-www:

developers.cgi added (r1.1)
developers.txt added (r1.1)
---
Log message:

First attempt to automate the developers page.



---
Diffs of the changes:  (+194 -0)

 developers.cgi |  177 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 developers.txt |   17 +++++
 2 files changed, 194 insertions(+)


Index: llvm-www/developers.cgi
diff -c /dev/null llvm-www/developers.cgi:1.1
*** /dev/null	Mon Oct 24 20:03:46 2005
--- llvm-www/developers.cgi	Mon Oct 24 20:03:36 2005
***************
*** 0 ****
--- 1,177 ----
+ #!/usr/bin/perl -w
+ 
+ 
+ my $Folder = "/Volumes/Big2/llvm/llvm-www/";
+ 
+ #
+ # CopyInclude - Copy the contents of an include file to page.
+ #
+ sub CopyInclude {
+   (my $file_name) = @_;
+ 
+   if (open(INCLUDE, "<".$file_name)) {
+     while ($include = <INCLUDE>) {
+       print $include;
+     }
+     close INCLUDE;
+   } else {
+     print "Could not open file '$file_name' for reading!\n";
+     exit;
+   }
+ }
+ 
+ #
+ # Prolog - Issue all text prior to table.
+ #
+ sub Prolog {
+   # Issue the include prolog
+   CopyInclude($Folder."header.incl");
+   
+   # Issue the table prolog
+   print <<EOD
+ <div class="www_sectiontitle">Meet The LLVM Developers</div>
+ 
+ <p>The developers of LLVM have a variety of backgrounds and interests. This page
+ provides links to each developer's home page (or LLVM page if they have one).
+ If you'd like to get a link added to this page, email or contact us!</p>
+ 
+ <center>
+ <table cellpadding=2 cellspacing=3 border=0>
+   <tr align=center>
+     <td><b>Name</b></td>
+     <td><b>Picture</b></td>
+     <td rowspan=9>&nbsp;</td>
+     <td><b>Name</b></td>
+     <td><b>Picture</b></td>
+   </tr>
+ EOD
+ ;
+ }
+ 
+ #
+ # Epilog - Issue all text after table.
+ #
+ sub Epilog {
+   # Issue the table epilog
+   print <<EOD
+ </table>
+ </center>
+ EOD
+ ;
+ 
+   # Issue the include epilog
+   CopyInclude($Folder."footer.incl");
+ }
+ 
+ # Start the html page
+ print "Content-type: text/html\n\n";
+ 
+ # Issue the page prolog
+ Prolog;
+ 
+ # Open the developer data file
+ if (!open(DEVELOPERS, "<".$Folder."developers.txt")) {
+    print "Could not open file 'developers.txt' for reading!\n";
+    exit;
+ }
+ 
+ # Iterate though all developer data
+ my %Developers = ();
+ my @Fullnames = ();
+ my %Person = ();
+ 
+ while (my $Line = <DEVELOPERS>) {
+   # Clean up line
+   chomp $Line;
+   # Skip blank lines
+   next if $Line =~ /^\s*$/;
+   
+   # Split out firstname surname and parameters
+   if ($Line =~ /\s*(\w+)\s+(\w+)\s+(.*)$/) {
+     my ($Name, $Surname,$Rest) = ($1, $2, $3);
+     # Create sorting name
+     my $Fullname = $Name.", ".$Surname;
+     # Construct developer record
+     my %Developer = ( name => $Name, surname => $Surname );
+     # Break down parameters
+     my @Params = split(/\s+/, $Rest);
+     
+     # For each parameter
+     for my $Param (@Params) {
+       # Break out key and value
+       if ($Param =~ /^\s*(\w+)\s*=\s*(\S*)\s*/) {
+         my ($Key, $Value) = ($1, $2);
+         # Add parameter to developer record
+         $Developer{$Key} = $Value;
+       } else {
+         # Error
+         print "Unrecognized developer parameter: $Param\n";
+         exit;
+       }
+     }
+     
+     # Add developer to database
+     $Developers{$Fullname} = {%Developer};
+     # Add sort name to sort array
+     push @Fullnames, $Fullname;
+   } else {
+     # Error
+     print "Unrecognized developer record\n";
+     print $Line."\n";
+     exit;
+   }
+ }
+ 
+ # Close the developer data file
+ close DEVELOPERS;
+ 
+ # Sort names
+ @Fullnames = sort @Fullnames;
+ 
+ # Track column
+ my $Column = 0;
+ 
+ # For each developer in sorted order
+ for my $Fullname (@Fullnames) {
+   # Extract fields
+   my $Name = $Developers{$Fullname}{name};
+   my $Surname = $Developers{$Fullname}{surname};
+   my $HRef = $Developers{$Fullname}{href};
+   my $Image = $Developers{$Fullname}{img};
+   my $Width = $Developers{$Fullname}{width};
+   my $Height = $Developers{$Fullname}{height};
+   my $Alt = $Developers{$Fullname}{alt};
+   
+   print "  <tr align=center>\n" if $Column == 0;
+   print "    <td>\n";
+   print "      <a href=\"$HRef\">\n" if (defined $HRef);
+   print "         $Name $Surname\n";
+   print "      </a>\n" if (defined $HRef);
+   print "    </td>\n";
+   
+   print "    <td>\n";
+   print "      <a href=\"$HRef\">\n" if (defined $HRef);
+   print "        <img src=\"img/$Image\"";
+                       print " width=\"$Width\"" if defined $Width;
+                       print " height=\"$Height\"" if defined $Height;
+                       print " alt=\"$Alt\"" if defined $Alt;
+                       print " title=\"$Alt\"" if defined $Alt;
+                       print ">\n";
+   print "      </a>\n" if (defined $HRef);
+   print "    </td>\n";
+   
+   print "  </tr>\n" if $Column == 1;
+   $Column = $Column ^ 1;
+ }
+ 
+ # Clean up if odd number of developers
+ if ($Column == 1) {
+   print "    <td>\n";
+   print "    </td>\n";
+   print "  </tr>\n";
+ }
+ 
+ # Issue the table epilog
+ Epilog;
+ 
+ exit;


Index: llvm-www/developers.txt
diff -c /dev/null llvm-www/developers.txt:1.1
*** /dev/null	Mon Oct 24 20:03:48 2005
--- llvm-www/developers.txt	Mon Oct 24 20:03:36 2005
***************
*** 0 ****
--- 1,17 ----
+ Vikram	Adve	href=http://www-sal.cs.uiuc.edu/~vadve/	img=PhotoVikram.jpg	width=120	height=120	alt=vadve
+ Henrik	Bach	href=mailto:henrik_bach_llvm at hotmail.com	img=PhotoHenrik.jpg	width=172	height=219	alt=Henrik
+ Nate	Begeman	href=http://sampo.lasthome.net/	img=PhotoNate.jpg	width=160	height=130	alt=Sampo
+ Rob	Bocchino	img=PhotoRob.jpg	width=140	height=187	alt=Rob
+ Misha	Brukman	href=http://misha.brukman.net/code/llvm/	img=PhotoMisha.png	width=175	height=198	alt=Misha
+ Jeff	Cohen	href=http://jolt-lang.org/	img=PhotoJeffCohen.jpg	width=165	height=134	alt=jeffc
+ John	Criswell	href=http://www.bigw.org/~jcriswel/	img=PhotoJohn.gif	width=76	height=76	alt=Dogbert
+ Alkis	Evlogimenos	href=http://alkis.evlogimenos.com	img=PhotoAlkis.jpg	width=200	height=170	alt=alkis
+ Brian	Gaeke	href=http://netfiles.uiuc.edu/gaeke/www/	img=PhotoBrian.png	width=155	height=163	alt=brg
+ Brad	Jones	href=http://www.nondot.org/~kungfoomaster/	img=PhotoBrad.jpg	width=200	height=171	alt=KungFooMaster
+ Jim	Laskey	href=mailto:jlaskey at apple.com	img=PhotoJim.jpg	width=128	height=128	alt=Wickund
+ Chris	Lattner	href=http://nondot.org/sabre/LLVMNotes/	img=PhotoChris.jpg	width=150	height=152	alt=Sabre
+ Tanya	Lattner	href=http://nondot.org/tonic/	img=PhotoTanya.jpg	width=200	height=217	alt=tonic
+ Andrew	Lenharth	href=http://www.lenharth.org/~andrewl/	img=PhotoAndrew.jpg	width=140	height=177	alt=Andrew
+ Duraid	Madina	href=http://kinoko.c.u-tokyo.ac.jp/~duraid/llvm.html	img=PhotoDuraid.jpg	width=138	height=195	alt=camel_
+ Reid	Spencer	href=http://illuvium.net/rspencer/	img=PhotoReid.jpg	width=145	height=172	alt=Reid
+ Bill	Wendling	href=http://www.isanbard.org/~wendling/	img=PhotoBill.jpg	width=173	height=240	alt=Bill





From jlaskey at apple.com  Mon Oct 24 20:05:35 2005
From: jlaskey at apple.com (Jim Laskey)
Date: Mon, 24 Oct 2005 20:05:35 -0500
Subject: [llvm-commits] CVS: llvm-www/developers.cgi 
Message-ID: <200510250105.UAA27837@zion.cs.uiuc.edu>



Changes in directory llvm-www:

developers.cgi updated: 1.1 -> 1.2
---
Log message:

Oops.


---
Diffs of the changes:  (+3 -5)

 developers.cgi |    8 +++-----
 1 files changed, 3 insertions(+), 5 deletions(-)


Index: llvm-www/developers.cgi
diff -u llvm-www/developers.cgi:1.1 llvm-www/developers.cgi:1.2
--- llvm-www/developers.cgi:1.1	Mon Oct 24 20:03:36 2005
+++ llvm-www/developers.cgi	Mon Oct 24 20:05:24 2005
@@ -1,8 +1,6 @@
 #!/usr/bin/perl -w
 
 
-my $Folder = "/Volumes/Big2/llvm/llvm-www/";
-
 #
 # CopyInclude - Copy the contents of an include file to page.
 #
@@ -25,7 +23,7 @@
 #
 sub Prolog {
   # Issue the include prolog
-  CopyInclude($Folder."header.incl");
+  CopyInclude("header.incl");
   
   # Issue the table prolog
   print <<EOD
@@ -60,7 +58,7 @@
 ;
 
   # Issue the include epilog
-  CopyInclude($Folder."footer.incl");
+  CopyInclude("footer.incl");
 }
 
 # Start the html page
@@ -70,7 +68,7 @@
 Prolog;
 
 # Open the developer data file
-if (!open(DEVELOPERS, "<".$Folder."developers.txt")) {
+if (!open(DEVELOPERS, "<"."developers.txt")) {
    print "Could not open file 'developers.txt' for reading!\n";
    exit;
 }





From jlaskey at apple.com  Mon Oct 24 20:11:46 2005
From: jlaskey at apple.com (Jim Laskey)
Date: Mon, 24 Oct 2005 20:11:46 -0500
Subject: [llvm-commits] CVS: llvm-www/developers.cgi 
Message-ID: <200510250111.UAA27868@zion.cs.uiuc.edu>



Changes in directory llvm-www:

developers.cgi updated: 1.2 -> 1.3
---
Log message:

Third and final attempt.


---
Diffs of the changes:  (+1 -1)

 developers.cgi |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm-www/developers.cgi
diff -u llvm-www/developers.cgi:1.2 llvm-www/developers.cgi:1.3
--- llvm-www/developers.cgi:1.2	Mon Oct 24 20:05:24 2005
+++ llvm-www/developers.cgi	Mon Oct 24 20:11:35 2005
@@ -88,7 +88,7 @@
   if ($Line =~ /\s*(\w+)\s+(\w+)\s+(.*)$/) {
     my ($Name, $Surname,$Rest) = ($1, $2, $3);
     # Create sorting name
-    my $Fullname = $Name.", ".$Surname;
+    my $Fullname = $Surname.", ".$Name;
     # Construct developer record
     my %Developer = ( name => $Name, surname => $Surname );
     # Break down parameters





From jlaskey at apple.com  Mon Oct 24 20:17:25 2005
From: jlaskey at apple.com (Jim Laskey)
Date: Mon, 24 Oct 2005 20:17:25 -0500
Subject: [llvm-commits] CVS: llvm-www/header.incl 
Message-ID: <200510250117.UAA27900@zion.cs.uiuc.edu>



Changes in directory llvm-www:

header.incl updated: 1.42 -> 1.43
---
Log message:

Going live with automated people.


---
Diffs of the changes:  (+1 -1)

 header.incl |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm-www/header.incl
diff -u llvm-www/header.incl:1.42 llvm-www/header.incl:1.43
--- llvm-www/header.incl:1.42	Sat Jul 16 00:43:39 2005
+++ llvm-www/header.incl	Mon Oct 24 20:17:14 2005
@@ -28,7 +28,7 @@
 <a href="/pubs/">Publications</a><br>
 <a href="/ProjectsWithLLVM/">LLVM&nbsp;Projects</a><br>
 <a href="/OpenProjects.html">Open&nbsp;Projects</a><br>
-<a href="/Developers.html">LLVM&nbsp;People</a><br>
+<a href="/developers.cgi">LLVM&nbsp;People</a><br>
 <a href="/bugs/">Bug&nbsp;Database</a><br>
 </div>
 





From llvm at cs.uiuc.edu  Mon Oct 24 20:20:07 2005
From: llvm at cs.uiuc.edu (LLVM)
Date: Mon, 24 Oct 2005 20:20:07 -0500
Subject: [llvm-commits] CVS: llvm-www/Developers.html 
Message-ID: <200510250120.UAA27993@zion.cs.uiuc.edu>



Changes in directory llvm-www:

Developers.html (r1.31) removed
---
Log message:

Obsolete.


---
Diffs of the changes:  (+0 -0)

 0 files changed





From alkis at cs.uiuc.edu  Tue Oct 25 06:18:17 2005
From: alkis at cs.uiuc.edu (Alkis Evlogimenos)
Date: Tue, 25 Oct 2005 06:18:17 -0500
Subject: [llvm-commits] CVS: llvm/lib/Transforms/IPO/GlobalOpt.cpp 
Message-ID: <200510251118.GAA22160@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Transforms/IPO:

GlobalOpt.cpp updated: 1.58 -> 1.59
---
Log message:

Stop using deprecated types

---
Diffs of the changes:  (+2 -1)

 GlobalOpt.cpp |    3 ++-
 1 files changed, 2 insertions(+), 1 deletion(-)


Index: llvm/lib/Transforms/IPO/GlobalOpt.cpp
diff -u llvm/lib/Transforms/IPO/GlobalOpt.cpp:1.58 llvm/lib/Transforms/IPO/GlobalOpt.cpp:1.59
--- llvm/lib/Transforms/IPO/GlobalOpt.cpp:1.58	Tue Sep 27 17:28:11 2005
+++ llvm/lib/Transforms/IPO/GlobalOpt.cpp	Tue Oct 25 06:18:06 2005
@@ -1113,7 +1113,8 @@
 /// FindGlobalCtors - Find the llvm.globalctors list, verifying that all
 /// initializers have an init priority of 65535.
 GlobalVariable *GlobalOpt::FindGlobalCtors(Module &M) {
-  for (Module::giterator I = M.global_begin(), E = M.global_end(); I != E; ++I)
+  for (Module::global_iterator I = M.global_begin(), E = M.global_end();
+       I != E; ++I)
     if (I->getName() == "llvm.global_ctors") {
       // Found it, verify it's an array of { int, void()* }.
       const ArrayType *ATy =dyn_cast<ArrayType>(I->getType()->getElementType());





From jlaskey at apple.com  Tue Oct 25 10:15:41 2005
From: jlaskey at apple.com (Jim Laskey)
Date: Tue, 25 Oct 2005 10:15:41 -0500
Subject: [llvm-commits] CVS: llvm/include/llvm/Target/SubtargetFeature.h 
Message-ID: <200510251515.KAA23072@zion.cs.uiuc.edu>



Changes in directory llvm/include/llvm/Target:

SubtargetFeature.h updated: 1.4 -> 1.5
---
Log message:

Preparation of supporting scheduling info.  Need to find info based on selected
CPU.



---
Diffs of the changes:  (+27 -9)

 SubtargetFeature.h |   36 +++++++++++++++++++++++++++---------
 1 files changed, 27 insertions(+), 9 deletions(-)


Index: llvm/include/llvm/Target/SubtargetFeature.h
diff -u llvm/include/llvm/Target/SubtargetFeature.h:1.4 llvm/include/llvm/Target/SubtargetFeature.h:1.5
--- llvm/include/llvm/Target/SubtargetFeature.h:1.4	Sun Oct 23 00:25:19 2005
+++ llvm/include/llvm/Target/SubtargetFeature.h	Tue Oct 25 10:15:28 2005
@@ -43,6 +43,21 @@
   
 //===----------------------------------------------------------------------===//
 ///
+/// SubtargetInfoKV - Used to provide key value pairs for CPU and arbitrary
+/// pointers.
+//
+struct SubtargetInfoKV {
+  const char *Key;                      // K-V key string
+  void *Value;                          // K-V pointer value
+  
+  // Compare routine for std binary search
+  bool operator<(const std::string &S) const {
+    return strcmp(Key, S.c_str()) < 0;
+  }
+};
+  
+//===----------------------------------------------------------------------===//
+///
 /// SubtargetFeatures - Manages the enabling and disabling of subtarget 
 /// specific features.  Features are encoded as a string of the form
 ///   "cpu,+attr1,+attr2,-attr3,...,+attrN"
@@ -63,20 +78,23 @@
   std::string getString() const;
   void setString(const std::string &Initial);
 
-  /// Setting CPU string.  Replaces previous setting.  Setting to "" clears CPU.
-  ///
+  /// Set the CPU string.  Replaces previous setting.  Setting to "" clears CPU.
   void setCPU(const std::string &String);
   
+  /// Setting CPU string only if no string is set.
+  void setCPUIfNone(const std::string &String);
+  
   /// Adding Features.
   void AddFeature(const std::string &String, bool IsEnabled = true);
            
-  /// Parse feature string for quick usage.
-  static uint32_t Parse(const std::string &String,
-                        const std::string &DefaultCPU,
-                        const SubtargetFeatureKV *CPUTable,
-                        size_t CPUTableSize,
-                        const SubtargetFeatureKV *FeatureTable,
-                        size_t FeatureTableSize);
+  /// Get feature bits.
+  uint32_t getBits(const SubtargetFeatureKV *CPUTable,
+                         size_t CPUTableSize,
+                   const SubtargetFeatureKV *FeatureTable,
+                         size_t FeatureTableSize);
+                         
+  /// Get info pointer
+  void *getInfo(const SubtargetInfoKV *Table, size_t TableSize);
   
   /// Print feature string.
   void print(std::ostream &OS) const;





From jlaskey at apple.com  Tue Oct 25 10:15:41 2005
From: jlaskey at apple.com (Jim Laskey)
Date: Tue, 25 Oct 2005 10:15:41 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaSubtarget.cpp 
Message-ID: <200510251515.KAA23064@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/Alpha:

AlphaSubtarget.cpp updated: 1.5 -> 1.6
---
Log message:

Preparation of supporting scheduling info.  Need to find info based on selected
CPU.



---
Diffs of the changes:  (+4 -4)

 AlphaSubtarget.cpp |    8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)


Index: llvm/lib/Target/Alpha/AlphaSubtarget.cpp
diff -u llvm/lib/Target/Alpha/AlphaSubtarget.cpp:1.5 llvm/lib/Target/Alpha/AlphaSubtarget.cpp:1.6
--- llvm/lib/Target/Alpha/AlphaSubtarget.cpp:1.5	Sun Oct 23 17:33:22 2005
+++ llvm/lib/Target/Alpha/AlphaSubtarget.cpp	Tue Oct 25 10:15:28 2005
@@ -19,10 +19,10 @@
 AlphaSubtarget::AlphaSubtarget(const Module &M, const std::string &FS)
   : HasF2I(false), HasCT(false) {
   std::string CPU = "generic";
-  uint32_t Bits =
-    SubtargetFeatures::Parse(FS, CPU,
-                             SubTypeKV, SubTypeKVSize,
-                             FeatureKV, FeatureKVSize);
+  SubtargetFeatures Features(FS);
+  Features.setCPUIfNone(CPU);
+  uint32_t Bits =Features.getBits(SubTypeKV, SubTypeKVSize,
+                                  FeatureKV, FeatureKVSize);
   HasF2I = (Bits & FeatureFIX) != 0;
   HasCT  = (Bits & FeatureCIX) != 0;
 }





From jlaskey at apple.com  Tue Oct 25 10:15:41 2005
From: jlaskey at apple.com (Jim Laskey)
Date: Tue, 25 Oct 2005 10:15:41 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCSubtarget.cpp 
Message-ID: <200510251515.KAA23066@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/PowerPC:

PPCSubtarget.cpp updated: 1.12 -> 1.13
---
Log message:

Preparation of supporting scheduling info.  Need to find info based on selected
CPU.



---
Diffs of the changes:  (+4 -3)

 PPCSubtarget.cpp |    7 ++++---
 1 files changed, 4 insertions(+), 3 deletions(-)


Index: llvm/lib/Target/PowerPC/PPCSubtarget.cpp
diff -u llvm/lib/Target/PowerPC/PPCSubtarget.cpp:1.12 llvm/lib/Target/PowerPC/PPCSubtarget.cpp:1.13
--- llvm/lib/Target/PowerPC/PPCSubtarget.cpp:1.12	Sun Oct 23 17:34:25 2005
+++ llvm/lib/Target/PowerPC/PPCSubtarget.cpp	Tue Oct 25 10:15:28 2005
@@ -76,9 +76,10 @@
 #if defined(__APPLE__)
   CPU = GetCurrentPowerPCCPU();
 #endif
-  uint32_t Bits =
-  SubtargetFeatures::Parse(FS, CPU,
-                           SubTypeKV, SubTypeKVSize, FeatureKV, FeatureKVSize);
+  SubtargetFeatures Features(FS);
+  Features.setCPUIfNone(CPU);
+  uint32_t Bits =  Features.getBits(SubTypeKV, SubTypeKVSize,
+                                    FeatureKV, FeatureKVSize);
   IsGigaProcessor = (Bits & FeatureGPUL ) != 0;
   Is64Bit         = (Bits & Feature64Bit) != 0;
   HasFSQRT        = (Bits & FeatureFSqrt) != 0;





From jlaskey at apple.com  Tue Oct 25 10:15:41 2005
From: jlaskey at apple.com (Jim Laskey)
Date: Tue, 25 Oct 2005 10:15:41 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/SubtargetFeature.cpp 
Message-ID: <200510251515.KAA23076@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target:

SubtargetFeature.cpp updated: 1.7 -> 1.8
---
Log message:

Preparation of supporting scheduling info.  Need to find info based on selected
CPU.



---
Diffs of the changes:  (+46 -21)

 SubtargetFeature.cpp |   67 +++++++++++++++++++++++++++++++++++----------------
 1 files changed, 46 insertions(+), 21 deletions(-)


Index: llvm/lib/Target/SubtargetFeature.cpp
diff -u llvm/lib/Target/SubtargetFeature.cpp:1.7 llvm/lib/Target/SubtargetFeature.cpp:1.8
--- llvm/lib/Target/SubtargetFeature.cpp:1.7	Sun Oct 23 17:23:13 2005
+++ llvm/lib/Target/SubtargetFeature.cpp	Tue Oct 25 10:15:28 2005
@@ -110,13 +110,12 @@
   }
 }
 
-/// Find item in array using binary search.
-static const SubtargetFeatureKV *Find(const std::string &S,
-                                      const SubtargetFeatureKV *A, size_t L) {
+/// Find KV in array using binary search.
+template<typename T> const T *Find(const std::string &S, const T *A, size_t L) {
   // Determine the end of the array
-  const SubtargetFeatureKV *Hi = A + L;
+  const T *Hi = A + L;
   // Binary search the array
-  const SubtargetFeatureKV *F = std::lower_bound(A, Hi, S);
+  const T *F = std::lower_bound(A, Hi, S);
   // If not found then return NULL
   if (F == Hi || std::string(F->Key) != S) return NULL;
   // Return the found array item
@@ -182,6 +181,7 @@
   Split(Features, LowercaseString(Initial));
 }
 
+
 /// setCPU - Set the CPU string.  Replaces previous setting.  Setting to "" 
 /// clears CPU.
 void SubtargetFeatures::setCPU(const std::string &String) {
@@ -189,15 +189,19 @@
 }
 
 
+/// setCPUIfNone - Setting CPU string only if no string is set.
+///
+void SubtargetFeatures::setCPUIfNone(const std::string &String) {
+  if (Features[0].empty()) setCPU(String);
+}
 
-/// Parse feature string for quick usage.
+
+/// getBits - Get feature bits.
 ///
-uint32_t SubtargetFeatures::Parse(const std::string &String,
-                                  const std::string &DefaultCPU,
-                                  const SubtargetFeatureKV *CPUTable,
-                                  size_t CPUTableSize,
-                                  const SubtargetFeatureKV *FeatureTable,
-                                  size_t FeatureTableSize) {
+uint32_t SubtargetFeatures::getBits(const SubtargetFeatureKV *CPUTable,
+                                          size_t CPUTableSize,
+                                    const SubtargetFeatureKV *FeatureTable,
+                                          size_t FeatureTableSize) {
   assert(CPUTable && "missing CPU table");
   assert(FeatureTable && "missing features table");
 #ifndef NDEBUG
@@ -210,15 +214,10 @@
           "CPU features table is not sorted");
   }
 #endif
-  std::vector<std::string> Features;    // Subtarget features as a vector
   uint32_t Bits = 0;                    // Resulting bits
-  // Split up features
-  Split(Features, String);
 
-  // Check if default is needed
-  if (Features[0].empty())
-    Features[0] = DefaultCPU;
-  else if (Features[0] == "help")
+  // Check if help is needed
+  if (Features[0] == "help")
     Help(CPUTable, CPUTableSize, FeatureTable, FeatureTableSize);
   
   // Find CPU entry
@@ -260,7 +259,32 @@
   return Bits;
 }
 
-/// Print feature string.
+/// Get info pointer
+void *SubtargetFeatures::getInfo(const SubtargetInfoKV *Table,
+                                       size_t TableSize) {
+  assert(Table && "missing table");
+#ifndef NDEBUG
+  for (size_t i = 1; i < TableSize; i++) {
+    assert(strcmp(Table[i - 1].Key, Table[i].Key) < 0 && "Table is not sorted");
+  }
+#endif
+
+  // Find entry
+  const SubtargetInfoKV *Entry = Find(Features[0], Table, TableSize);
+  
+  if (Entry) {
+    return Entry->Value;
+  } else {
+    std::cerr << "'" << Features[0]
+              << "' is not a recognized processor for this target"
+              << " (ignoring processor)"
+              << "\n";
+    return NULL;
+  }
+}
+
+/// print - Print feature string.
+///
 void SubtargetFeatures::print(std::ostream &OS) const {
   for (size_t i = 0; i < Features.size(); i++) {
     OS << Features[i] << "  ";
@@ -268,7 +292,8 @@
   OS << "\n";
 }
 
-/// Dump feature info.
+/// dump - Dump feature info.
+///
 void SubtargetFeatures::dump() const {
   print(std::cerr);
 }





From jlaskey at apple.com  Tue Oct 25 10:16:47 2005
From: jlaskey at apple.com (Jim Laskey)
Date: Tue, 25 Oct 2005 10:16:47 -0500
Subject: [llvm-commits] CVS: llvm/utils/TableGen/SubtargetEmitter.cpp
	SubtargetEmitter.h 
Message-ID: <200510251516.KAA23096@zion.cs.uiuc.edu>



Changes in directory llvm/utils/TableGen:

SubtargetEmitter.cpp updated: 1.3 -> 1.4
SubtargetEmitter.h updated: 1.1 -> 1.2
---
Log message:

Refactored to make room for more stuff (scheduling info.)



---
Diffs of the changes:  (+102 -77)

 SubtargetEmitter.cpp |  174 ++++++++++++++++++++++++++++-----------------------
 SubtargetEmitter.h   |    5 +
 2 files changed, 102 insertions(+), 77 deletions(-)


Index: llvm/utils/TableGen/SubtargetEmitter.cpp
diff -u llvm/utils/TableGen/SubtargetEmitter.cpp:1.3 llvm/utils/TableGen/SubtargetEmitter.cpp:1.4
--- llvm/utils/TableGen/SubtargetEmitter.cpp:1.3	Sun Oct 23 17:33:08 2005
+++ llvm/utils/TableGen/SubtargetEmitter.cpp	Tue Oct 25 10:16:36 2005
@@ -44,96 +44,116 @@
   }
 };
 
-
-// 
-// SubtargetEmitter::run - Main subtarget enumeration emitter.
 //
-void SubtargetEmitter::run(std::ostream &OS) {
-  EmitSourceFileHeader("Subtarget Enumeration Source Fragment", OS);
-  
+// FeatureEnumeration - Emit an enumeration of all the subtarget features.
+//
+void SubtargetEmitter::FeatureEnumeration(std::ostream &OS) {
   RecordList Features = Records.getAllDerivedDefinitions("SubtargetFeature");
   sort(Features.begin(), Features.end(), LessRecord());
-  
-  RecordList Processors = Records.getAllDerivedDefinitions("Processor");
-  sort(Processors.begin(), Processors.end(), LessRecordFieldName());
 
-  OS << "#include \"llvm/Target/SubtargetFeature.h\"\n\n";
+  int i = 0;
   
-  { // Feature enumeration
-    int i = 0;
-    
-    OS << "enum {\n";
-    
-    for (RecordListIter RI = Features.begin(), E = Features.end(); RI != E;){
-      Record *R = *RI++;
-      std::string Instance = R->getName();
-      OS << "  "
-         << Instance
-         << " = "
-         << " 1 << " << i++
-         << ((RI != E) ? ",\n" : "\n");
-    }
-    
-    OS << "};\n";
-  }
+  OS << "enum {\n";
   
-  { // Feature key values
-    OS << "\n"
-       << "// Sorted (by key) array of values for CPU features.\n"
-       << "static llvm::SubtargetFeatureKV FeatureKV[] = {\n";
-    for (RecordListIter RI = Features.begin(), E = Features.end(); RI != E;) {
-      Record *R = *RI++;
-      std::string Instance = R->getName();
-      std::string Name = R->getValueAsString("Name");
-      std::string Desc = R->getValueAsString("Desc");
-      OS << "  { "
-         << "\"" << Name << "\", "
-         << "\"" << Desc << "\", "
-         << Instance
-         << ((RI != E) ? " },\n" : " }\n");
-    }
-    OS << "};\n";
+  for (RecordListIter RI = Features.begin(), E = Features.end(); RI != E;){
+    Record *R = *RI++;
+    std::string Instance = R->getName();
+    OS << "  "
+       << Instance
+       << " = "
+       << " 1 << " << i++
+       << ((RI != E) ? ",\n" : "\n");
   }
   
-  { // CPU key values
-    OS << "\n"
-       << "// Sorted (by key) array of values for CPU subtype.\n"
-       << "static const llvm::SubtargetFeatureKV SubTypeKV[] = {\n";
-    for (RecordListIter RI = Processors.begin(), E = Processors.end();
-         RI != E;) {
-      Record *R = *RI++;
-      std::string Name = R->getValueAsString("Name");
-      Record *ProcItin = R->getValueAsDef("ProcItin");
-      ListInit *Features = R->getValueAsListInit("Features");
-      unsigned N = Features->getSize();
-      OS << "  { "
-         << "\"" << Name << "\", "
-         << "\"Select the " << Name << " processor\", ";
-         
-      
-      if (N == 0) {
-        OS << "0";
-      } else {
-        for (unsigned i = 0; i < N; ) {
-          if (DefInit *DI = dynamic_cast<DefInit*>(Features->getElement(i++))) {
-            Record *Feature = DI->getDef();
-            std::string Name = Feature->getName();
-            OS << Name;
-            if (i != N) OS << " | ";
-          } else {
-            throw "Feature: " + Name +
-                  " expected feature in processor feature list!";
-          }
+  OS << "};\n";
+}
+
+//
+// FeatureKeyValues - Emit data of all the subtarget features.  Used by command
+// line.
+//
+void SubtargetEmitter::FeatureKeyValues(std::ostream &OS) {
+  RecordList Features = Records.getAllDerivedDefinitions("SubtargetFeature");
+  sort(Features.begin(), Features.end(), LessRecord());
+
+  OS << "\n"
+     << "// Sorted (by key) array of values for CPU features.\n"
+     << "static llvm::SubtargetFeatureKV FeatureKV[] = {\n";
+  for (RecordListIter RI = Features.begin(), E = Features.end(); RI != E;) {
+    Record *R = *RI++;
+    std::string Instance = R->getName();
+    std::string Name = R->getValueAsString("Name");
+    std::string Desc = R->getValueAsString("Desc");
+    OS << "  { "
+       << "\"" << Name << "\", "
+       << "\"" << Desc << "\", "
+       << Instance
+       << ((RI != E) ? " },\n" : " }\n");
+  }
+  OS << "};\n";
+
+  OS<<"\nenum {\n";
+  OS<<"  FeatureKVSize = sizeof(FeatureKV)/sizeof(llvm::SubtargetFeatureKV)\n";
+  OS<<"};\n";
+}
+
+//
+// CPUKeyValues - Emit data of all the subtarget processors.  Used by command
+// line.
+//
+void SubtargetEmitter::CPUKeyValues(std::ostream &OS) {
+  RecordList Processors = Records.getAllDerivedDefinitions("Processor");
+  sort(Processors.begin(), Processors.end(), LessRecordFieldName());
+
+  OS << "\n"
+     << "// Sorted (by key) array of values for CPU subtype.\n"
+     << "static const llvm::SubtargetFeatureKV SubTypeKV[] = {\n";
+  for (RecordListIter RI = Processors.begin(), E = Processors.end();
+       RI != E;) {
+    Record *R = *RI++;
+    std::string Name = R->getValueAsString("Name");
+    Record *ProcItin = R->getValueAsDef("ProcItin");
+    ListInit *Features = R->getValueAsListInit("Features");
+    unsigned N = Features->getSize();
+    OS << "  { "
+       << "\"" << Name << "\", "
+       << "\"Select the " << Name << " processor\", ";
+       
+    
+    if (N == 0) {
+      OS << "0";
+    } else {
+      for (unsigned i = 0; i < N; ) {
+        if (DefInit *DI = dynamic_cast<DefInit*>(Features->getElement(i++))) {
+          Record *Feature = DI->getDef();
+          std::string Name = Feature->getName();
+          OS << Name;
+          if (i != N) OS << " | ";
+        } else {
+          throw "Feature: " + Name +
+                " expected feature in processor feature list!";
         }
       }
-      
-      OS << ((RI != E) ? " },\n" : " }\n");
     }
-    OS << "};\n";
+    
+    OS << ((RI != E) ? " },\n" : " }\n");
   }
-  
+  OS << "};\n";
+
   OS<<"\nenum {\n";
-  OS<<"  FeatureKVSize = sizeof(FeatureKV)/sizeof(llvm::SubtargetFeatureKV),\n";
   OS<<"  SubTypeKVSize = sizeof(SubTypeKV)/sizeof(llvm::SubtargetFeatureKV)\n";
   OS<<"};\n";
 }
+
+// 
+// SubtargetEmitter::run - Main subtarget enumeration emitter.
+//
+void SubtargetEmitter::run(std::ostream &OS) {
+  EmitSourceFileHeader("Subtarget Enumeration Source Fragment", OS);
+
+  OS << "#include \"llvm/Target/SubtargetFeature.h\"\n\n";
+  
+  FeatureEnumeration(OS);
+  FeatureKeyValues(OS);
+  CPUKeyValues(OS);
+}


Index: llvm/utils/TableGen/SubtargetEmitter.h
diff -u llvm/utils/TableGen/SubtargetEmitter.h:1.1 llvm/utils/TableGen/SubtargetEmitter.h:1.2
--- llvm/utils/TableGen/SubtargetEmitter.h:1.1	Fri Oct 21 14:00:04 2005
+++ llvm/utils/TableGen/SubtargetEmitter.h	Tue Oct 25 10:16:36 2005
@@ -20,6 +20,11 @@
 
 class SubtargetEmitter : public TableGenBackend {
   RecordKeeper &Records;
+  
+  void FeatureEnumeration(std::ostream &OS);
+  void FeatureKeyValues(std::ostream &OS);
+  void CPUKeyValues(std::ostream &OS);
+  
 public:
   SubtargetEmitter(RecordKeeper &R) : Records(R) {}
 





From lattner at cs.uiuc.edu  Tue Oct 25 12:10:41 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue, 25 Oct 2005 12:10:41 -0500
Subject: [llvm-commits] CVS: llvm/tools/llc/Makefile 
Message-ID: <200510251710.MAA23609@zion.cs.uiuc.edu>



Changes in directory llvm/tools/llc:

Makefile updated: 1.74 -> 1.75
---
Log message:

transforms before analyses


---
Diffs of the changes:  (+1 -1)

 Makefile |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/tools/llc/Makefile
diff -u llvm/tools/llc/Makefile:1.74 llvm/tools/llc/Makefile:1.75
--- llvm/tools/llc/Makefile:1.74	Sun Oct 23 20:13:21 2005
+++ llvm/tools/llc/Makefile	Tue Oct 25 12:10:30 2005
@@ -70,8 +70,8 @@
 	LLVMipa.a \
 	LLVMTransforms.a \
 	LLVMScalarOpts.a \
-	LLVMAnalysis.a \
 	LLVMTransformUtils.a \
+	LLVMAnalysis.a \
 	LLVMBCReader \
 	LLVMBCWriter \
 	LLVMCore \





From lattner at cs.uiuc.edu  Tue Oct 25 12:54:30 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue, 25 Oct 2005 12:54:30 -0500
Subject: [llvm-commits] CVS: llvm/Makefile.rules 
Message-ID: <200510251754.MAA23902@zion.cs.uiuc.edu>



Changes in directory llvm:

Makefile.rules updated: 1.332 -> 1.333
---
Log message:

analyses after transformations


---
Diffs of the changes:  (+1 -1)

 Makefile.rules |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/Makefile.rules
diff -u llvm/Makefile.rules:1.332 llvm/Makefile.rules:1.333
--- llvm/Makefile.rules:1.332	Sun Oct 23 21:21:45 2005
+++ llvm/Makefile.rules	Tue Oct 25 12:54:19 2005
@@ -617,7 +617,7 @@
   JIT_LIBS += LLVMAlpha LLVMSelectionDAG
 endif
 
-LLVMLIBS := $(JIT_LIBS) LLVMScalarOpts.a LLVMAnalysis.a LLVMTransformUtils.a \
+LLVMLIBS := $(JIT_LIBS) LLVMScalarOpts.a LLVMTransformUtils.a LLVMAnalysis.a \
             LLVMBCReader LLVMCore LLVMSupport.a LLVMTarget.a LLVMbzip2 \
             LLVMSystem.a $(PLATFORMLIBDL)
 endif





From lattner at cs.uiuc.edu  Tue Oct 25 12:58:12 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue, 25 Oct 2005 12:58:12 -0500
Subject: [llvm-commits] CVS: llvm/include/llvm/Module.h Function.h 
Message-ID: <200510251758.MAA23977@zion.cs.uiuc.edu>



Changes in directory llvm/include/llvm:

Module.h updated: 1.63 -> 1.64
Function.h updated: 1.66 -> 1.67
---
Log message:

Add a missing Module::setTargetTriple method.

Remove Function::aiterator and Module::giterator typedefs (and const versions)
as they should have been removed when abegin/gbegin were removed.  Thanks to
alkis for bringing this to my attn.



---
Diffs of the changes:  (+10 -12)

 Function.h |    2 --
 Module.h   |   20 ++++++++++----------
 2 files changed, 10 insertions(+), 12 deletions(-)


Index: llvm/include/llvm/Module.h
diff -u llvm/include/llvm/Module.h:1.63 llvm/include/llvm/Module.h:1.64
--- llvm/include/llvm/Module.h:1.63	Sat Oct 22 23:37:19 2005
+++ llvm/include/llvm/Module.h	Tue Oct 25 12:58:00 2005
@@ -52,17 +52,15 @@
   typedef iplist<Function> FunctionListType;
   typedef SetVector<std::string> LibraryListType;
 
-  // Global Variable iterators...
-  typedef GlobalListType::iterator                                   global_iterator;
-  typedef GlobalListType::const_iterator                       const_global_iterator;
-  typedef global_iterator giterator; // these are legacy, deprecated
-  typedef const_global_iterator const_giterator;
+  // Global Variable iterators.
+  typedef GlobalListType::iterator                     global_iterator;
+  typedef GlobalListType::const_iterator         const_global_iterator;
 
-  // Function iterators...
+  // Function iterators.
   typedef FunctionListType::iterator                          iterator;
   typedef FunctionListType::const_iterator              const_iterator;
 
-  // Library list iterators
+  // Library list iterators.
   typedef LibraryListType::const_iterator lib_iterator;
 
   enum Endianness  { AnyEndianness, LittleEndian, BigEndian };
@@ -87,9 +85,11 @@
   Module(const std::string &ModuleID);
   ~Module();
 
-  const std::string& getModuleIdentifier() const { return ModuleID; }
-  const std::string& getTargetTriple() const { return TargetTriple; }
-  void setTargetTriple(const std::string& T) { TargetTriple = T; }
+  const std::string &getModuleIdentifier() const { return ModuleID; }
+  void setModuleIdentifier(const std::string &ID) { ModuleID = ID; }
+
+  const std::string &getTargetTriple() const { return TargetTriple; }
+  void setTargetTriple(const std::string &T) { TargetTriple = T; }
 
   /// Target endian information...
   Endianness getEndianness() const { return Endian; }


Index: llvm/include/llvm/Function.h
diff -u llvm/include/llvm/Function.h:1.66 llvm/include/llvm/Function.h:1.67
--- llvm/include/llvm/Function.h:1.66	Sun May 15 20:49:12 2005
+++ llvm/include/llvm/Function.h	Tue Oct 25 12:58:00 2005
@@ -57,8 +57,6 @@
 
   typedef ArgumentListType::iterator arg_iterator;
   typedef ArgumentListType::const_iterator const_arg_iterator;
-  typedef arg_iterator aiterator; // legacy, deprecated
-  typedef const_arg_iterator const_aiterator; // legacy, deprecated
 
 private:
   // Important things that make up a function!





From lattner at cs.uiuc.edu  Tue Oct 25 12:59:39 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue, 25 Oct 2005 12:59:39 -0500
Subject: [llvm-commits] CVS: llvm/include/llvm/BasicBlock.h Constant.h
	GlobalValue.h Instruction.h 
Message-ID: <200510251759.MAA24040@zion.cs.uiuc.edu>



Changes in directory llvm/include/llvm:

BasicBlock.h updated: 1.56 -> 1.57
Constant.h updated: 1.25 -> 1.26
GlobalValue.h updated: 1.23 -> 1.24
Instruction.h updated: 1.68 -> 1.69
---
Log message:

Remove some dead argument names which irritates GCC at certain warning levels.



---
Diffs of the changes:  (+4 -4)

 BasicBlock.h  |    2 +-
 Constant.h    |    2 +-
 GlobalValue.h |    2 +-
 Instruction.h |    2 +-
 4 files changed, 4 insertions(+), 4 deletions(-)


Index: llvm/include/llvm/BasicBlock.h
diff -u llvm/include/llvm/BasicBlock.h:1.56 llvm/include/llvm/BasicBlock.h:1.57
--- llvm/include/llvm/BasicBlock.h:1.56	Fri Aug 12 17:13:27 2005
+++ llvm/include/llvm/BasicBlock.h	Tue Oct 25 12:59:28 2005
@@ -139,7 +139,7 @@
   void print(std::ostream &OS, AssemblyAnnotationWriter *AAW) const;
 
   /// Methods for support type inquiry through isa, cast, and dyn_cast:
-  static inline bool classof(const BasicBlock *BB) { return true; }
+  static inline bool classof(const BasicBlock *) { return true; }
   static inline bool classof(const Value *V) {
     return V->getValueType() == Value::BasicBlockVal;
   }


Index: llvm/include/llvm/Constant.h
diff -u llvm/include/llvm/Constant.h:1.25 llvm/include/llvm/Constant.h:1.26
--- llvm/include/llvm/Constant.h:1.25	Tue Oct  4 13:12:13 2005
+++ llvm/include/llvm/Constant.h	Tue Oct 25 12:59:28 2005
@@ -75,7 +75,7 @@
   /// use Value::replaceAllUsesWith, which automatically dispatches to this
   /// method as needed.
   ///
-  virtual void replaceUsesOfWithOnConstant(Value *From, Value *To, Use *U) {
+  virtual void replaceUsesOfWithOnConstant(Value *, Value *, Use *) {
     // Provide a default implementation for constants (like integers) that
     // cannot use any other values.  This cannot be called at runtime, but needs
     // to be here to avoid link errors.


Index: llvm/include/llvm/GlobalValue.h
diff -u llvm/include/llvm/GlobalValue.h:1.23 llvm/include/llvm/GlobalValue.h:1.24
--- llvm/include/llvm/GlobalValue.h:1.23	Thu Apr 21 15:11:51 2005
+++ llvm/include/llvm/GlobalValue.h	Tue Oct 25 12:59:28 2005
@@ -101,7 +101,7 @@
   void removeDeadConstantUsers();
 
   // Methods for support type inquiry through isa, cast, and dyn_cast:
-  static inline bool classof(const GlobalValue *T) { return true; }
+  static inline bool classof(const GlobalValue *) { return true; }
   static inline bool classof(const Value *V) {
     return V->getValueType() == Value::FunctionVal ||
            V->getValueType() == Value::GlobalVariableVal;


Index: llvm/include/llvm/Instruction.h
diff -u llvm/include/llvm/Instruction.h:1.68 llvm/include/llvm/Instruction.h:1.69
--- llvm/include/llvm/Instruction.h:1.68	Mon Aug  8 00:21:33 2005
+++ llvm/include/llvm/Instruction.h	Tue Oct 25 12:59:28 2005
@@ -157,7 +157,7 @@
   void print(std::ostream &OS, AssemblyAnnotationWriter *AAW) const;
 
   /// Methods for support type inquiry through isa, cast, and dyn_cast:
-  static inline bool classof(const Instruction *I) { return true; }
+  static inline bool classof(const Instruction *) { return true; }
   static inline bool classof(const Value *V) {
     return V->getValueType() >= Value::InstructionVal;
   }





From lattner at cs.uiuc.edu  Tue Oct 25 13:57:41 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue, 25 Oct 2005 13:57:41 -0500
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp 
Message-ID: <200510251857.NAA24538@zion.cs.uiuc.edu>



Changes in directory llvm/lib/CodeGen/SelectionDAG:

DAGCombiner.cpp updated: 1.54 -> 1.55
---
Log message:

Clear a bit in this file that was causing a miscompilation of 178.galgel.


---
Diffs of the changes:  (+1 -1)

 DAGCombiner.cpp |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.54 llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.55
--- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.54	Sat Oct 22 13:50:15 2005
+++ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp	Tue Oct 25 13:57:30 2005
@@ -2472,7 +2472,7 @@
           if (N0.getOperand(0) == N1.getOperand(1))
             return DAG.getSetCC(VT, N0.getOperand(1), N1.getOperand(0), Cond);
           if (N0.getOperand(1) == N1.getOperand(0))
-            return DAG.getSetCC(VT, N0.getOperand(1), N1.getOperand(1), Cond);
+            return DAG.getSetCC(VT, N0.getOperand(0), N1.getOperand(1), Cond);
         }
       }
 





From lattner at cs.uiuc.edu  Tue Oct 25 14:32:48 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue, 25 Oct 2005 14:32:48 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp 
Message-ID: <200510251932.OAA24862@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/PowerPC:

PPCISelDAGToDAG.cpp updated: 1.116 -> 1.117
---
Log message:

Fix a couple of minor bugs.  The first fixes povray, the second fixes things
if the dag combiner isn't run


---
Diffs of the changes:  (+9 -3)

 PPCISelDAGToDAG.cpp |   12 +++++++++---
 1 files changed, 9 insertions(+), 3 deletions(-)


Index: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.116 llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.117
--- llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.116	Fri Oct 21 16:17:10 2005
+++ llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp	Tue Oct 25 14:32:37 2005
@@ -898,8 +898,11 @@
       Tmp = CurDAG->getTargetNode(PPC::ADDIS, MVT::i32, getGlobalBaseReg(),CPI);
     else
       Tmp = CurDAG->getTargetNode(PPC::LIS, MVT::i32, CPI);
-    CurDAG->SelectNodeTo(N, PPC::LA, MVT::i32, Tmp, CPI);
-    return SDOperand(N, 0);
+    if (N->hasOneUse()) {
+      CurDAG->SelectNodeTo(N, PPC::LA, MVT::i32, Tmp, CPI);
+      return SDOperand(N, 0);
+    }
+    return CurDAG->getTargetNode(PPC::LA, MVT::i32, Tmp, CPI);
   }
   case ISD::GlobalAddress: {
     GlobalValue *GV = cast<GlobalAddressSDNode>(N)->getGlobal();
@@ -1035,7 +1038,10 @@
       unsigned SH, MB, ME;
       if (isRotateAndMask(N->getOperand(0).Val, Imm, false, SH, MB, ME)) {
         Val = Select(N->getOperand(0).getOperand(0));
-      } else {
+      } else if (Imm == 0) {
+        // AND X, 0 -> 0, not "rlwinm 32".
+        return Select(N->getOperand(1));
+      } else {        
         Val = Select(N->getOperand(0));
         isRunOfOnes(Imm, MB, ME);
         SH = 0;





From lattner at cs.uiuc.edu  Tue Oct 25 15:26:52 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue, 25 Oct 2005 15:26:52 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp 
Message-ID: <200510252026.PAA25294@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/PowerPC:

PPCISelDAGToDAG.cpp updated: 1.117 -> 1.118
---
Log message:

Be a bit more paranoid about calling SelectNodeTo


---
Diffs of the changes:  (+11 -7)

 PPCISelDAGToDAG.cpp |   18 +++++++++++-------
 1 files changed, 11 insertions(+), 7 deletions(-)


Index: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.117 llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.118
--- llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.117	Tue Oct 25 14:32:37 2005
+++ llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp	Tue Oct 25 15:26:41 2005
@@ -886,10 +886,15 @@
     return SDOperand(N, 0);
   case ISD::FrameIndex: {
     int FI = cast<FrameIndexSDNode>(N)->getIndex();
-    CurDAG->SelectNodeTo(N, PPC::ADDI, MVT::i32,
-                         CurDAG->getTargetFrameIndex(FI, MVT::i32),
-                         getI32Imm(0));
-    return SDOperand(N, 0);
+    if (N->hasOneUse()) {
+      CurDAG->SelectNodeTo(N, PPC::ADDI, MVT::i32,
+                           CurDAG->getTargetFrameIndex(FI, MVT::i32),
+                           getI32Imm(0));
+      return SDOperand(N, 0);
+    }
+    return CurDAG->getTargetNode(PPC::ADDI, MVT::i32,
+                                 CurDAG->getTargetFrameIndex(FI, MVT::i32),
+                                 getI32Imm(0));
   }
   case ISD::ConstantPool: {
     Constant *C = cast<ConstantPoolSDNode>(N)->get();
@@ -914,10 +919,9 @@
       Tmp = CurDAG->getTargetNode(PPC::LIS, MVT::i32, GA);
 
     if (GV->hasWeakLinkage() || GV->isExternal())
-      CurDAG->SelectNodeTo(N, PPC::LWZ, MVT::i32, GA, Tmp);
+      return CurDAG->getTargetNode(PPC::LWZ, MVT::i32, GA, Tmp);
     else
-      CurDAG->SelectNodeTo(N, PPC::LA, MVT::i32, Tmp, GA);
-    return SDOperand(N, 0);
+      return CurDAG->getTargetNode(PPC::LA, MVT::i32, Tmp, GA);
   }
     
   case PPCISD::FSEL: {





From lattner at cs.uiuc.edu  Tue Oct 25 15:35:25 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue, 25 Oct 2005 15:35:25 -0500
Subject: [llvm-commits] CVS: llvm/utils/TableGen/DAGISelEmitter.cpp 
Message-ID: <200510252035.PAA25456@zion.cs.uiuc.edu>



Changes in directory llvm/utils/TableGen:

DAGISelEmitter.cpp updated: 1.65 -> 1.66
---
Log message:

Emit some boilerplate for targets


---
Diffs of the changes:  (+29 -0)

 DAGISelEmitter.cpp |   29 +++++++++++++++++++++++++++++
 1 files changed, 29 insertions(+)


Index: llvm/utils/TableGen/DAGISelEmitter.cpp
diff -u llvm/utils/TableGen/DAGISelEmitter.cpp:1.65 llvm/utils/TableGen/DAGISelEmitter.cpp:1.66
--- llvm/utils/TableGen/DAGISelEmitter.cpp:1.65	Thu Oct 20 20:19:59 2005
+++ llvm/utils/TableGen/DAGISelEmitter.cpp	Tue Oct 25 15:35:14 2005
@@ -1859,6 +1859,35 @@
      << "    SDOperand Tmp0 = Select(N.getOperand(0));\n"
      << "    if (!N.Val->hasOneUse()) CodeGenMap[N] = Tmp0;\n"
      << "    return Tmp0;\n"
+     << "  }\n"
+     << "  case ISD::TokenFactor:\n"
+     << "    if (N.getNumOperands() == 2) {\n"
+     << "      SDOperand Op0 = Select(N.getOperand(0));\n"
+     << "      SDOperand Op1 = Select(N.getOperand(1));\n"
+     << "      return CodeGenMap[N] =\n"
+     << "          CurDAG->getNode(ISD::TokenFactor, MVT::Other, Op0, Op1);\n"
+     << "    } else {\n"
+     << "      std::vector<SDOperand> Ops;\n"
+     << "      for (unsigned i = 0, e = N.getNumOperands(); i != e; ++i)\n"
+     << "        Ops.push_back(Select(N.getOperand(i)));\n"
+     << "       return CodeGenMap[N] = \n"
+     << "               CurDAG->getNode(ISD::TokenFactor, MVT::Other, Ops);\n"
+     << "    }\n"
+     << "  case ISD::CopyFromReg: {\n"
+     << "    SDOperand Chain = Select(N.getOperand(0));\n"
+     << "    if (Chain == N.getOperand(0)) return N; // No change\n"
+     << "    SDOperand New = CurDAG->getCopyFromReg(Chain,\n"
+     << "                    cast<RegisterSDNode>(N.getOperand(1))->getReg(),\n"
+     << "                                         N.Val->getValueType(0));\n"
+     << "    return New.getValue(N.ResNo);\n"
+     << "  }\n"
+     << "  case ISD::CopyToReg: {\n"
+     << "    SDOperand Chain = Select(N.getOperand(0));\n"
+     << "    SDOperand Reg = N.getOperand(1);\n"
+     << "    SDOperand Val = Select(N.getOperand(2));\n"
+     << "    return CodeGenMap[N] = \n"
+     << "                   CurDAG->getNode(ISD::CopyToReg, MVT::Other,\n"
+     << "                                   Chain, Reg, Val);\n"
      << "  }\n";
     
   // Group the patterns by their top-level opcodes.





From lattner at cs.uiuc.edu  Tue Oct 25 15:36:21 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue, 25 Oct 2005 15:36:21 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp 
Message-ID: <200510252036.PAA25520@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/Alpha:

AlphaISelDAGToDAG.cpp updated: 1.3 -> 1.4
---
Log message:

The dag isel generator generates this now


---
Diffs of the changes:  (+0 -32)

 AlphaISelDAGToDAG.cpp |   32 --------------------------------
 1 files changed, 32 deletions(-)


Index: llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp
diff -u llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:1.3 llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:1.4
--- llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:1.3	Sat Oct 22 22:43:48 2005
+++ llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp	Tue Oct 25 15:36:10 2005
@@ -183,38 +183,6 @@
     return SDOperand(N, 0);
   }
 
-  case ISD::TokenFactor: {
-    SDOperand New;
-    if (N->getNumOperands() == 2) {
-      SDOperand Op0 = Select(N->getOperand(0));
-      SDOperand Op1 = Select(N->getOperand(1));
-      New = CurDAG->getNode(ISD::TokenFactor, MVT::Other, Op0, Op1);
-    } else {
-      std::vector<SDOperand> Ops;
-      for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
-        Ops.push_back(Select(N->getOperand(i)));
-      New = CurDAG->getNode(ISD::TokenFactor, MVT::Other, Ops);
-    }
-    
-    CodeGenMap[Op] = New;
-    return New;
-  }
-  case ISD::CopyFromReg: {
-    SDOperand Chain = Select(N->getOperand(0));
-    if (Chain == N->getOperand(0)) return Op; // No change
-    SDOperand New = CurDAG->getCopyFromReg(Chain,
-         cast<RegisterSDNode>(N->getOperand(1))->getReg(), N->getValueType(0));
-    return New.getValue(Op.ResNo);
-  }
-  case ISD::CopyToReg: {
-    SDOperand Chain = Select(N->getOperand(0));
-    SDOperand Reg = N->getOperand(1);
-    SDOperand Val = Select(N->getOperand(2));
-    SDOperand New = CurDAG->getNode(ISD::CopyToReg, MVT::Other,
-                                    Chain, Reg, Val);
-    CodeGenMap[Op] = New;
-    return New;
-  }
   case ISD::UNDEF:
     if (N->getValueType(0) == MVT::i64)
       CurDAG->SelectNodeTo(N, Alpha::IDEF, MVT::i64);





From lattner at cs.uiuc.edu  Tue Oct 25 15:36:22 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue, 25 Oct 2005 15:36:22 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp 
Message-ID: <200510252036.PAA25524@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/PowerPC:

PPCISelDAGToDAG.cpp updated: 1.118 -> 1.119
---
Log message:

The dag isel generator generates this now


---
Diffs of the changes:  (+0 -32)

 PPCISelDAGToDAG.cpp |   32 --------------------------------
 1 files changed, 32 deletions(-)


Index: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.118 llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.119
--- llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.118	Tue Oct 25 15:26:41 2005
+++ llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp	Tue Oct 25 15:36:10 2005
@@ -844,38 +844,6 @@
   case ISD::CALL:               return SelectCALL(Op);
   case ISD::TAILCALL:           return SelectCALL(Op);
 
-  case ISD::TokenFactor: {
-    SDOperand New;
-    if (N->getNumOperands() == 2) {
-      SDOperand Op0 = Select(N->getOperand(0));
-      SDOperand Op1 = Select(N->getOperand(1));
-      New = CurDAG->getNode(ISD::TokenFactor, MVT::Other, Op0, Op1);
-    } else {
-      std::vector<SDOperand> Ops;
-      for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
-        Ops.push_back(Select(N->getOperand(i)));
-      New = CurDAG->getNode(ISD::TokenFactor, MVT::Other, Ops);
-    }
-    
-    CodeGenMap[Op] = New;
-    return New;
-  }
-  case ISD::CopyFromReg: {
-    SDOperand Chain = Select(N->getOperand(0));
-    if (Chain == N->getOperand(0)) return Op; // No change
-    SDOperand New = CurDAG->getCopyFromReg(Chain,
-         cast<RegisterSDNode>(N->getOperand(1))->getReg(), N->getValueType(0));
-    return New.getValue(Op.ResNo);
-  }
-  case ISD::CopyToReg: {
-    SDOperand Chain = Select(N->getOperand(0));
-    SDOperand Reg = N->getOperand(1);
-    SDOperand Val = Select(N->getOperand(2));
-    SDOperand New = CurDAG->getNode(ISD::CopyToReg, MVT::Other,
-                                    Chain, Reg, Val);
-    CodeGenMap[Op] = New;
-    return New;
-  }
   case ISD::UNDEF:
     if (N->getValueType(0) == MVT::i32)
       CurDAG->SelectNodeTo(N, PPC::IMPLICIT_DEF_GPR, MVT::i32);





From lattner at cs.uiuc.edu  Tue Oct 25 15:41:58 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue, 25 Oct 2005 15:41:58 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
	PPCInstrInfo.td 
Message-ID: <200510252041.PAA25636@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/PowerPC:

PPCISelDAGToDAG.cpp updated: 1.119 -> 1.120
PPCInstrInfo.td updated: 1.133 -> 1.134
---
Log message:

Autogen a few new ppc-specific nodes


---
Diffs of the changes:  (+11 -15)

 PPCISelDAGToDAG.cpp |   12 ------------
 PPCInstrInfo.td     |   14 +++++++++++---
 2 files changed, 11 insertions(+), 15 deletions(-)


Index: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.119 llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.120
--- llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.119	Tue Oct 25 15:36:10 2005
+++ llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp	Tue Oct 25 15:41:46 2005
@@ -903,18 +903,6 @@
                          Select(N->getOperand(1)), Select(N->getOperand(2)));
     return SDOperand(N, 0);
   }
-  case PPCISD::FCFID:
-    CurDAG->SelectNodeTo(N, PPC::FCFID, N->getValueType(0),
-                         Select(N->getOperand(0)));
-    return SDOperand(N, 0);
-  case PPCISD::FCTIDZ:
-    CurDAG->SelectNodeTo(N, PPC::FCTIDZ, N->getValueType(0),
-                         Select(N->getOperand(0)));
-    return SDOperand(N, 0);
-  case PPCISD::FCTIWZ:
-    CurDAG->SelectNodeTo(N, PPC::FCTIWZ, N->getValueType(0),
-                         Select(N->getOperand(0)));
-    return SDOperand(N, 0);
   case ISD::FADD: {
     MVT::ValueType Ty = N->getValueType(0);
     if (!NoExcessFPPrecision) {  // Match FMA ops


Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td
diff -u llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.133 llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.134
--- llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.133	Fri Oct 21 16:17:10 2005
+++ llvm/lib/Target/PowerPC/PPCInstrInfo.td	Tue Oct 25 15:41:46 2005
@@ -14,6 +14,14 @@
 
 include "PPCInstrFormats.td"
 
+//===----------------------------------------------------------------------===//
+// PowerPC specific DAG Nodes.
+//
+
+def PPCfcfid  : SDNode<"PPCISD::FCFID" , SDTFPUnaryOp, []>;
+def PPCfctidz : SDNode<"PPCISD::FCTIDZ", SDTFPUnaryOp, []>;
+def PPCfctiwz : SDNode<"PPCISD::FCTIWZ", SDTFPUnaryOp, []>;
+
 
 //===----------------------------------------------------------------------===//
 // PowerPC specific transformation functions and pattern fragments.
@@ -449,13 +457,13 @@
 }
 def FCFID  : XForm_26<63, 846, (ops F8RC:$frD, F8RC:$frB),
                       "fcfid $frD, $frB", FPGeneral,
-                      []>, isPPC64;
+                      [(set F8RC:$frD, (PPCfcfid F8RC:$frB))]>, isPPC64;
 def FCTIDZ : XForm_26<63, 815, (ops F8RC:$frD, F8RC:$frB),
                       "fctidz $frD, $frB", FPGeneral,
-                      []>, isPPC64;
+                      [(set F8RC:$frD, (PPCfctidz F8RC:$frB))]>, isPPC64;
 def FCTIWZ : XForm_26<63, 15, (ops F8RC:$frD, F8RC:$frB),
                       "fctiwz $frD, $frB", FPGeneral,
-                      []>;
+                      [(set F8RC:$frD, (PPCfctiwz F8RC:$frB))]>;
 def FRSP   : XForm_26<63, 12, (ops F4RC:$frD, F8RC:$frB),
                       "frsp $frD, $frB", FPGeneral,
                       [(set F4RC:$frD, (fround F8RC:$frB))]>;





From lattner at cs.uiuc.edu  Tue Oct 25 15:55:09 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue, 25 Oct 2005 15:55:09 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelLowering.cpp 
Message-ID: <200510252055.PAA25724@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/PowerPC:

PPCISelLowering.cpp updated: 1.36 -> 1.37
---
Log message:

Expose the fextend on the DAG instead of doing it in the matcher


---
Diffs of the changes:  (+21 -8)

 PPCISelLowering.cpp |   29 +++++++++++++++++++++--------
 1 files changed, 21 insertions(+), 8 deletions(-)


Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.36 llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.37
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.36	Thu Oct 20 19:02:42 2005
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp	Tue Oct 25 15:54:57 2005
@@ -204,34 +204,47 @@
         std::swap(TV, FV);  // fsel is natively setge, swap operands for setlt
       case ISD::SETUGE:
       case ISD::SETGE:
+        if (LHS.getValueType() == MVT::f32)   // Comparison is always 64-bits
+          LHS = DAG.getNode(ISD::FP_EXTEND, MVT::f64, LHS);
         return DAG.getNode(PPCISD::FSEL, ResVT, LHS, TV, FV);
       case ISD::SETUGT:
       case ISD::SETGT:
         std::swap(TV, FV);  // fsel is natively setge, swap operands for setlt
       case ISD::SETULE:
       case ISD::SETLE:
+        if (LHS.getValueType() == MVT::f32)   // Comparison is always 64-bits
+          LHS = DAG.getNode(ISD::FP_EXTEND, MVT::f64, LHS);
         return DAG.getNode(PPCISD::FSEL, ResVT,
                            DAG.getNode(ISD::FNEG, ResVT, LHS), TV, FV);
       }
     
+    SDOperand Cmp;
     switch (CC) {
     default: assert(0 && "Invalid FSEL condition"); abort();
     case ISD::SETULT:
     case ISD::SETLT:
-      return DAG.getNode(PPCISD::FSEL, ResVT,
-                         DAG.getNode(ISD::FSUB, CmpVT, LHS, RHS), FV, TV);
+      Cmp = DAG.getNode(ISD::FSUB, CmpVT, LHS, RHS);
+      if (Cmp.getValueType() == MVT::f32)   // Comparison is always 64-bits
+        Cmp = DAG.getNode(ISD::FP_EXTEND, MVT::f64, Cmp);
+      return DAG.getNode(PPCISD::FSEL, ResVT, Cmp, FV, TV);
     case ISD::SETUGE:
     case ISD::SETGE:
-      return DAG.getNode(PPCISD::FSEL, ResVT,
-                         DAG.getNode(ISD::FSUB, CmpVT, LHS, RHS), TV, FV);
+      Cmp = DAG.getNode(ISD::FSUB, CmpVT, LHS, RHS);
+      if (Cmp.getValueType() == MVT::f32)   // Comparison is always 64-bits
+        Cmp = DAG.getNode(ISD::FP_EXTEND, MVT::f64, Cmp);
+      return DAG.getNode(PPCISD::FSEL, ResVT, Cmp, TV, FV);
     case ISD::SETUGT:
     case ISD::SETGT:
-      return DAG.getNode(PPCISD::FSEL, ResVT,
-                         DAG.getNode(ISD::FSUB, CmpVT, RHS, LHS), FV, TV);
+      Cmp = DAG.getNode(ISD::FSUB, CmpVT, RHS, LHS);
+      if (Cmp.getValueType() == MVT::f32)   // Comparison is always 64-bits
+        Cmp = DAG.getNode(ISD::FP_EXTEND, MVT::f64, Cmp);
+      return DAG.getNode(PPCISD::FSEL, ResVT, Cmp, FV, TV);
     case ISD::SETULE:
     case ISD::SETLE:
-      return DAG.getNode(PPCISD::FSEL, ResVT,
-                         DAG.getNode(ISD::FSUB, CmpVT, RHS, LHS), TV, FV);
+      Cmp = DAG.getNode(ISD::FSUB, CmpVT, RHS, LHS);
+      if (Cmp.getValueType() == MVT::f32)   // Comparison is always 64-bits
+        Cmp = DAG.getNode(ISD::FP_EXTEND, MVT::f64, Cmp);
+      return DAG.getNode(PPCISD::FSEL, ResVT, Cmp, TV, FV);
     }
     break;
   }





From lattner at cs.uiuc.edu  Tue Oct 25 15:55:58 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue, 25 Oct 2005 15:55:58 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
	PPCInstrInfo.td 
Message-ID: <200510252055.PAA25784@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/PowerPC:

PPCISelDAGToDAG.cpp updated: 1.120 -> 1.121
PPCInstrInfo.td updated: 1.134 -> 1.135
---
Log message:

Autogen fsel


---
Diffs of the changes:  (+6 -14)

 PPCISelDAGToDAG.cpp |   12 ------------
 PPCInstrInfo.td     |    8 ++++++--
 2 files changed, 6 insertions(+), 14 deletions(-)


Index: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.120 llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.121
--- llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.120	Tue Oct 25 15:41:46 2005
+++ llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp	Tue Oct 25 15:55:47 2005
@@ -891,18 +891,6 @@
     else
       return CurDAG->getTargetNode(PPC::LA, MVT::i32, Tmp, GA);
   }
-    
-  case PPCISD::FSEL: {
-    SDOperand Comparison = Select(N->getOperand(0));
-    // Extend the comparison to 64-bits.
-    if (Comparison.getValueType() == MVT::f32)
-      Comparison = CurDAG->getTargetNode(PPC::FMRSD, MVT::f64, Comparison);
-    
-    unsigned Opc = N->getValueType(0) == MVT::f32 ? PPC::FSELS : PPC::FSELD;
-    CurDAG->SelectNodeTo(N, Opc, N->getValueType(0), Comparison,
-                         Select(N->getOperand(1)), Select(N->getOperand(2)));
-    return SDOperand(N, 0);
-  }
   case ISD::FADD: {
     MVT::ValueType Ty = N->getValueType(0);
     if (!NoExcessFPPrecision) {  // Match FMA ops


Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td
diff -u llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.134 llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.135
--- llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.134	Tue Oct 25 15:41:46 2005
+++ llvm/lib/Target/PowerPC/PPCInstrInfo.td	Tue Oct 25 15:55:47 2005
@@ -22,6 +22,10 @@
 def PPCfctidz : SDNode<"PPCISD::FCTIDZ", SDTFPUnaryOp, []>;
 def PPCfctiwz : SDNode<"PPCISD::FCTIWZ", SDTFPUnaryOp, []>;
 
+def PPCfsel   : SDNode<"PPCISD::FSEL",  
+   // Type constraint for fsel.
+   SDTypeProfile<1, 3, [SDTCisSameAs<0, 2>, SDTCisSameAs<0, 3>, 
+                        SDTCisFP<0>, SDTCisVT<1, f64>]>, []>;
 
 //===----------------------------------------------------------------------===//
 // PowerPC specific transformation functions and pattern fragments.
@@ -654,11 +658,11 @@
 def FSELD : AForm_1<63, 23,
                     (ops F8RC:$FRT, F8RC:$FRA, F8RC:$FRC, F8RC:$FRB),
                     "fsel $FRT, $FRA, $FRC, $FRB", FPGeneral,
-                    []>;
+                    [(set F8RC:$FRT, (PPCfsel F8RC:$FRA,F8RC:$FRC,F8RC:$FRB))]>;
 def FSELS : AForm_1<63, 23,
                      (ops F4RC:$FRT, F8RC:$FRA, F4RC:$FRC, F4RC:$FRB),
                      "fsel $FRT, $FRA, $FRC, $FRB", FPGeneral,
-                     []>;
+                    [(set F4RC:$FRT, (PPCfsel F8RC:$FRA,F4RC:$FRC,F4RC:$FRB))]>;
 def FADD  : AForm_2<63, 21,
                     (ops F8RC:$FRT, F8RC:$FRA, F8RC:$FRB),
                     "fadd $FRT, $FRA, $FRB", FPGeneral,





From lattner at cs.uiuc.edu  Tue Oct 25 15:58:55 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue, 25 Oct 2005 15:58:55 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCInstrFormats.td
	PPCInstrInfo.td 
Message-ID: <200510252058.PAA25853@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/PowerPC:

PPCInstrFormats.td updated: 1.54 -> 1.55
PPCInstrInfo.td updated: 1.135 -> 1.136
---
Log message:

Allow pseudos to have patterns, no functionality change


---
Diffs of the changes:  (+13 -13)

 PPCInstrFormats.td |    4 ++--
 PPCInstrInfo.td    |   22 +++++++++++-----------
 2 files changed, 13 insertions(+), 13 deletions(-)


Index: llvm/lib/Target/PowerPC/PPCInstrFormats.td
diff -u llvm/lib/Target/PowerPC/PPCInstrFormats.td:1.54 llvm/lib/Target/PowerPC/PPCInstrFormats.td:1.55
--- llvm/lib/Target/PowerPC/PPCInstrFormats.td:1.54	Wed Oct 19 14:51:16 2005
+++ llvm/lib/Target/PowerPC/PPCInstrFormats.td	Tue Oct 25 15:58:43 2005
@@ -550,10 +550,10 @@
 
 //===----------------------------------------------------------------------===//
 def NoItin : InstrItinClass;
-class Pseudo<dag OL, string asmstr>
+class Pseudo<dag OL, string asmstr, list<dag> pattern>
     : I<0, OL, asmstr, NoItin> {
   let PPC64 = 0;
   let VMX = 0;
-
+  let Pattern = pattern;
   let Inst{31-0} = 0;
 }


Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td
diff -u llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.135 llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.136
--- llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.135	Tue Oct 25 15:55:47 2005
+++ llvm/lib/Target/PowerPC/PPCInstrInfo.td	Tue Oct 25 15:58:43 2005
@@ -147,25 +147,25 @@
 // PowerPC Instruction Definitions.
 
 // Pseudo-instructions:
-def PHI : Pseudo<(ops variable_ops), "; PHI">;
+def PHI : Pseudo<(ops variable_ops), "; PHI", []>;
 
 let isLoad = 1 in {
-def ADJCALLSTACKDOWN : Pseudo<(ops u16imm:$amt), "; ADJCALLSTACKDOWN">;
-def ADJCALLSTACKUP : Pseudo<(ops u16imm:$amt), "; ADJCALLSTACKUP">;
+def ADJCALLSTACKDOWN : Pseudo<(ops u16imm:$amt), "; ADJCALLSTACKDOWN", []>;
+def ADJCALLSTACKUP : Pseudo<(ops u16imm:$amt), "; ADJCALLSTACKUP", []>;
 }
-def IMPLICIT_DEF_GPR : Pseudo<(ops GPRC:$rD), "; $rD = IMPLICIT_DEF_GPRC">;
-def IMPLICIT_DEF_F8  : Pseudo<(ops F8RC:$rD), "; %rD = IMPLICIT_DEF_F8">;
-def IMPLICIT_DEF_F4  : Pseudo<(ops F4RC:$rD), "; %rD = IMPLICIT_DEF_F4">;
+def IMPLICIT_DEF_GPR : Pseudo<(ops GPRC:$rD), "; $rD = IMPLICIT_DEF_GPRC", []>;
+def IMPLICIT_DEF_F8  : Pseudo<(ops F8RC:$rD), "; %rD = IMPLICIT_DEF_F8", []>;
+def IMPLICIT_DEF_F4  : Pseudo<(ops F4RC:$rD), "; %rD = IMPLICIT_DEF_F4", []>;
 
 // SELECT_CC_* - Used to implement the SELECT_CC DAG operation.  Expanded by the
 // scheduler into a branch sequence.
 let usesCustomDAGSchedInserter = 1 in {  // Expanded by the scheduler.
   def SELECT_CC_Int : Pseudo<(ops GPRC:$dst, CRRC:$cond, GPRC:$T, GPRC:$F,
-                              i32imm:$BROPC), "; SELECT_CC PSEUDO!">;
+                              i32imm:$BROPC), "; SELECT_CC PSEUDO!", []>;
   def SELECT_CC_F4  : Pseudo<(ops F4RC:$dst, CRRC:$cond, F4RC:$T, F4RC:$F,
-                              i32imm:$BROPC), "; SELECT_CC PSEUDO!">;
+                              i32imm:$BROPC), "; SELECT_CC PSEUDO!", []>;
   def SELECT_CC_F8  : Pseudo<(ops F8RC:$dst, CRRC:$cond, F8RC:$T, F8RC:$F,
-                              i32imm:$BROPC), "; SELECT_CC PSEUDO!">;
+                              i32imm:$BROPC), "; SELECT_CC PSEUDO!", []>;
 }
 
 
@@ -176,12 +176,12 @@
 }
 
 let Defs = [LR] in
-  def MovePCtoLR : Pseudo<(ops piclabel:$label), "bl $label">;
+  def MovePCtoLR : Pseudo<(ops piclabel:$label), "bl $label", []>;
 
 let isBranch = 1, isTerminator = 1 in {
   def COND_BRANCH : Pseudo<(ops CRRC:$crS, u16imm:$opc,
                                 target:$true, target:$false),
-                           "; COND_BRANCH">;
+                           "; COND_BRANCH", []>;
   def B   : IForm<18, 0, 0, (ops target:$func), "b $func", BrB>;
 //def BA  : IForm<18, 1, 0, (ops target:$func), "ba $func", BrB>;
   def BL  : IForm<18, 0, 1, (ops target:$func), "bl $func", BrB>;





From lattner at cs.uiuc.edu  Tue Oct 25 16:02:34 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue, 25 Oct 2005 16:02:34 -0500
Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/SelectionDAG.h 
Message-ID: <200510252102.QAA25957@zion.cs.uiuc.edu>



Changes in directory llvm/include/llvm/CodeGen:

SelectionDAG.h updated: 1.64 -> 1.65
---
Log message:

Add a method


---
Diffs of the changes:  (+4 -1)

 SelectionDAG.h |    5 ++++-
 1 files changed, 4 insertions(+), 1 deletion(-)


Index: llvm/include/llvm/CodeGen/SelectionDAG.h
diff -u llvm/include/llvm/CodeGen/SelectionDAG.h:1.64 llvm/include/llvm/CodeGen/SelectionDAG.h:1.65
--- llvm/include/llvm/CodeGen/SelectionDAG.h:1.64	Sat Oct 22 22:40:17 2005
+++ llvm/include/llvm/CodeGen/SelectionDAG.h	Tue Oct 25 16:02:21 2005
@@ -280,7 +280,10 @@
   void SelectNodeTo(SDNode *N, unsigned TargetOpc, MVT::ValueType VT1,
                     MVT::ValueType VT2, SDOperand Op1, SDOperand Op2,
                     SDOperand Op3);
-  
+
+  SDOperand getTargetNode(unsigned Opcode, MVT::ValueType VT) {
+    return getNode(ISD::BUILTIN_OP_END+Opcode, VT);
+  }
   SDOperand getTargetNode(unsigned Opcode, MVT::ValueType VT,
                           SDOperand Op1) {
     return getNode(ISD::BUILTIN_OP_END+Opcode, VT, Op1);





From lattner at cs.uiuc.edu  Tue Oct 25 16:03:25 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue, 25 Oct 2005 16:03:25 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/TargetSelectionDAG.td 
Message-ID: <200510252103.QAA26014@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target:

TargetSelectionDAG.td updated: 1.5 -> 1.6
---
Log message:

Add undef


---
Diffs of the changes:  (+3 -1)

 TargetSelectionDAG.td |    4 +++-
 1 files changed, 3 insertions(+), 1 deletion(-)


Index: llvm/lib/Target/TargetSelectionDAG.td
diff -u llvm/lib/Target/TargetSelectionDAG.td:1.5 llvm/lib/Target/TargetSelectionDAG.td:1.6
--- llvm/lib/Target/TargetSelectionDAG.td:1.5	Thu Oct 20 18:30:37 2005
+++ llvm/lib/Target/TargetSelectionDAG.td	Tue Oct 25 16:03:14 2005
@@ -68,7 +68,8 @@
 
 // Builtin profiles.
 def SDTImm    : SDTypeProfile<1, 0, [SDTCisInt<0>]>;      // for 'imm'.
-def SDTVT     : SDTypeProfile<1, 0, [SDTCisVT<0, OtherVT>]>; // for 'vt'
+def SDTVT     : SDTypeProfile<1, 0, [SDTCisVT<0, OtherVT>]>; // for 'vt'.
+def SDTUNDEF  : SDTypeProfile<1, 0, []>; // for 'undef'.
 def SDTIntBinOp : SDTypeProfile<1, 2, [   // add, and, or, xor, udiv, etc.
   SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>, SDTCisInt<0>
 ]>;
@@ -123,6 +124,7 @@
 
 def imm        : SDNode<"ISD::Constant"  , SDTImm     , [], "ConstantSDNode">;
 def vt         : SDNode<"ISD::VALUETYPE" , SDTVT      , [], "VTSDNode">;
+def undef      : SDNode<"ISD::UNDEF"     , SDTUNDEF   , []>;
 def add        : SDNode<"ISD::ADD"       , SDTIntBinOp   ,
                         [SDNPCommutative, SDNPAssociative]>;
 def sub        : SDNode<"ISD::SUB"       , SDTIntBinOp>;





From lattner at cs.uiuc.edu  Tue Oct 25 16:03:52 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue, 25 Oct 2005 16:03:52 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
	PPCInstrInfo.td 
Message-ID: <200510252103.QAA26073@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/PowerPC:

PPCISelDAGToDAG.cpp updated: 1.121 -> 1.122
PPCInstrInfo.td updated: 1.136 -> 1.137
---
Log message:

autogen undef


---
Diffs of the changes:  (+6 -11)

 PPCISelDAGToDAG.cpp |    8 --------
 PPCInstrInfo.td     |    9 ++++++---
 2 files changed, 6 insertions(+), 11 deletions(-)


Index: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.121 llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.122
--- llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.121	Tue Oct 25 15:55:47 2005
+++ llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp	Tue Oct 25 16:03:41 2005
@@ -844,14 +844,6 @@
   case ISD::CALL:               return SelectCALL(Op);
   case ISD::TAILCALL:           return SelectCALL(Op);
 
-  case ISD::UNDEF:
-    if (N->getValueType(0) == MVT::i32)
-      CurDAG->SelectNodeTo(N, PPC::IMPLICIT_DEF_GPR, MVT::i32);
-    else if (N->getValueType(0) == MVT::f32)
-      CurDAG->SelectNodeTo(N, PPC::IMPLICIT_DEF_F4, MVT::f32);
-    else 
-      CurDAG->SelectNodeTo(N, PPC::IMPLICIT_DEF_F8, MVT::f64);
-    return SDOperand(N, 0);
   case ISD::FrameIndex: {
     int FI = cast<FrameIndexSDNode>(N)->getIndex();
     if (N->hasOneUse()) {


Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td
diff -u llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.136 llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.137
--- llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.136	Tue Oct 25 15:58:43 2005
+++ llvm/lib/Target/PowerPC/PPCInstrInfo.td	Tue Oct 25 16:03:41 2005
@@ -153,9 +153,12 @@
 def ADJCALLSTACKDOWN : Pseudo<(ops u16imm:$amt), "; ADJCALLSTACKDOWN", []>;
 def ADJCALLSTACKUP : Pseudo<(ops u16imm:$amt), "; ADJCALLSTACKUP", []>;
 }
-def IMPLICIT_DEF_GPR : Pseudo<(ops GPRC:$rD), "; $rD = IMPLICIT_DEF_GPRC", []>;
-def IMPLICIT_DEF_F8  : Pseudo<(ops F8RC:$rD), "; %rD = IMPLICIT_DEF_F8", []>;
-def IMPLICIT_DEF_F4  : Pseudo<(ops F4RC:$rD), "; %rD = IMPLICIT_DEF_F4", []>;
+def IMPLICIT_DEF_GPR : Pseudo<(ops GPRC:$rD), "; $rD = IMPLICIT_DEF_GPRC",
+                              [(set GPRC:$rD, (undef))]>;
+def IMPLICIT_DEF_F8  : Pseudo<(ops F8RC:$rD), "; %rD = IMPLICIT_DEF_F8",
+                              [(set F8RC:$rD, (undef))]>;
+def IMPLICIT_DEF_F4  : Pseudo<(ops F4RC:$rD), "; %rD = IMPLICIT_DEF_F4",
+                              [(set F4RC:$rD, (undef))]>;
 
 // SELECT_CC_* - Used to implement the SELECT_CC DAG operation.  Expanded by the
 // scheduler into a branch sequence.





From natebegeman at mac.com  Tue Oct 25 18:47:37 2005
From: natebegeman at mac.com (Nate Begeman)
Date: Tue, 25 Oct 2005 18:47:37 -0500
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp 
Message-ID: <200510252347.SAA27019@zion.cs.uiuc.edu>



Changes in directory llvm/lib/CodeGen/SelectionDAG:

LegalizeDAG.cpp updated: 1.202 -> 1.203
---
Log message:

Allow custom lowered FP_TO_SINT ops in the check for whether a larger
FP_TO_SINT is preferred to a larger FP_TO_UINT.  This seems to be begging
for a TLI.isOperationCustom() helper function.


---
Diffs of the changes:  (+2 -1)

 LegalizeDAG.cpp |    3 ++-
 1 files changed, 2 insertions(+), 1 deletion(-)


Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.202 llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.203
--- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.202	Tue Oct 18 19:06:56 2005
+++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp	Tue Oct 25 18:47:25 2005
@@ -2266,7 +2266,8 @@
     // legal, such as PowerPC.
     if (Node->getOpcode() == ISD::FP_TO_UINT && 
         !TLI.isOperationLegal(ISD::FP_TO_UINT, NVT) &&
-        TLI.isOperationLegal(ISD::FP_TO_SINT, NVT)) {
+        (TLI.isOperationLegal(ISD::FP_TO_SINT, NVT) ||
+         TLI.getOperationAction(ISD::FP_TO_SINT, NVT)==TargetLowering::Custom)){
       Result = DAG.getNode(ISD::FP_TO_SINT, NVT, Tmp1);
     } else {
       Result = DAG.getNode(Node->getOpcode(), NVT, Tmp1);





From natebegeman at mac.com  Tue Oct 25 18:48:48 2005
From: natebegeman at mac.com (Nate Begeman)
Date: Tue, 25 Oct 2005 18:48:48 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelLowering.cpp 
Message-ID: <200510252348.SAA27031@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/PowerPC:

PPCISelLowering.cpp updated: 1.37 -> 1.38
---
Log message:

Correctly Expand or Promote FP_TO_UINT based on the capabilities of the
machine.  This allows us to generate great code for i32 FP_TO_UINT now on
targets with 64 bit extensions.


---
Diffs of the changes:  (+5 -3)

 PPCISelLowering.cpp |    8 +++++---
 1 files changed, 5 insertions(+), 3 deletions(-)


Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.37 llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.38
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.37	Tue Oct 25 15:54:57 2005
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp	Tue Oct 25 18:48:36 2005
@@ -81,9 +81,6 @@
   setOperationAction(ISD::BRCOND,       MVT::Other, Expand);
   setOperationAction(ISD::BRCONDTWOWAY, MVT::Other, Expand);
   
-  // PowerPC does not have FP_TO_UINT
-  setOperationAction(ISD::FP_TO_UINT, MVT::i32, Expand);
-  
   // PowerPC turns FP_TO_SINT into FCTIWZ and some load/stores.
   setOperationAction(ISD::FP_TO_SINT, MVT::i32, Custom);
 
@@ -98,6 +95,11 @@
     // They also have instructions for converting between i64 and fp.
     setOperationAction(ISD::FP_TO_SINT, MVT::i64, Custom);
     setOperationAction(ISD::SINT_TO_FP, MVT::i64, Custom);
+    // To take advantage of the above i64 FP_TO_SINT, promote i32 FP_TO_UINT
+    setOperationAction(ISD::FP_TO_UINT, MVT::i32, Promote);
+  } else {
+    // PowerPC does not have FP_TO_UINT on 32 bit implementations.
+    setOperationAction(ISD::FP_TO_UINT, MVT::i32, Expand);
   }
 
   if (TM.getSubtarget<PPCSubtarget>().has64BitRegs()) {





From natebegeman at mac.com  Tue Oct 25 18:50:14 2005
From: natebegeman at mac.com (Nate Begeman)
Date: Tue, 25 Oct 2005 18:50:14 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/README.txt 
Message-ID: <200510252350.SAA27053@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/PowerPC:

README.txt updated: 1.33 -> 1.34
---
Log message:

Add a note about some bitfield stuff we could be doing better.


---
Diffs of the changes:  (+64 -0)

 README.txt |   64 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 files changed, 64 insertions(+)


Index: llvm/lib/Target/PowerPC/README.txt
diff -u llvm/lib/Target/PowerPC/README.txt:1.33 llvm/lib/Target/PowerPC/README.txt:1.34
--- llvm/lib/Target/PowerPC/README.txt:1.33	Tue Oct 18 01:30:51 2005
+++ llvm/lib/Target/PowerPC/README.txt	Tue Oct 25 18:50:02 2005
@@ -121,3 +121,67 @@
 
 If we exposed the srl & mask ops after the MFCR that we are doing to select
 the correct CR bit, then we could fold the slwi into the rlwinm before it.
+
+===-------------------------------------------------------------------------===
+
+#define  ARRAY_LENGTH  16
+
+union bitfield {
+	struct {
+#ifndef	__ppc__
+		unsigned int                       field0 : 6;
+		unsigned int                       field1 : 6;
+		unsigned int                       field2 : 6;
+		unsigned int                       field3 : 6;
+		unsigned int                       field4 : 3;
+		unsigned int                       field5 : 4;
+		unsigned int                       field6 : 1;
+#else
+		unsigned int                       field6 : 1;
+		unsigned int                       field5 : 4;
+		unsigned int                       field4 : 3;
+		unsigned int                       field3 : 6;
+		unsigned int                       field2 : 6;
+		unsigned int                       field1 : 6;
+		unsigned int                       field0 : 6;
+#endif
+	} bitfields, bits;
+	unsigned int	u32All;
+	signed int	i32All;
+	float	f32All;
+};
+
+
+typedef struct program_t {
+	union bitfield    array[ARRAY_LENGTH];
+    int               size;
+    int               loaded;
+} program;
+
+
+void AdjustBitfields(program* prog, unsigned int fmt1)
+{
+	unsigned int shift = 0;
+	unsigned int texCount = 0;
+	unsigned int i;
+	
+	for (i = 0; i < 8; i++)
+	{
+		prog->array[i].bitfields.field0 = texCount;
+		prog->array[i].bitfields.field1 = texCount + 1;
+		prog->array[i].bitfields.field2 = texCount + 2;
+		prog->array[i].bitfields.field3 = texCount + 3;
+
+		texCount += (fmt1 >> shift) & 0x7;
+		shift    += 3;
+	}
+}
+
+In the loop above, the bitfield adds get generated as 
+(add (shl bitfield, C1), (shl C2, C1)) where C2 is 1, 2 or 3.
+
+Since the input to the (or and, and) is an (add) rather than a (shl), the shift
+doesn't get folded into the rlwimi instruction.  We should ideally see through
+things like this, rather than forcing llvm to generate the equivalent
+
+(shl (add bitfield, C2), C1) with some kind of mask.





From natebegeman at mac.com  Tue Oct 25 18:53:33 2005
From: natebegeman at mac.com (Nate Begeman)
Date: Tue, 25 Oct 2005 18:53:33 -0500
Subject: [llvm-commits] 
	CVS: llvm/test/Regression/CodeGen/PowerPC/fp_to_uint.ll
Message-ID: <200510252353.SAA27072@zion.cs.uiuc.edu>



Changes in directory llvm/test/Regression/CodeGen/PowerPC:

fp_to_uint.ll added (r1.1)
---
Log message:

Add a regression test for the recent fix for FP_TO_UINT lowering in the ppc
backend.


---
Diffs of the changes:  (+9 -0)

 fp_to_uint.ll |    9 +++++++++
 1 files changed, 9 insertions(+)


Index: llvm/test/Regression/CodeGen/PowerPC/fp_to_uint.ll
diff -c /dev/null llvm/test/Regression/CodeGen/PowerPC/fp_to_uint.ll:1.1
*** /dev/null	Tue Oct 25 18:53:32 2005
--- llvm/test/Regression/CodeGen/PowerPC/fp_to_uint.ll	Tue Oct 25 18:53:22 2005
***************
*** 0 ****
--- 1,9 ----
+ ; RUN: llvm-as < %s | llc -march=ppc32 | grep fctiwz | wc -l | grep 1
+ 
+ implementation
+ 
+ ushort %foo(float %a) {
+ entry:
+         %tmp.1 = cast float %a to ushort
+         ret ushort %tmp.1
+ }





From jeffc at jolt-lang.org  Wed Oct 26 00:37:02 2005
From: jeffc at jolt-lang.org (Jeff Cohen)
Date: Wed, 26 Oct 2005 00:37:02 -0500
Subject: [llvm-commits] CVS: llvm/win32/Transforms/Transforms.vcproj 
Message-ID: <200510260537.AAA28961@zion.cs.uiuc.edu>



Changes in directory llvm/win32/Transforms:

Transforms.vcproj updated: 1.14 -> 1.15
---
Log message:

Update Visual Studio projects to reflect moved file.

---
Diffs of the changes:  (+3 -3)

 Transforms.vcproj |    6 +++---
 1 files changed, 3 insertions(+), 3 deletions(-)


Index: llvm/win32/Transforms/Transforms.vcproj
diff -u llvm/win32/Transforms/Transforms.vcproj:1.14 llvm/win32/Transforms/Transforms.vcproj:1.15
--- llvm/win32/Transforms/Transforms.vcproj:1.14	Sun Oct 23 21:57:24 2005
+++ llvm/win32/Transforms/Transforms.vcproj	Wed Oct 26 00:36:51 2005
@@ -241,9 +241,6 @@
 					RelativePath="..\..\lib\Transforms\Scalar\LICM.cpp">
 				</File>
 				<File
-					RelativePath="..\..\lib\Transforms\Scalar\LoopSimplify.cpp">
-				</File>
-				<File
 					RelativePath="..\..\lib\Transforms\Scalar\LoopStrengthReduce.cpp">
 				</File>
 				<File
@@ -333,6 +330,9 @@
 					RelativePath="..\..\lib\Transforms\Utils\Local.cpp">
 				</File>
 				<File
+					RelativePath="..\..\lib\Transforms\Utils\LoopSimplify.cpp">
+				</File>
+				<File
 					RelativePath="..\..\lib\Transforms\Utils\PromoteMemoryToRegister.cpp">
 				</File>
 				<File





From jeffc at jolt-lang.org  Wed Oct 26 00:37:47 2005
From: jeffc at jolt-lang.org (Jeff Cohen)
Date: Wed, 26 Oct 2005 00:37:47 -0500
Subject: [llvm-commits] CVS: llvm/win32/dobison.cmd doflex.cmd 
Message-ID: <200510260537.AAA28991@zion.cs.uiuc.edu>



Changes in directory llvm/win32:

dobison.cmd added (r1.1)
doflex.cmd added (r1.1)
---
Log message:

Eliminate need for bison/flex in Visual Studio builds.

---
Diffs of the changes:  (+41 -0)

 dobison.cmd |   22 ++++++++++++++++++++++
 doflex.cmd  |   19 +++++++++++++++++++
 2 files changed, 41 insertions(+)


Index: llvm/win32/dobison.cmd
diff -c /dev/null llvm/win32/dobison.cmd:1.1
*** /dev/null	Wed Oct 26 00:37:45 2005
--- llvm/win32/dobison.cmd	Wed Oct 26 00:37:35 2005
***************
*** 0 ****
--- 1,22 ----
+ @echo off
+ rem dobison.cmd prefix mode target source
+ rem   prefix - passed to bison as -p<prefix>
+ rem   mode - either debug or release
+ rem   target - generated parser file name without extension
+ rem   source - input to bison
+ 
+ if "%2"=="debug" (set flags=-tvdo) else (set flags=-vdo)
+ 
+ rem Try and run bison.  If it is present, great.
+ bison -p%1 %flags%%3.cpp %4
+ if errorlevel 1 goto error
+ move %3.hpp %3.h
+ goto done
+ 
+ :error
+ echo Bison could not run.  Using pre-generated files.
+ copy %~pn4.cpp %3.cpp
+ copy %~pn4.h %3.h
+ 
+ :done
+ exit 0


Index: llvm/win32/doflex.cmd
diff -c /dev/null llvm/win32/doflex.cmd:1.1
*** /dev/null	Wed Oct 26 00:37:47 2005
--- llvm/win32/doflex.cmd	Wed Oct 26 00:37:35 2005
***************
*** 0 ****
--- 1,19 ----
+ @echo off
+ rem doflex.cmd prefix mode target source
+ rem   mode - either debug or release
+ rem   target - generated parser file name without extension
+ rem   source - input to bison
+ 
+ if "%1"=="debug" (set flags=-t) else (set flags=-t)
+ 
+ rem Try and run flex.  If it is present, great.
+ flex %flags% >%2.cpp %3
+ if errorlevel 1 goto error
+ goto done
+ 
+ :error
+ echo Flex could not run.  Using pre-generated files.
+ copy %~pn3.cpp %2.cpp
+ 
+ :done
+ exit 0





From jeffc at jolt-lang.org  Wed Oct 26 00:37:47 2005
From: jeffc at jolt-lang.org (Jeff Cohen)
Date: Wed, 26 Oct 2005 00:37:47 -0500
Subject: [llvm-commits] CVS: llvm/win32/AsmParser/.cvsignore
	AsmParser.vcproj 
Message-ID: <200510260537.AAA28985@zion.cs.uiuc.edu>



Changes in directory llvm/win32/AsmParser:

.cvsignore added (r1.1)
AsmParser.vcproj updated: 1.5 -> 1.6
---
Log message:

Eliminate need for bison/flex in Visual Studio builds.

---
Diffs of the changes:  (+17 -15)

 .cvsignore       |    4 ++++
 AsmParser.vcproj |   28 +++++++++++++---------------
 2 files changed, 17 insertions(+), 15 deletions(-)


Index: llvm/win32/AsmParser/.cvsignore
diff -c /dev/null llvm/win32/AsmParser/.cvsignore:1.1
*** /dev/null	Wed Oct 26 00:37:45 2005
--- llvm/win32/AsmParser/.cvsignore	Wed Oct 26 00:37:35 2005
***************
*** 0 ****
--- 1,4 ----
+ Lexer.cpp
+ llvmAsmParser.cpp
+ llvmAsmParser.h
+ llvmAsmParser.output


Index: llvm/win32/AsmParser/AsmParser.vcproj
diff -u llvm/win32/AsmParser/AsmParser.vcproj:1.5 llvm/win32/AsmParser/AsmParser.vcproj:1.6
--- llvm/win32/AsmParser/AsmParser.vcproj:1.5	Wed Feb  2 00:33:11 2005
+++ llvm/win32/AsmParser/AsmParser.vcproj	Wed Oct 26 00:37:35 2005
@@ -20,7 +20,7 @@
 			<Tool
 				Name="VCCLCompilerTool"
 				Optimization="0"
-				AdditionalIncludeDirectories="..\..\include;.."
+				AdditionalIncludeDirectories="..\..\include;..;..\..\lib\AsmParser"
 				PreprocessorDefinitions="WIN32;_DEBUG;_LIB;__STDC_LIMIT_MACROS"
 				MinimalRebuild="TRUE"
 				BasicRuntimeChecks="3"
@@ -65,7 +65,7 @@
 			CharacterSet="2">
 			<Tool
 				Name="VCCLCompilerTool"
-				AdditionalIncludeDirectories="..\..\include;.."
+				AdditionalIncludeDirectories="..\..\include;..;..\..\lib\AsmParser"
 				PreprocessorDefinitions="WIN32;NDEBUG;_LIB;__STDC_LIMIT_MACROS"
 				RuntimeLibrary="2"
 				ForceConformanceInForLoopScope="TRUE"
@@ -114,16 +114,16 @@
 					<Tool
 						Name="VCCustomBuildTool"
 						Description="Flexing $(InputFileName)"
-						CommandLine="..\tools\flex -t &gt;$(InputDir)$(InputName).cpp $(InputPath)"
-						Outputs="$(InputDir)$(InputName).cpp"/>
+						CommandLine="..\doflex.cmd debug $(InputName) $(InputPath)"
+						Outputs="$(InputName).cpp"/>
 				</FileConfiguration>
 				<FileConfiguration
 					Name="Release|Win32">
 					<Tool
 						Name="VCCustomBuildTool"
 						Description="Flexing $(InputFileName)"
-						CommandLine="..\tools\flex -t &gt;$(InputDir)$(InputName).cpp $(InputPath)"
-						Outputs="$(InputDir)$(InputName).cpp"/>
+						CommandLine="..\doflex.cmd release $(InputName) $(InputPath)"
+						Outputs="$(InputName).cpp"/>
 				</FileConfiguration>
 			</File>
 			<File
@@ -133,20 +133,18 @@
 					<Tool
 						Name="VCCustomBuildTool"
 						Description="Bisoning $(InputFileName)"
-						CommandLine="..\tools\bison -pllvmAsm -tvdo$(InputDir)$(InputName).cpp $(InputPath)
-move $(InputDir)$(InputName).hpp $(InputDir)$(InputName).h
+						CommandLine="..\dobison.cmd llvmAsm debug $(InputName) $(InputPath)
 "
-						Outputs="$(InputDir)$(InputName).cpp;$(InputDir)$(InputName).h"/>
+						Outputs="$(InputName).cpp;$(InputName).h"/>
 				</FileConfiguration>
 				<FileConfiguration
 					Name="Release|Win32">
 					<Tool
 						Name="VCCustomBuildTool"
 						Description="Bisoning $(InputFileName)"
-						CommandLine="..\tools\bison -pllvmAsm -vdo$(InputDir)$(InputName).cpp $(InputPath)
-move $(InputDir)$(InputName).hpp $(InputDir)$(InputName).h
+						CommandLine="..\dobison.cmd llvmAsm release $(InputName) $(InputPath)
 "
-						Outputs="$(InputDir)$(InputName).cpp;$(InputDir)$(InputName).h"/>
+						Outputs="$(InputName).cpp;$(InputName).h"/>
 				</FileConfiguration>
 			</File>
 			<File
@@ -168,13 +166,13 @@
 			Name="Generated Files"
 			Filter="">
 			<File
-				RelativePath="..\..\lib\AsmParser\Lexer.cpp">
+				RelativePath="Lexer.cpp">
 			</File>
 			<File
-				RelativePath="..\..\lib\AsmParser\llvmAsmParser.cpp">
+				RelativePath="llvmAsmParser.cpp">
 			</File>
 			<File
-				RelativePath="..\..\lib\AsmParser\llvmAsmParser.h">
+				RelativePath="llvmAsmParser.h">
 			</File>
 		</Filter>
 	</Files>





From jeffc at jolt-lang.org  Wed Oct 26 00:37:47 2005
From: jeffc at jolt-lang.org (Jeff Cohen)
Date: Wed, 26 Oct 2005 00:37:47 -0500
Subject: [llvm-commits] CVS: llvm/win32/TableGen/.cvsignore TableGen.vcproj 
Message-ID: <200510260537.AAA28997@zion.cs.uiuc.edu>



Changes in directory llvm/win32/TableGen:

.cvsignore added (r1.1)
TableGen.vcproj updated: 1.16 -> 1.17
---
Log message:

Eliminate need for bison/flex in Visual Studio builds.

---
Diffs of the changes:  (+17 -17)

 .cvsignore      |    4 ++++
 TableGen.vcproj |   30 +++++++++++++-----------------
 2 files changed, 17 insertions(+), 17 deletions(-)


Index: llvm/win32/TableGen/.cvsignore
diff -c /dev/null llvm/win32/TableGen/.cvsignore:1.1
*** /dev/null	Wed Oct 26 00:37:45 2005
--- llvm/win32/TableGen/.cvsignore	Wed Oct 26 00:37:35 2005
***************
*** 0 ****
--- 1,4 ----
+ FileLexer.cpp
+ FileParser.cpp
+ FileParser.h
+ FileParser.output


Index: llvm/win32/TableGen/TableGen.vcproj
diff -u llvm/win32/TableGen/TableGen.vcproj:1.16 llvm/win32/TableGen/TableGen.vcproj:1.17
--- llvm/win32/TableGen/TableGen.vcproj:1.16	Sun Oct 23 10:21:52 2005
+++ llvm/win32/TableGen/TableGen.vcproj	Wed Oct 26 00:37:35 2005
@@ -19,7 +19,7 @@
 			<Tool
 				Name="VCCLCompilerTool"
 				Optimization="0"
-				AdditionalIncludeDirectories="..\..\include;.."
+				AdditionalIncludeDirectories="..\..\include;..;..\..\utils\tablegen"
 				PreprocessorDefinitions="WIN32;_DEBUG;_CONSOLE;__STDC_LIMIT_MACROS"
 				MinimalRebuild="TRUE"
 				BasicRuntimeChecks="3"
@@ -72,7 +72,7 @@
 			CharacterSet="2">
 			<Tool
 				Name="VCCLCompilerTool"
-				AdditionalIncludeDirectories="..\..\include;.."
+				AdditionalIncludeDirectories="..\..\include;..;..\..\utils\tablegen"
 				PreprocessorDefinitions="WIN32;NDEBUG;_CONSOLE;__STDC_LIMIT_MACROS"
 				RuntimeLibrary="2"
 				ForceConformanceInForLoopScope="TRUE"
@@ -142,18 +142,16 @@
 					<Tool
 						Name="VCCustomBuildTool"
 						Description="Flexing $(InputFileName)"
-						CommandLine="..\tools\flex -t &gt;$(InputDir)$(InputName).cpp $(InputPath)
-"
-						Outputs="$(InputDir)$(InputName).cpp"/>
+						CommandLine="..\doflex.cmd debug $(InputName) $(InputPath)"
+						Outputs="$(InputName).cpp"/>
 				</FileConfiguration>
 				<FileConfiguration
 					Name="Release|Win32">
 					<Tool
 						Name="VCCustomBuildTool"
 						Description="Flexing $(InputFileName)"
-						CommandLine="..\tools\flex -t &gt;$(InputDir)$(InputName).cpp $(InputPath)
-"
-						Outputs="$(InputDir)$(InputName).cpp"/>
+						CommandLine="..\doflex.cmd release $(InputName) $(InputPath)"
+						Outputs="$(InputName).cpp"/>
 				</FileConfiguration>
 			</File>
 			<File
@@ -163,20 +161,18 @@
 					<Tool
 						Name="VCCustomBuildTool"
 						Description="Bisoning $(InputFileName)"
-						CommandLine="..\tools\bison -pFile -tvdo$(InputDir)$(InputName).cpp $(InputPath)
-move $(InputDir)$(InputName).hpp $(InputDir)$(InputName).h
+						CommandLine="..\dobison.cmd File debug $(InputName) $(InputPath)
 "
-						Outputs="$(InputDir)$(InputName).cpp;$(InputDir)$(InputName).h"/>
+						Outputs="$(InputName).cpp;$(InputName).h"/>
 				</FileConfiguration>
 				<FileConfiguration
 					Name="Release|Win32">
 					<Tool
 						Name="VCCustomBuildTool"
 						Description="Bisoning $(InputFileName)"
-						CommandLine="..\tools\bison -pFile -vdo$(InputDir)$(InputName).cpp $(InputPath)
-move $(InputDir)$(InputName).hpp $(InputDir)$(InputName).h
+						CommandLine="..\dobison.cmd File release $(InputName) $(InputPath)
 "
-						Outputs="$(InputDir)$(InputName).cpp;$(InputDir)$(InputName).h"/>
+						Outputs="$(InputName).cpp;$(InputName).h"/>
 				</FileConfiguration>
 			</File>
 			<File
@@ -240,7 +236,7 @@
 			Name="Generated Files"
 			Filter="">
 			<File
-				RelativePath="..\..\utils\TableGen\FileLexer.cpp">
+				RelativePath="FileLexer.cpp">
 				<FileConfiguration
 					Name="Debug|Win32">
 					<Tool
@@ -255,7 +251,7 @@
 				</FileConfiguration>
 			</File>
 			<File
-				RelativePath="..\..\utils\TableGen\fileparser.cpp">
+				RelativePath="fileparser.cpp">
 				<FileConfiguration
 					Name="Debug|Win32">
 					<Tool
@@ -270,7 +266,7 @@
 				</FileConfiguration>
 			</File>
 			<File
-				RelativePath="..\..\utils\TableGen\fileparser.h">
+				RelativePath="fileparser.h">
 			</File>
 		</Filter>
 	</Files>





From jeffc at jolt-lang.org  Wed Oct 26 09:49:10 2005
From: jeffc at jolt-lang.org (Jeff Cohen)
Date: Wed, 26 Oct 2005 09:49:10 -0500
Subject: [llvm-commits] CVS: llvm/include/llvm/ADT/hash_map.in hash_set.in
	iterator.in 
Message-ID: <200510261449.JAA15124@zion.cs.uiuc.edu>



Changes in directory llvm/include/llvm/ADT:

hash_map.in updated: 1.9 -> 1.10
hash_set.in updated: 1.6 -> 1.7
iterator.in updated: 1.3 -> 1.4
---
Log message:

Eliminate use of sed in Visual Studio builds.

---
Diffs of the changes:  (+27 -7)

 hash_map.in |   18 +++++++++++++-----
 hash_set.in |   10 ++++++++--
 iterator.in |    6 ++++++
 3 files changed, 27 insertions(+), 7 deletions(-)


Index: llvm/include/llvm/ADT/hash_map.in
diff -u llvm/include/llvm/ADT/hash_map.in:1.9 llvm/include/llvm/ADT/hash_map.in:1.10
--- llvm/include/llvm/ADT/hash_map.in:1.9	Wed Aug 24 09:03:07 2005
+++ llvm/include/llvm/ADT/hash_map.in	Wed Oct 26 09:48:53 2005
@@ -24,7 +24,7 @@
 //  3.0.4       std      ext/hash_map
 //  3.1      __gnu_cxx   ext/hash_map
 //  HP aCC6     std      stdex/rw/hashm*ap.h
-//
+//  MS VC++    stdext      hash_map
 
 #undef HAVE_GNU_EXT_HASH_MAP
 #undef HAVE_STD_EXT_HASH_MAP
@@ -63,6 +63,14 @@
 #  define HASH_NAMESPACE std
 # endif
 
+// Support Microsoft VC++.
+#elif defined(_MSC_VER)
+# include <hash_map>
+# ifndef HASH_NAMESPACE
+#  define HASH_NAMESPACE stdext
+   using std::_Distance;
+# endif
+
 // Give a warning if we couldn't find it, instead of (or in addition to)
 // randomly doing something dumb.
 #else
@@ -100,10 +108,6 @@
 } // end HASH_NAMESPACE;
 #endif
 
-using HASH_NAMESPACE::hash_map;
-using HASH_NAMESPACE::hash_multimap;
-using HASH_NAMESPACE::hash;
-
 // Include vector because ext/hash_map includes stl_vector.h and leaves
 // out specializations like stl_bvector.h, causing link conflicts.
 #include <vector>
@@ -137,6 +141,10 @@
 
 #endif
 
+using HASH_NAMESPACE::hash_map;
+using HASH_NAMESPACE::hash_multimap;
+using HASH_NAMESPACE::hash;
+
 #include "llvm/ADT/HashExtras.h"
 
 #endif


Index: llvm/include/llvm/ADT/hash_set.in
diff -u llvm/include/llvm/ADT/hash_set.in:1.6 llvm/include/llvm/ADT/hash_set.in:1.7
--- llvm/include/llvm/ADT/hash_set.in:1.6	Wed Aug 24 05:57:30 2005
+++ llvm/include/llvm/ADT/hash_set.in	Wed Oct 26 09:48:53 2005
@@ -25,7 +25,7 @@
 //  3.0.4       std      ext/hash_set
 //  3.1      __gnu_cxx   ext/hash_set
 //  HP aCC6     std      stdex/rw/hashset.h
-//
+//  MS VC++    stdext      hash_map
 
 #undef HAVE_GNU_EXT_HASH_SET
 #undef HAVE_STD_EXT_HASH_SET
@@ -64,6 +64,13 @@
 #  define HASH_NAMESPACE std
 # endif
 
+// Support Microsoft VC++.
+#elif defined(_MSC_VER)
+# include <hash_set>
+# ifndef HASH_NAMESPACE
+#  define HASH_NAMESPACE stdext
+# endif
+
 // Give a warning if we couldn't find it, instead of (or in addition to)
 // randomly doing something dumb.
 #else
@@ -94,7 +101,6 @@
 #endif
 
 using HASH_NAMESPACE::hash_set;
-using HASH_NAMESPACE::hash;
 
 // Include vector because ext/hash_set includes stl_vector.h and leaves
 // out specializations like stl_bvector.h, causing link conflicts.


Index: llvm/include/llvm/ADT/iterator.in
diff -u llvm/include/llvm/ADT/iterator.in:1.3 llvm/include/llvm/ADT/iterator.in:1.4
--- llvm/include/llvm/ADT/iterator.in:1.3	Fri Sep 24 16:19:05 2004
+++ llvm/include/llvm/ADT/iterator.in	Wed Oct 26 09:48:53 2005
@@ -34,6 +34,12 @@
 #undef HAVE_STD_ITERATOR
 #undef HAVE_FWD_ITERATOR
 
+#ifdef _MSC_VER
+#  define HAVE_BI_ITERATOR 0
+#  define HAVE_STD_ITERATOR 1
+#  define HAVE_FWD_ITERATOR 0
+#endif
+
 #if !HAVE_BI_ITERATOR
 # if HAVE_STD_ITERATOR
 /// If the bidirectional iterator is not defined, we attempt to define it in





From jeffc at jolt-lang.org  Wed Oct 26 09:49:10 2005
From: jeffc at jolt-lang.org (Jeff Cohen)
Date: Wed, 26 Oct 2005 09:49:10 -0500
Subject: [llvm-commits] CVS: llvm/include/llvm/Support/DataTypes.h.in 
Message-ID: <200510261449.JAA15122@zion.cs.uiuc.edu>



Changes in directory llvm/include/llvm/Support:

DataTypes.h.in updated: 1.21 -> 1.22
---
Log message:

Eliminate use of sed in Visual Studio builds.

---
Diffs of the changes:  (+1 -0)

 DataTypes.h.in |    1 +
 1 files changed, 1 insertion(+)


Index: llvm/include/llvm/Support/DataTypes.h.in
diff -u llvm/include/llvm/Support/DataTypes.h.in:1.21 llvm/include/llvm/Support/DataTypes.h.in:1.22
--- llvm/include/llvm/Support/DataTypes.h.in:1.21	Sat Oct 22 23:37:19 2005
+++ llvm/include/llvm/Support/DataTypes.h.in	Wed Oct 26 09:48:53 2005
@@ -67,6 +67,7 @@
 // Visual C++ doesn't provide standard integer headers, but it does provide
 // built-in data types.
 #include <stddef.h>
+#include <sys/types.h>
 typedef __int64 int64_t;
 typedef unsigned __int64 uint64_t;
 typedef signed int int32_t;





From jeffc at jolt-lang.org  Wed Oct 26 09:49:10 2005
From: jeffc at jolt-lang.org (Jeff Cohen)
Date: Wed, 26 Oct 2005 09:49:10 -0500
Subject: [llvm-commits] CVS: llvm/win32/Configure/Configure.vcproj 
Message-ID: <200510261449.JAA15123@zion.cs.uiuc.edu>



Changes in directory llvm/win32/Configure:

Configure.vcproj updated: 1.8 -> 1.9
---
Log message:

Eliminate use of sed in Visual Studio builds.

---
Diffs of the changes:  (+22 -10)

 Configure.vcproj |   32 ++++++++++++++++++++++----------
 1 files changed, 22 insertions(+), 10 deletions(-)


Index: llvm/win32/Configure/Configure.vcproj
diff -u llvm/win32/Configure/Configure.vcproj:1.8 llvm/win32/Configure/Configure.vcproj:1.9
--- llvm/win32/Configure/Configure.vcproj:1.8	Tue Mar 15 23:49:58 2005
+++ llvm/win32/Configure/Configure.vcproj	Wed Oct 26 09:48:53 2005
@@ -74,8 +74,24 @@
 					<Tool
 						Name="VCCustomBuildTool"
 						Description="Generating $(SolutionDir)llvm\Config\config.h"
-						CommandLine="..\tools\sed &lt;$(InputPath) &gt;$(ProjectDir)..\llvm\Config\config.h &quot;s/#undef PACKAGE_NAME/#define PACKAGE_NAME \&quot;LLVM (win32 vc7.1)\&quot;/;s/#undef PACKAGE_VERSION/#define PACKAGE_VERSION 1.4/;s/#undef HAVE_WINDOWS_H/#define HAVE_WINDOWS_H 1/;s/#undef HAVE_LIMITS_H/#define HAVE_LIMITS_H 1/;s/#undef HAVE_SYS_STAT_H/#define HAVE_SYS_STAT_H 1/;s/#undef HAVE_STDLIB_H/#define HAVE_STDLIB_H 1/;s/#undef HAVE_STDIO_H/#define HAVE_STDIO_H 1/;s/#undef HAVE_STRING_H/#define HAVE_STRING_H 1/;s/#undef SHLIBEXT/#define SHLIBEXT \&quot;.lib\&quot;/;s/#undef error_t/#define error_t int/;s/#undef HAVE_ERRNO_H/#define HAVE_ERRNO_H 1/;s/#undef LTDL_DLOPEN_DEPLIBS/#define LTDL_DLOPEN_DEPLIBS 1/;s/#undef LTDL_OBJDIR/#define LTDL_OBJDIR \&quot;_libs\&quot;/;s/#undef LTDL_SHLIBPATH_VAR/#define LTDL_SHLIBPATH_VAR \&quot;PATH\&quot;/;s/#undef LTDL_SHLIB_EXT/#define LTDL_SHLIB_EXT \&quot;.dll\&quot;/;s/#undef LTDL_SYSSEARCHPATH/#define LTDL_SYSSEARCHPATH \&quot;\&qu!
 ot;/;s/#undef LLVM_ON_WIN32/#define LLVM_ON_WIN32 1/;&quot;
-"
+						CommandLine="copy $(InputPath) $(ProjectDir)..\llvm\Config\config.h
+echo #define PACKAGE_NAME &quot;LLVM (win32 vc7.1)&quot; &gt;&gt;$(ProjectDir)..\llvm\Config\config.h
+echo #define PACKAGE_VERSION 1.4 &gt;&gt;$(ProjectDir)..\llvm\Config\config.h
+echo #define HAVE_WINDOWS_H 1 &gt;&gt;$(ProjectDir)..\llvm\Config\config.h
+echo #define HAVE_LIMITS_H 1 &gt;&gt;$(ProjectDir)..\llvm\Config\config.h
+echo #define HAVE_SYS_STAT_H 1 &gt;&gt;$(ProjectDir)..\llvm\Config\config.h
+echo #define HAVE_STDLIB_H 1 &gt;&gt;$(ProjectDir)..\llvm\Config\config.h
+echo #define HAVE_STDIO_H 1 &gt;&gt;$(ProjectDir)..\llvm\Config\config.h
+echo #define HAVE_STRING_H 1 &gt;&gt;$(ProjectDir)..\llvm\Config\config.h
+echo #define SHLIBEXT &quot;.lib&quot; &gt;&gt;$(ProjectDir)..\llvm\Config\config.h
+echo #define error_t int &gt;&gt;$(ProjectDir)..\llvm\Config\config.h
+echo #define HAVE_ERRNO_H 1 &gt;&gt;$(ProjectDir)..\llvm\Config\config.h
+echo #define LTDL_DLOPEN_DEPLIBS 1 &gt;&gt;$(ProjectDir)..\llvm\Config\config.h
+echo #define LTDL_OBJDIR &quot;_libs&quot; &gt;&gt;$(ProjectDir)..\llvm\Config\config.h
+echo #define LTDL_SHLIBPATH_VAR &quot;PATH&quot; &gt;&gt;$(ProjectDir)..\llvm\Config\config.h
+echo #define LTDL_SHLIB_EXT &quot;.dll&quot; &gt;&gt;$(ProjectDir)..\llvm\Config\config.h
+echo #define LTDL_SYSSEARCHPATH &quot;&quot; &gt;&gt;$(ProjectDir)..\llvm\Config\config.h
+echo #define LLVM_ON_WIN32 1 &gt;&gt;$(ProjectDir)..\llvm\Config\config.h"
 						Outputs="$(ProjectDir)..\llvm\Config\config.h"/>
 				</FileConfiguration>
 			</File>
@@ -86,8 +102,7 @@
 					<Tool
 						Name="VCCustomBuildTool"
 						Description="Generating $(SolutionDir)llvm\Support\DataTypes.h"
-						CommandLine="..\tools\sed &lt;$(InputPath) &gt;$(ProjectDir)..\llvm\Support\DataTypes.h &quot;s/#undef HAVE_SYS_TYPES_H/#define HAVE_SYS_TYPES_H 1/;s/#undef HAVE_INTTYPES_H/#define HAVE_INTTYPES_H 1/;s/#undef HAVE_STDINT_H/#define HAVE_STD_INT_H 1/&quot;
-"
+            CommandLine="copy $(InputPath) $(ProjectDir)..\llvm\Support\DataTypes.h"
 						Outputs="$(ProjectDir)..\llvm\Support\DataTypes.h"/>
 				</FileConfiguration>
 			</File>
@@ -98,8 +113,7 @@
 					<Tool
 						Name="VCCustomBuildTool"
 						Description="Generating $(SolutionDir)llvm\ADT\hash_map"
-						CommandLine="..\tools\sed &lt;$(InputPath) &gt;$(ProjectDir)..\llvm\ADT\hash_map &quot;s/#undef HAVE_GLOBAL_HASH_MAP/#define HAVE_GLOBAL_HASH_MAP 1/;/using HASH_NAMESPACE\:\:hash;.*$/{D};s/define HASH_NAMESPACE std/define HASH_NAMESPACE stdext\nusing std::_Distance;/&quot;
-"
+            CommandLine="copy $(InputPath) $(ProjectDir)..\llvm\ADT\hash_map"
 						Outputs="$(ProjectDir)..\llvm\ADT\hash_map"/>
 				</FileConfiguration>
 			</File>
@@ -110,8 +124,7 @@
 					<Tool
 						Name="VCCustomBuildTool"
 						Description="Generating $(SolutionDir)llvm\ADT\hash_set"
-						CommandLine="..\tools\sed &lt;$(InputPath) &gt;$(ProjectDir)..\llvm\ADT\hash_set &quot;s/#undef HAVE_GLOBAL_HASH_SET/#define HAVE_GLOBAL_HASH_SET 1/;/using HASH_NAMESPACE\:\:hash;.*$/{D};/#include.*HashExtras.*$/{D};s/define HASH_NAMESPACE std/define HASH_NAMESPACE stdext/&quot;
-"
+            CommandLine="copy $(InputPath) $(ProjectDir)..\llvm\ADT\hash_set"
 						Outputs="$(ProjectDir)..\llvm\ADT\hash_set"/>
 				</FileConfiguration>
 			</File>
@@ -122,8 +135,7 @@
 					<Tool
 						Name="VCCustomBuildTool"
 						Description="Generating $(SolutionDir)llvm\ADT\iterator"
-						CommandLine="..\tools\sed &lt;$(InputPath) &gt;$(ProjectDir)..\llvm\ADT\iterator &quot;s/#undef HAVE_BI_ITERATOR/#define HAVE_BI_ITERATOR 0/;s/#undef HAVE_STD_ITERATOR/#define HAVE_STD_ITERATOR 1/;s/#undef HAVE_FWD_ITERATOR/#define HAVE_FWD_ITERATOR 0/&quot;
-"
+            CommandLine="copy $(InputPath) $(ProjectDir)..\llvm\ADT\iterator"
 						Outputs="$(ProjectDir)..\llvm\ADT\iterator"/>
 				</FileConfiguration>
 			</File>





From jeffc at jolt-lang.org  Wed Oct 26 10:02:33 2005
From: jeffc at jolt-lang.org (Jeff Cohen)
Date: Wed, 26 Oct 2005 10:02:33 -0500
Subject: [llvm-commits] CVS: llvm/include/llvm/ADT/hash_set.in 
Message-ID: <200510261502.KAA15286@zion.cs.uiuc.edu>



Changes in directory llvm/include/llvm/ADT:

hash_set.in updated: 1.7 -> 1.8
---
Log message:

Fix comment.

---
Diffs of the changes:  (+1 -1)

 hash_set.in |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/include/llvm/ADT/hash_set.in
diff -u llvm/include/llvm/ADT/hash_set.in:1.7 llvm/include/llvm/ADT/hash_set.in:1.8
--- llvm/include/llvm/ADT/hash_set.in:1.7	Wed Oct 26 09:48:53 2005
+++ llvm/include/llvm/ADT/hash_set.in	Wed Oct 26 10:02:21 2005
@@ -25,7 +25,7 @@
 //  3.0.4       std      ext/hash_set
 //  3.1      __gnu_cxx   ext/hash_set
 //  HP aCC6     std      stdex/rw/hashset.h
-//  MS VC++    stdext      hash_map
+//  MS VC++    stdext      hash_set
 
 #undef HAVE_GNU_EXT_HASH_SET
 #undef HAVE_STD_EXT_HASH_SET





From criswell at cs.uiuc.edu  Wed Oct 26 10:07:06 2005
From: criswell at cs.uiuc.edu (John Criswell)
Date: Wed, 26 Oct 2005 10:07:06 -0500
Subject: [llvm-commits] 
	CVS: llvm-test/MultiSource/Applications/hexxagon/bitboard64.h
Message-ID: <200510261507.KAA29455@choi.cs.uiuc.edu>



Changes in directory llvm-test/MultiSource/Applications/hexxagon:

bitboard64.h updated: 1.2 -> 1.3
---
Log message:

Add sys/types.h, which seems to fix a silly bug in Apple's netinet/in.h
header file where they don't define in_addr_t.


---
Diffs of the changes:  (+1 -0)

 bitboard64.h |    1 +
 1 files changed, 1 insertion(+)


Index: llvm-test/MultiSource/Applications/hexxagon/bitboard64.h
diff -u llvm-test/MultiSource/Applications/hexxagon/bitboard64.h:1.2 llvm-test/MultiSource/Applications/hexxagon/bitboard64.h:1.3
--- llvm-test/MultiSource/Applications/hexxagon/bitboard64.h:1.2	Thu Aug  4 15:05:30 2005
+++ llvm-test/MultiSource/Applications/hexxagon/bitboard64.h	Wed Oct 26 10:06:47 2005
@@ -23,6 +23,7 @@
 #ifndef _BITBOARD64_H
 #define _BITBOARD64_H
 
+#include <sys/types.h>
 #include <netinet/in.h>
 #include <stdio.h>
 #include <stdint.h>





From criswell at cs.uiuc.edu  Wed Oct 26 10:34:58 2005
From: criswell at cs.uiuc.edu (John Criswell)
Date: Wed, 26 Oct 2005 10:34:58 -0500
Subject: [llvm-commits] 
	CVS: llvm-test/MultiSource/Applications/hexxagon/hexxagonmove.cpp
Message-ID: <200510261534.KAA29676@choi.cs.uiuc.edu>



Changes in directory llvm-test/MultiSource/Applications/hexxagon:

hexxagonmove.cpp updated: 1.2 -> 1.3
---
Log message:

Darwin (__APPLE__) uses gettimeofday.
This fixes compilation on MacOS X.


---
Diffs of the changes:  (+2 -2)

 hexxagonmove.cpp |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)


Index: llvm-test/MultiSource/Applications/hexxagon/hexxagonmove.cpp
diff -u llvm-test/MultiSource/Applications/hexxagon/hexxagonmove.cpp:1.2 llvm-test/MultiSource/Applications/hexxagon/hexxagonmove.cpp:1.3
--- llvm-test/MultiSource/Applications/hexxagon/hexxagonmove.cpp:1.2	Mon Mar  7 10:41:13 2005
+++ llvm-test/MultiSource/Applications/hexxagon/hexxagonmove.cpp	Wed Oct 26 10:34:35 2005
@@ -25,7 +25,7 @@
 
 #include <iostream>
 #include <stdlib.h>
-#ifdef __FreeBSD__
+#if defined(__FreeBSD__) || defined(__APPLE__)
 #include <sys/time.h>
 #else
 #include <sys/timeb.h>
@@ -87,7 +87,7 @@
 
 int getTime()
 {
-#ifdef __FreeBSD__
+#if defined(__FreeBSD__) || defined(__APPLE__)
 	struct timeval tv;
 
 	gettimeofday(&tv, NULL);





From lattner at cs.uiuc.edu  Wed Oct 26 11:45:35 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed, 26 Oct 2005 11:45:35 -0500
Subject: [llvm-commits] CVS: llvm-test/TEST.nightly.Makefile
	TEST.nightly.report 
Message-ID: <200510261645.LAA15730@zion.cs.uiuc.edu>



Changes in directory llvm-test:

TEST.nightly.Makefile updated: 1.41 -> 1.42
TEST.nightly.report updated: 1.36 -> 1.37
---
Log message:

remove a column from the nightly tester that isn't what it claims to be


---
Diffs of the changes:  (+0 -4)

 TEST.nightly.Makefile |    3 ---
 TEST.nightly.report   |    1 -
 2 files changed, 4 deletions(-)


Index: llvm-test/TEST.nightly.Makefile
diff -u llvm-test/TEST.nightly.Makefile:1.41 llvm-test/TEST.nightly.Makefile:1.42
--- llvm-test/TEST.nightly.Makefile:1.41	Tue Feb  8 13:35:21 2005
+++ llvm-test/TEST.nightly.Makefile	Wed Oct 26 11:45:24 2005
@@ -117,9 +117,6 @@
 	  printf "TEST-RESULT-jit-comptime: " >> $@;\
 	  grep "Total Execution Time" Output/$*.out-jit.info >> $@;\
 	  echo >> $@;\
-	  printf "TEST-RESULT-jit-machcode: " >> $@;\
-	  grep "bytes of machine code compiled" Output/$*.out-jit.info >> $@;\
-	  echo >> $@;\
 	else  \
 	  echo "TEST-FAIL: jit $(RELDIR)/$*" >> $@;\
 	fi


Index: llvm-test/TEST.nightly.report
diff -u llvm-test/TEST.nightly.report:1.36 llvm-test/TEST.nightly.report:1.37
--- llvm-test/TEST.nightly.report:1.36	Tue Apr  5 13:51:46 2005
+++ llvm-test/TEST.nightly.report	Wed Oct 26 11:45:24 2005
@@ -60,7 +60,6 @@
  ["LLC<br>compile" , "TEST-RESULT-llc: .*$WallTimeRE"],
  ["LLC-BETA<br>compile" , "TEST-RESULT-llc-beta: .*$WallTimeRE"],
  ["JIT<br>codegen" , "TEST-RESULT-jit-comptime: .*$WallTimeRE"],
- ["Machine<br>code", 'TEST-RESULT-jit-machcode: *([0-9]+).*bytes of machine code'],
  [],
  ["GCC"      , 'TEST-RESULT-nat-time: program\s*([.0-9m:]+)', \&FormatTime],
  ["CBE"      , 'TEST-RESULT-cbe-time: program\s*([.0-9m:]+)', \&FormatTime],





From lattner at cs.uiuc.edu  Wed Oct 26 11:59:48 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed, 26 Oct 2005 11:59:48 -0500
Subject: [llvm-commits] CVS: llvm/utils/TableGen/DAGISelEmitter.cpp 
Message-ID: <200510261659.LAA15874@zion.cs.uiuc.edu>



Changes in directory llvm/utils/TableGen:

DAGISelEmitter.cpp updated: 1.66 -> 1.67
---
Log message:

Add support for CondCode's


---
Diffs of the changes:  (+14 -4)

 DAGISelEmitter.cpp |   18 ++++++++++++++----
 1 files changed, 14 insertions(+), 4 deletions(-)


Index: llvm/utils/TableGen/DAGISelEmitter.cpp
diff -u llvm/utils/TableGen/DAGISelEmitter.cpp:1.66 llvm/utils/TableGen/DAGISelEmitter.cpp:1.67
--- llvm/utils/TableGen/DAGISelEmitter.cpp:1.66	Tue Oct 25 15:35:14 2005
+++ llvm/utils/TableGen/DAGISelEmitter.cpp	Wed Oct 26 11:59:37 2005
@@ -291,8 +291,13 @@
     return true;
   }      
 
-  TP.error("Type inference contradiction found in node " + 
-           getOperator()->getName() + "!");
+  if (isLeaf()) {
+    dump();
+    TP.error("Type inference contradiction found in node!");
+  } else {
+    TP.error("Type inference contradiction found in node " + 
+             getOperator()->getName() + "!");
+  }
   return true; // unreachable
 }
 
@@ -466,8 +471,8 @@
     // TODO: if a register appears in exactly one regclass, we could use that
     // type info.
     return MVT::isUnknown;
-  } else if (R->isSubClassOf("ValueType")) {
-    // Using a VTSDNode.
+  } else if (R->isSubClassOf("ValueType") || R->isSubClassOf("CondCode")) {
+    // Using a VTSDNode or CondCodeSDNode.
     return MVT::Other;
   } else if (R->getName() == "node") {
     // Placeholder.
@@ -1582,6 +1587,11 @@
           OS << "      if (cast<VTSDNode>(" << RootName << i << ")->getVT() != "
           << "MVT::" << LeafRec->getName() << ") goto P" << PatternNo
           << "Fail;\n";
+        } else if (LeafRec->isSubClassOf("CondCode")) {
+          // Make sure this is the specified cond code.
+          OS << "      if (cast<CondCodeSDNode>(" << RootName << i
+             << ")->get() != " << "MVT::" << LeafRec->getName()
+             << ") goto P" << PatternNo << "Fail;\n";
         } else {
           Child->dump();
           assert(0 && "Unknown leaf type!");





From lattner at cs.uiuc.edu  Wed Oct 26 12:00:36 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed, 26 Oct 2005 12:00:36 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/TargetSelectionDAG.td 
Message-ID: <200510261700.MAA15914@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target:

TargetSelectionDAG.td updated: 1.6 -> 1.7
---
Log message:

Add nodes for CondCodeSDNode and setcc, and add a bunch of pattern fragments
to make it easy to use them.  This lets you write patterns like:

(set PRRC:$rd, (setne GPRC:$rS, imm:$SH))

and stuff.



---
Diffs of the changes:  (+64 -0)

 TargetSelectionDAG.td |   64 ++++++++++++++++++++++++++++++++++++++++++++++++++
 1 files changed, 64 insertions(+)


Index: llvm/lib/Target/TargetSelectionDAG.td
diff -u llvm/lib/Target/TargetSelectionDAG.td:1.6 llvm/lib/Target/TargetSelectionDAG.td:1.7
--- llvm/lib/Target/TargetSelectionDAG.td:1.6	Tue Oct 25 16:03:14 2005
+++ llvm/lib/Target/TargetSelectionDAG.td	Wed Oct 26 12:00:25 2005
@@ -99,6 +99,10 @@
   SDTCisVTSmallerThanOp<2, 1>
 ]>;
 
+def SDTSetCC : SDTypeProfile<1, 3, [ // setcc
+  SDTCisInt<0>, SDTCisSameAs<1, 2>, SDTCisVT<3, OtherVT>
+]>;
+
 //===----------------------------------------------------------------------===//
 // Selection DAG Node Properties.
 //
@@ -124,6 +128,7 @@
 
 def imm        : SDNode<"ISD::Constant"  , SDTImm     , [], "ConstantSDNode">;
 def vt         : SDNode<"ISD::VALUETYPE" , SDTVT      , [], "VTSDNode">;
+def cond       : SDNode<"ISD::CONDCODE"  , SDTVT      , [], "CondCodeSDNode">;
 def undef      : SDNode<"ISD::UNDEF"     , SDTUNDEF   , []>;
 def add        : SDNode<"ISD::ADD"       , SDTIntBinOp   ,
                         [SDNPCommutative, SDNPAssociative]>;
@@ -167,6 +172,22 @@
 def fround     : SDNode<"ISD::FP_ROUND"   , SDTFPRoundOp>;
 def fextend    : SDNode<"ISD::FP_EXTEND"  , SDTFPExtendOp>;
 
+def setcc      : SDNode<"ISD::SETCC"      , SDTSetCC>;
+
+//===----------------------------------------------------------------------===//
+// Selection DAG Condition Codes
+
+class CondCode; // ISD::CondCode enums
+def SETOEQ : CondCode; def SETOGT : CondCode;
+def SETOGE : CondCode; def SETOLT : CondCode; def SETOLE : CondCode;
+def SETONE : CondCode; def SETO   : CondCode; def SETUO  : CondCode;
+def SETUEQ : CondCode; def SETUGT : CondCode; def SETUGE : CondCode;
+def SETULT : CondCode; def SETULE : CondCode; def SETUNE : CondCode;
+
+def SETEQ : CondCode; def SETGT : CondCode; def SETGE : CondCode;
+def SETLT : CondCode; def SETLE : CondCode; def SETNE : CondCode;
+
+
 //===----------------------------------------------------------------------===//
 // Selection DAG Node Transformation Functions.
 //
@@ -219,6 +240,49 @@
 def not  : PatFrag<(ops node:$in), (xor node:$in, immAllOnes)>;
 def ineg : PatFrag<(ops node:$in), (sub 0, node:$in)>;
 
+
+// setcc convenience fragments.
+def setoeq : PatFrag<(ops node:$lhs, node:$rhs),
+                     (setcc node:$lhs, node:$rhs, SETOEQ)>;
+def setogt : PatFrag<(ops node:$lhs, node:$rhs),
+                     (setcc node:$lhs, node:$rhs, SETOGT)>;
+def setoge : PatFrag<(ops node:$lhs, node:$rhs),
+                     (setcc node:$lhs, node:$rhs, SETOGE)>;
+def setolt : PatFrag<(ops node:$lhs, node:$rhs),
+                     (setcc node:$lhs, node:$rhs, SETOLT)>;
+def setole : PatFrag<(ops node:$lhs, node:$rhs),
+                     (setcc node:$lhs, node:$rhs, SETOLE)>;
+def setone : PatFrag<(ops node:$lhs, node:$rhs),
+                     (setcc node:$lhs, node:$rhs, SETONE)>;
+def seto   : PatFrag<(ops node:$lhs, node:$rhs),
+                     (setcc node:$lhs, node:$rhs, SETO)>;
+def setuo  : PatFrag<(ops node:$lhs, node:$rhs),
+                     (setcc node:$lhs, node:$rhs, SETUO)>;
+def setueq : PatFrag<(ops node:$lhs, node:$rhs),
+                     (setcc node:$lhs, node:$rhs, SETUEQ)>;
+def setugt : PatFrag<(ops node:$lhs, node:$rhs),
+                     (setcc node:$lhs, node:$rhs, SETUGT)>;
+def setuge : PatFrag<(ops node:$lhs, node:$rhs),
+                     (setcc node:$lhs, node:$rhs, SETUGE)>;
+def setult : PatFrag<(ops node:$lhs, node:$rhs),
+                     (setcc node:$lhs, node:$rhs, SETULT)>;
+def setule : PatFrag<(ops node:$lhs, node:$rhs),
+                     (setcc node:$lhs, node:$rhs, SETULE)>;
+def setune : PatFrag<(ops node:$lhs, node:$rhs),
+                     (setcc node:$lhs, node:$rhs, SETUNE)>;
+def seteq  : PatFrag<(ops node:$lhs, node:$rhs),
+                     (setcc node:$lhs, node:$rhs, SETEQ)>;
+def setgt  : PatFrag<(ops node:$lhs, node:$rhs),
+                     (setcc node:$lhs, node:$rhs, SETGT)>;
+def setge  : PatFrag<(ops node:$lhs, node:$rhs),
+                     (setcc node:$lhs, node:$rhs, SETGE)>;
+def setlt  : PatFrag<(ops node:$lhs, node:$rhs),
+                     (setcc node:$lhs, node:$rhs, SETLT)>;
+def setle  : PatFrag<(ops node:$lhs, node:$rhs),
+                     (setcc node:$lhs, node:$rhs, SETLE)>;
+def setne  : PatFrag<(ops node:$lhs, node:$rhs),
+                     (setcc node:$lhs, node:$rhs, SETNE)>;
+
 //===----------------------------------------------------------------------===//
 // Selection DAG Pattern Support.
 //





From lattner at cs.uiuc.edu  Wed Oct 26 12:02:13 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed, 26 Oct 2005 12:02:13 -0500
Subject: [llvm-commits] CVS: llvm/utils/TableGen/DAGISelEmitter.cpp 
Message-ID: <200510261702.MAA15954@zion.cs.uiuc.edu>



Changes in directory llvm/utils/TableGen:

DAGISelEmitter.cpp updated: 1.67 -> 1.68
---
Log message:

Condcodes are in the ISD namespace


---
Diffs of the changes:  (+1 -1)

 DAGISelEmitter.cpp |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/utils/TableGen/DAGISelEmitter.cpp
diff -u llvm/utils/TableGen/DAGISelEmitter.cpp:1.67 llvm/utils/TableGen/DAGISelEmitter.cpp:1.68
--- llvm/utils/TableGen/DAGISelEmitter.cpp:1.67	Wed Oct 26 11:59:37 2005
+++ llvm/utils/TableGen/DAGISelEmitter.cpp	Wed Oct 26 12:02:02 2005
@@ -1590,7 +1590,7 @@
         } else if (LeafRec->isSubClassOf("CondCode")) {
           // Make sure this is the specified cond code.
           OS << "      if (cast<CondCodeSDNode>(" << RootName << i
-             << ")->get() != " << "MVT::" << LeafRec->getName()
+             << ")->get() != " << "ISD::" << LeafRec->getName()
              << ") goto P" << PatternNo << "Fail;\n";
         } else {
           Child->dump();





From lattner at cs.uiuc.edu  Wed Oct 26 12:18:27 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed, 26 Oct 2005 12:18:27 -0500
Subject: [llvm-commits] 
	CVS: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
Message-ID: <200510261718.MAA16104@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Transforms/Scalar:

InstructionCombining.cpp updated: 1.392 -> 1.393
---
Log message:

fold nested and's early to avoid inefficiencies in MaskedValueIsZero.  This
fixes a very slow compile in PR639: http://llvm.cs.uiuc.edu/PR639 .


---
Diffs of the changes:  (+9 -0)

 InstructionCombining.cpp |    9 +++++++++
 1 files changed, 9 insertions(+)


Index: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
diff -u llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.392 llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.393
--- llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.392	Mon Oct 24 01:35:18 2005
+++ llvm/lib/Transforms/Scalar/InstructionCombining.cpp	Wed Oct 26 12:18:16 2005
@@ -1725,6 +1725,15 @@
     // and X, -1 == X
     if (AndRHS->isAllOnesValue())
       return ReplaceInstUsesWith(I, Op0);
+    
+    // and (and X, c1), c2 -> and (x, c1&c2).  Handle this case here, before
+    // calling MaskedValueIsZero, to avoid inefficient cases where we traipse
+    // through many levels of ands.
+    {
+      Value *X; ConstantInt *C1;
+      if (match(Op0, m_And(m_Value(X), m_ConstantInt(C1))))
+        return BinaryOperator::createAnd(X, ConstantExpr::getAnd(C1, AndRHS));
+    }
 
     if (MaskedValueIsZero(Op0, AndRHS))        // LHS & RHS == 0
       return ReplaceInstUsesWith(I, Constant::getNullValue(I.getType()));





From jlaskey at apple.com  Wed Oct 26 12:28:35 2005
From: jlaskey at apple.com (Jim Laskey)
Date: Wed, 26 Oct 2005 12:28:35 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPC.td 
Message-ID: <200510261728.MAA16162@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/PowerPC:

PPC.td updated: 1.9 -> 1.10
---
Log message:

Add attribute name and type to SubtargetFeatures.



---
Diffs of the changes:  (+5 -5)

 PPC.td |   10 +++++-----
 1 files changed, 5 insertions(+), 5 deletions(-)


Index: llvm/lib/Target/PowerPC/PPC.td
diff -u llvm/lib/Target/PowerPC/PPC.td:1.9 llvm/lib/Target/PowerPC/PPC.td:1.10
--- llvm/lib/Target/PowerPC/PPC.td:1.9	Sun Oct 23 17:23:45 2005
+++ llvm/lib/Target/PowerPC/PPC.td	Wed Oct 26 12:28:23 2005
@@ -19,15 +19,15 @@
 // PowerPC Subtarget features.
 //
  
-def Feature64Bit     : SubtargetFeature<"64bit",
+def Feature64Bit     : SubtargetFeature<"64bit", "bool", "Is64Bit",
                                         "Enable 64-bit instructions">;
-def Feature64BitRegs : SubtargetFeature<"64bitregs",
+def Feature64BitRegs : SubtargetFeature<"64bitregs", "bool", "Has64BitRegs",
                                         "Enable 64-bit registers [beta]">;
-def FeatureAltivec   : SubtargetFeature<"altivec",
+def FeatureAltivec   : SubtargetFeature<"altivec", "bool", "HasAltivec",
                                         "Enable Altivec instructions">;
-def FeatureGPUL      : SubtargetFeature<"gpul",
+def FeatureGPUL      : SubtargetFeature<"gpul", "bool", "IsGigaProcessor",
                                         "Enable GPUL instructions">;
-def FeatureFSqrt     : SubtargetFeature<"fsqrt",
+def FeatureFSqrt     : SubtargetFeature<"fsqrt", "bool", "HasFSQRT",
                                         "Enable the fsqrt instruction">; 
 
 //===----------------------------------------------------------------------===//





From jlaskey at apple.com  Wed Oct 26 12:28:35 2005
From: jlaskey at apple.com (Jim Laskey)
Date: Wed, 26 Oct 2005 12:28:35 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/Alpha/Alpha.td 
Message-ID: <200510261728.MAA16170@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/Alpha:

Alpha.td updated: 1.5 -> 1.6
---
Log message:

Add attribute name and type to SubtargetFeatures.



---
Diffs of the changes:  (+4 -2)

 Alpha.td |    6 ++++--
 1 files changed, 4 insertions(+), 2 deletions(-)


Index: llvm/lib/Target/Alpha/Alpha.td
diff -u llvm/lib/Target/Alpha/Alpha.td:1.5 llvm/lib/Target/Alpha/Alpha.td:1.6
--- llvm/lib/Target/Alpha/Alpha.td:1.5	Sun Oct 23 17:08:45 2005
+++ llvm/lib/Target/Alpha/Alpha.td	Wed Oct 26 12:28:23 2005
@@ -20,8 +20,10 @@
 // Subtarget Features
 //===----------------------------------------------------------------------===//
 
-def FeatureCIX : SubtargetFeature<"CIX", "Enable CIX extentions">;
-def FeatureFIX : SubtargetFeature<"FIX", "Enable FIX extentions">;
+def FeatureCIX : SubtargetFeature<"CIX", "bool", "HasCT",
+                                  "Enable CIX extentions">;
+def FeatureFIX : SubtargetFeature<"FIX", "bool", "HasF2I",
+                                  "Enable FIX extentions">;
 
 //===----------------------------------------------------------------------===//
 // Register File Description





From jlaskey at apple.com  Wed Oct 26 12:28:35 2005
From: jlaskey at apple.com (Jim Laskey)
Date: Wed, 26 Oct 2005 12:28:35 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/Target.td 
Message-ID: <200510261728.MAA16166@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target:

Target.td updated: 1.55 -> 1.56
---
Log message:

Add attribute name and type to SubtargetFeatures.



---
Diffs of the changes:  (+9 -1)

 Target.td |   10 +++++++++-
 1 files changed, 9 insertions(+), 1 deletion(-)


Index: llvm/lib/Target/Target.td
diff -u llvm/lib/Target/Target.td:1.55 llvm/lib/Target/Target.td:1.56
--- llvm/lib/Target/Target.td:1.55	Fri Oct 21 14:05:19 2005
+++ llvm/lib/Target/Target.td	Wed Oct 26 12:28:23 2005
@@ -252,12 +252,20 @@
 //===----------------------------------------------------------------------===//
 // SubtargetFeature - A characteristic of the chip set.
 //
-class SubtargetFeature<string n, string d> {
+class SubtargetFeature<string n, string t, string a, string d> {
   // Name - Feature name.  Used by command line (-mattr=) to determine the
   // appropriate target chip.
   //
   string Name = n;
   
+  // Type - Type of attribute to be set by feature.
+  //
+  string Type = t;
+  
+  // Attribute - Attribute to be set by feature.
+  //
+  string Attribute = a;
+  
   // Desc - Feature description.  Used by command line (-mattr=) to display help
   // information.
   //





From jlaskey at apple.com  Wed Oct 26 12:30:46 2005
From: jlaskey at apple.com (Jim Laskey)
Date: Wed, 26 Oct 2005 12:30:46 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaSubtarget.cpp
	AlphaSubtarget.h 
Message-ID: <200510261730.MAA16210@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/Alpha:

AlphaSubtarget.cpp updated: 1.6 -> 1.7
AlphaSubtarget.h updated: 1.1 -> 1.2
---
Log message:

Give full control of subtarget features over to table generated code.


---
Diffs of the changes:  (+7 -6)

 AlphaSubtarget.cpp |    9 +++------
 AlphaSubtarget.h   |    4 ++++
 2 files changed, 7 insertions(+), 6 deletions(-)


Index: llvm/lib/Target/Alpha/AlphaSubtarget.cpp
diff -u llvm/lib/Target/Alpha/AlphaSubtarget.cpp:1.6 llvm/lib/Target/Alpha/AlphaSubtarget.cpp:1.7
--- llvm/lib/Target/Alpha/AlphaSubtarget.cpp:1.6	Tue Oct 25 10:15:28 2005
+++ llvm/lib/Target/Alpha/AlphaSubtarget.cpp	Wed Oct 26 12:30:34 2005
@@ -19,10 +19,7 @@
 AlphaSubtarget::AlphaSubtarget(const Module &M, const std::string &FS)
   : HasF2I(false), HasCT(false) {
   std::string CPU = "generic";
-  SubtargetFeatures Features(FS);
-  Features.setCPUIfNone(CPU);
-  uint32_t Bits =Features.getBits(SubTypeKV, SubTypeKVSize,
-                                  FeatureKV, FeatureKVSize);
-  HasF2I = (Bits & FeatureFIX) != 0;
-  HasCT  = (Bits & FeatureCIX) != 0;
+
+  // Parse features string.
+  ParseSubtargetFeatures(FS, CPU);
 }


Index: llvm/lib/Target/Alpha/AlphaSubtarget.h
diff -u llvm/lib/Target/Alpha/AlphaSubtarget.h:1.1 llvm/lib/Target/Alpha/AlphaSubtarget.h:1.2
--- llvm/lib/Target/Alpha/AlphaSubtarget.h:1.1	Thu Sep 29 17:54:56 2005
+++ llvm/lib/Target/Alpha/AlphaSubtarget.h	Wed Oct 26 12:30:34 2005
@@ -33,6 +33,10 @@
   /// of the specified module.
   ///
   AlphaSubtarget(const Module &M, const std::string &FS);
+  
+  /// ParseSubtargetFeatures - Parses features string setting specified 
+  /// subtarget options.  Definition of function is usto generated by tblgen.
+  void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU);
 
   bool hasF2I() const { return HasF2I; }
   bool hasCT() const { return HasCT; }





From jlaskey at apple.com  Wed Oct 26 12:30:47 2005
From: jlaskey at apple.com (Jim Laskey)
Date: Wed, 26 Oct 2005 12:30:47 -0500
Subject: [llvm-commits] CVS: llvm/utils/TableGen/SubtargetEmitter.cpp
	SubtargetEmitter.h 
Message-ID: <200510261730.MAA16222@zion.cs.uiuc.edu>



Changes in directory llvm/utils/TableGen:

SubtargetEmitter.cpp updated: 1.4 -> 1.5
SubtargetEmitter.h updated: 1.2 -> 1.3
---
Log message:

Give full control of subtarget features over to table generated code.


---
Diffs of the changes:  (+65 -15)

 SubtargetEmitter.cpp |   76 +++++++++++++++++++++++++++++++++++++++++----------
 SubtargetEmitter.h   |    4 ++
 2 files changed, 65 insertions(+), 15 deletions(-)


Index: llvm/utils/TableGen/SubtargetEmitter.cpp
diff -u llvm/utils/TableGen/SubtargetEmitter.cpp:1.4 llvm/utils/TableGen/SubtargetEmitter.cpp:1.5
--- llvm/utils/TableGen/SubtargetEmitter.cpp:1.4	Tue Oct 25 10:16:36 2005
+++ llvm/utils/TableGen/SubtargetEmitter.cpp	Wed Oct 26 12:30:34 2005
@@ -45,24 +45,28 @@
 };
 
 //
-// FeatureEnumeration - Emit an enumeration of all the subtarget features.
+// Enumeration - Emit the specified class as an enumeration.
 //
-void SubtargetEmitter::FeatureEnumeration(std::ostream &OS) {
-  RecordList Features = Records.getAllDerivedDefinitions("SubtargetFeature");
-  sort(Features.begin(), Features.end(), LessRecord());
+void SubtargetEmitter::Enumeration(std::ostream &OS,
+                                   const char *ClassName,
+                                   bool isBits) {
+  RecordList Defs = Records.getAllDerivedDefinitions(ClassName);
+  sort(Defs.begin(), Defs.end(), LessRecord());
 
   int i = 0;
   
   OS << "enum {\n";
   
-  for (RecordListIter RI = Features.begin(), E = Features.end(); RI != E;){
+  for (RecordListIter RI = Defs.begin(), E = Defs.end(); RI != E;) {
     Record *R = *RI++;
     std::string Instance = R->getName();
     OS << "  "
-       << Instance
-       << " = "
-       << " 1 << " << i++
-       << ((RI != E) ? ",\n" : "\n");
+       << Instance;
+    if (isBits) {
+      OS << " = "
+         << " 1 << " << i++;
+    }
+    OS << ((RI != E) ? ",\n" : "\n");
   }
   
   OS << "};\n";
@@ -76,8 +80,7 @@
   RecordList Features = Records.getAllDerivedDefinitions("SubtargetFeature");
   sort(Features.begin(), Features.end(), LessRecord());
 
-  OS << "\n"
-     << "// Sorted (by key) array of values for CPU features.\n"
+  OS << "// Sorted (by key) array of values for CPU features.\n"
      << "static llvm::SubtargetFeatureKV FeatureKV[] = {\n";
   for (RecordListIter RI = Features.begin(), E = Features.end(); RI != E;) {
     Record *R = *RI++;
@@ -105,8 +108,7 @@
   RecordList Processors = Records.getAllDerivedDefinitions("Processor");
   sort(Processors.begin(), Processors.end(), LessRecordFieldName());
 
-  OS << "\n"
-     << "// Sorted (by key) array of values for CPU subtype.\n"
+  OS << "// Sorted (by key) array of values for CPU subtype.\n"
      << "static const llvm::SubtargetFeatureKV SubTypeKV[] = {\n";
   for (RecordListIter RI = Processors.begin(), E = Processors.end();
        RI != E;) {
@@ -145,15 +147,61 @@
   OS<<"};\n";
 }
 
+//
+// ParseFeaturesFunction - Produces a subtarget specific function for parsing
+// the subtarget features string.
+//
+void SubtargetEmitter::ParseFeaturesFunction(std::ostream &OS) {
+  RecordList Features = Records.getAllDerivedDefinitions("SubtargetFeature");
+  sort(Features.begin(), Features.end(), LessRecord());
+
+  OS << "// ParseSubtargetFeatures - Parses features string setting specified\n" 
+        "// subtarget options.\n" 
+        "void llvm::";
+  OS << Target;
+  OS << "Subtarget::ParseSubtargetFeatures(const std::string &FS,\n"
+        "                                  const std::string &CPU) {\n"
+        "  SubtargetFeatures Features(FS);\n"
+        "  Features.setCPUIfNone(CPU);\n"
+        "  uint32_t Bits =  Features.getBits(SubTypeKV, SubTypeKVSize,\n"
+        "                                    FeatureKV, FeatureKVSize);\n";
+        
+  for (RecordListIter RI = Features.begin(), E = Features.end(); RI != E;) {
+    Record *R = *RI++;
+    std::string Instance = R->getName();
+    std::string Name = R->getValueAsString("Name");
+    std::string Type = R->getValueAsString("Type");
+    std::string Attribute = R->getValueAsString("Attribute");
+    
+    OS << "  " << Attribute << " = (Bits & " << Instance << ") != 0;\n";
+  }
+  OS << "}\n";
+}
+
 // 
 // SubtargetEmitter::run - Main subtarget enumeration emitter.
 //
 void SubtargetEmitter::run(std::ostream &OS) {
+  std::vector<Record*> Targets = Records.getAllDerivedDefinitions("Target");
+  if (Targets.size() == 0)
+    throw std::string("ERROR: No 'Target' subclasses defined!");
+  if (Targets.size() != 1)
+    throw std::string("ERROR: Multiple subclasses of Target defined!");
+  Target = Targets[0]->getName();
+
   EmitSourceFileHeader("Subtarget Enumeration Source Fragment", OS);
 
   OS << "#include \"llvm/Target/SubtargetFeature.h\"\n\n";
   
-  FeatureEnumeration(OS);
+  Enumeration(OS, "FuncUnit", true);
+  OS<<"\n";
+  Enumeration(OS, "InstrItinClass", false);
+  OS<<"\n";
+  Enumeration(OS, "SubtargetFeature", true);
+  OS<<"\n";
   FeatureKeyValues(OS);
+  OS<<"\n";
   CPUKeyValues(OS);
+  OS<<"\n";
+  ParseFeaturesFunction(OS);
 }


Index: llvm/utils/TableGen/SubtargetEmitter.h
diff -u llvm/utils/TableGen/SubtargetEmitter.h:1.2 llvm/utils/TableGen/SubtargetEmitter.h:1.3
--- llvm/utils/TableGen/SubtargetEmitter.h:1.2	Tue Oct 25 10:16:36 2005
+++ llvm/utils/TableGen/SubtargetEmitter.h	Wed Oct 26 12:30:34 2005
@@ -20,10 +20,12 @@
 
 class SubtargetEmitter : public TableGenBackend {
   RecordKeeper &Records;
+  std::string Target;
   
-  void FeatureEnumeration(std::ostream &OS);
+  void Enumeration(std::ostream &OS, const char *ClassName, bool isBits);
   void FeatureKeyValues(std::ostream &OS);
   void CPUKeyValues(std::ostream &OS);
+  void SubtargetEmitter::ParseFeaturesFunction(std::ostream &OS);
   
 public:
   SubtargetEmitter(RecordKeeper &R) : Records(R) {}





From jlaskey at apple.com  Wed Oct 26 12:30:47 2005
From: jlaskey at apple.com (Jim Laskey)
Date: Wed, 26 Oct 2005 12:30:47 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCSubtarget.cpp
	PPCSubtarget.h 
Message-ID: <200510261730.MAA16216@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/PowerPC:

PPCSubtarget.cpp updated: 1.13 -> 1.14
PPCSubtarget.h updated: 1.8 -> 1.9
---
Log message:

Give full control of subtarget features over to table generated code.


---
Diffs of the changes:  (+19 -10)

 PPCSubtarget.cpp |   21 ++++++++++++---------
 PPCSubtarget.h   |    8 +++++++-
 2 files changed, 19 insertions(+), 10 deletions(-)


Index: llvm/lib/Target/PowerPC/PPCSubtarget.cpp
diff -u llvm/lib/Target/PowerPC/PPCSubtarget.cpp:1.13 llvm/lib/Target/PowerPC/PPCSubtarget.cpp:1.14
--- llvm/lib/Target/PowerPC/PPCSubtarget.cpp:1.13	Tue Oct 25 10:15:28 2005
+++ llvm/lib/Target/PowerPC/PPCSubtarget.cpp	Wed Oct 26 12:30:34 2005
@@ -68,22 +68,25 @@
 }
 #endif
 
+
 PPCSubtarget::PPCSubtarget(const Module &M, const std::string &FS)
-  : StackAlignment(16), IsGigaProcessor(false), IsAIX(false), IsDarwin(false) {
+  : StackAlignment(16)
+  , IsGigaProcessor(false)
+  , Is64Bit(false)
+  , Has64BitRegs(false)
+  , HasAltivec(false)
+  , HasFSQRT(false)
+  , IsAIX(false)
+  , IsDarwin(false) {
 
   // Determine default and user specified characteristics
   std::string CPU = "generic";
 #if defined(__APPLE__)
   CPU = GetCurrentPowerPCCPU();
 #endif
-  SubtargetFeatures Features(FS);
-  Features.setCPUIfNone(CPU);
-  uint32_t Bits =  Features.getBits(SubTypeKV, SubTypeKVSize,
-                                    FeatureKV, FeatureKVSize);
-  IsGigaProcessor = (Bits & FeatureGPUL ) != 0;
-  Is64Bit         = (Bits & Feature64Bit) != 0;
-  HasFSQRT        = (Bits & FeatureFSqrt) != 0;
-  Has64BitRegs    = (Bits & Feature64BitRegs) != 0;
+
+  // Parse features string.
+  ParseSubtargetFeatures(FS, CPU);
 
   // Set the boolean corresponding to the current target triple, or the default
   // if one cannot be determined, to true.


Index: llvm/lib/Target/PowerPC/PPCSubtarget.h
diff -u llvm/lib/Target/PowerPC/PPCSubtarget.h:1.8 llvm/lib/Target/PowerPC/PPCSubtarget.h:1.9
--- llvm/lib/Target/PowerPC/PPCSubtarget.h:1.8	Mon Oct 17 19:56:42 2005
+++ llvm/lib/Target/PowerPC/PPCSubtarget.h	Wed Oct 26 12:30:34 2005
@@ -31,6 +31,7 @@
   bool IsGigaProcessor;
   bool Is64Bit;
   bool Has64BitRegs;
+  bool HasAltivec;
   bool HasFSQRT;
   bool IsAIX;
   bool IsDarwin;
@@ -39,6 +40,10 @@
   /// of the specified module.
   ///
   PPCSubtarget(const Module &M, const std::string &FS);
+  
+  /// ParseSubtargetFeatures - Parses features string setting specified 
+  /// subtarget options.  Definition of function is usto generated by tblgen.
+  void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU);
 
   /// getStackAlignment - Returns the minimum alignment known to hold of the
   /// stack frame on entry to the function and which must be maintained by every
@@ -46,11 +51,12 @@
   unsigned getStackAlignment() const { return StackAlignment; }
 
   bool hasFSQRT() const { return HasFSQRT; }
+  bool has64BitRegs() const { return Has64BitRegs; }
+  bool hasAltivec() const { return HasAltivec; }
   
   bool isAIX() const { return IsAIX; }
   bool isDarwin() const { return IsDarwin; }
   bool is64Bit() const { return Is64Bit; }
-  bool has64BitRegs() const { return Has64BitRegs; }
   bool isGigaProcessor() const { return IsGigaProcessor; }
 };
 } // End llvm namespace





From alenhar2 at cs.uiuc.edu  Wed Oct 26 12:41:57 2005
From: alenhar2 at cs.uiuc.edu (Andrew Lenharth)
Date: Wed, 26 Oct 2005 12:41:57 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaInstrFormats.td
	AlphaInstrInfo.td 
Message-ID: <200510261741.MAA16372@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/Alpha:

AlphaInstrFormats.td updated: 1.10 -> 1.11
AlphaInstrInfo.td updated: 1.68 -> 1.69
---
Log message:

Simplify instinfo, set random bits on more fp insts, and fix 1 opcode

---
Diffs of the changes:  (+18 -24)

 AlphaInstrFormats.td |    5 +++--
 AlphaInstrInfo.td    |   37 +++++++++++++++----------------------
 2 files changed, 18 insertions(+), 24 deletions(-)


Index: llvm/lib/Target/Alpha/AlphaInstrFormats.td
diff -u llvm/lib/Target/Alpha/AlphaInstrFormats.td:1.10 llvm/lib/Target/Alpha/AlphaInstrFormats.td:1.11
--- llvm/lib/Target/Alpha/AlphaInstrFormats.td:1.10	Sat Oct 22 17:06:58 2005
+++ llvm/lib/Target/Alpha/AlphaInstrFormats.td	Wed Oct 26 12:41:46 2005
@@ -196,13 +196,14 @@
   let Inst{4-0} = Fc;
 }
 
-class FPFormCM<bits<6> opcode, bits<11> fun, dag OL, string asmstr> 
-        : InstAlpha<opcode, OL, asmstr> {
+class FPFormCM<bits<6> opcode, bits<11> fun, string asmstr> 
+        : InstAlpha<opcode, (ops FPRC:$RDEST, FPRC:$RSRC2, FPRC:$RSRC, FPRC:$RCOND), asmstr> {
   bits<5> Fc;
   bits<5> Fa;
   bits<5> Fb;
   bits<11> Function = fun;
 
+  let isTwoAddress = 1;
   let Inst{25-21} = Fa;
   let Inst{20-16} = Fb;
   let Inst{15-5} = Function;


Index: llvm/lib/Target/Alpha/AlphaInstrInfo.td
diff -u llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.68 llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.69
--- llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.68	Sat Oct 22 22:43:48 2005
+++ llvm/lib/Target/Alpha/AlphaInstrInfo.td	Wed Oct 26 12:41:46 2005
@@ -136,21 +136,14 @@
 def CMOVNE   : OForm4<  0x11, 0x26, "cmovne $RCOND,$RSRC,$RDEST">; //CMOVE if RCOND != zero
 def CMOVNEi  : OForm4L< 0x11, 0x26, "cmovne $RCOND,$L,$RDEST">; //CMOVE if RCOND != zero
 
-let isTwoAddress = 1 in {
 //conditional moves, fp
- def FCMOVEQ : FPFormCM<0x17, 0x02A, (ops FPRC:$RDEST, FPRC:$RSRC2, FPRC:$RSRC, FPRC:$RCOND),
-        "fcmoveq $RCOND,$RSRC,$RDEST">; //FCMOVE if = zero
- def FCMOVGE : FPFormCM<0x17, 0x02D, (ops FPRC:$RDEST, FPRC:$RSRC2, FPRC:$RSRC, FPRC:$RCOND),
-        "fcmovge $RCOND,$RSRC,$RDEST">; //FCMOVE if >= zero
- def FCMOVGT : FPFormCM<0x17, 0x02F, (ops FPRC:$RDEST, FPRC:$RSRC2, FPRC:$RSRC, FPRC:$RCOND),
-        "fcmovgt $RCOND,$RSRC,$RDEST">; //FCMOVE if > zero
- def FCMOVLE : FPFormCM<0x17, 0x02E, (ops FPRC:$RDEST, FPRC:$RSRC2, FPRC:$RSRC, FPRC:$RCOND),
-        "fcmovle $RCOND,$RSRC,$RDEST">; //FCMOVE if <= zero
- def FCMOVLT : FPFormCM<0x17, 0x02, (ops FPRC:$RDEST, FPRC:$RSRC2, FPRC:$RSRC, FPRC:$RCOND),
-        "fcmovlt $RCOND,$RSRC,$RDEST">; // FCMOVE if < zero
- def FCMOVNE : FPFormCM<0x17, 0x02B, (ops FPRC:$RDEST, FPRC:$RSRC2, FPRC:$RSRC, FPRC:$RCOND),
-        "fcmovne $RCOND,$RSRC,$RDEST">; //FCMOVE if != zero
-}
+def FCMOVEQ : FPFormCM<0x17, 0x02A, "fcmoveq $RCOND,$RSRC,$RDEST">; //FCMOVE if = zero
+def FCMOVGE : FPFormCM<0x17, 0x02D, "fcmovge $RCOND,$RSRC,$RDEST">; //FCMOVE if >= zero
+def FCMOVGT : FPFormCM<0x17, 0x02F, "fcmovgt $RCOND,$RSRC,$RDEST">; //FCMOVE if > zero
+def FCMOVLE : FPFormCM<0x17, 0x02E, "fcmovle $RCOND,$RSRC,$RDEST">; //FCMOVE if <= zero
+def FCMOVLT : FPFormCM<0x17, 0x02C, "fcmovlt $RCOND,$RSRC,$RDEST">; // FCMOVE if < zero
+def FCMOVNE : FPFormCM<0x17, 0x02B, "fcmovne $RCOND,$RSRC,$RDEST">; //FCMOVE if != zero
+
 
 def ADDL     : OForm< 0x10, 0x00, "addl $RA,$RB,$RC",
                       [(set GPRC:$RC, (intop (add GPRC:$RA, GPRC:$RB)))]>;
@@ -329,10 +322,10 @@
 def CMPULTi  : OFormL<0x10, 0x1D, "cmpult $RA,$L,$RC", []>; //Compare unsigned quadword less than
 
 //Comparison, FP
-def CMPTEQ : FPForm<0x16, 0x0A5, "cmpteq/su $RA,$RB,$RC">;  //Compare T_floating equal
-def CMPTLE : FPForm<0x16, 0x0A7, "cmptle/su $RA,$RB,$RC">;  //Compare T_floating less than or equal
-def CMPTLT : FPForm<0x16, 0x0A6, "cmptlt/su $RA,$RB,$RC">;  //Compare T_floating less than
-def CMPTUN : FPForm<0x16, 0x0A4, "cmptun/su $RA,$RB,$RC">;  //Compare T_floating unordered
+def CMPTEQ : FPForm<0x16, 0x5A5, "cmpteq/su $RA,$RB,$RC">;  //Compare T_floating equal
+def CMPTLE : FPForm<0x16, 0x5A7, "cmptle/su $RA,$RB,$RC">;  //Compare T_floating less than or equal
+def CMPTLT : FPForm<0x16, 0x5A6, "cmptlt/su $RA,$RB,$RC">;  //Compare T_floating less than
+def CMPTUN : FPForm<0x16, 0x5A4, "cmptun/su $RA,$RB,$RC">;  //Compare T_floating unordered
 
 //There are in the Multimedia extentions, so let's not use them yet
 //def MAXSB8  : OForm<0x1C, 0x3E, "MAXSB8 $RA,$RB,$RC">; //Vector signed byte maximum
@@ -486,11 +479,11 @@
 //CVTLQ F-P 17.010 Convert longword to quadword
 //CVTQL F-P 17.030 Convert quadword to longword
 //These use SW completion, may not have function code for that set right (matters for JIT)
-def CVTQS : FPForm<0x16, 0x0BC, "cvtqs $RB,$RC">; //Convert quadword to S_floating
-def CVTQT : FPForm<0x16, 0x0BE, "cvtqt $RB,$RC">; //Convert quadword to T_floating
-def CVTST : FPForm<0x16, 0x2AC, "cvtsts $RB,$RC">; //Convert S_floating to T_floating
+def CVTQS : FPForm<0x16, 0x7BC, "cvtqs/sui $RB,$RC">; //Convert quadword to S_floating
+def CVTQT : FPForm<0x16, 0x7BE, "cvtqt/sui $RB,$RC">; //Convert quadword to T_floating
+def CVTST : FPForm<0x16, 0x6AC, "cvtst/s $RB,$RC">; //Convert S_floating to T_floating
 def CVTTQ : FPForm<0x16, 0x52F, "cvttq/svc $RB,$RC">; //Convert T_floating to quadword
-def CVTTS : FPForm<0x16, 0x5AC, "cvtts/su $RB,$RC">; //Convert T_floating to S_floating
+def CVTTS : FPForm<0x16, 0x7AC, "cvtts/sui $RB,$RC">; //Convert T_floating to S_floating
 
 //S_floating : IEEE Single
 //T_floating : IEEE Double





From jlaskey at apple.com  Wed Oct 26 12:49:35 2005
From: jlaskey at apple.com (Jim Laskey)
Date: Wed, 26 Oct 2005 12:49:35 -0500
Subject: [llvm-commits] CVS: llvm/utils/TableGen/SubtargetEmitter.cpp 
Message-ID: <200510261749.MAA16420@zion.cs.uiuc.edu>



Changes in directory llvm/utils/TableGen:

SubtargetEmitter.cpp updated: 1.5 -> 1.6
---
Log message:

Simplify.


---
Diffs of the changes:  (+1 -6)

 SubtargetEmitter.cpp |    7 +------
 1 files changed, 1 insertion(+), 6 deletions(-)


Index: llvm/utils/TableGen/SubtargetEmitter.cpp
diff -u llvm/utils/TableGen/SubtargetEmitter.cpp:1.5 llvm/utils/TableGen/SubtargetEmitter.cpp:1.6
--- llvm/utils/TableGen/SubtargetEmitter.cpp:1.5	Wed Oct 26 12:30:34 2005
+++ llvm/utils/TableGen/SubtargetEmitter.cpp	Wed Oct 26 12:49:21 2005
@@ -182,12 +182,7 @@
 // SubtargetEmitter::run - Main subtarget enumeration emitter.
 //
 void SubtargetEmitter::run(std::ostream &OS) {
-  std::vector<Record*> Targets = Records.getAllDerivedDefinitions("Target");
-  if (Targets.size() == 0)
-    throw std::string("ERROR: No 'Target' subclasses defined!");
-  if (Targets.size() != 1)
-    throw std::string("ERROR: Multiple subclasses of Target defined!");
-  Target = Targets[0]->getName();
+  Target = CodeGenTarget().getName();
 
   EmitSourceFileHeader("Subtarget Enumeration Source Fragment", OS);
 





From jlaskey at apple.com  Wed Oct 26 12:50:35 2005
From: jlaskey at apple.com (Jim Laskey)
Date: Wed, 26 Oct 2005 12:50:35 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCSubtarget.h 
Message-ID: <200510261750.MAA16443@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/PowerPC:

PPCSubtarget.h updated: 1.9 -> 1.10
---
Log message:

Typo x 2


---
Diffs of the changes:  (+1 -1)

 PPCSubtarget.h |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/lib/Target/PowerPC/PPCSubtarget.h
diff -u llvm/lib/Target/PowerPC/PPCSubtarget.h:1.9 llvm/lib/Target/PowerPC/PPCSubtarget.h:1.10
--- llvm/lib/Target/PowerPC/PPCSubtarget.h:1.9	Wed Oct 26 12:30:34 2005
+++ llvm/lib/Target/PowerPC/PPCSubtarget.h	Wed Oct 26 12:50:22 2005
@@ -42,7 +42,7 @@
   PPCSubtarget(const Module &M, const std::string &FS);
   
   /// ParseSubtargetFeatures - Parses features string setting specified 
-  /// subtarget options.  Definition of function is usto generated by tblgen.
+  /// subtarget options.  Definition of function is into generated by tblgen.
   void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU);
 
   /// getStackAlignment - Returns the minimum alignment known to hold of the





From jlaskey at apple.com  Wed Oct 26 12:50:35 2005
From: jlaskey at apple.com (Jim Laskey)
Date: Wed, 26 Oct 2005 12:50:35 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaSubtarget.h 
Message-ID: <200510261750.MAA16447@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/Alpha:

AlphaSubtarget.h updated: 1.2 -> 1.3
---
Log message:

Typo x 2


---
Diffs of the changes:  (+1 -1)

 AlphaSubtarget.h |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/lib/Target/Alpha/AlphaSubtarget.h
diff -u llvm/lib/Target/Alpha/AlphaSubtarget.h:1.2 llvm/lib/Target/Alpha/AlphaSubtarget.h:1.3
--- llvm/lib/Target/Alpha/AlphaSubtarget.h:1.2	Wed Oct 26 12:30:34 2005
+++ llvm/lib/Target/Alpha/AlphaSubtarget.h	Wed Oct 26 12:50:22 2005
@@ -35,7 +35,7 @@
   AlphaSubtarget(const Module &M, const std::string &FS);
   
   /// ParseSubtargetFeatures - Parses features string setting specified 
-  /// subtarget options.  Definition of function is usto generated by tblgen.
+  /// subtarget options.  Definition of function is into generated by tblgen.
   void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU);
 
   bool hasF2I() const { return HasF2I; }





From lattner at cs.uiuc.edu  Wed Oct 26 13:01:22 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed, 26 Oct 2005 13:01:22 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelLowering.cpp 
Message-ID: <200510261801.NAA16575@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/PowerPC:

PPCISelLowering.cpp updated: 1.38 -> 1.39
---
Log message:

Fix an assert compiling MallocBench/gs


---
Diffs of the changes:  (+1 -1)

 PPCISelLowering.cpp |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.38 llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.39
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.38	Tue Oct 25 18:48:36 2005
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp	Wed Oct 26 13:01:11 2005
@@ -217,7 +217,7 @@
         if (LHS.getValueType() == MVT::f32)   // Comparison is always 64-bits
           LHS = DAG.getNode(ISD::FP_EXTEND, MVT::f64, LHS);
         return DAG.getNode(PPCISD::FSEL, ResVT,
-                           DAG.getNode(ISD::FNEG, ResVT, LHS), TV, FV);
+                           DAG.getNode(ISD::FNEG, MVT::f64, LHS), TV, FV);
       }
     
     SDOperand Cmp;





From jlaskey at apple.com  Wed Oct 26 13:08:01 2005
From: jlaskey at apple.com (Jim Laskey)
Date: Wed, 26 Oct 2005 13:08:01 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCSubtarget.h 
Message-ID: <200510261808.NAA16608@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/PowerPC:

PPCSubtarget.h updated: 1.10 -> 1.11
---
Log message:

Typo made worse x 2 - take 2.


---
Diffs of the changes:  (+1 -1)

 PPCSubtarget.h |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/lib/Target/PowerPC/PPCSubtarget.h
diff -u llvm/lib/Target/PowerPC/PPCSubtarget.h:1.10 llvm/lib/Target/PowerPC/PPCSubtarget.h:1.11
--- llvm/lib/Target/PowerPC/PPCSubtarget.h:1.10	Wed Oct 26 12:50:22 2005
+++ llvm/lib/Target/PowerPC/PPCSubtarget.h	Wed Oct 26 13:07:50 2005
@@ -42,7 +42,7 @@
   PPCSubtarget(const Module &M, const std::string &FS);
   
   /// ParseSubtargetFeatures - Parses features string setting specified 
-  /// subtarget options.  Definition of function is into generated by tblgen.
+  /// subtarget options.  Definition of function is auto generated by tblgen.
   void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU);
 
   /// getStackAlignment - Returns the minimum alignment known to hold of the





From jlaskey at apple.com  Wed Oct 26 13:08:02 2005
From: jlaskey at apple.com (Jim Laskey)
Date: Wed, 26 Oct 2005 13:08:02 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaSubtarget.h 
Message-ID: <200510261808.NAA16612@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/Alpha:

AlphaSubtarget.h updated: 1.3 -> 1.4
---
Log message:

Typo made worse x 2 - take 2.


---
Diffs of the changes:  (+1 -1)

 AlphaSubtarget.h |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/lib/Target/Alpha/AlphaSubtarget.h
diff -u llvm/lib/Target/Alpha/AlphaSubtarget.h:1.3 llvm/lib/Target/Alpha/AlphaSubtarget.h:1.4
--- llvm/lib/Target/Alpha/AlphaSubtarget.h:1.3	Wed Oct 26 12:50:22 2005
+++ llvm/lib/Target/Alpha/AlphaSubtarget.h	Wed Oct 26 13:07:50 2005
@@ -35,7 +35,7 @@
   AlphaSubtarget(const Module &M, const std::string &FS);
   
   /// ParseSubtargetFeatures - Parses features string setting specified 
-  /// subtarget options.  Definition of function is into generated by tblgen.
+  /// subtarget options.  Definition of function is auto generated by tblgen.
   void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU);
 
   bool hasF2I() const { return HasF2I; }





From lattner at cs.uiuc.edu  Wed Oct 26 13:41:52 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed, 26 Oct 2005 13:41:52 -0500
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/LiveIntervalAnalysis.cpp
	TwoAddressInstructionPass.cpp 
Message-ID: <200510261841.NAA16749@zion.cs.uiuc.edu>



Changes in directory llvm/lib/CodeGen:

LiveIntervalAnalysis.cpp updated: 1.150 -> 1.151
TwoAddressInstructionPass.cpp updated: 1.30 -> 1.31
---
Log message:

Fix some spello's pointed out by Gabor Greif


---
Diffs of the changes:  (+4 -4)

 LiveIntervalAnalysis.cpp      |    4 ++--
 TwoAddressInstructionPass.cpp |    4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)


Index: llvm/lib/CodeGen/LiveIntervalAnalysis.cpp
diff -u llvm/lib/CodeGen/LiveIntervalAnalysis.cpp:1.150 llvm/lib/CodeGen/LiveIntervalAnalysis.cpp:1.151
--- llvm/lib/CodeGen/LiveIntervalAnalysis.cpp:1.150	Fri Oct 21 01:49:50 2005
+++ llvm/lib/CodeGen/LiveIntervalAnalysis.cpp	Wed Oct 26 13:41:41 2005
@@ -637,7 +637,7 @@
 /// number.  If all of the places that IntA and IntB overlap are defined by
 /// copies from IntA to IntB, we know that these two ranges can really be
 /// merged if we adjust the value numbers.  If it is safe, adjust the value
-/// numbers and return true, allowing coallescing to occur.
+/// numbers and return true, allowing coalescing to occur.
 bool LiveIntervals::
 AdjustIfAllOverlappingRangesAreCopiesFrom(LiveInterval &IntA,
                                           LiveInterval &IntB,
@@ -729,7 +729,7 @@
       // If DestInt is actually a copy from SrcInt (which we know) that is used
       // to define another value of SrcInt, we can change the other range of
       // SrcInt to be the value of the range that defines DestInt, allowing a
-      // coallesce.
+      // coalesce.
       if (!Joinable && DestInt.containsOneValue() &&
           AdjustIfAllOverlappingRangesAreCopiesFrom(SrcInt, DestInt, MIDefIdx))
         Joinable = true;


Index: llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
diff -u llvm/lib/CodeGen/TwoAddressInstructionPass.cpp:1.30 llvm/lib/CodeGen/TwoAddressInstructionPass.cpp:1.31
--- llvm/lib/CodeGen/TwoAddressInstructionPass.cpp:1.30	Thu Apr 21 17:33:33 2005
+++ llvm/lib/CodeGen/TwoAddressInstructionPass.cpp	Wed Oct 26 13:41:41 2005
@@ -46,7 +46,7 @@
   Statistic<> NumTwoAddressInstrs("twoaddressinstruction",
                                   "Number of two-address instructions");
   Statistic<> NumCommuted("twoaddressinstruction",
-                          "Number of instructions commuted to coallesce");
+                          "Number of instructions commuted to coalesce");
   Statistic<> NumConvertedTo3Addr("twoaddressinstruction",
                                 "Number of instructions promoted to 3-address");
 
@@ -127,7 +127,7 @@
 
         // If this instruction is not the killing user of B, see if we can
         // rearrange the code to make it so.  Making it the killing user will
-        // allow us to coallesce A and B together, eliminating the copy we are
+        // allow us to coalesce A and B together, eliminating the copy we are
         // about to insert.
         if (!LV.KillsRegister(mi, regB)) {
           const TargetInstrDescriptor &TID = TII.get(opcode);





From alenhar2 at cs.uiuc.edu  Wed Oct 26 13:44:58 2005
From: alenhar2 at cs.uiuc.edu (Andrew Lenharth)
Date: Wed, 26 Oct 2005 13:44:58 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp
	AlphaInstrInfo.td 
Message-ID: <200510261844.NAA16778@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/Alpha:

AlphaISelDAGToDAG.cpp updated: 1.4 -> 1.5
AlphaInstrInfo.td updated: 1.69 -> 1.70
---
Log message:

int comparison patterns

---
Diffs of the changes:  (+48 -40)

 AlphaISelDAGToDAG.cpp |   28 -----------------------
 AlphaInstrInfo.td     |   60 ++++++++++++++++++++++++++++++++++++++++----------
 2 files changed, 48 insertions(+), 40 deletions(-)


Index: llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp
diff -u llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:1.4 llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:1.5
--- llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:1.4	Tue Oct 25 15:36:10 2005
+++ llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp	Wed Oct 26 13:44:46 2005
@@ -111,34 +111,6 @@
   case ISD::DYNAMIC_STACKALLOC:
     assert(0 && "You want these too?");
 
-  case ISD::SETCC: {
-    ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(2))->get();
-    assert(MVT::isInteger(N->getOperand(0).getValueType()) && "FP numbers are unnecessary");
-    SDOperand Op1 = Select(N->getOperand(0));
-    SDOperand Op2 = Select(N->getOperand(1));
-    unsigned Opc = Alpha::WTF;
-    int dir;
-    switch (CC) {
-    default: N->dump(); assert(0 && "Unknown integer comparison!");
-    case ISD::SETEQ:  Opc = Alpha::CMPEQ; dir=1; break;
-    case ISD::SETLT:  Opc = Alpha::CMPLT; dir = 1; break;
-    case ISD::SETLE:  Opc = Alpha::CMPLE; dir = 1; break;
-    case ISD::SETGT:  Opc = Alpha::CMPLT; dir = 0; break;
-    case ISD::SETGE:  Opc = Alpha::CMPLE; dir = 0; break;
-    case ISD::SETULT: Opc = Alpha::CMPULT; dir = 1; break;
-    case ISD::SETUGT: Opc = Alpha::CMPULT; dir = 0; break;
-    case ISD::SETULE: Opc = Alpha::CMPULE; dir = 1; break;
-    case ISD::SETUGE: Opc = Alpha::CMPULE; dir = 0; break;
-    case ISD::SETNE: {//Handle this one special
-      SDOperand Tmp  = CurDAG->getTargetNode(Alpha::CMPEQ, MVT::i64, Op1, Op2);
-      CurDAG->SelectNodeTo(N, Alpha::CMPEQ, MVT::i64, CurDAG->getRegister(Alpha::R31, MVT::i64), Tmp);
-      return SDOperand(N, 0);
-    }
-    }
-    CurDAG->SelectNodeTo(N, Opc, MVT::i64, dir ? Op1 : Op2, dir ? Op2 : Op1);
-    return SDOperand(N, 0);
-  }
-
   case ISD::BRCOND: {
     SDOperand Chain = Select(N->getOperand(0));
     SDOperand CC = Select(N->getOperand(1));


Index: llvm/lib/Target/Alpha/AlphaInstrInfo.td
diff -u llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.69 llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.70
--- llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.69	Wed Oct 26 12:41:46 2005
+++ llvm/lib/Target/Alpha/AlphaInstrInfo.td	Wed Oct 26 13:44:46 2005
@@ -308,18 +308,54 @@
                       [(set GPRC:$RC, (and GPRC:$RA, immZAP:$L))]>; 
 
 //Comparison, int
-def CMPBGE   : OForm< 0x10, 0x0F, "cmpbge $RA,$RB,$RC", []>; //Compare byte
-def CMPBGEi  : OFormL<0x10, 0x0F, "cmpbge $RA,$L,$RC", []>; //Compare byte
-def CMPEQ    : OForm< 0x10, 0x2D, "cmpeq $RA,$RB,$RC", []>; //Compare signed quadword equal
-def CMPEQi   : OFormL<0x10, 0x2D, "cmpeq $RA,$L,$RC", []>; //Compare signed quadword equal
-def CMPLE    : OForm< 0x10, 0x6D, "cmple $RA,$RB,$RC", []>; //Compare signed quadword less than or equal
-def CMPLEi   : OFormL<0x10, 0x6D, "cmple $RA,$L,$RC", []>; //Compare signed quadword less than or equal
-def CMPLT    : OForm< 0x10, 0x4D, "cmplt $RA,$RB,$RC", []>; //Compare signed quadword less than
-def CMPLTi   : OFormL<0x10, 0x4D, "cmplt $RA,$L,$RC", []>; //Compare signed quadword less than
-def CMPULE   : OForm< 0x10, 0x3D, "cmpule $RA,$RB,$RC", []>; //Compare unsigned quadword less than or equal
-def CMPULEi  : OFormL<0x10, 0x3D, "cmpule $RA,$L,$RC", []>; //Compare unsigned quadword less than or equal
-def CMPULT   : OForm< 0x10, 0x1D, "cmpult $RA,$RB,$RC", []>; //Compare unsigned quadword less than
-def CMPULTi  : OFormL<0x10, 0x1D, "cmpult $RA,$L,$RC", []>; //Compare unsigned quadword less than
+//So this is a waste of what this instruction can do, but it still saves something
+def CMPBGE  : OForm< 0x10, 0x0F, "cmpbge $RA,$RB,$RC", 
+                     [(set GPRC:$RC, (setuge (and GPRC:$RA, 255), (and GPRC:$RB, 255)))]>;
+def CMPBGEi : OFormL<0x10, 0x0F, "cmpbge $RA,$L,$RC",
+                     [(set GPRC:$RC, (setuge (and GPRC:$RA, 255), immUExt8:$L))]>;
+def CMPEQ   : OForm< 0x10, 0x2D, "cmpeq $RA,$RB,$RC", 
+                     [(set GPRC:$RC, (seteq GPRC:$RA, GPRC:$RB))]>;
+def CMPEQi  : OFormL<0x10, 0x2D, "cmpeq $RA,$L,$RC", 
+                     [(set GPRC:$RC, (seteq GPRC:$RA, immUExt8:$L))]>;
+def CMPLE   : OForm< 0x10, 0x6D, "cmple $RA,$RB,$RC", 
+                     [(set GPRC:$RC, (setle GPRC:$RA, GPRC:$RB))]>;
+def CMPLEi  : OFormL<0x10, 0x6D, "cmple $RA,$L,$RC",
+                     [(set GPRC:$RC, (setle GPRC:$RA, immUExt8:$L))]>;
+def CMPLT   : OForm< 0x10, 0x4D, "cmplt $RA,$RB,$RC",
+                     [(set GPRC:$RC, (setlt GPRC:$RA, GPRC:$RB))]>;
+def CMPLTi  : OFormL<0x10, 0x4D, "cmplt $RA,$L,$RC",
+                     [(set GPRC:$RC, (setlt GPRC:$RA, immUExt8:$L))]>;
+def CMPULE  : OForm< 0x10, 0x3D, "cmpule $RA,$RB,$RC",
+                     [(set GPRC:$RC, (setule GPRC:$RA, GPRC:$RB))]>;
+def CMPULEi : OFormL<0x10, 0x3D, "cmpule $RA,$L,$RC",
+                     [(set GPRC:$RC, (setule GPRC:$RA, immUExt8:$L))]>;
+def CMPULT  : OForm< 0x10, 0x1D, "cmpult $RA,$RB,$RC",
+                     [(set GPRC:$RC, (setlt GPRC:$RA, GPRC:$RB))]>;
+def CMPULTi : OFormL<0x10, 0x1D, "cmpult $RA,$L,$RC", 
+                      [(set GPRC:$RC, (setlt GPRC:$RA, immUExt8:$L))]>;
+
+//Patterns for unsupported int comparisons
+def : Pat<(setueq GPRC:$X, GPRC:$Y), (CMPEQ GPRC:$X, GPRC:$Y)>;
+def : Pat<(setueq GPRC:$X, immUExt8:$Y), (CMPEQi GPRC:$X, immUExt8:$Y)>;
+
+def : Pat<(setugt GPRC:$X, GPRC:$Y), (CMPULT GPRC:$Y, GPRC:$X)>;
+def : Pat<(setugt immUExt8:$X, GPRC:$Y), (CMPULTi GPRC:$Y, immUExt8:$X)>;
+
+def : Pat<(setuge GPRC:$X, GPRC:$Y), (CMPULE GPRC:$Y, GPRC:$X)>;
+def : Pat<(setuge immUExt8:$X, GPRC:$Y), (CMPULEi GPRC:$Y, immUExt8:$X)>;
+
+def : Pat<(setgt GPRC:$X, GPRC:$Y), (CMPLT GPRC:$Y, GPRC:$X)>;
+def : Pat<(setgt immUExt8:$X, GPRC:$Y), (CMPLTi GPRC:$Y, immUExt8:$X)>;
+
+def : Pat<(setge GPRC:$X, GPRC:$Y), (CMPLE GPRC:$Y, GPRC:$X)>;
+def : Pat<(setge immUExt8:$X, GPRC:$Y), (CMPLEi GPRC:$Y, immUExt8:$X)>;
+
+def : Pat<(setne GPRC:$X, GPRC:$Y), (CMPEQi (CMPEQ GPRC:$X, GPRC:$Y), 0)>;
+def : Pat<(setne GPRC:$X, immUExt8:$Y), (CMPEQi (CMPEQi GPRC:$X, immUExt8:$Y), 0)>;
+
+def : Pat<(setune GPRC:$X, GPRC:$Y), (CMPEQi (CMPEQ GPRC:$X, GPRC:$Y), 0)>;
+def : Pat<(setune GPRC:$X, immUExt8:$Y), (CMPEQi (CMPEQ GPRC:$X, immUExt8:$Y), 0)>;
+
 
 //Comparison, FP
 def CMPTEQ : FPForm<0x16, 0x5A5, "cmpteq/su $RA,$RB,$RC">;  //Compare T_floating equal





From jlaskey at apple.com  Wed Oct 26 14:06:24 2005
From: jlaskey at apple.com (Jim Laskey)
Date: Wed, 26 Oct 2005 14:06:24 -0500
Subject: [llvm-commits] CVS: llvm-www/developers.cgi 
Message-ID: <200510261906.OAA16982@zion.cs.uiuc.edu>



Changes in directory llvm-www:

developers.cgi updated: 1.3 -> 1.4
---
Log message:

Finally figured out the correct syntax.


---
Diffs of the changes:  (+8 -7)

 developers.cgi |   15 ++++++++-------
 1 files changed, 8 insertions(+), 7 deletions(-)


Index: llvm-www/developers.cgi
diff -u llvm-www/developers.cgi:1.3 llvm-www/developers.cgi:1.4
--- llvm-www/developers.cgi:1.3	Mon Oct 24 20:11:35 2005
+++ llvm-www/developers.cgi	Wed Oct 26 14:06:13 2005
@@ -132,13 +132,14 @@
 # For each developer in sorted order
 for my $Fullname (@Fullnames) {
   # Extract fields
-  my $Name = $Developers{$Fullname}{name};
-  my $Surname = $Developers{$Fullname}{surname};
-  my $HRef = $Developers{$Fullname}{href};
-  my $Image = $Developers{$Fullname}{img};
-  my $Width = $Developers{$Fullname}{width};
-  my $Height = $Developers{$Fullname}{height};
-  my $Alt = $Developers{$Fullname}{alt};
+  my $thisDeveloper = $Developers{$Fullname};
+  my $Name = $thisDeveloper->{name};
+  my $Surname = $thisDeveloper->{surname};
+  my $HRef = $thisDeveloper->{href};
+  my $Image = $thisDeveloper->{img};
+  my $Width = $thisDeveloper->{width};
+  my $Height = $thisDeveloper->{height};
+  my $Alt = $thisDeveloper->{alt};
   
   print "  <tr align=center>\n" if $Column == 0;
   print "    <td>\n";





From jlaskey at apple.com  Wed Oct 26 14:11:05 2005
From: jlaskey at apple.com (Jim Laskey)
Date: Wed, 26 Oct 2005 14:11:05 -0500
Subject: [llvm-commits] CVS: llvm-www/developers.cgi 
Message-ID: <200510261911.OAA17010@zion.cs.uiuc.edu>



Changes in directory llvm-www:

developers.cgi updated: 1.4 -> 1.5
---
Log message:

Consistency

---
Diffs of the changes:  (+8 -8)

 developers.cgi |   16 ++++++++--------
 1 files changed, 8 insertions(+), 8 deletions(-)


Index: llvm-www/developers.cgi
diff -u llvm-www/developers.cgi:1.4 llvm-www/developers.cgi:1.5
--- llvm-www/developers.cgi:1.4	Wed Oct 26 14:06:13 2005
+++ llvm-www/developers.cgi	Wed Oct 26 14:10:54 2005
@@ -132,14 +132,14 @@
 # For each developer in sorted order
 for my $Fullname (@Fullnames) {
   # Extract fields
-  my $thisDeveloper = $Developers{$Fullname};
-  my $Name = $thisDeveloper->{name};
-  my $Surname = $thisDeveloper->{surname};
-  my $HRef = $thisDeveloper->{href};
-  my $Image = $thisDeveloper->{img};
-  my $Width = $thisDeveloper->{width};
-  my $Height = $thisDeveloper->{height};
-  my $Alt = $thisDeveloper->{alt};
+  my $Person = $Developers{$Fullname};
+  my $Name = $Person->{name};
+  my $Surname = $Person->{surname};
+  my $HRef = $Person->{href};
+  my $Image = $Person->{img};
+  my $Width = $Person->{width};
+  my $Height = $Person->{height};
+  my $Alt = $Person->{alt};
   
   print "  <tr align=center>\n" if $Column == 0;
   print "    <td>\n";





From criswell at cs.uiuc.edu  Wed Oct 26 15:35:48 2005
From: criswell at cs.uiuc.edu (John Criswell)
Date: Wed, 26 Oct 2005 15:35:48 -0500
Subject: [llvm-commits] CVS: llvm/lib/Transforms/Utils/Makefile 
Message-ID: <200510262035.PAA20632@choi.cs.uiuc.edu>



Changes in directory llvm/lib/Transforms/Utils:

Makefile updated: 1.6 -> 1.7
---
Log message:

1. Remove libraries no longer created from the list of libraries linked into the
   SparcV9 JIT.
2. Make LLVMTransformUtils a relinked object file and always link it before
   LLVMAnalysis.a.  These two libraries have circular dependencies on each
   other which creates problem when building the SparcV9 JIT.  This change
   fixes the dependency on all platforms problems with a minimum of fuss.



---
Diffs of the changes:  (+0 -1)

 Makefile |    1 -
 1 files changed, 1 deletion(-)


Index: llvm/lib/Transforms/Utils/Makefile
diff -u llvm/lib/Transforms/Utils/Makefile:1.6 llvm/lib/Transforms/Utils/Makefile:1.7
--- llvm/lib/Transforms/Utils/Makefile:1.6	Sun Oct 23 21:26:13 2005
+++ llvm/lib/Transforms/Utils/Makefile	Wed Oct 26 15:35:12 2005
@@ -9,7 +9,6 @@
 
 LEVEL = ../../..
 LIBRARYNAME = LLVMTransformUtils
-BUILD_ARCHIVE = 1
 
 include $(LEVEL)/Makefile.common
 





From criswell at cs.uiuc.edu  Wed Oct 26 15:35:48 2005
From: criswell at cs.uiuc.edu (John Criswell)
Date: Wed, 26 Oct 2005 15:35:48 -0500
Subject: [llvm-commits] CVS: llvm/tools/llvm-ld/Makefile 
Message-ID: <200510262035.PAA20636@choi.cs.uiuc.edu>



Changes in directory llvm/tools/llvm-ld:

Makefile updated: 1.5 -> 1.6
---
Log message:

1. Remove libraries no longer created from the list of libraries linked into the
   SparcV9 JIT.
2. Make LLVMTransformUtils a relinked object file and always link it before
   LLVMAnalysis.a.  These two libraries have circular dependencies on each
   other which creates problem when building the SparcV9 JIT.  This change
   fixes the dependency on all platforms problems with a minimum of fuss.



---
Diffs of the changes:  (+1 -1)

 Makefile |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/tools/llvm-ld/Makefile
diff -u llvm/tools/llvm-ld/Makefile:1.5 llvm/tools/llvm-ld/Makefile:1.6
--- llvm/tools/llvm-ld/Makefile:1.5	Thu Nov 25 14:22:07 2004
+++ llvm/tools/llvm-ld/Makefile	Wed Oct 26 15:35:13 2005
@@ -11,7 +11,7 @@
 
 TOOLNAME = llvm-ld
 USEDLIBS = LLVMipo.a LLVMTransforms.a LLVMScalarOpts.a LLVMAnalysis.a \
-	   LLVMipa.a LLVMTransformUtils.a LLVMTarget.a LLVMLinker.a \
+	   LLVMipa.a LLVMTransformUtils LLVMTarget.a LLVMLinker.a \
 	   LLVMArchive.a LLVMBCReader LLVMBCWriter \
 	   LLVMCore LLVMSupport.a LLVMbzip2 LLVMSystem.a
 





From criswell at cs.uiuc.edu  Wed Oct 26 15:35:48 2005
From: criswell at cs.uiuc.edu (John Criswell)
Date: Wed, 26 Oct 2005 15:35:48 -0500
Subject: [llvm-commits] CVS: llvm/tools/llc/Makefile 
Message-ID: <200510262035.PAA20650@choi.cs.uiuc.edu>



Changes in directory llvm/tools/llc:

Makefile updated: 1.75 -> 1.76
---
Log message:

1. Remove libraries no longer created from the list of libraries linked into the
   SparcV9 JIT.
2. Make LLVMTransformUtils a relinked object file and always link it before
   LLVMAnalysis.a.  These two libraries have circular dependencies on each
   other which creates problem when building the SparcV9 JIT.  This change
   fixes the dependency on all platforms problems with a minimum of fuss.



---
Diffs of the changes:  (+1 -1)

 Makefile |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/tools/llc/Makefile
diff -u llvm/tools/llc/Makefile:1.75 llvm/tools/llc/Makefile:1.76
--- llvm/tools/llc/Makefile:1.75	Tue Oct 25 12:10:30 2005
+++ llvm/tools/llc/Makefile	Wed Oct 26 15:35:12 2005
@@ -70,7 +70,7 @@
 	LLVMipa.a \
 	LLVMTransforms.a \
 	LLVMScalarOpts.a \
-	LLVMTransformUtils.a \
+	LLVMTransformUtils \
 	LLVMAnalysis.a \
 	LLVMBCReader \
 	LLVMBCWriter \





From criswell at cs.uiuc.edu  Wed Oct 26 15:35:48 2005
From: criswell at cs.uiuc.edu (John Criswell)
Date: Wed, 26 Oct 2005 15:35:48 -0500
Subject: [llvm-commits] CVS: llvm/tools/gccld/Makefile 
Message-ID: <200510262035.PAA20664@choi.cs.uiuc.edu>



Changes in directory llvm/tools/gccld:

Makefile updated: 1.12 -> 1.13
---
Log message:

1. Remove libraries no longer created from the list of libraries linked into the
   SparcV9 JIT.
2. Make LLVMTransformUtils a relinked object file and always link it before
   LLVMAnalysis.a.  These two libraries have circular dependencies on each
   other which creates problem when building the SparcV9 JIT.  This change
   fixes the dependency on all platforms problems with a minimum of fuss.



---
Diffs of the changes:  (+1 -1)

 Makefile |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/tools/gccld/Makefile
diff -u llvm/tools/gccld/Makefile:1.12 llvm/tools/gccld/Makefile:1.13
--- llvm/tools/gccld/Makefile:1.12	Sun Apr 24 12:43:38 2005
+++ llvm/tools/gccld/Makefile	Wed Oct 26 15:35:12 2005
@@ -11,7 +11,7 @@
 
 TOOLNAME = gccld
 USEDLIBS = LLVMipo.a LLVMTransforms.a LLVMScalarOpts.a LLVMAnalysis.a \
-           LLVMipa.a LLVMTransformUtils.a LLVMTarget.a LLVMLinker.a \
+           LLVMipa.a LLVMTransformUtils LLVMTarget.a LLVMLinker.a \
            LLVMArchive.a LLVMBCReader LLVMBCWriter \
            LLVMCore LLVMSupport.a LLVMbzip2 LLVMSystem.a
 





From criswell at cs.uiuc.edu  Wed Oct 26 15:35:48 2005
From: criswell at cs.uiuc.edu (John Criswell)
Date: Wed, 26 Oct 2005 15:35:48 -0500
Subject: [llvm-commits] CVS: llvm/tools/llvm-extract/Makefile 
Message-ID: <200510262035.PAA20642@choi.cs.uiuc.edu>



Changes in directory llvm/tools/llvm-extract:

Makefile updated: 1.1 -> 1.2
---
Log message:

1. Remove libraries no longer created from the list of libraries linked into the
   SparcV9 JIT.
2. Make LLVMTransformUtils a relinked object file and always link it before
   LLVMAnalysis.a.  These two libraries have circular dependencies on each
   other which creates problem when building the SparcV9 JIT.  This change
   fixes the dependency on all platforms problems with a minimum of fuss.



---
Diffs of the changes:  (+1 -1)

 Makefile |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/tools/llvm-extract/Makefile
diff -u llvm/tools/llvm-extract/Makefile:1.1 llvm/tools/llvm-extract/Makefile:1.2
--- llvm/tools/llvm-extract/Makefile:1.1	Sun Apr 24 12:35:15 2005
+++ llvm/tools/llvm-extract/Makefile	Wed Oct 26 15:35:12 2005
@@ -10,7 +10,7 @@
 
 TOOLNAME = llvm-extract
 USEDLIBS = LLVMBCReader LLVMBCWriter LLVMTransforms.a LLVMipo.a LLVMTarget.a \
-           LLVMAnalysis.a LLVMTransformUtils.a LLVMipa.a \
+           LLVMAnalysis.a LLVMTransformUtils LLVMipa.a \
            LLVMCore LLVMSupport.a LLVMbzip2 LLVMSystem.a
 
 include $(LEVEL)/Makefile.common





From criswell at cs.uiuc.edu  Wed Oct 26 15:35:48 2005
From: criswell at cs.uiuc.edu (John Criswell)
Date: Wed, 26 Oct 2005 15:35:48 -0500
Subject: [llvm-commits] CVS: llvm/tools/opt/Makefile 
Message-ID: <200510262035.PAA20634@choi.cs.uiuc.edu>



Changes in directory llvm/tools/opt:

Makefile updated: 1.51 -> 1.52
---
Log message:

1. Remove libraries no longer created from the list of libraries linked into the
   SparcV9 JIT.
2. Make LLVMTransformUtils a relinked object file and always link it before
   LLVMAnalysis.a.  These two libraries have circular dependencies on each
   other which creates problem when building the SparcV9 JIT.  This change
   fixes the dependency on all platforms problems with a minimum of fuss.



---
Diffs of the changes:  (+1 -1)

 Makefile |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/tools/opt/Makefile
diff -u llvm/tools/opt/Makefile:1.51 llvm/tools/opt/Makefile:1.52
--- llvm/tools/opt/Makefile:1.51	Sun Oct 23 21:31:05 2005
+++ llvm/tools/opt/Makefile	Wed Oct 26 15:35:13 2005
@@ -11,7 +11,7 @@
 
 USEDLIBS = LLVMBCReader LLVMBCWriter LLVMInstrumentation.a \
 	   LLVMScalarOpts.a LLVMipo.a LLVMipa.a LLVMDataStructure LLVMTransforms.a \
-	   LLVMTarget.a LLVMAnalysis.a LLVMTransformUtils.a LLVMCore LLVMSupport.a \
+	   LLVMTarget.a LLVMAnalysis.a LLVMTransformUtils LLVMCore LLVMSupport.a \
 	   LLVMbzip2 LLVMSystem.a 
 
 include $(LEVEL)/Makefile.common





From criswell at cs.uiuc.edu  Wed Oct 26 15:35:48 2005
From: criswell at cs.uiuc.edu (John Criswell)
Date: Wed, 26 Oct 2005 15:35:48 -0500
Subject: [llvm-commits] CVS: llvm/tools/gccas/Makefile 
Message-ID: <200510262035.PAA20657@choi.cs.uiuc.edu>



Changes in directory llvm/tools/gccas:

Makefile updated: 1.22 -> 1.23
---
Log message:

1. Remove libraries no longer created from the list of libraries linked into the
   SparcV9 JIT.
2. Make LLVMTransformUtils a relinked object file and always link it before
   LLVMAnalysis.a.  These two libraries have circular dependencies on each
   other which creates problem when building the SparcV9 JIT.  This change
   fixes the dependency on all platforms problems with a minimum of fuss.



---
Diffs of the changes:  (+1 -1)

 Makefile |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/tools/gccas/Makefile
diff -u llvm/tools/gccas/Makefile:1.22 llvm/tools/gccas/Makefile:1.23
--- llvm/tools/gccas/Makefile:1.22	Sun Oct 23 20:12:14 2005
+++ llvm/tools/gccas/Makefile	Wed Oct 26 15:35:12 2005
@@ -10,7 +10,7 @@
 
 TOOLNAME = gccas
 USEDLIBS = LLVMAsmParser LLVMBCWriter LLVMTransforms.a LLVMipo.a LLVMipa.a \
-           LLVMScalarOpts.a LLVMAnalysis.a LLVMTarget.a LLVMTransformUtils.a \
+           LLVMScalarOpts.a LLVMAnalysis.a LLVMTarget.a LLVMTransformUtils \
            LLVMCore LLVMSupport.a LLVMbzip2 LLVMSystem.a
 
 include $(LEVEL)/Makefile.common





From criswell at cs.uiuc.edu  Wed Oct 26 15:35:48 2005
From: criswell at cs.uiuc.edu (John Criswell)
Date: Wed, 26 Oct 2005 15:35:48 -0500
Subject: [llvm-commits] CVS: llvm/tools/bugpoint/Makefile 
Message-ID: <200510262035.PAA20640@choi.cs.uiuc.edu>



Changes in directory llvm/tools/bugpoint:

Makefile updated: 1.14 -> 1.15
---
Log message:

1. Remove libraries no longer created from the list of libraries linked into the
   SparcV9 JIT.
2. Make LLVMTransformUtils a relinked object file and always link it before
   LLVMAnalysis.a.  These two libraries have circular dependencies on each
   other which creates problem when building the SparcV9 JIT.  This change
   fixes the dependency on all platforms problems with a minimum of fuss.



---
Diffs of the changes:  (+1 -1)

 Makefile |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/tools/bugpoint/Makefile
diff -u llvm/tools/bugpoint/Makefile:1.14 llvm/tools/bugpoint/Makefile:1.15
--- llvm/tools/bugpoint/Makefile:1.14	Sun Oct 23 21:31:05 2005
+++ llvm/tools/bugpoint/Makefile	Wed Oct 26 15:35:12 2005
@@ -14,7 +14,7 @@
 ANALIBS  = LLVMDataStructure LLVMipa.a LLVMTarget.a 
 
 USEDLIBS = LLVMipo.a LLVMScalarOpts.a $(OPTLIBS) $(ANALIBS) LLVMAnalysis.a \
-	   LLVMTransformUtils.a \
+	   LLVMTransformUtils \
 	   LLVMAsmParser LLVMLinker.a LLVMBCReader LLVMBCWriter \
 	   LLVMCore LLVMSupport.a LLVMbzip2 LLVMSystem.a
 





From criswell at cs.uiuc.edu  Wed Oct 26 15:35:48 2005
From: criswell at cs.uiuc.edu (John Criswell)
Date: Wed, 26 Oct 2005 15:35:48 -0500
Subject: [llvm-commits] CVS: llvm/tools/analyze/Makefile 
Message-ID: <200510262035.PAA20638@choi.cs.uiuc.edu>



Changes in directory llvm/tools/analyze:

Makefile updated: 1.28 -> 1.29
---
Log message:

1. Remove libraries no longer created from the list of libraries linked into the
   SparcV9 JIT.
2. Make LLVMTransformUtils a relinked object file and always link it before
   LLVMAnalysis.a.  These two libraries have circular dependencies on each
   other which creates problem when building the SparcV9 JIT.  This change
   fixes the dependency on all platforms problems with a minimum of fuss.



---
Diffs of the changes:  (+1 -1)

 Makefile |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/tools/analyze/Makefile
diff -u llvm/tools/analyze/Makefile:1.28 llvm/tools/analyze/Makefile:1.29
--- llvm/tools/analyze/Makefile:1.28	Sun Oct 23 20:07:56 2005
+++ llvm/tools/analyze/Makefile	Wed Oct 26 15:35:12 2005
@@ -11,6 +11,6 @@
 USEDLIBS = LLVMAsmParser LLVMBCReader LLVMAnalysis.a LLVMipa.a \
            LLVMDataStructure \
 	   LLVMScalarOpts.a LLVMTransforms.a LLVMTarget.a LLVMScalarOpts.a \
-	   LLVMTransformUtils.a LLVMCore LLVMSupport.a LLVMbzip2 LLVMSystem.a
+	   LLVMTransformUtils LLVMCore LLVMSupport.a LLVMbzip2 LLVMSystem.a
 
 include $(LEVEL)/Makefile.common





From criswell at cs.uiuc.edu  Wed Oct 26 15:35:52 2005
From: criswell at cs.uiuc.edu (John Criswell)
Date: Wed, 26 Oct 2005 15:35:52 -0500
Subject: [llvm-commits] CVS: llvm/Makefile.rules 
Message-ID: <200510262035.PAA20668@choi.cs.uiuc.edu>



Changes in directory llvm:

Makefile.rules updated: 1.333 -> 1.334
---
Log message:

1. Remove libraries no longer created from the list of libraries linked into the
   SparcV9 JIT.
2. Make LLVMTransformUtils a relinked object file and always link it before
   LLVMAnalysis.a.  These two libraries have circular dependencies on each
   other which creates problem when building the SparcV9 JIT.  This change
   fixes the dependency on all platforms problems with a minimum of fuss.


---
Diffs of the changes:  (+3 -3)

 Makefile.rules |    6 +++---
 1 files changed, 3 insertions(+), 3 deletions(-)


Index: llvm/Makefile.rules
diff -u llvm/Makefile.rules:1.333 llvm/Makefile.rules:1.334
--- llvm/Makefile.rules:1.333	Tue Oct 25 12:54:19 2005
+++ llvm/Makefile.rules	Wed Oct 26 15:35:01 2005
@@ -588,9 +588,9 @@
 # What the Sparc JIT requires
 ifdef ENABLE_SPARCV9_JIT
   JIT_LIBS += LLVMSparcV9 LLVMSparcV9ModuloSched LLVMSparcV9InstrSched \
-              LLVMSparcV9LiveVar LLVMInstrumentation.a LLVMProfilePaths \
+              LLVMSparcV9LiveVar LLVMInstrumentation.a \
               LLVMBCWriter LLVMTransforms.a LLVMipo.a LLVMipa.a \
-              LLVMDataStructure.a LLVMSparcV9RegAlloc
+              LLVMDataStructure LLVMSparcV9RegAlloc
 endif
 
 # You can enable the PowerPC JIT on a non-PowerPC host by setting the flag
@@ -617,7 +617,7 @@
   JIT_LIBS += LLVMAlpha LLVMSelectionDAG
 endif
 
-LLVMLIBS := $(JIT_LIBS) LLVMScalarOpts.a LLVMTransformUtils.a LLVMAnalysis.a \
+LLVMLIBS := $(JIT_LIBS) LLVMScalarOpts.a LLVMTransformUtils LLVMAnalysis.a \
             LLVMBCReader LLVMCore LLVMSupport.a LLVMTarget.a LLVMbzip2 \
             LLVMSystem.a $(PLATFORMLIBDL)
 endif





From lattner at cs.uiuc.edu  Wed Oct 26 19:53:27 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed, 26 Oct 2005 19:53:27 -0500
Subject: [llvm-commits] CVS: llvm/projects/Stacker/tools/stkrc/Makefile 
Message-ID: <200510270053.TAA31667@zion.cs.uiuc.edu>



Changes in directory llvm/projects/Stacker/tools/stkrc:

Makefile updated: 1.8 -> 1.9
---
Log message:

Make sure to build things in the right order, build with the .o file, not the
.a file to unbreak the build after john's change


---
Diffs of the changes:  (+2 -2)

 Makefile |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)


Index: llvm/projects/Stacker/tools/stkrc/Makefile
diff -u llvm/projects/Stacker/tools/stkrc/Makefile:1.8 llvm/projects/Stacker/tools/stkrc/Makefile:1.9
--- llvm/projects/Stacker/tools/stkrc/Makefile:1.8	Sun Oct 23 20:52:15 2005
+++ llvm/projects/Stacker/tools/stkrc/Makefile	Wed Oct 26 19:53:16 2005
@@ -9,8 +9,8 @@
 # Give the name of a library.  This will build a dynamic version.
 #
 TOOLNAME = stkrc
-LLVMLIBS = LLVMAsmParser LLVMBCWriter LLVMTransforms.a LLVMipo.a LLVMipa.a \
-	   LLVMScalarOpts.a LLVMAnalysis.a LLVMTarget.a LLVMTransformUtils.a \
+LLVMLIBS = LLVMAsmParser LLVMBCWriter LLVMipo.a \
+	   LLVMScalarOpts.a LLVMTransforms.a LLVMTransformUtils LLVMipa.a LLVMAnalysis.a LLVMTarget.a \
 	   LLVMCore LLVMSupport.a LLVMbzip2 LLVMSystem.a 
 CONFIG_FILES = st
 EXTRA_DIST = st





From jeffc at jolt-lang.org  Wed Oct 26 20:10:51 2005
From: jeffc at jolt-lang.org (Jeff Cohen)
Date: Wed, 26 Oct 2005 20:10:51 -0500
Subject: [llvm-commits] CVS: llvm/win32/dobison.cmd doflex.cmd 
Message-ID: <200510270110.UAA32259@zion.cs.uiuc.edu>



Changes in directory llvm/win32:

dobison.cmd updated: 1.1 -> 1.2
doflex.cmd updated: 1.1 -> 1.2
---
Log message:

Fine tune Visual Studio's use of bison/flex.

---
Diffs of the changes:  (+19 -18)

 dobison.cmd |   20 ++++++++++----------
 doflex.cmd  |   17 +++++++++--------
 2 files changed, 19 insertions(+), 18 deletions(-)


Index: llvm/win32/dobison.cmd
diff -u llvm/win32/dobison.cmd:1.1 llvm/win32/dobison.cmd:1.2
--- llvm/win32/dobison.cmd:1.1	Wed Oct 26 00:37:35 2005
+++ llvm/win32/dobison.cmd	Wed Oct 26 20:10:37 2005
@@ -7,16 +7,16 @@
 
 if "%2"=="debug" (set flags=-tvdo) else (set flags=-vdo)
 
-rem Try and run bison.  If it is present, great.
-bison -p%1 %flags%%3.cpp %4
-if errorlevel 1 goto error
-move %3.hpp %3.h
-goto done
+rem Test for presence of bison.
+bison --help >NUL
+if errorlevel 1 goto nobison
 
-:error
-echo Bison could not run.  Using pre-generated files.
+rem Run bison.
+bison -p%1 %flags%%3.cpp %4 && move %3.hpp %3.h
+exit
+
+:nobison
+echo Bison not found.  Using pre-generated files.
 copy %~pn4.cpp %3.cpp
 copy %~pn4.h %3.h
-
-:done
-exit 0
+exit


Index: llvm/win32/doflex.cmd
diff -u llvm/win32/doflex.cmd:1.1 llvm/win32/doflex.cmd:1.2
--- llvm/win32/doflex.cmd:1.1	Wed Oct 26 00:37:35 2005
+++ llvm/win32/doflex.cmd	Wed Oct 26 20:10:37 2005
@@ -6,14 +6,15 @@
 
 if "%1"=="debug" (set flags=-t) else (set flags=-t)
 
-rem Try and run flex.  If it is present, great.
+rem Test for presence of flex.
+flex --help >NUL
+if errorlevel 1 goto noflex
+
+rem Run flex.
 flex %flags% >%2.cpp %3
-if errorlevel 1 goto error
-goto done
+exit
 
-:error
-echo Flex could not run.  Using pre-generated files.
+:noflex
+echo Flex not found.  Using pre-generated files.
 copy %~pn3.cpp %2.cpp
-
-:done
-exit 0
+exit





From jeffc at jolt-lang.org  Wed Oct 26 20:10:51 2005
From: jeffc at jolt-lang.org (Jeff Cohen)
Date: Wed, 26 Oct 2005 20:10:51 -0500
Subject: [llvm-commits] CVS: llvm/win32/AsmParser/AsmParser.vcproj 
Message-ID: <200510270110.UAA32263@zion.cs.uiuc.edu>



Changes in directory llvm/win32/AsmParser:

AsmParser.vcproj updated: 1.6 -> 1.7
---
Log message:

Fine tune Visual Studio's use of bison/flex.

---
Diffs of the changes:  (+4 -6)

 AsmParser.vcproj |   10 ++++------
 1 files changed, 4 insertions(+), 6 deletions(-)


Index: llvm/win32/AsmParser/AsmParser.vcproj
diff -u llvm/win32/AsmParser/AsmParser.vcproj:1.6 llvm/win32/AsmParser/AsmParser.vcproj:1.7
--- llvm/win32/AsmParser/AsmParser.vcproj:1.6	Wed Oct 26 00:37:35 2005
+++ llvm/win32/AsmParser/AsmParser.vcproj	Wed Oct 26 20:10:37 2005
@@ -133,18 +133,16 @@
 					<Tool
 						Name="VCCustomBuildTool"
 						Description="Bisoning $(InputFileName)"
-						CommandLine="..\dobison.cmd llvmAsm debug $(InputName) $(InputPath)
-"
-						Outputs="$(InputName).cpp;$(InputName).h"/>
+						CommandLine="..\dobison.cmd llvmAsm debug $(InputName) $(InputPath)"
+						Outputs="$(InputName).cpp;$(InputName).h;$(InputName).output"/>
 				</FileConfiguration>
 				<FileConfiguration
 					Name="Release|Win32">
 					<Tool
 						Name="VCCustomBuildTool"
 						Description="Bisoning $(InputFileName)"
-						CommandLine="..\dobison.cmd llvmAsm release $(InputName) $(InputPath)
-"
-						Outputs="$(InputName).cpp;$(InputName).h"/>
+						CommandLine="..\dobison.cmd llvmAsm release $(InputName) $(InputPath)"
+						Outputs="$(InputName).cpp;$(InputName).h;$(InputName).output"/>
 				</FileConfiguration>
 			</File>
 			<File





From jeffc at jolt-lang.org  Wed Oct 26 20:10:52 2005
From: jeffc at jolt-lang.org (Jeff Cohen)
Date: Wed, 26 Oct 2005 20:10:52 -0500
Subject: [llvm-commits] CVS: llvm/win32/Configure/Configure.vcproj 
Message-ID: <200510270110.UAA32267@zion.cs.uiuc.edu>



Changes in directory llvm/win32/Configure:

Configure.vcproj updated: 1.9 -> 1.10
---
Log message:

Fine tune Visual Studio's use of bison/flex.

---
Diffs of the changes:  (+4 -4)

 Configure.vcproj |    8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)


Index: llvm/win32/Configure/Configure.vcproj
diff -u llvm/win32/Configure/Configure.vcproj:1.9 llvm/win32/Configure/Configure.vcproj:1.10
--- llvm/win32/Configure/Configure.vcproj:1.9	Wed Oct 26 09:48:53 2005
+++ llvm/win32/Configure/Configure.vcproj	Wed Oct 26 20:10:37 2005
@@ -102,7 +102,7 @@
 					<Tool
 						Name="VCCustomBuildTool"
 						Description="Generating $(SolutionDir)llvm\Support\DataTypes.h"
-            CommandLine="copy $(InputPath) $(ProjectDir)..\llvm\Support\DataTypes.h"
+						CommandLine="copy $(InputPath) $(ProjectDir)..\llvm\Support\DataTypes.h"
 						Outputs="$(ProjectDir)..\llvm\Support\DataTypes.h"/>
 				</FileConfiguration>
 			</File>
@@ -113,7 +113,7 @@
 					<Tool
 						Name="VCCustomBuildTool"
 						Description="Generating $(SolutionDir)llvm\ADT\hash_map"
-            CommandLine="copy $(InputPath) $(ProjectDir)..\llvm\ADT\hash_map"
+						CommandLine="copy $(InputPath) $(ProjectDir)..\llvm\ADT\hash_map"
 						Outputs="$(ProjectDir)..\llvm\ADT\hash_map"/>
 				</FileConfiguration>
 			</File>
@@ -124,7 +124,7 @@
 					<Tool
 						Name="VCCustomBuildTool"
 						Description="Generating $(SolutionDir)llvm\ADT\hash_set"
-            CommandLine="copy $(InputPath) $(ProjectDir)..\llvm\ADT\hash_set"
+						CommandLine="copy $(InputPath) $(ProjectDir)..\llvm\ADT\hash_set"
 						Outputs="$(ProjectDir)..\llvm\ADT\hash_set"/>
 				</FileConfiguration>
 			</File>
@@ -135,7 +135,7 @@
 					<Tool
 						Name="VCCustomBuildTool"
 						Description="Generating $(SolutionDir)llvm\ADT\iterator"
-            CommandLine="copy $(InputPath) $(ProjectDir)..\llvm\ADT\iterator"
+						CommandLine="copy $(InputPath) $(ProjectDir)..\llvm\ADT\iterator"
 						Outputs="$(ProjectDir)..\llvm\ADT\iterator"/>
 				</FileConfiguration>
 			</File>





From jeffc at jolt-lang.org  Wed Oct 26 20:10:52 2005
From: jeffc at jolt-lang.org (Jeff Cohen)
Date: Wed, 26 Oct 2005 20:10:52 -0500
Subject: [llvm-commits] CVS: llvm/win32/TableGen/TableGen.vcproj 
Message-ID: <200510270110.UAA32271@zion.cs.uiuc.edu>



Changes in directory llvm/win32/TableGen:

TableGen.vcproj updated: 1.17 -> 1.18
---
Log message:

Fine tune Visual Studio's use of bison/flex.

---
Diffs of the changes:  (+4 -6)

 TableGen.vcproj |   10 ++++------
 1 files changed, 4 insertions(+), 6 deletions(-)


Index: llvm/win32/TableGen/TableGen.vcproj
diff -u llvm/win32/TableGen/TableGen.vcproj:1.17 llvm/win32/TableGen/TableGen.vcproj:1.18
--- llvm/win32/TableGen/TableGen.vcproj:1.17	Wed Oct 26 00:37:35 2005
+++ llvm/win32/TableGen/TableGen.vcproj	Wed Oct 26 20:10:37 2005
@@ -161,18 +161,16 @@
 					<Tool
 						Name="VCCustomBuildTool"
 						Description="Bisoning $(InputFileName)"
-						CommandLine="..\dobison.cmd File debug $(InputName) $(InputPath)
-"
-						Outputs="$(InputName).cpp;$(InputName).h"/>
+						CommandLine="..\dobison.cmd File debug $(InputName) $(InputPath)"
+						Outputs="$(InputName).cpp;$(InputName).h;$(InputName).output"/>
 				</FileConfiguration>
 				<FileConfiguration
 					Name="Release|Win32">
 					<Tool
 						Name="VCCustomBuildTool"
 						Description="Bisoning $(InputFileName)"
-						CommandLine="..\dobison.cmd File release $(InputName) $(InputPath)
-"
-						Outputs="$(InputName).cpp;$(InputName).h"/>
+						CommandLine="..\dobison.cmd File release $(InputName) $(InputPath)"
+						Outputs="$(InputName).cpp;$(InputName).h;$(InputName).output"/>
 				</FileConfiguration>
 			</File>
 			<File





From lattner at cs.uiuc.edu  Thu Oct 27 00:06:49 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu, 27 Oct 2005 00:06:49 -0500
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp 
Message-ID: <200510270506.AAA00751@zion.cs.uiuc.edu>



Changes in directory llvm/lib/CodeGen/SelectionDAG:

DAGCombiner.cpp updated: 1.55 -> 1.56
---
Log message:

Add a simple xform that is useful for bitfield operations.


---
Diffs of the changes:  (+9 -0)

 DAGCombiner.cpp |    9 +++++++++
 1 files changed, 9 insertions(+)


Index: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.55 llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.56
--- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.55	Tue Oct 25 13:57:30 2005
+++ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp	Thu Oct 27 00:06:38 2005
@@ -1103,7 +1103,16 @@
     if (N01C)
       return DAG.getNode(ISD::OR, VT, N0.getOperand(0),
                          DAG.getConstant(N1C->getValue()|N01C->getValue(), VT));
+  } else if (N1C && N0.getOpcode() == ISD::AND && N0.Val->hasOneUse() &&
+             isa<ConstantSDNode>(N0.getOperand(1))) {
+    // Canonicalize (or (and X, c1), c2) -> (and (or X, c2), c1|c2)
+    ConstantSDNode *C1 = cast<ConstantSDNode>(N0.getOperand(1));
+    return DAG.getNode(ISD::AND, VT, DAG.getNode(ISD::OR, VT, N0.getOperand(0),
+                                                 N1),
+                       DAG.getConstant(N1C->getValue() | C1->getValue(), VT));
   }
+  
+  
   // fold (or (setcc x), (setcc y)) -> (setcc (or x, y))
   if (isSetCCEquivalent(N0, LL, LR, CC0) && isSetCCEquivalent(N1, RL, RR, CC1)){
     ISD::CondCode Op0 = cast<CondCodeSDNode>(CC0)->get();





From lattner at cs.uiuc.edu  Thu Oct 27 00:54:07 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu, 27 Oct 2005 00:54:07 -0500
Subject: [llvm-commits] 
	CVS: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
Message-ID: <200510270554.AAA01178@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Transforms/Scalar:

InstructionCombining.cpp updated: 1.393 -> 1.394
---
Log message:

Minor change to this file to support obscure cases with constant array amounts


---
Diffs of the changes:  (+16 -5)

 InstructionCombining.cpp |   21 ++++++++++++++++-----
 1 files changed, 16 insertions(+), 5 deletions(-)


Index: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
diff -u llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.393 llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.394
--- llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.393	Wed Oct 26 12:18:16 2005
+++ llvm/lib/Transforms/Scalar/InstructionCombining.cpp	Thu Oct 27 00:53:56 2005
@@ -1709,7 +1709,6 @@
   return InsertNewInstBefore(New, I);
 }
 
-
 Instruction *InstCombiner::visitAnd(BinaryOperator &I) {
   bool Changed = SimplifyCommutative(I);
   Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1);
@@ -3776,7 +3775,7 @@
 Instruction *InstCombiner::PromoteCastOfAllocation(CastInst &CI,
                                                    AllocationInst &AI) {
   const PointerType *PTy = dyn_cast<PointerType>(CI.getType());
-  if (AI.isArrayAllocation() || !PTy) return 0;
+  if (!PTy) return 0;   // Not casting the allocation to a pointer type.
   
   // Remove any uses of AI that are dead.
   assert(!CI.use_empty() && "Dead instructions should be removed earlier!");
@@ -3813,12 +3812,23 @@
 
   uint64_t AllocElTySize = TD->getTypeSize(AllocElTy);
   uint64_t CastElTySize = TD->getTypeSize(CastElTy);
+  if (CastElTySize == 0 || AllocElTySize == 0) return 0;
 
   // If the allocation is for an even multiple of the cast type size
-  if (CastElTySize == 0 || AllocElTySize % CastElTySize != 0)
+  Value *Amt = 0;
+  if (AllocElTySize % CastElTySize == 0) {
+    Amt = ConstantUInt::get(Type::UIntTy, AllocElTySize/CastElTySize);
+    if (ConstantUInt *CI = dyn_cast<ConstantUInt>(AI.getOperand(0)))
+      Amt = ConstantExpr::getMul(CI, cast<ConstantUInt>(Amt));
+    else {
+      // Perform an explicit scale.
+      Instruction *Tmp = BinaryOperator::createMul(Amt, AI.getOperand(0),"tmp");
+      Amt = InsertNewInstBefore(Tmp, AI);
+    }
+  } else {
     return 0;
-  Value *Amt = ConstantUInt::get(Type::UIntTy,
-                                 AllocElTySize/CastElTySize);
+  }
+  
   std::string Name = AI.getName(); AI.setName("");
   AllocationInst *New;
   if (isa<MallocInst>(AI))
@@ -4061,6 +4071,7 @@
         break;
       }
     }
+      
   return 0;
 }
 





From lattner at cs.uiuc.edu  Thu Oct 27 01:12:11 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu, 27 Oct 2005 01:12:11 -0500
Subject: [llvm-commits] 
	CVS: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
Message-ID: <200510270612.BAA01288@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Transforms/Scalar:

InstructionCombining.cpp updated: 1.394 -> 1.395
---
Log message:

Promote cases like cast (malloc sbyte, 100) to int* into 
(malloc [25 x int]) directly without having to convert to 
(malloc [100 x sbyte]) first.


---
Diffs of the changes:  (+22 -1)

 InstructionCombining.cpp |   23 ++++++++++++++++++++++-
 1 files changed, 22 insertions(+), 1 deletion(-)


Index: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
diff -u llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.394 llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.395
--- llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.394	Thu Oct 27 00:53:56 2005
+++ llvm/lib/Transforms/Scalar/InstructionCombining.cpp	Thu Oct 27 01:12:00 2005
@@ -3826,7 +3826,28 @@
       Amt = InsertNewInstBefore(Tmp, AI);
     }
   } else {
-    return 0;
+    // See if we can satisfy the modulus by pulling a scale out of the array
+    // size argument.
+    unsigned ArraySizeScale = 1;
+    Value *NumElements = AI.getOperand(0);
+    
+    if (ConstantUInt *CI = dyn_cast<ConstantUInt>(NumElements)) {
+      ArraySizeScale = CI->getValue();
+      NumElements = ConstantUInt::get(Type::UIntTy, 1);
+    }
+    
+    // If we can now satisfy the modulus, by using a non-1 scale, we really can
+    // do the xform.
+    if ((AllocElTySize*ArraySizeScale) % CastElTySize != 0) return 0;
+
+    Amt = ConstantUInt::get(Type::UIntTy, 
+                            (AllocElTySize*ArraySizeScale)/CastElTySize);
+    if (ConstantUInt *CI = dyn_cast<ConstantUInt>(NumElements))
+      Amt = ConstantExpr::getMul(CI, cast<ConstantUInt>(Amt));
+    else {
+      Instruction *Tmp = BinaryOperator::createMul(Amt, NumElements, "tmp");
+      Amt = InsertNewInstBefore(Tmp, AI);
+    }
   }
   
   std::string Name = AI.getName(); AI.setName("");





From lattner at cs.uiuc.edu  Thu Oct 27 01:24:58 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu, 27 Oct 2005 01:24:58 -0500
Subject: [llvm-commits] 
	CVS: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
Message-ID: <200510270624.BAA01403@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Transforms/Scalar:

InstructionCombining.cpp updated: 1.395 -> 1.396
---
Log message:

Teach instcombine to promote stuff like (cast (malloc sbyte, 8*X) to int*)
into: malloc int, (2*X)



---
Diffs of the changes:  (+26 -7)

 InstructionCombining.cpp |   33 ++++++++++++++++++++++++++-------
 1 files changed, 26 insertions(+), 7 deletions(-)


Index: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
diff -u llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.395 llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.396
--- llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.395	Thu Oct 27 01:12:00 2005
+++ llvm/lib/Transforms/Scalar/InstructionCombining.cpp	Thu Oct 27 01:24:46 2005
@@ -3834,19 +3834,38 @@
     if (ConstantUInt *CI = dyn_cast<ConstantUInt>(NumElements)) {
       ArraySizeScale = CI->getValue();
       NumElements = ConstantUInt::get(Type::UIntTy, 1);
+    } else if (ShiftInst *SI = dyn_cast<ShiftInst>(NumElements)) {
+      if (SI->getOpcode() == Instruction::Shl)
+        if (ConstantUInt *CUI = dyn_cast<ConstantUInt>(SI->getOperand(1))) {
+          // This is a value scaled by '1 << the shift amt'.
+          NumElements = SI->getOperand(0);
+          ArraySizeScale = 1U << CUI->getValue();
+        }
+    } else if (isa<Instruction>(NumElements) &&
+               cast<Instruction>(NumElements)->getOpcode() == Instruction::Mul){
+      BinaryOperator *BO = cast<BinaryOperator>(NumElements);
+      if (ConstantUInt *Scale = cast<ConstantUInt>(BO->getOperand(1))) {
+        // This value is scaled by 'Scale'.
+        NumElements = BO->getOperand(0);
+        ArraySizeScale = Scale->getValue();
+      }
     }
     
     // If we can now satisfy the modulus, by using a non-1 scale, we really can
     // do the xform.
     if ((AllocElTySize*ArraySizeScale) % CastElTySize != 0) return 0;
 
-    Amt = ConstantUInt::get(Type::UIntTy, 
-                            (AllocElTySize*ArraySizeScale)/CastElTySize);
-    if (ConstantUInt *CI = dyn_cast<ConstantUInt>(NumElements))
-      Amt = ConstantExpr::getMul(CI, cast<ConstantUInt>(Amt));
-    else {
-      Instruction *Tmp = BinaryOperator::createMul(Amt, NumElements, "tmp");
-      Amt = InsertNewInstBefore(Tmp, AI);
+    unsigned Scale = (AllocElTySize*ArraySizeScale)/CastElTySize;
+    if (Scale == 1) {
+      Amt = NumElements;
+    } else {
+      Amt = ConstantUInt::get(Type::UIntTy, Scale);
+      if (ConstantUInt *CI = dyn_cast<ConstantUInt>(NumElements))
+        Amt = ConstantExpr::getMul(CI, cast<ConstantUInt>(Amt));
+      else if (cast<ConstantUInt>(Amt)->getValue() == 1) {
+        Instruction *Tmp = BinaryOperator::createMul(Amt, NumElements, "tmp");
+        Amt = InsertNewInstBefore(Tmp, AI);
+      }
     }
   }
   





From lattner at cs.uiuc.edu  Thu Oct 27 01:26:37 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu, 27 Oct 2005 01:26:37 -0500
Subject: [llvm-commits] 
	CVS: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
Message-ID: <200510270626.BAA01470@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Transforms/Scalar:

InstructionCombining.cpp updated: 1.396 -> 1.397
---
Log message:

Fix typo


---
Diffs of the changes:  (+1 -1)

 InstructionCombining.cpp |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
diff -u llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.396 llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.397
--- llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.396	Thu Oct 27 01:24:46 2005
+++ llvm/lib/Transforms/Scalar/InstructionCombining.cpp	Thu Oct 27 01:26:26 2005
@@ -3844,7 +3844,7 @@
     } else if (isa<Instruction>(NumElements) &&
                cast<Instruction>(NumElements)->getOpcode() == Instruction::Mul){
       BinaryOperator *BO = cast<BinaryOperator>(NumElements);
-      if (ConstantUInt *Scale = cast<ConstantUInt>(BO->getOperand(1))) {
+      if (ConstantUInt *Scale = dyn_cast<ConstantUInt>(BO->getOperand(1))) {
         // This value is scaled by 'Scale'.
         NumElements = BO->getOperand(0);
         ArraySizeScale = Scale->getValue();





From lattner at cs.uiuc.edu  Thu Oct 27 02:10:47 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu, 27 Oct 2005 02:10:47 -0500
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp 
Message-ID: <200510270710.CAA02060@zion.cs.uiuc.edu>



Changes in directory llvm/lib/CodeGen/SelectionDAG:

DAGCombiner.cpp updated: 1.56 -> 1.57
---
Log message:

Fix DSE to not nuke dead stores unless they redundant store is the same
VT as the killing one.  Fix fixes PR491: http://llvm.cs.uiuc.edu/PR491 


---
Diffs of the changes:  (+4 -1)

 DAGCombiner.cpp |    5 ++++-
 1 files changed, 4 insertions(+), 1 deletion(-)


Index: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.56 llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.57
--- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.56	Thu Oct 27 00:06:38 2005
+++ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp	Thu Oct 27 02:10:34 2005
@@ -1976,7 +1976,10 @@
  
   // If this is a store that kills a previous store, remove the previous store.
   if (Chain.getOpcode() == ISD::STORE && Chain.getOperand(2) == Ptr &&
-      Chain.Val->hasOneUse() /* Avoid introducing DAG cycles */) {
+      Chain.Val->hasOneUse() /* Avoid introducing DAG cycles */ &&
+      // Make sure that these stores are the same value type:
+      // FIXME: we really care that the second store is >= size of the first.
+      Value.getValueType() == Chain.getOperand(1).getValueType()) {
     // Create a new store of Value that replaces both stores.
     SDNode *PrevStore = Chain.Val;
     if (PrevStore->getOperand(1) == Value) // Same value multiply stored.





From alkis at cs.uiuc.edu  Thu Oct 27 08:23:41 2005
From: alkis at cs.uiuc.edu (Alkis Evlogimenos)
Date: Thu, 27 Oct 2005 08:23:41 -0500
Subject: [llvm-commits] CVS: llvm-java/tools/classdump/Makefile 
Message-ID: <200510271323.IAA03901@zion.cs.uiuc.edu>



Changes in directory llvm-java/tools/classdump:

Makefile updated: 1.8 -> 1.9
---
Log message:

Unbreak the build after build system changes

---
Diffs of the changes:  (+1 -1)

 Makefile |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm-java/tools/classdump/Makefile
diff -u llvm-java/tools/classdump/Makefile:1.8 llvm-java/tools/classdump/Makefile:1.9
--- llvm-java/tools/classdump/Makefile:1.8	Thu Dec  2 15:51:12 2004
+++ llvm-java/tools/classdump/Makefile	Thu Oct 27 08:23:30 2005
@@ -10,7 +10,7 @@
 
 TOOLNAME := classdump
 
-USEDLIBS := LLVMJavaClassfile
+USEDLIBS := LLVMJavaClassfile.a
 LLVMLIBS := LLVMCore LLVMSupport.a LLVMbzip2 LLVMSystem.a
 
 include $(LEVEL)/Makefile.common





From alkis at cs.uiuc.edu  Thu Oct 27 08:23:42 2005
From: alkis at cs.uiuc.edu (Alkis Evlogimenos)
Date: Thu, 27 Oct 2005 08:23:42 -0500
Subject: [llvm-commits] CVS: llvm-java/tools/class2llvm/Makefile 
Message-ID: <200510271323.IAA03905@zion.cs.uiuc.edu>



Changes in directory llvm-java/tools/class2llvm:

Makefile updated: 1.9 -> 1.10
---
Log message:

Unbreak the build after build system changes

---
Diffs of the changes:  (+1 -1)

 Makefile |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm-java/tools/class2llvm/Makefile
diff -u llvm-java/tools/class2llvm/Makefile:1.9 llvm-java/tools/class2llvm/Makefile:1.10
--- llvm-java/tools/class2llvm/Makefile:1.9	Mon Mar 28 09:35:54 2005
+++ llvm-java/tools/class2llvm/Makefile	Thu Oct 27 08:23:30 2005
@@ -10,7 +10,7 @@
 
 TOOLNAME := class2llvm
 
-USEDLIBS := LLVMJavaClassfile LLVMJavaCompiler
+USEDLIBS := LLVMJavaCompiler.a LLVMJavaClassfile.a
 LLVMLIBS := LLVMBCWriter LLVMCore LLVMSupport.a LLVMbzip2 LLVMSystem.a
 
 include $(LEVEL)/Makefile.common





From criswell at cs.uiuc.edu  Thu Oct 27 10:55:02 2005
From: criswell at cs.uiuc.edu (John Criswell)
Date: Thu, 27 Oct 2005 10:55:02 -0500
Subject: [llvm-commits] CVS: llvm/Makefile.rules 
Message-ID: <200510271555.KAA14430@choi.cs.uiuc.edu>



Changes in directory llvm:

Makefile.rules updated: 1.334 -> 1.335
---
Log message:

Move some constant folding code shared by Analysis and Transform passes
into the LLVMAnalysis library.
This allows LLVMTranform and LLVMTransformUtils to be archives and linked
with LLVMAnalysis.a, which provides any missing definitions.


---
Diffs of the changes:  (+1 -1)

 Makefile.rules |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/Makefile.rules
diff -u llvm/Makefile.rules:1.334 llvm/Makefile.rules:1.335
--- llvm/Makefile.rules:1.334	Wed Oct 26 15:35:01 2005
+++ llvm/Makefile.rules	Thu Oct 27 10:54:28 2005
@@ -617,7 +617,7 @@
   JIT_LIBS += LLVMAlpha LLVMSelectionDAG
 endif
 
-LLVMLIBS := $(JIT_LIBS) LLVMScalarOpts.a LLVMTransformUtils LLVMAnalysis.a \
+LLVMLIBS := $(JIT_LIBS) LLVMScalarOpts.a LLVMTransformUtils.a LLVMAnalysis.a \
             LLVMBCReader LLVMCore LLVMSupport.a LLVMTarget.a LLVMbzip2 \
             LLVMSystem.a $(PLATFORMLIBDL)
 endif





From criswell at cs.uiuc.edu  Thu Oct 27 10:55:13 2005
From: criswell at cs.uiuc.edu (John Criswell)
Date: Thu, 27 Oct 2005 10:55:13 -0500
Subject: [llvm-commits] CVS: llvm/tools/gccld/Makefile 
Message-ID: <200510271555.KAA14436@choi.cs.uiuc.edu>



Changes in directory llvm/tools/gccld:

Makefile updated: 1.13 -> 1.14
---
Log message:

Move some constant folding code shared by Analysis and Transform passes
into the LLVMAnalysis library.
This allows LLVMTranform and LLVMTransformUtils to be archives and linked
with LLVMAnalysis.a, which provides any missing definitions.



---
Diffs of the changes:  (+1 -1)

 Makefile |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/tools/gccld/Makefile
diff -u llvm/tools/gccld/Makefile:1.13 llvm/tools/gccld/Makefile:1.14
--- llvm/tools/gccld/Makefile:1.13	Wed Oct 26 15:35:12 2005
+++ llvm/tools/gccld/Makefile	Thu Oct 27 10:54:33 2005
@@ -11,7 +11,7 @@
 
 TOOLNAME = gccld
 USEDLIBS = LLVMipo.a LLVMTransforms.a LLVMScalarOpts.a LLVMAnalysis.a \
-           LLVMipa.a LLVMTransformUtils LLVMTarget.a LLVMLinker.a \
+           LLVMipa.a LLVMTransformUtils.a LLVMTarget.a LLVMLinker.a \
            LLVMArchive.a LLVMBCReader LLVMBCWriter \
            LLVMCore LLVMSupport.a LLVMbzip2 LLVMSystem.a
 





From criswell at cs.uiuc.edu  Thu Oct 27 10:55:13 2005
From: criswell at cs.uiuc.edu (John Criswell)
Date: Thu, 27 Oct 2005 10:55:13 -0500
Subject: [llvm-commits] CVS: llvm/tools/llvm-extract/Makefile 
Message-ID: <200510271555.KAA14440@choi.cs.uiuc.edu>



Changes in directory llvm/tools/llvm-extract:

Makefile updated: 1.2 -> 1.3
---
Log message:

Move some constant folding code shared by Analysis and Transform passes
into the LLVMAnalysis library.
This allows LLVMTranform and LLVMTransformUtils to be archives and linked
with LLVMAnalysis.a, which provides any missing definitions.



---
Diffs of the changes:  (+1 -1)

 Makefile |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/tools/llvm-extract/Makefile
diff -u llvm/tools/llvm-extract/Makefile:1.2 llvm/tools/llvm-extract/Makefile:1.3
--- llvm/tools/llvm-extract/Makefile:1.2	Wed Oct 26 15:35:12 2005
+++ llvm/tools/llvm-extract/Makefile	Thu Oct 27 10:54:34 2005
@@ -10,7 +10,7 @@
 
 TOOLNAME = llvm-extract
 USEDLIBS = LLVMBCReader LLVMBCWriter LLVMTransforms.a LLVMipo.a LLVMTarget.a \
-           LLVMAnalysis.a LLVMTransformUtils LLVMipa.a \
+           LLVMAnalysis.a LLVMTransformUtils.a LLVMipa.a \
            LLVMCore LLVMSupport.a LLVMbzip2 LLVMSystem.a
 
 include $(LEVEL)/Makefile.common





From criswell at cs.uiuc.edu  Thu Oct 27 10:55:14 2005
From: criswell at cs.uiuc.edu (John Criswell)
Date: Thu, 27 Oct 2005 10:55:14 -0500
Subject: [llvm-commits] CVS: llvm/tools/analyze/Makefile 
Message-ID: <200510271555.KAA14449@choi.cs.uiuc.edu>



Changes in directory llvm/tools/analyze:

Makefile updated: 1.29 -> 1.30
---
Log message:

Move some constant folding code shared by Analysis and Transform passes
into the LLVMAnalysis library.
This allows LLVMTranform and LLVMTransformUtils to be archives and linked
with LLVMAnalysis.a, which provides any missing definitions.



---
Diffs of the changes:  (+1 -1)

 Makefile |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/tools/analyze/Makefile
diff -u llvm/tools/analyze/Makefile:1.29 llvm/tools/analyze/Makefile:1.30
--- llvm/tools/analyze/Makefile:1.29	Wed Oct 26 15:35:12 2005
+++ llvm/tools/analyze/Makefile	Thu Oct 27 10:54:33 2005
@@ -11,6 +11,6 @@
 USEDLIBS = LLVMAsmParser LLVMBCReader LLVMAnalysis.a LLVMipa.a \
            LLVMDataStructure \
 	   LLVMScalarOpts.a LLVMTransforms.a LLVMTarget.a LLVMScalarOpts.a \
-	   LLVMTransformUtils LLVMCore LLVMSupport.a LLVMbzip2 LLVMSystem.a
+	   LLVMTransformUtils.a LLVMCore LLVMSupport.a LLVMbzip2 LLVMSystem.a
 
 include $(LEVEL)/Makefile.common





From criswell at cs.uiuc.edu  Thu Oct 27 10:55:14 2005
From: criswell at cs.uiuc.edu (John Criswell)
Date: Thu, 27 Oct 2005 10:55:14 -0500
Subject: [llvm-commits] CVS: llvm/tools/llc/Makefile 
Message-ID: <200510271555.KAA14460@choi.cs.uiuc.edu>



Changes in directory llvm/tools/llc:

Makefile updated: 1.76 -> 1.77
---
Log message:

Move some constant folding code shared by Analysis and Transform passes
into the LLVMAnalysis library.
This allows LLVMTranform and LLVMTransformUtils to be archives and linked
with LLVMAnalysis.a, which provides any missing definitions.



---
Diffs of the changes:  (+1 -1)

 Makefile |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/tools/llc/Makefile
diff -u llvm/tools/llc/Makefile:1.76 llvm/tools/llc/Makefile:1.77
--- llvm/tools/llc/Makefile:1.76	Wed Oct 26 15:35:12 2005
+++ llvm/tools/llc/Makefile	Thu Oct 27 10:54:34 2005
@@ -70,7 +70,7 @@
 	LLVMipa.a \
 	LLVMTransforms.a \
 	LLVMScalarOpts.a \
-	LLVMTransformUtils \
+	LLVMTransformUtils.a \
 	LLVMAnalysis.a \
 	LLVMBCReader \
 	LLVMBCWriter \





From criswell at cs.uiuc.edu  Thu Oct 27 10:55:13 2005
From: criswell at cs.uiuc.edu (John Criswell)
Date: Thu, 27 Oct 2005 10:55:13 -0500
Subject: [llvm-commits] CVS: llvm/lib/Transforms/Utils/Local.cpp Makefile 
Message-ID: <200510271555.KAA14438@choi.cs.uiuc.edu>



Changes in directory llvm/lib/Transforms/Utils:

Local.cpp updated: 1.44 -> 1.45
Makefile updated: 1.7 -> 1.8
---
Log message:

Move some constant folding code shared by Analysis and Transform passes
into the LLVMAnalysis library.
This allows LLVMTranform and LLVMTransformUtils to be archives and linked
with LLVMAnalysis.a, which provides any missing definitions.



---
Diffs of the changes:  (+2 -142)

 Local.cpp |  143 --------------------------------------------------------------
 Makefile  |    1 
 2 files changed, 2 insertions(+), 142 deletions(-)


Index: llvm/lib/Transforms/Utils/Local.cpp
diff -u llvm/lib/Transforms/Utils/Local.cpp:1.44 llvm/lib/Transforms/Utils/Local.cpp:1.45
--- llvm/lib/Transforms/Utils/Local.cpp:1.44	Tue Sep 27 20:34:32 2005
+++ llvm/lib/Transforms/Utils/Local.cpp	Thu Oct 27 10:54:33 2005
@@ -12,6 +12,7 @@
 //
 //===----------------------------------------------------------------------===//
 
+#include "llvm/Analysis/ConstantFolding.h"
 #include "llvm/Transforms/Utils/Local.h"
 #include "llvm/Constants.h"
 #include "llvm/DerivedTypes.h"
@@ -234,148 +235,6 @@
   return false;
 }
 
-/// canConstantFoldCallTo - Return true if its even possible to fold a call to
-/// the specified function.
-bool llvm::canConstantFoldCallTo(Function *F) {
-  const std::string &Name = F->getName();
-
-  switch (F->getIntrinsicID()) {
-  case Intrinsic::isunordered:
-  case Intrinsic::sqrt:
-    return true;
-  default: break;
-  }
-
-  switch (Name[0])
-  {
-    case 'a':
-      return Name == "acos" || Name == "asin" || Name == "atan" ||
-             Name == "atan2";
-    case 'c':
-      return Name == "ceil" || Name == "cos" || Name == "cosf" ||
-             Name == "cosh";
-    case 'e':
-      return Name == "exp";
-    case 'f':
-      return Name == "fabs" || Name == "fmod" || Name == "floor";
-    case 'l':
-      return Name == "log" || Name == "log10";
-    case 'p':
-      return Name == "pow";
-    case 's':
-      return Name == "sin" || Name == "sinh" || Name == "sqrt";
-    case 't':
-      return Name == "tan" || Name == "tanh";
-    default:
-      return false;
-  }
-}
-
-static Constant *ConstantFoldFP(double (*NativeFP)(double), double V,
-                                const Type *Ty) {
-  errno = 0;
-  V = NativeFP(V);
-  if (errno == 0)
-    return ConstantFP::get(Ty, V);
-  return 0;
-}
-
-/// ConstantFoldCall - Attempt to constant fold a call to the specified function
-/// with the specified arguments, returning null if unsuccessful.
-Constant *llvm::ConstantFoldCall(Function *F,
-                                 const std::vector<Constant*> &Operands) {
-  const std::string &Name = F->getName();
-  const Type *Ty = F->getReturnType();
-
-  if (Operands.size() == 1) {
-    if (ConstantFP *Op = dyn_cast<ConstantFP>(Operands[0])) {
-      double V = Op->getValue();
-      switch (Name[0])
-      {
-        case 'a':
-          if (Name == "acos")
-            return ConstantFoldFP(acos, V, Ty);
-          else if (Name == "asin")
-            return ConstantFoldFP(asin, V, Ty);
-          else if (Name == "atan")
-            return ConstantFP::get(Ty, atan(V));
-          break;
-        case 'c':
-          if (Name == "ceil")
-            return ConstantFoldFP(ceil, V, Ty);
-          else if (Name == "cos")
-            return ConstantFP::get(Ty, cos(V));
-          else if (Name == "cosh")
-            return ConstantFP::get(Ty, cosh(V));
-          break;
-        case 'e':
-          if (Name == "exp")
-            return ConstantFP::get(Ty, exp(V));
-          break;
-        case 'f':
-          if (Name == "fabs")
-            return ConstantFP::get(Ty, fabs(V));
-          else if (Name == "floor")
-            return ConstantFoldFP(floor, V, Ty);
-          break;
-        case 'l':
-          if (Name == "log" && V > 0)
-            return ConstantFP::get(Ty, log(V));
-          else if (Name == "log10" && V > 0)
-            return ConstantFoldFP(log10, V, Ty);
-          else if (Name == "llvm.sqrt") {
-            if (V >= -0.0)
-              return ConstantFP::get(Ty, sqrt(V));
-            else // Undefined
-              return ConstantFP::get(Ty, 0.0);
-          }
-          break;
-        case 's':
-          if (Name == "sin")
-            return ConstantFP::get(Ty, sin(V));
-          else if (Name == "sinh")
-            return ConstantFP::get(Ty, sinh(V));
-          else if (Name == "sqrt" && V >= 0)
-            return ConstantFP::get(Ty, sqrt(V));
-          break;
-        case 't':
-          if (Name == "tan")
-            return ConstantFP::get(Ty, tan(V));
-          else if (Name == "tanh")
-            return ConstantFP::get(Ty, tanh(V));
-          break;
-        default:
-          break;
-      }
-    }
-  } else if (Operands.size() == 2) {
-    if (ConstantFP *Op1 = dyn_cast<ConstantFP>(Operands[0])) {
-      double Op1V = Op1->getValue();
-      if (ConstantFP *Op2 = dyn_cast<ConstantFP>(Operands[1])) {
-        double Op2V = Op2->getValue();
-
-        if (Name == "llvm.isunordered")
-          return ConstantBool::get(IsNAN(Op1V) || IsNAN(Op2V));
-        else
-        if (Name == "pow") {
-          errno = 0;
-          double V = pow(Op1V, Op2V);
-          if (errno == 0)
-            return ConstantFP::get(Ty, V);
-        } else if (Name == "fmod") {
-          errno = 0;
-          double V = fmod(Op1V, Op2V);
-          if (errno == 0)
-            return ConstantFP::get(Ty, V);
-        } else if (Name == "atan2")
-          return ConstantFP::get(Ty, atan2(Op1V,Op2V));
-      }
-    }
-  }
-  return 0;
-}
-
-
 /// ConstantFoldLoadThroughGEPConstantExpr - Given a constant and a
 /// getelementptr constantexpr, return the constant value being addressed by the
 /// constant expression, or null if something is funny and we can't decide.


Index: llvm/lib/Transforms/Utils/Makefile
diff -u llvm/lib/Transforms/Utils/Makefile:1.7 llvm/lib/Transforms/Utils/Makefile:1.8
--- llvm/lib/Transforms/Utils/Makefile:1.7	Wed Oct 26 15:35:12 2005
+++ llvm/lib/Transforms/Utils/Makefile	Thu Oct 27 10:54:33 2005
@@ -9,6 +9,7 @@
 
 LEVEL = ../../..
 LIBRARYNAME = LLVMTransformUtils
+BUILD_ARCHIVE = 1
 
 include $(LEVEL)/Makefile.common
 





From criswell at cs.uiuc.edu  Thu Oct 27 10:55:14 2005
From: criswell at cs.uiuc.edu (John Criswell)
Date: Thu, 27 Oct 2005 10:55:14 -0500
Subject: [llvm-commits] CVS: llvm/tools/bugpoint/Makefile 
Message-ID: <200510271555.KAA14444@choi.cs.uiuc.edu>



Changes in directory llvm/tools/bugpoint:

Makefile updated: 1.15 -> 1.16
---
Log message:

Move some constant folding code shared by Analysis and Transform passes
into the LLVMAnalysis library.
This allows LLVMTranform and LLVMTransformUtils to be archives and linked
with LLVMAnalysis.a, which provides any missing definitions.



---
Diffs of the changes:  (+1 -1)

 Makefile |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/tools/bugpoint/Makefile
diff -u llvm/tools/bugpoint/Makefile:1.15 llvm/tools/bugpoint/Makefile:1.16
--- llvm/tools/bugpoint/Makefile:1.15	Wed Oct 26 15:35:12 2005
+++ llvm/tools/bugpoint/Makefile	Thu Oct 27 10:54:33 2005
@@ -14,7 +14,7 @@
 ANALIBS  = LLVMDataStructure LLVMipa.a LLVMTarget.a 
 
 USEDLIBS = LLVMipo.a LLVMScalarOpts.a $(OPTLIBS) $(ANALIBS) LLVMAnalysis.a \
-	   LLVMTransformUtils \
+	   LLVMTransformUtils.a \
 	   LLVMAsmParser LLVMLinker.a LLVMBCReader LLVMBCWriter \
 	   LLVMCore LLVMSupport.a LLVMbzip2 LLVMSystem.a
 





From criswell at cs.uiuc.edu  Thu Oct 27 10:55:14 2005
From: criswell at cs.uiuc.edu (John Criswell)
Date: Thu, 27 Oct 2005 10:55:14 -0500
Subject: [llvm-commits] CVS: llvm/tools/opt/Makefile 
Message-ID: <200510271555.KAA14462@choi.cs.uiuc.edu>



Changes in directory llvm/tools/opt:

Makefile updated: 1.52 -> 1.53
---
Log message:

Move some constant folding code shared by Analysis and Transform passes
into the LLVMAnalysis library.
This allows LLVMTranform and LLVMTransformUtils to be archives and linked
with LLVMAnalysis.a, which provides any missing definitions.



---
Diffs of the changes:  (+1 -1)

 Makefile |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/tools/opt/Makefile
diff -u llvm/tools/opt/Makefile:1.52 llvm/tools/opt/Makefile:1.53
--- llvm/tools/opt/Makefile:1.52	Wed Oct 26 15:35:13 2005
+++ llvm/tools/opt/Makefile	Thu Oct 27 10:54:34 2005
@@ -11,7 +11,7 @@
 
 USEDLIBS = LLVMBCReader LLVMBCWriter LLVMInstrumentation.a \
 	   LLVMScalarOpts.a LLVMipo.a LLVMipa.a LLVMDataStructure LLVMTransforms.a \
-	   LLVMTarget.a LLVMAnalysis.a LLVMTransformUtils LLVMCore LLVMSupport.a \
+	   LLVMTarget.a LLVMAnalysis.a LLVMTransformUtils.a LLVMCore LLVMSupport.a \
 	   LLVMbzip2 LLVMSystem.a 
 
 include $(LEVEL)/Makefile.common





From criswell at cs.uiuc.edu  Thu Oct 27 10:55:14 2005
From: criswell at cs.uiuc.edu (John Criswell)
Date: Thu, 27 Oct 2005 10:55:14 -0500
Subject: [llvm-commits] CVS: llvm/tools/gccas/Makefile 
Message-ID: <200510271555.KAA14458@choi.cs.uiuc.edu>



Changes in directory llvm/tools/gccas:

Makefile updated: 1.23 -> 1.24
---
Log message:

Move some constant folding code shared by Analysis and Transform passes
into the LLVMAnalysis library.
This allows LLVMTranform and LLVMTransformUtils to be archives and linked
with LLVMAnalysis.a, which provides any missing definitions.



---
Diffs of the changes:  (+1 -1)

 Makefile |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/tools/gccas/Makefile
diff -u llvm/tools/gccas/Makefile:1.23 llvm/tools/gccas/Makefile:1.24
--- llvm/tools/gccas/Makefile:1.23	Wed Oct 26 15:35:12 2005
+++ llvm/tools/gccas/Makefile	Thu Oct 27 10:54:33 2005
@@ -10,7 +10,7 @@
 
 TOOLNAME = gccas
 USEDLIBS = LLVMAsmParser LLVMBCWriter LLVMTransforms.a LLVMipo.a LLVMipa.a \
-           LLVMScalarOpts.a LLVMAnalysis.a LLVMTarget.a LLVMTransformUtils \
+           LLVMScalarOpts.a LLVMAnalysis.a LLVMTarget.a LLVMTransformUtils.a \
            LLVMCore LLVMSupport.a LLVMbzip2 LLVMSystem.a
 
 include $(LEVEL)/Makefile.common





From criswell at cs.uiuc.edu  Thu Oct 27 10:55:14 2005
From: criswell at cs.uiuc.edu (John Criswell)
Date: Thu, 27 Oct 2005 10:55:14 -0500
Subject: [llvm-commits] CVS: llvm/lib/Analysis/ScalarEvolution.cpp 
Message-ID: <200510271555.KAA14451@choi.cs.uiuc.edu>



Changes in directory llvm/lib/Analysis:

ScalarEvolution.cpp updated: 1.43 -> 1.44
---
Log message:

Move some constant folding code shared by Analysis and Transform passes
into the LLVMAnalysis library.
This allows LLVMTranform and LLVMTransformUtils to be archives and linked
with LLVMAnalysis.a, which provides any missing definitions.



---
Diffs of the changes:  (+1 -1)

 ScalarEvolution.cpp |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/lib/Analysis/ScalarEvolution.cpp
diff -u llvm/lib/Analysis/ScalarEvolution.cpp:1.43 llvm/lib/Analysis/ScalarEvolution.cpp:1.44
--- llvm/lib/Analysis/ScalarEvolution.cpp:1.43	Wed Sep 28 17:30:58 2005
+++ llvm/lib/Analysis/ScalarEvolution.cpp	Thu Oct 27 10:54:33 2005
@@ -64,10 +64,10 @@
 #include "llvm/DerivedTypes.h"
 #include "llvm/GlobalVariable.h"
 #include "llvm/Instructions.h"
+#include "llvm/Analysis/ConstantFolding.h"
 #include "llvm/Analysis/LoopInfo.h"
 #include "llvm/Assembly/Writer.h"
 #include "llvm/Transforms/Scalar.h"
-#include "llvm/Transforms/Utils/Local.h"
 #include "llvm/Support/CFG.h"
 #include "llvm/Support/ConstantRange.h"
 #include "llvm/Support/InstIterator.h"





From criswell at cs.uiuc.edu  Thu Oct 27 10:55:14 2005
From: criswell at cs.uiuc.edu (John Criswell)
Date: Thu, 27 Oct 2005 10:55:14 -0500
Subject: [llvm-commits] CVS: llvm/tools/llvm-ld/Makefile 
Message-ID: <200510271555.KAA14464@choi.cs.uiuc.edu>



Changes in directory llvm/tools/llvm-ld:

Makefile updated: 1.6 -> 1.7
---
Log message:

Move some constant folding code shared by Analysis and Transform passes
into the LLVMAnalysis library.
This allows LLVMTranform and LLVMTransformUtils to be archives and linked
with LLVMAnalysis.a, which provides any missing definitions.



---
Diffs of the changes:  (+1 -1)

 Makefile |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/tools/llvm-ld/Makefile
diff -u llvm/tools/llvm-ld/Makefile:1.6 llvm/tools/llvm-ld/Makefile:1.7
--- llvm/tools/llvm-ld/Makefile:1.6	Wed Oct 26 15:35:13 2005
+++ llvm/tools/llvm-ld/Makefile	Thu Oct 27 10:54:34 2005
@@ -11,7 +11,7 @@
 
 TOOLNAME = llvm-ld
 USEDLIBS = LLVMipo.a LLVMTransforms.a LLVMScalarOpts.a LLVMAnalysis.a \
-	   LLVMipa.a LLVMTransformUtils LLVMTarget.a LLVMLinker.a \
+	   LLVMipa.a LLVMTransformUtils.a LLVMTarget.a LLVMLinker.a \
 	   LLVMArchive.a LLVMBCReader LLVMBCWriter \
 	   LLVMCore LLVMSupport.a LLVMbzip2 LLVMSystem.a
 





From criswell at cs.uiuc.edu  Thu Oct 27 11:00:31 2005
From: criswell at cs.uiuc.edu (John Criswell)
Date: Thu, 27 Oct 2005 11:00:31 -0500
Subject: [llvm-commits] CVS: llvm/include/llvm/Analysis/ConstantFolding.h 
Message-ID: <200510271600.LAA14512@choi.cs.uiuc.edu>



Changes in directory llvm/include/llvm/Analysis:

ConstantFolding.h added (r1.1)
---
Log message:

Move some constant folding functions into LLVMAnalysis since they are used
by Analysis and Transformation passes.


---
Diffs of the changes:  (+36 -0)

 ConstantFolding.h |   36 ++++++++++++++++++++++++++++++++++++
 1 files changed, 36 insertions(+)


Index: llvm/include/llvm/Analysis/ConstantFolding.h
diff -c /dev/null llvm/include/llvm/Analysis/ConstantFolding.h:1.1
*** /dev/null	Thu Oct 27 11:00:19 2005
--- llvm/include/llvm/Analysis/ConstantFolding.h	Thu Oct 27 11:00:09 2005
***************
*** 0 ****
--- 1,36 ----
+ //===-- ConstantFolding.h - Analyze constant folding possibilities --------===//
+ //
+ //                     The LLVM Compiler Infrastructure
+ //
+ // This file was developed by the LLVM research group and is distributed under
+ // the University of Illinois Open Source License. See LICENSE.TXT for details.
+ //
+ //===----------------------------------------------------------------------===//
+ //
+ // This family of functions determines the possibility of performing constant
+ // folding.
+ //
+ //===----------------------------------------------------------------------===//
+ 
+ #include "llvm/Constants.h"
+ #include "llvm/Function.h"
+ using namespace llvm;
+ 
+ namespace llvm {
+ 
+ /// canConstantFoldCallTo - Return true if its even possible to fold a call to
+ /// the specified function.
+ extern
+ bool canConstantFoldCallTo(Function *F);
+ 
+ /// ConstantFoldFP - Given a function that evaluates the constant, return an
+ ///                  LLVM Constant that represents the evaluated constant
+ extern Constant *
+ ConstantFoldFP(double (*NativeFP)(double), double V, const Type *Ty);
+ 
+ /// ConstantFoldCall - Attempt to constant fold a call to the specified function
+ /// with the specified arguments, returning null if unsuccessful.
+ extern Constant *
+ ConstantFoldCall(Function *F, const std::vector<Constant*> &Operands);
+ }
+ 





From criswell at cs.uiuc.edu  Thu Oct 27 11:00:32 2005
From: criswell at cs.uiuc.edu (John Criswell)
Date: Thu, 27 Oct 2005 11:00:32 -0500
Subject: [llvm-commits] CVS: llvm/include/llvm/Transforms/Utils/Local.h 
Message-ID: <200510271600.LAA14516@choi.cs.uiuc.edu>



Changes in directory llvm/include/llvm/Transforms/Utils:

Local.h updated: 1.21 -> 1.22
---
Log message:

Move some constant folding functions into LLVMAnalysis since they are used
by Analysis and Transformation passes.



---
Diffs of the changes:  (+1 -8)

 Local.h |    9 +--------
 1 files changed, 1 insertion(+), 8 deletions(-)


Index: llvm/include/llvm/Transforms/Utils/Local.h
diff -u llvm/include/llvm/Transforms/Utils/Local.h:1.21 llvm/include/llvm/Transforms/Utils/Local.h:1.22
--- llvm/include/llvm/Transforms/Utils/Local.h:1.21	Tue Sep 27 14:38:43 2005
+++ llvm/include/llvm/Transforms/Utils/Local.h	Thu Oct 27 11:00:10 2005
@@ -16,6 +16,7 @@
 #define LLVM_TRANSFORMS_UTILS_LOCAL_H
 
 #include "llvm/Function.h"
+#include "llvm/Analysis/ConstantFolding.h"
 
 namespace llvm {
 
@@ -48,14 +49,6 @@
 Constant *ConstantFoldInstruction(Instruction *I);
 
 
-/// canConstantFoldCallTo - Return true if its even possible to fold a call to
-/// the specified function.
-bool canConstantFoldCallTo(Function *F);
-
-/// ConstantFoldCall - Attempt to constant fold a call to the specified function
-/// with the specified arguments, returning null if unsuccessful.
-Constant *ConstantFoldCall(Function *F, const std::vector<Constant*> &Operands);
-
 /// ConstantFoldLoadThroughGEPConstantExpr - Given a constant and a
 /// getelementptr constantexpr, return the constant value being addressed by the
 /// constant expression, or null if something is funny and we can't decide.





From criswell at cs.uiuc.edu  Thu Oct 27 11:00:33 2005
From: criswell at cs.uiuc.edu (John Criswell)
Date: Thu, 27 Oct 2005 11:00:33 -0500
Subject: [llvm-commits] CVS: llvm/lib/Analysis/ConstantFolding.cpp 
Message-ID: <200510271600.LAA14520@choi.cs.uiuc.edu>



Changes in directory llvm/lib/Analysis:

ConstantFolding.cpp added (r1.1)
---
Log message:

Move some constant folding functions into LLVMAnalysis since they are used
by Analysis and Transformation passes.




---
Diffs of the changes:  (+172 -0)

 ConstantFolding.cpp |  172 ++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 files changed, 172 insertions(+)


Index: llvm/lib/Analysis/ConstantFolding.cpp
diff -c /dev/null llvm/lib/Analysis/ConstantFolding.cpp:1.1
*** /dev/null	Thu Oct 27 11:00:22 2005
--- llvm/lib/Analysis/ConstantFolding.cpp	Thu Oct 27 11:00:11 2005
***************
*** 0 ****
--- 1,172 ----
+ //===-- ConstantFolding.cpp - Analyze constant folding possibilities ------===//
+ //
+ //                     The LLVM Compiler Infrastructure
+ //
+ // This file was developed by the LLVM research group and is distributed under
+ // the University of Illinois Open Source License. See LICENSE.TXT for details.
+ //
+ //===----------------------------------------------------------------------===//
+ //
+ // This family of functions determines the possibility of performing constant
+ // folding.
+ //
+ //===----------------------------------------------------------------------===//
+ 
+ #include "llvm/Analysis/ConstantFolding.h"
+ #include "llvm/Constants.h"
+ #include "llvm/DerivedTypes.h"
+ #include "llvm/Instructions.h"
+ #include "llvm/Intrinsics.h"
+ #include "llvm/Support/GetElementPtrTypeIterator.h"
+ #include "llvm/Support/MathExtras.h"
+ #include <cerrno>
+ #include <cmath>
+ using namespace llvm;
+ 
+ //===----------------------------------------------------------------------===//
+ //  Constant Folding ...
+ //
+ 
+ 
+ /// canConstantFoldCallTo - Return true if its even possible to fold a call to
+ /// the specified function.
+ bool
+ llvm::canConstantFoldCallTo(Function *F) {
+   const std::string &Name = F->getName();
+ 
+   switch (F->getIntrinsicID()) {
+   case Intrinsic::isunordered:
+   case Intrinsic::sqrt:
+     return true;
+   default: break;
+   }
+ 
+   switch (Name[0])
+   {
+     case 'a':
+       return Name == "acos" || Name == "asin" || Name == "atan" ||
+              Name == "atan2";
+     case 'c':
+       return Name == "ceil" || Name == "cos" || Name == "cosf" ||
+              Name == "cosh";
+     case 'e':
+       return Name == "exp";
+     case 'f':
+       return Name == "fabs" || Name == "fmod" || Name == "floor";
+     case 'l':
+       return Name == "log" || Name == "log10";
+     case 'p':
+       return Name == "pow";
+     case 's':
+       return Name == "sin" || Name == "sinh" || Name == "sqrt";
+     case 't':
+       return Name == "tan" || Name == "tanh";
+     default:
+       return false;
+   }
+ }
+ 
+ Constant *
+ llvm::ConstantFoldFP(double (*NativeFP)(double), double V, const Type *Ty) {
+   errno = 0;
+   V = NativeFP(V);
+   if (errno == 0)
+     return ConstantFP::get(Ty, V);
+   return 0;
+ }
+ 
+ /// ConstantFoldCall - Attempt to constant fold a call to the specified function
+ /// with the specified arguments, returning null if unsuccessful.
+ Constant *
+ llvm::ConstantFoldCall(Function *F, const std::vector<Constant*> &Operands) {
+   const std::string &Name = F->getName();
+   const Type *Ty = F->getReturnType();
+ 
+   if (Operands.size() == 1) {
+     if (ConstantFP *Op = dyn_cast<ConstantFP>(Operands[0])) {
+       double V = Op->getValue();
+       switch (Name[0])
+       {
+         case 'a':
+           if (Name == "acos")
+             return ConstantFoldFP(acos, V, Ty);
+           else if (Name == "asin")
+             return ConstantFoldFP(asin, V, Ty);
+           else if (Name == "atan")
+             return ConstantFP::get(Ty, atan(V));
+           break;
+         case 'c':
+           if (Name == "ceil")
+             return ConstantFoldFP(ceil, V, Ty);
+           else if (Name == "cos")
+             return ConstantFP::get(Ty, cos(V));
+           else if (Name == "cosh")
+             return ConstantFP::get(Ty, cosh(V));
+           break;
+         case 'e':
+           if (Name == "exp")
+             return ConstantFP::get(Ty, exp(V));
+           break;
+         case 'f':
+           if (Name == "fabs")
+             return ConstantFP::get(Ty, fabs(V));
+           else if (Name == "floor")
+             return ConstantFoldFP(floor, V, Ty);
+           break;
+         case 'l':
+           if (Name == "log" && V > 0)
+             return ConstantFP::get(Ty, log(V));
+           else if (Name == "log10" && V > 0)
+             return ConstantFoldFP(log10, V, Ty);
+           else if (Name == "llvm.sqrt") {
+             if (V >= -0.0)
+               return ConstantFP::get(Ty, sqrt(V));
+             else // Undefined
+               return ConstantFP::get(Ty, 0.0);
+           }
+           break;
+         case 's':
+           if (Name == "sin")
+             return ConstantFP::get(Ty, sin(V));
+           else if (Name == "sinh")
+             return ConstantFP::get(Ty, sinh(V));
+           else if (Name == "sqrt" && V >= 0)
+             return ConstantFP::get(Ty, sqrt(V));
+           break;
+         case 't':
+           if (Name == "tan")
+             return ConstantFP::get(Ty, tan(V));
+           else if (Name == "tanh")
+             return ConstantFP::get(Ty, tanh(V));
+           break;
+         default:
+           break;
+       }
+     }
+   } else if (Operands.size() == 2) {
+     if (ConstantFP *Op1 = dyn_cast<ConstantFP>(Operands[0])) {
+       double Op1V = Op1->getValue();
+       if (ConstantFP *Op2 = dyn_cast<ConstantFP>(Operands[1])) {
+         double Op2V = Op2->getValue();
+ 
+         if (Name == "llvm.isunordered")
+           return ConstantBool::get(IsNAN(Op1V) || IsNAN(Op2V));
+         else
+         if (Name == "pow") {
+           errno = 0;
+           double V = pow(Op1V, Op2V);
+           if (errno == 0)
+             return ConstantFP::get(Ty, V);
+         } else if (Name == "fmod") {
+           errno = 0;
+           double V = fmod(Op1V, Op2V);
+           if (errno == 0)
+             return ConstantFP::get(Ty, V);
+         } else if (Name == "atan2")
+           return ConstantFP::get(Ty, atan2(Op1V,Op2V));
+       }
+     }
+   }
+   return 0;
+ }
+ 





From lattner at cs.uiuc.edu  Thu Oct 27 11:30:56 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu, 27 Oct 2005 11:30:56 -0500
Subject: [llvm-commits] CVS: llvm/projects/Stacker/tools/stkrc/Makefile 
Message-ID: <200510271630.LAA05026@zion.cs.uiuc.edu>



Changes in directory llvm/projects/Stacker/tools/stkrc:

Makefile updated: 1.9 -> 1.10
---
Log message:

unbreak the build again


---
Diffs of the changes:  (+1 -1)

 Makefile |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/projects/Stacker/tools/stkrc/Makefile
diff -u llvm/projects/Stacker/tools/stkrc/Makefile:1.9 llvm/projects/Stacker/tools/stkrc/Makefile:1.10
--- llvm/projects/Stacker/tools/stkrc/Makefile:1.9	Wed Oct 26 19:53:16 2005
+++ llvm/projects/Stacker/tools/stkrc/Makefile	Thu Oct 27 11:30:44 2005
@@ -10,7 +10,7 @@
 #
 TOOLNAME = stkrc
 LLVMLIBS = LLVMAsmParser LLVMBCWriter LLVMipo.a \
-	   LLVMScalarOpts.a LLVMTransforms.a LLVMTransformUtils LLVMipa.a LLVMAnalysis.a LLVMTarget.a \
+	   LLVMScalarOpts.a LLVMTransforms.a LLVMTransformUtils.a LLVMipa.a LLVMAnalysis.a LLVMTarget.a \
 	   LLVMCore LLVMSupport.a LLVMbzip2 LLVMSystem.a 
 CONFIG_FILES = st
 EXTRA_DIST = st





From lattner at cs.uiuc.edu  Thu Oct 27 11:34:11 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu, 27 Oct 2005 11:34:11 -0500
Subject: [llvm-commits] CVS: llvm/lib/Transforms/Utils/Local.cpp 
Message-ID: <200510271634.LAA05061@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Transforms/Utils:

Local.cpp updated: 1.45 -> 1.46
---
Log message:

Fix #include order


---
Diffs of the changes:  (+1 -1)

 Local.cpp |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/lib/Transforms/Utils/Local.cpp
diff -u llvm/lib/Transforms/Utils/Local.cpp:1.45 llvm/lib/Transforms/Utils/Local.cpp:1.46
--- llvm/lib/Transforms/Utils/Local.cpp:1.45	Thu Oct 27 10:54:33 2005
+++ llvm/lib/Transforms/Utils/Local.cpp	Thu Oct 27 11:34:00 2005
@@ -12,12 +12,12 @@
 //
 //===----------------------------------------------------------------------===//
 
-#include "llvm/Analysis/ConstantFolding.h"
 #include "llvm/Transforms/Utils/Local.h"
 #include "llvm/Constants.h"
 #include "llvm/DerivedTypes.h"
 #include "llvm/Instructions.h"
 #include "llvm/Intrinsics.h"
+#include "llvm/Analysis/ConstantFolding.h"
 #include "llvm/Support/GetElementPtrTypeIterator.h"
 #include "llvm/Support/MathExtras.h"
 #include <cerrno>





From lattner at cs.uiuc.edu  Thu Oct 27 11:59:17 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu, 27 Oct 2005 11:59:17 -0500
Subject: [llvm-commits] CVS: llvm-test/SingleSource/Regression/C/PR491.c 
Message-ID: <200510271659.LAA05273@zion.cs.uiuc.edu>



Changes in directory llvm-test/SingleSource/Regression/C:

PR491.c added (r1.1)
---
Log message:

new testcase, from... PR491: http://llvm.cs.uiuc.edu/PR491 .


---
Diffs of the changes:  (+31 -0)

 PR491.c |   31 +++++++++++++++++++++++++++++++
 1 files changed, 31 insertions(+)


Index: llvm-test/SingleSource/Regression/C/PR491.c
diff -c /dev/null llvm-test/SingleSource/Regression/C/PR491.c:1.1
*** /dev/null	Thu Oct 27 11:59:16 2005
--- llvm-test/SingleSource/Regression/C/PR491.c	Thu Oct 27 11:59:06 2005
***************
*** 0 ****
--- 1,31 ----
+ #include <stdio.h>
+ 
+ static int assert_fail(const char* s, unsigned l)
+ {
+     fprintf(stderr, "assertion failed in line %u: '%s'\n", l, s);
+     return 0;
+ }
+ #define ASSERT(expr)    ((expr) ? 1 : assert_fail(#expr,__LINE__))
+ 
+ int test(int r) {
+ #if !defined(__i386__)
+   #if !defined(BYTE_ORDER) || !defined(LITTLE_ENDIAN)
+      return r;
+   #else
+      if (BYTE_ORDER != LITTLE_ENDIAN) return r;
+   #endif
+ #endif
+ 
+     /* little endian */
+     union { long l; unsigned char c[sizeof(long)]; } u;
+     u.l = 0; u.c[0] = 0x80;
+     r &= ASSERT(u.l == 128);
+     u.l = 0; u.c[sizeof(long)-1] = 0x80;
+     r &= ASSERT(u.l < 0);
+     return r;
+ }
+ 
+ int main() {
+     return test(1) == 1;
+ }
+ 





From lattner at cs.uiuc.edu  Thu Oct 27 12:13:22 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu, 27 Oct 2005 12:13:22 -0500
Subject: [llvm-commits] 
	CVS: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
Message-ID: <200510271713.MAA05620@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Transforms/Scalar:

InstructionCombining.cpp updated: 1.397 -> 1.398
---
Log message:

Do not sink any instruction with side effects, including vaarg.  This fixes
PR640: http://llvm.cs.uiuc.edu/PR640 


---
Diffs of the changes:  (+2 -4)

 InstructionCombining.cpp |    6 ++----
 1 files changed, 2 insertions(+), 4 deletions(-)


Index: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
diff -u llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.397 llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.398
--- llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.397	Thu Oct 27 01:26:26 2005
+++ llvm/lib/Transforms/Scalar/InstructionCombining.cpp	Thu Oct 27 12:13:11 2005
@@ -5717,8 +5717,8 @@
 static bool TryToSinkInstruction(Instruction *I, BasicBlock *DestBlock) {
   assert(I->hasOneUse() && "Invariants didn't hold!");
 
-  // Cannot move control-flow-involving instructions.
-  if (isa<PHINode>(I) || isa<InvokeInst>(I) || isa<CallInst>(I)) return false;
+  // Cannot move control-flow-involving, volatile loads, vaarg, etc.
+  if (isa<PHINode>(I) || I->mayWriteToMemory()) return false;
 
   // Do not sink alloca instructions out of the entry block.
   if (isa<AllocaInst>(I) && I->getParent() == &DestBlock->getParent()->front())
@@ -5727,8 +5727,6 @@
   // We can only sink load instructions if there is nothing between the load and
   // the end of block that could change the value.
   if (LoadInst *LI = dyn_cast<LoadInst>(I)) {
-    if (LI->isVolatile()) return false;  // Don't sink volatile loads.
-
     for (BasicBlock::iterator Scan = LI, E = LI->getParent()->end();
          Scan != E; ++Scan)
       if (Scan->mayWriteToMemory())





From lattner at cs.uiuc.edu  Thu Oct 27 12:14:14 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu, 27 Oct 2005 12:14:14 -0500
Subject: [llvm-commits] CVS: llvm-test/SingleSource/Regression/C/PR640.c 
Message-ID: <200510271714.MAA05694@zion.cs.uiuc.edu>



Changes in directory llvm-test/SingleSource/Regression/C:

PR640.c added (r1.1)
---
Log message:

New testcase


---
Diffs of the changes:  (+56 -0)

 PR640.c |   56 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 files changed, 56 insertions(+)


Index: llvm-test/SingleSource/Regression/C/PR640.c
diff -c /dev/null llvm-test/SingleSource/Regression/C/PR640.c:1.1
*** /dev/null	Thu Oct 27 12:14:13 2005
--- llvm-test/SingleSource/Regression/C/PR640.c	Thu Oct 27 12:14:03 2005
***************
*** 0 ****
--- 1,56 ----
+ #include <stdarg.h>
+ #include <stdio.h>
+ 
+ static int test_stdarg_va(void* p1, ...)
+ {
+     va_list ap;
+     unsigned long l;
+     int i1, i2;
+     void* p2;
+     va_start(ap, p1);
+     i1 = va_arg(ap, int);
+     l = va_arg(ap, unsigned long);
+     i2 = va_arg(ap, int);
+     p2 = va_arg(ap, void *);
+     va_end(ap);
+     return p1 == p2 && i1 == 1 && l == 0x76214365ul && i2 == 2;
+ }
+ 
+ 
+ static int test_stdarg_builtin_va(void* p1, ...)
+ {
+     __builtin_va_list ap;
+     unsigned long l;
+     int i1, i2;
+     void* p2;
+     __builtin_stdarg_start(ap, p1);
+     i1 = __builtin_va_arg(ap, int);
+     l = __builtin_va_arg(ap, unsigned long);
+     i2 = __builtin_va_arg(ap, int);
+     p2 = __builtin_va_arg(ap, void *);
+     __builtin_va_end(ap);
+     return p1 == p2 && i1 == 1 && l == 0x76214369ul && i2 == 2;
+ }
+ 
+ 
+ static int test_stdarg(int r)
+ {
+     char c1 = 1, c2 = 2;
+     if (test_stdarg_va(&r, c1, 0x76214365ul, c2, &r) != 1)
+         return 0;
+     if (test_stdarg_builtin_va(&r, c1, 0x76214369ul, c2, &r) != 1)
+         return 0;
+     return r & 1;
+ }
+ 
+ 
+ int main(int argc, char **argv)
+ {
+     if (test_stdarg(1) != 1) {
+         printf("ERROR\n");
+         return 1;
+     }
+     printf("All done.\n");
+     return 0;
+ }
+ 





From lattner at cs.uiuc.edu  Thu Oct 27 12:40:00 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu, 27 Oct 2005 12:40:00 -0500
Subject: [llvm-commits] CVS: llvm/Xcode/LLVM.xcodeproj/project.pbxproj 
Message-ID: <200510271740.MAA05880@zion.cs.uiuc.edu>



Changes in directory llvm/Xcode/LLVM.xcodeproj:

project.pbxproj updated: 1.10 -> 1.11
---
Log message:

update project file


---
Diffs of the changes:  (+72 -106)

 project.pbxproj |  178 ++++++++++++++++++++++----------------------------------
 1 files changed, 72 insertions(+), 106 deletions(-)


Index: llvm/Xcode/LLVM.xcodeproj/project.pbxproj
diff -u llvm/Xcode/LLVM.xcodeproj/project.pbxproj:1.10 llvm/Xcode/LLVM.xcodeproj/project.pbxproj:1.11
--- llvm/Xcode/LLVM.xcodeproj/project.pbxproj:1.10	Fri Sep  9 12:50:20 2005
+++ llvm/Xcode/LLVM.xcodeproj/project.pbxproj	Thu Oct 27 12:39:48 2005
@@ -80,6 +80,42 @@
 /* Begin PBXFileReference section */
 		CF9BCD0808C74DE0001E7011 /* SubtargetFeature.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = SubtargetFeature.h; sourceTree = "<group>"; };
 		CF9BCD1508C75070001E7011 /* SubtargetFeature.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = SubtargetFeature.cpp; sourceTree = "<group>"; };
+		DE4DA0390911476D0012D44B /* LoopSimplify.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; name = LoopSimplify.cpp; path = ../lib/Transforms/Utils/LoopSimplify.cpp; sourceTree = SOURCE_ROOT; };
+		DE4DA03C091147920012D44B /* LiveInterval.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; name = LiveInterval.h; path = ../include/llvm/CodeGen/LiveInterval.h; sourceTree = SOURCE_ROOT; };
+		DE4DA03D091147920012D44B /* LiveIntervalAnalysis.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; name = LiveIntervalAnalysis.h; path = ../include/llvm/CodeGen/LiveIntervalAnalysis.h; sourceTree = SOURCE_ROOT; };
+		DE4DA03E091147C00012D44B /* PrintSCC.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; name = PrintSCC.cpp; path = ../tools/analyze/PrintSCC.cpp; sourceTree = SOURCE_ROOT; };
+		DE4DA03F091147DD0012D44B /* PPC.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; name = PPC.h; path = ../lib/Target/PowerPC/PPC.h; sourceTree = SOURCE_ROOT; };
+		DE4DA040091147DD0012D44B /* PPC.td */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = text; name = PPC.td; path = ../lib/Target/PowerPC/PPC.td; sourceTree = SOURCE_ROOT; };
+		DE4DA041091147DD0012D44B /* PPCAsmPrinter.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; name = PPCAsmPrinter.cpp; path = ../lib/Target/PowerPC/PPCAsmPrinter.cpp; sourceTree = SOURCE_ROOT; };
+		DE4DA042091147DD0012D44B /* PPCBranchSelector.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; name = PPCBranchSelector.cpp; path = ../lib/Target/PowerPC/PPCBranchSelector.cpp; sourceTree = SOURCE_ROOT; };
+		DE4DA043091147DD0012D44B /* PPCCodeEmitter.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; name = PPCCodeEmitter.cpp; path = ../lib/Target/PowerPC/PPCCodeEmitter.cpp; sourceTree = SOURCE_ROOT; };
+		DE4DA044091147DD0012D44B /* PPCFrameInfo.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; name = PPCFrameInfo.h; path = ../lib/Target/PowerPC/PPCFrameInfo.h; sourceTree = SOURCE_ROOT; };
+		DE4DA045091147ED0012D44B /* PPCInstrBuilder.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; name = PPCInstrBuilder.h; path = ../lib/Target/PowerPC/PPCInstrBuilder.h; sourceTree = SOURCE_ROOT; };
+		DE4DA046091147ED0012D44B /* PPCInstrFormats.td */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = text; name = PPCInstrFormats.td; path = ../lib/Target/PowerPC/PPCInstrFormats.td; sourceTree = SOURCE_ROOT; };
+		DE4DA047091147ED0012D44B /* PPCInstrInfo.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; name = PPCInstrInfo.cpp; path = ../lib/Target/PowerPC/PPCInstrInfo.cpp; sourceTree = SOURCE_ROOT; };
+		DE4DA048091147ED0012D44B /* PPCInstrInfo.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; name = PPCInstrInfo.h; path = ../lib/Target/PowerPC/PPCInstrInfo.h; sourceTree = SOURCE_ROOT; };
+		DE4DA049091147ED0012D44B /* PPCInstrInfo.td */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = text; name = PPCInstrInfo.td; path = ../lib/Target/PowerPC/PPCInstrInfo.td; sourceTree = SOURCE_ROOT; };
+		DE4DA04A091147ED0012D44B /* PPCISelDAGToDAG.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; name = PPCISelDAGToDAG.cpp; path = ../lib/Target/PowerPC/PPCISelDAGToDAG.cpp; sourceTree = SOURCE_ROOT; };
+		DE4DA04B091147ED0012D44B /* PPCISelLowering.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; name = PPCISelLowering.cpp; path = ../lib/Target/PowerPC/PPCISelLowering.cpp; sourceTree = SOURCE_ROOT; };
+		DE4DA04C091147ED0012D44B /* PPCISelLowering.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; name = PPCISelLowering.h; path = ../lib/Target/PowerPC/PPCISelLowering.h; sourceTree = SOURCE_ROOT; };
+		DE4DA04D091147ED0012D44B /* PPCISelPattern.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; name = PPCISelPattern.cpp; path = ../lib/Target/PowerPC/PPCISelPattern.cpp; sourceTree = SOURCE_ROOT; };
+		DE4DA04E091147ED0012D44B /* PPCJITInfo.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; name = PPCJITInfo.cpp; path = ../lib/Target/PowerPC/PPCJITInfo.cpp; sourceTree = SOURCE_ROOT; };
+		DE4DA04F091147ED0012D44B /* PPCJITInfo.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; name = PPCJITInfo.h; path = ../lib/Target/PowerPC/PPCJITInfo.h; sourceTree = SOURCE_ROOT; };
+		DE4DA050091147ED0012D44B /* PPCRegisterInfo.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; name = PPCRegisterInfo.cpp; path = ../lib/Target/PowerPC/PPCRegisterInfo.cpp; sourceTree = SOURCE_ROOT; };
+		DE4DA051091147ED0012D44B /* PPCRegisterInfo.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; name = PPCRegisterInfo.h; path = ../lib/Target/PowerPC/PPCRegisterInfo.h; sourceTree = SOURCE_ROOT; };
+		DE4DA052091147ED0012D44B /* PPCRegisterInfo.td */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = text; name = PPCRegisterInfo.td; path = ../lib/Target/PowerPC/PPCRegisterInfo.td; sourceTree = SOURCE_ROOT; };
+		DE4DA053091147ED0012D44B /* PPCRelocations.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; name = PPCRelocations.h; path = ../lib/Target/PowerPC/PPCRelocations.h; sourceTree = SOURCE_ROOT; };
+		DE4DA054091147ED0012D44B /* PPCSchedule.td */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = text; name = PPCSchedule.td; path = ../lib/Target/PowerPC/PPCSchedule.td; sourceTree = SOURCE_ROOT; };
+		DE4DA055091147ED0012D44B /* PPCScheduleG3.td */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = text; name = PPCScheduleG3.td; path = ../lib/Target/PowerPC/PPCScheduleG3.td; sourceTree = SOURCE_ROOT; };
+		DE4DA056091147ED0012D44B /* PPCScheduleG4.td */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = text; name = PPCScheduleG4.td; path = ../lib/Target/PowerPC/PPCScheduleG4.td; sourceTree = SOURCE_ROOT; };
+		DE4DA057091147ED0012D44B /* PPCScheduleG4Plus.td */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = text; name = PPCScheduleG4Plus.td; path = ../lib/Target/PowerPC/PPCScheduleG4Plus.td; sourceTree = SOURCE_ROOT; };
+		DE4DA058091147ED0012D44B /* PPCScheduleG5.td */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = text; name = PPCScheduleG5.td; path = ../lib/Target/PowerPC/PPCScheduleG5.td; sourceTree = SOURCE_ROOT; };
+		DE4DA059091147ED0012D44B /* PPCSubtarget.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; name = PPCSubtarget.cpp; path = ../lib/Target/PowerPC/PPCSubtarget.cpp; sourceTree = SOURCE_ROOT; };
+		DE4DA05A091147ED0012D44B /* PPCSubtarget.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; name = PPCSubtarget.h; path = ../lib/Target/PowerPC/PPCSubtarget.h; sourceTree = SOURCE_ROOT; };
+		DE4DA05B091147ED0012D44B /* PPCTargetMachine.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; name = PPCTargetMachine.cpp; path = ../lib/Target/PowerPC/PPCTargetMachine.cpp; sourceTree = SOURCE_ROOT; };
+		DE4DA05C091147ED0012D44B /* PPCTargetMachine.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; name = PPCTargetMachine.h; path = ../lib/Target/PowerPC/PPCTargetMachine.h; sourceTree = SOURCE_ROOT; };
+		DE4DA065091148520012D44B /* SubtargetEmitter.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; name = SubtargetEmitter.cpp; path = ../utils/TableGen/SubtargetEmitter.cpp; sourceTree = SOURCE_ROOT; };
+		DE4DA066091148520012D44B /* SubtargetEmitter.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; name = SubtargetEmitter.h; path = ../utils/TableGen/SubtargetEmitter.h; sourceTree = SOURCE_ROOT; };
 		DE66EC5B08ABE86900323D32 /* AsmWriter.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; name = AsmWriter.cpp; path = ../lib/VMCore/AsmWriter.cpp; sourceTree = SOURCE_ROOT; };
 		DE66EC5C08ABE86A00323D32 /* BasicBlock.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; name = BasicBlock.cpp; path = ../lib/VMCore/BasicBlock.cpp; sourceTree = SOURCE_ROOT; };
 		DE66EC5D08ABE86A00323D32 /* ConstantFolding.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; name = ConstantFolding.cpp; path = ../lib/VMCore/ConstantFolding.cpp; sourceTree = SOURCE_ROOT; };
@@ -144,10 +180,8 @@
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 		DE66ED1C08ABEC0800323D32 /* CallGraph.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = CallGraph.cpp; sourceTree = "<group>"; };
 		DE66ED1D08ABEC0800323D32 /* CallGraphSCCPass.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = CallGraphSCCPass.cpp; sourceTree = "<group>"; };
-		DE66ED2E08ABEC0800323D32 /* FindUnsafePointerTypes.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = FindUnsafePointerTypes.cpp; sourceTree = "<group>"; };
 		DE66ED2F08ABEC0800323D32 /* FindUsedTypes.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = FindUsedTypes.cpp; sourceTree = "<group>"; };
 		DE66ED3008ABEC0800323D32 /* GlobalsModRef.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = GlobalsModRef.cpp; sourceTree = "<group>"; };
-		DE66ED3208ABEC0800323D32 /* PrintSCC.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = PrintSCC.cpp; sourceTree = "<group>"; };
 		DE66ED3308ABEC0800323D32 /* LoadValueNumbering.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = LoadValueNumbering.cpp; sourceTree = "<group>"; };
 		DE66ED3408ABEC0800323D32 /* LoopInfo.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = LoopInfo.cpp; sourceTree = "<group>"; };
 		DE66ED3608ABEC0800323D32 /* PostDominators.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = PostDominators.cpp; sourceTree = "<group>"; };
@@ -163,9 +197,7 @@
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 		DE66ED7308ABEC2B00323D32 /* LiveIntervalAnalysis.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = LiveIntervalAnalysis.cpp; sourceTree = "<group>"; };
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@@ -313,35 +345,6 @@
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@@ -367,7 +370,6 @@
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 		DE66EFC308ABEE5F00323D32 /* SparcV8JITInfo.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = SparcV8JITInfo.h; sourceTree = "<group>"; };
 		DE66EFC408ABEE5F00323D32 /* SparcV8RegisterInfo.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = SparcV8RegisterInfo.cpp; sourceTree = "<group>"; };
@@ -500,14 +502,6 @@
 		DE66F0EF08ABEFB300323D32 /* BlockProfiling.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = BlockProfiling.cpp; sourceTree = "<group>"; };
 		DE66F0FE08ABEFB300323D32 /* EdgeProfiling.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = EdgeProfiling.cpp; sourceTree = "<group>"; };
 		DE66F0FF08ABEFB300323D32 /* EmitFunctions.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = EmitFunctions.cpp; sourceTree = "<group>"; };
-		DE66F10208ABEFB300323D32 /* CombineBranch.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = CombineBranch.cpp; sourceTree = "<group>"; };
-		DE66F11308ABEFB300323D32 /* EdgeCode.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = EdgeCode.cpp; sourceTree = "<group>"; };
-		DE66F11408ABEFB300323D32 /* Graph.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = Graph.cpp; sourceTree = "<group>"; };
-		DE66F11508ABEFB300323D32 /* Graph.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = Graph.h; sourceTree = "<group>"; };
-		DE66F11608ABEFB300323D32 /* GraphAuxiliary.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = GraphAuxiliary.cpp; sourceTree = "<group>"; };
-		DE66F11708ABEFB300323D32 /* InstLoops.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = InstLoops.cpp; sourceTree = "<group>"; };
-		DE66F11908ABEFB300323D32 /* ProfilePaths.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = ProfilePaths.cpp; sourceTree = "<group>"; };
-		DE66F11A08ABEFB300323D32 /* RetracePath.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = RetracePath.cpp; sourceTree = "<group>"; };
 		DE66F11B08ABEFB300323D32 /* ProfilingUtils.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = ProfilingUtils.cpp; sourceTree = "<group>"; };
 		DE66F11C08ABEFB300323D32 /* ProfilingUtils.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = ProfilingUtils.h; sourceTree = "<group>"; };
 		DE66F11D08ABEFB300323D32 /* TraceBasicBlocks.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = TraceBasicBlocks.cpp; sourceTree = "<group>"; };
@@ -543,7 +537,6 @@
 		DE66F1A408ABEFB400323D32 /* IndVarSimplify.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = IndVarSimplify.cpp; sourceTree = "<group>"; };
 		DE66F1A508ABEFB400323D32 /* InstructionCombining.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = InstructionCombining.cpp; sourceTree = "<group>"; };
 		DE66F1A608ABEFB400323D32 /* LICM.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = LICM.cpp; sourceTree = "<group>"; };
-		DE66F1A708ABEFB400323D32 /* LoopSimplify.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = LoopSimplify.cpp; sourceTree = "<group>"; };
 		DE66F1A808ABEFB400323D32 /* LoopStrengthReduce.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = LoopStrengthReduce.cpp; sourceTree = "<group>"; };
 		DE66F1A908ABEFB400323D32 /* LoopUnroll.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = LoopUnroll.cpp; sourceTree = "<group>"; };
 		DE66F1AA08ABEFB400323D32 /* LoopUnswitch.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = LoopUnswitch.cpp; sourceTree = "<group>"; };
@@ -610,7 +603,6 @@
 		DE66F20E08ABF03100323D32 /* DSSupport.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = DSSupport.h; sourceTree = "<group>"; };
 		DE66F20F08ABF03100323D32 /* Dominators.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = Dominators.h; sourceTree = "<group>"; };
 		DE66F21008ABF03100323D32 /* Expressions.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = Expressions.h; sourceTree = "<group>"; };
-		DE66F21108ABF03100323D32 /* FindUnsafePointerTypes.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = FindUnsafePointerTypes.h; sourceTree = "<group>"; };
 		DE66F21208ABF03100323D32 /* FindUsedTypes.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = FindUsedTypes.h; sourceTree = "<group>"; };
 		DE66F21308ABF03100323D32 /* Interval.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = Interval.h; sourceTree = "<group>"; };
 		DE66F21408ABF03100323D32 /* IntervalIterator.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = IntervalIterator.h; sourceTree = "<group>"; };
@@ -902,8 +894,6 @@
 		DE81708808CFB44D0093BDEF /* FileParser.y */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.yacc; path = FileParser.y; sourceTree = "<group>"; };
 		DE81708908CFB44D0093BDEF /* InstrInfoEmitter.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = InstrInfoEmitter.cpp; sourceTree = "<group>"; };
 		DE81708A08CFB44D0093BDEF /* InstrInfoEmitter.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = InstrInfoEmitter.h; sourceTree = "<group>"; };
-		DE81708B08CFB44D0093BDEF /* InstrSelectorEmitter.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = InstrSelectorEmitter.cpp; sourceTree = "<group>"; };
-		DE81708C08CFB44D0093BDEF /* InstrSelectorEmitter.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = InstrSelectorEmitter.h; sourceTree = "<group>"; };
 		DE81708E08CFB44D0093BDEF /* Record.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = Record.cpp; sourceTree = "<group>"; };
 		DE81708F08CFB44D0093BDEF /* Record.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = Record.h; sourceTree = "<group>"; };
 		DE81709008CFB44D0093BDEF /* RegisterInfoEmitter.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = RegisterInfoEmitter.cpp; sourceTree = "<group>"; };
@@ -911,9 +901,6 @@
 		DE8170AA08CFB44D0093BDEF /* TableGen.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = TableGen.cpp; sourceTree = "<group>"; };
 		DE8170AB08CFB44D0093BDEF /* TableGenBackend.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = TableGenBackend.cpp; sourceTree = "<group>"; };
 		DE8170AC08CFB44D0093BDEF /* TableGenBackend.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = TableGenBackend.h; sourceTree = "<group>"; };
-		DE8170C108CFB59B0093BDEF /* PPC32ISelDAGToDAG.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = PPC32ISelDAGToDAG.cpp; sourceTree = "<group>"; };
-		DE8170C408CFB5B20093BDEF /* PPC32ISelLowering.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = PPC32ISelLowering.cpp; sourceTree = "<group>"; };
-		DE8170C508CFB5B20093BDEF /* PPC32ISelLowering.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = PPC32ISelLowering.h; sourceTree = "<group>"; };
 /* End PBXFileReference section */
 
 /* Begin PBXGroup section */
@@ -1084,10 +1071,8 @@
 				DE66ED1B08ABEC0800323D32 /* Andersens.cpp */,
 				DE66ED1C08ABEC0800323D32 /* CallGraph.cpp */,
 				DE66ED1D08ABEC0800323D32 /* CallGraphSCCPass.cpp */,
-				DE66ED2E08ABEC0800323D32 /* FindUnsafePointerTypes.cpp */,
 				DE66ED2F08ABEC0800323D32 /* FindUsedTypes.cpp */,
 				DE66ED3008ABEC0800323D32 /* GlobalsModRef.cpp */,
-				DE66ED3208ABEC0800323D32 /* PrintSCC.cpp */,
 			);
 			path = IPA;
 			sourceTree = "<group>";
@@ -1101,9 +1086,7 @@
 				DE66ED6F08ABEC2B00323D32 /* ELFWriter.cpp */,
 				DE66ED7008ABEC2B00323D32 /* IntrinsicLowering.cpp */,
 				DE66ED7108ABEC2B00323D32 /* LiveInterval.cpp */,
-				DE66ED7208ABEC2B00323D32 /* LiveInterval.h */,
 				DE66ED7308ABEC2B00323D32 /* LiveIntervalAnalysis.cpp */,
-				DE66ED7408ABEC2B00323D32 /* LiveIntervalAnalysis.h */,
 				DE66ED7508ABEC2B00323D32 /* LiveVariables.cpp */,
 				DE66ED7608ABEC2B00323D32 /* MachineBasicBlock.cpp */,
 				DE66ED7708ABEC2B00323D32 /* MachineCodeEmitter.cpp */,
@@ -1402,38 +1385,36 @@
 			isa = PBXGroup;
 			children = (
 				DE66EF3D08ABEE5F00323D32 /* LICENSE.TXT */,
-				DE66EF3F08ABEE5F00323D32 /* PowerPC.h */,
-				DE66EF4008ABEE5F00323D32 /* PowerPC.td */,
-				DE66EF4108ABEE5F00323D32 /* PowerPCAsmPrinter.cpp */,
-				DE66EF4208ABEE5F00323D32 /* PowerPCBranchSelector.cpp */,
-				DE66EF4308ABEE5F00323D32 /* PowerPCFrameInfo.h */,
-				DE66EF4708ABEE5F00323D32 /* PowerPCInstrBuilder.h */,
-				DE66EF4808ABEE5F00323D32 /* PowerPCInstrFormats.td */,
-				DE66EF4908ABEE5F00323D32 /* PowerPCInstrInfo.h */,
-				DE66EF4A08ABEE5F00323D32 /* PowerPCInstrInfo.td */,
-				DE66EF4B08ABEE5F00323D32 /* PowerPCJITInfo.h */,
-				DE66EF4C08ABEE5F00323D32 /* PowerPCRegisterInfo.td */,
-				DE66EF4D08ABEE5F00323D32 /* PowerPCSubtarget.cpp */,
-				DE66EF4E08ABEE5F00323D32 /* PowerPCSubtarget.h */,
-				DE66EF4F08ABEE5F00323D32 /* PowerPCTargetMachine.cpp */,
-				DE66EF5008ABEE5F00323D32 /* PowerPCTargetMachine.h */,
-				DE66EF5108ABEE5F00323D32 /* PPC32.td */,
-				DE66EF5208ABEE5F00323D32 /* PPC32CodeEmitter.cpp */,
-				DE66EF5708ABEE5F00323D32 /* PPC32InstrInfo.cpp */,
-				DE66EF5808ABEE5F00323D32 /* PPC32InstrInfo.h */,
-				DE8170C108CFB59B0093BDEF /* PPC32ISelDAGToDAG.cpp */,
-				DE8170C408CFB5B20093BDEF /* PPC32ISelLowering.cpp */,
-				DE8170C508CFB5B20093BDEF /* PPC32ISelLowering.h */,
-				DE66EF5908ABEE5F00323D32 /* PPC32ISelPattern.cpp */,
-				DE66EF5B08ABEE5F00323D32 /* PPC32JITInfo.cpp */,
-				DE66EF5C08ABEE5F00323D32 /* PPC32JITInfo.h */,
-				DE66EF5D08ABEE5F00323D32 /* PPC32RegisterInfo.cpp */,
-				DE66EF5E08ABEE5F00323D32 /* PPC32RegisterInfo.h */,
-				DE66EF5F08ABEE5F00323D32 /* PPC32RegisterInfo.td */,
-				DE66EF6008ABEE5F00323D32 /* PPC32Relocations.h */,
-				DE66EF6108ABEE5F00323D32 /* PPC32TargetMachine.h */,
-				DE66EF6208ABEE5F00323D32 /* PPC64.td */,
-				DE66EF6D08ABEE5F00323D32 /* PPC64RegisterInfo.td */,
+				DE4DA03F091147DD0012D44B /* PPC.h */,
+				DE4DA040091147DD0012D44B /* PPC.td */,
+				DE4DA041091147DD0012D44B /* PPCAsmPrinter.cpp */,
+				DE4DA042091147DD0012D44B /* PPCBranchSelector.cpp */,
+				DE4DA043091147DD0012D44B /* PPCCodeEmitter.cpp */,
+				DE4DA044091147DD0012D44B /* PPCFrameInfo.h */,
+				DE4DA045091147ED0012D44B /* PPCInstrBuilder.h */,
+				DE4DA046091147ED0012D44B /* PPCInstrFormats.td */,
+				DE4DA047091147ED0012D44B /* PPCInstrInfo.cpp */,
+				DE4DA048091147ED0012D44B /* PPCInstrInfo.h */,
+				DE4DA049091147ED0012D44B /* PPCInstrInfo.td */,
+				DE4DA04A091147ED0012D44B /* PPCISelDAGToDAG.cpp */,
+				DE4DA04B091147ED0012D44B /* PPCISelLowering.cpp */,
+				DE4DA04C091147ED0012D44B /* PPCISelLowering.h */,
+				DE4DA04D091147ED0012D44B /* PPCISelPattern.cpp */,
+				DE4DA04E091147ED0012D44B /* PPCJITInfo.cpp */,
+				DE4DA04F091147ED0012D44B /* PPCJITInfo.h */,
+				DE4DA050091147ED0012D44B /* PPCRegisterInfo.cpp */,
+				DE4DA051091147ED0012D44B /* PPCRegisterInfo.h */,
+				DE4DA052091147ED0012D44B /* PPCRegisterInfo.td */,
+				DE4DA053091147ED0012D44B /* PPCRelocations.h */,
+				DE4DA054091147ED0012D44B /* PPCSchedule.td */,
+				DE4DA055091147ED0012D44B /* PPCScheduleG3.td */,
+				DE4DA056091147ED0012D44B /* PPCScheduleG4.td */,
+				DE4DA057091147ED0012D44B /* PPCScheduleG4Plus.td */,
+				DE4DA058091147ED0012D44B /* PPCScheduleG5.td */,
+				DE4DA059091147ED0012D44B /* PPCSubtarget.cpp */,
+				DE4DA05A091147ED0012D44B /* PPCSubtarget.h */,
+				DE4DA05B091147ED0012D44B /* PPCTargetMachine.cpp */,
+				DE4DA05C091147ED0012D44B /* PPCTargetMachine.h */,
 				DE66EF6F08ABEE5F00323D32 /* README.txt */,
 			);
 			path = PowerPC;
@@ -1473,7 +1454,6 @@
 				DE66EFBE08ABEE5F00323D32 /* SparcV8InstrInfo.cpp */,
 				DE66EFBF08ABEE5F00323D32 /* SparcV8InstrInfo.h */,
 				DE66EFC008ABEE5F00323D32 /* SparcV8InstrInfo.td */,
-				DE66EFC108ABEE5F00323D32 /* SparcV8ISelPattern.cpp */,
 				DE66EFC208ABEE5F00323D32 /* SparcV8ISelSimple.cpp */,
 				DE66EFC308ABEE5F00323D32 /* SparcV8JITInfo.h */,
 				DE66EFC408ABEE5F00323D32 /* SparcV8RegisterInfo.cpp */,
@@ -1662,7 +1642,6 @@
 		DE66F0EE08ABEFB300323D32 /* Instrumentation */ = {
 			isa = PBXGroup;
 			children = (
-				DE66F10108ABEFB300323D32 /* ProfilePaths */,
 				DE66F0EF08ABEFB300323D32 /* BlockProfiling.cpp */,
 				DE66F0FE08ABEFB300323D32 /* EdgeProfiling.cpp */,
 				DE66F0FF08ABEFB300323D32 /* EmitFunctions.cpp */,
@@ -1674,21 +1653,6 @@
 			path = Instrumentation;
 			sourceTree = "<group>";
 		};
-		DE66F10108ABEFB300323D32 /* ProfilePaths */ = {
-			isa = PBXGroup;
-			children = (
-				DE66F10208ABEFB300323D32 /* CombineBranch.cpp */,
-				DE66F11308ABEFB300323D32 /* EdgeCode.cpp */,
-				DE66F11408ABEFB300323D32 /* Graph.cpp */,
-				DE66F11508ABEFB300323D32 /* Graph.h */,
-				DE66F11608ABEFB300323D32 /* GraphAuxiliary.cpp */,
-				DE66F11708ABEFB300323D32 /* InstLoops.cpp */,
-				DE66F11908ABEFB300323D32 /* ProfilePaths.cpp */,
-				DE66F11A08ABEFB300323D32 /* RetracePath.cpp */,
-			);
-			path = ProfilePaths;
-			sourceTree = "<group>";
-		};
 		DE66F11F08ABEFB300323D32 /* IPO */ = {
 			isa = PBXGroup;
 			children = (
@@ -1729,7 +1693,6 @@
 				DE66F1A408ABEFB400323D32 /* IndVarSimplify.cpp */,
 				DE66F1A508ABEFB400323D32 /* InstructionCombining.cpp */,
 				DE66F1A608ABEFB400323D32 /* LICM.cpp */,
-				DE66F1A708ABEFB400323D32 /* LoopSimplify.cpp */,
 				DE66F1A808ABEFB400323D32 /* LoopStrengthReduce.cpp */,
 				DE66F1A908ABEFB400323D32 /* LoopUnroll.cpp */,
 				DE66F1AA08ABEFB400323D32 /* LoopUnswitch.cpp */,
@@ -1764,6 +1727,7 @@
 				DE66F1E008ABEFB400323D32 /* DemoteRegToStack.cpp */,
 				DE66F1E108ABEFB400323D32 /* InlineFunction.cpp */,
 				DE66F1E208ABEFB400323D32 /* Local.cpp */,
+				DE4DA0390911476D0012D44B /* LoopSimplify.cpp */,
 				DE66F1E408ABEFB400323D32 /* PromoteMemoryToRegister.cpp */,
 				DE66F1E508ABEFB400323D32 /* SimplifyCFG.cpp */,
 				DE66F1E608ABEFB400323D32 /* UnifyFunctionExitNodes.cpp */,
@@ -1860,7 +1824,6 @@
 				DE66F20908ABF03100323D32 /* DataStructure */,
 				DE66F20F08ABF03100323D32 /* Dominators.h */,
 				DE66F21008ABF03100323D32 /* Expressions.h */,
-				DE66F21108ABF03100323D32 /* FindUnsafePointerTypes.h */,
 				DE66F21208ABF03100323D32 /* FindUsedTypes.h */,
 				DE66F21308ABF03100323D32 /* Interval.h */,
 				DE66F21408ABF03100323D32 /* IntervalIterator.h */,
@@ -1927,6 +1890,8 @@
 				DE66F23708ABF03100323D32 /* ELFWriter.h */,
 				DE66F23808ABF03100323D32 /* InstrScheduling.h */,
 				DE66F23908ABF03100323D32 /* IntrinsicLowering.h */,
+				DE4DA03C091147920012D44B /* LiveInterval.h */,
+				DE4DA03D091147920012D44B /* LiveIntervalAnalysis.h */,
 				DE66F23A08ABF03100323D32 /* LiveVariables.h */,
 				DE66F23B08ABF03100323D32 /* MachineBasicBlock.h */,
 				DE66F23C08ABF03100323D32 /* MachineCodeEmitter.h */,
@@ -2113,6 +2078,7 @@
 				DE66F2BF08ABF14400323D32 /* AnalysisWrappers.cpp */,
 				DE66F2C008ABF14400323D32 /* analyze.cpp */,
 				DE66F2C908ABF14400323D32 /* GraphPrinters.cpp */,
+				DE4DA03E091147C00012D44B /* PrintSCC.cpp */,
 			);
 			path = analyze;
 			sourceTree = "<group>";
@@ -2316,12 +2282,12 @@
 				DE81708808CFB44D0093BDEF /* FileParser.y */,
 				DE81708908CFB44D0093BDEF /* InstrInfoEmitter.cpp */,
 				DE81708A08CFB44D0093BDEF /* InstrInfoEmitter.h */,
-				DE81708B08CFB44D0093BDEF /* InstrSelectorEmitter.cpp */,
-				DE81708C08CFB44D0093BDEF /* InstrSelectorEmitter.h */,
 				DE81708E08CFB44D0093BDEF /* Record.cpp */,
 				DE81708F08CFB44D0093BDEF /* Record.h */,
 				DE81709008CFB44D0093BDEF /* RegisterInfoEmitter.cpp */,
 				DE81709108CFB44D0093BDEF /* RegisterInfoEmitter.h */,
+				DE4DA065091148520012D44B /* SubtargetEmitter.cpp */,
+				DE4DA066091148520012D44B /* SubtargetEmitter.h */,
 				DE8170AA08CFB44D0093BDEF /* TableGen.cpp */,
 				DE8170AB08CFB44D0093BDEF /* TableGenBackend.cpp */,
 				DE8170AC08CFB44D0093BDEF /* TableGenBackend.h */,





From jlaskey at apple.com  Thu Oct 27 13:18:17 2005
From: jlaskey at apple.com (Jim Laskey)
Date: Thu, 27 Oct 2005 13:18:17 -0500
Subject: [llvm-commits] 
	CVS: llvm/include/llvm/Target/TargetInstrItineraries.h
Message-ID: <200510271818.NAA06073@zion.cs.uiuc.edu>



Changes in directory llvm/include/llvm/Target:

TargetInstrItineraries.h added (r1.1)
---
Log message:

Structures used to hold scheduling information.


---
Diffs of the changes:  (+46 -0)

 TargetInstrItineraries.h |   46 ++++++++++++++++++++++++++++++++++++++++++++++
 1 files changed, 46 insertions(+)


Index: llvm/include/llvm/Target/TargetInstrItineraries.h
diff -c /dev/null llvm/include/llvm/Target/TargetInstrItineraries.h:1.1
*** /dev/null	Thu Oct 27 13:18:16 2005
--- llvm/include/llvm/Target/TargetInstrItineraries.h	Thu Oct 27 13:18:05 2005
***************
*** 0 ****
--- 1,46 ----
+ //===-- llvm/Target/TargetInstrItineraries.h - Scheduling -------*- C++ -*-===//
+ //
+ //                     The LLVM Compiler Infrastructure
+ //
+ // This file was developed by the James M. Laskey and is distributed under
+ // the University of Illinois Open Source License. See LICENSE.TXT for details.
+ //
+ //===----------------------------------------------------------------------===//
+ //
+ // This file describes the structures used for instruction itineraries and
+ // states.  This is used by schedulers to determine instruction states and
+ // latencies.
+ //
+ //===----------------------------------------------------------------------===//
+ 
+ #ifndef LLVM_TARGET_TARGETINSTRITINERARIES_H
+ #define LLVM_TARGET_TARGETINSTRITINERARIES_H
+ 
+ namespace llvm {
+ 
+ //===----------------------------------------------------------------------===//
+ // Instruction stage - These values represent a step in the execution of an
+ // instruction.  The latency represents the number of discrete time slots used
+ // need to complete the stage.  Units represent the choice of functional units
+ // that can be used to complete the stage.  Eg. IntUnit1, IntUnit2.
+ //
+ struct InstrStage {
+   unsigned Cycles;  // Length of stage in machine cycles
+   unsigned Units;   // Choice of functional units
+ };
+ 
+ 
+ //===----------------------------------------------------------------------===//
+ // Instruction itinerary - An itinerary represents a sequential series of steps
+ // required to complete an instruction.  Itineraries are represented as
+ // sequences of instruction stages.
+ //
+ struct InstrItinerary {
+   unsigned First;    // Index of first stage in itinerary
+   unsigned Last;     // Index of last + 1 stage in itinerary
+ };
+ 
+ 
+ } // End llvm namespace
+ 
+ #endif





From jlaskey at apple.com  Thu Oct 27 14:47:33 2005
From: jlaskey at apple.com (Jim Laskey)
Date: Thu, 27 Oct 2005 14:47:33 -0500
Subject: [llvm-commits] CVS: llvm/utils/TableGen/SubtargetEmitter.h
	SubtargetEmitter.cpp 
Message-ID: <200510271947.OAA06570@zion.cs.uiuc.edu>



Changes in directory llvm/utils/TableGen:

SubtargetEmitter.h updated: 1.3 -> 1.4
SubtargetEmitter.cpp updated: 1.6 -> 1.7
---
Log message:

Now generating instruction itineraries for scheduling.  Not my best work, but...



---
Diffs of the changes:  (+211 -32)

 SubtargetEmitter.cpp |  221 +++++++++++++++++++++++++++++++++++++++++++--------
 SubtargetEmitter.h   |   22 ++++-
 2 files changed, 211 insertions(+), 32 deletions(-)


Index: llvm/utils/TableGen/SubtargetEmitter.h
diff -u llvm/utils/TableGen/SubtargetEmitter.h:1.3 llvm/utils/TableGen/SubtargetEmitter.h:1.4
--- llvm/utils/TableGen/SubtargetEmitter.h:1.3	Wed Oct 26 12:30:34 2005
+++ llvm/utils/TableGen/SubtargetEmitter.h	Thu Oct 27 14:47:21 2005
@@ -15,17 +15,37 @@
 #define SUBTARGET_EMITTER_H
 
 #include "TableGenBackend.h"
+#include "llvm/Target/TargetInstrItineraries.h"
+#include <vector>
+#include <map>
+#include <string>
+
 
 namespace llvm {
 
+//
+// Convenience types.
+//
+typedef std::map<std::string, unsigned> IntMap;
+typedef std::vector<InstrItinerary> IntineraryList;
+typedef std::vector<IntineraryList> ProcessorList;
+
 class SubtargetEmitter : public TableGenBackend {
+  
   RecordKeeper &Records;
   std::string Target;
   
   void Enumeration(std::ostream &OS, const char *ClassName, bool isBits);
   void FeatureKeyValues(std::ostream &OS);
   void CPUKeyValues(std::ostream &OS);
-  void SubtargetEmitter::ParseFeaturesFunction(std::ostream &OS);
+  unsigned CollectAllItinClasses(IntMap &ItinClassesMap);
+  void FormItineraryString(Record *ItinData, std::string &ItinString,
+                           unsigned &N);
+  void EmitStageData(std::ostream &OS, unsigned N,
+                     IntMap &ItinClassesMap, ProcessorList &ProcList);
+  void EmitProcessData(std::ostream &OS, ProcessorList &ProcList);
+  void EmitData(std::ostream &OS);
+  void ParseFeaturesFunction(std::ostream &OS);
   
 public:
   SubtargetEmitter(RecordKeeper &R) : Records(R) {}


Index: llvm/utils/TableGen/SubtargetEmitter.cpp
diff -u llvm/utils/TableGen/SubtargetEmitter.cpp:1.6 llvm/utils/TableGen/SubtargetEmitter.cpp:1.7
--- llvm/utils/TableGen/SubtargetEmitter.cpp:1.6	Wed Oct 26 12:49:21 2005
+++ llvm/utils/TableGen/SubtargetEmitter.cpp	Thu Oct 27 14:47:21 2005
@@ -16,15 +16,46 @@
 #include "Record.h"
 #include "llvm/ADT/StringExtras.h"
 #include "llvm/Support/Debug.h"
-#include <algorithm>
-#include <set>
 using namespace llvm;
 
 //
 // Convenience types.
 //
 typedef std::vector<Record*> RecordList;
-typedef std::vector<Record*>::iterator RecordListIter;
+
+struct RecordListIter {
+  std::vector<Record*>::iterator RI;
+  std::vector<Record*>::iterator E;
+  
+  RecordListIter(RecordList &RL)
+      : RI(RL.begin()), E(RL.end())
+  {}
+  
+  bool isMore() const { return RI != E; }
+  
+  Record *next() { return isMore() ? *RI++ : NULL; }
+};
+
+struct DefListIter {
+  ListInit *List;
+  unsigned N;
+  unsigned i;
+
+  DefListIter(Record *R, const std::string &Name)
+      : List(R->getValueAsListInit(Name)), N(List->getSize()), i(0)
+  {}
+  
+  bool isMore() const { return i < N; }
+  
+  Record *next() {
+    if (isMore()) {
+      if (DefInit *DI = dynamic_cast<DefInit*>(List->getElement(i++))) {
+        return DI->getDef();
+      }
+    }
+    return NULL;
+  }
+};
 
 //
 // Record sort by name function.
@@ -57,8 +88,8 @@
   
   OS << "enum {\n";
   
-  for (RecordListIter RI = Defs.begin(), E = Defs.end(); RI != E;) {
-    Record *R = *RI++;
+  RecordListIter DI(Defs);
+  while (Record *R = DI.next()) {
     std::string Instance = R->getName();
     OS << "  "
        << Instance;
@@ -66,7 +97,7 @@
       OS << " = "
          << " 1 << " << i++;
     }
-    OS << ((RI != E) ? ",\n" : "\n");
+    OS << (DI.isMore() ? ",\n" : "\n");
   }
   
   OS << "};\n";
@@ -82,8 +113,8 @@
 
   OS << "// Sorted (by key) array of values for CPU features.\n"
      << "static llvm::SubtargetFeatureKV FeatureKV[] = {\n";
-  for (RecordListIter RI = Features.begin(), E = Features.end(); RI != E;) {
-    Record *R = *RI++;
+  RecordListIter FI(Features);
+  while (Record *R = FI.next()) {
     std::string Instance = R->getName();
     std::string Name = R->getValueAsString("Name");
     std::string Desc = R->getValueAsString("Desc");
@@ -91,7 +122,7 @@
        << "\"" << Name << "\", "
        << "\"" << Desc << "\", "
        << Instance
-       << ((RI != E) ? " },\n" : " }\n");
+       << (FI.isMore() ? " },\n" : " }\n");
   }
   OS << "};\n";
 
@@ -110,35 +141,26 @@
 
   OS << "// Sorted (by key) array of values for CPU subtype.\n"
      << "static const llvm::SubtargetFeatureKV SubTypeKV[] = {\n";
-  for (RecordListIter RI = Processors.begin(), E = Processors.end();
-       RI != E;) {
-    Record *R = *RI++;
+  RecordListIter PI(Processors);
+  while (Record *R = PI.next()) {
     std::string Name = R->getValueAsString("Name");
-    Record *ProcItin = R->getValueAsDef("ProcItin");
-    ListInit *Features = R->getValueAsListInit("Features");
-    unsigned N = Features->getSize();
+    DefListIter FI(R, "Features");
+    
     OS << "  { "
        << "\"" << Name << "\", "
        << "\"Select the " << Name << " processor\", ";
-       
     
-    if (N == 0) {
+    if (!FI.isMore()) {
       OS << "0";
     } else {
-      for (unsigned i = 0; i < N; ) {
-        if (DefInit *DI = dynamic_cast<DefInit*>(Features->getElement(i++))) {
-          Record *Feature = DI->getDef();
-          std::string Name = Feature->getName();
-          OS << Name;
-          if (i != N) OS << " | ";
-        } else {
-          throw "Feature: " + Name +
-                " expected feature in processor feature list!";
-        }
+      while (Record *Feature = FI.next()) {
+        std::string Name = Feature->getName();
+        OS << Name;
+        if (FI.isMore()) OS << " | ";
       }
     }
     
-    OS << ((RI != E) ? " },\n" : " }\n");
+    OS << (PI.isMore() ? " },\n" : " }\n");
   }
   OS << "};\n";
 
@@ -148,6 +170,140 @@
 }
 
 //
+// CollectAllItinClasses - Gathers and enumerates all the itinerary classes.
+//
+unsigned SubtargetEmitter::CollectAllItinClasses(IntMap &ItinClassesMap) {
+  RecordList ICL = Records.getAllDerivedDefinitions("InstrItinClass");
+  sort(ICL.begin(), ICL.end(), LessRecord());
+  
+  RecordListIter ICI(ICL);
+  unsigned Index = 0;
+  while (Record *ItinClass = ICI.next()) {
+    std::string Name = ItinClass->getName();
+    ItinClassesMap[Name] = Index++;
+  }
+  
+  return Index;
+}
+
+//
+// FormItineraryString - Compose a string containing the data initialization
+// for the specified itinerary.  N is the number of stages.
+//
+void SubtargetEmitter::FormItineraryString(Record *ItinData,
+                                           std::string &ItinString,
+                                           unsigned &N) {
+  DefListIter SLI(ItinData, "Stages");
+  N = SLI.N;
+  while (Record *Stage = SLI.next()) {
+    int Cycles = Stage->getValueAsInt("Cycles");
+    ItinString += "  ,{ " + itostr(Cycles) + ", ";
+    
+    DefListIter ULI(Stage, "Units");
+    while (Record *Unit = ULI.next()) {
+      std::string Name = Unit->getName();
+      ItinString += Name;
+      if (ULI.isMore())ItinString += " | ";
+    }
+  }
+  
+  ItinString += " }";
+}
+
+//
+// EmitStageData - Generate unique itinerary stages.  Record itineraries for 
+// processors.
+//
+void SubtargetEmitter::EmitStageData(std::ostream &OS,
+                                     unsigned N,
+                                     IntMap &ItinClassesMap, 
+                                     ProcessorList &ProcList) {
+  OS << "static llvm::InstrStage Stages[] = {\n"
+        "  { 0, 0 } // No itinerary\n";
+        
+  IntMap ItinMap;
+  unsigned Index  = 1;
+  RecordList Itins = Records.getAllDerivedDefinitions("ProcessorItineraries");
+  RecordListIter II(Itins);
+  while (Record *Itin = II.next()) {
+    std::string Name = Itin->getName();
+    if (Name == "NoItineraries") continue;
+    
+    IntineraryList IL;
+    IL.resize(N);
+    
+    DefListIter IDLI(Itin, "IID");
+    while (Record *ItinData = IDLI.next()) {
+      std::string ItinString;
+      unsigned M;
+      FormItineraryString(ItinData, ItinString, M);
+
+      unsigned Find = ItinMap[ItinString];
+      
+      if (Find == 0) {
+        OS << ItinString << " // " << Index << "\n";
+        ItinMap[ItinString] = Find = Index++;
+      }
+      
+      InstrItinerary Intinerary = { Find, Find + M };
+
+      std::string Name = ItinData->getValueAsDef("TheClass")->getName();
+      Find = ItinClassesMap[Name];
+      IL[Find] = Intinerary;
+    }
+    
+    ProcList.push_back(IL);
+  }
+  
+  OS << "};\n";
+}
+
+//
+// EmitProcessData - Generate data for processor itineraries.
+//
+void SubtargetEmitter::EmitProcessData(std::ostream &OS,
+                                       ProcessorList &ProcList) {
+  ProcessorList::iterator PLI = ProcList.begin();
+  RecordList Itins = Records.getAllDerivedDefinitions("ProcessorItineraries");
+  RecordListIter II(Itins);
+  while (Record *Itin = II.next()) {
+    std::string Name = Itin->getName();
+    if (Name == "NoItineraries") continue;
+
+    OS << "\n";
+    OS << "static llvm::InstrItinerary " << Name << "[] = {\n";
+    
+    IntineraryList &IL = *PLI++;
+    unsigned Index = 0;
+    for (IntineraryList::iterator ILI = IL.begin(), E = IL.end(); ILI != E;) {
+      InstrItinerary &Intinerary = *ILI++;
+      
+      if (Intinerary.First == 0) {
+        OS << "  { 0, 0 }";
+      } else {
+        OS << "  { " << Intinerary.First << ", " << Intinerary.Last << " }";
+      }
+      
+      if (ILI != E) OS << ",";
+      OS << " // " << Index++ << "\n";
+    }
+    OS << "};\n";
+  }
+}
+
+//
+// EmitData - Emits all stages and itineries, folding common patterns.
+//
+void SubtargetEmitter::EmitData(std::ostream &OS) {
+  IntMap ItinClassesMap;
+  ProcessorList ProcList;
+  
+  unsigned N = CollectAllItinClasses(ItinClassesMap);
+  EmitStageData(OS, N, ItinClassesMap, ProcList);
+  EmitProcessData(OS, ProcList);
+}
+
+//
 // ParseFeaturesFunction - Produces a subtarget specific function for parsing
 // the subtarget features string.
 //
@@ -166,8 +322,8 @@
         "  uint32_t Bits =  Features.getBits(SubTypeKV, SubTypeKVSize,\n"
         "                                    FeatureKV, FeatureKVSize);\n";
         
-  for (RecordListIter RI = Features.begin(), E = Features.end(); RI != E;) {
-    Record *R = *RI++;
+  RecordListIter FI(Features);
+  while (Record *R = FI.next()) {
     std::string Instance = R->getName();
     std::string Name = R->getValueAsString("Name");
     std::string Type = R->getValueAsString("Type");
@@ -186,7 +342,8 @@
 
   EmitSourceFileHeader("Subtarget Enumeration Source Fragment", OS);
 
-  OS << "#include \"llvm/Target/SubtargetFeature.h\"\n\n";
+  OS << "#include \"llvm/Target/SubtargetFeature.h\"\n";
+  OS << "#include \"llvm/Target/TargetInstrItineraries.h\"\n\n";
   
   Enumeration(OS, "FuncUnit", true);
   OS<<"\n";
@@ -198,5 +355,7 @@
   OS<<"\n";
   CPUKeyValues(OS);
   OS<<"\n";
+  EmitData(OS);
+  OS<<"\n";
   ParseFeaturesFunction(OS);
 }





From lattner at cs.uiuc.edu  Thu Oct 27 19:20:57 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu, 27 Oct 2005 19:20:57 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/README.txt 
Message-ID: <200510280020.TAA12674@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/PowerPC:

README.txt updated: 1.34 -> 1.35
---
Log message:

a bad case for bitfield insert


---
Diffs of the changes:  (+34 -0)

 README.txt |   34 ++++++++++++++++++++++++++++++++++
 1 files changed, 34 insertions(+)


Index: llvm/lib/Target/PowerPC/README.txt
diff -u llvm/lib/Target/PowerPC/README.txt:1.34 llvm/lib/Target/PowerPC/README.txt:1.35
--- llvm/lib/Target/PowerPC/README.txt:1.34	Tue Oct 25 18:50:02 2005
+++ llvm/lib/Target/PowerPC/README.txt	Thu Oct 27 19:20:45 2005
@@ -185,3 +185,37 @@
 things like this, rather than forcing llvm to generate the equivalent
 
 (shl (add bitfield, C2), C1) with some kind of mask.
+
+===-------------------------------------------------------------------------===
+
+Compile this (standard bitfield insert of a constant):
+void %test(uint* %tmp1) {
+        %tmp2 = load uint* %tmp1                ; <uint> [#uses=1]
+        %tmp5 = or uint %tmp2, 257949696                ; <uint> [#uses=1]
+        %tmp6 = and uint %tmp5, 4018143231              ; <uint> [#uses=1]
+        store uint %tmp6, uint* %tmp1
+        ret void
+}
+
+to:
+
+_test:
+        lwz r0,0(r3)
+        li r2,123
+        rlwimi r0,r2,21,3,10
+        stw r0,0(r3)
+        blr
+
+instead of:
+
+_test:
+        lis r2, -4225
+        lwz r4, 0(r3)
+        ori r2, r2, 65535
+        oris r4, r4, 3936
+        and r2, r4, r2
+        stw r2, 0(r3)
+        blr
+
+
+





From jeffc at jolt-lang.org  Thu Oct 27 20:43:21 2005
From: jeffc at jolt-lang.org (Jeff Cohen)
Date: Thu, 27 Oct 2005 20:43:21 -0500
Subject: [llvm-commits] CVS: llvm/utils/TableGen/SubtargetEmitter.cpp 
Message-ID: <200510280143.UAA12899@zion.cs.uiuc.edu>



Changes in directory llvm/utils/TableGen:

SubtargetEmitter.cpp updated: 1.7 -> 1.8
---
Log message:

Keep Visual Studio happy.

---
Diffs of the changes:  (+1 -0)

 SubtargetEmitter.cpp |    1 +
 1 files changed, 1 insertion(+)


Index: llvm/utils/TableGen/SubtargetEmitter.cpp
diff -u llvm/utils/TableGen/SubtargetEmitter.cpp:1.7 llvm/utils/TableGen/SubtargetEmitter.cpp:1.8
--- llvm/utils/TableGen/SubtargetEmitter.cpp:1.7	Thu Oct 27 14:47:21 2005
+++ llvm/utils/TableGen/SubtargetEmitter.cpp	Thu Oct 27 20:43:09 2005
@@ -16,6 +16,7 @@
 #include "Record.h"
 #include "llvm/ADT/StringExtras.h"
 #include "llvm/Support/Debug.h"
+#include <algorithm>
 using namespace llvm;
 
 //





From jeffc at jolt-lang.org  Thu Oct 27 20:43:22 2005
From: jeffc at jolt-lang.org (Jeff Cohen)
Date: Thu, 27 Oct 2005 20:43:22 -0500
Subject: [llvm-commits] CVS: llvm/win32/Target/Target.vcproj 
Message-ID: <200510280143.UAA12907@zion.cs.uiuc.edu>



Changes in directory llvm/win32/Target:

Target.vcproj updated: 1.10 -> 1.11
---
Log message:

Keep Visual Studio happy.

---
Diffs of the changes:  (+3 -0)

 Target.vcproj |    3 +++
 1 files changed, 3 insertions(+)


Index: llvm/win32/Target/Target.vcproj
diff -u llvm/win32/Target/Target.vcproj:1.10 llvm/win32/Target/Target.vcproj:1.11
--- llvm/win32/Target/Target.vcproj:1.10	Thu Sep  1 21:51:42 2005
+++ llvm/win32/Target/Target.vcproj	Thu Oct 27 20:43:09 2005
@@ -157,6 +157,9 @@
 				RelativePath="..\..\include\llvm\Target\TargetInstrInfo.h">
 			</File>
 			<File
+				RelativePath="..\..\include\llvm\Target\TargetInstrItineraries.h">
+			</File>
+			<File
 				RelativePath="..\..\include\llvm\Target\TargetJITInfo.h">
 			</File>
 			<File





From jeffc at jolt-lang.org  Thu Oct 27 20:43:22 2005
From: jeffc at jolt-lang.org (Jeff Cohen)
Date: Thu, 27 Oct 2005 20:43:22 -0500
Subject: [llvm-commits] CVS: llvm/win32/Analysis/Analysis.vcproj 
Message-ID: <200510280143.UAA12903@zion.cs.uiuc.edu>



Changes in directory llvm/win32/Analysis:

Analysis.vcproj updated: 1.13 -> 1.14
---
Log message:

Keep Visual Studio happy.

---
Diffs of the changes:  (+6 -0)

 Analysis.vcproj |    6 ++++++
 1 files changed, 6 insertions(+)


Index: llvm/win32/Analysis/Analysis.vcproj
diff -u llvm/win32/Analysis/Analysis.vcproj:1.13 llvm/win32/Analysis/Analysis.vcproj:1.14
--- llvm/win32/Analysis/Analysis.vcproj:1.13	Sun Oct 23 21:57:24 2005
+++ llvm/win32/Analysis/Analysis.vcproj	Thu Oct 27 20:43:09 2005
@@ -125,6 +125,9 @@
 				RelativePath="..\..\lib\Analysis\CFGPrinter.cpp">
 			</File>
 			<File
+				RelativePath="..\..\lib\Analysis\ConstantFolding.cpp">
+			</File>
+			<File
 				RelativePath="..\..\lib\Analysis\Expressions.cpp">
 			</File>
 			<File
@@ -246,6 +249,9 @@
 				RelativePath="..\..\include\llvm\Analysis\CFGPrinter.h">
 			</File>
 			<File
+				RelativePath="..\..\include\llvm\Analysis\ConstantFolding.h">
+			</File>
+			<File
 				RelativePath="..\..\include\llvm\Analysis\ConstantsScanner.h">
 			</File>
 			<File





From lattner at cs.uiuc.edu  Thu Oct 27 23:57:23 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu, 27 Oct 2005 23:57:23 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/IA64/IA64RegisterInfo.cpp 
Message-ID: <200510280457.XAA13509@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/IA64:

IA64RegisterInfo.cpp updated: 1.7 -> 1.8
---
Log message:

Eliminate getClass, it is not needed


---
Diffs of the changes:  (+6 -7)

 IA64RegisterInfo.cpp |   13 ++++++-------
 1 files changed, 6 insertions(+), 7 deletions(-)


Index: llvm/lib/Target/IA64/IA64RegisterInfo.cpp
diff -u llvm/lib/Target/IA64/IA64RegisterInfo.cpp:1.7 llvm/lib/Target/IA64/IA64RegisterInfo.cpp:1.8
--- llvm/lib/Target/IA64/IA64RegisterInfo.cpp:1.7	Thu Sep 29 20:30:29 2005
+++ llvm/lib/Target/IA64/IA64RegisterInfo.cpp	Thu Oct 27 23:57:11 2005
@@ -53,13 +53,12 @@
                                            unsigned SrcReg, int FrameIdx,
                                            const TargetRegisterClass *RC) const{
 
-  if (getClass(SrcReg) == IA64::FPRegisterClass) {
+  if (RC == IA64::FPRegisterClass) {
     BuildMI(MBB, MI, IA64::STF8, 2).addFrameIndex(FrameIdx).addReg(SrcReg);
-  }
-  else if (getClass(SrcReg) == IA64::GRRegisterClass) {
+  } else if (RC == IA64::GRRegisterClass) {
     BuildMI(MBB, MI, IA64::ST8, 2).addFrameIndex(FrameIdx).addReg(SrcReg);
  }
-  else if (getClass(SrcReg) == IA64::PRRegisterClass) {
+  else if (RC == IA64::PRRegisterClass) {
     /* we use IA64::r2 as a temporary register for doing this hackery. */
     // first we load 0:
     BuildMI(MBB, MI, IA64::MOV, 1, IA64::r2).addReg(IA64::r0);
@@ -77,11 +76,11 @@
                                             unsigned DestReg, int FrameIdx,
                                             const TargetRegisterClass *RC)const{
 
-  if (getClass(DestReg) == IA64::FPRegisterClass) {
+  if (RC == IA64::FPRegisterClass) {
     BuildMI(MBB, MI, IA64::LDF8, 1, DestReg).addFrameIndex(FrameIdx);
-  } else if (getClass(DestReg) == IA64::GRRegisterClass) {
+  } else if (RC == IA64::GRRegisterClass) {
     BuildMI(MBB, MI, IA64::LD8, 1, DestReg).addFrameIndex(FrameIdx);
- } else if (getClass(DestReg) == IA64::PRRegisterClass) {
+ } else if (RC == IA64::PRRegisterClass) {
    // first we load a byte from the stack into r2, our 'predicate hackery'
    // scratch reg
    BuildMI(MBB, MI, IA64::LD8, 1, IA64::r2).addFrameIndex(FrameIdx);





From lattner at cs.uiuc.edu  Thu Oct 27 23:58:35 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu, 27 Oct 2005 23:58:35 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/IA64/IA64RegisterInfo.cpp 
Message-ID: <200510280458.XAA13566@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/IA64:

IA64RegisterInfo.cpp updated: 1.8 -> 1.9
---
Log message:

remove dead stuff


---
Diffs of the changes:  (+0 -14)

 IA64RegisterInfo.cpp |   14 --------------
 1 files changed, 14 deletions(-)


Index: llvm/lib/Target/IA64/IA64RegisterInfo.cpp
diff -u llvm/lib/Target/IA64/IA64RegisterInfo.cpp:1.8 llvm/lib/Target/IA64/IA64RegisterInfo.cpp:1.9
--- llvm/lib/Target/IA64/IA64RegisterInfo.cpp:1.8	Thu Oct 27 23:57:11 2005
+++ llvm/lib/Target/IA64/IA64RegisterInfo.cpp	Thu Oct 27 23:58:24 2005
@@ -28,26 +28,12 @@
 #include "llvm/Support/CommandLine.h"
 #include "llvm/ADT/STLExtras.h"
 #include <iostream>
-
 using namespace llvm;
 
-namespace {
-}
 
 IA64RegisterInfo::IA64RegisterInfo()
   : IA64GenRegisterInfo(IA64::ADJUSTCALLSTACKDOWN, IA64::ADJUSTCALLSTACKUP) {}
 
-static const TargetRegisterClass *getClass(unsigned SrcReg) {
-  if (IA64::FPRegisterClass->contains(SrcReg))
-    return IA64::FPRegisterClass;
-  if (IA64::PRRegisterClass->contains(SrcReg))
-    return IA64::PRRegisterClass;
-
-  assert(IA64::GRRegisterClass->contains(SrcReg) &&
-         "PROBLEM: Reg is not FP, predicate or GR!");
-  return IA64::GRRegisterClass;
-}
-
 void IA64RegisterInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
                                            MachineBasicBlock::iterator MI,
                                            unsigned SrcReg, int FrameIdx,





From jlaskey at apple.com  Fri Oct 28 10:20:55 2005
From: jlaskey at apple.com (Jim Laskey)
Date: Fri, 28 Oct 2005 10:20:55 -0500
Subject: [llvm-commits] CVS: llvm/utils/TableGen/SubtargetEmitter.cpp 
Message-ID: <200510281520.KAA03211@zion.cs.uiuc.edu>



Changes in directory llvm/utils/TableGen:

SubtargetEmitter.cpp updated: 1.8 -> 1.9
---
Log message:

Add some commentary.


---
Diffs of the changes:  (+121 -21)

 SubtargetEmitter.cpp |  142 +++++++++++++++++++++++++++++++++++++++++++--------
 1 files changed, 121 insertions(+), 21 deletions(-)


Index: llvm/utils/TableGen/SubtargetEmitter.cpp
diff -u llvm/utils/TableGen/SubtargetEmitter.cpp:1.8 llvm/utils/TableGen/SubtargetEmitter.cpp:1.9
--- llvm/utils/TableGen/SubtargetEmitter.cpp:1.8	Thu Oct 27 20:43:09 2005
+++ llvm/utils/TableGen/SubtargetEmitter.cpp	Fri Oct 28 10:20:43 2005
@@ -24,30 +24,57 @@
 //
 typedef std::vector<Record*> RecordList;
 
-struct RecordListIter {
-  std::vector<Record*>::iterator RI;
-  std::vector<Record*>::iterator E;
-  
+//
+// RecordListIter - Simplify iterating through a std::vector of records.
+// 
+class RecordListIter {
+  std::vector<Record*>::iterator RI;  // Currect cursor
+  std::vector<Record*>::iterator E;   // End point
+
+public:
+  
+  //
+  // Ctor.
+  //
   RecordListIter(RecordList &RL)
       : RI(RL.begin()), E(RL.end())
   {}
   
+  
+  //
+  // isMore - Return true if more records are available.
+  //
   bool isMore() const { return RI != E; }
   
+  //
+  // next - Return the next record or NULL if none.
+  //
   Record *next() { return isMore() ? *RI++ : NULL; }
 };
 
+//
+// DefListIter - Simplify iterating through a field which is a list of records.
+// 
 struct DefListIter {
-  ListInit *List;
-  unsigned N;
-  unsigned i;
-
+  ListInit *List;  // List of DefInit
+  unsigned N;      // Number of elements in list
+  unsigned i;      // Current index in list
+
+  //
+  // Ctor - Lookup field and get list and length.
+  //
   DefListIter(Record *R, const std::string &Name)
       : List(R->getValueAsListInit(Name)), N(List->getSize()), i(0)
   {}
   
+  //
+  // isMore - Return true if more records are available.
+  //
   bool isMore() const { return i < N; }
   
+  //
+  // next - Return the next record or NULL if none.
+  //
   Record *next() {
     if (isMore()) {
       if (DefInit *DI = dynamic_cast<DefInit*>(List->getElement(i++))) {
@@ -82,25 +109,31 @@
 void SubtargetEmitter::Enumeration(std::ostream &OS,
                                    const char *ClassName,
                                    bool isBits) {
+  // Get all records of class and sort
   RecordList Defs = Records.getAllDerivedDefinitions(ClassName);
   sort(Defs.begin(), Defs.end(), LessRecord());
 
+  // Track position if isBits
   int i = 0;
   
+  // Open enumeration
   OS << "enum {\n";
   
+  // For each record
   RecordListIter DI(Defs);
   while (Record *R = DI.next()) {
-    std::string Instance = R->getName();
-    OS << "  "
-       << Instance;
-    if (isBits) {
-      OS << " = "
-         << " 1 << " << i++;
-    }
+    // Get and emit name
+    std::string Name = R->getName();
+    OS << "  " << Name;
+    
+    // If bit flags then emit expression (1 << i)
+    if (isBits)  OS << " = " << " 1 << " << i++;
+
+    // Depending on if more in the list, emit comma and new line
     OS << (DI.isMore() ? ",\n" : "\n");
   }
   
+  // Close enumeration
   OS << "};\n";
 }
 
@@ -109,24 +142,33 @@
 // line.
 //
 void SubtargetEmitter::FeatureKeyValues(std::ostream &OS) {
+  // Gather and sort all the features
   RecordList Features = Records.getAllDerivedDefinitions("SubtargetFeature");
   sort(Features.begin(), Features.end(), LessRecord());
 
+  // Begin feature table
   OS << "// Sorted (by key) array of values for CPU features.\n"
      << "static llvm::SubtargetFeatureKV FeatureKV[] = {\n";
+  
+  // For each feature
   RecordListIter FI(Features);
   while (Record *R = FI.next()) {
     std::string Instance = R->getName();
     std::string Name = R->getValueAsString("Name");
     std::string Desc = R->getValueAsString("Desc");
+    
+    // Emit as { "feature", "decription", feactureEnum }
     OS << "  { "
        << "\"" << Name << "\", "
        << "\"" << Desc << "\", "
        << Instance
        << (FI.isMore() ? " },\n" : " }\n");
   }
+  
+  // End feature table
   OS << "};\n";
 
+  // Emit size of table
   OS<<"\nenum {\n";
   OS<<"  FeatureKVSize = sizeof(FeatureKV)/sizeof(llvm::SubtargetFeatureKV)\n";
   OS<<"};\n";
@@ -137,16 +179,21 @@
 // line.
 //
 void SubtargetEmitter::CPUKeyValues(std::ostream &OS) {
+  // Gather and sort processor information
   RecordList Processors = Records.getAllDerivedDefinitions("Processor");
   sort(Processors.begin(), Processors.end(), LessRecordFieldName());
 
+  // Begin processor table
   OS << "// Sorted (by key) array of values for CPU subtype.\n"
      << "static const llvm::SubtargetFeatureKV SubTypeKV[] = {\n";
+     
+  // For each processor
   RecordListIter PI(Processors);
   while (Record *R = PI.next()) {
     std::string Name = R->getValueAsString("Name");
     DefListIter FI(R, "Features");
     
+    // Emit as { "cpu", "description", f1 | f2 | ... fn },
     OS << "  { "
        << "\"" << Name << "\", "
        << "\"Select the " << Name << " processor\", ";
@@ -163,8 +210,11 @@
     
     OS << (PI.isMore() ? " },\n" : " }\n");
   }
+  
+  // End processor table
   OS << "};\n";
 
+  // Emit size of table
   OS<<"\nenum {\n";
   OS<<"  SubTypeKVSize = sizeof(SubTypeKV)/sizeof(llvm::SubtargetFeatureKV)\n";
   OS<<"};\n";
@@ -172,18 +222,26 @@
 
 //
 // CollectAllItinClasses - Gathers and enumerates all the itinerary classes.
+// Returns itinerary class count.
 //
 unsigned SubtargetEmitter::CollectAllItinClasses(IntMap &ItinClassesMap) {
+  // Gather and sort all itinerary classes
   RecordList ICL = Records.getAllDerivedDefinitions("InstrItinClass");
   sort(ICL.begin(), ICL.end(), LessRecord());
+
+  // Track enumeration
+  unsigned Index = 0;
   
+  // For each class
   RecordListIter ICI(ICL);
-  unsigned Index = 0;
   while (Record *ItinClass = ICI.next()) {
+    // Get name of itinerary class
     std::string Name = ItinClass->getName();
+    // Assign itinerary class a unique number
     ItinClassesMap[Name] = Index++;
   }
   
+  // Return itinerary class count
   return Index;
 }
 
@@ -194,21 +252,28 @@
 void SubtargetEmitter::FormItineraryString(Record *ItinData,
                                            std::string &ItinString,
                                            unsigned &N) {
+  // Set up stages iterator
   DefListIter SLI(ItinData, "Stages");
+  // Get stage count
   N = SLI.N;
+
+  // For each stage
   while (Record *Stage = SLI.next()) {
+    // Form string as ,{ cycles, u1 | u2 | ... | un }
     int Cycles = Stage->getValueAsInt("Cycles");
     ItinString += "  ,{ " + itostr(Cycles) + ", ";
     
+    // For each unit
     DefListIter ULI(Stage, "Units");
     while (Record *Unit = ULI.next()) {
       std::string Name = Unit->getName();
       ItinString += Name;
       if (ULI.isMore())ItinString += " | ";
     }
+    
+    // Close off stage
+    ItinString += " }";
   }
-  
-  ItinString += " }";
 }
 
 //
@@ -219,43 +284,64 @@
                                      unsigned N,
                                      IntMap &ItinClassesMap, 
                                      ProcessorList &ProcList) {
+  // Gather processor iteraries
+  RecordList Itins = Records.getAllDerivedDefinitions("ProcessorItineraries");
+  
+  // If just no itinerary then don't bother
+  if (Itins.size() < 2) return;
+
+  // Begin stages table
   OS << "static llvm::InstrStage Stages[] = {\n"
         "  { 0, 0 } // No itinerary\n";
         
   IntMap ItinMap;
   unsigned Index  = 1;
-  RecordList Itins = Records.getAllDerivedDefinitions("ProcessorItineraries");
   RecordListIter II(Itins);
   while (Record *Itin = II.next()) {
+    // Get processor itinerary name
     std::string Name = Itin->getName();
+    
+    // Skip default
     if (Name == "NoItineraries") continue;
     
+    // Create and expand processor itinerary to cover all itinerary classes
     IntineraryList IL;
     IL.resize(N);
     
+    // For each itinerary
     DefListIter IDLI(Itin, "IID");
     while (Record *ItinData = IDLI.next()) {
+      // Get string and stage count
       std::string ItinString;
       unsigned M;
       FormItineraryString(ItinData, ItinString, M);
 
+      // Check to see if it already exists
       unsigned Find = ItinMap[ItinString];
       
+      // If new itinerary
       if (Find == 0) {
+        // Emit as ,{ cycles, u1 | u2 | ... | un } // index
         OS << ItinString << " // " << Index << "\n";
         ItinMap[ItinString] = Find = Index++;
       }
       
+      // Set up itinerary as location and location + stage count
       InstrItinerary Intinerary = { Find, Find + M };
 
+      // Locate where to inject into processor itinerary table
       std::string Name = ItinData->getValueAsDef("TheClass")->getName();
       Find = ItinClassesMap[Name];
+      
+      // Inject - empty slots will be 0, 0
       IL[Find] = Intinerary;
     }
     
+    // Add process itinerary to list
     ProcList.push_back(IL);
   }
   
+  // End stages table
   OS << "};\n";
 }
 
@@ -264,21 +350,30 @@
 //
 void SubtargetEmitter::EmitProcessData(std::ostream &OS,
                                        ProcessorList &ProcList) {
+  // Get an iterator for processor itinerary stages
   ProcessorList::iterator PLI = ProcList.begin();
+  
+  // For each processor itinerary
   RecordList Itins = Records.getAllDerivedDefinitions("ProcessorItineraries");
   RecordListIter II(Itins);
   while (Record *Itin = II.next()) {
+    // Get processor itinerary name
     std::string Name = Itin->getName();
+    
+    // Skip default
     if (Name == "NoItineraries") continue;
 
+    // Begin processor itinerary table
     OS << "\n";
     OS << "static llvm::InstrItinerary " << Name << "[] = {\n";
     
+    // For each itinerary class
     IntineraryList &IL = *PLI++;
     unsigned Index = 0;
     for (IntineraryList::iterator ILI = IL.begin(), E = IL.end(); ILI != E;) {
       InstrItinerary &Intinerary = *ILI++;
       
+      // Emit in the form of { first, last } // index
       if (Intinerary.First == 0) {
         OS << "  { 0, 0 }";
       } else {
@@ -288,6 +383,8 @@
       if (ILI != E) OS << ",";
       OS << " // " << Index++ << "\n";
     }
+    
+    // End processor itinerary table
     OS << "};\n";
   }
 }
@@ -299,8 +396,11 @@
   IntMap ItinClassesMap;
   ProcessorList ProcList;
   
+  // Enumerate all the itinerary classes
   unsigned N = CollectAllItinClasses(ItinClassesMap);
+  // Emit the stage data
   EmitStageData(OS, N, ItinClassesMap, ProcList);
+  // Emit the processor itinerary data
   EmitProcessData(OS, ProcList);
 }
 
@@ -348,8 +448,8 @@
   
   Enumeration(OS, "FuncUnit", true);
   OS<<"\n";
-  Enumeration(OS, "InstrItinClass", false);
-  OS<<"\n";
+//  Enumeration(OS, "InstrItinClass", false);
+//  OS<<"\n";
   Enumeration(OS, "SubtargetFeature", true);
   OS<<"\n";
   FeatureKeyValues(OS);





From lattner at cs.uiuc.edu  Fri Oct 28 11:27:47 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 28 Oct 2005 11:27:47 -0500
Subject: [llvm-commits] 
	CVS: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
Message-ID: <200510281627.LAA08169@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Transforms/Scalar:

InstructionCombining.cpp updated: 1.398 -> 1.399
---
Log message:

Fix a bit of backwards logic that broke exptree and smg2000


---
Diffs of the changes:  (+1 -1)

 InstructionCombining.cpp |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
diff -u llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.398 llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.399
--- llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.398	Thu Oct 27 12:13:11 2005
+++ llvm/lib/Transforms/Scalar/InstructionCombining.cpp	Fri Oct 28 11:27:35 2005
@@ -3862,7 +3862,7 @@
       Amt = ConstantUInt::get(Type::UIntTy, Scale);
       if (ConstantUInt *CI = dyn_cast<ConstantUInt>(NumElements))
         Amt = ConstantExpr::getMul(CI, cast<ConstantUInt>(Amt));
-      else if (cast<ConstantUInt>(Amt)->getValue() == 1) {
+      else if (Scale != 1) {
         Instruction *Tmp = BinaryOperator::createMul(Amt, NumElements, "tmp");
         Amt = InsertNewInstBefore(Tmp, AI);
       }





From lattner at cs.uiuc.edu  Fri Oct 28 11:35:30 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 28 Oct 2005 11:35:30 -0500
Subject: [llvm-commits] CVS: llvm/utils/NightlyTest.gnuplot NightlyTest.pl
	NightlyTestTemplate.html 
Message-ID: <200510281635.LAA08254@zion.cs.uiuc.edu>



Changes in directory llvm/utils:

NightlyTest.gnuplot updated: 1.13 -> 1.14
NightlyTest.pl updated: 1.97 -> 1.98
NightlyTestTemplate.html updated: 1.41 -> 1.42
---
Log message:

The nightly tester report doesn't report JIT code size anymore, remove it
from the olden graph.


---
Diffs of the changes:  (+4 -50)

 NightlyTest.gnuplot      |   38 --------------------------------------
 NightlyTest.pl           |    8 +++-----
 NightlyTestTemplate.html |    8 +-------
 3 files changed, 4 insertions(+), 50 deletions(-)


Index: llvm/utils/NightlyTest.gnuplot
diff -u llvm/utils/NightlyTest.gnuplot:1.13 llvm/utils/NightlyTest.gnuplot:1.14
--- llvm/utils/NightlyTest.gnuplot:1.13	Sun Oct  2 16:51:38 2005
+++ llvm/utils/NightlyTest.gnuplot	Fri Oct 28 11:35:18 2005
@@ -185,44 +185,6 @@
    with lines
 
 
-##------- Machine code size ----
-
-set size .75,.75
-set xtics rotate
-set xlabel 0,-1
-set output "running_Olden_machcode.png"
-set ylabel "Program machine code size (bytes)"
-plot "running_Olden_machcode.txt" u 1:2 t '' with lines, \
-     "running_Olden_machcode.txt" u 1:2 t "bh" with lines, \
-     "running_Olden_machcode.txt" u 1:3 t "em3d" with lines, \
-     "running_Olden_machcode.txt" u 1:4 t "mst" with lines, \
-     "running_Olden_machcode.txt" u 1:5 t "power" with lines, \
-     "running_Olden_machcode.txt" u 1:6 t "tsp" with lines, \
-     "running_Olden_machcode.txt" u 1:7 t "bisort" with lines, \
-     "running_Olden_machcode.txt" u 1:8 t "health" with lines, \
-     "running_Olden_machcode.txt" u 1:9 t "perimeter" with lines, \
-     "running_Olden_machcode.txt" u 1:10 t "treeadd" with lines, \
-     "running_Olden_machcode.txt" u 1:11 t "voronoi" \
-   with lines
-
-set size 1.5,1.5
-set xtics norotate
-set xlabel 0,0
-set output "running_Olden_machcode_large.png"
-plot "running_Olden_machcode.txt" u 1:2 t '' with lines, \
-     "running_Olden_machcode.txt" u 1:2 t "bh" with lines, \
-     "running_Olden_machcode.txt" u 1:3 t "em3d" with lines, \
-     "running_Olden_machcode.txt" u 1:4 t "mst" with lines, \
-     "running_Olden_machcode.txt" u 1:5 t "power" with lines, \
-     "running_Olden_machcode.txt" u 1:6 t "tsp" with lines, \
-     "running_Olden_machcode.txt" u 1:7 t "bisort" with lines, \
-     "running_Olden_machcode.txt" u 1:8 t "health" with lines, \
-     "running_Olden_machcode.txt" u 1:9 t "perimeter" with lines, \
-     "running_Olden_machcode.txt" u 1:10 t "treeadd" with lines, \
-     "running_Olden_machcode.txt" u 1:11 t "voronoi" \
-   with lines
-
-
 ##------- Bytecode size ----
 
 set size .75,.75


Index: llvm/utils/NightlyTest.pl
diff -u llvm/utils/NightlyTest.pl:1.97 llvm/utils/NightlyTest.pl:1.98
--- llvm/utils/NightlyTest.pl:1.97	Mon Jun  6 14:17:05 2005
+++ llvm/utils/NightlyTest.pl	Fri Oct 28 11:35:18 2005
@@ -410,7 +410,8 @@
 #
 if (!$NOCHECKOUT) {
   if ( $VERBOSE ) { print "CONFIGURE STAGE\n"; }
-  system "(time -p $NICE ./configure $CONFIGUREARGS --enable-spec --with-objroot=.) > $BuildLog 2>&1";
+  my $EXTRAFLAGS = "--enable-spec2000=/Volumes/ProjectsDisk/cvs/benchmarks/speccpu2000-llvm/benchspec/ --enable-povray=/Volumes/ProjectsDisk/cvs/benchmarks/povray31 --enable-namd=/Volumes/ProjectsDisk/cvs/benchmarks/namd";
+  system "(time -p $NICE ./configure $CONFIGUREARGS $EXTRAFLAGS) > $BuildLog 2>&1";
 
   if ( $VERBOSE ) { print "BUILD STAGE\n"; }
   # Build the entire tree, capturing the output into $BuildLog
@@ -720,7 +721,6 @@
     my $rJITTime = GetRegex 'TEST-RESULT-jit-time: program\s*([.0-9m]+)', $Rec;
     my $rOptTime = GetRegex "TEST-RESULT-compile: .*$WallTimeRE", $Rec;
     my $rBytecodeSize = GetRegex 'TEST-RESULT-compile: *([0-9]+)', $Rec;
-    my $rMachCodeSize = GetRegex 'TEST-RESULT-jit-machcode: *([0-9]+).*bytes of machine code', $Rec;
 
     $NATTime .= " " . FormatTime($rNATTime);
     $CBETime .= " " . FormatTime($rCBETime);
@@ -728,7 +728,6 @@
     $JITTime .= " " . FormatTime($rJITTime);
     $OptTime .= " $rOptTime";
     $BytecodeSize .= " $rBytecodeSize";
-    $MachCodeSize .= " $rMachCodeSize";
   }
 
   # Now that we have all of the numbers we want, add them to the running totals
@@ -739,7 +738,6 @@
   AddRecord($JITTime, "running_Olden_jit_time.txt");
   AddRecord($OptTime, "running_Olden_opt_time.txt");
   AddRecord($BytecodeSize, "running_Olden_bytecode.txt");
-  AddRecord($MachCodeSize, "running_Olden_machcode.txt");
 
   system "gzip -f $OldenTestsLog";
 }
@@ -765,7 +763,7 @@
 # Make sure we don't get errors running the nightly tester the first time
 # because of files that don't exist.
 Touch ('running_build_time.txt', 'running_Olden_llc_time.txt',
-       'running_loc.txt', 'running_Olden_machcode.txt',
+       'running_loc.txt', 
        'running_Olden_bytecode.txt', 'running_Olden_nat_time.txt',
        'running_Olden_cbe_time.txt', 'running_Olden_opt_time.txt',
        'running_Olden_jit_time.txt');


Index: llvm/utils/NightlyTestTemplate.html
diff -u llvm/utils/NightlyTestTemplate.html:1.41 llvm/utils/NightlyTestTemplate.html:1.42
--- llvm/utils/NightlyTestTemplate.html:1.41	Sun Feb 13 10:08:30 2005
+++ llvm/utils/NightlyTestTemplate.html	Fri Oct 28 11:35:18 2005
@@ -142,15 +142,9 @@
 Size of LLVM bytecode files
 </td>
 <td width=50% align=center>
-<a href="running_Olden_machcode_large.png"><img width=480 height=360 border=0 src="running_Olden_machcode.png"></a><br>
-Size of native machine code for each program (generated by the JIT)
-</td></tr>
-<tr>
-<td align=center>
 <a href="running_Olden_opt_time_large.png"><img width=480 height=360 border=0 src="running_Olden_opt_time.png"></a><br>
 Time to run the LLVM optimizer on each program
-</td>
-<td></td></tr>
+</td></tr>
 </table>
 
 <h2>Program Execution Measurements:</h2>





From duraid at octopus.com.au  Fri Oct 28 12:46:47 2005
From: duraid at octopus.com.au (Duraid Madina)
Date: Fri, 28 Oct 2005 12:46:47 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp
	IA64ISelLowering.cpp IA64ISelLowering.h IA64.h
	IA64AsmPrinter.cpp IA64ISelPattern.cpp IA64InstrFormats.td
	IA64InstrInfo.td IA64RegisterInfo.td IA64TargetMachine.cpp Makefile 
Message-ID: <200510281746.MAA08891@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/IA64:

IA64ISelDAGToDAG.cpp added (r1.1)
IA64ISelLowering.cpp added (r1.1)
IA64ISelLowering.h added (r1.1)
IA64.h updated: 1.2 -> 1.3
IA64AsmPrinter.cpp updated: 1.12 -> 1.13
IA64ISelPattern.cpp updated: 1.67 -> 1.68
IA64InstrFormats.td updated: 1.1 -> 1.2
IA64InstrInfo.td updated: 1.15 -> 1.16
IA64RegisterInfo.td updated: 1.8 -> 1.9
IA64TargetMachine.cpp updated: 1.5 -> 1.6
Makefile updated: 1.3 -> 1.4
---
Log message:

DAG->DAG instruction selection for ia64! "hello world" works, not much else.
use -enable-ia64-dag-isel to turn this on

TODO: delete lowering stuff from the pattern isel
    : get operations on predicate bits working
    : get other bits of pseudocode going
    : use sampo's mulh/mull-using divide-by-constant magic
    : *so* many patterns ("extr", "tbit" and "dep" will be fun :)
    : add FP
    : add a JIT! 
    : get it working 100%

in short: this'll be happier in a couple of weeks, but it's here now so
the tester can make me feel guilty sooner.

OTHER: there are a couple of fixes to the pattern isel, in particular
making the linker happy with big blobs of fun like pypy.




---
Diffs of the changes:  (+1226 -41)

 IA64.h                |    5 
 IA64AsmPrinter.cpp    |   22 ++
 IA64ISelDAGToDAG.cpp  |  497 ++++++++++++++++++++++++++++++++++++++++++++++++++
 IA64ISelLowering.cpp  |  369 +++++++++++++++++++++++++++++++++++++
 IA64ISelLowering.h    |   88 ++++++++
 IA64ISelPattern.cpp   |   11 -
 IA64InstrFormats.td   |    8 
 IA64InstrInfo.td      |  245 +++++++++++++++++++++---
 IA64RegisterInfo.td   |    8 
 IA64TargetMachine.cpp |   11 -
 Makefile              |    3 
 11 files changed, 1226 insertions(+), 41 deletions(-)


Index: llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp
diff -c /dev/null llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp:1.1
*** /dev/null	Fri Oct 28 12:46:46 2005
--- llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp	Fri Oct 28 12:46:36 2005
***************
*** 0 ****
--- 1,497 ----
+ //===---- IA64ISelDAGToDAG.cpp - IA64 pattern matching inst selector ------===//
+ //
+ //                     The LLVM Compiler Infrastructure
+ //
+ // This file was developed by Duraid Madina and is distributed under
+ // the University of Illinois Open Source License. See LICENSE.TXT for details.
+ //
+ //===----------------------------------------------------------------------===//
+ //
+ // This file defines a pattern matching instruction selector for IA64,
+ // converting a legalized dag to an IA64 dag.
+ //
+ //===----------------------------------------------------------------------===//
+ 
+ #include "IA64.h"
+ #include "IA64TargetMachine.h"
+ #include "IA64ISelLowering.h"
+ #include "llvm/CodeGen/MachineInstrBuilder.h"
+ #include "llvm/CodeGen/MachineFunction.h"
+ #include "llvm/CodeGen/SSARegMap.h"
+ #include "llvm/CodeGen/SelectionDAG.h"
+ #include "llvm/CodeGen/SelectionDAGISel.h"
+ #include "llvm/Target/TargetOptions.h"
+ #include "llvm/ADT/Statistic.h"
+ #include "llvm/Constants.h"
+ #include "llvm/GlobalValue.h"
+ #include "llvm/Support/Debug.h"
+ #include "llvm/Support/MathExtras.h"
+ using namespace llvm;
+ 
+ namespace {
+   Statistic<> FusedFP ("ia64-codegen", "Number of fused fp operations");
+   Statistic<> FrameOff("ia64-codegen", "Number of frame idx offsets collapsed");
+     
+   //===--------------------------------------------------------------------===//
+   /// IA64DAGToDAGISel - IA64 specific code to select IA64 machine
+   /// instructions for SelectionDAG operations.
+   ///
+   class IA64DAGToDAGISel : public SelectionDAGISel {
+     IA64TargetLowering IA64Lowering;
+     unsigned GlobalBaseReg;
+   public:
+     IA64DAGToDAGISel(TargetMachine &TM)
+       : SelectionDAGISel(IA64Lowering), IA64Lowering(TM) {}
+     
+     virtual bool runOnFunction(Function &Fn) {
+       // Make sure we re-emit a set of the global base reg if necessary
+       GlobalBaseReg = 0;
+       return SelectionDAGISel::runOnFunction(Fn);
+     }
+  
+     /// getI64Imm - Return a target constant with the specified value, of type
+     /// i64.
+     inline SDOperand getI64Imm(uint64_t Imm) {
+       return CurDAG->getTargetConstant(Imm, MVT::i64);
+     }
+ 
+     /// getGlobalBaseReg - insert code into the entry mbb to materialize the PIC
+     /// base register.  Return the virtual register that holds this value.
+     // SDOperand getGlobalBaseReg(); TODO: hmm
+     
+     // Select - Convert the specified operand from a target-independent to a
+     // target-specific node if it hasn't already been changed.
+     SDOperand Select(SDOperand Op);
+     
+     SDNode *SelectIntImmediateExpr(SDOperand LHS, SDOperand RHS,
+                                    unsigned OCHi, unsigned OCLo,
+                                    bool IsArithmetic = false,
+                                    bool Negate = false);
+     SDNode *SelectBitfieldInsert(SDNode *N);
+ 
+     /// SelectCC - Select a comparison of the specified values with the
+     /// specified condition code, returning the CR# of the expression.
+     SDOperand SelectCC(SDOperand LHS, SDOperand RHS, ISD::CondCode CC);
+ 
+     /// SelectAddr - Given the specified address, return the two operands for a
+     /// load/store instruction, and return true if it should be an indexed [r+r]
+     /// operation.
+     bool SelectAddr(SDOperand Addr, SDOperand &Op1, SDOperand &Op2);
+ 
+     SDOperand BuildSDIVSequence(SDNode *N);
+     SDOperand BuildUDIVSequence(SDNode *N);
+     
+     /// InstructionSelectBasicBlock - This callback is invoked by
+     /// SelectionDAGISel when it has created a SelectionDAG for us to codegen.
+     virtual void InstructionSelectBasicBlock(SelectionDAG &DAG);
+     
+     virtual const char *getPassName() const {
+       return "IA64 (Itanium) DAG->DAG Instruction Selector";
+     } 
+ 
+ // Include the pieces autogenerated from the target description.
+ #include "IA64GenDAGISel.inc"
+     
+ private:
+     SDOperand SelectCALL(SDOperand Op);
+   };
+ }
+ 
+ /// InstructionSelectBasicBlock - This callback is invoked by
+ /// SelectionDAGISel when it has created a SelectionDAG for us to codegen.
+ void IA64DAGToDAGISel::InstructionSelectBasicBlock(SelectionDAG &DAG) {
+   DEBUG(BB->dump());
+   
+   // The selection process is inherently a bottom-up recursive process (users
+   // select their uses before themselves).  Given infinite stack space, we
+   // could just start selecting on the root and traverse the whole graph.  In
+   // practice however, this causes us to run out of stack space on large basic
+   // blocks.  To avoid this problem, select the entry node, then all its uses,
+   // iteratively instead of recursively.
+   std::vector<SDOperand> Worklist;
+   Worklist.push_back(DAG.getEntryNode());
+   
+   // Note that we can do this in the IA64 target (scanning forward across token
+   // chain edges) because no nodes ever get folded across these edges.  On a
+   // target like X86 which supports load/modify/store operations, this would
+   // have to be more careful.
+   while (!Worklist.empty()) {
+     SDOperand Node = Worklist.back();
+     Worklist.pop_back();
+     
+     // Chose from the least deep of the top two nodes.
+     if (!Worklist.empty() &&
+         Worklist.back().Val->getNodeDepth() < Node.Val->getNodeDepth())
+       std::swap(Worklist.back(), Node);
+     
+     if ((Node.Val->getOpcode() >= ISD::BUILTIN_OP_END &&
+          Node.Val->getOpcode() < IA64ISD::FIRST_NUMBER) ||
+         CodeGenMap.count(Node)) continue;
+     
+     for (SDNode::use_iterator UI = Node.Val->use_begin(),
+          E = Node.Val->use_end(); UI != E; ++UI) {
+       // Scan the values.  If this use has a value that is a token chain, add it
+       // to the worklist.
+       SDNode *User = *UI;
+       for (unsigned i = 0, e = User->getNumValues(); i != e; ++i)
+         if (User->getValueType(i) == MVT::Other) {
+           Worklist.push_back(SDOperand(User, i));
+           break; 
+         }
+     }
+ 
+     // Finally, legalize this node.
+     Select(Node);
+   }
+     
+   // Select target instructions for the DAG.
+   DAG.setRoot(Select(DAG.getRoot()));
+   CodeGenMap.clear();
+   DAG.RemoveDeadNodes();
+   
+   // Emit machine code to BB. 
+   ScheduleAndEmitDAG(DAG);
+ }
+ 
+ 
+ SDOperand IA64DAGToDAGISel::SelectCALL(SDOperand Op) {
+   SDNode *N = Op.Val;
+   SDOperand Chain = Select(N->getOperand(0));
+   
+   unsigned CallOpcode;
+   std::vector<SDOperand> CallOperands;
+ 
+   // save the current GP, SP and RP : FIXME: do we need to do all 3 always?
+   SDOperand GPBeforeCall = CurDAG->getCopyFromReg(Chain, IA64::r1, MVT::i64);
+   Chain = GPBeforeCall.getValue(1);
+   SDOperand SPBeforeCall = CurDAG->getCopyFromReg(Chain, IA64::r12, MVT::i64);
+   Chain = SPBeforeCall.getValue(1);
+   SDOperand RPBeforeCall = CurDAG->getCopyFromReg(Chain, IA64::rp, MVT::i64);
+   Chain = RPBeforeCall.getValue(1);
+ 
+   // if we can call directly, do so
+   if (GlobalAddressSDNode *GASD =
+       dyn_cast<GlobalAddressSDNode>(N->getOperand(1))) {
+     CallOpcode = IA64::BRCALL_IPREL;
+     CallOperands.push_back(CurDAG->getTargetGlobalAddress(GASD->getGlobal(),
+                                                           MVT::i64));
+   } else if (ExternalSymbolSDNode *ESSDN = // FIXME: we currently NEED this
+ 		                         // case for correctness, to avoid
+ 					 // "non-pic code with imm reloc.n
+ 					 // against dynamic symbol" errors
+              dyn_cast<ExternalSymbolSDNode>(N->getOperand(1))) {
+     CallOpcode = IA64::BRCALL_IPREL;
+     CallOperands.push_back(N->getOperand(1));
+   } else {
+     // otherwise we need to load the function descriptor,
+     // load the branch target (function)'s entry point and GP,
+     //  branch (call) then restore the
+     // GP
+     
+     SDOperand FnDescriptor = Select(N->getOperand(1));
+    
+     // load the branch target's entry point [mem] and 
+     // GP value [mem+8]
+     SDOperand targetEntryPoint=CurDAG->getLoad(MVT::i64, Chain, FnDescriptor,
+ 	                                CurDAG->getSrcValue(0));
+     SDOperand targetGPAddr=CurDAG->getNode(ISD::ADD, MVT::i64, FnDescriptor, 
+ 	                    CurDAG->getConstant(8, MVT::i64));
+     SDOperand targetGP=CurDAG->getLoad(MVT::i64, Chain, targetGPAddr,
+ 	                                CurDAG->getSrcValue(0));
+     
+     // Copy the callee address into the b6 branch register
+     SDOperand B6 = CurDAG->getRegister(IA64::B6, MVT::i64);
+     Chain = CurDAG->getNode(ISD::CopyToReg, MVT::Other, Chain, B6,
+ 	             targetEntryPoint);
+     
+     CallOperands.push_back(B6);
+     CallOpcode = IA64::BRCALL_INDIRECT;
+   }
+  
+   // TODO: support in-memory arguments
+   unsigned used_FPArgs=0; // how many FP args have been used so far?
+ 
+   unsigned intArgs[] = {IA64::out0, IA64::out1, IA64::out2, IA64::out3,
+                         IA64::out4, IA64::out5, IA64::out6, IA64::out7 };
+   unsigned FPArgs[] = {IA64::F8, IA64::F9, IA64::F10, IA64::F11,
+                        IA64::F12, IA64::F13, IA64::F14, IA64::F15 };
+ 
+   SDOperand InFlag;  // Null incoming flag value.
+   
+   for (unsigned i = 2, e = N->getNumOperands(); i != e; ++i) {
+     unsigned DestReg = 0;
+     MVT::ValueType RegTy = N->getOperand(i).getValueType();
+     if (RegTy == MVT::i64) {
+       assert((i-2) < 8 && "Too many int args");
+       DestReg = intArgs[i-2];
+     } else {
+       assert(MVT::isFloatingPoint(N->getOperand(i).getValueType()) &&
+              "Unpromoted integer arg?");
+       assert(used_FPArgs < 8 && "Too many fp args");
+       DestReg = FPArgs[used_FPArgs++];
+     }
+     
+     if (N->getOperand(i).getOpcode() != ISD::UNDEF) {
+       SDOperand Val = Select(N->getOperand(i));
+       Chain = CurDAG->getCopyToReg(Chain, DestReg, Val, InFlag);
+       InFlag = Chain.getValue(1);
+       CallOperands.push_back(CurDAG->getRegister(DestReg, RegTy));
+     }
+   }
+   
+   // Finally, once everything is in registers to pass to the call, emit the
+   // call itself.
+   if (InFlag.Val)
+     CallOperands.push_back(InFlag);   // Strong dep on register copies.
+   else
+     CallOperands.push_back(Chain);    // Weak dep on whatever occurs before
+   Chain = CurDAG->getTargetNode(CallOpcode, MVT::Other, MVT::Flag,
+                                 CallOperands);
+  
+ //  return Chain; // HACK: err, this means that functions never return anything. need to intergrate this with the code immediately below FIXME XXX
+ 
+   std::vector<SDOperand> CallResults;
+   
+   // If the call has results, copy the values out of the ret val registers.
+   switch (N->getValueType(0)) {
+     default: assert(0 && "Unexpected ret value!");
+     case MVT::Other: break;
+     case MVT::i64:
+         Chain = CurDAG->getCopyFromReg(Chain, IA64::r8, MVT::i64,
+                                        Chain.getValue(1)).getValue(1);
+         CallResults.push_back(Chain.getValue(0));
+       break;
+     case MVT::f64:
+       Chain = CurDAG->getCopyFromReg(Chain, IA64::F8, N->getValueType(0),
+                                      Chain.getValue(1)).getValue(1);
+       CallResults.push_back(Chain.getValue(0));
+       break;
+   }
+    // restore GP, SP and RP
+   Chain = CurDAG->getCopyToReg(Chain, IA64::r1, GPBeforeCall);
+   Chain = CurDAG->getCopyToReg(Chain, IA64::r12, SPBeforeCall);
+   Chain = CurDAG->getCopyToReg(Chain, IA64::rp, RPBeforeCall);
+  
+   CallResults.push_back(Chain);
+ 
+   for (unsigned i = 0, e = CallResults.size(); i != e; ++i)
+     CodeGenMap[Op.getValue(i)] = CallResults[i];
+  
+   return CallResults[Op.ResNo];
+ }
+ 
+ // Select - Convert the specified operand from a target-independent to a
+ // target-specific node if it hasn't already been changed.
+ SDOperand IA64DAGToDAGISel::Select(SDOperand Op) {
+   SDNode *N = Op.Val;
+   if (N->getOpcode() >= ISD::BUILTIN_OP_END &&
+       N->getOpcode() < IA64ISD::FIRST_NUMBER)
+     return Op;   // Already selected.
+ 
+   // If this has already been converted, use it.
+   std::map<SDOperand, SDOperand>::iterator CGMI = CodeGenMap.find(Op);
+   if (CGMI != CodeGenMap.end()) return CGMI->second;
+   
+   switch (N->getOpcode()) {
+   default: break;
+ 
+   case ISD::CALL:
+   case ISD::TAILCALL: return SelectCALL(Op);
+  
+ /* todo:
+  * case ISD::DYNAMIC_STACKALLOC:
+ */
+ 
+   case ISD::FrameIndex: { // TODO: reduce creepyness
+     int FI = cast<FrameIndexSDNode>(N)->getIndex();
+     if (N->hasOneUse()) {
+       CurDAG->SelectNodeTo(N, IA64::MOV, MVT::i64,
+                            CurDAG->getTargetFrameIndex(FI, MVT::i64));
+       return SDOperand(N, 0);
+     }
+     return CurDAG->getTargetNode(IA64::MOV, MVT::i64,
+                                 CurDAG->getTargetFrameIndex(FI, MVT::i64));
+   }
+ 
+   case ISD::TokenFactor: {
+     SDOperand New;
+     if (N->getNumOperands() == 2) {
+       SDOperand Op0 = Select(N->getOperand(0));
+       SDOperand Op1 = Select(N->getOperand(1));
+       New = CurDAG->getNode(ISD::TokenFactor, MVT::Other, Op0, Op1);
+     } else {
+       std::vector<SDOperand> Ops;
+       for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
+         Ops.push_back(Select(N->getOperand(i)));
+       New = CurDAG->getNode(ISD::TokenFactor, MVT::Other, Ops);
+     }
+     
+     CodeGenMap[Op] = New;
+     return New;
+   }
+   case ISD::CopyFromReg: {
+     SDOperand Chain = Select(N->getOperand(0));
+     if (Chain == N->getOperand(0)) return Op; // No change
+     SDOperand New = CurDAG->getCopyFromReg(Chain,
+          cast<RegisterSDNode>(N->getOperand(1))->getReg(), N->getValueType(0));
+     return New.getValue(Op.ResNo);
+   }
+   case ISD::CopyToReg: {
+     SDOperand Chain = Select(N->getOperand(0));
+     SDOperand Reg = N->getOperand(1);
+     SDOperand Val = Select(N->getOperand(2));
+     SDOperand New = CurDAG->getNode(ISD::CopyToReg, MVT::Other,
+                                     Chain, Reg, Val);
+     CodeGenMap[Op] = New;
+     return New;
+   }
+ 
+   case ISD::GlobalAddress: {
+     GlobalValue *GV = cast<GlobalAddressSDNode>(N)->getGlobal();
+     SDOperand GA = CurDAG->getTargetGlobalAddress(GV, MVT::i64);
+     SDOperand Tmp = CurDAG->getTargetNode(IA64::ADDL_GA, MVT::i64, 
+ 	                          CurDAG->getRegister(IA64::r1, MVT::i64), GA);
+     return CurDAG->getTargetNode(IA64::LD8, MVT::i64, Tmp);
+   }
+ 			   
+   case ISD::LOAD:
+   case ISD::EXTLOAD:
+   case ISD::ZEXTLOAD: {
+     SDOperand Chain = Select(N->getOperand(0));
+     SDOperand Address = Select(N->getOperand(1));
+ 
+     MVT::ValueType TypeBeingLoaded = (N->getOpcode() == ISD::LOAD) ?
+       N->getValueType(0) : cast<VTSDNode>(N->getOperand(3))->getVT();
+     unsigned Opc;
+     switch (TypeBeingLoaded) {
+     default: N->dump(); assert(0 && "Cannot load this type!");
+     // FIXME: bools? case MVT::i1:
+     case MVT::i8:  Opc = IA64::LD1; break;
+     case MVT::i16: Opc = IA64::LD2; break;
+     case MVT::i32: Opc = IA64::LD4; break;
+     case MVT::i64: Opc = IA64::LD8; break;
+     
+     case MVT::f32: Opc = IA64::LDF4; break;
+     case MVT::f64: Opc = IA64::LDF8; break;
+     }
+ 
+     CurDAG->SelectNodeTo(N, Opc, N->getValueType(0), MVT::Other,
+                              Address, Chain); // TODO: comment this
+     
+     return SDOperand(N, Op.ResNo);
+   }
+   
+   case ISD::TRUNCSTORE:
+   case ISD::STORE: {
+     SDOperand Address = Select(N->getOperand(2));
+ 
+     unsigned Opc;
+     if (N->getOpcode() == ISD::STORE) {
+       switch (N->getOperand(1).getValueType()) {
+       default: assert(0 && "unknown Type in store");
+       case MVT::i64: Opc = IA64::ST8;  break;
+       case MVT::f64: Opc = IA64::STF8; break;
+      }
+     } else { //ISD::TRUNCSTORE
+       switch(cast<VTSDNode>(N->getOperand(4))->getVT()) {
+       default: assert(0 && "unknown Type in store");
+       case MVT::i8:  Opc = IA64::ST1;  break;
+       case MVT::i16: Opc = IA64::ST2;  break;
+       case MVT::i32: Opc = IA64::ST4;  break;
+       case MVT::f32: Opc = IA64::STF4; break;
+       }
+     }
+     
+     CurDAG->SelectNodeTo(N, Opc, MVT::Other, Select(N->getOperand(2)),
+                          Select(N->getOperand(1)), Select(N->getOperand(0)));
+     return SDOperand(N, 0);
+   }
+ 
+   case ISD::BRCOND: {
+     SDOperand Chain = Select(N->getOperand(0));
+     SDOperand CC = Select(N->getOperand(1));
+     MachineBasicBlock *Dest =
+       cast<BasicBlockSDNode>(N->getOperand(2))->getBasicBlock();
+     //FIXME - we do NOT need long branches all the time
+     CurDAG->SelectNodeTo(N, IA64::BRLCOND_NOTCALL, MVT::Other, CC, CurDAG->getBasicBlock(Dest), Chain);
+     return SDOperand(N, 0);
+   }
+ 
+   case ISD::CALLSEQ_START:
+   case ISD::CALLSEQ_END: {
+     int64_t Amt = cast<ConstantSDNode>(N->getOperand(1))->getValue();
+     unsigned Opc = N->getOpcode() == ISD::CALLSEQ_START ?
+                        IA64::ADJUSTCALLSTACKDOWN : IA64::ADJUSTCALLSTACKUP;
+     CurDAG->SelectNodeTo(N, Opc, MVT::Other,
+                          getI64Imm(Amt), Select(N->getOperand(0)));
+     return SDOperand(N, 0);
+   }
+ 
+   case ISD::RET: {
+     SDOperand Chain = Select(N->getOperand(0));     // Token chain.
+ 
+     switch (N->getNumOperands()) {
+     default:
+       assert(0 && "Unknown return instruction!");
+     case 2: {
+       SDOperand RetVal = Select(N->getOperand(1));
+       switch (RetVal.getValueType()) {
+       default: assert(0 && "I don't know how to return this type! (promote?)");
+                // FIXME: do I need to add support for bools here?
+                // (return '0' or '1' in r8, basically...)
+                //
+                // FIXME: need to round floats - 80 bits is bad, the tester
+                // told me so
+       case MVT::i64:
+         // we mark r8 as live on exit up above in LowerArguments()
+         // BuildMI(BB, IA64::MOV, 1, IA64::r8).addReg(Tmp1);
+         Chain = CurDAG->getCopyToReg(Chain, IA64::r8, RetVal);
+ 	break;
+       case MVT::f64:
+         // we mark F8 as live on exit up above in LowerArguments()
+         // BuildMI(BB, IA64::FMOV, 1, IA64::F8).addReg(Tmp1);
+         Chain = CurDAG->getCopyToReg(Chain, IA64::F8, RetVal);
+         break;
+       }
+       break;
+       }
+     case 1:
+       break;
+     }
+ 
+     // we need to copy VirtGPR (the vreg (to become a real reg)) that holds
+     // the output of this function's alloc instruction back into ar.pfs
+     // before we return. this copy must not float up above the last 
+     // outgoing call in this function!!!
+     SDOperand AR_PFSVal = CurDAG->getCopyFromReg(Chain, IA64Lowering.VirtGPR,
+ 		                                  MVT::i64);
+     Chain = AR_PFSVal.getValue(1);
+     Chain = CurDAG->getCopyToReg(Chain, IA64::AR_PFS, AR_PFSVal);
+ 
+     CurDAG->SelectNodeTo(N, IA64::RET, MVT::Other, Chain); // and then just emit a 'ret' instruction
+     
+     // before returning, restore the ar.pfs register (set by the 'alloc' up top)
+     // BuildMI(BB, IA64::MOV, 1).addReg(IA64::AR_PFS).addReg(IA64Lowering.VirtGPR);
+     //
+     return SDOperand(N, 0);
+   }
+   
+   case ISD::BR:
+ 		 // FIXME: we don't need long branches all the time!
+     CurDAG->SelectNodeTo(N, IA64::BRL_NOTCALL, MVT::Other, N->getOperand(1),
+                          Select(N->getOperand(0)));
+     return SDOperand(N, 0);
+   
+   }
+   
+   return SelectCode(Op);
+ }
+ 
+ 
+ /// createIA64DAGToDAGInstructionSelector - This pass converts a legalized DAG
+ /// into an IA64-specific DAG, ready for instruction scheduling.
+ ///
+ FunctionPass *llvm::createIA64DAGToDAGInstructionSelector(TargetMachine &TM) {
+   return new IA64DAGToDAGISel(TM);
+ }
+ 


Index: llvm/lib/Target/IA64/IA64ISelLowering.cpp
diff -c /dev/null llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.1
*** /dev/null	Fri Oct 28 12:46:47 2005
--- llvm/lib/Target/IA64/IA64ISelLowering.cpp	Fri Oct 28 12:46:36 2005
***************
*** 0 ****
--- 1,369 ----
+ //===-- IA64ISelLowering.cpp - IA64 DAG Lowering Implementation -----------===//
+ //
+ //                     The LLVM Compiler Infrastructure
+ //
+ // This file was developed by Duraid Madina and is distributed under
+ // the University of Illinois Open Source License. See LICENSE.TXT for details.
+ //
+ //===----------------------------------------------------------------------===//
+ //
+ // This file implements the IA64ISelLowering class.
+ //
+ //===----------------------------------------------------------------------===//
+ 
+ #include "IA64ISelLowering.h"
+ #include "IA64MachineFunctionInfo.h"
+ #include "IA64TargetMachine.h"
+ #include "llvm/CodeGen/MachineFrameInfo.h"
+ #include "llvm/CodeGen/MachineFunction.h"
+ #include "llvm/CodeGen/MachineInstrBuilder.h"
+ #include "llvm/CodeGen/SelectionDAG.h"
+ #include "llvm/CodeGen/SSARegMap.h"
+ #include "llvm/Constants.h"
+ #include "llvm/Function.h"
+ using namespace llvm;
+ 
+ IA64TargetLowering::IA64TargetLowering(TargetMachine &TM)
+   : TargetLowering(TM) {
+  
+       // register class for general registers
+       addRegisterClass(MVT::i64, IA64::GRRegisterClass);
+ 
+       // register class for FP registers
+       addRegisterClass(MVT::f64, IA64::FPRegisterClass);
+ 
+       // register class for predicate registers
+       addRegisterClass(MVT::i1, IA64::PRRegisterClass);
+ 
+       setOperationAction(ISD::BRCONDTWOWAY     , MVT::Other, Expand);
+       setOperationAction(ISD::BRTWOWAY_CC      , MVT::Other, Expand);
+       setOperationAction(ISD::FP_ROUND_INREG   , MVT::f32  , Expand);
+ 
+       setSetCCResultType(MVT::i1);
+       setShiftAmountType(MVT::i64);
+ 
+       setOperationAction(ISD::EXTLOAD          , MVT::i1   , Promote);
+ 
+       setOperationAction(ISD::ZEXTLOAD         , MVT::i1   , Expand);
+ 
+       setOperationAction(ISD::SEXTLOAD         , MVT::i1   , Expand);
+       setOperationAction(ISD::SEXTLOAD         , MVT::i8   , Expand);
+       setOperationAction(ISD::SEXTLOAD         , MVT::i16  , Expand);
+       setOperationAction(ISD::SEXTLOAD         , MVT::i32  , Expand);
+ 
+       setOperationAction(ISD::FREM             , MVT::f32  , Expand);
+       setOperationAction(ISD::FREM             , MVT::f64  , Expand);
+ 
+       setOperationAction(ISD::UREM             , MVT::f32  , Expand);
+       setOperationAction(ISD::UREM             , MVT::f64  , Expand);
+ 
+       setOperationAction(ISD::MEMMOVE          , MVT::Other, Expand);
+       setOperationAction(ISD::MEMSET           , MVT::Other, Expand);
+       setOperationAction(ISD::MEMCPY           , MVT::Other, Expand);
+       
+       setOperationAction(ISD::SINT_TO_FP       , MVT::i1   , Promote);
+       setOperationAction(ISD::UINT_TO_FP       , MVT::i1   , Promote);
+ 
+       // We don't support sin/cos/sqrt
+       setOperationAction(ISD::FSIN , MVT::f64, Expand);
+       setOperationAction(ISD::FCOS , MVT::f64, Expand);
+       setOperationAction(ISD::FSQRT, MVT::f64, Expand);
+       setOperationAction(ISD::FSIN , MVT::f32, Expand);
+       setOperationAction(ISD::FCOS , MVT::f32, Expand);
+       setOperationAction(ISD::FSQRT, MVT::f32, Expand);
+ 
+       //IA64 has these, but they are not implemented
+       setOperationAction(ISD::CTTZ , MVT::i64  , Expand);
+       setOperationAction(ISD::CTLZ , MVT::i64  , Expand);
+ 
+       computeRegisterProperties();
+ 
+       addLegalFPImmediate(+0.0);
+       addLegalFPImmediate(+1.0);
+       addLegalFPImmediate(-0.0);
+       addLegalFPImmediate(-1.0);
+     
+ }
+ 
+ /// isFloatingPointZero - Return true if this is 0.0 or -0.0.
+ static bool isFloatingPointZero(SDOperand Op) {
+   if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(Op))
+     return CFP->isExactlyValue(-0.0) || CFP->isExactlyValue(0.0);
+   else if (Op.getOpcode() == ISD::EXTLOAD || Op.getOpcode() == ISD::LOAD) {
+     // Maybe this has already been legalized into the constant pool?
+     if (ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(Op.getOperand(1)))
+       if (ConstantFP *CFP = dyn_cast<ConstantFP>(CP->get()))
+         return CFP->isExactlyValue(-0.0) || CFP->isExactlyValue(0.0);
+   }
+   return false;
+ }
+ 
+ std::vector<SDOperand>
+ IA64TargetLowering::LowerArguments(Function &F, SelectionDAG &DAG) {
+   std::vector<SDOperand> ArgValues;
+   //
+   // add beautiful description of IA64 stack frame format
+   // here (from intel 24535803.pdf most likely)
+   //
+   MachineFunction &MF = DAG.getMachineFunction();
+   MachineFrameInfo *MFI = MF.getFrameInfo();
+   
+   GP = MF.getSSARegMap()->createVirtualRegister(getRegClassFor(MVT::i64));
+   SP = MF.getSSARegMap()->createVirtualRegister(getRegClassFor(MVT::i64));
+   RP = MF.getSSARegMap()->createVirtualRegister(getRegClassFor(MVT::i64));
+   
+   MachineBasicBlock& BB = MF.front();
+ 
+   unsigned args_int[] = {IA64::r32, IA64::r33, IA64::r34, IA64::r35,
+                          IA64::r36, IA64::r37, IA64::r38, IA64::r39};
+ 
+   unsigned args_FP[] = {IA64::F8, IA64::F9, IA64::F10, IA64::F11,
+                         IA64::F12,IA64::F13,IA64::F14, IA64::F15};
+ 
+   unsigned argVreg[8];
+   unsigned argPreg[8];
+   unsigned argOpc[8];
+ 
+   unsigned used_FPArgs = 0; // how many FP args have been used so far?
+ 
+   unsigned ArgOffset = 0;
+   int count = 0;
+ 
+   for (Function::arg_iterator I = F.arg_begin(), E = F.arg_end(); I != E; ++I)
+     {
+       SDOperand newroot, argt;
+       if(count < 8) { // need to fix this logic? maybe.
+ 
+         switch (getValueType(I->getType())) {
+           default:
+             assert(0 && "ERROR in LowerArgs: can't lower this type of arg.\n"); 
+           case MVT::f32:
+             // fixme? (well, will need to for weird FP structy stuff,
+             // see intel ABI docs)
+           case MVT::f64:
+ //XXX            BuildMI(&BB, IA64::IDEF, 0, args_FP[used_FPArgs]);
+             MF.addLiveIn(args_FP[used_FPArgs]); // mark this reg as liveIn
+             // floating point args go into f8..f15 as-needed, the increment
+             argVreg[count] =                              // is below..:
+             MF.getSSARegMap()->createVirtualRegister(getRegClassFor(MVT::f64));
+             // FP args go into f8..f15 as needed: (hence the ++)
+             argPreg[count] = args_FP[used_FPArgs++];
+             argOpc[count] = IA64::FMOV;
+             argt = newroot = DAG.getCopyFromReg(DAG.getRoot(), argVreg[count],
+                                                 MVT::f64);
+             if (I->getType() == Type::FloatTy)
+               argt = DAG.getNode(ISD::FP_ROUND, MVT::f32, argt);
+             break;
+           case MVT::i1: // NOTE: as far as C abi stuff goes,
+                         // bools are just boring old ints
+           case MVT::i8:
+           case MVT::i16:
+           case MVT::i32:
+           case MVT::i64:
+ //XXX            BuildMI(&BB, IA64::IDEF, 0, args_int[count]);
+             MF.addLiveIn(args_int[count]); // mark this register as liveIn
+             argVreg[count] =
+             MF.getSSARegMap()->createVirtualRegister(getRegClassFor(MVT::i64));
+             argPreg[count] = args_int[count];
+             argOpc[count] = IA64::MOV;
+             argt = newroot =
+               DAG.getCopyFromReg(DAG.getRoot(), argVreg[count], MVT::i64);
+             if ( getValueType(I->getType()) != MVT::i64)
+               argt = DAG.getNode(ISD::TRUNCATE, getValueType(I->getType()),
+                   newroot);
+             break;
+         }
+       } else { // more than 8 args go into the frame
+         // Create the frame index object for this incoming parameter...
+         ArgOffset = 16 + 8 * (count - 8);
+         int FI = MFI->CreateFixedObject(8, ArgOffset);
+ 
+         // Create the SelectionDAG nodes corresponding to a load
+         //from this parameter
+         SDOperand FIN = DAG.getFrameIndex(FI, MVT::i64);
+         argt = newroot = DAG.getLoad(getValueType(I->getType()),
+                                      DAG.getEntryNode(), FIN, DAG.getSrcValue(NULL));
+       }
+       ++count;
+       DAG.setRoot(newroot.getValue(1));
+       ArgValues.push_back(argt);
+     }
+ 
+ 
+   // Create a vreg to hold the output of (what will become)
+   // the "alloc" instruction
+   VirtGPR = MF.getSSARegMap()->createVirtualRegister(getRegClassFor(MVT::i64));
+   BuildMI(&BB, IA64::PSEUDO_ALLOC, 0, VirtGPR);
+   // we create a PSEUDO_ALLOC (pseudo)instruction for now
+ 
+   BuildMI(&BB, IA64::IDEF, 0, IA64::r1);
+ 
+   // hmm:
+   BuildMI(&BB, IA64::IDEF, 0, IA64::r12);
+   BuildMI(&BB, IA64::IDEF, 0, IA64::rp);
+   // ..hmm.
+ 
+   BuildMI(&BB, IA64::MOV, 1, GP).addReg(IA64::r1);
+ 
+   // hmm:
+   BuildMI(&BB, IA64::MOV, 1, SP).addReg(IA64::r12);
+   BuildMI(&BB, IA64::MOV, 1, RP).addReg(IA64::rp);
+   // ..hmm.
+ 
+   unsigned tempOffset=0;
+ 
+   // if this is a varargs function, we simply lower llvm.va_start by
+   // pointing to the first entry
+   if(F.isVarArg()) {
+     tempOffset=0;
+     VarArgsFrameIndex = MFI->CreateFixedObject(8, tempOffset);
+   }
+ 
+   // here we actually do the moving of args, and store them to the stack
+   // too if this is a varargs function:
+   for (int i = 0; i < count && i < 8; ++i) {
+     BuildMI(&BB, argOpc[i], 1, argVreg[i]).addReg(argPreg[i]);
+     if(F.isVarArg()) {
+       // if this is a varargs function, we copy the input registers to the stack
+       int FI = MFI->CreateFixedObject(8, tempOffset);
+       tempOffset+=8;   //XXX: is it safe to use r22 like this?
+       BuildMI(&BB, IA64::MOV, 1, IA64::r22).addFrameIndex(FI);
+       // FIXME: we should use st8.spill here, one day
+       BuildMI(&BB, IA64::ST8, 1, IA64::r22).addReg(argPreg[i]);
+     }
+   }
+ 
+   // Finally, inform the code generator which regs we return values in.
+   // (see the ISD::RET: case in the instruction selector)
+   switch (getValueType(F.getReturnType())) {
+   default: assert(0 && "i have no idea where to return this type!");
+   case MVT::isVoid: break;
+   case MVT::i1:
+   case MVT::i8:
+   case MVT::i16:
+   case MVT::i32:
+   case MVT::i64:
+     MF.addLiveOut(IA64::r8);
+     break;
+   case MVT::f32:
+   case MVT::f64:
+     MF.addLiveOut(IA64::F8);
+     break;
+   }
+ 
+   return ArgValues;
+ }
+ 
+ std::pair<SDOperand, SDOperand>
+ IA64TargetLowering::LowerCallTo(SDOperand Chain,
+                                 const Type *RetTy, bool isVarArg,
+                                 unsigned CallingConv, bool isTailCall,
+                                 SDOperand Callee, ArgListTy &Args,
+                                 SelectionDAG &DAG) {
+ 
+   MachineFunction &MF = DAG.getMachineFunction();
+ 
+   unsigned NumBytes = 16;
+   unsigned outRegsUsed = 0;
+ 
+   if (Args.size() > 8) {
+     NumBytes += (Args.size() - 8) * 8;
+     outRegsUsed = 8;
+   } else {
+     outRegsUsed = Args.size();
+   }
+ 
+   // FIXME? this WILL fail if we ever try to pass around an arg that
+   // consumes more than a single output slot (a 'real' double, int128
+   // some sort of aggregate etc.), as we'll underestimate how many 'outX'
+   // registers we use. Hopefully, the assembler will notice.
+   MF.getInfo<IA64FunctionInfo>()->outRegsUsed=
+     std::max(outRegsUsed, MF.getInfo<IA64FunctionInfo>()->outRegsUsed);
+ 
+   Chain = DAG.getNode(ISD::CALLSEQ_START, MVT::Other, Chain,
+                         DAG.getConstant(NumBytes, getPointerTy()));
+ 
+   std::vector<SDOperand> args_to_use;
+   for (unsigned i = 0, e = Args.size(); i != e; ++i)
+     {
+       switch (getValueType(Args[i].second)) {
+       default: assert(0 && "unexpected argument type!");
+       case MVT::i1:
+       case MVT::i8:
+       case MVT::i16:
+       case MVT::i32:
+         //promote to 64-bits, sign/zero extending based on type
+         //of the argument
+         if(Args[i].second->isSigned())
+           Args[i].first = DAG.getNode(ISD::SIGN_EXTEND, MVT::i64,
+               Args[i].first);
+         else
+           Args[i].first = DAG.getNode(ISD::ZERO_EXTEND, MVT::i64,
+               Args[i].first);
+         break;
+       case MVT::f32:
+         //promote to 64-bits
+         Args[i].first = DAG.getNode(ISD::FP_EXTEND, MVT::f64, Args[i].first);
+       case MVT::f64:
+       case MVT::i64:
+         break;
+       }
+       args_to_use.push_back(Args[i].first);
+     }
+ 
+   std::vector<MVT::ValueType> RetVals;
+   MVT::ValueType RetTyVT = getValueType(RetTy);
+   if (RetTyVT != MVT::isVoid)
+     RetVals.push_back(RetTyVT);
+   RetVals.push_back(MVT::Other);
+ 
+   SDOperand TheCall = SDOperand(DAG.getCall(RetVals, Chain,
+                                             Callee, args_to_use), 0);
+   Chain = TheCall.getValue(RetTyVT != MVT::isVoid);
+   Chain = DAG.getNode(ISD::CALLSEQ_END, MVT::Other, Chain,
+                       DAG.getConstant(NumBytes, getPointerTy()));
+   return std::make_pair(TheCall, Chain);
+ }
+ 
+ SDOperand
+ IA64TargetLowering::LowerVAStart(SDOperand Chain, SDOperand VAListP,
+                                  Value *VAListV, SelectionDAG &DAG) {
+   // vastart just stores the address of the VarArgsFrameIndex slot.
+   SDOperand FR = DAG.getFrameIndex(VarArgsFrameIndex, MVT::i64);
+   return DAG.getNode(ISD::STORE, MVT::Other, Chain, FR,
+                      VAListP, DAG.getSrcValue(VAListV));
+ }
+ 
+ std::pair<SDOperand,SDOperand> IA64TargetLowering::
+ LowerVAArg(SDOperand Chain, SDOperand VAListP, Value *VAListV,
+            const Type *ArgTy, SelectionDAG &DAG) {
+ 
+   MVT::ValueType ArgVT = getValueType(ArgTy);
+   SDOperand Val = DAG.getLoad(MVT::i64, Chain,
+                               VAListP, DAG.getSrcValue(VAListV));
+   SDOperand Result = DAG.getLoad(ArgVT, DAG.getEntryNode(), Val,
+                                  DAG.getSrcValue(NULL));
+   unsigned Amt;
+   if (ArgVT == MVT::i32 || ArgVT == MVT::f32)
+     Amt = 8;
+   else {
+     assert((ArgVT == MVT::i64 || ArgVT == MVT::f64) &&
+            "Other types should have been promoted for varargs!");
+     Amt = 8;
+   }
+   Val = DAG.getNode(ISD::ADD, Val.getValueType(), Val,
+                     DAG.getConstant(Amt, Val.getValueType()));
+   Chain = DAG.getNode(ISD::STORE, MVT::Other, Chain,
+                       Val, VAListP, DAG.getSrcValue(VAListV));
+   return std::make_pair(Result, Chain);
+ }
+ 
+ 
+ 
+ std::pair<SDOperand, SDOperand> IA64TargetLowering::
+ LowerFrameReturnAddress(bool isFrameAddress, SDOperand Chain, unsigned Depth,
+                         SelectionDAG &DAG) {
+   assert(0 && "LowerFrameReturnAddress unimplemented");
+   abort();
+ }
+ 


Index: llvm/lib/Target/IA64/IA64ISelLowering.h
diff -c /dev/null llvm/lib/Target/IA64/IA64ISelLowering.h:1.1
*** /dev/null	Fri Oct 28 12:46:47 2005
--- llvm/lib/Target/IA64/IA64ISelLowering.h	Fri Oct 28 12:46:36 2005
***************
*** 0 ****
--- 1,88 ----
+ //===-- IA64ISelLowering.h - IA64 DAG Lowering Interface --------*- C++ -*-===//
+ //
+ //                     The LLVM Compiler Infrastructure
+ //
+ // This file was developed by Duraid Madina and is distributed under
+ // the University of Illinois Open Source License. See LICENSE.TXT for details.
+ //
+ //===----------------------------------------------------------------------===//
+ //
+ // This file defines the interfaces that IA64 uses to lower LLVM code into a
+ // selection DAG.
+ //
+ //===----------------------------------------------------------------------===//
+ 
+ #ifndef LLVM_TARGET_IA64_IA64ISELLOWERING_H
+ #define LLVM_TARGET_IA64_IA64ISELLOWERING_H
+ 
+ #include "llvm/Target/TargetLowering.h"
+ #include "llvm/CodeGen/SelectionDAG.h"
+ #include "IA64.h"
+ 
+ namespace llvm {
+   namespace IA64ISD {
+     enum NodeType {
+       // Start the numbering where the builting ops and target ops leave off.
+       FIRST_NUMBER = ISD::BUILTIN_OP_END+IA64::INSTRUCTION_LIST_END,
+ 
+       /// FSEL - Traditional three-operand fsel node.
+       ///
+       FSEL,
+       
+       /// FCFID - The FCFID instruction, taking an f64 operand and producing
+       /// and f64 value containing the FP representation of the integer that
+       /// was temporarily in the f64 operand.
+       FCFID,
+       
+       /// FCTI[D,W]Z - The FCTIDZ and FCTIWZ instructions, taking an f32 or f64 
+       /// operand, producing an f64 value containing the integer representation
+       /// of that FP value.
+       FCTIDZ, FCTIWZ,
+     };
+   }  
+   
+   class IA64TargetLowering : public TargetLowering {
+     int VarArgsFrameIndex;            // FrameIndex for start of varargs area.
+     //int ReturnAddrIndex;              // FrameIndex for return slot.
+     unsigned GP, SP, RP; // FIXME - clean this mess up
+ 	  
+   public:
+     IA64TargetLowering(TargetMachine &TM);
+ 
+     unsigned VirtGPR; // this is public so it can be accessed in the selector
+                       // for ISD::RET. add an accessor instead? FIXME
+ 	    
+     /// LowerOperation - Provide custom lowering hooks for some operations.
+     ///
+ // XXX    virtual SDOperand LowerOperation(SDOperand Op, SelectionDAG &DAG);
+     
+     /// LowerArguments - This hook must be implemented to indicate how we should
+     /// lower the arguments for the specified function, into the specified DAG.
+     virtual std::vector<SDOperand>
+       LowerArguments(Function &F, SelectionDAG &DAG);
+     
+     /// LowerCallTo - This hook lowers an abstract call to a function into an
+     /// actual call.
+     virtual std::pair<SDOperand, SDOperand>
+       LowerCallTo(SDOperand Chain, const Type *RetTy, bool isVarArg,
+                   unsigned CC,
+                   bool isTailCall, SDOperand Callee, ArgListTy &Args,
+                   SelectionDAG &DAG);
+     
+     virtual SDOperand LowerVAStart(SDOperand Chain, SDOperand VAListP,
+                                    Value *VAListV, SelectionDAG &DAG);
+     
+     virtual std::pair<SDOperand,SDOperand>
+       LowerVAArg(SDOperand Chain, SDOperand VAListP, Value *VAListV,
+                  const Type *ArgTy, SelectionDAG &DAG);
+     
+     virtual std::pair<SDOperand, SDOperand>
+       LowerFrameReturnAddress(bool isFrameAddr, SDOperand Chain, unsigned Depth,
+                               SelectionDAG &DAG);
+     
+ // XXX    virtual MachineBasicBlock *InsertAtEndOfBasicBlock(MachineInstr *MI,
+ // XXX                                                      MachineBasicBlock *MBB);
+   };
+ }
+ 
+ #endif   // LLVM_TARGET_IA64_IA64ISELLOWERING_H


Index: llvm/lib/Target/IA64/IA64.h
diff -u llvm/lib/Target/IA64/IA64.h:1.2 llvm/lib/Target/IA64/IA64.h:1.3
--- llvm/lib/Target/IA64/IA64.h:1.2	Thu Apr 21 18:13:10 2005
+++ llvm/lib/Target/IA64/IA64.h	Fri Oct 28 12:46:36 2005
@@ -22,6 +22,11 @@
 class FunctionPass;
 class IntrinsicLowering;
 
+/// createIA64DAGToDAGInstructionSelector - This pass converts an LLVM
+/// function into IA64 machine code in a sane, DAG->DAG transform.
+///
+FunctionPass *createIA64DAGToDAGInstructionSelector(TargetMachine &TM);
+
 /// createIA64PatternInstructionSelector - This pass converts an LLVM function
 /// into a machine code representation in a more aggressive way.
 ///


Index: llvm/lib/Target/IA64/IA64AsmPrinter.cpp
diff -u llvm/lib/Target/IA64/IA64AsmPrinter.cpp:1.12 llvm/lib/Target/IA64/IA64AsmPrinter.cpp:1.13
--- llvm/lib/Target/IA64/IA64AsmPrinter.cpp:1.12	Fri Apr 22 12:54:15 2005
+++ llvm/lib/Target/IA64/IA64AsmPrinter.cpp	Fri Oct 28 12:46:36 2005
@@ -11,7 +11,7 @@
 // of machine-dependent LLVM code to assembly accepted by the GNU binutils 'gas'
 // assembler. The Intel 'ias' and HP-UX 'as' assemblers *may* choke on this
 // output, but if so that's a bug I'd like to hear about: please file a bug
-// report in bugzilla. FYI, the excellent 'ias' assembler is bundled with
+// report in bugzilla. FYI, the not too bad 'ias' assembler is bundled with
 // the Intel C/C++ compiler for Itanium Linux.
 //
 //===----------------------------------------------------------------------===//
@@ -249,7 +249,25 @@
     }
     void printS64ImmOperand(const MachineInstr *MI, unsigned OpNo,
                             MVT::ValueType VT) {
-      O << (int64_t)MI->getOperand(OpNo).getImmedValue();
+// XXX : nasty hack to avoid GPREL22 "relocation truncated to fit" linker
+// errors - instead of add rX = @gprel(CPI<whatever>), r1;; we now
+// emit movl rX = @gprel(CPI<whatever);;
+//      add  rX = rX, r1; 
+// this gives us 64 bits instead of 22 (for the add long imm) to play
+// with, which shuts up the linker. The problem is that the constant
+// pool entries aren't immediates at this stage, so we check here. 
+// If it's an immediate, print it the old fashioned way. If it's
+// not, we print it as a constant pool index. 
+      if(MI->getOperand(OpNo).isImmediate()) {
+        O << (int64_t)MI->getOperand(OpNo).getImmedValue();
+      } else { // this is a constant pool reference: FIXME: assert this
+        printOp(MI->getOperand(OpNo));
+      }
+    }
+
+    void printGlobalOperand(const MachineInstr *MI, unsigned OpNo,
+                          MVT::ValueType VT) {
+      printOp(MI->getOperand(OpNo), false); // this is NOT a br.call instruction
     }
 
     void printCallOperand(const MachineInstr *MI, unsigned OpNo,


Index: llvm/lib/Target/IA64/IA64ISelPattern.cpp
diff -u llvm/lib/Target/IA64/IA64ISelPattern.cpp:1.67 llvm/lib/Target/IA64/IA64ISelPattern.cpp:1.68
--- llvm/lib/Target/IA64/IA64ISelPattern.cpp:1.67	Thu Oct 20 20:52:45 2005
+++ llvm/lib/Target/IA64/IA64ISelPattern.cpp	Fri Oct 28 12:46:36 2005
@@ -1466,7 +1466,7 @@
 */
       BuildMI(BB, IA64::PCMPEQUNC, 3, pTemp1)
         .addReg(IA64::r0).addReg(IA64::r0).addReg(pA);
-      BuildMI(BB, IA64::TPCMPEQ, 3, Result)
+      BuildMI(BB, IA64::TPCMPEQ, 4, Result)
         .addReg(pTemp1).addReg(IA64::r0).addReg(IA64::r0).addReg(pB);
       break;
     }
@@ -1957,8 +1957,13 @@
       Select(Chain);
       IA64Lowering.restoreGP(BB);
       unsigned dummy = MakeReg(MVT::i64);
-      BuildMI(BB, IA64::ADD, 2, dummy).addConstantPoolIndex(CPIdx)
-        .addReg(IA64::r1); // CPI+GP
+      unsigned dummy2 = MakeReg(MVT::i64);
+      BuildMI(BB, IA64::MOVLIMM64, 1, dummy2).addConstantPoolIndex(CPIdx);
+      BuildMI(BB, IA64::ADD, 2, dummy).addReg(dummy2).addReg(IA64::r1); //CPI+GP
+
+
+ // OLD     BuildMI(BB, IA64::ADD, 2, dummy).addConstantPoolIndex(CPIdx)
+ // (FIXME!)      .addReg(IA64::r1); // CPI+GP
       if(!isBool)
         BuildMI(BB, Opc, 1, Result).addReg(dummy);
       else { // emit a little pseudocode to load a bool (stored in one byte)


Index: llvm/lib/Target/IA64/IA64InstrFormats.td
diff -u llvm/lib/Target/IA64/IA64InstrFormats.td:1.1 llvm/lib/Target/IA64/IA64InstrFormats.td:1.2
--- llvm/lib/Target/IA64/IA64InstrFormats.td:1.1	Thu Mar 17 12:17:03 2005
+++ llvm/lib/Target/IA64/IA64InstrFormats.td	Fri Oct 28 12:46:36 2005
@@ -36,6 +36,14 @@
   let Inst{5-0} = qpReg;
 }
 
+class AForm_DAG<bits<4> opcode, bits<6> qpReg, dag OL, string asmstr,
+      list<dag> pattern> : 
+  InstIA64<opcode, OL, asmstr> {
+
+  let Pattern = pattern;
+  let Inst{5-0} = qpReg;
+}
+
 let isBranch = 1, isTerminator = 1 in
 class BForm<bits<4> opcode, bits<6> x6, bits<3> btype, dag OL, string asmstr> :
   InstIA64<opcode, OL, asmstr> {


Index: llvm/lib/Target/IA64/IA64InstrInfo.td
diff -u llvm/lib/Target/IA64/IA64InstrInfo.td:1.15 llvm/lib/Target/IA64/IA64InstrInfo.td:1.16
--- llvm/lib/Target/IA64/IA64InstrInfo.td:1.15	Wed Sep 14 16:11:13 2005
+++ llvm/lib/Target/IA64/IA64InstrInfo.td	Fri Oct 28 12:46:36 2005
@@ -19,7 +19,7 @@
 def s8imm : Operand<i8> {
   let PrintMethod = "printS8ImmOperand";
 }
-def s14imm  : Operand<i16> {
+def s14imm  : Operand<i64> {
   let PrintMethod = "printS14ImmOperand";
 }
 def s22imm  : Operand<i32> {
@@ -32,10 +32,212 @@
   let PrintMethod = "printS64ImmOperand";
 }
 
+let PrintMethod = "printGlobalOperand" in
+  def globaladdress : Operand<i64>;
+
 // the asmprinter needs to know about calls
 let PrintMethod = "printCallOperand" in
   def calltarget : Operand<i64>;
   
+/* new daggy action!!! */
+
+def immSExt14  : PatLeaf<(i64 imm), [{
+  // immSExt14 predicate - True if the immediate fits in a 14-bit sign extended
+  // field.  Used by instructions like 'adds'.
+  int64_t v = (int64_t)N->getValue();
+  return (v <= 8191 && v >= -8192);
+}]>;
+
+def imm64  : PatLeaf<(i64 imm), [{
+  // imm64 predicate - True if the immediate fits in a 64-bit 
+  // field - i.e., true. used to keep movl happy
+  return true;
+}]>;
+
+def ADD  : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2),
+           "add $dst = $src1, $src2;;",
+	   [(set GR:$dst, (add GR:$src1, GR:$src2))]>;
+
+def ADD1 : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2),
+           "add $dst = $src1, $src2, 1;;",
+	   [(set GR:$dst, (add (add GR:$src1, GR:$src2), 1))]>;
+
+def ADDS : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, s14imm:$imm),
+           "adds $dst = $imm, $src1;;",
+	   [(set GR:$dst, (add GR:$src1, immSExt14:$imm))]>;
+ 
+def MOVL : AForm_DAG<0x03, 0x0b, (ops GR:$dst, s64imm:$imm),
+           "movl $dst = $imm;;",
+	   [(set GR:$dst, imm64:$imm)]>;
+
+def ADDL_GA : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, globaladdress:$imm),
+           "addl $dst = $imm, $src1;;",
+	   []>;
+  
+def SUB  : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2),
+           "sub $dst = $src1, $src2;;",
+	   [(set GR:$dst, (sub GR:$src1, GR:$src2))]>;
+
+def SUB1 : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2),
+           "sub $dst = $src1, $src2, 1;;",
+	   [(set GR:$dst, (add (sub GR: $src1, GR:$src2), -1))]>;
+
+def GETFSIGD : AForm_DAG<0x03, 0x0b, (ops GR:$dst, FP:$src),
+  "getf.sig $dst = $src;;",
+  []>;
+
+def SETFSIGD : AForm_DAG<0x03, 0x0b, (ops FP:$dst, GR:$src),
+  "setf.sig $dst = $src;;",
+  []>;
+
+def XMALD : AForm_DAG<0x03, 0x0b, (ops FP:$dst, FP:$src1, FP:$src2, FP:$src3),
+  "xma.l $dst = $src1, $src2, $src3;;",
+  []>;
+
+// pseudocode for integer multiplication 
+def : Pat<(mul GR:$src1, GR:$src2),
+           (GETFSIGD (XMALD (SETFSIGD GR:$src1), (SETFSIGD GR:$src2), F0))>;
+
+// TODO: addp4 (addp4 dst = src, r0 is a 32-bit add)
+// has imm form, too
+
+// def ADDS : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src1, s14imm:$imm),
+//   "adds $dst = $imm, $src1;;">;
+
+// load constants of various sizes // FIXME: prettyprint -ve constants
+def : Pat<(i64 immSExt14:$imm), (ADDS r0, immSExt14:$imm)>;
+def : Pat<(i64 imm64:$imm), (MOVL imm64:$imm)>;
+
+def AND   : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2),
+          "and $dst = $src1, $src2;;",
+	  [(set GR:$dst, (and GR:$src1, GR:$src2))]>;
+def ANDCM : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2),
+          "andcm $dst = $src1, $src2;;",
+	  [(set GR:$dst, (and GR:$src1, (not GR:$src2)))]>;
+// TODO: and/andcm/or/xor/add/sub/shift immediate forms
+def OR    : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2),
+          "or $dst = $src1, $src2;;",
+	  [(set GR:$dst, (or GR:$src1, GR:$src2))]>;
+
+def pOR   : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2, PR:$qp),
+          "($qp) or $dst = $src1, $src2;;">;
+
+def PCMPEQUNCR0R0 : AForm<0x03, 0x0b, (ops PR:$dst, PR:$qp),
+    "($qp) cmp.eq.unc $dst, p0 = r0, r0;;">;
+
+let isTwoAddress=1 in
+def TPCMPEQR0R0 : AForm<0x03, 0x0b, (ops PR:$dst, PR:$bogus, PR:$qp),
+  "($qp) cmp.eq $dst, p0 = r0, r0;;">;
+  
+/* our pseudocode for OR on predicates is:
+ *
+
+pC = pA OR pB
+-------------
+
+(pA) cmp.eq.unc pC,p0 = r0,r0  // pC = pA
+ ;;
+(pB) cmp.eq pC,p0 = r0,r0 // if (pB) pC = 1
+
+*/
+/*
+let isTwoAddress = 1 in {
+  def TPCMPEQ : AForm<0x03, 0x0b,
+  (ops PR:$dst, PR:$src2, GR:$src3, GR:$src4, PR:$qp),
+    "($qp) cmp.eq $dst, p0 = $src3, $src4;;">;
+}
+*/
+
+// FIXME: these are bogus
+def bOR   : Pat<(or PR:$src1, PR:$src2),
+          (PCMPEQUNCR0R0 PR:$src1)>;
+
+def bXOR  : Pat<(xor PR:$src1, PR:$src2),
+          (PCMPEQUNCR0R0 PR:$src1)>;
+
+def XOR   : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2),
+          "xor $dst = $src1, $src2;;",
+	  [(set GR:$dst, (xor GR:$src1, GR:$src2))]>;
+
+def SHL   : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2),
+          "shl $dst = $src1, $src2;;",
+	  [(set GR:$dst, (shl GR:$src1, GR:$src2))]>;
+
+/*
+def CMPEQ : AForm<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2),
+  "cmp.eq $dst, p0 = $src1, $src2;;">;
+def CMPGT : AForm<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2),
+  "cmp.gt $dst, p0 = $src1, $src2;;">;
+def CMPGE : AForm<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2),
+  "cmp.ge $dst, p0 = $src1, $src2;;">;
+def CMPLT : AForm<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2),
+  "cmp.lt $dst, p0 = $src1, $src2;;">;
+def CMPLE : AForm<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2),
+  "cmp.le $dst, p0 = $src1, $src2;;">;
+def CMPNE : AForm<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2),
+  "cmp.ne $dst, p0 = $src1, $src2;;">;
+def CMPLTU : AForm<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2),
+  "cmp.ltu $dst, p0 = $src1, $src2;;">;
+def CMPGTU : AForm<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2),
+  "cmp.gtu $dst, p0 = $src1, $src2;;">;
+def CMPLEU : AForm<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2),
+  "cmp.leu $dst, p0 = $src1, $src2;;">;
+def CMPGEU : AForm<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2),
+  "cmp.geu $dst, p0 = $src1, $src2;;">;
+*/
+
+// the following are all a bit unfortunate: we throw away the complement
+// of the compare!
+def CMPEQ : AForm_DAG<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2),
+          "cmp.eq $dst, p0 = $src1, $src2;;",
+	  [(set PR:$dst, (seteq GR:$src1, GR:$src2))]>;
+def CMPGT : AForm_DAG<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2),
+          "cmp.gt $dst, p0 = $src1, $src2;;",
+	  [(set PR:$dst, (setgt GR:$src1, GR:$src2))]>;
+def CMPGE : AForm_DAG<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2),
+          "cmp.ge $dst, p0 = $src1, $src2;;",
+	  [(set PR:$dst, (setge GR:$src1, GR:$src2))]>;
+def CMPLT : AForm_DAG<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2),
+          "cmp.lt $dst, p0 = $src1, $src2;;",
+	  [(set PR:$dst, (setlt GR:$src1, GR:$src2))]>;
+def CMPLE : AForm_DAG<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2),
+          "cmp.le $dst, p0 = $src1, $src2;;",
+	  [(set PR:$dst, (setle GR:$src1, GR:$src2))]>;
+def CMPNE : AForm_DAG<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2),
+          "cmp.ne $dst, p0 = $src1, $src2;;",
+	  [(set PR:$dst, (setne GR:$src1, GR:$src2))]>;
+def CMPLTU: AForm_DAG<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2),
+          "cmp.eq $dst, p0 = $src1, $src2;;",
+	  [(set PR:$dst, (setult GR:$src1, GR:$src2))]>;
+def CMPGTU: AForm_DAG<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2),
+          "cmp.eq $dst, p0 = $src1, $src2;;",
+	  [(set PR:$dst, (setugt GR:$src1, GR:$src2))]>;
+def CMPLEU: AForm_DAG<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2),
+          "cmp.eq $dst, p0 = $src1, $src2;;",
+	  [(set PR:$dst, (setule GR:$src1, GR:$src2))]>;
+def CMPGEU: AForm_DAG<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2),
+          "cmp.eq $dst, p0 = $src1, $src2;;",
+	  [(set PR:$dst, (setuge GR:$src1, GR:$src2))]>;
+
+// FIXME: tabelgen doesn't know that zxt1 is cheaper on ia64 than "andi", 
+// need to fix this one day 
+
+def SXT1 : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src), "sxt1 $dst = $src;;",
+           [(set GR:$dst, (sext_inreg GR:$src, i8))]>;
+def ZXT1 : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src), "zxt1 $dst = $src;;",
+           [(set GR:$dst, (and GR:$src, 255))]>;
+def SXT2 : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src), "sxt2 $dst = $src;;",
+           [(set GR:$dst, (sext_inreg GR:$src, i16))]>;
+def ZXT2 : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src), "zxt2 $dst = $src;;",
+           [(set GR:$dst, (and GR:$src, 65535))]>;
+def SXT4 : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src), "sxt4 $dst = $src;;",
+           [(set GR:$dst, (sext_inreg GR:$src, i32))]>;
+def ZXT4 : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src), "zxt4 $dst = $src;;",
+           [(set GR:$dst, (and GR:$src, 1341835918))]>; // hehhehe NO - FIXME
+
+// TODO: support postincrement (reg, imm9) loads+stores - this needs more
+// tablegen support
+
 def PHI : PseudoInstIA64<(ops variable_ops), "PHI">;
 def IDEF : PseudoInstIA64<(ops variable_ops), "// IDEF">;
 def IUSE : PseudoInstIA64<(ops variable_ops), "// IUSE">;
@@ -96,6 +298,7 @@
 def MOVLIMM64 : AForm<0x03, 0x0b, (ops GR:$dst, s64imm:$imm),
   "movl $dst = $imm;;">;
 
+/*
 def AND : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2),
   "and $dst = $src1, $src2;;">;
 def OR : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2),
@@ -104,6 +307,7 @@
   "xor $dst = $src1, $src2;;">;
 def SHL : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2),
   "shl $dst = $src1, $src2;;">;
+*/
 def SHLI : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src1, u6imm:$imm), 
   "shl $dst = $src1, $imm;;">;
 def SHRU : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2),
@@ -123,35 +327,14 @@
 
 def DEPZ : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src1, u6imm:$imm1, u6imm:$imm2),	  "dep.z $dst = $src1, $imm1, $imm2;;">;
 
+/*
 def SXT1 : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src), "sxt1 $dst = $src;;">;
 def ZXT1 : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src), "zxt1 $dst = $src;;">;
 def SXT2 : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src), "sxt2 $dst = $src;;">;
 def ZXT2 : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src), "zxt2 $dst = $src;;">;
 def SXT4 : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src), "sxt4 $dst = $src;;">;
 def ZXT4 : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src), "zxt4 $dst = $src;;">;
-
-// the following are all a bit unfortunate: we throw away the complement
-// of the compare!
-def CMPEQ : AForm<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2),
-  "cmp.eq $dst, p0 = $src1, $src2;;">;
-def CMPGT : AForm<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2),
-  "cmp.gt $dst, p0 = $src1, $src2;;">;
-def CMPGE : AForm<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2),
-  "cmp.ge $dst, p0 = $src1, $src2;;">;
-def CMPLT : AForm<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2),
-  "cmp.lt $dst, p0 = $src1, $src2;;">;
-def CMPLE : AForm<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2),
-  "cmp.le $dst, p0 = $src1, $src2;;">;
-def CMPNE : AForm<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2),
-  "cmp.ne $dst, p0 = $src1, $src2;;">;
-def CMPLTU : AForm<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2),
-  "cmp.ltu $dst, p0 = $src1, $src2;;">;
-def CMPGTU : AForm<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2),
-  "cmp.gtu $dst, p0 = $src1, $src2;;">;
-def CMPLEU : AForm<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2),
-  "cmp.leu $dst, p0 = $src1, $src2;;">;
-def CMPGEU : AForm<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2),
-  "cmp.geu $dst, p0 = $src1, $src2;;">;
+*/
 
 // and we do the whole thing again for FP compares!
 def FCMPEQ : AForm<0x03, 0x0b, (ops PR:$dst, FP:$src1, FP:$src2),
@@ -186,8 +369,6 @@
 def BCMPEQ : AForm<0x03, 0x0b, (ops PR:$dst1, PR:$dst2, GR:$src1, GR:$src2),
   "cmp.eq $dst1, dst2 = $src1, $src2;;">;
 
-def ADD : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2),
-  "add $dst = $src1, $src2;;">;
 def ADDIMM14 : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src1, s14imm:$imm),
   "adds $dst = $imm, $src1;;">;
 
@@ -205,8 +386,6 @@
     "($qp) cmp.ne $dst , p0 = $imm, $src2;;">;
 }
 
-def SUB : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2),
-  "sub $dst = $src1, $src2;;">;
 def SUBIMM8 : AForm<0x03, 0x0b, (ops GR:$dst, s8imm:$imm, GR:$src2),
   "sub $dst = $imm, $src2;;">;
 
@@ -312,6 +491,8 @@
   "stfd [$dstPtr] = $value;;">;
 
 let isTerminator = 1, isBranch = 1 in {
+  def BRL_NOTCALL : RawForm<0x03, 0xb0, (ops i64imm:$dst),
+    "(p0) brl.cond.sptk $dst;;">;
   def BRLCOND_NOTCALL : RawForm<0x03, 0xb0, (ops PR:$qp, i64imm:$dst),
     "($qp) brl.cond.sptk $dst;;">;
   def BRCOND_NOTCALL : RawForm<0x03, 0xb0, (ops PR:$qp, GR:$dst),
@@ -334,8 +515,14 @@
   F106,F107,F108,F109,F110,F111,F112,F113,F114,F115,F116,F117,F118,F119,
   F120,F121,F122,F123,F124,F125,F126,F127,
   out0,out1,out2,out3,out4,out5,out6,out7] in {
-  def BRCALL : RawForm<0x03, 0xb0, (ops calltarget:$dst),
+// old pattern call
+  def BRCALL: RawForm<0x03, 0xb0, (ops calltarget:$dst),
+  "br.call.sptk rp = $dst;;">;       // FIXME: teach llvm about branch regs?
+// new daggy stuff!  
+  def BRCALL_IPREL : RawForm<0x03, 0xb0, (ops calltarget:$dst, variable_ops),
   "br.call.sptk rp = $dst;;">;       // FIXME: teach llvm about branch regs?
+  def BRCALL_INDIRECT : RawForm<0x03, 0xb0, (ops GR:$branchreg, variable_ops),
+  "br.call.sptk rp = $branchreg;;">; // FIXME: teach llvm about branch regs?
   def BRLCOND_CALL : RawForm<0x03, 0xb0, (ops PR:$qp, i64imm:$dst),
     "($qp) brl.cond.call.sptk $dst;;">;
   def BRCOND_CALL : RawForm<0x03, 0xb0, (ops PR:$qp, GR:$dst),


Index: llvm/lib/Target/IA64/IA64RegisterInfo.td
diff -u llvm/lib/Target/IA64/IA64RegisterInfo.td:1.8 llvm/lib/Target/IA64/IA64RegisterInfo.td:1.9
--- llvm/lib/Target/IA64/IA64RegisterInfo.td:1.8	Fri Aug 19 14:13:20 2005
+++ llvm/lib/Target/IA64/IA64RegisterInfo.td	Fri Oct 28 12:46:36 2005
@@ -211,7 +211,7 @@
 
 // application (special) registers:
 
-// " previous function state" application register
+// "previous function state" application register
 def AR_PFS : GR<0, "ar.pfs">;
 
 // "return pointer" (this is really branch register b0)
@@ -255,7 +255,7 @@
         r104, r105, r106, r107, r108, r109, r110, r111,
         r112, r113, r114, r115, r116, r117, r118, r119,
         r120, r121, r122, r123, r124, r125, r126, r127,
-	r0, r1, r2, r12, r13, r15, r22]> // the last 15 are special (look down)
+	r0, r1, r2, r12, r13, r15, r22, rp]> // the last 16 are special (look down)
   {
     let MethodProtos = [{
     iterator allocation_order_begin(MachineFunction &MF) const;
@@ -264,13 +264,13 @@
   let MethodBodies = [{
     GRClass::iterator
     GRClass::allocation_order_begin(MachineFunction &MF) const {
-	// hide registers appropriately:
+	// hide the 8 out? registers appropriately:
 	return begin()+(8-(MF.getInfo<IA64FunctionInfo>()->outRegsUsed));
       }
 
       GRClass::iterator
       GRClass::allocation_order_end(MachineFunction &MF) const {
-	int numReservedRegs=7; // the 7 special registers r0,r1,r2,r12,r13 etc
+	int numReservedRegs=8; // the 8 special registers r0,r1,r2,r12,r13 etc
 
 	// we also can't allocate registers for use as locals if they're
 	// already required as 'out' registers


Index: llvm/lib/Target/IA64/IA64TargetMachine.cpp
diff -u llvm/lib/Target/IA64/IA64TargetMachine.cpp:1.5 llvm/lib/Target/IA64/IA64TargetMachine.cpp:1.6
--- llvm/lib/Target/IA64/IA64TargetMachine.cpp:1.5	Thu Sep  1 16:38:20 2005
+++ llvm/lib/Target/IA64/IA64TargetMachine.cpp	Fri Oct 28 12:46:36 2005
@@ -37,6 +37,9 @@
                               cl::desc("Disable the IA64 asm printer, for use "
                                        "when profiling the code generator."));
 
+  cl::opt<bool> EnableDAGIsel("enable-ia64-dag-isel", cl::Hidden,
+		              cl::desc("Enable the IA64 DAG->DAG isel"));
+
   // Register the target.
   RegisterTarget<IA64TargetMachine> X("ia64", "  IA-64 (Itanium)");
 }
@@ -97,8 +100,12 @@
   // Make sure that no unreachable blocks are instruction selected.
   PM.add(createUnreachableBlockEliminationPass());
 
-  PM.add(createIA64PatternInstructionSelector(*this));
-
+  // Add an instruction selector
+  if(EnableDAGIsel)
+    PM.add(createIA64DAGToDAGInstructionSelector(*this));
+  else
+    PM.add(createIA64PatternInstructionSelector(*this));
+  
 /* XXX not yet. ;)
   // Run optional SSA-based machine code optimizations next...
   if (!NoSSAPeephole)


Index: llvm/lib/Target/IA64/Makefile
diff -u llvm/lib/Target/IA64/Makefile:1.3 llvm/lib/Target/IA64/Makefile:1.4
--- llvm/lib/Target/IA64/Makefile:1.3	Thu Mar 17 12:37:05 2005
+++ llvm/lib/Target/IA64/Makefile	Fri Oct 28 12:46:36 2005
@@ -11,7 +11,8 @@
 # Make sure that tblgen is run, first thing.
 BUILT_SOURCES = IA64GenRegisterInfo.h.inc IA64GenRegisterNames.inc \
                 IA64GenRegisterInfo.inc IA64GenInstrNames.inc \
-                IA64GenInstrInfo.inc IA64GenAsmWriter.inc
+                IA64GenInstrInfo.inc IA64GenAsmWriter.inc \
+		IA64GenDAGISel.inc
 
 include $(LEVEL)/Makefile.common
 





From duraid at octopus.com.au  Fri Oct 28 12:52:35 2005
From: duraid at octopus.com.au (Duraid Madina)
Date: Fri, 28 Oct 2005 12:52:35 -0500
Subject: [llvm-commits] CVS: llvm-test/Makefile.programs 
Message-ID: <200510281752.MAA08918@zion.cs.uiuc.edu>



Changes in directory llvm-test:

Makefile.programs updated: 1.173 -> 1.174
---
Log message:

track the ia64 DAG->DAG instruction selector as llcbeta. 



---
Diffs of the changes:  (+4 -1)

 Makefile.programs |    5 ++++-
 1 files changed, 4 insertions(+), 1 deletion(-)


Index: llvm-test/Makefile.programs
diff -u llvm-test/Makefile.programs:1.173 llvm-test/Makefile.programs:1.174
--- llvm-test/Makefile.programs:1.173	Mon Oct 10 11:47:59 2005
+++ llvm-test/Makefile.programs	Fri Oct 28 12:52:23 2005
@@ -193,7 +193,10 @@
 LLCBETAOPTION := -enable-alpha-FTOI -enable-lsr-for-alpha
 #-enable-alpha-intfpdiv
 endif
-ifeq ($(ARCH),x86)
+ifeq ($(ARCH),IA64)
+LLCBETAOPTION := -enable-ia64-dag-isel
+endif
+1ifeq ($(ARCH),x86)
 LLCBETAOPTION := -enable-x86-fastcc
 endif
 





From lattner at cs.uiuc.edu  Fri Oct 28 13:23:39 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 28 Oct 2005 13:23:39 -0500
Subject: [llvm-commits] CVS: llvm-test/Makefile.programs 
Message-ID: <200510281823.NAA09148@zion.cs.uiuc.edu>



Changes in directory llvm-test:

Makefile.programs updated: 1.174 -> 1.175
---
Log message:

As usual, Duraid is trying to use subversive techniques to kill x86.


---
Diffs of the changes:  (+1 -1)

 Makefile.programs |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm-test/Makefile.programs
diff -u llvm-test/Makefile.programs:1.174 llvm-test/Makefile.programs:1.175
--- llvm-test/Makefile.programs:1.174	Fri Oct 28 12:52:23 2005
+++ llvm-test/Makefile.programs	Fri Oct 28 13:23:28 2005
@@ -196,7 +196,7 @@
 ifeq ($(ARCH),IA64)
 LLCBETAOPTION := -enable-ia64-dag-isel
 endif
-1ifeq ($(ARCH),x86)
+ifeq ($(ARCH),x86)
 LLCBETAOPTION := -enable-x86-fastcc
 endif
 





From lattner at cs.uiuc.edu  Fri Oct 28 13:27:03 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 28 Oct 2005 13:27:03 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp 
Message-ID: <200510281827.NAA09210@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/IA64:

IA64ISelDAGToDAG.cpp updated: 1.1 -> 1.2
---
Log message:

These are autogenerated


---
Diffs of the changes:  (+0 -33)

 IA64ISelDAGToDAG.cpp |   33 ---------------------------------
 1 files changed, 33 deletions(-)


Index: llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp
diff -u llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp:1.1 llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp:1.2
--- llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp:1.1	Fri Oct 28 12:46:36 2005
+++ llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp	Fri Oct 28 13:26:52 2005
@@ -313,39 +313,6 @@
                                 CurDAG->getTargetFrameIndex(FI, MVT::i64));
   }
 
-  case ISD::TokenFactor: {
-    SDOperand New;
-    if (N->getNumOperands() == 2) {
-      SDOperand Op0 = Select(N->getOperand(0));
-      SDOperand Op1 = Select(N->getOperand(1));
-      New = CurDAG->getNode(ISD::TokenFactor, MVT::Other, Op0, Op1);
-    } else {
-      std::vector<SDOperand> Ops;
-      for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
-        Ops.push_back(Select(N->getOperand(i)));
-      New = CurDAG->getNode(ISD::TokenFactor, MVT::Other, Ops);
-    }
-    
-    CodeGenMap[Op] = New;
-    return New;
-  }
-  case ISD::CopyFromReg: {
-    SDOperand Chain = Select(N->getOperand(0));
-    if (Chain == N->getOperand(0)) return Op; // No change
-    SDOperand New = CurDAG->getCopyFromReg(Chain,
-         cast<RegisterSDNode>(N->getOperand(1))->getReg(), N->getValueType(0));
-    return New.getValue(Op.ResNo);
-  }
-  case ISD::CopyToReg: {
-    SDOperand Chain = Select(N->getOperand(0));
-    SDOperand Reg = N->getOperand(1);
-    SDOperand Val = Select(N->getOperand(2));
-    SDOperand New = CurDAG->getNode(ISD::CopyToReg, MVT::Other,
-                                    Chain, Reg, Val);
-    CodeGenMap[Op] = New;
-    return New;
-  }
-
   case ISD::GlobalAddress: {
     GlobalValue *GV = cast<GlobalAddressSDNode>(N)->getGlobal();
     SDOperand GA = CurDAG->getTargetGlobalAddress(GV, MVT::i64);





From lattner at cs.uiuc.edu  Fri Oct 28 13:44:18 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 28 Oct 2005 13:44:18 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp 
Message-ID: <200510281844.NAA09304@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/PowerPC:

PPCAsmPrinter.cpp updated: 1.100 -> 1.101
---
Log message:

Do not globalize internal symbols


---
Diffs of the changes:  (+2 -1)

 PPCAsmPrinter.cpp |    3 ++-
 1 files changed, 2 insertions(+), 1 deletion(-)


Index: llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
diff -u llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.100 llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.101
--- llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.100	Tue Oct 18 11:51:22 2005
+++ llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp	Fri Oct 28 13:44:07 2005
@@ -390,7 +390,8 @@
   // Print out labels for the function.
   O << "\t.text\n";
   emitAlignment(4);
-  O << "\t.globl\t" << CurrentFnName << "\n";
+  if (!MF.getFunction()->hasInternalLinkage())
+    O << "\t.globl\t" << CurrentFnName << "\n";
   O << CurrentFnName << ":\n";
 
   // Print out code for the function.





From lattner at cs.uiuc.edu  Fri Oct 28 14:52:13 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 28 Oct 2005 14:52:13 -0500
Subject: [llvm-commits] CVS: llvm/test/Regression/CodeGen/Generic/isunord.ll
Message-ID: <200510281952.OAA09566@zion.cs.uiuc.edu>



Changes in directory llvm/test/Regression/CodeGen/Generic:

isunord.ll added (r1.1)
---
Log message:

New testcase.  Probably many targets don't support this, so they should probably
add themselves as xfails until they do (at least for the release).


---
Diffs of the changes:  (+8 -0)

 isunord.ll |    8 ++++++++
 1 files changed, 8 insertions(+)


Index: llvm/test/Regression/CodeGen/Generic/isunord.ll
diff -c /dev/null llvm/test/Regression/CodeGen/Generic/isunord.ll:1.1
*** /dev/null	Fri Oct 28 14:52:12 2005
--- llvm/test/Regression/CodeGen/Generic/isunord.ll	Fri Oct 28 14:52:02 2005
***************
*** 0 ****
--- 1,8 ----
+ ; RUN: llvm-as < %s | llc
+ 
+ declare bool %llvm.isunordered(double, double)
+ 
+ bool %test(double %X, double %Y) {
+   %tmp27 = call bool %llvm.isunordered( double %X, double %Y)
+   ret bool %tmp27
+ }





From lattner at cs.uiuc.edu  Fri Oct 28 14:58:06 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 28 Oct 2005 14:58:06 -0500
Subject: [llvm-commits] CVS: llvm/test/Regression/CodeGen/Generic/isunord.ll
Message-ID: <200510281958.OAA09604@zion.cs.uiuc.edu>



Changes in directory llvm/test/Regression/CodeGen/Generic:

isunord.ll updated: 1.1 -> 1.2
---
Log message:

add the xfail lines


---
Diffs of the changes:  (+2 -0)

 isunord.ll |    2 ++
 1 files changed, 2 insertions(+)


Index: llvm/test/Regression/CodeGen/Generic/isunord.ll
diff -u llvm/test/Regression/CodeGen/Generic/isunord.ll:1.1 llvm/test/Regression/CodeGen/Generic/isunord.ll:1.2
--- llvm/test/Regression/CodeGen/Generic/isunord.ll:1.1	Fri Oct 28 14:52:02 2005
+++ llvm/test/Regression/CodeGen/Generic/isunord.ll	Fri Oct 28 14:57:55 2005
@@ -1,4 +1,6 @@
 ; RUN: llvm-as < %s | llc
+; XFAIL: alpha|ia64|sparcv8
+
 
 declare bool %llvm.isunordered(double, double)
 





From lattner at cs.uiuc.edu  Fri Oct 28 15:32:55 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 28 Oct 2005 15:32:55 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
	PPCInstrInfo.td 
Message-ID: <200510282032.PAA09807@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/PowerPC:

PPCISelDAGToDAG.cpp updated: 1.122 -> 1.123
PPCInstrInfo.td updated: 1.137 -> 1.138
---
Log message:

add support for branch on ordered/unordered.


---
Diffs of the changes:  (+21 -0)

 PPCISelDAGToDAG.cpp |   17 +++++++++++++++++
 PPCInstrInfo.td     |    4 ++++
 2 files changed, 21 insertions(+)


Index: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.122 llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.123
--- llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.122	Tue Oct 25 16:03:41 2005
+++ llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp	Fri Oct 28 15:32:44 2005
@@ -489,6 +489,15 @@
   case ISD::SETGT:  return PPC::BGT;
   case ISD::SETUGE:
   case ISD::SETGE:  return PPC::BGE;
+    
+  case ISD::SETO:   return PPC::BUN;
+  case ISD::SETUO:  return PPC::BNU;
+  case ISD::SETOEQ:
+  case ISD::SETOGT:
+  case ISD::SETOGE:
+  case ISD::SETOLT:
+  case ISD::SETOLE:
+  case ISD::SETONE: assert(0 && "Unknown condition!"); abort();
   }
   return 0;
 }
@@ -509,6 +518,14 @@
   case ISD::SETLE:  Inv = true;   return 1;
   case ISD::SETEQ:  Inv = false;  return 2;
   case ISD::SETNE:  Inv = true;   return 2;
+  case ISD::SETO:   Inv = true;   return 3;
+  case ISD::SETUO:  Inv = false;  return 3;
+  case ISD::SETOEQ:
+  case ISD::SETOGT:
+  case ISD::SETOGE:
+  case ISD::SETOLT:
+  case ISD::SETOLE:
+  case ISD::SETONE: assert(0 && "Unknown condition!"); abort();
   }
   return 0;
 }


Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td
diff -u llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.137 llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.138
--- llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.137	Tue Oct 25 16:03:41 2005
+++ llvm/lib/Target/PowerPC/PPCInstrInfo.td	Fri Oct 28 15:32:44 2005
@@ -204,6 +204,10 @@
                   "bgt $crS, $block", BrB>;
   def BNE : BForm<16, 0, 0, 4,  2, (ops CRRC:$crS, target:$block),
                   "bne $crS, $block", BrB>;
+  def BUN : BForm<16, 0, 0, 12, 3, (ops CRRC:$crS, target:$block),
+                  "bun $crS, $block", BrB>;
+  def BNU : BForm<16, 0, 0, 4,  3, (ops CRRC:$crS, target:$block),
+                  "bnu $crS, $block", BrB>;
 }
 
 let isCall = 1, 





From lattner at cs.uiuc.edu  Fri Oct 28 15:49:58 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 28 Oct 2005 15:49:58 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp 
Message-ID: <200510282049.PAA09896@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/PowerPC:

PPCISelDAGToDAG.cpp updated: 1.123 -> 1.124
---
Log message:

add a hack to get code with ordered comparisons working.  This hack is
tracked as PR642: http://llvm.cs.uiuc.edu/PR642 


---
Diffs of the changes:  (+12 -12)

 PPCISelDAGToDAG.cpp |   24 ++++++++++++------------
 1 files changed, 12 insertions(+), 12 deletions(-)


Index: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.123 llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.124
--- llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.123	Fri Oct 28 15:32:44 2005
+++ llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp	Fri Oct 28 15:49:47 2005
@@ -479,25 +479,25 @@
 static unsigned getBCCForSetCC(ISD::CondCode CC) {
   switch (CC) {
   default: assert(0 && "Unknown condition!"); abort();
+  case ISD::SETOEQ:    // FIXME: This is incorrect see PR642.
   case ISD::SETEQ:  return PPC::BEQ;
+  case ISD::SETONE:    // FIXME: This is incorrect see PR642.
   case ISD::SETNE:  return PPC::BNE;
+  case ISD::SETOLT:    // FIXME: This is incorrect see PR642.
   case ISD::SETULT:
   case ISD::SETLT:  return PPC::BLT;
+  case ISD::SETOLE:    // FIXME: This is incorrect see PR642.
   case ISD::SETULE:
   case ISD::SETLE:  return PPC::BLE;
+  case ISD::SETOGT:    // FIXME: This is incorrect see PR642.
   case ISD::SETUGT:
   case ISD::SETGT:  return PPC::BGT;
+  case ISD::SETOGE:    // FIXME: This is incorrect see PR642.
   case ISD::SETUGE:
   case ISD::SETGE:  return PPC::BGE;
     
   case ISD::SETO:   return PPC::BUN;
   case ISD::SETUO:  return PPC::BNU;
-  case ISD::SETOEQ:
-  case ISD::SETOGT:
-  case ISD::SETOGE:
-  case ISD::SETOLT:
-  case ISD::SETOLE:
-  case ISD::SETONE: assert(0 && "Unknown condition!"); abort();
   }
   return 0;
 }
@@ -508,24 +508,24 @@
 static unsigned getCRIdxForSetCC(ISD::CondCode CC, bool& Inv) {
   switch (CC) {
   default: assert(0 && "Unknown condition!"); abort();
+  case ISD::SETOLT:  // FIXME: This is incorrect see PR642.
   case ISD::SETULT:
   case ISD::SETLT:  Inv = false;  return 0;
+  case ISD::SETOGE:  // FIXME: This is incorrect see PR642.
   case ISD::SETUGE:
   case ISD::SETGE:  Inv = true;   return 0;
+  case ISD::SETOGT:  // FIXME: This is incorrect see PR642.
   case ISD::SETUGT:
   case ISD::SETGT:  Inv = false;  return 1;
+  case ISD::SETOLE:  // FIXME: This is incorrect see PR642.
   case ISD::SETULE:
   case ISD::SETLE:  Inv = true;   return 1;
+  case ISD::SETOEQ:  // FIXME: This is incorrect see PR642.
   case ISD::SETEQ:  Inv = false;  return 2;
+  case ISD::SETONE:  // FIXME: This is incorrect see PR642.
   case ISD::SETNE:  Inv = true;   return 2;
   case ISD::SETO:   Inv = true;   return 3;
   case ISD::SETUO:  Inv = false;  return 3;
-  case ISD::SETOEQ:
-  case ISD::SETOGT:
-  case ISD::SETOGE:
-  case ISD::SETOLT:
-  case ISD::SETOLE:
-  case ISD::SETONE: assert(0 && "Unknown condition!"); abort();
   }
   return 0;
 }





From jlaskey at apple.com  Fri Oct 28 16:46:42 2005
From: jlaskey at apple.com (Jim Laskey)
Date: Fri, 28 Oct 2005 16:46:42 -0500
Subject: [llvm-commits] CVS: llvm/utils/TableGen/Record.h Record.cpp 
Message-ID: <200510282146.QAA10201@zion.cs.uiuc.edu>



Changes in directory llvm/utils/TableGen:

Record.h updated: 1.52 -> 1.53
Record.cpp updated: 1.45 -> 1.46
---
Log message:

Added method to return a vector of records for a ListInit of Def field.  This
simplifies using list of records.


---
Diffs of the changes:  (+25 -0)

 Record.cpp |   19 +++++++++++++++++++
 Record.h   |    6 ++++++
 2 files changed, 25 insertions(+)


Index: llvm/utils/TableGen/Record.h
diff -u llvm/utils/TableGen/Record.h:1.52 llvm/utils/TableGen/Record.h:1.53
--- llvm/utils/TableGen/Record.h:1.52	Tue Sep 13 16:44:28 2005
+++ llvm/utils/TableGen/Record.h	Fri Oct 28 16:46:31 2005
@@ -1000,6 +1000,12 @@
   ///
   ListInit *getValueAsListInit(const std::string &FieldName) const;
 
+  /// getValueAsListDef - This method looks up the specified field and returns
+  /// its value as a vector of records, throwing an exception if the field does
+  /// not exist or if the value is not the right type.
+  ///
+  std::vector<Record*> getValueAsListDef(const std::string &FieldName) const;
+
   /// getValueAsDef - This method looks up the specified field and returns its
   /// value as a Record, throwing an exception if the field does not exist or if
   /// the value is not the right type.


Index: llvm/utils/TableGen/Record.cpp
diff -u llvm/utils/TableGen/Record.cpp:1.45 llvm/utils/TableGen/Record.cpp:1.46
--- llvm/utils/TableGen/Record.cpp:1.45	Tue Sep 13 16:44:28 2005
+++ llvm/utils/TableGen/Record.cpp	Fri Oct 28 16:46:31 2005
@@ -709,6 +709,25 @@
         "' does not have a list initializer!";
 }
 
+/// getValueAsListDef - This method looks up the specified field and returns
+/// its value as a vector of records, throwing an exception if the field does
+/// not exist or if the value is not the right type.
+///
+std::vector<Record*>  Record::getValueAsListDef(const std::string &FieldName)
+                                                                         const {
+  ListInit *List = getValueAsListInit(FieldName);
+  std::vector<Record*> Defs;
+  for (unsigned i = 0; i < List->getSize(); i++) {
+    if (DefInit *DI = dynamic_cast<DefInit*>(List->getElement(i))) {
+      Defs.push_back(DI->getDef());
+    } else {
+      throw "Record `" + getName() + "', field `" + FieldName +
+            "' list is not entirely DefInit!";
+    }
+  }
+  return Defs;
+}
+
 /// getValueAsInt - This method looks up the specified field and returns its
 /// value as an int, throwing an exception if the field does not exist or if
 /// the value is not the right type.





From jlaskey at apple.com  Fri Oct 28 16:47:41 2005
From: jlaskey at apple.com (Jim Laskey)
Date: Fri, 28 Oct 2005 16:47:41 -0500
Subject: [llvm-commits] CVS: llvm/utils/TableGen/SubtargetEmitter.h
	SubtargetEmitter.cpp 
Message-ID: <200510282147.QAA10217@zion.cs.uiuc.edu>



Changes in directory llvm/utils/TableGen:

SubtargetEmitter.h updated: 1.4 -> 1.5
SubtargetEmitter.cpp updated: 1.9 -> 1.10
---
Log message:

Removed Mr. Smith from the code.


---
Diffs of the changes:  (+144 -172)

 SubtargetEmitter.cpp |  296 +++++++++++++++++++++++----------------------------
 SubtargetEmitter.h   |   20 +--
 2 files changed, 144 insertions(+), 172 deletions(-)


Index: llvm/utils/TableGen/SubtargetEmitter.h
diff -u llvm/utils/TableGen/SubtargetEmitter.h:1.4 llvm/utils/TableGen/SubtargetEmitter.h:1.5
--- llvm/utils/TableGen/SubtargetEmitter.h:1.4	Thu Oct 27 14:47:21 2005
+++ llvm/utils/TableGen/SubtargetEmitter.h	Fri Oct 28 16:47:29 2005
@@ -23,13 +23,6 @@
 
 namespace llvm {
 
-//
-// Convenience types.
-//
-typedef std::map<std::string, unsigned> IntMap;
-typedef std::vector<InstrItinerary> IntineraryList;
-typedef std::vector<IntineraryList> ProcessorList;
-
 class SubtargetEmitter : public TableGenBackend {
   
   RecordKeeper &Records;
@@ -38,12 +31,15 @@
   void Enumeration(std::ostream &OS, const char *ClassName, bool isBits);
   void FeatureKeyValues(std::ostream &OS);
   void CPUKeyValues(std::ostream &OS);
-  unsigned CollectAllItinClasses(IntMap &ItinClassesMap);
+  unsigned CollectAllItinClasses(std::map<std::string, unsigned>
+                                                               &ItinClassesMap);
   void FormItineraryString(Record *ItinData, std::string &ItinString,
-                           unsigned &N);
-  void EmitStageData(std::ostream &OS, unsigned N,
-                     IntMap &ItinClassesMap, ProcessorList &ProcList);
-  void EmitProcessData(std::ostream &OS, ProcessorList &ProcList);
+                           unsigned &NStages);
+  void EmitStageData(std::ostream &OS, unsigned NItinClasses,
+                     std::map<std::string, unsigned> &ItinClassesMap,
+                     std::vector<std::vector<InstrItinerary> > &ProcList);
+  void EmitProcessData(std::ostream &OS,
+                       std::vector<std::vector<InstrItinerary> > &ProcList);
   void EmitData(std::ostream &OS);
   void ParseFeaturesFunction(std::ostream &OS);
   


Index: llvm/utils/TableGen/SubtargetEmitter.cpp
diff -u llvm/utils/TableGen/SubtargetEmitter.cpp:1.9 llvm/utils/TableGen/SubtargetEmitter.cpp:1.10
--- llvm/utils/TableGen/SubtargetEmitter.cpp:1.9	Fri Oct 28 10:20:43 2005
+++ llvm/utils/TableGen/SubtargetEmitter.cpp	Fri Oct 28 16:47:29 2005
@@ -20,72 +20,6 @@
 using namespace llvm;
 
 //
-// Convenience types.
-//
-typedef std::vector<Record*> RecordList;
-
-//
-// RecordListIter - Simplify iterating through a std::vector of records.
-// 
-class RecordListIter {
-  std::vector<Record*>::iterator RI;  // Currect cursor
-  std::vector<Record*>::iterator E;   // End point
-
-public:
-  
-  //
-  // Ctor.
-  //
-  RecordListIter(RecordList &RL)
-      : RI(RL.begin()), E(RL.end())
-  {}
-  
-  
-  //
-  // isMore - Return true if more records are available.
-  //
-  bool isMore() const { return RI != E; }
-  
-  //
-  // next - Return the next record or NULL if none.
-  //
-  Record *next() { return isMore() ? *RI++ : NULL; }
-};
-
-//
-// DefListIter - Simplify iterating through a field which is a list of records.
-// 
-struct DefListIter {
-  ListInit *List;  // List of DefInit
-  unsigned N;      // Number of elements in list
-  unsigned i;      // Current index in list
-
-  //
-  // Ctor - Lookup field and get list and length.
-  //
-  DefListIter(Record *R, const std::string &Name)
-      : List(R->getValueAsListInit(Name)), N(List->getSize()), i(0)
-  {}
-  
-  //
-  // isMore - Return true if more records are available.
-  //
-  bool isMore() const { return i < N; }
-  
-  //
-  // next - Return the next record or NULL if none.
-  //
-  Record *next() {
-    if (isMore()) {
-      if (DefInit *DI = dynamic_cast<DefInit*>(List->getElement(i++))) {
-        return DI->getDef();
-      }
-    }
-    return NULL;
-  }
-};
-
-//
 // Record sort by name function.
 //
 struct LessRecord {
@@ -110,27 +44,28 @@
                                    const char *ClassName,
                                    bool isBits) {
   // Get all records of class and sort
-  RecordList Defs = Records.getAllDerivedDefinitions(ClassName);
-  sort(Defs.begin(), Defs.end(), LessRecord());
+  std::vector<Record*> DefList = Records.getAllDerivedDefinitions(ClassName);
+  sort(DefList.begin(), DefList.end(), LessRecord());
 
-  // Track position if isBits
-  int i = 0;
-  
   // Open enumeration
   OS << "enum {\n";
   
   // For each record
-  RecordListIter DI(Defs);
-  while (Record *R = DI.next()) {
+  for (unsigned i = 0, N = DefList.size(); i < N;) {
+    // Next record
+    Record *Def = DefList[i];
+    
     // Get and emit name
-    std::string Name = R->getName();
+    std::string Name = Def->getName();
     OS << "  " << Name;
     
     // If bit flags then emit expression (1 << i)
-    if (isBits)  OS << " = " << " 1 << " << i++;
+    if (isBits)  OS << " = " << " 1 << " << i;
 
-    // Depending on if more in the list, emit comma and new line
-    OS << (DI.isMore() ? ",\n" : "\n");
+    // Depending on if more in the list emit comma
+    if (++i < N) OS << ",";
+    
+    OS << "\n";
   }
   
   // Close enumeration
@@ -143,26 +78,34 @@
 //
 void SubtargetEmitter::FeatureKeyValues(std::ostream &OS) {
   // Gather and sort all the features
-  RecordList Features = Records.getAllDerivedDefinitions("SubtargetFeature");
-  sort(Features.begin(), Features.end(), LessRecord());
+  std::vector<Record*> FeatureList =
+                           Records.getAllDerivedDefinitions("SubtargetFeature");
+  sort(FeatureList.begin(), FeatureList.end(), LessRecord());
 
   // Begin feature table
   OS << "// Sorted (by key) array of values for CPU features.\n"
      << "static llvm::SubtargetFeatureKV FeatureKV[] = {\n";
   
   // For each feature
-  RecordListIter FI(Features);
-  while (Record *R = FI.next()) {
-    std::string Instance = R->getName();
-    std::string Name = R->getValueAsString("Name");
-    std::string Desc = R->getValueAsString("Desc");
+  for (unsigned i = 0, N = FeatureList.size(); i < N;) {
+    // Next feature
+    Record *Feature = FeatureList[i];
+
+    std::string Name = Feature->getName();
+    std::string CommandLineName = Feature->getValueAsString("Name");
+    std::string Desc = Feature->getValueAsString("Desc");
     
     // Emit as { "feature", "decription", feactureEnum }
     OS << "  { "
-       << "\"" << Name << "\", "
+       << "\"" << CommandLineName << "\", "
        << "\"" << Desc << "\", "
-       << Instance
-       << (FI.isMore() ? " },\n" : " }\n");
+       << Name
+       << " }";
+    
+    // Depending on if more in the list emit comma
+    if (++i < N) OS << ",";
+    
+    OS << "\n";
   }
   
   // End feature table
@@ -180,35 +123,44 @@
 //
 void SubtargetEmitter::CPUKeyValues(std::ostream &OS) {
   // Gather and sort processor information
-  RecordList Processors = Records.getAllDerivedDefinitions("Processor");
-  sort(Processors.begin(), Processors.end(), LessRecordFieldName());
+  std::vector<Record*> ProcessorList =
+                          Records.getAllDerivedDefinitions("Processor");
+  sort(ProcessorList.begin(), ProcessorList.end(), LessRecordFieldName());
 
   // Begin processor table
   OS << "// Sorted (by key) array of values for CPU subtype.\n"
      << "static const llvm::SubtargetFeatureKV SubTypeKV[] = {\n";
      
   // For each processor
-  RecordListIter PI(Processors);
-  while (Record *R = PI.next()) {
-    std::string Name = R->getValueAsString("Name");
-    DefListIter FI(R, "Features");
+  for (unsigned i = 0, N = ProcessorList.size(); i < N;) {
+    // Next processor
+    Record *Processor = ProcessorList[i];
+
+    std::string Name = Processor->getValueAsString("Name");
+    std::vector<Record*> FeatureList = Processor->getValueAsListDef("Features");
     
     // Emit as { "cpu", "description", f1 | f2 | ... fn },
     OS << "  { "
        << "\"" << Name << "\", "
        << "\"Select the " << Name << " processor\", ";
     
-    if (!FI.isMore()) {
+    if (FeatureList.empty()) {
       OS << "0";
     } else {
-      while (Record *Feature = FI.next()) {
+      for (unsigned j = 0, M = FeatureList.size(); j < M;) {
+        Record *Feature = FeatureList[j];
         std::string Name = Feature->getName();
         OS << Name;
-        if (FI.isMore()) OS << " | ";
+        if (++j < M) OS << " | ";
       }
     }
     
-    OS << (PI.isMore() ? " },\n" : " }\n");
+    OS << " }";
+    
+    // Depending on if more in the list emit comma
+    if (++i < N) OS << ",";
+    
+    OS << "\n";
   }
   
   // End processor table
@@ -224,25 +176,26 @@
 // CollectAllItinClasses - Gathers and enumerates all the itinerary classes.
 // Returns itinerary class count.
 //
-unsigned SubtargetEmitter::CollectAllItinClasses(IntMap &ItinClassesMap) {
+unsigned SubtargetEmitter::CollectAllItinClasses(std::map<std::string, unsigned>
+                                                              &ItinClassesMap) {
   // Gather and sort all itinerary classes
-  RecordList ICL = Records.getAllDerivedDefinitions("InstrItinClass");
-  sort(ICL.begin(), ICL.end(), LessRecord());
-
-  // Track enumeration
-  unsigned Index = 0;
-  
-  // For each class
-  RecordListIter ICI(ICL);
-  while (Record *ItinClass = ICI.next()) {
+  std::vector<Record*> ItinClassList =
+                            Records.getAllDerivedDefinitions("InstrItinClass");
+  sort(ItinClassList.begin(), ItinClassList.end(), LessRecord());
+
+  // For each itinerary class
+  unsigned N = ItinClassList.size();
+  for (unsigned i = 0; i < N; i++) {
+    // Next itinerary class
+    Record *ItinClass = ItinClassList[i];
     // Get name of itinerary class
     std::string Name = ItinClass->getName();
     // Assign itinerary class a unique number
-    ItinClassesMap[Name] = Index++;
+    ItinClassesMap[Name] = i;
   }
   
   // Return itinerary class count
-  return Index;
+  return N;
 }
 
 //
@@ -251,24 +204,31 @@
 //
 void SubtargetEmitter::FormItineraryString(Record *ItinData,
                                            std::string &ItinString,
-                                           unsigned &N) {
-  // Set up stages iterator
-  DefListIter SLI(ItinData, "Stages");
-  // Get stage count
-  N = SLI.N;
+                                           unsigned &NStages) {
+  // Get states list
+  std::vector<Record*> StageList = ItinData->getValueAsListDef("Stages");
 
   // For each stage
-  while (Record *Stage = SLI.next()) {
+  unsigned N = NStages = StageList.size();
+  for (unsigned i = 0; i < N; i++) {
+    // Next stage
+    Record *Stage = StageList[i];
+  
     // Form string as ,{ cycles, u1 | u2 | ... | un }
     int Cycles = Stage->getValueAsInt("Cycles");
     ItinString += "  ,{ " + itostr(Cycles) + ", ";
     
+    // Get unit list
+    std::vector<Record*> UnitList = Stage->getValueAsListDef("Units");
+    
     // For each unit
-    DefListIter ULI(Stage, "Units");
-    while (Record *Unit = ULI.next()) {
-      std::string Name = Unit->getName();
-      ItinString += Name;
-      if (ULI.isMore())ItinString += " | ";
+    for (unsigned j = 0, M = UnitList.size(); j < M;) {
+      // Next unit
+      Record *Unit = UnitList[j];
+      
+      // Add name and bitwise or
+      ItinString += Unit->getName();
+      if (++j < M) ItinString += " | ";
     }
     
     // Close off stage
@@ -281,40 +241,48 @@
 // processors.
 //
 void SubtargetEmitter::EmitStageData(std::ostream &OS,
-                                     unsigned N,
-                                     IntMap &ItinClassesMap, 
-                                     ProcessorList &ProcList) {
+       unsigned NItinClasses,
+       std::map<std::string, unsigned> &ItinClassesMap, 
+       std::vector<std::vector<InstrItinerary> > &ProcList) {
   // Gather processor iteraries
-  RecordList Itins = Records.getAllDerivedDefinitions("ProcessorItineraries");
+  std::vector<Record*> ProcItinList =
+                       Records.getAllDerivedDefinitions("ProcessorItineraries");
   
   // If just no itinerary then don't bother
-  if (Itins.size() < 2) return;
+  if (ProcItinList.size() < 2) return;
 
   // Begin stages table
   OS << "static llvm::InstrStage Stages[] = {\n"
         "  { 0, 0 } // No itinerary\n";
         
-  IntMap ItinMap;
-  unsigned Index  = 1;
-  RecordListIter II(Itins);
-  while (Record *Itin = II.next()) {
+  unsigned ItinEnum = 1;
+  std::map<std::string, unsigned> ItinMap;
+  for (unsigned i = 0, N = ProcItinList.size(); i < N; i++) {
+    // Next record
+    Record *Proc = ProcItinList[i];
+    
     // Get processor itinerary name
-    std::string Name = Itin->getName();
+    std::string Name = Proc->getName();
     
     // Skip default
     if (Name == "NoItineraries") continue;
     
     // Create and expand processor itinerary to cover all itinerary classes
-    IntineraryList IL;
-    IL.resize(N);
+    std::vector<InstrItinerary> ItinList;
+    ItinList.resize(NItinClasses);
+    
+    // Get itinerary data list
+    std::vector<Record*> ItinDataList = Proc->getValueAsListDef("IID");
     
-    // For each itinerary
-    DefListIter IDLI(Itin, "IID");
-    while (Record *ItinData = IDLI.next()) {
+    // For each itinerary data
+    for (unsigned j = 0, M = ItinDataList.size(); j < M; j++) {
+      // Next itinerary data
+      Record *ItinData = ItinDataList[j];
+      
       // Get string and stage count
       std::string ItinString;
-      unsigned M;
-      FormItineraryString(ItinData, ItinString, M);
+      unsigned NStages;
+      FormItineraryString(ItinData, ItinString, NStages);
 
       // Check to see if it already exists
       unsigned Find = ItinMap[ItinString];
@@ -322,23 +290,23 @@
       // If new itinerary
       if (Find == 0) {
         // Emit as ,{ cycles, u1 | u2 | ... | un } // index
-        OS << ItinString << " // " << Index << "\n";
-        ItinMap[ItinString] = Find = Index++;
+        OS << ItinString << " // " << ItinEnum << "\n";
+        ItinMap[ItinString] = Find = ItinEnum++;
       }
       
       // Set up itinerary as location and location + stage count
-      InstrItinerary Intinerary = { Find, Find + M };
+      InstrItinerary Intinerary = { Find, Find + NStages };
 
       // Locate where to inject into processor itinerary table
       std::string Name = ItinData->getValueAsDef("TheClass")->getName();
       Find = ItinClassesMap[Name];
       
       // Inject - empty slots will be 0, 0
-      IL[Find] = Intinerary;
+      ItinList[Find] = Intinerary;
     }
     
     // Add process itinerary to list
-    ProcList.push_back(IL);
+    ProcList.push_back(ItinList);
   }
   
   // End stages table
@@ -349,14 +317,18 @@
 // EmitProcessData - Generate data for processor itineraries.
 //
 void SubtargetEmitter::EmitProcessData(std::ostream &OS,
-                                       ProcessorList &ProcList) {
+      std::vector<std::vector<InstrItinerary> > &ProcList) {
   // Get an iterator for processor itinerary stages
-  ProcessorList::iterator PLI = ProcList.begin();
+  std::vector<std::vector<InstrItinerary> >::iterator
+      ProcListIter = ProcList.begin();
   
   // For each processor itinerary
-  RecordList Itins = Records.getAllDerivedDefinitions("ProcessorItineraries");
-  RecordListIter II(Itins);
-  while (Record *Itin = II.next()) {
+  std::vector<Record*> Itins =
+                       Records.getAllDerivedDefinitions("ProcessorItineraries");
+  for (unsigned i = 0, N = Itins.size(); i < N; i++) {
+    // Next record
+    Record *Itin = Itins[i];
+
     // Get processor itinerary name
     std::string Name = Itin->getName();
     
@@ -368,10 +340,10 @@
     OS << "static llvm::InstrItinerary " << Name << "[] = {\n";
     
     // For each itinerary class
-    IntineraryList &IL = *PLI++;
-    unsigned Index = 0;
-    for (IntineraryList::iterator ILI = IL.begin(), E = IL.end(); ILI != E;) {
-      InstrItinerary &Intinerary = *ILI++;
+    std::vector<InstrItinerary> &ItinList = *ProcListIter++;
+    unsigned ItinIndex = 0;
+    for (unsigned j = 0, M = ItinList.size(); j < M;) {
+      InstrItinerary &Intinerary = ItinList[j];
       
       // Emit in the form of { first, last } // index
       if (Intinerary.First == 0) {
@@ -380,8 +352,10 @@
         OS << "  { " << Intinerary.First << ", " << Intinerary.Last << " }";
       }
       
-      if (ILI != E) OS << ",";
-      OS << " // " << Index++ << "\n";
+      // If more in list add comma
+      if (++j < M) OS << ",";
+      
+      OS << " // " << (j - 1) << "\n";
     }
     
     // End processor itinerary table
@@ -393,13 +367,13 @@
 // EmitData - Emits all stages and itineries, folding common patterns.
 //
 void SubtargetEmitter::EmitData(std::ostream &OS) {
-  IntMap ItinClassesMap;
-  ProcessorList ProcList;
+  std::map<std::string, unsigned> ItinClassesMap;
+  std::vector<std::vector<InstrItinerary> > ProcList;
   
   // Enumerate all the itinerary classes
-  unsigned N = CollectAllItinClasses(ItinClassesMap);
+  unsigned NItinClasses = CollectAllItinClasses(ItinClassesMap);
   // Emit the stage data
-  EmitStageData(OS, N, ItinClassesMap, ProcList);
+  EmitStageData(OS, NItinClasses, ItinClassesMap, ProcList);
   // Emit the processor itinerary data
   EmitProcessData(OS, ProcList);
 }
@@ -409,7 +383,8 @@
 // the subtarget features string.
 //
 void SubtargetEmitter::ParseFeaturesFunction(std::ostream &OS) {
-  RecordList Features = Records.getAllDerivedDefinitions("SubtargetFeature");
+  std::vector<Record*> Features =
+                       Records.getAllDerivedDefinitions("SubtargetFeature");
   sort(Features.begin(), Features.end(), LessRecord());
 
   OS << "// ParseSubtargetFeatures - Parses features string setting specified\n" 
@@ -423,8 +398,9 @@
         "  uint32_t Bits =  Features.getBits(SubTypeKV, SubTypeKVSize,\n"
         "                                    FeatureKV, FeatureKVSize);\n";
         
-  RecordListIter FI(Features);
-  while (Record *R = FI.next()) {
+  for (unsigned i = 0; i < Features.size(); i++) {
+    // Next record
+    Record *R = Features[i];
     std::string Instance = R->getName();
     std::string Name = R->getValueAsString("Name");
     std::string Type = R->getValueAsString("Type");





From lattner at cs.uiuc.edu  Fri Oct 28 17:43:37 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 28 Oct 2005 17:43:37 -0500
Subject: [llvm-commits] CVS: llvm/utils/TableGen/DAGISelEmitter.cpp 
Message-ID: <200510282243.RAA10613@zion.cs.uiuc.edu>



Changes in directory llvm/utils/TableGen:

DAGISelEmitter.cpp updated: 1.68 -> 1.69
---
Log message:

Use the new interface Jim added


---
Diffs of the changes:  (+7 -15)

 DAGISelEmitter.cpp |   22 +++++++---------------
 1 files changed, 7 insertions(+), 15 deletions(-)


Index: llvm/utils/TableGen/DAGISelEmitter.cpp
diff -u llvm/utils/TableGen/DAGISelEmitter.cpp:1.68 llvm/utils/TableGen/DAGISelEmitter.cpp:1.69
--- llvm/utils/TableGen/DAGISelEmitter.cpp:1.68	Wed Oct 26 12:02:02 2005
+++ llvm/utils/TableGen/DAGISelEmitter.cpp	Fri Oct 28 17:43:25 2005
@@ -228,16 +228,14 @@
   
   // Parse the properties.
   Properties = 0;
-  ListInit *LI = R->getValueAsListInit("Properties");
-  for (unsigned i = 0, e = LI->getSize(); i != e; ++i) {
-    DefInit *DI = dynamic_cast<DefInit*>(LI->getElement(i));
-    assert(DI && "Properties list must be list of defs!");
-    if (DI->getDef()->getName() == "SDNPCommutative") {
+  std::vector<Record*> PropList = R->getValueAsListDef("Properties");
+  for (unsigned i = 0, e = PropList.size(); i != e; ++i) {
+    if (PropList[i]->getName() == "SDNPCommutative") {
       Properties |= 1 << SDNPCommutative;
-    } else if (DI->getDef()->getName() == "SDNPAssociative") {
+    } else if (PropList[i]->getName() == "SDNPAssociative") {
       Properties |= 1 << SDNPAssociative;
     } else {
-      std::cerr << "Unknown SD Node property '" << DI->getDef()->getName()
+      std::cerr << "Unknown SD Node property '" << PropList[i]->getName()
                 << "' on node '" << R->getName() << "'!\n";
       exit(1);
     }
@@ -245,14 +243,8 @@
   
   
   // Parse the type constraints.
-  ListInit *Constraints = TypeProfile->getValueAsListInit("Constraints");
-  for (unsigned i = 0, e = Constraints->getSize(); i != e; ++i) {
-    assert(dynamic_cast<DefInit*>(Constraints->getElement(i)) &&
-           "Constraints list should contain constraint definitions!");
-    Record *Constraint = 
-      static_cast<DefInit*>(Constraints->getElement(i))->getDef();
-    TypeConstraints.push_back(Constraint);
-  }
+  std::vector<Record*> ConstList =TypeProfile->getValueAsListDef("Constraints");
+  TypeConstraints.assign(ConstList.begin(), ConstList.end());
 }
 
 //===----------------------------------------------------------------------===//





From lattner at cs.uiuc.edu  Fri Oct 28 17:49:14 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 28 Oct 2005 17:49:14 -0500
Subject: [llvm-commits] CVS: llvm/utils/TableGen/CodeGenTarget.cpp
	DAGISelEmitter.cpp Record.cpp Record.h SubtargetEmitter.cpp 
Message-ID: <200510282249.RAA10690@zion.cs.uiuc.edu>



Changes in directory llvm/utils/TableGen:

CodeGenTarget.cpp updated: 1.40 -> 1.41
DAGISelEmitter.cpp updated: 1.69 -> 1.70
Record.cpp updated: 1.46 -> 1.47
Record.h updated: 1.53 -> 1.54
SubtargetEmitter.cpp updated: 1.10 -> 1.11
---
Log message:

Rename Record::getValueAsListDef to getValueAsListOfDefs, to more accurately
reflect what it is.
Convert some more code over to use it.



---
Diffs of the changes:  (+24 -34)

 CodeGenTarget.cpp    |   28 ++++++++--------------------
 DAGISelEmitter.cpp   |    7 ++++---
 Record.cpp           |    6 +++---
 Record.h             |    8 ++++----
 SubtargetEmitter.cpp |    9 +++++----
 5 files changed, 24 insertions(+), 34 deletions(-)


Index: llvm/utils/TableGen/CodeGenTarget.cpp
diff -u llvm/utils/TableGen/CodeGenTarget.cpp:1.40 llvm/utils/TableGen/CodeGenTarget.cpp:1.41
--- llvm/utils/TableGen/CodeGenTarget.cpp:1.40	Thu Oct 13 22:54:49 2005
+++ llvm/utils/TableGen/CodeGenTarget.cpp	Fri Oct 28 17:49:02 2005
@@ -84,15 +84,8 @@
     throw std::string("ERROR: Multiple subclasses of Target defined!");
   TargetRec = Targets[0];
 
-  // Read in all of the CalleeSavedRegisters...
-  ListInit *LI = TargetRec->getValueAsListInit("CalleeSavedRegisters");
-  for (unsigned i = 0, e = LI->getSize(); i != e; ++i)
-    if (DefInit *DI = dynamic_cast<DefInit*>(LI->getElement(i)))
-      CalleeSavedRegisters.push_back(DI->getDef());
-    else
-      throw "Target: " + TargetRec->getName() +
-            " expected register definition in CalleeSavedRegisters list!";
-
+  // Read in all of the CalleeSavedRegisters.
+  CalleeSavedRegisters =TargetRec->getValueAsListOfDefs("CalleeSavedRegisters");
   PointerType = getValueType(TargetRec->getValueAsDef("PointerType"));
 }
 
@@ -108,12 +101,10 @@
 /// getAsmWriter - Return the AssemblyWriter definition for this target.
 ///
 Record *CodeGenTarget::getAsmWriter() const {
-  ListInit *LI = TargetRec->getValueAsListInit("AssemblyWriters");
-  if (AsmWriterNum >= LI->getSize())
+  std::vector<Record*> LI = TargetRec->getValueAsListOfDefs("AssemblyWriters");
+  if (AsmWriterNum >= LI.size())
     throw "Target does not have an AsmWriter #" + utostr(AsmWriterNum) + "!";
-  DefInit *DI = dynamic_cast<DefInit*>(LI->getElement(AsmWriterNum));
-  if (!DI) throw std::string("AssemblyWriter list should be a list of defs!");
-  return DI->getDef();
+  return LI[AsmWriterNum];
 }
 
 void CodeGenTarget::ReadRegisters() const {
@@ -159,12 +150,9 @@
   MethodBodies = R->getValueAsCode("MethodBodies");
   MethodProtos = R->getValueAsCode("MethodProtos");
   
-  ListInit *RegList = R->getValueAsListInit("MemberList");
-  for (unsigned i = 0, e = RegList->getSize(); i != e; ++i) {
-    DefInit *RegDef = dynamic_cast<DefInit*>(RegList->getElement(i));
-    if (!RegDef) throw "Register class member is not a record!";
-    Record *Reg = RegDef->getDef();
-
+  std::vector<Record*> RegList = R->getValueAsListOfDefs("MemberList");
+  for (unsigned i = 0, e = RegList.size(); i != e; ++i) {
+    Record *Reg = RegList[i];
     if (!Reg->isSubClassOf("Register"))
       throw "Register Class member '" + Reg->getName() +
             "' does not derive from the Register class!";


Index: llvm/utils/TableGen/DAGISelEmitter.cpp
diff -u llvm/utils/TableGen/DAGISelEmitter.cpp:1.69 llvm/utils/TableGen/DAGISelEmitter.cpp:1.70
--- llvm/utils/TableGen/DAGISelEmitter.cpp:1.69	Fri Oct 28 17:43:25 2005
+++ llvm/utils/TableGen/DAGISelEmitter.cpp	Fri Oct 28 17:49:02 2005
@@ -228,7 +228,7 @@
   
   // Parse the properties.
   Properties = 0;
-  std::vector<Record*> PropList = R->getValueAsListDef("Properties");
+  std::vector<Record*> PropList = R->getValueAsListOfDefs("Properties");
   for (unsigned i = 0, e = PropList.size(); i != e; ++i) {
     if (PropList[i]->getName() == "SDNPCommutative") {
       Properties |= 1 << SDNPCommutative;
@@ -243,8 +243,9 @@
   
   
   // Parse the type constraints.
-  std::vector<Record*> ConstList =TypeProfile->getValueAsListDef("Constraints");
-  TypeConstraints.assign(ConstList.begin(), ConstList.end());
+  std::vector<Record*> ConstraintList =
+    TypeProfile->getValueAsListOfDefs("Constraints");
+  TypeConstraints.assign(ConstraintList.begin(), ConstraintList.end());
 }
 
 //===----------------------------------------------------------------------===//


Index: llvm/utils/TableGen/Record.cpp
diff -u llvm/utils/TableGen/Record.cpp:1.46 llvm/utils/TableGen/Record.cpp:1.47
--- llvm/utils/TableGen/Record.cpp:1.46	Fri Oct 28 16:46:31 2005
+++ llvm/utils/TableGen/Record.cpp	Fri Oct 28 17:49:02 2005
@@ -709,12 +709,12 @@
         "' does not have a list initializer!";
 }
 
-/// getValueAsListDef - This method looks up the specified field and returns
+/// getValueAsListOfDefs - This method looks up the specified field and returns
 /// its value as a vector of records, throwing an exception if the field does
 /// not exist or if the value is not the right type.
 ///
-std::vector<Record*>  Record::getValueAsListDef(const std::string &FieldName)
-                                                                         const {
+std::vector<Record*> 
+Record::getValueAsListOfDefs(const std::string &FieldName) const {
   ListInit *List = getValueAsListInit(FieldName);
   std::vector<Record*> Defs;
   for (unsigned i = 0; i < List->getSize(); i++) {


Index: llvm/utils/TableGen/Record.h
diff -u llvm/utils/TableGen/Record.h:1.53 llvm/utils/TableGen/Record.h:1.54
--- llvm/utils/TableGen/Record.h:1.53	Fri Oct 28 16:46:31 2005
+++ llvm/utils/TableGen/Record.h	Fri Oct 28 17:49:02 2005
@@ -1000,11 +1000,11 @@
   ///
   ListInit *getValueAsListInit(const std::string &FieldName) const;
 
-  /// getValueAsListDef - This method looks up the specified field and returns
-  /// its value as a vector of records, throwing an exception if the field does
-  /// not exist or if the value is not the right type.
+  /// getValueAsListOfDefs - This method looks up the specified field and
+  /// returnsits value as a vector of records, throwing an exception if the
+  /// field does not exist or if the value is not the right type.
   ///
-  std::vector<Record*> getValueAsListDef(const std::string &FieldName) const;
+  std::vector<Record*> getValueAsListOfDefs(const std::string &FieldName) const;
 
   /// getValueAsDef - This method looks up the specified field and returns its
   /// value as a Record, throwing an exception if the field does not exist or if


Index: llvm/utils/TableGen/SubtargetEmitter.cpp
diff -u llvm/utils/TableGen/SubtargetEmitter.cpp:1.10 llvm/utils/TableGen/SubtargetEmitter.cpp:1.11
--- llvm/utils/TableGen/SubtargetEmitter.cpp:1.10	Fri Oct 28 16:47:29 2005
+++ llvm/utils/TableGen/SubtargetEmitter.cpp	Fri Oct 28 17:49:02 2005
@@ -137,7 +137,8 @@
     Record *Processor = ProcessorList[i];
 
     std::string Name = Processor->getValueAsString("Name");
-    std::vector<Record*> FeatureList = Processor->getValueAsListDef("Features");
+    std::vector<Record*> FeatureList = 
+      Processor->getValueAsListOfDefs("Features");
     
     // Emit as { "cpu", "description", f1 | f2 | ... fn },
     OS << "  { "
@@ -206,7 +207,7 @@
                                            std::string &ItinString,
                                            unsigned &NStages) {
   // Get states list
-  std::vector<Record*> StageList = ItinData->getValueAsListDef("Stages");
+  std::vector<Record*> StageList = ItinData->getValueAsListOfDefs("Stages");
 
   // For each stage
   unsigned N = NStages = StageList.size();
@@ -219,7 +220,7 @@
     ItinString += "  ,{ " + itostr(Cycles) + ", ";
     
     // Get unit list
-    std::vector<Record*> UnitList = Stage->getValueAsListDef("Units");
+    std::vector<Record*> UnitList = Stage->getValueAsListOfDefs("Units");
     
     // For each unit
     for (unsigned j = 0, M = UnitList.size(); j < M;) {
@@ -272,7 +273,7 @@
     ItinList.resize(NItinClasses);
     
     // Get itinerary data list
-    std::vector<Record*> ItinDataList = Proc->getValueAsListDef("IID");
+    std::vector<Record*> ItinDataList = Proc->getValueAsListOfDefs("IID");
     
     // For each itinerary data
     for (unsigned j = 0, M = ItinDataList.size(); j < M; j++) {





From lattner at cs.uiuc.edu  Fri Oct 28 17:58:18 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 28 Oct 2005 17:58:18 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp 
Message-ID: <200510282258.RAA10796@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/PowerPC:

PPCISelDAGToDAG.cpp updated: 1.124 -> 1.125
---
Log message:

Don't emit "32" for unordered comparison


---
Diffs of the changes:  (+4 -2)

 PPCISelDAGToDAG.cpp |    6 ++++--
 1 files changed, 4 insertions(+), 2 deletions(-)


Index: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.124 llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.125
--- llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.124	Fri Oct 28 15:49:47 2005
+++ llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp	Fri Oct 28 17:58:07 2005
@@ -722,11 +722,13 @@
   
   if (!Inv) {
     CurDAG->SelectNodeTo(N, PPC::RLWINM, MVT::i32, IntCR,
-                         getI32Imm(32-(3-Idx)), getI32Imm(31), getI32Imm(31));
+                         getI32Imm((32-(3-Idx)) & 31),
+                                   getI32Imm(31), getI32Imm(31));
   } else {
     SDOperand Tmp =
     CurDAG->getTargetNode(PPC::RLWINM, MVT::i32, IntCR,
-                          getI32Imm(32-(3-Idx)), getI32Imm(31),getI32Imm(31));
+                          getI32Imm((32-(3-Idx)) & 31),
+                          getI32Imm(31),getI32Imm(31));
     CurDAG->SelectNodeTo(N, PPC::XORI, MVT::i32, Tmp, getI32Imm(1));
   }
   





From lattner at cs.uiuc.edu  Fri Oct 28 18:00:04 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 28 Oct 2005 18:00:04 -0500
Subject: [llvm-commits] CVS: llvm/utils/TableGen/InstrInfoEmitter.cpp
	InstrInfoEmitter.h RegisterInfoEmitter.cpp 
Message-ID: <200510282300.SAA10889@zion.cs.uiuc.edu>



Changes in directory llvm/utils/TableGen:

InstrInfoEmitter.cpp updated: 1.28 -> 1.29
InstrInfoEmitter.h updated: 1.10 -> 1.11
RegisterInfoEmitter.cpp updated: 1.36 -> 1.37
---
Log message:

Switch more code over to using getValueAsListOfDefs.  Look at all the -'s. :)


---
Diffs of the changes:  (+25 -41)

 InstrInfoEmitter.cpp    |   45 +++++++++++++++------------------------------
 InstrInfoEmitter.h      |    2 +-
 RegisterInfoEmitter.cpp |   19 +++++++++----------
 3 files changed, 25 insertions(+), 41 deletions(-)


Index: llvm/utils/TableGen/InstrInfoEmitter.cpp
diff -u llvm/utils/TableGen/InstrInfoEmitter.cpp:1.28 llvm/utils/TableGen/InstrInfoEmitter.cpp:1.29
--- llvm/utils/TableGen/InstrInfoEmitter.cpp:1.28	Fri Aug 26 15:42:52 2005
+++ llvm/utils/TableGen/InstrInfoEmitter.cpp	Fri Oct 28 17:59:53 2005
@@ -47,16 +47,6 @@
   OS << "} // End llvm namespace \n";
 }
 
-static std::vector<Record*> GetDefList(ListInit *LI, const std::string &Name) {
-  std::vector<Record*> Result;
-  for (unsigned i = 0, e = LI->getSize(); i != e; ++i)
-    if (DefInit *DI = dynamic_cast<DefInit*>(LI->getElement(i)))
-      Result.push_back(DI->getDef());
-    else
-      throw "Illegal value in '" + Name + "' list!";
-  return Result;
-}
-
 void InstrInfoEmitter::printDefList(const std::vector<Record*> &Uses,
                                     unsigned Num, std::ostream &OS) const {
   OS << "static const unsigned ImplicitList" << Num << "[] = { ";
@@ -99,26 +89,21 @@
 
   // Keep track of all of the def lists we have emitted already.
   std::map<std::vector<Record*>, unsigned> EmittedLists;
-  std::map<ListInit*, unsigned> ListNumbers;
   unsigned ListNumber = 0;
  
   // Emit all of the instruction's implicit uses and defs.
   for (CodeGenTarget::inst_iterator II = Target.inst_begin(),
          E = Target.inst_end(); II != E; ++II) {
     Record *Inst = II->second.TheDef;
-    ListInit *LI = Inst->getValueAsListInit("Uses");
-    if (LI->getSize()) {
-      std::vector<Record*> Uses = GetDefList(LI, Inst->getName());
+    std::vector<Record*> Uses = Inst->getValueAsListOfDefs("Uses");
+    if (!Uses.empty()) {
       unsigned &IL = EmittedLists[Uses];
       if (!IL) printDefList(Uses, IL = ++ListNumber, OS);
-      ListNumbers[LI] = IL;
     }
-    LI = Inst->getValueAsListInit("Defs");
-    if (LI->getSize()) {
-      std::vector<Record*> Uses = GetDefList(LI, Inst->getName());
-      unsigned &IL = EmittedLists[Uses];
-      if (!IL) printDefList(Uses, IL = ++ListNumber, OS);
-      ListNumbers[LI] = IL;
+    std::vector<Record*> Defs = Inst->getValueAsListOfDefs("Defs");
+    if (!Defs.empty()) {
+      unsigned &IL = EmittedLists[Defs];
+      if (!IL) printDefList(Defs, IL = ++ListNumber, OS);
     }
   }
 
@@ -150,14 +135,14 @@
   //
   OS << "\nstatic const TargetInstrDescriptor " << TargetName
      << "Insts[] = {\n";
-  emitRecord(Target.getPHIInstruction(), 0, InstrInfo, ListNumbers,
+  emitRecord(Target.getPHIInstruction(), 0, InstrInfo, EmittedLists,
              OperandInfosEmitted, OS);
 
   unsigned i = 0;
   for (CodeGenTarget::inst_iterator II = Target.inst_begin(),
          E = Target.inst_end(); II != E; ++II)
     if (II->second.TheDef != PHI)
-      emitRecord(II->second, ++i, InstrInfo, ListNumbers,
+      emitRecord(II->second, ++i, InstrInfo, EmittedLists,
                  OperandInfosEmitted, OS);
   OS << "};\n";
   OS << "} // End llvm namespace \n";
@@ -165,7 +150,7 @@
 
 void InstrInfoEmitter::emitRecord(const CodeGenInstruction &Inst, unsigned Num,
                                   Record *InstrInfo,
-                                  std::map<ListInit*, unsigned> &ListNumbers,
+                         std::map<std::vector<Record*>, unsigned> &EmittedLists,
                                std::map<std::vector<Record*>, unsigned> &OpInfo,
                                   std::ostream &OS) {
   int NumOperands;
@@ -215,17 +200,17 @@
   OS << ", ";
 
   // Emit the implicit uses and defs lists...
-  LI = Inst.TheDef->getValueAsListInit("Uses");
-  if (!LI->getSize())
+  std::vector<Record*> UseList = Inst.TheDef->getValueAsListOfDefs("Uses");
+  if (UseList.empty())
     OS << "EmptyImpList, ";
   else
-    OS << "ImplicitList" << ListNumbers[LI] << ", ";
+    OS << "ImplicitList" << EmittedLists[UseList] << ", ";
 
-  LI = Inst.TheDef->getValueAsListInit("Defs");
-  if (!LI->getSize())
+  std::vector<Record*> DefList = Inst.TheDef->getValueAsListOfDefs("Defs");
+  if (DefList.empty())
     OS << "EmptyImpList, ";
   else
-    OS << "ImplicitList" << ListNumbers[LI] << ", ";
+    OS << "ImplicitList" << EmittedLists[DefList] << ", ";
 
   // Emit the operand info.
   std::vector<Record*> OperandInfo = GetOperandInfo(Inst);


Index: llvm/utils/TableGen/InstrInfoEmitter.h
diff -u llvm/utils/TableGen/InstrInfoEmitter.h:1.10 llvm/utils/TableGen/InstrInfoEmitter.h:1.11
--- llvm/utils/TableGen/InstrInfoEmitter.h:1.10	Fri Aug 19 13:46:26 2005
+++ llvm/utils/TableGen/InstrInfoEmitter.h	Fri Oct 28 17:59:53 2005
@@ -41,7 +41,7 @@
                     std::ostream &OS) const;
   void emitRecord(const CodeGenInstruction &Inst, unsigned Num,
                   Record *InstrInfo, 
-                  std::map<ListInit*, unsigned> &ListNumbers,
+                  std::map<std::vector<Record*>, unsigned> &EL,
                   std::map<std::vector<Record*>, unsigned> &OpInfo,
                   std::ostream &OS);
   void emitShiftedValue(Record *R, StringInit *Val, IntInit *Shift,


Index: llvm/utils/TableGen/RegisterInfoEmitter.cpp
diff -u llvm/utils/TableGen/RegisterInfoEmitter.cpp:1.36 llvm/utils/TableGen/RegisterInfoEmitter.cpp:1.37
--- llvm/utils/TableGen/RegisterInfoEmitter.cpp:1.36	Sun Oct  2 01:23:37 2005
+++ llvm/utils/TableGen/RegisterInfoEmitter.cpp	Fri Oct 28 17:59:53 2005
@@ -163,23 +163,22 @@
 
   for (unsigned i = 0, e = Regs.size(); i != e; ++i) {
     Record *R = Regs[i].TheDef;
-    ListInit *LI = Regs[i].TheDef->getValueAsListInit("Aliases");
+    std::vector<Record*> LI = Regs[i].TheDef->getValueAsListOfDefs("Aliases");
     // Add information that R aliases all of the elements in the list... and
     // that everything in the list aliases R.
-    for (unsigned j = 0, e = LI->getSize(); j != e; ++j) {
-      DefInit *Reg = dynamic_cast<DefInit*>(LI->getElement(j));
-      if (!Reg) throw "ERROR: Alias list element is not a def!";
-      if (RegisterAliases[R].count(Reg->getDef()))
+    for (unsigned j = 0, e = LI.size(); j != e; ++j) {
+      Record *Reg = LI[j];
+      if (RegisterAliases[R].count(Reg))
         std::cerr << "Warning: register alias between " << getQualifiedName(R)
-                  << " and " << getQualifiedName(Reg->getDef())
+                  << " and " << getQualifiedName(Reg)
                   << " specified multiple times!\n";
-      RegisterAliases[R].insert(Reg->getDef());
+      RegisterAliases[R].insert(Reg);
 
-      if (RegisterAliases[Reg->getDef()].count(R))
+      if (RegisterAliases[Reg].count(R))
         std::cerr << "Warning: register alias between " << getQualifiedName(R)
-                  << " and " << getQualifiedName(Reg->getDef())
+                  << " and " << getQualifiedName(Reg)
                   << " specified multiple times!\n";
-      RegisterAliases[Reg->getDef()].insert(R);
+      RegisterAliases[Reg].insert(R);
     }
   }
 





From natebegeman at mac.com  Fri Oct 28 18:27:08 2005
From: natebegeman at mac.com (Nate Begeman)
Date: Fri, 28 Oct 2005 18:27:08 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/README.txt 
Message-ID: <200510282327.SAA10983@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/PowerPC:

README.txt updated: 1.35 -> 1.36
---
Log message:

New case to handle someday


---
Diffs of the changes:  (+17 -0)

 README.txt |   17 +++++++++++++++++
 1 files changed, 17 insertions(+)


Index: llvm/lib/Target/PowerPC/README.txt
diff -u llvm/lib/Target/PowerPC/README.txt:1.35 llvm/lib/Target/PowerPC/README.txt:1.36
--- llvm/lib/Target/PowerPC/README.txt:1.35	Thu Oct 27 19:20:45 2005
+++ llvm/lib/Target/PowerPC/README.txt	Fri Oct 28 18:26:57 2005
@@ -217,5 +217,22 @@
         stw r2, 0(r3)
         blr
 
+===-------------------------------------------------------------------------===
 
+Compile
+int foo(int a) { return a * -2 + 63; }
+
+to
+
+_foo:
+        slwi r0,r3,1
+        subfic r3,r0,63
+        blr
+
+instead of:
+
+_foo:
+        mulli r2,r3,-2
+        addi r3,r2,63
+        blr
 





From lattner at cs.uiuc.edu  Fri Oct 28 22:20:05 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 28 Oct 2005 22:20:05 -0500
Subject: [llvm-commits] 
	CVS: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
Message-ID: <200510290320.WAA11939@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Transforms/Scalar:

InstructionCombining.cpp updated: 1.399 -> 1.400
---
Log message:

Remove a special case, allowing the general case to handle it.  No functionality
change.


---
Diffs of the changes:  (+37 -49)

 InstructionCombining.cpp |   86 ++++++++++++++++++++---------------------------
 1 files changed, 37 insertions(+), 49 deletions(-)


Index: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
diff -u llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.399 llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.400
--- llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.399	Fri Oct 28 11:27:35 2005
+++ llvm/lib/Transforms/Scalar/InstructionCombining.cpp	Fri Oct 28 22:19:53 2005
@@ -3814,59 +3814,47 @@
   uint64_t CastElTySize = TD->getTypeSize(CastElTy);
   if (CastElTySize == 0 || AllocElTySize == 0) return 0;
 
-  // If the allocation is for an even multiple of the cast type size
+  // See if we can satisfy the modulus by pulling a scale out of the array
+  // size argument.
+  unsigned ArraySizeScale = 1;
+  Value *NumElements = AI.getOperand(0);
+  
+  if (ConstantUInt *CI = dyn_cast<ConstantUInt>(NumElements)) {
+    ArraySizeScale = CI->getValue();
+    NumElements = ConstantUInt::get(Type::UIntTy, 1);
+  } else if (ShiftInst *SI = dyn_cast<ShiftInst>(NumElements)) {
+    if (SI->getOpcode() == Instruction::Shl)
+      if (ConstantUInt *CUI = dyn_cast<ConstantUInt>(SI->getOperand(1))) {
+        // This is a value scaled by '1 << the shift amt'.
+        NumElements = SI->getOperand(0);
+        ArraySizeScale = 1U << CUI->getValue();
+      }
+  } else if (isa<Instruction>(NumElements) &&
+             cast<Instruction>(NumElements)->getOpcode() == Instruction::Mul){
+    BinaryOperator *BO = cast<BinaryOperator>(NumElements);
+    if (ConstantUInt *Scale = dyn_cast<ConstantUInt>(BO->getOperand(1))) {
+      // This value is scaled by 'Scale'.
+      NumElements = BO->getOperand(0);
+      ArraySizeScale = Scale->getValue();
+    }
+  }
+  
+  // If we can now satisfy the modulus, by using a non-1 scale, we really can
+  // do the xform.
+  if ((AllocElTySize*ArraySizeScale) % CastElTySize != 0) return 0;
+
+  unsigned Scale = (AllocElTySize*ArraySizeScale)/CastElTySize;
   Value *Amt = 0;
-  if (AllocElTySize % CastElTySize == 0) {
-    Amt = ConstantUInt::get(Type::UIntTy, AllocElTySize/CastElTySize);
-    if (ConstantUInt *CI = dyn_cast<ConstantUInt>(AI.getOperand(0)))
+  if (Scale == 1) {
+    Amt = NumElements;
+  } else {
+    Amt = ConstantUInt::get(Type::UIntTy, Scale);
+    if (ConstantUInt *CI = dyn_cast<ConstantUInt>(NumElements))
       Amt = ConstantExpr::getMul(CI, cast<ConstantUInt>(Amt));
-    else {
-      // Perform an explicit scale.
-      Instruction *Tmp = BinaryOperator::createMul(Amt, AI.getOperand(0),"tmp");
+    else if (Scale != 1) {
+      Instruction *Tmp = BinaryOperator::createMul(Amt, NumElements, "tmp");
       Amt = InsertNewInstBefore(Tmp, AI);
     }
-  } else {
-    // See if we can satisfy the modulus by pulling a scale out of the array
-    // size argument.
-    unsigned ArraySizeScale = 1;
-    Value *NumElements = AI.getOperand(0);
-    
-    if (ConstantUInt *CI = dyn_cast<ConstantUInt>(NumElements)) {
-      ArraySizeScale = CI->getValue();
-      NumElements = ConstantUInt::get(Type::UIntTy, 1);
-    } else if (ShiftInst *SI = dyn_cast<ShiftInst>(NumElements)) {
-      if (SI->getOpcode() == Instruction::Shl)
-        if (ConstantUInt *CUI = dyn_cast<ConstantUInt>(SI->getOperand(1))) {
-          // This is a value scaled by '1 << the shift amt'.
-          NumElements = SI->getOperand(0);
-          ArraySizeScale = 1U << CUI->getValue();
-        }
-    } else if (isa<Instruction>(NumElements) &&
-               cast<Instruction>(NumElements)->getOpcode() == Instruction::Mul){
-      BinaryOperator *BO = cast<BinaryOperator>(NumElements);
-      if (ConstantUInt *Scale = dyn_cast<ConstantUInt>(BO->getOperand(1))) {
-        // This value is scaled by 'Scale'.
-        NumElements = BO->getOperand(0);
-        ArraySizeScale = Scale->getValue();
-      }
-    }
-    
-    // If we can now satisfy the modulus, by using a non-1 scale, we really can
-    // do the xform.
-    if ((AllocElTySize*ArraySizeScale) % CastElTySize != 0) return 0;
-
-    unsigned Scale = (AllocElTySize*ArraySizeScale)/CastElTySize;
-    if (Scale == 1) {
-      Amt = NumElements;
-    } else {
-      Amt = ConstantUInt::get(Type::UIntTy, Scale);
-      if (ConstantUInt *CI = dyn_cast<ConstantUInt>(NumElements))
-        Amt = ConstantExpr::getMul(CI, cast<ConstantUInt>(Amt));
-      else if (Scale != 1) {
-        Instruction *Tmp = BinaryOperator::createMul(Amt, NumElements, "tmp");
-        Amt = InsertNewInstBefore(Tmp, AI);
-      }
-    }
   }
   
   std::string Name = AI.getName(); AI.setName("");





From duraid at octopus.com.au  Fri Oct 28 23:07:01 2005
From: duraid at octopus.com.au (Duraid Madina)
Date: Fri, 28 Oct 2005 23:07:01 -0500
Subject: [llvm-commits] 
	CVS: llvm/test/Regression/CodeGen/IA64/2005-10-29-shladd.ll
Message-ID: <200510290407.XAA12245@zion.cs.uiuc.edu>



Changes in directory llvm/test/Regression/CodeGen/IA64:

2005-10-29-shladd.ll added (r1.1)
---
Log message:


test for the formation of shladd




---
Diffs of the changes:  (+11 -0)

 2005-10-29-shladd.ll |   11 +++++++++++
 1 files changed, 11 insertions(+)


Index: llvm/test/Regression/CodeGen/IA64/2005-10-29-shladd.ll
diff -c /dev/null llvm/test/Regression/CodeGen/IA64/2005-10-29-shladd.ll:1.1
*** /dev/null	Fri Oct 28 23:07:00 2005
--- llvm/test/Regression/CodeGen/IA64/2005-10-29-shladd.ll	Fri Oct 28 23:06:50 2005
***************
*** 0 ****
--- 1,11 ----
+ ; this should turn into shladd 
+ ; RUN: llvm-as < %s | llc -march=ia64 | grep 'shladd'
+ 
+ implementation   ; Functions:
+ 
+ long %bogglesmoggle(long %X, long %Y) {
+ 	%A = shl long %X, ubyte 3
+ 	%B = add long %A, %Y 
+         ret long %B
+ }
+ 





From duraid at octopus.com.au  Fri Oct 28 23:13:51 2005
From: duraid at octopus.com.au (Duraid Madina)
Date: Fri, 28 Oct 2005 23:13:51 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/IA64/IA64InstrInfo.td 
Message-ID: <200510290413.XAA12270@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/IA64:

IA64InstrInfo.td updated: 1.16 -> 1.17
---
Log message:

add shladd



---
Diffs of the changes:  (+42 -42)

 IA64InstrInfo.td |   84 +++++++++++++++++++++++++++----------------------------
 1 files changed, 42 insertions(+), 42 deletions(-)


Index: llvm/lib/Target/IA64/IA64InstrInfo.td
diff -u llvm/lib/Target/IA64/IA64InstrInfo.td:1.16 llvm/lib/Target/IA64/IA64InstrInfo.td:1.17
--- llvm/lib/Target/IA64/IA64InstrInfo.td:1.16	Fri Oct 28 12:46:36 2005
+++ llvm/lib/Target/IA64/IA64InstrInfo.td	Fri Oct 28 23:13:40 2005
@@ -15,6 +15,7 @@
 
 include "IA64InstrFormats.td"
 
+def u2imm : Operand<i8>;
 def u6imm : Operand<i8>;
 def s8imm : Operand<i8> {
   let PrintMethod = "printS8ImmOperand";
@@ -41,6 +42,21 @@
   
 /* new daggy action!!! */
 
+def is32ones : PatLeaf<(i64 imm), [{
+  // is32ones predicate - True if the immediate is 0x00000000FFFFFFFF 
+  // Used to create ZXT4s appropriately 
+  int64_t v = (int64_t)N->getValue();
+  return (v == 0x00000000FFFFFFFFLL);
+}]>;
+
+def isSHLADDimm: PatLeaf<(i64 imm), [{
+  // isSHLADDimm predicate - True if the immediate is exactly 1, 2, 3 or 4
+  // - 0 is *not* okay.
+  // Used to create shladd instructions appropriately
+  int64_t v = (int64_t)N->getValue();
+  return (v >= 1 && v <= 4);
+}]>;
+
 def immSExt14  : PatLeaf<(i64 imm), [{
   // immSExt14 predicate - True if the immediate fits in a 14-bit sign extended
   // field.  Used by instructions like 'adds'.
@@ -54,6 +70,19 @@
   return true;
 }]>;
 
+def SXT1 : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src), "sxt1 $dst = $src;;",
+           [(set GR:$dst, (sext_inreg GR:$src, i8))]>;
+def ZXT1 : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src), "zxt1 $dst = $src;;",
+           [(set GR:$dst, (and GR:$src, 255))]>;
+def SXT2 : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src), "sxt2 $dst = $src;;",
+           [(set GR:$dst, (sext_inreg GR:$src, i16))]>;
+def ZXT2 : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src), "zxt2 $dst = $src;;",
+           [(set GR:$dst, (and GR:$src, 65535))]>;
+def SXT4 : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src), "sxt4 $dst = $src;;",
+           [(set GR:$dst, (sext_inreg GR:$src, i32))]>;
+def ZXT4 : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src), "zxt4 $dst = $src;;",
+           [(set GR:$dst, (and GR:$src, is32ones))]>;
+
 def ADD  : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2),
            "add $dst = $src1, $src2;;",
 	   [(set GR:$dst, (add GR:$src1, GR:$src2))]>;
@@ -107,6 +136,7 @@
 // load constants of various sizes // FIXME: prettyprint -ve constants
 def : Pat<(i64 immSExt14:$imm), (ADDS r0, immSExt14:$imm)>;
 def : Pat<(i64 imm64:$imm), (MOVL imm64:$imm)>;
+// TODO: def : Pat<(i1 1), (MOV p0)>;
 
 def AND   : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2),
           "and $dst = $src1, $src2;;",
@@ -159,10 +189,22 @@
           "xor $dst = $src1, $src2;;",
 	  [(set GR:$dst, (xor GR:$src1, GR:$src2))]>;
 
+def SHLADD: AForm_DAG<0x03, 0x0b, (ops GR:$dst,GR:$src1,s64imm:$imm,GR:$src2),
+          "shladd $dst = $src1, $imm, $src2;;",
+          [(set GR:$dst, (add GR:$src2, (shl GR:$src1, isSHLADDimm:$imm)))]>;
+
 def SHL   : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2),
           "shl $dst = $src1, $src2;;",
 	  [(set GR:$dst, (shl GR:$src1, GR:$src2))]>;
 
+def SHRU  : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2),
+          "shr.u $dst = $src1, $src2;;",
+	  [(set GR:$dst, (srl GR:$src1, GR:$src2))]>;
+
+def SHRS  : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2),
+          "shr $dst = $src1, $src2;;",
+	  [(set GR:$dst, (sra GR:$src1, GR:$src2))]>;
+
 /*
 def CMPEQ : AForm<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2),
   "cmp.eq $dst, p0 = $src1, $src2;;">;
@@ -219,22 +261,6 @@
           "cmp.eq $dst, p0 = $src1, $src2;;",
 	  [(set PR:$dst, (setuge GR:$src1, GR:$src2))]>;
 
-// FIXME: tabelgen doesn't know that zxt1 is cheaper on ia64 than "andi", 
-// need to fix this one day 
-
-def SXT1 : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src), "sxt1 $dst = $src;;",
-           [(set GR:$dst, (sext_inreg GR:$src, i8))]>;
-def ZXT1 : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src), "zxt1 $dst = $src;;",
-           [(set GR:$dst, (and GR:$src, 255))]>;
-def SXT2 : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src), "sxt2 $dst = $src;;",
-           [(set GR:$dst, (sext_inreg GR:$src, i16))]>;
-def ZXT2 : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src), "zxt2 $dst = $src;;",
-           [(set GR:$dst, (and GR:$src, 65535))]>;
-def SXT4 : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src), "sxt4 $dst = $src;;",
-           [(set GR:$dst, (sext_inreg GR:$src, i32))]>;
-def ZXT4 : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src), "zxt4 $dst = $src;;",
-           [(set GR:$dst, (and GR:$src, 1341835918))]>; // hehhehe NO - FIXME
-
 // TODO: support postincrement (reg, imm9) loads+stores - this needs more
 // tablegen support
 
@@ -298,44 +324,18 @@
 def MOVLIMM64 : AForm<0x03, 0x0b, (ops GR:$dst, s64imm:$imm),
   "movl $dst = $imm;;">;
 
-/*
-def AND : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2),
-  "and $dst = $src1, $src2;;">;
-def OR : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2),
-  "or $dst = $src1, $src2;;">;
-def XOR : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2),
-  "xor $dst = $src1, $src2;;">;
-def SHL : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2),
-  "shl $dst = $src1, $src2;;">;
-*/
 def SHLI : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src1, u6imm:$imm), 
   "shl $dst = $src1, $imm;;">;
-def SHRU : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2),
-  "shr.u $dst = $src1, $src2;;">;
 def SHRUI : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src1, u6imm:$imm),
   "shr.u $dst = $src1, $imm;;">;
-def SHRS : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2),
-  "shr $dst = $src1, $src2;;">;
 def SHRSI : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src1, u6imm:$imm),
   "shr $dst = $src1, $imm;;">;
 
-def SHLADD : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src1, u6imm:$imm, GR:$src2), 
-  "shladd $dst = $src1, $imm, $src2;;">;
-
 def EXTRU : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src1, u6imm:$imm1, u6imm:$imm2),
   "extr.u $dst = $src1, $imm1, $imm2;;">;
 
 def DEPZ : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src1, u6imm:$imm1, u6imm:$imm2),	  "dep.z $dst = $src1, $imm1, $imm2;;">;
 
-/*
-def SXT1 : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src), "sxt1 $dst = $src;;">;
-def ZXT1 : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src), "zxt1 $dst = $src;;">;
-def SXT2 : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src), "sxt2 $dst = $src;;">;
-def ZXT2 : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src), "zxt2 $dst = $src;;">;
-def SXT4 : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src), "sxt4 $dst = $src;;">;
-def ZXT4 : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src), "zxt4 $dst = $src;;">;
-*/
-
 // and we do the whole thing again for FP compares!
 def FCMPEQ : AForm<0x03, 0x0b, (ops PR:$dst, FP:$src1, FP:$src2),
   "fcmp.eq $dst, p0 = $src1, $src2;;">;





From lattner at cs.uiuc.edu  Fri Oct 28 23:36:26 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 28 Oct 2005 23:36:26 -0500
Subject: [llvm-commits] 
	CVS: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
Message-ID: <200510290436.XAA12401@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Transforms/Scalar:

InstructionCombining.cpp updated: 1.400 -> 1.401
---
Log message:

Pull some code out into a function, give it the ability to see through +.
This allows us to turn code like malloc(4*x+4) -> malloc int, (x+1)


---
Diffs of the changes:  (+59 -24)

 InstructionCombining.cpp |   83 +++++++++++++++++++++++++++++++++--------------
 1 files changed, 59 insertions(+), 24 deletions(-)


Index: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
diff -u llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.400 llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.401
--- llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.400	Fri Oct 28 22:19:53 2005
+++ llvm/lib/Transforms/Scalar/InstructionCombining.cpp	Fri Oct 28 23:36:15 2005
@@ -3770,6 +3770,53 @@
   return CI;
 }
 
+/// DecomposeSimpleLinearExpr - Analyze 'Val', seeing if it is a simple linear
+/// expression.  If so, decompose it, returning some value X, such that Val is
+/// X*Scale+Offset.
+///
+static Value *DecomposeSimpleLinearExpr(Value *Val, unsigned &Scale,
+                                        unsigned &Offset) {
+  assert(Val->getType() == Type::UIntTy && "Unexpected allocation size type!");
+  if (ConstantUInt *CI = dyn_cast<ConstantUInt>(Val)) {
+    Offset = CI->getValue();
+    Scale  = 1;
+    return ConstantUInt::get(Type::UIntTy, 0);
+  } else if (Instruction *I = dyn_cast<Instruction>(Val)) {
+    if (I->getNumOperands() == 2) {
+      if (ConstantUInt *CUI = dyn_cast<ConstantUInt>(I->getOperand(1))) {
+        if (I->getOpcode() == Instruction::Shl) {
+          // This is a value scaled by '1 << the shift amt'.
+          Scale = 1U << CUI->getValue();
+          Offset = 0;
+          return I->getOperand(0);
+        } else if (I->getOpcode() == Instruction::Mul) {
+          // This value is scaled by 'CUI'.
+          Scale = CUI->getValue();
+          Offset = 0;
+          return I->getOperand(0);
+        } else if (I->getOpcode() == Instruction::Add) {
+          // We have X+C.  Check to see if we really have (X*C2)+C1, where C1 is
+          // divisible by C2.
+          unsigned SubScale;
+          Value *SubVal = DecomposeSimpleLinearExpr(I->getOperand(0), SubScale,
+                                                    Offset);
+          Offset += CUI->getValue();
+          if (SubScale > 1 && (Offset % SubScale == 0)) {
+            Scale = SubScale;
+            return SubVal;
+          }
+        }
+      }
+    }
+  }
+
+  // Otherwise, we can't look past this.
+  Scale = 1;
+  Offset = 0;
+  return Val;
+}
+
+
 /// PromoteCastOfAllocation - If we find a cast of an allocation instruction,
 /// try to eliminate the cast by moving the type information into the alloc.
 Instruction *InstCombiner::PromoteCastOfAllocation(CastInst &CI,
@@ -3816,32 +3863,14 @@
 
   // See if we can satisfy the modulus by pulling a scale out of the array
   // size argument.
-  unsigned ArraySizeScale = 1;
-  Value *NumElements = AI.getOperand(0);
-  
-  if (ConstantUInt *CI = dyn_cast<ConstantUInt>(NumElements)) {
-    ArraySizeScale = CI->getValue();
-    NumElements = ConstantUInt::get(Type::UIntTy, 1);
-  } else if (ShiftInst *SI = dyn_cast<ShiftInst>(NumElements)) {
-    if (SI->getOpcode() == Instruction::Shl)
-      if (ConstantUInt *CUI = dyn_cast<ConstantUInt>(SI->getOperand(1))) {
-        // This is a value scaled by '1 << the shift amt'.
-        NumElements = SI->getOperand(0);
-        ArraySizeScale = 1U << CUI->getValue();
-      }
-  } else if (isa<Instruction>(NumElements) &&
-             cast<Instruction>(NumElements)->getOpcode() == Instruction::Mul){
-    BinaryOperator *BO = cast<BinaryOperator>(NumElements);
-    if (ConstantUInt *Scale = dyn_cast<ConstantUInt>(BO->getOperand(1))) {
-      // This value is scaled by 'Scale'.
-      NumElements = BO->getOperand(0);
-      ArraySizeScale = Scale->getValue();
-    }
-  }
-  
+  unsigned ArraySizeScale, ArrayOffset;
+  Value *NumElements = // See if the array size is a decomposable linear expr.
+    DecomposeSimpleLinearExpr(AI.getOperand(0), ArraySizeScale, ArrayOffset);
+ 
   // If we can now satisfy the modulus, by using a non-1 scale, we really can
   // do the xform.
-  if ((AllocElTySize*ArraySizeScale) % CastElTySize != 0) return 0;
+  if ((AllocElTySize*ArraySizeScale) % CastElTySize != 0 ||
+      (AllocElTySize*ArrayOffset   ) % CastElTySize != 0) return 0;
 
   unsigned Scale = (AllocElTySize*ArraySizeScale)/CastElTySize;
   Value *Amt = 0;
@@ -3857,6 +3886,12 @@
     }
   }
   
+  if (unsigned Offset = (AllocElTySize*ArrayOffset)/CastElTySize) {
+    Value *Off = ConstantUInt::get(Type::UIntTy, Offset);
+    Instruction *Tmp = BinaryOperator::createAdd(Amt, Off, "tmp");
+    Amt = InsertNewInstBefore(Tmp, AI);
+  }
+  
   std::string Name = AI.getName(); AI.setName("");
   AllocationInst *New;
   if (isa<MallocInst>(AI))





From lattner at cs.uiuc.edu  Fri Oct 28 23:40:34 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 28 Oct 2005 23:40:34 -0500
Subject: [llvm-commits] CVS: llvm/lib/Transforms/ExprTypeConvert.cpp 
Message-ID: <200510290440.XAA12495@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Transforms:

ExprTypeConvert.cpp updated: 1.107 -> 1.108
---
Log message:

Now that instcombine does this xform, remove it from the -raise pass


---
Diffs of the changes:  (+0 -120)

 ExprTypeConvert.cpp |  120 ----------------------------------------------------
 1 files changed, 120 deletions(-)


Index: llvm/lib/Transforms/ExprTypeConvert.cpp
diff -u llvm/lib/Transforms/ExprTypeConvert.cpp:1.107 llvm/lib/Transforms/ExprTypeConvert.cpp:1.108
--- llvm/lib/Transforms/ExprTypeConvert.cpp:1.107	Tue Jul 26 11:38:28 2005
+++ llvm/lib/Transforms/ExprTypeConvert.cpp	Fri Oct 28 23:40:23 2005
@@ -16,7 +16,6 @@
 #include "TransformInternals.h"
 #include "llvm/Constants.h"
 #include "llvm/Instructions.h"
-#include "llvm/Analysis/Expressions.h"
 #include "llvm/ADT/STLExtras.h"
 #include "llvm/Support/Debug.h"
 #include <algorithm>
@@ -29,115 +28,6 @@
 static void ConvertOperandToType(User *U, Value *OldVal, Value *NewVal,
                                  ValueMapCache &VMC, const TargetData &TD);
 
-// Peephole Malloc instructions: we take a look at the use chain of the
-// malloc instruction, and try to find out if the following conditions hold:
-//   1. The malloc is of the form: 'malloc [sbyte], uint <constant>'
-//   2. The only users of the malloc are cast & add instructions
-//   3. Of the cast instructions, there is only one destination pointer type
-//      [RTy] where the size of the pointed to object is equal to the number
-//      of bytes allocated.
-//
-// If these conditions hold, we convert the malloc to allocate an [RTy]
-// element.  TODO: This comment is out of date WRT arrays
-//
-static bool MallocConvertibleToType(MallocInst *MI, const Type *Ty,
-                                    ValueTypeCache &CTMap,
-                                    const TargetData &TD) {
-  if (!isa<PointerType>(Ty)) return false;   // Malloc always returns pointers
-
-  // Deal with the type to allocate, not the pointer type...
-  Ty = cast<PointerType>(Ty)->getElementType();
-  if (!Ty->isSized() || !MI->getType()->getElementType()->isSized())
-    return false;      // Can only alloc something with a size
-
-  // Analyze the number of bytes allocated...
-  ExprType Expr = ClassifyExpr(MI->getArraySize());
-
-  // Get information about the base datatype being allocated, before & after
-  uint64_t ReqTypeSize = TD.getTypeSize(Ty);
-  if (ReqTypeSize == 0) return false;
-  uint64_t OldTypeSize = TD.getTypeSize(MI->getType()->getElementType());
-
-  // Must have a scale or offset to analyze it...
-  if (!Expr.Offset && !Expr.Scale && OldTypeSize == 1) return false;
-
-  // Get the offset and scale of the allocation...
-  int64_t OffsetVal = Expr.Offset ? getConstantValue(Expr.Offset) : 0;
-  int64_t ScaleVal = Expr.Scale ? getConstantValue(Expr.Scale) :(Expr.Var != 0);
-
-  // The old type might not be of unit size, take old size into consideration
-  // here...
-  uint64_t Offset = OffsetVal * OldTypeSize;
-  uint64_t Scale  = ScaleVal  * OldTypeSize;
-
-  // In order to be successful, both the scale and the offset must be a multiple
-  // of the requested data type's size.
-  //
-  if (Offset/ReqTypeSize*ReqTypeSize != Offset ||
-      Scale/ReqTypeSize*ReqTypeSize != Scale)
-    return false;   // Nope.
-
-  return true;
-}
-
-static Instruction *ConvertMallocToType(MallocInst *MI, const Type *Ty,
-                                        const std::string &Name,
-                                        ValueMapCache &VMC,
-                                        const TargetData &TD){
-  BasicBlock *BB = MI->getParent();
-  BasicBlock::iterator It = BB->end();
-
-  // Analyze the number of bytes allocated...
-  ExprType Expr = ClassifyExpr(MI->getArraySize());
-
-  const PointerType *AllocTy = cast<PointerType>(Ty);
-  const Type *ElType = AllocTy->getElementType();
-
-  uint64_t DataSize = TD.getTypeSize(ElType);
-  uint64_t OldTypeSize = TD.getTypeSize(MI->getType()->getElementType());
-
-  // Get the offset and scale coefficients that we are allocating...
-  int64_t OffsetVal = (Expr.Offset ? getConstantValue(Expr.Offset) : 0);
-  int64_t ScaleVal = Expr.Scale ? getConstantValue(Expr.Scale) : (Expr.Var !=0);
-
-  // The old type might not be of unit size, take old size into consideration
-  // here...
-  unsigned Offset = OffsetVal * OldTypeSize / DataSize;
-  unsigned Scale  = ScaleVal  * OldTypeSize / DataSize;
-
-  // Locate the malloc instruction, because we may be inserting instructions
-  It = MI;
-
-  // If we have a scale, apply it first...
-  if (Expr.Var) {
-    // Expr.Var is not necessarily unsigned right now, insert a cast now.
-    if (Expr.Var->getType() != Type::UIntTy)
-      Expr.Var = new CastInst(Expr.Var, Type::UIntTy,
-                              Expr.Var->getName()+"-uint", It);
-
-    if (Scale != 1)
-      Expr.Var = BinaryOperator::create(Instruction::Mul, Expr.Var,
-                                        ConstantUInt::get(Type::UIntTy, Scale),
-                                        Expr.Var->getName()+"-scl", It);
-
-  } else {
-    // If we are not scaling anything, just make the offset be the "var"...
-    Expr.Var = ConstantUInt::get(Type::UIntTy, Offset);
-    Offset = 0; Scale = 1;
-  }
-
-  // If we have an offset now, add it in...
-  if (Offset != 0) {
-    assert(Expr.Var && "Var must be nonnull by now!");
-    Expr.Var = BinaryOperator::create(Instruction::Add, Expr.Var,
-                                      ConstantUInt::get(Type::UIntTy, Offset),
-                                      Expr.Var->getName()+"-off", It);
-  }
-
-  assert(AllocTy == Ty);
-  return new MallocInst(AllocTy->getElementType(), Expr.Var, Name);
-}
-
 
 // ExpressionConvertibleToType - Return true if it is possible
 bool llvm::ExpressionConvertibleToType(Value *V, const Type *Ty,
@@ -213,11 +103,6 @@
     break;
   }
 
-  case Instruction::Malloc:
-    if (!MallocConvertibleToType(cast<MallocInst>(I), Ty, CTMap, TD))
-      return false;
-    break;
-
   case Instruction::GetElementPtr: {
     // GetElementPtr's are directly convertible to a pointer type if they have
     // a number of zeros at the end.  Because removing these values does not
@@ -396,11 +281,6 @@
     break;
   }
 
-  case Instruction::Malloc: {
-    Res = ConvertMallocToType(cast<MallocInst>(I), Ty, Name, VMC, TD);
-    break;
-  }
-
   case Instruction::GetElementPtr: {
     // GetElementPtr's are directly convertible to a pointer type if they have
     // a number of zeros at the end.  Because removing these values does not





From lattner at cs.uiuc.edu  Fri Oct 28 23:41:41 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 28 Oct 2005 23:41:41 -0500
Subject: [llvm-commits] CVS: llvm/lib/Transforms/TransformInternals.cpp 
Message-ID: <200510290441.XAA12537@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Transforms:

TransformInternals.cpp updated: 1.49 -> 1.50
---
Log message:

Remove dead #include


---
Diffs of the changes:  (+0 -1)

 TransformInternals.cpp |    1 -
 1 files changed, 1 deletion(-)


Index: llvm/lib/Transforms/TransformInternals.cpp
diff -u llvm/lib/Transforms/TransformInternals.cpp:1.49 llvm/lib/Transforms/TransformInternals.cpp:1.50
--- llvm/lib/Transforms/TransformInternals.cpp:1.49	Tue Jul 26 11:38:28 2005
+++ llvm/lib/Transforms/TransformInternals.cpp	Fri Oct 28 23:41:30 2005
@@ -14,7 +14,6 @@
 
 #include "TransformInternals.h"
 #include "llvm/Type.h"
-#include "llvm/Analysis/Expressions.h"
 #include "llvm/Function.h"
 #include "llvm/Instructions.h"
 using namespace llvm;





From lattner at cs.uiuc.edu  Fri Oct 28 23:43:21 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 28 Oct 2005 23:43:21 -0500
Subject: [llvm-commits] CVS: llvm/include/llvm/Analysis/Expressions.h 
Message-ID: <200510290443.XAA12596@zion.cs.uiuc.edu>



Changes in directory llvm/include/llvm/Analysis:

Expressions.h (r1.12) removed
---
Log message:

remove a dead header


---
Diffs of the changes:  (+0 -0)

 0 files changed





From lattner at cs.uiuc.edu  Fri Oct 28 23:43:50 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 28 Oct 2005 23:43:50 -0500
Subject: [llvm-commits] CVS: llvm/lib/Analysis/Expressions.cpp 
Message-ID: <200510290443.XAA12651@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Analysis:

Expressions.cpp (r1.45) removed
---
Log message:

remove a dead file


---
Diffs of the changes:  (+0 -0)

 0 files changed





From lattner at cs.uiuc.edu  Fri Oct 28 23:56:09 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 28 Oct 2005 23:56:09 -0500
Subject: [llvm-commits] CVS: llvm/Xcode/LLVM.xcodeproj/project.pbxproj 
Message-ID: <200510290456.XAA12747@zion.cs.uiuc.edu>



Changes in directory llvm/Xcode/LLVM.xcodeproj:

project.pbxproj updated: 1.11 -> 1.12
---
Log message:

Buh bye Expression.(cpp|h)


---
Diffs of the changes:  (+0 -4)

 project.pbxproj |    4 ----
 1 files changed, 4 deletions(-)


Index: llvm/Xcode/LLVM.xcodeproj/project.pbxproj
diff -u llvm/Xcode/LLVM.xcodeproj/project.pbxproj:1.11 llvm/Xcode/LLVM.xcodeproj/project.pbxproj:1.12
--- llvm/Xcode/LLVM.xcodeproj/project.pbxproj:1.11	Thu Oct 27 12:39:48 2005
+++ llvm/Xcode/LLVM.xcodeproj/project.pbxproj	Fri Oct 28 23:55:57 2005
@@ -173,7 +173,6 @@
 		DE66ECE908ABEC0700323D32 /* Printer.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = Printer.cpp; sourceTree = "<group>"; };
 		DE66ECEA08ABEC0700323D32 /* Steensgaard.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = Steensgaard.cpp; sourceTree = "<group>"; };
 		DE66ECEB08ABEC0700323D32 /* TopDownClosure.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = TopDownClosure.cpp; sourceTree = "<group>"; };
-		DE66ED1608ABEC0800323D32 /* Expressions.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = Expressions.cpp; sourceTree = "<group>"; };
 		DE66ED1708ABEC0800323D32 /* InstCount.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = InstCount.cpp; sourceTree = "<group>"; };
 		DE66ED1808ABEC0800323D32 /* Interval.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = Interval.cpp; sourceTree = "<group>"; };
 		DE66ED1908ABEC0800323D32 /* IntervalPartition.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = IntervalPartition.cpp; sourceTree = "<group>"; };
@@ -602,7 +601,6 @@
 		DE66F20D08ABF03100323D32 /* DSNode.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = DSNode.h; sourceTree = "<group>"; };
 		DE66F20E08ABF03100323D32 /* DSSupport.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = DSSupport.h; sourceTree = "<group>"; };
 		DE66F20F08ABF03100323D32 /* Dominators.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = Dominators.h; sourceTree = "<group>"; };
-		DE66F21008ABF03100323D32 /* Expressions.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = Expressions.h; sourceTree = "<group>"; };
 		DE66F21208ABF03100323D32 /* FindUsedTypes.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = FindUsedTypes.h; sourceTree = "<group>"; };
 		DE66F21308ABF03100323D32 /* Interval.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = Interval.h; sourceTree = "<group>"; };
 		DE66F21408ABF03100323D32 /* IntervalIterator.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = IntervalIterator.h; sourceTree = "<group>"; };
@@ -1027,7 +1025,6 @@
 				DE66ECC108ABEC0700323D32 /* AliasSetTracker.cpp */,
 				DE66ECC208ABEC0700323D32 /* BasicAliasAnalysis.cpp */,
 				DE66ECC308ABEC0700323D32 /* CFGPrinter.cpp */,
-				DE66ED1608ABEC0800323D32 /* Expressions.cpp */,
 				DE66ED1708ABEC0800323D32 /* InstCount.cpp */,
 				DE66ED1808ABEC0800323D32 /* Interval.cpp */,
 				DE66ED1908ABEC0800323D32 /* IntervalPartition.cpp */,
@@ -1823,7 +1820,6 @@
 				DE66F20808ABF03100323D32 /* ConstantsScanner.h */,
 				DE66F20908ABF03100323D32 /* DataStructure */,
 				DE66F20F08ABF03100323D32 /* Dominators.h */,
-				DE66F21008ABF03100323D32 /* Expressions.h */,
 				DE66F21208ABF03100323D32 /* FindUsedTypes.h */,
 				DE66F21308ABF03100323D32 /* Interval.h */,
 				DE66F21408ABF03100323D32 /* IntervalIterator.h */,





From lattner at cs.uiuc.edu  Sat Oct 29 00:14:12 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sat, 29 Oct 2005 00:14:12 -0500
Subject: [llvm-commits] CVS: llvm/docs/ReleaseNotes.html 
Message-ID: <200510290514.AAA12884@zion.cs.uiuc.edu>



Changes in directory llvm/docs:

ReleaseNotes.html updated: 1.336 -> 1.337
---
Log message:

Basic updates


---
Diffs of the changes:  (+3 -16)

 ReleaseNotes.html |   19 +++----------------
 1 files changed, 3 insertions(+), 16 deletions(-)


Index: llvm/docs/ReleaseNotes.html
diff -u llvm/docs/ReleaseNotes.html:1.336 llvm/docs/ReleaseNotes.html:1.337
--- llvm/docs/ReleaseNotes.html:1.336	Mon Oct 24 11:36:36 2005
+++ llvm/docs/ReleaseNotes.html	Sat Oct 29 00:14:01 2005
@@ -74,9 +74,6 @@
 </div>
 
 <div class="doc_text">
-<h1>
- See <a href="/releases/1.5/docs/ReleaseNotes.html">LLVM 1.5 Release Notes</a>
-</h1>
 <ol>
   <li>The JIT now uses mutexes to protect its internal data structures. This
   allows multi-threaded programs to be run from the JIT or interpreter without
@@ -124,7 +121,7 @@
 <li>Sun UltraSPARC workstations running Solaris 8.</li>
 <li>Intel and AMD machines running on Win32 with the Cygwin libraries (limited
     support is available for native builds with Visual C++).</li>
-<li>PowerPC-based Mac OS X systems, running 10.2 and above.</li>
+<li>PowerPC and X86-based Mac OS X systems, running 10.2 and above.</li>
 <li>Alpha-based machines running Debian GNU/Linux.</li>
 <li>Itanium-based machines running Linux and HP-UX.</li>
 </ul>
@@ -186,10 +183,6 @@
 <ul>
   <li>In the JIT, <tt>dlsym()</tt> on a symbol compiled by the JIT will not
   work.</li>
-  <li><a href="http://llvm.cs.uiuc.edu/PR240">The lower-invoke pass does not 
-    mark values live across a setjmp as volatile</a>. This missing feature 
-  only affects targets whose setjmp/longjmp libraries do not save and restore 
-  the entire register file.</li>
 </ul>
 </div>
 
@@ -498,8 +491,6 @@
 <li>On 21164s, some rare FP arithmetic sequences which may trap do not have the
 appropriate nops inserted to ensure restartability.</li>
 
-<li>Defining vararg functions is not supported (but calling them is ok).</li>
-
 <li>Due to the vararg problems, C++ exceptions do not work.  Small changes are required to the CFE (which break correctness in the exception handler) to compile the exception handling library (and thus the C++ standard library).</li>
 
 </ul>
@@ -545,12 +536,8 @@
 
 <ul>
 <li>Many features are still missing (e.g. support for 64-bit integer
-arithmetic).</li>
-
-<li>This backend needs to be updated to use the SelectionDAG instruction
-selection framework.</li>
+arithmetic).  This back-end is in pre-beta state.</li>
 </ul>
-
 </div>
 
 <!-- *********************************************************************** -->
@@ -586,7 +573,7 @@
   src="http://www.w3.org/Icons/valid-html401" alt="Valid HTML 4.01!" /></a>
 
   <a href="http://llvm.cs.uiuc.edu">The LLVM Compiler Infrastructure</a><br>
-  Last modified: $Date: 2005/10/24 16:36:36 $
+  Last modified: $Date: 2005/10/29 05:14:01 $
 </address>
 
 </body>





From lattner at cs.uiuc.edu  Sat Oct 29 00:28:46 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sat, 29 Oct 2005 00:28:46 -0500
Subject: [llvm-commits] 
	CVS: llvm/lib/Target/SparcV8/SparcV8TargetMachine.cpp
Message-ID: <200510290528.AAA12944@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/SparcV8:

SparcV8TargetMachine.cpp updated: 1.29 -> 1.30
---
Log message:

remove reference to this pass


---
Diffs of the changes:  (+0 -4)

 SparcV8TargetMachine.cpp |    4 ----
 1 files changed, 4 deletions(-)


Index: llvm/lib/Target/SparcV8/SparcV8TargetMachine.cpp
diff -u llvm/lib/Target/SparcV8/SparcV8TargetMachine.cpp:1.29 llvm/lib/Target/SparcV8/SparcV8TargetMachine.cpp:1.30
--- llvm/lib/Target/SparcV8/SparcV8TargetMachine.cpp:1.29	Thu Sep  1 16:38:21 2005
+++ llvm/lib/Target/SparcV8/SparcV8TargetMachine.cpp	Sat Oct 29 00:28:34 2005
@@ -80,8 +80,6 @@
   // FIXME: implement the invoke/unwind instructions!
   PM.add(createLowerInvokePass());
 
-  PM.add(createLowerConstantExpressionsPass());
-
   // Make sure that no unreachable blocks are instruction selected.
   PM.add(createUnreachableBlockEliminationPass());
 
@@ -137,8 +135,6 @@
   // FIXME: implement the invoke/unwind instructions!
   PM.add(createLowerInvokePass());
 
-  PM.add(createLowerConstantExpressionsPass());
-
   // Make sure that no unreachable blocks are instruction selected.
   PM.add(createUnreachableBlockEliminationPass());
 





From lattner at cs.uiuc.edu  Sat Oct 29 00:32:31 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sat, 29 Oct 2005 00:32:31 -0500
Subject: [llvm-commits] CVS: llvm/include/llvm/Transforms/LinkAllPasses.h
	Scalar.h 
Message-ID: <200510290532.AAA13015@zion.cs.uiuc.edu>



Changes in directory llvm/include/llvm/Transforms:

LinkAllPasses.h updated: 1.23 -> 1.24
Scalar.h updated: 1.56 -> 1.57
---
Log message:

Remove the LowerConstantExpressionsPass pass


---
Diffs of the changes:  (+0 -6)

 LinkAllPasses.h |    1 -
 Scalar.h        |    5 -----
 2 files changed, 6 deletions(-)


Index: llvm/include/llvm/Transforms/LinkAllPasses.h
diff -u llvm/include/llvm/Transforms/LinkAllPasses.h:1.23 llvm/include/llvm/Transforms/LinkAllPasses.h:1.24
--- llvm/include/llvm/Transforms/LinkAllPasses.h:1.23	Sun Oct 23 21:30:25 2005
+++ llvm/include/llvm/Transforms/LinkAllPasses.h	Sat Oct 29 00:32:20 2005
@@ -77,7 +77,6 @@
       (void) llvm::createLoopUnrollPass();
       (void) llvm::createLoopUnswitchPass();
       (void) llvm::createLowerAllocationsPass();
-      (void) llvm::createLowerConstantExpressionsPass();
       (void) llvm::createLowerGCPass();
       (void) llvm::createLowerInvokePass();
       (void) llvm::createLowerPackedPass();


Index: llvm/include/llvm/Transforms/Scalar.h
diff -u llvm/include/llvm/Transforms/Scalar.h:1.56 llvm/include/llvm/Transforms/Scalar.h:1.57
--- llvm/include/llvm/Transforms/Scalar.h:1.56	Thu Apr 21 15:57:32 2005
+++ llvm/include/llvm/Transforms/Scalar.h	Sat Oct 29 00:32:20 2005
@@ -282,11 +282,6 @@
 FunctionPass *createLowerGCPass();
 
 //===----------------------------------------------------------------------===//
-// Returns a pass which converts all instances of ConstantExpression
-// into regular LLVM instructions.
-FunctionPass* createLowerConstantExpressionsPass();
-
-//===----------------------------------------------------------------------===//
 // This pass reorders basic blocks in order to increase the number of fall-
 // through conditional branches.
 FunctionPass *createBlockPlacementPass();





From lattner at cs.uiuc.edu  Sat Oct 29 00:33:57 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sat, 29 Oct 2005 00:33:57 -0500
Subject: [llvm-commits] 
	CVS: llvm/lib/Transforms/Scalar/LowerConstantExprs.cpp
Message-ID: <200510290533.AAA13076@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Transforms/Scalar:

LowerConstantExprs.cpp (r1.4) removed
---
Log message:

This pass is now obsolete since all targets have moved to the SelectionDAG
infrastructure and the simple isels have been removed.


---
Diffs of the changes:  (+0 -0)

 0 files changed





From lattner at cs.uiuc.edu  Sat Oct 29 00:34:51 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sat, 29 Oct 2005 00:34:51 -0500
Subject: [llvm-commits] CVS: llvm/Xcode/LLVM.xcodeproj/project.pbxproj 
Message-ID: <200510290534.AAA13138@zion.cs.uiuc.edu>



Changes in directory llvm/Xcode/LLVM.xcodeproj:

project.pbxproj updated: 1.12 -> 1.13
---
Log message:

Remove the lowerconstantexprs pass


---
Diffs of the changes:  (+0 -2)

 project.pbxproj |    2 --
 1 files changed, 2 deletions(-)


Index: llvm/Xcode/LLVM.xcodeproj/project.pbxproj
diff -u llvm/Xcode/LLVM.xcodeproj/project.pbxproj:1.12 llvm/Xcode/LLVM.xcodeproj/project.pbxproj:1.13
--- llvm/Xcode/LLVM.xcodeproj/project.pbxproj:1.12	Fri Oct 28 23:55:57 2005
+++ llvm/Xcode/LLVM.xcodeproj/project.pbxproj	Sat Oct 29 00:34:40 2005
@@ -540,7 +540,6 @@
 		DE66F1A908ABEFB400323D32 /* LoopUnroll.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = LoopUnroll.cpp; sourceTree = "<group>"; };
 		DE66F1AA08ABEFB400323D32 /* LoopUnswitch.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = LoopUnswitch.cpp; sourceTree = "<group>"; };
 		DE66F1AB08ABEFB400323D32 /* LowerAllocations.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = LowerAllocations.cpp; sourceTree = "<group>"; };
-		DE66F1AC08ABEFB400323D32 /* LowerConstantExprs.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = LowerConstantExprs.cpp; sourceTree = "<group>"; };
 		DE66F1AD08ABEFB400323D32 /* LowerGC.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = LowerGC.cpp; sourceTree = "<group>"; };
 		DE66F1AE08ABEFB400323D32 /* LowerInvoke.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = LowerInvoke.cpp; sourceTree = "<group>"; };
 		DE66F1AF08ABEFB400323D32 /* LowerPacked.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = LowerPacked.cpp; sourceTree = "<group>"; };
@@ -1694,7 +1693,6 @@
 				DE66F1A908ABEFB400323D32 /* LoopUnroll.cpp */,
 				DE66F1AA08ABEFB400323D32 /* LoopUnswitch.cpp */,
 				DE66F1AB08ABEFB400323D32 /* LowerAllocations.cpp */,
-				DE66F1AC08ABEFB400323D32 /* LowerConstantExprs.cpp */,
 				DE66F1AD08ABEFB400323D32 /* LowerGC.cpp */,
 				DE66F1AE08ABEFB400323D32 /* LowerInvoke.cpp */,
 				DE66F1AF08ABEFB400323D32 /* LowerPacked.cpp */,





From lattner at cs.uiuc.edu  Sat Oct 29 00:45:01 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sat, 29 Oct 2005 00:45:01 -0500
Subject: [llvm-commits] CVS: llvm-www/testresults/index.html 
Message-ID: <200510290545.AAA13365@zion.cs.uiuc.edu>



Changes in directory llvm-www/testresults:

index.html updated: 1.35 -> 1.36
---
Log message:

nuke two long-dead testers, update URL for Vladimir Merzliakov's tester.


---
Diffs of the changes:  (+1 -5)

 index.html |    6 +-----
 1 files changed, 1 insertion(+), 5 deletions(-)


Index: llvm-www/testresults/index.html
diff -u llvm-www/testresults/index.html:1.35 llvm-www/testresults/index.html:1.36
--- llvm-www/testresults/index.html:1.35	Sun May  1 22:02:05 2005
+++ llvm-www/testresults/index.html	Sat Oct 29 00:44:50 2005
@@ -56,15 +56,11 @@
 <ol>
 <!-- LLVM: zion -->
 <li><a href="X86/">Linux (Dual P4 Xeon @ 3.06GHz)</a> -- debug build</li>
-<!-- LLVM: niobe -->
-<li><a href="X86-niobe/">Linux (Dual Athlon MP 2100+)</a> -- release build</li>
 <!-- Reid Spencer -->
 <li><a href="http://illuvium.net/testresults/Optimized/">Linux (Dual P4
 Xeon @ 2.3GHz)</a> -- release build</li>
-<li><a href="http://illuvium.net/testresults/Cygwin/">Cygwin on Windows
-2k, SP3 (Pentium 3 M @ 1.1Ghz)</a> -- debug build</li>
 <!-- Vladimir Merzliakov -->
-<li><a href="http://npt.cc.rsu.ru/testresults-X86-FreeBSD/">FreeBSD 5.3 (Pentium
+<li><a href="http://npt.cc.rsu.ru/testresults-X86-FreeBSD/index.html">FreeBSD 6.0BETA (Pentium
 3  @ 1.0Ghz)</a> -- debug build</li>
 <!-- Duraid Madina -->
 <li><a href="http://kinoko.c.u-tokyo.ac.jp/~builddonkey/">FreeBSD-CURRENT 





From lattner at cs.uiuc.edu  Sat Oct 29 00:46:11 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sat, 29 Oct 2005 00:46:11 -0500
Subject: [llvm-commits] CVS: llvm-www/OpenProjects.html 
Message-ID: <200510290546.AAA13440@zion.cs.uiuc.edu>



Changes in directory llvm-www:

OpenProjects.html updated: 1.9 -> 1.10
---
Log message:

remove a closed project


---
Diffs of the changes:  (+1 -2)

 OpenProjects.html |    3 +--
 1 files changed, 1 insertion(+), 2 deletions(-)


Index: llvm-www/OpenProjects.html
diff -u llvm-www/OpenProjects.html:1.9 llvm-www/OpenProjects.html:1.10
--- llvm-www/OpenProjects.html:1.9	Fri Oct 21 15:29:32 2005
+++ llvm-www/OpenProjects.html	Sat Oct 29 00:46:00 2005
@@ -290,7 +290,6 @@
 algorithm for SSA form</li>
 <li>Implement a Dependence Analysis Infrastructure<br>
      - Design some way to represent and query dep analysis</li>
-<li>Implement a strength reduction pass</li>
 <li>Value range propagation pass</li>
 </ol>
 
@@ -376,7 +375,7 @@
   src="http://www.w3.org/Icons/valid-html401" alt="Valid HTML 4.01!"></a>
 
   <a href="http://llvm.cs.uiuc.edu">LLVM Compiler Infrastructure</a><br>
-  Last modified: $Date: 2005/10/21 20:29:32 $
+  Last modified: $Date: 2005/10/29 05:46:00 $
 </address>
 
 <!--#include virtual="footer.incl" -->





From lattner at cs.uiuc.edu  Sat Oct 29 02:07:21 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sat, 29 Oct 2005 02:07:21 -0500
Subject: [llvm-commits] CVS: llvm/docs/ReleaseNotes.html 
Message-ID: <200510290707.CAA14257@zion.cs.uiuc.edu>



Changes in directory llvm/docs:

ReleaseNotes.html updated: 1.337 -> 1.338
---
Log message:

First hack-and-slash on the release notes.  Comments and improvements welcome


---
Diffs of the changes:  (+168 -24)

 ReleaseNotes.html |  192 +++++++++++++++++++++++++++++++++++++++++++++++-------
 1 files changed, 168 insertions(+), 24 deletions(-)


Index: llvm/docs/ReleaseNotes.html
diff -u llvm/docs/ReleaseNotes.html:1.337 llvm/docs/ReleaseNotes.html:1.338
--- llvm/docs/ReleaseNotes.html:1.337	Sat Oct 29 00:14:01 2005
+++ llvm/docs/ReleaseNotes.html	Sat Oct 29 02:07:09 2005
@@ -20,7 +20,7 @@
 </ol>
 
 <div class="doc_author">
-  <p>Written by the <a href="http://llvm.cs.uiuc.edu">LLVM Team</a><p>
+  <p>Written by the <a href="http://llvm.org">LLVM Team</a><p>
 </div>
 
 <!-- *********************************************************************** -->
@@ -35,12 +35,12 @@
 infrastructure, release 1.6.  Here we describe the status of LLVM, including any
 known problems and major improvements from the previous release.  The most
 up-to-date version of this document can be found on the <a
-href="http://llvm.cs.uiuc.edu/releases/1.6/">LLVM 1.6 web site</a>.  If you are
+href="http://llvm.org/releases/1.6/">LLVM 1.6 web site</a>.  If you are
 not reading this on the LLVM web pages, you should probably go there because
 this document may be updated after the release.</p>
 
 <p>For more information about LLVM, including information about the latest
-release, please check out the <a href="http://llvm.cs.uiuc.edu">main LLVM
+release, please check out the <a href="http://llvm.org/">main LLVM
 web site</a>.  If you have questions or comments, the <a
 href="http://mail.cs.uiuc.edu/mailman/listinfo/llvmdev">LLVM developer's mailing
 list</a> is a good place to send them.</p>
@@ -48,7 +48,7 @@
 <p>Note that if you are reading this file from CVS or the main LLVM web page,
 this document applies to the <i>next</i> release, not the current one.  To see
 the release notes for the current or previous releases, see the <a
-href="http://llvm.cs.uiuc.edu/releases/">releases page</a>.</p>
+href="http://llvm.org/releases/">releases page</a>.</p>
 
 </div>
 
@@ -60,11 +60,12 @@
 
 <div class="doc_text">
 
-<p>This is the seventh public release of the LLVM Compiler Infrastructure.</p>
-
-<p>LLVM 1.6 is known to correctly compile a wide range of C and C++ programs,
-includes bug fixes for those problems found since the 1.5 release, and includes
-a large number of new features and enhancements, described below.</p>
+<p>This is the seventh public release of the LLVM Compiler Infrastructure. This
+release incorporates a large number of enhancements and additions (primarily in
+the code generator), which combine to improve the quality of the code generated
+by LLVM by up to 30% in some cases.  This release is also the first release to
+have first-class support for Mac OS/X: all of the major bugs have been shaken
+out and it is now as well supported as Linux on X86.</p>
 
 </div>
 
@@ -73,14 +74,106 @@
 <a name="newfeatures">New Features in LLVM 1.6</a>
 </div>
 
+<!--_________________________________________________________________________-->
+<div class="doc_subsubsection"><a name="iselgen">Instruction Selector
+Generation from Target Description</a></div>
+
+<div class="doc_text">
+<p>LLVM now includes support for auto-generating large portions of the
+instruction selectors from target descriptions.  This allows us to
+write patterns in the target .td file, instead of writing lots of
+nasty C++ code.  Most of the PowerPC instruction selector is now
+generated from the PowerPC target description files and other targets
+are adding support that will be live for LLVM 1.7.</p>
+
+<p>For example, here are some patterns used by the PowerPC backend.  A 
+floating-point multiply then subtract instruction (FMSUBS):</p>
+
+<div class="doc_code"><p>
+<tt>(set F4RC:$FRT, (fsub (fmul F4RC:$FRA, F4RC:$FRC), F4RC:$FRB))</tt>
+</p></div>
+
+<p>Exclusive-or by 16-bit immediate (XORI):</p>
+
+<div class="doc_code"><p>
+<tt>(set GPRC:$dst, (xor GPRC:$src1, immZExt16:$src2))</tt>
+</p></div>
+
+<p>Exclusive-or by 16-bit immediate shifted right 16-bits (XORIS):</p>
+
+<div class="doc_code"><p>
+<tt>(set GPRC:$dst, (xor GPRC:$src1, imm16Shifted:$src2))</tt>
+</p></div>
+
+<p>With these definitions, we teach the code generator how to combine these two
+instructions to xor an abitrary 32-bit immediate with the following
+definition.  The first line specifies what to match (a xor with an arbitrary
+immediate) the second line specifies what to produce:</p>
+
+<div class="doc_code"><p>
+<pre>def : Pat<(xor GPRC:$in, imm:$imm),
+          (XORIS (XORI GPRC:$in, (LO16 imm:$imm)), (HI16 imm:$imm))>;
+</pre>
+</p></div>
+
+</div>
+
+<!--_________________________________________________________________________-->
+<div class="doc_subsubsection"><a name="sched">Instruction Scheduling
+Support</a></div>
+
+<div class="doc_text">
+
+<p>Instruction selectors using the refined <a 
+href="CodeGenerator.html#instselect">instruction selection framework</a> can now
+use a simple pre-pass scheduler included with LLVM 1.6.  This scheduler is 
+currently simple (cannot be configured much by the targets), but will be
+extended in the future.</p>
+</div>
+
+<!--_________________________________________________________________________-->
+<div class="doc_subsubsection"><a name="subtarget">Code Generator Subtarget
+Support</a></div>
+
+<div class="doc_text">
+<p>It is now straight-forward to parameterize a target implementation, and
+provide a mapping from CPU names to sets of target parameters.  LLC now supports
+a <tt>-mcpu=cpu</tt> option that lets you choose a subtarget by CPU name: use 
+"<tt>llvm-as &lt; /dev/null | llc -march=XXX -mcpu=help</tt>" to get a list of 
+supported CPUs for target "XXX".  It also provides a 
+<tt>-mattr=+attr1,-attr2</tt> option that can be used to control individual 
+features of a target (the previous command will list available features as
+well).</p>
+
+<p>This functionality is nice when you want tell LLC something like "compile to
+code that is specialized for the PowerPC G5, but doesn't use altivec code.  In
+this case, using "<tt>llc -march=ppc32 -mcpu=g5 -mattr=-altivec</tt>".</p>
+
+</div>
+
+<!--_________________________________________________________________________-->
+<div class="doc_subsubsection"><a name="jitlock">Other New Features</a></div>
+
 <div class="doc_text">
 <ol>
   <li>The JIT now uses mutexes to protect its internal data structures. This
   allows multi-threaded programs to be run from the JIT or interpreter without
   corruption of the internal data structures. See 
-  <a href="http://llvm.cs.uiuc.edu/PR418">PR418</a> and
-  <a href="http://llvm.cs.uiuc.edu/PR540">PR540</a> for the details.
+  <a href="http://llvm.org/PR418">PR418</a> and
+  <a href="http://llvm.org/PR540">PR540</a> for the details.
   </li>
+  <li>LLVM on Win32 <a href="http://llvm.org/PR614">no longer requires sed,
+      flex, or bison when compiling with Visual C++</a>.</li>
+  <li>The llvm-test suite can now use the NAG Fortran to C compiler to compile
+    SPEC FP programs if available (allowing us to test all of SPEC'95 &amp; 
+    2000).</li>
+  <li>When bugpoint is grinding away and the user hits ctrl-C, it now
+    gracefully stops and gives what it has reduced so far, instead of
+    giving up completely.  In addition, <a href="http://llvm.org/PR576">the JIT
+    debugging mode of bugpoint is much faster</a>.</li>
+  <li>LLVM now includes Xcode project files in the llvm/Xcode directory.</li>
+  <li>LLVM now supports Mac OS/X on Intel.</li>
+  <li>LLVM now builds cleanly with GCC 4.1.</li>
 </ol>
 </div>
 
@@ -89,11 +182,45 @@
 <a name="codequality">Code Quality Improvements in LLVM 1.6</a>
 </div>
 
+<div class="doc_text">
+<ol>
+  <li>The <tt>-globalopt</tt> pass can now statically evaluate C++ static
+      constructors when they are simple enough.  For example, it can
+    now statically initialize "<tt>struct X { int a; X() : a(4) {} } g;</tt>".
+  </li>
+  <li>The Loop Strength Reduction pass has been completely rewritten, is far
+      more aggressive, and is turned on by default in the RISC targets.  On PPC,
+      we find that it often speeds up programs from 10-40% depending on the
+      program.</li>
+  <li>The code produced when exception handling is enabled is far more
+      efficient in some cases, particularly on Mac OS/X.</li>
+</ol>
+</div>
+
+
 <!--=========================================================================-->
 <div class="doc_subsection">
 <a name="codequality">Code Generator Improvements in LLVM 1.6</a>
 </div>
 
+<div class="doc_text">
+<ol>
+<li>The Alpha backend is substantially more stable and robust than in LLVM 1.5.
+    For example, it now fully supports varargs functions.  The Alpha backend
+    also now features beta JIT support.</li>
+<li>The code generator contains a new component, the DAG Combiner.  This allows
+    us to optimize lowered code (e.g. after 64-bit operations have been lowered
+    to use 32-bit registers on 32-bit targets) and do fine-grained bit-twiddling
+    optimizations for the backend.</li>
+<li>The SelectionDAG infrastructure is far more capable and mature, able to
+    handle many new target peculiarities in a target-independent way.</li>
+<li>The default <a href="http://llvm.org/PR547">register allocator is now far
+    faster on some testcases</a>,
+    particularly on targets with a large number of registers (e.g. IA64
+    and PPC).</li>
+</ol>
+</div>
+
 <!--=========================================================================-->
 <div class="doc_subsection">
 <a name="bugfix">Significant Bugs Fixed in LLVM 1.6</a>
@@ -101,7 +228,22 @@
 
 <div class="doc_text">
 <ol>
-  <li><a href="http://llvm.cs.uiuc.edu/PR591">[simplify-libcalls] The simplify-libcalls pass generates ill-formed LLVM code</a>.</li>
+  <li>A vast number of bugs have been fixed in the PowerPC backend and in
+      llvm-gcc when configured for Mac OS/X (particularly relating to ABI
+      issues).  For example:
+      <a href="http://llvm.org/PR603">PR449</a>,
+      <a href="http://llvm.org/PR594">PR594</a>, 
+      <a href="http://llvm.org/PR603">PR603</a>,
+      <a href="http://llvm.org/PR609">PR609</a>, 
+      <a href="http://llvm.org/PR630">PR630</a>, 
+      <a href="http://llvm.org/PR643">PR643</a>, 
+      and several others without bugzilla bugs.</li>
+  <li>Several bugs in tail call support have been fixed.</li>
+  <li><a href="http://llvm.org/PR608">configure does not correctly detect gcc 
+      version on cygwin</a>.</li>
+  <li>Many many other random bugs have been fixed.  Query <a 
+      href="http://llvm.org/bugs">our bugzilla</a> with a target of 1.6 for more
+      information.</li>
 </ol>
 </div>
 
@@ -145,7 +287,7 @@
 <p>This section contains all known problems with the LLVM system, listed by
 component.  As new problems are discovered, they will be added to these
 sections.  If you run into a problem, please check the <a
-href="http://llvm.cs.uiuc.edu/bugs/">LLVM bug database</a> and submit a bug if
+href="http://llvm.org/bugs/">LLVM bug database</a> and submit a bug if
 there isn't already one.</p>
 
 </div>
@@ -169,6 +311,7 @@
 <li>The <tt>llvm-db</tt> tool is in a very early stage of development, but can
     be used to step through programs and inspect the stack.</li>
 <li>The SparcV8 and IA64 code generators are experimental.</li>
+<li>The Alpha JIT is experimental.</li>
 </ul>
 
 </div>
@@ -206,7 +349,7 @@
 </pre></li>
 
 <li>Initialization of global union variables can only be done <a
-href="http://llvm.cs.uiuc.edu/PR162">with the largest union member</a>.</li>
+href="http://llvm.org/PR162">with the largest union member</a>.</li>
 
 </ul>
 </div>
@@ -431,7 +574,7 @@
 (for example, GCC requires the <tt>-fno-strict-aliasing</tt> option).  This
 problem probably cannot be fixed.</li>
 
-<li><a href="http://llvm.cs.uiuc.edu/PR56">Zero arg vararg functions are not 
+<li><a href="http://llvm.org/PR56">Zero arg vararg functions are not 
 supported</a>.  This should not affect LLVM produced by the C or C++ 
 frontends.</li>
 
@@ -447,7 +590,8 @@
 <div class="doc_text">
 
 <ul>
-<li><a href="http://llvm.cs.uiuc.edu/PR566">Memory Mapped I/O Intrinsics do not fence memory</a></li>
+<li><a href="http://llvm.org/PR566">Memory Mapped I/O Intrinsics do not fence 
+memory</a></li>
 </ul>
 
 </div>
@@ -473,7 +617,7 @@
 <div class="doc_text">
 
 <ul>
-<li><a href="http://llvm.cs.uiuc.edu/PR60">[sparcv9] SparcV9 backend miscompiles
+<li><a href="http://llvm.org/PR60">[sparcv9] SparcV9 backend miscompiles
 several programs in the LLVM test suite</a></li>
 </ul>
 
@@ -511,7 +655,7 @@
 speaking this is not a bug in the IA64 back-end; it will also be encountered
 when building C++ programs using the C back-end.)</li>
 
-<li>The C++ front-end does not use <a href="http://llvm.cs.uiuc.edu/PR406">IA64
+<li>The C++ front-end does not use <a href="http://llvm.org/PR406">IA64
 ABI compliant layout of v-tables</a>.  In particular, it just stores function
 pointers instead of function descriptors in the vtable.  This bug prevents
 mixing C++ code compiled with LLVM with C++ objects compiled by other C++
@@ -549,16 +693,16 @@
 <div class="doc_text">
 
 <p>A wide variety of additional information is available on the <a
-href="http://llvm.cs.uiuc.edu">LLVM web page</a>, including <a
-href="http://llvm.cs.uiuc.edu/docs/">documentation</a> and <a
-href="http://llvm.cs.uiuc.edu/pubs/">publications describing algorithms and
+href="http://llvm.org">LLVM web page</a>, including <a
+href="http://llvm.org/docs/">documentation</a> and <a
+href="http://llvm.org/pubs/">publications describing algorithms and
 components implemented in LLVM</a>.  The web page also contains versions of the
 API documentation which is up-to-date with the CVS version of the source code.
 You can access versions of these documents specific to this release by going
 into the "<tt>llvm/doc/</tt>" directory in the LLVM tree.</p>
 
 <p>If you have any questions or comments about LLVM, please feel free to contact
-us via the <a href="http://llvm.cs.uiuc.edu/docs/#maillist"> mailing
+us via the <a href="http://llvm.org/docs/#maillist"> mailing
 lists</a>.</p>
 
 </div>
@@ -572,8 +716,8 @@
   <a href="http://validator.w3.org/check/referer"><img
   src="http://www.w3.org/Icons/valid-html401" alt="Valid HTML 4.01!" /></a>
 
-  <a href="http://llvm.cs.uiuc.edu">The LLVM Compiler Infrastructure</a><br>
-  Last modified: $Date: 2005/10/29 05:14:01 $
+  <a href="http://llvm.org/">The LLVM Compiler Infrastructure</a><br>
+  Last modified: $Date: 2005/10/29 07:07:09 $
 </address>
 
 </body>





From lattner at cs.uiuc.edu  Sat Oct 29 02:08:30 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sat, 29 Oct 2005 02:08:30 -0500
Subject: [llvm-commits] CVS: llvm/docs/ReleaseNotes.html 
Message-ID: <200510290708.CAA14311@zion.cs.uiuc.edu>



Changes in directory llvm/docs:

ReleaseNotes.html updated: 1.338 -> 1.339
---
Log message:

Fix <> in html


---
Diffs of the changes:  (+3 -3)

 ReleaseNotes.html |    6 +++---
 1 files changed, 3 insertions(+), 3 deletions(-)


Index: llvm/docs/ReleaseNotes.html
diff -u llvm/docs/ReleaseNotes.html:1.338 llvm/docs/ReleaseNotes.html:1.339
--- llvm/docs/ReleaseNotes.html:1.338	Sat Oct 29 02:07:09 2005
+++ llvm/docs/ReleaseNotes.html	Sat Oct 29 02:08:19 2005
@@ -111,8 +111,8 @@
 immediate) the second line specifies what to produce:</p>
 
 <div class="doc_code"><p>
-<pre>def : Pat<(xor GPRC:$in, imm:$imm),
-          (XORIS (XORI GPRC:$in, (LO16 imm:$imm)), (HI16 imm:$imm))>;
+<pre>def : Pat&lt;(xor GPRC:$in, imm:$imm),
+          (XORIS (XORI GPRC:$in, (LO16 imm:$imm)), (HI16 imm:$imm))&gt;;
 </pre>
 </p></div>
 
@@ -717,7 +717,7 @@
   src="http://www.w3.org/Icons/valid-html401" alt="Valid HTML 4.01!" /></a>
 
   <a href="http://llvm.org/">The LLVM Compiler Infrastructure</a><br>
-  Last modified: $Date: 2005/10/29 07:07:09 $
+  Last modified: $Date: 2005/10/29 07:08:19 $
 </address>
 
 </body>





From duraid at octopus.com.au  Sat Oct 29 11:08:46 2005
From: duraid at octopus.com.au (Duraid Madina)
Date: Sat, 29 Oct 2005 11:08:46 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp
	IA64InstrInfo.td 
Message-ID: <200510291608.LAA16000@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/IA64:

IA64ISelDAGToDAG.cpp updated: 1.2 -> 1.3
IA64InstrInfo.td updated: 1.17 -> 1.18
---
Log message:

add some FP stuff, some mix.* stuff, and constant pool support to the
DAG instruction selector, which should be destroyed one day (in the pattern
isel also) since ia64 can pack any constant in the instruction stream



---
Diffs of the changes:  (+131 -61)

 IA64ISelDAGToDAG.cpp |    7 +
 IA64InstrInfo.td     |  185 ++++++++++++++++++++++++++++++++++-----------------
 2 files changed, 131 insertions(+), 61 deletions(-)


Index: llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp
diff -u llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp:1.2 llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp:1.3
--- llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp:1.2	Fri Oct 28 13:26:52 2005
+++ llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp	Sat Oct 29 11:08:30 2005
@@ -313,6 +313,13 @@
                                 CurDAG->getTargetFrameIndex(FI, MVT::i64));
   }
 
+  case ISD::ConstantPool: {
+    Constant *C = cast<ConstantPoolSDNode>(N)->get();
+    SDOperand CPI = CurDAG->getTargetConstantPool(C, MVT::i64);
+    return CurDAG->getTargetNode(IA64::ADDL_GA, MVT::i64, // ?
+	                      CurDAG->getRegister(IA64::r1, MVT::i64), CPI);
+  }
+
   case ISD::GlobalAddress: {
     GlobalValue *GV = cast<GlobalAddressSDNode>(N)->getGlobal();
     SDOperand GA = CurDAG->getTargetGlobalAddress(GV, MVT::i64);


Index: llvm/lib/Target/IA64/IA64InstrInfo.td
diff -u llvm/lib/Target/IA64/IA64InstrInfo.td:1.17 llvm/lib/Target/IA64/IA64InstrInfo.td:1.18
--- llvm/lib/Target/IA64/IA64InstrInfo.td:1.17	Fri Oct 28 23:13:40 2005
+++ llvm/lib/Target/IA64/IA64InstrInfo.td	Sat Oct 29 11:08:30 2005
@@ -45,10 +45,33 @@
 def is32ones : PatLeaf<(i64 imm), [{
   // is32ones predicate - True if the immediate is 0x00000000FFFFFFFF 
   // Used to create ZXT4s appropriately 
-  int64_t v = (int64_t)N->getValue();
+  uint64_t v = (uint64_t)N->getValue();
   return (v == 0x00000000FFFFFFFFLL);
 }]>;
 
+// isMIXable predicates - True if the immediate is
+// 0xFF00FF00FF00FF00, 0x00FF00FF00FF00FF
+// etc, through 0x00000000FFFFFFFF
+// Used to test for the suitability of mix* 
+def isMIX1Lable: PatLeaf<(i64 imm), [{
+  return((uint64_t)N->getValue()==0xFF00FF00FF00FF00LL);
+}]>;
+def isMIX1Rable: PatLeaf<(i64 imm), [{
+  return((uint64_t)N->getValue()==0x00FF00FF00FF00FFLL);
+}]>;
+def isMIX2Lable: PatLeaf<(i64 imm), [{
+  return((uint64_t)N->getValue()==0xFFFF0000FFFF0000LL);
+}]>;
+def isMIX2Rable: PatLeaf<(i64 imm), [{
+  return((uint64_t)N->getValue()==0x0000FFFF0000FFFFLL);
+}]>;
+def isMIX4Lable: PatLeaf<(i64 imm), [{
+  return((uint64_t)N->getValue()==0xFFFFFFFF00000000LL);
+}]>;
+def isMIX4Rable: PatLeaf<(i64 imm), [{
+  return((uint64_t)N->getValue()==0x00000000FFFFFFFFLL);
+}]>;
+
 def isSHLADDimm: PatLeaf<(i64 imm), [{
   // isSHLADDimm predicate - True if the immediate is exactly 1, 2, 3 or 4
   // - 0 is *not* okay.
@@ -83,6 +106,37 @@
 def ZXT4 : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src), "zxt4 $dst = $src;;",
            [(set GR:$dst, (and GR:$src, is32ones))]>;
 
+// fixme: shrs vs shru?
+def MIX1L : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2),
+          "mix1.l $dst = $src1, $src2;;",
+	  [(set GR:$dst, (or (and GR:$src1, isMIX1Lable),
+	                     (and (srl GR:$src2, 8), isMIX1Lable)))]>;
+
+def MIX2L : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2),
+          "mix2.l $dst = $src1, $src2;;",
+	  [(set GR:$dst, (or (and GR:$src1, isMIX2Lable),
+	                     (and (srl GR:$src2, 16), isMIX2Lable)))]>;
+
+def MIX4L : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2),
+          "mix4.l $dst = $src1, $src2;;",
+	  [(set GR:$dst, (or (and GR:$src1, isMIX4Lable),
+	                     (and (srl GR:$src2, 32), isMIX4Lable)))]>;
+
+def MIX1R : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2),
+          "mix1.r $dst = $src1, $src2;;",
+	  [(set GR:$dst, (or (and (shl GR:$src1, 8), isMIX1Rable),
+	                     (and GR:$src2, isMIX1Rable)))]>;
+
+def MIX2R : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2),
+          "mix2.r $dst = $src1, $src2;;",
+	  [(set GR:$dst, (or (and (shl GR:$src1, 16), isMIX2Rable),
+	                     (and GR:$src2, isMIX2Rable)))]>;
+
+def MIX4R : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2),
+          "mix4.r $dst = $src1, $src2;;",
+	  [(set GR:$dst, (or (and (shl GR:$src1, 32), isMIX4Rable),
+	                     (and GR:$src2, isMIX4Rable)))]>;
+
 def ADD  : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2),
            "add $dst = $src1, $src2;;",
 	   [(set GR:$dst, (add GR:$src1, GR:$src2))]>;
@@ -122,10 +176,20 @@
 def XMALD : AForm_DAG<0x03, 0x0b, (ops FP:$dst, FP:$src1, FP:$src2, FP:$src3),
   "xma.l $dst = $src1, $src2, $src3;;",
   []>;
+def XMAHD : AForm_DAG<0x03, 0x0b, (ops FP:$dst, FP:$src1, FP:$src2, FP:$src3),
+  "xma.h $dst = $src1, $src2, $src3;;",
+  []>;
+def XMAHUD : AForm_DAG<0x03, 0x0b, (ops FP:$dst, FP:$src1, FP:$src2, FP:$src3),
+  "xma.hu $dst = $src1, $src2, $src3;;",
+  []>;
 
 // pseudocode for integer multiplication 
 def : Pat<(mul GR:$src1, GR:$src2),
            (GETFSIGD (XMALD (SETFSIGD GR:$src1), (SETFSIGD GR:$src2), F0))>;
+def : Pat<(mulhs GR:$src1, GR:$src2),
+           (GETFSIGD (XMAHD (SETFSIGD GR:$src1), (SETFSIGD GR:$src2), F0))>;
+def : Pat<(mulhu GR:$src1, GR:$src2),
+           (GETFSIGD (XMAHUD (SETFSIGD GR:$src1), (SETFSIGD GR:$src2), F0))>;
 
 // TODO: addp4 (addp4 dst = src, r0 is a 32-bit add)
 // has imm form, too
@@ -160,28 +224,16 @@
   "($qp) cmp.eq $dst, p0 = r0, r0;;">;
   
 /* our pseudocode for OR on predicates is:
- *
-
 pC = pA OR pB
 -------------
-
 (pA) cmp.eq.unc pC,p0 = r0,r0  // pC = pA
  ;;
-(pB) cmp.eq pC,p0 = r0,r0 // if (pB) pC = 1
-
-*/
-/*
-let isTwoAddress = 1 in {
-  def TPCMPEQ : AForm<0x03, 0x0b,
-  (ops PR:$dst, PR:$src2, GR:$src3, GR:$src4, PR:$qp),
-    "($qp) cmp.eq $dst, p0 = $src3, $src4;;">;
-}
-*/
+(pB) cmp.eq pC,p0 = r0,r0 // if (pB) pC = 1 */
 
-// FIXME: these are bogus
 def bOR   : Pat<(or PR:$src1, PR:$src2),
-          (PCMPEQUNCR0R0 PR:$src1)>;
+          (TPCMPEQR0R0 (PCMPEQUNCR0R0 PR:$src1), PR:$src2)>;
 
+// FIXME: these are bogus
 def bXOR  : Pat<(xor PR:$src1, PR:$src2),
           (PCMPEQUNCR0R0 PR:$src1)>;
 
@@ -389,47 +441,68 @@
 def SUBIMM8 : AForm<0x03, 0x0b, (ops GR:$dst, s8imm:$imm, GR:$src2),
   "sub $dst = $imm, $src2;;">;
 
-def ST1 : AForm<0x03, 0x0b, (ops GR:$dstPtr, GR:$value),
-  "st1 [$dstPtr] = $value;;">;
-def ST2 : AForm<0x03, 0x0b, (ops GR:$dstPtr, GR:$value),
-  "st2 [$dstPtr] = $value;;">;
-def ST4 : AForm<0x03, 0x0b, (ops GR:$dstPtr, GR:$value),
-  "st4 [$dstPtr] = $value;;">;
-def ST8 : AForm<0x03, 0x0b, (ops GR:$dstPtr, GR:$value),
-  "st8 [$dstPtr] = $value;;">;
-
-def LD1 : AForm<0x03, 0x0b, (ops GR:$dst, GR:$srcPtr),
-  "ld1 $dst = [$srcPtr];;">;
-def LD2 : AForm<0x03, 0x0b, (ops GR:$dst, GR:$srcPtr),
-  "ld2 $dst = [$srcPtr];;">;
-def LD4 : AForm<0x03, 0x0b, (ops GR:$dst, GR:$srcPtr),
-  "ld4 $dst = [$srcPtr];;">;
-def LD8 : AForm<0x03, 0x0b, (ops GR:$dst, GR:$srcPtr),
-  "ld8 $dst = [$srcPtr];;">;
-
-def POPCNT : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src), "popcnt $dst = $src;;">;
-
-// some FP stuff:
-def FADD : AForm<0x03, 0x0b, (ops FP:$dst, FP:$src1, FP:$src2),
-  "fadd $dst = $src1, $src2;;">;
+let isStore = 1 in {
+  def ST1 : AForm<0x03, 0x0b, (ops GR:$dstPtr, GR:$value),
+    "st1 [$dstPtr] = $value;;">;
+  def ST2 : AForm<0x03, 0x0b, (ops GR:$dstPtr, GR:$value),
+    "st2 [$dstPtr] = $value;;">;
+  def ST4 : AForm<0x03, 0x0b, (ops GR:$dstPtr, GR:$value),
+    "st4 [$dstPtr] = $value;;">;
+  def ST8 : AForm<0x03, 0x0b, (ops GR:$dstPtr, GR:$value),
+    "st8 [$dstPtr] = $value;;">;
+  def STF4 : AForm<0x03, 0x0b, (ops GR:$dstPtr, FP:$value),
+    "stfs [$dstPtr] = $value;;">;
+  def STF8 : AForm<0x03, 0x0b, (ops GR:$dstPtr, FP:$value),
+    "stfd [$dstPtr] = $value;;">;
+}
+
+let isLoad = 1 in {
+  def LD1 : AForm<0x03, 0x0b, (ops GR:$dst, GR:$srcPtr),
+    "ld1 $dst = [$srcPtr];;">;
+  def LD2 : AForm<0x03, 0x0b, (ops GR:$dst, GR:$srcPtr),
+    "ld2 $dst = [$srcPtr];;">;
+  def LD4 : AForm<0x03, 0x0b, (ops GR:$dst, GR:$srcPtr),
+    "ld4 $dst = [$srcPtr];;">;
+  def LD8 : AForm<0x03, 0x0b, (ops GR:$dst, GR:$srcPtr),
+    "ld8 $dst = [$srcPtr];;">;
+  def LDF4 : AForm<0x03, 0x0b, (ops FP:$dst, GR:$srcPtr),
+    "ldfs $dst = [$srcPtr];;">;
+  def LDF8 : AForm<0x03, 0x0b, (ops FP:$dst, GR:$srcPtr),
+    "ldfd $dst = [$srcPtr];;">;
+}
+
+def POPCNT : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src),
+  "popcnt $dst = $src;;",
+  [(set GR:$dst, (ctpop GR:$src))]>;
+
+// some FP stuff:  // TODO: single-precision stuff?
+def FADD : AForm_DAG<0x03, 0x0b, (ops FP:$dst, FP:$src1, FP:$src2),
+  "fadd $dst = $src1, $src2;;",
+  [(set FP:$dst, (fadd FP:$src1, FP:$src2))]>;
 def FADDS: AForm<0x03, 0x0b, (ops FP:$dst, FP:$src1, FP:$src2),
   "fadd.s $dst = $src1, $src2;;">;
-def FSUB : AForm<0x03, 0x0b, (ops FP:$dst, FP:$src1, FP:$src2),
-  "fsub $dst = $src1, $src2;;">;
-def FMPY : AForm<0x03, 0x0b, (ops FP:$dst, FP:$src1, FP:$src2),
-  "fmpy $dst = $src1, $src2;;">;
+def FSUB : AForm_DAG<0x03, 0x0b, (ops FP:$dst, FP:$src1, FP:$src2),
+  "fsub $dst = $src1, $src2;;",
+  [(set FP:$dst, (fsub FP:$src1, FP:$src2))]>;
+def FMPY : AForm_DAG<0x03, 0x0b, (ops FP:$dst, FP:$src1, FP:$src2),
+  "fmpy $dst = $src1, $src2;;",
+  [(set FP:$dst, (fmul FP:$src1, FP:$src2))]>;
 def FMOV : AForm<0x03, 0x0b, (ops FP:$dst, FP:$src),
   "mov $dst = $src;;">; // XXX: there _is_ no fmov
-def FMA : AForm<0x03, 0x0b, (ops FP:$dst, FP:$src1, FP:$src2, FP:$src3),
-  "fma $dst = $src1, $src2, $src3;;">;
-def FMS : AForm<0x03, 0x0b, (ops FP:$dst, FP:$src1, FP:$src2, FP:$src3),
-  "fms $dst = $src1, $src2, $src3;;">;
-def FNMA : AForm<0x03, 0x0b, (ops FP:$dst, FP:$src1, FP:$src2, FP:$src3),
-  "fnma $dst = $src1, $src2, $src3;;">;
+def FMA : AForm_DAG<0x03, 0x0b, (ops FP:$dst, FP:$src1, FP:$src2, FP:$src3),
+  "fma $dst = $src1, $src2, $src3;;",
+  [(set FP:$dst, (fadd (fmul FP:$src1, FP:$src2), FP:$src3))]>;
+def FMS : AForm_DAG<0x03, 0x0b, (ops FP:$dst, FP:$src1, FP:$src2, FP:$src3),
+  "fms $dst = $src1, $src2, $src3;;",
+  [(set FP:$dst, (fsub (fmul FP:$src1, FP:$src2), FP:$src3))]>;
+def FNMA : AForm_DAG<0x03, 0x0b, (ops FP:$dst, FP:$src1, FP:$src2, FP:$src3),
+  "fnma $dst = $src1, $src2, $src3;;",
+  [(set FP:$dst, (fneg (fadd (fmul FP:$src1, FP:$src2), FP:$src3)))]>;
 def FABS : AForm<0x03, 0x0b, (ops FP:$dst, FP:$src),
   "fabs $dst = $src;;">;
-def FNEG : AForm<0x03, 0x0b, (ops FP:$dst, FP:$src),
-  "fneg $dst = $src;;">;
+def FNEG : AForm_DAG<0x03, 0x0b, (ops FP:$dst, FP:$src),
+  "fneg $dst = $src;;",
+  [(set FP:$dst, (fneg FP:$src))]>;
 def FNEGABS : AForm<0x03, 0x0b, (ops FP:$dst, FP:$src),
   "fnegabs $dst = $src;;">;
 
@@ -480,16 +553,6 @@
 def SETFSIG : AForm<0x03, 0x0b, (ops FP:$dst, GR:$src),
   "setf.sig $dst = $src;;">;
 
-def LDF4 : AForm<0x03, 0x0b, (ops FP:$dst, GR:$srcPtr),
-  "ldfs $dst = [$srcPtr];;">;
-def LDF8 : AForm<0x03, 0x0b, (ops FP:$dst, GR:$srcPtr),
-  "ldfd $dst = [$srcPtr];;">;
-
-def STF4 : AForm<0x03, 0x0b, (ops GR:$dstPtr, FP:$value),
-  "stfs [$dstPtr] = $value;;">;
-def STF8 : AForm<0x03, 0x0b, (ops GR:$dstPtr, FP:$value),
-  "stfd [$dstPtr] = $value;;">;
-
 let isTerminator = 1, isBranch = 1 in {
   def BRL_NOTCALL : RawForm<0x03, 0xb0, (ops i64imm:$dst),
     "(p0) brl.cond.sptk $dst;;">;





From lattner at cs.uiuc.edu  Sat Oct 29 11:32:56 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sat, 29 Oct 2005 11:32:56 -0500
Subject: [llvm-commits] CVS: llvm-www/testresults/index.html 
Message-ID: <200510291632.LAA16134@zion.cs.uiuc.edu>



Changes in directory llvm-www/testresults:

index.html updated: 1.36 -> 1.37
---
Log message:

Reid says his tester is out of action


---
Diffs of the changes:  (+0 -3)

 index.html |    3 ---
 1 files changed, 3 deletions(-)


Index: llvm-www/testresults/index.html
diff -u llvm-www/testresults/index.html:1.36 llvm-www/testresults/index.html:1.37
--- llvm-www/testresults/index.html:1.36	Sat Oct 29 00:44:50 2005
+++ llvm-www/testresults/index.html	Sat Oct 29 11:32:45 2005
@@ -56,9 +56,6 @@
 <ol>
 <!-- LLVM: zion -->
 <li><a href="X86/">Linux (Dual P4 Xeon @ 3.06GHz)</a> -- debug build</li>
-<!-- Reid Spencer -->
-<li><a href="http://illuvium.net/testresults/Optimized/">Linux (Dual P4
-Xeon @ 2.3GHz)</a> -- release build</li>
 <!-- Vladimir Merzliakov -->
 <li><a href="http://npt.cc.rsu.ru/testresults-X86-FreeBSD/index.html">FreeBSD 6.0BETA (Pentium
 3  @ 1.0Ghz)</a> -- debug build</li>





From lattner at cs.uiuc.edu  Sat Oct 29 11:39:52 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sat, 29 Oct 2005 11:39:52 -0500
Subject: [llvm-commits] CVS: llvm/utils/TableGen/DAGISelEmitter.cpp 
Message-ID: <200510291639.LAA16206@zion.cs.uiuc.edu>



Changes in directory llvm/utils/TableGen:

DAGISelEmitter.cpp updated: 1.70 -> 1.71
---
Log message:

Make negative immediates in patterns work correctly, silence some warnings
building the itanium backend.


---
Diffs of the changes:  (+1 -1)

 DAGISelEmitter.cpp |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/utils/TableGen/DAGISelEmitter.cpp
diff -u llvm/utils/TableGen/DAGISelEmitter.cpp:1.70 llvm/utils/TableGen/DAGISelEmitter.cpp:1.71
--- llvm/utils/TableGen/DAGISelEmitter.cpp:1.70	Fri Oct 28 17:49:02 2005
+++ llvm/utils/TableGen/DAGISelEmitter.cpp	Sat Oct 29 11:39:40 2005
@@ -1592,7 +1592,7 @@
       } else if (IntInit *II = dynamic_cast<IntInit*>(Child->getLeafValue())) {
         OS << "      if (!isa<ConstantSDNode>(" << RootName << i << ") ||\n"
            << "          cast<ConstantSDNode>(" << RootName << i
-           << ")->getValue() != " << II->getValue() << ")\n"
+           << ")->getSignExtended() != " << II->getValue() << ")\n"
            << "        goto P" << PatternNo << "Fail;\n";
       } else {
         Child->dump();





From lattner at cs.uiuc.edu  Sat Oct 29 11:45:14 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sat, 29 Oct 2005 11:45:14 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaISelPattern.cpp 
Message-ID: <200510291645.LAA16296@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/Alpha:

AlphaISelPattern.cpp updated: 1.176 -> 1.177
---
Log message:

Make -time-passes output prettier


---
Diffs of the changes:  (+4 -0)

 AlphaISelPattern.cpp |    4 ++++
 1 files changed, 4 insertions(+)


Index: llvm/lib/Target/Alpha/AlphaISelPattern.cpp
diff -u llvm/lib/Target/Alpha/AlphaISelPattern.cpp:1.176 llvm/lib/Target/Alpha/AlphaISelPattern.cpp:1.177
--- llvm/lib/Target/Alpha/AlphaISelPattern.cpp:1.176	Fri Oct 21 11:01:26 2005
+++ llvm/lib/Target/Alpha/AlphaISelPattern.cpp	Sat Oct 29 11:45:02 2005
@@ -82,6 +82,10 @@
     AlphaLowering(TM)
   {}
 
+    virtual const char *getPassName() const {
+      return "Alpha Pattern Instruction Selection";
+    } 
+
   /// InstructionSelectBasicBlock - This callback is invoked by
   /// SelectionDAGISel when it has created a SelectionDAG for us to codegen.
   virtual void InstructionSelectBasicBlock(SelectionDAG &DAG) {





From jeffc at jolt-lang.org  Sat Oct 29 11:52:00 2005
From: jeffc at jolt-lang.org (Jeff Cohen)
Date: Sat, 29 Oct 2005 11:52:00 -0500
Subject: [llvm-commits] CVS: llvm/win32/Transforms/Transforms.vcproj 
Message-ID: <200510291652.LAA16332@zion.cs.uiuc.edu>



Changes in directory llvm/win32/Transforms:

Transforms.vcproj updated: 1.15 -> 1.16
---
Log message:

More files deleted.

---
Diffs of the changes:  (+0 -3)

 Transforms.vcproj |    3 ---
 1 files changed, 3 deletions(-)


Index: llvm/win32/Transforms/Transforms.vcproj
diff -u llvm/win32/Transforms/Transforms.vcproj:1.15 llvm/win32/Transforms/Transforms.vcproj:1.16
--- llvm/win32/Transforms/Transforms.vcproj:1.15	Wed Oct 26 00:36:51 2005
+++ llvm/win32/Transforms/Transforms.vcproj	Sat Oct 29 11:51:48 2005
@@ -253,9 +253,6 @@
 					RelativePath="..\..\lib\Transforms\Scalar\LowerAllocations.cpp">
 				</File>
 				<File
-					RelativePath="..\..\lib\Transforms\Scalar\LowerConstantExprs.cpp">
-				</File>
-				<File
 					RelativePath="..\..\lib\Transforms\Scalar\LowerGC.cpp">
 				</File>
 				<File





From jeffc at jolt-lang.org  Sat Oct 29 11:52:00 2005
From: jeffc at jolt-lang.org (Jeff Cohen)
Date: Sat, 29 Oct 2005 11:52:00 -0500
Subject: [llvm-commits] CVS: llvm/win32/Analysis/Analysis.vcproj 
Message-ID: <200510291652.LAA16336@zion.cs.uiuc.edu>



Changes in directory llvm/win32/Analysis:

Analysis.vcproj updated: 1.14 -> 1.15
---
Log message:

More files deleted.

---
Diffs of the changes:  (+0 -6)

 Analysis.vcproj |    6 ------
 1 files changed, 6 deletions(-)


Index: llvm/win32/Analysis/Analysis.vcproj
diff -u llvm/win32/Analysis/Analysis.vcproj:1.14 llvm/win32/Analysis/Analysis.vcproj:1.15
--- llvm/win32/Analysis/Analysis.vcproj:1.14	Thu Oct 27 20:43:09 2005
+++ llvm/win32/Analysis/Analysis.vcproj	Sat Oct 29 11:51:48 2005
@@ -128,9 +128,6 @@
 				RelativePath="..\..\lib\Analysis\ConstantFolding.cpp">
 			</File>
 			<File
-				RelativePath="..\..\lib\Analysis\Expressions.cpp">
-			</File>
-			<File
 				RelativePath="..\..\lib\Analysis\InstCount.cpp">
 			</File>
 			<File
@@ -258,9 +255,6 @@
 				RelativePath="..\..\include\llvm\Analysis\Dominators.h">
 			</File>
 			<File
-				RelativePath="..\..\include\llvm\Analysis\Expressions.h">
-			</File>
-			<File
 				RelativePath="..\..\include\llvm\Analysis\FindUsedTypes.h">
 			</File>
 			<File





From lattner at cs.uiuc.edu  Sat Oct 29 12:01:52 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sat, 29 Oct 2005 12:01:52 -0500
Subject: [llvm-commits] CVS: llvm/utils/NightlyTest.pl 
Message-ID: <200510291701.MAA16501@zion.cs.uiuc.edu>



Changes in directory llvm/utils:

NightlyTest.pl updated: 1.98 -> 1.99
---
Log message:

Revert an accidental commit.


---
Diffs of the changes:  (+1 -1)

 NightlyTest.pl |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/utils/NightlyTest.pl
diff -u llvm/utils/NightlyTest.pl:1.98 llvm/utils/NightlyTest.pl:1.99
--- llvm/utils/NightlyTest.pl:1.98	Fri Oct 28 11:35:18 2005
+++ llvm/utils/NightlyTest.pl	Sat Oct 29 12:01:41 2005
@@ -410,7 +410,7 @@
 #
 if (!$NOCHECKOUT) {
   if ( $VERBOSE ) { print "CONFIGURE STAGE\n"; }
-  my $EXTRAFLAGS = "--enable-spec2000=/Volumes/ProjectsDisk/cvs/benchmarks/speccpu2000-llvm/benchspec/ --enable-povray=/Volumes/ProjectsDisk/cvs/benchmarks/povray31 --enable-namd=/Volumes/ProjectsDisk/cvs/benchmarks/namd";
+  my $EXTRAFLAGS = "--enable-spec --with-objroot=.";
   system "(time -p $NICE ./configure $CONFIGUREARGS $EXTRAFLAGS) > $BuildLog 2>&1";
 
   if ( $VERBOSE ) { print "BUILD STAGE\n"; }





From lattner at cs.uiuc.edu  Sun Oct 30 00:14:15 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sun, 30 Oct 2005 00:14:15 -0500
Subject: [llvm-commits] 
	CVS: llvm/test/Regression/Transforms/LoopStrengthReduce/nested-reduce.ll
Message-ID: <200510300514.AAA25707@zion.cs.uiuc.edu>



Changes in directory llvm/test/Regression/Transforms/LoopStrengthReduce:

nested-reduce.ll added (r1.1)
---
Log message:

new testcase


---
Diffs of the changes:  (+57 -0)

 nested-reduce.ll |   57 +++++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 files changed, 57 insertions(+)


Index: llvm/test/Regression/Transforms/LoopStrengthReduce/nested-reduce.ll
diff -c /dev/null llvm/test/Regression/Transforms/LoopStrengthReduce/nested-reduce.ll:1.1
*** /dev/null	Sun Oct 30 00:14:13 2005
--- llvm/test/Regression/Transforms/LoopStrengthReduce/nested-reduce.ll	Sun Oct 30 00:14:03 2005
***************
*** 0 ****
--- 1,57 ----
+ ; RUN: llvm-as < %s | opt -loop-reduce &&
+ ; RUN: llvm-as < %s | opt -loop-reduce | llvm-dis | not grep mul
+ 
+ ; Make sure we don't get a multiply by 6 in this loop.
+ 
+ int %foo(int %A, int %B, int %C, int %D) {
+ entry:
+ 	%tmp.5 = setgt int %C, 0		; <bool> [#uses=1]
+ 	%tmp.25 = and int %A, 1		; <int> [#uses=1]
+ 	br label %loopentry.1
+ 
+ loopentry.1:		; preds = %loopexit.1, %entry
+ 	%indvar20 = phi uint [ 0, %entry ], [ %indvar.next21, %loopexit.1 ]		; <uint> [#uses=2]
+ 	%k.1 = phi int [ 0, %entry ], [ %k.1.3, %loopexit.1 ]		; <int> [#uses=2]
+ 	br bool %tmp.5, label %no_exit.1.preheader, label %loopexit.1
+ 
+ no_exit.1.preheader:		; preds = %loopentry.1
+ 	%i.0.0 = cast uint %indvar20 to int		; <int> [#uses=1]
+ 	%tmp.9 = mul int %i.0.0, 6		; <int> [#uses=1]
+ 	br label %no_exit.1.outer
+ 
+ no_exit.1.outer:		; preds = %cond_true, %no_exit.1.preheader
+ 	%k.1.2.ph = phi int [ %k.1, %no_exit.1.preheader ], [ %k.09, %cond_true ]		; <int> [#uses=2]
+ 	%j.1.2.ph = phi int [ 0, %no_exit.1.preheader ], [ %inc.1, %cond_true ]		; <int> [#uses=1]
+ 	br label %no_exit.1
+ 
+ no_exit.1:		; preds = %cond_continue, %no_exit.1.outer
+ 	%indvar = phi uint [ 0, %no_exit.1.outer ], [ %indvar.next, %cond_continue ]		; <uint> [#uses=2]
+ 	%indvar = cast uint %indvar to int		; <int> [#uses=1]
+ 	%j.1.2 = add int %indvar, %j.1.2.ph		; <int> [#uses=2]
+ 	%tmp.11 = add int %j.1.2, %tmp.9		; <int> [#uses=1]
+ 	%tmp.12 = cast int %tmp.11 to ubyte		; <ubyte> [#uses=1]
+ 	%tmp.13 = shl int %D, ubyte %tmp.12		; <int> [#uses=2]
+ 	%tmp.15 = seteq int %tmp.13, %B		; <bool> [#uses=1]
+ 	%inc.1 = add int %j.1.2, 1		; <int> [#uses=3]
+ 	br bool %tmp.15, label %cond_true, label %cond_continue
+ 
+ cond_true:		; preds = %no_exit.1
+ 	%tmp.26 = and int %tmp.25, %tmp.13		; <int> [#uses=1]
+ 	%k.09 = add int %tmp.26, %k.1.2.ph		; <int> [#uses=2]
+ 	%tmp.517 = setlt int %inc.1, %C		; <bool> [#uses=1]
+ 	br bool %tmp.517, label %no_exit.1.outer, label %loopexit.1
+ 
+ cond_continue:		; preds = %no_exit.1
+ 	%tmp.519 = setlt int %inc.1, %C		; <bool> [#uses=1]
+ 	%indvar.next = add uint %indvar, 1		; <uint> [#uses=1]
+ 	br bool %tmp.519, label %no_exit.1, label %loopexit.1
+ 
+ loopexit.1:		; preds = %cond_continue, %cond_true, %loopentry.1
+ 	%k.1.3 = phi int [ %k.1, %loopentry.1 ], [ %k.09, %cond_true ], [ %k.1.2.ph, %cond_continue ]		; <int> [#uses=2]
+ 	%indvar.next21 = add uint %indvar20, 1		; <uint> [#uses=2]
+ 	%exitcond = seteq uint %indvar.next21, 4		; <bool> [#uses=1]
+ 	br bool %exitcond, label %loopexit.0, label %loopentry.1
+ 
+ loopexit.0:		; preds = %loopexit.1
+ 	ret int %k.1.3
+ }





From lattner at cs.uiuc.edu  Sun Oct 30 01:24:45 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sun, 30 Oct 2005 01:24:45 -0500
Subject: [llvm-commits] CVS: llvm/lib/Analysis/ScalarEvolutionExpander.cpp 
Message-ID: <200510300624.BAA26160@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Analysis:

ScalarEvolutionExpander.cpp updated: 1.1 -> 1.2
---
Log message:

Fix a problem that Nate noticed with LSR:

When inserting code for an addrec expression with a non-unit stride, be
more careful where we insert the multiply.  In particular, insert the multiply
in the outermost loop we can, instead of the requested insertion point.

This allows LSR to notice the mul in the right loop, reducing it when it gets
to it.  This allows it to reduce the multiply, where before it missed it.

This happens quite a bit in the test suite, for example, eliminating 2 
multiplies in art, 3 in ammp, 4 in apsi, reducing from 1050 multiplies to
910 muls in galgel (!), from 877 to 859 in applu, and 36 to 30 in bzip2.

This speeds up galgel from 16.45s to 16.01s, applu from 14.21 to 13.94s and
fourinarow from 66.67s to 63.48s.

This implements Transforms/LoopStrengthReduce/nested-reduce.ll



---
Diffs of the changes:  (+26 -1)

 ScalarEvolutionExpander.cpp |   27 ++++++++++++++++++++++++++-
 1 files changed, 26 insertions(+), 1 deletion(-)


Index: llvm/lib/Analysis/ScalarEvolutionExpander.cpp
diff -u llvm/lib/Analysis/ScalarEvolutionExpander.cpp:1.1 llvm/lib/Analysis/ScalarEvolutionExpander.cpp:1.2
--- llvm/lib/Analysis/ScalarEvolutionExpander.cpp:1.1	Fri Jul 29 19:12:19 2005
+++ llvm/lib/Analysis/ScalarEvolutionExpander.cpp	Sun Oct 30 01:24:33 2005
@@ -87,9 +87,34 @@
   // Get the canonical induction variable I for this loop.
   Value *I = getOrInsertCanonicalInductionVariable(L, Ty);
 
+  // If this is a simple linear addrec, emit it now as a special case.
   if (S->getNumOperands() == 2) {   // {0,+,F} --> i*F
     Value *F = expandInTy(S->getOperand(1), Ty);
-    return BinaryOperator::createMul(I, F, "tmp.", InsertPt);
+    
+    // IF the step is by one, just return the inserted IV.
+    if (ConstantIntegral *CI = dyn_cast<ConstantIntegral>(F))
+      if (CI->getRawValue() == 1)
+        return I;
+    
+    // If the insert point is directly inside of the loop, emit the multiply at
+    // the insert point.  Otherwise, L is a loop that is a parent of the insert
+    // point loop.  If we can, move the multiply to the outer most loop that it
+    // is safe to be in.
+    Instruction *MulInsertPt = InsertPt;
+    Loop *InsertPtLoop = LI.getLoopFor(MulInsertPt->getParent());
+    if (InsertPtLoop != L && InsertPtLoop &&
+        L->contains(InsertPtLoop->getHeader())) {
+      while (InsertPtLoop != L) {
+        // If we cannot hoist the multiply out of this loop, don't.
+        if (!InsertPtLoop->isLoopInvariant(F)) break;
+
+        // Otherwise, move the insert point to the preheader of the loop.
+        MulInsertPt = InsertPtLoop->getLoopPreheader()->getTerminator();
+        InsertPtLoop = InsertPtLoop->getParentLoop();
+      }
+    }
+    
+    return BinaryOperator::createMul(I, F, "tmp.", MulInsertPt);
   }
 
   // If this is a chain of recurrences, turn it into a closed form, using the





From lattner at cs.uiuc.edu  Sun Oct 30 01:37:46 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sun, 30 Oct 2005 01:37:46 -0500
Subject: [llvm-commits] 
	CVS: llvm/test/Regression/CodeGen/PowerPC/mul-neg-power-2.ll
Message-ID: <200510300637.BAA26238@zion.cs.uiuc.edu>



Changes in directory llvm/test/Regression/CodeGen/PowerPC:

mul-neg-power-2.ll added (r1.1)
---
Log message:

new testcase


---
Diffs of the changes:  (+9 -0)

 mul-neg-power-2.ll |    9 +++++++++
 1 files changed, 9 insertions(+)


Index: llvm/test/Regression/CodeGen/PowerPC/mul-neg-power-2.ll
diff -c /dev/null llvm/test/Regression/CodeGen/PowerPC/mul-neg-power-2.ll:1.1
*** /dev/null	Sun Oct 30 01:37:44 2005
--- llvm/test/Regression/CodeGen/PowerPC/mul-neg-power-2.ll	Sun Oct 30 01:37:34 2005
***************
*** 0 ****
--- 1,9 ----
+ ; RUN: llvm-as < %s | llc -march=ppc32 &&
+ ; RUN: llvm-as < %s | llc -march=ppc32 | not grep mul
+ 
+ int %test1(int %a) {
+         %tmp.1 = mul int %a, -2         ; <int> [#uses=1]
+         %tmp.2 = add int %tmp.1, 63             ; <int> [#uses=1]
+         ret int %tmp.2
+ }
+ 





From lattner at cs.uiuc.edu  Sun Oct 30 01:42:01 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sun, 30 Oct 2005 01:42:01 -0500
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp 
Message-ID: <200510300642.BAA26304@zion.cs.uiuc.edu>



Changes in directory llvm/lib/CodeGen/SelectionDAG:

DAGCombiner.cpp updated: 1.57 -> 1.58
---
Log message:

Codegen mul by negative power of two with a shift and negate.
This implements test/Regression/CodeGen/PowerPC/mul-neg-power-2.ll,
producing:

_foo:
        slwi r2, r3, 1
        subfic r3, r2, 63
        blr

instead of:

_foo:
        mulli r2, r3, -2
        addi r3, r2, 63
        blr



---
Diffs of the changes:  (+13 -3)

 DAGCombiner.cpp |   16 +++++++++++++---
 1 files changed, 13 insertions(+), 3 deletions(-)


Index: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.57 llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.58
--- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.57	Thu Oct 27 02:10:34 2005
+++ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp	Sun Oct 30 01:41:49 2005
@@ -735,8 +735,7 @@
   
   // fold (mul c1, c2) -> c1*c2
   if (N0C && N1C)
-    return DAG.getConstant(N0C->getValue() * N1C->getValue(),
-                           N->getValueType(0));
+    return DAG.getConstant(N0C->getValue() * N1C->getValue(), VT);
   // canonicalize constant to RHS
   if (N0C && !N1C)
     return DAG.getNode(ISD::MUL, VT, N1, N0);
@@ -748,9 +747,20 @@
     return DAG.getNode(ISD::SUB, VT, DAG.getConstant(0, VT), N0);
   // fold (mul x, (1 << c)) -> x << c
   if (N1C && isPowerOf2_64(N1C->getValue()))
-    return DAG.getNode(ISD::SHL, N->getValueType(0), N0,
+    return DAG.getNode(ISD::SHL, VT, N0,
                        DAG.getConstant(Log2_64(N1C->getValue()),
                                        TLI.getShiftAmountTy()));
+  // fold (mul x, -(1 << c)) -> -(x << c) or (-x) << c
+  if (N1C && isPowerOf2_64(-N1C->getSignExtended())) {
+    // FIXME: If the input is something that is easily negated (e.g. a 
+    // single-use add), we should put the negate there.
+    return DAG.getNode(ISD::SUB, VT, DAG.getConstant(0, VT),
+                       DAG.getNode(ISD::SHL, VT, N0,
+                            DAG.getConstant(Log2_64(-N1C->getSignExtended()),
+                                            TLI.getShiftAmountTy())));
+  }
+  
+  
   // fold (mul (mul x, c1), c2) -> (mul x, c1*c2)
   if (N1C && N0.getOpcode() == ISD::MUL) {
     ConstantSDNode *N00C = dyn_cast<ConstantSDNode>(N0.getOperand(0));





From lattner at cs.uiuc.edu  Sun Oct 30 01:42:23 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sun, 30 Oct 2005 01:42:23 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/README.txt 
Message-ID: <200510300642.BAA26337@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/PowerPC:

README.txt updated: 1.36 -> 1.37
---
Log message:

This is implemented


---
Diffs of the changes:  (+0 -19)

 README.txt |   19 -------------------
 1 files changed, 19 deletions(-)


Index: llvm/lib/Target/PowerPC/README.txt
diff -u llvm/lib/Target/PowerPC/README.txt:1.36 llvm/lib/Target/PowerPC/README.txt:1.37
--- llvm/lib/Target/PowerPC/README.txt:1.36	Fri Oct 28 18:26:57 2005
+++ llvm/lib/Target/PowerPC/README.txt	Sun Oct 30 01:42:12 2005
@@ -217,22 +217,3 @@
         stw r2, 0(r3)
         blr
 
-===-------------------------------------------------------------------------===
-
-Compile
-int foo(int a) { return a * -2 + 63; }
-
-to
-
-_foo:
-        slwi r0,r3,1
-        subfic r3,r0,63
-        blr
-
-instead of:
-
-_foo:
-        mulli r2,r3,-2
-        addi r3,r2,63
-        blr
-





From lattner at cs.uiuc.edu  Sun Oct 30 01:22:26 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sun, 30 Oct 2005 01:22:26 -0600
Subject: [llvm-commits] 
	CVS: llvm/test/Regression/CodeGen/Generic/ConstantExprLowering.llx
Message-ID: <200510300722.BAA26456@zion.cs.uiuc.edu>



Changes in directory llvm/test/Regression/CodeGen/Generic:

ConstantExprLowering.llx updated: 1.2 -> 1.3
---
Log message:

The pass was removed, but the spirit lives on


---
Diffs of the changes:  (+1 -1)

 ConstantExprLowering.llx |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/test/Regression/CodeGen/Generic/ConstantExprLowering.llx
diff -u llvm/test/Regression/CodeGen/Generic/ConstantExprLowering.llx:1.2 llvm/test/Regression/CodeGen/Generic/ConstantExprLowering.llx:1.3
--- llvm/test/Regression/CodeGen/Generic/ConstantExprLowering.llx:1.2	Fri Jan  7 15:37:13 2005
+++ llvm/test/Regression/CodeGen/Generic/ConstantExprLowering.llx	Sun Oct 30 01:22:15 2005
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | opt -lowerconstantexprs -disable-output
+; RUN: llvm-as < %s | llc
 
 %.str_1 = internal constant [16 x sbyte] c"%d %d %d %d %d\0A\00"
 





From duraid at octopus.com.au  Sun Oct 30 04:14:36 2005
From: duraid at octopus.com.au (Duraid Madina)
Date: Sun, 30 Oct 2005 04:14:36 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/IA64/IA64InstrInfo.td 
Message-ID: <200510301014.EAA27193@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/IA64:

IA64InstrInfo.td updated: 1.18 -> 1.19
---
Log message:

fix some broken comparisons, this affected the Pattern isel too.



---
Diffs of the changes:  (+4 -27)

 IA64InstrInfo.td |   31 ++++---------------------------
 1 files changed, 4 insertions(+), 27 deletions(-)


Index: llvm/lib/Target/IA64/IA64InstrInfo.td
diff -u llvm/lib/Target/IA64/IA64InstrInfo.td:1.18 llvm/lib/Target/IA64/IA64InstrInfo.td:1.19
--- llvm/lib/Target/IA64/IA64InstrInfo.td:1.18	Sat Oct 29 11:08:30 2005
+++ llvm/lib/Target/IA64/IA64InstrInfo.td	Sun Oct 30 04:14:19 2005
@@ -257,29 +257,6 @@
           "shr $dst = $src1, $src2;;",
 	  [(set GR:$dst, (sra GR:$src1, GR:$src2))]>;
 
-/*
-def CMPEQ : AForm<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2),
-  "cmp.eq $dst, p0 = $src1, $src2;;">;
-def CMPGT : AForm<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2),
-  "cmp.gt $dst, p0 = $src1, $src2;;">;
-def CMPGE : AForm<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2),
-  "cmp.ge $dst, p0 = $src1, $src2;;">;
-def CMPLT : AForm<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2),
-  "cmp.lt $dst, p0 = $src1, $src2;;">;
-def CMPLE : AForm<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2),
-  "cmp.le $dst, p0 = $src1, $src2;;">;
-def CMPNE : AForm<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2),
-  "cmp.ne $dst, p0 = $src1, $src2;;">;
-def CMPLTU : AForm<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2),
-  "cmp.ltu $dst, p0 = $src1, $src2;;">;
-def CMPGTU : AForm<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2),
-  "cmp.gtu $dst, p0 = $src1, $src2;;">;
-def CMPLEU : AForm<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2),
-  "cmp.leu $dst, p0 = $src1, $src2;;">;
-def CMPGEU : AForm<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2),
-  "cmp.geu $dst, p0 = $src1, $src2;;">;
-*/
-
 // the following are all a bit unfortunate: we throw away the complement
 // of the compare!
 def CMPEQ : AForm_DAG<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2),
@@ -301,16 +278,16 @@
           "cmp.ne $dst, p0 = $src1, $src2;;",
 	  [(set PR:$dst, (setne GR:$src1, GR:$src2))]>;
 def CMPLTU: AForm_DAG<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2),
-          "cmp.eq $dst, p0 = $src1, $src2;;",
+          "cmp.ltu $dst, p0 = $src1, $src2;;",
 	  [(set PR:$dst, (setult GR:$src1, GR:$src2))]>;
 def CMPGTU: AForm_DAG<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2),
-          "cmp.eq $dst, p0 = $src1, $src2;;",
+          "cmp.gtu $dst, p0 = $src1, $src2;;",
 	  [(set PR:$dst, (setugt GR:$src1, GR:$src2))]>;
 def CMPLEU: AForm_DAG<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2),
-          "cmp.eq $dst, p0 = $src1, $src2;;",
+          "cmp.leu $dst, p0 = $src1, $src2;;",
 	  [(set PR:$dst, (setule GR:$src1, GR:$src2))]>;
 def CMPGEU: AForm_DAG<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2),
-          "cmp.eq $dst, p0 = $src1, $src2;;",
+          "cmp.geu $dst, p0 = $src1, $src2;;",
 	  [(set PR:$dst, (setuge GR:$src1, GR:$src2))]>;
 
 // TODO: support postincrement (reg, imm9) loads+stores - this needs more





From lattner at cs.uiuc.edu  Sun Oct 30 10:44:13 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sun, 30 Oct 2005 10:44:13 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaTargetMachine.cpp 
Message-ID: <200510301644.KAA02706@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/Alpha:

AlphaTargetMachine.cpp updated: 1.14 -> 1.15
---
Log message:

If the module has no t-t and the host is an alpha, default to using the Alpha BE


---
Diffs of the changes:  (+1 -1)

 AlphaTargetMachine.cpp |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/lib/Target/Alpha/AlphaTargetMachine.cpp
diff -u llvm/lib/Target/Alpha/AlphaTargetMachine.cpp:1.14 llvm/lib/Target/Alpha/AlphaTargetMachine.cpp:1.15
--- llvm/lib/Target/Alpha/AlphaTargetMachine.cpp:1.14	Wed Oct 19 19:28:31 2005
+++ llvm/lib/Target/Alpha/AlphaTargetMachine.cpp	Sun Oct 30 10:44:01 2005
@@ -51,7 +51,7 @@
            M.getPointerSize() != Module::AnyPointerSize)
     return 0;                                    // Match for some other target
 
-  return 0;
+  return getJITMatchQuality()/2;
 }
 
 unsigned AlphaTargetMachine::getJITMatchQuality() {





From lattner at cs.uiuc.edu  Sun Oct 30 12:54:38 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sun, 30 Oct 2005 12:54:38 -0600
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp 
Message-ID: <200510301854.MAA03142@zion.cs.uiuc.edu>



Changes in directory llvm/lib/CodeGen/SelectionDAG:

ScheduleDAG.cpp updated: 1.37 -> 1.38
---
Log message:

Reduce the number of copies emitted as machine instructions by 
generating results in vregs that will need them.  In the case of something
like this:  CopyToReg((add X, Y), reg1024), we no longer emit code like
this:

   reg1025 = add X, Y
   reg1024 = reg 1025

Instead, we emit:

   reg1024 = add X, Y

Whoa! :)



---
Diffs of the changes:  (+57 -16)

 ScheduleDAG.cpp |   73 +++++++++++++++++++++++++++++++++++++++++++-------------
 1 files changed, 57 insertions(+), 16 deletions(-)


Index: llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.37 llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.38
--- llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.37	Thu Oct 13 11:44:00 2005
+++ llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp	Sun Oct 30 12:54:27 2005
@@ -1006,7 +1006,28 @@
     
     // Add result register values for things that are defined by this
     // instruction.
-    if (NumResults) VRBase = CreateVirtualRegisters(MI, NumResults, II);
+    
+    // If the node is only used by a CopyToReg and the dest reg is a vreg, use
+    // the CopyToReg'd destination register instead of creating a new vreg.
+    if (NumResults == 1) {
+      for (SDNode::use_iterator UI = Node->use_begin(), E = Node->use_end();
+           UI != E; ++UI) {
+        SDNode *Use = *UI;
+        if (Use->getOpcode() == ISD::CopyToReg && 
+            Use->getOperand(2).Val == Node) {
+          unsigned Reg = cast<RegisterSDNode>(Use->getOperand(1))->getReg();
+          if (MRegisterInfo::isVirtualRegister(Reg)) {
+            VRBase = Reg;
+            MI->addRegOperand(Reg, MachineOperand::Def);
+            break;
+          }
+        }
+      }
+    }
+    
+    // Otherwise, create new virtual registers.
+    if (NumResults && VRBase == 0)
+      VRBase = CreateVirtualRegisters(MI, NumResults, II);
     
     // Emit all of the actual operands of this instruction, adding them to the
     // instruction as appropriate.
@@ -1084,10 +1105,11 @@
     case ISD::TokenFactor:
       break;
     case ISD::CopyToReg: {
-      unsigned Val = getVR(Node->getOperand(2));
-      MRI.copyRegToReg(*BB, BB->end(),
-                       cast<RegisterSDNode>(Node->getOperand(1))->getReg(), Val,
-                       RegMap->getRegClass(Val));
+      unsigned InReg = getVR(Node->getOperand(2));
+      unsigned DestReg = cast<RegisterSDNode>(Node->getOperand(1))->getReg();
+      if (InReg != DestReg)   // Coallesced away the copy?
+        MRI.copyRegToReg(*BB, BB->end(), DestReg, InReg,
+                         RegMap->getRegClass(InReg));
       break;
     }
     case ISD::CopyFromReg: {
@@ -1097,21 +1119,40 @@
         break;
       }
 
+      // If the node is only used by a CopyToReg and the dest reg is a vreg, use
+      // the CopyToReg'd destination register instead of creating a new vreg.
+      for (SDNode::use_iterator UI = Node->use_begin(), E = Node->use_end();
+           UI != E; ++UI) {
+        SDNode *Use = *UI;
+        if (Use->getOpcode() == ISD::CopyToReg && 
+            Use->getOperand(2).Val == Node) {
+          unsigned DestReg = cast<RegisterSDNode>(Use->getOperand(1))->getReg();
+          if (MRegisterInfo::isVirtualRegister(DestReg)) {
+            VRBase = DestReg;
+            break;
+          }
+        }
+      }
+
       // Figure out the register class to create for the destreg.
       const TargetRegisterClass *TRC = 0;
+      if (VRBase) {
+        TRC = RegMap->getRegClass(VRBase);
+      } else {
 
-      // Pick the register class of the right type that contains this physreg.
-      for (MRegisterInfo::regclass_iterator I = MRI.regclass_begin(),
-           E = MRI.regclass_end(); I != E; ++I)
-        if ((*I)->getType() == Node->getValueType(0) &&
-            (*I)->contains(SrcReg)) {
-          TRC = *I;
-          break;
-        }
-      assert(TRC && "Couldn't find register class for reg copy!");
+        // Pick the register class of the right type that contains this physreg.
+        for (MRegisterInfo::regclass_iterator I = MRI.regclass_begin(),
+             E = MRI.regclass_end(); I != E; ++I)
+          if ((*I)->getType() == Node->getValueType(0) &&
+              (*I)->contains(SrcReg)) {
+            TRC = *I;
+            break;
+          }
+        assert(TRC && "Couldn't find register class for reg copy!");
       
-      // Create the reg, emit the copy.
-      VRBase = RegMap->createVirtualRegister(TRC);
+        // Create the reg, emit the copy.
+        VRBase = RegMap->createVirtualRegister(TRC);
+      }
       MRI.copyRegToReg(*BB, BB->end(), VRBase, SrcReg, TRC);
       break;
     }





From lattner at cs.uiuc.edu  Sun Oct 30 13:42:30 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sun, 30 Oct 2005 13:42:30 -0600
Subject: [llvm-commits] 
	CVS: llvm/test/Regression/CodeGen/PowerPC/reg-coallesce-simple.ll
Message-ID: <200510301942.NAA03498@zion.cs.uiuc.edu>



Changes in directory llvm/test/Regression/CodeGen/PowerPC:

reg-coallesce-simple.ll added (r1.1)
---
Log message:

new testcase


---
Diffs of the changes:  (+12 -0)

 reg-coallesce-simple.ll |   12 ++++++++++++
 1 files changed, 12 insertions(+)


Index: llvm/test/Regression/CodeGen/PowerPC/reg-coallesce-simple.ll
diff -c /dev/null llvm/test/Regression/CodeGen/PowerPC/reg-coallesce-simple.ll:1.1
*** /dev/null	Sun Oct 30 13:42:29 2005
--- llvm/test/Regression/CodeGen/PowerPC/reg-coallesce-simple.ll	Sun Oct 30 13:42:19 2005
***************
*** 0 ****
--- 1,12 ----
+ ; RUN: llvm-as < %s | llc -march=ppc32 &&
+ ; RUN: llvm-as < %s | llc -march=ppc32 | not grep or
+ 
+ %struct.foo = type { int, int, [0 x ubyte] }
+ int %test(%struct.foo* %X) {
+         %tmp1 = getelementptr %struct.foo* %X, int 0, uint 2, int 100
+         %tmp = load ubyte* %tmp1                ; <ubyte> [#uses=1]
+         %tmp2 = cast ubyte %tmp to int          ; <int> [#uses=1]
+         ret int %tmp2}
+ 
+ 
+ 





From lattner at cs.uiuc.edu  Sun Oct 30 13:42:47 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sun, 30 Oct 2005 13:42:47 -0600
Subject: [llvm-commits] 
	CVS: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
Message-ID: <200510301942.NAA03508@zion.cs.uiuc.edu>



Changes in directory llvm/lib/CodeGen/SelectionDAG:

SelectionDAGISel.cpp updated: 1.91 -> 1.92
---
Log message:

Significantly simplify this code and make it more aggressive.  Instead of having
a special case hack for X86, make the hack more general: if an incoming argument
register is not used in any block other than the entry block, don't copy it to
a vreg.  This helps us compile code like this:

%struct.foo = type { int, int, [0 x ubyte] }
int %test(%struct.foo* %X) {
        %tmp1 = getelementptr %struct.foo* %X, int 0, uint 2, int 100
        %tmp = load ubyte* %tmp1                ; <ubyte> [#uses=1]
        %tmp2 = cast ubyte %tmp to int          ; <int> [#uses=1]
        ret int %tmp2
}

to:

_test:
        lbz r3, 108(r3)
        blr

instead of:

_test:
        lbz r2, 108(r3)
        or r3, r2, r2
        blr

The (dead) copy emitted to copy r3 into a vreg for extra-block uses was 
increasing the live range of r3 past the load, preventing the coallescing.

This implements CodeGen/PowerPC/reg-coallesce-simple.ll



---
Diffs of the changes:  (+49 -102)

 SelectionDAGISel.cpp |  151 ++++++++++++++++-----------------------------------
 1 files changed, 49 insertions(+), 102 deletions(-)


Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.91 llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.92
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.91	Tue Oct 18 18:23:37 2005
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp	Sun Oct 30 13:42:35 2005
@@ -72,14 +72,6 @@
     /// anywhere in the function.
     std::map<const AllocaInst*, int> StaticAllocaMap;
 
-    /// BlockLocalArguments - If any arguments are only used in a single basic
-    /// block, and if the target can access the arguments without side-effects,
-    /// avoid emitting CopyToReg nodes for those arguments.  This map keeps
-    /// track of which arguments are local to each BB.
-    std::multimap<BasicBlock*, std::pair<Argument*,
-                                         unsigned> > BlockLocalArguments;
-
-
     unsigned MakeReg(MVT::ValueType VT) {
       return RegMap->createVirtualRegister(TLI.getRegClassFor(VT));
     }
@@ -125,17 +117,30 @@
   return false;
 }
 
+/// isOnlyUsedInEntryBlock - If the specified argument is only used in the
+/// entry block, return true.
+static bool isOnlyUsedInEntryBlock(Argument *A) {
+  BasicBlock *Entry = A->getParent()->begin();
+  for (Value::use_iterator UI = A->use_begin(), E = A->use_end(); UI != E; ++UI)
+    if (cast<Instruction>(*UI)->getParent() != Entry)
+      return false;  // Use not in entry block.
+  return true;
+}
+
 FunctionLoweringInfo::FunctionLoweringInfo(TargetLowering &tli,
                                            Function &fn, MachineFunction &mf)
     : TLI(tli), Fn(fn), MF(mf), RegMap(MF.getSSARegMap()) {
 
-  // Initialize the mapping of values to registers.  This is only set up for
-  // instruction values that are used outside of the block that defines
-  // them.
+  // Create a vreg for each argument register that is not dead and is used
+  // outside of the entry block for the function.
   for (Function::arg_iterator AI = Fn.arg_begin(), E = Fn.arg_end();
        AI != E; ++AI)
-    InitializeRegForValue(AI);
+    if (!isOnlyUsedInEntryBlock(AI))
+      InitializeRegForValue(AI);
 
+  // Initialize the mapping of values to registers.  This is only set up for
+  // instruction values that are used outside of the block that defines
+  // them.
   Function::iterator BB = Fn.begin(), EB = Fn.end();
   for (BasicBlock::iterator I = BB->begin(), E = BB->end(); I != E; ++I)
     if (AllocaInst *AI = dyn_cast<AllocaInst>(I))
@@ -1072,104 +1077,45 @@
   }
 }
 
-/// IsOnlyUsedInOneBasicBlock - If the specified argument is only used in a
-/// single basic block, return that block.  Otherwise, return a null pointer.
-static BasicBlock *IsOnlyUsedInOneBasicBlock(Argument *A) {
-  if (A->use_empty()) return 0;
-  BasicBlock *BB = cast<Instruction>(A->use_back())->getParent();
-  for (Argument::use_iterator UI = A->use_begin(), E = A->use_end(); UI != E;
-       ++UI)
-    if (isa<PHINode>(*UI) || cast<Instruction>(*UI)->getParent() != BB)
-      return 0;  // Disagreement among the users?
-
-  // Okay, there is a single BB user.  Only permit this optimization if this is
-  // the entry block, otherwise, we might sink argument loads into loops and
-  // stuff.  Later, when we have global instruction selection, this won't be an
-  // issue clearly.
-  if (BB == BB->getParent()->begin())
-    return BB;
-  return 0;
-}
-
 void SelectionDAGISel::
 LowerArguments(BasicBlock *BB, SelectionDAGLowering &SDL,
                std::vector<SDOperand> &UnorderedChains) {
   // If this is the entry block, emit arguments.
   Function &F = *BB->getParent();
   FunctionLoweringInfo &FuncInfo = SDL.FuncInfo;
+  SDOperand OldRoot = SDL.DAG.getRoot();
+  std::vector<SDOperand> Args = TLI.LowerArguments(F, SDL.DAG);
 
-  if (BB == &F.front()) {
-    SDOperand OldRoot = SDL.DAG.getRoot();
-
-    std::vector<SDOperand> Args = TLI.LowerArguments(F, SDL.DAG);
-
-    // If there were side effects accessing the argument list, do not do
-    // anything special.
-    if (OldRoot != SDL.DAG.getRoot()) {
-      unsigned a = 0;
-      for (Function::arg_iterator AI = F.arg_begin(), E = F.arg_end();
-           AI != E; ++AI,++a)
-        if (!AI->use_empty()) {
-          SDL.setValue(AI, Args[a]);
-          
-          SDOperand Copy =
-            CopyValueToVirtualRegister(SDL, AI, FuncInfo.ValueMap[AI]);
-          UnorderedChains.push_back(Copy);
-        }
-    } else {
-      // Otherwise, if any argument is only accessed in a single basic block,
-      // emit that argument only to that basic block.
-      unsigned a = 0;
-      for (Function::arg_iterator AI = F.arg_begin(), E = F.arg_end();
-           AI != E; ++AI,++a)
-        if (!AI->use_empty()) {
-          if (BasicBlock *BBU = IsOnlyUsedInOneBasicBlock(AI)) {
-            FuncInfo.BlockLocalArguments.insert(std::make_pair(BBU,
-                                                      std::make_pair(AI, a)));
-          } else {
-            SDL.setValue(AI, Args[a]);
-            SDOperand Copy =
-              CopyValueToVirtualRegister(SDL, AI, FuncInfo.ValueMap[AI]);
-            UnorderedChains.push_back(Copy);
-          }
-        }
-    }
-
-    // Next, if the function has live ins that need to be copied into vregs,
-    // emit the copies now, into the top of the block.
-    MachineFunction &MF = SDL.DAG.getMachineFunction();
-    if (MF.livein_begin() != MF.livein_end()) {
-      SSARegMap *RegMap = MF.getSSARegMap();
-      const MRegisterInfo &MRI = *MF.getTarget().getRegisterInfo();
-      for (MachineFunction::livein_iterator LI = MF.livein_begin(),
-           E = MF.livein_end(); LI != E; ++LI)
-        if (LI->second)
-          MRI.copyRegToReg(*MF.begin(), MF.begin()->end(), LI->second,
-                           LI->first, RegMap->getRegClass(LI->second));
-    }
+  unsigned a = 0;
+  for (Function::arg_iterator AI = F.arg_begin(), E = F.arg_end();
+       AI != E; ++AI, ++a)
+    if (!AI->use_empty()) {
+      SDL.setValue(AI, Args[a]);
       
-    // Finally, if the target has anything special to do, allow it to do so.
-    EmitFunctionEntryCode(F, SDL.DAG.getMachineFunction());
-  }
-
-  // See if there are any block-local arguments that need to be emitted in this
-  // block.
-
-  if (!FuncInfo.BlockLocalArguments.empty()) {
-    std::multimap<BasicBlock*, std::pair<Argument*, unsigned> >::iterator BLAI =
-      FuncInfo.BlockLocalArguments.lower_bound(BB);
-    if (BLAI != FuncInfo.BlockLocalArguments.end() && BLAI->first == BB) {
-      // Lower the arguments into this block.
-      std::vector<SDOperand> Args = TLI.LowerArguments(F, SDL.DAG);
-
-      // Set up the value mapping for the local arguments.
-      for (; BLAI != FuncInfo.BlockLocalArguments.end() && BLAI->first == BB;
-           ++BLAI)
-        SDL.setValue(BLAI->second.first, Args[BLAI->second.second]);
-
-      // Any dead arguments will just be ignored here.
+      // If this argument is live outside of the entry block, insert a copy from
+      // whereever we got it to the vreg that other BB's will reference it as.
+      if (FuncInfo.ValueMap.count(AI)) {
+        SDOperand Copy =
+          CopyValueToVirtualRegister(SDL, AI, FuncInfo.ValueMap[AI]);
+        UnorderedChains.push_back(Copy);
+      }
     }
+
+  // Next, if the function has live ins that need to be copied into vregs,
+  // emit the copies now, into the top of the block.
+  MachineFunction &MF = SDL.DAG.getMachineFunction();
+  if (MF.livein_begin() != MF.livein_end()) {
+    SSARegMap *RegMap = MF.getSSARegMap();
+    const MRegisterInfo &MRI = *MF.getTarget().getRegisterInfo();
+    for (MachineFunction::livein_iterator LI = MF.livein_begin(),
+         E = MF.livein_end(); LI != E; ++LI)
+      if (LI->second)
+        MRI.copyRegToReg(*MF.begin(), MF.begin()->end(), LI->second,
+                         LI->first, RegMap->getRegClass(LI->second));
   }
+    
+  // Finally, if the target has anything special to do, allow it to do so.
+  EmitFunctionEntryCode(F, SDL.DAG.getMachineFunction());
 }
 
 
@@ -1180,8 +1126,9 @@
 
   std::vector<SDOperand> UnorderedChains;
 
-  // Lower any arguments needed in this block.
-  LowerArguments(LLVMBB, SDL, UnorderedChains);
+  // Lower any arguments needed in this block if this is the entry block.
+  if (LLVMBB == &LLVMBB->getParent()->front())
+    LowerArguments(LLVMBB, SDL, UnorderedChains);
 
   BB = FuncInfo.MBBMap[LLVMBB];
   SDL.setCurrentBasicBlock(BB);





From lattner at cs.uiuc.edu  Sun Oct 30 14:02:07 2005
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sun, 30 Oct 2005 14:02:07 -0600
Subject: [llvm-commits] 
	CVS: llvm-test/External/SPEC/CINT95/132.ijpeg/Makefile
Message-ID: <200510302002.OAA03647@zion.cs.uiuc.edu>



Changes in directory llvm-test/External/SPEC/CINT95/132.ijpeg:

Makefile updated: 1.6 -> 1.7
---
Log message:

remove this hack


---
Diffs of the changes:  (+0 -4)

 Makefile |    4 ----
 1 files changed, 4 deletions(-)


Index: llvm-test/External/SPEC/CINT95/132.ijpeg/Makefile
diff -u llvm-test/External/SPEC/CINT95/132.ijpeg/Makefile:1.6 llvm-test/External/SPEC/CINT95/132.ijpeg/Makefile:1.7
--- llvm-test/External/SPEC/CINT95/132.ijpeg/Makefile:1.6	Mon Sep  6 23:18:02 2004
+++ llvm-test/External/SPEC/CINT95/132.ijpeg/Makefile	Sun Oct 30 14:01:56 2005
@@ -8,10 +8,6 @@
 STDOUT_FILENAME := $(FILENAME).out
 RUN_OPTIONS := -image_file $(FILENAME).ppm -compression.quality 90 -compression.optimize_coding 0 -compression.smoothing_factor 90 -difference.image 1 -difference.x_stride 10 -difference.y_stride 10 -verbose 1 -GO.findoptcomp
 
-# This line nukes the __const's found in /usr/include/stdio.h that prevent the
-# extern char * sys_errlist variable from linking properly.
-CPPFLAGS += -D__const=""
-
 # This #define is the perfectly logical way to get 132.ijpeg to #include errno.h
 CPPFLAGS += -D__VMS
 





From jeffc at jolt-lang.org  Sun Oct 30 15:00:35 2005
From: jeffc at jolt-lang.org (Jeff Cohen)
Date: Sun, 30 Oct 2005 15:00:35 -0600
Subject: [llvm-commits] CVS: llvm/docs/GettingStartedVS.html 
Message-ID: <200510302100.PAA06469@zion.cs.uiuc.edu>



Changes in directory llvm/docs:

GettingStartedVS.html updated: 1.4 -> 1.5
---
Log message:

Update Getting Started for Visual Studio page.

---
Diffs of the changes:  (+12 -19)

 GettingStartedVS.html |   31 ++++++++++++-------------------
 1 files changed, 12 insertions(+), 19 deletions(-)


Index: llvm/docs/GettingStartedVS.html
diff -u llvm/docs/GettingStartedVS.html:1.4 llvm/docs/GettingStartedVS.html:1.5
--- llvm/docs/GettingStartedVS.html:1.4	Mon Mar  7 21:56:50 2005
+++ llvm/docs/GettingStartedVS.html	Sun Oct 30 15:00:24 2005
@@ -170,15 +170,10 @@
   beta, there are no guarantees and there is no support for it at this time.
   It has been reported that VC++ Express also works.</p>
 
-  <p>You will also need several open source packages:  bison, flex, and sed.
-  These must be installed in <tt>llvm/win32/tools</tt>.  These can be found at
-  <a href="http://gnuwin32.sourceforge.net">http://gnuwin32.sourceforge.net</a>
-  or
-  <a href="http://unxutils.sourceforge.net">http://unxutils.sourceforge.net</a>.
-  Bison prefers that m4 be in the path.  You must add it to the Visual Studio
-  configuration under the menu Options -&gt; Projects -&gt; VC++ Directories.
-  Alternatively, you can set the environment variable <tt>M4</tt> to point to
-  <tt>m4</tt> executable.</p>
+  <p>If you plan to modify any .y or .l files, you will need to have bison
+  and/or flex installed where Visual Studio can find them.  Otherwise, you do
+  not need them and the pre-generated files that come with the source tree
+  will be used.</p>
 
 </div>
 
@@ -279,28 +274,26 @@
       <p><b>Note: while you cannot do this step on Windows, you can do it on a
         Unix system and transfer <tt>hello.bc</tt> to Windows.</b></p></li>
 
-  <li><p>Run the program. To make sure the program ran, execute the
-      following command:</p>
+  <li><p>Run the program using the just-in-time compiler:</p>
       
       <p><tt>% lli hello.bc</tt></p></li>
 
   <li><p>Use the <tt>llvm-dis</tt> utility to take a look at the LLVM assembly
       code:</p>
 
-      <p><tt>% llvm-dis &lt; hello.bc | less</tt><p></li>
+      <p><tt>% llvm-dis &lt; hello.bc | more</tt><p></li>
 
-  <li><p>Compile the program to native assembly using the LLC code
-      generator:</p>
+  <li><p>Compile the program to C using the LLC code generator:</p>
 
-      <p><tt>% llc hello.bc -o hello.s</tt></p>
+      <p><tt>% llc -march=c hello.bc</tt></p></li>
 
-  <li><p>Assemble the native assembly language file into a program:</p>
+  <li><p>Compile to binary using Microsoft C:</p>
 
-  <p><b>Not currently possible, but eventually will use <tt>NASMW</tt>.</b></p>
+      <p><tt>% cl hello.cbe.c</tt></p></li>
 
   <li><p>Execute the native code program:</p>
 
-      <p><tt>% ./hello.native</tt></p></li>
+      <p><tt>% hello.cbe.exe</tt></p></li>
 
 </ol>
 
@@ -354,7 +347,7 @@
 
   <a href="mailto:jeffc at jolt-lang.org">Jeff Cohen</a><br>
   <a href="http://llvm.cs.uiuc.edu">The LLVM Compiler Infrastructure</a><br>
-  Last modified: $Date: 2005/03/08 03:56:50 $
+  Last modified: $Date: 2005/10/30 21:00:24 $
 </address>
 </body>
 </html>





From duraid at octopus.com.au  Sun Oct 30 19:42:23 2005
From: duraid at octopus.com.au (Duraid Madina)
Date: Sun, 30 Oct 2005 19:42:23 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/IA64/IA64InstrFormats.td
	IA64InstrInfo.td 
Message-ID: <200510310142.TAA08594@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/IA64:

IA64InstrFormats.td updated: 1.2 -> 1.3
IA64InstrInfo.td updated: 1.19 -> 1.20
---
Log message:

add FP compares and implicit register defs to the dag isel



---
Diffs of the changes:  (+45 -23)

 IA64InstrFormats.td |    4 +++
 IA64InstrInfo.td    |   64 +++++++++++++++++++++++++++++++++-------------------
 2 files changed, 45 insertions(+), 23 deletions(-)


Index: llvm/lib/Target/IA64/IA64InstrFormats.td
diff -u llvm/lib/Target/IA64/IA64InstrFormats.td:1.2 llvm/lib/Target/IA64/IA64InstrFormats.td:1.3
--- llvm/lib/Target/IA64/IA64InstrFormats.td:1.2	Fri Oct 28 12:46:36 2005
+++ llvm/lib/Target/IA64/IA64InstrFormats.td	Sun Oct 30 19:42:11 2005
@@ -72,4 +72,8 @@
 class PseudoInstIA64<dag OL, string nm> : InstIA64<0, OL, nm>  {
 }
 
+class PseudoInstIA64_DAG<dag OL, string nm, list<dag> pattern>
+  : InstIA64<0, OL, nm> {
+  let Pattern = pattern;
+}
 


Index: llvm/lib/Target/IA64/IA64InstrInfo.td
diff -u llvm/lib/Target/IA64/IA64InstrInfo.td:1.19 llvm/lib/Target/IA64/IA64InstrInfo.td:1.20
--- llvm/lib/Target/IA64/IA64InstrInfo.td:1.19	Sun Oct 30 04:14:19 2005
+++ llvm/lib/Target/IA64/IA64InstrInfo.td	Sun Oct 30 19:42:11 2005
@@ -200,7 +200,7 @@
 // load constants of various sizes // FIXME: prettyprint -ve constants
 def : Pat<(i64 immSExt14:$imm), (ADDS r0, immSExt14:$imm)>;
 def : Pat<(i64 imm64:$imm), (MOVL imm64:$imm)>;
-// TODO: def : Pat<(i1 1), (MOV p0)>;
+// TODO: def : Pat<(i1 1), (<stuff>)>;
 
 def AND   : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2),
           "and $dst = $src1, $src2;;",
@@ -290,11 +290,51 @@
           "cmp.geu $dst, p0 = $src1, $src2;;",
 	  [(set PR:$dst, (setuge GR:$src1, GR:$src2))]>;
 
+// and we do the whole thing again for FP compares!
+def FCMPEQ : AForm_DAG<0x03, 0x0b, (ops PR:$dst, FP:$src1, FP:$src2),
+          "fcmp.eq $dst, p0 = $src1, $src2;;",
+          [(set PR:$dst, (seteq FP:$src1, FP:$src2))]>;
+def FCMPGT : AForm_DAG<0x03, 0x0b, (ops PR:$dst, FP:$src1, FP:$src2),
+          "fcmp.gt $dst, p0 = $src1, $src2;;",
+	  [(set PR:$dst, (setgt FP:$src1, FP:$src2))]>;
+def FCMPGE : AForm_DAG<0x03, 0x0b, (ops PR:$dst, FP:$src1, FP:$src2),
+          "fcmp.ge $dst, p0 = $src1, $src2;;",
+	  [(set PR:$dst, (setge FP:$src1, FP:$src2))]>;
+def FCMPLT : AForm_DAG<0x03, 0x0b, (ops PR:$dst, FP:$src1, FP:$src2),
+          "fcmp.lt $dst, p0 = $src1, $src2;;",
+	  [(set PR:$dst, (setlt FP:$src1, FP:$src2))]>;
+def FCMPLE : AForm_DAG<0x03, 0x0b, (ops PR:$dst, FP:$src1, FP:$src2),
+          "fcmp.le $dst, p0 = $src1, $src2;;",
+	  [(set PR:$dst, (setle FP:$src1, FP:$src2))]>;
+def FCMPNE : AForm_DAG<0x03, 0x0b, (ops PR:$dst, FP:$src1, FP:$src2),
+          "fcmp.neq $dst, p0 = $src1, $src2;;",
+	  [(set PR:$dst, (setne FP:$src1, FP:$src2))]>;
+def FCMPLTU: AForm_DAG<0x03, 0x0b, (ops PR:$dst, FP:$src1, FP:$src2),
+          "fcmp.ltu $dst, p0 = $src1, $src2;;",
+	  [(set PR:$dst, (setult FP:$src1, FP:$src2))]>;
+def FCMPGTU: AForm_DAG<0x03, 0x0b, (ops PR:$dst, FP:$src1, FP:$src2),
+          "fcmp.gtu $dst, p0 = $src1, $src2;;",
+	  [(set PR:$dst, (setugt FP:$src1, FP:$src2))]>;
+def FCMPLEU: AForm_DAG<0x03, 0x0b, (ops PR:$dst, FP:$src1, FP:$src2),
+          "fcmp.leu $dst, p0 = $src1, $src2;;",
+	  [(set PR:$dst, (setule FP:$src1, FP:$src2))]>;
+def FCMPGEU: AForm_DAG<0x03, 0x0b, (ops PR:$dst, FP:$src1, FP:$src2),
+          "fcmp.geu $dst, p0 = $src1, $src2;;",
+	  [(set PR:$dst, (setuge FP:$src1, FP:$src2))]>;
+
 // TODO: support postincrement (reg, imm9) loads+stores - this needs more
 // tablegen support
 
 def PHI : PseudoInstIA64<(ops variable_ops), "PHI">;
 def IDEF : PseudoInstIA64<(ops variable_ops), "// IDEF">;
+
+def IDEF_GR_D : PseudoInstIA64_DAG<(ops GR:$reg), "// $reg = IDEF",
+    [(set GR:$reg, (undef))]>;
+def IDEF_FP_D : PseudoInstIA64_DAG<(ops FP:$reg), "// $reg = IDEF",
+    [(set FP:$reg, (undef))]>;
+def IDEF_PR_D : PseudoInstIA64_DAG<(ops PR:$reg), "// $reg = IDEF",
+    [(set PR:$reg, (undef))]>;
+
 def IUSE : PseudoInstIA64<(ops variable_ops), "// IUSE">;
 def ADJUSTCALLSTACKUP : PseudoInstIA64<(ops variable_ops),
                                         "// ADJUSTCALLSTACKUP">;
@@ -365,28 +405,6 @@
 
 def DEPZ : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src1, u6imm:$imm1, u6imm:$imm2),	  "dep.z $dst = $src1, $imm1, $imm2;;">;
 
-// and we do the whole thing again for FP compares!
-def FCMPEQ : AForm<0x03, 0x0b, (ops PR:$dst, FP:$src1, FP:$src2),
-  "fcmp.eq $dst, p0 = $src1, $src2;;">;
-def FCMPGT : AForm<0x03, 0x0b, (ops PR:$dst, FP:$src1, FP:$src2),
-  "fcmp.gt $dst, p0 = $src1, $src2;;">;
-def FCMPGE : AForm<0x03, 0x0b, (ops PR:$dst, FP:$src1, FP:$src2),
-  "fcmp.ge $dst, p0 = $src1, $src2;;">;
-def FCMPLT : AForm<0x03, 0x0b, (ops PR:$dst, FP:$src1, FP:$src2),
-  "fcmp.lt $dst, p0 = $src1, $src2;;">;
-def FCMPLE : AForm<0x03, 0x0b, (ops PR:$dst, FP:$src1, FP:$src2),
-  "fcmp.le $dst, p0 = $src1, $src2;;">;
-def FCMPNE : AForm<0x03, 0x0b, (ops PR:$dst, FP:$src1, FP:$src2),
-  "fcmp.neq $dst, p0 = $src1, $src2;;">;
-def FCMPLTU : AForm<0x03, 0x0b, (ops PR:$dst, FP:$src1, FP:$src2),
-  "fcmp.ltu $dst, p0 = $src1, $src2;;">;
-def FCMPGTU : AForm<0x03, 0x0b, (ops PR:$dst, FP:$src1, FP:$src2),
-  "fcmp.gtu $dst, p0 = $src1, $src2;;">;
-def FCMPLEU : AForm<0x03, 0x0b, (ops PR:$dst, FP:$src1, FP:$src2),
-  "fcmp.leu $dst, p0 = $src1, $src2;;">;
-def FCMPGEU : AForm<0x03, 0x0b, (ops PR:$dst, FP:$src1, FP:$src2),
-  "fcmp.geu $dst, p0 = $src1, $src2;;">;
-
 def PCMPEQOR : AForm<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2, PR:$qp),
   "($qp) cmp.eq.or $dst, p0 = $src1, $src2;;">;
 def PCMPEQUNC : AForm<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2, PR:$qp),