From lattner at cs.uiuc.edu  Mon Jan  9 01:58:12 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Mon, 9 Jan 2006 01:58:12 -0600
Subject: [llvm-commits] CVS: llvm/lib/VMCore/Dominators.cpp 
Message-ID: <200601090758.BAA00313@zion.cs.uiuc.edu>



Changes in directory llvm/lib/VMCore:

Dominators.cpp updated: 1.66 -> 1.67
---
Log message:

Bugfix for etforest updating.  Contributed by Daniel Berlin.


---
Diffs of the changes:  (+1 -1)

 Dominators.cpp |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/lib/VMCore/Dominators.cpp
diff -u llvm/lib/VMCore/Dominators.cpp:1.66 llvm/lib/VMCore/Dominators.cpp:1.67
--- llvm/lib/VMCore/Dominators.cpp:1.66	Sun Jan  8 02:20:27 2006
+++ llvm/lib/VMCore/Dominators.cpp	Mon Jan  9 01:58:01 2006
@@ -613,7 +613,7 @@
 
   // Find the leftmost occurrence in the rightmost subtree, then splay
   // around it.
-  for (right = rightmost->Right; rightmost->Left; rightmost = rightmost->Left);
+  for (right = rightmost->Right; right->Left; right = right->Left);
 
   right->Splay();
 





From lattner at cs.uiuc.edu  Mon Jan  9 02:03:19 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Mon, 9 Jan 2006 02:03:19 -0600
Subject: [llvm-commits] CVS: llvm/lib/Transforms/Utils/LoopSimplify.cpp 
Message-ID: <200601090803.CAA00419@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Transforms/Utils:

LoopSimplify.cpp updated: 1.61 -> 1.62
---
Log message:

Teach loopsimplify to update et-forest.  Patch contributed by Daniel Berlin!


---
Diffs of the changes:  (+19 -0)

 LoopSimplify.cpp |   19 +++++++++++++++++++
 1 files changed, 19 insertions(+)


Index: llvm/lib/Transforms/Utils/LoopSimplify.cpp
diff -u llvm/lib/Transforms/Utils/LoopSimplify.cpp:1.61 llvm/lib/Transforms/Utils/LoopSimplify.cpp:1.62
--- llvm/lib/Transforms/Utils/LoopSimplify.cpp:1.61	Fri Aug 12 20:30:36 2005
+++ llvm/lib/Transforms/Utils/LoopSimplify.cpp	Mon Jan  9 02:03:08 2006
@@ -69,6 +69,7 @@
       AU.addPreserved<LoopInfo>();
       AU.addPreserved<DominatorSet>();
       AU.addPreserved<ImmediateDominators>();
+      AU.addPreserved<ETForest>();
       AU.addPreserved<DominatorTree>();
       AU.addPreserved<DominanceFrontier>();
       AU.addPreservedID(BreakCriticalEdgesID);  // No critical edges added.
@@ -334,6 +335,7 @@
   // the old header.
   DominatorTree::Node *PHDomTreeNode =
     DT.createNewNode(NewBB, DT.getNode(Header)->getIDom());
+  BasicBlock *oldHeaderIDom = DT.getNode(Header)->getIDom()->getBlock();
 
   // Change the header node so that PNHode is the new immediate dominator
   DT.changeImmediateDominator(DT.getNode(Header), PHDomTreeNode);
@@ -359,6 +361,15 @@
     // The preheader now is the immediate dominator for the header node...
     ID->setImmediateDominator(Header, NewBB);
   }
+  
+  // Update ET Forest information if we have it...
+  if (ETForest *EF = getAnalysisToUpdate<ETForest>()) {
+    // Whatever i-dominated the header node now immediately dominates NewBB
+    EF->addNewBlock(NewBB, oldHeaderIDom);
+
+    // The preheader now is the immediate dominator for the header node...
+    EF->setImmediateDominator(Header, NewBB);
+  }
 
   // Update dominance frontier information...
   if (DominanceFrontier *DF = getAnalysisToUpdate<DominanceFrontier>()) {
@@ -762,6 +773,7 @@
         NewBBIDomNode = NewBBIDomNode->getIDom();
         assert(NewBBIDomNode && "No shared dominator found??");
       }
+      NewBBIDom = NewBBIDomNode->getBlock();
     }
 
     // Create the new dominator tree node... and set the idom of NewBB.
@@ -775,6 +787,13 @@
     }
   }
 
+  // Update ET-Forest information if it is active.
+  if (ETForest *EF = getAnalysisToUpdate<ETForest>()) {
+    EF->addNewBlock(NewBB, NewBBIDom);
+    if (NewBBDominatesNewBBSucc)
+      EF->setImmediateDominator(NewBBSucc, NewBB);
+  }
+
   // Update dominance frontier information...
   if (DominanceFrontier *DF = getAnalysisToUpdate<DominanceFrontier>()) {
     // If NewBB dominates NewBBSucc, then DF(NewBB) is now going to be the





From jlaskey at apple.com  Mon Jan  9 12:17:17 2006
From: jlaskey at apple.com (Jim Laskey)
Date: Mon, 9 Jan 2006 12:17:17 -0600
Subject: [llvm-commits] CVS: llvm-gcc/gcc/llvm-expand.c 
Message-ID: <200601091817.MAA11773@zion.cs.uiuc.edu>



Changes in directory llvm-gcc/gcc:

llvm-expand.c updated: 1.122 -> 1.123
---
Log message:

Include full source path for use by debug information.


---
Diffs of the changes:  (+1 -1)

 llvm-expand.c |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm-gcc/gcc/llvm-expand.c
diff -u llvm-gcc/gcc/llvm-expand.c:1.122 llvm-gcc/gcc/llvm-expand.c:1.123
--- llvm-gcc/gcc/llvm-expand.c:1.122	Fri Dec 16 16:17:32 2005
+++ llvm-gcc/gcc/llvm-expand.c	Mon Jan  9 12:17:05 2006
@@ -7900,7 +7900,7 @@
       *fileName = '\0';
       fileName++;
     } else {
-      path = ".";
+      path = getpwd();
       fileName = buf;
     }
 





From evan.cheng at apple.com  Mon Jan  9 12:27:17 2006
From: evan.cheng at apple.com (Evan Cheng)
Date: Mon, 9 Jan 2006 12:27:17 -0600
Subject: [llvm-commits] CVS: llvm/utils/TableGen/CodeGenInstruction.h
	CodeGenTarget.cpp DAGISelEmitter.cpp DAGISelEmitter.h 
Message-ID: <200601091827.MAA11901@zion.cs.uiuc.edu>



Changes in directory llvm/utils/TableGen:

CodeGenInstruction.h updated: 1.18 -> 1.19
CodeGenTarget.cpp updated: 1.52 -> 1.53
DAGISelEmitter.cpp updated: 1.127 -> 1.128
DAGISelEmitter.h updated: 1.49 -> 1.50
---
Log message:

* Remove instruction fields hasInFlag / hasOutFlag and added SNDPInFlag and
SNDPOutFlag to DAG nodes. These properties do not belong to target specific
instructions.
* Added DAG node property SNDPOptInFlag. It's same as SNDPInFlag except it's
optional. Used by ret / call, etc.


---
Diffs of the changes:  (+58 -46)

 CodeGenInstruction.h |    2 -
 CodeGenTarget.cpp    |    2 -
 DAGISelEmitter.cpp   |   97 +++++++++++++++++++++++++++++----------------------
 DAGISelEmitter.h     |    3 +
 4 files changed, 58 insertions(+), 46 deletions(-)


Index: llvm/utils/TableGen/CodeGenInstruction.h
diff -u llvm/utils/TableGen/CodeGenInstruction.h:1.18 llvm/utils/TableGen/CodeGenInstruction.h:1.19
--- llvm/utils/TableGen/CodeGenInstruction.h:1.18	Mon Dec 26 03:11:45 2005
+++ llvm/utils/TableGen/CodeGenInstruction.h	Mon Jan  9 12:27:06 2006
@@ -85,8 +85,6 @@
     bool usesCustomDAGSchedInserter;
     bool hasVariableNumberOfOperands;
     bool hasCtrlDep;
-    bool hasInFlag;
-    bool hasOutFlag;
     bool noResults;
 
     CodeGenInstruction(Record *R, const std::string &AsmStr);


Index: llvm/utils/TableGen/CodeGenTarget.cpp
diff -u llvm/utils/TableGen/CodeGenTarget.cpp:1.52 llvm/utils/TableGen/CodeGenTarget.cpp:1.53
--- llvm/utils/TableGen/CodeGenTarget.cpp:1.52	Mon Dec 26 03:11:45 2005
+++ llvm/utils/TableGen/CodeGenTarget.cpp	Mon Jan  9 12:27:06 2006
@@ -271,8 +271,6 @@
   hasDelaySlot = R->getValueAsBit("hasDelaySlot");
   usesCustomDAGSchedInserter = R->getValueAsBit("usesCustomDAGSchedInserter");
   hasCtrlDep   = R->getValueAsBit("hasCtrlDep");
-  hasInFlag    = R->getValueAsBit("hasInFlag");
-  hasOutFlag   = R->getValueAsBit("hasOutFlag");
   noResults    = R->getValueAsBit("noResults");
   hasVariableNumberOfOperands = false;
   


Index: llvm/utils/TableGen/DAGISelEmitter.cpp
diff -u llvm/utils/TableGen/DAGISelEmitter.cpp:1.127 llvm/utils/TableGen/DAGISelEmitter.cpp:1.128
--- llvm/utils/TableGen/DAGISelEmitter.cpp:1.127	Fri Jan  6 16:19:44 2006
+++ llvm/utils/TableGen/DAGISelEmitter.cpp	Mon Jan  9 12:27:06 2006
@@ -283,6 +283,12 @@
       Properties |= 1 << SDNPAssociative;
     } else if (PropList[i]->getName() == "SDNPHasChain") {
       Properties |= 1 << SDNPHasChain;
+    } else if (PropList[i]->getName() == "SDNPOutFlag") {
+      Properties |= 1 << SDNPOutFlag;
+    } else if (PropList[i]->getName() == "SDNPInFlag") {
+      Properties |= 1 << SDNPInFlag;
+    } else if (PropList[i]->getName() == "SDNPOptInFlag") {
+      Properties |= 1 << SDNPOptInFlag;
     } else {
       std::cerr << "Unknown SD Node property '" << PropList[i]->getName()
                 << "' on node '" << R->getName() << "'!\n";
@@ -1779,29 +1785,29 @@
   return N;
 }
 
-/// NodeHasChain - return true if TreePatternNode has the property
-/// 'hasChain', meaning it reads a ctrl-flow chain operand and writes
-/// a chain result.
-static bool NodeHasChain(TreePatternNode *N, DAGISelEmitter &ISE)
+/// NodeHasProperty - return true if TreePatternNode has the specified
+/// property.
+static bool NodeHasProperty(TreePatternNode *N, SDNodeInfo::SDNP Property,
+                            DAGISelEmitter &ISE)
 {
   if (N->isLeaf()) return false;
   Record *Operator = N->getOperator();
   if (!Operator->isSubClassOf("SDNode")) return false;
 
   const SDNodeInfo &NodeInfo = ISE.getSDNodeInfo(Operator);
-  return NodeInfo.hasProperty(SDNodeInfo::SDNPHasChain);
+  return NodeInfo.hasProperty(Property);
 }
 
-static bool PatternHasCtrlDep(TreePatternNode *N, DAGISelEmitter &ISE)
+static bool PatternHasProperty(TreePatternNode *N, SDNodeInfo::SDNP Property,
+                               DAGISelEmitter &ISE)
 {
-  if (NodeHasChain(N, ISE))
+  if (NodeHasProperty(N, Property, ISE))
     return true;
-  else {
-    for (unsigned i = 0, e = N->getNumChildren(); i != e; ++i) {
-      TreePatternNode *Child = N->getChild(i);
-      if (PatternHasCtrlDep(Child, ISE))
-        return true;
-    }
+
+  for (unsigned i = 0, e = N->getNumChildren(); i != e; ++i) {
+    TreePatternNode *Child = N->getChild(i);
+    if (PatternHasProperty(Child, Property, ISE))
+      return true;
   }
 
   return false;
@@ -1891,7 +1897,7 @@
 
     // Emit code to load the child nodes and match their contents recursively.
     unsigned OpNo = 0;
-    bool HasChain = NodeHasChain(N, ISE);
+    bool HasChain = NodeHasProperty(N, SDNodeInfo::SDNPHasChain, ISE);
     if (HasChain) {
       OpNo = 1;
       if (!isRoot) {
@@ -1919,7 +1925,7 @@
         OS << "      if (" << RootName << OpNo << ".getOpcode() != "
            << CInfo.getEnumName() << ") goto P" << PatternNo << "Fail;\n";
         EmitMatchCode(Child, RootName + utostr(OpNo), FoundChain);
-        if (NodeHasChain(Child, ISE)) {
+        if (NodeHasProperty(Child, SDNodeInfo::SDNPHasChain, ISE)) {
           FoldedChains.push_back(std::make_pair(RootName + utostr(OpNo),
                                                 CInfo.getNumResults()));
         }
@@ -2078,13 +2084,16 @@
       const DAGInstruction &Inst = ISE.getInstruction(Op);
       bool HasImpInputs  = Inst.getNumImpOperands() > 0;
       bool HasImpResults = Inst.getNumImpResults() > 0;
-      bool HasInFlag  = II.hasInFlag  || HasImpInputs;
-      bool HasOutFlag = II.hasOutFlag || HasImpResults;
-      bool HasChain   = II.hasCtrlDep;
-
-      if (isRoot && PatternHasCtrlDep(Pattern, ISE))
-        HasChain = true;
-      if (HasInFlag || HasOutFlag)
+      bool HasOptInFlag  = isRoot &&
+        NodeHasProperty(Pattern, SDNodeInfo::SDNPOptInFlag, ISE);
+      bool HasInFlag  = isRoot &&
+        NodeHasProperty(Pattern, SDNodeInfo::SDNPInFlag, ISE);
+      bool HasOutFlag = HasImpResults ||
+        (isRoot && PatternHasProperty(Pattern, SDNodeInfo::SDNPOutFlag, ISE));
+      bool HasChain   = II.hasCtrlDep ||
+        (isRoot && PatternHasProperty(Pattern, SDNodeInfo::SDNPHasChain, ISE));
+
+      if (HasOutFlag || HasInFlag || HasOptInFlag || HasImpInputs)
         OS << "      SDOperand InFlag = SDOperand(0, 0);\n";
 
       // Determine operand emission order. Complex pattern first.
@@ -2121,8 +2130,16 @@
       // Emit all the chain and CopyToReg stuff.
       if (HasChain)
         OS << "      Chain = Select(Chain);\n";
-      if (HasInFlag)
-        EmitInFlags(Pattern, "N", HasChain, II.hasInFlag, true);
+      if (HasImpInputs)
+        EmitCopyToRegs(Pattern, "N", HasChain, true);
+      if (HasInFlag || HasOptInFlag) {
+        unsigned FlagNo = (unsigned) HasChain + Pattern->getNumChildren();
+        if (HasOptInFlag)
+          OS << "      if (N.getNumOperands() == " << FlagNo+1 << ") ";
+        else
+          OS << "      ";
+        OS << "InFlag = Select(N.getOperand(" << FlagNo << "));\n";
+      }
 
       unsigned NumResults = Inst.getNumResults();    
       unsigned ResNo = TmpNo++;
@@ -2164,7 +2181,7 @@
         for (unsigned i = 0, e = Ops.size(); i != e; ++i)
           OS << ", Tmp" << Ops[i];
         if (HasChain)  OS << ", Chain";
-        if (HasInFlag) OS << ", InFlag";
+        if (HasInFlag || HasImpInputs) OS << ", InFlag";
         OS << ");\n";
 
         unsigned ValNo = 0;
@@ -2191,8 +2208,10 @@
         }
 
         // User does not expect that the instruction produces a chain!
-        bool AddedChain = HasChain && !NodeHasChain(Pattern, ISE);
-        if (NodeHasChain(Pattern, ISE))
+        bool NodeHasChain =
+          NodeHasProperty(Pattern, SDNodeInfo::SDNPHasChain, ISE);
+        bool AddedChain = HasChain && !NodeHasChain;
+        if (NodeHasChain)
           OS << "      CodeGenMap[N.getValue(" << ValNo++  << ")] = Chain;\n";
 
         if (FoldedChains.size() > 0) {
@@ -2230,7 +2249,7 @@
           OS << ", MVT::Flag";
         for (unsigned i = 0, e = Ops.size(); i != e; ++i)
           OS << ", Tmp" << Ops[i];
-        if (HasInFlag)
+        if (HasInFlag || HasImpInputs)
           OS << ", InFlag";
         OS << ");\n";
         OS << "      } else {\n";
@@ -2242,7 +2261,7 @@
           OS << ", MVT::Flag";
         for (unsigned i = 0, e = Ops.size(); i != e; ++i)
           OS << ", Tmp" << Ops[i];
-        if (HasInFlag)
+        if (HasInFlag || HasImpInputs)
           OS << ", InFlag";
         OS << ");\n";
         OS << "      }\n";
@@ -2282,7 +2301,8 @@
       return true;
     }
   
-    unsigned OpNo = (unsigned) NodeHasChain(Pat, ISE);
+    unsigned OpNo =
+      (unsigned) NodeHasProperty(Pat, SDNodeInfo::SDNPHasChain, ISE);
     for (unsigned i = 0, e = Pat->getNumChildren(); i != e; ++i, ++OpNo)
       if (InsertOneTypeCheck(Pat->getChild(i), Other->getChild(i),
                              Prefix + utostr(OpNo)))
@@ -2291,16 +2311,17 @@
   }
 
 private:
-  /// EmitInFlags - Emit the flag operands for the DAG that is
+  /// EmitCopyToRegs - Emit the flag operands for the DAG that is
   /// being built.
-  void EmitInFlags(TreePatternNode *N, const std::string &RootName,
-                   bool HasChain, bool HasInFlag, bool isRoot = false) {
+  void EmitCopyToRegs(TreePatternNode *N, const std::string &RootName,
+                      bool HasChain, bool isRoot = false) {
     const CodeGenTarget &T = ISE.getTargetInfo();
-    unsigned OpNo = (unsigned) NodeHasChain(N, ISE);
+    unsigned OpNo =
+      (unsigned) NodeHasProperty(N, SDNodeInfo::SDNPHasChain, ISE);
     for (unsigned i = 0, e = N->getNumChildren(); i != e; ++i, ++OpNo) {
       TreePatternNode *Child = N->getChild(i);
       if (!Child->isLeaf()) {
-        EmitInFlags(Child, RootName + utostr(OpNo), HasChain, HasInFlag);
+        EmitCopyToRegs(Child, RootName + utostr(OpNo), HasChain);
       } else {
         if (DefInit *DI = dynamic_cast<DefInit*>(Child->getLeafValue())) {
           Record *RR = DI->getDef();
@@ -2330,12 +2351,6 @@
         }
       }
     }
-
-    if (isRoot && HasInFlag) {
-      OS << "      SDOperand " << RootName << OpNo << " = " << RootName
-         << ".getOperand(" << OpNo << ");\n";
-      OS << "      InFlag = Select(" << RootName << OpNo << ");\n";
-    }
   }
 
   /// EmitCopyFromRegs - Emit code to copy result to physical registers


Index: llvm/utils/TableGen/DAGISelEmitter.h
diff -u llvm/utils/TableGen/DAGISelEmitter.h:1.49 llvm/utils/TableGen/DAGISelEmitter.h:1.50
--- llvm/utils/TableGen/DAGISelEmitter.h:1.49	Thu Dec 29 18:12:56 2005
+++ llvm/utils/TableGen/DAGISelEmitter.h	Mon Jan  9 12:27:06 2006
@@ -102,7 +102,8 @@
     }
     
     // SelectionDAG node properties.
-    enum SDNP { SDNPCommutative, SDNPAssociative, SDNPHasChain };
+    enum SDNP { SDNPCommutative, SDNPAssociative, SDNPHasChain,
+                SDNPOutFlag, SDNPInFlag, SDNPOptInFlag  };
 
     /// hasProperty - Return true if this node has the specified property.
     ///





From evan.cheng at apple.com  Mon Jan  9 12:28:34 2006
From: evan.cheng at apple.com (Evan Cheng)
Date: Mon, 9 Jan 2006 12:28:34 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/Target.td TargetSelectionDAG.td
Message-ID: <200601091828.MAA11925@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target:

Target.td updated: 1.67 -> 1.68
TargetSelectionDAG.td updated: 1.41 -> 1.42
---
Log message:

New DAG node properties SNDPInFlag, SNDPOutFlag, and SNDPOptInFlag to replace
hasInFlag, hasOutFlag.


---
Diffs of the changes:  (+3 -2)

 Target.td             |    2 --
 TargetSelectionDAG.td |    3 +++
 2 files changed, 3 insertions(+), 2 deletions(-)


Index: llvm/lib/Target/Target.td
diff -u llvm/lib/Target/Target.td:1.67 llvm/lib/Target/Target.td:1.68
--- llvm/lib/Target/Target.td:1.67	Mon Dec 26 03:11:44 2005
+++ llvm/lib/Target/Target.td	Mon Jan  9 12:28:21 2006
@@ -169,8 +169,6 @@
   bit hasDelaySlot = 0;     // Does this instruction have an delay slot?
   bit usesCustomDAGSchedInserter = 0; // Pseudo instr needing special help.
   bit hasCtrlDep   = 0;     // Does this instruction r/w ctrl-flow chains?
-  bit hasInFlag    = 0;     // Does this instruction read a flag operand?
-  bit hasOutFlag   = 0;     // Does this instruction write a flag operand?
   bit noResults    = 0;     // Does this instruction produce no results?
   
   InstrItinClass Itinerary; // Execution steps used for scheduling. 


Index: llvm/lib/Target/TargetSelectionDAG.td
diff -u llvm/lib/Target/TargetSelectionDAG.td:1.41 llvm/lib/Target/TargetSelectionDAG.td:1.42
--- llvm/lib/Target/TargetSelectionDAG.td:1.41	Wed Jan  4 20:07:49 2006
+++ llvm/lib/Target/TargetSelectionDAG.td	Mon Jan  9 12:28:21 2006
@@ -174,6 +174,9 @@
 def SDNPCommutative : SDNodeProperty;   // X op Y == Y op X
 def SDNPAssociative : SDNodeProperty;   // (X op Y) op Z == X op (Y op Z)
 def SDNPHasChain    : SDNodeProperty;   // R/W chain operand and result
+def SDNPOutFlag     : SDNodeProperty;   // Write a flag result
+def SDNPInFlag      : SDNodeProperty;   // Read a flag operand
+def SDNPOptInFlag   : SDNodeProperty;   // Optionally read a flag operand
 
 //===----------------------------------------------------------------------===//
 // Selection DAG Node definitions.





From evan.cheng at apple.com  Mon Jan  9 12:28:34 2006
From: evan.cheng at apple.com (Evan Cheng)
Date: Mon, 9 Jan 2006 12:28:34 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/SparcV8/SparcV8InstrInfo.td
	SparcV8RegisterInfo.cpp 
Message-ID: <200601091828.MAA11937@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/SparcV8:

SparcV8InstrInfo.td updated: 1.97 -> 1.98
SparcV8RegisterInfo.cpp updated: 1.32 -> 1.33
---
Log message:

New DAG node properties SNDPInFlag, SNDPOutFlag, and SNDPOptInFlag to replace
hasInFlag, hasOutFlag.


---
Diffs of the changes:  (+7 -13)

 SparcV8InstrInfo.td     |   17 ++++++-----------
 SparcV8RegisterInfo.cpp |    3 +--
 2 files changed, 7 insertions(+), 13 deletions(-)


Index: llvm/lib/Target/SparcV8/SparcV8InstrInfo.td
diff -u llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.97 llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.98
--- llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.97	Mon Dec 26 03:11:45 2005
+++ llvm/lib/Target/SparcV8/SparcV8InstrInfo.td	Mon Jan  9 12:28:21 2006
@@ -94,10 +94,12 @@
 def callseq_end   : SDNode<"ISD::CALLSEQ_END",   SDT_V8CallSeq, [SDNPHasChain]>;
 
 def SDT_V8Call    : SDTypeProfile<0, 1, [SDTCisVT<0, i32>]>;
-def call          : SDNode<"ISD::CALL", SDT_V8Call, [SDNPHasChain]>;
+def call          : SDNode<"ISD::CALL", SDT_V8Call,
+	                   [SDNPHasChain, SDNPOptInFlag, SDNPOutFlag]>;
 
 def SDT_V8RetFlag : SDTypeProfile<0, 0, []>;
-def retflag       : SDNode<"V8ISD::RET_FLAG", SDT_V8RetFlag, [SDNPHasChain]>;
+def retflag       : SDNode<"V8ISD::RET_FLAG", SDT_V8RetFlag,
+	                   [SDNPHasChain, SDNPOptInFlag]>;
 
 //===----------------------------------------------------------------------===//
 // Instructions
@@ -173,10 +175,7 @@
 // special cases of JMPL:
 let isReturn = 1, isTerminator = 1, hasDelaySlot = 1, noResults = 1 in {
   let rd = O7.Num, rs1 = G0.Num, simm13 = 8 in
-    // FIXME: temporary workaround for return without an incoming flag.
-    def RETVOID: F3_2<2, 0b111000, (ops), "retl", [(ret)]>;
-    let hasInFlag = 1 in
-      def RETL: F3_2<2, 0b111000, (ops), "retl", []>;
+    def RETL: F3_2<2, 0b111000, (ops), "retl", [(retflag)]>;
 }
 
 // Section B.1 - Load Integer Instructions, p. 90
@@ -563,7 +562,7 @@
 // Section B.24 - Call and Link Instruction, p. 125
 // This is the only Format 1 instruction
 let Uses = [O0, O1, O2, O3, O4, O5],
-    hasDelaySlot = 1, isCall = 1, hasInFlag = 1, hasOutFlag = 1, noResults = 1,
+    hasDelaySlot = 1, isCall = 1, noResults = 1,
     Defs = [O0, O1, O2, O3, O4, O5, O7, G1, G2, G3, G4, G5, G6, G7,
     D0, D1, D2, D3, D4, D5, D6, D7, D8, D9, D10, D11, D12, D13, D14, D15] in { 
   def CALL : InstV8<(ops calltarget:$dst),
@@ -725,10 +724,6 @@
 def : Pat<(V8hi tconstpool:$in), (SETHIi tconstpool:$in)>;
 def : Pat<(V8lo tconstpool:$in), (ORri G0, tconstpool:$in)>;
 
-// Return of a value, which has an input flag.
-def : Pat<(retflag), (RETL)>;
-
-
 // Calls: 
 def : Pat<(call tglobaladdr:$dst),
           (CALL tglobaladdr:$dst)>;


Index: llvm/lib/Target/SparcV8/SparcV8RegisterInfo.cpp
diff -u llvm/lib/Target/SparcV8/SparcV8RegisterInfo.cpp:1.32 llvm/lib/Target/SparcV8/SparcV8RegisterInfo.cpp:1.33
--- llvm/lib/Target/SparcV8/SparcV8RegisterInfo.cpp:1.32	Fri Dec 23 16:14:32 2005
+++ llvm/lib/Target/SparcV8/SparcV8RegisterInfo.cpp	Mon Jan  9 12:28:21 2006
@@ -165,8 +165,7 @@
 void SparcV8RegisterInfo::emitEpilogue(MachineFunction &MF,
                                        MachineBasicBlock &MBB) const {
   MachineBasicBlock::iterator MBBI = prior(MBB.end());
-  // FIXME: RETVOID should be removed. See SparcV8InstrInfo.td
-  assert((MBBI->getOpcode() == V8::RETL || MBBI->getOpcode() == V8::RETVOID) &&
+  assert(MBBI->getOpcode() == V8::RETL &&
          "Can only put epilog before 'retl' instruction!");
   BuildMI(MBB, MBBI, V8::RESTORErr, 2, V8::G0).addReg(V8::G0).addReg(V8::G0);
 }





From evan.cheng at apple.com  Mon Jan  9 12:28:34 2006
From: evan.cheng at apple.com (Evan Cheng)
Date: Mon, 9 Jan 2006 12:28:34 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCInstrInfo.td
	PPCRegisterInfo.cpp 
Message-ID: <200601091828.MAA11931@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/PowerPC:

PPCInstrInfo.td updated: 1.169 -> 1.170
PPCRegisterInfo.cpp updated: 1.38 -> 1.39
---
Log message:

New DAG node properties SNDPInFlag, SNDPOutFlag, and SNDPOptInFlag to replace
hasInFlag, hasOutFlag.


---
Diffs of the changes:  (+6 -11)

 PPCInstrInfo.td     |   14 +++++---------
 PPCRegisterInfo.cpp |    3 +--
 2 files changed, 6 insertions(+), 11 deletions(-)


Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td
diff -u llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.169 llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.170
--- llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.169	Wed Jan  4 19:25:28 2006
+++ llvm/lib/Target/PowerPC/PPCInstrInfo.td	Mon Jan  9 12:28:21 2006
@@ -47,7 +47,8 @@
 def callseq_end   : SDNode<"ISD::CALLSEQ_END",   SDT_PPCCallSeq,[SDNPHasChain]>;
 
 def SDT_PPCRetFlag : SDTypeProfile<0, 0, []>;
-def retflag       : SDNode<"PPCISD::RET_FLAG", SDT_PPCRetFlag, [SDNPHasChain]>;
+def retflag       : SDNode<"PPCISD::RET_FLAG", SDT_PPCRetFlag,
+	                   [SDNPHasChain, SDNPOptInFlag]>;
 
 //===----------------------------------------------------------------------===//
 // PowerPC specific transformation functions and pattern fragments.
@@ -222,13 +223,10 @@
 }
 
 
-let isTerminator = 1 in {
+let isTerminator = 1, noResults = 1 in {
   // FIXME: temporary workaround for return without an incoming flag.
-  let isReturn = 1, noResults = 1 in
-    def BLRVOID : XLForm_2_ext<19, 16, 20, 0, 0, (ops), "blr", BrB, [(ret)]>;
-  let isReturn = 1, noResults = 1, hasInFlag = 1 in
-    def BLR : XLForm_2_ext<19, 16, 20, 0, 0, (ops), "blr", BrB, []>;
-  let noResults = 1 in
+  let isReturn = 1 in
+    def BLR : XLForm_2_ext<19, 16, 20, 0, 0, (ops), "blr", BrB, [(retflag)]>;
   def BCTR : XLForm_2_ext<19, 528, 20, 0, 0, (ops), "bctr", BrB, []>;
 }
 
@@ -1072,8 +1070,6 @@
 def : Pat<(store (v4i32 VRRC:$rS), xoaddr:$dst),
           (STVX (v4i32 VRRC:$rS), xoaddr:$dst)>;
 
-def : Pat<(retflag), (BLR)>;
-
 // Same as above, but using a temporary. FIXME: implement temporaries :)
 /*
 def : Pattern<(xor GPRC:$in, imm:$imm),


Index: llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
diff -u llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.38 llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.39
--- llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.38	Fri Dec 23 16:14:32 2005
+++ llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp	Mon Jan  9 12:28:21 2006
@@ -373,8 +373,7 @@
   const MachineFrameInfo *MFI = MF.getFrameInfo();
   MachineBasicBlock::iterator MBBI = prior(MBB.end());
   MachineInstr *MI;
-  // FIXME: BLRVOID should be removed. See PPCInstrInfo.td
-  assert((MBBI->getOpcode() == PPC::BLR || MBBI->getOpcode() == PPC::BLRVOID) &&
+  assert(MBBI->getOpcode() == PPC::BLR &&
          "Can only insert epilog into returning blocks");
 
   // Get the number of bytes allocated from the FrameInfo...





From evan.cheng at apple.com  Mon Jan  9 12:29:30 2006
From: evan.cheng at apple.com (Evan Cheng)
Date: Mon, 9 Jan 2006 12:29:30 -0600
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp 
Message-ID: <200601091829.MAA11954@zion.cs.uiuc.edu>



Changes in directory llvm/lib/CodeGen/SelectionDAG:

SelectionDAG.cpp updated: 1.234 -> 1.235
---
Log message:

New getNode() variants.


---
Diffs of the changes:  (+0 -14)

 SelectionDAG.cpp |   14 --------------
 1 files changed, 14 deletions(-)


Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.234 llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.235
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.234	Wed Jan  4 19:25:28 2006
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp	Mon Jan  9 12:29:18 2006
@@ -1200,20 +1200,6 @@
   return getNode(Opcode, VT, Ops);
 }
 
-SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
-                                SDOperand N1, SDOperand N2, SDOperand N3,
-                                SDOperand N4, SDOperand N5, SDOperand N6) {
-  std::vector<SDOperand> Ops;
-  Ops.reserve(6);
-  Ops.push_back(N1);
-  Ops.push_back(N2);
-  Ops.push_back(N3);
-  Ops.push_back(N4);
-  Ops.push_back(N5);
-  Ops.push_back(N6);
-  return getNode(Opcode, VT, Ops);
-}
-
 // setAdjCallChain - This method changes the token chain of an
 // CALLSEQ_START/END node to be the specified operand.
 void SDNode::setAdjCallChain(SDOperand N) {





From evan.cheng at apple.com  Mon Jan  9 12:29:30 2006
From: evan.cheng at apple.com (Evan Cheng)
Date: Mon, 9 Jan 2006 12:29:30 -0600
Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/SelectionDAG.h 
Message-ID: <200601091829.MAA11958@zion.cs.uiuc.edu>



Changes in directory llvm/include/llvm/CodeGen:

SelectionDAG.h updated: 1.83 -> 1.84
---
Log message:

New getNode() variants.


---
Diffs of the changes:  (+61 -4)

 SelectionDAG.h |   65 +++++++++++++++++++++++++++++++++++++++++++++++++++++----
 1 files changed, 61 insertions(+), 4 deletions(-)


Index: llvm/include/llvm/CodeGen/SelectionDAG.h
diff -u llvm/include/llvm/CodeGen/SelectionDAG.h:1.83 llvm/include/llvm/CodeGen/SelectionDAG.h:1.84
--- llvm/include/llvm/CodeGen/SelectionDAG.h:1.83	Wed Jan  4 16:28:25 2006
+++ llvm/include/llvm/CodeGen/SelectionDAG.h	Mon Jan  9 12:29:18 2006
@@ -243,9 +243,6 @@
                     SDOperand N1, SDOperand N2, SDOperand N3, SDOperand N4,
                     SDOperand N5);
   SDOperand getNode(unsigned Opcode, MVT::ValueType VT,
-                    SDOperand N1, SDOperand N2, SDOperand N3, SDOperand N4,
-                    SDOperand N5, SDOperand N6);
-  SDOperand getNode(unsigned Opcode, MVT::ValueType VT,
                     std::vector<SDOperand> &Children);
   SDOperand getNode(unsigned Opcode, std::vector<MVT::ValueType> &ResultTys,
                     std::vector<SDOperand> &Ops);
@@ -357,7 +354,30 @@
   SDOperand getTargetNode(unsigned Opcode, MVT::ValueType VT,
                           SDOperand Op1, SDOperand Op2, SDOperand Op3,
                           SDOperand Op4, SDOperand Op5, SDOperand Op6) {
-    return getNode(ISD::BUILTIN_OP_END+Opcode, VT, Op1, Op2, Op3, Op4, Op5, Op6);
+    std::vector<SDOperand> Ops;
+    Ops.reserve(6);
+    Ops.push_back(Op1);
+    Ops.push_back(Op2);
+    Ops.push_back(Op3);
+    Ops.push_back(Op4);
+    Ops.push_back(Op5);
+    Ops.push_back(Op6);
+    return getNode(ISD::BUILTIN_OP_END+Opcode, VT, Ops);
+  }
+  SDOperand getTargetNode(unsigned Opcode, MVT::ValueType VT,
+                          SDOperand Op1, SDOperand Op2, SDOperand Op3,
+                          SDOperand Op4, SDOperand Op5, SDOperand Op6,
+                          SDOperand Op7) {
+    std::vector<SDOperand> Ops;
+    Ops.reserve(7);
+    Ops.push_back(Op1);
+    Ops.push_back(Op2);
+    Ops.push_back(Op3);
+    Ops.push_back(Op4);
+    Ops.push_back(Op5);
+    Ops.push_back(Op6);
+    Ops.push_back(Op7);
+    return getNode(ISD::BUILTIN_OP_END+Opcode, VT, Ops);
   }
   SDOperand getTargetNode(unsigned Opcode, MVT::ValueType VT,
                           std::vector<SDOperand> &Ops) {
@@ -454,6 +474,43 @@
     Ops.push_back(Op7);
    return getNode(ISD::BUILTIN_OP_END+Opcode, ResultTys, Ops);
   }
+  SDOperand getTargetNode(unsigned Opcode, MVT::ValueType VT1,
+                          MVT::ValueType VT2, MVT::ValueType VT3,
+                          SDOperand Op1, SDOperand Op2,
+                          SDOperand Op3, SDOperand Op4, SDOperand Op5,
+                          SDOperand Op6) {
+    std::vector<MVT::ValueType> ResultTys;
+    ResultTys.push_back(VT1);
+    ResultTys.push_back(VT2);
+    ResultTys.push_back(VT3);
+    std::vector<SDOperand> Ops;
+    Ops.push_back(Op1);
+    Ops.push_back(Op2);
+    Ops.push_back(Op3);
+    Ops.push_back(Op4);
+    Ops.push_back(Op5);
+    Ops.push_back(Op6);
+    return getNode(ISD::BUILTIN_OP_END+Opcode, ResultTys, Ops);
+  }
+  SDOperand getTargetNode(unsigned Opcode, MVT::ValueType VT1,
+                          MVT::ValueType VT2, MVT::ValueType VT3,
+                          SDOperand Op1, SDOperand Op2,
+                          SDOperand Op3, SDOperand Op4, SDOperand Op5,
+                          SDOperand Op6, SDOperand Op7) {
+    std::vector<MVT::ValueType> ResultTys;
+    ResultTys.push_back(VT1);
+    ResultTys.push_back(VT2);
+    ResultTys.push_back(VT3);
+    std::vector<SDOperand> Ops;
+    Ops.push_back(Op1);
+    Ops.push_back(Op2);
+    Ops.push_back(Op3);
+    Ops.push_back(Op4);
+    Ops.push_back(Op5);
+    Ops.push_back(Op6);
+    Ops.push_back(Op7);
+    return getNode(ISD::BUILTIN_OP_END+Opcode, ResultTys, Ops);
+  }
   SDOperand getTargetNode(unsigned Opcode, MVT::ValueType VT1, 
                           MVT::ValueType VT2, std::vector<SDOperand> &Ops) {
     std::vector<MVT::ValueType> ResultTys;





From evan.cheng at apple.com  Mon Jan  9 12:32:11 2006
From: evan.cheng at apple.com (Evan Cheng)
Date: Mon, 9 Jan 2006 12:32:11 -0600
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp 
Message-ID: <200601091832.MAA12026@zion.cs.uiuc.edu>



Changes in directory llvm/lib/CodeGen/SelectionDAG:

LegalizeDAG.cpp updated: 1.255 -> 1.256
---
Log message:

* Allow custom lowering of ADD_PARTS, SUB_PARTS, SHL_PARTS, SRA_PARTS,
and SRL_PARTS.
* Fix a bug that caused *_PARTS to be custom lowered twice.


---
Diffs of the changes:  (+46 -11)

 LegalizeDAG.cpp |   57 +++++++++++++++++++++++++++++++++++++++++++++-----------
 1 files changed, 46 insertions(+), 11 deletions(-)


Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.255 llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.256
--- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.255	Thu Jan  5 23:47:48 2006
+++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp	Mon Jan  9 12:31:59 2006
@@ -1969,6 +1969,28 @@
       Result = DAG.getNode(Node->getOpcode(), VTs, Ops);
     }
 
+    switch (TLI.getOperationAction(Node->getOpcode(),
+                                   Node->getValueType(0))) {
+    default: assert(0 && "This action is not supported yet!");
+    case TargetLowering::Custom: {
+      SDOperand Tmp = TLI.LowerOperation(Result, DAG);
+      if (Tmp.Val) {
+        SDOperand Tmp2, RetVal;
+        for (unsigned i = 0, e = Node->getNumValues(); i != e; ++i) {
+          Tmp2 = LegalizeOp(Tmp.getValue(i));
+          AddLegalizedOperand(SDOperand(Node, i), Tmp2);
+          if (i == Op.ResNo)
+            RetVal = Tmp;
+        }
+        return RetVal;
+      }
+      // FALLTHROUGH if the target thinks it is legal.
+    }
+    case TargetLowering::Legal:
+      // Nothing to do.
+      break;
+    }
+
     // Since these produce multiple values, make sure to remember that we
     // legalized all of them.
     for (unsigned i = 0, e = Node->getNumValues(); i != e; ++i)
@@ -3888,7 +3910,7 @@
       Lo = ExpandLibCall("__fixunsdfdi", Node, Hi);
     break;
 
-  case ISD::SHL:
+  case ISD::SHL: {
     // If the target wants custom lowering, do so.
     if (TLI.getOperationAction(ISD::SHL, VT) == TargetLowering::Custom) {
       SDOperand Op = DAG.getNode(ISD::SHL, VT, Node->getOperand(0),
@@ -3907,7 +3929,10 @@
       break;
 
     // If this target supports SHL_PARTS, use it.
-    if (TLI.isOperationLegal(ISD::SHL_PARTS, NVT)) {
+    TargetLowering::LegalizeAction Action =
+      TLI.getOperationAction(ISD::SHL_PARTS, NVT);
+    if ((Action == TargetLowering::Legal && TLI.isTypeLegal(NVT)) ||
+        Action == TargetLowering::Custom) {
       ExpandShiftParts(ISD::SHL_PARTS, Node->getOperand(0), Node->getOperand(1),
                        Lo, Hi);
       break;
@@ -3916,8 +3941,9 @@
     // Otherwise, emit a libcall.
     Lo = ExpandLibCall("__ashldi3", Node, Hi);
     break;
+  }
 
-  case ISD::SRA:
+  case ISD::SRA: {
     // If the target wants custom lowering, do so.
     if (TLI.getOperationAction(ISD::SRA, VT) == TargetLowering::Custom) {
       SDOperand Op = DAG.getNode(ISD::SRA, VT, Node->getOperand(0),
@@ -3936,7 +3962,10 @@
       break;
 
     // If this target supports SRA_PARTS, use it.
-    if (TLI.isOperationLegal(ISD::SRA_PARTS, NVT)) {
+    TargetLowering::LegalizeAction Action =
+      TLI.getOperationAction(ISD::SRA_PARTS, NVT);
+    if ((Action == TargetLowering::Legal && TLI.isTypeLegal(NVT)) ||
+        Action == TargetLowering::Custom) {
       ExpandShiftParts(ISD::SRA_PARTS, Node->getOperand(0), Node->getOperand(1),
                        Lo, Hi);
       break;
@@ -3945,7 +3974,9 @@
     // Otherwise, emit a libcall.
     Lo = ExpandLibCall("__ashrdi3", Node, Hi);
     break;
-  case ISD::SRL:
+  }
+
+  case ISD::SRL: {
     // If the target wants custom lowering, do so.
     if (TLI.getOperationAction(ISD::SRL, VT) == TargetLowering::Custom) {
       SDOperand Op = DAG.getNode(ISD::SRL, VT, Node->getOperand(0),
@@ -3964,7 +3995,10 @@
       break;
 
     // If this target supports SRL_PARTS, use it.
-    if (TLI.isOperationLegal(ISD::SRL_PARTS, NVT)) {
+    TargetLowering::LegalizeAction Action =
+      TLI.getOperationAction(ISD::SRL_PARTS, NVT);
+    if ((Action == TargetLowering::Legal && TLI.isTypeLegal(NVT)) ||
+        Action == TargetLowering::Custom) {
       ExpandShiftParts(ISD::SRL_PARTS, Node->getOperand(0), Node->getOperand(1),
                        Lo, Hi);
       break;
@@ -3973,6 +4007,7 @@
     // Otherwise, emit a libcall.
     Lo = ExpandLibCall("__lshrdi3", Node, Hi);
     break;
+  }
 
   case ISD::ADD:
     ExpandByParts(ISD::ADD_PARTS, Node->getOperand(0), Node->getOperand(1),
@@ -4021,17 +4056,17 @@
   case ISD::UREM: Lo = ExpandLibCall("__umoddi3", Node, Hi); break;
   }
 
-  // Remember in a map if the values will be reused later.
-  bool isNew = ExpandedNodes.insert(std::make_pair(Op,
-                                          std::make_pair(Lo, Hi))).second;
-  assert(isNew && "Value already expanded?!?");
-  
   // Make sure the resultant values have been legalized themselves, unless this
   // is a type that requires multi-step expansion.
   if (getTypeAction(NVT) != Expand && NVT != MVT::isVoid) {
     Lo = LegalizeOp(Lo);
     Hi = LegalizeOp(Hi);
   }
+
+  // Remember in a map if the values will be reused later.
+  bool isNew =
+    ExpandedNodes.insert(std::make_pair(Op, std::make_pair(Lo, Hi))).second;
+  assert(isNew && "Value already expanded?!?");
 }
 
 





From evan.cheng at apple.com  Mon Jan  9 12:33:40 2006
From: evan.cheng at apple.com (Evan Cheng)
Date: Mon, 9 Jan 2006 12:33:40 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp
	X86ISelLowering.h X86InstrInfo.td X86RegisterInfo.cpp 
Message-ID: <200601091833.MAA12085@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/X86:

X86ISelLowering.cpp updated: 1.22 -> 1.23
X86ISelLowering.h updated: 1.11 -> 1.12
X86InstrInfo.td updated: 1.190 -> 1.191
X86RegisterInfo.cpp updated: 1.116 -> 1.117
---
Log message:

Support for ADD_PARTS, SUB_PARTS, SHL_PARTS, SHR_PARTS, and SRA_PARTS.


---
Diffs of the changes:  (+313 -103)

 X86ISelLowering.cpp |  126 ++++++++++++++++++++++--
 X86ISelLowering.h   |   21 +++-
 X86InstrInfo.td     |  267 ++++++++++++++++++++++++++++++++++------------------
 X86RegisterInfo.cpp |    2 
 4 files changed, 313 insertions(+), 103 deletions(-)


Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.22 llvm/lib/Target/X86/X86ISelLowering.cpp:1.23
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.22	Thu Jan  5 18:43:03 2006
+++ llvm/lib/Target/X86/X86ISelLowering.cpp	Mon Jan  9 12:33:28 2006
@@ -133,6 +133,12 @@
     setOperationAction(ISD::RET            , MVT::Other, Custom);
     // Darwin ABI issue.
     setOperationAction(ISD::GlobalAddress  , MVT::i32  , Custom);
+    // 64-bit addm sub, shl, sra, srl (iff 32-bit x86)
+    setOperationAction(ISD::ADD_PARTS      , MVT::i32  , Custom);
+    setOperationAction(ISD::SUB_PARTS      , MVT::i32  , Custom);
+    setOperationAction(ISD::SHL_PARTS      , MVT::i32  , Custom);
+    setOperationAction(ISD::SRA_PARTS      , MVT::i32  , Custom);
+    setOperationAction(ISD::SRL_PARTS      , MVT::i32  , Custom);
   }
 
   // We don't have line number support yet.
@@ -243,13 +249,13 @@
     case MVT::f32:
     case MVT::f64:
       if (!X86ScalarSSE) {
+        if (OpVT == MVT::f32)
+          Op = DAG.getNode(ISD::FP_EXTEND, MVT::f64, Op);
         std::vector<MVT::ValueType> Tys;
         Tys.push_back(MVT::Other);
         Tys.push_back(MVT::Flag);
         std::vector<SDOperand> Ops;
         Ops.push_back(Chain);
-        if (OpVT == MVT::f32)
-          Op = DAG.getNode(ISD::FP_EXTEND, MVT::f64, Op);
         Ops.push_back(Op);
         Copy = DAG.getNode(X86ISD::FP_SET_RESULT, Tys, Ops);
       } else {
@@ -476,7 +482,6 @@
     std::vector<MVT::ValueType> NodeTys;
     NodeTys.push_back(MVT::Other);   // Returns a chain
     NodeTys.push_back(MVT::Flag);    // Returns a flag for retval copy to use.
-
     std::vector<SDOperand> Ops;
     Ops.push_back(Chain);
     Ops.push_back(Callee);
@@ -991,7 +996,6 @@
     std::vector<MVT::ValueType> NodeTys;
     NodeTys.push_back(MVT::Other);   // Returns a chain
     NodeTys.push_back(MVT::Flag);    // Returns a flag for retval copy to use.
-
     std::vector<SDOperand> Ops;
     Ops.push_back(Chain);
     Ops.push_back(Callee);
@@ -1193,6 +1197,99 @@
 SDOperand X86TargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) {
   switch (Op.getOpcode()) {
   default: assert(0 && "Should not custom lower this!");
+  case ISD::ADD_PARTS:
+  case ISD::SUB_PARTS: {
+    assert(Op.getNumOperands() == 4 && Op.getValueType() == MVT::i32 &&
+           "Not an i64 add/sub!");
+    bool isAdd = Op.getOpcode() == ISD::ADD_PARTS;
+    std::vector<MVT::ValueType> Tys;
+    Tys.push_back(MVT::i32);
+    Tys.push_back(MVT::Flag);
+    std::vector<SDOperand> Ops;
+    Ops.push_back(Op.getOperand(0));
+    Ops.push_back(Op.getOperand(2));
+    SDOperand Lo = DAG.getNode(isAdd ? X86ISD::ADD_FLAG : X86ISD::SUB_FLAG,
+                               Tys, Ops);
+    SDOperand Hi = DAG.getNode(isAdd ? X86ISD::ADC : X86ISD::SBB, MVT::i32,
+                               Op.getOperand(1), Op.getOperand(3),
+                               Lo.getValue(1));
+    Tys.clear();
+    Tys.push_back(MVT::i32);
+    Tys.push_back(MVT::i32);
+    Ops.clear();
+    Ops.push_back(Lo);
+    Ops.push_back(Hi);
+    return DAG.getNode(ISD::MERGE_VALUES, Tys, Ops);
+  }
+  case ISD::SHL_PARTS:
+  case ISD::SRA_PARTS:
+  case ISD::SRL_PARTS: {
+    assert(Op.getNumOperands() == 3 && Op.getValueType() == MVT::i32 &&
+           "Not an i64 shift!");
+    bool isSRA = Op.getOpcode() == ISD::SRA_PARTS;
+    SDOperand ShOpLo = Op.getOperand(0);
+    SDOperand ShOpHi = Op.getOperand(1);
+    SDOperand ShAmt  = Op.getOperand(2);
+    SDOperand Tmp1 = isSRA ? DAG.getNode(ISD::SRA, MVT::i32, ShOpHi,
+                                         DAG.getConstant(32, MVT::i32))
+                           : DAG.getConstant(0, MVT::i32);
+
+    SDOperand Tmp2, Tmp3;
+    if (Op.getOpcode() == ISD::SHL_PARTS) {
+      Tmp2 = DAG.getNode(X86ISD::SHLD, MVT::i32, ShOpHi, ShOpLo, ShAmt);
+      Tmp3 = DAG.getNode(ISD::SHL, MVT::i32, ShOpLo, ShAmt);
+    } else {
+      Tmp2 = DAG.getNode(X86ISD::SHRD, MVT::i32, ShOpLo, ShOpHi, ShAmt);
+      Tmp3 = DAG.getNode(isSRA ? ISD::SRA : ISD::SHL, MVT::i32, ShOpHi, ShAmt);
+    }
+
+    SDOperand InFlag = DAG.getNode(X86ISD::TEST, MVT::Flag,
+                                   ShAmt, DAG.getConstant(32, MVT::i8));
+
+    SDOperand Hi, Lo;
+    SDOperand CC = DAG.getConstant(X86ISD::COND_E, MVT::i8);
+
+    std::vector<MVT::ValueType> Tys;
+    Tys.push_back(MVT::i32);
+    Tys.push_back(MVT::Flag);
+    std::vector<SDOperand> Ops;
+    if (Op.getOpcode() == ISD::SHL_PARTS) {
+      Ops.push_back(Tmp2);
+      Ops.push_back(Tmp3);
+      Ops.push_back(CC);
+      Ops.push_back(InFlag);
+      Hi = DAG.getNode(X86ISD::CMOV, Tys, Ops);
+      InFlag = Hi.getValue(1);
+
+      Ops.clear();
+      Ops.push_back(Tmp3);
+      Ops.push_back(Tmp1);
+      Ops.push_back(CC);
+      Ops.push_back(InFlag);
+      Lo = DAG.getNode(X86ISD::CMOV, Tys, Ops);
+    } else {
+      Ops.push_back(Tmp2);
+      Ops.push_back(Tmp3);
+      Ops.push_back(CC);
+      Lo = DAG.getNode(X86ISD::CMOV, Tys, Ops);
+      InFlag = Lo.getValue(1);
+
+      Ops.clear();
+      Ops.push_back(Tmp3);
+      Ops.push_back(Tmp1);
+      Ops.push_back(CC);
+      Ops.push_back(InFlag);
+      Hi = DAG.getNode(X86ISD::CMOV, Tys, Ops);
+    }
+
+    Tys.clear();
+    Tys.push_back(MVT::i32);
+    Tys.push_back(MVT::i32);
+    Ops.clear();
+    Ops.push_back(Lo);
+    Ops.push_back(Hi);
+    return DAG.getNode(ISD::MERGE_VALUES, Tys, Ops);
+  }
   case ISD::SINT_TO_FP: {
     assert(Op.getValueType() == MVT::f64 &&
            Op.getOperand(0).getValueType() == MVT::i64 &&
@@ -1362,8 +1459,16 @@
       CC = DAG.getConstant(X86ISD::COND_E, MVT::i8);
       Cond = DAG.getNode(X86ISD::TEST, MVT::Flag, Cond, Cond);
     }
-    return DAG.getNode(X86ISD::CMOV, Op.getValueType(),
-                       Op.getOperand(1), Op.getOperand(2), CC, Cond);
+
+    std::vector<MVT::ValueType> Tys;
+    Tys.push_back(Op.getValueType());
+    Tys.push_back(MVT::Flag);
+    std::vector<SDOperand> Ops;
+    Ops.push_back(Op.getOperand(1));
+    Ops.push_back(Op.getOperand(2));
+    Ops.push_back(CC);
+    Ops.push_back(Cond);
+    return DAG.getNode(X86ISD::CMOV, Tys, Ops);
   }
   case ISD::BRCOND: {
     SDOperand Cond  = Op.getOperand(1);
@@ -1389,7 +1494,7 @@
   }
   case ISD::RET: {
     // Can only be return void.
-    return DAG.getNode(X86ISD::RET, MVT::Other, Op.getOperand(0),
+    return DAG.getNode(X86ISD::RET_FLAG, MVT::Other, Op.getOperand(0),
                        DAG.getConstant(getBytesToPopOnReturn(), MVT::i16));
   }
   case ISD::GlobalAddress: {
@@ -1414,6 +1519,12 @@
 const char *X86TargetLowering::getTargetNodeName(unsigned Opcode) const {
   switch (Opcode) {
   default: return NULL;
+  case X86ISD::ADD_FLAG:           return "X86ISD::ADD_FLAG";
+  case X86ISD::SUB_FLAG:           return "X86ISD::SUB_FLAG";
+  case X86ISD::ADC:                return "X86ISD::ADC";
+  case X86ISD::SBB:                return "X86ISD::SBB";
+  case X86ISD::SHLD:               return "X86ISD::SHLD";
+  case X86ISD::SHRD:               return "X86ISD::SHRD";
   case X86ISD::FILD64m:            return "X86ISD::FILD64m";
   case X86ISD::FP_TO_INT16_IN_MEM: return "X86ISD::FP_TO_INT16_IN_MEM";
   case X86ISD::FP_TO_INT32_IN_MEM: return "X86ISD::FP_TO_INT32_IN_MEM";
@@ -1430,7 +1541,6 @@
   case X86ISD::SETCC:              return "X86ISD::SETCC";
   case X86ISD::CMOV:               return "X86ISD::CMOV";
   case X86ISD::BRCOND:             return "X86ISD::BRCOND";
-  case X86ISD::RET:                return "X86ISD::RET";
   case X86ISD::RET_FLAG:           return "X86ISD::RET_FLAG";
   }
 }


Index: llvm/lib/Target/X86/X86ISelLowering.h
diff -u llvm/lib/Target/X86/X86ISelLowering.h:1.11 llvm/lib/Target/X86/X86ISelLowering.h:1.12
--- llvm/lib/Target/X86/X86ISelLowering.h:1.11	Thu Jan  5 18:43:03 2006
+++ llvm/lib/Target/X86/X86ISelLowering.h	Mon Jan  9 12:33:28 2006
@@ -25,6 +25,21 @@
       // Start the numbering where the builtin ops leave off.
       FIRST_NUMBER = ISD::BUILTIN_OP_END+X86::INSTRUCTION_LIST_END,
 
+      /// ADD_FLAG, SUB_FLAG - Same as ISD::ADD and ISD::SUB except it also
+      /// produces a flag result.
+      ADD_FLAG,
+      SUB_FLAG,
+
+      /// ADC, SBB - Add with carry and subtraction with borrow. These
+      /// correspond to X86::ADCxx and X86::SBBxx instructions.
+      ADC,
+      SBB,
+
+      /// SHLD, SHRD - Double shift instructions. These correspond to
+      /// X86::SHLDxx and X86::SHRDxx instructions.
+      SHLD,
+      SHRD,
+
       /// FILD64m - This instruction implements SINT_TO_FP with a
       /// 64-bit source in memory and a FP reg result.  This corresponds to
       /// the X86::FILD64m instruction.  It has two inputs (token chain and
@@ -99,7 +114,7 @@
       /// X86 conditional moves. Operand 1 and operand 2 are the two values
       /// to select from (operand 1 is a R/W operand). Operand 3 is the condition
       /// code, and operand 4 is the flag operand produced by a CMP or TEST
-      /// instruction.
+      /// instruction. It also writes a flag result.
       CMOV,
 
       /// X86 conditional branches. Operand 1 is the chain operand, operand 2
@@ -108,10 +123,6 @@
       /// or TEST instruction.
       BRCOND,
 
-      /// Return without a flag operand. Operand 1 is the number of bytes of
-      /// stack to pop, and operand 2 is the chain.
-      RET,
-
       /// Return with a flag operand. Operand 1 is the number of bytes of stack
       /// to pop, operand 2 is the chain and operand 3 is a flag operand.
       RET_FLAG,


Index: llvm/lib/Target/X86/X86InstrInfo.td
diff -u llvm/lib/Target/X86/X86InstrInfo.td:1.190 llvm/lib/Target/X86/X86InstrInfo.td:1.191
--- llvm/lib/Target/X86/X86InstrInfo.td:1.190	Thu Jan  5 20:31:59 2006
+++ llvm/lib/Target/X86/X86InstrInfo.td	Mon Jan  9 12:33:28 2006
@@ -17,6 +17,10 @@
 // X86 specific DAG Nodes.
 //
 
+def SDTIntShiftDOp: SDTypeProfile<1, 3,
+                                  [SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>,
+                                   SDTCisInt<0>, SDTCisInt<3>]>;
+
 def SDTX86CmpTest : SDTypeProfile<1, 2, [SDTCisVT<0, FlagVT>, SDTCisSameAs<1, 2>]>;
 
 def SDTX86Cmov    : SDTypeProfile<1, 4,
@@ -33,43 +37,67 @@
 
 def SDTX86Ret     : SDTypeProfile<0, 1, [SDTCisVT<0, i16>]>;
 
+def SDT_X86CallSeqStart : SDTypeProfile<0, 1, [ SDTCisVT<0, i32> ]>;
+def SDT_X86CallSeqEnd   : SDTypeProfile<0, 2, [ SDTCisVT<0, i32>,
+                                                SDTCisVT<1, i32> ]>;
+
+def SDT_X86Call   : SDTypeProfile<0, 1, [SDTCisVT<0, i32>]>;
+
+def SDTX86FpGet   : SDTypeProfile<1, 0, [SDTCisVT<0, f64>]>;
+def SDTX86FpSet   : SDTypeProfile<0, 1, [SDTCisFP<0>]>;
+
 def SDTX86Fld     : SDTypeProfile<1, 2, [SDTCisVT<0, f64>,
                                          SDTCisPtrTy<1>, SDTCisVT<2, OtherVT>]>;
 def SDTX86Fst     : SDTypeProfile<0, 3, [SDTCisFP<0>,
                                          SDTCisPtrTy<1>, SDTCisVT<2, OtherVT>]>;
 
+def SDTX86RdTsc   : SDTypeProfile<0, 0, []>;
 
-def SDTX86FpGet   : SDTypeProfile<1, 0, [SDTCisVT<0, f64>]>;
-def SDTX86FpSet   : SDTypeProfile<0, 1, [SDTCisFP<0>]>;
+def X86addflag : SDNode<"X86ISD::ADD_FLAG", SDTIntBinOp ,
+                        [SDNPCommutative, SDNPAssociative, SDNPOutFlag]>;
+def X86subflag : SDNode<"X86ISD::SUB_FLAG", SDTIntBinOp,
+                        [SDNPOutFlag]>;
+def X86adc     : SDNode<"X86ISD::ADC" ,     SDTIntBinOp ,
+                        [SDNPCommutative, SDNPAssociative]>;
+def X86sbb     : SDNode<"X86ISD::SBB" ,     SDTIntBinOp>;
+
+def X86shld    : SDNode<"X86ISD::SHLD",     SDTIntShiftDOp>;
+def X86shrd    : SDNode<"X86ISD::SHRD",     SDTIntShiftDOp>;
 
 def X86cmp     : SDNode<"X86ISD::CMP" ,     SDTX86CmpTest,  []>;
 def X86test    : SDNode<"X86ISD::TEST",     SDTX86CmpTest,  []>;
 
-def X86cmov    : SDNode<"X86ISD::CMOV",     SDTX86Cmov,     []>;
-def X86brcond  : SDNode<"X86ISD::BRCOND",   SDTX86BrCond,   [SDNPHasChain]>;
+def X86cmov    : SDNode<"X86ISD::CMOV",     SDTX86Cmov,    
+                        [SDNPOutFlag]>;
+def X86brcond  : SDNode<"X86ISD::BRCOND",   SDTX86BrCond,
+                        [SDNPHasChain]>;
 def X86setcc   : SDNode<"X86ISD::SETCC",    SDTX86SetCC,    []>;
 
-def X86ret     : SDNode<"X86ISD::RET",      SDTX86Ret,      [SDNPHasChain]>;
-def X86retflag : SDNode<"X86ISD::RET_FLAG", SDTX86Ret,      [SDNPHasChain]>;
+def X86retflag : SDNode<"X86ISD::RET_FLAG", SDTX86Ret,
+                        [SDNPHasChain, SDNPOptInFlag]>;
 
-def X86fld     : SDNode<"X86ISD::FLD",      SDTX86Fld,      [SDNPHasChain]>;
-def X86fst     : SDNode<"X86ISD::FST",      SDTX86Fst,      [SDNPHasChain]>;
+def X86callseq_start :
+                 SDNode<"ISD::CALLSEQ_START", SDT_X86CallSeqStart,
+                        [SDNPHasChain]>;
+def X86callseq_end :
+                 SDNode<"ISD::CALLSEQ_END",   SDT_X86CallSeqEnd,
+                        [SDNPHasChain]>;
+
+def X86call    : SDNode<"X86ISD::CALL",     SDT_X86Call,
+                        [SDNPHasChain, SDNPOutFlag, SDNPOptInFlag]>;
+
+def X86fpget   : SDNode<"X86ISD::FP_GET_RESULT", SDTX86FpGet,
+                        [SDNPHasChain, SDNPInFlag]>;
+def X86fpset   : SDNode<"X86ISD::FP_SET_RESULT", SDTX86FpSet,
+                        [SDNPHasChain, SDNPOutFlag]>;
+
+def X86fld     : SDNode<"X86ISD::FLD",      SDTX86Fld,
+                        [SDNPHasChain]>;
+def X86fst     : SDNode<"X86ISD::FST",      SDTX86Fst,
+                        [SDNPHasChain]>;
 
-def X86fpget   : SDNode<"X86ISD::FP_GET_RESULT",
-                                            SDTX86FpGet,    [SDNPHasChain]>;
-def X86fpset   : SDNode<"X86ISD::FP_SET_RESULT",
-                                            SDTX86FpSet,    [SDNPHasChain]>;
-
-def SDT_X86CallSeqStart : SDTypeProfile<0, 1, [ SDTCisVT<0, i32> ]>;
-def SDT_X86CallSeqEnd   : SDTypeProfile<0, 2, [ SDTCisVT<0, i32>,
-                                                SDTCisVT<1, i32> ]>;
-def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_X86CallSeqStart,
-                           [SDNPHasChain]>;
-def callseq_end   : SDNode<"ISD::CALLSEQ_END",   SDT_X86CallSeqEnd,
-                           [SDNPHasChain]>;
-
-def SDT_X86Call   : SDTypeProfile<0, 1, [SDTCisVT<0, i32>]>;
-def call          : SDNode<"X86ISD::CALL", SDT_X86Call, [SDNPHasChain]>;
+def X86rdtsc   : SDNode<"X86ISD::RDTSC_DAG",SDTX86RdTsc,
+                        [SDNPHasChain, SDNPOutFlag]>;
 
 //===----------------------------------------------------------------------===//
 // X86 Operand Definitions.
@@ -334,10 +362,10 @@
 def NOOP : I<0x90, RawFrm, (ops), "nop", []>; // nop
 
 def ADJCALLSTACKDOWN : I<0, Pseudo, (ops i32imm:$amt), "#ADJCALLSTACKDOWN",
-                         [(callseq_start imm:$amt)]>;
+                         [(X86callseq_start imm:$amt)]>;
 def ADJCALLSTACKUP   : I<0, Pseudo, (ops i32imm:$amt1, i32imm:$amt2),
                          "#ADJCALLSTACKUP",
-                         [(callseq_end imm:$amt1, imm:$amt2)]>;
+                         [(X86callseq_end imm:$amt1, imm:$amt2)]>;
 def IMPLICIT_USE     : I<0, Pseudo, (ops variable_ops), "#IMPLICIT_USE", []>;
 def IMPLICIT_DEF     : I<0, Pseudo, (ops variable_ops), "#IMPLICIT_DEF", []>;
 let isTerminator = 1 in
@@ -351,15 +379,9 @@
 // Return instructions.
 let isTerminator = 1, isReturn = 1, isBarrier = 1,
     hasCtrlDep = 1, noResults = 1 in {
-  // FIXME: temporary workaround for return without an incoming flag.
-  def RETVOID  : I<0xC3, RawFrm, (ops), "ret", [(X86ret 0)]>;
-  def RETIVOID : Ii16<0xC2, RawFrm, (ops i16imm:$amt), "ret $amt",
-                      [(X86ret imm:$amt)]>;
-  let hasInFlag = 1 in {
-    def RET    : I<0xC3, RawFrm, (ops), "ret", [(X86retflag 0)]>;
-    def RETI   : Ii16<0xC2, RawFrm, (ops i16imm:$amt), "ret $amt",
-                      [(X86retflag imm:$amt)]>;
-  }
+  def RET    : I<0xC3, RawFrm, (ops), "ret", [(X86retflag 0)]>;
+  def RETI   : Ii16<0xC2, RawFrm, (ops i16imm:$amt), "ret $amt",
+                    [(X86retflag imm:$amt)]>;
 }
 
 // All branches are RawFrm, Void, Branch, and Terminators
@@ -404,23 +426,21 @@
 //===----------------------------------------------------------------------===//
 //  Call Instructions...
 //
-// FIXME: How about hasInFlag = 1? A fastcall would require an incoming flag
-// to stick the CopyToRegs to the call.
-let isCall = 1, noResults = 1, hasOutFlag = 1 in
+let isCall = 1, noResults = 1 in
   // All calls clobber the non-callee saved registers...
   let Defs = [EAX, ECX, EDX, FP0, FP1, FP2, FP3, FP4, FP5, FP6, ST0,
               XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7] in {
     def CALLpcrel32 : I<0xE8, RawFrm, (ops calltarget:$dst), "call $dst",
                       []>;
     def CALL32r     : I<0xFF, MRM2r, (ops R32:$dst), "call {*}$dst",
-                      [(call R32:$dst)]>;
+                      [(X86call R32:$dst)]>;
     def CALL32m     : I<0xFF, MRM2m, (ops i32mem:$dst), "call {*}$dst",
-                      [(call (loadi32 addr:$dst))]>;
+                      [(X86call (loadi32 addr:$dst))]>;
   }
 
-def : Pat<(call tglobaladdr:$dst),
+def : Pat<(X86call tglobaladdr:$dst),
           (CALLpcrel32 tglobaladdr:$dst)>;
-def : Pat<(call externalsym:$dst),
+def : Pat<(X86call externalsym:$dst),
           (CALLpcrel32 externalsym:$dst)>;
 
 // Tail call stuff.
@@ -1544,64 +1564,94 @@
 // Double shift instructions (generalizations of rotate)
 
 def SHLD32rrCL : I<0xA5, MRMDestReg, (ops R32:$dst, R32:$src1, R32:$src2),
-                   "shld{l} {%cl, $src2, $dst|$dst, $src2, %CL}", []>,
+                   "shld{l} {%cl, $src2, $dst|$dst, $src2, %CL}",
+                   [(set R32:$dst, (X86shld R32:$src1, R32:$src2, CL))]>,
                    Imp<[CL],[]>, TB;
 def SHRD32rrCL : I<0xAD, MRMDestReg, (ops R32:$dst, R32:$src1, R32:$src2),
-                   "shrd{l} {%cl, $src2, $dst|$dst, $src2, %CL}", []>,
+                   "shrd{l} {%cl, $src2, $dst|$dst, $src2, %CL}",
+                   [(set R32:$dst, (X86shrd R32:$src1, R32:$src2, CL))]>,
                    Imp<[CL],[]>, TB;
 def SHLD16rrCL : I<0xA5, MRMDestReg, (ops R16:$dst, R16:$src1, R16:$src2),
-                   "shld{w} {%cl, $src2, $dst|$dst, $src2, %CL}", []>,
+                   "shld{w} {%cl, $src2, $dst|$dst, $src2, %CL}",
+                   [(set R16:$dst, (X86shld R16:$src1, R16:$src2, CL))]>,
                    Imp<[CL],[]>, TB, OpSize;
 def SHRD16rrCL : I<0xAD, MRMDestReg, (ops R16:$dst, R16:$src1, R16:$src2),
-                   "shrd{w} {%cl, $src2, $dst|$dst, $src2, %CL}", []>,
+                   "shrd{w} {%cl, $src2, $dst|$dst, $src2, %CL}",
+                   [(set R16:$dst, (X86shrd R16:$src1, R16:$src2, CL))]>,
                    Imp<[CL],[]>, TB, OpSize;
 
 let isCommutable = 1 in {  // These instructions commute to each other.
 def SHLD32rri8 : Ii8<0xA4, MRMDestReg,
                      (ops R32:$dst, R32:$src1, R32:$src2, i8imm:$src3),
-                     "shld{l} {$src3, $src2, $dst|$dst, $src2, $src3}", []>, TB;
+                     "shld{l} {$src3, $src2, $dst|$dst, $src2, $src3}",
+                     [(set R32:$dst, (X86shld R32:$src1, R32:$src2,
+                                      (i8 imm:$src3)))]>,
+                 TB;
 def SHRD32rri8 : Ii8<0xAC, MRMDestReg,
                      (ops R32:$dst, R32:$src1, R32:$src2, i8imm:$src3),
-                     "shrd{l} {$src3, $src2, $dst|$dst, $src2, $src3}", []>, TB;
+                     "shrd{l} {$src3, $src2, $dst|$dst, $src2, $src3}",
+                     [(set R32:$dst, (X86shrd R32:$src1, R32:$src2,
+                                      (i8 imm:$src3)))]>,
+                 TB;
 def SHLD16rri8 : Ii8<0xA4, MRMDestReg,
                      (ops R16:$dst, R16:$src1, R16:$src2, i8imm:$src3),
-                     "shld{w} {$src3, $src2, $dst|$dst, $src2, $src3}", []>,
+                     "shld{w} {$src3, $src2, $dst|$dst, $src2, $src3}",
+                     [(set R16:$dst, (X86shld R16:$src1, R16:$src2,
+                                      (i8 imm:$src3)))]>,
                      TB, OpSize;
 def SHRD16rri8 : Ii8<0xAC, MRMDestReg,
                      (ops R16:$dst, R16:$src1, R16:$src2, i8imm:$src3),
-                     "shrd{w} {$src3, $src2, $dst|$dst, $src2, $src3}", []>,
+                     "shrd{w} {$src3, $src2, $dst|$dst, $src2, $src3}",
+                     [(set R16:$dst, (X86shrd R16:$src1, R16:$src2,
+                                      (i8 imm:$src3)))]>,
                      TB, OpSize;
 }
 
 let isTwoAddress = 0 in {
   def SHLD32mrCL : I<0xA5, MRMDestMem, (ops i32mem:$dst, R32:$src2),
-                     "shld{l} {%cl, $src2, $dst|$dst, $src2, %CL}", []>,
+                     "shld{l} {%cl, $src2, $dst|$dst, $src2, %CL}",
+                     [(store (X86shld (loadi32 addr:$dst), R32:$src2, CL),
+                       addr:$dst)]>,
                      Imp<[CL],[]>, TB;
   def SHRD32mrCL : I<0xAD, MRMDestMem, (ops i32mem:$dst, R32:$src2),
-                    "shrd{l} {%cl, $src2, $dst|$dst, $src2, %CL}", []>,
+                    "shrd{l} {%cl, $src2, $dst|$dst, $src2, %CL}",
+                    [(store (X86shrd (loadi32 addr:$dst), R32:$src2, CL),
+                      addr:$dst)]>,
                     Imp<[CL],[]>, TB;
   def SHLD32mri8 : Ii8<0xA4, MRMDestMem,
                       (ops i32mem:$dst, R32:$src2, i8imm:$src3),
-                      "shld{l} {$src3, $src2, $dst|$dst, $src2, $src3}", []>,
+                      "shld{l} {$src3, $src2, $dst|$dst, $src2, $src3}",
+                      [(store (X86shld (loadi32 addr:$dst), R32:$src2,
+                                        (i8 imm:$src3)), addr:$dst)]>,
                       TB;
   def SHRD32mri8 : Ii8<0xAC, MRMDestMem, 
                        (ops i32mem:$dst, R32:$src2, i8imm:$src3),
-                       "shrd{l} {$src3, $src2, $dst|$dst, $src2, $src3}", []>,
+                       "shrd{l} {$src3, $src2, $dst|$dst, $src2, $src3}",
+                       [(store (X86shrd (loadi32 addr:$dst), R32:$src2,
+                                         (i8 imm:$src3)), addr:$dst)]>,
                        TB;
 
   def SHLD16mrCL : I<0xA5, MRMDestMem, (ops i16mem:$dst, R16:$src2),
-                     "shld{w} {%cl, $src2, $dst|$dst, $src2, %CL}", []>,
+                     "shld{w} {%cl, $src2, $dst|$dst, $src2, %CL}",
+                     [(store (X86shld (loadi16 addr:$dst), R16:$src2, CL),
+                       addr:$dst)]>,
                      Imp<[CL],[]>, TB, OpSize;
   def SHRD16mrCL : I<0xAD, MRMDestMem, (ops i16mem:$dst, R16:$src2),
-                    "shrd{w} {%cl, $src2, $dst|$dst, $src2, %CL}", []>,
+                    "shrd{w} {%cl, $src2, $dst|$dst, $src2, %CL}",
+                    [(store (X86shrd (loadi16 addr:$dst), R16:$src2, CL),
+                      addr:$dst)]>,
                     Imp<[CL],[]>, TB, OpSize;
   def SHLD16mri8 : Ii8<0xA4, MRMDestMem,
                       (ops i16mem:$dst, R16:$src2, i8imm:$src3),
-                      "shld{w} {$src3, $src2, $dst|$dst, $src2, $src3}", []>,
+                      "shld{w} {$src3, $src2, $dst|$dst, $src2, $src3}",
+                      [(store (X86shld (loadi16 addr:$dst), R16:$src2,
+                                        (i8 imm:$src3)), addr:$dst)]>,
                       TB, OpSize;
   def SHRD16mri8 : Ii8<0xAC, MRMDestMem, 
                        (ops i16mem:$dst, R16:$src2, i8imm:$src3),
-                       "shrd{w} {$src3, $src2, $dst|$dst, $src2, $src3}", []>,
+                       "shrd{w} {$src3, $src2, $dst|$dst, $src2, $src3}",
+                      [(store (X86shrd (loadi16 addr:$dst), R16:$src2,
+                                        (i8 imm:$src3)), addr:$dst)]>,
                        TB, OpSize;
 }
 
@@ -1684,22 +1734,29 @@
 
 let isCommutable = 1 in {  // X = ADC Y, Z --> X = ADC Z, Y
 def ADC32rr  : I<0x11, MRMDestReg, (ops R32:$dst, R32:$src1, R32:$src2),
-                 "adc{l} {$src2, $dst|$dst, $src2}", []>;
+                 "adc{l} {$src2, $dst|$dst, $src2}",
+                 [(set R32:$dst, (X86adc R32:$src1, R32:$src2))]>;
 }
 def ADC32rm  : I<0x13, MRMSrcMem , (ops R32:$dst, R32:$src1, i32mem:$src2),
-                 "adc{l} {$src2, $dst|$dst, $src2}", []>;
+                 "adc{l} {$src2, $dst|$dst, $src2}",
+                 [(set R32:$dst, (X86adc R32:$src1, (load addr:$src2)))]>;
 def ADC32ri  : Ii32<0x81, MRM2r, (ops R32:$dst, R32:$src1, i32imm:$src2),
-                    "adc{l} {$src2, $dst|$dst, $src2}", []>;
-def ADC32ri8 : Ii8<0x83, MRM2r, (ops R32:$dst, R32:$src1, i8imm:$src2),
-                   "adc{l} {$src2, $dst|$dst, $src2}", []>;
+                    "adc{l} {$src2, $dst|$dst, $src2}",
+                 [(set R32:$dst, (X86adc R32:$src1, imm:$src2))]>;
+def ADC32ri8 : Ii8<0x83, MRM2r, (ops R32:$dst, R32:$src1, i32i8imm:$src2),
+                   "adc{l} {$src2, $dst|$dst, $src2}",
+                 [(set R32:$dst, (X86adc R32:$src1, i32immSExt8:$src2))]>;
 
 let isTwoAddress = 0 in {
   def ADC32mr  : I<0x11, MRMDestMem, (ops i32mem:$dst, R32:$src2),
-                   "adc{l} {$src2, $dst|$dst, $src2}", []>;
+                   "adc{l} {$src2, $dst|$dst, $src2}",
+                   [(store (X86adc (load addr:$dst), R32:$src2), addr:$dst)]>;
   def ADC32mi  : Ii32<0x81, MRM2m, (ops i32mem:$dst, i32imm:$src2),
-                      "adc{l} {$src2, $dst|$dst, $src2}", []>;
-  def ADC32mi8 : Ii8<0x83, MRM2m, (ops i32mem:$dst, i8imm :$src2),
-                     "adc{l} {$src2, $dst|$dst, $src2}", []>;
+                      "adc{l} {$src2, $dst|$dst, $src2}",
+                  [(store (X86adc (loadi32 addr:$dst), imm:$src2), addr:$dst)]>;
+  def ADC32mi8 : Ii8<0x83, MRM2m, (ops i32mem:$dst, i32i8imm :$src2),
+                     "adc{l} {$src2, $dst|$dst, $src2}",
+             [(store (X86adc (load addr:$dst), i32immSExt8:$src2), addr:$dst)]>;
 }
 
 def SUB8rr   : I<0x28, MRMDestReg, (ops R8 :$dst, R8 :$src1, R8 :$src2),
@@ -1768,36 +1825,52 @@
 }
 
 def SBB32rr    : I<0x19, MRMDestReg, (ops R32:$dst, R32:$src1, R32:$src2),
-                  "sbb{l} {$src2, $dst|$dst, $src2}", []>;
+                  "sbb{l} {$src2, $dst|$dst, $src2}",
+                  [(set R32:$dst, (X86sbb R32:$src1, R32:$src2))]>;
 
 let isTwoAddress = 0 in {
   def SBB32mr  : I<0x19, MRMDestMem, (ops i32mem:$dst, R32:$src2), 
-                   "sbb{l} {$src2, $dst|$dst, $src2}", []>;
+                   "sbb{l} {$src2, $dst|$dst, $src2}",
+                   [(store (X86sbb (load addr:$dst), R32:$src2), addr:$dst)]>;
   def SBB8mi  : Ii32<0x80, MRM3m, (ops i8mem:$dst, i8imm:$src2), 
-                      "sbb{b} {$src2, $dst|$dst, $src2}", []>;
+                      "sbb{b} {$src2, $dst|$dst, $src2}",
+                   [(store (X86sbb (loadi8 addr:$dst), imm:$src2), addr:$dst)]>;
   def SBB16mi  : Ii32<0x81, MRM3m, (ops i16mem:$dst, i16imm:$src2), 
-                      "sbb{w} {$src2, $dst|$dst, $src2}", []>, OpSize;
+                      "sbb{w} {$src2, $dst|$dst, $src2}",
+                  [(store (X86sbb (loadi16 addr:$dst), imm:$src2), addr:$dst)]>,
+                     OpSize;
   def SBB32mi  : Ii32<0x81, MRM3m, (ops i32mem:$dst, i32imm:$src2), 
-                      "sbb{l} {$src2, $dst|$dst, $src2}", []>;
-  def SBB16mi8 : Ii8<0x83, MRM3m, (ops i16mem:$dst, i8imm :$src2), 
-                     "sbb{w} {$src2, $dst|$dst, $src2}", []>, OpSize;
-  def SBB32mi8 : Ii8<0x83, MRM3m, (ops i32mem:$dst, i8imm :$src2), 
-                     "sbb{l} {$src2, $dst|$dst, $src2}", []>;
+                      "sbb{l} {$src2, $dst|$dst, $src2}",
+                  [(store (X86sbb (loadi32 addr:$dst), imm:$src2), addr:$dst)]>;
+  def SBB16mi8 : Ii8<0x83, MRM3m, (ops i16mem:$dst, i16i8imm :$src2), 
+                     "sbb{w} {$src2, $dst|$dst, $src2}",
+             [(store (X86sbb (load addr:$dst), i16immSExt8:$src2), addr:$dst)]>,
+                     OpSize;
+  def SBB32mi8 : Ii8<0x83, MRM3m, (ops i32mem:$dst, i32i8imm :$src2), 
+                     "sbb{l} {$src2, $dst|$dst, $src2}",
+             [(store (X86sbb (load addr:$dst), i32immSExt8:$src2), addr:$dst)]>;
 }
 def SBB8ri   : Ii8<0x80, MRM3r, (ops R8:$dst, R8:$src1, i8imm:$src2),
-                    "sbb{b} {$src2, $dst|$dst, $src2}", []>;
+                    "sbb{b} {$src2, $dst|$dst, $src2}",
+                    [(set R8:$dst, (X86sbb R8:$src1, imm:$src2))]>;
 def SBB16ri  : Ii16<0x81, MRM3r, (ops R16:$dst, R16:$src1, i16imm:$src2),
-                    "sbb{w} {$src2, $dst|$dst, $src2}", []>, OpSize;
+                    "sbb{w} {$src2, $dst|$dst, $src2}",
+                    [(set R16:$dst, (X86sbb R16:$src1, imm:$src2))]>, OpSize;
 
 def SBB32rm  : I<0x1B, MRMSrcMem, (ops R32:$dst, R32:$src1, i32mem:$src2),
-                    "sbb{l} {$src2, $dst|$dst, $src2}", []>;
+                    "sbb{l} {$src2, $dst|$dst, $src2}",
+                    [(set R32:$dst, (X86sbb R32:$src1, (load addr:$src2)))]>;
 def SBB32ri  : Ii32<0x81, MRM3r, (ops R32:$dst, R32:$src1, i32imm:$src2),
-                    "sbb{l} {$src2, $dst|$dst, $src2}", []>;
+                    "sbb{l} {$src2, $dst|$dst, $src2}",
+                    [(set R32:$dst, (X86sbb R32:$src1, imm:$src2))]>;
 
-def SBB16ri8 : Ii8<0x83, MRM3r, (ops R16:$dst, R16:$src1, i8imm:$src2),
-                   "sbb{w} {$src2, $dst|$dst, $src2}", []>, OpSize;
-def SBB32ri8 : Ii8<0x83, MRM3r, (ops R32:$dst, R32:$src1, i8imm:$src2),
-                   "sbb{l} {$src2, $dst|$dst, $src2}", []>;
+def SBB16ri8 : Ii8<0x83, MRM3r, (ops R16:$dst, R16:$src1, i16i8imm:$src2),
+                   "sbb{w} {$src2, $dst|$dst, $src2}",
+                   [(set R16:$dst, (X86sbb R16:$src1, i16immSExt8:$src2))]>,
+                   OpSize;
+def SBB32ri8 : Ii8<0x83, MRM3r, (ops R32:$dst, R32:$src1, i32i8imm:$src2),
+                   "sbb{l} {$src2, $dst|$dst, $src2}",
+                   [(set R32:$dst, (X86sbb R32:$src1, i32immSExt8:$src2))]>;
 
 let isCommutable = 1 in {  // X = IMUL Y, Z --> X = IMUL Z, Y
 def IMUL16rr : I<0xAF, MRMSrcReg, (ops R16:$dst, R16:$src1, R16:$src2),
@@ -1817,6 +1890,25 @@
 
 } // end Two Address instructions
 
+// X86 specific add which produces a flag.
+def : Pat<(X86addflag R32:$src1, R32:$src2),
+          (ADD32rr R32:$src1, R32:$src2)>;
+def : Pat<(X86addflag R32:$src1, (load addr:$src2)),
+          (ADD32rm R32:$src1, addr:$src2)>;
+def : Pat<(X86addflag R32:$src1, imm:$src2),
+          (ADD32ri R32:$src1, imm:$src2)>;
+def : Pat<(X86addflag R32:$src1, i32immSExt8:$src2),
+          (ADD32ri8 R32:$src1, i32immSExt8:$src2)>;
+
+def : Pat<(X86subflag R32:$src1, R32:$src2),
+          (SUB32rr R32:$src1, R32:$src2)>;
+def : Pat<(X86subflag R32:$src1, (load addr:$src2)),
+          (SUB32rm R32:$src1, addr:$src2)>;
+def : Pat<(X86subflag R32:$src1, imm:$src2),
+          (SUB32ri R32:$src1, imm:$src2)>;
+def : Pat<(X86subflag R32:$src1, i32immSExt8:$src2),
+          (SUB32ri8 R32:$src1, i32immSExt8:$src2)>;
+
 // Suprisingly enough, these are not two address instructions!
 def IMUL16rri  : Ii16<0x69, MRMSrcReg,                      // R16 = R16*I16
                       (ops R16:$dst, R16:$src1, i16imm:$src2),
@@ -2471,13 +2563,12 @@
 }
 
 // Random Pseudo Instructions.
-let hasInFlag = 1 in
-  def FpGETRESULT : FpI<(ops RFP:$dst), SpecialFP, []>;   // FPR = ST(0)
+def FpGETRESULT : FpI<(ops RFP:$dst), SpecialFP, []>;   // FPR = ST(0)
 
 // Do not inline into instruction def. since it isn't predicated on FPStack.
 def : Pat<(X86fpget), (FpGETRESULT)>;
 
-let noResults = 1, hasOutFlag = 1 in 
+let noResults = 1 in 
   def FpSETRESULT : FpI<(ops RFP:$src), SpecialFP,
                         []>, Imp<[], [ST0]>;              // ST(0) = FPR
 
@@ -2754,8 +2845,8 @@
 // Miscellaneous Instructions
 //===----------------------------------------------------------------------===//
 
-def RDTSC : I<0x31, RawFrm, (ops), "rdtsc", []>, TB, Imp<[],[EAX,EDX]>;
-
+def RDTSC : I<0x31, RawFrm, (ops), "rdtsc", [(X86rdtsc)]>,
+            TB, Imp<[],[EAX,EDX]>;
 
 //===----------------------------------------------------------------------===//
 // Some peepholes


Index: llvm/lib/Target/X86/X86RegisterInfo.cpp
diff -u llvm/lib/Target/X86/X86RegisterInfo.cpp:1.116 llvm/lib/Target/X86/X86RegisterInfo.cpp:1.117
--- llvm/lib/Target/X86/X86RegisterInfo.cpp:1.116	Thu Jan  5 18:43:03 2006
+++ llvm/lib/Target/X86/X86RegisterInfo.cpp	Mon Jan  9 12:33:28 2006
@@ -568,8 +568,6 @@
   switch (MBBI->getOpcode()) {
   case X86::RET:
   case X86::RETI:
-  case X86::RETVOID:   // FIXME: See X86InstrInfo.td
-  case X86::RETIVOID:  // FIXME: See X86InstrInfo.td
   case X86::TAILJMPd:
   case X86::TAILJMPr:
   case X86::TAILJMPm: break;  // These are ok





From jlaskey at apple.com  Mon Jan  9 13:42:44 2006
From: jlaskey at apple.com (Jim Laskey)
Date: Mon, 9 Jan 2006 13:42:44 -0600
Subject: [llvm-commits] CVS: llvm-gcc/gcc/llvm-expand.c 
Message-ID: <200601091942.NAA13037@zion.cs.uiuc.edu>



Changes in directory llvm-gcc/gcc:

llvm-expand.c updated: 1.123 -> 1.124
---
Log message:

Using the recommended caching version.


---
Diffs of the changes:  (+1 -1)

 llvm-expand.c |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm-gcc/gcc/llvm-expand.c
diff -u llvm-gcc/gcc/llvm-expand.c:1.123 llvm-gcc/gcc/llvm-expand.c:1.124
--- llvm-gcc/gcc/llvm-expand.c:1.123	Mon Jan  9 12:17:05 2006
+++ llvm-gcc/gcc/llvm-expand.c	Mon Jan  9 13:42:32 2006
@@ -7900,7 +7900,7 @@
       *fileName = '\0';
       fileName++;
     } else {
-      path = getpwd();
+      path = get_src_pwd();
       fileName = buf;
     }
 





From alenhar2 at cs.uiuc.edu  Mon Jan  9 13:50:11 2006
From: alenhar2 at cs.uiuc.edu (Andrew Lenharth)
Date: Mon, 9 Jan 2006 13:50:11 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaInstrInfo.td 
Message-ID: <200601091950.NAA13149@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/Alpha:

AlphaInstrInfo.td updated: 1.98 -> 1.99
---
Log message:

proper branch not equal sequence

---
Diffs of the changes:  (+4 -0)

 AlphaInstrInfo.td |    4 ++++
 1 files changed, 4 insertions(+)


Index: llvm/lib/Target/Alpha/AlphaInstrInfo.td
diff -u llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.98 llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.99
--- llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.98	Wed Jan  4 22:48:15 2006
+++ llvm/lib/Target/Alpha/AlphaInstrInfo.td	Mon Jan  9 13:49:58 2006
@@ -741,6 +741,10 @@
 
 def : Pat<(brcond (and GPRC:$RA, 1), bb:$DISP), (BLBS GPRC:$RA, bb:$DISP)>;
 def : Pat<(brcond GPRC:$RA, bb:$DISP), (BNE GPRC:$RA, bb:$DISP)>;
+def : Pat<(brcond (setne GPRC:$RA, GPRC:$RB), bb:$DISP),
+          (BEQ (CMPEQ GPRC:$RA, GPRC:$RB), bb:$DISP)>;
+def : Pat<(brcond (setne GPRC:$RA, immUExt8:$L), bb:$DISP),
+          (BEQ (CMPEQi GPRC:$RA, immUExt8:$L), bb:$DISP)>;
 def : Pat<(brcond (seteq F8RC:$RA, F8RC:$RB), bb:$DISP),
           (FBNE  (CMPTEQ F8RC:$RA, F8RC:$RB), bb:$DISP)>;
 def : Pat<(brcond (setlt F8RC:$RA, F8RC:$RB), bb:$DISP),





From evan.cheng at apple.com  Mon Jan  9 14:49:34 2006
From: evan.cheng at apple.com (Evan Cheng)
Date: Mon, 9 Jan 2006 14:49:34 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp 
Message-ID: <200601092049.OAA13892@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/X86:

X86ISelLowering.cpp updated: 1.23 -> 1.24
---
Log message:

typo


---
Diffs of the changes:  (+1 -1)

 X86ISelLowering.cpp |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.23 llvm/lib/Target/X86/X86ISelLowering.cpp:1.24
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.23	Mon Jan  9 12:33:28 2006
+++ llvm/lib/Target/X86/X86ISelLowering.cpp	Mon Jan  9 14:49:21 2006
@@ -1247,7 +1247,7 @@
                                    ShAmt, DAG.getConstant(32, MVT::i8));
 
     SDOperand Hi, Lo;
-    SDOperand CC = DAG.getConstant(X86ISD::COND_E, MVT::i8);
+    SDOperand CC = DAG.getConstant(X86ISD::COND_NE, MVT::i8);
 
     std::vector<MVT::ValueType> Tys;
     Tys.push_back(MVT::i32);





From alenhar2 at cs.uiuc.edu  Mon Jan  9 15:25:07 2006
From: alenhar2 at cs.uiuc.edu (Andrew Lenharth)
Date: Mon, 9 Jan 2006 15:25:07 -0600
Subject: [llvm-commits] 
	CVS: llvm-test/MultiSource/Benchmarks/Prolangs-C/Makefile
Message-ID: <200601092125.PAA29872@apoc.cs.uiuc.edu>



Changes in directory llvm-test/MultiSource/Benchmarks/Prolangs-C:

Makefile updated: 1.4 -> 1.5
---
Log message:

temporary, will remove soon

---
Diffs of the changes:  (+4 -1)

 Makefile |    5 ++++-
 1 files changed, 4 insertions(+), 1 deletion(-)


Index: llvm-test/MultiSource/Benchmarks/Prolangs-C/Makefile
diff -u llvm-test/MultiSource/Benchmarks/Prolangs-C/Makefile:1.4 llvm-test/MultiSource/Benchmarks/Prolangs-C/Makefile:1.5
--- llvm-test/MultiSource/Benchmarks/Prolangs-C/Makefile:1.4	Fri Dec 10 12:08:08 2004
+++ llvm-test/MultiSource/Benchmarks/Prolangs-C/Makefile	Mon Jan  9 15:24:45 2006
@@ -11,7 +11,10 @@
 PARALLEL_DIRS := $(filter-out bison, $(PARALLEL_DIRS))
 endif
 
-
+# Disable until disk space eating bug can be fixed
+ifeq ($(ARCH), Alpha)
+PARALLEL_DIRS := $(filter-out bison, $(PARALLEL_DIRS))
+endif
 
 
 include $(LEVEL)/Makefile.programs





From evan.cheng at apple.com  Mon Jan  9 16:30:06 2006
From: evan.cheng at apple.com (Evan Cheng)
Date: Mon, 9 Jan 2006 16:30:06 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp 
Message-ID: <200601092230.QAA14886@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/X86:

X86ISelLowering.cpp updated: 1.24 -> 1.25
---
Log message:

More typos


---
Diffs of the changes:  (+2 -1)

 X86ISelLowering.cpp |    3 ++-
 1 files changed, 2 insertions(+), 1 deletion(-)


Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.24 llvm/lib/Target/X86/X86ISelLowering.cpp:1.25
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.24	Mon Jan  9 14:49:21 2006
+++ llvm/lib/Target/X86/X86ISelLowering.cpp	Mon Jan  9 16:29:54 2006
@@ -1231,7 +1231,7 @@
     SDOperand ShOpHi = Op.getOperand(1);
     SDOperand ShAmt  = Op.getOperand(2);
     SDOperand Tmp1 = isSRA ? DAG.getNode(ISD::SRA, MVT::i32, ShOpHi,
-                                         DAG.getConstant(32, MVT::i32))
+                                         DAG.getConstant(31, MVT::i32))
                            : DAG.getConstant(0, MVT::i32);
 
     SDOperand Tmp2, Tmp3;
@@ -1271,6 +1271,7 @@
       Ops.push_back(Tmp2);
       Ops.push_back(Tmp3);
       Ops.push_back(CC);
+      Ops.push_back(InFlag);
       Lo = DAG.getNode(X86ISD::CMOV, Tys, Ops);
       InFlag = Lo.getValue(1);
 





From evan.cheng at apple.com  Mon Jan  9 17:10:41 2006
From: evan.cheng at apple.com (Evan Cheng)
Date: Mon, 9 Jan 2006 17:10:41 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
	X86InstrInfo.td 
Message-ID: <200601092310.RAA15232@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/X86:

X86ISelDAGToDAG.cpp updated: 1.24 -> 1.25
X86InstrInfo.td updated: 1.191 -> 1.192
---
Log message:

* Added undef patterns.
* Some reorg.


---
Diffs of the changes:  (+83 -68)

 X86ISelDAGToDAG.cpp |    9 ---
 X86InstrInfo.td     |  142 ++++++++++++++++++++++++++++++----------------------
 2 files changed, 83 insertions(+), 68 deletions(-)


Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
diff -u llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.24 llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.25
--- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.24	Fri Jan  6 17:19:29 2006
+++ llvm/lib/Target/X86/X86ISelDAGToDAG.cpp	Mon Jan  9 17:10:28 2006
@@ -550,15 +550,6 @@
         return CodeGenMap[N] = CurDAG->getTargetNode(Opc, VT, Result);
       break;
     }
-
-    case ISD::UNDEF: {
-      Opc = (NVT == MVT::f64) ? (X86Vector >= SSE2 ? X86::FLD0SD : X86::FpLD0)
-                              : X86::IMPLICIT_DEF;
-      if (N.Val->hasOneUse())
-        return CurDAG->SelectNodeTo(N.Val, Opc, NVT);
-      else
-        return CodeGenMap[N] = CurDAG->getTargetNode(Opc, NVT);
-    }
   }
 
   return SelectCode(N);


Index: llvm/lib/Target/X86/X86InstrInfo.td
diff -u llvm/lib/Target/X86/X86InstrInfo.td:1.191 llvm/lib/Target/X86/X86InstrInfo.td:1.192
--- llvm/lib/Target/X86/X86InstrInfo.td:1.191	Mon Jan  9 12:33:28 2006
+++ llvm/lib/Target/X86/X86InstrInfo.td	Mon Jan  9 17:10:28 2006
@@ -368,6 +368,16 @@
                          [(X86callseq_end imm:$amt1, imm:$amt2)]>;
 def IMPLICIT_USE     : I<0, Pseudo, (ops variable_ops), "#IMPLICIT_USE", []>;
 def IMPLICIT_DEF     : I<0, Pseudo, (ops variable_ops), "#IMPLICIT_DEF", []>;
+def IMPLICIT_DEF_R8  : I<0, Pseudo, (ops R8:$dst),
+                         "#IMPLICIT_DEF $dst",
+                         [(set R8:$dst, (undef))]>;
+def IMPLICIT_DEF_R16  : I<0, Pseudo, (ops R16:$dst),
+                         "#IMPLICIT_DEF $dst",
+                         [(set R16:$dst, (undef))]>;
+def IMPLICIT_DEF_R32  : I<0, Pseudo, (ops R32:$dst),
+                         "#IMPLICIT_DEF $dst",
+                         [(set R32:$dst, (undef))]>;
+
 let isTerminator = 1 in
   let Defs = [FP0, FP1, FP2, FP3, FP4, FP5, FP6] in
     def FP_REG_KILL  : I<0, Pseudo, (ops), "#FP_REG_KILL", []>;
@@ -438,11 +448,6 @@
                       [(X86call (loadi32 addr:$dst))]>;
   }
 
-def : Pat<(X86call tglobaladdr:$dst),
-          (CALLpcrel32 tglobaladdr:$dst)>;
-def : Pat<(X86call externalsym:$dst),
-          (CALLpcrel32 externalsym:$dst)>;
-
 // Tail call stuff.
 let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1, noResults = 1 in
   def TAILJMPd : IBr<0xE9, (ops calltarget:$dst), "jmp $dst  # TAIL CALL", []>;
@@ -1890,25 +1895,6 @@
 
 } // end Two Address instructions
 
-// X86 specific add which produces a flag.
-def : Pat<(X86addflag R32:$src1, R32:$src2),
-          (ADD32rr R32:$src1, R32:$src2)>;
-def : Pat<(X86addflag R32:$src1, (load addr:$src2)),
-          (ADD32rm R32:$src1, addr:$src2)>;
-def : Pat<(X86addflag R32:$src1, imm:$src2),
-          (ADD32ri R32:$src1, imm:$src2)>;
-def : Pat<(X86addflag R32:$src1, i32immSExt8:$src2),
-          (ADD32ri8 R32:$src1, i32immSExt8:$src2)>;
-
-def : Pat<(X86subflag R32:$src1, R32:$src2),
-          (SUB32rr R32:$src1, R32:$src2)>;
-def : Pat<(X86subflag R32:$src1, (load addr:$src2)),
-          (SUB32rm R32:$src1, addr:$src2)>;
-def : Pat<(X86subflag R32:$src1, imm:$src2),
-          (SUB32ri R32:$src1, imm:$src2)>;
-def : Pat<(X86subflag R32:$src1, i32immSExt8:$src2),
-          (SUB32ri8 R32:$src1, i32immSExt8:$src2)>;
-
 // Suprisingly enough, these are not two address instructions!
 def IMUL16rri  : Ii16<0x69, MRMSrcReg,                      // R16 = R16*I16
                       (ops R16:$dst, R16:$src1, i16imm:$src2),
@@ -2284,20 +2270,6 @@
                    "movz{wl|x} {$src, $dst|$dst, $src}",
                    [(set R32:$dst, (zextloadi32i16 addr:$src))]>, TB;
 
-// Handling 1 bit zextload and sextload
-def : Pat<(sextloadi16i1 addr:$src), (MOVSX16rm8  addr:$src)>;
-def : Pat<(sextloadi32i1 addr:$src), (MOVSX32rm8  addr:$src)>;
-def : Pat<(zextloadi16i1 addr:$src), (MOVZX16rm8  addr:$src)>;
-def : Pat<(zextloadi32i1 addr:$src), (MOVZX32rm8  addr:$src)>;
-
-// Handling 1 bit extload
-def : Pat<(extloadi8i1 addr:$src), (MOV8rm  addr:$src)>;
-
-// Modeling anyext as zext
-def : Pat<(i16 (anyext R8 :$src)), (MOVZX16rr8  R8 :$src)>;
-def : Pat<(i32 (anyext R8 :$src)), (MOVZX32rr8  R8 :$src)>;
-def : Pat<(i32 (anyext R16:$src)), (MOVZX32rr16 R16:$src)>;
-
 //===----------------------------------------------------------------------===//
 // XMM Floating point support (requires SSE / SSE2)
 //===----------------------------------------------------------------------===//
@@ -2555,25 +2527,25 @@
 // FPI - Floating Point Instruction template.
 class FPI<bits<8> o, Format F, dag ops, string asm> : I<o, F, ops, asm, []> {}
 
-// FpI - Floating Point Psuedo Instruction template.
-class FpI<dag ops, FPFormat fp, list<dag> pattern>
-  : X86Inst<0, Pseudo, NoImm, ops, "">, Requires<[FPStack]> {
+// FpI_ - Floating Point Psuedo Instruction template. Not Predicated.
+class FpI_<dag ops, FPFormat fp, list<dag> pattern>
+  : X86Inst<0, Pseudo, NoImm, ops, ""> {
   let FPForm = fp; let FPFormBits = FPForm.Value;
   let Pattern = pattern;
 }
 
 // Random Pseudo Instructions.
-def FpGETRESULT : FpI<(ops RFP:$dst), SpecialFP, []>;   // FPR = ST(0)
-
-// Do not inline into instruction def. since it isn't predicated on FPStack.
-def : Pat<(X86fpget), (FpGETRESULT)>;
+def FpGETRESULT : FpI_<(ops RFP:$dst), SpecialFP,
+                  [(set RFP:$dst, X86fpget)]>;                    // FPR = ST(0)
 
 let noResults = 1 in 
-  def FpSETRESULT : FpI<(ops RFP:$src), SpecialFP,
-                        []>, Imp<[], [ST0]>;              // ST(0) = FPR
+  def FpSETRESULT : FpI_<(ops RFP:$src), SpecialFP,
+                        [(X86fpset RFP:$src)]>, Imp<[], [ST0]>;   // ST(0) = FPR
+
+// FpI - Floating Point Psuedo Instruction template. Predicated on FPStack.
+class FpI<dag ops, FPFormat fp, list<dag> pattern> :
+  FpI_<ops, fp, pattern>, Requires<[FPStack]>;
 
-// Do not inline into instruction def. since it isn't predicated on FPStack.
-def : Pat<(X86fpset RFP:$src), (FpSETRESULT RFP:$src)>;
 
 def FpMOV       : FpI<(ops RFP:$dst, RFP:$src), SpecialFP, []>; // f1 = fmov f2
 
@@ -2754,18 +2726,11 @@
 def FpILD64m : FpI<(ops RFP:$dst, i64mem:$src), ZeroArgFP,
                    []>;
 
-// Required for RET of f32 / f64 values.
-def : Pat<(X86fld addr:$src, f32), (FpLD32m addr:$src)>;
-def : Pat<(X86fld addr:$src, f64), (FpLD64m addr:$src)>;
-
 def FpST32m   : FpI<(ops f32mem:$op, RFP:$src), OneArgFP,
                 [(truncstore RFP:$src, addr:$op, f32)]>;
 def FpST64m   : FpI<(ops f64mem:$op, RFP:$src), OneArgFP,
                 [(store RFP:$src, addr:$op)]>;
 
-def : Pat<(X86fst RFP:$src, addr:$op, f32), (FpST32m addr:$op, RFP:$src)>;
-def : Pat<(X86fst RFP:$src, addr:$op, f64), (FpST64m addr:$op, RFP:$src)>;
-
 def FpSTP32m  : FpI<(ops f32mem:$op, RFP:$src), OneArgFP, []>;
 def FpSTP64m  : FpI<(ops f64mem:$op, RFP:$src), OneArgFP, []>;
 def FpIST16m  : FpI<(ops i16mem:$op, RFP:$src), OneArgFP, []>;
@@ -2799,9 +2764,6 @@
 def FpLD1 : FpI<(ops RFP:$dst), ZeroArgFP,
                 [(set RFP:$dst, fp64imm1)]>;
 
-def : Pat<(f64 fp64immneg0), (FpCHS (FpLD0))>, Requires<[FPStack]>;
-def : Pat<(f64 fp64immneg1), (FpCHS (FpLD1))>, Requires<[FPStack]>;
-
 def FLD0 : FPI<0xEE, RawFrm, (ops), "fldz">, D9;
 def FLD1 : FPI<0xE8, RawFrm, (ops), "fld1">, D9;
 
@@ -2848,6 +2810,68 @@
 def RDTSC : I<0x31, RawFrm, (ops), "rdtsc", [(X86rdtsc)]>,
             TB, Imp<[],[EAX,EDX]>;
 
+
+//===----------------------------------------------------------------------===//
+// Non-Instruction Patterns
+//===----------------------------------------------------------------------===//
+
+// Calls
+def : Pat<(X86call tglobaladdr:$dst),
+          (CALLpcrel32 tglobaladdr:$dst)>;
+def : Pat<(X86call externalsym:$dst),
+          (CALLpcrel32 externalsym:$dst)>;
+
+// X86 specific add which produces a flag.
+def : Pat<(X86addflag R32:$src1, R32:$src2),
+          (ADD32rr R32:$src1, R32:$src2)>;
+def : Pat<(X86addflag R32:$src1, (load addr:$src2)),
+          (ADD32rm R32:$src1, addr:$src2)>;
+def : Pat<(X86addflag R32:$src1, imm:$src2),
+          (ADD32ri R32:$src1, imm:$src2)>;
+def : Pat<(X86addflag R32:$src1, i32immSExt8:$src2),
+          (ADD32ri8 R32:$src1, i32immSExt8:$src2)>;
+
+def : Pat<(X86subflag R32:$src1, R32:$src2),
+          (SUB32rr R32:$src1, R32:$src2)>;
+def : Pat<(X86subflag R32:$src1, (load addr:$src2)),
+          (SUB32rm R32:$src1, addr:$src2)>;
+def : Pat<(X86subflag R32:$src1, imm:$src2),
+          (SUB32ri R32:$src1, imm:$src2)>;
+def : Pat<(X86subflag R32:$src1, i32immSExt8:$src2),
+          (SUB32ri8 R32:$src1, i32immSExt8:$src2)>;
+
+// {s|z}extload bool -> {s|z}extload byte
+def : Pat<(sextloadi16i1 addr:$src), (MOVSX16rm8 addr:$src)>;
+def : Pat<(sextloadi32i1 addr:$src), (MOVSX32rm8 addr:$src)>;
+def : Pat<(zextloadi16i1 addr:$src), (MOVZX16rm8 addr:$src)>;
+def : Pat<(zextloadi32i1 addr:$src), (MOVZX32rm8 addr:$src)>;
+
+// extload bool -> extload byte
+def : Pat<(extloadi8i1 addr:$src), (MOV8rm addr:$src)>;
+
+// anyext -> zext
+def : Pat<(i16 (anyext R8 :$src)), (MOVZX16rr8  R8 :$src)>;
+def : Pat<(i32 (anyext R8 :$src)), (MOVZX32rr8  R8 :$src)>;
+def : Pat<(i32 (anyext R16:$src)), (MOVZX32rr16 R16:$src)>;
+
+// Required for RET of f32 / f64 values.
+def : Pat<(X86fld addr:$src, f32), (FpLD32m addr:$src)>;
+def : Pat<(X86fld addr:$src, f64), (FpLD64m addr:$src)>;
+
+// Required for CALL which return f32 / f64 values.
+def : Pat<(X86fst RFP:$src, addr:$op, f32), (FpST32m addr:$op, RFP:$src)>;
+def : Pat<(X86fst RFP:$src, addr:$op, f64), (FpST64m addr:$op, RFP:$src)>;
+
+// Floatin point constant -0.0 and -1.0
+def : Pat<(f64 fp64immneg0), (FpCHS (FpLD0))>, Requires<[FPStack]>;
+def : Pat<(f64 fp64immneg1), (FpCHS (FpLD1))>, Requires<[FPStack]>;
+
+// FR64 undef
+def : Pat<(f64 (undef)), (FLD0SD)>, Requires<[HasSSE2]>;
+// RFP undef
+def : Pat<(f64 (undef)), (FpLD0)>,  Requires<[FPStack]>;
+
+
 //===----------------------------------------------------------------------===//
 // Some peepholes
 //===----------------------------------------------------------------------===//





From lattner at cs.uiuc.edu  Mon Jan  9 17:20:49 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Mon, 9 Jan 2006 17:20:49 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCInstrInfo.td 
Message-ID: <200601092320.RAA15310@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/PowerPC:

PPCInstrInfo.td updated: 1.170 -> 1.171
---
Log message:

add ret void support back


---
Diffs of the changes:  (+4 -0)

 PPCInstrInfo.td |    4 ++++
 1 files changed, 4 insertions(+)


Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td
diff -u llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.170 llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.171
--- llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.170	Mon Jan  9 12:28:21 2006
+++ llvm/lib/Target/PowerPC/PPCInstrInfo.td	Mon Jan  9 17:20:37 2006
@@ -987,6 +987,10 @@
               (srl GPRC:$rS, (sub 32, GPRC:$rB))),
           (RLWNM GPRC:$rS, GPRC:$rB, 0, 31)>;
 
+// Return void support.
+def : Pat<(ret), (BLR)>;
+
+// 64-bit support
 def : Pat<(i64 (zext GPRC:$in)),
           (RLDICL (OR4To8 GPRC:$in, GPRC:$in), 0, 32)>;
 def : Pat<(i64 (anyext GPRC:$in)),





From lattner at cs.uiuc.edu  Mon Jan  9 17:22:02 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Mon, 9 Jan 2006 17:22:02 -0600
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp 
Message-ID: <200601092322.RAA15373@zion.cs.uiuc.edu>



Changes in directory llvm/lib/CodeGen/SelectionDAG:

LegalizeDAG.cpp updated: 1.256 -> 1.257
---
Log message:

Fix an exponential function in libcall insertion to not be exponential. :)


---
Diffs of the changes:  (+10 -6)

 LegalizeDAG.cpp |   16 ++++++++++------
 1 files changed, 10 insertions(+), 6 deletions(-)


Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.256 llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.257
--- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.256	Mon Jan  9 12:31:59 2006
+++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp	Mon Jan  9 17:21:49 2006
@@ -3151,8 +3151,10 @@
 /// FindLatestCallSeqStart - Scan up the dag to find the latest (highest
 /// NodeDepth) node that is an CallSeqStart operation and occurs later than
 /// Found.
-static void FindLatestCallSeqStart(SDNode *Node, SDNode *&Found) {
-  if (Node->getNodeDepth() <= Found->getNodeDepth()) return;
+static void FindLatestCallSeqStart(SDNode *Node, SDNode *&Found,
+                                   std::set<SDNode*> &Visited) {
+  if (Node->getNodeDepth() <= Found->getNodeDepth() ||
+      !Visited.insert(Node).second) return;
   
   // If we found an CALLSEQ_START, we already know this node occurs later
   // than the Found node. Just remember this node and return.
@@ -3165,11 +3167,11 @@
   assert(Node->getNumOperands() != 0 &&
          "All leaves should have depth equal to the entry node!");
   for (unsigned i = 0, e = Node->getNumOperands()-1; i != e; ++i)
-    FindLatestCallSeqStart(Node->getOperand(i).Val, Found);
+    FindLatestCallSeqStart(Node->getOperand(i).Val, Found, Visited);
 
   // Tail recurse for the last iteration.
   FindLatestCallSeqStart(Node->getOperand(Node->getNumOperands()-1).Val,
-                             Found);
+                         Found, Visited);
 }
 
 
@@ -3247,7 +3249,9 @@
                                        SDOperand Entry) {
   SDNode *LatestCallSeqStart = Entry.Val;
   SDNode *LatestCallSeqEnd = 0;
-  FindLatestCallSeqStart(OpNode, LatestCallSeqStart);
+  std::set<SDNode*> Visited;
+  FindLatestCallSeqStart(OpNode, LatestCallSeqStart, Visited);
+  Visited.clear();
   //std::cerr<<"Found node: "; LatestCallSeqStart->dump(); std::cerr <<"\n";
 
   // It is possible that no ISD::CALLSEQ_START was found because there is no
@@ -3265,8 +3269,8 @@
   // Finally, find the first call that this must come before, first we find the
   // CallSeqEnd that ends the call.
   OutChain = 0;
-  std::set<SDNode*> Visited;
   FindEarliestCallSeqEnd(OpNode, OutChain, Visited);
+  Visited.clear();
 
   // If we found one, translate from the adj up to the callseq_start.
   if (OutChain)





From lattner at cs.uiuc.edu  Mon Jan  9 17:52:29 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Mon, 9 Jan 2006 17:52:29 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
	PPCISelLowering.h 
Message-ID: <200601092352.RAA15488@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/PowerPC:

PPCISelLowering.cpp updated: 1.59 -> 1.60
PPCISelLowering.h updated: 1.13 -> 1.14
---
Log message:

Give PPCISD:: nodes legible names in dumps.


---
Diffs of the changes:  (+23 -0)

 PPCISelLowering.cpp |   19 +++++++++++++++++++
 PPCISelLowering.h   |    4 ++++
 2 files changed, 23 insertions(+)


Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.59 llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.60
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.59	Thu Jan  5 19:04:03 2006
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp	Mon Jan  9 17:52:17 2006
@@ -139,6 +139,25 @@
   computeRegisterProperties();
 }
 
+const char *PPCTargetLowering::getTargetNodeName(unsigned Opcode) const {
+  switch (Opcode) {
+  default: return 0;
+  case PPCISD::FSEL:          return "PPCISD::FSEL";
+  case PPCISD::FCFID:         return "PPCISD::FCFID";
+  case PPCISD::FCTIDZ:        return "PPCISD::FCTIDZ";
+  case PPCISD::FCTIWZ:        return "PPCISD::FCTIWZ";
+  case PPCISD::VMADDFP:       return "PPCISD::VMADDFP";
+  case PPCISD::VNMSUBFP:      return "PPCISD::VNMSUBFP";
+  case PPCISD::Hi:            return "PPCISD::Hi";
+  case PPCISD::Lo:            return "PPCISD::Lo";
+  case PPCISD::GlobalBaseReg: return "PPCISD::GlobalBaseReg";
+  case PPCISD::SRL:           return "PPCISD::SRL";
+  case PPCISD::SRA:           return "PPCISD::SRA";
+  case PPCISD::SHL:           return "PPCISD::SHL";
+  case PPCISD::RET_FLAG:      return "PPCISD::RET_FLAG";
+  }
+}
+
 /// isFloatingPointZero - Return true if this is 0.0 or -0.0.
 static bool isFloatingPointZero(SDOperand Op) {
   if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(Op))


Index: llvm/lib/Target/PowerPC/PPCISelLowering.h
diff -u llvm/lib/Target/PowerPC/PPCISelLowering.h:1.13 llvm/lib/Target/PowerPC/PPCISelLowering.h:1.14
--- llvm/lib/Target/PowerPC/PPCISelLowering.h:1.13	Mon Dec 19 18:26:01 2005
+++ llvm/lib/Target/PowerPC/PPCISelLowering.h	Mon Jan  9 17:52:17 2006
@@ -70,6 +70,10 @@
   public:
     PPCTargetLowering(TargetMachine &TM);
     
+    /// getTargetNodeName() - This method returns the name of a target specific
+    /// DAG node.
+    virtual const char *getTargetNodeName(unsigned Opcode) const;
+    
     /// LowerOperation - Provide custom lowering hooks for some operations.
     ///
     virtual SDOperand LowerOperation(SDOperand Op, SelectionDAG &DAG);





From natebegeman at mac.com  Mon Jan  9 18:16:11 2006
From: natebegeman at mac.com (Nate Begeman)
Date: Mon, 9 Jan 2006 18:16:11 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCInstrInfo.td 
Message-ID: <200601100016.SAA15633@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/PowerPC:

PPCInstrInfo.td updated: 1.171 -> 1.172
---
Log message:

Remove a comment that no longer applies.


---
Diffs of the changes:  (+0 -1)

 PPCInstrInfo.td |    1 -
 1 files changed, 1 deletion(-)


Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td
diff -u llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.171 llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.172
--- llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.171	Mon Jan  9 17:20:37 2006
+++ llvm/lib/Target/PowerPC/PPCInstrInfo.td	Mon Jan  9 18:15:59 2006
@@ -224,7 +224,6 @@
 
 
 let isTerminator = 1, noResults = 1 in {
-  // FIXME: temporary workaround for return without an incoming flag.
   let isReturn = 1 in
     def BLR : XLForm_2_ext<19, 16, 20, 0, 0, (ops), "blr", BrB, [(retflag)]>;
   def BCTR : XLForm_2_ext<19, 528, 20, 0, 0, (ops), "bctr", BrB, []>;





From reid at x10sys.com  Mon Jan  9 21:12:42 2006
From: reid at x10sys.com (Reid Spencer)
Date: Mon, 9 Jan 2006 21:12:42 -0600
Subject: [llvm-commits] CVS: llvm/lib/Linker/Linker.cpp 
Message-ID: <200601100312.VAA16718@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Linker:

Linker.cpp updated: 1.8 -> 1.9
---
Log message:

Be a little more explanatory in a comment.


---
Diffs of the changes:  (+1 -1)

 Linker.cpp |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/lib/Linker/Linker.cpp
diff -u llvm/lib/Linker/Linker.cpp:1.8 llvm/lib/Linker/Linker.cpp:1.9
--- llvm/lib/Linker/Linker.cpp:1.8	Tue Dec 13 14:00:37 2005
+++ llvm/lib/Linker/Linker.cpp	Mon Jan  9 21:12:29 2006
@@ -134,7 +134,7 @@
     if (FullPath.isArchive())
       return FullPath;
 
-    // Try the libX.so form
+    // Try the libX.so (or .dylib) form
     FullPath.eraseSuffix();
     FullPath.appendSuffix(&(LTDL_SHLIB_EXT[1]));
     if (FullPath.isDynamicLibrary())  // Native shared library?





From reid at x10sys.com  Mon Jan  9 21:14:53 2006
From: reid at x10sys.com (Reid Spencer)
Date: Mon, 9 Jan 2006 21:14:53 -0600
Subject: [llvm-commits] CVS: llvm/tools/llvm-ld/llvm-ld.cpp 
Message-ID: <200601100314.VAA16754@zion.cs.uiuc.edu>



Changes in directory llvm/tools/llvm-ld:

llvm-ld.cpp updated: 1.28 -> 1.29
---
Log message:

For PR521: http://llvm.cs.uiuc.edu/PR521 :
With these patches we implement the ability for the Linker library to 
keep track of which libraries were actually bytecode files (not archives)
and cause their users to remove such files from the list of libraries to
pass to the native linker.


---
Diffs of the changes:  (+2 -1)

 llvm-ld.cpp |    3 ++-
 1 files changed, 2 insertions(+), 1 deletion(-)


Index: llvm/tools/llvm-ld/llvm-ld.cpp
diff -u llvm/tools/llvm-ld/llvm-ld.cpp:1.28 llvm/tools/llvm-ld/llvm-ld.cpp:1.29
--- llvm/tools/llvm-ld/llvm-ld.cpp:1.28	Tue Dec 20 23:03:23 2005
+++ llvm/tools/llvm-ld/llvm-ld.cpp	Mon Jan  9 21:14:40 2006
@@ -434,10 +434,11 @@
     } else {
       // Build a list of the items from our command line
       Linker::ItemList Items;
+      Linker::ItemList NativeItems;
       BuildLinkItems(Items, InputFilenames, Libraries);
 
       // Link all the items together
-      if (TheLinker.LinkInItems(Items) )
+      if (TheLinker.LinkInItems(Items,NativeItems) )
         return 1;
     }
 





From reid at x10sys.com  Mon Jan  9 21:14:54 2006
From: reid at x10sys.com (Reid Spencer)
Date: Mon, 9 Jan 2006 21:14:54 -0600
Subject: [llvm-commits] CVS: llvm/lib/Linker/LinkItems.cpp 
Message-ID: <200601100314.VAA16758@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Linker:

LinkItems.cpp updated: 1.7 -> 1.8
---
Log message:

For PR521: http://llvm.cs.uiuc.edu/PR521 :
With these patches we implement the ability for the Linker library to 
keep track of which libraries were actually bytecode files (not archives)
and cause their users to remove such files from the list of libraries to
pass to the native linker.


---
Diffs of the changes:  (+37 -19)

 LinkItems.cpp |   56 +++++++++++++++++++++++++++++++++++++-------------------
 1 files changed, 37 insertions(+), 19 deletions(-)


Index: llvm/lib/Linker/LinkItems.cpp
diff -u llvm/lib/Linker/LinkItems.cpp:1.7 llvm/lib/Linker/LinkItems.cpp:1.8
--- llvm/lib/Linker/LinkItems.cpp:1.7	Thu Jul  7 13:21:42 2005
+++ llvm/lib/Linker/LinkItems.cpp	Mon Jan  9 21:14:40 2006
@@ -17,17 +17,28 @@
 
 using namespace llvm;
 
-// LinkItems - preserve link order for an arbitrary set of linkage items.
+// LinkItems - This function is the main entry point into linking. It takes a
+// list of LinkItem which indicates the order the files should be linked and
+// how each file should be treated (plain file or with library search). The
+// function only links bytecode and produces a result list of items that are
+// native objects. 
 bool
-Linker::LinkInItems(const ItemList& Items) {
+Linker::LinkInItems(const ItemList& Items, ItemList& NativeItems) {
+  // Clear the NativeItems just in case
+  NativeItems.clear();
+
   // For each linkage item ...
   for (ItemList::const_iterator I = Items.begin(), E = Items.end();
        I != E; ++I) {
     if (I->second) {
       // Link in the library suggested.
-      if (LinkInLibrary(I->first))
+      bool is_file = true;
+      if (LinkInLibrary(I->first,is_file))
         return true;
+      if (!is_file)
+        NativeItems.push_back(*I);
     } else {
+      // Link in the file suggested
       if (LinkInFile(sys::Path(I->first)))
         return true;
     }
@@ -38,9 +49,10 @@
   // that module should also be aggregated with duplicates eliminated. This is
   // now the time to process the dependent libraries to resolve any remaining
   // symbols.
+  bool is_bytecode;
   for (Module::lib_iterator I = Composite->lib_begin(),
          E = Composite->lib_end(); I != E; ++I)
-    if(LinkInLibrary(*I))
+    if(LinkInLibrary(*I, is_bytecode))
       return true;
 
   return false;
@@ -49,25 +61,30 @@
 
 /// LinkInLibrary - links one library into the HeadModule.
 ///
-bool Linker::LinkInLibrary(const std::string& Lib) {
+bool Linker::LinkInLibrary(const std::string& Lib, bool& is_file) {
+  is_file = false;
   // Determine where this library lives.
   sys::Path Pathname = FindLib(Lib);
   if (Pathname.isEmpty())
     return warning("Cannot find library '" + Lib + "'");
 
   // If its an archive, try to link it in
-  if (Pathname.isArchive()) {
-    if (LinkInArchive(Pathname))
-      return error("Cannot link archive '" + Pathname.toString() + "'");
-  } else if (Pathname.isBytecodeFile()) {
-    // LLVM ".so" file.
-    if (LinkInFile(Pathname))
-      return error("Cannot link file '" + Pathname.toString() + "'");
-
-  } else if (Pathname.isDynamicLibrary()) {
-    return warning("Library '" + Lib + "' is a native dynamic library.");
-  } else {
-    return warning("Supposed library '" + Lib + "' isn't a library.");
+  std::string Magic;
+  Pathname.getMagicNumber(Magic, 64);
+  switch (sys::IdentifyFileType(Magic.c_str(), 64)) {
+    case sys::BytecodeFileType:
+    case sys::CompressedBytecodeFileType:
+      // LLVM ".so" file.
+      if (LinkInFile(Pathname))
+        return error("Cannot link file '" + Pathname.toString() + "'");
+      is_file = true;
+      break;
+    case sys::ArchiveFileType:
+      if (LinkInArchive(Pathname))
+        return error("Cannot link archive '" + Pathname.toString() + "'");
+      break;
+    default:
+      return warning("Supposed library '" + Lib + "' isn't a library.");
   }
   return false;
 }
@@ -85,8 +102,9 @@
 bool Linker::LinkInLibraries(const std::vector<std::string> &Libraries) {
 
   // Process the set of libraries we've been provided.
+  bool is_bytecode;
   for (unsigned i = 0; i < Libraries.size(); ++i)
-    if (LinkInLibrary(Libraries[i]))
+    if (LinkInLibrary(Libraries[i], is_bytecode))
       return true;
 
   // At this point we have processed all the libraries provided to us. Since
@@ -97,7 +115,7 @@
   const Module::LibraryListType& DepLibs = Composite->getLibraries();
   for (Module::LibraryListType::const_iterator I = DepLibs.begin(),
          E = DepLibs.end(); I != E; ++I)
-    if (LinkInLibrary(*I))
+    if (LinkInLibrary(*I, is_bytecode))
       return true;
 
   return false;





From reid at x10sys.com  Mon Jan  9 21:14:55 2006
From: reid at x10sys.com (Reid Spencer)
Date: Mon, 9 Jan 2006 21:14:55 -0600
Subject: [llvm-commits] CVS: llvm/tools/gccld/gccld.cpp 
Message-ID: <200601100314.VAA16762@zion.cs.uiuc.edu>



Changes in directory llvm/tools/gccld:

gccld.cpp updated: 1.107 -> 1.108
---
Log message:

For PR521: http://llvm.cs.uiuc.edu/PR521 :
With these patches we implement the ability for the Linker library to 
keep track of which libraries were actually bytecode files (not archives)
and cause their users to remove such files from the list of libraries to
pass to the native linker.


---
Diffs of the changes:  (+13 -1)

 gccld.cpp |   14 +++++++++++++-
 1 files changed, 13 insertions(+), 1 deletion(-)


Index: llvm/tools/gccld/gccld.cpp
diff -u llvm/tools/gccld/gccld.cpp:1.107 llvm/tools/gccld/gccld.cpp:1.108
--- llvm/tools/gccld/gccld.cpp:1.107	Wed Dec 21 19:50:56 2005
+++ llvm/tools/gccld/gccld.cpp	Mon Jan  9 21:14:40 2006
@@ -243,11 +243,23 @@
     } else {
       // Build a list of the items from our command line
       Linker::ItemList Items;
+      Linker::ItemList NativeItems;
       BuildLinkItems(Items, InputFilenames, Libraries);
 
       // Link all the items together
-      if (TheLinker.LinkInItems(Items))
+      if (TheLinker.LinkInItems(Items,NativeItems))
         return 1; // Error already printed
+
+      // Revise the Libraries based on the remaining (native) libraries that
+      // were not linked in to the bytecode. This ensures that we don't attempt
+      // to pass a bytecode library to the native linker
+      Libraries.clear(); // we've consumed the libraries except for native
+      if ((Native || NativeCBE) && !NativeItems.empty()) {
+        for (Linker::ItemList::const_iterator I = NativeItems.begin(), 
+             E = NativeItems.end(); I != E; ++I) {
+          Libraries.push_back(I->first);
+        }
+      }
     }
 
     // We're done with the Linker, so tell it to release its module





From reid at x10sys.com  Mon Jan  9 21:14:55 2006
From: reid at x10sys.com (Reid Spencer)
Date: Mon, 9 Jan 2006 21:14:55 -0600
Subject: [llvm-commits] CVS: llvm/include/llvm/Linker.h 
Message-ID: <200601100314.VAA16764@zion.cs.uiuc.edu>



Changes in directory llvm/include/llvm:

Linker.h updated: 1.17 -> 1.18
---
Log message:

For PR521: http://llvm.cs.uiuc.edu/PR521 :
With these patches we implement the ability for the Linker library to 
keep track of which libraries were actually bytecode files (not archives)
and cause their users to remove such files from the list of libraries to
pass to the native linker.


---
Diffs of the changes:  (+4 -2)

 Linker.h |    6 ++++--
 1 files changed, 4 insertions(+), 2 deletions(-)


Index: llvm/include/llvm/Linker.h
diff -u llvm/include/llvm/Linker.h:1.17 llvm/include/llvm/Linker.h:1.18
--- llvm/include/llvm/Linker.h:1.17	Mon Dec 26 07:34:00 2005
+++ llvm/include/llvm/Linker.h	Mon Jan  9 21:14:40 2006
@@ -158,7 +158,8 @@
     /// @see getLastError
     /// @throws nothing
     bool LinkInItems (
-      const ItemList& Items // Set of libraries/files to link in
+      const ItemList& Items, ///< Set of libraries/files to link in
+      ItemList& NativeItems  ///< Output list of native files/libs
     );
 
     /// This function links the bytecode \p Files into the composite module.
@@ -210,7 +211,8 @@
     /// @returns true if an error occurs, false otherwise
     /// @brief Link one library into the module
     bool LinkInLibrary (
-      const std::string& Library ///< The library to link in
+      const std::string& Library, ///< The library to link in
+      bool& is_file               ///< Indicates if lib is really a bc file
     );
 
     /// This function links one bytecode archive, \p Filename, into the module.





From reid at x10sys.com  Mon Jan  9 21:48:47 2006
From: reid at x10sys.com (Reid Spencer)
Date: Mon, 9 Jan 2006 21:48:47 -0600
Subject: [llvm-commits] CVS: llvm/lib/Analysis/IPA/FindUsedTypes.cpp 
Message-ID: <200601100348.VAA17024@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Analysis/IPA:

FindUsedTypes.cpp updated: 1.33 -> 1.34
---
Log message:

Remove unused inclusion of SymbolTable.h


---
Diffs of the changes:  (+0 -1)

 FindUsedTypes.cpp |    1 -
 1 files changed, 1 deletion(-)


Index: llvm/lib/Analysis/IPA/FindUsedTypes.cpp
diff -u llvm/lib/Analysis/IPA/FindUsedTypes.cpp:1.33 llvm/lib/Analysis/IPA/FindUsedTypes.cpp:1.34
--- llvm/lib/Analysis/IPA/FindUsedTypes.cpp:1.33	Thu Apr 21 22:54:59 2005
+++ llvm/lib/Analysis/IPA/FindUsedTypes.cpp	Mon Jan  9 21:48:34 2006
@@ -17,7 +17,6 @@
 #include "llvm/Constants.h"
 #include "llvm/DerivedTypes.h"
 #include "llvm/Module.h"
-#include "llvm/SymbolTable.h"
 #include "llvm/Assembly/CachedWriter.h"
 #include "llvm/Support/InstIterator.h"
 using namespace llvm;





From duraid at octopus.com.au  Mon Jan  9 23:08:38 2006
From: duraid at octopus.com.au (Duraid Madina)
Date: Mon, 9 Jan 2006 23:08:38 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/IA64/IA64ISelLowering.cpp 
Message-ID: <200601100508.XAA17790@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/IA64:

IA64ISelLowering.cpp updated: 1.12 -> 1.13
---
Log message:


support functions that return bool (this "should" work but doesn't,
*maybe* due to a legalizer bug.)



---
Diffs of the changes:  (+10 -10)

 IA64ISelLowering.cpp |   20 ++++++++++----------
 1 files changed, 10 insertions(+), 10 deletions(-)


Index: llvm/lib/Target/IA64/IA64ISelLowering.cpp
diff -u llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.12 llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.13
--- llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.12	Fri Jan  6 11:56:38 2006
+++ llvm/lib/Target/IA64/IA64ISelLowering.cpp	Mon Jan  9 23:08:25 2006
@@ -452,18 +452,18 @@
   SDOperand RetVal;
   if (RetTyVT != MVT::isVoid) {
     switch (RetTyVT) {
-    default: assert(0 && "Unknown value type to return!");
-    case MVT::i1:/* { // bools are just like other integers (returned in r8)
+    default: // assert(0 && "Unknown value type to return!");
+    case MVT::i1: { // bools are just like other integers (returned in r8)
       SDOperand boolInR8 = DAG.getCopyFromReg(Chain, IA64::r8, MVT::i64, InFlag);
-      RetVal = DAG.getTargetNode(IA64::CMPNE, MVT::i1, // FIXME: is this flagged correctly?
-        DAG.getRegister(IA64::r0, MVT::i64), boolInR8, Chain, InFlag);
-      Chain = RetVal.getValue(1);
-      // Add a note to keep track of whether it is sign or zero extended - TODO: bools
-      RetVal = DAG.getNode(RetTy->isSigned() ? ISD::AssertSext :ISD::AssertZext,
-                           MVT::i64, RetVal, DAG.getValueType(RetTyVT));
-      RetVal = DAG.getNode(ISD::TRUNCATE, RetTyVT, RetVal);
+      InFlag = boolInR8.getValue(2);
+      Chain = boolInR8.getValue(1);
+      SDOperand zeroReg = DAG.getCopyFromReg(Chain, IA64::r0, MVT::i64, InFlag);
+      InFlag = zeroReg.getValue(2);
+      Chain = zeroReg.getValue(1); 	
+      
+      RetVal = DAG.getNode(ISD::SETNE, MVT::i1, boolInR8, zeroReg);
       break;
-    }*/
+    }
     case MVT::i8:
     case MVT::i16:
     case MVT::i32:





From duraid at octopus.com.au  Mon Jan  9 23:26:13 2006
From: duraid at octopus.com.au (Duraid Madina)
Date: Mon, 9 Jan 2006 23:26:13 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/IA64/IA64ISelLowering.cpp 
Message-ID: <200601100526.XAA18010@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/IA64:

IA64ISelLowering.cpp updated: 1.13 -> 1.14
---
Log message:

heh, 'sif it'd be a legalizer bug.



---
Diffs of the changes:  (+1 -1)

 IA64ISelLowering.cpp |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/lib/Target/IA64/IA64ISelLowering.cpp
diff -u llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.13 llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.14
--- llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.13	Mon Jan  9 23:08:25 2006
+++ llvm/lib/Target/IA64/IA64ISelLowering.cpp	Mon Jan  9 23:26:01 2006
@@ -461,7 +461,7 @@
       InFlag = zeroReg.getValue(2);
       Chain = zeroReg.getValue(1); 	
       
-      RetVal = DAG.getNode(ISD::SETNE, MVT::i1, boolInR8, zeroReg);
+      RetVal = DAG.getSetCC(MVT::i1, boolInR8, zeroReg, ISD::SETNE);
       break;
     }
     case MVT::i8:





From lattner at cs.uiuc.edu  Mon Jan  9 23:42:12 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Mon, 9 Jan 2006 23:42:12 -0600
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/LiveIntervalAnalysis.cpp 
Message-ID: <200601100542.XAA18276@zion.cs.uiuc.edu>



Changes in directory llvm/lib/CodeGen:

LiveIntervalAnalysis.cpp updated: 1.152 -> 1.153
---
Log message:

Minor cleanup, no functionality change for current targets


---
Diffs of the changes:  (+2 -1)

 LiveIntervalAnalysis.cpp |    3 ++-
 1 files changed, 2 insertions(+), 1 deletion(-)


Index: llvm/lib/CodeGen/LiveIntervalAnalysis.cpp
diff -u llvm/lib/CodeGen/LiveIntervalAnalysis.cpp:1.152 llvm/lib/CodeGen/LiveIntervalAnalysis.cpp:1.153
--- llvm/lib/CodeGen/LiveIntervalAnalysis.cpp:1.152	Tue Jan  3 01:41:37 2006
+++ llvm/lib/CodeGen/LiveIntervalAnalysis.cpp	Mon Jan  9 23:41:59 2006
@@ -585,7 +585,8 @@
     handleVirtualRegisterDef(MBB, MI, getOrCreateInterval(reg));
   else if (allocatableRegs_[reg]) {
     unsigned SrcReg = 0, DestReg = 0;
-    bool IsMove = tii_->isMoveInstr(*MI, SrcReg, DestReg);
+    if (!tii_->isMoveInstr(*MI, SrcReg, DestReg))
+      SrcReg = DestReg = 0;
 
     handlePhysicalRegisterDef(MBB, MI, getOrCreateInterval(reg),
                               SrcReg, DestReg);





From reid at x10sys.com  Tue Jan 10 03:46:11 2006
From: reid at x10sys.com (Reid Spencer)
Date: Tue, 10 Jan 2006 03:46:11 -0600
Subject: [llvm-commits] CVS: llvm/include/llvm/Value.h 
Message-ID: <200601100946.DAA17796@zion.cs.uiuc.edu>



Changes in directory llvm/include/llvm:

Value.h updated: 1.80 -> 1.81
---
Log message:

Make ValueSymbolTable (temporarily) a friend of Value so it can mod the 
Name of Value instances.


---
Diffs of the changes:  (+2 -1)

 Value.h |    3 ++-
 1 files changed, 2 insertions(+), 1 deletion(-)


Index: llvm/include/llvm/Value.h
diff -u llvm/include/llvm/Value.h:1.80 llvm/include/llvm/Value.h:1.81
--- llvm/include/llvm/Value.h:1.80	Fri Dec 16 18:18:06 2005
+++ llvm/include/llvm/Value.h	Tue Jan 10 03:45:57 2006
@@ -51,7 +51,8 @@
   PATypeHolder Ty;
   Use *UseList;
 
-  friend class SymbolTable;    // Allow SymbolTable to directly poke Name.
+  friend class ValueSymbolTable; // Allow ValueSymbolTable to directly mod Name.
+  friend class SymbolTable;      // Allow SymbolTable to directly poke Name.
   std::string Name;
 
   void operator=(const Value &);     // Do not implement





From reid at x10sys.com  Tue Jan 10 03:52:01 2006
From: reid at x10sys.com (Reid Spencer)
Date: Tue, 10 Jan 2006 03:52:01 -0600
Subject: [llvm-commits] CVS: llvm/lib/VMCore/TypeSymbolTable.cpp
	ValueSymbolTable.cpp 
Message-ID: <200601100952.DAA18463@zion.cs.uiuc.edu>



Changes in directory llvm/lib/VMCore:

TypeSymbolTable.cpp added (r1.1)
ValueSymbolTable.cpp added (r1.1)
---
Log message:

For PR411: http://llvm.cs.uiuc.edu/PR411 :
First step in refactoring the SymbolTable is to split it into two classes,
one for a symbol table of types and one for a symbol table of Values. 


---
Diffs of the changes:  (+360 -0)

 TypeSymbolTable.cpp  |  193 +++++++++++++++++++++++++++++++++++++++++++++++++++
 ValueSymbolTable.cpp |  167 ++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 360 insertions(+)


Index: llvm/lib/VMCore/TypeSymbolTable.cpp
diff -c /dev/null llvm/lib/VMCore/TypeSymbolTable.cpp:1.1
*** /dev/null	Tue Jan 10 03:51:58 2006
--- llvm/lib/VMCore/TypeSymbolTable.cpp	Tue Jan 10 03:51:48 2006
***************
*** 0 ****
--- 1,193 ----
+ //===-- TypeSymbolTable.cpp - Implement the TypeSymbolTable class ---------===//
+ //
+ //                     The LLVM Compiler Infrastructure
+ //
+ // This file was developed by the LLVM research group and revised by Reid
+ // Spencer. It is distributed under the University of Illinois Open Source
+ // License. See LICENSE.TXT for details.
+ //
+ //===----------------------------------------------------------------------===//
+ //
+ // This file implements the TypeSymbolTable class for the VMCore library.
+ //
+ //===----------------------------------------------------------------------===//
+ 
+ #include "llvm/TypeSymbolTable.h"
+ #include "llvm/DerivedTypes.h"
+ #include "llvm/ADT/StringExtras.h"
+ #include <iostream>
+ 
+ using namespace llvm;
+ 
+ #define DEBUG_SYMBOL_TABLE 0
+ #define DEBUG_ABSTYPE 0
+ 
+ TypeSymbolTable::~TypeSymbolTable() {
+   // Drop all abstract type references in the type plane...
+   for (iterator TI = tmap.begin(), TE = tmap.end(); TI != TE; ++TI) {
+     if (TI->second->isAbstract())   // If abstract, drop the reference...
+       cast<DerivedType>(TI->second)->removeAbstractTypeUser(this);
+   }
+ }
+ 
+ std::string TypeSymbolTable::getUniqueName(const std::string &BaseName) const {
+   std::string TryName = BaseName;
+   const_iterator End = tmap.end();
+ 
+   // See if the name exists
+   while (tmap.find(TryName) != End)            // Loop until we find a free
+     TryName = BaseName + utostr(++LastUnique); // name in the symbol table
+   return TryName;
+ }
+ 
+ // lookup a type by name - returns null on failure
+ Type* TypeSymbolTable::lookup(const std::string& Name) const {
+   const_iterator TI = tmap.find(Name);
+   if (TI != tmap.end())
+     return const_cast<Type*>(TI->second);
+   return 0;
+ }
+ 
+ // Erase a specific type from the symbol table
+ bool TypeSymbolTable::erase(Type *N) {
+   for (iterator TI = tmap.begin(), TE = tmap.end(); TI != TE; ++TI) {
+     if (TI->second == N) {
+       this->erase(TI);
+       return true;
+     }
+   }
+   return false;
+ }
+ 
+ // remove - Remove a type from the symbol table...
+ Type* TypeSymbolTable::erase(iterator Entry) {
+   assert(Entry != tmap.end() && "Invalid entry to remove!");
+ 
+   const Type* Result = Entry->second;
+ 
+ #if DEBUG_SYMBOL_TABLE
+   dump();
+   std::cerr << " Removing Value: " << Result->getName() << "\n";
+ #endif
+ 
+   tmap.erase(Entry);
+ 
+   // If we are removing an abstract type, remove the symbol table from it's use
+   // list...
+   if (Result->isAbstract()) {
+ #if DEBUG_ABSTYPE
+     std::cerr << "Removing abstract type from symtab" << Result->getDescription()<<"\n";
+ #endif
+     cast<DerivedType>(Result)->removeAbstractTypeUser(this);
+   }
+ 
+   return const_cast<Type*>(Result);
+ }
+ 
+ 
+ // insert - Insert a type into the symbol table with the specified name...
+ void TypeSymbolTable::insert(const std::string& Name, const Type* T) {
+   assert(T && "Can't insert null type into symbol table!");
+ 
+   // Check to see if there is a naming conflict.  If so, rename this type!
+   std::string UniqueName = Name;
+   if (lookup(Name))
+     UniqueName = getUniqueName(Name);
+ 
+ #if DEBUG_SYMBOL_TABLE
+   dump();
+   std::cerr << " Inserting type: " << UniqueName << ": "
+             << T->getDescription() << "\n";
+ #endif
+ 
+   // Insert the tmap entry
+   tmap.insert(make_pair(UniqueName, T));
+ 
+   // If we are adding an abstract type, add the symbol table to it's use list.
+   if (T->isAbstract()) {
+     cast<DerivedType>(T)->addAbstractTypeUser(this);
+ #if DEBUG_ABSTYPE
+     std::cerr << "Added abstract type to ST: " << T->getDescription() << "\n";
+ #endif
+   }
+ }
+ 
+ // Strip the symbol table of its names.
+ bool TypeSymbolTable::strip() {
+   bool RemovedSymbol = false;
+   for (iterator TI = tmap.begin(); TI != tmap.end(); ) {
+     erase(TI++);
+     RemovedSymbol = true;
+   }
+ 
+   return RemovedSymbol;
+ }
+ 
+ /// rename - Given a value with a non-empty name, remove its existing entry
+ /// from the symbol table and insert a new one for Name.  This is equivalent to
+ /// doing "remove(V), V->Name = Name, insert(V)", but is faster, and will not
+ /// temporarily remove the symbol table plane if V is the last value in the
+ /// symtab with that name (which could invalidate iterators to that plane).
+ bool TypeSymbolTable::rename(Type *T, const std::string &name) {
+   for (iterator TI = tmap.begin(), TE = tmap.end(); TI != TE; ++TI) {
+     if (TI->second == T) {
+       // Remove the old entry.
+       tmap.erase(TI);
+       // Add the new entry.
+       this->insert(name,T);
+       return true;
+     }
+   }
+   return false;
+ }
+ 
+ // This function is called when one of the types in the type plane are refined
+ void TypeSymbolTable::refineAbstractType(const DerivedType *OldType,
+                                          const Type *NewType) {
+ 
+   // Loop over all of the types in the symbol table, replacing any references
+   // to OldType with references to NewType.  Note that there may be multiple
+   // occurrences, and although we only need to remove one at a time, it's
+   // faster to remove them all in one pass.
+   //
+   for (iterator I = begin(), E = end(); I != E; ++I) {
+     if (I->second == (Type*)OldType) {  // FIXME when Types aren't const.
+ #if DEBUG_ABSTYPE
+       std::cerr << "Removing type " << OldType->getDescription() << "\n";
+ #endif
+       OldType->removeAbstractTypeUser(this);
+ 
+       I->second = (Type*)NewType;  // TODO FIXME when types aren't const
+       if (NewType->isAbstract()) {
+ #if DEBUG_ABSTYPE
+         std::cerr << "Added type " << NewType->getDescription() << "\n";
+ #endif
+         cast<DerivedType>(NewType)->addAbstractTypeUser(this);
+       }
+     }
+   }
+ }
+ 
+ 
+ // Handle situation where type becomes Concreate from Abstract
+ void TypeSymbolTable::typeBecameConcrete(const DerivedType *AbsTy) {
+   // Loop over all of the types in the symbol table, dropping any abstract
+   // type user entries for AbsTy which occur because there are names for the
+   // type.
+   for (iterator TI = begin(), TE = end(); TI != TE; ++TI)
+     if (TI->second == const_cast<Type*>(static_cast<const Type*>(AbsTy)))
+       AbsTy->removeAbstractTypeUser(this);
+ }
+ 
+ static void DumpTypes(const std::pair<const std::string, const Type*>& T ) {
+   std::cerr << "  '" << T.first << "' = ";
+   T.second->dump();
+   std::cerr << "\n";
+ }
+ 
+ void TypeSymbolTable::dump() const {
+   std::cerr << "TypeSymbolPlane: ";
+   for_each(tmap.begin(), tmap.end(), DumpTypes);
+ }
+ 
+ // vim: sw=2 ai


Index: llvm/lib/VMCore/ValueSymbolTable.cpp
diff -c /dev/null llvm/lib/VMCore/ValueSymbolTable.cpp:1.1
*** /dev/null	Tue Jan 10 03:52:01 2006
--- llvm/lib/VMCore/ValueSymbolTable.cpp	Tue Jan 10 03:51:48 2006
***************
*** 0 ****
--- 1,167 ----
+ //===-- ValueSymbolTable.cpp - Implement the ValueSymbolTable class -------===//
+ //
+ //                     The LLVM Compiler Infrastructure
+ //
+ // This file was developed by the LLVM research group and revised by Reid
+ // Spencer. It is distributed under the University of Illinois Open Source
+ // License. See LICENSE.TXT for details.
+ //
+ //===----------------------------------------------------------------------===//
+ //
+ // This file implements the ValueSymbolTable class for the VMCore library.
+ //
+ //===----------------------------------------------------------------------===//
+ 
+ #include "llvm/GlobalValue.h"
+ #include "llvm/Type.h"
+ #include "llvm/ValueSymbolTable.h"
+ #include "llvm/ADT/StringExtras.h"
+ #include <algorithm>
+ #include <iostream>
+ 
+ using namespace llvm;
+ 
+ #define DEBUG_SYMBOL_TABLE 0
+ #define DEBUG_ABSTYPE 0
+ 
+ // Class destructor
+ ValueSymbolTable::~ValueSymbolTable() {
+ #ifndef NDEBUG   // Only do this in -g mode...
+   bool LeftoverValues = true;
+   for (iterator VI = vmap.begin(), VE = vmap.end(); VI != VE; ++VI)
+     if (!isa<Constant>(VI->second) ) {
+       std::cerr << "Value still in symbol table! Type = '"
+                 << VI->second->getType()->getDescription() << "' Name = '"
+                 << VI->first << "'\n";
+       LeftoverValues = false;
+     }
+   assert(LeftoverValues && "Values remain in symbol table!");
+ #endif
+ }
+ 
+ // getUniqueName - Given a base name, return a string that is either equal to
+ // it (or derived from it) that does not already occur in the symbol table for
+ // the specified type.
+ //
+ std::string ValueSymbolTable::getUniqueName(const std::string &BaseName) const {
+   std::string TryName = BaseName;
+   const_iterator End = vmap.end();
+ 
+   // See if the name exists
+   while (vmap.find(TryName) != End)            // Loop until we find a free
+     TryName = BaseName + utostr(++LastUnique); // name in the symbol table
+   return TryName;
+ }
+ 
+ 
+ // lookup a value - Returns null on failure...
+ //
+ Value *ValueSymbolTable::lookup(const std::string &Name) const {
+   const_iterator VI = vmap.find(Name);
+   if (VI != vmap.end())                   // We found the symbol
+     return const_cast<Value*>(VI->second);
+   return 0;
+ }
+ 
+ // Strip the symbol table of its names.
+ //
+ bool ValueSymbolTable::strip() {
+   bool RemovedSymbol = false;
+   for (iterator VI = vmap.begin(), VE = vmap.end(); VI != VE; ) {
+     Value *V = VI->second;
+     ++VI;
+     if (!isa<GlobalValue>(V) || cast<GlobalValue>(V)->hasInternalLinkage()) {
+       // Set name to "", removing from symbol table!
+       V->setName("");
+       RemovedSymbol = true;
+     }
+   }
+   return RemovedSymbol;
+ }
+ 
+ // Insert a value into the symbol table with the specified name...
+ //
+ void ValueSymbolTable::insert(Value* V) {
+   assert(V && "Can't insert null Value into symbol table!");
+   assert(V->hasName() && "Can't insert nameless Value into symbol table");
+ 
+   // Check to see if there is a naming conflict.  If so, rename this type!
+   std::string UniqueName = getUniqueName(V->getName());
+ 
+ #if DEBUG_SYMBOL_TABLE
+   dump();
+   std::cerr << " Inserting value: " << UniqueName << ": " << V->dump() << "\n";
+ #endif
+ 
+   // Insert the vmap entry
+   vmap.insert(make_pair(UniqueName, V));
+ }
+ 
+ // Remove a value
+ bool ValueSymbolTable::erase(Value *V) {
+   assert(V->hasName() && "Value doesn't have name!");
+   iterator Entry = vmap.find(V->getName());
+   if (Entry == vmap.end())
+     return false;
+ 
+ #if DEBUG_SYMBOL_TABLE
+   dump();
+   std::cerr << " Removing Value: " << Entry->second->getName() << "\n";
+ #endif
+ 
+   // Remove the value from the plane...
+   vmap.erase(Entry);
+   return true;
+ }
+ 
+ 
+ // rename - Given a value with a non-empty name, remove its existing entry
+ // from the symbol table and insert a new one for Name.  This is equivalent to
+ // doing "remove(V), V->Name = Name, insert(V)", 
+ //
+ bool ValueSymbolTable::rename(Value *V, const std::string &name) {
+   assert(V && "Can't rename a null Value");
+   assert(V->hasName() && "Can't rename a nameless Value");
+   assert(!V->getName().empty() && "Can't rename an Value with null name");
+   assert(V->getName() != name && "Can't rename a Value with same name");
+   assert(!name.empty() && "Can't rename a named Value with a null name");
+ 
+   // Find the name
+   iterator VI = vmap.find(V->getName());
+ 
+   // If we didn't find it, we're done
+   if (VI == vmap.end())
+     return false;
+ 
+   // Remove the old entry.
+   vmap.erase(VI);
+ 
+   // See if we can insert the new name.
+   VI = vmap.lower_bound(name);
+ 
+   // Is there a naming conflict?
+   if (VI != vmap.end() && VI->first == name) {
+     V->Name = getUniqueName( name);
+     vmap.insert(make_pair(V->Name, V));
+   } else {
+     V->Name = name;
+     vmap.insert(VI, make_pair(name, V));
+   }
+ 
+   return true;
+ }
+ 
+ // DumpVal - a std::for_each function for dumping a value
+ //
+ static void DumpVal(const std::pair<const std::string, Value *> &V) {
+   std::cerr << "  '" << V.first << "' = ";
+   V.second->dump();
+   std::cerr << "\n";
+ }
+ 
+ // dump - print out the symbol table
+ //
+ void ValueSymbolTable::dump() const {
+   std::cerr << "ValueSymbolTable:\n";
+   for_each(vmap.begin(), vmap.end(), DumpVal);
+ }





From reid at x10sys.com  Tue Jan 10 03:52:01 2006
From: reid at x10sys.com (Reid Spencer)
Date: Tue, 10 Jan 2006 03:52:01 -0600
Subject: [llvm-commits] CVS: llvm/include/llvm/TypeSymbolTable.h
	ValueSymbolTable.h 
Message-ID: <200601100952.DAA18469@zion.cs.uiuc.edu>



Changes in directory llvm/include/llvm:

TypeSymbolTable.h added (r1.1)
ValueSymbolTable.h added (r1.1)
---
Log message:

For PR411: http://llvm.cs.uiuc.edu/PR411 :
First step in refactoring the SymbolTable is to split it into two classes,
one for a symbol table of types and one for a symbol table of Values. 


---
Diffs of the changes:  (+290 -0)

 TypeSymbolTable.h  |  152 +++++++++++++++++++++++++++++++++++++++++++++++++++++
 ValueSymbolTable.h |  138 ++++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 290 insertions(+)


Index: llvm/include/llvm/TypeSymbolTable.h
diff -c /dev/null llvm/include/llvm/TypeSymbolTable.h:1.1
*** /dev/null	Tue Jan 10 03:51:58 2006
--- llvm/include/llvm/TypeSymbolTable.h	Tue Jan 10 03:51:48 2006
***************
*** 0 ****
--- 1,152 ----
+ //===-- llvm/TypeSymbolTable.h - Implement a Type Symtab --------*- C++ -*-===//
+ //
+ //                     The LLVM Compiler Infrastructure
+ //
+ // This file was developed by Reid Spencer based on the original SymbolTable
+ // implemented by the LLVM Research Group and re-written by Reid Spencer.
+ // It is distributed under the University of Illinois Open Source License. 
+ // See LICENSE.TXT for details.
+ //
+ //===----------------------------------------------------------------------===//
+ //
+ // This file implements the name/type symbol table for LLVM.
+ //
+ //===----------------------------------------------------------------------===//
+ 
+ #ifndef LLVM_TYPE_SYMBOL_TABLE_H
+ #define LLVM_TYPE_SYMBOL_TABLE_H
+ 
+ #include "llvm/Type.h"
+ #include <map>
+ 
+ namespace llvm {
+ 
+ /// This class provides a symbol table of name/type pairs with operations to
+ /// support constructing, searching and iterating over the symbol table. The
+ /// class derives from AbstractTypeUser so that the contents of the symbol
+ /// table can be updated when abstract types become concrete.
+ class TypeSymbolTable : public AbstractTypeUser {
+ 
+ /// @name Types
+ /// @{
+ public:
+ 
+   /// @brief A mapping of names to types.
+   typedef std::map<const std::string, const Type*> TypeMap;
+ 
+   /// @brief An iterator over the TypeMap.
+   typedef TypeMap::iterator iterator;
+ 
+   /// @brief A const_iterator over the TypeMap.
+   typedef TypeMap::const_iterator const_iterator;
+ 
+ /// @}
+ /// @name Constructors
+ /// @{
+ public:
+ 
+   TypeSymbolTable() {}
+   ~TypeSymbolTable();
+ 
+ /// @}
+ /// @name Accessors
+ /// @{
+ public:
+ 
+   /// Generates a unique name for a type based on the \p BaseName by
+   /// incrementing an integer and appending it to the name, if necessary
+   /// @returns the unique name
+   /// @brief Get a unique name for a type
+   std::string getUniqueName(const std::string &BaseName) const;
+ 
+   /// This method finds the type with the given \p name in the type map
+   /// and returns it.
+   /// @returns null if the name is not found, otherwise the Type
+   /// associated with the \p name.
+   /// @brief Lookup a type by name.
+   Type* lookup(const std::string& name) const;
+ 
+   /// @returns true iff the symbol table is empty.
+   /// @brief Determine if the symbol table is empty
+   inline bool empty() const { return tmap.empty(); }
+ 
+   /// @returns the size of the symbol table
+   /// @brief The number of name/type pairs is returned.
+   inline unsigned size() const { return unsigned(tmap.size()); }
+ 
+   /// This function can be used from the debugger to display the
+   /// content of the symbol table while debugging.
+   /// @brief Print out symbol table on stderr
+   void dump() const;
+ 
+ /// @}
+ /// @name Iteration
+ /// @{
+ public:
+   /// Get an iterator to the start of the symbol table
+   inline iterator begin() { return tmap.begin(); }
+ 
+   /// @brief Get a const_iterator to the start of the symbol table
+   inline const_iterator begin() const { return tmap.begin(); }
+ 
+   /// Get an iterator to the end of the symbol talbe. 
+   inline iterator end() { return tmap.end(); }
+ 
+   /// Get a const_iterator to the end of the symbol table.
+   inline const_iterator end() const { return tmap.end(); }
+ 
+ /// @}
+ /// @name Mutators
+ /// @{
+ public:
+ 
+   /// This method will strip the symbol table of its names 
+   /// @brief Strip the symbol table.
+   bool strip();
+ 
+   /// Inserts a type into the symbol table with the specified name. There can be
+   /// a many-to-one mapping between names and types. This method allows a type
+   /// with an existing entry in the symbol table to get a new name.
+   /// @brief Insert a type under a new name.
+   void insert(const std::string &Name, const Type *Typ);
+ 
+   /// Remove a type at the specified position in the symbol table.
+   /// @returns the removed Type.
+   /// @returns the Type that was erased from the symbol table.
+   Type* erase(iterator TI);
+ 
+   /// Remove a specific Type from the symbol table. This isn't fast, linear
+   /// search, O(n), algorithm.
+   /// @returns true if the erase was successful (TI was found)
+   bool erase(Type* TI);
+ 
+   /// Rename a type. This ain't fast, we have to linearly search for it first.
+   /// @returns true if the rename was successful (type was found)
+   bool rename(Type* T, const std::string& new_name);
+ 
+ /// @}
+ /// @name AbstractTypeUser Methods
+ /// @{
+ private:
+   /// This function is called when one of the types in the type plane
+   /// is refined.
+   virtual void refineAbstractType(const DerivedType *OldTy, const Type *NewTy);
+ 
+   /// This function markes a type as being concrete (defined).
+   virtual void typeBecameConcrete(const DerivedType *AbsTy);
+ 
+ /// @}
+ /// @name Internal Data
+ /// @{
+ private:
+   TypeMap tmap; ///< This is the mapping of names to types.
+   mutable unsigned long LastUnique; ///< Counter for tracking unique names
+ 
+ /// @}
+ 
+ };
+ 
+ } // End llvm namespace
+ 
+ #endif
+ 


Index: llvm/include/llvm/ValueSymbolTable.h
diff -c /dev/null llvm/include/llvm/ValueSymbolTable.h:1.1
*** /dev/null	Tue Jan 10 03:52:01 2006
--- llvm/include/llvm/ValueSymbolTable.h	Tue Jan 10 03:51:48 2006
***************
*** 0 ****
--- 1,138 ----
+ //===-- llvm/ValueSymbolTable.h - Implement a Value Symtab ------*- C++ -*-===//
+ //
+ //                     The LLVM Compiler Infrastructure
+ //
+ // This file was developed by Reid Spencer based on the original SymbolTable.h
+ // written by the LLVM research group and re-written by Reid Spencer.
+ // It is distributed under the University of Illinois Open Source License. 
+ // See LICENSE.TXT for details.
+ //
+ //===----------------------------------------------------------------------===//
+ //
+ // This file implements the name/Value symbol table for LLVM.
+ //
+ //===----------------------------------------------------------------------===//
+ 
+ #ifndef LLVM_VALUE_SYMBOL_TABLE_H
+ #define LLVM_VALUE_SYMBOL_TABLE_H
+ 
+ #include "llvm/Value.h"
+ #include <map>
+ 
+ namespace llvm {
+ 
+ /// This class provides a symbol table of name/value pairs. It is essentially
+ /// a std::map<std::string,Value*> but has a controlled interface provided by
+ /// LLVM as well as ensuring uniqueness of names.
+ ///
+ class ValueSymbolTable {
+ 
+ /// @name Types
+ /// @{
+ public:
+ 
+   /// @brief A mapping of names to values.
+   typedef std::map<const std::string, Value *> ValueMap;
+ 
+   /// @brief An iterator over a ValueMap.
+   typedef ValueMap::iterator iterator;
+ 
+   /// @brief A const_iterator over a ValueMap.
+   typedef ValueMap::const_iterator const_iterator;
+ 
+ /// @}
+ /// @name Constructors
+ /// @{
+ public:
+ 
+   ValueSymbolTable() : LastUnique(0) {}
+   ~ValueSymbolTable();
+ 
+ /// @}
+ /// @name Accessors
+ /// @{
+ public:
+ 
+   /// This method finds the value with the given \p name in the
+   /// the symbol table. 
+   /// @returns the value associated with the \p name
+   /// @brief Lookup a named Value.
+   Value *lookup(const std::string &name) const;
+ 
+   /// @returns true iff the symbol table is empty
+   /// @brief Determine if the symbol table is empty
+   inline bool empty() const { return vmap.empty(); }
+ 
+   /// @brief The number of name/type pairs is returned.
+   inline unsigned size() const { return unsigned(vmap.size()); }
+ 
+   /// Given a base name, return a string that is either equal to it or
+   /// derived from it that does not already occur in the symbol table
+   /// for the specified type.
+   /// @brief Get a name unique to this symbol table
+   std::string getUniqueName(const std::string &BaseName) const;
+ 
+   /// This function can be used from the debugger to display the
+   /// content of the symbol table while debugging.
+   /// @brief Print out symbol table on stderr
+   void dump() const;
+ 
+ /// @}
+ /// @name Iteration
+ /// @{
+ public:
+ 
+   /// @brief Get an iterator that from the beginning of the symbol table.
+   inline iterator begin() { return vmap.begin(); }
+ 
+   /// @brief Get a const_iterator that from the beginning of the symbol table.
+   inline const_iterator begin() const { return vmap.begin(); }
+ 
+   /// @brief Get an iterator to the end of the symbol table.
+   inline iterator end() { return vmap.end(); }
+ 
+   /// @brief Get a const_iterator to the end of the symbol table.
+   inline const_iterator end() const { return vmap.end(); }
+ 
+ /// @}
+ /// @name Mutators
+ /// @{
+ public:
+ 
+   /// This method will strip the symbol table of its names.
+   /// @brief Strip the symbol table.
+   bool strip();
+ 
+   /// This method adds the provided value \p N to the symbol table.  The Value
+   /// must have a name which is used to place the value in the symbol table. 
+   /// @brief Add a named value to the symbol table
+   void insert(Value *Val);
+ 
+   /// This method removes a value from the symbol table. The name of the
+   /// Value is extracted from \p Val and used to lookup the Value in the
+   /// symbol table. If the Value is not in the symbol table, this method
+   /// returns false.
+   /// @returns true if \p Val was successfully erased, false otherwise
+   /// @brief Remove a value from the symbol table.
+   bool erase(Value* Val);
+ 
+   /// Given a value with a non-empty name, remove its existing
+   /// entry from the symbol table and insert a new one for Name.  This is
+   /// equivalent to doing "remove(V), V->Name = Name, insert(V)".
+   /// @brief Rename a value in the symbol table
+   bool rename(Value *V, const std::string &Name);
+ 
+ /// @}
+ /// @name Internal Data
+ /// @{
+ private:
+   ValueMap vmap;                    ///< The map that holds the symbol table.
+   mutable unsigned long LastUnique; ///< Counter for tracking unique names
+ 
+ /// @}
+ 
+ };
+ 
+ } // End llvm namespace
+ 
+ #endif





From bocchino at persephone.cs.uiuc.edu  Tue Jan 10 13:06:27 2006
From: bocchino at persephone.cs.uiuc.edu (Robert L. Bocchino Jr.)
Date: Tue, 10 Jan 2006 13:06:27 -0600 (CST)
Subject: [llvm-commits] CVS: llvm/utils/TableGen/FileParser.cpp 
Message-ID: <20060110190627.B02841CDAC8B@persephone.cs.uiuc.edu>



Changes in directory llvm/utils/TableGen:

FileParser.cpp updated: 1.9 -> 1.10
---
Log message:

Added support for the extractelement operation.



---
Diffs of the changes:  (+81 -81)

 FileParser.cpp |  162 ++++++++++++++++++++++++++++-----------------------------
 1 files changed, 81 insertions(+), 81 deletions(-)


Index: llvm/utils/TableGen/FileParser.cpp
diff -u llvm/utils/TableGen/FileParser.cpp:1.9 llvm/utils/TableGen/FileParser.cpp:1.10
--- llvm/utils/TableGen/FileParser.cpp:1.9	Fri Sep 30 01:09:50 2005
+++ llvm/utils/TableGen/FileParser.cpp	Tue Jan 10 13:05:34 2006
@@ -1,5 +1,5 @@
 
-/*  A Bison parser, made from /Users/sabre/llvm/utils/TableGen/FileParser.y
+/*  A Bison parser, made from /Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y
     by GNU Bison version 1.28  */
 
 #define YYBISON 1  /* Identify Bison output.  */
@@ -32,7 +32,7 @@
 #define	STRVAL	275
 #define	CODEFRAGMENT	276
 
-#line 14 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 14 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 
 #include "Record.h"
 #include "llvm/ADT/StringExtras.h"
@@ -207,7 +207,7 @@
 using namespace llvm;
 
 
-#line 189 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 189 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 typedef union {
   std::string*                StrVal;
   int                         IntVal;
@@ -1005,7 +1005,7 @@
   switch (yyn) {
 
 case 1:
-#line 223 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 223 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {
     yyval.Rec = Records.getClass(*yyvsp[0].StrVal);
     if (yyval.Rec == 0) {
@@ -1016,97 +1016,97 @@
   ;
     break;}
 case 2:
-#line 234 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 234 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {                       // string type
     yyval.Ty = new StringRecTy();
   ;
     break;}
 case 3:
-#line 236 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 236 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {                           // bit type
     yyval.Ty = new BitRecTy();
   ;
     break;}
 case 4:
-#line 238 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 238 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {           // bits<x> type
     yyval.Ty = new BitsRecTy(yyvsp[-1].IntVal);
   ;
     break;}
 case 5:
-#line 240 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 240 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {                           // int type
     yyval.Ty = new IntRecTy();
   ;
     break;}
 case 6:
-#line 242 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 242 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {          // list<x> type
     yyval.Ty = new ListRecTy(yyvsp[-1].Ty);
   ;
     break;}
 case 7:
-#line 244 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 244 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {                          // code type
     yyval.Ty = new CodeRecTy();
   ;
     break;}
 case 8:
-#line 246 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 246 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {                           // dag type
     yyval.Ty = new DagRecTy();
   ;
     break;}
 case 9:
-#line 248 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 248 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {                       // Record Type
     yyval.Ty = new RecordRecTy(yyvsp[0].Rec);
   ;
     break;}
 case 10:
-#line 252 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 252 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 { yyval.IntVal = 0; ;
     break;}
 case 11:
-#line 252 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 252 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 { yyval.IntVal = 1; ;
     break;}
 case 12:
-#line 254 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 254 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 { yyval.Initializer = 0; ;
     break;}
 case 13:
-#line 254 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 254 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 { yyval.Initializer = yyvsp[0].Initializer; ;
     break;}
 case 14:
-#line 256 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 256 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {
     yyval.Initializer = new IntInit(yyvsp[0].IntVal);
   ;
     break;}
 case 15:
-#line 258 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 258 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {
     yyval.Initializer = new StringInit(*yyvsp[0].StrVal);
     delete yyvsp[0].StrVal;
   ;
     break;}
 case 16:
-#line 261 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 261 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {
     yyval.Initializer = new CodeInit(*yyvsp[0].StrVal);
     delete yyvsp[0].StrVal;
   ;
     break;}
 case 17:
-#line 264 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 264 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {
     yyval.Initializer = new UnsetInit();
   ;
     break;}
 case 18:
-#line 266 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 266 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {
     BitsInit *Init = new BitsInit(yyvsp[-1].FieldList->size());
     for (unsigned i = 0, e = yyvsp[-1].FieldList->size(); i != e; ++i) {
@@ -1123,7 +1123,7 @@
   ;
     break;}
 case 19:
-#line 279 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 279 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {
     // This is a CLASS<initvalslist> expression.  This is supposed to synthesize
     // a new anonymous definition, deriving from CLASS<initvalslist> with no
@@ -1155,7 +1155,7 @@
   ;
     break;}
 case 20:
-#line 307 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 307 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {
     if (const RecordVal *RV = (CurRec ? CurRec->getValue(*yyvsp[0].StrVal) : 0)) {
       yyval.Initializer = new VarInit(*yyvsp[0].StrVal, RV->getType());
@@ -1174,7 +1174,7 @@
   ;
     break;}
 case 21:
-#line 322 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 322 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {
     yyval.Initializer = yyvsp[-3].Initializer->convertInitializerBitRange(*yyvsp[-1].BitList);
     if (yyval.Initializer == 0) {
@@ -1185,14 +1185,14 @@
   ;
     break;}
 case 22:
-#line 329 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 329 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {
     yyval.Initializer = new ListInit(*yyvsp[-1].FieldList);
     delete yyvsp[-1].FieldList;
   ;
     break;}
 case 23:
-#line 332 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 332 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {
     if (!yyvsp[-2].Initializer->getFieldType(*yyvsp[0].StrVal)) {
       err() << "Cannot access field '" << *yyvsp[0].StrVal << "' of value '" << *yyvsp[-2].Initializer << "!\n";
@@ -1203,7 +1203,7 @@
   ;
     break;}
 case 24:
-#line 339 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 339 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {
     Record *D = Records.getDef(*yyvsp[-2].StrVal);
     if (D == 0) {
@@ -1215,7 +1215,7 @@
   ;
     break;}
 case 25:
-#line 347 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 347 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {
     std::reverse(yyvsp[-1].BitList->begin(), yyvsp[-1].BitList->end());
     yyval.Initializer = yyvsp[-3].Initializer->convertInitListSlice(*yyvsp[-1].BitList);
@@ -1227,7 +1227,7 @@
   ;
     break;}
 case 26:
-#line 355 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 355 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {
     yyval.Initializer = yyvsp[-3].Initializer->getBinaryOp(Init::SHL, yyvsp[-1].Initializer);
     if (yyval.Initializer == 0) {
@@ -1237,7 +1237,7 @@
   ;
     break;}
 case 27:
-#line 361 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 361 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {
     yyval.Initializer = yyvsp[-3].Initializer->getBinaryOp(Init::SRA, yyvsp[-1].Initializer);
     if (yyval.Initializer == 0) {
@@ -1247,7 +1247,7 @@
   ;
     break;}
 case 28:
-#line 367 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 367 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {
     yyval.Initializer = yyvsp[-3].Initializer->getBinaryOp(Init::SRL, yyvsp[-1].Initializer);
     if (yyval.Initializer == 0) {
@@ -1257,19 +1257,19 @@
   ;
     break;}
 case 29:
-#line 375 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 375 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {
     yyval.StrVal = new std::string();
   ;
     break;}
 case 30:
-#line 378 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 378 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {
     yyval.StrVal = yyvsp[0].StrVal;
   ;
     break;}
 case 31:
-#line 382 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 382 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {
     yyval.DagValueList = new std::vector<std::pair<Init*, std::string> >();
     yyval.DagValueList->push_back(std::make_pair(yyvsp[-1].Initializer, *yyvsp[0].StrVal));
@@ -1277,7 +1277,7 @@
   ;
     break;}
 case 32:
-#line 387 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 387 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {
     yyvsp[-3].DagValueList->push_back(std::make_pair(yyvsp[-1].Initializer, *yyvsp[0].StrVal));
     delete yyvsp[0].StrVal;
@@ -1285,24 +1285,24 @@
   ;
     break;}
 case 33:
-#line 393 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 393 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {
     yyval.DagValueList = new std::vector<std::pair<Init*, std::string> >();
   ;
     break;}
 case 34:
-#line 396 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 396 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 { yyval.DagValueList = yyvsp[0].DagValueList; ;
     break;}
 case 35:
-#line 399 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 399 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {
     yyval.BitList = new std::vector<unsigned>();
     yyval.BitList->push_back(yyvsp[0].IntVal);
   ;
     break;}
 case 36:
-#line 402 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 402 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {
     if (yyvsp[-2].IntVal < 0 || yyvsp[0].IntVal < 0) {
       err() << "Invalid range: " << yyvsp[-2].IntVal << "-" << yyvsp[0].IntVal << "!\n";
@@ -1319,7 +1319,7 @@
   ;
     break;}
 case 37:
-#line 415 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 415 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {
     yyvsp[0].IntVal = -yyvsp[0].IntVal;
     if (yyvsp[-1].IntVal < 0 || yyvsp[0].IntVal < 0) {
@@ -1337,13 +1337,13 @@
   ;
     break;}
 case 38:
-#line 429 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 429 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {
     (yyval.BitList=yyvsp[-2].BitList)->push_back(yyvsp[0].IntVal);
   ;
     break;}
 case 39:
-#line 431 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 431 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {
     if (yyvsp[-2].IntVal < 0 || yyvsp[0].IntVal < 0) {
       err() << "Invalid range: " << yyvsp[-2].IntVal << "-" << yyvsp[0].IntVal << "!\n";
@@ -1360,7 +1360,7 @@
   ;
     break;}
 case 40:
-#line 444 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 444 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {
     yyvsp[0].IntVal = -yyvsp[0].IntVal;
     if (yyvsp[-1].IntVal < 0 || yyvsp[0].IntVal < 0) {
@@ -1378,44 +1378,44 @@
   ;
     break;}
 case 41:
-#line 460 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 460 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 { yyval.BitList = yyvsp[0].BitList; std::reverse(yyvsp[0].BitList->begin(), yyvsp[0].BitList->end()); ;
     break;}
 case 42:
-#line 462 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 462 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 { yyval.BitList = 0; ;
     break;}
 case 43:
-#line 462 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 462 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 { yyval.BitList = yyvsp[-1].BitList; ;
     break;}
 case 44:
-#line 466 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 466 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {
     yyval.FieldList = new std::vector<Init*>();
   ;
     break;}
 case 45:
-#line 468 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 468 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {
     yyval.FieldList = yyvsp[0].FieldList;
   ;
     break;}
 case 46:
-#line 472 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 472 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {
     yyval.FieldList = new std::vector<Init*>();
     yyval.FieldList->push_back(yyvsp[0].Initializer);
   ;
     break;}
 case 47:
-#line 475 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 475 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {
     (yyval.FieldList = yyvsp[-2].FieldList)->push_back(yyvsp[0].Initializer);
   ;
     break;}
 case 48:
-#line 479 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 479 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {
   std::string DecName = *yyvsp[-1].StrVal;
   if (ParsingTemplateArgs)
@@ -1427,13 +1427,13 @@
 ;
     break;}
 case 49:
-#line 489 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 489 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {
   delete yyvsp[-1].StrVal;
 ;
     break;}
 case 50:
-#line 491 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 491 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {
   setValue(*yyvsp[-4].StrVal, yyvsp[-3].BitList, yyvsp[-1].Initializer);
   delete yyvsp[-4].StrVal;
@@ -1441,19 +1441,19 @@
 ;
     break;}
 case 55:
-#line 500 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 500 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {
     yyval.SubClassRef = new SubClassRefTy(yyvsp[0].Rec, new std::vector<Init*>());
   ;
     break;}
 case 56:
-#line 502 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 502 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {
     yyval.SubClassRef = new SubClassRefTy(yyvsp[-3].Rec, yyvsp[-1].FieldList);
   ;
     break;}
 case 57:
-#line 506 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 506 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {
     yyval.SubClassList = new std::vector<SubClassRefTy>();
     yyval.SubClassList->push_back(*yyvsp[0].SubClassRef);
@@ -1461,52 +1461,52 @@
   ;
     break;}
 case 58:
-#line 511 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 511 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {
     (yyval.SubClassList=yyvsp[-2].SubClassList)->push_back(*yyvsp[0].SubClassRef);
     delete yyvsp[0].SubClassRef;
   ;
     break;}
 case 59:
-#line 516 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 516 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {
     yyval.SubClassList = new std::vector<SubClassRefTy>();
   ;
     break;}
 case 60:
-#line 519 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 519 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {
     yyval.SubClassList = yyvsp[0].SubClassList;
   ;
     break;}
 case 61:
-#line 523 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 523 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {
   CurRec->addTemplateArg(*yyvsp[0].StrVal);
   delete yyvsp[0].StrVal;
 ;
     break;}
 case 62:
-#line 526 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 526 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {
   CurRec->addTemplateArg(*yyvsp[0].StrVal);
   delete yyvsp[0].StrVal;
 ;
     break;}
 case 63:
-#line 531 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 531 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {;
     break;}
 case 66:
-#line 534 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 534 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 { yyval.StrVal = yyvsp[0].StrVal; ;
     break;}
 case 67:
-#line 534 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 534 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 { yyval.StrVal = new std::string(); ;
     break;}
 case 68:
-#line 536 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 536 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {
   static unsigned AnonCounter = 0;
   if (yyvsp[0].StrVal->empty())
@@ -1515,7 +1515,7 @@
 ;
     break;}
 case 69:
-#line 543 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 543 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {
   // If a class of this name already exists, it must be a forward ref.
   if ((CurRec = Records.getClass(*yyvsp[0].StrVal))) {
@@ -1535,7 +1535,7 @@
 ;
     break;}
 case 70:
-#line 561 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 561 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {
   CurRec = new Record(*yyvsp[0].StrVal);
   delete yyvsp[0].StrVal;
@@ -1549,7 +1549,7 @@
 ;
     break;}
 case 71:
-#line 573 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 573 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {
            for (unsigned i = 0, e = yyvsp[0].SubClassList->size(); i != e; ++i) {
              addSubClass((*yyvsp[0].SubClassList)[i].first, *(*yyvsp[0].SubClassList)[i].second);
@@ -1567,32 +1567,32 @@
          ;
     break;}
 case 72:
-#line 587 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 587 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {
            yyval.Rec = CurRec;
            CurRec = 0;
          ;
     break;}
 case 73:
-#line 592 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 592 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {
                 ParsingTemplateArgs = true;
             ;
     break;}
 case 74:
-#line 594 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 594 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {
                 ParsingTemplateArgs = false;
             ;
     break;}
 case 75:
-#line 596 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 596 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {
         yyval.Rec = yyvsp[0].Rec;
      ;
     break;}
 case 76:
-#line 600 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 600 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {
   yyvsp[0].Rec->resolveReferences();
 
@@ -1602,38 +1602,38 @@
 ;
     break;}
 case 79:
-#line 611 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 611 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {
   LetStack.back().push_back(LetRecord(*yyvsp[-3].StrVal, yyvsp[-2].BitList, yyvsp[0].Initializer));
   delete yyvsp[-3].StrVal; delete yyvsp[-2].BitList;
 ;
     break;}
 case 82:
-#line 619 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 619 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 { LetStack.push_back(std::vector<LetRecord>()); ;
     break;}
 case 84:
-#line 622 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 622 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {
     LetStack.pop_back();
   ;
     break;}
 case 85:
-#line 625 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 625 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {
     LetStack.pop_back();
   ;
     break;}
 case 86:
-#line 629 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 629 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {;
     break;}
 case 87:
-#line 629 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 629 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {;
     break;}
 case 88:
-#line 631 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 631 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 {;
     break;}
 }
@@ -1858,7 +1858,7 @@
     }
   return 1;
 }
-#line 633 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 633 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
 
 
 int yyerror(const char *ErrorMsg) {





From bocchino at persephone.cs.uiuc.edu  Tue Jan 10 13:06:28 2006
From: bocchino at persephone.cs.uiuc.edu (Robert L. Bocchino Jr.)
Date: Tue, 10 Jan 2006 13:06:28 -0600 (CST)
Subject: [llvm-commits] CVS: llvm/lib/Transforms/Utils/Local.cpp 
Message-ID: <20060110190628.151771CDAC8C@persephone.cs.uiuc.edu>



Changes in directory llvm/lib/Transforms/Utils:

Local.cpp updated: 1.46 -> 1.47
---
Log message:

Added support for the extractelement operation.



---
Diffs of the changes:  (+2 -0)

 Local.cpp |    2 ++
 1 files changed, 2 insertions(+)


Index: llvm/lib/Transforms/Utils/Local.cpp
diff -u llvm/lib/Transforms/Utils/Local.cpp:1.46 llvm/lib/Transforms/Utils/Local.cpp:1.47
--- llvm/lib/Transforms/Utils/Local.cpp:1.46	Thu Oct 27 11:34:00 2005
+++ llvm/lib/Transforms/Utils/Local.cpp	Tue Jan 10 13:05:15 2006
@@ -102,6 +102,8 @@
     if (Constant *Op2 = dyn_cast<Constant>(I->getOperand(2)))
       return ConstantExpr::getSelect(Op0, Op1, Op2);
     return 0;
+  case Instruction::ExtractElement:
+    return ConstantExpr::getExtractElement(Op0, Op1);
   case Instruction::GetElementPtr:
     std::vector<Constant*> IdxList;
     IdxList.reserve(I->getNumOperands()-1);





From bocchino at persephone.cs.uiuc.edu  Tue Jan 10 13:06:26 2006
From: bocchino at persephone.cs.uiuc.edu (Robert L. Bocchino Jr.)
Date: Tue, 10 Jan 2006 13:06:26 -0600 (CST)
Subject: [llvm-commits] CVS: llvm/lib/Transforms/Scalar/LowerPacked.cpp
	SCCP.cpp 
Message-ID: <20060110190626.82DB01CDAC8F@persephone.cs.uiuc.edu>



Changes in directory llvm/lib/Transforms/Scalar:

LowerPacked.cpp updated: 1.6 -> 1.7
SCCP.cpp updated: 1.125 -> 1.126
---
Log message:

Added lower packed support for the extractelement operation.



---
Diffs of the changes:  (+43 -0)

 LowerPacked.cpp |   31 +++++++++++++++++++++++++++++++
 SCCP.cpp        |   12 ++++++++++++
 2 files changed, 43 insertions(+)


Index: llvm/lib/Transforms/Scalar/LowerPacked.cpp
diff -u llvm/lib/Transforms/Scalar/LowerPacked.cpp:1.6 llvm/lib/Transforms/Scalar/LowerPacked.cpp:1.7
--- llvm/lib/Transforms/Scalar/LowerPacked.cpp:1.6	Mon Dec 26 07:48:44 2005
+++ llvm/lib/Transforms/Scalar/LowerPacked.cpp	Tue Jan 10 13:05:05 2006
@@ -59,6 +59,10 @@
    /// @param SELI the select operator to convert
    void visitSelectInst(SelectInst& SELI);
 
+   /// @brief Lowers packed extractelement instructions.
+   /// @param EI the extractelement operator to convert
+   void visitExtractElementInst(ExtractElementInst& EI);
+
    /// This function asserts if the instruction is a PackedType but
    /// is handled by another function.
    ///
@@ -330,6 +334,33 @@
       Changed = true;
       instrsToRemove.push_back(&SELI);
    }
+}
+
+void LowerPacked::visitExtractElementInst(ExtractElementInst& EI)
+{
+  std::vector<Value*>& op0Vals = getValues(EI.getOperand(0));
+  const PackedType *PTy = cast<PackedType>(EI.getOperand(0)->getType());
+  Value *op1 = EI.getOperand(1);
+
+  if (ConstantUInt *C = dyn_cast<ConstantUInt>(op1)) {
+    EI.replaceAllUsesWith(op0Vals[C->getValue()]);
+  } else {
+    AllocaInst *alloca = new AllocaInst(PTy->getElementType(),
+					ConstantUInt::get(Type::UIntTy, PTy->getNumElements()),
+					EI.getName() + ".alloca", &(EI.getParent()->getParent()->getEntryBlock().front()));
+    for (unsigned i = 0; i < PTy->getNumElements(); ++i) {
+      GetElementPtrInst *GEP = new GetElementPtrInst(alloca, ConstantUInt::get(Type::UIntTy, i),
+						     "store.ge", &EI);
+      new StoreInst(op0Vals[i], GEP, &EI);
+    }
+    GetElementPtrInst *GEP = new GetElementPtrInst(alloca, op1,
+						   EI.getName() + ".ge", &EI);
+    LoadInst *load = new LoadInst(GEP, EI.getName() + ".load", &EI);
+    EI.replaceAllUsesWith(load);
+  }
+
+  Changed = true;
+  instrsToRemove.push_back(&EI);
 }
 
 bool LowerPacked::runOnFunction(Function& F)


Index: llvm/lib/Transforms/Scalar/SCCP.cpp
diff -u llvm/lib/Transforms/Scalar/SCCP.cpp:1.125 llvm/lib/Transforms/Scalar/SCCP.cpp:1.126
--- llvm/lib/Transforms/Scalar/SCCP.cpp:1.125	Mon Sep 26 00:28:52 2005
+++ llvm/lib/Transforms/Scalar/SCCP.cpp	Tue Jan 10 13:05:05 2006
@@ -322,6 +322,7 @@
   void visitSelectInst(SelectInst &I);
   void visitBinaryOperator(Instruction &I);
   void visitShiftInst(ShiftInst &I) { visitBinaryOperator(I); }
+  void visitExtractElementInst(ExtractElementInst &I);
 
   // Instructions that cannot be folded away...
   void visitStoreInst     (Instruction &I);
@@ -726,6 +727,17 @@
     markConstant(IV, &I, ConstantExpr::get(I.getOpcode(), V1State.getConstant(),
                                            V2State.getConstant()));
   }
+}
+
+void SCCPSolver::visitExtractElementInst(ExtractElementInst &I) {
+  LatticeVal &ValState = getValueState(I.getOperand(0));
+  LatticeVal &IdxState = getValueState(I.getOperand(1));
+
+  if (ValState.isOverdefined() || IdxState.isOverdefined())
+    markOverdefined(&I);
+  else if(ValState.isConstant() && IdxState.isConstant())
+    markConstant(&I, ConstantExpr::getExtractElement(ValState.getConstant(),
+                                                     IdxState.getConstant()));
 }
 
 // Handle getelementptr instructions... if all operands are constants then we





From bocchino at persephone.cs.uiuc.edu  Tue Jan 10 13:06:26 2006
From: bocchino at persephone.cs.uiuc.edu (Robert L. Bocchino Jr.)
Date: Tue, 10 Jan 2006 13:06:26 -0600 (CST)
Subject: [llvm-commits] CVS: llvm/include/llvm/Support/InstVisitor.h 
Message-ID: <20060110190626.9F96F1CDAC90@persephone.cs.uiuc.edu>



Changes in directory llvm/include/llvm/Support:

InstVisitor.h updated: 1.36 -> 1.37
---
Log message:

Added an instruction and constant expression for the extractelement
operation.


---
Diffs of the changes:  (+1 -0)

 InstVisitor.h |    1 +
 1 files changed, 1 insertion(+)


Index: llvm/include/llvm/Support/InstVisitor.h
diff -u llvm/include/llvm/Support/InstVisitor.h:1.36 llvm/include/llvm/Support/InstVisitor.h:1.37
--- llvm/include/llvm/Support/InstVisitor.h:1.36	Sat Jun 18 13:31:30 2005
+++ llvm/include/llvm/Support/InstVisitor.h	Tue Jan 10 13:04:13 2006
@@ -175,6 +175,7 @@
   RetTy visitCallInst(CallInst     &I)              { DELEGATE(Instruction); }
   RetTy visitShiftInst(ShiftInst   &I)              { DELEGATE(Instruction); }
   RetTy visitVAArgInst(VAArgInst   &I)              { DELEGATE(Instruction); }
+  RetTy visitExtractElementInst(ExtractElementInst &I) { DELEGATE(Instruction); }
 
   // Next level propagators... if the user does not overload a specific
   // instruction type, they can overload one of these to get the whole class





From bocchino at persephone.cs.uiuc.edu  Tue Jan 10 13:06:29 2006
From: bocchino at persephone.cs.uiuc.edu (Robert L. Bocchino Jr.)
Date: Tue, 10 Jan 2006 13:06:29 -0600 (CST)
Subject: [llvm-commits] CVS: llvm/lib/Bytecode/Reader/Reader.cpp 
Message-ID: <20060110190629.759C31CDAC8E@persephone.cs.uiuc.edu>



Changes in directory llvm/lib/Bytecode/Reader:

Reader.cpp updated: 1.175 -> 1.176
---
Log message:

Added bytecode support for the extractelement operation.



---
Diffs of the changes:  (+13 -0)

 Reader.cpp |   13 +++++++++++++
 1 files changed, 13 insertions(+)


Index: llvm/lib/Bytecode/Reader/Reader.cpp
diff -u llvm/lib/Bytecode/Reader/Reader.cpp:1.175 llvm/lib/Bytecode/Reader/Reader.cpp:1.176
--- llvm/lib/Bytecode/Reader/Reader.cpp:1.175	Sat Nov 12 12:31:54 2005
+++ llvm/lib/Bytecode/Reader/Reader.cpp	Tue Jan 10 13:04:39 2006
@@ -717,6 +717,13 @@
     Result = new VAArgInst(foo, getSanitizedType(Oprnds[1]));
     break;
   }
+  case Instruction::ExtractElement: {
+    if (Oprnds.size() != 2)
+      throw std::string("Invalid extractelement instruction!");
+    Result = new ExtractElementInst(getValue(iType, Oprnds[0]), 
+                                    getValue(Type::UIntTyID, Oprnds[1]));
+    break;
+  }
   case Instruction::Cast:
     Result = new CastInst(getValue(iType, Oprnds[0]),
                           getSanitizedType(Oprnds[1]));
@@ -1439,6 +1446,12 @@
         error("Select instruction must have three arguments.");
       Constant* Result = ConstantExpr::getSelect(ArgVec[0], ArgVec[1],
                                                  ArgVec[2]);
+      if (Handler) Handler->handleConstantExpression(Opcode, ArgVec, Result);
+      return Result;
+    } else if (Opcode == Instruction::ExtractElement) {
+      if (ArgVec.size() != 2)
+        error("ExtractElement instruction must have two arguments.");
+      Constant* Result = ConstantExpr::getExtractElement(ArgVec[0], ArgVec[1]);
       if (Handler) Handler->handleConstantExpression(Opcode, ArgVec, Result);
       return Result;
     } else {                            // All other 2-operand expressions





From bocchino at persephone.cs.uiuc.edu  Tue Jan 10 13:06:31 2006
From: bocchino at persephone.cs.uiuc.edu (Robert L. Bocchino Jr.)
Date: Tue, 10 Jan 2006 13:06:31 -0600 (CST)
Subject: [llvm-commits] CVS: llvm/lib/VMCore/Constants.cpp Instruction.cpp
	Instructions.cpp Verifier.cpp 
Message-ID: <20060110190631.CD5701CDAC91@persephone.cs.uiuc.edu>



Changes in directory llvm/lib/VMCore:

Constants.cpp updated: 1.142 -> 1.143
Instruction.cpp updated: 1.48 -> 1.49
Instructions.cpp updated: 1.29 -> 1.30
Verifier.cpp updated: 1.136 -> 1.137
---
Log message:

Added support for the extractelement operation.



---
Diffs of the changes:  (+73 -0)

 Constants.cpp    |   38 ++++++++++++++++++++++++++++++++++++++
 Instruction.cpp  |    1 +
 Instructions.cpp |   21 +++++++++++++++++++++
 Verifier.cpp     |   13 +++++++++++++
 4 files changed, 73 insertions(+)


Index: llvm/lib/VMCore/Constants.cpp
diff -u llvm/lib/VMCore/Constants.cpp:1.142 llvm/lib/VMCore/Constants.cpp:1.143
--- llvm/lib/VMCore/Constants.cpp:1.142	Tue Jan  3 19:01:04 2006
+++ llvm/lib/VMCore/Constants.cpp	Tue Jan 10 13:05:24 2006
@@ -347,6 +347,19 @@
   }
 };
 
+/// ExtractElementConstantExpr - This class is private to Constants.cpp, and is used
+/// behind the scenes to implement extractelement constant exprs.
+class ExtractElementConstantExpr : public ConstantExpr {
+  Use Ops[2];
+public:
+  ExtractElementConstantExpr(Constant *C1, Constant *C2)
+    : ConstantExpr(cast<PackedType>(C1->getType())->getElementType(), 
+                   Instruction::ExtractElement, Ops, 2) {
+    Ops[0].init(C1, this);
+    Ops[1].init(C2, this);
+  }
+};
+
 /// GetElementPtrConstantExpr - This class is private to Constants.cpp, and is
 /// used behind the scenes to implement getelementpr constant exprs.
 struct GetElementPtrConstantExpr : public ConstantExpr {
@@ -1141,6 +1154,8 @@
         return new BinaryConstantExpr(V.first, V.second[0], V.second[1]);
       if (V.first == Instruction::Select)
         return new SelectConstantExpr(V.second[0], V.second[1], V.second[2]);
+      if (V.first == Instruction::ExtractElement)
+        return new ExtractElementConstantExpr(V.second[0], V.second[1]);
 
       assert(V.first == Instruction::GetElementPtr && "Invalid ConstantExpr!");
 
@@ -1386,7 +1401,24 @@
   return getGetElementPtrTy(PointerType::get(Ty), C, IdxList);
 }
 
+Constant *ConstantExpr::getExtractElementTy(const Type *ReqTy, Constant *Val,
+                                            Constant *Idx) {
+  // Look up the constant in the table first to ensure uniqueness
+  std::vector<Constant*> ArgVec(1, Val);
+  ArgVec.push_back(Idx);
+  const ExprMapKeyType &Key = std::make_pair(Instruction::ExtractElement,ArgVec);
+  return ExprConstants.getOrCreate(ReqTy, Key);
+}
 
+Constant *ConstantExpr::getExtractElement(Constant *Val, Constant *Idx) {
+  assert(isa<PackedType>(Val->getType()) &&
+         "Tried to create extractelement operation on non-packed type!");
+  assert(Idx->getType() == Type::UIntTy &&
+         "Index must be uint type!");
+  return getExtractElementTy(cast<PackedType>(Val->getType())->getElementType(),
+                             Val, Idx);
+}
+
 // destroyConstant - Remove the constant from the constant table...
 //
 void ConstantExpr::destroyConstant() {
@@ -1581,6 +1613,12 @@
     if (C2 == From) C2 = To;
     if (C3 == From) C3 = To;
     Replacement = ConstantExpr::getSelect(C1, C2, C3);
+  } else if (getOpcode() == Instruction::ExtractElement) {
+    Constant *C1 = getOperand(0);
+    Constant *C2 = getOperand(1);
+    if (C1 == From) C1 = To;
+    if (C2 == From) C2 = To;
+    Replacement = ConstantExpr::getExtractElement(C1, C2);
   } else if (getNumOperands() == 2) {
     Constant *C1 = getOperand(0);
     Constant *C2 = getOperand(1);


Index: llvm/lib/VMCore/Instruction.cpp
diff -u llvm/lib/VMCore/Instruction.cpp:1.48 llvm/lib/VMCore/Instruction.cpp:1.49
--- llvm/lib/VMCore/Instruction.cpp:1.48	Mon Aug  8 00:21:50 2005
+++ llvm/lib/VMCore/Instruction.cpp	Tue Jan 10 13:05:24 2006
@@ -120,6 +120,7 @@
   case Shl:     return "shl";
   case Shr:     return "shr";
   case VAArg:   return "va_arg";
+  case ExtractElement: return "extractelement";
 
   default: return "<Invalid operator> ";
   }


Index: llvm/lib/VMCore/Instructions.cpp
diff -u llvm/lib/VMCore/Instructions.cpp:1.29 llvm/lib/VMCore/Instructions.cpp:1.30
--- llvm/lib/VMCore/Instructions.cpp:1.29	Wed Dec 21 12:22:19 2005
+++ llvm/lib/VMCore/Instructions.cpp	Tue Jan 10 13:05:24 2006
@@ -796,6 +796,26 @@
 }
 
 //===----------------------------------------------------------------------===//
+//                           ExtractElementInst Implementation
+//===----------------------------------------------------------------------===//
+
+ExtractElementInst::ExtractElementInst(Value *Val, Value *Index,
+                         const std::string &Name, Instruction *InsertBef)
+  : Instruction(cast<PackedType>(Val->getType())->getElementType(),
+                ExtractElement, Ops, 2, Name, InsertBef) {
+  Ops[0].init(Val, this);
+  Ops[1].init(Index, this);
+}
+
+ExtractElementInst::ExtractElementInst(Value *Val, Value *Index,
+                         const std::string &Name, BasicBlock *InsertAE)
+  : Instruction(cast<PackedType>(Val->getType())->getElementType(),
+                ExtractElement, Ops, 2, Name, InsertAE) {
+  Ops[0].init(Val, this);
+  Ops[1].init(Index, this);
+}
+
+//===----------------------------------------------------------------------===//
 //                             BinaryOperator Class
 //===----------------------------------------------------------------------===//
 
@@ -1155,6 +1175,7 @@
 ShiftInst  *ShiftInst::clone()  const { return new ShiftInst(*this); }
 SelectInst *SelectInst::clone() const { return new SelectInst(*this); }
 VAArgInst  *VAArgInst::clone()  const { return new VAArgInst(*this); }
+ExtractElementInst *ExtractElementInst::clone() const {return new ExtractElementInst(*this); }
 PHINode    *PHINode::clone()    const { return new PHINode(*this); }
 ReturnInst *ReturnInst::clone() const { return new ReturnInst(*this); }
 BranchInst *BranchInst::clone() const { return new BranchInst(*this); }


Index: llvm/lib/VMCore/Verifier.cpp
diff -u llvm/lib/VMCore/Verifier.cpp:1.136 llvm/lib/VMCore/Verifier.cpp:1.137
--- llvm/lib/VMCore/Verifier.cpp:1.136	Wed Dec 21 12:22:19 2005
+++ llvm/lib/VMCore/Verifier.cpp	Tue Jan 10 13:05:24 2006
@@ -178,6 +178,7 @@
     void visitPHINode(PHINode &PN);
     void visitBinaryOperator(BinaryOperator &B);
     void visitShiftInst(ShiftInst &SI);
+    void visitExtractElementInst(ExtractElementInst &EI);
     void visitVAArgInst(VAArgInst &VAA) { visitInstruction(VAA); }
     void visitCallInst(CallInst &CI);
     void visitGetElementPtrInst(GetElementPtrInst &GEP);
@@ -530,6 +531,18 @@
   Assert1(SI.getOperand(1)->getType() == Type::UByteTy,
           "Second operand to shift must be ubyte type!", &SI);
   visitInstruction(SI);
+}
+
+void Verifier::visitExtractElementInst(ExtractElementInst &EI) {
+  Assert1(isa<PackedType>(EI.getOperand(0)->getType()),
+          "First operand to extractelement must be packed type!", &EI);
+  Assert1(EI.getOperand(1)->getType() == Type::UIntTy,
+          "Second operand to extractelement must be uint type!", &EI);
+  Assert1(EI.getType() == 
+	  cast<PackedType>(EI.getOperand(0)->getType())->getElementType(),
+          "Extractelement return type must be same as "
+	  "first operand element type!", &EI);
+  visitInstruction(EI);
 }
 
 void Verifier::visitGetElementPtrInst(GetElementPtrInst &GEP) {





From bocchino at persephone.cs.uiuc.edu  Tue Jan 10 13:06:30 2006
From: bocchino at persephone.cs.uiuc.edu (Robert L. Bocchino Jr.)
Date: Tue, 10 Jan 2006 13:06:30 -0600 (CST)
Subject: [llvm-commits] CVS: llvm/include/llvm/Constants.h Instruction.def
	Instructions.h 
Message-ID: <20060110190630.06B0F1CDAC92@persephone.cs.uiuc.edu>



Changes in directory llvm/include/llvm:

Constants.h updated: 1.75 -> 1.76
Instruction.def updated: 1.16 -> 1.17
Instructions.h updated: 1.29 -> 1.30
---
Log message:

Added an instruction and constant expression for the extractelement
operation.


---
Diffs of the changes:  (+54 -1)

 Constants.h     |    6 ++++++
 Instruction.def |    3 ++-
 Instructions.h  |   46 ++++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 54 insertions(+), 1 deletion(-)


Index: llvm/include/llvm/Constants.h
diff -u llvm/include/llvm/Constants.h:1.75 llvm/include/llvm/Constants.h:1.76
--- llvm/include/llvm/Constants.h:1.75	Tue Oct  4 13:12:13 2005
+++ llvm/include/llvm/Constants.h	Tue Jan 10 13:03:58 2006
@@ -521,6 +521,8 @@
                                Constant *C1, Constant *C2, Constant *C3);
   static Constant *getGetElementPtrTy(const Type *Ty, Constant *C,
                                       const std::vector<Value*> &IdxList);
+  static Constant *getExtractElementTy(const Type *Ty, Constant *Val,
+                                       Constant *Idx);
 
 public:
   // Static methods to construct a ConstantExpr of different kinds.  Note that
@@ -587,6 +589,10 @@
                                     const std::vector<Constant*> &IdxList);
   static Constant *getGetElementPtr(Constant *C,
                                     const std::vector<Value*> &IdxList);
+
+  /// Extractelement form.
+  ///
+  static Constant *getExtractElement(Constant *Val, Constant *Idx);
 
   /// isNullValue - Return true if this is the value that would be returned by
   /// getNullValue.


Index: llvm/include/llvm/Instruction.def
diff -u llvm/include/llvm/Instruction.def:1.16 llvm/include/llvm/Instruction.def:1.17
--- llvm/include/llvm/Instruction.def:1.16	Fri Jun 24 13:17:33 2005
+++ llvm/include/llvm/Instruction.def	Tue Jan 10 13:03:58 2006
@@ -135,7 +135,8 @@
 HANDLE_OTHER_INST(35, UserOp1, Instruction)  // May be used internally in a pass
 HANDLE_OTHER_INST(36, UserOp2, Instruction)
 HANDLE_OTHER_INST(37, VAArg  , VAArgInst  )  // vaarg instruction
-  LAST_OTHER_INST(37)
+HANDLE_OTHER_INST(38, ExtractElement, ExtractElementInst)  // extract packed element
+  LAST_OTHER_INST(38)
 
 #undef  FIRST_TERM_INST
 #undef HANDLE_TERM_INST


Index: llvm/include/llvm/Instructions.h
diff -u llvm/include/llvm/Instructions.h:1.29 llvm/include/llvm/Instructions.h:1.30
--- llvm/include/llvm/Instructions.h:1.29	Sat Nov  5 15:58:30 2005
+++ llvm/include/llvm/Instructions.h	Tue Jan 10 13:03:58 2006
@@ -718,6 +718,52 @@
 };
 
 //===----------------------------------------------------------------------===//
+//                                ExtractElementInst Class
+//===----------------------------------------------------------------------===//
+
+/// ExtractElementInst - This instruction extracts a single (scalar)
+/// element from a PackedType value
+///
+class ExtractElementInst : public Instruction {
+  Use Ops[2];
+  ExtractElementInst(const ExtractElementInst &EI) : 
+    Instruction(EI.getType(), ExtractElement, Ops, 2) {
+    Ops[0].init(EI.Ops[0], this);
+    Ops[1].init(EI.Ops[1], this);
+  }
+
+public:
+  ExtractElementInst(Value *Val, Value *Index,
+               const std::string &Name = "", Instruction *InsertBefore = 0);
+  ExtractElementInst(Value *Val, Value *Index,
+               const std::string &Name, BasicBlock *InsertAtEnd);
+
+  virtual ExtractElementInst *clone() const;
+
+  virtual bool mayWriteToMemory() const { return false; }
+
+  /// Transparently provide more efficient getOperand methods.
+  Value *getOperand(unsigned i) const {
+    assert(i < 2 && "getOperand() out of range!");
+    return Ops[i];
+  }
+  void setOperand(unsigned i, Value *Val) {
+    assert(i < 2 && "setOperand() out of range!");
+    Ops[i] = Val;
+  }
+  unsigned getNumOperands() const { return 2; }
+
+  // Methods for support type inquiry through isa, cast, and dyn_cast:
+  static inline bool classof(const ExtractElementInst *) { return true; }
+  static inline bool classof(const Instruction *I) {
+    return I->getOpcode() == Instruction::ExtractElement;
+  }
+  static inline bool classof(const Value *V) {
+    return isa<Instruction>(V) && classof(cast<Instruction>(V));
+  }
+};
+
+//===----------------------------------------------------------------------===//
 //                               PHINode Class
 //===----------------------------------------------------------------------===//
 





From bocchino at persephone.cs.uiuc.edu  Tue Jan 10 13:06:38 2006
From: bocchino at persephone.cs.uiuc.edu (Robert L. Bocchino Jr.)
Date: Tue, 10 Jan 2006 13:06:38 -0600 (CST)
Subject: [llvm-commits] 
	CVS: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
Message-ID: <20060110190638.D64E01CDAC94@persephone.cs.uiuc.edu>



Changes in directory llvm/lib/CodeGen/SelectionDAG:

SelectionDAGISel.cpp updated: 1.120 -> 1.121
---
Log message:

Added selection DAG support for the extractelement operation.



---
Diffs of the changes:  (+1 -0)

 SelectionDAGISel.cpp |    1 +
 1 files changed, 1 insertion(+)


Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.120 llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.121
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.120	Wed Jan  4 16:28:25 2006
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp	Tue Jan 10 13:04:57 2006
@@ -388,6 +388,7 @@
   void visitUnreachable(UnreachableInst &I) { /* noop */ }
 
   // These all get lowered before this pass.
+  void visitExtractElement(ExtractElementInst &I) { assert(0 && "TODO"); }
   void visitSwitch(SwitchInst &I) { assert(0 && "TODO"); }
   void visitInvoke(InvokeInst &I) { assert(0 && "TODO"); }
   void visitUnwind(UnwindInst &I) { assert(0 && "TODO"); }





From bocchino at persephone.cs.uiuc.edu  Tue Jan 10 13:06:27 2006
From: bocchino at persephone.cs.uiuc.edu (Robert L. Bocchino Jr.)
Date: Tue, 10 Jan 2006 13:06:27 -0600 (CST)
Subject: [llvm-commits] CVS: llvm/lib/AsmParser/Lexer.cpp Lexer.l
	llvmAsmParser.cpp llvmAsmParser.h llvmAsmParser.y 
Message-ID: <20060110190627.382931CDAC8D@persephone.cs.uiuc.edu>



Changes in directory llvm/lib/AsmParser:

Lexer.cpp updated: 1.12 -> 1.13
Lexer.l updated: 1.66 -> 1.67
llvmAsmParser.cpp updated: 1.27 -> 1.28
llvmAsmParser.h updated: 1.12 -> 1.13
llvmAsmParser.y updated: 1.241 -> 1.242
---
Log message:

Added lexer and parser support for the extractelement operation.



---
Diffs of the changes:  (+1161 -1103)

 Lexer.cpp         |  742 +++++++++++++-------------
 Lexer.l           |    2 
 llvmAsmParser.cpp | 1496 +++++++++++++++++++++++++++---------------------------
 llvmAsmParser.h   |    5 
 llvmAsmParser.y   |   19 
 5 files changed, 1161 insertions(+), 1103 deletions(-)


Index: llvm/lib/AsmParser/Lexer.cpp
diff -u llvm/lib/AsmParser/Lexer.cpp:1.12 llvm/lib/AsmParser/Lexer.cpp:1.13
--- llvm/lib/AsmParser/Lexer.cpp:1.12	Fri Nov 11 18:11:48 2005
+++ llvm/lib/AsmParser/Lexer.cpp	Tue Jan 10 13:04:31 2006
@@ -20,7 +20,7 @@
 /* A lexical scanner generated by flex */
 
 /* Scanner skeleton version:
- * $Header: /private/var/automount/shared/PublicCVS/llvm/lib/AsmParser/Lexer.cpp,v 1.12 2005/11/12 00:11:48 lattner Exp $
+ * $Header: /private/var/automount/shared/PublicCVS/llvm/lib/AsmParser/Lexer.cpp,v 1.13 2006/01/10 19:04:31 bocchino Exp $
  */
 
 #define FLEX_SCANNER
@@ -308,32 +308,32 @@
 	*yy_cp = '\0'; \
 	yy_c_buf_p = yy_cp;
 
-#define YY_NUM_RULES 101
-#define YY_END_OF_BUFFER 102
-static yyconst short int yy_acclist[179] =
+#define YY_NUM_RULES 102
+#define YY_END_OF_BUFFER 103
+static yyconst short int yy_acclist[180] =
     {   0,
-      102,  100,  101,   99,  100,  101,   99,  101,  100,  101,
-      100,  101,  100,  101,  100,  101,  100,  101,  100,  101,
-       92,  100,  101,   92,  100,  101,    1,  100,  101,  100,
-      101,  100,  101,  100,  101,  100,  101,  100,  101,  100,
-      101,  100,  101,  100,  101,  100,  101,  100,  101,  100,
-      101,  100,  101,  100,  101,  100,  101,  100,  101,  100,
-      101,  100,  101,  100,  101,  100,  101,  100,  101,  100,
-      101,   91,   89,   88,   88,   95,   93,   97,   92,    1,
-       77,   34,   59,   20,   91,   88,   88,   96,   97,   17,
-       97,   98,   53,   58,   30,   35,   56,    3,   44,   55,
-
-       22,   67,   57,   76,   71,   72,   54,   60,   90,   97,
-       97,   39,   68,   69,   84,   85,   46,   19,   94,   23,
-        4,   51,   45,   38,   11,   97,   32,    2,    5,   48,
+      103,  101,  102,  100,  101,  102,  100,  102,  101,  102,
+      101,  102,  101,  102,  101,  102,  101,  102,  101,  102,
+       93,  101,  102,   93,  101,  102,    1,  101,  102,  101,
+      102,  101,  102,  101,  102,  101,  102,  101,  102,  101,
+      102,  101,  102,  101,  102,  101,  102,  101,  102,  101,
+      102,  101,  102,  101,  102,  101,  102,  101,  102,  101,
+      102,  101,  102,  101,  102,  101,  102,  101,  102,  101,
+      102,   92,   90,   89,   89,   96,   94,   98,   93,    1,
+       77,   34,   59,   20,   92,   89,   89,   97,   98,   17,
+       98,   99,   53,   58,   30,   35,   56,    3,   44,   55,
+
+       22,   67,   57,   76,   71,   72,   54,   60,   91,   98,
+       98,   39,   68,   69,   84,   85,   46,   19,   95,   23,
+        4,   51,   45,   38,   11,   98,   32,    2,    5,   48,
        50,   40,   62,   66,   64,   65,   63,   61,   42,   86,
        41,   47,   18,   74,   83,   37,   49,   27,   21,   36,
         7,   79,   29,   82,   52,   70,   78,   24,   25,   80,
        43,   75,   73,    6,   26,   33,    8,   14,    9,   10,
-       31,   12,   28,   81,   87,   13,   15,   16
+       31,   12,   28,   81,   87,   13,   88,   15,   16
     } ;
 
-static yyconst short int yy_accept[406] =
+static yyconst short int yy_accept[417] =
     {   0,
         1,    1,    1,    2,    4,    7,    9,   11,   13,   15,
        17,   19,   21,   24,   27,   30,   32,   34,   36,   38,
@@ -358,28 +358,29 @@
       110,  111,  111,  111,  111,  112,  112,  112,  112,  112,
 
       113,  114,  115,  115,  115,  115,  115,  115,  115,  115,
-      115,  115,  115,  115,  116,  116,  116,  116,  116,  116,
-      116,  116,  116,  117,  118,  118,  119,  119,  119,  120,
+      115,  115,  115,  115,  115,  116,  116,  116,  116,  116,
+      116,  116,  116,  116,  117,  118,  118,  119,  119,  119,
       120,  120,  120,  120,  120,  120,  120,  120,  120,  120,
-      121,  121,  121,  122,  123,  123,  124,  124,  124,  124,
-      124,  124,  124,  124,  124,  124,  125,  125,  126,  126,
-      127,  128,  128,  128,  129,  129,  129,  129,  129,  129,
-      129,  129,  129,  130,  130,  131,  131,  131,  131,  131,
-      131,  132,  132,  132,  132,  132,  132,  133,  133,  133,
-      134,  135,  136,  137,  138,  139,  140,  141,  141,  141,
-
-      141,  142,  143,  144,  144,  144,  144,  144,  144,  145,
-      145,  145,  145,  146,  146,  147,  147,  147,  147,  148,
-      149,  150,  150,  151,  151,  152,  152,  152,  153,  153,
-      154,  155,  156,  156,  156,  157,  158,  159,  160,  160,
-      160,  161,  162,  163,  164,  164,  164,  164,  164,  165,
-      166,  166,  166,  166,  166,  166,  166,  167,  167,  167,
-      167,  167,  167,  168,  169,  169,  169,  170,  171,  171,
-      171,  171,  172,  172,  173,  173,  173,  173,  173,  173,
-      173,  173,  173,  173,  173,  173,  173,  173,  173,  174,
-      174,  175,  175,  175,  175,  175,  175,  176,  176,  177,
+      120,  121,  121,  121,  122,  123,  123,  124,  124,  124,
+      124,  124,  124,  124,  124,  124,  124,  125,  125,  126,
+      126,  127,  128,  128,  128,  129,  129,  129,  129,  129,
+      129,  129,  129,  129,  129,  130,  130,  131,  131,  131,
+      131,  131,  131,  132,  132,  132,  132,  132,  132,  133,
+      133,  133,  134,  135,  136,  137,  138,  139,  140,  141,
+
+      141,  141,  141,  142,  143,  144,  144,  144,  144,  144,
+      144,  145,  145,  145,  145,  146,  146,  147,  147,  147,
+      147,  148,  149,  150,  150,  150,  151,  151,  152,  152,
+      152,  153,  153,  154,  155,  156,  156,  156,  157,  158,
+      159,  160,  160,  160,  161,  162,  163,  164,  164,  164,
+      164,  164,  165,  166,  166,  166,  166,  166,  166,  166,
+      166,  167,  167,  167,  167,  167,  167,  168,  169,  169,
+      169,  169,  170,  171,  171,  171,  171,  172,  172,  173,
+      173,  173,  173,  173,  173,  173,  173,  173,  173,  173,
+      173,  173,  173,  173,  173,  173,  173,  174,  174,  175,
 
-      177,  178,  178,  179,  179
+      175,  175,  175,  175,  175,  175,  175,  176,  176,  177,
+      177,  178,  179,  179,  180,  180
     } ;
 
 static yyconst int yy_ec[256] =
@@ -423,105 +424,107 @@
         3
     } ;
 
-static yyconst short int yy_base[410] =
+static yyconst short int yy_base[421] =
     {   0,
-        0,    0,  850,  851,  851,  851,  845,  836,   34,   36,
+        0,    0,  872,  873,  873,  873,  867,  858,   34,   36,
        38,   42,   46,   50,    0,   51,   54,   53,   56,   61,
        76,   77,   79,   80,   82,   83,   84,   90,   31,  111,
-       94,  140,  113,   55,  110,  116,  843,  851,  834,  851,
+       94,  140,  113,   55,  110,  116,  865,  873,  856,  873,
         0,  128,  131,  144,  150,  124,  160,  167,  172,    0,
-      136,  139,  168,  100,   41,  145,  114,  833,  173,  183,
+      136,  139,  168,  100,   41,  145,  114,  855,  173,  183,
       184,  185,  161,  187,  189,  191,  193,  133,  194,  196,
       200,  202,  205,  206,  209,  217,   89,  210,  213,  216,
-       57,  832,  207,  224,  223,  227,  229,  233,  243,  235,
-      238,  242,  247,  831,  249,  250,  251,  259,  245,  267,
+       57,  854,  207,  224,  223,  227,  229,  233,  243,  235,
+      238,  242,  247,  853,  249,  250,  251,  259,  245,  267,
 
-      265,  266,  272,  281,  274,  278,  830,    0,  291,  293,
-      829,  305,  311,    0,  828,  241,  282,  827,  312,  284,
-      826,  298,  301,  294,  825,  315,  318,  319,  320,  824,
+      265,  266,  272,  281,  274,  278,  852,    0,  291,  293,
+      851,  305,  311,    0,  850,  241,  282,  849,  312,  284,
+      848,  298,  301,  294,  847,  315,  318,  319,  320,  846,
       322,  324,  327,  329,  325,  326,  339,  332,  333,  345,
-      331,  343,  330,  350,  353,  354,  355,  357,  356,  823,
-      822,  358,  360,  821,  361,  820,  819,  383,  364,  372,
-      365,  394,  818,  362,  817,  375,  816,  376,  369,  397,
-      379,  401,  404,  400,  402,  407,  406,  412,  417,  414,
-      416,  428,  418,  421,  432,  431,  435,  815,  419,  851,
-      443,  449,  452,  455,  458,  443,  459,  461,  462,  814,
-
-      813,  812,  463,  464,  467,  468,  465,  469,  471,  473,
-      475,  476,  477,  811,  482,  486,  489,  485,  488,  492,
-      420,  493,  810,  809,  495,  808,  496,  499,    0,  501,
-      503,  504,  505,  509,  512,  514,  515,  517,  524,  807,
-      519,  527,  806,  805,  530,  804,  529,  533,  534,  536,
-      537,  544,  545,  546,  548,  803,  549,  802,  550,  553,
-      801,  553,  556,  800,  555,  568,  559,  561,  560,  570,
-      571,  574,  799,  576,  798,  577,  578,  579,  581,  588,
-      797,  582,  592,  589,  600,  602,  796,  585,  584,  795,
-      794,  793,  792,  791,  790,  789,  788,  604,  590,  605,
-
-      787,  786,  785,  606,  608,  610,  612,  617,  784,  619,
-      620,  621,  783,  623,  782,  622,  625,  624,  781,  780,
-      779,  626,  778,  627,  777,  632,  640,  776,  630,  775,
-      774,  773,  644,  647,  772,  771,  770,  769,  648,  650,
-      768,  765,  756,  755,  651,  654,  652,  649,  753,  752,
-      653,  670,  656,  659,  671,  655,  751,  658,  676,  675,
-      660,  678,  750,  749,  682,  685,  748,  747,  687,  686,
-      688,  746,  690,  745,  691,  692,  693,  696,  695,  702,
-      698,  704,  706,  705,  711,  713,  712,  716,  744,  721,
-      739,  718,  719,  723,  724,  725,  738,  726,  737,  733,
+      331,  343,  330,  353,  354,  355,  356,  358,  357,  845,
+      844,  359,  360,  843,  365,  842,  841,  385,  363,  366,
+      361,  396,  840,  376,  839,  377,  838,  379,  385,  399,
+      401,  403,  406,  381,  408,  409,  414,  416,  418,  417,
+      419,  424,  421,  425,  367,  435,  422,  837,  428,  873,
+      440,  449,  452,  454,  457,  441,  459,  460,  461,  836,
+
+      835,  834,  462,  463,  465,  467,  464,  468,  471,  472,
+      476,  474,  475,  484,  833,  485,  487,  488,  489,  491,
+      494,  495,  496,  832,  831,  498,  830,  499,  501,    0,
+      503,  502,  514,  506,  508,  518,  519,  520,  525,  522,
+      829,  530,  532,  828,  827,  533,  826,  535,  538,  536,
+      540,  537,  544,  550,  551,  552,  825,  553,  824,  555,
+      558,  823,  558,  559,  822,  566,  564,  560,  572,  561,
+      574,  575,  577,  580,  821,  582,  820,  583,  584,  585,
+      586,  588,  819,  590,  593,  604,  596,  600,  818,  595,
+      606,  817,  816,  815,  814,  813,  812,  811,  810,  608,
+
+      610,  612,  809,  808,  807,  614,  615,  616,  617,  619,
+      806,  618,  623,  625,  805,  626,  804,  627,  634,  628,
+      803,  802,  801,  646,  631,  800,  632,  799,  638,  652,
+      798,  649,  797,  796,  795,  645,  653,  794,  793,  792,
+      791,  655,  659,  790,  789,  786,  777,  658,  661,  660,
+      662,  776,  774,  663,  667,  672,  665,  664,  675,  669,
+      772,  683,  687,  680,  686,  690,  771,  770,  693,  694,
+      695,  769,  767,  697,  698,  696,  765,  699,  764,  705,
+      700,  715,  703,  704,  706,  719,  722,  707,  716,  725,
+      727,  728,  729,  731,  730,  733,  762,  736,  760,  735,
 
-      657,  736,  422,  851,  769,  771,  379,  775,  375
+      741,  742,  743,  747,  749,  750,  759,  751,  752,  757,
+      635,  504,  754,  432,  873,  790,  792,  382,  796,  380
     } ;
 
-static yyconst short int yy_def[410] =
+static yyconst short int yy_def[421] =
     {   0,
-      404,    1,  404,  404,  404,  404,  405,  406,  407,  404,
-      406,  406,  406,  406,  408,  406,  406,  406,  406,  406,
-      406,  406,  406,  406,  406,  406,  406,  406,  406,  406,
-      406,  406,  406,  406,  406,  406,  405,  404,  406,  404,
-      409,  409,  404,  404,  406,  406,  406,  406,  406,  408,
-      406,  406,  406,  406,  406,  406,  406,  406,  406,  406,
-      406,  406,  406,  406,  406,  406,  406,  406,  406,  406,
-      406,  406,  406,  406,  406,  406,  406,  406,  406,  406,
-      406,  406,  406,  406,  406,  406,  406,  406,  406,  406,
-      406,  406,  406,  406,  406,  406,  406,  406,  406,  406,
-
-      406,  406,  406,  406,  406,  406,  404,  409,  409,  404,
-      406,  406,  406,   49,  406,  406,  406,  406,  406,  406,
-      406,  406,  406,  406,  406,  406,  406,  406,  406,  406,
-      406,  406,  406,  406,  406,  406,  406,  406,  406,  406,
-      406,  406,  406,  406,  406,  406,  406,  406,  406,  406,
-      406,  406,  406,  406,  406,  406,  406,   49,  406,  406,
-      406,  406,  406,  406,  406,  406,  406,  406,  406,  406,
-      406,  406,  406,  406,  406,  406,  406,  406,  406,  406,
-      406,  406,  406,  406,  406,  406,  406,  406,  406,  404,
-      404,  404,  404,  406,  406,  406,  406,  406,  406,  406,
-
-      406,  406,  406,  406,  406,  406,  406,  406,  406,  406,
-      406,  406,  406,  406,  406,  406,  406,  406,  406,  406,
-      406,  406,  406,  406,  406,  406,  406,  406,  158,  406,
-      406,  406,  406,  406,  406,  406,  406,  406,  406,  406,
-      406,  406,  406,  406,  406,  406,  406,  406,  406,  406,
-      406,  406,  406,  406,  406,  406,  406,  406,  406,  404,
-      406,  406,  406,  406,  406,  406,  406,  406,  406,  406,
-      406,  406,  406,  406,  406,  406,  406,  406,  406,  406,
-      406,  406,  406,  406,  406,  406,  406,  406,  406,  406,
-      406,  406,  406,  406,  406,  406,  406,  406,  406,  406,
-
-      406,  406,  406,  406,  406,  406,  406,  406,  406,  406,
-      406,  406,  406,  406,  406,  406,  406,  406,  406,  406,
-      406,  406,  406,  406,  406,  406,  406,  406,  406,  406,
-      406,  406,  406,  406,  406,  406,  406,  406,  406,  406,
-      406,  406,  406,  406,  406,  406,  406,  406,  406,  406,
-      406,  406,  406,  406,  406,  406,  406,  406,  406,  406,
-      406,  406,  406,  406,  406,  406,  406,  406,  406,  406,
-      406,  406,  406,  406,  406,  406,  406,  406,  406,  406,
-      406,  406,  406,  406,  406,  406,  406,  406,  406,  406,
-      406,  406,  406,  406,  406,  406,  406,  406,  406,  406,
+      415,    1,  415,  415,  415,  415,  416,  417,  418,  415,
+      417,  417,  417,  417,  419,  417,  417,  417,  417,  417,
+      417,  417,  417,  417,  417,  417,  417,  417,  417,  417,
+      417,  417,  417,  417,  417,  417,  416,  415,  417,  415,
+      420,  420,  415,  415,  417,  417,  417,  417,  417,  419,
+      417,  417,  417,  417,  417,  417,  417,  417,  417,  417,
+      417,  417,  417,  417,  417,  417,  417,  417,  417,  417,
+      417,  417,  417,  417,  417,  417,  417,  417,  417,  417,
+      417,  417,  417,  417,  417,  417,  417,  417,  417,  417,
+      417,  417,  417,  417,  417,  417,  417,  417,  417,  417,
+
+      417,  417,  417,  417,  417,  417,  415,  420,  420,  415,
+      417,  417,  417,   49,  417,  417,  417,  417,  417,  417,
+      417,  417,  417,  417,  417,  417,  417,  417,  417,  417,
+      417,  417,  417,  417,  417,  417,  417,  417,  417,  417,
+      417,  417,  417,  417,  417,  417,  417,  417,  417,  417,
+      417,  417,  417,  417,  417,  417,  417,   49,  417,  417,
+      417,  417,  417,  417,  417,  417,  417,  417,  417,  417,
+      417,  417,  417,  417,  417,  417,  417,  417,  417,  417,
+      417,  417,  417,  417,  417,  417,  417,  417,  417,  415,
+      415,  415,  415,  417,  417,  417,  417,  417,  417,  417,
+
+      417,  417,  417,  417,  417,  417,  417,  417,  417,  417,
+      417,  417,  417,  417,  417,  417,  417,  417,  417,  417,
+      417,  417,  417,  417,  417,  417,  417,  417,  417,  158,
+      417,  417,  417,  417,  417,  417,  417,  417,  417,  417,
+      417,  417,  417,  417,  417,  417,  417,  417,  417,  417,
+      417,  417,  417,  417,  417,  417,  417,  417,  417,  417,
+      415,  417,  417,  417,  417,  417,  417,  417,  417,  417,
+      417,  417,  417,  417,  417,  417,  417,  417,  417,  417,
+      417,  417,  417,  417,  417,  417,  417,  417,  417,  417,
+      417,  417,  417,  417,  417,  417,  417,  417,  417,  417,
+
+      417,  417,  417,  417,  417,  417,  417,  417,  417,  417,
+      417,  417,  417,  417,  417,  417,  417,  417,  417,  417,
+      417,  417,  417,  417,  417,  417,  417,  417,  417,  417,
+      417,  417,  417,  417,  417,  417,  417,  417,  417,  417,
+      417,  417,  417,  417,  417,  417,  417,  417,  417,  417,
+      417,  417,  417,  417,  417,  417,  417,  417,  417,  417,
+      417,  417,  417,  417,  417,  417,  417,  417,  417,  417,
+      417,  417,  417,  417,  417,  417,  417,  417,  417,  417,
+      417,  417,  417,  417,  417,  417,  417,  417,  417,  417,
+      417,  417,  417,  417,  417,  417,  417,  417,  417,  417,
 
-      406,  406,  406,    0,  404,  404,  404,  404,  404
+      417,  417,  417,  417,  417,  417,  417,  417,  417,  417,
+      417,  417,  417,  417,    0,  415,  415,  415,  415,  415
     } ;
 
-static yyconst short int yy_nxt[893] =
+static yyconst short int yy_nxt[915] =
     {   0,
         4,    5,    6,    7,    8,    9,   10,   11,   12,   13,
        14,    4,   15,    8,    8,    8,   16,   17,   18,   19,
@@ -561,70 +564,72 @@
       195,  195,   40,   40,  200,  113,   40,  201,  202,   40,
        40,   40,  198,   40,  203,   40,   40,   40,   40,  207,
        40,   40,   40,   40,   40,  205,  206,  209,  208,  210,
-       40,  204,  214,  215,   40,  213,   40,  217,  211,  219,
-      212,   40,  216,  218,   40,   40,   40,   40,   40,   40,
-      220,   40,   40,   40,  223,   40,   40,  108,  221,  224,
-       40,   41,  225,   40,  226,  232,   40,   40,  222,  228,
-       40,  227,  229,  229,  237,  240,  229,  229,  230,  229,
-
-      229,  229,  229,  229,  229,   40,  231,  238,   40,  242,
-      239,   40,   40,   40,  233,   40,  234,   40,   40,  241,
-      235,  243,  236,   40,  244,   40,  248,   40,   40,   40,
-       40,   40,   40,   40,  245,  247,  246,  250,  251,   40,
-      249,  255,   40,   40,  253,  252,   40,  257,  259,  282,
-      254,  256,  191,  191,   40,  193,  193,  192,  260,  260,
-      258,  260,  260,  192,  195,  195,   40,  195,  195,   40,
-       40,  261,   40,   40,   40,   40,   40,  262,   40,   40,
-       40,  265,   40,  267,   40,  270,   40,   40,   40,  263,
-      264,  269,  268,   40,  274,  273,   40,   40,  266,   40,
-
-       40,  271,  277,   40,   40,  272,   40,   40,  276,  278,
-       40,  275,   40,  280,   40,   40,   40,  279,  281,  283,
-       40,  287,  289,   40,  284,   40,   40,  288,   40,  291,
-       40,  285,  293,  286,  295,   40,  290,  297,   40,  299,
-       40,   40,  298,  292,   40,   40,  294,   40,   40,  296,
-      301,  302,  305,  300,  303,   40,   40,   40,  304,   40,
-       40,   40,  260,  260,   40,  306,   40,   40,  309,  313,
-       40,   40,   40,  315,  312,  314,  307,  308,  318,   40,
-      319,   40,   40,  311,  316,   40,  310,   40,   40,   40,
-       40,  317,   40,   40,  323,   40,   40,  324,  320,   40,
-
-       40,   40,  322,   40,  325,  321,  326,  331,  328,  327,
-      329,   40,  330,   40,  334,   40,   40,   40,  335,   40,
-      332,   40,  333,   40,  337,  338,  340,  336,   40,  341,
-       40,   40,   40,   40,   40,   40,   40,   40,   40,  343,
-      339,   40,  351,   40,  345,  349,  342,  347,  355,  346,
-      348,   40,  353,  344,  352,   40,  354,  350,   40,   40,
-       40,   40,   40,   40,   40,   40,   40,   40,   40,   40,
-       40,   40,  358,  359,  370,  357,  356,  360,  361,  364,
-      362,   40,   40,  363,  366,  367,   40,   40,  369,   40,
-      365,  368,  371,   40,  373,  372,   40,   40,   40,   40,
-
-      374,   40,   40,   40,   40,  379,   40,   40,  382,   40,
-      375,  377,  378,   40,  380,   40,   40,   40,  386,  376,
-      384,  385,   40,   40,   40,  381,  389,   40,  387,   40,
-       40,  391,   40,  383,   40,   40,   40,   40,  388,  392,
-      394,  395,  396,  399,   40,  390,  393,   40,   40,   40,
-       40,  397,  398,  402,  401,   40,   40,   40,   40,   40,
-       40,   40,   40,   40,   40,  400,   40,   40,  403,   37,
-       37,   37,   37,   39,   39,   50,   40,   50,   50,   40,
+       40,  204,  215,  216,   40,  214,   40,  218,  212,  220,
+      213,  211,  217,  219,   40,   40,   40,   40,   40,   40,
+       40,   40,   40,  221,   40,  224,   40,   40,   40,  222,
+      225,  233,  108,  226,   41,  227,  257,   40,   40,  223,
+       40,  228,   40,  229,  230,  230,   40,  231,  230,  230,
+
+      232,  230,  230,  230,  230,  230,  230,   40,  238,  239,
+       40,  241,   40,  240,   40,  246,  234,   40,  235,   40,
+       40,  242,  236,  244,  237,   40,  245,   40,   40,   40,
+       40,  243,   40,   40,  249,   40,   40,  248,  251,   40,
+      254,  252,  247,   40,  250,  256,   40,  259,  253,  191,
+      191,  258,   40,  255,  192,  193,  193,  260,  261,  261,
+      192,  261,  261,  195,  195,   40,  195,  195,   40,  262,
+       40,   40,   40,   40,   40,   40,   40,  263,   40,   40,
+      266,  268,   40,   40,  271,   40,   40,   40,  264,  265,
+      270,  269,  274,  276,  275,   40,   40,  267,   40,   40,
+
+       40,  272,   40,  279,  273,   40,   40,   40,  280,   40,
+       40,  278,   40,   40,   40,   40,  282,   40,  277,   40,
+      283,  281,  285,  289,  284,   40,  290,  286,  293,   40,
+       40,   40,  291,   40,  287,  288,   40,  292,  295,  297,
+      300,   40,  294,   40,   40,  299,   40,   40,   40,   40,
+      301,   40,  296,  303,  298,   40,  307,  304,  302,  305,
+      306,   40,   40,   40,   40,  308,   40,  261,  261,   40,
+       40,   40,   40,  311,  315,   40,  309,   40,  316,  314,
+      318,  321,  310,   40,  317,   40,   40,  313,   40,  320,
+      312,   40,  319,   40,   40,   40,   40,   40,  325,   40,
+
+      326,   40,  322,  327,   40,  324,   40,   40,  331,  323,
+      328,   40,  329,  333,  330,   40,  335,   40,  332,   40,
+      336,   40,  334,   40,  337,   40,   40,   40,   40,   40,
+       40,  339,  341,  343,   40,  344,   40,   40,   40,   40,
+      338,  346,   40,   40,  340,   40,   40,  348,  342,   40,
+      350,  345,  347,  349,  352,  351,   40,   40,  357,  356,
+       40,  353,  354,   40,   40,  355,   40,  359,  358,   40,
+       40,   40,   40,   40,   40,   40,   40,  360,   40,  362,
+       40,  361,  363,   40,  364,  365,   40,  369,  366,  368,
+      372,   40,  370,  371,   40,  373,  367,   40,   40,  375,
+
+      377,   40,  374,  376,   40,   40,   40,   40,   40,   40,
+       40,   40,  379,  385,   40,   40,   40,   40,   40,  380,
+      378,  383,  381,  386,  384,  387,   40,   40,  391,  382,
+       40,  389,  392,   40,  388,  393,   40,  395,   40,   40,
+       40,   40,   40,  390,   40,  397,   40,   40,  399,  394,
+      396,  401,   40,   40,   40,  400,  404,  403,   40,  405,
+       40,   40,   40,   40,  402,   40,  409,  398,   40,  406,
+       40,   40,  408,   40,  407,   40,   40,  413,   40,  412,
+       40,   40,   40,   40,  411,   40,  414,   40,   40,  410,
+       37,   37,   37,   37,   39,   39,   50,   40,   50,   50,
+
        40,   40,   40,   40,   40,   40,   40,   40,   40,   40,
        40,   40,   40,   40,   40,   40,   40,   40,   40,   40,
-
        40,   40,   40,   40,   40,   40,   40,   40,   40,   40,
        40,   40,   40,   40,   40,   40,   40,   40,   40,   40,
        40,   40,   40,   40,   40,   40,   40,   40,   40,   40,
        40,   40,   40,   40,   40,   40,   40,   40,   40,   40,
-       40,  190,   40,   40,   40,   40,  107,   40,   38,  404,
-        3,  404,  404,  404,  404,  404,  404,  404,  404,  404,
-      404,  404,  404,  404,  404,  404,  404,  404,  404,  404,
-      404,  404,  404,  404,  404,  404,  404,  404,  404,  404,
-      404,  404,  404,  404,  404,  404,  404,  404,  404,  404,
-      404,  404
+       40,   40,   40,  190,   40,   40,   40,   40,  107,   40,
+       38,  415,    3,  415,  415,  415,  415,  415,  415,  415,
+      415,  415,  415,  415,  415,  415,  415,  415,  415,  415,
+      415,  415,  415,  415,  415,  415,  415,  415,  415,  415,
 
+      415,  415,  415,  415,  415,  415,  415,  415,  415,  415,
+      415,  415,  415,  415
     } ;
 
-static yyconst short int yy_chk[893] =
+static yyconst short int yy_chk[915] =
     {   0,
         1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
         1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
@@ -665,66 +670,68 @@
       128,  129,  119,  131,  126,  132,  135,  136,  133,  131,
       134,  143,  141,  138,  139,  128,  129,  133,  132,  134,
       137,  127,  138,  139,  142,  137,  140,  141,  135,  143,
-      136,  144,  140,  142,  145,  146,  147,  149,  148,  152,
-      144,  153,  155,  164,  147,  159,  161,  409,  145,  148,
-      169,  407,  149,  160,  152,  161,  166,  168,  146,  155,
-      171,  153,  158,  158,  164,  169,  158,  158,  159,  158,
-
-      158,  158,  158,  158,  158,  162,  160,  166,  170,  171,
-      168,  174,  172,  175,  162,  173,  162,  177,  176,  170,
-      162,  172,  162,  178,  173,  180,  177,  181,  179,  183,
-      189,  221,  184,  403,  174,  176,  175,  179,  180,  182,
-      178,  184,  186,  185,  182,  181,  187,  186,  189,  221,
-      183,  185,  191,  191,  196,  192,  192,  191,  192,  192,
-      187,  193,  193,  191,  194,  194,  194,  195,  195,  195,
-      197,  196,  198,  199,  203,  204,  207,  197,  205,  206,
-      208,  203,  209,  205,  210,  208,  211,  212,  213,  198,
-      199,  207,  206,  215,  212,  211,  218,  216,  204,  219,
-
-      217,  209,  216,  220,  222,  210,  225,  227,  215,  217,
-      228,  213,  230,  219,  231,  232,  233,  218,  220,  222,
-      234,  230,  232,  235,  225,  236,  237,  231,  238,  234,
-      241,  227,  235,  228,  236,  239,  233,  238,  242,  241,
-      247,  245,  239,  234,  248,  249,  235,  250,  251,  237,
-      245,  247,  250,  242,  248,  252,  253,  254,  249,  255,
-      257,  259,  260,  260,  262,  251,  265,  263,  254,  262,
-      267,  269,  268,  265,  259,  263,  252,  253,  268,  266,
-      269,  270,  271,  257,  266,  272,  255,  274,  276,  277,
-      278,  267,  279,  282,  274,  289,  288,  276,  270,  280,
-
-      284,  299,  272,  283,  277,  271,  278,  284,  280,  279,
-      282,  285,  283,  286,  288,  298,  300,  304,  289,  305,
-      285,  306,  286,  307,  299,  300,  305,  298,  308,  306,
-      310,  311,  312,  316,  314,  318,  317,  322,  324,  308,
-      304,  329,  322,  326,  311,  317,  307,  314,  329,  312,
-      316,  327,  326,  310,  324,  333,  327,  318,  334,  339,
-      348,  340,  345,  347,  351,  346,  356,  353,  401,  358,
-      354,  361,  339,  340,  358,  334,  333,  345,  346,  351,
-      347,  352,  355,  348,  353,  354,  360,  359,  356,  362,
-      352,  355,  359,  365,  361,  360,  366,  370,  369,  371,
-
-      362,  373,  375,  376,  377,  371,  379,  378,  376,  381,
-      365,  369,  370,  380,  373,  382,  384,  383,  380,  366,
-      378,  379,  385,  387,  386,  375,  383,  388,  381,  392,
-      393,  385,  390,  377,  394,  395,  396,  398,  382,  386,
-      388,  390,  392,  395,  400,  384,  387,  402,  399,  397,
-      391,  393,  394,  400,  398,  389,  374,  372,  368,  367,
-      364,  363,  357,  350,  349,  396,  344,  343,  402,  405,
-      405,  405,  405,  406,  406,  408,  342,  408,  408,  341,
-      338,  337,  336,  335,  332,  331,  330,  328,  325,  323,
-      321,  320,  319,  315,  313,  309,  303,  302,  301,  297,
-
-      296,  295,  294,  293,  292,  291,  290,  287,  281,  275,
-      273,  264,  261,  258,  256,  246,  244,  243,  240,  226,
-      224,  223,  214,  202,  201,  200,  188,  167,  165,  163,
-      157,  156,  154,  151,  150,  130,  125,  121,  118,  115,
-      111,  107,   94,   82,   58,   39,   37,    8,    7,    3,
-      404,  404,  404,  404,  404,  404,  404,  404,  404,  404,
-      404,  404,  404,  404,  404,  404,  404,  404,  404,  404,
-      404,  404,  404,  404,  404,  404,  404,  404,  404,  404,
-      404,  404,  404,  404,  404,  404,  404,  404,  404,  404,
-      404,  404
+      136,  134,  140,  142,  144,  145,  146,  147,  149,  148,
+      152,  153,  161,  144,  159,  147,  155,  160,  185,  145,
+      148,  161,  420,  149,  418,  152,  185,  164,  166,  146,
+      168,  153,  174,  155,  158,  158,  169,  159,  158,  158,
+
+      160,  158,  158,  158,  158,  158,  158,  162,  164,  166,
+      170,  169,  171,  168,  172,  174,  162,  173,  162,  175,
+      176,  170,  162,  172,  162,  177,  173,  178,  180,  179,
+      181,  171,  183,  187,  177,  182,  184,  176,  179,  189,
+      182,  180,  175,  414,  178,  184,  186,  187,  181,  191,
+      191,  186,  196,  183,  191,  192,  192,  189,  192,  192,
+      191,  193,  193,  194,  194,  194,  195,  195,  195,  196,
+      197,  198,  199,  203,  204,  207,  205,  197,  206,  208,
+      203,  205,  209,  210,  208,  212,  213,  211,  198,  199,
+      207,  206,  211,  213,  212,  214,  216,  204,  217,  218,
+
+      219,  209,  220,  217,  210,  221,  222,  223,  218,  226,
+      228,  216,  229,  232,  231,  412,  220,  234,  214,  235,
+      221,  219,  223,  231,  222,  233,  232,  226,  235,  236,
+      237,  238,  233,  240,  228,  229,  239,  234,  236,  237,
+      240,  242,  235,  243,  246,  239,  248,  250,  252,  249,
+      242,  251,  236,  246,  238,  253,  251,  248,  243,  249,
+      250,  254,  255,  256,  258,  252,  260,  261,  261,  263,
+      264,  268,  270,  255,  263,  267,  253,  266,  264,  260,
+      267,  270,  254,  269,  266,  271,  272,  258,  273,  269,
+      256,  274,  268,  276,  278,  279,  280,  281,  274,  282,
+
+      276,  284,  271,  278,  285,  273,  290,  287,  282,  272,
+      279,  288,  280,  285,  281,  286,  287,  291,  284,  300,
+      288,  301,  286,  302,  290,  306,  307,  308,  309,  312,
+      310,  300,  302,  307,  313,  308,  314,  316,  318,  320,
+      291,  310,  325,  327,  301,  319,  411,  313,  306,  329,
+      316,  309,  312,  314,  319,  318,  336,  324,  329,  327,
+      332,  320,  324,  330,  337,  325,  342,  332,  330,  348,
+      343,  350,  349,  351,  354,  358,  357,  336,  355,  342,
+      360,  337,  343,  356,  348,  349,  359,  355,  350,  354,
+      358,  364,  356,  357,  362,  359,  351,  365,  363,  362,
+
+      364,  366,  360,  363,  369,  370,  371,  376,  374,  375,
+      378,  381,  366,  376,  383,  384,  380,  385,  388,  369,
+      365,  374,  370,  378,  375,  380,  382,  389,  384,  371,
+      386,  382,  385,  387,  381,  386,  390,  388,  391,  392,
+      393,  395,  394,  383,  396,  390,  400,  398,  392,  387,
+      389,  394,  401,  402,  403,  393,  398,  396,  404,  400,
+      405,  406,  408,  409,  395,  413,  404,  391,  410,  401,
+      407,  399,  403,  397,  402,  379,  377,  410,  373,  408,
+      372,  368,  367,  361,  406,  353,  413,  352,  347,  405,
+      416,  416,  416,  416,  417,  417,  419,  346,  419,  419,
+
+      345,  344,  341,  340,  339,  338,  335,  334,  333,  331,
+      328,  326,  323,  322,  321,  317,  315,  311,  305,  304,
+      303,  299,  298,  297,  296,  295,  294,  293,  292,  289,
+      283,  277,  275,  265,  262,  259,  257,  247,  245,  244,
+      241,  227,  225,  224,  215,  202,  201,  200,  188,  167,
+      165,  163,  157,  156,  154,  151,  150,  130,  125,  121,
+      118,  115,  111,  107,   94,   82,   58,   39,   37,    8,
+        7,    3,  415,  415,  415,  415,  415,  415,  415,  415,
+      415,  415,  415,  415,  415,  415,  415,  415,  415,  415,
+      415,  415,  415,  415,  415,  415,  415,  415,  415,  415,
 
+      415,  415,  415,  415,  415,  415,  415,  415,  415,  415,
+      415,  415,  415,  415
     } ;
 
 static yy_state_type yy_state_buf[YY_BUF_SIZE + 2], *yy_state_ptr;
@@ -741,7 +748,7 @@
 #define YY_MORE_ADJ 0
 #define YY_RESTORE_YY_MORE_OFFSET
 char *yytext;
-#line 1 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 1 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 #define INITIAL 0
 /*===-- Lexer.l - Scanner for llvm assembly files --------------*- C++ -*--===//
 //
@@ -756,7 +763,7 @@
 //
 //===----------------------------------------------------------------------===*/
 #define YY_NEVER_INTERACTIVE 1
-#line 28 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 28 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 #include "ParserInternals.h"
 #include "llvm/Module.h"
 #include <list>
@@ -882,7 +889,7 @@
 /* HexIntConstant - Hexadecimal constant generated by the CFE to avoid forcing
  * it to deal with 64 bit numbers.
  */
-#line 886 "Lexer.cpp"
+#line 893 "Lexer.cpp"
 
 /* Macros after this point can all be overridden by user definitions in
  * section 1.
@@ -1033,10 +1040,10 @@
 	register char *yy_cp, *yy_bp;
 	register int yy_act;
 
-#line 179 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 179 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 
 
-#line 1040 "Lexer.cpp"
+#line 1047 "Lexer.cpp"
 
 	if ( yy_init )
 		{
@@ -1084,14 +1091,14 @@
 			while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state )
 				{
 				yy_current_state = (int) yy_def[yy_current_state];
-				if ( yy_current_state >= 405 )
+				if ( yy_current_state >= 416 )
 					yy_c = yy_meta[(unsigned int) yy_c];
 				}
 			yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c];
 			*yy_state_ptr++ = yy_current_state;
 			++yy_cp;
 			}
-		while ( yy_current_state != 404 );
+		while ( yy_current_state != 415 );
 
 yy_find_action:
 		yy_current_state = *--yy_state_ptr;
@@ -1129,451 +1136,456 @@
 	{ /* beginning of action switch */
 case 1:
 YY_RULE_SETUP
-#line 181 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 181 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { /* Ignore comments for now */ }
 	YY_BREAK
 case 2:
 YY_RULE_SETUP
-#line 183 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 183 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { return BEGINTOK; }
 	YY_BREAK
 case 3:
 YY_RULE_SETUP
-#line 184 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 184 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { return ENDTOK; }
 	YY_BREAK
 case 4:
 YY_RULE_SETUP
-#line 185 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 185 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { return TRUETOK;  }
 	YY_BREAK
 case 5:
 YY_RULE_SETUP
-#line 186 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 186 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { return FALSETOK; }
 	YY_BREAK
 case 6:
 YY_RULE_SETUP
-#line 187 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 187 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { return DECLARE; }
 	YY_BREAK
 case 7:
 YY_RULE_SETUP
-#line 188 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 188 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { return GLOBAL; }
 	YY_BREAK
 case 8:
 YY_RULE_SETUP
-#line 189 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 189 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { return CONSTANT; }
 	YY_BREAK
 case 9:
 YY_RULE_SETUP
-#line 190 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 190 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { return INTERNAL; }
 	YY_BREAK
 case 10:
 YY_RULE_SETUP
-#line 191 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 191 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { return LINKONCE; }
 	YY_BREAK
 case 11:
 YY_RULE_SETUP
-#line 192 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 192 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { return WEAK; }
 	YY_BREAK
 case 12:
 YY_RULE_SETUP
-#line 193 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 193 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { return APPENDING; }
 	YY_BREAK
 case 13:
 YY_RULE_SETUP
-#line 194 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 194 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { return EXTERNAL; }    /* Deprecated, turn into external */
 	YY_BREAK
 case 14:
 YY_RULE_SETUP
-#line 195 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 195 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { return EXTERNAL; }
 	YY_BREAK
 case 15:
 YY_RULE_SETUP
-#line 196 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 196 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { return IMPLEMENTATION; }
 	YY_BREAK
 case 16:
 YY_RULE_SETUP
-#line 197 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 197 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { return ZEROINITIALIZER; }
 	YY_BREAK
 case 17:
 YY_RULE_SETUP
-#line 198 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 198 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { return DOTDOTDOT; }
 	YY_BREAK
 case 18:
 YY_RULE_SETUP
-#line 199 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 199 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { return UNDEF; }
 	YY_BREAK
 case 19:
 YY_RULE_SETUP
-#line 200 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 200 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { return NULL_TOK; }
 	YY_BREAK
 case 20:
 YY_RULE_SETUP
-#line 201 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 201 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { return TO; }
 	YY_BREAK
 case 21:
 YY_RULE_SETUP
-#line 202 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 202 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { RET_TOK(TermOpVal, Unwind, UNWIND); }
 	YY_BREAK
 case 22:
 YY_RULE_SETUP
-#line 203 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 203 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { return NOT; }  /* Deprecated, turned into XOR */
 	YY_BREAK
 case 23:
 YY_RULE_SETUP
-#line 204 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 204 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { return TAIL; }
 	YY_BREAK
 case 24:
 YY_RULE_SETUP
-#line 205 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 205 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { return TARGET; }
 	YY_BREAK
 case 25:
 YY_RULE_SETUP
-#line 206 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 206 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { return TRIPLE; }
 	YY_BREAK
 case 26:
 YY_RULE_SETUP
-#line 207 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 207 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { return DEPLIBS; }
 	YY_BREAK
 case 27:
 YY_RULE_SETUP
-#line 208 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 208 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { return ENDIAN; }
 	YY_BREAK
 case 28:
 YY_RULE_SETUP
-#line 209 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 209 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { return POINTERSIZE; }
 	YY_BREAK
 case 29:
 YY_RULE_SETUP
-#line 210 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 210 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { return LITTLE; }
 	YY_BREAK
 case 30:
 YY_RULE_SETUP
-#line 211 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 211 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { return BIG; }
 	YY_BREAK
 case 31:
 YY_RULE_SETUP
-#line 212 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 212 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { return VOLATILE; }
 	YY_BREAK
 case 32:
 YY_RULE_SETUP
-#line 213 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 213 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { return ALIGN;  }
 	YY_BREAK
 case 33:
 YY_RULE_SETUP
-#line 214 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 214 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { return SECTION; }
 	YY_BREAK
 case 34:
 YY_RULE_SETUP
-#line 216 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 216 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { return CC_TOK; }
 	YY_BREAK
 case 35:
 YY_RULE_SETUP
-#line 217 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 217 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { return CCC_TOK; }
 	YY_BREAK
 case 36:
 YY_RULE_SETUP
-#line 218 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 218 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { return FASTCC_TOK; }
 	YY_BREAK
 case 37:
 YY_RULE_SETUP
-#line 219 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 219 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { return COLDCC_TOK; }
 	YY_BREAK
 case 38:
 YY_RULE_SETUP
-#line 221 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 221 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { llvmAsmlval.PrimType = Type::VoidTy  ; return VOID;   }
 	YY_BREAK
 case 39:
 YY_RULE_SETUP
-#line 222 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 222 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { llvmAsmlval.PrimType = Type::BoolTy  ; return BOOL;   }
 	YY_BREAK
 case 40:
 YY_RULE_SETUP
-#line 223 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 223 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { llvmAsmlval.PrimType = Type::SByteTy ; return SBYTE;  }
 	YY_BREAK
 case 41:
 YY_RULE_SETUP
-#line 224 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 224 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { llvmAsmlval.PrimType = Type::UByteTy ; return UBYTE;  }
 	YY_BREAK
 case 42:
 YY_RULE_SETUP
-#line 225 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 225 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { llvmAsmlval.PrimType = Type::ShortTy ; return SHORT;  }
 	YY_BREAK
 case 43:
 YY_RULE_SETUP
-#line 226 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 226 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { llvmAsmlval.PrimType = Type::UShortTy; return USHORT; }
 	YY_BREAK
 case 44:
 YY_RULE_SETUP
-#line 227 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 227 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { llvmAsmlval.PrimType = Type::IntTy   ; return INT;    }
 	YY_BREAK
 case 45:
 YY_RULE_SETUP
-#line 228 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 228 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { llvmAsmlval.PrimType = Type::UIntTy  ; return UINT;   }
 	YY_BREAK
 case 46:
 YY_RULE_SETUP
-#line 229 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 229 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { llvmAsmlval.PrimType = Type::LongTy  ; return LONG;   }
 	YY_BREAK
 case 47:
 YY_RULE_SETUP
-#line 230 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 230 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { llvmAsmlval.PrimType = Type::ULongTy ; return ULONG;  }
 	YY_BREAK
 case 48:
 YY_RULE_SETUP
-#line 231 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 231 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { llvmAsmlval.PrimType = Type::FloatTy ; return FLOAT;  }
 	YY_BREAK
 case 49:
 YY_RULE_SETUP
-#line 232 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 232 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { llvmAsmlval.PrimType = Type::DoubleTy; return DOUBLE; }
 	YY_BREAK
 case 50:
 YY_RULE_SETUP
-#line 233 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 233 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { llvmAsmlval.PrimType = Type::LabelTy ; return LABEL;  }
 	YY_BREAK
 case 51:
 YY_RULE_SETUP
-#line 234 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 234 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { return TYPE;   }
 	YY_BREAK
 case 52:
 YY_RULE_SETUP
-#line 235 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 235 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { return OPAQUE; }
 	YY_BREAK
 case 53:
 YY_RULE_SETUP
-#line 237 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 237 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { RET_TOK(BinaryOpVal, Add, ADD); }
 	YY_BREAK
 case 54:
 YY_RULE_SETUP
-#line 238 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 238 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { RET_TOK(BinaryOpVal, Sub, SUB); }
 	YY_BREAK
 case 55:
 YY_RULE_SETUP
-#line 239 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 239 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { RET_TOK(BinaryOpVal, Mul, MUL); }
 	YY_BREAK
 case 56:
 YY_RULE_SETUP
-#line 240 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 240 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { RET_TOK(BinaryOpVal, Div, DIV); }
 	YY_BREAK
 case 57:
 YY_RULE_SETUP
-#line 241 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 241 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { RET_TOK(BinaryOpVal, Rem, REM); }
 	YY_BREAK
 case 58:
 YY_RULE_SETUP
-#line 242 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 242 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { RET_TOK(BinaryOpVal, And, AND); }
 	YY_BREAK
 case 59:
 YY_RULE_SETUP
-#line 243 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 243 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { RET_TOK(BinaryOpVal, Or , OR ); }
 	YY_BREAK
 case 60:
 YY_RULE_SETUP
-#line 244 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 244 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { RET_TOK(BinaryOpVal, Xor, XOR); }
 	YY_BREAK
 case 61:
 YY_RULE_SETUP
-#line 245 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 245 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { RET_TOK(BinaryOpVal, SetNE, SETNE); }
 	YY_BREAK
 case 62:
 YY_RULE_SETUP
-#line 246 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 246 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { RET_TOK(BinaryOpVal, SetEQ, SETEQ); }
 	YY_BREAK
 case 63:
 YY_RULE_SETUP
-#line 247 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 247 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { RET_TOK(BinaryOpVal, SetLT, SETLT); }
 	YY_BREAK
 case 64:
 YY_RULE_SETUP
-#line 248 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 248 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { RET_TOK(BinaryOpVal, SetGT, SETGT); }
 	YY_BREAK
 case 65:
 YY_RULE_SETUP
-#line 249 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 249 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { RET_TOK(BinaryOpVal, SetLE, SETLE); }
 	YY_BREAK
 case 66:
 YY_RULE_SETUP
-#line 250 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 250 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { RET_TOK(BinaryOpVal, SetGE, SETGE); }
 	YY_BREAK
 case 67:
 YY_RULE_SETUP
-#line 252 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 252 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { RET_TOK(OtherOpVal, PHI, PHI_TOK); }
 	YY_BREAK
 case 68:
 YY_RULE_SETUP
-#line 253 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 253 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { RET_TOK(OtherOpVal, Call, CALL); }
 	YY_BREAK
 case 69:
 YY_RULE_SETUP
-#line 254 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 254 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { RET_TOK(OtherOpVal, Cast, CAST); }
 	YY_BREAK
 case 70:
 YY_RULE_SETUP
-#line 255 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 255 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { RET_TOK(OtherOpVal, Select, SELECT); }
 	YY_BREAK
 case 71:
 YY_RULE_SETUP
-#line 256 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 256 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { RET_TOK(OtherOpVal, Shl, SHL); }
 	YY_BREAK
 case 72:
 YY_RULE_SETUP
-#line 257 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 257 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { RET_TOK(OtherOpVal, Shr, SHR); }
 	YY_BREAK
 case 73:
 YY_RULE_SETUP
-#line 258 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 258 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { return VANEXT_old; }
 	YY_BREAK
 case 74:
 YY_RULE_SETUP
-#line 259 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 259 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { return VAARG_old; }
 	YY_BREAK
 case 75:
 YY_RULE_SETUP
-#line 260 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 260 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { RET_TOK(OtherOpVal, VAArg , VAARG); }
 	YY_BREAK
 case 76:
 YY_RULE_SETUP
-#line 261 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 261 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { RET_TOK(TermOpVal, Ret, RET); }
 	YY_BREAK
 case 77:
 YY_RULE_SETUP
-#line 262 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 262 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { RET_TOK(TermOpVal, Br, BR); }
 	YY_BREAK
 case 78:
 YY_RULE_SETUP
-#line 263 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 263 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { RET_TOK(TermOpVal, Switch, SWITCH); }
 	YY_BREAK
 case 79:
 YY_RULE_SETUP
-#line 264 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 264 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { RET_TOK(TermOpVal, Invoke, INVOKE); }
 	YY_BREAK
 case 80:
 YY_RULE_SETUP
-#line 265 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 265 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { RET_TOK(TermOpVal, Unwind, UNWIND); }
 	YY_BREAK
 case 81:
 YY_RULE_SETUP
-#line 266 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 266 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { RET_TOK(TermOpVal, Unreachable, UNREACHABLE); }
 	YY_BREAK
 case 82:
 YY_RULE_SETUP
-#line 268 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 268 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { RET_TOK(MemOpVal, Malloc, MALLOC); }
 	YY_BREAK
 case 83:
 YY_RULE_SETUP
-#line 269 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 269 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { RET_TOK(MemOpVal, Alloca, ALLOCA); }
 	YY_BREAK
 case 84:
 YY_RULE_SETUP
-#line 270 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 270 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { RET_TOK(MemOpVal, Free, FREE); }
 	YY_BREAK
 case 85:
 YY_RULE_SETUP
-#line 271 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 271 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { RET_TOK(MemOpVal, Load, LOAD); }
 	YY_BREAK
 case 86:
 YY_RULE_SETUP
-#line 272 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 272 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { RET_TOK(MemOpVal, Store, STORE); }
 	YY_BREAK
 case 87:
 YY_RULE_SETUP
-#line 273 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 273 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { RET_TOK(MemOpVal, GetElementPtr, GETELEMENTPTR); }
 	YY_BREAK
 case 88:
+YY_RULE_SETUP
+#line 275 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+{ RET_TOK(OtherOpVal, ExtractElement, EXTRACTELEMENT); }
+	YY_BREAK
+case 89:
 YY_RULE_SETUP
-#line 276 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 278 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 {
                   UnEscapeLexed(yytext+1);
                   llvmAsmlval.StrVal = strdup(yytext+1);             // Skip %
                   return VAR_ID;
                 }
 	YY_BREAK
-case 89:
+case 90:
 YY_RULE_SETUP
-#line 281 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 283 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 {
                   yytext[strlen(yytext)-1] = 0;  // nuke colon
                   UnEscapeLexed(yytext);
@@ -1581,9 +1593,9 @@
                   return LABELSTR;
                 }
 	YY_BREAK
-case 90:
+case 91:
 YY_RULE_SETUP
-#line 287 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 289 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 {
                   yytext[strlen(yytext)-2] = 0;  // nuke colon, end quote
                   UnEscapeLexed(yytext+1);
@@ -1591,9 +1603,9 @@
                   return LABELSTR;
                 }
 	YY_BREAK
-case 91:
+case 92:
 YY_RULE_SETUP
-#line 294 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 296 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { // Note that we cannot unescape a string constant here!  The
                    // string constant might contain a \00 which would not be
                    // understood by the string stuff.  It is valid to make a
@@ -1604,14 +1616,14 @@
                    return STRINGCONSTANT;
                  }
 	YY_BREAK
-case 92:
+case 93:
 YY_RULE_SETUP
-#line 305 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 307 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { llvmAsmlval.UInt64Val = atoull(yytext); return EUINT64VAL; }
 	YY_BREAK
-case 93:
+case 94:
 YY_RULE_SETUP
-#line 306 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 308 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 {
                   uint64_t Val = atoull(yytext+1);
                   // +1:  we have bigger negative range
@@ -1621,17 +1633,17 @@
                   return ESINT64VAL;
                 }
 	YY_BREAK
-case 94:
+case 95:
 YY_RULE_SETUP
-#line 314 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 316 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 {
                    llvmAsmlval.UInt64Val = HexIntToVal(yytext+3);
                    return yytext[0] == 's' ? ESINT64VAL : EUINT64VAL;
                  }
 	YY_BREAK
-case 95:
+case 96:
 YY_RULE_SETUP
-#line 319 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 321 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 {
                   uint64_t Val = atoull(yytext+1);
                   if ((unsigned)Val != Val)
@@ -1640,9 +1652,9 @@
                   return UINTVAL;
                 }
 	YY_BREAK
-case 96:
+case 97:
 YY_RULE_SETUP
-#line 326 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 328 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 {
                   uint64_t Val = atoull(yytext+2);
                   // +1:  we have bigger negative range
@@ -1652,18 +1664,18 @@
                   return SINTVAL;
                 }
 	YY_BREAK
-case 97:
+case 98:
 YY_RULE_SETUP
-#line 335 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 337 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { llvmAsmlval.FPVal = atof(yytext); return FPVAL; }
 	YY_BREAK
-case 98:
+case 99:
 YY_RULE_SETUP
-#line 336 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 338 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { llvmAsmlval.FPVal = HexToFP(yytext); return FPVAL; }
 	YY_BREAK
 case YY_STATE_EOF(INITIAL):
-#line 338 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 340 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 {
                   /* Make sure to free the internal buffers for flex when we are
                    * done reading our input!
@@ -1672,22 +1684,22 @@
                   return EOF;
                 }
 	YY_BREAK
-case 99:
+case 100:
 YY_RULE_SETUP
-#line 346 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 348 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { /* Ignore whitespace */ }
 	YY_BREAK
-case 100:
+case 101:
 YY_RULE_SETUP
-#line 347 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 349 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 { return yytext[0]; }
 	YY_BREAK
-case 101:
+case 102:
 YY_RULE_SETUP
-#line 349 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 351 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 YY_FATAL_ERROR( "flex scanner jammed" );
 	YY_BREAK
-#line 1691 "Lexer.cpp"
+#line 1703 "Lexer.cpp"
 
 	case YY_END_OF_BUFFER:
 		{
@@ -1974,7 +1986,7 @@
 		while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state )
 			{
 			yy_current_state = (int) yy_def[yy_current_state];
-			if ( yy_current_state >= 405 )
+			if ( yy_current_state >= 416 )
 				yy_c = yy_meta[(unsigned int) yy_c];
 			}
 		yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c];
@@ -2004,11 +2016,11 @@
 	while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state )
 		{
 		yy_current_state = (int) yy_def[yy_current_state];
-		if ( yy_current_state >= 405 )
+		if ( yy_current_state >= 416 )
 			yy_c = yy_meta[(unsigned int) yy_c];
 		}
 	yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c];
-	yy_is_jam = (yy_current_state == 404);
+	yy_is_jam = (yy_current_state == 415);
 	if ( ! yy_is_jam )
 		*yy_state_ptr++ = yy_current_state;
 
@@ -2569,5 +2581,5 @@
 	return 0;
 	}
 #endif
-#line 349 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l"
+#line 351 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
 


Index: llvm/lib/AsmParser/Lexer.l
diff -u llvm/lib/AsmParser/Lexer.l:1.66 llvm/lib/AsmParser/Lexer.l:1.67
--- llvm/lib/AsmParser/Lexer.l:1.66	Fri Nov 11 18:11:30 2005
+++ llvm/lib/AsmParser/Lexer.l	Tue Jan 10 13:04:31 2006
@@ -272,6 +272,8 @@
 store           { RET_TOK(MemOpVal, Store, STORE); }
 getelementptr   { RET_TOK(MemOpVal, GetElementPtr, GETELEMENTPTR); }
 
+extractelement  { RET_TOK(OtherOpVal, ExtractElement, EXTRACTELEMENT); }
+
 
 {VarID}         {
                   UnEscapeLexed(yytext+1);


Index: llvm/lib/AsmParser/llvmAsmParser.cpp
diff -u llvm/lib/AsmParser/llvmAsmParser.cpp:1.27 llvm/lib/AsmParser/llvmAsmParser.cpp:1.28
--- llvm/lib/AsmParser/llvmAsmParser.cpp:1.27	Wed Dec 21 12:31:50 2005
+++ llvm/lib/AsmParser/llvmAsmParser.cpp	Tue Jan 10 13:04:31 2006
@@ -1,5 +1,5 @@
 
-/*  A Bison parser, made from /Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y
+/*  A Bison parser, made from /Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y
     by GNU Bison version 1.28  */
 
 #define YYBISON 1  /* Identify Bison output.  */
@@ -102,10 +102,11 @@
 #define	SHL	345
 #define	SHR	346
 #define	VAARG	347
-#define	VAARG_old	348
-#define	VANEXT_old	349
+#define	EXTRACTELEMENT	348
+#define	VAARG_old	349
+#define	VANEXT_old	350
 
-#line 14 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 14 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 
 #include "ParserInternals.h"
 #include "llvm/CallingConv.h"
@@ -964,7 +965,7 @@
 }
 
 
-#line 873 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 873 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 typedef union {
   llvm::Module                           *ModuleVal;
   llvm::Function                         *FunctionVal;
@@ -1014,26 +1015,26 @@
 
 
 
-#define	YYFINAL		444
+#define	YYFINAL		454
 #define	YYFLAG		-32768
-#define	YYNTBASE	110
+#define	YYNTBASE	111
 
-#define YYTRANSLATE(x) ((unsigned)(x) <= 349 ? yytranslate[x] : 179)
+#define YYTRANSLATE(x) ((unsigned)(x) <= 350 ? yytranslate[x] : 180)
 
 static const char yytranslate[] = {     0,
      2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
      2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
      2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
-     2,     2,     2,     2,     2,     2,     2,     2,     2,    99,
-   100,   108,     2,    97,     2,     2,     2,     2,     2,     2,
-     2,     2,     2,     2,     2,     2,     2,     2,     2,   104,
-    96,   105,     2,     2,     2,     2,     2,     2,     2,     2,
+     2,     2,     2,     2,     2,     2,     2,     2,     2,   100,
+   101,   109,     2,    98,     2,     2,     2,     2,     2,     2,
+     2,     2,     2,     2,     2,     2,     2,     2,     2,   105,
+    97,   106,     2,     2,     2,     2,     2,     2,     2,     2,
      2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
      2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
-   101,    98,   103,     2,     2,     2,     2,     2,   109,     2,
+   102,    99,   104,     2,     2,     2,     2,     2,   110,     2,
      2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
-     2,     2,     2,     2,     2,     2,     2,     2,     2,   102,
-     2,     2,   106,     2,   107,     2,     2,     2,     2,     2,
+     2,     2,     2,     2,     2,     2,     2,     2,     2,   103,
+     2,     2,   107,     2,   108,     2,     2,     2,     2,     2,
      2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
      2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
      2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
@@ -1055,7 +1056,7 @@
     57,    58,    59,    60,    61,    62,    63,    64,    65,    66,
     67,    68,    69,    70,    71,    72,    73,    74,    75,    76,
     77,    78,    79,    80,    81,    82,    83,    84,    85,    86,
-    87,    88,    89,    90,    91,    92,    93,    94,    95
+    87,    88,    89,    90,    91,    92,    93,    94,    95,    96
 };
 
 #if YYDEBUG != 0
@@ -1071,18 +1072,18 @@
    174,   178,   181,   184,   186,   190,   192,   196,   198,   199,
    204,   208,   212,   217,   222,   226,   229,   232,   235,   238,
    241,   244,   247,   250,   253,   256,   263,   269,   278,   285,
-   292,   299,   306,   310,   312,   314,   316,   318,   321,   324,
-   327,   329,   334,   337,   338,   346,   347,   355,   359,   364,
-   365,   367,   369,   373,   377,   381,   385,   389,   391,   392,
-   394,   396,   398,   399,   402,   406,   408,   410,   414,   416,
-   417,   426,   428,   430,   434,   436,   438,   441,   442,   446,
-   448,   450,   452,   454,   456,   458,   460,   462,   466,   468,
-   470,   472,   474,   476,   479,   482,   485,   489,   492,   493,
-   495,   498,   501,   505,   515,   525,   534,   548,   550,   552,
-   559,   565,   568,   575,   583,   585,   589,   591,   592,   595,
-   597,   603,   609,   615,   618,   623,   628,   635,   640,   645,
-   650,   653,   661,   663,   666,   667,   669,   670,   674,   681,
-   685,   692,   695,   700,   707
+   292,   299,   306,   313,   317,   319,   321,   323,   325,   328,
+   331,   334,   336,   341,   344,   345,   353,   354,   362,   366,
+   371,   372,   374,   376,   380,   384,   388,   392,   396,   398,
+   399,   401,   403,   405,   406,   409,   413,   415,   417,   421,
+   423,   424,   433,   435,   437,   441,   443,   445,   448,   449,
+   453,   455,   457,   459,   461,   463,   465,   467,   469,   473,
+   475,   477,   479,   481,   483,   486,   489,   492,   496,   499,
+   500,   502,   505,   508,   512,   522,   532,   541,   555,   557,
+   559,   566,   572,   575,   582,   590,   592,   596,   598,   599,
+   602,   604,   610,   616,   622,   625,   630,   635,   642,   647,
+   652,   657,   662,   665,   673,   675,   678,   679,   681,   682,
+   686,   693,   697,   704,   707,   712,   719
 };
 
 static const short yyrhs[] = {     5,
@@ -1091,73 +1092,74 @@
      0,    75,     0,    76,     0,    77,     0,    78,     0,    79,
      0,    80,     0,    81,     0,    91,     0,    92,     0,    16,
      0,    14,     0,    12,     0,    10,     0,    17,     0,    15,
-     0,    13,     0,    11,     0,   116,     0,   117,     0,    18,
-     0,    19,     0,   149,    96,     0,     0,    41,     0,    42,
+     0,    13,     0,    11,     0,   117,     0,   118,     0,    18,
+     0,    19,     0,   150,    97,     0,     0,    41,     0,    42,
      0,    43,     0,    44,     0,     0,     0,    59,     0,    60,
      0,    61,     0,    58,     4,     0,     0,    54,     4,     0,
-     0,    97,    54,     4,     0,    34,    24,     0,     0,   125,
-     0,     0,    97,   128,   127,     0,   125,     0,    54,     4,
-     0,   131,     0,     8,     0,   133,     0,     8,     0,   133,
+     0,    98,    54,     4,     0,    34,    24,     0,     0,   126,
+     0,     0,    98,   129,   128,     0,   126,     0,    54,     4,
+     0,   132,     0,     8,     0,   134,     0,     8,     0,   134,
      0,     9,     0,    10,     0,    11,     0,    12,     0,    13,
      0,    14,     0,    15,     0,    16,     0,    17,     0,    18,
-     0,    19,     0,    20,     0,    21,     0,    45,     0,   132,
-     0,   162,     0,    98,     4,     0,   130,    99,   135,   100,
-     0,   101,     4,   102,   133,   103,     0,   104,     4,   102,
-   133,   105,     0,   106,   134,   107,     0,   106,   107,     0,
-   133,   108,     0,   133,     0,   134,    97,   133,     0,   134,
-     0,   134,    97,    37,     0,    37,     0,     0,   131,   101,
-   138,   103,     0,   131,   101,   103,     0,   131,   109,    24,
-     0,   131,   104,   138,   105,     0,   131,   106,   138,   107,
-     0,   131,   106,   107,     0,   131,    38,     0,   131,    39,
-     0,   131,   162,     0,   131,   137,     0,   131,    26,     0,
-   116,   111,     0,   117,     4,     0,     9,    27,     0,     9,
-    28,     0,   119,     7,     0,    89,    99,   136,    36,   131,
-   100,     0,    87,    99,   136,   176,   100,     0,    90,    99,
-   136,    97,   136,    97,   136,   100,     0,   112,    99,   136,
-    97,   136,   100,     0,   113,    99,   136,    97,   136,   100,
-     0,   114,    99,   136,    97,   136,   100,     0,   115,    99,
-   136,    97,   136,   100,     0,   138,    97,   136,     0,   136,
-     0,    32,     0,    33,     0,   141,     0,   141,   158,     0,
-   141,   159,     0,   141,    25,     0,   142,     0,   142,   120,
-    20,   129,     0,   142,   159,     0,     0,   142,   120,   121,
-   139,   136,   143,   127,     0,     0,   142,   120,    47,   139,
-   131,   144,   127,     0,   142,    48,   146,     0,   142,    55,
-    96,   147,     0,     0,    53,     0,    52,     0,    50,    96,
-   145,     0,    51,    96,     4,     0,    49,    96,    24,     0,
-   101,   148,   103,     0,   148,    97,    24,     0,    24,     0,
-     0,    22,     0,    24,     0,   149,     0,     0,   131,   150,
-     0,   152,    97,   151,     0,   151,     0,   152,     0,   152,
-    97,    37,     0,    37,     0,     0,   122,   129,   149,    99,
-   153,   100,   126,   123,     0,    29,     0,   106,     0,   121,
-   154,   155,     0,    30,     0,   107,     0,   165,   157,     0,
-     0,    31,   160,   154,     0,     3,     0,     4,     0,     7,
-     0,    27,     0,    28,     0,    38,     0,    39,     0,    26,
-     0,   104,   138,   105,     0,   137,     0,   110,     0,   149,
-     0,   162,     0,   161,     0,   131,   163,     0,   165,   166,
-     0,   156,   166,     0,   167,   120,   168,     0,   167,   170,
-     0,     0,    23,     0,    62,   164,     0,    62,     8,     0,
-    63,    21,   163,     0,    63,     9,   163,    97,    21,   163,
-    97,    21,   163,     0,    64,   118,   163,    97,    21,   163,
-   101,   169,   103,     0,    64,   118,   163,    97,    21,   163,
-   101,   103,     0,    65,   122,   129,   163,    99,   173,   100,
-    36,    21,   163,    66,    21,   163,     0,    66,     0,    67,
-     0,   169,   118,   161,    97,    21,   163,     0,   118,   161,
-    97,    21,   163,     0,   120,   175,     0,   131,   101,   163,
-    97,   163,   103,     0,   171,    97,   101,   163,    97,   163,
-   103,     0,   164,     0,   172,    97,   164,     0,   172,     0,
-     0,    57,    56,     0,    56,     0,   112,   131,   163,    97,
-   163,     0,   113,   131,   163,    97,   163,     0,   114,   131,
-   163,    97,   163,     0,    46,   164,     0,   115,   164,    97,
-   164,     0,    89,   164,    36,   131,     0,    90,   164,    97,
-   164,    97,   164,     0,    93,   164,    97,   131,     0,    94,
-   164,    97,   131,     0,    95,   164,    97,   131,     0,    88,
-   171,     0,   174,   122,   129,   163,    99,   173,   100,     0,
-   178,     0,    97,   172,     0,     0,    35,     0,     0,    82,
-   131,   124,     0,    82,   131,    97,    15,   163,   124,     0,
-    83,   131,   124,     0,    83,   131,    97,    15,   163,   124,
-     0,    84,   164,     0,   177,    85,   131,   163,     0,   177,
-    86,   164,    97,   131,   163,     0,    87,   131,   163,   176,
-     0
+     0,    19,     0,    20,     0,    21,     0,    45,     0,   133,
+     0,   163,     0,    99,     4,     0,   131,   100,   136,   101,
+     0,   102,     4,   103,   134,   104,     0,   105,     4,   103,
+   134,   106,     0,   107,   135,   108,     0,   107,   108,     0,
+   134,   109,     0,   134,     0,   135,    98,   134,     0,   135,
+     0,   135,    98,    37,     0,    37,     0,     0,   132,   102,
+   139,   104,     0,   132,   102,   104,     0,   132,   110,    24,
+     0,   132,   105,   139,   106,     0,   132,   107,   139,   108,
+     0,   132,   107,   108,     0,   132,    38,     0,   132,    39,
+     0,   132,   163,     0,   132,   138,     0,   132,    26,     0,
+   117,   112,     0,   118,     4,     0,     9,    27,     0,     9,
+    28,     0,   120,     7,     0,    89,   100,   137,    36,   132,
+   101,     0,    87,   100,   137,   177,   101,     0,    90,   100,
+   137,    98,   137,    98,   137,   101,     0,   113,   100,   137,
+    98,   137,   101,     0,   114,   100,   137,    98,   137,   101,
+     0,   115,   100,   137,    98,   137,   101,     0,   116,   100,
+   137,    98,   137,   101,     0,    94,   100,   137,    98,   137,
+   101,     0,   139,    98,   137,     0,   137,     0,    32,     0,
+    33,     0,   142,     0,   142,   159,     0,   142,   160,     0,
+   142,    25,     0,   143,     0,   143,   121,    20,   130,     0,
+   143,   160,     0,     0,   143,   121,   122,   140,   137,   144,
+   128,     0,     0,   143,   121,    47,   140,   132,   145,   128,
+     0,   143,    48,   147,     0,   143,    55,    97,   148,     0,
+     0,    53,     0,    52,     0,    50,    97,   146,     0,    51,
+    97,     4,     0,    49,    97,    24,     0,   102,   149,   104,
+     0,   149,    98,    24,     0,    24,     0,     0,    22,     0,
+    24,     0,   150,     0,     0,   132,   151,     0,   153,    98,
+   152,     0,   152,     0,   153,     0,   153,    98,    37,     0,
+    37,     0,     0,   123,   130,   150,   100,   154,   101,   127,
+   124,     0,    29,     0,   107,     0,   122,   155,   156,     0,
+    30,     0,   108,     0,   166,   158,     0,     0,    31,   161,
+   155,     0,     3,     0,     4,     0,     7,     0,    27,     0,
+    28,     0,    38,     0,    39,     0,    26,     0,   105,   139,
+   106,     0,   138,     0,   111,     0,   150,     0,   163,     0,
+   162,     0,   132,   164,     0,   166,   167,     0,   157,   167,
+     0,   168,   121,   169,     0,   168,   171,     0,     0,    23,
+     0,    62,   165,     0,    62,     8,     0,    63,    21,   164,
+     0,    63,     9,   164,    98,    21,   164,    98,    21,   164,
+     0,    64,   119,   164,    98,    21,   164,   102,   170,   104,
+     0,    64,   119,   164,    98,    21,   164,   102,   104,     0,
+    65,   123,   130,   164,   100,   174,   101,    36,    21,   164,
+    66,    21,   164,     0,    66,     0,    67,     0,   170,   119,
+   162,    98,    21,   164,     0,   119,   162,    98,    21,   164,
+     0,   121,   176,     0,   132,   102,   164,    98,   164,   104,
+     0,   172,    98,   102,   164,    98,   164,   104,     0,   165,
+     0,   173,    98,   165,     0,   173,     0,     0,    57,    56,
+     0,    56,     0,   113,   132,   164,    98,   164,     0,   114,
+   132,   164,    98,   164,     0,   115,   132,   164,    98,   164,
+     0,    46,   165,     0,   116,   165,    98,   165,     0,    89,
+   165,    36,   132,     0,    90,   165,    98,   165,    98,   165,
+     0,    93,   165,    98,   132,     0,    95,   165,    98,   132,
+     0,    96,   165,    98,   132,     0,    94,   165,    98,   165,
+     0,    88,   172,     0,   175,   123,   130,   164,   100,   174,
+   101,     0,   179,     0,    98,   173,     0,     0,    35,     0,
+     0,    82,   132,   125,     0,    82,   132,    98,    15,   164,
+   125,     0,    83,   132,   125,     0,    83,   132,    98,    15,
+   164,   125,     0,    84,   165,     0,   178,    85,   132,   164,
+     0,   178,    86,   165,    98,   132,   164,     0,    87,   132,
+   164,   177,     0
 };
 
 #endif
@@ -1175,18 +1177,18 @@
   1154,  1163,  1166,  1174,  1178,  1183,  1184,  1187,  1190,  1200,
   1225,  1238,  1266,  1291,  1311,  1323,  1332,  1336,  1395,  1401,
   1409,  1414,  1419,  1422,  1425,  1432,  1442,  1473,  1480,  1501,
-  1511,  1516,  1526,  1529,  1536,  1536,  1546,  1553,  1557,  1560,
-  1563,  1576,  1596,  1598,  1601,  1604,  1608,  1611,  1613,  1615,
-  1620,  1621,  1623,  1626,  1634,  1639,  1641,  1645,  1649,  1657,
-  1657,  1658,  1658,  1660,  1666,  1671,  1677,  1680,  1685,  1689,
-  1693,  1779,  1779,  1781,  1789,  1789,  1791,  1795,  1795,  1804,
-  1807,  1810,  1813,  1816,  1819,  1822,  1825,  1828,  1852,  1859,
-  1862,  1867,  1867,  1873,  1877,  1880,  1888,  1897,  1901,  1911,
-  1922,  1925,  1928,  1931,  1934,  1948,  1952,  2005,  2008,  2014,
-  2022,  2032,  2039,  2044,  2051,  2055,  2061,  2061,  2063,  2066,
-  2072,  2084,  2095,  2105,  2117,  2124,  2131,  2138,  2143,  2162,
-  2184,  2198,  2255,  2261,  2263,  2267,  2270,  2276,  2280,  2284,
-  2288,  2292,  2299,  2309,  2322
+  1511,  1516,  1523,  1533,  1536,  1543,  1543,  1553,  1560,  1564,
+  1567,  1570,  1583,  1603,  1605,  1608,  1611,  1615,  1618,  1620,
+  1622,  1627,  1628,  1630,  1633,  1641,  1646,  1648,  1652,  1656,
+  1664,  1664,  1665,  1665,  1667,  1673,  1678,  1684,  1687,  1692,
+  1696,  1700,  1786,  1786,  1788,  1796,  1796,  1798,  1802,  1802,
+  1811,  1814,  1817,  1820,  1823,  1826,  1829,  1832,  1835,  1859,
+  1866,  1869,  1874,  1874,  1880,  1884,  1887,  1895,  1904,  1908,
+  1918,  1929,  1932,  1935,  1938,  1941,  1955,  1959,  2012,  2015,
+  2021,  2029,  2039,  2046,  2051,  2058,  2062,  2068,  2068,  2070,
+  2073,  2079,  2091,  2102,  2112,  2124,  2131,  2138,  2145,  2150,
+  2169,  2191,  2199,  2213,  2270,  2276,  2278,  2282,  2285,  2291,
+  2295,  2299,  2303,  2307,  2314,  2324,  2337
 };
 #endif
 
@@ -1204,10 +1206,10 @@
 "RET","BR","SWITCH","INVOKE","UNWIND","UNREACHABLE","ADD","SUB","MUL","DIV",
 "REM","AND","OR","XOR","SETLE","SETGE","SETLT","SETGT","SETEQ","SETNE","MALLOC",
 "ALLOCA","FREE","LOAD","STORE","GETELEMENTPTR","PHI_TOK","CAST","SELECT","SHL",
-"SHR","VAARG","VAARG_old","VANEXT_old","'='","','","'\\\\'","'('","')'","'['",
-"'x'","']'","'<'","'>'","'{'","'}'","'*'","'c'","INTVAL","EINT64VAL","ArithmeticOps",
-"LogicalOps","SetCondOps","ShiftOps","SIntType","UIntType","IntType","FPType",
-"OptAssign","OptLinkage","OptCallingConv","OptAlign","OptCAlign","SectionString",
+"SHR","VAARG","EXTRACTELEMENT","VAARG_old","VANEXT_old","'='","','","'\\\\'",
+"'('","')'","'['","'x'","']'","'<'","'>'","'{'","'}'","'*'","'c'","INTVAL","EINT64VAL",
+"ArithmeticOps","LogicalOps","SetCondOps","ShiftOps","SIntType","UIntType","IntType",
+"FPType","OptAssign","OptLinkage","OptCallingConv","OptAlign","OptCAlign","SectionString",
 "OptSection","GlobalVarAttributes","GlobalVarAttribute","TypesV","UpRTypesV",
 "Types","PrimType","UpRTypes","TypeListI","ArgTypeListI","ConstVal","ConstExpr",
 "ConstVector","GlobalType","Module","FunctionList","ConstPool","@1","@2","BigOrLittle",
@@ -1221,29 +1223,29 @@
 #endif
 
 static const short yyr1[] = {     0,
-   110,   110,   111,   111,   112,   112,   112,   112,   112,   113,
-   113,   113,   114,   114,   114,   114,   114,   114,   115,   115,
-   116,   116,   116,   116,   117,   117,   117,   117,   118,   118,
-   119,   119,   120,   120,   121,   121,   121,   121,   121,   122,
-   122,   122,   122,   122,   123,   123,   124,   124,   125,   126,
-   126,   127,   127,   128,   128,   129,   129,   130,   130,   131,
-   132,   132,   132,   132,   132,   132,   132,   132,   132,   132,
-   132,   132,   132,   133,   133,   133,   133,   133,   133,   133,
-   133,   133,   133,   134,   134,   135,   135,   135,   135,   136,
-   136,   136,   136,   136,   136,   136,   136,   136,   136,   136,
-   136,   136,   136,   136,   136,   137,   137,   137,   137,   137,
-   137,   137,   138,   138,   139,   139,   140,   141,   141,   141,
-   141,   142,   142,   143,   142,   144,   142,   142,   142,   142,
-   145,   145,   146,   146,   146,   147,   148,   148,   148,   149,
-   149,   150,   150,   151,   152,   152,   153,   153,   153,   153,
-   154,   155,   155,   156,   157,   157,   158,   160,   159,   161,
-   161,   161,   161,   161,   161,   161,   161,   161,   161,   162,
-   162,   163,   163,   164,   165,   165,   166,   167,   167,   167,
-   168,   168,   168,   168,   168,   168,   168,   168,   168,   169,
-   169,   170,   171,   171,   172,   172,   173,   173,   174,   174,
-   175,   175,   175,   175,   175,   175,   175,   175,   175,   175,
-   175,   175,   175,   176,   176,   177,   177,   178,   178,   178,
-   178,   178,   178,   178,   178
+   111,   111,   112,   112,   113,   113,   113,   113,   113,   114,
+   114,   114,   115,   115,   115,   115,   115,   115,   116,   116,
+   117,   117,   117,   117,   118,   118,   118,   118,   119,   119,
+   120,   120,   121,   121,   122,   122,   122,   122,   122,   123,
+   123,   123,   123,   123,   124,   124,   125,   125,   126,   127,
+   127,   128,   128,   129,   129,   130,   130,   131,   131,   132,
+   133,   133,   133,   133,   133,   133,   133,   133,   133,   133,
+   133,   133,   133,   134,   134,   134,   134,   134,   134,   134,
+   134,   134,   134,   135,   135,   136,   136,   136,   136,   137,
+   137,   137,   137,   137,   137,   137,   137,   137,   137,   137,
+   137,   137,   137,   137,   137,   138,   138,   138,   138,   138,
+   138,   138,   138,   139,   139,   140,   140,   141,   142,   142,
+   142,   142,   143,   143,   144,   143,   145,   143,   143,   143,
+   143,   146,   146,   147,   147,   147,   148,   149,   149,   149,
+   150,   150,   151,   151,   152,   153,   153,   154,   154,   154,
+   154,   155,   156,   156,   157,   158,   158,   159,   161,   160,
+   162,   162,   162,   162,   162,   162,   162,   162,   162,   162,
+   163,   163,   164,   164,   165,   166,   166,   167,   168,   168,
+   168,   169,   169,   169,   169,   169,   169,   169,   169,   169,
+   170,   170,   171,   172,   172,   173,   173,   174,   174,   175,
+   175,   176,   176,   176,   176,   176,   176,   176,   176,   176,
+   176,   176,   176,   176,   176,   177,   177,   178,   178,   179,
+   179,   179,   179,   179,   179,   179,   179
 };
 
 static const short yyr2[] = {     0,
@@ -1258,390 +1260,394 @@
      3,     2,     2,     1,     3,     1,     3,     1,     0,     4,
      3,     3,     4,     4,     3,     2,     2,     2,     2,     2,
      2,     2,     2,     2,     2,     6,     5,     8,     6,     6,
-     6,     6,     3,     1,     1,     1,     1,     2,     2,     2,
-     1,     4,     2,     0,     7,     0,     7,     3,     4,     0,
-     1,     1,     3,     3,     3,     3,     3,     1,     0,     1,
-     1,     1,     0,     2,     3,     1,     1,     3,     1,     0,
-     8,     1,     1,     3,     1,     1,     2,     0,     3,     1,
-     1,     1,     1,     1,     1,     1,     1,     3,     1,     1,
-     1,     1,     1,     2,     2,     2,     3,     2,     0,     1,
-     2,     2,     3,     9,     9,     8,    13,     1,     1,     6,
-     5,     2,     6,     7,     1,     3,     1,     0,     2,     1,
-     5,     5,     5,     2,     4,     4,     6,     4,     4,     4,
-     2,     7,     1,     2,     0,     1,     0,     3,     6,     3,
-     6,     2,     4,     6,     4
+     6,     6,     6,     3,     1,     1,     1,     1,     2,     2,
+     2,     1,     4,     2,     0,     7,     0,     7,     3,     4,
+     0,     1,     1,     3,     3,     3,     3,     3,     1,     0,
+     1,     1,     1,     0,     2,     3,     1,     1,     3,     1,
+     0,     8,     1,     1,     3,     1,     1,     2,     0,     3,
+     1,     1,     1,     1,     1,     1,     1,     1,     3,     1,
+     1,     1,     1,     1,     2,     2,     2,     3,     2,     0,
+     1,     2,     2,     3,     9,     9,     8,    13,     1,     1,
+     6,     5,     2,     6,     7,     1,     3,     1,     0,     2,
+     1,     5,     5,     5,     2,     4,     4,     6,     4,     4,
+     4,     4,     2,     7,     1,     2,     0,     1,     0,     3,
+     6,     3,     6,     2,     4,     6,     4
 };
 
-static const short yydefact[] = {   130,
-    39,   121,   120,   158,    35,    36,    37,    38,    40,   179,
-   118,   119,   179,   140,   141,     0,     0,    39,     0,   123,
-    40,     0,    41,    42,    43,     0,     0,   180,   176,    34,
-   155,   156,   157,   175,     0,     0,     0,   128,     0,     0,
-     0,     0,    33,   159,    44,     1,     2,    57,    61,    62,
+static const short yydefact[] = {   131,
+    39,   122,   121,   159,    35,    36,    37,    38,    40,   180,
+   119,   120,   180,   141,   142,     0,     0,    39,     0,   124,
+    40,     0,    41,    42,    43,     0,     0,   181,   177,    34,
+   156,   157,   158,   176,     0,     0,     0,   129,     0,     0,
+     0,     0,    33,   160,    44,     1,     2,    57,    61,    62,
     63,    64,    65,    66,    67,    68,    69,    70,    71,    72,
-    73,    74,     0,     0,     0,     0,   170,     0,     0,    56,
-    75,    60,   171,    76,   152,   153,   154,   217,   178,     0,
-     0,     0,   139,   129,   122,   115,   116,     0,     0,    77,
-     0,     0,    59,    82,    84,     0,     0,    89,    83,   216,
-     0,   200,     0,     0,     0,     0,    40,   188,   189,     5,
+    73,    74,     0,     0,     0,     0,   171,     0,     0,    56,
+    75,    60,   172,    76,   153,   154,   155,   219,   179,     0,
+     0,     0,   140,   130,   123,   116,   117,     0,     0,    77,
+     0,     0,    59,    82,    84,     0,     0,    89,    83,   218,
+     0,   201,     0,     0,     0,     0,    40,   189,   190,     5,
      6,     7,     8,     9,    10,    11,    12,    13,    14,    15,
     16,    17,    18,     0,     0,     0,     0,     0,     0,     0,
-    19,    20,     0,     0,     0,     0,     0,     0,     0,   177,
-    40,   192,     0,   213,   135,   132,   131,   133,   134,   138,
-     0,   126,    61,    62,    63,    64,    65,    66,    67,    68,
-    69,    70,    71,     0,     0,     0,     0,   124,     0,     0,
-     0,    81,   150,    88,    86,     0,     0,   204,   199,   182,
-   181,     0,     0,    24,    28,    23,    27,    22,    26,    21,
-    25,    29,    30,     0,     0,    47,    47,   222,     0,     0,
-   211,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-     0,     0,     0,     0,   136,    52,   103,   104,     3,     4,
-   101,   102,   105,   100,    96,    97,     0,     0,     0,     0,
-     0,     0,     0,     0,     0,     0,     0,    99,    98,    52,
-    58,    58,    85,   149,   143,   146,   147,     0,     0,    78,
-   160,   161,   162,   167,   163,   164,   165,   166,     0,   169,
-   173,   172,   174,     0,   183,     0,     0,     0,   218,     0,
-   220,   215,     0,     0,     0,     0,     0,     0,     0,     0,
-     0,     0,     0,     0,     0,     0,   137,     0,   127,     0,
-     0,     0,    91,   114,     0,     0,    95,     0,    92,     0,
-     0,     0,     0,   125,    79,    80,   142,   144,     0,    50,
-    87,     0,     0,     0,     0,     0,     0,     0,     0,   225,
-     0,     0,   206,     0,   208,   209,   210,     0,     0,     0,
-   205,     0,   223,     0,     0,     0,    54,    52,   215,     0,
-     0,     0,    90,    93,    94,     0,     0,     0,     0,   148,
-   145,    51,    45,   168,     0,     0,   198,    47,    48,    47,
-   195,   214,     0,     0,     0,   201,   202,   203,   198,     0,
-    49,    55,    53,     0,     0,     0,   113,     0,     0,     0,
-     0,     0,   151,     0,     0,   197,     0,     0,   219,   221,
-     0,     0,     0,   207,     0,   224,   107,     0,     0,     0,
-     0,     0,     0,    46,     0,     0,     0,   196,   193,     0,
-   212,   106,     0,   109,   110,   111,   112,     0,   186,     0,
-     0,     0,   194,     0,   184,     0,   185,     0,     0,   108,
-     0,     0,     0,     0,     0,     0,   191,     0,     0,   190,
-   187,     0,     0,     0
+    19,    20,     0,     0,     0,     0,     0,     0,     0,     0,
+   178,    40,   193,     0,   215,   136,   133,   132,   134,   135,
+   139,     0,   127,    61,    62,    63,    64,    65,    66,    67,
+    68,    69,    70,    71,     0,     0,     0,     0,   125,     0,
+     0,     0,    81,   151,    88,    86,     0,     0,   205,   200,
+   183,   182,     0,     0,    24,    28,    23,    27,    22,    26,
+    21,    25,    29,    30,     0,     0,    47,    47,   224,     0,
+     0,   213,     0,     0,     0,     0,     0,     0,     0,     0,
+     0,     0,     0,     0,     0,     0,   137,    52,   103,   104,
+     3,     4,   101,   102,   105,   100,    96,    97,     0,     0,
+     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
+    99,    98,    52,    58,    58,    85,   150,   144,   147,   148,
+     0,     0,    78,   161,   162,   163,   168,   164,   165,   166,
+   167,     0,   170,   174,   173,   175,     0,   184,     0,     0,
+     0,   220,     0,   222,   217,     0,     0,     0,     0,     0,
+     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
+   138,     0,   128,     0,     0,     0,     0,    91,   115,     0,
+     0,    95,     0,    92,     0,     0,     0,     0,   126,    79,
+    80,   143,   145,     0,    50,    87,     0,     0,     0,     0,
+     0,     0,     0,     0,   227,     0,     0,   207,     0,   209,
+   212,   210,   211,     0,     0,     0,   206,     0,   225,     0,
+     0,     0,    54,    52,   217,     0,     0,     0,     0,    90,
+    93,    94,     0,     0,     0,     0,   149,   146,    51,    45,
+   169,     0,     0,   199,    47,    48,    47,   196,   216,     0,
+     0,     0,   202,   203,   204,   199,     0,    49,    55,    53,
+     0,     0,     0,     0,   114,     0,     0,     0,     0,     0,
+   152,     0,     0,   198,     0,     0,   221,   223,     0,     0,
+     0,   208,     0,   226,   107,     0,     0,     0,     0,     0,
+     0,     0,    46,     0,     0,     0,   197,   194,     0,   214,
+   106,     0,   113,   109,   110,   111,   112,     0,   187,     0,
+     0,     0,   195,     0,   185,     0,   186,     0,     0,   108,
+     0,     0,     0,     0,     0,     0,   192,     0,     0,   191,
+   188,     0,     0,     0
 };
 
 static const short yydefgoto[] = {    67,
-   221,   234,   235,   236,   237,   164,   165,   194,   166,    18,
-     9,    26,   383,   269,   337,   353,   289,   338,    68,    69,
-   167,    71,    72,    96,   176,   294,   260,   295,    88,   442,
-     1,     2,   240,   216,   148,    38,    84,   151,    73,   308,
-   246,   247,   248,    27,    77,    10,    33,    11,    12,    21,
-   261,    74,   263,   361,    13,    29,    30,   140,   421,    79,
-   201,   386,   387,   141,   142,   320,   143,   144
+   223,   237,   238,   239,   240,   165,   166,   195,   167,    18,
+     9,    26,   391,   272,   343,   360,   293,   344,    68,    69,
+   168,    71,    72,    96,   177,   299,   263,   300,    88,   452,
+     1,     2,   243,   218,   149,    38,    84,   152,    73,   313,
+   249,   250,   251,    27,    77,    10,    33,    11,    12,    21,
+   264,    74,   266,   368,    13,    29,    30,   141,   431,    79,
+   202,   394,   395,   142,   143,   325,   144,   145
 };
 
 static const short yypact[] = {-32768,
-    43,   304,-32768,-32768,-32768,-32768,-32768,-32768,    94,   -17,
--32768,-32768,   -11,-32768,-32768,    72,   -58,    47,   -35,-32768,
-    94,    66,-32768,-32768,-32768,   995,   -25,-32768,-32768,   111,
--32768,-32768,-32768,-32768,    -3,    10,    23,-32768,    35,   995,
-   112,   112,-32768,-32768,-32768,-32768,-32768,    42,-32768,-32768,
+    41,   181,-32768,-32768,-32768,-32768,-32768,-32768,    62,    12,
+-32768,-32768,   -14,-32768,-32768,   100,    -8,    49,     0,-32768,
+    62,    38,-32768,-32768,-32768,   979,   -19,-32768,-32768,   112,
+-32768,-32768,-32768,-32768,     8,    27,    68,-32768,    36,   979,
+   -13,   -13,-32768,-32768,-32768,-32768,-32768,    69,-32768,-32768,
 -32768,-32768,-32768,-32768,-32768,-32768,-32768,-32768,-32768,-32768,
--32768,-32768,   134,   142,   146,   512,-32768,   111,    58,-32768,
--32768,   -39,-32768,-32768,-32768,-32768,-32768,  1110,-32768,   139,
-    27,   163,   149,-32768,-32768,-32768,-32768,  1015,  1059,-32768,
-    79,    80,-32768,-32768,   -39,   -87,    85,   752,-32768,-32768,
-  1015,-32768,   133,  1117,    50,   115,    94,-32768,-32768,-32768,
+-32768,-32768,   169,   171,   173,   491,-32768,   112,    78,-32768,
+-32768,   -82,-32768,-32768,-32768,-32768,-32768,  1140,-32768,   156,
+    24,   177,   158,-32768,-32768,-32768,-32768,  1017,  1055,-32768,
+    81,    83,-32768,-32768,   -82,   -77,    90,   789,-32768,-32768,
+  1017,-32768,   136,  1093,     4,   116,    62,-32768,-32768,-32768,
 -32768,-32768,-32768,-32768,-32768,-32768,-32768,-32768,-32768,-32768,
--32768,-32768,-32768,  1015,  1015,  1015,  1015,  1015,  1015,  1015,
--32768,-32768,  1015,  1015,  1015,  1015,  1015,  1015,  1015,-32768,
-    94,-32768,    63,-32768,-32768,-32768,-32768,-32768,-32768,-32768,
-   -20,-32768,   132,   158,   184,   168,   187,   172,   188,   174,
-   189,   190,   191,   176,   195,   193,   410,-32768,  1015,  1015,
-  1015,-32768,   790,-32768,    97,    95,   576,-32768,-32768,    42,
--32768,   576,   576,-32768,-32768,-32768,-32768,-32768,-32768,-32768,
--32768,-32768,-32768,   576,   995,   104,   105,-32768,   576,   102,
-   107,   169,   113,   114,   116,   117,   576,   576,   576,   118,
-   995,  1015,  1015,   185,-32768,   125,-32768,-32768,-32768,-32768,
--32768,-32768,-32768,-32768,-32768,-32768,   124,   126,   127,   854,
-  1059,   532,   203,   129,   130,   135,   136,-32768,-32768,   125,
-   -69,   -13,   -39,-32768,   111,-32768,   141,   131,   892,-32768,
--32768,-32768,-32768,-32768,-32768,-32768,-32768,-32768,  1059,-32768,
--32768,-32768,-32768,   143,-32768,   147,   576,    -6,-32768,     3,
--32768,   151,   576,   138,  1015,  1015,  1015,  1015,  1015,   157,
-   159,   164,  1015,   576,   576,   165,-32768,   -19,-32768,  1059,
-  1059,  1059,-32768,-32768,    40,   -33,-32768,   -31,-32768,  1059,
-  1059,  1059,  1059,-32768,-32768,-32768,-32768,-32768,   957,   178,
--32768,   -32,   212,   215,   144,   576,   251,   576,  1015,-32768,
-   166,   576,-32768,   167,-32768,-32768,-32768,   576,   576,   576,
--32768,   161,-32768,  1015,   241,   262,-32768,   125,   151,   231,
-   171,  1059,-32768,-32768,-32768,   173,   177,   179,   180,-32768,
--32768,-32768,   217,-32768,   576,   576,  1015,   181,-32768,   181,
--32768,   183,   576,   192,  1015,-32768,-32768,-32768,  1015,   576,
--32768,-32768,-32768,   182,  1015,  1059,-32768,  1059,  1059,  1059,
-  1059,   265,-32768,   194,   198,   183,   200,   227,-32768,-32768,
-  1015,   201,   576,-32768,   206,-32768,-32768,   207,   213,   209,
-   214,   218,   219,-32768,   263,    11,   252,-32768,-32768,   222,
--32768,-32768,  1059,-32768,-32768,-32768,-32768,   576,-32768,   655,
-    39,   269,-32768,   221,-32768,   233,-32768,   655,   576,-32768,
-   282,   235,   249,   576,   312,   313,-32768,   576,   576,-32768,
--32768,   338,   340,-32768
+-32768,-32768,-32768,  1017,  1017,  1017,  1017,  1017,  1017,  1017,
+-32768,-32768,  1017,  1017,  1017,  1017,  1017,  1017,  1017,  1017,
+-32768,    62,-32768,    59,-32768,-32768,-32768,-32768,-32768,-32768,
+-32768,   -24,-32768,   126,   152,   189,   155,   190,   157,   191,
+   160,   192,   193,   195,   168,   194,   197,   360,-32768,  1017,
+  1017,  1017,-32768,   827,-32768,   101,   105,   610,-32768,-32768,
+    69,-32768,   610,   610,-32768,-32768,-32768,-32768,-32768,-32768,
+-32768,-32768,-32768,-32768,   610,   979,   113,   117,-32768,   610,
+   114,   119,   196,   128,   132,   133,   137,   139,   610,   610,
+   610,   140,   979,  1017,  1017,   210,-32768,   141,-32768,-32768,
+-32768,-32768,-32768,-32768,-32768,-32768,-32768,-32768,   142,   143,
+   144,   147,   865,  1055,   567,   216,   148,   149,   151,   159,
+-32768,-32768,   141,    33,    37,   -82,-32768,   112,-32768,   162,
+   163,   903,-32768,-32768,-32768,-32768,-32768,-32768,-32768,-32768,
+-32768,  1055,-32768,-32768,-32768,-32768,   165,-32768,   167,   610,
+     7,-32768,     9,-32768,   170,   610,   164,  1017,  1017,  1017,
+  1017,  1017,  1017,   172,   174,   175,  1017,   610,   610,   176,
+-32768,    52,-32768,  1055,  1055,  1055,  1055,-32768,-32768,   -17,
+   -83,-32768,   -72,-32768,  1055,  1055,  1055,  1055,-32768,-32768,
+-32768,-32768,-32768,   941,   207,-32768,   -33,   237,   246,   179,
+   610,   265,   610,  1017,-32768,   183,   610,-32768,   184,-32768,
+-32768,-32768,-32768,   610,   610,   610,-32768,   185,-32768,  1017,
+   247,   271,-32768,   141,   170,   241,   188,   208,  1055,-32768,
+-32768,-32768,   209,   211,   213,   215,-32768,-32768,-32768,   229,
+-32768,   610,   610,  1017,   217,-32768,   217,-32768,   219,   610,
+   220,  1017,-32768,-32768,-32768,  1017,   610,-32768,-32768,-32768,
+   186,  1017,  1055,  1055,-32768,  1055,  1055,  1055,  1055,   285,
+-32768,   224,   206,   219,   222,   236,-32768,-32768,  1017,   221,
+   610,-32768,   223,-32768,-32768,   228,   235,   238,   239,   240,
+   242,   243,-32768,   273,    35,   259,-32768,-32768,   232,-32768,
+-32768,  1055,-32768,-32768,-32768,-32768,-32768,   610,-32768,   691,
+    43,   316,-32768,   244,-32768,   249,-32768,   691,   610,-32768,
+   321,   250,   283,   610,   330,   331,-32768,   610,   610,-32768,
+-32768,   353,   354,-32768
 };
 
 static const short yypgoto[] = {-32768,
--32768,   264,   266,   275,   277,  -105,  -104,  -374,-32768,   311,
-   339,   -78,-32768,  -190,    48,-32768,  -223,-32768,   -37,-32768,
-   -26,-32768,   -53,   271,-32768,   -84,   196,  -201,   319,-32768,
--32768,-32768,-32768,-32768,-32768,-32768,-32768,-32768,    14,-32768,
-    53,-32768,-32768,   343,-32768,-32768,-32768,-32768,   368,-32768,
-  -323,   -43,    38,   -93,-32768,   358,-32768,-32768,-32768,-32768,
--32768,    54,     5,-32768,-32768,    33,-32768,-32768
+-32768,   277,   279,   281,   282,  -105,  -103,  -403,-32768,   332,
+   343,   -78,-32768,  -191,    48,-32768,  -226,-32768,   -34,-32768,
+   -26,-32768,   -55,   266,-32768,   -87,   199,  -167,   326,-32768,
+-32768,-32768,-32768,-32768,-32768,-32768,-32768,-32768,     2,-32768,
+    55,-32768,-32768,   349,-32768,-32768,-32768,-32768,   369,-32768,
+  -359,   -43,   121,   -96,-32768,   359,-32768,-32768,-32768,-32768,
+-32768,    50,    -1,-32768,-32768,    31,-32768,-32768
 };
 
 
-#define	YYLAST		1223
+#define	YYLAST		1236
 
 
 static const short yytable[] = {    70,
-   192,   193,    85,    75,   168,    28,   271,   178,   316,   171,
-   181,    28,    95,    70,   335,    19,   304,   318,    31,   172,
-   184,   185,   186,   187,   188,   189,   190,   191,   195,   296,
-   298,   420,   198,   305,   336,   202,   203,    39,    99,   204,
-   205,   206,  -117,    19,    95,   210,   428,   317,   184,   185,
-   186,   187,   188,   189,   190,   191,   317,   312,   182,   -58,
-    43,   152,   211,   342,   342,   342,    40,     3,    99,    45,
-   183,   344,   354,     4,   177,   345,   214,   177,   146,   147,
-    76,    97,   215,     5,     6,     7,     8,     5,     6,     7,
-     8,   306,    80,    41,    99,    32,   426,   196,   197,   177,
-   199,   200,   177,   177,   432,    81,   177,   177,   177,   207,
-   208,   209,   177,   419,   373,   241,   242,   243,    82,   286,
-    35,    36,    37,   239,   184,   185,   186,   187,   188,   189,
-   190,   191,    14,   262,    15,    83,   342,    90,   262,   262,
-   -59,   427,   343,    86,    87,    91,   245,   212,   213,    92,
-   262,    22,    23,    24,    25,   262,    98,   267,   217,   218,
-   -24,   -24,   145,   262,   262,   262,   149,   389,    70,   390,
-   -23,   -23,   150,   284,   -22,   -22,   -21,   -21,   219,   220,
-   169,   170,   324,   173,    70,   285,   177,   -28,   179,   331,
-   -27,   -26,   -25,   249,   250,   243,   -31,   -32,   222,   223,
-   268,   270,   273,   274,   275,   339,   340,   341,   287,   276,
-   277,   335,   278,   279,   283,   346,   347,   348,   349,   264,
-   265,   288,   290,   262,   291,   292,   299,   300,   301,   262,
-   310,   266,   355,   302,   303,   356,   272,   309,   322,   313,
-   262,   262,   357,   314,   280,   281,   282,   319,   323,   177,
-   325,   326,   327,   328,   359,   329,   177,   377,   307,   369,
-   330,   334,   363,   365,   371,   372,   375,   376,   404,   378,
-   382,   394,   262,   379,   262,   380,   381,   388,   262,   391,
-   317,   397,   245,   418,   262,   262,   262,   422,   393,   429,
-   405,   399,   177,   400,   401,   402,   403,   408,   406,   407,
-   192,   193,   434,   409,   315,   411,   412,   370,   414,   413,
-   321,   262,   262,   415,   436,   192,   193,   416,   417,   262,
-   430,   332,   333,   -34,   423,    14,   262,    15,   424,   431,
-   177,   435,   438,   439,     4,   -34,   -34,   443,   177,   444,
-    78,   136,   177,   137,   -34,   -34,   -34,   -34,   398,   262,
-   -34,    16,   138,   358,   139,   360,    42,   352,    17,   364,
-    89,   351,   238,    44,   177,   366,   367,   368,   175,    20,
-    34,   374,   362,   395,   262,     0,     0,     0,     0,     0,
-     0,     0,     0,     0,     0,   262,     0,     0,     0,     0,
-   262,     0,   384,   385,   262,   262,     0,     0,     0,     0,
-   392,     0,     0,     0,     0,     0,     0,   396,     0,     0,
-     0,     0,     0,     0,    46,    47,     0,     0,     0,     0,
+   193,   169,   194,    19,   179,    85,   274,   182,    28,    75,
+    95,   430,   183,    70,   349,    31,   309,   -58,    86,    87,
+   172,   321,   351,   323,   184,   349,    99,   438,   196,   199,
+   173,    19,   203,   204,    28,   352,   205,   206,   207,   208,
+  -118,    45,    95,   212,   185,   186,   187,   188,   189,   190,
+   191,   192,   185,   186,   187,   188,   189,   190,   191,   192,
+   322,   153,   322,   213,   349,     3,   301,   303,    40,    97,
+   436,     4,   361,   216,   178,   147,   148,   178,   442,   217,
+   349,     5,     6,     7,     8,   341,   350,    76,    39,     5,
+     6,     7,     8,    32,   317,    41,    43,   197,   198,   178,
+   200,   201,   178,   178,    80,   342,   178,   178,   178,   178,
+   209,   210,   211,   178,   244,   245,   246,   380,   290,    22,
+    23,    24,    25,    81,   242,   185,   186,   187,   188,   189,
+   190,   191,   192,    14,   265,    15,   310,    83,   429,   265,
+   265,    99,   311,   214,   215,    99,   437,   248,    35,    36,
+    37,   265,   219,   220,   -24,   -24,   265,   -23,   -23,   -22,
+   -22,   270,   -21,   -21,    82,   265,   265,   265,   -59,    70,
+   221,   222,    90,   397,    91,   398,    92,    98,   288,   146,
+   150,   151,   329,   170,   331,   171,    70,   289,   178,   174,
+   337,   180,   -28,   -27,   -26,   -25,   246,   224,   252,   -31,
+   -34,   -32,    14,   225,    15,   253,   345,   346,   347,   348,
+   271,     4,   -34,   -34,   273,   276,   277,   353,   354,   355,
+   356,   -34,   -34,   -34,   -34,   279,   265,   -34,    16,   280,
+   281,   278,   265,   291,   282,    17,   283,   287,   292,   304,
+   341,   294,   295,   296,   265,   265,   297,   305,   306,   312,
+   307,   328,   178,   330,   178,   332,   333,   362,   308,   314,
+   178,   385,   318,   315,   319,   327,   363,   324,   366,   334,
+   378,   335,   336,   340,   379,   402,   382,   265,   364,   265,
+   370,   372,   390,   265,   376,   383,   405,   248,   413,   322,
+   265,   265,   265,   428,   432,   407,   408,   178,   409,   410,
+   411,   412,   417,   267,   268,   384,   386,   415,   387,   193,
+   388,   194,   389,   377,   396,   269,   399,   401,   265,   265,
+   275,   414,   416,   420,   418,   193,   265,   194,   421,   284,
+   285,   286,   422,   265,   434,   433,   439,   178,   423,   424,
+   425,   444,   426,   427,   440,   178,   441,   445,   446,   178,
+   448,   449,   453,   454,   137,   406,   138,   265,   139,   140,
+    42,    78,   359,   176,    46,    47,   241,    89,   358,    44,
+    20,    34,   178,   369,   403,   381,     0,     0,     0,     0,
+     0,    14,     0,    15,   265,   226,     0,     0,     0,     0,
+   320,     0,     0,     0,     0,   265,   326,   227,   228,     0,
+   265,     0,     0,     0,   265,   265,     0,     0,   338,   339,
      0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-   410,    14,     0,    15,     0,   224,     0,     0,     0,     0,
-     0,     0,     0,     0,     0,     0,     0,   225,   226,     0,
-     0,     0,     0,     0,     0,   425,     0,     0,     0,     0,
-     0,     0,     0,     0,     0,     0,   433,     0,     0,     0,
-     0,   437,     0,     0,     0,   440,   441,   110,   111,   112,
+     0,     0,     0,     0,     0,     0,     0,   110,   111,   112,
    113,   114,   115,   116,   117,   118,   119,   120,   121,   122,
-   123,     0,     0,     0,     0,     0,   227,     0,   228,   229,
-   131,   132,     0,     0,     0,     0,     0,     0,     0,     0,
-   230,     0,     0,   231,     0,   232,    46,    47,   233,    93,
-    49,    50,    51,    52,    53,    54,    55,    56,    57,    58,
-    59,    60,    61,    14,     0,    15,    46,    47,     0,    93,
-   153,   154,   155,   156,   157,   158,   159,   160,   161,   162,
-   163,    60,    61,    14,     0,    15,    62,     0,     0,     0,
+   123,   365,     0,   367,     0,     0,   229,   371,   230,   231,
+   131,   132,     0,   232,   373,   374,   375,     0,     0,     0,
+     0,   233,     0,     0,   234,     0,   235,     0,     0,   236,
      0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-     0,     0,     0,     0,     0,     0,    62,     0,   251,   252,
-    46,    47,   253,     0,     0,     0,     0,     0,     0,     0,
-     0,     0,     0,     0,     0,     0,     0,    14,     0,    15,
-     0,   254,   255,   256,     0,     0,     0,     0,     0,    63,
-     0,     0,    64,   257,   258,    65,     0,    66,    94,     0,
-     0,     0,     0,     0,     0,     0,     0,     0,     0,    63,
-     0,     0,    64,     0,     0,    65,     0,    66,   297,     0,
-     0,     0,     0,   110,   111,   112,   113,   114,   115,   116,
-   117,   118,   119,   120,   121,   122,   123,   251,   252,     0,
-     0,   253,   227,     0,   228,   229,   131,   132,     0,     0,
-     0,     0,     0,     0,     0,     0,     0,     0,     0,   259,
-   254,   255,   256,     0,     0,     0,     0,     0,     0,     0,
-     0,     0,   257,   258,     0,     0,     0,     0,     0,     0,
+     0,     0,   392,   393,     0,     0,     0,     0,     0,     0,
+   400,     0,     0,     0,     0,    46,    47,   404,    93,    49,
+    50,    51,    52,    53,    54,    55,    56,    57,    58,    59,
+    60,    61,    14,     0,    15,     0,     0,     0,     0,     0,
+     0,   419,     0,     0,     0,     0,     0,     0,     0,     0,
+     0,     0,     0,     0,     0,    62,     0,     0,     0,     0,
+     0,     0,     0,     0,     0,     0,     0,     0,   435,     0,
+     0,     0,     0,     0,     0,     0,     0,     0,     0,   443,
+     0,     0,     0,     0,   447,     0,     0,     0,   450,   451,
+     0,    46,    47,     0,    93,   154,   155,   156,   157,   158,
+   159,   160,   161,   162,   163,   164,    60,    61,    14,    63,
+    15,     0,    64,     0,     0,    65,     0,    66,    94,     0,
      0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
+     0,    62,   254,   255,    46,    47,   256,     0,     0,     0,
      0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-     0,     0,   110,   111,   112,   113,   114,   115,   116,   117,
-   118,   119,   120,   121,   122,   123,     0,     0,     0,     0,
-     0,   227,     0,   228,   229,   131,   132,     0,     0,     0,
-     0,     0,     0,     0,     0,     0,    46,    47,   259,    93,
-    49,    50,    51,    52,    53,    54,    55,    56,    57,    58,
-    59,    60,    61,    14,     0,    15,     0,     0,     0,     0,
-     0,     0,     0,     0,     0,     0,     0,     0,   174,     0,
-     0,     0,     0,     0,    46,    47,    62,    93,    49,    50,
-    51,    52,    53,    54,    55,    56,    57,    58,    59,    60,
-    61,    14,     0,    15,     0,     0,     0,     0,     0,     0,
-     0,     0,     0,     0,     0,     0,   244,     0,     0,     0,
-     0,     0,     0,     0,    62,     0,     0,     0,     0,     0,
-     0,     0,     0,     0,     0,     0,     0,     0,     0,    63,
-     0,     0,    64,     0,     0,    65,     0,    66,    46,    47,
-     0,    93,   153,   154,   155,   156,   157,   158,   159,   160,
-   161,   162,   163,    60,    61,    14,     0,    15,     0,     0,
-     0,     0,     0,     0,     0,     0,     0,    63,     0,     0,
-    64,     0,     0,    65,     0,    66,    46,    47,    62,    93,
-    49,    50,    51,    52,    53,    54,    55,    56,    57,    58,
-    59,    60,    61,    14,     0,    15,     0,     0,     0,     0,
-     0,     0,     0,     0,     0,     0,     0,     0,   311,     0,
-     0,     0,     0,     0,     0,     0,    62,     0,     0,     0,
+     0,    14,     0,    15,     0,   257,   258,   259,     0,     0,
+     0,     0,     0,     0,     0,     0,     0,   260,   261,     0,
      0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-     0,    63,     0,     0,    64,     0,   293,    65,     0,    66,
-     0,    46,    47,     0,    93,    49,    50,    51,    52,    53,
-    54,    55,    56,    57,    58,    59,    60,    61,    14,     0,
-    15,     0,     0,     0,     0,     0,     0,     0,     0,    63,
-     0,     0,    64,   350,     0,    65,     0,    66,     0,    46,
-    47,    62,    48,    49,    50,    51,    52,    53,    54,    55,
-    56,    57,    58,    59,    60,    61,    14,     0,    15,    46,
-    47,     0,    93,    49,    50,    51,    52,    53,    54,    55,
-    56,    57,    58,    59,    60,    61,    14,     0,    15,    62,
+     0,     0,     0,     0,     0,    63,     0,     0,    64,     0,
+     0,    65,     0,    66,   302,     0,     0,   110,   111,   112,
+   113,   114,   115,   116,   117,   118,   119,   120,   121,   122,
+   123,     0,     0,   254,   255,     0,   229,   256,   230,   231,
+   131,   132,     0,   232,     0,     0,     0,     0,     0,     0,
+     0,     0,     0,     0,   262,     0,   257,   258,   259,     0,
+     0,     0,     0,     0,     0,     0,     0,     0,   260,   261,
      0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-     0,     0,     0,     0,    63,     0,     0,    64,     0,    62,
-    65,     0,    66,    46,    47,     0,    93,   153,   154,   155,
-   156,   157,   158,   159,   160,   161,   162,   163,    60,    61,
+     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
+     0,     0,     0,     0,     0,     0,     0,     0,   110,   111,
+   112,   113,   114,   115,   116,   117,   118,   119,   120,   121,
+   122,   123,     0,     0,     0,     0,     0,   229,     0,   230,
+   231,   131,   132,     0,   232,     0,     0,     0,     0,     0,
+     0,     0,     0,    46,    47,   262,    93,    49,    50,    51,
+    52,    53,    54,    55,    56,    57,    58,    59,    60,    61,
     14,     0,    15,     0,     0,     0,     0,     0,     0,     0,
-     0,     0,    63,     0,     0,    64,     0,     0,    65,     0,
-    66,     0,     0,    62,     0,     0,     0,     0,     0,     0,
-     0,     0,    63,     0,     0,    64,     0,     0,    65,     0,
-    66,    46,    47,     0,   180,    49,    50,    51,    52,    53,
+     0,     0,     0,     0,     0,   175,     0,     0,     0,     0,
+     0,    46,    47,    62,    93,    49,    50,    51,    52,    53,
     54,    55,    56,    57,    58,    59,    60,    61,    14,     0,
-    15,     0,     0,     0,   100,     0,     0,     0,     0,     0,
-     0,     0,     0,     0,     0,   101,    63,     0,     0,    64,
-     0,    62,    65,     0,    66,   102,   103,     0,     0,     0,
+    15,     0,     0,     0,     0,     0,     0,     0,     0,     0,
+     0,     0,     0,   247,     0,     0,     0,     0,     0,    46,
+    47,    62,    93,   154,   155,   156,   157,   158,   159,   160,
+   161,   162,   163,   164,    60,    61,    14,    63,    15,     0,
+    64,     0,     0,    65,     0,    66,     0,     0,     0,     0,
+     0,     0,     0,     0,     0,     0,     0,    46,    47,    62,
+    93,    49,    50,    51,    52,    53,    54,    55,    56,    57,
+    58,    59,    60,    61,    14,    63,    15,     0,    64,     0,
+     0,    65,     0,    66,     0,     0,     0,     0,     0,   316,
+     0,     0,     0,     0,     0,    46,    47,    62,    93,    49,
+    50,    51,    52,    53,    54,    55,    56,    57,    58,    59,
+    60,    61,    14,    63,    15,     0,    64,     0,   298,    65,
+     0,    66,     0,     0,     0,     0,     0,   357,     0,     0,
+     0,     0,     0,    46,    47,    62,    48,    49,    50,    51,
+    52,    53,    54,    55,    56,    57,    58,    59,    60,    61,
+    14,    63,    15,     0,    64,     0,     0,    65,     0,    66,
+     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
+     0,    46,    47,    62,    93,    49,    50,    51,    52,    53,
+    54,    55,    56,    57,    58,    59,    60,    61,    14,    63,
+    15,     0,    64,     0,     0,    65,     0,    66,     0,     0,
+     0,     0,     0,     0,     0,     0,     0,     0,     0,    46,
+    47,    62,    93,   154,   155,   156,   157,   158,   159,   160,
+   161,   162,   163,   164,    60,    61,    14,    63,    15,     0,
+    64,     0,     0,    65,     0,    66,     0,     0,     0,     0,
+     0,     0,     0,     0,     0,     0,     0,    46,    47,    62,
+   181,    49,    50,    51,    52,    53,    54,    55,    56,    57,
+    58,    59,    60,    61,    14,    63,    15,     0,    64,     0,
+     0,    65,     0,    66,     0,     0,     0,     0,     0,     0,
+     0,     0,     0,     0,     0,     0,     0,    62,     0,     0,
+     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
+     0,     0,     0,    63,     0,     0,    64,     0,     0,    65,
+     0,    66,     0,     0,     0,     0,     0,     0,     0,     0,
+     0,     0,     0,     0,   100,     0,     0,     0,     0,     0,
+     0,     0,     0,     0,     0,   101,     0,     0,     0,     0,
+     0,    63,     0,     0,    64,   102,   103,    65,     0,    66,
      0,   104,   105,   106,   107,   108,   109,   110,   111,   112,
    113,   114,   115,   116,   117,   118,   119,   120,   121,   122,
    123,   124,   125,   126,     0,     0,   127,   128,   129,   130,
-   131,   132,   133,   134,   135,     0,     0,     0,     0,     0,
-     0,     0,     0,     0,    63,     0,     0,    64,     0,     0,
-    65,     0,    66
+   131,   132,   133,   134,   135,   136
 };
 
 static const short yycheck[] = {    26,
-   106,   106,    40,    29,    89,    23,   197,   101,    15,    97,
-   104,    23,    66,    40,    34,     2,   240,    15,    30,   107,
-    10,    11,    12,    13,    14,    15,    16,    17,   107,   231,
-   232,   406,   126,   103,    54,   129,   130,    96,   108,   133,
-   134,   135,     0,    30,    98,   139,   421,    54,    10,    11,
-    12,    13,    14,    15,    16,    17,    54,   259,     9,    99,
-    96,    88,   141,    97,    97,    97,    20,    25,   108,     4,
-    21,   105,   105,    31,   101,   107,    97,   104,    52,    53,
-   106,    68,   103,    41,    42,    43,    44,    41,    42,    43,
-    44,   105,    96,    47,   108,   107,   420,   124,   125,   126,
-   127,   128,   129,   130,   428,    96,   133,   134,   135,   136,
-   137,   138,   139,   103,   338,   169,   170,   171,    96,   213,
-    49,    50,    51,   167,    10,    11,    12,    13,    14,    15,
-    16,    17,    22,   177,    24,   101,    97,     4,   182,   183,
-    99,   103,   103,    32,    33,     4,   173,    85,    86,     4,
-   194,    58,    59,    60,    61,   199,    99,   195,    27,    28,
-     3,     4,    24,   207,   208,   209,     4,   358,   195,   360,
-     3,     4,    24,   211,     3,     4,     3,     4,     3,     4,
-   102,   102,   276,    99,   211,   212,   213,     4,    56,   283,
-     4,     4,     4,    97,   100,   249,     7,     7,     4,     7,
-    97,    97,   101,    97,    36,   290,   291,   292,    24,    97,
-    97,    34,    97,    97,    97,   300,   301,   302,   303,   182,
-   183,    97,    99,   267,    99,    99,    24,    99,    99,   273,
-   100,   194,    21,    99,    99,    21,   199,    97,   101,    97,
-   284,   285,    99,    97,   207,   208,   209,    97,   275,   276,
-   277,   278,   279,    97,     4,    97,   283,   342,   245,    99,
-    97,    97,    97,    97,    24,     4,    36,    97,     4,    97,
-    54,   365,   316,    97,   318,    97,    97,    97,   322,    97,
-    54,   100,   309,    21,   328,   329,   330,    36,    97,    21,
-    97,   376,   319,   378,   379,   380,   381,   391,   101,   100,
-   406,   406,    21,   103,   267,   100,   100,   334,   100,    97,
-   273,   355,   356,   100,    66,   421,   421,   100,   100,   363,
-   100,   284,   285,    20,   103,    22,   370,    24,   413,    97,
-   357,    97,    21,    21,    31,    32,    33,     0,   365,     0,
-    30,    78,   369,    78,    41,    42,    43,    44,   375,   393,
-    47,    48,    78,   316,    78,   318,    18,   310,    55,   322,
-    42,   309,   167,    21,   391,   328,   329,   330,    98,     2,
-    13,   339,   319,   369,   418,    -1,    -1,    -1,    -1,    -1,
-    -1,    -1,    -1,    -1,    -1,   429,    -1,    -1,    -1,    -1,
-   434,    -1,   355,   356,   438,   439,    -1,    -1,    -1,    -1,
-   363,    -1,    -1,    -1,    -1,    -1,    -1,   370,    -1,    -1,
-    -1,    -1,    -1,    -1,     5,     6,    -1,    -1,    -1,    -1,
+   106,    89,   106,     2,   101,    40,   198,   104,    23,    29,
+    66,   415,     9,    40,    98,    30,   243,   100,    32,    33,
+    98,    15,   106,    15,    21,    98,   109,   431,   107,   126,
+   108,    30,   129,   130,    23,   108,   133,   134,   135,   136,
+     0,     4,    98,   140,    10,    11,    12,    13,    14,    15,
+    16,    17,    10,    11,    12,    13,    14,    15,    16,    17,
+    54,    88,    54,   142,    98,    25,   234,   235,    20,    68,
+   430,    31,   106,    98,   101,    52,    53,   104,   438,   104,
+    98,    41,    42,    43,    44,    34,   104,   107,    97,    41,
+    42,    43,    44,   108,   262,    47,    97,   124,   125,   126,
+   127,   128,   129,   130,    97,    54,   133,   134,   135,   136,
+   137,   138,   139,   140,   170,   171,   172,   344,   215,    58,
+    59,    60,    61,    97,   168,    10,    11,    12,    13,    14,
+    15,    16,    17,    22,   178,    24,   104,   102,   104,   183,
+   184,   109,   106,    85,    86,   109,   104,   174,    49,    50,
+    51,   195,    27,    28,     3,     4,   200,     3,     4,     3,
+     4,   196,     3,     4,    97,   209,   210,   211,   100,   196,
+     3,     4,     4,   365,     4,   367,     4,   100,   213,    24,
+     4,    24,   279,   103,   281,   103,   213,   214,   215,   100,
+   287,    56,     4,     4,     4,     4,   252,     4,    98,     7,
+    20,     7,    22,     7,    24,   101,   294,   295,   296,   297,
+    98,    31,    32,    33,    98,   102,    98,   305,   306,   307,
+   308,    41,    42,    43,    44,    98,   270,    47,    48,    98,
+    98,    36,   276,    24,    98,    55,    98,    98,    98,    24,
+    34,   100,   100,   100,   288,   289,   100,   100,   100,   248,
+   100,   278,   279,   280,   281,   282,   283,    21,   100,    98,
+   287,   349,    98,   101,    98,   102,    21,    98,     4,    98,
+    24,    98,    98,    98,     4,   372,    36,   321,   100,   323,
+    98,    98,    54,   327,   100,    98,   101,   314,     4,    54,
+   334,   335,   336,    21,    36,   383,   384,   324,   386,   387,
+   388,   389,   399,   183,   184,    98,    98,   102,    98,   415,
+    98,   415,    98,   340,    98,   195,    98,    98,   362,   363,
+   200,    98,   101,   101,   104,   431,   370,   431,   101,   209,
+   210,   211,    98,   377,   422,   104,    21,   364,   101,   101,
+   101,    21,   101,   101,   101,   372,    98,    98,    66,   376,
+    21,    21,     0,     0,    78,   382,    78,   401,    78,    78,
+    18,    30,   315,    98,     5,     6,   168,    42,   314,    21,
+     2,    13,   399,   324,   376,   345,    -1,    -1,    -1,    -1,
+    -1,    22,    -1,    24,   428,    26,    -1,    -1,    -1,    -1,
+   270,    -1,    -1,    -1,    -1,   439,   276,    38,    39,    -1,
+   444,    -1,    -1,    -1,   448,   449,    -1,    -1,   288,   289,
     -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,
-   393,    22,    -1,    24,    -1,    26,    -1,    -1,    -1,    -1,
-    -1,    -1,    -1,    -1,    -1,    -1,    -1,    38,    39,    -1,
-    -1,    -1,    -1,    -1,    -1,   418,    -1,    -1,    -1,    -1,
-    -1,    -1,    -1,    -1,    -1,    -1,   429,    -1,    -1,    -1,
-    -1,   434,    -1,    -1,    -1,   438,   439,    68,    69,    70,
+    -1,    -1,    -1,    -1,    -1,    -1,    -1,    68,    69,    70,
     71,    72,    73,    74,    75,    76,    77,    78,    79,    80,
-    81,    -1,    -1,    -1,    -1,    -1,    87,    -1,    89,    90,
-    91,    92,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,
-   101,    -1,    -1,   104,    -1,   106,     5,     6,   109,     8,
-     9,    10,    11,    12,    13,    14,    15,    16,    17,    18,
-    19,    20,    21,    22,    -1,    24,     5,     6,    -1,     8,
-     9,    10,    11,    12,    13,    14,    15,    16,    17,    18,
-    19,    20,    21,    22,    -1,    24,    45,    -1,    -1,    -1,
+    81,   321,    -1,   323,    -1,    -1,    87,   327,    89,    90,
+    91,    92,    -1,    94,   334,   335,   336,    -1,    -1,    -1,
+    -1,   102,    -1,    -1,   105,    -1,   107,    -1,    -1,   110,
     -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,
-    -1,    -1,    -1,    -1,    -1,    -1,    45,    -1,     3,     4,
-     5,     6,     7,    -1,    -1,    -1,    -1,    -1,    -1,    -1,
-    -1,    -1,    -1,    -1,    -1,    -1,    -1,    22,    -1,    24,
-    -1,    26,    27,    28,    -1,    -1,    -1,    -1,    -1,    98,
-    -1,    -1,   101,    38,    39,   104,    -1,   106,   107,    -1,
-    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    98,
-    -1,    -1,   101,    -1,    -1,   104,    -1,   106,   107,    -1,
-    -1,    -1,    -1,    68,    69,    70,    71,    72,    73,    74,
-    75,    76,    77,    78,    79,    80,    81,     3,     4,    -1,
-    -1,     7,    87,    -1,    89,    90,    91,    92,    -1,    -1,
-    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,   104,
-    26,    27,    28,    -1,    -1,    -1,    -1,    -1,    -1,    -1,
-    -1,    -1,    38,    39,    -1,    -1,    -1,    -1,    -1,    -1,
+    -1,    -1,   362,   363,    -1,    -1,    -1,    -1,    -1,    -1,
+   370,    -1,    -1,    -1,    -1,     5,     6,   377,     8,     9,
+    10,    11,    12,    13,    14,    15,    16,    17,    18,    19,
+    20,    21,    22,    -1,    24,    -1,    -1,    -1,    -1,    -1,
+    -1,   401,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,
+    -1,    -1,    -1,    -1,    -1,    45,    -1,    -1,    -1,    -1,
+    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,   428,    -1,
+    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,   439,
+    -1,    -1,    -1,    -1,   444,    -1,    -1,    -1,   448,   449,
+    -1,     5,     6,    -1,     8,     9,    10,    11,    12,    13,
+    14,    15,    16,    17,    18,    19,    20,    21,    22,    99,
+    24,    -1,   102,    -1,    -1,   105,    -1,   107,   108,    -1,
     -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,
+    -1,    45,     3,     4,     5,     6,     7,    -1,    -1,    -1,
     -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,
-    -1,    -1,    68,    69,    70,    71,    72,    73,    74,    75,
-    76,    77,    78,    79,    80,    81,    -1,    -1,    -1,    -1,
-    -1,    87,    -1,    89,    90,    91,    92,    -1,    -1,    -1,
-    -1,    -1,    -1,    -1,    -1,    -1,     5,     6,   104,     8,
-     9,    10,    11,    12,    13,    14,    15,    16,    17,    18,
-    19,    20,    21,    22,    -1,    24,    -1,    -1,    -1,    -1,
-    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    37,    -1,
-    -1,    -1,    -1,    -1,     5,     6,    45,     8,     9,    10,
-    11,    12,    13,    14,    15,    16,    17,    18,    19,    20,
-    21,    22,    -1,    24,    -1,    -1,    -1,    -1,    -1,    -1,
-    -1,    -1,    -1,    -1,    -1,    -1,    37,    -1,    -1,    -1,
-    -1,    -1,    -1,    -1,    45,    -1,    -1,    -1,    -1,    -1,
-    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    98,
-    -1,    -1,   101,    -1,    -1,   104,    -1,   106,     5,     6,
-    -1,     8,     9,    10,    11,    12,    13,    14,    15,    16,
-    17,    18,    19,    20,    21,    22,    -1,    24,    -1,    -1,
-    -1,    -1,    -1,    -1,    -1,    -1,    -1,    98,    -1,    -1,
-   101,    -1,    -1,   104,    -1,   106,     5,     6,    45,     8,
-     9,    10,    11,    12,    13,    14,    15,    16,    17,    18,
-    19,    20,    21,    22,    -1,    24,    -1,    -1,    -1,    -1,
-    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    37,    -1,
-    -1,    -1,    -1,    -1,    -1,    -1,    45,    -1,    -1,    -1,
+    -1,    22,    -1,    24,    -1,    26,    27,    28,    -1,    -1,
+    -1,    -1,    -1,    -1,    -1,    -1,    -1,    38,    39,    -1,
     -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,
-    -1,    98,    -1,    -1,   101,    -1,   103,   104,    -1,   106,
-    -1,     5,     6,    -1,     8,     9,    10,    11,    12,    13,
-    14,    15,    16,    17,    18,    19,    20,    21,    22,    -1,
-    24,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    98,
-    -1,    -1,   101,    37,    -1,   104,    -1,   106,    -1,     5,
-     6,    45,     8,     9,    10,    11,    12,    13,    14,    15,
-    16,    17,    18,    19,    20,    21,    22,    -1,    24,     5,
-     6,    -1,     8,     9,    10,    11,    12,    13,    14,    15,
-    16,    17,    18,    19,    20,    21,    22,    -1,    24,    45,
+    -1,    -1,    -1,    -1,    -1,    99,    -1,    -1,   102,    -1,
+    -1,   105,    -1,   107,   108,    -1,    -1,    68,    69,    70,
+    71,    72,    73,    74,    75,    76,    77,    78,    79,    80,
+    81,    -1,    -1,     3,     4,    -1,    87,     7,    89,    90,
+    91,    92,    -1,    94,    -1,    -1,    -1,    -1,    -1,    -1,
+    -1,    -1,    -1,    -1,   105,    -1,    26,    27,    28,    -1,
+    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    38,    39,
     -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,
-    -1,    -1,    -1,    -1,    98,    -1,    -1,   101,    -1,    45,
-   104,    -1,   106,     5,     6,    -1,     8,     9,    10,    11,
+    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,
+    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    68,    69,
+    70,    71,    72,    73,    74,    75,    76,    77,    78,    79,
+    80,    81,    -1,    -1,    -1,    -1,    -1,    87,    -1,    89,
+    90,    91,    92,    -1,    94,    -1,    -1,    -1,    -1,    -1,
+    -1,    -1,    -1,     5,     6,   105,     8,     9,    10,    11,
     12,    13,    14,    15,    16,    17,    18,    19,    20,    21,
     22,    -1,    24,    -1,    -1,    -1,    -1,    -1,    -1,    -1,
-    -1,    -1,    98,    -1,    -1,   101,    -1,    -1,   104,    -1,
-   106,    -1,    -1,    45,    -1,    -1,    -1,    -1,    -1,    -1,
-    -1,    -1,    98,    -1,    -1,   101,    -1,    -1,   104,    -1,
-   106,     5,     6,    -1,     8,     9,    10,    11,    12,    13,
+    -1,    -1,    -1,    -1,    -1,    37,    -1,    -1,    -1,    -1,
+    -1,     5,     6,    45,     8,     9,    10,    11,    12,    13,
     14,    15,    16,    17,    18,    19,    20,    21,    22,    -1,
-    24,    -1,    -1,    -1,    35,    -1,    -1,    -1,    -1,    -1,
-    -1,    -1,    -1,    -1,    -1,    46,    98,    -1,    -1,   101,
-    -1,    45,   104,    -1,   106,    56,    57,    -1,    -1,    -1,
+    24,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,
+    -1,    -1,    -1,    37,    -1,    -1,    -1,    -1,    -1,     5,
+     6,    45,     8,     9,    10,    11,    12,    13,    14,    15,
+    16,    17,    18,    19,    20,    21,    22,    99,    24,    -1,
+   102,    -1,    -1,   105,    -1,   107,    -1,    -1,    -1,    -1,
+    -1,    -1,    -1,    -1,    -1,    -1,    -1,     5,     6,    45,
+     8,     9,    10,    11,    12,    13,    14,    15,    16,    17,
+    18,    19,    20,    21,    22,    99,    24,    -1,   102,    -1,
+    -1,   105,    -1,   107,    -1,    -1,    -1,    -1,    -1,    37,
+    -1,    -1,    -1,    -1,    -1,     5,     6,    45,     8,     9,
+    10,    11,    12,    13,    14,    15,    16,    17,    18,    19,
+    20,    21,    22,    99,    24,    -1,   102,    -1,   104,   105,
+    -1,   107,    -1,    -1,    -1,    -1,    -1,    37,    -1,    -1,
+    -1,    -1,    -1,     5,     6,    45,     8,     9,    10,    11,
+    12,    13,    14,    15,    16,    17,    18,    19,    20,    21,
+    22,    99,    24,    -1,   102,    -1,    -1,   105,    -1,   107,
+    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,
+    -1,     5,     6,    45,     8,     9,    10,    11,    12,    13,
+    14,    15,    16,    17,    18,    19,    20,    21,    22,    99,
+    24,    -1,   102,    -1,    -1,   105,    -1,   107,    -1,    -1,
+    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,     5,
+     6,    45,     8,     9,    10,    11,    12,    13,    14,    15,
+    16,    17,    18,    19,    20,    21,    22,    99,    24,    -1,
+   102,    -1,    -1,   105,    -1,   107,    -1,    -1,    -1,    -1,
+    -1,    -1,    -1,    -1,    -1,    -1,    -1,     5,     6,    45,
+     8,     9,    10,    11,    12,    13,    14,    15,    16,    17,
+    18,    19,    20,    21,    22,    99,    24,    -1,   102,    -1,
+    -1,   105,    -1,   107,    -1,    -1,    -1,    -1,    -1,    -1,
+    -1,    -1,    -1,    -1,    -1,    -1,    -1,    45,    -1,    -1,
+    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,
+    -1,    -1,    -1,    99,    -1,    -1,   102,    -1,    -1,   105,
+    -1,   107,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,
+    -1,    -1,    -1,    -1,    35,    -1,    -1,    -1,    -1,    -1,
+    -1,    -1,    -1,    -1,    -1,    46,    -1,    -1,    -1,    -1,
+    -1,    99,    -1,    -1,   102,    56,    57,   105,    -1,   107,
     -1,    62,    63,    64,    65,    66,    67,    68,    69,    70,
     71,    72,    73,    74,    75,    76,    77,    78,    79,    80,
     81,    82,    83,    84,    -1,    -1,    87,    88,    89,    90,
-    91,    92,    93,    94,    95,    -1,    -1,    -1,    -1,    -1,
-    -1,    -1,    -1,    -1,    98,    -1,    -1,   101,    -1,    -1,
-   104,    -1,   106
+    91,    92,    93,    94,    95,    96
 };
 /* -*-C-*-  Note some compilers choke on comments on `#line' lines.  */
 #line 3 "/usr/share/bison.simple"
@@ -2187,7 +2193,7 @@
   switch (yyn) {
 
 case 2:
-#line 992 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 992 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
   if (yyvsp[0].UIntVal > (uint32_t)INT32_MAX)     // Outside of my range!
     ThrowException("Value too large for type!");
@@ -2195,7 +2201,7 @@
 ;
     break;}
 case 4:
-#line 1000 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1000 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
   if (yyvsp[0].UInt64Val > (uint64_t)INT64_MAX)     // Outside of my range!
     ThrowException("Value too large for type!");
@@ -2203,55 +2209,55 @@
 ;
     break;}
 case 33:
-#line 1023 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1023 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.StrVal = yyvsp[-1].StrVal;
   ;
     break;}
 case 34:
-#line 1026 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1026 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.StrVal = 0;
   ;
     break;}
 case 35:
-#line 1030 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1030 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 { yyval.Linkage = GlobalValue::InternalLinkage; ;
     break;}
 case 36:
-#line 1031 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1031 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 { yyval.Linkage = GlobalValue::LinkOnceLinkage; ;
     break;}
 case 37:
-#line 1032 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1032 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 { yyval.Linkage = GlobalValue::WeakLinkage; ;
     break;}
 case 38:
-#line 1033 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1033 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 { yyval.Linkage = GlobalValue::AppendingLinkage; ;
     break;}
 case 39:
-#line 1034 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1034 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 { yyval.Linkage = GlobalValue::ExternalLinkage; ;
     break;}
 case 40:
-#line 1036 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1036 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 { yyval.UIntVal = CallingConv::C; ;
     break;}
 case 41:
-#line 1037 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1037 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 { yyval.UIntVal = CallingConv::C; ;
     break;}
 case 42:
-#line 1038 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1038 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 { yyval.UIntVal = CallingConv::Fast; ;
     break;}
 case 43:
-#line 1039 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1039 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 { yyval.UIntVal = CallingConv::Cold; ;
     break;}
 case 44:
-#line 1040 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1040 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
                    if ((unsigned)yyvsp[0].UInt64Val != yyvsp[0].UInt64Val)
                      ThrowException("Calling conv too large!");
@@ -2259,11 +2265,11 @@
                  ;
     break;}
 case 45:
-#line 1048 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1048 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 { yyval.UIntVal = 0; ;
     break;}
 case 46:
-#line 1049 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1049 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
   yyval.UIntVal = yyvsp[0].UInt64Val;
   if (yyval.UIntVal != 0 && !isPowerOf2_32(yyval.UIntVal))
@@ -2271,11 +2277,11 @@
 ;
     break;}
 case 47:
-#line 1054 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1054 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 { yyval.UIntVal = 0; ;
     break;}
 case 48:
-#line 1055 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1055 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
   yyval.UIntVal = yyvsp[0].UInt64Val;
   if (yyval.UIntVal != 0 && !isPowerOf2_32(yyval.UIntVal))
@@ -2283,7 +2289,7 @@
 ;
     break;}
 case 49:
-#line 1062 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1062 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
   for (unsigned i = 0, e = strlen(yyvsp[0].StrVal); i != e; ++i)
     if (yyvsp[0].StrVal[i] == '"' || yyvsp[0].StrVal[i] == '\\')
@@ -2292,30 +2298,30 @@
 ;
     break;}
 case 50:
-#line 1069 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1069 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 { yyval.StrVal = 0; ;
     break;}
 case 51:
-#line 1070 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1070 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 { yyval.StrVal = yyvsp[0].StrVal; ;
     break;}
 case 52:
-#line 1075 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1075 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {;
     break;}
 case 53:
-#line 1076 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1076 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {;
     break;}
 case 54:
-#line 1077 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1077 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     CurGV->setSection(yyvsp[0].StrVal);
     free(yyvsp[0].StrVal);
   ;
     break;}
 case 55:
-#line 1081 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1081 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     if (yyvsp[0].UInt64Val != 0 && !isPowerOf2_32(yyvsp[0].UInt64Val))
       ThrowException("Alignment must be a power of two!");
@@ -2323,15 +2329,15 @@
   ;
     break;}
 case 57:
-#line 1094 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1094 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 { yyval.TypeVal = new PATypeHolder(yyvsp[0].PrimType); ;
     break;}
 case 59:
-#line 1095 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1095 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 { yyval.TypeVal = new PATypeHolder(yyvsp[0].PrimType); ;
     break;}
 case 60:
-#line 1097 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1097 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     if (!UpRefs.empty())
       ThrowException("Invalid upreference in type: " + (*yyvsp[0].TypeVal)->getDescription());
@@ -2339,25 +2345,25 @@
   ;
     break;}
 case 74:
-#line 1108 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1108 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.TypeVal = new PATypeHolder(OpaqueType::get());
   ;
     break;}
 case 75:
-#line 1111 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1111 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.TypeVal = new PATypeHolder(yyvsp[0].PrimType);
   ;
     break;}
 case 76:
-#line 1114 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1114 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {            // Named types are also simple types...
   yyval.TypeVal = new PATypeHolder(getTypeVal(yyvsp[0].ValIDVal));
 ;
     break;}
 case 77:
-#line 1120 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1120 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {                   // Type UpReference
     if (yyvsp[0].UInt64Val > (uint64_t)~0U) ThrowException("Value out of range!");
     OpaqueType *OT = OpaqueType::get();        // Use temporary placeholder
@@ -2367,7 +2373,7 @@
   ;
     break;}
 case 78:
-#line 1127 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1127 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {           // Function derived type?
     std::vector<const Type*> Params;
     for (std::list<llvm::PATypeHolder>::iterator I = yyvsp[-1].TypeList->begin(),
@@ -2382,14 +2388,14 @@
   ;
     break;}
 case 79:
-#line 1139 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1139 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {          // Sized array type?
     yyval.TypeVal = new PATypeHolder(HandleUpRefs(ArrayType::get(*yyvsp[-1].TypeVal, (unsigned)yyvsp[-3].UInt64Val)));
     delete yyvsp[-1].TypeVal;
   ;
     break;}
 case 80:
-#line 1143 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1143 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {          // Packed array type?
      const llvm::Type* ElemTy = yyvsp[-1].TypeVal->get();
      if ((unsigned)yyvsp[-3].UInt64Val != yyvsp[-3].UInt64Val)
@@ -2403,7 +2409,7 @@
   ;
     break;}
 case 81:
-#line 1154 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1154 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {                        // Structure type?
     std::vector<const Type*> Elements;
     for (std::list<llvm::PATypeHolder>::iterator I = yyvsp[-1].TypeList->begin(),
@@ -2415,51 +2421,51 @@
   ;
     break;}
 case 82:
-#line 1163 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1163 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {                                  // Empty structure type?
     yyval.TypeVal = new PATypeHolder(StructType::get(std::vector<const Type*>()));
   ;
     break;}
 case 83:
-#line 1166 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1166 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {                             // Pointer type?
     yyval.TypeVal = new PATypeHolder(HandleUpRefs(PointerType::get(*yyvsp[-1].TypeVal)));
     delete yyvsp[-1].TypeVal;
   ;
     break;}
 case 84:
-#line 1174 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1174 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.TypeList = new std::list<PATypeHolder>();
     yyval.TypeList->push_back(*yyvsp[0].TypeVal); delete yyvsp[0].TypeVal;
   ;
     break;}
 case 85:
-#line 1178 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1178 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     (yyval.TypeList=yyvsp[-2].TypeList)->push_back(*yyvsp[0].TypeVal); delete yyvsp[0].TypeVal;
   ;
     break;}
 case 87:
-#line 1184 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1184 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     (yyval.TypeList=yyvsp[-2].TypeList)->push_back(Type::VoidTy);
   ;
     break;}
 case 88:
-#line 1187 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1187 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     (yyval.TypeList = new std::list<PATypeHolder>())->push_back(Type::VoidTy);
   ;
     break;}
 case 89:
-#line 1190 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1190 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.TypeList = new std::list<PATypeHolder>();
   ;
     break;}
 case 90:
-#line 1200 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1200 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 { // Nonempty unsized arr
     const ArrayType *ATy = dyn_cast<ArrayType>(yyvsp[-3].TypeVal->get());
     if (ATy == 0)
@@ -2487,7 +2493,7 @@
   ;
     break;}
 case 91:
-#line 1225 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1225 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     const ArrayType *ATy = dyn_cast<ArrayType>(yyvsp[-2].TypeVal->get());
     if (ATy == 0)
@@ -2503,7 +2509,7 @@
   ;
     break;}
 case 92:
-#line 1238 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1238 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     const ArrayType *ATy = dyn_cast<ArrayType>(yyvsp[-2].TypeVal->get());
     if (ATy == 0)
@@ -2534,7 +2540,7 @@
   ;
     break;}
 case 93:
-#line 1266 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1266 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 { // Nonempty unsized arr
     const PackedType *PTy = dyn_cast<PackedType>(yyvsp[-3].TypeVal->get());
     if (PTy == 0)
@@ -2562,7 +2568,7 @@
   ;
     break;}
 case 94:
-#line 1291 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1291 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     const StructType *STy = dyn_cast<StructType>(yyvsp[-3].TypeVal->get());
     if (STy == 0)
@@ -2585,7 +2591,7 @@
   ;
     break;}
 case 95:
-#line 1311 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1311 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     const StructType *STy = dyn_cast<StructType>(yyvsp[-2].TypeVal->get());
     if (STy == 0)
@@ -2600,7 +2606,7 @@
   ;
     break;}
 case 96:
-#line 1323 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1323 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     const PointerType *PTy = dyn_cast<PointerType>(yyvsp[-1].TypeVal->get());
     if (PTy == 0)
@@ -2612,14 +2618,14 @@
   ;
     break;}
 case 97:
-#line 1332 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1332 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.ConstVal = UndefValue::get(yyvsp[-1].TypeVal->get());
     delete yyvsp[-1].TypeVal;
   ;
     break;}
 case 98:
-#line 1336 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1336 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     const PointerType *Ty = dyn_cast<PointerType>(yyvsp[-1].TypeVal->get());
     if (Ty == 0)
@@ -2681,7 +2687,7 @@
   ;
     break;}
 case 99:
-#line 1395 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1395 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     if (yyvsp[-1].TypeVal->get() != yyvsp[0].ConstVal->getType())
       ThrowException("Mismatched types for constant expression!");
@@ -2690,7 +2696,7 @@
   ;
     break;}
 case 100:
-#line 1401 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1401 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     const Type *Ty = yyvsp[-1].TypeVal->get();
     if (isa<FunctionType>(Ty) || Ty == Type::LabelTy || isa<OpaqueType>(Ty))
@@ -2700,7 +2706,7 @@
   ;
     break;}
 case 101:
-#line 1409 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1409 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {      // integral constants
     if (!ConstantSInt::isValueValidForType(yyvsp[-1].PrimType, yyvsp[0].SInt64Val))
       ThrowException("Constant value doesn't fit in type!");
@@ -2708,7 +2714,7 @@
   ;
     break;}
 case 102:
-#line 1414 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1414 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {            // integral constants
     if (!ConstantUInt::isValueValidForType(yyvsp[-1].PrimType, yyvsp[0].UInt64Val))
       ThrowException("Constant value doesn't fit in type!");
@@ -2716,19 +2722,19 @@
   ;
     break;}
 case 103:
-#line 1419 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1419 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {                      // Boolean constants
     yyval.ConstVal = ConstantBool::True;
   ;
     break;}
 case 104:
-#line 1422 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1422 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {                     // Boolean constants
     yyval.ConstVal = ConstantBool::False;
   ;
     break;}
 case 105:
-#line 1425 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1425 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {                   // Float & Double constants
     if (!ConstantFP::isValueValidForType(yyvsp[-1].PrimType, yyvsp[0].FPVal))
       ThrowException("Floating point constant invalid for type!!");
@@ -2736,7 +2742,7 @@
   ;
     break;}
 case 106:
-#line 1432 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1432 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     if (!yyvsp[-3].ConstVal->getType()->isFirstClassType())
       ThrowException("cast constant expression from a non-primitive type: '" +
@@ -2749,7 +2755,7 @@
   ;
     break;}
 case 107:
-#line 1442 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1442 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     if (!isa<PointerType>(yyvsp[-2].ConstVal->getType()))
       ThrowException("GetElementPtr requires a pointer operand!");
@@ -2783,7 +2789,7 @@
   ;
     break;}
 case 108:
-#line 1473 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1473 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     if (yyvsp[-5].ConstVal->getType() != Type::BoolTy)
       ThrowException("Select condition must be of boolean type!");
@@ -2793,7 +2799,7 @@
   ;
     break;}
 case 109:
-#line 1480 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1480 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     if (yyvsp[-3].ConstVal->getType() != yyvsp[-1].ConstVal->getType())
       ThrowException("Binary operator types must match!");
@@ -2817,7 +2823,7 @@
   ;
     break;}
 case 110:
-#line 1501 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1501 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     if (yyvsp[-3].ConstVal->getType() != yyvsp[-1].ConstVal->getType())
       ThrowException("Logical operator types must match!");
@@ -2830,7 +2836,7 @@
   ;
     break;}
 case 111:
-#line 1511 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1511 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     if (yyvsp[-3].ConstVal->getType() != yyvsp[-1].ConstVal->getType())
       ThrowException("setcc operand types must match!");
@@ -2838,7 +2844,7 @@
   ;
     break;}
 case 112:
-#line 1516 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1516 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     if (yyvsp[-1].ConstVal->getType() != Type::UByteTy)
       ThrowException("Shift count for shift constant must be unsigned byte!");
@@ -2848,54 +2854,65 @@
   ;
     break;}
 case 113:
-#line 1526 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1523 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
-    (yyval.ConstVector = yyvsp[-2].ConstVector)->push_back(yyvsp[0].ConstVal);
+        if (!isa<PackedType>(yyvsp[-3].ConstVal->getType()))
+      ThrowException("First operand of extractelement must be "
+                     "packed type!");
+    if (yyvsp[-1].ConstVal->getType() != Type::UIntTy)
+      ThrowException("Second operand of extractelement must be uint!");
+    yyval.ConstVal = ConstantExpr::getExtractElement(yyvsp[-3].ConstVal, yyvsp[-1].ConstVal);
   ;
     break;}
 case 114:
-#line 1529 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1533 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
+    (yyval.ConstVector = yyvsp[-2].ConstVector)->push_back(yyvsp[0].ConstVal);
+  ;
+    break;}
+case 115:
+#line 1536 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+{
     yyval.ConstVector = new std::vector<Constant*>();
     yyval.ConstVector->push_back(yyvsp[0].ConstVal);
   ;
     break;}
-case 115:
-#line 1536 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 116:
+#line 1543 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 { yyval.BoolVal = false; ;
     break;}
-case 116:
-#line 1536 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 117:
+#line 1543 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 { yyval.BoolVal = true; ;
     break;}
-case 117:
-#line 1546 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 118:
+#line 1553 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
   yyval.ModuleVal = ParserResult = yyvsp[0].ModuleVal;
   CurModule.ModuleDone();
 ;
     break;}
-case 118:
-#line 1553 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 119:
+#line 1560 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.ModuleVal = yyvsp[-1].ModuleVal;
     CurFun.FunctionDone();
   ;
     break;}
-case 119:
-#line 1557 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 120:
+#line 1564 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.ModuleVal = yyvsp[-1].ModuleVal;
   ;
     break;}
-case 120:
-#line 1560 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 121:
+#line 1567 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.ModuleVal = yyvsp[-1].ModuleVal;
   ;
     break;}
-case 121:
-#line 1563 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 122:
+#line 1570 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.ModuleVal = CurModule.CurrentModule;
     // Emit an error if there are any unresolved types left.
@@ -2908,8 +2925,8 @@
     }
   ;
     break;}
-case 122:
-#line 1576 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 123:
+#line 1583 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     // Eagerly resolve types.  This is not an optimization, this is a
     // requirement that is due to the fact that we could have this:
@@ -2931,69 +2948,69 @@
     delete yyvsp[0].TypeVal;
   ;
     break;}
-case 123:
-#line 1596 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 124:
+#line 1603 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {       // Function prototypes can be in const pool
   ;
     break;}
-case 124:
-#line 1598 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 125:
+#line 1605 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     if (yyvsp[0].ConstVal == 0) ThrowException("Global value initializer is not a constant!");
     CurGV = ParseGlobalVariable(yyvsp[-3].StrVal, yyvsp[-2].Linkage, yyvsp[-1].BoolVal, yyvsp[0].ConstVal->getType(), yyvsp[0].ConstVal);
                                                        ;
     break;}
-case 125:
-#line 1601 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 126:
+#line 1608 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     CurGV = 0;
   ;
     break;}
-case 126:
-#line 1604 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 127:
+#line 1611 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     CurGV = ParseGlobalVariable(yyvsp[-3].StrVal, GlobalValue::ExternalLinkage,
                                              yyvsp[-1].BoolVal, *yyvsp[0].TypeVal, 0);
     delete yyvsp[0].TypeVal;
                                                    ;
     break;}
-case 127:
-#line 1608 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 128:
+#line 1615 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     CurGV = 0;
   ;
     break;}
-case 128:
-#line 1611 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 129:
+#line 1618 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 { 
   ;
     break;}
-case 129:
-#line 1613 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 130:
+#line 1620 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
   ;
     break;}
-case 130:
-#line 1615 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 131:
+#line 1622 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 { 
   ;
     break;}
-case 131:
-#line 1620 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 132:
+#line 1627 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 { yyval.Endianness = Module::BigEndian; ;
     break;}
-case 132:
-#line 1621 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 133:
+#line 1628 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 { yyval.Endianness = Module::LittleEndian; ;
     break;}
-case 133:
-#line 1623 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 134:
+#line 1630 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     CurModule.CurrentModule->setEndianness(yyvsp[0].Endianness);
   ;
     break;}
-case 134:
-#line 1626 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 135:
+#line 1633 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     if (yyvsp[0].UInt64Val == 32)
       CurModule.CurrentModule->setPointerSize(Module::Pointer32);
@@ -3003,89 +3020,89 @@
       ThrowException("Invalid pointer size: '" + utostr(yyvsp[0].UInt64Val) + "'!");
   ;
     break;}
-case 135:
-#line 1634 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 136:
+#line 1641 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     CurModule.CurrentModule->setTargetTriple(yyvsp[0].StrVal);
     free(yyvsp[0].StrVal);
   ;
     break;}
-case 137:
-#line 1641 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 138:
+#line 1648 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
           CurModule.CurrentModule->addLibrary(yyvsp[0].StrVal);
           free(yyvsp[0].StrVal);
         ;
     break;}
-case 138:
-#line 1645 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 139:
+#line 1652 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
           CurModule.CurrentModule->addLibrary(yyvsp[0].StrVal);
           free(yyvsp[0].StrVal);
         ;
     break;}
-case 139:
-#line 1649 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 140:
+#line 1656 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
         ;
     break;}
-case 143:
-#line 1658 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 144:
+#line 1665 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 { yyval.StrVal = 0; ;
     break;}
-case 144:
-#line 1660 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 145:
+#line 1667 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
   if (*yyvsp[-1].TypeVal == Type::VoidTy)
     ThrowException("void typed arguments are invalid!");
   yyval.ArgVal = new std::pair<PATypeHolder*, char*>(yyvsp[-1].TypeVal, yyvsp[0].StrVal);
 ;
     break;}
-case 145:
-#line 1666 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 146:
+#line 1673 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.ArgList = yyvsp[-2].ArgList;
     yyvsp[-2].ArgList->push_back(*yyvsp[0].ArgVal);
     delete yyvsp[0].ArgVal;
   ;
     break;}
-case 146:
-#line 1671 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 147:
+#line 1678 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.ArgList = new std::vector<std::pair<PATypeHolder*,char*> >();
     yyval.ArgList->push_back(*yyvsp[0].ArgVal);
     delete yyvsp[0].ArgVal;
   ;
     break;}
-case 147:
-#line 1677 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 148:
+#line 1684 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.ArgList = yyvsp[0].ArgList;
   ;
     break;}
-case 148:
-#line 1680 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 149:
+#line 1687 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.ArgList = yyvsp[-2].ArgList;
     yyval.ArgList->push_back(std::pair<PATypeHolder*,
                             char*>(new PATypeHolder(Type::VoidTy), 0));
   ;
     break;}
-case 149:
-#line 1685 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 150:
+#line 1692 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.ArgList = new std::vector<std::pair<PATypeHolder*,char*> >();
     yyval.ArgList->push_back(std::make_pair(new PATypeHolder(Type::VoidTy), (char*)0));
   ;
     break;}
-case 150:
-#line 1689 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 151:
+#line 1696 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.ArgList = 0;
   ;
     break;}
-case 151:
-#line 1694 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 152:
+#line 1701 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
   UnEscapeLexed(yyvsp[-5].StrVal);
   std::string FunctionName(yyvsp[-5].StrVal);
@@ -3171,8 +3188,8 @@
   }
 ;
     break;}
-case 154:
-#line 1781 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 155:
+#line 1788 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
   yyval.FunctionVal = CurFun.CurrentFunction;
 
@@ -3181,73 +3198,73 @@
   yyval.FunctionVal->setLinkage(yyvsp[-2].Linkage);
 ;
     break;}
-case 157:
-#line 1791 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 158:
+#line 1798 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
   yyval.FunctionVal = yyvsp[-1].FunctionVal;
 ;
     break;}
-case 158:
-#line 1795 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 159:
+#line 1802 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 { CurFun.isDeclare = true; ;
     break;}
-case 159:
-#line 1795 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 160:
+#line 1802 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
   yyval.FunctionVal = CurFun.CurrentFunction;
   CurFun.FunctionDone();
 ;
     break;}
-case 160:
-#line 1804 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 161:
+#line 1811 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {    // A reference to a direct constant
     yyval.ValIDVal = ValID::create(yyvsp[0].SInt64Val);
   ;
     break;}
-case 161:
-#line 1807 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 162:
+#line 1814 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.ValIDVal = ValID::create(yyvsp[0].UInt64Val);
   ;
     break;}
-case 162:
-#line 1810 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 163:
+#line 1817 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {                     // Perhaps it's an FP constant?
     yyval.ValIDVal = ValID::create(yyvsp[0].FPVal);
   ;
     break;}
-case 163:
-#line 1813 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 164:
+#line 1820 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.ValIDVal = ValID::create(ConstantBool::True);
   ;
     break;}
-case 164:
-#line 1816 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 165:
+#line 1823 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.ValIDVal = ValID::create(ConstantBool::False);
   ;
     break;}
-case 165:
-#line 1819 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 166:
+#line 1826 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.ValIDVal = ValID::createNull();
   ;
     break;}
-case 166:
-#line 1822 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 167:
+#line 1829 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.ValIDVal = ValID::createUndef();
   ;
     break;}
-case 167:
-#line 1825 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 168:
+#line 1832 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {     // A vector zero constant.
     yyval.ValIDVal = ValID::createZeroInit();
   ;
     break;}
-case 168:
-#line 1828 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 169:
+#line 1835 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 { // Nonempty unsized packed vector
     const Type *ETy = (*yyvsp[-1].ConstVector)[0]->getType();
     int NumElements = yyvsp[-1].ConstVector->size(); 
@@ -3273,44 +3290,44 @@
     delete PTy; delete yyvsp[-1].ConstVector;
   ;
     break;}
-case 169:
-#line 1852 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 170:
+#line 1859 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.ValIDVal = ValID::create(yyvsp[0].ConstVal);
   ;
     break;}
-case 170:
-#line 1859 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 171:
+#line 1866 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {  // Is it an integer reference...?
     yyval.ValIDVal = ValID::create(yyvsp[0].SIntVal);
   ;
     break;}
-case 171:
-#line 1862 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 172:
+#line 1869 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {                   // Is it a named reference...?
     yyval.ValIDVal = ValID::create(yyvsp[0].StrVal);
   ;
     break;}
-case 174:
-#line 1873 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 175:
+#line 1880 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.ValueVal = getVal(*yyvsp[-1].TypeVal, yyvsp[0].ValIDVal); delete yyvsp[-1].TypeVal;
   ;
     break;}
-case 175:
-#line 1877 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 176:
+#line 1884 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.FunctionVal = yyvsp[-1].FunctionVal;
   ;
     break;}
-case 176:
-#line 1880 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 177:
+#line 1887 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 { // Do not allow functions with 0 basic blocks   
     yyval.FunctionVal = yyvsp[-1].FunctionVal;
   ;
     break;}
-case 177:
-#line 1888 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 178:
+#line 1895 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     setValueName(yyvsp[0].TermInstVal, yyvsp[-1].StrVal);
     InsertValue(yyvsp[0].TermInstVal);
@@ -3320,15 +3337,15 @@
     yyval.BasicBlockVal = yyvsp[-2].BasicBlockVal;
   ;
     break;}
-case 178:
-#line 1897 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 179:
+#line 1904 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     yyvsp[-1].BasicBlockVal->getInstList().push_back(yyvsp[0].InstVal);
     yyval.BasicBlockVal = yyvsp[-1].BasicBlockVal;
   ;
     break;}
-case 179:
-#line 1901 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 180:
+#line 1908 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.BasicBlockVal = CurBB = getBBVal(ValID::create((int)CurFun.NextBBNum++), true);
 
@@ -3340,8 +3357,8 @@
     BBL.splice(BBL.end(), BBL, yyval.BasicBlockVal);
   ;
     break;}
-case 180:
-#line 1911 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 181:
+#line 1918 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.BasicBlockVal = CurBB = getBBVal(ValID::create(yyvsp[0].StrVal), true);
 
@@ -3353,32 +3370,32 @@
     BBL.splice(BBL.end(), BBL, yyval.BasicBlockVal);
   ;
     break;}
-case 181:
-#line 1922 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 182:
+#line 1929 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {              // Return with a result...
     yyval.TermInstVal = new ReturnInst(yyvsp[0].ValueVal);
   ;
     break;}
-case 182:
-#line 1925 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 183:
+#line 1932 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {                                       // Return with no result...
     yyval.TermInstVal = new ReturnInst();
   ;
     break;}
-case 183:
-#line 1928 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 184:
+#line 1935 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {                         // Unconditional Branch...
     yyval.TermInstVal = new BranchInst(getBBVal(yyvsp[0].ValIDVal));
   ;
     break;}
-case 184:
-#line 1931 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 185:
+#line 1938 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {  
     yyval.TermInstVal = new BranchInst(getBBVal(yyvsp[-3].ValIDVal), getBBVal(yyvsp[0].ValIDVal), getVal(Type::BoolTy, yyvsp[-6].ValIDVal));
   ;
     break;}
-case 185:
-#line 1934 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 186:
+#line 1941 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     SwitchInst *S = new SwitchInst(getVal(yyvsp[-7].PrimType, yyvsp[-6].ValIDVal), getBBVal(yyvsp[-3].ValIDVal), yyvsp[-1].JumpTable->size());
     yyval.TermInstVal = S;
@@ -3394,15 +3411,15 @@
     delete yyvsp[-1].JumpTable;
   ;
     break;}
-case 186:
-#line 1948 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 187:
+#line 1955 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     SwitchInst *S = new SwitchInst(getVal(yyvsp[-6].PrimType, yyvsp[-5].ValIDVal), getBBVal(yyvsp[-2].ValIDVal), 0);
     yyval.TermInstVal = S;
   ;
     break;}
-case 187:
-#line 1953 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 188:
+#line 1960 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     const PointerType *PFTy;
     const FunctionType *Ty;
@@ -3456,20 +3473,20 @@
     delete yyvsp[-7].ValueList;
   ;
     break;}
-case 188:
-#line 2005 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 189:
+#line 2012 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.TermInstVal = new UnwindInst();
   ;
     break;}
-case 189:
-#line 2008 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 190:
+#line 2015 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.TermInstVal = new UnreachableInst();
   ;
     break;}
-case 190:
-#line 2014 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 191:
+#line 2021 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.JumpTable = yyvsp[-5].JumpTable;
     Constant *V = cast<Constant>(getValNonImprovising(yyvsp[-4].PrimType, yyvsp[-3].ValIDVal));
@@ -3479,8 +3496,8 @@
     yyval.JumpTable->push_back(std::make_pair(V, getBBVal(yyvsp[0].ValIDVal)));
   ;
     break;}
-case 191:
-#line 2022 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 192:
+#line 2029 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.JumpTable = new std::vector<std::pair<Constant*, BasicBlock*> >();
     Constant *V = cast<Constant>(getValNonImprovising(yyvsp[-4].PrimType, yyvsp[-3].ValIDVal));
@@ -3491,8 +3508,8 @@
     yyval.JumpTable->push_back(std::make_pair(V, getBBVal(yyvsp[0].ValIDVal)));
   ;
     break;}
-case 192:
-#line 2032 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 193:
+#line 2039 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
   // Is this definition named?? if so, assign the name...
   setValueName(yyvsp[0].InstVal, yyvsp[-1].StrVal);
@@ -3500,54 +3517,54 @@
   yyval.InstVal = yyvsp[0].InstVal;
 ;
     break;}
-case 193:
-#line 2039 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 194:
+#line 2046 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {    // Used for PHI nodes
     yyval.PHIList = new std::list<std::pair<Value*, BasicBlock*> >();
     yyval.PHIList->push_back(std::make_pair(getVal(*yyvsp[-5].TypeVal, yyvsp[-3].ValIDVal), getBBVal(yyvsp[-1].ValIDVal)));
     delete yyvsp[-5].TypeVal;
   ;
     break;}
-case 194:
-#line 2044 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 195:
+#line 2051 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.PHIList = yyvsp[-6].PHIList;
     yyvsp[-6].PHIList->push_back(std::make_pair(getVal(yyvsp[-6].PHIList->front().first->getType(), yyvsp[-3].ValIDVal),
                                  getBBVal(yyvsp[-1].ValIDVal)));
   ;
     break;}
-case 195:
-#line 2051 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 196:
+#line 2058 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {    // Used for call statements, and memory insts...
     yyval.ValueList = new std::vector<Value*>();
     yyval.ValueList->push_back(yyvsp[0].ValueVal);
   ;
     break;}
-case 196:
-#line 2055 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 197:
+#line 2062 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.ValueList = yyvsp[-2].ValueList;
     yyvsp[-2].ValueList->push_back(yyvsp[0].ValueVal);
   ;
     break;}
-case 198:
-#line 2061 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 199:
+#line 2068 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 { yyval.ValueList = 0; ;
     break;}
-case 199:
-#line 2063 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 200:
+#line 2070 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.BoolVal = true;
   ;
     break;}
-case 200:
-#line 2066 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 201:
+#line 2073 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.BoolVal = false;
   ;
     break;}
-case 201:
-#line 2072 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 202:
+#line 2079 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     if (!(*yyvsp[-3].TypeVal)->isInteger() && !(*yyvsp[-3].TypeVal)->isFloatingPoint() && 
         !isa<PackedType>((*yyvsp[-3].TypeVal).get()))
@@ -3561,8 +3578,8 @@
     delete yyvsp[-3].TypeVal;
   ;
     break;}
-case 202:
-#line 2084 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 203:
+#line 2091 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     if (!(*yyvsp[-3].TypeVal)->isIntegral()) {
       if (!isa<PackedType>(yyvsp[-3].TypeVal->get()) ||
@@ -3575,8 +3592,8 @@
     delete yyvsp[-3].TypeVal;
   ;
     break;}
-case 203:
-#line 2095 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 204:
+#line 2102 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     if(isa<PackedType>((*yyvsp[-3].TypeVal).get())) {
       ThrowException(
@@ -3588,8 +3605,8 @@
     delete yyvsp[-3].TypeVal;
   ;
     break;}
-case 204:
-#line 2105 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 205:
+#line 2112 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     std::cerr << "WARNING: Use of eliminated 'not' instruction:"
               << " Replacing with 'xor'.\n";
@@ -3603,8 +3620,8 @@
       ThrowException("Could not create a xor instruction!");
   ;
     break;}
-case 205:
-#line 2117 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 206:
+#line 2124 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     if (yyvsp[0].ValueVal->getType() != Type::UByteTy)
       ThrowException("Shift amount must be ubyte!");
@@ -3613,8 +3630,8 @@
     yyval.InstVal = new ShiftInst(yyvsp[-3].OtherOpVal, yyvsp[-2].ValueVal, yyvsp[0].ValueVal);
   ;
     break;}
-case 206:
-#line 2124 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 207:
+#line 2131 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     if (!yyvsp[0].TypeVal->get()->isFirstClassType())
       ThrowException("cast instruction to a non-primitive type: '" +
@@ -3623,8 +3640,8 @@
     delete yyvsp[0].TypeVal;
   ;
     break;}
-case 207:
-#line 2131 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 208:
+#line 2138 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     if (yyvsp[-4].ValueVal->getType() != Type::BoolTy)
       ThrowException("select condition must be boolean!");
@@ -3633,16 +3650,16 @@
     yyval.InstVal = new SelectInst(yyvsp[-4].ValueVal, yyvsp[-2].ValueVal, yyvsp[0].ValueVal);
   ;
     break;}
-case 208:
-#line 2138 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 209:
+#line 2145 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     NewVarArgs = true;
     yyval.InstVal = new VAArgInst(yyvsp[-2].ValueVal, *yyvsp[0].TypeVal);
     delete yyvsp[0].TypeVal;
   ;
     break;}
-case 209:
-#line 2143 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 210:
+#line 2150 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     ObsoleteVarArgs = true;
     const Type* ArgTy = yyvsp[-2].ValueVal->getType();
@@ -3663,8 +3680,8 @@
     delete yyvsp[0].TypeVal;
   ;
     break;}
-case 210:
-#line 2162 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 211:
+#line 2169 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     ObsoleteVarArgs = true;
     const Type* ArgTy = yyvsp[-2].ValueVal->getType();
@@ -3688,8 +3705,19 @@
     delete yyvsp[0].TypeVal;
   ;
     break;}
-case 211:
-#line 2184 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 212:
+#line 2191 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+{
+    if (!isa<PackedType>(yyvsp[-2].ValueVal->getType()))
+      ThrowException("First operand of extractelement must be a "
+                     "packed type val!");
+    if (yyvsp[0].ValueVal->getType() != Type::UIntTy)
+      ThrowException("Second operand of extractelement must be a uint!");
+    yyval.InstVal = new ExtractElementInst(yyvsp[-2].ValueVal, yyvsp[0].ValueVal);
+  ;
+    break;}
+case 213:
+#line 2199 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     const Type *Ty = yyvsp[0].PHIList->front().first->getType();
     if (!Ty->isFirstClassType())
@@ -3705,8 +3733,8 @@
     delete yyvsp[0].PHIList;  // Free the list...
   ;
     break;}
-case 212:
-#line 2198 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 214:
+#line 2213 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     const PointerType *PFTy;
     const FunctionType *Ty;
@@ -3765,66 +3793,66 @@
     delete yyvsp[-1].ValueList;
   ;
     break;}
-case 213:
-#line 2255 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 215:
+#line 2270 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.InstVal = yyvsp[0].InstVal;
   ;
     break;}
-case 214:
-#line 2261 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 216:
+#line 2276 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 { 
     yyval.ValueList = yyvsp[0].ValueList; 
   ;
     break;}
-case 215:
-#line 2263 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 217:
+#line 2278 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 { 
     yyval.ValueList = new std::vector<Value*>(); 
   ;
     break;}
-case 216:
-#line 2267 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 218:
+#line 2282 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.BoolVal = true;
   ;
     break;}
-case 217:
-#line 2270 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 219:
+#line 2285 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.BoolVal = false;
   ;
     break;}
-case 218:
-#line 2276 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 220:
+#line 2291 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.InstVal = new MallocInst(*yyvsp[-1].TypeVal, 0, yyvsp[0].UIntVal);
     delete yyvsp[-1].TypeVal;
   ;
     break;}
-case 219:
-#line 2280 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 221:
+#line 2295 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.InstVal = new MallocInst(*yyvsp[-4].TypeVal, getVal(yyvsp[-2].PrimType, yyvsp[-1].ValIDVal), yyvsp[0].UIntVal);
     delete yyvsp[-4].TypeVal;
   ;
     break;}
-case 220:
-#line 2284 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 222:
+#line 2299 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.InstVal = new AllocaInst(*yyvsp[-1].TypeVal, 0, yyvsp[0].UIntVal);
     delete yyvsp[-1].TypeVal;
   ;
     break;}
-case 221:
-#line 2288 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 223:
+#line 2303 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.InstVal = new AllocaInst(*yyvsp[-4].TypeVal, getVal(yyvsp[-2].PrimType, yyvsp[-1].ValIDVal), yyvsp[0].UIntVal);
     delete yyvsp[-4].TypeVal;
   ;
     break;}
-case 222:
-#line 2292 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 224:
+#line 2307 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     if (!isa<PointerType>(yyvsp[0].ValueVal->getType()))
       ThrowException("Trying to free nonpointer type " + 
@@ -3832,8 +3860,8 @@
     yyval.InstVal = new FreeInst(yyvsp[0].ValueVal);
   ;
     break;}
-case 223:
-#line 2299 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 225:
+#line 2314 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     if (!isa<PointerType>(yyvsp[-1].TypeVal->get()))
       ThrowException("Can't load from nonpointer type: " +
@@ -3845,8 +3873,8 @@
     delete yyvsp[-1].TypeVal;
   ;
     break;}
-case 224:
-#line 2309 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 226:
+#line 2324 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     const PointerType *PT = dyn_cast<PointerType>(yyvsp[-1].TypeVal->get());
     if (!PT)
@@ -3861,8 +3889,8 @@
     delete yyvsp[-1].TypeVal;
   ;
     break;}
-case 225:
-#line 2322 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+case 227:
+#line 2337 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 {
     if (!isa<PointerType>(yyvsp[-2].TypeVal->get()))
       ThrowException("getelementptr insn requires pointer operand!");
@@ -4107,7 +4135,7 @@
     }
   return 1;
 }
-#line 2345 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2360 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
 
 int yyerror(const char *ErrorMsg) {
   std::string where 


Index: llvm/lib/AsmParser/llvmAsmParser.h
diff -u llvm/lib/AsmParser/llvmAsmParser.h:1.12 llvm/lib/AsmParser/llvmAsmParser.h:1.13
--- llvm/lib/AsmParser/llvmAsmParser.h:1.12	Fri Nov 11 18:11:49 2005
+++ llvm/lib/AsmParser/llvmAsmParser.h	Tue Jan 10 13:04:32 2006
@@ -128,8 +128,9 @@
 #define	SHL	345
 #define	SHR	346
 #define	VAARG	347
-#define	VAARG_old	348
-#define	VANEXT_old	349
+#define	EXTRACTELEMENT	348
+#define	VAARG_old	349
+#define	VANEXT_old	350
 
 
 extern YYSTYPE llvmAsmlval;


Index: llvm/lib/AsmParser/llvmAsmParser.y
diff -u llvm/lib/AsmParser/llvmAsmParser.y:1.241 llvm/lib/AsmParser/llvmAsmParser.y:1.242
--- llvm/lib/AsmParser/llvmAsmParser.y:1.241	Wed Dec 21 12:31:29 2005
+++ llvm/lib/AsmParser/llvmAsmParser.y	Tue Jan 10 13:04:32 2006
@@ -979,7 +979,7 @@
 
 // Other Operators
 %type  <OtherOpVal> ShiftOps
-%token <OtherOpVal> PHI_TOK CAST SELECT SHL SHR VAARG
+%token <OtherOpVal> PHI_TOK CAST SELECT SHL SHR VAARG EXTRACTELEMENT
 %token VAARG_old VANEXT_old //OBSOLETE
 
 
@@ -1519,9 +1519,16 @@
     if (!$3->getType()->isInteger())
       ThrowException("Shift constant expression requires integer operand!");
     $$ = ConstantExpr::get($1, $3, $5);
+  }
+  | EXTRACTELEMENT '(' ConstVal ',' ConstVal ')' {
+        if (!isa<PackedType>($3->getType()))
+      ThrowException("First operand of extractelement must be "
+                     "packed type!");
+    if ($5->getType() != Type::UIntTy)
+      ThrowException("Second operand of extractelement must be uint!");
+    $$ = ConstantExpr::getExtractElement($3, $5);
   };
 
-
 // ConstVector - A list of comma separated constants.
 ConstVector : ConstVector ',' ConstVal {
     ($$ = $1)->push_back($3);
@@ -2180,6 +2187,14 @@
     CurBB->getInstList().push_back(tmp);
     $$ = new LoadInst(foo);
     delete $4;
+  }
+  | EXTRACTELEMENT ResolvedVal ',' ResolvedVal {
+    if (!isa<PackedType>($2->getType()))
+      ThrowException("First operand of extractelement must be a "
+                     "packed type val!");
+    if ($4->getType() != Type::UIntTy)
+      ThrowException("Second operand of extractelement must be a uint!");
+    $$ = new ExtractElementInst($2, $4);
   }
   | PHI_TOK PHIList {
     const Type *Ty = $2->front().first->getType();





From alenhar2 at cs.uiuc.edu  Tue Jan 10 13:13:00 2006
From: alenhar2 at cs.uiuc.edu (Andrew Lenharth)
Date: Tue, 10 Jan 2006 13:13:00 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaInstrInfo.td 
Message-ID: <200601101913.NAA30706@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/Alpha:

AlphaInstrInfo.td updated: 1.99 -> 1.100
---
Log message:

Int immediate loading fix

---
Diffs of the changes:  (+1 -1)

 AlphaInstrInfo.td |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/lib/Target/Alpha/AlphaInstrInfo.td
diff -u llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.99 llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.100
--- llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.99	Mon Jan  9 13:49:58 2006
+++ llvm/lib/Target/Alpha/AlphaInstrInfo.td	Tue Jan 10 13:12:47 2006
@@ -828,7 +828,7 @@
           (ZAPNOTi (LDA (SExt16 immSExt16int:$imm), R31), 15)>;
 def : Pat<(i64 immConst2PartInt:$imm),
           (ZAPNOTi (LDA (LL16 (SExt16 immConst2PartInt:$imm)), 
-                        (LDAH (LH16 (SExt16 immConst2PartInt:$imm)), R31)), 15)>;
+                        (LDAH (LH16 (SExt32 immConst2PartInt:$imm)), R31)), 15)>;
 
 
 //TODO: I want to just define these like this!





From bocchino at persephone.cs.uiuc.edu  Tue Jan 10 13:32:05 2006
From: bocchino at persephone.cs.uiuc.edu (Robert L. Bocchino Jr.)
Date: Tue, 10 Jan 2006 13:32:05 -0600 (CST)
Subject: [llvm-commits] CVS: llvm/docs/LangRef.html 
Message-ID: <20060110193205.5BDF31CDACEE@persephone.cs.uiuc.edu>



Changes in directory llvm/docs:

LangRef.html updated: 1.120 -> 1.121
---
Log message:

Expanded the documentation for constant expressions to cover select
and extractelement.



---
Diffs of the changes:  (+11 -1)

 LangRef.html |   12 +++++++++++-
 1 files changed, 11 insertions(+), 1 deletion(-)


Index: llvm/docs/LangRef.html
diff -u llvm/docs/LangRef.html:1.120 llvm/docs/LangRef.html:1.121
--- llvm/docs/LangRef.html:1.120	Thu Jan  5 11:37:02 2006
+++ llvm/docs/LangRef.html	Tue Jan 10 13:31:34 2006
@@ -1086,6 +1086,16 @@
   instruction, the index list may have zero or more indexes, which are required
   to make sense for the type of "CSTPTR".</dd>
 
+  <dt><b><tt>select ( COND, VAL1, VAL2 )</tt></b></dt>
+
+  <dd>Perform the <a href="#i_select">select operation</a> on
+  constants.
+
+  <dt><b><tt>extractelement ( VAL, IDX )</tt></b></dt>
+
+  <dd>Perform the <a href="#i_extractelement">extractelement
+  operation</a> on constants.
+
   <dt><b><tt>OPCODE ( LHS, RHS )</tt></b></dt>
 
   <dd>Perform the specified operation of the LHS and RHS constants. OPCODE may 
@@ -3473,7 +3483,7 @@
 
   <a href="mailto:sabre at nondot.org">Chris Lattner</a><br>
   <a href="http://llvm.cs.uiuc.edu">The LLVM Compiler Infrastructure</a><br>
-  Last modified: $Date: 2006/01/05 17:37:02 $
+  Last modified: $Date: 2006/01/10 19:31:34 $
 </address>
 </body>
 </html>





From lattner at cs.uiuc.edu  Tue Jan 10 13:43:39 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue, 10 Jan 2006 13:43:39 -0600
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp 
Message-ID: <200601101943.NAA30953@zion.cs.uiuc.edu>



Changes in directory llvm/lib/CodeGen/SelectionDAG:

LegalizeDAG.cpp updated: 1.257 -> 1.258
---
Log message:

silence a warning


---
Diffs of the changes:  (+2 -1)

 LegalizeDAG.cpp |    3 ++-
 1 files changed, 2 insertions(+), 1 deletion(-)


Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.257 llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.258
--- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.257	Mon Jan  9 17:21:49 2006
+++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp	Tue Jan 10 13:43:26 2006
@@ -1975,13 +1975,14 @@
     case TargetLowering::Custom: {
       SDOperand Tmp = TLI.LowerOperation(Result, DAG);
       if (Tmp.Val) {
-        SDOperand Tmp2, RetVal;
+        SDOperand Tmp2, RetVal(0,0);
         for (unsigned i = 0, e = Node->getNumValues(); i != e; ++i) {
           Tmp2 = LegalizeOp(Tmp.getValue(i));
           AddLegalizedOperand(SDOperand(Node, i), Tmp2);
           if (i == Op.ResNo)
             RetVal = Tmp;
         }
+        assert(RetVal.Val && "Illegal result number");
         return RetVal;
       }
       // FALLTHROUGH if the target thinks it is legal.





From lattner at cs.uiuc.edu  Tue Jan 10 13:45:30 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue, 10 Jan 2006 13:45:30 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/IA64/IA64ISelLowering.cpp 
Message-ID: <200601101945.NAA30998@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/IA64:

IA64ISelLowering.cpp updated: 1.14 -> 1.15
---
Log message:

silence a bogus warning


---
Diffs of the changes:  (+1 -1)

 IA64ISelLowering.cpp |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/lib/Target/IA64/IA64ISelLowering.cpp
diff -u llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.14 llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.15
--- llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.14	Mon Jan  9 23:26:01 2006
+++ llvm/lib/Target/IA64/IA64ISelLowering.cpp	Tue Jan 10 13:45:18 2006
@@ -300,7 +300,7 @@
     {
       SDOperand Val = Args[i].first;
       MVT::ValueType ObjectVT = Val.getValueType();
-      SDOperand ValToStore(0, 0), ValToConvert;
+      SDOperand ValToStore(0, 0), ValToConvert(0, 0);
       unsigned ObjSize=8;
       switch (ObjectVT) {
       default: assert(0 && "unexpected argument type!");





From lattner at cs.uiuc.edu  Tue Jan 10 14:00:32 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue, 10 Jan 2006 14:00:32 -0600
Subject: [llvm-commits] CVS: llvm/test/Feature/instructions.ll 
Message-ID: <200601102000.OAA31208@zion.cs.uiuc.edu>



Changes in directory llvm/test/Feature:

instructions.ll added (r1.1)
---
Log message:

new testcase for extractelement instruction


---
Diffs of the changes:  (+8 -0)

 instructions.ll |    8 ++++++++
 1 files changed, 8 insertions(+)


Index: llvm/test/Feature/instructions.ll
diff -c /dev/null llvm/test/Feature/instructions.ll:1.1
*** /dev/null	Tue Jan 10 14:00:30 2006
--- llvm/test/Feature/instructions.ll	Tue Jan 10 14:00:20 2006
***************
*** 0 ****
--- 1,8 ----
+ ; RUN: llvm-as %s -o - | llvm-dis > %t1.ll
+ ; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+ ; RUN: diff %t1.ll %t2.ll
+ 
+ uint %test_extractelement(<4 x uint> %V) {
+ 	%R = extractelement <4 x uint> %V, uint 1
+ 	ret uint %R
+ }





From bocchino at persephone.cs.uiuc.edu  Tue Jan 10 14:04:16 2006
From: bocchino at persephone.cs.uiuc.edu (Robert L. Bocchino Jr.)
Date: Tue, 10 Jan 2006 14:04:16 -0600 (CST)
Subject: [llvm-commits] CVS: llvm/lib/VMCore/ConstantFolding.cpp
	ConstantFolding.h Constants.cpp 
Message-ID: <20060110200416.A7DDD1CDBD19@persephone.cs.uiuc.edu>



Changes in directory llvm/lib/VMCore:

ConstantFolding.cpp updated: 1.81 -> 1.82
ConstantFolding.h updated: 1.45 -> 1.46
Constants.cpp updated: 1.143 -> 1.144
---
Log message:

Added constant folding support for the extractelement operation.


---
Diffs of the changes:  (+14 -0)

 ConstantFolding.cpp |   10 ++++++++++
 ConstantFolding.h   |    2 ++
 Constants.cpp       |    2 ++
 3 files changed, 14 insertions(+)


Index: llvm/lib/VMCore/ConstantFolding.cpp
diff -u llvm/lib/VMCore/ConstantFolding.cpp:1.81 llvm/lib/VMCore/ConstantFolding.cpp:1.82
--- llvm/lib/VMCore/ConstantFolding.cpp:1.81	Thu Jan  5 01:49:30 2006
+++ llvm/lib/VMCore/ConstantFolding.cpp	Tue Jan 10 14:03:46 2006
@@ -724,6 +724,16 @@
   return 0;
 }
 
+Constant *llvm::ConstantFoldExtractElementInstruction(const Constant *Val,
+                                                      const Constant *Idx) {
+  if (const ConstantPacked *CVal = dyn_cast<ConstantPacked>(Val)) {
+    if (const ConstantUInt *CIdx = dyn_cast<ConstantUInt>(Idx)) {
+      return const_cast<Constant*>(CVal->getOperand(CIdx->getValue()));
+    }
+  } 
+  return 0;
+}
+
 /// isZeroSizedType - This type is zero sized if its an array or structure of
 /// zero sized types.  The only leaf zero sized type is an empty structure.
 static bool isMaybeZeroSizedType(const Type *Ty) {


Index: llvm/lib/VMCore/ConstantFolding.h
diff -u llvm/lib/VMCore/ConstantFolding.h:1.45 llvm/lib/VMCore/ConstantFolding.h:1.46
--- llvm/lib/VMCore/ConstantFolding.h:1.45	Thu Apr 21 18:46:51 2005
+++ llvm/lib/VMCore/ConstantFolding.h	Tue Jan 10 14:03:46 2006
@@ -31,6 +31,8 @@
   Constant *ConstantFoldSelectInstruction(const Constant *Cond,
                                           const Constant *V1,
                                           const Constant *V2);
+  Constant *ConstantFoldExtractElementInstruction(const Constant *Val,
+                                                  const Constant *Idx);
   Constant *ConstantFoldBinaryInstruction(unsigned Opcode, const Constant *V1,
                                           const Constant *V2);
   Constant *ConstantFoldGetElementPtr(const Constant *C,


Index: llvm/lib/VMCore/Constants.cpp
diff -u llvm/lib/VMCore/Constants.cpp:1.143 llvm/lib/VMCore/Constants.cpp:1.144
--- llvm/lib/VMCore/Constants.cpp:1.143	Tue Jan 10 13:05:24 2006
+++ llvm/lib/VMCore/Constants.cpp	Tue Jan 10 14:03:46 2006
@@ -1403,6 +1403,8 @@
 
 Constant *ConstantExpr::getExtractElementTy(const Type *ReqTy, Constant *Val,
                                             Constant *Idx) {
+  if (Constant *FC = ConstantFoldExtractElementInstruction(Val, Idx))
+    return FC;          // Fold a few common cases...
   // Look up the constant in the table first to ensure uniqueness
   std::vector<Constant*> ArgVec(1, Val);
   ArgVec.push_back(Idx);





From evan.cheng at apple.com  Tue Jan 10 14:27:08 2006
From: evan.cheng at apple.com (Evan Cheng)
Date: Tue, 10 Jan 2006 14:27:08 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
	X86ISelLowering.cpp X86InstrInfo.td 
Message-ID: <200601102027.OAA31321@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/X86:

X86ISelDAGToDAG.cpp updated: 1.25 -> 1.26
X86ISelLowering.cpp updated: 1.25 -> 1.26
X86InstrInfo.td updated: 1.192 -> 1.193
---
Log message:

FP_TO_INT*_IN_MEM and x87 FP Select support.


---
Diffs of the changes:  (+131 -21)

 X86ISelDAGToDAG.cpp |   58 ++++++++++++++++++++++++++++++++++++++++++++++++++++
 X86ISelLowering.cpp |   53 +++++++++++++++++++++++++++++++++++++----------
 X86InstrInfo.td     |   41 +++++++++++++++++++++++++++---------
 3 files changed, 131 insertions(+), 21 deletions(-)


Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
diff -u llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.25 llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.26
--- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.25	Mon Jan  9 17:10:28 2006
+++ llvm/lib/Target/X86/X86ISelDAGToDAG.cpp	Tue Jan 10 14:26:56 2006
@@ -18,6 +18,7 @@
 #include "llvm/GlobalValue.h"
 #include "llvm/CodeGen/MachineConstantPool.h"
 #include "llvm/CodeGen/MachineFunction.h"
+#include "llvm/CodeGen/MachineFrameInfo.h"
 #include "llvm/CodeGen/SelectionDAGISel.h"
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/Support/Debug.h"
@@ -550,6 +551,63 @@
         return CodeGenMap[N] = CurDAG->getTargetNode(Opc, VT, Result);
       break;
     }
+
+    case X86ISD::FP_TO_INT16_IN_MEM:
+    case X86ISD::FP_TO_INT32_IN_MEM:
+    case X86ISD::FP_TO_INT64_IN_MEM: {
+      assert(N.getOperand(1).getValueType() == MVT::f64);
+
+      // Change the floating point control register to use "round towards zero"
+      // mode when truncating to an integer value.
+      MachineFunction &MF = CurDAG->getMachineFunction();
+      int CWFI = MF.getFrameInfo()->CreateStackObject(2, 2);
+      SDOperand CWSlot = CurDAG->getFrameIndex(CWFI, MVT::i32);
+      SDOperand Base, Scale, Index, Disp;
+      (void)SelectAddr(CWSlot, Base, Scale, Index, Disp);
+      SDOperand Chain = N.getOperand(0);
+
+      // Save the control word.
+      Chain = CurDAG->getTargetNode(X86::FNSTCW16m, MVT::Other,
+                                    Base, Scale, Index, Disp, Chain);
+
+      // Load the old value of the high byte of the control word.
+      SDOperand OldCW =
+        CurDAG->getTargetNode(X86::MOV16rm, MVT::i16, MVT::Other,
+                              Base, Scale, Index, Disp, Chain);
+      Chain = OldCW.getValue(1);
+
+      // Set the high part to be round to zero...
+      Chain = CurDAG->getTargetNode(X86::MOV16mi, MVT::Other,
+                                    Base, Scale, Index, Disp, 
+                                    CurDAG->getConstant(0xC7F, MVT::i16),
+                                    Chain);
+
+      // Reload the modified control word now...
+      Chain = CurDAG->getTargetNode(X86::FLDCW16m, MVT::Other,
+                                    Base, Scale, Index, Disp, Chain);
+
+      // Restore the memory image of control word to original value
+      Chain = CurDAG->getTargetNode(X86::MOV16mr, MVT::Other, 
+                                    Base, Scale, Index, Disp, OldCW, Chain);
+
+      switch (Opcode) {
+      case X86ISD::FP_TO_INT16_IN_MEM: Opc = X86::FpIST16m; break;
+      case X86ISD::FP_TO_INT32_IN_MEM: Opc = X86::FpIST32m; break;
+      case X86ISD::FP_TO_INT64_IN_MEM: Opc = X86::FpIST64m; break;
+      }
+
+      SDOperand N1 = Select(N.getOperand(1));
+      SDOperand Base2, Scale2, Index2, Disp2;
+      (void)SelectAddr(N.getOperand(2), Base2, Scale2, Index2, Disp2);
+      Chain = CurDAG->getTargetNode(Opc, MVT::Other,
+                                    Base2, Scale2, Index2, Disp2, N1, Chain);
+
+      // Reload the modified control word now...
+      CodeGenMap[N] =
+        Chain = CurDAG->getTargetNode(X86::FLDCW16m, MVT::Other,
+                                      Base, Scale, Index, Disp, Chain);
+      return Chain;
+    }
   }
 
   return SelectCode(N);


Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.25 llvm/lib/Target/X86/X86ISelLowering.cpp:1.26
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.25	Mon Jan  9 16:29:54 2006
+++ llvm/lib/Target/X86/X86ISelLowering.cpp	Tue Jan 10 14:26:56 2006
@@ -1192,6 +1192,26 @@
   return X86CC;
 }
 
+/// SupportedByFPCMOV - is there a floating point cmov for the specific
+/// X86 condition code.
+/// Current x86 isa includes the following FP cmov instructions:
+/// fcmovb, fcomvbe, fcomve, fcmovu, fcmovae, fcmova, fcmovne, fcmovnu.
+static bool SupportedByFPCMOV(unsigned X86CC) {
+  switch (X86CC) {
+  default:
+    return false;
+  case X86ISD::COND_B:
+  case X86ISD::COND_BE:
+  case X86ISD::COND_E:
+  case X86ISD::COND_P:
+  case X86ISD::COND_A:
+  case X86ISD::COND_AE:
+  case X86ISD::COND_NE:
+  case X86ISD::COND_NP:
+    return true;
+  }
+}
+
 /// LowerOperation - Provide custom lowering hooks for some operations.
 ///
 SDOperand X86TargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) {
@@ -1444,21 +1464,32 @@
     }
   }
   case ISD::SELECT: {
-    SDOperand Cond  = Op.getOperand(0);
-    SDOperand CC;
-    if (Cond.getOpcode() == X86ISD::SETCC) {
-      CC = Cond.getOperand(0);
-      Cond = Cond.getOperand(1);
-    } else if (Cond.getOpcode() == ISD::SETCC) {
-      CC = Cond.getOperand(2);
-      bool isFP = MVT::isFloatingPoint(Cond.getOperand(1).getValueType());
+    MVT::ValueType VT = Op.getValueType();
+    bool isFP      = MVT::isFloatingPoint(VT);
+    bool isFPStack = isFP && (X86Vector < SSE2);
+    bool isFPSSE   = isFP && (X86Vector >= SSE2);
+    bool isValid   = false;
+    SDOperand Op0 = Op.getOperand(0);
+    SDOperand Cond, CC;
+    if (Op0.getOpcode() == X86ISD::SETCC) {
+      CC   = Op0.getOperand(0);
+      Cond = Op0.getOperand(1);
+      isValid =
+        !(isFPStack &&
+          !SupportedByFPCMOV(cast<ConstantSDNode>(CC)->getSignExtended()));
+    } else if (Op0.getOpcode() == ISD::SETCC) {
+      CC = Op0.getOperand(2);
+      bool isFP = MVT::isFloatingPoint(Op0.getOperand(1).getValueType());
       unsigned X86CC = CCToX86CondCode(CC, isFP);
       CC = DAG.getConstant(X86CC, MVT::i8);
       Cond = DAG.getNode(X86ISD::CMP, MVT::Flag,
-                         Cond.getOperand(0), Cond.getOperand(1));
-    } else {
+                         Op0.getOperand(0), Op0.getOperand(1));
+      isValid = true;
+    }
+
+    if (!isValid) {
       CC = DAG.getConstant(X86ISD::COND_E, MVT::i8);
-      Cond = DAG.getNode(X86ISD::TEST, MVT::Flag, Cond, Cond);
+      Cond = DAG.getNode(X86ISD::TEST, MVT::Flag, Op0, Op0);
     }
 
     std::vector<MVT::ValueType> Tys;


Index: llvm/lib/Target/X86/X86InstrInfo.td
diff -u llvm/lib/Target/X86/X86InstrInfo.td:1.192 llvm/lib/Target/X86/X86InstrInfo.td:1.193
--- llvm/lib/Target/X86/X86InstrInfo.td:1.192	Mon Jan  9 17:10:28 2006
+++ llvm/lib/Target/X86/X86InstrInfo.td	Tue Jan 10 14:26:56 2006
@@ -377,6 +377,13 @@
 def IMPLICIT_DEF_R32  : I<0, Pseudo, (ops R32:$dst),
                          "#IMPLICIT_DEF $dst",
                          [(set R32:$dst, (undef))]>;
+def IMPLICIT_DEF_FR32 : I<0, Pseudo, (ops FR32:$dst),
+                         "#IMPLICIT_DEF $dst",
+                         [(set FR32:$dst, (undef))]>, Requires<[HasSSE2]>;
+def IMPLICIT_DEF_FR64 : I<0, Pseudo, (ops FR64:$dst),
+                         "#IMPLICIT_DEF $dst",
+                         [(set FR64:$dst, (undef))]>, Requires<[HasSSE2]>;
+
 
 let isTerminator = 1 in
   let Defs = [FP0, FP1, FP2, FP3, FP4, FP5, FP6] in
@@ -2687,14 +2694,30 @@
 
 // Floating point cmovs.
 let isTwoAddress = 1 in {
-  def FpCMOVB  : FpI<(ops RST:$dst, RFP:$src1, RFP:$src2), CondMovFP, []>;
-  def FpCMOVBE : FpI<(ops RST:$dst, RFP:$src1, RFP:$src2), CondMovFP, []>;
-  def FpCMOVE  : FpI<(ops RST:$dst, RFP:$src1, RFP:$src2), CondMovFP, []>;
-  def FpCMOVP  : FpI<(ops RST:$dst, RFP:$src1, RFP:$src2), CondMovFP, []>;
-  def FpCMOVAE : FpI<(ops RST:$dst, RFP:$src1, RFP:$src2), CondMovFP, []>;
-  def FpCMOVA  : FpI<(ops RST:$dst, RFP:$src1, RFP:$src2), CondMovFP, []>;
-  def FpCMOVNE : FpI<(ops RST:$dst, RFP:$src1, RFP:$src2), CondMovFP, []>;
-  def FpCMOVNP : FpI<(ops RST:$dst, RFP:$src1, RFP:$src2), CondMovFP, []>;
+  def FpCMOVB  : FpI<(ops RFP:$dst, RFP:$src1, RFP:$src2), CondMovFP,
+                     [(set RFP:$dst, (X86cmov RFP:$src1, RFP:$src2,
+                                      X86_COND_B, STATUS))]>;
+  def FpCMOVBE : FpI<(ops RFP:$dst, RFP:$src1, RFP:$src2), CondMovFP,
+                     [(set RFP:$dst, (X86cmov RFP:$src1, RFP:$src2,
+                                      X86_COND_BE, STATUS))]>;
+  def FpCMOVE  : FpI<(ops RFP:$dst, RFP:$src1, RFP:$src2), CondMovFP,
+                     [(set RFP:$dst, (X86cmov RFP:$src1, RFP:$src2,
+                                      X86_COND_E, STATUS))]>;
+  def FpCMOVP  : FpI<(ops RFP:$dst, RFP:$src1, RFP:$src2), CondMovFP,
+                     [(set RFP:$dst, (X86cmov RFP:$src1, RFP:$src2,
+                                      X86_COND_P, STATUS))]>;
+  def FpCMOVAE : FpI<(ops RFP:$dst, RFP:$src1, RFP:$src2), CondMovFP,
+                     [(set RFP:$dst, (X86cmov RFP:$src1, RFP:$src2,
+                                      X86_COND_AE, STATUS))]>;
+  def FpCMOVA  : FpI<(ops RFP:$dst, RFP:$src1, RFP:$src2), CondMovFP,
+                     [(set RFP:$dst, (X86cmov RFP:$src1, RFP:$src2,
+                                      X86_COND_A, STATUS))]>;
+  def FpCMOVNE : FpI<(ops RFP:$dst, RFP:$src1, RFP:$src2), CondMovFP,
+                     [(set RFP:$dst, (X86cmov RFP:$src1, RFP:$src2,
+                                      X86_COND_NE, STATUS))]>;
+  def FpCMOVNP : FpI<(ops RFP:$dst, RFP:$src1, RFP:$src2), CondMovFP,
+                     [(set RFP:$dst, (X86cmov RFP:$src1, RFP:$src2,
+                                      X86_COND_NP, STATUS))]>;
 }
 
 def FCMOVB  : FPI<0xC0, AddRegFrm, (ops RST:$op),
@@ -2866,8 +2889,6 @@
 def : Pat<(f64 fp64immneg0), (FpCHS (FpLD0))>, Requires<[FPStack]>;
 def : Pat<(f64 fp64immneg1), (FpCHS (FpLD1))>, Requires<[FPStack]>;
 
-// FR64 undef
-def : Pat<(f64 (undef)), (FLD0SD)>, Requires<[HasSSE2]>;
 // RFP undef
 def : Pat<(f64 (undef)), (FpLD0)>,  Requires<[FPStack]>;
 





From evan.cheng at apple.com  Tue Jan 10 16:22:15 2006
From: evan.cheng at apple.com (Evan Cheng)
Date: Tue, 10 Jan 2006 16:22:15 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86FloatingPoint.cpp
	X86InstrInfo.td 
Message-ID: <200601102222.QAA31930@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/X86:

X86FloatingPoint.cpp updated: 1.45 -> 1.46
X86InstrInfo.td updated: 1.193 -> 1.194
---
Log message:

* fp to sint patterns.
* fiadd, fisub, etc.


---
Diffs of the changes:  (+119 -56)

 X86FloatingPoint.cpp |   92 ++++++++++++++++++++++++++++-----------------------
 X86InstrInfo.td      |   83 +++++++++++++++++++++++++++++++++++++---------
 2 files changed, 119 insertions(+), 56 deletions(-)


Index: llvm/lib/Target/X86/X86FloatingPoint.cpp
diff -u llvm/lib/Target/X86/X86FloatingPoint.cpp:1.45 llvm/lib/Target/X86/X86FloatingPoint.cpp:1.46
--- llvm/lib/Target/X86/X86FloatingPoint.cpp:1.45	Wed Dec 21 01:47:04 2005
+++ llvm/lib/Target/X86/X86FloatingPoint.cpp	Tue Jan 10 16:22:02 2006
@@ -320,46 +320,58 @@
 // concrete X86 instruction which uses the register stack.
 //
 static const TableEntry OpcodeTable[] = {
-  { X86::FpABS    , X86::FABS     },
-  { X86::FpADD32m , X86::FADD32m  },
-  { X86::FpADD64m , X86::FADD64m  },
-  { X86::FpCHS    , X86::FCHS     },
-  { X86::FpCMOVA  , X86::FCMOVA   },
-  { X86::FpCMOVAE , X86::FCMOVAE  },
-  { X86::FpCMOVB  , X86::FCMOVB   },
-  { X86::FpCMOVBE , X86::FCMOVBE  },
-  { X86::FpCMOVE  , X86::FCMOVE   },
-  { X86::FpCMOVNE , X86::FCMOVNE  },
-  { X86::FpCMOVNP , X86::FCMOVNP  },
-  { X86::FpCMOVP  , X86::FCMOVP   },
-  { X86::FpCOS    , X86::FCOS     },
-  { X86::FpDIV32m , X86::FDIV32m  },
-  { X86::FpDIV64m , X86::FDIV64m  },
-  { X86::FpDIVR32m, X86::FDIVR32m },
-  { X86::FpDIVR64m, X86::FDIVR64m },
-  { X86::FpILD16m , X86::FILD16m  },
-  { X86::FpILD32m , X86::FILD32m  },
-  { X86::FpILD64m , X86::FILD64m  },
-  { X86::FpIST16m , X86::FIST16m  },
-  { X86::FpIST32m , X86::FIST32m  },
-  { X86::FpIST64m , X86::FISTP64m },
-  { X86::FpLD0    , X86::FLD0     },
-  { X86::FpLD1    , X86::FLD1     },
-  { X86::FpLD32m  , X86::FLD32m   },
-  { X86::FpLD64m  , X86::FLD64m   },
-  { X86::FpMUL32m , X86::FMUL32m  },
-  { X86::FpMUL64m , X86::FMUL64m  },
-  { X86::FpSIN    , X86::FSIN     },
-  { X86::FpSQRT   , X86::FSQRT    },
-  { X86::FpST32m  , X86::FST32m   },
-  { X86::FpST64m  , X86::FST64m   },
-  { X86::FpSUB32m , X86::FSUB32m  },
-  { X86::FpSUB64m , X86::FSUB64m  },
-  { X86::FpSUBR32m, X86::FSUBR32m },
-  { X86::FpSUBR64m, X86::FSUBR64m },
-  { X86::FpTST    , X86::FTST     },
-  { X86::FpUCOMIr , X86::FUCOMIr  },
-  { X86::FpUCOMr  , X86::FUCOMr   },
+  { X86::FpABS     , X86::FABS     },
+  { X86::FpADD32m  , X86::FADD32m  },
+  { X86::FpADD64m  , X86::FADD64m  },
+  { X86::FpCHS     , X86::FCHS     },
+  { X86::FpCMOVA   , X86::FCMOVA   },
+  { X86::FpCMOVAE  , X86::FCMOVAE  },
+  { X86::FpCMOVB   , X86::FCMOVB   },
+  { X86::FpCMOVBE  , X86::FCMOVBE  },
+  { X86::FpCMOVE   , X86::FCMOVE   },
+  { X86::FpCMOVNE  , X86::FCMOVNE  },
+  { X86::FpCMOVNP  , X86::FCMOVNP  },
+  { X86::FpCMOVP   , X86::FCMOVP   },
+  { X86::FpCOS     , X86::FCOS     },
+  { X86::FpDIV32m  , X86::FDIV32m  },
+  { X86::FpDIV64m  , X86::FDIV64m  },
+  { X86::FpDIVR32m , X86::FDIVR32m },
+  { X86::FpDIVR64m , X86::FDIVR64m },
+  { X86::FpIADD16m , X86::FIADD16m },
+  { X86::FpIADD32m , X86::FIADD32m },
+  { X86::FpIDIV16m , X86::FIDIV16m },
+  { X86::FpIDIV32m , X86::FIDIV32m },
+  { X86::FpIDIVR16m, X86::FIDIVR16m},
+  { X86::FpIDIVR32m, X86::FIDIVR32m},
+  { X86::FpILD16m  , X86::FILD16m  },
+  { X86::FpILD32m  , X86::FILD32m  },
+  { X86::FpILD64m  , X86::FILD64m  },
+  { X86::FpIMUL16m , X86::FIMUL16m },
+  { X86::FpIMUL32m , X86::FIMUL32m },
+  { X86::FpIST16m  , X86::FIST16m  },
+  { X86::FpIST32m  , X86::FIST32m  },
+  { X86::FpIST64m  , X86::FISTP64m },
+  { X86::FpISUB16m , X86::FISUB16m },
+  { X86::FpISUB32m , X86::FISUB32m },
+  { X86::FpISUBR16m, X86::FISUBR16m},
+  { X86::FpISUBR32m, X86::FISUBR32m},
+  { X86::FpLD0     , X86::FLD0     },
+  { X86::FpLD1     , X86::FLD1     },
+  { X86::FpLD32m   , X86::FLD32m   },
+  { X86::FpLD64m   , X86::FLD64m   },
+  { X86::FpMUL32m  , X86::FMUL32m  },
+  { X86::FpMUL64m  , X86::FMUL64m  },
+  { X86::FpSIN     , X86::FSIN     },
+  { X86::FpSQRT    , X86::FSQRT    },
+  { X86::FpST32m   , X86::FST32m   },
+  { X86::FpST64m   , X86::FST64m   },
+  { X86::FpSUB32m  , X86::FSUB32m  },
+  { X86::FpSUB64m  , X86::FSUB64m  },
+  { X86::FpSUBR32m , X86::FSUBR32m },
+  { X86::FpSUBR64m , X86::FSUBR64m },
+  { X86::FpTST     , X86::FTST     },
+  { X86::FpUCOMIr  , X86::FUCOMIr  },
+  { X86::FpUCOMr   , X86::FUCOMr   },
 };
 
 static unsigned getConcreteOpcode(unsigned Opcode) {


Index: llvm/lib/Target/X86/X86InstrInfo.td
diff -u llvm/lib/Target/X86/X86InstrInfo.td:1.193 llvm/lib/Target/X86/X86InstrInfo.td:1.194
--- llvm/lib/Target/X86/X86InstrInfo.td:1.193	Tue Jan 10 14:26:56 2006
+++ llvm/lib/Target/X86/X86InstrInfo.td	Tue Jan 10 16:22:02 2006
@@ -50,6 +50,7 @@
                                          SDTCisPtrTy<1>, SDTCisVT<2, OtherVT>]>;
 def SDTX86Fst     : SDTypeProfile<0, 3, [SDTCisFP<0>,
                                          SDTCisPtrTy<1>, SDTCisVT<2, OtherVT>]>;
+def SDTX86Fild64m : SDTypeProfile<1, 1, [SDTCisVT<0, f64>, SDTCisPtrTy<1>]>;
 
 def SDTX86RdTsc   : SDTypeProfile<0, 0, []>;
 
@@ -95,6 +96,8 @@
                         [SDNPHasChain]>;
 def X86fst     : SDNode<"X86ISD::FST",      SDTX86Fst,
                         [SDNPHasChain]>;
+def X86fild64m : SDNode<"X86ISD::FILD64m",  SDTX86Fild64m,
+                        [SDNPHasChain]>;
 
 def X86rdtsc   : SDNode<"X86ISD::RDTSC_DAG",SDTX86RdTsc,
                         [SDNPHasChain, SDNPOutFlag]>;
@@ -2633,19 +2636,67 @@
 def FDIVR64m : FPI<0xDC, MRM7m, (ops f64mem:$src), "fdivr{l} $src">;
 
 // FIXME: Implement these when we have a dag-dag isel!
-//def FIADD16m  : FPI<0xDE, MRM0m>;    // ST(0) = ST(0) + [mem16int]
-//def FIADD32m  : FPI<0xDA, MRM0m>;    // ST(0) = ST(0) + [mem32int]
-//def FIMUL16m  : FPI<0xDE, MRM1m>;    // ST(0) = ST(0) * [mem16]
-//def FIMUL32m  : FPI<0xDA, MRM1m>;    // ST(0) = ST(0) * [mem32]
-//def FISUB16m  : FPI<0xDE, MRM4m>;    // ST(0) = ST(0) - [mem16int]
-//def FISUB32m  : FPI<0xDA, MRM4m>;    // ST(0) = ST(0) - [mem32int]
-//def FISUBR16m : FPI<0xDE, MRM5m>;    // ST(0) = [mem16int] - ST(0)
-//def FISUBR32m : FPI<0xDA, MRM5m>;    // ST(0) = [mem32int] - ST(0)
-//def FIDIV16m  : FPI<0xDE, MRM6m>;    // ST(0) = ST(0) / [mem16int]
-//def FIDIV32m  : FPI<0xDA, MRM6m>;    // ST(0) = ST(0) / [mem32int]
-//def FIDIVR16m : FPI<0xDE, MRM7m>;    // ST(0) = [mem16int] / ST(0)
-//def FIDIVR32m : FPI<0xDA, MRM7m>;    // ST(0) = [mem32int] / ST(0)
-
+def FpIADD16m : FpI<(ops RFP:$dst, RFP:$src1, i16mem:$src2), OneArgFPRW,
+                    [(set RFP:$dst, (fadd RFP:$src1,
+                                     (sint_to_fp (loadi16 addr:$src2))))]>;
+                // ST(0) = ST(0) + [mem16int]
+def FpIADD32m : FpI<(ops RFP:$dst, RFP:$src1, i16mem:$src2), OneArgFPRW,
+                    [(set RFP:$dst, (fadd RFP:$src1,
+                                     (sint_to_fp (loadi32 addr:$src2))))]>;
+                // ST(0) = ST(0) + [mem32int]
+def FpIMUL16m : FpI<(ops RFP:$dst, RFP:$src1, i16mem:$src2), OneArgFPRW,
+                    [(set RFP:$dst, (fmul RFP:$src1,
+                                     (sint_to_fp (loadi16 addr:$src2))))]>;
+                // ST(0) = ST(0) * [mem16int]
+def FpIMUL32m : FpI<(ops RFP:$dst, RFP:$src1, i16mem:$src2), OneArgFPRW,
+                    [(set RFP:$dst, (fmul RFP:$src1,
+                                     (sint_to_fp (loadi32 addr:$src2))))]>;
+                // ST(0) = ST(0) * [mem32int]
+def FpISUB16m : FpI<(ops RFP:$dst, RFP:$src1, i16mem:$src2), OneArgFPRW,
+                    [(set RFP:$dst, (fsub RFP:$src1,
+                                     (sint_to_fp (loadi16 addr:$src2))))]>;
+                // ST(0) = ST(0) - [mem16int]
+def FpISUB32m : FpI<(ops RFP:$dst, RFP:$src1, i16mem:$src2), OneArgFPRW,
+                    [(set RFP:$dst, (fsub RFP:$src1,
+                                     (sint_to_fp (loadi32 addr:$src2))))]>;
+                // ST(0) = ST(0) - [mem32int]
+def FpISUBR16m : FpI<(ops RFP:$dst, RFP:$src1, i16mem:$src2), OneArgFPRW,
+                     [(set RFP:$dst, (fsub (sint_to_fp (loadi16 addr:$src2)),
+                                      RFP:$src1))]>;
+                // ST(0) = [mem16int] - ST(0)
+def FpISUBR32m : FpI<(ops RFP:$dst, RFP:$src1, i16mem:$src2), OneArgFPRW,
+                     [(set RFP:$dst, (fsub (sint_to_fp (loadi32 addr:$src2)),
+                                      RFP:$src1))]>;
+                // ST(0) = [mem32int] - ST(0)
+def FpIDIV16m : FpI<(ops RFP:$dst, RFP:$src1, i16mem:$src2), OneArgFPRW,
+                    [(set RFP:$dst, (fdiv RFP:$src1,
+                                     (sint_to_fp (loadi16 addr:$src2))))]>;
+                // ST(0) = ST(0) / [mem16int]
+def FpIDIV32m : FpI<(ops RFP:$dst, RFP:$src1, i16mem:$src2), OneArgFPRW,
+                    [(set RFP:$dst, (fdiv RFP:$src1,
+                                     (sint_to_fp (loadi32 addr:$src2))))]>;
+                // ST(0) = ST(0) / [mem32int]
+def FpIDIVR16m : FpI<(ops RFP:$dst, RFP:$src1, i16mem:$src2), OneArgFPRW,
+                     [(set RFP:$dst, (fdiv (sint_to_fp (loadi16 addr:$src2)),
+                                      RFP:$src1))]>;
+                // ST(0) = [mem16int] / ST(0)
+def FpIDIVR32m : FpI<(ops RFP:$dst, RFP:$src1, i16mem:$src2), OneArgFPRW,
+                     [(set RFP:$dst, (fdiv (sint_to_fp (loadi32 addr:$src2)),
+                                      RFP:$src1))]>;
+                // ST(0) = [mem32int] / ST(0)
+
+def FIADD16m  : FPI<0xDE, MRM0m, (ops i16mem:$src), "fiadd{s} $src">;
+def FIADD32m  : FPI<0xDA, MRM0m, (ops i32mem:$src), "fiadd{l} $src">;
+def FIMUL16m  : FPI<0xDE, MRM1m, (ops i16mem:$src), "fimul{s} $src">;
+def FIMUL32m  : FPI<0xDA, MRM1m, (ops i32mem:$src), "fimul{l} $src">;
+def FISUB16m  : FPI<0xDE, MRM4m, (ops i16mem:$src), "fisub{s} $src">;
+def FISUB32m  : FPI<0xDA, MRM4m, (ops i32mem:$src), "fisub{l} $src">;
+def FISUBR16m : FPI<0xDE, MRM5m, (ops i16mem:$src), "fisubr{s} $src">;
+def FISUBR32m : FPI<0xDA, MRM5m, (ops i32mem:$src), "fisubr{l} $src">;
+def FIDIV16m  : FPI<0xDE, MRM6m, (ops i16mem:$src), "fidiv{s} $src">;
+def FIDIV32m  : FPI<0xDA, MRM6m, (ops i32mem:$src), "fidiv{s} $src">;
+def FIDIVR16m : FPI<0xDE, MRM7m, (ops i16mem:$src), "fidivr{s} $src">;
+def FIDIVR32m : FPI<0xDA, MRM7m, (ops i32mem:$src), "fidivr{s} $src">;
 
 // NOTE: GAS and apparently all other AT&T style assemblers have a broken notion
 // of some of the 'reverse' forms of the fsub and fdiv instructions.  As such,
@@ -2743,11 +2794,11 @@
 def FpLD64m  : FpI<(ops RFP:$dst, f64mem:$src), ZeroArgFP,
                    [(set RFP:$dst, (loadf64 addr:$src))]>;
 def FpILD16m : FpI<(ops RFP:$dst, i16mem:$src), ZeroArgFP,
-                   []>;
+                   [(set RFP:$dst, (sint_to_fp (loadi16 addr:$src)))]>;
 def FpILD32m : FpI<(ops RFP:$dst, i32mem:$src), ZeroArgFP,
-                   []>;
+                   [(set RFP:$dst, (sint_to_fp (loadi32 addr:$src)))]>;
 def FpILD64m : FpI<(ops RFP:$dst, i64mem:$src), ZeroArgFP,
-                   []>;
+                   [(set RFP:$dst, (X86fild64m addr:$src))]>;
 
 def FpST32m   : FpI<(ops f32mem:$op, RFP:$src), OneArgFP,
                 [(truncstore RFP:$src, addr:$op, f32)]>;





From evan.cheng at apple.com  Tue Jan 10 18:33:48 2006
From: evan.cheng at apple.com (Evan Cheng)
Date: Tue, 10 Jan 2006 18:33:48 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp
	X86ISelLowering.h X86InstrInfo.td 
Message-ID: <200601110033.SAA01285@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/X86:

X86ISelLowering.cpp updated: 1.26 -> 1.27
X86ISelLowering.h updated: 1.12 -> 1.13
X86InstrInfo.td updated: 1.194 -> 1.195
---
Log message:

SSE cmov support.


---
Diffs of the changes:  (+121 -17)

 X86ISelLowering.cpp |  109 ++++++++++++++++++++++++++++++++++++++++++++--------
 X86ISelLowering.h   |    3 +
 X86InstrInfo.td     |   26 +++++++++++-
 3 files changed, 121 insertions(+), 17 deletions(-)


Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.26 llvm/lib/Target/X86/X86ISelLowering.cpp:1.27
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.26	Tue Jan 10 14:26:56 2006
+++ llvm/lib/Target/X86/X86ISelLowering.cpp	Tue Jan 10 18:33:36 2006
@@ -17,8 +17,9 @@
 #include "X86TargetMachine.h"
 #include "llvm/CallingConv.h"
 #include "llvm/Function.h"
-#include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/MachineFrameInfo.h"
+#include "llvm/CodeGen/MachineFunction.h"
+#include "llvm/CodeGen/MachineInstrBuilder.h"
 #include "llvm/CodeGen/SelectionDAG.h"
 #include "llvm/CodeGen/SSARegMap.h"
 #include "llvm/Target/TargetOptions.h"
@@ -1140,14 +1141,34 @@
   return std::make_pair(Result, Chain);
 }
 
-//===----------------------------------------------------------------------===//
-//                           X86 Custom Lowering Hooks
-//===----------------------------------------------------------------------===//
+/// getCondBrOpcodeForX86CC - Returns the X86 conditional branch opcode
+/// which corresponds to the condition code.
+static unsigned getCondBrOpcodeForX86CC(unsigned X86CC) {
+  switch (X86CC) {
+  default: assert(0 && "Unknown X86 conditional code!");
+  case X86ISD::COND_A:  return X86::JA;
+  case X86ISD::COND_AE: return X86::JAE;
+  case X86ISD::COND_B:  return X86::JB;
+  case X86ISD::COND_BE: return X86::JBE;
+  case X86ISD::COND_E:  return X86::JE;
+  case X86ISD::COND_G:  return X86::JG;
+  case X86ISD::COND_GE: return X86::JGE;
+  case X86ISD::COND_L:  return X86::JL;
+  case X86ISD::COND_LE: return X86::JLE;
+  case X86ISD::COND_NE: return X86::JNE;
+  case X86ISD::COND_NO: return X86::JNO;
+  case X86ISD::COND_NP: return X86::JNP;
+  case X86ISD::COND_NS: return X86::JNS;
+  case X86ISD::COND_O:  return X86::JO;
+  case X86ISD::COND_P:  return X86::JP;
+  case X86ISD::COND_S:  return X86::JS;
+  }
+}
 
-/// SetCCToX86CondCode - do a one to one translation of a ISD::CondCode to
-/// X86 specific CondCode. It returns a X86ISD::COND_INVALID if it cannot
+/// getX86CC - do a one to one translation of a ISD::CondCode to the X86
+/// specific condition code. It returns a X86ISD::COND_INVALID if it cannot
 /// do a direct translation.
-static unsigned CCToX86CondCode(SDOperand CC, bool isFP) {
+static unsigned getX86CC(SDOperand CC, bool isFP) {
   ISD::CondCode SetCCOpcode = cast<CondCodeSDNode>(CC)->get();
   unsigned X86CC = X86ISD::COND_INVALID;
   if (!isFP) {
@@ -1192,11 +1213,10 @@
   return X86CC;
 }
 
-/// SupportedByFPCMOV - is there a floating point cmov for the specific
-/// X86 condition code.
-/// Current x86 isa includes the following FP cmov instructions:
+/// hasFPCMov - is there a floating point cmov for the specific X86 condition
+/// code. Current x86 isa includes the following FP cmov instructions:
 /// fcmovb, fcomvbe, fcomve, fcmovu, fcmovae, fcmova, fcmovne, fcmovnu.
-static bool SupportedByFPCMOV(unsigned X86CC) {
+static bool hasFPCMov(unsigned X86CC) {
   switch (X86CC) {
   default:
     return false;
@@ -1212,6 +1232,64 @@
   }
 }
 
+MachineBasicBlock *
+X86TargetLowering::InsertAtEndOfBasicBlock(MachineInstr *MI,
+                                           MachineBasicBlock *BB) {
+  assert((MI->getOpcode() == X86::CMOV_FR32 ||
+          MI->getOpcode() == X86::CMOV_FR64) &&
+         "Unexpected instr type to insert");
+
+  // To "insert" a SELECT_CC instruction, we actually have to insert the diamond
+  // control-flow pattern.  The incoming instruction knows the destination vreg
+  // to set, the condition code register to branch on, the true/false values to
+  // select between, and a branch opcode to use.
+  const BasicBlock *LLVM_BB = BB->getBasicBlock();
+  ilist<MachineBasicBlock>::iterator It = BB;
+  ++It;
+  
+  //  thisMBB:
+  //  ...
+  //   TrueVal = ...
+  //   cmpTY ccX, r1, r2
+  //   bCC copy1MBB
+  //   fallthrough --> copy0MBB
+  MachineBasicBlock *thisMBB = BB;
+  MachineBasicBlock *copy0MBB = new MachineBasicBlock(LLVM_BB);
+  MachineBasicBlock *sinkMBB = new MachineBasicBlock(LLVM_BB);
+  unsigned Opc = getCondBrOpcodeForX86CC(MI->getOperand(3).getImmedValue());
+  BuildMI(BB, Opc, 1).addMBB(sinkMBB);
+  MachineFunction *F = BB->getParent();
+  F->getBasicBlockList().insert(It, copy0MBB);
+  F->getBasicBlockList().insert(It, sinkMBB);
+  // Update machine-CFG edges
+  BB->addSuccessor(copy0MBB);
+  BB->addSuccessor(sinkMBB);
+  
+  //  copy0MBB:
+  //   %FalseValue = ...
+  //   # fallthrough to sinkMBB
+  BB = copy0MBB;
+  
+  // Update machine-CFG edges
+  BB->addSuccessor(sinkMBB);
+  
+  //  sinkMBB:
+  //   %Result = phi [ %FalseValue, copy0MBB ], [ %TrueValue, thisMBB ]
+  //  ...
+  BB = sinkMBB;
+  BuildMI(BB, X86::PHI, 4, MI->getOperand(0).getReg())
+    .addReg(MI->getOperand(1).getReg()).addMBB(copy0MBB)
+    .addReg(MI->getOperand(2).getReg()).addMBB(thisMBB);
+
+  delete MI;   // The pseudo instruction is gone now.
+  return BB;
+}
+
+
+//===----------------------------------------------------------------------===//
+//                           X86 Custom Lowering Hooks
+//===----------------------------------------------------------------------===//
+
 /// LowerOperation - Provide custom lowering hooks for some operations.
 ///
 SDOperand X86TargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) {
@@ -1383,7 +1461,7 @@
                                  Op.getOperand(0), Op.getOperand(1));
     ISD::CondCode SetCCOpcode = cast<CondCodeSDNode>(CC)->get();
     bool isFP = MVT::isFloatingPoint(Op.getOperand(1).getValueType());
-    unsigned X86CC = CCToX86CondCode(CC, isFP);
+    unsigned X86CC = getX86CC(CC, isFP);
     if (X86CC != X86ISD::COND_INVALID) {
       return DAG.getNode(X86ISD::SETCC, MVT::i8, 
                          DAG.getConstant(X86CC, MVT::i8), Cond);
@@ -1475,12 +1553,11 @@
       CC   = Op0.getOperand(0);
       Cond = Op0.getOperand(1);
       isValid =
-        !(isFPStack &&
-          !SupportedByFPCMOV(cast<ConstantSDNode>(CC)->getSignExtended()));
+        !(isFPStack && !hasFPCMov(cast<ConstantSDNode>(CC)->getSignExtended()));
     } else if (Op0.getOpcode() == ISD::SETCC) {
       CC = Op0.getOperand(2);
       bool isFP = MVT::isFloatingPoint(Op0.getOperand(1).getValueType());
-      unsigned X86CC = CCToX86CondCode(CC, isFP);
+      unsigned X86CC = getX86CC(CC, isFP);
       CC = DAG.getConstant(X86CC, MVT::i8);
       Cond = DAG.getNode(X86ISD::CMP, MVT::Flag,
                          Op0.getOperand(0), Op0.getOperand(1));
@@ -1513,7 +1590,7 @@
     } else if (Cond.getOpcode() == ISD::SETCC) {
       CC = Cond.getOperand(2);
       bool isFP = MVT::isFloatingPoint(Cond.getOperand(1).getValueType());
-      unsigned X86CC = CCToX86CondCode(CC, isFP);
+      unsigned X86CC = getX86CC(CC, isFP);
       CC = DAG.getConstant(X86CC, MVT::i8);
       Cond = DAG.getNode(X86ISD::CMP, MVT::Flag,
                          Cond.getOperand(0), Cond.getOperand(1));


Index: llvm/lib/Target/X86/X86ISelLowering.h
diff -u llvm/lib/Target/X86/X86ISelLowering.h:1.12 llvm/lib/Target/X86/X86ISelLowering.h:1.13
--- llvm/lib/Target/X86/X86ISelLowering.h:1.12	Mon Jan  9 12:33:28 2006
+++ llvm/lib/Target/X86/X86ISelLowering.h	Tue Jan 10 18:33:36 2006
@@ -199,6 +199,9 @@
     LowerFrameReturnAddress(bool isFrameAddr, SDOperand Chain, unsigned Depth,
                             SelectionDAG &DAG);
 
+    virtual MachineBasicBlock *InsertAtEndOfBasicBlock(MachineInstr *MI,
+                                                       MachineBasicBlock *MBB);
+
     /// getTargetNodeName - This method returns the name of a target specific
     /// DAG node.
     virtual const char *getTargetNodeName(unsigned Opcode) const;


Index: llvm/lib/Target/X86/X86InstrInfo.td
diff -u llvm/lib/Target/X86/X86InstrInfo.td:1.194 llvm/lib/Target/X86/X86InstrInfo.td:1.195
--- llvm/lib/Target/X86/X86InstrInfo.td:1.194	Tue Jan 10 16:22:02 2006
+++ llvm/lib/Target/X86/X86InstrInfo.td	Tue Jan 10 18:33:36 2006
@@ -361,8 +361,8 @@
 // Instruction list...
 //
 
+// Pseudo-instructions:
 def PHI : I<0, Pseudo, (ops variable_ops), "PHINODE", []>;        // PHI node.
-def NOOP : I<0x90, RawFrm, (ops), "nop", []>; // nop
 
 def ADJCALLSTACKDOWN : I<0, Pseudo, (ops i32imm:$amt), "#ADJCALLSTACKDOWN",
                          [(X86callseq_start imm:$amt)]>;
@@ -388,10 +388,29 @@
                          [(set FR64:$dst, (undef))]>, Requires<[HasSSE2]>;
 
 
+// CMOV* - Used to implement the SSE SELECT DAG operation.  Expanded by the
+// scheduler into a branch sequence.
+let usesCustomDAGSchedInserter = 1 in {  // Expanded by the scheduler.
+  def CMOV_FR32 : I<0, Pseudo,
+                    (ops FR32:$dst, FR32:$t, FR32:$f, i8imm:$cond),
+                    "#CMOV PSEUDO!",
+                    [(set FR32:$dst, (X86cmov FR32:$t, FR32:$f, imm:$cond,
+                                      STATUS))]>;
+  def CMOV_FR64 : I<0, Pseudo,
+                    (ops FR64:$dst, FR64:$t, FR64:$f, i8imm:$cond),
+                    "#CMOV PSEUDO!",
+                    [(set FR64:$dst, (X86cmov FR64:$t, FR64:$f, imm:$cond,
+                                      STATUS))]>;
+}
+
 let isTerminator = 1 in
   let Defs = [FP0, FP1, FP2, FP3, FP4, FP5, FP6] in
     def FP_REG_KILL  : I<0, Pseudo, (ops), "#FP_REG_KILL", []>;
 
+
+// Nop
+def NOOP : I<0x90, RawFrm, (ops), "nop", []>;
+
 //===----------------------------------------------------------------------===//
 //  Control Flow Instructions...
 //
@@ -409,6 +428,7 @@
   class IBr<bits<8> opcode, dag ops, string asm, list<dag> pattern> :
         I<opcode, RawFrm, ops, asm, pattern>;
 
+// Conditional branches
 let isBarrier = 1 in
   def JMP : IBr<0xE9, (ops brtarget:$dst), "jmp $dst", [(br bb:$dst)]>;
 
@@ -442,6 +462,10 @@
               [(X86brcond bb:$dst, X86_COND_P, STATUS)]>, Imp<[STATUS],[]>, TB;
 def JNP : IBr<0x8B, (ops brtarget:$dst), "jnp $dst",
               [(X86brcond bb:$dst, X86_COND_NP, STATUS)]>, Imp<[STATUS],[]>, TB;
+def JO  : IBr<0x80, (ops brtarget:$dst), "jo $dst",
+              [(X86brcond bb:$dst, X86_COND_O, STATUS)]>, Imp<[STATUS],[]>, TB;
+def JNO : IBr<0x81, (ops brtarget:$dst), "jno $dst",
+              [(X86brcond bb:$dst, X86_COND_NO, STATUS)]>, Imp<[STATUS],[]>, TB;
 
 //===----------------------------------------------------------------------===//
 //  Call Instructions...





From lattner at cs.uiuc.edu  Tue Jan 10 18:47:08 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue, 10 Jan 2006 18:47:08 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp 
Message-ID: <200601110047.SAA01488@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/X86:

X86ISelDAGToDAG.cpp updated: 1.26 -> 1.27
---
Log message:

Fit into 80 cols


---
Diffs of the changes:  (+2 -1)

 X86ISelDAGToDAG.cpp |    3 ++-
 1 files changed, 2 insertions(+), 1 deletion(-)


Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
diff -u llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.26 llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.27
--- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.26	Tue Jan 10 14:26:56 2006
+++ llvm/lib/Target/X86/X86ISelDAGToDAG.cpp	Tue Jan 10 18:46:55 2006
@@ -315,7 +315,8 @@
 /// SelectLEAAddr - it calls SelectAddr and determines if the maximal addressing
 /// mode it matches can be cost effectively emitted as an LEA instruction.
 /// For X86, it always is unless it's just a (Reg + const).
-bool X86DAGToDAGISel::SelectLEAAddr(SDOperand N, SDOperand &Base, SDOperand &Scale,
+bool X86DAGToDAGISel::SelectLEAAddr(SDOperand N, SDOperand &Base,
+                                    SDOperand &Scale,
                                     SDOperand &Index, SDOperand &Disp) {
   X86ISelAddressMode AM;
   if (!MatchAddress(N, AM)) {





From lattner at cs.uiuc.edu  Tue Jan 10 19:15:47 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue, 10 Jan 2006 19:15:47 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
	X86ISelPattern.cpp 
Message-ID: <200601110115.TAA01723@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/X86:

X86ISelDAGToDAG.cpp updated: 1.27 -> 1.28
X86ISelPattern.cpp updated: 1.191 -> 1.192
---
Log message:

implement FP_REG_KILL insertion for the dag-dag instruction selector


---
Diffs of the changes:  (+59 -1)

 X86ISelDAGToDAG.cpp |   59 ++++++++++++++++++++++++++++++++++++++++++++++++++++
 X86ISelPattern.cpp  |    1 
 2 files changed, 59 insertions(+), 1 deletion(-)


Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
diff -u llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.27 llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.28
--- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.27	Tue Jan 10 18:46:55 2006
+++ llvm/lib/Target/X86/X86ISelDAGToDAG.cpp	Tue Jan 10 19:15:34 2006
@@ -13,12 +13,17 @@
 //===----------------------------------------------------------------------===//
 
 #include "X86.h"
+#include "X86RegisterInfo.h"
 #include "X86Subtarget.h"
 #include "X86ISelLowering.h"
 #include "llvm/GlobalValue.h"
+#include "llvm/Instructions.h"
+#include "llvm/Support/CFG.h"
 #include "llvm/CodeGen/MachineConstantPool.h"
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/MachineFrameInfo.h"
+#include "llvm/CodeGen/MachineInstrBuilder.h"
+#include "llvm/CodeGen/SSARegMap.h"
 #include "llvm/CodeGen/SelectionDAGISel.h"
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/Support/Debug.h"
@@ -139,6 +144,7 @@
 /// when it has created a SelectionDAG for us to codegen.
 void X86DAGToDAGISel::InstructionSelectBasicBlock(SelectionDAG &DAG) {
   DEBUG(BB->dump());
+  MachineFunction::iterator FirstMBB = BB;
 
   // Codegen the basic block.
   DAG.setRoot(Select(DAG.getRoot()));
@@ -147,6 +153,59 @@
 
   // Emit machine code to BB. 
   ScheduleAndEmitDAG(DAG);
+  
+  // If we are emitting FP stack code, scan the basic block to determine if this
+  // block defines any FP values.  If so, put an FP_REG_KILL instruction before
+  // the terminator of the block.
+  if (X86Vector < SSE2) {
+    // Note that FP stack instructions *are* used in SSE code when returning
+    // values, but these are not live out of the basic block, so we don't need
+    // an FP_REG_KILL in this case either.
+    bool ContainsFPCode = false;
+    
+    // Scan all of the machine instructions in these MBBs, checking for FP
+    // stores.
+    MachineFunction::iterator MBBI = FirstMBB;
+    do {
+      for (MachineBasicBlock::iterator I = MBBI->begin(), E = MBBI->end();
+           !ContainsFPCode && I != E; ++I) {
+        for (unsigned op = 0, e = I->getNumOperands(); op != e; ++op) {
+          if (I->getOperand(op).isRegister() && I->getOperand(op).isDef() &&
+              MRegisterInfo::isVirtualRegister(I->getOperand(op).getReg()) &&
+              RegMap->getRegClass(I->getOperand(0).getReg()) == 
+                X86::RFPRegisterClass) {
+            ContainsFPCode = true;
+            break;
+          }
+        }
+      }
+    } while (!ContainsFPCode && &*(MBBI++) != BB);
+    
+    // Check PHI nodes in successor blocks.  These PHI's will be lowered to have
+    // a copy of the input value in this block.
+    if (!ContainsFPCode) {
+      // Final check, check LLVM BB's that are successors to the LLVM BB
+      // corresponding to BB for FP PHI nodes.
+      const BasicBlock *LLVMBB = BB->getBasicBlock();
+      const PHINode *PN;
+      for (succ_const_iterator SI = succ_begin(LLVMBB), E = succ_end(LLVMBB);
+           !ContainsFPCode && SI != E; ++SI) {
+        for (BasicBlock::const_iterator II = SI->begin();
+             (PN = dyn_cast<PHINode>(II)); ++II) {
+          if (PN->getType()->isFloatingPoint()) {
+            ContainsFPCode = true;
+            break;
+          }
+        }
+      }
+    }
+
+    // Finally, if we found any FP code, emit the FP_REG_KILL instruction.
+    if (ContainsFPCode) {
+      BuildMI(*BB, BB->getFirstTerminator(), X86::FP_REG_KILL, 0);
+      ++NumFPKill;
+    }
+  }
 }
 
 /// FIXME: copied from X86ISelPattern.cpp


Index: llvm/lib/Target/X86/X86ISelPattern.cpp
diff -u llvm/lib/Target/X86/X86ISelPattern.cpp:1.191 llvm/lib/Target/X86/X86ISelPattern.cpp:1.192
--- llvm/lib/Target/X86/X86ISelPattern.cpp:1.191	Fri Jan  6 11:55:49 2006
+++ llvm/lib/Target/X86/X86ISelPattern.cpp	Tue Jan 10 19:15:34 2006
@@ -226,7 +226,6 @@
           break;
         }
 
-
   // Insert FP_REG_KILL instructions into basic blocks that need them.  This
   // only occurs due to the floating point stackifier not being aggressive
   // enough to handle arbitrary global stackification.





From duraid at octopus.com.au  Tue Jan 10 19:21:24 2006
From: duraid at octopus.com.au (Duraid Madina)
Date: Tue, 10 Jan 2006 19:21:24 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/IA64/IA64InstrInfo.td 
Message-ID: <200601110121.TAA01749@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/IA64:

IA64InstrInfo.td updated: 1.35 -> 1.36
---
Log message:

add support for selecting bools

FIXME: this is commented out because it makes tblgen go a bit fruity



---
Diffs of the changes:  (+5 -1)

 IA64InstrInfo.td |    6 +++++-
 1 files changed, 5 insertions(+), 1 deletion(-)


Index: llvm/lib/Target/IA64/IA64InstrInfo.td
diff -u llvm/lib/Target/IA64/IA64InstrInfo.td:1.35 llvm/lib/Target/IA64/IA64InstrInfo.td:1.36
--- llvm/lib/Target/IA64/IA64InstrInfo.td:1.35	Mon Dec 26 03:11:45 2005
+++ llvm/lib/Target/IA64/IA64InstrInfo.td	Tue Jan 10 19:21:12 2006
@@ -424,11 +424,15 @@
     "($qp) mov $dst = $src;;">;
 }
 
-// TODO: select bools
 def SELECTINT : Pat<(select PR:$which, GR:$src1, GR:$src2),
           (CMOV (MOV GR:$src2), GR:$src1, PR:$which)>; // note order!
 def SELECTFP : Pat<(select PR:$which, FP:$src1, FP:$src2),
           (CFMOV (FMOV FP:$src2), FP:$src1, PR:$which)>; // note order!
+// TODO: can do this faster, w/o using any integer regs (see pattern isel)
+// FIXME: this makes tblgen cough and splutter:
+// Assertion && "Unknown node in result pattern!"'
+//def SELECTBOOL : Pat<(select PR:$which, PR:$src1, PR:$src2), // note order!
+//          (trunc (CMOV (MOV (zext PR:$src2)), (zext PR:$src1), PR:$which))>;
 
 // load constants of various sizes // FIXME: prettyprint -ve constants
 def : Pat<(i64 immSExt14:$imm), (ADDS r0, immSExt14:$imm)>;





From lattner at cs.uiuc.edu  Tue Jan 10 19:34:03 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue, 10 Jan 2006 19:34:03 -0600
Subject: [llvm-commits] CVS: llvm/utils/TableGen/DAGISelEmitter.cpp 
Message-ID: <200601110134.TAA01998@zion.cs.uiuc.edu>



Changes in directory llvm/utils/TableGen:

DAGISelEmitter.cpp updated: 1.128 -> 1.129
---
Log message:

Emit an error instead of an assertion if trying to do bogus things in result patterns.


---
Diffs of the changes:  (+2 -2)

 DAGISelEmitter.cpp |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)


Index: llvm/utils/TableGen/DAGISelEmitter.cpp
diff -u llvm/utils/TableGen/DAGISelEmitter.cpp:1.128 llvm/utils/TableGen/DAGISelEmitter.cpp:1.129
--- llvm/utils/TableGen/DAGISelEmitter.cpp:1.128	Mon Jan  9 12:27:06 2006
+++ llvm/utils/TableGen/DAGISelEmitter.cpp	Tue Jan 10 19:33:49 2006
@@ -2281,8 +2281,8 @@
       return std::make_pair(1, ResNo);
     } else {
       N->dump();
-      assert(0 && "Unknown node in result pattern!");
-      return std::make_pair(1, ~0U);
+      std::cerr << "\n";
+      throw std::string("Unknown node in result pattern!");
     }
   }
 





From duraid at octopus.com.au  Tue Jan 10 19:38:20 2006
From: duraid at octopus.com.au (Duraid Madina)
Date: Tue, 10 Jan 2006 19:38:20 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/IA64/IA64InstrInfo.td 
Message-ID: <200601110138.TAA02021@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/IA64:

IA64InstrInfo.td updated: 1.36 -> 1.37
---
Log message:

this just might work



---
Diffs of the changes:  (+4 -4)

 IA64InstrInfo.td |    8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)


Index: llvm/lib/Target/IA64/IA64InstrInfo.td
diff -u llvm/lib/Target/IA64/IA64InstrInfo.td:1.36 llvm/lib/Target/IA64/IA64InstrInfo.td:1.37
--- llvm/lib/Target/IA64/IA64InstrInfo.td:1.36	Tue Jan 10 19:21:12 2006
+++ llvm/lib/Target/IA64/IA64InstrInfo.td	Tue Jan 10 19:38:07 2006
@@ -429,10 +429,10 @@
 def SELECTFP : Pat<(select PR:$which, FP:$src1, FP:$src2),
           (CFMOV (FMOV FP:$src2), FP:$src1, PR:$which)>; // note order!
 // TODO: can do this faster, w/o using any integer regs (see pattern isel)
-// FIXME: this makes tblgen cough and splutter:
-// Assertion && "Unknown node in result pattern!"'
-//def SELECTBOOL : Pat<(select PR:$which, PR:$src1, PR:$src2), // note order!
-//          (trunc (CMOV (MOV (zext PR:$src2)), (zext PR:$src1), PR:$which))>;
+def SELECTBOOL : Pat<(select PR:$which, PR:$src1, PR:$src2), // note order!
+          (CMPNE (CMOV
+            (MOV (TPCADDIMM22 (ADDS r0, 0), 1, PR:$src2)),
+            (TPCADDIMM22 (ADDS r0, 0), 1, PR:$src1), PR:$which), r0)>;
 
 // load constants of various sizes // FIXME: prettyprint -ve constants
 def : Pat<(i64 immSExt14:$imm), (ADDS r0, immSExt14:$imm)>;





From lattner at cs.uiuc.edu  Tue Jan 10 20:08:03 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue, 10 Jan 2006 20:08:03 -0600
Subject: [llvm-commits] CVS: llvm/lib/AsmParser/Lexer.cpp llvmAsmParser.cpp 
Message-ID: <200601110208.UAA02300@zion.cs.uiuc.edu>



Changes in directory llvm/lib/AsmParser:

Lexer.cpp updated: 1.13 -> 1.14
llvmAsmParser.cpp updated: 1.28 -> 1.29
---
Log message:

Regenerate these files.  FreeBSD apparently has issues with the version of
lex/bison Rob used.


---
Diffs of the changes:  (+282 -282)

 Lexer.cpp         |  216 ++++++++++++++++-----------------
 llvmAsmParser.cpp |  348 +++++++++++++++++++++++++++---------------------------
 2 files changed, 282 insertions(+), 282 deletions(-)


Index: llvm/lib/AsmParser/Lexer.cpp
diff -u llvm/lib/AsmParser/Lexer.cpp:1.13 llvm/lib/AsmParser/Lexer.cpp:1.14
--- llvm/lib/AsmParser/Lexer.cpp:1.13	Tue Jan 10 13:04:31 2006
+++ llvm/lib/AsmParser/Lexer.cpp	Tue Jan 10 20:07:51 2006
@@ -20,7 +20,7 @@
 /* A lexical scanner generated by flex */
 
 /* Scanner skeleton version:
- * $Header: /var/cvs/llvm/llvm/lib/AsmParser/Lexer.cpp,v 1.13 2006/01/10 19:04:31 bocchino Exp $
+ * $Header: /var/cvs/llvm/llvm/lib/AsmParser/Lexer.cpp,v 1.14 2006/01/11 02:07:51 lattner Exp $
  */
 
 #define FLEX_SCANNER
@@ -748,7 +748,7 @@
 #define YY_MORE_ADJ 0
 #define YY_RESTORE_YY_MORE_OFFSET
 char *yytext;
-#line 1 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 1 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 #define INITIAL 0
 /*===-- Lexer.l - Scanner for llvm assembly files --------------*- C++ -*--===//
 //
@@ -763,7 +763,7 @@
 //
 //===----------------------------------------------------------------------===*/
 #define YY_NEVER_INTERACTIVE 1
-#line 28 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 28 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 #include "ParserInternals.h"
 #include "llvm/Module.h"
 #include <list>
@@ -1040,7 +1040,7 @@
 	register char *yy_cp, *yy_bp;
 	register int yy_act;
 
-#line 179 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 179 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 
 
 #line 1047 "Lexer.cpp"
@@ -1136,447 +1136,447 @@
 	{ /* beginning of action switch */
 case 1:
 YY_RULE_SETUP
-#line 181 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 181 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { /* Ignore comments for now */ }
 	YY_BREAK
 case 2:
 YY_RULE_SETUP
-#line 183 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 183 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { return BEGINTOK; }
 	YY_BREAK
 case 3:
 YY_RULE_SETUP
-#line 184 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 184 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { return ENDTOK; }
 	YY_BREAK
 case 4:
 YY_RULE_SETUP
-#line 185 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 185 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { return TRUETOK;  }
 	YY_BREAK
 case 5:
 YY_RULE_SETUP
-#line 186 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 186 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { return FALSETOK; }
 	YY_BREAK
 case 6:
 YY_RULE_SETUP
-#line 187 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 187 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { return DECLARE; }
 	YY_BREAK
 case 7:
 YY_RULE_SETUP
-#line 188 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 188 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { return GLOBAL; }
 	YY_BREAK
 case 8:
 YY_RULE_SETUP
-#line 189 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 189 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { return CONSTANT; }
 	YY_BREAK
 case 9:
 YY_RULE_SETUP
-#line 190 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 190 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { return INTERNAL; }
 	YY_BREAK
 case 10:
 YY_RULE_SETUP
-#line 191 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 191 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { return LINKONCE; }
 	YY_BREAK
 case 11:
 YY_RULE_SETUP
-#line 192 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 192 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { return WEAK; }
 	YY_BREAK
 case 12:
 YY_RULE_SETUP
-#line 193 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 193 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { return APPENDING; }
 	YY_BREAK
 case 13:
 YY_RULE_SETUP
-#line 194 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 194 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { return EXTERNAL; }    /* Deprecated, turn into external */
 	YY_BREAK
 case 14:
 YY_RULE_SETUP
-#line 195 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 195 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { return EXTERNAL; }
 	YY_BREAK
 case 15:
 YY_RULE_SETUP
-#line 196 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 196 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { return IMPLEMENTATION; }
 	YY_BREAK
 case 16:
 YY_RULE_SETUP
-#line 197 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 197 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { return ZEROINITIALIZER; }
 	YY_BREAK
 case 17:
 YY_RULE_SETUP
-#line 198 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 198 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { return DOTDOTDOT; }
 	YY_BREAK
 case 18:
 YY_RULE_SETUP
-#line 199 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 199 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { return UNDEF; }
 	YY_BREAK
 case 19:
 YY_RULE_SETUP
-#line 200 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 200 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { return NULL_TOK; }
 	YY_BREAK
 case 20:
 YY_RULE_SETUP
-#line 201 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 201 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { return TO; }
 	YY_BREAK
 case 21:
 YY_RULE_SETUP
-#line 202 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 202 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { RET_TOK(TermOpVal, Unwind, UNWIND); }
 	YY_BREAK
 case 22:
 YY_RULE_SETUP
-#line 203 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 203 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { return NOT; }  /* Deprecated, turned into XOR */
 	YY_BREAK
 case 23:
 YY_RULE_SETUP
-#line 204 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 204 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { return TAIL; }
 	YY_BREAK
 case 24:
 YY_RULE_SETUP
-#line 205 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 205 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { return TARGET; }
 	YY_BREAK
 case 25:
 YY_RULE_SETUP
-#line 206 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 206 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { return TRIPLE; }
 	YY_BREAK
 case 26:
 YY_RULE_SETUP
-#line 207 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 207 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { return DEPLIBS; }
 	YY_BREAK
 case 27:
 YY_RULE_SETUP
-#line 208 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 208 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { return ENDIAN; }
 	YY_BREAK
 case 28:
 YY_RULE_SETUP
-#line 209 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 209 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { return POINTERSIZE; }
 	YY_BREAK
 case 29:
 YY_RULE_SETUP
-#line 210 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 210 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { return LITTLE; }
 	YY_BREAK
 case 30:
 YY_RULE_SETUP
-#line 211 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 211 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { return BIG; }
 	YY_BREAK
 case 31:
 YY_RULE_SETUP
-#line 212 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 212 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { return VOLATILE; }
 	YY_BREAK
 case 32:
 YY_RULE_SETUP
-#line 213 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 213 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { return ALIGN;  }
 	YY_BREAK
 case 33:
 YY_RULE_SETUP
-#line 214 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 214 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { return SECTION; }
 	YY_BREAK
 case 34:
 YY_RULE_SETUP
-#line 216 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 216 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { return CC_TOK; }
 	YY_BREAK
 case 35:
 YY_RULE_SETUP
-#line 217 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 217 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { return CCC_TOK; }
 	YY_BREAK
 case 36:
 YY_RULE_SETUP
-#line 218 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 218 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { return FASTCC_TOK; }
 	YY_BREAK
 case 37:
 YY_RULE_SETUP
-#line 219 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 219 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { return COLDCC_TOK; }
 	YY_BREAK
 case 38:
 YY_RULE_SETUP
-#line 221 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 221 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { llvmAsmlval.PrimType = Type::VoidTy  ; return VOID;   }
 	YY_BREAK
 case 39:
 YY_RULE_SETUP
-#line 222 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 222 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { llvmAsmlval.PrimType = Type::BoolTy  ; return BOOL;   }
 	YY_BREAK
 case 40:
 YY_RULE_SETUP
-#line 223 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 223 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { llvmAsmlval.PrimType = Type::SByteTy ; return SBYTE;  }
 	YY_BREAK
 case 41:
 YY_RULE_SETUP
-#line 224 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 224 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { llvmAsmlval.PrimType = Type::UByteTy ; return UBYTE;  }
 	YY_BREAK
 case 42:
 YY_RULE_SETUP
-#line 225 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 225 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { llvmAsmlval.PrimType = Type::ShortTy ; return SHORT;  }
 	YY_BREAK
 case 43:
 YY_RULE_SETUP
-#line 226 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 226 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { llvmAsmlval.PrimType = Type::UShortTy; return USHORT; }
 	YY_BREAK
 case 44:
 YY_RULE_SETUP
-#line 227 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 227 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { llvmAsmlval.PrimType = Type::IntTy   ; return INT;    }
 	YY_BREAK
 case 45:
 YY_RULE_SETUP
-#line 228 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 228 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { llvmAsmlval.PrimType = Type::UIntTy  ; return UINT;   }
 	YY_BREAK
 case 46:
 YY_RULE_SETUP
-#line 229 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 229 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { llvmAsmlval.PrimType = Type::LongTy  ; return LONG;   }
 	YY_BREAK
 case 47:
 YY_RULE_SETUP
-#line 230 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 230 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { llvmAsmlval.PrimType = Type::ULongTy ; return ULONG;  }
 	YY_BREAK
 case 48:
 YY_RULE_SETUP
-#line 231 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 231 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { llvmAsmlval.PrimType = Type::FloatTy ; return FLOAT;  }
 	YY_BREAK
 case 49:
 YY_RULE_SETUP
-#line 232 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 232 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { llvmAsmlval.PrimType = Type::DoubleTy; return DOUBLE; }
 	YY_BREAK
 case 50:
 YY_RULE_SETUP
-#line 233 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 233 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { llvmAsmlval.PrimType = Type::LabelTy ; return LABEL;  }
 	YY_BREAK
 case 51:
 YY_RULE_SETUP
-#line 234 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 234 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { return TYPE;   }
 	YY_BREAK
 case 52:
 YY_RULE_SETUP
-#line 235 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 235 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { return OPAQUE; }
 	YY_BREAK
 case 53:
 YY_RULE_SETUP
-#line 237 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 237 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { RET_TOK(BinaryOpVal, Add, ADD); }
 	YY_BREAK
 case 54:
 YY_RULE_SETUP
-#line 238 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 238 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { RET_TOK(BinaryOpVal, Sub, SUB); }
 	YY_BREAK
 case 55:
 YY_RULE_SETUP
-#line 239 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 239 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { RET_TOK(BinaryOpVal, Mul, MUL); }
 	YY_BREAK
 case 56:
 YY_RULE_SETUP
-#line 240 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 240 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { RET_TOK(BinaryOpVal, Div, DIV); }
 	YY_BREAK
 case 57:
 YY_RULE_SETUP
-#line 241 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 241 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { RET_TOK(BinaryOpVal, Rem, REM); }
 	YY_BREAK
 case 58:
 YY_RULE_SETUP
-#line 242 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 242 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { RET_TOK(BinaryOpVal, And, AND); }
 	YY_BREAK
 case 59:
 YY_RULE_SETUP
-#line 243 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 243 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { RET_TOK(BinaryOpVal, Or , OR ); }
 	YY_BREAK
 case 60:
 YY_RULE_SETUP
-#line 244 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 244 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { RET_TOK(BinaryOpVal, Xor, XOR); }
 	YY_BREAK
 case 61:
 YY_RULE_SETUP
-#line 245 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 245 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { RET_TOK(BinaryOpVal, SetNE, SETNE); }
 	YY_BREAK
 case 62:
 YY_RULE_SETUP
-#line 246 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 246 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { RET_TOK(BinaryOpVal, SetEQ, SETEQ); }
 	YY_BREAK
 case 63:
 YY_RULE_SETUP
-#line 247 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 247 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { RET_TOK(BinaryOpVal, SetLT, SETLT); }
 	YY_BREAK
 case 64:
 YY_RULE_SETUP
-#line 248 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 248 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { RET_TOK(BinaryOpVal, SetGT, SETGT); }
 	YY_BREAK
 case 65:
 YY_RULE_SETUP
-#line 249 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 249 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { RET_TOK(BinaryOpVal, SetLE, SETLE); }
 	YY_BREAK
 case 66:
 YY_RULE_SETUP
-#line 250 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 250 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { RET_TOK(BinaryOpVal, SetGE, SETGE); }
 	YY_BREAK
 case 67:
 YY_RULE_SETUP
-#line 252 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 252 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { RET_TOK(OtherOpVal, PHI, PHI_TOK); }
 	YY_BREAK
 case 68:
 YY_RULE_SETUP
-#line 253 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 253 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { RET_TOK(OtherOpVal, Call, CALL); }
 	YY_BREAK
 case 69:
 YY_RULE_SETUP
-#line 254 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 254 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { RET_TOK(OtherOpVal, Cast, CAST); }
 	YY_BREAK
 case 70:
 YY_RULE_SETUP
-#line 255 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 255 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { RET_TOK(OtherOpVal, Select, SELECT); }
 	YY_BREAK
 case 71:
 YY_RULE_SETUP
-#line 256 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 256 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { RET_TOK(OtherOpVal, Shl, SHL); }
 	YY_BREAK
 case 72:
 YY_RULE_SETUP
-#line 257 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 257 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { RET_TOK(OtherOpVal, Shr, SHR); }
 	YY_BREAK
 case 73:
 YY_RULE_SETUP
-#line 258 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 258 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { return VANEXT_old; }
 	YY_BREAK
 case 74:
 YY_RULE_SETUP
-#line 259 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 259 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { return VAARG_old; }
 	YY_BREAK
 case 75:
 YY_RULE_SETUP
-#line 260 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 260 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { RET_TOK(OtherOpVal, VAArg , VAARG); }
 	YY_BREAK
 case 76:
 YY_RULE_SETUP
-#line 261 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 261 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { RET_TOK(TermOpVal, Ret, RET); }
 	YY_BREAK
 case 77:
 YY_RULE_SETUP
-#line 262 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 262 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { RET_TOK(TermOpVal, Br, BR); }
 	YY_BREAK
 case 78:
 YY_RULE_SETUP
-#line 263 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 263 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { RET_TOK(TermOpVal, Switch, SWITCH); }
 	YY_BREAK
 case 79:
 YY_RULE_SETUP
-#line 264 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 264 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { RET_TOK(TermOpVal, Invoke, INVOKE); }
 	YY_BREAK
 case 80:
 YY_RULE_SETUP
-#line 265 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 265 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { RET_TOK(TermOpVal, Unwind, UNWIND); }
 	YY_BREAK
 case 81:
 YY_RULE_SETUP
-#line 266 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 266 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { RET_TOK(TermOpVal, Unreachable, UNREACHABLE); }
 	YY_BREAK
 case 82:
 YY_RULE_SETUP
-#line 268 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 268 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { RET_TOK(MemOpVal, Malloc, MALLOC); }
 	YY_BREAK
 case 83:
 YY_RULE_SETUP
-#line 269 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 269 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { RET_TOK(MemOpVal, Alloca, ALLOCA); }
 	YY_BREAK
 case 84:
 YY_RULE_SETUP
-#line 270 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 270 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { RET_TOK(MemOpVal, Free, FREE); }
 	YY_BREAK
 case 85:
 YY_RULE_SETUP
-#line 271 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 271 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { RET_TOK(MemOpVal, Load, LOAD); }
 	YY_BREAK
 case 86:
 YY_RULE_SETUP
-#line 272 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 272 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { RET_TOK(MemOpVal, Store, STORE); }
 	YY_BREAK
 case 87:
 YY_RULE_SETUP
-#line 273 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 273 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { RET_TOK(MemOpVal, GetElementPtr, GETELEMENTPTR); }
 	YY_BREAK
 case 88:
 YY_RULE_SETUP
-#line 275 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 275 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { RET_TOK(OtherOpVal, ExtractElement, EXTRACTELEMENT); }
 	YY_BREAK
 case 89:
 YY_RULE_SETUP
-#line 278 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 278 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 {
                   UnEscapeLexed(yytext+1);
                   llvmAsmlval.StrVal = strdup(yytext+1);             // Skip %
@@ -1585,7 +1585,7 @@
 	YY_BREAK
 case 90:
 YY_RULE_SETUP
-#line 283 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 283 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 {
                   yytext[strlen(yytext)-1] = 0;  // nuke colon
                   UnEscapeLexed(yytext);
@@ -1595,7 +1595,7 @@
 	YY_BREAK
 case 91:
 YY_RULE_SETUP
-#line 289 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 289 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 {
                   yytext[strlen(yytext)-2] = 0;  // nuke colon, end quote
                   UnEscapeLexed(yytext+1);
@@ -1605,7 +1605,7 @@
 	YY_BREAK
 case 92:
 YY_RULE_SETUP
-#line 296 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 296 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { // Note that we cannot unescape a string constant here!  The
                    // string constant might contain a \00 which would not be
                    // understood by the string stuff.  It is valid to make a
@@ -1618,12 +1618,12 @@
 	YY_BREAK
 case 93:
 YY_RULE_SETUP
-#line 307 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 307 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { llvmAsmlval.UInt64Val = atoull(yytext); return EUINT64VAL; }
 	YY_BREAK
 case 94:
 YY_RULE_SETUP
-#line 308 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 308 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 {
                   uint64_t Val = atoull(yytext+1);
                   // +1:  we have bigger negative range
@@ -1635,7 +1635,7 @@
 	YY_BREAK
 case 95:
 YY_RULE_SETUP
-#line 316 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 316 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 {
                    llvmAsmlval.UInt64Val = HexIntToVal(yytext+3);
                    return yytext[0] == 's' ? ESINT64VAL : EUINT64VAL;
@@ -1643,7 +1643,7 @@
 	YY_BREAK
 case 96:
 YY_RULE_SETUP
-#line 321 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 321 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 {
                   uint64_t Val = atoull(yytext+1);
                   if ((unsigned)Val != Val)
@@ -1654,7 +1654,7 @@
 	YY_BREAK
 case 97:
 YY_RULE_SETUP
-#line 328 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 328 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 {
                   uint64_t Val = atoull(yytext+2);
                   // +1:  we have bigger negative range
@@ -1666,16 +1666,16 @@
 	YY_BREAK
 case 98:
 YY_RULE_SETUP
-#line 337 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 337 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { llvmAsmlval.FPVal = atof(yytext); return FPVAL; }
 	YY_BREAK
 case 99:
 YY_RULE_SETUP
-#line 338 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 338 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { llvmAsmlval.FPVal = HexToFP(yytext); return FPVAL; }
 	YY_BREAK
 case YY_STATE_EOF(INITIAL):
-#line 340 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 340 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 {
                   /* Make sure to free the internal buffers for flex when we are
                    * done reading our input!
@@ -1686,17 +1686,17 @@
 	YY_BREAK
 case 100:
 YY_RULE_SETUP
-#line 348 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 348 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { /* Ignore whitespace */ }
 	YY_BREAK
 case 101:
 YY_RULE_SETUP
-#line 349 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 349 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 { return yytext[0]; }
 	YY_BREAK
 case 102:
 YY_RULE_SETUP
-#line 351 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 351 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 YY_FATAL_ERROR( "flex scanner jammed" );
 	YY_BREAK
 #line 1703 "Lexer.cpp"
@@ -2581,5 +2581,5 @@
 	return 0;
 	}
 #endif
-#line 351 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/Lexer.l"
+#line 351 "/Users/sabre/llvm/lib/AsmParser/Lexer.l"
 


Index: llvm/lib/AsmParser/llvmAsmParser.cpp
diff -u llvm/lib/AsmParser/llvmAsmParser.cpp:1.28 llvm/lib/AsmParser/llvmAsmParser.cpp:1.29
--- llvm/lib/AsmParser/llvmAsmParser.cpp:1.28	Tue Jan 10 13:04:31 2006
+++ llvm/lib/AsmParser/llvmAsmParser.cpp	Tue Jan 10 20:07:51 2006
@@ -1,5 +1,5 @@
 
-/*  A Bison parser, made from /Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y
+/*  A Bison parser, made from /Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y
     by GNU Bison version 1.28  */
 
 #define YYBISON 1  /* Identify Bison output.  */
@@ -106,7 +106,7 @@
 #define	VAARG_old	349
 #define	VANEXT_old	350
 
-#line 14 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 14 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 
 #include "ParserInternals.h"
 #include "llvm/CallingConv.h"
@@ -965,7 +965,7 @@
 }
 
 
-#line 873 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 873 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 typedef union {
   llvm::Module                           *ModuleVal;
   llvm::Function                         *FunctionVal;
@@ -2193,7 +2193,7 @@
   switch (yyn) {
 
 case 2:
-#line 992 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 992 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
   if (yyvsp[0].UIntVal > (uint32_t)INT32_MAX)     // Outside of my range!
     ThrowException("Value too large for type!");
@@ -2201,7 +2201,7 @@
 ;
     break;}
 case 4:
-#line 1000 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1000 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
   if (yyvsp[0].UInt64Val > (uint64_t)INT64_MAX)     // Outside of my range!
     ThrowException("Value too large for type!");
@@ -2209,55 +2209,55 @@
 ;
     break;}
 case 33:
-#line 1023 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1023 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.StrVal = yyvsp[-1].StrVal;
   ;
     break;}
 case 34:
-#line 1026 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1026 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.StrVal = 0;
   ;
     break;}
 case 35:
-#line 1030 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1030 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 { yyval.Linkage = GlobalValue::InternalLinkage; ;
     break;}
 case 36:
-#line 1031 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1031 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 { yyval.Linkage = GlobalValue::LinkOnceLinkage; ;
     break;}
 case 37:
-#line 1032 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1032 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 { yyval.Linkage = GlobalValue::WeakLinkage; ;
     break;}
 case 38:
-#line 1033 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1033 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 { yyval.Linkage = GlobalValue::AppendingLinkage; ;
     break;}
 case 39:
-#line 1034 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1034 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 { yyval.Linkage = GlobalValue::ExternalLinkage; ;
     break;}
 case 40:
-#line 1036 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1036 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 { yyval.UIntVal = CallingConv::C; ;
     break;}
 case 41:
-#line 1037 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1037 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 { yyval.UIntVal = CallingConv::C; ;
     break;}
 case 42:
-#line 1038 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1038 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 { yyval.UIntVal = CallingConv::Fast; ;
     break;}
 case 43:
-#line 1039 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1039 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 { yyval.UIntVal = CallingConv::Cold; ;
     break;}
 case 44:
-#line 1040 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1040 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
                    if ((unsigned)yyvsp[0].UInt64Val != yyvsp[0].UInt64Val)
                      ThrowException("Calling conv too large!");
@@ -2265,11 +2265,11 @@
                  ;
     break;}
 case 45:
-#line 1048 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1048 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 { yyval.UIntVal = 0; ;
     break;}
 case 46:
-#line 1049 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1049 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
   yyval.UIntVal = yyvsp[0].UInt64Val;
   if (yyval.UIntVal != 0 && !isPowerOf2_32(yyval.UIntVal))
@@ -2277,11 +2277,11 @@
 ;
     break;}
 case 47:
-#line 1054 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1054 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 { yyval.UIntVal = 0; ;
     break;}
 case 48:
-#line 1055 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1055 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
   yyval.UIntVal = yyvsp[0].UInt64Val;
   if (yyval.UIntVal != 0 && !isPowerOf2_32(yyval.UIntVal))
@@ -2289,7 +2289,7 @@
 ;
     break;}
 case 49:
-#line 1062 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1062 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
   for (unsigned i = 0, e = strlen(yyvsp[0].StrVal); i != e; ++i)
     if (yyvsp[0].StrVal[i] == '"' || yyvsp[0].StrVal[i] == '\\')
@@ -2298,30 +2298,30 @@
 ;
     break;}
 case 50:
-#line 1069 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1069 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 { yyval.StrVal = 0; ;
     break;}
 case 51:
-#line 1070 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1070 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 { yyval.StrVal = yyvsp[0].StrVal; ;
     break;}
 case 52:
-#line 1075 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1075 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {;
     break;}
 case 53:
-#line 1076 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1076 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {;
     break;}
 case 54:
-#line 1077 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1077 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     CurGV->setSection(yyvsp[0].StrVal);
     free(yyvsp[0].StrVal);
   ;
     break;}
 case 55:
-#line 1081 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1081 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     if (yyvsp[0].UInt64Val != 0 && !isPowerOf2_32(yyvsp[0].UInt64Val))
       ThrowException("Alignment must be a power of two!");
@@ -2329,15 +2329,15 @@
   ;
     break;}
 case 57:
-#line 1094 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1094 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 { yyval.TypeVal = new PATypeHolder(yyvsp[0].PrimType); ;
     break;}
 case 59:
-#line 1095 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1095 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 { yyval.TypeVal = new PATypeHolder(yyvsp[0].PrimType); ;
     break;}
 case 60:
-#line 1097 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1097 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     if (!UpRefs.empty())
       ThrowException("Invalid upreference in type: " + (*yyvsp[0].TypeVal)->getDescription());
@@ -2345,25 +2345,25 @@
   ;
     break;}
 case 74:
-#line 1108 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1108 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.TypeVal = new PATypeHolder(OpaqueType::get());
   ;
     break;}
 case 75:
-#line 1111 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1111 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.TypeVal = new PATypeHolder(yyvsp[0].PrimType);
   ;
     break;}
 case 76:
-#line 1114 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1114 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {            // Named types are also simple types...
   yyval.TypeVal = new PATypeHolder(getTypeVal(yyvsp[0].ValIDVal));
 ;
     break;}
 case 77:
-#line 1120 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1120 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {                   // Type UpReference
     if (yyvsp[0].UInt64Val > (uint64_t)~0U) ThrowException("Value out of range!");
     OpaqueType *OT = OpaqueType::get();        // Use temporary placeholder
@@ -2373,7 +2373,7 @@
   ;
     break;}
 case 78:
-#line 1127 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1127 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {           // Function derived type?
     std::vector<const Type*> Params;
     for (std::list<llvm::PATypeHolder>::iterator I = yyvsp[-1].TypeList->begin(),
@@ -2388,14 +2388,14 @@
   ;
     break;}
 case 79:
-#line 1139 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1139 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {          // Sized array type?
     yyval.TypeVal = new PATypeHolder(HandleUpRefs(ArrayType::get(*yyvsp[-1].TypeVal, (unsigned)yyvsp[-3].UInt64Val)));
     delete yyvsp[-1].TypeVal;
   ;
     break;}
 case 80:
-#line 1143 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1143 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {          // Packed array type?
      const llvm::Type* ElemTy = yyvsp[-1].TypeVal->get();
      if ((unsigned)yyvsp[-3].UInt64Val != yyvsp[-3].UInt64Val)
@@ -2409,7 +2409,7 @@
   ;
     break;}
 case 81:
-#line 1154 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1154 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {                        // Structure type?
     std::vector<const Type*> Elements;
     for (std::list<llvm::PATypeHolder>::iterator I = yyvsp[-1].TypeList->begin(),
@@ -2421,51 +2421,51 @@
   ;
     break;}
 case 82:
-#line 1163 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1163 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {                                  // Empty structure type?
     yyval.TypeVal = new PATypeHolder(StructType::get(std::vector<const Type*>()));
   ;
     break;}
 case 83:
-#line 1166 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1166 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {                             // Pointer type?
     yyval.TypeVal = new PATypeHolder(HandleUpRefs(PointerType::get(*yyvsp[-1].TypeVal)));
     delete yyvsp[-1].TypeVal;
   ;
     break;}
 case 84:
-#line 1174 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1174 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.TypeList = new std::list<PATypeHolder>();
     yyval.TypeList->push_back(*yyvsp[0].TypeVal); delete yyvsp[0].TypeVal;
   ;
     break;}
 case 85:
-#line 1178 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1178 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     (yyval.TypeList=yyvsp[-2].TypeList)->push_back(*yyvsp[0].TypeVal); delete yyvsp[0].TypeVal;
   ;
     break;}
 case 87:
-#line 1184 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1184 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     (yyval.TypeList=yyvsp[-2].TypeList)->push_back(Type::VoidTy);
   ;
     break;}
 case 88:
-#line 1187 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1187 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     (yyval.TypeList = new std::list<PATypeHolder>())->push_back(Type::VoidTy);
   ;
     break;}
 case 89:
-#line 1190 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1190 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.TypeList = new std::list<PATypeHolder>();
   ;
     break;}
 case 90:
-#line 1200 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1200 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 { // Nonempty unsized arr
     const ArrayType *ATy = dyn_cast<ArrayType>(yyvsp[-3].TypeVal->get());
     if (ATy == 0)
@@ -2493,7 +2493,7 @@
   ;
     break;}
 case 91:
-#line 1225 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1225 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     const ArrayType *ATy = dyn_cast<ArrayType>(yyvsp[-2].TypeVal->get());
     if (ATy == 0)
@@ -2509,7 +2509,7 @@
   ;
     break;}
 case 92:
-#line 1238 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1238 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     const ArrayType *ATy = dyn_cast<ArrayType>(yyvsp[-2].TypeVal->get());
     if (ATy == 0)
@@ -2540,7 +2540,7 @@
   ;
     break;}
 case 93:
-#line 1266 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1266 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 { // Nonempty unsized arr
     const PackedType *PTy = dyn_cast<PackedType>(yyvsp[-3].TypeVal->get());
     if (PTy == 0)
@@ -2568,7 +2568,7 @@
   ;
     break;}
 case 94:
-#line 1291 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1291 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     const StructType *STy = dyn_cast<StructType>(yyvsp[-3].TypeVal->get());
     if (STy == 0)
@@ -2591,7 +2591,7 @@
   ;
     break;}
 case 95:
-#line 1311 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1311 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     const StructType *STy = dyn_cast<StructType>(yyvsp[-2].TypeVal->get());
     if (STy == 0)
@@ -2606,7 +2606,7 @@
   ;
     break;}
 case 96:
-#line 1323 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1323 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     const PointerType *PTy = dyn_cast<PointerType>(yyvsp[-1].TypeVal->get());
     if (PTy == 0)
@@ -2618,14 +2618,14 @@
   ;
     break;}
 case 97:
-#line 1332 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1332 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.ConstVal = UndefValue::get(yyvsp[-1].TypeVal->get());
     delete yyvsp[-1].TypeVal;
   ;
     break;}
 case 98:
-#line 1336 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1336 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     const PointerType *Ty = dyn_cast<PointerType>(yyvsp[-1].TypeVal->get());
     if (Ty == 0)
@@ -2687,7 +2687,7 @@
   ;
     break;}
 case 99:
-#line 1395 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1395 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     if (yyvsp[-1].TypeVal->get() != yyvsp[0].ConstVal->getType())
       ThrowException("Mismatched types for constant expression!");
@@ -2696,7 +2696,7 @@
   ;
     break;}
 case 100:
-#line 1401 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1401 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     const Type *Ty = yyvsp[-1].TypeVal->get();
     if (isa<FunctionType>(Ty) || Ty == Type::LabelTy || isa<OpaqueType>(Ty))
@@ -2706,7 +2706,7 @@
   ;
     break;}
 case 101:
-#line 1409 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1409 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {      // integral constants
     if (!ConstantSInt::isValueValidForType(yyvsp[-1].PrimType, yyvsp[0].SInt64Val))
       ThrowException("Constant value doesn't fit in type!");
@@ -2714,7 +2714,7 @@
   ;
     break;}
 case 102:
-#line 1414 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1414 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {            // integral constants
     if (!ConstantUInt::isValueValidForType(yyvsp[-1].PrimType, yyvsp[0].UInt64Val))
       ThrowException("Constant value doesn't fit in type!");
@@ -2722,19 +2722,19 @@
   ;
     break;}
 case 103:
-#line 1419 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1419 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {                      // Boolean constants
     yyval.ConstVal = ConstantBool::True;
   ;
     break;}
 case 104:
-#line 1422 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1422 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {                     // Boolean constants
     yyval.ConstVal = ConstantBool::False;
   ;
     break;}
 case 105:
-#line 1425 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1425 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {                   // Float & Double constants
     if (!ConstantFP::isValueValidForType(yyvsp[-1].PrimType, yyvsp[0].FPVal))
       ThrowException("Floating point constant invalid for type!!");
@@ -2742,7 +2742,7 @@
   ;
     break;}
 case 106:
-#line 1432 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1432 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     if (!yyvsp[-3].ConstVal->getType()->isFirstClassType())
       ThrowException("cast constant expression from a non-primitive type: '" +
@@ -2755,7 +2755,7 @@
   ;
     break;}
 case 107:
-#line 1442 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1442 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     if (!isa<PointerType>(yyvsp[-2].ConstVal->getType()))
       ThrowException("GetElementPtr requires a pointer operand!");
@@ -2789,7 +2789,7 @@
   ;
     break;}
 case 108:
-#line 1473 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1473 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     if (yyvsp[-5].ConstVal->getType() != Type::BoolTy)
       ThrowException("Select condition must be of boolean type!");
@@ -2799,7 +2799,7 @@
   ;
     break;}
 case 109:
-#line 1480 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1480 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     if (yyvsp[-3].ConstVal->getType() != yyvsp[-1].ConstVal->getType())
       ThrowException("Binary operator types must match!");
@@ -2823,7 +2823,7 @@
   ;
     break;}
 case 110:
-#line 1501 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1501 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     if (yyvsp[-3].ConstVal->getType() != yyvsp[-1].ConstVal->getType())
       ThrowException("Logical operator types must match!");
@@ -2836,7 +2836,7 @@
   ;
     break;}
 case 111:
-#line 1511 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1511 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     if (yyvsp[-3].ConstVal->getType() != yyvsp[-1].ConstVal->getType())
       ThrowException("setcc operand types must match!");
@@ -2844,7 +2844,7 @@
   ;
     break;}
 case 112:
-#line 1516 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1516 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     if (yyvsp[-1].ConstVal->getType() != Type::UByteTy)
       ThrowException("Shift count for shift constant must be unsigned byte!");
@@ -2854,7 +2854,7 @@
   ;
     break;}
 case 113:
-#line 1523 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1523 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
         if (!isa<PackedType>(yyvsp[-3].ConstVal->getType()))
       ThrowException("First operand of extractelement must be "
@@ -2865,54 +2865,54 @@
   ;
     break;}
 case 114:
-#line 1533 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1533 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     (yyval.ConstVector = yyvsp[-2].ConstVector)->push_back(yyvsp[0].ConstVal);
   ;
     break;}
 case 115:
-#line 1536 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1536 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.ConstVector = new std::vector<Constant*>();
     yyval.ConstVector->push_back(yyvsp[0].ConstVal);
   ;
     break;}
 case 116:
-#line 1543 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1543 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 { yyval.BoolVal = false; ;
     break;}
 case 117:
-#line 1543 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1543 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 { yyval.BoolVal = true; ;
     break;}
 case 118:
-#line 1553 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1553 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
   yyval.ModuleVal = ParserResult = yyvsp[0].ModuleVal;
   CurModule.ModuleDone();
 ;
     break;}
 case 119:
-#line 1560 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1560 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.ModuleVal = yyvsp[-1].ModuleVal;
     CurFun.FunctionDone();
   ;
     break;}
 case 120:
-#line 1564 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1564 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.ModuleVal = yyvsp[-1].ModuleVal;
   ;
     break;}
 case 121:
-#line 1567 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1567 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.ModuleVal = yyvsp[-1].ModuleVal;
   ;
     break;}
 case 122:
-#line 1570 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1570 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.ModuleVal = CurModule.CurrentModule;
     // Emit an error if there are any unresolved types left.
@@ -2926,7 +2926,7 @@
   ;
     break;}
 case 123:
-#line 1583 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1583 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     // Eagerly resolve types.  This is not an optimization, this is a
     // requirement that is due to the fact that we could have this:
@@ -2949,25 +2949,25 @@
   ;
     break;}
 case 124:
-#line 1603 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1603 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {       // Function prototypes can be in const pool
   ;
     break;}
 case 125:
-#line 1605 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1605 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     if (yyvsp[0].ConstVal == 0) ThrowException("Global value initializer is not a constant!");
     CurGV = ParseGlobalVariable(yyvsp[-3].StrVal, yyvsp[-2].Linkage, yyvsp[-1].BoolVal, yyvsp[0].ConstVal->getType(), yyvsp[0].ConstVal);
                                                        ;
     break;}
 case 126:
-#line 1608 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1608 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     CurGV = 0;
   ;
     break;}
 case 127:
-#line 1611 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1611 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     CurGV = ParseGlobalVariable(yyvsp[-3].StrVal, GlobalValue::ExternalLinkage,
                                              yyvsp[-1].BoolVal, *yyvsp[0].TypeVal, 0);
@@ -2975,42 +2975,42 @@
                                                    ;
     break;}
 case 128:
-#line 1615 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1615 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     CurGV = 0;
   ;
     break;}
 case 129:
-#line 1618 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1618 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 { 
   ;
     break;}
 case 130:
-#line 1620 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1620 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
   ;
     break;}
 case 131:
-#line 1622 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1622 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 { 
   ;
     break;}
 case 132:
-#line 1627 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1627 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 { yyval.Endianness = Module::BigEndian; ;
     break;}
 case 133:
-#line 1628 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1628 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 { yyval.Endianness = Module::LittleEndian; ;
     break;}
 case 134:
-#line 1630 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1630 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     CurModule.CurrentModule->setEndianness(yyvsp[0].Endianness);
   ;
     break;}
 case 135:
-#line 1633 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1633 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     if (yyvsp[0].UInt64Val == 32)
       CurModule.CurrentModule->setPointerSize(Module::Pointer32);
@@ -3021,37 +3021,37 @@
   ;
     break;}
 case 136:
-#line 1641 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1641 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     CurModule.CurrentModule->setTargetTriple(yyvsp[0].StrVal);
     free(yyvsp[0].StrVal);
   ;
     break;}
 case 138:
-#line 1648 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1648 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
           CurModule.CurrentModule->addLibrary(yyvsp[0].StrVal);
           free(yyvsp[0].StrVal);
         ;
     break;}
 case 139:
-#line 1652 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1652 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
           CurModule.CurrentModule->addLibrary(yyvsp[0].StrVal);
           free(yyvsp[0].StrVal);
         ;
     break;}
 case 140:
-#line 1656 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1656 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
         ;
     break;}
 case 144:
-#line 1665 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1665 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 { yyval.StrVal = 0; ;
     break;}
 case 145:
-#line 1667 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1667 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
   if (*yyvsp[-1].TypeVal == Type::VoidTy)
     ThrowException("void typed arguments are invalid!");
@@ -3059,7 +3059,7 @@
 ;
     break;}
 case 146:
-#line 1673 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1673 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.ArgList = yyvsp[-2].ArgList;
     yyvsp[-2].ArgList->push_back(*yyvsp[0].ArgVal);
@@ -3067,7 +3067,7 @@
   ;
     break;}
 case 147:
-#line 1678 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1678 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.ArgList = new std::vector<std::pair<PATypeHolder*,char*> >();
     yyval.ArgList->push_back(*yyvsp[0].ArgVal);
@@ -3075,13 +3075,13 @@
   ;
     break;}
 case 148:
-#line 1684 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1684 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.ArgList = yyvsp[0].ArgList;
   ;
     break;}
 case 149:
-#line 1687 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1687 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.ArgList = yyvsp[-2].ArgList;
     yyval.ArgList->push_back(std::pair<PATypeHolder*,
@@ -3089,20 +3089,20 @@
   ;
     break;}
 case 150:
-#line 1692 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1692 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.ArgList = new std::vector<std::pair<PATypeHolder*,char*> >();
     yyval.ArgList->push_back(std::make_pair(new PATypeHolder(Type::VoidTy), (char*)0));
   ;
     break;}
 case 151:
-#line 1696 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1696 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.ArgList = 0;
   ;
     break;}
 case 152:
-#line 1701 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1701 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
   UnEscapeLexed(yyvsp[-5].StrVal);
   std::string FunctionName(yyvsp[-5].StrVal);
@@ -3189,7 +3189,7 @@
 ;
     break;}
 case 155:
-#line 1788 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1788 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
   yyval.FunctionVal = CurFun.CurrentFunction;
 
@@ -3199,72 +3199,72 @@
 ;
     break;}
 case 158:
-#line 1798 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1798 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
   yyval.FunctionVal = yyvsp[-1].FunctionVal;
 ;
     break;}
 case 159:
-#line 1802 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1802 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 { CurFun.isDeclare = true; ;
     break;}
 case 160:
-#line 1802 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1802 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
   yyval.FunctionVal = CurFun.CurrentFunction;
   CurFun.FunctionDone();
 ;
     break;}
 case 161:
-#line 1811 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1811 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {    // A reference to a direct constant
     yyval.ValIDVal = ValID::create(yyvsp[0].SInt64Val);
   ;
     break;}
 case 162:
-#line 1814 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1814 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.ValIDVal = ValID::create(yyvsp[0].UInt64Val);
   ;
     break;}
 case 163:
-#line 1817 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1817 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {                     // Perhaps it's an FP constant?
     yyval.ValIDVal = ValID::create(yyvsp[0].FPVal);
   ;
     break;}
 case 164:
-#line 1820 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1820 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.ValIDVal = ValID::create(ConstantBool::True);
   ;
     break;}
 case 165:
-#line 1823 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1823 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.ValIDVal = ValID::create(ConstantBool::False);
   ;
     break;}
 case 166:
-#line 1826 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1826 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.ValIDVal = ValID::createNull();
   ;
     break;}
 case 167:
-#line 1829 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1829 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.ValIDVal = ValID::createUndef();
   ;
     break;}
 case 168:
-#line 1832 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1832 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {     // A vector zero constant.
     yyval.ValIDVal = ValID::createZeroInit();
   ;
     break;}
 case 169:
-#line 1835 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1835 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 { // Nonempty unsized packed vector
     const Type *ETy = (*yyvsp[-1].ConstVector)[0]->getType();
     int NumElements = yyvsp[-1].ConstVector->size(); 
@@ -3291,43 +3291,43 @@
   ;
     break;}
 case 170:
-#line 1859 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1859 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.ValIDVal = ValID::create(yyvsp[0].ConstVal);
   ;
     break;}
 case 171:
-#line 1866 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1866 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {  // Is it an integer reference...?
     yyval.ValIDVal = ValID::create(yyvsp[0].SIntVal);
   ;
     break;}
 case 172:
-#line 1869 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1869 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {                   // Is it a named reference...?
     yyval.ValIDVal = ValID::create(yyvsp[0].StrVal);
   ;
     break;}
 case 175:
-#line 1880 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1880 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.ValueVal = getVal(*yyvsp[-1].TypeVal, yyvsp[0].ValIDVal); delete yyvsp[-1].TypeVal;
   ;
     break;}
 case 176:
-#line 1884 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1884 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.FunctionVal = yyvsp[-1].FunctionVal;
   ;
     break;}
 case 177:
-#line 1887 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1887 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 { // Do not allow functions with 0 basic blocks   
     yyval.FunctionVal = yyvsp[-1].FunctionVal;
   ;
     break;}
 case 178:
-#line 1895 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1895 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     setValueName(yyvsp[0].TermInstVal, yyvsp[-1].StrVal);
     InsertValue(yyvsp[0].TermInstVal);
@@ -3338,14 +3338,14 @@
   ;
     break;}
 case 179:
-#line 1904 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1904 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     yyvsp[-1].BasicBlockVal->getInstList().push_back(yyvsp[0].InstVal);
     yyval.BasicBlockVal = yyvsp[-1].BasicBlockVal;
   ;
     break;}
 case 180:
-#line 1908 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1908 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.BasicBlockVal = CurBB = getBBVal(ValID::create((int)CurFun.NextBBNum++), true);
 
@@ -3358,7 +3358,7 @@
   ;
     break;}
 case 181:
-#line 1918 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1918 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.BasicBlockVal = CurBB = getBBVal(ValID::create(yyvsp[0].StrVal), true);
 
@@ -3371,31 +3371,31 @@
   ;
     break;}
 case 182:
-#line 1929 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1929 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {              // Return with a result...
     yyval.TermInstVal = new ReturnInst(yyvsp[0].ValueVal);
   ;
     break;}
 case 183:
-#line 1932 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1932 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {                                       // Return with no result...
     yyval.TermInstVal = new ReturnInst();
   ;
     break;}
 case 184:
-#line 1935 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1935 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {                         // Unconditional Branch...
     yyval.TermInstVal = new BranchInst(getBBVal(yyvsp[0].ValIDVal));
   ;
     break;}
 case 185:
-#line 1938 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1938 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {  
     yyval.TermInstVal = new BranchInst(getBBVal(yyvsp[-3].ValIDVal), getBBVal(yyvsp[0].ValIDVal), getVal(Type::BoolTy, yyvsp[-6].ValIDVal));
   ;
     break;}
 case 186:
-#line 1941 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1941 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     SwitchInst *S = new SwitchInst(getVal(yyvsp[-7].PrimType, yyvsp[-6].ValIDVal), getBBVal(yyvsp[-3].ValIDVal), yyvsp[-1].JumpTable->size());
     yyval.TermInstVal = S;
@@ -3412,14 +3412,14 @@
   ;
     break;}
 case 187:
-#line 1955 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1955 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     SwitchInst *S = new SwitchInst(getVal(yyvsp[-6].PrimType, yyvsp[-5].ValIDVal), getBBVal(yyvsp[-2].ValIDVal), 0);
     yyval.TermInstVal = S;
   ;
     break;}
 case 188:
-#line 1960 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 1960 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     const PointerType *PFTy;
     const FunctionType *Ty;
@@ -3474,19 +3474,19 @@
   ;
     break;}
 case 189:
-#line 2012 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 2012 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.TermInstVal = new UnwindInst();
   ;
     break;}
 case 190:
-#line 2015 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 2015 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.TermInstVal = new UnreachableInst();
   ;
     break;}
 case 191:
-#line 2021 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 2021 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.JumpTable = yyvsp[-5].JumpTable;
     Constant *V = cast<Constant>(getValNonImprovising(yyvsp[-4].PrimType, yyvsp[-3].ValIDVal));
@@ -3497,7 +3497,7 @@
   ;
     break;}
 case 192:
-#line 2029 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 2029 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.JumpTable = new std::vector<std::pair<Constant*, BasicBlock*> >();
     Constant *V = cast<Constant>(getValNonImprovising(yyvsp[-4].PrimType, yyvsp[-3].ValIDVal));
@@ -3509,7 +3509,7 @@
   ;
     break;}
 case 193:
-#line 2039 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 2039 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
   // Is this definition named?? if so, assign the name...
   setValueName(yyvsp[0].InstVal, yyvsp[-1].StrVal);
@@ -3518,7 +3518,7 @@
 ;
     break;}
 case 194:
-#line 2046 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 2046 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {    // Used for PHI nodes
     yyval.PHIList = new std::list<std::pair<Value*, BasicBlock*> >();
     yyval.PHIList->push_back(std::make_pair(getVal(*yyvsp[-5].TypeVal, yyvsp[-3].ValIDVal), getBBVal(yyvsp[-1].ValIDVal)));
@@ -3526,7 +3526,7 @@
   ;
     break;}
 case 195:
-#line 2051 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 2051 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.PHIList = yyvsp[-6].PHIList;
     yyvsp[-6].PHIList->push_back(std::make_pair(getVal(yyvsp[-6].PHIList->front().first->getType(), yyvsp[-3].ValIDVal),
@@ -3534,37 +3534,37 @@
   ;
     break;}
 case 196:
-#line 2058 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 2058 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {    // Used for call statements, and memory insts...
     yyval.ValueList = new std::vector<Value*>();
     yyval.ValueList->push_back(yyvsp[0].ValueVal);
   ;
     break;}
 case 197:
-#line 2062 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 2062 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.ValueList = yyvsp[-2].ValueList;
     yyvsp[-2].ValueList->push_back(yyvsp[0].ValueVal);
   ;
     break;}
 case 199:
-#line 2068 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 2068 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 { yyval.ValueList = 0; ;
     break;}
 case 200:
-#line 2070 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 2070 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.BoolVal = true;
   ;
     break;}
 case 201:
-#line 2073 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 2073 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.BoolVal = false;
   ;
     break;}
 case 202:
-#line 2079 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 2079 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     if (!(*yyvsp[-3].TypeVal)->isInteger() && !(*yyvsp[-3].TypeVal)->isFloatingPoint() && 
         !isa<PackedType>((*yyvsp[-3].TypeVal).get()))
@@ -3579,7 +3579,7 @@
   ;
     break;}
 case 203:
-#line 2091 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 2091 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     if (!(*yyvsp[-3].TypeVal)->isIntegral()) {
       if (!isa<PackedType>(yyvsp[-3].TypeVal->get()) ||
@@ -3593,7 +3593,7 @@
   ;
     break;}
 case 204:
-#line 2102 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 2102 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     if(isa<PackedType>((*yyvsp[-3].TypeVal).get())) {
       ThrowException(
@@ -3606,7 +3606,7 @@
   ;
     break;}
 case 205:
-#line 2112 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 2112 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     std::cerr << "WARNING: Use of eliminated 'not' instruction:"
               << " Replacing with 'xor'.\n";
@@ -3621,7 +3621,7 @@
   ;
     break;}
 case 206:
-#line 2124 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 2124 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     if (yyvsp[0].ValueVal->getType() != Type::UByteTy)
       ThrowException("Shift amount must be ubyte!");
@@ -3631,7 +3631,7 @@
   ;
     break;}
 case 207:
-#line 2131 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 2131 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     if (!yyvsp[0].TypeVal->get()->isFirstClassType())
       ThrowException("cast instruction to a non-primitive type: '" +
@@ -3641,7 +3641,7 @@
   ;
     break;}
 case 208:
-#line 2138 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 2138 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     if (yyvsp[-4].ValueVal->getType() != Type::BoolTy)
       ThrowException("select condition must be boolean!");
@@ -3651,7 +3651,7 @@
   ;
     break;}
 case 209:
-#line 2145 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 2145 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     NewVarArgs = true;
     yyval.InstVal = new VAArgInst(yyvsp[-2].ValueVal, *yyvsp[0].TypeVal);
@@ -3659,7 +3659,7 @@
   ;
     break;}
 case 210:
-#line 2150 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 2150 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     ObsoleteVarArgs = true;
     const Type* ArgTy = yyvsp[-2].ValueVal->getType();
@@ -3681,7 +3681,7 @@
   ;
     break;}
 case 211:
-#line 2169 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 2169 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     ObsoleteVarArgs = true;
     const Type* ArgTy = yyvsp[-2].ValueVal->getType();
@@ -3706,7 +3706,7 @@
   ;
     break;}
 case 212:
-#line 2191 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 2191 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     if (!isa<PackedType>(yyvsp[-2].ValueVal->getType()))
       ThrowException("First operand of extractelement must be a "
@@ -3717,7 +3717,7 @@
   ;
     break;}
 case 213:
-#line 2199 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 2199 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     const Type *Ty = yyvsp[0].PHIList->front().first->getType();
     if (!Ty->isFirstClassType())
@@ -3734,7 +3734,7 @@
   ;
     break;}
 case 214:
-#line 2213 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 2213 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     const PointerType *PFTy;
     const FunctionType *Ty;
@@ -3794,65 +3794,65 @@
   ;
     break;}
 case 215:
-#line 2270 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 2270 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.InstVal = yyvsp[0].InstVal;
   ;
     break;}
 case 216:
-#line 2276 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 2276 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 { 
     yyval.ValueList = yyvsp[0].ValueList; 
   ;
     break;}
 case 217:
-#line 2278 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 2278 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 { 
     yyval.ValueList = new std::vector<Value*>(); 
   ;
     break;}
 case 218:
-#line 2282 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 2282 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.BoolVal = true;
   ;
     break;}
 case 219:
-#line 2285 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 2285 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.BoolVal = false;
   ;
     break;}
 case 220:
-#line 2291 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 2291 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.InstVal = new MallocInst(*yyvsp[-1].TypeVal, 0, yyvsp[0].UIntVal);
     delete yyvsp[-1].TypeVal;
   ;
     break;}
 case 221:
-#line 2295 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 2295 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.InstVal = new MallocInst(*yyvsp[-4].TypeVal, getVal(yyvsp[-2].PrimType, yyvsp[-1].ValIDVal), yyvsp[0].UIntVal);
     delete yyvsp[-4].TypeVal;
   ;
     break;}
 case 222:
-#line 2299 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 2299 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.InstVal = new AllocaInst(*yyvsp[-1].TypeVal, 0, yyvsp[0].UIntVal);
     delete yyvsp[-1].TypeVal;
   ;
     break;}
 case 223:
-#line 2303 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 2303 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     yyval.InstVal = new AllocaInst(*yyvsp[-4].TypeVal, getVal(yyvsp[-2].PrimType, yyvsp[-1].ValIDVal), yyvsp[0].UIntVal);
     delete yyvsp[-4].TypeVal;
   ;
     break;}
 case 224:
-#line 2307 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 2307 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     if (!isa<PointerType>(yyvsp[0].ValueVal->getType()))
       ThrowException("Trying to free nonpointer type " + 
@@ -3861,7 +3861,7 @@
   ;
     break;}
 case 225:
-#line 2314 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 2314 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     if (!isa<PointerType>(yyvsp[-1].TypeVal->get()))
       ThrowException("Can't load from nonpointer type: " +
@@ -3874,7 +3874,7 @@
   ;
     break;}
 case 226:
-#line 2324 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 2324 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     const PointerType *PT = dyn_cast<PointerType>(yyvsp[-1].TypeVal->get());
     if (!PT)
@@ -3890,7 +3890,7 @@
   ;
     break;}
 case 227:
-#line 2337 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 2337 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
     if (!isa<PointerType>(yyvsp[-2].TypeVal->get()))
       ThrowException("getelementptr insn requires pointer operand!");
@@ -4135,7 +4135,7 @@
     }
   return 1;
 }
-#line 2360 "/Users/bocchino/vllvm-checkin/src/lib/AsmParser/llvmAsmParser.y"
+#line 2360 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 
 int yyerror(const char *ErrorMsg) {
   std::string where 





From alenhar2 at cs.uiuc.edu  Tue Jan 10 21:33:18 2006
From: alenhar2 at cs.uiuc.edu (Andrew Lenharth)
Date: Tue, 10 Jan 2006 21:33:18 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaInstrInfo.td 
Message-ID: <200601110333.VAA02994@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/Alpha:

AlphaInstrInfo.td updated: 1.100 -> 1.101
---
Log message:

this pattern was bogus

---
Diffs of the changes:  (+1 -2)

 AlphaInstrInfo.td |    3 +--
 1 files changed, 1 insertion(+), 2 deletions(-)


Index: llvm/lib/Target/Alpha/AlphaInstrInfo.td
diff -u llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.100 llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.101
--- llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.100	Tue Jan 10 13:12:47 2006
+++ llvm/lib/Target/Alpha/AlphaInstrInfo.td	Tue Jan 10 21:33:06 2006
@@ -716,7 +716,7 @@
                    [(brcond (setgt GPRC:$RA, 0), bb:$DISP)]>;
 def BLBC : BFormDG<0x38, "blbc $RA,$DISP", []>; //TODO: Low bit clear
 def BLBS : BFormDG<0x3C, "blbs $RA,$DISP",
-                   [(brcond (seteq GPRC:$RA, 1), bb:$DISP)]>;
+                   [(brcond (and GPRC:$RA, 1), bb:$DISP)]>;
 def BLE  : BFormDG<0x3B, "ble $RA,$DISP",
                    [(brcond (setle GPRC:$RA, 0), bb:$DISP)]>;
 def BLT  : BFormDG<0x3A, "blt $RA,$DISP",
@@ -739,7 +739,6 @@
                   [(brcond (setne F8RC:$RA, immFPZ), bb:$DISP)]>;
 }
 
-def : Pat<(brcond (and GPRC:$RA, 1), bb:$DISP), (BLBS GPRC:$RA, bb:$DISP)>;
 def : Pat<(brcond GPRC:$RA, bb:$DISP), (BNE GPRC:$RA, bb:$DISP)>;
 def : Pat<(brcond (setne GPRC:$RA, GPRC:$RB), bb:$DISP),
           (BEQ (CMPEQ GPRC:$RA, GPRC:$RB), bb:$DISP)>;





From duraid at octopus.com.au  Tue Jan 10 21:50:53 2006
From: duraid at octopus.com.au (Duraid Madina)
Date: Tue, 10 Jan 2006 21:50:53 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp 
Message-ID: <200601110350.VAA03118@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/IA64:

IA64ISelDAGToDAG.cpp updated: 1.17 -> 1.18
---
Log message:

cleanup GETFD



---
Diffs of the changes:  (+3 -4)

 IA64ISelDAGToDAG.cpp |    7 +++----
 1 files changed, 3 insertions(+), 4 deletions(-)


Index: llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp
diff -u llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp:1.17 llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp:1.18
--- llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp:1.17	Sun Dec 25 08:09:08 2005
+++ llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp	Tue Jan 10 21:50:40 2006
@@ -411,10 +411,9 @@
   
   case IA64ISD::GETFD: {
     SDOperand Input = Select(N->getOperand(0));
-    SDOperand Result = CurDAG->getTargetNode(IA64::GETFD, MVT::i64, MVT::Flag, Input);
-    CodeGenMap[Op.getValue(0)] = Result;
-    CodeGenMap[Op.getValue(1)] = Result.getValue(1);
-    return Result.getValue(Op.ResNo);
+    SDOperand Result = CurDAG->getTargetNode(IA64::GETFD, MVT::i64, Input);
+    CodeGenMap[Op] = Result;
+    return Result;
   } 
   
   case ISD::CALL:





From lattner at cs.uiuc.edu  Tue Jan 10 23:08:42 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue, 10 Jan 2006 23:08:42 -0600
Subject: [llvm-commits] CVS: llvm/lib/Analysis/LoopInfo.cpp 
Message-ID: <200601110508.XAA03687@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Analysis:

LoopInfo.cpp updated: 1.65 -> 1.66
---
Log message:

Switch loopinfo to using ETForest instead of DominatorSet to compute itself.
Patch by Daniel Berlin!


---
Diffs of the changes:  (+9 -9)

 LoopInfo.cpp |   18 +++++++++---------
 1 files changed, 9 insertions(+), 9 deletions(-)


Index: llvm/lib/Analysis/LoopInfo.cpp
diff -u llvm/lib/Analysis/LoopInfo.cpp:1.65 llvm/lib/Analysis/LoopInfo.cpp:1.66
--- llvm/lib/Analysis/LoopInfo.cpp:1.65	Mon Sep 12 12:03:55 2005
+++ llvm/lib/Analysis/LoopInfo.cpp	Tue Jan 10 23:08:29 2006
@@ -90,7 +90,7 @@
 
 bool LoopInfo::runOnFunction(Function &) {
   releaseMemory();
-  Calculate(getAnalysis<DominatorSet>());    // Update
+  Calculate(getAnalysis<ETForest>());    // Update
   return false;
 }
 
@@ -104,18 +104,18 @@
 }
 
 
-void LoopInfo::Calculate(const DominatorSet &DS) {
-  BasicBlock *RootNode = DS.getRoot();
+void LoopInfo::Calculate(const ETForest &EF) {
+  BasicBlock *RootNode = EF.getRoot();
 
   for (df_iterator<BasicBlock*> NI = df_begin(RootNode),
          NE = df_end(RootNode); NI != NE; ++NI)
-    if (Loop *L = ConsiderForLoop(*NI, DS))
+    if (Loop *L = ConsiderForLoop(*NI, EF))
       TopLevelLoops.push_back(L);
 }
 
 void LoopInfo::getAnalysisUsage(AnalysisUsage &AU) const {
   AU.setPreservesAll();
-  AU.addRequired<DominatorSet>();
+  AU.addRequired<ETForest>();
 }
 
 void LoopInfo::print(std::ostream &OS, const Module* ) const {
@@ -135,7 +135,7 @@
   return isNotAlreadyContainedIn(SubLoop->getParentLoop(), ParentLoop);
 }
 
-Loop *LoopInfo::ConsiderForLoop(BasicBlock *BB, const DominatorSet &DS) {
+Loop *LoopInfo::ConsiderForLoop(BasicBlock *BB, const ETForest &EF) {
   if (BBMap.find(BB) != BBMap.end()) return 0;   // Haven't processed this node?
 
   std::vector<BasicBlock *> TodoStack;
@@ -143,7 +143,7 @@
   // Scan the predecessors of BB, checking to see if BB dominates any of
   // them.  This identifies backedges which target this node...
   for (pred_iterator I = pred_begin(BB), E = pred_end(BB); I != E; ++I)
-    if (DS.dominates(BB, *I))   // If BB dominates it's predecessor...
+    if (EF.dominates(BB, *I))   // If BB dominates it's predecessor...
       TodoStack.push_back(*I);
 
   if (TodoStack.empty()) return 0;  // No backedges to this block...
@@ -159,7 +159,7 @@
     TodoStack.pop_back();
 
     if (!L->contains(X) &&         // As of yet unprocessed??
-        DS.dominates(EntryBlock, X)) {   // X is reachable from entry block?
+        EF.dominates(EntryBlock, X)) {   // X is reachable from entry block?
       // Check to see if this block already belongs to a loop.  If this occurs
       // then we have a case where a loop that is supposed to be a child of the
       // current loop was processed before the current loop.  When this occurs,
@@ -191,7 +191,7 @@
   // If there are any loops nested within this loop, create them now!
   for (std::vector<BasicBlock*>::iterator I = L->Blocks.begin(),
          E = L->Blocks.end(); I != E; ++I)
-    if (Loop *NewLoop = ConsiderForLoop(*I, DS)) {
+    if (Loop *NewLoop = ConsiderForLoop(*I, EF)) {
       L->SubLoops.push_back(NewLoop);
       NewLoop->ParentLoop = L;
     }





From lattner at cs.uiuc.edu  Tue Jan 10 23:09:09 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue, 10 Jan 2006 23:09:09 -0600
Subject: [llvm-commits] CVS: llvm/include/llvm/Analysis/LoopInfo.h 
Message-ID: <200601110509.XAA03720@zion.cs.uiuc.edu>



Changes in directory llvm/include/llvm/Analysis:

LoopInfo.h updated: 1.50 -> 1.51
---
Log message:

Switch loopinfo to using ETForest instead of DominatorSet to compute itself.Patch by Daniel Berlin!


---
Diffs of the changes:  (+3 -5)

 LoopInfo.h |    8 +++-----
 1 files changed, 3 insertions(+), 5 deletions(-)


Index: llvm/include/llvm/Analysis/LoopInfo.h
diff -u llvm/include/llvm/Analysis/LoopInfo.h:1.50 llvm/include/llvm/Analysis/LoopInfo.h:1.51
--- llvm/include/llvm/Analysis/LoopInfo.h:1.50	Mon Sep 12 12:03:16 2005
+++ llvm/include/llvm/Analysis/LoopInfo.h	Tue Jan 10 23:08:57 2006
@@ -35,7 +35,7 @@
 
 namespace llvm {
 
-struct DominatorSet;
+struct ETForest;
 class LoopInfo;
 class PHINode;
 class Instruction;
@@ -267,8 +267,6 @@
   virtual void releaseMemory();
   void print(std::ostream &O, const Module* = 0) const;
 
-  /// getAnalysisUsage - Requires dominator sets
-  ///
   virtual void getAnalysisUsage(AnalysisUsage &AU) const;
 
   /// removeLoop - This removes the specified top-level loop from this loop info
@@ -299,8 +297,8 @@
 
   static void stub();  // Noop
 private:
-  void Calculate(const DominatorSet &DS);
-  Loop *ConsiderForLoop(BasicBlock *BB, const DominatorSet &DS);
+  void Calculate(const ETForest &EF);
+  Loop *ConsiderForLoop(BasicBlock *BB, const ETForest &EF);
   void MoveSiblingLoopInto(Loop *NewChild, Loop *NewParent);
   void InsertLoopInto(Loop *L, Loop *Parent);
 };





From lattner at cs.uiuc.edu  Tue Jan 10 23:09:53 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue, 10 Jan 2006 23:09:53 -0600
Subject: [llvm-commits] CVS: llvm/lib/Transforms/Scalar/CorrelatedExprs.cpp 
Message-ID: <200601110509.XAA03753@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Transforms/Scalar:

CorrelatedExprs.cpp updated: 1.29 -> 1.30
---
Log message:

Switch this to using ETForest instead of DominatorSet to compute itself.  
Patch written by Daniel Berlin!


---
Diffs of the changes:  (+16 -16)

 CorrelatedExprs.cpp |   32 ++++++++++++++++----------------
 1 files changed, 16 insertions(+), 16 deletions(-)


Index: llvm/lib/Transforms/Scalar/CorrelatedExprs.cpp
diff -u llvm/lib/Transforms/Scalar/CorrelatedExprs.cpp:1.29 llvm/lib/Transforms/Scalar/CorrelatedExprs.cpp:1.30
--- llvm/lib/Transforms/Scalar/CorrelatedExprs.cpp:1.29	Thu Apr 21 18:45:12 2005
+++ llvm/lib/Transforms/Scalar/CorrelatedExprs.cpp	Tue Jan 10 23:09:40 2006
@@ -217,14 +217,14 @@
   class CEE : public FunctionPass {
     std::map<Value*, unsigned> RankMap;
     std::map<BasicBlock*, RegionInfo> RegionInfoMap;
-    DominatorSet *DS;
+    ETForest *EF;
     DominatorTree *DT;
   public:
     virtual bool runOnFunction(Function &F);
 
     // We don't modify the program, so we preserve all analyses
     virtual void getAnalysisUsage(AnalysisUsage &AU) const {
-      AU.addRequired<DominatorSet>();
+      AU.addRequired<ETForest>();
       AU.addRequired<DominatorTree>();
       AU.addRequiredID(BreakCriticalEdgesID);
     };
@@ -297,7 +297,7 @@
   // Traverse the dominator tree, computing information for each node in the
   // tree.  Note that our traversal will not even touch unreachable basic
   // blocks.
-  DS = &getAnalysis<DominatorSet>();
+  EF = &getAnalysis<ETForest>();
   DT = &getAnalysis<DominatorTree>();
 
   std::set<BasicBlock*> VisitedBlocks;
@@ -426,7 +426,7 @@
   // Check to see if we dominate the block. If so, this block will get the
   // condition turned to a constant anyway.
   //
-  //if (DS->dominates(RI.getEntryBlock(), BB))
+  //if (EF->dominates(RI.getEntryBlock(), BB))
   // return 0;
 
   BasicBlock *BB = TI->getParent();
@@ -540,7 +540,7 @@
   // insert dead phi nodes, but it is more trouble to see if they are used than
   // to just blindly insert them.
   //
-  if (DS->dominates(OldSucc, Dest)) {
+  if (EF->dominates(OldSucc, Dest)) {
     // RegionExitBlocks - Find all of the blocks that are not dominated by Dest,
     // but have predecessors that are.  Additionally, prune down the set to only
     // include blocks that are dominated by OldSucc as well.
@@ -620,7 +620,7 @@
   // Since we invalidated the CFG, recalculate the dominator set so that it is
   // useful for later processing!
   // FIXME: This is much worse than it really should be!
-  //DS->recalculate();
+  //EF->recalculate();
 
   DEBUG(std::cerr << "After forwarding: " << *BB->getParent());
 }
@@ -641,7 +641,7 @@
   for (Value::use_iterator I = Orig->use_begin(), E = Orig->use_end();
        I != E; ++I)
     if (Instruction *User = dyn_cast<Instruction>(*I))
-      if (DS->dominates(RegionDominator, User->getParent()))
+      if (EF->dominates(RegionDominator, User->getParent()))
         InstsToChange.push_back(User);
       else if (PHINode *PN = dyn_cast<PHINode>(User)) {
         PHIsToChange.push_back(PN);
@@ -654,7 +654,7 @@
     PHINode *PN = PHIsToChange[i];
     for (unsigned j = 0, e = PN->getNumIncomingValues(); j != e; ++j)
       if (PN->getIncomingValue(j) == Orig &&
-          DS->dominates(RegionDominator, PN->getIncomingBlock(j)))
+          EF->dominates(RegionDominator, PN->getIncomingBlock(j)))
         PN->setIncomingValue(j, New);
   }
 
@@ -668,7 +668,7 @@
       // values that correspond to basic blocks in the region.
       for (unsigned j = 0, e = PN->getNumIncomingValues(); j != e; ++j)
         if (PN->getIncomingValue(j) == Orig &&
-            DS->dominates(RegionDominator, PN->getIncomingBlock(j)))
+            EF->dominates(RegionDominator, PN->getIncomingBlock(j)))
           PN->setIncomingValue(j, New);
 
     } else {
@@ -678,14 +678,14 @@
 
 static void CalcRegionExitBlocks(BasicBlock *Header, BasicBlock *BB,
                                  std::set<BasicBlock*> &Visited,
-                                 DominatorSet &DS,
+                                 ETForest &EF,
                                  std::vector<BasicBlock*> &RegionExitBlocks) {
   if (Visited.count(BB)) return;
   Visited.insert(BB);
 
-  if (DS.dominates(Header, BB)) {  // Block in the region, recursively traverse
+  if (EF.dominates(Header, BB)) {  // Block in the region, recursively traverse
     for (succ_iterator I = succ_begin(BB), E = succ_end(BB); I != E; ++I)
-      CalcRegionExitBlocks(Header, *I, Visited, DS, RegionExitBlocks);
+      CalcRegionExitBlocks(Header, *I, Visited, EF, RegionExitBlocks);
   } else {
     // Header does not dominate this block, but we have a predecessor that does
     // dominate us.  Add ourself to the list.
@@ -702,11 +702,11 @@
   std::set<BasicBlock*> Visited;  // Don't infinite loop
 
   // Recursively calculate blocks we are interested in...
-  CalcRegionExitBlocks(BB, BB, Visited, *DS, RegionExitBlocks);
+  CalcRegionExitBlocks(BB, BB, Visited, *EF, RegionExitBlocks);
 
   // Filter out blocks that are not dominated by OldSucc...
   for (unsigned i = 0; i != RegionExitBlocks.size(); ) {
-    if (DS->dominates(OldSucc, RegionExitBlocks[i]))
+    if (EF->dominates(OldSucc, RegionExitBlocks[i]))
       ++i;  // Block is ok, keep it.
     else {
       // Move to end of list...
@@ -736,7 +736,7 @@
          PI != PE; ++PI) {
       // If the incoming edge is from the region dominated by BB, use BBVal,
       // otherwise use OldVal.
-      NewPN->addIncoming(DS->dominates(BB, *PI) ? BBVal : OldVal, *PI);
+      NewPN->addIncoming(EF->dominates(BB, *PI) ? BBVal : OldVal, *PI);
     }
 
     // Now make everyone dominated by this block use this new value!
@@ -934,7 +934,7 @@
       // here.  This check is also effectively checking to make sure that Inst
       // is in the same function as our region (in case V is a global f.e.).
       //
-      if (DS->properlyDominates(Inst->getParent(), RI.getEntryBlock()))
+      if (EF->properlyDominates(Inst->getParent(), RI.getEntryBlock()))
         IncorporateInstruction(Inst, RI);
     }
 }





From lattner at cs.uiuc.edu  Tue Jan 10 23:10:32 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue, 10 Jan 2006 23:10:32 -0600
Subject: [llvm-commits] CVS: llvm/lib/Transforms/Scalar/GCSE.cpp
	LoopStrengthReduce.cpp 
Message-ID: <200601110510.XAA03793@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Transforms/Scalar:

GCSE.cpp updated: 1.46 -> 1.47
LoopStrengthReduce.cpp updated: 1.71 -> 1.72
---
Log message:

Switch these to using ETForest instead of DominatorSet to compute itself.  
Patch written by Daniel Berlin!


---
Diffs of the changes:  (+11 -10)

 GCSE.cpp               |    6 +++---
 LoopStrengthReduce.cpp |   15 ++++++++-------
 2 files changed, 11 insertions(+), 10 deletions(-)


Index: llvm/lib/Transforms/Scalar/GCSE.cpp
diff -u llvm/lib/Transforms/Scalar/GCSE.cpp:1.46 llvm/lib/Transforms/Scalar/GCSE.cpp:1.47
--- llvm/lib/Transforms/Scalar/GCSE.cpp:1.46	Thu Apr 21 18:45:12 2005
+++ llvm/lib/Transforms/Scalar/GCSE.cpp	Tue Jan 10 23:10:20 2006
@@ -45,7 +45,7 @@
     // This transformation requires dominator and immediate dominator info
     virtual void getAnalysisUsage(AnalysisUsage &AU) const {
       AU.setPreservesCFG();
-      AU.addRequired<DominatorSet>();
+      AU.addRequired<ETForest>();
       AU.addRequired<DominatorTree>();
       AU.addRequired<ValueNumbering>();
     }
@@ -64,7 +64,7 @@
   bool Changed = false;
 
   // Get pointers to the analysis results that we will be using...
-  DominatorSet &DS = getAnalysis<DominatorSet>();
+  ETForest &EF = getAnalysis<ETForest>();
   ValueNumbering &VN = getAnalysis<ValueNumbering>();
   DominatorTree &DT = getAnalysis<DominatorTree>();
 
@@ -141,7 +141,7 @@
             if (OtherI->getParent() == BB)
               Dominates = BlockInsts.count(OtherI);
             else
-              Dominates = DS.dominates(OtherI->getParent(), BB);
+              Dominates = EF.dominates(OtherI->getParent(), BB);
 
             if (Dominates) {
               // Okay, we found an instruction with the same value as this one


Index: llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
diff -u llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp:1.71 llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp:1.72
--- llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp:1.71	Mon Dec  5 12:23:57 2005
+++ llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp	Tue Jan 10 23:10:20 2006
@@ -77,7 +77,7 @@
 
   class LoopStrengthReduce : public FunctionPass {
     LoopInfo *LI;
-    DominatorSet *DS;
+    ETForest *EF;
     ScalarEvolution *SE;
     const TargetData *TD;
     const Type *UIntPtrTy;
@@ -111,7 +111,7 @@
 
     virtual bool runOnFunction(Function &) {
       LI = &getAnalysis<LoopInfo>();
-      DS = &getAnalysis<DominatorSet>();
+      EF = &getAnalysis<ETForest>();
       SE = &getAnalysis<ScalarEvolution>();
       TD = &getAnalysis<TargetData>();
       UIntPtrTy = TD->getIntPtrType();
@@ -129,13 +129,14 @@
       AU.addPreservedID(LoopSimplifyID);
       AU.addPreserved<LoopInfo>();
       AU.addPreserved<DominatorSet>();
+      AU.addPreserved<ETForest>();
       AU.addPreserved<ImmediateDominators>();
       AU.addPreserved<DominanceFrontier>();
       AU.addPreserved<DominatorTree>();
 
       AU.addRequiredID(LoopSimplifyID);
       AU.addRequired<LoopInfo>();
-      AU.addRequired<DominatorSet>();
+      AU.addRequired<ETForest>();
       AU.addRequired<TargetData>();
       AU.addRequired<ScalarEvolution>();
     }
@@ -324,7 +325,7 @@
 /// the loop, resulting in reg-reg copies (if we use the pre-inc value when we
 /// should use the post-inc value).
 static bool IVUseShouldUsePostIncValue(Instruction *User, Instruction *IV,
-                                       Loop *L, DominatorSet *DS, Pass *P) {
+                                       Loop *L, ETForest *EF, Pass *P) {
   // If the user is in the loop, use the preinc value.
   if (L->contains(User->getParent())) return false;
   
@@ -332,7 +333,7 @@
   
   // Ok, the user is outside of the loop.  If it is dominated by the latch
   // block, use the post-inc value.
-  if (DS->dominates(LatchBlock, User->getParent()))
+  if (EF->dominates(LatchBlock, User->getParent()))
     return true;
 
   // There is one case we have to be careful of: PHI nodes.  These little guys
@@ -349,7 +350,7 @@
   for (unsigned i = 0, e = PN->getNumIncomingValues(); i != e; ++i)
     if (PN->getIncomingValue(i) == IV) {
       ++NumUses;
-      if (!DS->dominates(LatchBlock, PN->getIncomingBlock(i)))
+      if (!EF->dominates(LatchBlock, PN->getIncomingBlock(i)))
         return false;
     }
 
@@ -415,7 +416,7 @@
       // Okay, we found a user that we cannot reduce.  Analyze the instruction
       // and decide what to do with it.  If we are a use inside of the loop, use
       // the value before incrementation, otherwise use it after incrementation.
-      if (IVUseShouldUsePostIncValue(User, I, L, DS, this)) {
+      if (IVUseShouldUsePostIncValue(User, I, L, EF, this)) {
         // The value used will be incremented by the stride more than we are
         // expecting, so subtract this off.
         SCEVHandle NewStart = SCEV::getMinusSCEV(Start, Stride);





From lattner at cs.uiuc.edu  Tue Jan 10 23:11:25 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue, 10 Jan 2006 23:11:25 -0600
Subject: [llvm-commits] 
	CVS: llvm/lib/Transforms/Utils/BreakCriticalEdges.cpp
Message-ID: <200601110511.XAA03849@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Transforms/Utils:

BreakCriticalEdges.cpp updated: 1.28 -> 1.29
---
Log message:

Preserve and update ETForest.  Patch by Daniel Berlin



---
Diffs of the changes:  (+5 -0)

 BreakCriticalEdges.cpp |    5 +++++
 1 files changed, 5 insertions(+)


Index: llvm/lib/Transforms/Utils/BreakCriticalEdges.cpp
diff -u llvm/lib/Transforms/Utils/BreakCriticalEdges.cpp:1.28 llvm/lib/Transforms/Utils/BreakCriticalEdges.cpp:1.29
--- llvm/lib/Transforms/Utils/BreakCriticalEdges.cpp:1.28	Fri Aug 12 20:38:43 2005
+++ llvm/lib/Transforms/Utils/BreakCriticalEdges.cpp	Tue Jan 10 23:11:13 2006
@@ -34,6 +34,7 @@
     virtual bool runOnFunction(Function &F);
 
     virtual void getAnalysisUsage(AnalysisUsage &AU) const {
+      AU.addPreserved<ETForest>();
       AU.addPreserved<DominatorSet>();
       AU.addPreserved<ImmediateDominators>();
       AU.addPreserved<DominatorTree>();
@@ -153,6 +154,10 @@
     ID->addNewBlock(NewBB, TIBB);
   }
 
+  // Update the forest?
+  if (ETForest *EF = P->getAnalysisToUpdate<ETForest>())
+    EF->addNewBlock(NewBB, TIBB);
+
   // Should we update DominatorTree information?
   if (DominatorTree *DT = P->getAnalysisToUpdate<DominatorTree>()) {
     DominatorTree::Node *TINode = DT->getNode(TIBB);





From lattner at cs.uiuc.edu  Tue Jan 10 23:38:28 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue, 10 Jan 2006 23:38:28 -0600
Subject: [llvm-commits] CVS: llvm/include/llvm/TypeSymbolTable.h 
Message-ID: <200601110538.XAA04178@zion.cs.uiuc.edu>



Changes in directory llvm/include/llvm:

TypeSymbolTable.h updated: 1.1 -> 1.2
---
Log message:

Simple is good, CVS log is for history, not the silly credits block


---
Diffs of the changes:  (+2 -4)

 TypeSymbolTable.h |    6 ++----
 1 files changed, 2 insertions(+), 4 deletions(-)


Index: llvm/include/llvm/TypeSymbolTable.h
diff -u llvm/include/llvm/TypeSymbolTable.h:1.1 llvm/include/llvm/TypeSymbolTable.h:1.2
--- llvm/include/llvm/TypeSymbolTable.h:1.1	Tue Jan 10 03:51:48 2006
+++ llvm/include/llvm/TypeSymbolTable.h	Tue Jan 10 23:38:15 2006
@@ -2,10 +2,8 @@
 //
 //                     The LLVM Compiler Infrastructure
 //
-// This file was developed by Reid Spencer based on the original SymbolTable
-// implemented by the LLVM Research Group and re-written by Reid Spencer.
-// It is distributed under the University of Illinois Open Source License. 
-// See LICENSE.TXT for details.
+// This file was developed by Reid Spencer.  It is distributed under the 
+// University of Illinois Open Source License.  See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //





From lattner at cs.uiuc.edu  Tue Jan 10 23:39:07 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue, 10 Jan 2006 23:39:07 -0600
Subject: [llvm-commits] CVS: llvm/lib/VMCore/TypeSymbolTable.cpp 
Message-ID: <200601110539.XAA04214@zion.cs.uiuc.edu>



Changes in directory llvm/lib/VMCore:

TypeSymbolTable.cpp updated: 1.1 -> 1.2
---
Log message:

Simple is good


---
Diffs of the changes:  (+2 -3)

 TypeSymbolTable.cpp |    5 ++---
 1 files changed, 2 insertions(+), 3 deletions(-)


Index: llvm/lib/VMCore/TypeSymbolTable.cpp
diff -u llvm/lib/VMCore/TypeSymbolTable.cpp:1.1 llvm/lib/VMCore/TypeSymbolTable.cpp:1.2
--- llvm/lib/VMCore/TypeSymbolTable.cpp:1.1	Tue Jan 10 03:51:48 2006
+++ llvm/lib/VMCore/TypeSymbolTable.cpp	Tue Jan 10 23:38:55 2006
@@ -2,9 +2,8 @@
 //
 //                     The LLVM Compiler Infrastructure
 //
-// This file was developed by the LLVM research group and revised by Reid
-// Spencer. It is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
+// This file was developed by Reid Spencer. It is distributed under the 
+// University of Illinois Open Source License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //





From lattner at cs.uiuc.edu  Tue Jan 10 23:39:58 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue, 10 Jan 2006 23:39:58 -0600
Subject: [llvm-commits] CVS: llvm/lib/VMCore/ValueSymbolTable.cpp 
Message-ID: <200601110539.XAA04256@zion.cs.uiuc.edu>



Changes in directory llvm/lib/VMCore:

ValueSymbolTable.cpp updated: 1.1 -> 1.2
---
Log message:

Simple is good.  CVS is for revision control, not file headers


---
Diffs of the changes:  (+2 -3)

 ValueSymbolTable.cpp |    5 ++---
 1 files changed, 2 insertions(+), 3 deletions(-)


Index: llvm/lib/VMCore/ValueSymbolTable.cpp
diff -u llvm/lib/VMCore/ValueSymbolTable.cpp:1.1 llvm/lib/VMCore/ValueSymbolTable.cpp:1.2
--- llvm/lib/VMCore/ValueSymbolTable.cpp:1.1	Tue Jan 10 03:51:48 2006
+++ llvm/lib/VMCore/ValueSymbolTable.cpp	Tue Jan 10 23:39:45 2006
@@ -2,9 +2,8 @@
 //
 //                     The LLVM Compiler Infrastructure
 //
-// This file was developed by the LLVM research group and revised by Reid
-// Spencer. It is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
+// This file was developed by the LLVM research group.  It is distributed under 
+// the University of Illinois Open Source License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //





From evan.cheng at apple.com  Wed Jan 11 00:10:04 2006
From: evan.cheng at apple.com (Evan Cheng)
Date: Wed, 11 Jan 2006 00:10:04 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
	X86ISelLowering.cpp X86ISelPattern.cpp X86InstrInfo.td 
Message-ID: <200601110610.AAA04520@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/X86:

X86ISelDAGToDAG.cpp updated: 1.28 -> 1.29
X86ISelLowering.cpp updated: 1.27 -> 1.28
X86ISelPattern.cpp updated: 1.192 -> 1.193
X86InstrInfo.td updated: 1.195 -> 1.196
---
Log message:

* Add special entry code main() (to set x87 to 64-bit precision).
* Allow a register node as SelectAddr() base.
* ExternalSymbol -> TargetExternalSymbol as direct function callee.
* Use X86::ESP register rather than CopyFromReg(X86::ESP) as stack ptr for
  call parmater passing.


---
Diffs of the changes:  (+53 -21)

 X86ISelDAGToDAG.cpp |   56 +++++++++++++++++++++++++++++++++++++++-------------
 X86ISelLowering.cpp |    5 ++--
 X86ISelPattern.cpp  |    9 +++++---
 X86InstrInfo.td     |    4 +--
 4 files changed, 53 insertions(+), 21 deletions(-)


Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
diff -u llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.28 llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.29
--- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.28	Tue Jan 10 19:15:34 2006
+++ llvm/lib/Target/X86/X86ISelDAGToDAG.cpp	Wed Jan 11 00:09:51 2006
@@ -13,6 +13,7 @@
 //===----------------------------------------------------------------------===//
 
 #include "X86.h"
+#include "X86InstrBuilder.h"
 #include "X86RegisterInfo.h"
 #include "X86Subtarget.h"
 #include "X86ISelLowering.h"
@@ -95,6 +96,8 @@
     /// SelectionDAGISel when it has created a SelectionDAG for us to codegen.
     virtual void InstructionSelectBasicBlock(SelectionDAG &DAG);
 
+    virtual void EmitFunctionEntryCode(Function &Fn, MachineFunction &MF);
+
 // Include the pieces autogenerated from the target description.
 #include "X86GenDAGISel.inc"
 
@@ -208,7 +211,29 @@
   }
 }
 
-/// FIXME: copied from X86ISelPattern.cpp
+/// EmitSpecialCodeForMain - Emit any code that needs to be executed only in
+/// the main function.
+static void EmitSpecialCodeForMain(MachineBasicBlock *BB,
+                                   MachineFrameInfo *MFI) {
+  // Switch the FPU to 64-bit precision mode for better compatibility and speed.
+  int CWFrameIdx = MFI->CreateStackObject(2, 2);
+  addFrameReference(BuildMI(BB, X86::FNSTCW16m, 4), CWFrameIdx);
+
+  // Set the high part to be 64-bit precision.
+  addFrameReference(BuildMI(BB, X86::MOV8mi, 5),
+                    CWFrameIdx, 1).addImm(2);
+
+  // Reload the modified control word now.
+  addFrameReference(BuildMI(BB, X86::FLDCW16m, 4), CWFrameIdx);
+}
+
+void X86DAGToDAGISel::EmitFunctionEntryCode(Function &Fn, MachineFunction &MF) {
+  // If this is main, emit special code for main.
+  MachineBasicBlock *BB = MF.begin();
+  if (Fn.hasExternalLinkage() && Fn.getName() == "main")
+    EmitSpecialCodeForMain(BB, MF.getFrameInfo());
+}
+
 /// MatchAddress - Add the specified node to the specified addressing mode,
 /// returning true if it cannot be done.  This just pattern matches for the
 /// addressing mode
@@ -338,22 +363,25 @@
 bool X86DAGToDAGISel::SelectAddr(SDOperand N, SDOperand &Base, SDOperand &Scale,
                                  SDOperand &Index, SDOperand &Disp) {
   X86ISelAddressMode AM;
-  if (!MatchAddress(N, AM)) {
-    if (AM.BaseType == X86ISelAddressMode::RegBase) {
-      if (AM.Base.Reg.Val)
+  if (MatchAddress(N, AM))
+    return false;
+
+  if (AM.BaseType == X86ISelAddressMode::RegBase) {
+    if (AM.Base.Reg.Val) {
+      if (AM.Base.Reg.getOpcode() != ISD::Register)
         AM.Base.Reg = Select(AM.Base.Reg);
-      else
-        AM.Base.Reg = CurDAG->getRegister(0, MVT::i32);
+    } else {
+      AM.Base.Reg = CurDAG->getRegister(0, MVT::i32);
     }
-    if (AM.IndexReg.Val)
-      AM.IndexReg = Select(AM.IndexReg);
-    else
-      AM.IndexReg = CurDAG->getRegister(0, MVT::i32);
-
-    getAddressOperands(AM, Base, Scale, Index, Disp);
-    return true;
   }
-  return false;
+
+  if (AM.IndexReg.Val)
+    AM.IndexReg = Select(AM.IndexReg);
+  else
+    AM.IndexReg = CurDAG->getRegister(0, MVT::i32);
+
+  getAddressOperands(AM, Base, Scale, Index, Disp);
+  return true;
 }
 
 bool X86DAGToDAGISel::TryFoldLoad(SDOperand N, SDOperand &Base,


Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.27 llvm/lib/Target/X86/X86ISelLowering.cpp:1.28
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.27	Tue Jan 10 18:33:36 2006
+++ llvm/lib/Target/X86/X86ISelLowering.cpp	Wed Jan 11 00:09:51 2006
@@ -220,6 +220,8 @@
   // turn it into a TargetGlobalAddress node so that legalize doesn't hack it.
   if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(Callee))
     Callee = DAG.getTargetGlobalAddress(G->getGlobal(), getPointerTy());
+  else if (ExternalSymbolSDNode *S = dyn_cast<ExternalSymbolSDNode>(Callee))
+    Callee = DAG.getTargetExternalSymbol(S->getSymbol(), getPointerTy());
 
   if (CallingConv == CallingConv::Fast && EnableFastCC)
     return LowerFastCCCallTo(Chain, RetTy, isTailCall, Callee, Args, DAG);
@@ -412,8 +414,7 @@
 
     // Arguments go on the stack in reverse order, as specified by the ABI.
     unsigned ArgOffset = 0;
-    SDOperand StackPtr = DAG.getCopyFromReg(DAG.getEntryNode(),
-                                            X86::ESP, MVT::i32);
+    SDOperand StackPtr = DAG.getRegister(X86::ESP, MVT::i32);
     std::vector<SDOperand> Stores;
 
     for (unsigned i = 0, e = Args.size(); i != e; ++i) {


Index: llvm/lib/Target/X86/X86ISelPattern.cpp
diff -u llvm/lib/Target/X86/X86ISelPattern.cpp:1.192 llvm/lib/Target/X86/X86ISelPattern.cpp:1.193
--- llvm/lib/Target/X86/X86ISelPattern.cpp:1.192	Tue Jan 10 19:15:34 2006
+++ llvm/lib/Target/X86/X86ISelPattern.cpp	Wed Jan 11 00:09:51 2006
@@ -1223,12 +1223,15 @@
   SDNode *Node = N.Val;
   SDOperand Op0, Op1;
 
-  if (Node->getOpcode() == ISD::CopyFromReg) {
-    unsigned Reg = cast<RegisterSDNode>(Node->getOperand(1))->getReg();
+  if (Node->getOpcode() == ISD::CopyFromReg ||
+      Node->getOpcode() == ISD::Register) {
+    unsigned Reg = (Node->getOpcode() == ISD::CopyFromReg) ?
+      cast<RegisterSDNode>(Node->getOperand(1))->getReg() :
+      cast<RegisterSDNode>(Node)->getReg();
     // Just use the specified register as our input if we can.
     if (MRegisterInfo::isVirtualRegister(Reg) || Reg == X86::ESP)
       return Reg;
-  }
+  } 
 
   unsigned &Reg = ExprMap[N];
   if (Reg) return Reg;


Index: llvm/lib/Target/X86/X86InstrInfo.td
diff -u llvm/lib/Target/X86/X86InstrInfo.td:1.195 llvm/lib/Target/X86/X86InstrInfo.td:1.196
--- llvm/lib/Target/X86/X86InstrInfo.td:1.195	Tue Jan 10 18:33:36 2006
+++ llvm/lib/Target/X86/X86InstrInfo.td	Wed Jan 11 00:09:51 2006
@@ -2916,8 +2916,8 @@
 // Calls
 def : Pat<(X86call tglobaladdr:$dst),
           (CALLpcrel32 tglobaladdr:$dst)>;
-def : Pat<(X86call externalsym:$dst),
-          (CALLpcrel32 externalsym:$dst)>;
+def : Pat<(X86call texternalsym:$dst),
+          (CALLpcrel32 texternalsym:$dst)>;
 
 // X86 specific add which produces a flag.
 def : Pat<(X86addflag R32:$src1, R32:$src2),





From lattner at cs.uiuc.edu  Wed Jan 11 01:13:35 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed, 11 Jan 2006 01:13:35 -0600
Subject: [llvm-commits] CVS: llvm/test/Regression/CodeGen/SparcV8/xnor.ll 
Message-ID: <200601110713.BAA04942@zion.cs.uiuc.edu>



Changes in directory llvm/test/Regression/CodeGen/SparcV8:

xnor.ll added (r1.1)
---
Log message:

catch all forms of xnor


---
Diffs of the changes:  (+14 -0)

 xnor.ll |   14 ++++++++++++++
 1 files changed, 14 insertions(+)


Index: llvm/test/Regression/CodeGen/SparcV8/xnor.ll
diff -c /dev/null llvm/test/Regression/CodeGen/SparcV8/xnor.ll:1.1
*** /dev/null	Wed Jan 11 01:13:32 2006
--- llvm/test/Regression/CodeGen/SparcV8/xnor.ll	Wed Jan 11 01:13:22 2006
***************
*** 0 ****
--- 1,14 ----
+ ; RUN: llvm-as < %s | llc -march=sparcv8 -disable-v8-dag-isel=false &&
+ ; RUN: llvm-as < %s | llc -march=sparcv8 -disable-v8-dag-isel=false | grep xnor | wc -l | grep 2
+ 
+ int %test1(int %X, int %Y) {
+ 	%A = xor int %X, %Y
+ 	%B = xor int %A, -1
+ 	ret int %B
+ }
+ 
+ int %test2(int %X, int %Y) {
+ 	%A = xor int %X, -1
+ 	%B = xor int %A, %Y
+ 	ret int %B
+ }





From lattner at cs.uiuc.edu  Wed Jan 11 01:14:14 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed, 11 Jan 2006 01:14:14 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/SparcV8/SparcV8InstrInfo.td 
Message-ID: <200601110714.BAA05010@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/SparcV8:

SparcV8InstrInfo.td updated: 1.98 -> 1.99
---
Log message:

Write this pattern in canonical form, allowing more patterns to match.
This implements Regression/CodeGen/SparcV8/xnor.ll


---
Diffs of the changes:  (+1 -1)

 SparcV8InstrInfo.td |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/lib/Target/SparcV8/SparcV8InstrInfo.td
diff -u llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.98 llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.99
--- llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.98	Mon Jan  9 12:28:21 2006
+++ llvm/lib/Target/SparcV8/SparcV8InstrInfo.td	Wed Jan 11 01:14:01 2006
@@ -335,7 +335,7 @@
 def XNORrr  : F3_1<2, 0b000111,
                    (ops IntRegs:$dst, IntRegs:$b, IntRegs:$c),
                    "xnor $b, $c, $dst",
-                   [(set IntRegs:$dst, (xor IntRegs:$b, (not IntRegs:$c)))]>;
+                   [(set IntRegs:$dst, (not (xor IntRegs:$b, IntRegs:$c)))]>;
 def XNORri  : F3_2<2, 0b000111,
                    (ops IntRegs:$dst, IntRegs:$b, i32imm:$c),
                    "xnor $b, $c, $dst", []>;





From lattner at cs.uiuc.edu  Wed Jan 11 01:15:56 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed, 11 Jan 2006 01:15:56 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/SparcV8/SparcV8InstrInfo.td 
Message-ID: <200601110715.BAA05081@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/SparcV8:

SparcV8InstrInfo.td updated: 1.99 -> 1.100
---
Log message:

Unbreak ret void   :-/


---
Diffs of the changes:  (+1 -0)

 SparcV8InstrInfo.td |    1 +
 1 files changed, 1 insertion(+)


Index: llvm/lib/Target/SparcV8/SparcV8InstrInfo.td
diff -u llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.99 llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.100
--- llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.99	Wed Jan 11 01:14:01 2006
+++ llvm/lib/Target/SparcV8/SparcV8InstrInfo.td	Wed Jan 11 01:15:43 2006
@@ -730,6 +730,7 @@
 def : Pat<(call externalsym:$dst),
           (CALL externalsym:$dst)>;
 
+def : Pat<(ret), (RETL)>;
 
 // Map integer extload's to zextloads.
 def : Pat<(i32 (extload ADDRrr:$src, i1)), (LDUBrr ADDRrr:$src)>;





From lattner at cs.uiuc.edu  Wed Jan 11 01:27:53 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed, 11 Jan 2006 01:27:53 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
Message-ID: <200601110727.BAA05237@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/SparcV8:

SparcV8ISelDAGToDAG.cpp updated: 1.41 -> 1.42
---
Log message:

Fix a bug in i32->f64 conversion lowering


---
Diffs of the changes:  (+2 -2)

 SparcV8ISelDAGToDAG.cpp |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)


Index: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
diff -u llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.41 llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.42
--- llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.41	Fri Jan  6 11:56:17 2006
+++ llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp	Wed Jan 11 01:27:40 2006
@@ -622,9 +622,9 @@
     return DAG.getNode(ISD::BIT_CONVERT, MVT::i32, Op);
   case ISD::SINT_TO_FP: {
     assert(Op.getOperand(0).getValueType() == MVT::i32);
-    Op = DAG.getNode(ISD::BIT_CONVERT, MVT::f32, Op.getOperand(0));
+    SDOperand Tmp = DAG.getNode(ISD::BIT_CONVERT, MVT::f32, Op.getOperand(0));
     // Convert the int value to FP in an FP register.
-    return DAG.getNode(V8ISD::ITOF, Op.getValueType(), Op);
+    return DAG.getNode(V8ISD::ITOF, Op.getValueType(), Tmp);
   }
   case ISD::BR_CC: {
     SDOperand Chain = Op.getOperand(0);





From lattner at cs.uiuc.edu  Wed Jan 11 01:49:51 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed, 11 Jan 2006 01:49:51 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
	SparcV8InstrInfo.td 
Message-ID: <200601110749.BAA05476@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/SparcV8:

SparcV8ISelDAGToDAG.cpp updated: 1.42 -> 1.43
SparcV8InstrInfo.td updated: 1.100 -> 1.101
---
Log message:

Use Evan's outflag stuff to implement V8cmpicc.  This allows us to write a 
pattern for SUBCCrr, and makes it trivial to add support for SUBCCri, eliminating
an instruction in the common "setcc X, imm" case.


---
Diffs of the changes:  (+27 -16)

 SparcV8ISelDAGToDAG.cpp |   32 +++++++++++++++++++++-----------
 SparcV8InstrInfo.td     |   11 ++++++-----
 2 files changed, 27 insertions(+), 16 deletions(-)


Index: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
diff -u llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.42 llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.43
--- llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.42	Wed Jan 11 01:27:40 2006
+++ llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp	Wed Jan 11 01:49:38 2006
@@ -635,10 +635,22 @@
     
     // Get the condition flag.
     if (LHS.getValueType() == MVT::i32) {
-      SDOperand Cond = DAG.getNode(V8ISD::CMPICC, MVT::Flag, LHS, RHS);
+      std::vector<MVT::ValueType> VTs;
+      VTs.push_back(MVT::i32);
+      VTs.push_back(MVT::Flag);
+      std::vector<SDOperand> Ops;
+      Ops.push_back(LHS);
+      Ops.push_back(RHS);
+      SDOperand Cond = DAG.getNode(V8ISD::CMPICC, VTs, Ops);
       return DAG.getNode(V8ISD::BRICC, MVT::Other, Chain, Dest, CC, Cond);
     } else {
-      SDOperand Cond = DAG.getNode(V8ISD::CMPFCC, MVT::Flag, LHS, RHS);
+      std::vector<MVT::ValueType> VTs;
+      VTs.push_back(MVT::i32);
+      VTs.push_back(MVT::Flag);
+      std::vector<SDOperand> Ops;
+      Ops.push_back(LHS);
+      Ops.push_back(RHS);
+      SDOperand Cond = DAG.getNode(V8ISD::CMPFCC, VTs, Ops);
       return DAG.getNode(V8ISD::BRFCC, MVT::Other, Chain, Dest, CC, Cond);
     }
   }
@@ -651,7 +663,13 @@
     
     unsigned Opc;
     Opc = LHS.getValueType() == MVT::i32 ? V8ISD::CMPICC : V8ISD::CMPFCC;
-    SDOperand CompareFlag = DAG.getNode(Opc, MVT::Flag, LHS, RHS);
+    std::vector<MVT::ValueType> VTs;
+    VTs.push_back(LHS.getValueType());
+    VTs.push_back(MVT::Flag);
+    std::vector<SDOperand> Ops;
+    Ops.push_back(LHS);
+    Ops.push_back(RHS);
+    SDOperand CompareFlag = DAG.getNode(Opc, VTs, Ops).getValue(1);
     
     Opc = LHS.getValueType() == MVT::i32 ? 
       V8ISD::SELECT_ICC : V8ISD::SELECT_FCC;
@@ -883,14 +901,6 @@
                             CurDAG->getTargetFrameIndex(FI, MVT::i32),
                             CurDAG->getTargetConstant(0, MVT::i32));
   }
-  case V8ISD::CMPICC: {
-    // FIXME: Handle compare with immediate.
-    SDOperand LHS = Select(N->getOperand(0));
-    SDOperand RHS = Select(N->getOperand(1));
-    SDOperand Result = CurDAG->getTargetNode(V8::SUBCCrr, MVT::i32, MVT::Flag,
-                                             LHS, RHS);
-    return CodeGenMap[Op] = Result.getValue(1);
-  }
   case ISD::ADD_PARTS: {
     SDOperand LHSL = Select(N->getOperand(0));
     SDOperand LHSH = Select(N->getOperand(1));


Index: llvm/lib/Target/SparcV8/SparcV8InstrInfo.td
diff -u llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.100 llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.101
--- llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.100	Wed Jan 11 01:15:43 2006
+++ llvm/lib/Target/SparcV8/SparcV8InstrInfo.td	Wed Jan 11 01:49:38 2006
@@ -59,8 +59,6 @@
 def brtarget : Operand<OtherVT>;
 def calltarget : Operand<i32>;
 
-def SDTV8cmpicc : 
-SDTypeProfile<1, 2, [SDTCisVT<0, FlagVT>, SDTCisInt<1>, SDTCisSameAs<1, 2>]>;
 def SDTV8cmpfcc : 
 SDTypeProfile<1, 2, [SDTCisVT<0, FlagVT>, SDTCisFP<1>, SDTCisSameAs<1, 2>]>;
 def SDTV8brcc : 
@@ -74,7 +72,8 @@
 def SDTV8ITOF :
 SDTypeProfile<1, 1, [SDTCisFP<0>, SDTCisVT<1, f32>]>;
 
-def V8cmpicc : SDNode<"V8ISD::CMPICC", SDTV8cmpicc>;
+def V8cmpicc : SDNode<"V8ISD::CMPICC", SDTIntBinOp,
+                      [SDNPCommutative, SDNPOutFlag]>;
 def V8cmpfcc : SDNode<"V8ISD::CMPFCC", SDTV8cmpfcc>;
 def V8bricc : SDNode<"V8ISD::BRICC", SDTV8brcc, [SDNPHasChain]>;
 def V8brfcc : SDNode<"V8ISD::BRFCC", SDTV8brcc, [SDNPHasChain]>;
@@ -405,10 +404,12 @@
                    "subx $b, $c, $dst", []>;
 def SUBCCrr : F3_1<2, 0b010100, 
                    (ops IntRegs:$dst, IntRegs:$b, IntRegs:$c),
-                   "subcc $b, $c, $dst", []>;
+                   "subcc $b, $c, $dst",
+                   [(set IntRegs:$dst, (V8cmpicc IntRegs:$b, IntRegs:$c))]>;
 def SUBCCri : F3_2<2, 0b010100,
                    (ops IntRegs:$dst, IntRegs:$b, i32imm:$c),
-                   "subcc $b, $c, $dst", []>;
+                   "subcc $b, $c, $dst",
+                   [(set IntRegs:$dst, (V8cmpicc IntRegs:$b, simm13:$c))]>;
 def SUBXCCrr: F3_1<2, 0b011100, 
                    (ops IntRegs:$dst, IntRegs:$b, IntRegs:$c),
                    "subxcc $b, $c, $dst", []>;





From lattner at cs.uiuc.edu  Wed Jan 11 10:15:03 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed, 11 Jan 2006 10:15:03 -0600
Subject: [llvm-commits] CVS: llvm/lib/VMCore/PassManagerT.h 
Message-ID: <200601111615.KAA17061@zion.cs.uiuc.edu>



Changes in directory llvm/lib/VMCore:

PassManagerT.h updated: 1.65 -> 1.66
---
Log message:

Patch #9 from Saem:

"Cut up the runPasses method into smaller pieces.  The small private
helpers should  be easier to deal with when code shuffling arising
from creating the new specialised batchers, not to mention, they're
much easier to understand.

I inlined them, in case function call overhead would be noticeable --
doubtful."


---
Diffs of the changes:  (+147 -124)

 PassManagerT.h |  271 ++++++++++++++++++++++++++++++---------------------------
 1 files changed, 147 insertions(+), 124 deletions(-)


Index: llvm/lib/VMCore/PassManagerT.h
diff -u llvm/lib/VMCore/PassManagerT.h:1.65 llvm/lib/VMCore/PassManagerT.h:1.66
--- llvm/lib/VMCore/PassManagerT.h:1.65	Sun Jan  8 16:57:07 2006
+++ llvm/lib/VMCore/PassManagerT.h	Wed Jan 11 10:14:49 2006
@@ -260,23 +260,12 @@
   // run - Run all of the queued passes on the specified module in an optimal
   // way.
   virtual bool runOnUnit(UnitType *M) {
-    bool MadeChanges = false;
     closeBatcher();
     CurrentAnalyses.clear();
 
     TimingInfo::createTheTimeInfo();
 
-    // Add any immutable passes to the CurrentAnalyses set...
-    for (unsigned i = 0, e = ImmutablePasses.size(); i != e; ++i) {
-      ImmutablePass *IPass = ImmutablePasses[i];
-      if (const PassInfo *PI = IPass->getPassInfo()) {
-        CurrentAnalyses[PI] = IPass;
-
-        const std::vector<const PassInfo*> &II = PI->getInterfacesImplemented();
-        for (unsigned i = 0, e = II.size(); i != e; ++i)
-          CurrentAnalyses[II[i]] = IPass;
-      }
-    }
+    addImmutablePasses();
 
     // LastUserOf - This contains the inverted LastUseOfMap...
     std::map<Pass *, std::vector<Pass*> > LastUserOf;
@@ -290,112 +279,7 @@
     if (Parent == 0) 
       PMDebug::PerformPassStartupStuff((dynamic_cast<PMType*>(this)));
 
-    // Run all of the passes
-    for (unsigned i = 0, e = Passes.size(); i < e; ++i) {
-      PassClass *P = Passes[i];
-
-      PMDebug::PrintPassInformation(getDepth(), "Executing Pass", P, M);
-
-      // Get information about what analyses the pass uses...
-      AnalysisUsage AnUsage;
-      P->getAnalysisUsage(AnUsage);
-      PMDebug::PrintAnalysisSetInfo(getDepth(), "Required", P,
-                                    AnUsage.getRequiredSet());
-
-      // All Required analyses should be available to the pass as it runs!  Here
-      // we fill in the AnalysisImpls member of the pass so that it can
-      // successfully use the getAnalysis() method to retrieve the
-      // implementations it needs.
-      //
-      P->AnalysisImpls.clear();
-      P->AnalysisImpls.reserve(AnUsage.getRequiredSet().size());
-      for (std::vector<const PassInfo *>::const_iterator
-             I = AnUsage.getRequiredSet().begin(),
-             E = AnUsage.getRequiredSet().end(); I != E; ++I) {
-        Pass *Impl = getAnalysisOrNullUp(*I);
-        if (Impl == 0) {
-          std::cerr << "Analysis '" << (*I)->getPassName()
-                    << "' used but not available!";
-          assert(0 && "Analysis used but not available!");
-        } else if (PassDebugging == Details) {
-          if ((*I)->getPassName() != std::string(Impl->getPassName()))
-            std::cerr << "    Interface '" << (*I)->getPassName()
-                    << "' implemented by '" << Impl->getPassName() << "'\n";
-        }
-        P->AnalysisImpls.push_back(std::make_pair(*I, Impl));
-      }
-
-      // Run the sub pass!
-      if (TheTimeInfo) TheTimeInfo->passStarted(P);
-      bool Changed = runPass(P, M);
-      if (TheTimeInfo) TheTimeInfo->passEnded(P);
-      MadeChanges |= Changed;
-
-      // Check for memory leaks by the pass...
-      LeakDetector::checkForGarbage(std::string("after running pass '") +
-                                    P->getPassName() + "'");
-
-      if (Changed)
-        PMDebug::PrintPassInformation(getDepth()+1, "Made Modification", P, M);
-      PMDebug::PrintAnalysisSetInfo(getDepth(), "Preserved", P,
-                                    AnUsage.getPreservedSet());
-
-
-      // Erase all analyses not in the preserved set...
-      if (!AnUsage.getPreservesAll()) {
-        const std::vector<AnalysisID> &PreservedSet = AnUsage.getPreservedSet();
-        for (std::map<AnalysisID, Pass*>::iterator I = CurrentAnalyses.begin(),
-               E = CurrentAnalyses.end(); I != E; )
-          if (std::find(PreservedSet.begin(), PreservedSet.end(), I->first) !=
-              PreservedSet.end())
-            ++I; // This analysis is preserved, leave it in the available set...
-          else {
-            if (!dynamic_cast<ImmutablePass*>(I->second)) {
-              std::map<AnalysisID, Pass*>::iterator J = I++;
-              CurrentAnalyses.erase(J);   // Analysis not preserved!
-            } else {
-              ++I;
-            }
-          }
-      }
-
-      // Add the current pass to the set of passes that have been run, and are
-      // thus available to users.
-      //
-      if (const PassInfo *PI = P->getPassInfo()) {
-        CurrentAnalyses[PI] = P;
-
-        // This pass is the current implementation of all of the interfaces it
-        // implements as well.
-        //
-        const std::vector<const PassInfo*> &II = PI->getInterfacesImplemented();
-        for (unsigned i = 0, e = II.size(); i != e; ++i)
-          CurrentAnalyses[II[i]] = P;
-      }
-
-      // Free memory for any passes that we are the last use of...
-      std::vector<Pass*> &DeadPass = LastUserOf[P];
-      for (std::vector<Pass*>::iterator I = DeadPass.begin(),E = DeadPass.end();
-           I != E; ++I) {
-        PMDebug::PrintPassInformation(getDepth()+1, "Freeing Pass", *I, M);
-        (*I)->releaseMemory();
-      }
-
-      // Make sure to remove dead passes from the CurrentAnalyses list...
-      for (std::map<AnalysisID, Pass*>::iterator I = CurrentAnalyses.begin();
-           I != CurrentAnalyses.end(); ) {
-        std::vector<Pass*>::iterator DPI = std::find(DeadPass.begin(),
-                                                     DeadPass.end(), I->second);
-        if (DPI != DeadPass.end()) {    // This pass is dead now... remove it
-          std::map<AnalysisID, Pass*>::iterator IDead = I++;
-          CurrentAnalyses.erase(IDead);
-        } else {
-          ++I;  // Move on to the next element...
-        }
-      }
-    }
-
-    return MadeChanges;
+    return runPasses(M, LastUserOf);
   }
 
   // dumpPassStructure - Implement the -debug-passes=PassStructure option
@@ -696,7 +580,146 @@
     // Initialize the immutable pass...
     IP->initializePass();
   }
+private:
+  
+  // Add any immutable passes to the CurrentAnalyses set...
+  inline void addImmutablePasses() { 
+    for (unsigned i = 0, e = ImmutablePasses.size(); i != e; ++i) {
+      ImmutablePass *IPass = ImmutablePasses[i];
+      if (const PassInfo *PI = IPass->getPassInfo()) {
+        CurrentAnalyses[PI] = IPass;
+
+        const std::vector<const PassInfo*> &II = PI->getInterfacesImplemented();
+        for (unsigned i = 0, e = II.size(); i != e; ++i)
+          CurrentAnalyses[II[i]] = IPass;
+      }
+    }
+  }
   
+  // Run all of the passes
+  inline bool runPasses(UnitType *M, 
+                 std::map<Pass *, std::vector<Pass*> > &LastUserOf) { 
+    bool MadeChanges = false;
+    
+    for (unsigned i = 0, e = Passes.size(); i < e; ++i) {
+      PassClass *P = Passes[i];
+
+      PMDebug::PrintPassInformation(getDepth(), "Executing Pass", P, M);
+
+      // Get information about what analyses the pass uses...
+      AnalysisUsage AnUsage;
+      P->getAnalysisUsage(AnUsage);
+      PMDebug::PrintAnalysisSetInfo(getDepth(), "Required", P,
+                                    AnUsage.getRequiredSet());
+      
+      initialiseAnalysisImpl(P, AnUsage);
+      
+      // Run the sub pass!
+      if (TheTimeInfo) TheTimeInfo->passStarted(P);
+      bool Changed = runPass(P, M);
+      if (TheTimeInfo) TheTimeInfo->passEnded(P);
+      MadeChanges |= Changed;
+
+      // Check for memory leaks by the pass...
+      LeakDetector::checkForGarbage(std::string("after running pass '") +
+                                    P->getPassName() + "'");
+
+      if (Changed)
+        PMDebug::PrintPassInformation(getDepth()+1, "Made Modification", P, M);
+      PMDebug::PrintAnalysisSetInfo(getDepth(), "Preserved", P,
+                                    AnUsage.getPreservedSet());
+      
+      // Erase all analyses not in the preserved set
+      removeNonPreservedAnalyses(AnUsage);
+      
+      // Add the current pass to the set of passes that have been run, and are
+      // thus available to users.
+      //
+      if (const PassInfo *PI = P->getPassInfo()) {
+        CurrentAnalyses[PI] = P;
+
+        // This pass is the current implementation of all of the interfaces it
+        // implements as well.
+        //
+        const std::vector<const PassInfo*> &II = PI->getInterfacesImplemented();
+        for (unsigned i = 0, e = II.size(); i != e; ++i)
+          CurrentAnalyses[II[i]] = P;
+      }
+
+      // Free memory for any passes that we are the last use of...
+      std::vector<Pass*> &DeadPass = LastUserOf[P];
+      for (std::vector<Pass*>::iterator I = DeadPass.begin(),E = DeadPass.end();
+           I != E; ++I) {
+        PMDebug::PrintPassInformation(getDepth()+1, "Freeing Pass", *I, M);
+        (*I)->releaseMemory();
+      }
+      
+      // remove dead passes from the CurrentAnalyses list...
+      removeDeadPasses(DeadPass);
+    }
+    
+    return MadeChanges;
+  }
+  
+  // All Required analyses should be available to the pass as it runs!  Here
+  // we fill in the AnalysisImpls member of the pass so that it can
+  // successfully use the getAnalysis() method to retrieve the
+  // implementations it needs.
+  //
+  inline void initialiseAnalysisImpl(PassClass *P, AnalysisUsage &AnUsage) { 
+    P->AnalysisImpls.clear();
+    P->AnalysisImpls.reserve(AnUsage.getRequiredSet().size());
+    
+    for (std::vector<const PassInfo *>::const_iterator
+         I = AnUsage.getRequiredSet().begin(),
+         E = AnUsage.getRequiredSet().end(); I != E; ++I) {
+      Pass *Impl = getAnalysisOrNullUp(*I);
+      if (Impl == 0) {
+        std::cerr << "Analysis '" << (*I)->getPassName()
+                  << "' used but not available!";
+        assert(0 && "Analysis used but not available!");
+      } else if (PassDebugging == Details) {
+        if ((*I)->getPassName() != std::string(Impl->getPassName()))
+          std::cerr << "    Interface '" << (*I)->getPassName()
+                  << "' implemented by '" << Impl->getPassName() << "'\n";
+      }
+      
+      P->AnalysisImpls.push_back(std::make_pair(*I, Impl));
+    }
+  }
+  
+  inline void removeNonPreservedAnalyses(AnalysisUsage &AnUsage) { 
+    if (!AnUsage.getPreservesAll()) {
+      const std::vector<AnalysisID> &PreservedSet = AnUsage.getPreservedSet();
+      for (std::map<AnalysisID, Pass*>::iterator I = CurrentAnalyses.begin(),
+           E = CurrentAnalyses.end(); I != E; )
+        if (std::find(PreservedSet.begin(), PreservedSet.end(), I->first) !=
+            PreservedSet.end())
+          ++I; // This analysis is preserved, leave it in the available set...
+      else {
+        if (!dynamic_cast<ImmutablePass*>(I->second)) {
+          std::map<AnalysisID, Pass*>::iterator J = I++;
+          CurrentAnalyses.erase(J);   // Analysis not preserved!
+        } else {
+          ++I;
+        }
+      }
+    }
+  }
+  
+  inline void removeDeadPasses(std::vector<Pass*> &DeadPass) { 
+    for (std::map<AnalysisID, Pass*>::iterator I = CurrentAnalyses.begin();
+          I != CurrentAnalyses.end(); ) {
+      std::vector<Pass*>::iterator DPI = std::find(DeadPass.begin(),
+                                                    DeadPass.end(), I->second);
+      if (DPI != DeadPass.end()) {    // This pass is dead now... remove it
+        std::map<AnalysisID, Pass*>::iterator IDead = I++;
+        CurrentAnalyses.erase(IDead);
+      } else {
+        ++I;  // Move on to the next element...
+      }
+    }
+  }
 };
 
 //===----------------------------------------------------------------------===//
@@ -830,8 +853,9 @@
   virtual bool runOnModule(Module &M);
   
   // runPass - Specify how the pass should be run on the UnitType
-  virtual bool runPass(MTraits::PassClass *P, Module *M) { return P->runOnModule(*M); }
-  
+  virtual bool runPass(MTraits::PassClass *P, Module *M) {
+    return P->runOnModule(*M);
+  }
 };
 
 //===----------------------------------------------------------------------===//
@@ -847,21 +871,21 @@
 
 inline bool BasicBlockPassManager::doInitialization(Module &M) {
   bool Changed = false;
-  for (unsigned i = 0, e = ((BBTraits::PMType*)this)->Passes.size(); i != e; ++i)
+  for (unsigned i = 0, e =((BBTraits::PMType*)this)->Passes.size(); i != e; ++i)
     ((BBTraits::PMType*)this)->Passes[i]->doInitialization(M);
   return Changed;
 }
 
 inline bool BasicBlockPassManager::doInitialization(Function &F) {
   bool Changed = false;
-  for (unsigned i = 0, e = ((BBTraits::PMType*)this)->Passes.size(); i != e; ++i)
+  for (unsigned i = 0, e =((BBTraits::PMType*)this)->Passes.size(); i != e; ++i)
     ((BBTraits::PMType*)this)->Passes[i]->doInitialization(F);
   return Changed;
 }
 
 inline bool BasicBlockPassManager::doFinalization(Function &F) {
   bool Changed = false;
-  for (unsigned i = 0, e = ((BBTraits::PMType*)this)->Passes.size(); i != e; ++i)
+  for (unsigned i = 0, e =((BBTraits::PMType*)this)->Passes.size(); i != e; ++i)
     ((BBTraits::PMType*)this)->Passes[i]->doFinalization(F);
   return Changed;
 }
@@ -901,7 +925,6 @@
   return ((PassManagerT<MTraits>*)this)->runOnUnit(&M);
 }
 
-
 } // End llvm namespace
 
 #endif





From jeffc at jolt-lang.org  Wed Jan 11 10:21:36 2006
From: jeffc at jolt-lang.org (Jeff Cohen)
Date: Wed, 11 Jan 2006 10:21:36 -0600
Subject: [llvm-commits] CVS: llvm/lib/VMCore/TypeSymbolTable.cpp 
Message-ID: <200601111621.KAA17112@zion.cs.uiuc.edu>



Changes in directory llvm/lib/VMCore:

TypeSymbolTable.cpp updated: 1.2 -> 1.3
---
Log message:

Fix VC++ compilation error.

---
Diffs of the changes:  (+1 -0)

 TypeSymbolTable.cpp |    1 +
 1 files changed, 1 insertion(+)


Index: llvm/lib/VMCore/TypeSymbolTable.cpp
diff -u llvm/lib/VMCore/TypeSymbolTable.cpp:1.2 llvm/lib/VMCore/TypeSymbolTable.cpp:1.3
--- llvm/lib/VMCore/TypeSymbolTable.cpp:1.2	Tue Jan 10 23:38:55 2006
+++ llvm/lib/VMCore/TypeSymbolTable.cpp	Wed Jan 11 10:21:23 2006
@@ -15,6 +15,7 @@
 #include "llvm/DerivedTypes.h"
 #include "llvm/ADT/StringExtras.h"
 #include <iostream>
+#include <algorithm>
 
 using namespace llvm;
 





From jeffc at jolt-lang.org  Wed Jan 11 10:22:06 2006
From: jeffc at jolt-lang.org (Jeff Cohen)
Date: Wed, 11 Jan 2006 10:22:06 -0600
Subject: [llvm-commits] CVS: llvm/win32/VMCore/VMCore.vcproj 
Message-ID: <200601111622.KAA17124@zion.cs.uiuc.edu>



Changes in directory llvm/win32/VMCore:

VMCore.vcproj updated: 1.11 -> 1.12
---
Log message:

Visual Studio is feeling left out again.

---
Diffs of the changes:  (+12 -0)

 VMCore.vcproj |   12 ++++++++++++
 1 files changed, 12 insertions(+)


Index: llvm/win32/VMCore/VMCore.vcproj
diff -u llvm/win32/VMCore/VMCore.vcproj:1.11 llvm/win32/VMCore/VMCore.vcproj:1.12
--- llvm/win32/VMCore/VMCore.vcproj:1.11	Fri Dec 16 18:14:47 2005
+++ llvm/win32/VMCore/VMCore.vcproj	Wed Jan 11 10:21:53 2006
@@ -160,9 +160,15 @@
 				RelativePath="..\..\lib\VMCore\Type.cpp">
 			</File>
 			<File
+				RelativePath="..\..\lib\VMCore\TypeSymbolTable.cpp">
+			</File>
+			<File
 				RelativePath="..\..\lib\VMCore\Value.cpp">
 			</File>
 			<File
+				RelativePath="..\..\lib\VMCore\ValueSymbolTable.cpp">
+			</File>
+			<File
 				RelativePath="..\..\lib\VMCore\Verifier.cpp">
 			</File>
 		</Filter>
@@ -267,6 +273,9 @@
 				RelativePath="..\..\include\llvm\Type.h">
 			</File>
 			<File
+				RelativePath="..\..\include\llvm\TypeSymbolTable.h">
+			</File>
+			<File
 				RelativePath="..\..\include\llvm\Use.h">
 			</File>
 			<File
@@ -276,6 +285,9 @@
 				RelativePath="..\..\include\llvm\Value.h">
 			</File>
 			<File
+				RelativePath="..\..\include\llvm\ValueSymbolTable.h">
+			</File>
+			<File
 				RelativePath="..\..\include\llvm\Assembly\Writer.h">
 			</File>
 		</Filter>





From lattner at cs.uiuc.edu  Wed Jan 11 12:15:49 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed, 11 Jan 2006 12:15:49 -0600
Subject: [llvm-commits] 
	CVS: llvm/test/Regression/CodeGen/PowerPC/2006-01-11-darwin-fp-argument.ll
Message-ID: <200601111815.MAA17880@zion.cs.uiuc.edu>



Changes in directory llvm/test/Regression/CodeGen/PowerPC:

2006-01-11-darwin-fp-argument.ll added (r1.1)
---
Log message:

Testcase the PPC backend is miscompiling.


---
Diffs of the changes:  (+13 -0)

 2006-01-11-darwin-fp-argument.ll |   13 +++++++++++++
 1 files changed, 13 insertions(+)


Index: llvm/test/Regression/CodeGen/PowerPC/2006-01-11-darwin-fp-argument.ll
diff -c /dev/null llvm/test/Regression/CodeGen/PowerPC/2006-01-11-darwin-fp-argument.ll:1.1
*** /dev/null	Wed Jan 11 12:15:47 2006
--- llvm/test/Regression/CodeGen/PowerPC/2006-01-11-darwin-fp-argument.ll	Wed Jan 11 12:15:37 2006
***************
*** 0 ****
--- 1,13 ----
+ ; RUN: llvm-as < %s | llc &&
+ ; RUN: llvm-as < %s | llc | not grep ', f1'
+ 
+ target endian = big
+ target pointersize = 32
+ target triple = "powerpc-apple-darwin8.2.0"
+ 
+ ; Dead argument should reserve an FP register.
+ double %bar(double %DEAD, double %X, double %Y) {
+         %tmp.2 = add double %X, %Y
+         ret double %tmp.2
+ }
+ 





From lattner at cs.uiuc.edu  Wed Jan 11 12:21:38 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed, 11 Jan 2006 12:21:38 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelLowering.cpp 
Message-ID: <200601111821.MAA17969@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/PowerPC:

PPCISelLowering.cpp updated: 1.60 -> 1.61
---
Log message:

Dead FP arguments still use an incoming FP reg.  This fixes 
Regression/CodeGen/PowerPC/2006-01-11-darwin-fp-argument.ll, which was 
distilled from a miscompilation in 252.eon.



---
Diffs of the changes:  (+7 -1)

 PPCISelLowering.cpp |    8 +++++++-
 1 files changed, 7 insertions(+), 1 deletion(-)


Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.60 llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.61
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.60	Mon Jan  9 17:52:17 2006
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp	Wed Jan 11 12:21:25 2006
@@ -509,7 +509,13 @@
     case MVT::f32:
     case MVT::f64:
       ObjSize = (ObjectVT == MVT::f64) ? 8 : 4;
-      if (!ArgLive) break;
+      if (!ArgLive) {
+        if (FPR_remaining > 0) {
+          --FPR_remaining;
+          ++FPR_idx;
+        }        
+        break;
+      }
       if (FPR_remaining > 0) {
         unsigned VReg;
         if (ObjectVT == MVT::f32)





From lattner at cs.uiuc.edu  Wed Jan 11 13:52:40 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed, 11 Jan 2006 13:52:40 -0600
Subject: [llvm-commits] CVS: llvm/utils/TableGen/DAGISelEmitter.cpp 
Message-ID: <200601111952.NAA18596@zion.cs.uiuc.edu>



Changes in directory llvm/utils/TableGen:

DAGISelEmitter.cpp updated: 1.129 -> 1.130
---
Log message:

Always select target registers to themselves


---
Diffs of the changes:  (+1 -0)

 DAGISelEmitter.cpp |    1 +
 1 files changed, 1 insertion(+)


Index: llvm/utils/TableGen/DAGISelEmitter.cpp
diff -u llvm/utils/TableGen/DAGISelEmitter.cpp:1.129 llvm/utils/TableGen/DAGISelEmitter.cpp:1.130
--- llvm/utils/TableGen/DAGISelEmitter.cpp:1.129	Tue Jan 10 19:33:49 2006
+++ llvm/utils/TableGen/DAGISelEmitter.cpp	Wed Jan 11 13:52:27 2006
@@ -2547,6 +2547,7 @@
      << "  default: break;\n"
      << "  case ISD::EntryToken:       // These leaves remain the same.\n"
      << "  case ISD::BasicBlock:\n"
+     << "  case ISD::Register:\n"
      << "    return N;\n"
      << "  case ISD::AssertSext:\n"
      << "  case ISD::AssertZext: {\n"





From lattner at cs.uiuc.edu  Wed Jan 11 13:52:58 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed, 11 Jan 2006 13:52:58 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
Message-ID: <200601111952.NAA18631@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/SparcV8:

SparcV8ISelDAGToDAG.cpp updated: 1.43 -> 1.44
---
Log message:

This is no longer needed


---
Diffs of the changes:  (+0 -1)

 SparcV8ISelDAGToDAG.cpp |    1 -
 1 files changed, 1 deletion(-)


Index: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
diff -u llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.43 llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.44
--- llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.43	Wed Jan 11 01:49:38 2006
+++ llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp	Wed Jan 11 13:52:46 2006
@@ -889,7 +889,6 @@
   
   switch (N->getOpcode()) {
   default: break;
-  case ISD::Register: return Op;
   case ISD::FrameIndex: {
     int FI = cast<FrameIndexSDNode>(N)->getIndex();
     if (N->hasOneUse())





From lattner at cs.uiuc.edu  Wed Jan 11 13:53:34 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed, 11 Jan 2006 13:53:34 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp 
Message-ID: <200601111953.NAA18667@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/IA64:

IA64ISelDAGToDAG.cpp updated: 1.18 -> 1.19
---
Log message:

tblgen does this now


---
Diffs of the changes:  (+0 -2)

 IA64ISelDAGToDAG.cpp |    2 --
 1 files changed, 2 deletions(-)


Index: llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp
diff -u llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp:1.18 llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp:1.19
--- llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp:1.18	Tue Jan 10 21:50:40 2006
+++ llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp	Wed Jan 11 13:53:22 2006
@@ -341,8 +341,6 @@
   switch (N->getOpcode()) {
   default: break;
 
-  case ISD::Register: return Op; // XXX: this is a hack, tblgen one day?
- 
   case IA64ISD::BRCALL: { // XXX: this is also a hack!
     SDOperand Chain = Select(N->getOperand(0));
     SDOperand InFlag;  // Null incoming flag value.





From lattner at cs.uiuc.edu  Wed Jan 11 13:55:20 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed, 11 Jan 2006 13:55:20 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelLowering.cpp 
Message-ID: <200601111955.NAA18732@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/PowerPC:

PPCISelLowering.cpp updated: 1.61 -> 1.62
---
Log message:

Fix calls that need to store values in stack slots, to not copy the stack
pointer.  This allows us to emit stuff like this:

        li r10, 0
        stw r10, 56(r1)
        or r3, r10, r10
        or r4, r10, r10
        or r5, r10, r10
        or r6, r10, r10
        or r7, r10, r10
        or r8, r10, r10
        or r9, r10, r10
        bl L_bar$stub

instead of this:

        or r2, r1, r1     ;; Extraneous copy.
        li r10, 0
        stw r10, 56(r2)
        or r3, r10, r10
        or r4, r10, r10
        or r5, r10, r10
        or r6, r10, r10
        or r7, r10, r10
        or r8, r10, r10
        or r9, r10, r10
        bl L_bar$stub

wowness.



---
Diffs of the changes:  (+1 -2)

 PPCISelLowering.cpp |    3 +--
 1 files changed, 1 insertion(+), 2 deletions(-)


Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.61 llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.62
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.61	Wed Jan 11 12:21:25 2006
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp	Wed Jan 11 13:55:07 2006
@@ -657,8 +657,7 @@
     // Set up a copy of the stack pointer for use loading and storing any
     // arguments that may not fit in the registers available for argument
     // passing.
-    SDOperand StackPtr = DAG.getCopyFromReg(DAG.getEntryNode(),
-                                            PPC::R1, MVT::i32);
+    SDOperand StackPtr = DAG.getRegister(PPC::R1, MVT::i32);
     
     // Figure out which arguments are going to go in registers, and which in
     // memory.  Also, if this is a vararg function, floating point operations





From natebegeman at mac.com  Wed Jan 11 15:21:16 2006
From: natebegeman at mac.com (Nate Begeman)
Date: Wed, 11 Jan 2006 15:21:16 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
Message-ID: <200601112121.PAA19205@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/SparcV8:

SparcV8ISelDAGToDAG.cpp updated: 1.44 -> 1.45
---
Log message:

Add bswap, rotl, and rotr nodes
Add dag combiner code to recognize rotl, rotr
Add ppc code to match rotl

Targets should add rotl/rotr patterns if they have them


---
Diffs of the changes:  (+2 -0)

 SparcV8ISelDAGToDAG.cpp |    2 ++
 1 files changed, 2 insertions(+)


Index: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
diff -u llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.44 llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.45
--- llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.44	Wed Jan 11 13:52:46 2006
+++ llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp	Wed Jan 11 15:21:00 2006
@@ -146,6 +146,8 @@
   setOperationAction(ISD::CTPOP, MVT::i32, Expand);
   setOperationAction(ISD::CTTZ , MVT::i32, Expand);
   setOperationAction(ISD::CTLZ , MVT::i32, Expand);
+  setOperationAction(ISD::ROTL , MVT::i32, Expand);
+  setOperationAction(ISD::ROTR , MVT::i32, Expand);
 
   setOperationAction(ISD::SHL_PARTS, MVT::i32, Expand);
   setOperationAction(ISD::SRA_PARTS, MVT::i32, Expand);





From natebegeman at mac.com  Wed Jan 11 15:21:17 2006
From: natebegeman at mac.com (Nate Begeman)
Date: Wed, 11 Jan 2006 15:21:17 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaISelLowering.cpp 
Message-ID: <200601112121.PAA19225@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/Alpha:

AlphaISelLowering.cpp updated: 1.18 -> 1.19
---
Log message:

Add bswap, rotl, and rotr nodes
Add dag combiner code to recognize rotl, rotr
Add ppc code to match rotl

Targets should add rotl/rotr patterns if they have them


---
Diffs of the changes:  (+2 -0)

 AlphaISelLowering.cpp |    2 ++
 1 files changed, 2 insertions(+)


Index: llvm/lib/Target/Alpha/AlphaISelLowering.cpp
diff -u llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.18 llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.19
--- llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.18	Wed Jan  4 19:47:43 2006
+++ llvm/lib/Target/Alpha/AlphaISelLowering.cpp	Wed Jan 11 15:21:00 2006
@@ -81,6 +81,8 @@
     setOperationAction(ISD::CTTZ     , MVT::i64  , Expand);
     setOperationAction(ISD::CTLZ     , MVT::i64  , Expand);
   }
+  setOperationAction(ISD::ROTL     , MVT::i64, Expand);
+  setOperationAction(ISD::ROTR     , MVT::i64, Expand);
   
   setOperationAction(ISD::SREM     , MVT::i64, Custom);
   setOperationAction(ISD::UREM     , MVT::i64, Custom);





From natebegeman at mac.com  Wed Jan 11 15:21:17 2006
From: natebegeman at mac.com (Nate Begeman)
Date: Wed, 11 Jan 2006 15:21:17 -0600
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
	LegalizeDAG.cpp SelectionDAG.cpp 
Message-ID: <200601112121.PAA19233@zion.cs.uiuc.edu>



Changes in directory llvm/lib/CodeGen/SelectionDAG:

DAGCombiner.cpp updated: 1.79 -> 1.80
LegalizeDAG.cpp updated: 1.258 -> 1.259
SelectionDAG.cpp updated: 1.235 -> 1.236
---
Log message:

Add bswap, rotl, and rotr nodes
Add dag combiner code to recognize rotl, rotr
Add ppc code to match rotl

Targets should add rotl/rotr patterns if they have them


---
Diffs of the changes:  (+65 -2)

 DAGCombiner.cpp  |   38 ++++++++++++++++++++++++++++++++++++--
 LegalizeDAG.cpp  |   18 ++++++++++++++++++
 SelectionDAG.cpp |   11 +++++++++++
 3 files changed, 65 insertions(+), 2 deletions(-)


Index: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.79 llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.80
--- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.79	Thu Jan  5 19:56:02 2006
+++ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp	Wed Jan 11 15:21:00 2006
@@ -1133,8 +1133,6 @@
                                                  N1),
                        DAG.getConstant(N1C->getValue() | C1->getValue(), VT));
   }
-  
-  
   // fold (or (setcc x), (setcc y)) -> (setcc (or x, y))
   if (isSetCCEquivalent(N0, LL, LR, CC0) && isSetCCEquivalent(N1, RL, RR, CC1)){
     ISD::CondCode Op0 = cast<CondCodeSDNode>(CC0)->get();
@@ -1180,6 +1178,42 @@
     WorkList.push_back(ORNode.Val);
     return DAG.getNode(ISD::ZERO_EXTEND, VT, ORNode);
   }
+  // canonicalize shl to left side in a shl/srl pair, to match rotate
+  if (N0.getOpcode() == ISD::SRL && N1.getOpcode() == ISD::SHL)
+    std::swap(N0, N1);
+  // check for rotl, rotr
+  if (N0.getOpcode() == ISD::SHL && N1.getOpcode() == ISD::SRL &&
+      N0.getOperand(0) == N1.getOperand(0) &&
+      TLI.isOperationLegal(ISD::ROTL, VT)) {
+    // fold (or (shl x, C1), (srl x, C2)) -> (rotl x, C1)
+    if (N0.getOperand(1).getOpcode() == ISD::Constant &&
+        N1.getOperand(1).getOpcode() == ISD::Constant) {
+      uint64_t c1val = cast<ConstantSDNode>(N0.getOperand(1))->getValue();
+      uint64_t c2val = cast<ConstantSDNode>(N1.getOperand(1))->getValue();
+      if ((c1val + c2val) == OpSizeInBits)
+        return DAG.getNode(ISD::ROTL, VT, N0.getOperand(0), N0.getOperand(1));
+    }
+    // fold (or (shl x, y), (srl x, (sub 32, y))) -> (rotl x, y)
+    if (N1.getOperand(1).getOpcode() == ISD::SUB &&
+        N0.getOperand(1) == N1.getOperand(1).getOperand(1))
+      if (ConstantSDNode *SUBC = 
+          dyn_cast<ConstantSDNode>(N1.getOperand(1).getOperand(0)))
+        if (SUBC->getValue() == OpSizeInBits)
+          return DAG.getNode(ISD::ROTL, VT, N0.getOperand(0), N0.getOperand(1));
+    // fold (or (shl x, (sub 32, y)), (srl x, r)) -> (rotr x, y)
+    if (N0.getOperand(1).getOpcode() == ISD::SUB &&
+        N1.getOperand(1) == N0.getOperand(1).getOperand(1))
+      if (ConstantSDNode *SUBC = 
+          dyn_cast<ConstantSDNode>(N0.getOperand(1).getOperand(0)))
+        if (SUBC->getValue() == OpSizeInBits) {
+          if (TLI.isOperationLegal(ISD::ROTR, VT))
+            return DAG.getNode(ISD::ROTR, VT, N0.getOperand(0), 
+                               N1.getOperand(1));
+          else
+            return DAG.getNode(ISD::ROTL, VT, N0.getOperand(0),
+                               N0.getOperand(1));
+        }
+  }
   return SDOperand();
 }
 


Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.258 llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.259
--- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.258	Tue Jan 10 13:43:26 2006
+++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp	Wed Jan 11 15:21:00 2006
@@ -2112,6 +2112,24 @@
     }
     break;
 
+  case ISD::ROTL:
+  case ISD::ROTR:
+    Tmp1 = LegalizeOp(Node->getOperand(0));   // LHS
+    Tmp2 = LegalizeOp(Node->getOperand(1));   // RHS
+    switch (TLI.getOperationAction(Node->getOpcode(), Node->getValueType(0))) {
+    case TargetLowering::Custom:
+    case TargetLowering::Promote:
+    case TargetLowering::Expand:
+      assert(0 && "Cannot handle this yet!");
+    case TargetLowering::Legal:
+      if (Tmp1 != Node->getOperand(0) ||
+          Tmp2 != Node->getOperand(1))
+        Result = DAG.getNode(Node->getOpcode(), Node->getValueType(0), Tmp1,
+                             Tmp2);
+      break;
+    }
+    break;
+    
   case ISD::CTPOP:
   case ISD::CTTZ:
   case ISD::CTLZ:


Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.235 llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.236
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.235	Mon Jan  9 12:29:18 2006
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp	Wed Jan 11 15:21:00 2006
@@ -983,6 +983,8 @@
   case ISD::SHL:
   case ISD::SRA:
   case ISD::SRL:
+  case ISD::ROTL:
+  case ISD::ROTR:
     assert(VT == N1.getValueType() &&
            "Shift operators return type must be the same as their first arg");
     assert(MVT::isInteger(VT) && MVT::isInteger(N2.getValueType()) &&
@@ -1039,6 +1041,12 @@
       case ISD::SHL  : return getConstant(C1 << C2, VT);
       case ISD::SRL  : return getConstant(C1 >> C2, VT);
       case ISD::SRA  : return getConstant(N1C->getSignExtended() >>(int)C2, VT);
+      case ISD::ROTL : 
+        return getConstant((C1 << C2) | (C1 >> (MVT::getSizeInBits(VT) - C2)),
+                           VT);
+      case ISD::ROTR : 
+        return getConstant((C1 >> C2) | (C1 << (MVT::getSizeInBits(VT) - C2)), 
+                           VT);
       default: break;
       }
     } else {      // Cannonicalize constant to RHS if commutative
@@ -1915,6 +1923,9 @@
   case ISD::SHL:    return "shl";
   case ISD::SRA:    return "sra";
   case ISD::SRL:    return "srl";
+  case ISD::ROTL:   return "rotl";
+  case ISD::ROTR:   return "rotr";
+  case ISD::BSWAP:  return "bswap";
   case ISD::FADD:   return "fadd";
   case ISD::FSUB:   return "fsub";
   case ISD::FMUL:   return "fmul";





From natebegeman at mac.com  Wed Jan 11 15:21:18 2006
From: natebegeman at mac.com (Nate Begeman)
Date: Wed, 11 Jan 2006 15:21:18 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp 
Message-ID: <200601112121.PAA19239@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/X86:

X86ISelLowering.cpp updated: 1.28 -> 1.29
---
Log message:

Add bswap, rotl, and rotr nodes
Add dag combiner code to recognize rotl, rotr
Add ppc code to match rotl

Targets should add rotl/rotr patterns if they have them


---
Diffs of the changes:  (+7 -0)

 X86ISelLowering.cpp |    7 +++++++
 1 files changed, 7 insertions(+)


Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.28 llvm/lib/Target/X86/X86ISelLowering.cpp:1.29
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.28	Wed Jan 11 00:09:51 2006
+++ llvm/lib/Target/X86/X86ISelLowering.cpp	Wed Jan 11 15:21:00 2006
@@ -107,6 +107,13 @@
   setOperationAction(ISD::CTLZ             , MVT::i32  , Expand);
   setOperationAction(ISD::READCYCLECOUNTER , MVT::i64  , Custom);
 
+  setOperationAction(ISD::ROTL             , MVT::i8   , Expand);
+  setOperationAction(ISD::ROTR             , MVT::i8   , Expand);
+  setOperationAction(ISD::ROTL             , MVT::i16  , Expand);
+  setOperationAction(ISD::ROTR             , MVT::i16  , Expand);
+  setOperationAction(ISD::ROTL             , MVT::i32  , Expand);
+  setOperationAction(ISD::ROTR             , MVT::i32  , Expand);
+
   setOperationAction(ISD::READIO           , MVT::i1   , Expand);
   setOperationAction(ISD::READIO           , MVT::i8   , Expand);
   setOperationAction(ISD::READIO           , MVT::i16  , Expand);





From natebegeman at mac.com  Wed Jan 11 15:21:18 2006
From: natebegeman at mac.com (Nate Begeman)
Date: Wed, 11 Jan 2006 15:21:18 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/IA64/IA64ISelLowering.cpp 
Message-ID: <200601112121.PAA19255@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/IA64:

IA64ISelLowering.cpp updated: 1.15 -> 1.16
---
Log message:

Add bswap, rotl, and rotr nodes
Add dag combiner code to recognize rotl, rotr
Add ppc code to match rotl

Targets should add rotl/rotr patterns if they have them


---
Diffs of the changes:  (+2 -0)

 IA64ISelLowering.cpp |    2 ++
 1 files changed, 2 insertions(+)


Index: llvm/lib/Target/IA64/IA64ISelLowering.cpp
diff -u llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.15 llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.16
--- llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.15	Tue Jan 10 13:45:18 2006
+++ llvm/lib/Target/IA64/IA64ISelLowering.cpp	Wed Jan 11 15:21:00 2006
@@ -80,6 +80,8 @@
       //IA64 has these, but they are not implemented
       setOperationAction(ISD::CTTZ , MVT::i64  , Expand);
       setOperationAction(ISD::CTLZ , MVT::i64  , Expand);
+      setOperationAction(ISD::ROTL , MVT::i64  , Expand);
+      setOperationAction(ISD::ROTR , MVT::i64  , Expand);
 
       computeRegisterProperties();
 





From natebegeman at mac.com  Wed Jan 11 15:21:18 2006
From: natebegeman at mac.com (Nate Begeman)
Date: Wed, 11 Jan 2006 15:21:18 -0600
Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/SelectionDAGNodes.h 
Message-ID: <200601112121.PAA19241@zion.cs.uiuc.edu>



Changes in directory llvm/include/llvm/CodeGen:

SelectionDAGNodes.h updated: 1.88 -> 1.89
---
Log message:

Add bswap, rotl, and rotr nodes
Add dag combiner code to recognize rotl, rotr
Add ppc code to match rotl

Targets should add rotl/rotr patterns if they have them


---
Diffs of the changes:  (+4 -2)

 SelectionDAGNodes.h |    6 ++++--
 1 files changed, 4 insertions(+), 2 deletions(-)


Index: llvm/include/llvm/CodeGen/SelectionDAGNodes.h
diff -u llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.88 llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.89
--- llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.88	Wed Jan  4 19:53:28 2006
+++ llvm/include/llvm/CodeGen/SelectionDAGNodes.h	Wed Jan 11 15:21:00 2006
@@ -131,8 +131,10 @@
     // an unsigned/signed value of type i[2*n], then return the top part.
     MULHU, MULHS,
 
-    // Bitwise operators.
-    AND, OR, XOR, SHL, SRA, SRL,
+    // Bitwise operators - logical and, logical or, logical xor, shift left,
+    // shift right algebraic (shift in sign bits), shift right logical (shift in
+    // zeroes), rotate left, rotate right, and byteswap.
+    AND, OR, XOR, SHL, SRA, SRL, ROTL, ROTR, BSWAP,
 
     // Counting operators
     CTTZ, CTLZ, CTPOP,





From natebegeman at mac.com  Wed Jan 11 15:21:18 2006
From: natebegeman at mac.com (Nate Begeman)
Date: Wed, 11 Jan 2006 15:21:18 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
	PPCInstrInfo.td 
Message-ID: <200601112121.PAA19251@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/PowerPC:

PPCISelLowering.cpp updated: 1.62 -> 1.63
PPCInstrInfo.td updated: 1.172 -> 1.173
---
Log message:

Add bswap, rotl, and rotr nodes
Add dag combiner code to recognize rotl, rotr
Add ppc code to match rotl

Targets should add rotl/rotr patterns if they have them


---
Diffs of the changes:  (+9 -3)

 PPCISelLowering.cpp |    3 +++
 PPCInstrInfo.td     |    9 ++++++---
 2 files changed, 9 insertions(+), 3 deletions(-)


Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.62 llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.63
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.62	Wed Jan 11 13:55:07 2006
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp	Wed Jan 11 15:21:00 2006
@@ -68,6 +68,9 @@
   setOperationAction(ISD::CTPOP, MVT::i32  , Expand);
   setOperationAction(ISD::CTTZ , MVT::i32  , Expand);
   
+  // PowerPC does not have ROTR
+  setOperationAction(ISD::ROTR, MVT::i32   , Expand);
+  
   // PowerPC does not have Select
   setOperationAction(ISD::SELECT, MVT::i32, Expand);
   setOperationAction(ISD::SELECT, MVT::f32, Expand);


Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td
diff -u llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.172 llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.173
--- llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.172	Mon Jan  9 18:15:59 2006
+++ llvm/lib/Target/PowerPC/PPCInstrInfo.td	Wed Jan 11 15:21:00 2006
@@ -982,9 +982,6 @@
 // XOR an arbitrary immediate.
 def : Pat<(xor GPRC:$in, imm:$imm),
           (XORIS (XORI GPRC:$in, (LO16 imm:$imm)), (HI16 imm:$imm))>;
-def : Pat<(or (shl GPRC:$rS, GPRC:$rB),
-              (srl GPRC:$rS, (sub 32, GPRC:$rB))),
-          (RLWNM GPRC:$rS, GPRC:$rB, 0, 31)>;
 
 // Return void support.
 def : Pat<(ret), (BLR)>;
@@ -1008,6 +1005,12 @@
 def : Pat<(srl G8RC:$in, (i64 imm:$imm)),
           (RLDICL G8RC:$in, (SRL64 imm:$imm), imm:$imm)>;
 
+// ROTL
+def : Pat<(rotl GPRC:$in, GPRC:$sh),
+          (RLWNM GPRC:$in, GPRC:$sh, 0, 31)>;
+def : Pat<(rotl GPRC:$in, (i32 imm:$imm)),
+          (RLWINM GPRC:$in, imm:$imm, 0, 31)>;
+          
 // Hi and Lo for Darwin Global Addresses.
 def : Pat<(PPChi tglobaladdr:$in, 0), (LIS tglobaladdr:$in)>;
 def : Pat<(PPClo tglobaladdr:$in, 0), (LI tglobaladdr:$in)>;





From natebegeman at mac.com  Wed Jan 11 15:21:18 2006
From: natebegeman at mac.com (Nate Begeman)
Date: Wed, 11 Jan 2006 15:21:18 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/TargetSelectionDAG.td 
Message-ID: <200601112121.PAA19237@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target:

TargetSelectionDAG.td updated: 1.42 -> 1.43
---
Log message:

Add bswap, rotl, and rotr nodes
Add dag combiner code to recognize rotl, rotr
Add ppc code to match rotl

Targets should add rotl/rotr patterns if they have them


---
Diffs of the changes:  (+2 -0)

 TargetSelectionDAG.td |    2 ++
 1 files changed, 2 insertions(+)


Index: llvm/lib/Target/TargetSelectionDAG.td
diff -u llvm/lib/Target/TargetSelectionDAG.td:1.42 llvm/lib/Target/TargetSelectionDAG.td:1.43
--- llvm/lib/Target/TargetSelectionDAG.td:1.42	Mon Jan  9 12:28:21 2006
+++ llvm/lib/Target/TargetSelectionDAG.td	Wed Jan 11 15:21:00 2006
@@ -230,6 +230,8 @@
 def srl        : SDNode<"ISD::SRL"       , SDTIntShiftOp>;
 def sra        : SDNode<"ISD::SRA"       , SDTIntShiftOp>;
 def shl        : SDNode<"ISD::SHL"       , SDTIntShiftOp>;
+def rotl       : SDNode<"ISD::ROTL"      , SDTIntShiftOp>;
+def rotr       : SDNode<"ISD::ROTR"      , SDTIntShiftOp>;
 def and        : SDNode<"ISD::AND"       , SDTIntBinOp,
                         [SDNPCommutative, SDNPAssociative]>;
 def or         : SDNode<"ISD::OR"        , SDTIntBinOp,





From evan.cheng at apple.com  Wed Jan 11 16:14:12 2006
From: evan.cheng at apple.com (Evan Cheng)
Date: Wed, 11 Jan 2006 16:14:12 -0600
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp 
Message-ID: <200601112214.QAA19908@zion.cs.uiuc.edu>



Changes in directory llvm/lib/CodeGen/SelectionDAG:

SelectionDAG.cpp updated: 1.236 -> 1.237
---
Log message:

ignore register #0


---
Diffs of the changes:  (+1 -1)

 SelectionDAG.cpp |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.236 llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.237
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.236	Wed Jan 11 15:21:00 2006
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp	Wed Jan 11 16:13:48 2006
@@ -2078,7 +2078,7 @@
       std::cerr << LBB->getName() << " ";
     std::cerr << (const void*)BBDN->getBasicBlock() << ">";
   } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
-    if (G && MRegisterInfo::isPhysicalRegister(R->getReg())) {
+    if (G && R->getReg() && MRegisterInfo::isPhysicalRegister(R->getReg())) {
       std::cerr << " " <<G->getTarget().getRegisterInfo()->getName(R->getReg());
     } else {
       std::cerr << " #" << R->getReg();





From evan.cheng at apple.com  Wed Jan 11 16:15:01 2006
From: evan.cheng at apple.com (Evan Cheng)
Date: Wed, 11 Jan 2006 16:15:01 -0600
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp 
Message-ID: <200601112215.QAA19932@zion.cs.uiuc.edu>



Changes in directory llvm/lib/CodeGen/SelectionDAG:

LegalizeDAG.cpp updated: 1.259 -> 1.260
---
Log message:

Allow custom lowering of DYNAMIC_STACKALLOC.


---
Diffs of the changes:  (+20 -7)

 LegalizeDAG.cpp |   27 ++++++++++++++++++++-------
 1 files changed, 20 insertions(+), 7 deletions(-)


Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.259 llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.260
--- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.259	Wed Jan 11 15:21:00 2006
+++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp	Wed Jan 11 16:14:47 2006
@@ -829,7 +829,7 @@
     // legalization process more efficient and also makes libcall insertion
     // easier.
     break;
-  case ISD::DYNAMIC_STACKALLOC:
+  case ISD::DYNAMIC_STACKALLOC: {
     Tmp1 = LegalizeOp(Node->getOperand(0));  // Legalize the chain.
     Tmp2 = LegalizeOp(Node->getOperand(1));  // Legalize the size.
     Tmp3 = LegalizeOp(Node->getOperand(2));  // Legalize the alignment.
@@ -842,12 +842,25 @@
     } else
       Result = Op.getValue(0);
 
-    // Since this op produces two values, make sure to remember that we
-    // legalized both of them.
-    AddLegalizedOperand(SDOperand(Node, 0), Result);
-    AddLegalizedOperand(SDOperand(Node, 1), Result.getValue(1));
-    return Result.getValue(Op.ResNo);
-
+    switch (TLI.getOperationAction(Node->getOpcode(),
+                                   Node->getValueType(0))) {
+    default: assert(0 && "This action is not supported yet!");
+    case TargetLowering::Custom: {
+      SDOperand Tmp = TLI.LowerOperation(Result, DAG);
+      if (Tmp.Val) {
+        Result = LegalizeOp(Tmp);
+      }
+      // FALLTHROUGH if the target thinks it is legal.
+    }
+    case TargetLowering::Legal:
+      // Since this op produce two values, make sure to remember that we
+      // legalized both of them.
+      AddLegalizedOperand(SDOperand(Node, 0), Result);
+      AddLegalizedOperand(SDOperand(Node, 1), Result.getValue(1));
+      return Result.getValue(Op.ResNo);
+    }
+    assert(0 && "Unreachable");
+  }
   case ISD::TAILCALL:
   case ISD::CALL: {
     Tmp1 = LegalizeOp(Node->getOperand(0));  // Legalize the chain.





From evan.cheng at apple.com  Wed Jan 11 16:15:31 2006
From: evan.cheng at apple.com (Evan Cheng)
Date: Wed, 11 Jan 2006 16:15:31 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp 
Message-ID: <200601112215.QAA19944@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/X86:

X86ISelDAGToDAG.cpp updated: 1.29 -> 1.30
---
Log message:

Select DYNAMIC_STACKALLOC


---
Diffs of the changes:  (+44 -1)

 X86ISelDAGToDAG.cpp |   45 ++++++++++++++++++++++++++++++++++++++++++++-
 1 files changed, 44 insertions(+), 1 deletion(-)


Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
diff -u llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.29 llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.30
--- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.29	Wed Jan 11 00:09:51 2006
+++ llvm/lib/Target/X86/X86ISelDAGToDAG.cpp	Wed Jan 11 16:15:18 2006
@@ -458,6 +458,9 @@
 
   if (Opcode >= ISD::BUILTIN_OP_END && Opcode < X86ISD::FIRST_NUMBER)
     return N;   // Already selected.
+
+  std::map<SDOperand, SDOperand>::iterator CGMI = CodeGenMap.find(N);
+  if (CGMI != CodeGenMap.end()) return CGMI->second;
   
   switch (Opcode) {
     default: break;
@@ -621,7 +624,7 @@
       SDOperand Tmp1 = CurDAG->getTargetNode(Opc, VT, Tmp0);
       SDOperand InFlag = SDOperand(0,0);
       SDOperand Result = CurDAG->getCopyToReg(CurDAG->getEntryNode(),
-                                              Reg, Tmp1, InFlag).getValue(1);
+                                              Reg, Tmp1, InFlag);
       SDOperand Chain = Result.getValue(0);
       InFlag = Result.getValue(1);
 
@@ -696,6 +699,46 @@
                                       Base, Scale, Index, Disp, Chain);
       return Chain;
     }
+
+    case ISD::DYNAMIC_STACKALLOC: {
+      SDOperand Chain = N.getOperand(0);
+      SDOperand Size  = N.getOperand(1);
+      SDOperand Align = N.getOperand(2);
+
+      // FIXME: We are currently ignoring the requested alignment for handling
+      // greater than the stack alignment.  This will need to be revisited at
+      // some point.
+      if (!isa<ConstantSDNode>(Align) ||
+          cast<ConstantSDNode>(Align)->getValue() != 0) {
+        std::cerr << "Cannot allocate stack object with greater alignment than"
+                  << " the stack alignment yet!";
+        abort();
+      }
+
+      // FIXME: This produces crappy code. Lots of unnecessary MOV32rr to and
+      // from ESP.
+      SDOperand InFlag;
+      SDOperand SPVal = CurDAG->getCopyFromReg(Chain, X86::ESP, MVT::i32, InFlag);
+      Chain  = SPVal.getValue(1);
+      InFlag = SPVal.getValue(2);
+
+      SDOperand Result = Select(CurDAG->getNode(X86ISD::SUB_FLAG, MVT::i32,
+                                                SPVal, Size, InFlag));
+      InFlag = Result.getValue(1);
+
+      // Force the result back into ESP.
+      Chain  = CurDAG->getCopyToReg(Chain,
+                                    CurDAG->getRegister(X86::ESP, MVT::i32),
+                                    Result, InFlag);
+      InFlag = Chain.getValue(1);
+
+      // Copy the result back from ESP.
+      Result = CurDAG->getCopyFromReg(Chain, X86::ESP, MVT::i32, InFlag);
+
+      CodeGenMap[N.getValue(0)] = Result;
+      CodeGenMap[N.getValue(1)] = Result.getValue(1);
+      return Result.getValue(N.ResNo);
+    }
   }
 
   return SelectCode(N);





From evan.cheng at apple.com  Wed Jan 11 16:16:01 2006
From: evan.cheng at apple.com (Evan Cheng)
Date: Wed, 11 Jan 2006 16:16:01 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp
	X86ISelLowering.h X86ISelPattern.cpp X86InstrInfo.td 
Message-ID: <200601112216.QAA19962@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/X86:

X86ISelLowering.cpp updated: 1.29 -> 1.30
X86ISelLowering.h updated: 1.13 -> 1.14
X86ISelPattern.cpp updated: 1.193 -> 1.194
X86InstrInfo.td updated: 1.196 -> 1.197
---
Log message:

Support for MEMCPY and MEMSET.


---
Diffs of the changes:  (+137 -10)

 X86ISelLowering.cpp |  108 ++++++++++++++++++++++++++++++++++++++++++++++++++++
 X86ISelLowering.h   |   10 +++-
 X86ISelPattern.cpp  |    4 -
 X86InstrInfo.td     |   25 +++++++++---
 4 files changed, 137 insertions(+), 10 deletions(-)


Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.29 llvm/lib/Target/X86/X86ISelLowering.cpp:1.30
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.29	Wed Jan 11 15:21:00 2006
+++ llvm/lib/Target/X86/X86ISelLowering.cpp	Wed Jan 11 16:15:48 2006
@@ -147,6 +147,9 @@
     setOperationAction(ISD::SHL_PARTS      , MVT::i32  , Custom);
     setOperationAction(ISD::SRA_PARTS      , MVT::i32  , Custom);
     setOperationAction(ISD::SRL_PARTS      , MVT::i32  , Custom);
+    // X86 wants to expand memset / memcpy itself.
+    setOperationAction(ISD::MEMSET         , MVT::Other, Custom);
+    setOperationAction(ISD::MEMCPY         , MVT::Other, Custom);
   }
 
   // We don't have line number support yet.
@@ -1614,6 +1617,109 @@
     return DAG.getNode(X86ISD::RET_FLAG, MVT::Other, Op.getOperand(0),
                        DAG.getConstant(getBytesToPopOnReturn(), MVT::i16));
   }
+  case ISD::MEMSET: {
+    SDOperand InFlag;
+    SDOperand Chain = Op.getOperand(0);
+    unsigned Align =
+      (unsigned)cast<ConstantSDNode>(Op.getOperand(4))->getValue();
+    if (Align == 0) Align = 1;
+
+    MVT::ValueType AVT;
+    SDOperand Count;
+    if (ConstantSDNode *ValC = dyn_cast<ConstantSDNode>(Op.getOperand(2))) {
+      unsigned ValReg;
+      unsigned Val = ValC->getValue() & 255;
+
+      // If the value is a constant, then we can potentially use larger sets.
+      switch (Align & 3) {
+      case 2:   // WORD aligned
+        AVT = MVT::i16;
+        if (ConstantSDNode *I = dyn_cast<ConstantSDNode>(Op.getOperand(3)))
+          Count = DAG.getConstant(I->getValue() / 2, MVT::i32);
+        else
+          Count = DAG.getNode(ISD::SRL, MVT::i32, Op.getOperand(3),
+                              DAG.getConstant(1, MVT::i8));
+        Val    = (Val << 8) | Val;
+        ValReg = X86::AX;
+        break;
+      case 0:   // DWORD aligned
+        AVT = MVT::i32;
+        if (ConstantSDNode *I = dyn_cast<ConstantSDNode>(Op.getOperand(3)))
+          Count = DAG.getConstant(I->getValue() / 4, MVT::i32);
+        else
+          Count = DAG.getNode(ISD::SRL, MVT::i32, Op.getOperand(3),
+                              DAG.getConstant(2, MVT::i8));
+        Val = (Val << 8)  | Val;
+        Val = (Val << 16) | Val;
+        ValReg = X86::EAX;
+        break;
+      default:  // Byte aligned
+        AVT = MVT::i8;
+        Count = Op.getOperand(3);
+        ValReg = X86::AL;
+        break;
+      }
+
+      Chain  = DAG.getCopyToReg(Chain, ValReg, DAG.getConstant(Val, AVT),
+                                InFlag);
+      InFlag = Chain.getValue(1);
+    } else {
+      AVT    = MVT::i8;
+      Count  = Op.getOperand(3);
+      Chain  = DAG.getCopyToReg(Chain, X86::AL, Op.getOperand(2), InFlag);
+      InFlag = Chain.getValue(1);
+    }
+
+    Chain  = DAG.getCopyToReg(Chain, X86::ECX, Count, InFlag);
+    InFlag = Chain.getValue(1);
+    Chain  = DAG.getCopyToReg(Chain, X86::EDI, Op.getOperand(1), InFlag);
+    InFlag = Chain.getValue(1);
+
+    return DAG.getNode(X86ISD::REP_STOS, MVT::Other, Chain,
+                       DAG.getValueType(AVT), InFlag);
+  }
+  case ISD::MEMCPY: {
+    SDOperand Chain = Op.getOperand(0);
+    unsigned Align =
+      (unsigned)cast<ConstantSDNode>(Op.getOperand(4))->getValue();
+    if (Align == 0) Align = 1;
+
+    MVT::ValueType AVT;
+    SDOperand Count;
+    switch (Align & 3) {
+    case 2:   // WORD aligned
+      AVT = MVT::i16;
+      if (ConstantSDNode *I = dyn_cast<ConstantSDNode>(Op.getOperand(3)))
+        Count = DAG.getConstant(I->getValue() / 2, MVT::i32);
+      else
+        Count = DAG.getNode(ISD::SRL, MVT::i32, Op.getOperand(3),
+                            DAG.getConstant(1, MVT::i8));
+      break;
+    case 0:   // DWORD aligned
+      AVT = MVT::i32;
+      if (ConstantSDNode *I = dyn_cast<ConstantSDNode>(Op.getOperand(3)))
+        Count = DAG.getConstant(I->getValue() / 4, MVT::i32);
+      else
+        Count = DAG.getNode(ISD::SRL, MVT::i32, Op.getOperand(3),
+                            DAG.getConstant(2, MVT::i8));
+      break;
+    default:  // Byte aligned
+      AVT = MVT::i8;
+      Count = Op.getOperand(3);
+      break;
+    }
+
+    SDOperand InFlag;
+    Chain  = DAG.getCopyToReg(Chain, X86::ECX, Count, InFlag);
+    InFlag = Chain.getValue(1);
+    Chain  = DAG.getCopyToReg(Chain, X86::EDI, Op.getOperand(1), InFlag);
+    InFlag = Chain.getValue(1);
+    Chain  = DAG.getCopyToReg(Chain, X86::ESI, Op.getOperand(2), InFlag);
+    InFlag = Chain.getValue(1);
+
+    return DAG.getNode(X86ISD::REP_MOVS, MVT::Other, Chain,
+                       DAG.getValueType(AVT), InFlag);
+  }
   case ISD::GlobalAddress: {
     GlobalValue *GV = cast<GlobalAddressSDNode>(Op)->getGlobal();
     SDOperand GVOp = DAG.getTargetGlobalAddress(GV, getPointerTy());
@@ -1659,6 +1765,8 @@
   case X86ISD::CMOV:               return "X86ISD::CMOV";
   case X86ISD::BRCOND:             return "X86ISD::BRCOND";
   case X86ISD::RET_FLAG:           return "X86ISD::RET_FLAG";
+  case X86ISD::REP_STOS:           return "X86ISD::RET_STOS";
+  case X86ISD::REP_MOVS:           return "X86ISD::RET_MOVS";
   }
 }
 


Index: llvm/lib/Target/X86/X86ISelLowering.h
diff -u llvm/lib/Target/X86/X86ISelLowering.h:1.13 llvm/lib/Target/X86/X86ISelLowering.h:1.14
--- llvm/lib/Target/X86/X86ISelLowering.h:1.13	Tue Jan 10 18:33:36 2006
+++ llvm/lib/Target/X86/X86ISelLowering.h	Wed Jan 11 16:15:48 2006
@@ -123,9 +123,15 @@
       /// or TEST instruction.
       BRCOND,
 
-      /// Return with a flag operand. Operand 1 is the number of bytes of stack
-      /// to pop, operand 2 is the chain and operand 3 is a flag operand.
+      /// Return with a flag operand. Operand 1 is the chain operand, operand
+      /// 2 is the number of bytes of stack to pop.
       RET_FLAG,
+
+      /// REP_STOS - Repeat fill, corresponds to X86::REP_STOSx.
+      REP_STOS,
+
+      /// REP_MOVS - Repeat move, corresponds to X86::REP_MOVSx.
+      REP_MOVS,
     };
 
     // X86 specific condition code. These correspond to X86_*_COND in


Index: llvm/lib/Target/X86/X86ISelPattern.cpp
diff -u llvm/lib/Target/X86/X86ISelPattern.cpp:1.193 llvm/lib/Target/X86/X86ISelPattern.cpp:1.194
--- llvm/lib/Target/X86/X86ISelPattern.cpp:1.193	Wed Jan 11 00:09:51 2006
+++ llvm/lib/Target/X86/X86ISelPattern.cpp	Wed Jan 11 16:15:48 2006
@@ -3558,8 +3558,8 @@
       Opcode = X86::REP_STOSB;
     }
 
-    // No matter what the alignment is, we put the source in ESI, the
-    // destination in EDI, and the count in ECX.
+    // No matter what the alignment is, we put the destination in EDI, and the
+    // count in ECX.
     unsigned TmpReg1 = SelectExpr(Node->getOperand(1));
     BuildMI(BB, X86::MOV32rr, 1, X86::ECX).addReg(CountReg);
     BuildMI(BB, X86::MOV32rr, 1, X86::EDI).addReg(TmpReg1);


Index: llvm/lib/Target/X86/X86InstrInfo.td
diff -u llvm/lib/Target/X86/X86InstrInfo.td:1.196 llvm/lib/Target/X86/X86InstrInfo.td:1.197
--- llvm/lib/Target/X86/X86InstrInfo.td:1.196	Wed Jan 11 00:09:51 2006
+++ llvm/lib/Target/X86/X86InstrInfo.td	Wed Jan 11 16:15:48 2006
@@ -52,6 +52,8 @@
                                          SDTCisPtrTy<1>, SDTCisVT<2, OtherVT>]>;
 def SDTX86Fild64m : SDTypeProfile<1, 1, [SDTCisVT<0, f64>, SDTCisPtrTy<1>]>;
 
+def SDTX86RepStr  : SDTypeProfile<0, 1, [SDTCisVT<0, OtherVT>]>;
+
 def SDTX86RdTsc   : SDTypeProfile<0, 0, []>;
 
 def X86addflag : SDNode<"X86ISD::ADD_FLAG", SDTIntBinOp ,
@@ -99,6 +101,11 @@
 def X86fild64m : SDNode<"X86ISD::FILD64m",  SDTX86Fild64m,
                         [SDNPHasChain]>;
 
+def X86rep_stos: SDNode<"X86ISD::REP_STOS", SDTX86RepStr,
+                        [SDNPHasChain, SDNPInFlag]>;
+def X86rep_movs: SDNode<"X86ISD::REP_MOVS", SDTX86RepStr,
+                        [SDNPHasChain, SDNPInFlag]>;
+
 def X86rdtsc   : SDNode<"X86ISD::RDTSC_DAG",SDTX86RdTsc,
                         [SDNPHasChain, SDNPOutFlag]>;
 
@@ -549,18 +556,24 @@
                  "lea{l} {$src|$dst}, {$dst|$src}",
                  [(set R32:$dst, leaaddr:$src)]>;
 
-def REP_MOVSB : I<0xA4, RawFrm, (ops), "{rep;movsb|rep movsb}", []>,
+def REP_MOVSB : I<0xA4, RawFrm, (ops), "{rep;movsb|rep movsb}",
+                  [(X86rep_movs i8)]>,
                 Imp<[ECX,EDI,ESI], [ECX,EDI,ESI]>, REP;
-def REP_MOVSW : I<0xA5, RawFrm, (ops), "{rep;movsw|rep movsw}", []>,
+def REP_MOVSW : I<0xA5, RawFrm, (ops), "{rep;movsw|rep movsw}",
+                  [(X86rep_movs i16)]>,
                 Imp<[ECX,EDI,ESI], [ECX,EDI,ESI]>, REP, OpSize;
-def REP_MOVSD : I<0xA5, RawFrm, (ops), "{rep;movsd|rep movsd}", []>,
+def REP_MOVSD : I<0xA5, RawFrm, (ops), "{rep;movsd|rep movsd}",
+                  [(X86rep_movs i32)]>,
                 Imp<[ECX,EDI,ESI], [ECX,EDI,ESI]>, REP;
 
-def REP_STOSB : I<0xAA, RawFrm, (ops), "{rep;stosb|rep stosb}", []>,
+def REP_STOSB : I<0xAA, RawFrm, (ops), "{rep;stosb|rep stosb}",
+                  [(X86rep_stos i8)]>,
                 Imp<[AL,ECX,EDI], [ECX,EDI]>, REP;
-def REP_STOSW : I<0xAB, RawFrm, (ops), "{rep;stosw|rep stosw}", []>,
+def REP_STOSW : I<0xAB, RawFrm, (ops), "{rep;stosw|rep stosw}",
+                  [(X86rep_stos i16)]>,
                 Imp<[AX,ECX,EDI], [ECX,EDI]>, REP, OpSize;
-def REP_STOSD : I<0xAB, RawFrm, (ops), "{rep;stosl|rep stosd}", []>,
+def REP_STOSD : I<0xAB, RawFrm, (ops), "{rep;stosl|rep stosd}",
+                  [(X86rep_stos i32)]>,
                 Imp<[EAX,ECX,EDI], [ECX,EDI]>, REP;
 
 





From evan.cheng at apple.com  Wed Jan 11 16:16:25 2006
From: evan.cheng at apple.com (Evan Cheng)
Date: Wed, 11 Jan 2006 16:16:25 -0600
Subject: [llvm-commits] CVS: llvm/utils/TableGen/DAGISelEmitter.cpp 
Message-ID: <200601112216.QAA19974@zion.cs.uiuc.edu>



Changes in directory llvm/utils/TableGen:

DAGISelEmitter.cpp updated: 1.130 -> 1.131
---
Log message:

Some minor fixes.


---
Diffs of the changes:  (+19 -26)

 DAGISelEmitter.cpp |   45 +++++++++++++++++++--------------------------
 1 files changed, 19 insertions(+), 26 deletions(-)


Index: llvm/utils/TableGen/DAGISelEmitter.cpp
diff -u llvm/utils/TableGen/DAGISelEmitter.cpp:1.130 llvm/utils/TableGen/DAGISelEmitter.cpp:1.131
--- llvm/utils/TableGen/DAGISelEmitter.cpp:1.130	Wed Jan 11 13:52:27 2006
+++ llvm/utils/TableGen/DAGISelEmitter.cpp	Wed Jan 11 16:16:13 2006
@@ -2128,10 +2128,11 @@
       }
 
       // Emit all the chain and CopyToReg stuff.
+      bool ChainEmitted = HasChain;
       if (HasChain)
         OS << "      Chain = Select(Chain);\n";
       if (HasImpInputs)
-        EmitCopyToRegs(Pattern, "N", HasChain, true);
+        EmitCopyToRegs(Pattern, "N", ChainEmitted, true);
       if (HasInFlag || HasOptInFlag) {
         unsigned FlagNo = (unsigned) HasChain + Pattern->getNumChildren();
         if (HasOptInFlag)
@@ -2199,11 +2200,10 @@
              << ValNo + (unsigned)HasChain << ");\n";
 
         if (HasImpResults) {
-          if (EmitCopyFromRegs(N, HasChain)) {
+          if (EmitCopyFromRegs(N, ChainEmitted)) {
             OS << "      CodeGenMap[N.getValue(" << ValNo << ")] = "
                << "Result.getValue(" << ValNo << ");\n";
             ValNo++;
-            HasChain = true;
           }
         }
 
@@ -2314,14 +2314,14 @@
   /// EmitCopyToRegs - Emit the flag operands for the DAG that is
   /// being built.
   void EmitCopyToRegs(TreePatternNode *N, const std::string &RootName,
-                      bool HasChain, bool isRoot = false) {
+                      bool &ChainEmitted, bool isRoot = false) {
     const CodeGenTarget &T = ISE.getTargetInfo();
     unsigned OpNo =
       (unsigned) NodeHasProperty(N, SDNodeInfo::SDNPHasChain, ISE);
     for (unsigned i = 0, e = N->getNumChildren(); i != e; ++i, ++OpNo) {
       TreePatternNode *Child = N->getChild(i);
       if (!Child->isLeaf()) {
-        EmitCopyToRegs(Child, RootName + utostr(OpNo), HasChain);
+        EmitCopyToRegs(Child, RootName + utostr(OpNo), ChainEmitted);
       } else {
         if (DefInit *DI = dynamic_cast<DefInit*>(Child->getLeafValue())) {
           Record *RR = DI->getDef();
@@ -2329,7 +2329,11 @@
             MVT::ValueType RVT = getRegisterValueType(RR, T);
             if (RVT == MVT::Flag) {
               OS << "      InFlag = Select(" << RootName << OpNo << ");\n";
-            } else if (HasChain) {
+            } else {
+              if (!ChainEmitted) {
+                OS << "      SDOperand Chain = CurDAG->getEntryNode();\n";
+                ChainEmitted = true;
+              }
               OS << "      SDOperand " << RootName << "CR" << i << ";\n";
               OS << "      " << RootName << "CR" << i
                  << "  = CurDAG->getCopyToReg(Chain, CurDAG->getRegister("
@@ -2340,12 +2344,6 @@
                  << ".getValue(0);\n";
               OS << "      InFlag = " << RootName << "CR" << i
                  << ".getValue(1);\n";
-            } else {
-              OS << "      InFlag = CurDAG->getCopyToReg(CurDAG->getEntryNode()"
-                 << ", CurDAG->getRegister(" << ISE.getQualifiedName(RR)
-                 << ", MVT::" << getEnumName(RVT) << ")"
-                 << ", Select(" << RootName << OpNo
-                 << "), InFlag).getValue(1);\n";
             }
           }
         }
@@ -2356,7 +2354,7 @@
   /// EmitCopyFromRegs - Emit code to copy result to physical registers
   /// as specified by the instruction. It returns true if any copy is
   /// emitted.
-  bool EmitCopyFromRegs(TreePatternNode *N, bool HasChain) {
+  bool EmitCopyFromRegs(TreePatternNode *N, bool &ChainEmitted) {
     bool RetVal = false;
     Record *Op = N->getOperator();
     if (Op->isSubClassOf("Instruction")) {
@@ -2369,20 +2367,15 @@
         if (RR->isSubClassOf("Register")) {
           MVT::ValueType RVT = getRegisterValueType(RR, CGT);
           if (RVT != MVT::Flag) {
-            if (HasChain) {
-              OS << "      Result = CurDAG->getCopyFromReg(Chain, "
-                 << ISE.getQualifiedName(RR)
-                 << ", MVT::" << getEnumName(RVT) << ", InFlag);\n";
-              OS << "      Chain  = Result.getValue(1);\n";
-              OS << "      InFlag = Result.getValue(2);\n";
-            } else {
-              OS << "      Chain;\n";
-              OS << "      Result = CurDAG->getCopyFromReg("
-                 << "CurDAG->getEntryNode(), ISE.getQualifiedName(RR)"
-                 << ", MVT::" << getEnumName(RVT) << ", InFlag);\n";
-              OS << "      Chain  = Result.getValue(1);\n";
-              OS << "      InFlag = Result.getValue(2);\n";
+            if (!ChainEmitted) {
+              OS << "      SDOperand Chain = CurDAG->getEntryNode();\n";
+              ChainEmitted = true;
             }
+            OS << "      Result = CurDAG->getCopyFromReg(Chain, "
+               << ISE.getQualifiedName(RR)
+               << ", MVT::" << getEnumName(RVT) << ", InFlag);\n";
+            OS << "      Chain  = Result.getValue(1);\n";
+            OS << "      InFlag = Result.getValue(2);\n";
             RetVal = true;
           }
         }





From natebegeman at mac.com  Wed Jan 11 16:58:25 2006
From: natebegeman at mac.com (Nate Begeman)
Date: Wed, 11 Jan 2006 16:58:25 -0600
Subject: [llvm-commits] CVS: llvm/test/Regression/CodeGen/PowerPC/rotl.ll 
Message-ID: <200601112258.QAA20139@zion.cs.uiuc.edu>



Changes in directory llvm/test/Regression/CodeGen/PowerPC:

rotl.ll added (r1.1)
---
Log message:

Add testcase for rotate by register and rotate by immediate


---
Diffs of the changes:  (+51 -0)

 rotl.ll |   51 +++++++++++++++++++++++++++++++++++++++++++++++++++
 1 files changed, 51 insertions(+)


Index: llvm/test/Regression/CodeGen/PowerPC/rotl.ll
diff -c /dev/null llvm/test/Regression/CodeGen/PowerPC/rotl.ll:1.1
*** /dev/null	Wed Jan 11 16:58:22 2006
--- llvm/test/Regression/CodeGen/PowerPC/rotl.ll	Wed Jan 11 16:58:12 2006
***************
*** 0 ****
--- 1,51 ----
+ ; RUN: llvm-as < %s | llc -march=ppc32 | not grep or && 
+ ; RUN: llvm-as < %s | llc -march=ppc32 | grep rlwnm | wc -l | grep 2 &&
+ ; RUN: llvm-as < %s | llc -march=ppc32 | grep rlwinm | wc -l | grep 2
+ 
+ implementation   ; Functions:
+ 
+ int %rotlw(uint %x, int %sh) {
+ entry:
+ 	%tmp.3 = cast int %sh to ubyte		; <ubyte> [#uses=1]
+ 	%x = cast uint %x to int		; <int> [#uses=1]
+ 	%tmp.7 = sub int 32, %sh		; <int> [#uses=1]
+ 	%tmp.9 = cast int %tmp.7 to ubyte		; <ubyte> [#uses=1]
+ 	%tmp.10 = shr uint %x, ubyte %tmp.9		; <uint> [#uses=1]
+ 	%tmp.4 = shl int %x, ubyte %tmp.3		; <int> [#uses=1]
+ 	%tmp.10 = cast uint %tmp.10 to int		; <int> [#uses=1]
+ 	%tmp.12 = or int %tmp.10, %tmp.4		; <int> [#uses=1]
+ 	ret int %tmp.12
+ }
+ 
+ int %rotrw(uint %x, int %sh) {
+ entry:
+ 	%tmp.3 = cast int %sh to ubyte		; <ubyte> [#uses=1]
+ 	%tmp.4 = shr uint %x, ubyte %tmp.3		; <uint> [#uses=1]
+ 	%tmp.7 = sub int 32, %sh		; <int> [#uses=1]
+ 	%tmp.9 = cast int %tmp.7 to ubyte		; <ubyte> [#uses=1]
+ 	%x = cast uint %x to int		; <int> [#uses=1]
+ 	%tmp.4 = cast uint %tmp.4 to int		; <int> [#uses=1]
+ 	%tmp.10 = shl int %x, ubyte %tmp.9		; <int> [#uses=1]
+ 	%tmp.12 = or int %tmp.4, %tmp.10		; <int> [#uses=1]
+ 	ret int %tmp.12
+ }
+ 
+ int %rotlwi(uint %x) {
+ entry:
+ 	%x = cast uint %x to int		; <int> [#uses=1]
+ 	%tmp.7 = shr uint %x, ubyte 27		; <uint> [#uses=1]
+ 	%tmp.3 = shl int %x, ubyte 5		; <int> [#uses=1]
+ 	%tmp.7 = cast uint %tmp.7 to int		; <int> [#uses=1]
+ 	%tmp.9 = or int %tmp.3, %tmp.7		; <int> [#uses=1]
+ 	ret int %tmp.9
+ }
+ 
+ int %rotrwi(uint %x) {
+ entry:
+ 	%tmp.3 = shr uint %x, ubyte 5		; <uint> [#uses=1]
+ 	%x = cast uint %x to int		; <int> [#uses=1]
+ 	%tmp.3 = cast uint %tmp.3 to int		; <int> [#uses=1]
+ 	%tmp.7 = shl int %x, ubyte 27		; <int> [#uses=1]
+ 	%tmp.9 = or int %tmp.3, %tmp.7		; <int> [#uses=1]
+ 	ret int %tmp.9
+ }





From lattner at cs.uiuc.edu  Wed Jan 11 17:04:07 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed, 11 Jan 2006 17:04:07 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp 
Message-ID: <200601112304.RAA20246@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/PowerPC:

PPCRegisterInfo.cpp updated: 1.39 -> 1.40
---
Log message:

If a function has a non-zero sized frame, use an add to adjust the stack 
pointer in the epilog, not a load.


---
Diffs of the changes:  (+20 -9)

 PPCRegisterInfo.cpp |   29 ++++++++++++++++++++---------
 1 files changed, 20 insertions(+), 9 deletions(-)


Index: llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
diff -u llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.39 llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.40
--- llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.39	Mon Jan  9 12:28:21 2006
+++ llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp	Wed Jan 11 17:03:54 2006
@@ -370,23 +370,34 @@
 
 void PPCRegisterInfo::emitEpilogue(MachineFunction &MF,
                                    MachineBasicBlock &MBB) const {
-  const MachineFrameInfo *MFI = MF.getFrameInfo();
   MachineBasicBlock::iterator MBBI = prior(MBB.end());
-  MachineInstr *MI;
   assert(MBBI->getOpcode() == PPC::BLR &&
          "Can only insert epilog into returning blocks");
 
-  // Get the number of bytes allocated from the FrameInfo...
-  unsigned NumBytes = MFI->getStackSize();
-  unsigned GPRSize = 4;
+  // Get the number of bytes allocated from the FrameInfo.
+  unsigned NumBytes = MF.getFrameInfo()->getStackSize();
+  unsigned GPRSize = 4; 
 
   if (NumBytes != 0) {
+    // If this function has a frame pointer, load the saved stack pointer from
+    // its stack slot.
     if (hasFP(MF)) {
-      MI = BuildMI(PPC::LWZ, 2, PPC::R31).addSImm(GPRSize).addReg(PPC::R31);
-      MBB.insert(MBBI, MI);
+      BuildMI(MBB, MBBI, PPC::LWZ, 2, PPC::R31)
+          .addSImm(GPRSize).addReg(PPC::R31);
+    }
+    
+    // The loaded (or persistent) stack pointer value is offseted by the 'stwu'
+    // on entry to the function.  Add this offset back now.
+    if (NumBytes <= 32768) {
+      BuildMI(MBB, MBBI, PPC::ADDI, 2, PPC::R1)
+          .addReg(PPC::R1).addSImm(NumBytes);
+    } else {
+      BuildMI(MBB, MBBI, PPC::LIS, 1, PPC::R0).addSImm(NumBytes >> 16);
+      BuildMI(MBB, MBBI, PPC::ORI, 2, PPC::R0)
+          .addReg(PPC::R0).addImm(NumBytes & 0xFFFF);
+      BuildMI(MBB, MBBI, PPC::ADD4, 2, PPC::R1)
+        .addReg(PPC::R0).addReg(PPC::R1);
     }
-    MI = BuildMI(PPC::LWZ, 2, PPC::R1).addSImm(0).addReg(PPC::R1);
-    MBB.insert(MBBI, MI);
   }
 }
 





From lattner at cs.uiuc.edu  Wed Jan 11 17:08:10 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed, 11 Jan 2006 17:08:10 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp 
Message-ID: <200601112308.RAA20401@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/PowerPC:

PPCRegisterInfo.cpp updated: 1.40 -> 1.41
---
Log message:

Use the auto-insert BuildMI constructor to avoid an explicit insert.  No
functionality change, just code cleanup.


---
Diffs of the changes:  (+20 -28)

 PPCRegisterInfo.cpp |   48 ++++++++++++++++++++----------------------------
 1 files changed, 20 insertions(+), 28 deletions(-)


Index: llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
diff -u llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.40 llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.41
--- llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.40	Wed Jan 11 17:03:54 2006
+++ llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp	Wed Jan 11 17:07:57 2006
@@ -215,12 +215,10 @@
 
       // Replace the pseudo instruction with a new instruction...
       if (Old->getOpcode() == PPC::ADJCALLSTACKDOWN) {
-        MBB.insert(I, BuildMI(PPC::ADDI, 2, PPC::R1).addReg(PPC::R1)
-                .addSImm(-Amount));
+        BuildMI(MBB, I, PPC::ADDI, 2, PPC::R1).addReg(PPC::R1).addSImm(-Amount);
       } else {
         assert(Old->getOpcode() == PPC::ADJCALLSTACKUP);
-        MBB.insert(I, BuildMI(PPC::ADDI, 2, PPC::R1).addReg(PPC::R1)
-                .addSImm(Amount));
+        BuildMI(MBB, I, PPC::ADDI, 2, PPC::R1).addReg(PPC::R1).addSImm(Amount);
       }
     }
   }
@@ -259,9 +257,9 @@
   if (Offset > 32767 || Offset < -32768) {
     // Insert a set of r0 with the full offset value before the ld, st, or add
     MachineBasicBlock *MBB = MI.getParent();
-    MBB->insert(II, BuildMI(PPC::LIS, 1, PPC::R0).addSImm(Offset >> 16));
-    MBB->insert(II, BuildMI(PPC::ORI, 2, PPC::R0).addReg(PPC::R0)
-      .addImm(Offset));
+    BuildMI(*MBB, II, PPC::LIS, 1, PPC::R0).addSImm(Offset >> 16);
+    BuildMI(*MBB, II, PPC::ORI, 2, PPC::R0).addReg(PPC::R0).addImm(Offset);
+    
     // convert into indexed form of the instruction
     // sth 0:rA, 1:imm 2:(rB) ==> sthx 0:rA, 2:rB, 1:r0
     // addi 0:rA 1:rB, 2, imm ==> add 0:rA, 1:rB, 2:r0
@@ -291,7 +289,6 @@
   MachineBasicBlock &MBB = MF.front();   // Prolog goes in entry BB
   MachineBasicBlock::iterator MBBI = MBB.begin();
   MachineFrameInfo *MFI = MF.getFrameInfo();
-  MachineInstr *MI;
 
   // Get the number of bytes to allocate from the FrameInfo
   unsigned NumBytes = MFI->getStackSize();
@@ -331,17 +328,15 @@
 
   // Adjust stack pointer: r1 -= numbytes.
   if (NumBytes <= 32768) {
-    MI=BuildMI(PPC::STWU,3).addReg(PPC::R1).addSImm(-NumBytes).addReg(PPC::R1);
-    MBB.insert(MBBI, MI);
+    BuildMI(MBB, MBBI, PPC::STWU, 3)
+       .addReg(PPC::R1).addSImm(-NumBytes).addReg(PPC::R1);
   } else {
     int NegNumbytes = -NumBytes;
-    MI = BuildMI(PPC::LIS, 1, PPC::R0).addSImm(NegNumbytes >> 16);
-    MBB.insert(MBBI, MI);
-    MI = BuildMI(PPC::ORI, 2, PPC::R0).addReg(PPC::R0)
-      .addImm(NegNumbytes & 0xFFFF);
-    MBB.insert(MBBI, MI);
-    MI = BuildMI(PPC::STWUX, 3).addReg(PPC::R1).addReg(PPC::R1).addReg(PPC::R0);
-    MBB.insert(MBBI, MI);
+    BuildMI(MBB, MBBI, PPC::LIS, 1, PPC::R0).addSImm(NegNumbytes >> 16);
+    BuildMI(MBB, MBBI, PPC::ORI, 2, PPC::R0)
+        .addReg(PPC::R0).addImm(NegNumbytes & 0xFFFF);
+    BuildMI(MBB, MBBI, PPC::STWUX, 3)
+        .addReg(PPC::R1).addReg(PPC::R1).addReg(PPC::R0);
   }
   
   // If there is a preferred stack alignment, align R1 now
@@ -350,21 +345,18 @@
   // instructions.
   if (MaxAlign > TargetAlign) {
     assert(isPowerOf2_32(MaxAlign) && MaxAlign < 32767 && "Invalid alignment!");
-    MI = BuildMI(PPC::RLWINM, 4, PPC::R0).addReg(PPC::R1).addImm(0)
-      .addImm(32-Log2_32(MaxAlign)).addImm(31);
-    MBB.insert(MBBI, MI);
-    MI = BuildMI(PPC::SUBFIC, 2, PPC::R0).addReg(PPC::R0).addImm(MaxAlign);
-    MBB.insert(MBBI, MI);
-    MI = BuildMI(PPC::STWUX, 3).addReg(PPC::R1).addReg(PPC::R1).addReg(PPC::R0);
-    MBB.insert(MBBI, MI);
+    BuildMI(MBB, MBBI, PPC::RLWINM, 4, PPC::R0)
+      .addReg(PPC::R1).addImm(0).addImm(32-Log2_32(MaxAlign)).addImm(31);
+    BuildMI(MBB, MBBI, PPC::SUBFIC, 2,PPC::R0).addReg(PPC::R0).addImm(MaxAlign);
+    BuildMI(MBB, MBBI, PPC::STWUX, 3)
+      .addReg(PPC::R1).addReg(PPC::R1).addReg(PPC::R0);
   }
   
   // If there is a frame pointer, copy R1 (SP) into R31 (FP)
   if (hasFP(MF)) {
-    MI = BuildMI(PPC::STW, 3).addReg(PPC::R31).addSImm(GPRSize).addReg(PPC::R1);
-    MBB.insert(MBBI, MI);
-    MI = BuildMI(PPC::OR4, 2, PPC::R31).addReg(PPC::R1).addReg(PPC::R1);
-    MBB.insert(MBBI, MI);
+    BuildMI(MBB, MBBI, PPC::STW, 3)
+      .addReg(PPC::R31).addSImm(GPRSize).addReg(PPC::R1);
+    BuildMI(MBB, MBBI, PPC::OR4, 2, PPC::R31).addReg(PPC::R1).addReg(PPC::R1);
   }
 }
 





From lattner at cs.uiuc.edu  Wed Jan 11 17:16:42 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed, 11 Jan 2006 17:16:42 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp 
Message-ID: <200601112316.RAA20498@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/PowerPC:

PPCRegisterInfo.cpp updated: 1.41 -> 1.42
---
Log message:

Fix an off-by-one error that Nate's eagle eyes caught


---
Diffs of the changes:  (+1 -1)

 PPCRegisterInfo.cpp |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
diff -u llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.41 llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.42
--- llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.41	Wed Jan 11 17:07:57 2006
+++ llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp	Wed Jan 11 17:16:29 2006
@@ -380,7 +380,7 @@
     
     // The loaded (or persistent) stack pointer value is offseted by the 'stwu'
     // on entry to the function.  Add this offset back now.
-    if (NumBytes <= 32768) {
+    if (NumBytes < 32768) {
       BuildMI(MBB, MBBI, PPC::ADDI, 2, PPC::R1)
           .addReg(PPC::R1).addSImm(NumBytes);
     } else {





From evan.cheng at apple.com  Wed Jan 11 17:20:17 2006
From: evan.cheng at apple.com (Evan Cheng)
Date: Wed, 11 Jan 2006 17:20:17 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp
	X86InstrInfo.td 
Message-ID: <200601112320.RAA20534@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/X86:

X86ISelLowering.cpp updated: 1.30 -> 1.31
X86InstrInfo.td updated: 1.197 -> 1.198
---
Log message:

Added ROTL and ROTR.


---
Diffs of the changes:  (+64 -30)

 X86ISelLowering.cpp |   14 +++++----
 X86InstrInfo.td     |   80 ++++++++++++++++++++++++++++++++++++----------------
 2 files changed, 64 insertions(+), 30 deletions(-)


Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.30 llvm/lib/Target/X86/X86ISelLowering.cpp:1.31
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.30	Wed Jan 11 16:15:48 2006
+++ llvm/lib/Target/X86/X86ISelLowering.cpp	Wed Jan 11 17:20:05 2006
@@ -107,12 +107,14 @@
   setOperationAction(ISD::CTLZ             , MVT::i32  , Expand);
   setOperationAction(ISD::READCYCLECOUNTER , MVT::i64  , Custom);
 
-  setOperationAction(ISD::ROTL             , MVT::i8   , Expand);
-  setOperationAction(ISD::ROTR             , MVT::i8   , Expand);
-  setOperationAction(ISD::ROTL             , MVT::i16  , Expand);
-  setOperationAction(ISD::ROTR             , MVT::i16  , Expand);
-  setOperationAction(ISD::ROTL             , MVT::i32  , Expand);
-  setOperationAction(ISD::ROTR             , MVT::i32  , Expand);
+  if (!X86DAGIsel) {
+    setOperationAction(ISD::ROTL           , MVT::i8   , Expand);
+    setOperationAction(ISD::ROTR           , MVT::i8   , Expand);
+    setOperationAction(ISD::ROTL           , MVT::i16  , Expand);
+    setOperationAction(ISD::ROTR           , MVT::i16  , Expand);
+    setOperationAction(ISD::ROTL           , MVT::i32  , Expand);
+    setOperationAction(ISD::ROTR           , MVT::i32  , Expand);
+  }
 
   setOperationAction(ISD::READIO           , MVT::i1   , Expand);
   setOperationAction(ISD::READIO           , MVT::i8   , Expand);


Index: llvm/lib/Target/X86/X86InstrInfo.td
diff -u llvm/lib/Target/X86/X86InstrInfo.td:1.197 llvm/lib/Target/X86/X86InstrInfo.td:1.198
--- llvm/lib/Target/X86/X86InstrInfo.td:1.197	Wed Jan 11 16:15:48 2006
+++ llvm/lib/Target/X86/X86InstrInfo.td	Wed Jan 11 17:20:05 2006
@@ -1555,60 +1555,92 @@
 // Rotate instructions
 // FIXME: provide shorter instructions when imm8 == 1
 def ROL8rCL  : I<0xD2, MRM0r, (ops R8 :$dst, R8 :$src),
-                 "rol{b} {%cl, $dst|$dst, %CL}", []>, Imp<[CL],[]>;
+                 "rol{b} {%cl, $dst|$dst, %CL}",
+                 [(set R8:$dst, (rotl R8:$src, CL))]>, Imp<[CL],[]>;
 def ROL16rCL : I<0xD3, MRM0r, (ops R16:$dst, R16:$src),
-                 "rol{w} {%cl, $dst|$dst, %CL}", []>, Imp<[CL],[]>, OpSize;
+                 "rol{w} {%cl, $dst|$dst, %CL}",
+                 [(set R16:$dst, (rotl R16:$src, CL))]>, Imp<[CL],[]>, OpSize;
 def ROL32rCL : I<0xD3, MRM0r, (ops R32:$dst, R32:$src),
-                 "rol{l} {%cl, $dst|$dst, %CL}", []>, Imp<[CL],[]>;
+                 "rol{l} {%cl, $dst|$dst, %CL}",
+                 [(set R32:$dst, (rotl R32:$src, CL))]>, Imp<[CL],[]>;
 
 def ROL8ri   : Ii8<0xC0, MRM0r, (ops R8 :$dst, R8 :$src1, i8imm:$src2),
-                   "rol{b} {$src2, $dst|$dst, $src2}", []>;
+                   "rol{b} {$src2, $dst|$dst, $src2}",
+                   [(set R8:$dst, (rotl R8:$src1, (i8 imm:$src2)))]>;
 def ROL16ri  : Ii8<0xC1, MRM0r, (ops R16:$dst, R16:$src1, i8imm:$src2),
-                   "rol{w} {$src2, $dst|$dst, $src2}", []>, OpSize;
+                   "rol{w} {$src2, $dst|$dst, $src2}",
+                   [(set R16:$dst, (rotl R16:$src1, (i8 imm:$src2)))]>, OpSize;
 def ROL32ri  : Ii8<0xC1, MRM0r, (ops R32:$dst, R32:$src1, i8imm:$src2),
-                   "rol{l} {$src2, $dst|$dst, $src2}", []>;
+                   "rol{l} {$src2, $dst|$dst, $src2}",
+                   [(set R32:$dst, (rotl R32:$src1, (i8 imm:$src2)))]>;
 
 let isTwoAddress = 0 in {
   def ROL8mCL  : I<0xD2, MRM0m, (ops i8mem :$dst),
-                   "rol{b} {%cl, $dst|$dst, %CL}", []>, Imp<[CL],[]>;
+                   "rol{b} {%cl, $dst|$dst, %CL}",
+                   [(store (rotl (loadi8 addr:$dst), CL), addr:$dst)]>,
+                   Imp<[CL],[]>;
   def ROL16mCL : I<0xD3, MRM0m, (ops i16mem:$dst),
-                   "rol{w} {%cl, $dst|$dst, %CL}", []>, Imp<[CL],[]>, OpSize;
+                   "rol{w} {%cl, $dst|$dst, %CL}",
+                   [(store (rotl (loadi16 addr:$dst), CL), addr:$dst)]>,
+                   Imp<[CL],[]>, OpSize;
   def ROL32mCL : I<0xD3, MRM0m, (ops i32mem:$dst),
-                   "rol{l} {%cl, $dst|$dst, %CL}", []>, Imp<[CL],[]>;
+                   "rol{l} {%cl, $dst|$dst, %CL}",
+                   [(store (rotl (loadi32 addr:$dst), CL), addr:$dst)]>,
+                   Imp<[CL],[]>;
   def ROL8mi   : Ii8<0xC0, MRM0m, (ops i8mem :$dst, i8imm:$src),
-                     "rol{b} {$src, $dst|$dst, $src}", []>;
+                     "rol{b} {$src, $dst|$dst, $src}",
+                 [(store (rotl (loadi8 addr:$dst), (i8 imm:$src)), addr:$dst)]>;
   def ROL16mi  : Ii8<0xC1, MRM0m, (ops i16mem:$dst, i8imm:$src),
-                     "rol{w} {$src, $dst|$dst, $src}", []>, OpSize;
+                     "rol{w} {$src, $dst|$dst, $src}",
+                [(store (rotl (loadi16 addr:$dst), (i8 imm:$src)), addr:$dst)]>,
+                     OpSize;
   def ROL32mi  : Ii8<0xC1, MRM0m, (ops i32mem:$dst, i8imm:$src),
-                     "rol{l} {$src, $dst|$dst, $src}", []>;
+                     "rol{l} {$src, $dst|$dst, $src}",
+                [(store (rotl (loadi32 addr:$dst), (i8 imm:$src)), addr:$dst)]>;
 }
 
 def ROR8rCL  : I<0xD2, MRM1r, (ops R8 :$dst, R8 :$src),
-                 "ror{b} {%cl, $dst|$dst, %CL}", []>, Imp<[CL],[]>;
+                 "ror{b} {%cl, $dst|$dst, %CL}",
+                 [(set R8:$dst, (rotr R8:$src, CL))]>, Imp<[CL],[]>;
 def ROR16rCL : I<0xD3, MRM1r, (ops R16:$dst, R16:$src),
-                 "ror{w} {%cl, $dst|$dst, %CL}", []>, Imp<[CL],[]>, OpSize;
+                 "ror{w} {%cl, $dst|$dst, %CL}",
+                 [(set R16:$dst, (rotr R16:$src, CL))]>, Imp<[CL],[]>, OpSize;
 def ROR32rCL : I<0xD3, MRM1r, (ops R32:$dst, R32:$src),
-                 "ror{l} {%cl, $dst|$dst, %CL}", []>, Imp<[CL],[]>;
+                 "ror{l} {%cl, $dst|$dst, %CL}",
+                 [(set R32:$dst, (rotr R32:$src, CL))]>, Imp<[CL],[]>;
 
 def ROR8ri   : Ii8<0xC0, MRM1r, (ops R8 :$dst, R8 :$src1, i8imm:$src2),
-                   "ror{b} {$src2, $dst|$dst, $src2}", []>;
+                   "ror{b} {$src2, $dst|$dst, $src2}",
+                   [(set R8:$dst, (rotr R8:$src1, (i8 imm:$src2)))]>;
 def ROR16ri  : Ii8<0xC1, MRM1r, (ops R16:$dst, R16:$src1, i8imm:$src2),
-                   "ror{w} {$src2, $dst|$dst, $src2}", []>, OpSize;
+                   "ror{w} {$src2, $dst|$dst, $src2}",
+                   [(set R16:$dst, (rotr R16:$src1, (i8 imm:$src2)))]>, OpSize;
 def ROR32ri  : Ii8<0xC1, MRM1r, (ops R32:$dst, R32:$src1, i8imm:$src2),
-                   "ror{l} {$src2, $dst|$dst, $src2}", []>;
+                   "ror{l} {$src2, $dst|$dst, $src2}",
+                   [(set R32:$dst, (rotr R32:$src1, (i8 imm:$src2)))]>;
 let isTwoAddress = 0 in {
   def ROR8mCL  : I<0xD2, MRM1m, (ops i8mem :$dst),
-                   "ror{b} {%cl, $dst|$dst, %CL}", []>, Imp<[CL],[]>;
+                   "ror{b} {%cl, $dst|$dst, %CL}",
+                   [(store (rotr (loadi8 addr:$dst), CL), addr:$dst)]>,
+                   Imp<[CL],[]>;
   def ROR16mCL : I<0xD3, MRM1m, (ops i16mem:$dst),
-                   "ror{w} {%cl, $dst|$dst, %CL}", []>, Imp<[CL],[]>, OpSize;
+                   "ror{w} {%cl, $dst|$dst, %CL}",
+                   [(store (rotr (loadi16 addr:$dst), CL), addr:$dst)]>,
+                   Imp<[CL],[]>, OpSize;
   def ROR32mCL : I<0xD3, MRM1m, (ops i32mem:$dst), 
-                   "ror{l} {%cl, $dst|$dst, %CL}", []>, Imp<[CL],[]>;
+                   "ror{l} {%cl, $dst|$dst, %CL}",
+                   [(store (rotr (loadi32 addr:$dst), CL), addr:$dst)]>,
+                   Imp<[CL],[]>;
   def ROR8mi   : Ii8<0xC0, MRM1m, (ops i8mem :$dst, i8imm:$src),
-                     "ror{b} {$src, $dst|$dst, $src}", []>;
+                     "ror{b} {$src, $dst|$dst, $src}",
+                 [(store (rotr (loadi8 addr:$dst), (i8 imm:$src)), addr:$dst)]>;
   def ROR16mi  : Ii8<0xC1, MRM1m, (ops i16mem:$dst, i8imm:$src),
-                     "ror{w} {$src, $dst|$dst, $src}", []>, OpSize;
+                     "ror{w} {$src, $dst|$dst, $src}",
+                [(store (rotr (loadi16 addr:$dst), (i8 imm:$src)), addr:$dst)]>,
+                     OpSize;
   def ROR32mi  : Ii8<0xC1, MRM1m, (ops i32mem:$dst, i8imm:$src),
-                     "ror{l} {$src, $dst|$dst, $src}", []>;
+                     "ror{l} {$src, $dst|$dst, $src}",
+                [(store (rotr (loadi32 addr:$dst), (i8 imm:$src)), addr:$dst)]>;
 }
 
 





From natebegeman at mac.com  Wed Jan 11 17:20:41 2006
From: natebegeman at mac.com (Nate Begeman)
Date: Wed, 11 Jan 2006 17:20:41 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/IA64/IA64ISelPattern.cpp 
Message-ID: <200601112320.RAA20546@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/IA64:

IA64ISelPattern.cpp updated: 1.73 -> 1.74
---
Log message:

Missed a spot.


---
Diffs of the changes:  (+2 -0)

 IA64ISelPattern.cpp |    2 ++
 1 files changed, 2 insertions(+)


Index: llvm/lib/Target/IA64/IA64ISelPattern.cpp
diff -u llvm/lib/Target/IA64/IA64ISelPattern.cpp:1.73 llvm/lib/Target/IA64/IA64ISelPattern.cpp:1.74
--- llvm/lib/Target/IA64/IA64ISelPattern.cpp:1.73	Wed Jan  4 19:47:43 2006
+++ llvm/lib/Target/IA64/IA64ISelPattern.cpp	Wed Jan 11 17:20:28 2006
@@ -96,6 +96,8 @@
       //IA64 has these, but they are not implemented
       setOperationAction(ISD::CTTZ , MVT::i64  , Expand);
       setOperationAction(ISD::CTLZ , MVT::i64  , Expand);
+      setOperationAction(ISD::ROTL , MVT::i64  , Expand);
+      setOperationAction(ISD::ROTR , MVT::i64  , Expand);
       // FIXME: implement mulhs (xma.h) and mulhu (xma.hu)
       setOperationAction(ISD::MULHS , MVT::i64  , Expand);
       setOperationAction(ISD::MULHU , MVT::i64  , Expand);





From lattner at cs.uiuc.edu  Wed Jan 11 19:29:08 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed, 11 Jan 2006 19:29:08 -0600
Subject: [llvm-commits] 
	CVS: llvm/lib/Target/SparcV8/SparcV8TargetMachine.cpp
Message-ID: <200601120129.TAA21384@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/SparcV8:

SparcV8TargetMachine.cpp updated: 1.34 -> 1.35
---
Log message:

invert the sense of this switch and its name


---
Diffs of the changes:  (+4 -4)

 SparcV8TargetMachine.cpp |    8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)


Index: llvm/lib/Target/SparcV8/SparcV8TargetMachine.cpp
diff -u llvm/lib/Target/SparcV8/SparcV8TargetMachine.cpp:1.34 llvm/lib/Target/SparcV8/SparcV8TargetMachine.cpp:1.35
--- llvm/lib/Target/SparcV8/SparcV8TargetMachine.cpp:1.34	Tue Dec 20 02:00:11 2005
+++ llvm/lib/Target/SparcV8/SparcV8TargetMachine.cpp	Wed Jan 11 19:28:56 2006
@@ -28,9 +28,9 @@
   // Register the target.
   RegisterTarget<SparcV8TargetMachine> X("sparcv8","  SPARC V8 (experimental)");
 
-  cl::opt<bool> DisableV8DAGDAG("disable-v8-dag-isel", cl::Hidden,
-                                cl::desc("Disable DAG-to-DAG isel for V8"),
-                                cl::init(1));
+  cl::opt<bool> EnableV8DAGDAG("enable-v8-dag-isel", cl::Hidden,
+                                cl::desc("Enable DAG-to-DAG isel for V8"),
+                                cl::init(0));
 }
 
 /// SparcV8TargetMachine ctor - Create an ILP32 architecture model
@@ -86,7 +86,7 @@
   if (PrintMachineCode)
     PM.add(new PrintFunctionPass());
 
-  if (DisableV8DAGDAG) {
+  if (!EnableV8DAGDAG) {
     // Replace malloc and free instructions with library calls.
     PM.add(createLowerAllocationsPass());
     PM.add(createLowerSelectPass());





From lattner at cs.uiuc.edu  Wed Jan 11 19:33:20 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed, 11 Jan 2006 19:33:20 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/IA64/IA64ISelLowering.cpp 
Message-ID: <200601120133.TAA21429@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/IA64:

IA64ISelLowering.cpp updated: 1.16 -> 1.17
---
Log message:

Fix an itanium call lowering bug for duraid


---
Diffs of the changes:  (+6 -6)

 IA64ISelLowering.cpp |   12 ++++++------
 1 files changed, 6 insertions(+), 6 deletions(-)


Index: llvm/lib/Target/IA64/IA64ISelLowering.cpp
diff -u llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.16 llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.17
--- llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.16	Wed Jan 11 15:21:00 2006
+++ llvm/lib/Target/IA64/IA64ISelLowering.cpp	Wed Jan 11 19:33:08 2006
@@ -376,14 +376,14 @@
   
   // save the current GP, SP and RP : FIXME: do we need to do all 3 always?
   SDOperand GPBeforeCall = DAG.getCopyFromReg(Chain, IA64::r1, MVT::i64, InFlag);
-  Chain = GPBeforeCall;
-  InFlag = Chain.getValue(1);
+  Chain = GPBeforeCall.getValue(1);
+  InFlag = Chain.getValue(2);
   SDOperand SPBeforeCall = DAG.getCopyFromReg(Chain, IA64::r12, MVT::i64, InFlag);
-  Chain = SPBeforeCall;
-  InFlag = Chain.getValue(1);
+  Chain = SPBeforeCall.getValue(1);
+  InFlag = Chain.getValue(2);
   SDOperand RPBeforeCall = DAG.getCopyFromReg(Chain, IA64::rp, MVT::i64, InFlag);
-  Chain = RPBeforeCall;
-  InFlag = Chain.getValue(1);
+  Chain = RPBeforeCall.getValue(1);
+  InFlag = Chain.getValue(2);
 
   // Build a sequence of copy-to-reg nodes chained together with token chain
   // and flag operands which copy the outgoing integer args into regs out[0-7]





From lattner at cs.uiuc.edu  Wed Jan 11 19:46:20 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed, 11 Jan 2006 19:46:20 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPC.h
	PPCTargetMachine.cpp PPCISelPattern.cpp 
Message-ID: <200601120146.TAA21561@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/PowerPC:

PPC.h updated: 1.24 -> 1.25
PPCTargetMachine.cpp updated: 1.78 -> 1.79
PPCISelPattern.cpp (r1.194) removed
---
Log message:

Goodbye PPC pattern isel.  You have served us well, but it is now time for
you to ride off into the sunset.


---
Diffs of the changes:  (+2 -12)

 PPC.h                |    1 -
 PPCTargetMachine.cpp |   13 ++-----------
 2 files changed, 2 insertions(+), 12 deletions(-)


Index: llvm/lib/Target/PowerPC/PPC.h
diff -u llvm/lib/Target/PowerPC/PPC.h:1.24 llvm/lib/Target/PowerPC/PPC.h:1.25
--- llvm/lib/Target/PowerPC/PPC.h:1.24	Thu Nov 17 12:55:48 2005
+++ llvm/lib/Target/PowerPC/PPC.h	Wed Jan 11 19:46:07 2006
@@ -27,7 +27,6 @@
 };
 
 FunctionPass *createPPCBranchSelectionPass();
-FunctionPass *createPPCISelPattern(TargetMachine &TM);
 FunctionPass *createPPCISelDag(TargetMachine &TM);
 FunctionPass *createDarwinAsmPrinter(std::ostream &OS, TargetMachine &TM);
 FunctionPass *createAIXAsmPrinter(std::ostream &OS, TargetMachine &TM);


Index: llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
diff -u llvm/lib/Target/PowerPC/PPCTargetMachine.cpp:1.78 llvm/lib/Target/PowerPC/PPCTargetMachine.cpp:1.79
--- llvm/lib/Target/PowerPC/PPCTargetMachine.cpp:1.78	Wed Jan  4 07:52:30 2006
+++ llvm/lib/Target/PowerPC/PPCTargetMachine.cpp	Wed Jan 11 19:46:07 2006
@@ -29,9 +29,6 @@
 using namespace llvm;
 
 namespace {
-  static cl::opt<bool> DisablePPCDAGDAG("disable-ppc-dag-isel", cl::Hidden,
-                             cl::desc("Disable DAG-to-DAG isel for PPC"));
-  
   // Register the targets
   RegisterTarget<PPCTargetMachine>
   X("ppc32", "  PowerPC");
@@ -100,10 +97,7 @@
   PM.add(createUnreachableBlockEliminationPass());
 
   // Install an instruction selector.
-  if (!DisablePPCDAGDAG)
-    PM.add(createPPCISelDag(*this));
-  else
-    PM.add(createPPCISelPattern(*this));
+  PM.add(createPPCISelDag(*this));
 
   if (PrintMachineCode)
     PM.add(createMachineFunctionPrinterPass(&std::cerr));
@@ -157,10 +151,7 @@
   PM.add(createUnreachableBlockEliminationPass());
 
   // Install an instruction selector.
-  if (!DisablePPCDAGDAG)
-    PM.add(createPPCISelDag(TM));
-  else
-    PM.add(createPPCISelPattern(TM));
+  PM.add(createPPCISelDag(TM));
 
   PM.add(createRegisterAllocator());
   PM.add(createPrologEpilogCodeInserter());





From lattner at cs.uiuc.edu  Wed Jan 11 19:54:28 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed, 11 Jan 2006 19:54:28 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp 
Message-ID: <200601120154.TAA21689@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/PowerPC:

PPCISelDAGToDAG.cpp updated: 1.148 -> 1.149
---
Log message:

remove dead code


---
Diffs of the changes:  (+2 -25)

 PPCISelDAGToDAG.cpp |   27 ++-------------------------
 1 files changed, 2 insertions(+), 25 deletions(-)


Index: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.148 llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.149
--- llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.148	Thu Jan  5 12:32:49 2006
+++ llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp	Wed Jan 11 19:54:15 2006
@@ -189,14 +189,6 @@
   return false;
 }
 
-// isOprShiftImm - Returns true if the specified operand is a shift opcode with
-// a immediate shift count less than 32.
-static bool isOprShiftImm(SDNode *N, unsigned& Opc, unsigned& SH) {
-  Opc = N->getOpcode();
-  return (Opc == ISD::SHL || Opc == ISD::SRL || Opc == ISD::SRA) &&
-    isIntImmediate(N->getOperand(1).Val, SH) && SH < 32;
-}
-
 // isRunOfOnes - Returns true iff Val consists of one contiguous run of 1s with
 // any number of 0s on either side.  The 1s are allowed to wrap from LSB to
 // MSB, so 0x000FFF0, 0x0000FFFF, and 0xFF0000FF are all runs.  0x0F0F0000 is
@@ -270,21 +262,6 @@
   return N->getOpcode() == Opc && isIntImmediate(N->getOperand(1).Val, Imm);
 }
 
-// isOprNot - Returns true if the specified operand is an xor with immediate -1.
-static bool isOprNot(SDNode *N) {
-  unsigned Imm;
-  return isOpcWithIntImmediate(N, ISD::XOR, Imm) && (signed)Imm == -1;
-}
-
-// Immediate constant composers.
-// Lo16 - grabs the lo 16 bits from a 32 bit constant.
-// Hi16 - grabs the hi 16 bits from a 32 bit constant.
-// HA16 - computes the hi bits required if the lo bits are add/subtracted in
-// arithmethically.
-static unsigned Lo16(unsigned x)  { return x & 0x0000FFFF; }
-static unsigned Hi16(unsigned x)  { return Lo16(x >> 16); }
-static unsigned HA16(unsigned x)  { return Hi16((signed)x - (signed short)x); }
-
 // isIntImmediate - This method tests to see if a constant operand.
 // If so Imm will receive the 32 bit value.
 static bool isIntImmediate(SDOperand N, unsigned& Imm) {
@@ -410,7 +387,7 @@
   if (N.getOpcode() == ISD::ADD) {
     unsigned imm = 0;
     if (isIntImmediate(N.getOperand(1), imm) && isInt16(imm)) {
-      Disp = getI32Imm(Lo16(imm));
+      Disp = getI32Imm(imm & 0xFFFF);
       if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(N.getOperand(0))) {
         Base = CurDAG->getTargetFrameIndex(FI->getIndex(), MVT::i32);
       } else {
@@ -488,7 +465,7 @@
     if (isIntImmediate(RHS, Imm) && 
         ((U && isUInt16(Imm)) || (!U && isInt16(Imm))))
       return CurDAG->getTargetNode(U ? PPC::CMPLWI : PPC::CMPWI, MVT::i32,
-                                   LHS, getI32Imm(Lo16(Imm)));
+                                   LHS, getI32Imm(Imm & 0xFFFF));
     return CurDAG->getTargetNode(U ? PPC::CMPLW : PPC::CMPW, MVT::i32,
                                  LHS, Select(RHS));
   } else if (LHS.getValueType() == MVT::f32) {





From lattner at cs.uiuc.edu  Wed Jan 11 20:01:57 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed, 11 Jan 2006 20:01:57 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp 
Message-ID: <200601120201.UAA21852@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/PowerPC:

PPCISelDAGToDAG.cpp updated: 1.149 -> 1.150
---
Log message:

these cases are autogenerated


---
Diffs of the changes:  (+0 -28)

 PPCISelDAGToDAG.cpp |   28 ----------------------------
 1 files changed, 28 deletions(-)


Index: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.149 llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.150
--- llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.149	Wed Jan 11 19:54:15 2006
+++ llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp	Wed Jan 11 20:01:45 2006
@@ -973,34 +973,6 @@
     // Other cases are autogenerated.
     break;
   }
-  case ISD::FNEG: {
-    SDOperand Val = Select(N->getOperand(0));
-    MVT::ValueType Ty = N->getValueType(0);
-    if (N->getOperand(0).Val->hasOneUse()) {
-      unsigned Opc;
-      switch (Val.isTargetOpcode() ? Val.getTargetOpcode() : 0) {
-      default:          Opc = 0;            break;
-      case PPC::FABSS:  Opc = PPC::FNABSS;  break;
-      case PPC::FABSD:  Opc = PPC::FNABSD;  break;
-      case PPC::FMADD:  Opc = PPC::FNMADD;  break;
-      case PPC::FMADDS: Opc = PPC::FNMADDS; break;
-      case PPC::FMSUB:  Opc = PPC::FNMSUB;  break;
-      case PPC::FMSUBS: Opc = PPC::FNMSUBS; break;
-      }
-      // If we inverted the opcode, then emit the new instruction with the
-      // inverted opcode and the original instruction's operands.  Otherwise, 
-      // fall through and generate a fneg instruction.
-      if (Opc) {
-        if (Opc == PPC::FNABSS || Opc == PPC::FNABSD)
-          return CurDAG->SelectNodeTo(N, Opc, Ty, Val.getOperand(0));
-        else
-          return CurDAG->SelectNodeTo(N, Opc, Ty, Val.getOperand(0),
-                                      Val.getOperand(1), Val.getOperand(2));
-      }
-    }
-    // Other cases are autogenerated.
-    break;
-  }
   case ISD::SELECT_CC: {
     ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(4))->get();
     





From lattner at cs.uiuc.edu  Wed Jan 11 20:05:49 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed, 11 Jan 2006 20:05:49 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCInstrInfo.td 
Message-ID: <200601120205.UAA21937@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/PowerPC:

PPCInstrInfo.td updated: 1.173 -> 1.174
---
Log message:

ahem :)


---
Diffs of the changes:  (+1 -1)

 PPCInstrInfo.td |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td
diff -u llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.173 llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.174
--- llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.173	Wed Jan 11 15:21:00 2006
+++ llvm/lib/Target/PowerPC/PPCInstrInfo.td	Wed Jan 11 20:05:36 2006
@@ -181,7 +181,7 @@
   let MIOperandInfo = (ops GPRC, GPRC);
 }
 
-// Define X86 specific addressing mode.
+// Define PowerPC specific addressing mode.
 def iaddr  : ComplexPattern<i32, 2, "SelectAddrImm",    []>;
 def xaddr  : ComplexPattern<i32, 2, "SelectAddrIdx",    []>;
 def xoaddr : ComplexPattern<i32, 2, "SelectAddrIdxOnly",[]>;





From duraid at octopus.com.au  Wed Jan 11 20:50:46 2006
From: duraid at octopus.com.au (Duraid Madina)
Date: Wed, 11 Jan 2006 20:50:46 -0600
Subject: [llvm-commits] CVS: llvm/test/Regression/CodeGen/SparcV8/xnor.ll 
Message-ID: <200601120250.UAA22249@zion.cs.uiuc.edu>



Changes in directory llvm/test/Regression/CodeGen/SparcV8:

xnor.ll updated: 1.1 -> 1.2
---
Log message:

verily, sabre did leave

and yea! Saem said "ARRR."

meanwhile, the pinksias and the campfires and the ET forests glowed.



---
Diffs of the changes:  (+2 -2)

 xnor.ll |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)


Index: llvm/test/Regression/CodeGen/SparcV8/xnor.ll
diff -u llvm/test/Regression/CodeGen/SparcV8/xnor.ll:1.1 llvm/test/Regression/CodeGen/SparcV8/xnor.ll:1.2
--- llvm/test/Regression/CodeGen/SparcV8/xnor.ll:1.1	Wed Jan 11 01:13:22 2006
+++ llvm/test/Regression/CodeGen/SparcV8/xnor.ll	Wed Jan 11 20:50:34 2006
@@ -1,5 +1,5 @@
-; RUN: llvm-as < %s | llc -march=sparcv8 -disable-v8-dag-isel=false &&
-; RUN: llvm-as < %s | llc -march=sparcv8 -disable-v8-dag-isel=false | grep xnor | wc -l | grep 2
+; RUN: llvm-as < %s | llc -march=sparcv8 -enable-v8-dag-isel=true &&
+; RUN: llvm-as < %s | llc -march=sparcv8 -enable-v8-dag-isel=true | grep xnor | wc -l | grep 2
 
 int %test1(int %X, int %Y) {
 	%A = xor int %X, %Y





From duraid at octopus.com.au  Wed Jan 11 21:28:52 2006
From: duraid at octopus.com.au (Duraid Madina)
Date: Wed, 11 Jan 2006 21:28:52 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/IA64/IA64ISelLowering.cpp 
Message-ID: <200601120328.VAA22436@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/IA64:

IA64ISelLowering.cpp updated: 1.17 -> 1.18
---
Log message:

sabre's (correct) fix means these guys need to be flagged as well (else
the scheduler will complain)



---
Diffs of the changes:  (+7 -2)

 IA64ISelLowering.cpp |    9 +++++++--
 1 files changed, 7 insertions(+), 2 deletions(-)


Index: llvm/lib/Target/IA64/IA64ISelLowering.cpp
diff -u llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.17 llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.18
--- llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.17	Wed Jan 11 19:33:08 2006
+++ llvm/lib/Target/IA64/IA64ISelLowering.cpp	Wed Jan 11 21:28:40 2006
@@ -392,11 +392,12 @@
   // know this is required (i.e. for varardic or external (unknown) functions)
 
   // first to the FP->(integer representation) conversions, these are
-  // free-floating
+  // flagged for now, but shouldn't have to be (TODO)
   unsigned seenConverts = 0;
   for (unsigned i = 0, e = RegValuesToPass.size(); i != e; ++i) {
     if(MVT::isFloatingPoint(RegValuesToPass[i].getValueType())) {
-      Chain = DAG.getCopyToReg(Chain, IntArgRegs[i], Converts[seenConverts++]);
+      Chain = DAG.getCopyToReg(Chain, IntArgRegs[i], Converts[seenConverts++], InFlag);
+      InFlag = Chain.getValue(1);
     }
   }
 
@@ -428,6 +429,8 @@
   // emit the call itself
   if (InFlag.Val)
     CallOperands.push_back(InFlag);
+  else
+    assert(0 && "this should never happen!\n");
 
 /* out with the old...
     Chain = SDOperand(DAG.getCall(NodeTys, Chain, Callee, InFlag), 0);
@@ -480,10 +483,12 @@
     case MVT::i64:
       RetVal = DAG.getCopyFromReg(Chain, IA64::r8, MVT::i64, InFlag);
       Chain = RetVal.getValue(1);
+      InFlag = RetVal.getValue(2); // XXX dead
       break;
     case MVT::f64:
       RetVal = DAG.getCopyFromReg(Chain, IA64::F8, MVT::f64, InFlag);
       Chain = RetVal.getValue(1);
+      InFlag = RetVal.getValue(2); // XXX dead
       break;
     }
   }





From lattner at cs.uiuc.edu  Thu Jan 12 00:18:11 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu, 12 Jan 2006 00:18:11 -0600
Subject: [llvm-commits] CVS: llvm/lib/VMCore/Verifier.cpp 
Message-ID: <200601120618.AAA23243@zion.cs.uiuc.edu>



Changes in directory llvm/lib/VMCore:

Verifier.cpp updated: 1.137 -> 1.138
---
Log message:

Convert the verifier over to use ETForest instead of DominatorSet.  Patch
by Daniel Berlin


---
Diffs of the changes:  (+14 -14)

 Verifier.cpp |   28 ++++++++++++++--------------
 1 files changed, 14 insertions(+), 14 deletions(-)


Index: llvm/lib/VMCore/Verifier.cpp
diff -u llvm/lib/VMCore/Verifier.cpp:1.137 llvm/lib/VMCore/Verifier.cpp:1.138
--- llvm/lib/VMCore/Verifier.cpp:1.137	Tue Jan 10 13:05:24 2006
+++ llvm/lib/VMCore/Verifier.cpp	Thu Jan 12 00:17:59 2006
@@ -68,7 +68,7 @@
     VerifierFailureAction action;
                           // What to do if verification fails.
     Module *Mod;          // Module we are verifying right now
-    DominatorSet *DS;     // Dominator set, caution can be null!
+    ETForest *EF;     // ET-Forest, caution can be null!
     std::stringstream msgs;  // A stringstream to collect messages
 
     /// InstInThisBlock - when verifying a basic block, keep track of all of the
@@ -79,17 +79,17 @@
 
     Verifier()
         : Broken(false), RealPass(true), action(AbortProcessAction),
-          DS(0), msgs( std::ios::app | std::ios::out ) {}
+          EF(0), msgs( std::ios::app | std::ios::out ) {}
     Verifier( VerifierFailureAction ctn )
-        : Broken(false), RealPass(true), action(ctn), DS(0),
+        : Broken(false), RealPass(true), action(ctn), EF(0),
           msgs( std::ios::app | std::ios::out ) {}
     Verifier(bool AB )
         : Broken(false), RealPass(true),
-          action( AB ? AbortProcessAction : PrintMessageAction), DS(0),
+          action( AB ? AbortProcessAction : PrintMessageAction), EF(0),
           msgs( std::ios::app | std::ios::out ) {}
-    Verifier(DominatorSet &ds)
+    Verifier(ETForest &ef)
       : Broken(false), RealPass(false), action(PrintMessageAction),
-        DS(&ds), msgs( std::ios::app | std::ios::out ) {}
+        EF(&ef), msgs( std::ios::app | std::ios::out ) {}
 
 
     bool doInitialization(Module &M) {
@@ -106,7 +106,7 @@
 
     bool runOnFunction(Function &F) {
       // Get dominator information if we are being run by PassManager
-      if (RealPass) DS = &getAnalysis<DominatorSet>();
+      if (RealPass) EF = &getAnalysis<ETForest>();
       visit(F);
       InstsInThisBlock.clear();
 
@@ -139,7 +139,7 @@
     virtual void getAnalysisUsage(AnalysisUsage &AU) const {
       AU.setPreservesAll();
       if (RealPass)
-        AU.addRequired<DominatorSet>();
+	AU.addRequired<ETForest>();
     }
 
     /// abortIfBroken - If the module is broken and we are supposed to abort on
@@ -582,7 +582,7 @@
     for (Value::use_iterator UI = I.use_begin(), UE = I.use_end();
          UI != UE; ++UI)
       Assert1(*UI != (User*)&I ||
-              !DS->dominates(&BB->getParent()->getEntryBlock(), BB),
+              !EF->dominates(&BB->getParent()->getEntryBlock(), BB),
               "Only PHI nodes may reference their own value!", &I);
   }
 
@@ -633,20 +633,20 @@
           // If they are in the same basic block, make sure that the definition
           // comes before the use.
           Assert2(InstsInThisBlock.count(Op) ||
-                  !DS->dominates(&BB->getParent()->getEntryBlock(), BB),
+                  !EF->dominates(&BB->getParent()->getEntryBlock(), BB),
                   "Instruction does not dominate all uses!", Op, &I);
         }
 
         // Definition must dominate use unless use is unreachable!
-        Assert2(DS->dominates(OpBlock, BB) ||
-                !DS->dominates(&BB->getParent()->getEntryBlock(), BB),
+        Assert2(EF->dominates(OpBlock, BB) ||
+                !EF->dominates(&BB->getParent()->getEntryBlock(), BB),
                 "Instruction does not dominate all uses!", Op, &I);
       } else {
         // PHI nodes are more difficult than other nodes because they actually
         // "use" the value in the predecessor basic blocks they correspond to.
         BasicBlock *PredBB = cast<BasicBlock>(I.getOperand(i+1));
-        Assert2(DS->dominates(OpBlock, PredBB) ||
-                !DS->dominates(&BB->getParent()->getEntryBlock(), PredBB),
+        Assert2(EF->dominates(OpBlock, PredBB) ||
+                !EF->dominates(&BB->getParent()->getEntryBlock(), PredBB),
                 "Instruction does not dominate all uses!", Op, &I);
       }
     }





From lattner at cs.uiuc.edu  Thu Jan 12 01:31:28 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu, 12 Jan 2006 01:31:28 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
Message-ID: <200601120731.BAA23849@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/SparcV8:

SparcV8ISelDAGToDAG.cpp updated: 1.45 -> 1.46
---
Log message:

Give V8ISD nodes symbolic names in dumps


---
Diffs of the changes:  (+18 -0)

 SparcV8ISelDAGToDAG.cpp |   18 ++++++++++++++++++
 1 files changed, 18 insertions(+)


Index: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
diff -u llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.45 llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.46
--- llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.45	Wed Jan 11 15:21:00 2006
+++ llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp	Thu Jan 12 01:31:15 2006
@@ -76,6 +76,8 @@
                               SelectionDAG &DAG);
     virtual MachineBasicBlock *InsertAtEndOfBasicBlock(MachineInstr *MI,
                                                        MachineBasicBlock *MBB);
+    
+    virtual const char *getTargetNodeName(unsigned Opcode) const;
   };
 }
 
@@ -161,6 +163,22 @@
   computeRegisterProperties();
 }
 
+const char *SparcV8TargetLowering::getTargetNodeName(unsigned Opcode) const {
+  switch (Opcode) {
+  case V8ISD::CMPICC:     return "V8ISD::CMPICC";
+  case V8ISD::CMPFCC:     return "V8ISD::CMPFCC";
+  case V8ISD::BRICC:      return "V8ISD::BRICC";
+  case V8ISD::BRFCC:      return "V8ISD::BRFCC";
+  case V8ISD::Hi:         return "V8ISD::Hi";
+  case V8ISD::Lo:         return "V8ISD::Lo";
+  case V8ISD::FTOI:       return "V8ISD::FTOI";
+  case V8ISD::ITOF:       return "V8ISD::ITOF";
+  case V8ISD::SELECT_ICC: return "V8ISD::SELECT_ICC";
+  case V8ISD::SELECT_FCC: return "V8ISD::SELECT_FCC";
+  case V8ISD::RET_FLAG:   return "V8ISD::RET_FLAG";
+  }
+}
+
 /// LowerArguments - V8 uses a very simple ABI, where all values are passed in
 /// either one or two GPRs, including FP values.  TODO: we should pass FP values
 /// in FP registers for fastcc functions.





From lattner at cs.uiuc.edu  Thu Jan 12 01:38:17 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu, 12 Jan 2006 01:38:17 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
Message-ID: <200601120738.BAA23923@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/SparcV8:

SparcV8ISelDAGToDAG.cpp updated: 1.46 -> 1.47
---
Log message:

fix a bug in my previous checkin


---
Diffs of the changes:  (+3 -2)

 SparcV8ISelDAGToDAG.cpp |    5 +++--
 1 files changed, 3 insertions(+), 2 deletions(-)


Index: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
diff -u llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.46 llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.47
--- llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.46	Thu Jan 12 01:31:15 2006
+++ llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp	Thu Jan 12 01:38:04 2006
@@ -165,6 +165,7 @@
 
 const char *SparcV8TargetLowering::getTargetNodeName(unsigned Opcode) const {
   switch (Opcode) {
+  default: return 0;
   case V8ISD::CMPICC:     return "V8ISD::CMPICC";
   case V8ISD::CMPFCC:     return "V8ISD::CMPFCC";
   case V8ISD::BRICC:      return "V8ISD::BRICC";
@@ -661,7 +662,7 @@
       std::vector<SDOperand> Ops;
       Ops.push_back(LHS);
       Ops.push_back(RHS);
-      SDOperand Cond = DAG.getNode(V8ISD::CMPICC, VTs, Ops);
+      SDOperand Cond = DAG.getNode(V8ISD::CMPICC, VTs, Ops).getValue(1);
       return DAG.getNode(V8ISD::BRICC, MVT::Other, Chain, Dest, CC, Cond);
     } else {
       std::vector<MVT::ValueType> VTs;
@@ -670,7 +671,7 @@
       std::vector<SDOperand> Ops;
       Ops.push_back(LHS);
       Ops.push_back(RHS);
-      SDOperand Cond = DAG.getNode(V8ISD::CMPFCC, VTs, Ops);
+      SDOperand Cond = DAG.getNode(V8ISD::CMPFCC, VTs, Ops).getValue(1);
       return DAG.getNode(V8ISD::BRFCC, MVT::Other, Chain, Dest, CC, Cond);
     }
   }





From evan.cheng at apple.com  Thu Jan 12 01:55:09 2006
From: evan.cheng at apple.com (Evan Cheng)
Date: Thu, 12 Jan 2006 01:55:09 -0600
Subject: [llvm-commits] CVS: llvm/utils/TableGen/DAGISelEmitter.cpp 
Message-ID: <200601120755.BAA23994@zion.cs.uiuc.edu>



Changes in directory llvm/utils/TableGen:

DAGISelEmitter.cpp updated: 1.131 -> 1.132
---
Log message:

GlobalAddress -> TargetGlobalAddress; ExternalSymbol -> TargetExternalSymbol


---
Diffs of the changes:  (+14 -2)

 DAGISelEmitter.cpp |   16 ++++++++++++++--
 1 files changed, 14 insertions(+), 2 deletions(-)


Index: llvm/utils/TableGen/DAGISelEmitter.cpp
diff -u llvm/utils/TableGen/DAGISelEmitter.cpp:1.131 llvm/utils/TableGen/DAGISelEmitter.cpp:1.132
--- llvm/utils/TableGen/DAGISelEmitter.cpp:1.131	Wed Jan 11 16:16:13 2006
+++ llvm/utils/TableGen/DAGISelEmitter.cpp	Thu Jan 12 01:54:57 2006
@@ -2023,12 +2023,24 @@
         OS << "      SDOperand Tmp" << utostr(ResNo)
            << " = CurDAG->getTargetConstant(Tmp"
            << ResNo << "C, MVT::" << getEnumName(N->getTypeNum(0)) << ");\n";
-      } else if (!N->isLeaf() && N->getOperator()->getName() == "tglobaladdr") {
+      } else if (!N->isLeaf() && N->getOperator()->getName() == "globaladdr") {
+        OS << "      SDOperand Tmp" << ResNo
+           << " = CurDAG->getTargetGlobalAddress(cast<GlobalAddressSDNode>("
+           << Val << ")->getGlobal(), MVT::" << getEnumName(N->getTypeNum(0))
+           << ");\n";
+      } else if (!N->isLeaf() && N->getOperator()->getName() == "externalsym") {
+        OS << "      SDOperand Tmp" << ResNo
+           << " = CurDAG->getTargetExternalSymbol(cast<ExternalSymbolSDNode>("
+           << Val << ")->getSymbol(), MVT::" << getEnumName(N->getTypeNum(0))
+           << ");\n";
+      } else if (!N->isLeaf() && N->getOperator()->getName() == "texternalsym"){
         OS << "      SDOperand Tmp" << ResNo << " = " << Val << ";\n";
-      } else if (!N->isLeaf() && N->getOperator()->getName() == "tconstpool") {
+      } else if (!N->isLeaf() && N->getOperator()->getName() == "tglobaladdr") {
         OS << "      SDOperand Tmp" << ResNo << " = " << Val << ";\n";
       } else if (!N->isLeaf() && N->getOperator()->getName() == "texternalsym"){
         OS << "      SDOperand Tmp" << ResNo << " = " << Val << ";\n";
+      } else if (!N->isLeaf() && N->getOperator()->getName() == "tconstpool") {
+        OS << "      SDOperand Tmp" << ResNo << " = " << Val << ";\n";
       } else if (N->isLeaf() && (CP = NodeGetComplexPattern(N, ISE))) {
         std::string Fn = CP->getSelectFunc();
         NumRes = CP->getNumOperands();





From evan.cheng at apple.com  Thu Jan 12 01:56:59 2006
From: evan.cheng at apple.com (Evan Cheng)
Date: Thu, 12 Jan 2006 01:56:59 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp
	X86InstrInfo.td 
Message-ID: <200601120756.BAA24019@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/X86:

X86ISelLowering.cpp updated: 1.31 -> 1.32
X86InstrInfo.td updated: 1.198 -> 1.199
---
Log message:

* Materialize GlobalAddress and ExternalSym with MOV32ri rather than
  LEA32r.
* Do not lower GlobalAddress to TargetGlobalAddress. Let isel does it.


---
Diffs of the changes:  (+10 -8)

 X86ISelLowering.cpp |   11 +++++------
 X86InstrInfo.td     |    7 +++++--
 2 files changed, 10 insertions(+), 8 deletions(-)


Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.31 llvm/lib/Target/X86/X86ISelLowering.cpp:1.32
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.31	Wed Jan 11 17:20:05 2006
+++ llvm/lib/Target/X86/X86ISelLowering.cpp	Thu Jan 12 01:56:47 2006
@@ -1723,8 +1723,8 @@
                        DAG.getValueType(AVT), InFlag);
   }
   case ISD::GlobalAddress: {
+    SDOperand Result;
     GlobalValue *GV = cast<GlobalAddressSDNode>(Op)->getGlobal();
-    SDOperand GVOp = DAG.getTargetGlobalAddress(GV, getPointerTy());
     // For Darwin, external and weak symbols are indirect, so we want to load
     // the value at address GV, not the value of GV itself.  This means that
     // the GlobalAddress must be in the base or index register of the address,
@@ -1732,11 +1732,10 @@
     if (getTargetMachine().
         getSubtarget<X86Subtarget>().getIndirectExternAndWeakGlobals() &&
         (GV->hasWeakLinkage() || GV->isExternal()))
-      return DAG.getLoad(MVT::i32, DAG.getEntryNode(),
-                         GVOp, DAG.getSrcValue(NULL));
-    else
-      return GVOp;
-    break;
+      Result = DAG.getLoad(MVT::i32, DAG.getEntryNode(),
+                           DAG.getTargetGlobalAddress(GV, getPointerTy()),
+                           DAG.getSrcValue(NULL));
+    return Result;
   }
   }
 }


Index: llvm/lib/Target/X86/X86InstrInfo.td
diff -u llvm/lib/Target/X86/X86InstrInfo.td:1.198 llvm/lib/Target/X86/X86InstrInfo.td:1.199
--- llvm/lib/Target/X86/X86InstrInfo.td:1.198	Wed Jan 11 17:20:05 2006
+++ llvm/lib/Target/X86/X86InstrInfo.td	Thu Jan 12 01:56:47 2006
@@ -153,8 +153,7 @@
 // Define X86 specific addressing mode.
 def addr    : ComplexPattern<i32, 4, "SelectAddr", []>;
 def leaaddr : ComplexPattern<i32, 4, "SelectLEAAddr",
-                             [add, frameindex, constpool,
-                              globaladdr, tglobaladdr, externalsym]>;
+                             [add, frameindex, constpool]>;
 
 //===----------------------------------------------------------------------===//
 // X86 Instruction Format Definitions.
@@ -2958,6 +2957,10 @@
 // Non-Instruction Patterns
 //===----------------------------------------------------------------------===//
 
+// GlobalAddress and ExternalSymbol
+def : Pat<(i32 globaladdr:$dst),  (MOV32ri globaladdr:$dst)>;
+def : Pat<(i32 externalsym:$dst), (MOV32ri externalsym:$dst)>;
+
 // Calls
 def : Pat<(X86call tglobaladdr:$dst),
           (CALLpcrel32 tglobaladdr:$dst)>;





From evan.cheng at apple.com  Thu Jan 12 02:28:12 2006
From: evan.cheng at apple.com (Evan Cheng)
Date: Thu, 12 Jan 2006 02:28:12 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp
	X86InstrInfo.td 
Message-ID: <200601120828.CAA32246@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/X86:

X86ISelLowering.cpp updated: 1.32 -> 1.33
X86InstrInfo.td updated: 1.199 -> 1.200
---
Log message:

X86ISD::SETCC (e.g. SETEr) produces a flag (so multiple SETCC can be
linked together).


---
Diffs of the changes:  (+4 -3)

 X86ISelLowering.cpp |    4 ++--
 X86InstrInfo.td     |    3 ++-
 2 files changed, 4 insertions(+), 3 deletions(-)


Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.32 llvm/lib/Target/X86/X86ISelLowering.cpp:1.33
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.32	Thu Jan 12 01:56:47 2006
+++ llvm/lib/Target/X86/X86ISelLowering.cpp	Thu Jan 12 02:27:59 2006
@@ -161,8 +161,8 @@
 
   if (X86ScalarSSE) {
     // Set up the FP register classes.
-    addRegisterClass(MVT::f32, X86::V4F4RegisterClass);
-    addRegisterClass(MVT::f64, X86::V2F8RegisterClass);
+    addRegisterClass(MVT::f32, X86::FR32RegisterClass);
+    addRegisterClass(MVT::f64, X86::FR64RegisterClass);
 
     // SSE has no load+extend ops
     setOperationAction(ISD::EXTLOAD,  MVT::f32, Expand);


Index: llvm/lib/Target/X86/X86InstrInfo.td
diff -u llvm/lib/Target/X86/X86InstrInfo.td:1.199 llvm/lib/Target/X86/X86InstrInfo.td:1.200
--- llvm/lib/Target/X86/X86InstrInfo.td:1.199	Thu Jan 12 01:56:47 2006
+++ llvm/lib/Target/X86/X86InstrInfo.td	Thu Jan 12 02:27:59 2006
@@ -74,7 +74,8 @@
                         [SDNPOutFlag]>;
 def X86brcond  : SDNode<"X86ISD::BRCOND",   SDTX86BrCond,
                         [SDNPHasChain]>;
-def X86setcc   : SDNode<"X86ISD::SETCC",    SDTX86SetCC,    []>;
+def X86setcc   : SDNode<"X86ISD::SETCC",    SDTX86SetCC,
+                        [SDNPOutFlag]>;
 
 def X86retflag : SDNode<"X86ISD::RET_FLAG", SDTX86Ret,
                         [SDNPHasChain, SDNPOptInFlag]>;





From brukman at cs.uiuc.edu  Thu Jan 12 09:05:38 2006
From: brukman at cs.uiuc.edu (Misha Brukman)
Date: Thu, 12 Jan 2006 09:05:38 -0600
Subject: [llvm-commits] CVS: llvm-www/OpenProjects.html 
Message-ID: <200601121505.JAA02581@zion.cs.uiuc.edu>



Changes in directory llvm-www:

OpenProjects.html updated: 1.10 -> 1.11
---
Log message:

Added link to the Elsa C++ parser and Elkhound GLR parser generator -- this
could be used to implement a better C++ front-end for LLVM.


---
Diffs of the changes:  (+10 -4)

 OpenProjects.html |   14 ++++++++++----
 1 files changed, 10 insertions(+), 4 deletions(-)


Index: llvm-www/OpenProjects.html
diff -u llvm-www/OpenProjects.html:1.10 llvm-www/OpenProjects.html:1.11
--- llvm-www/OpenProjects.html:1.10	Sat Oct 29 00:46:00 2005
+++ llvm-www/OpenProjects.html	Thu Jan 12 09:05:17 2006
@@ -347,9 +347,15 @@
 candidate.</li>
 <li>Write a new frontend for C/C++ <b>in</b> C++, giving us the ability to
 directly use LLVM C++ classes from within a compiler rather than use
-C-based wrapper functions a la llvm-gcc.  One possible starting point is the <a
-href="http://www.parashift.com/c++-faq-lite/compiler-dependencies.html#faq-38.11">C++
-yacc grammar by Ed Willink</a>.</li>
+C-based wrapper functions a la llvm-gcc.  Possible starting points:
+  <ul>
+  <li><a href="http://www.cs.berkeley.edu/~smcpeak/elkhound/sources/elsa/">Elsa
+      C++ parser</a>, written in C++ and built with a Generalized LR parser
+      generator <a
+      href="http://www.cs.berkeley.edu/~smcpeak/elkhound/">Elkhound</a></li>
+  <li><a href="http://www.parashift.com/c++-faq-lite/compiler-dependencies.html#faq-38.11">C++ yacc grammar by Ed Willink</a></li>
+  </ul>
+</li>
 <li>Write a new frontend for some other language (Java? OCaml? Forth?)</li>
 <li>Write a disassembler for machine code that would use TableGen to output 
 <tt>MachineInstr</tt>s for transformations, optimizations, etc.</li>
@@ -375,7 +381,7 @@
   src="http://www.w3.org/Icons/valid-html401" alt="Valid HTML 4.01!"></a>
 
   <a href="http://llvm.cs.uiuc.edu">LLVM Compiler Infrastructure</a><br>
-  Last modified: $Date: 2005/10/29 05:46:00 $
+  Last modified: $Date: 2006/01/12 15:05:17 $
 </address>
 
 <!--#include virtual="footer.incl" -->





From lattner at cs.uiuc.edu  Thu Jan 12 10:48:35 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu, 12 Jan 2006 10:48:35 -0600
Subject: [llvm-commits] CVS: llvm/lib/VMCore/PassManagerT.h 
Message-ID: <200601121648.KAA03058@zion.cs.uiuc.edu>



Changes in directory llvm/lib/VMCore:

PassManagerT.h updated: 1.66 -> 1.67
---
Log message:

Patch #10 from Saem:
"Extracts a few more methods, reduces some redundancy in the code at
the same time."


---
Diffs of the changes:  (+32 -52)

 PassManagerT.h |   84 +++++++++++++++++++++------------------------------------
 1 files changed, 32 insertions(+), 52 deletions(-)


Index: llvm/lib/VMCore/PassManagerT.h
diff -u llvm/lib/VMCore/PassManagerT.h:1.66 llvm/lib/VMCore/PassManagerT.h:1.67
--- llvm/lib/VMCore/PassManagerT.h:1.66	Wed Jan 11 10:14:49 2006
+++ llvm/lib/VMCore/PassManagerT.h	Thu Jan 12 10:48:23 2006
@@ -472,33 +472,10 @@
            E = RequiredSet.end(); I != E; ++I)
       markPassUsed(*I, P);     // Mark *I as used by P
 
-    // Erase all analyses not in the preserved set...
-    if (!AnUsage.getPreservesAll()) {
-      const std::vector<AnalysisID> &PreservedSet = AnUsage.getPreservedSet();
-      for (std::map<AnalysisID, Pass*>::iterator I = CurrentAnalyses.begin(),
-             E = CurrentAnalyses.end(); I != E; ) {
-        if (std::find(PreservedSet.begin(), PreservedSet.end(), I->first) ==
-            PreservedSet.end()) {             // Analysis not preserved!
-          CurrentAnalyses.erase(I);           // Remove from available analyses
-          I = CurrentAnalyses.begin();
-        } else {
-          ++I;
-        }
-      }
-    }
-
-    // Add this pass to the currently available set...
-    if (const PassInfo *PI = P->getPassInfo()) {
-      CurrentAnalyses[PI] = P;
-
-      // This pass is the current implementation of all of the interfaces it
-      // implements as well.
-      //
-      const std::vector<const PassInfo*> &II = PI->getInterfacesImplemented();
-      for (unsigned i = 0, e = II.size(); i != e; ++i)
-        CurrentAnalyses[II[i]] = P;
-    }
-
+    removeNonPreservedAnalyses(AnUsage);
+    
+    makeCurrentlyAvailable(P);
+    
     // For now assume that our results are never used...
     LastUseOf[P] = P;
   }
@@ -632,30 +609,10 @@
       // Erase all analyses not in the preserved set
       removeNonPreservedAnalyses(AnUsage);
       
-      // Add the current pass to the set of passes that have been run, and are
-      // thus available to users.
-      //
-      if (const PassInfo *PI = P->getPassInfo()) {
-        CurrentAnalyses[PI] = P;
-
-        // This pass is the current implementation of all of the interfaces it
-        // implements as well.
-        //
-        const std::vector<const PassInfo*> &II = PI->getInterfacesImplemented();
-        for (unsigned i = 0, e = II.size(); i != e; ++i)
-          CurrentAnalyses[II[i]] = P;
-      }
-
-      // Free memory for any passes that we are the last use of...
-      std::vector<Pass*> &DeadPass = LastUserOf[P];
-      for (std::vector<Pass*>::iterator I = DeadPass.begin(),E = DeadPass.end();
-           I != E; ++I) {
-        PMDebug::PrintPassInformation(getDepth()+1, "Freeing Pass", *I, M);
-        (*I)->releaseMemory();
-      }
+      makeCurrentlyAvailable(P);
       
-      // remove dead passes from the CurrentAnalyses list...
-      removeDeadPasses(DeadPass);
+      // free memory and remove dead passes from the CurrentAnalyses list...
+      removeDeadPasses(P, M, LastUserOf);
     }
     
     return MadeChanges;
@@ -707,7 +664,15 @@
     }
   }
   
-  inline void removeDeadPasses(std::vector<Pass*> &DeadPass) { 
+  inline void removeDeadPasses(Pass* P, UnitType *M, 
+              std::map<Pass *, std::vector<Pass*> > &LastUserOf) { 
+    std::vector<Pass*> &DeadPass = LastUserOf[P];
+    for (std::vector<Pass*>::iterator I = DeadPass.begin(),E = DeadPass.end();
+          I != E; ++I) {
+      PMDebug::PrintPassInformation(getDepth()+1, "Freeing Pass", *I, M);
+      (*I)->releaseMemory();
+    }
+    
     for (std::map<AnalysisID, Pass*>::iterator I = CurrentAnalyses.begin();
           I != CurrentAnalyses.end(); ) {
       std::vector<Pass*>::iterator DPI = std::find(DeadPass.begin(),
@@ -720,8 +685,23 @@
       }
     }
   }
+  
+  inline void makeCurrentlyAvailable(Pass* P) { 
+    if (const PassInfo *PI = P->getPassInfo()) {
+      CurrentAnalyses[PI] = P;
+
+      // This pass is the current implementation of all of the interfaces it
+      // implements as well.
+      //
+      const std::vector<const PassInfo*> &II = PI->getInterfacesImplemented();
+      for (unsigned i = 0, e = II.size(); i != e; ++i)
+        CurrentAnalyses[II[i]] = P;
+    }
+  }
 };
 
+
+
 //===----------------------------------------------------------------------===//
 // BasicBlockPassManager
 //
@@ -859,7 +839,7 @@
 };
 
 //===----------------------------------------------------------------------===//
-// PassManagerTraits Method Implementations
+// PassManager Method Implementations
 //
 
 // BasicBlockPassManager Implementations





From lattner at cs.uiuc.edu  Thu Jan 12 11:05:45 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu, 12 Jan 2006 11:05:45 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
	SparcV8InstrInfo.td 
Message-ID: <200601121705.LAA03253@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/SparcV8:

SparcV8ISelDAGToDAG.cpp updated: 1.47 -> 1.48
SparcV8InstrInfo.td updated: 1.101 -> 1.102
---
Log message:

Fix branches on FP compares


---
Diffs of the changes:  (+17 -21)

 SparcV8ISelDAGToDAG.cpp |   33 +++++++++++++++------------------
 SparcV8InstrInfo.td     |    5 ++---
 2 files changed, 17 insertions(+), 21 deletions(-)


Index: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
diff -u llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.47 llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.48
--- llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.47	Thu Jan 12 01:38:04 2006
+++ llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp	Thu Jan 12 11:05:32 2006
@@ -665,13 +665,7 @@
       SDOperand Cond = DAG.getNode(V8ISD::CMPICC, VTs, Ops).getValue(1);
       return DAG.getNode(V8ISD::BRICC, MVT::Other, Chain, Dest, CC, Cond);
     } else {
-      std::vector<MVT::ValueType> VTs;
-      VTs.push_back(MVT::i32);
-      VTs.push_back(MVT::Flag);
-      std::vector<SDOperand> Ops;
-      Ops.push_back(LHS);
-      Ops.push_back(RHS);
-      SDOperand Cond = DAG.getNode(V8ISD::CMPFCC, VTs, Ops).getValue(1);
+      SDOperand Cond = DAG.getNode(V8ISD::CMPFCC, MVT::Flag, LHS, RHS);
       return DAG.getNode(V8ISD::BRFCC, MVT::Other, Chain, Dest, CC, Cond);
     }
   }
@@ -682,18 +676,21 @@
     SDOperand TrueVal = Op.getOperand(2);
     SDOperand FalseVal = Op.getOperand(3);
     
+    SDOperand CompareFlag;
     unsigned Opc;
-    Opc = LHS.getValueType() == MVT::i32 ? V8ISD::CMPICC : V8ISD::CMPFCC;
-    std::vector<MVT::ValueType> VTs;
-    VTs.push_back(LHS.getValueType());
-    VTs.push_back(MVT::Flag);
-    std::vector<SDOperand> Ops;
-    Ops.push_back(LHS);
-    Ops.push_back(RHS);
-    SDOperand CompareFlag = DAG.getNode(Opc, VTs, Ops).getValue(1);
-    
-    Opc = LHS.getValueType() == MVT::i32 ? 
-      V8ISD::SELECT_ICC : V8ISD::SELECT_FCC;
+    if (LHS.getValueType() == MVT::i32) {
+      std::vector<MVT::ValueType> VTs;
+      VTs.push_back(LHS.getValueType());   // subcc returns a value
+      VTs.push_back(MVT::Flag);
+      std::vector<SDOperand> Ops;
+      Ops.push_back(LHS);
+      Ops.push_back(RHS);
+      CompareFlag = DAG.getNode(V8ISD::CMPICC, VTs, Ops).getValue(1);
+      Opc = V8ISD::SELECT_ICC;
+    } else {
+      CompareFlag = DAG.getNode(V8ISD::CMPFCC, MVT::Flag, LHS, RHS);
+      Opc = V8ISD::SELECT_FCC;
+    }
     return DAG.getNode(Opc, TrueVal.getValueType(), TrueVal, FalseVal, 
                        DAG.getConstant(CC, MVT::i32), CompareFlag);
   }


Index: llvm/lib/Target/SparcV8/SparcV8InstrInfo.td
diff -u llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.101 llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.102
--- llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.101	Wed Jan 11 01:49:38 2006
+++ llvm/lib/Target/SparcV8/SparcV8InstrInfo.td	Thu Jan 12 11:05:32 2006
@@ -72,9 +72,8 @@
 def SDTV8ITOF :
 SDTypeProfile<1, 1, [SDTCisFP<0>, SDTCisVT<1, f32>]>;
 
-def V8cmpicc : SDNode<"V8ISD::CMPICC", SDTIntBinOp,
-                      [SDNPCommutative, SDNPOutFlag]>;
-def V8cmpfcc : SDNode<"V8ISD::CMPFCC", SDTV8cmpfcc>;
+def V8cmpicc : SDNode<"V8ISD::CMPICC", SDTIntBinOp, [SDNPOutFlag]>;
+def V8cmpfcc : SDNode<"V8ISD::CMPFCC", SDTV8cmpfcc, [SDNPOutFlag]>;
 def V8bricc : SDNode<"V8ISD::BRICC", SDTV8brcc, [SDNPHasChain]>;
 def V8brfcc : SDNode<"V8ISD::BRFCC", SDTV8brcc, [SDNPHasChain]>;
 





From lattner at cs.uiuc.edu  Thu Jan 12 12:57:46 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu, 12 Jan 2006 12:57:46 -0600
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp 
Message-ID: <200601121857.MAA03756@zion.cs.uiuc.edu>



Changes in directory llvm/lib/CodeGen/SelectionDAG:

DAGCombiner.cpp updated: 1.80 -> 1.81
---
Log message:

Don't create rotate instructions in unsupported types, because we don't have
promote/expand code yet.  This fixes the 177.mesa failure on PPC.


---
Diffs of the changes:  (+2 -2)

 DAGCombiner.cpp |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)


Index: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.80 llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.81
--- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.80	Wed Jan 11 15:21:00 2006
+++ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp	Thu Jan 12 12:57:33 2006
@@ -1184,7 +1184,7 @@
   // check for rotl, rotr
   if (N0.getOpcode() == ISD::SHL && N1.getOpcode() == ISD::SRL &&
       N0.getOperand(0) == N1.getOperand(0) &&
-      TLI.isOperationLegal(ISD::ROTL, VT)) {
+      TLI.isOperationLegal(ISD::ROTL, VT) && TLI.isTypeLegal(VT)) {
     // fold (or (shl x, C1), (srl x, C2)) -> (rotl x, C1)
     if (N0.getOperand(1).getOpcode() == ISD::Constant &&
         N1.getOperand(1).getOpcode() == ISD::Constant) {
@@ -1206,7 +1206,7 @@
       if (ConstantSDNode *SUBC = 
           dyn_cast<ConstantSDNode>(N0.getOperand(1).getOperand(0)))
         if (SUBC->getValue() == OpSizeInBits) {
-          if (TLI.isOperationLegal(ISD::ROTR, VT))
+          if (TLI.isOperationLegal(ISD::ROTR, VT) && TLI.isTypeLegal(VT))
             return DAG.getNode(ISD::ROTR, VT, N0.getOperand(0), 
                                N1.getOperand(1));
           else





From lattner at cs.uiuc.edu  Thu Jan 12 13:17:36 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu, 12 Jan 2006 13:17:36 -0600
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/AsmPrinter.cpp 
Message-ID: <200601121917.NAA03982@zion.cs.uiuc.edu>



Changes in directory llvm/lib/CodeGen:

AsmPrinter.cpp updated: 1.36 -> 1.37
---
Log message:

If using __main, emit global ctor/dtor list like any other global


---
Diffs of the changes:  (+2 -2)

 AsmPrinter.cpp |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)


Index: llvm/lib/CodeGen/AsmPrinter.cpp
diff -u llvm/lib/CodeGen/AsmPrinter.cpp:1.36 llvm/lib/CodeGen/AsmPrinter.cpp:1.37
--- llvm/lib/CodeGen/AsmPrinter.cpp:1.36	Wed Jan  4 16:28:25 2006
+++ llvm/lib/CodeGen/AsmPrinter.cpp	Thu Jan 12 13:17:23 2006
@@ -120,14 +120,14 @@
   if (GV->getName() == "llvm.used")
     return true;  // No need to emit this at all.
 
-  if (GV->getName() == "llvm.global_ctors") {
+  if (GV->getName() == "llvm.global_ctors" && GV->use_empty()) {
     SwitchSection(StaticCtorsSection, 0);
     EmitAlignment(2, 0);
     EmitXXStructorList(GV->getInitializer());
     return true;
   } 
   
-  if (GV->getName() == "llvm.global_dtors") {
+  if (GV->getName() == "llvm.global_dtors" && GV->use_empty()) {
     SwitchSection(StaticDtorsSection, 0);
     EmitAlignment(2, 0);
     EmitXXStructorList(GV->getInitializer());





From evan.cheng at apple.com  Thu Jan 12 13:36:07 2006
From: evan.cheng at apple.com (Evan Cheng)
Date: Thu, 12 Jan 2006 13:36:07 -0600
Subject: [llvm-commits] CVS: llvm/utils/TableGen/DAGISelEmitter.cpp 
Message-ID: <200601121936.NAA04081@zion.cs.uiuc.edu>



Changes in directory llvm/utils/TableGen:

DAGISelEmitter.cpp updated: 1.132 -> 1.133
---
Log message:

Allow transformation from GlobalAddress to TargetGlobalAddress and
ExternalSymbol to TargetExternalSymbol.


---
Diffs of the changes:  (+24 -13)

 DAGISelEmitter.cpp |   37 ++++++++++++++++++++++++-------------
 1 files changed, 24 insertions(+), 13 deletions(-)


Index: llvm/utils/TableGen/DAGISelEmitter.cpp
diff -u llvm/utils/TableGen/DAGISelEmitter.cpp:1.132 llvm/utils/TableGen/DAGISelEmitter.cpp:1.133
--- llvm/utils/TableGen/DAGISelEmitter.cpp:1.132	Thu Jan 12 01:54:57 2006
+++ llvm/utils/TableGen/DAGISelEmitter.cpp	Thu Jan 12 13:35:54 2006
@@ -1826,7 +1826,9 @@
   unsigned PatternNo;
   std::ostream &OS;
   // Node to name mapping
-  std::map<std::string,std::string> VariableMap;
+  std::map<std::string, std::string> VariableMap;
+  // Node to operator mapping
+  std::map<std::string, Record*> OperatorMap;
   // Names of all the folded nodes which produce chains.
   std::vector<std::pair<std::string, unsigned> > FoldedChains;
   unsigned TmpNo;
@@ -1892,6 +1894,9 @@
            << ") goto P" << PatternNo << "Fail;\n";
         return;
       }
+
+      if (!N->isLeaf())
+        OperatorMap[N->getName()] = N->getOperator();
     }
 
 
@@ -2023,20 +2028,26 @@
         OS << "      SDOperand Tmp" << utostr(ResNo)
            << " = CurDAG->getTargetConstant(Tmp"
            << ResNo << "C, MVT::" << getEnumName(N->getTypeNum(0)) << ");\n";
-      } else if (!N->isLeaf() && N->getOperator()->getName() == "globaladdr") {
-        OS << "      SDOperand Tmp" << ResNo
-           << " = CurDAG->getTargetGlobalAddress(cast<GlobalAddressSDNode>("
-           << Val << ")->getGlobal(), MVT::" << getEnumName(N->getTypeNum(0))
-           << ");\n";
-      } else if (!N->isLeaf() && N->getOperator()->getName() == "externalsym") {
-        OS << "      SDOperand Tmp" << ResNo
-           << " = CurDAG->getTargetExternalSymbol(cast<ExternalSymbolSDNode>("
-           << Val << ")->getSymbol(), MVT::" << getEnumName(N->getTypeNum(0))
-           << ");\n";
       } else if (!N->isLeaf() && N->getOperator()->getName() == "texternalsym"){
-        OS << "      SDOperand Tmp" << ResNo << " = " << Val << ";\n";
+        Record *Op = OperatorMap[N->getName()];
+        // Transform ExternalSymbol to TargetExternalSymbol
+        if (Op && Op->getName() == "externalsym") {
+          OS << "      SDOperand Tmp" << ResNo
+             << " = CurDAG->getTargetExternalSymbol(cast<ExternalSymbolSDNode>("
+             << Val << ")->getSymbol(), MVT::" << getEnumName(N->getTypeNum(0))
+             << ");\n";
+        } else
+          OS << "      SDOperand Tmp" << ResNo << " = " << Val << ";\n";
       } else if (!N->isLeaf() && N->getOperator()->getName() == "tglobaladdr") {
-        OS << "      SDOperand Tmp" << ResNo << " = " << Val << ";\n";
+        Record *Op = OperatorMap[N->getName()];
+        // Transform GlobalAddress to TargetGlobalAddress
+        if (Op && Op->getName() == "globaladdr") {
+          OS << "      SDOperand Tmp" << ResNo
+             << " = CurDAG->getTargetGlobalAddress(cast<GlobalAddressSDNode>("
+             << Val << ")->getGlobal(), MVT::" << getEnumName(N->getTypeNum(0))
+             << ");\n";
+        } else
+          OS << "      SDOperand Tmp" << ResNo << " = " << Val << ";\n";
       } else if (!N->isLeaf() && N->getOperator()->getName() == "texternalsym"){
         OS << "      SDOperand Tmp" << ResNo << " = " << Val << ";\n";
       } else if (!N->isLeaf() && N->getOperator()->getName() == "tconstpool") {





From evan.cheng at apple.com  Thu Jan 12 13:36:44 2006
From: evan.cheng at apple.com (Evan Cheng)
Date: Thu, 12 Jan 2006 13:36:44 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86InstrInfo.td 
Message-ID: <200601121936.NAA04100@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/X86:

X86InstrInfo.td updated: 1.200 -> 1.201
---
Log message:

Specify transformation from GlobalAddress to TargetGlobalAddress and
ExternalSymbol to TargetExternalSymbol.


---
Diffs of the changes:  (+2 -2)

 X86InstrInfo.td |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)


Index: llvm/lib/Target/X86/X86InstrInfo.td
diff -u llvm/lib/Target/X86/X86InstrInfo.td:1.200 llvm/lib/Target/X86/X86InstrInfo.td:1.201
--- llvm/lib/Target/X86/X86InstrInfo.td:1.200	Thu Jan 12 02:27:59 2006
+++ llvm/lib/Target/X86/X86InstrInfo.td	Thu Jan 12 13:36:31 2006
@@ -2959,8 +2959,8 @@
 //===----------------------------------------------------------------------===//
 
 // GlobalAddress and ExternalSymbol
-def : Pat<(i32 globaladdr:$dst),  (MOV32ri globaladdr:$dst)>;
-def : Pat<(i32 externalsym:$dst), (MOV32ri externalsym:$dst)>;
+def : Pat<(i32 globaladdr:$dst),  (MOV32ri tglobaladdr:$dst)>;
+def : Pat<(i32 externalsym:$dst), (MOV32ri texternalsym:$dst)>;
 
 // Calls
 def : Pat<(X86call tglobaladdr:$dst),





From lattner at cs.uiuc.edu  Thu Jan 12 13:42:38 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu, 12 Jan 2006 13:42:38 -0600
Subject: [llvm-commits] 
	CVS: llvm-test/SingleSource/UnitTests/2005-05-11-Popcount-ffs-fls.c
Message-ID: <200601121942.NAA04173@zion.cs.uiuc.edu>



Changes in directory llvm-test/SingleSource/UnitTests:

2005-05-11-Popcount-ffs-fls.c updated: 1.4 -> 1.5
---
Log message:

enhance this test to pass on non-gcc 4 host compilers


---
Diffs of the changes:  (+22 -1)

 2005-05-11-Popcount-ffs-fls.c |   23 ++++++++++++++++++++++-
 1 files changed, 22 insertions(+), 1 deletion(-)


Index: llvm-test/SingleSource/UnitTests/2005-05-11-Popcount-ffs-fls.c
diff -u llvm-test/SingleSource/UnitTests/2005-05-11-Popcount-ffs-fls.c:1.4 llvm-test/SingleSource/UnitTests/2005-05-11-Popcount-ffs-fls.c:1.5
--- llvm-test/SingleSource/UnitTests/2005-05-11-Popcount-ffs-fls.c:1.4	Sun May 15 16:18:45 2005
+++ llvm-test/SingleSource/UnitTests/2005-05-11-Popcount-ffs-fls.c	Thu Jan 12 13:42:26 2006
@@ -24,6 +24,12 @@
    return table[x >> 26];
 }
 
+int nlzll(unsigned long long x) {
+  if ((x >> 32) == 0)
+    return nlz10b(x)+32;
+  return nlz10b(x>>32);
+}
+
 int pop(unsigned x) {
    x = x - ((x >> 1) & 0x55555555);
    x = (x & 0x33333333) + ((x >> 2) & 0x33333333);
@@ -33,6 +39,10 @@
    return x >> 24;
 }
 
+int popll(unsigned long long x) {
+  return pop(x) + pop(x >> 32);
+}
+
 int ntz8(unsigned x) {
 
    static char table[64] =
@@ -45,6 +55,17 @@
    return table[x >> 26];
 }
 
+/* Work with non-gcc compilers and GCC before 4.0 */
+#if !defined(__GNUC__) || __GNUC__ < 4
+#define __builtin_clz nlz10b
+#define __builtin_popcount pop
+#define __builtin_ctz ntz8
+#define __builtin_clzll nlzll
+#define __builtin_popcountll popll
+#define __builtin_ffsl __builtin_ffs
+#define ffsl ffs
+#endif
+
 int i;
 int main(void) {
   long long l;
@@ -66,7 +87,7 @@
     printf("LLVM: n: %lld, clz(n): %d, popcount(n): %d, ctz(n): %d\n",
 	l, __builtin_clzll(l), __builtin_popcountll(l), __builtin_ctz(l));
     printf("REF LO BITS : n: %lld, clz(n): %d, popcount(n): %d, ctz(n): %d\n",
-	l, nlz10b(l), pop(l), ntz8(l));
+	l, nlzll(l), popll(l), ntz8(l));
     printf("  ***  \n");
     l++;
   }





From lattner at cs.uiuc.edu  Thu Jan 12 14:22:55 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu, 12 Jan 2006 14:22:55 -0600
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp 
Message-ID: <200601122022.OAA04548@zion.cs.uiuc.edu>



Changes in directory llvm/lib/CodeGen/SelectionDAG:

DAGCombiner.cpp updated: 1.81 -> 1.82
---
Log message:

Add a simple missing fold to produce this:

        subfic r3, r2, 33

instead of this:

        subfic r2, r2, 32
        addi r3, r2, 1



---
Diffs of the changes:  (+8 -0)

 DAGCombiner.cpp |    8 ++++++++
 1 files changed, 8 insertions(+)


Index: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.81 llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.82
--- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.81	Thu Jan 12 12:57:33 2006
+++ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp	Thu Jan 12 14:22:43 2006
@@ -696,6 +696,14 @@
       return DAG.getNode(ISD::ADD, VT, N0.getOperand(0),
                          DAG.getConstant(N1C->getValue()+N01C->getValue(), VT));
   }
+  
+  // fold ((c1-A)+c2) -> (c1+c2)-A
+  if (N1C && N0.getOpcode() == ISD::SUB)
+    if (ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0.getOperand(0)))
+      return DAG.getNode(ISD::SUB, VT,
+                         DAG.getConstant(N1C->getValue()+N0C->getValue(), VT),
+                         N0.getOperand(1));
+  
   // fold ((0-A) + B) -> B-A
   if (N0.getOpcode() == ISD::SUB && isa<ConstantSDNode>(N0.getOperand(0)) &&
       cast<ConstantSDNode>(N0.getOperand(0))->isNullValue())





From lattner at cs.uiuc.edu  Thu Jan 12 16:42:53 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu, 12 Jan 2006 16:42:53 -0600
Subject: [llvm-commits] 
	CVS: llvm-test/SingleSource/UnitTests/2005-05-11-Popcount-ffs-fls.c
Message-ID: <200601122242.QAA05338@zion.cs.uiuc.edu>



Changes in directory llvm-test/SingleSource/UnitTests:

2005-05-11-Popcount-ffs-fls.c updated: 1.5 -> 1.6
---
Log message:

Add another case to check, eliminate a warning


---
Diffs of the changes:  (+5 -4)

 2005-05-11-Popcount-ffs-fls.c |    9 +++++----
 1 files changed, 5 insertions(+), 4 deletions(-)


Index: llvm-test/SingleSource/UnitTests/2005-05-11-Popcount-ffs-fls.c
diff -u llvm-test/SingleSource/UnitTests/2005-05-11-Popcount-ffs-fls.c:1.5 llvm-test/SingleSource/UnitTests/2005-05-11-Popcount-ffs-fls.c:1.6
--- llvm-test/SingleSource/UnitTests/2005-05-11-Popcount-ffs-fls.c:1.5	Thu Jan 12 13:42:26 2006
+++ llvm-test/SingleSource/UnitTests/2005-05-11-Popcount-ffs-fls.c	Thu Jan 12 16:42:40 2006
@@ -2,6 +2,7 @@
  * http://www.hackersdelight.org/HDcode/nlz.cc and
  * http://www.hackersdelight.org/HDcode/ntz.cc
  */
+#include <stdio.h>
 
 #define u 99
 
@@ -93,11 +94,11 @@
   }
 
   // Check some boundary and other cases  for FFS call
-  printf("FFS: 0:%d, 1:%d, 2:%d, 7:%d, 1024:%d, i:%d, l:%d\n",
-      ffs(0), ffs(1), ffs(2), ffs(7), ffs(1024), ffs(i), ffsl(l));
-  printf("__builtin_ffs: 0:%d, 1:%d, 2:%d, 7:%d, 1024:%d, i:%d l:%d\n",
+  printf("FFS: 0:%d, 1:%d, 2:%d, 7:%d, 1024:%d, 1234:%d i:%d, l:%d\n",
+      ffs(0), ffs(1), ffs(2), ffs(7), ffs(1024), ffs(1234), ffs(i), ffsl(l));
+  printf("__builtin_ffs: 0:%d, 1:%d, 2:%d, 7:%d, 1024:%d, 1234:%d i:%d l:%d\n",
       __builtin_ffs(0), __builtin_ffs(1), __builtin_ffs(2), __builtin_ffs(7),
-      __builtin_ffs(1024), __builtin_ffs(i), __builtin_ffsl(l)); 
+      __builtin_ffs(1024), __builtin_ffs(1234), __builtin_ffs(i), __builtin_ffsl(l)); 
 
   return(0);
 }





From evan.cheng at apple.com  Thu Jan 12 16:54:33 2006
From: evan.cheng at apple.com (Evan Cheng)
Date: Thu, 12 Jan 2006 16:54:33 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/README.txt
	X86ISelLowering.cpp X86ISelLowering.h X86ISelPattern.cpp
	X86InstrInfo.td 
Message-ID: <200601122254.QAA05382@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/X86:

README.txt updated: 1.20 -> 1.21
X86ISelLowering.cpp updated: 1.33 -> 1.34
X86ISelLowering.h updated: 1.14 -> 1.15
X86ISelPattern.cpp updated: 1.194 -> 1.195
X86InstrInfo.td updated: 1.201 -> 1.202
---
Log message:

Fix sint_to_fp (fild*) support.


---
Diffs of the changes:  (+61 -42)

 README.txt          |   15 ++++++++++-----
 X86ISelLowering.cpp |   37 +++++++++++++++++++++++++------------
 X86ISelLowering.h   |   12 ++++++------
 X86ISelPattern.cpp  |    4 ++--
 X86InstrInfo.td     |   35 ++++++++++++++++++-----------------
 5 files changed, 61 insertions(+), 42 deletions(-)


Index: llvm/lib/Target/X86/README.txt
diff -u llvm/lib/Target/X86/README.txt:1.20 llvm/lib/Target/X86/README.txt:1.21
--- llvm/lib/Target/X86/README.txt:1.20	Sat Dec 17 00:54:43 2005
+++ llvm/lib/Target/X86/README.txt	Thu Jan 12 16:54:21 2006
@@ -31,16 +31,12 @@
 
 //===---------------------------------------------------------------------===//
 
-Need to add support for rotate instructions.
-
-//===---------------------------------------------------------------------===//
-
 Some targets (e.g. athlons) prefer freep to fstp ST(0):
 http://gcc.gnu.org/ml/gcc-patches/2004-04/msg00659.html
 
 //===---------------------------------------------------------------------===//
 
-This should use faddi on chips where it is profitable:
+This should use fiadd on chips where it is profitable:
 double foo(double P, int *I) { return P+*I; }
 
 //===---------------------------------------------------------------------===//
@@ -107,3 +103,12 @@
 
 Leave any_extend as pseudo instruction and hint to register
 allocator. Delay codegen until post register allocation.
+
+//===---------------------------------------------------------------------===//
+
+Add a target specific hook to DAG combiner to handle SINT_TO_FP and
+FP_TO_SINT when the source operand is already in memory.
+
+//===---------------------------------------------------------------------===//
+
+Check if load folding would add a cycle in the dag.


Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.33 llvm/lib/Target/X86/X86ISelLowering.cpp:1.34
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.33	Thu Jan 12 02:27:59 2006
+++ llvm/lib/Target/X86/X86ISelLowering.cpp	Thu Jan 12 16:54:21 2006
@@ -194,6 +194,11 @@
     // Set up the FP register classes.
     addRegisterClass(MVT::f64, X86::RFPRegisterClass);
 
+    if (X86DAGIsel) {
+      setOperationAction(ISD::SINT_TO_FP, MVT::i16, Custom);
+      setOperationAction(ISD::SINT_TO_FP, MVT::i32, Custom);
+    }
+
     if (!UnsafeFPMath) {
       setOperationAction(ISD::FSIN           , MVT::f64  , Expand);
       setOperationAction(ISD::FCOS           , MVT::f64  , Expand);
@@ -1404,22 +1409,30 @@
   }
   case ISD::SINT_TO_FP: {
     assert(Op.getValueType() == MVT::f64 &&
-           Op.getOperand(0).getValueType() == MVT::i64 &&
+           Op.getOperand(0).getValueType() <= MVT::i64 &&
+           Op.getOperand(0).getValueType() >= MVT::i16 &&
            "Unknown SINT_TO_FP to lower!");
-    // We lower sint64->FP into a store to a temporary stack slot, followed by a
-    // FILD64m node.
+
+    SDOperand Result;
+    MVT::ValueType SrcVT = Op.getOperand(0).getValueType();
+    unsigned Size = MVT::getSizeInBits(SrcVT)/8;
     MachineFunction &MF = DAG.getMachineFunction();
-    int SSFI = MF.getFrameInfo()->CreateStackObject(8, 8);
+    int SSFI = MF.getFrameInfo()->CreateStackObject(Size, Size);
     SDOperand StackSlot = DAG.getFrameIndex(SSFI, getPointerTy());
-    SDOperand Store = DAG.getNode(ISD::STORE, MVT::Other, DAG.getEntryNode(),
-                           Op.getOperand(0), StackSlot, DAG.getSrcValue(NULL));
-    std::vector<MVT::ValueType> RTs;
-    RTs.push_back(MVT::f64);
-    RTs.push_back(MVT::Other);
+    SDOperand Chain = DAG.getNode(ISD::STORE, MVT::Other,
+                                  DAG.getEntryNode(), Op.getOperand(0),
+                                  StackSlot, DAG.getSrcValue(NULL));
+
+    // Build the FILD
+    std::vector<MVT::ValueType> Tys;
+    Tys.push_back(MVT::f64);
+    Tys.push_back(MVT::Flag);
     std::vector<SDOperand> Ops;
-    Ops.push_back(Store);
+    Ops.push_back(Chain);
     Ops.push_back(StackSlot);
-    return DAG.getNode(X86ISD::FILD64m, RTs, Ops);
+    Ops.push_back(DAG.getValueType(SrcVT));
+    Result = DAG.getNode(X86ISD::FILD, Tys, Ops);
+    return Result;
   }
   case ISD::FP_TO_SINT: {
     assert(Op.getValueType() <= MVT::i64 && Op.getValueType() >= MVT::i16 &&
@@ -1749,7 +1762,7 @@
   case X86ISD::SBB:                return "X86ISD::SBB";
   case X86ISD::SHLD:               return "X86ISD::SHLD";
   case X86ISD::SHRD:               return "X86ISD::SHRD";
-  case X86ISD::FILD64m:            return "X86ISD::FILD64m";
+  case X86ISD::FILD:               return "X86ISD::FILD";
   case X86ISD::FP_TO_INT16_IN_MEM: return "X86ISD::FP_TO_INT16_IN_MEM";
   case X86ISD::FP_TO_INT32_IN_MEM: return "X86ISD::FP_TO_INT32_IN_MEM";
   case X86ISD::FP_TO_INT64_IN_MEM: return "X86ISD::FP_TO_INT64_IN_MEM";


Index: llvm/lib/Target/X86/X86ISelLowering.h
diff -u llvm/lib/Target/X86/X86ISelLowering.h:1.14 llvm/lib/Target/X86/X86ISelLowering.h:1.15
--- llvm/lib/Target/X86/X86ISelLowering.h:1.14	Wed Jan 11 16:15:48 2006
+++ llvm/lib/Target/X86/X86ISelLowering.h	Thu Jan 12 16:54:21 2006
@@ -40,16 +40,16 @@
       SHLD,
       SHRD,
 
-      /// FILD64m - This instruction implements SINT_TO_FP with a
-      /// 64-bit source in memory and a FP reg result.  This corresponds to
-      /// the X86::FILD64m instruction.  It has two inputs (token chain and
-      /// address) and two outputs (FP value and token chain).
-      FILD64m,
+      /// FILD - This instruction implements SINT_TO_FP with the integer source
+      /// in memory and FP reg result.  This corresponds to the X86::FILD*m
+      /// instructions. It has three inputs (token chain, address, and source
+      /// type) and two outputs (FP value and token chain).
+      FILD,
 
       /// FP_TO_INT*_IN_MEM - This instruction implements FP_TO_SINT with the
       /// integer destination in memory and a FP reg source.  This corresponds
       /// to the X86::FIST*m instructions and the rounding mode change stuff. It
-      /// has two inputs (token chain and address) and two outputs (FP value and
+      /// has two inputs (token chain and address) and two outputs (int value and
       /// token chain).
       FP_TO_INT16_IN_MEM,
       FP_TO_INT32_IN_MEM,


Index: llvm/lib/Target/X86/X86ISelPattern.cpp
diff -u llvm/lib/Target/X86/X86ISelPattern.cpp:1.194 llvm/lib/Target/X86/X86ISelPattern.cpp:1.195
--- llvm/lib/Target/X86/X86ISelPattern.cpp:1.194	Wed Jan 11 16:15:48 2006
+++ llvm/lib/Target/X86/X86ISelPattern.cpp	Thu Jan 12 16:54:21 2006
@@ -2259,7 +2259,7 @@
       addFullAddress(BuildMI(BB, Opc, 4, Result), AM);
     }
     return Result;
-  case X86ISD::FILD64m:
+  case X86ISD::FILD:
     // Make sure we generate both values.
     assert(Result != 1 && N.getValueType() == MVT::f64);
     if (!ExprMap.insert(std::make_pair(N.getValue(1), 1)).second)
@@ -3301,7 +3301,7 @@
     SelectExpr(N);
     return;
   case ISD::CopyFromReg:
-  case X86ISD::FILD64m:
+  case X86ISD::FILD:
     ExprMap.erase(N);
     SelectExpr(N.getValue(0));
     return;


Index: llvm/lib/Target/X86/X86InstrInfo.td
diff -u llvm/lib/Target/X86/X86InstrInfo.td:1.201 llvm/lib/Target/X86/X86InstrInfo.td:1.202
--- llvm/lib/Target/X86/X86InstrInfo.td:1.201	Thu Jan 12 13:36:31 2006
+++ llvm/lib/Target/X86/X86InstrInfo.td	Thu Jan 12 16:54:21 2006
@@ -50,7 +50,8 @@
                                          SDTCisPtrTy<1>, SDTCisVT<2, OtherVT>]>;
 def SDTX86Fst     : SDTypeProfile<0, 3, [SDTCisFP<0>,
                                          SDTCisPtrTy<1>, SDTCisVT<2, OtherVT>]>;
-def SDTX86Fild64m : SDTypeProfile<1, 1, [SDTCisVT<0, f64>, SDTCisPtrTy<1>]>;
+def SDTX86Fild    : SDTypeProfile<1, 2, [SDTCisVT<0, f64>, SDTCisPtrTy<1>,
+                                         SDTCisVT<2, OtherVT>]>;
 
 def SDTX86RepStr  : SDTypeProfile<0, 1, [SDTCisVT<0, OtherVT>]>;
 
@@ -99,7 +100,7 @@
                         [SDNPHasChain]>;
 def X86fst     : SDNode<"X86ISD::FST",      SDTX86Fst,
                         [SDNPHasChain]>;
-def X86fild64m : SDNode<"X86ISD::FILD64m",  SDTX86Fild64m,
+def X86fild    : SDNode<"X86ISD::FILD",     SDTX86Fild,
                         [SDNPHasChain]>;
 
 def X86rep_stos: SDNode<"X86ISD::REP_STOS", SDTX86RepStr,
@@ -2707,50 +2708,50 @@
 // FIXME: Implement these when we have a dag-dag isel!
 def FpIADD16m : FpI<(ops RFP:$dst, RFP:$src1, i16mem:$src2), OneArgFPRW,
                     [(set RFP:$dst, (fadd RFP:$src1,
-                                     (sint_to_fp (loadi16 addr:$src2))))]>;
+                                     (X86fild addr:$src2, i16)))]>;
                 // ST(0) = ST(0) + [mem16int]
 def FpIADD32m : FpI<(ops RFP:$dst, RFP:$src1, i16mem:$src2), OneArgFPRW,
                     [(set RFP:$dst, (fadd RFP:$src1,
-                                     (sint_to_fp (loadi32 addr:$src2))))]>;
+                                     (X86fild addr:$src2, i32)))]>;
                 // ST(0) = ST(0) + [mem32int]
 def FpIMUL16m : FpI<(ops RFP:$dst, RFP:$src1, i16mem:$src2), OneArgFPRW,
                     [(set RFP:$dst, (fmul RFP:$src1,
-                                     (sint_to_fp (loadi16 addr:$src2))))]>;
+                                     (X86fild addr:$src2, i16)))]>;
                 // ST(0) = ST(0) * [mem16int]
 def FpIMUL32m : FpI<(ops RFP:$dst, RFP:$src1, i16mem:$src2), OneArgFPRW,
                     [(set RFP:$dst, (fmul RFP:$src1,
-                                     (sint_to_fp (loadi32 addr:$src2))))]>;
+                                     (X86fild addr:$src2, i32)))]>;
                 // ST(0) = ST(0) * [mem32int]
 def FpISUB16m : FpI<(ops RFP:$dst, RFP:$src1, i16mem:$src2), OneArgFPRW,
                     [(set RFP:$dst, (fsub RFP:$src1,
-                                     (sint_to_fp (loadi16 addr:$src2))))]>;
+                                     (X86fild addr:$src2, i16)))]>;
                 // ST(0) = ST(0) - [mem16int]
 def FpISUB32m : FpI<(ops RFP:$dst, RFP:$src1, i16mem:$src2), OneArgFPRW,
                     [(set RFP:$dst, (fsub RFP:$src1,
-                                     (sint_to_fp (loadi32 addr:$src2))))]>;
+                                     (X86fild addr:$src2, i32)))]>;
                 // ST(0) = ST(0) - [mem32int]
 def FpISUBR16m : FpI<(ops RFP:$dst, RFP:$src1, i16mem:$src2), OneArgFPRW,
-                     [(set RFP:$dst, (fsub (sint_to_fp (loadi16 addr:$src2)),
+                     [(set RFP:$dst, (fsub (X86fild addr:$src2, i16),
                                       RFP:$src1))]>;
                 // ST(0) = [mem16int] - ST(0)
 def FpISUBR32m : FpI<(ops RFP:$dst, RFP:$src1, i16mem:$src2), OneArgFPRW,
-                     [(set RFP:$dst, (fsub (sint_to_fp (loadi32 addr:$src2)),
+                     [(set RFP:$dst, (fsub (X86fild addr:$src2, i32),
                                       RFP:$src1))]>;
                 // ST(0) = [mem32int] - ST(0)
 def FpIDIV16m : FpI<(ops RFP:$dst, RFP:$src1, i16mem:$src2), OneArgFPRW,
                     [(set RFP:$dst, (fdiv RFP:$src1,
-                                     (sint_to_fp (loadi16 addr:$src2))))]>;
+                                     (X86fild addr:$src2, i16)))]>;
                 // ST(0) = ST(0) / [mem16int]
 def FpIDIV32m : FpI<(ops RFP:$dst, RFP:$src1, i16mem:$src2), OneArgFPRW,
                     [(set RFP:$dst, (fdiv RFP:$src1,
-                                     (sint_to_fp (loadi32 addr:$src2))))]>;
+                                     (X86fild addr:$src2, i32)))]>;
                 // ST(0) = ST(0) / [mem32int]
 def FpIDIVR16m : FpI<(ops RFP:$dst, RFP:$src1, i16mem:$src2), OneArgFPRW,
-                     [(set RFP:$dst, (fdiv (sint_to_fp (loadi16 addr:$src2)),
+                     [(set RFP:$dst, (fdiv (X86fild addr:$src2, i16),
                                       RFP:$src1))]>;
                 // ST(0) = [mem16int] / ST(0)
 def FpIDIVR32m : FpI<(ops RFP:$dst, RFP:$src1, i16mem:$src2), OneArgFPRW,
-                     [(set RFP:$dst, (fdiv (sint_to_fp (loadi32 addr:$src2)),
+                     [(set RFP:$dst, (fdiv (X86fild addr:$src2, i32),
                                       RFP:$src1))]>;
                 // ST(0) = [mem32int] / ST(0)
 
@@ -2863,11 +2864,11 @@
 def FpLD64m  : FpI<(ops RFP:$dst, f64mem:$src), ZeroArgFP,
                    [(set RFP:$dst, (loadf64 addr:$src))]>;
 def FpILD16m : FpI<(ops RFP:$dst, i16mem:$src), ZeroArgFP,
-                   [(set RFP:$dst, (sint_to_fp (loadi16 addr:$src)))]>;
+                   [(set RFP:$dst, (X86fild addr:$src, i16))]>;
 def FpILD32m : FpI<(ops RFP:$dst, i32mem:$src), ZeroArgFP,
-                   [(set RFP:$dst, (sint_to_fp (loadi32 addr:$src)))]>;
+                   [(set RFP:$dst, (X86fild addr:$src, i32))]>;
 def FpILD64m : FpI<(ops RFP:$dst, i64mem:$src), ZeroArgFP,
-                   [(set RFP:$dst, (X86fild64m addr:$src))]>;
+                   [(set RFP:$dst, (X86fild addr:$src, i64))]>;
 
 def FpST32m   : FpI<(ops f32mem:$op, RFP:$src), OneArgFP,
                 [(truncstore RFP:$src, addr:$op, f32)]>;





From evan.cheng at apple.com  Thu Jan 12 19:02:34 2006
From: evan.cheng at apple.com (Evan Cheng)
Date: Thu, 12 Jan 2006 19:02:34 -0600
Subject: [llvm-commits] 
	CVS: llvm/test/Regression/CodeGen/Generic/2006-01-12-BadSetCCFold.ll
Message-ID: <200601130102.TAA06058@zion.cs.uiuc.edu>



Changes in directory llvm/test/Regression/CodeGen/Generic:

2006-01-12-BadSetCCFold.ll added (r1.1)
---
Log message:

Test case for a SETCC / BRCOND folding bug.


---
Diffs of the changes:  (+39 -0)

 2006-01-12-BadSetCCFold.ll |   39 +++++++++++++++++++++++++++++++++++++++
 1 files changed, 39 insertions(+)


Index: llvm/test/Regression/CodeGen/Generic/2006-01-12-BadSetCCFold.ll
diff -c /dev/null llvm/test/Regression/CodeGen/Generic/2006-01-12-BadSetCCFold.ll:1.1
*** /dev/null	Thu Jan 12 19:02:32 2006
--- llvm/test/Regression/CodeGen/Generic/2006-01-12-BadSetCCFold.ll	Thu Jan 12 19:02:22 2006
***************
*** 0 ****
--- 1,39 ----
+ ; RUN: llvm-as < %s | llc
+ 
+ target endian = little
+ target pointersize = 32
+ 	%struct.node_t = type { double*, %struct.node_t*, %struct.node_t**, double**, double*, int, int }
+ 
+ implementation   ; Functions:
+ 
+ void %main() {
+ entry:
+ 	br bool false, label %then.2.i, label %endif.2.i
+ 
+ then.2.i:		; preds = %entry
+ 	br label %dealwithargs.exit
+ 
+ endif.2.i:		; preds = %entry
+ 	br bool false, label %then.3.i, label %dealwithargs.exit
+ 
+ then.3.i:		; preds = %endif.2.i
+ 	br label %dealwithargs.exit
+ 
+ dealwithargs.exit:		; preds = %then.3.i, %endif.2.i, %then.2.i
+ 	%n_nodes.4 = phi int [ 64, %then.3.i ], [ 64, %then.2.i ], [ 64, %endif.2.i ]		; <int> [#uses=1]
+ 	%tmp.14.i1134.i.i = setgt int %n_nodes.4, 1		; <bool> [#uses=2]
+ 	br bool %tmp.14.i1134.i.i, label %no_exit.i12.i.i, label %fill_table.exit22.i.i
+ 
+ no_exit.i12.i.i:		; preds = %no_exit.i12.i.i, %dealwithargs.exit
+ 	br bool false, label %fill_table.exit22.i.i, label %no_exit.i12.i.i
+ 
+ fill_table.exit22.i.i:		; preds = %no_exit.i12.i.i, %dealwithargs.exit
+ 	%cur_node.0.i8.1.i.i = phi %struct.node_t* [ undef, %dealwithargs.exit ], [ null, %no_exit.i12.i.i ]		; <%struct.node_t*> [#uses=0]
+ 	br bool %tmp.14.i1134.i.i, label %no_exit.i.preheader.i.i, label %make_tables.exit.i
+ 
+ no_exit.i.preheader.i.i:		; preds = %fill_table.exit22.i.i
+ 	ret void
+ 
+ make_tables.exit.i:		; preds = %fill_table.exit22.i.i
+ 	ret void
+ }





From evan.cheng at apple.com  Thu Jan 12 19:03:14 2006
From: evan.cheng at apple.com (Evan Cheng)
Date: Thu, 12 Jan 2006 19:03:14 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp 
Message-ID: <200601130103.TAA06071@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/X86:

X86ISelLowering.cpp updated: 1.34 -> 1.35
---
Log message:

Fix a SETCC / BRCOND folding bug.


---
Diffs of the changes:  (+37 -12)

 X86ISelLowering.cpp |   49 +++++++++++++++++++++++++++++++++++++------------
 1 files changed, 37 insertions(+), 12 deletions(-)


Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.34 llvm/lib/Target/X86/X86ISelLowering.cpp:1.35
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.34	Thu Jan 12 16:54:21 2006
+++ llvm/lib/Target/X86/X86ISelLowering.cpp	Thu Jan 12 19:03:02 2006
@@ -1572,14 +1572,24 @@
     bool isFP      = MVT::isFloatingPoint(VT);
     bool isFPStack = isFP && (X86Vector < SSE2);
     bool isFPSSE   = isFP && (X86Vector >= SSE2);
-    bool isValid   = false;
+    bool addTest   = false;
     SDOperand Op0 = Op.getOperand(0);
     SDOperand Cond, CC;
     if (Op0.getOpcode() == X86ISD::SETCC) {
-      CC   = Op0.getOperand(0);
-      Cond = Op0.getOperand(1);
-      isValid =
-        !(isFPStack && !hasFPCMov(cast<ConstantSDNode>(CC)->getSignExtended()));
+      // If condition flag is set by a X86ISD::CMP, then make a copy of it
+      // (since flag operand cannot be shared). If the X86ISD::SETCC does not
+      // have another use it will be eliminated.
+      // If the X86ISD::SETCC has more than one use, then it's probably better
+      // to use a test instead of duplicating the X86ISD::CMP (for register
+      // pressure reason).
+      if (Cond.hasOneUse() && Cond.getOperand(1).getOpcode() == X86ISD::CMP) {
+        CC   = Op0.getOperand(0);
+        Cond = Op0.getOperand(1);
+        addTest =
+          !(isFPStack &&
+            !hasFPCMov(cast<ConstantSDNode>(CC)->getSignExtended()));
+      } else
+        addTest = true;
     } else if (Op0.getOpcode() == ISD::SETCC) {
       CC = Op0.getOperand(2);
       bool isFP = MVT::isFloatingPoint(Op0.getOperand(1).getValueType());
@@ -1587,10 +1597,11 @@
       CC = DAG.getConstant(X86CC, MVT::i8);
       Cond = DAG.getNode(X86ISD::CMP, MVT::Flag,
                          Op0.getOperand(0), Op0.getOperand(1));
-      isValid = true;
-    }
+      addTest = true;
+    } else
+      addTest = true;
 
-    if (!isValid) {
+    if (!addTest) {
       CC = DAG.getConstant(X86ISD::COND_E, MVT::i8);
       Cond = DAG.getNode(X86ISD::TEST, MVT::Flag, Op0, Op0);
     }
@@ -1606,13 +1617,24 @@
     return DAG.getNode(X86ISD::CMOV, Tys, Ops);
   }
   case ISD::BRCOND: {
+    bool addTest = false;
     SDOperand Cond  = Op.getOperand(1);
     SDOperand Dest  = Op.getOperand(2);
     SDOperand CC;
-    // TODO: handle Cond == OR / AND / XOR
     if (Cond.getOpcode() == X86ISD::SETCC) {
-      CC = Cond.getOperand(0);
-      Cond = Cond.getOperand(1);
+      // If condition flag is set by a X86ISD::CMP, then make a copy of it
+      // (since flag operand cannot be shared). If the X86ISD::SETCC does not
+      // have another use it will be eliminated.
+      // If the X86ISD::SETCC has more than one use, then it's probably better
+      // to use a test instead of duplicating the X86ISD::CMP (for register
+      // pressure reason).
+      if (Cond.hasOneUse() && Cond.getOperand(1).getOpcode() == X86ISD::CMP) {
+        CC   = Cond.getOperand(0);
+        Cond = DAG.getNode(X86ISD::CMP, MVT::Flag,
+                           Cond.getOperand(1).getOperand(0),
+                           Cond.getOperand(1).getOperand(1));
+      } else
+        addTest = true;
     } else if (Cond.getOpcode() == ISD::SETCC) {
       CC = Cond.getOperand(2);
       bool isFP = MVT::isFloatingPoint(Cond.getOperand(1).getValueType());
@@ -1620,7 +1642,10 @@
       CC = DAG.getConstant(X86CC, MVT::i8);
       Cond = DAG.getNode(X86ISD::CMP, MVT::Flag,
                          Cond.getOperand(0), Cond.getOperand(1));
-    } else {
+    } else
+      addTest = true;
+
+    if (addTest) {
       CC = DAG.getConstant(X86ISD::COND_NE, MVT::i8);
       Cond = DAG.getNode(X86ISD::TEST, MVT::Flag, Cond, Cond);
     }





From evan.cheng at apple.com  Thu Jan 12 19:07:01 2006
From: evan.cheng at apple.com (Evan Cheng)
Date: Thu, 12 Jan 2006 19:07:01 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp 
Message-ID: <200601130107.TAA06094@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/X86:

X86ISelLowering.cpp updated: 1.35 -> 1.36
---
Log message:

Oops. Typo.


---
Diffs of the changes:  (+1 -1)

 X86ISelLowering.cpp |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.35 llvm/lib/Target/X86/X86ISelLowering.cpp:1.36
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.35	Thu Jan 12 19:03:02 2006
+++ llvm/lib/Target/X86/X86ISelLowering.cpp	Thu Jan 12 19:06:49 2006
@@ -1601,7 +1601,7 @@
     } else
       addTest = true;
 
-    if (!addTest) {
+    if (addTest) {
       CC = DAG.getConstant(X86ISD::COND_E, MVT::i8);
       Cond = DAG.getNode(X86ISD::TEST, MVT::Flag, Op0, Op0);
     }





From evan.cheng at apple.com  Thu Jan 12 19:17:36 2006
From: evan.cheng at apple.com (Evan Cheng)
Date: Thu, 12 Jan 2006 19:17:36 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp 
Message-ID: <200601130117.TAA06135@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/X86:

X86ISelLowering.cpp updated: 1.36 -> 1.37
---
Log message:

More typo's. I need new eye glasses...


---
Diffs of the changes:  (+2 -3)

 X86ISelLowering.cpp |    5 ++---
 1 files changed, 2 insertions(+), 3 deletions(-)


Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.36 llvm/lib/Target/X86/X86ISelLowering.cpp:1.37
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.36	Thu Jan 12 19:06:49 2006
+++ llvm/lib/Target/X86/X86ISelLowering.cpp	Thu Jan 12 19:17:24 2006
@@ -1582,12 +1582,11 @@
       // If the X86ISD::SETCC has more than one use, then it's probably better
       // to use a test instead of duplicating the X86ISD::CMP (for register
       // pressure reason).
-      if (Cond.hasOneUse() && Cond.getOperand(1).getOpcode() == X86ISD::CMP) {
+      if (Op0.hasOneUse() && Op0.getOperand(1).getOpcode() == X86ISD::CMP) {
         CC   = Op0.getOperand(0);
         Cond = Op0.getOperand(1);
         addTest =
-          !(isFPStack &&
-            !hasFPCMov(cast<ConstantSDNode>(CC)->getSignExtended()));
+          isFPStack && !hasFPCMov(cast<ConstantSDNode>(CC)->getSignExtended());
       } else
         addTest = true;
     } else if (Op0.getOpcode() == ISD::SETCC) {





From lattner at cs.uiuc.edu  Thu Jan 12 19:20:40 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu, 12 Jan 2006 19:20:40 -0600
Subject: [llvm-commits] CVS: llvm/docs/LangRef.html 
Message-ID: <200601130120.TAA06198@zion.cs.uiuc.edu>



Changes in directory llvm/docs:

LangRef.html updated: 1.121 -> 1.122
---
Log message:

void* is not legal in LLVM.


---
Diffs of the changes:  (+3 -5)

 LangRef.html |    8 +++-----
 1 files changed, 3 insertions(+), 5 deletions(-)


Index: llvm/docs/LangRef.html
diff -u llvm/docs/LangRef.html:1.121 llvm/docs/LangRef.html:1.122
--- llvm/docs/LangRef.html:1.121	Tue Jan 10 13:31:34 2006
+++ llvm/docs/LangRef.html	Thu Jan 12 19:20:27 2006
@@ -2709,7 +2709,7 @@
 
 <h5>Syntax:</h5>
 <pre>
-  declare void* %llvm.returnaddress(uint &lt;level&gt;)
+  declare sbyte *%llvm.returnaddress(uint &lt;level&gt;)
 </pre>
 
 <h5>Overview:</h5>
@@ -2753,7 +2753,7 @@
 
 <h5>Syntax:</h5>
 <pre>
-  declare void* %llvm.frameaddress(uint &lt;level&gt;)
+  declare sbyte *%llvm.frameaddress(uint &lt;level&gt;)
 </pre>
 
 <h5>Overview:</h5>
@@ -3362,7 +3362,6 @@
 <h5>Syntax:</h5>
 <pre>
   declare int %llvm.ctpop(int &lt;src&gt;)
-
 </pre>
 
 <h5>Overview:</h5>
@@ -3433,7 +3432,6 @@
 <h5>Syntax:</h5>
 <pre>
   declare int %llvm.cttz(int &lt;src&gt;)
-
 </pre>
 
 <h5>Overview:</h5>
@@ -3483,7 +3481,7 @@
 
   <a href="mailto:sabre at nondot.org">Chris Lattner</a><br>
   <a href="http://llvm.cs.uiuc.edu">The LLVM Compiler Infrastructure</a><br>
-  Last modified: $Date: 2006/01/10 19:31:34 $
+  Last modified: $Date: 2006/01/13 01:20:27 $
 </address>
 </body>
 </html>





From evan.cheng at apple.com  Thu Jan 12 19:20:54 2006
From: evan.cheng at apple.com (Evan Cheng)
Date: Thu, 12 Jan 2006 19:20:54 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/README.txt 
Message-ID: <200601130120.TAA06213@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/X86:

README.txt updated: 1.21 -> 1.22
---
Log message:

Minor update.


---
Diffs of the changes:  (+9 -0)

 README.txt |    9 +++++++++
 1 files changed, 9 insertions(+)


Index: llvm/lib/Target/X86/README.txt
diff -u llvm/lib/Target/X86/README.txt:1.21 llvm/lib/Target/X86/README.txt:1.22
--- llvm/lib/Target/X86/README.txt:1.21	Thu Jan 12 16:54:21 2006
+++ llvm/lib/Target/X86/README.txt	Thu Jan 12 19:20:42 2006
@@ -112,3 +112,12 @@
 //===---------------------------------------------------------------------===//
 
 Check if load folding would add a cycle in the dag.
+
+//===---------------------------------------------------------------------===//
+
+Model X86 EFLAGS as a real register to avoid redudant cmp / test. e.g.
+
+	cmpl $1, %eax
+	setg %al
+	testb %al, %al  # unnecessary
+	jne .BB7





From lattner at cs.uiuc.edu  Thu Jan 12 20:03:26 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu, 12 Jan 2006 20:03:26 -0600
Subject: [llvm-commits] CVS: llvm/docs/LangRef.html 
Message-ID: <200601130203.UAA06452@zion.cs.uiuc.edu>



Changes in directory llvm/docs:

LangRef.html updated: 1.122 -> 1.123
---
Log message:

Add llvm.stacksave and llvm.stackrestore.


---
Diffs of the changes:  (+69 -1)

 LangRef.html |   70 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-
 1 files changed, 69 insertions(+), 1 deletion(-)


Index: llvm/docs/LangRef.html
diff -u llvm/docs/LangRef.html:1.122 llvm/docs/LangRef.html:1.123
--- llvm/docs/LangRef.html:1.122	Thu Jan 12 19:20:27 2006
+++ llvm/docs/LangRef.html	Thu Jan 12 20:03:13 2006
@@ -127,6 +127,8 @@
         <ol>
           <li><a href="#i_returnaddress">'<tt>llvm.returnaddress</tt>' Intrinsic</a></li>
           <li><a href="#i_frameaddress">'<tt>llvm.frameaddress</tt>'   Intrinsic</a></li>
+          <li><a href="#i_stacksave">'<tt>llvm.stacksave</tt>' Intrinsic</a></li>
+          <li><a href="#i_stackrestore">'<tt>llvm.stackrestore</tt>' Intrinsic</a></li>
           <li><a href="#i_prefetch">'<tt>llvm.prefetch</tt>' Intrinsic</a></li>
           <li><a href="#i_pcmarker">'<tt>llvm.pcmarker</tt>' Intrinsic</a></li>
           <li><a href="#i_readcyclecounter"><tt>llvm.readcyclecounter</tt>' Intrinsic</a></li>
@@ -2789,6 +2791,72 @@
 
 <!-- _______________________________________________________________________ -->
 <div class="doc_subsubsection">
+  <a name="i_stacksave">'<tt>llvm.stacksave</tt>' Intrinsic</a>
+</div>
+
+<div class="doc_text">
+
+<h5>Syntax:</h5>
+<pre>
+  declare sbyte *%llvm.stacksave()
+</pre>
+
+<h5>Overview:</h5>
+
+<p>
+The '<tt>llvm.stacksave</tt>' intrinsic is used to remember the current state of
+the function stack, for use with <a href="#i_stackrestore">
+<tt>llvm.stackrestore</tt></a>.  This is useful for implementing language
+features like scoped automatic variable sized arrays in C99.
+</p>
+
+<h5>Semantics:</h5>
+
+<p>
+This intrinsic returns a opaque pointer value that can be passed to <a
+href="#i_stackrestore"><tt>llvm.stackrestore</tt></a>.  When an
+<tt>llvm.stackrestore</tt> intrinsic is executed with a value saved from 
+<tt>llvm.stacksave</tt>, it effectively restores the state of the stack to the
+state it was in when the <tt>llvm.stacksave</tt> intrinsic executed.  In
+practice, this pops any <a href="#i_alloca">alloca</a> blocks from the stack
+that were allocated after the <tt>llvm.stacksave</tt> was executed.
+</p>
+
+</div>
+
+<!-- _______________________________________________________________________ -->
+<div class="doc_subsubsection">
+  <a name="i_stackrestore">'<tt>llvm.stackrestore</tt>' Intrinsic</a>
+</div>
+
+<div class="doc_text">
+
+<h5>Syntax:</h5>
+<pre>
+  declare void %llvm.stackrestore(sbyte* %ptr)
+</pre>
+
+<h5>Overview:</h5>
+
+<p>
+The '<tt>llvm.stackrestore</tt>' intrinsic is used to restore the state of
+the function stack to the state it was in when the corresponding <a
+href="#llvm.stacksave"><tt>llvm.stacksave</tt></a> intrinsic executed.  This is
+useful for implementing language features like scoped automatic variable sized
+arrays in C99.
+</p>
+
+<h5>Semantics:</h5>
+
+<p>
+See the description for <a href="#i_stacksave"><tt>llvm.stacksave</tt></a>.
+</p>
+
+</div>
+
+
+<!-- _______________________________________________________________________ -->
+<div class="doc_subsubsection">
   <a name="i_prefetch">'<tt>llvm.prefetch</tt>' Intrinsic</a>
 </div>
 
@@ -3481,7 +3549,7 @@
 
   <a href="mailto:sabre at nondot.org">Chris Lattner</a><br>
   <a href="http://llvm.cs.uiuc.edu">The LLVM Compiler Infrastructure</a><br>
-  Last modified: $Date: 2006/01/13 01:20:27 $
+  Last modified: $Date: 2006/01/13 02:03:13 $
 </address>
 </body>
 </html>





From lattner at cs.uiuc.edu  Thu Jan 12 20:15:15 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu, 12 Jan 2006 20:15:15 -0600
Subject: [llvm-commits] CVS: llvm/include/llvm/Intrinsics.h 
Message-ID: <200601130215.UAA06581@zion.cs.uiuc.edu>



Changes in directory llvm/include/llvm:

Intrinsics.h updated: 1.33 -> 1.34
---
Log message:

add new llvm.stacksave/llvm.stackrestore intrinsics


---
Diffs of the changes:  (+2 -0)

 Intrinsics.h |    2 ++
 1 files changed, 2 insertions(+)


Index: llvm/include/llvm/Intrinsics.h
diff -u llvm/include/llvm/Intrinsics.h:1.33 llvm/include/llvm/Intrinsics.h:1.34
--- llvm/include/llvm/Intrinsics.h:1.33	Fri Nov 11 10:45:18 2005
+++ llvm/include/llvm/Intrinsics.h	Thu Jan 12 20:15:02 2006
@@ -34,6 +34,8 @@
     // Code generator intrinsics.
     returnaddress,    // Yields the return address of a dynamic call frame
     frameaddress,     // Yields the frame address of a dynamic call frame
+    stacksave,        // Save the stack pointer
+    stackrestore,     // Restore the stack pointer
     prefetch,         // Prefetch a value into the cache
     pcmarker,         // Export a PC from near the marker
     readcyclecounter, // Read cycle counter register





From lattner at cs.uiuc.edu  Thu Jan 12 20:15:52 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu, 12 Jan 2006 20:15:52 -0600
Subject: [llvm-commits] CVS: llvm/lib/VMCore/Function.cpp Verifier.cpp 
Message-ID: <200601130215.UAA06644@zion.cs.uiuc.edu>



Changes in directory llvm/lib/VMCore:

Function.cpp updated: 1.96 -> 1.97
Verifier.cpp updated: 1.138 -> 1.139
---
Log message:

Add recognition and verification of new llvm.stacksave/llvm.stackrestore intrinsics


---
Diffs of the changes:  (+18 -4)

 Function.cpp |   10 ++++++----
 Verifier.cpp |   12 ++++++++++++
 2 files changed, 18 insertions(+), 4 deletions(-)


Index: llvm/lib/VMCore/Function.cpp
diff -u llvm/lib/VMCore/Function.cpp:1.96 llvm/lib/VMCore/Function.cpp:1.97
--- llvm/lib/VMCore/Function.cpp:1.96	Fri Nov 11 10:46:18 2005
+++ llvm/lib/VMCore/Function.cpp	Thu Jan 12 20:15:39 2006
@@ -249,10 +249,12 @@
     if (getName() == "llvm.readcyclecounter") return Intrinsic::readcyclecounter;
     break;
   case 's':
-    if (getName() == "llvm.setjmp")     return Intrinsic::setjmp;
-    if (getName() == "llvm.sigsetjmp")  return Intrinsic::sigsetjmp;
-    if (getName() == "llvm.siglongjmp") return Intrinsic::siglongjmp;
-    if (getName() == "llvm.sqrt")       return Intrinsic::sqrt;
+    if (getName() == "llvm.setjmp")       return Intrinsic::setjmp;
+    if (getName() == "llvm.sigsetjmp")    return Intrinsic::sigsetjmp;
+    if (getName() == "llvm.siglongjmp")   return Intrinsic::siglongjmp;
+    if (getName() == "llvm.stackrestore") return Intrinsic::stackrestore;
+    if (getName() == "llvm.stacksave")    return Intrinsic::stacksave;
+    if (getName() == "llvm.sqrt")         return Intrinsic::sqrt;
     break;
   case 'v':
     if (getName() == "llvm.va_copy")  return Intrinsic::vacopy;


Index: llvm/lib/VMCore/Verifier.cpp
diff -u llvm/lib/VMCore/Verifier.cpp:1.138 llvm/lib/VMCore/Verifier.cpp:1.139
--- llvm/lib/VMCore/Verifier.cpp:1.138	Thu Jan 12 00:17:59 2006
+++ llvm/lib/VMCore/Verifier.cpp	Thu Jan 12 20:15:39 2006
@@ -796,6 +796,18 @@
   case Intrinsic::memmove:         NumArgs = 4; break;
   case Intrinsic::memset:          NumArgs = 4; break;
 
+  case Intrinsic::stacksave:
+    NumArgs = 0;
+    Assert1(CI.getType() == PointerType::get(Type::SByteTy),
+            "llvm.stacksave must return an sbyte*", &CI);
+    break;
+  case Intrinsic::stackrestore:
+    NumArgs = 1;
+    Assert1(CI.getOperand(1)->getType() == PointerType::get(Type::SByteTy),
+            "llvm.stackrestore must take an sbyte*", &CI);
+    Assert1(CI.getType() == Type::VoidTy,
+            "llvm.stackrestore return void", &CI);
+    break;
   case Intrinsic::prefetch:        NumArgs = 3; break;
   case Intrinsic::pcmarker:
     NumArgs = 1;





From lattner at cs.uiuc.edu  Thu Jan 12 20:22:21 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu, 12 Jan 2006 20:22:21 -0600
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/IntrinsicLowering.cpp 
Message-ID: <200601130222.UAA06715@zion.cs.uiuc.edu>



Changes in directory llvm/lib/CodeGen:

IntrinsicLowering.cpp updated: 1.36 -> 1.37
---
Log message:

Add "support" for the llvm.stacksave/stackrestore intrinsics, this is
used by the C backend.


---
Diffs of the changes:  (+15 -2)

 IntrinsicLowering.cpp |   17 +++++++++++++++--
 1 files changed, 15 insertions(+), 2 deletions(-)


Index: llvm/lib/CodeGen/IntrinsicLowering.cpp
diff -u llvm/lib/CodeGen/IntrinsicLowering.cpp:1.36 llvm/lib/CodeGen/IntrinsicLowering.cpp:1.37
--- llvm/lib/CodeGen/IntrinsicLowering.cpp:1.36	Fri Nov 11 10:46:18 2005
+++ llvm/lib/CodeGen/IntrinsicLowering.cpp	Thu Jan 12 20:22:08 2006
@@ -248,6 +248,19 @@
     break;
   }
 
+  case Intrinsic::stacksave:
+  case Intrinsic::stackrestore: {
+    static bool Warned = false;
+    if (!Warned)
+      std::cerr << "WARNING: this target does not support the llvm.stack"
+       << (Callee->getIntrinsicID() == Intrinsic::stacksave ?
+           "save" : "restore") << " intrinsic.\n";
+    Warned = true;
+    if (Callee->getIntrinsicID() == Intrinsic::stacksave)
+      CI->replaceAllUsesWith(Constant::getNullValue(CI->getType()));
+    break;
+  }
+    
   case Intrinsic::returnaddress:
   case Intrinsic::frameaddress:
     std::cerr << "WARNING: this target does not support the llvm."
@@ -263,8 +276,8 @@
   case Intrinsic::pcmarker:
     break;    // Simply strip out pcmarker on unsupported architectures
   case Intrinsic::readcyclecounter: {
-    std::cerr << "WARNING: this target does not support the llvm.readcyclecounter"
-              << " intrinsic.  It is being lowered to a constant 0\n";
+    std::cerr << "WARNING: this target does not support the llvm.readcyclecoun"
+              << "ter intrinsic.  It is being lowered to a constant 0\n";
     CI->replaceAllUsesWith(ConstantUInt::get(Type::ULongTy, 0));
     break;
   }





From lattner at cs.uiuc.edu  Thu Jan 12 20:24:55 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu, 12 Jan 2006 20:24:55 -0600
Subject: [llvm-commits] 
	CVS: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
Message-ID: <200601130224.UAA06776@zion.cs.uiuc.edu>



Changes in directory llvm/lib/CodeGen/SelectionDAG:

SelectionDAGISel.cpp updated: 1.121 -> 1.122
---
Log message:

Add "support" for stacksave/stackrestore to the dag isel


---
Diffs of the changes:  (+5 -0)

 SelectionDAGISel.cpp |    5 +++++
 1 files changed, 5 insertions(+)


Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.121 llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.122
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.121	Tue Jan 10 13:04:57 2006
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp	Thu Jan 12 20:24:42 2006
@@ -1004,6 +1004,11 @@
                              getValue(I.getOperand(1)).getValueType(),
                              getValue(I.getOperand(1))));
     return 0;
+  case Intrinsic::stacksave:
+    setValue(&I, DAG.getNode(ISD::UNDEF, TLI.getValueType(I.getType())));
+    return 0;  // FIXME: discard stacksave/restore
+  case Intrinsic::stackrestore:
+    return 0;  // FIXME: discard stacksave/restore
   case Intrinsic::prefetch:
     // FIXME: Currently discarding prefetches.
     return 0;





From lattner at cs.uiuc.edu  Thu Jan 12 20:25:21 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu, 12 Jan 2006 20:25:21 -0600
Subject: [llvm-commits] 
	CVS: llvm/test/Regression/CodeGen/stacksave-restore.ll
Message-ID: <200601130225.UAA06814@zion.cs.uiuc.edu>



Changes in directory llvm/test/Regression/CodeGen:

stacksave-restore.ll added (r1.1)
---
Log message:

testcase for the llvm.stacksave/llvm.stackrestore intrinsics.


---
Diffs of the changes:  (+12 -0)

 stacksave-restore.ll |   12 ++++++++++++
 1 files changed, 12 insertions(+)


Index: llvm/test/Regression/CodeGen/stacksave-restore.ll
diff -c /dev/null llvm/test/Regression/CodeGen/stacksave-restore.ll:1.1
*** /dev/null	Thu Jan 12 20:25:18 2006
--- llvm/test/Regression/CodeGen/stacksave-restore.ll	Thu Jan 12 20:25:08 2006
***************
*** 0 ****
--- 1,12 ----
+ ; RUN: llvm-as < %s | llc
+ 
+ declare sbyte* %llvm.stacksave()
+ declare void %llvm.stackrestore(sbyte*)
+ 
+ int *%test(uint %N) {
+ 	%tmp = call sbyte* %llvm.stacksave()
+ 	%P = alloca int, uint %N
+ 	call void %llvm.stackrestore(sbyte* %tmp)
+ 	%Q = alloca int, uint %N
+ 	ret int* %P
+ }





From lattner at cs.uiuc.edu  Thu Jan 12 20:39:15 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu, 12 Jan 2006 20:39:15 -0600
Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/SelectionDAGNodes.h 
Message-ID: <200601130239.UAA06921@zion.cs.uiuc.edu>



Changes in directory llvm/include/llvm/CodeGen:

SelectionDAGNodes.h updated: 1.89 -> 1.90
---
Log message:

add stacksave/stackrestore nodes


---
Diffs of the changes:  (+9 -0)

 SelectionDAGNodes.h |    9 +++++++++
 1 files changed, 9 insertions(+)


Index: llvm/include/llvm/CodeGen/SelectionDAGNodes.h
diff -u llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.89 llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.90
--- llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.89	Wed Jan 11 15:21:00 2006
+++ llvm/include/llvm/CodeGen/SelectionDAGNodes.h	Thu Jan 12 20:39:03 2006
@@ -312,6 +312,15 @@
     CALL,
     TAILCALL,
 
+    // STACKSAVE - STACKSAVE has one operand, an input chain.  It produces a
+    // value, the same type as the pointer type for the system, and an output
+    // chain.
+    STACKSAVE,
+    
+    // STACKRESTORE has two operands, an input chain and a pointer to restore to
+    // it returns an output chain.
+    STACKRESTORE,
+    
     // MEMSET/MEMCPY/MEMMOVE - The first operand is the chain, and the rest
     // correspond to the operands of the LLVM intrinsic functions.  The only
     // result is a token chain.  The alignment argument is guaranteed to be a





From lattner at cs.uiuc.edu  Thu Jan 12 20:39:55 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu, 12 Jan 2006 20:39:55 -0600
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp 
Message-ID: <200601130239.UAA06956@zion.cs.uiuc.edu>



Changes in directory llvm/lib/CodeGen/SelectionDAG:

SelectionDAG.cpp updated: 1.237 -> 1.238
---
Log message:

add stacksave/stackrestore nodes


---
Diffs of the changes:  (+6 -2)

 SelectionDAG.cpp |    8 ++++++--
 1 files changed, 6 insertions(+), 2 deletions(-)


Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.237 llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.238
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.237	Wed Jan 11 16:13:48 2006
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp	Thu Jan 12 20:39:42 2006
@@ -1982,8 +1982,12 @@
   case ISD::TRUNCSTORE: return "truncstore";
 
   case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
-  case ISD::EXTRACT_ELEMENT: return "extract_element";
-  case ISD::BUILD_PAIR: return "build_pair";
+  case ISD::EXTRACT_ELEMENT:    return "extract_element";
+  case ISD::BUILD_PAIR:         return "build_pair";
+  case ISD::STACKSAVE:          return "stacksave";
+  case ISD::STACKRESTORE:       return "stackrestore";
+    
+  // Block memory operations.
   case ISD::MEMSET:  return "memset";
   case ISD::MEMCPY:  return "memcpy";
   case ISD::MEMMOVE: return "memmove";





From lattner at cs.uiuc.edu  Thu Jan 12 20:41:11 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu, 12 Jan 2006 20:41:11 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/IA64/IA64ISelLowering.cpp
	IA64ISelPattern.cpp 
Message-ID: <200601130241.UAA07002@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/IA64:

IA64ISelLowering.cpp updated: 1.18 -> 1.19
IA64ISelPattern.cpp updated: 1.74 -> 1.75
---
Log message:

new nodes


---
Diffs of the changes:  (+8 -0)

 IA64ISelLowering.cpp |    4 ++++
 IA64ISelPattern.cpp  |    4 ++++
 2 files changed, 8 insertions(+)


Index: llvm/lib/Target/IA64/IA64ISelLowering.cpp
diff -u llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.18 llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.19
--- llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.18	Wed Jan 11 21:28:40 2006
+++ llvm/lib/Target/IA64/IA64ISelLowering.cpp	Thu Jan 12 20:40:58 2006
@@ -83,6 +83,10 @@
       setOperationAction(ISD::ROTL , MVT::i64  , Expand);
       setOperationAction(ISD::ROTR , MVT::i64  , Expand);
 
+      // Not implemented yet.
+      setOperationAction(ISD::STACKSAVE, MVT::Other, Expand);
+      setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand);
+
       computeRegisterProperties();
 
       addLegalFPImmediate(+0.0);


Index: llvm/lib/Target/IA64/IA64ISelPattern.cpp
diff -u llvm/lib/Target/IA64/IA64ISelPattern.cpp:1.74 llvm/lib/Target/IA64/IA64ISelPattern.cpp:1.75
--- llvm/lib/Target/IA64/IA64ISelPattern.cpp:1.74	Wed Jan 11 17:20:28 2006
+++ llvm/lib/Target/IA64/IA64ISelPattern.cpp	Thu Jan 12 20:40:58 2006
@@ -107,6 +107,10 @@
       setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand);
       setOperationAction(ISD::DEBUG_LABEL, MVT::Other, Expand);
 
+      // Not implemented yet.
+      setOperationAction(ISD::STACKSAVE, MVT::Other, Expand); 
+      setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand);
+
       computeRegisterProperties();
 
       addLegalFPImmediate(+0.0);





From lattner at cs.uiuc.edu  Thu Jan 12 20:43:07 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu, 12 Jan 2006 20:43:07 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
Message-ID: <200601130243.UAA07063@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/SparcV8:

SparcV8ISelDAGToDAG.cpp updated: 1.48 -> 1.49
---
Log message:

expand unsupported stacksave/stackrestore nodes


---
Diffs of the changes:  (+4 -0)

 SparcV8ISelDAGToDAG.cpp |    4 ++++
 1 files changed, 4 insertions(+)


Index: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
diff -u llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.48 llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.49
--- llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.48	Thu Jan 12 11:05:32 2006
+++ llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp	Thu Jan 12 20:42:53 2006
@@ -160,6 +160,10 @@
   setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand);
   setOperationAction(ISD::DEBUG_LABEL, MVT::Other, Expand);
 
+  // Not implemented yet.
+  setOperationAction(ISD::STACKSAVE, MVT::Other, Expand); 
+  setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand);
+
   computeRegisterProperties();
 }
 





From lattner at cs.uiuc.edu  Thu Jan 12 20:43:07 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu, 12 Jan 2006 20:43:07 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelLowering.cpp 
Message-ID: <200601130243.UAA07061@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/PowerPC:

PPCISelLowering.cpp updated: 1.63 -> 1.64
---
Log message:

expand unsupported stacksave/stackrestore nodes


---
Diffs of the changes:  (+4 -0)

 PPCISelLowering.cpp |    4 ++++
 1 files changed, 4 insertions(+)


Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.63 llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.64
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.63	Wed Jan 11 15:21:00 2006
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp	Thu Jan 12 20:42:53 2006
@@ -108,6 +108,10 @@
   // appropriate instructions to materialize the address.
   setOperationAction(ISD::GlobalAddress, MVT::i32, Custom);
   setOperationAction(ISD::ConstantPool,  MVT::i32, Custom);
+
+  // Not implemented yet.
+  setOperationAction(ISD::STACKSAVE, MVT::Other, Expand); 
+  setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand);
   
   if (TM.getSubtarget<PPCSubtarget>().is64Bit()) {
     // They also have instructions for converting between i64 and fp.





From lattner at cs.uiuc.edu  Thu Jan 12 20:43:07 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu, 12 Jan 2006 20:43:07 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaISelLowering.cpp 
Message-ID: <200601130243.UAA07069@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/Alpha:

AlphaISelLowering.cpp updated: 1.19 -> 1.20
---
Log message:

expand unsupported stacksave/stackrestore nodes


---
Diffs of the changes:  (+4 -0)

 AlphaISelLowering.cpp |    4 ++++
 1 files changed, 4 insertions(+)


Index: llvm/lib/Target/Alpha/AlphaISelLowering.cpp
diff -u llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.19 llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.20
--- llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.19	Wed Jan 11 15:21:00 2006
+++ llvm/lib/Target/Alpha/AlphaISelLowering.cpp	Thu Jan 12 20:42:53 2006
@@ -107,6 +107,10 @@
   setOperationAction(ISD::LOCATION, MVT::Other, Expand);
   setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand);
   setOperationAction(ISD::DEBUG_LABEL, MVT::Other, Expand);
+
+  // Not implemented yet.
+  setOperationAction(ISD::STACKSAVE, MVT::Other, Expand); 
+  setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand);
   
   // We want to legalize GlobalAddress and ConstantPool and
   // ExternalSymbols nodes into the appropriate instructions to





From lattner at cs.uiuc.edu  Thu Jan 12 20:43:07 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu, 12 Jan 2006 20:43:07 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp 
Message-ID: <200601130243.UAA07074@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/X86:

X86ISelLowering.cpp updated: 1.37 -> 1.38
---
Log message:

expand unsupported stacksave/stackrestore nodes


---
Diffs of the changes:  (+4 -0)

 X86ISelLowering.cpp |    4 ++++
 1 files changed, 4 insertions(+)


Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.37 llvm/lib/Target/X86/X86ISelLowering.cpp:1.38
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.37	Thu Jan 12 19:17:24 2006
+++ llvm/lib/Target/X86/X86ISelLowering.cpp	Thu Jan 12 20:42:53 2006
@@ -159,6 +159,10 @@
   setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand);
   setOperationAction(ISD::DEBUG_LABEL, MVT::Other, Expand);
 
+  // Not implemented yet.
+  setOperationAction(ISD::STACKSAVE, MVT::Other, Expand); 
+  setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand);
+
   if (X86ScalarSSE) {
     // Set up the FP register classes.
     addRegisterClass(MVT::f32, X86::FR32RegisterClass);





From lattner at cs.uiuc.edu  Thu Jan 12 20:50:15 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu, 12 Jan 2006 20:50:15 -0600
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
	SelectionDAGISel.cpp 
Message-ID: <200601130250.UAA07173@zion.cs.uiuc.edu>



Changes in directory llvm/lib/CodeGen/SelectionDAG:

LegalizeDAG.cpp updated: 1.260 -> 1.261
SelectionDAGISel.cpp updated: 1.122 -> 1.123
---
Log message:

Compile llvm.stacksave/restore into STACKSAVE/STACKRESTORE nodes, and allow
targets to custom expand them as they desire.


---
Diffs of the changes:  (+72 -4)

 LegalizeDAG.cpp      |   58 +++++++++++++++++++++++++++++++++++++++++++++++++++
 SelectionDAGISel.cpp |   18 ++++++++++++---
 2 files changed, 72 insertions(+), 4 deletions(-)


Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.260 llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.261
--- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.260	Wed Jan 11 16:14:47 2006
+++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp	Thu Jan 12 20:50:02 2006
@@ -1425,6 +1425,64 @@
     if (Tmp1 != Node->getOperand(0))
       Result = DAG.getNode(ISD::PCMARKER, MVT::Other, Tmp1,Node->getOperand(1));
     break;
+  case ISD::STACKSAVE:
+    Tmp1 = LegalizeOp(Node->getOperand(0));  // Legalize the chain.
+    if (Tmp1 != Node->getOperand(0)) {
+      std::vector<MVT::ValueType> VTs;
+      VTs.push_back(Node->getValueType(0));
+      VTs.push_back(MVT::Other);
+      std::vector<SDOperand> Ops;
+      Ops.push_back(Tmp1);
+      Result = DAG.getNode(ISD::STACKSAVE, VTs, Ops);
+    }
+      
+    switch (TLI.getOperationAction(ISD::STACKSAVE, MVT::Other)) {
+    default: assert(0 && "This action is not supported yet!");
+    case TargetLowering::Custom: {
+      SDOperand Tmp = TLI.LowerOperation(Result, DAG);
+      if (Tmp.Val) {
+        Result = LegalizeOp(Tmp);
+        break;
+      }
+      // FALLTHROUGH if the target thinks it is legal.
+    }
+    case TargetLowering::Legal:
+      // Since stacksave produce two values, make sure to remember that we
+      // legalized both of them.
+      AddLegalizedOperand(SDOperand(Node, 0), Result);
+      AddLegalizedOperand(SDOperand(Node, 1), Result.getValue(1));
+      return Result.getValue(Op.ResNo);
+    case TargetLowering::Expand:
+      Tmp1 = DAG.getNode(ISD::UNDEF, Node->getValueType(0));
+      AddLegalizedOperand(SDOperand(Node, 0), Tmp1);
+      AddLegalizedOperand(SDOperand(Node, 1), Node->getOperand(0));
+      return Op.ResNo ? Node->getOperand(0) : Tmp1;
+    }
+    
+  case ISD::STACKRESTORE:
+    Tmp1 = LegalizeOp(Node->getOperand(0));  // Legalize the chain.
+    Tmp2 = LegalizeOp(Node->getOperand(1));  // Legalize the pointer.
+    if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1))
+      Result = DAG.getNode(ISD::STACKRESTORE, MVT::Other, Tmp1, Tmp2);
+      
+    switch (TLI.getOperationAction(ISD::STACKRESTORE, MVT::Other)) {
+    default: assert(0 && "This action is not supported yet!");
+    case TargetLowering::Custom: {
+      SDOperand Tmp = TLI.LowerOperation(Result, DAG);
+      if (Tmp.Val) {
+        Result = LegalizeOp(Tmp);
+        break;
+      }
+      // FALLTHROUGH if the target thinks it is legal.
+    }
+    case TargetLowering::Legal:
+      break;
+    case TargetLowering::Expand:
+      Result = Tmp1;
+      break;
+    }
+    break;
+
   case ISD::READCYCLECOUNTER:
     Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain
     if (Tmp1 != Node->getOperand(0)) {


Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.122 llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.123
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.122	Thu Jan 12 20:24:42 2006
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp	Thu Jan 12 20:50:02 2006
@@ -1004,11 +1004,21 @@
                              getValue(I.getOperand(1)).getValueType(),
                              getValue(I.getOperand(1))));
     return 0;
-  case Intrinsic::stacksave:
-    setValue(&I, DAG.getNode(ISD::UNDEF, TLI.getValueType(I.getType())));
-    return 0;  // FIXME: discard stacksave/restore
+  case Intrinsic::stacksave: {
+    std::vector<MVT::ValueType> VTs;
+    VTs.push_back(TLI.getPointerTy());
+    VTs.push_back(MVT::Other);
+    std::vector<SDOperand> Ops;
+    Ops.push_back(getRoot());
+    SDOperand Tmp = DAG.getNode(ISD::STACKSAVE, VTs, Ops);
+    setValue(&I, Tmp);
+    DAG.setRoot(Tmp.getValue(1));
+    return 0;
+  }
   case Intrinsic::stackrestore:
-    return 0;  // FIXME: discard stacksave/restore
+    DAG.setRoot(DAG.getNode(ISD::STACKRESTORE, MVT::Other, DAG.getRoot(),
+                            getValue(I.getOperand(1))));
+    return 0;
   case Intrinsic::prefetch:
     // FIXME: Currently discarding prefetches.
     return 0;





From duraid at octopus.com.au  Fri Jan 13 04:28:44 2006
From: duraid at octopus.com.au (Duraid Madina)
Date: Fri, 13 Jan 2006 04:28:44 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp 
Message-ID: <200601131028.EAA14342@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/IA64:

IA64ISelDAGToDAG.cpp updated: 1.19 -> 1.20
---
Log message:

don't be a doofus - this fixes storing bools



---
Diffs of the changes:  (+5 -2)

 IA64ISelDAGToDAG.cpp |    7 +++++--
 1 files changed, 5 insertions(+), 2 deletions(-)


Index: llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp
diff -u llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp:1.19 llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp:1.20
--- llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp:1.19	Wed Jan 11 13:53:22 2006
+++ llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp	Fri Jan 13 04:28:25 2006
@@ -571,9 +571,12 @@
       default: assert(0 && "unknown type in store");
       case MVT::i1: { // this is a bool
         Opc = IA64::ST1; // we store either 0 or 1 as a byte 
+	// first load zero!
+	SDOperand Initial = CurDAG->getCopyFromReg(Chain, IA64::r0, MVT::i64);
+	Chain = Initial.getValue(1);
+	// then load 1 iff the predicate to store is 1
         SDOperand Tmp = 
-          CurDAG->getTargetNode(IA64::PADDS, MVT::i64,
-                                CurDAG->getRegister(IA64::r0, MVT::i64),
+          CurDAG->getTargetNode(IA64::PADDS, MVT::i64, Initial,
                                 CurDAG->getConstant(1, MVT::i64),
                                 Select(N->getOperand(1)));
         return CurDAG->SelectNodeTo(N, Opc, MVT::Other, Address, Tmp, Chain);





From lattner at cs.uiuc.edu  Fri Jan 13 11:48:04 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 13 Jan 2006 11:48:04 -0600
Subject: [llvm-commits] CVS: llvm/include/llvm/Target/TargetLowering.h 
Message-ID: <200601131748.LAA20057@zion.cs.uiuc.edu>



Changes in directory llvm/include/llvm/Target:

TargetLowering.h updated: 1.33 -> 1.34
---
Log message:

Provide an interface for Targets to specify their stack pointer register
for llvm.stacksave/restore.


---
Diffs of the changes:  (+19 -0)

 TargetLowering.h |   19 +++++++++++++++++++
 1 files changed, 19 insertions(+)


Index: llvm/include/llvm/Target/TargetLowering.h
diff -u llvm/include/llvm/Target/TargetLowering.h:1.33 llvm/include/llvm/Target/TargetLowering.h:1.34
--- llvm/include/llvm/Target/TargetLowering.h:1.33	Wed Dec 21 19:46:59 2005
+++ llvm/include/llvm/Target/TargetLowering.h	Fri Jan 13 11:47:52 2006
@@ -234,6 +234,13 @@
   bool usesUnderscoreSetJmpLongJmp() const {
     return UseUnderscoreSetJmpLongJmp;
   }
+  
+  /// getStackPointerRegisterToSaveRestore - If a physical register, this
+  /// specifies the register that llvm.savestack/llvm.restorestack should save
+  /// and restore.
+  unsigned getStackPointerRegisterToSaveRestore() const {
+    return StackPointerRegisterToSaveRestore;
+  }
 
   //===--------------------------------------------------------------------===//
   // TargetLowering Configuration Methods - These methods should be invoked by
@@ -267,6 +274,13 @@
     UseUnderscoreSetJmpLongJmp = Val;
   }
   
+  /// setStackPointerRegisterToSaveRestore - If set to a physical register, this
+  /// specifies the register that llvm.savestack/llvm.restorestack should save
+  /// and restore.
+  void setStackPointerRegisterToSaveRestore(unsigned R) {
+    StackPointerRegisterToSaveRestore = R;
+  }
+  
   /// setSetCCIxExpensive - This is a short term hack for targets that codegen
   /// setcc as a conditional branch.  This encourages the code generator to fold
   /// setcc operations into other operations if possible.
@@ -443,6 +457,11 @@
   /// UseUnderscoreSetJmpLongJmp - This target prefers to use _setjmp and
   /// _longjmp to implement llvm.setjmp/llvm.longjmp.  Defaults to false.
   bool UseUnderscoreSetJmpLongJmp;
+  
+  /// StackPointerRegisterToSaveRestore - If set to a physical register, this
+  /// specifies the register that llvm.savestack/llvm.restorestack should save
+  /// and restore.
+  unsigned StackPointerRegisterToSaveRestore;
 
   /// RegClassForVT - This indicates the default register class to use for
   /// each ValueType the target supports natively.





From lattner at cs.uiuc.edu  Fri Jan 13 11:48:57 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 13 Jan 2006 11:48:57 -0600
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp 
Message-ID: <200601131748.LAA20149@zion.cs.uiuc.edu>



Changes in directory llvm/lib/CodeGen/SelectionDAG:

LegalizeDAG.cpp updated: 1.261 -> 1.262
---
Log message:

If a target specified a stack pointer with setStackPointerRegisterToSaveRestore,
lower STACKSAVE/STACKRESTORE into a copy from/to that register.


---
Diffs of the changes:  (+21 -5)

 LegalizeDAG.cpp |   26 +++++++++++++++++++++-----
 1 files changed, 21 insertions(+), 5 deletions(-)


Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.261 llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.262
--- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.261	Thu Jan 12 20:50:02 2006
+++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp	Fri Jan 13 11:48:44 2006
@@ -1453,10 +1453,20 @@
       AddLegalizedOperand(SDOperand(Node, 1), Result.getValue(1));
       return Result.getValue(Op.ResNo);
     case TargetLowering::Expand:
-      Tmp1 = DAG.getNode(ISD::UNDEF, Node->getValueType(0));
-      AddLegalizedOperand(SDOperand(Node, 0), Tmp1);
-      AddLegalizedOperand(SDOperand(Node, 1), Node->getOperand(0));
-      return Op.ResNo ? Node->getOperand(0) : Tmp1;
+      // Expand to CopyFromReg if the target set 
+      // StackPointerRegisterToSaveRestore.
+      if (unsigned SP = TLI.getStackPointerRegisterToSaveRestore()) {
+        Tmp1 = DAG.getCopyFromReg(Node->getOperand(0), SP, 
+                                  Node->getValueType(0));
+        AddLegalizedOperand(SDOperand(Node, 0), Tmp1);
+        AddLegalizedOperand(SDOperand(Node, 1), Tmp1.getValue(1));
+        return Tmp1.getValue(Op.ResNo);
+      } else {
+        Tmp1 = DAG.getNode(ISD::UNDEF, Node->getValueType(0));
+        AddLegalizedOperand(SDOperand(Node, 0), Tmp1);
+        AddLegalizedOperand(SDOperand(Node, 1), Node->getOperand(0));
+        return Op.ResNo ? Node->getOperand(0) : Tmp1;
+      }
     }
     
   case ISD::STACKRESTORE:
@@ -1478,7 +1488,13 @@
     case TargetLowering::Legal:
       break;
     case TargetLowering::Expand:
-      Result = Tmp1;
+      // Expand to CopyToReg if the target set 
+      // StackPointerRegisterToSaveRestore.
+      if (unsigned SP = TLI.getStackPointerRegisterToSaveRestore()) {
+        Result = DAG.getCopyToReg(Tmp1, SP, Tmp2);
+      } else {
+        Result = Tmp1;
+      }
       break;
     }
     break;





From lattner at cs.uiuc.edu  Fri Jan 13 11:52:16 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 13 Jan 2006 11:52:16 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelLowering.cpp 
Message-ID: <200601131752.LAA20206@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/PowerPC:

PPCISelLowering.cpp updated: 1.64 -> 1.65
---
Log message:

implement stacksave/stackrestore on PPC


---
Diffs of the changes:  (+1 -0)

 PPCISelLowering.cpp |    1 +
 1 files changed, 1 insertion(+)


Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.64 llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.65
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.64	Thu Jan 12 20:42:53 2006
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp	Fri Jan 13 11:52:03 2006
@@ -142,6 +142,7 @@
   }
   
   setSetCCResultContents(ZeroOrOneSetCCResult);
+  setStackPointerRegisterToSaveRestore(PPC::R1);
   
   computeRegisterProperties();
 }





From lattner at cs.uiuc.edu  Fri Jan 13 12:01:06 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 13 Jan 2006 12:01:06 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp
	X86ISelPattern.cpp 
Message-ID: <200601131801.MAA20333@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/X86:

X86ISelLowering.cpp updated: 1.38 -> 1.39
X86ISelPattern.cpp updated: 1.195 -> 1.196
---
Log message:

Enable X86 support for savestack/restorestack


---
Diffs of the changes:  (+2 -1)

 X86ISelLowering.cpp |    1 +
 X86ISelPattern.cpp  |    2 +-
 2 files changed, 2 insertions(+), 1 deletion(-)


Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.38 llvm/lib/Target/X86/X86ISelLowering.cpp:1.39
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.38	Thu Jan 12 20:42:53 2006
+++ llvm/lib/Target/X86/X86ISelLowering.cpp	Fri Jan 13 12:00:54 2006
@@ -39,6 +39,7 @@
   setSetCCResultType(MVT::i8);
   setSetCCResultContents(ZeroOrOneSetCCResult);
   setShiftAmountFlavor(Mask);   // shl X, 32 == shl X, 0
+  setStackPointerRegisterToSaveRestore(X86::ESP);
 
   // Set up the register classes.
   addRegisterClass(MVT::i8, X86::R8RegisterClass);


Index: llvm/lib/Target/X86/X86ISelPattern.cpp
diff -u llvm/lib/Target/X86/X86ISelPattern.cpp:1.195 llvm/lib/Target/X86/X86ISelPattern.cpp:1.196
--- llvm/lib/Target/X86/X86ISelPattern.cpp:1.195	Thu Jan 12 16:54:21 2006
+++ llvm/lib/Target/X86/X86ISelPattern.cpp	Fri Jan 13 12:00:54 2006
@@ -1229,7 +1229,7 @@
       cast<RegisterSDNode>(Node->getOperand(1))->getReg() :
       cast<RegisterSDNode>(Node)->getReg();
     // Just use the specified register as our input if we can.
-    if (MRegisterInfo::isVirtualRegister(Reg) || Reg == X86::ESP)
+    if (MRegisterInfo::isVirtualRegister(Reg))
       return Reg;
   } 
 





From lattner at cs.uiuc.edu  Fri Jan 13 12:07:08 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 13 Jan 2006 12:07:08 -0600
Subject: [llvm-commits] CVS: llvm/lib/Transforms/IPO/Inliner.cpp 
Message-ID: <200601131807.MAA20438@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Transforms/IPO:

Inliner.cpp updated: 1.24 -> 1.25
---
Log message:

Fix 80 column violations


---
Diffs of the changes:  (+3 -2)

 Inliner.cpp |    5 +++--
 1 files changed, 3 insertions(+), 2 deletions(-)


Index: llvm/lib/Transforms/IPO/Inliner.cpp
diff -u llvm/lib/Transforms/IPO/Inliner.cpp:1.24 llvm/lib/Transforms/IPO/Inliner.cpp:1.25
--- llvm/lib/Transforms/IPO/Inliner.cpp:1.24	Thu Apr 21 18:39:37 2005
+++ llvm/lib/Transforms/IPO/Inliner.cpp	Fri Jan 13 12:06:56 2006
@@ -27,10 +27,11 @@
 
 namespace {
   Statistic<> NumInlined("inline", "Number of functions inlined");
-  Statistic<> NumDeleted("inline", "Number of functions deleted because all callers found");
+  Statistic<> NumDeleted("inline",
+                       "Number of functions deleted because all callers found");
   cl::opt<unsigned>             // FIXME: 200 is VERY conservative
   InlineLimit("inline-threshold", cl::Hidden, cl::init(200),
-              cl::desc("Control the amount of inlining to perform (default = 200)"));
+        cl::desc("Control the amount of inlining to perform (default = 200)"));
 }
 
 Inliner::Inliner() : InlineThreshold(InlineLimit) {}





From lattner at cs.uiuc.edu  Fri Jan 13 12:17:00 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 13 Jan 2006 12:17:00 -0600
Subject: [llvm-commits] CVS: llvm/lib/Transforms/Utils/InlineFunction.cpp 
Message-ID: <200601131817.MAA20551@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Transforms/Utils:

InlineFunction.cpp updated: 1.35 -> 1.36
---
Log message:

Fix a bug I noticed by inspection: if the first instruction in the inlined
function was not an alloca, we wouldn't check the entry block for any allocas,
leading to increased stack space in some cases.  In practice, allocas are almost
always at the top of the block, so this was never noticed.


---
Diffs of the changes:  (+3 -5)

 InlineFunction.cpp |    8 +++-----
 1 files changed, 3 insertions(+), 5 deletions(-)


Index: llvm/lib/Transforms/Utils/InlineFunction.cpp
diff -u llvm/lib/Transforms/Utils/InlineFunction.cpp:1.35 llvm/lib/Transforms/Utils/InlineFunction.cpp:1.36
--- llvm/lib/Transforms/Utils/InlineFunction.cpp:1.35	Wed Jul 27 01:12:34 2005
+++ llvm/lib/Transforms/Utils/InlineFunction.cpp	Fri Jan 13 12:16:48 2006
@@ -10,9 +10,6 @@
 // This file implements inlining of a function into a call site, resolving
 // parameters and the return value as appropriate.
 //
-// FIXME: This pass should transform alloca instructions in the called function
-// into alloca/dealloca pairs!  Or perhaps it should refuse to inline them!
-//
 //===----------------------------------------------------------------------===//
 
 #include "llvm/Transforms/Utils/Cloning.h"
@@ -87,13 +84,14 @@
   // calculate which instruction they should be inserted before.  We insert the
   // instructions at the end of the current alloca list.
   //
-  if (isa<AllocaInst>(FirstNewBlock->begin())) {
+  {
     BasicBlock::iterator InsertPoint = Caller->begin()->begin();
     for (BasicBlock::iterator I = FirstNewBlock->begin(),
            E = FirstNewBlock->end(); I != E; )
       if (AllocaInst *AI = dyn_cast<AllocaInst>(I++))
         if (isa<Constant>(AI->getArraySize())) {
-          // Scan for the block of allocas that we can move over.
+          // Scan for the block of allocas that we can move over, and move them
+          // all at once.
           while (isa<AllocaInst>(I) &&
                  isa<Constant>(cast<AllocaInst>(I)->getArraySize()))
             ++I;





From lattner at cs.uiuc.edu  Fri Jan 13 12:38:21 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 13 Jan 2006 12:38:21 -0600
Subject: [llvm-commits] CVS: llvm/include/llvm/Transforms/Utils/Cloning.h 
Message-ID: <200601131838.MAA20750@zion.cs.uiuc.edu>



Changes in directory llvm/include/llvm/Transforms/Utils:

Cloning.h updated: 1.16 -> 1.17
---
Log message:

Allow the code cloning interfaces to capture some important info about the
code being cloned if the client wants.


---
Diffs of the changes:  (+39 -6)

 Cloning.h |   45 +++++++++++++++++++++++++++++++++++++++------
 1 files changed, 39 insertions(+), 6 deletions(-)


Index: llvm/include/llvm/Transforms/Utils/Cloning.h
diff -u llvm/include/llvm/Transforms/Utils/Cloning.h:1.16 llvm/include/llvm/Transforms/Utils/Cloning.h:1.17
--- llvm/include/llvm/Transforms/Utils/Cloning.h:1.16	Thu Apr 21 15:59:05 2005
+++ llvm/include/llvm/Transforms/Utils/Cloning.h	Fri Jan 13 12:38:08 2006
@@ -37,6 +37,31 @@
 ///
 Module *CloneModule(const Module *M);
 
+/// ClonedCodeInfo - This struct can be used to capture information about code
+/// being cloned, while it is being cloned.
+struct ClonedCodeInfo {
+  /// ContainsCalls - This is set to true if the cloned code contains a normal
+  /// call instruction.
+  bool ContainsCalls;
+  
+  /// ContainsUnwinds - This is set to true if the cloned code contains an
+  /// unwind instruction.
+  bool ContainsUnwinds;
+  
+  /// ContainsDynamicAllocas - This is set to true if the cloned code contains
+  /// a 'dynamic' alloca.  Dynamic allocas are allocas that are either not in
+  /// the entry block or they are in the entry block but are not a constant
+  /// size.
+  bool ContainsDynamicAllocas;
+  
+  ClonedCodeInfo() {
+    ContainsCalls = false;
+    ContainsUnwinds = false;
+    ContainsDynamicAllocas = false;
+  }
+};
+
+
 /// CloneBasicBlock - Return a copy of the specified basic block, but without
 /// embedding the block into a particular function.  The block returned is an
 /// exact copy of the specified basic block, without any remapping having been
@@ -61,9 +86,14 @@
 /// If you would like the basic block to be auto-inserted into the end of a
 /// function, you can specify it as the optional fourth parameter.
 ///
+/// If you would like to collect additional information about the cloned
+/// function, you can specify a ClonedCodeInfo object with the optional fifth
+/// parameter.
+///
 BasicBlock *CloneBasicBlock(const BasicBlock *BB,
                             std::map<const Value*, Value*> &ValueMap,
-                            const char *NameSuffix = "", Function *F = 0);
+                            const char *NameSuffix = "", Function *F = 0,
+                            ClonedCodeInfo *CodeInfo = 0);
 
 
 /// CloneFunction - Return a copy of the specified function, but without
@@ -72,16 +102,18 @@
 /// original one.  If any of the arguments to the function are in the ValueMap,
 /// the arguments are deleted from the resultant function.  The ValueMap is
 /// updated to include mappings from all of the instructions and basicblocks in
-/// the function from their old to new values.
+/// the function from their old to new values.  The final argument captures
+/// information about the cloned code if non-null.
 ///
 Function *CloneFunction(const Function *F,
-                        std::map<const Value*, Value*> &ValueMap);
+                        std::map<const Value*, Value*> &ValueMap,
+                        ClonedCodeInfo *CodeInfo = 0);
 
 /// CloneFunction - Version of the function that doesn't need the ValueMap.
 ///
-inline Function *CloneFunction(const Function *F) {
+inline Function *CloneFunction(const Function *F, ClonedCodeInfo *CodeInfo = 0){
   std::map<const Value*, Value*> ValueMap;
-  return CloneFunction(F, ValueMap);
+  return CloneFunction(F, ValueMap, CodeInfo);
 }
 
 /// Clone OldFunc into NewFunc, transforming the old arguments into references
@@ -93,7 +125,8 @@
 void CloneFunctionInto(Function *NewFunc, const Function *OldFunc,
                        std::map<const Value*, Value*> &ValueMap,
                        std::vector<ReturnInst*> &Returns,
-                       const char *NameSuffix = "");
+                       const char *NameSuffix = "", 
+                       ClonedCodeInfo *CodeInfo = 0);
 
 
 /// CloneTraceInto - Clone T into NewFunc. Original<->clone mapping is





From lattner at cs.uiuc.edu  Fri Jan 13 12:39:30 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 13 Jan 2006 12:39:30 -0600
Subject: [llvm-commits] CVS: llvm/lib/Transforms/Utils/CloneFunction.cpp 
Message-ID: <200601131839.MAA20814@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Transforms/Utils:

CloneFunction.cpp updated: 1.25 -> 1.26
---
Log message:

Allow the code cloning interfaces to capture some important info about the
code being cloned if the client wants.


---
Diffs of the changes:  (+35 -11)

 CloneFunction.cpp |   46 +++++++++++++++++++++++++++++++++++-----------
 1 files changed, 35 insertions(+), 11 deletions(-)


Index: llvm/lib/Transforms/Utils/CloneFunction.cpp
diff -u llvm/lib/Transforms/Utils/CloneFunction.cpp:1.25 llvm/lib/Transforms/Utils/CloneFunction.cpp:1.26
--- llvm/lib/Transforms/Utils/CloneFunction.cpp:1.25	Thu Apr 21 18:45:33 2005
+++ llvm/lib/Transforms/Utils/CloneFunction.cpp	Fri Jan 13 12:39:17 2006
@@ -14,8 +14,9 @@
 //===----------------------------------------------------------------------===//
 
 #include "llvm/Transforms/Utils/Cloning.h"
-#include "llvm/Instructions.h"
+#include "llvm/Constants.h"
 #include "llvm/DerivedTypes.h"
+#include "llvm/Instructions.h"
 #include "llvm/Function.h"
 #include "ValueMapper.h"
 using namespace llvm;
@@ -23,11 +24,14 @@
 // CloneBasicBlock - See comments in Cloning.h
 BasicBlock *llvm::CloneBasicBlock(const BasicBlock *BB,
                                   std::map<const Value*, Value*> &ValueMap,
-                                  const char *NameSuffix, Function *F) {
+                                  const char *NameSuffix, Function *F,
+                                  ClonedCodeInfo *CodeInfo) {
   BasicBlock *NewBB = new BasicBlock("", F);
   if (BB->hasName()) NewBB->setName(BB->getName()+NameSuffix);
 
-  // Loop over all instructions copying them over...
+  bool hasCalls = false, hasDynamicAllocas = false, hasStaticAllocas = false;
+  
+  // Loop over all instructions, and copy them over.
   for (BasicBlock::const_iterator II = BB->begin(), IE = BB->end();
        II != IE; ++II) {
     Instruction *NewInst = II->clone();
@@ -35,6 +39,22 @@
       NewInst->setName(II->getName()+NameSuffix);
     NewBB->getInstList().push_back(NewInst);
     ValueMap[II] = NewInst;                // Add instruction map to value.
+    
+    hasCalls |= isa<CallInst>(II);
+    if (const AllocaInst *AI = dyn_cast<AllocaInst>(II)) {
+      if (isa<ConstantInt>(AI->getArraySize()))
+        hasStaticAllocas = true;
+      else
+        hasDynamicAllocas = true;
+    }
+  }
+  
+  if (CodeInfo) {
+    CodeInfo->ContainsCalls          |= hasCalls;
+    CodeInfo->ContainsUnwinds        |= isa<UnwindInst>(BB->getTerminator());
+    CodeInfo->ContainsDynamicAllocas |= hasDynamicAllocas;
+    CodeInfo->ContainsDynamicAllocas |= hasStaticAllocas && 
+                                        BB != &BB->getParent()->front();
   }
   return NewBB;
 }
@@ -45,12 +65,12 @@
 void llvm::CloneFunctionInto(Function *NewFunc, const Function *OldFunc,
                              std::map<const Value*, Value*> &ValueMap,
                              std::vector<ReturnInst*> &Returns,
-                             const char *NameSuffix) {
+                             const char *NameSuffix, ClonedCodeInfo *CodeInfo) {
   assert(NameSuffix && "NameSuffix cannot be null!");
 
 #ifndef NDEBUG
-  for (Function::const_arg_iterator I = OldFunc->arg_begin(), E = OldFunc->arg_end();
-       I != E; ++I)
+  for (Function::const_arg_iterator I = OldFunc->arg_begin(), 
+       E = OldFunc->arg_end(); I != E; ++I)
     assert(ValueMap.count(I) && "No mapping from source argument specified!");
 #endif
 
@@ -63,7 +83,8 @@
     const BasicBlock &BB = *BI;
 
     // Create a new basic block and copy instructions into it!
-    BasicBlock *CBB = CloneBasicBlock(&BB, ValueMap, NameSuffix, NewFunc);
+    BasicBlock *CBB = CloneBasicBlock(&BB, ValueMap, NameSuffix, NewFunc,
+                                      CodeInfo);
     ValueMap[&BB] = CBB;                       // Add basic block mapping.
 
     if (ReturnInst *RI = dyn_cast<ReturnInst>(CBB->getTerminator()))
@@ -89,13 +110,15 @@
 /// the function from their old to new values.
 ///
 Function *llvm::CloneFunction(const Function *F,
-                              std::map<const Value*, Value*> &ValueMap) {
+                              std::map<const Value*, Value*> &ValueMap,
+                              ClonedCodeInfo *CodeInfo) {
   std::vector<const Type*> ArgTypes;
 
   // The user might be deleting arguments to the function by specifying them in
   // the ValueMap.  If so, we need to not add the arguments to the arg ty vector
   //
-  for (Function::const_arg_iterator I = F->arg_begin(), E = F->arg_end(); I != E; ++I)
+  for (Function::const_arg_iterator I = F->arg_begin(), E = F->arg_end();
+       I != E; ++I)
     if (ValueMap.count(I) == 0)  // Haven't mapped the argument to anything yet?
       ArgTypes.push_back(I->getType());
 
@@ -108,14 +131,15 @@
 
   // Loop over the arguments, copying the names of the mapped arguments over...
   Function::arg_iterator DestI = NewF->arg_begin();
-  for (Function::const_arg_iterator I = F->arg_begin(), E = F->arg_end(); I != E; ++I)
+  for (Function::const_arg_iterator I = F->arg_begin(), E = F->arg_end();
+       I != E; ++I)
     if (ValueMap.count(I) == 0) {   // Is this argument preserved?
       DestI->setName(I->getName()); // Copy the name over...
       ValueMap[I] = DestI++;        // Add mapping to ValueMap
     }
 
   std::vector<ReturnInst*> Returns;  // Ignore returns cloned...
-  CloneFunctionInto(NewF, F, ValueMap, Returns);
+  CloneFunctionInto(NewF, F, ValueMap, Returns, "", CodeInfo);
   return NewF;
 }
 





From alenhar2 at cs.uiuc.edu  Fri Jan 13 12:50:00 2006
From: alenhar2 at cs.uiuc.edu (Andrew Lenharth)
Date: Fri, 13 Jan 2006 12:50:00 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaTargetMachine.cpp 
Message-ID: <200601131850.MAA20880@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/Alpha:

AlphaTargetMachine.cpp updated: 1.19 -> 1.20
---
Log message:

make DAG isel the default

---
Diffs of the changes:  (+3 -3)

 AlphaTargetMachine.cpp |    6 +++---
 1 files changed, 3 insertions(+), 3 deletions(-)


Index: llvm/lib/Target/Alpha/AlphaTargetMachine.cpp
diff -u llvm/lib/Target/Alpha/AlphaTargetMachine.cpp:1.19 llvm/lib/Target/Alpha/AlphaTargetMachine.cpp:1.20
--- llvm/lib/Target/Alpha/AlphaTargetMachine.cpp:1.19	Fri Nov 18 07:57:03 2005
+++ llvm/lib/Target/Alpha/AlphaTargetMachine.cpp	Fri Jan 13 12:49:47 2006
@@ -29,8 +29,8 @@
 }
 
 namespace llvm {
-  cl::opt<bool> EnableAlphaDAG("enable-dag-isel-for-alpha",
-                             cl::desc("Enable DAG ISEL for Alpha (beta option!)"),
+  cl::opt<bool> DisableAlphaDAG("disable-alpha-dag-isel",
+                             cl::desc("Disable DAG ISEL for Alpha"),
                              cl::Hidden);
 }
 
@@ -94,7 +94,7 @@
   // Make sure that no unreachable blocks are instruction selected.
   PM.add(createUnreachableBlockEliminationPass());
 
-  if (EnableAlphaDAG)
+  if (!DisableAlphaDAG)
     PM.add(createAlphaISelDag(*this));
   else
     PM.add(createAlphaPatternInstructionSelector(*this));





From lattner at cs.uiuc.edu  Fri Jan 13 13:06:11 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 13 Jan 2006 13:06:11 -0600
Subject: [llvm-commits] CVS: llvm/lib/Transforms/Utils/InlineFunction.cpp 
Message-ID: <200601131906.NAA21147@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Transforms/Utils:

InlineFunction.cpp updated: 1.36 -> 1.37
---
Log message:

Refactor a bunch of invoke handling stuff out into a new function
"HandleInlinedInvoke".  No functionality change.


---
Diffs of the changes:  (+108 -88)

 InlineFunction.cpp |  196 +++++++++++++++++++++++++++++------------------------
 1 files changed, 108 insertions(+), 88 deletions(-)


Index: llvm/lib/Transforms/Utils/InlineFunction.cpp
diff -u llvm/lib/Transforms/Utils/InlineFunction.cpp:1.36 llvm/lib/Transforms/Utils/InlineFunction.cpp:1.37
--- llvm/lib/Transforms/Utils/InlineFunction.cpp:1.36	Fri Jan 13 12:16:48 2006
+++ llvm/lib/Transforms/Utils/InlineFunction.cpp	Fri Jan 13 13:05:59 2006
@@ -24,6 +24,109 @@
 bool llvm::InlineFunction(CallInst *CI) { return InlineFunction(CallSite(CI)); }
 bool llvm::InlineFunction(InvokeInst *II) {return InlineFunction(CallSite(II));}
 
+/// HandleInlinedInvoke - If we inlined an invoke site, we need to convert calls
+/// in the body of the inlined function into invokes and turn unwind
+/// instructions into branches to the invoke unwind dest.
+///
+/// II is the invoke instruction begin inlined.  FirstNewBlock is the first
+/// block of the inlined code (the last block is the end of the function),
+/// and InlineCodeInfo is information about the code that got inlined.
+static void HandleInlinedInvoke(InvokeInst *II, BasicBlock *FirstNewBlock,
+                                ClonedCodeInfo &InlinedCodeInfo) {
+  BasicBlock *InvokeDest = II->getUnwindDest();
+  std::vector<Value*> InvokeDestPHIValues;
+
+  // If there are PHI nodes in the unwind destination block, we need to
+  // keep track of which values came into them from this invoke, then remove
+  // the entry for this block.
+  BasicBlock *InvokeBlock = II->getParent();
+  for (BasicBlock::iterator I = InvokeDest->begin(); isa<PHINode>(I); ++I) {
+    PHINode *PN = cast<PHINode>(I);
+    // Save the value to use for this edge.
+    InvokeDestPHIValues.push_back(PN->getIncomingValueForBlock(InvokeBlock));
+  }
+
+  Function *Caller = FirstNewBlock->getParent();
+  
+  // The inlined code is currently at the end of the function, scan from the
+  // start of the inlined code to its end, checking for stuff we need to
+  // rewrite.
+  for (Function::iterator BB = FirstNewBlock, E = Caller->end();
+       BB != E; ++BB) {
+    for (BasicBlock::iterator BBI = BB->begin(), E = BB->end(); BBI != E; ) {
+      Instruction *I = BBI++;
+      
+      // We only need to check for function calls: inlined invoke instructions
+      // require no special handling.
+      if (!isa<CallInst>(I)) continue;
+      CallInst *CI = cast<CallInst>(I);
+
+      // If this is an intrinsic function call, do not convert it to an invoke.
+      if (CI->getCalledFunction() &&
+          CI->getCalledFunction()->getIntrinsicID())
+        continue;
+      
+      // Convert this function call into an invoke instruction.
+      // First, split the basic block.
+      BasicBlock *Split = BB->splitBasicBlock(CI, CI->getName()+".noexc");
+      
+      // Next, create the new invoke instruction, inserting it at the end
+      // of the old basic block.
+      InvokeInst *II =
+        new InvokeInst(CI->getCalledValue(), Split, InvokeDest,
+                       std::vector<Value*>(CI->op_begin()+1, CI->op_end()),
+                       CI->getName(), BB->getTerminator());
+      II->setCallingConv(CI->getCallingConv());
+      
+      // Make sure that anything using the call now uses the invoke!
+      CI->replaceAllUsesWith(II);
+      
+      // Delete the unconditional branch inserted by splitBasicBlock
+      BB->getInstList().pop_back();
+      Split->getInstList().pop_front();  // Delete the original call
+      
+      // Update any PHI nodes in the exceptional block to indicate that
+      // there is now a new entry in them.
+      unsigned i = 0;
+      for (BasicBlock::iterator I = InvokeDest->begin();
+           isa<PHINode>(I); ++I, ++i) {
+        PHINode *PN = cast<PHINode>(I);
+        PN->addIncoming(InvokeDestPHIValues[i], BB);
+      }
+        
+      // This basic block is now complete, start scanning the next one.
+      break;
+    }
+    
+    if (UnwindInst *UI = dyn_cast<UnwindInst>(BB->getTerminator())) {
+      // An UnwindInst requires special handling when it gets inlined into an
+      // invoke site.  Once this happens, we know that the unwind would cause
+      // a control transfer to the invoke exception destination, so we can
+      // transform it into a direct branch to the exception destination.
+      new BranchInst(InvokeDest, UI);
+      
+      // Delete the unwind instruction!
+      UI->getParent()->getInstList().pop_back();
+      
+      // Update any PHI nodes in the exceptional block to indicate that
+      // there is now a new entry in them.
+      unsigned i = 0;
+      for (BasicBlock::iterator I = InvokeDest->begin();
+           isa<PHINode>(I); ++I, ++i) {
+        PHINode *PN = cast<PHINode>(I);
+        PN->addIncoming(InvokeDestPHIValues[i], BB);
+      }
+    }
+  }
+
+  // Now that everything is happy, we have one final detail.  The PHI nodes in
+  // the exception destination block still have entries due to the original
+  // invoke instruction.  Eliminate these entries (which might even delete the
+  // PHI node) now.
+  InvokeDest->removePredecessor(II->getParent());
+}
+
+
 // InlineFunction - This function inlines the called function into the basic
 // block of the caller.  This returns false if it is not possible to inline this
 // call.  The program is still in a well defined state if this occurs though.
@@ -60,6 +163,7 @@
   // Make sure to capture all of the return instructions from the cloned
   // function.
   std::vector<ReturnInst*> Returns;
+  ClonedCodeInfo InlinedFunctionInfo;
   { // Scope to destroy ValueMap after cloning.
     // Calculate the vector of arguments to pass into the function cloner...
     std::map<const Value*, Value*> ValueMap;
@@ -73,7 +177,8 @@
       ValueMap[I] = *AI;
 
     // Clone the entire body of the callee into the caller.
-    CloneFunctionInto(Caller, CalledFunc, ValueMap, Returns, ".i");
+    CloneFunctionInto(Caller, CalledFunc, ValueMap, Returns, ".i",
+                      &InlinedFunctionInfo);
   }
 
   // Remember the first block that is newly cloned over.
@@ -117,93 +222,8 @@
   // If we are inlining for an invoke instruction, we must make sure to rewrite
   // any inlined 'unwind' instructions into branches to the invoke exception
   // destination, and call instructions into invoke instructions.
-  if (InvokeInst *II = dyn_cast<InvokeInst>(TheCall)) {
-    BasicBlock *InvokeDest = II->getUnwindDest();
-    std::vector<Value*> InvokeDestPHIValues;
-
-    // If there are PHI nodes in the exceptional destination block, we need to
-    // keep track of which values came into them from this invoke, then remove
-    // the entry for this block.
-    for (BasicBlock::iterator I = InvokeDest->begin(); isa<PHINode>(I); ++I) {
-      PHINode *PN = cast<PHINode>(I);
-      // Save the value to use for this edge...
-      InvokeDestPHIValues.push_back(PN->getIncomingValueForBlock(OrigBB));
-    }
-
-    for (Function::iterator BB = FirstNewBlock, E = Caller->end();
-         BB != E; ++BB) {
-      for (BasicBlock::iterator I = BB->begin(), E = BB->end(); I != E; ) {
-        // We only need to check for function calls: inlined invoke instructions
-        // require no special handling...
-        if (CallInst *CI = dyn_cast<CallInst>(I)) {
-          // Convert this function call into an invoke instruction... if it's
-          // not an intrinsic function call (which are known to not unwind).
-          if (CI->getCalledFunction() &&
-              CI->getCalledFunction()->getIntrinsicID()) {
-            ++I;
-          } else {
-            // First, split the basic block...
-            BasicBlock *Split = BB->splitBasicBlock(CI, CI->getName()+".noexc");
-
-            // Next, create the new invoke instruction, inserting it at the end
-            // of the old basic block.
-            InvokeInst *II =
-              new InvokeInst(CI->getCalledValue(), Split, InvokeDest,
-                            std::vector<Value*>(CI->op_begin()+1, CI->op_end()),
-                             CI->getName(), BB->getTerminator());
-            II->setCallingConv(CI->getCallingConv());
-
-            // Make sure that anything using the call now uses the invoke!
-            CI->replaceAllUsesWith(II);
-
-            // Delete the unconditional branch inserted by splitBasicBlock
-            BB->getInstList().pop_back();
-            Split->getInstList().pop_front();  // Delete the original call
-
-            // Update any PHI nodes in the exceptional block to indicate that
-            // there is now a new entry in them.
-            unsigned i = 0;
-            for (BasicBlock::iterator I = InvokeDest->begin();
-                 isa<PHINode>(I); ++I, ++i) {
-              PHINode *PN = cast<PHINode>(I);
-              PN->addIncoming(InvokeDestPHIValues[i], BB);
-            }
-
-            // This basic block is now complete, start scanning the next one.
-            break;
-          }
-        } else {
-          ++I;
-        }
-      }
-
-      if (UnwindInst *UI = dyn_cast<UnwindInst>(BB->getTerminator())) {
-        // An UnwindInst requires special handling when it gets inlined into an
-        // invoke site.  Once this happens, we know that the unwind would cause
-        // a control transfer to the invoke exception destination, so we can
-        // transform it into a direct branch to the exception destination.
-        new BranchInst(InvokeDest, UI);
-
-        // Delete the unwind instruction!
-        UI->getParent()->getInstList().pop_back();
-
-        // Update any PHI nodes in the exceptional block to indicate that
-        // there is now a new entry in them.
-        unsigned i = 0;
-        for (BasicBlock::iterator I = InvokeDest->begin();
-             isa<PHINode>(I); ++I, ++i) {
-          PHINode *PN = cast<PHINode>(I);
-          PN->addIncoming(InvokeDestPHIValues[i], BB);
-        }
-      }
-    }
-
-    // Now that everything is happy, we have one final detail.  The PHI nodes in
-    // the exception destination block still have entries due to the original
-    // invoke instruction.  Eliminate these entries (which might even delete the
-    // PHI node) now.
-    InvokeDest->removePredecessor(II->getParent());
-  }
+  if (InvokeInst *II = dyn_cast<InvokeInst>(TheCall))
+    HandleInlinedInvoke(II, FirstNewBlock, InlinedFunctionInfo);
 
   // If we cloned in _exactly one_ basic block, and if that block ends in a
   // return instruction, we splice the body of the inlined callee directly into





From lattner at cs.uiuc.edu  Fri Jan 13 13:15:26 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 13 Jan 2006 13:15:26 -0600
Subject: [llvm-commits] CVS: llvm/lib/Transforms/Utils/InlineFunction.cpp 
Message-ID: <200601131915.NAA21401@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Transforms/Utils:

InlineFunction.cpp updated: 1.37 -> 1.38
---
Log message:

Use the ClonedCodeInfo object to avoid scans of the inlined code when
it doesn't contain any calls.  This is a fairly common case for C++ code,
so it will probably speed up the inliner marginally in these cases.


---
Diffs of the changes:  (+67 -62)

 InlineFunction.cpp |  129 +++++++++++++++++++++++++++--------------------------
 1 files changed, 67 insertions(+), 62 deletions(-)


Index: llvm/lib/Transforms/Utils/InlineFunction.cpp
diff -u llvm/lib/Transforms/Utils/InlineFunction.cpp:1.37 llvm/lib/Transforms/Utils/InlineFunction.cpp:1.38
--- llvm/lib/Transforms/Utils/InlineFunction.cpp:1.37	Fri Jan 13 13:05:59 2006
+++ llvm/lib/Transforms/Utils/InlineFunction.cpp	Fri Jan 13 13:15:15 2006
@@ -51,70 +51,75 @@
   // The inlined code is currently at the end of the function, scan from the
   // start of the inlined code to its end, checking for stuff we need to
   // rewrite.
-  for (Function::iterator BB = FirstNewBlock, E = Caller->end();
-       BB != E; ++BB) {
-    for (BasicBlock::iterator BBI = BB->begin(), E = BB->end(); BBI != E; ) {
-      Instruction *I = BBI++;
-      
-      // We only need to check for function calls: inlined invoke instructions
-      // require no special handling.
-      if (!isa<CallInst>(I)) continue;
-      CallInst *CI = cast<CallInst>(I);
-
-      // If this is an intrinsic function call, do not convert it to an invoke.
-      if (CI->getCalledFunction() &&
-          CI->getCalledFunction()->getIntrinsicID())
-        continue;
-      
-      // Convert this function call into an invoke instruction.
-      // First, split the basic block.
-      BasicBlock *Split = BB->splitBasicBlock(CI, CI->getName()+".noexc");
-      
-      // Next, create the new invoke instruction, inserting it at the end
-      // of the old basic block.
-      InvokeInst *II =
-        new InvokeInst(CI->getCalledValue(), Split, InvokeDest,
-                       std::vector<Value*>(CI->op_begin()+1, CI->op_end()),
-                       CI->getName(), BB->getTerminator());
-      II->setCallingConv(CI->getCallingConv());
-      
-      // Make sure that anything using the call now uses the invoke!
-      CI->replaceAllUsesWith(II);
-      
-      // Delete the unconditional branch inserted by splitBasicBlock
-      BB->getInstList().pop_back();
-      Split->getInstList().pop_front();  // Delete the original call
-      
-      // Update any PHI nodes in the exceptional block to indicate that
-      // there is now a new entry in them.
-      unsigned i = 0;
-      for (BasicBlock::iterator I = InvokeDest->begin();
-           isa<PHINode>(I); ++I, ++i) {
-        PHINode *PN = cast<PHINode>(I);
-        PN->addIncoming(InvokeDestPHIValues[i], BB);
+  if (InlinedCodeInfo.ContainsCalls || InlinedCodeInfo.ContainsUnwinds) {
+    for (Function::iterator BB = FirstNewBlock, E = Caller->end();
+         BB != E; ++BB) {
+      if (InlinedCodeInfo.ContainsCalls) {
+        for (BasicBlock::iterator BBI = BB->begin(), E = BB->end(); BBI != E; ){
+          Instruction *I = BBI++;
+          
+          // We only need to check for function calls: inlined invoke
+          // instructions require no special handling.
+          if (!isa<CallInst>(I)) continue;
+          CallInst *CI = cast<CallInst>(I);
+
+          // If this is an intrinsic function call, don't convert it to an
+          // invoke.
+          if (CI->getCalledFunction() &&
+              CI->getCalledFunction()->getIntrinsicID())
+            continue;
+          
+          // Convert this function call into an invoke instruction.
+          // First, split the basic block.
+          BasicBlock *Split = BB->splitBasicBlock(CI, CI->getName()+".noexc");
+          
+          // Next, create the new invoke instruction, inserting it at the end
+          // of the old basic block.
+          InvokeInst *II =
+            new InvokeInst(CI->getCalledValue(), Split, InvokeDest,
+                           std::vector<Value*>(CI->op_begin()+1, CI->op_end()),
+                           CI->getName(), BB->getTerminator());
+          II->setCallingConv(CI->getCallingConv());
+          
+          // Make sure that anything using the call now uses the invoke!
+          CI->replaceAllUsesWith(II);
+          
+          // Delete the unconditional branch inserted by splitBasicBlock
+          BB->getInstList().pop_back();
+          Split->getInstList().pop_front();  // Delete the original call
+          
+          // Update any PHI nodes in the exceptional block to indicate that
+          // there is now a new entry in them.
+          unsigned i = 0;
+          for (BasicBlock::iterator I = InvokeDest->begin();
+               isa<PHINode>(I); ++I, ++i) {
+            PHINode *PN = cast<PHINode>(I);
+            PN->addIncoming(InvokeDestPHIValues[i], BB);
+          }
+            
+          // This basic block is now complete, start scanning the next one.
+          break;
+        }
       }
-        
-      // This basic block is now complete, start scanning the next one.
-      break;
-    }
-    
-    if (UnwindInst *UI = dyn_cast<UnwindInst>(BB->getTerminator())) {
-      // An UnwindInst requires special handling when it gets inlined into an
-      // invoke site.  Once this happens, we know that the unwind would cause
-      // a control transfer to the invoke exception destination, so we can
-      // transform it into a direct branch to the exception destination.
-      new BranchInst(InvokeDest, UI);
-      
-      // Delete the unwind instruction!
-      UI->getParent()->getInstList().pop_back();
       
-      // Update any PHI nodes in the exceptional block to indicate that
-      // there is now a new entry in them.
-      unsigned i = 0;
-      for (BasicBlock::iterator I = InvokeDest->begin();
-           isa<PHINode>(I); ++I, ++i) {
-        PHINode *PN = cast<PHINode>(I);
-        PN->addIncoming(InvokeDestPHIValues[i], BB);
+      if (UnwindInst *UI = dyn_cast<UnwindInst>(BB->getTerminator())) {
+        // An UnwindInst requires special handling when it gets inlined into an
+        // invoke site.  Once this happens, we know that the unwind would cause
+        // a control transfer to the invoke exception destination, so we can
+        // transform it into a direct branch to the exception destination.
+        new BranchInst(InvokeDest, UI);
+        
+        // Delete the unwind instruction!
+        UI->getParent()->getInstList().pop_back();
+        
+        // Update any PHI nodes in the exceptional block to indicate that
+        // there is now a new entry in them.
+        unsigned i = 0;
+        for (BasicBlock::iterator I = InvokeDest->begin();
+             isa<PHINode>(I); ++I, ++i) {
+          PHINode *PN = cast<PHINode>(I);
+          PN->addIncoming(InvokeDestPHIValues[i], BB);
+        }
       }
     }
   }





From lattner at cs.uiuc.edu  Fri Jan 13 13:18:24 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 13 Jan 2006 13:18:24 -0600
Subject: [llvm-commits] CVS: llvm/lib/Transforms/Utils/InlineFunction.cpp 
Message-ID: <200601131918.NAA21472@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Transforms/Utils:

InlineFunction.cpp updated: 1.38 -> 1.39
---
Log message:

Use ClonedCodeInfo to avoid another walk over the inlined code, this this
time in common C cases.


---
Diffs of the changes:  (+4 -2)

 InlineFunction.cpp |    6 ++++--
 1 files changed, 4 insertions(+), 2 deletions(-)


Index: llvm/lib/Transforms/Utils/InlineFunction.cpp
diff -u llvm/lib/Transforms/Utils/InlineFunction.cpp:1.38 llvm/lib/Transforms/Utils/InlineFunction.cpp:1.39
--- llvm/lib/Transforms/Utils/InlineFunction.cpp:1.38	Fri Jan 13 13:15:15 2006
+++ llvm/lib/Transforms/Utils/InlineFunction.cpp	Fri Jan 13 13:18:11 2006
@@ -215,8 +215,10 @@
         }
   }
 
-  // If we are inlining tail call instruction through an invoke or
-  if (MustClearTailCallFlags) {
+  // If we are inlining tail call instruction through a call site that isn't 
+  // marked 'tail', we must remove the tail marker for any calls in the inlined
+  // code.
+  if (MustClearTailCallFlags && InlinedFunctionInfo.ContainsCalls) {
     for (Function::iterator BB = FirstNewBlock, E = Caller->end();
          BB != E; ++BB)
       for (BasicBlock::iterator I = BB->begin(), E = BB->end(); I != E; ++I)





From lattner at cs.uiuc.edu  Fri Jan 13 13:34:25 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 13 Jan 2006 13:34:25 -0600
Subject: [llvm-commits] CVS: llvm/lib/Transforms/Utils/InlineFunction.cpp 
Message-ID: <200601131934.NAA21722@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Transforms/Utils:

InlineFunction.cpp updated: 1.39 -> 1.40
---
Log message:

If inlining a call to a function that contains dynamic allocas, wrap the
resultant code with llvm.stacksave/llvm.stackrestore intrinsics.


---
Diffs of the changes:  (+30 -0)

 InlineFunction.cpp |   30 ++++++++++++++++++++++++++++++
 1 files changed, 30 insertions(+)


Index: llvm/lib/Transforms/Utils/InlineFunction.cpp
diff -u llvm/lib/Transforms/Utils/InlineFunction.cpp:1.39 llvm/lib/Transforms/Utils/InlineFunction.cpp:1.40
--- llvm/lib/Transforms/Utils/InlineFunction.cpp:1.39	Fri Jan 13 13:18:11 2006
+++ llvm/lib/Transforms/Utils/InlineFunction.cpp	Fri Jan 13 13:34:14 2006
@@ -215,6 +215,36 @@
         }
   }
 
+  // If the inlined code contained dynamic alloca instructions, wrap the inlined
+  // code with llvm.stacksave/llvm.stackrestore intrinsics.
+  if (InlinedFunctionInfo.ContainsDynamicAllocas) {
+    Module *M = Caller->getParent();
+    const Type *SBytePtr = PointerType::get(Type::SByteTy);
+    // Get the two intrinsics we care about.
+    Function *StackSave, *StackRestore;
+    StackSave    = M->getOrInsertFunction("llvm.stacksave", SBytePtr, NULL);
+    StackRestore = M->getOrInsertFunction("llvm.stackrestore", Type::VoidTy,
+                                          SBytePtr, NULL);
+    
+    // Insert the llvm.stacksave.
+    Value *SavedPtr = new CallInst(StackSave, "savedstack", 
+                                   FirstNewBlock->begin());
+    
+    // Insert a call to llvm.stackrestore before any return instructions in the
+    // inlined function.
+    for (unsigned i = 0, e = Returns.size(); i != e; ++i)
+      new CallInst(StackRestore, SavedPtr, "", Returns[i]);
+    
+    // If we are inlining an invoke instruction, insert restores before each
+    // unwind.  These unwinds will be rewritten into branches later.
+    if (InlinedFunctionInfo.ContainsUnwinds && isa<InvokeInst>(TheCall)) {
+      for (Function::iterator BB = FirstNewBlock, E = Caller->end();
+           BB != E; ++BB)
+        if (UnwindInst *UI = dyn_cast<UnwindInst>(BB->getTerminator()))
+          new CallInst(StackRestore, SavedPtr, "", UI);
+    }
+  }
+
   // If we are inlining tail call instruction through a call site that isn't 
   // marked 'tail', we must remove the tail marker for any calls in the inlined
   // code.





From lattner at cs.uiuc.edu  Fri Jan 13 13:35:17 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 13 Jan 2006 13:35:17 -0600
Subject: [llvm-commits] 
	CVS: llvm/test/Regression/Transforms/Inline/dynamic_alloca_test.ll
Message-ID: <200601131935.NAA21813@zion.cs.uiuc.edu>



Changes in directory llvm/test/Regression/Transforms/Inline:

dynamic_alloca_test.ll added (r1.1)
---
Log message:

New testcase that functions with dynamic allocas can be inlined, and are
inlined correctly.


---
Diffs of the changes:  (+28 -0)

 dynamic_alloca_test.ll |   28 ++++++++++++++++++++++++++++
 1 files changed, 28 insertions(+)


Index: llvm/test/Regression/Transforms/Inline/dynamic_alloca_test.ll
diff -c /dev/null llvm/test/Regression/Transforms/Inline/dynamic_alloca_test.ll:1.1
*** /dev/null	Fri Jan 13 13:35:15 2006
--- llvm/test/Regression/Transforms/Inline/dynamic_alloca_test.ll	Fri Jan 13 13:35:05 2006
***************
*** 0 ****
--- 1,28 ----
+ ; Test that functions with dynamic allocas get inlined in a case where
+ ; naively inlining it would result in a miscompilation.
+ 
+ ; RUN: llvm-as < %s | opt -inline &&
+ ; RUN: llvm-as < %s | opt -inline | llvm-dis | grep llvm.stacksave &&
+ ; RUN: llvm-as < %s | opt -inline | llvm-dis | not grep callee
+ 
+ declare void %ext(int*)
+ implementation
+ 
+ internal void %callee(uint %N) {
+ 	%P = alloca int, uint %N     ;; dynamic alloca
+ 	call void %ext(int* %P)
+ 	ret void
+ }
+ 
+ void %foo(uint %N) {
+ 	br label %Loop
+ Loop:
+ 	%count = phi uint [0, %0], [%next, %Loop]
+ 	%next = add uint %count, 1
+ 	call void %callee(uint %N)
+ 	%cond = seteq uint %count, 100000
+ 	br bool %cond, label %out, label %Loop
+ out:
+ 	ret void
+ }
+ 





From lattner at cs.uiuc.edu  Fri Jan 13 13:35:54 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 13 Jan 2006 13:35:54 -0600
Subject: [llvm-commits] CVS: llvm/lib/Transforms/IPO/InlineSimple.cpp 
Message-ID: <200601131935.NAA21848@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Transforms/IPO:

InlineSimple.cpp updated: 1.71 -> 1.72
---
Log message:

Permit inlining functions that contain dynamic allocations now that 
InlineFunction handles this case safely.  This implements
Transforms/Inline/dynamic_alloca_test.ll.


---
Diffs of the changes:  (+4 -27)

 InlineSimple.cpp |   31 ++++---------------------------
 1 files changed, 4 insertions(+), 27 deletions(-)


Index: llvm/lib/Transforms/IPO/InlineSimple.cpp
diff -u llvm/lib/Transforms/IPO/InlineSimple.cpp:1.71 llvm/lib/Transforms/IPO/InlineSimple.cpp:1.72
--- llvm/lib/Transforms/IPO/InlineSimple.cpp:1.71	Tue May 17 23:30:33 2005
+++ llvm/lib/Transforms/IPO/InlineSimple.cpp	Fri Jan 13 13:35:43 2006
@@ -33,16 +33,6 @@
   // FunctionInfo - For each function, calculate the size of it in blocks and
   // instructions.
   struct FunctionInfo {
-    // HasAllocas - Keep track of whether or not a function contains an alloca
-    // instruction that is not in the entry block of the function.  Inlining
-    // this call could cause us to blow out the stack, because the stack memory
-    // would never be released.
-    //
-    // FIXME: LLVM needs a way of dealloca'ing memory, which would make this
-    // irrelevant!
-    //
-    bool HasAllocas;
-
     // NumInsts, NumBlocks - Keep track of how large each function is, which is
     // used to estimate the code size cost of inlining it.
     unsigned NumInsts, NumBlocks;
@@ -53,7 +43,7 @@
     // entry here.
     std::vector<ArgInfo> ArgumentWeights;
 
-    FunctionInfo() : HasAllocas(false), NumInsts(0), NumBlocks(0) {}
+    FunctionInfo() : NumInsts(0), NumBlocks(0) {}
 
     /// analyzeFunction - Fill in the current structure with information gleaned
     /// from the specified function.
@@ -148,17 +138,9 @@
   // each instruction counts as 10.
   for (Function::const_iterator BB = F->begin(), E = F->end(); BB != E; ++BB) {
     for (BasicBlock::const_iterator II = BB->begin(), E = BB->end();
-         II != E; ++II) {
-      if (!isa<DbgInfoIntrinsic>(II)) ++NumInsts;
-
-      // If there is an alloca in the body of the function, we cannot currently
-      // inline the function without the risk of exploding the stack.
-      if (isa<AllocaInst>(II) && BB != F->begin()) {
-        HasAllocas = true;
-        this->NumBlocks = this->NumInsts = 1;
-        return;
-      }
-    }
+         II != E; ++II)
+      if (!isa<DbgInfoIntrinsic>(II)) 
+        ++NumInsts;
 
     ++NumBlocks;
   }
@@ -218,11 +200,6 @@
   if (CalleeFI.NumBlocks == 0)
     CalleeFI.analyzeFunction(Callee);
 
-  // Don't inline calls to functions with allocas that are not in the entry
-  // block of the function.
-  if (CalleeFI.HasAllocas)
-    return 2000000000;
-
   // Add to the inline quality for properties that make the call valuable to
   // inline.  This includes factors that indicate that the result of inlining
   // the function will be optimizable.  Currently this just looks at arguments





From lattner at cs.uiuc.edu  Fri Jan 13 13:49:14 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 13 Jan 2006 13:49:14 -0600
Subject: [llvm-commits] CVS: llvm/include/llvm/IntrinsicInst.h 
Message-ID: <200601131949.NAA21947@zion.cs.uiuc.edu>



Changes in directory llvm/include/llvm:

IntrinsicInst.h updated: 1.7 -> 1.8
---
Log message:

Add some functionality to the IntrinsicInst class and some comments


---
Diffs of the changes:  (+20 -0)

 IntrinsicInst.h |   20 ++++++++++++++++++++
 1 files changed, 20 insertions(+)


Index: llvm/include/llvm/IntrinsicInst.h
diff -u llvm/include/llvm/IntrinsicInst.h:1.7 llvm/include/llvm/IntrinsicInst.h:1.8
--- llvm/include/llvm/IntrinsicInst.h:1.7	Thu Apr 21 22:20:18 2005
+++ llvm/include/llvm/IntrinsicInst.h	Fri Jan 13 13:49:02 2006
@@ -30,6 +30,9 @@
 #include "llvm/Intrinsics.h"
 
 namespace llvm {
+  /// IntrinsicInst - A useful wrapper class for inspecting calls to intrinsic
+  /// functions.  This allows the standard isa/dyncast/cast functionality to
+  /// work with calls to intrinsic functions.
   class IntrinsicInst : public CallInst {
     IntrinsicInst();                      // DO NOT IMPLEMENT
     IntrinsicInst(const IntrinsicInst&);  // DO NOT IMPLEMENT
@@ -40,6 +43,23 @@
     /// casts from the specified value, returning the original uncasted value.
     /// Note that the returned value is guaranteed to have pointer type.
     static Value *StripPointerCasts(Value *Ptr);
+    
+    /// getIntrinsicID - Return the intrinsic ID of this intrinsic.
+    ///
+    Intrinsic::ID getIntrinsicID() const {
+      return (Intrinsic::ID)getCalledFunction()->getIntrinsicID();
+    }
+    
+    // Methods for support type inquiry through isa, cast, and dyn_cast:
+    static inline bool classof(const IntrinsicInst *) { return true; }
+    static inline bool classof(const CallInst *I) {
+      if (const Function *CF = I->getCalledFunction())
+        return CF->getIntrinsicID() != 0;
+      return false;
+    }
+    static inline bool classof(const Value *V) {
+      return isa<CallInst>(V) && classof(cast<CallInst>(V));
+    }
   };
 
   /// DbgInfoIntrinsic - This is the common base class for debug info intrinsics





From evan.cheng at apple.com  Fri Jan 13 13:51:58 2006
From: evan.cheng at apple.com (Evan Cheng)
Date: Fri, 13 Jan 2006 13:51:58 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp 
Message-ID: <200601131951.NAA21978@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/X86:

X86ISelLowering.cpp updated: 1.39 -> 1.40
---
Log message:

LHS = X86ISD::CMOVcc LHS, RHS  means LHS = RHS if cc. So the operands must be
flipped around.


---
Diffs of the changes:  (+4 -2)

 X86ISelLowering.cpp |    6 ++++--
 1 files changed, 4 insertions(+), 2 deletions(-)


Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.39 llvm/lib/Target/X86/X86ISelLowering.cpp:1.40
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.39	Fri Jan 13 12:00:54 2006
+++ llvm/lib/Target/X86/X86ISelLowering.cpp	Fri Jan 13 13:51:46 2006
@@ -1606,7 +1606,7 @@
       addTest = true;
 
     if (addTest) {
-      CC = DAG.getConstant(X86ISD::COND_E, MVT::i8);
+      CC = DAG.getConstant(X86ISD::COND_NE, MVT::i8);
       Cond = DAG.getNode(X86ISD::TEST, MVT::Flag, Op0, Op0);
     }
 
@@ -1614,8 +1614,10 @@
     Tys.push_back(Op.getValueType());
     Tys.push_back(MVT::Flag);
     std::vector<SDOperand> Ops;
-    Ops.push_back(Op.getOperand(1));
+    // X86ISD::CMOV means set the result (which is operand 1) to the RHS if
+    // condition is true.
     Ops.push_back(Op.getOperand(2));
+    Ops.push_back(Op.getOperand(1));
     Ops.push_back(CC);
     Ops.push_back(Cond);
     return DAG.getNode(X86ISD::CMOV, Tys, Ops);





From lattner at cs.uiuc.edu  Fri Jan 13 14:01:03 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 13 Jan 2006 14:01:03 -0600
Subject: [llvm-commits] CVS: llvm/include/llvm/IntrinsicInst.h 
Message-ID: <200601132001.OAA22143@zion.cs.uiuc.edu>



Changes in directory llvm/include/llvm:

IntrinsicInst.h updated: 1.8 -> 1.9
---
Log message:

Simplify the implementations of classof using the new IntrinsicInst classof.


---
Diffs of the changes:  (+32 -56)

 IntrinsicInst.h |   88 ++++++++++++++++++++------------------------------------
 1 files changed, 32 insertions(+), 56 deletions(-)


Index: llvm/include/llvm/IntrinsicInst.h
diff -u llvm/include/llvm/IntrinsicInst.h:1.8 llvm/include/llvm/IntrinsicInst.h:1.9
--- llvm/include/llvm/IntrinsicInst.h:1.8	Fri Jan 13 13:49:02 2006
+++ llvm/include/llvm/IntrinsicInst.h	Fri Jan 13 14:00:51 2006
@@ -70,21 +70,19 @@
 
     // Methods for support type inquiry through isa, cast, and dyn_cast:
     static inline bool classof(const DbgInfoIntrinsic *) { return true; }
-    static inline bool classof(const CallInst *I) {
-      if (const Function *CF = I->getCalledFunction())
-        switch (CF->getIntrinsicID()) {
-        case Intrinsic::dbg_stoppoint:
-        case Intrinsic::dbg_region_start:
-        case Intrinsic::dbg_region_end:
-        case Intrinsic::dbg_func_start:
-        case Intrinsic::dbg_declare:
-          return true;
-        default: break;
-        }
-      return false;
+    static inline bool classof(const IntrinsicInst *I) {
+      switch (I->getIntrinsicID()) {
+      case Intrinsic::dbg_stoppoint:
+      case Intrinsic::dbg_region_start:
+      case Intrinsic::dbg_region_end:
+      case Intrinsic::dbg_func_start:
+      case Intrinsic::dbg_declare:
+        return true;
+      default: return false;
+      }
     }
     static inline bool classof(const Value *V) {
-      return isa<CallInst>(V) && classof(cast<CallInst>(V));
+      return isa<IntrinsicInst>(V) && classof(cast<IntrinsicInst>(V));
     }
   };
 
@@ -104,13 +102,11 @@
 
     // Methods for support type inquiry through isa, cast, and dyn_cast:
     static inline bool classof(const DbgStopPointInst *) { return true; }
-    static inline bool classof(const CallInst *I) {
-      if (const Function *CF = I->getCalledFunction())
-        return CF->getIntrinsicID() == Intrinsic::dbg_stoppoint;
-      return false;
+    static inline bool classof(const IntrinsicInst *I) {
+      return I->getIntrinsicID() == Intrinsic::dbg_stoppoint;
     }
     static inline bool classof(const Value *V) {
-      return isa<CallInst>(V) && classof(cast<CallInst>(V));
+      return isa<IntrinsicInst>(V) && classof(cast<IntrinsicInst>(V));
     }
   };
 
@@ -150,19 +146,17 @@
 
     // Methods for support type inquiry through isa, cast, and dyn_cast:
     static inline bool classof(const MemIntrinsic *) { return true; }
-    static inline bool classof(const CallInst *I) {
-      if (const Function *CF = I->getCalledFunction())
-        switch (CF->getIntrinsicID()) {
-        case Intrinsic::memcpy:
-        case Intrinsic::memmove:
-        case Intrinsic::memset:
-          return true;
-        default: break;
-        }
-      return false;
+    static inline bool classof(const IntrinsicInst *I) {
+      switch (I->getIntrinsicID()) {
+      case Intrinsic::memcpy:
+      case Intrinsic::memmove:
+      case Intrinsic::memset:
+        return true;
+      default: return false;
+      }
     }
     static inline bool classof(const Value *V) {
-      return isa<CallInst>(V) && classof(cast<CallInst>(V));
+      return isa<IntrinsicInst>(V) && classof(cast<IntrinsicInst>(V));
     }
   };
 
@@ -188,17 +182,11 @@
 
     // Methods for support type inquiry through isa, cast, and dyn_cast:
     static inline bool classof(const MemCpyInst *) { return true; }
-    static inline bool classof(const MemIntrinsic *I) {
-      return I->getCalledFunction()->getIntrinsicID() == Intrinsic::memcpy;
-    }
-    static inline bool classof(const CallInst *I) {
-      if (const Function *CF = I->getCalledFunction())
-        if (CF->getIntrinsicID() == Intrinsic::memcpy)
-          return true;
-      return false;
+    static inline bool classof(const IntrinsicInst *I) {
+      return I->getIntrinsicID() == Intrinsic::memcpy;
     }
     static inline bool classof(const Value *V) {
-      return isa<CallInst>(V) && classof(cast<CallInst>(V));
+      return isa<IntrinsicInst>(V) && classof(cast<IntrinsicInst>(V));
     }
   };
 
@@ -222,17 +210,11 @@
 
     // Methods for support type inquiry through isa, cast, and dyn_cast:
     static inline bool classof(const MemMoveInst *) { return true; }
-    static inline bool classof(const MemIntrinsic *I) {
-      return I->getCalledFunction()->getIntrinsicID() == Intrinsic::memmove;
-    }
-    static inline bool classof(const CallInst *I) {
-      if (const Function *CF = I->getCalledFunction())
-        if (CF->getIntrinsicID() == Intrinsic::memmove)
-          return true;
-      return false;
+    static inline bool classof(const IntrinsicInst *I) {
+      return I->getIntrinsicID() == Intrinsic::memmove;
     }
     static inline bool classof(const Value *V) {
-      return isa<CallInst>(V) && classof(cast<CallInst>(V));
+      return isa<IntrinsicInst>(V) && classof(cast<IntrinsicInst>(V));
     }
   };
 
@@ -251,17 +233,11 @@
 
     // Methods for support type inquiry through isa, cast, and dyn_cast:
     static inline bool classof(const MemSetInst *) { return true; }
-    static inline bool classof(const MemIntrinsic *I) {
-      return I->getCalledFunction()->getIntrinsicID() == Intrinsic::memset;
-    }
-    static inline bool classof(const CallInst *I) {
-      if (const Function *CF = I->getCalledFunction())
-        if (CF->getIntrinsicID() == Intrinsic::memset)
-          return true;
-      return false;
+    static inline bool classof(const IntrinsicInst *I) {
+      return I->getIntrinsicID() == Intrinsic::memset;
     }
     static inline bool classof(const Value *V) {
-      return isa<CallInst>(V) && classof(cast<CallInst>(V));
+      return isa<IntrinsicInst>(V) && classof(cast<IntrinsicInst>(V));
     }
   };
 }





From lattner at cs.uiuc.edu  Fri Jan 13 14:11:16 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 13 Jan 2006 14:11:16 -0600
Subject: [llvm-commits] 
	CVS: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
Message-ID: <200601132011.OAA22302@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Transforms/Scalar:

InstructionCombining.cpp updated: 1.411 -> 1.412
---
Log message:

Simplify this a tiny bit by using the new IntrinsicInst functionality.


---
Diffs of the changes:  (+12 -7)

 InstructionCombining.cpp |   19 ++++++++++++-------
 1 files changed, 12 insertions(+), 7 deletions(-)


Index: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
diff -u llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.411 llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.412
--- llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.411	Fri Jan  6 19:32:28 2006
+++ llvm/lib/Transforms/Scalar/InstructionCombining.cpp	Fri Jan 13 14:11:04 2006
@@ -4620,12 +4620,17 @@
 }
 
 
-// CallInst simplification
-//
+/// visitCallInst - CallInst simplification.  This mostly only handles folding 
+/// of intrinsic instructions.  For normal calls, it allows visitCallSite to do
+/// the heavy lifting.
+///
 Instruction *InstCombiner::visitCallInst(CallInst &CI) {
+  IntrinsicInst *II = dyn_cast<IntrinsicInst>(&CI);
+  if (!II) return visitCallSite(&CI);
+  
   // Intrinsics cannot occur in an invoke, so handle them here instead of in
   // visitCallSite.
-  if (MemIntrinsic *MI = dyn_cast<MemIntrinsic>(&CI)) {
+  if (MemIntrinsic *MI = dyn_cast<MemIntrinsic>(II)) {
     bool Changed = false;
 
     // memmove/cpy/set of zero bytes is a noop.
@@ -4645,7 +4650,7 @@
     // If we have a memmove and the source operation is a constant global,
     // then the source and dest pointers can't alias, so we can change this
     // into a call to memcpy.
-    if (MemMoveInst *MMI = dyn_cast<MemMoveInst>(MI))
+    if (MemMoveInst *MMI = dyn_cast<MemMoveInst>(II))
       if (GlobalVariable *GVSrc = dyn_cast<GlobalVariable>(MMI->getSource()))
         if (GVSrc->isConstant()) {
           Module *M = CI.getParent()->getParent()->getParent();
@@ -4655,8 +4660,8 @@
           Changed = true;
         }
 
-    if (Changed) return &CI;
-  } else if (DbgStopPointInst *SPI = dyn_cast<DbgStopPointInst>(&CI)) {
+    if (Changed) return II;
+  } else if (DbgStopPointInst *SPI = dyn_cast<DbgStopPointInst>(II)) {
     // If this stoppoint is at the same source location as the previous
     // stoppoint in the chain, it is not needed.
     if (DbgStopPointInst *PrevSPI =
@@ -4668,7 +4673,7 @@
       }
   }
 
-  return visitCallSite(&CI);
+  return visitCallSite(II);
 }
 
 // InvokeInst simplification





From lattner at cs.uiuc.edu  Fri Jan 13 14:19:56 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 13 Jan 2006 14:19:56 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86ISelPattern.cpp 
Message-ID: <200601132019.OAA22366@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/X86:

X86ISelPattern.cpp updated: 1.196 -> 1.197
---
Log message:

Fix a bug in my last X86 checkin, pointed out by cozmic


---
Diffs of the changes:  (+2 -1)

 X86ISelPattern.cpp |    3 ++-
 1 files changed, 2 insertions(+), 1 deletion(-)


Index: llvm/lib/Target/X86/X86ISelPattern.cpp
diff -u llvm/lib/Target/X86/X86ISelPattern.cpp:1.196 llvm/lib/Target/X86/X86ISelPattern.cpp:1.197
--- llvm/lib/Target/X86/X86ISelPattern.cpp:1.196	Fri Jan 13 12:00:54 2006
+++ llvm/lib/Target/X86/X86ISelPattern.cpp	Fri Jan 13 14:19:44 2006
@@ -1229,7 +1229,8 @@
       cast<RegisterSDNode>(Node->getOperand(1))->getReg() :
       cast<RegisterSDNode>(Node)->getReg();
     // Just use the specified register as our input if we can.
-    if (MRegisterInfo::isVirtualRegister(Reg))
+    if (Node->getOpcode() == ISD::Register ||
+        MRegisterInfo::isVirtualRegister(Reg))
       return Reg;
   } 
 





From lattner at cs.uiuc.edu  Fri Jan 13 15:28:21 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 13 Jan 2006 15:28:21 -0600
Subject: [llvm-commits] 
	CVS: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
Message-ID: <200601132128.PAA22950@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Transforms/Scalar:

InstructionCombining.cpp updated: 1.412 -> 1.413
---
Log message:

Do a simple instcombine xforms to delete llvm.stackrestore cases.


---
Diffs of the changes:  (+33 -0)

 InstructionCombining.cpp |   33 +++++++++++++++++++++++++++++++++
 1 files changed, 33 insertions(+)


Index: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
diff -u llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.412 llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.413
--- llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.412	Fri Jan 13 14:11:04 2006
+++ llvm/lib/Transforms/Scalar/InstructionCombining.cpp	Fri Jan 13 15:28:09 2006
@@ -4671,6 +4671,39 @@
         SPI->replaceAllUsesWith(PrevSPI);
         return EraseInstFromFunction(CI);
       }
+  } else {
+    switch (II->getIntrinsicID()) {
+    default: break;
+    case Intrinsic::stackrestore: {
+      // If the save is right next to the restore, remove the restore.  This can
+      // happen when variable allocas are DCE'd.
+      if (IntrinsicInst *SS = dyn_cast<IntrinsicInst>(II->getOperand(1))) {
+        if (SS->getIntrinsicID() == Intrinsic::stacksave) {
+          BasicBlock::iterator BI = SS;
+          if (&*++BI == II)
+            return EraseInstFromFunction(CI);
+        }
+      }
+      
+      // If the stack restore is in a return/unwind block and if there are no
+      // allocas or calls between the restore and the return, nuke the restore.
+      TerminatorInst *TI = II->getParent()->getTerminator();
+      if (isa<ReturnInst>(TI) || isa<UnwindInst>(TI)) {
+        BasicBlock::iterator BI = II;
+        bool CannotRemove = false;
+        for (++BI; &*BI != TI; ++BI) {
+          if (isa<AllocaInst>(BI) ||
+              (isa<CallInst>(BI) && !isa<IntrinsicInst>(BI))) {
+            CannotRemove = true;
+            break;
+          }
+        }
+        if (!CannotRemove)
+          return EraseInstFromFunction(CI);
+      }
+      break;
+    }
+    }
   }
 
   return visitCallSite(II);





From lattner at cs.uiuc.edu  Fri Jan 13 15:32:06 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 13 Jan 2006 15:32:06 -0600
Subject: [llvm-commits] CVS: llvm/lib/Transforms/Utils/Local.cpp 
Message-ID: <200601132132.PAA23029@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Transforms/Utils:

Local.cpp updated: 1.47 -> 1.48
---
Log message:

it is ok to dce stacksave.


---
Diffs of the changes:  (+1 -0)

 Local.cpp |    1 +
 1 files changed, 1 insertion(+)


Index: llvm/lib/Transforms/Utils/Local.cpp
diff -u llvm/lib/Transforms/Utils/Local.cpp:1.47 llvm/lib/Transforms/Utils/Local.cpp:1.48
--- llvm/lib/Transforms/Utils/Local.cpp:1.47	Tue Jan 10 13:05:15 2006
+++ llvm/lib/Transforms/Utils/Local.cpp	Fri Jan 13 15:31:54 2006
@@ -296,6 +296,7 @@
       default: break;
       case Intrinsic::returnaddress:
       case Intrinsic::frameaddress:
+      case Intrinsic::stacksave:
       case Intrinsic::isunordered:
       case Intrinsic::ctpop:
       case Intrinsic::ctlz:





From evan.cheng at apple.com  Fri Jan 13 15:45:30 2006
From: evan.cheng at apple.com (Evan Cheng)
Date: Fri, 13 Jan 2006 15:45:30 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86InstrInfo.td 
Message-ID: <200601132145.PAA23226@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/X86:

X86InstrInfo.td updated: 1.202 -> 1.203
---
Log message:

Add truncstore i1 patterns.


---
Diffs of the changes:  (+5 -0)

 X86InstrInfo.td |    5 +++++
 1 files changed, 5 insertions(+)


Index: llvm/lib/Target/X86/X86InstrInfo.td
diff -u llvm/lib/Target/X86/X86InstrInfo.td:1.202 llvm/lib/Target/X86/X86InstrInfo.td:1.203
--- llvm/lib/Target/X86/X86InstrInfo.td:1.202	Thu Jan 12 16:54:21 2006
+++ llvm/lib/Target/X86/X86InstrInfo.td	Fri Jan 13 15:45:19 2006
@@ -2988,6 +2988,11 @@
 def : Pat<(X86subflag R32:$src1, i32immSExt8:$src2),
           (SUB32ri8 R32:$src1, i32immSExt8:$src2)>;
 
+def : Pat<(truncstore (i8 imm:$src), addr:$dst, i1), 
+          (MOV8mi addr:$dst, imm:$src)>;
+def : Pat<(truncstore R8:$src, addr:$dst, i1), 
+          (MOV8mr addr:$dst, R8:$src)>;
+
 // {s|z}extload bool -> {s|z}extload byte
 def : Pat<(sextloadi16i1 addr:$src), (MOVSX16rm8 addr:$src)>;
 def : Pat<(sextloadi32i1 addr:$src), (MOVSX32rm8 addr:$src)>;





From lattner at cs.uiuc.edu  Fri Jan 13 16:01:59 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 13 Jan 2006 16:01:59 -0600
Subject: [llvm-commits] 
	CVS: llvm/test/Regression/Transforms/InstCombine/stacksaverestore.ll
Message-ID: <200601132201.QAA23537@zion.cs.uiuc.edu>



Changes in directory llvm/test/Regression/Transforms/InstCombine:

stacksaverestore.ll added (r1.1)
---
Log message:

new testcases for the stackrestore instcombine optimizations


---
Diffs of the changes:  (+20 -0)

 stacksaverestore.ll |   20 ++++++++++++++++++++
 1 files changed, 20 insertions(+)


Index: llvm/test/Regression/Transforms/InstCombine/stacksaverestore.ll
diff -c /dev/null llvm/test/Regression/Transforms/InstCombine/stacksaverestore.ll:1.1
*** /dev/null	Fri Jan 13 16:01:57 2006
--- llvm/test/Regression/Transforms/InstCombine/stacksaverestore.ll	Fri Jan 13 16:01:47 2006
***************
*** 0 ****
--- 1,20 ----
+ ; RUN: llvm-as < %s | opt -instcombine -disable-output &&
+ ; RUN: llvm-as < %s | opt -instcombine | llvm-dis | not grep call
+ 
+ ;; Test that llvm.stackrestore is removed when possible.
+ 
+ int* %test1(uint %P) {
+         %tmp = call sbyte* %llvm.stacksave()
+         call void %llvm.stackrestore(sbyte* %tmp) ;; not restoring anything
+ 	%A = alloca int, uint %P
+         ret int* %A
+ }
+ 
+ void %test2(sbyte* %X) {
+ 	call void %llvm.stackrestore(sbyte* %X)  ;; no allocas before return.
+ 	ret void
+ }
+ 
+ declare sbyte* %llvm.stacksave()
+ 
+ declare void %llvm.stackrestore(sbyte*)





From lattner at cs.uiuc.edu  Fri Jan 13 16:05:48 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 13 Jan 2006 16:05:48 -0600
Subject: [llvm-commits] 
	CVS: llvm/test/Regression/CFrontend/2006-01-13-StackSave.c
Message-ID: <200601132205.QAA23646@zion.cs.uiuc.edu>



Changes in directory llvm/test/Regression/CFrontend:

2006-01-13-StackSave.c added (r1.1)
---
Log message:

testcase for PR691: http://llvm.cs.uiuc.edu/PR691 


---
Diffs of the changes:  (+12 -0)

 2006-01-13-StackSave.c |   12 ++++++++++++
 1 files changed, 12 insertions(+)


Index: llvm/test/Regression/CFrontend/2006-01-13-StackSave.c
diff -c /dev/null llvm/test/Regression/CFrontend/2006-01-13-StackSave.c:1.1
*** /dev/null	Fri Jan 13 16:05:46 2006
--- llvm/test/Regression/CFrontend/2006-01-13-StackSave.c	Fri Jan 13 16:05:36 2006
***************
*** 0 ****
--- 1,12 ----
+ // RUN: %llvmgcc %s -S -o - | gccas | llvm-dis | grep llvm.stacksave
+ // XFAIL: *
+ 
+ // PR691
+ 
+ void test(int N) {
+   int i;
+   for (i = 0; i < N; ++i) {
+     int VLA[i];
+     external(VLA);
+   }
+ }





From bocchino at persephone.cs.uiuc.edu  Fri Jan 13 16:48:37 2006
From: bocchino at persephone.cs.uiuc.edu (Robert L. Bocchino Jr.)
Date: Fri, 13 Jan 2006 16:48:37 -0600 (CST)
Subject: [llvm-commits] 
	CVS: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
Message-ID: <20060113224837.B88061D0C2B7@persephone.cs.uiuc.edu>



Changes in directory llvm/lib/Transforms/Scalar:

InstructionCombining.cpp updated: 1.413 -> 1.414
---
Log message:

Added instcombine support for extractelement.


---
Diffs of the changes:  (+54 -1)

 InstructionCombining.cpp |   55 ++++++++++++++++++++++++++++++++++++++++++++++-
 1 files changed, 54 insertions(+), 1 deletion(-)


Index: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
diff -u llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.413 llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.414
--- llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.413	Fri Jan 13 15:28:09 2006
+++ llvm/lib/Transforms/Scalar/InstructionCombining.cpp	Fri Jan 13 16:48:06 2006
@@ -135,6 +135,7 @@
     Instruction *visitStoreInst(StoreInst &SI);
     Instruction *visitBranchInst(BranchInst &BI);
     Instruction *visitSwitchInst(SwitchInst &SI);
+    Instruction *visitExtractElementInst(ExtractElementInst &EI);
 
     // visitInstruction - Specify what to return for unhandled instructions...
     Instruction *visitInstruction(Instruction &I) { return 0; }
@@ -5877,6 +5878,58 @@
   return 0;
 }
 
+Instruction *InstCombiner::visitExtractElementInst(ExtractElementInst &EI) {
+  if (ConstantAggregateZero *C = 
+      dyn_cast<ConstantAggregateZero>(EI.getOperand(0))) {
+    // If packed val is constant 0, replace extract with scalar 0
+    const Type *Ty = cast<PackedType>(C->getType())->getElementType();
+    EI.replaceAllUsesWith(Constant::getNullValue(Ty));
+    return ReplaceInstUsesWith(EI, Constant::getNullValue(Ty));
+  }
+  if (ConstantPacked *C = dyn_cast<ConstantPacked>(EI.getOperand(0))) {
+    // If packed val is constant with uniform operands, replace EI
+    // with that operand
+    Constant *op0 = cast<Constant>(C->getOperand(0));
+    for (unsigned i = 1; i < C->getNumOperands(); ++i)
+      if (C->getOperand(i) != op0) return 0;
+    return ReplaceInstUsesWith(EI, op0);
+  }
+  if (Instruction *I = dyn_cast<Instruction>(EI.getOperand(0)))
+    if (I->hasOneUse()) {
+      // Push extractelement into predecessor operation if legal and
+      // profitable to do so
+      if (BinaryOperator *BO = dyn_cast<BinaryOperator>(I)) {
+        if (!isa<Constant>(BO->getOperand(0)) &&
+            !isa<Constant>(BO->getOperand(1)))
+          return 0;
+        ExtractElementInst *newEI0 = 
+          new ExtractElementInst(BO->getOperand(0), EI.getOperand(1),
+                                 EI.getName());
+        ExtractElementInst *newEI1 =
+          new ExtractElementInst(BO->getOperand(1), EI.getOperand(1),
+                                 EI.getName());
+        InsertNewInstBefore(newEI0, EI);
+        InsertNewInstBefore(newEI1, EI);
+        return BinaryOperator::create(BO->getOpcode(), newEI0, newEI1);
+      }
+      switch(I->getOpcode()) {
+      case Instruction::Load: {
+        Value *Ptr = InsertCastBefore(I->getOperand(0),
+                                      PointerType::get(EI.getType()), EI);
+        GetElementPtrInst *GEP = 
+          new GetElementPtrInst(Ptr, EI.getOperand(1),
+                                I->getName() + ".gep");
+        InsertNewInstBefore(GEP, EI);
+        return new LoadInst(GEP);
+      }
+      default:
+        return 0;
+      }
+    }
+  return 0;
+}
+
+
 void InstCombiner::removeFromWorkList(Instruction *I) {
   WorkList.erase(std::remove(WorkList.begin(), WorkList.end(), I),
                  WorkList.end());
@@ -6075,7 +6128,7 @@
               WorkList.push_back(OpI);
 
           // Instructions may end up in the worklist more than once.  Erase all
-          // occurrances of this instruction.
+          // occurrences of this instruction.
           removeFromWorkList(I);
           I->eraseFromParent();
         } else {





From natebegeman at mac.com  Fri Jan 13 17:03:03 2006
From: natebegeman at mac.com (Nate Begeman)
Date: Fri, 13 Jan 2006 17:03:03 -0600
Subject: [llvm-commits] CVS: llvm/docs/LangRef.html 
Message-ID: <200601132303.RAA24274@zion.cs.uiuc.edu>



Changes in directory llvm/docs:

LangRef.html updated: 1.123 -> 1.124
---
Log message:

Add documentation for the upcoming bswap intrinsics!


---
Diffs of the changes:  (+91 -1)

 LangRef.html |   92 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-
 1 files changed, 91 insertions(+), 1 deletion(-)


Index: llvm/docs/LangRef.html
diff -u llvm/docs/LangRef.html:1.123 llvm/docs/LangRef.html:1.124
--- llvm/docs/LangRef.html:1.123	Thu Jan 12 20:03:13 2006
+++ llvm/docs/LangRef.html	Fri Jan 13 17:02:51 2006
@@ -125,6 +125,9 @@
       </li>
       <li><a href="#int_codegen">Code Generator Intrinsics</a>
         <ol>
+          <li><a href="#i_bswap_i16">'<tt>llvm.bswap.i16</tt>' Intrinsic</a></li>
+          <li><a href="#i_bswap_i32">'<tt>llvm.bswap.i32</tt>' Intrinsic</a></li>
+          <li><a href="#i_bswap_i64">'<tt>llvm.bswap.i64</tt>' Intrinsic</a></li>
           <li><a href="#i_returnaddress">'<tt>llvm.returnaddress</tt>' Intrinsic</a></li>
           <li><a href="#i_frameaddress">'<tt>llvm.frameaddress</tt>'   Intrinsic</a></li>
           <li><a href="#i_stacksave">'<tt>llvm.stacksave</tt>' Intrinsic</a></li>
@@ -2704,6 +2707,93 @@
 
 <!-- _______________________________________________________________________ -->
 <div class="doc_subsubsection">
+  <a name="i_bswap_i16">'<tt>llvm.bswap.i16</tt>' Intrinsic</a>
+</div>
+
+<div class="doc_text">
+
+<h5>Syntax:</h5>
+<pre>
+  declare ushort %llvm.bswap.i16( ushort &lt;id&gt; )
+</pre>
+
+<h5>Overview:</h5>
+
+<p>
+The '<tt>llvm.bwsap.i16</tt>' intrinsic is used to byteswap a 16 bit quantity.
+This is useful for performing operations on data that is not in the target's 
+native byte order.
+</p>
+
+<h5>Semantics:</h5>
+
+<p>
+This intrinsic returns a ushort value that has the two bytes of the input ushort
+swapped.
+</p>
+
+</div>
+
+<!-- _______________________________________________________________________ -->
+<div class="doc_subsubsection">
+  <a name="i_bswap_i32">'<tt>llvm.bswap.i32</tt>' Intrinsic</a>
+</div>
+
+<div class="doc_text">
+
+<h5>Syntax:</h5>
+<pre>
+  declare uint %llvm.bswap.i32( uint &lt;id&gt; )
+</pre>
+
+<h5>Overview:</h5>
+
+<p>
+The '<tt>llvm.bwsap.i32</tt>' intrinsic is used to byteswap a 32 bit quantity.
+This is useful for performing operations on data that is not in the target's 
+native byte order.
+</p>
+
+<h5>Semantics:</h5>
+
+<p>
+This intrinsic returns a uint value that has the four bytes of the input uint
+swapped, so that if the input bytes are numbered 0, 1, 2, 3 then the returned
+uint will have its bytes in 3, 2, 1, 0 order.
+</p>
+
+</div>
+
+<!-- _______________________________________________________________________ -->
+<div class="doc_subsubsection">
+  <a name="i_bswap_i64">'<tt>llvm.bswap.i64</tt>' Intrinsic</a>
+</div>
+
+<div class="doc_text">
+
+<h5>Syntax:</h5>
+<pre>
+  declare ulong %llvm.bswap.i64( ulong &lt;id&gt; )
+</pre>
+
+<h5>Overview:</h5>
+
+<p>
+The '<tt>llvm.bwsap.i64</tt>' intrinsic is used to byteswap a 64 bit quantity.
+This is useful for performing operations on data that is not in the target's 
+native byte order.
+</p>
+
+<h5>Semantics:</h5>
+
+<p>
+See the description for <a href="#i_bswap_i32"><tt>llvm.bswap.i32</tt></a>.
+</p>
+
+</div>
+
+<!-- _______________________________________________________________________ -->
+<div class="doc_subsubsection">
   <a name="i_returnaddress">'<tt>llvm.returnaddress</tt>' Intrinsic</a>
 </div>
 
@@ -3549,7 +3639,7 @@
 
   <a href="mailto:sabre at nondot.org">Chris Lattner</a><br>
   <a href="http://llvm.cs.uiuc.edu">The LLVM Compiler Infrastructure</a><br>
-  Last modified: $Date: 2006/01/13 02:03:13 $
+  Last modified: $Date: 2006/01/13 23:02:51 $
 </address>
 </body>
 </html>





From lattner at cs.uiuc.edu  Fri Jan 13 17:26:13 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 13 Jan 2006 17:26:13 -0600
Subject: [llvm-commits] CVS: llvm/docs/LangRef.html 
Message-ID: <200601132326.RAA24572@zion.cs.uiuc.edu>



Changes in directory llvm/docs:

LangRef.html updated: 1.124 -> 1.125
---
Log message:

fix some minor errors


---
Diffs of the changes:  (+4 -4)

 LangRef.html |    8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)


Index: llvm/docs/LangRef.html
diff -u llvm/docs/LangRef.html:1.124 llvm/docs/LangRef.html:1.125
--- llvm/docs/LangRef.html:1.124	Fri Jan 13 17:02:51 2006
+++ llvm/docs/LangRef.html	Fri Jan 13 17:26:01 2006
@@ -102,7 +102,7 @@
           <li><a href="#i_select">'<tt>select</tt>' Instruction</a></li>
           <li><a href="#i_extractelement">'<tt>extractelement</tt>' Instruction</a></li>
           <li><a href="#i_call">'<tt>call</tt>'  Instruction</a></li>
-          <li><a href="#i_vaarg">'<tt>vaarg</tt>'  Instruction</a></li>
+          <li><a href="#i_va_arg">'<tt>va_arg</tt>'  Instruction</a></li>
         </ol>
       </li>
     </ol>
@@ -2369,7 +2369,7 @@
 
 <!-- _______________________________________________________________________ -->
 <div class="doc_subsubsection">
-  <a name="i_vaarg">'<tt>vaarg</tt>' Instruction</a>
+  <a name="i_va_arg">'<tt>va_arg</tt>' Instruction</a>
 </div>
 
 <div class="doc_text">
@@ -2451,7 +2451,7 @@
 <div class="doc_text">
 
 <p>Variable argument support is defined in LLVM with the <a
- href="#i_vanext"><tt>vanext</tt></a> instruction and these three
+ href="#i_va_arg"><tt>va_arg</tt></a> instruction and these three
 intrinsic functions.  These functions are related to the similarly
 named macros defined in the <tt>&lt;stdarg.h&gt;</tt> header file.</p>
 
@@ -3639,7 +3639,7 @@
 
   <a href="mailto:sabre at nondot.org">Chris Lattner</a><br>
   <a href="http://llvm.cs.uiuc.edu">The LLVM Compiler Infrastructure</a><br>
-  Last modified: $Date: 2006/01/13 23:02:51 $
+  Last modified: $Date: 2006/01/13 23:26:01 $
 </address>
 </body>
 </html>





From natebegeman at mac.com  Fri Jan 13 17:26:49 2006
From: natebegeman at mac.com (Nate Begeman)
Date: Fri, 13 Jan 2006 17:26:49 -0600
Subject: [llvm-commits] CVS: llvm/docs/LangRef.html 
Message-ID: <200601132326.RAA24599@zion.cs.uiuc.edu>



Changes in directory llvm/docs:

LangRef.html updated: 1.125 -> 1.126
---
Log message:

Make the bswap documentation more to sabre's liking!


---
Diffs of the changes:  (+40 -94)

 LangRef.html |  134 +++++++++++++++++------------------------------------------
 1 files changed, 40 insertions(+), 94 deletions(-)


Index: llvm/docs/LangRef.html
diff -u llvm/docs/LangRef.html:1.125 llvm/docs/LangRef.html:1.126
--- llvm/docs/LangRef.html:1.125	Fri Jan 13 17:26:01 2006
+++ llvm/docs/LangRef.html	Fri Jan 13 17:26:38 2006
@@ -125,9 +125,6 @@
       </li>
       <li><a href="#int_codegen">Code Generator Intrinsics</a>
         <ol>
-          <li><a href="#i_bswap_i16">'<tt>llvm.bswap.i16</tt>' Intrinsic</a></li>
-          <li><a href="#i_bswap_i32">'<tt>llvm.bswap.i32</tt>' Intrinsic</a></li>
-          <li><a href="#i_bswap_i64">'<tt>llvm.bswap.i64</tt>' Intrinsic</a></li>
           <li><a href="#i_returnaddress">'<tt>llvm.returnaddress</tt>' Intrinsic</a></li>
           <li><a href="#i_frameaddress">'<tt>llvm.frameaddress</tt>'   Intrinsic</a></li>
           <li><a href="#i_stacksave">'<tt>llvm.stacksave</tt>' Intrinsic</a></li>
@@ -154,8 +151,9 @@
 
         </ol>
       </li>
-      <li><a href="#int_count">Bit counting Intrinsics</a>
+      <li><a href="#int_manip">Bit Manipulation Intrinsics</a>
         <ol>
+          <li><a href="#i_bswap">'<tt>llvm.bswap.*</tt>' Intrinsics</a></li>
           <li><a href="#int_ctpop">'<tt>llvm.ctpop</tt>' Intrinsic </a></li>
           <li><a href="#int_ctlz">'<tt>llvm.ctlz</tt>' Intrinsic </a></li>
           <li><a href="#int_cttz">'<tt>llvm.cttz</tt>' Intrinsic </a></li>
@@ -2707,93 +2705,6 @@
 
 <!-- _______________________________________________________________________ -->
 <div class="doc_subsubsection">
-  <a name="i_bswap_i16">'<tt>llvm.bswap.i16</tt>' Intrinsic</a>
-</div>
-
-<div class="doc_text">
-
-<h5>Syntax:</h5>
-<pre>
-  declare ushort %llvm.bswap.i16( ushort &lt;id&gt; )
-</pre>
-
-<h5>Overview:</h5>
-
-<p>
-The '<tt>llvm.bwsap.i16</tt>' intrinsic is used to byteswap a 16 bit quantity.
-This is useful for performing operations on data that is not in the target's 
-native byte order.
-</p>
-
-<h5>Semantics:</h5>
-
-<p>
-This intrinsic returns a ushort value that has the two bytes of the input ushort
-swapped.
-</p>
-
-</div>
-
-<!-- _______________________________________________________________________ -->
-<div class="doc_subsubsection">
-  <a name="i_bswap_i32">'<tt>llvm.bswap.i32</tt>' Intrinsic</a>
-</div>
-
-<div class="doc_text">
-
-<h5>Syntax:</h5>
-<pre>
-  declare uint %llvm.bswap.i32( uint &lt;id&gt; )
-</pre>
-
-<h5>Overview:</h5>
-
-<p>
-The '<tt>llvm.bwsap.i32</tt>' intrinsic is used to byteswap a 32 bit quantity.
-This is useful for performing operations on data that is not in the target's 
-native byte order.
-</p>
-
-<h5>Semantics:</h5>
-
-<p>
-This intrinsic returns a uint value that has the four bytes of the input uint
-swapped, so that if the input bytes are numbered 0, 1, 2, 3 then the returned
-uint will have its bytes in 3, 2, 1, 0 order.
-</p>
-
-</div>
-
-<!-- _______________________________________________________________________ -->
-<div class="doc_subsubsection">
-  <a name="i_bswap_i64">'<tt>llvm.bswap.i64</tt>' Intrinsic</a>
-</div>
-
-<div class="doc_text">
-
-<h5>Syntax:</h5>
-<pre>
-  declare ulong %llvm.bswap.i64( ulong &lt;id&gt; )
-</pre>
-
-<h5>Overview:</h5>
-
-<p>
-The '<tt>llvm.bwsap.i64</tt>' intrinsic is used to byteswap a 64 bit quantity.
-This is useful for performing operations on data that is not in the target's 
-native byte order.
-</p>
-
-<h5>Semantics:</h5>
-
-<p>
-See the description for <a href="#i_bswap_i32"><tt>llvm.bswap.i32</tt></a>.
-</p>
-
-</div>
-
-<!-- _______________________________________________________________________ -->
-<div class="doc_subsubsection">
   <a name="i_returnaddress">'<tt>llvm.returnaddress</tt>' Intrinsic</a>
 </div>
 
@@ -3499,12 +3410,12 @@
 
 <!-- ======================================================================= -->
 <div class="doc_subsection">
-  <a name="int_count">Bit Counting Intrinsics</a>
+  <a name="int_manip">Bit Manipulation Intrinsics</a>
 </div>
 
 <div class="doc_text">
 <p>
-LLVM provides intrinsics for a few important bit counting operations.
+LLVM provides intrinsics for a few important bit manipulation operations.
 These allow efficient code generation for some algorithms.
 </p>
 
@@ -3512,6 +3423,41 @@
 
 <!-- _______________________________________________________________________ -->
 <div class="doc_subsubsection">
+  <a name="i_bswap">'<tt>llvm.bswap.*</tt>' Intrinsics</a>
+</div>
+
+<div class="doc_text">
+
+<h5>Syntax:</h5>
+<pre>
+  declare ushort %llvm.bswap.i16( ushort &lt;id&gt; )
+  declare uint %llvm.bswap.i32( uint &lt;id&gt; )
+  declare ulong %llvm.bswap.i64( ulong &lt;id&gt; )
+</pre>
+
+<h5>Overview:</h5>
+
+<p>
+The '<tt>llvm.bwsap</tt>' family of intrinsics is used to byteswap a 16, 32 or
+64 bit quantity.  These are useful for performing operations on data that is not
+in the target's  native byte order.
+</p>
+
+<h5>Semantics:</h5>
+
+<p>
+The llvm.bswap.16 intrinsic returns a ushort value that has the high and low
+byte of the input ushort swapped.  Similarly, the llvm.bswap.i32 intrinsic
+returns a uint value that has the four bytes of the input uint swapped, so that 
+if the input bytes are numbered 0, 1, 2, 3 then the returned uint will have its
+bytes in 3, 2, 1, 0 order.  The llvm.bswap.i64 intrinsic extends this concept
+to 64 bits.
+</p>
+
+</div>
+
+<!-- _______________________________________________________________________ -->
+<div class="doc_subsubsection">
   <a name="int_ctpop">'<tt>llvm.ctpop</tt>' Intrinsic</a>
 </div>
 
@@ -3639,7 +3585,7 @@
 
   <a href="mailto:sabre at nondot.org">Chris Lattner</a><br>
   <a href="http://llvm.cs.uiuc.edu">The LLVM Compiler Infrastructure</a><br>
-  Last modified: $Date: 2006/01/13 23:26:01 $
+  Last modified: $Date: 2006/01/13 23:26:38 $
 </address>
 </body>
 </html>





From lattner at cs.uiuc.edu  Fri Jan 13 18:06:54 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 13 Jan 2006 18:06:54 -0600
Subject: [llvm-commits] CVS: llvm/include/llvm/Target/TargetData.h 
Message-ID: <200601140006.SAA24788@zion.cs.uiuc.edu>



Changes in directory llvm/include/llvm/Target:

TargetData.h updated: 1.32 -> 1.33
---
Log message:

Add a new InvalidateStructLayoutInfo method and some comments.


---
Diffs of the changes:  (+9 -0)

 TargetData.h |    9 +++++++++
 1 files changed, 9 insertions(+)


Index: llvm/include/llvm/Target/TargetData.h
diff -u llvm/include/llvm/Target/TargetData.h:1.32 llvm/include/llvm/Target/TargetData.h:1.33
--- llvm/include/llvm/Target/TargetData.h:1.32	Sat Apr 23 17:35:26 2005
+++ llvm/include/llvm/Target/TargetData.h	Fri Jan 13 18:06:42 2006
@@ -113,7 +113,16 @@
   uint64_t getIndexedOffset(const Type *Ty,
                             const std::vector<Value*> &Indices) const;
 
+  /// getStructLayout - Return a StructLayout object, indicating the alignment
+  /// of the struct, its size, and the offsets of its fields.  Note that this
+  /// information is lazily cached.
   const StructLayout *getStructLayout(const StructType *Ty) const;
+  
+  /// InvalidateStructLayoutInfo - TargetData speculatively caches StructLayout
+  /// objects.  If a TargetData object is alive when types are being refined and
+  /// removed, this method must be called whenever a StructType is removed to
+  /// avoid a dangling pointer in this cache.
+  void InvalidateStructLayoutInfo(const StructType *Ty) const;
 };
 
 /// StructLayout - used to lazily calculate structure layout information for a





From lattner at cs.uiuc.edu  Fri Jan 13 18:07:46 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 13 Jan 2006 18:07:46 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/TargetData.cpp 
Message-ID: <200601140007.SAA24871@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target:

TargetData.cpp updated: 1.57 -> 1.58
---
Log message:

Implement a new InvalidateStructLayoutInfo method and add some comments


---
Diffs of the changes:  (+18 -0)

 TargetData.cpp |   18 ++++++++++++++++++
 1 files changed, 18 insertions(+)


Index: llvm/lib/Target/TargetData.cpp
diff -u llvm/lib/Target/TargetData.cpp:1.57 llvm/lib/Target/TargetData.cpp:1.58
--- llvm/lib/Target/TargetData.cpp:1.57	Tue Aug  2 14:25:02 2005
+++ llvm/lib/Target/TargetData.cpp	Fri Jan 13 18:07:34 2006
@@ -131,6 +131,9 @@
   BoolAlignment    = 1;
 }
 
+/// Layouts - The lazy cache of structure layout information maintained by
+/// TargetData.
+///
 static std::map<std::pair<const TargetData*,const StructType*>,
                 StructLayout> *Layouts = 0;
 
@@ -165,6 +168,21 @@
   }
 }
 
+/// InvalidateStructLayoutInfo - TargetData speculatively caches StructLayout
+/// objects.  If a TargetData object is alive when types are being refined and
+/// removed, this method must be called whenever a StructType is removed to
+/// avoid a dangling pointer in this cache.
+void TargetData::InvalidateStructLayoutInfo(const StructType *Ty) const {
+  if (!Layouts) return;  // No cache.
+
+  std::map<std::pair<const TargetData*,const StructType*>,
+           StructLayout>::iterator I = Layouts->find(std::make_pair(this, Ty));
+  if (I != Layouts->end())
+    Layouts->erase(I);
+}
+
+
+
 static inline void getTypeInfo(const Type *Ty, const TargetData *TD,
                                uint64_t &Size, unsigned char &Alignment) {
   assert(Ty->isSized() && "Cannot getTypeInfo() on a type that is unsized!");





From alenhar2 at cs.uiuc.edu  Fri Jan 13 18:07:54 2006
From: alenhar2 at cs.uiuc.edu (Andrew Lenharth)
Date: Fri, 13 Jan 2006 18:07:54 -0600
Subject: [llvm-commits] CVS: llvm-test/Makefile.programs 
Message-ID: <200601140007.SAA24878@zion.cs.uiuc.edu>



Changes in directory llvm-test:

Makefile.programs updated: 1.182 -> 1.183
---
Log message:

make beta non-dag

---
Diffs of the changes:  (+1 -1)

 Makefile.programs |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm-test/Makefile.programs
diff -u llvm-test/Makefile.programs:1.182 llvm-test/Makefile.programs:1.183
--- llvm-test/Makefile.programs:1.182	Wed Dec 21 13:35:05 2005
+++ llvm-test/Makefile.programs	Fri Jan 13 18:07:42 2006
@@ -190,7 +190,7 @@
 LLCBETAOPTION := -sched=simple
 endif
 ifeq ($(ARCH),Alpha)
-LLCBETAOPTION := -enable-dag-isel-for-alpha
+LLCBETAOPTION := -disable-alpha-dag-isel
 # -enable-alpha-FTOI -enable-alpha-intfpdiv
 endif
 ifeq ($(ARCH),IA64)





From jlaskey at apple.com  Fri Jan 13 18:30:00 2006
From: jlaskey at apple.com (Jim Laskey)
Date: Fri, 13 Jan 2006 18:30:00 -0600
Subject: [llvm-commits] 
	CVS: llvm/test/Regression/CFrontend/2006-01-13-Includes.c
Message-ID: <200601140030.SAA24943@zion.cs.uiuc.edu>



Changes in directory llvm/test/Regression/CFrontend:

2006-01-13-Includes.c added (r1.1)
---
Log message:


testcase for PR676: http://llvm.cs.uiuc.edu/PR676 : http://llvm.cs.uiuc.edu/PR676: http://llvm.cs.uiuc.edu/PR676 


---
Diffs of the changes:  (+9 -0)

 2006-01-13-Includes.c |    9 +++++++++
 1 files changed, 9 insertions(+)


Index: llvm/test/Regression/CFrontend/2006-01-13-Includes.c
diff -c /dev/null llvm/test/Regression/CFrontend/2006-01-13-Includes.c:1.1
*** /dev/null	Fri Jan 13 18:29:58 2006
--- llvm/test/Regression/CFrontend/2006-01-13-Includes.c	Fri Jan 13 18:29:48 2006
***************
*** 0 ****
--- 1,9 ----
+ // RUN: %llvmgcc %s -g -S -o - | gccas | llvm-dis | grep "llvm/test/Regression/CFrontend"
+ 
+ // PR676
+ 
+ #include <stdio.h>
+ 
+ void test() {
+   printf("Hello World\n");
+ }





From evan.cheng at apple.com  Fri Jan 13 19:19:01 2006
From: evan.cheng at apple.com (Evan Cheng)
Date: Fri, 13 Jan 2006 19:19:01 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86InstrInfo.td 
Message-ID: <200601140119.TAA25191@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/X86:

X86InstrInfo.td updated: 1.203 -> 1.204
---
Log message:

A typo.


---
Diffs of the changes:  (+1 -1)

 X86InstrInfo.td |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/lib/Target/X86/X86InstrInfo.td
diff -u llvm/lib/Target/X86/X86InstrInfo.td:1.203 llvm/lib/Target/X86/X86InstrInfo.td:1.204
--- llvm/lib/Target/X86/X86InstrInfo.td:1.203	Fri Jan 13 15:45:19 2006
+++ llvm/lib/Target/X86/X86InstrInfo.td	Fri Jan 13 19:18:49 2006
@@ -1257,7 +1257,7 @@
   def AND32mi8 : Ii8<0x83, MRM4m,
                      (ops i32mem:$dst, i32i8imm :$src),
                      "and{l} {$src, $dst|$dst, $src}",
-                [(store (add (load addr:$dst), i32immSExt8:$src), addr:$dst)]>;
+                [(store (and (load addr:$dst), i32immSExt8:$src), addr:$dst)]>;
 }
 
 





From natebegeman at mac.com  Fri Jan 13 19:24:34 2006
From: natebegeman at mac.com (Nate Begeman)
Date: Fri, 13 Jan 2006 19:24:34 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/README.txt 
Message-ID: <200601140124.TAA25219@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/PowerPC:

README.txt updated: 1.42 -> 1.43
---
Log message:

Remove some redundant stuff out of the readme.


---
Diffs of the changes:  (+0 -18)

 README.txt |   18 ------------------
 1 files changed, 18 deletions(-)


Index: llvm/lib/Target/PowerPC/README.txt
diff -u llvm/lib/Target/PowerPC/README.txt:1.42 llvm/lib/Target/PowerPC/README.txt:1.43
--- llvm/lib/Target/PowerPC/README.txt:1.42	Fri Dec 23 19:00:15 2005
+++ llvm/lib/Target/PowerPC/README.txt	Fri Jan 13 19:24:22 2006
@@ -219,24 +219,6 @@
 
 ===-------------------------------------------------------------------------===
 
-For this testcase:
-int f1(int a, int b) { return (a&0xF)|(b&0xF0); }
-
-We currently emit:
-_f1:
-        rlwinm r2, r4, 0, 24, 27
-        rlwimi r2, r3, 0, 28, 31
-        or r3, r2, r2
-        blr
-
-We could emit:
-_f1:
-        rlwinm r4, r4, 0, 24, 27
-        rlwimi r3, r4, 0, 0, 27
-        blr
-
-===-------------------------------------------------------------------------===
-
 No loads or stores of the constants should be needed:
 
 struct foo { double X, Y; };





From natebegeman at mac.com  Fri Jan 13 19:25:39 2006
From: natebegeman at mac.com (Nate Begeman)
Date: Fri, 13 Jan 2006 19:25:39 -0600
Subject: [llvm-commits] CVS: llvm/include/llvm/Support/MathExtras.h 
Message-ID: <200601140125.TAA25266@zion.cs.uiuc.edu>



Changes in directory llvm/include/llvm/Support:

MathExtras.h updated: 1.27 -> 1.28
---
Log message:

Add bswap intrinsics as documented in the Language Reference


---
Diffs of the changes:  (+26 -0)

 MathExtras.h |   26 ++++++++++++++++++++++++++
 1 files changed, 26 insertions(+)


Index: llvm/include/llvm/Support/MathExtras.h
diff -u llvm/include/llvm/Support/MathExtras.h:1.27 llvm/include/llvm/Support/MathExtras.h:1.28
--- llvm/include/llvm/Support/MathExtras.h:1.27	Fri Oct  7 00:29:25 2005
+++ llvm/include/llvm/Support/MathExtras.h	Fri Jan 13 19:25:24 2006
@@ -79,6 +79,32 @@
   return Value && !(Value & (Value - 1LL));
 }
 
+// ByteSwap_16 - This function returns a byte-swapped representation of the
+// 16-bit argument, Value.
+inline unsigned short ByteSwap_16(unsigned short Value) {
+  unsigned short Hi = Value << 8;
+  unsigned short Lo = Value >> 8;
+  return Hi | Lo;
+}
+
+// ByteSwap_32 - This function returns a byte-swapped representation of the
+// 32-bit argument, Value.
+inline unsigned ByteSwap_32(unsigned Value) {
+  unsigned Byte0 = Value & 0x000000FF;
+  unsigned Byte1 = Value & 0x0000FF00;
+  unsigned Byte2 = Value & 0x00FF0000;
+  unsigned Byte3 = Value & 0xFF000000;
+  return (Byte0 << 24) | (Byte1 << 8) | (Byte2 >> 8) | (Byte3 >> 24);
+}
+
+// ByteSwap_64 - This function returns a byte-swapped representation of the
+// 64-bit argument, Value.
+inline uint64_t ByteSwap_64(uint64_t Value) {
+  uint64_t Hi = ByteSwap_32(Value);
+  uint64_t Lo = ByteSwap_32(Value >> 32);
+  return (Hi << 32) | Lo;
+}
+
 // CountLeadingZeros_32 - this function performs the platform optimal form of
 // counting the number of zeros from the most significant bit to the first one
 // bit.  Ex. CountLeadingZeros_32(0x00F000FF) == 8.





From natebegeman at mac.com  Fri Jan 13 19:25:40 2006
From: natebegeman at mac.com (Nate Begeman)
Date: Fri, 13 Jan 2006 19:25:40 -0600
Subject: [llvm-commits] CVS: llvm/lib/VMCore/Function.cpp Verifier.cpp 
Message-ID: <200601140125.TAA25290@zion.cs.uiuc.edu>



Changes in directory llvm/lib/VMCore:

Function.cpp updated: 1.97 -> 1.98
Verifier.cpp updated: 1.139 -> 1.140
---
Log message:

Add bswap intrinsics as documented in the Language Reference


---
Diffs of the changes:  (+35 -0)

 Function.cpp |    5 +++++
 Verifier.cpp |   30 ++++++++++++++++++++++++++++++
 2 files changed, 35 insertions(+)


Index: llvm/lib/VMCore/Function.cpp
diff -u llvm/lib/VMCore/Function.cpp:1.97 llvm/lib/VMCore/Function.cpp:1.98
--- llvm/lib/VMCore/Function.cpp:1.97	Thu Jan 12 20:15:39 2006
+++ llvm/lib/VMCore/Function.cpp	Fri Jan 13 19:25:24 2006
@@ -207,6 +207,11 @@
   assert(getName().size() != 5 && "'llvm.' is an invalid intrinsic name!");
 
   switch (getName()[5]) {
+  case 'b':
+    if (getName() == "llvm.bswap.i16") return Intrinsic::bswap_i16;
+    if (getName() == "llvm.bswap.i32") return Intrinsic::bswap_i32;
+    if (getName() == "llvm.bswap.i64") return Intrinsic::bswap_i64;
+    break;
   case 'c':
     if (getName() == "llvm.ctpop") return Intrinsic::ctpop;
     if (getName() == "llvm.cttz") return Intrinsic::cttz;


Index: llvm/lib/VMCore/Verifier.cpp
diff -u llvm/lib/VMCore/Verifier.cpp:1.139 llvm/lib/VMCore/Verifier.cpp:1.140
--- llvm/lib/VMCore/Verifier.cpp:1.139	Thu Jan 12 20:15:39 2006
+++ llvm/lib/VMCore/Verifier.cpp	Fri Jan 13 19:25:24 2006
@@ -749,6 +749,36 @@
     NumArgs = 0;
     break;
 
+  case Intrinsic::bswap_i16:
+    Assert1(FT->getNumParams() == 1,
+            "Illegal # arguments for intrinsic function!", IF);
+    Assert1(FT->getReturnType() == FT->getParamType(0),
+            "Return type does not match source type", IF);
+    Assert1(FT->getReturnType() == Type::UShortTy,
+            "Return type is not ushort!", IF);
+    NumArgs = 1;
+    break;    
+
+  case Intrinsic::bswap_i32:
+    Assert1(FT->getNumParams() == 1,
+            "Illegal # arguments for intrinsic function!", IF);
+    Assert1(FT->getReturnType() == FT->getParamType(0),
+            "Return type does not match source type", IF);
+    Assert1(FT->getReturnType() == Type::UIntTy,
+            "Return type is not uint!", IF);
+    NumArgs = 1;
+    break;    
+
+  case Intrinsic::bswap_i64:
+    Assert1(FT->getNumParams() == 1,
+            "Illegal # arguments for intrinsic function!", IF);
+    Assert1(FT->getReturnType() == FT->getParamType(0),
+            "Return type does not match source type", IF);
+    Assert1(FT->getReturnType() == Type::ULongTy,
+            "Return type is not ulong!", IF);
+    NumArgs = 1;
+    break;    
+    
   case Intrinsic::ctpop:
   case Intrinsic::ctlz:
   case Intrinsic::cttz:





From natebegeman at mac.com  Fri Jan 13 19:25:40 2006
From: natebegeman at mac.com (Nate Begeman)
Date: Fri, 13 Jan 2006 19:25:40 -0600
Subject: [llvm-commits] 
	CVS: llvm/test/Regression/Transforms/ConstProp/bswap.ll
Message-ID: <200601140125.TAA25284@zion.cs.uiuc.edu>



Changes in directory llvm/test/Regression/Transforms/ConstProp:

bswap.ll added (r1.1)
---
Log message:

Add bswap intrinsics as documented in the Language Reference


---
Diffs of the changes:  (+22 -0)

 bswap.ll |   22 ++++++++++++++++++++++
 1 files changed, 22 insertions(+)


Index: llvm/test/Regression/Transforms/ConstProp/bswap.ll
diff -c /dev/null llvm/test/Regression/Transforms/ConstProp/bswap.ll:1.1
*** /dev/null	Fri Jan 13 19:25:34 2006
--- llvm/test/Regression/Transforms/ConstProp/bswap.ll	Fri Jan 13 19:25:24 2006
***************
*** 0 ****
--- 1,22 ----
+ ; bswap should be constant folded when it is passed a constant argument
+ 
+ ; RUN: llvm-as < %s | opt -constprop | llvm-dis | not grep call
+ 
+ declare ushort %llvm.bswap.i16(ushort)
+ declare uint %llvm.bswap.i32(uint)
+ declare ulong %llvm.bswap.i64(ulong)
+ 
+ ushort %W() {
+ 	%Z = call ushort %llvm.bswap.i16(ushort 1)
+ 	ret ushort %Z
+ }
+ 
+ uint %X() {
+ 	%Z = call uint %llvm.bswap.i32(uint 1)
+ 	ret uint %Z
+ }
+ 
+ ulong %Y() {
+ 	%Z = call ulong %llvm.bswap.i64(ulong 1)
+ 	ret ulong %Z
+ }





From natebegeman at mac.com  Fri Jan 13 19:25:39 2006
From: natebegeman at mac.com (Nate Begeman)
Date: Fri, 13 Jan 2006 19:25:39 -0600
Subject: [llvm-commits] CVS: llvm/lib/Analysis/BasicAliasAnalysis.cpp
	ConstantFolding.cpp 
Message-ID: <200601140125.TAA25274@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Analysis:

BasicAliasAnalysis.cpp updated: 1.75 -> 1.76
ConstantFolding.cpp updated: 1.1 -> 1.2
---
Log message:

Add bswap intrinsics as documented in the Language Reference


---
Diffs of the changes:  (+17 -1)

 BasicAliasAnalysis.cpp |    3 ++-
 ConstantFolding.cpp    |   15 +++++++++++++++
 2 files changed, 17 insertions(+), 1 deletion(-)


Index: llvm/lib/Analysis/BasicAliasAnalysis.cpp
diff -u llvm/lib/Analysis/BasicAliasAnalysis.cpp:1.75 llvm/lib/Analysis/BasicAliasAnalysis.cpp:1.76
--- llvm/lib/Analysis/BasicAliasAnalysis.cpp:1.75	Fri Nov 11 13:02:54 2005
+++ llvm/lib/Analysis/BasicAliasAnalysis.cpp	Fri Jan 13 19:25:24 2006
@@ -708,7 +708,8 @@
 static const char *DoesntAccessMemoryTable[] = {
   // LLVM intrinsics:
   "llvm.frameaddress", "llvm.returnaddress", "llvm.readport",
-  "llvm.isunordered", "llvm.sqrt", "llvm.ctpop", "llvm.ctlz", "llvm.cttz",
+  "llvm.isunordered", "llvm.sqrt", "llvm.bswap.i16", "llvm.bswap.i32",
+  "llvm.bswap.i64", "llvm.ctpop", "llvm.ctlz", "llvm.cttz",
 
   "abs", "labs", "llabs", "imaxabs", "fabs", "fabsf", "fabsl",
   "trunc", "truncf", "truncl", "ldexp",


Index: llvm/lib/Analysis/ConstantFolding.cpp
diff -u llvm/lib/Analysis/ConstantFolding.cpp:1.1 llvm/lib/Analysis/ConstantFolding.cpp:1.2
--- llvm/lib/Analysis/ConstantFolding.cpp:1.1	Thu Oct 27 11:00:11 2005
+++ llvm/lib/Analysis/ConstantFolding.cpp	Fri Jan 13 19:25:24 2006
@@ -37,6 +37,13 @@
   switch (F->getIntrinsicID()) {
   case Intrinsic::isunordered:
   case Intrinsic::sqrt:
+  case Intrinsic::bswap_i16:
+  case Intrinsic::bswap_i32:
+  case Intrinsic::bswap_i64:
+  // FIXME: these should be constant folded as well
+  //case Intrinsic::ctpop:
+  //case Intrinsic::ctlz:
+  //case Intrinsic::cttz:
     return true;
   default: break;
   }
@@ -142,6 +149,14 @@
         default:
           break;
       }
+    } else if (ConstantUInt *Op = dyn_cast<ConstantUInt>(Operands[0])) {
+      uint64_t V = Op->getValue();
+      if (Name == "llvm.bswap.i16")
+        return ConstantUInt::get(Ty, ByteSwap_16(V));
+      else if (Name == "llvm.bswap.i32")
+        return ConstantUInt::get(Ty, ByteSwap_32(V));
+      else if (Name == "llvm.bswap.i64")
+        return ConstantUInt::get(Ty, ByteSwap_64(V));
     }
   } else if (Operands.size() == 2) {
     if (ConstantFP *Op1 = dyn_cast<ConstantFP>(Operands[0])) {





From natebegeman at mac.com  Fri Jan 13 19:25:39 2006
From: natebegeman at mac.com (Nate Begeman)
Date: Fri, 13 Jan 2006 19:25:39 -0600
Subject: [llvm-commits] CVS: llvm/lib/Transforms/Utils/Local.cpp 
Message-ID: <200601140125.TAA25270@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Transforms/Utils:

Local.cpp updated: 1.48 -> 1.49
---
Log message:

Add bswap intrinsics as documented in the Language Reference


---
Diffs of the changes:  (+3 -0)

 Local.cpp |    3 +++
 1 files changed, 3 insertions(+)


Index: llvm/lib/Transforms/Utils/Local.cpp
diff -u llvm/lib/Transforms/Utils/Local.cpp:1.48 llvm/lib/Transforms/Utils/Local.cpp:1.49
--- llvm/lib/Transforms/Utils/Local.cpp:1.48	Fri Jan 13 15:31:54 2006
+++ llvm/lib/Transforms/Utils/Local.cpp	Fri Jan 13 19:25:24 2006
@@ -298,6 +298,9 @@
       case Intrinsic::frameaddress:
       case Intrinsic::stacksave:
       case Intrinsic::isunordered:
+      case Intrinsic::bswap_i16:
+      case Intrinsic::bswap_i32:
+      case Intrinsic::bswap_i64:
       case Intrinsic::ctpop:
       case Intrinsic::ctlz:
       case Intrinsic::cttz:





From natebegeman at mac.com  Fri Jan 13 19:25:39 2006
From: natebegeman at mac.com (Nate Begeman)
Date: Fri, 13 Jan 2006 19:25:39 -0600
Subject: [llvm-commits] CVS: llvm/include/llvm/Intrinsics.h 
Message-ID: <200601140125.TAA25276@zion.cs.uiuc.edu>



Changes in directory llvm/include/llvm:

Intrinsics.h updated: 1.34 -> 1.35
---
Log message:

Add bswap intrinsics as documented in the Language Reference


---
Diffs of the changes:  (+10 -8)

 Intrinsics.h |   18 ++++++++++--------
 1 files changed, 10 insertions(+), 8 deletions(-)


Index: llvm/include/llvm/Intrinsics.h
diff -u llvm/include/llvm/Intrinsics.h:1.34 llvm/include/llvm/Intrinsics.h:1.35
--- llvm/include/llvm/Intrinsics.h:1.34	Thu Jan 12 20:15:02 2006
+++ llvm/include/llvm/Intrinsics.h	Fri Jan 13 19:25:24 2006
@@ -58,19 +58,21 @@
     dbg_func_start,   // Start of a function
     dbg_declare,      // Declare a local object
 
-
-    // Standard libc functions.
+    // Standard C library intrinsics.
     memcpy,         // Copy non-overlapping memory blocks
     memmove,        // Copy potentially overlapping memory blocks
     memset,         // Fill memory with a byte value
-
-    // libm related functions.
     isunordered,    // Return true if either argument is a NaN
-    ctpop, //count population
-    ctlz, //count leading zeros
-    cttz, //count trailing zeros
-    sqrt, //square root
+    sqrt,           // Square root
 
+    // Bit manipulation instrinsics.
+    bswap_i16,      // Byteswap 16 bits
+    bswap_i32,      // Byteswap 32 bits
+    bswap_i64,      // Byteswap 64 bits
+    ctpop,          // Count population
+    ctlz,           // Count leading zeros
+    cttz,           // Count trailing zeros
+    
     // Input/Output intrinsics.
     readport,
     writeport,





From natebegeman at mac.com  Fri Jan 13 19:27:22 2006
From: natebegeman at mac.com (Nate Begeman)
Date: Fri, 13 Jan 2006 19:27:22 -0600
Subject: [llvm-commits] CVS: llvm/docs/ExtendingLLVM.html 
Message-ID: <200601140127.TAA25316@zion.cs.uiuc.edu>



Changes in directory llvm/docs:

ExtendingLLVM.html updated: 1.19 -> 1.20
---
Log message:

Fix the instructions for adding an intrinsic.


---
Diffs of the changes:  (+8 -4)

 ExtendingLLVM.html |   12 ++++++++----
 1 files changed, 8 insertions(+), 4 deletions(-)


Index: llvm/docs/ExtendingLLVM.html
diff -u llvm/docs/ExtendingLLVM.html:1.19 llvm/docs/ExtendingLLVM.html:1.20
--- llvm/docs/ExtendingLLVM.html:1.19	Sat Nov 12 20:09:55 2005
+++ llvm/docs/ExtendingLLVM.html	Fri Jan 13 19:27:10 2006
@@ -97,9 +97,13 @@
     not access memory or does not write to memory, add it to the relevant list
     of functions.</li>
 
-<li><tt>llvm/lib/Transforms/Utils/Local.cpp</tt>: If it is possible to constant
-fold your intrinsic, add support to it in the <tt>canConstantFoldCallTo</tt> and
-<tt>ConstantFoldCall</tt> functions.</li>
+<li><tt>llvm/lib/Analysis/ConstantFolding.cpp</tt>: If it is possible to 
+    constant fold your intrinsic, add support to it in the 
+    <tt>canConstantFoldCallTo</tt> and <tt>ConstantFoldCall</tt> functions.</li>
+
+<li><tt>llvm/lib/Transforms/Utils/Local.cpp</tt>: If your intrinsic has no side-
+    effects, add it to the list of intrinsics in the 
+    <tt>isInstructionTriviallyDead</tt> function.</li>
 
 <li>Test your intrinsic</li>
 
@@ -322,7 +326,7 @@
 
   <a href="http://llvm.cs.uiuc.edu">The LLVM Compiler Infrastructure</a>
   <br>
-  Last modified: $Date: 2005/11/13 02:09:55 $
+  Last modified: $Date: 2006/01/14 01:27:10 $
 </address>
 
 </body>





From jeffc at jolt-lang.org  Fri Jan 13 20:17:31 2006
From: jeffc at jolt-lang.org (Jeff Cohen)
Date: Fri, 13 Jan 2006 20:17:31 -0600
Subject: [llvm-commits] CVS: llvm/include/llvm/Support/MathExtras.h 
Message-ID: <200601140217.UAA25465@zion.cs.uiuc.edu>



Changes in directory llvm/include/llvm/Support:

MathExtras.h updated: 1.28 -> 1.29
---
Log message:

Fix generous source of VC++ truncation warnings.

---
Diffs of the changes:  (+2 -2)

 MathExtras.h |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)


Index: llvm/include/llvm/Support/MathExtras.h
diff -u llvm/include/llvm/Support/MathExtras.h:1.28 llvm/include/llvm/Support/MathExtras.h:1.29
--- llvm/include/llvm/Support/MathExtras.h:1.28	Fri Jan 13 19:25:24 2006
+++ llvm/include/llvm/Support/MathExtras.h	Fri Jan 13 20:17:20 2006
@@ -100,8 +100,8 @@
 // ByteSwap_64 - This function returns a byte-swapped representation of the
 // 64-bit argument, Value.
 inline uint64_t ByteSwap_64(uint64_t Value) {
-  uint64_t Hi = ByteSwap_32(Value);
-  uint64_t Lo = ByteSwap_32(Value >> 32);
+  uint64_t Hi = ByteSwap_32(unsigned(Value));
+  uint64_t Lo = ByteSwap_32(unsigned(Value >> 32));
   return (Hi << 32) | Lo;
 }
 





From natebegeman at mac.com  Fri Jan 13 21:14:26 2006
From: natebegeman at mac.com (Nate Begeman)
Date: Fri, 13 Jan 2006 21:14:26 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaISelLowering.cpp 
Message-ID: <200601140314.VAA25907@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/Alpha:

AlphaISelLowering.cpp updated: 1.20 -> 1.21
---
Log message:

bswap implementation


---
Diffs of the changes:  (+1 -0)

 AlphaISelLowering.cpp |    1 +
 1 files changed, 1 insertion(+)


Index: llvm/lib/Target/Alpha/AlphaISelLowering.cpp
diff -u llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.20 llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.21
--- llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.20	Thu Jan 12 20:42:53 2006
+++ llvm/lib/Target/Alpha/AlphaISelLowering.cpp	Fri Jan 13 21:14:10 2006
@@ -81,6 +81,7 @@
     setOperationAction(ISD::CTTZ     , MVT::i64  , Expand);
     setOperationAction(ISD::CTLZ     , MVT::i64  , Expand);
   }
+  setOperationAction(ISD::BSWAP    , MVT::i64, Expand);
   setOperationAction(ISD::ROTL     , MVT::i64, Expand);
   setOperationAction(ISD::ROTR     , MVT::i64, Expand);
   





From natebegeman at mac.com  Fri Jan 13 21:14:26 2006
From: natebegeman at mac.com (Nate Begeman)
Date: Fri, 13 Jan 2006 21:14:26 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp
	X86InstrInfo.td 
Message-ID: <200601140314.VAA25919@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/X86:

X86ISelLowering.cpp updated: 1.40 -> 1.41
X86InstrInfo.td updated: 1.204 -> 1.205
---
Log message:

bswap implementation


---
Diffs of the changes:  (+5 -1)

 X86ISelLowering.cpp |    2 ++
 X86InstrInfo.td     |    4 +++-
 2 files changed, 5 insertions(+), 1 deletion(-)


Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.40 llvm/lib/Target/X86/X86ISelLowering.cpp:1.41
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.40	Fri Jan 13 13:51:46 2006
+++ llvm/lib/Target/X86/X86ISelLowering.cpp	Fri Jan 13 21:14:10 2006
@@ -109,6 +109,7 @@
   setOperationAction(ISD::READCYCLECOUNTER , MVT::i64  , Custom);
 
   if (!X86DAGIsel) {
+    setOperationAction(ISD::BSWAP          , MVT::i32  , Expand);
     setOperationAction(ISD::ROTL           , MVT::i8   , Expand);
     setOperationAction(ISD::ROTR           , MVT::i8   , Expand);
     setOperationAction(ISD::ROTL           , MVT::i16  , Expand);
@@ -116,6 +117,7 @@
     setOperationAction(ISD::ROTL           , MVT::i32  , Expand);
     setOperationAction(ISD::ROTR           , MVT::i32  , Expand);
   }
+  setOperationAction(ISD::BSWAP            , MVT::i16  , Expand);
 
   setOperationAction(ISD::READIO           , MVT::i1   , Expand);
   setOperationAction(ISD::READIO           , MVT::i8   , Expand);


Index: llvm/lib/Target/X86/X86InstrInfo.td
diff -u llvm/lib/Target/X86/X86InstrInfo.td:1.204 llvm/lib/Target/X86/X86InstrInfo.td:1.205
--- llvm/lib/Target/X86/X86InstrInfo.td:1.204	Fri Jan 13 19:18:49 2006
+++ llvm/lib/Target/X86/X86InstrInfo.td	Fri Jan 13 21:14:10 2006
@@ -518,7 +518,9 @@
 
 let isTwoAddress = 1 in                               // R32 = bswap R32
   def BSWAP32r : I<0xC8, AddRegFrm,
-                   (ops R32:$dst, R32:$src), "bswap{l} $dst", []>, TB;
+                   (ops R32:$dst, R32:$src),
+                   "bswap{l} $dst", 
+                   [(set R32:$dst, (bswap R32:$src))]>, TB;
 
 def XCHG8rr  : I<0x86, MRMDestReg,                    // xchg R8, R8
                  (ops R8:$src1, R8:$src2),





From natebegeman at mac.com  Fri Jan 13 21:14:26 2006
From: natebegeman at mac.com (Nate Begeman)
Date: Fri, 13 Jan 2006 21:14:26 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/IA64/IA64ISelLowering.cpp
	IA64ISelPattern.cpp 
Message-ID: <200601140314.VAA25913@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/IA64:

IA64ISelLowering.cpp updated: 1.19 -> 1.20
IA64ISelPattern.cpp updated: 1.75 -> 1.76
---
Log message:

bswap implementation


---
Diffs of the changes:  (+2 -0)

 IA64ISelLowering.cpp |    1 +
 IA64ISelPattern.cpp  |    1 +
 2 files changed, 2 insertions(+)


Index: llvm/lib/Target/IA64/IA64ISelLowering.cpp
diff -u llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.19 llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.20
--- llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.19	Thu Jan 12 20:40:58 2006
+++ llvm/lib/Target/IA64/IA64ISelLowering.cpp	Fri Jan 13 21:14:10 2006
@@ -82,6 +82,7 @@
       setOperationAction(ISD::CTLZ , MVT::i64  , Expand);
       setOperationAction(ISD::ROTL , MVT::i64  , Expand);
       setOperationAction(ISD::ROTR , MVT::i64  , Expand);
+      setOperationAction(ISD::BSWAP, MVT::i64  , Expand);  // mux @rev
 
       // Not implemented yet.
       setOperationAction(ISD::STACKSAVE, MVT::Other, Expand);


Index: llvm/lib/Target/IA64/IA64ISelPattern.cpp
diff -u llvm/lib/Target/IA64/IA64ISelPattern.cpp:1.75 llvm/lib/Target/IA64/IA64ISelPattern.cpp:1.76
--- llvm/lib/Target/IA64/IA64ISelPattern.cpp:1.75	Thu Jan 12 20:40:58 2006
+++ llvm/lib/Target/IA64/IA64ISelPattern.cpp	Fri Jan 13 21:14:10 2006
@@ -98,6 +98,7 @@
       setOperationAction(ISD::CTLZ , MVT::i64  , Expand);
       setOperationAction(ISD::ROTL , MVT::i64  , Expand);
       setOperationAction(ISD::ROTR , MVT::i64  , Expand);
+      setOperationAction(ISD::BSWAP, MVT::i64  , Expand);  // mux @rev
       // FIXME: implement mulhs (xma.h) and mulhu (xma.hu)
       setOperationAction(ISD::MULHS , MVT::i64  , Expand);
       setOperationAction(ISD::MULHU , MVT::i64  , Expand);





From natebegeman at mac.com  Fri Jan 13 21:14:27 2006
From: natebegeman at mac.com (Nate Begeman)
Date: Fri, 13 Jan 2006 21:14:27 -0600
Subject: [llvm-commits] CVS: llvm/test/Regression/CodeGen/X86/bswap.ll 
Message-ID: <200601140314.VAA25927@zion.cs.uiuc.edu>



Changes in directory llvm/test/Regression/CodeGen/X86:

bswap.ll added (r1.1)
---
Log message:

bswap implementation


---
Diffs of the changes:  (+23 -0)

 bswap.ll |   23 +++++++++++++++++++++++
 1 files changed, 23 insertions(+)


Index: llvm/test/Regression/CodeGen/X86/bswap.ll
diff -c /dev/null llvm/test/Regression/CodeGen/X86/bswap.ll:1.1
*** /dev/null	Fri Jan 13 21:14:20 2006
--- llvm/test/Regression/CodeGen/X86/bswap.ll	Fri Jan 13 21:14:10 2006
***************
*** 0 ****
--- 1,23 ----
+ ; bswap should be constant folded when it is passed a constant argument
+ 
+ ; RUN: llvm-as < %s | llc -march=x86 -enable-x86-dag-isel | grep bswapl | wc -l | grep 3 &&
+ ; RUN: llvm-as < %s | llc -march=x86 -enable-x86-dag-isel | grep rolw | wc -l | grep 1
+ 
+ declare ushort %llvm.bswap.i16(ushort)
+ declare uint %llvm.bswap.i32(uint)
+ declare ulong %llvm.bswap.i64(ulong)
+ 
+ ushort %W(ushort %A) {
+ 	%Z = call ushort %llvm.bswap.i16(ushort %A)
+ 	ret ushort %Z
+ }
+ 
+ uint %X(uint %A) {
+ 	%Z = call uint %llvm.bswap.i32(uint %A)
+ 	ret uint %Z
+ }
+ 
+ ulong %Y(ulong %A) {
+ 	%Z = call ulong %llvm.bswap.i64(ulong %A)
+ 	ret ulong %Z
+ }





From natebegeman at mac.com  Fri Jan 13 21:14:27 2006
From: natebegeman at mac.com (Nate Begeman)
Date: Fri, 13 Jan 2006 21:14:27 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
Message-ID: <200601140314.VAA25931@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/SparcV8:

SparcV8ISelDAGToDAG.cpp updated: 1.49 -> 1.50
---
Log message:

bswap implementation


---
Diffs of the changes:  (+1 -0)

 SparcV8ISelDAGToDAG.cpp |    1 +
 1 files changed, 1 insertion(+)


Index: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
diff -u llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.49 llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.50
--- llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.49	Thu Jan 12 20:42:53 2006
+++ llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp	Fri Jan 13 21:14:10 2006
@@ -150,6 +150,7 @@
   setOperationAction(ISD::CTLZ , MVT::i32, Expand);
   setOperationAction(ISD::ROTL , MVT::i32, Expand);
   setOperationAction(ISD::ROTR , MVT::i32, Expand);
+  setOperationAction(ISD::BSWAP, MVT::i32, Expand);
 
   setOperationAction(ISD::SHL_PARTS, MVT::i32, Expand);
   setOperationAction(ISD::SRA_PARTS, MVT::i32, Expand);





From natebegeman at mac.com  Fri Jan 13 21:14:27 2006
From: natebegeman at mac.com (Nate Begeman)
Date: Fri, 13 Jan 2006 21:14:27 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelLowering.cpp 
Message-ID: <200601140314.VAA25921@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/PowerPC:

PPCISelLowering.cpp updated: 1.65 -> 1.66
---
Log message:

bswap implementation


---
Diffs of the changes:  (+2 -1)

 PPCISelLowering.cpp |    3 ++-
 1 files changed, 2 insertions(+), 1 deletion(-)


Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.65 llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.66
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.65	Fri Jan 13 11:52:03 2006
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp	Fri Jan 13 21:14:10 2006
@@ -64,7 +64,8 @@
     setOperationAction(ISD::FSQRT, MVT::f32, Expand);
   }
   
-  // PowerPC does not have CTPOP or CTTZ
+  // PowerPC does not have BSWAP, CTPOP or CTTZ
+  setOperationAction(ISD::BSWAP, MVT::i32  , Expand);
   setOperationAction(ISD::CTPOP, MVT::i32  , Expand);
   setOperationAction(ISD::CTTZ , MVT::i32  , Expand);
   





From natebegeman at mac.com  Fri Jan 13 21:14:28 2006
From: natebegeman at mac.com (Nate Begeman)
Date: Fri, 13 Jan 2006 21:14:28 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/TargetSelectionDAG.td 
Message-ID: <200601140314.VAA25938@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target:

TargetSelectionDAG.td updated: 1.43 -> 1.44
---
Log message:

bswap implementation


---
Diffs of the changes:  (+1 -0)

 TargetSelectionDAG.td |    1 +
 1 files changed, 1 insertion(+)


Index: llvm/lib/Target/TargetSelectionDAG.td
diff -u llvm/lib/Target/TargetSelectionDAG.td:1.43 llvm/lib/Target/TargetSelectionDAG.td:1.44
--- llvm/lib/Target/TargetSelectionDAG.td:1.43	Wed Jan 11 15:21:00 2006
+++ llvm/lib/Target/TargetSelectionDAG.td	Fri Jan 13 21:14:10 2006
@@ -240,6 +240,7 @@
                         [SDNPCommutative, SDNPAssociative]>;
                         
 def sext_inreg : SDNode<"ISD::SIGN_EXTEND_INREG", SDTExtInreg>;
+def bswap      : SDNode<"ISD::BSWAP"      , SDTIntUnaryOp>;
 def ctlz       : SDNode<"ISD::CTLZ"       , SDTIntUnaryOp>;
 def cttz       : SDNode<"ISD::CTTZ"       , SDTIntUnaryOp>;
 def ctpop      : SDNode<"ISD::CTPOP"      , SDTIntUnaryOp>;





From natebegeman at mac.com  Fri Jan 13 21:14:28 2006
From: natebegeman at mac.com (Nate Begeman)
Date: Fri, 13 Jan 2006 21:14:28 -0600
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
	SelectionDAGISel.cpp 
Message-ID: <200601140314.VAA25939@zion.cs.uiuc.edu>



Changes in directory llvm/lib/CodeGen/SelectionDAG:

LegalizeDAG.cpp updated: 1.262 -> 1.263
SelectionDAGISel.cpp updated: 1.123 -> 1.124
---
Log message:

bswap implementation


---
Diffs of the changes:  (+83 -0)

 LegalizeDAG.cpp      |   68 +++++++++++++++++++++++++++++++++++++++++++++++++++
 SelectionDAGISel.cpp |   15 +++++++++++
 2 files changed, 83 insertions(+)


Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.262 llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.263
--- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.262	Fri Jan 13 11:48:44 2006
+++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp	Fri Jan 13 21:14:10 2006
@@ -2217,6 +2217,58 @@
     }
     break;
     
+  case ISD::BSWAP:
+    Tmp1 = LegalizeOp(Node->getOperand(0));   // Op
+    switch (TLI.getOperationAction(Node->getOpcode(), Node->getValueType(0))) {
+      case TargetLowering::Legal:
+        if (Tmp1 != Node->getOperand(0))
+          Result = DAG.getNode(Node->getOpcode(), Node->getValueType(0), Tmp1);
+        break;
+      case TargetLowering::Promote: {
+        MVT::ValueType OVT = Tmp1.getValueType();
+        MVT::ValueType NVT = TLI.getTypeToPromoteTo(Node->getOpcode(), OVT);
+        unsigned DiffBits = getSizeInBits(NVT) - getSizeInBits(OVT);
+
+        Tmp1 = DAG.getNode(ISD::ZERO_EXTEND, NVT, Tmp1);
+        Tmp1 = DAG.getNode(ISD::BSWAP, NVT, Tmp1);
+        Result = DAG.getNode(ISD::SRL, NVT, Tmp1,
+                             DAG.getConstant(DiffBits, TLI.getShiftAmountTy()));
+        break;
+      }
+      case TargetLowering::Custom:
+        assert(0 && "Cannot custom legalize this yet!");
+      case TargetLowering::Expand: {
+        MVT::ValueType VT = Tmp1.getValueType();
+        switch (VT) {
+        default: assert(0 && "Unhandled Expand type in BSWAP!"); abort();
+        case MVT::i16:
+          Tmp2 = DAG.getNode(ISD::SHL, VT, Tmp1, 
+                             DAG.getConstant(8, TLI.getShiftAmountTy()));
+          Tmp1 = DAG.getNode(ISD::SRL, VT, Tmp1,
+                             DAG.getConstant(8, TLI.getShiftAmountTy()));
+          Result = DAG.getNode(ISD::OR, VT, Tmp1, Tmp2);
+          break;
+        case MVT::i32:
+          Tmp4 = DAG.getNode(ISD::SHL, VT, Tmp1, 
+                             DAG.getConstant(24, TLI.getShiftAmountTy()));
+          Tmp3 = DAG.getNode(ISD::SHL, VT, Tmp1, 
+                             DAG.getConstant(8, TLI.getShiftAmountTy()));
+          Tmp2 = DAG.getNode(ISD::SRL, VT, Tmp1, 
+                             DAG.getConstant(8, TLI.getShiftAmountTy()));
+          Tmp1 = DAG.getNode(ISD::SRL, VT, Tmp1, 
+                             DAG.getConstant(24, TLI.getShiftAmountTy()));
+          Tmp3 = DAG.getNode(ISD::AND, VT, Tmp3, DAG.getConstant(0xFF0000, VT));
+          Tmp2 = DAG.getNode(ISD::AND, VT, Tmp2, DAG.getConstant(0xFF00, VT));
+          Tmp4 = DAG.getNode(ISD::OR, VT, Tmp4, Tmp3);
+          Tmp2 = DAG.getNode(ISD::OR, VT, Tmp2, Tmp1);
+          Result = DAG.getNode(ISD::OR, VT, Tmp4, Tmp2);
+          break;
+        }
+        break;
+      }
+    }
+    break;
+    
   case ISD::CTPOP:
   case ISD::CTTZ:
   case ISD::CTLZ:
@@ -3027,6 +3079,14 @@
     AddLegalizedOperand(Op.getValue(1), Result.getValue(1));
     break;
   }
+  case ISD::BSWAP:
+    Tmp1 = Node->getOperand(0);
+    Tmp1 = DAG.getNode(ISD::ZERO_EXTEND, NVT, Tmp1);
+    Tmp1 = DAG.getNode(ISD::BSWAP, NVT, Tmp1);
+    Result = DAG.getNode(ISD::SRL, NVT, Tmp1,
+                         DAG.getConstant(getSizeInBits(NVT) - getSizeInBits(VT),
+                                         TLI.getShiftAmountTy()));
+    break;
   case ISD::CTPOP:
   case ISD::CTTZ:
   case ISD::CTLZ:
@@ -3636,6 +3696,14 @@
     Lo = DAG.getNode(ISD::SIGN_EXTEND_INREG, NVT, Lo, Node->getOperand(1));
     break;
 
+  case ISD::BSWAP: {
+    ExpandOp(Node->getOperand(0), Lo, Hi);
+    SDOperand TempLo = DAG.getNode(ISD::BSWAP, NVT, Hi);
+    Hi = DAG.getNode(ISD::BSWAP, NVT, Lo);
+    Lo = TempLo;
+    break;
+  }
+    
   case ISD::CTPOP:
     ExpandOp(Node->getOperand(0), Lo, Hi);
     Lo = DAG.getNode(ISD::ADD, NVT,          // ctpop(HL) -> ctpop(H)+ctpop(L)


Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.123 llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.124
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.123	Thu Jan 12 20:50:02 2006
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp	Fri Jan 13 21:14:10 2006
@@ -989,6 +989,21 @@
     DAG.setRoot(Tmp.getValue(1));
     return 0;
   }
+  case Intrinsic::bswap_i16:
+    setValue(&I, DAG.getNode(ISD::BSWAP,
+                             getValue(I.getOperand(1)).getValueType(),
+                             getValue(I.getOperand(1))));
+    return 0;
+  case Intrinsic::bswap_i32:
+    setValue(&I, DAG.getNode(ISD::BSWAP,
+                             getValue(I.getOperand(1)).getValueType(),
+                             getValue(I.getOperand(1))));
+    return 0;
+  case Intrinsic::bswap_i64:
+    setValue(&I, DAG.getNode(ISD::BSWAP,
+                             getValue(I.getOperand(1)).getValueType(),
+                             getValue(I.getOperand(1))));
+    return 0;
   case Intrinsic::cttz:
     setValue(&I, DAG.getNode(ISD::CTTZ,
                              getValue(I.getOperand(1)).getValueType(),





From natebegeman at mac.com  Fri Jan 13 21:18:39 2006
From: natebegeman at mac.com (Nate Begeman)
Date: Fri, 13 Jan 2006 21:18:39 -0600
Subject: [llvm-commits] 
	CVS: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
Message-ID: <200601140318.VAA25961@zion.cs.uiuc.edu>



Changes in directory llvm/lib/CodeGen/SelectionDAG:

SelectionDAGISel.cpp updated: 1.124 -> 1.125
---
Log message:

Remove some duplicated code


---
Diffs of the changes:  (+0 -8)

 SelectionDAGISel.cpp |    8 --------
 1 files changed, 8 deletions(-)


Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.124 llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.125
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.124	Fri Jan 13 21:14:10 2006
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp	Fri Jan 13 21:18:27 2006
@@ -990,15 +990,7 @@
     return 0;
   }
   case Intrinsic::bswap_i16:
-    setValue(&I, DAG.getNode(ISD::BSWAP,
-                             getValue(I.getOperand(1)).getValueType(),
-                             getValue(I.getOperand(1))));
-    return 0;
   case Intrinsic::bswap_i32:
-    setValue(&I, DAG.getNode(ISD::BSWAP,
-                             getValue(I.getOperand(1)).getValueType(),
-                             getValue(I.getOperand(1))));
-    return 0;
   case Intrinsic::bswap_i64:
     setValue(&I, DAG.getNode(ISD::BSWAP,
                              getValue(I.getOperand(1)).getValueType(),





From lattner at cs.uiuc.edu  Sat Jan 14 13:17:03 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sat, 14 Jan 2006 13:17:03 -0600
Subject: [llvm-commits] CVS: llvm/include/llvm/Analysis/CallGraph.h 
Message-ID: <200601141917.NAA05270@zion.cs.uiuc.edu>



Changes in directory llvm/include/llvm/Analysis:

CallGraph.h updated: 1.44 -> 1.45
---
Log message:

add a dump method to CallGraph


---
Diffs of the changes:  (+2 -1)

 CallGraph.h |    3 ++-
 1 files changed, 2 insertions(+), 1 deletion(-)


Index: llvm/include/llvm/Analysis/CallGraph.h
diff -u llvm/include/llvm/Analysis/CallGraph.h:1.44 llvm/include/llvm/Analysis/CallGraph.h:1.45
--- llvm/include/llvm/Analysis/CallGraph.h:1.44	Thu Dec 22 00:07:52 2005
+++ llvm/include/llvm/Analysis/CallGraph.h	Sat Jan 14 13:16:51 2006
@@ -147,7 +147,8 @@
   void initialize(Module &M);
 
   virtual void print(std::ostream &o, const Module *M) const;
-
+  void dump() const;
+  
   // stub - dummy function, just ignore it
   static void stub();
 protected:





From lattner at cs.uiuc.edu  Sat Jan 14 13:17:13 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sat, 14 Jan 2006 13:17:13 -0600
Subject: [llvm-commits] CVS: llvm/lib/Analysis/IPA/CallGraph.cpp 
Message-ID: <200601141917.NAA05277@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Analysis/IPA:

CallGraph.cpp updated: 1.49 -> 1.50
---
Log message:

add a dump method to CallGraph


---
Diffs of the changes:  (+4 -0)

 CallGraph.cpp |    4 ++++
 1 files changed, 4 insertions(+)


Index: llvm/lib/Analysis/IPA/CallGraph.cpp
diff -u llvm/lib/Analysis/IPA/CallGraph.cpp:1.49 llvm/lib/Analysis/IPA/CallGraph.cpp:1.50
--- llvm/lib/Analysis/IPA/CallGraph.cpp:1.49	Thu Dec 22 00:07:52 2005
+++ llvm/lib/Analysis/IPA/CallGraph.cpp	Sat Jan 14 13:17:02 2006
@@ -216,6 +216,10 @@
     I->second->print(OS);
 }
 
+void CallGraph::dump() const {
+  print(std::cerr, 0);
+}
+
 //===----------------------------------------------------------------------===//
 // Implementations of public modification methods
 //





From lattner at cs.uiuc.edu  Sat Jan 14 13:30:47 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sat, 14 Jan 2006 13:30:47 -0600
Subject: [llvm-commits] CVS: llvm/lib/Transforms/Scalar/LowerGC.cpp 
Message-ID: <200601141930.NAA05335@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Transforms/Scalar:

LowerGC.cpp updated: 1.9 -> 1.10
---
Log message:

FunctionPass's cannot do IPO things.


---
Diffs of the changes:  (+0 -4)

 LowerGC.cpp |    4 ----
 1 files changed, 4 deletions(-)


Index: llvm/lib/Transforms/Scalar/LowerGC.cpp
diff -u llvm/lib/Transforms/Scalar/LowerGC.cpp:1.9 llvm/lib/Transforms/Scalar/LowerGC.cpp:1.10
--- llvm/lib/Transforms/Scalar/LowerGC.cpp:1.9	Sat Oct 22 23:37:20 2005
+++ llvm/lib/Transforms/Scalar/LowerGC.cpp	Sat Jan 14 13:30:35 2006
@@ -26,7 +26,6 @@
 #include "llvm/Instructions.h"
 #include "llvm/Module.h"
 #include "llvm/Pass.h"
-#include "llvm/Transforms/Utils/Cloning.h"
 using namespace llvm;
 
 namespace {
@@ -203,9 +202,6 @@
               }
             }
 
-            // Now that we made the replacement, inline expand the call if
-            // possible, otherwise things will be too horribly expensive.
-            InlineFunction(CI);
             MadeChange = true;
           }
       }





From lattner at cs.uiuc.edu  Sat Jan 14 14:02:02 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sat, 14 Jan 2006 14:02:02 -0600
Subject: [llvm-commits] CVS: llvm/include/llvm/Analysis/CallGraph.h 
Message-ID: <200601142002.OAA05510@zion.cs.uiuc.edu>



Changes in directory llvm/include/llvm/Analysis:

CallGraph.h updated: 1.45 -> 1.46
---
Log message:

Add CallGraph::getOrInsertFunction, to allow clients to update the callgraph
when they change the program


---
Diffs of the changes:  (+5 -0)

 CallGraph.h |    5 +++++
 1 files changed, 5 insertions(+)


Index: llvm/include/llvm/Analysis/CallGraph.h
diff -u llvm/include/llvm/Analysis/CallGraph.h:1.45 llvm/include/llvm/Analysis/CallGraph.h:1.46
--- llvm/include/llvm/Analysis/CallGraph.h:1.45	Sat Jan 14 13:16:51 2006
+++ llvm/include/llvm/Analysis/CallGraph.h	Sat Jan 14 14:01:50 2006
@@ -132,6 +132,11 @@
   /// old code over).
   void changeFunction(Function *OldF, Function *NewF);
 
+  /// getOrInsertFunction - This method is identical to calling operator[], but
+  /// it will insert a new CallGraphNode for the specified function if one does
+  /// not already exist.
+  CallGraphNode *getOrInsertFunction(const Function *F);
+  
   //===---------------------------------------------------------------------
   // Pass infrastructure interface glue code...
   //





From lattner at cs.uiuc.edu  Sat Jan 14 14:03:27 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sat, 14 Jan 2006 14:03:27 -0600
Subject: [llvm-commits] CVS: llvm/lib/Analysis/IPA/CallGraph.cpp 
Message-ID: <200601142003.OAA05572@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Analysis/IPA:

CallGraph.cpp updated: 1.50 -> 1.51
---
Log message:

Add a new CallGraph::getOrInsertFunction for clients to use when updating
the callgraph.


---
Diffs of the changes:  (+19 -16)

 CallGraph.cpp |   35 +++++++++++++++++++----------------
 1 files changed, 19 insertions(+), 16 deletions(-)


Index: llvm/lib/Analysis/IPA/CallGraph.cpp
diff -u llvm/lib/Analysis/IPA/CallGraph.cpp:1.50 llvm/lib/Analysis/IPA/CallGraph.cpp:1.51
--- llvm/lib/Analysis/IPA/CallGraph.cpp:1.50	Sat Jan 14 13:17:02 2006
+++ llvm/lib/Analysis/IPA/CallGraph.cpp	Sat Jan 14 14:03:00 2006
@@ -56,7 +56,7 @@
     destroy();
     CallGraph::initialize(M);
     
-    ExternalCallingNode = getNodeFor(0);
+    ExternalCallingNode = getOrInsertFunction(0);
     CallsExternalNode = new CallGraphNode(0);
     Root = 0;
   
@@ -107,24 +107,12 @@
   //===---------------------------------------------------------------------
   // Implementation of CallGraph construction
   //
-  // getNodeFor - Return the node for the specified function or create one if it
-  // does not already exist.
-  //
-
-  CallGraphNode *getNodeFor(Function *F) {
-    CallGraphNode *&CGN = FunctionMap[F];
-    if (CGN) return CGN;
 
-    assert((!F || F->getParent() == Mod) && "Function not in current module!");
-    return CGN = new CallGraphNode(F);
-  }
-  
-  //
   // addToCallGraph - Add a function to the call graph, and link the node to all
   // of the functions that it calls.
   //
   void addToCallGraph(Function *F) {
-    CallGraphNode *Node = getNodeFor(F);
+    CallGraphNode *Node = getOrInsertFunction(F);
 
     // If this function has external linkage, anything could call it...
     if (!F->hasInternalLinkage()) {
@@ -150,7 +138,8 @@
     for (Value::use_iterator I = F->use_begin(), E = F->use_end(); I != E; ++I){
       if (Instruction *Inst = dyn_cast<Instruction>(*I)) {
         if (isOnlyADirectCall(F, CallSite::get(Inst)))
-          getNodeFor(Inst->getParent()->getParent())->addCalledFunction(Node);
+          getOrInsertFunction(Inst->getParent()->getParent())
+              ->addCalledFunction(Node);
         else
           isUsedExternally = true;
       } else if (GlobalValue *GV = dyn_cast<GlobalValue>(*I)) {
@@ -158,7 +147,8 @@
              I != E; ++I)
           if (Instruction *Inst = dyn_cast<Instruction>(*I)) {
           if (isOnlyADirectCall(F, CallSite::get(Inst)))
-            getNodeFor(Inst->getParent()->getParent())->addCalledFunction(Node);
+            getOrInsertFunction(Inst->getParent()->getParent())
+                ->addCalledFunction(Node);
           else
             isUsedExternally = true;
           } else {
@@ -255,6 +245,19 @@
   FunctionMap.erase(I);
 }
 
+// getOrInsertFunction - This method is identical to calling operator[], but
+// it will insert a new CallGraphNode for the specified function if one does
+// not already exist.
+CallGraphNode *CallGraph::getOrInsertFunction(const Function *F) {
+  CallGraphNode *&CGN = FunctionMap[F];
+  if (CGN) return CGN;
+  
+  assert((!F || F->getParent() == Mod) && "Function not in current module!");
+  return CGN = new CallGraphNode(const_cast<Function*>(F));
+}
+
+
+
 void CallGraph::stub() {}
 
 void CallGraphNode::print(std::ostream &OS) const {





From lattner at cs.uiuc.edu  Sat Jan 14 14:05:34 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sat, 14 Jan 2006 14:05:34 -0600
Subject: [llvm-commits] CVS: llvm/include/llvm/Transforms/Utils/Cloning.h 
Message-ID: <200601142005.OAA05642@zion.cs.uiuc.edu>



Changes in directory llvm/include/llvm/Transforms/Utils:

Cloning.h updated: 1.17 -> 1.18
---
Log message:

Teach inline function how to update the callgraph when it makes changes.


---
Diffs of the changes:  (+13 -9)

 Cloning.h |   22 +++++++++++++---------
 1 files changed, 13 insertions(+), 9 deletions(-)


Index: llvm/include/llvm/Transforms/Utils/Cloning.h
diff -u llvm/include/llvm/Transforms/Utils/Cloning.h:1.17 llvm/include/llvm/Transforms/Utils/Cloning.h:1.18
--- llvm/include/llvm/Transforms/Utils/Cloning.h:1.17	Fri Jan 13 12:38:08 2006
+++ llvm/include/llvm/Transforms/Utils/Cloning.h	Sat Jan 14 14:05:06 2006
@@ -32,6 +32,7 @@
 class ReturnInst;
 class CallSite;
 class Trace;
+class CallGraph;
 
 /// CloneModule - Return an exact copy of the specified module
 ///
@@ -136,6 +137,12 @@
                     std::map<const Value*, Value*> &ValueMap,
                     const char *NameSuffix);
 
+/// CloneTrace - Returns a copy of the specified trace.
+/// It takes a vector of basic blocks clones the basic blocks, removes internal
+/// phi nodes, adds it to the same function as the original (although there is
+/// no jump to it) and returns the new vector of basic blocks.
+std::vector<BasicBlock *> CloneTrace(const std::vector<BasicBlock*> &origTrace);
+
 /// InlineFunction - This function inlines the called function into the basic
 /// block of the caller.  This returns false if it is not possible to inline
 /// this call.  The program is still in a well defined state if this occurs
@@ -146,15 +153,12 @@
 /// exists in the instruction stream.  Similiarly this will inline a recursive
 /// function by one level.
 ///
-bool InlineFunction(CallInst *C);
-bool InlineFunction(InvokeInst *II);
-bool InlineFunction(CallSite CS);
-
-/// CloneTrace - Returns a copy of the specified trace.
-/// It takes a vector of basic blocks clones the basic blocks, removes internal
-/// phi nodes, adds it to the same function as the original (although there is
-/// no jump to it) and returns the new vector of basic blocks.
-std::vector<BasicBlock *> CloneTrace(const std::vector<BasicBlock*> &origTrace);
+/// If a non-null callgraph pointer is provided, these functions update the
+/// CallGraph to represent the program after inlining.
+///
+bool InlineFunction(CallInst *C, CallGraph *CG = 0);
+bool InlineFunction(InvokeInst *II, CallGraph *CG = 0);
+bool InlineFunction(CallSite CS, CallGraph *CG = 0);
 
 } // End llvm namespace
 





From lattner at cs.uiuc.edu  Sat Jan 14 14:07:33 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sat, 14 Jan 2006 14:07:33 -0600
Subject: [llvm-commits] 
	CVS: llvm/test/Regression/Transforms/Inline/2006-01-14-CallGraphUpdate.ll
Message-ID: <200601142007.OAA05737@zion.cs.uiuc.edu>



Changes in directory llvm/test/Regression/Transforms/Inline:

2006-01-14-CallGraphUpdate.ll added (r1.1)
---
Log message:

New testcase for a regression last night: the -inline pass wasn't updating
callgraph to include new edges do to inserted llvm.stacksave/llvm.stackrestore
calls.


---
Diffs of the changes:  (+26 -0)

 2006-01-14-CallGraphUpdate.ll |   26 ++++++++++++++++++++++++++
 1 files changed, 26 insertions(+)


Index: llvm/test/Regression/Transforms/Inline/2006-01-14-CallGraphUpdate.ll
diff -c /dev/null llvm/test/Regression/Transforms/Inline/2006-01-14-CallGraphUpdate.ll:1.1
*** /dev/null	Sat Jan 14 14:07:17 2006
--- llvm/test/Regression/Transforms/Inline/2006-01-14-CallGraphUpdate.ll	Sat Jan 14 14:07:07 2006
***************
*** 0 ****
--- 1,26 ----
+ ; RUN: llvm-as < %s | opt -inline -prune-eh -disable-output
+ 
+  	"struct.std::__codecvt_abstract_base<char,char,__mbstate_t>" = type { "struct.std::locale::facet" }
+ 	"struct.std::basic_streambuf<wchar_t,std::char_traits<wchar_t> >" = type { int (...)**, int*, int*, int*, int*, int*, int*, "struct.std::locale" }
+ 	"struct.std::ios_base" = type { int (...)**, int, int, uint, uint, uint, "struct.std::ios_base::_Callback_list"*, "struct.std::ios_base::_Words", [8 x "struct.std::ios_base::_Words"], int, "struct.std::ios_base::_Words"*, "struct.std::locale" }
+ 	"struct.std::ios_base::_Callback_list" = type { "struct.std::ios_base::_Callback_list"*, void (uint, "struct.std::ios_base"*, int)*, int, int }
+ 	"struct.std::ios_base::_Words" = type { sbyte*, int }
+ 	"struct.std::locale" = type { "struct.std::locale::_Impl"* }
+ 	"struct.std::locale::_Impl" = type { int, "struct.std::locale::facet"**, uint, "struct.std::locale::facet"**, sbyte** }
+ 	"struct.std::locale::facet" = type { int (...)**, int }
+ 	"struct.std::ostreambuf_iterator<wchar_t,std::char_traits<wchar_t> >" = type { "struct.std::basic_streambuf<wchar_t,std::char_traits<wchar_t> >"*, int }
+ 
+ implementation   ; Functions:
+ 
+ void %_ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES3_RSt8ios_basewl("struct.std::ostreambuf_iterator<wchar_t,std::char_traits<wchar_t> >"* %agg.result, "struct.std::__codecvt_abstract_base<char,char,__mbstate_t>"* %this, "struct.std::basic_streambuf<wchar_t,std::char_traits<wchar_t> >"* %__s.0__, int %__s.1__, "struct.std::ios_base"* %__io, int %__fill, int %__v) {
+ entry:
+ 	tail call fastcc void %_ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE13_M_insert_intIlEES3_S3_RSt8ios_basewT_( )
+ 	ret void
+ }
+ 
+ fastcc void %_ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE13_M_insert_intIlEES3_S3_RSt8ios_basewT_() {
+ entry:
+ 	%tmp.38 = shl uint 0, ubyte 3		; <uint> [#uses=1]
+ 	%tmp.39 = alloca sbyte, uint %tmp.38		; <sbyte*> [#uses=0]
+ 	ret void
+ }





From lattner at cs.uiuc.edu  Sat Jan 14 14:08:17 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sat, 14 Jan 2006 14:08:17 -0600
Subject: [llvm-commits] CVS: llvm/lib/Transforms/Utils/InlineFunction.cpp 
Message-ID: <200601142008.OAA05772@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Transforms/Utils:

InlineFunction.cpp updated: 1.40 -> 1.41
---
Log message:

Teach the inliner to update the CallGraph itself, and have it add edges to 
llvm.stacksave/restore when it inserts calls to them.


---
Diffs of the changes:  (+53 -4)

 InlineFunction.cpp |   57 +++++++++++++++++++++++++++++++++++++++++++++++++----
 1 files changed, 53 insertions(+), 4 deletions(-)


Index: llvm/lib/Transforms/Utils/InlineFunction.cpp
diff -u llvm/lib/Transforms/Utils/InlineFunction.cpp:1.40 llvm/lib/Transforms/Utils/InlineFunction.cpp:1.41
--- llvm/lib/Transforms/Utils/InlineFunction.cpp:1.40	Fri Jan 13 13:34:14 2006
+++ llvm/lib/Transforms/Utils/InlineFunction.cpp	Sat Jan 14 14:07:50 2006
@@ -18,11 +18,16 @@
 #include "llvm/Module.h"
 #include "llvm/Instructions.h"
 #include "llvm/Intrinsics.h"
+#include "llvm/Analysis/CallGraph.h"
 #include "llvm/Support/CallSite.h"
 using namespace llvm;
 
-bool llvm::InlineFunction(CallInst *CI) { return InlineFunction(CallSite(CI)); }
-bool llvm::InlineFunction(InvokeInst *II) {return InlineFunction(CallSite(II));}
+bool llvm::InlineFunction(CallInst *CI, CallGraph *CG) {
+  return InlineFunction(CallSite(CI), CG);
+}
+bool llvm::InlineFunction(InvokeInst *II, CallGraph *CG) {
+  return InlineFunction(CallSite(II), CG);
+}
 
 /// HandleInlinedInvoke - If we inlined an invoke site, we need to convert calls
 /// in the body of the inlined function into invokes and turn unwind
@@ -131,6 +136,24 @@
   InvokeDest->removePredecessor(II->getParent());
 }
 
+/// UpdateCallGraphAfterInlining - Once we have finished inlining a call from
+/// caller to callee, update the specified callgraph to reflect the changes we
+/// made.
+static void UpdateCallGraphAfterInlining(const Function *Caller, 
+                                         const Function *Callee,
+                                         CallGraph &CG) {
+  // Update the call graph by deleting the edge from Callee to Caller
+  CallGraphNode *CalleeNode = CG[Callee];
+  CallGraphNode *CallerNode = CG[Caller];
+  CallerNode->removeCallEdgeTo(CalleeNode);
+  
+  // Since we inlined all uninlined call sites in the callee into the caller,
+  // add edges from the caller to all of the callees of the callee.
+  for (CallGraphNode::iterator I = CalleeNode->begin(),
+       E = CalleeNode->end(); I != E; ++I)
+    CallerNode->addCalledFunction(*I);
+}
+
 
 // InlineFunction - This function inlines the called function into the basic
 // block of the caller.  This returns false if it is not possible to inline this
@@ -141,7 +164,7 @@
 // exists in the instruction stream.  Similiarly this will inline a recursive
 // function by one level.
 //
-bool llvm::InlineFunction(CallSite CS) {
+bool llvm::InlineFunction(CallSite CS, CallGraph *CG) {
   Instruction *TheCall = CS.getInstruction();
   assert(TheCall->getParent() && TheCall->getParent()->getParent() &&
          "Instruction not in function!");
@@ -234,14 +257,33 @@
     // inlined function.
     for (unsigned i = 0, e = Returns.size(); i != e; ++i)
       new CallInst(StackRestore, SavedPtr, "", Returns[i]);
+
+    // Count the number of StackRestore calls we insert.
+    unsigned NumStackRestores = Returns.size();
     
     // If we are inlining an invoke instruction, insert restores before each
     // unwind.  These unwinds will be rewritten into branches later.
     if (InlinedFunctionInfo.ContainsUnwinds && isa<InvokeInst>(TheCall)) {
       for (Function::iterator BB = FirstNewBlock, E = Caller->end();
            BB != E; ++BB)
-        if (UnwindInst *UI = dyn_cast<UnwindInst>(BB->getTerminator()))
+        if (UnwindInst *UI = dyn_cast<UnwindInst>(BB->getTerminator())) {
           new CallInst(StackRestore, SavedPtr, "", UI);
+          ++NumStackRestores;
+        }
+    }
+      
+    // If we are supposed to update the callgraph, do so now.
+    if (CG) {
+      CallGraphNode *StackSaveCGN    = CG->getOrInsertFunction(StackSave);
+      CallGraphNode *StackRestoreCGN = CG->getOrInsertFunction(StackRestore);
+      CallGraphNode *CallerNode = (*CG)[Caller];
+
+      // 'Caller' now calls llvm.stacksave one more time.
+      CallerNode->addCalledFunction(StackSaveCGN);
+      
+      // 'Caller' now calls llvm.stackrestore the appropriate number of times.
+      for (unsigned i = 0; i != NumStackRestores; ++i)
+        CallerNode->addCalledFunction(StackRestoreCGN);
     }
   }
 
@@ -288,6 +330,9 @@
     // Since we are now done with the return instruction, delete it also.
     Returns[0]->getParent()->getInstList().erase(Returns[0]);
 
+    // Update the callgraph if requested.
+    if (CG) UpdateCallGraphAfterInlining(Caller, CalledFunc, *CG);
+    
     // We are now done with the inlining.
     return true;
   }
@@ -413,5 +458,9 @@
 
   // Now we can remove the CalleeEntry block, which is now empty.
   Caller->getBasicBlockList().erase(CalleeEntry);
+  
+  // Update the callgraph if requested.
+  if (CG) UpdateCallGraphAfterInlining(Caller, CalledFunc, *CG);
+
   return true;
 }





From lattner at cs.uiuc.edu  Sat Jan 14 14:09:45 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sat, 14 Jan 2006 14:09:45 -0600
Subject: [llvm-commits] CVS: llvm/lib/Transforms/IPO/Inliner.cpp 
Message-ID: <200601142009.OAA05835@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Transforms/IPO:

Inliner.cpp updated: 1.25 -> 1.26
---
Log message:

Let the inliner update the callgraph to reflect the changes it makes, instead
of doing it ourselves.  This fixes Transforms/Inline/2006-01-14-CallGraphUpdate.ll


---
Diffs of the changes:  (+2 -12)

 Inliner.cpp |   14 ++------------
 1 files changed, 2 insertions(+), 12 deletions(-)


Index: llvm/lib/Transforms/IPO/Inliner.cpp
diff -u llvm/lib/Transforms/IPO/Inliner.cpp:1.25 llvm/lib/Transforms/IPO/Inliner.cpp:1.26
--- llvm/lib/Transforms/IPO/Inliner.cpp:1.25	Fri Jan 13 12:06:56 2006
+++ llvm/lib/Transforms/IPO/Inliner.cpp	Sat Jan 14 14:09:18 2006
@@ -42,18 +42,7 @@
                                  const std::set<Function*> &SCCFunctions) {
   Function *Caller = CS.getInstruction()->getParent()->getParent();
   Function *Callee = CS.getCalledFunction();
-  if (!InlineFunction(CS)) return false;
-
-  // Update the call graph by deleting the edge from Callee to Caller
-  CallGraphNode *CalleeNode = CG[Callee];
-  CallGraphNode *CallerNode = CG[Caller];
-  CallerNode->removeCallEdgeTo(CalleeNode);
-
-  // Since we inlined all uninlined call sites in the callee into the caller,
-  // add edges from the caller to all of the callees of the callee.
-  for (CallGraphNode::iterator I = CalleeNode->begin(),
-         E = CalleeNode->end(); I != E; ++I)
-    CallerNode->addCalledFunction(*I);
+  if (!InlineFunction(CS, &CG)) return false;
 
   // If we inlined the last possible call site to the function, delete the
   // function body now.
@@ -63,6 +52,7 @@
                     << Callee->getName() << "\n");
 
     // Remove any call graph edges from the callee to its callees.
+    CallGraphNode *CalleeNode = CG[Callee];
     while (CalleeNode->begin() != CalleeNode->end())
       CalleeNode->removeCallEdgeTo(*(CalleeNode->end()-1));
 





From lattner at cs.uiuc.edu  Sat Jan 14 14:11:39 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sat, 14 Jan 2006 14:11:39 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp 
Message-ID: <200601142011.OAA05898@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/X86:

X86ISelDAGToDAG.cpp updated: 1.30 -> 1.31
---
Log message:

silence a warning


---
Diffs of the changes:  (+1 -0)

 X86ISelDAGToDAG.cpp |    1 +
 1 files changed, 1 insertion(+)


Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
diff -u llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.30 llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.31
--- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.30	Wed Jan 11 16:15:18 2006
+++ llvm/lib/Target/X86/X86ISelDAGToDAG.cpp	Sat Jan 14 14:11:13 2006
@@ -682,6 +682,7 @@
                                     Base, Scale, Index, Disp, OldCW, Chain);
 
       switch (Opcode) {
+      default: assert(0 && "Unknown FP_TO_INT*_IN_MEM");
       case X86ISD::FP_TO_INT16_IN_MEM: Opc = X86::FpIST16m; break;
       case X86ISD::FP_TO_INT32_IN_MEM: Opc = X86::FpIST32m; break;
       case X86ISD::FP_TO_INT64_IN_MEM: Opc = X86::FpIST64m; break;





From lattner at cs.uiuc.edu  Sat Jan 14 14:55:21 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sat, 14 Jan 2006 14:55:21 -0600
Subject: [llvm-commits] CVS: llvm/lib/VMCore/Dominators.cpp 
Message-ID: <200601142055.OAA06148@zion.cs.uiuc.edu>



Changes in directory llvm/lib/VMCore:

Dominators.cpp updated: 1.67 -> 1.68
---
Log message:

Change ET-Forest to automatically recalculate its DFSnum's if too many slow 
queries are made.

Patch by Daniel Berlin!


---
Diffs of the changes:  (+22 -5)

 Dominators.cpp |   27 ++++++++++++++++++++++-----
 1 files changed, 22 insertions(+), 5 deletions(-)


Index: llvm/lib/VMCore/Dominators.cpp
diff -u llvm/lib/VMCore/Dominators.cpp:1.67 llvm/lib/VMCore/Dominators.cpp:1.68
--- llvm/lib/VMCore/Dominators.cpp:1.67	Mon Jan  9 01:58:01 2006
+++ llvm/lib/VMCore/Dominators.cpp	Sat Jan 14 14:55:09 2006
@@ -812,6 +812,21 @@
   Nodes.clear();
 }
 
+void ETForestBase::updateDFSNumbers()
+{
+  int dfsnum = 0;
+  // Iterate over all nodes in depth first order.
+  for (unsigned i = 0, e = Roots.size(); i != e; ++i)
+    for (df_iterator<BasicBlock*> I = df_begin(Roots[i]),
+           E = df_end(Roots[i]); I != E; ++I) {
+      BasicBlock *BB = *I;
+      if (!getNode(BB)->hasFather())
+        getNode(BB)->assignDFSNumber(dfsnum);    
+  }
+  SlowQueries = 0;
+  DFSInfoValid = true;
+}
+
 ETNode *ETForest::getNodeForBlock(BasicBlock *BB) {
   ETNode *&BBNode = Nodes[BB];
   if (BBNode) return BBNode;
@@ -855,12 +870,14 @@
       }
     }
 
-  int dfsnum = 0;
-  for (Function::iterator I = F->begin(), E = F->end(); I != E; ++I) { 
-   if (!getNodeForBlock(I)->hasFather())
-     getNodeForBlock(I)->assignDFSNumber(dfsnum);
+  // Make sure we've got nodes around for every block
+  for (Function::iterator I = F->begin(), E = F->end(); I != E; ++I) {
+    ETNode *&BBNode = Nodes[I];
+    if (!BBNode)
+      BBNode = new ETNode(I);
   }
-  DFSInfoValid = true;
+
+  updateDFSNumbers ();
 }
 
 //===----------------------------------------------------------------------===//





From lattner at cs.uiuc.edu  Sat Jan 14 14:55:21 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sat, 14 Jan 2006 14:55:21 -0600
Subject: [llvm-commits] CVS: llvm/lib/Analysis/LoopInfo.cpp 
Message-ID: <200601142055.OAA06152@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Analysis:

LoopInfo.cpp updated: 1.66 -> 1.67
---
Log message:

Change ET-Forest to automatically recalculate its DFSnum's if too many slow 
queries are made.

Patch by Daniel Berlin!


---
Diffs of the changes:  (+2 -2)

 LoopInfo.cpp |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)


Index: llvm/lib/Analysis/LoopInfo.cpp
diff -u llvm/lib/Analysis/LoopInfo.cpp:1.66 llvm/lib/Analysis/LoopInfo.cpp:1.67
--- llvm/lib/Analysis/LoopInfo.cpp:1.66	Tue Jan 10 23:08:29 2006
+++ llvm/lib/Analysis/LoopInfo.cpp	Sat Jan 14 14:55:08 2006
@@ -104,7 +104,7 @@
 }
 
 
-void LoopInfo::Calculate(const ETForest &EF) {
+void LoopInfo::Calculate(ETForest &EF) {
   BasicBlock *RootNode = EF.getRoot();
 
   for (df_iterator<BasicBlock*> NI = df_begin(RootNode),
@@ -135,7 +135,7 @@
   return isNotAlreadyContainedIn(SubLoop->getParentLoop(), ParentLoop);
 }
 
-Loop *LoopInfo::ConsiderForLoop(BasicBlock *BB, const ETForest &EF) {
+Loop *LoopInfo::ConsiderForLoop(BasicBlock *BB, ETForest &EF) {
   if (BBMap.find(BB) != BBMap.end()) return 0;   // Haven't processed this node?
 
   std::vector<BasicBlock *> TodoStack;





From lattner at cs.uiuc.edu  Sat Jan 14 14:55:21 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sat, 14 Jan 2006 14:55:21 -0600
Subject: [llvm-commits] CVS: llvm/include/llvm/Analysis/Dominators.h
	LoopInfo.h 
Message-ID: <200601142055.OAA06158@zion.cs.uiuc.edu>



Changes in directory llvm/include/llvm/Analysis:

Dominators.h updated: 1.52 -> 1.53
LoopInfo.h updated: 1.51 -> 1.52
---
Log message:

Change ET-Forest to automatically recalculate its DFSnum's if too many slow 
queries are made.

Patch by Daniel Berlin!


---
Diffs of the changes:  (+17 -7)

 Dominators.h |   20 +++++++++++++++-----
 LoopInfo.h   |    4 ++--
 2 files changed, 17 insertions(+), 7 deletions(-)


Index: llvm/include/llvm/Analysis/Dominators.h
diff -u llvm/include/llvm/Analysis/Dominators.h:1.52 llvm/include/llvm/Analysis/Dominators.h:1.53
--- llvm/include/llvm/Analysis/Dominators.h:1.52	Sun Jan  8 02:19:58 2006
+++ llvm/include/llvm/Analysis/Dominators.h	Sat Jan 14 14:55:08 2006
@@ -397,16 +397,17 @@
 ///
 struct ETForestBase : public DominatorBase {
   ETForestBase(bool isPostDom) : DominatorBase(isPostDom), Nodes(), 
-                                 DFSInfoValid(false) {}
+                                 DFSInfoValid(false), SlowQueries(0) {}
   
   virtual void releaseMemory() { reset(); }
 
   typedef std::map<BasicBlock*, ETNode*> ETMapType;
 
-
+  void updateDFSNumbers();
+    
   /// dominates - Return true if A dominates B.
   ///
-  inline bool dominates(BasicBlock *A, BasicBlock *B) const {
+  inline bool dominates(BasicBlock *A, BasicBlock *B) {
     if (A == B)
       return true;
     
@@ -415,13 +416,21 @@
     
     if (DFSInfoValid)
       return NodeB->DominatedBy(NodeA);
-    else
+    else {
+      // If we end up with too many slow queries, just update the
+      // DFS numbers on the theory that we are going to keep querying.
+      SlowQueries++;
+      if (SlowQueries > 32) {
+        updateDFSNumbers();
+        return NodeB->DominatedBy(NodeA);
+      }
       return NodeB->DominatedBySlow(NodeA);
+    }
   }
 
   /// properlyDominates - Return true if A dominates B and A != B.
   ///
-  bool properlyDominates(BasicBlock *A, BasicBlock *B) const {
+  bool properlyDominates(BasicBlock *A, BasicBlock *B) {
     return dominates(A, B) && A != B;
   }
 
@@ -474,6 +483,7 @@
   void reset();
   ETMapType Nodes;
   bool DFSInfoValid;
+  unsigned int SlowQueries;
 
 };
 


Index: llvm/include/llvm/Analysis/LoopInfo.h
diff -u llvm/include/llvm/Analysis/LoopInfo.h:1.51 llvm/include/llvm/Analysis/LoopInfo.h:1.52
--- llvm/include/llvm/Analysis/LoopInfo.h:1.51	Tue Jan 10 23:08:57 2006
+++ llvm/include/llvm/Analysis/LoopInfo.h	Sat Jan 14 14:55:08 2006
@@ -297,8 +297,8 @@
 
   static void stub();  // Noop
 private:
-  void Calculate(const ETForest &EF);
-  Loop *ConsiderForLoop(BasicBlock *BB, const ETForest &EF);
+  void Calculate(ETForest &EF);
+  Loop *ConsiderForLoop(BasicBlock *BB, ETForest &EF);
   void MoveSiblingLoopInto(Loop *NewChild, Loop *NewParent);
   void InsertLoopInto(Loop *L, Loop *Parent);
 };





From lattner at cs.uiuc.edu  Sat Jan 14 16:27:33 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sat, 14 Jan 2006 16:27:33 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/IA64/IA64ISelLowering.cpp
	IA64ISelLowering.h 
Message-ID: <200601142227.QAA06468@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/IA64:

IA64ISelLowering.cpp updated: 1.20 -> 1.21
IA64ISelLowering.h updated: 1.3 -> 1.4
---
Log message:

Cleanup IA64ISD, tell the graph drawer what the symbolic names for the enums are.


---
Diffs of the changes:  (+11 -14)

 IA64ISelLowering.cpp |    9 +++++++++
 IA64ISelLowering.h   |   16 ++--------------
 2 files changed, 11 insertions(+), 14 deletions(-)


Index: llvm/lib/Target/IA64/IA64ISelLowering.cpp
diff -u llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.20 llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.21
--- llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.20	Fri Jan 13 21:14:10 2006
+++ llvm/lib/Target/IA64/IA64ISelLowering.cpp	Sat Jan 14 16:27:21 2006
@@ -94,6 +94,15 @@
       addLegalFPImmediate(+1.0);
 }
 
+const char *IA64TargetLowering::getTargetNodeName(unsigned Opcode) const {
+  switch (Opcode) {
+  default: return 0;
+  case IA64ISD::GETFD:  return "IA64ISD::GETFD";
+  case IA64ISD::BRCALL: return "IA64ISD::BRCALL";  
+  }
+}
+  
+
 /// isFloatingPointZero - Return true if this is 0.0 or -0.0.
 static bool isFloatingPointZero(SDOperand Op) {
   if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(Op))


Index: llvm/lib/Target/IA64/IA64ISelLowering.h
diff -u llvm/lib/Target/IA64/IA64ISelLowering.h:1.3 llvm/lib/Target/IA64/IA64ISelLowering.h:1.4
--- llvm/lib/Target/IA64/IA64ISelLowering.h:1.3	Thu Dec 22 07:29:14 2005
+++ llvm/lib/Target/IA64/IA64ISelLowering.h	Sat Jan 14 16:27:21 2006
@@ -25,20 +25,6 @@
       // Start the numbering where the builting ops and target ops leave off.
       FIRST_NUMBER = ISD::BUILTIN_OP_END+IA64::INSTRUCTION_LIST_END,
 
-      /// FSEL - Traditional three-operand fsel node.
-      ///
-      FSEL,
-      
-      /// FCFID - The FCFID instruction, taking an f64 operand and producing
-      /// and f64 value containing the FP representation of the integer that
-      /// was temporarily in the f64 operand.
-      FCFID,
-      
-      /// FCTI[D,W]Z - The FCTIDZ and FCTIWZ instructions, taking an f32 or f64 
-      /// operand, producing an f64 value containing the integer representation
-      /// of that FP value.
-      FCTIDZ, FCTIWZ,
-
       /// GETFD - the getf.d instruction takes a floating point operand and
       /// returns its 64-bit memory representation as an i64
       GETFD,
@@ -63,6 +49,8 @@
     ///
 // XXX    virtual SDOperand LowerOperation(SDOperand Op, SelectionDAG &DAG);
     
+    const char *getTargetNodeName(unsigned Opcode) const;
+      
     /// LowerArguments - This hook must be implemented to indicate how we should
     /// lower the arguments for the specified function, into the specified DAG.
     virtual std::vector<SDOperand>





From lattner at cs.uiuc.edu  Sat Jan 14 16:41:58 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sat, 14 Jan 2006 16:41:58 -0600
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp 
Message-ID: <200601142241.QAA06533@zion.cs.uiuc.edu>



Changes in directory llvm/lib/CodeGen/SelectionDAG:

LegalizeDAG.cpp updated: 1.263 -> 1.264
---
Log message:

Token chain results are not always the first or last result.  Consider copyfromreg nodes, where they are the middle result (the flag result is last)


---
Diffs of the changes:  (+17 -3)

 LegalizeDAG.cpp |   20 +++++++++++++++++---
 1 files changed, 17 insertions(+), 3 deletions(-)


Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.263 llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.264
--- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.263	Fri Jan 13 21:14:10 2006
+++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp	Sat Jan 14 16:41:46 2006
@@ -3016,6 +3016,7 @@
     Tmp2 = LegalizeOp(Node->getOperand(1));
     Result = DAG.getNode(ISD::SRL, NVT, Tmp1, Tmp2);
     break;
+    
   case ISD::LOAD:
     Tmp1 = LegalizeOp(Node->getOperand(0));   // Legalize the chain.
     Tmp2 = LegalizeOp(Node->getOperand(1));   // Legalize the pointer.
@@ -3374,11 +3375,24 @@
   if (Node->use_empty())
     return 0;   // No CallSeqEnd
 
+  // The chain is usually at the end.
   SDOperand TheChain(Node, Node->getNumValues()-1);
-  if (TheChain.getValueType() != MVT::Other)
+  if (TheChain.getValueType() != MVT::Other) {
+    // Sometimes it's at the beginning.
     TheChain = SDOperand(Node, 0);
-  if (TheChain.getValueType() != MVT::Other)
-    return 0;
+    if (TheChain.getValueType() != MVT::Other) {
+      // Otherwise, hunt for it.
+      for (unsigned i = 1, e = Node->getNumValues(); i != e; ++i)
+        if (Node->getValueType(i) == MVT::Other) {
+          TheChain = SDOperand(Node, i);
+          break;
+        }
+
+      // Otherwise, we walked into a node without a chain.  
+      if (TheChain.getValueType() != MVT::Other)
+        return 0;
+    }
+  }
 
   for (SDNode::use_iterator UI = Node->use_begin(),
          E = Node->use_end(); UI != E; ++UI) {





From lattner at cs.uiuc.edu  Sun Jan 15 01:20:05 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sun, 15 Jan 2006 01:20:05 -0600
Subject: [llvm-commits] 
	CVS: llvm/lib/Target/SparcV8/SparcV8TargetMachine.cpp
Message-ID: <200601150720.BAA08207@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/SparcV8:

SparcV8TargetMachine.cpp updated: 1.35 -> 1.36
---
Log message:

reorder passes


---
Diffs of the changes:  (+6 -4)

 SparcV8TargetMachine.cpp |   10 ++++++----
 1 files changed, 6 insertions(+), 4 deletions(-)


Index: llvm/lib/Target/SparcV8/SparcV8TargetMachine.cpp
diff -u llvm/lib/Target/SparcV8/SparcV8TargetMachine.cpp:1.35 llvm/lib/Target/SparcV8/SparcV8TargetMachine.cpp:1.36
--- llvm/lib/Target/SparcV8/SparcV8TargetMachine.cpp:1.35	Wed Jan 11 19:28:56 2006
+++ llvm/lib/Target/SparcV8/SparcV8TargetMachine.cpp	Sun Jan 15 01:19:53 2006
@@ -73,9 +73,6 @@
   // FIXME: Implement efficient support for garbage collection intrinsics.
   PM.add(createLowerGCPass());
 
-  // Make sure that no unreachable blocks are instruction selected.
-  PM.add(createUnreachableBlockEliminationPass());
-
   // FIXME: implement the invoke/unwind instructions!
   PM.add(createLowerInvokePass());
 
@@ -90,9 +87,14 @@
     // Replace malloc and free instructions with library calls.
     PM.add(createLowerAllocationsPass());
     PM.add(createLowerSelectPass());
+    // Make sure that no unreachable blocks are instruction selected.
+    PM.add(createUnreachableBlockEliminationPass());
     PM.add(createSparcV8SimpleInstructionSelector(*this));
-  } else
+  } else {
+    // Make sure that no unreachable blocks are instruction selected.
+    PM.add(createUnreachableBlockEliminationPass());
     PM.add(createSparcV8ISelDag(*this));
+  }
 
   // Print machine instructions as they were initially generated.
   if (PrintMachineCode)





From lattner at cs.uiuc.edu  Sun Jan 15 02:39:47 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sun, 15 Jan 2006 02:39:47 -0600
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp 
Message-ID: <200601150839.CAA18011@zion.cs.uiuc.edu>



Changes in directory llvm/lib/CodeGen/SelectionDAG:

SelectionDAG.cpp updated: 1.238 -> 1.239
---
Log message:

add a missing node name


---
Diffs of the changes:  (+1 -0)

 SelectionDAG.cpp |    1 +
 1 files changed, 1 insertion(+)


Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.238 llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.239
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.238	Thu Jan 12 20:39:42 2006
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp	Sun Jan 15 02:39:35 2006
@@ -1899,6 +1899,7 @@
   case ISD::CopyToReg:     return "CopyToReg";
   case ISD::CopyFromReg:   return "CopyFromReg";
   case ISD::UNDEF:         return "undef";
+  case ISD::MERGE_VALUES:  return "mergevalues";
 
   // Unary operators
   case ISD::FABS:   return "fabs";





From lattner at cs.uiuc.edu  Sun Jan 15 02:40:28 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sun, 15 Jan 2006 02:40:28 -0600
Subject: [llvm-commits] CVS: llvm/lib/VMCore/Function.cpp 
Message-ID: <200601150840.CAA18071@zion.cs.uiuc.edu>



Changes in directory llvm/lib/VMCore:

Function.cpp updated: 1.98 -> 1.99
---
Log message:

add a missing break that Reid noticed.


---
Diffs of the changes:  (+1 -0)

 Function.cpp |    1 +
 1 files changed, 1 insertion(+)


Index: llvm/lib/VMCore/Function.cpp
diff -u llvm/lib/VMCore/Function.cpp:1.98 llvm/lib/VMCore/Function.cpp:1.99
--- llvm/lib/VMCore/Function.cpp:1.98	Fri Jan 13 19:25:24 2006
+++ llvm/lib/VMCore/Function.cpp	Sun Jan 15 02:40:16 2006
@@ -265,6 +265,7 @@
     if (getName() == "llvm.va_copy")  return Intrinsic::vacopy;
     if (getName() == "llvm.va_end")   return Intrinsic::vaend;
     if (getName() == "llvm.va_start") return Intrinsic::vastart;
+    break;
   case 'w':
     if (getName() == "llvm.writeport") return Intrinsic::writeport;
     if (getName() == "llvm.writeio")   return Intrinsic::writeio;





From lattner at cs.uiuc.edu  Sun Jan 15 02:43:20 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sun, 15 Jan 2006 02:43:20 -0600
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp 
Message-ID: <200601150843.CAA18148@zion.cs.uiuc.edu>



Changes in directory llvm/lib/CodeGen/SelectionDAG:

LegalizeDAG.cpp updated: 1.264 -> 1.265
---
Log message:

Fix custom lowering of dynamic_stackalloc


---
Diffs of the changes:  (+9 -6)

 LegalizeDAG.cpp |   15 +++++++++------
 1 files changed, 9 insertions(+), 6 deletions(-)


Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.264 llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.265
--- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.264	Sat Jan 14 16:41:46 2006
+++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp	Sun Jan 15 02:43:08 2006
@@ -842,22 +842,25 @@
     } else
       Result = Op.getValue(0);
 
+    Tmp1 = Result;
+    Tmp2 = Result.getValue(1);
     switch (TLI.getOperationAction(Node->getOpcode(),
                                    Node->getValueType(0))) {
     default: assert(0 && "This action is not supported yet!");
     case TargetLowering::Custom: {
-      SDOperand Tmp = TLI.LowerOperation(Result, DAG);
-      if (Tmp.Val) {
-        Result = LegalizeOp(Tmp);
+      Tmp3 = TLI.LowerOperation(Tmp1, DAG);
+      if (Tmp3.Val) {
+        Tmp1 = LegalizeOp(Tmp3);
+        Tmp2 = LegalizeOp(Tmp3.getValue(1));
       }
       // FALLTHROUGH if the target thinks it is legal.
     }
     case TargetLowering::Legal:
       // Since this op produce two values, make sure to remember that we
       // legalized both of them.
-      AddLegalizedOperand(SDOperand(Node, 0), Result);
-      AddLegalizedOperand(SDOperand(Node, 1), Result.getValue(1));
-      return Result.getValue(Op.ResNo);
+      AddLegalizedOperand(SDOperand(Node, 0), Tmp1);
+      AddLegalizedOperand(SDOperand(Node, 1), Tmp2);
+      return Op.ResNo ? Tmp2 : Tmp1;
     }
     assert(0 && "Unreachable");
   }





From lattner at cs.uiuc.edu  Sun Jan 15 02:44:09 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sun, 15 Jan 2006 02:44:09 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
Message-ID: <200601150844.CAA18207@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/SparcV8:

SparcV8ISelDAGToDAG.cpp updated: 1.50 -> 1.51
---
Log message:

Implement DYNAMIC_STACKALLOC for V8


---
Diffs of the changes:  (+18 -1)

 SparcV8ISelDAGToDAG.cpp |   19 ++++++++++++++++++-
 1 files changed, 18 insertions(+), 1 deletion(-)


Index: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
diff -u llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.50 llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.51
--- llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.50	Fri Jan 13 21:14:10 2006
+++ llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp	Sun Jan 15 02:43:57 2006
@@ -136,6 +136,8 @@
   setOperationAction(ISD::SELECT_CC, MVT::f32, Custom);
   setOperationAction(ISD::SELECT_CC, MVT::f64, Custom);
   
+  setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32, Custom);
+  
   // V8 has no intrinsics for these particular operations.
   setOperationAction(ISD::MEMMOVE, MVT::Other, Expand);
   setOperationAction(ISD::MEMSET, MVT::Other, Expand);
@@ -699,7 +701,22 @@
     return DAG.getNode(Opc, TrueVal.getValueType(), TrueVal, FalseVal, 
                        DAG.getConstant(CC, MVT::i32), CompareFlag);
   }
-  }  
+  case ISD::DYNAMIC_STACKALLOC: {
+    SDOperand Chain = Op.getOperand(0);
+    SDOperand Size  = Op.getOperand(1);
+
+    SDOperand SP = DAG.getCopyFromReg(Chain, V8::O6, MVT::i32);
+    Chain = SP.getValue(1);
+    SDOperand Res = DAG.getNode(ISD::SUB, MVT::i32, SP, Size);
+    Chain = DAG.getCopyToReg(Chain, V8::O6, Res);
+
+    std::vector<MVT::ValueType> VTs(Op.Val->value_begin(), Op.Val->value_end());
+    std::vector<SDOperand> Ops;
+    Ops.push_back(Res);
+    Ops.push_back(Chain);
+    return DAG.getNode(ISD::MERGE_VALUES, VTs, Ops);
+  }
+  }
 }
 
 MachineBasicBlock *





From lattner at cs.uiuc.edu  Sun Jan 15 02:54:44 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sun, 15 Jan 2006 02:54:44 -0600
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp 
Message-ID: <200601150854.CAA18294@zion.cs.uiuc.edu>



Changes in directory llvm/lib/CodeGen/SelectionDAG:

LegalizeDAG.cpp updated: 1.265 -> 1.266
---
Log message:

Allow the target to specify 'expand' if they just require the amount to
be subtracted from the stack pointer.


---
Diffs of the changes:  (+19 -9)

 LegalizeDAG.cpp |   28 +++++++++++++++++++---------
 1 files changed, 19 insertions(+), 9 deletions(-)


Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.265 llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.266
--- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.265	Sun Jan 15 02:43:08 2006
+++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp	Sun Jan 15 02:54:32 2006
@@ -847,22 +847,32 @@
     switch (TLI.getOperationAction(Node->getOpcode(),
                                    Node->getValueType(0))) {
     default: assert(0 && "This action is not supported yet!");
-    case TargetLowering::Custom: {
+    case TargetLowering::Expand: {
+      unsigned SPReg = TLI.getStackPointerRegisterToSaveRestore();
+      assert(SPReg && "Target cannot require DYNAMIC_STACKALLOC expansion and"
+             " not tell us which reg is the stack pointer!");
+      SDOperand Chain = Tmp1.getOperand(0);
+      SDOperand Size  = Tmp2.getOperand(1);
+      SDOperand SP = DAG.getCopyFromReg(Chain, SPReg, Node->getValueType(0));
+      Tmp1 = DAG.getNode(ISD::SUB, Node->getValueType(0), SP, Size);    // Value
+      Tmp2 = DAG.getCopyToReg(SP.getValue(1), SPReg, Tmp1);      // Output chain
+      break;
+    }
+    case TargetLowering::Custom:
       Tmp3 = TLI.LowerOperation(Tmp1, DAG);
       if (Tmp3.Val) {
         Tmp1 = LegalizeOp(Tmp3);
         Tmp2 = LegalizeOp(Tmp3.getValue(1));
       }
-      // FALLTHROUGH if the target thinks it is legal.
-    }
+      break;
     case TargetLowering::Legal:
-      // Since this op produce two values, make sure to remember that we
-      // legalized both of them.
-      AddLegalizedOperand(SDOperand(Node, 0), Tmp1);
-      AddLegalizedOperand(SDOperand(Node, 1), Tmp2);
-      return Op.ResNo ? Tmp2 : Tmp1;
+      break;
     }
-    assert(0 && "Unreachable");
+    // Since this op produce two values, make sure to remember that we
+    // legalized both of them.
+    AddLegalizedOperand(SDOperand(Node, 0), Tmp1);
+    AddLegalizedOperand(SDOperand(Node, 1), Tmp2);
+    return Op.ResNo ? Tmp2 : Tmp1;
   }
   case ISD::TAILCALL:
   case ISD::CALL: {





From lattner at cs.uiuc.edu  Sun Jan 15 02:55:37 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sun, 15 Jan 2006 02:55:37 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
Message-ID: <200601150855.CAA18355@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/SparcV8:

SparcV8ISelDAGToDAG.cpp updated: 1.51 -> 1.52
---
Log message:

Have legalize take care of DYNAMIC_STACKALLOC for us, implement llvm.stacksave/stackrestore.


---
Diffs of the changes:  (+4 -18)

 SparcV8ISelDAGToDAG.cpp |   22 ++++------------------
 1 files changed, 4 insertions(+), 18 deletions(-)


Index: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
diff -u llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.51 llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.52
--- llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.51	Sun Jan 15 02:43:57 2006
+++ llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp	Sun Jan 15 02:55:25 2006
@@ -136,8 +136,6 @@
   setOperationAction(ISD::SELECT_CC, MVT::f32, Custom);
   setOperationAction(ISD::SELECT_CC, MVT::f64, Custom);
   
-  setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32, Custom);
-  
   // V8 has no intrinsics for these particular operations.
   setOperationAction(ISD::MEMMOVE, MVT::Other, Expand);
   setOperationAction(ISD::MEMSET, MVT::Other, Expand);
@@ -163,9 +161,12 @@
   setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand);
   setOperationAction(ISD::DEBUG_LABEL, MVT::Other, Expand);
 
-  // Not implemented yet.
+  // Expand these to their default code.
   setOperationAction(ISD::STACKSAVE, MVT::Other, Expand); 
   setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand);
+  setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32, Expand);
+
+  setStackPointerRegisterToSaveRestore(V8::O6);
 
   computeRegisterProperties();
 }
@@ -701,21 +702,6 @@
     return DAG.getNode(Opc, TrueVal.getValueType(), TrueVal, FalseVal, 
                        DAG.getConstant(CC, MVT::i32), CompareFlag);
   }
-  case ISD::DYNAMIC_STACKALLOC: {
-    SDOperand Chain = Op.getOperand(0);
-    SDOperand Size  = Op.getOperand(1);
-
-    SDOperand SP = DAG.getCopyFromReg(Chain, V8::O6, MVT::i32);
-    Chain = SP.getValue(1);
-    SDOperand Res = DAG.getNode(ISD::SUB, MVT::i32, SP, Size);
-    Chain = DAG.getCopyToReg(Chain, V8::O6, Res);
-
-    std::vector<MVT::ValueType> VTs(Op.Val->value_begin(), Op.Val->value_end());
-    std::vector<SDOperand> Ops;
-    Ops.push_back(Res);
-    Ops.push_back(Chain);
-    return DAG.getNode(ISD::MERGE_VALUES, VTs, Ops);
-  }
   }
 }
 





From lattner at cs.uiuc.edu  Sun Jan 15 03:00:33 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sun, 15 Jan 2006 03:00:33 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
	X86ISelLowering.cpp X86ISelPattern.cpp 
Message-ID: <200601150900.DAA18464@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/X86:

X86ISelDAGToDAG.cpp updated: 1.31 -> 1.32
X86ISelLowering.cpp updated: 1.41 -> 1.42
X86ISelPattern.cpp updated: 1.197 -> 1.198
---
Log message:

Use the default lowering of ISD::DYNAMIC_STACKALLOC, delete now dead code.


---
Diffs of the changes:  (+4 -84)

 X86ISelDAGToDAG.cpp |   40 ----------------------------------------
 X86ISelLowering.cpp |    7 ++++---
 X86ISelPattern.cpp  |   41 -----------------------------------------
 3 files changed, 4 insertions(+), 84 deletions(-)


Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
diff -u llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.31 llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.32
--- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.31	Sat Jan 14 14:11:13 2006
+++ llvm/lib/Target/X86/X86ISelDAGToDAG.cpp	Sun Jan 15 03:00:21 2006
@@ -700,46 +700,6 @@
                                       Base, Scale, Index, Disp, Chain);
       return Chain;
     }
-
-    case ISD::DYNAMIC_STACKALLOC: {
-      SDOperand Chain = N.getOperand(0);
-      SDOperand Size  = N.getOperand(1);
-      SDOperand Align = N.getOperand(2);
-
-      // FIXME: We are currently ignoring the requested alignment for handling
-      // greater than the stack alignment.  This will need to be revisited at
-      // some point.
-      if (!isa<ConstantSDNode>(Align) ||
-          cast<ConstantSDNode>(Align)->getValue() != 0) {
-        std::cerr << "Cannot allocate stack object with greater alignment than"
-                  << " the stack alignment yet!";
-        abort();
-      }
-
-      // FIXME: This produces crappy code. Lots of unnecessary MOV32rr to and
-      // from ESP.
-      SDOperand InFlag;
-      SDOperand SPVal = CurDAG->getCopyFromReg(Chain, X86::ESP, MVT::i32, InFlag);
-      Chain  = SPVal.getValue(1);
-      InFlag = SPVal.getValue(2);
-
-      SDOperand Result = Select(CurDAG->getNode(X86ISD::SUB_FLAG, MVT::i32,
-                                                SPVal, Size, InFlag));
-      InFlag = Result.getValue(1);
-
-      // Force the result back into ESP.
-      Chain  = CurDAG->getCopyToReg(Chain,
-                                    CurDAG->getRegister(X86::ESP, MVT::i32),
-                                    Result, InFlag);
-      InFlag = Chain.getValue(1);
-
-      // Copy the result back from ESP.
-      Result = CurDAG->getCopyFromReg(Chain, X86::ESP, MVT::i32, InFlag);
-
-      CodeGenMap[N.getValue(0)] = Result;
-      CodeGenMap[N.getValue(1)] = Result.getValue(1);
-      return Result.getValue(N.ResNo);
-    }
   }
 
   return SelectCode(N);


Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.41 llvm/lib/Target/X86/X86ISelLowering.cpp:1.42
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.41	Fri Jan 13 21:14:10 2006
+++ llvm/lib/Target/X86/X86ISelLowering.cpp	Sun Jan 15 03:00:21 2006
@@ -162,9 +162,10 @@
   setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand);
   setOperationAction(ISD::DEBUG_LABEL, MVT::Other, Expand);
 
-  // Not implemented yet.
-  setOperationAction(ISD::STACKSAVE, MVT::Other, Expand); 
-  setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand);
+  // Expand to the default code.
+  setOperationAction(ISD::STACKSAVE,          MVT::Other, Expand); 
+  setOperationAction(ISD::STACKRESTORE,       MVT::Other, Expand);
+  setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32  , Expand);
 
   if (X86ScalarSSE) {
     // Set up the FP register classes.


Index: llvm/lib/Target/X86/X86ISelPattern.cpp
diff -u llvm/lib/Target/X86/X86ISelPattern.cpp:1.197 llvm/lib/Target/X86/X86ISelPattern.cpp:1.198
--- llvm/lib/Target/X86/X86ISelPattern.cpp:1.197	Fri Jan 13 14:19:44 2006
+++ llvm/lib/Target/X86/X86ISelPattern.cpp	Sun Jan 15 03:00:21 2006
@@ -2386,46 +2386,6 @@
     return Result;
   }
 
-  case ISD::DYNAMIC_STACKALLOC:
-    // Generate both result values.
-    if (Result != 1)
-      ExprMap[N.getValue(1)] = 1;   // Generate the token
-    else
-      Result = ExprMap[N.getValue(0)] = MakeReg(N.getValue(0).getValueType());
-
-    // FIXME: We are currently ignoring the requested alignment for handling
-    // greater than the stack alignment.  This will need to be revisited at some
-    // point.  Align = N.getOperand(2);
-
-    if (!isa<ConstantSDNode>(N.getOperand(2)) ||
-        cast<ConstantSDNode>(N.getOperand(2))->getValue() != 0) {
-      std::cerr << "Cannot allocate stack object with greater alignment than"
-                << " the stack alignment yet!";
-      abort();
-    }
-
-    if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(N.getOperand(1))) {
-      Select(N.getOperand(0));
-      BuildMI(BB, X86::SUB32ri, 2, X86::ESP).addReg(X86::ESP)
-        .addImm(CN->getValue());
-    } else {
-      if (getRegPressure(N.getOperand(0)) > getRegPressure(N.getOperand(1))) {
-        Select(N.getOperand(0));
-        Tmp1 = SelectExpr(N.getOperand(1));
-      } else {
-        Tmp1 = SelectExpr(N.getOperand(1));
-        Select(N.getOperand(0));
-      }
-
-      // Subtract size from stack pointer, thereby allocating some space.
-      BuildMI(BB, X86::SUB32rr, 2, X86::ESP).addReg(X86::ESP).addReg(Tmp1);
-    }
-
-    // Put a pointer to the space into the result register, by copying the stack
-    // pointer.
-    BuildMI(BB, X86::MOV32rr, 1, Result).addReg(X86::ESP);
-    return Result;
-
   case X86ISD::TAILCALL:
   case X86ISD::CALL: {
     // The chain for this call is now lowered.
@@ -3295,7 +3255,6 @@
   case ISD::EXTLOAD:
   case ISD::SEXTLOAD:
   case ISD::ZEXTLOAD:
-  case ISD::DYNAMIC_STACKALLOC:
   case X86ISD::TAILCALL:
   case X86ISD::CALL:
     ExprMap.erase(N);





From lattner at cs.uiuc.edu  Sun Jan 15 03:03:00 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sun, 15 Jan 2006 03:03:00 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
	PPCISelLowering.cpp 
Message-ID: <200601150903.DAA18516@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/PowerPC:

PPCISelDAGToDAG.cpp updated: 1.150 -> 1.151
PPCISelLowering.cpp updated: 1.66 -> 1.67
---
Log message:

Use the default impl of DYNAMIC_STACKALLOC, allowing us to delete some code.


---
Diffs of the changes:  (+4 -41)

 PPCISelDAGToDAG.cpp |   38 --------------------------------------
 PPCISelLowering.cpp |    7 ++++---
 2 files changed, 4 insertions(+), 41 deletions(-)


Index: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.150 llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.151
--- llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.150	Wed Jan 11 20:01:45 2006
+++ llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp	Sun Jan 15 03:02:48 2006
@@ -96,7 +96,6 @@
 #include "PPCGenDAGISel.inc"
     
 private:
-    SDOperand SelectDYNAMIC_STACKALLOC(SDOperand Op);
     SDOperand SelectADD_PARTS(SDOperand Op);
     SDOperand SelectSUB_PARTS(SDOperand Op);
     SDOperand SelectSETCC(SDOperand Op);
@@ -531,42 +530,6 @@
   return 0;
 }
 
-SDOperand PPCDAGToDAGISel::SelectDYNAMIC_STACKALLOC(SDOperand Op) {
-  SDNode *N = Op.Val;
-
-  // FIXME: We are currently ignoring the requested alignment for handling
-  // greater than the stack alignment.  This will need to be revisited at some
-  // point.  Align = N.getOperand(2);
-  if (!isa<ConstantSDNode>(N->getOperand(2)) ||
-      cast<ConstantSDNode>(N->getOperand(2))->getValue() != 0) {
-    std::cerr << "Cannot allocate stack object with greater alignment than"
-    << " the stack alignment yet!";
-    abort();
-  }
-  SDOperand Chain = Select(N->getOperand(0));
-  SDOperand Amt   = Select(N->getOperand(1));
-  
-  SDOperand R1Reg = CurDAG->getRegister(PPC::R1, MVT::i32);
-  
-  SDOperand R1Val = CurDAG->getCopyFromReg(Chain, PPC::R1, MVT::i32);
-  Chain = R1Val.getValue(1);
-  
-  // Subtract the amount (guaranteed to be a multiple of the stack alignment)
-  // from the stack pointer, giving us the result pointer.
-  SDOperand Result = CurDAG->getTargetNode(PPC::SUBF, MVT::i32, Amt, R1Val);
-  
-  // Copy this result back into R1.
-  Chain = CurDAG->getNode(ISD::CopyToReg, MVT::Other, Chain, R1Reg, Result);
-  
-  // Copy this result back out of R1 to make sure we're not using the stack
-  // space without decrementing the stack pointer.
-  Result = CurDAG->getCopyFromReg(Chain, PPC::R1, MVT::i32);
-  
-  // Finally, replace the DYNAMIC_STACKALLOC with the copyfromreg.
-  CodeGenMap[Op.getValue(0)] = Result;
-  CodeGenMap[Op.getValue(1)] = Result.getValue(1);
-  return SDOperand(Result.Val, Op.ResNo);
-}
 
 SDOperand PPCDAGToDAGISel::SelectADD_PARTS(SDOperand Op) {
   SDNode *N = Op.Val;
@@ -854,7 +817,6 @@
   
   switch (N->getOpcode()) {
   default: break;
-  case ISD::DYNAMIC_STACKALLOC: return SelectDYNAMIC_STACKALLOC(Op);
   case ISD::ADD_PARTS:          return SelectADD_PARTS(Op);
   case ISD::SUB_PARTS:          return SelectSUB_PARTS(Op);
   case ISD::SETCC:              return SelectSETCC(Op);


Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.66 llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.67
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.66	Fri Jan 13 21:14:10 2006
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp	Sun Jan 15 03:02:48 2006
@@ -110,9 +110,10 @@
   setOperationAction(ISD::GlobalAddress, MVT::i32, Custom);
   setOperationAction(ISD::ConstantPool,  MVT::i32, Custom);
 
-  // Not implemented yet.
-  setOperationAction(ISD::STACKSAVE, MVT::Other, Expand); 
-  setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand);
+  // Use the default implementation.
+  setOperationAction(ISD::STACKSAVE         , MVT::Other, Expand); 
+  setOperationAction(ISD::STACKRESTORE      , MVT::Other, Expand);
+  setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32  , Expand);
   
   if (TM.getSubtarget<PPCSubtarget>().is64Bit()) {
     // They also have instructions for converting between i64 and fp.





From lattner at cs.uiuc.edu  Sun Jan 15 03:26:39 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sun, 15 Jan 2006 03:26:39 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/SparcV8/SparcV8AsmPrinter.cpp
	SparcV8InstrInfo.td 
Message-ID: <200601150926.DAA06776@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/SparcV8:

SparcV8AsmPrinter.cpp updated: 1.49 -> 1.50
SparcV8InstrInfo.td updated: 1.102 -> 1.103
---
Log message:

Don't print a label for the first MBB in a function.

Compile this:

%_2E_str_8 = external global [75 x sbyte]
implementation   ; Functions:
declare int %printf(sbyte*, ...)
void %test()
        %tmp.101 = call int (sbyte*, ...)* %printf( sbyte* getelementptr ([75 x sbyte]* %_2E_str_8, int 0, int 0) )             ; <int> [#uses=0]
        unreachable
}

to this:

main_endif_2E_8:
        save -96, %o6, %o6
        sethi %hi(_2E_str_8), %l0
        add %l0, %lo(_2E_str_8), %o0
        call printf
        nop

instead of this:

main_endif_2E_8:
        save -96, %o6, %o6
        sethi %hi(_2E_str_8), %l0
        or %g0, %lo(_2E_str_8), %l1   ;; extra instruction
        add %l1, %l0, %o0
        call printf
        nop




---
Diffs of the changes:  (+13 -5)

 SparcV8AsmPrinter.cpp |   11 ++++++-----
 SparcV8InstrInfo.td   |    7 +++++++
 2 files changed, 13 insertions(+), 5 deletions(-)


Index: llvm/lib/Target/SparcV8/SparcV8AsmPrinter.cpp
diff -u llvm/lib/Target/SparcV8/SparcV8AsmPrinter.cpp:1.49 llvm/lib/Target/SparcV8/SparcV8AsmPrinter.cpp:1.50
--- llvm/lib/Target/SparcV8/SparcV8AsmPrinter.cpp:1.49	Sun Dec 18 17:36:45 2005
+++ llvm/lib/Target/SparcV8/SparcV8AsmPrinter.cpp	Sun Jan 15 03:26:27 2006
@@ -112,9 +112,10 @@
   for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();
        I != E; ++I) {
     // Print a label for the basic block.
-    O << ".LBB" << Mang->getValueName(MF.getFunction ())
-      << "_" << I->getNumber () << ":\t! "
-      << I->getBasicBlock ()->getName () << "\n";
+    if (I != MF.begin())
+      O << ".LBB" << Mang->getValueName(MF.getFunction ())
+        << "_" << I->getNumber () << ":\t! "
+        << I->getBasicBlock ()->getName () << "\n";
     for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end();
          II != E; ++II) {
       // Print the assembly for the instruction.
@@ -135,8 +136,8 @@
   if (MI->getOpcode() == V8::SETHIi && !MO.isRegister() && !MO.isImmediate()) {
     O << "%hi(";
     CloseParen = true;
-  } else if (MI->getOpcode() ==V8::ORri &&!MO.isRegister() &&!MO.isImmediate())
-  {
+  } else if ((MI->getOpcode() == V8::ORri || MI->getOpcode() == V8::ADDri)
+             && !MO.isRegister() && !MO.isImmediate()) {
     O << "%lo(";
     CloseParen = true;
   }


Index: llvm/lib/Target/SparcV8/SparcV8InstrInfo.td
diff -u llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.102 llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.103
--- llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.102	Thu Jan 12 11:05:32 2006
+++ llvm/lib/Target/SparcV8/SparcV8InstrInfo.td	Sun Jan 15 03:26:27 2006
@@ -724,6 +724,13 @@
 def : Pat<(V8hi tconstpool:$in), (SETHIi tconstpool:$in)>;
 def : Pat<(V8lo tconstpool:$in), (ORri G0, tconstpool:$in)>;
 
+// Add reg, lo.  This is used when taking the addr of a global/constpool entry.
+def : Pat<(add IntRegs:$r, (V8lo tglobaladdr:$in)),
+          (ADDri IntRegs:$r, tglobaladdr:$in)>;
+def : Pat<(add IntRegs:$r, (V8lo tconstpool:$in)),
+          (ADDri IntRegs:$r, tconstpool:$in)>;
+
+
 // Calls: 
 def : Pat<(call tglobaladdr:$dst),
           (CALL tglobaladdr:$dst)>;





From duraid at octopus.com.au  Sun Jan 15 03:45:35 2006
From: duraid at octopus.com.au (Duraid Madina)
Date: Sun, 15 Jan 2006 03:45:35 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp
	IA64ISelLowering.cpp 
Message-ID: <200601150945.DAA25569@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/IA64:

IA64ISelDAGToDAG.cpp updated: 1.20 -> 1.21
IA64ISelLowering.cpp updated: 1.21 -> 1.22
---
Log message:


explain that r12 is the stack pointer reg



---
Diffs of the changes:  (+5 -33)

 IA64ISelDAGToDAG.cpp |   34 ++--------------------------------
 IA64ISelLowering.cpp |    4 +++-
 2 files changed, 5 insertions(+), 33 deletions(-)


Index: llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp
diff -u llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp:1.20 llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp:1.21
--- llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp:1.20	Fri Jan 13 04:28:25 2006
+++ llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp	Sun Jan 15 03:45:22 2006
@@ -450,37 +450,6 @@
   case ISD::SREM:
   case ISD::UREM: return SelectDIV(Op);
  
-  case ISD::DYNAMIC_STACKALLOC: {
-    if (!isa<ConstantSDNode>(N->getOperand(2)) ||
-        cast<ConstantSDNode>(N->getOperand(2))->getValue() != 0) {
-      std::cerr << "Cannot allocate stack object with greater alignment than"
-                << " the stack alignment yet!";
-      abort();
-    }
-
-    SDOperand Chain = Select(N->getOperand(0));
-    SDOperand Amt   = Select(N->getOperand(1));
-    SDOperand Reg = CurDAG->getRegister(IA64::r12, MVT::i64);
-    SDOperand Val = CurDAG->getCopyFromReg(Chain, IA64::r12, MVT::i64);
-    Chain = Val.getValue(1);
-    
-    // Subtract the amount (guaranteed to be a multiple of the stack alignment)
-    // from the stack pointer, giving us the result pointer.
-    SDOperand Result = Select(CurDAG->getNode(ISD::SUB, MVT::i64, Val, Amt));
-    
-    // Copy this result back into r12.
-    Chain = CurDAG->getNode(ISD::CopyToReg, MVT::Other, Chain, Reg, Result);
-    
-    // Copy this result back out of r12 to make sure we're not using the stack
-    // space without decrementing the stack pointer.
-    Result = CurDAG->getCopyFromReg(Chain, IA64::r12, MVT::i64);
-  
-    // Finally, replace the DYNAMIC_STACKALLOC with the copyfromreg.
-    CodeGenMap[Op.getValue(0)] = Result;
-    CodeGenMap[Op.getValue(1)] = Result.getValue(1);
-    return SDOperand(Result.Val, Op.ResNo);
-  }
-
   case ISD::ConstantFP: {
     SDOperand Chain = CurDAG->getEntryNode(); // this is a constant, so..
 
@@ -501,7 +470,8 @@
                                 CurDAG->getTargetFrameIndex(FI, MVT::i64));
   }
 
-  case ISD::ConstantPool: {
+  case ISD::ConstantPool: { // TODO: nuke the constant pool
+			    //       (ia64 doesn't need one)
     Constant *C = cast<ConstantPoolSDNode>(N)->get();
     SDOperand CPI = CurDAG->getTargetConstantPool(C, MVT::i64);
     return CurDAG->getTargetNode(IA64::ADDL_GA, MVT::i64, // ?


Index: llvm/lib/Target/IA64/IA64ISelLowering.cpp
diff -u llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.21 llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.22
--- llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.21	Sat Jan 14 16:27:21 2006
+++ llvm/lib/Target/IA64/IA64ISelLowering.cpp	Sun Jan 15 03:45:23 2006
@@ -84,9 +84,11 @@
       setOperationAction(ISD::ROTR , MVT::i64  , Expand);
       setOperationAction(ISD::BSWAP, MVT::i64  , Expand);  // mux @rev
 
-      // Not implemented yet.
       setOperationAction(ISD::STACKSAVE, MVT::Other, Expand);
       setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand);
+      setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i64, Expand);
+
+      setStackPointerRegisterToSaveRestore(IA64::r12);
 
       computeRegisterProperties();
 





From evan.cheng at apple.com  Sun Jan 15 04:04:58 2006
From: evan.cheng at apple.com (Evan Cheng)
Date: Sun, 15 Jan 2006 04:04:58 -0600
Subject: [llvm-commits] CVS: llvm/utils/TableGen/DAGISelEmitter.cpp 
Message-ID: <200601151004.EAA30773@zion.cs.uiuc.edu>



Changes in directory llvm/utils/TableGen:

DAGISelEmitter.cpp updated: 1.133 -> 1.134
---
Log message:

Type inferencing bug

---
Diffs of the changes:  (+2 -0)

 DAGISelEmitter.cpp |    2 ++
 1 files changed, 2 insertions(+)


Index: llvm/utils/TableGen/DAGISelEmitter.cpp
diff -u llvm/utils/TableGen/DAGISelEmitter.cpp:1.133 llvm/utils/TableGen/DAGISelEmitter.cpp:1.134
--- llvm/utils/TableGen/DAGISelEmitter.cpp:1.133	Thu Jan 12 13:35:54 2006
+++ llvm/utils/TableGen/DAGISelEmitter.cpp	Sun Jan 15 04:04:45 2006
@@ -544,6 +544,8 @@
     // Pattern fragment types will be resolved when they are inlined.
     return Unknown;
   } else if (R->isSubClassOf("Register")) {
+    if (NotRegisters) 
+      return Unknown;
     // If the register appears in exactly one regclass, and the regclass has one
     // value type, use it as the known type.
     const CodeGenTarget &T = TP.getDAGISelEmitter().getTargetInfo();





From evan.cheng at apple.com  Sun Jan 15 04:05:33 2006
From: evan.cheng at apple.com (Evan Cheng)
Date: Sun, 15 Jan 2006 04:05:33 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86InstrInfo.td 
Message-ID: <200601151005.EAA30788@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/X86:

X86InstrInfo.td updated: 1.205 -> 1.206
---
Log message:

Added patterns for 8-bit multiply

---
Diffs of the changes:  (+11 -2)

 X86InstrInfo.td |   13 +++++++++++--
 1 files changed, 11 insertions(+), 2 deletions(-)


Index: llvm/lib/Target/X86/X86InstrInfo.td
diff -u llvm/lib/Target/X86/X86InstrInfo.td:1.205 llvm/lib/Target/X86/X86InstrInfo.td:1.206
--- llvm/lib/Target/X86/X86InstrInfo.td:1.205	Fri Jan 13 21:14:10 2006
+++ llvm/lib/Target/X86/X86InstrInfo.td	Sun Jan 15 04:05:20 2006
@@ -682,14 +682,23 @@
 //
 
 // Extra precision multiplication
-def MUL8r  : I<0xF6, MRM4r, (ops R8:$src), "mul{b} $src", []>,
+def MUL8r  : I<0xF6, MRM4r, (ops R8:$src), "mul{b} $src",
+               // FIXME: Used for 8-bit mul, ignore result upper 8 bits.
+               // This probably ought to be moved to a def : Pat<> if the
+               // syntax can be accepted.
+               [(set AL, (mul AL, R8:$src))]>,
              Imp<[AL],[AX]>;               // AL,AH = AL*R8
 def MUL16r : I<0xF7, MRM4r, (ops R16:$src), "mul{w} $src", []>,
              Imp<[AX],[AX,DX]>, OpSize;    // AX,DX = AX*R16
 def MUL32r : I<0xF7, MRM4r, (ops R32:$src), "mul{l} $src", []>,
              Imp<[EAX],[EAX,EDX]>;         // EAX,EDX = EAX*R32
 def MUL8m  : I<0xF6, MRM4m, (ops i8mem :$src),
-               "mul{b} $src", []>, Imp<[AL],[AX]>;          // AL,AH = AL*[mem8]
+               "mul{b} $src",
+               // FIXME: Used for 8-bit mul, ignore result upper 8 bits.
+               // This probably ought to be moved to a def : Pat<> if the
+               // syntax can be accepted.
+               [(set AL, (mul AL, (loadi8 addr:$src)))]>,
+             Imp<[AL],[AX]>;          // AL,AH = AL*[mem8]
 def MUL16m : I<0xF7, MRM4m, (ops i16mem:$src),
                "mul{w} $src", []>, Imp<[AX],[AX,DX]>,
                OpSize; // AX,DX = AX*[mem16]





From lattner at cs.uiuc.edu  Sun Jan 15 14:01:03 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sun, 15 Jan 2006 14:01:03 -0600
Subject: [llvm-commits] CVS: llvm/lib/VMCore/Verifier.cpp 
Message-ID: <200601152001.OAA05942@zion.cs.uiuc.edu>



Changes in directory llvm/lib/VMCore:

Verifier.cpp updated: 1.140 -> 1.141
---
Log message:

ET-Forest has issues with unreachable blocks.  Temporarily disable verifiers use
of it until they are resolved.


---
Diffs of the changes:  (+2 -0)

 Verifier.cpp |    2 ++
 1 files changed, 2 insertions(+)


Index: llvm/lib/VMCore/Verifier.cpp
diff -u llvm/lib/VMCore/Verifier.cpp:1.140 llvm/lib/VMCore/Verifier.cpp:1.141
--- llvm/lib/VMCore/Verifier.cpp:1.140	Fri Jan 13 19:25:24 2006
+++ llvm/lib/VMCore/Verifier.cpp	Sun Jan 15 14:00:51 2006
@@ -60,6 +60,8 @@
 #include <sstream>
 using namespace llvm;
 
+#define ETForest DominatorSet
+
 namespace {  // Anonymous namespace for class
 
   struct Verifier : public FunctionPass, InstVisitor<Verifier> {





From bocchino at persephone.cs.uiuc.edu  Sun Jan 15 14:48:58 2006
From: bocchino at persephone.cs.uiuc.edu (Robert L. Bocchino Jr.)
Date: Sun, 15 Jan 2006 14:48:58 -0600 (CST)
Subject: [llvm-commits] CVS: llvm/docs/LangRef.html 
Message-ID: <20060115204858.93AF31D2A13C@persephone.cs.uiuc.edu>



Changes in directory llvm/docs:

LangRef.html updated: 1.126 -> 1.127
---
Log message:

Added spec for insertelement operation.


---
Diffs of the changes:  (+55 -2)

 LangRef.html |   57 +++++++++++++++++++++++++++++++++++++++++++++++++++++++--
 1 files changed, 55 insertions(+), 2 deletions(-)


Index: llvm/docs/LangRef.html
diff -u llvm/docs/LangRef.html:1.126 llvm/docs/LangRef.html:1.127
--- llvm/docs/LangRef.html:1.126	Fri Jan 13 17:26:38 2006
+++ llvm/docs/LangRef.html	Sun Jan 15 14:48:27 2006
@@ -101,6 +101,7 @@
           <li><a href="#i_cast">'<tt>cast .. to</tt>' Instruction</a></li>
           <li><a href="#i_select">'<tt>select</tt>' Instruction</a></li>
           <li><a href="#i_extractelement">'<tt>extractelement</tt>' Instruction</a></li>
+          <li><a href="#i_insertelement">'<tt>insertelement</tt>' Instruction</a></li>
           <li><a href="#i_call">'<tt>call</tt>'  Instruction</a></li>
           <li><a href="#i_va_arg">'<tt>va_arg</tt>'  Instruction</a></li>
         </ol>
@@ -1099,6 +1100,11 @@
   <dd>Perform the <a href="#i_extractelement">extractelement
   operation</a> on constants.
 
+  <dt><b><tt>insertelement ( VAL, ELT, IDX )</tt></b></dt>
+
+  <dd>Perform the <a href="#i_insertelement">insertelement
+  operation</a> on constants.
+
   <dt><b><tt>OPCODE ( LHS, RHS )</tt></b></dt>
 
   <dd>Perform the specified operation of the LHS and RHS constants. OPCODE may 
@@ -2261,7 +2267,7 @@
 
 <p>
 The '<tt>extractelement</tt>' instruction extracts a single scalar
-element from a vector at a specified index.
+element from a packed vector at a specified index.
 </p>
 
 
@@ -2292,6 +2298,53 @@
 
 <!-- _______________________________________________________________________ -->
 <div class="doc_subsubsection">
+   <a name="i_insertelement">'<tt>insertelement</tt>' Instruction</a>
+</div>
+
+<div class="doc_text">
+
+<h5>Syntax:</h5>
+
+<pre>
+  &lt;result&gt; = insertelement &lt;n x &lt;ty&gt;&gt; &lt;val&gt;, &lt;ty&gt; &lt;elt&gt, uint &lt;idx&gt;    <i>; yields &lt;n x &lt;ty&gt;&gt;</i>
+</pre>
+
+<h5>Overview:</h5>
+
+<p>
+The '<tt>insertelement</tt>' instruction inserts a scalar
+element into a packed vector at a specified index.
+</p>
+
+
+<h5>Arguments:</h5>
+
+<p>
+The first operand of an '<tt>insertelement</tt>' instruction is a
+value of <a href="#t_packed">packed</a> type.  The second operand is a
+scalar value whose type must equal the element type of the first
+operand.  The third operand is an index indicating the position at
+which to insert the value.  The index may be a variable.</p>
+
+<h5>Semantics:</h5>
+
+<p>
+The result is a packed vector of the same type as <tt>val</tt>.  Its
+element values are those of <tt>val</tt> except at position
+<tt>idx</tt>, where it gets the value <tt>elt</tt>.  If <tt>idx</tt>
+exceeds the length of <tt>val</tt>, the results are undefined.
+</p>
+
+<h5>Example:</h5>
+
+<pre>
+  %result = insertelement &lt;4 x int&gt; %vec, int 1, uint 0    <i>; yields &lt;4 x int&gt;</i>
+</pre>
+</div>
+
+
+<!-- _______________________________________________________________________ -->
+<div class="doc_subsubsection">
   <a name="i_call">'<tt>call</tt>' Instruction</a>
 </div>
 
@@ -3585,7 +3638,7 @@
 
   <a href="mailto:sabre at nondot.org">Chris Lattner</a><br>
   <a href="http://llvm.cs.uiuc.edu">The LLVM Compiler Infrastructure</a><br>
-  Last modified: $Date: 2006/01/13 23:26:38 $
+  Last modified: $Date: 2006/01/15 20:48:27 $
 </address>
 </body>
 </html>





From lattner at cs.uiuc.edu  Sun Jan 15 15:46:35 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sun, 15 Jan 2006 15:46:35 -0600
Subject: [llvm-commits] CVS: llvm/include/llvm/Analysis/ET-Forest.h 
Message-ID: <200601152146.PAA06457@zion.cs.uiuc.edu>



Changes in directory llvm/include/llvm/Analysis:

ET-Forest.h updated: 1.2 -> 1.3
---
Log message:

add an assert, patch by Daniel Berlin


---
Diffs of the changes:  (+1 -0)

 ET-Forest.h |    1 +
 1 files changed, 1 insertion(+)


Index: llvm/include/llvm/Analysis/ET-Forest.h
diff -u llvm/include/llvm/Analysis/ET-Forest.h:1.2 llvm/include/llvm/Analysis/ET-Forest.h:1.3
--- llvm/include/llvm/Analysis/ET-Forest.h:1.2	Sun Jan  8 03:10:46 2006
+++ llvm/include/llvm/Analysis/ET-Forest.h	Sun Jan 15 15:46:23 2006
@@ -50,6 +50,7 @@
     Depth(0), Min(0), MinOccurrence(this) {};
 
   void setParent(ETOccurrence *n) {
+    assert(n != this && "Trying to set parent to ourselves");
     Parent = n;
   }
 





From lattner at cs.uiuc.edu  Sun Jan 15 15:48:47 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sun, 15 Jan 2006 15:48:47 -0600
Subject: [llvm-commits] CVS: llvm/include/llvm/Analysis/ET-Forest.h 
Message-ID: <200601152148.PAA06495@zion.cs.uiuc.edu>



Changes in directory llvm/include/llvm/Analysis:

ET-Forest.h updated: 1.3 -> 1.4
---
Log message:

Initialize DFSnum's to -1, in case a node is not reachable.


---
Diffs of the changes:  (+3 -2)

 ET-Forest.h |    5 +++--
 1 files changed, 3 insertions(+), 2 deletions(-)


Index: llvm/include/llvm/Analysis/ET-Forest.h
diff -u llvm/include/llvm/Analysis/ET-Forest.h:1.3 llvm/include/llvm/Analysis/ET-Forest.h:1.4
--- llvm/include/llvm/Analysis/ET-Forest.h:1.3	Sun Jan 15 15:46:23 2006
+++ llvm/include/llvm/Analysis/ET-Forest.h	Sun Jan 15 15:48:36 2006
@@ -130,7 +130,8 @@
 
 class ETNode {
 public:
-  ETNode(void *d) : data(d), Father(NULL), Left(NULL),
+  ETNode(void *d) : data(d), DFSNumIn(-1), DFSNumOut(-1),
+                    Father(NULL), Left(NULL),
                     Right(NULL), Son(NULL), ParentOcc(NULL) {   
     RightmostOcc = new ETOccurrence(this);
   };
@@ -287,7 +288,7 @@
   void *data;
 
   // DFS Numbers
-  unsigned DFSNumIn, DFSNumOut;
+  int DFSNumIn, DFSNumOut;
 
   // Father
   ETNode *Father;





From lattner at cs.uiuc.edu  Sun Jan 15 15:59:02 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sun, 15 Jan 2006 15:59:02 -0600
Subject: [llvm-commits] CVS: llvm/lib/VMCore/Verifier.cpp 
Message-ID: <200601152159.PAA06586@zion.cs.uiuc.edu>



Changes in directory llvm/lib/VMCore:

Verifier.cpp updated: 1.141 -> 1.142
---
Log message:

Thanks to Daniel Berlin's ETForest fix, we can now use it again for the verifier


---
Diffs of the changes:  (+0 -2)

 Verifier.cpp |    2 --
 1 files changed, 2 deletions(-)


Index: llvm/lib/VMCore/Verifier.cpp
diff -u llvm/lib/VMCore/Verifier.cpp:1.141 llvm/lib/VMCore/Verifier.cpp:1.142
--- llvm/lib/VMCore/Verifier.cpp:1.141	Sun Jan 15 14:00:51 2006
+++ llvm/lib/VMCore/Verifier.cpp	Sun Jan 15 15:58:50 2006
@@ -60,8 +60,6 @@
 #include <sstream>
 using namespace llvm;
 
-#define ETForest DominatorSet
-
 namespace {  // Anonymous namespace for class
 
   struct Verifier : public FunctionPass, InstVisitor<Verifier> {





From lattner at cs.uiuc.edu  Sun Jan 15 16:22:13 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sun, 15 Jan 2006 16:22:13 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
Message-ID: <200601152222.QAA06744@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/SparcV8:

SparcV8ISelDAGToDAG.cpp updated: 1.53 -> 1.54
---
Log message:

Make sure that bool,byte and short arguments are the right type when loaded
from memory.


---
Diffs of the changes:  (+1 -0)

 SparcV8ISelDAGToDAG.cpp |    1 +
 1 files changed, 1 insertion(+)


Index: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
diff -u llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.53 llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.54
--- llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.53	Sun Jan 15 13:15:46 2006
+++ llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp	Sun Jan 15 16:22:01 2006
@@ -243,6 +243,7 @@
 
           Load = DAG.getExtLoad(LoadOp, MVT::i32, Root, FIPtr,
                                 DAG.getSrcValue(0), ObjectVT);
+          Load = DAG.getNode(ISD::TRUNCATE, ObjectVT, Load);
         }
         ArgValues.push_back(Load);
       }





From lattner at cs.uiuc.edu  Sun Jan 15 19:05:11 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sun, 15 Jan 2006 19:05:11 -0600
Subject: [llvm-commits] CVS: llvm/docs/ReleaseNotes.html 
Message-ID: <200601160105.TAA07485@zion.cs.uiuc.edu>



Changes in directory llvm/docs:

ReleaseNotes.html updated: 1.344 -> 1.345
---
Log message:

PRE is no more


---
Diffs of the changes:  (+2 -2)

 ReleaseNotes.html |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)


Index: llvm/docs/ReleaseNotes.html
diff -u llvm/docs/ReleaseNotes.html:1.344 llvm/docs/ReleaseNotes.html:1.345
--- llvm/docs/ReleaseNotes.html:1.344	Sun Dec  4 23:23:06 2005
+++ llvm/docs/ReleaseNotes.html	Sun Jan 15 19:05:00 2006
@@ -135,7 +135,7 @@
 
 <ul>
 <li>The following passes are incomplete or buggy, and may be removed in future
-    releases: <tt>-cee, -pre</tt></li>
+    releases: <tt>-cee</tt></li>
 <li>The <tt>llvm-db</tt> tool is in a very early stage of development, but can
     be used to step through programs and inspect the stack.</li>
 <li>The SparcV8 and IA64 code generators are experimental.</li>
@@ -556,7 +556,7 @@
   src="http://www.w3.org/Icons/valid-html401" alt="Valid HTML 4.01!" /></a>
 
   <a href="http://llvm.org/">The LLVM Compiler Infrastructure</a><br>
-  Last modified: $Date: 2005/12/05 05:23:06 $
+  Last modified: $Date: 2006/01/16 01:05:00 $
 </address>
 
 </body>





From lattner at cs.uiuc.edu  Sun Jan 15 19:05:36 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sun, 15 Jan 2006 19:05:36 -0600
Subject: [llvm-commits] CVS: llvm/include/llvm/Transforms/LinkAllPasses.h 
Message-ID: <200601160105.TAA07541@zion.cs.uiuc.edu>



Changes in directory llvm/include/llvm/Transforms:

LinkAllPasses.h updated: 1.27 -> 1.28
---
Log message:

Remove a never-working pass


---
Diffs of the changes:  (+0 -1)

 LinkAllPasses.h |    1 -
 1 files changed, 1 deletion(-)


Index: llvm/include/llvm/Transforms/LinkAllPasses.h
diff -u llvm/include/llvm/Transforms/LinkAllPasses.h:1.27 llvm/include/llvm/Transforms/LinkAllPasses.h:1.28
--- llvm/include/llvm/Transforms/LinkAllPasses.h:1.27	Mon Nov 28 12:00:28 2005
+++ llvm/include/llvm/Transforms/LinkAllPasses.h	Sun Jan 15 19:05:24 2006
@@ -85,7 +85,6 @@
       (void) llvm::createLowerSwitchPass();
       (void) llvm::createNoAAPass();
       (void) llvm::createNoProfileInfoPass();
-      (void) llvm::createPREPass();
       (void) llvm::createProfileLoaderPass();
       (void) llvm::createPromoteMemoryToRegisterPass();
       (void) llvm::createDemoteRegisterToMemoryPass();





From lattner at cs.uiuc.edu  Sun Jan 15 19:06:12 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sun, 15 Jan 2006 19:06:12 -0600
Subject: [llvm-commits] CVS: llvm/lib/Transforms/Scalar/PRE.cpp 
Message-ID: <200601160106.TAA07596@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Transforms/Scalar:

PRE.cpp (r1.15) removed
---
Log message:

This pass has never worked correctly.  Remove.


---
Diffs of the changes:  (+0 -0)

 0 files changed





From lattner at cs.uiuc.edu  Sun Jan 15 19:06:56 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sun, 15 Jan 2006 19:06:56 -0600
Subject: [llvm-commits] 
	CVS: llvm/test/Regression/Transforms/PRE/basictest.ll dg.exp 
Message-ID: <200601160106.TAA07652@zion.cs.uiuc.edu>



Changes in directory llvm/test/Regression/Transforms/PRE:

basictest.ll (r1.2) removed
dg.exp (r1.2) removed
---
Log message:

This pass has been removed.


---
Diffs of the changes:  (+0 -0)

 0 files changed





From lattner at cs.uiuc.edu  Sun Jan 15 19:40:12 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sun, 15 Jan 2006 19:40:12 -0600
Subject: [llvm-commits] CVS: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
Message-ID: <200601160140.TAA07785@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/SparcV8:

SparcV8ISelDAGToDAG.cpp updated: 1.54 -> 1.55
---
Log message:

Silly Sparc is big endian.  If we have to load args out of incoming stack slots
that are smaller than an int, make sure to adjust the frame pointer to take
this into consideration.


---
Diffs of the changes:  (+4 -0)

 SparcV8ISelDAGToDAG.cpp |    4 ++++
 1 files changed, 4 insertions(+)


Index: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
diff -u llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.54 llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.55
--- llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.54	Sun Jan 15 16:22:01 2006
+++ llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp	Sun Jan 15 19:40:00 2006
@@ -241,6 +241,10 @@
           unsigned LoadOp =
             I->getType()->isSigned() ? ISD::SEXTLOAD : ISD::ZEXTLOAD;
 
+          // Sparc is big endian, so add an offset based on the ObjectVT.
+          unsigned Offset = 4-std::max(1U, MVT::getSizeInBits(ObjectVT)/8);
+          FIPtr = DAG.getNode(ISD::ADD, MVT::i32, FIPtr,
+                              DAG.getConstant(Offset, MVT::i32));
           Load = DAG.getExtLoad(LoadOp, MVT::i32, Root, FIPtr,
                                 DAG.getSrcValue(0), ObjectVT);
           Load = DAG.getNode(ISD::TRUNCATE, ObjectVT, Load);