From duraid at octopus.com.au Mon Jan 23 00:08:58 2006 From: duraid at octopus.com.au (Duraid Madina) Date: Mon, 23 Jan 2006 00:08:58 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/IA64/IA64.td IA64RegisterInfo.cpp IA64RegisterInfo.td Message-ID: <200601230608.AAA14518@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/IA64: IA64.td updated: 1.4 -> 1.5 IA64RegisterInfo.cpp updated: 1.10 -> 1.11 IA64RegisterInfo.td updated: 1.13 -> 1.14 --- Log message: fix register corruption! (my god.) r15 is a scratch reg, using that as a frame pointer is a pretty doofus thing to do. use r5 instead, and mark it callee-saved, coz that's what it is! --- Diffs of the changes: (+13 -11) IA64.td | 6 ++++-- IA64RegisterInfo.cpp | 10 +++++----- IA64RegisterInfo.td | 8 ++++---- 3 files changed, 13 insertions(+), 11 deletions(-) Index: llvm/lib/Target/IA64/IA64.td diff -u llvm/lib/Target/IA64/IA64.td:1.4 llvm/lib/Target/IA64/IA64.td:1.5 --- llvm/lib/Target/IA64/IA64.td:1.4 Wed Dec 21 21:56:03 2005 +++ llvm/lib/Target/IA64/IA64.td Mon Jan 23 00:08:46 2006 @@ -39,9 +39,11 @@ //'preserved' GRs: [ + r5 // the 'frame pointer' (base pointer) reg + // We never generate references to these regs, so we don't need to declare // that they are saved. In fact, we could just remove them entirely. - //r4, r5, r6, r7, + //r4, r6, r7, //'special' GRs: @@ -49,7 +51,7 @@ // r12, // memory stack pointer (SP)- XXX NOT callee saved, we do it ourselves // rp, // return branch register (rp/b0) - we do this ourselves // **** r13 (thread pointer) we do not touch, ever. it's not here. ****// - //r15, // our frame pointer (FP) + //r15, //'stacked' GRs the RSE takes care of, we don't worry about /* We don't want PEI::calculateCallerSavedRegisters to worry about them, Index: llvm/lib/Target/IA64/IA64RegisterInfo.cpp diff -u llvm/lib/Target/IA64/IA64RegisterInfo.cpp:1.10 llvm/lib/Target/IA64/IA64RegisterInfo.cpp:1.11 --- llvm/lib/Target/IA64/IA64RegisterInfo.cpp:1.10 Mon Jan 16 20:04:52 2006 +++ llvm/lib/Target/IA64/IA64RegisterInfo.cpp Mon Jan 23 00:08:46 2006 @@ -152,7 +152,7 @@ int FrameIndex = MI.getOperand(i).getFrameIndex(); // choose a base register: ( hasFP? framepointer : stack pointer ) - unsigned BaseRegister = FP ? IA64::r15 : IA64::r12; + unsigned BaseRegister = FP ? IA64::r5 : IA64::r12; // Add the base register MI.SetMachineOperandReg(i, BaseRegister); @@ -276,10 +276,10 @@ // now if we need to, save the old FP and set the new if (FP) { - MI = BuildMI(IA64::ST8, 2).addReg(IA64::r12).addReg(IA64::r15); + MI = BuildMI(IA64::ST8, 2).addReg(IA64::r12).addReg(IA64::r5); MBB.insert(MBBI, MI); // this must be the last instr in the prolog ? (XXX: why??) - MI = BuildMI(IA64::MOV, 1, IA64::r15).addReg(IA64::r12); + MI = BuildMI(IA64::MOV, 1, IA64::r5).addReg(IA64::r12); MBB.insert(MBBI, MI); } @@ -302,10 +302,10 @@ if (FP) { //copy the FP into the SP (discards allocas) - MI=BuildMI(IA64::MOV, 1, IA64::r12).addReg(IA64::r15); + MI=BuildMI(IA64::MOV, 1, IA64::r12).addReg(IA64::r5); MBB.insert(MBBI, MI); //restore the FP - MI=BuildMI(IA64::LD8, 1, IA64::r15).addReg(IA64::r15); + MI=BuildMI(IA64::LD8, 1, IA64::r5).addReg(IA64::r5); MBB.insert(MBBI, MI); } Index: llvm/lib/Target/IA64/IA64RegisterInfo.td diff -u llvm/lib/Target/IA64/IA64RegisterInfo.td:1.13 llvm/lib/Target/IA64/IA64RegisterInfo.td:1.14 --- llvm/lib/Target/IA64/IA64RegisterInfo.td:1.13 Mon Jan 16 20:04:52 2006 +++ llvm/lib/Target/IA64/IA64RegisterInfo.td Mon Jan 23 00:08:46 2006 @@ -226,7 +226,7 @@ // // these are the scratch (+stacked) general registers -// FIXME/XXX we also reserve a frame pointer (r15) +// FIXME/XXX we also reserve a frame pointer (r5) // FIXME/XXX we also reserve r2 for spilling/filling predicates // in IA64RegisterInfo.cpp // FIXME/XXX we also reserve r22 for calculating addresses @@ -239,7 +239,7 @@ // registers to be the first ones allocated out7, out6, out5, out4, out3, out2, out1, out0, - r3, r8, r9, r10, r11, r14, + r3, r8, r9, r10, r11, r14, r15, r16, r17, r18, r19, r20, r21, r23, r24, r25, r26, r27, r28, r29, r30, r31, r32, r33, r34, r35, r36, r37, r38, r39, @@ -254,7 +254,7 @@ r104, r105, r106, r107, r108, r109, r110, r111, r112, r113, r114, r115, r116, r117, r118, r119, r120, r121, r122, r123, r124, r125, r126, r127, - r0, r1, r2, r12, r13, r15, r22, rp]> // the last 16 are special (look down) + r0, r1, r2, r5, r12, r13, r22, rp]> // the last 16 are special (look down) { let MethodProtos = [{ iterator allocation_order_begin(MachineFunction &MF) const; @@ -269,7 +269,7 @@ GRClass::iterator GRClass::allocation_order_end(MachineFunction &MF) const { - int numReservedRegs=8; // the 8 special registers r0,r1,r2,r12,r13 etc + int numReservedRegs=8; // the 8 special registers r0,r1,r2,r5,r12,r13 etc // we also can't allocate registers for use as locals if they're // already required as 'out' registers From duraid at octopus.com.au Mon Jan 23 00:11:57 2006 From: duraid at octopus.com.au (Duraid Madina) Date: Mon, 23 Jan 2006 00:11:57 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/IA64/IA64.td Message-ID: <200601230611.AAA14604@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/IA64: IA64.td updated: 1.5 -> 1.6 --- Log message: die, die!! r15, you are not callee-saved --- Diffs of the changes: (+0 -1) IA64.td | 1 - 1 files changed, 1 deletion(-) Index: llvm/lib/Target/IA64/IA64.td diff -u llvm/lib/Target/IA64/IA64.td:1.5 llvm/lib/Target/IA64/IA64.td:1.6 --- llvm/lib/Target/IA64/IA64.td:1.5 Mon Jan 23 00:08:46 2006 +++ llvm/lib/Target/IA64/IA64.td Mon Jan 23 00:11:45 2006 @@ -51,7 +51,6 @@ // r12, // memory stack pointer (SP)- XXX NOT callee saved, we do it ourselves // rp, // return branch register (rp/b0) - we do this ourselves // **** r13 (thread pointer) we do not touch, ever. it's not here. ****// - //r15, //'stacked' GRs the RSE takes care of, we don't worry about /* We don't want PEI::calculateCallerSavedRegisters to worry about them, From lattner at cs.uiuc.edu Mon Jan 23 00:24:21 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon, 23 Jan 2006 00:24:21 -0600 Subject: [llvm-commits] CVS: llvm/autoconf/configure.ac Message-ID: <200601230624.AAA14760@zion.cs.uiuc.edu> Changes in directory llvm/autoconf: configure.ac updated: 1.204 -> 1.205 --- Log message: add checks for new functions. I'd appreciate it if someone could regen the configure script :) --- Diffs of the changes: (+3 -3) configure.ac | 6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-) Index: llvm/autoconf/configure.ac diff -u llvm/autoconf/configure.ac:1.204 llvm/autoconf/configure.ac:1.205 --- llvm/autoconf/configure.ac:1.204 Thu Jan 19 02:31:08 2006 +++ llvm/autoconf/configure.ac Mon Jan 23 00:24:09 2006 @@ -523,9 +523,9 @@ dnl=== dnl===-----------------------------------------------------------------------=== -AC_CHECK_FUNCS([backtrace ceil ceilf floor floorf getcwd getpagesize getrusage]) -AC_CHECK_FUNCS([gettimeofday isatty mkdtemp mkstemp mktemp ]) -AC_CHECK_FUNCS([realpath sbrk setrlimit strdup strerror strerror_r ]) +AC_CHECK_FUNCS([backtrace ceilf floorf roundf rintf nearbyintf getcwd ]) +AC_CHECK_FUNCS([getpagesize getrusage gettimeofday isatty mkdtemp mkstemp ]) +AC_CHECK_FUNCS([mktemp realpath sbrk setrlimit strdup strerror strerror_r ]) AC_CHECK_FUNCS([strtoll strtoq sysconf malloc_zone_statistics ]) AC_C_PRINTF_A AC_FUNC_ALLOCA From lattner at cs.uiuc.edu Mon Jan 23 00:24:28 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon, 23 Jan 2006 00:24:28 -0600 Subject: [llvm-commits] CVS: llvm/test/Regression/Transforms/SimplifyLibCalls/floor.ll Message-ID: <200601230624.AAA14791@zion.cs.uiuc.edu> Changes in directory llvm/test/Regression/Transforms/SimplifyLibCalls: floor.ll updated: 1.2 -> 1.3 --- Log message: add new tests --- Diffs of the changes: (+21 -2) floor.ll | 23 +++++++++++++++++++++-- 1 files changed, 21 insertions(+), 2 deletions(-) Index: llvm/test/Regression/Transforms/SimplifyLibCalls/floor.ll diff -u llvm/test/Regression/Transforms/SimplifyLibCalls/floor.ll:1.2 llvm/test/Regression/Transforms/SimplifyLibCalls/floor.ll:1.3 --- llvm/test/Regression/Transforms/SimplifyLibCalls/floor.ll:1.2 Sun Jan 22 23:56:34 2006 +++ llvm/test/Regression/Transforms/SimplifyLibCalls/floor.ll Mon Jan 23 00:24:17 2006 @@ -1,14 +1,33 @@ ; RUN: llvm-as < %s | opt -simplify-libcalls | llvm-dis | not grep 'call.*floor(' && ; RUN: llvm-as < %s | opt -simplify-libcalls | llvm-dis | grep 'call.*floorf(' - +; RUN: llvm-as < %s | opt -simplify-libcalls | llvm-dis | not grep 'call.*ceil(' && +; RUN: llvm-as < %s | opt -simplify-libcalls | llvm-dis | grep 'call.*ceilf(' +; RUN: llvm-as < %s | opt -simplify-libcalls | llvm-dis | not grep 'call.*nearbyint(' && +; RUN: llvm-as < %s | opt -simplify-libcalls | llvm-dis | grep 'call.*nearbyintf(' ; XFAIL: sparc declare double %floor(double) +declare double %ceil(double) +declare double %nearbyint(double) -float %test(float %C) { +float %test_floor(float %C) { %D = cast float %C to double %E = call double %floor(double %D) ; --> floorf %F = cast double %E to float ret float %F } +float %test_ceil(float %C) { + %D = cast float %C to double + %E = call double %ceil(double %D) ; --> ceilf + %F = cast double %E to float + ret float %F +} + +float %test_nearbyint(float %C) { + %D = cast float %C to double + %E = call double %nearbyint(double %D) ; --> floorf + %F = cast double %E to float + ret float %F +} + From lattner at cs.uiuc.edu Mon Jan 23 00:24:57 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon, 23 Jan 2006 00:24:57 -0600 Subject: [llvm-commits] CVS: llvm/lib/Transforms/IPO/SimplifyLibCalls.cpp Message-ID: <200601230624.AAA14824@zion.cs.uiuc.edu> Changes in directory llvm/lib/Transforms/IPO: SimplifyLibCalls.cpp updated: 1.60 -> 1.61 --- Log message: add a bunch more optimizations for unary double math functions --- Diffs of the changes: (+78 -18) SimplifyLibCalls.cpp | 96 +++++++++++++++++++++++++++++++++++++++++---------- 1 files changed, 78 insertions(+), 18 deletions(-) Index: llvm/lib/Transforms/IPO/SimplifyLibCalls.cpp diff -u llvm/lib/Transforms/IPO/SimplifyLibCalls.cpp:1.60 llvm/lib/Transforms/IPO/SimplifyLibCalls.cpp:1.61 --- llvm/lib/Transforms/IPO/SimplifyLibCalls.cpp:1.60 Sun Jan 22 23:57:36 2006 +++ llvm/lib/Transforms/IPO/SimplifyLibCalls.cpp Mon Jan 23 00:24:46 2006 @@ -289,13 +289,18 @@ return memcpy_func; } - Function* get_floorf() { - if (!floorf_func) - floorf_func = M->getOrInsertFunction("floorf", Type::FloatTy, - Type::FloatTy, NULL); - return floorf_func; + Function *getUnaryFloatFunction(const char *Name, Function *&Cache) { + if (!Cache) + Cache = M->getOrInsertFunction(Name, Type::FloatTy, Type::FloatTy, NULL); + return Cache; } + Function *get_floorf() { return getUnaryFloatFunction("floorf", floorf_func);} + Function *get_ceilf() { return getUnaryFloatFunction( "ceilf", ceilf_func);} + Function *get_roundf() { return getUnaryFloatFunction("roundf", roundf_func);} + Function *get_rintf() { return getUnaryFloatFunction( "rintf", rintf_func);} + Function *get_nearbyintf() { return getUnaryFloatFunction("nearbyintf", + nearbyintf_func); } private: /// @brief Reset our cached data for a new Module void reset(Module& mod) { @@ -309,19 +314,22 @@ strcpy_func = 0; strlen_func = 0; floorf_func = 0; + ceilf_func = 0; + roundf_func = 0; + rintf_func = 0; + nearbyintf_func = 0; } private: - Function* fputc_func; ///< Cached fputc function - Function* fwrite_func; ///< Cached fwrite function - Function* memcpy_func; ///< Cached llvm.memcpy function - Function* memchr_func; ///< Cached memchr function - Function* sqrt_func; ///< Cached sqrt function - Function* strcpy_func; ///< Cached strcpy function - Function* strlen_func; ///< Cached strlen function - Function* floorf_func; ///< Cached floorf function - Module* M; ///< Cached Module - TargetData* TD; ///< Cached TargetData + /// Caches for function pointers. + Function *fputc_func, *fwrite_func; + Function *memcpy_func, *memchr_func; + Function* sqrt_func; + Function *strcpy_func, *strlen_func; + Function *floorf_func, *ceilf_func, *roundf_func; + Function *rintf_func, *nearbyintf_func; + Module *M; ///< Cached Module + TargetData *TD; ///< Cached TargetData }; // Register the pass @@ -1805,9 +1813,6 @@ }; -/// This LibCallOptimization will simplify calls to the "floor" library -/// function. -/// @brief Simplify the floor library function. struct FloorOptimization : public UnaryDoubleFPOptimizer { FloorOptimization() : UnaryDoubleFPOptimizer("floor", "Number of 'floor' calls simplified") {} @@ -1822,7 +1827,62 @@ } } FloorOptimizer; +struct CeilOptimization : public UnaryDoubleFPOptimizer { + CeilOptimization() + : UnaryDoubleFPOptimizer("ceil", "Number of 'ceil' calls simplified") {} + + virtual bool OptimizeCall(CallInst *CI, SimplifyLibCalls &SLC) { +#ifdef HAVE_CEILF + // If this is a float argument passed in, convert to ceilf. + if (ShrinkFunctionToFloatVersion(CI, SLC, &SimplifyLibCalls::get_ceilf)) + return true; +#endif + return false; // opt failed + } +} CeilOptimizer; + +struct RoundOptimization : public UnaryDoubleFPOptimizer { + RoundOptimization() + : UnaryDoubleFPOptimizer("round", "Number of 'round' calls simplified") {} + + virtual bool OptimizeCall(CallInst *CI, SimplifyLibCalls &SLC) { +#ifdef HAVE_ROUNDF + // If this is a float argument passed in, convert to roundf. + if (ShrinkFunctionToFloatVersion(CI, SLC, &SimplifyLibCalls::get_roundf)) + return true; +#endif + return false; // opt failed + } +} RoundOptimizer; +struct RintOptimization : public UnaryDoubleFPOptimizer { + RintOptimization() + : UnaryDoubleFPOptimizer("rint", "Number of 'rint' calls simplified") {} + + virtual bool OptimizeCall(CallInst *CI, SimplifyLibCalls &SLC) { +#ifdef HAVE_RINTF + // If this is a float argument passed in, convert to rintf. + if (ShrinkFunctionToFloatVersion(CI, SLC, &SimplifyLibCalls::get_rintf)) + return true; +#endif + return false; // opt failed + } +} RintOptimizer; + +struct NearByIntOptimization : public UnaryDoubleFPOptimizer { + NearByIntOptimization() + : UnaryDoubleFPOptimizer("nearbyint", + "Number of 'nearbyint' calls simplified") {} + + virtual bool OptimizeCall(CallInst *CI, SimplifyLibCalls &SLC) { +#ifdef HAVE_NEARBYINTF + // If this is a float argument passed in, convert to nearbyintf. + if (ShrinkFunctionToFloatVersion(CI, SLC,&SimplifyLibCalls::get_nearbyintf)) + return true; +#endif + return false; // opt failed + } +} NearByIntOptimizer; /// A function to compute the length of a null-terminated constant array of /// integers. This function can't rely on the size of the constant array From duraid at octopus.com.au Mon Jan 23 00:48:08 2006 From: duraid at octopus.com.au (Duraid Madina) Date: Mon, 23 Jan 2006 00:48:08 -0600 Subject: [llvm-commits] CVS: llvm/autoconf/configure.ac Message-ID: <200601230648.AAA15084@zion.cs.uiuc.edu> Changes in directory llvm/autoconf: configure.ac updated: 1.205 -> 1.206 --- Log message: don't need this any more; the "#define hashes to trees" hack is coming --- Diffs of the changes: (+0 -1) configure.ac | 1 - 1 files changed, 1 deletion(-) Index: llvm/autoconf/configure.ac diff -u llvm/autoconf/configure.ac:1.205 llvm/autoconf/configure.ac:1.206 --- llvm/autoconf/configure.ac:1.205 Mon Jan 23 00:24:09 2006 +++ llvm/autoconf/configure.ac Mon Jan 23 00:47:56 2006 @@ -497,7 +497,6 @@ AC_CHECK_HEADERS([malloc.h signal.h stdint.h unistd.h utime.h windows.h]) AC_CHECK_HEADERS([sys/mman.h sys/param.h sys/resource.h sys/time.h sys/types.h]) AC_CHECK_HEADERS([malloc/malloc.h]) -AC_CHECK_HEADERS([rw/stdex/hash_map.h rw/stdex/hash_set.h]) if test "$ENABLE_THREADS" -eq 1 ; then AC_CHECK_HEADERS(pthread.h) fi From evan.cheng at apple.com Mon Jan 23 01:01:20 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 23 Jan 2006 01:01:20 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/ScheduleDAG.h Message-ID: <200601230701.BAA15203@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/CodeGen: ScheduleDAG.h updated: 1.2 -> 1.3 --- Log message: Factor out more instruction scheduler code to the base class. --- Diffs of the changes: (+58 -9) ScheduleDAG.h | 67 ++++++++++++++++++++++++++++++++++++++++++++++++++-------- 1 files changed, 58 insertions(+), 9 deletions(-) Index: llvm/include/llvm/CodeGen/ScheduleDAG.h diff -u llvm/include/llvm/CodeGen/ScheduleDAG.h:1.2 llvm/include/llvm/CodeGen/ScheduleDAG.h:1.3 --- llvm/include/llvm/CodeGen/ScheduleDAG.h:1.2 Sun Jan 22 14:36:43 2006 +++ llvm/include/llvm/CodeGen/ScheduleDAG.h Mon Jan 23 01:01:07 2006 @@ -35,6 +35,14 @@ typedef std::vector::iterator NIIterator; + // Scheduling heuristics + enum SchedHeuristics { + noScheduling, + simpleScheduling, + simpleNoItinScheduling + }; + + //===--------------------------------------------------------------------===// /// /// Node group - This struct is used to manage flagged node groups. @@ -45,7 +53,7 @@ NodeInfo *Dominator; // Node with highest latency unsigned Latency; // Total latency of the group int Pending; // Number of visits pending before - // adding to order + // adding to order public: // Ctor. @@ -76,7 +84,6 @@ } static void Add(NodeInfo *D, NodeInfo *U); - static unsigned CountInternalUses(NodeInfo *D, NodeInfo *U); }; //===--------------------------------------------------------------------===// @@ -232,6 +239,7 @@ class ScheduleDAG { public: + SchedHeuristics Heuristic; // Scheduling heuristic SelectionDAG &DAG; // DAG of the current basic block MachineBasicBlock *BB; // Current basic block const TargetMachine &TM; // Target processor @@ -240,10 +248,15 @@ SSARegMap *RegMap; // Virtual/real register map MachineConstantPool *ConstPool; // Target constant pool std::map Map; // Map nodes to info + unsigned NodeCount; // Number of nodes in DAG + bool HasGroups; // True if there are any groups + NodeInfo *Info; // Info for nodes being scheduled + NIVector Ordering; // Emit ordering of nodes - ScheduleDAG(SelectionDAG &dag, MachineBasicBlock *bb, + ScheduleDAG(SchedHeuristics hstc, SelectionDAG &dag, MachineBasicBlock *bb, const TargetMachine &tm) - : DAG(dag), BB(bb), TM(tm) {} + : Heuristic(hstc), DAG(dag), BB(bb), TM(tm), + NodeCount(0), HasGroups(false), Info(NULL) {} virtual ~ScheduleDAG() {}; @@ -263,25 +276,61 @@ return NI->VRBase + Op.ResNo; } + /// isPassiveNode - Return true if the node is a non-scheduled leaf. + /// + bool isPassiveNode(SDNode *Node) { + if (isa(Node)) return true; + if (isa(Node)) return true; + if (isa(Node)) return true; + if (isa(Node)) return true; + if (isa(Node)) return true; + if (isa(Node)) return true; + if (isa(Node)) return true; + return false; + } + + /// EmitNode - Generate machine code for an node and needed dependencies. + /// void EmitNode(NodeInfo *NI); + /// EmitAll - Emit all nodes in schedule sorted order. + /// + void EmitAll(); + + /// Schedule - Order nodes according to selected style. + /// virtual void Schedule() {}; - virtual void print(std::ostream &O) const {}; + /// printNI - Print node info. + /// + void printNI(std::ostream &O, NodeInfo *NI) const; + + /// printChanges - Hilight changes in order caused by scheduling. + /// + void printChanges(unsigned Index) const; + + /// print - Print ordering to specified output stream. + /// + void print(std::ostream &O) const; void dump(const char *tag) const; void dump() const; private: - unsigned CreateVirtualRegisters(MachineInstr *MI, - unsigned NumResults, - const TargetInstrDescriptor &II); + /// PrepareNodeInfo - Set up the basic minimum node info for scheduling. + /// + void PrepareNodeInfo(); + + /// IdentifyGroups - Put flagged nodes into groups. + /// + void IdentifyGroups(); }; /// createSimpleDAGScheduler - This creates a simple two pass instruction /// scheduler. - ScheduleDAG* createSimpleDAGScheduler(SelectionDAG &DAG, + ScheduleDAG* createSimpleDAGScheduler(SchedHeuristics Heuristic, + SelectionDAG &DAG, MachineBasicBlock *BB); } From evan.cheng at apple.com Mon Jan 23 01:01:20 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 23 Jan 2006 01:01:20 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp ScheduleDAGSimple.cpp SelectionDAGISel.cpp Message-ID: <200601230701.BAA15209@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/SelectionDAG: ScheduleDAG.cpp updated: 1.56 -> 1.57 ScheduleDAGSimple.cpp updated: 1.1 -> 1.2 SelectionDAGISel.cpp updated: 1.132 -> 1.133 --- Log message: Factor out more instruction scheduler code to the base class. --- Diffs of the changes: (+306 -333) ScheduleDAG.cpp | 240 +++++++++++++++++++++++++++++++- ScheduleDAGSimple.cpp | 369 +++++--------------------------------------------- SelectionDAGISel.cpp | 30 +++- 3 files changed, 306 insertions(+), 333 deletions(-) Index: llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp diff -u llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.56 llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.57 --- llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.56 Fri Jan 20 20:32:06 2006 +++ llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp Mon Jan 23 01:01:07 2006 @@ -51,11 +51,51 @@ return N; } -/// CreateVirtualRegisters - Add result register values for things that are -/// defined by this instruction. -unsigned ScheduleDAG::CreateVirtualRegisters(MachineInstr *MI, - unsigned NumResults, - const TargetInstrDescriptor &II) { +/// PrepareNodeInfo - Set up the basic minimum node info for scheduling. +/// +void ScheduleDAG::PrepareNodeInfo() { + // Allocate node information + Info = new NodeInfo[NodeCount]; + + unsigned i = 0; + for (SelectionDAG::allnodes_iterator I = DAG.allnodes_begin(), + E = DAG.allnodes_end(); I != E; ++I, ++i) { + // Fast reference to node schedule info + NodeInfo* NI = &Info[i]; + // Set up map + Map[I] = NI; + // Set node + NI->Node = I; + // Set pending visit count + NI->setPending(I->use_size()); + } +} + +/// IdentifyGroups - Put flagged nodes into groups. +/// +void ScheduleDAG::IdentifyGroups() { + for (unsigned i = 0, N = NodeCount; i < N; i++) { + NodeInfo* NI = &Info[i]; + SDNode *Node = NI->Node; + + // For each operand (in reverse to only look at flags) + for (unsigned N = Node->getNumOperands(); 0 < N--;) { + // Get operand + SDOperand Op = Node->getOperand(N); + // No more flags to walk + if (Op.getValueType() != MVT::Flag) break; + // Add to node group + NodeGroup::Add(getNI(Op.Val), NI); + // Let evryone else know + HasGroups = true; + } + } +} + +static unsigned CreateVirtualRegisters(MachineInstr *MI, + unsigned NumResults, + SSARegMap *RegMap, + const TargetInstrDescriptor &II) { // Create the result registers for this node and add the result regs to // the machine instruction. const TargetOperandInfo *OpInfo = II.OpInfo; @@ -114,7 +154,7 @@ // Otherwise, create new virtual registers. if (NumResults && VRBase == 0) - VRBase = CreateVirtualRegisters(MI, NumResults, II); + VRBase = CreateVirtualRegisters(MI, NumResults, RegMap, II); // Emit all of the actual operands of this instruction, adding them to the // instruction as appropriate. @@ -250,6 +290,112 @@ NI->VRBase = VRBase; } +/// EmitAll - Emit all nodes in schedule sorted order. +/// +void ScheduleDAG::EmitAll() { + // For each node in the ordering + for (unsigned i = 0, N = Ordering.size(); i < N; i++) { + // Get the scheduling info + NodeInfo *NI = Ordering[i]; + if (NI->isInGroup()) { + NodeGroupIterator NGI(Ordering[i]); + while (NodeInfo *NI = NGI.next()) EmitNode(NI); + } else { + EmitNode(NI); + } + } +} + +/// isFlagDefiner - Returns true if the node defines a flag result. +static bool isFlagDefiner(SDNode *A) { + unsigned N = A->getNumValues(); + return N && A->getValueType(N - 1) == MVT::Flag; +} + +/// isFlagUser - Returns true if the node uses a flag result. +/// +static bool isFlagUser(SDNode *A) { + unsigned N = A->getNumOperands(); + return N && A->getOperand(N - 1).getValueType() == MVT::Flag; +} + +/// printNI - Print node info. +/// +void ScheduleDAG::printNI(std::ostream &O, NodeInfo *NI) const { +#ifndef NDEBUG + SDNode *Node = NI->Node; + O << " " + << std::hex << Node << std::dec + << ", Lat=" << NI->Latency + << ", Slot=" << NI->Slot + << ", ARITY=(" << Node->getNumOperands() << "," + << Node->getNumValues() << ")" + << " " << Node->getOperationName(&DAG); + if (isFlagDefiner(Node)) O << "<#"; + if (isFlagUser(Node)) O << ">#"; +#endif +} + +/// printChanges - Hilight changes in order caused by scheduling. +/// +void ScheduleDAG::printChanges(unsigned Index) const { +#ifndef NDEBUG + // Get the ordered node count + unsigned N = Ordering.size(); + // Determine if any changes + unsigned i = 0; + for (; i < N; i++) { + NodeInfo *NI = Ordering[i]; + if (NI->Preorder != i) break; + } + + if (i < N) { + std::cerr << Index << ". New Ordering\n"; + + for (i = 0; i < N; i++) { + NodeInfo *NI = Ordering[i]; + std::cerr << " " << NI->Preorder << ". "; + printNI(std::cerr, NI); + std::cerr << "\n"; + if (NI->isGroupDominator()) { + NodeGroup *Group = NI->Group; + for (NIIterator NII = Group->group_begin(), E = Group->group_end(); + NII != E; NII++) { + std::cerr << " "; + printNI(std::cerr, *NII); + std::cerr << "\n"; + } + } + } + } else { + std::cerr << Index << ". No Changes\n"; + } +#endif +} + +/// print - Print ordering to specified output stream. +/// +void ScheduleDAG::print(std::ostream &O) const { +#ifndef NDEBUG + using namespace std; + O << "Ordering\n"; + for (unsigned i = 0, N = Ordering.size(); i < N; i++) { + NodeInfo *NI = Ordering[i]; + printNI(O, NI); + O << "\n"; + if (NI->isGroupDominator()) { + NodeGroup *Group = NI->Group; + for (NIIterator NII = Group->group_begin(), E = Group->group_end(); + NII != E; NII++) { + O << " "; + printNI(O, *NII); + O << "\n"; + } + } + } +#endif +} + void ScheduleDAG::dump(const char *tag) const { std::cerr << tag; dump(); } @@ -265,6 +411,88 @@ MRI = TM.getRegisterInfo(); RegMap = BB->getParent()->getSSARegMap(); ConstPool = BB->getParent()->getConstantPool(); + + // Number the nodes + NodeCount = std::distance(DAG.allnodes_begin(), DAG.allnodes_end()); + // Set up minimum info for scheduling + PrepareNodeInfo(); + // Construct node groups for flagged nodes + IdentifyGroups(); + Schedule(); return BB; } + + +/// CountInternalUses - Returns the number of edges between the two nodes. +/// +static unsigned CountInternalUses(NodeInfo *D, NodeInfo *U) { + unsigned N = 0; + for (unsigned M = U->Node->getNumOperands(); 0 < M--;) { + SDOperand Op = U->Node->getOperand(M); + if (Op.Val == D->Node) N++; + } + + return N; +} + +//===----------------------------------------------------------------------===// +/// Add - Adds a definer and user pair to a node group. +/// +void NodeGroup::Add(NodeInfo *D, NodeInfo *U) { + // Get current groups + NodeGroup *DGroup = D->Group; + NodeGroup *UGroup = U->Group; + // If both are members of groups + if (DGroup && UGroup) { + // There may have been another edge connecting + if (DGroup == UGroup) return; + // Add the pending users count + DGroup->addPending(UGroup->getPending()); + // For each member of the users group + NodeGroupIterator UNGI(U); + while (NodeInfo *UNI = UNGI.next() ) { + // Change the group + UNI->Group = DGroup; + // For each member of the definers group + NodeGroupIterator DNGI(D); + while (NodeInfo *DNI = DNGI.next() ) { + // Remove internal edges + DGroup->addPending(-CountInternalUses(DNI, UNI)); + } + } + // Merge the two lists + DGroup->group_insert(DGroup->group_end(), + UGroup->group_begin(), UGroup->group_end()); + } else if (DGroup) { + // Make user member of definers group + U->Group = DGroup; + // Add users uses to definers group pending + DGroup->addPending(U->Node->use_size()); + // For each member of the definers group + NodeGroupIterator DNGI(D); + while (NodeInfo *DNI = DNGI.next() ) { + // Remove internal edges + DGroup->addPending(-CountInternalUses(DNI, U)); + } + DGroup->group_push_back(U); + } else if (UGroup) { + // Make definer member of users group + D->Group = UGroup; + // Add definers uses to users group pending + UGroup->addPending(D->Node->use_size()); + // For each member of the users group + NodeGroupIterator UNGI(U); + while (NodeInfo *UNI = UNGI.next() ) { + // Remove internal edges + UGroup->addPending(-CountInternalUses(D, UNI)); + } + UGroup->group_insert(UGroup->group_begin(), D); + } else { + D->Group = U->Group = DGroup = new NodeGroup(); + DGroup->addPending(D->Node->use_size() + U->Node->use_size() - + CountInternalUses(D, U)); + DGroup->group_push_back(D); + DGroup->group_push_back(U); + } +} Index: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp diff -u llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp:1.1 llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp:1.2 --- llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp:1.1 Fri Jan 20 20:32:06 2006 +++ llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp Mon Jan 23 01:01:07 2006 @@ -21,33 +21,9 @@ #include "llvm/Support/CommandLine.h" #include "llvm/Support/Debug.h" #include -#include -#include using namespace llvm; namespace { - // Style of scheduling to use. - enum ScheduleChoices { - noScheduling, - simpleScheduling, - simpleNoItinScheduling - }; -} // namespace - -cl::opt ScheduleStyle("sched", - cl::desc("Choose scheduling style"), - cl::init(noScheduling), - cl::values( - clEnumValN(noScheduling, "none", - "Trivial emission with no analysis"), - clEnumValN(simpleScheduling, "simple", - "Minimize critical path and maximize processor utilization"), - clEnumValN(simpleNoItinScheduling, "simple-noitin", - "Same as simple except using generic latency"), - clEnumValEnd)); - - -namespace { //===----------------------------------------------------------------------===// /// /// BitsIterator - Provides iteration through individual bits in a bit vector. @@ -212,10 +188,6 @@ /// class ScheduleDAGSimple : public ScheduleDAG { private: - unsigned NodeCount; // Number of nodes in DAG - bool HasGroups; // True if there are any groups - NodeInfo *Info; // Info for nodes being scheduled - NIVector Ordering; // Emit ordering of nodes ResourceTally Tally; // Resource usage tally unsigned NSlots; // Total latency static const unsigned NotFound = ~0U; // Search marker @@ -223,10 +195,9 @@ public: // Ctor. - ScheduleDAGSimple(SelectionDAG &dag, MachineBasicBlock *bb, - const TargetMachine &tm) - : ScheduleDAG(dag, bb, tm), - NodeCount(0), HasGroups(false), Info(NULL), Tally(), NSlots(0) { + ScheduleDAGSimple(SchedHeuristics hstc, SelectionDAG &dag, + MachineBasicBlock *bb, const TargetMachine &tm) + : ScheduleDAG(hstc, dag, bb, tm), Tally(), NSlots(0) { assert(&TII && "Target doesn't provide instr info?"); assert(&MRI && "Target doesn't provide register info?"); } @@ -234,29 +205,18 @@ virtual ~ScheduleDAGSimple() {}; private: - static bool isFlagDefiner(SDNode *A); - static bool isFlagUser(SDNode *A); static bool isDefiner(NodeInfo *A, NodeInfo *B); - static bool isPassiveNode(SDNode *Node); void IncludeNode(NodeInfo *NI); void VisitAll(); void Schedule(); - void IdentifyGroups(); void GatherSchedulingInfo(); void FakeGroupDominators(); - void PrepareNodeInfo(); bool isStrongDependency(NodeInfo *A, NodeInfo *B); bool isWeakDependency(NodeInfo *A, NodeInfo *B); void ScheduleBackward(); void ScheduleForward(); - void EmitAll(); - - void printChanges(unsigned Index); - void printSI(std::ostream &O, NodeInfo *NI) const; - void print(std::ostream &O) const; }; - //===----------------------------------------------------------------------===// /// Special case itineraries. /// @@ -275,103 +235,12 @@ static InstrStage FloatStage = { 3, RSFloat }; //===----------------------------------------------------------------------===// - -//===----------------------------------------------------------------------===// - } // namespace //===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===// -/// Add - Adds a definer and user pair to a node group. -/// -void NodeGroup::Add(NodeInfo *D, NodeInfo *U) { - // Get current groups - NodeGroup *DGroup = D->Group; - NodeGroup *UGroup = U->Group; - // If both are members of groups - if (DGroup && UGroup) { - // There may have been another edge connecting - if (DGroup == UGroup) return; - // Add the pending users count - DGroup->addPending(UGroup->getPending()); - // For each member of the users group - NodeGroupIterator UNGI(U); - while (NodeInfo *UNI = UNGI.next() ) { - // Change the group - UNI->Group = DGroup; - // For each member of the definers group - NodeGroupIterator DNGI(D); - while (NodeInfo *DNI = DNGI.next() ) { - // Remove internal edges - DGroup->addPending(-CountInternalUses(DNI, UNI)); - } - } - // Merge the two lists - DGroup->group_insert(DGroup->group_end(), - UGroup->group_begin(), UGroup->group_end()); - } else if (DGroup) { - // Make user member of definers group - U->Group = DGroup; - // Add users uses to definers group pending - DGroup->addPending(U->Node->use_size()); - // For each member of the definers group - NodeGroupIterator DNGI(D); - while (NodeInfo *DNI = DNGI.next() ) { - // Remove internal edges - DGroup->addPending(-CountInternalUses(DNI, U)); - } - DGroup->group_push_back(U); - } else if (UGroup) { - // Make definer member of users group - D->Group = UGroup; - // Add definers uses to users group pending - UGroup->addPending(D->Node->use_size()); - // For each member of the users group - NodeGroupIterator UNGI(U); - while (NodeInfo *UNI = UNGI.next() ) { - // Remove internal edges - UGroup->addPending(-CountInternalUses(D, UNI)); - } - UGroup->group_insert(UGroup->group_begin(), D); - } else { - D->Group = U->Group = DGroup = new NodeGroup(); - DGroup->addPending(D->Node->use_size() + U->Node->use_size() - - CountInternalUses(D, U)); - DGroup->group_push_back(D); - DGroup->group_push_back(U); - } -} - -/// CountInternalUses - Returns the number of edges between the two nodes. -/// -unsigned NodeGroup::CountInternalUses(NodeInfo *D, NodeInfo *U) { - unsigned N = 0; - for (unsigned M = U->Node->getNumOperands(); 0 < M--;) { - SDOperand Op = U->Node->getOperand(M); - if (Op.Val == D->Node) N++; - } - - return N; -} -//===----------------------------------------------------------------------===// - - -//===----------------------------------------------------------------------===// -/// isFlagDefiner - Returns true if the node defines a flag result. -bool ScheduleDAGSimple::isFlagDefiner(SDNode *A) { - unsigned N = A->getNumValues(); - return N && A->getValueType(N - 1) == MVT::Flag; -} - -/// isFlagUser - Returns true if the node uses a flag result. -/// -bool ScheduleDAGSimple::isFlagUser(SDNode *A) { - unsigned N = A->getNumOperands(); - return N && A->getOperand(N - 1).getValueType() == MVT::Flag; -} - /// isDefiner - Return true if node A is a definer for B. /// bool ScheduleDAGSimple::isDefiner(NodeInfo *A, NodeInfo *B) { @@ -391,19 +260,6 @@ return false; } -/// isPassiveNode - Return true if the node is a non-scheduled leaf. -/// -bool ScheduleDAGSimple::isPassiveNode(SDNode *Node) { - if (isa(Node)) return true; - if (isa(Node)) return true; - if (isa(Node)) return true; - if (isa(Node)) return true; - if (isa(Node)) return true; - if (isa(Node)) return true; - if (isa(Node)) return true; - return false; -} - /// IncludeNode - Add node to NodeInfo vector. /// void ScheduleDAGSimple::IncludeNode(NodeInfo *NI) { @@ -432,62 +288,6 @@ NI->setPending(Count); } -/// VisitAll - Visit each node breadth-wise to produce an initial ordering. -/// Note that the ordering in the Nodes vector is reversed. -void ScheduleDAGSimple::VisitAll() { - // Add first element to list - NodeInfo *NI = getNI(DAG.getRoot().Val); - if (NI->isInGroup()) { - Ordering.push_back(NI->Group->getDominator()); - } else { - Ordering.push_back(NI); - } - - // Iterate through all nodes that have been added - for (unsigned i = 0; i < Ordering.size(); i++) { // note: size() varies - // Visit all operands - NodeGroupOpIterator NGI(Ordering[i]); - while (!NGI.isEnd()) { - // Get next operand - SDOperand Op = NGI.next(); - // Get node - SDNode *Node = Op.Val; - // Ignore passive nodes - if (isPassiveNode(Node)) continue; - // Check out node - IncludeNode(getNI(Node)); - } - } - - // Add entry node last (IncludeNode filters entry nodes) - if (DAG.getEntryNode().Val != DAG.getRoot().Val) - Ordering.push_back(getNI(DAG.getEntryNode().Val)); - - // Reverse the order - std::reverse(Ordering.begin(), Ordering.end()); -} - -/// IdentifyGroups - Put flagged nodes into groups. -/// -void ScheduleDAGSimple::IdentifyGroups() { - for (unsigned i = 0, N = NodeCount; i < N; i++) { - NodeInfo* NI = &Info[i]; - SDNode *Node = NI->Node; - - // For each operand (in reverse to only look at flags) - for (unsigned N = Node->getNumOperands(); 0 < N--;) { - // Get operand - SDOperand Op = Node->getOperand(N); - // No more flags to walk - if (Op.getValueType() != MVT::Flag) break; - // Add to node group - NodeGroup::Add(getNI(Op.Val), NI); - // Let evryone else know - HasGroups = true; - } - } -} - /// GatherSchedulingInfo - Get latency and resource information about each node. /// void ScheduleDAGSimple::GatherSchedulingInfo() { @@ -501,7 +301,7 @@ SDNode *Node = NI->Node; // If there are itineraries and it is a machine instruction - if (InstrItins.isEmpty() || ScheduleStyle == simpleNoItinScheduling) { + if (InstrItins.isEmpty() || Heuristic == simpleNoItinScheduling) { // If machine opcode if (Node->isTargetOpcode()) { // Get return type to guess which processing unit @@ -572,6 +372,41 @@ } } +/// VisitAll - Visit each node breadth-wise to produce an initial ordering. +/// Note that the ordering in the Nodes vector is reversed. +void ScheduleDAGSimple::VisitAll() { + // Add first element to list + NodeInfo *NI = getNI(DAG.getRoot().Val); + if (NI->isInGroup()) { + Ordering.push_back(NI->Group->getDominator()); + } else { + Ordering.push_back(NI); + } + + // Iterate through all nodes that have been added + for (unsigned i = 0; i < Ordering.size(); i++) { // note: size() varies + // Visit all operands + NodeGroupOpIterator NGI(Ordering[i]); + while (!NGI.isEnd()) { + // Get next operand + SDOperand Op = NGI.next(); + // Get node + SDNode *Node = Op.Val; + // Ignore passive nodes + if (isPassiveNode(Node)) continue; + // Check out node + IncludeNode(getNI(Node)); + } + } + + // Add entry node last (IncludeNode filters entry nodes) + if (DAG.getEntryNode().Val != DAG.getRoot().Val) + Ordering.push_back(getNI(DAG.getEntryNode().Val)); + + // Reverse the order + std::reverse(Ordering.begin(), Ordering.end()); +} + /// FakeGroupDominators - Set dominators for non-scheduling. /// void ScheduleDAGSimple::FakeGroupDominators() { @@ -588,26 +423,6 @@ } } -/// PrepareNodeInfo - Set up the basic minimum node info for scheduling. -/// -void ScheduleDAGSimple::PrepareNodeInfo() { - // Allocate node information - Info = new NodeInfo[NodeCount]; - - unsigned i = 0; - for (SelectionDAG::allnodes_iterator I = DAG.allnodes_begin(), - E = DAG.allnodes_end(); I != E; ++I, ++i) { - // Fast reference to node schedule info - NodeInfo* NI = &Info[i]; - // Set up map - Map[I] = NI; - // Set node - NI->Node = I; - // Set pending visit count - NI->setPending(I->use_size()); - } -} - /// isStrongDependency - Return true if node A has results used by node B. /// I.E., B must wait for latency of A. bool ScheduleDAGSimple::isStrongDependency(NodeInfo *A, NodeInfo *B) { @@ -742,34 +557,11 @@ } } -/// EmitAll - Emit all nodes in schedule sorted order. -/// -void ScheduleDAGSimple::EmitAll() { - // For each node in the ordering - for (unsigned i = 0, N = Ordering.size(); i < N; i++) { - // Get the scheduling info - NodeInfo *NI = Ordering[i]; - if (NI->isInGroup()) { - NodeGroupIterator NGI(Ordering[i]); - while (NodeInfo *NI = NGI.next()) EmitNode(NI); - } else { - EmitNode(NI); - } - } -} - /// Schedule - Order nodes according to selected style. /// void ScheduleDAGSimple::Schedule() { - // Number the nodes - NodeCount = std::distance(DAG.allnodes_begin(), DAG.allnodes_end()); // Test to see if scheduling should occur - bool ShouldSchedule = NodeCount > 3 && ScheduleStyle != noScheduling; - // Set up minimum info for scheduling - PrepareNodeInfo(); - // Construct node groups for flagged nodes - IdentifyGroups(); - + bool ShouldSchedule = NodeCount > 3 && Heuristic != noScheduling; // Don't waste time if is only entry and return if (ShouldSchedule) { // Get latency and resource requirements @@ -806,86 +598,11 @@ EmitAll(); } -/// printChanges - Hilight changes in order caused by scheduling. -/// -void ScheduleDAGSimple::printChanges(unsigned Index) { -#ifndef NDEBUG - // Get the ordered node count - unsigned N = Ordering.size(); - // Determine if any changes - unsigned i = 0; - for (; i < N; i++) { - NodeInfo *NI = Ordering[i]; - if (NI->Preorder != i) break; - } - - if (i < N) { - std::cerr << Index << ". New Ordering\n"; - - for (i = 0; i < N; i++) { - NodeInfo *NI = Ordering[i]; - std::cerr << " " << NI->Preorder << ". "; - printSI(std::cerr, NI); - std::cerr << "\n"; - if (NI->isGroupDominator()) { - NodeGroup *Group = NI->Group; - for (NIIterator NII = Group->group_begin(), E = Group->group_end(); - NII != E; NII++) { - std::cerr << " "; - printSI(std::cerr, *NII); - std::cerr << "\n"; - } - } - } - } else { - std::cerr << Index << ". No Changes\n"; - } -#endif -} - -/// printSI - Print schedule info. -/// -void ScheduleDAGSimple::printSI(std::ostream &O, NodeInfo *NI) const { -#ifndef NDEBUG - SDNode *Node = NI->Node; - O << " " - << std::hex << Node << std::dec - << ", Lat=" << NI->Latency - << ", Slot=" << NI->Slot - << ", ARITY=(" << Node->getNumOperands() << "," - << Node->getNumValues() << ")" - << " " << Node->getOperationName(&DAG); - if (isFlagDefiner(Node)) O << "<#"; - if (isFlagUser(Node)) O << ">#"; -#endif -} - -/// print - Print ordering to specified output stream. -/// -void ScheduleDAGSimple::print(std::ostream &O) const { -#ifndef NDEBUG - using namespace std; - O << "Ordering\n"; - for (unsigned i = 0, N = Ordering.size(); i < N; i++) { - NodeInfo *NI = Ordering[i]; - printSI(O, NI); - O << "\n"; - if (NI->isGroupDominator()) { - NodeGroup *Group = NI->Group; - for (NIIterator NII = Group->group_begin(), E = Group->group_end(); - NII != E; NII++) { - O << " "; - printSI(O, *NII); - O << "\n"; - } - } - } -#endif -} /// createSimpleDAGScheduler - This creates a simple two pass instruction /// scheduler. -llvm::ScheduleDAG* llvm::createSimpleDAGScheduler(SelectionDAG &DAG, +llvm::ScheduleDAG* llvm::createSimpleDAGScheduler(SchedHeuristics Heuristic, + SelectionDAG &DAG, MachineBasicBlock *BB) { - return new ScheduleDAGSimple(DAG, BB, DAG.getTarget()); + return new ScheduleDAGSimple(Heuristic, DAG, BB, DAG.getTarget()); } Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.132 llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.133 --- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.132 Sun Jan 22 23:22:07 2006 +++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Mon Jan 23 01:01:07 2006 @@ -54,6 +54,25 @@ static const bool ViewSchedDAGs = 0; #endif +namespace { + cl::opt + ISHeuristic( + "sched", + cl::desc("Choose scheduling style"), + cl::init(noScheduling), + cl::values( + clEnumValN(noScheduling, "none", + "No scheduling: breath first sequencing"), + clEnumValN(simpleScheduling, "simple", + "Simple two pass scheduling: minimize critical path " + "and maximize processor utilization"), + clEnumValN(simpleNoItinScheduling, "simple-noitin", + "Simple two pass scheduling: Same as simple " + "except using generic latency"), + clEnumValEnd)); +} // namespace + + namespace llvm { //===--------------------------------------------------------------------===// /// FunctionLoweringInfo - This contains information that is global to a @@ -1747,6 +1766,15 @@ /// target node in the graph. void SelectionDAGISel::ScheduleAndEmitDAG(SelectionDAG &DAG) { if (ViewSchedDAGs) DAG.viewGraph(); - ScheduleDAG *SL = createSimpleDAGScheduler(DAG, BB); + ScheduleDAG *SL = NULL; + + switch (ISHeuristic) { + default: assert(0 && "Unrecognized scheduling heuristic"); + case noScheduling: + case simpleScheduling: + case simpleNoItinScheduling: + SL = createSimpleDAGScheduler(ISHeuristic, DAG, BB); + break; + } BB = SL->Run(); } From lattner at cs.uiuc.edu Mon Jan 23 01:08:02 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon, 23 Jan 2006 01:08:02 -0600 Subject: [llvm-commits] CVS: llvm/test/Regression/Bytecode/old-intrinsics.ll Message-ID: <200601230708.BAA15256@zion.cs.uiuc.edu> Changes in directory llvm/test/Regression/Bytecode: old-intrinsics.ll updated: 1.2 -> 1.3 --- Log message: make this test harder --- Diffs of the changes: (+2 -1) old-intrinsics.ll | 3 ++- 1 files changed, 2 insertions(+), 1 deletion(-) Index: llvm/test/Regression/Bytecode/old-intrinsics.ll diff -u llvm/test/Regression/Bytecode/old-intrinsics.ll:1.2 llvm/test/Regression/Bytecode/old-intrinsics.ll:1.3 --- llvm/test/Regression/Bytecode/old-intrinsics.ll:1.2 Thu Jan 19 01:15:47 2006 +++ llvm/test/Regression/Bytecode/old-intrinsics.ll Mon Jan 23 01:07:51 2006 @@ -1,3 +1,4 @@ -; RUN: llvm-dis %s.bc-16 -o /dev/null -f +; RUN: llvm-dis %s.bc-16 -o /dev/null -f && +; RUN: llc %s.bc-16 -o /dev/null -f -march=c ; Just see if we can disassemble the bc file corresponding to this file. From lattner at cs.uiuc.edu Mon Jan 23 01:20:27 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon, 23 Jan 2006 01:20:27 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/SparcV8/SparcV8.h SparcV8TargetMachine.cpp SparcV8ISelSimple.cpp Message-ID: <200601230720.BAA15350@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/SparcV8: SparcV8.h updated: 1.7 -> 1.8 SparcV8TargetMachine.cpp updated: 1.36 -> 1.37 SparcV8ISelSimple.cpp (r1.99) removed --- Log message: remove the V8 simple isel --- Diffs of the changes: (+4 -17) SparcV8.h | 1 - SparcV8TargetMachine.cpp | 20 ++++---------------- 2 files changed, 4 insertions(+), 17 deletions(-) Index: llvm/lib/Target/SparcV8/SparcV8.h diff -u llvm/lib/Target/SparcV8/SparcV8.h:1.7 llvm/lib/Target/SparcV8/SparcV8.h:1.8 --- llvm/lib/Target/SparcV8/SparcV8.h:1.7 Sat Dec 17 01:47:01 2005 +++ llvm/lib/Target/SparcV8/SparcV8.h Mon Jan 23 01:20:15 2006 @@ -22,7 +22,6 @@ class FunctionPass; class TargetMachine; - FunctionPass *createSparcV8SimpleInstructionSelector(TargetMachine &TM); FunctionPass *createSparcV8ISelDag(TargetMachine &TM); FunctionPass *createSparcV8CodePrinterPass(std::ostream &OS, Index: llvm/lib/Target/SparcV8/SparcV8TargetMachine.cpp diff -u llvm/lib/Target/SparcV8/SparcV8TargetMachine.cpp:1.36 llvm/lib/Target/SparcV8/SparcV8TargetMachine.cpp:1.37 --- llvm/lib/Target/SparcV8/SparcV8TargetMachine.cpp:1.36 Sun Jan 15 01:19:53 2006 +++ llvm/lib/Target/SparcV8/SparcV8TargetMachine.cpp Mon Jan 23 01:20:15 2006 @@ -27,10 +27,6 @@ namespace { // Register the target. RegisterTarget X("sparcv8"," SPARC V8 (experimental)"); - - cl::opt EnableV8DAGDAG("enable-v8-dag-isel", cl::Hidden, - cl::desc("Enable DAG-to-DAG isel for V8"), - cl::init(0)); } /// SparcV8TargetMachine ctor - Create an ILP32 architecture model @@ -83,18 +79,10 @@ if (PrintMachineCode) PM.add(new PrintFunctionPass()); - if (!EnableV8DAGDAG) { - // Replace malloc and free instructions with library calls. - PM.add(createLowerAllocationsPass()); - PM.add(createLowerSelectPass()); - // Make sure that no unreachable blocks are instruction selected. - PM.add(createUnreachableBlockEliminationPass()); - PM.add(createSparcV8SimpleInstructionSelector(*this)); - } else { - // Make sure that no unreachable blocks are instruction selected. - PM.add(createUnreachableBlockEliminationPass()); - PM.add(createSparcV8ISelDag(*this)); - } + // Make sure that no unreachable blocks are instruction selected. + PM.add(createUnreachableBlockEliminationPass()); + + PM.add(createSparcV8ISelDag(*this)); // Print machine instructions as they were initially generated. if (PrintMachineCode) From evan.cheng at apple.com Mon Jan 23 01:21:13 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 23 Jan 2006 01:21:13 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp Message-ID: <200601230721.BAA15395@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/SelectionDAG: ScheduleDAGSimple.cpp updated: 1.2 -> 1.3 --- Log message: Remove a couple of unnecessary #include's --- Diffs of the changes: (+0 -2) ScheduleDAGSimple.cpp | 2 -- 1 files changed, 2 deletions(-) Index: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp diff -u llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp:1.2 llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp:1.3 --- llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp:1.2 Mon Jan 23 01:01:07 2006 +++ llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp Mon Jan 23 01:21:01 2006 @@ -18,9 +18,7 @@ #include "llvm/CodeGen/SelectionDAG.h" #include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetInstrInfo.h" -#include "llvm/Support/CommandLine.h" #include "llvm/Support/Debug.h" -#include using namespace llvm; namespace { From lattner at cs.uiuc.edu Mon Jan 23 01:21:24 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon, 23 Jan 2006 01:21:24 -0600 Subject: [llvm-commits] CVS: llvm/test/Regression/CodeGen/SparcV8/xnor.ll Message-ID: <200601230721.BAA15405@zion.cs.uiuc.edu> Changes in directory llvm/test/Regression/CodeGen/SparcV8: xnor.ll updated: 1.2 -> 1.3 --- Log message: this option is gone, the dag isel is the default now --- Diffs of the changes: (+2 -2) xnor.ll | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/test/Regression/CodeGen/SparcV8/xnor.ll diff -u llvm/test/Regression/CodeGen/SparcV8/xnor.ll:1.2 llvm/test/Regression/CodeGen/SparcV8/xnor.ll:1.3 --- llvm/test/Regression/CodeGen/SparcV8/xnor.ll:1.2 Wed Jan 11 20:50:34 2006 +++ llvm/test/Regression/CodeGen/SparcV8/xnor.ll Mon Jan 23 01:21:12 2006 @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=sparcv8 -enable-v8-dag-isel=true && -; RUN: llvm-as < %s | llc -march=sparcv8 -enable-v8-dag-isel=true | grep xnor | wc -l | grep 2 +; RUN: llvm-as < %s | llc -march=sparcv8 && +; RUN: llvm-as < %s | llc -march=sparcv8 | grep xnor | wc -l | grep 2 int %test1(int %X, int %Y) { %A = xor int %X, %Y From lattner at cs.uiuc.edu Mon Jan 23 01:30:26 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon, 23 Jan 2006 01:30:26 -0600 Subject: [llvm-commits] CVS: llvm/test/Regression/CodeGen/SparcV8/2006-01-22-BitConvertLegalize.ll Message-ID: <200601230730.BAA15489@zion.cs.uiuc.edu> Changes in directory llvm/test/Regression/CodeGen/SparcV8: 2006-01-22-BitConvertLegalize.ll added (r1.1) --- Log message: Testcase that failed due to a legalizer bug --- Diffs of the changes: (+12 -0) 2006-01-22-BitConvertLegalize.ll | 12 ++++++++++++ 1 files changed, 12 insertions(+) Index: llvm/test/Regression/CodeGen/SparcV8/2006-01-22-BitConvertLegalize.ll diff -c /dev/null llvm/test/Regression/CodeGen/SparcV8/2006-01-22-BitConvertLegalize.ll:1.1 *** /dev/null Mon Jan 23 01:30:24 2006 --- llvm/test/Regression/CodeGen/SparcV8/2006-01-22-BitConvertLegalize.ll Mon Jan 23 01:30:14 2006 *************** *** 0 **** --- 1,12 ---- + ; RUN: llvm-as < %s | llc -march=sparcv8 + + void %execute_list() { + %tmp.33.i = div float 0.000000e+00, 0.000000e+00 ; [#uses=1] + %tmp.37.i = mul float 0.000000e+00, %tmp.33.i ; [#uses=1] + %tmp.42.i = add float %tmp.37.i, 0.000000e+00 ; [#uses=1] + call void %gl_EvalCoord1f( float %tmp.42.i ) + ret void + } + + declare void %gl_EvalCoord1f( float) + From lattner at cs.uiuc.edu Mon Jan 23 01:30:57 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon, 23 Jan 2006 01:30:57 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Message-ID: <200601230730.BAA15522@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/SelectionDAG: LegalizeDAG.cpp updated: 1.274 -> 1.275 --- Log message: Fix Regression/CodeGen/SparcV8/2006-01-22-BitConvertLegalize.ll by making sure that the result of expanding a BIT_CONVERT node is itself legalized. --- Diffs of the changes: (+4 -2) LegalizeDAG.cpp | 6 ++++-- 1 files changed, 4 insertions(+), 2 deletions(-) Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.274 llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.275 --- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.274 Fri Jan 20 22:27:00 2006 +++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Mon Jan 23 01:30:46 2006 @@ -2501,14 +2501,16 @@ break; case ISD::BIT_CONVERT: - if (!isTypeLegal(Node->getOperand(0).getValueType())) + if (!isTypeLegal(Node->getOperand(0).getValueType())) { Result = ExpandBIT_CONVERT(Node->getValueType(0), Node->getOperand(0)); - else { + Result = LegalizeOp(Result); + } else { switch (TLI.getOperationAction(ISD::BIT_CONVERT, Node->getOperand(0).getValueType())) { default: assert(0 && "Unknown operation action!"); case TargetLowering::Expand: Result = ExpandBIT_CONVERT(Node->getValueType(0), Node->getOperand(0)); + Result = LegalizeOp(Result); break; case TargetLowering::Legal: Tmp1 = LegalizeOp(Node->getOperand(0)); From reid at x10sys.com Mon Jan 23 01:39:15 2006 From: reid at x10sys.com (Reid Spencer) Date: Mon, 23 Jan 2006 01:39:15 -0600 Subject: [llvm-commits] CVS: llvm/lib/Bytecode/Reader/Reader.cpp Message-ID: <200601230739.BAA15552@zion.cs.uiuc.edu> Changes in directory llvm/lib/Bytecode/Reader: Reader.cpp updated: 1.180 -> 1.181 --- Log message: For PR411: http://llvm.cs.uiuc.edu/PR411 : Don't try to be smart about fixing intrinsic functions when they're read in, just fix them after the module is read when all names are resolved. --- Diffs of the changes: (+5 -14) Reader.cpp | 19 +++++-------------- 1 files changed, 5 insertions(+), 14 deletions(-) Index: llvm/lib/Bytecode/Reader/Reader.cpp diff -u llvm/lib/Bytecode/Reader/Reader.cpp:1.180 llvm/lib/Bytecode/Reader/Reader.cpp:1.181 --- llvm/lib/Bytecode/Reader/Reader.cpp:1.180 Thu Jan 19 01:02:16 2006 +++ llvm/lib/Bytecode/Reader/Reader.cpp Mon Jan 23 01:39:03 2006 @@ -1033,13 +1033,6 @@ BB->getInstList().push_back(Result); - if (this->hasUpgradedIntrinsicFunctions && isCall) - if (Instruction* inst = UpgradeIntrinsicCall(cast(Result))) { - Result->replaceAllUsesWith(inst); - Result->eraseFromParent(); - Result = inst; - } - unsigned TypeSlot; if (Result->getType() == InstTy) TypeSlot = iType; @@ -2032,13 +2025,6 @@ Function *Func = new Function(FTy, GlobalValue::ExternalLinkage, "", TheModule); - // Replace with upgraded intrinsic function, if applicable. - if (Function* upgrdF = UpgradeIntrinsicFunction(Func)) { - hasUpgradedIntrinsicFunctions = true; - Func->eraseFromParent(); - Func = upgrdF; - } - insertValue(Func, (FnSignature & (~0U >> 1)) >> 5, ModuleValues); // Flags are not used yet. @@ -2402,6 +2388,11 @@ // Parse the module contents this->ParseModule(); + // Look for intrinsic functions and CallInst that need to be upgraded + for (Module::iterator FI = TheModule->begin(), FE = TheModule->end(); + FI != FE; ++FI) + UpgradeCallsToIntrinsic(FI); + // Check for missing functions if (hasFunctions()) error("Function expected, but bytecode stream ended!"); From reid at x10sys.com Mon Jan 23 01:42:41 2006 From: reid at x10sys.com (Reid Spencer) Date: Mon, 23 Jan 2006 01:42:41 -0600 Subject: [llvm-commits] CVS: llvm/lib/VMCore/AutoUpgrade.cpp Message-ID: <200601230742.BAA15585@zion.cs.uiuc.edu> Changes in directory llvm/lib/VMCore: AutoUpgrade.cpp updated: 1.6 -> 1.7 --- Log message: For PR411: http://llvm.cs.uiuc.edu/PR411 : No functionality changes, just improve the code by a) providing better function names, b) eliminating a call to get_suffix and c) tightening up a function elimination test to reduce further checking. --- Diffs of the changes: (+6 -7) AutoUpgrade.cpp | 13 ++++++------- 1 files changed, 6 insertions(+), 7 deletions(-) Index: llvm/lib/VMCore/AutoUpgrade.cpp diff -u llvm/lib/VMCore/AutoUpgrade.cpp:1.6 llvm/lib/VMCore/AutoUpgrade.cpp:1.7 --- llvm/lib/VMCore/AutoUpgrade.cpp:1.6 Fri Jan 20 12:04:43 2006 +++ llvm/lib/VMCore/AutoUpgrade.cpp Mon Jan 23 01:42:30 2006 @@ -36,7 +36,7 @@ return 0; } -static inline const Type* get_type(Function* F) { +static inline const Type* getTypeFromFunctionName(Function* F) { // If there's no function, we can't get the argument type. if (!F) return 0; @@ -45,7 +45,7 @@ const std::string& Name = F->getName(); // Quickly eliminate it, if it's not a candidate. - if (Name.length() <= 5 || Name[0] != 'l' || Name[1] != 'l' || Name[2] != + if (Name.length() <= 8 || Name[0] != 'l' || Name[1] != 'l' || Name[2] != 'v' || Name[3] != 'm' || Name[4] != '.') return 0; @@ -109,10 +109,9 @@ // the argument types. Function* llvm::UpgradeIntrinsicFunction(Function* F) { // See if its one of the name's we're interested in. - if (const Type* Ty = get_type(F)) { - const char* suffix = get_suffix(Ty); - if (Ty->isSigned()) - suffix = get_suffix(Ty->getUnsignedVersion()); + if (const Type* Ty = getTypeFromFunctionName(F)) { + const char* suffix = + get_suffix((Ty->isSigned() ? Ty->getUnsignedVersion() : Ty)); assert(suffix && "Intrinsic parameter type not recognized"); const std::string& Name = F->getName(); std::string new_name = Name + suffix; @@ -143,7 +142,7 @@ Instruction* llvm::UpgradeIntrinsicCall(CallInst *CI) { Function *F = CI->getCalledFunction(); - if (const Type* Ty = get_type(F)) { + if (const Type* Ty = getTypeFromFunctionName(F)) { Function* newF = UpgradeIntrinsicFunction(F); std::vector Oprnds; for (User::op_iterator OI = CI->op_begin(), OE = CI->op_end(); From reid at x10sys.com Mon Jan 23 02:11:15 2006 From: reid at x10sys.com (Reid Spencer) Date: Mon, 23 Jan 2006 02:11:15 -0600 Subject: [llvm-commits] CVS: llvm/lib/Bytecode/Reader/Reader.cpp Message-ID: <200601230811.CAA17268@zion.cs.uiuc.edu> Changes in directory llvm/lib/Bytecode/Reader: Reader.cpp updated: 1.181 -> 1.182 --- Log message: Revert last patch because it messes up the JIT, amongst other things. --- Diffs of the changes: (+14 -5) Reader.cpp | 19 ++++++++++++++----- 1 files changed, 14 insertions(+), 5 deletions(-) Index: llvm/lib/Bytecode/Reader/Reader.cpp diff -u llvm/lib/Bytecode/Reader/Reader.cpp:1.181 llvm/lib/Bytecode/Reader/Reader.cpp:1.182 --- llvm/lib/Bytecode/Reader/Reader.cpp:1.181 Mon Jan 23 01:39:03 2006 +++ llvm/lib/Bytecode/Reader/Reader.cpp Mon Jan 23 02:11:03 2006 @@ -1033,6 +1033,13 @@ BB->getInstList().push_back(Result); + if (this->hasUpgradedIntrinsicFunctions && isCall) + if (Instruction* inst = UpgradeIntrinsicCall(cast(Result))) { + Result->replaceAllUsesWith(inst); + Result->eraseFromParent(); + Result = inst; + } + unsigned TypeSlot; if (Result->getType() == InstTy) TypeSlot = iType; @@ -2025,6 +2032,13 @@ Function *Func = new Function(FTy, GlobalValue::ExternalLinkage, "", TheModule); + // Replace with upgraded intrinsic function, if applicable. + if (Function* upgrdF = UpgradeIntrinsicFunction(Func)) { + hasUpgradedIntrinsicFunctions = true; + Func->eraseFromParent(); + Func = upgrdF; + } + insertValue(Func, (FnSignature & (~0U >> 1)) >> 5, ModuleValues); // Flags are not used yet. @@ -2388,11 +2402,6 @@ // Parse the module contents this->ParseModule(); - // Look for intrinsic functions and CallInst that need to be upgraded - for (Module::iterator FI = TheModule->begin(), FE = TheModule->end(); - FI != FE; ++FI) - UpgradeCallsToIntrinsic(FI); - // Check for missing functions if (hasFunctions()) error("Function expected, but bytecode stream ended!"); From reid at x10sys.com Mon Jan 23 02:16:05 2006 From: reid at x10sys.com (Reid Spencer) Date: Mon, 23 Jan 2006 02:16:05 -0600 Subject: [llvm-commits] CVS: llvm/configure Message-ID: <200601230816.CAA18242@zion.cs.uiuc.edu> Changes in directory llvm: configure updated: 1.207 -> 1.208 --- Log message: Update for including additional function tests. --- Diffs of the changes: (+5 -155) configure | 160 +------------------------------------------------------------- 1 files changed, 5 insertions(+), 155 deletions(-) Index: llvm/configure diff -u llvm/configure:1.207 llvm/configure:1.208 --- llvm/configure:1.207 Thu Jan 19 02:31:08 2006 +++ llvm/configure Mon Jan 23 02:15:53 2006 @@ -27045,157 +27045,6 @@ done - - -for ac_header in rw/stdex/hash_map.h rw/stdex/hash_set.h -do -as_ac_Header=`echo "ac_cv_header_$ac_header" | $as_tr_sh` -if eval "test \"\${$as_ac_Header+set}\" = set"; then - echo "$as_me:$LINENO: checking for $ac_header" >&5 -echo $ECHO_N "checking for $ac_header... $ECHO_C" >&6 -if eval "test \"\${$as_ac_Header+set}\" = set"; then - echo $ECHO_N "(cached) $ECHO_C" >&6 -fi -echo "$as_me:$LINENO: result: `eval echo '${'$as_ac_Header'}'`" >&5 -echo "${ECHO_T}`eval echo '${'$as_ac_Header'}'`" >&6 -else - # Is the header compilable? -echo "$as_me:$LINENO: checking $ac_header usability" >&5 -echo $ECHO_N "checking $ac_header usability... $ECHO_C" >&6 -cat >conftest.$ac_ext <<_ACEOF -/* confdefs.h. */ -_ACEOF -cat confdefs.h >>conftest.$ac_ext -cat >>conftest.$ac_ext <<_ACEOF -/* end confdefs.h. */ -$ac_includes_default -#include <$ac_header> -_ACEOF -rm -f conftest.$ac_objext -if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 - (eval $ac_compile) 2>conftest.er1 - ac_status=$? - grep -v '^ *+' conftest.er1 >conftest.err - rm -f conftest.er1 - cat conftest.err >&5 - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && - { ac_try='test -z "$ac_c_werror_flag" - || test ! -s conftest.err' - { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 - (eval $ac_try) 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; } && - { ac_try='test -s conftest.$ac_objext' - { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 - (eval $ac_try) 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; }; then - ac_header_compiler=yes -else - echo "$as_me: failed program was:" >&5 -sed 's/^/| /' conftest.$ac_ext >&5 - -ac_header_compiler=no -fi -rm -f conftest.err conftest.$ac_objext conftest.$ac_ext -echo "$as_me:$LINENO: result: $ac_header_compiler" >&5 -echo "${ECHO_T}$ac_header_compiler" >&6 - -# Is the header present? -echo "$as_me:$LINENO: checking $ac_header presence" >&5 -echo $ECHO_N "checking $ac_header presence... $ECHO_C" >&6 -cat >conftest.$ac_ext <<_ACEOF -/* confdefs.h. */ -_ACEOF -cat confdefs.h >>conftest.$ac_ext -cat >>conftest.$ac_ext <<_ACEOF -/* end confdefs.h. */ -#include <$ac_header> -_ACEOF -if { (eval echo "$as_me:$LINENO: \"$ac_cpp conftest.$ac_ext\"") >&5 - (eval $ac_cpp conftest.$ac_ext) 2>conftest.er1 - ac_status=$? - grep -v '^ *+' conftest.er1 >conftest.err - rm -f conftest.er1 - cat conftest.err >&5 - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } >/dev/null; then - if test -s conftest.err; then - ac_cpp_err=$ac_c_preproc_warn_flag - ac_cpp_err=$ac_cpp_err$ac_c_werror_flag - else - ac_cpp_err= - fi -else - ac_cpp_err=yes -fi -if test -z "$ac_cpp_err"; then - ac_header_preproc=yes -else - echo "$as_me: failed program was:" >&5 -sed 's/^/| /' conftest.$ac_ext >&5 - - ac_header_preproc=no -fi -rm -f conftest.err conftest.$ac_ext -echo "$as_me:$LINENO: result: $ac_header_preproc" >&5 -echo "${ECHO_T}$ac_header_preproc" >&6 - -# So? What about this header? -case $ac_header_compiler:$ac_header_preproc:$ac_c_preproc_warn_flag in - yes:no: ) - { echo "$as_me:$LINENO: WARNING: $ac_header: accepted by the compiler, rejected by the preprocessor!" >&5 -echo "$as_me: WARNING: $ac_header: accepted by the compiler, rejected by the preprocessor!" >&2;} - { echo "$as_me:$LINENO: WARNING: $ac_header: proceeding with the compiler's result" >&5 -echo "$as_me: WARNING: $ac_header: proceeding with the compiler's result" >&2;} - ac_header_preproc=yes - ;; - no:yes:* ) - { echo "$as_me:$LINENO: WARNING: $ac_header: present but cannot be compiled" >&5 -echo "$as_me: WARNING: $ac_header: present but cannot be compiled" >&2;} - { echo "$as_me:$LINENO: WARNING: $ac_header: check for missing prerequisite headers?" >&5 -echo "$as_me: WARNING: $ac_header: check for missing prerequisite headers?" >&2;} - { echo "$as_me:$LINENO: WARNING: $ac_header: see the Autoconf documentation" >&5 -echo "$as_me: WARNING: $ac_header: see the Autoconf documentation" >&2;} - { echo "$as_me:$LINENO: WARNING: $ac_header: section \"Present But Cannot Be Compiled\"" >&5 -echo "$as_me: WARNING: $ac_header: section \"Present But Cannot Be Compiled\"" >&2;} - { echo "$as_me:$LINENO: WARNING: $ac_header: proceeding with the preprocessor's result" >&5 -echo "$as_me: WARNING: $ac_header: proceeding with the preprocessor's result" >&2;} - { echo "$as_me:$LINENO: WARNING: $ac_header: in the future, the compiler will take precedence" >&5 -echo "$as_me: WARNING: $ac_header: in the future, the compiler will take precedence" >&2;} - ( - cat <<\_ASBOX -## ----------------------------------- ## -## Report this to llvmbugs at cs.uiuc.edu ## -## ----------------------------------- ## -_ASBOX - ) | - sed "s/^/$as_me: WARNING: /" >&2 - ;; -esac -echo "$as_me:$LINENO: checking for $ac_header" >&5 -echo $ECHO_N "checking for $ac_header... $ECHO_C" >&6 -if eval "test \"\${$as_ac_Header+set}\" = set"; then - echo $ECHO_N "(cached) $ECHO_C" >&6 -else - eval "$as_ac_Header=\$ac_header_preproc" -fi -echo "$as_me:$LINENO: result: `eval echo '${'$as_ac_Header'}'`" >&5 -echo "${ECHO_T}`eval echo '${'$as_ac_Header'}'`" >&6 - -fi -if test `eval echo '${'$as_ac_Header'}'` = yes; then - cat >>confdefs.h <<_ACEOF -#define `echo "HAVE_$ac_header" | $as_tr_cpp` 1 -_ACEOF - -fi - -done - if test "$ENABLE_THREADS" -eq 1 ; then for ac_header in pthread.h @@ -27827,8 +27676,7 @@ - -for ac_func in backtrace ceil ceilf floor floorf getcwd getpagesize getrusage +for ac_func in backtrace ceilf floorf roundf rintf nearbyintf getcwd do as_ac_var=`echo "ac_cv_func_$ac_func" | $as_tr_sh` echo "$as_me:$LINENO: checking for $ac_func" >&5 @@ -27934,7 +27782,8 @@ -for ac_func in gettimeofday isatty mkdtemp mkstemp mktemp + +for ac_func in getpagesize getrusage gettimeofday isatty mkdtemp mkstemp do as_ac_var=`echo "ac_cv_func_$ac_func" | $as_tr_sh` echo "$as_me:$LINENO: checking for $ac_func" >&5 @@ -28041,7 +27890,8 @@ -for ac_func in realpath sbrk setrlimit strdup strerror strerror_r + +for ac_func in mktemp realpath sbrk setrlimit strdup strerror strerror_r do as_ac_var=`echo "ac_cv_func_$ac_func" | $as_tr_sh` echo "$as_me:$LINENO: checking for $ac_func" >&5 From reid at x10sys.com Mon Jan 23 02:16:06 2006 From: reid at x10sys.com (Reid Spencer) Date: Mon, 23 Jan 2006 02:16:06 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/Config/config.h.in Message-ID: <200601230816.CAA18248@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/Config: config.h.in updated: 1.61 -> 1.62 --- Log message: Update for including additional function tests. --- Diffs of the changes: (+7 -10) config.h.in | 17 +++++++---------- 1 files changed, 7 insertions(+), 10 deletions(-) Index: llvm/include/llvm/Config/config.h.in diff -u llvm/include/llvm/Config/config.h.in:1.61 llvm/include/llvm/Config/config.h.in:1.62 --- llvm/include/llvm/Config/config.h.in:1.61 Thu Jan 19 02:31:08 2006 +++ llvm/include/llvm/Config/config.h.in Mon Jan 23 02:15:53 2006 @@ -51,9 +51,6 @@ /* Does not have bi-directional iterator */ #undef HAVE_BI_ITERATOR -/* Define to 1 if you have the `ceil' function. */ -#undef HAVE_CEIL - /* Define to 1 if you have the `ceilf' function. */ #undef HAVE_CEILF @@ -103,9 +100,6 @@ /* Set to 1 if the finite function is found in */ #undef HAVE_FINITE_IN_IEEEFP_H -/* Define to 1 if you have the `floor' function. */ -#undef HAVE_FLOOR - /* Define to 1 if you have the `floorf' function. */ #undef HAVE_FLOORF @@ -240,6 +234,9 @@ /* Define to 1 if you have the header file, and it defines `DIR'. */ #undef HAVE_NDIR_H +/* Define to 1 if you have the `nearbyintf' function. */ +#undef HAVE_NEARBYINTF + /* Define to 1 if you have the `opendir' function. */ #undef HAVE_OPENDIR @@ -267,11 +264,11 @@ /* Define to 1 if you have the `rindex' function. */ #undef HAVE_RINDEX -/* Define to 1 if you have the header file. */ -#undef HAVE_RW_STDEX_HASH_MAP_H +/* Define to 1 if you have the `rintf' function. */ +#undef HAVE_RINTF -/* Define to 1 if you have the header file. */ -#undef HAVE_RW_STDEX_HASH_SET_H +/* Define to 1 if you have the `roundf' function. */ +#undef HAVE_ROUNDF /* Define to 1 if you have the `sbrk' function. */ #undef HAVE_SBRK From evan.cheng at apple.com Mon Jan 23 02:25:46 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 23 Jan 2006 02:25:46 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp Message-ID: <200601230825.CAA21731@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/SelectionDAG: ScheduleDAGSimple.cpp updated: 1.3 -> 1.4 --- Log message: Minor clean up. --- Diffs of the changes: (+2 -1) ScheduleDAGSimple.cpp | 3 ++- 1 files changed, 2 insertions(+), 1 deletion(-) Index: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp diff -u llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp:1.3 llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp:1.4 --- llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp:1.3 Mon Jan 23 01:21:01 2006 +++ llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp Mon Jan 23 02:25:34 2006 @@ -202,11 +202,12 @@ virtual ~ScheduleDAGSimple() {}; + void Schedule(); + private: static bool isDefiner(NodeInfo *A, NodeInfo *B); void IncludeNode(NodeInfo *NI); void VisitAll(); - void Schedule(); void GatherSchedulingInfo(); void FakeGroupDominators(); bool isStrongDependency(NodeInfo *A, NodeInfo *B); From evan.cheng at apple.com Mon Jan 23 02:26:23 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 23 Jan 2006 02:26:23 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp SelectionDAGISel.cpp Message-ID: <200601230826.CAA21946@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/SelectionDAG: ScheduleDAGList.cpp added (r1.1) SelectionDAGISel.cpp updated: 1.133 -> 1.134 --- Log message: Skeleton of the list schedule. --- Diffs of the changes: (+65 -0) ScheduleDAGList.cpp | 61 +++++++++++++++++++++++++++++++++++++++++++++++++++ SelectionDAGISel.cpp | 4 +++ 2 files changed, 65 insertions(+) Index: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp diff -c /dev/null llvm/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp:1.1 *** /dev/null Mon Jan 23 02:26:20 2006 --- llvm/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp Mon Jan 23 02:26:10 2006 *************** *** 0 **** --- 1,61 ---- + //===-- ScheduleDAGSimple.cpp - Implement a list scheduler for isel DAG ---===// + // + // The LLVM Compiler Infrastructure + // + // This file was developed by Evan Cheng and is distributed under the + // University of Illinois Open Source License. See LICENSE.TXT for details. + // + //===----------------------------------------------------------------------===// + // + // This implements a simple two pass scheduler. The first pass attempts to push + // backward any lengthy instructions and critical paths. The second pass packs + // instructions into semi-optimal time slots. + // + //===----------------------------------------------------------------------===// + + #define DEBUG_TYPE "sched" + #include "llvm/CodeGen/ScheduleDAG.h" + #include "llvm/CodeGen/SelectionDAG.h" + #include "llvm/Target/TargetMachine.h" + #include "llvm/Target/TargetInstrInfo.h" + #include + #include + using namespace llvm; + + + namespace llvm { + /// Sorting functions for ready queue. + struct LSSortPred : public std::binary_function { + bool operator()(const SDOperand* left, const SDOperand* right) const { + return true; + } + }; + + /// ScheduleDAGList - List scheduler. + + class ScheduleDAGList : public ScheduleDAG { + private: + LSSortPred &Cmp; + + // Ready queue + std::priority_queue, LSSortPred> Ready; + + public: + ScheduleDAGList(SelectionDAG &dag, MachineBasicBlock *bb, + const TargetMachine &tm, LSSortPred cmp) + : ScheduleDAG(listSchedulingBURR, dag, bb, tm), Cmp(cmp), Ready(Cmp) + {}; + + void Schedule(); + }; + } // end namespace llvm + + void ScheduleDAGList::Schedule() { + } + + + llvm::ScheduleDAG* + llvm::createBURRListDAGScheduler(SelectionDAG &DAG, + MachineBasicBlock *BB) { + return new ScheduleDAGList(DAG, BB, DAG.getTarget(), LSSortPred()); + } Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.133 llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.134 --- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.133 Mon Jan 23 01:01:07 2006 +++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Mon Jan 23 02:26:10 2006 @@ -69,6 +69,8 @@ clEnumValN(simpleNoItinScheduling, "simple-noitin", "Simple two pass scheduling: Same as simple " "except using generic latency"), + clEnumValN(listSchedulingBURR, "list-BURR", + "Bottom up register reduction list scheduling"), clEnumValEnd)); } // namespace @@ -1775,6 +1777,8 @@ case simpleNoItinScheduling: SL = createSimpleDAGScheduler(ISHeuristic, DAG, BB); break; + case listSchedulingBURR: + SL = createBURRListDAGScheduler(DAG, BB); } BB = SL->Run(); } From evan.cheng at apple.com Mon Jan 23 02:26:23 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 23 Jan 2006 02:26:23 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/ScheduleDAG.h Message-ID: <200601230826.CAA21950@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/CodeGen: ScheduleDAG.h updated: 1.3 -> 1.4 --- Log message: Skeleton of the list schedule. --- Diffs of the changes: (+9 -3) ScheduleDAG.h | 12 +++++++++--- 1 files changed, 9 insertions(+), 3 deletions(-) Index: llvm/include/llvm/CodeGen/ScheduleDAG.h diff -u llvm/include/llvm/CodeGen/ScheduleDAG.h:1.3 llvm/include/llvm/CodeGen/ScheduleDAG.h:1.4 --- llvm/include/llvm/CodeGen/ScheduleDAG.h:1.3 Mon Jan 23 01:01:07 2006 +++ llvm/include/llvm/CodeGen/ScheduleDAG.h Mon Jan 23 02:26:10 2006 @@ -37,9 +37,10 @@ // Scheduling heuristics enum SchedHeuristics { - noScheduling, - simpleScheduling, - simpleNoItinScheduling + noScheduling, // No scheduling, emit breath first sequence. + simpleScheduling, // Two pass, min. critical path, max. utilization. + simpleNoItinScheduling, // Same as above exact using generic latency. + listSchedulingBURR, // Bottom up reg reduction list scheduling. }; @@ -332,6 +333,11 @@ ScheduleDAG* createSimpleDAGScheduler(SchedHeuristics Heuristic, SelectionDAG &DAG, MachineBasicBlock *BB); + + /// createBURRListDAGScheduler - This creates a bottom up register usage + /// reduction list scheduler. + ScheduleDAG* createBURRListDAGScheduler(SelectionDAG &DAG, + MachineBasicBlock *BB); } #endif From jlaskey at apple.com Mon Jan 23 07:34:26 2006 From: jlaskey at apple.com (Jim Laskey) Date: Mon, 23 Jan 2006 07:34:26 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Message-ID: <200601231334.HAA25092@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/SelectionDAG: SelectionDAGISel.cpp updated: 1.134 -> 1.135 --- Log message: Typo. --- Diffs of the changes: (+1 -1) SelectionDAGISel.cpp | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.134 llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.135 --- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.134 Mon Jan 23 02:26:10 2006 +++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Mon Jan 23 07:34:04 2006 @@ -62,7 +62,7 @@ cl::init(noScheduling), cl::values( clEnumValN(noScheduling, "none", - "No scheduling: breath first sequencing"), + "No scheduling: breadth first sequencing"), clEnumValN(simpleScheduling, "simple", "Simple two pass scheduling: minimize critical path " "and maximize processor utilization"), From lattner at cs.uiuc.edu Mon Jan 23 12:56:59 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon, 23 Jan 2006 12:56:59 -0600 Subject: [llvm-commits] CVS: llvm-test/SingleSource/UnitTests/2006-01-23-InitializedBitField.c Message-ID: <200601231856.MAA07665@zion.cs.uiuc.edu> Changes in directory llvm-test/SingleSource/UnitTests: 2006-01-23-InitializedBitField.c added (r1.1) --- Log message: new test for craziness bitfield layouts and static initialization thereof. The old llvm-gcc front-end crashes on this, but the new one does it right. --- Diffs of the changes: (+97 -0) 2006-01-23-InitializedBitField.c | 97 +++++++++++++++++++++++++++++++++++++++ 1 files changed, 97 insertions(+) Index: llvm-test/SingleSource/UnitTests/2006-01-23-InitializedBitField.c diff -c /dev/null llvm-test/SingleSource/UnitTests/2006-01-23-InitializedBitField.c:1.1 *** /dev/null Mon Jan 23 12:56:47 2006 --- llvm-test/SingleSource/UnitTests/2006-01-23-InitializedBitField.c Mon Jan 23 12:56:36 2006 *************** *** 0 **** --- 1,97 ---- + #include + + // Test that static initializers for things with bitfields work. + + struct S0 { + unsigned int A:2; + unsigned short B:3; + unsigned C:24; + } s0 = { 2, 7, 123479 }; + + struct S1 { + float F; + int A : 31; + int B : 1; + long long C : 31; + } s1 = { 123.456f, 12 }; + + struct S2 { + int A : 31; + int B : 2; + long long C : 31; + } s2 = { 123456, -1, 45123 }; + + struct S3 { + int A; + long long B : 31; + int C : 4; + } s3 = { 4567812, -123, 2 }; + + struct S4 { + short A; + int B : 16; + } s4 = { 0x1234, 0x5678 }; + + struct S5 { + short A; + long long B : 48; + } s5 = { 0x1234, 0x56789ABCDE1LL}; + + struct S6 { + int A : 31; + int B : 1; + long long C : 31; + long long D : 2; + } s6 = { 1243, -1, 24112412, 3}; + + struct S7 { + _Bool D : 8; + _Bool D2 : 8; + int D3 : 8; + long long : 9; + float B; + } s7 = { 1, 0, 123, 1.023f }; + + struct S8 { + int A : 31; + int B : 1; + long long C : 31; + long long D : 34; + long long E : 2; + } s8 = { 123412312, 0, 1231231241, 12312312312LL, 1 }; + + struct S9 { + int A : 31; + int B : 2; + long long C : 31; + } s9 = {12312412, 1, 123123124 }; + + struct S10 { + _Bool D : 8; + _Bool D2 : 8; + int D3 : 15; + long long : 9; + int B; + } s10 = { 1, 0, 21321, 44444 }; + + struct S11 { + _Bool D : 8; + int : 0; + int B; + } s11 = { 1, 3}; + + int main() { + printf("s0 = %d, %d, %d\n", s0.A, s0.B, s0.C); + printf("s1 = %f, %d, %d, %d\n", s1.F, s1.A, s1.B, (int)s1.C); + printf("s2 = %d, %d, %d\n", s2.A, s2.B, (int)s2.C); + printf("s3 = %d, %d, %d\n", s3.A, (int)s3.B, s3.C); + printf("s4 = %d, %d\n", s4.A, s4.B); + printf("s5 = %d %lld\n", s5.A, s5.B); + printf("s6 = %d, %d, %d, %d\n", s6.A, s6.B, (int)s6.C, (int)s6.D); + printf("s7 = %d, %d, %d, %f\n", s7.D, s7.D2, (int)s7.D3, s7.B); + printf("s8 = %d, %d, %d, %lld, %d\n", s8.A, s8.B, (int)s8.C, (long long)s8.D, + s8.E); + printf("s9 = %d, %d, %d\n", s9.A, s9.B, (int)s9.C); + printf("s10 = %d, %d, %d, %d\n", s10.D, s10.D2, s10.D3, s10.B); + printf("s11 = %d, %d\n", s11.D, s11.B); + } From lattner at cs.uiuc.edu Mon Jan 23 13:43:36 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon, 23 Jan 2006 13:43:36 -0600 Subject: [llvm-commits] CVS: llvm-test/SingleSource/UnitTests/2006-01-23-InitializedBitField.c Message-ID: <200601231943.NAA09479@zion.cs.uiuc.edu> Changes in directory llvm-test/SingleSource/UnitTests: 2006-01-23-InitializedBitField.c updated: 1.1 -> 1.2 --- Log message: Add some new testcases from bugzilla bugs --- Diffs of the changes: (+17 -0) 2006-01-23-InitializedBitField.c | 17 +++++++++++++++++ 1 files changed, 17 insertions(+) Index: llvm-test/SingleSource/UnitTests/2006-01-23-InitializedBitField.c diff -u llvm-test/SingleSource/UnitTests/2006-01-23-InitializedBitField.c:1.1 llvm-test/SingleSource/UnitTests/2006-01-23-InitializedBitField.c:1.2 --- llvm-test/SingleSource/UnitTests/2006-01-23-InitializedBitField.c:1.1 Mon Jan 23 12:56:36 2006 +++ llvm-test/SingleSource/UnitTests/2006-01-23-InitializedBitField.c Mon Jan 23 13:43:24 2006 @@ -1,4 +1,5 @@ #include +// PR269, PR285 // Test that static initializers for things with bitfields work. @@ -80,6 +81,19 @@ int B; } s11 = { 1, 3}; +struct S12 { // PR269 + unsigned long long A: 33; + unsigned long long B: 40; + unsigned long long C: 41; +} s12 = { 0x1FFFFFFFFULL, 0, 1000000 }; + +struct S13 { // PR285 + unsigned A:1; + char B[4096 +1]; + int C; +} s13 = { 1, "hello S13 world", 12314 }; + + int main() { printf("s0 = %d, %d, %d\n", s0.A, s0.B, s0.C); printf("s1 = %f, %d, %d, %d\n", s1.F, s1.A, s1.B, (int)s1.C); @@ -94,4 +108,7 @@ printf("s9 = %d, %d, %d\n", s9.A, s9.B, (int)s9.C); printf("s10 = %d, %d, %d, %d\n", s10.D, s10.D2, s10.D3, s10.B); printf("s11 = %d, %d\n", s11.D, s11.B); + printf("s12 = %lld, %lld, %lld\n", (long long) s12.A, (long long) s12.B, + (long long)s12.C); + printf("s13 = %d, %s, %d\n", s13.A, s13.B, s13.C); } From alenhar2 at cs.uiuc.edu Mon Jan 23 14:59:10 2006 From: alenhar2 at cs.uiuc.edu (Andrew Lenharth) Date: Mon, 23 Jan 2006 14:59:10 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/SelectionDAG.h SelectionDAGNodes.h Message-ID: <200601232059.OAA04715@apoc.cs.uiuc.edu> Changes in directory llvm/include/llvm/CodeGen: SelectionDAG.h updated: 1.85 -> 1.86 SelectionDAGNodes.h updated: 1.90 -> 1.91 --- Log message: another selectto --- Diffs of the changes: (+22 -0) SelectionDAG.h | 4 ++++ SelectionDAGNodes.h | 18 ++++++++++++++++++ 2 files changed, 22 insertions(+) Index: llvm/include/llvm/CodeGen/SelectionDAG.h diff -u llvm/include/llvm/CodeGen/SelectionDAG.h:1.85 llvm/include/llvm/CodeGen/SelectionDAG.h:1.86 --- llvm/include/llvm/CodeGen/SelectionDAG.h:1.85 Mon Jan 16 18:32:38 2006 +++ llvm/include/llvm/CodeGen/SelectionDAG.h Mon Jan 23 14:58:48 2006 @@ -314,6 +314,10 @@ SDOperand SelectNodeTo(SDNode *N, unsigned TargetOpc, MVT::ValueType VT, SDOperand Op1, SDOperand Op2, SDOperand Op3, SDOperand Op4, SDOperand Op5, SDOperand Op6); + SDOperand SelectNodeTo(SDNode *N, unsigned TargetOpc, MVT::ValueType VT, + SDOperand Op1, SDOperand Op2, SDOperand Op3, + SDOperand Op4, SDOperand Op5, SDOperand Op6, + SDOperand Op7); SDOperand SelectNodeTo(SDNode *N, unsigned TargetOpc, MVT::ValueType VT1, MVT::ValueType VT2, SDOperand Op1, SDOperand Op2); SDOperand SelectNodeTo(SDNode *N, unsigned TargetOpc, MVT::ValueType VT1, Index: llvm/include/llvm/CodeGen/SelectionDAGNodes.h diff -u llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.90 llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.91 --- llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.90 Thu Jan 12 20:39:03 2006 +++ llvm/include/llvm/CodeGen/SelectionDAGNodes.h Mon Jan 23 14:58:48 2006 @@ -839,6 +839,24 @@ Op2.Val->Uses.push_back(this); Op3.Val->Uses.push_back(this); Op4.Val->Uses.push_back(this); Op5.Val->Uses.push_back(this); } + void setOperands(SDOperand Op0, SDOperand Op1, SDOperand Op2, SDOperand Op3, + SDOperand Op4, SDOperand Op5, SDOperand Op6) { + assert(NumOperands == 0 && "Should not have operands yet!"); + OperandList = new SDOperand[7]; + OperandList[0] = Op0; + OperandList[1] = Op1; + OperandList[2] = Op2; + OperandList[3] = Op3; + OperandList[4] = Op4; + OperandList[5] = Op5; + OperandList[6] = Op6; + NumOperands = 7; + Op0.Val->Uses.push_back(this); Op1.Val->Uses.push_back(this); + Op2.Val->Uses.push_back(this); Op3.Val->Uses.push_back(this); + Op4.Val->Uses.push_back(this); Op5.Val->Uses.push_back(this); + Op6.Val->Uses.push_back(this); + } + void addUser(SDNode *User) { Uses.push_back(User); } From alenhar2 at cs.uiuc.edu Mon Jan 23 14:59:27 2006 From: alenhar2 at cs.uiuc.edu (Andrew Lenharth) Date: Mon, 23 Jan 2006 14:59:27 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Message-ID: <200601232059.OAA04728@apoc.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/SelectionDAG: SelectionDAG.cpp updated: 1.240 -> 1.241 --- Log message: another selectto --- Diffs of the changes: (+23 -0) SelectionDAG.cpp | 23 +++++++++++++++++++++++ 1 files changed, 23 insertions(+) Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.240 llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.241 --- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.240 Mon Jan 16 02:07:10 2006 +++ llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Mon Jan 23 14:59:12 2006 @@ -1649,6 +1649,29 @@ return SDOperand(N, 0); } +SDOperand SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc, + MVT::ValueType VT, SDOperand Op1, + SDOperand Op2, SDOperand Op3,SDOperand Op4, + SDOperand Op5, SDOperand Op6, + SDOperand Op7) { + // If an identical node already exists, use it. + std::vector OpList; + OpList.push_back(Op1); OpList.push_back(Op2); OpList.push_back(Op3); + OpList.push_back(Op4); OpList.push_back(Op5); OpList.push_back(Op6); + OpList.push_back(Op7); + SDNode *&ON = OneResultNodes[std::make_pair(ISD::BUILTIN_OP_END+TargetOpc, + std::make_pair(VT, OpList))]; + if (ON) return SDOperand(ON, 0); + + RemoveNodeFromCSEMaps(N); + N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc); + N->setValueTypes(VT); + N->setOperands(Op1, Op2, Op3, Op4, Op5, Op6, Op7); + + ON = N; // Memoize the new node. + return SDOperand(N, 0); +} + SDOperand SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc, MVT::ValueType VT1, MVT::ValueType VT2, SDOperand Op1, SDOperand Op2) { From alenhar2 at cs.uiuc.edu Mon Jan 23 15:00:07 2006 From: alenhar2 at cs.uiuc.edu (Andrew Lenharth) Date: Mon, 23 Jan 2006 15:00:07 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaISelLowering.cpp AlphaISelLowering.h AlphaInstrInfo.td Message-ID: <200601232100.PAA04745@apoc.cs.uiuc.edu> Changes in directory llvm/lib/Target/Alpha: AlphaISelLowering.cpp updated: 1.24 -> 1.25 AlphaISelLowering.h updated: 1.9 -> 1.10 AlphaInstrInfo.td updated: 1.104 -> 1.105 --- Log message: yea, lowering this stuff will basically work --- Diffs of the changes: (+154 -11) AlphaISelLowering.cpp | 108 +++++++++++++++++++++++++++++++++++++++++++++++++- AlphaISelLowering.h | 3 + AlphaInstrInfo.td | 54 ++++++++++++++++++++----- 3 files changed, 154 insertions(+), 11 deletions(-) Index: llvm/lib/Target/Alpha/AlphaISelLowering.cpp diff -u llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.24 llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.25 --- llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.24 Thu Jan 19 15:10:38 2006 +++ llvm/lib/Target/Alpha/AlphaISelLowering.cpp Mon Jan 23 14:59:50 2006 @@ -20,6 +20,7 @@ #include "llvm/CodeGen/SSARegMap.h" #include "llvm/Constants.h" #include "llvm/Function.h" +#include "llvm/Module.h" #include "llvm/Support/CommandLine.h" #include @@ -68,6 +69,12 @@ setOperationAction(ISD::TRUNCSTORE, MVT::i1, Promote); + if (EnableAlphaLSMark) { + setOperationAction(ISD::LOAD, MVT::i64, Custom); + setOperationAction(ISD::LOAD, MVT::f64, Custom); + setOperationAction(ISD::LOAD, MVT::f32, Custom); + } + setOperationAction(ISD::FREM, MVT::f32, Expand); setOperationAction(ISD::FREM, MVT::f64, Expand); @@ -145,6 +152,12 @@ case AlphaISD::RelLit: return "Alpha::RelLit"; case AlphaISD::GlobalBaseReg: return "Alpha::GlobalBaseReg"; case AlphaISD::DivCall: return "Alpha::DivCall"; + case AlphaISD::LDQ_: return "Alpha::LDQ_"; + case AlphaISD::LDT_: return "Alpha::LDT_"; + case AlphaISD::LDS_: return "Alpha::LDS_"; + case AlphaISD::LDL_: return "Alpha::LDL_"; + case AlphaISD::LDWU_: return "Alpha::LDWU_"; + case AlphaISD::LDBU_: return "Alpha::LDBU_"; } } @@ -396,7 +409,6 @@ return std::make_pair(Result, Update); } - SDOperand AlphaTargetLowering:: LowerVACopy(SDOperand Chain, SDOperand SrcP, Value *SrcV, SDOperand DestP, Value *DestV, SelectionDAG &DAG) { @@ -425,6 +437,53 @@ } + +static void getValueInfo(const Value* v, int& type, int& fun, int& offset) +{ + fun = type = offset = 0; + if (v == NULL) { + type = 0; + } else if (const GlobalValue* GV = dyn_cast(v)) { + type = 1; + const Module* M = GV->getParent(); + for(Module::const_global_iterator ii = M->global_begin(); &*ii != GV; ++ii) + ++offset; + } else if (const Argument* Arg = dyn_cast(v)) { + type = 2; + const Function* F = Arg->getParent(); + const Module* M = F->getParent(); + for(Module::const_iterator ii = M->begin(); &*ii != F; ++ii) + ++fun; + for(Function::const_arg_iterator ii = F->arg_begin(); &*ii != Arg; ++ii) + ++offset; + } else if (const Instruction* I = dyn_cast(v)) { + assert(dyn_cast(I->getType())); + type = 3; + const BasicBlock* bb = I->getParent(); + const Function* F = bb->getParent(); + const Module* M = F->getParent(); + for(Module::const_iterator ii = M->begin(); &*ii != F; ++ii) + ++fun; + for(Function::const_iterator ii = F->begin(); &*ii != bb; ++ii) + offset += ii->size(); + for(BasicBlock::const_iterator ii = bb->begin(); &*ii != I; ++ii) + ++offset; + } else if (const Constant* C = dyn_cast(v)) { + //Don't know how to look these up yet + type = 0; + } else { + assert(0 && "Error in value marking"); + } + //type = 4: register spilling + //type = 5: global address loading or constant loading +} + +static int getUID() +{ + static int id = 0; + return ++id; +} + /// LowerOperation - Provide custom lowering hooks for some operations. /// SDOperand AlphaTargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) { @@ -516,6 +575,53 @@ } break; + case ISD::LOAD: + case ISD::SEXTLOAD: + case ISD::ZEXTLOAD: + { + SDOperand Chain = Op.getOperand(0); + SDOperand Address = Op.getOperand(1); + + unsigned Opc; + unsigned opcode = Op.getOpcode(); + + if (opcode == ISD::LOAD) + switch (Op.Val->getValueType(0)) { + default: Op.Val->dump(); assert(0 && "Bad load!"); + case MVT::i64: Opc = AlphaISD::LDQ_; break; + case MVT::f64: Opc = AlphaISD::LDT_; break; + case MVT::f32: Opc = AlphaISD::LDS_; break; + } + else + switch (cast(Op.getOperand(3))->getVT()) { + default: Op.Val->dump(); assert(0 && "Bad sign extend!"); + case MVT::i32: Opc = AlphaISD::LDL_; + assert(opcode != ISD::ZEXTLOAD && "Not sext"); break; + case MVT::i16: Opc = AlphaISD::LDWU_; + assert(opcode != ISD::SEXTLOAD && "Not zext"); break; + case MVT::i1: //FIXME: Treat i1 as i8 since there are problems otherwise + case MVT::i8: Opc = AlphaISD::LDBU_; + assert(opcode != ISD::SEXTLOAD && "Not zext"); break; + } + + int i, j, k; + getValueInfo(dyn_cast(Op.getOperand(2))->getValue(), i, j, k); + + SDOperand Zero = DAG.getConstant(0, MVT::i64); + std::vector VTS; + VTS.push_back(Op.Val->getValueType(0)); + VTS.push_back(MVT::Other); + std::vector ARGS; + ARGS.push_back(Zero); + ARGS.push_back(Address); + ARGS.push_back(DAG.getConstant(i, MVT::i64)); + ARGS.push_back(DAG.getConstant(j, MVT::i64)); + ARGS.push_back(DAG.getConstant(k, MVT::i64)); + ARGS.push_back(DAG.getConstant(getUID(), MVT::i64)); + ARGS.push_back(Chain); + return DAG.getNode(Opc, VTS, ARGS); + } + } return SDOperand(); Index: llvm/lib/Target/Alpha/AlphaISelLowering.h diff -u llvm/lib/Target/Alpha/AlphaISelLowering.h:1.9 llvm/lib/Target/Alpha/AlphaISelLowering.h:1.10 --- llvm/lib/Target/Alpha/AlphaISelLowering.h:1.9 Mon Jan 16 13:53:25 2006 +++ llvm/lib/Target/Alpha/AlphaISelLowering.h Mon Jan 23 14:59:50 2006 @@ -41,6 +41,9 @@ /// DIVCALL - used for special library calls for div and rem DivCall, + ///LD, ST + LDQ_, LDT_, LDS_, LDL_, LDWU_, LDBU_, + }; } Index: llvm/lib/Target/Alpha/AlphaInstrInfo.td diff -u llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.104 llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.105 --- llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.104 Thu Jan 19 15:10:38 2006 +++ llvm/lib/Target/Alpha/AlphaInstrInfo.td Mon Jan 23 14:59:50 2006 @@ -19,15 +19,24 @@ def SDTFPUnaryOpUnC : SDTypeProfile<1, 1, [ SDTCisFP<1>, SDTCisFP<0> ]>; - -def Alpha_itoft : SDNode<"AlphaISD::ITOFT_", SDTIntToFPOp, []>; -def Alpha_ftoit : SDNode<"AlphaISD::FTOIT_", SDTFPToIntOp, []>; -def Alpha_cvtqt : SDNode<"AlphaISD::CVTQT_", SDTFPUnaryOpUnC, []>; -def Alpha_cvtqs : SDNode<"AlphaISD::CVTQS_", SDTFPUnaryOpUnC, []>; -def Alpha_cvttq : SDNode<"AlphaISD::CVTTQ_", SDTFPUnaryOp, []>; -def Alpha_gprello : SDNode<"AlphaISD::GPRelLo", SDTIntBinOp, []>; -def Alpha_gprelhi : SDNode<"AlphaISD::GPRelHi", SDTIntBinOp, []>; -def Alpha_rellit : SDNode<"AlphaISD::RelLit", SDTIntBinOp, []>; +def SDTLoadA : SDTypeProfile<1, 6, [ // load + SDTCisInt<1>, SDTCisPtrTy<2>, SDTCisInt<3>, SDTCisInt<4>, SDTCisInt<5>, SDTCisInt<6> +]>; + +def Alpha_itoft : SDNode<"AlphaISD::ITOFT_", SDTIntToFPOp, []>; +def Alpha_ftoit : SDNode<"AlphaISD::FTOIT_", SDTFPToIntOp, []>; +def Alpha_cvtqt : SDNode<"AlphaISD::CVTQT_", SDTFPUnaryOpUnC, []>; +def Alpha_cvtqs : SDNode<"AlphaISD::CVTQS_", SDTFPUnaryOpUnC, []>; +def Alpha_cvttq : SDNode<"AlphaISD::CVTTQ_" , SDTFPUnaryOp, []>; +def Alpha_gprello : SDNode<"AlphaISD::GPRelLo", SDTIntBinOp, []>; +def Alpha_gprelhi : SDNode<"AlphaISD::GPRelHi", SDTIntBinOp, []>; +def Alpha_rellit : SDNode<"AlphaISD::RelLit", SDTIntBinOp, []>; +def Alpha_ldq : SDNode<"AlphaISD::LDQ_", SDTLoadA, [SDNPInFlag]>; +def Alpha_ldt : SDNode<"AlphaISD::LDT_", SDTLoadA, [SDNPInFlag]>; +def Alpha_lds : SDNode<"AlphaISD::LDS_", SDTLoadA, [SDNPInFlag]>; +def Alpha_ldl : SDNode<"AlphaISD::LDL_", SDTLoadA, [SDNPInFlag]>; +def Alpha_ldwu : SDNode<"AlphaISD::LDWU_", SDTLoadA, [SDNPInFlag]>; +def Alpha_ldbu : SDNode<"AlphaISD::LDBU_", SDTLoadA, [SDNPInFlag]>; // These are target-independent nodes, but have target-specific formats. def SDT_AlphaCallSeq : SDTypeProfile<0, 1, [ SDTCisVT<0, i64> ]>; @@ -114,8 +123,9 @@ } def ALTENT : PseudoInstAlpha<(ops s64imm:$TARGET), "$$$TARGET..ng:\n", []>; def PCLABEL : PseudoInstAlpha<(ops s64imm:$num), "PCMARKER_$num:\n",[]>; +let noResults = 1 in def MEMLABEL : PseudoInstAlpha<(ops s64imm:$i, s64imm:$j, s64imm:$k, s64imm:$m), - "LSMARKER$$$i$$$j$$$k$$$m:\n",[]>; + "LSMARKER$$$i$$$j$$$k$$$m:", []>; @@ -569,6 +579,30 @@ def : Pat<(Alpha_rellit texternalsym:$ext, GPRC:$RB), (LDQl texternalsym:$ext, GPRC:$RB)>; + +let OperandList = (ops GPRC:$RA, s64imm:$DISP, GPRC:$RB, + s64imm:$i, s64imm:$j, s64imm:$k, s64imm:$m) in { +def LDQlbl : MForm<0x29, 0, 1, "LSMARKER$$$i$$$j$$$k$$$m:\n\t ldq $RA,$DISP($RB)", + [(set GPRC:$RA, (Alpha_ldq imm:$DISP, GPRC:$RB, imm:$i, imm:$j, imm:$k, imm:$m))]>; +} + +let OperandList = (ops F8RC:$RA, s64imm:$DISP, GPRC:$RB, + s64imm:$i, s64imm:$j, s64imm:$k, s64imm:$m) in +def LDTlbl : MForm<0x29, 0, 1, "LSMARKER$$$i$$$j$$$k$$$m:\n\t ldt $RA,$DISP($RB)", + [(set F8RC:$RA, (Alpha_ldt imm:$DISP, GPRC:$RB, imm:$i, imm:$j, imm:$k, imm:$m))]>; + +let OperandList = (ops F4RC:$RA, s64imm:$DISP, GPRC:$RB, + s64imm:$i, s64imm:$j, s64imm:$k, s64imm:$m) in +def LDSlbl : MForm<0x29, 0, 1, "LSMARKER$$$i$$$j$$$k$$$m:\n\t lds $RA,$DISP($RB)", + [(set F4RC:$RA, (Alpha_lds imm:$DISP, GPRC:$RB, imm:$i, imm:$j, imm:$k, imm:$m))]>; + +//def LDLlbl : MForm<0x29, 0, 1, "ldl $RA,$DISP($RB)", +// [(set GPRC:$RA, (sextload (add GPRC:$RB, immSExt16:$DISP), i32))]>; +//def LDBUlbl : MForm<0x0A, 0, 1, "ldbu $RA,$DISP($RB)", +// [(set GPRC:$RA, (zextload (add GPRC:$RB, immSExt16:$DISP), i8))]>; +//def LDWUlbl : MForm<0x0C, 0, 1, "ldwu $RA,$DISP($RB)", +// [(set GPRC:$RA, (zextload (add GPRC:$RB, immSExt16:$DISP), i16))]>; + def RPCC : MfcForm<0x18, 0xC000, "rpcc $RA">; //Read process cycle counter //Basic Floating point ops From alenhar2 at cs.uiuc.edu Mon Jan 23 15:23:42 2006 From: alenhar2 at cs.uiuc.edu (Andrew Lenharth) Date: Mon, 23 Jan 2006 15:23:42 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaISelLowering.cpp AlphaInstrInfo.td Message-ID: <200601232123.PAA04865@apoc.cs.uiuc.edu> Changes in directory llvm/lib/Target/Alpha: AlphaISelLowering.cpp updated: 1.25 -> 1.26 AlphaInstrInfo.td updated: 1.105 -> 1.106 --- Log message: fix up more lsmark stuff --- Diffs of the changes: (+22 -15) AlphaISelLowering.cpp | 11 ++++++++++- AlphaInstrInfo.td | 26 ++++++++++++-------------- 2 files changed, 22 insertions(+), 15 deletions(-) Index: llvm/lib/Target/Alpha/AlphaISelLowering.cpp diff -u llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.25 llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.26 --- llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.25 Mon Jan 23 14:59:50 2006 +++ llvm/lib/Target/Alpha/AlphaISelLowering.cpp Mon Jan 23 15:23:26 2006 @@ -73,6 +73,14 @@ setOperationAction(ISD::LOAD, MVT::i64, Custom); setOperationAction(ISD::LOAD, MVT::f64, Custom); setOperationAction(ISD::LOAD, MVT::f32, Custom); + + setOperationAction(ISD::ZEXTLOAD, MVT::i8, Custom); + setOperationAction(ISD::ZEXTLOAD, MVT::i16, Custom); + setOperationAction(ISD::SEXTLOAD, MVT::i32, Custom); + + setOperationAction(ISD::EXTLOAD, MVT::i8, Custom); + setOperationAction(ISD::EXTLOAD, MVT::i16, Custom); + setOperationAction(ISD::EXTLOAD, MVT::i32, Custom); } setOperationAction(ISD::FREM, MVT::f32, Expand); @@ -578,6 +586,7 @@ case ISD::LOAD: case ISD::SEXTLOAD: case ISD::ZEXTLOAD: + case ISD::EXTLOAD: { SDOperand Chain = Op.getOperand(0); SDOperand Address = Op.getOperand(1); @@ -612,13 +621,13 @@ VTS.push_back(Op.Val->getValueType(0)); VTS.push_back(MVT::Other); std::vector ARGS; + ARGS.push_back(Chain); ARGS.push_back(Zero); ARGS.push_back(Address); ARGS.push_back(DAG.getConstant(i, MVT::i64)); ARGS.push_back(DAG.getConstant(j, MVT::i64)); ARGS.push_back(DAG.getConstant(k, MVT::i64)); ARGS.push_back(DAG.getConstant(getUID(), MVT::i64)); - ARGS.push_back(Chain); return DAG.getNode(Opc, VTS, ARGS); } Index: llvm/lib/Target/Alpha/AlphaInstrInfo.td diff -u llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.105 llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.106 --- llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.105 Mon Jan 23 14:59:50 2006 +++ llvm/lib/Target/Alpha/AlphaInstrInfo.td Mon Jan 23 15:23:26 2006 @@ -31,12 +31,12 @@ def Alpha_gprello : SDNode<"AlphaISD::GPRelLo", SDTIntBinOp, []>; def Alpha_gprelhi : SDNode<"AlphaISD::GPRelHi", SDTIntBinOp, []>; def Alpha_rellit : SDNode<"AlphaISD::RelLit", SDTIntBinOp, []>; -def Alpha_ldq : SDNode<"AlphaISD::LDQ_", SDTLoadA, [SDNPInFlag]>; -def Alpha_ldt : SDNode<"AlphaISD::LDT_", SDTLoadA, [SDNPInFlag]>; -def Alpha_lds : SDNode<"AlphaISD::LDS_", SDTLoadA, [SDNPInFlag]>; -def Alpha_ldl : SDNode<"AlphaISD::LDL_", SDTLoadA, [SDNPInFlag]>; -def Alpha_ldwu : SDNode<"AlphaISD::LDWU_", SDTLoadA, [SDNPInFlag]>; -def Alpha_ldbu : SDNode<"AlphaISD::LDBU_", SDTLoadA, [SDNPInFlag]>; +def Alpha_ldq : SDNode<"AlphaISD::LDQ_", SDTLoadA, [SDNPHasChain]>; +def Alpha_ldt : SDNode<"AlphaISD::LDT_", SDTLoadA, [SDNPHasChain]>; +def Alpha_lds : SDNode<"AlphaISD::LDS_", SDTLoadA, [SDNPHasChain]>; +def Alpha_ldl : SDNode<"AlphaISD::LDL_", SDTLoadA, [SDNPHasChain]>; +def Alpha_ldwu : SDNode<"AlphaISD::LDWU_", SDTLoadA, [SDNPHasChain]>; +def Alpha_ldbu : SDNode<"AlphaISD::LDBU_", SDTLoadA, [SDNPHasChain]>; // These are target-independent nodes, but have target-specific formats. def SDT_AlphaCallSeq : SDTypeProfile<0, 1, [ SDTCisVT<0, i64> ]>; @@ -123,7 +123,6 @@ } def ALTENT : PseudoInstAlpha<(ops s64imm:$TARGET), "$$$TARGET..ng:\n", []>; def PCLABEL : PseudoInstAlpha<(ops s64imm:$num), "PCMARKER_$num:\n",[]>; -let noResults = 1 in def MEMLABEL : PseudoInstAlpha<(ops s64imm:$i, s64imm:$j, s64imm:$k, s64imm:$m), "LSMARKER$$$i$$$j$$$k$$$m:", []>; @@ -584,6 +583,12 @@ s64imm:$i, s64imm:$j, s64imm:$k, s64imm:$m) in { def LDQlbl : MForm<0x29, 0, 1, "LSMARKER$$$i$$$j$$$k$$$m:\n\t ldq $RA,$DISP($RB)", [(set GPRC:$RA, (Alpha_ldq imm:$DISP, GPRC:$RB, imm:$i, imm:$j, imm:$k, imm:$m))]>; +def LDLlbl : MForm<0x29, 0, 1, "LSMARKER$$$i$$$j$$$k$$$m:\n\t ldl $RA,$DISP($RB)", + [(set GPRC:$RA, (Alpha_ldl imm:$DISP, GPRC:$RB, imm:$i, imm:$j, imm:$k, imm:$m))]>; +def LDBUlbl : MForm<0x0A, 0, 1, "LSMARKER$$$i$$$j$$$k$$$m:\n\t ldbu $RA,$DISP($RB)", + [(set GPRC:$RA, (Alpha_ldwu imm:$DISP, GPRC:$RB, imm:$i, imm:$j, imm:$k, imm:$m))]>; +def LDWUlbl : MForm<0x0C, 0, 1, "LSMARKER$$$i$$$j$$$k$$$m:\n\t ldwu $RA,$DISP($RB)", + [(set GPRC:$RA, (Alpha_ldbu imm:$DISP, GPRC:$RB, imm:$i, imm:$j, imm:$k, imm:$m))]>; } let OperandList = (ops F8RC:$RA, s64imm:$DISP, GPRC:$RB, @@ -596,13 +601,6 @@ def LDSlbl : MForm<0x29, 0, 1, "LSMARKER$$$i$$$j$$$k$$$m:\n\t lds $RA,$DISP($RB)", [(set F4RC:$RA, (Alpha_lds imm:$DISP, GPRC:$RB, imm:$i, imm:$j, imm:$k, imm:$m))]>; -//def LDLlbl : MForm<0x29, 0, 1, "ldl $RA,$DISP($RB)", -// [(set GPRC:$RA, (sextload (add GPRC:$RB, immSExt16:$DISP), i32))]>; -//def LDBUlbl : MForm<0x0A, 0, 1, "ldbu $RA,$DISP($RB)", -// [(set GPRC:$RA, (zextload (add GPRC:$RB, immSExt16:$DISP), i8))]>; -//def LDWUlbl : MForm<0x0C, 0, 1, "ldwu $RA,$DISP($RB)", -// [(set GPRC:$RA, (zextload (add GPRC:$RB, immSExt16:$DISP), i16))]>; - def RPCC : MfcForm<0x18, 0xC000, "rpcc $RA">; //Read process cycle counter //Basic Floating point ops From alenhar2 at cs.uiuc.edu Mon Jan 23 15:51:30 2006 From: alenhar2 at cs.uiuc.edu (Andrew Lenharth) Date: Mon, 23 Jan 2006 15:51:30 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Message-ID: <200601232151.PAA04897@apoc.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/SelectionDAG: SelectionDAG.cpp updated: 1.241 -> 1.242 --- Log message: another couple selects --- Diffs of the changes: (+22 -0) SelectionDAG.cpp | 22 ++++++++++++++++++++++ 1 files changed, 22 insertions(+) Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.241 llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.242 --- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.241 Mon Jan 23 14:59:12 2006 +++ llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Mon Jan 23 15:51:14 2006 @@ -1671,6 +1671,28 @@ ON = N; // Memoize the new node. return SDOperand(N, 0); } +SDOperand SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc, + MVT::ValueType VT, SDOperand Op1, + SDOperand Op2, SDOperand Op3,SDOperand Op4, + SDOperand Op5, SDOperand Op6, + SDOperand Op7, SDOperand Op8) { + // If an identical node already exists, use it. + std::vector OpList; + OpList.push_back(Op1); OpList.push_back(Op2); OpList.push_back(Op3); + OpList.push_back(Op4); OpList.push_back(Op5); OpList.push_back(Op6); + OpList.push_back(Op7); OpList.push_back(Op8); + SDNode *&ON = OneResultNodes[std::make_pair(ISD::BUILTIN_OP_END+TargetOpc, + std::make_pair(VT, OpList))]; + if (ON) return SDOperand(ON, 0); + + RemoveNodeFromCSEMaps(N); + N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc); + N->setValueTypes(VT); + N->setOperands(Op1, Op2, Op3, Op4, Op5, Op6, Op7, Op8); + + ON = N; // Memoize the new node. + return SDOperand(N, 0); +} SDOperand SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc, MVT::ValueType VT1, MVT::ValueType VT2, From alenhar2 at cs.uiuc.edu Mon Jan 23 15:51:30 2006 From: alenhar2 at cs.uiuc.edu (Andrew Lenharth) Date: Mon, 23 Jan 2006 15:51:30 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/SelectionDAG.h SelectionDAGNodes.h Message-ID: <200601232151.PAA04903@apoc.cs.uiuc.edu> Changes in directory llvm/include/llvm/CodeGen: SelectionDAG.h updated: 1.86 -> 1.87 SelectionDAGNodes.h updated: 1.91 -> 1.92 --- Log message: another couple selects --- Diffs of the changes: (+38 -0) SelectionDAG.h | 20 ++++++++++++++++++++ SelectionDAGNodes.h | 18 ++++++++++++++++++ 2 files changed, 38 insertions(+) Index: llvm/include/llvm/CodeGen/SelectionDAG.h diff -u llvm/include/llvm/CodeGen/SelectionDAG.h:1.86 llvm/include/llvm/CodeGen/SelectionDAG.h:1.87 --- llvm/include/llvm/CodeGen/SelectionDAG.h:1.86 Mon Jan 23 14:58:48 2006 +++ llvm/include/llvm/CodeGen/SelectionDAG.h Mon Jan 23 15:51:14 2006 @@ -318,6 +318,10 @@ SDOperand Op1, SDOperand Op2, SDOperand Op3, SDOperand Op4, SDOperand Op5, SDOperand Op6, SDOperand Op7); + SDOperand SelectNodeTo(SDNode *N, unsigned TargetOpc, MVT::ValueType VT, + SDOperand Op1, SDOperand Op2, SDOperand Op3, + SDOperand Op4, SDOperand Op5, SDOperand Op6, + SDOperand Op7, SDOperand Op8); SDOperand SelectNodeTo(SDNode *N, unsigned TargetOpc, MVT::ValueType VT1, MVT::ValueType VT2, SDOperand Op1, SDOperand Op2); SDOperand SelectNodeTo(SDNode *N, unsigned TargetOpc, MVT::ValueType VT1, @@ -384,6 +388,22 @@ return getNode(ISD::BUILTIN_OP_END+Opcode, VT, Ops); } SDOperand getTargetNode(unsigned Opcode, MVT::ValueType VT, + SDOperand Op1, SDOperand Op2, SDOperand Op3, + SDOperand Op4, SDOperand Op5, SDOperand Op6, + SDOperand Op7, SDOperand Op8) { + std::vector Ops; + Ops.reserve(8); + Ops.push_back(Op1); + Ops.push_back(Op2); + Ops.push_back(Op3); + Ops.push_back(Op4); + Ops.push_back(Op5); + Ops.push_back(Op6); + Ops.push_back(Op7); + Ops.push_back(Op8); + return getNode(ISD::BUILTIN_OP_END+Opcode, VT, Ops); + } + SDOperand getTargetNode(unsigned Opcode, MVT::ValueType VT, std::vector &Ops) { return getNode(ISD::BUILTIN_OP_END+Opcode, VT, Ops); } Index: llvm/include/llvm/CodeGen/SelectionDAGNodes.h diff -u llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.91 llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.92 --- llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.91 Mon Jan 23 14:58:48 2006 +++ llvm/include/llvm/CodeGen/SelectionDAGNodes.h Mon Jan 23 15:51:14 2006 @@ -856,6 +856,24 @@ Op4.Val->Uses.push_back(this); Op5.Val->Uses.push_back(this); Op6.Val->Uses.push_back(this); } + void setOperands(SDOperand Op0, SDOperand Op1, SDOperand Op2, SDOperand Op3, + SDOperand Op4, SDOperand Op5, SDOperand Op6, SDOperand Op7) { + assert(NumOperands == 0 && "Should not have operands yet!"); + OperandList = new SDOperand[8]; + OperandList[0] = Op0; + OperandList[1] = Op1; + OperandList[2] = Op2; + OperandList[3] = Op3; + OperandList[4] = Op4; + OperandList[5] = Op5; + OperandList[6] = Op6; + OperandList[7] = Op7; + NumOperands = 8; + Op0.Val->Uses.push_back(this); Op1.Val->Uses.push_back(this); + Op2.Val->Uses.push_back(this); Op3.Val->Uses.push_back(this); + Op4.Val->Uses.push_back(this); Op5.Val->Uses.push_back(this); + Op6.Val->Uses.push_back(this); Op7.Val->Uses.push_back(this); + } void addUser(SDNode *User) { Uses.push_back(User); From alenhar2 at cs.uiuc.edu Mon Jan 23 15:51:50 2006 From: alenhar2 at cs.uiuc.edu (Andrew Lenharth) Date: Mon, 23 Jan 2006 15:51:50 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaISelLowering.cpp AlphaISelLowering.h AlphaInstrInfo.td Message-ID: <200601232151.PAA04917@apoc.cs.uiuc.edu> Changes in directory llvm/lib/Target/Alpha: AlphaISelLowering.cpp updated: 1.26 -> 1.27 AlphaISelLowering.h updated: 1.10 -> 1.11 AlphaInstrInfo.td updated: 1.106 -> 1.107 --- Log message: added stores to lsmark --- Diffs of the changes: (+74 -4) AlphaISelLowering.cpp | 51 ++++++++++++++++++++++++++++++++++++++++++++++++++ AlphaISelLowering.h | 2 - AlphaInstrInfo.td | 25 +++++++++++++++++++++--- 3 files changed, 74 insertions(+), 4 deletions(-) Index: llvm/lib/Target/Alpha/AlphaISelLowering.cpp diff -u llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.26 llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.27 --- llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.26 Mon Jan 23 15:23:26 2006 +++ llvm/lib/Target/Alpha/AlphaISelLowering.cpp Mon Jan 23 15:51:33 2006 @@ -166,6 +166,12 @@ case AlphaISD::LDL_: return "Alpha::LDL_"; case AlphaISD::LDWU_: return "Alpha::LDWU_"; case AlphaISD::LDBU_: return "Alpha::LDBU_"; + case AlphaISD::STQ_: return "Alpha::STQ_"; + case AlphaISD::STT_: return "Alpha::STT_"; + case AlphaISD::STS_: return "Alpha::STS_"; + case AlphaISD::STL_: return "Alpha::STL_"; + case AlphaISD::STW_: return "Alpha::STW_"; + case AlphaISD::STB_: return "Alpha::STB_"; } } @@ -631,6 +637,51 @@ return DAG.getNode(Opc, VTS, ARGS); } + case ISD::TRUNCSTORE: + case ISD::STORE: + { + SDOperand Chain = Op.getOperand(0); + SDOperand Value = Op.getOperand(1); + SDOperand Address = Op.getOperand(2); + + unsigned Opc; + unsigned opcode = Op.getOpcode(); + + if (opcode == ISD::STORE) { + switch(Value.getValueType()) { + default: assert(0 && "unknown Type in store"); + case MVT::i64: Opc = AlphaISD::STQ_; break; + case MVT::f64: Opc = AlphaISD::STT_; break; + case MVT::f32: Opc = AlphaISD::STS_; break; + } + } else { //ISD::TRUNCSTORE + switch(cast(Op.getOperand(4))->getVT()) { + default: assert(0 && "unknown Type in store"); + case MVT::i8: Opc = AlphaISD::STB_; break; + case MVT::i16: Opc = AlphaISD::STW_; break; + case MVT::i32: Opc = AlphaISD::STL_; break; + } + } + + int i, j, k; + getValueInfo(cast(Op.getOperand(3))->getValue(), i, j, k); + + SDOperand Zero = DAG.getConstant(0, MVT::i64); + std::vector VTS; + VTS.push_back(MVT::Other); + std::vector ARGS; + ARGS.push_back(Chain); + ARGS.push_back(Value); + ARGS.push_back(Zero); + ARGS.push_back(Address); + ARGS.push_back(DAG.getConstant(i, MVT::i64)); + ARGS.push_back(DAG.getConstant(j, MVT::i64)); + ARGS.push_back(DAG.getConstant(k, MVT::i64)); + ARGS.push_back(DAG.getConstant(getUID(), MVT::i64)); + return DAG.getNode(Opc, VTS, ARGS); + } + + } return SDOperand(); Index: llvm/lib/Target/Alpha/AlphaISelLowering.h diff -u llvm/lib/Target/Alpha/AlphaISelLowering.h:1.10 llvm/lib/Target/Alpha/AlphaISelLowering.h:1.11 --- llvm/lib/Target/Alpha/AlphaISelLowering.h:1.10 Mon Jan 23 14:59:50 2006 +++ llvm/lib/Target/Alpha/AlphaISelLowering.h Mon Jan 23 15:51:33 2006 @@ -43,7 +43,7 @@ ///LD, ST LDQ_, LDT_, LDS_, LDL_, LDWU_, LDBU_, - + STQ_, STT_, STS_, STL_, STW_, STB_, }; } Index: llvm/lib/Target/Alpha/AlphaInstrInfo.td diff -u llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.106 llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.107 --- llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.106 Mon Jan 23 15:23:26 2006 +++ llvm/lib/Target/Alpha/AlphaInstrInfo.td Mon Jan 23 15:51:33 2006 @@ -22,6 +22,9 @@ def SDTLoadA : SDTypeProfile<1, 6, [ // load SDTCisInt<1>, SDTCisPtrTy<2>, SDTCisInt<3>, SDTCisInt<4>, SDTCisInt<5>, SDTCisInt<6> ]>; +def SDTStoreA : SDTypeProfile<0, 7, [ // load + SDTCisInt<1>, SDTCisPtrTy<2>, SDTCisInt<3>, SDTCisInt<4>, SDTCisInt<5>, SDTCisInt<6> +]>; def Alpha_itoft : SDNode<"AlphaISD::ITOFT_", SDTIntToFPOp, []>; def Alpha_ftoit : SDNode<"AlphaISD::FTOIT_", SDTFPToIntOp, []>; @@ -37,6 +40,12 @@ def Alpha_ldl : SDNode<"AlphaISD::LDL_", SDTLoadA, [SDNPHasChain]>; def Alpha_ldwu : SDNode<"AlphaISD::LDWU_", SDTLoadA, [SDNPHasChain]>; def Alpha_ldbu : SDNode<"AlphaISD::LDBU_", SDTLoadA, [SDNPHasChain]>; +def Alpha_stq : SDNode<"AlphaISD::STQ_", SDTStoreA, [SDNPHasChain]>; +def Alpha_stl : SDNode<"AlphaISD::STL_", SDTStoreA, [SDNPHasChain]>; +def Alpha_stw : SDNode<"AlphaISD::STW_", SDTStoreA, [SDNPHasChain]>; +def Alpha_stb : SDNode<"AlphaISD::STB_", SDTStoreA, [SDNPHasChain]>; +def Alpha_sts : SDNode<"AlphaISD::STS_", SDTStoreA, [SDNPHasChain]>; +def Alpha_stt : SDNode<"AlphaISD::STT_", SDTStoreA, [SDNPHasChain]>; // These are target-independent nodes, but have target-specific formats. def SDT_AlphaCallSeq : SDTypeProfile<0, 1, [ SDTCisVT<0, i64> ]>; @@ -442,9 +451,9 @@ [(set GPRC:$RA, (load (add GPRC:$RB, immSExt16:$DISP)))]>; def LDQr : MForm<0x29, 0, 1, "ldq $RA,$DISP($RB)\t\t!gprellow", [(set GPRC:$RA, (load (Alpha_gprello tglobaladdr:$DISP, GPRC:$RB)))]>; -def LDL : MForm<0x29, 0, 1, "ldl $RA,$DISP($RB)", +def LDL : MForm<0x28, 0, 1, "ldl $RA,$DISP($RB)", [(set GPRC:$RA, (sextload (add GPRC:$RB, immSExt16:$DISP), i32))]>; -def LDLr : MForm<0x29, 0, 1, "ldl $RA,$DISP($RB)\t\t!gprellow", +def LDLr : MForm<0x28, 0, 1, "ldl $RA,$DISP($RB)\t\t!gprellow", [(set GPRC:$RA, (sextload (Alpha_gprello tglobaladdr:$DISP, GPRC:$RB), i32))]>; def LDBU : MForm<0x0A, 0, 1, "ldbu $RA,$DISP($RB)", [(set GPRC:$RA, (zextload (add GPRC:$RB, immSExt16:$DISP), i8))]>; @@ -579,16 +588,26 @@ (LDQl texternalsym:$ext, GPRC:$RB)>; +//Various tracked versions let OperandList = (ops GPRC:$RA, s64imm:$DISP, GPRC:$RB, s64imm:$i, s64imm:$j, s64imm:$k, s64imm:$m) in { def LDQlbl : MForm<0x29, 0, 1, "LSMARKER$$$i$$$j$$$k$$$m:\n\t ldq $RA,$DISP($RB)", [(set GPRC:$RA, (Alpha_ldq imm:$DISP, GPRC:$RB, imm:$i, imm:$j, imm:$k, imm:$m))]>; -def LDLlbl : MForm<0x29, 0, 1, "LSMARKER$$$i$$$j$$$k$$$m:\n\t ldl $RA,$DISP($RB)", +def LDLlbl : MForm<0x28, 0, 1, "LSMARKER$$$i$$$j$$$k$$$m:\n\t ldl $RA,$DISP($RB)", [(set GPRC:$RA, (Alpha_ldl imm:$DISP, GPRC:$RB, imm:$i, imm:$j, imm:$k, imm:$m))]>; def LDBUlbl : MForm<0x0A, 0, 1, "LSMARKER$$$i$$$j$$$k$$$m:\n\t ldbu $RA,$DISP($RB)", [(set GPRC:$RA, (Alpha_ldwu imm:$DISP, GPRC:$RB, imm:$i, imm:$j, imm:$k, imm:$m))]>; def LDWUlbl : MForm<0x0C, 0, 1, "LSMARKER$$$i$$$j$$$k$$$m:\n\t ldwu $RA,$DISP($RB)", [(set GPRC:$RA, (Alpha_ldbu imm:$DISP, GPRC:$RB, imm:$i, imm:$j, imm:$k, imm:$m))]>; + +def STBlbl : MForm<0x0E, 1, 0, "LSMARKER$$$i$$$j$$$k$$$m:\n\t stb $RA,$DISP($RB)", + [(Alpha_stb GPRC:$RA, imm:$DISP, GPRC:$RB, imm:$i, imm:$j, imm:$k, imm:$m)]>; +def STWlbl : MForm<0x0D, 1, 0, "LSMARKER$$$i$$$j$$$k$$$m:\n\t stw $RA,$DISP($RB)", + [(Alpha_stw GPRC:$RA, imm:$DISP, GPRC:$RB, imm:$i, imm:$j, imm:$k, imm:$m)]>; +def STLlbl : MForm<0x2C, 1, 0, "LSMARKER$$$i$$$j$$$k$$$m:\n\t stl $RA,$DISP($RB)", + [(Alpha_stl GPRC:$RA, imm:$DISP, GPRC:$RB, imm:$i, imm:$j, imm:$k, imm:$m)]>; +def STQlbl : MForm<0x2D, 1, 0, "LSMARKER$$$i$$$j$$$k$$$m:\n\t stq $RA,$DISP($RB)", + [(Alpha_stq GPRC:$RA, imm:$DISP, GPRC:$RB, imm:$i, imm:$j, imm:$k, imm:$m)]>; } let OperandList = (ops F8RC:$RA, s64imm:$DISP, GPRC:$RB, From alenhar2 at cs.uiuc.edu Mon Jan 23 15:56:29 2006 From: alenhar2 at cs.uiuc.edu (Andrew Lenharth) Date: Mon, 23 Jan 2006 15:56:29 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaISelLowering.cpp AlphaTargetMachine.cpp AlphaISelPattern.cpp Message-ID: <200601232156.PAA04937@apoc.cs.uiuc.edu> Changes in directory llvm/lib/Target/Alpha: AlphaISelLowering.cpp updated: 1.27 -> 1.28 AlphaTargetMachine.cpp updated: 1.20 -> 1.21 AlphaISelPattern.cpp (r1.199) removed --- Log message: bye bye Pattern ISEL --- Diffs of the changes: (+5 -14) AlphaISelLowering.cpp | 6 +++--- AlphaTargetMachine.cpp | 13 ++----------- 2 files changed, 5 insertions(+), 14 deletions(-) Index: llvm/lib/Target/Alpha/AlphaISelLowering.cpp diff -u llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.27 llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.28 --- llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.27 Mon Jan 23 15:51:33 2006 +++ llvm/lib/Target/Alpha/AlphaISelLowering.cpp Mon Jan 23 15:56:07 2006 @@ -27,9 +27,9 @@ using namespace llvm; namespace llvm { - extern cl::opt EnableAlphaIDIV; - extern cl::opt EnableAlphaCount; - extern cl::opt EnableAlphaLSMark; + cl::opt EnableAlphaLSMark("enable-alpha-lsmark", + cl::desc("Emit symbols to correlate Mem ops to LLVM Values"), + cl::Hidden); } /// AddLiveIn - This helper function adds the specified physical register to the Index: llvm/lib/Target/Alpha/AlphaTargetMachine.cpp diff -u llvm/lib/Target/Alpha/AlphaTargetMachine.cpp:1.20 llvm/lib/Target/Alpha/AlphaTargetMachine.cpp:1.21 --- llvm/lib/Target/Alpha/AlphaTargetMachine.cpp:1.20 Fri Jan 13 12:49:47 2006 +++ llvm/lib/Target/Alpha/AlphaTargetMachine.cpp Mon Jan 23 15:56:07 2006 @@ -28,12 +28,6 @@ RegisterTarget X("alpha", " Alpha (incomplete)"); } -namespace llvm { - cl::opt DisableAlphaDAG("disable-alpha-dag-isel", - cl::desc("Disable DAG ISEL for Alpha"), - cl::Hidden); -} - unsigned AlphaTargetMachine::getModuleMatchQuality(const Module &M) { // We strongly match "alpha*". std::string TT = M.getTargetTriple(); @@ -94,10 +88,7 @@ // Make sure that no unreachable blocks are instruction selected. PM.add(createUnreachableBlockEliminationPass()); - if (!DisableAlphaDAG) - PM.add(createAlphaISelDag(*this)); - else - PM.add(createAlphaPatternInstructionSelector(*this)); + PM.add(createAlphaISelDag(*this)); if (PrintMachineCode) PM.add(createMachineFunctionPrinterPass(&std::cerr)); @@ -135,7 +126,7 @@ // Make sure that no unreachable blocks are instruction selected. PM.add(createUnreachableBlockEliminationPass()); - PM.add(createAlphaPatternInstructionSelector(TM)); + PM.add(createAlphaISelDag(TM)); if (PrintMachineCode) PM.add(createMachineFunctionPrinterPass(&std::cerr)); From alenhar2 at cs.uiuc.edu Mon Jan 23 15:57:43 2006 From: alenhar2 at cs.uiuc.edu (Andrew Lenharth) Date: Mon, 23 Jan 2006 15:57:43 -0600 Subject: [llvm-commits] CVS: llvm-test/Makefile.programs Message-ID: <200601232157.PAA04949@apoc.cs.uiuc.edu> Changes in directory llvm-test: Makefile.programs updated: 1.185 -> 1.186 --- Log message: change alpha beta to lsmark --- Diffs of the changes: (+1 -1) Makefile.programs | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm-test/Makefile.programs diff -u llvm-test/Makefile.programs:1.185 llvm-test/Makefile.programs:1.186 --- llvm-test/Makefile.programs:1.185 Thu Jan 19 08:17:29 2006 +++ llvm-test/Makefile.programs Mon Jan 23 15:57:27 2006 @@ -190,7 +190,7 @@ LLCBETAOPTION := -sched=simple endif ifeq ($(ARCH),Alpha) -LLCBETAOPTION := -disable-alpha-dag-isel +LLCBETAOPTION := -enable-alpha-lsmark # -enable-alpha-FTOI -enable-alpha-intfpdiv endif ifeq ($(ARCH),IA64) From lattner at cs.uiuc.edu Mon Jan 23 17:02:40 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon, 23 Jan 2006 17:02:40 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/Module.h Message-ID: <200601232302.RAA03023@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm: Module.h updated: 1.66 -> 1.67 --- Log message: Add global scope asm support --- Diffs of the changes: (+5 -1) Module.h | 6 +++++- 1 files changed, 5 insertions(+), 1 deletion(-) Index: llvm/include/llvm/Module.h diff -u llvm/include/llvm/Module.h:1.66 llvm/include/llvm/Module.h:1.67 --- llvm/include/llvm/Module.h:1.66 Sat Jan 7 20:32:52 2006 +++ llvm/include/llvm/Module.h Mon Jan 23 17:02:28 2006 @@ -70,10 +70,10 @@ GlobalListType GlobalList; // The Global Variables in the module FunctionListType FunctionList; // The Functions in the module LibraryListType LibraryList; // The Libraries needed by the module + std::string GlobalScopeAsm; // Inline Asm at global scope. SymbolTable *SymTab; // Symbol Table for the module std::string ModuleID; // Human readable identifier for the module std::string TargetTriple; // Platform target triple Module compiled on - Endianness Endian; // Endianness assumed in the module PointerSize PtrSize; // Pointer size assumed in the module @@ -97,6 +97,10 @@ PointerSize getPointerSize() const { return PtrSize; } void setPointerSize(PointerSize PS) { PtrSize = PS; } + // Access to any module-scope inline asm blocks. + const std::string &getInlineAsm() const { return GlobalScopeAsm; } + void setInlineAsm(const std::string &Asm) { GlobalScopeAsm = Asm; } + //===--------------------------------------------------------------------===// // Methods for easy access to the functions in the module. // From lattner at cs.uiuc.edu Mon Jan 23 17:03:47 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon, 23 Jan 2006 17:03:47 -0600 Subject: [llvm-commits] CVS: llvm/lib/VMCore/AsmWriter.cpp Message-ID: <200601232303.RAA03081@zion.cs.uiuc.edu> Changes in directory llvm/lib/VMCore: AsmWriter.cpp updated: 1.185 -> 1.186 --- Log message: Print out inline asm strings --- Diffs of the changes: (+23 -22) AsmWriter.cpp | 45 +++++++++++++++++++++++---------------------- 1 files changed, 23 insertions(+), 22 deletions(-) Index: llvm/lib/VMCore/AsmWriter.cpp diff -u llvm/lib/VMCore/AsmWriter.cpp:1.185 llvm/lib/VMCore/AsmWriter.cpp:1.186 --- llvm/lib/VMCore/AsmWriter.cpp:1.185 Fri Nov 11 18:10:19 2005 +++ llvm/lib/VMCore/AsmWriter.cpp Mon Jan 23 17:03:36 2006 @@ -398,6 +398,21 @@ } } +// PrintEscapedString - Print each character of the specified string, escaping +// it if it is not printable or if it is an escape char. +static void PrintEscapedString(const std::string &Str, std::ostream &Out) { + for (unsigned i = 0, e = Str.size(); i != e; ++i) { + unsigned char C = Str[i]; + if (isprint(C) && C != '"' && C != '\\') { + Out << C; + } else { + Out << '\\' + << (char) ((C/16 < 10) ? ( C/16 +'0') : ( C/16 -10+'A')) + << (char)(((C&15) < 10) ? ((C&15)+'0') : ((C&15)-10+'A')); + } + } +} + /// @brief Internal constant writer. static void WriteConstantInt(std::ostream &Out, const Constant *CV, bool PrintName, @@ -443,29 +458,9 @@ // ubytes or an array of sbytes with positive values. // const Type *ETy = CA->getType()->getElementType(); - bool isString = (ETy == Type::SByteTy || ETy == Type::UByteTy); - - if (ETy == Type::SByteTy) - for (unsigned i = 0; i < CA->getNumOperands(); ++i) - if (cast(CA->getOperand(i))->getValue() < 0) { - isString = false; - break; - } - - if (isString) { + if (CA->isString()) { Out << "c\""; - for (unsigned i = 0; i < CA->getNumOperands(); ++i) { - unsigned char C = - (unsigned char)cast(CA->getOperand(i))->getRawValue(); - - if (isprint(C) && C != '"' && C != '\\') { - Out << C; - } else { - Out << '\\' - << (char) ((C/16 < 10) ? ( C/16 +'0') : ( C/16 -10+'A')) - << (char)(((C&15) < 10) ? ((C&15)+'0') : ((C&15)-10+'A')); - } - } + PrintEscapedString(CA->getAsString(), Out); Out << "\""; } else { // Cannot output in string format... @@ -780,6 +775,12 @@ if (!M->getTargetTriple().empty()) Out << "target triple = \"" << M->getTargetTriple() << "\"\n"; + if (!M->getInlineAsm().empty()) { + Out << "asm \""; + PrintEscapedString(M->getInlineAsm(), Out); + Out << "\"\n"; + } + // Loop over the dependent libraries and emit them. Module::lib_iterator LI = M->lib_begin(); Module::lib_iterator LE = M->lib_end(); From lattner at cs.uiuc.edu Mon Jan 23 17:05:27 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon, 23 Jan 2006 17:05:27 -0600 Subject: [llvm-commits] CVS: llvm/lib/AsmParser/Lexer.l llvmAsmParser.y Message-ID: <200601232305.RAA03146@zion.cs.uiuc.edu> Changes in directory llvm/lib/AsmParser: Lexer.l updated: 1.68 -> 1.69 llvmAsmParser.y updated: 1.245 -> 1.246 --- Log message: Add support for parsing global asm blocks --- Diffs of the changes: (+22 -4) Lexer.l | 1 + llvmAsmParser.y | 25 +++++++++++++++++++++---- 2 files changed, 22 insertions(+), 4 deletions(-) Index: llvm/lib/AsmParser/Lexer.l diff -u llvm/lib/AsmParser/Lexer.l:1.68 llvm/lib/AsmParser/Lexer.l:1.69 --- llvm/lib/AsmParser/Lexer.l:1.68 Tue Jan 17 14:06:24 2006 +++ llvm/lib/AsmParser/Lexer.l Mon Jan 23 17:05:15 2006 @@ -212,6 +212,7 @@ volatile { return VOLATILE; } align { return ALIGN; } section { return SECTION; } +asm { return ASM_TOK; } cc { return CC_TOK; } ccc { return CCC_TOK; } Index: llvm/lib/AsmParser/llvmAsmParser.y diff -u llvm/lib/AsmParser/llvmAsmParser.y:1.245 llvm/lib/AsmParser/llvmAsmParser.y:1.246 --- llvm/lib/AsmParser/llvmAsmParser.y:1.245 Wed Jan 18 19:21:04 2006 +++ llvm/lib/AsmParser/llvmAsmParser.y Mon Jan 23 17:05:15 2006 @@ -967,7 +967,7 @@ %token DECLARE GLOBAL CONSTANT SECTION VOLATILE %token TO DOTDOTDOT NULL_TOK UNDEF CONST INTERNAL LINKONCE WEAK APPENDING %token OPAQUE NOT EXTERNAL TARGET TRIPLE ENDIAN POINTERSIZE LITTLE BIG ALIGN -%token DEPLIBS CALL TAIL +%token DEPLIBS CALL TAIL ASM_TOK %token CC_TOK CCC_TOK FASTCC_TOK COLDCC_TOK %type OptCallingConv @@ -1256,11 +1256,12 @@ " when array has size " + itostr(NumElements) + "!"); std::vector Vals; if (ETy == Type::SByteTy) { - for (char *C = $3; C != EndStr; ++C) + for (signed char *C = (signed char *)$3; C != (signed char *)EndStr; ++C) Vals.push_back(ConstantSInt::get(ETy, *C)); } else if (ETy == Type::UByteTy) { - for (char *C = $3; C != EndStr; ++C) - Vals.push_back(ConstantUInt::get(ETy, (unsigned char)*C)); + for (unsigned char *C = (unsigned char *)$3; + C != (unsigned char*)EndStr; ++C) + Vals.push_back(ConstantUInt::get(ETy, *C)); } else { free($3); ThrowException("Cannot build string arrays of non byte sized elements!"); @@ -1570,6 +1571,9 @@ | FunctionList FunctionProto { $$ = $1; } + | FunctionList ASM_TOK AsmBlock { + $$ = $1; + } | FunctionList IMPLEMENTATION { $$ = $1; } @@ -1608,6 +1612,8 @@ } | ConstPool FunctionProto { // Function prototypes can be in const pool } + | ConstPool ASM_TOK AsmBlock { // Asm blocks can be in the const pool + } | ConstPool OptAssign OptLinkage GlobalType ConstVal { if ($5 == 0) ThrowException("Global value initializer is not a constant!"); CurGV = ParseGlobalVariable($2, $3, $4, $5->getType(), $5); @@ -1629,6 +1635,17 @@ }; +AsmBlock : STRINGCONSTANT { + const std::string &AsmSoFar = CurModule.CurrentModule->getInlineAsm(); + char *EndStr = UnEscapeLexed($1, true); + std::string NewAsm($1, EndStr); + free($1); + + if (AsmSoFar.empty()) + CurModule.CurrentModule->setInlineAsm(NewAsm); + else + CurModule.CurrentModule->setInlineAsm(AsmSoFar+"\n"+NewAsm); +}; BigOrLittle : BIG { $$ = Module::BigEndian; }; BigOrLittle : LITTLE { $$ = Module::LittleEndian; }; From lattner at cs.uiuc.edu Mon Jan 23 17:05:54 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon, 23 Jan 2006 17:05:54 -0600 Subject: [llvm-commits] CVS: llvm/lib/AsmParser/Lexer.cpp llvmAsmParser.cpp llvmAsmParser.h Message-ID: <200601232305.RAA03184@zion.cs.uiuc.edu> Changes in directory llvm/lib/AsmParser: Lexer.cpp updated: 1.15 -> 1.16 llvmAsmParser.cpp updated: 1.32 -> 1.33 llvmAsmParser.h updated: 1.16 -> 1.17 --- Log message: regenerate --- Diffs of the changes: (+2741 -3489) Lexer.cpp | 1086 ++++++------ llvmAsmParser.cpp | 4807 +++++++++++++++++++++++------------------------------- llvmAsmParser.h | 337 +-- 3 files changed, 2741 insertions(+), 3489 deletions(-) Index: llvm/lib/AsmParser/Lexer.cpp diff -u llvm/lib/AsmParser/Lexer.cpp:1.15 llvm/lib/AsmParser/Lexer.cpp:1.16 --- llvm/lib/AsmParser/Lexer.cpp:1.15 Tue Jan 17 14:06:24 2006 +++ llvm/lib/AsmParser/Lexer.cpp Mon Jan 23 17:05:42 2006 @@ -20,7 +20,7 @@ /* A lexical scanner generated by flex */ /* Scanner skeleton version: - * $Header: /home/vadve/shared/PublicCVS/llvm/lib/AsmParser/Lexer.cpp,v 1.15 2006/01/17 20:06:24 bocchino Exp $ + * $Header: /home/vadve/shared/PublicCVS/llvm/lib/AsmParser/Lexer.cpp,v 1.16 2006/01/23 23:05:42 lattner Exp $ */ #define FLEX_SCANNER @@ -308,80 +308,81 @@ *yy_cp = '\0'; \ yy_c_buf_p = yy_cp; -#define YY_NUM_RULES 103 -#define YY_END_OF_BUFFER 104 -static yyconst short int yy_acclist[181] = +#define YY_NUM_RULES 104 +#define YY_END_OF_BUFFER 105 +static yyconst short int yy_acclist[182] = { 0, - 104, 102, 103, 101, 102, 103, 101, 103, 102, 103, - 102, 103, 102, 103, 102, 103, 102, 103, 102, 103, - 94, 102, 103, 94, 102, 103, 1, 102, 103, 102, - 103, 102, 103, 102, 103, 102, 103, 102, 103, 102, - 103, 102, 103, 102, 103, 102, 103, 102, 103, 102, - 103, 102, 103, 102, 103, 102, 103, 102, 103, 102, - 103, 102, 103, 102, 103, 102, 103, 102, 103, 102, - 103, 93, 91, 90, 90, 97, 95, 99, 94, 1, - 77, 34, 59, 20, 93, 90, 90, 98, 99, 17, - 99, 100, 53, 58, 30, 35, 56, 3, 44, 55, - - 22, 67, 57, 76, 71, 72, 54, 60, 92, 99, - 99, 39, 68, 69, 84, 85, 46, 19, 96, 23, - 4, 51, 45, 38, 11, 99, 32, 2, 5, 48, - 50, 40, 62, 66, 64, 65, 63, 61, 42, 86, - 41, 47, 18, 74, 83, 37, 49, 27, 21, 36, - 7, 79, 29, 82, 52, 70, 78, 24, 25, 80, - 43, 75, 73, 6, 26, 33, 8, 14, 9, 10, - 31, 12, 28, 81, 87, 89, 13, 88, 15, 16 + 105, 103, 104, 102, 103, 104, 102, 104, 103, 104, + 103, 104, 103, 104, 103, 104, 103, 104, 103, 104, + 95, 103, 104, 95, 103, 104, 1, 103, 104, 103, + 104, 103, 104, 103, 104, 103, 104, 103, 104, 103, + 104, 103, 104, 103, 104, 103, 104, 103, 104, 103, + 104, 103, 104, 103, 104, 103, 104, 103, 104, 103, + 104, 103, 104, 103, 104, 103, 104, 103, 104, 103, + 104, 94, 92, 91, 91, 98, 96, 100, 95, 1, + 78, 35, 60, 20, 94, 91, 91, 99, 100, 17, + 100, 101, 54, 59, 34, 30, 36, 57, 3, 45, + + 56, 22, 68, 58, 77, 72, 73, 55, 61, 93, + 100, 100, 40, 69, 70, 85, 86, 47, 19, 97, + 23, 4, 52, 46, 39, 11, 100, 32, 2, 5, + 49, 51, 41, 63, 67, 65, 66, 64, 62, 43, + 87, 42, 48, 18, 75, 84, 38, 50, 27, 21, + 37, 7, 80, 29, 83, 53, 71, 79, 24, 25, + 81, 44, 76, 74, 6, 26, 33, 8, 14, 9, + 10, 31, 12, 28, 82, 88, 90, 13, 89, 15, + 16 } ; -static yyconst short int yy_accept[428] = +static yyconst short int yy_accept[430] = { 0, 1, 1, 1, 2, 4, 7, 9, 11, 13, 15, 17, 19, 21, 24, 27, 30, 32, 34, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64, 66, 68, 70, 72, 72, 73, 73, 74, 75, 76, 77, 77, 78, 78, 79, 80, 80, - 81, 81, 81, 81, 81, 81, 81, 81, 82, 82, + 81, 81, 81, 81, 81, 81, 81, 81, 81, 82, + 82, 83, 83, 83, 83, 83, 83, 83, 83, 83, 83, 83, 83, 83, 83, 83, 83, 83, 83, 83, - 83, 83, 83, 83, 83, 83, 83, 83, 83, 83, - 83, 83, 84, 84, 84, 84, 84, 84, 84, 84, - 84, 84, 84, 84, 85, 85, 85, 85, 85, 85, + 83, 83, 83, 84, 84, 84, 84, 84, 84, 84, + 84, 84, 84, 84, 84, 85, 85, 85, 85, 85, - 85, 85, 85, 85, 85, 85, 85, 86, 87, 89, - 90, 91, 92, 92, 93, 94, 94, 94, 95, 95, - 95, 96, 96, 96, 96, 97, 97, 97, 97, 97, - 98, 98, 99, 99, 99, 99, 99, 99, 99, 99, - 99, 99, 99, 100, 100, 100, 100, 100, 100, 100, - 100, 101, 102, 102, 102, 103, 103, 104, 105, 105, - 105, 105, 105, 105, 106, 106, 107, 107, 108, 108, - 108, 108, 108, 108, 108, 108, 108, 108, 108, 108, - 108, 108, 108, 108, 108, 108, 108, 108, 108, 109, - 109, 110, 111, 111, 111, 111, 112, 112, 112, 112, - - 112, 113, 114, 115, 115, 115, 115, 115, 115, 115, - 115, 115, 115, 115, 115, 115, 116, 116, 116, 116, - 116, 116, 116, 116, 116, 116, 117, 118, 118, 119, - 119, 119, 120, 120, 120, 120, 120, 120, 120, 120, - 120, 120, 120, 121, 121, 121, 122, 123, 123, 124, - 124, 124, 124, 124, 124, 124, 124, 124, 124, 125, - 125, 126, 126, 127, 128, 128, 128, 129, 129, 129, - 129, 129, 129, 129, 129, 129, 129, 130, 130, 131, - 131, 131, 131, 131, 131, 131, 132, 132, 132, 132, - 132, 132, 133, 133, 133, 134, 135, 136, 137, 138, - - 139, 140, 141, 141, 141, 141, 142, 143, 144, 144, - 144, 144, 144, 144, 145, 145, 145, 145, 146, 146, - 147, 147, 147, 147, 148, 149, 150, 150, 150, 151, - 151, 152, 152, 152, 152, 153, 153, 154, 155, 156, - 156, 156, 157, 158, 159, 160, 160, 160, 161, 162, - 163, 164, 164, 164, 164, 164, 165, 166, 166, 166, - 166, 166, 166, 166, 166, 166, 167, 167, 167, 167, - 167, 167, 168, 169, 169, 169, 169, 169, 170, 171, - 171, 171, 171, 172, 172, 173, 173, 173, 173, 173, - 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, - - 173, 173, 173, 173, 173, 173, 174, 174, 175, 175, - 175, 175, 175, 175, 175, 175, 175, 176, 176, 177, - 178, 178, 179, 180, 180, 181, 181 + 85, 85, 85, 85, 85, 85, 85, 85, 86, 87, + 89, 90, 91, 92, 92, 93, 94, 94, 94, 95, + 95, 96, 96, 97, 97, 97, 97, 98, 98, 98, + 98, 98, 99, 99, 100, 100, 100, 100, 100, 100, + 100, 100, 100, 100, 100, 101, 101, 101, 101, 101, + 101, 101, 101, 102, 103, 103, 103, 104, 104, 105, + 106, 106, 106, 106, 106, 106, 107, 107, 108, 108, + 109, 109, 109, 109, 109, 109, 109, 109, 109, 109, + 109, 109, 109, 109, 109, 109, 109, 109, 109, 109, + 109, 110, 110, 111, 112, 112, 112, 112, 113, 113, + + 113, 113, 113, 114, 115, 116, 116, 116, 116, 116, + 116, 116, 116, 116, 116, 116, 116, 116, 117, 117, + 117, 117, 117, 117, 117, 117, 117, 117, 118, 119, + 119, 120, 120, 120, 121, 121, 121, 121, 121, 121, + 121, 121, 121, 121, 121, 122, 122, 122, 123, 124, + 124, 125, 125, 125, 125, 125, 125, 125, 125, 125, + 125, 126, 126, 127, 127, 128, 129, 129, 129, 130, + 130, 130, 130, 130, 130, 130, 130, 130, 130, 131, + 131, 132, 132, 132, 132, 132, 132, 132, 133, 133, + 133, 133, 133, 133, 134, 134, 134, 135, 136, 137, + + 138, 139, 140, 141, 142, 142, 142, 142, 143, 144, + 145, 145, 145, 145, 145, 145, 146, 146, 146, 146, + 147, 147, 148, 148, 148, 148, 149, 150, 151, 151, + 151, 152, 152, 153, 153, 153, 153, 154, 154, 155, + 156, 157, 157, 157, 158, 159, 160, 161, 161, 161, + 162, 163, 164, 165, 165, 165, 165, 165, 166, 167, + 167, 167, 167, 167, 167, 167, 167, 167, 168, 168, + 168, 168, 168, 168, 169, 170, 170, 170, 170, 170, + 171, 172, 172, 172, 172, 173, 173, 174, 174, 174, + 174, 174, 174, 174, 174, 174, 174, 174, 174, 174, + + 174, 174, 174, 174, 174, 174, 174, 174, 175, 175, + 176, 176, 176, 176, 176, 176, 176, 176, 176, 177, + 177, 178, 179, 179, 180, 181, 181, 182, 182 } ; static yyconst int yy_ec[256] = @@ -425,322 +426,322 @@ 3 } ; -static yyconst short int yy_base[432] = +static yyconst short int yy_base[434] = { 0, - 0, 0, 894, 895, 895, 895, 889, 880, 34, 36, - 38, 42, 46, 50, 0, 51, 54, 53, 56, 61, - 76, 77, 79, 80, 82, 83, 84, 90, 31, 111, - 94, 140, 113, 55, 110, 116, 887, 895, 878, 895, - 0, 128, 131, 144, 150, 124, 160, 167, 172, 0, - 136, 139, 168, 100, 41, 145, 114, 877, 173, 183, - 184, 185, 161, 187, 189, 191, 193, 133, 194, 196, - 200, 202, 205, 206, 209, 217, 89, 210, 213, 216, - 57, 876, 207, 224, 223, 229, 233, 235, 244, 245, - 241, 238, 253, 875, 254, 249, 243, 240, 252, 264, - - 248, 275, 269, 276, 273, 283, 874, 0, 288, 290, - 873, 297, 312, 0, 872, 291, 298, 871, 305, 309, - 870, 303, 313, 301, 869, 315, 317, 319, 320, 868, - 321, 325, 331, 332, 326, 329, 337, 336, 346, 343, - 344, 347, 351, 350, 354, 357, 358, 361, 362, 364, - 867, 866, 365, 366, 865, 367, 864, 863, 389, 370, - 377, 374, 401, 862, 382, 861, 385, 860, 390, 389, - 408, 402, 405, 411, 407, 409, 417, 415, 422, 426, - 423, 425, 428, 427, 429, 437, 441, 440, 859, 431, - 895, 452, 461, 377, 464, 467, 452, 468, 453, 471, - - 858, 857, 856, 472, 458, 442, 473, 474, 477, 476, - 478, 480, 483, 484, 487, 855, 490, 493, 494, 496, - 497, 500, 501, 502, 504, 854, 853, 506, 852, 507, - 509, 0, 512, 513, 508, 522, 525, 527, 528, 523, - 529, 533, 851, 530, 541, 850, 849, 535, 848, 543, - 545, 547, 552, 549, 551, 553, 558, 559, 847, 561, - 846, 562, 565, 845, 565, 568, 844, 571, 577, 567, - 372, 580, 573, 579, 581, 585, 843, 587, 842, 591, - 593, 583, 595, 596, 597, 841, 603, 601, 604, 605, - 607, 840, 609, 612, 839, 838, 837, 836, 835, 834, - - 833, 832, 617, 615, 619, 831, 830, 829, 621, 623, - 624, 622, 625, 828, 626, 633, 631, 827, 634, 826, - 637, 641, 639, 825, 824, 823, 651, 640, 822, 642, - 821, 643, 653, 655, 820, 657, 819, 818, 817, 659, - 665, 816, 815, 814, 813, 666, 669, 812, 811, 810, - 807, 668, 671, 670, 667, 797, 796, 673, 676, 677, - 672, 678, 691, 692, 674, 795, 694, 695, 698, 697, - 702, 794, 792, 703, 704, 705, 708, 791, 790, 709, - 710, 723, 787, 711, 786, 726, 714, 727, 715, 712, - 730, 719, 733, 736, 739, 740, 742, 744, 716, 746, - - 747, 748, 749, 754, 756, 782, 750, 781, 761, 760, - 764, 765, 766, 768, 769, 770, 780, 771, 779, 675, - 775, 511, 444, 778, 333, 895, 811, 813, 339, 817, - 264 + 0, 0, 898, 899, 899, 899, 893, 884, 34, 36, + 38, 42, 46, 50, 0, 52, 57, 54, 68, 62, + 80, 82, 76, 94, 98, 40, 83, 88, 56, 125, + 108, 154, 109, 87, 110, 111, 891, 899, 882, 899, + 0, 117, 119, 141, 144, 124, 147, 164, 179, 0, + 55, 153, 157, 155, 119, 159, 172, 173, 881, 175, + 192, 193, 194, 105, 180, 195, 198, 196, 202, 200, + 206, 207, 212, 214, 84, 215, 217, 226, 227, 223, + 228, 219, 880, 235, 240, 233, 230, 216, 245, 251, + 247, 255, 250, 254, 879, 258, 259, 262, 264, 270, + + 276, 41, 287, 280, 274, 273, 277, 878, 0, 134, + 302, 877, 309, 321, 0, 876, 285, 306, 875, 313, + 874, 286, 873, 310, 314, 303, 872, 315, 327, 328, + 330, 871, 331, 333, 332, 335, 336, 334, 342, 339, + 350, 354, 338, 352, 355, 351, 362, 363, 365, 366, + 367, 368, 870, 869, 370, 31, 868, 372, 867, 866, + 392, 373, 380, 375, 404, 865, 386, 864, 387, 863, + 382, 409, 381, 393, 411, 414, 406, 410, 417, 416, + 418, 422, 426, 427, 432, 428, 438, 436, 441, 440, + 862, 430, 899, 452, 461, 444, 464, 467, 452, 468, + + 453, 471, 861, 860, 859, 472, 458, 473, 474, 476, + 477, 480, 483, 484, 485, 486, 490, 858, 492, 495, + 496, 497, 498, 501, 502, 503, 508, 857, 856, 506, + 855, 509, 511, 0, 516, 514, 522, 510, 526, 528, + 531, 520, 532, 538, 854, 539, 542, 853, 852, 544, + 851, 536, 546, 550, 554, 552, 555, 558, 560, 561, + 850, 562, 849, 564, 567, 848, 567, 570, 847, 568, + 581, 573, 574, 582, 583, 584, 587, 589, 846, 590, + 845, 592, 593, 595, 598, 599, 603, 844, 602, 605, + 606, 609, 615, 843, 610, 617, 842, 841, 840, 839, + + 838, 837, 836, 835, 620, 622, 625, 834, 833, 832, + 623, 626, 627, 629, 630, 831, 631, 636, 638, 830, + 637, 829, 639, 642, 643, 828, 827, 826, 648, 644, + 825, 647, 824, 657, 659, 664, 823, 670, 822, 821, + 820, 658, 661, 819, 818, 817, 816, 660, 662, 815, + 812, 803, 802, 671, 672, 675, 676, 800, 798, 680, + 681, 682, 683, 687, 688, 684, 689, 797, 696, 704, + 697, 694, 705, 796, 794, 698, 707, 708, 710, 793, + 792, 712, 714, 715, 790, 720, 789, 718, 722, 723, + 726, 730, 734, 735, 732, 736, 738, 739, 740, 744, + + 741, 746, 743, 751, 748, 754, 756, 787, 763, 785, + 761, 764, 765, 766, 768, 769, 775, 776, 783, 778, + 782, 512, 779, 379, 376, 780, 340, 899, 816, 818, + 292, 822, 167 } ; -static yyconst short int yy_def[432] = +static yyconst short int yy_def[434] = { 0, - 426, 1, 426, 426, 426, 426, 427, 428, 429, 426, - 428, 428, 428, 428, 430, 428, 428, 428, 428, 428, - 428, 428, 428, 428, 428, 428, 428, 428, 428, 428, - 428, 428, 428, 428, 428, 428, 427, 426, 428, 426, - 431, 431, 426, 426, 428, 428, 428, 428, 428, 430, - 428, 428, 428, 428, 428, 428, 428, 428, 428, 428, - 428, 428, 428, 428, 428, 428, 428, 428, 428, 428, - 428, 428, 428, 428, 428, 428, 428, 428, 428, 428, - 428, 428, 428, 428, 428, 428, 428, 428, 428, 428, - 428, 428, 428, 428, 428, 428, 428, 428, 428, 428, - - 428, 428, 428, 428, 428, 428, 426, 431, 431, 426, - 428, 428, 428, 49, 428, 428, 428, 428, 428, 428, - 428, 428, 428, 428, 428, 428, 428, 428, 428, 428, - 428, 428, 428, 428, 428, 428, 428, 428, 428, 428, - 428, 428, 428, 428, 428, 428, 428, 428, 428, 428, - 428, 428, 428, 428, 428, 428, 428, 428, 49, 428, - 428, 428, 428, 428, 428, 428, 428, 428, 428, 428, - 428, 428, 428, 428, 428, 428, 428, 428, 428, 428, - 428, 428, 428, 428, 428, 428, 428, 428, 428, 428, - 426, 426, 426, 426, 428, 428, 428, 428, 428, 428, - - 428, 428, 428, 428, 428, 428, 428, 428, 428, 428, - 428, 428, 428, 428, 428, 428, 428, 428, 428, 428, - 428, 428, 428, 428, 428, 428, 428, 428, 428, 428, - 428, 159, 428, 428, 428, 428, 428, 428, 428, 428, - 428, 428, 428, 428, 428, 428, 428, 428, 428, 428, - 428, 428, 428, 428, 428, 428, 428, 428, 428, 428, - 428, 428, 426, 428, 428, 428, 428, 428, 428, 428, - 428, 428, 428, 428, 428, 428, 428, 428, 428, 428, - 428, 428, 428, 428, 428, 428, 428, 428, 428, 428, - 428, 428, 428, 428, 428, 428, 428, 428, 428, 428, - - 428, 428, 428, 428, 428, 428, 428, 428, 428, 428, - 428, 428, 428, 428, 428, 428, 428, 428, 428, 428, - 428, 428, 428, 428, 428, 428, 428, 428, 428, 428, - 428, 428, 428, 428, 428, 428, 428, 428, 428, 428, - 428, 428, 428, 428, 428, 428, 428, 428, 428, 428, - 428, 428, 428, 428, 428, 428, 428, 428, 428, 428, - 428, 428, 428, 428, 428, 428, 428, 428, 428, 428, - 428, 428, 428, 428, 428, 428, 428, 428, 428, 428, - 428, 428, 428, 428, 428, 428, 428, 428, 428, 428, - 428, 428, 428, 428, 428, 428, 428, 428, 428, 428, - - 428, 428, 428, 428, 428, 428, 428, 428, 428, 428, - 428, 428, 428, 428, 428, 428, 428, 428, 428, 428, - 428, 428, 428, 428, 428, 0, 426, 426, 426, 426, - 426 + 428, 1, 428, 428, 428, 428, 429, 430, 431, 428, + 430, 430, 430, 430, 432, 430, 430, 430, 430, 430, + 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, + 430, 430, 430, 430, 430, 430, 429, 428, 430, 428, + 433, 433, 428, 428, 430, 430, 430, 430, 430, 432, + 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, + 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, + 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, + 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, + 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, + + 430, 430, 430, 430, 430, 430, 430, 428, 433, 433, + 428, 430, 430, 430, 49, 430, 430, 430, 430, 430, + 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, + 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, + 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, + 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, + 49, 430, 430, 430, 430, 430, 430, 430, 430, 430, + 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, + 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, + 430, 430, 428, 428, 428, 428, 430, 430, 430, 430, + + 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, + 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, + 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, + 430, 430, 430, 161, 430, 430, 430, 430, 430, 430, + 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, + 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, + 430, 430, 430, 430, 428, 430, 430, 430, 430, 430, + 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, + 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, + 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, + + 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, + 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, + 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, + 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, + 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, + 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, + 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, + 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, + 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, + 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, + + 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, + 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, + 430, 430, 430, 430, 430, 430, 430, 0, 428, 428, + 428, 428, 428 } ; -static yyconst short int yy_nxt[937] = +static yyconst short int yy_nxt[941] = { 0, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 4, 15, 8, 8, 8, 16, 17, 18, 19, 20, 21, 22, 8, 23, 8, 24, 25, 26, 27, 28, 8, 29, 30, 31, 32, 33, 34, 35, 8, 36, 42, 40, 43, 43, 44, 44, 45, 45, 40, - 46, 85, 40, 40, 47, 48, 48, 40, 47, 48, - 48, 40, 40, 120, 40, 40, 40, 40, 40, 59, - 51, 60, 40, 154, 55, 104, 62, 52, 56, 53, - 63, 54, 61, 57, 49, 64, 58, 40, 40, 65, - 40, 40, 67, 40, 40, 40, 74, 70, 77, 66, - - 40, 40, 68, 71, 75, 40, 72, 73, 69, 76, - 93, 40, 79, 83, 81, 150, 82, 78, 80, 84, - 86, 40, 40, 94, 40, 40, 95, 40, 87, 102, - 119, 88, 111, 96, 89, 40, 106, 109, 109, 105, - 43, 43, 103, 122, 40, 90, 91, 40, 92, 86, - 40, 40, 110, 44, 44, 115, 40, 97, 47, 45, - 45, 40, 137, 116, 98, 117, 99, 121, 100, 112, - 112, 40, 40, 101, 113, 47, 48, 48, 40, 40, - 113, 114, 114, 40, 40, 114, 114, 118, 114, 114, - 114, 114, 114, 114, 40, 40, 40, 130, 40, 123, - - 40, 125, 40, 128, 40, 40, 124, 40, 132, 133, - 126, 40, 127, 40, 138, 129, 40, 40, 40, 135, - 40, 40, 131, 145, 40, 134, 136, 40, 40, 140, - 139, 155, 141, 148, 40, 40, 151, 146, 142, 143, - 40, 144, 153, 147, 40, 149, 40, 152, 156, 40, - 157, 40, 40, 161, 40, 40, 40, 158, 168, 40, - 40, 162, 169, 40, 40, 40, 108, 159, 176, 163, - 164, 182, 160, 165, 167, 40, 166, 170, 172, 174, - 40, 177, 175, 178, 40, 171, 40, 40, 179, 173, - 183, 184, 188, 186, 40, 187, 180, 109, 109, 192, - - 192, 181, 40, 185, 193, 189, 112, 112, 40, 40, - 193, 113, 40, 197, 40, 190, 40, 113, 194, 195, - 40, 196, 196, 40, 40, 199, 40, 198, 40, 201, - 40, 40, 40, 200, 204, 203, 40, 40, 208, 202, - 40, 41, 40, 40, 40, 206, 207, 40, 40, 209, - 205, 210, 211, 215, 40, 40, 216, 40, 40, 213, - 218, 40, 40, 214, 212, 40, 217, 220, 40, 40, - 219, 221, 40, 40, 223, 40, 40, 40, 40, 222, - 226, 40, 224, 40, 227, 40, 263, 263, 40, 323, - 228, 229, 225, 40, 235, 231, 40, 230, 232, 232, - - 40, 40, 232, 232, 233, 232, 232, 232, 232, 232, - 232, 234, 40, 40, 240, 243, 40, 241, 40, 40, - 40, 236, 40, 237, 242, 246, 40, 238, 40, 239, - 244, 247, 245, 40, 40, 251, 40, 40, 40, 40, - 40, 248, 40, 249, 256, 250, 253, 254, 40, 258, - 252, 40, 40, 40, 255, 40, 259, 260, 270, 257, - 262, 192, 192, 40, 40, 261, 193, 194, 194, 40, - 263, 263, 193, 196, 196, 40, 196, 196, 40, 40, - 264, 266, 40, 40, 40, 40, 265, 40, 40, 40, - 268, 40, 269, 273, 40, 40, 276, 271, 40, 267, - - 272, 40, 278, 277, 40, 40, 274, 40, 40, 281, - 275, 40, 40, 40, 282, 40, 280, 40, 40, 40, - 40, 279, 40, 40, 40, 285, 294, 286, 283, 284, - 288, 287, 292, 40, 40, 289, 40, 293, 40, 40, - 40, 40, 290, 291, 40, 296, 40, 298, 300, 302, - 304, 303, 40, 295, 40, 306, 40, 301, 40, 297, - 40, 299, 40, 40, 40, 307, 308, 305, 310, 40, - 40, 309, 40, 40, 263, 263, 40, 311, 40, 40, - 314, 318, 40, 312, 40, 313, 317, 319, 40, 320, - 40, 40, 40, 321, 40, 316, 40, 315, 40, 322, - - 324, 325, 40, 328, 40, 329, 40, 40, 40, 327, - 332, 330, 40, 326, 40, 40, 40, 335, 40, 331, - 40, 337, 338, 40, 334, 339, 40, 340, 40, 333, - 40, 336, 40, 40, 40, 40, 40, 40, 341, 345, - 343, 347, 40, 348, 40, 40, 342, 350, 40, 344, - 40, 40, 40, 40, 40, 346, 349, 352, 354, 353, - 351, 356, 40, 361, 40, 355, 40, 358, 40, 360, - 40, 363, 357, 362, 359, 364, 40, 40, 40, 40, - 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, - 367, 365, 368, 366, 369, 370, 374, 375, 371, 373, - - 376, 372, 40, 40, 377, 40, 40, 380, 40, 40, - 381, 382, 379, 40, 40, 40, 40, 378, 383, 40, - 40, 40, 40, 40, 385, 40, 40, 40, 389, 386, - 40, 384, 387, 390, 40, 393, 391, 40, 40, 388, - 392, 40, 397, 396, 40, 400, 394, 40, 395, 401, - 40, 40, 398, 40, 399, 40, 407, 40, 40, 40, - 40, 40, 405, 402, 406, 40, 408, 40, 410, 403, - 414, 40, 40, 409, 404, 40, 40, 40, 412, 40, - 40, 40, 40, 411, 413, 415, 40, 420, 416, 40, - 40, 40, 40, 40, 418, 424, 417, 40, 40, 423, - - 419, 40, 40, 40, 422, 40, 40, 40, 40, 421, - 425, 37, 37, 37, 37, 39, 39, 50, 40, 50, - 50, 40, 40, 40, 40, 40, 40, 40, 40, 40, + 46, 40, 40, 40, 47, 48, 48, 40, 47, 48, + 48, 40, 232, 40, 184, 40, 40, 40, 40, 80, + 60, 51, 61, 40, 116, 81, 86, 56, 52, 40, + 53, 57, 54, 62, 49, 55, 58, 40, 63, 59, + 66, 40, 64, 40, 40, 40, 68, 65, 40, 40, + + 67, 147, 71, 73, 74, 40, 69, 105, 72, 40, + 75, 84, 70, 82, 78, 83, 40, 85, 76, 40, + 40, 40, 40, 77, 94, 103, 110, 110, 43, 43, + 40, 107, 112, 79, 87, 40, 40, 95, 104, 106, + 96, 132, 88, 110, 110, 89, 121, 97, 90, 111, + 44, 44, 47, 45, 45, 40, 113, 113, 40, 91, + 92, 114, 93, 87, 40, 40, 40, 114, 40, 109, + 40, 98, 47, 48, 48, 40, 119, 117, 99, 118, + 100, 122, 101, 40, 40, 120, 40, 102, 115, 115, + 40, 40, 115, 115, 123, 115, 115, 115, 115, 115, + + 115, 125, 124, 40, 40, 40, 40, 40, 126, 40, + 127, 40, 130, 40, 134, 133, 135, 40, 40, 128, + 140, 129, 137, 40, 131, 40, 40, 40, 40, 138, + 40, 139, 136, 150, 40, 156, 142, 40, 40, 40, + 141, 40, 143, 148, 40, 151, 40, 144, 145, 149, + 146, 40, 152, 153, 155, 162, 40, 154, 40, 157, + 159, 40, 40, 163, 158, 40, 40, 160, 161, 40, + 40, 164, 170, 40, 171, 40, 169, 166, 172, 165, + 167, 40, 174, 168, 40, 40, 173, 40, 40, 176, + 190, 40, 178, 175, 41, 180, 40, 40, 40, 179, + + 181, 177, 185, 186, 188, 191, 189, 199, 182, 192, + 202, 194, 194, 183, 40, 187, 195, 40, 113, 113, + 40, 40, 195, 114, 40, 40, 40, 196, 197, 114, + 198, 198, 40, 201, 206, 200, 203, 205, 40, 40, + 204, 40, 40, 40, 40, 40, 40, 40, 210, 40, + 40, 40, 212, 40, 208, 213, 209, 211, 217, 218, + 207, 40, 40, 40, 221, 40, 40, 214, 216, 215, + 219, 220, 222, 40, 40, 223, 40, 40, 40, 40, + 224, 40, 225, 40, 40, 228, 40, 40, 226, 229, + 40, 40, 40, 40, 230, 237, 231, 40, 40, 227, + + 233, 234, 234, 246, 40, 234, 234, 235, 234, 234, + 234, 234, 234, 234, 236, 40, 244, 40, 242, 243, + 40, 40, 40, 247, 238, 40, 239, 40, 40, 40, + 240, 248, 241, 40, 249, 245, 253, 40, 40, 40, + 250, 40, 255, 40, 251, 252, 254, 40, 258, 40, + 256, 40, 40, 265, 265, 261, 257, 262, 260, 264, + 259, 194, 194, 40, 40, 263, 195, 196, 196, 40, + 265, 265, 195, 198, 198, 40, 198, 198, 40, 40, + 266, 268, 40, 40, 40, 40, 267, 40, 40, 272, + 270, 40, 271, 275, 40, 40, 40, 40, 273, 269, + + 278, 40, 274, 40, 280, 279, 40, 40, 40, 40, + 276, 283, 40, 40, 40, 277, 284, 40, 282, 40, + 40, 40, 40, 40, 281, 40, 287, 40, 288, 285, + 286, 40, 289, 40, 290, 291, 294, 40, 295, 40, + 296, 297, 40, 40, 292, 293, 298, 40, 300, 40, + 40, 302, 304, 40, 303, 40, 305, 40, 309, 306, + 299, 40, 301, 40, 308, 40, 40, 310, 307, 40, + 312, 40, 40, 40, 311, 40, 265, 265, 40, 40, + 313, 40, 316, 320, 40, 40, 322, 314, 319, 321, + 315, 325, 40, 40, 40, 40, 318, 323, 40, 317, + + 40, 40, 326, 40, 40, 324, 40, 330, 331, 40, + 40, 327, 332, 40, 40, 329, 40, 40, 328, 333, + 40, 40, 334, 337, 340, 339, 40, 336, 40, 341, + 338, 40, 335, 40, 40, 342, 40, 40, 40, 343, + 40, 40, 40, 345, 349, 347, 350, 40, 40, 40, + 40, 344, 352, 40, 40, 40, 346, 348, 40, 40, + 354, 356, 358, 351, 360, 353, 355, 357, 40, 40, + 40, 40, 40, 40, 362, 40, 359, 363, 361, 364, + 365, 40, 40, 40, 369, 370, 40, 40, 366, 368, + 367, 40, 40, 40, 40, 40, 372, 371, 40, 40, + + 40, 376, 377, 373, 381, 40, 375, 40, 40, 40, + 374, 378, 383, 379, 380, 40, 40, 385, 40, 40, + 384, 40, 382, 40, 388, 40, 40, 387, 386, 40, + 391, 40, 394, 40, 40, 389, 392, 40, 396, 398, + 393, 40, 390, 40, 395, 40, 40, 40, 403, 40, + 40, 40, 40, 399, 40, 40, 397, 40, 401, 40, + 407, 402, 40, 404, 408, 40, 410, 40, 405, 411, + 400, 412, 40, 406, 40, 40, 40, 40, 414, 40, + 40, 409, 413, 416, 415, 417, 40, 40, 422, 40, + 40, 40, 418, 40, 40, 420, 40, 419, 40, 426, + + 40, 40, 421, 40, 40, 40, 425, 40, 40, 40, + 424, 40, 427, 40, 40, 423, 37, 37, 37, 37, + 39, 39, 50, 40, 50, 50, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, - 40, 40, 40, 40, 40, 191, 40, 40, 40, 40, - 107, 40, 38, 426, 3, 426, 426, 426, 426, 426, + 40, 40, 40, 40, 40, 40, 40, 40, 40, 193, + 40, 40, 40, 40, 108, 40, 38, 428, 3, 428, - 426, 426, 426, 426, 426, 426, 426, 426, 426, 426, - 426, 426, 426, 426, 426, 426, 426, 426, 426, 426, - 426, 426, 426, 426, 426, 426, 426, 426, 426, 426, - 426, 426, 426, 426, 426, 426 + 428, 428, 428, 428, 428, 428, 428, 428, 428, 428, + 428, 428, 428, 428, 428, 428, 428, 428, 428, 428, + 428, 428, 428, 428, 428, 428, 428, 428, 428, 428, + 428, 428, 428, 428, 428, 428, 428, 428, 428, 428 } ; -static yyconst short int yy_chk[937] = +static yyconst short int yy_chk[941] = { 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 9, 29, 9, 9, 10, 10, 11, 11, 11, - 12, 29, 55, 12, 13, 13, 13, 13, 14, 14, - 14, 14, 16, 55, 18, 17, 34, 19, 81, 18, - 16, 18, 20, 81, 17, 34, 19, 16, 17, 16, - 19, 16, 18, 17, 13, 19, 17, 21, 22, 20, - 23, 24, 21, 25, 26, 27, 24, 22, 25, 20, - - 77, 28, 21, 22, 24, 31, 23, 23, 21, 24, - 31, 54, 26, 28, 27, 77, 27, 25, 26, 28, - 30, 35, 30, 31, 33, 57, 31, 36, 30, 33, - 54, 30, 46, 31, 30, 46, 36, 42, 42, 35, - 43, 43, 33, 57, 68, 30, 30, 51, 30, 32, - 52, 32, 44, 44, 44, 51, 56, 32, 45, 45, - 45, 45, 68, 52, 32, 52, 32, 56, 32, 47, - 47, 47, 63, 32, 47, 48, 48, 48, 48, 53, - 47, 49, 49, 49, 59, 49, 49, 53, 49, 49, - 49, 49, 49, 49, 60, 61, 62, 63, 64, 59, - - 65, 60, 66, 62, 67, 69, 59, 70, 65, 66, - 61, 71, 61, 72, 69, 62, 73, 74, 83, 67, - 75, 78, 64, 74, 79, 66, 67, 80, 76, 71, - 70, 83, 72, 76, 85, 84, 78, 75, 73, 73, - 86, 73, 80, 75, 87, 76, 88, 79, 84, 92, - 85, 98, 91, 88, 97, 89, 90, 85, 91, 101, - 96, 88, 92, 99, 93, 95, 431, 86, 98, 88, - 89, 101, 87, 89, 90, 100, 89, 93, 95, 96, - 103, 99, 97, 100, 105, 93, 102, 104, 100, 95, - 102, 102, 104, 103, 106, 103, 100, 109, 109, 110, - - 110, 100, 116, 102, 110, 105, 112, 112, 112, 117, - 110, 112, 124, 116, 122, 106, 119, 112, 113, 113, - 120, 113, 113, 113, 123, 119, 126, 117, 127, 122, - 128, 129, 131, 120, 126, 124, 132, 135, 131, 123, - 136, 429, 133, 134, 425, 128, 129, 138, 137, 132, - 127, 133, 134, 137, 140, 141, 138, 139, 142, 135, - 140, 144, 143, 136, 134, 145, 139, 142, 146, 147, - 141, 143, 148, 149, 145, 150, 153, 154, 156, 144, - 148, 160, 146, 271, 149, 162, 194, 194, 161, 271, - 150, 153, 147, 165, 162, 156, 167, 154, 159, 159, - - 170, 169, 159, 159, 160, 159, 159, 159, 159, 159, - 159, 161, 163, 172, 165, 170, 173, 167, 175, 171, - 176, 163, 174, 163, 169, 173, 178, 163, 177, 163, - 171, 174, 172, 179, 181, 178, 182, 180, 184, 183, - 185, 175, 190, 176, 183, 177, 180, 181, 186, 185, - 179, 188, 187, 206, 182, 423, 186, 187, 206, 184, - 190, 192, 192, 197, 199, 188, 192, 193, 193, 205, - 193, 193, 192, 195, 195, 195, 196, 196, 196, 198, - 197, 199, 200, 204, 207, 208, 198, 210, 209, 211, - 204, 212, 205, 209, 213, 214, 212, 207, 215, 200, - - 208, 217, 214, 213, 218, 219, 210, 220, 221, 218, - 211, 222, 223, 224, 219, 225, 217, 228, 230, 235, - 231, 215, 422, 233, 234, 222, 235, 223, 220, 221, - 225, 224, 233, 236, 240, 228, 237, 234, 238, 239, - 241, 244, 230, 231, 242, 237, 248, 238, 239, 241, - 244, 242, 245, 236, 250, 248, 251, 240, 252, 237, - 254, 238, 255, 253, 256, 250, 251, 245, 253, 257, - 258, 252, 260, 262, 263, 263, 265, 254, 270, 266, - 257, 265, 268, 255, 273, 256, 262, 266, 269, 268, - 274, 272, 275, 269, 282, 260, 276, 258, 278, 270, - - 272, 273, 280, 276, 281, 278, 283, 284, 285, 275, - 282, 280, 288, 274, 287, 289, 290, 285, 291, 281, - 293, 288, 289, 294, 284, 290, 304, 291, 303, 283, - 305, 287, 309, 312, 310, 311, 313, 315, 293, 305, - 303, 310, 317, 311, 316, 319, 294, 313, 321, 304, - 323, 328, 322, 330, 332, 309, 312, 316, 319, 317, - 315, 322, 327, 332, 333, 321, 334, 327, 336, 330, - 340, 334, 323, 333, 328, 336, 341, 346, 355, 352, - 347, 354, 353, 361, 358, 365, 420, 359, 360, 362, - 346, 340, 347, 341, 352, 353, 359, 360, 354, 358, - - 361, 355, 363, 364, 362, 367, 368, 365, 370, 369, - 367, 368, 364, 371, 374, 375, 376, 363, 369, 377, - 380, 381, 384, 390, 371, 387, 389, 399, 377, 374, - 392, 370, 375, 380, 382, 384, 381, 386, 388, 376, - 382, 391, 389, 388, 393, 392, 386, 394, 387, 393, - 395, 396, 390, 397, 391, 398, 399, 400, 401, 402, - 403, 407, 397, 394, 398, 404, 400, 405, 402, 395, - 407, 410, 409, 401, 396, 411, 412, 413, 404, 414, - 415, 416, 418, 403, 405, 409, 421, 414, 410, 424, - 419, 417, 408, 406, 412, 421, 411, 385, 383, 418, - - 413, 379, 378, 373, 416, 372, 366, 357, 356, 415, - 424, 427, 427, 427, 427, 428, 428, 430, 351, 430, - 430, 350, 349, 348, 345, 344, 343, 342, 339, 338, - 337, 335, 331, 329, 326, 325, 324, 320, 318, 314, - 308, 307, 306, 302, 301, 300, 299, 298, 297, 296, - 295, 292, 286, 279, 277, 267, 264, 261, 259, 249, - 247, 246, 243, 229, 227, 226, 216, 203, 202, 201, - 189, 168, 166, 164, 158, 157, 155, 152, 151, 130, - 125, 121, 118, 115, 111, 107, 94, 82, 58, 39, - 37, 8, 7, 3, 426, 426, 426, 426, 426, 426, - - 426, 426, 426, 426, 426, 426, 426, 426, 426, 426, - 426, 426, 426, 426, 426, 426, 426, 426, 426, 426, - 426, 426, 426, 426, 426, 426, 426, 426, 426, 426, - 426, 426, 426, 426, 426, 426 + 1, 9, 156, 9, 9, 10, 10, 11, 11, 11, + 12, 26, 102, 12, 13, 13, 13, 13, 14, 14, + 14, 14, 156, 16, 102, 18, 51, 29, 17, 26, + 18, 16, 18, 20, 51, 26, 29, 17, 16, 19, + 16, 17, 16, 18, 13, 16, 17, 23, 19, 17, + 20, 21, 19, 22, 27, 75, 21, 19, 34, 28, + + 20, 75, 22, 23, 23, 24, 21, 34, 22, 25, + 24, 28, 21, 27, 25, 27, 64, 28, 24, 31, + 33, 35, 36, 24, 31, 33, 42, 42, 43, 43, + 55, 36, 46, 25, 30, 46, 30, 31, 33, 35, + 31, 64, 30, 110, 110, 30, 55, 31, 30, 44, + 44, 44, 45, 45, 45, 45, 47, 47, 47, 30, + 30, 47, 30, 32, 52, 32, 54, 47, 53, 433, + 56, 32, 48, 48, 48, 48, 53, 52, 32, 52, + 32, 56, 32, 57, 58, 54, 60, 32, 49, 49, + 49, 65, 49, 49, 57, 49, 49, 49, 49, 49, + + 49, 60, 58, 61, 62, 63, 66, 68, 60, 67, + 61, 70, 63, 69, 66, 65, 67, 71, 72, 62, + 70, 62, 68, 73, 63, 74, 76, 88, 77, 68, + 82, 69, 67, 77, 80, 82, 72, 78, 79, 81, + 71, 87, 73, 76, 86, 77, 84, 74, 74, 76, + 74, 85, 78, 79, 81, 88, 89, 80, 91, 84, + 86, 93, 90, 89, 85, 94, 92, 86, 87, 96, + 97, 89, 92, 98, 93, 99, 91, 90, 94, 89, + 90, 100, 96, 90, 106, 105, 94, 101, 107, 97, + 105, 104, 99, 96, 431, 101, 117, 122, 103, 100, + + 101, 98, 103, 103, 104, 106, 104, 117, 101, 107, + 122, 111, 111, 101, 126, 103, 111, 118, 113, 113, + 113, 124, 111, 113, 120, 125, 128, 114, 114, 113, + 114, 114, 114, 120, 128, 118, 124, 126, 129, 130, + 125, 131, 133, 135, 134, 138, 136, 137, 133, 143, + 140, 427, 135, 139, 130, 136, 131, 134, 139, 140, + 129, 141, 146, 144, 143, 142, 145, 136, 138, 137, + 141, 142, 144, 147, 148, 145, 149, 150, 151, 152, + 146, 155, 147, 158, 162, 150, 164, 425, 148, 151, + 424, 163, 173, 171, 152, 164, 155, 167, 169, 149, + + 158, 161, 161, 173, 174, 161, 161, 162, 161, 161, + 161, 161, 161, 161, 163, 165, 171, 177, 167, 169, + 172, 178, 175, 174, 165, 176, 165, 180, 179, 181, + 165, 175, 165, 182, 176, 172, 180, 183, 184, 186, + 177, 192, 182, 185, 178, 179, 181, 188, 185, 187, + 183, 190, 189, 196, 196, 188, 184, 189, 187, 192, + 186, 194, 194, 199, 201, 190, 194, 195, 195, 207, + 195, 195, 194, 197, 197, 197, 198, 198, 198, 200, + 199, 201, 202, 206, 208, 209, 200, 210, 211, 208, + 206, 212, 207, 211, 213, 214, 215, 216, 209, 202, + + 214, 217, 210, 219, 216, 215, 220, 221, 222, 223, + 212, 220, 224, 225, 226, 213, 221, 230, 219, 227, + 232, 238, 233, 422, 217, 236, 224, 235, 225, 222, + 223, 242, 226, 237, 227, 230, 235, 239, 236, 240, + 237, 238, 241, 243, 232, 233, 239, 252, 240, 244, + 246, 241, 243, 247, 242, 250, 244, 253, 252, 246, + 239, 254, 240, 256, 250, 255, 257, 253, 247, 258, + 255, 259, 260, 262, 254, 264, 265, 265, 267, 270, + 256, 268, 259, 267, 272, 273, 270, 257, 264, 268, + 258, 273, 271, 274, 275, 276, 262, 271, 277, 260, + + 278, 280, 274, 282, 283, 272, 284, 278, 280, 285, + 286, 275, 282, 289, 287, 277, 290, 291, 276, 283, + 292, 295, 284, 287, 291, 290, 293, 286, 296, 292, + 289, 305, 285, 306, 311, 293, 307, 312, 313, 295, + 314, 315, 317, 305, 312, 307, 313, 318, 321, 319, + 323, 296, 315, 324, 325, 330, 306, 311, 332, 329, + 318, 321, 324, 314, 329, 317, 319, 323, 334, 342, + 335, 348, 343, 349, 332, 336, 325, 334, 330, 335, + 336, 338, 354, 355, 348, 349, 356, 357, 338, 343, + 342, 360, 361, 362, 363, 366, 355, 354, 364, 365, + + 367, 361, 362, 356, 366, 372, 360, 369, 371, 376, + 357, 363, 369, 364, 365, 370, 373, 371, 377, 378, + 370, 379, 367, 382, 376, 383, 384, 373, 372, 388, + 379, 386, 384, 389, 390, 377, 382, 391, 388, 390, + 383, 392, 378, 395, 386, 393, 394, 396, 395, 397, + 398, 399, 401, 391, 403, 400, 389, 402, 393, 405, + 399, 394, 404, 396, 400, 406, 402, 407, 397, 403, + 392, 404, 411, 398, 409, 412, 413, 414, 406, 415, + 416, 401, 405, 409, 407, 411, 417, 418, 416, 420, + 423, 426, 412, 421, 419, 414, 410, 413, 408, 423, + + 387, 385, 415, 381, 380, 375, 420, 374, 368, 359, + 418, 358, 426, 353, 352, 417, 429, 429, 429, 429, + 430, 430, 432, 351, 432, 432, 350, 347, 346, 345, + 344, 341, 340, 339, 337, 333, 331, 328, 327, 326, + 322, 320, 316, 310, 309, 308, 304, 303, 302, 301, + 300, 299, 298, 297, 294, 288, 281, 279, 269, 266, + 263, 261, 251, 249, 248, 245, 231, 229, 228, 218, + 205, 204, 203, 191, 170, 168, 166, 160, 159, 157, + 154, 153, 132, 127, 123, 121, 119, 116, 112, 108, + 95, 83, 59, 39, 37, 8, 7, 3, 428, 428, + + 428, 428, 428, 428, 428, 428, 428, 428, 428, 428, + 428, 428, 428, 428, 428, 428, 428, 428, 428, 428, + 428, 428, 428, 428, 428, 428, 428, 428, 428, 428, + 428, 428, 428, 428, 428, 428, 428, 428, 428, 428 } ; static yy_state_type yy_state_buf[YY_BUF_SIZE + 2], *yy_state_ptr; @@ -757,7 +758,7 @@ #define YY_MORE_ADJ 0 #define YY_RESTORE_YY_MORE_OFFSET char *yytext; -#line 1 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" +#line 1 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" #define INITIAL 0 /*===-- Lexer.l - Scanner for llvm assembly files --------------*- C++ -*--===// // @@ -772,7 +773,7 @@ // //===----------------------------------------------------------------------===*/ #define YY_NEVER_INTERACTIVE 1 -#line 28 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" +#line 28 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" #include "ParserInternals.h" #include "llvm/Module.h" #include @@ -898,7 +899,7 @@ /* HexIntConstant - Hexadecimal constant generated by the CFE to avoid forcing * it to deal with 64 bit numbers. */ -#line 902 "Lexer.cpp" +#line 903 "Lexer.cpp" /* Macros after this point can all be overridden by user definitions in * section 1. @@ -1049,10 +1050,10 @@ register char *yy_cp, *yy_bp; register int yy_act; -#line 179 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" +#line 179 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -#line 1056 "Lexer.cpp" +#line 1057 "Lexer.cpp" if ( yy_init ) { @@ -1100,14 +1101,14 @@ while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) { yy_current_state = (int) yy_def[yy_current_state]; - if ( yy_current_state >= 427 ) + if ( yy_current_state >= 429 ) yy_c = yy_meta[(unsigned int) yy_c]; } yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c]; *yy_state_ptr++ = yy_current_state; ++yy_cp; } - while ( yy_current_state != 426 ); + while ( yy_current_state != 428 ); yy_find_action: yy_current_state = *--yy_state_ptr; @@ -1145,461 +1146,466 @@ { /* beginning of action switch */ case 1: YY_RULE_SETUP -#line 181 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" +#line 181 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" { /* Ignore comments for now */ } YY_BREAK case 2: YY_RULE_SETUP -#line 183 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" +#line 183 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" { return BEGINTOK; } YY_BREAK case 3: YY_RULE_SETUP -#line 184 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" +#line 184 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" { return ENDTOK; } YY_BREAK case 4: YY_RULE_SETUP -#line 185 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" +#line 185 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" { return TRUETOK; } YY_BREAK case 5: YY_RULE_SETUP -#line 186 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" +#line 186 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" { return FALSETOK; } YY_BREAK case 6: YY_RULE_SETUP -#line 187 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" +#line 187 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" { return DECLARE; } YY_BREAK case 7: YY_RULE_SETUP -#line 188 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" +#line 188 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" { return GLOBAL; } YY_BREAK case 8: YY_RULE_SETUP -#line 189 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" +#line 189 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" { return CONSTANT; } YY_BREAK case 9: YY_RULE_SETUP -#line 190 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" +#line 190 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" { return INTERNAL; } YY_BREAK case 10: YY_RULE_SETUP -#line 191 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" +#line 191 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" { return LINKONCE; } YY_BREAK case 11: YY_RULE_SETUP -#line 192 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" +#line 192 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" { return WEAK; } YY_BREAK case 12: YY_RULE_SETUP -#line 193 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" +#line 193 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" { return APPENDING; } YY_BREAK case 13: YY_RULE_SETUP -#line 194 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" +#line 194 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" { return EXTERNAL; } /* Deprecated, turn into external */ YY_BREAK case 14: YY_RULE_SETUP -#line 195 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" +#line 195 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" { return EXTERNAL; } YY_BREAK case 15: YY_RULE_SETUP -#line 196 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" +#line 196 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" { return IMPLEMENTATION; } YY_BREAK case 16: YY_RULE_SETUP -#line 197 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" +#line 197 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" { return ZEROINITIALIZER; } YY_BREAK case 17: YY_RULE_SETUP -#line 198 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" +#line 198 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" { return DOTDOTDOT; } YY_BREAK case 18: YY_RULE_SETUP -#line 199 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" +#line 199 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" { return UNDEF; } YY_BREAK case 19: YY_RULE_SETUP -#line 200 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" +#line 200 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" { return NULL_TOK; } YY_BREAK case 20: YY_RULE_SETUP -#line 201 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" +#line 201 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" { return TO; } YY_BREAK case 21: YY_RULE_SETUP -#line 202 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" +#line 202 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" { RET_TOK(TermOpVal, Unwind, UNWIND); } YY_BREAK case 22: YY_RULE_SETUP -#line 203 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" +#line 203 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" { return NOT; } /* Deprecated, turned into XOR */ YY_BREAK case 23: YY_RULE_SETUP -#line 204 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" +#line 204 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" { return TAIL; } YY_BREAK case 24: YY_RULE_SETUP -#line 205 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" +#line 205 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" { return TARGET; } YY_BREAK case 25: YY_RULE_SETUP -#line 206 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" +#line 206 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" { return TRIPLE; } YY_BREAK case 26: YY_RULE_SETUP -#line 207 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" +#line 207 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" { return DEPLIBS; } YY_BREAK case 27: YY_RULE_SETUP -#line 208 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" +#line 208 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" { return ENDIAN; } YY_BREAK case 28: YY_RULE_SETUP -#line 209 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" +#line 209 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" { return POINTERSIZE; } YY_BREAK case 29: YY_RULE_SETUP -#line 210 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" +#line 210 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" { return LITTLE; } YY_BREAK case 30: YY_RULE_SETUP -#line 211 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" +#line 211 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" { return BIG; } YY_BREAK case 31: YY_RULE_SETUP -#line 212 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" +#line 212 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" { return VOLATILE; } YY_BREAK case 32: YY_RULE_SETUP -#line 213 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" +#line 213 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" { return ALIGN; } YY_BREAK case 33: YY_RULE_SETUP -#line 214 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" +#line 214 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" { return SECTION; } YY_BREAK case 34: YY_RULE_SETUP -#line 216 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" -{ return CC_TOK; } +#line 215 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ return ASM_TOK; } YY_BREAK case 35: YY_RULE_SETUP -#line 217 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" -{ return CCC_TOK; } +#line 217 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ return CC_TOK; } YY_BREAK case 36: YY_RULE_SETUP -#line 218 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" -{ return FASTCC_TOK; } +#line 218 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ return CCC_TOK; } YY_BREAK case 37: YY_RULE_SETUP -#line 219 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" -{ return COLDCC_TOK; } +#line 219 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ return FASTCC_TOK; } YY_BREAK case 38: YY_RULE_SETUP -#line 221 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" -{ llvmAsmlval.PrimType = Type::VoidTy ; return VOID; } +#line 220 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ return COLDCC_TOK; } YY_BREAK case 39: YY_RULE_SETUP -#line 222 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" -{ llvmAsmlval.PrimType = Type::BoolTy ; return BOOL; } +#line 222 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ llvmAsmlval.PrimType = Type::VoidTy ; return VOID; } YY_BREAK case 40: YY_RULE_SETUP -#line 223 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" -{ llvmAsmlval.PrimType = Type::SByteTy ; return SBYTE; } +#line 223 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ llvmAsmlval.PrimType = Type::BoolTy ; return BOOL; } YY_BREAK case 41: YY_RULE_SETUP -#line 224 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" -{ llvmAsmlval.PrimType = Type::UByteTy ; return UBYTE; } +#line 224 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ llvmAsmlval.PrimType = Type::SByteTy ; return SBYTE; } YY_BREAK case 42: YY_RULE_SETUP -#line 225 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" -{ llvmAsmlval.PrimType = Type::ShortTy ; return SHORT; } +#line 225 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ llvmAsmlval.PrimType = Type::UByteTy ; return UBYTE; } YY_BREAK case 43: YY_RULE_SETUP -#line 226 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" -{ llvmAsmlval.PrimType = Type::UShortTy; return USHORT; } +#line 226 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ llvmAsmlval.PrimType = Type::ShortTy ; return SHORT; } YY_BREAK case 44: YY_RULE_SETUP -#line 227 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" -{ llvmAsmlval.PrimType = Type::IntTy ; return INT; } +#line 227 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ llvmAsmlval.PrimType = Type::UShortTy; return USHORT; } YY_BREAK case 45: YY_RULE_SETUP -#line 228 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" -{ llvmAsmlval.PrimType = Type::UIntTy ; return UINT; } +#line 228 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ llvmAsmlval.PrimType = Type::IntTy ; return INT; } YY_BREAK case 46: YY_RULE_SETUP -#line 229 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" -{ llvmAsmlval.PrimType = Type::LongTy ; return LONG; } +#line 229 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ llvmAsmlval.PrimType = Type::UIntTy ; return UINT; } YY_BREAK case 47: YY_RULE_SETUP -#line 230 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" -{ llvmAsmlval.PrimType = Type::ULongTy ; return ULONG; } +#line 230 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ llvmAsmlval.PrimType = Type::LongTy ; return LONG; } YY_BREAK case 48: YY_RULE_SETUP -#line 231 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" -{ llvmAsmlval.PrimType = Type::FloatTy ; return FLOAT; } +#line 231 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ llvmAsmlval.PrimType = Type::ULongTy ; return ULONG; } YY_BREAK case 49: YY_RULE_SETUP -#line 232 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" -{ llvmAsmlval.PrimType = Type::DoubleTy; return DOUBLE; } +#line 232 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ llvmAsmlval.PrimType = Type::FloatTy ; return FLOAT; } YY_BREAK case 50: YY_RULE_SETUP -#line 233 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" -{ llvmAsmlval.PrimType = Type::LabelTy ; return LABEL; } +#line 233 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ llvmAsmlval.PrimType = Type::DoubleTy; return DOUBLE; } YY_BREAK case 51: YY_RULE_SETUP -#line 234 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" -{ return TYPE; } +#line 234 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ llvmAsmlval.PrimType = Type::LabelTy ; return LABEL; } YY_BREAK case 52: YY_RULE_SETUP -#line 235 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" -{ return OPAQUE; } +#line 235 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ return TYPE; } YY_BREAK case 53: YY_RULE_SETUP -#line 237 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" -{ RET_TOK(BinaryOpVal, Add, ADD); } +#line 236 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ return OPAQUE; } YY_BREAK case 54: YY_RULE_SETUP -#line 238 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" -{ RET_TOK(BinaryOpVal, Sub, SUB); } +#line 238 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(BinaryOpVal, Add, ADD); } YY_BREAK case 55: YY_RULE_SETUP -#line 239 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" -{ RET_TOK(BinaryOpVal, Mul, MUL); } +#line 239 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(BinaryOpVal, Sub, SUB); } YY_BREAK case 56: YY_RULE_SETUP -#line 240 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" -{ RET_TOK(BinaryOpVal, Div, DIV); } +#line 240 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(BinaryOpVal, Mul, MUL); } YY_BREAK case 57: YY_RULE_SETUP -#line 241 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" -{ RET_TOK(BinaryOpVal, Rem, REM); } +#line 241 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(BinaryOpVal, Div, DIV); } YY_BREAK case 58: YY_RULE_SETUP -#line 242 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" -{ RET_TOK(BinaryOpVal, And, AND); } +#line 242 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(BinaryOpVal, Rem, REM); } YY_BREAK case 59: YY_RULE_SETUP -#line 243 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" -{ RET_TOK(BinaryOpVal, Or , OR ); } +#line 243 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(BinaryOpVal, And, AND); } YY_BREAK case 60: YY_RULE_SETUP -#line 244 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" -{ RET_TOK(BinaryOpVal, Xor, XOR); } +#line 244 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(BinaryOpVal, Or , OR ); } YY_BREAK case 61: YY_RULE_SETUP -#line 245 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" -{ RET_TOK(BinaryOpVal, SetNE, SETNE); } +#line 245 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(BinaryOpVal, Xor, XOR); } YY_BREAK case 62: YY_RULE_SETUP -#line 246 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" -{ RET_TOK(BinaryOpVal, SetEQ, SETEQ); } +#line 246 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(BinaryOpVal, SetNE, SETNE); } YY_BREAK case 63: YY_RULE_SETUP -#line 247 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" -{ RET_TOK(BinaryOpVal, SetLT, SETLT); } +#line 247 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(BinaryOpVal, SetEQ, SETEQ); } YY_BREAK case 64: YY_RULE_SETUP -#line 248 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" -{ RET_TOK(BinaryOpVal, SetGT, SETGT); } +#line 248 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(BinaryOpVal, SetLT, SETLT); } YY_BREAK case 65: YY_RULE_SETUP -#line 249 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" -{ RET_TOK(BinaryOpVal, SetLE, SETLE); } +#line 249 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(BinaryOpVal, SetGT, SETGT); } YY_BREAK case 66: YY_RULE_SETUP -#line 250 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" -{ RET_TOK(BinaryOpVal, SetGE, SETGE); } +#line 250 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(BinaryOpVal, SetLE, SETLE); } YY_BREAK case 67: YY_RULE_SETUP -#line 252 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" -{ RET_TOK(OtherOpVal, PHI, PHI_TOK); } +#line 251 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(BinaryOpVal, SetGE, SETGE); } YY_BREAK case 68: YY_RULE_SETUP -#line 253 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" -{ RET_TOK(OtherOpVal, Call, CALL); } +#line 253 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(OtherOpVal, PHI, PHI_TOK); } YY_BREAK case 69: YY_RULE_SETUP -#line 254 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" -{ RET_TOK(OtherOpVal, Cast, CAST); } +#line 254 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(OtherOpVal, Call, CALL); } YY_BREAK case 70: YY_RULE_SETUP -#line 255 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" -{ RET_TOK(OtherOpVal, Select, SELECT); } +#line 255 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(OtherOpVal, Cast, CAST); } YY_BREAK case 71: YY_RULE_SETUP -#line 256 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" -{ RET_TOK(OtherOpVal, Shl, SHL); } +#line 256 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(OtherOpVal, Select, SELECT); } YY_BREAK case 72: YY_RULE_SETUP -#line 257 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" -{ RET_TOK(OtherOpVal, Shr, SHR); } +#line 257 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(OtherOpVal, Shl, SHL); } YY_BREAK case 73: YY_RULE_SETUP -#line 258 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" -{ return VANEXT_old; } +#line 258 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(OtherOpVal, Shr, SHR); } YY_BREAK case 74: YY_RULE_SETUP -#line 259 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" -{ return VAARG_old; } +#line 259 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ return VANEXT_old; } YY_BREAK case 75: YY_RULE_SETUP -#line 260 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" -{ RET_TOK(OtherOpVal, VAArg , VAARG); } +#line 260 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ return VAARG_old; } YY_BREAK case 76: YY_RULE_SETUP -#line 261 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" -{ RET_TOK(TermOpVal, Ret, RET); } +#line 261 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(OtherOpVal, VAArg , VAARG); } YY_BREAK case 77: YY_RULE_SETUP -#line 262 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" -{ RET_TOK(TermOpVal, Br, BR); } +#line 262 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(TermOpVal, Ret, RET); } YY_BREAK case 78: YY_RULE_SETUP -#line 263 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" -{ RET_TOK(TermOpVal, Switch, SWITCH); } +#line 263 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(TermOpVal, Br, BR); } YY_BREAK case 79: YY_RULE_SETUP -#line 264 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" -{ RET_TOK(TermOpVal, Invoke, INVOKE); } +#line 264 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(TermOpVal, Switch, SWITCH); } YY_BREAK case 80: YY_RULE_SETUP -#line 265 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" -{ RET_TOK(TermOpVal, Unwind, UNWIND); } +#line 265 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(TermOpVal, Invoke, INVOKE); } YY_BREAK case 81: YY_RULE_SETUP -#line 266 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" -{ RET_TOK(TermOpVal, Unreachable, UNREACHABLE); } +#line 266 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(TermOpVal, Unwind, UNWIND); } YY_BREAK case 82: YY_RULE_SETUP -#line 268 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" -{ RET_TOK(MemOpVal, Malloc, MALLOC); } +#line 267 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(TermOpVal, Unreachable, UNREACHABLE); } YY_BREAK case 83: YY_RULE_SETUP -#line 269 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" -{ RET_TOK(MemOpVal, Alloca, ALLOCA); } +#line 269 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(MemOpVal, Malloc, MALLOC); } YY_BREAK case 84: YY_RULE_SETUP -#line 270 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" -{ RET_TOK(MemOpVal, Free, FREE); } +#line 270 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(MemOpVal, Alloca, ALLOCA); } YY_BREAK case 85: YY_RULE_SETUP -#line 271 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" -{ RET_TOK(MemOpVal, Load, LOAD); } +#line 271 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(MemOpVal, Free, FREE); } YY_BREAK case 86: YY_RULE_SETUP -#line 272 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" -{ RET_TOK(MemOpVal, Store, STORE); } +#line 272 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(MemOpVal, Load, LOAD); } YY_BREAK case 87: YY_RULE_SETUP -#line 273 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" -{ RET_TOK(MemOpVal, GetElementPtr, GETELEMENTPTR); } +#line 273 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(MemOpVal, Store, STORE); } YY_BREAK case 88: YY_RULE_SETUP -#line 275 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" -{ RET_TOK(OtherOpVal, ExtractElement, EXTRACTELEMENT); } +#line 274 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(MemOpVal, GetElementPtr, GETELEMENTPTR); } YY_BREAK case 89: YY_RULE_SETUP -#line 276 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" -{ RET_TOK(OtherOpVal, InsertElement, INSERTELEMENT); } +#line 276 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(OtherOpVal, ExtractElement, EXTRACTELEMENT); } YY_BREAK case 90: YY_RULE_SETUP -#line 279 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" +#line 277 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(OtherOpVal, InsertElement, INSERTELEMENT); } + YY_BREAK +case 91: +YY_RULE_SETUP +#line 280 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" { UnEscapeLexed(yytext+1); llvmAsmlval.StrVal = strdup(yytext+1); // Skip % return VAR_ID; } YY_BREAK -case 91: +case 92: YY_RULE_SETUP -#line 284 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" +#line 285 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" { yytext[strlen(yytext)-1] = 0; // nuke colon UnEscapeLexed(yytext); @@ -1607,9 +1613,9 @@ return LABELSTR; } YY_BREAK -case 92: +case 93: YY_RULE_SETUP -#line 290 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" +#line 291 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" { yytext[strlen(yytext)-2] = 0; // nuke colon, end quote UnEscapeLexed(yytext+1); @@ -1617,9 +1623,9 @@ return LABELSTR; } YY_BREAK -case 93: +case 94: YY_RULE_SETUP -#line 297 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" +#line 298 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" { // Note that we cannot unescape a string constant here! The // string constant might contain a \00 which would not be // understood by the string stuff. It is valid to make a @@ -1630,14 +1636,14 @@ return STRINGCONSTANT; } YY_BREAK -case 94: +case 95: YY_RULE_SETUP -#line 308 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" +#line 309 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" { llvmAsmlval.UInt64Val = atoull(yytext); return EUINT64VAL; } YY_BREAK -case 95: +case 96: YY_RULE_SETUP -#line 309 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" +#line 310 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" { uint64_t Val = atoull(yytext+1); // +1: we have bigger negative range @@ -1647,17 +1653,17 @@ return ESINT64VAL; } YY_BREAK -case 96: +case 97: YY_RULE_SETUP -#line 317 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" +#line 318 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" { llvmAsmlval.UInt64Val = HexIntToVal(yytext+3); return yytext[0] == 's' ? ESINT64VAL : EUINT64VAL; } YY_BREAK -case 97: +case 98: YY_RULE_SETUP -#line 322 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" +#line 323 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" { uint64_t Val = atoull(yytext+1); if ((unsigned)Val != Val) @@ -1666,9 +1672,9 @@ return UINTVAL; } YY_BREAK -case 98: +case 99: YY_RULE_SETUP -#line 329 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" +#line 330 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" { uint64_t Val = atoull(yytext+2); // +1: we have bigger negative range @@ -1678,18 +1684,18 @@ return SINTVAL; } YY_BREAK -case 99: +case 100: YY_RULE_SETUP -#line 338 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" +#line 339 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" { llvmAsmlval.FPVal = atof(yytext); return FPVAL; } YY_BREAK -case 100: +case 101: YY_RULE_SETUP -#line 339 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" +#line 340 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" { llvmAsmlval.FPVal = HexToFP(yytext); return FPVAL; } YY_BREAK case YY_STATE_EOF(INITIAL): -#line 341 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" +#line 342 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" { /* Make sure to free the internal buffers for flex when we are * done reading our input! @@ -1698,22 +1704,22 @@ return EOF; } YY_BREAK -case 101: +case 102: YY_RULE_SETUP -#line 349 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" +#line 350 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" { /* Ignore whitespace */ } YY_BREAK -case 102: +case 103: YY_RULE_SETUP -#line 350 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" +#line 351 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" { return yytext[0]; } YY_BREAK -case 103: +case 104: YY_RULE_SETUP -#line 352 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" +#line 353 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" YY_FATAL_ERROR( "flex scanner jammed" ); YY_BREAK -#line 1717 "Lexer.cpp" +#line 1723 "Lexer.cpp" case YY_END_OF_BUFFER: { @@ -2000,7 +2006,7 @@ while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) { yy_current_state = (int) yy_def[yy_current_state]; - if ( yy_current_state >= 427 ) + if ( yy_current_state >= 429 ) yy_c = yy_meta[(unsigned int) yy_c]; } yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c]; @@ -2030,11 +2036,11 @@ while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) { yy_current_state = (int) yy_def[yy_current_state]; - if ( yy_current_state >= 427 ) + if ( yy_current_state >= 429 ) yy_c = yy_meta[(unsigned int) yy_c]; } yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c]; - yy_is_jam = (yy_current_state == 426); + yy_is_jam = (yy_current_state == 428); if ( ! yy_is_jam ) *yy_state_ptr++ = yy_current_state; @@ -2595,5 +2601,5 @@ return 0; } #endif -#line 352 "/Users/bocchino/llvm-checkin/src/lib/AsmParser/Lexer.l" +#line 353 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" Index: llvm/lib/AsmParser/llvmAsmParser.cpp diff -u llvm/lib/AsmParser/llvmAsmParser.cpp:1.32 llvm/lib/AsmParser/llvmAsmParser.cpp:1.33 --- llvm/lib/AsmParser/llvmAsmParser.cpp:1.32 Wed Jan 18 19:21:04 2006 +++ llvm/lib/AsmParser/llvmAsmParser.cpp Mon Jan 23 17:05:42 2006 @@ -1,265 +1,114 @@ -/* A Bison parser, made by GNU Bison 1.875c. */ -/* Skeleton parser for Yacc-like parsing with Bison, - Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003 Free Software Foundation, Inc. +/* A Bison parser, made from /Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y + by GNU Bison version 1.28 */ - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2, or (at your option) - any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 59 Temple Place - Suite 330, - Boston, MA 02111-1307, USA. */ - -/* As a special exception, when this file is copied by Bison into a - Bison output file, you may use that output file without restriction. - This special exception was added by the Free Software Foundation - in version 1.24 of Bison. */ - -/* Written by Richard Stallman by simplifying the original so called - ``semantic'' parser. */ +#define YYBISON 1 /* Identify Bison output. */ -/* All symbols defined below should begin with yy or YY, to avoid - infringing on user name space. This should be done even for local - variables, as they might otherwise be expanded by user macros. - There are some unavoidable exceptions within include files to - define necessary library symbols; they are noted "INFRINGES ON - USER NAME SPACE" below. */ - -/* Identify Bison output. */ -#define YYBISON 1 - -/* Skeleton name. */ -#define YYSKELETON_NAME "yacc.c" - -/* Pure parsers. */ -#define YYPURE 0 - -/* Using locations. */ -#define YYLSP_NEEDED 0 - -/* If NAME_PREFIX is specified substitute the variables and functions - names. */ #define yyparse llvmAsmparse -#define yylex llvmAsmlex +#define yylex llvmAsmlex #define yyerror llvmAsmerror -#define yylval llvmAsmlval -#define yychar llvmAsmchar +#define yylval llvmAsmlval +#define yychar llvmAsmchar #define yydebug llvmAsmdebug #define yynerrs llvmAsmnerrs +#define ESINT64VAL 257 +#define EUINT64VAL 258 +#define SINTVAL 259 +#define UINTVAL 260 +#define FPVAL 261 +#define VOID 262 +#define BOOL 263 +#define SBYTE 264 +#define UBYTE 265 +#define SHORT 266 +#define USHORT 267 +#define INT 268 +#define UINT 269 +#define LONG 270 +#define ULONG 271 +#define FLOAT 272 +#define DOUBLE 273 +#define TYPE 274 +#define LABEL 275 +#define VAR_ID 276 +#define LABELSTR 277 +#define STRINGCONSTANT 278 +#define IMPLEMENTATION 279 +#define ZEROINITIALIZER 280 +#define TRUETOK 281 +#define FALSETOK 282 +#define BEGINTOK 283 +#define ENDTOK 284 +#define DECLARE 285 +#define GLOBAL 286 +#define CONSTANT 287 +#define SECTION 288 +#define VOLATILE 289 +#define TO 290 +#define DOTDOTDOT 291 +#define NULL_TOK 292 +#define UNDEF 293 +#define CONST 294 +#define INTERNAL 295 +#define LINKONCE 296 +#define WEAK 297 +#define APPENDING 298 +#define OPAQUE 299 +#define NOT 300 +#define EXTERNAL 301 +#define TARGET 302 +#define TRIPLE 303 +#define ENDIAN 304 +#define POINTERSIZE 305 +#define LITTLE 306 +#define BIG 307 +#define ALIGN 308 +#define DEPLIBS 309 +#define CALL 310 +#define TAIL 311 +#define ASM_TOK 312 +#define CC_TOK 313 +#define CCC_TOK 314 +#define FASTCC_TOK 315 +#define COLDCC_TOK 316 +#define RET 317 +#define BR 318 +#define SWITCH 319 +#define INVOKE 320 +#define UNWIND 321 +#define UNREACHABLE 322 +#define ADD 323 +#define SUB 324 +#define MUL 325 +#define DIV 326 +#define REM 327 +#define AND 328 +#define OR 329 +#define XOR 330 +#define SETLE 331 +#define SETGE 332 +#define SETLT 333 +#define SETGT 334 +#define SETEQ 335 +#define SETNE 336 +#define MALLOC 337 +#define ALLOCA 338 +#define FREE 339 +#define LOAD 340 +#define STORE 341 +#define GETELEMENTPTR 342 +#define PHI_TOK 343 +#define CAST 344 +#define SELECT 345 +#define SHL 346 +#define SHR 347 +#define VAARG 348 +#define EXTRACTELEMENT 349 +#define INSERTELEMENT 350 +#define VAARG_old 351 +#define VANEXT_old 352 - -/* Tokens. */ -#ifndef YYTOKENTYPE -# define YYTOKENTYPE - /* Put the tokens into the symbol table, so that GDB and other debuggers - know about them. */ - enum yytokentype { - ESINT64VAL = 258, - EUINT64VAL = 259, - SINTVAL = 260, - UINTVAL = 261, - FPVAL = 262, - VOID = 263, - BOOL = 264, - SBYTE = 265, - UBYTE = 266, - SHORT = 267, - USHORT = 268, - INT = 269, - UINT = 270, - LONG = 271, - ULONG = 272, - FLOAT = 273, - DOUBLE = 274, - TYPE = 275, - LABEL = 276, - VAR_ID = 277, - LABELSTR = 278, - STRINGCONSTANT = 279, - IMPLEMENTATION = 280, - ZEROINITIALIZER = 281, - TRUETOK = 282, - FALSETOK = 283, - BEGINTOK = 284, - ENDTOK = 285, - DECLARE = 286, - GLOBAL = 287, - CONSTANT = 288, - SECTION = 289, - VOLATILE = 290, - TO = 291, - DOTDOTDOT = 292, - NULL_TOK = 293, - UNDEF = 294, - CONST = 295, - INTERNAL = 296, - LINKONCE = 297, - WEAK = 298, - APPENDING = 299, - OPAQUE = 300, - NOT = 301, - EXTERNAL = 302, - TARGET = 303, - TRIPLE = 304, - ENDIAN = 305, - POINTERSIZE = 306, - LITTLE = 307, - BIG = 308, - ALIGN = 309, - DEPLIBS = 310, - CALL = 311, - TAIL = 312, - CC_TOK = 313, - CCC_TOK = 314, - FASTCC_TOK = 315, - COLDCC_TOK = 316, - RET = 317, - BR = 318, - SWITCH = 319, - INVOKE = 320, - UNWIND = 321, - UNREACHABLE = 322, - ADD = 323, - SUB = 324, - MUL = 325, - DIV = 326, - REM = 327, - AND = 328, - OR = 329, - XOR = 330, - SETLE = 331, - SETGE = 332, - SETLT = 333, - SETGT = 334, - SETEQ = 335, - SETNE = 336, - MALLOC = 337, - ALLOCA = 338, - FREE = 339, - LOAD = 340, - STORE = 341, - GETELEMENTPTR = 342, - PHI_TOK = 343, - CAST = 344, - SELECT = 345, - SHL = 346, - SHR = 347, - VAARG = 348, - EXTRACTELEMENT = 349, - INSERTELEMENT = 350, - VAARG_old = 351, - VANEXT_old = 352 - }; -#endif -#define ESINT64VAL 258 -#define EUINT64VAL 259 -#define SINTVAL 260 -#define UINTVAL 261 -#define FPVAL 262 -#define VOID 263 -#define BOOL 264 -#define SBYTE 265 -#define UBYTE 266 -#define SHORT 267 -#define USHORT 268 -#define INT 269 -#define UINT 270 -#define LONG 271 -#define ULONG 272 -#define FLOAT 273 -#define DOUBLE 274 -#define TYPE 275 -#define LABEL 276 -#define VAR_ID 277 -#define LABELSTR 278 -#define STRINGCONSTANT 279 -#define IMPLEMENTATION 280 -#define ZEROINITIALIZER 281 -#define TRUETOK 282 -#define FALSETOK 283 -#define BEGINTOK 284 -#define ENDTOK 285 -#define DECLARE 286 -#define GLOBAL 287 -#define CONSTANT 288 -#define SECTION 289 -#define VOLATILE 290 -#define TO 291 -#define DOTDOTDOT 292 -#define NULL_TOK 293 -#define UNDEF 294 -#define CONST 295 -#define INTERNAL 296 -#define LINKONCE 297 -#define WEAK 298 -#define APPENDING 299 -#define OPAQUE 300 -#define NOT 301 -#define EXTERNAL 302 -#define TARGET 303 -#define TRIPLE 304 -#define ENDIAN 305 -#define POINTERSIZE 306 -#define LITTLE 307 -#define BIG 308 -#define ALIGN 309 -#define DEPLIBS 310 -#define CALL 311 -#define TAIL 312 -#define CC_TOK 313 -#define CCC_TOK 314 -#define FASTCC_TOK 315 -#define COLDCC_TOK 316 -#define RET 317 -#define BR 318 -#define SWITCH 319 -#define INVOKE 320 -#define UNWIND 321 -#define UNREACHABLE 322 -#define ADD 323 -#define SUB 324 -#define MUL 325 -#define DIV 326 -#define REM 327 -#define AND 328 -#define OR 329 -#define XOR 330 -#define SETLE 331 -#define SETGE 332 -#define SETLT 333 -#define SETGT 334 -#define SETEQ 335 -#define SETNE 336 -#define MALLOC 337 -#define ALLOCA 338 -#define FREE 339 -#define LOAD 340 -#define STORE 341 -#define GETELEMENTPTR 342 -#define PHI_TOK 343 -#define CAST 344 -#define SELECT 345 -#define SHL 346 -#define SHR 347 -#define VAARG 348 -#define EXTRACTELEMENT 349 -#define INSERTELEMENT 350 -#define VAARG_old 351 -#define VANEXT_old 352 - - - - -/* Copy the first part of user declarations. */ -#line 14 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" +#line 14 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" #include "ParserInternals.h" #include "llvm/CallingConv.h" @@ -1123,23 +972,8 @@ } - -/* Enabling traces. */ -#ifndef YYDEBUG -# define YYDEBUG 0 -#endif - -/* Enabling verbose error messages. */ -#ifdef YYERROR_VERBOSE -# undef YYERROR_VERBOSE -# define YYERROR_VERBOSE 1 -#else -# define YYERROR_VERBOSE 0 -#endif - -#if ! defined (YYSTYPE) && ! defined (YYSTYPE_IS_DECLARED) -#line 878 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" -typedef union YYSTYPE { +#line 878 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +typedef union { llvm::Module *ModuleVal; llvm::Function *FunctionVal; std::pair *ArgVal; @@ -1178,1284 +1012,944 @@ llvm::Instruction::OtherOps OtherOpVal; llvm::Module::Endianness Endianness; } YYSTYPE; -/* Line 191 of yacc.c. */ -#line 1183 "llvmAsmParser.tab.c" -# define yystype YYSTYPE /* obsolescent; will be withdrawn */ -# define YYSTYPE_IS_DECLARED 1 -# define YYSTYPE_IS_TRIVIAL 1 -#endif - +#include +#ifndef __cplusplus +#ifndef __STDC__ +#define const +#endif +#endif -/* Copy the second part of user declarations. */ - - -/* Line 214 of yacc.c. */ -#line 1195 "llvmAsmParser.tab.c" - -#if ! defined (yyoverflow) || YYERROR_VERBOSE - -# ifndef YYFREE -# define YYFREE free -# endif -# ifndef YYMALLOC -# define YYMALLOC malloc -# endif - -/* The parser invokes alloca or malloc; define the necessary symbols. */ - -# ifdef YYSTACK_USE_ALLOCA -# if YYSTACK_USE_ALLOCA -# define YYSTACK_ALLOC alloca -# endif -# else -# if defined (alloca) || defined (_ALLOCA_H) -# define YYSTACK_ALLOC alloca -# else -# ifdef __GNUC__ -# define YYSTACK_ALLOC __builtin_alloca -# endif -# endif -# endif - -# ifdef YYSTACK_ALLOC - /* Pacify GCC's `empty if-body' warning. */ -# define YYSTACK_FREE(Ptr) do { /* empty */; } while (0) -# else -# if defined (__STDC__) || defined (__cplusplus) -# include /* INFRINGES ON USER NAME SPACE */ -# define YYSIZE_T size_t -# endif -# define YYSTACK_ALLOC YYMALLOC -# define YYSTACK_FREE YYFREE -# endif -#endif /* ! defined (yyoverflow) || YYERROR_VERBOSE */ - - -#if (! defined (yyoverflow) \ - && (! defined (__cplusplus) \ - || (defined (YYSTYPE_IS_TRIVIAL) && YYSTYPE_IS_TRIVIAL))) -/* A type that is properly aligned for any stack member. */ -union yyalloc -{ - short yyss; - YYSTYPE yyvs; - }; -/* The size of the maximum gap between one aligned stack and the next. */ -# define YYSTACK_GAP_MAXIMUM (sizeof (union yyalloc) - 1) +#define YYFINAL 465 +#define YYFLAG -32768 +#define YYNTBASE 113 + +#define YYTRANSLATE(x) ((unsigned)(x) <= 352 ? yytranslate[x] : 183) + +static const char yytranslate[] = { 0, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 102, + 103, 111, 2, 100, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 107, + 99, 108, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 104, 101, 106, 2, 2, 2, 2, 2, 112, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 105, + 2, 2, 109, 2, 110, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 1, 3, 4, 5, 6, + 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, + 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, + 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, + 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, + 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, + 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, + 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, + 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, + 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, + 97, 98 +}; -/* The size of an array large to enough to hold all stacks, each with - N elements. */ -# define YYSTACK_BYTES(N) \ - ((N) * (sizeof (short) + sizeof (YYSTYPE)) \ - + YYSTACK_GAP_MAXIMUM) - -/* Copy COUNT objects from FROM to TO. The source and destination do - not overlap. */ -# ifndef YYCOPY -# if defined (__GNUC__) && 1 < __GNUC__ -# define YYCOPY(To, From, Count) \ - __builtin_memcpy (To, From, (Count) * sizeof (*(From))) -# else -# define YYCOPY(To, From, Count) \ - do \ - { \ - register YYSIZE_T yyi; \ - for (yyi = 0; yyi < (Count); yyi++) \ - (To)[yyi] = (From)[yyi]; \ - } \ - while (0) -# endif -# endif - -/* Relocate STACK from its old location to the new one. The - local variables YYSIZE and YYSTACKSIZE give the old and new number of - elements in the stack, and YYPTR gives the new location of the - stack. Advance YYPTR to a properly aligned location for the next - stack. */ -# define YYSTACK_RELOCATE(Stack) \ - do \ - { \ - YYSIZE_T yynewbytes; \ - YYCOPY (&yyptr->Stack, Stack, yysize); \ - Stack = &yyptr->Stack; \ - yynewbytes = yystacksize * sizeof (*Stack) + YYSTACK_GAP_MAXIMUM; \ - yyptr += yynewbytes / sizeof (*yyptr); \ - } \ - while (0) +#if YYDEBUG != 0 +static const short yyprhs[] = { 0, + 0, 2, 4, 6, 8, 10, 12, 14, 16, 18, + 20, 22, 24, 26, 28, 30, 32, 34, 36, 38, + 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, + 60, 62, 64, 67, 68, 70, 72, 74, 76, 77, + 78, 80, 82, 84, 87, 88, 91, 92, 96, 99, + 100, 102, 103, 107, 109, 112, 114, 116, 118, 120, + 122, 124, 126, 128, 130, 132, 134, 136, 138, 140, + 142, 144, 146, 148, 150, 152, 154, 157, 162, 168, + 174, 178, 181, 184, 186, 190, 192, 196, 198, 199, + 204, 208, 212, 217, 222, 226, 229, 232, 235, 238, + 241, 244, 247, 250, 253, 256, 263, 269, 278, 285, + 292, 299, 306, 313, 317, 319, 321, 323, 325, 328, + 331, 335, 338, 340, 345, 348, 352, 353, 361, 362, + 370, 374, 379, 380, 382, 384, 386, 390, 394, 398, + 402, 406, 408, 409, 411, 413, 415, 416, 419, 423, + 425, 427, 431, 433, 434, 443, 445, 447, 451, 453, + 455, 458, 459, 463, 465, 467, 469, 471, 473, 475, + 477, 479, 483, 485, 487, 489, 491, 493, 496, 499, + 502, 506, 509, 510, 512, 515, 518, 522, 532, 542, + 551, 565, 567, 569, 576, 582, 585, 592, 600, 602, + 606, 608, 609, 612, 614, 620, 626, 632, 635, 640, + 645, 652, 657, 662, 667, 672, 679, 682, 690, 692, + 695, 696, 698, 699, 703, 710, 714, 721, 724, 729, + 736 +}; -#endif +static const short yyrhs[] = { 5, + 0, 6, 0, 3, 0, 4, 0, 69, 0, 70, + 0, 71, 0, 72, 0, 73, 0, 74, 0, 75, + 0, 76, 0, 77, 0, 78, 0, 79, 0, 80, + 0, 81, 0, 82, 0, 92, 0, 93, 0, 16, + 0, 14, 0, 12, 0, 10, 0, 17, 0, 15, + 0, 13, 0, 11, 0, 119, 0, 120, 0, 18, + 0, 19, 0, 153, 99, 0, 0, 41, 0, 42, + 0, 43, 0, 44, 0, 0, 0, 60, 0, 61, + 0, 62, 0, 59, 4, 0, 0, 54, 4, 0, + 0, 100, 54, 4, 0, 34, 24, 0, 0, 128, + 0, 0, 100, 131, 130, 0, 128, 0, 54, 4, + 0, 134, 0, 8, 0, 136, 0, 8, 0, 136, + 0, 9, 0, 10, 0, 11, 0, 12, 0, 13, + 0, 14, 0, 15, 0, 16, 0, 17, 0, 18, + 0, 19, 0, 20, 0, 21, 0, 45, 0, 135, + 0, 166, 0, 101, 4, 0, 133, 102, 138, 103, + 0, 104, 4, 105, 136, 106, 0, 107, 4, 105, + 136, 108, 0, 109, 137, 110, 0, 109, 110, 0, + 136, 111, 0, 136, 0, 137, 100, 136, 0, 137, + 0, 137, 100, 37, 0, 37, 0, 0, 134, 104, + 141, 106, 0, 134, 104, 106, 0, 134, 112, 24, + 0, 134, 107, 141, 108, 0, 134, 109, 141, 110, + 0, 134, 109, 110, 0, 134, 38, 0, 134, 39, + 0, 134, 166, 0, 134, 140, 0, 134, 26, 0, + 119, 114, 0, 120, 4, 0, 9, 27, 0, 9, + 28, 0, 122, 7, 0, 90, 102, 139, 36, 134, + 103, 0, 88, 102, 139, 180, 103, 0, 91, 102, + 139, 100, 139, 100, 139, 103, 0, 115, 102, 139, + 100, 139, 103, 0, 116, 102, 139, 100, 139, 103, + 0, 117, 102, 139, 100, 139, 103, 0, 118, 102, + 139, 100, 139, 103, 0, 95, 102, 139, 100, 139, + 103, 0, 141, 100, 139, 0, 139, 0, 32, 0, + 33, 0, 144, 0, 144, 162, 0, 144, 163, 0, + 144, 58, 148, 0, 144, 25, 0, 145, 0, 145, + 123, 20, 132, 0, 145, 163, 0, 145, 58, 148, + 0, 0, 145, 123, 124, 142, 139, 146, 130, 0, + 0, 145, 123, 47, 142, 134, 147, 130, 0, 145, + 48, 150, 0, 145, 55, 99, 151, 0, 0, 24, + 0, 53, 0, 52, 0, 50, 99, 149, 0, 51, + 99, 4, 0, 49, 99, 24, 0, 104, 152, 106, + 0, 152, 100, 24, 0, 24, 0, 0, 22, 0, + 24, 0, 153, 0, 0, 134, 154, 0, 156, 100, + 155, 0, 155, 0, 156, 0, 156, 100, 37, 0, + 37, 0, 0, 125, 132, 153, 102, 157, 103, 129, + 126, 0, 29, 0, 109, 0, 124, 158, 159, 0, + 30, 0, 110, 0, 169, 161, 0, 0, 31, 164, + 158, 0, 3, 0, 4, 0, 7, 0, 27, 0, + 28, 0, 38, 0, 39, 0, 26, 0, 107, 141, + 108, 0, 140, 0, 113, 0, 153, 0, 166, 0, + 165, 0, 134, 167, 0, 169, 170, 0, 160, 170, + 0, 171, 123, 172, 0, 171, 174, 0, 0, 23, + 0, 63, 168, 0, 63, 8, 0, 64, 21, 167, + 0, 64, 9, 167, 100, 21, 167, 100, 21, 167, + 0, 65, 121, 167, 100, 21, 167, 104, 173, 106, + 0, 65, 121, 167, 100, 21, 167, 104, 106, 0, + 66, 125, 132, 167, 102, 177, 103, 36, 21, 167, + 67, 21, 167, 0, 67, 0, 68, 0, 173, 121, + 165, 100, 21, 167, 0, 121, 165, 100, 21, 167, + 0, 123, 179, 0, 134, 104, 167, 100, 167, 106, + 0, 175, 100, 104, 167, 100, 167, 106, 0, 168, + 0, 176, 100, 168, 0, 176, 0, 0, 57, 56, + 0, 56, 0, 115, 134, 167, 100, 167, 0, 116, + 134, 167, 100, 167, 0, 117, 134, 167, 100, 167, + 0, 46, 168, 0, 118, 168, 100, 168, 0, 90, + 168, 36, 134, 0, 91, 168, 100, 168, 100, 168, + 0, 94, 168, 100, 134, 0, 97, 168, 100, 134, + 0, 98, 168, 100, 134, 0, 95, 168, 100, 168, + 0, 96, 168, 100, 168, 100, 168, 0, 89, 175, + 0, 178, 125, 132, 167, 102, 177, 103, 0, 182, + 0, 100, 176, 0, 0, 35, 0, 0, 83, 134, + 127, 0, 83, 134, 100, 15, 167, 127, 0, 84, + 134, 127, 0, 84, 134, 100, 15, 167, 127, 0, + 85, 168, 0, 181, 86, 134, 167, 0, 181, 87, + 168, 100, 134, 167, 0, 88, 134, 167, 180, 0 +}; -#if defined (__STDC__) || defined (__cplusplus) - typedef signed char yysigned_char; -#else - typedef short yysigned_char; #endif -/* YYFINAL -- State number of the termination state. */ -#define YYFINAL 4 -/* YYLAST -- Last index in YYTABLE. */ -#define YYLAST 1210 - -/* YYNTOKENS -- Number of terminals. */ -#define YYNTOKENS 112 -/* YYNNTS -- Number of nonterminals. */ -#define YYNNTS 70 -/* YYNRULES -- Number of rules. */ -#define YYNRULES 229 -/* YYNRULES -- Number of states. */ -#define YYNSTATES 460 - -/* YYTRANSLATE(YYLEX) -- Bison symbol number corresponding to YYLEX. */ -#define YYUNDEFTOK 2 -#define YYMAXUTOK 352 - -#define YYTRANSLATE(YYX) \ - ((unsigned int) (YYX) <= YYMAXUTOK ? yytranslate[YYX] : YYUNDEFTOK) - -/* YYTRANSLATE[YYLEX] -- Bison symbol number corresponding to YYLEX. */ -static const unsigned char yytranslate[] = -{ - 0, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 101, 102, 110, 2, 99, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 106, 98, 107, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 103, 100, 105, 2, 2, 2, 2, 2, 111, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 104, 2, 2, 108, 2, 109, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 1, 2, 3, 4, - 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, - 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, - 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, - 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, - 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, - 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, - 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, - 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, - 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, - 95, 96, 97 +#if YYDEBUG != 0 +static const short yyrline[] = { 0, + 997, 998, 1005, 1006, 1015, 1015, 1015, 1015, 1015, 1016, + 1016, 1016, 1017, 1017, 1017, 1017, 1017, 1017, 1019, 1019, + 1023, 1023, 1023, 1023, 1024, 1024, 1024, 1024, 1025, 1025, + 1026, 1026, 1029, 1032, 1036, 1036, 1037, 1038, 1039, 1042, + 1042, 1043, 1044, 1045, 1054, 1054, 1060, 1060, 1068, 1075, + 1075, 1081, 1081, 1083, 1087, 1100, 1100, 1101, 1101, 1103, + 1112, 1112, 1112, 1112, 1112, 1112, 1112, 1113, 1113, 1113, + 1113, 1113, 1113, 1114, 1117, 1120, 1126, 1133, 1145, 1149, + 1160, 1169, 1172, 1180, 1184, 1189, 1190, 1193, 1196, 1206, + 1231, 1244, 1272, 1297, 1317, 1329, 1338, 1342, 1401, 1407, + 1415, 1420, 1425, 1428, 1431, 1438, 1448, 1479, 1486, 1507, + 1517, 1522, 1529, 1539, 1542, 1549, 1549, 1559, 1566, 1570, + 1573, 1576, 1579, 1592, 1612, 1614, 1616, 1619, 1622, 1626, + 1629, 1631, 1633, 1637, 1646, 1647, 1649, 1652, 1660, 1665, + 1667, 1671, 1675, 1683, 1683, 1684, 1684, 1686, 1692, 1697, + 1703, 1706, 1711, 1715, 1719, 1805, 1805, 1807, 1815, 1815, + 1817, 1821, 1821, 1830, 1833, 1836, 1839, 1842, 1845, 1848, + 1851, 1854, 1878, 1885, 1888, 1893, 1893, 1899, 1903, 1906, + 1914, 1923, 1927, 1937, 1948, 1951, 1954, 1957, 1960, 1974, + 1978, 2031, 2034, 2040, 2048, 2058, 2065, 2070, 2077, 2081, + 2087, 2087, 2089, 2092, 2098, 2110, 2121, 2131, 2143, 2150, + 2157, 2164, 2169, 2188, 2210, 2218, 2230, 2244, 2301, 2307, + 2309, 2313, 2316, 2322, 2326, 2330, 2334, 2338, 2345, 2355, + 2368 }; +#endif -#if YYDEBUG -/* YYPRHS[YYN] -- Index of the first RHS symbol of rule number YYN in - YYRHS. */ -static const unsigned short yyprhs[] = -{ - 0, 0, 3, 5, 7, 9, 11, 13, 15, 17, - 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, - 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, - 59, 61, 63, 65, 67, 70, 71, 73, 75, 77, - 79, 80, 81, 83, 85, 87, 90, 91, 94, 95, - 99, 102, 103, 105, 106, 110, 112, 115, 117, 119, - 121, 123, 125, 127, 129, 131, 133, 135, 137, 139, - 141, 143, 145, 147, 149, 151, 153, 155, 157, 160, - 165, 171, 177, 181, 184, 187, 189, 193, 195, 199, - 201, 202, 207, 211, 215, 220, 225, 229, 232, 235, - 238, 241, 244, 247, 250, 253, 256, 259, 266, 272, - 281, 288, 295, 302, 309, 316, 320, 322, 324, 326, - 328, 331, 334, 337, 339, 344, 347, 348, 356, 357, - 365, 369, 374, 375, 377, 379, 383, 387, 391, 395, - 399, 401, 402, 404, 406, 408, 409, 412, 416, 418, - 420, 424, 426, 427, 436, 438, 440, 444, 446, 448, - 451, 452, 456, 458, 460, 462, 464, 466, 468, 470, - 472, 476, 478, 480, 482, 484, 486, 489, 492, 495, - 499, 502, 503, 505, 508, 511, 515, 525, 535, 544, - 558, 560, 562, 569, 575, 578, 585, 593, 595, 599, - 601, 602, 605, 607, 613, 619, 625, 628, 633, 638, - 645, 650, 655, 660, 665, 672, 675, 683, 685, 688, - 689, 691, 692, 696, 703, 707, 714, 717, 722, 729 -}; -/* YYRHS -- A `-1'-separated list of the rules' RHS. */ -static const short yyrhs[] = -{ - 143, 0, -1, 5, -1, 6, -1, 3, -1, 4, - -1, 68, -1, 69, -1, 70, -1, 71, -1, 72, - -1, 73, -1, 74, -1, 75, -1, 76, -1, 77, - -1, 78, -1, 79, -1, 80, -1, 81, -1, 91, - -1, 92, -1, 16, -1, 14, -1, 12, -1, 10, - -1, 17, -1, 15, -1, 13, -1, 11, -1, 119, - -1, 120, -1, 18, -1, 19, -1, 152, 98, -1, - -1, 41, -1, 42, -1, 43, -1, 44, -1, -1, - -1, 59, -1, 60, -1, 61, -1, 58, 4, -1, - -1, 54, 4, -1, -1, 99, 54, 4, -1, 34, - 24, -1, -1, 128, -1, -1, 99, 131, 130, -1, - 128, -1, 54, 4, -1, 134, -1, 8, -1, 136, - -1, 8, -1, 136, -1, 9, -1, 10, -1, 11, - -1, 12, -1, 13, -1, 14, -1, 15, -1, 16, - -1, 17, -1, 18, -1, 19, -1, 20, -1, 21, - -1, 45, -1, 135, -1, 165, -1, 100, 4, -1, - 133, 101, 138, 102, -1, 103, 4, 104, 136, 105, - -1, 106, 4, 104, 136, 107, -1, 108, 137, 109, - -1, 108, 109, -1, 136, 110, -1, 136, -1, 137, - 99, 136, -1, 137, -1, 137, 99, 37, -1, 37, - -1, -1, 134, 103, 141, 105, -1, 134, 103, 105, - -1, 134, 111, 24, -1, 134, 106, 141, 107, -1, - 134, 108, 141, 109, -1, 134, 108, 109, -1, 134, - 38, -1, 134, 39, -1, 134, 165, -1, 134, 140, - -1, 134, 26, -1, 119, 114, -1, 120, 4, -1, - 9, 27, -1, 9, 28, -1, 122, 7, -1, 89, - 101, 139, 36, 134, 102, -1, 87, 101, 139, 179, - 102, -1, 90, 101, 139, 99, 139, 99, 139, 102, - -1, 115, 101, 139, 99, 139, 102, -1, 116, 101, - 139, 99, 139, 102, -1, 117, 101, 139, 99, 139, - 102, -1, 118, 101, 139, 99, 139, 102, -1, 94, - 101, 139, 99, 139, 102, -1, 141, 99, 139, -1, - 139, -1, 32, -1, 33, -1, 144, -1, 144, 161, - -1, 144, 162, -1, 144, 25, -1, 145, -1, 145, - 123, 20, 132, -1, 145, 162, -1, -1, 145, 123, - 124, 142, 139, 146, 130, -1, -1, 145, 123, 47, - 142, 134, 147, 130, -1, 145, 48, 149, -1, 145, - 55, 98, 150, -1, -1, 53, -1, 52, -1, 50, - 98, 148, -1, 51, 98, 4, -1, 49, 98, 24, - -1, 103, 151, 105, -1, 151, 99, 24, -1, 24, - -1, -1, 22, -1, 24, -1, 152, -1, -1, 134, - 153, -1, 155, 99, 154, -1, 154, -1, 155, -1, - 155, 99, 37, -1, 37, -1, -1, 125, 132, 152, - 101, 156, 102, 129, 126, -1, 29, -1, 108, -1, - 124, 157, 158, -1, 30, -1, 109, -1, 168, 160, - -1, -1, 31, 163, 157, -1, 3, -1, 4, -1, - 7, -1, 27, -1, 28, -1, 38, -1, 39, -1, - 26, -1, 106, 141, 107, -1, 140, -1, 113, -1, - 152, -1, 165, -1, 164, -1, 134, 166, -1, 168, - 169, -1, 159, 169, -1, 170, 123, 171, -1, 170, - 173, -1, -1, 23, -1, 62, 167, -1, 62, 8, - -1, 63, 21, 166, -1, 63, 9, 166, 99, 21, - 166, 99, 21, 166, -1, 64, 121, 166, 99, 21, - 166, 103, 172, 105, -1, 64, 121, 166, 99, 21, - 166, 103, 105, -1, 65, 125, 132, 166, 101, 176, - 102, 36, 21, 166, 66, 21, 166, -1, 66, -1, - 67, -1, 172, 121, 164, 99, 21, 166, -1, 121, - 164, 99, 21, 166, -1, 123, 178, -1, 134, 103, - 166, 99, 166, 105, -1, 174, 99, 103, 166, 99, - 166, 105, -1, 167, -1, 175, 99, 167, -1, 175, - -1, -1, 57, 56, -1, 56, -1, 115, 134, 166, - 99, 166, -1, 116, 134, 166, 99, 166, -1, 117, - 134, 166, 99, 166, -1, 46, 167, -1, 118, 167, - 99, 167, -1, 89, 167, 36, 134, -1, 90, 167, - 99, 167, 99, 167, -1, 93, 167, 99, 134, -1, - 96, 167, 99, 134, -1, 97, 167, 99, 134, -1, - 94, 167, 99, 167, -1, 95, 167, 99, 167, 99, - 167, -1, 88, 174, -1, 177, 125, 132, 166, 101, - 176, 102, -1, 181, -1, 99, 175, -1, -1, 35, - -1, -1, 82, 134, 127, -1, 82, 134, 99, 15, - 166, 127, -1, 83, 134, 127, -1, 83, 134, 99, - 15, 166, 127, -1, 84, 167, -1, 180, 85, 134, - 166, -1, 180, 86, 167, 99, 134, 166, -1, 87, - 134, 166, 179, -1 -}; +#if YYDEBUG != 0 || defined (YYERROR_VERBOSE) -/* YYRLINE[YYN] -- source line where rule number YYN was defined. */ -static const unsigned short yyrline[] = -{ - 0, 997, 997, 998, 1005, 1006, 1015, 1015, 1015, 1015, - 1015, 1016, 1016, 1016, 1017, 1017, 1017, 1017, 1017, 1017, - 1019, 1019, 1023, 1023, 1023, 1023, 1024, 1024, 1024, 1024, - 1025, 1025, 1026, 1026, 1029, 1032, 1036, 1037, 1038, 1039, - 1040, 1042, 1043, 1044, 1045, 1046, 1054, 1055, 1060, 1061, - 1068, 1075, 1076, 1081, 1082, 1083, 1087, 1100, 1100, 1101, - 1101, 1103, 1112, 1112, 1112, 1112, 1112, 1112, 1112, 1113, - 1113, 1113, 1113, 1113, 1113, 1114, 1117, 1120, 1126, 1133, - 1145, 1149, 1160, 1169, 1172, 1180, 1184, 1189, 1190, 1193, - 1196, 1206, 1231, 1244, 1272, 1297, 1317, 1329, 1338, 1342, - 1401, 1407, 1415, 1420, 1425, 1428, 1431, 1438, 1448, 1479, - 1486, 1507, 1517, 1522, 1529, 1539, 1542, 1549, 1549, 1559, - 1566, 1570, 1573, 1576, 1589, 1609, 1611, 1611, 1617, 1617, - 1624, 1626, 1628, 1633, 1634, 1636, 1639, 1647, 1652, 1654, - 1658, 1662, 1670, 1670, 1671, 1671, 1673, 1679, 1684, 1690, - 1693, 1698, 1702, 1706, 1792, 1792, 1794, 1802, 1802, 1804, - 1808, 1808, 1817, 1820, 1823, 1826, 1829, 1832, 1835, 1838, - 1841, 1865, 1872, 1875, 1880, 1880, 1886, 1890, 1893, 1901, - 1910, 1914, 1924, 1935, 1938, 1941, 1944, 1947, 1961, 1965, - 2018, 2021, 2027, 2035, 2045, 2052, 2057, 2064, 2068, 2074, - 2074, 2076, 2079, 2085, 2097, 2108, 2118, 2130, 2137, 2144, - 2151, 2156, 2175, 2197, 2205, 2217, 2231, 2288, 2294, 2296, - 2300, 2303, 2309, 2313, 2317, 2321, 2325, 2332, 2342, 2355 +static const char * const yytname[] = { "$","error","$undefined.","ESINT64VAL", +"EUINT64VAL","SINTVAL","UINTVAL","FPVAL","VOID","BOOL","SBYTE","UBYTE","SHORT", +"USHORT","INT","UINT","LONG","ULONG","FLOAT","DOUBLE","TYPE","LABEL","VAR_ID", +"LABELSTR","STRINGCONSTANT","IMPLEMENTATION","ZEROINITIALIZER","TRUETOK","FALSETOK", +"BEGINTOK","ENDTOK","DECLARE","GLOBAL","CONSTANT","SECTION","VOLATILE","TO", +"DOTDOTDOT","NULL_TOK","UNDEF","CONST","INTERNAL","LINKONCE","WEAK","APPENDING", +"OPAQUE","NOT","EXTERNAL","TARGET","TRIPLE","ENDIAN","POINTERSIZE","LITTLE", +"BIG","ALIGN","DEPLIBS","CALL","TAIL","ASM_TOK","CC_TOK","CCC_TOK","FASTCC_TOK", +"COLDCC_TOK","RET","BR","SWITCH","INVOKE","UNWIND","UNREACHABLE","ADD","SUB", +"MUL","DIV","REM","AND","OR","XOR","SETLE","SETGE","SETLT","SETGT","SETEQ","SETNE", +"MALLOC","ALLOCA","FREE","LOAD","STORE","GETELEMENTPTR","PHI_TOK","CAST","SELECT", +"SHL","SHR","VAARG","EXTRACTELEMENT","INSERTELEMENT","VAARG_old","VANEXT_old", +"'='","','","'\\\\'","'('","')'","'['","'x'","']'","'<'","'>'","'{'","'}'","'*'", +"'c'","INTVAL","EINT64VAL","ArithmeticOps","LogicalOps","SetCondOps","ShiftOps", +"SIntType","UIntType","IntType","FPType","OptAssign","OptLinkage","OptCallingConv", +"OptAlign","OptCAlign","SectionString","OptSection","GlobalVarAttributes","GlobalVarAttribute", +"TypesV","UpRTypesV","Types","PrimType","UpRTypes","TypeListI","ArgTypeListI", +"ConstVal","ConstExpr","ConstVector","GlobalType","Module","FunctionList","ConstPool", +"@1","@2","AsmBlock","BigOrLittle","TargetDefinition","LibrariesDefinition", +"LibList","Name","OptName","ArgVal","ArgListH","ArgList","FunctionHeaderH","BEGIN", +"FunctionHeader","END","Function","FunctionProto","@3","ConstValueRef","SymbolicValueRef", +"ValueRef","ResolvedVal","BasicBlockList","BasicBlock","InstructionList","BBTerminatorInst", +"JumpTable","Inst","PHIList","ValueRefList","ValueRefListE","OptTailCall","InstVal", +"IndexList","OptVolatile","MemoryInst", NULL }; #endif -#if YYDEBUG || YYERROR_VERBOSE -/* YYTNME[SYMBOL-NUM] -- String name of the symbol SYMBOL-NUM. - First, the terminals, then, starting at YYNTOKENS, nonterminals. */ -static const char *const yytname[] = -{ - "$end", "error", "$undefined", "ESINT64VAL", "EUINT64VAL", "SINTVAL", - "UINTVAL", "FPVAL", "VOID", "BOOL", "SBYTE", "UBYTE", "SHORT", "USHORT", - "INT", "UINT", "LONG", "ULONG", "FLOAT", "DOUBLE", "TYPE", "LABEL", - "VAR_ID", "LABELSTR", "STRINGCONSTANT", "IMPLEMENTATION", - "ZEROINITIALIZER", "TRUETOK", "FALSETOK", "BEGINTOK", "ENDTOK", - "DECLARE", "GLOBAL", "CONSTANT", "SECTION", "VOLATILE", "TO", - "DOTDOTDOT", "NULL_TOK", "UNDEF", "CONST", "INTERNAL", "LINKONCE", - "WEAK", "APPENDING", "OPAQUE", "NOT", "EXTERNAL", "TARGET", "TRIPLE", - "ENDIAN", "POINTERSIZE", "LITTLE", "BIG", "ALIGN", "DEPLIBS", "CALL", - "TAIL", "CC_TOK", "CCC_TOK", "FASTCC_TOK", "COLDCC_TOK", "RET", "BR", - "SWITCH", "INVOKE", "UNWIND", "UNREACHABLE", "ADD", "SUB", "MUL", "DIV", - "REM", "AND", "OR", "XOR", "SETLE", "SETGE", "SETLT", "SETGT", "SETEQ", - "SETNE", "MALLOC", "ALLOCA", "FREE", "LOAD", "STORE", "GETELEMENTPTR", - "PHI_TOK", "CAST", "SELECT", "SHL", "SHR", "VAARG", "EXTRACTELEMENT", - "INSERTELEMENT", "VAARG_old", "VANEXT_old", "'='", "','", "'\\\\'", - "'('", "')'", "'['", "'x'", "']'", "'<'", "'>'", "'{'", "'}'", "'*'", - "'c'", "$accept", "INTVAL", "EINT64VAL", "ArithmeticOps", "LogicalOps", - "SetCondOps", "ShiftOps", "SIntType", "UIntType", "IntType", "FPType", - "OptAssign", "OptLinkage", "OptCallingConv", "OptAlign", "OptCAlign", - "SectionString", "OptSection", "GlobalVarAttributes", - "GlobalVarAttribute", "TypesV", "UpRTypesV", "Types", "PrimType", - "UpRTypes", "TypeListI", "ArgTypeListI", "ConstVal", "ConstExpr", - "ConstVector", "GlobalType", "Module", "FunctionList", "ConstPool", "@1", - "@2", "BigOrLittle", "TargetDefinition", "LibrariesDefinition", - "LibList", "Name", "OptName", "ArgVal", "ArgListH", "ArgList", - "FunctionHeaderH", "BEGIN", "FunctionHeader", "END", "Function", - "FunctionProto", "@3", "ConstValueRef", "SymbolicValueRef", "ValueRef", - "ResolvedVal", "BasicBlockList", "BasicBlock", "InstructionList", - "BBTerminatorInst", "JumpTable", "Inst", "PHIList", "ValueRefList", - "ValueRefListE", "OptTailCall", "InstVal", "IndexList", "OptVolatile", - "MemoryInst", 0 +static const short yyr1[] = { 0, + 113, 113, 114, 114, 115, 115, 115, 115, 115, 116, + 116, 116, 117, 117, 117, 117, 117, 117, 118, 118, + 119, 119, 119, 119, 120, 120, 120, 120, 121, 121, + 122, 122, 123, 123, 124, 124, 124, 124, 124, 125, + 125, 125, 125, 125, 126, 126, 127, 127, 128, 129, + 129, 130, 130, 131, 131, 132, 132, 133, 133, 134, + 135, 135, 135, 135, 135, 135, 135, 135, 135, 135, + 135, 135, 135, 136, 136, 136, 136, 136, 136, 136, + 136, 136, 136, 137, 137, 138, 138, 138, 138, 139, + 139, 139, 139, 139, 139, 139, 139, 139, 139, 139, + 139, 139, 139, 139, 139, 140, 140, 140, 140, 140, + 140, 140, 140, 141, 141, 142, 142, 143, 144, 144, + 144, 144, 144, 145, 145, 145, 146, 145, 147, 145, + 145, 145, 145, 148, 149, 149, 150, 150, 150, 151, + 152, 152, 152, 153, 153, 154, 154, 155, 156, 156, + 157, 157, 157, 157, 158, 159, 159, 160, 161, 161, + 162, 164, 163, 165, 165, 165, 165, 165, 165, 165, + 165, 165, 165, 166, 166, 167, 167, 168, 169, 169, + 170, 171, 171, 171, 172, 172, 172, 172, 172, 172, + 172, 172, 172, 173, 173, 174, 175, 175, 176, 176, + 177, 177, 178, 178, 179, 179, 179, 179, 179, 179, + 179, 179, 179, 179, 179, 179, 179, 179, 179, 180, + 180, 181, 181, 182, 182, 182, 182, 182, 182, 182, + 182 }; -#endif -# ifdef YYPRINT -/* YYTOKNUM[YYLEX-NUM] -- Internal token number corresponding to - token YYLEX-NUM. */ -static const unsigned short yytoknum[] = -{ - 0, 256, 257, 258, 259, 260, 261, 262, 263, 264, - 265, 266, 267, 268, 269, 270, 271, 272, 273, 274, - 275, 276, 277, 278, 279, 280, 281, 282, 283, 284, - 285, 286, 287, 288, 289, 290, 291, 292, 293, 294, - 295, 296, 297, 298, 299, 300, 301, 302, 303, 304, - 305, 306, 307, 308, 309, 310, 311, 312, 313, 314, - 315, 316, 317, 318, 319, 320, 321, 322, 323, 324, - 325, 326, 327, 328, 329, 330, 331, 332, 333, 334, - 335, 336, 337, 338, 339, 340, 341, 342, 343, 344, - 345, 346, 347, 348, 349, 350, 351, 352, 61, 44, - 92, 40, 41, 91, 120, 93, 60, 62, 123, 125, - 42, 99 +static const short yyr2[] = { 0, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 2, 0, 1, 1, 1, 1, 0, 0, + 1, 1, 1, 2, 0, 2, 0, 3, 2, 0, + 1, 0, 3, 1, 2, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 2, 4, 5, 5, + 3, 2, 2, 1, 3, 1, 3, 1, 0, 4, + 3, 3, 4, 4, 3, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 6, 5, 8, 6, 6, + 6, 6, 6, 3, 1, 1, 1, 1, 2, 2, + 3, 2, 1, 4, 2, 3, 0, 7, 0, 7, + 3, 4, 0, 1, 1, 1, 3, 3, 3, 3, + 3, 1, 0, 1, 1, 1, 0, 2, 3, 1, + 1, 3, 1, 0, 8, 1, 1, 3, 1, 1, + 2, 0, 3, 1, 1, 1, 1, 1, 1, 1, + 1, 3, 1, 1, 1, 1, 1, 2, 2, 2, + 3, 2, 0, 1, 2, 2, 3, 9, 9, 8, + 13, 1, 1, 6, 5, 2, 6, 7, 1, 3, + 1, 0, 2, 1, 5, 5, 5, 2, 4, 4, + 6, 4, 4, 4, 4, 6, 2, 7, 1, 2, + 0, 1, 0, 3, 6, 3, 6, 2, 4, 6, + 4 }; -# endif -/* YYR1[YYN] -- Symbol number of symbol that rule YYN derives. */ -static const unsigned char yyr1[] = -{ - 0, 112, 113, 113, 114, 114, 115, 115, 115, 115, - 115, 116, 116, 116, 117, 117, 117, 117, 117, 117, - 118, 118, 119, 119, 119, 119, 120, 120, 120, 120, - 121, 121, 122, 122, 123, 123, 124, 124, 124, 124, - 124, 125, 125, 125, 125, 125, 126, 126, 127, 127, - 128, 129, 129, 130, 130, 131, 131, 132, 132, 133, - 133, 134, 135, 135, 135, 135, 135, 135, 135, 135, - 135, 135, 135, 135, 135, 136, 136, 136, 136, 136, - 136, 136, 136, 136, 136, 137, 137, 138, 138, 138, - 138, 139, 139, 139, 139, 139, 139, 139, 139, 139, - 139, 139, 139, 139, 139, 139, 139, 140, 140, 140, - 140, 140, 140, 140, 140, 141, 141, 142, 142, 143, - 144, 144, 144, 144, 145, 145, 146, 145, 147, 145, - 145, 145, 145, 148, 148, 149, 149, 149, 150, 151, - 151, 151, 152, 152, 153, 153, 154, 155, 155, 156, - 156, 156, 156, 157, 158, 158, 159, 160, 160, 161, - 163, 162, 164, 164, 164, 164, 164, 164, 164, 164, - 164, 164, 165, 165, 166, 166, 167, 168, 168, 169, - 170, 170, 170, 171, 171, 171, 171, 171, 171, 171, - 171, 171, 172, 172, 173, 174, 174, 175, 175, 176, - 176, 177, 177, 178, 178, 178, 178, 178, 178, 178, - 178, 178, 178, 178, 178, 178, 178, 178, 179, 179, - 180, 180, 181, 181, 181, 181, 181, 181, 181, 181 +static const short yydefact[] = { 133, + 39, 123, 122, 162, 35, 36, 37, 38, 0, 40, + 183, 119, 120, 183, 144, 145, 0, 0, 0, 39, + 0, 125, 40, 134, 121, 0, 41, 42, 43, 0, + 0, 184, 180, 34, 159, 160, 161, 179, 0, 0, + 0, 131, 0, 126, 0, 0, 0, 33, 163, 44, + 1, 2, 57, 61, 62, 63, 64, 65, 66, 67, + 68, 69, 70, 71, 72, 73, 74, 0, 0, 0, + 0, 174, 0, 0, 56, 75, 60, 175, 76, 156, + 157, 158, 223, 182, 0, 0, 0, 143, 132, 124, + 116, 117, 0, 0, 77, 0, 0, 59, 82, 84, + 0, 0, 89, 83, 222, 0, 204, 0, 0, 0, + 0, 40, 192, 193, 5, 6, 7, 8, 9, 10, + 11, 12, 13, 14, 15, 16, 17, 18, 0, 0, + 0, 0, 0, 0, 0, 19, 20, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 181, 40, 196, 0, + 219, 139, 136, 135, 137, 138, 142, 0, 129, 61, + 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, + 0, 0, 0, 0, 127, 0, 0, 0, 81, 154, + 88, 86, 0, 0, 208, 203, 186, 185, 0, 0, + 24, 28, 23, 27, 22, 26, 21, 25, 29, 30, + 0, 0, 47, 47, 228, 0, 0, 217, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 140, 52, 103, 104, 3, 4, 101, + 102, 105, 100, 96, 97, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 99, 98, 52, + 58, 58, 85, 153, 147, 150, 151, 0, 0, 78, + 164, 165, 166, 171, 167, 168, 169, 170, 0, 173, + 177, 176, 178, 0, 187, 0, 0, 0, 224, 0, + 226, 221, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 141, 0, + 130, 0, 0, 0, 0, 91, 115, 0, 0, 95, + 0, 92, 0, 0, 0, 0, 128, 79, 80, 146, + 148, 0, 50, 87, 0, 0, 0, 0, 0, 0, + 0, 0, 231, 0, 0, 210, 0, 212, 215, 0, + 213, 214, 0, 0, 0, 209, 0, 229, 0, 0, + 0, 54, 52, 221, 0, 0, 0, 0, 90, 93, + 94, 0, 0, 0, 0, 152, 149, 51, 45, 172, + 0, 0, 202, 47, 48, 47, 199, 220, 0, 0, + 0, 0, 205, 206, 207, 202, 0, 49, 55, 53, + 0, 0, 0, 0, 114, 0, 0, 0, 0, 0, + 155, 0, 0, 201, 0, 0, 225, 227, 0, 0, + 0, 211, 216, 0, 230, 107, 0, 0, 0, 0, + 0, 0, 0, 46, 0, 0, 0, 200, 197, 0, + 218, 106, 0, 113, 109, 110, 111, 112, 0, 190, + 0, 0, 0, 198, 0, 188, 0, 189, 0, 0, + 108, 0, 0, 0, 0, 0, 0, 195, 0, 0, + 194, 191, 0, 0, 0 }; -/* YYR2[YYN] -- Number of symbols composing right hand side of rule YYN. */ -static const unsigned char yyr2[] = -{ - 0, 2, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 2, 0, 1, 1, 1, 1, - 0, 0, 1, 1, 1, 2, 0, 2, 0, 3, - 2, 0, 1, 0, 3, 1, 2, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 2, 4, - 5, 5, 3, 2, 2, 1, 3, 1, 3, 1, - 0, 4, 3, 3, 4, 4, 3, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 6, 5, 8, - 6, 6, 6, 6, 6, 3, 1, 1, 1, 1, - 2, 2, 2, 1, 4, 2, 0, 7, 0, 7, - 3, 4, 0, 1, 1, 3, 3, 3, 3, 3, - 1, 0, 1, 1, 1, 0, 2, 3, 1, 1, - 3, 1, 0, 8, 1, 1, 3, 1, 1, 2, - 0, 3, 1, 1, 1, 1, 1, 1, 1, 1, - 3, 1, 1, 1, 1, 1, 2, 2, 2, 3, - 2, 0, 1, 2, 2, 3, 9, 9, 8, 13, - 1, 1, 6, 5, 2, 6, 7, 1, 3, 1, - 0, 2, 1, 5, 5, 5, 2, 4, 4, 6, - 4, 4, 4, 4, 6, 2, 7, 1, 2, 0, - 1, 0, 3, 6, 3, 6, 2, 4, 6, 4 +static const short yydefgoto[] = { 72, + 230, 244, 245, 246, 247, 171, 172, 201, 173, 20, + 10, 30, 401, 279, 352, 369, 301, 353, 73, 74, + 184, 76, 77, 101, 183, 307, 270, 308, 93, 463, + 1, 2, 250, 225, 25, 155, 42, 89, 158, 78, + 321, 256, 257, 258, 31, 82, 11, 37, 12, 13, + 23, 271, 79, 273, 377, 14, 33, 34, 147, 442, + 84, 208, 404, 405, 148, 149, 333, 150, 151 }; -/* YYDEFACT[STATE-NAME] -- Default rule to reduce with in state - STATE-NUM when YYTABLE doesn't specify something else to do. Zero - means the default is an error. */ -static const unsigned char yydefact[] = -{ - 132, 0, 40, 123, 1, 122, 160, 36, 37, 38, - 39, 41, 181, 120, 121, 181, 142, 143, 0, 0, - 40, 0, 125, 41, 0, 42, 43, 44, 0, 0, - 182, 178, 35, 157, 158, 159, 177, 0, 0, 0, - 130, 0, 0, 0, 0, 34, 161, 45, 2, 3, - 58, 62, 63, 64, 65, 66, 67, 68, 69, 70, - 71, 72, 73, 74, 75, 0, 0, 0, 0, 172, - 0, 0, 57, 76, 61, 173, 77, 154, 155, 156, - 221, 180, 0, 0, 0, 141, 131, 124, 117, 118, - 0, 0, 78, 0, 0, 60, 83, 85, 0, 0, - 90, 84, 220, 0, 202, 0, 0, 0, 0, 41, - 190, 191, 6, 7, 8, 9, 10, 11, 12, 13, - 14, 15, 16, 17, 18, 19, 0, 0, 0, 0, - 0, 0, 0, 20, 21, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 179, 41, 194, 0, 217, 137, - 134, 133, 135, 136, 140, 0, 128, 62, 63, 64, - 65, 66, 67, 68, 69, 70, 71, 72, 0, 0, - 0, 0, 126, 0, 0, 0, 82, 152, 89, 87, - 0, 0, 206, 201, 184, 183, 0, 0, 25, 29, - 24, 28, 23, 27, 22, 26, 30, 31, 0, 0, - 48, 48, 226, 0, 0, 215, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 138, 53, 104, 105, 4, 5, 102, 103, 106, - 101, 97, 98, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 100, 99, 53, 59, 59, - 86, 151, 145, 148, 149, 0, 0, 79, 162, 163, - 164, 169, 165, 166, 167, 168, 0, 171, 175, 174, - 176, 0, 185, 0, 0, 0, 222, 0, 224, 219, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 139, 0, 129, 0, - 0, 0, 0, 92, 116, 0, 0, 96, 0, 93, - 0, 0, 0, 0, 127, 80, 81, 144, 146, 0, - 51, 88, 0, 0, 0, 0, 0, 0, 0, 0, - 229, 0, 0, 208, 0, 210, 213, 0, 211, 212, - 0, 0, 0, 207, 0, 227, 0, 0, 0, 55, - 53, 219, 0, 0, 0, 0, 91, 94, 95, 0, - 0, 0, 0, 150, 147, 52, 46, 170, 0, 0, - 200, 48, 49, 48, 197, 218, 0, 0, 0, 0, - 203, 204, 205, 200, 0, 50, 56, 54, 0, 0, - 0, 0, 115, 0, 0, 0, 0, 0, 153, 0, - 0, 199, 0, 0, 223, 225, 0, 0, 0, 209, - 214, 0, 228, 108, 0, 0, 0, 0, 0, 0, - 0, 47, 0, 0, 0, 198, 195, 0, 216, 107, - 0, 114, 110, 111, 112, 113, 0, 188, 0, 0, - 0, 196, 0, 186, 0, 187, 0, 0, 109, 0, - 0, 0, 0, 0, 0, 193, 0, 0, 192, 189 +static const short yypact[] = {-32768, + 164, 551,-32768,-32768,-32768,-32768,-32768,-32768, -12, 47, + 6,-32768,-32768, -13,-32768,-32768, 90, -27, -12, 49, + -23,-32768, 47,-32768,-32768, 84,-32768,-32768,-32768, 935, + -20,-32768,-32768, 96,-32768,-32768,-32768,-32768, 2, 18, + 25,-32768, 1,-32768, 935, 79, 79,-32768,-32768,-32768, +-32768,-32768, 60,-32768,-32768,-32768,-32768,-32768,-32768,-32768, +-32768,-32768,-32768,-32768,-32768,-32768,-32768, 167, 173, 180, + 450,-32768, 96, 94,-32768,-32768, -69,-32768,-32768,-32768, +-32768,-32768, 1098,-32768, 174, 114, 193, 175,-32768,-32768, +-32768,-32768, 973, 1011,-32768, 95, 97,-32768,-32768, -69, + -66, 99, 745,-32768,-32768, 973,-32768, 147, 1049, 50, + 142, 47,-32768,-32768,-32768,-32768,-32768,-32768,-32768,-32768, +-32768,-32768,-32768,-32768,-32768,-32768,-32768,-32768, 973, 973, + 973, 973, 973, 973, 973,-32768,-32768, 973, 973, 973, + 973, 973, 973, 973, 973, 973,-32768, 47,-32768, 83, +-32768,-32768,-32768,-32768,-32768,-32768,-32768, -19,-32768, 115, + 170, 205, 172, 213, 178, 214, 184, 215, 216, 221, + 190, 217, 222, 56,-32768, 973, 973, 973,-32768, 783, +-32768, 131, 129, 563,-32768,-32768, 60,-32768, 563, 563, +-32768,-32768,-32768,-32768,-32768,-32768,-32768,-32768,-32768,-32768, + 563, 935, 133, 134,-32768, 563, 136, 137, 202, 141, + 143, 144, 145, 146, 148, 563, 563, 563, 149, 935, + 973, 973, 218,-32768, 150,-32768,-32768,-32768,-32768,-32768, +-32768,-32768,-32768,-32768,-32768, 154, 156, 157, 165, 821, + 1011, 520, 227, 166, 169, 185, 186,-32768,-32768, 150, + -32, -25, -69,-32768, 96,-32768, 176, 187, 859,-32768, +-32768,-32768,-32768,-32768,-32768,-32768,-32768,-32768, 1011,-32768, +-32768,-32768,-32768, 177,-32768, 189, 563, 3,-32768, 4, +-32768, 191, 563, 192, 973, 973, 973, 973, 973, 973, + 973, 194, 195, 197, 973, 563, 563, 198,-32768, 12, +-32768, 1011, 1011, 1011, 1011,-32768,-32768, -2, -35,-32768, + -40,-32768, 1011, 1011, 1011, 1011,-32768,-32768,-32768,-32768, +-32768, 897, 259,-32768, -33, 278, 279, 199, 563, 298, + 563, 973,-32768, 203, 563,-32768, 211,-32768,-32768, 212, +-32768,-32768, 563, 563, 563,-32768, 219,-32768, 973, 289, + 310,-32768, 150, 191, 282, 220, 224, 1011,-32768,-32768, +-32768, 225, 226, 230, 231,-32768,-32768,-32768, 261,-32768, + 563, 563, 973, 234,-32768, 234,-32768, 235, 563, 236, + 973, 973,-32768,-32768,-32768, 973, 563,-32768,-32768,-32768, + 237, 973, 1011, 1011,-32768, 1011, 1011, 1011, 1011, 318, +-32768, 238, 223, 235, 242, 283,-32768,-32768, 973, 233, + 563,-32768,-32768, 243,-32768,-32768, 245, 249, 247, 248, + 250, 251, 252,-32768, 331, 10, 320,-32768,-32768, 253, +-32768,-32768, 1011,-32768,-32768,-32768,-32768,-32768, 563,-32768, + 645, 39, 336,-32768, 255,-32768, 265,-32768, 645, 563, +-32768, 349, 271, 305, 563, 352, 353,-32768, 563, 563, +-32768,-32768, 376, 378,-32768 }; -/* YYDEFGOTO[NTERM-NUM]. */ -static const short yydefgoto[] = -{ - -1, 69, 227, 241, 242, 243, 244, 168, 169, 198, - 170, 20, 11, 28, 398, 276, 349, 366, 298, 350, - 70, 71, 181, 73, 74, 98, 180, 304, 267, 305, - 90, 1, 2, 3, 247, 222, 152, 40, 86, 155, - 75, 318, 253, 254, 255, 29, 79, 12, 35, 13, - 14, 23, 268, 76, 270, 374, 15, 31, 32, 144, - 439, 81, 205, 401, 402, 145, 146, 330, 147, 148 +static const short yypgoto[] = {-32768, +-32768, 296, 297, 299, 300, -110, -109, -412,-32768, 350, + 365, -101,-32768, -196, 63,-32768, -243,-32768, -41,-32768, + -30,-32768, -55, 284,-32768, -89, 228, -201, 341,-32768, +-32768,-32768,-32768,-32768, 373,-32768,-32768,-32768,-32768, 11, +-32768, 72,-32768,-32768, 374,-32768,-32768,-32768,-32768, 394, +-32768, -364, 46, 64, -103,-32768, 384,-32768,-32768,-32768, +-32768,-32768, 68, 15,-32768,-32768, 51,-32768,-32768 }; -/* YYPACT[STATE-NUM] -- Index in YYTABLE of the portion describing - STATE-NUM. */ -#define YYPACT_NINF -407 -static const short yypact[] = -{ - -407, 19, 94, 198, -407, -407, -407, -407, -407, -407, - -407, 71, 28, -407, -407, -14, -407, -407, 58, -7, - 80, 22, -407, 71, 60, -407, -407, -407, 976, -16, - -407, -407, 121, -407, -407, -407, -407, 46, 69, 72, - -407, -35, 976, 3, 3, -407, -407, -407, -407, -407, - 49, -407, -407, -407, -407, -407, -407, -407, -407, -407, - -407, -407, -407, -407, -407, 161, 173, 175, 66, -407, - 121, 87, -407, -407, -67, -407, -407, -407, -407, -407, - 1095, -407, 167, 52, 189, 172, -407, -407, -407, -407, - 998, 1042, -407, 93, 95, -407, -407, -67, -6, 99, - 729, -407, -407, 998, -407, 146, 1102, -1, 369, 71, - -407, -407, -407, -407, -407, -407, -407, -407, -407, -407, - -407, -407, -407, -407, -407, -407, 998, 998, 998, 998, - 998, 998, 998, -407, -407, 998, 998, 998, 998, 998, - 998, 998, 998, 998, -407, 71, -407, 67, -407, -407, - -407, -407, -407, -407, -407, 34, -407, 131, 151, 199, - 157, 200, 160, 201, 178, 202, 209, 210, 183, 203, - 212, 371, -407, 998, 998, 998, -407, 767, -407, 109, - 119, 549, -407, -407, 49, -407, 549, 549, -407, -407, - -407, -407, -407, -407, -407, -407, -407, -407, 549, 976, - 128, 129, -407, 549, 130, 133, 207, 135, 136, 137, - 138, 148, 149, 549, 549, 549, 150, 976, 998, 998, - 227, -407, 156, -407, -407, -407, -407, -407, -407, -407, - -407, -407, -407, 164, 165, 166, 168, 833, 1042, 504, - 233, 169, 174, 176, 177, -407, -407, 156, 37, -89, - -67, -407, 121, -407, 159, 179, 871, -407, -407, -407, - -407, -407, -407, -407, -407, -407, 1042, -407, -407, -407, - -407, 162, -407, 163, 549, -4, -407, 7, -407, 180, - 549, 186, 998, 998, 998, 998, 998, 998, 998, 181, - 187, 191, 998, 549, 549, 193, -407, 15, -407, 1042, - 1042, 1042, 1042, -407, -407, 41, -34, -407, -3, -407, - 1042, 1042, 1042, 1042, -407, -407, -407, -407, -407, 938, - 242, -407, -10, 272, 273, 194, 549, 293, 549, 998, - -407, 206, 549, -407, 220, -407, -407, 221, -407, -407, - 549, 549, 549, -407, 222, -407, 998, 275, 296, -407, - 156, 180, 265, 223, 225, 1042, -407, -407, -407, 229, - 230, 232, 235, -407, -407, -407, 267, -407, 549, 549, - 998, 236, -407, 236, -407, 237, 549, 238, 998, 998, - -407, -407, -407, 998, 549, -407, -407, -407, 224, 998, - 1042, 1042, -407, 1042, 1042, 1042, 1042, 340, -407, 246, - 244, 237, 247, 294, -407, -407, 998, 245, 549, -407, - -407, 249, -407, -407, 250, 254, 253, 255, 256, 257, - 258, -407, 335, 13, 328, -407, -407, 264, -407, -407, - 1042, -407, -407, -407, -407, -407, 549, -407, 630, 43, - 349, -407, 269, -407, 274, -407, 630, 549, -407, 351, - 276, 308, 549, 366, 367, -407, 549, 549, -407, -407 -}; -/* YYPGOTO[NTERM-NUM]. */ -static const short yypgoto[] = -{ - -407, -407, -407, 309, 310, 311, 312, -107, -106, -406, - -407, 362, 376, -78, -407, -195, 78, -407, -240, -407, - -37, -407, -28, -407, -58, 299, -407, -87, 234, -200, - 356, -407, -407, -407, -407, -407, -407, -407, -407, -407, - 0, -407, 84, -407, -407, 381, -407, -407, -407, -407, - 405, -407, -312, -30, 127, -91, -407, 396, -407, -407, - -407, -407, -407, 83, 30, -407, -407, 63, -407, -407 -}; +#define YYLAST 1196 -/* YYTABLE[YYPACT[STATE-NUM]]. What to do in state STATE-NUM. If - positive, shift that token. If negative, reduce the rule which - number is the opposite. If zero, do what YYDEFACT says. - If YYTABLE_NINF, syntax error. */ -#define YYTABLE_NINF -120 -static const short yytable[] = -{ - 72, 196, 197, 21, 172, 87, 278, 314, 186, 30, - 97, 326, 182, 77, 72, 185, 33, 438, 316, 4, - 187, 101, 328, 188, 189, 190, 191, 192, 193, 194, - 195, 199, 21, 446, -59, 88, 89, 202, 306, 308, - 206, 207, 97, 101, 208, 209, 210, 211, 212, 347, - 327, 30, 216, 188, 189, 190, 191, 192, 193, 194, - 195, 327, 156, 171, 47, 355, 322, 217, 85, 348, - 99, 48, 49, 357, 95, 51, 52, 53, 54, 55, - 56, 57, 58, 59, 60, 61, 62, 63, 16, 355, - 17, 41, 78, 175, -119, 34, 355, 367, 200, 201, - 42, 203, 204, 176, 150, 151, 358, 37, 38, 39, - 387, 64, 213, 214, 215, 248, 249, 250, 437, 5, - 45, 7, 8, 9, 10, 6, 444, 43, 295, 24, - 25, 26, 27, 220, 450, 7, 8, 9, 10, 221, - 355, 246, 315, 16, 82, 17, 356, 101, 445, 252, - -60, 269, 218, 219, -25, -25, 269, 269, 223, 224, - -24, -24, 274, -23, -23, 92, 65, 83, 269, 66, - 84, 72, 67, 269, 68, 96, 404, 93, 405, 94, - 293, -22, -22, 269, 269, 269, 225, 226, 100, 72, - 294, 149, 334, 153, 336, 337, 154, 173, 250, 174, - 177, 343, 183, -29, -28, -27, -26, 228, 256, 171, - 171, 171, 351, 352, 353, 354, -32, -33, -35, 229, - 16, 257, 17, 359, 360, 361, 362, 275, 277, 6, - -35, -35, 281, 280, 283, 284, 285, 286, 171, -35, - -35, -35, -35, 282, 269, -35, 18, 287, 288, 292, - 269, 296, 317, 19, 333, 297, 335, 309, 319, 338, - 339, 323, 324, 269, 269, 299, 300, 301, 392, 302, - 310, 171, 171, 171, 171, 311, 347, 312, 313, 329, - 340, 320, 171, 171, 171, 171, 341, 409, 410, 332, - 342, 252, 346, 368, 369, 370, 269, 372, 269, 385, - 386, 389, 269, 415, 416, 376, 417, 418, 419, 420, - 269, 269, 269, 271, 272, 425, 196, 197, 384, 378, - 379, 397, 390, 383, 391, 273, 413, 171, 393, 394, - 279, 395, 196, 197, 396, 403, 406, 408, 269, 269, - 289, 290, 291, 442, 421, 422, 269, 423, 327, 424, - 426, 428, 429, 430, 269, 431, 436, 432, 433, 434, - 435, 414, 171, 171, 440, 171, 171, 171, 171, 441, - 447, 448, 452, 449, 454, 453, 48, 49, 269, 188, - 189, 190, 191, 192, 193, 194, 195, 456, 457, 140, - 141, 142, 143, 16, 80, 17, 44, 230, 365, 179, - 91, 325, 171, 364, 46, 245, 269, 331, 22, 231, - 232, 36, 375, 411, 388, 0, 0, 269, 0, 0, - 344, 345, 269, 0, 0, 0, 269, 269, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 112, - 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, - 123, 124, 125, 371, 0, 373, 0, 0, 233, 377, - 234, 235, 133, 134, 0, 236, 0, 380, 381, 382, - 0, 0, 0, 0, 237, 0, 0, 238, 0, 239, - 0, 0, 240, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 399, 400, 0, 0, 0, - 0, 0, 0, 407, 0, 0, 0, 0, 0, 48, - 49, 412, 95, 157, 158, 159, 160, 161, 162, 163, - 164, 165, 166, 167, 62, 63, 16, 0, 17, 0, - 0, 0, 0, 0, 0, 427, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, - 0, 0, 258, 259, 48, 49, 260, 0, 0, 0, - 0, 0, 0, 443, 0, 0, 0, 0, 0, 0, - 0, 16, 0, 17, 451, 261, 262, 263, 0, 455, - 0, 0, 0, 458, 459, 0, 0, 264, 265, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 65, 0, 0, 66, 0, 0, - 67, 0, 68, 307, 0, 0, 0, 112, 113, 114, - 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, - 125, 0, 0, 258, 259, 0, 233, 260, 234, 235, - 133, 134, 0, 236, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 266, 261, 262, 263, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 264, 265, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 112, 113, - 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, - 124, 125, 0, 0, 0, 0, 0, 233, 0, 234, - 235, 133, 134, 0, 236, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 48, 49, 266, 95, 51, 52, - 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, - 63, 16, 0, 17, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 178, 0, 0, 0, - 0, 0, 48, 49, 64, 95, 51, 52, 53, 54, - 55, 56, 57, 58, 59, 60, 61, 62, 63, 16, - 0, 17, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 251, 0, 0, 0, 0, 0, - 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 65, - 0, 0, 66, 0, 0, 67, 0, 68, 48, 49, - 0, 95, 157, 158, 159, 160, 161, 162, 163, 164, - 165, 166, 167, 62, 63, 16, 0, 17, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 65, 0, 0, - 66, 0, 0, 67, 0, 68, 48, 49, 64, 95, - 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, - 61, 62, 63, 16, 0, 17, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 321, 0, - 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 65, 0, 0, 66, 0, 303, 67, - 0, 68, 0, 48, 49, 0, 95, 51, 52, 53, - 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, - 16, 0, 17, 0, 0, 0, 0, 0, 0, 0, - 0, 65, 0, 0, 66, 363, 0, 67, 0, 68, - 0, 48, 49, 64, 50, 51, 52, 53, 54, 55, - 56, 57, 58, 59, 60, 61, 62, 63, 16, 0, - 17, 0, 0, 48, 49, 0, 95, 51, 52, 53, - 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, - 16, 64, 17, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 65, 0, - 0, 66, 0, 64, 67, 0, 68, 48, 49, 0, - 95, 157, 158, 159, 160, 161, 162, 163, 164, 165, - 166, 167, 62, 63, 16, 0, 17, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 65, 0, 0, 66, - 0, 0, 67, 0, 68, 0, 0, 64, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 65, 0, - 0, 66, 0, 0, 67, 0, 68, 48, 49, 0, - 184, 51, 52, 53, 54, 55, 56, 57, 58, 59, - 60, 61, 62, 63, 16, 0, 17, 0, 0, 0, - 102, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 103, 65, 0, 0, 66, 0, 64, 67, 0, - 68, 104, 105, 0, 0, 0, 0, 106, 107, 108, - 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, - 119, 120, 121, 122, 123, 124, 125, 126, 127, 128, - 0, 0, 129, 130, 131, 132, 133, 134, 135, 136, - 137, 138, 139, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 65, 0, 0, 66, 0, 0, 67, 0, - 68 -}; -static const short yycheck[] = -{ - 28, 108, 108, 3, 91, 42, 201, 247, 9, 23, - 68, 15, 103, 29, 42, 106, 30, 423, 107, 0, - 21, 110, 15, 10, 11, 12, 13, 14, 15, 16, - 17, 109, 32, 439, 101, 32, 33, 128, 238, 239, - 131, 132, 100, 110, 135, 136, 137, 138, 139, 34, - 54, 23, 143, 10, 11, 12, 13, 14, 15, 16, - 17, 54, 90, 91, 4, 99, 266, 145, 103, 54, - 70, 5, 6, 107, 8, 9, 10, 11, 12, 13, - 14, 15, 16, 17, 18, 19, 20, 21, 22, 99, - 24, 98, 108, 99, 0, 109, 99, 107, 126, 127, - 20, 129, 130, 109, 52, 53, 109, 49, 50, 51, - 350, 45, 140, 141, 142, 173, 174, 175, 105, 25, - 98, 41, 42, 43, 44, 31, 438, 47, 219, 58, - 59, 60, 61, 99, 446, 41, 42, 43, 44, 105, - 99, 171, 105, 22, 98, 24, 105, 110, 105, 177, - 101, 181, 85, 86, 3, 4, 186, 187, 27, 28, - 3, 4, 199, 3, 4, 4, 100, 98, 198, 103, - 98, 199, 106, 203, 108, 109, 371, 4, 373, 4, - 217, 3, 4, 213, 214, 215, 3, 4, 101, 217, - 218, 24, 283, 4, 285, 286, 24, 104, 256, 104, - 101, 292, 56, 4, 4, 4, 4, 4, 99, 237, - 238, 239, 299, 300, 301, 302, 7, 7, 20, 7, - 22, 102, 24, 310, 311, 312, 313, 99, 99, 31, - 32, 33, 99, 103, 99, 99, 99, 99, 266, 41, - 42, 43, 44, 36, 274, 47, 48, 99, 99, 99, - 280, 24, 252, 55, 282, 99, 284, 24, 99, 287, - 288, 99, 99, 293, 294, 101, 101, 101, 355, 101, - 101, 299, 300, 301, 302, 101, 34, 101, 101, 99, - 99, 102, 310, 311, 312, 313, 99, 378, 379, 103, - 99, 319, 99, 21, 21, 101, 326, 4, 328, 24, - 4, 36, 332, 390, 391, 99, 393, 394, 395, 396, - 340, 341, 342, 186, 187, 406, 423, 423, 346, 99, - 99, 54, 99, 101, 99, 198, 102, 355, 99, 99, - 203, 99, 439, 439, 99, 99, 99, 99, 368, 369, - 213, 214, 215, 430, 4, 99, 376, 103, 54, 102, - 105, 102, 102, 99, 384, 102, 21, 102, 102, 102, - 102, 389, 390, 391, 36, 393, 394, 395, 396, 105, - 21, 102, 21, 99, 66, 99, 5, 6, 408, 10, - 11, 12, 13, 14, 15, 16, 17, 21, 21, 80, - 80, 80, 80, 22, 32, 24, 20, 26, 320, 100, - 44, 274, 430, 319, 23, 171, 436, 280, 3, 38, - 39, 15, 329, 383, 351, -1, -1, 447, -1, -1, - 293, 294, 452, -1, -1, -1, 456, 457, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, -1, 68, - 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, - 79, 80, 81, 326, -1, 328, -1, -1, 87, 332, - 89, 90, 91, 92, -1, 94, -1, 340, 341, 342, - -1, -1, -1, -1, 103, -1, -1, 106, -1, 108, - -1, -1, 111, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, 368, 369, -1, -1, -1, - -1, -1, -1, 376, -1, -1, -1, -1, -1, 5, - 6, 384, 8, 9, 10, 11, 12, 13, 14, 15, - 16, 17, 18, 19, 20, 21, 22, -1, 24, -1, - -1, -1, -1, -1, -1, 408, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, -1, 45, - -1, -1, 3, 4, 5, 6, 7, -1, -1, -1, - -1, -1, -1, 436, -1, -1, -1, -1, -1, -1, - -1, 22, -1, 24, 447, 26, 27, 28, -1, 452, - -1, -1, -1, 456, 457, -1, -1, 38, 39, -1, - -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, 100, -1, -1, 103, -1, -1, - 106, -1, 108, 109, -1, -1, -1, 68, 69, 70, - 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, - 81, -1, -1, 3, 4, -1, 87, 7, 89, 90, - 91, 92, -1, 94, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, 106, 26, 27, 28, -1, - -1, -1, -1, -1, -1, -1, -1, -1, 38, 39, - -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, 68, 69, - 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, - 80, 81, -1, -1, -1, -1, -1, 87, -1, 89, - 90, 91, 92, -1, 94, -1, -1, -1, -1, -1, - -1, -1, -1, -1, 5, 6, 106, 8, 9, 10, - 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, - 21, 22, -1, 24, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, 37, -1, -1, -1, - -1, -1, 5, 6, 45, 8, 9, 10, 11, 12, - 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, - -1, 24, -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, 37, -1, -1, -1, -1, -1, - -1, -1, 45, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, -1, 100, - -1, -1, 103, -1, -1, 106, -1, 108, 5, 6, - -1, 8, 9, 10, 11, 12, 13, 14, 15, 16, - 17, 18, 19, 20, 21, 22, -1, 24, -1, -1, - -1, -1, -1, -1, -1, -1, -1, 100, -1, -1, - 103, -1, -1, 106, -1, 108, 5, 6, 45, 8, - 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, - 19, 20, 21, 22, -1, 24, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, 37, -1, - -1, -1, -1, -1, -1, -1, 45, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, 100, -1, -1, 103, -1, 105, 106, - -1, 108, -1, 5, 6, -1, 8, 9, 10, 11, - 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, - 22, -1, 24, -1, -1, -1, -1, -1, -1, -1, - -1, 100, -1, -1, 103, 37, -1, 106, -1, 108, - -1, 5, 6, 45, 8, 9, 10, 11, 12, 13, - 14, 15, 16, 17, 18, 19, 20, 21, 22, -1, - 24, -1, -1, 5, 6, -1, 8, 9, 10, 11, - 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, - 22, 45, 24, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, 100, -1, - -1, 103, -1, 45, 106, -1, 108, 5, 6, -1, - 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, - 18, 19, 20, 21, 22, -1, 24, -1, -1, -1, - -1, -1, -1, -1, -1, -1, 100, -1, -1, 103, - -1, -1, 106, -1, 108, -1, -1, 45, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, 100, -1, - -1, 103, -1, -1, 106, -1, 108, 5, 6, -1, - 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, - 18, 19, 20, 21, 22, -1, 24, -1, -1, -1, - 35, -1, -1, -1, -1, -1, -1, -1, -1, -1, - -1, 46, 100, -1, -1, 103, -1, 45, 106, -1, - 108, 56, 57, -1, -1, -1, -1, 62, 63, 64, - 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, - 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, - -1, -1, 87, 88, 89, 90, 91, 92, 93, 94, - 95, 96, 97, -1, -1, -1, -1, -1, -1, -1, - -1, -1, 100, -1, -1, 103, -1, -1, 106, -1, - 108 +static const short yytable[] = { 75, + 199, 200, 185, 90, 175, 188, 317, 281, 80, 32, + 202, 24, 21, 441, 75, 100, 35, 329, 331, 191, + 192, 193, 194, 195, 196, 197, 198, 205, 32, 449, + 209, 210, -58, 178, 211, 212, 213, 214, 215, 309, + 311, 104, 219, 179, 21, 350, 220, 100, 191, 192, + 193, 194, 195, 196, 197, 198, 330, 330, 189, 358, + 51, 52, 159, 174, 358, 351, 358, 325, 45, 361, + 190, 43, 360, 318, 370, 48, 447, 15, 104, 16, + 223, 233, 319, 102, 453, 104, 224, 50, 81, 5, + 6, 7, 8, 234, 235, 46, 36, 358, 203, 204, + 85, 206, 207, 359, 88, 26, 27, 28, 29, 390, + 91, 92, 216, 217, 218, 440, 86, 15, 298, 16, + 251, 252, 253, 87, 115, 116, 117, 118, 119, 120, + 121, 122, 123, 124, 125, 126, 127, 128, 39, 40, + 41, 226, 227, 236, 448, 237, 238, 136, 137, 255, + 239, 191, 192, 193, 194, 195, 196, 197, 198, 240, + 277, -59, 241, -118, 242, 153, 154, 243, 221, 222, + 95, 75, -24, -24, -23, -23, 96, 407, 296, 408, + -22, -22, 337, 97, 339, 340, -21, -21, 3, 75, + 297, 346, 228, 229, 4, 103, 156, 152, 157, 176, + 180, 177, 186, 253, 5, 6, 7, 8, -28, 174, + 174, 174, 354, 355, 356, 357, -27, -26, -25, 249, + 231, 9, -31, 362, 363, 364, 365, -32, 232, 272, + 259, 260, 278, 280, 272, 272, 284, 285, 174, 283, + 286, 299, 287, 288, 289, 290, 272, 291, 295, 300, + 312, 272, 274, 275, 336, 302, 338, 303, 304, 341, + 342, 272, 272, 272, 276, 320, 305, 313, 395, 282, + 314, 174, 174, 174, 174, 322, 326, 412, 413, 292, + 293, 294, 174, 174, 174, 174, 315, 316, 327, 323, + 332, 255, 350, 343, 344, 335, 345, 349, 371, 372, + 373, 375, 379, 418, 419, 428, 420, 421, 422, 423, + 381, 382, 388, 389, 400, 199, 200, 392, 387, 393, + 386, 424, 272, 394, 396, 397, 426, 174, 272, 398, + 399, 199, 200, 406, 409, 411, 330, 425, 429, 416, + 328, 272, 272, 445, 427, 431, 334, 432, 433, 434, + 435, 439, 436, 437, 438, 443, 450, 451, 444, 347, + 348, 417, 174, 174, 452, 174, 174, 174, 174, 455, + 456, 457, 459, 460, 272, 464, 272, 465, 143, 144, + 272, 145, 146, 83, 47, 368, 182, 94, 272, 272, + 272, 44, 374, 367, 376, 22, 49, 38, 380, 378, + 414, 248, 174, 0, 391, 0, 383, 384, 385, 0, + 0, 0, 0, 0, 0, 0, 272, 272, 0, 0, + 0, 0, 0, 0, 272, 0, 0, 0, 0, 0, + 0, 0, 272, 0, 402, 403, 0, 0, 0, 0, + 0, 0, 410, 0, 0, 0, 0, 0, 0, 0, + 415, 0, 0, 0, 51, 52, 272, 98, 54, 55, + 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, + 66, 15, 0, 16, 430, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 272, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 67, 272, 0, 0, 0, 0, + 272, 0, 446, 0, 272, 272, 0, 0, 0, 0, + 0, 0, 0, 454, 0, 0, 0, 0, 458, 0, + 0, 0, 461, 462, 51, 52, 0, 98, 160, 161, + 162, 163, 164, 165, 166, 167, 168, 169, 170, 65, + 66, 15, 0, 16, 0, 0, 0, 0, 0, 0, + 68, 0, 0, 69, 0, 0, 70, 0, 71, 99, + 0, 0, 0, 0, 67, 261, 262, 51, 52, 263, + -34, 0, 15, 0, 16, 0, 0, 0, 0, 0, + 0, 4, -34, -34, 15, 0, 16, 0, 264, 265, + 266, -34, -34, -34, -34, 0, 0, -34, 17, 0, + 267, 268, 0, 0, 0, 18, 0, 0, 19, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 68, 0, 0, 69, 0, 0, 70, 0, 71, 310, + 0, 115, 116, 117, 118, 119, 120, 121, 122, 123, + 124, 125, 126, 127, 128, 0, 0, 261, 262, 0, + 236, 263, 237, 238, 136, 137, 0, 239, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 269, + 264, 265, 266, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 267, 268, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 115, 116, 117, 118, 119, 120, 121, + 122, 123, 124, 125, 126, 127, 128, 0, 0, 0, + 0, 0, 236, 0, 237, 238, 136, 137, 0, 239, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 51, + 52, 269, 98, 54, 55, 56, 57, 58, 59, 60, + 61, 62, 63, 64, 65, 66, 15, 0, 16, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 181, 0, 0, 0, 0, 0, 51, 52, 67, + 98, 54, 55, 56, 57, 58, 59, 60, 61, 62, + 63, 64, 65, 66, 15, 0, 16, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 254, + 0, 0, 0, 0, 0, 51, 52, 67, 98, 160, + 161, 162, 163, 164, 165, 166, 167, 168, 169, 170, + 65, 66, 15, 0, 16, 68, 0, 0, 69, 0, + 0, 70, 0, 71, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 51, 52, 67, 98, 54, 55, 56, + 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, + 15, 0, 16, 68, 0, 0, 69, 0, 0, 70, + 0, 71, 0, 0, 0, 324, 0, 0, 0, 0, + 0, 51, 52, 67, 98, 54, 55, 56, 57, 58, + 59, 60, 61, 62, 63, 64, 65, 66, 15, 0, + 16, 68, 0, 0, 69, 0, 306, 70, 0, 71, + 0, 0, 0, 366, 0, 0, 0, 0, 0, 51, + 52, 67, 53, 54, 55, 56, 57, 58, 59, 60, + 61, 62, 63, 64, 65, 66, 15, 0, 16, 68, + 0, 0, 69, 0, 0, 70, 0, 71, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 51, 52, 67, + 98, 54, 55, 56, 57, 58, 59, 60, 61, 62, + 63, 64, 65, 66, 15, 0, 16, 68, 0, 0, + 69, 0, 0, 70, 0, 71, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 51, 52, 67, 98, 160, + 161, 162, 163, 164, 165, 166, 167, 168, 169, 170, + 65, 66, 15, 0, 16, 68, 0, 0, 69, 0, + 0, 70, 0, 71, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 51, 52, 67, 187, 54, 55, 56, + 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, + 15, 0, 16, 68, 0, 0, 69, 0, 0, 70, + 0, 71, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 67, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 68, 0, 0, 69, 0, 0, 70, 0, 71, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 105, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 106, 0, 0, 0, 0, 0, 68, + 0, 0, 69, 107, 108, 70, 0, 71, 0, 0, + 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, + 119, 120, 121, 122, 123, 124, 125, 126, 127, 128, + 129, 130, 131, 0, 0, 132, 133, 134, 135, 136, + 137, 138, 139, 140, 141, 142 }; -/* YYSTOS[STATE-NUM] -- The (internal number of the) accessing - symbol of state STATE-NUM. */ -static const unsigned char yystos[] = -{ - 0, 143, 144, 145, 0, 25, 31, 41, 42, 43, - 44, 124, 159, 161, 162, 168, 22, 24, 48, 55, - 123, 152, 162, 163, 58, 59, 60, 61, 125, 157, - 23, 169, 170, 30, 109, 160, 169, 49, 50, 51, - 149, 98, 20, 47, 124, 98, 157, 4, 5, 6, - 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, - 18, 19, 20, 21, 45, 100, 103, 106, 108, 113, - 132, 133, 134, 135, 136, 152, 165, 29, 108, 158, - 123, 173, 98, 98, 98, 103, 150, 132, 32, 33, - 142, 142, 4, 4, 4, 8, 109, 136, 137, 152, - 101, 110, 35, 46, 56, 57, 62, 63, 64, 65, - 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, - 76, 77, 78, 79, 80, 81, 82, 83, 84, 87, - 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, - 115, 116, 117, 118, 171, 177, 178, 180, 181, 24, - 52, 53, 148, 4, 24, 151, 134, 9, 10, 11, - 12, 13, 14, 15, 16, 17, 18, 19, 119, 120, - 122, 134, 139, 104, 104, 99, 109, 101, 37, 137, - 138, 134, 167, 56, 8, 167, 9, 21, 10, 11, - 12, 13, 14, 15, 16, 17, 119, 120, 121, 125, - 134, 134, 167, 134, 134, 174, 167, 167, 167, 167, - 167, 167, 167, 134, 134, 134, 167, 125, 85, 86, - 99, 105, 147, 27, 28, 3, 4, 114, 4, 7, - 26, 38, 39, 87, 89, 90, 94, 103, 106, 108, - 111, 115, 116, 117, 118, 140, 165, 146, 136, 136, - 136, 37, 134, 154, 155, 156, 99, 102, 3, 4, - 7, 26, 27, 28, 38, 39, 106, 140, 164, 165, - 166, 166, 166, 166, 132, 99, 127, 99, 127, 166, - 103, 99, 36, 99, 99, 99, 99, 99, 99, 166, - 166, 166, 99, 132, 134, 167, 24, 99, 130, 101, - 101, 101, 101, 105, 139, 141, 141, 109, 141, 24, - 101, 101, 101, 101, 130, 105, 107, 152, 153, 99, - 102, 37, 141, 99, 99, 166, 15, 54, 15, 99, - 179, 166, 103, 134, 167, 134, 167, 167, 134, 134, - 99, 99, 99, 167, 166, 166, 99, 34, 54, 128, - 131, 139, 139, 139, 139, 99, 105, 107, 109, 139, - 139, 139, 139, 37, 154, 128, 129, 107, 21, 21, - 101, 166, 4, 166, 167, 175, 99, 166, 99, 99, - 166, 166, 166, 101, 134, 24, 4, 130, 179, 36, - 99, 99, 139, 99, 99, 99, 99, 54, 126, 166, - 166, 175, 176, 99, 127, 127, 99, 166, 99, 167, - 167, 176, 166, 102, 134, 139, 139, 139, 139, 139, - 139, 4, 99, 103, 102, 167, 105, 166, 102, 102, - 99, 102, 102, 102, 102, 102, 21, 105, 121, 172, - 36, 105, 139, 166, 164, 105, 121, 21, 102, 99, - 164, 166, 21, 99, 66, 166, 21, 21, 166, 166 +static const short yycheck[] = { 30, + 111, 111, 106, 45, 94, 109, 250, 204, 29, 23, + 112, 24, 2, 426, 45, 71, 30, 15, 15, 10, + 11, 12, 13, 14, 15, 16, 17, 131, 23, 442, + 134, 135, 102, 100, 138, 139, 140, 141, 142, 241, + 242, 111, 146, 110, 34, 34, 148, 103, 10, 11, + 12, 13, 14, 15, 16, 17, 54, 54, 9, 100, + 5, 6, 93, 94, 100, 54, 100, 269, 20, 110, + 21, 99, 108, 106, 108, 99, 441, 22, 111, 24, + 100, 26, 108, 73, 449, 111, 106, 4, 109, 41, + 42, 43, 44, 38, 39, 47, 110, 100, 129, 130, + 99, 132, 133, 106, 104, 59, 60, 61, 62, 353, + 32, 33, 143, 144, 145, 106, 99, 22, 222, 24, + 176, 177, 178, 99, 69, 70, 71, 72, 73, 74, + 75, 76, 77, 78, 79, 80, 81, 82, 49, 50, + 51, 27, 28, 88, 106, 90, 91, 92, 93, 180, + 95, 10, 11, 12, 13, 14, 15, 16, 17, 104, + 202, 102, 107, 0, 109, 52, 53, 112, 86, 87, + 4, 202, 3, 4, 3, 4, 4, 374, 220, 376, + 3, 4, 286, 4, 288, 289, 3, 4, 25, 220, + 221, 295, 3, 4, 31, 102, 4, 24, 24, 105, + 102, 105, 56, 259, 41, 42, 43, 44, 4, 240, + 241, 242, 302, 303, 304, 305, 4, 4, 4, 174, + 4, 58, 7, 313, 314, 315, 316, 7, 7, 184, + 100, 103, 100, 100, 189, 190, 100, 36, 269, 104, + 100, 24, 100, 100, 100, 100, 201, 100, 100, 100, + 24, 206, 189, 190, 285, 102, 287, 102, 102, 290, + 291, 216, 217, 218, 201, 255, 102, 102, 358, 206, + 102, 302, 303, 304, 305, 100, 100, 381, 382, 216, + 217, 218, 313, 314, 315, 316, 102, 102, 100, 103, + 100, 322, 34, 100, 100, 104, 100, 100, 21, 21, + 102, 4, 100, 393, 394, 409, 396, 397, 398, 399, + 100, 100, 24, 4, 54, 426, 426, 36, 349, 100, + 102, 4, 277, 100, 100, 100, 104, 358, 283, 100, + 100, 442, 442, 100, 100, 100, 54, 100, 106, 103, + 277, 296, 297, 433, 103, 103, 283, 103, 100, 103, + 103, 21, 103, 103, 103, 36, 21, 103, 106, 296, + 297, 392, 393, 394, 100, 396, 397, 398, 399, 21, + 100, 67, 21, 21, 329, 0, 331, 0, 83, 83, + 335, 83, 83, 34, 20, 323, 103, 47, 343, 344, + 345, 19, 329, 322, 331, 2, 23, 14, 335, 332, + 386, 174, 433, -1, 354, -1, 343, 344, 345, -1, + -1, -1, -1, -1, -1, -1, 371, 372, -1, -1, + -1, -1, -1, -1, 379, -1, -1, -1, -1, -1, + -1, -1, 387, -1, 371, 372, -1, -1, -1, -1, + -1, -1, 379, -1, -1, -1, -1, -1, -1, -1, + 387, -1, -1, -1, 5, 6, 411, 8, 9, 10, + 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, + 21, 22, -1, 24, 411, -1, -1, -1, -1, -1, + -1, -1, -1, -1, 439, -1, -1, -1, -1, -1, + -1, -1, -1, -1, 45, 450, -1, -1, -1, -1, + 455, -1, 439, -1, 459, 460, -1, -1, -1, -1, + -1, -1, -1, 450, -1, -1, -1, -1, 455, -1, + -1, -1, 459, 460, 5, 6, -1, 8, 9, 10, + 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, + 21, 22, -1, 24, -1, -1, -1, -1, -1, -1, + 101, -1, -1, 104, -1, -1, 107, -1, 109, 110, + -1, -1, -1, -1, 45, 3, 4, 5, 6, 7, + 20, -1, 22, -1, 24, -1, -1, -1, -1, -1, + -1, 31, 32, 33, 22, -1, 24, -1, 26, 27, + 28, 41, 42, 43, 44, -1, -1, 47, 48, -1, + 38, 39, -1, -1, -1, 55, -1, -1, 58, -1, + -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, + 101, -1, -1, 104, -1, -1, 107, -1, 109, 110, + -1, 69, 70, 71, 72, 73, 74, 75, 76, 77, + 78, 79, 80, 81, 82, -1, -1, 3, 4, -1, + 88, 7, 90, 91, 92, 93, -1, 95, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, -1, 107, + 26, 27, 28, -1, -1, -1, -1, -1, -1, -1, + -1, -1, 38, 39, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, 69, 70, 71, 72, 73, 74, 75, + 76, 77, 78, 79, 80, 81, 82, -1, -1, -1, + -1, -1, 88, -1, 90, 91, 92, 93, -1, 95, + -1, -1, -1, -1, -1, -1, -1, -1, -1, 5, + 6, 107, 8, 9, 10, 11, 12, 13, 14, 15, + 16, 17, 18, 19, 20, 21, 22, -1, 24, -1, + -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, + -1, 37, -1, -1, -1, -1, -1, 5, 6, 45, + 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, + 18, 19, 20, 21, 22, -1, 24, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, -1, 37, + -1, -1, -1, -1, -1, 5, 6, 45, 8, 9, + 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, + 20, 21, 22, -1, 24, 101, -1, -1, 104, -1, + -1, 107, -1, 109, -1, -1, -1, -1, -1, -1, + -1, -1, -1, 5, 6, 45, 8, 9, 10, 11, + 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, + 22, -1, 24, 101, -1, -1, 104, -1, -1, 107, + -1, 109, -1, -1, -1, 37, -1, -1, -1, -1, + -1, 5, 6, 45, 8, 9, 10, 11, 12, 13, + 14, 15, 16, 17, 18, 19, 20, 21, 22, -1, + 24, 101, -1, -1, 104, -1, 106, 107, -1, 109, + -1, -1, -1, 37, -1, -1, -1, -1, -1, 5, + 6, 45, 8, 9, 10, 11, 12, 13, 14, 15, + 16, 17, 18, 19, 20, 21, 22, -1, 24, 101, + -1, -1, 104, -1, -1, 107, -1, 109, -1, -1, + -1, -1, -1, -1, -1, -1, -1, 5, 6, 45, + 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, + 18, 19, 20, 21, 22, -1, 24, 101, -1, -1, + 104, -1, -1, 107, -1, 109, -1, -1, -1, -1, + -1, -1, -1, -1, -1, 5, 6, 45, 8, 9, + 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, + 20, 21, 22, -1, 24, 101, -1, -1, 104, -1, + -1, 107, -1, 109, -1, -1, -1, -1, -1, -1, + -1, -1, -1, 5, 6, 45, 8, 9, 10, 11, + 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, + 22, -1, 24, 101, -1, -1, 104, -1, -1, 107, + -1, 109, -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, 45, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, + -1, 101, -1, -1, 104, -1, -1, 107, -1, 109, + -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, 35, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, 46, -1, -1, -1, -1, -1, 101, + -1, -1, 104, 56, 57, 107, -1, 109, -1, -1, + 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, + 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, + 83, 84, 85, -1, -1, 88, 89, 90, 91, 92, + 93, 94, 95, 96, 97, 98 }; +/* -*-C-*- Note some compilers choke on comments on `#line' lines. */ +#line 3 "/usr/share/bison.simple" +/* This file comes from bison-1.28. */ -#if ! defined (YYSIZE_T) && defined (__SIZE_TYPE__) -# define YYSIZE_T __SIZE_TYPE__ -#endif -#if ! defined (YYSIZE_T) && defined (size_t) -# define YYSIZE_T size_t +/* Skeleton output parser for bison, + Copyright (C) 1984, 1989, 1990 Free Software Foundation, Inc. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2, or (at your option) + any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, + Boston, MA 02111-1307, USA. */ + +/* As a special exception, when this file is copied by Bison into a + Bison output file, you may use that output file without restriction. + This special exception was added by the Free Software Foundation + in version 1.24 of Bison. */ + +/* This is the parser code that is written into each bison parser + when the %semantic_parser declaration is not specified in the grammar. + It was written by Richard Stallman by simplifying the hairy parser + used when %semantic_parser is specified. */ + +#ifndef YYSTACK_USE_ALLOCA +#ifdef alloca +#define YYSTACK_USE_ALLOCA +#else /* alloca not defined */ +#ifdef __GNUC__ +#define YYSTACK_USE_ALLOCA +#define alloca __builtin_alloca +#else /* not GNU C. */ +#if (!defined (__STDC__) && defined (sparc)) || defined (__sparc__) || defined (__sparc) || defined (__sgi) || (defined (__sun) && defined (__i386)) +#define YYSTACK_USE_ALLOCA +#include +#else /* not sparc */ +/* We think this test detects Watcom and Microsoft C. */ +/* This used to test MSDOS, but that is a bad idea + since that symbol is in the user namespace. */ +#if (defined (_MSDOS) || defined (_MSDOS_)) && !defined (__TURBOC__) +#if 0 /* No need for malloc.h, which pollutes the namespace; + instead, just don't use alloca. */ +#include #endif -#if ! defined (YYSIZE_T) -# if defined (__STDC__) || defined (__cplusplus) -# include /* INFRINGES ON USER NAME SPACE */ -# define YYSIZE_T size_t -# endif +#else /* not MSDOS, or __TURBOC__ */ +#if defined(_AIX) +/* I don't know what this was needed for, but it pollutes the namespace. + So I turned it off. rms, 2 May 1997. */ +/* #include */ + #pragma alloca +#define YYSTACK_USE_ALLOCA +#else /* not MSDOS, or __TURBOC__, or _AIX */ +#if 0 +#ifdef __hpux /* haible at ilog.fr says this works for HPUX 9.05 and up, + and on HPUX 10. Eventually we can turn this on. */ +#define YYSTACK_USE_ALLOCA +#define alloca __builtin_alloca +#endif /* __hpux */ #endif -#if ! defined (YYSIZE_T) -# define YYSIZE_T unsigned int +#endif /* not _AIX */ +#endif /* not MSDOS, or __TURBOC__ */ +#endif /* not sparc */ +#endif /* not GNU C */ +#endif /* alloca not defined */ +#endif /* YYSTACK_USE_ALLOCA not defined */ + +#ifdef YYSTACK_USE_ALLOCA +#define YYSTACK_ALLOC alloca +#else +#define YYSTACK_ALLOC malloc #endif +/* Note: there must be only one dollar sign in this file. + It is replaced by the list of actions, each action + as one case of the switch. */ + #define yyerrok (yyerrstatus = 0) #define yyclearin (yychar = YYEMPTY) -#define YYEMPTY (-2) +#define YYEMPTY -2 #define YYEOF 0 - #define YYACCEPT goto yyacceptlab -#define YYABORT goto yyabortlab -#define YYERROR goto yyerrorlab - - -/* Like YYERROR except do call yyerror. This remains here temporarily - to ease the transition to the new meaning of YYERROR, for GCC. +#define YYABORT goto yyabortlab +#define YYERROR goto yyerrlab1 +/* Like YYERROR except do call yyerror. + This remains here temporarily to ease the + transition to the new meaning of YYERROR, for GCC. Once GCC version 2 has supplanted version 1, this can go. */ - #define YYFAIL goto yyerrlab - #define YYRECOVERING() (!!yyerrstatus) - -#define YYBACKUP(Token, Value) \ +#define YYBACKUP(token, value) \ do \ if (yychar == YYEMPTY && yylen == 1) \ - { \ - yychar = (Token); \ - yylval = (Value); \ - yytoken = YYTRANSLATE (yychar); \ + { yychar = (token), yylval = (value); \ + yychar1 = YYTRANSLATE (yychar); \ YYPOPSTACK; \ goto yybackup; \ } \ else \ - { \ - yyerror ("syntax error: cannot back up");\ - YYERROR; \ - } \ + { yyerror ("syntax error: cannot back up"); YYERROR; } \ while (0) #define YYTERROR 1 #define YYERRCODE 256 -/* YYLLOC_DEFAULT -- Compute the default location (before the actions - are run). */ - -#ifndef YYLLOC_DEFAULT -# define YYLLOC_DEFAULT(Current, Rhs, N) \ - ((Current).first_line = (Rhs)[1].first_line, \ - (Current).first_column = (Rhs)[1].first_column, \ - (Current).last_line = (Rhs)[N].last_line, \ - (Current).last_column = (Rhs)[N].last_column) +#ifndef YYPURE +#define YYLEX yylex() #endif -/* YYLEX -- calling `yylex' with the right arguments. */ - +#ifdef YYPURE +#ifdef YYLSP_NEEDED #ifdef YYLEX_PARAM -# define YYLEX yylex (YYLEX_PARAM) +#define YYLEX yylex(&yylval, &yylloc, YYLEX_PARAM) #else -# define YYLEX yylex () +#define YYLEX yylex(&yylval, &yylloc) #endif - -/* Enable debugging if requested. */ -#if YYDEBUG - -# ifndef YYFPRINTF -# include /* INFRINGES ON USER NAME SPACE */ -# define YYFPRINTF fprintf -# endif - -# define YYDPRINTF(Args) \ -do { \ - if (yydebug) \ - YYFPRINTF Args; \ -} while (0) - -# define YYDSYMPRINT(Args) \ -do { \ - if (yydebug) \ - yysymprint Args; \ -} while (0) - -# define YYDSYMPRINTF(Title, Token, Value, Location) \ -do { \ - if (yydebug) \ - { \ - YYFPRINTF (stderr, "%s ", Title); \ - yysymprint (stderr, \ - Token, Value); \ - YYFPRINTF (stderr, "\n"); \ - } \ -} while (0) - -/*------------------------------------------------------------------. -| yy_stack_print -- Print the state stack from its BOTTOM up to its | -| TOP (included). | -`------------------------------------------------------------------*/ - -#if defined (__STDC__) || defined (__cplusplus) -static void -yy_stack_print (short *bottom, short *top) +#else /* not YYLSP_NEEDED */ +#ifdef YYLEX_PARAM +#define YYLEX yylex(&yylval, YYLEX_PARAM) #else -static void -yy_stack_print (bottom, top) - short *bottom; - short *top; +#define YYLEX yylex(&yylval) +#endif +#endif /* not YYLSP_NEEDED */ #endif -{ - YYFPRINTF (stderr, "Stack now"); - for (/* Nothing. */; bottom <= top; ++bottom) - YYFPRINTF (stderr, " %d", *bottom); - YYFPRINTF (stderr, "\n"); -} -# define YY_STACK_PRINT(Bottom, Top) \ -do { \ - if (yydebug) \ - yy_stack_print ((Bottom), (Top)); \ -} while (0) +/* If nonreentrant, generate the variables here */ +#ifndef YYPURE -/*------------------------------------------------. -| Report that the YYRULE is going to be reduced. | -`------------------------------------------------*/ +int yychar; /* the lookahead symbol */ +YYSTYPE yylval; /* the semantic value of the */ + /* lookahead symbol */ -#if defined (__STDC__) || defined (__cplusplus) -static void -yy_reduce_print (int yyrule) -#else -static void -yy_reduce_print (yyrule) - int yyrule; +#ifdef YYLSP_NEEDED +YYLTYPE yylloc; /* location data for the lookahead */ + /* symbol */ #endif -{ - int yyi; - unsigned int yylno = yyrline[yyrule]; - YYFPRINTF (stderr, "Reducing stack by rule %d (line %u), ", - yyrule - 1, yylno); - /* Print the symbols being reduced, and their result. */ - for (yyi = yyprhs[yyrule]; 0 <= yyrhs[yyi]; yyi++) - YYFPRINTF (stderr, "%s ", yytname [yyrhs[yyi]]); - YYFPRINTF (stderr, "-> %s\n", yytname [yyr1[yyrule]]); -} -# define YY_REDUCE_PRINT(Rule) \ -do { \ - if (yydebug) \ - yy_reduce_print (Rule); \ -} while (0) - -/* Nonzero means print parse trace. It is left uninitialized so that - multiple parsers can coexist. */ -int yydebug; -#else /* !YYDEBUG */ -# define YYDPRINTF(Args) -# define YYDSYMPRINT(Args) -# define YYDSYMPRINTF(Title, Token, Value, Location) -# define YY_STACK_PRINT(Bottom, Top) -# define YY_REDUCE_PRINT(Rule) -#endif /* !YYDEBUG */ +int yynerrs; /* number of parse errors so far */ +#endif /* not YYPURE */ + +#if YYDEBUG != 0 +int yydebug; /* nonzero means print parse trace */ +/* Since this is uninitialized, it does not stop multiple parsers + from coexisting. */ +#endif +/* YYINITDEPTH indicates the initial size of the parser's stacks */ -/* YYINITDEPTH -- initial size of the parser's stacks. */ #ifndef YYINITDEPTH -# define YYINITDEPTH 200 +#define YYINITDEPTH 200 #endif -/* YYMAXDEPTH -- maximum size the stacks can grow to (effective only - if the built-in stack extension method is used). - - Do not make this value too large; the results are undefined if - SIZE_MAX < YYSTACK_BYTES (YYMAXDEPTH) - evaluated with infinite-precision integer arithmetic. */ +/* YYMAXDEPTH is the maximum size the stacks can grow to + (effective only if the built-in stack extension method is used). */ -#if defined (YYMAXDEPTH) && YYMAXDEPTH == 0 -# undef YYMAXDEPTH +#if YYMAXDEPTH == 0 +#undef YYMAXDEPTH #endif #ifndef YYMAXDEPTH -# define YYMAXDEPTH 10000 +#define YYMAXDEPTH 10000 #endif - +/* Define __yy_memcpy. Note that the size argument + should be passed with type unsigned int, because that is what the non-GCC + definitions require. With GCC, __builtin_memcpy takes an arg + of type size_t, but it can handle unsigned int. */ + +#if __GNUC__ > 1 /* GNU C and GNU C++ define this. */ +#define __yy_memcpy(TO,FROM,COUNT) __builtin_memcpy(TO,FROM,COUNT) +#else /* not GNU C or C++ */ +#ifndef __cplusplus -#if YYERROR_VERBOSE - -# ifndef yystrlen -# if defined (__GLIBC__) && defined (_STRING_H) -# define yystrlen strlen -# else -/* Return the length of YYSTR. */ -static YYSIZE_T -# if defined (__STDC__) || defined (__cplusplus) -yystrlen (const char *yystr) -# else -yystrlen (yystr) - const char *yystr; -# endif -{ - register const char *yys = yystr; - - while (*yys++ != '\0') - continue; - - return yys - yystr - 1; -} -# endif -# endif - -# ifndef yystpcpy -# if defined (__GLIBC__) && defined (_STRING_H) && defined (_GNU_SOURCE) -# define yystpcpy stpcpy -# else -/* Copy YYSRC to YYDEST, returning the address of the terminating '\0' in - YYDEST. */ -static char * -# if defined (__STDC__) || defined (__cplusplus) -yystpcpy (char *yydest, const char *yysrc) -# else -yystpcpy (yydest, yysrc) - char *yydest; - const char *yysrc; -# endif +/* This is the most reliable way to avoid incompatibilities + in available built-in functions on various systems. */ +static void +__yy_memcpy (to, from, count) + char *to; + char *from; + unsigned int count; { - register char *yyd = yydest; - register const char *yys = yysrc; + register char *f = from; + register char *t = to; + register int i = count; - while ((*yyd++ = *yys++) != '\0') - continue; - - return yyd - 1; + while (i-- > 0) + *t++ = *f++; } -# endif -# endif - -#endif /* !YYERROR_VERBOSE */ - - -#if YYDEBUG -/*--------------------------------. -| Print this symbol on YYOUTPUT. | -`--------------------------------*/ +#else /* __cplusplus */ -#if defined (__STDC__) || defined (__cplusplus) -static void -yysymprint (FILE *yyoutput, int yytype, YYSTYPE *yyvaluep) -#else +/* This is the most reliable way to avoid incompatibilities + in available built-in functions on various systems. */ static void -yysymprint (yyoutput, yytype, yyvaluep) - FILE *yyoutput; - int yytype; - YYSTYPE *yyvaluep; -#endif +__yy_memcpy (char *to, char *from, unsigned int count) { - /* Pacify ``unused variable'' warnings. */ - (void) yyvaluep; - - if (yytype < YYNTOKENS) - { - YYFPRINTF (yyoutput, "token %s (", yytname[yytype]); -# ifdef YYPRINT - YYPRINT (yyoutput, yytoknum[yytype], *yyvaluep); -# endif - } - else - YYFPRINTF (yyoutput, "nterm %s (", yytname[yytype]); + register char *t = to; + register char *f = from; + register int i = count; - switch (yytype) - { - default: - break; - } - YYFPRINTF (yyoutput, ")"); + while (i-- > 0) + *t++ = *f++; } -#endif /* ! YYDEBUG */ -/*-----------------------------------------------. -| Release the memory associated to this symbol. | -`-----------------------------------------------*/ - -#if defined (__STDC__) || defined (__cplusplus) -static void -yydestruct (int yytype, YYSTYPE *yyvaluep) -#else -static void -yydestruct (yytype, yyvaluep) - int yytype; - YYSTYPE *yyvaluep; #endif -{ - /* Pacify ``unused variable'' warnings. */ - (void) yyvaluep; - - switch (yytype) - { - - default: - break; - } -} +#endif +#line 217 "/usr/share/bison.simple" -/* Prevent warnings from -Wmissing-prototypes. */ +/* The user can define YYPARSE_PARAM as the name of an argument to be passed + into yyparse. The argument should have type void *. + It should actually point to an object. + Grammar actions can access the variable by casting it + to the proper pointer type. */ #ifdef YYPARSE_PARAM -# if defined (__STDC__) || defined (__cplusplus) -int yyparse (void *YYPARSE_PARAM); -# else -int yyparse (); -# endif -#else /* ! YYPARSE_PARAM */ -#if defined (__STDC__) || defined (__cplusplus) -int yyparse (void); -#else -int yyparse (); -#endif -#endif /* ! YYPARSE_PARAM */ - - - -/* The lookahead symbol. */ -int yychar; - -/* The semantic value of the lookahead symbol. */ -YYSTYPE yylval; - -/* Number of syntax errors so far. */ -int yynerrs; - - - -/*----------. -| yyparse. | -`----------*/ +#ifdef __cplusplus +#define YYPARSE_PARAM_ARG void *YYPARSE_PARAM +#define YYPARSE_PARAM_DECL +#else /* not __cplusplus */ +#define YYPARSE_PARAM_ARG YYPARSE_PARAM +#define YYPARSE_PARAM_DECL void *YYPARSE_PARAM; +#endif /* not __cplusplus */ +#else /* not YYPARSE_PARAM */ +#define YYPARSE_PARAM_ARG +#define YYPARSE_PARAM_DECL +#endif /* not YYPARSE_PARAM */ +/* Prevent warning if -Wstrict-prototypes. */ +#ifdef __GNUC__ #ifdef YYPARSE_PARAM -# if defined (__STDC__) || defined (__cplusplus) -int yyparse (void *YYPARSE_PARAM) -# else -int yyparse (YYPARSE_PARAM) - void *YYPARSE_PARAM; -# endif -#else /* ! YYPARSE_PARAM */ -#if defined (__STDC__) || defined (__cplusplus) -int -yyparse (void) +int yyparse (void *); #else -int -yyparse () - +int yyparse (void); #endif #endif + +int +yyparse(YYPARSE_PARAM_ARG) + YYPARSE_PARAM_DECL { - register int yystate; register int yyn; - int yyresult; - /* Number of tokens to shift before error messages enabled. */ - int yyerrstatus; - /* Lookahead token as an internal (translated) token number. */ - int yytoken = 0; - - /* Three stacks and their tools: - `yyss': related to states, - `yyvs': related to semantic values, - `yyls': related to locations. - - Refer to the stacks thru separate pointers, to allow yyoverflow - to reallocate them elsewhere. */ - - /* The state stack. */ - short yyssa[YYINITDEPTH]; - short *yyss = yyssa; register short *yyssp; - - /* The semantic value stack. */ - YYSTYPE yyvsa[YYINITDEPTH]; - YYSTYPE *yyvs = yyvsa; register YYSTYPE *yyvsp; + int yyerrstatus; /* number of tokens to shift before error messages enabled */ + int yychar1 = 0; /* lookahead token as an internal (translated) token number */ + short yyssa[YYINITDEPTH]; /* the state stack */ + YYSTYPE yyvsa[YYINITDEPTH]; /* the semantic value stack */ + short *yyss = yyssa; /* refer to the stacks thru separate pointers */ + YYSTYPE *yyvs = yyvsa; /* to allow yyoverflow to reallocate them elsewhere */ +#ifdef YYLSP_NEEDED + YYLTYPE yylsa[YYINITDEPTH]; /* the location stack */ + YYLTYPE *yyls = yylsa; + YYLTYPE *yylsp; + +#define YYPOPSTACK (yyvsp--, yyssp--, yylsp--) +#else #define YYPOPSTACK (yyvsp--, yyssp--) +#endif - YYSIZE_T yystacksize = YYINITDEPTH; + int yystacksize = YYINITDEPTH; + int yyfree_stacks = 0; - /* The variables used to return semantic value and location from the - action routines. */ - YYSTYPE yyval; +#ifdef YYPURE + int yychar; + YYSTYPE yylval; + int yynerrs; +#ifdef YYLSP_NEEDED + YYLTYPE yylloc; +#endif +#endif + YYSTYPE yyval; /* the variable used to return */ + /* semantic values from the action */ + /* routines */ - /* When reducing, the number of symbols on the RHS of the reduced - rule. */ int yylen; - YYDPRINTF ((stderr, "Starting parse\n")); +#if YYDEBUG != 0 + if (yydebug) + fprintf(stderr, "Starting parse\n"); +#endif yystate = 0; yyerrstatus = 0; @@ -2467,96 +1961,110 @@ so that they stay on the same level as the state stack. The wasted elements are never initialized. */ - yyssp = yyss; + yyssp = yyss - 1; yyvsp = yyvs; +#ifdef YYLSP_NEEDED + yylsp = yyls; +#endif - goto yysetstate; - -/*------------------------------------------------------------. -| yynewstate -- Push a new state, which is found in yystate. | -`------------------------------------------------------------*/ - yynewstate: - /* In all cases, when you get here, the value and location stacks - have just been pushed. so pushing a state here evens the stacks. - */ - yyssp++; - - yysetstate: - *yyssp = yystate; +/* Push a new state, which is found in yystate . */ +/* In all cases, when you get here, the value and location stacks + have just been pushed. so pushing a state here evens the stacks. */ +yynewstate: + + *++yyssp = yystate; + + if (yyssp >= yyss + yystacksize - 1) + { + /* Give user a chance to reallocate the stack */ + /* Use copies of these so that the &'s don't force the real ones into memory. */ + YYSTYPE *yyvs1 = yyvs; + short *yyss1 = yyss; +#ifdef YYLSP_NEEDED + YYLTYPE *yyls1 = yyls; +#endif - if (yyss + yystacksize - 1 <= yyssp) - { /* Get the current used size of the three stacks, in elements. */ - YYSIZE_T yysize = yyssp - yyss + 1; + int size = yyssp - yyss + 1; #ifdef yyoverflow - { - /* Give user a chance to reallocate the stack. Use copies of - these so that the &'s don't force the real ones into - memory. */ - YYSTYPE *yyvs1 = yyvs; - short *yyss1 = yyss; - - - /* Each stack pointer address is followed by the size of the - data in use in that stack, in bytes. This used to be a - conditional around just the two extra args, but that might - be undefined if yyoverflow is a macro. */ - yyoverflow ("parser stack overflow", - &yyss1, yysize * sizeof (*yyssp), - &yyvs1, yysize * sizeof (*yyvsp), - - &yystacksize); + /* Each stack pointer address is followed by the size of + the data in use in that stack, in bytes. */ +#ifdef YYLSP_NEEDED + /* This used to be a conditional around just the two extra args, + but that might be undefined if yyoverflow is a macro. */ + yyoverflow("parser stack overflow", + &yyss1, size * sizeof (*yyssp), + &yyvs1, size * sizeof (*yyvsp), + &yyls1, size * sizeof (*yylsp), + &yystacksize); +#else + yyoverflow("parser stack overflow", + &yyss1, size * sizeof (*yyssp), + &yyvs1, size * sizeof (*yyvsp), + &yystacksize); +#endif - yyss = yyss1; - yyvs = yyvs1; - } + yyss = yyss1; yyvs = yyvs1; +#ifdef YYLSP_NEEDED + yyls = yyls1; +#endif #else /* no yyoverflow */ -# ifndef YYSTACK_RELOCATE - goto yyoverflowlab; -# else /* Extend the stack our own way. */ - if (YYMAXDEPTH <= yystacksize) - goto yyoverflowlab; + if (yystacksize >= YYMAXDEPTH) + { + yyerror("parser stack overflow"); + if (yyfree_stacks) + { + free (yyss); + free (yyvs); +#ifdef YYLSP_NEEDED + free (yyls); +#endif + } + return 2; + } yystacksize *= 2; - if (YYMAXDEPTH < yystacksize) + if (yystacksize > YYMAXDEPTH) yystacksize = YYMAXDEPTH; - - { - short *yyss1 = yyss; - union yyalloc *yyptr = - (union yyalloc *) YYSTACK_ALLOC (YYSTACK_BYTES (yystacksize)); - if (! yyptr) - goto yyoverflowlab; - YYSTACK_RELOCATE (yyss); - YYSTACK_RELOCATE (yyvs); - -# undef YYSTACK_RELOCATE - if (yyss1 != yyssa) - YYSTACK_FREE (yyss1); - } -# endif +#ifndef YYSTACK_USE_ALLOCA + yyfree_stacks = 1; +#endif + yyss = (short *) YYSTACK_ALLOC (yystacksize * sizeof (*yyssp)); + __yy_memcpy ((char *)yyss, (char *)yyss1, + size * (unsigned int) sizeof (*yyssp)); + yyvs = (YYSTYPE *) YYSTACK_ALLOC (yystacksize * sizeof (*yyvsp)); + __yy_memcpy ((char *)yyvs, (char *)yyvs1, + size * (unsigned int) sizeof (*yyvsp)); +#ifdef YYLSP_NEEDED + yyls = (YYLTYPE *) YYSTACK_ALLOC (yystacksize * sizeof (*yylsp)); + __yy_memcpy ((char *)yyls, (char *)yyls1, + size * (unsigned int) sizeof (*yylsp)); +#endif #endif /* no yyoverflow */ - yyssp = yyss + yysize - 1; - yyvsp = yyvs + yysize - 1; - + yyssp = yyss + size - 1; + yyvsp = yyvs + size - 1; +#ifdef YYLSP_NEEDED + yylsp = yyls + size - 1; +#endif - YYDPRINTF ((stderr, "Stack size increased to %lu\n", - (unsigned long int) yystacksize)); +#if YYDEBUG != 0 + if (yydebug) + fprintf(stderr, "Stack size increased to %d\n", yystacksize); +#endif - if (yyss + yystacksize - 1 <= yyssp) + if (yyssp >= yyss + yystacksize - 1) YYABORT; } - YYDPRINTF ((stderr, "Entering state %d\n", yystate)); +#if YYDEBUG != 0 + if (yydebug) + fprintf(stderr, "Entering state %d\n", yystate); +#endif goto yybackup; - -/*-----------. -| yybackup. | -`-----------*/ -yybackup: + yybackup: /* Do appropriate processing given the current state. */ /* Read a lookahead token if we need one and don't already have one. */ @@ -2565,311 +2073,315 @@ /* First try to decide what to do without reference to lookahead token. */ yyn = yypact[yystate]; - if (yyn == YYPACT_NINF) + if (yyn == YYFLAG) goto yydefault; /* Not known => get a lookahead token if don't already have one. */ - /* YYCHAR is either YYEMPTY or YYEOF or a valid lookahead symbol. */ + /* yychar is either YYEMPTY or YYEOF + or a valid token in external form. */ + if (yychar == YYEMPTY) { - YYDPRINTF ((stderr, "Reading a token: ")); +#if YYDEBUG != 0 + if (yydebug) + fprintf(stderr, "Reading a token: "); +#endif yychar = YYLEX; } - if (yychar <= YYEOF) + /* Convert token to internal form (in yychar1) for indexing tables with */ + + if (yychar <= 0) /* This means end of input. */ { - yychar = yytoken = YYEOF; - YYDPRINTF ((stderr, "Now at end of input.\n")); + yychar1 = 0; + yychar = YYEOF; /* Don't call YYLEX any more */ + +#if YYDEBUG != 0 + if (yydebug) + fprintf(stderr, "Now at end of input.\n"); +#endif } else { - yytoken = YYTRANSLATE (yychar); - YYDSYMPRINTF ("Next token is", yytoken, &yylval, &yylloc); + yychar1 = YYTRANSLATE(yychar); + +#if YYDEBUG != 0 + if (yydebug) + { + fprintf (stderr, "Next token is %d (%s", yychar, yytname[yychar1]); + /* Give the individual parser a way to print the precise meaning + of a token, for further debugging info. */ +#ifdef YYPRINT + YYPRINT (stderr, yychar, yylval); +#endif + fprintf (stderr, ")\n"); + } +#endif } - /* If the proper action on seeing token YYTOKEN is to reduce or to - detect an error, take that action. */ - yyn += yytoken; - if (yyn < 0 || YYLAST < yyn || yycheck[yyn] != yytoken) + yyn += yychar1; + if (yyn < 0 || yyn > YYLAST || yycheck[yyn] != yychar1) goto yydefault; + yyn = yytable[yyn]; - if (yyn <= 0) + + /* yyn is what to do for this token type in this state. + Negative => reduce, -yyn is rule number. + Positive => shift, yyn is new state. + New state is final state => don't bother to shift, + just return success. + 0, or most negative number => error. */ + + if (yyn < 0) { - if (yyn == 0 || yyn == YYTABLE_NINF) + if (yyn == YYFLAG) goto yyerrlab; yyn = -yyn; goto yyreduce; } + else if (yyn == 0) + goto yyerrlab; if (yyn == YYFINAL) YYACCEPT; /* Shift the lookahead token. */ - YYDPRINTF ((stderr, "Shifting token %s, ", yytname[yytoken])); + +#if YYDEBUG != 0 + if (yydebug) + fprintf(stderr, "Shifting token %d (%s), ", yychar, yytname[yychar1]); +#endif /* Discard the token being shifted unless it is eof. */ if (yychar != YYEOF) yychar = YYEMPTY; *++yyvsp = yylval; +#ifdef YYLSP_NEEDED + *++yylsp = yylloc; +#endif - - /* Count tokens shifted since error; after three, turn off error - status. */ - if (yyerrstatus) - yyerrstatus--; + /* count tokens shifted since error; after three, turn off error status. */ + if (yyerrstatus) yyerrstatus--; yystate = yyn; goto yynewstate; - -/*-----------------------------------------------------------. -| yydefault -- do the default action for the current state. | -`-----------------------------------------------------------*/ +/* Do the default action for the current state. */ yydefault: + yyn = yydefact[yystate]; if (yyn == 0) goto yyerrlab; - goto yyreduce; - -/*-----------------------------. -| yyreduce -- Do a reduction. | -`-----------------------------*/ +/* Do a reduction. yyn is the number of a rule to reduce with. */ yyreduce: - /* yyn is the number of a rule to reduce with. */ yylen = yyr2[yyn]; + if (yylen > 0) + yyval = yyvsp[1-yylen]; /* implement default value of the action */ + +#if YYDEBUG != 0 + if (yydebug) + { + int i; + + fprintf (stderr, "Reducing via rule %d (line %d), ", + yyn, yyrline[yyn]); - /* If YYLEN is nonzero, implement the default value of the action: - `$$ = $1'. + /* Print the symbols being reduced, and their result. */ + for (i = yyprhs[yyn]; yyrhs[i] > 0; i++) + fprintf (stderr, "%s ", yytname[yyrhs[i]]); + fprintf (stderr, " -> %s\n", yytname[yyr1[yyn]]); + } +#endif - Otherwise, the following line sets YYVAL to garbage. - This behavior is undocumented and Bison - users should not rely upon it. Assigning to YYVAL - unconditionally makes the parser a bit smaller, and it avoids a - GCC warning that YYVAL may be used uninitialized. */ - yyval = yyvsp[1-yylen]; + switch (yyn) { - YY_REDUCE_PRINT (yyn); - switch (yyn) - { - case 3: -#line 998 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { +case 2: +#line 998 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ if (yyvsp[0].UIntVal > (uint32_t)INT32_MAX) // Outside of my range! ThrowException("Value too large for type!"); yyval.SIntVal = (int32_t)yyvsp[0].UIntVal; -;} - break; - - case 5: -#line 1006 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { +; + break;} +case 4: +#line 1006 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ if (yyvsp[0].UInt64Val > (uint64_t)INT64_MAX) // Outside of my range! ThrowException("Value too large for type!"); yyval.SInt64Val = (int64_t)yyvsp[0].UInt64Val; -;} - break; - - case 34: -#line 1029 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { +; + break;} +case 33: +#line 1029 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.StrVal = yyvsp[-1].StrVal; - ;} - break; - - case 35: -#line 1032 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 34: +#line 1032 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.StrVal = 0; - ;} - break; - - case 36: -#line 1036 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { yyval.Linkage = GlobalValue::InternalLinkage; ;} - break; - - case 37: -#line 1037 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { yyval.Linkage = GlobalValue::LinkOnceLinkage; ;} - break; - - case 38: -#line 1038 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { yyval.Linkage = GlobalValue::WeakLinkage; ;} - break; - - case 39: -#line 1039 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { yyval.Linkage = GlobalValue::AppendingLinkage; ;} - break; - - case 40: -#line 1040 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { yyval.Linkage = GlobalValue::ExternalLinkage; ;} - break; - - case 41: -#line 1042 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { yyval.UIntVal = CallingConv::C; ;} - break; - - case 42: -#line 1043 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { yyval.UIntVal = CallingConv::C; ;} - break; - - case 43: -#line 1044 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { yyval.UIntVal = CallingConv::Fast; ;} - break; - - case 44: -#line 1045 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { yyval.UIntVal = CallingConv::Cold; ;} - break; - - case 45: -#line 1046 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 35: +#line 1036 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.Linkage = GlobalValue::InternalLinkage; ; + break;} +case 36: +#line 1037 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.Linkage = GlobalValue::LinkOnceLinkage; ; + break;} +case 37: +#line 1038 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.Linkage = GlobalValue::WeakLinkage; ; + break;} +case 38: +#line 1039 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.Linkage = GlobalValue::AppendingLinkage; ; + break;} +case 39: +#line 1040 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.Linkage = GlobalValue::ExternalLinkage; ; + break;} +case 40: +#line 1042 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.UIntVal = CallingConv::C; ; + break;} +case 41: +#line 1043 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.UIntVal = CallingConv::C; ; + break;} +case 42: +#line 1044 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.UIntVal = CallingConv::Fast; ; + break;} +case 43: +#line 1045 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.UIntVal = CallingConv::Cold; ; + break;} +case 44: +#line 1046 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ if ((unsigned)yyvsp[0].UInt64Val != yyvsp[0].UInt64Val) ThrowException("Calling conv too large!"); yyval.UIntVal = yyvsp[0].UInt64Val; - ;} - break; - - case 46: -#line 1054 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { yyval.UIntVal = 0; ;} - break; - - case 47: -#line 1055 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 45: +#line 1054 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.UIntVal = 0; ; + break;} +case 46: +#line 1055 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.UIntVal = yyvsp[0].UInt64Val; if (yyval.UIntVal != 0 && !isPowerOf2_32(yyval.UIntVal)) ThrowException("Alignment must be a power of two!"); -;} - break; - - case 48: -#line 1060 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { yyval.UIntVal = 0; ;} - break; - - case 49: -#line 1061 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { +; + break;} +case 47: +#line 1060 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.UIntVal = 0; ; + break;} +case 48: +#line 1061 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.UIntVal = yyvsp[0].UInt64Val; if (yyval.UIntVal != 0 && !isPowerOf2_32(yyval.UIntVal)) ThrowException("Alignment must be a power of two!"); -;} - break; - - case 50: -#line 1068 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { +; + break;} +case 49: +#line 1068 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ for (unsigned i = 0, e = strlen(yyvsp[0].StrVal); i != e; ++i) if (yyvsp[0].StrVal[i] == '"' || yyvsp[0].StrVal[i] == '\\') ThrowException("Invalid character in section name!"); yyval.StrVal = yyvsp[0].StrVal; -;} - break; - - case 51: -#line 1075 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { yyval.StrVal = 0; ;} - break; - - case 52: -#line 1076 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { yyval.StrVal = yyvsp[0].StrVal; ;} - break; - - case 53: -#line 1081 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - {;} - break; - - case 54: -#line 1082 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - {;} - break; - - case 55: -#line 1083 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { +; + break;} +case 50: +#line 1075 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.StrVal = 0; ; + break;} +case 51: +#line 1076 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.StrVal = yyvsp[0].StrVal; ; + break;} +case 52: +#line 1081 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{; + break;} +case 53: +#line 1082 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{; + break;} +case 54: +#line 1083 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ CurGV->setSection(yyvsp[0].StrVal); free(yyvsp[0].StrVal); - ;} - break; - - case 56: -#line 1087 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 55: +#line 1087 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ if (yyvsp[0].UInt64Val != 0 && !isPowerOf2_32(yyvsp[0].UInt64Val)) ThrowException("Alignment must be a power of two!"); CurGV->setAlignment(yyvsp[0].UInt64Val); - ;} - break; - - case 58: -#line 1100 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { yyval.TypeVal = new PATypeHolder(yyvsp[0].PrimType); ;} - break; - - case 60: -#line 1101 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { yyval.TypeVal = new PATypeHolder(yyvsp[0].PrimType); ;} - break; - - case 61: -#line 1103 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 57: +#line 1100 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.TypeVal = new PATypeHolder(yyvsp[0].PrimType); ; + break;} +case 59: +#line 1101 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.TypeVal = new PATypeHolder(yyvsp[0].PrimType); ; + break;} +case 60: +#line 1103 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ if (!UpRefs.empty()) ThrowException("Invalid upreference in type: " + (*yyvsp[0].TypeVal)->getDescription()); yyval.TypeVal = yyvsp[0].TypeVal; - ;} - break; - - case 75: -#line 1114 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 74: +#line 1114 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.TypeVal = new PATypeHolder(OpaqueType::get()); - ;} - break; - - case 76: -#line 1117 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 75: +#line 1117 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.TypeVal = new PATypeHolder(yyvsp[0].PrimType); - ;} - break; - - case 77: -#line 1120 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { // Named types are also simple types... + ; + break;} +case 76: +#line 1120 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ // Named types are also simple types... yyval.TypeVal = new PATypeHolder(getTypeVal(yyvsp[0].ValIDVal)); -;} - break; - - case 78: -#line 1126 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { // Type UpReference +; + break;} +case 77: +#line 1126 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ // Type UpReference if (yyvsp[0].UInt64Val > (uint64_t)~0U) ThrowException("Value out of range!"); OpaqueType *OT = OpaqueType::get(); // Use temporary placeholder UpRefs.push_back(UpRefRecord((unsigned)yyvsp[0].UInt64Val, OT)); // Add to vector... yyval.TypeVal = new PATypeHolder(OT); UR_OUT("New Upreference!\n"); - ;} - break; - - case 79: -#line 1133 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { // Function derived type? + ; + break;} +case 78: +#line 1133 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ // Function derived type? std::vector Params; for (std::list::iterator I = yyvsp[-1].TypeList->begin(), E = yyvsp[-1].TypeList->end(); I != E; ++I) @@ -2880,20 +2392,18 @@ yyval.TypeVal = new PATypeHolder(HandleUpRefs(FunctionType::get(*yyvsp[-3].TypeVal,Params,isVarArg))); delete yyvsp[-1].TypeList; // Delete the argument list delete yyvsp[-3].TypeVal; // Delete the return type handle - ;} - break; - - case 80: -#line 1145 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { // Sized array type? + ; + break;} +case 79: +#line 1145 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ // Sized array type? yyval.TypeVal = new PATypeHolder(HandleUpRefs(ArrayType::get(*yyvsp[-1].TypeVal, (unsigned)yyvsp[-3].UInt64Val))); delete yyvsp[-1].TypeVal; - ;} - break; - - case 81: -#line 1149 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { // Packed array type? + ; + break;} +case 80: +#line 1149 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ // Packed array type? const llvm::Type* ElemTy = yyvsp[-1].TypeVal->get(); if ((unsigned)yyvsp[-3].UInt64Val != yyvsp[-3].UInt64Val) ThrowException("Unsigned result not equal to signed result"); @@ -2903,12 +2413,11 @@ ThrowException("Vector length should be a power of 2!"); yyval.TypeVal = new PATypeHolder(HandleUpRefs(PackedType::get(*yyvsp[-1].TypeVal, (unsigned)yyvsp[-3].UInt64Val))); delete yyvsp[-1].TypeVal; - ;} - break; - - case 82: -#line 1160 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { // Structure type? + ; + break;} +case 81: +#line 1160 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ // Structure type? std::vector Elements; for (std::list::iterator I = yyvsp[-1].TypeList->begin(), E = yyvsp[-1].TypeList->end(); I != E; ++I) @@ -2916,63 +2425,55 @@ yyval.TypeVal = new PATypeHolder(HandleUpRefs(StructType::get(Elements))); delete yyvsp[-1].TypeList; - ;} - break; - - case 83: -#line 1169 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { // Empty structure type? + ; + break;} +case 82: +#line 1169 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ // Empty structure type? yyval.TypeVal = new PATypeHolder(StructType::get(std::vector())); - ;} - break; - - case 84: -#line 1172 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { // Pointer type? + ; + break;} +case 83: +#line 1172 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ // Pointer type? yyval.TypeVal = new PATypeHolder(HandleUpRefs(PointerType::get(*yyvsp[-1].TypeVal))); delete yyvsp[-1].TypeVal; - ;} - break; - - case 85: -#line 1180 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 84: +#line 1180 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.TypeList = new std::list(); yyval.TypeList->push_back(*yyvsp[0].TypeVal); delete yyvsp[0].TypeVal; - ;} - break; - - case 86: -#line 1184 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 85: +#line 1184 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ (yyval.TypeList=yyvsp[-2].TypeList)->push_back(*yyvsp[0].TypeVal); delete yyvsp[0].TypeVal; - ;} - break; - - case 88: -#line 1190 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 87: +#line 1190 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ (yyval.TypeList=yyvsp[-2].TypeList)->push_back(Type::VoidTy); - ;} - break; - - case 89: -#line 1193 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 88: +#line 1193 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ (yyval.TypeList = new std::list())->push_back(Type::VoidTy); - ;} - break; - - case 90: -#line 1196 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 89: +#line 1196 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.TypeList = new std::list(); - ;} - break; - - case 91: -#line 1206 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { // Nonempty unsized arr + ; + break;} +case 90: +#line 1206 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ // Nonempty unsized arr const ArrayType *ATy = dyn_cast(yyvsp[-3].TypeVal->get()); if (ATy == 0) ThrowException("Cannot make array constant with type: '" + @@ -2996,12 +2497,11 @@ yyval.ConstVal = ConstantArray::get(ATy, *yyvsp[-1].ConstVector); delete yyvsp[-3].TypeVal; delete yyvsp[-1].ConstVector; - ;} - break; - - case 92: -#line 1231 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 91: +#line 1231 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ const ArrayType *ATy = dyn_cast(yyvsp[-2].TypeVal->get()); if (ATy == 0) ThrowException("Cannot make array constant with type: '" + @@ -3013,12 +2513,11 @@ " arguments, but has size of " + itostr(NumElements) +"!"); yyval.ConstVal = ConstantArray::get(ATy, std::vector()); delete yyvsp[-2].TypeVal; - ;} - break; - - case 93: -#line 1244 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 92: +#line 1244 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ const ArrayType *ATy = dyn_cast(yyvsp[-2].TypeVal->get()); if (ATy == 0) ThrowException("Cannot make array constant with type: '" + @@ -3045,12 +2544,11 @@ free(yyvsp[0].StrVal); yyval.ConstVal = ConstantArray::get(ATy, Vals); delete yyvsp[-2].TypeVal; - ;} - break; - - case 94: -#line 1272 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { // Nonempty unsized arr + ; + break;} +case 93: +#line 1272 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ // Nonempty unsized arr const PackedType *PTy = dyn_cast(yyvsp[-3].TypeVal->get()); if (PTy == 0) ThrowException("Cannot make packed constant with type: '" + @@ -3074,12 +2572,11 @@ yyval.ConstVal = ConstantPacked::get(PTy, *yyvsp[-1].ConstVector); delete yyvsp[-3].TypeVal; delete yyvsp[-1].ConstVector; - ;} - break; - - case 95: -#line 1297 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 94: +#line 1297 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ const StructType *STy = dyn_cast(yyvsp[-3].TypeVal->get()); if (STy == 0) ThrowException("Cannot make struct constant with type: '" + @@ -3098,12 +2595,11 @@ yyval.ConstVal = ConstantStruct::get(STy, *yyvsp[-1].ConstVector); delete yyvsp[-3].TypeVal; delete yyvsp[-1].ConstVector; - ;} - break; - - case 96: -#line 1317 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 95: +#line 1317 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ const StructType *STy = dyn_cast(yyvsp[-2].TypeVal->get()); if (STy == 0) ThrowException("Cannot make struct constant with type: '" + @@ -3114,12 +2610,11 @@ yyval.ConstVal = ConstantStruct::get(STy, std::vector()); delete yyvsp[-2].TypeVal; - ;} - break; - - case 97: -#line 1329 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 96: +#line 1329 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ const PointerType *PTy = dyn_cast(yyvsp[-1].TypeVal->get()); if (PTy == 0) ThrowException("Cannot make null pointer constant with type: '" + @@ -3127,20 +2622,18 @@ yyval.ConstVal = ConstantPointerNull::get(PTy); delete yyvsp[-1].TypeVal; - ;} - break; - - case 98: -#line 1338 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 97: +#line 1338 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.ConstVal = UndefValue::get(yyvsp[-1].TypeVal->get()); delete yyvsp[-1].TypeVal; - ;} - break; - - case 99: -#line 1342 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 98: +#line 1342 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ const PointerType *Ty = dyn_cast(yyvsp[-1].TypeVal->get()); if (Ty == 0) ThrowException("Global const reference must be a pointer type!"); @@ -3198,74 +2691,66 @@ yyval.ConstVal = cast(V); delete yyvsp[-1].TypeVal; // Free the type handle - ;} - break; - - case 100: -#line 1401 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 99: +#line 1401 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ if (yyvsp[-1].TypeVal->get() != yyvsp[0].ConstVal->getType()) ThrowException("Mismatched types for constant expression!"); yyval.ConstVal = yyvsp[0].ConstVal; delete yyvsp[-1].TypeVal; - ;} - break; - - case 101: -#line 1407 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 100: +#line 1407 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ const Type *Ty = yyvsp[-1].TypeVal->get(); if (isa(Ty) || Ty == Type::LabelTy || isa(Ty)) ThrowException("Cannot create a null initialized value of this type!"); yyval.ConstVal = Constant::getNullValue(Ty); delete yyvsp[-1].TypeVal; - ;} - break; - - case 102: -#line 1415 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { // integral constants + ; + break;} +case 101: +#line 1415 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ // integral constants if (!ConstantSInt::isValueValidForType(yyvsp[-1].PrimType, yyvsp[0].SInt64Val)) ThrowException("Constant value doesn't fit in type!"); yyval.ConstVal = ConstantSInt::get(yyvsp[-1].PrimType, yyvsp[0].SInt64Val); - ;} - break; - - case 103: -#line 1420 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { // integral constants + ; + break;} +case 102: +#line 1420 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ // integral constants if (!ConstantUInt::isValueValidForType(yyvsp[-1].PrimType, yyvsp[0].UInt64Val)) ThrowException("Constant value doesn't fit in type!"); yyval.ConstVal = ConstantUInt::get(yyvsp[-1].PrimType, yyvsp[0].UInt64Val); - ;} - break; - - case 104: -#line 1425 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { // Boolean constants + ; + break;} +case 103: +#line 1425 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ // Boolean constants yyval.ConstVal = ConstantBool::True; - ;} - break; - - case 105: -#line 1428 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { // Boolean constants + ; + break;} +case 104: +#line 1428 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ // Boolean constants yyval.ConstVal = ConstantBool::False; - ;} - break; - - case 106: -#line 1431 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { // Float & Double constants + ; + break;} +case 105: +#line 1431 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ // Float & Double constants if (!ConstantFP::isValueValidForType(yyvsp[-1].PrimType, yyvsp[0].FPVal)) ThrowException("Floating point constant invalid for type!!"); yyval.ConstVal = ConstantFP::get(yyvsp[-1].PrimType, yyvsp[0].FPVal); - ;} - break; - - case 107: -#line 1438 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 106: +#line 1438 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ if (!yyvsp[-3].ConstVal->getType()->isFirstClassType()) ThrowException("cast constant expression from a non-primitive type: '" + yyvsp[-3].ConstVal->getType()->getDescription() + "'!"); @@ -3274,12 +2759,11 @@ yyvsp[-1].TypeVal->get()->getDescription() + "'!"); yyval.ConstVal = ConstantExpr::getCast(yyvsp[-3].ConstVal, yyvsp[-1].TypeVal->get()); delete yyvsp[-1].TypeVal; - ;} - break; - - case 108: -#line 1448 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 107: +#line 1448 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ if (!isa(yyvsp[-2].ConstVal->getType())) ThrowException("GetElementPtr requires a pointer operand!"); @@ -3309,23 +2793,21 @@ delete yyvsp[-1].ValueList; yyval.ConstVal = ConstantExpr::getGetElementPtr(yyvsp[-2].ConstVal, IdxVec); - ;} - break; - - case 109: -#line 1479 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 108: +#line 1479 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ if (yyvsp[-5].ConstVal->getType() != Type::BoolTy) ThrowException("Select condition must be of boolean type!"); if (yyvsp[-3].ConstVal->getType() != yyvsp[-1].ConstVal->getType()) ThrowException("Select operand types must match!"); yyval.ConstVal = ConstantExpr::getSelect(yyvsp[-5].ConstVal, yyvsp[-3].ConstVal, yyvsp[-1].ConstVal); - ;} - break; - - case 110: -#line 1486 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 109: +#line 1486 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ if (yyvsp[-3].ConstVal->getType() != yyvsp[-1].ConstVal->getType()) ThrowException("Binary operator types must match!"); // HACK: llvm 1.3 and earlier used to emit invalid pointer constant exprs. @@ -3345,12 +2827,11 @@ ConstantExpr::getCast(yyvsp[-1].ConstVal, IntPtrTy)); yyval.ConstVal = ConstantExpr::getCast(yyval.ConstVal, yyvsp[-3].ConstVal->getType()); } - ;} - break; - - case 111: -#line 1507 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 110: +#line 1507 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ if (yyvsp[-3].ConstVal->getType() != yyvsp[-1].ConstVal->getType()) ThrowException("Logical operator types must match!"); if (!yyvsp[-3].ConstVal->getType()->isIntegral()) { @@ -3359,99 +2840,93 @@ ThrowException("Logical operator requires integral operands!"); } yyval.ConstVal = ConstantExpr::get(yyvsp[-5].BinaryOpVal, yyvsp[-3].ConstVal, yyvsp[-1].ConstVal); - ;} - break; - - case 112: -#line 1517 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 111: +#line 1517 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ if (yyvsp[-3].ConstVal->getType() != yyvsp[-1].ConstVal->getType()) ThrowException("setcc operand types must match!"); yyval.ConstVal = ConstantExpr::get(yyvsp[-5].BinaryOpVal, yyvsp[-3].ConstVal, yyvsp[-1].ConstVal); - ;} - break; - - case 113: -#line 1522 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 112: +#line 1522 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ if (yyvsp[-1].ConstVal->getType() != Type::UByteTy) ThrowException("Shift count for shift constant must be unsigned byte!"); if (!yyvsp[-3].ConstVal->getType()->isInteger()) ThrowException("Shift constant expression requires integer operand!"); yyval.ConstVal = ConstantExpr::get(yyvsp[-5].OtherOpVal, yyvsp[-3].ConstVal, yyvsp[-1].ConstVal); - ;} - break; - - case 114: -#line 1529 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 113: +#line 1529 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ if (!isa(yyvsp[-3].ConstVal->getType())) ThrowException("First operand of extractelement must be " "packed type!"); if (yyvsp[-1].ConstVal->getType() != Type::UIntTy) ThrowException("Second operand of extractelement must be uint!"); yyval.ConstVal = ConstantExpr::getExtractElement(yyvsp[-3].ConstVal, yyvsp[-1].ConstVal); - ;} - break; - - case 115: -#line 1539 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 114: +#line 1539 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ (yyval.ConstVector = yyvsp[-2].ConstVector)->push_back(yyvsp[0].ConstVal); - ;} - break; - - case 116: -#line 1542 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 115: +#line 1542 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.ConstVector = new std::vector(); yyval.ConstVector->push_back(yyvsp[0].ConstVal); - ;} - break; - - case 117: -#line 1549 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { yyval.BoolVal = false; ;} - break; - - case 118: -#line 1549 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { yyval.BoolVal = true; ;} - break; - - case 119: -#line 1559 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 116: +#line 1549 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.BoolVal = false; ; + break;} +case 117: +#line 1549 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.BoolVal = true; ; + break;} +case 118: +#line 1559 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.ModuleVal = ParserResult = yyvsp[0].ModuleVal; CurModule.ModuleDone(); -;} - break; - - case 120: -#line 1566 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { +; + break;} +case 119: +#line 1566 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.ModuleVal = yyvsp[-1].ModuleVal; CurFun.FunctionDone(); - ;} - break; - - case 121: -#line 1570 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 120: +#line 1570 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.ModuleVal = yyvsp[-1].ModuleVal; - ;} - break; - - case 122: -#line 1573 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 121: +#line 1573 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ + yyval.ModuleVal = yyvsp[-2].ModuleVal; + ; + break;} +case 122: +#line 1576 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.ModuleVal = yyvsp[-1].ModuleVal; - ;} - break; - - case 123: -#line 1576 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 123: +#line 1579 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.ModuleVal = CurModule.CurrentModule; // Emit an error if there are any unresolved types left. if (!CurModule.LateResolveTypes.empty()) { @@ -3461,12 +2936,11 @@ else ThrowException("Reference to an undefined type: #" + itostr(DID.Num)); } - ;} - break; - - case 124: -#line 1589 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 124: +#line 1592 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ // Eagerly resolve types. This is not an optimization, this is a // requirement that is due to the fact that we could have this: // @@ -3485,189 +2959,180 @@ } delete yyvsp[0].TypeVal; - ;} - break; - - case 125: -#line 1609 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { // Function prototypes can be in const pool - ;} - break; - - case 126: -#line 1611 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 125: +#line 1612 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ // Function prototypes can be in const pool + ; + break;} +case 126: +#line 1614 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ // Asm blocks can be in the const pool + ; + break;} +case 127: +#line 1616 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ if (yyvsp[0].ConstVal == 0) ThrowException("Global value initializer is not a constant!"); CurGV = ParseGlobalVariable(yyvsp[-3].StrVal, yyvsp[-2].Linkage, yyvsp[-1].BoolVal, yyvsp[0].ConstVal->getType(), yyvsp[0].ConstVal); - ;} - break; - - case 127: -#line 1614 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 128: +#line 1619 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ CurGV = 0; - ;} - break; - - case 128: -#line 1617 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 129: +#line 1622 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ CurGV = ParseGlobalVariable(yyvsp[-3].StrVal, GlobalValue::ExternalLinkage, yyvsp[-1].BoolVal, *yyvsp[0].TypeVal, 0); delete yyvsp[0].TypeVal; - ;} - break; - - case 129: -#line 1621 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 130: +#line 1626 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ CurGV = 0; - ;} - break; - - case 130: -#line 1624 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { - ;} - break; - - case 131: -#line 1626 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { - ;} - break; - - case 132: -#line 1628 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { - ;} - break; - - case 133: -#line 1633 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { yyval.Endianness = Module::BigEndian; ;} - break; - - case 134: -#line 1634 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { yyval.Endianness = Module::LittleEndian; ;} - break; - - case 135: -#line 1636 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 131: +#line 1629 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ + ; + break;} +case 132: +#line 1631 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ + ; + break;} +case 133: +#line 1633 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ + ; + break;} +case 134: +#line 1637 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ + const std::string &AsmSoFar = CurModule.CurrentModule->getInlineAsm(); + if (AsmSoFar.empty()) + CurModule.CurrentModule->setInlineAsm(yyvsp[0].StrVal); + else + CurModule.CurrentModule->setInlineAsm(AsmSoFar+"\n"+yyvsp[0].StrVal); + free(yyvsp[0].StrVal); +; + break;} +case 135: +#line 1646 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.Endianness = Module::BigEndian; ; + break;} +case 136: +#line 1647 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.Endianness = Module::LittleEndian; ; + break;} +case 137: +#line 1649 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ CurModule.CurrentModule->setEndianness(yyvsp[0].Endianness); - ;} - break; - - case 136: -#line 1639 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 138: +#line 1652 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ if (yyvsp[0].UInt64Val == 32) CurModule.CurrentModule->setPointerSize(Module::Pointer32); else if (yyvsp[0].UInt64Val == 64) CurModule.CurrentModule->setPointerSize(Module::Pointer64); else ThrowException("Invalid pointer size: '" + utostr(yyvsp[0].UInt64Val) + "'!"); - ;} - break; - - case 137: -#line 1647 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 139: +#line 1660 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ CurModule.CurrentModule->setTargetTriple(yyvsp[0].StrVal); free(yyvsp[0].StrVal); - ;} - break; - - case 139: -#line 1654 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 141: +#line 1667 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ CurModule.CurrentModule->addLibrary(yyvsp[0].StrVal); free(yyvsp[0].StrVal); - ;} - break; - - case 140: -#line 1658 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 142: +#line 1671 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ CurModule.CurrentModule->addLibrary(yyvsp[0].StrVal); free(yyvsp[0].StrVal); - ;} - break; - - case 141: -#line 1662 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { - ;} - break; - - case 145: -#line 1671 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { yyval.StrVal = 0; ;} - break; - - case 146: -#line 1673 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 143: +#line 1675 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ + ; + break;} +case 147: +#line 1684 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.StrVal = 0; ; + break;} +case 148: +#line 1686 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ if (*yyvsp[-1].TypeVal == Type::VoidTy) ThrowException("void typed arguments are invalid!"); yyval.ArgVal = new std::pair(yyvsp[-1].TypeVal, yyvsp[0].StrVal); -;} - break; - - case 147: -#line 1679 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { +; + break;} +case 149: +#line 1692 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.ArgList = yyvsp[-2].ArgList; yyvsp[-2].ArgList->push_back(*yyvsp[0].ArgVal); delete yyvsp[0].ArgVal; - ;} - break; - - case 148: -#line 1684 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 150: +#line 1697 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.ArgList = new std::vector >(); yyval.ArgList->push_back(*yyvsp[0].ArgVal); delete yyvsp[0].ArgVal; - ;} - break; - - case 149: -#line 1690 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 151: +#line 1703 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.ArgList = yyvsp[0].ArgList; - ;} - break; - - case 150: -#line 1693 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 152: +#line 1706 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.ArgList = yyvsp[-2].ArgList; yyval.ArgList->push_back(std::pair(new PATypeHolder(Type::VoidTy), 0)); - ;} - break; - - case 151: -#line 1698 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 153: +#line 1711 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.ArgList = new std::vector >(); yyval.ArgList->push_back(std::make_pair(new PATypeHolder(Type::VoidTy), (char*)0)); - ;} - break; - - case 152: -#line 1702 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 154: +#line 1715 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.ArgList = 0; - ;} - break; - - case 153: -#line 1707 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 155: +#line 1720 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ UnEscapeLexed(yyvsp[-5].StrVal); std::string FunctionName(yyvsp[-5].StrVal); free(yyvsp[-5].StrVal); // Free strdup'd memory! @@ -3750,99 +3215,86 @@ delete yyvsp[-3].ArgList; // We're now done with the argument list } -;} - break; - - case 156: -#line 1794 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { +; + break;} +case 158: +#line 1807 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.FunctionVal = CurFun.CurrentFunction; // Make sure that we keep track of the linkage type even if there was a // previous "declare". yyval.FunctionVal->setLinkage(yyvsp[-2].Linkage); -;} - break; - - case 159: -#line 1804 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { +; + break;} +case 161: +#line 1817 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.FunctionVal = yyvsp[-1].FunctionVal; -;} - break; - - case 160: -#line 1808 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { CurFun.isDeclare = true; ;} - break; - - case 161: -#line 1808 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { +; + break;} +case 162: +#line 1821 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ CurFun.isDeclare = true; ; + break;} +case 163: +#line 1821 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.FunctionVal = CurFun.CurrentFunction; CurFun.FunctionDone(); -;} - break; - - case 162: -#line 1817 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { // A reference to a direct constant +; + break;} +case 164: +#line 1830 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ // A reference to a direct constant yyval.ValIDVal = ValID::create(yyvsp[0].SInt64Val); - ;} - break; - - case 163: -#line 1820 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 165: +#line 1833 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.ValIDVal = ValID::create(yyvsp[0].UInt64Val); - ;} - break; - - case 164: -#line 1823 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { // Perhaps it's an FP constant? + ; + break;} +case 166: +#line 1836 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ // Perhaps it's an FP constant? yyval.ValIDVal = ValID::create(yyvsp[0].FPVal); - ;} - break; - - case 165: -#line 1826 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 167: +#line 1839 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.ValIDVal = ValID::create(ConstantBool::True); - ;} - break; - - case 166: -#line 1829 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 168: +#line 1842 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.ValIDVal = ValID::create(ConstantBool::False); - ;} - break; - - case 167: -#line 1832 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 169: +#line 1845 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.ValIDVal = ValID::createNull(); - ;} - break; - - case 168: -#line 1835 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 170: +#line 1848 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.ValIDVal = ValID::createUndef(); - ;} - break; - - case 169: -#line 1838 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { // A vector zero constant. + ; + break;} +case 171: +#line 1851 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ // A vector zero constant. yyval.ValIDVal = ValID::createZeroInit(); - ;} - break; - - case 170: -#line 1841 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { // Nonempty unsized packed vector + ; + break;} +case 172: +#line 1854 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ // Nonempty unsized packed vector const Type *ETy = (*yyvsp[-1].ConstVector)[0]->getType(); int NumElements = yyvsp[-1].ConstVector->size(); @@ -3865,74 +3317,65 @@ yyval.ValIDVal = ValID::create(ConstantPacked::get(pt, *yyvsp[-1].ConstVector)); delete PTy; delete yyvsp[-1].ConstVector; - ;} - break; - - case 171: -#line 1865 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 173: +#line 1878 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.ValIDVal = ValID::create(yyvsp[0].ConstVal); - ;} - break; - - case 172: -#line 1872 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { // Is it an integer reference...? + ; + break;} +case 174: +#line 1885 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ // Is it an integer reference...? yyval.ValIDVal = ValID::create(yyvsp[0].SIntVal); - ;} - break; - - case 173: -#line 1875 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { // Is it a named reference...? + ; + break;} +case 175: +#line 1888 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ // Is it a named reference...? yyval.ValIDVal = ValID::create(yyvsp[0].StrVal); - ;} - break; - - case 176: -#line 1886 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 178: +#line 1899 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.ValueVal = getVal(*yyvsp[-1].TypeVal, yyvsp[0].ValIDVal); delete yyvsp[-1].TypeVal; - ;} - break; - - case 177: -#line 1890 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 179: +#line 1903 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.FunctionVal = yyvsp[-1].FunctionVal; - ;} - break; - - case 178: -#line 1893 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { // Do not allow functions with 0 basic blocks + ; + break;} +case 180: +#line 1906 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ // Do not allow functions with 0 basic blocks yyval.FunctionVal = yyvsp[-1].FunctionVal; - ;} - break; - - case 179: -#line 1901 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 181: +#line 1914 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ setValueName(yyvsp[0].TermInstVal, yyvsp[-1].StrVal); InsertValue(yyvsp[0].TermInstVal); yyvsp[-2].BasicBlockVal->getInstList().push_back(yyvsp[0].TermInstVal); InsertValue(yyvsp[-2].BasicBlockVal); yyval.BasicBlockVal = yyvsp[-2].BasicBlockVal; - ;} - break; - - case 180: -#line 1910 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 182: +#line 1923 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyvsp[-1].BasicBlockVal->getInstList().push_back(yyvsp[0].InstVal); yyval.BasicBlockVal = yyvsp[-1].BasicBlockVal; - ;} - break; - - case 181: -#line 1914 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 183: +#line 1927 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.BasicBlockVal = CurBB = getBBVal(ValID::create((int)CurFun.NextBBNum++), true); // Make sure to move the basic block to the correct location in the @@ -3941,12 +3384,11 @@ Function::BasicBlockListType &BBL = CurFun.CurrentFunction->getBasicBlockList(); BBL.splice(BBL.end(), BBL, yyval.BasicBlockVal); - ;} - break; - - case 182: -#line 1924 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 184: +#line 1937 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.BasicBlockVal = CurBB = getBBVal(ValID::create(yyvsp[0].StrVal), true); // Make sure to move the basic block to the correct location in the @@ -3955,40 +3397,35 @@ Function::BasicBlockListType &BBL = CurFun.CurrentFunction->getBasicBlockList(); BBL.splice(BBL.end(), BBL, yyval.BasicBlockVal); - ;} - break; - - case 183: -#line 1935 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { // Return with a result... + ; + break;} +case 185: +#line 1948 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ // Return with a result... yyval.TermInstVal = new ReturnInst(yyvsp[0].ValueVal); - ;} - break; - - case 184: -#line 1938 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { // Return with no result... + ; + break;} +case 186: +#line 1951 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ // Return with no result... yyval.TermInstVal = new ReturnInst(); - ;} - break; - - case 185: -#line 1941 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { // Unconditional Branch... + ; + break;} +case 187: +#line 1954 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ // Unconditional Branch... yyval.TermInstVal = new BranchInst(getBBVal(yyvsp[0].ValIDVal)); - ;} - break; - - case 186: -#line 1944 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 188: +#line 1957 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.TermInstVal = new BranchInst(getBBVal(yyvsp[-3].ValIDVal), getBBVal(yyvsp[0].ValIDVal), getVal(Type::BoolTy, yyvsp[-6].ValIDVal)); - ;} - break; - - case 187: -#line 1947 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 189: +#line 1960 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ SwitchInst *S = new SwitchInst(getVal(yyvsp[-7].PrimType, yyvsp[-6].ValIDVal), getBBVal(yyvsp[-3].ValIDVal), yyvsp[-1].JumpTable->size()); yyval.TermInstVal = S; @@ -4001,20 +3438,18 @@ ThrowException("Switch case is constant, but not a simple integer!"); } delete yyvsp[-1].JumpTable; - ;} - break; - - case 188: -#line 1961 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 190: +#line 1974 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ SwitchInst *S = new SwitchInst(getVal(yyvsp[-6].PrimType, yyvsp[-5].ValIDVal), getBBVal(yyvsp[-2].ValIDVal), 0); yyval.TermInstVal = S; - ;} - break; - - case 189: -#line 1966 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 191: +#line 1979 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ const PointerType *PFTy; const FunctionType *Ty; @@ -4065,38 +3500,34 @@ delete yyvsp[-10].TypeVal; delete yyvsp[-7].ValueList; - ;} - break; - - case 190: -#line 2018 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 192: +#line 2031 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.TermInstVal = new UnwindInst(); - ;} - break; - - case 191: -#line 2021 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 193: +#line 2034 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.TermInstVal = new UnreachableInst(); - ;} - break; - - case 192: -#line 2027 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 194: +#line 2040 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.JumpTable = yyvsp[-5].JumpTable; Constant *V = cast(getValNonImprovising(yyvsp[-4].PrimType, yyvsp[-3].ValIDVal)); if (V == 0) ThrowException("May only switch on a constant pool value!"); yyval.JumpTable->push_back(std::make_pair(V, getBBVal(yyvsp[0].ValIDVal))); - ;} - break; - - case 193: -#line 2035 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 195: +#line 2048 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.JumpTable = new std::vector >(); Constant *V = cast(getValNonImprovising(yyvsp[-4].PrimType, yyvsp[-3].ValIDVal)); @@ -4104,75 +3535,66 @@ ThrowException("May only switch on a constant pool value!"); yyval.JumpTable->push_back(std::make_pair(V, getBBVal(yyvsp[0].ValIDVal))); - ;} - break; - - case 194: -#line 2045 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 196: +#line 2058 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ // Is this definition named?? if so, assign the name... setValueName(yyvsp[0].InstVal, yyvsp[-1].StrVal); InsertValue(yyvsp[0].InstVal); yyval.InstVal = yyvsp[0].InstVal; -;} - break; - - case 195: -#line 2052 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { // Used for PHI nodes +; + break;} +case 197: +#line 2065 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ // Used for PHI nodes yyval.PHIList = new std::list >(); yyval.PHIList->push_back(std::make_pair(getVal(*yyvsp[-5].TypeVal, yyvsp[-3].ValIDVal), getBBVal(yyvsp[-1].ValIDVal))); delete yyvsp[-5].TypeVal; - ;} - break; - - case 196: -#line 2057 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 198: +#line 2070 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.PHIList = yyvsp[-6].PHIList; yyvsp[-6].PHIList->push_back(std::make_pair(getVal(yyvsp[-6].PHIList->front().first->getType(), yyvsp[-3].ValIDVal), getBBVal(yyvsp[-1].ValIDVal))); - ;} - break; - - case 197: -#line 2064 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { // Used for call statements, and memory insts... + ; + break;} +case 199: +#line 2077 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ // Used for call statements, and memory insts... yyval.ValueList = new std::vector(); yyval.ValueList->push_back(yyvsp[0].ValueVal); - ;} - break; - - case 198: -#line 2068 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 200: +#line 2081 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.ValueList = yyvsp[-2].ValueList; yyvsp[-2].ValueList->push_back(yyvsp[0].ValueVal); - ;} - break; - - case 200: -#line 2074 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { yyval.ValueList = 0; ;} - break; - - case 201: -#line 2076 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 202: +#line 2087 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.ValueList = 0; ; + break;} +case 203: +#line 2089 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.BoolVal = true; - ;} - break; - - case 202: -#line 2079 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 204: +#line 2092 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.BoolVal = false; - ;} - break; - - case 203: -#line 2085 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 205: +#line 2098 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ if (!(*yyvsp[-3].TypeVal)->isInteger() && !(*yyvsp[-3].TypeVal)->isFloatingPoint() && !isa((*yyvsp[-3].TypeVal).get())) ThrowException( @@ -4183,12 +3605,11 @@ if (yyval.InstVal == 0) ThrowException("binary operator returned null!"); delete yyvsp[-3].TypeVal; - ;} - break; - - case 204: -#line 2097 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 206: +#line 2110 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ if (!(*yyvsp[-3].TypeVal)->isIntegral()) { if (!isa(yyvsp[-3].TypeVal->get()) || !cast(yyvsp[-3].TypeVal->get())->getElementType()->isIntegral()) @@ -4198,12 +3619,11 @@ if (yyval.InstVal == 0) ThrowException("binary operator returned null!"); delete yyvsp[-3].TypeVal; - ;} - break; - - case 205: -#line 2108 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 207: +#line 2121 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ if(isa((*yyvsp[-3].TypeVal).get())) { ThrowException( "PackedTypes currently not supported in setcc instructions!"); @@ -4212,12 +3632,11 @@ if (yyval.InstVal == 0) ThrowException("binary operator returned null!"); delete yyvsp[-3].TypeVal; - ;} - break; - - case 206: -#line 2118 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 208: +#line 2131 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ std::cerr << "WARNING: Use of eliminated 'not' instruction:" << " Replacing with 'xor'.\n"; @@ -4228,54 +3647,49 @@ yyval.InstVal = BinaryOperator::create(Instruction::Xor, yyvsp[0].ValueVal, Ones); if (yyval.InstVal == 0) ThrowException("Could not create a xor instruction!"); - ;} - break; - - case 207: -#line 2130 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 209: +#line 2143 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ if (yyvsp[0].ValueVal->getType() != Type::UByteTy) ThrowException("Shift amount must be ubyte!"); if (!yyvsp[-2].ValueVal->getType()->isInteger()) ThrowException("Shift constant expression requires integer operand!"); yyval.InstVal = new ShiftInst(yyvsp[-3].OtherOpVal, yyvsp[-2].ValueVal, yyvsp[0].ValueVal); - ;} - break; - - case 208: -#line 2137 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 210: +#line 2150 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ if (!yyvsp[0].TypeVal->get()->isFirstClassType()) ThrowException("cast instruction to a non-primitive type: '" + yyvsp[0].TypeVal->get()->getDescription() + "'!"); yyval.InstVal = new CastInst(yyvsp[-2].ValueVal, *yyvsp[0].TypeVal); delete yyvsp[0].TypeVal; - ;} - break; - - case 209: -#line 2144 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 211: +#line 2157 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ if (yyvsp[-4].ValueVal->getType() != Type::BoolTy) ThrowException("select condition must be boolean!"); if (yyvsp[-2].ValueVal->getType() != yyvsp[0].ValueVal->getType()) ThrowException("select value types should match!"); yyval.InstVal = new SelectInst(yyvsp[-4].ValueVal, yyvsp[-2].ValueVal, yyvsp[0].ValueVal); - ;} - break; - - case 210: -#line 2151 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 212: +#line 2164 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ NewVarArgs = true; yyval.InstVal = new VAArgInst(yyvsp[-2].ValueVal, *yyvsp[0].TypeVal); delete yyvsp[0].TypeVal; - ;} - break; - - case 211: -#line 2156 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 213: +#line 2169 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ ObsoleteVarArgs = true; const Type* ArgTy = yyvsp[-2].ValueVal->getType(); Function* NF = CurModule.CurrentModule-> @@ -4293,12 +3707,11 @@ CurBB->getInstList().push_back(new StoreInst(bar, foo)); yyval.InstVal = new VAArgInst(foo, *yyvsp[0].TypeVal); delete yyvsp[0].TypeVal; - ;} - break; - - case 212: -#line 2175 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 214: +#line 2188 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ ObsoleteVarArgs = true; const Type* ArgTy = yyvsp[-2].ValueVal->getType(); Function* NF = CurModule.CurrentModule-> @@ -4319,24 +3732,22 @@ CurBB->getInstList().push_back(tmp); yyval.InstVal = new LoadInst(foo); delete yyvsp[0].TypeVal; - ;} - break; - - case 213: -#line 2197 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 215: +#line 2210 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ if (!isa(yyvsp[-2].ValueVal->getType())) ThrowException("First operand of extractelement must be " "packed type!"); if (yyvsp[0].ValueVal->getType() != Type::UIntTy) ThrowException("Second operand of extractelement must be uint!"); yyval.InstVal = new ExtractElementInst(yyvsp[-2].ValueVal, yyvsp[0].ValueVal); - ;} - break; - - case 214: -#line 2205 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 216: +#line 2218 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ if (!isa(yyvsp[-4].ValueVal->getType())) ThrowException("First operand of insertelement must be " "packed type!"); @@ -4347,12 +3758,11 @@ if (yyvsp[0].ValueVal->getType() != Type::UIntTy) ThrowException("Third operand of insertelement must be uint!"); yyval.InstVal = new InsertElementInst(yyvsp[-4].ValueVal, yyvsp[-2].ValueVal, yyvsp[0].ValueVal); - ;} - break; - - case 215: -#line 2217 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 217: +#line 2230 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ const Type *Ty = yyvsp[0].PHIList->front().first->getType(); if (!Ty->isFirstClassType()) ThrowException("PHI node operands must be of first class type!"); @@ -4365,12 +3775,11 @@ yyvsp[0].PHIList->pop_front(); } delete yyvsp[0].PHIList; // Free the list... - ;} - break; - - case 216: -#line 2231 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 218: +#line 2244 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ const PointerType *PFTy; const FunctionType *Ty; @@ -4426,89 +3835,78 @@ cast(yyval.InstVal)->setCallingConv(yyvsp[-5].UIntVal); delete yyvsp[-4].TypeVal; delete yyvsp[-1].ValueList; - ;} - break; - - case 217: -#line 2288 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 219: +#line 2301 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.InstVal = yyvsp[0].InstVal; - ;} - break; - - case 218: -#line 2294 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 220: +#line 2307 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.ValueList = yyvsp[0].ValueList; - ;} - break; - - case 219: -#line 2296 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 221: +#line 2309 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.ValueList = new std::vector(); - ;} - break; - - case 220: -#line 2300 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 222: +#line 2313 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.BoolVal = true; - ;} - break; - - case 221: -#line 2303 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 223: +#line 2316 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.BoolVal = false; - ;} - break; - - case 222: -#line 2309 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 224: +#line 2322 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.InstVal = new MallocInst(*yyvsp[-1].TypeVal, 0, yyvsp[0].UIntVal); delete yyvsp[-1].TypeVal; - ;} - break; - - case 223: -#line 2313 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 225: +#line 2326 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.InstVal = new MallocInst(*yyvsp[-4].TypeVal, getVal(yyvsp[-2].PrimType, yyvsp[-1].ValIDVal), yyvsp[0].UIntVal); delete yyvsp[-4].TypeVal; - ;} - break; - - case 224: -#line 2317 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 226: +#line 2330 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.InstVal = new AllocaInst(*yyvsp[-1].TypeVal, 0, yyvsp[0].UIntVal); delete yyvsp[-1].TypeVal; - ;} - break; - - case 225: -#line 2321 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 227: +#line 2334 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ yyval.InstVal = new AllocaInst(*yyvsp[-4].TypeVal, getVal(yyvsp[-2].PrimType, yyvsp[-1].ValIDVal), yyvsp[0].UIntVal); delete yyvsp[-4].TypeVal; - ;} - break; - - case 226: -#line 2325 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 228: +#line 2338 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ if (!isa(yyvsp[0].ValueVal->getType())) ThrowException("Trying to free nonpointer type " + yyvsp[0].ValueVal->getType()->getDescription() + "!"); yyval.InstVal = new FreeInst(yyvsp[0].ValueVal); - ;} - break; - - case 227: -#line 2332 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 229: +#line 2345 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ if (!isa(yyvsp[-1].TypeVal->get())) ThrowException("Can't load from nonpointer type: " + (*yyvsp[-1].TypeVal)->getDescription()); @@ -4517,12 +3915,11 @@ (*yyvsp[-1].TypeVal)->getDescription()); yyval.InstVal = new LoadInst(getVal(*yyvsp[-1].TypeVal, yyvsp[0].ValIDVal), "", yyvsp[-3].BoolVal); delete yyvsp[-1].TypeVal; - ;} - break; - - case 228: -#line 2342 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 230: +#line 2355 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ const PointerType *PT = dyn_cast(yyvsp[-1].TypeVal->get()); if (!PT) ThrowException("Can't store to a nonpointer type: " + @@ -4534,12 +3931,11 @@ yyval.InstVal = new StoreInst(yyvsp[-3].ValueVal, getVal(*yyvsp[-1].TypeVal, yyvsp[0].ValIDVal), yyvsp[-5].BoolVal); delete yyvsp[-1].TypeVal; - ;} - break; - - case 229: -#line 2355 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" - { + ; + break;} +case 231: +#line 2368 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ if (!isa(yyvsp[-2].TypeVal->get())) ThrowException("getelementptr insn requires pointer operand!"); @@ -4559,239 +3955,231 @@ (*yyvsp[-2].TypeVal)->getDescription()+ "'!"); yyval.InstVal = new GetElementPtrInst(getVal(*yyvsp[-2].TypeVal, yyvsp[-1].ValIDVal), *yyvsp[0].ValueList); delete yyvsp[-2].TypeVal; delete yyvsp[0].ValueList; - ;} - break; - - - } - -/* Line 1000 of yacc.c. */ -#line 4570 "llvmAsmParser.tab.c" + ; + break;} +} + /* the action file gets copied in in place of this dollarsign */ +#line 543 "/usr/share/bison.simple" yyvsp -= yylen; yyssp -= yylen; +#ifdef YYLSP_NEEDED + yylsp -= yylen; +#endif - - YY_STACK_PRINT (yyss, yyssp); +#if YYDEBUG != 0 + if (yydebug) + { + short *ssp1 = yyss - 1; + fprintf (stderr, "state stack now"); + while (ssp1 != yyssp) + fprintf (stderr, " %d", *++ssp1); + fprintf (stderr, "\n"); + } +#endif *++yyvsp = yyval; +#ifdef YYLSP_NEEDED + yylsp++; + if (yylen == 0) + { + yylsp->first_line = yylloc.first_line; + yylsp->first_column = yylloc.first_column; + yylsp->last_line = (yylsp-1)->last_line; + yylsp->last_column = (yylsp-1)->last_column; + yylsp->text = 0; + } + else + { + yylsp->last_line = (yylsp+yylen-1)->last_line; + yylsp->last_column = (yylsp+yylen-1)->last_column; + } +#endif - /* Now `shift' the result of the reduction. Determine what state - that goes to, based on the state we popped back to and the rule - number reduced by. */ + /* Now "shift" the result of the reduction. + Determine what state that goes to, + based on the state we popped back to + and the rule number reduced by. */ yyn = yyr1[yyn]; - yystate = yypgoto[yyn - YYNTOKENS] + *yyssp; - if (0 <= yystate && yystate <= YYLAST && yycheck[yystate] == *yyssp) + yystate = yypgoto[yyn - YYNTBASE] + *yyssp; + if (yystate >= 0 && yystate <= YYLAST && yycheck[yystate] == *yyssp) yystate = yytable[yystate]; else - yystate = yydefgoto[yyn - YYNTOKENS]; + yystate = yydefgoto[yyn - YYNTBASE]; goto yynewstate; +yyerrlab: /* here on detecting error */ -/*------------------------------------. -| yyerrlab -- here on detecting error | -`------------------------------------*/ -yyerrlab: - /* If not already recovering from an error, report this error. */ - if (!yyerrstatus) + if (! yyerrstatus) + /* If not already recovering from an error, report this error. */ { ++yynerrs; -#if YYERROR_VERBOSE + +#ifdef YYERROR_VERBOSE yyn = yypact[yystate]; - if (YYPACT_NINF < yyn && yyn < YYLAST) + if (yyn > YYFLAG && yyn < YYLAST) { - YYSIZE_T yysize = 0; - int yytype = YYTRANSLATE (yychar); - const char* yyprefix; - char *yymsg; - int yyx; - - /* Start YYX at -YYN if negative to avoid negative indexes in - YYCHECK. */ - int yyxbegin = yyn < 0 ? -yyn : 0; - - /* Stay within bounds of both yycheck and yytname. */ - int yychecklim = YYLAST - yyn; - int yyxend = yychecklim < YYNTOKENS ? yychecklim : YYNTOKENS; - int yycount = 0; - - yyprefix = ", expecting "; - for (yyx = yyxbegin; yyx < yyxend; ++yyx) - if (yycheck[yyx + yyn] == yyx && yyx != YYTERROR) - { - yysize += yystrlen (yyprefix) + yystrlen (yytname [yyx]); - yycount += 1; - if (yycount == 5) - { - yysize = 0; - break; - } - } - yysize += (sizeof ("syntax error, unexpected ") - + yystrlen (yytname[yytype])); - yymsg = (char *) YYSTACK_ALLOC (yysize); - if (yymsg != 0) + int size = 0; + char *msg; + int x, count; + + count = 0; + /* Start X at -yyn if nec to avoid negative indexes in yycheck. */ + for (x = (yyn < 0 ? -yyn : 0); + x < (sizeof(yytname) / sizeof(char *)); x++) + if (yycheck[x + yyn] == x) + size += strlen(yytname[x]) + 15, count++; + msg = (char *) malloc(size + 15); + if (msg != 0) { - char *yyp = yystpcpy (yymsg, "syntax error, unexpected "); - yyp = yystpcpy (yyp, yytname[yytype]); + strcpy(msg, "parse error"); - if (yycount < 5) + if (count < 5) { - yyprefix = ", expecting "; - for (yyx = yyxbegin; yyx < yyxend; ++yyx) - if (yycheck[yyx + yyn] == yyx && yyx != YYTERROR) + count = 0; + for (x = (yyn < 0 ? -yyn : 0); + x < (sizeof(yytname) / sizeof(char *)); x++) + if (yycheck[x + yyn] == x) { - yyp = yystpcpy (yyp, yyprefix); - yyp = yystpcpy (yyp, yytname[yyx]); - yyprefix = " or "; + strcat(msg, count == 0 ? ", expecting `" : " or `"); + strcat(msg, yytname[x]); + strcat(msg, "'"); + count++; } } - yyerror (yymsg); - YYSTACK_FREE (yymsg); + yyerror(msg); + free(msg); } else - yyerror ("syntax error; also virtual memory exhausted"); + yyerror ("parse error; also virtual memory exceeded"); } else #endif /* YYERROR_VERBOSE */ - yyerror ("syntax error"); + yyerror("parse error"); } - + goto yyerrlab1; +yyerrlab1: /* here on error raised explicitly by an action */ if (yyerrstatus == 3) { - /* If just tried and failed to reuse lookahead token after an - error, discard it. */ + /* if just tried and failed to reuse lookahead token after an error, discard it. */ - if (yychar <= YYEOF) - { - /* If at end of input, pop the error token, - then the rest of the stack, then return failure. */ - if (yychar == YYEOF) - for (;;) - { - YYPOPSTACK; - if (yyssp == yyss) - YYABORT; - YYDSYMPRINTF ("Error: popping", yystos[*yyssp], yyvsp, yylsp); - yydestruct (yystos[*yyssp], yyvsp); - } - } - else - { - YYDSYMPRINTF ("Error: discarding", yytoken, &yylval, &yylloc); - yydestruct (yytoken, &yylval); - yychar = YYEMPTY; + /* return failure if at end of input */ + if (yychar == YYEOF) + YYABORT; - } +#if YYDEBUG != 0 + if (yydebug) + fprintf(stderr, "Discarding token %d (%s).\n", yychar, yytname[yychar1]); +#endif + + yychar = YYEMPTY; } - /* Else will try to reuse lookahead token after shifting the error - token. */ - goto yyerrlab1; + /* Else will try to reuse lookahead token + after shifting the error token. */ + yyerrstatus = 3; /* Each real token shifted decrements this */ -/*---------------------------------------------------. -| yyerrorlab -- error raised explicitly by YYERROR. | -`---------------------------------------------------*/ -yyerrorlab: + goto yyerrhandle; -#ifdef __GNUC__ - /* Pacify GCC when the user code never invokes YYERROR and the label - yyerrorlab therefore never appears in user code. */ - if (0) - goto yyerrorlab; -#endif +yyerrdefault: /* current state does not do anything special for the error token. */ - yyvsp -= yylen; - yyssp -= yylen; - yystate = *yyssp; - goto yyerrlab1; +#if 0 + /* This is wrong; only states that explicitly want error tokens + should shift them. */ + yyn = yydefact[yystate]; /* If its default is to accept any token, ok. Otherwise pop it.*/ + if (yyn) goto yydefault; +#endif +yyerrpop: /* pop the current state because it cannot handle the error token */ -/*-------------------------------------------------------------. -| yyerrlab1 -- common code for both syntax error and YYERROR. | -`-------------------------------------------------------------*/ -yyerrlab1: - yyerrstatus = 3; /* Each real token shifted decrements this. */ + if (yyssp == yyss) YYABORT; + yyvsp--; + yystate = *--yyssp; +#ifdef YYLSP_NEEDED + yylsp--; +#endif - for (;;) +#if YYDEBUG != 0 + if (yydebug) { - yyn = yypact[yystate]; - if (yyn != YYPACT_NINF) - { - yyn += YYTERROR; - if (0 <= yyn && yyn <= YYLAST && yycheck[yyn] == YYTERROR) - { - yyn = yytable[yyn]; - if (0 < yyn) - break; - } - } + short *ssp1 = yyss - 1; + fprintf (stderr, "Error: state stack now"); + while (ssp1 != yyssp) + fprintf (stderr, " %d", *++ssp1); + fprintf (stderr, "\n"); + } +#endif - /* Pop the current state because it cannot handle the error token. */ - if (yyssp == yyss) - YYABORT; +yyerrhandle: + + yyn = yypact[yystate]; + if (yyn == YYFLAG) + goto yyerrdefault; + + yyn += YYTERROR; + if (yyn < 0 || yyn > YYLAST || yycheck[yyn] != YYTERROR) + goto yyerrdefault; - YYDSYMPRINTF ("Error: popping", yystos[*yyssp], yyvsp, yylsp); - yydestruct (yystos[yystate], yyvsp); - YYPOPSTACK; - yystate = *yyssp; - YY_STACK_PRINT (yyss, yyssp); + yyn = yytable[yyn]; + if (yyn < 0) + { + if (yyn == YYFLAG) + goto yyerrpop; + yyn = -yyn; + goto yyreduce; } + else if (yyn == 0) + goto yyerrpop; if (yyn == YYFINAL) YYACCEPT; - YYDPRINTF ((stderr, "Shifting error token, ")); +#if YYDEBUG != 0 + if (yydebug) + fprintf(stderr, "Shifting error token, "); +#endif *++yyvsp = yylval; - +#ifdef YYLSP_NEEDED + *++yylsp = yylloc; +#endif yystate = yyn; goto yynewstate; + yyacceptlab: + /* YYACCEPT comes here. */ + if (yyfree_stacks) + { + free (yyss); + free (yyvs); +#ifdef YYLSP_NEEDED + free (yyls); +#endif + } + return 0; -/*-------------------------------------. -| yyacceptlab -- YYACCEPT comes here. | -`-------------------------------------*/ -yyacceptlab: - yyresult = 0; - goto yyreturn; - -/*-----------------------------------. -| yyabortlab -- YYABORT comes here. | -`-----------------------------------*/ -yyabortlab: - yyresult = 1; - goto yyreturn; - -#ifndef yyoverflow -/*----------------------------------------------. -| yyoverflowlab -- parser overflow comes here. | -`----------------------------------------------*/ -yyoverflowlab: - yyerror ("parser stack overflow"); - yyresult = 2; - /* Fall through. */ -#endif - -yyreturn: -#ifndef yyoverflow - if (yyss != yyssa) - YYSTACK_FREE (yyss); + yyabortlab: + /* YYABORT comes here. */ + if (yyfree_stacks) + { + free (yyss); + free (yyvs); +#ifdef YYLSP_NEEDED + free (yyls); #endif - return yyresult; + } + return 1; } - - -#line 2378 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" +#line 2391 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" int yyerror(const char *ErrorMsg) { std::string where @@ -4805,4 +4193,3 @@ ThrowException(errMsg); return 0; } - Index: llvm/lib/AsmParser/llvmAsmParser.h diff -u llvm/lib/AsmParser/llvmAsmParser.h:1.16 llvm/lib/AsmParser/llvmAsmParser.h:1.17 --- llvm/lib/AsmParser/llvmAsmParser.h:1.16 Wed Jan 18 19:21:04 2006 +++ llvm/lib/AsmParser/llvmAsmParser.h Mon Jan 23 17:05:42 2006 @@ -1,233 +1,4 @@ -/* A Bison parser, made by GNU Bison 1.875c. */ - -/* Skeleton parser for Yacc-like parsing with Bison, - Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003 Free Software Foundation, Inc. - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2, or (at your option) - any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 59 Temple Place - Suite 330, - Boston, MA 02111-1307, USA. */ - -/* As a special exception, when this file is copied by Bison into a - Bison output file, you may use that output file without restriction. - This special exception was added by the Free Software Foundation - in version 1.24 of Bison. */ - -/* Tokens. */ -#ifndef YYTOKENTYPE -# define YYTOKENTYPE - /* Put the tokens into the symbol table, so that GDB and other debuggers - know about them. */ - enum yytokentype { - ESINT64VAL = 258, - EUINT64VAL = 259, - SINTVAL = 260, - UINTVAL = 261, - FPVAL = 262, - VOID = 263, - BOOL = 264, - SBYTE = 265, - UBYTE = 266, - SHORT = 267, - USHORT = 268, - INT = 269, - UINT = 270, - LONG = 271, - ULONG = 272, - FLOAT = 273, - DOUBLE = 274, - TYPE = 275, - LABEL = 276, - VAR_ID = 277, - LABELSTR = 278, - STRINGCONSTANT = 279, - IMPLEMENTATION = 280, - ZEROINITIALIZER = 281, - TRUETOK = 282, - FALSETOK = 283, - BEGINTOK = 284, - ENDTOK = 285, - DECLARE = 286, - GLOBAL = 287, - CONSTANT = 288, - SECTION = 289, - VOLATILE = 290, - TO = 291, - DOTDOTDOT = 292, - NULL_TOK = 293, - UNDEF = 294, - CONST = 295, - INTERNAL = 296, - LINKONCE = 297, - WEAK = 298, - APPENDING = 299, - OPAQUE = 300, - NOT = 301, - EXTERNAL = 302, - TARGET = 303, - TRIPLE = 304, - ENDIAN = 305, - POINTERSIZE = 306, - LITTLE = 307, - BIG = 308, - ALIGN = 309, - DEPLIBS = 310, - CALL = 311, - TAIL = 312, - CC_TOK = 313, - CCC_TOK = 314, - FASTCC_TOK = 315, - COLDCC_TOK = 316, - RET = 317, - BR = 318, - SWITCH = 319, - INVOKE = 320, - UNWIND = 321, - UNREACHABLE = 322, - ADD = 323, - SUB = 324, - MUL = 325, - DIV = 326, - REM = 327, - AND = 328, - OR = 329, - XOR = 330, - SETLE = 331, - SETGE = 332, - SETLT = 333, - SETGT = 334, - SETEQ = 335, - SETNE = 336, - MALLOC = 337, - ALLOCA = 338, - FREE = 339, - LOAD = 340, - STORE = 341, - GETELEMENTPTR = 342, - PHI_TOK = 343, - CAST = 344, - SELECT = 345, - SHL = 346, - SHR = 347, - VAARG = 348, - EXTRACTELEMENT = 349, - INSERTELEMENT = 350, - VAARG_old = 351, - VANEXT_old = 352 - }; -#endif -#define ESINT64VAL 258 -#define EUINT64VAL 259 -#define SINTVAL 260 -#define UINTVAL 261 -#define FPVAL 262 -#define VOID 263 -#define BOOL 264 -#define SBYTE 265 -#define UBYTE 266 -#define SHORT 267 -#define USHORT 268 -#define INT 269 -#define UINT 270 -#define LONG 271 -#define ULONG 272 -#define FLOAT 273 -#define DOUBLE 274 -#define TYPE 275 -#define LABEL 276 -#define VAR_ID 277 -#define LABELSTR 278 -#define STRINGCONSTANT 279 -#define IMPLEMENTATION 280 -#define ZEROINITIALIZER 281 -#define TRUETOK 282 -#define FALSETOK 283 -#define BEGINTOK 284 -#define ENDTOK 285 -#define DECLARE 286 -#define GLOBAL 287 -#define CONSTANT 288 -#define SECTION 289 -#define VOLATILE 290 -#define TO 291 -#define DOTDOTDOT 292 -#define NULL_TOK 293 -#define UNDEF 294 -#define CONST 295 -#define INTERNAL 296 -#define LINKONCE 297 -#define WEAK 298 -#define APPENDING 299 -#define OPAQUE 300 -#define NOT 301 -#define EXTERNAL 302 -#define TARGET 303 -#define TRIPLE 304 -#define ENDIAN 305 -#define POINTERSIZE 306 -#define LITTLE 307 -#define BIG 308 -#define ALIGN 309 -#define DEPLIBS 310 -#define CALL 311 -#define TAIL 312 -#define CC_TOK 313 -#define CCC_TOK 314 -#define FASTCC_TOK 315 -#define COLDCC_TOK 316 -#define RET 317 -#define BR 318 -#define SWITCH 319 -#define INVOKE 320 -#define UNWIND 321 -#define UNREACHABLE 322 -#define ADD 323 -#define SUB 324 -#define MUL 325 -#define DIV 326 -#define REM 327 -#define AND 328 -#define OR 329 -#define XOR 330 -#define SETLE 331 -#define SETGE 332 -#define SETLT 333 -#define SETGT 334 -#define SETEQ 335 -#define SETNE 336 -#define MALLOC 337 -#define ALLOCA 338 -#define FREE 339 -#define LOAD 340 -#define STORE 341 -#define GETELEMENTPTR 342 -#define PHI_TOK 343 -#define CAST 344 -#define SELECT 345 -#define SHL 346 -#define SHR 347 -#define VAARG 348 -#define EXTRACTELEMENT 349 -#define INSERTELEMENT 350 -#define VAARG_old 351 -#define VANEXT_old 352 - - - - -#if ! defined (YYSTYPE) && ! defined (YYSTYPE_IS_DECLARED) -#line 878 "/proj/llvm/llvm2/lib/AsmParser/llvmAsmParser.y" -typedef union YYSTYPE { +typedef union { llvm::Module *ModuleVal; llvm::Function *FunctionVal; std::pair *ArgVal; @@ -266,14 +37,102 @@ llvm::Instruction::OtherOps OtherOpVal; llvm::Module::Endianness Endianness; } YYSTYPE; -/* Line 1275 of yacc.c. */ -#line 271 "llvmAsmParser.tab.h" -# define yystype YYSTYPE /* obsolescent; will be withdrawn */ -# define YYSTYPE_IS_DECLARED 1 -# define YYSTYPE_IS_TRIVIAL 1 -#endif - -extern YYSTYPE llvmAsmlval; - +#define ESINT64VAL 257 +#define EUINT64VAL 258 +#define SINTVAL 259 +#define UINTVAL 260 +#define FPVAL 261 +#define VOID 262 +#define BOOL 263 +#define SBYTE 264 +#define UBYTE 265 +#define SHORT 266 +#define USHORT 267 +#define INT 268 +#define UINT 269 +#define LONG 270 +#define ULONG 271 +#define FLOAT 272 +#define DOUBLE 273 +#define TYPE 274 +#define LABEL 275 +#define VAR_ID 276 +#define LABELSTR 277 +#define STRINGCONSTANT 278 +#define IMPLEMENTATION 279 +#define ZEROINITIALIZER 280 +#define TRUETOK 281 +#define FALSETOK 282 +#define BEGINTOK 283 +#define ENDTOK 284 +#define DECLARE 285 +#define GLOBAL 286 +#define CONSTANT 287 +#define SECTION 288 +#define VOLATILE 289 +#define TO 290 +#define DOTDOTDOT 291 +#define NULL_TOK 292 +#define UNDEF 293 +#define CONST 294 +#define INTERNAL 295 +#define LINKONCE 296 +#define WEAK 297 +#define APPENDING 298 +#define OPAQUE 299 +#define NOT 300 +#define EXTERNAL 301 +#define TARGET 302 +#define TRIPLE 303 +#define ENDIAN 304 +#define POINTERSIZE 305 +#define LITTLE 306 +#define BIG 307 +#define ALIGN 308 +#define DEPLIBS 309 +#define CALL 310 +#define TAIL 311 +#define ASM_TOK 312 +#define CC_TOK 313 +#define CCC_TOK 314 +#define FASTCC_TOK 315 +#define COLDCC_TOK 316 +#define RET 317 +#define BR 318 +#define SWITCH 319 +#define INVOKE 320 +#define UNWIND 321 +#define UNREACHABLE 322 +#define ADD 323 +#define SUB 324 +#define MUL 325 +#define DIV 326 +#define REM 327 +#define AND 328 +#define OR 329 +#define XOR 330 +#define SETLE 331 +#define SETGE 332 +#define SETLT 333 +#define SETGT 334 +#define SETEQ 335 +#define SETNE 336 +#define MALLOC 337 +#define ALLOCA 338 +#define FREE 339 +#define LOAD 340 +#define STORE 341 +#define GETELEMENTPTR 342 +#define PHI_TOK 343 +#define CAST 344 +#define SELECT 345 +#define SHL 346 +#define SHR 347 +#define VAARG 348 +#define EXTRACTELEMENT 349 +#define INSERTELEMENT 350 +#define VAARG_old 351 +#define VANEXT_old 352 +extern YYSTYPE llvmAsmlval; From lattner at cs.uiuc.edu Mon Jan 23 17:06:40 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon, 23 Jan 2006 17:06:40 -0600 Subject: [llvm-commits] CVS: llvm/lib/Transforms/Utils/CloneModule.cpp Message-ID: <200601232306.RAA03221@zion.cs.uiuc.edu> Changes in directory llvm/lib/Transforms/Utils: CloneModule.cpp updated: 1.15 -> 1.16 --- Log message: When cloning a module, clone the inline asm. --- Diffs of the changes: (+1 -0) CloneModule.cpp | 1 + 1 files changed, 1 insertion(+) Index: llvm/lib/Transforms/Utils/CloneModule.cpp diff -u llvm/lib/Transforms/Utils/CloneModule.cpp:1.15 llvm/lib/Transforms/Utils/CloneModule.cpp:1.16 --- llvm/lib/Transforms/Utils/CloneModule.cpp:1.15 Wed Jan 18 15:32:45 2006 +++ llvm/lib/Transforms/Utils/CloneModule.cpp Mon Jan 23 17:06:28 2006 @@ -31,6 +31,7 @@ New->setEndianness(M->getEndianness()); New->setPointerSize(M->getPointerSize()); New->setTargetTriple(M->getTargetTriple()); + New->setInlineAsm(M->getInlineAsm()); // Copy all of the type symbol table entries over. const SymbolTable &SymTab = M->getSymbolTable(); From lattner at cs.uiuc.edu Mon Jan 23 17:08:49 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon, 23 Jan 2006 17:08:49 -0600 Subject: [llvm-commits] CVS: llvm/lib/Linker/LinkModules.cpp Message-ID: <200601232308.RAA03254@zion.cs.uiuc.edu> Changes in directory llvm/lib/Linker: LinkModules.cpp updated: 1.109 -> 1.110 --- Log message: Add support for linking inline asm --- Diffs of the changes: (+7 -0) LinkModules.cpp | 7 +++++++ 1 files changed, 7 insertions(+) Index: llvm/lib/Linker/LinkModules.cpp diff -u llvm/lib/Linker/LinkModules.cpp:1.109 llvm/lib/Linker/LinkModules.cpp:1.110 --- llvm/lib/Linker/LinkModules.cpp:1.109 Thu Jan 19 17:15:58 2006 +++ llvm/lib/Linker/LinkModules.cpp Mon Jan 23 17:08:37 2006 @@ -833,6 +833,13 @@ Dest->getTargetTriple() != Src->getTargetTriple()) std::cerr << "WARNING: Linking two modules of different target triples!\n"; + if (!Src->getInlineAsm().empty()) { + if (Dest->getInlineAsm().empty()) + Dest->setInlineAsm(Src->getInlineAsm()); + else + Dest->setInlineAsm(Dest->getInlineAsm()+"\n"+Src->getInlineAsm()); + } + // Update the destination module's dependent libraries list with the libraries // from the source module. There's no opportunity for duplicates here as the // Module ensures that duplicate insertions are discarded. From lattner at cs.uiuc.edu Mon Jan 23 17:23:59 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon, 23 Jan 2006 17:23:59 -0600 Subject: [llvm-commits] CVS: llvm/docs/LangRef.html Message-ID: <200601232323.RAA03400@zion.cs.uiuc.edu> Changes in directory llvm/docs: LangRef.html updated: 1.131 -> 1.132 --- Log message: document module-level inline asm support. --- Diffs of the changes: (+31 -2) LangRef.html | 33 +++++++++++++++++++++++++++++++-- 1 files changed, 31 insertions(+), 2 deletions(-) Index: llvm/docs/LangRef.html diff -u llvm/docs/LangRef.html:1.131 llvm/docs/LangRef.html:1.132 --- llvm/docs/LangRef.html:1.131 Mon Jan 16 16:38:59 2006 +++ llvm/docs/LangRef.html Mon Jan 23 17:23:47 2006 @@ -23,7 +23,8 @@
  • Linkage Types
  • Calling Conventions
  • Global Variables
    • -
  • Function Structure
    • +
  • Functions
    • +
  • Module-Level Inline Assembly
  • Type System @@ -580,6 +581,34 @@ + +
    + Module-Level Inline Assembly
    • + + +
    +

    +Modules may contain "module-level inline asm" blocks, which corresponds to the +GCC "file scope inline asm" blocks. These blocks are internally concatenated by +LLVM and treated as a single unit, but may be separated in the .ll file if +desired. The syntax is very simple: +

    + +
    +  asm "inline asm code goes here"
+  asm "more can go here"
+
    + +

    The strings can contain any character by escaping non-printable characters. + The escape sequence used is simply "\xx" where "xx" is the two digit hex code + for the number. +

    + +

    + The inline asm code is simply printed to the machine code .s file when + assembly code is generated. +

    +
    @@ -3650,7 +3679,7 @@ Chris Lattner
    The LLVM Compiler Infrastructure
    - Last modified: $Date: 2006/01/16 22:38:59 $ + Last modified: $Date: 2006/01/23 23:23:47 $ From lattner at cs.uiuc.edu Mon Jan 23 17:24:25 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon, 23 Jan 2006 17:24:25 -0600 Subject: [llvm-commits] CVS: llvm/test/Feature/inlineasm.ll Message-ID: <200601232324.RAA03457@zion.cs.uiuc.edu> Changes in directory llvm/test/Feature: inlineasm.ll added (r1.1) --- Log message: new testcase --- Diffs of the changes: (+8 -0) inlineasm.ll | 8 ++++++++ 1 files changed, 8 insertions(+) Index: llvm/test/Feature/inlineasm.ll diff -c /dev/null llvm/test/Feature/inlineasm.ll:1.1 *** /dev/null Mon Jan 23 17:24:23 2006 --- llvm/test/Feature/inlineasm.ll Mon Jan 23 17:24:13 2006 *************** *** 0 **** --- 1,8 ---- + ; RUN: llvm-as %s -o - | llvm-dis > Output/t1.ll + ; RUN: llvm-as Output/t1.ll -o - | llvm-dis > Output/t2.ll + ; RUN: diff Output/t1.ll Output/t2.ll + + + asm "this is an inline asm block" + asm "this is another inline asm block" + From lattner at cs.uiuc.edu Mon Jan 23 17:38:21 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon, 23 Jan 2006 17:38:21 -0600 Subject: [llvm-commits] CVS: llvm/docs/BytecodeFormat.html Message-ID: <200601232338.RAA03635@zion.cs.uiuc.edu> Changes in directory llvm/docs: BytecodeFormat.html updated: 1.48 -> 1.49 --- Log message: Update for file-scope inline asm --- Diffs of the changes: (+12 -15) BytecodeFormat.html | 27 ++++++++++++--------------- 1 files changed, 12 insertions(+), 15 deletions(-) Index: llvm/docs/BytecodeFormat.html diff -u llvm/docs/BytecodeFormat.html:1.48 llvm/docs/BytecodeFormat.html:1.49 --- llvm/docs/BytecodeFormat.html:1.48 Fri Nov 11 19:46:21 2005 +++ llvm/docs/BytecodeFormat.html Mon Jan 23 17:38:09 2006 @@ -955,8 +955,7 @@ block - Module global info identifier (0x05) + size
    - + Module global info identifier (0x05) + size zlist(globalvar) @@ -969,28 +968,26 @@ occurring in the module. - llist(string)
    - + llist(string) A length list of strings that specify the names of the libraries that this module -depends upon.
    - +depends upon. - string
    - + string The target triple for the module (blank means no target triple specified, i.e. a -platform independent module).
    - +platform independent module). - llist(string)
    - + llist(string) A length list of strings that defines a table of section strings for globals. A global's -SectionID is an index into this table.
    - +SectionID is an index into this table. + + + string + The inline asm block for this module. @@ -2099,7 +2096,7 @@ Reid Spencer and Chris Lattner
    The LLVM Compiler Infrastructure
    -Last modified: $Date: 2005/11/12 01:46:21 $ +Last modified: $Date: 2006/01/23 23:38:09 $ From lattner at cs.uiuc.edu Mon Jan 23 17:43:31 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon, 23 Jan 2006 17:43:31 -0600 Subject: [llvm-commits] CVS: llvm/lib/Bytecode/Reader/Reader.cpp Message-ID: <200601232343.RAA03737@zion.cs.uiuc.edu> Changes in directory llvm/lib/Bytecode/Reader: Reader.cpp updated: 1.182 -> 1.183 --- Log message: Add support for reading/writing inline asm --- Diffs of the changes: (+5 -1) Reader.cpp | 6 +++++- 1 files changed, 5 insertions(+), 1 deletion(-) Index: llvm/lib/Bytecode/Reader/Reader.cpp diff -u llvm/lib/Bytecode/Reader/Reader.cpp:1.182 llvm/lib/Bytecode/Reader/Reader.cpp:1.183 --- llvm/lib/Bytecode/Reader/Reader.cpp:1.182 Mon Jan 23 02:11:03 2006 +++ llvm/lib/Bytecode/Reader/Reader.cpp Mon Jan 23 17:43:17 2006 @@ -2102,12 +2102,16 @@ if (Handler) Handler->handleTargetTriple(triple); - if (At != BlockEnd && !hasAlignment) { + if (!hasAlignment && At != BlockEnd) { // If the file has section info in it, read the section names now. unsigned NumSections = read_vbr_uint(); while (NumSections--) SectionNames.push_back(read_str()); } + + // If the file has module-level inline asm, read it now. + if (!hasAlignment && At != BlockEnd) + TheModule->setInlineAsm(read_str()); } // If any globals are in specified sections, assign them now. From lattner at cs.uiuc.edu Mon Jan 23 17:43:31 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon, 23 Jan 2006 17:43:31 -0600 Subject: [llvm-commits] CVS: llvm/lib/Bytecode/Writer/Writer.cpp Message-ID: <200601232343.RAA03735@zion.cs.uiuc.edu> Changes in directory llvm/lib/Bytecode/Writer: Writer.cpp updated: 1.116 -> 1.117 --- Log message: Add support for reading/writing inline asm --- Diffs of the changes: (+3 -0) Writer.cpp | 3 +++ 1 files changed, 3 insertions(+) Index: llvm/lib/Bytecode/Writer/Writer.cpp diff -u llvm/lib/Bytecode/Writer/Writer.cpp:1.116 llvm/lib/Bytecode/Writer/Writer.cpp:1.117 --- llvm/lib/Bytecode/Writer/Writer.cpp:1.116 Sat Nov 12 12:34:09 2005 +++ llvm/lib/Bytecode/Writer/Writer.cpp Mon Jan 23 17:43:17 2006 @@ -1030,6 +1030,9 @@ output_vbr((unsigned)SectionNames.size()); for (unsigned i = 0, e = SectionNames.size(); i != e; ++i) output(SectionNames[i]); + + // Output the inline asm string. + output(M->getInlineAsm()); } void BytecodeWriter::outputInstructions(const Function *F) { From lattner at cs.uiuc.edu Mon Jan 23 17:48:05 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon, 23 Jan 2006 17:48:05 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/AsmPrinter.cpp Message-ID: <200601232348.RAA03804@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen: AsmPrinter.cpp updated: 1.37 -> 1.38 --- Log message: Print file-scope inline asm blocks at the start of the output file. --- Diffs of the changes: (+5 -0) AsmPrinter.cpp | 5 +++++ 1 files changed, 5 insertions(+) Index: llvm/lib/CodeGen/AsmPrinter.cpp diff -u llvm/lib/CodeGen/AsmPrinter.cpp:1.37 llvm/lib/CodeGen/AsmPrinter.cpp:1.38 --- llvm/lib/CodeGen/AsmPrinter.cpp:1.37 Thu Jan 12 13:17:23 2006 +++ llvm/lib/CodeGen/AsmPrinter.cpp Mon Jan 23 17:47:53 2006 @@ -71,6 +71,11 @@ bool AsmPrinter::doInitialization(Module &M) { Mang = new Mangler(M, GlobalPrefix); + + if (!M.getInlineAsm().empty()) + O << CommentString << " Start File Scope Asm Blocks:\n" << M.getInlineAsm() + << "\n" << CommentString << " End File Scope Asm Blocks\n"; + SwitchSection("", 0); // Reset back to no section. return false; } From lattner at cs.uiuc.edu Mon Jan 23 18:37:22 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon, 23 Jan 2006 18:37:22 -0600 Subject: [llvm-commits] CVS: llvm/docs/LangRef.html Message-ID: <200601240037.SAA04123@zion.cs.uiuc.edu> Changes in directory llvm/docs: LangRef.html updated: 1.132 -> 1.133 --- Log message: minor syntax change --- Diffs of the changes: (+3 -3) LangRef.html | 6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-) Index: llvm/docs/LangRef.html diff -u llvm/docs/LangRef.html:1.132 llvm/docs/LangRef.html:1.133 --- llvm/docs/LangRef.html:1.132 Mon Jan 23 17:23:47 2006 +++ llvm/docs/LangRef.html Mon Jan 23 18:37:10 2006 @@ -595,8 +595,8 @@ 

    -  asm "inline asm code goes here"
-  asm "more can go here"
+  module asm "inline asm code goes here"
+  module asm "more can go here"

    The strings can contain any character by escaping non-printable characters. @@ -3679,7 +3679,7 @@ Chris Lattner
    The LLVM Compiler Infrastructure
    - Last modified: $Date: 2006/01/23 23:23:47 $ + Last modified: $Date: 2006/01/24 00:37:10 $ From lattner at cs.uiuc.edu Mon Jan 23 18:37:32 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon, 23 Jan 2006 18:37:32 -0600 Subject: [llvm-commits] CVS: llvm/test/Feature/inlineasm.ll Message-ID: <200601240037.SAA04130@zion.cs.uiuc.edu> Changes in directory llvm/test/Feature: inlineasm.ll updated: 1.1 -> 1.2 --- Log message: minor syntax change --- Diffs of the changes: (+2 -2) inlineasm.ll | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/test/Feature/inlineasm.ll diff -u llvm/test/Feature/inlineasm.ll:1.1 llvm/test/Feature/inlineasm.ll:1.2 --- llvm/test/Feature/inlineasm.ll:1.1 Mon Jan 23 17:24:13 2006 +++ llvm/test/Feature/inlineasm.ll Mon Jan 23 18:37:20 2006 @@ -3,6 +3,6 @@ ; RUN: diff Output/t1.ll Output/t2.ll -asm "this is an inline asm block" -asm "this is another inline asm block" +module asm "this is an inline asm block" +module asm "this is another inline asm block" From lattner at cs.uiuc.edu Mon Jan 23 18:38:08 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon, 23 Jan 2006 18:38:08 -0600 Subject: [llvm-commits] CVS: llvm/lib/VMCore/AsmWriter.cpp Message-ID: <200601240038.SAA04163@zion.cs.uiuc.edu> Changes in directory llvm/lib/VMCore: AsmWriter.cpp updated: 1.186 -> 1.187 --- Log message: syntax change --- Diffs of the changes: (+1 -1) AsmWriter.cpp | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/VMCore/AsmWriter.cpp diff -u llvm/lib/VMCore/AsmWriter.cpp:1.186 llvm/lib/VMCore/AsmWriter.cpp:1.187 --- llvm/lib/VMCore/AsmWriter.cpp:1.186 Mon Jan 23 17:03:36 2006 +++ llvm/lib/VMCore/AsmWriter.cpp Mon Jan 23 18:37:56 2006 @@ -776,7 +776,7 @@ Out << "target triple = \"" << M->getTargetTriple() << "\"\n"; if (!M->getInlineAsm().empty()) { - Out << "asm \""; + Out << "module asm \""; PrintEscapedString(M->getInlineAsm(), Out); Out << "\"\n"; } From lattner at cs.uiuc.edu Mon Jan 23 18:40:30 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon, 23 Jan 2006 18:40:30 -0600 Subject: [llvm-commits] CVS: llvm/lib/AsmParser/llvmAsmParser.y Lexer.l Message-ID: <200601240040.SAA04242@zion.cs.uiuc.edu> Changes in directory llvm/lib/AsmParser: llvmAsmParser.y updated: 1.246 -> 1.247 Lexer.l updated: 1.69 -> 1.70 --- Log message: syntax change --- Diffs of the changes: (+4 -3) Lexer.l | 1 + llvmAsmParser.y | 6 +++--- 2 files changed, 4 insertions(+), 3 deletions(-) Index: llvm/lib/AsmParser/llvmAsmParser.y diff -u llvm/lib/AsmParser/llvmAsmParser.y:1.246 llvm/lib/AsmParser/llvmAsmParser.y:1.247 --- llvm/lib/AsmParser/llvmAsmParser.y:1.246 Mon Jan 23 17:05:15 2006 +++ llvm/lib/AsmParser/llvmAsmParser.y Mon Jan 23 18:40:17 2006 @@ -967,7 +967,7 @@ %token DECLARE GLOBAL CONSTANT SECTION VOLATILE %token TO DOTDOTDOT NULL_TOK UNDEF CONST INTERNAL LINKONCE WEAK APPENDING %token OPAQUE NOT EXTERNAL TARGET TRIPLE ENDIAN POINTERSIZE LITTLE BIG ALIGN -%token DEPLIBS CALL TAIL ASM_TOK +%token DEPLIBS CALL TAIL ASM_TOK MODULE %token CC_TOK CCC_TOK FASTCC_TOK COLDCC_TOK %type OptCallingConv @@ -1571,7 +1571,7 @@ | FunctionList FunctionProto { $$ = $1; } - | FunctionList ASM_TOK AsmBlock { + | FunctionList MODULE ASM_TOK AsmBlock { $$ = $1; } | FunctionList IMPLEMENTATION { @@ -1612,7 +1612,7 @@ } | ConstPool FunctionProto { // Function prototypes can be in const pool } - | ConstPool ASM_TOK AsmBlock { // Asm blocks can be in the const pool + | ConstPool MODULE ASM_TOK AsmBlock { // Asm blocks can be in the const pool } | ConstPool OptAssign OptLinkage GlobalType ConstVal { if ($5 == 0) ThrowException("Global value initializer is not a constant!"); Index: llvm/lib/AsmParser/Lexer.l diff -u llvm/lib/AsmParser/Lexer.l:1.69 llvm/lib/AsmParser/Lexer.l:1.70 --- llvm/lib/AsmParser/Lexer.l:1.69 Mon Jan 23 17:05:15 2006 +++ llvm/lib/AsmParser/Lexer.l Mon Jan 23 18:40:17 2006 @@ -212,6 +212,7 @@ volatile { return VOLATILE; } align { return ALIGN; } section { return SECTION; } +module { return MODULE; } asm { return ASM_TOK; } cc { return CC_TOK; } From lattner at cs.uiuc.edu Mon Jan 23 18:45:42 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon, 23 Jan 2006 18:45:42 -0600 Subject: [llvm-commits] CVS: llvm/lib/VMCore/AsmWriter.cpp Message-ID: <200601240045.SAA04316@zion.cs.uiuc.edu> Changes in directory llvm/lib/VMCore: AsmWriter.cpp updated: 1.187 -> 1.188 --- Log message: Pretty print file-scope asm blocks. --- Diffs of the changes: (+15 -1) AsmWriter.cpp | 16 +++++++++++++++- 1 files changed, 15 insertions(+), 1 deletion(-) Index: llvm/lib/VMCore/AsmWriter.cpp diff -u llvm/lib/VMCore/AsmWriter.cpp:1.187 llvm/lib/VMCore/AsmWriter.cpp:1.188 --- llvm/lib/VMCore/AsmWriter.cpp:1.187 Mon Jan 23 18:37:56 2006 +++ llvm/lib/VMCore/AsmWriter.cpp Mon Jan 23 18:45:30 2006 @@ -776,8 +776,22 @@ Out << "target triple = \"" << M->getTargetTriple() << "\"\n"; if (!M->getInlineAsm().empty()) { + // Split the string into lines, to make it easier to read the .ll file. + std::string Asm = M->getInlineAsm(); + size_t CurPos = 0; + size_t NewLine = Asm.find_first_of('\n', CurPos); + while (NewLine != std::string::npos) { + // We found a newline, print the portion of the asm string from the + // last newline up to this newline. + Out << "module asm \""; + PrintEscapedString(std::string(Asm.begin()+CurPos, Asm.begin()+NewLine), + Out); + Out << "\"\n"; + CurPos = NewLine+1; + NewLine = Asm.find_first_of('\n', CurPos); + } Out << "module asm \""; - PrintEscapedString(M->getInlineAsm(), Out); + PrintEscapedString(std::string(Asm.begin()+CurPos, Asm.end()), Out); Out << "\"\n"; } From jlaskey at apple.com Mon Jan 23 18:49:31 2006 From: jlaskey at apple.com (Jim Laskey) Date: Mon, 23 Jan 2006 18:49:31 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/DwarfWriter.h Message-ID: <200601240049.SAA04355@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/CodeGen: DwarfWriter.h updated: 1.15 -> 1.16 --- Log message: Crude Dwarf global variable debugging. --- Diffs of the changes: (+50 -29) DwarfWriter.h | 79 ++++++++++++++++++++++++++++++++++++---------------------- 1 files changed, 50 insertions(+), 29 deletions(-) Index: llvm/include/llvm/CodeGen/DwarfWriter.h diff -u llvm/include/llvm/CodeGen/DwarfWriter.h:1.15 llvm/include/llvm/CodeGen/DwarfWriter.h:1.16 --- llvm/include/llvm/CodeGen/DwarfWriter.h:1.15 Fri Jan 20 19:13:18 2006 +++ llvm/include/llvm/CodeGen/DwarfWriter.h Mon Jan 23 18:49:18 2006 @@ -445,13 +445,17 @@ class DwarfWriter; class DWContext; class MachineDebugInfo; + class MachineFunction; + class Module; + class Type; //===--------------------------------------------------------------------===// // DWLabel - Labels are used to track locations in the assembler file. // Labels appear in the form debug_, where the tag is a // category of label (Ex. location) and number is a value unique in that // category. - struct DWLabel { + class DWLabel { + public: const char *Tag; // Label category tag. Should always be // a staticly declared C string. unsigned Number; // Unique number. @@ -620,15 +624,15 @@ }; //===--------------------------------------------------------------------===// - // DIELabel - A simple label expression DIE. + // DIEDwarfLabel - A Dwarf internal label expression DIE. // - struct DIELabel : public DIEValue { + struct DIEDwarfLabel : public DIEValue { const DWLabel Label; - DIELabel(const DWLabel &L) : DIEValue(isLabel), Label(L) {} + DIEDwarfLabel(const DWLabel &L) : DIEValue(isLabel), Label(L) {} // Implement isa/cast/dyncast. - static bool classof(const DIELabel *) { return true; } + static bool classof(const DIEDwarfLabel *) { return true; } static bool classof(const DIEValue *L) { return L->Type == isLabel; } /// EmitValue - Emit label value. @@ -642,15 +646,15 @@ //===--------------------------------------------------------------------===// - // DIEAsIsLabel - An exact name of a label. + // DIEObjectLabel - A label to an object in code or data. // - struct DIEAsIsLabel : public DIEValue { + struct DIEObjectLabel : public DIEValue { const std::string Label; - DIEAsIsLabel(const std::string &L) : DIEValue(isAsIsLabel), Label(L) {} + DIEObjectLabel(const std::string &L) : DIEValue(isAsIsLabel), Label(L) {} // Implement isa/cast/dyncast. - static bool classof(const DIEAsIsLabel *) { return true; } + static bool classof(const DIEObjectLabel *) { return true; } static bool classof(const DIEValue *L) { return L->Type == isAsIsLabel; } /// EmitValue - Emit label value. @@ -752,10 +756,10 @@ /// void AddLabel(unsigned Attribute, unsigned Form, const DWLabel &Label); - /// AddAsIsLabel - Add a non-Dwarf label attribute data and value. + /// AddObjectLabel - Add a non-Dwarf label attribute data and value. /// - void AddAsIsLabel(unsigned Attribute, unsigned Form, - const std::string &Label); + void AddObjectLabel(unsigned Attribute, unsigned Form, + const std::string &Label); /// AddDelta - Add a label delta attribute data and value. /// @@ -781,13 +785,15 @@ class DWContext { private: DwarfWriter &DW; // DwarfWriter for global information. + DWContext *Parent; // Next context level searched. DIE *Owner; // Owning debug information entry. - std::map Types; // Named types in context. + std::map Types; // Named types in context. std::map Variables;// Named variables in context. public: - DWContext(DwarfWriter &D, DIE *O) + DWContext(DwarfWriter &D, DWContext *P, DIE *O) : DW(D) + , Parent(P) , Owner(O) , Types() , Variables() @@ -796,16 +802,15 @@ } ~DWContext() {} - /// NewBasicType - Creates a new basic type, if necessary, then adds in the + /// NewBasicType - Creates a new basic type, if necessary, then adds to the /// context and owner. - DIE *NewBasicType(const std::string &Name, unsigned Size, - unsigned Encoding); + DIE *NewBasicType(const Type *Ty, unsigned Size, unsigned Align); - /// NewVariable - Creates a basic variable, if necessary, then adds in the + /// NewVariable - Creates a basic variable, if necessary, then adds to the /// context and owner. - DIE *NewVariable(const std::string &Name, - unsigned SourceFileID, unsigned Line, - DIE *Type, bool IsExternal); + DIE *NewGlobalVariable(const std::string &Name, + const std::string &MangledName, + DIE *Type); }; //===--------------------------------------------------------------------===// @@ -1039,6 +1044,14 @@ /// NewGlobalEntity - Make the entity visible globally using the given name. /// void NewGlobalEntity(const std::string &Name, DIE *Entity); + + /// NewGlobalVariable - Add a new global variable DIE to the context. + /// + void NewGlobalVariable(DWContext *Context, + const std::string &Name, + const std::string &MangledName, + const Type *Ty, + unsigned Size, unsigned Align); private: /// NewCompileUnit - Create new compile unit information. @@ -1106,39 +1119,47 @@ /// void EmitDebugMacInfo(); + /// ConstructCompileUnitDIEs - Create a compile unit DIE for each source and + /// header file. + void ConstructCompileUnitDIEs(); + + /// ConstructGlobalDIEs - Create DIEs for each of the externally visible global + /// variables. + void ConstructGlobalDIEs(Module &M); + /// ShouldEmitDwarf - Returns true if Dwarf declarations should be made. /// When called it also checks to see if debug info is newly available. if /// so the initial Dwarf headers are emitted. bool ShouldEmitDwarf(); - + public: - DwarfWriter(std::ostream &o, AsmPrinter *ap); + DwarfWriter(std::ostream &OS, AsmPrinter *A); virtual ~DwarfWriter(); /// SetDebugInfo - Set DebugInfo when it's known that pass manager has /// created it. Set by the target AsmPrinter. - void SetDebugInfo(MachineDebugInfo *di) { DebugInfo = di; } - + void SetDebugInfo(MachineDebugInfo *DI) { DebugInfo = DI; } + //===------------------------------------------------------------------===// // Main entry points. // /// BeginModule - Emit all Dwarf sections that should come prior to the /// content. - void BeginModule(); + void BeginModule(Module &M); /// EndModule - Emit all Dwarf sections that should come after the content. /// - void EndModule(); + void EndModule(Module &M); /// BeginFunction - Gather pre-function debug information. /// - void BeginFunction(); + void BeginFunction(MachineFunction &MF); /// EndFunction - Gather and emit post-function debug information. /// - void EndFunction(); + void EndFunction(MachineFunction &MF); }; } // end llvm namespace From jlaskey at apple.com Mon Jan 23 18:49:31 2006 From: jlaskey at apple.com (Jim Laskey) Date: Mon, 23 Jan 2006 18:49:31 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/DwarfWriter.cpp Message-ID: <200601240049.SAA04351@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen: DwarfWriter.cpp updated: 1.12 -> 1.13 --- Log message: Crude Dwarf global variable debugging. --- Diffs of the changes: (+246 -136) DwarfWriter.cpp | 382 ++++++++++++++++++++++++++++++++++++-------------------- 1 files changed, 246 insertions(+), 136 deletions(-) Index: llvm/lib/CodeGen/DwarfWriter.cpp diff -u llvm/lib/CodeGen/DwarfWriter.cpp:1.12 llvm/lib/CodeGen/DwarfWriter.cpp:1.13 --- llvm/lib/CodeGen/DwarfWriter.cpp:1.12 Fri Jan 20 19:13:18 2006 +++ llvm/lib/CodeGen/DwarfWriter.cpp Mon Jan 23 18:49:18 2006 @@ -14,9 +14,13 @@ #include "llvm/CodeGen/DwarfWriter.h" #include "llvm/ADT/StringExtras.h" +#include "llvm/Module.h" +#include "llvm/Type.h" #include "llvm/CodeGen/AsmPrinter.h" #include "llvm/CodeGen/MachineDebugInfo.h" #include "llvm/Support/CommandLine.h" +#include "llvm/Support/Mangler.h" +#include "llvm/Target/TargetMachine.h" #include @@ -588,7 +592,7 @@ if (ChildrenFlag != DA.ChildrenFlag) return false; if (Data.size() != DA.Data.size()) return false; - for (unsigned i = 0, N = Data.size(); i < N; i++) { + for (unsigned i = 0, N = Data.size(); i < N; ++i) { if (Data[i] != DA.Data[i]) return false; } @@ -602,7 +606,7 @@ if (ChildrenFlag != DA.ChildrenFlag) return ChildrenFlag < DA.ChildrenFlag; if (Data.size() != DA.Data.size()) return Data.size() < DA.Data.size(); - for (unsigned i = 0, N = Data.size(); i < N; i++) { + for (unsigned i = 0, N = Data.size(); i < N; ++i) { if (Data[i] != DA.Data[i]) return Data[i] < DA.Data[i]; } @@ -621,7 +625,7 @@ DW.EOL(ChildrenString(ChildrenFlag)); // For each attribute description. - for (unsigned i = 0, N = Data.size(); i < N; i++) { + for (unsigned i = 0, N = Data.size(); i < N; ++i) { const DIEAbbrevData &AttrData = Data[i]; // Emit attribute type. @@ -648,7 +652,7 @@ << ChildrenString(ChildrenFlag) << "\n"; - for (unsigned i = 0, N = Data.size(); i < N; i++) { + for (unsigned i = 0, N = Data.size(); i < N; ++i) { O << " " << AttributeString(Data[i].getAttribute()) << " " @@ -708,13 +712,13 @@ /// EmitValue - Emit label value. /// -void DIELabel::EmitValue(const DwarfWriter &DW, unsigned Form) const { +void DIEDwarfLabel::EmitValue(const DwarfWriter &DW, unsigned Form) const { DW.EmitReference(Label); } /// SizeOf - Determine size of label value in bytes. /// -unsigned DIELabel::SizeOf(const DwarfWriter &DW, unsigned Form) const { +unsigned DIEDwarfLabel::SizeOf(const DwarfWriter &DW, unsigned Form) const { return DW.getAddressSize(); } @@ -722,14 +726,20 @@ /// EmitValue - Emit label value. /// -void DIEAsIsLabel::EmitValue(const DwarfWriter &DW, unsigned Form) const { +void DIEObjectLabel::EmitValue(const DwarfWriter &DW, unsigned Form) const { + DW.EmitByte(sizeof(int8_t) + DW.getAddressSize()); + DW.EOL("DW_FORM_block1 length"); + + DW.EmitByte(DW_OP_addr); + DW.EOL("DW_OP_addr"); + DW.EmitReference(Label); } /// SizeOf - Determine size of label value in bytes. /// -unsigned DIEAsIsLabel::SizeOf(const DwarfWriter &DW, unsigned Form) const { - return DW.getAddressSize(); +unsigned DIEObjectLabel::SizeOf(const DwarfWriter &DW, unsigned Form) const { + return sizeof(int8_t) + sizeof(int8_t) + DW.getAddressSize(); } //===----------------------------------------------------------------------===// @@ -774,11 +784,11 @@ DIE::~DIE() { if (Abbrev) delete Abbrev; - for (unsigned i = 0, N = Children.size(); i < N; i++) { + for (unsigned i = 0, N = Children.size(); i < N; ++i) { delete Children[i]; } - for (unsigned j = 0, M = Values.size(); j < M; j++) { + for (unsigned j = 0, M = Values.size(); j < M; ++j) { delete Values[j]; } @@ -817,15 +827,15 @@ void DIE::AddLabel(unsigned Attribute, unsigned Form, const DWLabel &Label) { Abbrev->AddAttribute(Attribute, Form); - Values.push_back(new DIELabel(Label)); + Values.push_back(new DIEDwarfLabel(Label)); } -/// AddAsIsLabel - Add an non-Dwarf label attribute data and value. +/// AddObjectLabel - Add an non-Dwarf label attribute data and value. /// -void DIE::AddAsIsLabel(unsigned Attribute, unsigned Form, - const std::string &Label) { +void DIE::AddObjectLabel(unsigned Attribute, unsigned Form, + const std::string &Label) { Abbrev->AddAttribute(Attribute, Form); - Values.push_back(new DIEAsIsLabel(Label)); + Values.push_back(new DIEObjectLabel(Label)); } /// AddDelta - Add a label delta attribute data and value. @@ -860,67 +870,112 @@ //===----------------------------------------------------------------------===// -/// NewBasicType - Creates a new basic type if necessary, then adds in the +/// NewBasicType - Creates a new basic type if necessary, then adds to the /// context and owner. -DIE *DWContext::NewBasicType(const std::string &Name, unsigned Size, - unsigned Encoding) { - // FIXME - Just a prototype. - DIE *Type = Types[Name]; +DIE *DWContext::NewBasicType(const Type *Ty, unsigned Size, unsigned Align) { + DIE *TypeDie = Types[Ty]; + + char *Name; + unsigned Encoding; // If first occurance of type. - if (!Type) { + if (!TypeDie) { + const char *Name; + unsigned Encoding = 0; + + switch (Ty->getTypeID()) { + case Type::UByteTyID: + Name = "unsigned char"; + Encoding = DW_ATE_unsigned_char; + break; + case Type::SByteTyID: + Name = "char"; + Encoding = DW_ATE_signed_char; + break; + case Type::UShortTyID: + Name = "unsigned short"; + Encoding = DW_ATE_unsigned; + break; + case Type::ShortTyID: + Name = "short"; + Encoding = DW_ATE_signed; + break; + case Type::UIntTyID: + Name = "unsigned int"; + Encoding = DW_ATE_unsigned; + break; + case Type::IntTyID: + Name = "int"; + Encoding = DW_ATE_signed; + break; + case Type::ULongTyID: + Name = "unsigned long long"; + Encoding = DW_ATE_unsigned; + break; + case Type::LongTyID: + Name = "long long"; + Encoding = DW_ATE_signed; + break; + case Type::FloatTyID: + Name = "float"; + Encoding = DW_ATE_float; + break; + case Type::DoubleTyID: + Name = "float"; + Encoding = DW_ATE_float; + break; + default: + // FIXME - handle more complex types. + Name = "unknown"; + Encoding = DW_ATE_address; + break; + } + // construct the type DIE. - Type = new DIE(DW_TAG_base_type, DW_CHILDREN_no); - Type->AddString(DW_AT_name, DW_FORM_string, Name); - Type->AddInt (DW_AT_byte_size, DW_FORM_data1, Size); - Type->AddInt (DW_AT_encoding, DW_FORM_data1, Encoding); - Type->Complete(DW); + TypeDie = new DIE(DW_TAG_base_type, DW_CHILDREN_no); + TypeDie->AddString(DW_AT_name, DW_FORM_string, Name); + TypeDie->AddInt (DW_AT_byte_size, DW_FORM_data1, Size); + TypeDie->AddInt (DW_AT_encoding, DW_FORM_data1, Encoding); + TypeDie->Complete(DW); // Add to context owner. - Owner->AddChild(Type); + Owner->AddChild(TypeDie); // Add to map. - Types[Name] = Type; + Types[Ty] = TypeDie; } - return Type; + return TypeDie; } -/// NewVariable - Creates a basic variable, if necessary, then adds in the -/// context and owner. -DIE *DWContext::NewVariable(const std::string &Name, - unsigned SourceFileID, unsigned Line, - DIE *Type, bool IsExternal) { - // FIXME - Just a prototype. - DIE *Variable = Variables[Name]; +/// NewGlobalVariable - Creates a global variable, if necessary, then adds in +/// the context and owner. +DIE *DWContext::NewGlobalVariable(const std::string &Name, + const std::string &MangledName, + DIE *Type) { + DIE *VariableDie = Variables[MangledName]; // If first occurance of variable. - if (!Variable) { - assert(IsExternal && "Internal variables not handled yet"); - Variable = new DIE(DW_TAG_variable, DW_CHILDREN_no); - Variable->AddString (DW_AT_name, DW_FORM_string, Name); - Variable->AddInt (DW_AT_decl_file, 0, SourceFileID); - Variable->AddInt (DW_AT_decl_line, 0, Line); - Variable->AddDIEntry (DW_AT_type, DW_FORM_ref4, Type); - Variable->AddInt (DW_AT_external, DW_FORM_flag, (int)IsExternal); - // FIXME - needs to be an expression. - Variable->AddAsIsLabel(DW_AT_location, DW_FORM_block1, - std::string("_")+Name+".b"); - Variable->Complete(DW); + if (!VariableDie) { + // FIXME - need source file name line number. + VariableDie = new DIE(DW_TAG_variable, DW_CHILDREN_no); + VariableDie->AddString (DW_AT_name, DW_FORM_string, Name); + VariableDie->AddInt (DW_AT_decl_file, 0, 0); + VariableDie->AddInt (DW_AT_decl_line, 0, 0); + VariableDie->AddDIEntry (DW_AT_type, DW_FORM_ref4, Type); + VariableDie->AddInt (DW_AT_external, DW_FORM_flag, 1); + // FIXME - needs to be a proper expression. + VariableDie->AddObjectLabel(DW_AT_location, DW_FORM_block1, MangledName); + VariableDie->Complete(DW); // Add to context owner. - Owner->AddChild(Variable); + Owner->AddChild(VariableDie); // Add to map. - Variables[Name] = Variable; - - // If external add to visible names. - if (IsExternal) { - DW.NewGlobalEntity(Name, Variable); - } + Variables[MangledName] = VariableDie; } - return Variable; + return VariableDie; } //===----------------------------------------------------------------------===// @@ -1048,7 +1103,7 @@ void DwarfWriter::EmitString(const std::string &String) const { O << Asm->AsciiDirective << "\""; - for (unsigned i = 0, N = String.size(); i < N; i++) { + for (unsigned i = 0, N = String.size(); i < N; ++i) { unsigned char C = String[i]; if (!isascii(C) || iscntrl(C)) { @@ -1134,7 +1189,7 @@ PrintLabelName("set", SetCounter); - SetCounter++; + ++SetCounter; } else { if (AddressSize == sizeof(int32_t)) O << Asm->Data32bitsDirective; @@ -1163,17 +1218,30 @@ /// NewGlobalType - Make the type visible globally using the given name. /// void DwarfWriter::NewGlobalType(const std::string &Name, DIE *Type) { - // FIXME - check for duplication. + assert(!GlobalTypes[Name] && "Duplicate global type"); GlobalTypes[Name] = Type; } /// NewGlobalEntity - Make the entity visible globally using the given name. /// void DwarfWriter::NewGlobalEntity(const std::string &Name, DIE *Entity) { - // FIXME - check for duplication. + assert(!GlobalEntities[Name] && "Duplicate global variable or function"); GlobalEntities[Name] = Entity; } +/// NewGlobalVariable - Add a new global variable DIE to the context. +/// +void DwarfWriter::NewGlobalVariable(DWContext *Context, + const std::string &Name, + const std::string &MangledName, + const Type *Ty, + unsigned Size, unsigned Align) { + // Get the DIE type for the global. + DIE *Type = Context->NewBasicType(Ty, Size, Align); + DIE *Variable = Context->NewGlobalVariable(Name, MangledName, Type); + NewGlobalEntity(Name, Variable); +} + /// NewCompileUnit - Create new compile unit information. /// DIE *DwarfWriter::NewCompileUnit(const std::string &Directory, @@ -1225,6 +1293,7 @@ EmitULEB128Bytes(AbbrevID); EOL(std::string("Abbrev [" + utostr(AbbrevID) + + "] " + TagString(Abbrev.getTag())) + " "); @@ -1232,7 +1301,7 @@ const std::vector &AbbrevData = Abbrev.getData(); // Emit the DIE attribute values. - for (unsigned i = 0, N = Values.size(); i < N; i++) { + for (unsigned i = 0, N = Values.size(); i < N; ++i) { unsigned Attr = AbbrevData[i].getAttribute(); unsigned Form = AbbrevData[i].getForm(); assert(Form && "Too many attributes for DIE (check abbreviation)"); @@ -1256,7 +1325,7 @@ if (Abbrev.getChildrenFlag() == DW_CHILDREN_yes) { const std::vector &Children = Die->getChildren(); - for (unsigned j = 0, M = Children.size(); j < M; j++) { + for (unsigned j = 0, M = Children.size(); j < M; ++j) { // FIXME - handle sibling offsets. // FIXME - handle all DIE types. EmitDIE(Children[j]); @@ -1283,7 +1352,7 @@ const std::vector &AbbrevData = Abbrev.getData(); // Emit the DIE attribute values. - for (unsigned i = 0, N = Values.size(); i < N; i++) { + for (unsigned i = 0, N = Values.size(); i < N; ++i) { // Size attribute value. Offset += Values[i]->SizeOf(*this, AbbrevData[i].getForm()); } @@ -1292,7 +1361,7 @@ if (Abbrev.getChildrenFlag() == DW_CHILDREN_yes) { const std::vector &Children = Die->getChildren(); - for (unsigned j = 0, M = Children.size(); j < M; j++) { + for (unsigned j = 0, M = Children.size(); j < M; ++j) { // FIXME - handle sibling offsets. // FIXME - handle all DIE types. Offset = SizeAndOffsetDie(Children[j], Offset); @@ -1316,7 +1385,7 @@ sizeof(int8_t); // Pointer Size (in bytes) // Process each compile unit. - for (unsigned i = 0, N = CompileUnits.size(); i < N; i++) { + for (unsigned i = 0, N = CompileUnits.size(); i < N; ++i) { Offset = SizeAndOffsetDie(CompileUnits[i], Offset); } } @@ -1348,7 +1417,7 @@ EmitByte(AddressSize); EOL("Address Size (in bytes)"); // Process each compile unit. - for (unsigned i = 0; i < N; i++) { + for (unsigned i = 0; i < N; ++i) { EmitDIE(CompileUnits[i]); } @@ -1368,7 +1437,7 @@ // For each abbrevation. for (unsigned AbbrevID = 1, NAID = Abbreviations.size(); - AbbrevID <= NAID; AbbrevID++) { + AbbrevID <= NAID; ++AbbrevID) { // Get abbreviation data const DIEAbbrev &Abbrev = Abbreviations[AbbrevID]; @@ -1432,14 +1501,14 @@ // Emit directories. for (unsigned DirectoryID = 1, NDID = Directories.size(); - DirectoryID <= NDID; DirectoryID++) { + DirectoryID <= NDID; ++DirectoryID) { EmitString(Directories[DirectoryID]); EOL("Directory"); } EmitByte(0); EOL("End of directories"); // Emit files. for (unsigned SourceID = 1, NSID = SourceFiles.size(); - SourceID <= NSID; SourceID++) { + SourceID <= NSID; ++SourceID) { const SourceFileInfo &SourceFile = SourceFiles[SourceID]; EmitString(SourceFile.getName()); EOL("Source"); EmitULEB128Bytes(SourceFile.getDirectoryID()); EOL("Directory #"); @@ -1458,7 +1527,7 @@ unsigned Line = 1; // Construct rows of the address, source, line, column matrix. - for (unsigned i = 0, N = LineInfos.size(); i < N; i++) { + for (unsigned i = 0, N = LineInfos.size(); i < N; ++i) { SourceLineInfo *LineInfo = LineInfos[i]; // Define the line address. @@ -1533,11 +1602,11 @@ EmitDifference("info_end", 0, "info_begin", 0); EOL("Compilation Unit Length"); - for (std::map::iterator G = GlobalTypes.begin(), - GE = GlobalTypes.begin(); - G != GE; G++) { - const std::string &Name = (*G).first; - DIE * Entity = (*G).second; + for (std::map::iterator GI = GlobalEntities.begin(), + GE = GlobalEntities.end(); + GI != GE; ++GI) { + const std::string &Name = GI->first; + DIE * Entity = GI->second; EmitLong(Entity->getOffset()); EOL("DIE offset"); EmitString(Name); EOL("External Name"); @@ -1569,7 +1638,7 @@ // For each of strings in teh string pool. for (unsigned StringID = 1, N = StringPool.size(); - StringID <= N; StringID++) { + StringID <= N; ++StringID) { // Emit a label for reference from debug information entries. EmitLabel("string", StringID); // Emit the string itself. @@ -1630,6 +1699,63 @@ Asm->SwitchSection(DwarfMacInfoSection, 0); } +/// ConstructCompileUnitDIEs - Create a compile unit DIE for each source and +/// header file. +void DwarfWriter::ConstructCompileUnitDIEs() { + // Get directory and source information. + const UniqueVector &Directories = DebugInfo->getDirectories(); + const UniqueVector &SourceFiles = DebugInfo->getSourceFiles(); + + // Construct compile unit DIEs for each source. + for (unsigned SourceID = 1, NSID = SourceFiles.size(); + SourceID <= NSID; ++SourceID) { + const SourceFileInfo &SourceFile = SourceFiles[SourceID]; + const std::string &Directory = Directories[SourceFile.getDirectoryID()]; + const std::string &SourceName = SourceFile.getName(); + DIE *Unit = NewCompileUnit(Directory, SourceName); + DWContext *Context = new DWContext(*this, NULL, Unit); + CompileUnits.push_back(Unit); + } +} + +/// ConstructGlobalDIEs - Create DIEs for each of the externally visible global +/// variables. +void DwarfWriter::ConstructGlobalDIEs(Module &M) { + const TargetData &TD = Asm->TM.getTargetData(); + + // Iterate throu each of the globals. + for (Module::const_global_iterator GI = M.global_begin(), GE = M.global_end(); + GI != GE; ++GI) { + if (!GI->hasInitializer()) continue; // External global require no code + + // Check to see if this is a special global used by LLVM, if so, emit it. + if (GI->hasAppendingLinkage() && (GI->getName() == "llvm.global_ctors" || + GI->getName() == "llvm.global_dtors")) + continue; + + std::string Name = Asm->Mang->getValueName(GI); + Constant *C = GI->getInitializer(); + const Type *Ty = C->getType(); + unsigned Size = TD.getTypeSize(Ty); + unsigned Align = TD.getTypeAlignmentShift(Ty); + + if (C->isNullValue() && /* FIXME: Verify correct */ + (GI->hasInternalLinkage() || GI->hasWeakLinkage() || + GI->hasLinkOnceLinkage())) { + if (Size == 0) Size = 1; // .comm Foo, 0 is undefined, avoid it. + + } + + /// FIXME - Get correct compile unit context. + assert(CompileUnits.size() && "No compile units"); + DWContext *Context = CompileUnits[0]->getContext(); + + /// Create new global. + NewGlobalVariable(Context, GI->getName(), Name, Ty, Size, Align); + } +} + + /// ShouldEmitDwarf - Determine if Dwarf declarations should be made. /// bool DwarfWriter::ShouldEmitDwarf() { @@ -1649,52 +1775,52 @@ //===----------------------------------------------------------------------===// // Main entry points. // - - DwarfWriter::DwarfWriter(std::ostream &o, AsmPrinter *ap) - : O(o) - , Asm(ap) - , DebugInfo(NULL) - , didInitial(false) - , CompileUnits() - , Abbreviations() - , GlobalTypes() - , GlobalEntities() - , StringPool() - , AddressSize(sizeof(int32_t)) - , hasLEB128(false) - , hasDotLoc(false) - , hasDotFile(false) - , needsSet(false) - , DwarfAbbrevSection(".debug_abbrev") - , DwarfInfoSection(".debug_info") - , DwarfLineSection(".debug_line") - , DwarfFrameSection(".debug_frame") - , DwarfPubNamesSection(".debug_pubnames") - , DwarfPubTypesSection(".debug_pubtypes") - , DwarfStrSection(".debug_str") - , DwarfLocSection(".debug_loc") - , DwarfARangesSection(".debug_aranges") - , DwarfRangesSection(".debug_ranges") - , DwarfMacInfoSection(".debug_macinfo") - , TextSection(".text") - , DataSection(".data") - {} - DwarfWriter::~DwarfWriter() { - for (unsigned i = 0, N = CompileUnits.size(); i < N; i++) { - delete CompileUnits[i]; - } + +DwarfWriter::DwarfWriter(std::ostream &OS, AsmPrinter *A) +: O(OS) +, Asm(A) +, DebugInfo(NULL) +, didInitial(false) +, CompileUnits() +, Abbreviations() +, GlobalTypes() +, GlobalEntities() +, StringPool() +, AddressSize(sizeof(int32_t)) +, hasLEB128(false) +, hasDotLoc(false) +, hasDotFile(false) +, needsSet(false) +, DwarfAbbrevSection(".debug_abbrev") +, DwarfInfoSection(".debug_info") +, DwarfLineSection(".debug_line") +, DwarfFrameSection(".debug_frame") +, DwarfPubNamesSection(".debug_pubnames") +, DwarfPubTypesSection(".debug_pubtypes") +, DwarfStrSection(".debug_str") +, DwarfLocSection(".debug_loc") +, DwarfARangesSection(".debug_aranges") +, DwarfRangesSection(".debug_ranges") +, DwarfMacInfoSection(".debug_macinfo") +, TextSection(".text") +, DataSection(".data") +{} +DwarfWriter::~DwarfWriter() { + for (unsigned i = 0, N = CompileUnits.size(); i < N; ++i) { + delete CompileUnits[i]; } +} /// BeginModule - Emit all Dwarf sections that should come prior to the content. /// -void DwarfWriter::BeginModule() { +void DwarfWriter::BeginModule(Module &M) { if (!ShouldEmitDwarf()) return; EOL("Dwarf Begin Module"); } /// EndModule - Emit all Dwarf sections that should come after the content. /// -void DwarfWriter::EndModule() { +void DwarfWriter::EndModule(Module &M) { if (!ShouldEmitDwarf()) return; EOL("Dwarf End Module"); @@ -1704,27 +1830,11 @@ Asm->SwitchSection(DataSection, 0); EmitLabel("data_end", 0); - // Get directory and source information. - const UniqueVector &Directories = DebugInfo->getDirectories(); - const UniqueVector &SourceFiles = DebugInfo->getSourceFiles(); - - // Construct compile unit DIEs for each source. - for (unsigned SourceID = 1, NSID = SourceFiles.size(); - SourceID <= NSID; SourceID++) { - const SourceFileInfo &SourceFile = SourceFiles[SourceID]; - const std::string &Directory = Directories[SourceFile.getDirectoryID()]; - const std::string &SourceName = SourceFile.getName(); - DIE *Unit = NewCompileUnit(Directory, SourceName); - -#if 0 - // FIXME - just testing. - DWContext *Context = new DWContext(*this, Unit); - DIE *TypeInt = Context->NewBasicType("int", sizeof(int32_t), DW_ATE_signed); - Context->NewVariable("MyGlobal", SourceID, 1, TypeInt, true); -#endif - - CompileUnits.push_back(Unit); - } + // Create all the compile unit DIEs. + ConstructCompileUnitDIEs(); + + // Create DIEs for each of the externally visible global variables. + ConstructGlobalDIEs(M); // Compute DIE offsets and sizes. SizeAndOffsets(); @@ -1765,14 +1875,14 @@ /// BeginFunction - Gather pre-function debug information. /// -void DwarfWriter::BeginFunction() { +void DwarfWriter::BeginFunction(MachineFunction &MF) { if (!ShouldEmitDwarf()) return; EOL("Dwarf Begin Function"); } /// EndFunction - Gather and emit post-function debug information. /// -void DwarfWriter::EndFunction() { +void DwarfWriter::EndFunction(MachineFunction &MF) { if (!ShouldEmitDwarf()) return; EOL("Dwarf End Function"); } From jlaskey at apple.com Mon Jan 23 18:49:31 2006 From: jlaskey at apple.com (Jim Laskey) Date: Mon, 23 Jan 2006 18:49:31 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp Message-ID: <200601240049.SAA04359@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/PowerPC: PPCAsmPrinter.cpp updated: 1.141 -> 1.142 --- Log message: Crude Dwarf global variable debugging. --- Diffs of the changes: (+4 -4) PPCAsmPrinter.cpp | 8 ++++---- 1 files changed, 4 insertions(+), 4 deletions(-) Index: llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp diff -u llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.141 llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.142 --- llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.141 Sun Jan 22 17:37:17 2006 +++ llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp Mon Jan 23 18:49:18 2006 @@ -438,7 +438,7 @@ O << "\n\n"; // Emit pre-function debug information. - DW.BeginFunction(); + DW.BeginFunction(MF); // Print out constants referenced by the function EmitConstantPool(MF.getConstantPool()); @@ -486,7 +486,7 @@ } // Emit post-function debug information. - DW.EndFunction(); + DW.EndFunction(MF); // We didn't modify anything. return false; @@ -502,7 +502,7 @@ Mang->setUseQuotes(true); // Emit initial debug information. - DW.BeginModule(); + DW.BeginModule(M); return false; } @@ -619,7 +619,7 @@ } // Emit initial debug information. - DW.EndModule(); + DW.EndModule(M); // Funny Darwin hack: This flag tells the linker that no global symbols // contain code that falls through to other global symbols (e.g. the obvious From lattner at cs.uiuc.edu Mon Jan 23 22:12:52 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon, 23 Jan 2006 22:12:52 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/InlineAsm.h Value.h Module.h Message-ID: <200601240412.WAA05531@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm: InlineAsm.h added (r1.1) Value.h updated: 1.81 -> 1.82 Module.h updated: 1.67 -> 1.68 --- Log message: Initial checkin of the InlineAsm class --- Diffs of the changes: (+139 -18) InlineAsm.h | 89 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Module.h | 65 ++++++++++++++++++++++++++++++++----------- Value.h | 3 +- 3 files changed, 139 insertions(+), 18 deletions(-) Index: llvm/include/llvm/InlineAsm.h diff -c /dev/null llvm/include/llvm/InlineAsm.h:1.1 *** /dev/null Mon Jan 23 22:12:50 2006 --- llvm/include/llvm/InlineAsm.h Mon Jan 23 22:12:40 2006 *************** *** 0 **** --- 1,89 ---- + //===-- llvm/InlineAsm.h - Class to represent inline asm strings-*- C++ -*-===// + // + // The LLVM Compiler Infrastructure + // + // This file was developed by Chris Lattner and is distributed under + // the University of Illinois Open Source License. See LICENSE.TXT for details. + // + //===----------------------------------------------------------------------===// + // + // This class represents the inline asm strings, which are Value*'s that are + // used as the callee operand of call instructions. + // + //===----------------------------------------------------------------------===// + + #ifndef LLVM_INLINEASM_H + #define LLVM_INLINEASM_H + + #include "llvm/Value.h" + + namespace llvm { + + class AssemblyAnnotationWriter; + class PointerType; + class FunctionType; + class Module; + template struct ilist_traits; + template class SymbolTableListTraits; + + class InlineAsm : public Value { + friend class SymbolTableListTraits >; + InlineAsm(const InlineAsm &); // do not implement + void operator=(const InlineAsm&); // do not implement + + void setParent(Module *Parent); + InlineAsm *Prev, *Next; + void setNext(InlineAsm *N) { Next = N; } + void setPrev(InlineAsm *N) { Prev = N; } + InlineAsm *getNext() { return Next; } + const InlineAsm *getNext() const { return Next; } + InlineAsm *getPrev() { return Prev; } + const InlineAsm *getPrev() const { return Prev; } + + Module *Parent; + std::string AsmString, Constraints; + bool AsmHasSideEffects; + public: + InlineAsm(const FunctionType *Ty, const std::string &AsmString, + const std::string &Constraints, bool hasSideEffects, + const std::string &Name = "", Module *ParentModule = 0); + + bool getHasSideEffects() const { return AsmHasSideEffects; } + void setSideEffects(bool X) { AsmHasSideEffects = X; } + + /// getType - InlineAsm's are always pointers. + /// + const PointerType *getType() const { + return reinterpret_cast(Value::getType()); + } + + /// getFunctionType - InlineAsm's are always pointers to functions. + /// + const FunctionType *getFunctionType() const; + + /// getParent - Get the module that this global value is contained inside + /// of... + Module *getParent() { return Parent; } + const Module *getParent() const { return Parent; } + + + /// removeFromParent/eraseFromParent - Unlink and unlink/delete this object + /// from the module it is embedded into. + void removeFromParent(); + void eraseFromParent(); + + virtual void print(std::ostream &O) const { print(O, 0); } + void print(std::ostream &OS, AssemblyAnnotationWriter *AAW) const; + + // Methods for support type inquiry through isa, cast, and dyn_cast: + static inline bool classof(const InlineAsm *) { return true; } + static inline bool classof(const Value *V) { + return V->getValueType() == Value::InlineAsmVal; + } + }; + + } // End llvm namespace + + #endif Index: llvm/include/llvm/Value.h diff -u llvm/include/llvm/Value.h:1.81 llvm/include/llvm/Value.h:1.82 --- llvm/include/llvm/Value.h:1.81 Tue Jan 10 03:45:57 2006 +++ llvm/include/llvm/Value.h Mon Jan 23 22:12:40 2006 @@ -155,6 +155,7 @@ ConstantStructVal, // This is an instance of ConstantStruct ConstantPackedVal, // This is an instance of ConstantPacked ConstantPointerNullVal, // This is an instance of ConstantPointerNull + InlineAsmVal, // This is an instance of InlineAsm InstructionVal, // This is an instance of Instruction // Markers: @@ -166,7 +167,7 @@ } // Methods for support type inquiry through isa, cast, and dyn_cast: - static inline bool classof(const Value * /*V*/) { + static inline bool classof(const Value *) { return true; // Values are always values. } Index: llvm/include/llvm/Module.h diff -u llvm/include/llvm/Module.h:1.67 llvm/include/llvm/Module.h:1.68 --- llvm/include/llvm/Module.h:1.67 Mon Jan 23 17:02:28 2006 +++ llvm/include/llvm/Module.h Mon Jan 23 22:12:40 2006 @@ -21,6 +21,7 @@ #include "llvm/Function.h" #include "llvm/GlobalVariable.h" +#include "llvm/InlineAsm.h" #include "llvm/ADT/SetVector.h" #include "llvm/Support/DataTypes.h" @@ -45,11 +46,19 @@ static void destroySentinel(GlobalVariable *GV) { delete GV; } static iplist &getList(Module *M); }; +template<> struct ilist_traits +: public SymbolTableListTraits { + // createSentinel is used to create a node that marks the end of the list. + static InlineAsm *createSentinel(); + static void destroySentinel(InlineAsm *GV) { delete GV; } + static iplist &getList(Module *M); +}; class Module { public: typedef iplist GlobalListType; typedef iplist FunctionListType; + typedef iplist InlineAsmListType; typedef SetVector LibraryListType; // Global Variable iterators. @@ -60,6 +69,10 @@ typedef FunctionListType::iterator iterator; typedef FunctionListType::const_iterator const_iterator; + // Inline Asm iterators. + typedef InlineAsmListType::iterator inlineasm_iterator; + typedef InlineAsmListType::const_iterator const_inlineasm_iterator; + // Library list iterators. typedef LibraryListType::const_iterator lib_iterator; @@ -69,6 +82,7 @@ private: GlobalListType GlobalList; // The Global Variables in the module FunctionListType FunctionList; // The Functions in the module + InlineAsmListType InlineAsmList; // The inline asm objects in the module. LibraryListType LibraryList; // The Libraries needed by the module std::string GlobalScopeAsm; // Inline Asm at global scope. SymbolTable *SymTab; // Symbol Table for the module @@ -98,8 +112,8 @@ void setPointerSize(PointerSize PS) { PtrSize = PS; } // Access to any module-scope inline asm blocks. - const std::string &getInlineAsm() const { return GlobalScopeAsm; } - void setInlineAsm(const std::string &Asm) { GlobalScopeAsm = Asm; } + const std::string &getModuleInlineAsm() const { return GlobalScopeAsm; } + void setModuleInlineAsm(const std::string &Asm) { GlobalScopeAsm = Asm; } //===--------------------------------------------------------------------===// // Methods for easy access to the functions in the module. @@ -174,17 +188,19 @@ // table. // - /// Get the underlying elements of the Module... - inline const GlobalListType &getGlobalList() const { return GlobalList; } - inline GlobalListType &getGlobalList() { return GlobalList; } - inline const FunctionListType &getFunctionList() const { return FunctionList;} - inline FunctionListType &getFunctionList() { return FunctionList;} + // Get the underlying elements of the Module. + const GlobalListType &getGlobalList() const { return GlobalList; } + GlobalListType &getGlobalList() { return GlobalList; } + const FunctionListType &getFunctionList() const { return FunctionList; } + FunctionListType &getFunctionList() { return FunctionList; } + const InlineAsmListType &getInlineAsmList() const { return InlineAsmList; } + InlineAsmListType &getInlineAsmList() { return InlineAsmList; } /// getSymbolTable() - Get access to the symbol table for the module, where /// global variables and functions are identified. /// - inline SymbolTable &getSymbolTable() { return *SymTab; } - inline const SymbolTable &getSymbolTable() const { return *SymTab; } + SymbolTable &getSymbolTable() { return *SymTab; } + const SymbolTable &getSymbolTable() const { return *SymTab; } //===--------------------------------------------------------------------===// @@ -198,14 +214,29 @@ bool global_empty() const { return GlobalList.empty(); } // FunctionList interface - inline iterator begin() { return FunctionList.begin(); } - inline const_iterator begin() const { return FunctionList.begin(); } - inline iterator end () { return FunctionList.end(); } - inline const_iterator end () const { return FunctionList.end(); } - - inline size_t size() const { return FunctionList.size(); } - inline bool empty() const { return FunctionList.empty(); } - + iterator begin() { return FunctionList.begin(); } + const_iterator begin() const { return FunctionList.begin(); } + iterator end () { return FunctionList.end(); } + const_iterator end () const { return FunctionList.end(); } + + size_t size() const { return FunctionList.size(); } + bool empty() const { return FunctionList.empty(); } + + // Inline Asm list interface + inlineasm_iterator inlineasm_begin() { + return InlineAsmList.begin(); + } + const_inlineasm_iterator inlineasm_begin() const { + return InlineAsmList.begin(); + } + inlineasm_iterator inlineasm_end() { + return InlineAsmList.end(); + } + const_inlineasm_iterator inlineasm_end() const { + return InlineAsmList.end(); + } + bool inlineasm_empty() const { return InlineAsmList.empty(); } + //===--------------------------------------------------------------------===// // List of dependent library access functions From lattner at cs.uiuc.edu Mon Jan 23 22:13:23 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon, 23 Jan 2006 22:13:23 -0600 Subject: [llvm-commits] CVS: llvm/lib/VMCore/InlineAsm.cpp AsmWriter.cpp Globals.cpp Module.cpp Message-ID: <200601240413.WAA05570@zion.cs.uiuc.edu> Changes in directory llvm/lib/VMCore: InlineAsm.cpp added (r1.1) AsmWriter.cpp updated: 1.188 -> 1.189 Globals.cpp updated: 1.12 -> 1.13 Module.cpp updated: 1.62 -> 1.63 --- Log message: Initial checkin of the InlineAsm class --- Diffs of the changes: (+80 -5) AsmWriter.cpp | 12 ++++++++++-- Globals.cpp | 4 ++-- InlineAsm.cpp | 50 ++++++++++++++++++++++++++++++++++++++++++++++++++ Module.cpp | 19 ++++++++++++++++++- 4 files changed, 80 insertions(+), 5 deletions(-) Index: llvm/lib/VMCore/InlineAsm.cpp diff -c /dev/null llvm/lib/VMCore/InlineAsm.cpp:1.1 *** /dev/null Mon Jan 23 22:13:21 2006 --- llvm/lib/VMCore/InlineAsm.cpp Mon Jan 23 22:13:11 2006 *************** *** 0 **** --- 1,50 ---- + //===-- InlineAsm.cpp - Implement the InlineAsm class ---------------------===// + // + // The LLVM Compiler Infrastructure + // + // This file was developed by Chris Lattner and is distributed under the + // University of Illinois Open Source License. See LICENSE.TXT for details. + // + //===----------------------------------------------------------------------===// + // + // This file implements the InlineAsm class. + // + //===----------------------------------------------------------------------===// + + #include "llvm/InlineAsm.h" + #include "llvm/DerivedTypes.h" + #include "llvm/Module.h" + #include "llvm/Support/LeakDetector.h" + using namespace llvm; + + InlineAsm::InlineAsm(const FunctionType *Ty, const std::string &asmString, + const std::string &constraints, bool hasSideEffects, + const std::string &name, Module *ParentModule) + : Value(PointerType::get(Ty), Value::InlineAsmVal, name), + Parent(0), AsmString(asmString), Constraints(constraints), + AsmHasSideEffects(hasSideEffects) { + LeakDetector::addGarbageObject(this); + + if (ParentModule) + ParentModule->getInlineAsmList().push_back(this); + } + + const FunctionType *InlineAsm::getFunctionType() const { + return cast(getType()->getElementType()); + } + + void InlineAsm::setParent(Module *parent) { + if (getParent()) + LeakDetector::addGarbageObject(this); + Parent = parent; + if (getParent()) + LeakDetector::removeGarbageObject(this); + } + + void InlineAsm::removeFromParent() { + getParent()->getInlineAsmList().remove(this); + } + + void InlineAsm::eraseFromParent() { + getParent()->getInlineAsmList().erase(this); + } Index: llvm/lib/VMCore/AsmWriter.cpp diff -u llvm/lib/VMCore/AsmWriter.cpp:1.188 llvm/lib/VMCore/AsmWriter.cpp:1.189 --- llvm/lib/VMCore/AsmWriter.cpp:1.188 Mon Jan 23 18:45:30 2006 +++ llvm/lib/VMCore/AsmWriter.cpp Mon Jan 23 22:13:11 2006 @@ -775,9 +775,9 @@ if (!M->getTargetTriple().empty()) Out << "target triple = \"" << M->getTargetTriple() << "\"\n"; - if (!M->getInlineAsm().empty()) { + if (!M->getModuleInlineAsm().empty()) { // Split the string into lines, to make it easier to read the .ll file. - std::string Asm = M->getInlineAsm(); + std::string Asm = M->getModuleInlineAsm(); size_t CurPos = 0; size_t NewLine = Asm.find_first_of('\n', CurPos); while (NewLine != std::string::npos) { @@ -1269,6 +1269,14 @@ W.write(this); } +void InlineAsm::print(std::ostream &o, AssemblyAnnotationWriter *AAW) const { + SlotMachine SlotTable(getParent()); + AssemblyWriter W(o, SlotTable, getParent(), AAW); + + assert(0 && "Inline asm printing unimplemented!"); + //W.write(this); +} + void BasicBlock::print(std::ostream &o, AssemblyAnnotationWriter *AAW) const { SlotMachine SlotTable(getParent()); AssemblyWriter W(o, SlotTable, Index: llvm/lib/VMCore/Globals.cpp diff -u llvm/lib/VMCore/Globals.cpp:1.12 llvm/lib/VMCore/Globals.cpp:1.13 --- llvm/lib/VMCore/Globals.cpp:1.12 Tue Oct 4 13:13:04 2005 +++ llvm/lib/VMCore/Globals.cpp Mon Jan 23 22:13:11 2006 @@ -1,4 +1,4 @@ -//===-- Globals.cpp - Implement the Global object classes -----------------===// +//===-- Globals.cpp - Implement the GlobalValue & GlobalVariable class ----===// // // The LLVM Compiler Infrastructure // @@ -12,8 +12,8 @@ // //===----------------------------------------------------------------------===// -#include "llvm/DerivedTypes.h" #include "llvm/GlobalVariable.h" +#include "llvm/DerivedTypes.h" #include "llvm/Module.h" #include "llvm/SymbolTable.h" #include "llvm/Support/LeakDetector.h" Index: llvm/lib/VMCore/Module.cpp diff -u llvm/lib/VMCore/Module.cpp:1.62 llvm/lib/VMCore/Module.cpp:1.63 --- llvm/lib/VMCore/Module.cpp:1.62 Sun Dec 4 23:30:21 2005 +++ llvm/lib/VMCore/Module.cpp Mon Jan 23 22:13:11 2006 @@ -44,17 +44,30 @@ return Ret; } +InlineAsm *ilist_traits::createSentinel() { + InlineAsm *Ret = new InlineAsm(FunctionType::get(Type::VoidTy, + std::vector(), false), "", "", + false); + // This should not be garbage monitored. + LeakDetector::removeGarbageObject(Ret); + return Ret; +} + iplist &ilist_traits::getList(Module *M) { return M->getFunctionList(); } iplist &ilist_traits::getList(Module *M) { return M->getGlobalList(); } +iplist &ilist_traits::getList(Module *M) { + return M->getInlineAsmList(); +} // Explicit instantiations of SymbolTableListTraits since some of the methods -// are not in the public header file... +// are not in the public header file. template class SymbolTableListTraits; template class SymbolTableListTraits; +template class SymbolTableListTraits; //===----------------------------------------------------------------------===// // Primitive Module methods. @@ -66,6 +79,8 @@ FunctionList.setParent(this); GlobalList.setItemParent(this); GlobalList.setParent(this); + InlineAsmList.setItemParent(this); + InlineAsmList.setParent(this); SymTab = new SymbolTable(); } @@ -75,6 +90,8 @@ GlobalList.setParent(0); FunctionList.clear(); FunctionList.setParent(0); + InlineAsmList.clear(); + InlineAsmList.setParent(0); LibraryList.clear(); delete SymTab; } From lattner at cs.uiuc.edu Mon Jan 23 22:14:43 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon, 23 Jan 2006 22:14:43 -0600 Subject: [llvm-commits] CVS: llvm/lib/Linker/LinkModules.cpp Message-ID: <200601240414.WAA05652@zion.cs.uiuc.edu> Changes in directory llvm/lib/Linker: LinkModules.cpp updated: 1.110 -> 1.111 --- Log message: Rename method --- Diffs of the changes: (+5 -4) LinkModules.cpp | 9 +++++---- 1 files changed, 5 insertions(+), 4 deletions(-) Index: llvm/lib/Linker/LinkModules.cpp diff -u llvm/lib/Linker/LinkModules.cpp:1.110 llvm/lib/Linker/LinkModules.cpp:1.111 --- llvm/lib/Linker/LinkModules.cpp:1.110 Mon Jan 23 17:08:37 2006 +++ llvm/lib/Linker/LinkModules.cpp Mon Jan 23 22:14:29 2006 @@ -833,11 +833,12 @@ Dest->getTargetTriple() != Src->getTargetTriple()) std::cerr << "WARNING: Linking two modules of different target triples!\n"; - if (!Src->getInlineAsm().empty()) { - if (Dest->getInlineAsm().empty()) - Dest->setInlineAsm(Src->getInlineAsm()); + if (!Src->getModuleInlineAsm().empty()) { + if (Dest->getModuleInlineAsm().empty()) + Dest->setModuleInlineAsm(Src->getModuleInlineAsm()); else - Dest->setInlineAsm(Dest->getInlineAsm()+"\n"+Src->getInlineAsm()); + Dest->setModuleInlineAsm(Dest->getModuleInlineAsm()+"\n"+ + Src->getModuleInlineAsm()); } // Update the destination module's dependent libraries list with the libraries From lattner at cs.uiuc.edu Mon Jan 23 22:14:43 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon, 23 Jan 2006 22:14:43 -0600 Subject: [llvm-commits] CVS: llvm/lib/Bytecode/Writer/Writer.cpp Message-ID: <200601240414.WAA05658@zion.cs.uiuc.edu> Changes in directory llvm/lib/Bytecode/Writer: Writer.cpp updated: 1.117 -> 1.118 --- Log message: Rename method --- Diffs of the changes: (+1 -1) Writer.cpp | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/Bytecode/Writer/Writer.cpp diff -u llvm/lib/Bytecode/Writer/Writer.cpp:1.117 llvm/lib/Bytecode/Writer/Writer.cpp:1.118 --- llvm/lib/Bytecode/Writer/Writer.cpp:1.117 Mon Jan 23 17:43:17 2006 +++ llvm/lib/Bytecode/Writer/Writer.cpp Mon Jan 23 22:14:29 2006 @@ -1032,7 +1032,7 @@ output(SectionNames[i]); // Output the inline asm string. - output(M->getInlineAsm()); + output(M->getModuleInlineAsm()); } void BytecodeWriter::outputInstructions(const Function *F) { From lattner at cs.uiuc.edu Mon Jan 23 22:14:43 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon, 23 Jan 2006 22:14:43 -0600 Subject: [llvm-commits] CVS: llvm/lib/Bytecode/Reader/Reader.cpp Message-ID: <200601240414.WAA05657@zion.cs.uiuc.edu> Changes in directory llvm/lib/Bytecode/Reader: Reader.cpp updated: 1.183 -> 1.184 --- Log message: Rename method --- Diffs of the changes: (+1 -1) Reader.cpp | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/Bytecode/Reader/Reader.cpp diff -u llvm/lib/Bytecode/Reader/Reader.cpp:1.183 llvm/lib/Bytecode/Reader/Reader.cpp:1.184 --- llvm/lib/Bytecode/Reader/Reader.cpp:1.183 Mon Jan 23 17:43:17 2006 +++ llvm/lib/Bytecode/Reader/Reader.cpp Mon Jan 23 22:14:29 2006 @@ -2111,7 +2111,7 @@ // If the file has module-level inline asm, read it now. if (!hasAlignment && At != BlockEnd) - TheModule->setInlineAsm(read_str()); + TheModule->setModuleInlineAsm(read_str()); } // If any globals are in specified sections, assign them now. From lattner at cs.uiuc.edu Mon Jan 23 22:14:43 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon, 23 Jan 2006 22:14:43 -0600 Subject: [llvm-commits] CVS: llvm/lib/AsmParser/Lexer.cpp llvmAsmParser.cpp llvmAsmParser.h llvmAsmParser.y Message-ID: <200601240414.WAA05648@zion.cs.uiuc.edu> Changes in directory llvm/lib/AsmParser: Lexer.cpp updated: 1.16 -> 1.17 llvmAsmParser.cpp updated: 1.33 -> 1.34 llvmAsmParser.h updated: 1.17 -> 1.18 llvmAsmParser.y updated: 1.247 -> 1.248 --- Log message: Rename method --- Diffs of the changes: (+1177 -1138) Lexer.cpp | 878 ++++++++++++++++++----------------- llvmAsmParser.cpp | 1326 ++++++++++++++++++++++++++++-------------------------- llvmAsmParser.h | 81 +-- llvmAsmParser.y | 6 4 files changed, 1177 insertions(+), 1114 deletions(-) Index: llvm/lib/AsmParser/Lexer.cpp diff -u llvm/lib/AsmParser/Lexer.cpp:1.16 llvm/lib/AsmParser/Lexer.cpp:1.17 --- llvm/lib/AsmParser/Lexer.cpp:1.16 Mon Jan 23 17:05:42 2006 +++ llvm/lib/AsmParser/Lexer.cpp Mon Jan 23 22:14:29 2006 @@ -20,7 +20,7 @@ /* A lexical scanner generated by flex */ /* Scanner skeleton version: - * $Header: /home/vadve/shared/PublicCVS/llvm/lib/AsmParser/Lexer.cpp,v 1.16 2006/01/23 23:05:42 lattner Exp $ + * $Header: /home/vadve/shared/PublicCVS/llvm/lib/AsmParser/Lexer.cpp,v 1.17 2006/01/24 04:14:29 lattner Exp $ */ #define FLEX_SCANNER @@ -308,33 +308,33 @@ *yy_cp = '\0'; \ yy_c_buf_p = yy_cp; -#define YY_NUM_RULES 104 -#define YY_END_OF_BUFFER 105 -static yyconst short int yy_acclist[182] = +#define YY_NUM_RULES 105 +#define YY_END_OF_BUFFER 106 +static yyconst short int yy_acclist[183] = { 0, - 105, 103, 104, 102, 103, 104, 102, 104, 103, 104, - 103, 104, 103, 104, 103, 104, 103, 104, 103, 104, - 95, 103, 104, 95, 103, 104, 1, 103, 104, 103, - 104, 103, 104, 103, 104, 103, 104, 103, 104, 103, - 104, 103, 104, 103, 104, 103, 104, 103, 104, 103, - 104, 103, 104, 103, 104, 103, 104, 103, 104, 103, - 104, 103, 104, 103, 104, 103, 104, 103, 104, 103, - 104, 94, 92, 91, 91, 98, 96, 100, 95, 1, - 78, 35, 60, 20, 94, 91, 91, 99, 100, 17, - 100, 101, 54, 59, 34, 30, 36, 57, 3, 45, - - 56, 22, 68, 58, 77, 72, 73, 55, 61, 93, - 100, 100, 40, 69, 70, 85, 86, 47, 19, 97, - 23, 4, 52, 46, 39, 11, 100, 32, 2, 5, - 49, 51, 41, 63, 67, 65, 66, 64, 62, 43, - 87, 42, 48, 18, 75, 84, 38, 50, 27, 21, - 37, 7, 80, 29, 83, 53, 71, 79, 24, 25, - 81, 44, 76, 74, 6, 26, 33, 8, 14, 9, - 10, 31, 12, 28, 82, 88, 90, 13, 89, 15, - 16 + 106, 104, 105, 103, 104, 105, 103, 105, 104, 105, + 104, 105, 104, 105, 104, 105, 104, 105, 104, 105, + 96, 104, 105, 96, 104, 105, 1, 104, 105, 104, + 105, 104, 105, 104, 105, 104, 105, 104, 105, 104, + 105, 104, 105, 104, 105, 104, 105, 104, 105, 104, + 105, 104, 105, 104, 105, 104, 105, 104, 105, 104, + 105, 104, 105, 104, 105, 104, 105, 104, 105, 104, + 105, 95, 93, 92, 92, 99, 97, 101, 96, 1, + 79, 36, 61, 20, 95, 92, 92, 100, 101, 17, + 101, 102, 55, 60, 35, 30, 37, 58, 3, 46, + + 57, 22, 69, 59, 78, 73, 74, 56, 62, 94, + 101, 101, 41, 70, 71, 86, 87, 48, 19, 98, + 23, 4, 53, 47, 40, 11, 101, 32, 2, 5, + 50, 52, 42, 64, 68, 66, 67, 65, 63, 44, + 88, 43, 49, 18, 76, 85, 39, 51, 27, 21, + 38, 7, 81, 29, 84, 34, 54, 72, 80, 24, + 25, 82, 45, 77, 75, 6, 26, 33, 8, 14, + 9, 10, 31, 12, 28, 83, 89, 91, 13, 90, + 15, 16 } ; -static yyconst short int yy_accept[430] = +static yyconst short int yy_accept[435] = { 0, 1, 1, 1, 2, 4, 7, 9, 11, 13, 15, 17, 19, 21, 24, 27, 30, 32, 34, 36, 38, @@ -344,45 +344,46 @@ 81, 81, 81, 81, 81, 81, 81, 81, 81, 82, 82, 83, 83, 83, 83, 83, 83, 83, 83, 83, 83, 83, 83, 83, 83, 83, 83, 83, 83, 83, - 83, 83, 83, 84, 84, 84, 84, 84, 84, 84, - 84, 84, 84, 84, 84, 85, 85, 85, 85, 85, + 83, 83, 83, 83, 84, 84, 84, 84, 84, 84, + 84, 84, 84, 84, 84, 84, 85, 85, 85, 85, - 85, 85, 85, 85, 85, 85, 85, 85, 86, 87, - 89, 90, 91, 92, 92, 93, 94, 94, 94, 95, - 95, 96, 96, 97, 97, 97, 97, 98, 98, 98, - 98, 98, 99, 99, 100, 100, 100, 100, 100, 100, - 100, 100, 100, 100, 100, 101, 101, 101, 101, 101, - 101, 101, 101, 102, 103, 103, 103, 104, 104, 105, - 106, 106, 106, 106, 106, 106, 107, 107, 108, 108, + 85, 85, 85, 85, 85, 85, 85, 85, 85, 86, + 87, 89, 90, 91, 92, 92, 93, 94, 94, 94, + 95, 95, 96, 96, 97, 97, 97, 97, 98, 98, + 98, 98, 98, 99, 99, 100, 100, 100, 100, 100, + 100, 100, 100, 100, 100, 100, 101, 101, 101, 101, + 101, 101, 101, 101, 101, 102, 103, 103, 103, 104, + 104, 105, 106, 106, 106, 106, 106, 106, 107, 107, + 108, 108, 109, 109, 109, 109, 109, 109, 109, 109, 109, 109, 109, 109, 109, 109, 109, 109, 109, 109, - 109, 109, 109, 109, 109, 109, 109, 109, 109, 109, - 109, 110, 110, 111, 112, 112, 112, 112, 113, 113, + 109, 109, 109, 110, 110, 111, 112, 112, 112, 112, - 113, 113, 113, 114, 115, 116, 116, 116, 116, 116, - 116, 116, 116, 116, 116, 116, 116, 116, 117, 117, - 117, 117, 117, 117, 117, 117, 117, 117, 118, 119, - 119, 120, 120, 120, 121, 121, 121, 121, 121, 121, - 121, 121, 121, 121, 121, 122, 122, 122, 123, 124, - 124, 125, 125, 125, 125, 125, 125, 125, 125, 125, - 125, 126, 126, 127, 127, 128, 129, 129, 129, 130, - 130, 130, 130, 130, 130, 130, 130, 130, 130, 131, - 131, 132, 132, 132, 132, 132, 132, 132, 133, 133, - 133, 133, 133, 133, 134, 134, 134, 135, 136, 137, - - 138, 139, 140, 141, 142, 142, 142, 142, 143, 144, - 145, 145, 145, 145, 145, 145, 146, 146, 146, 146, - 147, 147, 148, 148, 148, 148, 149, 150, 151, 151, - 151, 152, 152, 153, 153, 153, 153, 154, 154, 155, - 156, 157, 157, 157, 158, 159, 160, 161, 161, 161, - 162, 163, 164, 165, 165, 165, 165, 165, 166, 167, - 167, 167, 167, 167, 167, 167, 167, 167, 168, 168, - 168, 168, 168, 168, 169, 170, 170, 170, 170, 170, - 171, 172, 172, 172, 172, 173, 173, 174, 174, 174, - 174, 174, 174, 174, 174, 174, 174, 174, 174, 174, - - 174, 174, 174, 174, 174, 174, 174, 174, 175, 175, - 176, 176, 176, 176, 176, 176, 176, 176, 176, 177, - 177, 178, 179, 179, 180, 181, 181, 182, 182 + 113, 113, 113, 113, 113, 114, 115, 116, 116, 116, + 116, 116, 116, 116, 116, 116, 116, 116, 116, 116, + 117, 117, 117, 117, 117, 117, 117, 117, 117, 117, + 118, 119, 119, 119, 120, 120, 120, 121, 121, 121, + 121, 121, 121, 121, 121, 121, 121, 121, 122, 122, + 122, 123, 124, 124, 125, 125, 125, 125, 125, 125, + 125, 125, 125, 125, 126, 126, 127, 127, 128, 129, + 129, 129, 130, 130, 130, 130, 130, 130, 130, 130, + 130, 130, 131, 131, 132, 132, 132, 132, 132, 132, + 132, 133, 133, 133, 133, 133, 133, 133, 134, 134, + + 134, 135, 136, 137, 138, 139, 140, 141, 142, 142, + 142, 142, 143, 144, 145, 145, 145, 145, 145, 145, + 146, 146, 146, 146, 147, 147, 148, 148, 148, 148, + 149, 150, 151, 151, 151, 152, 152, 153, 153, 153, + 153, 154, 154, 155, 156, 157, 158, 158, 158, 159, + 160, 161, 162, 162, 162, 163, 164, 165, 166, 166, + 166, 166, 166, 167, 168, 168, 168, 168, 168, 168, + 168, 168, 168, 169, 169, 169, 169, 169, 169, 170, + 171, 171, 171, 171, 171, 172, 173, 173, 173, 173, + 174, 174, 175, 175, 175, 175, 175, 175, 175, 175, + + 175, 175, 175, 175, 175, 175, 175, 175, 175, 175, + 175, 175, 175, 176, 176, 177, 177, 177, 177, 177, + 177, 177, 177, 177, 178, 178, 179, 180, 180, 181, + 182, 182, 183, 183 } ; static yyconst int yy_ec[256] = @@ -426,111 +427,111 @@ 3 } ; -static yyconst short int yy_base[434] = +static yyconst short int yy_base[439] = { 0, - 0, 0, 898, 899, 899, 899, 893, 884, 34, 36, + 0, 0, 908, 909, 909, 909, 903, 894, 34, 36, 38, 42, 46, 50, 0, 52, 57, 54, 68, 62, 80, 82, 76, 94, 98, 40, 83, 88, 56, 125, - 108, 154, 109, 87, 110, 111, 891, 899, 882, 899, - 0, 117, 119, 141, 144, 124, 147, 164, 179, 0, - 55, 153, 157, 155, 119, 159, 172, 173, 881, 175, - 192, 193, 194, 105, 180, 195, 198, 196, 202, 200, - 206, 207, 212, 214, 84, 215, 217, 226, 227, 223, - 228, 219, 880, 235, 240, 233, 230, 216, 245, 251, - 247, 255, 250, 254, 879, 258, 259, 262, 264, 270, - - 276, 41, 287, 280, 274, 273, 277, 878, 0, 134, - 302, 877, 309, 321, 0, 876, 285, 306, 875, 313, - 874, 286, 873, 310, 314, 303, 872, 315, 327, 328, - 330, 871, 331, 333, 332, 335, 336, 334, 342, 339, - 350, 354, 338, 352, 355, 351, 362, 363, 365, 366, - 367, 368, 870, 869, 370, 31, 868, 372, 867, 866, - 392, 373, 380, 375, 404, 865, 386, 864, 387, 863, - 382, 409, 381, 393, 411, 414, 406, 410, 417, 416, - 418, 422, 426, 427, 432, 428, 438, 436, 441, 440, - 862, 430, 899, 452, 461, 444, 464, 467, 452, 468, - - 453, 471, 861, 860, 859, 472, 458, 473, 474, 476, - 477, 480, 483, 484, 485, 486, 490, 858, 492, 495, - 496, 497, 498, 501, 502, 503, 508, 857, 856, 506, - 855, 509, 511, 0, 516, 514, 522, 510, 526, 528, - 531, 520, 532, 538, 854, 539, 542, 853, 852, 544, - 851, 536, 546, 550, 554, 552, 555, 558, 560, 561, - 850, 562, 849, 564, 567, 848, 567, 570, 847, 568, - 581, 573, 574, 582, 583, 584, 587, 589, 846, 590, - 845, 592, 593, 595, 598, 599, 603, 844, 602, 605, - 606, 609, 615, 843, 610, 617, 842, 841, 840, 839, - - 838, 837, 836, 835, 620, 622, 625, 834, 833, 832, - 623, 626, 627, 629, 630, 831, 631, 636, 638, 830, - 637, 829, 639, 642, 643, 828, 827, 826, 648, 644, - 825, 647, 824, 657, 659, 664, 823, 670, 822, 821, - 820, 658, 661, 819, 818, 817, 816, 660, 662, 815, - 812, 803, 802, 671, 672, 675, 676, 800, 798, 680, - 681, 682, 683, 687, 688, 684, 689, 797, 696, 704, - 697, 694, 705, 796, 794, 698, 707, 708, 710, 793, - 792, 712, 714, 715, 790, 720, 789, 718, 722, 723, - 726, 730, 734, 735, 732, 736, 738, 739, 740, 744, - - 741, 746, 743, 751, 748, 754, 756, 787, 763, 785, - 761, 764, 765, 766, 768, 769, 775, 776, 783, 778, - 782, 512, 779, 379, 376, 780, 340, 899, 816, 818, - 292, 822, 167 + 108, 154, 109, 87, 110, 111, 901, 909, 892, 909, + 0, 119, 134, 141, 144, 124, 147, 164, 179, 0, + 55, 153, 157, 155, 119, 159, 172, 173, 891, 175, + 192, 193, 194, 90, 180, 195, 198, 196, 202, 200, + 206, 207, 212, 214, 216, 215, 223, 219, 227, 226, + 224, 230, 243, 890, 233, 242, 244, 249, 130, 250, + 251, 252, 253, 258, 261, 889, 262, 264, 256, 263, + + 277, 279, 41, 285, 278, 294, 84, 288, 888, 0, + 298, 305, 887, 312, 324, 0, 886, 306, 298, 885, + 318, 884, 268, 883, 313, 325, 307, 882, 326, 329, + 331, 332, 881, 333, 335, 336, 341, 337, 338, 344, + 343, 354, 358, 342, 356, 360, 353, 366, 367, 355, + 368, 372, 370, 373, 880, 879, 374, 31, 878, 377, + 877, 876, 400, 388, 390, 382, 412, 875, 379, 874, + 380, 873, 392, 404, 384, 414, 387, 416, 417, 418, + 420, 422, 426, 430, 432, 424, 444, 434, 438, 428, + 446, 448, 872, 435, 909, 458, 470, 460, 472, 475, + + 460, 386, 463, 464, 871, 870, 869, 476, 478, 479, + 482, 485, 486, 487, 488, 489, 490, 496, 492, 868, + 493, 497, 498, 504, 505, 510, 512, 511, 513, 867, + 866, 514, 516, 865, 517, 519, 0, 521, 520, 536, + 518, 535, 537, 539, 522, 540, 547, 864, 550, 551, + 863, 862, 552, 861, 523, 553, 555, 557, 556, 564, + 565, 567, 569, 860, 570, 859, 571, 576, 858, 572, + 579, 857, 576, 589, 580, 582, 581, 591, 592, 595, + 597, 856, 598, 855, 600, 599, 602, 603, 606, 607, + 854, 610, 611, 617, 613, 619, 621, 853, 625, 629, + + 852, 851, 850, 849, 848, 847, 846, 845, 632, 631, + 633, 844, 843, 842, 634, 638, 639, 635, 637, 841, + 636, 640, 646, 840, 649, 839, 650, 651, 655, 838, + 837, 836, 656, 641, 835, 665, 834, 666, 669, 668, + 833, 672, 832, 831, 830, 829, 670, 671, 828, 827, + 826, 825, 674, 680, 824, 823, 822, 819, 682, 676, + 683, 684, 810, 808, 686, 685, 690, 693, 696, 698, + 695, 702, 807, 703, 709, 706, 705, 712, 806, 804, + 716, 717, 718, 720, 803, 802, 719, 721, 727, 801, + 722, 798, 730, 725, 737, 738, 726, 740, 743, 744, + + 745, 746, 747, 750, 751, 752, 757, 756, 763, 762, + 764, 767, 796, 769, 795, 773, 774, 768, 775, 776, + 779, 780, 782, 794, 783, 792, 454, 788, 452, 450, + 790, 301, 909, 823, 825, 263, 829, 226 } ; -static yyconst short int yy_def[434] = +static yyconst short int yy_def[439] = { 0, - 428, 1, 428, 428, 428, 428, 429, 430, 431, 428, - 430, 430, 430, 430, 432, 430, 430, 430, 430, 430, - 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, - 430, 430, 430, 430, 430, 430, 429, 428, 430, 428, - 433, 433, 428, 428, 430, 430, 430, 430, 430, 432, - 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, - 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, - 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, - 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, - 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, - - 430, 430, 430, 430, 430, 430, 430, 428, 433, 433, - 428, 430, 430, 430, 49, 430, 430, 430, 430, 430, - 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, - 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, - 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, - 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, - 49, 430, 430, 430, 430, 430, 430, 430, 430, 430, - 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, - 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, - 430, 430, 428, 428, 428, 428, 430, 430, 430, 430, - - 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, - 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, - 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, - 430, 430, 430, 161, 430, 430, 430, 430, 430, 430, - 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, - 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, - 430, 430, 430, 430, 428, 430, 430, 430, 430, 430, - 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, - 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, - 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, - - 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, - 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, - 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, - 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, - 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, - 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, - 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, - 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, - 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, - 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, - - 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, - 430, 430, 430, 430, 430, 430, 430, 430, 430, 430, - 430, 430, 430, 430, 430, 430, 430, 0, 428, 428, - 428, 428, 428 + 433, 1, 433, 433, 433, 433, 434, 435, 436, 433, + 435, 435, 435, 435, 437, 435, 435, 435, 435, 435, + 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, + 435, 435, 435, 435, 435, 435, 434, 433, 435, 433, + 438, 438, 433, 433, 435, 435, 435, 435, 435, 437, + 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, + 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, + 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, + 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, + 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, + + 435, 435, 435, 435, 435, 435, 435, 435, 433, 438, + 438, 433, 435, 435, 435, 49, 435, 435, 435, 435, + 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, + 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, + 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, + 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, + 435, 435, 49, 435, 435, 435, 435, 435, 435, 435, + 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, + 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, + 435, 435, 435, 435, 433, 433, 433, 433, 435, 435, + + 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, + 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, + 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, + 435, 435, 435, 435, 435, 435, 163, 435, 435, 435, + 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, + 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, + 435, 435, 435, 435, 435, 435, 435, 433, 435, 435, + 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, + 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, + 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, + + 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, + 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, + 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, + 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, + 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, + 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, + 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, + 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, + 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, + 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, + + 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, + 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, + 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, + 435, 435, 0, 433, 433, 433, 433, 433 } ; -static yyconst short int yy_nxt[941] = +static yyconst short int yy_nxt[951] = { 0, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 4, 15, 8, 8, 8, 16, 17, 18, 19, @@ -538,210 +539,212 @@ 28, 8, 29, 30, 31, 32, 33, 34, 35, 8, 36, 42, 40, 43, 43, 44, 44, 45, 45, 40, 46, 40, 40, 40, 47, 48, 48, 40, 47, 48, - 48, 40, 232, 40, 184, 40, 40, 40, 40, 80, - 60, 51, 61, 40, 116, 81, 86, 56, 52, 40, + 48, 40, 235, 40, 186, 40, 40, 40, 40, 81, + 60, 51, 61, 40, 117, 82, 87, 56, 52, 40, 53, 57, 54, 62, 49, 55, 58, 40, 63, 59, 66, 40, 64, 40, 40, 40, 68, 65, 40, 40, - 67, 147, 71, 73, 74, 40, 69, 105, 72, 40, - 75, 84, 70, 82, 78, 83, 40, 85, 76, 40, - 40, 40, 40, 77, 94, 103, 110, 110, 43, 43, - 40, 107, 112, 79, 87, 40, 40, 95, 104, 106, - 96, 132, 88, 110, 110, 89, 121, 97, 90, 111, - 44, 44, 47, 45, 45, 40, 113, 113, 40, 91, - 92, 114, 93, 87, 40, 40, 40, 114, 40, 109, - 40, 98, 47, 48, 48, 40, 119, 117, 99, 118, - 100, 122, 101, 40, 40, 120, 40, 102, 115, 115, - 40, 40, 115, 115, 123, 115, 115, 115, 115, 115, - - 115, 125, 124, 40, 40, 40, 40, 40, 126, 40, - 127, 40, 130, 40, 134, 133, 135, 40, 40, 128, - 140, 129, 137, 40, 131, 40, 40, 40, 40, 138, - 40, 139, 136, 150, 40, 156, 142, 40, 40, 40, - 141, 40, 143, 148, 40, 151, 40, 144, 145, 149, - 146, 40, 152, 153, 155, 162, 40, 154, 40, 157, - 159, 40, 40, 163, 158, 40, 40, 160, 161, 40, - 40, 164, 170, 40, 171, 40, 169, 166, 172, 165, - 167, 40, 174, 168, 40, 40, 173, 40, 40, 176, - 190, 40, 178, 175, 41, 180, 40, 40, 40, 179, - - 181, 177, 185, 186, 188, 191, 189, 199, 182, 192, - 202, 194, 194, 183, 40, 187, 195, 40, 113, 113, - 40, 40, 195, 114, 40, 40, 40, 196, 197, 114, - 198, 198, 40, 201, 206, 200, 203, 205, 40, 40, - 204, 40, 40, 40, 40, 40, 40, 40, 210, 40, - 40, 40, 212, 40, 208, 213, 209, 211, 217, 218, - 207, 40, 40, 40, 221, 40, 40, 214, 216, 215, - 219, 220, 222, 40, 40, 223, 40, 40, 40, 40, - 224, 40, 225, 40, 40, 228, 40, 40, 226, 229, - 40, 40, 40, 40, 230, 237, 231, 40, 40, 227, - - 233, 234, 234, 246, 40, 234, 234, 235, 234, 234, - 234, 234, 234, 234, 236, 40, 244, 40, 242, 243, - 40, 40, 40, 247, 238, 40, 239, 40, 40, 40, - 240, 248, 241, 40, 249, 245, 253, 40, 40, 40, - 250, 40, 255, 40, 251, 252, 254, 40, 258, 40, - 256, 40, 40, 265, 265, 261, 257, 262, 260, 264, - 259, 194, 194, 40, 40, 263, 195, 196, 196, 40, - 265, 265, 195, 198, 198, 40, 198, 198, 40, 40, - 266, 268, 40, 40, 40, 40, 267, 40, 40, 272, - 270, 40, 271, 275, 40, 40, 40, 40, 273, 269, - - 278, 40, 274, 40, 280, 279, 40, 40, 40, 40, - 276, 283, 40, 40, 40, 277, 284, 40, 282, 40, - 40, 40, 40, 40, 281, 40, 287, 40, 288, 285, - 286, 40, 289, 40, 290, 291, 294, 40, 295, 40, - 296, 297, 40, 40, 292, 293, 298, 40, 300, 40, - 40, 302, 304, 40, 303, 40, 305, 40, 309, 306, - 299, 40, 301, 40, 308, 40, 40, 310, 307, 40, - 312, 40, 40, 40, 311, 40, 265, 265, 40, 40, - 313, 40, 316, 320, 40, 40, 322, 314, 319, 321, - 315, 325, 40, 40, 40, 40, 318, 323, 40, 317, - - 40, 40, 326, 40, 40, 324, 40, 330, 331, 40, - 40, 327, 332, 40, 40, 329, 40, 40, 328, 333, - 40, 40, 334, 337, 340, 339, 40, 336, 40, 341, - 338, 40, 335, 40, 40, 342, 40, 40, 40, 343, - 40, 40, 40, 345, 349, 347, 350, 40, 40, 40, - 40, 344, 352, 40, 40, 40, 346, 348, 40, 40, - 354, 356, 358, 351, 360, 353, 355, 357, 40, 40, - 40, 40, 40, 40, 362, 40, 359, 363, 361, 364, - 365, 40, 40, 40, 369, 370, 40, 40, 366, 368, - 367, 40, 40, 40, 40, 40, 372, 371, 40, 40, - - 40, 376, 377, 373, 381, 40, 375, 40, 40, 40, - 374, 378, 383, 379, 380, 40, 40, 385, 40, 40, - 384, 40, 382, 40, 388, 40, 40, 387, 386, 40, - 391, 40, 394, 40, 40, 389, 392, 40, 396, 398, - 393, 40, 390, 40, 395, 40, 40, 40, 403, 40, - 40, 40, 40, 399, 40, 40, 397, 40, 401, 40, - 407, 402, 40, 404, 408, 40, 410, 40, 405, 411, - 400, 412, 40, 406, 40, 40, 40, 40, 414, 40, - 40, 409, 413, 416, 415, 417, 40, 40, 422, 40, - 40, 40, 418, 40, 40, 420, 40, 419, 40, 426, - - 40, 40, 421, 40, 40, 40, 425, 40, 40, 40, - 424, 40, 427, 40, 40, 423, 37, 37, 37, 37, - 39, 39, 50, 40, 50, 50, 40, 40, 40, 40, + 67, 40, 71, 73, 74, 40, 69, 106, 72, 40, + 75, 85, 70, 83, 78, 84, 193, 86, 76, 40, + 40, 40, 40, 77, 95, 104, 133, 79, 111, 111, + 40, 108, 113, 80, 88, 40, 40, 96, 105, 107, + 97, 40, 89, 43, 43, 90, 122, 98, 91, 112, + 44, 44, 47, 45, 45, 40, 114, 114, 40, 92, + 93, 115, 94, 88, 40, 40, 40, 115, 40, 164, + 40, 99, 47, 48, 48, 40, 120, 118, 100, 119, + 101, 123, 102, 40, 40, 121, 40, 103, 116, 116, + 40, 40, 116, 116, 124, 116, 116, 116, 116, 116, + + 116, 126, 125, 40, 40, 40, 40, 40, 127, 40, + 128, 40, 131, 40, 135, 134, 136, 40, 40, 129, + 141, 130, 138, 40, 132, 40, 40, 40, 110, 139, + 40, 140, 137, 148, 40, 40, 143, 40, 40, 151, + 142, 40, 144, 149, 40, 153, 154, 145, 146, 150, + 147, 152, 155, 40, 40, 40, 157, 159, 156, 158, + 40, 40, 40, 40, 40, 41, 160, 40, 165, 40, + 172, 161, 40, 40, 40, 40, 166, 168, 162, 40, + 169, 171, 173, 170, 167, 174, 176, 163, 40, 40, + 40, 180, 204, 175, 178, 179, 40, 177, 182, 40, + + 187, 188, 190, 183, 191, 40, 181, 111, 111, 40, + 192, 184, 40, 189, 196, 196, 185, 40, 40, 197, + 194, 114, 114, 40, 40, 197, 115, 202, 201, 40, + 198, 199, 115, 200, 200, 40, 40, 40, 203, 205, + 40, 207, 40, 40, 40, 208, 40, 40, 40, 40, + 212, 206, 40, 40, 40, 40, 214, 210, 211, 213, + 219, 215, 209, 220, 40, 40, 40, 40, 223, 40, + 217, 40, 218, 216, 221, 222, 224, 40, 40, 40, + 225, 40, 226, 40, 40, 40, 227, 230, 40, 229, + 40, 40, 228, 40, 231, 40, 232, 40, 40, 40, + + 234, 40, 240, 40, 270, 236, 249, 251, 233, 237, + 237, 245, 246, 237, 237, 40, 237, 237, 237, 237, + 237, 237, 238, 40, 239, 40, 247, 40, 40, 40, + 248, 40, 241, 40, 242, 40, 252, 40, 243, 40, + 244, 40, 256, 40, 250, 40, 40, 264, 255, 40, + 258, 253, 254, 260, 257, 40, 259, 40, 263, 40, + 261, 40, 265, 40, 267, 40, 262, 196, 196, 268, + 268, 40, 197, 266, 40, 40, 198, 198, 197, 268, + 268, 200, 200, 40, 200, 200, 40, 40, 269, 40, + 40, 271, 272, 40, 273, 275, 40, 40, 40, 40, + + 40, 40, 278, 40, 40, 281, 276, 40, 40, 40, + 282, 277, 274, 286, 283, 40, 40, 279, 287, 285, + 280, 40, 40, 40, 40, 40, 284, 40, 40, 40, + 40, 40, 40, 40, 40, 290, 288, 289, 291, 293, + 292, 298, 295, 294, 299, 313, 40, 40, 40, 301, + 40, 40, 296, 297, 300, 302, 307, 304, 40, 306, + 308, 40, 40, 40, 40, 309, 40, 40, 40, 303, + 310, 305, 312, 316, 314, 40, 40, 311, 40, 315, + 40, 40, 40, 40, 317, 268, 268, 40, 324, 320, + 40, 40, 40, 40, 326, 323, 318, 319, 325, 329, + + 40, 330, 40, 40, 322, 327, 40, 321, 40, 40, + 40, 40, 328, 40, 40, 334, 335, 40, 40, 331, + 336, 40, 40, 333, 40, 337, 332, 341, 40, 338, + 40, 343, 40, 345, 340, 344, 40, 339, 342, 346, + 40, 347, 40, 40, 40, 40, 40, 40, 40, 40, + 40, 40, 40, 352, 348, 350, 354, 40, 355, 357, + 40, 40, 40, 349, 359, 351, 40, 40, 353, 356, + 358, 363, 365, 361, 360, 366, 40, 40, 362, 40, + 40, 40, 40, 40, 370, 40, 368, 40, 364, 369, + 371, 40, 367, 40, 40, 40, 40, 40, 374, 373, + + 377, 40, 372, 375, 40, 381, 40, 40, 376, 40, + 382, 378, 380, 40, 40, 386, 40, 40, 379, 388, + 40, 383, 384, 40, 385, 389, 390, 40, 40, 40, + 40, 40, 40, 40, 392, 387, 40, 40, 40, 391, + 396, 40, 393, 397, 399, 394, 400, 398, 40, 40, + 401, 40, 395, 403, 40, 40, 40, 40, 40, 402, + 408, 40, 40, 40, 406, 404, 405, 40, 40, 407, + 412, 413, 409, 40, 40, 40, 410, 415, 40, 40, + 40, 411, 416, 417, 40, 40, 40, 40, 419, 421, + 40, 40, 414, 40, 40, 420, 418, 422, 427, 40, + + 424, 40, 423, 40, 425, 40, 40, 40, 431, 40, + 426, 430, 40, 40, 40, 40, 429, 40, 40, 40, + 428, 40, 432, 37, 37, 37, 37, 39, 39, 50, + 40, 50, 50, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, - 40, 40, 40, 40, 40, 40, 40, 40, 40, 193, - 40, 40, 40, 40, 108, 40, 38, 428, 3, 428, + 40, 40, 40, 40, 40, 40, 40, 40, 40, 195, - 428, 428, 428, 428, 428, 428, 428, 428, 428, 428, - 428, 428, 428, 428, 428, 428, 428, 428, 428, 428, - 428, 428, 428, 428, 428, 428, 428, 428, 428, 428, - 428, 428, 428, 428, 428, 428, 428, 428, 428, 428 + 40, 40, 40, 40, 109, 40, 38, 433, 3, 433, + 433, 433, 433, 433, 433, 433, 433, 433, 433, 433, + 433, 433, 433, 433, 433, 433, 433, 433, 433, 433, + 433, 433, 433, 433, 433, 433, 433, 433, 433, 433, + 433, 433, 433, 433, 433, 433, 433, 433, 433, 433 } ; -static yyconst short int yy_chk[941] = +static yyconst short int yy_chk[951] = { 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 9, 156, 9, 9, 10, 10, 11, 11, 11, - 12, 26, 102, 12, 13, 13, 13, 13, 14, 14, - 14, 14, 156, 16, 102, 18, 51, 29, 17, 26, + 1, 9, 158, 9, 9, 10, 10, 11, 11, 11, + 12, 26, 103, 12, 13, 13, 13, 13, 14, 14, + 14, 14, 158, 16, 103, 18, 51, 29, 17, 26, 18, 16, 18, 20, 51, 26, 29, 17, 16, 19, 16, 17, 16, 18, 13, 16, 17, 23, 19, 17, - 20, 21, 19, 22, 27, 75, 21, 19, 34, 28, + 20, 21, 19, 22, 27, 107, 21, 19, 34, 28, - 20, 75, 22, 23, 23, 24, 21, 34, 22, 25, - 24, 28, 21, 27, 25, 27, 64, 28, 24, 31, - 33, 35, 36, 24, 31, 33, 42, 42, 43, 43, + 20, 64, 22, 23, 23, 24, 21, 34, 22, 25, + 24, 28, 21, 27, 25, 27, 107, 28, 24, 31, + 33, 35, 36, 24, 31, 33, 64, 25, 42, 42, 55, 36, 46, 25, 30, 46, 30, 31, 33, 35, - 31, 64, 30, 110, 110, 30, 55, 31, 30, 44, + 31, 89, 30, 43, 43, 30, 55, 31, 30, 44, 44, 44, 45, 45, 45, 45, 47, 47, 47, 30, - 30, 47, 30, 32, 52, 32, 54, 47, 53, 433, + 30, 47, 30, 32, 52, 32, 54, 47, 53, 89, 56, 32, 48, 48, 48, 48, 53, 52, 32, 52, 32, 56, 32, 57, 58, 54, 60, 32, 49, 49, 49, 65, 49, 49, 57, 49, 49, 49, 49, 49, 49, 60, 58, 61, 62, 63, 66, 68, 60, 67, 61, 70, 63, 69, 66, 65, 67, 71, 72, 62, - 70, 62, 68, 73, 63, 74, 76, 88, 77, 68, - 82, 69, 67, 77, 80, 82, 72, 78, 79, 81, - 71, 87, 73, 76, 86, 77, 84, 74, 74, 76, - 74, 85, 78, 79, 81, 88, 89, 80, 91, 84, - 86, 93, 90, 89, 85, 94, 92, 86, 87, 96, - 97, 89, 92, 98, 93, 99, 91, 90, 94, 89, - 90, 100, 96, 90, 106, 105, 94, 101, 107, 97, - 105, 104, 99, 96, 431, 101, 117, 122, 103, 100, - - 101, 98, 103, 103, 104, 106, 104, 117, 101, 107, - 122, 111, 111, 101, 126, 103, 111, 118, 113, 113, - 113, 124, 111, 113, 120, 125, 128, 114, 114, 113, - 114, 114, 114, 120, 128, 118, 124, 126, 129, 130, - 125, 131, 133, 135, 134, 138, 136, 137, 133, 143, - 140, 427, 135, 139, 130, 136, 131, 134, 139, 140, - 129, 141, 146, 144, 143, 142, 145, 136, 138, 137, - 141, 142, 144, 147, 148, 145, 149, 150, 151, 152, - 146, 155, 147, 158, 162, 150, 164, 425, 148, 151, - 424, 163, 173, 171, 152, 164, 155, 167, 169, 149, - - 158, 161, 161, 173, 174, 161, 161, 162, 161, 161, - 161, 161, 161, 161, 163, 165, 171, 177, 167, 169, - 172, 178, 175, 174, 165, 176, 165, 180, 179, 181, - 165, 175, 165, 182, 176, 172, 180, 183, 184, 186, - 177, 192, 182, 185, 178, 179, 181, 188, 185, 187, - 183, 190, 189, 196, 196, 188, 184, 189, 187, 192, - 186, 194, 194, 199, 201, 190, 194, 195, 195, 207, - 195, 195, 194, 197, 197, 197, 198, 198, 198, 200, - 199, 201, 202, 206, 208, 209, 200, 210, 211, 208, - 206, 212, 207, 211, 213, 214, 215, 216, 209, 202, - - 214, 217, 210, 219, 216, 215, 220, 221, 222, 223, - 212, 220, 224, 225, 226, 213, 221, 230, 219, 227, - 232, 238, 233, 422, 217, 236, 224, 235, 225, 222, - 223, 242, 226, 237, 227, 230, 235, 239, 236, 240, - 237, 238, 241, 243, 232, 233, 239, 252, 240, 244, - 246, 241, 243, 247, 242, 250, 244, 253, 252, 246, - 239, 254, 240, 256, 250, 255, 257, 253, 247, 258, - 255, 259, 260, 262, 254, 264, 265, 265, 267, 270, - 256, 268, 259, 267, 272, 273, 270, 257, 264, 268, - 258, 273, 271, 274, 275, 276, 262, 271, 277, 260, - - 278, 280, 274, 282, 283, 272, 284, 278, 280, 285, - 286, 275, 282, 289, 287, 277, 290, 291, 276, 283, - 292, 295, 284, 287, 291, 290, 293, 286, 296, 292, - 289, 305, 285, 306, 311, 293, 307, 312, 313, 295, - 314, 315, 317, 305, 312, 307, 313, 318, 321, 319, - 323, 296, 315, 324, 325, 330, 306, 311, 332, 329, - 318, 321, 324, 314, 329, 317, 319, 323, 334, 342, - 335, 348, 343, 349, 332, 336, 325, 334, 330, 335, - 336, 338, 354, 355, 348, 349, 356, 357, 338, 343, - 342, 360, 361, 362, 363, 366, 355, 354, 364, 365, - - 367, 361, 362, 356, 366, 372, 360, 369, 371, 376, - 357, 363, 369, 364, 365, 370, 373, 371, 377, 378, - 370, 379, 367, 382, 376, 383, 384, 373, 372, 388, - 379, 386, 384, 389, 390, 377, 382, 391, 388, 390, - 383, 392, 378, 395, 386, 393, 394, 396, 395, 397, - 398, 399, 401, 391, 403, 400, 389, 402, 393, 405, - 399, 394, 404, 396, 400, 406, 402, 407, 397, 403, - 392, 404, 411, 398, 409, 412, 413, 414, 406, 415, - 416, 401, 405, 409, 407, 411, 417, 418, 416, 420, - 423, 426, 412, 421, 419, 414, 410, 413, 408, 423, - - 387, 385, 415, 381, 380, 375, 420, 374, 368, 359, - 418, 358, 426, 353, 352, 417, 429, 429, 429, 429, - 430, 430, 432, 351, 432, 432, 350, 347, 346, 345, - 344, 341, 340, 339, 337, 333, 331, 328, 327, 326, - 322, 320, 316, 310, 309, 308, 304, 303, 302, 301, - 300, 299, 298, 297, 294, 288, 281, 279, 269, 266, - 263, 261, 251, 249, 248, 245, 231, 229, 228, 218, - 205, 204, 203, 191, 170, 168, 166, 160, 159, 157, - 154, 153, 132, 127, 123, 121, 119, 116, 112, 108, - 95, 83, 59, 39, 37, 8, 7, 3, 428, 428, - - 428, 428, 428, 428, 428, 428, 428, 428, 428, 428, - 428, 428, 428, 428, 428, 428, 428, 428, 428, 428, - 428, 428, 428, 428, 428, 428, 428, 428, 428, 428, - 428, 428, 428, 428, 428, 428, 428, 428, 428, 428 + 70, 62, 68, 73, 63, 74, 76, 75, 438, 68, + 78, 69, 67, 75, 77, 81, 72, 80, 79, 77, + 71, 82, 73, 76, 85, 78, 79, 74, 74, 76, + 74, 77, 80, 86, 83, 87, 82, 85, 81, 83, + 88, 90, 91, 92, 93, 436, 86, 99, 90, 94, + 93, 87, 95, 97, 100, 98, 90, 91, 87, 123, + 91, 92, 94, 91, 90, 95, 97, 88, 101, 105, + 102, 100, 123, 95, 98, 99, 104, 97, 102, 108, + + 104, 104, 105, 102, 105, 106, 101, 111, 111, 119, + 106, 102, 432, 104, 112, 112, 102, 118, 127, 112, + 108, 114, 114, 114, 125, 112, 114, 119, 118, 121, + 115, 115, 114, 115, 115, 115, 126, 129, 121, 125, + 130, 127, 131, 132, 134, 129, 135, 136, 138, 139, + 134, 126, 137, 144, 141, 140, 136, 131, 132, 135, + 140, 137, 130, 141, 147, 142, 150, 145, 144, 143, + 138, 146, 139, 137, 142, 143, 145, 148, 149, 151, + 146, 153, 147, 152, 154, 157, 148, 151, 160, 150, + 169, 171, 149, 166, 152, 175, 153, 202, 177, 164, + + 157, 165, 166, 173, 202, 160, 175, 177, 154, 163, + 163, 169, 171, 163, 163, 174, 163, 163, 163, 163, + 163, 163, 164, 167, 165, 176, 173, 178, 179, 180, + 174, 181, 167, 182, 167, 186, 178, 183, 167, 190, + 167, 184, 182, 185, 176, 188, 194, 190, 181, 189, + 184, 179, 180, 186, 183, 187, 185, 191, 189, 192, + 187, 430, 191, 429, 194, 427, 188, 196, 196, 198, + 198, 201, 196, 192, 203, 204, 197, 197, 196, 197, + 197, 199, 199, 199, 200, 200, 200, 208, 201, 209, + 210, 203, 204, 211, 208, 210, 212, 213, 214, 215, + + 216, 217, 213, 219, 221, 216, 211, 218, 222, 223, + 217, 212, 209, 222, 218, 224, 225, 214, 223, 221, + 215, 226, 228, 227, 229, 232, 219, 233, 235, 241, + 236, 239, 238, 245, 255, 226, 224, 225, 227, 229, + 228, 238, 233, 232, 239, 255, 242, 240, 243, 241, + 244, 246, 235, 236, 240, 242, 245, 243, 247, 244, + 246, 249, 250, 253, 256, 247, 257, 259, 258, 242, + 249, 243, 253, 258, 256, 260, 261, 250, 262, 257, + 263, 265, 267, 270, 259, 268, 268, 273, 270, 262, + 271, 275, 277, 276, 273, 267, 260, 261, 271, 276, + + 274, 277, 278, 279, 265, 274, 280, 263, 281, 283, + 286, 285, 275, 287, 288, 281, 283, 289, 290, 278, + 285, 292, 293, 280, 295, 286, 279, 290, 294, 287, + 296, 293, 297, 295, 289, 294, 299, 288, 292, 296, + 300, 297, 310, 309, 311, 315, 318, 321, 319, 316, + 317, 322, 334, 311, 299, 309, 316, 323, 317, 319, + 325, 327, 328, 300, 322, 310, 329, 333, 315, 318, + 321, 328, 333, 325, 323, 334, 336, 338, 327, 340, + 339, 347, 348, 342, 340, 353, 338, 360, 329, 339, + 342, 354, 336, 359, 361, 362, 366, 365, 353, 348, + + 360, 367, 347, 354, 368, 366, 371, 369, 359, 370, + 367, 361, 365, 372, 374, 371, 377, 376, 362, 374, + 375, 368, 369, 378, 370, 375, 376, 381, 382, 383, + 387, 384, 388, 391, 378, 372, 394, 397, 389, 377, + 384, 393, 381, 387, 389, 382, 391, 388, 395, 396, + 393, 398, 383, 395, 399, 400, 401, 402, 403, 394, + 400, 404, 405, 406, 398, 396, 397, 408, 407, 399, + 404, 405, 401, 410, 409, 411, 402, 407, 412, 418, + 414, 403, 408, 409, 416, 417, 419, 420, 411, 414, + 421, 422, 406, 423, 425, 412, 410, 416, 421, 428, + + 418, 431, 417, 426, 419, 424, 415, 413, 428, 392, + 420, 425, 390, 386, 385, 380, 423, 379, 373, 364, + 422, 363, 431, 434, 434, 434, 434, 435, 435, 437, + 358, 437, 437, 357, 356, 355, 352, 351, 350, 349, + 346, 345, 344, 343, 341, 337, 335, 332, 331, 330, + 326, 324, 320, 314, 313, 312, 308, 307, 306, 305, + 304, 303, 302, 301, 298, 291, 284, 282, 272, 269, + 266, 264, 254, 252, 251, 248, 234, 231, 230, 220, + 207, 206, 205, 193, 172, 170, 168, 162, 161, 159, + 156, 155, 133, 128, 124, 122, 120, 117, 113, 109, + + 96, 84, 59, 39, 37, 8, 7, 3, 433, 433, + 433, 433, 433, 433, 433, 433, 433, 433, 433, 433, + 433, 433, 433, 433, 433, 433, 433, 433, 433, 433, + 433, 433, 433, 433, 433, 433, 433, 433, 433, 433, + 433, 433, 433, 433, 433, 433, 433, 433, 433, 433 } ; static yy_state_type yy_state_buf[YY_BUF_SIZE + 2], *yy_state_ptr; @@ -899,7 +902,7 @@ /* HexIntConstant - Hexadecimal constant generated by the CFE to avoid forcing * it to deal with 64 bit numbers. */ -#line 903 "Lexer.cpp" +#line 906 "Lexer.cpp" /* Macros after this point can all be overridden by user definitions in * section 1. @@ -1053,7 +1056,7 @@ #line 179 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -#line 1057 "Lexer.cpp" +#line 1060 "Lexer.cpp" if ( yy_init ) { @@ -1101,14 +1104,14 @@ while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) { yy_current_state = (int) yy_def[yy_current_state]; - if ( yy_current_state >= 429 ) + if ( yy_current_state >= 434 ) yy_c = yy_meta[(unsigned int) yy_c]; } yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c]; *yy_state_ptr++ = yy_current_state; ++yy_cp; } - while ( yy_current_state != 428 ); + while ( yy_current_state != 433 ); yy_find_action: yy_current_state = *--yy_state_ptr; @@ -1312,300 +1315,305 @@ case 34: YY_RULE_SETUP #line 215 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ return ASM_TOK; } +{ return MODULE; } YY_BREAK case 35: YY_RULE_SETUP -#line 217 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ return CC_TOK; } +#line 216 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ return ASM_TOK; } YY_BREAK case 36: YY_RULE_SETUP #line 218 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ return CCC_TOK; } +{ return CC_TOK; } YY_BREAK case 37: YY_RULE_SETUP #line 219 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ return FASTCC_TOK; } +{ return CCC_TOK; } YY_BREAK case 38: YY_RULE_SETUP #line 220 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ return COLDCC_TOK; } +{ return FASTCC_TOK; } YY_BREAK case 39: YY_RULE_SETUP -#line 222 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ llvmAsmlval.PrimType = Type::VoidTy ; return VOID; } +#line 221 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ return COLDCC_TOK; } YY_BREAK case 40: YY_RULE_SETUP #line 223 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ llvmAsmlval.PrimType = Type::BoolTy ; return BOOL; } +{ llvmAsmlval.PrimType = Type::VoidTy ; return VOID; } YY_BREAK case 41: YY_RULE_SETUP #line 224 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ llvmAsmlval.PrimType = Type::SByteTy ; return SBYTE; } +{ llvmAsmlval.PrimType = Type::BoolTy ; return BOOL; } YY_BREAK case 42: YY_RULE_SETUP #line 225 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ llvmAsmlval.PrimType = Type::UByteTy ; return UBYTE; } +{ llvmAsmlval.PrimType = Type::SByteTy ; return SBYTE; } YY_BREAK case 43: YY_RULE_SETUP #line 226 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ llvmAsmlval.PrimType = Type::ShortTy ; return SHORT; } +{ llvmAsmlval.PrimType = Type::UByteTy ; return UBYTE; } YY_BREAK case 44: YY_RULE_SETUP #line 227 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ llvmAsmlval.PrimType = Type::UShortTy; return USHORT; } +{ llvmAsmlval.PrimType = Type::ShortTy ; return SHORT; } YY_BREAK case 45: YY_RULE_SETUP #line 228 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ llvmAsmlval.PrimType = Type::IntTy ; return INT; } +{ llvmAsmlval.PrimType = Type::UShortTy; return USHORT; } YY_BREAK case 46: YY_RULE_SETUP #line 229 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ llvmAsmlval.PrimType = Type::UIntTy ; return UINT; } +{ llvmAsmlval.PrimType = Type::IntTy ; return INT; } YY_BREAK case 47: YY_RULE_SETUP #line 230 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ llvmAsmlval.PrimType = Type::LongTy ; return LONG; } +{ llvmAsmlval.PrimType = Type::UIntTy ; return UINT; } YY_BREAK case 48: YY_RULE_SETUP #line 231 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ llvmAsmlval.PrimType = Type::ULongTy ; return ULONG; } +{ llvmAsmlval.PrimType = Type::LongTy ; return LONG; } YY_BREAK case 49: YY_RULE_SETUP #line 232 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ llvmAsmlval.PrimType = Type::FloatTy ; return FLOAT; } +{ llvmAsmlval.PrimType = Type::ULongTy ; return ULONG; } YY_BREAK case 50: YY_RULE_SETUP #line 233 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ llvmAsmlval.PrimType = Type::DoubleTy; return DOUBLE; } +{ llvmAsmlval.PrimType = Type::FloatTy ; return FLOAT; } YY_BREAK case 51: YY_RULE_SETUP #line 234 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ llvmAsmlval.PrimType = Type::LabelTy ; return LABEL; } +{ llvmAsmlval.PrimType = Type::DoubleTy; return DOUBLE; } YY_BREAK case 52: YY_RULE_SETUP #line 235 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ return TYPE; } +{ llvmAsmlval.PrimType = Type::LabelTy ; return LABEL; } YY_BREAK case 53: YY_RULE_SETUP #line 236 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ return OPAQUE; } +{ return TYPE; } YY_BREAK case 54: YY_RULE_SETUP -#line 238 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(BinaryOpVal, Add, ADD); } +#line 237 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ return OPAQUE; } YY_BREAK case 55: YY_RULE_SETUP #line 239 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(BinaryOpVal, Sub, SUB); } +{ RET_TOK(BinaryOpVal, Add, ADD); } YY_BREAK case 56: YY_RULE_SETUP #line 240 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(BinaryOpVal, Mul, MUL); } +{ RET_TOK(BinaryOpVal, Sub, SUB); } YY_BREAK case 57: YY_RULE_SETUP #line 241 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(BinaryOpVal, Div, DIV); } +{ RET_TOK(BinaryOpVal, Mul, MUL); } YY_BREAK case 58: YY_RULE_SETUP #line 242 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(BinaryOpVal, Rem, REM); } +{ RET_TOK(BinaryOpVal, Div, DIV); } YY_BREAK case 59: YY_RULE_SETUP #line 243 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(BinaryOpVal, And, AND); } +{ RET_TOK(BinaryOpVal, Rem, REM); } YY_BREAK case 60: YY_RULE_SETUP #line 244 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(BinaryOpVal, Or , OR ); } +{ RET_TOK(BinaryOpVal, And, AND); } YY_BREAK case 61: YY_RULE_SETUP #line 245 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(BinaryOpVal, Xor, XOR); } +{ RET_TOK(BinaryOpVal, Or , OR ); } YY_BREAK case 62: YY_RULE_SETUP #line 246 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(BinaryOpVal, SetNE, SETNE); } +{ RET_TOK(BinaryOpVal, Xor, XOR); } YY_BREAK case 63: YY_RULE_SETUP #line 247 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(BinaryOpVal, SetEQ, SETEQ); } +{ RET_TOK(BinaryOpVal, SetNE, SETNE); } YY_BREAK case 64: YY_RULE_SETUP #line 248 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(BinaryOpVal, SetLT, SETLT); } +{ RET_TOK(BinaryOpVal, SetEQ, SETEQ); } YY_BREAK case 65: YY_RULE_SETUP #line 249 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(BinaryOpVal, SetGT, SETGT); } +{ RET_TOK(BinaryOpVal, SetLT, SETLT); } YY_BREAK case 66: YY_RULE_SETUP #line 250 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(BinaryOpVal, SetLE, SETLE); } +{ RET_TOK(BinaryOpVal, SetGT, SETGT); } YY_BREAK case 67: YY_RULE_SETUP #line 251 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(BinaryOpVal, SetGE, SETGE); } +{ RET_TOK(BinaryOpVal, SetLE, SETLE); } YY_BREAK case 68: YY_RULE_SETUP -#line 253 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(OtherOpVal, PHI, PHI_TOK); } +#line 252 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(BinaryOpVal, SetGE, SETGE); } YY_BREAK case 69: YY_RULE_SETUP #line 254 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(OtherOpVal, Call, CALL); } +{ RET_TOK(OtherOpVal, PHI, PHI_TOK); } YY_BREAK case 70: YY_RULE_SETUP #line 255 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(OtherOpVal, Cast, CAST); } +{ RET_TOK(OtherOpVal, Call, CALL); } YY_BREAK case 71: YY_RULE_SETUP #line 256 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(OtherOpVal, Select, SELECT); } +{ RET_TOK(OtherOpVal, Cast, CAST); } YY_BREAK case 72: YY_RULE_SETUP #line 257 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(OtherOpVal, Shl, SHL); } +{ RET_TOK(OtherOpVal, Select, SELECT); } YY_BREAK case 73: YY_RULE_SETUP #line 258 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(OtherOpVal, Shr, SHR); } +{ RET_TOK(OtherOpVal, Shl, SHL); } YY_BREAK case 74: YY_RULE_SETUP #line 259 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ return VANEXT_old; } +{ RET_TOK(OtherOpVal, Shr, SHR); } YY_BREAK case 75: YY_RULE_SETUP #line 260 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ return VAARG_old; } +{ return VANEXT_old; } YY_BREAK case 76: YY_RULE_SETUP #line 261 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(OtherOpVal, VAArg , VAARG); } +{ return VAARG_old; } YY_BREAK case 77: YY_RULE_SETUP #line 262 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(TermOpVal, Ret, RET); } +{ RET_TOK(OtherOpVal, VAArg , VAARG); } YY_BREAK case 78: YY_RULE_SETUP #line 263 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(TermOpVal, Br, BR); } +{ RET_TOK(TermOpVal, Ret, RET); } YY_BREAK case 79: YY_RULE_SETUP #line 264 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(TermOpVal, Switch, SWITCH); } +{ RET_TOK(TermOpVal, Br, BR); } YY_BREAK case 80: YY_RULE_SETUP #line 265 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(TermOpVal, Invoke, INVOKE); } +{ RET_TOK(TermOpVal, Switch, SWITCH); } YY_BREAK case 81: YY_RULE_SETUP #line 266 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(TermOpVal, Unwind, UNWIND); } +{ RET_TOK(TermOpVal, Invoke, INVOKE); } YY_BREAK case 82: YY_RULE_SETUP #line 267 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(TermOpVal, Unreachable, UNREACHABLE); } +{ RET_TOK(TermOpVal, Unwind, UNWIND); } YY_BREAK case 83: YY_RULE_SETUP -#line 269 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(MemOpVal, Malloc, MALLOC); } +#line 268 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(TermOpVal, Unreachable, UNREACHABLE); } YY_BREAK case 84: YY_RULE_SETUP #line 270 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(MemOpVal, Alloca, ALLOCA); } +{ RET_TOK(MemOpVal, Malloc, MALLOC); } YY_BREAK case 85: YY_RULE_SETUP #line 271 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(MemOpVal, Free, FREE); } +{ RET_TOK(MemOpVal, Alloca, ALLOCA); } YY_BREAK case 86: YY_RULE_SETUP #line 272 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(MemOpVal, Load, LOAD); } +{ RET_TOK(MemOpVal, Free, FREE); } YY_BREAK case 87: YY_RULE_SETUP #line 273 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(MemOpVal, Store, STORE); } +{ RET_TOK(MemOpVal, Load, LOAD); } YY_BREAK case 88: YY_RULE_SETUP #line 274 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(MemOpVal, GetElementPtr, GETELEMENTPTR); } +{ RET_TOK(MemOpVal, Store, STORE); } YY_BREAK case 89: YY_RULE_SETUP -#line 276 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(OtherOpVal, ExtractElement, EXTRACTELEMENT); } +#line 275 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(MemOpVal, GetElementPtr, GETELEMENTPTR); } YY_BREAK case 90: YY_RULE_SETUP #line 277 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(OtherOpVal, InsertElement, INSERTELEMENT); } +{ RET_TOK(OtherOpVal, ExtractElement, EXTRACTELEMENT); } YY_BREAK case 91: YY_RULE_SETUP -#line 280 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 278 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(OtherOpVal, InsertElement, INSERTELEMENT); } + YY_BREAK +case 92: +YY_RULE_SETUP +#line 281 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" { UnEscapeLexed(yytext+1); llvmAsmlval.StrVal = strdup(yytext+1); // Skip % return VAR_ID; } YY_BREAK -case 92: +case 93: YY_RULE_SETUP -#line 285 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 286 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" { yytext[strlen(yytext)-1] = 0; // nuke colon UnEscapeLexed(yytext); @@ -1613,9 +1621,9 @@ return LABELSTR; } YY_BREAK -case 93: +case 94: YY_RULE_SETUP -#line 291 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 292 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" { yytext[strlen(yytext)-2] = 0; // nuke colon, end quote UnEscapeLexed(yytext+1); @@ -1623,9 +1631,9 @@ return LABELSTR; } YY_BREAK -case 94: +case 95: YY_RULE_SETUP -#line 298 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 299 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" { // Note that we cannot unescape a string constant here! The // string constant might contain a \00 which would not be // understood by the string stuff. It is valid to make a @@ -1636,14 +1644,14 @@ return STRINGCONSTANT; } YY_BREAK -case 95: +case 96: YY_RULE_SETUP -#line 309 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 310 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" { llvmAsmlval.UInt64Val = atoull(yytext); return EUINT64VAL; } YY_BREAK -case 96: +case 97: YY_RULE_SETUP -#line 310 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 311 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" { uint64_t Val = atoull(yytext+1); // +1: we have bigger negative range @@ -1653,17 +1661,17 @@ return ESINT64VAL; } YY_BREAK -case 97: +case 98: YY_RULE_SETUP -#line 318 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 319 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" { llvmAsmlval.UInt64Val = HexIntToVal(yytext+3); return yytext[0] == 's' ? ESINT64VAL : EUINT64VAL; } YY_BREAK -case 98: +case 99: YY_RULE_SETUP -#line 323 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 324 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" { uint64_t Val = atoull(yytext+1); if ((unsigned)Val != Val) @@ -1672,9 +1680,9 @@ return UINTVAL; } YY_BREAK -case 99: +case 100: YY_RULE_SETUP -#line 330 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 331 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" { uint64_t Val = atoull(yytext+2); // +1: we have bigger negative range @@ -1684,18 +1692,18 @@ return SINTVAL; } YY_BREAK -case 100: +case 101: YY_RULE_SETUP -#line 339 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 340 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" { llvmAsmlval.FPVal = atof(yytext); return FPVAL; } YY_BREAK -case 101: +case 102: YY_RULE_SETUP -#line 340 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 341 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" { llvmAsmlval.FPVal = HexToFP(yytext); return FPVAL; } YY_BREAK case YY_STATE_EOF(INITIAL): -#line 342 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 343 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" { /* Make sure to free the internal buffers for flex when we are * done reading our input! @@ -1704,22 +1712,22 @@ return EOF; } YY_BREAK -case 102: +case 103: YY_RULE_SETUP -#line 350 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 351 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" { /* Ignore whitespace */ } YY_BREAK -case 103: +case 104: YY_RULE_SETUP -#line 351 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 352 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" { return yytext[0]; } YY_BREAK -case 104: +case 105: YY_RULE_SETUP -#line 353 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 354 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" YY_FATAL_ERROR( "flex scanner jammed" ); YY_BREAK -#line 1723 "Lexer.cpp" +#line 1731 "Lexer.cpp" case YY_END_OF_BUFFER: { @@ -2006,7 +2014,7 @@ while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) { yy_current_state = (int) yy_def[yy_current_state]; - if ( yy_current_state >= 429 ) + if ( yy_current_state >= 434 ) yy_c = yy_meta[(unsigned int) yy_c]; } yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c]; @@ -2036,11 +2044,11 @@ while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) { yy_current_state = (int) yy_def[yy_current_state]; - if ( yy_current_state >= 429 ) + if ( yy_current_state >= 434 ) yy_c = yy_meta[(unsigned int) yy_c]; } yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c]; - yy_is_jam = (yy_current_state == 428); + yy_is_jam = (yy_current_state == 433); if ( ! yy_is_jam ) *yy_state_ptr++ = yy_current_state; @@ -2601,5 +2609,5 @@ return 0; } #endif -#line 353 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 354 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" Index: llvm/lib/AsmParser/llvmAsmParser.cpp diff -u llvm/lib/AsmParser/llvmAsmParser.cpp:1.33 llvm/lib/AsmParser/llvmAsmParser.cpp:1.34 --- llvm/lib/AsmParser/llvmAsmParser.cpp:1.33 Mon Jan 23 17:05:42 2006 +++ llvm/lib/AsmParser/llvmAsmParser.cpp Mon Jan 23 22:14:29 2006 @@ -67,46 +67,47 @@ #define CALL 310 #define TAIL 311 #define ASM_TOK 312 -#define CC_TOK 313 -#define CCC_TOK 314 -#define FASTCC_TOK 315 -#define COLDCC_TOK 316 -#define RET 317 -#define BR 318 -#define SWITCH 319 -#define INVOKE 320 -#define UNWIND 321 -#define UNREACHABLE 322 -#define ADD 323 -#define SUB 324 -#define MUL 325 -#define DIV 326 -#define REM 327 -#define AND 328 -#define OR 329 -#define XOR 330 -#define SETLE 331 -#define SETGE 332 -#define SETLT 333 -#define SETGT 334 -#define SETEQ 335 -#define SETNE 336 -#define MALLOC 337 -#define ALLOCA 338 -#define FREE 339 -#define LOAD 340 -#define STORE 341 -#define GETELEMENTPTR 342 -#define PHI_TOK 343 -#define CAST 344 -#define SELECT 345 -#define SHL 346 -#define SHR 347 -#define VAARG 348 -#define EXTRACTELEMENT 349 -#define INSERTELEMENT 350 -#define VAARG_old 351 -#define VANEXT_old 352 +#define MODULE 313 +#define CC_TOK 314 +#define CCC_TOK 315 +#define FASTCC_TOK 316 +#define COLDCC_TOK 317 +#define RET 318 +#define BR 319 +#define SWITCH 320 +#define INVOKE 321 +#define UNWIND 322 +#define UNREACHABLE 323 +#define ADD 324 +#define SUB 325 +#define MUL 326 +#define DIV 327 +#define REM 328 +#define AND 329 +#define OR 330 +#define XOR 331 +#define SETLE 332 +#define SETGE 333 +#define SETLT 334 +#define SETGT 335 +#define SETEQ 336 +#define SETNE 337 +#define MALLOC 338 +#define ALLOCA 339 +#define FREE 340 +#define LOAD 341 +#define STORE 342 +#define GETELEMENTPTR 343 +#define PHI_TOK 344 +#define CAST 345 +#define SELECT 346 +#define SHL 347 +#define SHR 348 +#define VAARG 349 +#define EXTRACTELEMENT 350 +#define INSERTELEMENT 351 +#define VAARG_old 352 +#define VANEXT_old 353 #line 14 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" @@ -1022,26 +1023,26 @@ -#define YYFINAL 465 +#define YYFINAL 467 #define YYFLAG -32768 -#define YYNTBASE 113 +#define YYNTBASE 114 -#define YYTRANSLATE(x) ((unsigned)(x) <= 352 ? yytranslate[x] : 183) +#define YYTRANSLATE(x) ((unsigned)(x) <= 353 ? yytranslate[x] : 184) static const char yytranslate[] = { 0, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 102, - 103, 111, 2, 100, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 107, - 99, 108, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 103, + 104, 112, 2, 101, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 108, + 100, 109, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 104, 101, 106, 2, 2, 2, 2, 2, 112, 2, + 105, 102, 107, 2, 2, 2, 2, 2, 113, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 105, - 2, 2, 109, 2, 110, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 106, + 2, 2, 110, 2, 111, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, @@ -1064,7 +1065,7 @@ 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, - 97, 98 + 97, 98, 99 }; #if YYDEBUG != 0 @@ -1081,95 +1082,96 @@ 204, 208, 212, 217, 222, 226, 229, 232, 235, 238, 241, 244, 247, 250, 253, 256, 263, 269, 278, 285, 292, 299, 306, 313, 317, 319, 321, 323, 325, 328, - 331, 335, 338, 340, 345, 348, 352, 353, 361, 362, - 370, 374, 379, 380, 382, 384, 386, 390, 394, 398, - 402, 406, 408, 409, 411, 413, 415, 416, 419, 423, - 425, 427, 431, 433, 434, 443, 445, 447, 451, 453, - 455, 458, 459, 463, 465, 467, 469, 471, 473, 475, - 477, 479, 483, 485, 487, 489, 491, 493, 496, 499, - 502, 506, 509, 510, 512, 515, 518, 522, 532, 542, - 551, 565, 567, 569, 576, 582, 585, 592, 600, 602, - 606, 608, 609, 612, 614, 620, 626, 632, 635, 640, - 645, 652, 657, 662, 667, 672, 679, 682, 690, 692, - 695, 696, 698, 699, 703, 710, 714, 721, 724, 729, - 736 + 331, 336, 339, 341, 346, 349, 354, 355, 363, 364, + 372, 376, 381, 382, 384, 386, 388, 392, 396, 400, + 404, 408, 410, 411, 413, 415, 417, 418, 421, 425, + 427, 429, 433, 435, 436, 445, 447, 449, 453, 455, + 457, 460, 461, 465, 467, 469, 471, 473, 475, 477, + 479, 481, 485, 487, 489, 491, 493, 495, 498, 501, + 504, 508, 511, 512, 514, 517, 520, 524, 534, 544, + 553, 567, 569, 571, 578, 584, 587, 594, 602, 604, + 608, 610, 611, 614, 616, 622, 628, 634, 637, 642, + 647, 654, 659, 664, 669, 674, 681, 684, 692, 694, + 697, 698, 700, 701, 705, 712, 716, 723, 726, 731, + 738 }; static const short yyrhs[] = { 5, - 0, 6, 0, 3, 0, 4, 0, 69, 0, 70, - 0, 71, 0, 72, 0, 73, 0, 74, 0, 75, - 0, 76, 0, 77, 0, 78, 0, 79, 0, 80, - 0, 81, 0, 82, 0, 92, 0, 93, 0, 16, + 0, 6, 0, 3, 0, 4, 0, 70, 0, 71, + 0, 72, 0, 73, 0, 74, 0, 75, 0, 76, + 0, 77, 0, 78, 0, 79, 0, 80, 0, 81, + 0, 82, 0, 83, 0, 93, 0, 94, 0, 16, 0, 14, 0, 12, 0, 10, 0, 17, 0, 15, - 0, 13, 0, 11, 0, 119, 0, 120, 0, 18, - 0, 19, 0, 153, 99, 0, 0, 41, 0, 42, - 0, 43, 0, 44, 0, 0, 0, 60, 0, 61, - 0, 62, 0, 59, 4, 0, 0, 54, 4, 0, - 0, 100, 54, 4, 0, 34, 24, 0, 0, 128, - 0, 0, 100, 131, 130, 0, 128, 0, 54, 4, - 0, 134, 0, 8, 0, 136, 0, 8, 0, 136, + 0, 13, 0, 11, 0, 120, 0, 121, 0, 18, + 0, 19, 0, 154, 100, 0, 0, 41, 0, 42, + 0, 43, 0, 44, 0, 0, 0, 61, 0, 62, + 0, 63, 0, 60, 4, 0, 0, 54, 4, 0, + 0, 101, 54, 4, 0, 34, 24, 0, 0, 129, + 0, 0, 101, 132, 131, 0, 129, 0, 54, 4, + 0, 135, 0, 8, 0, 137, 0, 8, 0, 137, 0, 9, 0, 10, 0, 11, 0, 12, 0, 13, 0, 14, 0, 15, 0, 16, 0, 17, 0, 18, - 0, 19, 0, 20, 0, 21, 0, 45, 0, 135, - 0, 166, 0, 101, 4, 0, 133, 102, 138, 103, - 0, 104, 4, 105, 136, 106, 0, 107, 4, 105, - 136, 108, 0, 109, 137, 110, 0, 109, 110, 0, - 136, 111, 0, 136, 0, 137, 100, 136, 0, 137, - 0, 137, 100, 37, 0, 37, 0, 0, 134, 104, - 141, 106, 0, 134, 104, 106, 0, 134, 112, 24, - 0, 134, 107, 141, 108, 0, 134, 109, 141, 110, - 0, 134, 109, 110, 0, 134, 38, 0, 134, 39, - 0, 134, 166, 0, 134, 140, 0, 134, 26, 0, - 119, 114, 0, 120, 4, 0, 9, 27, 0, 9, - 28, 0, 122, 7, 0, 90, 102, 139, 36, 134, - 103, 0, 88, 102, 139, 180, 103, 0, 91, 102, - 139, 100, 139, 100, 139, 103, 0, 115, 102, 139, - 100, 139, 103, 0, 116, 102, 139, 100, 139, 103, - 0, 117, 102, 139, 100, 139, 103, 0, 118, 102, - 139, 100, 139, 103, 0, 95, 102, 139, 100, 139, - 103, 0, 141, 100, 139, 0, 139, 0, 32, 0, - 33, 0, 144, 0, 144, 162, 0, 144, 163, 0, - 144, 58, 148, 0, 144, 25, 0, 145, 0, 145, - 123, 20, 132, 0, 145, 163, 0, 145, 58, 148, - 0, 0, 145, 123, 124, 142, 139, 146, 130, 0, - 0, 145, 123, 47, 142, 134, 147, 130, 0, 145, - 48, 150, 0, 145, 55, 99, 151, 0, 0, 24, - 0, 53, 0, 52, 0, 50, 99, 149, 0, 51, - 99, 4, 0, 49, 99, 24, 0, 104, 152, 106, - 0, 152, 100, 24, 0, 24, 0, 0, 22, 0, - 24, 0, 153, 0, 0, 134, 154, 0, 156, 100, - 155, 0, 155, 0, 156, 0, 156, 100, 37, 0, - 37, 0, 0, 125, 132, 153, 102, 157, 103, 129, - 126, 0, 29, 0, 109, 0, 124, 158, 159, 0, - 30, 0, 110, 0, 169, 161, 0, 0, 31, 164, - 158, 0, 3, 0, 4, 0, 7, 0, 27, 0, - 28, 0, 38, 0, 39, 0, 26, 0, 107, 141, - 108, 0, 140, 0, 113, 0, 153, 0, 166, 0, - 165, 0, 134, 167, 0, 169, 170, 0, 160, 170, - 0, 171, 123, 172, 0, 171, 174, 0, 0, 23, - 0, 63, 168, 0, 63, 8, 0, 64, 21, 167, - 0, 64, 9, 167, 100, 21, 167, 100, 21, 167, - 0, 65, 121, 167, 100, 21, 167, 104, 173, 106, - 0, 65, 121, 167, 100, 21, 167, 104, 106, 0, - 66, 125, 132, 167, 102, 177, 103, 36, 21, 167, - 67, 21, 167, 0, 67, 0, 68, 0, 173, 121, - 165, 100, 21, 167, 0, 121, 165, 100, 21, 167, - 0, 123, 179, 0, 134, 104, 167, 100, 167, 106, - 0, 175, 100, 104, 167, 100, 167, 106, 0, 168, - 0, 176, 100, 168, 0, 176, 0, 0, 57, 56, - 0, 56, 0, 115, 134, 167, 100, 167, 0, 116, - 134, 167, 100, 167, 0, 117, 134, 167, 100, 167, - 0, 46, 168, 0, 118, 168, 100, 168, 0, 90, - 168, 36, 134, 0, 91, 168, 100, 168, 100, 168, - 0, 94, 168, 100, 134, 0, 97, 168, 100, 134, - 0, 98, 168, 100, 134, 0, 95, 168, 100, 168, - 0, 96, 168, 100, 168, 100, 168, 0, 89, 175, - 0, 178, 125, 132, 167, 102, 177, 103, 0, 182, - 0, 100, 176, 0, 0, 35, 0, 0, 83, 134, - 127, 0, 83, 134, 100, 15, 167, 127, 0, 84, - 134, 127, 0, 84, 134, 100, 15, 167, 127, 0, - 85, 168, 0, 181, 86, 134, 167, 0, 181, 87, - 168, 100, 134, 167, 0, 88, 134, 167, 180, 0 + 0, 19, 0, 20, 0, 21, 0, 45, 0, 136, + 0, 167, 0, 102, 4, 0, 134, 103, 139, 104, + 0, 105, 4, 106, 137, 107, 0, 108, 4, 106, + 137, 109, 0, 110, 138, 111, 0, 110, 111, 0, + 137, 112, 0, 137, 0, 138, 101, 137, 0, 138, + 0, 138, 101, 37, 0, 37, 0, 0, 135, 105, + 142, 107, 0, 135, 105, 107, 0, 135, 113, 24, + 0, 135, 108, 142, 109, 0, 135, 110, 142, 111, + 0, 135, 110, 111, 0, 135, 38, 0, 135, 39, + 0, 135, 167, 0, 135, 141, 0, 135, 26, 0, + 120, 115, 0, 121, 4, 0, 9, 27, 0, 9, + 28, 0, 123, 7, 0, 91, 103, 140, 36, 135, + 104, 0, 89, 103, 140, 181, 104, 0, 92, 103, + 140, 101, 140, 101, 140, 104, 0, 116, 103, 140, + 101, 140, 104, 0, 117, 103, 140, 101, 140, 104, + 0, 118, 103, 140, 101, 140, 104, 0, 119, 103, + 140, 101, 140, 104, 0, 96, 103, 140, 101, 140, + 104, 0, 142, 101, 140, 0, 140, 0, 32, 0, + 33, 0, 145, 0, 145, 163, 0, 145, 164, 0, + 145, 59, 58, 149, 0, 145, 25, 0, 146, 0, + 146, 124, 20, 133, 0, 146, 164, 0, 146, 59, + 58, 149, 0, 0, 146, 124, 125, 143, 140, 147, + 131, 0, 0, 146, 124, 47, 143, 135, 148, 131, + 0, 146, 48, 151, 0, 146, 55, 100, 152, 0, + 0, 24, 0, 53, 0, 52, 0, 50, 100, 150, + 0, 51, 100, 4, 0, 49, 100, 24, 0, 105, + 153, 107, 0, 153, 101, 24, 0, 24, 0, 0, + 22, 0, 24, 0, 154, 0, 0, 135, 155, 0, + 157, 101, 156, 0, 156, 0, 157, 0, 157, 101, + 37, 0, 37, 0, 0, 126, 133, 154, 103, 158, + 104, 130, 127, 0, 29, 0, 110, 0, 125, 159, + 160, 0, 30, 0, 111, 0, 170, 162, 0, 0, + 31, 165, 159, 0, 3, 0, 4, 0, 7, 0, + 27, 0, 28, 0, 38, 0, 39, 0, 26, 0, + 108, 142, 109, 0, 141, 0, 114, 0, 154, 0, + 167, 0, 166, 0, 135, 168, 0, 170, 171, 0, + 161, 171, 0, 172, 124, 173, 0, 172, 175, 0, + 0, 23, 0, 64, 169, 0, 64, 8, 0, 65, + 21, 168, 0, 65, 9, 168, 101, 21, 168, 101, + 21, 168, 0, 66, 122, 168, 101, 21, 168, 105, + 174, 107, 0, 66, 122, 168, 101, 21, 168, 105, + 107, 0, 67, 126, 133, 168, 103, 178, 104, 36, + 21, 168, 68, 21, 168, 0, 68, 0, 69, 0, + 174, 122, 166, 101, 21, 168, 0, 122, 166, 101, + 21, 168, 0, 124, 180, 0, 135, 105, 168, 101, + 168, 107, 0, 176, 101, 105, 168, 101, 168, 107, + 0, 169, 0, 177, 101, 169, 0, 177, 0, 0, + 57, 56, 0, 56, 0, 116, 135, 168, 101, 168, + 0, 117, 135, 168, 101, 168, 0, 118, 135, 168, + 101, 168, 0, 46, 169, 0, 119, 169, 101, 169, + 0, 91, 169, 36, 135, 0, 92, 169, 101, 169, + 101, 169, 0, 95, 169, 101, 135, 0, 98, 169, + 101, 135, 0, 99, 169, 101, 135, 0, 96, 169, + 101, 169, 0, 97, 169, 101, 169, 101, 169, 0, + 90, 176, 0, 179, 126, 133, 168, 103, 178, 104, + 0, 183, 0, 101, 177, 0, 0, 35, 0, 0, + 84, 135, 128, 0, 84, 135, 101, 15, 168, 128, + 0, 85, 135, 128, 0, 85, 135, 101, 15, 168, + 128, 0, 86, 169, 0, 182, 87, 135, 168, 0, + 182, 88, 169, 101, 135, 168, 0, 89, 135, 168, + 181, 0 }; #endif @@ -1185,21 +1187,21 @@ 1112, 1112, 1112, 1112, 1112, 1112, 1112, 1113, 1113, 1113, 1113, 1113, 1113, 1114, 1117, 1120, 1126, 1133, 1145, 1149, 1160, 1169, 1172, 1180, 1184, 1189, 1190, 1193, 1196, 1206, - 1231, 1244, 1272, 1297, 1317, 1329, 1338, 1342, 1401, 1407, - 1415, 1420, 1425, 1428, 1431, 1438, 1448, 1479, 1486, 1507, - 1517, 1522, 1529, 1539, 1542, 1549, 1549, 1559, 1566, 1570, - 1573, 1576, 1579, 1592, 1612, 1614, 1616, 1619, 1622, 1626, - 1629, 1631, 1633, 1637, 1646, 1647, 1649, 1652, 1660, 1665, - 1667, 1671, 1675, 1683, 1683, 1684, 1684, 1686, 1692, 1697, - 1703, 1706, 1711, 1715, 1719, 1805, 1805, 1807, 1815, 1815, - 1817, 1821, 1821, 1830, 1833, 1836, 1839, 1842, 1845, 1848, - 1851, 1854, 1878, 1885, 1888, 1893, 1893, 1899, 1903, 1906, - 1914, 1923, 1927, 1937, 1948, 1951, 1954, 1957, 1960, 1974, - 1978, 2031, 2034, 2040, 2048, 2058, 2065, 2070, 2077, 2081, - 2087, 2087, 2089, 2092, 2098, 2110, 2121, 2131, 2143, 2150, - 2157, 2164, 2169, 2188, 2210, 2218, 2230, 2244, 2301, 2307, - 2309, 2313, 2316, 2322, 2326, 2330, 2334, 2338, 2345, 2355, - 2368 + 1231, 1244, 1273, 1298, 1318, 1330, 1339, 1343, 1402, 1408, + 1416, 1421, 1426, 1429, 1432, 1439, 1449, 1480, 1487, 1508, + 1518, 1523, 1530, 1540, 1543, 1550, 1550, 1560, 1567, 1571, + 1574, 1577, 1580, 1593, 1613, 1615, 1617, 1620, 1623, 1627, + 1630, 1632, 1634, 1638, 1650, 1651, 1653, 1656, 1664, 1669, + 1671, 1675, 1679, 1687, 1687, 1688, 1688, 1690, 1696, 1701, + 1707, 1710, 1715, 1719, 1723, 1809, 1809, 1811, 1819, 1819, + 1821, 1825, 1825, 1834, 1837, 1840, 1843, 1846, 1849, 1852, + 1855, 1858, 1882, 1889, 1892, 1897, 1897, 1903, 1907, 1910, + 1918, 1927, 1931, 1941, 1952, 1955, 1958, 1961, 1964, 1978, + 1982, 2035, 2038, 2044, 2052, 2062, 2069, 2074, 2081, 2085, + 2091, 2091, 2093, 2096, 2102, 2114, 2125, 2135, 2147, 2154, + 2161, 2168, 2173, 2192, 2214, 2222, 2234, 2248, 2305, 2311, + 2313, 2317, 2320, 2326, 2330, 2334, 2338, 2342, 2349, 2359, + 2372 }; #endif @@ -1213,18 +1215,18 @@ "BEGINTOK","ENDTOK","DECLARE","GLOBAL","CONSTANT","SECTION","VOLATILE","TO", "DOTDOTDOT","NULL_TOK","UNDEF","CONST","INTERNAL","LINKONCE","WEAK","APPENDING", "OPAQUE","NOT","EXTERNAL","TARGET","TRIPLE","ENDIAN","POINTERSIZE","LITTLE", -"BIG","ALIGN","DEPLIBS","CALL","TAIL","ASM_TOK","CC_TOK","CCC_TOK","FASTCC_TOK", -"COLDCC_TOK","RET","BR","SWITCH","INVOKE","UNWIND","UNREACHABLE","ADD","SUB", -"MUL","DIV","REM","AND","OR","XOR","SETLE","SETGE","SETLT","SETGT","SETEQ","SETNE", -"MALLOC","ALLOCA","FREE","LOAD","STORE","GETELEMENTPTR","PHI_TOK","CAST","SELECT", -"SHL","SHR","VAARG","EXTRACTELEMENT","INSERTELEMENT","VAARG_old","VANEXT_old", -"'='","','","'\\\\'","'('","')'","'['","'x'","']'","'<'","'>'","'{'","'}'","'*'", -"'c'","INTVAL","EINT64VAL","ArithmeticOps","LogicalOps","SetCondOps","ShiftOps", -"SIntType","UIntType","IntType","FPType","OptAssign","OptLinkage","OptCallingConv", -"OptAlign","OptCAlign","SectionString","OptSection","GlobalVarAttributes","GlobalVarAttribute", -"TypesV","UpRTypesV","Types","PrimType","UpRTypes","TypeListI","ArgTypeListI", -"ConstVal","ConstExpr","ConstVector","GlobalType","Module","FunctionList","ConstPool", -"@1","@2","AsmBlock","BigOrLittle","TargetDefinition","LibrariesDefinition", +"BIG","ALIGN","DEPLIBS","CALL","TAIL","ASM_TOK","MODULE","CC_TOK","CCC_TOK", +"FASTCC_TOK","COLDCC_TOK","RET","BR","SWITCH","INVOKE","UNWIND","UNREACHABLE", +"ADD","SUB","MUL","DIV","REM","AND","OR","XOR","SETLE","SETGE","SETLT","SETGT", +"SETEQ","SETNE","MALLOC","ALLOCA","FREE","LOAD","STORE","GETELEMENTPTR","PHI_TOK", +"CAST","SELECT","SHL","SHR","VAARG","EXTRACTELEMENT","INSERTELEMENT","VAARG_old", +"VANEXT_old","'='","','","'\\\\'","'('","')'","'['","'x'","']'","'<'","'>'", +"'{'","'}'","'*'","'c'","INTVAL","EINT64VAL","ArithmeticOps","LogicalOps","SetCondOps", +"ShiftOps","SIntType","UIntType","IntType","FPType","OptAssign","OptLinkage", +"OptCallingConv","OptAlign","OptCAlign","SectionString","OptSection","GlobalVarAttributes", +"GlobalVarAttribute","TypesV","UpRTypesV","Types","PrimType","UpRTypes","TypeListI", +"ArgTypeListI","ConstVal","ConstExpr","ConstVector","GlobalType","Module","FunctionList", +"ConstPool","@1","@2","AsmBlock","BigOrLittle","TargetDefinition","LibrariesDefinition", "LibList","Name","OptName","ArgVal","ArgListH","ArgList","FunctionHeaderH","BEGIN", "FunctionHeader","END","Function","FunctionProto","@3","ConstValueRef","SymbolicValueRef", "ValueRef","ResolvedVal","BasicBlockList","BasicBlock","InstructionList","BBTerminatorInst", @@ -1234,30 +1236,30 @@ #endif static const short yyr1[] = { 0, - 113, 113, 114, 114, 115, 115, 115, 115, 115, 116, - 116, 116, 117, 117, 117, 117, 117, 117, 118, 118, - 119, 119, 119, 119, 120, 120, 120, 120, 121, 121, - 122, 122, 123, 123, 124, 124, 124, 124, 124, 125, - 125, 125, 125, 125, 126, 126, 127, 127, 128, 129, - 129, 130, 130, 131, 131, 132, 132, 133, 133, 134, - 135, 135, 135, 135, 135, 135, 135, 135, 135, 135, - 135, 135, 135, 136, 136, 136, 136, 136, 136, 136, - 136, 136, 136, 137, 137, 138, 138, 138, 138, 139, - 139, 139, 139, 139, 139, 139, 139, 139, 139, 139, - 139, 139, 139, 139, 139, 140, 140, 140, 140, 140, - 140, 140, 140, 141, 141, 142, 142, 143, 144, 144, - 144, 144, 144, 145, 145, 145, 146, 145, 147, 145, - 145, 145, 145, 148, 149, 149, 150, 150, 150, 151, - 152, 152, 152, 153, 153, 154, 154, 155, 156, 156, - 157, 157, 157, 157, 158, 159, 159, 160, 161, 161, - 162, 164, 163, 165, 165, 165, 165, 165, 165, 165, - 165, 165, 165, 166, 166, 167, 167, 168, 169, 169, - 170, 171, 171, 171, 172, 172, 172, 172, 172, 172, - 172, 172, 172, 173, 173, 174, 175, 175, 176, 176, - 177, 177, 178, 178, 179, 179, 179, 179, 179, 179, - 179, 179, 179, 179, 179, 179, 179, 179, 179, 180, - 180, 181, 181, 182, 182, 182, 182, 182, 182, 182, - 182 + 114, 114, 115, 115, 116, 116, 116, 116, 116, 117, + 117, 117, 118, 118, 118, 118, 118, 118, 119, 119, + 120, 120, 120, 120, 121, 121, 121, 121, 122, 122, + 123, 123, 124, 124, 125, 125, 125, 125, 125, 126, + 126, 126, 126, 126, 127, 127, 128, 128, 129, 130, + 130, 131, 131, 132, 132, 133, 133, 134, 134, 135, + 136, 136, 136, 136, 136, 136, 136, 136, 136, 136, + 136, 136, 136, 137, 137, 137, 137, 137, 137, 137, + 137, 137, 137, 138, 138, 139, 139, 139, 139, 140, + 140, 140, 140, 140, 140, 140, 140, 140, 140, 140, + 140, 140, 140, 140, 140, 141, 141, 141, 141, 141, + 141, 141, 141, 142, 142, 143, 143, 144, 145, 145, + 145, 145, 145, 146, 146, 146, 147, 146, 148, 146, + 146, 146, 146, 149, 150, 150, 151, 151, 151, 152, + 153, 153, 153, 154, 154, 155, 155, 156, 157, 157, + 158, 158, 158, 158, 159, 160, 160, 161, 162, 162, + 163, 165, 164, 166, 166, 166, 166, 166, 166, 166, + 166, 166, 166, 167, 167, 168, 168, 169, 170, 170, + 171, 172, 172, 172, 173, 173, 173, 173, 173, 173, + 173, 173, 173, 174, 174, 175, 176, 176, 177, 177, + 178, 178, 179, 179, 180, 180, 180, 180, 180, 180, + 180, 180, 180, 180, 180, 180, 180, 180, 180, 181, + 181, 182, 182, 183, 183, 183, 183, 183, 183, 183, + 183 }; static const short yyr2[] = { 0, @@ -1273,7 +1275,7 @@ 3, 3, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 6, 5, 8, 6, 6, 6, 6, 6, 3, 1, 1, 1, 1, 2, 2, - 3, 2, 1, 4, 2, 3, 0, 7, 0, 7, + 4, 2, 1, 4, 2, 4, 0, 7, 0, 7, 3, 4, 0, 1, 1, 1, 3, 3, 3, 3, 3, 1, 0, 1, 1, 1, 0, 2, 3, 1, 1, 3, 1, 0, 8, 1, 1, 3, 1, 1, @@ -1290,371 +1292,395 @@ static const short yydefact[] = { 133, 39, 123, 122, 162, 35, 36, 37, 38, 0, 40, 183, 119, 120, 183, 144, 145, 0, 0, 0, 39, - 0, 125, 40, 134, 121, 0, 41, 42, 43, 0, - 0, 184, 180, 34, 159, 160, 161, 179, 0, 0, - 0, 131, 0, 126, 0, 0, 0, 33, 163, 44, - 1, 2, 57, 61, 62, 63, 64, 65, 66, 67, - 68, 69, 70, 71, 72, 73, 74, 0, 0, 0, - 0, 174, 0, 0, 56, 75, 60, 175, 76, 156, - 157, 158, 223, 182, 0, 0, 0, 143, 132, 124, - 116, 117, 0, 0, 77, 0, 0, 59, 82, 84, - 0, 0, 89, 83, 222, 0, 204, 0, 0, 0, - 0, 40, 192, 193, 5, 6, 7, 8, 9, 10, - 11, 12, 13, 14, 15, 16, 17, 18, 0, 0, - 0, 0, 0, 0, 0, 19, 20, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 181, 40, 196, 0, - 219, 139, 136, 135, 137, 138, 142, 0, 129, 61, - 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, - 0, 0, 0, 0, 127, 0, 0, 0, 81, 154, - 88, 86, 0, 0, 208, 203, 186, 185, 0, 0, - 24, 28, 23, 27, 22, 26, 21, 25, 29, 30, - 0, 0, 47, 47, 228, 0, 0, 217, 0, 0, + 0, 125, 40, 0, 0, 41, 42, 43, 0, 0, + 184, 180, 34, 159, 160, 161, 179, 0, 0, 0, + 131, 0, 0, 0, 0, 0, 33, 163, 134, 121, + 44, 1, 2, 57, 61, 62, 63, 64, 65, 66, + 67, 68, 69, 70, 71, 72, 73, 74, 0, 0, + 0, 0, 174, 0, 0, 56, 75, 60, 175, 76, + 156, 157, 158, 223, 182, 0, 0, 0, 143, 132, + 126, 124, 116, 117, 0, 0, 77, 0, 0, 59, + 82, 84, 0, 0, 89, 83, 222, 0, 204, 0, + 0, 0, 0, 40, 192, 193, 5, 6, 7, 8, + 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, + 0, 0, 0, 0, 0, 0, 0, 19, 20, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 181, 40, + 196, 0, 219, 139, 136, 135, 137, 138, 142, 0, + 129, 61, 62, 63, 64, 65, 66, 67, 68, 69, + 70, 71, 0, 0, 0, 0, 127, 0, 0, 0, + 81, 154, 88, 86, 0, 0, 208, 203, 186, 185, + 0, 0, 24, 28, 23, 27, 22, 26, 21, 25, + 29, 30, 0, 0, 47, 47, 228, 0, 0, 217, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 140, 52, 103, 104, 3, 4, 101, - 102, 105, 100, 96, 97, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 99, 98, 52, - 58, 58, 85, 153, 147, 150, 151, 0, 0, 78, - 164, 165, 166, 171, 167, 168, 169, 170, 0, 173, - 177, 176, 178, 0, 187, 0, 0, 0, 224, 0, - 226, 221, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 141, 0, - 130, 0, 0, 0, 0, 91, 115, 0, 0, 95, - 0, 92, 0, 0, 0, 0, 128, 79, 80, 146, - 148, 0, 50, 87, 0, 0, 0, 0, 0, 0, - 0, 0, 231, 0, 0, 210, 0, 212, 215, 0, - 213, 214, 0, 0, 0, 209, 0, 229, 0, 0, - 0, 54, 52, 221, 0, 0, 0, 0, 90, 93, - 94, 0, 0, 0, 0, 152, 149, 51, 45, 172, - 0, 0, 202, 47, 48, 47, 199, 220, 0, 0, - 0, 0, 205, 206, 207, 202, 0, 49, 55, 53, - 0, 0, 0, 0, 114, 0, 0, 0, 0, 0, - 155, 0, 0, 201, 0, 0, 225, 227, 0, 0, - 0, 211, 216, 0, 230, 107, 0, 0, 0, 0, - 0, 0, 0, 46, 0, 0, 0, 200, 197, 0, - 218, 106, 0, 113, 109, 110, 111, 112, 0, 190, - 0, 0, 0, 198, 0, 188, 0, 189, 0, 0, - 108, 0, 0, 0, 0, 0, 0, 195, 0, 0, - 194, 191, 0, 0, 0 + 0, 0, 0, 0, 0, 140, 52, 103, 104, 3, + 4, 101, 102, 105, 100, 96, 97, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 99, + 98, 52, 58, 58, 85, 153, 147, 150, 151, 0, + 0, 78, 164, 165, 166, 171, 167, 168, 169, 170, + 0, 173, 177, 176, 178, 0, 187, 0, 0, 0, + 224, 0, 226, 221, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 141, 0, 130, 0, 0, 0, 0, 91, 115, 0, + 0, 95, 0, 92, 0, 0, 0, 0, 128, 79, + 80, 146, 148, 0, 50, 87, 0, 0, 0, 0, + 0, 0, 0, 0, 231, 0, 0, 210, 0, 212, + 215, 0, 213, 214, 0, 0, 0, 209, 0, 229, + 0, 0, 0, 54, 52, 221, 0, 0, 0, 0, + 90, 93, 94, 0, 0, 0, 0, 152, 149, 51, + 45, 172, 0, 0, 202, 47, 48, 47, 199, 220, + 0, 0, 0, 0, 205, 206, 207, 202, 0, 49, + 55, 53, 0, 0, 0, 0, 114, 0, 0, 0, + 0, 0, 155, 0, 0, 201, 0, 0, 225, 227, + 0, 0, 0, 211, 216, 0, 230, 107, 0, 0, + 0, 0, 0, 0, 0, 46, 0, 0, 0, 200, + 197, 0, 218, 106, 0, 113, 109, 110, 111, 112, + 0, 190, 0, 0, 0, 198, 0, 188, 0, 189, + 0, 0, 108, 0, 0, 0, 0, 0, 0, 195, + 0, 0, 194, 191, 0, 0, 0 }; -static const short yydefgoto[] = { 72, - 230, 244, 245, 246, 247, 171, 172, 201, 173, 20, - 10, 30, 401, 279, 352, 369, 301, 353, 73, 74, - 184, 76, 77, 101, 183, 307, 270, 308, 93, 463, - 1, 2, 250, 225, 25, 155, 42, 89, 158, 78, - 321, 256, 257, 258, 31, 82, 11, 37, 12, 13, - 23, 271, 79, 273, 377, 14, 33, 34, 147, 442, - 84, 208, 404, 405, 148, 149, 333, 150, 151 +static const short yydefgoto[] = { 73, + 232, 246, 247, 248, 249, 173, 174, 203, 175, 20, + 10, 29, 403, 281, 354, 371, 303, 355, 74, 75, + 186, 77, 78, 103, 185, 309, 272, 310, 95, 465, + 1, 2, 252, 227, 50, 157, 41, 90, 160, 79, + 323, 258, 259, 260, 30, 83, 11, 36, 12, 13, + 23, 273, 80, 275, 379, 14, 32, 33, 149, 444, + 85, 210, 406, 407, 150, 151, 335, 152, 153 }; static const short yypact[] = {-32768, - 164, 551,-32768,-32768,-32768,-32768,-32768,-32768, -12, 47, - 6,-32768,-32768, -13,-32768,-32768, 90, -27, -12, 49, - -23,-32768, 47,-32768,-32768, 84,-32768,-32768,-32768, 935, - -20,-32768,-32768, 96,-32768,-32768,-32768,-32768, 2, 18, - 25,-32768, 1,-32768, 935, 79, 79,-32768,-32768,-32768, --32768,-32768, 60,-32768,-32768,-32768,-32768,-32768,-32768,-32768, --32768,-32768,-32768,-32768,-32768,-32768,-32768, 167, 173, 180, - 450,-32768, 96, 94,-32768,-32768, -69,-32768,-32768,-32768, --32768,-32768, 1098,-32768, 174, 114, 193, 175,-32768,-32768, --32768,-32768, 973, 1011,-32768, 95, 97,-32768,-32768, -69, - -66, 99, 745,-32768,-32768, 973,-32768, 147, 1049, 50, - 142, 47,-32768,-32768,-32768,-32768,-32768,-32768,-32768,-32768, --32768,-32768,-32768,-32768,-32768,-32768,-32768,-32768, 973, 973, - 973, 973, 973, 973, 973,-32768,-32768, 973, 973, 973, - 973, 973, 973, 973, 973, 973,-32768, 47,-32768, 83, --32768,-32768,-32768,-32768,-32768,-32768,-32768, -19,-32768, 115, - 170, 205, 172, 213, 178, 214, 184, 215, 216, 221, - 190, 217, 222, 56,-32768, 973, 973, 973,-32768, 783, --32768, 131, 129, 563,-32768,-32768, 60,-32768, 563, 563, + 37, 361,-32768,-32768,-32768,-32768,-32768,-32768, -44, 49, + 38,-32768,-32768, 3,-32768,-32768, 70, -2, 42, 50, + 4,-32768, 49, 89, 125,-32768,-32768,-32768, 1054, -21, +-32768,-32768, 64,-32768,-32768,-32768,-32768, 26, 45, 47, +-32768, 69, 89, 1054, 117, 117,-32768,-32768,-32768,-32768, +-32768,-32768,-32768, 73,-32768,-32768,-32768,-32768,-32768,-32768, +-32768,-32768,-32768,-32768,-32768,-32768,-32768,-32768, 174, 179, + 180, 122,-32768, 64, 82,-32768,-32768, -27,-32768,-32768, +-32768,-32768,-32768, 1215,-32768, 163, -25, 186, 168,-32768, +-32768,-32768,-32768,-32768, 1092, 1130,-32768, 85, 90,-32768, +-32768, -27, -38, 94, 864,-32768,-32768, 1092,-32768, 142, + 1168, 23, 144, 49,-32768,-32768,-32768,-32768,-32768,-32768, -32768,-32768,-32768,-32768,-32768,-32768,-32768,-32768,-32768,-32768, - 563, 935, 133, 134,-32768, 563, 136, 137, 202, 141, - 143, 144, 145, 146, 148, 563, 563, 563, 149, 935, - 973, 973, 218,-32768, 150,-32768,-32768,-32768,-32768,-32768, --32768,-32768,-32768,-32768,-32768, 154, 156, 157, 165, 821, - 1011, 520, 227, 166, 169, 185, 186,-32768,-32768, 150, - -32, -25, -69,-32768, 96,-32768, 176, 187, 859,-32768, --32768,-32768,-32768,-32768,-32768,-32768,-32768,-32768, 1011,-32768, --32768,-32768,-32768, 177,-32768, 189, 563, 3,-32768, 4, --32768, 191, 563, 192, 973, 973, 973, 973, 973, 973, - 973, 194, 195, 197, 973, 563, 563, 198,-32768, 12, --32768, 1011, 1011, 1011, 1011,-32768,-32768, -2, -35,-32768, - -40,-32768, 1011, 1011, 1011, 1011,-32768,-32768,-32768,-32768, --32768, 897, 259,-32768, -33, 278, 279, 199, 563, 298, - 563, 973,-32768, 203, 563,-32768, 211,-32768,-32768, 212, --32768,-32768, 563, 563, 563,-32768, 219,-32768, 973, 289, - 310,-32768, 150, 191, 282, 220, 224, 1011,-32768,-32768, --32768, 225, 226, 230, 231,-32768,-32768,-32768, 261,-32768, - 563, 563, 973, 234,-32768, 234,-32768, 235, 563, 236, - 973, 973,-32768,-32768,-32768, 973, 563,-32768,-32768,-32768, - 237, 973, 1011, 1011,-32768, 1011, 1011, 1011, 1011, 318, --32768, 238, 223, 235, 242, 283,-32768,-32768, 973, 233, - 563,-32768,-32768, 243,-32768,-32768, 245, 249, 247, 248, - 250, 251, 252,-32768, 331, 10, 320,-32768,-32768, 253, --32768,-32768, 1011,-32768,-32768,-32768,-32768,-32768, 563,-32768, - 645, 39, 336,-32768, 255,-32768, 265,-32768, 645, 563, --32768, 349, 271, 305, 563, 352, 353,-32768, 563, 563, --32768,-32768, 376, 378,-32768 + 1092, 1092, 1092, 1092, 1092, 1092, 1092,-32768,-32768, 1092, + 1092, 1092, 1092, 1092, 1092, 1092, 1092, 1092,-32768, 49, +-32768, 75,-32768,-32768,-32768,-32768,-32768,-32768,-32768, -36, +-32768, 124, 162, 195, 165, 196, 167, 197, 169, 198, + 200, 201, 177, 199, 209, 531,-32768, 1092, 1092, 1092, +-32768, 902,-32768, 103, 101, 680,-32768,-32768, 73,-32768, + 680, 680,-32768,-32768,-32768,-32768,-32768,-32768,-32768,-32768, +-32768,-32768, 680, 1054, 116, 118,-32768, 680, 113, 127, + 189, 130, 133, 134, 135, 136, 137, 680, 680, 680, + 139, 1054, 1092, 1092, 202,-32768, 140,-32768,-32768,-32768, +-32768,-32768,-32768,-32768,-32768,-32768,-32768, 143, 145, 146, + 147, 940, 1130, 637, 219, 148, 149, 150, 151,-32768, +-32768, 140, -35, -64, -27,-32768, 64,-32768, 154, 153, + 978,-32768,-32768,-32768,-32768,-32768,-32768,-32768,-32768,-32768, + 1130,-32768,-32768,-32768,-32768, 158,-32768, 161, 680, -5, +-32768, 15,-32768, 173, 680, 164, 1092, 1092, 1092, 1092, + 1092, 1092, 1092, 178, 182, 183, 1092, 680, 680, 184, +-32768, -18,-32768, 1130, 1130, 1130, 1130,-32768,-32768, -6, + -26,-32768, -37,-32768, 1130, 1130, 1130, 1130,-32768,-32768, +-32768,-32768,-32768, 1016, 213,-32768, -19, 245, 247, 187, + 680, 266, 680, 1092,-32768, 190, 680,-32768, 191,-32768, +-32768, 192,-32768,-32768, 680, 680, 680,-32768, 193,-32768, + 1092, 256, 290,-32768, 140, 173, 261, 206, 207, 1130, +-32768,-32768,-32768, 210, 211, 212, 214,-32768,-32768,-32768, + 244,-32768, 680, 680, 1092, 215,-32768, 215,-32768, 218, + 680, 220, 1092, 1092,-32768,-32768,-32768, 1092, 680,-32768, +-32768,-32768, 216, 1092, 1130, 1130,-32768, 1130, 1130, 1130, + 1130, 295,-32768, 222, 205, 218, 221, 248,-32768,-32768, + 1092, 217, 680,-32768,-32768, 223,-32768,-32768, 224, 225, + 231, 232, 233, 235, 238,-32768, 293, 8, 307,-32768, +-32768, 237,-32768,-32768, 1130,-32768,-32768,-32768,-32768,-32768, + 680,-32768, 763, 41, 324,-32768, 243,-32768, 249,-32768, + 763, 680,-32768, 327, 252, 281, 680, 333, 334,-32768, + 680, 680,-32768,-32768, 359, 360,-32768 }; static const short yypgoto[] = {-32768, --32768, 296, 297, 299, 300, -110, -109, -412,-32768, 350, - 365, -101,-32768, -196, 63,-32768, -243,-32768, -41,-32768, - -30,-32768, -55, 284,-32768, -89, 228, -201, 341,-32768, --32768,-32768,-32768,-32768, 373,-32768,-32768,-32768,-32768, 11, --32768, 72,-32768,-32768, 374,-32768,-32768,-32768,-32768, 394, --32768, -364, 46, 64, -103,-32768, 384,-32768,-32768,-32768, --32768,-32768, 68, 15,-32768,-32768, 51,-32768,-32768 +-32768, 277, 278, 279, 280, -111, -110, -415,-32768, 335, + 353, -103,-32768, -199, 51,-32768, -247,-32768, -40,-32768, + -29,-32768, -55, 269,-32768, -95, 203, -184, 329,-32768, +-32768,-32768,-32768,-32768, 337,-32768,-32768,-32768,-32768, 10, +-32768, 54,-32768,-32768, 354,-32768,-32768,-32768,-32768, 380, +-32768, -344, 53, 138, -102,-32768, 373,-32768,-32768,-32768, +-32768,-32768, 55, 0,-32768,-32768, 35,-32768,-32768 }; -#define YYLAST 1196 +#define YYLAST 1314 -static const short yytable[] = { 75, - 199, 200, 185, 90, 175, 188, 317, 281, 80, 32, - 202, 24, 21, 441, 75, 100, 35, 329, 331, 191, - 192, 193, 194, 195, 196, 197, 198, 205, 32, 449, - 209, 210, -58, 178, 211, 212, 213, 214, 215, 309, - 311, 104, 219, 179, 21, 350, 220, 100, 191, 192, - 193, 194, 195, 196, 197, 198, 330, 330, 189, 358, - 51, 52, 159, 174, 358, 351, 358, 325, 45, 361, - 190, 43, 360, 318, 370, 48, 447, 15, 104, 16, - 223, 233, 319, 102, 453, 104, 224, 50, 81, 5, - 6, 7, 8, 234, 235, 46, 36, 358, 203, 204, - 85, 206, 207, 359, 88, 26, 27, 28, 29, 390, - 91, 92, 216, 217, 218, 440, 86, 15, 298, 16, - 251, 252, 253, 87, 115, 116, 117, 118, 119, 120, - 121, 122, 123, 124, 125, 126, 127, 128, 39, 40, - 41, 226, 227, 236, 448, 237, 238, 136, 137, 255, - 239, 191, 192, 193, 194, 195, 196, 197, 198, 240, - 277, -59, 241, -118, 242, 153, 154, 243, 221, 222, - 95, 75, -24, -24, -23, -23, 96, 407, 296, 408, - -22, -22, 337, 97, 339, 340, -21, -21, 3, 75, - 297, 346, 228, 229, 4, 103, 156, 152, 157, 176, - 180, 177, 186, 253, 5, 6, 7, 8, -28, 174, - 174, 174, 354, 355, 356, 357, -27, -26, -25, 249, - 231, 9, -31, 362, 363, 364, 365, -32, 232, 272, - 259, 260, 278, 280, 272, 272, 284, 285, 174, 283, - 286, 299, 287, 288, 289, 290, 272, 291, 295, 300, - 312, 272, 274, 275, 336, 302, 338, 303, 304, 341, - 342, 272, 272, 272, 276, 320, 305, 313, 395, 282, - 314, 174, 174, 174, 174, 322, 326, 412, 413, 292, - 293, 294, 174, 174, 174, 174, 315, 316, 327, 323, - 332, 255, 350, 343, 344, 335, 345, 349, 371, 372, - 373, 375, 379, 418, 419, 428, 420, 421, 422, 423, - 381, 382, 388, 389, 400, 199, 200, 392, 387, 393, - 386, 424, 272, 394, 396, 397, 426, 174, 272, 398, - 399, 199, 200, 406, 409, 411, 330, 425, 429, 416, - 328, 272, 272, 445, 427, 431, 334, 432, 433, 434, - 435, 439, 436, 437, 438, 443, 450, 451, 444, 347, - 348, 417, 174, 174, 452, 174, 174, 174, 174, 455, - 456, 457, 459, 460, 272, 464, 272, 465, 143, 144, - 272, 145, 146, 83, 47, 368, 182, 94, 272, 272, - 272, 44, 374, 367, 376, 22, 49, 38, 380, 378, - 414, 248, 174, 0, 391, 0, 383, 384, 385, 0, - 0, 0, 0, 0, 0, 0, 272, 272, 0, 0, - 0, 0, 0, 0, 272, 0, 0, 0, 0, 0, - 0, 0, 272, 0, 402, 403, 0, 0, 0, 0, - 0, 0, 410, 0, 0, 0, 0, 0, 0, 0, - 415, 0, 0, 0, 51, 52, 272, 98, 54, 55, - 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, - 66, 15, 0, 16, 430, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 272, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 67, 272, 0, 0, 0, 0, - 272, 0, 446, 0, 272, 272, 0, 0, 0, 0, - 0, 0, 0, 454, 0, 0, 0, 0, 458, 0, - 0, 0, 461, 462, 51, 52, 0, 98, 160, 161, - 162, 163, 164, 165, 166, 167, 168, 169, 170, 65, - 66, 15, 0, 16, 0, 0, 0, 0, 0, 0, - 68, 0, 0, 69, 0, 0, 70, 0, 71, 99, - 0, 0, 0, 0, 67, 261, 262, 51, 52, 263, - -34, 0, 15, 0, 16, 0, 0, 0, 0, 0, - 0, 4, -34, -34, 15, 0, 16, 0, 264, 265, - 266, -34, -34, -34, -34, 0, 0, -34, 17, 0, - 267, 268, 0, 0, 0, 18, 0, 0, 19, 0, +static const short yytable[] = { 76, + 177, 201, 202, 92, 319, 187, 283, 81, 190, 331, + 204, 21, 443, 24, 76, 352, 102, 193, 194, 195, + 196, 197, 198, 199, 200, 31, 155, 156, 451, 333, + 207, 191, 34, 211, 212, 353, -118, 213, 214, 215, + 216, 217, 21, 192, 321, 221, 222, 106, 332, 102, + 193, 194, 195, 196, 197, 198, 199, 200, 311, 313, + 31, 3, 180, 360, 225, 161, 176, 4, 332, 44, + 226, 320, 181, 363, 360, -58, 106, 5, 6, 7, + 8, 360, 362, 104, 106, 15, 327, 16, 82, 372, + 5, 6, 7, 8, 360, 9, 45, 42, 449, 43, + 361, 205, 206, 47, 208, 209, 455, 392, 25, 26, + 27, 28, 49, 35, 442, 218, 219, 220, 38, 39, + 40, 300, 253, 254, 255, 86, 52, 53, 51, 100, + 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, + 65, 66, 67, 15, 87, 16, 88, 450, 93, 94, + 228, 229, 257, 193, 194, 195, 196, 197, 198, 199, + 200, 223, 224, 279, -24, -24, 68, -23, -23, -22, + -22, -21, -21, 89, 76, -59, 409, 97, 410, 230, + 231, 298, 98, 99, 105, 339, 154, 341, 342, 158, + 178, 159, 76, 299, 348, 179, 182, 188, -28, -27, + -26, -25, 233, 261, 262, 255, -31, -32, 356, 357, + 358, 359, 176, 176, 176, 234, 280, 285, 282, 364, + 365, 366, 367, 69, 287, 301, 70, 286, 251, 71, + 288, 72, 101, 289, 290, 291, 292, 293, 274, 297, + 302, 176, 314, 274, 274, 304, 352, 305, 306, 307, + 315, 316, 317, 318, 324, 274, 325, 338, 328, 340, + 274, 329, 343, 344, 397, 373, 322, 374, 337, 377, + 274, 274, 274, 334, 176, 176, 176, 176, 345, 390, + 414, 415, 346, 347, 351, 176, 176, 176, 176, 375, + 381, 383, 384, 391, 257, 388, 394, 402, 426, 420, + 421, 332, 422, 423, 424, 425, 395, 396, 430, 428, + 398, 399, 400, 441, 401, 408, 201, 202, 411, 418, + 413, 389, 427, 431, 429, 435, 433, 434, 276, 277, + 176, 274, 201, 202, 436, 437, 438, 274, 439, 447, + 278, 440, 445, 446, 452, 284, 453, 457, 459, 454, + 274, 274, 458, 461, 462, 294, 295, 296, 466, 467, + 145, 146, 147, 148, 419, 176, 176, 84, 176, 176, + 176, 176, 46, 184, 96, 370, 48, 369, 250, 91, + -34, 22, 15, 274, 16, 274, 37, 416, 380, 274, + 393, 4, -34, -34, 0, 0, 0, 274, 274, 274, + 0, -34, -34, -34, -34, 176, 0, -34, 17, 0, + 0, 0, 0, 0, 0, 18, 330, 0, 0, 19, + 0, 0, 336, 0, 0, 274, 274, 0, 0, 0, + 0, 0, 0, 274, 0, 349, 350, 0, 0, 0, + 0, 274, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 68, 0, 0, 69, 0, 0, 70, 0, 71, 310, - 0, 115, 116, 117, 118, 119, 120, 121, 122, 123, - 124, 125, 126, 127, 128, 0, 0, 261, 262, 0, - 236, 263, 237, 238, 136, 137, 0, 239, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 269, - 264, 265, 266, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 267, 268, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 274, 0, 0, 376, 0, + 378, 0, 0, 0, 382, 0, 0, 0, 0, 0, + 0, 0, 385, 386, 387, 0, 0, 0, 0, 0, + 0, 0, 0, 274, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 274, 0, 0, 0, 0, 274, + 404, 405, 0, 274, 274, 0, 0, 0, 412, 0, + 0, 0, 0, 0, 0, 0, 417, 0, 0, 0, + 0, 0, 0, 0, 0, 52, 53, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 432, 0, 15, 0, 16, 0, 235, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 236, 237, + 0, 0, 0, 0, 0, 0, 0, 0, 448, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 456, + 0, 0, 0, 0, 460, 0, 0, 0, 463, 464, + 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, + 127, 128, 129, 130, 0, 0, 0, 0, 0, 238, + 0, 239, 240, 138, 139, 0, 241, 0, 0, 0, + 0, 0, 0, 0, 0, 242, 0, 0, 243, 0, + 244, 52, 53, 245, 100, 162, 163, 164, 165, 166, + 167, 168, 169, 170, 171, 172, 66, 67, 15, 0, + 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 115, 116, 117, 118, 119, 120, 121, - 122, 123, 124, 125, 126, 127, 128, 0, 0, 0, - 0, 0, 236, 0, 237, 238, 136, 137, 0, 239, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 51, - 52, 269, 98, 54, 55, 56, 57, 58, 59, 60, - 61, 62, 63, 64, 65, 66, 15, 0, 16, 0, + 0, 68, 263, 264, 52, 53, 265, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 181, 0, 0, 0, 0, 0, 51, 52, 67, - 98, 54, 55, 56, 57, 58, 59, 60, 61, 62, - 63, 64, 65, 66, 15, 0, 16, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 254, - 0, 0, 0, 0, 0, 51, 52, 67, 98, 160, - 161, 162, 163, 164, 165, 166, 167, 168, 169, 170, - 65, 66, 15, 0, 16, 68, 0, 0, 69, 0, - 0, 70, 0, 71, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 51, 52, 67, 98, 54, 55, 56, - 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, - 15, 0, 16, 68, 0, 0, 69, 0, 0, 70, - 0, 71, 0, 0, 0, 324, 0, 0, 0, 0, - 0, 51, 52, 67, 98, 54, 55, 56, 57, 58, - 59, 60, 61, 62, 63, 64, 65, 66, 15, 0, - 16, 68, 0, 0, 69, 0, 306, 70, 0, 71, - 0, 0, 0, 366, 0, 0, 0, 0, 0, 51, - 52, 67, 53, 54, 55, 56, 57, 58, 59, 60, - 61, 62, 63, 64, 65, 66, 15, 0, 16, 68, - 0, 0, 69, 0, 0, 70, 0, 71, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 51, 52, 67, - 98, 54, 55, 56, 57, 58, 59, 60, 61, 62, - 63, 64, 65, 66, 15, 0, 16, 68, 0, 0, - 69, 0, 0, 70, 0, 71, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 51, 52, 67, 98, 160, - 161, 162, 163, 164, 165, 166, 167, 168, 169, 170, - 65, 66, 15, 0, 16, 68, 0, 0, 69, 0, - 0, 70, 0, 71, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 51, 52, 67, 187, 54, 55, 56, - 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, - 15, 0, 16, 68, 0, 0, 69, 0, 0, 70, - 0, 71, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 67, 0, 0, 0, 0, 0, 0, + 0, 15, 0, 16, 0, 266, 267, 268, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 269, 270, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 69, 0, + 0, 70, 0, 0, 71, 0, 72, 312, 0, 117, + 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, + 128, 129, 130, 0, 0, 263, 264, 0, 238, 265, + 239, 240, 138, 139, 0, 241, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 271, 266, 267, + 268, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 269, 270, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 117, 118, 119, 120, 121, 122, 123, 124, + 125, 126, 127, 128, 129, 130, 0, 0, 0, 0, + 0, 238, 0, 239, 240, 138, 139, 0, 241, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 52, 53, + 271, 100, 55, 56, 57, 58, 59, 60, 61, 62, + 63, 64, 65, 66, 67, 15, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 68, 0, 0, 69, 0, 0, 70, 0, 71, + 183, 0, 0, 0, 0, 0, 52, 53, 68, 100, + 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, + 65, 66, 67, 15, 0, 16, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 256, 0, + 0, 0, 0, 0, 52, 53, 68, 100, 162, 163, + 164, 165, 166, 167, 168, 169, 170, 171, 172, 66, + 67, 15, 0, 16, 0, 69, 0, 0, 70, 0, + 0, 71, 0, 72, 0, 0, 0, 0, 0, 0, + 0, 0, 52, 53, 68, 100, 55, 56, 57, 58, + 59, 60, 61, 62, 63, 64, 65, 66, 67, 15, + 0, 16, 0, 69, 0, 0, 70, 0, 0, 71, + 0, 72, 0, 0, 326, 0, 0, 0, 0, 0, + 52, 53, 68, 100, 55, 56, 57, 58, 59, 60, + 61, 62, 63, 64, 65, 66, 67, 15, 0, 16, + 0, 69, 0, 0, 70, 0, 308, 71, 0, 72, + 0, 0, 368, 0, 0, 0, 0, 0, 52, 53, + 68, 54, 55, 56, 57, 58, 59, 60, 61, 62, + 63, 64, 65, 66, 67, 15, 0, 16, 0, 69, + 0, 0, 70, 0, 0, 71, 0, 72, 0, 0, + 0, 0, 0, 0, 0, 0, 52, 53, 68, 100, + 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, + 65, 66, 67, 15, 0, 16, 0, 69, 0, 0, + 70, 0, 0, 71, 0, 72, 0, 0, 0, 0, + 0, 0, 0, 0, 52, 53, 68, 100, 162, 163, + 164, 165, 166, 167, 168, 169, 170, 171, 172, 66, + 67, 15, 0, 16, 0, 69, 0, 0, 70, 0, + 0, 71, 0, 72, 0, 0, 0, 0, 0, 0, + 0, 0, 52, 53, 68, 189, 55, 56, 57, 58, + 59, 60, 61, 62, 63, 64, 65, 66, 67, 15, + 0, 16, 0, 69, 0, 0, 70, 0, 0, 71, + 0, 72, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 68, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 105, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 106, 0, 0, 0, 0, 0, 68, - 0, 0, 69, 107, 108, 70, 0, 71, 0, 0, - 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, - 119, 120, 121, 122, 123, 124, 125, 126, 127, 128, - 129, 130, 131, 0, 0, 132, 133, 134, 135, 136, - 137, 138, 139, 140, 141, 142 + 0, 69, 0, 0, 70, 0, 0, 71, 0, 72, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 107, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 108, 0, 0, 0, 0, 0, 0, 0, 0, 69, + 109, 110, 70, 0, 0, 71, 0, 72, 111, 112, + 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, + 123, 124, 125, 126, 127, 128, 129, 130, 131, 132, + 133, 0, 0, 134, 135, 136, 137, 138, 139, 140, + 141, 142, 143, 144 }; -static const short yycheck[] = { 30, - 111, 111, 106, 45, 94, 109, 250, 204, 29, 23, - 112, 24, 2, 426, 45, 71, 30, 15, 15, 10, - 11, 12, 13, 14, 15, 16, 17, 131, 23, 442, - 134, 135, 102, 100, 138, 139, 140, 141, 142, 241, - 242, 111, 146, 110, 34, 34, 148, 103, 10, 11, - 12, 13, 14, 15, 16, 17, 54, 54, 9, 100, - 5, 6, 93, 94, 100, 54, 100, 269, 20, 110, - 21, 99, 108, 106, 108, 99, 441, 22, 111, 24, - 100, 26, 108, 73, 449, 111, 106, 4, 109, 41, - 42, 43, 44, 38, 39, 47, 110, 100, 129, 130, - 99, 132, 133, 106, 104, 59, 60, 61, 62, 353, - 32, 33, 143, 144, 145, 106, 99, 22, 222, 24, - 176, 177, 178, 99, 69, 70, 71, 72, 73, 74, - 75, 76, 77, 78, 79, 80, 81, 82, 49, 50, - 51, 27, 28, 88, 106, 90, 91, 92, 93, 180, - 95, 10, 11, 12, 13, 14, 15, 16, 17, 104, - 202, 102, 107, 0, 109, 52, 53, 112, 86, 87, - 4, 202, 3, 4, 3, 4, 4, 374, 220, 376, - 3, 4, 286, 4, 288, 289, 3, 4, 25, 220, - 221, 295, 3, 4, 31, 102, 4, 24, 24, 105, - 102, 105, 56, 259, 41, 42, 43, 44, 4, 240, - 241, 242, 302, 303, 304, 305, 4, 4, 4, 174, - 4, 58, 7, 313, 314, 315, 316, 7, 7, 184, - 100, 103, 100, 100, 189, 190, 100, 36, 269, 104, - 100, 24, 100, 100, 100, 100, 201, 100, 100, 100, - 24, 206, 189, 190, 285, 102, 287, 102, 102, 290, - 291, 216, 217, 218, 201, 255, 102, 102, 358, 206, - 102, 302, 303, 304, 305, 100, 100, 381, 382, 216, - 217, 218, 313, 314, 315, 316, 102, 102, 100, 103, - 100, 322, 34, 100, 100, 104, 100, 100, 21, 21, - 102, 4, 100, 393, 394, 409, 396, 397, 398, 399, - 100, 100, 24, 4, 54, 426, 426, 36, 349, 100, - 102, 4, 277, 100, 100, 100, 104, 358, 283, 100, - 100, 442, 442, 100, 100, 100, 54, 100, 106, 103, - 277, 296, 297, 433, 103, 103, 283, 103, 100, 103, - 103, 21, 103, 103, 103, 36, 21, 103, 106, 296, - 297, 392, 393, 394, 100, 396, 397, 398, 399, 21, - 100, 67, 21, 21, 329, 0, 331, 0, 83, 83, - 335, 83, 83, 34, 20, 323, 103, 47, 343, 344, - 345, 19, 329, 322, 331, 2, 23, 14, 335, 332, - 386, 174, 433, -1, 354, -1, 343, 344, 345, -1, - -1, -1, -1, -1, -1, -1, 371, 372, -1, -1, - -1, -1, -1, -1, 379, -1, -1, -1, -1, -1, - -1, -1, 387, -1, 371, 372, -1, -1, -1, -1, - -1, -1, 379, -1, -1, -1, -1, -1, -1, -1, - 387, -1, -1, -1, 5, 6, 411, 8, 9, 10, - 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, - 21, 22, -1, 24, 411, -1, -1, -1, -1, -1, - -1, -1, -1, -1, 439, -1, -1, -1, -1, -1, - -1, -1, -1, -1, 45, 450, -1, -1, -1, -1, - 455, -1, 439, -1, 459, 460, -1, -1, -1, -1, - -1, -1, -1, 450, -1, -1, -1, -1, 455, -1, - -1, -1, 459, 460, 5, 6, -1, 8, 9, 10, - 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, - 21, 22, -1, 24, -1, -1, -1, -1, -1, -1, - 101, -1, -1, 104, -1, -1, 107, -1, 109, 110, - -1, -1, -1, -1, 45, 3, 4, 5, 6, 7, - 20, -1, 22, -1, 24, -1, -1, -1, -1, -1, - -1, 31, 32, 33, 22, -1, 24, -1, 26, 27, - 28, 41, 42, 43, 44, -1, -1, 47, 48, -1, - 38, 39, -1, -1, -1, 55, -1, -1, 58, -1, +static const short yycheck[] = { 29, + 96, 113, 113, 44, 252, 108, 206, 29, 111, 15, + 114, 2, 428, 58, 44, 34, 72, 10, 11, 12, + 13, 14, 15, 16, 17, 23, 52, 53, 444, 15, + 133, 9, 30, 136, 137, 54, 0, 140, 141, 142, + 143, 144, 33, 21, 109, 148, 150, 112, 54, 105, + 10, 11, 12, 13, 14, 15, 16, 17, 243, 244, + 23, 25, 101, 101, 101, 95, 96, 31, 54, 20, + 107, 107, 111, 111, 101, 103, 112, 41, 42, 43, + 44, 101, 109, 74, 112, 22, 271, 24, 110, 109, + 41, 42, 43, 44, 101, 59, 47, 100, 443, 58, + 107, 131, 132, 100, 134, 135, 451, 355, 60, 61, + 62, 63, 24, 111, 107, 145, 146, 147, 49, 50, + 51, 224, 178, 179, 180, 100, 5, 6, 4, 8, + 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, + 19, 20, 21, 22, 100, 24, 100, 107, 32, 33, + 27, 28, 182, 10, 11, 12, 13, 14, 15, 16, + 17, 87, 88, 204, 3, 4, 45, 3, 4, 3, + 4, 3, 4, 105, 204, 103, 376, 4, 378, 3, + 4, 222, 4, 4, 103, 288, 24, 290, 291, 4, + 106, 24, 222, 223, 297, 106, 103, 56, 4, 4, + 4, 4, 4, 101, 104, 261, 7, 7, 304, 305, + 306, 307, 242, 243, 244, 7, 101, 105, 101, 315, + 316, 317, 318, 102, 36, 24, 105, 101, 176, 108, + 101, 110, 111, 101, 101, 101, 101, 101, 186, 101, + 101, 271, 24, 191, 192, 103, 34, 103, 103, 103, + 103, 103, 103, 103, 101, 203, 104, 287, 101, 289, + 208, 101, 292, 293, 360, 21, 257, 21, 105, 4, + 218, 219, 220, 101, 304, 305, 306, 307, 101, 24, + 383, 384, 101, 101, 101, 315, 316, 317, 318, 103, + 101, 101, 101, 4, 324, 103, 36, 54, 4, 395, + 396, 54, 398, 399, 400, 401, 101, 101, 411, 105, + 101, 101, 101, 21, 101, 101, 428, 428, 101, 104, + 101, 351, 101, 107, 104, 101, 104, 104, 191, 192, + 360, 279, 444, 444, 104, 104, 104, 285, 104, 435, + 203, 104, 36, 107, 21, 208, 104, 21, 68, 101, + 298, 299, 101, 21, 21, 218, 219, 220, 0, 0, + 84, 84, 84, 84, 394, 395, 396, 33, 398, 399, + 400, 401, 20, 105, 46, 325, 23, 324, 176, 43, + 20, 2, 22, 331, 24, 333, 14, 388, 334, 337, + 356, 31, 32, 33, -1, -1, -1, 345, 346, 347, + -1, 41, 42, 43, 44, 435, -1, 47, 48, -1, + -1, -1, -1, -1, -1, 55, 279, -1, -1, 59, + -1, -1, 285, -1, -1, 373, 374, -1, -1, -1, + -1, -1, -1, 381, -1, 298, 299, -1, -1, -1, + -1, 389, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, - 101, -1, -1, 104, -1, -1, 107, -1, 109, 110, - -1, 69, 70, 71, 72, 73, 74, 75, 76, 77, - 78, 79, 80, 81, 82, -1, -1, 3, 4, -1, - 88, 7, 90, 91, 92, 93, -1, 95, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, -1, 107, - 26, 27, 28, -1, -1, -1, -1, -1, -1, -1, - -1, -1, 38, 39, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, 413, -1, -1, 331, -1, + 333, -1, -1, -1, 337, -1, -1, -1, -1, -1, + -1, -1, 345, 346, 347, -1, -1, -1, -1, -1, + -1, -1, -1, 441, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, 452, -1, -1, -1, -1, 457, + 373, 374, -1, 461, 462, -1, -1, -1, 381, -1, + -1, -1, -1, -1, -1, -1, 389, -1, -1, -1, + -1, -1, -1, -1, -1, 5, 6, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, + 413, -1, 22, -1, 24, -1, 26, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, 38, 39, + -1, -1, -1, -1, -1, -1, -1, -1, 441, -1, + -1, -1, -1, -1, -1, -1, -1, -1, -1, 452, + -1, -1, -1, -1, 457, -1, -1, -1, 461, 462, + 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, + 80, 81, 82, 83, -1, -1, -1, -1, -1, 89, + -1, 91, 92, 93, 94, -1, 96, -1, -1, -1, + -1, -1, -1, -1, -1, 105, -1, -1, 108, -1, + 110, 5, 6, 113, 8, 9, 10, 11, 12, 13, + 14, 15, 16, 17, 18, 19, 20, 21, 22, -1, + 24, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, 69, 70, 71, 72, 73, 74, 75, - 76, 77, 78, 79, 80, 81, 82, -1, -1, -1, - -1, -1, 88, -1, 90, 91, 92, 93, -1, 95, - -1, -1, -1, -1, -1, -1, -1, -1, -1, 5, - 6, 107, 8, 9, 10, 11, 12, 13, 14, 15, - 16, 17, 18, 19, 20, 21, 22, -1, 24, -1, + -1, 45, 3, 4, 5, 6, 7, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, - -1, 37, -1, -1, -1, -1, -1, 5, 6, 45, - 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, - 18, 19, 20, 21, 22, -1, 24, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, -1, 37, - -1, -1, -1, -1, -1, 5, 6, 45, 8, 9, - 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, - 20, 21, 22, -1, 24, 101, -1, -1, 104, -1, - -1, 107, -1, 109, -1, -1, -1, -1, -1, -1, - -1, -1, -1, 5, 6, 45, 8, 9, 10, 11, - 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, - 22, -1, 24, 101, -1, -1, 104, -1, -1, 107, - -1, 109, -1, -1, -1, 37, -1, -1, -1, -1, - -1, 5, 6, 45, 8, 9, 10, 11, 12, 13, - 14, 15, 16, 17, 18, 19, 20, 21, 22, -1, - 24, 101, -1, -1, 104, -1, 106, 107, -1, 109, - -1, -1, -1, 37, -1, -1, -1, -1, -1, 5, - 6, 45, 8, 9, 10, 11, 12, 13, 14, 15, - 16, 17, 18, 19, 20, 21, 22, -1, 24, 101, - -1, -1, 104, -1, -1, 107, -1, 109, -1, -1, - -1, -1, -1, -1, -1, -1, -1, 5, 6, 45, - 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, - 18, 19, 20, 21, 22, -1, 24, 101, -1, -1, - 104, -1, -1, 107, -1, 109, -1, -1, -1, -1, - -1, -1, -1, -1, -1, 5, 6, 45, 8, 9, - 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, - 20, 21, 22, -1, 24, 101, -1, -1, 104, -1, - -1, 107, -1, 109, -1, -1, -1, -1, -1, -1, - -1, -1, -1, 5, 6, 45, 8, 9, 10, 11, - 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, - 22, -1, 24, 101, -1, -1, 104, -1, -1, 107, - -1, 109, -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, 45, -1, -1, -1, -1, -1, -1, + -1, 22, -1, 24, -1, 26, 27, 28, -1, -1, + -1, -1, -1, -1, -1, -1, -1, 38, 39, -1, + -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, 102, -1, + -1, 105, -1, -1, 108, -1, 110, 111, -1, 70, + 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, + 81, 82, 83, -1, -1, 3, 4, -1, 89, 7, + 91, 92, 93, 94, -1, 96, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, 108, 26, 27, + 28, -1, -1, -1, -1, -1, -1, -1, -1, -1, + 38, 39, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, - -1, 101, -1, -1, 104, -1, -1, 107, -1, 109, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, 35, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, 46, -1, -1, -1, -1, -1, 101, - -1, -1, 104, 56, 57, 107, -1, 109, -1, -1, - 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, - 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, - 83, 84, 85, -1, -1, 88, 89, 90, 91, 92, - 93, 94, 95, 96, 97, 98 + -1, -1, 70, 71, 72, 73, 74, 75, 76, 77, + 78, 79, 80, 81, 82, 83, -1, -1, -1, -1, + -1, 89, -1, 91, 92, 93, 94, -1, 96, -1, + -1, -1, -1, -1, -1, -1, -1, -1, 5, 6, + 108, 8, 9, 10, 11, 12, 13, 14, 15, 16, + 17, 18, 19, 20, 21, 22, -1, 24, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, + 37, -1, -1, -1, -1, -1, 5, 6, 45, 8, + 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, + 19, 20, 21, 22, -1, 24, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, 37, -1, + -1, -1, -1, -1, 5, 6, 45, 8, 9, 10, + 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, + 21, 22, -1, 24, -1, 102, -1, -1, 105, -1, + -1, 108, -1, 110, -1, -1, -1, -1, -1, -1, + -1, -1, 5, 6, 45, 8, 9, 10, 11, 12, + 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, + -1, 24, -1, 102, -1, -1, 105, -1, -1, 108, + -1, 110, -1, -1, 37, -1, -1, -1, -1, -1, + 5, 6, 45, 8, 9, 10, 11, 12, 13, 14, + 15, 16, 17, 18, 19, 20, 21, 22, -1, 24, + -1, 102, -1, -1, 105, -1, 107, 108, -1, 110, + -1, -1, 37, -1, -1, -1, -1, -1, 5, 6, + 45, 8, 9, 10, 11, 12, 13, 14, 15, 16, + 17, 18, 19, 20, 21, 22, -1, 24, -1, 102, + -1, -1, 105, -1, -1, 108, -1, 110, -1, -1, + -1, -1, -1, -1, -1, -1, 5, 6, 45, 8, + 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, + 19, 20, 21, 22, -1, 24, -1, 102, -1, -1, + 105, -1, -1, 108, -1, 110, -1, -1, -1, -1, + -1, -1, -1, -1, 5, 6, 45, 8, 9, 10, + 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, + 21, 22, -1, 24, -1, 102, -1, -1, 105, -1, + -1, 108, -1, 110, -1, -1, -1, -1, -1, -1, + -1, -1, 5, 6, 45, 8, 9, 10, 11, 12, + 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, + -1, 24, -1, 102, -1, -1, 105, -1, -1, 108, + -1, 110, -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, 45, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, + -1, 102, -1, -1, 105, -1, -1, 108, -1, 110, + -1, -1, -1, -1, -1, -1, -1, -1, -1, 35, + -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, + 46, -1, -1, -1, -1, -1, -1, -1, -1, 102, + 56, 57, 105, -1, -1, 108, -1, 110, 64, 65, + 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, + 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, + 86, -1, -1, 89, 90, 91, 92, 93, 94, 95, + 96, 97, 98, 99 }; /* -*-C-*- Note some compilers choke on comments on `#line' lines. */ #line 3 "/usr/share/bison.simple" @@ -2532,11 +2558,12 @@ " when array has size " + itostr(NumElements) + "!"); std::vector Vals; if (ETy == Type::SByteTy) { - for (char *C = yyvsp[0].StrVal; C != EndStr; ++C) + for (signed char *C = (signed char *)yyvsp[0].StrVal; C != (signed char *)EndStr; ++C) Vals.push_back(ConstantSInt::get(ETy, *C)); } else if (ETy == Type::UByteTy) { - for (char *C = yyvsp[0].StrVal; C != EndStr; ++C) - Vals.push_back(ConstantUInt::get(ETy, (unsigned char)*C)); + for (unsigned char *C = (unsigned char *)yyvsp[0].StrVal; + C != (unsigned char*)EndStr; ++C) + Vals.push_back(ConstantUInt::get(ETy, *C)); } else { free(yyvsp[0].StrVal); ThrowException("Cannot build string arrays of non byte sized elements!"); @@ -2547,7 +2574,7 @@ ; break;} case 93: -#line 1272 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1273 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { // Nonempty unsized arr const PackedType *PTy = dyn_cast(yyvsp[-3].TypeVal->get()); if (PTy == 0) @@ -2575,7 +2602,7 @@ ; break;} case 94: -#line 1297 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1298 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { const StructType *STy = dyn_cast(yyvsp[-3].TypeVal->get()); if (STy == 0) @@ -2598,7 +2625,7 @@ ; break;} case 95: -#line 1317 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1318 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { const StructType *STy = dyn_cast(yyvsp[-2].TypeVal->get()); if (STy == 0) @@ -2613,7 +2640,7 @@ ; break;} case 96: -#line 1329 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1330 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { const PointerType *PTy = dyn_cast(yyvsp[-1].TypeVal->get()); if (PTy == 0) @@ -2625,14 +2652,14 @@ ; break;} case 97: -#line 1338 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1339 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.ConstVal = UndefValue::get(yyvsp[-1].TypeVal->get()); delete yyvsp[-1].TypeVal; ; break;} case 98: -#line 1342 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1343 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { const PointerType *Ty = dyn_cast(yyvsp[-1].TypeVal->get()); if (Ty == 0) @@ -2694,7 +2721,7 @@ ; break;} case 99: -#line 1401 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1402 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { if (yyvsp[-1].TypeVal->get() != yyvsp[0].ConstVal->getType()) ThrowException("Mismatched types for constant expression!"); @@ -2703,7 +2730,7 @@ ; break;} case 100: -#line 1407 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1408 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { const Type *Ty = yyvsp[-1].TypeVal->get(); if (isa(Ty) || Ty == Type::LabelTy || isa(Ty)) @@ -2713,7 +2740,7 @@ ; break;} case 101: -#line 1415 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1416 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { // integral constants if (!ConstantSInt::isValueValidForType(yyvsp[-1].PrimType, yyvsp[0].SInt64Val)) ThrowException("Constant value doesn't fit in type!"); @@ -2721,7 +2748,7 @@ ; break;} case 102: -#line 1420 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1421 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { // integral constants if (!ConstantUInt::isValueValidForType(yyvsp[-1].PrimType, yyvsp[0].UInt64Val)) ThrowException("Constant value doesn't fit in type!"); @@ -2729,19 +2756,19 @@ ; break;} case 103: -#line 1425 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1426 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { // Boolean constants yyval.ConstVal = ConstantBool::True; ; break;} case 104: -#line 1428 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1429 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { // Boolean constants yyval.ConstVal = ConstantBool::False; ; break;} case 105: -#line 1431 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1432 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { // Float & Double constants if (!ConstantFP::isValueValidForType(yyvsp[-1].PrimType, yyvsp[0].FPVal)) ThrowException("Floating point constant invalid for type!!"); @@ -2749,7 +2776,7 @@ ; break;} case 106: -#line 1438 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1439 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { if (!yyvsp[-3].ConstVal->getType()->isFirstClassType()) ThrowException("cast constant expression from a non-primitive type: '" + @@ -2762,7 +2789,7 @@ ; break;} case 107: -#line 1448 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1449 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { if (!isa(yyvsp[-2].ConstVal->getType())) ThrowException("GetElementPtr requires a pointer operand!"); @@ -2796,7 +2823,7 @@ ; break;} case 108: -#line 1479 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1480 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { if (yyvsp[-5].ConstVal->getType() != Type::BoolTy) ThrowException("Select condition must be of boolean type!"); @@ -2806,7 +2833,7 @@ ; break;} case 109: -#line 1486 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1487 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { if (yyvsp[-3].ConstVal->getType() != yyvsp[-1].ConstVal->getType()) ThrowException("Binary operator types must match!"); @@ -2830,7 +2857,7 @@ ; break;} case 110: -#line 1507 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1508 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { if (yyvsp[-3].ConstVal->getType() != yyvsp[-1].ConstVal->getType()) ThrowException("Logical operator types must match!"); @@ -2843,7 +2870,7 @@ ; break;} case 111: -#line 1517 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1518 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { if (yyvsp[-3].ConstVal->getType() != yyvsp[-1].ConstVal->getType()) ThrowException("setcc operand types must match!"); @@ -2851,7 +2878,7 @@ ; break;} case 112: -#line 1522 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1523 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { if (yyvsp[-1].ConstVal->getType() != Type::UByteTy) ThrowException("Shift count for shift constant must be unsigned byte!"); @@ -2861,7 +2888,7 @@ ; break;} case 113: -#line 1529 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1530 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { if (!isa(yyvsp[-3].ConstVal->getType())) ThrowException("First operand of extractelement must be " @@ -2872,60 +2899,60 @@ ; break;} case 114: -#line 1539 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1540 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ConstVector = yyvsp[-2].ConstVector)->push_back(yyvsp[0].ConstVal); ; break;} case 115: -#line 1542 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1543 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.ConstVector = new std::vector(); yyval.ConstVector->push_back(yyvsp[0].ConstVal); ; break;} case 116: -#line 1549 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1550 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.BoolVal = false; ; break;} case 117: -#line 1549 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1550 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.BoolVal = true; ; break;} case 118: -#line 1559 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1560 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.ModuleVal = ParserResult = yyvsp[0].ModuleVal; CurModule.ModuleDone(); ; break;} case 119: -#line 1566 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1567 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.ModuleVal = yyvsp[-1].ModuleVal; CurFun.FunctionDone(); ; break;} case 120: -#line 1570 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1571 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.ModuleVal = yyvsp[-1].ModuleVal; ; break;} case 121: -#line 1573 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1574 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { - yyval.ModuleVal = yyvsp[-2].ModuleVal; + yyval.ModuleVal = yyvsp[-3].ModuleVal; ; break;} case 122: -#line 1576 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1577 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.ModuleVal = yyvsp[-1].ModuleVal; ; break;} case 123: -#line 1579 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1580 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.ModuleVal = CurModule.CurrentModule; // Emit an error if there are any unresolved types left. @@ -2939,7 +2966,7 @@ ; break;} case 124: -#line 1592 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1593 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { // Eagerly resolve types. This is not an optimization, this is a // requirement that is due to the fact that we could have this: @@ -2962,30 +2989,30 @@ ; break;} case 125: -#line 1612 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1613 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { // Function prototypes can be in const pool ; break;} case 126: -#line 1614 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ // Asm blocks can be in the const pool +#line 1615 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ // Asm blocks can be in the const pool ; break;} case 127: -#line 1616 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1617 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { if (yyvsp[0].ConstVal == 0) ThrowException("Global value initializer is not a constant!"); CurGV = ParseGlobalVariable(yyvsp[-3].StrVal, yyvsp[-2].Linkage, yyvsp[-1].BoolVal, yyvsp[0].ConstVal->getType(), yyvsp[0].ConstVal); ; break;} case 128: -#line 1619 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1620 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { CurGV = 0; ; break;} case 129: -#line 1622 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1623 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { CurGV = ParseGlobalVariable(yyvsp[-3].StrVal, GlobalValue::ExternalLinkage, yyvsp[-1].BoolVal, *yyvsp[0].TypeVal, 0); @@ -2993,53 +3020,56 @@ ; break;} case 130: -#line 1626 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1627 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { CurGV = 0; ; break;} case 131: -#line 1629 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1630 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { ; break;} case 132: -#line 1631 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1632 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { ; break;} case 133: -#line 1633 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1634 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { ; break;} case 134: -#line 1637 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1638 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { - const std::string &AsmSoFar = CurModule.CurrentModule->getInlineAsm(); + const std::string &AsmSoFar = CurModule.CurrentModule->getModuleInlineAsm(); + char *EndStr = UnEscapeLexed(yyvsp[0].StrVal, true); + std::string NewAsm(yyvsp[0].StrVal, EndStr); + free(yyvsp[0].StrVal); + if (AsmSoFar.empty()) - CurModule.CurrentModule->setInlineAsm(yyvsp[0].StrVal); + CurModule.CurrentModule->setModuleInlineAsm(NewAsm); else - CurModule.CurrentModule->setInlineAsm(AsmSoFar+"\n"+yyvsp[0].StrVal); - free(yyvsp[0].StrVal); + CurModule.CurrentModule->setModuleInlineAsm(AsmSoFar+"\n"+NewAsm); ; break;} case 135: -#line 1646 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1650 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.Endianness = Module::BigEndian; ; break;} case 136: -#line 1647 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1651 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.Endianness = Module::LittleEndian; ; break;} case 137: -#line 1649 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1653 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { CurModule.CurrentModule->setEndianness(yyvsp[0].Endianness); ; break;} case 138: -#line 1652 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1656 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { if (yyvsp[0].UInt64Val == 32) CurModule.CurrentModule->setPointerSize(Module::Pointer32); @@ -3050,37 +3080,37 @@ ; break;} case 139: -#line 1660 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1664 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { CurModule.CurrentModule->setTargetTriple(yyvsp[0].StrVal); free(yyvsp[0].StrVal); ; break;} case 141: -#line 1667 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1671 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { CurModule.CurrentModule->addLibrary(yyvsp[0].StrVal); free(yyvsp[0].StrVal); ; break;} case 142: -#line 1671 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1675 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { CurModule.CurrentModule->addLibrary(yyvsp[0].StrVal); free(yyvsp[0].StrVal); ; break;} case 143: -#line 1675 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1679 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { ; break;} case 147: -#line 1684 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1688 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.StrVal = 0; ; break;} case 148: -#line 1686 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1690 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { if (*yyvsp[-1].TypeVal == Type::VoidTy) ThrowException("void typed arguments are invalid!"); @@ -3088,7 +3118,7 @@ ; break;} case 149: -#line 1692 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1696 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.ArgList = yyvsp[-2].ArgList; yyvsp[-2].ArgList->push_back(*yyvsp[0].ArgVal); @@ -3096,7 +3126,7 @@ ; break;} case 150: -#line 1697 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1701 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.ArgList = new std::vector >(); yyval.ArgList->push_back(*yyvsp[0].ArgVal); @@ -3104,13 +3134,13 @@ ; break;} case 151: -#line 1703 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1707 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.ArgList = yyvsp[0].ArgList; ; break;} case 152: -#line 1706 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1710 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.ArgList = yyvsp[-2].ArgList; yyval.ArgList->push_back(std::pair >(); yyval.ArgList->push_back(std::make_pair(new PATypeHolder(Type::VoidTy), (char*)0)); ; break;} case 154: -#line 1715 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1719 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.ArgList = 0; ; break;} case 155: -#line 1720 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1724 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { UnEscapeLexed(yyvsp[-5].StrVal); std::string FunctionName(yyvsp[-5].StrVal); @@ -3218,7 +3248,7 @@ ; break;} case 158: -#line 1807 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1811 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.FunctionVal = CurFun.CurrentFunction; @@ -3228,72 +3258,72 @@ ; break;} case 161: -#line 1817 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1821 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.FunctionVal = yyvsp[-1].FunctionVal; ; break;} case 162: -#line 1821 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1825 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { CurFun.isDeclare = true; ; break;} case 163: -#line 1821 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1825 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.FunctionVal = CurFun.CurrentFunction; CurFun.FunctionDone(); ; break;} case 164: -#line 1830 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1834 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { // A reference to a direct constant yyval.ValIDVal = ValID::create(yyvsp[0].SInt64Val); ; break;} case 165: -#line 1833 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1837 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.ValIDVal = ValID::create(yyvsp[0].UInt64Val); ; break;} case 166: -#line 1836 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1840 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { // Perhaps it's an FP constant? yyval.ValIDVal = ValID::create(yyvsp[0].FPVal); ; break;} case 167: -#line 1839 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1843 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.ValIDVal = ValID::create(ConstantBool::True); ; break;} case 168: -#line 1842 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1846 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.ValIDVal = ValID::create(ConstantBool::False); ; break;} case 169: -#line 1845 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1849 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.ValIDVal = ValID::createNull(); ; break;} case 170: -#line 1848 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1852 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.ValIDVal = ValID::createUndef(); ; break;} case 171: -#line 1851 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1855 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { // A vector zero constant. yyval.ValIDVal = ValID::createZeroInit(); ; break;} case 172: -#line 1854 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1858 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { // Nonempty unsized packed vector const Type *ETy = (*yyvsp[-1].ConstVector)[0]->getType(); int NumElements = yyvsp[-1].ConstVector->size(); @@ -3320,43 +3350,43 @@ ; break;} case 173: -#line 1878 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1882 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.ValIDVal = ValID::create(yyvsp[0].ConstVal); ; break;} case 174: -#line 1885 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1889 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { // Is it an integer reference...? yyval.ValIDVal = ValID::create(yyvsp[0].SIntVal); ; break;} case 175: -#line 1888 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1892 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { // Is it a named reference...? yyval.ValIDVal = ValID::create(yyvsp[0].StrVal); ; break;} case 178: -#line 1899 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1903 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.ValueVal = getVal(*yyvsp[-1].TypeVal, yyvsp[0].ValIDVal); delete yyvsp[-1].TypeVal; ; break;} case 179: -#line 1903 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1907 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.FunctionVal = yyvsp[-1].FunctionVal; ; break;} case 180: -#line 1906 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1910 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { // Do not allow functions with 0 basic blocks yyval.FunctionVal = yyvsp[-1].FunctionVal; ; break;} case 181: -#line 1914 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1918 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { setValueName(yyvsp[0].TermInstVal, yyvsp[-1].StrVal); InsertValue(yyvsp[0].TermInstVal); @@ -3367,14 +3397,14 @@ ; break;} case 182: -#line 1923 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1927 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyvsp[-1].BasicBlockVal->getInstList().push_back(yyvsp[0].InstVal); yyval.BasicBlockVal = yyvsp[-1].BasicBlockVal; ; break;} case 183: -#line 1927 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1931 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.BasicBlockVal = CurBB = getBBVal(ValID::create((int)CurFun.NextBBNum++), true); @@ -3387,7 +3417,7 @@ ; break;} case 184: -#line 1937 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1941 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.BasicBlockVal = CurBB = getBBVal(ValID::create(yyvsp[0].StrVal), true); @@ -3400,31 +3430,31 @@ ; break;} case 185: -#line 1948 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1952 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { // Return with a result... yyval.TermInstVal = new ReturnInst(yyvsp[0].ValueVal); ; break;} case 186: -#line 1951 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1955 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { // Return with no result... yyval.TermInstVal = new ReturnInst(); ; break;} case 187: -#line 1954 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1958 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { // Unconditional Branch... yyval.TermInstVal = new BranchInst(getBBVal(yyvsp[0].ValIDVal)); ; break;} case 188: -#line 1957 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1961 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.TermInstVal = new BranchInst(getBBVal(yyvsp[-3].ValIDVal), getBBVal(yyvsp[0].ValIDVal), getVal(Type::BoolTy, yyvsp[-6].ValIDVal)); ; break;} case 189: -#line 1960 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1964 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { SwitchInst *S = new SwitchInst(getVal(yyvsp[-7].PrimType, yyvsp[-6].ValIDVal), getBBVal(yyvsp[-3].ValIDVal), yyvsp[-1].JumpTable->size()); yyval.TermInstVal = S; @@ -3441,14 +3471,14 @@ ; break;} case 190: -#line 1974 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1978 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { SwitchInst *S = new SwitchInst(getVal(yyvsp[-6].PrimType, yyvsp[-5].ValIDVal), getBBVal(yyvsp[-2].ValIDVal), 0); yyval.TermInstVal = S; ; break;} case 191: -#line 1979 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1983 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { const PointerType *PFTy; const FunctionType *Ty; @@ -3503,19 +3533,19 @@ ; break;} case 192: -#line 2031 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2035 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.TermInstVal = new UnwindInst(); ; break;} case 193: -#line 2034 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2038 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.TermInstVal = new UnreachableInst(); ; break;} case 194: -#line 2040 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2044 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.JumpTable = yyvsp[-5].JumpTable; Constant *V = cast(getValNonImprovising(yyvsp[-4].PrimType, yyvsp[-3].ValIDVal)); @@ -3526,7 +3556,7 @@ ; break;} case 195: -#line 2048 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2052 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.JumpTable = new std::vector >(); Constant *V = cast(getValNonImprovising(yyvsp[-4].PrimType, yyvsp[-3].ValIDVal)); @@ -3538,7 +3568,7 @@ ; break;} case 196: -#line 2058 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2062 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { // Is this definition named?? if so, assign the name... setValueName(yyvsp[0].InstVal, yyvsp[-1].StrVal); @@ -3547,7 +3577,7 @@ ; break;} case 197: -#line 2065 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2069 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { // Used for PHI nodes yyval.PHIList = new std::list >(); yyval.PHIList->push_back(std::make_pair(getVal(*yyvsp[-5].TypeVal, yyvsp[-3].ValIDVal), getBBVal(yyvsp[-1].ValIDVal))); @@ -3555,7 +3585,7 @@ ; break;} case 198: -#line 2070 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2074 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.PHIList = yyvsp[-6].PHIList; yyvsp[-6].PHIList->push_back(std::make_pair(getVal(yyvsp[-6].PHIList->front().first->getType(), yyvsp[-3].ValIDVal), @@ -3563,37 +3593,37 @@ ; break;} case 199: -#line 2077 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2081 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { // Used for call statements, and memory insts... yyval.ValueList = new std::vector(); yyval.ValueList->push_back(yyvsp[0].ValueVal); ; break;} case 200: -#line 2081 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2085 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.ValueList = yyvsp[-2].ValueList; yyvsp[-2].ValueList->push_back(yyvsp[0].ValueVal); ; break;} case 202: -#line 2087 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2091 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.ValueList = 0; ; break;} case 203: -#line 2089 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2093 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.BoolVal = true; ; break;} case 204: -#line 2092 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2096 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.BoolVal = false; ; break;} case 205: -#line 2098 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2102 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { if (!(*yyvsp[-3].TypeVal)->isInteger() && !(*yyvsp[-3].TypeVal)->isFloatingPoint() && !isa((*yyvsp[-3].TypeVal).get())) @@ -3608,7 +3638,7 @@ ; break;} case 206: -#line 2110 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2114 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { if (!(*yyvsp[-3].TypeVal)->isIntegral()) { if (!isa(yyvsp[-3].TypeVal->get()) || @@ -3622,7 +3652,7 @@ ; break;} case 207: -#line 2121 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2125 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { if(isa((*yyvsp[-3].TypeVal).get())) { ThrowException( @@ -3635,7 +3665,7 @@ ; break;} case 208: -#line 2131 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2135 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { std::cerr << "WARNING: Use of eliminated 'not' instruction:" << " Replacing with 'xor'.\n"; @@ -3650,7 +3680,7 @@ ; break;} case 209: -#line 2143 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2147 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { if (yyvsp[0].ValueVal->getType() != Type::UByteTy) ThrowException("Shift amount must be ubyte!"); @@ -3660,7 +3690,7 @@ ; break;} case 210: -#line 2150 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2154 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { if (!yyvsp[0].TypeVal->get()->isFirstClassType()) ThrowException("cast instruction to a non-primitive type: '" + @@ -3670,7 +3700,7 @@ ; break;} case 211: -#line 2157 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2161 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { if (yyvsp[-4].ValueVal->getType() != Type::BoolTy) ThrowException("select condition must be boolean!"); @@ -3680,7 +3710,7 @@ ; break;} case 212: -#line 2164 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2168 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { NewVarArgs = true; yyval.InstVal = new VAArgInst(yyvsp[-2].ValueVal, *yyvsp[0].TypeVal); @@ -3688,7 +3718,7 @@ ; break;} case 213: -#line 2169 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2173 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { ObsoleteVarArgs = true; const Type* ArgTy = yyvsp[-2].ValueVal->getType(); @@ -3710,7 +3740,7 @@ ; break;} case 214: -#line 2188 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2192 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { ObsoleteVarArgs = true; const Type* ArgTy = yyvsp[-2].ValueVal->getType(); @@ -3735,7 +3765,7 @@ ; break;} case 215: -#line 2210 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2214 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { if (!isa(yyvsp[-2].ValueVal->getType())) ThrowException("First operand of extractelement must be " @@ -3746,7 +3776,7 @@ ; break;} case 216: -#line 2218 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2222 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { if (!isa(yyvsp[-4].ValueVal->getType())) ThrowException("First operand of insertelement must be " @@ -3761,7 +3791,7 @@ ; break;} case 217: -#line 2230 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2234 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { const Type *Ty = yyvsp[0].PHIList->front().first->getType(); if (!Ty->isFirstClassType()) @@ -3778,7 +3808,7 @@ ; break;} case 218: -#line 2244 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2248 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { const PointerType *PFTy; const FunctionType *Ty; @@ -3838,65 +3868,65 @@ ; break;} case 219: -#line 2301 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2305 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.InstVal = yyvsp[0].InstVal; ; break;} case 220: -#line 2307 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2311 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.ValueList = yyvsp[0].ValueList; ; break;} case 221: -#line 2309 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2313 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.ValueList = new std::vector(); ; break;} case 222: -#line 2313 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2317 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.BoolVal = true; ; break;} case 223: -#line 2316 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2320 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.BoolVal = false; ; break;} case 224: -#line 2322 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2326 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.InstVal = new MallocInst(*yyvsp[-1].TypeVal, 0, yyvsp[0].UIntVal); delete yyvsp[-1].TypeVal; ; break;} case 225: -#line 2326 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2330 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.InstVal = new MallocInst(*yyvsp[-4].TypeVal, getVal(yyvsp[-2].PrimType, yyvsp[-1].ValIDVal), yyvsp[0].UIntVal); delete yyvsp[-4].TypeVal; ; break;} case 226: -#line 2330 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2334 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.InstVal = new AllocaInst(*yyvsp[-1].TypeVal, 0, yyvsp[0].UIntVal); delete yyvsp[-1].TypeVal; ; break;} case 227: -#line 2334 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2338 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.InstVal = new AllocaInst(*yyvsp[-4].TypeVal, getVal(yyvsp[-2].PrimType, yyvsp[-1].ValIDVal), yyvsp[0].UIntVal); delete yyvsp[-4].TypeVal; ; break;} case 228: -#line 2338 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2342 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { if (!isa(yyvsp[0].ValueVal->getType())) ThrowException("Trying to free nonpointer type " + @@ -3905,7 +3935,7 @@ ; break;} case 229: -#line 2345 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2349 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { if (!isa(yyvsp[-1].TypeVal->get())) ThrowException("Can't load from nonpointer type: " + @@ -3918,7 +3948,7 @@ ; break;} case 230: -#line 2355 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2359 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { const PointerType *PT = dyn_cast(yyvsp[-1].TypeVal->get()); if (!PT) @@ -3934,7 +3964,7 @@ ; break;} case 231: -#line 2368 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2372 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { if (!isa(yyvsp[-2].TypeVal->get())) ThrowException("getelementptr insn requires pointer operand!"); @@ -4179,7 +4209,7 @@ } return 1; } -#line 2391 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2395 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" int yyerror(const char *ErrorMsg) { std::string where Index: llvm/lib/AsmParser/llvmAsmParser.h diff -u llvm/lib/AsmParser/llvmAsmParser.h:1.17 llvm/lib/AsmParser/llvmAsmParser.h:1.18 --- llvm/lib/AsmParser/llvmAsmParser.h:1.17 Mon Jan 23 17:05:42 2006 +++ llvm/lib/AsmParser/llvmAsmParser.h Mon Jan 23 22:14:29 2006 @@ -93,46 +93,47 @@ #define CALL 310 #define TAIL 311 #define ASM_TOK 312 -#define CC_TOK 313 -#define CCC_TOK 314 -#define FASTCC_TOK 315 -#define COLDCC_TOK 316 -#define RET 317 -#define BR 318 -#define SWITCH 319 -#define INVOKE 320 -#define UNWIND 321 -#define UNREACHABLE 322 -#define ADD 323 -#define SUB 324 -#define MUL 325 -#define DIV 326 -#define REM 327 -#define AND 328 -#define OR 329 -#define XOR 330 -#define SETLE 331 -#define SETGE 332 -#define SETLT 333 -#define SETGT 334 -#define SETEQ 335 -#define SETNE 336 -#define MALLOC 337 -#define ALLOCA 338 -#define FREE 339 -#define LOAD 340 -#define STORE 341 -#define GETELEMENTPTR 342 -#define PHI_TOK 343 -#define CAST 344 -#define SELECT 345 -#define SHL 346 -#define SHR 347 -#define VAARG 348 -#define EXTRACTELEMENT 349 -#define INSERTELEMENT 350 -#define VAARG_old 351 -#define VANEXT_old 352 +#define MODULE 313 +#define CC_TOK 314 +#define CCC_TOK 315 +#define FASTCC_TOK 316 +#define COLDCC_TOK 317 +#define RET 318 +#define BR 319 +#define SWITCH 320 +#define INVOKE 321 +#define UNWIND 322 +#define UNREACHABLE 323 +#define ADD 324 +#define SUB 325 +#define MUL 326 +#define DIV 327 +#define REM 328 +#define AND 329 +#define OR 330 +#define XOR 331 +#define SETLE 332 +#define SETGE 333 +#define SETLT 334 +#define SETGT 335 +#define SETEQ 336 +#define SETNE 337 +#define MALLOC 338 +#define ALLOCA 339 +#define FREE 340 +#define LOAD 341 +#define STORE 342 +#define GETELEMENTPTR 343 +#define PHI_TOK 344 +#define CAST 345 +#define SELECT 346 +#define SHL 347 +#define SHR 348 +#define VAARG 349 +#define EXTRACTELEMENT 350 +#define INSERTELEMENT 351 +#define VAARG_old 352 +#define VANEXT_old 353 extern YYSTYPE llvmAsmlval; Index: llvm/lib/AsmParser/llvmAsmParser.y diff -u llvm/lib/AsmParser/llvmAsmParser.y:1.247 llvm/lib/AsmParser/llvmAsmParser.y:1.248 --- llvm/lib/AsmParser/llvmAsmParser.y:1.247 Mon Jan 23 18:40:17 2006 +++ llvm/lib/AsmParser/llvmAsmParser.y Mon Jan 23 22:14:29 2006 @@ -1636,15 +1636,15 @@ AsmBlock : STRINGCONSTANT { - const std::string &AsmSoFar = CurModule.CurrentModule->getInlineAsm(); + const std::string &AsmSoFar = CurModule.CurrentModule->getModuleInlineAsm(); char *EndStr = UnEscapeLexed($1, true); std::string NewAsm($1, EndStr); free($1); if (AsmSoFar.empty()) - CurModule.CurrentModule->setInlineAsm(NewAsm); + CurModule.CurrentModule->setModuleInlineAsm(NewAsm); else - CurModule.CurrentModule->setInlineAsm(AsmSoFar+"\n"+NewAsm); + CurModule.CurrentModule->setModuleInlineAsm(AsmSoFar+"\n"+NewAsm); }; BigOrLittle : BIG { $$ = Module::BigEndian; }; From lattner at cs.uiuc.edu Mon Jan 23 22:15:41 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon, 23 Jan 2006 22:15:41 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/AsmPrinter.cpp Message-ID: <200601240415.WAA05706@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen: AsmPrinter.cpp updated: 1.38 -> 1.39 --- Log message: rename method --- Diffs of the changes: (+4 -3) AsmPrinter.cpp | 7 ++++--- 1 files changed, 4 insertions(+), 3 deletions(-) Index: llvm/lib/CodeGen/AsmPrinter.cpp diff -u llvm/lib/CodeGen/AsmPrinter.cpp:1.38 llvm/lib/CodeGen/AsmPrinter.cpp:1.39 --- llvm/lib/CodeGen/AsmPrinter.cpp:1.38 Mon Jan 23 17:47:53 2006 +++ llvm/lib/CodeGen/AsmPrinter.cpp Mon Jan 23 22:15:29 2006 @@ -72,9 +72,10 @@ bool AsmPrinter::doInitialization(Module &M) { Mang = new Mangler(M, GlobalPrefix); - if (!M.getInlineAsm().empty()) - O << CommentString << " Start File Scope Asm Blocks:\n" << M.getInlineAsm() - << "\n" << CommentString << " End File Scope Asm Blocks\n"; + if (!M.getModuleInlineAsm().empty()) + O << CommentString << " Start of file scope inline assembly\n" + << M.getModuleInlineAsm() + << "\n" << CommentString << " End of file scope inline assembly\n"; SwitchSection("", 0); // Reset back to no section. return false; From lattner at cs.uiuc.edu Mon Jan 23 22:16:46 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon, 23 Jan 2006 22:16:46 -0600 Subject: [llvm-commits] CVS: llvm/lib/Transforms/Utils/CloneModule.cpp Message-ID: <200601240416.WAA05766@zion.cs.uiuc.edu> Changes in directory llvm/lib/Transforms/Utils: CloneModule.cpp updated: 1.16 -> 1.17 --- Log message: rename method --- Diffs of the changes: (+1 -1) CloneModule.cpp | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/Transforms/Utils/CloneModule.cpp diff -u llvm/lib/Transforms/Utils/CloneModule.cpp:1.16 llvm/lib/Transforms/Utils/CloneModule.cpp:1.17 --- llvm/lib/Transforms/Utils/CloneModule.cpp:1.16 Mon Jan 23 17:06:28 2006 +++ llvm/lib/Transforms/Utils/CloneModule.cpp Mon Jan 23 22:16:34 2006 @@ -31,7 +31,7 @@ New->setEndianness(M->getEndianness()); New->setPointerSize(M->getPointerSize()); New->setTargetTriple(M->getTargetTriple()); - New->setInlineAsm(M->getInlineAsm()); + New->setModuleInlineAsm(M->getModuleInlineAsm()); // Copy all of the type symbol table entries over. const SymbolTable &SymTab = M->getSymbolTable(); From jeffc at jolt-lang.org Mon Jan 23 22:40:34 2006 From: jeffc at jolt-lang.org (Jeff Cohen) Date: Mon, 23 Jan 2006 22:40:34 -0600 Subject: [llvm-commits] CVS: llvm/win32/config.h Message-ID: <200601240440.WAA21246@zion.cs.uiuc.edu> Changes in directory llvm/win32: config.h updated: 1.1 -> 1.2 --- Log message: Track changes in config.h.in. --- Diffs of the changes: (+2 -4) config.h | 6 ++---- 1 files changed, 2 insertions(+), 4 deletions(-) Index: llvm/win32/config.h diff -u llvm/win32/config.h:1.1 llvm/win32/config.h:1.2 --- llvm/win32/config.h:1.1 Thu Jan 19 22:34:45 2006 +++ llvm/win32/config.h Mon Jan 23 22:40:19 2006 @@ -9,14 +9,12 @@ #define HAVE_STDLIB_H 1 #define HAVE_STDIO_H 1 #define HAVE_STRING_H 1 +#define HAVE_CEILF 1 +#define HAVE_FLOORF 1 #define SHLIBEXT ".lib" #define error_t int #define HAVE_ERRNO_H 1 #define LTDL_DLOPEN_DEPLIBS 1 -#define HAVE_CEIL 1 -#define HAVE_CEILF 1 -#define HAVE_FLOOR 1 -#define HAVE_FLOORF 1 #define LTDL_OBJDIR "_libs" #define LTDL_SHLIBPATH_VAR "PATH" #define LTDL_SHLIB_EXT ".dll" From jeffc at jolt-lang.org Mon Jan 23 22:41:08 2006 From: jeffc at jolt-lang.org (Jeff Cohen) Date: Mon, 23 Jan 2006 22:41:08 -0600 Subject: [llvm-commits] CVS: llvm/win32/VMCore/VMCore.vcproj Message-ID: <200601240441.WAA22393@zion.cs.uiuc.edu> Changes in directory llvm/win32/VMCore: VMCore.vcproj updated: 1.13 -> 1.14 --- Log message: Add new files to Visual Studio. --- Diffs of the changes: (+6 -0) VMCore.vcproj | 6 ++++++ 1 files changed, 6 insertions(+) Index: llvm/win32/VMCore/VMCore.vcproj diff -u llvm/win32/VMCore/VMCore.vcproj:1.13 llvm/win32/VMCore/VMCore.vcproj:1.14 --- llvm/win32/VMCore/VMCore.vcproj:1.13 Mon Jan 16 23:13:22 2006 +++ llvm/win32/VMCore/VMCore.vcproj Mon Jan 23 22:40:54 2006 @@ -136,6 +136,9 @@ RelativePath="..\..\lib\VMCore\Globals.cpp"> + + + + Changes in directory llvm/win32/CodeGen: CodeGen.vcproj updated: 1.19 -> 1.20 --- Log message: Add new files to Visual Studio. --- Diffs of the changes: (+3 -0) CodeGen.vcproj | 3 +++ 1 files changed, 3 insertions(+) Index: llvm/win32/CodeGen/CodeGen.vcproj diff -u llvm/win32/CodeGen/CodeGen.vcproj:1.19 llvm/win32/CodeGen/CodeGen.vcproj:1.20 --- llvm/win32/CodeGen/CodeGen.vcproj:1.19 Sun Jan 22 14:37:25 2006 +++ llvm/win32/CodeGen/CodeGen.vcproj Mon Jan 23 22:40:54 2006 @@ -190,6 +190,9 @@ RelativePath="..\..\lib\CodeGen\SelectionDAG\ScheduleDAG.cpp"> + + Changes in directory llvm/include/llvm: InlineAsm.h updated: 1.1 -> 1.2 --- Log message: Be consistent in using class/struct to keep Visual Studio happy. --- Diffs of the changes: (+1 -1) InlineAsm.h | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/include/llvm/InlineAsm.h diff -u llvm/include/llvm/InlineAsm.h:1.1 llvm/include/llvm/InlineAsm.h:1.2 --- llvm/include/llvm/InlineAsm.h:1.1 Mon Jan 23 22:12:40 2006 +++ llvm/include/llvm/InlineAsm.h Mon Jan 23 22:41:48 2006 @@ -19,7 +19,7 @@ namespace llvm { -class AssemblyAnnotationWriter; +struct AssemblyAnnotationWriter; class PointerType; class FunctionType; class Module; From jeffc at jolt-lang.org Mon Jan 23 22:43:04 2006 From: jeffc at jolt-lang.org (Jeff Cohen) Date: Mon, 23 Jan 2006 22:43:04 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/DwarfWriter.cpp Message-ID: <200601240443.WAA23539@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen: DwarfWriter.cpp updated: 1.13 -> 1.14 --- Log message: Remove unused variables. --- Diffs of the changes: (+0 -3) DwarfWriter.cpp | 3 --- 1 files changed, 3 deletions(-) Index: llvm/lib/CodeGen/DwarfWriter.cpp diff -u llvm/lib/CodeGen/DwarfWriter.cpp:1.13 llvm/lib/CodeGen/DwarfWriter.cpp:1.14 --- llvm/lib/CodeGen/DwarfWriter.cpp:1.13 Mon Jan 23 18:49:18 2006 +++ llvm/lib/CodeGen/DwarfWriter.cpp Mon Jan 23 22:42:53 2006 @@ -875,9 +875,6 @@ DIE *DWContext::NewBasicType(const Type *Ty, unsigned Size, unsigned Align) { DIE *TypeDie = Types[Ty]; - char *Name; - unsigned Encoding; - // If first occurance of type. if (!TypeDie) { const char *Name; From jeffc at jolt-lang.org Mon Jan 23 22:43:29 2006 From: jeffc at jolt-lang.org (Jeff Cohen) Date: Mon, 23 Jan 2006 22:43:29 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp Message-ID: <200601240443.WAA23551@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/SelectionDAG: ScheduleDAGSimple.cpp updated: 1.4 -> 1.5 --- Log message: Fix VC++ compilation error. --- Diffs of the changes: (+1 -0) ScheduleDAGSimple.cpp | 1 + 1 files changed, 1 insertion(+) Index: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp diff -u llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp:1.4 llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp:1.5 --- llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp:1.4 Mon Jan 23 02:25:34 2006 +++ llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp Mon Jan 23 22:43:17 2006 @@ -19,6 +19,7 @@ #include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetInstrInfo.h" #include "llvm/Support/Debug.h" +#include using namespace llvm; namespace { From lattner at cs.uiuc.edu Mon Jan 23 22:51:00 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon, 23 Jan 2006 22:51:00 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86CodeEmitter.cpp Message-ID: <200601240451.WAA24950@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: X86CodeEmitter.cpp updated: 1.83 -> 1.84 --- Log message: Allow jit-beta to work --- Diffs of the changes: (+0 -1) X86CodeEmitter.cpp | 1 - 1 files changed, 1 deletion(-) Index: llvm/lib/Target/X86/X86CodeEmitter.cpp diff -u llvm/lib/Target/X86/X86CodeEmitter.cpp:1.83 llvm/lib/Target/X86/X86CodeEmitter.cpp:1.84 --- llvm/lib/Target/X86/X86CodeEmitter.cpp:1.83 Sun Jan 22 17:37:17 2006 +++ llvm/lib/Target/X86/X86CodeEmitter.cpp Mon Jan 23 22:50:48 2006 @@ -399,7 +399,6 @@ if (MO.isMachineBasicBlock()) { emitPCRelativeBlockAddress(MO.getMachineBasicBlock()); } else if (MO.isGlobalAddress()) { - assert(MO.isPCRelative() && "Call target is not PC Relative?"); bool isTailCall = Opcode == X86::TAILJMPd || Opcode == X86::TAILJMPr || Opcode == X86::TAILJMPm; emitGlobalAddressForCall(MO.getGlobal(), isTailCall); From lattner at cs.uiuc.edu Mon Jan 23 23:01:51 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon, 23 Jan 2006 23:01:51 -0600 Subject: [llvm-commits] CVS: llvm/test/Regression/CFrontend/2006-01-23-FileScopeAsm.c Message-ID: <200601240501.XAA25149@zion.cs.uiuc.edu> Changes in directory llvm/test/Regression/CFrontend: 2006-01-23-FileScopeAsm.c added (r1.1) --- Log message: new c front-end testcase --- Diffs of the changes: (+8 -0) 2006-01-23-FileScopeAsm.c | 8 ++++++++ 1 files changed, 8 insertions(+) Index: llvm/test/Regression/CFrontend/2006-01-23-FileScopeAsm.c diff -c /dev/null llvm/test/Regression/CFrontend/2006-01-23-FileScopeAsm.c:1.1 *** /dev/null Mon Jan 23 23:01:49 2006 --- llvm/test/Regression/CFrontend/2006-01-23-FileScopeAsm.c Mon Jan 23 23:01:39 2006 *************** *** 0 **** --- 1,8 ---- + // RUN: %llvmgcc %s -S -o - | gccas | llvm-dis | grep foo[12345] | wc -l | grep 5 + // XFAIL: * + + __asm__ ("foo1"); + __asm__ ("foo2"); + __asm__ ("foo3"); + __asm__ ("foo4"); + __asm__ ("foo5"); From lattner at cs.uiuc.edu Mon Jan 23 23:17:24 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon, 23 Jan 2006 23:17:24 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp X86InstrInfo.td Message-ID: <200601240517.XAA25328@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: X86ISelLowering.cpp updated: 1.52 -> 1.53 X86InstrInfo.td updated: 1.216 -> 1.217 --- Log message: Emit the copies out of call return registers *after* the ISD::CALLSEQ_END node, fixing fastcc and the case where a function has a frame pointer due to dynamic allocas. --- Diffs of the changes: (+23 -7) X86ISelLowering.cpp | 28 ++++++++++++++++++++++------ X86InstrInfo.td | 2 +- 2 files changed, 23 insertions(+), 7 deletions(-) Index: llvm/lib/Target/X86/X86ISelLowering.cpp diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.52 llvm/lib/Target/X86/X86ISelLowering.cpp:1.53 --- llvm/lib/Target/X86/X86ISelLowering.cpp:1.52 Fri Jan 20 12:41:25 2006 +++ llvm/lib/Target/X86/X86ISelLowering.cpp Mon Jan 23 23:17:12 2006 @@ -521,6 +521,17 @@ Chain = DAG.getNode(X86ISD::CALL, NodeTys, Ops); SDOperand InFlag = Chain.getValue(1); + NodeTys.clear(); + NodeTys.push_back(MVT::Other); // Returns a chain + NodeTys.push_back(MVT::Flag); // Returns a flag for retval copy to use. + Ops.clear(); + Ops.push_back(Chain); + Ops.push_back(DAG.getConstant(NumBytes, getPointerTy())); + Ops.push_back(DAG.getConstant(0, getPointerTy())); + Ops.push_back(InFlag); + Chain = DAG.getNode(ISD::CALLSEQ_END, NodeTys, Ops); + InFlag = Chain.getValue(1); + SDOperand RetVal; if (RetTyVT != MVT::isVoid) { switch (RetTyVT) { @@ -591,9 +602,6 @@ } } - Chain = DAG.getNode(ISD::CALLSEQ_END, MVT::Other, Chain, - DAG.getConstant(NumBytes, getPointerTy()), - DAG.getConstant(0, getPointerTy())); return std::make_pair(RetVal, Chain); } else { std::vector Ops; @@ -1049,6 +1057,17 @@ Chain = DAG.getNode(X86ISD::CALL, NodeTys, Ops); InFlag = Chain.getValue(1); + NodeTys.clear(); + NodeTys.push_back(MVT::Other); // Returns a chain + NodeTys.push_back(MVT::Flag); // Returns a flag for retval copy to use. + Ops.clear(); + Ops.push_back(Chain); + Ops.push_back(DAG.getConstant(ArgOffset, getPointerTy())); + Ops.push_back(DAG.getConstant(ArgOffset, getPointerTy())); + Ops.push_back(InFlag); + Chain = DAG.getNode(ISD::CALLSEQ_END, NodeTys, Ops); + InFlag = Chain.getValue(1); + SDOperand RetVal; if (RetTyVT != MVT::isVoid) { switch (RetTyVT) { @@ -1119,9 +1138,6 @@ } } - Chain = DAG.getNode(ISD::CALLSEQ_END, MVT::Other, Chain, - DAG.getConstant(ArgOffset, getPointerTy()), - DAG.getConstant(ArgOffset, getPointerTy())); return std::make_pair(RetVal, Chain); } else { std::vector Ops; Index: llvm/lib/Target/X86/X86InstrInfo.td diff -u llvm/lib/Target/X86/X86InstrInfo.td:1.216 llvm/lib/Target/X86/X86InstrInfo.td:1.217 --- llvm/lib/Target/X86/X86InstrInfo.td:1.216 Fri Jan 20 20:55:41 2006 +++ llvm/lib/Target/X86/X86InstrInfo.td Mon Jan 23 23:17:12 2006 @@ -88,7 +88,7 @@ [SDNPHasChain]>; def X86callseq_end : SDNode<"ISD::CALLSEQ_END", SDT_X86CallSeqEnd, - [SDNPHasChain]>; + [SDNPHasChain, SDNPInFlag, SDNPOutFlag]>; def X86call : SDNode<"X86ISD::CALL", SDT_X86Call, [SDNPHasChain, SDNPOutFlag, SDNPOptInFlag]>; From lattner at cs.uiuc.edu Mon Jan 23 23:47:17 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon, 23 Jan 2006 23:47:17 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/SelectionDAGNodes.h Message-ID: <200601240547.XAA26792@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/CodeGen: SelectionDAGNodes.h updated: 1.92 -> 1.93 --- Log message: add a method --- Diffs of the changes: (+1 -0) SelectionDAGNodes.h | 1 + 1 files changed, 1 insertion(+) Index: llvm/include/llvm/CodeGen/SelectionDAGNodes.h diff -u llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.92 llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.93 --- llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.92 Mon Jan 23 15:51:14 2006 +++ llvm/include/llvm/CodeGen/SelectionDAGNodes.h Mon Jan 23 23:47:05 2006 @@ -645,6 +645,7 @@ /// setAdjCallChain - This method should only be used by the legalizer. void setAdjCallChain(SDOperand N); + void setAdjCallFlag(SDOperand N); protected: friend class SelectionDAG; From lattner at cs.uiuc.edu Mon Jan 23 23:48:33 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon, 23 Jan 2006 23:48:33 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp SelectionDAG.cpp Message-ID: <200601240548.XAA26876@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/SelectionDAG: LegalizeDAG.cpp updated: 1.275 -> 1.276 SelectionDAG.cpp updated: 1.242 -> 1.243 --- Log message: Fix an infinite loop I caused by making sure to legalize the flag operand of CALLSEQ_* nodes --- Diffs of the changes: (+22 -1) LegalizeDAG.cpp | 10 +++++++++- SelectionDAG.cpp | 13 +++++++++++++ 2 files changed, 22 insertions(+), 1 deletion(-) Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.275 llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.276 --- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.275 Mon Jan 23 01:30:46 2006 +++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Mon Jan 23 23:48:21 2006 @@ -823,6 +823,13 @@ Tmp2 = Node->getOperand(0); if (Tmp1 != Tmp2) Node->setAdjCallChain(Tmp1); + + // If this has a flag input, do legalize it. + if (Node->getOperand(Node->getNumOperands()-1).getValueType() == MVT::Flag){ + Tmp1 = LegalizeOp(Node->getOperand(Node->getNumOperands()-1)); + if (Tmp1 != Node->getOperand(Node->getNumOperands()-1)) + Node->setAdjCallFlag(Tmp1); + } // Note that we do not create new CALLSEQ_DOWN/UP nodes here. These // nodes are treated specially and are mutated in place. This makes the dag @@ -1365,7 +1372,8 @@ Tmp2, Node->getOperand(3)); } - Node = Result.Val; + Result = LegalizeOp(Result); + break; } switch (getTypeAction(Node->getOperand(1).getValueType())) { Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.242 llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.243 --- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.242 Mon Jan 23 15:51:14 2006 +++ llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Mon Jan 23 23:48:21 2006 @@ -1276,6 +1276,19 @@ OperandList[0].Val->Uses.push_back(this); } +// setAdjCallFlag - This method changes the flag input of an +// CALLSEQ_START/END node to be the specified operand. +void SDNode::setAdjCallFlag(SDOperand N) { + assert(N.getValueType() == MVT::Flag); + assert((getOpcode() == ISD::CALLSEQ_START || + getOpcode() == ISD::CALLSEQ_END) && "Cannot adjust this node!"); + + SDOperand &FlagOp = OperandList[getNumOperands()-1]; + assert(FlagOp.getValueType() == MVT::Flag); + FlagOp.Val->removeUser(this); + FlagOp = N; + FlagOp.Val->Uses.push_back(this); +} SDOperand SelectionDAG::getLoad(MVT::ValueType VT, From lattner at cs.uiuc.edu Tue Jan 24 00:14:00 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue, 24 Jan 2006 00:14:00 -0600 Subject: [llvm-commits] CVS: llvm/test/Regression/Bytecode/old-intrinsics.ll Message-ID: <200601240614.AAA03177@zion.cs.uiuc.edu> Changes in directory llvm/test/Regression/Bytecode: old-intrinsics.ll updated: 1.3 -> 1.4 --- Log message: This is still broken --- Diffs of the changes: (+2 -0) old-intrinsics.ll | 2 ++ 1 files changed, 2 insertions(+) Index: llvm/test/Regression/Bytecode/old-intrinsics.ll diff -u llvm/test/Regression/Bytecode/old-intrinsics.ll:1.3 llvm/test/Regression/Bytecode/old-intrinsics.ll:1.4 --- llvm/test/Regression/Bytecode/old-intrinsics.ll:1.3 Mon Jan 23 01:07:51 2006 +++ llvm/test/Regression/Bytecode/old-intrinsics.ll Tue Jan 24 00:13:48 2006 @@ -2,3 +2,5 @@ ; RUN: llc %s.bc-16 -o /dev/null -f -march=c ; Just see if we can disassemble the bc file corresponding to this file. +; XFAIL: * + From lattner at cs.uiuc.edu Tue Jan 24 00:14:56 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue, 24 Jan 2006 00:14:56 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp Message-ID: <200601240614.AAA03238@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: X86ISelLowering.cpp updated: 1.53 -> 1.54 --- Log message: use ESP directly, not a copy of ESP into some other register for fastcc calls --- Diffs of the changes: (+1 -2) X86ISelLowering.cpp | 3 +-- 1 files changed, 1 insertion(+), 2 deletions(-) Index: llvm/lib/Target/X86/X86ISelLowering.cpp diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.53 llvm/lib/Target/X86/X86ISelLowering.cpp:1.54 --- llvm/lib/Target/X86/X86ISelLowering.cpp:1.53 Mon Jan 23 23:17:12 2006 +++ llvm/lib/Target/X86/X86ISelLowering.cpp Tue Jan 24 00:14:44 2006 @@ -923,8 +923,7 @@ // Arguments go on the stack in reverse order, as specified by the ABI. unsigned ArgOffset = 0; - SDOperand StackPtr = DAG.getCopyFromReg(DAG.getEntryNode(), - X86::ESP, MVT::i32); + SDOperand StackPtr = DAG.getRegister(X86::ESP, MVT::i32); NumIntRegs = 0; std::vector Stores; std::vector RegValuesToPass; From lattner at cs.uiuc.edu Tue Jan 24 12:40:21 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue, 24 Jan 2006 12:40:21 -0600 Subject: [llvm-commits] CVS: llvm-test/SingleSource/UnitTests/2006-01-23-UnionInit.c Message-ID: <200601241840.MAA19867@zion.cs.uiuc.edu> Changes in directory llvm-test/SingleSource/UnitTests: 2006-01-23-UnionInit.c added (r1.1) --- Log message: Add a testcase for 12 PR's fixed by the new front-end. --- Diffs of the changes: (+143 -0) 2006-01-23-UnionInit.c | 143 +++++++++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 143 insertions(+) Index: llvm-test/SingleSource/UnitTests/2006-01-23-UnionInit.c diff -c /dev/null llvm-test/SingleSource/UnitTests/2006-01-23-UnionInit.c:1.1 *** /dev/null Tue Jan 24 12:40:20 2006 --- llvm-test/SingleSource/UnitTests/2006-01-23-UnionInit.c Tue Jan 24 12:40:10 2006 *************** *** 0 **** --- 1,143 ---- + #include + + //===- PR156 --------------------------------------------------------------===// + struct task_struct { + char comm[16]; + }; + union task_union { + struct task_struct task; + unsigned long stack[2048*sizeof(long)/sizeof(long)]; + }; + union task_union init_task_union = { { comm: "swapper" } }; + + //===- PR295/PR568 --------------------------------------------------------===// + + struct inflate_huft_s { + union { + struct { + unsigned char Exop; + unsigned char Bits; + } what; + unsigned pad; + } word; + unsigned base; + } fixed_tl[] = { + {{{96,7}},256} + }; + + //===- PR574 --------------------------------------------------------------===// + + union bt4 { + struct at4 { + unsigned long int av4; + } gv4; + double hv4; + } bkv4 = { { 61172160UL } }; + + struct bt1 { + signed dv1:4; + signed ev1:6; + unsigned char fv1[1]; + } cav1 = { 4, 22, { '\x2' } }; + + //===- PR162 --------------------------------------------------------------===// + + union foo { + struct { char A, B; } X; + int C; + } V = { {1, 2} }; + + //===- PR650 --------------------------------------------------------------===// + + union nameData { + char data[64]; + int alignmentDummy; + } nd = {"relname"}; + + //===- PR199 --------------------------------------------------------------===// + + struct one { + int a; + int values[]; + } hobbit = {5, {1, 2, 3}}; + + extern struct one hobbit2; // resize after first use seen + void *foo() { return &hobbit2; } + struct one hobbit2 = {5, {1, 2, 3}}; + + //===- PR431 --------------------------------------------------------------===// + + struct { + int x; + int v[]; + } data = {0, {1,2,3} }; + + //===- PR654 --------------------------------------------------------------===// + + struct { + char *inplace; + char chunk_data[]; + } s = {0, " xyzkasjdlf "}; + + //===- PR323 --------------------------------------------------------------===// + + struct dvd_send_key { + unsigned agid : 2; + unsigned char key[5]; + }; + + union { + struct dvd_send_key lsk; + } ai = {{3, "foo"}}; + + //===- PR627 --------------------------------------------------------------===// + + typedef struct {} emptystruct; + typedef struct { + emptystruct raw_lock; + } spinlock_t; + + emptystruct one_raw_spinlock (void) { + emptystruct raw; + printf("returning raw_lock\n"); + return raw; + } + + //===- PR684 --------------------------------------------------------------===// + + union ucast { + int i; + struct s { + int i1, i2, i3; + } s; + }; + union ucast ucast_test (void) { + struct s y = {1, 2}; + union ucast z = (union ucast)y; + return z; + } + + //===- Checker ------------------------------------------------------------===// + + int main() { + union ucast XX; + spinlock_t lock; + printf("PR156: %s\n", init_task_union.task.comm); + printf("PR295/PR568: %d, %d\n", fixed_tl[0].word.pad, fixed_tl[0].base); + printf("PR574: %d, %d, %d, %d\n", bkv4.gv4.av4, cav1.dv1, cav1.ev1, + cav1.fv1[0]); + printf("PR162: %d, %d, %d\n", V.X.A, V.X.B, V.C); + printf("PR650: %s, %d\n", nd.data, nd.alignmentDummy); + printf("PR199: %d, %d, %d, %d\n", hobbit.a, hobbit.values[0], + hobbit.values[1], hobbit.values[2]); + printf("PR199: %d, %d, %d, %d\n", hobbit2.a, hobbit2.values[0], + hobbit2.values[1], hobbit2.values[2]); + printf("PR431: %d, %d, %d, %d\n", data.x, data.v[0], + data.v[1], data.v[2]); + printf("PR654: %p, '%s'\n", s.inplace, s.chunk_data); + printf("PR323: %d, '%s'\n", ai.lsk.agid, ai.lsk.key); + lock = (spinlock_t) { .raw_lock = one_raw_spinlock() }; + printf("PR627: %d\n", sizeof(lock)); + XX = ucast_test(); + printf("PR684: %d, %d, %d %d\n", XX.s.i1, XX.s.i2, XX.s.i3, XX.i); + } From lattner at cs.uiuc.edu Tue Jan 24 13:35:10 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue, 24 Jan 2006 13:35:10 -0600 Subject: [llvm-commits] CVS: llvm/test/Regression/Transforms/ScalarRepl/2006-01-24-IllegalUnionPromoteCrash.ll Message-ID: <200601241935.NAA22782@zion.cs.uiuc.edu> Changes in directory llvm/test/Regression/Transforms/ScalarRepl: 2006-01-24-IllegalUnionPromoteCrash.ll added (r1.1) --- Log message: testcase that crashes scalarrepl --- Diffs of the changes: (+12 -0) 2006-01-24-IllegalUnionPromoteCrash.ll | 12 ++++++++++++ 1 files changed, 12 insertions(+) Index: llvm/test/Regression/Transforms/ScalarRepl/2006-01-24-IllegalUnionPromoteCrash.ll diff -c /dev/null llvm/test/Regression/Transforms/ScalarRepl/2006-01-24-IllegalUnionPromoteCrash.ll:1.1 *** /dev/null Tue Jan 24 13:35:08 2006 --- llvm/test/Regression/Transforms/ScalarRepl/2006-01-24-IllegalUnionPromoteCrash.ll Tue Jan 24 13:34:57 2006 *************** *** 0 **** --- 1,12 ---- + ; RUN: llvm-as < %s | opt -scalarrepl -disable-output + + target endian = big + target pointersize = 32 + + int %test(long %L) { + %X = alloca int + %Y = cast int* %X to ulong* + store ulong 0, ulong* %Y + %Z = load int *%X + ret int %Z + } From lattner at cs.uiuc.edu Tue Jan 24 13:36:38 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue, 24 Jan 2006 13:36:38 -0600 Subject: [llvm-commits] CVS: llvm/lib/Transforms/Scalar/ScalarReplAggregates.cpp Message-ID: <200601241936.NAA22821@zion.cs.uiuc.edu> Changes in directory llvm/lib/Transforms/Scalar: ScalarReplAggregates.cpp updated: 1.35 -> 1.36 --- Log message: Fix Regression/Transforms/ScalarRepl/2006-01-24-IllegalUnionPromoteCrash.ll --- Diffs of the changes: (+1 -3) ScalarReplAggregates.cpp | 4 +--- 1 files changed, 1 insertion(+), 3 deletions(-) Index: llvm/lib/Transforms/Scalar/ScalarReplAggregates.cpp diff -u llvm/lib/Transforms/Scalar/ScalarReplAggregates.cpp:1.35 llvm/lib/Transforms/Scalar/ScalarReplAggregates.cpp:1.36 --- llvm/lib/Transforms/Scalar/ScalarReplAggregates.cpp:1.35 Sun Jan 22 17:32:06 2006 +++ llvm/lib/Transforms/Scalar/ScalarReplAggregates.cpp Tue Jan 24 13:36:27 2006 @@ -554,9 +554,7 @@ // Convert the stored type to the actual type, shift it left to insert // then 'or' into place. Value *SV = SI->getOperand(0); - if (SV->getType() == NewAI->getType()->getElementType()) { - assert(Offset == 0 && "Store out of bounds!"); - } else { + if (SV->getType() != NewAI->getType()->getElementType() || Offset != 0) { Value *Old = new LoadInst(NewAI, NewAI->getName()+".in", SI); // If SV is signed, convert it to unsigned, so that the next cast zero // extends the value. From evan.cheng at apple.com Tue Jan 24 14:07:50 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 24 Jan 2006 14:07:50 -0600 Subject: [llvm-commits] CVS: llvm/utils/TableGen/DAGISelEmitter.cpp Message-ID: <200601242007.OAA23191@zion.cs.uiuc.edu> Changes in directory llvm/utils/TableGen: DAGISelEmitter.cpp updated: 1.139 -> 1.140 --- Log message: Optional InFlag was not being included in node. --- Diffs of the changes: (+1 -1) DAGISelEmitter.cpp | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/utils/TableGen/DAGISelEmitter.cpp diff -u llvm/utils/TableGen/DAGISelEmitter.cpp:1.139 llvm/utils/TableGen/DAGISelEmitter.cpp:1.140 --- llvm/utils/TableGen/DAGISelEmitter.cpp:1.139 Thu Jan 19 19:11:03 2006 +++ llvm/utils/TableGen/DAGISelEmitter.cpp Tue Jan 24 14:07:38 2006 @@ -2224,7 +2224,7 @@ for (unsigned i = 0, e = Ops.size(); i != e; ++i) OS << ", Tmp" << Ops[i]; if (HasChain) OS << ", Chain"; - if (HasInFlag || HasImpInputs) OS << ", InFlag"; + if (HasInFlag || HasOptInFlag || HasImpInputs) OS << ", InFlag"; OS << ");\n"; unsigned ValNo = 0; From alenhar2 at cs.uiuc.edu Tue Jan 24 14:41:44 2006 From: alenhar2 at cs.uiuc.edu (Andrew Lenharth) Date: Tue, 24 Jan 2006 14:41:44 -0600 Subject: [llvm-commits] CVS: llvm-poolalloc/lib/PoolAllocate/PointerCompress.cpp PoolAllocate.cpp Message-ID: <200601242041.OAA14291@apoc.cs.uiuc.edu> Changes in directory llvm-poolalloc/lib/PoolAllocate: PointerCompress.cpp updated: 1.63 -> 1.64 PoolAllocate.cpp updated: 1.121 -> 1.122 --- Log message: fix build --- Diffs of the changes: (+6 -0) PointerCompress.cpp | 3 +++ PoolAllocate.cpp | 3 +++ 2 files changed, 6 insertions(+) Index: llvm-poolalloc/lib/PoolAllocate/PointerCompress.cpp diff -u llvm-poolalloc/lib/PoolAllocate/PointerCompress.cpp:1.63 llvm-poolalloc/lib/PoolAllocate/PointerCompress.cpp:1.64 --- llvm-poolalloc/lib/PoolAllocate/PointerCompress.cpp:1.63 Wed May 25 18:45:20 2005 +++ llvm-poolalloc/lib/PoolAllocate/PointerCompress.cpp Tue Jan 24 14:41:19 2006 @@ -27,6 +27,9 @@ #include "llvm/Support/InstVisitor.h" #include "llvm/Transforms/Utils/Cloning.h" + +#include + using namespace llvm; /// MEMUINTTYPE - This is the actual type we are compressing to. This is really Index: llvm-poolalloc/lib/PoolAllocate/PoolAllocate.cpp diff -u llvm-poolalloc/lib/PoolAllocate/PoolAllocate.cpp:1.121 llvm-poolalloc/lib/PoolAllocate/PoolAllocate.cpp:1.122 --- llvm-poolalloc/lib/PoolAllocate/PoolAllocate.cpp:1.121 Thu Dec 22 10:32:54 2005 +++ llvm-poolalloc/lib/PoolAllocate/PoolAllocate.cpp Tue Jan 24 14:41:19 2006 @@ -32,6 +32,9 @@ #include "llvm/Support/CommandLine.h" #include "llvm/Support/Debug.h" #include "llvm/Support/Timer.h" + +#include + using namespace llvm; using namespace PA; #ifdef SAFECODE From evan.cheng at apple.com Tue Jan 24 14:47:02 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 24 Jan 2006 14:47:02 -0600 Subject: [llvm-commits] CVS: llvm/utils/TableGen/DAGISelEmitter.cpp Message-ID: <200601242047.OAA06820@zion.cs.uiuc.edu> Changes in directory llvm/utils/TableGen: DAGISelEmitter.cpp updated: 1.140 -> 1.141 --- Log message: Fix an optional in flag bug. --- Diffs of the changes: (+63 -18) DAGISelEmitter.cpp | 81 +++++++++++++++++++++++++++++++++++++++++------------ 1 files changed, 63 insertions(+), 18 deletions(-) Index: llvm/utils/TableGen/DAGISelEmitter.cpp diff -u llvm/utils/TableGen/DAGISelEmitter.cpp:1.140 llvm/utils/TableGen/DAGISelEmitter.cpp:1.141 --- llvm/utils/TableGen/DAGISelEmitter.cpp:1.140 Tue Jan 24 14:07:38 2006 +++ llvm/utils/TableGen/DAGISelEmitter.cpp Tue Jan 24 14:46:50 2006 @@ -2206,26 +2206,71 @@ << NumResults << ");\n"; } } else if (HasChain || HasOutFlag) { - OS << " SDOperand Result = CurDAG->getTargetNode(" - << II.Namespace << "::" << II.TheDef->getName(); + if (HasOptInFlag) { + OS << " SDOperand Result = SDOperand(0, 0);\n"; + unsigned FlagNo = (unsigned) NodeHasChain + Pattern->getNumChildren(); + OS << " if (N.getNumOperands() == " << FlagNo+1 << ")\n"; + OS << " Result = CurDAG->getTargetNode(" + << II.Namespace << "::" << II.TheDef->getName(); + + // Output order: results, chain, flags + // Result types. + if (NumResults > 0) { + if (N->getTypeNum(0) != MVT::isVoid) + OS << ", MVT::" << getEnumName(N->getTypeNum(0)); + } + if (HasChain) + OS << ", MVT::Other"; + if (HasOutFlag) + OS << ", MVT::Flag"; + + // Inputs. + for (unsigned i = 0, e = Ops.size(); i != e; ++i) + OS << ", Tmp" << Ops[i]; + if (HasChain) OS << ", Chain"; + OS << ", InFlag);\n"; + + OS << " else\n"; + OS << " Result = CurDAG->getTargetNode(" + << II.Namespace << "::" << II.TheDef->getName(); + + // Output order: results, chain, flags + // Result types. + if (NumResults > 0) { + if (N->getTypeNum(0) != MVT::isVoid) + OS << ", MVT::" << getEnumName(N->getTypeNum(0)); + } + if (HasChain) + OS << ", MVT::Other"; + if (HasOutFlag) + OS << ", MVT::Flag"; + + // Inputs. + for (unsigned i = 0, e = Ops.size(); i != e; ++i) + OS << ", Tmp" << Ops[i]; + if (HasChain) OS << ", Chain);\n"; + } else { + OS << " SDOperand Result = CurDAG->getTargetNode(" + << II.Namespace << "::" << II.TheDef->getName(); - // Output order: results, chain, flags - // Result types. - if (NumResults > 0) { - if (N->getTypeNum(0) != MVT::isVoid) - OS << ", MVT::" << getEnumName(N->getTypeNum(0)); + // Output order: results, chain, flags + // Result types. + if (NumResults > 0) { + if (N->getTypeNum(0) != MVT::isVoid) + OS << ", MVT::" << getEnumName(N->getTypeNum(0)); + } + if (HasChain) + OS << ", MVT::Other"; + if (HasOutFlag) + OS << ", MVT::Flag"; + + // Inputs. + for (unsigned i = 0, e = Ops.size(); i != e; ++i) + OS << ", Tmp" << Ops[i]; + if (HasChain) OS << ", Chain"; + if (HasInFlag || HasImpInputs) OS << ", InFlag"; + OS << ");\n"; } - if (HasChain) - OS << ", MVT::Other"; - if (HasOutFlag) - OS << ", MVT::Flag"; - - // Inputs. - for (unsigned i = 0, e = Ops.size(); i != e; ++i) - OS << ", Tmp" << Ops[i]; - if (HasChain) OS << ", Chain"; - if (HasInFlag || HasOptInFlag || HasImpInputs) OS << ", InFlag"; - OS << ");\n"; unsigned ValNo = 0; for (unsigned i = 0; i < NumResults; i++) { From alenhar2 at cs.uiuc.edu Tue Jan 24 15:26:55 2006 From: alenhar2 at cs.uiuc.edu (Andrew Lenharth) Date: Tue, 24 Jan 2006 15:26:55 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/DwarfWriter.cpp Message-ID: <200601242126.PAA09547@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen: DwarfWriter.cpp updated: 1.14 -> 1.15 --- Log message: fix build on 64 bit hosts --- Diffs of the changes: (+1 -1) DwarfWriter.cpp | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/CodeGen/DwarfWriter.cpp diff -u llvm/lib/CodeGen/DwarfWriter.cpp:1.14 llvm/lib/CodeGen/DwarfWriter.cpp:1.15 --- llvm/lib/CodeGen/DwarfWriter.cpp:1.14 Mon Jan 23 22:42:53 2006 +++ llvm/lib/CodeGen/DwarfWriter.cpp Tue Jan 24 15:26:43 2006 @@ -645,7 +645,7 @@ #ifndef NDEBUG void DIEAbbrev::print(std::ostream &O) { O << "Abbreviation @" - << std::hex << (unsigned)this << std::dec + << std::hex << (unsigned long)this << std::dec << " " << TagString(Tag) << " " From alenhar2 at cs.uiuc.edu Tue Jan 24 19:51:20 2006 From: alenhar2 at cs.uiuc.edu (Andrew Lenharth) Date: Tue, 24 Jan 2006 19:51:20 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp Message-ID: <200601250151.TAA08255@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/Alpha: AlphaRegisterInfo.cpp updated: 1.31 -> 1.32 --- Log message: maintaining stackpointer alignment. Perhaps it doesn't matter --- Diffs of the changes: (+4 -0) AlphaRegisterInfo.cpp | 4 ++++ 1 files changed, 4 insertions(+) Index: llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp diff -u llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp:1.31 llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp:1.32 --- llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp:1.31 Sun Jan 1 16:13:54 2006 +++ llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp Tue Jan 24 19:51:08 2006 @@ -257,6 +257,7 @@ " for stack size: " << MF.getFrameInfo()->getStackSize() << "\n"); if (Offset > IMM_HIGH || Offset < IMM_LOW) { + std::cerr << "Unconditionally using R28 for evil purposes\n"; //so in this case, we need to use a temporary register, and move the original //inst off the SP/FP //fix up the old: @@ -311,6 +312,9 @@ // Do we need to allocate space on the stack? if (NumBytes == 0) return; + unsigned Align = MF.getTarget().getFrameInfo()->getStackAlignment(); + NumBytes = (NumBytes+Align-1)/Align*Align; + // Update frame info to pretend that this is part of the stack... MFI->setStackSize(NumBytes); From duraid at octopus.com.au Tue Jan 24 20:23:49 2006 From: duraid at octopus.com.au (Duraid Madina) Date: Tue, 24 Jan 2006 20:23:49 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/IA64/IA64Bundling.cpp IA64.h IA64InstrInfo.cpp IA64InstrInfo.td IA64RegisterInfo.cpp IA64TargetMachine.cpp Message-ID: <200601250223.UAA09451@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/IA64: IA64Bundling.cpp added (r1.1) IA64.h updated: 1.3 -> 1.4 IA64InstrInfo.cpp updated: 1.3 -> 1.4 IA64InstrInfo.td updated: 1.42 -> 1.43 IA64RegisterInfo.cpp updated: 1.11 -> 1.12 IA64TargetMachine.cpp updated: 1.10 -> 1.11 --- Log message: add bundling! well not really, for now it's just stop-insertion. --- Diffs of the changes: (+277 -154) IA64.h | 6 IA64Bundling.cpp | 111 ++++++++++++++++++ IA64InstrInfo.cpp | 1 IA64InstrInfo.td | 302 +++++++++++++++++++++++++------------------------- IA64RegisterInfo.cpp | 6 IA64TargetMachine.cpp | 5 6 files changed, 277 insertions(+), 154 deletions(-) Index: llvm/lib/Target/IA64/IA64Bundling.cpp diff -c /dev/null llvm/lib/Target/IA64/IA64Bundling.cpp:1.1 *** /dev/null Tue Jan 24 20:23:48 2006 --- llvm/lib/Target/IA64/IA64Bundling.cpp Tue Jan 24 20:23:38 2006 *************** *** 0 **** --- 1,111 ---- + //===-- IA64Bundling.cpp - IA-64 instruction bundling pass. ------------ --===// + // + // The LLVM Compiler Infrastructure + // + // This file was developed by the LLVM research group and is distributed under + // the University of Illinois Open Source License. See LICENSE.TXT for details. + // + //===----------------------------------------------------------------------===// + // + // Add stops where required to prevent read-after-write and write-after-write + // dependencies, for both registers and memory addresses. There are exceptions: + // + // - Compare instructions (cmp*, tbit, tnat, fcmp, frcpa) are OK with + // WAW dependencies so long as they all target p0, or are of parallel + // type (.and*/.or*) + // + // FIXME: bundling, for now, is left to the assembler. + // FIXME: this might be an appropriate place to translate between different + // instructions that do the same thing, if this helps bundling. + // + //===----------------------------------------------------------------------===// + + #include "IA64.h" + #include "llvm/CodeGen/MachineFunctionPass.h" + #include "llvm/CodeGen/MachineInstrBuilder.h" + #include "llvm/ADT/SetOperations.h" + #include "llvm/ADT/Statistic.h" + #include "llvm/Support/Debug.h" + #include + #include + using namespace llvm; + + namespace { + Statistic<> StopBitsAdded("ia64-codegen", "Number of stop bits added"); + + struct IA64BundlingPass : public MachineFunctionPass { + /// Target machine description which we query for reg. names, data + /// layout, etc. + /// + TargetMachine &TM; + + IA64BundlingPass(TargetMachine &tm) : TM(tm) { } + + virtual const char *getPassName() const { + return "IA64 (Itanium) Bundling Pass"; + } + + bool runOnMachineBasicBlock(MachineBasicBlock &MBB); + bool runOnMachineFunction(MachineFunction &F) { + bool Changed = false; + for (MachineFunction::iterator FI = F.begin(), FE = F.end(); + FI != FE; ++FI) + Changed |= runOnMachineBasicBlock(*FI); + return Changed; + } + + std::set PendingRegWrites; // XXX: ugly global, but + // pending writes can cross basic blocks. Note that + // taken branches end instruction groups. + }; + } // end of anonymous namespace + + /// createIA64BundlingPass - Returns a pass that adds STOP (;;) instructions + /// and arranges the result into bundles. + /// + FunctionPass *llvm::createIA64BundlingPass(TargetMachine &tm) { + return new IA64BundlingPass(tm); + } + + /// runOnMachineBasicBlock - add stops and bundle this MBB. + /// + bool IA64BundlingPass::runOnMachineBasicBlock(MachineBasicBlock &MBB) { + bool Changed = false; + + for (MachineBasicBlock::iterator I = MBB.begin(); I != MBB.end(); ) { + MachineInstr *CurrentInsn = I++; + std::set CurrentReads, CurrentWrites, OrigWrites; + + for(unsigned i=0; i < CurrentInsn->getNumOperands(); i++) { + MachineOperand &MO=CurrentInsn->getOperand(i); + if(MO.isRegister()) { + if(MO.isUse()) { // TODO: exclude p0 + CurrentReads.insert(MO.getReg()); + } + if(MO.isDef()) { // TODO: exclude p0 + CurrentWrites.insert(MO.getReg()); + OrigWrites.insert(MO.getReg()); // FIXME: use a nondestructive + // set_intersect instead? + } + } + } + + // CurrentReads/CurrentWrites contain info for the current instruction. + // Does it read or write any registers that are pending a write? + // (i.e. not separated by a stop) + set_intersect(CurrentReads, PendingRegWrites); + set_intersect(CurrentWrites, PendingRegWrites); + + if(! (CurrentReads.empty() && CurrentWrites.empty()) ) { + // there is a conflict, insert a stop and reset PendingRegWrites + CurrentInsn = BuildMI(MBB, CurrentInsn, IA64::STOP, 0); + PendingRegWrites=OrigWrites; // carry over current writes to next insn + Changed=true; StopBitsAdded++; // update stats + } else { // otherwise, track additional pending writes + set_union(PendingRegWrites, OrigWrites); + } + } // onto the next insn in the MBB + + return Changed; + } + Index: llvm/lib/Target/IA64/IA64.h diff -u llvm/lib/Target/IA64/IA64.h:1.3 llvm/lib/Target/IA64/IA64.h:1.4 --- llvm/lib/Target/IA64/IA64.h:1.3 Fri Oct 28 12:46:36 2005 +++ llvm/lib/Target/IA64/IA64.h Tue Jan 24 20:23:38 2006 @@ -27,10 +27,10 @@ /// FunctionPass *createIA64DAGToDAGInstructionSelector(TargetMachine &TM); -/// createIA64PatternInstructionSelector - This pass converts an LLVM function -/// into a machine code representation in a more aggressive way. +/// createIA64BundlingPass - This pass adds stop bits and bundles +/// instructions. /// -FunctionPass *createIA64PatternInstructionSelector(TargetMachine &TM); +FunctionPass *createIA64BundlingPass(TargetMachine &TM); /// createIA64CodePrinterPass - Returns a pass that prints the IA64 /// assembly code for a MachineFunction to the given output stream, Index: llvm/lib/Target/IA64/IA64InstrInfo.cpp diff -u llvm/lib/Target/IA64/IA64InstrInfo.cpp:1.3 llvm/lib/Target/IA64/IA64InstrInfo.cpp:1.4 --- llvm/lib/Target/IA64/IA64InstrInfo.cpp:1.3 Fri Apr 22 12:54:15 2005 +++ llvm/lib/Target/IA64/IA64InstrInfo.cpp Tue Jan 24 20:23:38 2006 @@ -28,6 +28,7 @@ unsigned& destReg) const { MachineOpCode oc = MI.getOpcode(); if (oc == IA64::MOV || oc == IA64::FMOV) { + // TODO: this doesn't detect predicate moves assert(MI.getNumOperands() == 2 && /* MI.getOperand(0).isRegister() && MI.getOperand(1).isRegister() && */ Index: llvm/lib/Target/IA64/IA64InstrInfo.td diff -u llvm/lib/Target/IA64/IA64InstrInfo.td:1.42 llvm/lib/Target/IA64/IA64InstrInfo.td:1.43 --- llvm/lib/Target/IA64/IA64InstrInfo.td:1.42 Fri Jan 20 14:24:31 2006 +++ llvm/lib/Target/IA64/IA64InstrInfo.td Tue Jan 24 20:23:38 2006 @@ -106,49 +106,49 @@ }]>; def ADD : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2), - "add $dst = $src1, $src2;;", + "add $dst = $src1, $src2", [(set GR:$dst, (add GR:$src1, GR:$src2))]>; def ADD1 : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2), - "add $dst = $src1, $src2, 1;;", + "add $dst = $src1, $src2, 1", [(set GR:$dst, (add (add GR:$src1, GR:$src2), 1))]>; def ADDS : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, s14imm:$imm), - "adds $dst = $imm, $src1;;", + "adds $dst = $imm, $src1", [(set GR:$dst, (add GR:$src1, immSExt14:$imm))]>; def MOVL : AForm_DAG<0x03, 0x0b, (ops GR:$dst, s64imm:$imm), - "movl $dst = $imm;;", + "movl $dst = $imm", [(set GR:$dst, imm64:$imm)]>; def ADDL_GA : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, globaladdress:$imm), - "addl $dst = $imm, $src1;;", + "addl $dst = $imm, $src1", []>; // hmm def ADDL_EA : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, calltarget:$imm), - "addl $dst = $imm, $src1;;", + "addl $dst = $imm, $src1", []>; def SUB : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2), - "sub $dst = $src1, $src2;;", + "sub $dst = $src1, $src2", [(set GR:$dst, (sub GR:$src1, GR:$src2))]>; def SUB1 : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2), - "sub $dst = $src1, $src2, 1;;", + "sub $dst = $src1, $src2, 1", [(set GR:$dst, (add (sub GR: $src1, GR:$src2), -1))]>; let isTwoAddress = 1 in { def TPCADDIMM22 : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src1, s22imm:$imm, PR:$qp), - "($qp) add $dst = $imm, $dst;;">; + "($qp) add $dst = $imm, $dst">; def TPCADDS : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, s14imm:$imm, PR:$qp), - "($qp) adds $dst = $imm, $dst;;", + "($qp) adds $dst = $imm, $dst", []>; def TPCMPIMM8NE : AForm<0x03, 0x0b, (ops PR:$dst, PR:$src1, s22imm:$imm, GR:$src2, PR:$qp), - "($qp) cmp.ne $dst , p0 = $imm, $src2;;">; + "($qp) cmp.ne $dst , p0 = $imm, $src2">; } // zero extend a bool (predicate reg) into an integer reg @@ -156,66 +156,66 @@ (TPCADDIMM22 (ADDS r0, 0), 1, PR:$src)>; // normal sign/zero-extends -def SXT1 : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src), "sxt1 $dst = $src;;", +def SXT1 : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src), "sxt1 $dst = $src", [(set GR:$dst, (sext_inreg GR:$src, i8))]>; -def ZXT1 : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src), "zxt1 $dst = $src;;", +def ZXT1 : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src), "zxt1 $dst = $src", [(set GR:$dst, (and GR:$src, 255))]>; -def SXT2 : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src), "sxt2 $dst = $src;;", +def SXT2 : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src), "sxt2 $dst = $src", [(set GR:$dst, (sext_inreg GR:$src, i16))]>; -def ZXT2 : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src), "zxt2 $dst = $src;;", +def ZXT2 : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src), "zxt2 $dst = $src", [(set GR:$dst, (and GR:$src, 65535))]>; -def SXT4 : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src), "sxt4 $dst = $src;;", +def SXT4 : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src), "sxt4 $dst = $src", [(set GR:$dst, (sext_inreg GR:$src, i32))]>; -def ZXT4 : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src), "zxt4 $dst = $src;;", +def ZXT4 : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src), "zxt4 $dst = $src", [(set GR:$dst, (and GR:$src, is32ones))]>; // fixme: shrs vs shru? def MIX1L : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2), - "mix1.l $dst = $src1, $src2;;", + "mix1.l $dst = $src1, $src2", [(set GR:$dst, (or (and GR:$src1, isMIX1Lable), (and (srl GR:$src2, (i64 8)), isMIX1Lable)))]>; def MIX2L : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2), - "mix2.l $dst = $src1, $src2;;", + "mix2.l $dst = $src1, $src2", [(set GR:$dst, (or (and GR:$src1, isMIX2Lable), (and (srl GR:$src2, (i64 16)), isMIX2Lable)))]>; def MIX4L : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2), - "mix4.l $dst = $src1, $src2;;", + "mix4.l $dst = $src1, $src2", [(set GR:$dst, (or (and GR:$src1, isMIX4Lable), (and (srl GR:$src2, (i64 32)), isMIX4Lable)))]>; def MIX1R : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2), - "mix1.r $dst = $src1, $src2;;", + "mix1.r $dst = $src1, $src2", [(set GR:$dst, (or (and (shl GR:$src1, (i64 8)), isMIX1Rable), (and GR:$src2, isMIX1Rable)))]>; def MIX2R : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2), - "mix2.r $dst = $src1, $src2;;", + "mix2.r $dst = $src1, $src2", [(set GR:$dst, (or (and (shl GR:$src1, (i64 16)), isMIX2Rable), (and GR:$src2, isMIX2Rable)))]>; def MIX4R : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2), - "mix4.r $dst = $src1, $src2;;", + "mix4.r $dst = $src1, $src2", [(set GR:$dst, (or (and (shl GR:$src1, (i64 32)), isMIX4Rable), (and GR:$src2, isMIX4Rable)))]>; def GETFSIGD : AForm_DAG<0x03, 0x0b, (ops GR:$dst, FP:$src), - "getf.sig $dst = $src;;", + "getf.sig $dst = $src", []>; def SETFSIGD : AForm_DAG<0x03, 0x0b, (ops FP:$dst, GR:$src), - "setf.sig $dst = $src;;", + "setf.sig $dst = $src", []>; def XMALD : AForm_DAG<0x03, 0x0b, (ops FP:$dst, FP:$src1, FP:$src2, FP:$src3), - "xma.l $dst = $src1, $src2, $src3;;", + "xma.l $dst = $src1, $src2, $src3", []>; def XMAHD : AForm_DAG<0x03, 0x0b, (ops FP:$dst, FP:$src1, FP:$src2, FP:$src3), - "xma.h $dst = $src1, $src2, $src3;;", + "xma.h $dst = $src1, $src2, $src3", []>; def XMAHUD : AForm_DAG<0x03, 0x0b, (ops FP:$dst, FP:$src1, FP:$src2, FP:$src3), - "xma.hu $dst = $src1, $src2, $src3;;", + "xma.hu $dst = $src1, $src2, $src3", []>; // pseudocode for integer multiplication @@ -230,98 +230,98 @@ // has imm form, too // def ADDS : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src1, s14imm:$imm), -// "adds $dst = $imm, $src1;;">; +// "adds $dst = $imm, $src1">; def AND : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2), - "and $dst = $src1, $src2;;", + "and $dst = $src1, $src2", [(set GR:$dst, (and GR:$src1, GR:$src2))]>; def ANDCM : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2), - "andcm $dst = $src1, $src2;;", + "andcm $dst = $src1, $src2", [(set GR:$dst, (and GR:$src1, (not GR:$src2)))]>; // TODO: and/andcm/or/xor/add/sub/shift immediate forms def OR : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2), - "or $dst = $src1, $src2;;", + "or $dst = $src1, $src2", [(set GR:$dst, (or GR:$src1, GR:$src2))]>; def pOR : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2, PR:$qp), - "($qp) or $dst = $src1, $src2;;">; + "($qp) or $dst = $src1, $src2">; // the following are all a bit unfortunate: we throw away the complement // of the compare! def CMPEQ : AForm_DAG<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2), - "cmp.eq $dst, p0 = $src1, $src2;;", + "cmp.eq $dst, p0 = $src1, $src2", [(set PR:$dst, (seteq GR:$src1, GR:$src2))]>; def CMPGT : AForm_DAG<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2), - "cmp.gt $dst, p0 = $src1, $src2;;", + "cmp.gt $dst, p0 = $src1, $src2", [(set PR:$dst, (setgt GR:$src1, GR:$src2))]>; def CMPGE : AForm_DAG<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2), - "cmp.ge $dst, p0 = $src1, $src2;;", + "cmp.ge $dst, p0 = $src1, $src2", [(set PR:$dst, (setge GR:$src1, GR:$src2))]>; def CMPLT : AForm_DAG<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2), - "cmp.lt $dst, p0 = $src1, $src2;;", + "cmp.lt $dst, p0 = $src1, $src2", [(set PR:$dst, (setlt GR:$src1, GR:$src2))]>; def CMPLE : AForm_DAG<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2), - "cmp.le $dst, p0 = $src1, $src2;;", + "cmp.le $dst, p0 = $src1, $src2", [(set PR:$dst, (setle GR:$src1, GR:$src2))]>; def CMPNE : AForm_DAG<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2), - "cmp.ne $dst, p0 = $src1, $src2;;", + "cmp.ne $dst, p0 = $src1, $src2", [(set PR:$dst, (setne GR:$src1, GR:$src2))]>; def CMPLTU: AForm_DAG<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2), - "cmp.ltu $dst, p0 = $src1, $src2;;", + "cmp.ltu $dst, p0 = $src1, $src2", [(set PR:$dst, (setult GR:$src1, GR:$src2))]>; def CMPGTU: AForm_DAG<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2), - "cmp.gtu $dst, p0 = $src1, $src2;;", + "cmp.gtu $dst, p0 = $src1, $src2", [(set PR:$dst, (setugt GR:$src1, GR:$src2))]>; def CMPLEU: AForm_DAG<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2), - "cmp.leu $dst, p0 = $src1, $src2;;", + "cmp.leu $dst, p0 = $src1, $src2", [(set PR:$dst, (setule GR:$src1, GR:$src2))]>; def CMPGEU: AForm_DAG<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2), - "cmp.geu $dst, p0 = $src1, $src2;;", + "cmp.geu $dst, p0 = $src1, $src2", [(set PR:$dst, (setuge GR:$src1, GR:$src2))]>; // and we do the whole thing again for FP compares! def FCMPEQ : AForm_DAG<0x03, 0x0b, (ops PR:$dst, FP:$src1, FP:$src2), - "fcmp.eq $dst, p0 = $src1, $src2;;", + "fcmp.eq $dst, p0 = $src1, $src2", [(set PR:$dst, (seteq FP:$src1, FP:$src2))]>; def FCMPGT : AForm_DAG<0x03, 0x0b, (ops PR:$dst, FP:$src1, FP:$src2), - "fcmp.gt $dst, p0 = $src1, $src2;;", + "fcmp.gt $dst, p0 = $src1, $src2", [(set PR:$dst, (setgt FP:$src1, FP:$src2))]>; def FCMPGE : AForm_DAG<0x03, 0x0b, (ops PR:$dst, FP:$src1, FP:$src2), - "fcmp.ge $dst, p0 = $src1, $src2;;", + "fcmp.ge $dst, p0 = $src1, $src2", [(set PR:$dst, (setge FP:$src1, FP:$src2))]>; def FCMPLT : AForm_DAG<0x03, 0x0b, (ops PR:$dst, FP:$src1, FP:$src2), - "fcmp.lt $dst, p0 = $src1, $src2;;", + "fcmp.lt $dst, p0 = $src1, $src2", [(set PR:$dst, (setlt FP:$src1, FP:$src2))]>; def FCMPLE : AForm_DAG<0x03, 0x0b, (ops PR:$dst, FP:$src1, FP:$src2), - "fcmp.le $dst, p0 = $src1, $src2;;", + "fcmp.le $dst, p0 = $src1, $src2", [(set PR:$dst, (setle FP:$src1, FP:$src2))]>; def FCMPNE : AForm_DAG<0x03, 0x0b, (ops PR:$dst, FP:$src1, FP:$src2), - "fcmp.neq $dst, p0 = $src1, $src2;;", + "fcmp.neq $dst, p0 = $src1, $src2", [(set PR:$dst, (setne FP:$src1, FP:$src2))]>; def FCMPLTU: AForm_DAG<0x03, 0x0b, (ops PR:$dst, FP:$src1, FP:$src2), - "fcmp.ltu $dst, p0 = $src1, $src2;;", + "fcmp.ltu $dst, p0 = $src1, $src2", [(set PR:$dst, (setult FP:$src1, FP:$src2))]>; def FCMPGTU: AForm_DAG<0x03, 0x0b, (ops PR:$dst, FP:$src1, FP:$src2), - "fcmp.gtu $dst, p0 = $src1, $src2;;", + "fcmp.gtu $dst, p0 = $src1, $src2", [(set PR:$dst, (setugt FP:$src1, FP:$src2))]>; def FCMPLEU: AForm_DAG<0x03, 0x0b, (ops PR:$dst, FP:$src1, FP:$src2), - "fcmp.leu $dst, p0 = $src1, $src2;;", + "fcmp.leu $dst, p0 = $src1, $src2", [(set PR:$dst, (setule FP:$src1, FP:$src2))]>; def FCMPGEU: AForm_DAG<0x03, 0x0b, (ops PR:$dst, FP:$src1, FP:$src2), - "fcmp.geu $dst, p0 = $src1, $src2;;", + "fcmp.geu $dst, p0 = $src1, $src2", [(set PR:$dst, (setuge FP:$src1, FP:$src2))]>; def PCMPEQUNCR0R0 : AForm<0x03, 0x0b, (ops PR:$dst, PR:$qp), - "($qp) cmp.eq.unc $dst, p0 = r0, r0;;">; + "($qp) cmp.eq.unc $dst, p0 = r0, r0">; def : Pat<(trunc GR:$src), // truncate i64 to i1 (CMPNE GR:$src, r0)>; // $src!=0? If so, PR:$dst=true let isTwoAddress=1 in { def TPCMPEQR0R0 : AForm<0x03, 0x0b, (ops PR:$dst, PR:$bogus, PR:$qp), - "($qp) cmp.eq $dst, p0 = r0, r0;;">; + "($qp) cmp.eq $dst, p0 = r0, r0">; def TPCMPNER0R0 : AForm<0x03, 0x0b, (ops PR:$dst, PR:$bogus, PR:$qp), - "($qp) cmp.ne $dst, p0 = r0, r0;;">; + "($qp) cmp.ne $dst, p0 = r0, r0">; } /* our pseudocode for OR on predicates is: @@ -385,47 +385,47 @@ PR:$src1)>; def XOR : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2), - "xor $dst = $src1, $src2;;", + "xor $dst = $src1, $src2", [(set GR:$dst, (xor GR:$src1, GR:$src2))]>; def SHLADD: AForm_DAG<0x03, 0x0b, (ops GR:$dst,GR:$src1,s64imm:$imm,GR:$src2), - "shladd $dst = $src1, $imm, $src2;;", + "shladd $dst = $src1, $imm, $src2", [(set GR:$dst, (add GR:$src2, (shl GR:$src1, isSHLADDimm:$imm)))]>; def SHL : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2), - "shl $dst = $src1, $src2;;", + "shl $dst = $src1, $src2", [(set GR:$dst, (shl GR:$src1, GR:$src2))]>; def SHRU : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2), - "shr.u $dst = $src1, $src2;;", + "shr.u $dst = $src1, $src2", [(set GR:$dst, (srl GR:$src1, GR:$src2))]>; def SHRS : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2), - "shr $dst = $src1, $src2;;", + "shr $dst = $src1, $src2", [(set GR:$dst, (sra GR:$src1, GR:$src2))]>; -def MOV : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src), "mov $dst = $src;;">; +def MOV : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src), "mov $dst = $src">; def FMOV : AForm<0x03, 0x0b, (ops FP:$dst, FP:$src), - "mov $dst = $src;;">; // XXX: there _is_ no fmov + "mov $dst = $src">; // XXX: there _is_ no fmov def PMOV : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src, PR:$qp), - "($qp) mov $dst = $src;;">; + "($qp) mov $dst = $src">; def SPILL_ALL_PREDICATES_TO_GR : AForm<0x03, 0x0b, (ops GR:$dst), - "mov $dst = pr;;">; + "mov $dst = pr">; def FILL_ALL_PREDICATES_FROM_GR : AForm<0x03, 0x0b, (ops GR:$src), - "mov pr = $src;;">; + "mov pr = $src">; let isTwoAddress = 1 in { def CMOV : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src2, GR:$src, PR:$qp), - "($qp) mov $dst = $src;;">; + "($qp) mov $dst = $src">; } def PFMOV : AForm<0x03, 0x0b, (ops FP:$dst, FP:$src, PR:$qp), - "($qp) mov $dst = $src;;">; + "($qp) mov $dst = $src">; let isTwoAddress = 1 in { def CFMOV : AForm<0x03, 0x0b, (ops FP:$dst, FP:$src2, FP:$src, PR:$qp), - "($qp) mov $dst = $src;;">; + "($qp) mov $dst = $src">; } def SELECTINT : Pat<(select PR:$which, GR:$src1, GR:$src2), @@ -467,203 +467,203 @@ def ALLOC : AForm<0x03, 0x0b, (ops GR:$dst, i8imm:$inputs, i8imm:$locals, i8imm:$outputs, i8imm:$rotating), - "alloc $dst = ar.pfs,$inputs,$locals,$outputs,$rotating;;">; + "alloc $dst = ar.pfs,$inputs,$locals,$outputs,$rotating">; let isTwoAddress = 1 in { def TCMPNE : AForm<0x03, 0x0b, (ops PR:$dst, PR:$src2, GR:$src3, GR:$src4), - "cmp.ne $dst, p0 = $src3, $src4;;">; + "cmp.ne $dst, p0 = $src3, $src4">; def TPCMPEQOR : AForm<0x03, 0x0b, (ops PR:$dst, PR:$src2, GR:$src3, GR:$src4, PR:$qp), - "($qp) cmp.eq.or $dst, p0 = $src3, $src4;;">; + "($qp) cmp.eq.or $dst, p0 = $src3, $src4">; def TPCMPNE : AForm<0x03, 0x0b, (ops PR:$dst, PR:$src2, GR:$src3, GR:$src4, PR:$qp), - "($qp) cmp.ne $dst, p0 = $src3, $src4;;">; + "($qp) cmp.ne $dst, p0 = $src3, $src4">; def TPCMPEQ : AForm<0x03, 0x0b, (ops PR:$dst, PR:$src2, GR:$src3, GR:$src4, PR:$qp), - "($qp) cmp.eq $dst, p0 = $src3, $src4;;">; + "($qp) cmp.eq $dst, p0 = $src3, $src4">; } def MOVSIMM14 : AForm<0x03, 0x0b, (ops GR:$dst, s14imm:$imm), - "mov $dst = $imm;;">; + "mov $dst = $imm">; def MOVSIMM22 : AForm<0x03, 0x0b, (ops GR:$dst, s22imm:$imm), - "mov $dst = $imm;;">; + "mov $dst = $imm">; def MOVLIMM64 : AForm<0x03, 0x0b, (ops GR:$dst, s64imm:$imm), - "movl $dst = $imm;;">; + "movl $dst = $imm">; def SHLI : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src1, u6imm:$imm), - "shl $dst = $src1, $imm;;">; + "shl $dst = $src1, $imm">; def SHRUI : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src1, u6imm:$imm), - "shr.u $dst = $src1, $imm;;">; + "shr.u $dst = $src1, $imm">; def SHRSI : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src1, u6imm:$imm), - "shr $dst = $src1, $imm;;">; + "shr $dst = $src1, $imm">; def EXTRU : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src1, u6imm:$imm1, u6imm:$imm2), - "extr.u $dst = $src1, $imm1, $imm2;;">; + "extr.u $dst = $src1, $imm1, $imm2">; -def DEPZ : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src1, u6imm:$imm1, u6imm:$imm2), "dep.z $dst = $src1, $imm1, $imm2;;">; +def DEPZ : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src1, u6imm:$imm1, u6imm:$imm2), "dep.z $dst = $src1, $imm1, $imm2">; def PCMPEQOR : AForm<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2, PR:$qp), - "($qp) cmp.eq.or $dst, p0 = $src1, $src2;;">; + "($qp) cmp.eq.or $dst, p0 = $src1, $src2">; def PCMPEQUNC : AForm<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2, PR:$qp), - "($qp) cmp.eq.unc $dst, p0 = $src1, $src2;;">; + "($qp) cmp.eq.unc $dst, p0 = $src1, $src2">; def PCMPNE : AForm<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2, PR:$qp), - "($qp) cmp.ne $dst, p0 = $src1, $src2;;">; + "($qp) cmp.ne $dst, p0 = $src1, $src2">; // two destinations! def BCMPEQ : AForm<0x03, 0x0b, (ops PR:$dst1, PR:$dst2, GR:$src1, GR:$src2), - "cmp.eq $dst1, dst2 = $src1, $src2;;">; + "cmp.eq $dst1, dst2 = $src1, $src2">; def ADDIMM14 : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src1, s14imm:$imm), - "adds $dst = $imm, $src1;;">; + "adds $dst = $imm, $src1">; def ADDIMM22 : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src1, s22imm:$imm), - "add $dst = $imm, $src1;;">; + "add $dst = $imm, $src1">; def CADDIMM22 : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src1, s22imm:$imm, PR:$qp), - "($qp) add $dst = $imm, $src1;;">; + "($qp) add $dst = $imm, $src1">; def SUBIMM8 : AForm<0x03, 0x0b, (ops GR:$dst, s8imm:$imm, GR:$src2), - "sub $dst = $imm, $src2;;">; + "sub $dst = $imm, $src2">; let isStore = 1, noResults = 1 in { def ST1 : AForm<0x03, 0x0b, (ops GR:$dstPtr, GR:$value), - "st1 [$dstPtr] = $value;;">; + "st1 [$dstPtr] = $value">; def ST2 : AForm<0x03, 0x0b, (ops GR:$dstPtr, GR:$value), - "st2 [$dstPtr] = $value;;">; + "st2 [$dstPtr] = $value">; def ST4 : AForm<0x03, 0x0b, (ops GR:$dstPtr, GR:$value), - "st4 [$dstPtr] = $value;;">; + "st4 [$dstPtr] = $value">; def ST8 : AForm<0x03, 0x0b, (ops GR:$dstPtr, GR:$value), - "st8 [$dstPtr] = $value;;">; + "st8 [$dstPtr] = $value">; def STF4 : AForm<0x03, 0x0b, (ops GR:$dstPtr, FP:$value), - "stfs [$dstPtr] = $value;;">; + "stfs [$dstPtr] = $value">; def STF8 : AForm<0x03, 0x0b, (ops GR:$dstPtr, FP:$value), - "stfd [$dstPtr] = $value;;">; + "stfd [$dstPtr] = $value">; def STF_SPILL : AForm<0x03, 0x0b, (ops GR:$dstPtr, FP:$value), - "stf.spill [$dstPtr] = $value;;">; + "stf.spill [$dstPtr] = $value">; } let isLoad = 1 in { def LD1 : AForm<0x03, 0x0b, (ops GR:$dst, GR:$srcPtr), - "ld1 $dst = [$srcPtr];;">; + "ld1 $dst = [$srcPtr]">; def LD2 : AForm<0x03, 0x0b, (ops GR:$dst, GR:$srcPtr), - "ld2 $dst = [$srcPtr];;">; + "ld2 $dst = [$srcPtr]">; def LD4 : AForm<0x03, 0x0b, (ops GR:$dst, GR:$srcPtr), - "ld4 $dst = [$srcPtr];;">; + "ld4 $dst = [$srcPtr]">; def LD8 : AForm<0x03, 0x0b, (ops GR:$dst, GR:$srcPtr), - "ld8 $dst = [$srcPtr];;">; + "ld8 $dst = [$srcPtr]">; def LDF4 : AForm<0x03, 0x0b, (ops FP:$dst, GR:$srcPtr), - "ldfs $dst = [$srcPtr];;">; + "ldfs $dst = [$srcPtr]">; def LDF8 : AForm<0x03, 0x0b, (ops FP:$dst, GR:$srcPtr), - "ldfd $dst = [$srcPtr];;">; + "ldfd $dst = [$srcPtr]">; def LDF_FILL : AForm<0x03, 0x0b, (ops FP:$dst, GR:$srcPtr), - "ldf.fill $dst = [$srcPtr];;">; + "ldf.fill $dst = [$srcPtr]">; } def POPCNT : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src), - "popcnt $dst = $src;;", + "popcnt $dst = $src", [(set GR:$dst, (ctpop GR:$src))]>; // some FP stuff: // TODO: single-precision stuff? def FADD : AForm_DAG<0x03, 0x0b, (ops FP:$dst, FP:$src1, FP:$src2), - "fadd $dst = $src1, $src2;;", + "fadd $dst = $src1, $src2", [(set FP:$dst, (fadd FP:$src1, FP:$src2))]>; def FADDS: AForm<0x03, 0x0b, (ops FP:$dst, FP:$src1, FP:$src2), - "fadd.s $dst = $src1, $src2;;">; + "fadd.s $dst = $src1, $src2">; def FSUB : AForm_DAG<0x03, 0x0b, (ops FP:$dst, FP:$src1, FP:$src2), - "fsub $dst = $src1, $src2;;", + "fsub $dst = $src1, $src2", [(set FP:$dst, (fsub FP:$src1, FP:$src2))]>; def FMPY : AForm_DAG<0x03, 0x0b, (ops FP:$dst, FP:$src1, FP:$src2), - "fmpy $dst = $src1, $src2;;", + "fmpy $dst = $src1, $src2", [(set FP:$dst, (fmul FP:$src1, FP:$src2))]>; def FMA : AForm_DAG<0x03, 0x0b, (ops FP:$dst, FP:$src1, FP:$src2, FP:$src3), - "fma $dst = $src1, $src2, $src3;;", + "fma $dst = $src1, $src2, $src3", [(set FP:$dst, (fadd (fmul FP:$src1, FP:$src2), FP:$src3))]>; def FMS : AForm_DAG<0x03, 0x0b, (ops FP:$dst, FP:$src1, FP:$src2, FP:$src3), - "fms $dst = $src1, $src2, $src3;;", + "fms $dst = $src1, $src2, $src3", [(set FP:$dst, (fsub (fmul FP:$src1, FP:$src2), FP:$src3))]>; def FNMA : AForm_DAG<0x03, 0x0b, (ops FP:$dst, FP:$src1, FP:$src2, FP:$src3), - "fnma $dst = $src1, $src2, $src3;;", + "fnma $dst = $src1, $src2, $src3", [(set FP:$dst, (fneg (fadd (fmul FP:$src1, FP:$src2), FP:$src3)))]>; def FABS : AForm_DAG<0x03, 0x0b, (ops FP:$dst, FP:$src), - "fabs $dst = $src;;", + "fabs $dst = $src", [(set FP:$dst, (fabs FP:$src))]>; def FNEG : AForm_DAG<0x03, 0x0b, (ops FP:$dst, FP:$src), - "fneg $dst = $src;;", + "fneg $dst = $src", [(set FP:$dst, (fneg FP:$src))]>; def FNEGABS : AForm_DAG<0x03, 0x0b, (ops FP:$dst, FP:$src), - "fnegabs $dst = $src;;", + "fnegabs $dst = $src", [(set FP:$dst, (fneg (fabs FP:$src)))]>; let isTwoAddress=1 in { def TCFMAS1 : AForm<0x03, 0x0b, (ops FP:$dst, FP:$bogussrc, FP:$src1, FP:$src2, FP:$src3, PR:$qp), - "($qp) fma.s1 $dst = $src1, $src2, $src3;;">; + "($qp) fma.s1 $dst = $src1, $src2, $src3">; def TCFMADS0 : AForm<0x03, 0x0b, (ops FP:$dst, FP:$bogussrc, FP:$src1, FP:$src2, FP:$src3, PR:$qp), - "($qp) fma.d.s0 $dst = $src1, $src2, $src3;;">; + "($qp) fma.d.s0 $dst = $src1, $src2, $src3">; } def CFMAS1 : AForm<0x03, 0x0b, (ops FP:$dst, FP:$src1, FP:$src2, FP:$src3, PR:$qp), - "($qp) fma.s1 $dst = $src1, $src2, $src3;;">; + "($qp) fma.s1 $dst = $src1, $src2, $src3">; def CFNMAS1 : AForm<0x03, 0x0b, (ops FP:$dst, FP:$src1, FP:$src2, FP:$src3, PR:$qp), - "($qp) fnma.s1 $dst = $src1, $src2, $src3;;">; + "($qp) fnma.s1 $dst = $src1, $src2, $src3">; def CFMADS1 : AForm<0x03, 0x0b, (ops FP:$dst, FP:$src1, FP:$src2, FP:$src3, PR:$qp), - "($qp) fma.d.s1 $dst = $src1, $src2, $src3;;">; + "($qp) fma.d.s1 $dst = $src1, $src2, $src3">; def CFMADS0 : AForm<0x03, 0x0b, (ops FP:$dst, FP:$src1, FP:$src2, FP:$src3, PR:$qp), - "($qp) fma.d.s0 $dst = $src1, $src2, $src3;;">; + "($qp) fma.d.s0 $dst = $src1, $src2, $src3">; def CFNMADS1 : AForm<0x03, 0x0b, (ops FP:$dst, FP:$src1, FP:$src2, FP:$src3, PR:$qp), - "($qp) fnma.d.s1 $dst = $src1, $src2, $src3;;">; + "($qp) fnma.d.s1 $dst = $src1, $src2, $src3">; def FRCPAS0 : AForm<0x03, 0x0b, (ops FP:$dstFR, PR:$dstPR, FP:$src1, FP:$src2), - "frcpa.s0 $dstFR, $dstPR = $src1, $src2;;">; + "frcpa.s0 $dstFR, $dstPR = $src1, $src2">; def FRCPAS1 : AForm<0x03, 0x0b, (ops FP:$dstFR, PR:$dstPR, FP:$src1, FP:$src2), - "frcpa.s1 $dstFR, $dstPR = $src1, $src2;;">; + "frcpa.s1 $dstFR, $dstPR = $src1, $src2">; def XMAL : AForm<0x03, 0x0b, (ops FP:$dst, FP:$src1, FP:$src2, FP:$src3), - "xma.l $dst = $src1, $src2, $src3;;">; + "xma.l $dst = $src1, $src2, $src3">; def FCVTXF : AForm<0x03, 0x0b, (ops FP:$dst, FP:$src), - "fcvt.xf $dst = $src;;">; + "fcvt.xf $dst = $src">; def FCVTXUF : AForm<0x03, 0x0b, (ops FP:$dst, FP:$src), - "fcvt.xuf $dst = $src;;">; + "fcvt.xuf $dst = $src">; def FCVTXUFS1 : AForm<0x03, 0x0b, (ops FP:$dst, FP:$src), - "fcvt.xuf.s1 $dst = $src;;">; + "fcvt.xuf.s1 $dst = $src">; def FCVTFX : AForm<0x03, 0x0b, (ops FP:$dst, FP:$src), - "fcvt.fx $dst = $src;;">; + "fcvt.fx $dst = $src">; def FCVTFXU : AForm<0x03, 0x0b, (ops FP:$dst, FP:$src), - "fcvt.fxu $dst = $src;;">; + "fcvt.fxu $dst = $src">; def FCVTFXTRUNC : AForm<0x03, 0x0b, (ops FP:$dst, FP:$src), - "fcvt.fx.trunc $dst = $src;;">; + "fcvt.fx.trunc $dst = $src">; def FCVTFXUTRUNC : AForm<0x03, 0x0b, (ops FP:$dst, FP:$src), - "fcvt.fxu.trunc $dst = $src;;">; + "fcvt.fxu.trunc $dst = $src">; def FCVTFXTRUNCS1 : AForm<0x03, 0x0b, (ops FP:$dst, FP:$src), - "fcvt.fx.trunc.s1 $dst = $src;;">; + "fcvt.fx.trunc.s1 $dst = $src">; def FCVTFXUTRUNCS1 : AForm<0x03, 0x0b, (ops FP:$dst, FP:$src), - "fcvt.fxu.trunc.s1 $dst = $src;;">; + "fcvt.fxu.trunc.s1 $dst = $src">; def FNORMD : AForm<0x03, 0x0b, (ops FP:$dst, FP:$src), - "fnorm.d $dst = $src;;">; + "fnorm.d $dst = $src">; def GETFD : AForm<0x03, 0x0b, (ops GR:$dst, FP:$src), - "getf.d $dst = $src;;">; + "getf.d $dst = $src">; def SETFD : AForm<0x03, 0x0b, (ops FP:$dst, GR:$src), - "setf.d $dst = $src;;">; + "setf.d $dst = $src">; def GETFSIG : AForm<0x03, 0x0b, (ops GR:$dst, FP:$src), - "getf.sig $dst = $src;;">; + "getf.sig $dst = $src">; def SETFSIG : AForm<0x03, 0x0b, (ops FP:$dst, GR:$src), - "setf.sig $dst = $src;;">; + "setf.sig $dst = $src">; // these four FP<->int conversion patterns need checking/cleaning def SINT_TO_FP : Pat<(sint_to_fp GR:$src), @@ -678,11 +678,11 @@ let isTerminator = 1, isBranch = 1, noResults = 1 in { def BRL_NOTCALL : RawForm<0x03, 0xb0, (ops i64imm:$dst), - "(p0) brl.cond.sptk $dst;;">; + "(p0) brl.cond.sptk $dst">; def BRLCOND_NOTCALL : RawForm<0x03, 0xb0, (ops PR:$qp, i64imm:$dst), - "($qp) brl.cond.sptk $dst;;">; + "($qp) brl.cond.sptk $dst">; def BRCOND_NOTCALL : RawForm<0x03, 0xb0, (ops PR:$qp, GR:$dst), - "($qp) br.cond.sptk $dst;;">; + "($qp) br.cond.sptk $dst">; } let isCall = 1, noResults = 1, /* isTerminator = 1, isBranch = 1, */ @@ -703,27 +703,31 @@ out0,out1,out2,out3,out4,out5,out6,out7] in { // old pattern call def BRCALL: RawForm<0x03, 0xb0, (ops calltarget:$dst), - "br.call.sptk rp = $dst;;">; // FIXME: teach llvm about branch regs? + "br.call.sptk rp = $dst">; // FIXME: teach llvm about branch regs? // new daggy stuff! // calls a globaladdress def BRCALL_IPREL_GA : RawForm<0x03, 0xb0, (ops calltarget:$dst), - "br.call.sptk rp = $dst;;">; // FIXME: teach llvm about branch regs? + "br.call.sptk rp = $dst">; // FIXME: teach llvm about branch regs? // calls an externalsymbol def BRCALL_IPREL_ES : RawForm<0x03, 0xb0, (ops calltarget:$dst), - "br.call.sptk rp = $dst;;">; // FIXME: teach llvm about branch regs? + "br.call.sptk rp = $dst">; // FIXME: teach llvm about branch regs? // calls through a function descriptor def BRCALL_INDIRECT : RawForm<0x03, 0xb0, (ops GR:$branchreg), - "br.call.sptk rp = $branchreg;;">; // FIXME: teach llvm about branch regs? + "br.call.sptk rp = $branchreg">; // FIXME: teach llvm about branch regs? def BRLCOND_CALL : RawForm<0x03, 0xb0, (ops PR:$qp, i64imm:$dst), - "($qp) brl.cond.call.sptk $dst;;">; + "($qp) brl.cond.call.sptk $dst">; def BRCOND_CALL : RawForm<0x03, 0xb0, (ops PR:$qp, GR:$dst), - "($qp) br.cond.call.sptk $dst;;">; + "($qp) br.cond.call.sptk $dst">; } // Return branch: let isTerminator = 1, isReturn = 1, noResults = 1 in def RET : AForm_DAG<0x03, 0x0b, (ops), - "br.ret.sptk.many rp;;", + "br.ret.sptk.many rp", [(retflag)]>; // return def : Pat<(ret), (RET)>; + +// the evil stop bit of despair +def STOP : PseudoInstIA64<(ops variable_ops), ";;">; + Index: llvm/lib/Target/IA64/IA64RegisterInfo.cpp diff -u llvm/lib/Target/IA64/IA64RegisterInfo.cpp:1.11 llvm/lib/Target/IA64/IA64RegisterInfo.cpp:1.12 --- llvm/lib/Target/IA64/IA64RegisterInfo.cpp:1.11 Mon Jan 23 00:08:46 2006 +++ llvm/lib/Target/IA64/IA64RegisterInfo.cpp Tue Jan 24 20:23:38 2006 @@ -84,7 +84,7 @@ if(RC == IA64::PRRegisterClass ) // if a bool, we use pseudocode // (SrcReg) DestReg = cmp.eq.unc(r0, r0) - BuildMI(MBB, MI, IA64::PCMPEQUNC, 1, DestReg).addReg(IA64::r0).addReg(IA64::r0).addReg(SrcReg); + BuildMI(MBB, MI, IA64::PCMPEQUNC, 3, DestReg).addReg(IA64::r0).addReg(IA64::r0).addReg(SrcReg); else // otherwise, MOV works (for both gen. regs and FP regs) BuildMI(MBB, MI, IA64::MOV, 1, DestReg).addReg(SrcReg); } @@ -168,6 +168,8 @@ if ( Offset <= 8191 && Offset >= -8192) { // smallish offset //fix up the old: MI.SetMachineOperandReg(i, IA64::r22); + MachineOperand &MO = MI.getOperand(i); + MO.setUse(); // mark r22 as being used (the bundler wants to know this) //insert the new MachineInstr* nMI=BuildMI(IA64::ADDIMM22, 2, IA64::r22) .addReg(BaseRegister).addSImm(Offset); @@ -175,6 +177,8 @@ } else { // it's big //fix up the old: MI.SetMachineOperandReg(i, IA64::r22); + MachineOperand &MO = MI.getOperand(i); + MO.setUse(); // mark r22 as being used (the bundler wants to know this) MachineInstr* nMI; nMI=BuildMI(IA64::MOVLIMM64, 1, IA64::r22).addSImm(Offset); MBB.insert(II, nMI); Index: llvm/lib/Target/IA64/IA64TargetMachine.cpp diff -u llvm/lib/Target/IA64/IA64TargetMachine.cpp:1.10 llvm/lib/Target/IA64/IA64TargetMachine.cpp:1.11 --- llvm/lib/Target/IA64/IA64TargetMachine.cpp:1.10 Sun Jan 22 17:37:17 2006 +++ llvm/lib/Target/IA64/IA64TargetMachine.cpp Tue Jan 24 20:23:38 2006 @@ -106,7 +106,7 @@ // Add an instruction selector // FIXME: reap this option one day: if(EnableDAGIsel) PM.add(createIA64DAGToDAGInstructionSelector(*this)); - + /* XXX not yet. ;) // Run optional SSA-based machine code optimizations next... if (!NoSSAPeephole) @@ -132,6 +132,9 @@ /* XXX no, not just yet */ // PM.add(createIA64PeepholeOptimizerPass()); + // Make sure everything is bundled happily + PM.add(createIA64BundlingPass(*this)); + if (PrintMachineCode) // Print the register-allocated code PM.add(createIA64CodePrinterPass(std::cerr, *this)); From jeffc at jolt-lang.org Tue Jan 24 20:40:22 2006 From: jeffc at jolt-lang.org (Jeff Cohen) Date: Tue, 24 Jan 2006 20:40:22 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/DwarfWriter.cpp Message-ID: <200601250240.UAA09689@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen: DwarfWriter.cpp updated: 1.15 -> 1.16 --- Log message: Portably cast a pointer to an integer. --- Diffs of the changes: (+1 -1) DwarfWriter.cpp | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/CodeGen/DwarfWriter.cpp diff -u llvm/lib/CodeGen/DwarfWriter.cpp:1.15 llvm/lib/CodeGen/DwarfWriter.cpp:1.16 --- llvm/lib/CodeGen/DwarfWriter.cpp:1.15 Tue Jan 24 15:26:43 2006 +++ llvm/lib/CodeGen/DwarfWriter.cpp Tue Jan 24 20:40:10 2006 @@ -645,7 +645,7 @@ #ifndef NDEBUG void DIEAbbrev::print(std::ostream &O) { O << "Abbreviation @" - << std::hex << (unsigned long)this << std::dec + << std::hex << (size_t)this << std::dec << " " << TagString(Tag) << " " From jeffc at jolt-lang.org Tue Jan 24 20:40:23 2006 From: jeffc at jolt-lang.org (Jeff Cohen) Date: Tue, 24 Jan 2006 20:40:23 -0600 Subject: [llvm-commits] CVS: llvm/lib/Bytecode/Reader/Reader.cpp Message-ID: <200601250240.UAA09693@zion.cs.uiuc.edu> Changes in directory llvm/lib/Bytecode/Reader: Reader.cpp updated: 1.184 -> 1.185 --- Log message: Portably cast a pointer to an integer. --- Diffs of the changes: (+1 -1) Reader.cpp | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/Bytecode/Reader/Reader.cpp diff -u llvm/lib/Bytecode/Reader/Reader.cpp:1.184 llvm/lib/Bytecode/Reader/Reader.cpp:1.185 --- llvm/lib/Bytecode/Reader/Reader.cpp:1.184 Mon Jan 23 22:14:29 2006 +++ llvm/lib/Bytecode/Reader/Reader.cpp Tue Jan 24 20:40:10 2006 @@ -79,7 +79,7 @@ inline void BytecodeReader::align32() { if (hasAlignment) { BufPtr Save = At; - At = (const unsigned char *)((unsigned long)(At+3) & (~3UL)); + At = (const unsigned char *)((size_t)(At+3) & (~3UL)); if (At > Save) if (Handler) Handler->handleAlignment(At - Save); if (At > BlockEnd) From lattner at cs.uiuc.edu Wed Jan 25 02:01:28 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Wed, 25 Jan 2006 02:01:28 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86ISelPattern.cpp Message-ID: <200601250801.CAA17608@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: X86ISelPattern.cpp updated: 1.200 -> 1.201 --- Log message: Loosen up these checks to allow direct uses of ESP --- Diffs of the changes: (+12 -4) X86ISelPattern.cpp | 16 ++++++++++++---- 1 files changed, 12 insertions(+), 4 deletions(-) Index: llvm/lib/Target/X86/X86ISelPattern.cpp diff -u llvm/lib/Target/X86/X86ISelPattern.cpp:1.200 llvm/lib/Target/X86/X86ISelPattern.cpp:1.201 --- llvm/lib/Target/X86/X86ISelPattern.cpp:1.200 Sun Jan 22 17:37:17 2006 +++ llvm/lib/Target/X86/X86ISelPattern.cpp Wed Jan 25 02:00:36 2006 @@ -2903,13 +2903,21 @@ if (OrigDest.getOpcode() == ISD::CopyFromReg) { OrigOffset = 0; assert(cast(OrigDest.getOperand(1))->getReg() == X86::ESP); - } else { + } else if (OrigDest.getOpcode() == ISD::ADD && + isa(OrigDest.getOperand(1)) && + OrigDest.getOperand(0).getOpcode() == ISD::CopyFromReg && + cast(OrigDest.getOperand(0).getOperand(1))->getReg() + == X86::ESP) { + // We expect only (ESP+C) + OrigOffset = cast(OrigDest.getOperand(1))->getValue(); + } else if (OrigDest.getOpcode() == ISD::Register) { // We expect only (ESP+C) + OrigOffset = 0; + } else { assert(OrigDest.getOpcode() == ISD::ADD && isa(OrigDest.getOperand(1)) && - OrigDest.getOperand(0).getOpcode() == ISD::CopyFromReg && - cast(OrigDest.getOperand(0).getOperand(1))->getReg() - == X86::ESP); + OrigDest.getOperand(0).getOpcode() == ISD::Register && + cast(OrigDest.getOperand(0))->getReg() == X86::ESP); OrigOffset = cast(OrigDest.getOperand(1))->getValue(); } From evan.cheng at apple.com Wed Jan 25 03:05:34 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 25 Jan 2006 03:05:34 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp Message-ID: <200601250905.DAA27719@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: X86ISelLowering.cpp updated: 1.54 -> 1.55 --- Log message: Fix a selectcc lowering bug. Make a copy of X86ISD::CMP when folding it. --- Diffs of the changes: (+10 -2) X86ISelLowering.cpp | 12 ++++++++++-- 1 files changed, 10 insertions(+), 2 deletions(-) Index: llvm/lib/Target/X86/X86ISelLowering.cpp diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.54 llvm/lib/Target/X86/X86ISelLowering.cpp:1.55 --- llvm/lib/Target/X86/X86ISelLowering.cpp:1.54 Tue Jan 24 00:14:44 2006 +++ llvm/lib/Target/X86/X86ISelLowering.cpp Wed Jan 25 03:05:09 2006 @@ -1696,9 +1696,14 @@ // If the X86ISD::SETCC has more than one use, then it's probably better // to use a test instead of duplicating the X86ISD::CMP (for register // pressure reason). + // FIXME: Check number of live Op0 uses since we are in the middle of + // legalization process. if (Op0.hasOneUse() && Op0.getOperand(1).getOpcode() == X86ISD::CMP) { CC = Op0.getOperand(0); Cond = Op0.getOperand(1); + // Make a copy as flag result cannot be used by more than one. + Cond = DAG.getNode(X86ISD::CMP, MVT::Flag, + Cond.getOperand(0), Cond.getOperand(1)); addTest = isFPStack && !hasFPCMov(cast(CC)->getSignExtended()); } else @@ -1742,11 +1747,14 @@ // If the X86ISD::SETCC has more than one use, then it's probably better // to use a test instead of duplicating the X86ISD::CMP (for register // pressure reason). + // FIXME: Check number of live Cond uses since we are in the middle of + // legalization process. if (Cond.hasOneUse() && Cond.getOperand(1).getOpcode() == X86ISD::CMP) { CC = Cond.getOperand(0); + Cond = Cond.getOperand(1); + // Make a copy as flag result cannot be used by more than one. Cond = DAG.getNode(X86ISD::CMP, MVT::Flag, - Cond.getOperand(1).getOperand(0), - Cond.getOperand(1).getOperand(1)); + Cond.getOperand(0), Cond.getOperand(1)); } else addTest = true; } else if (Cond.getOpcode() == ISD::SETCC) { From evan.cheng at apple.com Wed Jan 25 03:08:03 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 25 Jan 2006 03:08:03 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/ScheduleDAG.h Message-ID: <200601250908.DAA14908@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/CodeGen: ScheduleDAG.h updated: 1.4 -> 1.5 --- Log message: Some minor scheduler changes. --- Diffs of the changes: (+9 -4) ScheduleDAG.h | 13 +++++++++---- 1 files changed, 9 insertions(+), 4 deletions(-) Index: llvm/include/llvm/CodeGen/ScheduleDAG.h diff -u llvm/include/llvm/CodeGen/ScheduleDAG.h:1.4 llvm/include/llvm/CodeGen/ScheduleDAG.h:1.5 --- llvm/include/llvm/CodeGen/ScheduleDAG.h:1.4 Mon Jan 23 02:26:10 2006 +++ llvm/include/llvm/CodeGen/ScheduleDAG.h Wed Jan 25 03:07:50 2006 @@ -37,6 +37,7 @@ // Scheduling heuristics enum SchedHeuristics { + defaultScheduling, // Let the target specify its preference. noScheduling, // No scheduling, emit breath first sequence. simpleScheduling, // Two pass, min. critical path, max. utilization. simpleNoItinScheduling, // Same as above exact using generic latency. @@ -51,6 +52,8 @@ class NodeGroup { private: NIVector Members; // Group member nodes + NodeInfo *Top; + NodeInfo *Bottom; NodeInfo *Dominator; // Node with highest latency unsigned Latency; // Total latency of the group int Pending; // Number of visits pending before @@ -58,10 +61,12 @@ public: // Ctor. - NodeGroup() : Dominator(NULL), Pending(0) {} + NodeGroup() : Top(NULL), Bottom(NULL), Dominator(NULL), Pending(0) {} // Accessors inline void setDominator(NodeInfo *D) { Dominator = D; } + inline NodeInfo *getTop() { return Top; } + inline NodeInfo *getBottom() { return Bottom; } inline NodeInfo *getDominator() { return Dominator; } inline void setLatency(unsigned L) { Latency = L; } inline unsigned getLatency() { return Latency; } @@ -94,7 +99,7 @@ class NodeInfo { private: int Pending; // Number of visits pending before - // adding to order + // adding to order public: SDNode *Node; // DAG node InstrStage *StageBegin; // First stage in itinerary @@ -279,7 +284,7 @@ /// isPassiveNode - Return true if the node is a non-scheduled leaf. /// - bool isPassiveNode(SDNode *Node) { + static bool isPassiveNode(SDNode *Node) { if (isa(Node)) return true; if (isa(Node)) return true; if (isa(Node)) return true; @@ -316,7 +321,7 @@ void dump(const char *tag) const; - void dump() const; + virtual void dump() const; private: /// PrepareNodeInfo - Set up the basic minimum node info for scheduling. From evan.cheng at apple.com Wed Jan 25 03:09:15 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 25 Jan 2006 03:09:15 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/Target/TargetLowering.h Message-ID: <200601250909.DAA15489@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/Target: TargetLowering.h updated: 1.34 -> 1.35 --- Log message: Add a enum to specify target scheduling preference: SchedulingForLatency or SchedulingForRegPressure. Added corresponding methods to set / get the value. --- Diffs of the changes: (+19 -0) TargetLowering.h | 19 +++++++++++++++++++ 1 files changed, 19 insertions(+) Index: llvm/include/llvm/Target/TargetLowering.h diff -u llvm/include/llvm/Target/TargetLowering.h:1.34 llvm/include/llvm/Target/TargetLowering.h:1.35 --- llvm/include/llvm/Target/TargetLowering.h:1.34 Fri Jan 13 11:47:52 2006 +++ llvm/include/llvm/Target/TargetLowering.h Wed Jan 25 03:09:02 2006 @@ -70,6 +70,11 @@ ZeroOrNegativeOneSetCCResult, // SetCC returns a sign extended result. }; + enum SchedPreference { + SchedulingForLatency, // Scheduling for shortest total latency. + SchedulingForRegPressure, // Scheduling for lowest register pressure. + }; + TargetLowering(TargetMachine &TM); virtual ~TargetLowering(); @@ -102,6 +107,11 @@ /// result register. SetCCResultValue getSetCCResultContents() const { return SetCCResultContents;} + /// getSchedulingPreference - Return target scheduling preference. + SchedPreference getSchedulingPreference() const { + return SchedPreferenceInfo; + } + /// getRegClassFor - Return the register class that should be used for the /// specified value type. This may only be called on legal types. TargetRegisterClass *getRegClassFor(MVT::ValueType VT) const { @@ -261,6 +271,11 @@ /// setcc operation in a register. void setSetCCResultContents(SetCCResultValue Ty) { SetCCResultContents = Ty; } + /// setSchedulingPreference - Specify the target scheduling preference. + void setSchedulingPreference(SchedPreference Pref) { + SchedPreferenceInfo = Pref; + } + /// setShiftAmountFlavor - Describe how the target handles out of range shift /// amounts. void setShiftAmountFlavor(OutOfRangeShiftAmount OORSA) { @@ -453,6 +468,10 @@ /// SetCCResultContents - Information about the contents of the high-bits in /// the result of a setcc comparison operation. SetCCResultValue SetCCResultContents; + + /// SchedPreferenceInfo - The target scheduling preference: shortest possible + /// total cycles or lowest register usage. + SchedPreference SchedPreferenceInfo; /// UseUnderscoreSetJmpLongJmp - This target prefers to use _setjmp and /// _longjmp to implement llvm.setjmp/llvm.longjmp. Defaults to false. From evan.cheng at apple.com Wed Jan 25 03:13:10 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 25 Jan 2006 03:13:10 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Message-ID: <200601250913.DAA18344@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/SelectionDAG: SelectionDAGISel.cpp updated: 1.135 -> 1.136 --- Log message: If scheduler choice is the default (-sched=default), use target scheduling preference to determine which scheduler to use. SchedulingForLatency == Breadth first; SchedulingForRegPressure == bottom up register reduction list scheduler. --- Diffs of the changes: (+10 -2) SelectionDAGISel.cpp | 12 ++++++++++-- 1 files changed, 10 insertions(+), 2 deletions(-) Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.135 llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.136 --- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.135 Mon Jan 23 07:34:04 2006 +++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Wed Jan 25 03:12:57 2006 @@ -59,8 +59,10 @@ ISHeuristic( "sched", cl::desc("Choose scheduling style"), - cl::init(noScheduling), + cl::init(defaultScheduling), cl::values( + clEnumValN(defaultScheduling, "default", + "Target preferred scheduling style"), clEnumValN(noScheduling, "none", "No scheduling: breadth first sequencing"), clEnumValN(simpleScheduling, "simple", @@ -69,7 +71,7 @@ clEnumValN(simpleNoItinScheduling, "simple-noitin", "Simple two pass scheduling: Same as simple " "except using generic latency"), - clEnumValN(listSchedulingBURR, "list-BURR", + clEnumValN(listSchedulingBURR, "list-burr", "Bottom up register reduction list scheduling"), clEnumValEnd)); } // namespace @@ -1772,6 +1774,12 @@ switch (ISHeuristic) { default: assert(0 && "Unrecognized scheduling heuristic"); + case defaultScheduling: + if (TLI.getSchedulingPreference() == TargetLowering::SchedulingForLatency) + SL = createSimpleDAGScheduler(noScheduling, DAG, BB); + else /* TargetLowering::SchedulingForRegPressure */ + SL = createBURRListDAGScheduler(DAG, BB); + break; case noScheduling: case simpleScheduling: case simpleNoItinScheduling: From evan.cheng at apple.com Wed Jan 25 03:13:53 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 25 Jan 2006 03:13:53 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp Message-ID: <200601250913.DAA19655@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/SelectionDAG: ScheduleDAG.cpp updated: 1.57 -> 1.58 --- Log message: Keep track of bottom / top element of a set of flagged nodes. --- Diffs of the changes: (+6 -1) ScheduleDAG.cpp | 7 ++++++- 1 files changed, 6 insertions(+), 1 deletion(-) Index: llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp diff -u llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.57 llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.58 --- llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.57 Mon Jan 23 01:01:07 2006 +++ llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp Wed Jan 25 03:13:41 2006 @@ -86,7 +86,7 @@ if (Op.getValueType() != MVT::Flag) break; // Add to node group NodeGroup::Add(getNI(Op.Val), NI); - // Let evryone else know + // Let everyone else know HasGroups = true; } } @@ -464,6 +464,7 @@ // Merge the two lists DGroup->group_insert(DGroup->group_end(), UGroup->group_begin(), UGroup->group_end()); + DGroup->Bottom = UGroup->Bottom; } else if (DGroup) { // Make user member of definers group U->Group = DGroup; @@ -476,6 +477,7 @@ DGroup->addPending(-CountInternalUses(DNI, U)); } DGroup->group_push_back(U); + DGroup->Bottom = U; } else if (UGroup) { // Make definer member of users group D->Group = UGroup; @@ -488,11 +490,14 @@ UGroup->addPending(-CountInternalUses(D, UNI)); } UGroup->group_insert(UGroup->group_begin(), D); + UGroup->Top = D; } else { D->Group = U->Group = DGroup = new NodeGroup(); DGroup->addPending(D->Node->use_size() + U->Node->use_size() - CountInternalUses(D, U)); DGroup->group_push_back(D); DGroup->group_push_back(U); + DGroup->Top = D; + DGroup->Bottom = U; } } From evan.cheng at apple.com Wed Jan 25 03:14:44 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 25 Jan 2006 03:14:44 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp Message-ID: <200601250914.DAA22446@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/SelectionDAG: ScheduleDAGList.cpp updated: 1.1 -> 1.2 --- Log message: Bottom up register usage reducing list scheduler. --- Diffs of the changes: (+451 -21) ScheduleDAGList.cpp | 472 +++++++++++++++++++++++++++++++++++++++++++++++++--- 1 files changed, 451 insertions(+), 21 deletions(-) Index: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp diff -u llvm/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp:1.1 llvm/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp:1.2 --- llvm/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp:1.1 Mon Jan 23 02:26:10 2006 +++ llvm/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp Wed Jan 25 03:14:32 2006 @@ -1,4 +1,4 @@ -//===-- ScheduleDAGSimple.cpp - Implement a list scheduler for isel DAG ---===// +//===---- ScheduleDAGList.cpp - Implement a list scheduler for isel DAG ---===// // // The LLVM Compiler Infrastructure // @@ -18,44 +18,474 @@ #include "llvm/CodeGen/SelectionDAG.h" #include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetInstrInfo.h" -#include +#include "llvm/Support/Debug.h" +#include +#include +#include #include using namespace llvm; +namespace { -namespace llvm { -/// Sorting functions for ready queue. -struct LSSortPred : public std::binary_function { - bool operator()(const SDOperand* left, const SDOperand* right) const { - return true; +/// SUnit - Scheduling unit. It's an wrapper around either a single SDNode or a +/// group of nodes flagged together. +struct SUnit { + SDNode *Node; // Representative node. + std::vector FlaggedNodes; // All nodes flagged to Node. + std::vector Preds; // All real predecessors. + std::vector ChainPreds; // All chain predecessors. + std::vector Succs; // All real successors. + std::vector ChainSuccs; // All chain successors. + int NumPredsLeft; // # of preds not scheduled. + int NumSuccsLeft; // # of succs not scheduled. + int Priority1; // Scheduling priority 1. + int Priority2; // Scheduling priority 2. + unsigned Latency; // Node latency. + unsigned CycleBound; // Upper/lower cycle to be scheduled at. + unsigned Slot; // Cycle node is scheduled at. + + SUnit(SDNode *node) + : Node(node), NumPredsLeft(0), NumSuccsLeft(0), + Priority1(INT_MIN), Priority2(INT_MIN), Latency(0), + CycleBound(0), Slot(0) {} + + void dump(const SelectionDAG *G, bool All=true) const; +}; + +void SUnit::dump(const SelectionDAG *G, bool All) const { + std::cerr << "SU: "; + Node->dump(G); + std::cerr << "\n"; + if (All) { + std::cerr << "# preds left : " << NumPredsLeft << "\n"; + std::cerr << "# succs left : " << NumSuccsLeft << "\n"; + std::cerr << "Latency : " << Latency << "\n"; + std::cerr << "Priority : " << Priority1 << " , " << Priority2 << "\n"; + } + + if (FlaggedNodes.size() != 0) { + if (All) + std::cerr << "Flagged nodes :\n"; + for (unsigned i = 0, e = FlaggedNodes.size(); i != e; i++) { + std::cerr << " "; + FlaggedNodes[i]->dump(G); + std::cerr << "\n"; + } + } + + if (All) { + if (Preds.size() != 0) { + std::cerr << "Predecessors :\n"; + for (unsigned i = 0, e = Preds.size(); i != e; i++) { + std::cerr << " "; + Preds[i]->dump(G); + std::cerr << "\n"; + } + } + if (ChainPreds.size() != 0) { + std::cerr << "Chained Preds :\n"; + for (unsigned i = 0, e = ChainPreds.size(); i != e; i++) { + std::cerr << " "; + ChainPreds[i]->dump(G); + std::cerr << "\n"; + } + } + if (Succs.size() != 0) { + std::cerr << "Successors :\n"; + for (unsigned i = 0, e = Succs.size(); i != e; i++) { + std::cerr << " "; + Succs[i]->dump(G); + std::cerr << "\n"; + } + } + if (ChainSuccs.size() != 0) { + std::cerr << "Chained succs :\n"; + for (unsigned i = 0, e = ChainSuccs.size(); i != e; i++) { + std::cerr << " "; + ChainSuccs[i]->dump(G); + std::cerr << "\n"; + } + } + } +} + +/// Sorting functions for the Available queue. +struct ls_rr_sort : public std::binary_function { + bool operator()(const SUnit* left, const SUnit* right) const { + if (left->Priority1 > right->Priority1) { + return true; + } else if (left->Priority1 == right->Priority1) { + unsigned lf = left->FlaggedNodes.size(); + unsigned rf = right->FlaggedNodes.size(); + if (lf > rf) + return true; + else if (lf == rf) { + if (left->Priority2 > right->Priority2) + return true; + else if (left->Priority2 == right->Priority2) { + if (left->CycleBound > right->CycleBound) + return true; + else + return left->Node->getNodeDepth() < right->Node->getNodeDepth(); + } + } + } + + return false; } }; /// ScheduleDAGList - List scheduler. - class ScheduleDAGList : public ScheduleDAG { private: - LSSortPred &Cmp; + // SDNode to SUnit mapping (many to one). + std::map SUnitMap; + // Available queue. + std::priority_queue, ls_rr_sort> Available; + // The schedule. + std::vector Sequence; + // Current scheduling cycle. + unsigned CurrCycle; - // Ready queue - std::priority_queue, LSSortPred> Ready; - public: ScheduleDAGList(SelectionDAG &dag, MachineBasicBlock *bb, - const TargetMachine &tm, LSSortPred cmp) - : ScheduleDAG(listSchedulingBURR, dag, bb, tm), Cmp(cmp), Ready(Cmp) - {}; + const TargetMachine &tm) + : ScheduleDAG(listSchedulingBURR, dag, bb, tm), CurrCycle(0) {}; + + ~ScheduleDAGList() { + for (std::map::iterator I = SUnitMap.begin(), + E = SUnitMap.end(); I != E; ++I) { + SUnit *SU = I->second; + // Multiple SDNode* can point to one SUnit. Do ref counting, sort of. + if (SU->FlaggedNodes.size() == 0) + delete SU; + else + SU->FlaggedNodes.pop_back(); + } + } void Schedule(); + + void dump() const; + +private: + void ReleasePred(SUnit *PredSU); + void ScheduleNode(SUnit *SU); + int CalcNodePriority(SUnit *SU); + void CalculatePriorities(); + void ListSchedule(); + void BuildSchedUnits(); + void EmitSchedule(); }; -} // end namespace llvm +} // end namespace + +void ScheduleDAGList::ReleasePred(SUnit *PredSU) { + SDNode *PredNode = PredSU->Node; + + PredSU->NumSuccsLeft--; + if (PredSU->NumSuccsLeft == 0) { + // EntryToken has to go last! + if (PredNode->getOpcode() != ISD::EntryToken) + Available.push(PredSU); + } else if (PredSU->NumSuccsLeft < 0) { +#ifndef NDEBUG + std::cerr << "*** List scheduling failed! ***\n"; + PredSU->dump(&DAG); + std::cerr << " has been released too many times!\n"; + assert(0); +#endif + } + + // FIXME: the distance between two nodes is not always == the predecessor's + // latency. For example, the reader can very well read the register written + // by the predecessor later than the issue cycle. It also depends on the + // interrupt model (drain vs. freeze). + PredSU->CycleBound = std::max(PredSU->CycleBound, CurrCycle + PredSU->Latency); +} + +/// ScheduleNode - Add the node to the schedule. Decrement the pending count of +/// its predecessors. If a predecessor pending count is zero, add it to the +/// Available queue. +void ScheduleDAGList::ScheduleNode(SUnit *SU) { + Sequence.push_back(SU); + SU->Slot = CurrCycle; + + // Bottom up: release predecessors + for (unsigned i = 0, e = SU->Preds.size(); i != e; i++) + ReleasePred(SUnitMap[SU->Preds[i]]); + for (unsigned i = 0, e = SU->ChainPreds.size(); i != e; i++) + ReleasePred(SUnitMap[SU->ChainPreds[i]]); + + CurrCycle++; +} + +/// isReady - True if node's lower cycle bound is less or equal to the current +/// scheduling cycle. Always true if all nodes have uniform latency 1. +static inline bool isReady(SUnit *SU, unsigned CurrCycle) { + return SU->CycleBound <= CurrCycle; +} + +/// ListSchedule - The main loop of list scheduling. +void ScheduleDAGList::ListSchedule() { + // Add root to Available queue + SUnit *Root = SUnitMap[DAG.getRoot().Val]; + Available.push(Root); + + // While Available queue is not empty, grab the node with the highest + // priority. If it is not ready put it back. Schedule the node. + std::vector NotReady; + while (!Available.empty()) { + SUnit *CurrNode = Available.top(); + Available.pop(); + + NotReady.clear(); + while (!isReady(CurrNode, CurrCycle)) { + NotReady.push_back(CurrNode); + CurrNode = Available.top(); + Available.pop(); + } + for (unsigned i = 0, e = NotReady.size(); i != e; ++i) + Available.push(NotReady[i]); + + DEBUG(std::cerr << "\n*** Scheduling: "); + DEBUG(CurrNode->dump(&DAG, false)); + DEBUG(std::cerr << "\n"); + ScheduleNode(CurrNode); + } + + // Add entry node last + if (DAG.getEntryNode().Val != DAG.getRoot().Val) { + SUnit *Entry = SUnitMap[DAG.getEntryNode().Val]; + Entry->Slot = CurrCycle; + Sequence.push_back(Entry); + } + +#ifndef NDEBUG + for (std::map::iterator I = SUnitMap.begin(), + E = SUnitMap.end(); I != E; ++I) { + SUnit *SU = I->second; + if (SU->NumSuccsLeft != 0) { + std::cerr << "*** List scheduling failed! ***\n"; + SU->dump(&DAG); + std::cerr << " has not been scheduled!\n"; + assert(0); + } +#endif + } + + + // Reverse the order if it is bottom up. + std::reverse(Sequence.begin(), Sequence.end()); + DEBUG(std::cerr << "*** Final schedule ***\n"); + DEBUG(dump()); +} + +/// CalcNodePriority - Priority 1 is just the number of live range genned - number +/// of live range killed. Priority 2 is the Sethi Ullman number. It returns +/// priority 2 since it is calculated recursively. +/// Smaller number is the higher priority in both cases. +int ScheduleDAGList::CalcNodePriority(SUnit *SU) { + if (SU->Priority2 != INT_MIN) + return SU->Priority2; + + SU->Priority1 = SU->Preds.size() - SU->Succs.size(); + + if (SU->Preds.size() == 0) { + SU->Priority2 = 1; + } else { + int Extra = 0; + for (unsigned i = 0, e = SU->Preds.size(); i != e; i++) { + SDNode *PredN = SU->Preds[i]; + SUnit *PredSU = SUnitMap[PredN]; + int PredPriority = CalcNodePriority(PredSU); + if (PredPriority > SU->Priority2) { + SU->Priority2 = PredPriority; + Extra = 0; + } else if (PredPriority == SU->Priority2) + Extra++; + } + + if (SU->Node->getOpcode() != ISD::TokenFactor) + SU->Priority2 += Extra; + else + SU->Priority2 = (Extra == 1) ? 0 : Extra-1; + } + + return SU->Priority2; +} + +/// CalculatePriorities - Calculate priorities of all scheduling units. +void ScheduleDAGList::CalculatePriorities() { + for (std::map::iterator I = SUnitMap.begin(), + E = SUnitMap.end(); I != E; ++I) { + SUnit *SU = I->second; + // FIXME: assumes uniform latency for now. + SU->Latency = 1; + (void)CalcNodePriority(SU); + DEBUG(I->second->dump(&DAG)); + DEBUG(std::cerr << "\n"); + } +} + +static bool isChainUse(SDNode *N, SDNode *UseN) { + for (unsigned i = 0, e = UseN->getNumOperands(); i != e; i++) { + SDOperand Op = UseN->getOperand(i); + if (Op.Val == N) { + MVT::ValueType VT = N->getValueType(Op.ResNo); + if (VT == MVT::Other) + return true; + } + } + return false; +} + +void ScheduleDAGList::BuildSchedUnits() { + for (unsigned i = 0, N = NodeCount; i < N; i++) { + NodeInfo *NI = &Info[i]; + SDNode *N = NI->Node; + if (!isPassiveNode(N)) { + SUnit *SU; + if (NI->isInGroup()) { + if (NI != NI->Group->getBottom()) // Bottom up, so only look at bottom + continue; // node of the NodeGroup + + SU = new SUnit(N); + + // Find the flagged nodes. + SDOperand FlagOp = N->getOperand(N->getNumOperands() - 1); + SDNode *Flag = FlagOp.Val; + unsigned ResNo = FlagOp.ResNo; + while (Flag->getValueType(ResNo) == MVT::Flag) { + NodeInfo *FNI = getNI(Flag); + assert(FNI->Group == NI->Group); + SU->FlaggedNodes.insert(SU->FlaggedNodes.begin(), Flag); + SUnitMap[Flag] = SU; + + FlagOp = Flag->getOperand(Flag->getNumOperands() - 1); + Flag = FlagOp.Val; + ResNo = FlagOp.ResNo; + } + + // Find all predecessors (of the group). + NodeGroupOpIterator NGOI(NI); + while (!NGOI.isEnd()) { + SDOperand Op = NGOI.next(); + SDNode *OpN = Op.Val; + MVT::ValueType VT = OpN->getValueType(Op.ResNo); + NodeInfo *OpNI = getNI(OpN); + if (OpNI->Group != NI->Group && !isPassiveNode(OpN)) { + assert(VT != MVT::Flag); + if (VT == MVT::Other) + SU->ChainPreds.push_back(OpN); + else + SU->Preds.push_back(OpN); + SU->NumPredsLeft++; + } + } + + // Find all successors (of the group). + NodeGroupIterator NGI(NI); + while (NodeInfo *GNI = NGI.next()) { + SDNode *GN = GNI->Node; + for (SDNode::use_iterator ui = GN->use_begin(), e = GN->use_end(); + ui != e; ++ui) { + SDNode *UseN = *ui; + NodeInfo *UseNI = getNI(UseN); + if (UseNI->Group != NI->Group) { + if (isChainUse(GN, UseN)) + SU->ChainSuccs.push_back(UseN); + else + SU->Succs.push_back(UseN); + SU->NumSuccsLeft++; + } + } + } + } else { + SU = new SUnit(N); + + // Find node predecessors. + for (unsigned j = 0, e = N->getNumOperands(); j != e; j++) { + SDOperand Op = N->getOperand(j); + SDNode *OpN = Op.Val; + MVT::ValueType VT = OpN->getValueType(Op.ResNo); + if (!isPassiveNode(OpN)) { + assert(VT != MVT::Flag); + if (VT == MVT::Other) + SU->ChainPreds.push_back(OpN); + else + SU->Preds.push_back(OpN); + SU->NumPredsLeft++; + } + } + + // Find node successors. + for (SDNode::use_iterator ui = N->use_begin(), e = N->use_end(); + ui != e; ++ui) { + SDNode *UseN = *ui; + if (isChainUse(N, UseN)) + SU->ChainSuccs.push_back(UseN); + else + SU->Succs.push_back(UseN); + SU->NumSuccsLeft++; + } + } + + SUnitMap[N] = SU; + } + } + +#ifndef NDEBUG + for (std::map::iterator I = SUnitMap.begin(), + E = SUnitMap.end(); I != E; ++I) { + SUnit *SU = I->second; + DEBUG(I->second->dump(&DAG)); + DEBUG(std::cerr << "\n"); + } +#endif +} + +/// EmitSchedule - Emit the machine code in scheduled order. +void ScheduleDAGList::EmitSchedule() { + for (unsigned i = 0, e = Sequence.size(); i != e; i++) { + SDNode *N; + SUnit *SU = Sequence[i]; + for (unsigned j = 0, ee = SU->FlaggedNodes.size(); j != ee; j++) { + N = SU->FlaggedNodes[j]; + EmitNode(getNI(N)); + } + EmitNode(getNI(SU->Node)); + } +} + +/// dump - dump the schedule. +void ScheduleDAGList::dump() const { + for (unsigned i = 0, e = Sequence.size(); i != e; i++) { + SUnit *SU = Sequence[i]; + SU->dump(&DAG, false); + } +} + +/// Schedule - Schedule the DAG using list scheduling. +/// FIXME: Right now it only supports the burr (bottom up register reducing) +/// heuristic. void ScheduleDAGList::Schedule() { + DEBUG(std::cerr << "********** List Scheduling **********\n"); + + // Build scheduling units. + BuildSchedUnits(); + + // Calculate node prirorities. + CalculatePriorities(); + + // Execute the actual scheduling loop. + ListSchedule(); + + // Emit in scheduled order + EmitSchedule(); } - -llvm::ScheduleDAG* -llvm::createBURRListDAGScheduler(SelectionDAG &DAG, - MachineBasicBlock *BB) { - return new ScheduleDAGList(DAG, BB, DAG.getTarget(), LSSortPred()); +llvm::ScheduleDAG* llvm::createBURRListDAGScheduler(SelectionDAG &DAG, + MachineBasicBlock *BB) { + return new ScheduleDAGList(DAG, BB, DAG.getTarget()); } From evan.cheng at apple.com Wed Jan 25 03:15:30 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 25 Jan 2006 03:15:30 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp Message-ID: <200601250915.DAA25083@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: X86ISelLowering.cpp updated: 1.55 -> 1.56 --- Log message: X86 prefer scheduling for reduced register pressure. --- Diffs of the changes: (+1 -0) X86ISelLowering.cpp | 1 + 1 files changed, 1 insertion(+) Index: llvm/lib/Target/X86/X86ISelLowering.cpp diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.55 llvm/lib/Target/X86/X86ISelLowering.cpp:1.56 --- llvm/lib/Target/X86/X86ISelLowering.cpp:1.55 Wed Jan 25 03:05:09 2006 +++ llvm/lib/Target/X86/X86ISelLowering.cpp Wed Jan 25 03:15:17 2006 @@ -39,6 +39,7 @@ setShiftAmountType(MVT::i8); setSetCCResultType(MVT::i8); setSetCCResultContents(ZeroOrOneSetCCResult); + setSchedulingPreference(SchedulingForRegPressure); setShiftAmountFlavor(Mask); // shl X, 32 == shl X, 0 setStackPointerRegisterToSaveRestore(X86::ESP); From evan.cheng at apple.com Wed Jan 25 03:16:07 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 25 Jan 2006 03:16:07 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp Message-ID: <200601250916.DAA27623@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/SparcV8: SparcV8ISelDAGToDAG.cpp updated: 1.56 -> 1.57 --- Log message: Default scheduling preference is SchedulingForLatency. --- Diffs of the changes: (+1 -0) SparcV8ISelDAGToDAG.cpp | 1 + 1 files changed, 1 insertion(+) Index: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp diff -u llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.56 llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.57 --- llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.56 Thu Jan 19 01:22:29 2006 +++ llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp Wed Jan 25 03:15:54 2006 @@ -166,6 +166,7 @@ setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand); setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32, Expand); + setSchedulingPreference(SchedulingForLatency); setStackPointerRegisterToSaveRestore(V8::O6); computeRegisterProperties(); From evan.cheng at apple.com Wed Jan 25 03:16:07 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 25 Jan 2006 03:16:07 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/IA64/IA64ISelLowering.cpp Message-ID: <200601250916.DAA27644@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/IA64: IA64ISelLowering.cpp updated: 1.25 -> 1.26 --- Log message: Default scheduling preference is SchedulingForLatency. --- Diffs of the changes: (+1 -0) IA64ISelLowering.cpp | 1 + 1 files changed, 1 insertion(+) Index: llvm/lib/Target/IA64/IA64ISelLowering.cpp diff -u llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.25 llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.26 --- llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.25 Fri Jan 20 14:24:31 2006 +++ llvm/lib/Target/IA64/IA64ISelLowering.cpp Wed Jan 25 03:15:54 2006 @@ -93,6 +93,7 @@ setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand); setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i64, Expand); + setSchedulingPreference(SchedulingForLatency); setStackPointerRegisterToSaveRestore(IA64::r12); computeRegisterProperties(); From evan.cheng at apple.com Wed Jan 25 03:16:07 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 25 Jan 2006 03:16:07 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelLowering.cpp Message-ID: <200601250916.DAA27625@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/PowerPC: PPCISelLowering.cpp updated: 1.68 -> 1.69 --- Log message: Default scheduling preference is SchedulingForLatency. --- Diffs of the changes: (+1 -0) PPCISelLowering.cpp | 1 + 1 files changed, 1 insertion(+) Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.68 llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.69 --- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.68 Wed Jan 18 13:42:35 2006 +++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp Wed Jan 25 03:15:54 2006 @@ -144,6 +144,7 @@ } setSetCCResultContents(ZeroOrOneSetCCResult); + setSchedulingPreference(SchedulingForLatency); setStackPointerRegisterToSaveRestore(PPC::R1); computeRegisterProperties(); From jeffc at jolt-lang.org Wed Jan 25 11:18:11 2006 From: jeffc at jolt-lang.org (Jeff Cohen) Date: Wed, 25 Jan 2006 11:18:11 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp Message-ID: <200601251718.LAA30643@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/SelectionDAG: ScheduleDAGList.cpp updated: 1.2 -> 1.3 --- Log message: Fix VC++ compilation error. --- Diffs of the changes: (+1 -1) ScheduleDAGList.cpp | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp diff -u llvm/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp:1.2 llvm/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp:1.3 --- llvm/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp:1.2 Wed Jan 25 03:14:32 2006 +++ llvm/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp Wed Jan 25 11:17:49 2006 @@ -341,7 +341,7 @@ } void ScheduleDAGList::BuildSchedUnits() { - for (unsigned i = 0, N = NodeCount; i < N; i++) { + for (unsigned i = 0, NC = NodeCount; i < NC; i++) { NodeInfo *NI = &Info[i]; SDNode *N = NI->Node; if (!isPassiveNode(N)) { From jeffc at jolt-lang.org Wed Jan 25 11:19:02 2006 From: jeffc at jolt-lang.org (Jeff Cohen) Date: Wed, 25 Jan 2006 11:19:02 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/DwarfWriter.cpp Message-ID: <200601251719.LAA30668@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen: DwarfWriter.cpp updated: 1.16 -> 1.17 --- Log message: Make it even more portable. --- Diffs of the changes: (+1 -1) DwarfWriter.cpp | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/CodeGen/DwarfWriter.cpp diff -u llvm/lib/CodeGen/DwarfWriter.cpp:1.16 llvm/lib/CodeGen/DwarfWriter.cpp:1.17 --- llvm/lib/CodeGen/DwarfWriter.cpp:1.16 Tue Jan 24 20:40:10 2006 +++ llvm/lib/CodeGen/DwarfWriter.cpp Wed Jan 25 11:18:50 2006 @@ -645,7 +645,7 @@ #ifndef NDEBUG void DIEAbbrev::print(std::ostream &O) { O << "Abbreviation @" - << std::hex << (size_t)this << std::dec + << std::hex << (intptr_t)this << std::dec << " " << TagString(Tag) << " " From jeffc at jolt-lang.org Wed Jan 25 11:19:02 2006 From: jeffc at jolt-lang.org (Jeff Cohen) Date: Wed, 25 Jan 2006 11:19:02 -0600 Subject: [llvm-commits] CVS: llvm/lib/Bytecode/Reader/Reader.cpp Message-ID: <200601251719.LAA30672@zion.cs.uiuc.edu> Changes in directory llvm/lib/Bytecode/Reader: Reader.cpp updated: 1.185 -> 1.186 --- Log message: Make it even more portable. --- Diffs of the changes: (+1 -1) Reader.cpp | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/Bytecode/Reader/Reader.cpp diff -u llvm/lib/Bytecode/Reader/Reader.cpp:1.185 llvm/lib/Bytecode/Reader/Reader.cpp:1.186 --- llvm/lib/Bytecode/Reader/Reader.cpp:1.185 Tue Jan 24 20:40:10 2006 +++ llvm/lib/Bytecode/Reader/Reader.cpp Wed Jan 25 11:18:50 2006 @@ -79,7 +79,7 @@ inline void BytecodeReader::align32() { if (hasAlignment) { BufPtr Save = At; - At = (const unsigned char *)((size_t)(At+3) & (~3UL)); + At = (const unsigned char *)((intptr_t)(At+3) & (~3UL)); if (At > Save) if (Handler) Handler->handleAlignment(At - Save); if (At > BlockEnd) From natebegeman at mac.com Wed Jan 25 12:22:07 2006 From: natebegeman at mac.com (Nate Begeman) Date: Wed, 25 Jan 2006 12:22:07 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaISelLowering.cpp AlphaISelLowering.h Message-ID: <200601251822.MAA31255@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/Alpha: AlphaISelLowering.cpp updated: 1.28 -> 1.29 AlphaISelLowering.h updated: 1.11 -> 1.12 --- Log message: First part of bug 680: http://llvm.cs.uiuc.edu/PR680 : Remove TLI.LowerVA* and replace it with SDNodes that are lowered the same way as everything else. --- Diffs of the changes: (+70 -83) AlphaISelLowering.cpp | 144 ++++++++++++++++++++++++-------------------------- AlphaISelLowering.h | 9 --- 2 files changed, 70 insertions(+), 83 deletions(-) Index: llvm/lib/Target/Alpha/AlphaISelLowering.cpp diff -u llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.28 llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.29 --- llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.28 Mon Jan 23 15:56:07 2006 +++ llvm/lib/Target/Alpha/AlphaISelLowering.cpp Wed Jan 25 12:21:52 2006 @@ -368,79 +368,6 @@ return std::make_pair(RetVal, Chain); } -SDOperand AlphaTargetLowering::LowerVAStart(SDOperand Chain, SDOperand VAListP, - Value *VAListV, SelectionDAG &DAG) { - // vastart stores the address of the VarArgsBase and VarArgsOffset - SDOperand FR = DAG.getFrameIndex(VarArgsBase, MVT::i64); - SDOperand S1 = DAG.getNode(ISD::STORE, MVT::Other, Chain, FR, VAListP, - DAG.getSrcValue(VAListV)); - SDOperand SA2 = DAG.getNode(ISD::ADD, MVT::i64, VAListP, - DAG.getConstant(8, MVT::i64)); - return DAG.getNode(ISD::TRUNCSTORE, MVT::Other, S1, - DAG.getConstant(VarArgsOffset, MVT::i64), SA2, - DAG.getSrcValue(VAListV, 8), DAG.getValueType(MVT::i32)); -} - -std::pair AlphaTargetLowering:: -LowerVAArg(SDOperand Chain, SDOperand VAListP, Value *VAListV, - const Type *ArgTy, SelectionDAG &DAG) { - SDOperand Base = DAG.getLoad(MVT::i64, Chain, VAListP, - DAG.getSrcValue(VAListV)); - SDOperand Tmp = DAG.getNode(ISD::ADD, MVT::i64, VAListP, - DAG.getConstant(8, MVT::i64)); - SDOperand Offset = DAG.getExtLoad(ISD::SEXTLOAD, MVT::i64, Base.getValue(1), - Tmp, DAG.getSrcValue(VAListV, 8), MVT::i32); - SDOperand DataPtr = DAG.getNode(ISD::ADD, MVT::i64, Base, Offset); - if (ArgTy->isFloatingPoint()) - { - //if fp && Offset < 6*8, then subtract 6*8 from DataPtr - SDOperand FPDataPtr = DAG.getNode(ISD::SUB, MVT::i64, DataPtr, - DAG.getConstant(8*6, MVT::i64)); - SDOperand CC = DAG.getSetCC(MVT::i64, Offset, - DAG.getConstant(8*6, MVT::i64), ISD::SETLT); - DataPtr = DAG.getNode(ISD::SELECT, MVT::i64, CC, FPDataPtr, DataPtr); - } - - SDOperand Result; - if (ArgTy == Type::IntTy) - Result = DAG.getExtLoad(ISD::SEXTLOAD, MVT::i64, Offset.getValue(1), - DataPtr, DAG.getSrcValue(NULL), MVT::i32); - else if (ArgTy == Type::UIntTy) - Result = DAG.getExtLoad(ISD::ZEXTLOAD, MVT::i64, Offset.getValue(1), - DataPtr, DAG.getSrcValue(NULL), MVT::i32); - else - Result = DAG.getLoad(getValueType(ArgTy), Offset.getValue(1), DataPtr, - DAG.getSrcValue(NULL)); - - SDOperand NewOffset = DAG.getNode(ISD::ADD, MVT::i64, Offset, - DAG.getConstant(8, MVT::i64)); - SDOperand Update = DAG.getNode(ISD::TRUNCSTORE, MVT::Other, - Result.getValue(1), NewOffset, - Tmp, DAG.getSrcValue(VAListV, 8), - DAG.getValueType(MVT::i32)); - Result = DAG.getNode(ISD::TRUNCATE, getValueType(ArgTy), Result); - - return std::make_pair(Result, Update); -} - -SDOperand AlphaTargetLowering:: -LowerVACopy(SDOperand Chain, SDOperand SrcP, Value *SrcV, SDOperand DestP, - Value *DestV, SelectionDAG &DAG) { - SDOperand Val = DAG.getLoad(getPointerTy(), Chain, SrcP, - DAG.getSrcValue(SrcV)); - SDOperand Result = DAG.getNode(ISD::STORE, MVT::Other, Val.getValue(1), - Val, DestP, DAG.getSrcValue(DestV)); - SDOperand NP = DAG.getNode(ISD::ADD, MVT::i64, SrcP, - DAG.getConstant(8, MVT::i64)); - Val = DAG.getExtLoad(ISD::SEXTLOAD, MVT::i64, Result, NP, - DAG.getSrcValue(SrcV, 8), MVT::i32); - SDOperand NPD = DAG.getNode(ISD::ADD, MVT::i64, DestP, - DAG.getConstant(8, MVT::i64)); - return DAG.getNode(ISD::TRUNCSTORE, MVT::Other, Val.getValue(1), - Val, NPD, DAG.getSrcValue(DestV, 8), - DAG.getValueType(MVT::i32)); -} - void AlphaTargetLowering::restoreGP(MachineBasicBlock* BB) { BuildMI(BB, Alpha::BIS, 2, Alpha::R29).addReg(GP).addReg(GP); @@ -680,8 +607,77 @@ ARGS.push_back(DAG.getConstant(getUID(), MVT::i64)); return DAG.getNode(Opc, VTS, ARGS); } + case ISD::VAARG: { + SDOperand Chain = Op.getOperand(0); + SDOperand VAListP = Op.getOperand(1); + SDOperand VAListS = Op.getOperand(2); + + SDOperand Base = DAG.getLoad(MVT::i64, Chain, VAListP, VAListS); + SDOperand Tmp = DAG.getNode(ISD::ADD, MVT::i64, VAListP, + DAG.getConstant(8, MVT::i64)); + SDOperand Offset = DAG.getExtLoad(ISD::SEXTLOAD, MVT::i64, Base.getValue(1), + Tmp, DAG.getSrcValue(0), MVT::i32); + SDOperand DataPtr = DAG.getNode(ISD::ADD, MVT::i64, Base, Offset); + if (MVT::isFloatingPoint(Op.getValueType())) + { + //if fp && Offset < 6*8, then subtract 6*8 from DataPtr + SDOperand FPDataPtr = DAG.getNode(ISD::SUB, MVT::i64, DataPtr, + DAG.getConstant(8*6, MVT::i64)); + SDOperand CC = DAG.getSetCC(MVT::i64, Offset, + DAG.getConstant(8*6, MVT::i64), ISD::SETLT); + DataPtr = DAG.getNode(ISD::SELECT, MVT::i64, CC, FPDataPtr, DataPtr); + } - + SDOperand NewOffset = DAG.getNode(ISD::ADD, MVT::i64, Offset, + DAG.getConstant(8, MVT::i64)); + SDOperand Update = DAG.getNode(ISD::TRUNCSTORE, MVT::Other, + Offset.getValue(1), NewOffset, + Tmp, DAG.getSrcValue(0), + DAG.getValueType(MVT::i32)); + + SDOperand Result; + if (Op.getValueType() == MVT::i32) + Result = DAG.getExtLoad(ISD::SEXTLOAD, MVT::i64, Update, DataPtr, + DAG.getSrcValue(0), MVT::i32); + else + Result = DAG.getLoad(Op.getValueType(), Update, DataPtr, + DAG.getSrcValue(0)); + return Result; + } + case ISD::VACOPY: { + SDOperand Chain = Op.getOperand(0); + SDOperand DestP = Op.getOperand(1); + SDOperand SrcP = Op.getOperand(2); + SDOperand DestS = Op.getOperand(3); + SDOperand SrcS = Op.getOperand(4); + + SDOperand Val = DAG.getLoad(getPointerTy(), Chain, SrcP, SrcS); + SDOperand Result = DAG.getNode(ISD::STORE, MVT::Other, Val.getValue(1), Val, + DestP, DestS); + SDOperand NP = DAG.getNode(ISD::ADD, MVT::i64, SrcP, + DAG.getConstant(8, MVT::i64)); + Val = DAG.getExtLoad(ISD::SEXTLOAD, MVT::i64, Result, NP, + DAG.getSrcValue(0), MVT::i32); + SDOperand NPD = DAG.getNode(ISD::ADD, MVT::i64, DestP, + DAG.getConstant(8, MVT::i64)); + return DAG.getNode(ISD::TRUNCSTORE, MVT::Other, Val.getValue(1), + Val, NPD, DAG.getSrcValue(0),DAG.getValueType(MVT::i32)); + } + case ISD::VASTART: { + SDOperand Chain = Op.getOperand(0); + SDOperand VAListP = Op.getOperand(1); + SDOperand VAListS = Op.getOperand(2); + + // vastart stores the address of the VarArgsBase and VarArgsOffset + SDOperand FR = DAG.getFrameIndex(VarArgsBase, MVT::i64); + SDOperand S1 = DAG.getNode(ISD::STORE, MVT::Other, Chain, FR, VAListP, + VAListS); + SDOperand SA2 = DAG.getNode(ISD::ADD, MVT::i64, VAListP, + DAG.getConstant(8, MVT::i64)); + return DAG.getNode(ISD::TRUNCSTORE, MVT::Other, S1, + DAG.getConstant(VarArgsOffset, MVT::i64), SA2, + DAG.getSrcValue(0), DAG.getValueType(MVT::i32)); + } } return SDOperand(); Index: llvm/lib/Target/Alpha/AlphaISelLowering.h diff -u llvm/lib/Target/Alpha/AlphaISelLowering.h:1.11 llvm/lib/Target/Alpha/AlphaISelLowering.h:1.12 --- llvm/lib/Target/Alpha/AlphaISelLowering.h:1.11 Mon Jan 23 15:51:33 2006 +++ llvm/lib/Target/Alpha/AlphaISelLowering.h Wed Jan 25 12:21:52 2006 @@ -75,15 +75,6 @@ bool isTailCall, SDOperand Callee, ArgListTy &Args, SelectionDAG &DAG); - virtual SDOperand LowerVAStart(SDOperand Chain, SDOperand VAListP, - Value *VAListV, SelectionDAG &DAG); - virtual SDOperand LowerVACopy(SDOperand Chain, SDOperand SrcP, Value *SrcV, - SDOperand DestP, Value *DestV, - SelectionDAG &DAG); - virtual std::pair - LowerVAArg(SDOperand Chain, SDOperand VAListP, Value *VAListV, - const Type *ArgTy, SelectionDAG &DAG); - void restoreGP(MachineBasicBlock* BB); void restoreRA(MachineBasicBlock* BB); unsigned getVRegGP() { return GP; } From natebegeman at mac.com Wed Jan 25 12:22:08 2006 From: natebegeman at mac.com (Nate Begeman) Date: Wed, 25 Jan 2006 12:22:08 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp Message-ID: <200601251822.MAA31267@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/SparcV8: SparcV8ISelDAGToDAG.cpp updated: 1.57 -> 1.58 --- Log message: First part of bug 680: http://llvm.cs.uiuc.edu/PR680 : Remove TLI.LowerVA* and replace it with SDNodes that are lowered the same way as everything else. --- Diffs of the changes: (+18 -37) SparcV8ISelDAGToDAG.cpp | 55 +++++++++++++++--------------------------------- 1 files changed, 18 insertions(+), 37 deletions(-) Index: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp diff -u llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.57 llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.58 --- llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.57 Wed Jan 25 03:15:54 2006 +++ llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp Wed Jan 25 12:21:52 2006 @@ -66,11 +66,6 @@ virtual SDOperand LowerReturnTo(SDOperand Chain, SDOperand Op, SelectionDAG &DAG); - virtual SDOperand LowerVAStart(SDOperand Chain, SDOperand VAListP, - Value *VAListV, SelectionDAG &DAG); - virtual std::pair - LowerVAArg(SDOperand Chain, SDOperand VAListP, Value *VAListV, - const Type *ArgTy, SelectionDAG &DAG); virtual std::pair LowerFrameReturnAddress(bool isFrameAddr, SDOperand Chain, unsigned Depth, SelectionDAG &DAG); @@ -161,9 +156,15 @@ setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand); setOperationAction(ISD::DEBUG_LABEL, MVT::Other, Expand); - // Expand these to their default code. - setOperationAction(ISD::STACKSAVE, MVT::Other, Expand); - setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand); + // VASTART needs to be custom lowered to use the VarArgsFrameIndex + setOperationAction(ISD::VASTART , MVT::Other, Custom); + + // Use the default implementation. + setOperationAction(ISD::VAARG , MVT::Other, Expand); + setOperationAction(ISD::VACOPY , MVT::Other, Expand); + setOperationAction(ISD::VAEND , MVT::Other, Expand); + setOperationAction(ISD::STACKSAVE , MVT::Other, Expand); + setOperationAction(ISD::STACKRESTORE , MVT::Other, Expand); setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32, Expand); setSchedulingPreference(SchedulingForLatency); @@ -602,35 +603,6 @@ return DAG.getNode(V8ISD::RET_FLAG, MVT::Other, Copy, Copy.getValue(1)); } -SDOperand SparcV8TargetLowering:: -LowerVAStart(SDOperand Chain, SDOperand VAListP, Value *VAListV, - SelectionDAG &DAG) { - - SDOperand Offset = DAG.getNode(ISD::ADD, MVT::i32, - DAG.getRegister(V8::I6, MVT::i32), - DAG.getConstant(VarArgsFrameOffset, MVT::i32)); - return DAG.getNode(ISD::STORE, MVT::Other, Chain, Offset, - VAListP, DAG.getSrcValue(VAListV)); -} - -std::pair SparcV8TargetLowering:: -LowerVAArg(SDOperand Chain, SDOperand VAListP, Value *VAListV, - const Type *ArgTy, SelectionDAG &DAG) { - // Load the pointer out of the valist. - SDOperand Ptr = DAG.getLoad(MVT::i32, Chain, - VAListP, DAG.getSrcValue(VAListV)); - MVT::ValueType ArgVT = getValueType(ArgTy); - SDOperand Val = DAG.getLoad(ArgVT, Ptr.getValue(1), - Ptr, DAG.getSrcValue(NULL)); - // Increment the pointer. - Ptr = DAG.getNode(ISD::ADD, MVT::i32, Ptr, - DAG.getConstant(MVT::getSizeInBits(ArgVT)/8, MVT::i32)); - // Store it back to the valist. - Chain = DAG.getNode(ISD::STORE, MVT::Other, Chain, Ptr, - VAListP, DAG.getSrcValue(VAListV)); - return std::make_pair(Val, Chain); -} - std::pair SparcV8TargetLowering:: LowerFrameReturnAddress(bool isFrameAddr, SDOperand Chain, unsigned Depth, SelectionDAG &DAG) { @@ -714,6 +686,15 @@ return DAG.getNode(Opc, TrueVal.getValueType(), TrueVal, FalseVal, DAG.getConstant(CC, MVT::i32), CompareFlag); } + case ISD::VASTART: { + // vastart just stores the address of the VarArgsFrameIndex slot into the + // memory location argument. + SDOperand Offset = DAG.getNode(ISD::ADD, MVT::i32, + DAG.getRegister(V8::I6, MVT::i32), + DAG.getConstant(VarArgsFrameOffset, MVT::i32)); + return DAG.getNode(ISD::STORE, MVT::Other, Op.getOperand(0), Offset, + Op.getOperand(1), Op.getOperand(2)); + } } } From natebegeman at mac.com Wed Jan 25 12:22:09 2006 From: natebegeman at mac.com (Nate Begeman) Date: Wed, 25 Jan 2006 12:22:09 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/SelectionDAG.h SelectionDAGNodes.h Message-ID: <200601251822.MAA31283@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/CodeGen: SelectionDAG.h updated: 1.87 -> 1.88 SelectionDAGNodes.h updated: 1.93 -> 1.94 --- Log message: First part of bug 680: http://llvm.cs.uiuc.edu/PR680 : Remove TLI.LowerVA* and replace it with SDNodes that are lowered the same way as everything else. --- Diffs of the changes: (+18 -0) SelectionDAG.h | 5 +++++ SelectionDAGNodes.h | 13 +++++++++++++ 2 files changed, 18 insertions(+) Index: llvm/include/llvm/CodeGen/SelectionDAG.h diff -u llvm/include/llvm/CodeGen/SelectionDAG.h:1.87 llvm/include/llvm/CodeGen/SelectionDAG.h:1.88 --- llvm/include/llvm/CodeGen/SelectionDAG.h:1.87 Mon Jan 23 15:51:14 2006 +++ llvm/include/llvm/CodeGen/SelectionDAG.h Wed Jan 25 12:21:52 2006 @@ -278,6 +278,11 @@ Ops.push_back(False); return getNode(ISD::BRTWOWAY_CC, MVT::Other, Ops); } + + /// getVAArg - VAArg produces a result and token chain, and takes a pointer + /// and a source value as input. + SDOperand getVAArg(MVT::ValueType VT, SDOperand Chain, SDOperand Ptr, + SDOperand SV); /// getLoad - Loads are not normal binary operators: their result type is not /// determined by their operands, and they produce a value AND a token chain. Index: llvm/include/llvm/CodeGen/SelectionDAGNodes.h diff -u llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.93 llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.94 --- llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.93 Mon Jan 23 23:47:05 2006 +++ llvm/include/llvm/CodeGen/SelectionDAGNodes.h Wed Jan 25 12:21:52 2006 @@ -335,6 +335,19 @@ // target and not touched by the DAG optimizers. CALLSEQ_START, // Beginning of a call sequence CALLSEQ_END, // End of a call sequence + + // VAARG - VAARG has three operands: an input chain, a pointer, and a + // SRCVALUE. It returns a pair of values: the vaarg value and a new chain. + VAARG, + + // VACOPY - VACOPY has five operands: an input chain, a destination pointer, + // a source pointer, a SRCVALUE for the destination, and a SRCVALUE for the + // source. + VACOPY, + + // VAEND, VASTART - VAEND and VASTART have three operands: an input chain, a + // pointer, and a SRCVALUE. + VAEND, VASTART, // SRCVALUE - This corresponds to a Value*, and is used to associate memory // locations with their value. This allows one use alias analysis From natebegeman at mac.com Wed Jan 25 12:22:08 2006 From: natebegeman at mac.com (Nate Begeman) Date: Wed, 25 Jan 2006 12:22:08 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelLowering.cpp PPCISelLowering.h Message-ID: <200601251822.MAA31265@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/PowerPC: PPCISelLowering.cpp updated: 1.69 -> 1.70 PPCISelLowering.h updated: 1.14 -> 1.15 --- Log message: First part of bug 680: http://llvm.cs.uiuc.edu/PR680 : Remove TLI.LowerVA* and replace it with SDNodes that are lowered the same way as everything else. --- Diffs of the changes: (+14 -41) PPCISelLowering.cpp | 48 ++++++++++++++---------------------------------- PPCISelLowering.h | 7 ------- 2 files changed, 14 insertions(+), 41 deletions(-) Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.69 llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.70 --- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.69 Wed Jan 25 03:15:54 2006 +++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp Wed Jan 25 12:21:52 2006 @@ -110,7 +110,13 @@ setOperationAction(ISD::GlobalAddress, MVT::i32, Custom); setOperationAction(ISD::ConstantPool, MVT::i32, Custom); + // VASTART needs to be custom lowered to use the VarArgsFrameIndex + setOperationAction(ISD::VASTART , MVT::Other, Custom); + // Use the default implementation. + setOperationAction(ISD::VAARG , MVT::Other, Expand); + setOperationAction(ISD::VACOPY , MVT::Other, Expand); + setOperationAction(ISD::VAEND , MVT::Other, Expand); setOperationAction(ISD::STACKSAVE , MVT::Other, Expand); setOperationAction(ISD::STACKRESTORE , MVT::Other, Expand); setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32 , Expand); @@ -427,6 +433,14 @@ // resolution stub. return DAG.getLoad(MVT::i32, DAG.getEntryNode(), Lo, DAG.getSrcValue(0)); } + case ISD::VASTART: { + // vastart just stores the address of the VarArgsFrameIndex slot into the + // memory location argument. + // FIXME: Replace MVT::i32 with PointerTy + SDOperand FR = DAG.getFrameIndex(VarArgsFrameIndex, MVT::i32); + return DAG.getNode(ISD::STORE, MVT::Other, Op.getOperand(0), FR, + Op.getOperand(1), Op.getOperand(2)); + } } return SDOperand(); } @@ -846,40 +860,6 @@ return DAG.getNode(PPCISD::RET_FLAG, MVT::Other, Copy, Copy.getValue(1)); } -SDOperand PPCTargetLowering::LowerVAStart(SDOperand Chain, SDOperand VAListP, - Value *VAListV, SelectionDAG &DAG) { - // vastart just stores the address of the VarArgsFrameIndex slot into the - // memory location argument. - SDOperand FR = DAG.getFrameIndex(VarArgsFrameIndex, MVT::i32); - return DAG.getNode(ISD::STORE, MVT::Other, Chain, FR, VAListP, - DAG.getSrcValue(VAListV)); -} - -std::pair -PPCTargetLowering::LowerVAArg(SDOperand Chain, - SDOperand VAListP, Value *VAListV, - const Type *ArgTy, SelectionDAG &DAG) { - MVT::ValueType ArgVT = getValueType(ArgTy); - - SDOperand VAList = - DAG.getLoad(MVT::i32, Chain, VAListP, DAG.getSrcValue(VAListV)); - SDOperand Result = DAG.getLoad(ArgVT, Chain, VAList, DAG.getSrcValue(NULL)); - unsigned Amt; - if (ArgVT == MVT::i32 || ArgVT == MVT::f32) - Amt = 4; - else { - assert((ArgVT == MVT::i64 || ArgVT == MVT::f64) && - "Other types should have been promoted for varargs!"); - Amt = 8; - } - VAList = DAG.getNode(ISD::ADD, VAList.getValueType(), VAList, - DAG.getConstant(Amt, VAList.getValueType())); - Chain = DAG.getNode(ISD::STORE, MVT::Other, Chain, - VAList, VAListP, DAG.getSrcValue(VAListV)); - return std::make_pair(Result, Chain); -} - - std::pair PPCTargetLowering:: LowerFrameReturnAddress(bool isFrameAddress, SDOperand Chain, unsigned Depth, SelectionDAG &DAG) { Index: llvm/lib/Target/PowerPC/PPCISelLowering.h diff -u llvm/lib/Target/PowerPC/PPCISelLowering.h:1.14 llvm/lib/Target/PowerPC/PPCISelLowering.h:1.15 --- llvm/lib/Target/PowerPC/PPCISelLowering.h:1.14 Mon Jan 9 17:52:17 2006 +++ llvm/lib/Target/PowerPC/PPCISelLowering.h Wed Jan 25 12:21:52 2006 @@ -94,13 +94,6 @@ virtual SDOperand LowerReturnTo(SDOperand Chain, SDOperand Op, SelectionDAG &DAG); - virtual SDOperand LowerVAStart(SDOperand Chain, SDOperand VAListP, - Value *VAListV, SelectionDAG &DAG); - - virtual std::pair - LowerVAArg(SDOperand Chain, SDOperand VAListP, Value *VAListV, - const Type *ArgTy, SelectionDAG &DAG); - virtual std::pair LowerFrameReturnAddress(bool isFrameAddr, SDOperand Chain, unsigned Depth, SelectionDAG &DAG); From natebegeman at mac.com Wed Jan 25 12:22:09 2006 From: natebegeman at mac.com (Nate Begeman) Date: Wed, 25 Jan 2006 12:22:09 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/Target/TargetLowering.h Message-ID: <200601251822.MAA31287@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/Target: TargetLowering.h updated: 1.35 -> 1.36 --- Log message: First part of bug 680: http://llvm.cs.uiuc.edu/PR680 : Remove TLI.LowerVA* and replace it with SDNodes that are lowered the same way as everything else. --- Diffs of the changes: (+0 -25) TargetLowering.h | 25 ------------------------- 1 files changed, 25 deletions(-) Index: llvm/include/llvm/Target/TargetLowering.h diff -u llvm/include/llvm/Target/TargetLowering.h:1.35 llvm/include/llvm/Target/TargetLowering.h:1.36 --- llvm/include/llvm/Target/TargetLowering.h:1.35 Wed Jan 25 03:09:02 2006 +++ llvm/include/llvm/Target/TargetLowering.h Wed Jan 25 12:21:52 2006 @@ -366,31 +366,6 @@ virtual SDOperand LowerReturnTo(SDOperand Chain, SDOperand Op, SelectionDAG &DAG); - /// LowerVAStart - This lowers the llvm.va_start intrinsic. If not - /// implemented, this method prints a message and aborts. This method should - /// return the modified chain value. Note that VAListPtr* correspond to the - /// llvm.va_start operand. - virtual SDOperand LowerVAStart(SDOperand Chain, SDOperand VAListP, - Value *VAListV, SelectionDAG &DAG); - - /// LowerVAEnd - This lowers llvm.va_end and returns the resultant chain. If - /// not implemented, this defaults to a noop. - virtual SDOperand LowerVAEnd(SDOperand Chain, SDOperand LP, Value *LV, - SelectionDAG &DAG); - - /// LowerVACopy - This lowers llvm.va_copy and returns the resultant chain. - /// If not implemented, this defaults to loading a pointer from the input and - /// storing it to the output. - virtual SDOperand LowerVACopy(SDOperand Chain, SDOperand SrcP, Value *SrcV, - SDOperand DestP, Value *DestV, - SelectionDAG &DAG); - - /// LowerVAArg - This lowers the vaarg instruction. If not implemented, this - /// prints a message and aborts. - virtual std::pair - LowerVAArg(SDOperand Chain, SDOperand VAListP, Value *VAListV, - const Type *ArgTy, SelectionDAG &DAG); - /// LowerFrameReturnAddress - This hook lowers a call to llvm.returnaddress or /// llvm.frameaddress (depending on the value of the first argument). The /// return values are the result pointer and the resultant token chain. If From natebegeman at mac.com Wed Jan 25 12:22:08 2006 From: natebegeman at mac.com (Nate Begeman) Date: Wed, 25 Jan 2006 12:22:08 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/IA64/IA64ISelLowering.cpp IA64ISelLowering.h Message-ID: <200601251822.MAA31261@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/IA64: IA64ISelLowering.cpp updated: 1.26 -> 1.27 IA64ISelLowering.h updated: 1.5 -> 1.6 --- Log message: First part of bug 680: http://llvm.cs.uiuc.edu/PR680 : Remove TLI.LowerVA* and replace it with SDNodes that are lowered the same way as everything else. --- Diffs of the changes: (+28 -42) IA64ISelLowering.cpp | 63 ++++++++++++++++++++++----------------------------- IA64ISelLowering.h | 7 ----- 2 files changed, 28 insertions(+), 42 deletions(-) Index: llvm/lib/Target/IA64/IA64ISelLowering.cpp diff -u llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.26 llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.27 --- llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.26 Wed Jan 25 03:15:54 2006 +++ llvm/lib/Target/IA64/IA64ISelLowering.cpp Wed Jan 25 12:21:52 2006 @@ -89,6 +89,13 @@ setOperationAction(ISD::ROTR , MVT::i64 , Expand); setOperationAction(ISD::BSWAP, MVT::i64 , Expand); // mux @rev + // VASTART needs to be custom lowered to use the VarArgsFrameIndex + setOperationAction(ISD::VAARG , MVT::Other, Custom); + setOperationAction(ISD::VASTART , MVT::Other, Custom); + + // Use the default implementation. + setOperationAction(ISD::VACOPY , MVT::Other, Expand); + setOperationAction(ISD::VAEND , MVT::Other, Expand); setOperationAction(ISD::STACKSAVE, MVT::Other, Expand); setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand); setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i64, Expand); @@ -569,41 +576,6 @@ // return DAG.getNode(IA64ISD::RET_FLAG, MVT::Other, MVT::Other, Copy, Chain, InFlag); } -SDOperand -IA64TargetLowering::LowerVAStart(SDOperand Chain, SDOperand VAListP, - Value *VAListV, SelectionDAG &DAG) { - // vastart just stores the address of the VarArgsFrameIndex slot. - SDOperand FR = DAG.getFrameIndex(VarArgsFrameIndex, MVT::i64); - return DAG.getNode(ISD::STORE, MVT::Other, Chain, FR, - VAListP, DAG.getSrcValue(VAListV)); -} - -std::pair IA64TargetLowering:: -LowerVAArg(SDOperand Chain, SDOperand VAListP, Value *VAListV, - const Type *ArgTy, SelectionDAG &DAG) { - - MVT::ValueType ArgVT = getValueType(ArgTy); - SDOperand Val = DAG.getLoad(MVT::i64, Chain, - VAListP, DAG.getSrcValue(VAListV)); - SDOperand Result = DAG.getLoad(ArgVT, DAG.getEntryNode(), Val, - DAG.getSrcValue(NULL)); - unsigned Amt; - if (ArgVT == MVT::i32 || ArgVT == MVT::f32) - Amt = 8; - else { - assert((ArgVT == MVT::i64 || ArgVT == MVT::f64) && - "Other types should have been promoted for varargs!"); - Amt = 8; - } - Val = DAG.getNode(ISD::ADD, Val.getValueType(), Val, - DAG.getConstant(Amt, Val.getValueType())); - Chain = DAG.getNode(ISD::STORE, MVT::Other, Chain, - Val, VAListP, DAG.getSrcValue(VAListV)); - return std::make_pair(Result, Chain); -} - - - std::pair IA64TargetLowering:: LowerFrameReturnAddress(bool isFrameAddress, SDOperand Chain, unsigned Depth, SelectionDAG &DAG) { @@ -631,5 +603,26 @@ // and then just emit a 'ret' instruction return DAG.getNode(IA64ISD::RET_FLAG, MVT::Other, Chain); } + case ISD::VAARG: { + MVT::ValueType VT = getPointerTy(); + SDOperand VAList = DAG.getLoad(VT, Op.getOperand(0), Op.getOperand(1), + Op.getOperand(2)); + // Increment the pointer, VAList, to the next vaarg + SDOperand VAIncr = DAG.getNode(ISD::ADD, VT, VAList, + DAG.getConstant(MVT::getSizeInBits(VT)/8, + VT)); + // Store the incremented VAList to the legalized pointer + VAIncr = DAG.getNode(ISD::STORE, MVT::Other, VAList.getValue(1), VAIncr, + Op.getOperand(1), Op.getOperand(2)); + // Load the actual argument out of the pointer VAList + return DAG.getLoad(VT, VAIncr, VAList, DAG.getSrcValue(0)); + } + case ISD::VASTART: { + // vastart just stores the address of the VarArgsFrameIndex slot into the + // memory location argument. + SDOperand FR = DAG.getFrameIndex(VarArgsFrameIndex, MVT::i64); + return DAG.getNode(ISD::STORE, MVT::Other, Op.getOperand(0), FR, + Op.getOperand(1), Op.getOperand(2)); + } } } Index: llvm/lib/Target/IA64/IA64ISelLowering.h diff -u llvm/lib/Target/IA64/IA64ISelLowering.h:1.5 llvm/lib/Target/IA64/IA64ISelLowering.h:1.6 --- llvm/lib/Target/IA64/IA64ISelLowering.h:1.5 Fri Jan 20 14:24:31 2006 +++ llvm/lib/Target/IA64/IA64ISelLowering.h Wed Jan 25 12:21:52 2006 @@ -76,13 +76,6 @@ /// (currently, only "ret void") virtual SDOperand LowerOperation(SDOperand Op, SelectionDAG &DAG); - virtual SDOperand LowerVAStart(SDOperand Chain, SDOperand VAListP, - Value *VAListV, SelectionDAG &DAG); - - virtual std::pair - LowerVAArg(SDOperand Chain, SDOperand VAListP, Value *VAListV, - const Type *ArgTy, SelectionDAG &DAG); - virtual std::pair LowerFrameReturnAddress(bool isFrameAddr, SDOperand Chain, unsigned Depth, SelectionDAG &DAG); From natebegeman at mac.com Wed Jan 25 12:22:09 2006 From: natebegeman at mac.com (Nate Begeman) Date: Wed, 25 Jan 2006 12:22:09 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp SelectionDAG.cpp SelectionDAGISel.cpp Message-ID: <200601251822.MAA31295@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/SelectionDAG: LegalizeDAG.cpp updated: 1.276 -> 1.277 SelectionDAG.cpp updated: 1.243 -> 1.244 SelectionDAGISel.cpp updated: 1.136 -> 1.137 --- Log message: First part of bug 680: http://llvm.cs.uiuc.edu/PR680 : Remove TLI.LowerVA* and replace it with SDNodes that are lowered the same way as everything else. --- Diffs of the changes: (+192 -67) LegalizeDAG.cpp | 157 +++++++++++++++++++++++++++++++++++++++++++++++++-- SelectionDAG.cpp | 33 ++++++++-- SelectionDAGISel.cpp | 69 +++++----------------- 3 files changed, 192 insertions(+), 67 deletions(-) Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.276 llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.277 --- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.276 Mon Jan 23 23:48:21 2006 +++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Wed Jan 25 12:21:52 2006 @@ -1115,13 +1115,12 @@ switch (TLI.getOperationAction(Node->getOpcode(), VT)) { default: assert(0 && "This action is not supported yet!"); case TargetLowering::Custom: { - SDOperand Op = DAG.getLoad(Node->getValueType(0), - Tmp1, Tmp2, Node->getOperand(2)); + SDOperand Op = DAG.getLoad(VT, Tmp1, Tmp2, Node->getOperand(2)); SDOperand Tmp = TLI.LowerOperation(Op, DAG); if (Tmp.Val) { Result = LegalizeOp(Tmp); - // Since loads produce two values, make sure to remember that we legalized - // both of them. + // Since loads produce two values, make sure to remember that we + // legalized both of them. AddLegalizedOperand(SDOperand(Node, 0), Result); AddLegalizedOperand(SDOperand(Node, 1), Result.getValue(1)); return Result.getValue(Op.ResNo); @@ -1131,8 +1130,7 @@ case TargetLowering::Legal: if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1)) - Result = DAG.getLoad(Node->getValueType(0), Tmp1, Tmp2, - Node->getOperand(2)); + Result = DAG.getLoad(VT, Tmp1, Tmp2, Node->getOperand(2)); else Result = SDOperand(Node, 0); @@ -2222,6 +2220,140 @@ } break; + case ISD::VAARG: { + Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain. + Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the pointer. + + MVT::ValueType VT = Node->getValueType(0); + switch (TLI.getOperationAction(Node->getOpcode(), MVT::Other)) { + default: assert(0 && "This action is not supported yet!"); + case TargetLowering::Custom: { + SDOperand Op = DAG.getVAArg(VT, Tmp1, Tmp2, Node->getOperand(2)); + SDOperand Tmp = TLI.LowerOperation(Op, DAG); + if (Tmp.Val) { + Result = LegalizeOp(Tmp); + break; + } + // FALLTHROUGH if the target thinks it is legal. + } + case TargetLowering::Legal: + if (Tmp1 != Node->getOperand(0) || + Tmp2 != Node->getOperand(1)) + Result = DAG.getVAArg(VT, Tmp1, Tmp2, Node->getOperand(2)); + else + Result = SDOperand(Node, 0); + break; + case TargetLowering::Expand: { + SDOperand VAList = DAG.getLoad(TLI.getPointerTy(), Tmp1, Tmp2, + Node->getOperand(2)); + // Increment the pointer, VAList, to the next vaarg + Tmp3 = DAG.getNode(ISD::ADD, TLI.getPointerTy(), VAList, + DAG.getConstant(MVT::getSizeInBits(VT)/8, + TLI.getPointerTy())); + // Store the incremented VAList to the legalized pointer + Tmp3 = DAG.getNode(ISD::STORE, MVT::Other, VAList.getValue(1), Tmp3, Tmp2, + Node->getOperand(2)); + // Load the actual argument out of the pointer VAList + Result = DAG.getLoad(VT, Tmp3, VAList, DAG.getSrcValue(0)); + Result = LegalizeOp(Result); + break; + } + } + // Since VAARG produces two values, make sure to remember that we + // legalized both of them. + AddLegalizedOperand(SDOperand(Node, 0), Result); + AddLegalizedOperand(SDOperand(Node, 1), Result.getValue(1)); + return Result.getValue(Op.ResNo); + } + + case ISD::VACOPY: + Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain. + Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the dest pointer. + Tmp3 = LegalizeOp(Node->getOperand(2)); // Legalize the source pointer. + + switch (TLI.getOperationAction(ISD::VACOPY, MVT::Other)) { + default: assert(0 && "This action is not supported yet!"); + case TargetLowering::Custom: { + SDOperand Op = DAG.getNode(ISD::VACOPY, MVT::Other, Tmp1, Tmp2, Tmp3, + Node->getOperand(3), Node->getOperand(4)); + SDOperand Tmp = TLI.LowerOperation(Op, DAG); + if (Tmp.Val) { + Result = LegalizeOp(Tmp); + break; + } + // FALLTHROUGH if the target thinks it is legal. + } + case TargetLowering::Legal: + if (Tmp1 != Node->getOperand(0) || + Tmp2 != Node->getOperand(1) || + Tmp3 != Node->getOperand(2)) + Result = DAG.getNode(ISD::VACOPY, MVT::Other, Tmp1, Tmp2, Tmp3, + Node->getOperand(3), Node->getOperand(4)); + break; + case TargetLowering::Expand: + // This defaults to loading a pointer from the input and storing it to the + // output, returning the chain. + Tmp4 = DAG.getLoad(TLI.getPointerTy(), Tmp1, Tmp3, Node->getOperand(3)); + Result = DAG.getNode(ISD::STORE, MVT::Other, Tmp4.getValue(1), Tmp4, Tmp2, + Node->getOperand(4)); + Result = LegalizeOp(Result); + break; + } + break; + + case ISD::VAEND: + Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain. + Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the pointer. + + switch (TLI.getOperationAction(ISD::VAEND, MVT::Other)) { + default: assert(0 && "This action is not supported yet!"); + case TargetLowering::Custom: { + SDOperand Op = DAG.getNode(ISD::VAEND, MVT::Other, Tmp1, Tmp2, + Node->getOperand(2)); + SDOperand Tmp = TLI.LowerOperation(Op, DAG); + if (Tmp.Val) { + Result = LegalizeOp(Tmp); + break; + } + // FALLTHROUGH if the target thinks it is legal. + } + case TargetLowering::Legal: + if (Tmp1 != Node->getOperand(0) || + Tmp2 != Node->getOperand(1)) + Result = DAG.getNode(ISD::VAEND, MVT::Other, Tmp1, Tmp2, + Node->getOperand(2)); + break; + case TargetLowering::Expand: + Result = Tmp1; // Default to a no-op, return the chain + break; + } + break; + + case ISD::VASTART: + Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain. + Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the pointer. + + switch (TLI.getOperationAction(ISD::VASTART, MVT::Other)) { + default: assert(0 && "This action is not supported yet!"); + case TargetLowering::Custom: { + SDOperand Op = DAG.getNode(ISD::VASTART, MVT::Other, Tmp1, Tmp2, + Node->getOperand(2)); + SDOperand Tmp = TLI.LowerOperation(Op, DAG); + if (Tmp.Val) { + Result = LegalizeOp(Tmp); + break; + } + // FALLTHROUGH if the target thinks it is legal. + } + case TargetLowering::Legal: + if (Tmp1 != Node->getOperand(0) || + Tmp2 != Node->getOperand(1)) + Result = DAG.getNode(ISD::VASTART, MVT::Other, Tmp1, Tmp2, + Node->getOperand(2)); + break; + } + break; + case ISD::ROTL: case ISD::ROTR: Tmp1 = LegalizeOp(Node->getOperand(0)); // LHS @@ -3823,6 +3955,19 @@ break; } + case ISD::VAARG: { + SDOperand Ch = LegalizeOp(Node->getOperand(0)); // Legalize the chain. + SDOperand Ptr = LegalizeOp(Node->getOperand(1)); // Legalize the pointer. + Lo = DAG.getVAArg(NVT, Ch, Ptr, Node->getOperand(2)); + Hi = DAG.getVAArg(NVT, Lo.getValue(1), Ptr, Node->getOperand(2)); + + // Remember that we legalized the chain. + AddLegalizedOperand(Op.getValue(1), Hi.getValue(1)); + if (!TLI.isLittleEndian()) + std::swap(Lo, Hi); + break; + } + case ISD::LOAD: { SDOperand Ch = LegalizeOp(Node->getOperand(0)); // Legalize the chain. SDOperand Ptr = LegalizeOp(Node->getOperand(1)); // Legalize the pointer. Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.243 llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.244 --- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.243 Mon Jan 23 23:48:21 2006 +++ llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Wed Jan 25 12:21:52 2006 @@ -1348,6 +1348,20 @@ return SDOperand(N, 0); } +SDOperand SelectionDAG::getVAArg(MVT::ValueType VT, + SDOperand Chain, SDOperand Ptr, + SDOperand SV) { + std::vector Ops; + Ops.reserve(3); + Ops.push_back(Chain); + Ops.push_back(Ptr); + Ops.push_back(SV); + std::vector VTs; + VTs.reserve(2); + VTs.push_back(VT); VTs.push_back(MVT::Other); // Add token chain. + return getNode(ISD::VAARG, VTs, Ops); +} + SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, std::vector &Ops) { switch (Ops.size()) { @@ -2087,14 +2101,17 @@ case ISD::CALLSEQ_END: return "callseq_end"; // Other operators - case ISD::LOAD: return "load"; - case ISD::STORE: return "store"; - case ISD::VLOAD: return "vload"; - case ISD::EXTLOAD: return "extload"; - case ISD::SEXTLOAD: return "sextload"; - case ISD::ZEXTLOAD: return "zextload"; - case ISD::TRUNCSTORE: return "truncstore"; - + case ISD::LOAD: return "load"; + case ISD::STORE: return "store"; + case ISD::VLOAD: return "vload"; + case ISD::EXTLOAD: return "extload"; + case ISD::SEXTLOAD: return "sextload"; + case ISD::ZEXTLOAD: return "zextload"; + case ISD::TRUNCSTORE: return "truncstore"; + case ISD::VAARG: return "vaarg"; + case ISD::VACOPY: return "vacopy"; + case ISD::VAEND: return "vaend"; + case ISD::VASTART: return "vastart"; case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; case ISD::EXTRACT_ELEMENT: return "extract_element"; case ISD::BUILD_PAIR: return "build_pair"; Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.136 llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.137 --- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.136 Wed Jan 25 03:12:57 2006 +++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Wed Jan 25 12:21:52 2006 @@ -1204,71 +1204,34 @@ return DAG.getNode(ISD::RET, MVT::Other, Chain, Op); } -SDOperand TargetLowering::LowerVAStart(SDOperand Chain, - SDOperand VAListP, Value *VAListV, - SelectionDAG &DAG) { - // We have no sane default behavior, just emit a useful error message and bail - // out. - std::cerr << "Variable arguments handling not implemented on this target!\n"; - abort(); - return SDOperand(); -} - -SDOperand TargetLowering::LowerVAEnd(SDOperand Chain, SDOperand LP, Value *LV, - SelectionDAG &DAG) { - // Default to a noop. - return Chain; -} - -SDOperand TargetLowering::LowerVACopy(SDOperand Chain, - SDOperand SrcP, Value *SrcV, - SDOperand DestP, Value *DestV, - SelectionDAG &DAG) { - // Default to copying the input list. - SDOperand Val = DAG.getLoad(getPointerTy(), Chain, - SrcP, DAG.getSrcValue(SrcV)); - SDOperand Result = DAG.getNode(ISD::STORE, MVT::Other, Val.getValue(1), - Val, DestP, DAG.getSrcValue(DestV)); - return Result; -} - -std::pair -TargetLowering::LowerVAArg(SDOperand Chain, SDOperand VAListP, Value *VAListV, - const Type *ArgTy, SelectionDAG &DAG) { - // We have no sane default behavior, just emit a useful error message and bail - // out. - std::cerr << "Variable arguments handling not implemented on this target!\n"; - abort(); - return std::make_pair(SDOperand(), SDOperand()); -} - - void SelectionDAGLowering::visitVAStart(CallInst &I) { - DAG.setRoot(TLI.LowerVAStart(getRoot(), getValue(I.getOperand(1)), - I.getOperand(1), DAG)); + DAG.setRoot(DAG.getNode(ISD::VASTART, MVT::Other, getRoot(), + getValue(I.getOperand(1)), + DAG.getSrcValue(I.getOperand(1)))); } void SelectionDAGLowering::visitVAArg(VAArgInst &I) { - std::pair Result = - TLI.LowerVAArg(getRoot(), getValue(I.getOperand(0)), I.getOperand(0), - I.getType(), DAG); - setValue(&I, Result.first); - DAG.setRoot(Result.second); + SDOperand V = DAG.getVAArg(TLI.getValueType(I.getType()), getRoot(), + getValue(I.getOperand(0)), + DAG.getSrcValue(I.getOperand(0))); + setValue(&I, V); + DAG.setRoot(V.getValue(1)); } void SelectionDAGLowering::visitVAEnd(CallInst &I) { - DAG.setRoot(TLI.LowerVAEnd(getRoot(), getValue(I.getOperand(1)), - I.getOperand(1), DAG)); + DAG.setRoot(DAG.getNode(ISD::VAEND, MVT::Other, getRoot(), + getValue(I.getOperand(1)), + DAG.getSrcValue(I.getOperand(1)))); } void SelectionDAGLowering::visitVACopy(CallInst &I) { - SDOperand Result = - TLI.LowerVACopy(getRoot(), getValue(I.getOperand(2)), I.getOperand(2), - getValue(I.getOperand(1)), I.getOperand(1), DAG); - DAG.setRoot(Result); + DAG.setRoot(DAG.getNode(ISD::VACOPY, MVT::Other, getRoot(), + getValue(I.getOperand(1)), + getValue(I.getOperand(2)), + DAG.getSrcValue(I.getOperand(1)), + DAG.getSrcValue(I.getOperand(2)))); } - // It is always conservatively correct for llvm.returnaddress and // llvm.frameaddress to return 0. std::pair From natebegeman at mac.com Wed Jan 25 12:22:08 2006 From: natebegeman at mac.com (Nate Begeman) Date: Wed, 25 Jan 2006 12:22:08 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp X86ISelLowering.h Message-ID: <200601251822.MAA31277@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: X86ISelLowering.cpp updated: 1.56 -> 1.57 X86ISelLowering.h updated: 1.15 -> 1.16 --- Log message: First part of bug 680: http://llvm.cs.uiuc.edu/PR680 : Remove TLI.LowerVA* and replace it with SDNodes that are lowered the same way as everything else. --- Diffs of the changes: (+15 -41) X86ISelLowering.cpp | 50 +++++++++++++++----------------------------------- X86ISelLowering.h | 6 ------ 2 files changed, 15 insertions(+), 41 deletions(-) Index: llvm/lib/Target/X86/X86ISelLowering.cpp diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.56 llvm/lib/Target/X86/X86ISelLowering.cpp:1.57 --- llvm/lib/Target/X86/X86ISelLowering.cpp:1.56 Wed Jan 25 03:15:17 2006 +++ llvm/lib/Target/X86/X86ISelLowering.cpp Wed Jan 25 12:21:52 2006 @@ -169,7 +169,13 @@ setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand); setOperationAction(ISD::DEBUG_LABEL, MVT::Other, Expand); - // Expand to the default code. + // VASTART needs to be custom lowered to use the VarArgsFrameIndex + setOperationAction(ISD::VASTART , MVT::Other, Custom); + + // Use the default implementation. + setOperationAction(ISD::VAARG , MVT::Other, Expand); + setOperationAction(ISD::VACOPY , MVT::Other, Expand); + setOperationAction(ISD::VAEND , MVT::Other, Expand); setOperationAction(ISD::STACKSAVE, MVT::Other, Expand); setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand); setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32 , Expand); @@ -641,40 +647,6 @@ } } -SDOperand -X86TargetLowering::LowerVAStart(SDOperand Chain, SDOperand VAListP, - Value *VAListV, SelectionDAG &DAG) { - // vastart just stores the address of the VarArgsFrameIndex slot. - SDOperand FR = DAG.getFrameIndex(VarArgsFrameIndex, MVT::i32); - return DAG.getNode(ISD::STORE, MVT::Other, Chain, FR, VAListP, - DAG.getSrcValue(VAListV)); -} - - -std::pair -X86TargetLowering::LowerVAArg(SDOperand Chain, SDOperand VAListP, - Value *VAListV, const Type *ArgTy, - SelectionDAG &DAG) { - MVT::ValueType ArgVT = getValueType(ArgTy); - SDOperand Val = DAG.getLoad(MVT::i32, Chain, - VAListP, DAG.getSrcValue(VAListV)); - SDOperand Result = DAG.getLoad(ArgVT, Chain, Val, - DAG.getSrcValue(NULL)); - unsigned Amt; - if (ArgVT == MVT::i32) - Amt = 4; - else { - assert((ArgVT == MVT::i64 || ArgVT == MVT::f64) && - "Other types should have been promoted for varargs!"); - Amt = 8; - } - Val = DAG.getNode(ISD::ADD, Val.getValueType(), Val, - DAG.getConstant(Amt, Val.getValueType())); - Chain = DAG.getNode(ISD::STORE, MVT::Other, Chain, - Val, VAListP, DAG.getSrcValue(VAListV)); - return std::make_pair(Result, Chain); -} - //===----------------------------------------------------------------------===// // Fast Calling Convention implementation //===----------------------------------------------------------------------===// @@ -1898,6 +1870,14 @@ DAG.getSrcValue(NULL)); return Result; } + case ISD::VASTART: { + // vastart just stores the address of the VarArgsFrameIndex slot into the + // memory location argument. + // FIXME: Replace MVT::i32 with PointerTy + SDOperand FR = DAG.getFrameIndex(VarArgsFrameIndex, MVT::i32); + return DAG.getNode(ISD::STORE, MVT::Other, Op.getOperand(0), FR, + Op.getOperand(1), Op.getOperand(2)); + } } } Index: llvm/lib/Target/X86/X86ISelLowering.h diff -u llvm/lib/Target/X86/X86ISelLowering.h:1.15 llvm/lib/Target/X86/X86ISelLowering.h:1.16 --- llvm/lib/Target/X86/X86ISelLowering.h:1.15 Thu Jan 12 16:54:21 2006 +++ llvm/lib/Target/X86/X86ISelLowering.h Wed Jan 25 12:21:52 2006 @@ -195,12 +195,6 @@ virtual SDOperand LowerReturnTo(SDOperand Chain, SDOperand Op, SelectionDAG &DAG); - virtual SDOperand LowerVAStart(SDOperand Chain, SDOperand VAListP, - Value *VAListV, SelectionDAG &DAG); - virtual std::pair - LowerVAArg(SDOperand Chain, SDOperand VAListP, Value *VAListV, - const Type *ArgTy, SelectionDAG &DAG); - virtual std::pair LowerFrameReturnAddress(bool isFrameAddr, SDOperand Chain, unsigned Depth, SelectionDAG &DAG); From evan.cheng at apple.com Wed Jan 25 12:52:56 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 25 Jan 2006 12:52:56 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/TargetLowering.cpp Message-ID: <200601251852.MAA05998@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target: TargetLowering.cpp updated: 1.18 -> 1.19 --- Log message: Set SchedulingForLatency to be the default scheduling preference for all. --- Diffs of the changes: (+1 -0) TargetLowering.cpp | 1 + 1 files changed, 1 insertion(+) Index: llvm/lib/Target/TargetLowering.cpp diff -u llvm/lib/Target/TargetLowering.cpp:1.18 llvm/lib/Target/TargetLowering.cpp:1.19 --- llvm/lib/Target/TargetLowering.cpp:1.18 Wed Dec 21 17:14:54 2005 +++ llvm/lib/Target/TargetLowering.cpp Wed Jan 25 12:52:42 2006 @@ -32,6 +32,7 @@ UseUnderscoreSetJmpLongJmp = false; IntDivIsCheap = false; Pow2DivIsCheap = false; + SchedPreferenceInfo = SchedulingForLatency; } TargetLowering::~TargetLowering() {} From evan.cheng at apple.com Wed Jan 25 12:52:56 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 25 Jan 2006 12:52:56 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/IA64/IA64ISelLowering.cpp Message-ID: <200601251852.MAA05986@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/IA64: IA64ISelLowering.cpp updated: 1.27 -> 1.28 --- Log message: Set SchedulingForLatency to be the default scheduling preference for all. --- Diffs of the changes: (+0 -1) IA64ISelLowering.cpp | 1 - 1 files changed, 1 deletion(-) Index: llvm/lib/Target/IA64/IA64ISelLowering.cpp diff -u llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.27 llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.28 --- llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.27 Wed Jan 25 12:21:52 2006 +++ llvm/lib/Target/IA64/IA64ISelLowering.cpp Wed Jan 25 12:52:42 2006 @@ -100,7 +100,6 @@ setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand); setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i64, Expand); - setSchedulingPreference(SchedulingForLatency); setStackPointerRegisterToSaveRestore(IA64::r12); computeRegisterProperties(); From evan.cheng at apple.com Wed Jan 25 12:52:56 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 25 Jan 2006 12:52:56 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp Message-ID: <200601251852.MAA05994@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/SparcV8: SparcV8ISelDAGToDAG.cpp updated: 1.58 -> 1.59 --- Log message: Set SchedulingForLatency to be the default scheduling preference for all. --- Diffs of the changes: (+0 -1) SparcV8ISelDAGToDAG.cpp | 1 - 1 files changed, 1 deletion(-) Index: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp diff -u llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.58 llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.59 --- llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.58 Wed Jan 25 12:21:52 2006 +++ llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp Wed Jan 25 12:52:42 2006 @@ -167,7 +167,6 @@ setOperationAction(ISD::STACKRESTORE , MVT::Other, Expand); setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32, Expand); - setSchedulingPreference(SchedulingForLatency); setStackPointerRegisterToSaveRestore(V8::O6); computeRegisterProperties(); From evan.cheng at apple.com Wed Jan 25 12:52:56 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 25 Jan 2006 12:52:56 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelLowering.cpp Message-ID: <200601251852.MAA05988@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/PowerPC: PPCISelLowering.cpp updated: 1.70 -> 1.71 --- Log message: Set SchedulingForLatency to be the default scheduling preference for all. --- Diffs of the changes: (+0 -1) PPCISelLowering.cpp | 1 - 1 files changed, 1 deletion(-) Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.70 llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.71 --- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.70 Wed Jan 25 12:21:52 2006 +++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp Wed Jan 25 12:52:42 2006 @@ -150,7 +150,6 @@ } setSetCCResultContents(ZeroOrOneSetCCResult); - setSchedulingPreference(SchedulingForLatency); setStackPointerRegisterToSaveRestore(PPC::R1); computeRegisterProperties(); From evan.cheng at apple.com Wed Jan 25 12:54:36 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 25 Jan 2006 12:54:36 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/ScheduleDAG.h Message-ID: <200601251854.MAA06024@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/CodeGen: ScheduleDAG.h updated: 1.5 -> 1.6 --- Log message: No need to keep track of top and bottom nodes in a group since the vector is already in order. Thanks Jim for pointing it out. --- Diffs of the changes: (+3 -5) ScheduleDAG.h | 8 +++----- 1 files changed, 3 insertions(+), 5 deletions(-) Index: llvm/include/llvm/CodeGen/ScheduleDAG.h diff -u llvm/include/llvm/CodeGen/ScheduleDAG.h:1.5 llvm/include/llvm/CodeGen/ScheduleDAG.h:1.6 --- llvm/include/llvm/CodeGen/ScheduleDAG.h:1.5 Wed Jan 25 03:07:50 2006 +++ llvm/include/llvm/CodeGen/ScheduleDAG.h Wed Jan 25 12:54:24 2006 @@ -52,8 +52,6 @@ class NodeGroup { private: NIVector Members; // Group member nodes - NodeInfo *Top; - NodeInfo *Bottom; NodeInfo *Dominator; // Node with highest latency unsigned Latency; // Total latency of the group int Pending; // Number of visits pending before @@ -61,12 +59,12 @@ public: // Ctor. - NodeGroup() : Top(NULL), Bottom(NULL), Dominator(NULL), Pending(0) {} + NodeGroup() : Dominator(NULL), Pending(0) {} // Accessors inline void setDominator(NodeInfo *D) { Dominator = D; } - inline NodeInfo *getTop() { return Top; } - inline NodeInfo *getBottom() { return Bottom; } + inline NodeInfo *getTop() { return Members[0]; } + inline NodeInfo *getBottom() { return Members[Members.size()-1]; } inline NodeInfo *getDominator() { return Dominator; } inline void setLatency(unsigned L) { Latency = L; } inline unsigned getLatency() { return Latency; } From evan.cheng at apple.com Wed Jan 25 12:54:36 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 25 Jan 2006 12:54:36 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp Message-ID: <200601251854.MAA06028@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/SelectionDAG: ScheduleDAG.cpp updated: 1.58 -> 1.59 --- Log message: No need to keep track of top and bottom nodes in a group since the vector is already in order. Thanks Jim for pointing it out. --- Diffs of the changes: (+0 -5) ScheduleDAG.cpp | 5 ----- 1 files changed, 5 deletions(-) Index: llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp diff -u llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.58 llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.59 --- llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.58 Wed Jan 25 03:13:41 2006 +++ llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp Wed Jan 25 12:54:24 2006 @@ -464,7 +464,6 @@ // Merge the two lists DGroup->group_insert(DGroup->group_end(), UGroup->group_begin(), UGroup->group_end()); - DGroup->Bottom = UGroup->Bottom; } else if (DGroup) { // Make user member of definers group U->Group = DGroup; @@ -477,7 +476,6 @@ DGroup->addPending(-CountInternalUses(DNI, U)); } DGroup->group_push_back(U); - DGroup->Bottom = U; } else if (UGroup) { // Make definer member of users group D->Group = UGroup; @@ -490,14 +488,11 @@ UGroup->addPending(-CountInternalUses(D, UNI)); } UGroup->group_insert(UGroup->group_begin(), D); - UGroup->Top = D; } else { D->Group = U->Group = DGroup = new NodeGroup(); DGroup->addPending(D->Node->use_size() + U->Node->use_size() - CountInternalUses(D, U)); DGroup->group_push_back(D); DGroup->group_push_back(U); - DGroup->Top = D; - DGroup->Bottom = U; } } From lattner at cs.uiuc.edu Wed Jan 25 12:55:31 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Wed, 25 Jan 2006 12:55:31 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/InlineAsm.h Message-ID: <200601251855.MAA06097@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm: InlineAsm.h updated: 1.2 -> 1.3 --- Log message: Change inline asms to be uniqued like constants, not embedded in a Module. --- Diffs of the changes: (+12 -33) InlineAsm.h | 45 ++++++++++++--------------------------------- 1 files changed, 12 insertions(+), 33 deletions(-) Index: llvm/include/llvm/InlineAsm.h diff -u llvm/include/llvm/InlineAsm.h:1.2 llvm/include/llvm/InlineAsm.h:1.3 --- llvm/include/llvm/InlineAsm.h:1.2 Mon Jan 23 22:41:48 2006 +++ llvm/include/llvm/InlineAsm.h Wed Jan 25 12:55:19 2006 @@ -8,7 +8,8 @@ //===----------------------------------------------------------------------===// // // This class represents the inline asm strings, which are Value*'s that are -// used as the callee operand of call instructions. +// used as the callee operand of call instructions. InlineAsm's are uniqued +// like constants, and created via InlineAsm::get(...). // //===----------------------------------------------------------------------===// @@ -23,35 +24,24 @@ class PointerType; class FunctionType; class Module; -template struct ilist_traits; -template class SymbolTableListTraits; class InlineAsm : public Value { - friend class SymbolTableListTraits >; InlineAsm(const InlineAsm &); // do not implement void operator=(const InlineAsm&); // do not implement - void setParent(Module *Parent); - InlineAsm *Prev, *Next; - void setNext(InlineAsm *N) { Next = N; } - void setPrev(InlineAsm *N) { Prev = N; } - InlineAsm *getNext() { return Next; } - const InlineAsm *getNext() const { return Next; } - InlineAsm *getPrev() { return Prev; } - const InlineAsm *getPrev() const { return Prev; } - - Module *Parent; std::string AsmString, Constraints; - bool AsmHasSideEffects; -public: + bool HasSideEffects; + InlineAsm(const FunctionType *Ty, const std::string &AsmString, - const std::string &Constraints, bool hasSideEffects, - const std::string &Name = "", Module *ParentModule = 0); + const std::string &Constraints, bool hasSideEffects); +public: + + /// InlineAsm::get - Return the the specified uniqued inline asm string. + /// + static InlineAsm *get(const FunctionType *Ty, const std::string &AsmString, + const std::string &Constraints, bool hasSideEffects); - bool getHasSideEffects() const { return AsmHasSideEffects; } - void setSideEffects(bool X) { AsmHasSideEffects = X; } + bool hasSideEffects() const { return HasSideEffects; } /// getType - InlineAsm's are always pointers. /// @@ -63,17 +53,6 @@ /// const FunctionType *getFunctionType() const; - /// getParent - Get the module that this global value is contained inside - /// of... - Module *getParent() { return Parent; } - const Module *getParent() const { return Parent; } - - - /// removeFromParent/eraseFromParent - Unlink and unlink/delete this object - /// from the module it is embedded into. - void removeFromParent(); - void eraseFromParent(); - virtual void print(std::ostream &O) const { print(O, 0); } void print(std::ostream &OS, AssemblyAnnotationWriter *AAW) const; From lattner at cs.uiuc.edu Wed Jan 25 12:55:49 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Wed, 25 Jan 2006 12:55:49 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/Module.h Message-ID: <200601251855.MAA06132@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm: Module.h updated: 1.68 -> 1.69 --- Log message: Change inline asms to be uniqued like constants, not embedded in a Module. --- Diffs of the changes: (+0 -31) Module.h | 31 ------------------------------- 1 files changed, 31 deletions(-) Index: llvm/include/llvm/Module.h diff -u llvm/include/llvm/Module.h:1.68 llvm/include/llvm/Module.h:1.69 --- llvm/include/llvm/Module.h:1.68 Mon Jan 23 22:12:40 2006 +++ llvm/include/llvm/Module.h Wed Jan 25 12:55:37 2006 @@ -21,7 +21,6 @@ #include "llvm/Function.h" #include "llvm/GlobalVariable.h" -#include "llvm/InlineAsm.h" #include "llvm/ADT/SetVector.h" #include "llvm/Support/DataTypes.h" @@ -46,19 +45,11 @@ static void destroySentinel(GlobalVariable *GV) { delete GV; } static iplist &getList(Module *M); }; -template<> struct ilist_traits -: public SymbolTableListTraits { - // createSentinel is used to create a node that marks the end of the list. - static InlineAsm *createSentinel(); - static void destroySentinel(InlineAsm *GV) { delete GV; } - static iplist &getList(Module *M); -}; class Module { public: typedef iplist GlobalListType; typedef iplist FunctionListType; - typedef iplist InlineAsmListType; typedef SetVector LibraryListType; // Global Variable iterators. @@ -69,10 +60,6 @@ typedef FunctionListType::iterator iterator; typedef FunctionListType::const_iterator const_iterator; - // Inline Asm iterators. - typedef InlineAsmListType::iterator inlineasm_iterator; - typedef InlineAsmListType::const_iterator const_inlineasm_iterator; - // Library list iterators. typedef LibraryListType::const_iterator lib_iterator; @@ -82,7 +69,6 @@ private: GlobalListType GlobalList; // The Global Variables in the module FunctionListType FunctionList; // The Functions in the module - InlineAsmListType InlineAsmList; // The inline asm objects in the module. LibraryListType LibraryList; // The Libraries needed by the module std::string GlobalScopeAsm; // Inline Asm at global scope. SymbolTable *SymTab; // Symbol Table for the module @@ -193,8 +179,6 @@ GlobalListType &getGlobalList() { return GlobalList; } const FunctionListType &getFunctionList() const { return FunctionList; } FunctionListType &getFunctionList() { return FunctionList; } - const InlineAsmListType &getInlineAsmList() const { return InlineAsmList; } - InlineAsmListType &getInlineAsmList() { return InlineAsmList; } /// getSymbolTable() - Get access to the symbol table for the module, where /// global variables and functions are identified. @@ -222,21 +206,6 @@ size_t size() const { return FunctionList.size(); } bool empty() const { return FunctionList.empty(); } - // Inline Asm list interface - inlineasm_iterator inlineasm_begin() { - return InlineAsmList.begin(); - } - const_inlineasm_iterator inlineasm_begin() const { - return InlineAsmList.begin(); - } - inlineasm_iterator inlineasm_end() { - return InlineAsmList.end(); - } - const_inlineasm_iterator inlineasm_end() const { - return InlineAsmList.end(); - } - bool inlineasm_empty() const { return InlineAsmList.empty(); } - //===--------------------------------------------------------------------===// // List of dependent library access functions From lattner at cs.uiuc.edu Wed Jan 25 12:57:27 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Wed, 25 Jan 2006 12:57:27 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/TargetLowering.cpp Message-ID: <200601251857.MAA06273@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target: TargetLowering.cpp updated: 1.19 -> 1.20 --- Log message: initialize an instance var, apparently I forgot to commit this long ago --- Diffs of the changes: (+1 -0) TargetLowering.cpp | 1 + 1 files changed, 1 insertion(+) Index: llvm/lib/Target/TargetLowering.cpp diff -u llvm/lib/Target/TargetLowering.cpp:1.19 llvm/lib/Target/TargetLowering.cpp:1.20 --- llvm/lib/Target/TargetLowering.cpp:1.19 Wed Jan 25 12:52:42 2006 +++ llvm/lib/Target/TargetLowering.cpp Wed Jan 25 12:57:15 2006 @@ -32,6 +32,7 @@ UseUnderscoreSetJmpLongJmp = false; IntDivIsCheap = false; Pow2DivIsCheap = false; + StackPointerRegisterToSaveRestore = 0; SchedPreferenceInfo = SchedulingForLatency; } From lattner at cs.uiuc.edu Wed Jan 25 12:57:39 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Wed, 25 Jan 2006 12:57:39 -0600 Subject: [llvm-commits] CVS: llvm/lib/VMCore/AsmWriter.cpp InlineAsm.cpp Module.cpp Message-ID: <200601251857.MAA06290@zion.cs.uiuc.edu> Changes in directory llvm/lib/VMCore: AsmWriter.cpp updated: 1.189 -> 1.190 InlineAsm.cpp updated: 1.1 -> 1.2 Module.cpp updated: 1.63 -> 1.64 --- Log message: Change inline asms to be uniqued like constants, not embedded in a Module. --- Diffs of the changes: (+6 -43) AsmWriter.cpp | 4 +--- InlineAsm.cpp | 28 +++++----------------------- Module.cpp | 17 ----------------- 3 files changed, 6 insertions(+), 43 deletions(-) Index: llvm/lib/VMCore/AsmWriter.cpp diff -u llvm/lib/VMCore/AsmWriter.cpp:1.189 llvm/lib/VMCore/AsmWriter.cpp:1.190 --- llvm/lib/VMCore/AsmWriter.cpp:1.189 Mon Jan 23 22:13:11 2006 +++ llvm/lib/VMCore/AsmWriter.cpp Wed Jan 25 12:57:27 2006 @@ -21,6 +21,7 @@ #include "llvm/CallingConv.h" #include "llvm/Constants.h" #include "llvm/DerivedTypes.h" +#include "llvm/InlineAsm.h" #include "llvm/Instruction.h" #include "llvm/Instructions.h" #include "llvm/Module.h" @@ -1270,9 +1271,6 @@ } void InlineAsm::print(std::ostream &o, AssemblyAnnotationWriter *AAW) const { - SlotMachine SlotTable(getParent()); - AssemblyWriter W(o, SlotTable, getParent(), AAW); - assert(0 && "Inline asm printing unimplemented!"); //W.write(this); } Index: llvm/lib/VMCore/InlineAsm.cpp diff -u llvm/lib/VMCore/InlineAsm.cpp:1.1 llvm/lib/VMCore/InlineAsm.cpp:1.2 --- llvm/lib/VMCore/InlineAsm.cpp:1.1 Mon Jan 23 22:13:11 2006 +++ llvm/lib/VMCore/InlineAsm.cpp Wed Jan 25 12:57:27 2006 @@ -18,33 +18,15 @@ using namespace llvm; InlineAsm::InlineAsm(const FunctionType *Ty, const std::string &asmString, - const std::string &constraints, bool hasSideEffects, - const std::string &name, Module *ParentModule) - : Value(PointerType::get(Ty), Value::InlineAsmVal, name), - Parent(0), AsmString(asmString), Constraints(constraints), - AsmHasSideEffects(hasSideEffects) { + const std::string &constraints, bool hasSideEffects) + : Value(PointerType::get(Ty), Value::InlineAsmVal), AsmString(asmString), + Constraints(constraints), HasSideEffects(hasSideEffects) { LeakDetector::addGarbageObject(this); - if (ParentModule) - ParentModule->getInlineAsmList().push_back(this); + // FIXME: do various checks on the constraint string and type. + } const FunctionType *InlineAsm::getFunctionType() const { return cast(getType()->getElementType()); } - -void InlineAsm::setParent(Module *parent) { - if (getParent()) - LeakDetector::addGarbageObject(this); - Parent = parent; - if (getParent()) - LeakDetector::removeGarbageObject(this); -} - -void InlineAsm::removeFromParent() { - getParent()->getInlineAsmList().remove(this); -} - -void InlineAsm::eraseFromParent() { - getParent()->getInlineAsmList().erase(this); -} Index: llvm/lib/VMCore/Module.cpp diff -u llvm/lib/VMCore/Module.cpp:1.63 llvm/lib/VMCore/Module.cpp:1.64 --- llvm/lib/VMCore/Module.cpp:1.63 Mon Jan 23 22:13:11 2006 +++ llvm/lib/VMCore/Module.cpp Wed Jan 25 12:57:27 2006 @@ -44,30 +44,17 @@ return Ret; } -InlineAsm *ilist_traits::createSentinel() { - InlineAsm *Ret = new InlineAsm(FunctionType::get(Type::VoidTy, - std::vector(), false), "", "", - false); - // This should not be garbage monitored. - LeakDetector::removeGarbageObject(Ret); - return Ret; -} - iplist &ilist_traits::getList(Module *M) { return M->getFunctionList(); } iplist &ilist_traits::getList(Module *M) { return M->getGlobalList(); } -iplist &ilist_traits::getList(Module *M) { - return M->getInlineAsmList(); -} // Explicit instantiations of SymbolTableListTraits since some of the methods // are not in the public header file. template class SymbolTableListTraits; template class SymbolTableListTraits; -template class SymbolTableListTraits; //===----------------------------------------------------------------------===// // Primitive Module methods. @@ -79,8 +66,6 @@ FunctionList.setParent(this); GlobalList.setItemParent(this); GlobalList.setParent(this); - InlineAsmList.setItemParent(this); - InlineAsmList.setParent(this); SymTab = new SymbolTable(); } @@ -90,8 +75,6 @@ GlobalList.setParent(0); FunctionList.clear(); FunctionList.setParent(0); - InlineAsmList.clear(); - InlineAsmList.setParent(0); LibraryList.clear(); delete SymTab; } From lattner at cs.uiuc.edu Wed Jan 25 12:58:08 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Wed, 25 Jan 2006 12:58:08 -0600 Subject: [llvm-commits] CVS: llvm-test/External/SPEC/CINT2000/252.eon/Makefile Message-ID: <200601251858.MAA06357@zion.cs.uiuc.edu> Changes in directory llvm-test/External/SPEC/CINT2000/252.eon: Makefile updated: 1.12 -> 1.13 --- Log message: eon doesn't need exceptions --- Diffs of the changes: (+2 -0) Makefile | 2 ++ 1 files changed, 2 insertions(+) Index: llvm-test/External/SPEC/CINT2000/252.eon/Makefile diff -u llvm-test/External/SPEC/CINT2000/252.eon/Makefile:1.12 llvm-test/External/SPEC/CINT2000/252.eon/Makefile:1.13 --- llvm-test/External/SPEC/CINT2000/252.eon/Makefile:1.12 Tue Aug 2 14:09:44 2005 +++ llvm-test/External/SPEC/CINT2000/252.eon/Makefile Wed Jan 25 12:57:56 2006 @@ -9,6 +9,8 @@ include $(LEVEL)/Makefile.config +CFLAGS += -fno-exceptions + ifeq ($(ARCH),PowerPC) CPPFLAGS += -DFMAX_IS_DOUBLE endif From lattner at cs.uiuc.edu Wed Jan 25 13:58:38 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Wed, 25 Jan 2006 13:58:38 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/InlineAsm.h Message-ID: <200601251958.NAA06688@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm: InlineAsm.h updated: 1.3 -> 1.4 --- Log message: add some useful accessors :) --- Diffs of the changes: (+3 -0) InlineAsm.h | 3 +++ 1 files changed, 3 insertions(+) Index: llvm/include/llvm/InlineAsm.h diff -u llvm/include/llvm/InlineAsm.h:1.3 llvm/include/llvm/InlineAsm.h:1.4 --- llvm/include/llvm/InlineAsm.h:1.3 Wed Jan 25 12:55:19 2006 +++ llvm/include/llvm/InlineAsm.h Wed Jan 25 13:58:26 2006 @@ -52,6 +52,9 @@ /// getFunctionType - InlineAsm's are always pointers to functions. /// const FunctionType *getFunctionType() const; + + const std::string &getAsmString() const { return AsmString; } + const std::string &getConstraintString() const { return Constraints; } virtual void print(std::ostream &O) const { print(O, 0); } void print(std::ostream &OS, AssemblyAnnotationWriter *AAW) const; From reid at x10sys.com Wed Jan 25 15:49:25 2006 From: reid at x10sys.com (Reid Spencer) Date: Wed, 25 Jan 2006 15:49:25 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp Message-ID: <200601252149.PAA07235@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/SelectionDAG: ScheduleDAGList.cpp updated: 1.3 -> 1.4 --- Log message: Don't break the optimized build (by incorrect placement of #endif) --- Diffs of the changes: (+1 -1) ScheduleDAGList.cpp | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp diff -u llvm/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp:1.3 llvm/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp:1.4 --- llvm/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp:1.3 Wed Jan 25 11:17:49 2006 +++ llvm/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp Wed Jan 25 15:49:13 2006 @@ -270,8 +270,8 @@ std::cerr << " has not been scheduled!\n"; assert(0); } -#endif } +#endif // Reverse the order if it is bottom up. From alenhar2 at cs.uiuc.edu Wed Jan 25 15:54:50 2006 From: alenhar2 at cs.uiuc.edu (Andrew Lenharth) Date: Wed, 25 Jan 2006 15:54:50 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaISelLowering.cpp Message-ID: <200601252154.PAA07311@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/Alpha: AlphaISelLowering.cpp updated: 1.29 -> 1.30 --- Log message: make things compile again --- Diffs of the changes: (+4 -0) AlphaISelLowering.cpp | 4 ++++ 1 files changed, 4 insertions(+) Index: llvm/lib/Target/Alpha/AlphaISelLowering.cpp diff -u llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.29 llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.30 --- llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.29 Wed Jan 25 12:21:52 2006 +++ llvm/lib/Target/Alpha/AlphaISelLowering.cpp Wed Jan 25 15:54:38 2006 @@ -137,6 +137,10 @@ setOperationAction(ISD::ConstantPool, MVT::i64, Custom); setOperationAction(ISD::ExternalSymbol, MVT::i64, Custom); + setOperationAction(ISD::VASTART, MVT::Other, Custom); + setOperationAction(ISD::VAEND, MVT::Other, Custom); + setOperationAction(ISD::VACOPY, MVT::Other, Custom); + setStackPointerRegisterToSaveRestore(Alpha::R30); addLegalFPImmediate(+0.0); //F31 From alenhar2 at cs.uiuc.edu Wed Jan 25 16:07:48 2006 From: alenhar2 at cs.uiuc.edu (Andrew Lenharth) Date: Wed, 25 Jan 2006 16:07:48 -0600 Subject: [llvm-commits] CVS: llvm-poolalloc/lib/PoolAllocate/AccessTrace.cpp PointerCompress.cpp PoolAllocate.cpp PoolOptimize.cpp TransformFunctionBody.cpp Message-ID: <200601252207.QAA07509@zion.cs.uiuc.edu> Changes in directory llvm-poolalloc/lib/PoolAllocate: AccessTrace.cpp updated: 1.3 -> 1.4 PointerCompress.cpp updated: 1.64 -> 1.65 PoolAllocate.cpp updated: 1.122 -> 1.123 PoolOptimize.cpp updated: 1.5 -> 1.6 TransformFunctionBody.cpp updated: 1.49 -> 1.50 --- Log message: silence some gcc warnings --- Diffs of the changes: (+29 -26) AccessTrace.cpp | 4 ++-- PointerCompress.cpp | 8 ++++---- PoolAllocate.cpp | 17 +++++++++-------- PoolOptimize.cpp | 24 +++++++++++++----------- TransformFunctionBody.cpp | 2 +- 5 files changed, 29 insertions(+), 26 deletions(-) Index: llvm-poolalloc/lib/PoolAllocate/AccessTrace.cpp diff -u llvm-poolalloc/lib/PoolAllocate/AccessTrace.cpp:1.3 llvm-poolalloc/lib/PoolAllocate/AccessTrace.cpp:1.4 --- llvm-poolalloc/lib/PoolAllocate/AccessTrace.cpp:1.3 Wed May 18 14:56:28 2005 +++ llvm-poolalloc/lib/PoolAllocate/AccessTrace.cpp Wed Jan 25 16:07:36 2006 @@ -61,9 +61,9 @@ VoidPtrTy = PointerType::get(Type::SByteTy); AccessTraceInitFn = M.getOrInsertFunction("poolaccesstraceinit", - Type::VoidTy,0); + Type::VoidTy,NULL); PoolAccessTraceFn = M.getOrInsertFunction("poolaccesstrace", Type::VoidTy, - VoidPtrTy, VoidPtrTy, 0); + VoidPtrTy, VoidPtrTy, NULL); } void PoolAccessTrace::InstrumentAccess(Instruction *I, Value *Ptr, Index: llvm-poolalloc/lib/PoolAllocate/PointerCompress.cpp diff -u llvm-poolalloc/lib/PoolAllocate/PointerCompress.cpp:1.64 llvm-poolalloc/lib/PoolAllocate/PointerCompress.cpp:1.65 --- llvm-poolalloc/lib/PoolAllocate/PointerCompress.cpp:1.64 Tue Jan 24 14:41:19 2006 +++ llvm-poolalloc/lib/PoolAllocate/PointerCompress.cpp Wed Jan 25 16:07:36 2006 @@ -899,7 +899,7 @@ const DSGraph *CG = 0; Function *Callee = CI.getCalledFunction(); if (Callee) - if (FI = PtrComp.getPoolAlloc()->getFuncInfoOrClone(*Callee)) + if ((FI = PtrComp.getPoolAlloc()->getFuncInfoOrClone(*Callee))) CG = &PtrComp.getGraphForFunc(FI); if (!Callee) { @@ -1415,11 +1415,11 @@ const Type *PoolDescPtrTy = PointerType::get(ArrayType::get(VoidPtrTy, 16)); PoolInitPC = M.getOrInsertFunction("poolinit_pc", VoidPtrTy, PoolDescPtrTy, - Type::UIntTy, Type::UIntTy, 0); + Type::UIntTy, Type::UIntTy, NULL); PoolDestroyPC = M.getOrInsertFunction("pooldestroy_pc", Type::VoidTy, - PoolDescPtrTy, 0); + PoolDescPtrTy, NULL); PoolAllocPC = M.getOrInsertFunction("poolalloc_pc", SCALARUINTTYPE, - PoolDescPtrTy, Type::UIntTy, 0); + PoolDescPtrTy, Type::UIntTy, NULL); // FIXME: Need bumppointer versions as well as realloc??/memalign?? } Index: llvm-poolalloc/lib/PoolAllocate/PoolAllocate.cpp diff -u llvm-poolalloc/lib/PoolAllocate/PoolAllocate.cpp:1.122 llvm-poolalloc/lib/PoolAllocate/PoolAllocate.cpp:1.123 --- llvm-poolalloc/lib/PoolAllocate/PoolAllocate.cpp:1.122 Tue Jan 24 14:41:19 2006 +++ llvm-poolalloc/lib/PoolAllocate/PoolAllocate.cpp Wed Jan 25 16:07:36 2006 @@ -182,37 +182,38 @@ // Get poolinit function. PoolInit = CurModule->getOrInsertFunction("poolinit", Type::VoidTy, PoolDescPtrTy, Type::UIntTy, - Type::UIntTy, 0); + Type::UIntTy, NULL); // Get pooldestroy function. PoolDestroy = CurModule->getOrInsertFunction("pooldestroy", Type::VoidTy, - PoolDescPtrTy, 0); + PoolDescPtrTy, NULL); // The poolalloc function. PoolAlloc = CurModule->getOrInsertFunction("poolalloc", VoidPtrTy, PoolDescPtrTy, - Type::UIntTy, 0); + Type::UIntTy, NULL); // The poolrealloc function. PoolRealloc = CurModule->getOrInsertFunction("poolrealloc", VoidPtrTy, PoolDescPtrTy, - VoidPtrTy, Type::UIntTy, 0); + VoidPtrTy, Type::UIntTy, NULL); // The poolmemalign function. PoolMemAlign = CurModule->getOrInsertFunction("poolmemalign", VoidPtrTy, PoolDescPtrTy, - Type::UIntTy, Type::UIntTy, 0); + Type::UIntTy, Type::UIntTy, + NULL); // Get the poolfree function. PoolFree = CurModule->getOrInsertFunction("poolfree", Type::VoidTy, - PoolDescPtrTy, VoidPtrTy, 0); + PoolDescPtrTy, VoidPtrTy, NULL); #ifdef SAFECODE //Get the poolregister function PoolRegister = CurModule->getOrInsertFunction("poolregister", Type::VoidTy, - PoolDescPtrTy, Type::UIntTy, VoidPtrTy, 0); + PoolDescPtrTy, Type::UIntTy, VoidPtrTy, NULL); #endif #ifdef BOUNDS_CHECK PoolRegister = CurModule->getOrInsertFunction("poolregister", Type::VoidTy, - PoolDescPtrTy, VoidPtrTy, Type::UIntTy, 0); + PoolDescPtrTy, VoidPtrTy, Type::UIntTy, NULL); #endif } Index: llvm-poolalloc/lib/PoolAllocate/PoolOptimize.cpp diff -u llvm-poolalloc/lib/PoolAllocate/PoolOptimize.cpp:1.5 llvm-poolalloc/lib/PoolAllocate/PoolOptimize.cpp:1.6 --- llvm-poolalloc/lib/PoolAllocate/PoolOptimize.cpp:1.5 Wed May 18 14:56:28 2005 +++ llvm-poolalloc/lib/PoolAllocate/PoolOptimize.cpp Wed Jan 25 16:07:36 2006 @@ -44,50 +44,52 @@ // Get poolinit function. Function *PoolInit = M.getOrInsertFunction("poolinit", Type::VoidTy, PoolDescPtrTy, Type::UIntTy, - Type::UIntTy, 0); + Type::UIntTy, NULL); // Get pooldestroy function. Function *PoolDestroy = M.getOrInsertFunction("pooldestroy", Type::VoidTy, - PoolDescPtrTy, 0); + PoolDescPtrTy, NULL); // The poolalloc function. Function *PoolAlloc = M.getOrInsertFunction("poolalloc", VoidPtrTy, PoolDescPtrTy, - Type::UIntTy, 0); + Type::UIntTy, NULL); // The poolrealloc function. Function *PoolRealloc = M.getOrInsertFunction("poolrealloc", VoidPtrTy, PoolDescPtrTy, - VoidPtrTy, Type::UIntTy, 0); + VoidPtrTy, Type::UIntTy, NULL); // The poolmemalign function. Function *PoolMemAlign = M.getOrInsertFunction("poolmemalign", VoidPtrTy, PoolDescPtrTy, - Type::UIntTy, Type::UIntTy, 0); + Type::UIntTy, Type::UIntTy, + NULL); // Get the poolfree function. Function *PoolFree = M.getOrInsertFunction("poolfree", Type::VoidTy, - PoolDescPtrTy, VoidPtrTy, 0); + PoolDescPtrTy, VoidPtrTy, NULL); // Get poolinit_bp function. Function *PoolInitBP = M.getOrInsertFunction("poolinit_bp", Type::VoidTy, - PoolDescPtrTy, Type::UIntTy, 0); + PoolDescPtrTy, Type::UIntTy, + NULL); // Get pooldestroy_bp function. Function *PoolDestroyBP = M.getOrInsertFunction("pooldestroy_bp",Type::VoidTy, - PoolDescPtrTy, 0); + PoolDescPtrTy, NULL); // The poolalloc_bp function. Function *PoolAllocBP = M.getOrInsertFunction("poolalloc_bp", VoidPtrTy, PoolDescPtrTy, - Type::UIntTy, 0); + Type::UIntTy, NULL); Function *Realloc = M.getOrInsertFunction("realloc", VoidPtrTy, VoidPtrTy, Type::UIntTy, - 0); + NULL); Function *MemAlign = M.getOrInsertFunction("memalign", VoidPtrTy, Type::UIntTy, - Type::UIntTy, 0); + Type::UIntTy, NULL); // Optimize poolreallocs Index: llvm-poolalloc/lib/PoolAllocate/TransformFunctionBody.cpp diff -u llvm-poolalloc/lib/PoolAllocate/TransformFunctionBody.cpp:1.49 llvm-poolalloc/lib/PoolAllocate/TransformFunctionBody.cpp:1.50 --- llvm-poolalloc/lib/PoolAllocate/TransformFunctionBody.cpp:1.49 Thu Dec 22 11:49:34 2005 +++ llvm-poolalloc/lib/PoolAllocate/TransformFunctionBody.cpp Wed Jan 25 16:07:36 2006 @@ -315,7 +315,7 @@ Type::VoidTy, PointerType::get(Type::SByteTy), Type::UByteTy, Type::UIntTy, - Type::UIntTy, 0); + Type::UIntTy, NULL); if (Ptr->getType() != PointerType::get(Type::SByteTy)) Ptr = new CastInst(Ptr, PointerType::get(Type::SByteTy), Ptr->getName(), From lattner at cs.uiuc.edu Wed Jan 25 16:10:48 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Wed, 25 Jan 2006 16:10:48 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/InlineAsm.h Message-ID: <200601252210.QAA07587@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm: InlineAsm.h updated: 1.4 -> 1.5 --- Log message: add another method --- Diffs of the changes: (+7 -0) InlineAsm.h | 7 +++++++ 1 files changed, 7 insertions(+) Index: llvm/include/llvm/InlineAsm.h diff -u llvm/include/llvm/InlineAsm.h:1.4 llvm/include/llvm/InlineAsm.h:1.5 --- llvm/include/llvm/InlineAsm.h:1.4 Wed Jan 25 13:58:26 2006 +++ llvm/include/llvm/InlineAsm.h Wed Jan 25 16:10:35 2006 @@ -59,6 +59,13 @@ virtual void print(std::ostream &O) const { print(O, 0); } void print(std::ostream &OS, AssemblyAnnotationWriter *AAW) const; + /// Verify - This static method can be used by the parser to check to see if + /// the specified constraint string is legal for the type. This returns true + /// if legal, false if not. + /// + static bool Verify(const FunctionType *Ty, const std::string &Constraints); + + // Methods for support type inquiry through isa, cast, and dyn_cast: static inline bool classof(const InlineAsm *) { return true; } static inline bool classof(const Value *V) { From lattner at cs.uiuc.edu Wed Jan 25 16:26:17 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Wed, 25 Jan 2006 16:26:17 -0600 Subject: [llvm-commits] CVS: llvm/lib/VMCore/AsmWriter.cpp InlineAsm.cpp Message-ID: <200601252226.QAA07743@zion.cs.uiuc.edu> Changes in directory llvm/lib/VMCore: AsmWriter.cpp updated: 1.190 -> 1.191 InlineAsm.cpp updated: 1.2 -> 1.3 --- Log message: Print InlineAsm objects --- Diffs of the changes: (+27 -9) AsmWriter.cpp | 16 ++++++++++++---- InlineAsm.cpp | 20 +++++++++++++++----- 2 files changed, 27 insertions(+), 9 deletions(-) Index: llvm/lib/VMCore/AsmWriter.cpp diff -u llvm/lib/VMCore/AsmWriter.cpp:1.190 llvm/lib/VMCore/AsmWriter.cpp:1.191 --- llvm/lib/VMCore/AsmWriter.cpp:1.190 Wed Jan 25 12:57:27 2006 +++ llvm/lib/VMCore/AsmWriter.cpp Wed Jan 25 16:26:05 2006 @@ -556,9 +556,18 @@ Out << getLLVMName(V->getName()); else { const Constant *CV = dyn_cast(V); - if (CV && !isa(CV)) + if (CV && !isa(CV)) { WriteConstantInt(Out, CV, PrintName, TypeTable, Machine); - else { + } else if (const InlineAsm *IA = dyn_cast(V)) { + Out << "asm "; + if (IA->hasSideEffects()) + Out << "sideeffect "; + Out << '"'; + PrintEscapedString(IA->getAsmString(), Out); + Out << "\", \""; + PrintEscapedString(IA->getConstraintString(), Out); + Out << '"'; + } else { int Slot; if (Machine) { Slot = Machine->getSlot(V); @@ -1271,8 +1280,7 @@ } void InlineAsm::print(std::ostream &o, AssemblyAnnotationWriter *AAW) const { - assert(0 && "Inline asm printing unimplemented!"); - //W.write(this); + WriteAsOperand(o, this, true, true, 0); } void BasicBlock::print(std::ostream &o, AssemblyAnnotationWriter *AAW) const { Index: llvm/lib/VMCore/InlineAsm.cpp diff -u llvm/lib/VMCore/InlineAsm.cpp:1.2 llvm/lib/VMCore/InlineAsm.cpp:1.3 --- llvm/lib/VMCore/InlineAsm.cpp:1.2 Wed Jan 25 12:57:27 2006 +++ llvm/lib/VMCore/InlineAsm.cpp Wed Jan 25 16:26:05 2006 @@ -13,20 +13,30 @@ #include "llvm/InlineAsm.h" #include "llvm/DerivedTypes.h" -#include "llvm/Module.h" -#include "llvm/Support/LeakDetector.h" using namespace llvm; +// NOTE: when memoizing the function type, we have to be careful to handle the +// case when the type gets refined. + +InlineAsm *InlineAsm::get(const FunctionType *Ty, const std::string &AsmString, + const std::string &Constraints, bool hasSideEffects) { + // FIXME: memoize! + return new InlineAsm(Ty, AsmString, Constraints, hasSideEffects); +} + InlineAsm::InlineAsm(const FunctionType *Ty, const std::string &asmString, const std::string &constraints, bool hasSideEffects) : Value(PointerType::get(Ty), Value::InlineAsmVal), AsmString(asmString), Constraints(constraints), HasSideEffects(hasSideEffects) { - LeakDetector::addGarbageObject(this); - // FIXME: do various checks on the constraint string and type. - + // Do various checks on the constraint string and type. + assert(Verify(Ty, constraints) && "Function type not legal for constraints!"); } const FunctionType *InlineAsm::getFunctionType() const { return cast(getType()->getElementType()); } + +bool InlineAsm::Verify(const FunctionType *Ty, const std::string &Constraints) { + return true; +} From lattner at cs.uiuc.edu Wed Jan 25 16:26:54 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Wed, 25 Jan 2006 16:26:54 -0600 Subject: [llvm-commits] CVS: llvm/lib/AsmParser/Lexer.l llvmAsmParser.y ParserInternals.h Message-ID: <200601252226.QAA07808@zion.cs.uiuc.edu> Changes in directory llvm/lib/AsmParser: Lexer.l updated: 1.70 -> 1.71 llvmAsmParser.y updated: 1.248 -> 1.249 ParserInternals.h updated: 1.42 -> 1.43 --- Log message: Parse inline asm objects --- Diffs of the changes: (+56 -3) Lexer.l | 1 + ParserInternals.h | 27 +++++++++++++++++++++++++-- llvmAsmParser.y | 31 ++++++++++++++++++++++++++++++- 3 files changed, 56 insertions(+), 3 deletions(-) Index: llvm/lib/AsmParser/Lexer.l diff -u llvm/lib/AsmParser/Lexer.l:1.70 llvm/lib/AsmParser/Lexer.l:1.71 --- llvm/lib/AsmParser/Lexer.l:1.70 Mon Jan 23 18:40:17 2006 +++ llvm/lib/AsmParser/Lexer.l Wed Jan 25 16:26:43 2006 @@ -214,6 +214,7 @@ section { return SECTION; } module { return MODULE; } asm { return ASM_TOK; } +sideeffect { return SIDEEFFECT; } cc { return CC_TOK; } ccc { return CCC_TOK; } Index: llvm/lib/AsmParser/llvmAsmParser.y diff -u llvm/lib/AsmParser/llvmAsmParser.y:1.248 llvm/lib/AsmParser/llvmAsmParser.y:1.249 --- llvm/lib/AsmParser/llvmAsmParser.y:1.248 Mon Jan 23 22:14:29 2006 +++ llvm/lib/AsmParser/llvmAsmParser.y Wed Jan 25 16:26:43 2006 @@ -14,6 +14,7 @@ %{ #include "ParserInternals.h" #include "llvm/CallingConv.h" +#include "llvm/InlineAsm.h" #include "llvm/Instructions.h" #include "llvm/Module.h" #include "llvm/SymbolTable.h" @@ -316,6 +317,17 @@ ThrowException("Constant expression type different from required type!"); return D.ConstantValue; + case ValID::InlineAsmVal: { // Inline asm expression + const PointerType *PTy = dyn_cast(Ty); + const FunctionType *FTy = + PTy ? dyn_cast(PTy->getElementType()) : 0; + if (!FTy || !InlineAsm::Verify(FTy, D.IAD->Constraints)) + ThrowException("Invalid type for asm constraint string!"); + InlineAsm *IA = InlineAsm::get(FTy, D.IAD->AsmString, D.IAD->Constraints, + D.IAD->HasSideEffects); + D.destroy(); // Free InlineAsmDescriptor. + return IA; + } default: assert(0 && "Unhandled case!"); return 0; @@ -932,6 +944,7 @@ %type GlobalType // GLOBAL or CONSTANT? %type OptVolatile // 'volatile' or not %type OptTailCall // TAIL CALL or plain CALL. +%type OptSideEffect // 'sideeffect' or not. %type OptLinkage %type BigOrLittle @@ -967,7 +980,7 @@ %token DECLARE GLOBAL CONSTANT SECTION VOLATILE %token TO DOTDOTDOT NULL_TOK UNDEF CONST INTERNAL LINKONCE WEAK APPENDING %token OPAQUE NOT EXTERNAL TARGET TRIPLE ENDIAN POINTERSIZE LITTLE BIG ALIGN -%token DEPLIBS CALL TAIL ASM_TOK MODULE +%token DEPLIBS CALL TAIL ASM_TOK MODULE SIDEEFFECT %token CC_TOK CCC_TOK FASTCC_TOK COLDCC_TOK %type OptCallingConv @@ -1831,6 +1844,13 @@ // Rules to match Basic Blocks //===----------------------------------------------------------------------===// +OptSideEffect : /* empty */ { + $$ = false; + } + | SIDEEFFECT { + $$ = true; + }; + ConstValueRef : ESINT64VAL { // A reference to a direct constant $$ = ValID::create($1); } @@ -1881,6 +1901,15 @@ } | ConstExpr { $$ = ValID::create($1); + } + | ASM_TOK OptSideEffect STRINGCONSTANT ',' STRINGCONSTANT { + char *End = UnEscapeLexed($3, true); + std::string AsmStr = std::string($3, End); + End = UnEscapeLexed($5, true); + std::string Constraints = std::string($5, End); + $$ = ValID::createInlineAsm(AsmStr, Constraints, $2); + free($3); + free($5); }; // SymbolicValueRef - Reference to one of two ways of symbolically refering to Index: llvm/lib/AsmParser/ParserInternals.h diff -u llvm/lib/AsmParser/ParserInternals.h:1.42 llvm/lib/AsmParser/ParserInternals.h:1.43 --- llvm/lib/AsmParser/ParserInternals.h:1.42 Wed Dec 21 11:53:02 2005 +++ llvm/lib/AsmParser/ParserInternals.h Wed Jan 25 16:26:43 2006 @@ -72,6 +72,17 @@ throw ParseException(CurFilename, message, LineNo); } +/// InlineAsmDescriptor - This is a simple class that holds info about inline +/// asm blocks, for use by ValID. +struct InlineAsmDescriptor { + std::string AsmString, Constraints; + bool HasSideEffects; + + InlineAsmDescriptor(const std::string &as, const std::string &c, bool HSE) + : AsmString(as), Constraints(c), HasSideEffects(HSE) {} +}; + + // ValID - Represents a reference of a definition of some sort. This may either // be a numeric reference or a symbolic (%var) reference. This is just a // discriminated union. @@ -82,7 +93,7 @@ struct ValID { enum { NumberVal, NameVal, ConstSIntVal, ConstUIntVal, ConstFPVal, ConstNullVal, - ConstUndefVal, ConstZeroVal, ConstantVal, + ConstUndefVal, ConstZeroVal, ConstantVal, InlineAsmVal } Type; union { @@ -92,6 +103,7 @@ uint64_t UConstPool64;// Unsigned constant pool reference. double ConstPoolFP; // Floating point constant pool reference Constant *ConstantValue; // Fully resolved constant for ConstantVal case. + InlineAsmDescriptor *IAD; }; static ValID create(int Num) { @@ -129,10 +141,21 @@ static ValID create(Constant *Val) { ValID D; D.Type = ConstantVal; D.ConstantValue = Val; return D; } + + static ValID createInlineAsm(const std::string &AsmString, + const std::string &Constraints, + bool HasSideEffects) { + ValID D; + D.Type = InlineAsmVal; + D.IAD = new InlineAsmDescriptor(AsmString, Constraints, HasSideEffects); + return D; + } inline void destroy() const { if (Type == NameVal) - free(Name); // Free this strdup'd memory... + free(Name); // Free this strdup'd memory. + else if (Type == InlineAsmVal) + delete IAD; } inline ValID copy() const { From lattner at cs.uiuc.edu Wed Jan 25 16:27:28 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Wed, 25 Jan 2006 16:27:28 -0600 Subject: [llvm-commits] CVS: llvm/lib/AsmParser/Lexer.cpp llvmAsmParser.cpp llvmAsmParser.h Message-ID: <200601252227.QAA07877@zion.cs.uiuc.edu> Changes in directory llvm/lib/AsmParser: Lexer.cpp updated: 1.17 -> 1.18 llvmAsmParser.cpp updated: 1.34 -> 1.35 llvmAsmParser.h updated: 1.18 -> 1.19 --- Log message: regenerate --- Diffs of the changes: (+1338 -1301) Lexer.cpp | 1064 +++++++++++++++++++-------------------- llvmAsmParser.cpp | 1469 +++++++++++++++++++++++++++--------------------------- llvmAsmParser.h | 81 +- 3 files changed, 1338 insertions(+), 1276 deletions(-) Index: llvm/lib/AsmParser/Lexer.cpp diff -u llvm/lib/AsmParser/Lexer.cpp:1.17 llvm/lib/AsmParser/Lexer.cpp:1.18 --- llvm/lib/AsmParser/Lexer.cpp:1.17 Mon Jan 23 22:14:29 2006 +++ llvm/lib/AsmParser/Lexer.cpp Wed Jan 25 16:27:16 2006 @@ -20,7 +20,7 @@ /* A lexical scanner generated by flex */ /* Scanner skeleton version: - * $Header: /var/cvs/llvm/llvm/lib/AsmParser/Lexer.cpp,v 1.17 2006/01/24 04:14:29 lattner Exp $ + * $Header: /var/cvs/llvm/llvm/lib/AsmParser/Lexer.cpp,v 1.18 2006/01/25 22:27:16 lattner Exp $ */ #define FLEX_SCANNER @@ -308,33 +308,33 @@ *yy_cp = '\0'; \ yy_c_buf_p = yy_cp; -#define YY_NUM_RULES 105 -#define YY_END_OF_BUFFER 106 -static yyconst short int yy_acclist[183] = +#define YY_NUM_RULES 106 +#define YY_END_OF_BUFFER 107 +static yyconst short int yy_acclist[184] = { 0, - 106, 104, 105, 103, 104, 105, 103, 105, 104, 105, - 104, 105, 104, 105, 104, 105, 104, 105, 104, 105, - 96, 104, 105, 96, 104, 105, 1, 104, 105, 104, - 105, 104, 105, 104, 105, 104, 105, 104, 105, 104, - 105, 104, 105, 104, 105, 104, 105, 104, 105, 104, - 105, 104, 105, 104, 105, 104, 105, 104, 105, 104, - 105, 104, 105, 104, 105, 104, 105, 104, 105, 104, - 105, 95, 93, 92, 92, 99, 97, 101, 96, 1, - 79, 36, 61, 20, 95, 92, 92, 100, 101, 17, - 101, 102, 55, 60, 35, 30, 37, 58, 3, 46, - - 57, 22, 69, 59, 78, 73, 74, 56, 62, 94, - 101, 101, 41, 70, 71, 86, 87, 48, 19, 98, - 23, 4, 53, 47, 40, 11, 101, 32, 2, 5, - 50, 52, 42, 64, 68, 66, 67, 65, 63, 44, - 88, 43, 49, 18, 76, 85, 39, 51, 27, 21, - 38, 7, 81, 29, 84, 34, 54, 72, 80, 24, - 25, 82, 45, 77, 75, 6, 26, 33, 8, 14, - 9, 10, 31, 12, 28, 83, 89, 91, 13, 90, - 15, 16 + 107, 105, 106, 104, 105, 106, 104, 106, 105, 106, + 105, 106, 105, 106, 105, 106, 105, 106, 105, 106, + 97, 105, 106, 97, 105, 106, 1, 105, 106, 105, + 106, 105, 106, 105, 106, 105, 106, 105, 106, 105, + 106, 105, 106, 105, 106, 105, 106, 105, 106, 105, + 106, 105, 106, 105, 106, 105, 106, 105, 106, 105, + 106, 105, 106, 105, 106, 105, 106, 105, 106, 105, + 106, 96, 94, 93, 93, 100, 98, 102, 97, 1, + 80, 37, 62, 20, 96, 93, 93, 101, 102, 17, + 102, 103, 56, 61, 35, 30, 38, 59, 3, 47, + + 58, 22, 70, 60, 79, 74, 75, 57, 63, 95, + 102, 102, 42, 71, 72, 87, 88, 49, 19, 99, + 23, 4, 54, 48, 41, 11, 102, 32, 2, 5, + 51, 53, 43, 65, 69, 67, 68, 66, 64, 45, + 89, 44, 50, 18, 77, 86, 40, 52, 27, 21, + 39, 7, 82, 29, 85, 34, 55, 73, 81, 24, + 25, 83, 46, 78, 76, 6, 26, 33, 8, 14, + 9, 10, 31, 12, 36, 28, 84, 90, 92, 13, + 91, 15, 16 } ; -static yyconst short int yy_accept[435] = +static yyconst short int yy_accept[444] = { 0, 1, 1, 1, 2, 4, 7, 9, 11, 13, 15, 17, 19, 21, 24, 27, 30, 32, 34, 36, 38, @@ -345,45 +345,46 @@ 82, 83, 83, 83, 83, 83, 83, 83, 83, 83, 83, 83, 83, 83, 83, 83, 83, 83, 83, 83, 83, 83, 83, 83, 84, 84, 84, 84, 84, 84, - 84, 84, 84, 84, 84, 84, 85, 85, 85, 85, + 84, 84, 84, 84, 84, 84, 84, 85, 85, 85, - 85, 85, 85, 85, 85, 85, 85, 85, 85, 86, - 87, 89, 90, 91, 92, 92, 93, 94, 94, 94, - 95, 95, 96, 96, 97, 97, 97, 97, 98, 98, - 98, 98, 98, 99, 99, 100, 100, 100, 100, 100, - 100, 100, 100, 100, 100, 100, 101, 101, 101, 101, - 101, 101, 101, 101, 101, 102, 103, 103, 103, 104, - 104, 105, 106, 106, 106, 106, 106, 106, 107, 107, - 108, 108, 109, 109, 109, 109, 109, 109, 109, 109, + 85, 85, 85, 85, 85, 85, 85, 85, 85, 85, + 86, 87, 89, 90, 91, 92, 92, 93, 94, 94, + 94, 95, 95, 96, 96, 97, 97, 97, 97, 98, + 98, 98, 98, 98, 99, 99, 100, 100, 100, 100, + 100, 100, 100, 100, 100, 100, 100, 101, 101, 101, + 101, 101, 101, 101, 101, 101, 102, 103, 103, 103, + 104, 104, 105, 106, 106, 106, 106, 106, 106, 107, + 107, 108, 108, 108, 109, 109, 109, 109, 109, 109, 109, 109, 109, 109, 109, 109, 109, 109, 109, 109, - 109, 109, 109, 110, 110, 111, 112, 112, 112, 112, + 109, 109, 109, 109, 109, 110, 110, 111, 112, 112, - 113, 113, 113, 113, 113, 114, 115, 116, 116, 116, + 112, 112, 113, 113, 113, 113, 113, 114, 115, 116, 116, 116, 116, 116, 116, 116, 116, 116, 116, 116, - 117, 117, 117, 117, 117, 117, 117, 117, 117, 117, - 118, 119, 119, 119, 120, 120, 120, 121, 121, 121, - 121, 121, 121, 121, 121, 121, 121, 121, 122, 122, - 122, 123, 124, 124, 125, 125, 125, 125, 125, 125, - 125, 125, 125, 125, 126, 126, 127, 127, 128, 129, - 129, 129, 130, 130, 130, 130, 130, 130, 130, 130, - 130, 130, 131, 131, 132, 132, 132, 132, 132, 132, - 132, 133, 133, 133, 133, 133, 133, 133, 134, 134, - - 134, 135, 136, 137, 138, 139, 140, 141, 142, 142, - 142, 142, 143, 144, 145, 145, 145, 145, 145, 145, - 146, 146, 146, 146, 147, 147, 148, 148, 148, 148, - 149, 150, 151, 151, 151, 152, 152, 153, 153, 153, - 153, 154, 154, 155, 156, 157, 158, 158, 158, 159, - 160, 161, 162, 162, 162, 163, 164, 165, 166, 166, - 166, 166, 166, 167, 168, 168, 168, 168, 168, 168, - 168, 168, 168, 169, 169, 169, 169, 169, 169, 170, - 171, 171, 171, 171, 171, 172, 173, 173, 173, 173, - 174, 174, 175, 175, 175, 175, 175, 175, 175, 175, + 116, 116, 117, 117, 117, 117, 117, 117, 117, 117, + 117, 117, 118, 119, 119, 119, 120, 120, 120, 121, + 121, 121, 121, 121, 121, 121, 121, 121, 121, 121, + 121, 122, 122, 122, 123, 124, 124, 125, 125, 125, + 125, 125, 125, 125, 125, 125, 125, 126, 126, 127, + 127, 128, 129, 129, 129, 130, 130, 130, 130, 130, + 130, 130, 130, 130, 130, 131, 131, 132, 132, 132, + 132, 132, 132, 132, 133, 133, 133, 133, 133, 133, + + 133, 134, 134, 134, 135, 136, 137, 138, 139, 140, + 141, 141, 142, 142, 142, 142, 143, 144, 145, 145, + 145, 145, 145, 145, 146, 146, 146, 146, 147, 147, + 148, 148, 148, 148, 149, 150, 151, 151, 151, 152, + 152, 153, 153, 153, 153, 154, 154, 155, 156, 157, + 158, 158, 158, 159, 159, 160, 161, 162, 162, 162, + 163, 164, 165, 166, 166, 166, 166, 166, 167, 168, + 168, 168, 168, 168, 168, 168, 168, 168, 169, 169, + 169, 169, 169, 169, 169, 170, 171, 171, 171, 171, + 171, 172, 173, 173, 173, 173, 173, 174, 174, 175, 175, 175, 175, 175, 175, 175, 175, 175, 175, 175, - 175, 175, 175, 176, 176, 177, 177, 177, 177, 177, - 177, 177, 177, 177, 178, 178, 179, 180, 180, 181, - 182, 182, 183, 183 + 175, 175, 175, 175, 176, 176, 176, 176, 176, 176, + 176, 176, 177, 177, 178, 178, 178, 178, 178, 178, + 178, 178, 178, 179, 179, 180, 181, 181, 182, 183, + 183, 184, 184 } ; static yyconst int yy_ec[256] = @@ -427,111 +428,113 @@ 3 } ; -static yyconst short int yy_base[439] = +static yyconst short int yy_base[448] = { 0, - 0, 0, 908, 909, 909, 909, 903, 894, 34, 36, + 0, 0, 926, 927, 927, 927, 921, 912, 34, 36, 38, 42, 46, 50, 0, 52, 57, 54, 68, 62, 80, 82, 76, 94, 98, 40, 83, 88, 56, 125, - 108, 154, 109, 87, 110, 111, 901, 909, 892, 909, - 0, 119, 134, 141, 144, 124, 147, 164, 179, 0, - 55, 153, 157, 155, 119, 159, 172, 173, 891, 175, - 192, 193, 194, 90, 180, 195, 198, 196, 202, 200, - 206, 207, 212, 214, 216, 215, 223, 219, 227, 226, - 224, 230, 243, 890, 233, 242, 244, 249, 130, 250, - 251, 252, 253, 258, 261, 889, 262, 264, 256, 263, - - 277, 279, 41, 285, 278, 294, 84, 288, 888, 0, - 298, 305, 887, 312, 324, 0, 886, 306, 298, 885, - 318, 884, 268, 883, 313, 325, 307, 882, 326, 329, - 331, 332, 881, 333, 335, 336, 341, 337, 338, 344, - 343, 354, 358, 342, 356, 360, 353, 366, 367, 355, - 368, 372, 370, 373, 880, 879, 374, 31, 878, 377, - 877, 876, 400, 388, 390, 382, 412, 875, 379, 874, - 380, 873, 392, 404, 384, 414, 387, 416, 417, 418, - 420, 422, 426, 430, 432, 424, 444, 434, 438, 428, - 446, 448, 872, 435, 909, 458, 470, 460, 472, 475, - - 460, 386, 463, 464, 871, 870, 869, 476, 478, 479, - 482, 485, 486, 487, 488, 489, 490, 496, 492, 868, - 493, 497, 498, 504, 505, 510, 512, 511, 513, 867, - 866, 514, 516, 865, 517, 519, 0, 521, 520, 536, - 518, 535, 537, 539, 522, 540, 547, 864, 550, 551, - 863, 862, 552, 861, 523, 553, 555, 557, 556, 564, - 565, 567, 569, 860, 570, 859, 571, 576, 858, 572, - 579, 857, 576, 589, 580, 582, 581, 591, 592, 595, - 597, 856, 598, 855, 600, 599, 602, 603, 606, 607, - 854, 610, 611, 617, 613, 619, 621, 853, 625, 629, - - 852, 851, 850, 849, 848, 847, 846, 845, 632, 631, - 633, 844, 843, 842, 634, 638, 639, 635, 637, 841, - 636, 640, 646, 840, 649, 839, 650, 651, 655, 838, - 837, 836, 656, 641, 835, 665, 834, 666, 669, 668, - 833, 672, 832, 831, 830, 829, 670, 671, 828, 827, - 826, 825, 674, 680, 824, 823, 822, 819, 682, 676, - 683, 684, 810, 808, 686, 685, 690, 693, 696, 698, - 695, 702, 807, 703, 709, 706, 705, 712, 806, 804, - 716, 717, 718, 720, 803, 802, 719, 721, 727, 801, - 722, 798, 730, 725, 737, 738, 726, 740, 743, 744, - - 745, 746, 747, 750, 751, 752, 757, 756, 763, 762, - 764, 767, 796, 769, 795, 773, 774, 768, 775, 776, - 779, 780, 782, 794, 783, 792, 454, 788, 452, 450, - 790, 301, 909, 823, 825, 263, 829, 226 + 108, 154, 109, 87, 110, 111, 919, 927, 910, 927, + 0, 119, 134, 142, 145, 124, 159, 166, 179, 0, + 55, 180, 147, 153, 119, 150, 183, 156, 909, 175, + 191, 192, 196, 90, 146, 200, 199, 201, 202, 204, + 205, 211, 212, 210, 218, 217, 221, 227, 236, 230, + 214, 239, 241, 908, 243, 247, 248, 225, 249, 250, + 251, 253, 258, 262, 267, 270, 907, 274, 259, 275, + + 279, 263, 284, 41, 285, 286, 288, 84, 294, 906, + 0, 308, 310, 905, 318, 330, 0, 904, 300, 304, + 903, 314, 902, 282, 901, 320, 324, 331, 900, 332, + 312, 333, 336, 899, 337, 342, 338, 341, 344, 345, + 352, 349, 356, 353, 346, 360, 363, 364, 367, 370, + 371, 373, 374, 375, 377, 898, 897, 378, 31, 896, + 379, 895, 894, 404, 392, 395, 380, 408, 893, 383, + 892, 388, 399, 891, 398, 416, 422, 386, 391, 426, + 424, 427, 428, 429, 432, 430, 440, 434, 436, 437, + 442, 446, 443, 455, 890, 444, 927, 458, 475, 461, + + 465, 477, 466, 472, 468, 478, 889, 888, 887, 480, + 481, 484, 486, 482, 488, 490, 491, 496, 494, 498, + 492, 886, 502, 506, 507, 500, 508, 510, 513, 514, + 518, 885, 884, 519, 520, 883, 522, 525, 0, 527, + 526, 523, 531, 534, 538, 540, 541, 544, 545, 552, + 882, 556, 555, 881, 880, 558, 879, 560, 562, 550, + 568, 566, 569, 574, 575, 576, 878, 577, 877, 578, + 581, 876, 582, 581, 875, 585, 588, 584, 596, 597, + 594, 598, 599, 601, 874, 607, 873, 604, 609, 610, + 612, 615, 618, 872, 617, 619, 622, 630, 631, 633, + + 871, 620, 623, 870, 869, 868, 867, 866, 865, 864, + 637, 863, 636, 641, 643, 862, 861, 860, 644, 649, + 645, 650, 651, 859, 654, 655, 657, 858, 658, 857, + 659, 660, 661, 856, 855, 854, 665, 663, 853, 666, + 852, 672, 675, 680, 851, 687, 850, 849, 848, 847, + 678, 679, 846, 688, 845, 844, 843, 689, 691, 842, + 839, 829, 828, 690, 693, 692, 695, 827, 825, 697, + 701, 704, 700, 707, 708, 711, 714, 824, 715, 716, + 725, 719, 726, 727, 823, 822, 729, 731, 732, 733, + 819, 818, 734, 739, 735, 737, 817, 740, 816, 745, + + 741, 751, 752, 757, 758, 759, 760, 761, 762, 763, + 765, 767, 770, 812, 769, 771, 774, 783, 773, 777, + 784, 811, 785, 810, 787, 791, 793, 795, 797, 799, + 802, 803, 805, 804, 625, 542, 806, 387, 255, 809, + 219, 927, 843, 845, 182, 849, 139 } ; -static yyconst short int yy_def[439] = +static yyconst short int yy_def[448] = { 0, - 433, 1, 433, 433, 433, 433, 434, 435, 436, 433, - 435, 435, 435, 435, 437, 435, 435, 435, 435, 435, - 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, - 435, 435, 435, 435, 435, 435, 434, 433, 435, 433, - 438, 438, 433, 433, 435, 435, 435, 435, 435, 437, - 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, - 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, - 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, - 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, - 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, - - 435, 435, 435, 435, 435, 435, 435, 435, 433, 438, - 438, 433, 435, 435, 435, 49, 435, 435, 435, 435, - 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, - 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, - 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, - 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, - 435, 435, 49, 435, 435, 435, 435, 435, 435, 435, - 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, - 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, - 435, 435, 435, 435, 433, 433, 433, 433, 435, 435, - - 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, - 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, - 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, - 435, 435, 435, 435, 435, 435, 163, 435, 435, 435, - 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, - 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, - 435, 435, 435, 435, 435, 435, 435, 433, 435, 435, - 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, - 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, - 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, - - 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, - 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, - 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, - 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, - 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, - 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, - 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, - 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, - 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, - 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, - - 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, - 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, - 435, 435, 435, 435, 435, 435, 435, 435, 435, 435, - 435, 435, 0, 433, 433, 433, 433, 433 + 442, 1, 442, 442, 442, 442, 443, 444, 445, 442, + 444, 444, 444, 444, 446, 444, 444, 444, 444, 444, + 444, 444, 444, 444, 444, 444, 444, 444, 444, 444, + 444, 444, 444, 444, 444, 444, 443, 442, 444, 442, + 447, 447, 442, 442, 444, 444, 444, 444, 444, 446, + 444, 444, 444, 444, 444, 444, 444, 444, 444, 444, + 444, 444, 444, 444, 444, 444, 444, 444, 444, 444, + 444, 444, 444, 444, 444, 444, 444, 444, 444, 444, + 444, 444, 444, 444, 444, 444, 444, 444, 444, 444, + 444, 444, 444, 444, 444, 444, 444, 444, 444, 444, + + 444, 444, 444, 444, 444, 444, 444, 444, 444, 442, + 447, 447, 442, 444, 444, 444, 49, 444, 444, 444, + 444, 444, 444, 444, 444, 444, 444, 444, 444, 444, + 444, 444, 444, 444, 444, 444, 444, 444, 444, 444, + 444, 444, 444, 444, 444, 444, 444, 444, 444, 444, + 444, 444, 444, 444, 444, 444, 444, 444, 444, 444, + 444, 444, 444, 49, 444, 444, 444, 444, 444, 444, + 444, 444, 444, 444, 444, 444, 444, 444, 444, 444, + 444, 444, 444, 444, 444, 444, 444, 444, 444, 444, + 444, 444, 444, 444, 444, 444, 442, 442, 442, 442, + + 444, 444, 444, 444, 444, 444, 444, 444, 444, 444, + 444, 444, 444, 444, 444, 444, 444, 444, 444, 444, + 444, 444, 444, 444, 444, 444, 444, 444, 444, 444, + 444, 444, 444, 444, 444, 444, 444, 444, 164, 444, + 444, 444, 444, 444, 444, 444, 444, 444, 444, 444, + 444, 444, 444, 444, 444, 444, 444, 444, 444, 444, + 444, 444, 444, 444, 444, 444, 444, 444, 444, 444, + 442, 444, 444, 444, 444, 444, 444, 444, 444, 444, + 444, 444, 444, 444, 444, 444, 444, 444, 444, 444, + 444, 444, 444, 444, 444, 444, 444, 444, 444, 444, + + 444, 444, 444, 444, 444, 444, 444, 444, 444, 444, + 444, 444, 444, 444, 444, 444, 444, 444, 444, 444, + 444, 444, 444, 444, 444, 444, 444, 444, 444, 444, + 444, 444, 444, 444, 444, 444, 444, 444, 444, 444, + 444, 444, 444, 444, 444, 444, 444, 444, 444, 444, + 444, 444, 444, 444, 444, 444, 444, 444, 444, 444, + 444, 444, 444, 444, 444, 444, 444, 444, 444, 444, + 444, 444, 444, 444, 444, 444, 444, 444, 444, 444, + 444, 444, 444, 444, 444, 444, 444, 444, 444, 444, + 444, 444, 444, 444, 444, 444, 444, 444, 444, 444, + + 444, 444, 444, 444, 444, 444, 444, 444, 444, 444, + 444, 444, 444, 444, 444, 444, 444, 444, 444, 444, + 444, 444, 444, 444, 444, 444, 444, 444, 444, 444, + 444, 444, 444, 444, 444, 444, 444, 444, 444, 444, + 444, 0, 442, 442, 442, 442, 442 } ; -static yyconst short int yy_nxt[951] = +static yyconst short int yy_nxt[969] = { 0, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 4, 15, 8, 8, 8, 16, 17, 18, 19, @@ -539,212 +542,216 @@ 28, 8, 29, 30, 31, 32, 33, 34, 35, 8, 36, 42, 40, 43, 43, 44, 44, 45, 45, 40, 46, 40, 40, 40, 47, 48, 48, 40, 47, 48, - 48, 40, 235, 40, 186, 40, 40, 40, 40, 81, - 60, 51, 61, 40, 117, 82, 87, 56, 52, 40, + 48, 40, 237, 40, 188, 40, 40, 40, 40, 81, + 60, 51, 61, 40, 118, 82, 87, 56, 52, 40, 53, 57, 54, 62, 49, 55, 58, 40, 63, 59, 66, 40, 64, 40, 40, 40, 68, 65, 40, 40, - 67, 40, 71, 73, 74, 40, 69, 106, 72, 40, - 75, 85, 70, 83, 78, 84, 193, 86, 76, 40, - 40, 40, 40, 77, 95, 104, 133, 79, 111, 111, - 40, 108, 113, 80, 88, 40, 40, 96, 105, 107, - 97, 40, 89, 43, 43, 90, 122, 98, 91, 112, - 44, 44, 47, 45, 45, 40, 114, 114, 40, 92, - 93, 115, 94, 88, 40, 40, 40, 115, 40, 164, - 40, 99, 47, 48, 48, 40, 120, 118, 100, 119, - 101, 123, 102, 40, 40, 121, 40, 103, 116, 116, - 40, 40, 116, 116, 124, 116, 116, 116, 116, 116, - - 116, 126, 125, 40, 40, 40, 40, 40, 127, 40, - 128, 40, 131, 40, 135, 134, 136, 40, 40, 129, - 141, 130, 138, 40, 132, 40, 40, 40, 110, 139, - 40, 140, 137, 148, 40, 40, 143, 40, 40, 151, - 142, 40, 144, 149, 40, 153, 154, 145, 146, 150, - 147, 152, 155, 40, 40, 40, 157, 159, 156, 158, - 40, 40, 40, 40, 40, 41, 160, 40, 165, 40, - 172, 161, 40, 40, 40, 40, 166, 168, 162, 40, - 169, 171, 173, 170, 167, 174, 176, 163, 40, 40, - 40, 180, 204, 175, 178, 179, 40, 177, 182, 40, - - 187, 188, 190, 183, 191, 40, 181, 111, 111, 40, - 192, 184, 40, 189, 196, 196, 185, 40, 40, 197, - 194, 114, 114, 40, 40, 197, 115, 202, 201, 40, - 198, 199, 115, 200, 200, 40, 40, 40, 203, 205, - 40, 207, 40, 40, 40, 208, 40, 40, 40, 40, - 212, 206, 40, 40, 40, 40, 214, 210, 211, 213, - 219, 215, 209, 220, 40, 40, 40, 40, 223, 40, - 217, 40, 218, 216, 221, 222, 224, 40, 40, 40, - 225, 40, 226, 40, 40, 40, 227, 230, 40, 229, - 40, 40, 228, 40, 231, 40, 232, 40, 40, 40, - - 234, 40, 240, 40, 270, 236, 249, 251, 233, 237, - 237, 245, 246, 237, 237, 40, 237, 237, 237, 237, - 237, 237, 238, 40, 239, 40, 247, 40, 40, 40, - 248, 40, 241, 40, 242, 40, 252, 40, 243, 40, - 244, 40, 256, 40, 250, 40, 40, 264, 255, 40, - 258, 253, 254, 260, 257, 40, 259, 40, 263, 40, - 261, 40, 265, 40, 267, 40, 262, 196, 196, 268, - 268, 40, 197, 266, 40, 40, 198, 198, 197, 268, - 268, 200, 200, 40, 200, 200, 40, 40, 269, 40, - 40, 271, 272, 40, 273, 275, 40, 40, 40, 40, - - 40, 40, 278, 40, 40, 281, 276, 40, 40, 40, - 282, 277, 274, 286, 283, 40, 40, 279, 287, 285, - 280, 40, 40, 40, 40, 40, 284, 40, 40, 40, - 40, 40, 40, 40, 40, 290, 288, 289, 291, 293, - 292, 298, 295, 294, 299, 313, 40, 40, 40, 301, - 40, 40, 296, 297, 300, 302, 307, 304, 40, 306, - 308, 40, 40, 40, 40, 309, 40, 40, 40, 303, - 310, 305, 312, 316, 314, 40, 40, 311, 40, 315, - 40, 40, 40, 40, 317, 268, 268, 40, 324, 320, - 40, 40, 40, 40, 326, 323, 318, 319, 325, 329, - - 40, 330, 40, 40, 322, 327, 40, 321, 40, 40, - 40, 40, 328, 40, 40, 334, 335, 40, 40, 331, - 336, 40, 40, 333, 40, 337, 332, 341, 40, 338, - 40, 343, 40, 345, 340, 344, 40, 339, 342, 346, - 40, 347, 40, 40, 40, 40, 40, 40, 40, 40, - 40, 40, 40, 352, 348, 350, 354, 40, 355, 357, - 40, 40, 40, 349, 359, 351, 40, 40, 353, 356, - 358, 363, 365, 361, 360, 366, 40, 40, 362, 40, - 40, 40, 40, 40, 370, 40, 368, 40, 364, 369, - 371, 40, 367, 40, 40, 40, 40, 40, 374, 373, - - 377, 40, 372, 375, 40, 381, 40, 40, 376, 40, - 382, 378, 380, 40, 40, 386, 40, 40, 379, 388, - 40, 383, 384, 40, 385, 389, 390, 40, 40, 40, - 40, 40, 40, 40, 392, 387, 40, 40, 40, 391, - 396, 40, 393, 397, 399, 394, 400, 398, 40, 40, - 401, 40, 395, 403, 40, 40, 40, 40, 40, 402, - 408, 40, 40, 40, 406, 404, 405, 40, 40, 407, - 412, 413, 409, 40, 40, 40, 410, 415, 40, 40, - 40, 411, 416, 417, 40, 40, 40, 40, 419, 421, - 40, 40, 414, 40, 40, 420, 418, 422, 427, 40, - - 424, 40, 423, 40, 425, 40, 40, 40, 431, 40, - 426, 430, 40, 40, 40, 40, 429, 40, 40, 40, - 428, 40, 432, 37, 37, 37, 37, 39, 39, 50, + 67, 40, 71, 73, 74, 40, 69, 107, 72, 40, + 75, 85, 70, 83, 78, 84, 195, 86, 76, 40, + 40, 40, 40, 77, 96, 105, 134, 79, 112, 112, + 40, 109, 114, 80, 88, 40, 40, 97, 106, 108, + 98, 111, 89, 43, 43, 90, 123, 99, 91, 92, + 113, 44, 44, 47, 45, 45, 40, 40, 40, 93, + 94, 40, 95, 88, 40, 40, 121, 40, 115, 115, + 40, 100, 124, 116, 47, 48, 48, 40, 101, 116, + 102, 135, 103, 122, 41, 126, 40, 104, 117, 117, + 40, 40, 117, 117, 40, 117, 117, 117, 117, 117, + + 117, 127, 40, 40, 119, 125, 120, 40, 128, 129, + 40, 40, 40, 40, 132, 40, 40, 137, 130, 136, + 131, 40, 40, 40, 142, 40, 133, 139, 40, 40, + 40, 141, 40, 138, 140, 149, 40, 152, 40, 143, + 144, 40, 145, 146, 147, 150, 148, 40, 157, 153, + 40, 151, 40, 154, 40, 155, 156, 159, 40, 40, + 40, 40, 40, 164, 40, 158, 40, 160, 166, 40, + 40, 161, 172, 40, 40, 162, 167, 169, 40, 174, + 170, 40, 163, 171, 168, 40, 40, 173, 165, 180, + 40, 175, 183, 40, 176, 40, 40, 40, 178, 40, + + 189, 190, 177, 184, 194, 40, 206, 182, 185, 179, + 192, 40, 193, 191, 181, 40, 186, 112, 112, 198, + 198, 187, 203, 40, 199, 40, 196, 115, 115, 40, + 199, 40, 116, 204, 205, 40, 200, 201, 116, 202, + 202, 40, 40, 40, 40, 211, 207, 40, 40, 40, + 208, 210, 40, 40, 214, 40, 40, 40, 216, 212, + 40, 217, 213, 40, 40, 209, 215, 40, 221, 222, + 224, 40, 225, 218, 40, 40, 223, 219, 40, 220, + 226, 40, 40, 227, 40, 40, 40, 229, 40, 40, + 40, 40, 232, 228, 40, 230, 233, 40, 40, 40, + + 242, 234, 40, 40, 236, 231, 40, 238, 248, 40, + 40, 254, 235, 239, 239, 247, 253, 239, 239, 40, + 239, 239, 239, 239, 239, 239, 240, 40, 243, 241, + 244, 249, 250, 40, 245, 40, 246, 40, 40, 40, + 40, 40, 251, 40, 252, 40, 255, 40, 40, 259, + 261, 40, 264, 40, 40, 40, 258, 40, 256, 268, + 260, 257, 266, 263, 262, 267, 40, 198, 198, 265, + 271, 271, 199, 270, 202, 202, 40, 40, 199, 40, + 269, 200, 200, 40, 271, 271, 202, 202, 40, 40, + 273, 40, 40, 40, 272, 40, 274, 40, 276, 40, + + 278, 40, 40, 40, 281, 40, 275, 40, 280, 40, + 279, 40, 284, 40, 285, 277, 286, 40, 40, 40, + 282, 40, 289, 283, 40, 40, 287, 290, 288, 40, + 40, 40, 291, 40, 40, 293, 40, 40, 40, 294, + 292, 303, 40, 295, 296, 40, 298, 301, 297, 40, + 302, 40, 40, 40, 305, 40, 40, 299, 307, 300, + 309, 40, 304, 40, 311, 312, 40, 40, 306, 40, + 313, 40, 308, 40, 319, 310, 314, 40, 316, 40, + 40, 315, 317, 318, 320, 40, 40, 40, 40, 40, + 271, 271, 40, 40, 321, 40, 40, 324, 328, 40, + + 329, 322, 327, 330, 331, 40, 323, 40, 40, 40, + 40, 326, 40, 333, 325, 40, 332, 334, 40, 338, + 40, 40, 335, 40, 340, 339, 40, 337, 40, 40, + 40, 40, 336, 40, 40, 341, 40, 342, 345, 347, + 348, 40, 40, 344, 40, 346, 343, 40, 40, 352, + 349, 350, 40, 351, 40, 40, 40, 353, 354, 355, + 40, 40, 40, 357, 360, 40, 40, 359, 40, 40, + 40, 40, 40, 362, 40, 356, 40, 40, 358, 364, + 368, 370, 366, 40, 361, 365, 40, 367, 363, 40, + 40, 40, 373, 372, 369, 374, 375, 371, 40, 40, + + 40, 40, 40, 40, 40, 376, 40, 378, 40, 379, + 377, 40, 40, 380, 381, 40, 382, 383, 40, 40, + 384, 387, 40, 386, 388, 40, 40, 40, 389, 385, + 40, 392, 395, 390, 391, 394, 40, 40, 40, 397, + 40, 396, 40, 40, 40, 40, 40, 393, 40, 399, + 40, 40, 40, 403, 407, 400, 40, 405, 404, 401, + 398, 406, 40, 40, 408, 409, 402, 411, 40, 40, + 40, 40, 40, 40, 40, 410, 40, 417, 40, 412, + 40, 40, 40, 415, 40, 40, 416, 421, 40, 418, + 422, 424, 414, 419, 40, 40, 40, 413, 40, 420, + + 425, 428, 40, 426, 40, 430, 40, 427, 40, 423, + 40, 431, 429, 40, 40, 40, 40, 40, 436, 432, + 40, 40, 40, 40, 434, 433, 440, 40, 40, 40, + 40, 435, 439, 40, 40, 40, 40, 438, 40, 40, + 40, 441, 437, 37, 37, 37, 37, 39, 39, 50, 40, 50, 50, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, - 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, - 40, 40, 40, 40, 40, 40, 40, 40, 40, 195, - 40, 40, 40, 40, 109, 40, 38, 433, 3, 433, - 433, 433, 433, 433, 433, 433, 433, 433, 433, 433, - 433, 433, 433, 433, 433, 433, 433, 433, 433, 433, - 433, 433, 433, 433, 433, 433, 433, 433, 433, 433, - 433, 433, 433, 433, 433, 433, 433, 433, 433, 433 + 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, + 40, 40, 40, 40, 40, 40, 40, 197, 40, 40, + 40, 40, 110, 40, 38, 442, 3, 442, 442, 442, + 442, 442, 442, 442, 442, 442, 442, 442, 442, 442, + 442, 442, 442, 442, 442, 442, 442, 442, 442, 442, + 442, 442, 442, 442, 442, 442, 442, 442, 442, 442, + 442, 442, 442, 442, 442, 442, 442, 442 } ; -static yyconst short int yy_chk[951] = +static yyconst short int yy_chk[969] = { 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 9, 158, 9, 9, 10, 10, 11, 11, 11, - 12, 26, 103, 12, 13, 13, 13, 13, 14, 14, - 14, 14, 158, 16, 103, 18, 51, 29, 17, 26, + 1, 9, 159, 9, 9, 10, 10, 11, 11, 11, + 12, 26, 104, 12, 13, 13, 13, 13, 14, 14, + 14, 14, 159, 16, 104, 18, 51, 29, 17, 26, 18, 16, 18, 20, 51, 26, 29, 17, 16, 19, 16, 17, 16, 18, 13, 16, 17, 23, 19, 17, - 20, 21, 19, 22, 27, 107, 21, 19, 34, 28, + 20, 21, 19, 22, 27, 108, 21, 19, 34, 28, 20, 64, 22, 23, 23, 24, 21, 34, 22, 25, - 24, 28, 21, 27, 25, 27, 107, 28, 24, 31, + 24, 28, 21, 27, 25, 27, 108, 28, 24, 31, 33, 35, 36, 24, 31, 33, 64, 25, 42, 42, 55, 36, 46, 25, 30, 46, 30, 31, 33, 35, - 31, 89, 30, 43, 43, 30, 55, 31, 30, 44, - 44, 44, 45, 45, 45, 45, 47, 47, 47, 30, - 30, 47, 30, 32, 52, 32, 54, 47, 53, 89, - 56, 32, 48, 48, 48, 48, 53, 52, 32, 52, - 32, 56, 32, 57, 58, 54, 60, 32, 49, 49, - 49, 65, 49, 49, 57, 49, 49, 49, 49, 49, - - 49, 60, 58, 61, 62, 63, 66, 68, 60, 67, - 61, 70, 63, 69, 66, 65, 67, 71, 72, 62, - 70, 62, 68, 73, 63, 74, 76, 75, 438, 68, - 78, 69, 67, 75, 77, 81, 72, 80, 79, 77, - 71, 82, 73, 76, 85, 78, 79, 74, 74, 76, - 74, 77, 80, 86, 83, 87, 82, 85, 81, 83, - 88, 90, 91, 92, 93, 436, 86, 99, 90, 94, - 93, 87, 95, 97, 100, 98, 90, 91, 87, 123, - 91, 92, 94, 91, 90, 95, 97, 88, 101, 105, - 102, 100, 123, 95, 98, 99, 104, 97, 102, 108, - - 104, 104, 105, 102, 105, 106, 101, 111, 111, 119, - 106, 102, 432, 104, 112, 112, 102, 118, 127, 112, - 108, 114, 114, 114, 125, 112, 114, 119, 118, 121, - 115, 115, 114, 115, 115, 115, 126, 129, 121, 125, - 130, 127, 131, 132, 134, 129, 135, 136, 138, 139, - 134, 126, 137, 144, 141, 140, 136, 131, 132, 135, - 140, 137, 130, 141, 147, 142, 150, 145, 144, 143, - 138, 146, 139, 137, 142, 143, 145, 148, 149, 151, - 146, 153, 147, 152, 154, 157, 148, 151, 160, 150, - 169, 171, 149, 166, 152, 175, 153, 202, 177, 164, - - 157, 165, 166, 173, 202, 160, 175, 177, 154, 163, - 163, 169, 171, 163, 163, 174, 163, 163, 163, 163, - 163, 163, 164, 167, 165, 176, 173, 178, 179, 180, - 174, 181, 167, 182, 167, 186, 178, 183, 167, 190, - 167, 184, 182, 185, 176, 188, 194, 190, 181, 189, - 184, 179, 180, 186, 183, 187, 185, 191, 189, 192, - 187, 430, 191, 429, 194, 427, 188, 196, 196, 198, - 198, 201, 196, 192, 203, 204, 197, 197, 196, 197, - 197, 199, 199, 199, 200, 200, 200, 208, 201, 209, - 210, 203, 204, 211, 208, 210, 212, 213, 214, 215, - - 216, 217, 213, 219, 221, 216, 211, 218, 222, 223, - 217, 212, 209, 222, 218, 224, 225, 214, 223, 221, - 215, 226, 228, 227, 229, 232, 219, 233, 235, 241, - 236, 239, 238, 245, 255, 226, 224, 225, 227, 229, - 228, 238, 233, 232, 239, 255, 242, 240, 243, 241, - 244, 246, 235, 236, 240, 242, 245, 243, 247, 244, - 246, 249, 250, 253, 256, 247, 257, 259, 258, 242, - 249, 243, 253, 258, 256, 260, 261, 250, 262, 257, - 263, 265, 267, 270, 259, 268, 268, 273, 270, 262, - 271, 275, 277, 276, 273, 267, 260, 261, 271, 276, - - 274, 277, 278, 279, 265, 274, 280, 263, 281, 283, - 286, 285, 275, 287, 288, 281, 283, 289, 290, 278, - 285, 292, 293, 280, 295, 286, 279, 290, 294, 287, - 296, 293, 297, 295, 289, 294, 299, 288, 292, 296, - 300, 297, 310, 309, 311, 315, 318, 321, 319, 316, - 317, 322, 334, 311, 299, 309, 316, 323, 317, 319, - 325, 327, 328, 300, 322, 310, 329, 333, 315, 318, - 321, 328, 333, 325, 323, 334, 336, 338, 327, 340, - 339, 347, 348, 342, 340, 353, 338, 360, 329, 339, - 342, 354, 336, 359, 361, 362, 366, 365, 353, 348, - - 360, 367, 347, 354, 368, 366, 371, 369, 359, 370, - 367, 361, 365, 372, 374, 371, 377, 376, 362, 374, - 375, 368, 369, 378, 370, 375, 376, 381, 382, 383, - 387, 384, 388, 391, 378, 372, 394, 397, 389, 377, - 384, 393, 381, 387, 389, 382, 391, 388, 395, 396, - 393, 398, 383, 395, 399, 400, 401, 402, 403, 394, - 400, 404, 405, 406, 398, 396, 397, 408, 407, 399, - 404, 405, 401, 410, 409, 411, 402, 407, 412, 418, - 414, 403, 408, 409, 416, 417, 419, 420, 411, 414, - 421, 422, 406, 423, 425, 412, 410, 416, 421, 428, - - 418, 431, 417, 426, 419, 424, 415, 413, 428, 392, - 420, 425, 390, 386, 385, 380, 423, 379, 373, 364, - 422, 363, 431, 434, 434, 434, 434, 435, 435, 437, - 358, 437, 437, 357, 356, 355, 352, 351, 350, 349, - 346, 345, 344, 343, 341, 337, 335, 332, 331, 330, - 326, 324, 320, 314, 313, 312, 308, 307, 306, 305, - 304, 303, 302, 301, 298, 291, 284, 282, 272, 269, - 266, 264, 254, 252, 251, 248, 234, 231, 230, 220, - 207, 206, 205, 193, 172, 170, 168, 162, 161, 159, - 156, 155, 133, 128, 124, 122, 120, 117, 113, 109, - - 96, 84, 59, 39, 37, 8, 7, 3, 433, 433, - 433, 433, 433, 433, 433, 433, 433, 433, 433, 433, - 433, 433, 433, 433, 433, 433, 433, 433, 433, 433, - 433, 433, 433, 433, 433, 433, 433, 433, 433, 433, - 433, 433, 433, 433, 433, 433, 433, 433, 433, 433 + 31, 447, 30, 43, 43, 30, 55, 31, 30, 30, + 44, 44, 44, 45, 45, 45, 45, 65, 53, 30, + 30, 56, 30, 32, 54, 32, 53, 58, 47, 47, + 47, 32, 56, 47, 48, 48, 48, 48, 32, 47, + 32, 65, 32, 54, 445, 58, 60, 32, 49, 49, + 49, 52, 49, 49, 57, 49, 49, 49, 49, 49, + + 49, 60, 61, 62, 52, 57, 52, 63, 60, 61, + 67, 66, 68, 69, 63, 70, 71, 67, 62, 66, + 62, 74, 72, 73, 70, 81, 63, 68, 76, 75, + 441, 69, 77, 67, 68, 75, 88, 77, 78, 71, + 72, 80, 73, 74, 74, 76, 74, 79, 81, 77, + 82, 76, 83, 78, 85, 79, 80, 83, 86, 87, + 89, 90, 91, 88, 92, 82, 439, 85, 90, 93, + 99, 86, 92, 94, 102, 87, 90, 91, 95, 94, + 91, 96, 87, 91, 90, 98, 100, 93, 89, 99, + 101, 95, 102, 124, 96, 103, 105, 106, 98, 107, + + 105, 105, 96, 103, 107, 109, 124, 101, 103, 98, + 106, 119, 106, 105, 100, 120, 103, 112, 112, 113, + 113, 103, 119, 131, 113, 122, 109, 115, 115, 115, + 113, 126, 115, 120, 122, 127, 116, 116, 115, 116, + 116, 116, 128, 130, 132, 131, 126, 133, 135, 137, + 127, 130, 138, 136, 135, 139, 140, 145, 137, 132, + 142, 138, 133, 141, 144, 128, 136, 143, 141, 142, + 144, 146, 145, 138, 147, 148, 143, 139, 149, 140, + 146, 150, 151, 147, 152, 153, 154, 149, 155, 158, + 161, 167, 152, 148, 170, 150, 153, 178, 438, 172, + + 167, 154, 179, 165, 158, 151, 166, 161, 172, 175, + 173, 179, 155, 164, 164, 170, 178, 164, 164, 168, + 164, 164, 164, 164, 164, 164, 165, 176, 168, 166, + 168, 173, 175, 177, 168, 181, 168, 180, 182, 183, + 184, 186, 176, 185, 177, 188, 180, 189, 190, 184, + 186, 187, 189, 191, 193, 196, 183, 192, 181, 193, + 185, 182, 191, 188, 187, 192, 194, 198, 198, 190, + 200, 200, 198, 196, 201, 201, 201, 203, 198, 205, + 194, 199, 199, 204, 199, 199, 202, 202, 202, 206, + 204, 210, 211, 214, 203, 212, 205, 213, 210, 215, + + 212, 216, 217, 221, 215, 219, 206, 218, 214, 220, + 213, 226, 218, 223, 219, 211, 220, 224, 225, 227, + 216, 228, 224, 217, 229, 230, 221, 225, 223, 231, + 234, 235, 226, 237, 242, 228, 238, 241, 240, 229, + 227, 242, 243, 230, 231, 244, 235, 240, 234, 245, + 241, 246, 247, 436, 244, 248, 249, 237, 245, 238, + 246, 260, 243, 250, 248, 249, 253, 252, 244, 256, + 250, 258, 245, 259, 260, 247, 252, 262, 256, 261, + 263, 253, 258, 259, 261, 264, 265, 266, 268, 270, + 271, 271, 274, 273, 262, 278, 276, 265, 273, 277, + + 274, 263, 270, 276, 277, 281, 264, 279, 280, 282, + 283, 268, 284, 279, 266, 288, 278, 280, 286, 284, + 289, 290, 281, 291, 288, 286, 292, 283, 295, 293, + 296, 302, 282, 297, 303, 289, 435, 290, 293, 296, + 297, 298, 299, 292, 300, 295, 291, 313, 311, 302, + 298, 299, 314, 300, 315, 319, 321, 303, 311, 313, + 320, 322, 323, 315, 321, 325, 326, 320, 327, 329, + 331, 332, 333, 323, 338, 314, 337, 340, 319, 326, + 332, 337, 329, 342, 322, 327, 343, 331, 325, 351, + 352, 344, 342, 340, 333, 343, 344, 338, 346, 354, + + 358, 364, 359, 366, 365, 346, 367, 352, 370, 354, + 351, 373, 371, 358, 359, 372, 364, 365, 374, 375, + 366, 371, 376, 370, 372, 377, 379, 380, 373, 367, + 382, 376, 380, 374, 375, 379, 381, 383, 384, 382, + 387, 381, 388, 389, 390, 393, 395, 377, 396, 384, + 394, 398, 401, 390, 396, 387, 400, 394, 393, 388, + 383, 395, 402, 403, 398, 400, 389, 402, 404, 405, + 406, 407, 408, 409, 410, 401, 411, 408, 412, 403, + 415, 413, 416, 406, 419, 417, 407, 412, 420, 409, + 413, 416, 405, 410, 418, 421, 423, 404, 425, 411, + + 417, 420, 426, 418, 427, 423, 428, 419, 429, 415, + 430, 425, 421, 431, 432, 434, 433, 437, 430, 426, + 440, 424, 422, 414, 428, 427, 437, 399, 397, 392, + 391, 429, 434, 386, 385, 378, 369, 432, 368, 363, + 362, 440, 431, 443, 443, 443, 443, 444, 444, 446, + 361, 446, 446, 360, 357, 356, 355, 353, 350, 349, + 348, 347, 345, 341, 339, 336, 335, 334, 330, 328, + 324, 318, 317, 316, 312, 310, 309, 308, 307, 306, + 305, 304, 301, 294, 287, 285, 275, 272, 269, 267, + 257, 255, 254, 251, 236, 233, 232, 222, 209, 208, + + 207, 195, 174, 171, 169, 163, 162, 160, 157, 156, + 134, 129, 125, 123, 121, 118, 114, 110, 97, 84, + 59, 39, 37, 8, 7, 3, 442, 442, 442, 442, + 442, 442, 442, 442, 442, 442, 442, 442, 442, 442, + 442, 442, 442, 442, 442, 442, 442, 442, 442, 442, + 442, 442, 442, 442, 442, 442, 442, 442, 442, 442, + 442, 442, 442, 442, 442, 442, 442, 442 } ; static yy_state_type yy_state_buf[YY_BUF_SIZE + 2], *yy_state_ptr; @@ -761,7 +768,7 @@ #define YY_MORE_ADJ 0 #define YY_RESTORE_YY_MORE_OFFSET char *yytext; -#line 1 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 1 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" #define INITIAL 0 /*===-- Lexer.l - Scanner for llvm assembly files --------------*- C++ -*--===// // @@ -776,7 +783,7 @@ // //===----------------------------------------------------------------------===*/ #define YY_NEVER_INTERACTIVE 1 -#line 28 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 28 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" #include "ParserInternals.h" #include "llvm/Module.h" #include @@ -902,7 +909,7 @@ /* HexIntConstant - Hexadecimal constant generated by the CFE to avoid forcing * it to deal with 64 bit numbers. */ -#line 906 "Lexer.cpp" +#line 913 "Lexer.cpp" /* Macros after this point can all be overridden by user definitions in * section 1. @@ -1053,10 +1060,10 @@ register char *yy_cp, *yy_bp; register int yy_act; -#line 179 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 179 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" -#line 1060 "Lexer.cpp" +#line 1067 "Lexer.cpp" if ( yy_init ) { @@ -1104,14 +1111,14 @@ while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) { yy_current_state = (int) yy_def[yy_current_state]; - if ( yy_current_state >= 434 ) + if ( yy_current_state >= 443 ) yy_c = yy_meta[(unsigned int) yy_c]; } yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c]; *yy_state_ptr++ = yy_current_state; ++yy_cp; } - while ( yy_current_state != 433 ); + while ( yy_current_state != 442 ); yy_find_action: yy_current_state = *--yy_state_ptr; @@ -1149,471 +1156,476 @@ { /* beginning of action switch */ case 1: YY_RULE_SETUP -#line 181 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 181 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" { /* Ignore comments for now */ } YY_BREAK case 2: YY_RULE_SETUP -#line 183 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 183 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" { return BEGINTOK; } YY_BREAK case 3: YY_RULE_SETUP -#line 184 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 184 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" { return ENDTOK; } YY_BREAK case 4: YY_RULE_SETUP -#line 185 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 185 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" { return TRUETOK; } YY_BREAK case 5: YY_RULE_SETUP -#line 186 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 186 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" { return FALSETOK; } YY_BREAK case 6: YY_RULE_SETUP -#line 187 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 187 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" { return DECLARE; } YY_BREAK case 7: YY_RULE_SETUP -#line 188 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 188 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" { return GLOBAL; } YY_BREAK case 8: YY_RULE_SETUP -#line 189 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 189 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" { return CONSTANT; } YY_BREAK case 9: YY_RULE_SETUP -#line 190 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 190 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" { return INTERNAL; } YY_BREAK case 10: YY_RULE_SETUP -#line 191 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 191 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" { return LINKONCE; } YY_BREAK case 11: YY_RULE_SETUP -#line 192 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 192 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" { return WEAK; } YY_BREAK case 12: YY_RULE_SETUP -#line 193 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 193 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" { return APPENDING; } YY_BREAK case 13: YY_RULE_SETUP -#line 194 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 194 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" { return EXTERNAL; } /* Deprecated, turn into external */ YY_BREAK case 14: YY_RULE_SETUP -#line 195 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 195 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" { return EXTERNAL; } YY_BREAK case 15: YY_RULE_SETUP -#line 196 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 196 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" { return IMPLEMENTATION; } YY_BREAK case 16: YY_RULE_SETUP -#line 197 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 197 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" { return ZEROINITIALIZER; } YY_BREAK case 17: YY_RULE_SETUP -#line 198 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 198 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" { return DOTDOTDOT; } YY_BREAK case 18: YY_RULE_SETUP -#line 199 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 199 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" { return UNDEF; } YY_BREAK case 19: YY_RULE_SETUP -#line 200 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 200 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" { return NULL_TOK; } YY_BREAK case 20: YY_RULE_SETUP -#line 201 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 201 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" { return TO; } YY_BREAK case 21: YY_RULE_SETUP -#line 202 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 202 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" { RET_TOK(TermOpVal, Unwind, UNWIND); } YY_BREAK case 22: YY_RULE_SETUP -#line 203 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 203 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" { return NOT; } /* Deprecated, turned into XOR */ YY_BREAK case 23: YY_RULE_SETUP -#line 204 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 204 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" { return TAIL; } YY_BREAK case 24: YY_RULE_SETUP -#line 205 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 205 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" { return TARGET; } YY_BREAK case 25: YY_RULE_SETUP -#line 206 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 206 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" { return TRIPLE; } YY_BREAK case 26: YY_RULE_SETUP -#line 207 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 207 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" { return DEPLIBS; } YY_BREAK case 27: YY_RULE_SETUP -#line 208 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 208 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" { return ENDIAN; } YY_BREAK case 28: YY_RULE_SETUP -#line 209 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 209 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" { return POINTERSIZE; } YY_BREAK case 29: YY_RULE_SETUP -#line 210 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 210 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" { return LITTLE; } YY_BREAK case 30: YY_RULE_SETUP -#line 211 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 211 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" { return BIG; } YY_BREAK case 31: YY_RULE_SETUP -#line 212 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 212 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" { return VOLATILE; } YY_BREAK case 32: YY_RULE_SETUP -#line 213 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 213 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" { return ALIGN; } YY_BREAK case 33: YY_RULE_SETUP -#line 214 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 214 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" { return SECTION; } YY_BREAK case 34: YY_RULE_SETUP -#line 215 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 215 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" { return MODULE; } YY_BREAK case 35: YY_RULE_SETUP -#line 216 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 216 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" { return ASM_TOK; } YY_BREAK case 36: YY_RULE_SETUP -#line 218 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ return CC_TOK; } +#line 217 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +{ return SIDEEFFECT; } YY_BREAK case 37: YY_RULE_SETUP -#line 219 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ return CCC_TOK; } +#line 219 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +{ return CC_TOK; } YY_BREAK case 38: YY_RULE_SETUP -#line 220 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ return FASTCC_TOK; } +#line 220 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +{ return CCC_TOK; } YY_BREAK case 39: YY_RULE_SETUP -#line 221 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ return COLDCC_TOK; } +#line 221 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +{ return FASTCC_TOK; } YY_BREAK case 40: YY_RULE_SETUP -#line 223 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ llvmAsmlval.PrimType = Type::VoidTy ; return VOID; } +#line 222 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +{ return COLDCC_TOK; } YY_BREAK case 41: YY_RULE_SETUP -#line 224 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ llvmAsmlval.PrimType = Type::BoolTy ; return BOOL; } +#line 224 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +{ llvmAsmlval.PrimType = Type::VoidTy ; return VOID; } YY_BREAK case 42: YY_RULE_SETUP -#line 225 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ llvmAsmlval.PrimType = Type::SByteTy ; return SBYTE; } +#line 225 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +{ llvmAsmlval.PrimType = Type::BoolTy ; return BOOL; } YY_BREAK case 43: YY_RULE_SETUP -#line 226 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ llvmAsmlval.PrimType = Type::UByteTy ; return UBYTE; } +#line 226 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +{ llvmAsmlval.PrimType = Type::SByteTy ; return SBYTE; } YY_BREAK case 44: YY_RULE_SETUP -#line 227 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ llvmAsmlval.PrimType = Type::ShortTy ; return SHORT; } +#line 227 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +{ llvmAsmlval.PrimType = Type::UByteTy ; return UBYTE; } YY_BREAK case 45: YY_RULE_SETUP -#line 228 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ llvmAsmlval.PrimType = Type::UShortTy; return USHORT; } +#line 228 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +{ llvmAsmlval.PrimType = Type::ShortTy ; return SHORT; } YY_BREAK case 46: YY_RULE_SETUP -#line 229 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ llvmAsmlval.PrimType = Type::IntTy ; return INT; } +#line 229 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +{ llvmAsmlval.PrimType = Type::UShortTy; return USHORT; } YY_BREAK case 47: YY_RULE_SETUP -#line 230 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ llvmAsmlval.PrimType = Type::UIntTy ; return UINT; } +#line 230 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +{ llvmAsmlval.PrimType = Type::IntTy ; return INT; } YY_BREAK case 48: YY_RULE_SETUP -#line 231 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ llvmAsmlval.PrimType = Type::LongTy ; return LONG; } +#line 231 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +{ llvmAsmlval.PrimType = Type::UIntTy ; return UINT; } YY_BREAK case 49: YY_RULE_SETUP -#line 232 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ llvmAsmlval.PrimType = Type::ULongTy ; return ULONG; } +#line 232 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +{ llvmAsmlval.PrimType = Type::LongTy ; return LONG; } YY_BREAK case 50: YY_RULE_SETUP -#line 233 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ llvmAsmlval.PrimType = Type::FloatTy ; return FLOAT; } +#line 233 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +{ llvmAsmlval.PrimType = Type::ULongTy ; return ULONG; } YY_BREAK case 51: YY_RULE_SETUP -#line 234 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ llvmAsmlval.PrimType = Type::DoubleTy; return DOUBLE; } +#line 234 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +{ llvmAsmlval.PrimType = Type::FloatTy ; return FLOAT; } YY_BREAK case 52: YY_RULE_SETUP -#line 235 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ llvmAsmlval.PrimType = Type::LabelTy ; return LABEL; } +#line 235 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +{ llvmAsmlval.PrimType = Type::DoubleTy; return DOUBLE; } YY_BREAK case 53: YY_RULE_SETUP -#line 236 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ return TYPE; } +#line 236 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +{ llvmAsmlval.PrimType = Type::LabelTy ; return LABEL; } YY_BREAK case 54: YY_RULE_SETUP -#line 237 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ return OPAQUE; } +#line 237 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +{ return TYPE; } YY_BREAK case 55: YY_RULE_SETUP -#line 239 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(BinaryOpVal, Add, ADD); } +#line 238 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +{ return OPAQUE; } YY_BREAK case 56: YY_RULE_SETUP -#line 240 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(BinaryOpVal, Sub, SUB); } +#line 240 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(BinaryOpVal, Add, ADD); } YY_BREAK case 57: YY_RULE_SETUP -#line 241 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(BinaryOpVal, Mul, MUL); } +#line 241 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(BinaryOpVal, Sub, SUB); } YY_BREAK case 58: YY_RULE_SETUP -#line 242 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(BinaryOpVal, Div, DIV); } +#line 242 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(BinaryOpVal, Mul, MUL); } YY_BREAK case 59: YY_RULE_SETUP -#line 243 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(BinaryOpVal, Rem, REM); } +#line 243 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(BinaryOpVal, Div, DIV); } YY_BREAK case 60: YY_RULE_SETUP -#line 244 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(BinaryOpVal, And, AND); } +#line 244 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(BinaryOpVal, Rem, REM); } YY_BREAK case 61: YY_RULE_SETUP -#line 245 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(BinaryOpVal, Or , OR ); } +#line 245 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(BinaryOpVal, And, AND); } YY_BREAK case 62: YY_RULE_SETUP -#line 246 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(BinaryOpVal, Xor, XOR); } +#line 246 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(BinaryOpVal, Or , OR ); } YY_BREAK case 63: YY_RULE_SETUP -#line 247 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(BinaryOpVal, SetNE, SETNE); } +#line 247 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(BinaryOpVal, Xor, XOR); } YY_BREAK case 64: YY_RULE_SETUP -#line 248 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(BinaryOpVal, SetEQ, SETEQ); } +#line 248 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(BinaryOpVal, SetNE, SETNE); } YY_BREAK case 65: YY_RULE_SETUP -#line 249 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(BinaryOpVal, SetLT, SETLT); } +#line 249 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(BinaryOpVal, SetEQ, SETEQ); } YY_BREAK case 66: YY_RULE_SETUP -#line 250 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(BinaryOpVal, SetGT, SETGT); } +#line 250 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(BinaryOpVal, SetLT, SETLT); } YY_BREAK case 67: YY_RULE_SETUP -#line 251 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(BinaryOpVal, SetLE, SETLE); } +#line 251 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(BinaryOpVal, SetGT, SETGT); } YY_BREAK case 68: YY_RULE_SETUP -#line 252 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(BinaryOpVal, SetGE, SETGE); } +#line 252 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(BinaryOpVal, SetLE, SETLE); } YY_BREAK case 69: YY_RULE_SETUP -#line 254 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(OtherOpVal, PHI, PHI_TOK); } +#line 253 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(BinaryOpVal, SetGE, SETGE); } YY_BREAK case 70: YY_RULE_SETUP -#line 255 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(OtherOpVal, Call, CALL); } +#line 255 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(OtherOpVal, PHI, PHI_TOK); } YY_BREAK case 71: YY_RULE_SETUP -#line 256 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(OtherOpVal, Cast, CAST); } +#line 256 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(OtherOpVal, Call, CALL); } YY_BREAK case 72: YY_RULE_SETUP -#line 257 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(OtherOpVal, Select, SELECT); } +#line 257 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(OtherOpVal, Cast, CAST); } YY_BREAK case 73: YY_RULE_SETUP -#line 258 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(OtherOpVal, Shl, SHL); } +#line 258 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(OtherOpVal, Select, SELECT); } YY_BREAK case 74: YY_RULE_SETUP -#line 259 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(OtherOpVal, Shr, SHR); } +#line 259 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(OtherOpVal, Shl, SHL); } YY_BREAK case 75: YY_RULE_SETUP -#line 260 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ return VANEXT_old; } +#line 260 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(OtherOpVal, Shr, SHR); } YY_BREAK case 76: YY_RULE_SETUP -#line 261 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ return VAARG_old; } +#line 261 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +{ return VANEXT_old; } YY_BREAK case 77: YY_RULE_SETUP -#line 262 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(OtherOpVal, VAArg , VAARG); } +#line 262 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +{ return VAARG_old; } YY_BREAK case 78: YY_RULE_SETUP -#line 263 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(TermOpVal, Ret, RET); } +#line 263 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(OtherOpVal, VAArg , VAARG); } YY_BREAK case 79: YY_RULE_SETUP -#line 264 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(TermOpVal, Br, BR); } +#line 264 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(TermOpVal, Ret, RET); } YY_BREAK case 80: YY_RULE_SETUP -#line 265 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(TermOpVal, Switch, SWITCH); } +#line 265 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(TermOpVal, Br, BR); } YY_BREAK case 81: YY_RULE_SETUP -#line 266 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(TermOpVal, Invoke, INVOKE); } +#line 266 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(TermOpVal, Switch, SWITCH); } YY_BREAK case 82: YY_RULE_SETUP -#line 267 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(TermOpVal, Unwind, UNWIND); } +#line 267 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(TermOpVal, Invoke, INVOKE); } YY_BREAK case 83: YY_RULE_SETUP -#line 268 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(TermOpVal, Unreachable, UNREACHABLE); } +#line 268 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(TermOpVal, Unwind, UNWIND); } YY_BREAK case 84: YY_RULE_SETUP -#line 270 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(MemOpVal, Malloc, MALLOC); } +#line 269 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(TermOpVal, Unreachable, UNREACHABLE); } YY_BREAK case 85: YY_RULE_SETUP -#line 271 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(MemOpVal, Alloca, ALLOCA); } +#line 271 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(MemOpVal, Malloc, MALLOC); } YY_BREAK case 86: YY_RULE_SETUP -#line 272 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(MemOpVal, Free, FREE); } +#line 272 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(MemOpVal, Alloca, ALLOCA); } YY_BREAK case 87: YY_RULE_SETUP -#line 273 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(MemOpVal, Load, LOAD); } +#line 273 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(MemOpVal, Free, FREE); } YY_BREAK case 88: YY_RULE_SETUP -#line 274 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(MemOpVal, Store, STORE); } +#line 274 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(MemOpVal, Load, LOAD); } YY_BREAK case 89: YY_RULE_SETUP -#line 275 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(MemOpVal, GetElementPtr, GETELEMENTPTR); } +#line 275 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(MemOpVal, Store, STORE); } YY_BREAK case 90: YY_RULE_SETUP -#line 277 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(OtherOpVal, ExtractElement, EXTRACTELEMENT); } +#line 276 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(MemOpVal, GetElementPtr, GETELEMENTPTR); } YY_BREAK case 91: YY_RULE_SETUP -#line 278 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TOK(OtherOpVal, InsertElement, INSERTELEMENT); } +#line 278 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(OtherOpVal, ExtractElement, EXTRACTELEMENT); } YY_BREAK case 92: YY_RULE_SETUP -#line 281 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 279 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +{ RET_TOK(OtherOpVal, InsertElement, INSERTELEMENT); } + YY_BREAK +case 93: +YY_RULE_SETUP +#line 282 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" { UnEscapeLexed(yytext+1); llvmAsmlval.StrVal = strdup(yytext+1); // Skip % return VAR_ID; } YY_BREAK -case 93: +case 94: YY_RULE_SETUP -#line 286 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 287 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" { yytext[strlen(yytext)-1] = 0; // nuke colon UnEscapeLexed(yytext); @@ -1621,9 +1633,9 @@ return LABELSTR; } YY_BREAK -case 94: +case 95: YY_RULE_SETUP -#line 292 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 293 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" { yytext[strlen(yytext)-2] = 0; // nuke colon, end quote UnEscapeLexed(yytext+1); @@ -1631,9 +1643,9 @@ return LABELSTR; } YY_BREAK -case 95: +case 96: YY_RULE_SETUP -#line 299 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 300 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" { // Note that we cannot unescape a string constant here! The // string constant might contain a \00 which would not be // understood by the string stuff. It is valid to make a @@ -1644,14 +1656,14 @@ return STRINGCONSTANT; } YY_BREAK -case 96: +case 97: YY_RULE_SETUP -#line 310 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 311 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" { llvmAsmlval.UInt64Val = atoull(yytext); return EUINT64VAL; } YY_BREAK -case 97: +case 98: YY_RULE_SETUP -#line 311 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 312 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" { uint64_t Val = atoull(yytext+1); // +1: we have bigger negative range @@ -1661,17 +1673,17 @@ return ESINT64VAL; } YY_BREAK -case 98: +case 99: YY_RULE_SETUP -#line 319 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 320 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" { llvmAsmlval.UInt64Val = HexIntToVal(yytext+3); return yytext[0] == 's' ? ESINT64VAL : EUINT64VAL; } YY_BREAK -case 99: +case 100: YY_RULE_SETUP -#line 324 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 325 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" { uint64_t Val = atoull(yytext+1); if ((unsigned)Val != Val) @@ -1680,9 +1692,9 @@ return UINTVAL; } YY_BREAK -case 100: +case 101: YY_RULE_SETUP -#line 331 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 332 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" { uint64_t Val = atoull(yytext+2); // +1: we have bigger negative range @@ -1692,18 +1704,18 @@ return SINTVAL; } YY_BREAK -case 101: +case 102: YY_RULE_SETUP -#line 340 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 341 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" { llvmAsmlval.FPVal = atof(yytext); return FPVAL; } YY_BREAK -case 102: +case 103: YY_RULE_SETUP -#line 341 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 342 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" { llvmAsmlval.FPVal = HexToFP(yytext); return FPVAL; } YY_BREAK case YY_STATE_EOF(INITIAL): -#line 343 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 344 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" { /* Make sure to free the internal buffers for flex when we are * done reading our input! @@ -1712,22 +1724,22 @@ return EOF; } YY_BREAK -case 103: +case 104: YY_RULE_SETUP -#line 351 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 352 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" { /* Ignore whitespace */ } YY_BREAK -case 104: +case 105: YY_RULE_SETUP -#line 352 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 353 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" { return yytext[0]; } YY_BREAK -case 105: +case 106: YY_RULE_SETUP -#line 354 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 355 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" YY_FATAL_ERROR( "flex scanner jammed" ); YY_BREAK -#line 1731 "Lexer.cpp" +#line 1743 "Lexer.cpp" case YY_END_OF_BUFFER: { @@ -2014,7 +2026,7 @@ while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) { yy_current_state = (int) yy_def[yy_current_state]; - if ( yy_current_state >= 434 ) + if ( yy_current_state >= 443 ) yy_c = yy_meta[(unsigned int) yy_c]; } yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c]; @@ -2044,11 +2056,11 @@ while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) { yy_current_state = (int) yy_def[yy_current_state]; - if ( yy_current_state >= 434 ) + if ( yy_current_state >= 443 ) yy_c = yy_meta[(unsigned int) yy_c]; } yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c]; - yy_is_jam = (yy_current_state == 433); + yy_is_jam = (yy_current_state == 442); if ( ! yy_is_jam ) *yy_state_ptr++ = yy_current_state; @@ -2609,5 +2621,5 @@ return 0; } #endif -#line 354 "/Users/sabre/cvs/llvm/lib/AsmParser/Lexer.l" +#line 355 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" Index: llvm/lib/AsmParser/llvmAsmParser.cpp diff -u llvm/lib/AsmParser/llvmAsmParser.cpp:1.34 llvm/lib/AsmParser/llvmAsmParser.cpp:1.35 --- llvm/lib/AsmParser/llvmAsmParser.cpp:1.34 Mon Jan 23 22:14:29 2006 +++ llvm/lib/AsmParser/llvmAsmParser.cpp Wed Jan 25 16:27:16 2006 @@ -1,5 +1,5 @@ -/* A Bison parser, made from /Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y +/* A Bison parser, made from /Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y by GNU Bison version 1.28 */ #define YYBISON 1 /* Identify Bison output. */ @@ -68,51 +68,53 @@ #define TAIL 311 #define ASM_TOK 312 #define MODULE 313 -#define CC_TOK 314 -#define CCC_TOK 315 -#define FASTCC_TOK 316 -#define COLDCC_TOK 317 -#define RET 318 -#define BR 319 -#define SWITCH 320 -#define INVOKE 321 -#define UNWIND 322 -#define UNREACHABLE 323 -#define ADD 324 -#define SUB 325 -#define MUL 326 -#define DIV 327 -#define REM 328 -#define AND 329 -#define OR 330 -#define XOR 331 -#define SETLE 332 -#define SETGE 333 -#define SETLT 334 -#define SETGT 335 -#define SETEQ 336 -#define SETNE 337 -#define MALLOC 338 -#define ALLOCA 339 -#define FREE 340 -#define LOAD 341 -#define STORE 342 -#define GETELEMENTPTR 343 -#define PHI_TOK 344 -#define CAST 345 -#define SELECT 346 -#define SHL 347 -#define SHR 348 -#define VAARG 349 -#define EXTRACTELEMENT 350 -#define INSERTELEMENT 351 -#define VAARG_old 352 -#define VANEXT_old 353 +#define SIDEEFFECT 314 +#define CC_TOK 315 +#define CCC_TOK 316 +#define FASTCC_TOK 317 +#define COLDCC_TOK 318 +#define RET 319 +#define BR 320 +#define SWITCH 321 +#define INVOKE 322 +#define UNWIND 323 +#define UNREACHABLE 324 +#define ADD 325 +#define SUB 326 +#define MUL 327 +#define DIV 328 +#define REM 329 +#define AND 330 +#define OR 331 +#define XOR 332 +#define SETLE 333 +#define SETGE 334 +#define SETLT 335 +#define SETGT 336 +#define SETEQ 337 +#define SETNE 338 +#define MALLOC 339 +#define ALLOCA 340 +#define FREE 341 +#define LOAD 342 +#define STORE 343 +#define GETELEMENTPTR 344 +#define PHI_TOK 345 +#define CAST 346 +#define SELECT 347 +#define SHL 348 +#define SHR 349 +#define VAARG 350 +#define EXTRACTELEMENT 351 +#define INSERTELEMENT 352 +#define VAARG_old 353 +#define VANEXT_old 354 -#line 14 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 14 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" #include "ParserInternals.h" #include "llvm/CallingConv.h" +#include "llvm/InlineAsm.h" #include "llvm/Instructions.h" #include "llvm/Module.h" #include "llvm/SymbolTable.h" @@ -415,6 +417,17 @@ ThrowException("Constant expression type different from required type!"); return D.ConstantValue; + case ValID::InlineAsmVal: { // Inline asm expression + const PointerType *PTy = dyn_cast(Ty); + const FunctionType *FTy = + PTy ? dyn_cast(PTy->getElementType()) : 0; + if (!FTy || !InlineAsm::Verify(FTy, D.IAD->Constraints)) + ThrowException("Invalid type for asm constraint string!"); + InlineAsm *IA = InlineAsm::get(FTy, D.IAD->AsmString, D.IAD->Constraints, + D.IAD->HasSideEffects); + D.destroy(); // Free InlineAsmDescriptor. + return IA; + } default: assert(0 && "Unhandled case!"); return 0; @@ -973,7 +986,7 @@ } -#line 878 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 890 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" typedef union { llvm::Module *ModuleVal; llvm::Function *FunctionVal; @@ -1023,26 +1036,26 @@ -#define YYFINAL 467 +#define YYFINAL 473 #define YYFLAG -32768 -#define YYNTBASE 114 +#define YYNTBASE 115 -#define YYTRANSLATE(x) ((unsigned)(x) <= 353 ? yytranslate[x] : 184) +#define YYTRANSLATE(x) ((unsigned)(x) <= 354 ? yytranslate[x] : 186) static const char yytranslate[] = { 0, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 103, - 104, 112, 2, 101, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 108, - 100, 109, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 104, + 105, 113, 2, 102, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 109, + 101, 110, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 105, 102, 107, 2, 2, 2, 2, 2, 113, 2, + 106, 103, 108, 2, 2, 2, 2, 2, 114, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 106, - 2, 2, 110, 2, 111, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 107, + 2, 2, 111, 2, 112, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, @@ -1065,7 +1078,7 @@ 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, - 97, 98, 99 + 97, 98, 99, 100 }; #if YYDEBUG != 0 @@ -1086,122 +1099,123 @@ 372, 376, 381, 382, 384, 386, 388, 392, 396, 400, 404, 408, 410, 411, 413, 415, 417, 418, 421, 425, 427, 429, 433, 435, 436, 445, 447, 449, 453, 455, - 457, 460, 461, 465, 467, 469, 471, 473, 475, 477, - 479, 481, 485, 487, 489, 491, 493, 495, 498, 501, - 504, 508, 511, 512, 514, 517, 520, 524, 534, 544, - 553, 567, 569, 571, 578, 584, 587, 594, 602, 604, - 608, 610, 611, 614, 616, 622, 628, 634, 637, 642, - 647, 654, 659, 664, 669, 674, 681, 684, 692, 694, - 697, 698, 700, 701, 705, 712, 716, 723, 726, 731, - 738 + 457, 460, 461, 465, 466, 468, 470, 472, 474, 476, + 478, 480, 482, 484, 488, 490, 496, 498, 500, 502, + 504, 507, 510, 513, 517, 520, 521, 523, 526, 529, + 533, 543, 553, 562, 576, 578, 580, 587, 593, 596, + 603, 611, 613, 617, 619, 620, 623, 625, 631, 637, + 643, 646, 651, 656, 663, 668, 673, 678, 683, 690, + 693, 701, 703, 706, 707, 709, 710, 714, 721, 725, + 732, 735, 740, 747 }; static const short yyrhs[] = { 5, - 0, 6, 0, 3, 0, 4, 0, 70, 0, 71, - 0, 72, 0, 73, 0, 74, 0, 75, 0, 76, - 0, 77, 0, 78, 0, 79, 0, 80, 0, 81, - 0, 82, 0, 83, 0, 93, 0, 94, 0, 16, + 0, 6, 0, 3, 0, 4, 0, 71, 0, 72, + 0, 73, 0, 74, 0, 75, 0, 76, 0, 77, + 0, 78, 0, 79, 0, 80, 0, 81, 0, 82, + 0, 83, 0, 84, 0, 94, 0, 95, 0, 16, 0, 14, 0, 12, 0, 10, 0, 17, 0, 15, - 0, 13, 0, 11, 0, 120, 0, 121, 0, 18, - 0, 19, 0, 154, 100, 0, 0, 41, 0, 42, - 0, 43, 0, 44, 0, 0, 0, 61, 0, 62, - 0, 63, 0, 60, 4, 0, 0, 54, 4, 0, - 0, 101, 54, 4, 0, 34, 24, 0, 0, 129, - 0, 0, 101, 132, 131, 0, 129, 0, 54, 4, - 0, 135, 0, 8, 0, 137, 0, 8, 0, 137, + 0, 13, 0, 11, 0, 121, 0, 122, 0, 18, + 0, 19, 0, 155, 101, 0, 0, 41, 0, 42, + 0, 43, 0, 44, 0, 0, 0, 62, 0, 63, + 0, 64, 0, 61, 4, 0, 0, 54, 4, 0, + 0, 102, 54, 4, 0, 34, 24, 0, 0, 130, + 0, 0, 102, 133, 132, 0, 130, 0, 54, 4, + 0, 136, 0, 8, 0, 138, 0, 8, 0, 138, 0, 9, 0, 10, 0, 11, 0, 12, 0, 13, 0, 14, 0, 15, 0, 16, 0, 17, 0, 18, - 0, 19, 0, 20, 0, 21, 0, 45, 0, 136, - 0, 167, 0, 102, 4, 0, 134, 103, 139, 104, - 0, 105, 4, 106, 137, 107, 0, 108, 4, 106, - 137, 109, 0, 110, 138, 111, 0, 110, 111, 0, - 137, 112, 0, 137, 0, 138, 101, 137, 0, 138, - 0, 138, 101, 37, 0, 37, 0, 0, 135, 105, - 142, 107, 0, 135, 105, 107, 0, 135, 113, 24, - 0, 135, 108, 142, 109, 0, 135, 110, 142, 111, - 0, 135, 110, 111, 0, 135, 38, 0, 135, 39, - 0, 135, 167, 0, 135, 141, 0, 135, 26, 0, - 120, 115, 0, 121, 4, 0, 9, 27, 0, 9, - 28, 0, 123, 7, 0, 91, 103, 140, 36, 135, - 104, 0, 89, 103, 140, 181, 104, 0, 92, 103, - 140, 101, 140, 101, 140, 104, 0, 116, 103, 140, - 101, 140, 104, 0, 117, 103, 140, 101, 140, 104, - 0, 118, 103, 140, 101, 140, 104, 0, 119, 103, - 140, 101, 140, 104, 0, 96, 103, 140, 101, 140, - 104, 0, 142, 101, 140, 0, 140, 0, 32, 0, - 33, 0, 145, 0, 145, 163, 0, 145, 164, 0, - 145, 59, 58, 149, 0, 145, 25, 0, 146, 0, - 146, 124, 20, 133, 0, 146, 164, 0, 146, 59, - 58, 149, 0, 0, 146, 124, 125, 143, 140, 147, - 131, 0, 0, 146, 124, 47, 143, 135, 148, 131, - 0, 146, 48, 151, 0, 146, 55, 100, 152, 0, - 0, 24, 0, 53, 0, 52, 0, 50, 100, 150, - 0, 51, 100, 4, 0, 49, 100, 24, 0, 105, - 153, 107, 0, 153, 101, 24, 0, 24, 0, 0, - 22, 0, 24, 0, 154, 0, 0, 135, 155, 0, - 157, 101, 156, 0, 156, 0, 157, 0, 157, 101, - 37, 0, 37, 0, 0, 126, 133, 154, 103, 158, - 104, 130, 127, 0, 29, 0, 110, 0, 125, 159, - 160, 0, 30, 0, 111, 0, 170, 162, 0, 0, - 31, 165, 159, 0, 3, 0, 4, 0, 7, 0, - 27, 0, 28, 0, 38, 0, 39, 0, 26, 0, - 108, 142, 109, 0, 141, 0, 114, 0, 154, 0, - 167, 0, 166, 0, 135, 168, 0, 170, 171, 0, - 161, 171, 0, 172, 124, 173, 0, 172, 175, 0, - 0, 23, 0, 64, 169, 0, 64, 8, 0, 65, - 21, 168, 0, 65, 9, 168, 101, 21, 168, 101, - 21, 168, 0, 66, 122, 168, 101, 21, 168, 105, - 174, 107, 0, 66, 122, 168, 101, 21, 168, 105, - 107, 0, 67, 126, 133, 168, 103, 178, 104, 36, - 21, 168, 68, 21, 168, 0, 68, 0, 69, 0, - 174, 122, 166, 101, 21, 168, 0, 122, 166, 101, - 21, 168, 0, 124, 180, 0, 135, 105, 168, 101, - 168, 107, 0, 176, 101, 105, 168, 101, 168, 107, - 0, 169, 0, 177, 101, 169, 0, 177, 0, 0, - 57, 56, 0, 56, 0, 116, 135, 168, 101, 168, - 0, 117, 135, 168, 101, 168, 0, 118, 135, 168, - 101, 168, 0, 46, 169, 0, 119, 169, 101, 169, - 0, 91, 169, 36, 135, 0, 92, 169, 101, 169, - 101, 169, 0, 95, 169, 101, 135, 0, 98, 169, - 101, 135, 0, 99, 169, 101, 135, 0, 96, 169, - 101, 169, 0, 97, 169, 101, 169, 101, 169, 0, - 90, 176, 0, 179, 126, 133, 168, 103, 178, 104, - 0, 183, 0, 101, 177, 0, 0, 35, 0, 0, - 84, 135, 128, 0, 84, 135, 101, 15, 168, 128, - 0, 85, 135, 128, 0, 85, 135, 101, 15, 168, - 128, 0, 86, 169, 0, 182, 87, 135, 168, 0, - 182, 88, 169, 101, 135, 168, 0, 89, 135, 168, - 181, 0 + 0, 19, 0, 20, 0, 21, 0, 45, 0, 137, + 0, 169, 0, 103, 4, 0, 135, 104, 140, 105, + 0, 106, 4, 107, 138, 108, 0, 109, 4, 107, + 138, 110, 0, 111, 139, 112, 0, 111, 112, 0, + 138, 113, 0, 138, 0, 139, 102, 138, 0, 139, + 0, 139, 102, 37, 0, 37, 0, 0, 136, 106, + 143, 108, 0, 136, 106, 108, 0, 136, 114, 24, + 0, 136, 109, 143, 110, 0, 136, 111, 143, 112, + 0, 136, 111, 112, 0, 136, 38, 0, 136, 39, + 0, 136, 169, 0, 136, 142, 0, 136, 26, 0, + 121, 116, 0, 122, 4, 0, 9, 27, 0, 9, + 28, 0, 124, 7, 0, 92, 104, 141, 36, 136, + 105, 0, 90, 104, 141, 183, 105, 0, 93, 104, + 141, 102, 141, 102, 141, 105, 0, 117, 104, 141, + 102, 141, 105, 0, 118, 104, 141, 102, 141, 105, + 0, 119, 104, 141, 102, 141, 105, 0, 120, 104, + 141, 102, 141, 105, 0, 97, 104, 141, 102, 141, + 105, 0, 143, 102, 141, 0, 141, 0, 32, 0, + 33, 0, 146, 0, 146, 164, 0, 146, 165, 0, + 146, 59, 58, 150, 0, 146, 25, 0, 147, 0, + 147, 125, 20, 134, 0, 147, 165, 0, 147, 59, + 58, 150, 0, 0, 147, 125, 126, 144, 141, 148, + 132, 0, 0, 147, 125, 47, 144, 136, 149, 132, + 0, 147, 48, 152, 0, 147, 55, 101, 153, 0, + 0, 24, 0, 53, 0, 52, 0, 50, 101, 151, + 0, 51, 101, 4, 0, 49, 101, 24, 0, 106, + 154, 108, 0, 154, 102, 24, 0, 24, 0, 0, + 22, 0, 24, 0, 155, 0, 0, 136, 156, 0, + 158, 102, 157, 0, 157, 0, 158, 0, 158, 102, + 37, 0, 37, 0, 0, 127, 134, 155, 104, 159, + 105, 131, 128, 0, 29, 0, 111, 0, 126, 160, + 161, 0, 30, 0, 112, 0, 172, 163, 0, 0, + 31, 166, 160, 0, 0, 60, 0, 3, 0, 4, + 0, 7, 0, 27, 0, 28, 0, 38, 0, 39, + 0, 26, 0, 109, 143, 110, 0, 142, 0, 58, + 167, 24, 102, 24, 0, 115, 0, 155, 0, 169, + 0, 168, 0, 136, 170, 0, 172, 173, 0, 162, + 173, 0, 174, 125, 175, 0, 174, 177, 0, 0, + 23, 0, 65, 171, 0, 65, 8, 0, 66, 21, + 170, 0, 66, 9, 170, 102, 21, 170, 102, 21, + 170, 0, 67, 123, 170, 102, 21, 170, 106, 176, + 108, 0, 67, 123, 170, 102, 21, 170, 106, 108, + 0, 68, 127, 134, 170, 104, 180, 105, 36, 21, + 170, 69, 21, 170, 0, 69, 0, 70, 0, 176, + 123, 168, 102, 21, 170, 0, 123, 168, 102, 21, + 170, 0, 125, 182, 0, 136, 106, 170, 102, 170, + 108, 0, 178, 102, 106, 170, 102, 170, 108, 0, + 171, 0, 179, 102, 171, 0, 179, 0, 0, 57, + 56, 0, 56, 0, 117, 136, 170, 102, 170, 0, + 118, 136, 170, 102, 170, 0, 119, 136, 170, 102, + 170, 0, 46, 171, 0, 120, 171, 102, 171, 0, + 92, 171, 36, 136, 0, 93, 171, 102, 171, 102, + 171, 0, 96, 171, 102, 136, 0, 99, 171, 102, + 136, 0, 100, 171, 102, 136, 0, 97, 171, 102, + 171, 0, 98, 171, 102, 171, 102, 171, 0, 91, + 178, 0, 181, 127, 134, 170, 104, 180, 105, 0, + 185, 0, 102, 179, 0, 0, 35, 0, 0, 85, + 136, 129, 0, 85, 136, 102, 15, 170, 129, 0, + 86, 136, 129, 0, 86, 136, 102, 15, 170, 129, + 0, 87, 171, 0, 184, 88, 136, 170, 0, 184, + 89, 171, 102, 136, 170, 0, 90, 136, 170, 183, + 0 }; #endif #if YYDEBUG != 0 static const short yyrline[] = { 0, - 997, 998, 1005, 1006, 1015, 1015, 1015, 1015, 1015, 1016, - 1016, 1016, 1017, 1017, 1017, 1017, 1017, 1017, 1019, 1019, - 1023, 1023, 1023, 1023, 1024, 1024, 1024, 1024, 1025, 1025, - 1026, 1026, 1029, 1032, 1036, 1036, 1037, 1038, 1039, 1042, - 1042, 1043, 1044, 1045, 1054, 1054, 1060, 1060, 1068, 1075, - 1075, 1081, 1081, 1083, 1087, 1100, 1100, 1101, 1101, 1103, - 1112, 1112, 1112, 1112, 1112, 1112, 1112, 1113, 1113, 1113, - 1113, 1113, 1113, 1114, 1117, 1120, 1126, 1133, 1145, 1149, - 1160, 1169, 1172, 1180, 1184, 1189, 1190, 1193, 1196, 1206, - 1231, 1244, 1273, 1298, 1318, 1330, 1339, 1343, 1402, 1408, - 1416, 1421, 1426, 1429, 1432, 1439, 1449, 1480, 1487, 1508, - 1518, 1523, 1530, 1540, 1543, 1550, 1550, 1560, 1567, 1571, - 1574, 1577, 1580, 1593, 1613, 1615, 1617, 1620, 1623, 1627, - 1630, 1632, 1634, 1638, 1650, 1651, 1653, 1656, 1664, 1669, - 1671, 1675, 1679, 1687, 1687, 1688, 1688, 1690, 1696, 1701, - 1707, 1710, 1715, 1719, 1723, 1809, 1809, 1811, 1819, 1819, - 1821, 1825, 1825, 1834, 1837, 1840, 1843, 1846, 1849, 1852, - 1855, 1858, 1882, 1889, 1892, 1897, 1897, 1903, 1907, 1910, - 1918, 1927, 1931, 1941, 1952, 1955, 1958, 1961, 1964, 1978, - 1982, 2035, 2038, 2044, 2052, 2062, 2069, 2074, 2081, 2085, - 2091, 2091, 2093, 2096, 2102, 2114, 2125, 2135, 2147, 2154, - 2161, 2168, 2173, 2192, 2214, 2222, 2234, 2248, 2305, 2311, - 2313, 2317, 2320, 2326, 2330, 2334, 2338, 2342, 2349, 2359, - 2372 + 1010, 1011, 1018, 1019, 1028, 1028, 1028, 1028, 1028, 1029, + 1029, 1029, 1030, 1030, 1030, 1030, 1030, 1030, 1032, 1032, + 1036, 1036, 1036, 1036, 1037, 1037, 1037, 1037, 1038, 1038, + 1039, 1039, 1042, 1045, 1049, 1049, 1050, 1051, 1052, 1055, + 1055, 1056, 1057, 1058, 1067, 1067, 1073, 1073, 1081, 1088, + 1088, 1094, 1094, 1096, 1100, 1113, 1113, 1114, 1114, 1116, + 1125, 1125, 1125, 1125, 1125, 1125, 1125, 1126, 1126, 1126, + 1126, 1126, 1126, 1127, 1130, 1133, 1139, 1146, 1158, 1162, + 1173, 1182, 1185, 1193, 1197, 1202, 1203, 1206, 1209, 1219, + 1244, 1257, 1286, 1311, 1331, 1343, 1352, 1356, 1415, 1421, + 1429, 1434, 1439, 1442, 1445, 1452, 1462, 1493, 1500, 1521, + 1531, 1536, 1543, 1553, 1556, 1563, 1563, 1573, 1580, 1584, + 1587, 1590, 1593, 1606, 1626, 1628, 1630, 1633, 1636, 1640, + 1643, 1645, 1647, 1651, 1663, 1664, 1666, 1669, 1677, 1682, + 1684, 1688, 1692, 1700, 1700, 1701, 1701, 1703, 1709, 1714, + 1720, 1723, 1728, 1732, 1736, 1822, 1822, 1824, 1832, 1832, + 1834, 1838, 1838, 1847, 1850, 1854, 1857, 1860, 1863, 1866, + 1869, 1872, 1875, 1878, 1902, 1905, 1918, 1921, 1926, 1926, + 1932, 1936, 1939, 1947, 1956, 1960, 1970, 1981, 1984, 1987, + 1990, 1993, 2007, 2011, 2064, 2067, 2073, 2081, 2091, 2098, + 2103, 2110, 2114, 2120, 2120, 2122, 2125, 2131, 2143, 2154, + 2164, 2176, 2183, 2190, 2197, 2202, 2221, 2243, 2251, 2263, + 2277, 2334, 2340, 2342, 2346, 2349, 2355, 2359, 2363, 2367, + 2371, 2378, 2388, 2401 }; #endif @@ -1215,8 +1229,8 @@ "BEGINTOK","ENDTOK","DECLARE","GLOBAL","CONSTANT","SECTION","VOLATILE","TO", "DOTDOTDOT","NULL_TOK","UNDEF","CONST","INTERNAL","LINKONCE","WEAK","APPENDING", "OPAQUE","NOT","EXTERNAL","TARGET","TRIPLE","ENDIAN","POINTERSIZE","LITTLE", -"BIG","ALIGN","DEPLIBS","CALL","TAIL","ASM_TOK","MODULE","CC_TOK","CCC_TOK", -"FASTCC_TOK","COLDCC_TOK","RET","BR","SWITCH","INVOKE","UNWIND","UNREACHABLE", +"BIG","ALIGN","DEPLIBS","CALL","TAIL","ASM_TOK","MODULE","SIDEEFFECT","CC_TOK", +"CCC_TOK","FASTCC_TOK","COLDCC_TOK","RET","BR","SWITCH","INVOKE","UNWIND","UNREACHABLE", "ADD","SUB","MUL","DIV","REM","AND","OR","XOR","SETLE","SETGE","SETLT","SETGT", "SETEQ","SETNE","MALLOC","ALLOCA","FREE","LOAD","STORE","GETELEMENTPTR","PHI_TOK", "CAST","SELECT","SHL","SHR","VAARG","EXTRACTELEMENT","INSERTELEMENT","VAARG_old", @@ -1228,38 +1242,38 @@ "ArgTypeListI","ConstVal","ConstExpr","ConstVector","GlobalType","Module","FunctionList", "ConstPool","@1","@2","AsmBlock","BigOrLittle","TargetDefinition","LibrariesDefinition", "LibList","Name","OptName","ArgVal","ArgListH","ArgList","FunctionHeaderH","BEGIN", -"FunctionHeader","END","Function","FunctionProto","@3","ConstValueRef","SymbolicValueRef", -"ValueRef","ResolvedVal","BasicBlockList","BasicBlock","InstructionList","BBTerminatorInst", -"JumpTable","Inst","PHIList","ValueRefList","ValueRefListE","OptTailCall","InstVal", -"IndexList","OptVolatile","MemoryInst", NULL +"FunctionHeader","END","Function","FunctionProto","@3","OptSideEffect","ConstValueRef", +"SymbolicValueRef","ValueRef","ResolvedVal","BasicBlockList","BasicBlock","InstructionList", +"BBTerminatorInst","JumpTable","Inst","PHIList","ValueRefList","ValueRefListE", +"OptTailCall","InstVal","IndexList","OptVolatile","MemoryInst", NULL }; #endif static const short yyr1[] = { 0, - 114, 114, 115, 115, 116, 116, 116, 116, 116, 117, - 117, 117, 118, 118, 118, 118, 118, 118, 119, 119, - 120, 120, 120, 120, 121, 121, 121, 121, 122, 122, - 123, 123, 124, 124, 125, 125, 125, 125, 125, 126, - 126, 126, 126, 126, 127, 127, 128, 128, 129, 130, - 130, 131, 131, 132, 132, 133, 133, 134, 134, 135, - 136, 136, 136, 136, 136, 136, 136, 136, 136, 136, - 136, 136, 136, 137, 137, 137, 137, 137, 137, 137, - 137, 137, 137, 138, 138, 139, 139, 139, 139, 140, - 140, 140, 140, 140, 140, 140, 140, 140, 140, 140, - 140, 140, 140, 140, 140, 141, 141, 141, 141, 141, - 141, 141, 141, 142, 142, 143, 143, 144, 145, 145, - 145, 145, 145, 146, 146, 146, 147, 146, 148, 146, - 146, 146, 146, 149, 150, 150, 151, 151, 151, 152, - 153, 153, 153, 154, 154, 155, 155, 156, 157, 157, - 158, 158, 158, 158, 159, 160, 160, 161, 162, 162, - 163, 165, 164, 166, 166, 166, 166, 166, 166, 166, - 166, 166, 166, 167, 167, 168, 168, 169, 170, 170, - 171, 172, 172, 172, 173, 173, 173, 173, 173, 173, - 173, 173, 173, 174, 174, 175, 176, 176, 177, 177, - 178, 178, 179, 179, 180, 180, 180, 180, 180, 180, - 180, 180, 180, 180, 180, 180, 180, 180, 180, 181, - 181, 182, 182, 183, 183, 183, 183, 183, 183, 183, - 183 + 115, 115, 116, 116, 117, 117, 117, 117, 117, 118, + 118, 118, 119, 119, 119, 119, 119, 119, 120, 120, + 121, 121, 121, 121, 122, 122, 122, 122, 123, 123, + 124, 124, 125, 125, 126, 126, 126, 126, 126, 127, + 127, 127, 127, 127, 128, 128, 129, 129, 130, 131, + 131, 132, 132, 133, 133, 134, 134, 135, 135, 136, + 137, 137, 137, 137, 137, 137, 137, 137, 137, 137, + 137, 137, 137, 138, 138, 138, 138, 138, 138, 138, + 138, 138, 138, 139, 139, 140, 140, 140, 140, 141, + 141, 141, 141, 141, 141, 141, 141, 141, 141, 141, + 141, 141, 141, 141, 141, 142, 142, 142, 142, 142, + 142, 142, 142, 143, 143, 144, 144, 145, 146, 146, + 146, 146, 146, 147, 147, 147, 148, 147, 149, 147, + 147, 147, 147, 150, 151, 151, 152, 152, 152, 153, + 154, 154, 154, 155, 155, 156, 156, 157, 158, 158, + 159, 159, 159, 159, 160, 161, 161, 162, 163, 163, + 164, 166, 165, 167, 167, 168, 168, 168, 168, 168, + 168, 168, 168, 168, 168, 168, 169, 169, 170, 170, + 171, 172, 172, 173, 174, 174, 174, 175, 175, 175, + 175, 175, 175, 175, 175, 175, 176, 176, 177, 178, + 178, 179, 179, 180, 180, 181, 181, 182, 182, 182, + 182, 182, 182, 182, 182, 182, 182, 182, 182, 182, + 182, 182, 183, 183, 184, 184, 185, 185, 185, 185, + 185, 185, 185, 185 }; static const short yyr2[] = { 0, @@ -1279,229 +1293,223 @@ 3, 4, 0, 1, 1, 1, 3, 3, 3, 3, 3, 1, 0, 1, 1, 1, 0, 2, 3, 1, 1, 3, 1, 0, 8, 1, 1, 3, 1, 1, - 2, 0, 3, 1, 1, 1, 1, 1, 1, 1, - 1, 3, 1, 1, 1, 1, 1, 2, 2, 2, - 3, 2, 0, 1, 2, 2, 3, 9, 9, 8, - 13, 1, 1, 6, 5, 2, 6, 7, 1, 3, - 1, 0, 2, 1, 5, 5, 5, 2, 4, 4, - 6, 4, 4, 4, 4, 6, 2, 7, 1, 2, - 0, 1, 0, 3, 6, 3, 6, 2, 4, 6, - 4 + 2, 0, 3, 0, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 3, 1, 5, 1, 1, 1, 1, + 2, 2, 2, 3, 2, 0, 1, 2, 2, 3, + 9, 9, 8, 13, 1, 1, 6, 5, 2, 6, + 7, 1, 3, 1, 0, 2, 1, 5, 5, 5, + 2, 4, 4, 6, 4, 4, 4, 4, 6, 2, + 7, 1, 2, 0, 1, 0, 3, 6, 3, 6, + 2, 4, 6, 4 }; static const short yydefact[] = { 133, 39, 123, 122, 162, 35, 36, 37, 38, 0, 40, - 183, 119, 120, 183, 144, 145, 0, 0, 0, 39, + 186, 119, 120, 186, 144, 145, 0, 0, 0, 39, 0, 125, 40, 0, 0, 41, 42, 43, 0, 0, - 184, 180, 34, 159, 160, 161, 179, 0, 0, 0, + 187, 183, 34, 159, 160, 161, 182, 0, 0, 0, 131, 0, 0, 0, 0, 0, 33, 163, 134, 121, 44, 1, 2, 57, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 0, 0, - 0, 0, 174, 0, 0, 56, 75, 60, 175, 76, - 156, 157, 158, 223, 182, 0, 0, 0, 143, 132, + 0, 0, 177, 0, 0, 56, 75, 60, 178, 76, + 156, 157, 158, 226, 185, 0, 0, 0, 143, 132, 126, 124, 116, 117, 0, 0, 77, 0, 0, 59, - 82, 84, 0, 0, 89, 83, 222, 0, 204, 0, - 0, 0, 0, 40, 192, 193, 5, 6, 7, 8, + 82, 84, 0, 0, 89, 83, 225, 0, 207, 0, + 0, 0, 0, 40, 195, 196, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 0, 0, 0, 0, 0, 0, 0, 19, 20, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 181, 40, - 196, 0, 219, 139, 136, 135, 137, 138, 142, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 184, 40, + 199, 0, 222, 139, 136, 135, 137, 138, 142, 0, 129, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 0, 0, 0, 0, 127, 0, 0, 0, - 81, 154, 88, 86, 0, 0, 208, 203, 186, 185, + 81, 154, 88, 86, 0, 0, 211, 206, 189, 188, 0, 0, 24, 28, 23, 27, 22, 26, 21, 25, - 29, 30, 0, 0, 47, 47, 228, 0, 0, 217, + 29, 30, 0, 0, 47, 47, 231, 0, 0, 220, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 140, 52, 103, 104, 3, 4, 101, 102, 105, 100, 96, 97, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 99, 98, 52, 58, 58, 85, 153, 147, 150, 151, 0, - 0, 78, 164, 165, 166, 171, 167, 168, 169, 170, - 0, 173, 177, 176, 178, 0, 187, 0, 0, 0, - 224, 0, 226, 221, 0, 0, 0, 0, 0, 0, + 0, 78, 166, 167, 168, 173, 169, 170, 171, 172, + 164, 0, 175, 180, 179, 181, 0, 190, 0, 0, + 0, 227, 0, 229, 224, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 141, 0, 130, 0, 0, 0, 0, 91, 115, 0, - 0, 95, 0, 92, 0, 0, 0, 0, 128, 79, - 80, 146, 148, 0, 50, 87, 0, 0, 0, 0, - 0, 0, 0, 0, 231, 0, 0, 210, 0, 212, - 215, 0, 213, 214, 0, 0, 0, 209, 0, 229, - 0, 0, 0, 54, 52, 221, 0, 0, 0, 0, - 90, 93, 94, 0, 0, 0, 0, 152, 149, 51, - 45, 172, 0, 0, 202, 47, 48, 47, 199, 220, - 0, 0, 0, 0, 205, 206, 207, 202, 0, 49, - 55, 53, 0, 0, 0, 0, 114, 0, 0, 0, - 0, 0, 155, 0, 0, 201, 0, 0, 225, 227, - 0, 0, 0, 211, 216, 0, 230, 107, 0, 0, - 0, 0, 0, 0, 0, 46, 0, 0, 0, 200, - 197, 0, 218, 106, 0, 113, 109, 110, 111, 112, - 0, 190, 0, 0, 0, 198, 0, 188, 0, 189, - 0, 0, 108, 0, 0, 0, 0, 0, 0, 195, - 0, 0, 194, 191, 0, 0, 0 + 0, 141, 0, 130, 0, 0, 0, 0, 91, 115, + 0, 0, 95, 0, 92, 0, 0, 0, 0, 128, + 79, 80, 146, 148, 0, 50, 87, 165, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 234, 0, 0, + 213, 0, 215, 218, 0, 216, 217, 0, 0, 0, + 212, 0, 232, 0, 0, 0, 54, 52, 224, 0, + 0, 0, 0, 90, 93, 94, 0, 0, 0, 0, + 152, 149, 51, 45, 0, 174, 0, 0, 205, 47, + 48, 47, 202, 223, 0, 0, 0, 0, 208, 209, + 210, 205, 0, 49, 55, 53, 0, 0, 0, 0, + 114, 0, 0, 0, 0, 0, 155, 0, 0, 0, + 204, 0, 0, 228, 230, 0, 0, 0, 214, 219, + 0, 233, 107, 0, 0, 0, 0, 0, 0, 0, + 46, 176, 0, 0, 0, 203, 200, 0, 221, 106, + 0, 113, 109, 110, 111, 112, 0, 193, 0, 0, + 0, 201, 0, 191, 0, 192, 0, 0, 108, 0, + 0, 0, 0, 0, 0, 198, 0, 0, 197, 194, + 0, 0, 0 }; static const short yydefgoto[] = { 73, 232, 246, 247, 248, 249, 173, 174, 203, 175, 20, - 10, 29, 403, 281, 354, 371, 303, 355, 74, 75, - 186, 77, 78, 103, 185, 309, 272, 310, 95, 465, + 10, 29, 407, 282, 357, 374, 304, 358, 74, 75, + 186, 77, 78, 103, 185, 310, 273, 311, 95, 471, 1, 2, 252, 227, 50, 157, 41, 90, 160, 79, - 323, 258, 259, 260, 30, 83, 11, 36, 12, 13, - 23, 273, 80, 275, 379, 14, 32, 33, 149, 444, - 85, 210, 406, 407, 150, 151, 335, 152, 153 + 324, 258, 259, 260, 30, 83, 11, 36, 12, 13, + 23, 329, 274, 80, 276, 383, 14, 32, 33, 149, + 450, 85, 210, 411, 412, 150, 151, 338, 152, 153 }; static const short yypact[] = {-32768, - 37, 361,-32768,-32768,-32768,-32768,-32768,-32768, -44, 49, - 38,-32768,-32768, 3,-32768,-32768, 70, -2, 42, 50, - 4,-32768, 49, 89, 125,-32768,-32768,-32768, 1054, -21, --32768,-32768, 64,-32768,-32768,-32768,-32768, 26, 45, 47, --32768, 69, 89, 1054, 117, 117,-32768,-32768,-32768,-32768, --32768,-32768,-32768, 73,-32768,-32768,-32768,-32768,-32768,-32768, --32768,-32768,-32768,-32768,-32768,-32768,-32768,-32768, 174, 179, - 180, 122,-32768, 64, 82,-32768,-32768, -27,-32768,-32768, --32768,-32768,-32768, 1215,-32768, 163, -25, 186, 168,-32768, --32768,-32768,-32768,-32768, 1092, 1130,-32768, 85, 90,-32768, --32768, -27, -38, 94, 864,-32768,-32768, 1092,-32768, 142, - 1168, 23, 144, 49,-32768,-32768,-32768,-32768,-32768,-32768, + 30, 99,-32768,-32768,-32768,-32768,-32768,-32768, -47, 46, + 33,-32768,-32768, -13,-32768,-32768, 75, -32, 26, 21, + -3,-32768, 46, 63, 100,-32768,-32768,-32768, 974, -21, +-32768,-32768, 105,-32768,-32768,-32768,-32768, 10, 27, 32, +-32768, 38, 63, 974, 103, 103,-32768,-32768,-32768,-32768, +-32768,-32768,-32768, 18,-32768,-32768,-32768,-32768,-32768,-32768, +-32768,-32768,-32768,-32768,-32768,-32768,-32768,-32768, 135, 148, + 155, 490,-32768, 105, 67,-32768,-32768, -64,-32768,-32768, +-32768,-32768,-32768, 1136,-32768, 149, 85, 172, 154,-32768, +-32768,-32768,-32768,-32768, 1012, 1050,-32768, 73, 76,-32768, +-32768, -64, -17, 80, 784,-32768,-32768, 1012,-32768, 129, + 1088, 23, 221, 46,-32768,-32768,-32768,-32768,-32768,-32768, -32768,-32768,-32768,-32768,-32768,-32768,-32768,-32768,-32768,-32768, - 1092, 1092, 1092, 1092, 1092, 1092, 1092,-32768,-32768, 1092, - 1092, 1092, 1092, 1092, 1092, 1092, 1092, 1092,-32768, 49, --32768, 75,-32768,-32768,-32768,-32768,-32768,-32768,-32768, -36, --32768, 124, 162, 195, 165, 196, 167, 197, 169, 198, - 200, 201, 177, 199, 209, 531,-32768, 1092, 1092, 1092, --32768, 902,-32768, 103, 101, 680,-32768,-32768, 73,-32768, - 680, 680,-32768,-32768,-32768,-32768,-32768,-32768,-32768,-32768, --32768,-32768, 680, 1054, 116, 118,-32768, 680, 113, 127, - 189, 130, 133, 134, 135, 136, 137, 680, 680, 680, - 139, 1054, 1092, 1092, 202,-32768, 140,-32768,-32768,-32768, --32768,-32768,-32768,-32768,-32768,-32768,-32768, 143, 145, 146, - 147, 940, 1130, 637, 219, 148, 149, 150, 151,-32768, --32768, 140, -35, -64, -27,-32768, 64,-32768, 154, 153, - 978,-32768,-32768,-32768,-32768,-32768,-32768,-32768,-32768,-32768, - 1130,-32768,-32768,-32768,-32768, 158,-32768, 161, 680, -5, --32768, 15,-32768, 173, 680, 164, 1092, 1092, 1092, 1092, - 1092, 1092, 1092, 178, 182, 183, 1092, 680, 680, 184, --32768, -18,-32768, 1130, 1130, 1130, 1130,-32768,-32768, -6, - -26,-32768, -37,-32768, 1130, 1130, 1130, 1130,-32768,-32768, --32768,-32768,-32768, 1016, 213,-32768, -19, 245, 247, 187, - 680, 266, 680, 1092,-32768, 190, 680,-32768, 191,-32768, --32768, 192,-32768,-32768, 680, 680, 680,-32768, 193,-32768, - 1092, 256, 290,-32768, 140, 173, 261, 206, 207, 1130, --32768,-32768,-32768, 210, 211, 212, 214,-32768,-32768,-32768, - 244,-32768, 680, 680, 1092, 215,-32768, 215,-32768, 218, - 680, 220, 1092, 1092,-32768,-32768,-32768, 1092, 680,-32768, --32768,-32768, 216, 1092, 1130, 1130,-32768, 1130, 1130, 1130, - 1130, 295,-32768, 222, 205, 218, 221, 248,-32768,-32768, - 1092, 217, 680,-32768,-32768, 223,-32768,-32768, 224, 225, - 231, 232, 233, 235, 238,-32768, 293, 8, 307,-32768, --32768, 237,-32768,-32768, 1130,-32768,-32768,-32768,-32768,-32768, - 680,-32768, 763, 41, 324,-32768, 243,-32768, 249,-32768, - 763, 680,-32768, 327, 252, 281, 680, 333, 334,-32768, - 680, 680,-32768,-32768, 359, 360,-32768 + 1012, 1012, 1012, 1012, 1012, 1012, 1012,-32768,-32768, 1012, + 1012, 1012, 1012, 1012, 1012, 1012, 1012, 1012,-32768, 46, +-32768, 60,-32768,-32768,-32768,-32768,-32768,-32768,-32768, -14, +-32768, 123, 153, 182, 159, 186, 162, 187, 164, 188, + 189, 190, 166, 194, 193, 372,-32768, 1012, 1012, 1012, +-32768, 822,-32768, 101, 102, 622,-32768,-32768, 18,-32768, + 622, 622,-32768,-32768,-32768,-32768,-32768,-32768,-32768,-32768, +-32768,-32768, 622, 974, 104, 107,-32768, 622, 98, 108, + 169, 109, 110, 118, 119, 120, 121, 622, 622, 622, + 122, 974, 1012, 1012, 201,-32768, 124,-32768,-32768,-32768, +-32768,-32768,-32768,-32768,-32768,-32768,-32768, 136, 137, 138, + 141, 860, 1050, 531, 215, 142, 143, 144, 146,-32768, +-32768, 124, -75, -53, -64,-32768, 105,-32768, 150, 139, + 898,-32768,-32768,-32768,-32768,-32768,-32768,-32768,-32768,-32768, + 191, 1050,-32768,-32768,-32768,-32768, 151,-32768, 152, 622, + 5,-32768, 16,-32768, 158, 622, 156, 1012, 1012, 1012, + 1012, 1012, 1012, 1012, 161, 165, 168, 1012, 622, 622, + 170,-32768, -18,-32768, 1050, 1050, 1050, 1050,-32768,-32768, + -11, -65,-32768, -16,-32768, 1050, 1050, 1050, 1050,-32768, +-32768,-32768,-32768,-32768, 936, 222,-32768,-32768, 233, -10, + 245, 250, 171, 622, 269, 622, 1012,-32768, 178, 622, +-32768, 179,-32768,-32768, 180,-32768,-32768, 622, 622, 622, +-32768, 181,-32768, 1012, 259, 280,-32768, 124, 158, 255, + 184, 192, 1050,-32768,-32768,-32768, 197, 198, 199, 200, +-32768,-32768,-32768, 238, 202,-32768, 622, 622, 1012, 204, +-32768, 204,-32768, 205, 622, 206, 1012, 1012,-32768,-32768, +-32768, 1012, 622,-32768,-32768,-32768, 207, 1012, 1050, 1050, +-32768, 1050, 1050, 1050, 1050, 289,-32768, 271, 218, 223, + 205, 216, 270,-32768,-32768, 1012, 219, 622,-32768,-32768, + 225,-32768,-32768, 228, 226, 230, 231, 232, 235, 236, +-32768,-32768, 321, 12, 308,-32768,-32768, 237,-32768,-32768, + 1050,-32768,-32768,-32768,-32768,-32768, 622,-32768, 682, 66, + 328,-32768, 246,-32768, 248,-32768, 682, 622,-32768, 332, + 253, 287, 622, 336, 340,-32768, 622, 622,-32768,-32768, + 363, 364,-32768 }; static const short yypgoto[] = {-32768, --32768, 277, 278, 279, 280, -111, -110, -415,-32768, 335, - 353, -103,-32768, -199, 51,-32768, -247,-32768, -40,-32768, - -29,-32768, -55, 269,-32768, -95, 203, -184, 329,-32768, --32768,-32768,-32768,-32768, 337,-32768,-32768,-32768,-32768, 10, --32768, 54,-32768,-32768, 354,-32768,-32768,-32768,-32768, 380, --32768, -344, 53, 138, -102,-32768, 373,-32768,-32768,-32768, --32768,-32768, 55, 0,-32768,-32768, 35,-32768,-32768 +-32768, 281, 282, 283, 284, -112, -111, -415,-32768, 339, + 359, -102,-32768, -201, 54,-32768, -243,-32768, -40,-32768, + -29,-32768, -66, 276,-32768, -89, 208, -230, 337,-32768, +-32768,-32768,-32768,-32768, 342,-32768,-32768,-32768,-32768, 1, +-32768, 57,-32768,-32768, 365,-32768,-32768,-32768,-32768, 384, +-32768,-32768, -356, -31, 140, -90,-32768, 375,-32768,-32768, +-32768,-32768,-32768, 53, -1,-32768,-32768, 34,-32768,-32768 }; -#define YYLAST 1314 +#define YYLAST 1236 static const short yytable[] = { 76, - 177, 201, 202, 92, 319, 187, 283, 81, 190, 331, - 204, 21, 443, 24, 76, 352, 102, 193, 194, 195, - 196, 197, 198, 199, 200, 31, 155, 156, 451, 333, - 207, 191, 34, 211, 212, 353, -118, 213, 214, 215, - 216, 217, 21, 192, 321, 221, 222, 106, 332, 102, - 193, 194, 195, 196, 197, 198, 199, 200, 311, 313, - 31, 3, 180, 360, 225, 161, 176, 4, 332, 44, - 226, 320, 181, 363, 360, -58, 106, 5, 6, 7, - 8, 360, 362, 104, 106, 15, 327, 16, 82, 372, - 5, 6, 7, 8, 360, 9, 45, 42, 449, 43, - 361, 205, 206, 47, 208, 209, 455, 392, 25, 26, - 27, 28, 49, 35, 442, 218, 219, 220, 38, 39, - 40, 300, 253, 254, 255, 86, 52, 53, 51, 100, - 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, - 65, 66, 67, 15, 87, 16, 88, 450, 93, 94, - 228, 229, 257, 193, 194, 195, 196, 197, 198, 199, - 200, 223, 224, 279, -24, -24, 68, -23, -23, -22, - -22, -21, -21, 89, 76, -59, 409, 97, 410, 230, - 231, 298, 98, 99, 105, 339, 154, 341, 342, 158, - 178, 159, 76, 299, 348, 179, 182, 188, -28, -27, - -26, -25, 233, 261, 262, 255, -31, -32, 356, 357, - 358, 359, 176, 176, 176, 234, 280, 285, 282, 364, - 365, 366, 367, 69, 287, 301, 70, 286, 251, 71, - 288, 72, 101, 289, 290, 291, 292, 293, 274, 297, - 302, 176, 314, 274, 274, 304, 352, 305, 306, 307, - 315, 316, 317, 318, 324, 274, 325, 338, 328, 340, - 274, 329, 343, 344, 397, 373, 322, 374, 337, 377, - 274, 274, 274, 334, 176, 176, 176, 176, 345, 390, - 414, 415, 346, 347, 351, 176, 176, 176, 176, 375, - 381, 383, 384, 391, 257, 388, 394, 402, 426, 420, - 421, 332, 422, 423, 424, 425, 395, 396, 430, 428, - 398, 399, 400, 441, 401, 408, 201, 202, 411, 418, - 413, 389, 427, 431, 429, 435, 433, 434, 276, 277, - 176, 274, 201, 202, 436, 437, 438, 274, 439, 447, - 278, 440, 445, 446, 452, 284, 453, 457, 459, 454, - 274, 274, 458, 461, 462, 294, 295, 296, 466, 467, - 145, 146, 147, 148, 419, 176, 176, 84, 176, 176, - 176, 176, 46, 184, 96, 370, 48, 369, 250, 91, - -34, 22, 15, 274, 16, 274, 37, 416, 380, 274, - 393, 4, -34, -34, 0, 0, 0, 274, 274, 274, - 0, -34, -34, -34, -34, 176, 0, -34, 17, 0, - 0, 0, 0, 0, 0, 18, 330, 0, 0, 19, - 0, 0, 336, 0, 0, 274, 274, 0, 0, 0, - 0, 0, 0, 274, 0, 349, 350, 0, 0, 0, - 0, 274, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 274, 0, 0, 376, 0, - 378, 0, 0, 0, 382, 0, 0, 0, 0, 0, - 0, 0, 385, 386, 387, 0, 0, 0, 0, 0, - 0, 0, 0, 274, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 274, 0, 0, 0, 0, 274, - 404, 405, 0, 274, 274, 0, 0, 0, 412, 0, - 0, 0, 0, 0, 0, 0, 417, 0, 0, 0, - 0, 0, 0, 0, 0, 52, 53, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 432, 0, 15, 0, 16, 0, 235, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 236, 237, - 0, 0, 0, 0, 0, 0, 0, 0, 448, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 456, - 0, 0, 0, 0, 460, 0, 0, 0, 463, 464, - 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, - 127, 128, 129, 130, 0, 0, 0, 0, 0, 238, - 0, 239, 240, 138, 139, 0, 241, 0, 0, 0, - 0, 0, 0, 0, 0, 242, 0, 0, 243, 0, - 244, 52, 53, 245, 100, 162, 163, 164, 165, 166, - 167, 168, 169, 170, 171, 172, 66, 67, 15, 0, - 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 68, 263, 264, 52, 53, 265, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 15, 0, 16, 0, 266, 267, 268, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 269, 270, 0, + 201, 202, 21, 92, 284, 102, 177, 81, 320, 31, + 24, 204, 312, 314, 76, 355, 34, 187, 449, 334, + 190, 193, 194, 195, 196, 197, 198, 199, 200, -118, + 336, 191, 321, 21, 457, 356, 363, 106, 102, -58, + 44, 330, 207, 192, 365, 211, 212, 222, 106, 213, + 214, 215, 216, 217, 3, 31, 322, 221, 335, 106, + 4, 5, 6, 7, 8, 161, 176, 45, 42, 335, + 5, 6, 7, 8, 104, 193, 194, 195, 196, 197, + 198, 199, 200, 43, 180, 363, 49, 225, 9, 82, + 363, 363, 455, 226, 181, 366, 364, 47, 35, 376, + 461, 205, 206, 51, 208, 209, 25, 26, 27, 28, + 86, 253, 254, 255, 396, 218, 219, 220, -34, 448, + 15, -59, 16, 38, 39, 40, 15, 87, 16, 4, + -34, -34, 88, 301, 93, 94, 155, 156, 97, -34, + -34, -34, -34, 89, 251, -34, 17, 223, 224, 228, + 229, 98, 257, 18, 275, -24, -24, 19, 99, 275, + 275, -23, -23, 280, -22, -22, -21, -21, 230, 231, + 105, 275, 154, 456, 76, 158, 275, 159, 414, 178, + 415, 299, 179, 182, 188, -28, 275, 275, 275, -27, + -26, -25, 76, 300, 255, -31, -32, 233, 342, 234, + 344, 345, 261, 286, 288, 281, 262, 351, 283, 287, + 289, 290, 176, 176, 176, 359, 360, 361, 362, 291, + 292, 293, 294, 298, 302, 303, 367, 368, 369, 370, + 193, 194, 195, 196, 197, 198, 199, 200, 315, 305, + 306, 307, 176, 326, 308, 316, 317, 318, 275, 319, + 328, 325, 331, 332, 275, 355, 375, 323, 341, 337, + 343, 340, 348, 346, 347, 377, 349, 275, 275, 350, + 378, 354, 381, 401, 379, 176, 176, 176, 176, 385, + 387, 388, 394, 395, 392, 399, 176, 176, 176, 176, + 398, 406, 431, 400, 432, 257, 419, 420, 402, 403, + 404, 405, 275, 408, 275, 413, 416, 418, 275, 425, + 426, 423, 427, 428, 429, 430, 275, 275, 275, 433, + 435, 201, 202, 335, 393, 436, 437, 441, 434, 439, + 277, 278, 440, 176, 442, 443, 444, 201, 202, 445, + 446, 447, 279, 451, 452, 275, 275, 285, 458, 460, + 459, 453, 463, 275, 464, 465, 467, 295, 296, 297, + 468, 275, 472, 473, 145, 146, 147, 148, 424, 176, + 176, 84, 176, 176, 176, 176, 52, 53, 46, 373, + 184, 372, 96, 250, 91, 22, 275, 48, 37, 384, + 421, 0, 397, 15, 0, 16, 0, 235, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 236, + 237, 176, 0, 0, 0, 275, 0, 0, 0, 333, + 0, 0, 0, 0, 0, 339, 275, 0, 0, 0, + 0, 275, 0, 0, 0, 275, 275, 0, 352, 353, + 0, 0, 117, 118, 119, 120, 121, 122, 123, 124, + 125, 126, 127, 128, 129, 130, 0, 0, 0, 0, + 0, 238, 0, 239, 240, 138, 139, 0, 241, 0, + 0, 0, 0, 380, 0, 382, 0, 242, 0, 386, + 243, 0, 244, 0, 0, 245, 0, 389, 390, 391, + 0, 0, 0, 0, 52, 53, 0, 100, 55, 56, + 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, + 67, 15, 0, 16, 0, 0, 409, 410, 0, 0, + 0, 0, 0, 0, 417, 0, 0, 0, 0, 0, + 0, 0, 422, 0, 68, 52, 53, 0, 100, 162, + 163, 164, 165, 166, 167, 168, 169, 170, 171, 172, + 66, 67, 15, 0, 16, 0, 0, 438, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 69, 0, - 0, 70, 0, 0, 71, 0, 72, 312, 0, 117, - 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, - 128, 129, 130, 0, 0, 263, 264, 0, 238, 265, - 239, 240, 138, 139, 0, 241, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 271, 266, 267, - 268, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 269, 270, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 68, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 454, 0, 0, 0, + 0, 0, 69, 0, 0, 70, 0, 462, 71, 0, + 72, 101, 466, 0, 0, 0, 469, 470, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 263, 264, 52, 53, 265, 0, + 0, 0, 0, 69, 0, 0, 70, 0, 0, 71, + 0, 72, 313, 15, 0, 16, 0, 266, 267, 268, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 269, + 270, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 271, + 0, 0, 0, 0, 263, 264, 0, 0, 265, 0, + 0, 0, 117, 118, 119, 120, 121, 122, 123, 124, + 125, 126, 127, 128, 129, 130, 0, 266, 267, 268, + 0, 238, 0, 239, 240, 138, 139, 0, 241, 269, + 270, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 272, 0, 0, 0, 0, 0, 0, 0, 0, 271, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, 128, 129, 130, 0, 0, 0, 0, 0, 238, 0, 239, 240, 138, 139, 0, 241, 0, 0, 0, 0, 0, 0, 0, 0, 0, 52, 53, - 271, 100, 55, 56, 57, 58, 59, 60, 61, 62, + 272, 100, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 15, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 183, 0, 0, 0, 0, 0, 52, 53, 68, 100, @@ -1510,133 +1518,125 @@ 0, 0, 0, 0, 0, 0, 0, 0, 256, 0, 0, 0, 0, 0, 52, 53, 68, 100, 162, 163, 164, 165, 166, 167, 168, 169, 170, 171, 172, 66, - 67, 15, 0, 16, 0, 69, 0, 0, 70, 0, - 0, 71, 0, 72, 0, 0, 0, 0, 0, 0, + 67, 15, 0, 16, 0, 0, 69, 0, 0, 70, + 0, 0, 71, 0, 72, 0, 0, 0, 0, 0, 0, 0, 52, 53, 68, 100, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 15, - 0, 16, 0, 69, 0, 0, 70, 0, 0, 71, - 0, 72, 0, 0, 326, 0, 0, 0, 0, 0, + 0, 16, 0, 0, 69, 0, 0, 70, 0, 0, + 71, 0, 72, 0, 327, 0, 0, 0, 0, 0, 52, 53, 68, 100, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 15, 0, 16, - 0, 69, 0, 0, 70, 0, 308, 71, 0, 72, - 0, 0, 368, 0, 0, 0, 0, 0, 52, 53, + 0, 0, 69, 0, 0, 70, 0, 309, 71, 0, + 72, 0, 371, 0, 0, 0, 0, 0, 52, 53, 68, 54, 55, 56, 57, 58, 59, 60, 61, 62, - 63, 64, 65, 66, 67, 15, 0, 16, 0, 69, - 0, 0, 70, 0, 0, 71, 0, 72, 0, 0, + 63, 64, 65, 66, 67, 15, 0, 16, 0, 0, + 69, 0, 0, 70, 0, 0, 71, 0, 72, 0, 0, 0, 0, 0, 0, 0, 52, 53, 68, 100, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, - 65, 66, 67, 15, 0, 16, 0, 69, 0, 0, - 70, 0, 0, 71, 0, 72, 0, 0, 0, 0, + 65, 66, 67, 15, 0, 16, 0, 0, 69, 0, + 0, 70, 0, 0, 71, 0, 72, 0, 0, 0, 0, 0, 0, 0, 52, 53, 68, 100, 162, 163, 164, 165, 166, 167, 168, 169, 170, 171, 172, 66, - 67, 15, 0, 16, 0, 69, 0, 0, 70, 0, - 0, 71, 0, 72, 0, 0, 0, 0, 0, 0, + 67, 15, 0, 16, 0, 0, 69, 0, 0, 70, + 0, 0, 71, 0, 72, 0, 0, 0, 0, 0, 0, 0, 52, 53, 68, 189, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 15, - 0, 16, 0, 69, 0, 0, 70, 0, 0, 71, - 0, 72, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 16, 0, 0, 69, 0, 0, 70, 0, 0, + 71, 0, 72, 0, 0, 0, 0, 0, 0, 0, 0, 0, 68, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 69, 0, 0, 70, 0, 0, 71, 0, 72, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 107, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 108, 0, 0, 0, 0, 0, 0, 0, 0, 69, - 109, 110, 70, 0, 0, 71, 0, 72, 111, 112, - 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, - 123, 124, 125, 126, 127, 128, 129, 130, 131, 132, - 133, 0, 0, 134, 135, 136, 137, 138, 139, 140, - 141, 142, 143, 144 + 0, 0, 69, 0, 0, 70, 0, 0, 71, 0, + 72, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 107, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 108, 0, 0, 0, 0, 0, 0, 0, 0, + 69, 109, 110, 70, 0, 0, 71, 0, 72, 0, + 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, + 121, 122, 123, 124, 125, 126, 127, 128, 129, 130, + 131, 132, 133, 0, 0, 134, 135, 136, 137, 138, + 139, 140, 141, 142, 143, 144 }; static const short yycheck[] = { 29, - 96, 113, 113, 44, 252, 108, 206, 29, 111, 15, - 114, 2, 428, 58, 44, 34, 72, 10, 11, 12, - 13, 14, 15, 16, 17, 23, 52, 53, 444, 15, - 133, 9, 30, 136, 137, 54, 0, 140, 141, 142, - 143, 144, 33, 21, 109, 148, 150, 112, 54, 105, - 10, 11, 12, 13, 14, 15, 16, 17, 243, 244, - 23, 25, 101, 101, 101, 95, 96, 31, 54, 20, - 107, 107, 111, 111, 101, 103, 112, 41, 42, 43, - 44, 101, 109, 74, 112, 22, 271, 24, 110, 109, - 41, 42, 43, 44, 101, 59, 47, 100, 443, 58, - 107, 131, 132, 100, 134, 135, 451, 355, 60, 61, - 62, 63, 24, 111, 107, 145, 146, 147, 49, 50, - 51, 224, 178, 179, 180, 100, 5, 6, 4, 8, - 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, - 19, 20, 21, 22, 100, 24, 100, 107, 32, 33, - 27, 28, 182, 10, 11, 12, 13, 14, 15, 16, - 17, 87, 88, 204, 3, 4, 45, 3, 4, 3, - 4, 3, 4, 105, 204, 103, 376, 4, 378, 3, - 4, 222, 4, 4, 103, 288, 24, 290, 291, 4, - 106, 24, 222, 223, 297, 106, 103, 56, 4, 4, - 4, 4, 4, 101, 104, 261, 7, 7, 304, 305, - 306, 307, 242, 243, 244, 7, 101, 105, 101, 315, - 316, 317, 318, 102, 36, 24, 105, 101, 176, 108, - 101, 110, 111, 101, 101, 101, 101, 101, 186, 101, - 101, 271, 24, 191, 192, 103, 34, 103, 103, 103, - 103, 103, 103, 103, 101, 203, 104, 287, 101, 289, - 208, 101, 292, 293, 360, 21, 257, 21, 105, 4, - 218, 219, 220, 101, 304, 305, 306, 307, 101, 24, - 383, 384, 101, 101, 101, 315, 316, 317, 318, 103, - 101, 101, 101, 4, 324, 103, 36, 54, 4, 395, - 396, 54, 398, 399, 400, 401, 101, 101, 411, 105, - 101, 101, 101, 21, 101, 101, 428, 428, 101, 104, - 101, 351, 101, 107, 104, 101, 104, 104, 191, 192, - 360, 279, 444, 444, 104, 104, 104, 285, 104, 435, - 203, 104, 36, 107, 21, 208, 104, 21, 68, 101, - 298, 299, 101, 21, 21, 218, 219, 220, 0, 0, - 84, 84, 84, 84, 394, 395, 396, 33, 398, 399, - 400, 401, 20, 105, 46, 325, 23, 324, 176, 43, - 20, 2, 22, 331, 24, 333, 14, 388, 334, 337, - 356, 31, 32, 33, -1, -1, -1, 345, 346, 347, - -1, 41, 42, 43, 44, 435, -1, 47, 48, -1, - -1, -1, -1, -1, -1, 55, 279, -1, -1, 59, - -1, -1, 285, -1, -1, 373, 374, -1, -1, -1, - -1, -1, -1, 381, -1, 298, 299, -1, -1, -1, - -1, 389, -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, 413, -1, -1, 331, -1, - 333, -1, -1, -1, 337, -1, -1, -1, -1, -1, - -1, -1, 345, 346, 347, -1, -1, -1, -1, -1, - -1, -1, -1, 441, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, 452, -1, -1, -1, -1, 457, - 373, 374, -1, 461, 462, -1, -1, -1, 381, -1, - -1, -1, -1, -1, -1, -1, 389, -1, -1, -1, - -1, -1, -1, -1, -1, 5, 6, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, - 413, -1, 22, -1, 24, -1, 26, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, 38, 39, - -1, -1, -1, -1, -1, -1, -1, -1, 441, -1, - -1, -1, -1, -1, -1, -1, -1, -1, -1, 452, - -1, -1, -1, -1, 457, -1, -1, -1, 461, 462, - 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, - 80, 81, 82, 83, -1, -1, -1, -1, -1, 89, - -1, 91, 92, 93, 94, -1, 96, -1, -1, -1, - -1, -1, -1, -1, -1, 105, -1, -1, 108, -1, - 110, 5, 6, 113, 8, 9, 10, 11, 12, 13, - 14, 15, 16, 17, 18, 19, 20, 21, 22, -1, - 24, -1, -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, - -1, 45, 3, 4, 5, 6, 7, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, - -1, 22, -1, 24, -1, 26, 27, 28, -1, -1, - -1, -1, -1, -1, -1, -1, -1, 38, 39, -1, + 113, 113, 2, 44, 206, 72, 96, 29, 252, 23, + 58, 114, 243, 244, 44, 34, 30, 108, 434, 15, + 111, 10, 11, 12, 13, 14, 15, 16, 17, 0, + 15, 9, 108, 33, 450, 54, 102, 113, 105, 104, + 20, 272, 133, 21, 110, 136, 137, 150, 113, 140, + 141, 142, 143, 144, 25, 23, 110, 148, 54, 113, + 31, 41, 42, 43, 44, 95, 96, 47, 101, 54, + 41, 42, 43, 44, 74, 10, 11, 12, 13, 14, + 15, 16, 17, 58, 102, 102, 24, 102, 59, 111, + 102, 102, 449, 108, 112, 112, 108, 101, 112, 110, + 457, 131, 132, 4, 134, 135, 61, 62, 63, 64, + 101, 178, 179, 180, 358, 145, 146, 147, 20, 108, + 22, 104, 24, 49, 50, 51, 22, 101, 24, 31, + 32, 33, 101, 224, 32, 33, 52, 53, 4, 41, + 42, 43, 44, 106, 176, 47, 48, 88, 89, 27, + 28, 4, 182, 55, 186, 3, 4, 59, 4, 191, + 192, 3, 4, 204, 3, 4, 3, 4, 3, 4, + 104, 203, 24, 108, 204, 4, 208, 24, 380, 107, + 382, 222, 107, 104, 56, 4, 218, 219, 220, 4, + 4, 4, 222, 223, 261, 7, 7, 4, 289, 7, + 291, 292, 102, 106, 36, 102, 105, 298, 102, 102, + 102, 102, 242, 243, 244, 305, 306, 307, 308, 102, + 102, 102, 102, 102, 24, 102, 316, 317, 318, 319, + 10, 11, 12, 13, 14, 15, 16, 17, 24, 104, + 104, 104, 272, 105, 104, 104, 104, 104, 280, 104, + 60, 102, 102, 102, 286, 34, 24, 257, 288, 102, + 290, 106, 102, 293, 294, 21, 102, 299, 300, 102, + 21, 102, 4, 363, 104, 305, 306, 307, 308, 102, + 102, 102, 24, 4, 104, 102, 316, 317, 318, 319, + 36, 54, 4, 102, 24, 325, 387, 388, 102, 102, + 102, 102, 334, 102, 336, 102, 102, 102, 340, 399, + 400, 105, 402, 403, 404, 405, 348, 349, 350, 102, + 105, 434, 434, 54, 354, 416, 108, 102, 106, 105, + 191, 192, 105, 363, 105, 105, 105, 450, 450, 105, + 105, 21, 203, 36, 108, 377, 378, 208, 21, 102, + 105, 441, 21, 385, 102, 69, 21, 218, 219, 220, + 21, 393, 0, 0, 84, 84, 84, 84, 398, 399, + 400, 33, 402, 403, 404, 405, 5, 6, 20, 326, + 105, 325, 46, 176, 43, 2, 418, 23, 14, 337, + 392, -1, 359, 22, -1, 24, -1, 26, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, -1, 38, + 39, 441, -1, -1, -1, 447, -1, -1, -1, 280, + -1, -1, -1, -1, -1, 286, 458, -1, -1, -1, + -1, 463, -1, -1, -1, 467, 468, -1, 299, 300, + -1, -1, 71, 72, 73, 74, 75, 76, 77, 78, + 79, 80, 81, 82, 83, 84, -1, -1, -1, -1, + -1, 90, -1, 92, 93, 94, 95, -1, 97, -1, + -1, -1, -1, 334, -1, 336, -1, 106, -1, 340, + 109, -1, 111, -1, -1, 114, -1, 348, 349, 350, + -1, -1, -1, -1, 5, 6, -1, 8, 9, 10, + 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, + 21, 22, -1, 24, -1, -1, 377, 378, -1, -1, + -1, -1, -1, -1, 385, -1, -1, -1, -1, -1, + -1, -1, 393, -1, 45, 5, 6, -1, 8, 9, + 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, + 20, 21, 22, -1, 24, -1, -1, 418, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, 102, -1, - -1, 105, -1, -1, 108, -1, 110, 111, -1, 70, - 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, - 81, 82, 83, -1, -1, 3, 4, -1, 89, 7, - 91, 92, 93, 94, -1, 96, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, 108, 26, 27, - 28, -1, -1, -1, -1, -1, -1, -1, -1, -1, - 38, 39, -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, 45, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, 447, -1, -1, -1, + -1, -1, 103, -1, -1, 106, -1, 458, 109, -1, + 111, 112, 463, -1, -1, -1, 467, 468, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, 3, 4, 5, 6, 7, -1, + -1, -1, -1, 103, -1, -1, 106, -1, -1, 109, + -1, 111, 112, 22, -1, 24, -1, 26, 27, 28, + -1, -1, -1, -1, -1, -1, -1, -1, -1, 38, + 39, -1, -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, -1, 58, + -1, -1, -1, -1, 3, 4, -1, -1, 7, -1, + -1, -1, 71, 72, 73, 74, 75, 76, 77, 78, + 79, 80, 81, 82, 83, 84, -1, 26, 27, 28, + -1, 90, -1, 92, 93, 94, 95, -1, 97, 38, + 39, -1, -1, -1, -1, -1, -1, -1, -1, -1, + 109, -1, -1, -1, -1, -1, -1, -1, -1, 58, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, 70, 71, 72, 73, 74, 75, 76, 77, - 78, 79, 80, 81, 82, 83, -1, -1, -1, -1, - -1, 89, -1, 91, 92, 93, 94, -1, 96, -1, + -1, -1, 71, 72, 73, 74, 75, 76, 77, 78, + 79, 80, 81, 82, 83, 84, -1, -1, -1, -1, + -1, 90, -1, 92, 93, 94, 95, -1, 97, -1, -1, -1, -1, -1, -1, -1, -1, -1, 5, 6, - 108, 8, 9, 10, 11, 12, 13, 14, 15, 16, + 109, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, -1, 24, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, 37, -1, -1, -1, -1, -1, 5, 6, 45, 8, @@ -1645,42 +1645,42 @@ -1, -1, -1, -1, -1, -1, -1, -1, 37, -1, -1, -1, -1, -1, 5, 6, 45, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, - 21, 22, -1, 24, -1, 102, -1, -1, 105, -1, - -1, 108, -1, 110, -1, -1, -1, -1, -1, -1, + 21, 22, -1, 24, -1, -1, 103, -1, -1, 106, + -1, -1, 109, -1, 111, -1, -1, -1, -1, -1, -1, -1, 5, 6, 45, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, - -1, 24, -1, 102, -1, -1, 105, -1, -1, 108, - -1, 110, -1, -1, 37, -1, -1, -1, -1, -1, + -1, 24, -1, -1, 103, -1, -1, 106, -1, -1, + 109, -1, 111, -1, 37, -1, -1, -1, -1, -1, 5, 6, 45, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, -1, 24, - -1, 102, -1, -1, 105, -1, 107, 108, -1, 110, - -1, -1, 37, -1, -1, -1, -1, -1, 5, 6, + -1, -1, 103, -1, -1, 106, -1, 108, 109, -1, + 111, -1, 37, -1, -1, -1, -1, -1, 5, 6, 45, 8, 9, 10, 11, 12, 13, 14, 15, 16, - 17, 18, 19, 20, 21, 22, -1, 24, -1, 102, - -1, -1, 105, -1, -1, 108, -1, 110, -1, -1, + 17, 18, 19, 20, 21, 22, -1, 24, -1, -1, + 103, -1, -1, 106, -1, -1, 109, -1, 111, -1, -1, -1, -1, -1, -1, -1, 5, 6, 45, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, - 19, 20, 21, 22, -1, 24, -1, 102, -1, -1, - 105, -1, -1, 108, -1, 110, -1, -1, -1, -1, + 19, 20, 21, 22, -1, 24, -1, -1, 103, -1, + -1, 106, -1, -1, 109, -1, 111, -1, -1, -1, -1, -1, -1, -1, 5, 6, 45, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, - 21, 22, -1, 24, -1, 102, -1, -1, 105, -1, - -1, 108, -1, 110, -1, -1, -1, -1, -1, -1, + 21, 22, -1, 24, -1, -1, 103, -1, -1, 106, + -1, -1, 109, -1, 111, -1, -1, -1, -1, -1, -1, -1, 5, 6, 45, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, - -1, 24, -1, 102, -1, -1, 105, -1, -1, 108, - -1, 110, -1, -1, -1, -1, -1, -1, -1, -1, + -1, 24, -1, -1, 103, -1, -1, 106, -1, -1, + 109, -1, 111, -1, -1, -1, -1, -1, -1, -1, -1, -1, 45, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, - -1, 102, -1, -1, 105, -1, -1, 108, -1, 110, - -1, -1, -1, -1, -1, -1, -1, -1, -1, 35, - -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, - 46, -1, -1, -1, -1, -1, -1, -1, -1, 102, - 56, 57, 105, -1, -1, 108, -1, 110, 64, 65, - 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, - 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, - 86, -1, -1, 89, 90, 91, 92, 93, 94, 95, - 96, 97, 98, 99 + -1, -1, 103, -1, -1, 106, -1, -1, 109, -1, + 111, -1, -1, -1, -1, -1, -1, -1, -1, -1, + 35, -1, -1, -1, -1, -1, -1, -1, -1, -1, + -1, 46, -1, -1, -1, -1, -1, -1, -1, -1, + 103, 56, 57, 106, -1, -1, 109, -1, 111, -1, + 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, + 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, + 85, 86, 87, -1, -1, 90, 91, 92, 93, 94, + 95, 96, 97, 98, 99, 100 }; /* -*-C-*- Note some compilers choke on comments on `#line' lines. */ #line 3 "/usr/share/bison.simple" @@ -2226,7 +2226,7 @@ switch (yyn) { case 2: -#line 998 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1011 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { if (yyvsp[0].UIntVal > (uint32_t)INT32_MAX) // Outside of my range! ThrowException("Value too large for type!"); @@ -2234,7 +2234,7 @@ ; break;} case 4: -#line 1006 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1019 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { if (yyvsp[0].UInt64Val > (uint64_t)INT64_MAX) // Outside of my range! ThrowException("Value too large for type!"); @@ -2242,55 +2242,55 @@ ; break;} case 33: -#line 1029 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1042 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.StrVal = yyvsp[-1].StrVal; ; break;} case 34: -#line 1032 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1045 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.StrVal = 0; ; break;} case 35: -#line 1036 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1049 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.Linkage = GlobalValue::InternalLinkage; ; break;} case 36: -#line 1037 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1050 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.Linkage = GlobalValue::LinkOnceLinkage; ; break;} case 37: -#line 1038 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1051 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.Linkage = GlobalValue::WeakLinkage; ; break;} case 38: -#line 1039 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1052 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.Linkage = GlobalValue::AppendingLinkage; ; break;} case 39: -#line 1040 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1053 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.Linkage = GlobalValue::ExternalLinkage; ; break;} case 40: -#line 1042 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1055 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.UIntVal = CallingConv::C; ; break;} case 41: -#line 1043 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1056 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.UIntVal = CallingConv::C; ; break;} case 42: -#line 1044 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1057 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.UIntVal = CallingConv::Fast; ; break;} case 43: -#line 1045 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1058 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.UIntVal = CallingConv::Cold; ; break;} case 44: -#line 1046 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1059 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { if ((unsigned)yyvsp[0].UInt64Val != yyvsp[0].UInt64Val) ThrowException("Calling conv too large!"); @@ -2298,11 +2298,11 @@ ; break;} case 45: -#line 1054 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1067 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.UIntVal = 0; ; break;} case 46: -#line 1055 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1068 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.UIntVal = yyvsp[0].UInt64Val; if (yyval.UIntVal != 0 && !isPowerOf2_32(yyval.UIntVal)) @@ -2310,11 +2310,11 @@ ; break;} case 47: -#line 1060 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1073 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.UIntVal = 0; ; break;} case 48: -#line 1061 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1074 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.UIntVal = yyvsp[0].UInt64Val; if (yyval.UIntVal != 0 && !isPowerOf2_32(yyval.UIntVal)) @@ -2322,7 +2322,7 @@ ; break;} case 49: -#line 1068 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1081 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { for (unsigned i = 0, e = strlen(yyvsp[0].StrVal); i != e; ++i) if (yyvsp[0].StrVal[i] == '"' || yyvsp[0].StrVal[i] == '\\') @@ -2331,30 +2331,30 @@ ; break;} case 50: -#line 1075 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1088 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.StrVal = 0; ; break;} case 51: -#line 1076 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1089 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.StrVal = yyvsp[0].StrVal; ; break;} case 52: -#line 1081 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1094 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" {; break;} case 53: -#line 1082 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1095 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" {; break;} case 54: -#line 1083 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1096 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { CurGV->setSection(yyvsp[0].StrVal); free(yyvsp[0].StrVal); ; break;} case 55: -#line 1087 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1100 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { if (yyvsp[0].UInt64Val != 0 && !isPowerOf2_32(yyvsp[0].UInt64Val)) ThrowException("Alignment must be a power of two!"); @@ -2362,15 +2362,15 @@ ; break;} case 57: -#line 1100 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1113 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.TypeVal = new PATypeHolder(yyvsp[0].PrimType); ; break;} case 59: -#line 1101 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1114 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.TypeVal = new PATypeHolder(yyvsp[0].PrimType); ; break;} case 60: -#line 1103 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1116 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) ThrowException("Invalid upreference in type: " + (*yyvsp[0].TypeVal)->getDescription()); @@ -2378,25 +2378,25 @@ ; break;} case 74: -#line 1114 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1127 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.TypeVal = new PATypeHolder(OpaqueType::get()); ; break;} case 75: -#line 1117 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1130 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.TypeVal = new PATypeHolder(yyvsp[0].PrimType); ; break;} case 76: -#line 1120 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1133 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { // Named types are also simple types... yyval.TypeVal = new PATypeHolder(getTypeVal(yyvsp[0].ValIDVal)); ; break;} case 77: -#line 1126 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1139 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { // Type UpReference if (yyvsp[0].UInt64Val > (uint64_t)~0U) ThrowException("Value out of range!"); OpaqueType *OT = OpaqueType::get(); // Use temporary placeholder @@ -2406,7 +2406,7 @@ ; break;} case 78: -#line 1133 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1146 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { // Function derived type? std::vector Params; for (std::list::iterator I = yyvsp[-1].TypeList->begin(), @@ -2421,14 +2421,14 @@ ; break;} case 79: -#line 1145 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1158 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { // Sized array type? yyval.TypeVal = new PATypeHolder(HandleUpRefs(ArrayType::get(*yyvsp[-1].TypeVal, (unsigned)yyvsp[-3].UInt64Val))); delete yyvsp[-1].TypeVal; ; break;} case 80: -#line 1149 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1162 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { // Packed array type? const llvm::Type* ElemTy = yyvsp[-1].TypeVal->get(); if ((unsigned)yyvsp[-3].UInt64Val != yyvsp[-3].UInt64Val) @@ -2442,7 +2442,7 @@ ; break;} case 81: -#line 1160 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1173 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { // Structure type? std::vector Elements; for (std::list::iterator I = yyvsp[-1].TypeList->begin(), @@ -2454,51 +2454,51 @@ ; break;} case 82: -#line 1169 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1182 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { // Empty structure type? yyval.TypeVal = new PATypeHolder(StructType::get(std::vector())); ; break;} case 83: -#line 1172 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1185 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { // Pointer type? yyval.TypeVal = new PATypeHolder(HandleUpRefs(PointerType::get(*yyvsp[-1].TypeVal))); delete yyvsp[-1].TypeVal; ; break;} case 84: -#line 1180 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1193 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.TypeList = new std::list(); yyval.TypeList->push_back(*yyvsp[0].TypeVal); delete yyvsp[0].TypeVal; ; break;} case 85: -#line 1184 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1197 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.TypeList=yyvsp[-2].TypeList)->push_back(*yyvsp[0].TypeVal); delete yyvsp[0].TypeVal; ; break;} case 87: -#line 1190 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1203 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.TypeList=yyvsp[-2].TypeList)->push_back(Type::VoidTy); ; break;} case 88: -#line 1193 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1206 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.TypeList = new std::list())->push_back(Type::VoidTy); ; break;} case 89: -#line 1196 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1209 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.TypeList = new std::list(); ; break;} case 90: -#line 1206 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1219 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { // Nonempty unsized arr const ArrayType *ATy = dyn_cast(yyvsp[-3].TypeVal->get()); if (ATy == 0) @@ -2526,7 +2526,7 @@ ; break;} case 91: -#line 1231 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1244 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { const ArrayType *ATy = dyn_cast(yyvsp[-2].TypeVal->get()); if (ATy == 0) @@ -2542,7 +2542,7 @@ ; break;} case 92: -#line 1244 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1257 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { const ArrayType *ATy = dyn_cast(yyvsp[-2].TypeVal->get()); if (ATy == 0) @@ -2574,7 +2574,7 @@ ; break;} case 93: -#line 1273 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1286 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { // Nonempty unsized arr const PackedType *PTy = dyn_cast(yyvsp[-3].TypeVal->get()); if (PTy == 0) @@ -2602,7 +2602,7 @@ ; break;} case 94: -#line 1298 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1311 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { const StructType *STy = dyn_cast(yyvsp[-3].TypeVal->get()); if (STy == 0) @@ -2625,7 +2625,7 @@ ; break;} case 95: -#line 1318 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1331 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { const StructType *STy = dyn_cast(yyvsp[-2].TypeVal->get()); if (STy == 0) @@ -2640,7 +2640,7 @@ ; break;} case 96: -#line 1330 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1343 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { const PointerType *PTy = dyn_cast(yyvsp[-1].TypeVal->get()); if (PTy == 0) @@ -2652,14 +2652,14 @@ ; break;} case 97: -#line 1339 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1352 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.ConstVal = UndefValue::get(yyvsp[-1].TypeVal->get()); delete yyvsp[-1].TypeVal; ; break;} case 98: -#line 1343 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1356 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { const PointerType *Ty = dyn_cast(yyvsp[-1].TypeVal->get()); if (Ty == 0) @@ -2721,7 +2721,7 @@ ; break;} case 99: -#line 1402 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1415 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { if (yyvsp[-1].TypeVal->get() != yyvsp[0].ConstVal->getType()) ThrowException("Mismatched types for constant expression!"); @@ -2730,7 +2730,7 @@ ; break;} case 100: -#line 1408 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1421 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { const Type *Ty = yyvsp[-1].TypeVal->get(); if (isa(Ty) || Ty == Type::LabelTy || isa(Ty)) @@ -2740,7 +2740,7 @@ ; break;} case 101: -#line 1416 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1429 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { // integral constants if (!ConstantSInt::isValueValidForType(yyvsp[-1].PrimType, yyvsp[0].SInt64Val)) ThrowException("Constant value doesn't fit in type!"); @@ -2748,7 +2748,7 @@ ; break;} case 102: -#line 1421 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1434 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { // integral constants if (!ConstantUInt::isValueValidForType(yyvsp[-1].PrimType, yyvsp[0].UInt64Val)) ThrowException("Constant value doesn't fit in type!"); @@ -2756,19 +2756,19 @@ ; break;} case 103: -#line 1426 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1439 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { // Boolean constants yyval.ConstVal = ConstantBool::True; ; break;} case 104: -#line 1429 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1442 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { // Boolean constants yyval.ConstVal = ConstantBool::False; ; break;} case 105: -#line 1432 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1445 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { // Float & Double constants if (!ConstantFP::isValueValidForType(yyvsp[-1].PrimType, yyvsp[0].FPVal)) ThrowException("Floating point constant invalid for type!!"); @@ -2776,7 +2776,7 @@ ; break;} case 106: -#line 1439 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1452 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { if (!yyvsp[-3].ConstVal->getType()->isFirstClassType()) ThrowException("cast constant expression from a non-primitive type: '" + @@ -2789,7 +2789,7 @@ ; break;} case 107: -#line 1449 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1462 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { if (!isa(yyvsp[-2].ConstVal->getType())) ThrowException("GetElementPtr requires a pointer operand!"); @@ -2823,7 +2823,7 @@ ; break;} case 108: -#line 1480 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1493 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { if (yyvsp[-5].ConstVal->getType() != Type::BoolTy) ThrowException("Select condition must be of boolean type!"); @@ -2833,7 +2833,7 @@ ; break;} case 109: -#line 1487 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1500 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { if (yyvsp[-3].ConstVal->getType() != yyvsp[-1].ConstVal->getType()) ThrowException("Binary operator types must match!"); @@ -2857,7 +2857,7 @@ ; break;} case 110: -#line 1508 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1521 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { if (yyvsp[-3].ConstVal->getType() != yyvsp[-1].ConstVal->getType()) ThrowException("Logical operator types must match!"); @@ -2870,7 +2870,7 @@ ; break;} case 111: -#line 1518 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1531 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { if (yyvsp[-3].ConstVal->getType() != yyvsp[-1].ConstVal->getType()) ThrowException("setcc operand types must match!"); @@ -2878,7 +2878,7 @@ ; break;} case 112: -#line 1523 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1536 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { if (yyvsp[-1].ConstVal->getType() != Type::UByteTy) ThrowException("Shift count for shift constant must be unsigned byte!"); @@ -2888,7 +2888,7 @@ ; break;} case 113: -#line 1530 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1543 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { if (!isa(yyvsp[-3].ConstVal->getType())) ThrowException("First operand of extractelement must be " @@ -2899,60 +2899,60 @@ ; break;} case 114: -#line 1540 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1553 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ConstVector = yyvsp[-2].ConstVector)->push_back(yyvsp[0].ConstVal); ; break;} case 115: -#line 1543 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1556 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.ConstVector = new std::vector(); yyval.ConstVector->push_back(yyvsp[0].ConstVal); ; break;} case 116: -#line 1550 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1563 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.BoolVal = false; ; break;} case 117: -#line 1550 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1563 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.BoolVal = true; ; break;} case 118: -#line 1560 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1573 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.ModuleVal = ParserResult = yyvsp[0].ModuleVal; CurModule.ModuleDone(); ; break;} case 119: -#line 1567 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1580 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.ModuleVal = yyvsp[-1].ModuleVal; CurFun.FunctionDone(); ; break;} case 120: -#line 1571 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1584 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.ModuleVal = yyvsp[-1].ModuleVal; ; break;} case 121: -#line 1574 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1587 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.ModuleVal = yyvsp[-3].ModuleVal; ; break;} case 122: -#line 1577 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1590 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.ModuleVal = yyvsp[-1].ModuleVal; ; break;} case 123: -#line 1580 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1593 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.ModuleVal = CurModule.CurrentModule; // Emit an error if there are any unresolved types left. @@ -2966,7 +2966,7 @@ ; break;} case 124: -#line 1593 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1606 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { // Eagerly resolve types. This is not an optimization, this is a // requirement that is due to the fact that we could have this: @@ -2989,30 +2989,30 @@ ; break;} case 125: -#line 1613 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1626 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { // Function prototypes can be in const pool ; break;} case 126: -#line 1615 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1628 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { // Asm blocks can be in the const pool ; break;} case 127: -#line 1617 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1630 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { if (yyvsp[0].ConstVal == 0) ThrowException("Global value initializer is not a constant!"); CurGV = ParseGlobalVariable(yyvsp[-3].StrVal, yyvsp[-2].Linkage, yyvsp[-1].BoolVal, yyvsp[0].ConstVal->getType(), yyvsp[0].ConstVal); ; break;} case 128: -#line 1620 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1633 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { CurGV = 0; ; break;} case 129: -#line 1623 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1636 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { CurGV = ParseGlobalVariable(yyvsp[-3].StrVal, GlobalValue::ExternalLinkage, yyvsp[-1].BoolVal, *yyvsp[0].TypeVal, 0); @@ -3020,28 +3020,28 @@ ; break;} case 130: -#line 1627 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1640 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { CurGV = 0; ; break;} case 131: -#line 1630 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1643 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { ; break;} case 132: -#line 1632 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1645 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { ; break;} case 133: -#line 1634 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1647 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { ; break;} case 134: -#line 1638 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1651 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { const std::string &AsmSoFar = CurModule.CurrentModule->getModuleInlineAsm(); char *EndStr = UnEscapeLexed(yyvsp[0].StrVal, true); @@ -3055,21 +3055,21 @@ ; break;} case 135: -#line 1650 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1663 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.Endianness = Module::BigEndian; ; break;} case 136: -#line 1651 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1664 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.Endianness = Module::LittleEndian; ; break;} case 137: -#line 1653 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1666 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { CurModule.CurrentModule->setEndianness(yyvsp[0].Endianness); ; break;} case 138: -#line 1656 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1669 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { if (yyvsp[0].UInt64Val == 32) CurModule.CurrentModule->setPointerSize(Module::Pointer32); @@ -3080,37 +3080,37 @@ ; break;} case 139: -#line 1664 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1677 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { CurModule.CurrentModule->setTargetTriple(yyvsp[0].StrVal); free(yyvsp[0].StrVal); ; break;} case 141: -#line 1671 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1684 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { CurModule.CurrentModule->addLibrary(yyvsp[0].StrVal); free(yyvsp[0].StrVal); ; break;} case 142: -#line 1675 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1688 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { CurModule.CurrentModule->addLibrary(yyvsp[0].StrVal); free(yyvsp[0].StrVal); ; break;} case 143: -#line 1679 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1692 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { ; break;} case 147: -#line 1688 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1701 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.StrVal = 0; ; break;} case 148: -#line 1690 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1703 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { if (*yyvsp[-1].TypeVal == Type::VoidTy) ThrowException("void typed arguments are invalid!"); @@ -3118,7 +3118,7 @@ ; break;} case 149: -#line 1696 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1709 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.ArgList = yyvsp[-2].ArgList; yyvsp[-2].ArgList->push_back(*yyvsp[0].ArgVal); @@ -3126,7 +3126,7 @@ ; break;} case 150: -#line 1701 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1714 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.ArgList = new std::vector >(); yyval.ArgList->push_back(*yyvsp[0].ArgVal); @@ -3134,13 +3134,13 @@ ; break;} case 151: -#line 1707 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1720 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.ArgList = yyvsp[0].ArgList; ; break;} case 152: -#line 1710 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1723 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.ArgList = yyvsp[-2].ArgList; yyval.ArgList->push_back(std::pair >(); yyval.ArgList->push_back(std::make_pair(new PATypeHolder(Type::VoidTy), (char*)0)); ; break;} case 154: -#line 1719 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1732 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.ArgList = 0; ; break;} case 155: -#line 1724 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1737 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { UnEscapeLexed(yyvsp[-5].StrVal); std::string FunctionName(yyvsp[-5].StrVal); @@ -3248,7 +3248,7 @@ ; break;} case 158: -#line 1811 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1824 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.FunctionVal = CurFun.CurrentFunction; @@ -3258,72 +3258,84 @@ ; break;} case 161: -#line 1821 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1834 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.FunctionVal = yyvsp[-1].FunctionVal; ; break;} case 162: -#line 1825 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1838 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { CurFun.isDeclare = true; ; break;} case 163: -#line 1825 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1838 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.FunctionVal = CurFun.CurrentFunction; CurFun.FunctionDone(); ; break;} case 164: -#line 1834 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1847 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ + yyval.BoolVal = false; + ; + break;} +case 165: +#line 1850 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ + yyval.BoolVal = true; + ; + break;} +case 166: +#line 1854 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { // A reference to a direct constant yyval.ValIDVal = ValID::create(yyvsp[0].SInt64Val); ; break;} -case 165: -#line 1837 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 167: +#line 1857 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.ValIDVal = ValID::create(yyvsp[0].UInt64Val); ; break;} -case 166: -#line 1840 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 168: +#line 1860 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { // Perhaps it's an FP constant? yyval.ValIDVal = ValID::create(yyvsp[0].FPVal); ; break;} -case 167: -#line 1843 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 169: +#line 1863 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.ValIDVal = ValID::create(ConstantBool::True); ; break;} -case 168: -#line 1846 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 170: +#line 1866 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.ValIDVal = ValID::create(ConstantBool::False); ; break;} -case 169: -#line 1849 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 171: +#line 1869 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.ValIDVal = ValID::createNull(); ; break;} -case 170: -#line 1852 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 172: +#line 1872 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.ValIDVal = ValID::createUndef(); ; break;} -case 171: -#line 1855 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 173: +#line 1875 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { // A vector zero constant. yyval.ValIDVal = ValID::createZeroInit(); ; break;} -case 172: -#line 1858 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 174: +#line 1878 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { // Nonempty unsized packed vector const Type *ETy = (*yyvsp[-1].ConstVector)[0]->getType(); int NumElements = yyvsp[-1].ConstVector->size(); @@ -3349,44 +3361,56 @@ delete PTy; delete yyvsp[-1].ConstVector; ; break;} -case 173: -#line 1882 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 175: +#line 1902 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.ValIDVal = ValID::create(yyvsp[0].ConstVal); ; break;} -case 174: -#line 1889 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 176: +#line 1905 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +{ + char *End = UnEscapeLexed(yyvsp[-2].StrVal, true); + std::string AsmStr = std::string(yyvsp[-2].StrVal, End); + End = UnEscapeLexed(yyvsp[0].StrVal, true); + std::string Constraints = std::string(yyvsp[0].StrVal, End); + yyval.ValIDVal = ValID::createInlineAsm(AsmStr, Constraints, yyvsp[-3].BoolVal); + free(yyvsp[-2].StrVal); + free(yyvsp[0].StrVal); + ; + break;} +case 177: +#line 1918 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { // Is it an integer reference...? yyval.ValIDVal = ValID::create(yyvsp[0].SIntVal); ; break;} -case 175: -#line 1892 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 178: +#line 1921 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { // Is it a named reference...? yyval.ValIDVal = ValID::create(yyvsp[0].StrVal); ; break;} -case 178: -#line 1903 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 181: +#line 1932 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.ValueVal = getVal(*yyvsp[-1].TypeVal, yyvsp[0].ValIDVal); delete yyvsp[-1].TypeVal; ; break;} -case 179: -#line 1907 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 182: +#line 1936 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.FunctionVal = yyvsp[-1].FunctionVal; ; break;} -case 180: -#line 1910 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 183: +#line 1939 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { // Do not allow functions with 0 basic blocks yyval.FunctionVal = yyvsp[-1].FunctionVal; ; break;} -case 181: -#line 1918 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 184: +#line 1947 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { setValueName(yyvsp[0].TermInstVal, yyvsp[-1].StrVal); InsertValue(yyvsp[0].TermInstVal); @@ -3396,15 +3420,15 @@ yyval.BasicBlockVal = yyvsp[-2].BasicBlockVal; ; break;} -case 182: -#line 1927 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 185: +#line 1956 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyvsp[-1].BasicBlockVal->getInstList().push_back(yyvsp[0].InstVal); yyval.BasicBlockVal = yyvsp[-1].BasicBlockVal; ; break;} -case 183: -#line 1931 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 186: +#line 1960 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.BasicBlockVal = CurBB = getBBVal(ValID::create((int)CurFun.NextBBNum++), true); @@ -3416,8 +3440,8 @@ BBL.splice(BBL.end(), BBL, yyval.BasicBlockVal); ; break;} -case 184: -#line 1941 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 187: +#line 1970 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.BasicBlockVal = CurBB = getBBVal(ValID::create(yyvsp[0].StrVal), true); @@ -3429,32 +3453,32 @@ BBL.splice(BBL.end(), BBL, yyval.BasicBlockVal); ; break;} -case 185: -#line 1952 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 188: +#line 1981 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { // Return with a result... yyval.TermInstVal = new ReturnInst(yyvsp[0].ValueVal); ; break;} -case 186: -#line 1955 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 189: +#line 1984 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { // Return with no result... yyval.TermInstVal = new ReturnInst(); ; break;} -case 187: -#line 1958 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 190: +#line 1987 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { // Unconditional Branch... yyval.TermInstVal = new BranchInst(getBBVal(yyvsp[0].ValIDVal)); ; break;} -case 188: -#line 1961 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 191: +#line 1990 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.TermInstVal = new BranchInst(getBBVal(yyvsp[-3].ValIDVal), getBBVal(yyvsp[0].ValIDVal), getVal(Type::BoolTy, yyvsp[-6].ValIDVal)); ; break;} -case 189: -#line 1964 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 192: +#line 1993 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { SwitchInst *S = new SwitchInst(getVal(yyvsp[-7].PrimType, yyvsp[-6].ValIDVal), getBBVal(yyvsp[-3].ValIDVal), yyvsp[-1].JumpTable->size()); yyval.TermInstVal = S; @@ -3470,15 +3494,15 @@ delete yyvsp[-1].JumpTable; ; break;} -case 190: -#line 1978 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 193: +#line 2007 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { SwitchInst *S = new SwitchInst(getVal(yyvsp[-6].PrimType, yyvsp[-5].ValIDVal), getBBVal(yyvsp[-2].ValIDVal), 0); yyval.TermInstVal = S; ; break;} -case 191: -#line 1983 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 194: +#line 2012 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { const PointerType *PFTy; const FunctionType *Ty; @@ -3532,20 +3556,20 @@ delete yyvsp[-7].ValueList; ; break;} -case 192: -#line 2035 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 195: +#line 2064 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.TermInstVal = new UnwindInst(); ; break;} -case 193: -#line 2038 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 196: +#line 2067 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.TermInstVal = new UnreachableInst(); ; break;} -case 194: -#line 2044 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 197: +#line 2073 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.JumpTable = yyvsp[-5].JumpTable; Constant *V = cast(getValNonImprovising(yyvsp[-4].PrimType, yyvsp[-3].ValIDVal)); @@ -3555,8 +3579,8 @@ yyval.JumpTable->push_back(std::make_pair(V, getBBVal(yyvsp[0].ValIDVal))); ; break;} -case 195: -#line 2052 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 198: +#line 2081 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.JumpTable = new std::vector >(); Constant *V = cast(getValNonImprovising(yyvsp[-4].PrimType, yyvsp[-3].ValIDVal)); @@ -3567,8 +3591,8 @@ yyval.JumpTable->push_back(std::make_pair(V, getBBVal(yyvsp[0].ValIDVal))); ; break;} -case 196: -#line 2062 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 199: +#line 2091 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { // Is this definition named?? if so, assign the name... setValueName(yyvsp[0].InstVal, yyvsp[-1].StrVal); @@ -3576,54 +3600,54 @@ yyval.InstVal = yyvsp[0].InstVal; ; break;} -case 197: -#line 2069 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 200: +#line 2098 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { // Used for PHI nodes yyval.PHIList = new std::list >(); yyval.PHIList->push_back(std::make_pair(getVal(*yyvsp[-5].TypeVal, yyvsp[-3].ValIDVal), getBBVal(yyvsp[-1].ValIDVal))); delete yyvsp[-5].TypeVal; ; break;} -case 198: -#line 2074 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 201: +#line 2103 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.PHIList = yyvsp[-6].PHIList; yyvsp[-6].PHIList->push_back(std::make_pair(getVal(yyvsp[-6].PHIList->front().first->getType(), yyvsp[-3].ValIDVal), getBBVal(yyvsp[-1].ValIDVal))); ; break;} -case 199: -#line 2081 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 202: +#line 2110 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { // Used for call statements, and memory insts... yyval.ValueList = new std::vector(); yyval.ValueList->push_back(yyvsp[0].ValueVal); ; break;} -case 200: -#line 2085 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 203: +#line 2114 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.ValueList = yyvsp[-2].ValueList; yyvsp[-2].ValueList->push_back(yyvsp[0].ValueVal); ; break;} -case 202: -#line 2091 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 205: +#line 2120 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.ValueList = 0; ; break;} -case 203: -#line 2093 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 206: +#line 2122 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.BoolVal = true; ; break;} -case 204: -#line 2096 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 207: +#line 2125 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.BoolVal = false; ; break;} -case 205: -#line 2102 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 208: +#line 2131 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { if (!(*yyvsp[-3].TypeVal)->isInteger() && !(*yyvsp[-3].TypeVal)->isFloatingPoint() && !isa((*yyvsp[-3].TypeVal).get())) @@ -3637,8 +3661,8 @@ delete yyvsp[-3].TypeVal; ; break;} -case 206: -#line 2114 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 209: +#line 2143 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { if (!(*yyvsp[-3].TypeVal)->isIntegral()) { if (!isa(yyvsp[-3].TypeVal->get()) || @@ -3651,8 +3675,8 @@ delete yyvsp[-3].TypeVal; ; break;} -case 207: -#line 2125 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 210: +#line 2154 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { if(isa((*yyvsp[-3].TypeVal).get())) { ThrowException( @@ -3664,8 +3688,8 @@ delete yyvsp[-3].TypeVal; ; break;} -case 208: -#line 2135 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 211: +#line 2164 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { std::cerr << "WARNING: Use of eliminated 'not' instruction:" << " Replacing with 'xor'.\n"; @@ -3679,8 +3703,8 @@ ThrowException("Could not create a xor instruction!"); ; break;} -case 209: -#line 2147 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 212: +#line 2176 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { if (yyvsp[0].ValueVal->getType() != Type::UByteTy) ThrowException("Shift amount must be ubyte!"); @@ -3689,8 +3713,8 @@ yyval.InstVal = new ShiftInst(yyvsp[-3].OtherOpVal, yyvsp[-2].ValueVal, yyvsp[0].ValueVal); ; break;} -case 210: -#line 2154 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 213: +#line 2183 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { if (!yyvsp[0].TypeVal->get()->isFirstClassType()) ThrowException("cast instruction to a non-primitive type: '" + @@ -3699,8 +3723,8 @@ delete yyvsp[0].TypeVal; ; break;} -case 211: -#line 2161 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 214: +#line 2190 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { if (yyvsp[-4].ValueVal->getType() != Type::BoolTy) ThrowException("select condition must be boolean!"); @@ -3709,16 +3733,16 @@ yyval.InstVal = new SelectInst(yyvsp[-4].ValueVal, yyvsp[-2].ValueVal, yyvsp[0].ValueVal); ; break;} -case 212: -#line 2168 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 215: +#line 2197 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { NewVarArgs = true; yyval.InstVal = new VAArgInst(yyvsp[-2].ValueVal, *yyvsp[0].TypeVal); delete yyvsp[0].TypeVal; ; break;} -case 213: -#line 2173 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 216: +#line 2202 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { ObsoleteVarArgs = true; const Type* ArgTy = yyvsp[-2].ValueVal->getType(); @@ -3739,8 +3763,8 @@ delete yyvsp[0].TypeVal; ; break;} -case 214: -#line 2192 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 217: +#line 2221 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { ObsoleteVarArgs = true; const Type* ArgTy = yyvsp[-2].ValueVal->getType(); @@ -3764,8 +3788,8 @@ delete yyvsp[0].TypeVal; ; break;} -case 215: -#line 2214 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 218: +#line 2243 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { if (!isa(yyvsp[-2].ValueVal->getType())) ThrowException("First operand of extractelement must be " @@ -3775,8 +3799,8 @@ yyval.InstVal = new ExtractElementInst(yyvsp[-2].ValueVal, yyvsp[0].ValueVal); ; break;} -case 216: -#line 2222 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 219: +#line 2251 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { if (!isa(yyvsp[-4].ValueVal->getType())) ThrowException("First operand of insertelement must be " @@ -3790,8 +3814,8 @@ yyval.InstVal = new InsertElementInst(yyvsp[-4].ValueVal, yyvsp[-2].ValueVal, yyvsp[0].ValueVal); ; break;} -case 217: -#line 2234 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 220: +#line 2263 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { const Type *Ty = yyvsp[0].PHIList->front().first->getType(); if (!Ty->isFirstClassType()) @@ -3807,8 +3831,8 @@ delete yyvsp[0].PHIList; // Free the list... ; break;} -case 218: -#line 2248 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 221: +#line 2277 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { const PointerType *PFTy; const FunctionType *Ty; @@ -3867,66 +3891,66 @@ delete yyvsp[-1].ValueList; ; break;} -case 219: -#line 2305 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 222: +#line 2334 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.InstVal = yyvsp[0].InstVal; ; break;} -case 220: -#line 2311 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 223: +#line 2340 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.ValueList = yyvsp[0].ValueList; ; break;} -case 221: -#line 2313 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 224: +#line 2342 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.ValueList = new std::vector(); ; break;} -case 222: -#line 2317 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 225: +#line 2346 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.BoolVal = true; ; break;} -case 223: -#line 2320 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 226: +#line 2349 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.BoolVal = false; ; break;} -case 224: -#line 2326 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 227: +#line 2355 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.InstVal = new MallocInst(*yyvsp[-1].TypeVal, 0, yyvsp[0].UIntVal); delete yyvsp[-1].TypeVal; ; break;} -case 225: -#line 2330 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 228: +#line 2359 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.InstVal = new MallocInst(*yyvsp[-4].TypeVal, getVal(yyvsp[-2].PrimType, yyvsp[-1].ValIDVal), yyvsp[0].UIntVal); delete yyvsp[-4].TypeVal; ; break;} -case 226: -#line 2334 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 229: +#line 2363 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.InstVal = new AllocaInst(*yyvsp[-1].TypeVal, 0, yyvsp[0].UIntVal); delete yyvsp[-1].TypeVal; ; break;} -case 227: -#line 2338 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 230: +#line 2367 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { yyval.InstVal = new AllocaInst(*yyvsp[-4].TypeVal, getVal(yyvsp[-2].PrimType, yyvsp[-1].ValIDVal), yyvsp[0].UIntVal); delete yyvsp[-4].TypeVal; ; break;} -case 228: -#line 2342 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 231: +#line 2371 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { if (!isa(yyvsp[0].ValueVal->getType())) ThrowException("Trying to free nonpointer type " + @@ -3934,8 +3958,8 @@ yyval.InstVal = new FreeInst(yyvsp[0].ValueVal); ; break;} -case 229: -#line 2349 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 232: +#line 2378 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { if (!isa(yyvsp[-1].TypeVal->get())) ThrowException("Can't load from nonpointer type: " + @@ -3947,8 +3971,8 @@ delete yyvsp[-1].TypeVal; ; break;} -case 230: -#line 2359 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 233: +#line 2388 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { const PointerType *PT = dyn_cast(yyvsp[-1].TypeVal->get()); if (!PT) @@ -3963,8 +3987,8 @@ delete yyvsp[-1].TypeVal; ; break;} -case 231: -#line 2372 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +case 234: +#line 2401 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" { if (!isa(yyvsp[-2].TypeVal->get())) ThrowException("getelementptr insn requires pointer operand!"); @@ -4209,7 +4233,7 @@ } return 1; } -#line 2395 "/Users/sabre/cvs/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2424 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" int yyerror(const char *ErrorMsg) { std::string where Index: llvm/lib/AsmParser/llvmAsmParser.h diff -u llvm/lib/AsmParser/llvmAsmParser.h:1.18 llvm/lib/AsmParser/llvmAsmParser.h:1.19 --- llvm/lib/AsmParser/llvmAsmParser.h:1.18 Mon Jan 23 22:14:29 2006 +++ llvm/lib/AsmParser/llvmAsmParser.h Wed Jan 25 16:27:16 2006 @@ -94,46 +94,47 @@ #define TAIL 311 #define ASM_TOK 312 #define MODULE 313 -#define CC_TOK 314 -#define CCC_TOK 315 -#define FASTCC_TOK 316 -#define COLDCC_TOK 317 -#define RET 318 -#define BR 319 -#define SWITCH 320 -#define INVOKE 321 -#define UNWIND 322 -#define UNREACHABLE 323 -#define ADD 324 -#define SUB 325 -#define MUL 326 -#define DIV 327 -#define REM 328 -#define AND 329 -#define OR 330 -#define XOR 331 -#define SETLE 332 -#define SETGE 333 -#define SETLT 334 -#define SETGT 335 -#define SETEQ 336 -#define SETNE 337 -#define MALLOC 338 -#define ALLOCA 339 -#define FREE 340 -#define LOAD 341 -#define STORE 342 -#define GETELEMENTPTR 343 -#define PHI_TOK 344 -#define CAST 345 -#define SELECT 346 -#define SHL 347 -#define SHR 348 -#define VAARG 349 -#define EXTRACTELEMENT 350 -#define INSERTELEMENT 351 -#define VAARG_old 352 -#define VANEXT_old 353 +#define SIDEEFFECT 314 +#define CC_TOK 315 +#define CCC_TOK 316 +#define FASTCC_TOK 317 +#define COLDCC_TOK 318 +#define RET 319 +#define BR 320 +#define SWITCH 321 +#define INVOKE 322 +#define UNWIND 323 +#define UNREACHABLE 324 +#define ADD 325 +#define SUB 326 +#define MUL 327 +#define DIV 328 +#define REM 329 +#define AND 330 +#define OR 331 +#define XOR 332 +#define SETLE 333 +#define SETGE 334 +#define SETLT 335 +#define SETGT 336 +#define SETEQ 337 +#define SETNE 338 +#define MALLOC 339 +#define ALLOCA 340 +#define FREE 341 +#define LOAD 342 +#define STORE 343 +#define GETELEMENTPTR 344 +#define PHI_TOK 345 +#define CAST 346 +#define SELECT 347 +#define SHL 348 +#define SHR 349 +#define VAARG 350 +#define EXTRACTELEMENT 351 +#define INSERTELEMENT 352 +#define VAARG_old 353 +#define VANEXT_old 354 extern YYSTYPE llvmAsmlval; From alenhar2 at cs.uiuc.edu Wed Jan 25 16:28:19 2006 From: alenhar2 at cs.uiuc.edu (Andrew Lenharth) Date: Wed, 25 Jan 2006 16:28:19 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaISelLowering.cpp Message-ID: <200601252228.QAA07900@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/Alpha: AlphaISelLowering.cpp updated: 1.30 -> 1.31 --- Log message: forgot one --- Diffs of the changes: (+1 -0) AlphaISelLowering.cpp | 1 + 1 files changed, 1 insertion(+) Index: llvm/lib/Target/Alpha/AlphaISelLowering.cpp diff -u llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.30 llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.31 --- llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.30 Wed Jan 25 15:54:38 2006 +++ llvm/lib/Target/Alpha/AlphaISelLowering.cpp Wed Jan 25 16:28:07 2006 @@ -140,6 +140,7 @@ setOperationAction(ISD::VASTART, MVT::Other, Custom); setOperationAction(ISD::VAEND, MVT::Other, Custom); setOperationAction(ISD::VACOPY, MVT::Other, Custom); + setOperationAction(ISD::VAARG, MVT::Other, Custom); setStackPointerRegisterToSaveRestore(Alpha::R30); From lattner at cs.uiuc.edu Wed Jan 25 17:08:28 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Wed, 25 Jan 2006 17:08:28 -0600 Subject: [llvm-commits] CVS: llvm/lib/Bytecode/Reader/Reader.cpp Reader.h Message-ID: <200601252308.RAA08357@zion.cs.uiuc.edu> Changes in directory llvm/lib/Bytecode/Reader: Reader.cpp updated: 1.186 -> 1.187 Reader.h updated: 1.26 -> 1.27 --- Log message: add bc reader/writer support for inline asm --- Diffs of the changes: (+33 -10) Reader.cpp | 39 +++++++++++++++++++++++++++++++-------- Reader.h | 4 ++-- 2 files changed, 33 insertions(+), 10 deletions(-) Index: llvm/lib/Bytecode/Reader/Reader.cpp diff -u llvm/lib/Bytecode/Reader/Reader.cpp:1.186 llvm/lib/Bytecode/Reader/Reader.cpp:1.187 --- llvm/lib/Bytecode/Reader/Reader.cpp:1.186 Wed Jan 25 11:18:50 2006 +++ llvm/lib/Bytecode/Reader/Reader.cpp Wed Jan 25 17:08:15 2006 @@ -22,6 +22,7 @@ #include "llvm/BasicBlock.h" #include "llvm/CallingConv.h" #include "llvm/Constants.h" +#include "llvm/InlineAsm.h" #include "llvm/Instructions.h" #include "llvm/SymbolTable.h" #include "llvm/Bytecode/Format.h" @@ -1404,7 +1405,7 @@ } /// Parse a single constant value -Constant *BytecodeReader::ParseConstantValue(unsigned TypeID) { +Value *BytecodeReader::ParseConstantPoolValue(unsigned TypeID) { // We must check for a ConstantExpr before switching by type because // a ConstantExpr can be of any type, and has no explicit value. // @@ -1412,11 +1413,32 @@ unsigned isExprNumArgs = read_vbr_uint(); if (isExprNumArgs) { - // 'undef' is encoded with 'exprnumargs' == 1. - if (!hasNoUndefValue) - if (--isExprNumArgs == 0) + if (!hasNoUndefValue) { + // 'undef' is encoded with 'exprnumargs' == 1. + if (isExprNumArgs == 1) return UndefValue::get(getType(TypeID)); + // Inline asm is encoded with exprnumargs == ~0U. + if (isExprNumArgs == ~0U) { + std::string AsmStr = read_str(); + std::string ConstraintStr = read_str(); + unsigned Flags = read_vbr_uint(); + + const PointerType *PTy = dyn_cast(getType(TypeID)); + const FunctionType *FTy = + PTy ? dyn_cast(PTy->getElementType()) : 0; + + if (!FTy || !InlineAsm::Verify(FTy, ConstraintStr)) + error("Invalid constraints for inline asm"); + if (Flags & ~1U) + error("Invalid flags for inline asm"); + bool HasSideEffects = Flags & 1; + return InlineAsm::get(FTy, AsmStr, ConstraintStr, HasSideEffects); + } + + --isExprNumArgs; + } + // FIXME: Encoding of constant exprs could be much more compact! std::vector ArgVec; ArgVec.reserve(isExprNumArgs); @@ -1695,9 +1717,9 @@ ParseStringConstants(NumEntries, Tab); } else { for (unsigned i = 0; i < NumEntries; ++i) { - Constant *C = ParseConstantValue(Typ); - assert(C && "ParseConstantValue returned NULL!"); - unsigned Slot = insertValue(C, Typ, Tab); + Value *V = ParseConstantPoolValue(Typ); + assert(V && "ParseConstantPoolValue returned NULL!"); + unsigned Slot = insertValue(V, Typ, Tab); // If we are reading a function constant table, make sure that we adjust // the slot number to be the real global constant number. @@ -1705,7 +1727,8 @@ if (&Tab != &ModuleValues && Typ < ModuleValues.size() && ModuleValues[Typ]) Slot += ModuleValues[Typ]->size(); - ResolveReferencesToConstant(C, Typ, Slot); + if (Constant *C = dyn_cast(V)) + ResolveReferencesToConstant(C, Typ, Slot); } } } Index: llvm/lib/Bytecode/Reader/Reader.h diff -u llvm/lib/Bytecode/Reader/Reader.h:1.26 llvm/lib/Bytecode/Reader/Reader.h:1.27 --- llvm/lib/Bytecode/Reader/Reader.h:1.26 Thu Jan 19 00:57:58 2006 +++ llvm/lib/Bytecode/Reader/Reader.h Wed Jan 25 17:08:15 2006 @@ -229,8 +229,8 @@ void ParseConstantPool(ValueTable& Values, TypeListTy& Types, bool isFunction); - /// @brief Parse a single constant value - Constant* ParseConstantValue(unsigned TypeID); + /// @brief Parse a single constant pool value + Value *ParseConstantPoolValue(unsigned TypeID); /// @brief Parse a block of types constants void ParseTypes(TypeListTy &Tab, unsigned NumEntries); From lattner at cs.uiuc.edu Wed Jan 25 17:08:28 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Wed, 25 Jan 2006 17:08:28 -0600 Subject: [llvm-commits] CVS: llvm/lib/Bytecode/Writer/SlotCalculator.cpp SlotCalculator.h Writer.cpp WriterInternals.h Message-ID: <200601252308.RAA08367@zion.cs.uiuc.edu> Changes in directory llvm/lib/Bytecode/Writer: SlotCalculator.cpp updated: 1.72 -> 1.73 SlotCalculator.h updated: 1.22 -> 1.23 Writer.cpp updated: 1.118 -> 1.119 WriterInternals.h updated: 1.26 -> 1.27 --- Log message: add bc reader/writer support for inline asm --- Diffs of the changes: (+41 -24) SlotCalculator.cpp | 25 ++++++++++++------------- SlotCalculator.h | 14 +++++++------- Writer.cpp | 22 +++++++++++++++++++--- WriterInternals.h | 4 +++- 4 files changed, 41 insertions(+), 24 deletions(-) Index: llvm/lib/Bytecode/Writer/SlotCalculator.cpp diff -u llvm/lib/Bytecode/Writer/SlotCalculator.cpp:1.72 llvm/lib/Bytecode/Writer/SlotCalculator.cpp:1.73 --- llvm/lib/Bytecode/Writer/SlotCalculator.cpp:1.72 Sat Jun 18 13:34:51 2005 +++ llvm/lib/Bytecode/Writer/SlotCalculator.cpp Wed Jan 25 17:08:15 2006 @@ -18,6 +18,7 @@ #include "llvm/Constants.h" #include "llvm/DerivedTypes.h" #include "llvm/Function.h" +#include "llvm/InlineAsm.h" #include "llvm/Instructions.h" #include "llvm/Module.h" #include "llvm/SymbolTable.h" @@ -27,7 +28,6 @@ #include "llvm/ADT/STLExtras.h" #include #include - using namespace llvm; #if 0 @@ -181,11 +181,13 @@ SC_DEBUG("Inserting function constants:\n"); for (Module::const_iterator F = TheModule->begin(), E = TheModule->end(); F != E; ++F) { - for (const_inst_iterator I = inst_begin(F), E = inst_end(F); I != E; ++I){ - for (unsigned op = 0, e = I->getNumOperands(); op != e; ++op) - if (isa(I->getOperand(op)) && - !isa(I->getOperand(op))) - getOrCreateSlot(I->getOperand(op)); + for (const_inst_iterator I = inst_begin(F), E = inst_end(F); I != E; ++I) { + for (User::const_op_iterator OI = I->op_begin(), E = I->op_end(); + OI != E; ++OI) { + if ((isa(*OI) && !isa(*OI)) || + isa(*OI)) + getOrCreateSlot(*OI); + } getOrCreateSlot(I->getType()); } processSymbolTableConstants(&F->getSymbolTable()); @@ -286,7 +288,7 @@ for(Function::const_arg_iterator I = F->arg_begin(), E = F->arg_end(); I != E; ++I) getOrCreateSlot(I); - if ( !ModuleContainsAllFunctionConstants ) { + if (!ModuleContainsAllFunctionConstants) { // Iterate over all of the instructions in the function, looking for // constant values that are referenced. Add these to the value pools // before any nonconstant values. This will be turned into the constant @@ -295,12 +297,9 @@ // Emit all of the constants that are being used by the instructions in // the function... - constant_iterator CI = constant_begin(F); - constant_iterator CE = constant_end(F); - while ( CI != CE ) { - this->getOrCreateSlot(*CI); - ++CI; - } + for (constant_iterator CI = constant_begin(F), CE = constant_end(F); + CI != CE; ++CI) + getOrCreateSlot(*CI); // If there is a symbol table, it is possible that the user has names for // constants that are not being used. In this case, we will have problems Index: llvm/lib/Bytecode/Writer/SlotCalculator.h diff -u llvm/lib/Bytecode/Writer/SlotCalculator.h:1.22 llvm/lib/Bytecode/Writer/SlotCalculator.h:1.23 --- llvm/lib/Bytecode/Writer/SlotCalculator.h:1.22 Thu Apr 21 16:48:46 2005 +++ llvm/lib/Bytecode/Writer/SlotCalculator.h Wed Jan 25 17:08:15 2006 @@ -74,9 +74,9 @@ SlotCalculator(const SlotCalculator &); // DO NOT IMPLEMENT void operator=(const SlotCalculator &); // DO NOT IMPLEMENT public: - SlotCalculator(const Module *M ); + SlotCalculator(const Module *M); // Start out in incorp state - SlotCalculator(const Function *F ); + SlotCalculator(const Function *F); /// getSlot - Return the slot number of the specified value in it's type /// plane. This returns < 0 on error! @@ -146,19 +146,19 @@ // they haven't been inserted already, they get inserted, otherwise // they are ignored. // - int getOrCreateSlot(const Value *D); - int getOrCreateSlot(const Type* T); + int getOrCreateSlot(const Value *V); + int getOrCreateSlot(const Type *T); // insertValue - Insert a value into the value table... Return the // slot that it occupies, or -1 if the declaration is to be ignored // because of the IgnoreNamedNodes flag. // int insertValue(const Value *D, bool dontIgnore = false); - int insertType(const Type* T, bool dontIgnore = false ); + int insertType(const Type *T, bool dontIgnore = false); // doInsertValue - Small helper function to be called only be insertVal. - int doInsertValue(const Value *D); - int doInsertType(const Type*T); + int doInsertValue(const Value *V); + int doInsertType(const Type *T); // processModule - Process all of the module level function declarations and // types that are available. Index: llvm/lib/Bytecode/Writer/Writer.cpp diff -u llvm/lib/Bytecode/Writer/Writer.cpp:1.118 llvm/lib/Bytecode/Writer/Writer.cpp:1.119 --- llvm/lib/Bytecode/Writer/Writer.cpp:1.118 Mon Jan 23 22:14:29 2006 +++ llvm/lib/Bytecode/Writer/Writer.cpp Wed Jan 25 17:08:15 2006 @@ -22,6 +22,7 @@ #include "llvm/CallingConv.h" #include "llvm/Constants.h" #include "llvm/DerivedTypes.h" +#include "llvm/InlineAsm.h" #include "llvm/Instructions.h" #include "llvm/Module.h" #include "llvm/SymbolTable.h" @@ -389,6 +390,19 @@ return; } +/// outputInlineAsm - InlineAsm's get emitted to the constant pool, so they can +/// be shared by multiple uses. +void BytecodeWriter::outputInlineAsm(const InlineAsm *IA) { + // Output a marker, so we know when we have one one parsing the constant pool. + // Note that this encoding is 5 bytes: not very efficient for a marker. Since + // unique inline asms are rare, this should hardly matter. + output_vbr(~0U); + + output(IA->getAsmString()); + output(IA->getConstraintString()); + output_vbr(unsigned(IA->hasSideEffects())); +} + void BytecodeWriter::outputConstantStrings() { SlotCalculator::string_iterator I = Table.string_begin(); SlotCalculator::string_iterator E = Table.string_end(); @@ -847,7 +861,8 @@ /*empty*/; unsigned NC = ValNo; // Number of constants - for (; NC < Plane.size() && (isa(Plane[NC])); NC++) + for (; NC < Plane.size() && (isa(Plane[NC]) || + isa(Plane[NC])); NC++) /*empty*/; NC -= ValNo; // Convert from index into count if (NC == 0) return; // Skip empty type planes... @@ -866,9 +881,10 @@ for (unsigned i = ValNo; i < ValNo+NC; ++i) { const Value *V = Plane[i]; - if (const Constant *C = dyn_cast(V)) { + if (const Constant *C = dyn_cast(V)) outputConstant(C); - } + else + outputInlineAsm(cast(V)); } } Index: llvm/lib/Bytecode/Writer/WriterInternals.h diff -u llvm/lib/Bytecode/Writer/WriterInternals.h:1.26 llvm/lib/Bytecode/Writer/WriterInternals.h:1.27 --- llvm/lib/Bytecode/Writer/WriterInternals.h:1.26 Fri Nov 11 19:33:40 2005 +++ llvm/lib/Bytecode/Writer/WriterInternals.h Wed Jan 25 17:08:15 2006 @@ -24,6 +24,7 @@ #include namespace llvm { + class InlineAsm; class BytecodeWriter { std::vector &Out; @@ -68,6 +69,7 @@ void outputConstantsInPlane(const std::vector &Plane, unsigned StartNo); void outputConstant(const Constant *CPV); + void outputInlineAsm(const InlineAsm *IA); void outputType(const Type *T); /// @brief Unsigned integer output primitive @@ -88,7 +90,7 @@ /// @brief Signed 32-bit variable bit rate output primitive. inline void output_vbr(int i); - inline void output(const std::string &s ); + inline void output(const std::string &s); inline void output_data(const void *Ptr, const void *End); From lattner at cs.uiuc.edu Wed Jan 25 17:32:05 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Wed, 25 Jan 2006 17:32:05 -0600 Subject: [llvm-commits] CVS: llvm/docs/BytecodeFormat.html Message-ID: <200601252332.RAA08507@zion.cs.uiuc.edu> Changes in directory llvm/docs: BytecodeFormat.html updated: 1.49 -> 1.50 --- Log message: update the bytecode format guide for the encoding of inline asm. --- Diffs of the changes: (+62 -10) BytecodeFormat.html | 72 ++++++++++++++++++++++++++++++++++++++++++++-------- 1 files changed, 62 insertions(+), 10 deletions(-) Index: llvm/docs/BytecodeFormat.html diff -u llvm/docs/BytecodeFormat.html:1.49 llvm/docs/BytecodeFormat.html:1.50 --- llvm/docs/BytecodeFormat.html:1.49 Mon Jan 23 17:38:09 2006 +++ llvm/docs/BytecodeFormat.html Wed Jan 25 17:31:53 2006 @@ -1275,16 +1275,21 @@ + -

    Constant Field
    +
    Simple Constant Pool +Entries
    +
    -

    Constants come in many shapes and flavors. The sections that follow -define the format for each of them. All constants start with a Constant pool entries come in many shapes and flavors. The sections that +follow define the format for each of them. All constants start with a uint32_vbr encoded integer that provides the number of operands for the constant. For primitive, structure, and -array constants, this will always be zero since those types of -constants have no operands. In this case, we have the following field -definitions:

    +array constants, this will always be zero to indicate that the form of the +constant is solely determined by its type. In this case, we have the following +field definitions, based on type:

    +
    • Bool. This is written as an uint32_vbr of value 1U or 0U.
      • @@ -1303,12 +1308,59 @@ field values of the structure.
    +
    + + +
    Undef Entries
    + +

    When the number of operands to the constant is one, we have an 'undef' value of the specified type.

    +
    + + +
    Inline Assembler Entries
    + +
    +

    Inline Assembler entries are stored in the constant pool, though they are not + officially LLVM constants. These entries are marked with a value of + "4294967295" (all ones) for the number of operands. They are encoded as + follows:

    + + + + + + + + + + + + + + + + + + + + +
    TypeField Description
    stringThe asm string.
    stringThe constraints string.
    uint32_vbrFlags
    + +

    Currently, the only defined flag, the low bit, indicates whether or not the + inline assembler has side effects.

    + +
    + + +
    Constant Expression Entries
    + +
    -

    When the number of operands to the constant is greater than one, we have a -constant expression and its field format is provided in the table below, and the -number is equal to the number of operands+1.

    +

    Otherwise, we have a constant expression. The format of the constant +expression is specified in the table below, and the number is equal to the +number of operands+1.

    @@ -2096,7 +2148,7 @@ Reid Spencer and Chris Lattner
    The LLVM Compiler Infrastructure
    -Last modified: $Date: 2006/01/23 23:38:09 $ +Last modified: $Date: 2006/01/25 23:31:53 $ From alenhar2 at cs.uiuc.edu Wed Jan 25 17:33:44 2006 From: alenhar2 at cs.uiuc.edu (Andrew Lenharth) Date: Wed, 25 Jan 2006 17:33:44 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaISelLowering.cpp Message-ID: <200601252333.RAA08531@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/Alpha: AlphaISelLowering.cpp updated: 1.31 -> 1.32 --- Log message: oops --- Diffs of the changes: (+1 -1) AlphaISelLowering.cpp | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/Target/Alpha/AlphaISelLowering.cpp diff -u llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.31 llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.32 --- llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.31 Wed Jan 25 16:28:07 2006 +++ llvm/lib/Target/Alpha/AlphaISelLowering.cpp Wed Jan 25 17:33:32 2006 @@ -138,7 +138,7 @@ setOperationAction(ISD::ExternalSymbol, MVT::i64, Custom); setOperationAction(ISD::VASTART, MVT::Other, Custom); - setOperationAction(ISD::VAEND, MVT::Other, Custom); + setOperationAction(ISD::VAEND, MVT::Other, Expand); setOperationAction(ISD::VACOPY, MVT::Other, Custom); setOperationAction(ISD::VAARG, MVT::Other, Custom); From lattner at cs.uiuc.edu Wed Jan 25 17:48:09 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Wed, 25 Jan 2006 17:48:09 -0600 Subject: [llvm-commits] CVS: llvm/docs/LangRef.html Message-ID: <200601252348.RAA08610@zion.cs.uiuc.edu> Changes in directory llvm/docs: LangRef.html updated: 1.133 -> 1.134 --- Log message: document the syntax of inline asm --- Diffs of the changes: (+56 -1) LangRef.html | 57 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++- 1 files changed, 56 insertions(+), 1 deletion(-) Index: llvm/docs/LangRef.html diff -u llvm/docs/LangRef.html:1.133 llvm/docs/LangRef.html:1.134 --- llvm/docs/LangRef.html:1.133 Mon Jan 23 18:37:10 2006 +++ llvm/docs/LangRef.html Wed Jan 25 17:47:57 2006 @@ -55,6 +55,11 @@
  • Constant Expressions
    • +
  • Other Values +
      +
    1. Inline Assembler Expressions +
    +
  • Instruction Reference
    1. Terminator Instructions @@ -1145,6 +1150,56 @@ +
      Other Values
      + + + +
      +Inline Assembler Expressions +
      + +
      + +

      +LLVM supports inline assembler expressions (as opposed to +Module-Level Inline Assembly) through the use of a special value. This +value represents the inline assembler as a string (containing the instructions +to emit), a list of operand constraints (stored as a string), and a flag that +indicates whether or not the inline asm expression has side effects. An example +inline assembler expression is: +

      + +
      +  int(int) asm "bswap $0", "=r,r"
+
      + +

      +Inline assembler expressions may only be used as the callee operand of +a call instruction. Thus, typically we have: +

      + +
      +  %X = call int asm "bswap $0", "=r,r"(int %Y)
+
      + +

      +Inline asms with side effects not visible in the constraint list must be marked +as having side effects. This is done through the use of the +'sideeffect' keyword, like so: +

      + +
      +  call void asm sideeffect "eieio", ""()
+
      + +

      TODO: The format of the asm and constraints string still need to be +documented here. Constraints on what can be done (e.g. duplication, moving, etc +need to be documented). +

      + +
      + +
      Instruction Reference
      @@ -3679,7 +3734,7 @@ Chris Lattner
      The LLVM Compiler Infrastructure
      - Last modified: $Date: 2006/01/24 00:37:10 $ + Last modified: $Date: 2006/01/25 23:47:57 $ From lattner at cs.uiuc.edu Wed Jan 25 17:50:06 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Wed, 25 Jan 2006 17:50:06 -0600 Subject: [llvm-commits] CVS: llvm/test/Feature/inlineasm.ll Message-ID: <200601252350.RAA08656@zion.cs.uiuc.edu> Changes in directory llvm/test/Feature: inlineasm.ll updated: 1.2 -> 1.3 --- Log message: new tests for actual inline asm expressions --- Diffs of the changes: (+8 -2) inlineasm.ll | 10 ++++++++-- 1 files changed, 8 insertions(+), 2 deletions(-) Index: llvm/test/Feature/inlineasm.ll diff -u llvm/test/Feature/inlineasm.ll:1.2 llvm/test/Feature/inlineasm.ll:1.3 --- llvm/test/Feature/inlineasm.ll:1.2 Mon Jan 23 18:37:20 2006 +++ llvm/test/Feature/inlineasm.ll Wed Jan 25 17:49:54 2006 @@ -1,8 +1,14 @@ -; RUN: llvm-as %s -o - | llvm-dis > Output/t1.ll -; RUN: llvm-as Output/t1.ll -o - | llvm-dis > Output/t2.ll +; RUN: llvm-as %s -o /dev/null -f && +; RUN: llvm-as %s -o - | llvm-dis > Output/t1.ll && +; RUN: llvm-as Output/t1.ll -o - | llvm-dis > Output/t2.ll && ; RUN: diff Output/t1.ll Output/t2.ll module asm "this is an inline asm block" module asm "this is another inline asm block" +int %test() { + %X = call int asm "tricky here $0, $1", "=r,r"(int 4) + call void asm sideeffect "eieio", ""() + ret int %X +} From lattner at cs.uiuc.edu Wed Jan 25 18:08:57 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Wed, 25 Jan 2006 18:08:57 -0600 Subject: [llvm-commits] CVS: llvm/lib/VMCore/Verifier.cpp Message-ID: <200601260008.SAA08800@zion.cs.uiuc.edu> Changes in directory llvm/lib/VMCore: Verifier.cpp updated: 1.145 -> 1.146 --- Log message: Make sure the only user of InlineAsm's are direct calls. --- Diffs of the changes: (+4 -0) Verifier.cpp | 4 ++++ 1 files changed, 4 insertions(+) Index: llvm/lib/VMCore/Verifier.cpp diff -u llvm/lib/VMCore/Verifier.cpp:1.145 llvm/lib/VMCore/Verifier.cpp:1.146 --- llvm/lib/VMCore/Verifier.cpp:1.145 Wed Jan 18 19:20:03 2006 +++ llvm/lib/VMCore/Verifier.cpp Wed Jan 25 18:08:45 2006 @@ -47,6 +47,7 @@ #include "llvm/Module.h" #include "llvm/ModuleProvider.h" #include "llvm/DerivedTypes.h" +#include "llvm/InlineAsm.h" #include "llvm/Instructions.h" #include "llvm/Intrinsics.h" #include "llvm/PassManager.h" @@ -663,6 +664,9 @@ !EF->dominates(&BB->getParent()->getEntryBlock(), PredBB), "Instruction does not dominate all uses!", Op, &I); } + } else if (isa(I.getOperand(i))) { + Assert1(i == 0 && isa(I), + "Cannot take the address of an inline asm!", &I); } } InstsInThisBlock.insert(&I); From evan.cheng at apple.com Wed Jan 25 18:22:37 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 25 Jan 2006 18:22:37 -0600 Subject: [llvm-commits] CVS: llvm/utils/TableGen/DAGISelEmitter.cpp Message-ID: <200601260022.SAA08892@zion.cs.uiuc.edu> Changes in directory llvm/utils/TableGen: DAGISelEmitter.cpp updated: 1.141 -> 1.142 --- Log message: Incoming (and optional) flag bugs. They may be embedded inside a inner node of a pattern. Also, nodes which take incoming flag should not be folded if it has more than one use. --- Diffs of the changes: (+56 -30) DAGISelEmitter.cpp | 86 ++++++++++++++++++++++++++++++++++------------------- 1 files changed, 56 insertions(+), 30 deletions(-) Index: llvm/utils/TableGen/DAGISelEmitter.cpp diff -u llvm/utils/TableGen/DAGISelEmitter.cpp:1.141 llvm/utils/TableGen/DAGISelEmitter.cpp:1.142 --- llvm/utils/TableGen/DAGISelEmitter.cpp:1.141 Tue Jan 24 14:46:50 2006 +++ llvm/utils/TableGen/DAGISelEmitter.cpp Wed Jan 25 18:22:25 2006 @@ -1909,6 +1909,7 @@ unsigned OpNo = 0; bool NodeHasChain = NodeHasProperty(N, SDNodeInfo::SDNPHasChain, ISE); bool HasChain = PatternHasProperty(N, SDNodeInfo::SDNPHasChain, ISE); + bool EmittedCheck = false; if (HasChain) { if (NodeHasChain) OpNo = 1; @@ -1916,6 +1917,7 @@ const SDNodeInfo &CInfo = ISE.getSDNodeInfo(N->getOperator()); OS << " if (!" << RootName << ".hasOneUse()) goto P" << PatternNo << "Fail; // Multiple uses of actual result?\n"; + EmittedCheck = true; if (NodeHasChain) OS << " if (CodeGenMap.count(" << RootName << ".getValue(" << CInfo.getNumResults() << "))) goto P" @@ -1927,6 +1929,20 @@ } } + // Don't fold any node which reads or writes a flag and has multiple uses. + // FIXME: we really need to separate the concepts of flag and "glue". Those + // real flag results, e.g. X86CMP output, can have multiple uses. + if (!EmittedCheck && + (PatternHasProperty(N, SDNodeInfo::SDNPInFlag, ISE) || + PatternHasProperty(N, SDNodeInfo::SDNPOptInFlag, ISE) || + PatternHasProperty(N, SDNodeInfo::SDNPOutFlag, ISE))) { + if (!isRoot) { + const SDNodeInfo &CInfo = ISE.getSDNodeInfo(N->getOperator()); + OS << " if (!" << RootName << ".hasOneUse()) goto P" + << PatternNo << "Fail; // Multiple uses of actual result?\n"; + } + } + for (unsigned i = 0, e = N->getNumChildren(); i != e; ++i, ++OpNo) { OS << " SDOperand " << RootName << OpNo << " = " << RootName << ".getOperand(" << OpNo << ");\n"; @@ -2116,19 +2132,21 @@ const DAGInstruction &Inst = ISE.getInstruction(Op); bool HasImpInputs = Inst.getNumImpOperands() > 0; bool HasImpResults = Inst.getNumImpResults() > 0; - bool HasOptInFlag = isRoot && - NodeHasProperty(Pattern, SDNodeInfo::SDNPOptInFlag, ISE); + bool HasOptInFlag = isRoot && + PatternHasProperty(Pattern, SDNodeInfo::SDNPOptInFlag, ISE); bool HasInFlag = isRoot && - NodeHasProperty(Pattern, SDNodeInfo::SDNPInFlag, ISE); - bool HasOutFlag = HasImpResults || + PatternHasProperty(Pattern, SDNodeInfo::SDNPInFlag, ISE); + bool NodeHasOutFlag = HasImpResults || (isRoot && PatternHasProperty(Pattern, SDNodeInfo::SDNPOutFlag, ISE)); bool NodeHasChain = NodeHasProperty(Pattern, SDNodeInfo::SDNPHasChain, ISE); bool HasChain = II.hasCtrlDep || (isRoot && PatternHasProperty(Pattern, SDNodeInfo::SDNPHasChain, ISE)); - if (HasOutFlag || HasInFlag || HasOptInFlag || HasImpInputs) + if (HasInFlag || NodeHasOutFlag || HasOptInFlag || HasImpInputs) OS << " SDOperand InFlag = SDOperand(0, 0);\n"; + if (HasOptInFlag) + OS << " bool HasOptInFlag = false;\n"; // How many results is this pattern expected to produce? unsigned NumExpectedResults = 0; @@ -2173,16 +2191,8 @@ bool ChainEmitted = HasChain; if (HasChain) OS << " Chain = Select(Chain);\n"; - if (HasImpInputs) - EmitCopyToRegs(Pattern, "N", ChainEmitted, true); - if (HasInFlag || HasOptInFlag) { - unsigned FlagNo = (unsigned) NodeHasChain + Pattern->getNumChildren(); - if (HasOptInFlag) - OS << " if (N.getNumOperands() == " << FlagNo+1 << ") "; - else - OS << " "; - OS << "InFlag = Select(N.getOperand(" << FlagNo << "));\n"; - } + if (HasInFlag || HasOptInFlag || HasImpInputs) + EmitInFlagSelectCode(Pattern, "N", ChainEmitted, true); unsigned NumResults = Inst.getNumResults(); unsigned ResNo = TmpNo++; @@ -2191,7 +2201,7 @@ << II.Namespace << "::" << II.TheDef->getName(); if (N->getTypeNum(0) != MVT::isVoid) OS << ", MVT::" << getEnumName(N->getTypeNum(0)); - if (HasOutFlag) + if (NodeHasOutFlag) OS << ", MVT::Flag"; unsigned LastOp = 0; @@ -2205,11 +2215,11 @@ OS << " Chain = Tmp" << LastOp << ".getValue(" << NumResults << ");\n"; } - } else if (HasChain || HasOutFlag) { + } else if (HasChain || NodeHasOutFlag) { if (HasOptInFlag) { OS << " SDOperand Result = SDOperand(0, 0);\n"; unsigned FlagNo = (unsigned) NodeHasChain + Pattern->getNumChildren(); - OS << " if (N.getNumOperands() == " << FlagNo+1 << ")\n"; + OS << " if (HasOptInFlag)\n"; OS << " Result = CurDAG->getTargetNode(" << II.Namespace << "::" << II.TheDef->getName(); @@ -2221,7 +2231,7 @@ } if (HasChain) OS << ", MVT::Other"; - if (HasOutFlag) + if (NodeHasOutFlag) OS << ", MVT::Flag"; // Inputs. @@ -2242,7 +2252,7 @@ } if (HasChain) OS << ", MVT::Other"; - if (HasOutFlag) + if (NodeHasOutFlag) OS << ", MVT::Flag"; // Inputs. @@ -2261,7 +2271,7 @@ } if (HasChain) OS << ", MVT::Other"; - if (HasOutFlag) + if (NodeHasOutFlag) OS << ", MVT::Flag"; // Inputs. @@ -2282,7 +2292,7 @@ if (HasChain) OS << " Chain = Result.getValue(" << ValNo << ");\n"; - if (HasOutFlag) + if (NodeHasOutFlag) OS << " InFlag = Result.getValue(" << ValNo + (unsigned)HasChain << ");\n"; @@ -2307,10 +2317,10 @@ OS << "Chain;\n"; } - if (HasOutFlag) + if (NodeHasOutFlag) OS << " CodeGenMap[N.getValue(" << ValNo << ")] = InFlag;\n"; - if (AddedChain && HasOutFlag) { + if (AddedChain && NodeHasOutFlag) { if (NumExpectedResults == 0) { OS << " return Result.getValue(N.ResNo+1);\n"; } else { @@ -2330,7 +2340,7 @@ << II.Namespace << "::" << II.TheDef->getName(); if (N->getTypeNum(0) != MVT::isVoid) OS << ", MVT::" << getEnumName(N->getTypeNum(0)); - if (HasOutFlag) + if (NodeHasOutFlag) OS << ", MVT::Flag"; for (unsigned i = 0, e = Ops.size(); i != e; ++i) OS << ", Tmp" << Ops[i]; @@ -2342,7 +2352,7 @@ << II.Namespace << "::" << II.TheDef->getName(); if (N->getTypeNum(0) != MVT::isVoid) OS << ", MVT::" << getEnumName(N->getTypeNum(0)); - if (HasOutFlag) + if (NodeHasOutFlag) OS << ", MVT::Flag"; for (unsigned i = 0, e = Ops.size(); i != e; ++i) OS << ", Tmp" << Ops[i]; @@ -2396,17 +2406,19 @@ } private: - /// EmitCopyToRegs - Emit the flag operands for the DAG that is + /// EmitInFlagSelectCode - Emit the flag operands for the DAG that is /// being built. - void EmitCopyToRegs(TreePatternNode *N, const std::string &RootName, - bool &ChainEmitted, bool isRoot = false) { + void EmitInFlagSelectCode(TreePatternNode *N, const std::string &RootName, + bool &ChainEmitted, bool isRoot = false) { const CodeGenTarget &T = ISE.getTargetInfo(); unsigned OpNo = (unsigned) NodeHasProperty(N, SDNodeInfo::SDNPHasChain, ISE); + bool HasInFlag = NodeHasProperty(N, SDNodeInfo::SDNPInFlag, ISE); + bool HasOptInFlag = NodeHasProperty(N, SDNodeInfo::SDNPOptInFlag, ISE); for (unsigned i = 0, e = N->getNumChildren(); i != e; ++i, ++OpNo) { TreePatternNode *Child = N->getChild(i); if (!Child->isLeaf()) { - EmitCopyToRegs(Child, RootName + utostr(OpNo), ChainEmitted); + EmitInFlagSelectCode(Child, RootName + utostr(OpNo), ChainEmitted); } else { if (DefInit *DI = dynamic_cast(Child->getLeafValue())) { if (!Child->getName().empty()) { @@ -2441,6 +2453,20 @@ } } } + + if (HasInFlag || HasOptInFlag) { + if (HasOptInFlag) { + OS << " if (" << RootName << ".getNumOperands() == " + << OpNo+1 << ") {\n"; + OS << " "; + } + OS << " InFlag = Select(" << RootName << ".getOperand(" + << OpNo << "));\n"; + if (HasOptInFlag) { + OS << " HasOptInFlag = true;\n"; + OS << " }\n"; + } + } } /// EmitCopyFromRegs - Emit code to copy result to physical registers From evan.cheng at apple.com Wed Jan 25 18:28:47 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 25 Jan 2006 18:28:47 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/ScheduleDAG.h Message-ID: <200601260028.SAA08928@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/CodeGen: ScheduleDAG.h updated: 1.6 -> 1.7 --- Log message: Duh. --- Diffs of the changes: (+2 -2) ScheduleDAG.h | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/include/llvm/CodeGen/ScheduleDAG.h diff -u llvm/include/llvm/CodeGen/ScheduleDAG.h:1.6 llvm/include/llvm/CodeGen/ScheduleDAG.h:1.7 --- llvm/include/llvm/CodeGen/ScheduleDAG.h:1.6 Wed Jan 25 12:54:24 2006 +++ llvm/include/llvm/CodeGen/ScheduleDAG.h Wed Jan 25 18:28:35 2006 @@ -63,8 +63,8 @@ // Accessors inline void setDominator(NodeInfo *D) { Dominator = D; } - inline NodeInfo *getTop() { return Members[0]; } - inline NodeInfo *getBottom() { return Members[Members.size()-1]; } + inline NodeInfo *getTop() { return Members.front(); } + inline NodeInfo *getBottom() { return Members.back(); } inline NodeInfo *getDominator() { return Dominator; } inline void setLatency(unsigned L) { Latency = L; } inline unsigned getLatency() { return Latency; } From evan.cheng at apple.com Wed Jan 25 18:29:47 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 25 Jan 2006 18:29:47 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86InstrInfo.td X86RegisterInfo.td Message-ID: <200601260029.SAA08946@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: X86InstrInfo.td updated: 1.217 -> 1.218 X86RegisterInfo.td updated: 1.27 -> 1.28 --- Log message: Remove the uses of STATUS flag register. Rely on node property SDNPInFlag, SDNPOutFlag, and SDNPOptInFlag instead. --- Diffs of the changes: (+222 -259) X86InstrInfo.td | 474 ++++++++++++++++++++++++----------------------------- X86RegisterInfo.td | 7 2 files changed, 222 insertions(+), 259 deletions(-) Index: llvm/lib/Target/X86/X86InstrInfo.td diff -u llvm/lib/Target/X86/X86InstrInfo.td:1.217 llvm/lib/Target/X86/X86InstrInfo.td:1.218 --- llvm/lib/Target/X86/X86InstrInfo.td:1.217 Mon Jan 23 23:17:12 2006 +++ llvm/lib/Target/X86/X86InstrInfo.td Wed Jan 25 18:29:36 2006 @@ -21,19 +21,17 @@ [SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>, SDTCisInt<0>, SDTCisInt<3>]>; -def SDTX86CmpTest : SDTypeProfile<1, 2, [SDTCisVT<0, FlagVT>, SDTCisSameAs<1, 2>]>; +def SDTX86CmpTest : SDTypeProfile<0, 2, [SDTCisSameAs<0, 1>]>; -def SDTX86Cmov : SDTypeProfile<1, 4, +def SDTX86Cmov : SDTypeProfile<1, 3, [SDTCisSameAs<0, 1>, SDTCisSameAs<1, 2>, - SDTCisVT<3, i8>, SDTCisVT<4, FlagVT>]>; + SDTCisVT<3, i8>]>; -def SDTX86BrCond : SDTypeProfile<0, 3, - [SDTCisVT<0, OtherVT>, - SDTCisVT<1, i8>, SDTCisVT<2, FlagVT>]>; - -def SDTX86SetCC : SDTypeProfile<1, 2, - [SDTCisVT<0, i8>, SDTCisVT<1, i8>, - SDTCisVT<2, FlagVT>]>; +def SDTX86BrCond : SDTypeProfile<0, 2, + [SDTCisVT<0, OtherVT>, SDTCisVT<1, i8>]>; + +def SDTX86SetCC : SDTypeProfile<1, 1, + [SDTCisVT<0, i8>, SDTCisVT<1, i8>]>; def SDTX86Ret : SDTypeProfile<0, 1, [SDTCisVT<0, i16>]>; @@ -70,15 +68,17 @@ def X86shld : SDNode<"X86ISD::SHLD", SDTIntShiftDOp>; def X86shrd : SDNode<"X86ISD::SHRD", SDTIntShiftDOp>; -def X86cmp : SDNode<"X86ISD::CMP" , SDTX86CmpTest, []>; -def X86test : SDNode<"X86ISD::TEST", SDTX86CmpTest, []>; +def X86cmp : SDNode<"X86ISD::CMP" , SDTX86CmpTest, + [SDNPOutFlag]>; +def X86test : SDNode<"X86ISD::TEST", SDTX86CmpTest, + [SDNPOutFlag]>; def X86cmov : SDNode<"X86ISD::CMOV", SDTX86Cmov, - [SDNPOutFlag]>; + [SDNPInFlag, SDNPOutFlag]>; def X86brcond : SDNode<"X86ISD::BRCOND", SDTX86BrCond, - [SDNPHasChain]>; + [SDNPHasChain, SDNPInFlag]>; def X86setcc : SDNode<"X86ISD::SETCC", SDTX86SetCC, - [SDNPOutFlag]>; + [SDNPInFlag, SDNPOutFlag]>; def X86retflag : SDNode<"X86ISD::RET_FLAG", SDTX86Ret, [SDNPHasChain, SDNPOptInFlag]>; @@ -411,13 +411,11 @@ def CMOV_FR32 : I<0, Pseudo, (ops FR32:$dst, FR32:$t, FR32:$f, i8imm:$cond), "#CMOV_FR32 PSEUDO!", - [(set FR32:$dst, (X86cmov FR32:$t, FR32:$f, imm:$cond, - STATUS))]>; + [(set FR32:$dst, (X86cmov FR32:$t, FR32:$f, imm:$cond))]>; def CMOV_FR64 : I<0, Pseudo, (ops FR64:$dst, FR64:$t, FR64:$f, i8imm:$cond), "#CMOV_FR64 PSEUDO!", - [(set FR64:$dst, (X86cmov FR64:$t, FR64:$f, imm:$cond, - STATUS))]>; + [(set FR64:$dst, (X86cmov FR64:$t, FR64:$f, imm:$cond))]>; } let usesCustomDAGSchedInserter = 1 in { // Expanded by the scheduler. @@ -466,39 +464,39 @@ def JMP : IBr<0xE9, (ops brtarget:$dst), "jmp $dst", [(br bb:$dst)]>; def JE : IBr<0x84, (ops brtarget:$dst), "je $dst", - [(X86brcond bb:$dst, X86_COND_E, STATUS)]>, Imp<[STATUS],[]>, TB; + [(X86brcond bb:$dst, X86_COND_E)]>, TB; def JNE : IBr<0x85, (ops brtarget:$dst), "jne $dst", - [(X86brcond bb:$dst, X86_COND_NE, STATUS)]>, Imp<[STATUS],[]>, TB; + [(X86brcond bb:$dst, X86_COND_NE)]>, TB; def JL : IBr<0x8C, (ops brtarget:$dst), "jl $dst", - [(X86brcond bb:$dst, X86_COND_L, STATUS)]>, Imp<[STATUS],[]>, TB; + [(X86brcond bb:$dst, X86_COND_L)]>, TB; def JLE : IBr<0x8E, (ops brtarget:$dst), "jle $dst", - [(X86brcond bb:$dst, X86_COND_LE, STATUS)]>, Imp<[STATUS],[]>, TB; + [(X86brcond bb:$dst, X86_COND_LE)]>, TB; def JG : IBr<0x8F, (ops brtarget:$dst), "jg $dst", - [(X86brcond bb:$dst, X86_COND_G, STATUS)]>, Imp<[STATUS],[]>, TB; + [(X86brcond bb:$dst, X86_COND_G)]>, TB; def JGE : IBr<0x8D, (ops brtarget:$dst), "jge $dst", - [(X86brcond bb:$dst, X86_COND_GE, STATUS)]>, Imp<[STATUS],[]>, TB; + [(X86brcond bb:$dst, X86_COND_GE)]>, TB; def JB : IBr<0x82, (ops brtarget:$dst), "jb $dst", - [(X86brcond bb:$dst, X86_COND_B, STATUS)]>, Imp<[STATUS],[]>, TB; + [(X86brcond bb:$dst, X86_COND_B)]>, TB; def JBE : IBr<0x86, (ops brtarget:$dst), "jbe $dst", - [(X86brcond bb:$dst, X86_COND_BE, STATUS)]>, Imp<[STATUS],[]>, TB; + [(X86brcond bb:$dst, X86_COND_BE)]>, TB; def JA : IBr<0x87, (ops brtarget:$dst), "ja $dst", - [(X86brcond bb:$dst, X86_COND_A, STATUS)]>, Imp<[STATUS],[]>, TB; + [(X86brcond bb:$dst, X86_COND_A)]>, TB; def JAE : IBr<0x83, (ops brtarget:$dst), "jae $dst", - [(X86brcond bb:$dst, X86_COND_AE, STATUS)]>, Imp<[STATUS],[]>, TB; + [(X86brcond bb:$dst, X86_COND_AE)]>, TB; def JS : IBr<0x88, (ops brtarget:$dst), "js $dst", - [(X86brcond bb:$dst, X86_COND_S, STATUS)]>, Imp<[STATUS],[]>, TB; + [(X86brcond bb:$dst, X86_COND_S)]>, TB; def JNS : IBr<0x89, (ops brtarget:$dst), "jns $dst", - [(X86brcond bb:$dst, X86_COND_NS, STATUS)]>, Imp<[STATUS],[]>, TB; + [(X86brcond bb:$dst, X86_COND_NS)]>, TB; def JP : IBr<0x8A, (ops brtarget:$dst), "jp $dst", - [(X86brcond bb:$dst, X86_COND_P, STATUS)]>, Imp<[STATUS],[]>, TB; + [(X86brcond bb:$dst, X86_COND_P)]>, TB; def JNP : IBr<0x8B, (ops brtarget:$dst), "jnp $dst", - [(X86brcond bb:$dst, X86_COND_NP, STATUS)]>, Imp<[STATUS],[]>, TB; + [(X86brcond bb:$dst, X86_COND_NP)]>, TB; def JO : IBr<0x80, (ops brtarget:$dst), "jo $dst", - [(X86brcond bb:$dst, X86_COND_O, STATUS)]>, Imp<[STATUS],[]>, TB; + [(X86brcond bb:$dst, X86_COND_O)]>, TB; def JNO : IBr<0x81, (ops brtarget:$dst), "jno $dst", - [(X86brcond bb:$dst, X86_COND_NO, STATUS)]>, Imp<[STATUS],[]>, TB; + [(X86brcond bb:$dst, X86_COND_NO)]>, TB; //===----------------------------------------------------------------------===// // Call Instructions... @@ -792,351 +790,351 @@ (ops R16:$dst, R16:$src1, R16:$src2), "cmovb {$src2, $dst|$dst, $src2}", [(set R16:$dst, (X86cmov R16:$src1, R16:$src2, - X86_COND_B, STATUS))]>, - Imp<[STATUS],[]>, TB, OpSize; + X86_COND_B))]>, + TB, OpSize; def CMOVB16rm : I<0x42, MRMSrcMem, // if , - Imp<[STATUS],[]>, TB, OpSize; + X86_COND_B))]>, + TB, OpSize; def CMOVB32rr : I<0x42, MRMSrcReg, // if , - Imp<[STATUS],[]>, TB; + X86_COND_B))]>, + TB; def CMOVB32rm : I<0x42, MRMSrcMem, // if , - Imp<[STATUS],[]>, TB; + X86_COND_B))]>, + TB; def CMOVAE16rr: I<0x43, MRMSrcReg, // if >=u, R16 = R16 (ops R16:$dst, R16:$src1, R16:$src2), "cmovae {$src2, $dst|$dst, $src2}", [(set R16:$dst, (X86cmov R16:$src1, R16:$src2, - X86_COND_AE, STATUS))]>, - Imp<[STATUS],[]>, TB, OpSize; + X86_COND_AE))]>, + TB, OpSize; def CMOVAE16rm: I<0x43, MRMSrcMem, // if >=u, R16 = [mem16] (ops R16:$dst, R16:$src1, i16mem:$src2), "cmovae {$src2, $dst|$dst, $src2}", [(set R16:$dst, (X86cmov R16:$src1, (loadi16 addr:$src2), - X86_COND_AE, STATUS))]>, - Imp<[STATUS],[]>, TB, OpSize; + X86_COND_AE))]>, + TB, OpSize; def CMOVAE32rr: I<0x43, MRMSrcReg, // if >=u, R32 = R32 (ops R32:$dst, R32:$src1, R32:$src2), "cmovae {$src2, $dst|$dst, $src2}", [(set R32:$dst, (X86cmov R32:$src1, R32:$src2, - X86_COND_AE, STATUS))]>, - Imp<[STATUS],[]>, TB; + X86_COND_AE))]>, + TB; def CMOVAE32rm: I<0x43, MRMSrcMem, // if >=u, R32 = [mem32] (ops R32:$dst, R32:$src1, i32mem:$src2), "cmovae {$src2, $dst|$dst, $src2}", [(set R32:$dst, (X86cmov R32:$src1, (loadi32 addr:$src2), - X86_COND_AE, STATUS))]>, - Imp<[STATUS],[]>, TB; + X86_COND_AE))]>, + TB; def CMOVE16rr : I<0x44, MRMSrcReg, // if ==, R16 = R16 (ops R16:$dst, R16:$src1, R16:$src2), "cmove {$src2, $dst|$dst, $src2}", [(set R16:$dst, (X86cmov R16:$src1, R16:$src2, - X86_COND_E, STATUS))]>, - Imp<[STATUS],[]>, TB, OpSize; + X86_COND_E))]>, + TB, OpSize; def CMOVE16rm : I<0x44, MRMSrcMem, // if ==, R16 = [mem16] (ops R16:$dst, R16:$src1, i16mem:$src2), "cmove {$src2, $dst|$dst, $src2}", [(set R16:$dst, (X86cmov R16:$src1, (loadi16 addr:$src2), - X86_COND_E, STATUS))]>, - Imp<[STATUS],[]>, TB, OpSize; + X86_COND_E))]>, + TB, OpSize; def CMOVE32rr : I<0x44, MRMSrcReg, // if ==, R32 = R32 (ops R32:$dst, R32:$src1, R32:$src2), "cmove {$src2, $dst|$dst, $src2}", [(set R32:$dst, (X86cmov R32:$src1, R32:$src2, - X86_COND_E, STATUS))]>, - Imp<[STATUS],[]>, TB; + X86_COND_E))]>, + TB; def CMOVE32rm : I<0x44, MRMSrcMem, // if ==, R32 = [mem32] (ops R32:$dst, R32:$src1, i32mem:$src2), "cmove {$src2, $dst|$dst, $src2}", [(set R32:$dst, (X86cmov R32:$src1, (loadi32 addr:$src2), - X86_COND_E, STATUS))]>, - Imp<[STATUS],[]>, TB; + X86_COND_E))]>, + TB; def CMOVNE16rr: I<0x45, MRMSrcReg, // if !=, R16 = R16 (ops R16:$dst, R16:$src1, R16:$src2), "cmovne {$src2, $dst|$dst, $src2}", [(set R16:$dst, (X86cmov R16:$src1, R16:$src2, - X86_COND_NE, STATUS))]>, - Imp<[STATUS],[]>, TB, OpSize; + X86_COND_NE))]>, + TB, OpSize; def CMOVNE16rm: I<0x45, MRMSrcMem, // if !=, R16 = [mem16] (ops R16:$dst, R16:$src1, i16mem:$src2), "cmovne {$src2, $dst|$dst, $src2}", [(set R16:$dst, (X86cmov R16:$src1, (loadi16 addr:$src2), - X86_COND_NE, STATUS))]>, - Imp<[STATUS],[]>, TB, OpSize; + X86_COND_NE))]>, + TB, OpSize; def CMOVNE32rr: I<0x45, MRMSrcReg, // if !=, R32 = R32 (ops R32:$dst, R32:$src1, R32:$src2), "cmovne {$src2, $dst|$dst, $src2}", [(set R32:$dst, (X86cmov R32:$src1, R32:$src2, - X86_COND_NE, STATUS))]>, - Imp<[STATUS],[]>, TB; + X86_COND_NE))]>, + TB; def CMOVNE32rm: I<0x45, MRMSrcMem, // if !=, R32 = [mem32] (ops R32:$dst, R32:$src1, i32mem:$src2), "cmovne {$src2, $dst|$dst, $src2}", [(set R32:$dst, (X86cmov R32:$src1, (loadi32 addr:$src2), - X86_COND_NE, STATUS))]>, - Imp<[STATUS],[]>, TB; + X86_COND_NE))]>, + TB; def CMOVBE16rr: I<0x46, MRMSrcReg, // if <=u, R16 = R16 (ops R16:$dst, R16:$src1, R16:$src2), "cmovbe {$src2, $dst|$dst, $src2}", [(set R16:$dst, (X86cmov R16:$src1, R16:$src2, - X86_COND_BE, STATUS))]>, - Imp<[STATUS],[]>, TB, OpSize; + X86_COND_BE))]>, + TB, OpSize; def CMOVBE16rm: I<0x46, MRMSrcMem, // if <=u, R16 = [mem16] (ops R16:$dst, R16:$src1, i16mem:$src2), "cmovbe {$src2, $dst|$dst, $src2}", [(set R16:$dst, (X86cmov R16:$src1, (loadi16 addr:$src2), - X86_COND_BE, STATUS))]>, - Imp<[STATUS],[]>, TB, OpSize; + X86_COND_BE))]>, + TB, OpSize; def CMOVBE32rr: I<0x46, MRMSrcReg, // if <=u, R32 = R32 (ops R32:$dst, R32:$src1, R32:$src2), "cmovbe {$src2, $dst|$dst, $src2}", [(set R32:$dst, (X86cmov R32:$src1, R32:$src2, - X86_COND_BE, STATUS))]>, - Imp<[STATUS],[]>, TB; + X86_COND_BE))]>, + TB; def CMOVBE32rm: I<0x46, MRMSrcMem, // if <=u, R32 = [mem32] (ops R32:$dst, R32:$src1, i32mem:$src2), "cmovbe {$src2, $dst|$dst, $src2}", [(set R32:$dst, (X86cmov R32:$src1, (loadi32 addr:$src2), - X86_COND_BE, STATUS))]>, - Imp<[STATUS],[]>, TB; + X86_COND_BE))]>, + TB; def CMOVA16rr : I<0x47, MRMSrcReg, // if >u, R16 = R16 (ops R16:$dst, R16:$src1, R16:$src2), "cmova {$src2, $dst|$dst, $src2}", [(set R16:$dst, (X86cmov R16:$src1, R16:$src2, - X86_COND_A, STATUS))]>, - Imp<[STATUS],[]>, TB, OpSize; + X86_COND_A))]>, + TB, OpSize; def CMOVA16rm : I<0x47, MRMSrcMem, // if >u, R16 = [mem16] (ops R16:$dst, R16:$src1, i16mem:$src2), "cmova {$src2, $dst|$dst, $src2}", [(set R16:$dst, (X86cmov R16:$src1, (loadi16 addr:$src2), - X86_COND_A, STATUS))]>, - Imp<[STATUS],[]>, TB, OpSize; + X86_COND_A))]>, + TB, OpSize; def CMOVA32rr : I<0x47, MRMSrcReg, // if >u, R32 = R32 (ops R32:$dst, R32:$src1, R32:$src2), "cmova {$src2, $dst|$dst, $src2}", [(set R32:$dst, (X86cmov R32:$src1, R32:$src2, - X86_COND_A, STATUS))]>, - Imp<[STATUS],[]>, TB; + X86_COND_A))]>, + TB; def CMOVA32rm : I<0x47, MRMSrcMem, // if >u, R32 = [mem32] (ops R32:$dst, R32:$src1, i32mem:$src2), "cmova {$src2, $dst|$dst, $src2}", [(set R32:$dst, (X86cmov R32:$src1, (loadi32 addr:$src2), - X86_COND_A, STATUS))]>, - Imp<[STATUS],[]>, TB; + X86_COND_A))]>, + TB; def CMOVL16rr : I<0x4C, MRMSrcReg, // if , - Imp<[STATUS],[]>, TB, OpSize; + X86_COND_L))]>, + TB, OpSize; def CMOVL16rm : I<0x4C, MRMSrcMem, // if , - Imp<[STATUS],[]>, TB, OpSize; + X86_COND_L))]>, + TB, OpSize; def CMOVL32rr : I<0x4C, MRMSrcReg, // if , - Imp<[STATUS],[]>, TB; + X86_COND_L))]>, + TB; def CMOVL32rm : I<0x4C, MRMSrcMem, // if , - Imp<[STATUS],[]>, TB; + X86_COND_L))]>, + TB; def CMOVGE16rr: I<0x4D, MRMSrcReg, // if >=s, R16 = R16 (ops R16:$dst, R16:$src1, R16:$src2), "cmovge {$src2, $dst|$dst, $src2}", [(set R16:$dst, (X86cmov R16:$src1, R16:$src2, - X86_COND_GE, STATUS))]>, - Imp<[STATUS],[]>, TB, OpSize; + X86_COND_GE))]>, + TB, OpSize; def CMOVGE16rm: I<0x4D, MRMSrcMem, // if >=s, R16 = [mem16] (ops R16:$dst, R16:$src1, i16mem:$src2), "cmovge {$src2, $dst|$dst, $src2}", [(set R16:$dst, (X86cmov R16:$src1, (loadi16 addr:$src2), - X86_COND_GE, STATUS))]>, - Imp<[STATUS],[]>, TB, OpSize; + X86_COND_GE))]>, + TB, OpSize; def CMOVGE32rr: I<0x4D, MRMSrcReg, // if >=s, R32 = R32 (ops R32:$dst, R32:$src1, R32:$src2), "cmovge {$src2, $dst|$dst, $src2}", [(set R32:$dst, (X86cmov R32:$src1, R32:$src2, - X86_COND_GE, STATUS))]>, - Imp<[STATUS],[]>, TB; + X86_COND_GE))]>, + TB; def CMOVGE32rm: I<0x4D, MRMSrcMem, // if >=s, R32 = [mem32] (ops R32:$dst, R32:$src1, i32mem:$src2), "cmovge {$src2, $dst|$dst, $src2}", [(set R32:$dst, (X86cmov R32:$src1, (loadi32 addr:$src2), - X86_COND_GE, STATUS))]>, - Imp<[STATUS],[]>, TB; + X86_COND_GE))]>, + TB; def CMOVLE16rr: I<0x4E, MRMSrcReg, // if <=s, R16 = R16 (ops R16:$dst, R16:$src1, R16:$src2), "cmovle {$src2, $dst|$dst, $src2}", [(set R16:$dst, (X86cmov R16:$src1, R16:$src2, - X86_COND_LE, STATUS))]>, - Imp<[STATUS],[]>, TB, OpSize; + X86_COND_LE))]>, + TB, OpSize; def CMOVLE16rm: I<0x4E, MRMSrcMem, // if <=s, R16 = [mem16] (ops R16:$dst, R16:$src1, i16mem:$src2), "cmovle {$src2, $dst|$dst, $src2}", [(set R16:$dst, (X86cmov R16:$src1, (loadi16 addr:$src2), - X86_COND_LE, STATUS))]>, - Imp<[STATUS],[]>, TB, OpSize; + X86_COND_LE))]>, + TB, OpSize; def CMOVLE32rr: I<0x4E, MRMSrcReg, // if <=s, R32 = R32 (ops R32:$dst, R32:$src1, R32:$src2), "cmovle {$src2, $dst|$dst, $src2}", [(set R32:$dst, (X86cmov R32:$src1, R32:$src2, - X86_COND_LE, STATUS))]>, - Imp<[STATUS],[]>, TB; + X86_COND_LE))]>, + TB; def CMOVLE32rm: I<0x4E, MRMSrcMem, // if <=s, R32 = [mem32] (ops R32:$dst, R32:$src1, i32mem:$src2), "cmovle {$src2, $dst|$dst, $src2}", [(set R32:$dst, (X86cmov R32:$src1, (loadi32 addr:$src2), - X86_COND_LE, STATUS))]>, - Imp<[STATUS],[]>, TB; + X86_COND_LE))]>, + TB; def CMOVG16rr : I<0x4F, MRMSrcReg, // if >s, R16 = R16 (ops R16:$dst, R16:$src1, R16:$src2), "cmovg {$src2, $dst|$dst, $src2}", [(set R16:$dst, (X86cmov R16:$src1, R16:$src2, - X86_COND_G, STATUS))]>, - Imp<[STATUS],[]>, TB, OpSize; + X86_COND_G))]>, + TB, OpSize; def CMOVG16rm : I<0x4F, MRMSrcMem, // if >s, R16 = [mem16] (ops R16:$dst, R16:$src1, i16mem:$src2), "cmovg {$src2, $dst|$dst, $src2}", [(set R16:$dst, (X86cmov R16:$src1, (loadi16 addr:$src2), - X86_COND_G, STATUS))]>, - Imp<[STATUS],[]>, TB, OpSize; + X86_COND_G))]>, + TB, OpSize; def CMOVG32rr : I<0x4F, MRMSrcReg, // if >s, R32 = R32 (ops R32:$dst, R32:$src1, R32:$src2), "cmovg {$src2, $dst|$dst, $src2}", [(set R32:$dst, (X86cmov R32:$src1, R32:$src2, - X86_COND_G, STATUS))]>, - Imp<[STATUS],[]>, TB; + X86_COND_G))]>, + TB; def CMOVG32rm : I<0x4F, MRMSrcMem, // if >s, R32 = [mem32] (ops R32:$dst, R32:$src1, i32mem:$src2), "cmovg {$src2, $dst|$dst, $src2}", [(set R32:$dst, (X86cmov R32:$src1, (loadi32 addr:$src2), - X86_COND_G, STATUS))]>, - Imp<[STATUS],[]>, TB; + X86_COND_G))]>, + TB; def CMOVS16rr : I<0x48, MRMSrcReg, // if signed, R16 = R16 (ops R16:$dst, R16:$src1, R16:$src2), "cmovs {$src2, $dst|$dst, $src2}", [(set R16:$dst, (X86cmov R16:$src1, R16:$src2, - X86_COND_S, STATUS))]>, - Imp<[STATUS],[]>, TB, OpSize; + X86_COND_S))]>, + TB, OpSize; def CMOVS16rm : I<0x48, MRMSrcMem, // if signed, R16 = [mem16] (ops R16:$dst, R16:$src1, i16mem:$src2), "cmovs {$src2, $dst|$dst, $src2}", [(set R16:$dst, (X86cmov R16:$src1, (loadi16 addr:$src2), - X86_COND_S, STATUS))]>, - Imp<[STATUS],[]>, TB, OpSize; + X86_COND_S))]>, + TB, OpSize; def CMOVS32rr : I<0x48, MRMSrcReg, // if signed, R32 = R32 (ops R32:$dst, R32:$src1, R32:$src2), "cmovs {$src2, $dst|$dst, $src2}", [(set R32:$dst, (X86cmov R32:$src1, R32:$src2, - X86_COND_S, STATUS))]>, - Imp<[STATUS],[]>, TB; + X86_COND_S))]>, + TB; def CMOVS32rm : I<0x48, MRMSrcMem, // if signed, R32 = [mem32] (ops R32:$dst, R32:$src1, i32mem:$src2), "cmovs {$src2, $dst|$dst, $src2}", [(set R32:$dst, (X86cmov R32:$src1, (loadi32 addr:$src2), - X86_COND_S, STATUS))]>, - Imp<[STATUS],[]>, TB; + X86_COND_S))]>, + TB; def CMOVNS16rr: I<0x49, MRMSrcReg, // if !signed, R16 = R16 (ops R16:$dst, R16:$src1, R16:$src2), "cmovns {$src2, $dst|$dst, $src2}", [(set R16:$dst, (X86cmov R16:$src1, R16:$src2, - X86_COND_NS, STATUS))]>, - Imp<[STATUS],[]>, TB, OpSize; + X86_COND_NS))]>, + TB, OpSize; def CMOVNS16rm: I<0x49, MRMSrcMem, // if !signed, R16 = [mem16] (ops R16:$dst, R16:$src1, i16mem:$src2), "cmovns {$src2, $dst|$dst, $src2}", [(set R16:$dst, (X86cmov R16:$src1, (loadi16 addr:$src2), - X86_COND_NS, STATUS))]>, - Imp<[STATUS],[]>, TB, OpSize; + X86_COND_NS))]>, + TB, OpSize; def CMOVNS32rr: I<0x49, MRMSrcReg, // if !signed, R32 = R32 (ops R32:$dst, R32:$src1, R32:$src2), "cmovns {$src2, $dst|$dst, $src2}", [(set R32:$dst, (X86cmov R32:$src1, R32:$src2, - X86_COND_NS, STATUS))]>, - Imp<[STATUS],[]>, TB; + X86_COND_NS))]>, + TB; def CMOVNS32rm: I<0x49, MRMSrcMem, // if !signed, R32 = [mem32] (ops R32:$dst, R32:$src1, i32mem:$src2), "cmovns {$src2, $dst|$dst, $src2}", [(set R32:$dst, (X86cmov R32:$src1, (loadi32 addr:$src2), - X86_COND_NS, STATUS))]>, - Imp<[STATUS],[]>, TB; + X86_COND_NS))]>, + TB; def CMOVP16rr : I<0x4A, MRMSrcReg, // if parity, R16 = R16 (ops R16:$dst, R16:$src1, R16:$src2), "cmovp {$src2, $dst|$dst, $src2}", [(set R16:$dst, (X86cmov R16:$src1, R16:$src2, - X86_COND_P, STATUS))]>, - Imp<[STATUS],[]>, TB, OpSize; + X86_COND_P))]>, + TB, OpSize; def CMOVP16rm : I<0x4A, MRMSrcMem, // if parity, R16 = [mem16] (ops R16:$dst, R16:$src1, i16mem:$src2), "cmovp {$src2, $dst|$dst, $src2}", [(set R16:$dst, (X86cmov R16:$src1, (loadi16 addr:$src2), - X86_COND_P, STATUS))]>, - Imp<[STATUS],[]>, TB, OpSize; + X86_COND_P))]>, + TB, OpSize; def CMOVP32rr : I<0x4A, MRMSrcReg, // if parity, R32 = R32 (ops R32:$dst, R32:$src1, R32:$src2), "cmovp {$src2, $dst|$dst, $src2}", [(set R32:$dst, (X86cmov R32:$src1, R32:$src2, - X86_COND_P, STATUS))]>, - Imp<[STATUS],[]>, TB; + X86_COND_P))]>, + TB; def CMOVP32rm : I<0x4A, MRMSrcMem, // if parity, R32 = [mem32] (ops R32:$dst, R32:$src1, i32mem:$src2), "cmovp {$src2, $dst|$dst, $src2}", [(set R32:$dst, (X86cmov R32:$src1, (loadi32 addr:$src2), - X86_COND_P, STATUS))]>, - Imp<[STATUS],[]>, TB; + X86_COND_P))]>, + TB; def CMOVNP16rr : I<0x4B, MRMSrcReg, // if !parity, R16 = R16 (ops R16:$dst, R16:$src1, R16:$src2), "cmovnp {$src2, $dst|$dst, $src2}", [(set R16:$dst, (X86cmov R16:$src1, R16:$src2, - X86_COND_NP, STATUS))]>, - Imp<[STATUS],[]>, TB, OpSize; + X86_COND_NP))]>, + TB, OpSize; def CMOVNP16rm : I<0x4B, MRMSrcMem, // if !parity, R16 = [mem16] (ops R16:$dst, R16:$src1, i16mem:$src2), "cmovnp {$src2, $dst|$dst, $src2}", [(set R16:$dst, (X86cmov R16:$src1, (loadi16 addr:$src2), - X86_COND_NP, STATUS))]>, - Imp<[STATUS],[]>, TB, OpSize; + X86_COND_NP))]>, + TB, OpSize; def CMOVNP32rr : I<0x4B, MRMSrcReg, // if !parity, R32 = R32 (ops R32:$dst, R32:$src1, R32:$src2), "cmovnp {$src2, $dst|$dst, $src2}", [(set R32:$dst, (X86cmov R32:$src1, R32:$src2, - X86_COND_NP, STATUS))]>, - Imp<[STATUS],[]>, TB; + X86_COND_NP))]>, + TB; def CMOVNP32rm : I<0x4B, MRMSrcMem, // if !parity, R32 = [mem32] (ops R32:$dst, R32:$src1, i32mem:$src2), "cmovnp {$src2, $dst|$dst, $src2}", [(set R32:$dst, (X86cmov R32:$src1, (loadi32 addr:$src2), - X86_COND_NP, STATUS))]>, - Imp<[STATUS],[]>, TB; + X86_COND_NP))]>, + TB; // unary instructions @@ -2055,72 +2053,60 @@ let isCommutable = 1 in { // TEST X, Y --> TEST Y, X def TEST8rr : I<0x84, MRMDestReg, (ops R8:$src1, R8:$src2), "test{b} {$src2, $src1|$src1, $src2}", - [(set STATUS, (X86test R8:$src1, R8:$src2))]>, - Imp<[],[STATUS]>; + [(X86test R8:$src1, R8:$src2)]>; def TEST16rr : I<0x85, MRMDestReg, (ops R16:$src1, R16:$src2), "test{w} {$src2, $src1|$src1, $src2}", - [(set STATUS, (X86test R16:$src1, R16:$src2))]>, - Imp<[],[STATUS]>, OpSize; + [(X86test R16:$src1, R16:$src2)]>, OpSize; def TEST32rr : I<0x85, MRMDestReg, (ops R32:$src1, R32:$src2), "test{l} {$src2, $src1|$src1, $src2}", - [(set STATUS, (X86test R32:$src1, R32:$src2))]>, - Imp<[],[STATUS]>; + [(X86test R32:$src1, R32:$src2)]>; } def TEST8mr : I<0x84, MRMDestMem, (ops i8mem :$src1, R8 :$src2), "test{b} {$src2, $src1|$src1, $src2}", - [(set STATUS, (X86test (loadi8 addr:$src1), R8:$src2))]>, - Imp<[],[STATUS]>; + [(X86test (loadi8 addr:$src1), R8:$src2)]>; def TEST16mr : I<0x85, MRMDestMem, (ops i16mem:$src1, R16:$src2), "test{w} {$src2, $src1|$src1, $src2}", - [(set STATUS, (X86test (loadi16 addr:$src1), R16:$src2))]>, - Imp<[],[STATUS]>, OpSize; + [(X86test (loadi16 addr:$src1), R16:$src2)]>, + OpSize; def TEST32mr : I<0x85, MRMDestMem, (ops i32mem:$src1, R32:$src2), "test{l} {$src2, $src1|$src1, $src2}", - [(set STATUS, (X86test (loadi32 addr:$src1), R32:$src2))]>, - Imp<[],[STATUS]>; + [(X86test (loadi32 addr:$src1), R32:$src2)]>; def TEST8rm : I<0x84, MRMSrcMem, (ops R8 :$src1, i8mem :$src2), "test{b} {$src2, $src1|$src1, $src2}", - [(set STATUS, (X86test R8:$src1, (loadi8 addr:$src2)))]>, - Imp<[],[STATUS]>; + [(X86test R8:$src1, (loadi8 addr:$src2))]>; def TEST16rm : I<0x85, MRMSrcMem, (ops R16:$src1, i16mem:$src2), "test{w} {$src2, $src1|$src1, $src2}", - [(set STATUS, (X86test R16:$src1, (loadi16 addr:$src2)))]>, - Imp<[],[STATUS]>, OpSize; + [(X86test R16:$src1, (loadi16 addr:$src2))]>, + OpSize; def TEST32rm : I<0x85, MRMSrcMem, (ops R32:$src1, i32mem:$src2), "test{l} {$src2, $src1|$src1, $src2}", - [(set STATUS, (X86test R32:$src1, (loadi32 addr:$src2)))]>, - Imp<[],[STATUS]>; + [(X86test R32:$src1, (loadi32 addr:$src2))]>; def TEST8ri : Ii8 <0xF6, MRM0r, // flags = R8 & imm8 (ops R8:$src1, i8imm:$src2), "test{b} {$src2, $src1|$src1, $src2}", - [(set STATUS, (X86test R8:$src1, imm:$src2))]>, - Imp<[],[STATUS]>; + [(X86test R8:$src1, imm:$src2)]>; def TEST16ri : Ii16<0xF7, MRM0r, // flags = R16 & imm16 (ops R16:$src1, i16imm:$src2), "test{w} {$src2, $src1|$src1, $src2}", - [(set STATUS, (X86test R16:$src1, imm:$src2))]>, - Imp<[],[STATUS]>, OpSize; + [(X86test R16:$src1, imm:$src2)]>, OpSize; def TEST32ri : Ii32<0xF7, MRM0r, // flags = R32 & imm32 (ops R32:$src1, i32imm:$src2), "test{l} {$src2, $src1|$src1, $src2}", - [(set STATUS, (X86test R32:$src1, imm:$src2))]>, - Imp<[],[STATUS]>; + [(X86test R32:$src1, imm:$src2)]>; def TEST8mi : Ii8 <0xF6, MRM0m, // flags = [mem8] & imm8 (ops i8mem:$src1, i8imm:$src2), "test{b} {$src2, $src1|$src1, $src2}", - [(set STATUS, (X86test (loadi8 addr:$src1), imm:$src2))]>, - Imp<[],[STATUS]>; + [(X86test (loadi8 addr:$src1), imm:$src2)]>; def TEST16mi : Ii16<0xF7, MRM0m, // flags = [mem16] & imm16 (ops i16mem:$src1, i16imm:$src2), "test{w} {$src2, $src1|$src1, $src2}", - [(set STATUS, (X86test (loadi16 addr:$src1), imm:$src2))]>, - Imp<[],[STATUS]>, OpSize; + [(X86test (loadi16 addr:$src1), imm:$src2)]>, + OpSize; def TEST32mi : Ii32<0xF7, MRM0m, // flags = [mem32] & imm32 (ops i32mem:$src1, i32imm:$src2), "test{l} {$src2, $src1|$src1, $src2}", - [(set STATUS, (X86test (loadi32 addr:$src1), imm:$src2))]>, - Imp<[],[STATUS]>; + [(X86test (loadi32 addr:$src1), imm:$src2)]>; // Condition code ops, incl. set if equal/not equal/... @@ -2130,222 +2116,207 @@ def SETEr : I<0x94, MRM0r, (ops R8 :$dst), "sete $dst", - [(set R8:$dst, (X86setcc X86_COND_E, STATUS))]>, + [(set R8:$dst, (X86setcc X86_COND_E))]>, TB; // R8 = == def SETEm : I<0x94, MRM0m, (ops i8mem:$dst), "sete $dst", - [(store (X86setcc X86_COND_E, STATUS), addr:$dst)]>, + [(store (X86setcc X86_COND_E), addr:$dst)]>, TB; // [mem8] = == def SETNEr : I<0x95, MRM0r, (ops R8 :$dst), "setne $dst", - [(set R8:$dst, (X86setcc X86_COND_NE, STATUS))]>, + [(set R8:$dst, (X86setcc X86_COND_NE))]>, TB; // R8 = != def SETNEm : I<0x95, MRM0m, (ops i8mem:$dst), "setne $dst", - [(store (X86setcc X86_COND_NE, STATUS), addr:$dst)]>, + [(store (X86setcc X86_COND_NE), addr:$dst)]>, TB; // [mem8] = != def SETLr : I<0x9C, MRM0r, (ops R8 :$dst), "setl $dst", - [(set R8:$dst, (X86setcc X86_COND_L, STATUS))]>, + [(set R8:$dst, (X86setcc X86_COND_L))]>, TB; // R8 = < signed def SETLm : I<0x9C, MRM0m, (ops i8mem:$dst), "setl $dst", - [(store (X86setcc X86_COND_L, STATUS), addr:$dst)]>, + [(store (X86setcc X86_COND_L), addr:$dst)]>, TB; // [mem8] = < signed def SETGEr : I<0x9D, MRM0r, (ops R8 :$dst), "setge $dst", - [(set R8:$dst, (X86setcc X86_COND_GE, STATUS))]>, + [(set R8:$dst, (X86setcc X86_COND_GE))]>, TB; // R8 = >= signed def SETGEm : I<0x9D, MRM0m, (ops i8mem:$dst), "setge $dst", - [(store (X86setcc X86_COND_GE, STATUS), addr:$dst)]>, + [(store (X86setcc X86_COND_GE), addr:$dst)]>, TB; // [mem8] = >= signed def SETLEr : I<0x9E, MRM0r, (ops R8 :$dst), "setle $dst", - [(set R8:$dst, (X86setcc X86_COND_LE, STATUS))]>, + [(set R8:$dst, (X86setcc X86_COND_LE))]>, TB; // R8 = <= signed def SETLEm : I<0x9E, MRM0m, (ops i8mem:$dst), "setle $dst", - [(store (X86setcc X86_COND_LE, STATUS), addr:$dst)]>, + [(store (X86setcc X86_COND_LE), addr:$dst)]>, TB; // [mem8] = <= signed def SETGr : I<0x9F, MRM0r, (ops R8 :$dst), "setg $dst", - [(set R8:$dst, (X86setcc X86_COND_G, STATUS))]>, + [(set R8:$dst, (X86setcc X86_COND_G))]>, TB; // R8 = > signed def SETGm : I<0x9F, MRM0m, (ops i8mem:$dst), "setg $dst", - [(store (X86setcc X86_COND_G, STATUS), addr:$dst)]>, + [(store (X86setcc X86_COND_G), addr:$dst)]>, TB; // [mem8] = > signed def SETBr : I<0x92, MRM0r, (ops R8 :$dst), "setb $dst", - [(set R8:$dst, (X86setcc X86_COND_B, STATUS))]>, + [(set R8:$dst, (X86setcc X86_COND_B))]>, TB; // R8 = < unsign def SETBm : I<0x92, MRM0m, (ops i8mem:$dst), "setb $dst", - [(store (X86setcc X86_COND_B, STATUS), addr:$dst)]>, + [(store (X86setcc X86_COND_B), addr:$dst)]>, TB; // [mem8] = < unsign def SETAEr : I<0x93, MRM0r, (ops R8 :$dst), "setae $dst", - [(set R8:$dst, (X86setcc X86_COND_AE, STATUS))]>, + [(set R8:$dst, (X86setcc X86_COND_AE))]>, TB; // R8 = >= unsign def SETAEm : I<0x93, MRM0m, (ops i8mem:$dst), "setae $dst", - [(store (X86setcc X86_COND_AE, STATUS), addr:$dst)]>, + [(store (X86setcc X86_COND_AE), addr:$dst)]>, TB; // [mem8] = >= unsign def SETBEr : I<0x96, MRM0r, (ops R8 :$dst), "setbe $dst", - [(set R8:$dst, (X86setcc X86_COND_BE, STATUS))]>, + [(set R8:$dst, (X86setcc X86_COND_BE))]>, TB; // R8 = <= unsign def SETBEm : I<0x96, MRM0m, (ops i8mem:$dst), "setbe $dst", - [(store (X86setcc X86_COND_BE, STATUS), addr:$dst)]>, + [(store (X86setcc X86_COND_BE), addr:$dst)]>, TB; // [mem8] = <= unsign def SETAr : I<0x97, MRM0r, (ops R8 :$dst), "seta $dst", - [(set R8:$dst, (X86setcc X86_COND_A, STATUS))]>, + [(set R8:$dst, (X86setcc X86_COND_A))]>, TB; // R8 = > signed def SETAm : I<0x97, MRM0m, (ops i8mem:$dst), "seta $dst", - [(store (X86setcc X86_COND_A, STATUS), addr:$dst)]>, + [(store (X86setcc X86_COND_A), addr:$dst)]>, TB; // [mem8] = > signed def SETSr : I<0x98, MRM0r, (ops R8 :$dst), "sets $dst", - [(set R8:$dst, (X86setcc X86_COND_S, STATUS))]>, + [(set R8:$dst, (X86setcc X86_COND_S))]>, TB; // R8 = def SETSm : I<0x98, MRM0m, (ops i8mem:$dst), "sets $dst", - [(store (X86setcc X86_COND_S, STATUS), addr:$dst)]>, + [(store (X86setcc X86_COND_S), addr:$dst)]>, TB; // [mem8] = def SETNSr : I<0x99, MRM0r, (ops R8 :$dst), "setns $dst", - [(set R8:$dst, (X86setcc X86_COND_NS, STATUS))]>, + [(set R8:$dst, (X86setcc X86_COND_NS))]>, TB; // R8 = ! def SETNSm : I<0x99, MRM0m, (ops i8mem:$dst), "setns $dst", - [(store (X86setcc X86_COND_NS, STATUS), addr:$dst)]>, + [(store (X86setcc X86_COND_NS), addr:$dst)]>, TB; // [mem8] = ! def SETPr : I<0x9A, MRM0r, (ops R8 :$dst), "setp $dst", - [(set R8:$dst, (X86setcc X86_COND_P, STATUS))]>, + [(set R8:$dst, (X86setcc X86_COND_P))]>, TB; // R8 = parity def SETPm : I<0x9A, MRM0m, (ops i8mem:$dst), "setp $dst", - [(store (X86setcc X86_COND_P, STATUS), addr:$dst)]>, + [(store (X86setcc X86_COND_P), addr:$dst)]>, TB; // [mem8] = parity def SETNPr : I<0x9B, MRM0r, (ops R8 :$dst), "setnp $dst", - [(set R8:$dst, (X86setcc X86_COND_NP, STATUS))]>, + [(set R8:$dst, (X86setcc X86_COND_NP))]>, TB; // R8 = not parity def SETNPm : I<0x9B, MRM0m, (ops i8mem:$dst), "setnp $dst", - [(store (X86setcc X86_COND_NP, STATUS), addr:$dst)]>, + [(store (X86setcc X86_COND_NP), addr:$dst)]>, TB; // [mem8] = not parity // Integer comparisons def CMP8rr : I<0x38, MRMDestReg, (ops R8 :$src1, R8 :$src2), "cmp{b} {$src2, $src1|$src1, $src2}", - [(set STATUS, (X86cmp R8:$src1, R8:$src2))]>, - Imp<[],[STATUS]>; + [(X86cmp R8:$src1, R8:$src2)]>; def CMP16rr : I<0x39, MRMDestReg, (ops R16:$src1, R16:$src2), "cmp{w} {$src2, $src1|$src1, $src2}", - [(set STATUS, (X86cmp R16:$src1, R16:$src2))]>, - Imp<[],[STATUS]>, OpSize; + [(X86cmp R16:$src1, R16:$src2)]>, OpSize; def CMP32rr : I<0x39, MRMDestReg, (ops R32:$src1, R32:$src2), "cmp{l} {$src2, $src1|$src1, $src2}", - [(set STATUS, (X86cmp R32:$src1, R32:$src2))]>, - Imp<[],[STATUS]>; + [(X86cmp R32:$src1, R32:$src2)]>; def CMP8mr : I<0x38, MRMDestMem, (ops i8mem :$src1, R8 :$src2), "cmp{b} {$src2, $src1|$src1, $src2}", - [(set STATUS, (X86cmp (loadi8 addr:$src1), R8:$src2))]>, - Imp<[],[STATUS]>; + [(X86cmp (loadi8 addr:$src1), R8:$src2)]>; def CMP16mr : I<0x39, MRMDestMem, (ops i16mem:$src1, R16:$src2), "cmp{w} {$src2, $src1|$src1, $src2}", - [(set STATUS, (X86cmp (loadi16 addr:$src1), R16:$src2))]>, - Imp<[],[STATUS]>, OpSize; + [(X86cmp (loadi16 addr:$src1), R16:$src2)]>, OpSize; def CMP32mr : I<0x39, MRMDestMem, (ops i32mem:$src1, R32:$src2), "cmp{l} {$src2, $src1|$src1, $src2}", - [(set STATUS, (X86cmp (loadi32 addr:$src1), R32:$src2))]>, - Imp<[],[STATUS]>; + [(X86cmp (loadi32 addr:$src1), R32:$src2)]>; def CMP8rm : I<0x3A, MRMSrcMem, (ops R8 :$src1, i8mem :$src2), "cmp{b} {$src2, $src1|$src1, $src2}", - [(set STATUS, (X86cmp R8:$src1, (loadi8 addr:$src2)))]>, - Imp<[],[STATUS]>; + [(X86cmp R8:$src1, (loadi8 addr:$src2))]>; def CMP16rm : I<0x3B, MRMSrcMem, (ops R16:$src1, i16mem:$src2), "cmp{w} {$src2, $src1|$src1, $src2}", - [(set STATUS, (X86cmp R16:$src1, (loadi16 addr:$src2)))]>, - Imp<[],[STATUS]>, OpSize; + [(X86cmp R16:$src1, (loadi16 addr:$src2))]>, OpSize; def CMP32rm : I<0x3B, MRMSrcMem, (ops R32:$src1, i32mem:$src2), "cmp{l} {$src2, $src1|$src1, $src2}", - [(set STATUS, (X86cmp R32:$src1, (loadi32 addr:$src2)))]>, - Imp<[],[STATUS]>; + [(X86cmp R32:$src1, (loadi32 addr:$src2))]>; def CMP8ri : Ii8<0x80, MRM7r, (ops R8:$src1, i8imm:$src2), "cmp{b} {$src2, $src1|$src1, $src2}", - [(set STATUS, (X86cmp R8:$src1, imm:$src2))]>, - Imp<[],[STATUS]>; + [(X86cmp R8:$src1, imm:$src2)]>; def CMP16ri : Ii16<0x81, MRM7r, (ops R16:$src1, i16imm:$src2), "cmp{w} {$src2, $src1|$src1, $src2}", - [(set STATUS, (X86cmp R16:$src1, imm:$src2))]>, - Imp<[],[STATUS]>, OpSize; + [(X86cmp R16:$src1, imm:$src2)]>, OpSize; def CMP32ri : Ii32<0x81, MRM7r, (ops R32:$src1, i32imm:$src2), "cmp{l} {$src2, $src1|$src1, $src2}", - [(set STATUS, (X86cmp R32:$src1, imm:$src2))]>, - Imp<[],[STATUS]>; + [(X86cmp R32:$src1, imm:$src2)]>; def CMP8mi : Ii8 <0x80, MRM7m, (ops i8mem :$src1, i8imm :$src2), "cmp{b} {$src2, $src1|$src1, $src2}", - [(set STATUS, (X86cmp (loadi8 addr:$src1), imm:$src2))]>, - Imp<[],[STATUS]>; + [(X86cmp (loadi8 addr:$src1), imm:$src2)]>; def CMP16mi : Ii16<0x81, MRM7m, (ops i16mem:$src1, i16imm:$src2), "cmp{w} {$src2, $src1|$src1, $src2}", - [(set STATUS, (X86cmp (loadi16 addr:$src1), imm:$src2))]>, - Imp<[],[STATUS]>, OpSize; + [(X86cmp (loadi16 addr:$src1), imm:$src2)]>, OpSize; def CMP32mi : Ii32<0x81, MRM7m, (ops i32mem:$src1, i32imm:$src2), "cmp{l} {$src2, $src1|$src1, $src2}", - [(set STATUS, (X86cmp (loadi32 addr:$src1), imm:$src2))]>, - Imp<[],[STATUS]>; + [(X86cmp (loadi32 addr:$src1), imm:$src2)]>; // Sign/Zero extenders def MOVSX16rr8 : I<0xBE, MRMSrcReg, (ops R16:$dst, R8 :$src), @@ -2482,20 +2453,20 @@ def UCOMISDrr: I<0x2E, MRMSrcReg, (ops FR64:$src1, FR64:$src2), "ucomisd {$src2, $src1|$src1, $src2}", - [(set STATUS, (X86cmp FR64:$src1, FR64:$src2))]>, + [(X86cmp FR64:$src1, FR64:$src2)]>, Requires<[HasSSE2]>, TB, OpSize; def UCOMISDrm: I<0x2E, MRMSrcMem, (ops FR64:$src1, f64mem:$src2), "ucomisd {$src2, $src1|$src1, $src2}", - [(set STATUS, (X86cmp FR64:$src1, (loadf64 addr:$src2)))]>, - Imp<[],[STATUS]>, Requires<[HasSSE2]>, TB, OpSize; + [(X86cmp FR64:$src1, (loadf64 addr:$src2))]>, + Requires<[HasSSE2]>, TB, OpSize; def UCOMISSrr: I<0x2E, MRMSrcReg, (ops FR32:$src1, FR32:$src2), "ucomiss {$src2, $src1|$src1, $src2}", - [(set STATUS, (X86cmp FR32:$src1, FR32:$src2))]>, - Imp<[],[STATUS]>, Requires<[HasSSE1]>, TB; + [(X86cmp FR32:$src1, FR32:$src2)]>, + Requires<[HasSSE1]>, TB; def UCOMISSrm: I<0x2E, MRMSrcMem, (ops FR32:$src1, f32mem:$src2), "ucomiss {$src2, $src1|$src1, $src2}", - [(set STATUS, (X86cmp FR32:$src1, (loadf32 addr:$src2)))]>, - Imp<[],[STATUS]>, Requires<[HasSSE1]>, TB; + [(X86cmp FR32:$src1, (loadf32 addr:$src2))]>, + Requires<[HasSSE1]>, TB; // Pseudo-instructions that map fld0 to xorps/xorpd for sse. // FIXME: remove when we can teach regalloc that xor reg, reg is ok. @@ -2852,28 +2823,28 @@ let isTwoAddress = 1 in { def FpCMOVB : FpI<(ops RFP:$dst, RFP:$src1, RFP:$src2), CondMovFP, [(set RFP:$dst, (X86cmov RFP:$src1, RFP:$src2, - X86_COND_B, STATUS))]>; + X86_COND_B))]>; def FpCMOVBE : FpI<(ops RFP:$dst, RFP:$src1, RFP:$src2), CondMovFP, [(set RFP:$dst, (X86cmov RFP:$src1, RFP:$src2, - X86_COND_BE, STATUS))]>; + X86_COND_BE))]>; def FpCMOVE : FpI<(ops RFP:$dst, RFP:$src1, RFP:$src2), CondMovFP, [(set RFP:$dst, (X86cmov RFP:$src1, RFP:$src2, - X86_COND_E, STATUS))]>; + X86_COND_E))]>; def FpCMOVP : FpI<(ops RFP:$dst, RFP:$src1, RFP:$src2), CondMovFP, [(set RFP:$dst, (X86cmov RFP:$src1, RFP:$src2, - X86_COND_P, STATUS))]>; + X86_COND_P))]>; def FpCMOVNB : FpI<(ops RFP:$dst, RFP:$src1, RFP:$src2), CondMovFP, [(set RFP:$dst, (X86cmov RFP:$src1, RFP:$src2, - X86_COND_AE, STATUS))]>; + X86_COND_AE))]>; def FpCMOVNBE: FpI<(ops RFP:$dst, RFP:$src1, RFP:$src2), CondMovFP, [(set RFP:$dst, (X86cmov RFP:$src1, RFP:$src2, - X86_COND_A, STATUS))]>; + X86_COND_A))]>; def FpCMOVNE : FpI<(ops RFP:$dst, RFP:$src1, RFP:$src2), CondMovFP, [(set RFP:$dst, (X86cmov RFP:$src1, RFP:$src2, - X86_COND_NE, STATUS))]>; + X86_COND_NE))]>; def FpCMOVNP : FpI<(ops RFP:$dst, RFP:$src1, RFP:$src2), CondMovFP, [(set RFP:$dst, (X86cmov RFP:$src1, RFP:$src2, - X86_COND_NP, STATUS))]>; + X86_COND_NP))]>; } def FCMOVB : FPI<0xC0, AddRegFrm, (ops RST:$op), @@ -2951,8 +2922,7 @@ def FpUCOMr : FpI<(ops RFP:$lhs, RFP:$rhs), CompareFP, []>; // FPSW = cmp ST(0) with ST(i) def FpUCOMIr : FpI<(ops RFP:$lhs, RFP:$rhs), CompareFP, - [(set STATUS, (X86cmp RFP:$lhs, RFP:$rhs))]>, - Imp<[],[STATUS]>; // CC = cmp ST(0) with ST(i) + [(X86cmp RFP:$lhs, RFP:$rhs)]>; // CC = cmp ST(0) with ST(i) def FUCOMr : FPI<0xE0, AddRegFrm, // FPSW = cmp ST(0) with ST(i) (ops RST:$reg), Index: llvm/lib/Target/X86/X86RegisterInfo.td diff -u llvm/lib/Target/X86/X86RegisterInfo.td:1.27 llvm/lib/Target/X86/X86RegisterInfo.td:1.28 --- llvm/lib/Target/X86/X86RegisterInfo.td:1.27 Wed Dec 21 20:25:42 2005 +++ llvm/lib/Target/X86/X86RegisterInfo.td Wed Jan 25 18:29:36 2006 @@ -58,9 +58,6 @@ def ST2 : Register<"ST(2)">; def ST3 : Register<"ST(3)">; def ST4 : Register<"ST(4)">; def ST5 : Register<"ST(5)">; def ST6 : Register<"ST(6)">; def ST7 : Register<"ST(7)">; - - // Flags, Segment registers, etc... - def STATUS : Register<"STATUS">; } //===----------------------------------------------------------------------===// @@ -141,7 +138,3 @@ } }]; } - -def FLAGS_REGS : RegisterClass<"X86", [FlagVT], 32, [STATUS]> { - let Size = 32; -} From evan.cheng at apple.com Wed Jan 25 18:30:41 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 25 Jan 2006 18:30:41 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp Message-ID: <200601260030.SAA08966@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/SelectionDAG: ScheduleDAGList.cpp updated: 1.4 -> 1.5 --- Log message: Clean up some code; improve efficiency; and fixed a potential bug involving chain successors. --- Diffs of the changes: (+126 -149) ScheduleDAGList.cpp | 275 +++++++++++++++++++++++----------------------------- 1 files changed, 126 insertions(+), 149 deletions(-) Index: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp diff -u llvm/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp:1.4 llvm/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp:1.5 --- llvm/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp:1.4 Wed Jan 25 15:49:13 2006 +++ llvm/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp Wed Jan 25 18:30:29 2006 @@ -32,10 +32,10 @@ struct SUnit { SDNode *Node; // Representative node. std::vector FlaggedNodes; // All nodes flagged to Node. - std::vector Preds; // All real predecessors. - std::vector ChainPreds; // All chain predecessors. - std::vector Succs; // All real successors. - std::vector ChainSuccs; // All chain successors. + std::vector Preds; // All real predecessors. + std::vector ChainPreds; // All chain predecessors. + std::vector Succs; // All real successors. + std::vector ChainSuccs; // All chain successors. int NumPredsLeft; // # of preds not scheduled. int NumSuccsLeft; // # of succs not scheduled. int Priority1; // Scheduling priority 1. @@ -43,67 +43,60 @@ unsigned Latency; // Node latency. unsigned CycleBound; // Upper/lower cycle to be scheduled at. unsigned Slot; // Cycle node is scheduled at. + SUnit *Next; SUnit(SDNode *node) : Node(node), NumPredsLeft(0), NumSuccsLeft(0), Priority1(INT_MIN), Priority2(INT_MIN), Latency(0), - CycleBound(0), Slot(0) {} + CycleBound(0), Slot(0), Next(NULL) {} void dump(const SelectionDAG *G, bool All=true) const; }; void SUnit::dump(const SelectionDAG *G, bool All) const { - std::cerr << "SU: "; + std::cerr << "SU: "; Node->dump(G); std::cerr << "\n"; - if (All) { - std::cerr << "# preds left : " << NumPredsLeft << "\n"; - std::cerr << "# succs left : " << NumSuccsLeft << "\n"; - std::cerr << "Latency : " << Latency << "\n"; - std::cerr << "Priority : " << Priority1 << " , " << Priority2 << "\n"; - } - if (FlaggedNodes.size() != 0) { - if (All) - std::cerr << "Flagged nodes :\n"; for (unsigned i = 0, e = FlaggedNodes.size(); i != e; i++) { - std::cerr << " "; + std::cerr << " "; FlaggedNodes[i]->dump(G); std::cerr << "\n"; } } if (All) { + std::cerr << "# preds left : " << NumPredsLeft << "\n"; + std::cerr << "# succs left : " << NumSuccsLeft << "\n"; + std::cerr << "Latency : " << Latency << "\n"; + std::cerr << "Priority : " << Priority1 << " , " << Priority2 << "\n"; + if (Preds.size() != 0) { std::cerr << "Predecessors :\n"; for (unsigned i = 0, e = Preds.size(); i != e; i++) { std::cerr << " "; - Preds[i]->dump(G); - std::cerr << "\n"; + Preds[i]->dump(G, false); } } if (ChainPreds.size() != 0) { std::cerr << "Chained Preds :\n"; for (unsigned i = 0, e = ChainPreds.size(); i != e; i++) { std::cerr << " "; - ChainPreds[i]->dump(G); - std::cerr << "\n"; + ChainPreds[i]->dump(G, false); } } if (Succs.size() != 0) { std::cerr << "Successors :\n"; for (unsigned i = 0, e = Succs.size(); i != e; i++) { std::cerr << " "; - Succs[i]->dump(G); - std::cerr << "\n"; + Succs[i]->dump(G, false); } } if (ChainSuccs.size() != 0) { std::cerr << "Chained succs :\n"; for (unsigned i = 0, e = ChainSuccs.size(); i != e; i++) { std::cerr << " "; - ChainSuccs[i]->dump(G); - std::cerr << "\n"; + ChainSuccs[i]->dump(G, false); } } } @@ -146,21 +139,21 @@ std::vector Sequence; // Current scheduling cycle. unsigned CurrCycle; + // First and last SUnit created. + SUnit *HeadSUnit, *TailSUnit; public: ScheduleDAGList(SelectionDAG &dag, MachineBasicBlock *bb, const TargetMachine &tm) - : ScheduleDAG(listSchedulingBURR, dag, bb, tm), CurrCycle(0) {}; + : ScheduleDAG(listSchedulingBURR, dag, bb, tm), + CurrCycle(0), HeadSUnit(NULL), TailSUnit(NULL) {}; ~ScheduleDAGList() { - for (std::map::iterator I = SUnitMap.begin(), - E = SUnitMap.end(); I != E; ++I) { - SUnit *SU = I->second; - // Multiple SDNode* can point to one SUnit. Do ref counting, sort of. - if (SU->FlaggedNodes.size() == 0) - delete SU; - else - SU->FlaggedNodes.pop_back(); + SUnit *SU = HeadSUnit; + while (SU) { + SUnit *NextSU = SU->Next; + delete SU; + SU = NextSU; } } @@ -169,6 +162,7 @@ void dump() const; private: + SUnit *NewSUnit(SDNode *N); void ReleasePred(SUnit *PredSU); void ScheduleNode(SUnit *SU); int CalcNodePriority(SUnit *SU); @@ -179,6 +173,22 @@ }; } // end namespace + +/// NewSUnit - Creates a new SUnit and return a ptr to it. +SUnit *ScheduleDAGList::NewSUnit(SDNode *N) { + SUnit *CurrSUnit = new SUnit(N); + + if (HeadSUnit == NULL) + HeadSUnit = CurrSUnit; + if (TailSUnit != NULL) + TailSUnit->Next = CurrSUnit; + TailSUnit = CurrSUnit; + + return CurrSUnit; +} + +/// ReleasePred - Decrement the NumSuccsLeft count of a predecessor. Add it to +/// the Available queue is the count reaches zero. Also update its cycle bound. void ScheduleDAGList::ReleasePred(SUnit *PredSU) { SDNode *PredNode = PredSU->Node; @@ -212,9 +222,9 @@ // Bottom up: release predecessors for (unsigned i = 0, e = SU->Preds.size(); i != e; i++) - ReleasePred(SUnitMap[SU->Preds[i]]); + ReleasePred(SU->Preds[i]); for (unsigned i = 0, e = SU->ChainPreds.size(); i != e; i++) - ReleasePred(SUnitMap[SU->ChainPreds[i]]); + ReleasePred(SU->ChainPreds[i]); CurrCycle++; } @@ -261,16 +271,17 @@ } #ifndef NDEBUG - for (std::map::iterator I = SUnitMap.begin(), - E = SUnitMap.end(); I != E; ++I) { - SUnit *SU = I->second; + bool AnyNotSched = false; + for (SUnit *SU = HeadSUnit; SU != NULL; SU = SU->Next) { if (SU->NumSuccsLeft != 0) { - std::cerr << "*** List scheduling failed! ***\n"; + if (!AnyNotSched) + std::cerr << "*** List scheduling failed! ***\n"; SU->dump(&DAG); - std::cerr << " has not been scheduled!\n"; - assert(0); + std::cerr << "has not been scheduled!\n"; + AnyNotSched = true; } } + assert(!AnyNotSched); #endif @@ -279,6 +290,7 @@ DEBUG(std::cerr << "*** Final schedule ***\n"); DEBUG(dump()); + DEBUG(std::cerr << "\n"); } /// CalcNodePriority - Priority 1 is just the number of live range genned - number @@ -296,8 +308,7 @@ } else { int Extra = 0; for (unsigned i = 0, e = SU->Preds.size(); i != e; i++) { - SDNode *PredN = SU->Preds[i]; - SUnit *PredSU = SUnitMap[PredN]; + SUnit *PredSU = SU->Preds[i]; int PredPriority = CalcNodePriority(PredSU); if (PredPriority > SU->Priority2) { SU->Priority2 = PredPriority; @@ -317,132 +328,98 @@ /// CalculatePriorities - Calculate priorities of all scheduling units. void ScheduleDAGList::CalculatePriorities() { - for (std::map::iterator I = SUnitMap.begin(), - E = SUnitMap.end(); I != E; ++I) { - SUnit *SU = I->second; + for (SUnit *SU = HeadSUnit; SU != NULL; SU = SU->Next) { // FIXME: assumes uniform latency for now. SU->Latency = 1; (void)CalcNodePriority(SU); - DEBUG(I->second->dump(&DAG)); + DEBUG(SU->dump(&DAG)); DEBUG(std::cerr << "\n"); } } -static bool isChainUse(SDNode *N, SDNode *UseN) { - for (unsigned i = 0, e = UseN->getNumOperands(); i != e; i++) { - SDOperand Op = UseN->getOperand(i); - if (Op.Val == N) { - MVT::ValueType VT = N->getValueType(Op.ResNo); - if (VT == MVT::Other) - return true; - } - } - return false; -} - void ScheduleDAGList::BuildSchedUnits() { + // Pass 1: create the SUnit's. for (unsigned i = 0, NC = NodeCount; i < NC; i++) { NodeInfo *NI = &Info[i]; SDNode *N = NI->Node; - if (!isPassiveNode(N)) { - SUnit *SU; - if (NI->isInGroup()) { - if (NI != NI->Group->getBottom()) // Bottom up, so only look at bottom - continue; // node of the NodeGroup - - SU = new SUnit(N); - - // Find the flagged nodes. - SDOperand FlagOp = N->getOperand(N->getNumOperands() - 1); - SDNode *Flag = FlagOp.Val; - unsigned ResNo = FlagOp.ResNo; - while (Flag->getValueType(ResNo) == MVT::Flag) { - NodeInfo *FNI = getNI(Flag); - assert(FNI->Group == NI->Group); - SU->FlaggedNodes.insert(SU->FlaggedNodes.begin(), Flag); - SUnitMap[Flag] = SU; - - FlagOp = Flag->getOperand(Flag->getNumOperands() - 1); - Flag = FlagOp.Val; - ResNo = FlagOp.ResNo; - } + if (isPassiveNode(N)) + continue; - // Find all predecessors (of the group). - NodeGroupOpIterator NGOI(NI); - while (!NGOI.isEnd()) { - SDOperand Op = NGOI.next(); - SDNode *OpN = Op.Val; - MVT::ValueType VT = OpN->getValueType(Op.ResNo); - NodeInfo *OpNI = getNI(OpN); - if (OpNI->Group != NI->Group && !isPassiveNode(OpN)) { - assert(VT != MVT::Flag); - if (VT == MVT::Other) - SU->ChainPreds.push_back(OpN); - else - SU->Preds.push_back(OpN); - SU->NumPredsLeft++; - } - } + SUnit *SU; + if (NI->isInGroup()) { + if (NI != NI->Group->getBottom()) // Bottom up, so only look at bottom + continue; // node of the NodeGroup + + SU = NewSUnit(N); + // Find the flagged nodes. + SDOperand FlagOp = N->getOperand(N->getNumOperands() - 1); + SDNode *Flag = FlagOp.Val; + unsigned ResNo = FlagOp.ResNo; + while (Flag->getValueType(ResNo) == MVT::Flag) { + NodeInfo *FNI = getNI(Flag); + assert(FNI->Group == NI->Group); + SU->FlaggedNodes.insert(SU->FlaggedNodes.begin(), Flag); + SUnitMap[Flag] = SU; + + FlagOp = Flag->getOperand(Flag->getNumOperands() - 1); + Flag = FlagOp.Val; + ResNo = FlagOp.ResNo; + } + } else { + SU = NewSUnit(N); + } + SUnitMap[N] = SU; + } - // Find all successors (of the group). - NodeGroupIterator NGI(NI); - while (NodeInfo *GNI = NGI.next()) { - SDNode *GN = GNI->Node; - for (SDNode::use_iterator ui = GN->use_begin(), e = GN->use_end(); - ui != e; ++ui) { - SDNode *UseN = *ui; - NodeInfo *UseNI = getNI(UseN); - if (UseNI->Group != NI->Group) { - if (isChainUse(GN, UseN)) - SU->ChainSuccs.push_back(UseN); - else - SU->Succs.push_back(UseN); - SU->NumSuccsLeft++; - } + // Pass 2: add the preds, succs, etc. + for (SUnit *SU = HeadSUnit; SU != NULL; SU = SU->Next) { + SDNode *N = SU->Node; + NodeInfo *NI = getNI(N); + + if (NI->isInGroup()) { + // Find all predecessors (of the group). + NodeGroupOpIterator NGOI(NI); + while (!NGOI.isEnd()) { + SDOperand Op = NGOI.next(); + SDNode *OpN = Op.Val; + MVT::ValueType VT = OpN->getValueType(Op.ResNo); + NodeInfo *OpNI = getNI(OpN); + if (OpNI->Group != NI->Group && !isPassiveNode(OpN)) { + assert(VT != MVT::Flag); + SUnit *OpSU = SUnitMap[OpN]; + if (VT == MVT::Other) { + SU ->ChainPreds.push_back(OpSU); + OpSU->ChainSuccs.push_back(SU); + } else { + SU ->Preds.push_back(OpSU); + OpSU->Succs.push_back(SU); } + SU->NumPredsLeft++; + OpSU->NumSuccsLeft++; } - } else { - SU = new SUnit(N); - - // Find node predecessors. - for (unsigned j = 0, e = N->getNumOperands(); j != e; j++) { - SDOperand Op = N->getOperand(j); - SDNode *OpN = Op.Val; - MVT::ValueType VT = OpN->getValueType(Op.ResNo); - if (!isPassiveNode(OpN)) { - assert(VT != MVT::Flag); - if (VT == MVT::Other) - SU->ChainPreds.push_back(OpN); - else - SU->Preds.push_back(OpN); - SU->NumPredsLeft++; + } + } else { + // Find node predecessors. + for (unsigned j = 0, e = N->getNumOperands(); j != e; j++) { + SDOperand Op = N->getOperand(j); + SDNode *OpN = Op.Val; + MVT::ValueType VT = OpN->getValueType(Op.ResNo); + if (!isPassiveNode(OpN)) { + assert(VT != MVT::Flag); + SUnit *OpSU = SUnitMap[OpN]; + if (VT == MVT::Other) { + SU ->ChainPreds.push_back(OpSU); + OpSU->ChainSuccs.push_back(SU); + } else { + SU ->Preds.push_back(OpSU); + OpSU->Succs.push_back(SU); } - } - - // Find node successors. - for (SDNode::use_iterator ui = N->use_begin(), e = N->use_end(); - ui != e; ++ui) { - SDNode *UseN = *ui; - if (isChainUse(N, UseN)) - SU->ChainSuccs.push_back(UseN); - else - SU->Succs.push_back(UseN); - SU->NumSuccsLeft++; + SU->NumPredsLeft++; + OpSU->NumSuccsLeft++; } } - - SUnitMap[N] = SU; } } - -#ifndef NDEBUG - for (std::map::iterator I = SUnitMap.begin(), - E = SUnitMap.end(); I != E; ++I) { - SUnit *SU = I->second; - DEBUG(I->second->dump(&DAG)); - DEBUG(std::cerr << "\n"); - } -#endif } /// EmitSchedule - Emit the machine code in scheduled order. From lattner at cs.uiuc.edu Wed Jan 25 18:48:44 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Wed, 25 Jan 2006 18:48:44 -0600 Subject: [llvm-commits] CVS: llvm/lib/VMCore/InlineAsm.cpp Message-ID: <200601260048.SAA09133@zion.cs.uiuc.edu> Changes in directory llvm/lib/VMCore: InlineAsm.cpp updated: 1.3 -> 1.4 --- Log message: parse and verify the constraint string. --- Diffs of the changes: (+68 -0) InlineAsm.cpp | 68 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 68 insertions(+) Index: llvm/lib/VMCore/InlineAsm.cpp diff -u llvm/lib/VMCore/InlineAsm.cpp:1.3 llvm/lib/VMCore/InlineAsm.cpp:1.4 --- llvm/lib/VMCore/InlineAsm.cpp:1.3 Wed Jan 25 16:26:05 2006 +++ llvm/lib/VMCore/InlineAsm.cpp Wed Jan 25 18:48:33 2006 @@ -13,6 +13,7 @@ #include "llvm/InlineAsm.h" #include "llvm/DerivedTypes.h" +#include using namespace llvm; // NOTE: when memoizing the function type, we have to be careful to handle the @@ -37,6 +38,73 @@ return cast(getType()->getElementType()); } +/// Verify - Verify that the specified constraint string is reasonable for the +/// specified function type, and otherwise validate the constraint string. bool InlineAsm::Verify(const FunctionType *Ty, const std::string &Constraints) { + if (Ty->isVarArg()) return false; + + unsigned NumOutputs = 0, NumInputs = 0, NumClobbers = 0; + + // Scan the constraints string. + for (std::string::const_iterator I = Constraints.begin(), + E = Constraints.end(); I != E; ) { + if (*I == ',') return false; // Empty constraint like ",," + + // Parse the prefix. + enum { + isInput, // 'x' + isOutput, // '=x' + isIndirectOutput, // '==x' + isClobber, // '~x' + } ConstraintType = isInput; + + if (*I == '~') { + ConstraintType = isClobber; + ++I; + } else if (*I == '=') { + ++I; + if (I != E && *I == '=') { + ConstraintType = isIndirectOutput; + ++I; + } else { + ConstraintType = isOutput; + } + } + + if (I == E) return false; // Just a prefix, like "==" or "~". + + switch (ConstraintType) { + case isOutput: + if (NumInputs || NumClobbers) return false; // outputs come first. + ++NumOutputs; + break; + case isInput: + case isIndirectOutput: + if (NumClobbers) return false; // inputs before clobbers. + ++NumInputs; + break; + case isClobber: + ++NumClobbers; + break; + } + + // Parse the id. We accept [a-zA-Z0-9] currently. + while (I != E && isalnum(*I)) ++I; + + // If we reached the end of the ID, we must have the end of the string or a + // comma, which we skip now. + if (I != E) { + if (*I != ',') return false; + ++I; + if (I == E) return false; // don't allow "xyz," + } + } + + if (NumOutputs > 1) return false; // Only one result allowed. + + if ((Ty->getReturnType() != Type::VoidTy) != NumOutputs) + return false; // NumOutputs = 1 iff has a result type. + + if (Ty->getNumParams() != NumInputs) return false; return true; } From lattner at cs.uiuc.edu Wed Jan 25 19:54:33 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Wed, 25 Jan 2006 19:54:33 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/Value.h Message-ID: <200601260154.TAA09449@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm: Value.h updated: 1.82 -> 1.83 --- Log message: Allow use of isa(X) without #including InlineAsm.h --- Diffs of the changes: (+4 -0) Value.h | 4 ++++ 1 files changed, 4 insertions(+) Index: llvm/include/llvm/Value.h diff -u llvm/include/llvm/Value.h:1.82 llvm/include/llvm/Value.h:1.83 --- llvm/include/llvm/Value.h:1.82 Mon Jan 23 22:12:40 2006 +++ llvm/include/llvm/Value.h Wed Jan 25 19:54:21 2006 @@ -31,6 +31,7 @@ class GlobalValue; class Function; class GlobalVariable; +class InlineAsm; class SymbolTable; //===----------------------------------------------------------------------===// @@ -213,6 +214,9 @@ template <> inline bool isa_impl(const Value &Val) { return Val.getValueType() == Value::ArgumentVal; } +template <> inline bool isa_impl(const Value &Val) { + return Val.getValueType() == Value::InlineAsmVal; +} template <> inline bool isa_impl(const Value &Val) { return Val.getValueType() >= Value::InstructionVal; } From lattner at cs.uiuc.edu Wed Jan 25 19:55:33 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Wed, 25 Jan 2006 19:55:33 -0600 Subject: [llvm-commits] CVS: llvm/lib/Transforms/Utils/ValueMapper.cpp Message-ID: <200601260155.TAA09498@zion.cs.uiuc.edu> Changes in directory llvm/lib/Transforms/Utils: ValueMapper.cpp updated: 1.20 -> 1.21 --- Log message: teach the cloner to handle inline asms --- Diffs of the changes: (+1 -9) ValueMapper.cpp | 10 +--------- 1 files changed, 1 insertion(+), 9 deletions(-) Index: llvm/lib/Transforms/Utils/ValueMapper.cpp diff -u llvm/lib/Transforms/Utils/ValueMapper.cpp:1.20 llvm/lib/Transforms/Utils/ValueMapper.cpp:1.21 --- llvm/lib/Transforms/Utils/ValueMapper.cpp:1.20 Thu Apr 21 18:45:34 2005 +++ llvm/lib/Transforms/Utils/ValueMapper.cpp Wed Jan 25 19:55:22 2006 @@ -16,8 +16,6 @@ #include "llvm/Constants.h" #include "llvm/GlobalValue.h" #include "llvm/Instruction.h" -#include - using namespace llvm; Value *llvm::MapValue(const Value *V, std::map &VM) { @@ -32,7 +30,7 @@ if (Constant *C = const_cast(dyn_cast(V))) { if (isa(C) || isa(C) || isa(C) || isa(C) || - isa(C)) + isa(C) || isa(V)) return VMSlot = C; // Primitive constants map directly else if (ConstantArray *CA = dyn_cast(C)) { for (unsigned i = 0, e = CA->getNumOperands(); i != e; ++i) { @@ -112,12 +110,6 @@ for (unsigned op = 0, E = I->getNumOperands(); op != E; ++op) { const Value *Op = I->getOperand(op); Value *V = MapValue(Op, ValueMap); -#ifndef NDEBUG - if (!V) { - std::cerr << "Val = \n" << *Op << "Addr = " << (void*)Op; - std::cerr << "\nInst = " << *I; - } -#endif assert(V && "Referenced value not in value map!"); I->setOperand(op, V); } From evan.cheng at apple.com Wed Jan 25 20:13:22 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 25 Jan 2006 20:13:22 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp Message-ID: <200601260213.UAA09647@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: X86ISelLowering.cpp updated: 1.57 -> 1.58 --- Log message: When trying to fold X86::SETCC into a Select, make a copy if it has more than one use. This allows more CMOV instructions. --- Diffs of the changes: (+22 -6) X86ISelLowering.cpp | 28 ++++++++++++++++++++++------ 1 files changed, 22 insertions(+), 6 deletions(-) Index: llvm/lib/Target/X86/X86ISelLowering.cpp diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.57 llvm/lib/Target/X86/X86ISelLowering.cpp:1.58 --- llvm/lib/Target/X86/X86ISelLowering.cpp:1.57 Wed Jan 25 12:21:52 2006 +++ llvm/lib/Target/X86/X86ISelLowering.cpp Wed Jan 25 20:13:10 2006 @@ -1669,9 +1669,17 @@ // If the X86ISD::SETCC has more than one use, then it's probably better // to use a test instead of duplicating the X86ISD::CMP (for register // pressure reason). - // FIXME: Check number of live Op0 uses since we are in the middle of - // legalization process. - if (Op0.hasOneUse() && Op0.getOperand(1).getOpcode() == X86ISD::CMP) { + if (Op0.getOperand(1).getOpcode() == X86ISD::CMP) { + if (!Op0.hasOneUse()) { + std::vector Tys; + for (unsigned i = 0; i < Op0.Val->getNumValues(); ++i) + Tys.push_back(Op0.Val->getValueType(i)); + std::vector Ops; + for (unsigned i = 0; i < Op0.getNumOperands(); ++i) + Ops.push_back(Op0.getOperand(i)); + Op0 = DAG.getNode(X86ISD::SETCC, Tys, Ops); + } + CC = Op0.getOperand(0); Cond = Op0.getOperand(1); // Make a copy as flag result cannot be used by more than one. @@ -1720,9 +1728,17 @@ // If the X86ISD::SETCC has more than one use, then it's probably better // to use a test instead of duplicating the X86ISD::CMP (for register // pressure reason). - // FIXME: Check number of live Cond uses since we are in the middle of - // legalization process. - if (Cond.hasOneUse() && Cond.getOperand(1).getOpcode() == X86ISD::CMP) { + if (Cond.getOperand(1).getOpcode() == X86ISD::CMP) { + if (!Cond.hasOneUse()) { + std::vector Tys; + for (unsigned i = 0; i < Cond.Val->getNumValues(); ++i) + Tys.push_back(Cond.Val->getValueType(i)); + std::vector Ops; + for (unsigned i = 0; i < Cond.getNumOperands(); ++i) + Ops.push_back(Cond.getOperand(i)); + Cond = DAG.getNode(X86ISD::SETCC, Tys, Ops); + } + CC = Cond.getOperand(0); Cond = Cond.getOperand(1); // Make a copy as flag result cannot be used by more than one. From evan.cheng at apple.com Wed Jan 25 20:13:42 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 25 Jan 2006 20:13:42 -0600 Subject: [llvm-commits] CVS: llvm/utils/TableGen/DAGISelEmitter.cpp Message-ID: <200601260213.UAA09659@zion.cs.uiuc.edu> Changes in directory llvm/utils/TableGen: DAGISelEmitter.cpp updated: 1.142 -> 1.143 --- Log message: Add a FIXME comment. --- Diffs of the changes: (+1 -0) DAGISelEmitter.cpp | 1 + 1 files changed, 1 insertion(+) Index: llvm/utils/TableGen/DAGISelEmitter.cpp diff -u llvm/utils/TableGen/DAGISelEmitter.cpp:1.142 llvm/utils/TableGen/DAGISelEmitter.cpp:1.143 --- llvm/utils/TableGen/DAGISelEmitter.cpp:1.142 Wed Jan 25 18:22:25 2006 +++ llvm/utils/TableGen/DAGISelEmitter.cpp Wed Jan 25 20:13:31 2006 @@ -1932,6 +1932,7 @@ // Don't fold any node which reads or writes a flag and has multiple uses. // FIXME: we really need to separate the concepts of flag and "glue". Those // real flag results, e.g. X86CMP output, can have multiple uses. + // FIXME: If the incoming flag is optional. Then it is ok to fold it. if (!EmittedCheck && (PatternHasProperty(N, SDNodeInfo::SDNPInFlag, ISE) || PatternHasProperty(N, SDNodeInfo::SDNPOptInFlag, ISE) || From lattner at cs.uiuc.edu Wed Jan 25 20:21:54 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Wed, 25 Jan 2006 20:21:54 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/InlineAsm.h Message-ID: <200601260221.UAA09792@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm: InlineAsm.h updated: 1.5 -> 1.6 --- Log message: add methods for constraint parsing --- Diffs of the changes: (+19 -0) InlineAsm.h | 19 +++++++++++++++++++ 1 files changed, 19 insertions(+) Index: llvm/include/llvm/InlineAsm.h diff -u llvm/include/llvm/InlineAsm.h:1.5 llvm/include/llvm/InlineAsm.h:1.6 --- llvm/include/llvm/InlineAsm.h:1.5 Wed Jan 25 16:10:35 2006 +++ llvm/include/llvm/InlineAsm.h Wed Jan 25 20:21:42 2006 @@ -17,6 +17,7 @@ #define LLVM_INLINEASM_H #include "llvm/Value.h" +#include namespace llvm { @@ -65,6 +66,24 @@ /// static bool Verify(const FunctionType *Ty, const std::string &Constraints); + // Constraint String Parsing + enum ConstraintPrefix { + isInput, // 'x' + isOutput, // '=x' + isIndirectOutput, // '==x' + isClobber, // '~x' + }; + + /// ParseConstraints - Split up the constraint string into the specific + /// constraints and their prefixes. If this returns an empty vector, and if + /// the constraint string itself isn't empty, there was an error parsing. + static std::vector > + ParseConstraints(const std::string &ConstraintString); + + std::vector > + ParseConstraints() const { + return ParseConstraints(Constraints); + } // Methods for support type inquiry through isa, cast, and dyn_cast: static inline bool classof(const InlineAsm *) { return true; } From lattner at cs.uiuc.edu Wed Jan 25 20:22:11 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Wed, 25 Jan 2006 20:22:11 -0600 Subject: [llvm-commits] CVS: llvm/lib/VMCore/InlineAsm.cpp Message-ID: <200601260222.UAA09802@zion.cs.uiuc.edu> Changes in directory llvm/lib/VMCore: InlineAsm.cpp updated: 1.4 -> 1.5 --- Log message: add method for constraint parsing --- Diffs of the changes: (+50 -29) InlineAsm.cpp | 79 ++++++++++++++++++++++++++++++++++++---------------------- 1 files changed, 50 insertions(+), 29 deletions(-) Index: llvm/lib/VMCore/InlineAsm.cpp diff -u llvm/lib/VMCore/InlineAsm.cpp:1.4 llvm/lib/VMCore/InlineAsm.cpp:1.5 --- llvm/lib/VMCore/InlineAsm.cpp:1.4 Wed Jan 25 18:48:33 2006 +++ llvm/lib/VMCore/InlineAsm.cpp Wed Jan 25 20:21:59 2006 @@ -38,25 +38,17 @@ return cast(getType()->getElementType()); } -/// Verify - Verify that the specified constraint string is reasonable for the -/// specified function type, and otherwise validate the constraint string. -bool InlineAsm::Verify(const FunctionType *Ty, const std::string &Constraints) { - if (Ty->isVarArg()) return false; - - unsigned NumOutputs = 0, NumInputs = 0, NumClobbers = 0; +std::vector > +InlineAsm::ParseConstraints(const std::string &Constraints) { + std::vector > Result; // Scan the constraints string. for (std::string::const_iterator I = Constraints.begin(), - E = Constraints.end(); I != E; ) { - if (*I == ',') return false; // Empty constraint like ",," + E = Constraints.end(); I != E; ) { + if (*I == ',') { Result.clear(); break; } // Empty constraint like ",," // Parse the prefix. - enum { - isInput, // 'x' - isOutput, // '=x' - isIndirectOutput, // '==x' - isClobber, // '~x' - } ConstraintType = isInput; + ConstraintPrefix ConstraintType = isInput; if (*I == '~') { ConstraintType = isClobber; @@ -71,9 +63,49 @@ } } - if (I == E) return false; // Just a prefix, like "==" or "~". + if (I == E) { Result.clear(); break; } // Just a prefix, like "==" or "~". + + std::string::const_iterator IdStart = I; + + // Parse the id. We accept [a-zA-Z0-9] currently. + while (I != E && isalnum(*I)) ++I; + + if (IdStart == I) { // Requires more than just a prefix + Result.clear(); + break; + } + + // Remember this constraint. + Result.push_back(std::make_pair(ConstraintType, std::string(IdStart, I))); - switch (ConstraintType) { + // If we reached the end of the ID, we must have the end of the string or a + // comma, which we skip now. + if (I != E) { + if (*I != ',') { Result.clear(); break; } + ++I; + if (I == E) { Result.clear(); break; } // don't allow "xyz," + } + } + + return Result; +} + + +/// Verify - Verify that the specified constraint string is reasonable for the +/// specified function type, and otherwise validate the constraint string. +bool InlineAsm::Verify(const FunctionType *Ty, const std::string &ConstStr) { + if (Ty->isVarArg()) return false; + + std::vector > + Constraints = ParseConstraints(ConstStr); + + // Error parsing constraints. + if (Constraints.empty() && !ConstStr.empty()) return false; + + unsigned NumOutputs = 0, NumInputs = 0, NumClobbers = 0; + + for (unsigned i = 0, e = Constraints.size(); i != e; ++i) { + switch (Constraints[i].first) { case isOutput: if (NumInputs || NumClobbers) return false; // outputs come first. ++NumOutputs; @@ -87,20 +119,9 @@ ++NumClobbers; break; } - - // Parse the id. We accept [a-zA-Z0-9] currently. - while (I != E && isalnum(*I)) ++I; - - // If we reached the end of the ID, we must have the end of the string or a - // comma, which we skip now. - if (I != E) { - if (*I != ',') return false; - ++I; - if (I == E) return false; // don't allow "xyz," - } } - - if (NumOutputs > 1) return false; // Only one result allowed. + + if (NumOutputs > 1) return false; // Only one result allowed so far. if ((Ty->getReturnType() != Type::VoidTy) != NumOutputs) return false; // NumOutputs = 1 iff has a result type. From evan.cheng at apple.com Wed Jan 25 20:27:54 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 25 Jan 2006 20:27:54 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86ATTAsmPrinter.cpp Message-ID: <200601260227.UAA09823@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: X86ATTAsmPrinter.cpp updated: 1.19 -> 1.20 --- Log message: Work around some x86 Darwin assembler bugs --- Diffs of the changes: (+26 -0) X86ATTAsmPrinter.cpp | 26 ++++++++++++++++++++++++++ 1 files changed, 26 insertions(+) Index: llvm/lib/Target/X86/X86ATTAsmPrinter.cpp diff -u llvm/lib/Target/X86/X86ATTAsmPrinter.cpp:1.19 llvm/lib/Target/X86/X86ATTAsmPrinter.cpp:1.20 --- llvm/lib/Target/X86/X86ATTAsmPrinter.cpp:1.19 Sun Jan 22 17:37:17 2006 +++ llvm/lib/Target/X86/X86ATTAsmPrinter.cpp Wed Jan 25 20:27:43 2006 @@ -220,6 +220,32 @@ /// void X86ATTAsmPrinter::printMachineInstruction(const MachineInstr *MI) { ++EmittedInsts; + // This works around some Darwin assembler bugs. + if (forDarwin) { + switch (MI->getOpcode()) { + case X86::REP_MOVSB: + O << "rep/movsb (%esi),(%edi)\n"; + return; + case X86::REP_MOVSD: + O << "rep/movsl (%esi),(%edi)\n"; + return; + case X86::REP_MOVSW: + O << "rep/movsw (%esi),(%edi)\n"; + return; + case X86::REP_STOSB: + O << "rep/stosb\n"; + return; + case X86::REP_STOSD: + O << "rep/stosl\n"; + return; + case X86::REP_STOSW: + O << "rep/stosw\n"; + return; + default: + break; + } + } + // Call the autogenerated instruction printer routines. printInstruction(MI); } From reid at x10sys.com Wed Jan 25 20:38:44 2006 From: reid at x10sys.com (Reid Spencer) Date: Wed, 25 Jan 2006 18:38:44 -0800 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86ATTAsmPrinter.cpp In-Reply-To: <200601260227.UAA09823@zion.cs.uiuc.edu> References: <200601260227.UAA09823@zion.cs.uiuc.edu> Message-ID: <1138243124.6222.1.camel@bashful.x10sys.com> Evan, I don't know anything about this stuff, but looking at the pattern, it seems a mistake may have been made? Consider these: On Wed, 2006-01-25 at 20:27 -0600, Evan Cheng wrote: > void X86ATTAsmPrinter::printMachineInstruction(const MachineInstr *MI) { > ++EmittedInsts; > + // This works around some Darwin assembler bugs. > + if (forDarwin) { > + switch (MI->getOpcode()) { > + case X86::REP_MOVSB: > + O << "rep/movsb (%esi),(%edi)\n"; > + return; REP_MOVSB = rep/movsb > + case X86::REP_MOVSD: > + O << "rep/movsl (%esi),(%edi)\n"; > + return; REP_MOVSD != rep/movsl is this a mistake? > + case X86::REP_MOVSW: > + O << "rep/movsw (%esi),(%edi)\n"; > + return; > + case X86::REP_STOSB: > + O << "rep/stosb\n"; > + return; > + case X86::REP_STOSD: > + O << "rep/stosl\n"; > + return; and this one? > + case X86::REP_STOSW: > + O << "rep/stosw\n"; > + return; > + default: > + break; > + } > + } Reid. -------------- next part -------------- A non-text attachment was scrubbed... Name: not available Type: application/pgp-signature Size: 189 bytes Desc: This is a digitally signed message part Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20060125/614c6c67/attachment.bin From evan.cheng at apple.com Wed Jan 25 20:47:12 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 25 Jan 2006 18:47:12 -0800 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86ATTAsmPrinter.cpp In-Reply-To: <1138243124.6222.1.camel@bashful.x10sys.com> References: <200601260227.UAA09823@zion.cs.uiuc.edu> <1138243124.6222.1.camel@bashful.x10sys.com> Message-ID: No, it's correct. Some assemblers prefer 'd' for double-word, some 'l' for long-word. This just works around some inconsistency in the Apple assembler. Evan On Jan 25, 2006, at 6:38 PM, Reid Spencer wrote: > Evan, > > I don't know anything about this stuff, but looking at the pattern, it > seems a mistake may have been made? Consider these: > > On Wed, 2006-01-25 at 20:27 -0600, Evan Cheng wrote: >> void X86ATTAsmPrinter::printMachineInstruction(const MachineInstr >> *MI) { >> ++EmittedInsts; >> + // This works around some Darwin assembler bugs. >> + if (forDarwin) { >> + switch (MI->getOpcode()) { >> + case X86::REP_MOVSB: >> + O << "rep/movsb (%esi),(%edi)\n"; >> + return; > > REP_MOVSB = rep/movsb > >> + case X86::REP_MOVSD: >> + O << "rep/movsl (%esi),(%edi)\n"; >> + return; > > REP_MOVSD != rep/movsl > > is this a mistake? > >> + case X86::REP_MOVSW: >> + O << "rep/movsw (%esi),(%edi)\n"; >> + return; >> + case X86::REP_STOSB: >> + O << "rep/stosb\n"; >> + return; >> + case X86::REP_STOSD: >> + O << "rep/stosl\n"; >> + return; > > and this one? > >> + case X86::REP_STOSW: >> + O << "rep/stosw\n"; >> + return; >> + default: >> + break; >> + } >> + } > > Reid. From alenhar2 at cs.uiuc.edu Wed Jan 25 21:22:19 2006 From: alenhar2 at cs.uiuc.edu (Andrew Lenharth) Date: Wed, 25 Jan 2006 21:22:19 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaInstrFormats.td AlphaInstrInfo.td AlphaRegisterInfo.cpp Message-ID: <200601260322.VAA10380@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/Alpha: AlphaInstrFormats.td updated: 1.23 -> 1.24 AlphaInstrInfo.td updated: 1.107 -> 1.108 AlphaRegisterInfo.cpp updated: 1.32 -> 1.33 --- Log message: allow R28 to be used for frame calculations without entirely removing it from circulation --- Diffs of the changes: (+4 -21) AlphaInstrFormats.td | 19 +------------------ AlphaInstrInfo.td | 4 ++-- AlphaRegisterInfo.cpp | 2 +- 3 files changed, 4 insertions(+), 21 deletions(-) Index: llvm/lib/Target/Alpha/AlphaInstrFormats.td diff -u llvm/lib/Target/Alpha/AlphaInstrFormats.td:1.23 llvm/lib/Target/Alpha/AlphaInstrFormats.td:1.24 --- llvm/lib/Target/Alpha/AlphaInstrFormats.td:1.23 Mon Jan 16 15:22:38 2006 +++ llvm/lib/Target/Alpha/AlphaInstrFormats.td Wed Jan 25 21:22:07 2006 @@ -45,6 +45,7 @@ let Pattern = pattern; let isStore = store; let isLoad = load; + let Defs = [R28]; //We may use this for frame index calculations, so reserve it here bits<5> Ra; bits<16> disp; @@ -54,16 +55,7 @@ let Inst{20-16} = Rb; let Inst{15-0} = disp; } -class MFormAlt opcode, string asmstr> - : InstAlphaAlt { - bits<5> Ra; - bits<16> disp; - bits<5> Rb; - let Inst{25-21} = Ra; - let Inst{20-16} = Rb; - let Inst{15-0} = disp; -} class MfcForm opcode, bits<16> fc, string asmstr> : InstAlpha { bits<5> Ra; @@ -85,15 +77,6 @@ } //3.3.2 -let isBranch = 1, isTerminator = 1 in -class BForm opcode, string asmstr> - : InstAlpha { - bits<5> Ra; - bits<21> disp; - - let Inst{25-21} = Ra; - let Inst{20-0} = disp; -} def target : Operand {} let isBranch = 1, isTerminator = 1 in class BFormD opcode, string asmstr, list pattern> Index: llvm/lib/Target/Alpha/AlphaInstrInfo.td diff -u llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.107 llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.108 --- llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.107 Mon Jan 23 15:51:33 2006 +++ llvm/lib/Target/Alpha/AlphaInstrInfo.td Wed Jan 25 21:22:07 2006 @@ -576,8 +576,8 @@ //load address, rellocated gpdist form let OperandList = (ops GPRC:$RA, s16imm:$DISP, GPRC:$RB, s16imm:$NUM) in { -def LDAg : MFormAlt<0x08, "lda $RA,0($RB)\t\t!gpdisp!$NUM">; //Load address -def LDAHg : MFormAlt<0x09, "ldah $RA,0($RB)\t\t!gpdisp!$NUM">; //Load address +def LDAg : MForm<0x08, 0, 1, "lda $RA,0($RB)\t\t!gpdisp!$NUM", []>; //Load address +def LDAHg : MForm<0x09, 0, 1, "ldah $RA,0($RB)\t\t!gpdisp!$NUM", []>; //Load address } //Load quad, rellocated literal form Index: llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp diff -u llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp:1.32 llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp:1.33 --- llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp:1.32 Tue Jan 24 19:51:08 2006 +++ llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp Wed Jan 25 21:22:07 2006 @@ -257,7 +257,7 @@ " for stack size: " << MF.getFrameInfo()->getStackSize() << "\n"); if (Offset > IMM_HIGH || Offset < IMM_LOW) { - std::cerr << "Unconditionally using R28 for evil purposes\n"; + DEBUG(std::cerr << "Unconditionally using R28 for evil purposes Offset: " << Offset << "\n"); //so in this case, we need to use a temporary register, and move the original //inst off the SP/FP //fix up the old: From alenhar2 at cs.uiuc.edu Wed Jan 25 21:24:27 2006 From: alenhar2 at cs.uiuc.edu (Andrew Lenharth) Date: Wed, 25 Jan 2006 21:24:27 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaInstrFormats.td AlphaInstrInfo.td Message-ID: <200601260324.VAA10428@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/Alpha: AlphaInstrFormats.td updated: 1.24 -> 1.25 AlphaInstrInfo.td updated: 1.108 -> 1.109 --- Log message: minor renaming --- Diffs of the changes: (+16 -16) AlphaInstrFormats.td | 2 +- AlphaInstrInfo.td | 30 +++++++++++++++--------------- 2 files changed, 16 insertions(+), 16 deletions(-) Index: llvm/lib/Target/Alpha/AlphaInstrFormats.td diff -u llvm/lib/Target/Alpha/AlphaInstrFormats.td:1.24 llvm/lib/Target/Alpha/AlphaInstrFormats.td:1.25 --- llvm/lib/Target/Alpha/AlphaInstrFormats.td:1.24 Wed Jan 25 21:22:07 2006 +++ llvm/lib/Target/Alpha/AlphaInstrFormats.td Wed Jan 25 21:24:15 2006 @@ -90,7 +90,7 @@ let Inst{20-0} = disp; } let isBranch = 1, isTerminator = 1 in -class BFormDG opcode, string asmstr, list pattern> +class BForm opcode, string asmstr, list pattern> : InstAlpha { let Pattern = pattern; Index: llvm/lib/Target/Alpha/AlphaInstrInfo.td diff -u llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.108 llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.109 --- llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.108 Wed Jan 25 21:22:07 2006 +++ llvm/lib/Target/Alpha/AlphaInstrInfo.td Wed Jan 25 21:24:15 2006 @@ -764,21 +764,21 @@ def BR : BFormD<0x30, "br $$31,$DISP", [(br bb:$DISP)]>; //Branches, int -def BEQ : BFormDG<0x39, "beq $RA,$DISP", - [(brcond (seteq GPRC:$RA, 0), bb:$DISP)]>; -def BGE : BFormDG<0x3E, "bge $RA,$DISP", - [(brcond (setge GPRC:$RA, 0), bb:$DISP)]>; -def BGT : BFormDG<0x3F, "bgt $RA,$DISP", - [(brcond (setgt GPRC:$RA, 0), bb:$DISP)]>; -def BLBC : BFormDG<0x38, "blbc $RA,$DISP", []>; //TODO: Low bit clear -def BLBS : BFormDG<0x3C, "blbs $RA,$DISP", - [(brcond (and GPRC:$RA, 1), bb:$DISP)]>; -def BLE : BFormDG<0x3B, "ble $RA,$DISP", - [(brcond (setle GPRC:$RA, 0), bb:$DISP)]>; -def BLT : BFormDG<0x3A, "blt $RA,$DISP", - [(brcond (setlt GPRC:$RA, 0), bb:$DISP)]>; -def BNE : BFormDG<0x3D, "bne $RA,$DISP", - [(brcond (setne GPRC:$RA, 0), bb:$DISP)]>; +def BEQ : BForm<0x39, "beq $RA,$DISP", + [(brcond (seteq GPRC:$RA, 0), bb:$DISP)]>; +def BGE : BForm<0x3E, "bge $RA,$DISP", + [(brcond (setge GPRC:$RA, 0), bb:$DISP)]>; +def BGT : BForm<0x3F, "bgt $RA,$DISP", + [(brcond (setgt GPRC:$RA, 0), bb:$DISP)]>; +def BLBC : BForm<0x38, "blbc $RA,$DISP", []>; //TODO: Low bit clear +def BLBS : BForm<0x3C, "blbs $RA,$DISP", + [(brcond (and GPRC:$RA, 1), bb:$DISP)]>; +def BLE : BForm<0x3B, "ble $RA,$DISP", + [(brcond (setle GPRC:$RA, 0), bb:$DISP)]>; +def BLT : BForm<0x3A, "blt $RA,$DISP", + [(brcond (setlt GPRC:$RA, 0), bb:$DISP)]>; +def BNE : BForm<0x3D, "bne $RA,$DISP", + [(brcond (setne GPRC:$RA, 0), bb:$DISP)]>; //Branches, float def FBEQ : FBForm<0x31, "fbeq $RA,$DISP", From lattner at cs.uiuc.edu Thu Jan 26 00:51:33 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Thu, 26 Jan 2006 00:51:33 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/SparcV8/SparcV8Subtarget.cpp SparcV8Subtarget.h Makefile SparcV8.td SparcV8TargetMachine.cpp SparcV8TargetMachine.h Message-ID: <200601260651.AAA11672@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/SparcV8: SparcV8Subtarget.cpp added (r1.1) SparcV8Subtarget.h added (r1.1) Makefile updated: 1.12 -> 1.13 SparcV8.td updated: 1.6 -> 1.7 SparcV8TargetMachine.cpp updated: 1.37 -> 1.38 SparcV8TargetMachine.h updated: 1.9 -> 1.10 --- Log message: Add trivial subtarget support --- Diffs of the changes: (+86 -1) Makefile | 2 +- SparcV8.td | 16 ++++++++++++++++ SparcV8Subtarget.cpp | 27 +++++++++++++++++++++++++++ SparcV8Subtarget.h | 38 ++++++++++++++++++++++++++++++++++++++ SparcV8TargetMachine.cpp | 1 + SparcV8TargetMachine.h | 3 +++ 6 files changed, 86 insertions(+), 1 deletion(-) Index: llvm/lib/Target/SparcV8/SparcV8Subtarget.cpp diff -c /dev/null llvm/lib/Target/SparcV8/SparcV8Subtarget.cpp:1.1 *** /dev/null Thu Jan 26 00:51:31 2006 --- llvm/lib/Target/SparcV8/SparcV8Subtarget.cpp Thu Jan 26 00:51:21 2006 *************** *** 0 **** --- 1,27 ---- + //===- SparcV8Subtarget.cpp - SPARC Subtarget Information -----------------===// + // + // The LLVM Compiler Infrastructure + // + // This file was developed by Chris Lattner and is distributed under the + // University of Illinois Open Source License. See LICENSE.TXT for details. + // + //===----------------------------------------------------------------------===// + // + // This file implements the SPARC specific subclass of TargetSubtarget. + // + //===----------------------------------------------------------------------===// + + #include "SparcV8Subtarget.h" + #include "SparcV8GenSubtarget.inc" + using namespace llvm; + + SparcV8Subtarget::SparcV8Subtarget(const Module &M, const std::string &FS) { + // Determine default and user specified characteristics + std::string CPU = "generic"; + + // FIXME: autodetect host here! + + // Parse features string. + ParseSubtargetFeatures(FS, CPU); + + }; \ No newline at end of file Index: llvm/lib/Target/SparcV8/SparcV8Subtarget.h diff -c /dev/null llvm/lib/Target/SparcV8/SparcV8Subtarget.h:1.1 *** /dev/null Thu Jan 26 00:51:33 2006 --- llvm/lib/Target/SparcV8/SparcV8Subtarget.h Thu Jan 26 00:51:21 2006 *************** *** 0 **** --- 1,38 ---- + //=====-- SparcV8Subtarget.h - Define Subtarget for the SPARC -*- C++ -*--====// + // + // The LLVM Compiler Infrastructure + // + // This file was developed by Chris Lattner and is distributed under the + // University of Illinois Open Source License. See LICENSE.TXT for details. + // + //===----------------------------------------------------------------------===// + // + // This file declares the SPARC specific subclass of TargetSubtarget. + // + //===----------------------------------------------------------------------===// + + #ifndef SPARC_SUBTARGET_H + #define SPARC_SUBTARGET_H + + #include "llvm/Target/TargetSubtarget.h" + #include + + namespace llvm { + class Module; + + class SparcV8Subtarget : public TargetSubtarget { + bool Is64Bit; + public: + SparcV8Subtarget(const Module &M, const std::string &FS); + + bool is64Bit() const { return Is64Bit; } + + /// ParseSubtargetFeatures - Parses features string setting specified + /// subtarget options. Definition of function is auto generated by tblgen. + void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU); + + }; + + } // end namespace llvm + + #endif Index: llvm/lib/Target/SparcV8/Makefile diff -u llvm/lib/Target/SparcV8/Makefile:1.12 llvm/lib/Target/SparcV8/Makefile:1.13 --- llvm/lib/Target/SparcV8/Makefile:1.12 Sat Dec 17 01:47:01 2005 +++ llvm/lib/Target/SparcV8/Makefile Thu Jan 26 00:51:21 2006 @@ -14,7 +14,7 @@ BUILT_SOURCES = SparcV8GenRegisterInfo.h.inc SparcV8GenRegisterNames.inc \ SparcV8GenRegisterInfo.inc SparcV8GenInstrNames.inc \ SparcV8GenInstrInfo.inc SparcV8GenAsmWriter.inc \ - SparcV8GenDAGISel.inc + SparcV8GenDAGISel.inc SparcV8GenSubtarget.inc include $(LEVEL)/Makefile.common Index: llvm/lib/Target/SparcV8/SparcV8.td diff -u llvm/lib/Target/SparcV8/SparcV8.td:1.6 llvm/lib/Target/SparcV8/SparcV8.td:1.7 --- llvm/lib/Target/SparcV8/SparcV8.td:1.6 Thu Dec 9 22:48:57 2004 +++ llvm/lib/Target/SparcV8/SparcV8.td Thu Jan 26 00:51:21 2006 @@ -17,6 +17,14 @@ include "../Target.td" //===----------------------------------------------------------------------===// +// PowerPC Subtarget features. +// + +def Feature64Bit : SubtargetFeature<"64bit", "bool", "Is64Bit", + "Enable 64-bit instructions">; + + +//===----------------------------------------------------------------------===// // Register File Description //===----------------------------------------------------------------------===// @@ -37,6 +45,14 @@ } //===----------------------------------------------------------------------===// +// SPARC processors supported. +//===----------------------------------------------------------------------===// + +def : Processor<"generic", NoItineraries, []>; +def : Processor<"v8", NoItineraries, []>; +def : Processor<"v9", NoItineraries, [Feature64Bit]>; + +//===----------------------------------------------------------------------===// // Declare the target which we are implementing //===----------------------------------------------------------------------===// Index: llvm/lib/Target/SparcV8/SparcV8TargetMachine.cpp diff -u llvm/lib/Target/SparcV8/SparcV8TargetMachine.cpp:1.37 llvm/lib/Target/SparcV8/SparcV8TargetMachine.cpp:1.38 --- llvm/lib/Target/SparcV8/SparcV8TargetMachine.cpp:1.37 Mon Jan 23 01:20:15 2006 +++ llvm/lib/Target/SparcV8/SparcV8TargetMachine.cpp Thu Jan 26 00:51:21 2006 @@ -35,6 +35,7 @@ IntrinsicLowering *IL, const std::string &FS) : TargetMachine("SparcV8", IL, false, 4, 4), + Subtarget(M, FS), FrameInfo(TargetFrameInfo::StackGrowsDown, 8, 0) { } Index: llvm/lib/Target/SparcV8/SparcV8TargetMachine.h diff -u llvm/lib/Target/SparcV8/SparcV8TargetMachine.h:1.9 llvm/lib/Target/SparcV8/SparcV8TargetMachine.h:1.10 --- llvm/lib/Target/SparcV8/SparcV8TargetMachine.h:1.9 Fri Dec 16 00:06:07 2005 +++ llvm/lib/Target/SparcV8/SparcV8TargetMachine.h Thu Jan 26 00:51:21 2006 @@ -18,6 +18,7 @@ #include "llvm/Target/TargetFrameInfo.h" #include "llvm/PassManager.h" #include "SparcV8InstrInfo.h" +#include "SparcV8Subtarget.h" namespace llvm { @@ -25,6 +26,7 @@ class Module; class SparcV8TargetMachine : public TargetMachine { + SparcV8Subtarget Subtarget; SparcV8InstrInfo InstrInfo; TargetFrameInfo FrameInfo; public: @@ -33,6 +35,7 @@ virtual const SparcV8InstrInfo *getInstrInfo() const { return &InstrInfo; } virtual const TargetFrameInfo *getFrameInfo() const { return &FrameInfo; } + virtual const TargetSubtarget *getSubtargetImpl() const{ return &Subtarget; } virtual const MRegisterInfo *getRegisterInfo() const { return &InstrInfo.getRegisterInfo(); } From lattner at cs.uiuc.edu Thu Jan 26 01:22:34 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Thu, 26 Jan 2006 01:22:34 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/SparcV8/SparcV8.td SparcV8ISelDAGToDAG.cpp SparcV8Subtarget.cpp SparcV8Subtarget.h Message-ID: <200601260722.BAA11838@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/SparcV8: SparcV8.td updated: 1.7 -> 1.8 SparcV8ISelDAGToDAG.cpp updated: 1.59 -> 1.60 SparcV8Subtarget.cpp updated: 1.1 -> 1.2 SparcV8Subtarget.h updated: 1.1 -> 1.2 --- Log message: Rest of subtarget support, remove references to ppc --- Diffs of the changes: (+38 -14) SparcV8.td | 34 +++++++++++++++++++++++++++------- SparcV8ISelDAGToDAG.cpp | 8 ++++---- SparcV8Subtarget.cpp | 2 +- SparcV8Subtarget.h | 8 ++++++-- 4 files changed, 38 insertions(+), 14 deletions(-) Index: llvm/lib/Target/SparcV8/SparcV8.td diff -u llvm/lib/Target/SparcV8/SparcV8.td:1.7 llvm/lib/Target/SparcV8/SparcV8.td:1.8 --- llvm/lib/Target/SparcV8/SparcV8.td:1.7 Thu Jan 26 00:51:21 2006 +++ llvm/lib/Target/SparcV8/SparcV8.td Thu Jan 26 01:22:22 2006 @@ -17,12 +17,18 @@ include "../Target.td" //===----------------------------------------------------------------------===// -// PowerPC Subtarget features. +// SPARC Subtarget features. // -def Feature64Bit : SubtargetFeature<"64bit", "bool", "Is64Bit", - "Enable 64-bit instructions">; - +def FeatureV9 + : SubtargetFeature<"v9", "bool", "IsV9", + "Enable SPARC-V9 instructions">; +def FeatureV8Deprecated + : SubtargetFeature<"deprecated-v8", "bool", "V8DeprecatedInsts", + "Enable deprecated V8 instructions in V9 mode">; +def FeatureVIS + : SubtargetFeature<"vis", "bool", "IsVIS", + "Enable UltraSPARC Visual Instruction Set extensions">; //===----------------------------------------------------------------------===// // Register File Description @@ -48,9 +54,23 @@ // SPARC processors supported. //===----------------------------------------------------------------------===// -def : Processor<"generic", NoItineraries, []>; -def : Processor<"v8", NoItineraries, []>; -def : Processor<"v9", NoItineraries, [Feature64Bit]>; +class Proc Features> + : Processor; + +def : Proc<"generic", []>; +def : Proc<"v8", []>; +def : Proc<"supersparc", []>; +def : Proc<"sparclite", []>; +def : Proc<"f934", []>; +def : Proc<"hypersparc", []>; +def : Proc<"sparclite86x", []>; +def : Proc<"sparclet", []>; +def : Proc<"tsc701", []>; +def : Proc<"v9", [FeatureV9]>; +def : Proc<"ultrasparc", [FeatureV9, FeatureV8Deprecated]>; +def : Proc<"ultrasparc3", [FeatureV9, FeatureV8Deprecated]>; +def : Proc<"ultrasparc3-vis", [FeatureV9, FeatureV8Deprecated, FeatureVIS]>; + //===----------------------------------------------------------------------===// // Declare the target which we are implementing Index: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp diff -u llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.59 llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.60 --- llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.59 Wed Jan 25 12:52:42 2006 +++ llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp Thu Jan 26 01:22:22 2006 @@ -795,7 +795,7 @@ //===----------------------------------------------------------------------===// //===--------------------------------------------------------------------===// -/// SparcV8DAGToDAGISel - PPC specific code to select Sparc V8 machine +/// SparcV8DAGToDAGISel - SPARC specific code to select Sparc V8 machine /// instructions for SelectionDAG operations. /// namespace { @@ -816,7 +816,7 @@ virtual void InstructionSelectBasicBlock(SelectionDAG &DAG); virtual const char *getPassName() const { - return "PowerPC DAG->DAG Pattern Instruction Selection"; + return "SparcV8 DAG->DAG Pattern Instruction Selection"; } // Include the pieces autogenerated from the target description. @@ -1011,8 +1011,8 @@ } -/// createPPCISelDag - This pass converts a legalized DAG into a -/// PowerPC-specific DAG, ready for instruction scheduling. +/// createSparcV8ISelDag - This pass converts a legalized DAG into a +/// SPARC-specific DAG, ready for instruction scheduling. /// FunctionPass *llvm::createSparcV8ISelDag(TargetMachine &TM) { return new SparcV8DAGToDAGISel(TM); Index: llvm/lib/Target/SparcV8/SparcV8Subtarget.cpp diff -u llvm/lib/Target/SparcV8/SparcV8Subtarget.cpp:1.1 llvm/lib/Target/SparcV8/SparcV8Subtarget.cpp:1.2 --- llvm/lib/Target/SparcV8/SparcV8Subtarget.cpp:1.1 Thu Jan 26 00:51:21 2006 +++ llvm/lib/Target/SparcV8/SparcV8Subtarget.cpp Thu Jan 26 01:22:22 2006 @@ -24,4 +24,4 @@ // Parse features string. ParseSubtargetFeatures(FS, CPU); -}; \ No newline at end of file +}; Index: llvm/lib/Target/SparcV8/SparcV8Subtarget.h diff -u llvm/lib/Target/SparcV8/SparcV8Subtarget.h:1.1 llvm/lib/Target/SparcV8/SparcV8Subtarget.h:1.2 --- llvm/lib/Target/SparcV8/SparcV8Subtarget.h:1.1 Thu Jan 26 00:51:21 2006 +++ llvm/lib/Target/SparcV8/SparcV8Subtarget.h Thu Jan 26 01:22:22 2006 @@ -21,11 +21,15 @@ class Module; class SparcV8Subtarget : public TargetSubtarget { - bool Is64Bit; + bool IsV9; + bool V8DeprecatedInsts; + bool IsVIS; public: SparcV8Subtarget(const Module &M, const std::string &FS); - bool is64Bit() const { return Is64Bit; } + bool isV9() const { return IsV9; } + bool isVIS() const { return IsVIS; } + bool useDeprecatedV8Instructions() const { return V8DeprecatedInsts; } /// ParseSubtargetFeatures - Parses features string setting specified /// subtarget options. Definition of function is auto generated by tblgen. From duraid at octopus.com.au Thu Jan 26 03:08:49 2006 From: duraid at octopus.com.au (Duraid Madina) Date: Thu, 26 Jan 2006 03:08:49 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/IA64/IA64Bundling.cpp IA64InstrInfo.td IA64RegisterInfo.cpp Message-ID: <200601260908.DAA10056@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/IA64: IA64Bundling.cpp updated: 1.1 -> 1.2 IA64InstrInfo.td updated: 1.43 -> 1.44 IA64RegisterInfo.cpp updated: 1.12 -> 1.13 --- Log message: some hoovering --- Diffs of the changes: (+13 -9) IA64Bundling.cpp | 7 ++++--- IA64InstrInfo.td | 7 +++++-- IA64RegisterInfo.cpp | 8 ++++---- 3 files changed, 13 insertions(+), 9 deletions(-) Index: llvm/lib/Target/IA64/IA64Bundling.cpp diff -u llvm/lib/Target/IA64/IA64Bundling.cpp:1.1 llvm/lib/Target/IA64/IA64Bundling.cpp:1.2 --- llvm/lib/Target/IA64/IA64Bundling.cpp:1.1 Tue Jan 24 20:23:38 2006 +++ llvm/lib/Target/IA64/IA64Bundling.cpp Thu Jan 26 03:08:31 2006 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file was developed by the LLVM research group and is distributed under -// the University of Illinois Open Source License. See LICENSE.TXT for details. +// This file was developed by Duraid Madina and is distributed under the +// University of Illinois Open Source License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // @@ -56,7 +56,8 @@ std::set PendingRegWrites; // XXX: ugly global, but // pending writes can cross basic blocks. Note that - // taken branches end instruction groups. + // taken branches end instruction groups. So we + // only need to worry about 'fallthrough' code }; } // end of anonymous namespace Index: llvm/lib/Target/IA64/IA64InstrInfo.td diff -u llvm/lib/Target/IA64/IA64InstrInfo.td:1.43 llvm/lib/Target/IA64/IA64InstrInfo.td:1.44 --- llvm/lib/Target/IA64/IA64InstrInfo.td:1.43 Tue Jan 24 20:23:38 2006 +++ llvm/lib/Target/IA64/IA64InstrInfo.td Thu Jan 26 03:08:31 2006 @@ -501,10 +501,13 @@ def SHRSI : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src1, u6imm:$imm), "shr $dst = $src1, $imm">; -def EXTRU : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src1, u6imm:$imm1, u6imm:$imm2), +def EXTRU : AForm<0x03, 0x0b, + (ops GR:$dst, GR:$src1, u6imm:$imm1, u6imm:$imm2), "extr.u $dst = $src1, $imm1, $imm2">; -def DEPZ : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src1, u6imm:$imm1, u6imm:$imm2), "dep.z $dst = $src1, $imm1, $imm2">; +def DEPZ : AForm<0x03, 0x0b, + (ops GR:$dst, GR:$src1, u6imm:$imm1, u6imm:$imm2), + "dep.z $dst = $src1, $imm1, $imm2">; def PCMPEQOR : AForm<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2, PR:$qp), "($qp) cmp.eq.or $dst, p0 = $src1, $src2">; Index: llvm/lib/Target/IA64/IA64RegisterInfo.cpp diff -u llvm/lib/Target/IA64/IA64RegisterInfo.cpp:1.12 llvm/lib/Target/IA64/IA64RegisterInfo.cpp:1.13 --- llvm/lib/Target/IA64/IA64RegisterInfo.cpp:1.12 Tue Jan 24 20:23:38 2006 +++ llvm/lib/Target/IA64/IA64RegisterInfo.cpp Thu Jan 26 03:08:31 2006 @@ -168,8 +168,8 @@ if ( Offset <= 8191 && Offset >= -8192) { // smallish offset //fix up the old: MI.SetMachineOperandReg(i, IA64::r22); - MachineOperand &MO = MI.getOperand(i); - MO.setUse(); // mark r22 as being used (the bundler wants to know this) + MI.getOperand(i).setUse(); // mark r22 as being used + // (the bundler wants to know this) //insert the new MachineInstr* nMI=BuildMI(IA64::ADDIMM22, 2, IA64::r22) .addReg(BaseRegister).addSImm(Offset); @@ -177,8 +177,8 @@ } else { // it's big //fix up the old: MI.SetMachineOperandReg(i, IA64::r22); - MachineOperand &MO = MI.getOperand(i); - MO.setUse(); // mark r22 as being used (the bundler wants to know this) + MI.getOperand(i).setUse(); // mark r22 as being used + // (the bundler wants to know this) MachineInstr* nMI; nMI=BuildMI(IA64::MOVLIMM64, 1, IA64::r22).addSImm(Offset); MBB.insert(II, nMI); From duraid at octopus.com.au Thu Jan 26 03:45:15 2006 From: duraid at octopus.com.au (Duraid Madina) Date: Thu, 26 Jan 2006 03:45:15 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/IA64/IA64RegisterInfo.td Message-ID: <200601260945.DAA13480@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/IA64: IA64RegisterInfo.td updated: 1.14 -> 1.15 --- Log message: fix stack corruption! Previously, 16-byte whole-FP-register stores were being treated as needing only 8 bytes (though they were 16 byte aligned.) This should fix a bunch of tests - anyone have any comments, though? - in Target.td , SpillSize and SpillAlignment seem dead - is this what Size and Alignment do now? - in CodeGenRegisters.h/CodeGenTarget.cpp , DeclaredSpillSize and DeclaredSpillAlignment seem dead. - there are a bunch of comments here and there that don't clearly distinguish between 'size' and 'spillsize' etc. hmm. --- Diffs of the changes: (+7 -4) IA64RegisterInfo.td | 11 +++++++---- 1 files changed, 7 insertions(+), 4 deletions(-) Index: llvm/lib/Target/IA64/IA64RegisterInfo.td diff -u llvm/lib/Target/IA64/IA64RegisterInfo.td:1.14 llvm/lib/Target/IA64/IA64RegisterInfo.td:1.15 --- llvm/lib/Target/IA64/IA64RegisterInfo.td:1.14 Mon Jan 23 00:08:46 2006 +++ llvm/lib/Target/IA64/IA64RegisterInfo.td Thu Jan 26 03:45:03 2006 @@ -283,10 +283,7 @@ // these are the scratch (+stacked) FP registers -// the 128 here is to make stf.spill/ldf.fill happy, -// when storing full (82-bit) FP regs to stack slots -// we need to 16-byte align -def FP : RegisterClass<"IA64", [f64], 128, +def FP : RegisterClass<"IA64", [f64], 64, [F6, F7, F8, F9, F10, F11, F12, F13, F14, F15, F32, F33, F34, F35, F36, F37, F38, F39, @@ -303,6 +300,12 @@ F120, F121, F122, F123, F124, F125, F126, F127, F0, F1]> // these last two are hidden { +// the 128s here are to make stf.spill/ldf.fill happy, +// when storing full (82-bit) FP regs to stack slots +// we need to 16-byte align + let Size=128; + let Alignment=128; + let MethodProtos = [{ iterator allocation_order_begin(MachineFunction &MF) const; iterator allocation_order_end(MachineFunction &MF) const; From evan.cheng at apple.com Thu Jan 26 03:53:17 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Thu, 26 Jan 2006 03:53:17 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/Makefile X86.h X86.td X86Subtarget.cpp X86Subtarget.h X86TargetMachine.cpp Message-ID: <200601260953.DAA14507@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: Makefile updated: 1.24 -> 1.25 X86.h updated: 1.39 -> 1.40 X86.td updated: 1.16 -> 1.17 X86Subtarget.cpp updated: 1.8 -> 1.9 X86Subtarget.h updated: 1.7 -> 1.8 X86TargetMachine.cpp updated: 1.97 -> 1.98 --- Log message: Added preliminary x86 subtarget support. --- Diffs of the changes: (+158 -4) Makefile | 3 +- X86.h | 2 - X86.td | 69 +++++++++++++++++++++++++++++++++++++++++++++++++++ X86Subtarget.cpp | 53 +++++++++++++++++++++++++++++++++++++++ X86Subtarget.h | 21 +++++++++++++++ X86TargetMachine.cpp | 14 ++++++++-- 6 files changed, 158 insertions(+), 4 deletions(-) Index: llvm/lib/Target/X86/Makefile diff -u llvm/lib/Target/X86/Makefile:1.24 llvm/lib/Target/X86/Makefile:1.25 --- llvm/lib/Target/X86/Makefile:1.24 Tue Nov 15 19:54:32 2005 +++ llvm/lib/Target/X86/Makefile Thu Jan 26 03:53:06 2006 @@ -13,7 +13,8 @@ BUILT_SOURCES = X86GenRegisterInfo.h.inc X86GenRegisterNames.inc \ X86GenRegisterInfo.inc X86GenInstrNames.inc \ X86GenInstrInfo.inc X86GenAsmWriter.inc \ - X86GenAsmWriter1.inc X86GenDAGISel.inc + X86GenAsmWriter1.inc X86GenDAGISel.inc \ + X86GenSubtarget.inc include $(LEVEL)/Makefile.common Index: llvm/lib/Target/X86/X86.h diff -u llvm/lib/Target/X86/X86.h:1.39 llvm/lib/Target/X86/X86.h:1.40 --- llvm/lib/Target/X86/X86.h:1.39 Fri Dec 16 19:22:13 2005 +++ llvm/lib/Target/X86/X86.h Thu Jan 26 03:53:06 2006 @@ -26,7 +26,7 @@ class MachineCodeEmitter; enum X86VectorEnum { - NoSSE, SSE, SSE2, SSE3 + AutoDetect, NoSSE, SSE, SSE2, SSE3 }; extern X86VectorEnum X86Vector; Index: llvm/lib/Target/X86/X86.td diff -u llvm/lib/Target/X86/X86.td:1.16 llvm/lib/Target/X86/X86.td:1.17 --- llvm/lib/Target/X86/X86.td:1.16 Thu Jul 14 19:38:55 2005 +++ llvm/lib/Target/X86/X86.td Thu Jan 26 03:53:06 2006 @@ -17,6 +17,75 @@ include "../Target.td" //===----------------------------------------------------------------------===// +// X86 Subtarget features. +// + +def Feature64Bit : SubtargetFeature<"64bit", "bool", "Is64Bit", + "Enable 64-bit instructions">; +def FeatureMMX : SubtargetFeature<"mmx", "bool", "HasMMX", + "Enable MMX instructions">; +def FeatureSSE : SubtargetFeature<"sse", "bool", "HasSSE", + "Enable SSE instructions">; +def FeatureSSE2 : SubtargetFeature<"sse2", "bool", "HasSSE2", + "Enable SSE2 instructions">; +def FeatureSSE3 : SubtargetFeature<"sse3", "bool", "HasSSE3", + "Enable SSE3 instructions">; +def Feature3DNow : SubtargetFeature<"3dnow", "bool", "Has3DNow", + "Enable 3DNow! instructions">; +def Feature3DNowA : SubtargetFeature<"3dnowa", "bool", "Has3DNowA", + "Enable 3DNow! Athlon instructions">; + +//===----------------------------------------------------------------------===// +// X86 processors supported. +//===----------------------------------------------------------------------===// + +class Proc Features> + : Processor; + +def : Proc<"generic", []>; +def : Proc<"i386", []>; +def : Proc<"i486", []>; +def : Proc<"i586", []>; +def : Proc<"pentium", []>; +def : Proc<"pentium-mmx", [FeatureMMX]>; +def : Proc<"i686", []>; +def : Proc<"pentiumpro", []>; +def : Proc<"pentium2", [FeatureMMX]>; +def : Proc<"celeron", [FeatureMMX]>; +def : Proc<"pentium3", [FeatureMMX, FeatureSSE]>; +def : Proc<"pentium3m", [FeatureMMX, FeatureSSE]>; +def : Proc<"pentium-m", [FeatureMMX, FeatureSSE, FeatureSSE2]>; +def : Proc<"pentium4", [FeatureMMX, FeatureSSE, FeatureSSE2]>; +def : Proc<"pentium4m", [FeatureMMX, FeatureSSE, FeatureSSE2]>; +def : Proc<"prescott", [FeatureMMX, FeatureSSE, FeatureSSE2, + FeatureSSE3]>; +def : Proc<"x86-64", [FeatureMMX, FeatureSSE, FeatureSSE2, Feature64Bit]>; +def : Proc<"nocona", [FeatureMMX, FeatureSSE, FeatureSSE2, + FeatureSSE3, Feature64Bit]>; + +def : Proc<"k6", [FeatureMMX]>; +def : Proc<"k6-2", [FeatureMMX, Feature3DNow]>; +def : Proc<"k6-3", [FeatureMMX, Feature3DNow]>; +def : Proc<"athlon", [FeatureMMX, Feature3DNow, Feature3DNowA]>; +def : Proc<"athlon-tbird", [FeatureMMX, Feature3DNow, Feature3DNowA]>; +def : Proc<"athlon-4", [FeatureMMX, FeatureSSE, Feature3DNow, Feature3DNowA]>; +def : Proc<"athlon-xp", [FeatureMMX, FeatureSSE, Feature3DNow, Feature3DNowA]>; +def : Proc<"athlon-mp", [FeatureMMX, FeatureSSE, Feature3DNow, Feature3DNowA]>; +def : Proc<"k8", [FeatureMMX, FeatureSSE, FeatureSSE2, Feature3DNow, + Feature3DNowA, Feature64Bit]>; +def : Proc<"opteron", [FeatureMMX, FeatureSSE, FeatureSSE2, Feature3DNow, + Feature3DNowA, Feature64Bit]>; +def : Proc<"athlon64", [FeatureMMX, FeatureSSE, FeatureSSE2, Feature3DNow, + Feature3DNowA, Feature64Bit]>; +def : Proc<"athlon-fx", [FeatureMMX, FeatureSSE, FeatureSSE2, Feature3DNow, + Feature3DNowA, Feature64Bit]>; + +def : Proc<"winchip-c6", [FeatureMMX]>; +def : Proc<"winchip2", [FeatureMMX, Feature3DNow]>; +def : Proc<"c3", [FeatureMMX, Feature3DNow]>; +def : Proc<"c3-2", [FeatureMMX, FeatureSSE]>; + +//===----------------------------------------------------------------------===// // Register File Description //===----------------------------------------------------------------------===// Index: llvm/lib/Target/X86/X86Subtarget.cpp diff -u llvm/lib/Target/X86/X86Subtarget.cpp:1.8 llvm/lib/Target/X86/X86Subtarget.cpp:1.9 --- llvm/lib/Target/X86/X86Subtarget.cpp:1.8 Mon Nov 21 16:43:58 2005 +++ llvm/lib/Target/X86/X86Subtarget.cpp Thu Jan 26 03:53:06 2006 @@ -13,11 +13,64 @@ #include "X86Subtarget.h" #include "llvm/Module.h" +#include "X86GenSubtarget.inc" using namespace llvm; +#if defined(__APPLE__) +#include +#include +#include +#include + +/// GetCurrentX86CPU - Returns the current CPUs features. +static const char *GetCurrentX86CPU() { + host_basic_info_data_t hostInfo; + mach_msg_type_number_t infoCount; + + infoCount = HOST_BASIC_INFO_COUNT; + host_info(mach_host_self(), HOST_BASIC_INFO, (host_info_t)&hostInfo, + &infoCount); + + if (hostInfo.cpu_type != CPU_TYPE_I386) return "generic"; + + switch(hostInfo.cpu_subtype) { + case CPU_SUBTYPE_386: return "i386"; + case CPU_SUBTYPE_486: + case CPU_SUBTYPE_486SX: return "i486"; + case CPU_SUBTYPE_PENT: return "pentium"; + case CPU_SUBTYPE_PENTPRO: return "pentiumpro"; + case CPU_SUBTYPE_PENTII_M3: return "pentium2"; + case CPU_SUBTYPE_PENTII_M5: return "pentium2"; + case CPU_SUBTYPE_CELERON: + case CPU_SUBTYPE_CELERON_MOBILE: return "celeron"; + case CPU_SUBTYPE_PENTIUM_3: return "pentium3"; + case CPU_SUBTYPE_PENTIUM_3_M: return "pentium3m"; + case CPU_SUBTYPE_PENTIUM_3_XEON: return "pentium3"; // FIXME: not sure. + case CPU_SUBTYPE_PENTIUM_M: return "pentium-m"; + case CPU_SUBTYPE_PENTIUM_4: return "pentium4"; + case CPU_SUBTYPE_PENTIUM_4_M: return "pentium4m"; + // FIXME: prescott, yonah? Check CPU_THREADTYPE_INTEL_HTT? + case CPU_SUBTYPE_XEON: + case CPU_SUBTYPE_XEON_MP: return "nocona"; + default: ; + } + + return "generic"; +} +#endif + X86Subtarget::X86Subtarget(const Module &M, const std::string &FS) : stackAlignment(8), indirectExternAndWeakGlobals(false) { + // Determine default and user specified characteristics + std::string CPU = "generic"; +#if defined(__APPLE__) + CPU = GetCurrentX86CPU(); +#endif + + // Parse features string. + ParseSubtargetFeatures(FS, CPU); + // Default to ELF unless otherwise specified. TargetType = isELF; Index: llvm/lib/Target/X86/X86Subtarget.h diff -u llvm/lib/Target/X86/X86Subtarget.h:1.7 llvm/lib/Target/X86/X86Subtarget.h:1.8 --- llvm/lib/Target/X86/X86Subtarget.h:1.7 Mon Nov 21 16:43:58 2005 +++ llvm/lib/Target/X86/X86Subtarget.h Thu Jan 26 03:53:06 2006 @@ -30,6 +30,14 @@ /// Used by instruction selector bool indirectExternAndWeakGlobals; + /// Arch. features used by isel. + bool Is64Bit; + bool HasMMX; + bool HasSSE; + bool HasSSE2; + bool HasSSE3; + bool Has3DNow; + bool Has3DNowA; public: enum { isELF, isCygwin, isDarwin, isWindows @@ -51,6 +59,19 @@ bool getIndirectExternAndWeakGlobals() const { return indirectExternAndWeakGlobals; } + + /// ParseSubtargetFeatures - Parses features string setting specified + /// subtarget options. Definition of function is auto generated by tblgen. + void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU); + + bool is64Bit() const { return Is64Bit; } + + bool hasMMX() const { return HasMMX; } + bool hasSSE() const { return HasSSE; } + bool hasSSE2() const { return HasSSE2; } + bool hasSSE3() const { return HasSSE3; } + bool has3DNow() const { return Has3DNow; } + bool has3DNowA() const { return Has3DNowA; } }; } // End llvm namespace Index: llvm/lib/Target/X86/X86TargetMachine.cpp diff -u llvm/lib/Target/X86/X86TargetMachine.cpp:1.97 llvm/lib/Target/X86/X86TargetMachine.cpp:1.98 --- llvm/lib/Target/X86/X86TargetMachine.cpp:1.97 Sun Jan 22 17:37:17 2006 +++ llvm/lib/Target/X86/X86TargetMachine.cpp Thu Jan 26 03:53:06 2006 @@ -26,7 +26,7 @@ #include using namespace llvm; -X86VectorEnum llvm::X86Vector = NoSSE; +X86VectorEnum llvm::X86Vector = AutoDetect; bool llvm::X86ScalarSSE = false; bool llvm::X86DAGIsel = false; @@ -61,7 +61,7 @@ clEnumValN(SSE2, "sse2", " Enable SSE and SSE2 support"), clEnumValN(SSE3, "sse3", " Enable SSE, SSE2, and SSE3 support"), clEnumValEnd), - cl::location(X86Vector), cl::init(NoSSE)); + cl::location(X86Vector), cl::init(AutoDetect)); // Register the target. RegisterTarget X("x86", " IA-32 (Pentium and above)"); @@ -102,6 +102,16 @@ FrameInfo(TargetFrameInfo::StackGrowsDown, Subtarget.getStackAlignment(), -4), JITInfo(*this) { + if (X86Vector == AutoDetect) { + X86Vector = NoSSE; + if (Subtarget.hasSSE()) + X86Vector = SSE; + if (Subtarget.hasSSE2()) + X86Vector = SSE2; + if (Subtarget.hasSSE3()) + X86Vector = SSE3; + } + // Scalar SSE FP requires at least SSE2 X86ScalarSSE &= X86Vector >= SSE2; From jlaskey at apple.com Thu Jan 26 08:45:43 2006 From: jlaskey at apple.com (Jim Laskey) Date: Thu, 26 Jan 2006 08:45:43 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/Support/Dwarf.h Message-ID: <200601261445.IAA24004@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/Support: Dwarf.h added (r1.1) --- Log message: Split out Dwarf constants for use outside DwarfWriter. --- Diffs of the changes: (+432 -0) Dwarf.h | 432 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 432 insertions(+) Index: llvm/include/llvm/Support/Dwarf.h diff -c /dev/null llvm/include/llvm/Support/Dwarf.h:1.1 *** /dev/null Thu Jan 26 08:45:32 2006 --- llvm/include/llvm/Support/Dwarf.h Thu Jan 26 08:45:22 2006 *************** *** 0 **** --- 1,432 ---- + //===-- llvm/Support/Dwarf.h ---Dwarf Constants------------------*- C++ -*-===// + // + // The LLVM Compiler Infrastructure + // + // This file was developed by James M. Laskey and is distributed under the + // University of Illinois Open Source License. See LICENSE.TXT for details. + // + //===----------------------------------------------------------------------===// + // + // This file contains constants used for implementing Dwarf debug support. For + // Details on the Dwarf 3 specfication see DWARF Debugging Information Format + // V.3 reference manual http://dwarf.freestandards.org , + // + //===----------------------------------------------------------------------===// + + #ifndef LLVM_SUPPORT_DWARF_H + #define LLVM_SUPPORT_DWARF_H + + namespace llvm { + + //===--------------------------------------------------------------------===// + // Dwarf constants as gleaned from the DWARF Debugging Information Format V.3 + // reference manual http://dwarf.freestandards.org . + // + enum dwarf_constants { + DWARF_VERSION = 2, + + // Tags + DW_TAG_array_type = 0x01, + DW_TAG_class_type = 0x02, + DW_TAG_entry_point = 0x03, + DW_TAG_enumeration_type = 0x04, + DW_TAG_formal_parameter = 0x05, + DW_TAG_imported_declaration = 0x08, + DW_TAG_label = 0x0a, + DW_TAG_lexical_block = 0x0b, + DW_TAG_member = 0x0d, + DW_TAG_pointer_type = 0x0f, + DW_TAG_reference_type = 0x10, + DW_TAG_compile_unit = 0x11, + DW_TAG_string_type = 0x12, + DW_TAG_structure_type = 0x13, + DW_TAG_subroutine_type = 0x15, + DW_TAG_typedef = 0x16, + DW_TAG_union_type = 0x17, + DW_TAG_unspecified_parameters = 0x18, + DW_TAG_variant = 0x19, + DW_TAG_common_block = 0x1a, + DW_TAG_common_inclusion = 0x1b, + DW_TAG_inheritance = 0x1c, + DW_TAG_inlined_subroutine = 0x1d, + DW_TAG_module = 0x1e, + DW_TAG_ptr_to_member_type = 0x1f, + DW_TAG_set_type = 0x20, + DW_TAG_subrange_type = 0x21, + DW_TAG_with_stmt = 0x22, + DW_TAG_access_declaration = 0x23, + DW_TAG_base_type = 0x24, + DW_TAG_catch_block = 0x25, + DW_TAG_const_type = 0x26, + DW_TAG_constant = 0x27, + DW_TAG_enumerator = 0x28, + DW_TAG_file_type = 0x29, + DW_TAG_friend = 0x2a, + DW_TAG_namelist = 0x2b, + DW_TAG_namelist_item = 0x2c, + DW_TAG_packed_type = 0x2d, + DW_TAG_subprogram = 0x2e, + DW_TAG_template_type_parameter = 0x2f, + DW_TAG_template_value_parameter = 0x30, + DW_TAG_thrown_type = 0x31, + DW_TAG_try_block = 0x32, + DW_TAG_variant_part = 0x33, + DW_TAG_variable = 0x34, + DW_TAG_volatile_type = 0x35, + DW_TAG_dwarf_procedure = 0x36, + DW_TAG_restrict_type = 0x37, + DW_TAG_interface_type = 0x38, + DW_TAG_namespace = 0x39, + DW_TAG_imported_module = 0x3a, + DW_TAG_unspecified_type = 0x3b, + DW_TAG_partial_unit = 0x3c, + DW_TAG_imported_unit = 0x3d, + DW_TAG_condition = 0x3f, + DW_TAG_shared_type = 0x40, + DW_TAG_lo_user = 0x4080, + DW_TAG_hi_user = 0xffff, + + // Children flag + DW_CHILDREN_no = 0x00, + DW_CHILDREN_yes = 0x01, + + // Attributes + DW_AT_sibling = 0x01, + DW_AT_location = 0x02, + DW_AT_name = 0x03, + DW_AT_ordering = 0x09, + DW_AT_byte_size = 0x0b, + DW_AT_bit_offset = 0x0c, + DW_AT_bit_size = 0x0d, + DW_AT_stmt_list = 0x10, + DW_AT_low_pc = 0x11, + DW_AT_high_pc = 0x12, + DW_AT_language = 0x13, + DW_AT_discr = 0x15, + DW_AT_discr_value = 0x16, + DW_AT_visibility = 0x17, + DW_AT_import = 0x18, + DW_AT_string_length = 0x19, + DW_AT_common_reference = 0x1a, + DW_AT_comp_dir = 0x1b, + DW_AT_const_value = 0x1c, + DW_AT_containing_type = 0x1d, + DW_AT_default_value = 0x1e, + DW_AT_inline = 0x20, + DW_AT_is_optional = 0x21, + DW_AT_lower_bound = 0x22, + DW_AT_producer = 0x25, + DW_AT_prototyped = 0x27, + DW_AT_return_addr = 0x2a, + DW_AT_start_scope = 0x2c, + DW_AT_bit_stride = 0x2e, + DW_AT_upper_bound = 0x2f, + DW_AT_abstract_origin = 0x31, + DW_AT_accessibility = 0x32, + DW_AT_address_class = 0x33, + DW_AT_artificial = 0x34, + DW_AT_base_types = 0x35, + DW_AT_calling_convention = 0x36, + DW_AT_count = 0x37, + DW_AT_data_member_location = 0x38, + DW_AT_decl_column = 0x39, + DW_AT_decl_file = 0x3a, + DW_AT_decl_line = 0x3b, + DW_AT_declaration = 0x3c, + DW_AT_discr_list = 0x3d, + DW_AT_encoding = 0x3e, + DW_AT_external = 0x3f, + DW_AT_frame_base = 0x40, + DW_AT_friend = 0x41, + DW_AT_identifier_case = 0x42, + DW_AT_macro_info = 0x43, + DW_AT_namelist_item = 0x44, + DW_AT_priority = 0x45, + DW_AT_segment = 0x46, + DW_AT_specification = 0x47, + DW_AT_static_link = 0x48, + DW_AT_type = 0x49, + DW_AT_use_location = 0x4a, + DW_AT_variable_parameter = 0x4b, + DW_AT_virtuality = 0x4c, + DW_AT_vtable_elem_location = 0x4d, + DW_AT_allocated = 0x4e, + DW_AT_associated = 0x4f, + DW_AT_data_location = 0x50, + DW_AT_byte_stride = 0x51, + DW_AT_entry_pc = 0x52, + DW_AT_use_UTF8 = 0x53, + DW_AT_extension = 0x54, + DW_AT_ranges = 0x55, + DW_AT_trampoline = 0x56, + DW_AT_call_column = 0x57, + DW_AT_call_file = 0x58, + DW_AT_call_line = 0x59, + DW_AT_description = 0x5a, + DW_AT_binary_scale = 0x5b, + DW_AT_decimal_scale = 0x5c, + DW_AT_small = 0x5d, + DW_AT_decimal_sign = 0x5e, + DW_AT_digit_count = 0x5f, + DW_AT_picture_string = 0x60, + DW_AT_mutable = 0x61, + DW_AT_threads_scaled = 0x62, + DW_AT_explicit = 0x63, + DW_AT_object_pointer = 0x64, + DW_AT_endianity = 0x65, + DW_AT_elemental = 0x66, + DW_AT_pure = 0x67, + DW_AT_recursive = 0x68, + DW_AT_lo_user = 0x2000, + DW_AT_hi_user = 0x3fff, + + // Attribute form encodings + DW_FORM_addr = 0x01, + DW_FORM_block2 = 0x03, + DW_FORM_block4 = 0x04, + DW_FORM_data2 = 0x05, + DW_FORM_data4 = 0x06, + DW_FORM_data8 = 0x07, + DW_FORM_string = 0x08, + DW_FORM_block = 0x09, + DW_FORM_block1 = 0x0a, + DW_FORM_data1 = 0x0b, + DW_FORM_flag = 0x0c, + DW_FORM_sdata = 0x0d, + DW_FORM_strp = 0x0e, + DW_FORM_udata = 0x0f, + DW_FORM_ref_addr = 0x10, + DW_FORM_ref1 = 0x11, + DW_FORM_ref2 = 0x12, + DW_FORM_ref4 = 0x13, + DW_FORM_ref8 = 0x14, + DW_FORM_ref_udata = 0x15, + DW_FORM_indirect = 0x16, + + // Operation encodings + DW_OP_addr = 0x03, + DW_OP_deref = 0x06, + DW_OP_const1u = 0x08, + DW_OP_const1s = 0x09, + DW_OP_const2u = 0x0a, + DW_OP_const2s = 0x0b, + DW_OP_const4u = 0x0c, + DW_OP_const4s = 0x0d, + DW_OP_const8u = 0x0e, + DW_OP_const8s = 0x0f, + DW_OP_constu = 0x10, + DW_OP_consts = 0x11, + DW_OP_dup = 0x12, + DW_OP_drop = 0x13, + DW_OP_over = 0x14, + DW_OP_pick = 0x15, + DW_OP_swap = 0x16, + DW_OP_rot = 0x17, + DW_OP_xderef = 0x18, + DW_OP_abs = 0x19, + DW_OP_and = 0x1a, + DW_OP_div = 0x1b, + DW_OP_minus = 0x1c, + DW_OP_mod = 0x1d, + DW_OP_mul = 0x1e, + DW_OP_neg = 0x1f, + DW_OP_not = 0x20, + DW_OP_or = 0x21, + DW_OP_plus = 0x22, + DW_OP_plus_uconst = 0x23, + DW_OP_shl = 0x24, + DW_OP_shr = 0x25, + DW_OP_shra = 0x26, + DW_OP_xor = 0x27, + DW_OP_skip = 0x2f, + DW_OP_bra = 0x28, + DW_OP_eq = 0x29, + DW_OP_ge = 0x2a, + DW_OP_gt = 0x2b, + DW_OP_le = 0x2c, + DW_OP_lt = 0x2d, + DW_OP_ne = 0x2e, + DW_OP_lit0 = 0x30, + DW_OP_lit1 = 0x31, + DW_OP_lit31 = 0x4f, + DW_OP_reg0 = 0x50, + DW_OP_reg1 = 0x51, + DW_OP_reg31 = 0x6f, + DW_OP_breg0 = 0x70, + DW_OP_breg1 = 0x71, + DW_OP_breg31 = 0x8f, + DW_OP_regx = 0x90, + DW_OP_fbreg = 0x91, + DW_OP_bregx = 0x92, + DW_OP_piece = 0x93, + DW_OP_deref_size = 0x94, + DW_OP_xderef_size = 0x95, + DW_OP_nop = 0x96, + DW_OP_push_object_address = 0x97, + DW_OP_call2 = 0x98, + DW_OP_call4 = 0x99, + DW_OP_call_ref = 0x9a, + DW_OP_form_tls_address = 0x9b, + DW_OP_call_frame_cfa = 0x9c, + DW_OP_lo_user = 0xe0, + DW_OP_hi_user = 0xff, + + // Encoding attribute values + DW_ATE_address = 0x01, + DW_ATE_boolean = 0x02, + DW_ATE_complex_float = 0x03, + DW_ATE_float = 0x04, + DW_ATE_signed = 0x05, + DW_ATE_signed_char = 0x06, + DW_ATE_unsigned = 0x07, + DW_ATE_unsigned_char = 0x08, + DW_ATE_imaginary_float = 0x09, + DW_ATE_packed_decimal = 0x0a, + DW_ATE_numeric_string = 0x0b, + DW_ATE_edited = 0x0c, + DW_ATE_signed_fixed = 0x0d, + DW_ATE_unsigned_fixed = 0x0e, + DW_ATE_decimal_float = 0x0f, + DW_ATE_lo_user = 0x80, + DW_ATE_hi_user = 0xff, + + // Decimal sign attribute values + DW_DS_unsigned = 0x01, + DW_DS_leading_overpunch = 0x02, + DW_DS_trailing_overpunch = 0x03, + DW_DS_leading_separate = 0x04, + DW_DS_trailing_separate = 0x05, + + // Endianity attribute values + DW_END_default = 0x00, + DW_END_big = 0x01, + DW_END_little = 0x02, + DW_END_lo_user = 0x40, + DW_END_hi_user = 0xff, + + // Accessibility codes + DW_ACCESS_public = 0x01, + DW_ACCESS_protected = 0x02, + DW_ACCESS_private = 0x03, + + // Visibility codes + DW_VIS_local = 0x01, + DW_VIS_exported = 0x02, + DW_VIS_qualified = 0x03, + + // Virtuality codes + DW_VIRTUALITY_none = 0x00, + DW_VIRTUALITY_virtual = 0x01, + DW_VIRTUALITY_pure_virtual = 0x02, + + // Language names + DW_LANG_C89 = 0x0001, + DW_LANG_C = 0x0002, + DW_LANG_Ada83 = 0x0003, + DW_LANG_C_plus_plus = 0x0004, + DW_LANG_Cobol74 = 0x0005, + DW_LANG_Cobol85 = 0x0006, + DW_LANG_Fortran77 = 0x0007, + DW_LANG_Fortran90 = 0x0008, + DW_LANG_Pascal83 = 0x0009, + DW_LANG_Modula2 = 0x000a, + DW_LANG_Java = 0x000b, + DW_LANG_C99 = 0x000c, + DW_LANG_Ada95 = 0x000d, + DW_LANG_Fortran95 = 0x000e, + DW_LANG_PLI = 0x000f, + DW_LANG_ObjC = 0x0010, + DW_LANG_ObjC_plus_plus = 0x0011, + DW_LANG_UPC = 0x0012, + DW_LANG_D = 0x0013, + DW_LANG_lo_user = 0x8000, + DW_LANG_hi_user = 0xffff, + + // Identifier case codes + DW_ID_case_sensitive = 0x00, + DW_ID_up_case = 0x01, + DW_ID_down_case = 0x02, + DW_ID_case_insensitive = 0x03, + + // Calling convention codes + DW_CC_normal = 0x01, + DW_CC_program = 0x02, + DW_CC_nocall = 0x03, + DW_CC_lo_user = 0x40, + DW_CC_hi_user = 0xff, + + // Inline codes + DW_INL_not_inlined = 0x00, + DW_INL_inlined = 0x01, + DW_INL_declared_not_inlined = 0x02, + DW_INL_declared_inlined = 0x03, + + // Array ordering + DW_ORD_row_major = 0x00, + DW_ORD_col_major = 0x01, + + // Discriminant descriptor values + DW_DSC_label = 0x00, + DW_DSC_range = 0x01, + + // Line Number Standard Opcode Encodings + DW_LNS_copy = 0x01, + DW_LNS_advance_pc = 0x02, + DW_LNS_advance_line = 0x03, + DW_LNS_set_file = 0x04, + DW_LNS_set_column = 0x05, + DW_LNS_negate_stmt = 0x06, + DW_LNS_set_basic_block = 0x07, + DW_LNS_const_add_pc = 0x08, + DW_LNS_fixed_advance_pc = 0x09, + DW_LNS_set_prologue_end = 0x0a, + DW_LNS_set_epilogue_begin = 0x0b, + DW_LNS_set_isa = 0x0c, + + // Line Number Extended Opcode Encodings + DW_LNE_end_sequence = 0x01, + DW_LNE_set_address = 0x02, + DW_LNE_define_file = 0x03, + DW_LNE_lo_user = 0x80, + DW_LNE_hi_user = 0xff, + + // Macinfo Type Encodings + DW_MACINFO_define = 0x01, + DW_MACINFO_undef = 0x02, + DW_MACINFO_start_file = 0x03, + DW_MACINFO_end_file = 0x04, + DW_MACINFO_vendor_ext = 0xff, + + // Call frame instruction encodings + DW_CFA_advance_loc = 0x40, + DW_CFA_offset = 0x80, + DW_CFA_restore = 0xc0, + DW_CFA_set_loc = 0x01, + DW_CFA_advance_loc1 = 0x02, + DW_CFA_advance_loc2 = 0x03, + DW_CFA_advance_loc4 = 0x04, + DW_CFA_offset_extended = 0x05, + DW_CFA_restore_extended = 0x06, + DW_CFA_undefined = 0x07, + DW_CFA_same_value = 0x08, + DW_CFA_register = 0x09, + DW_CFA_remember_state = 0x0a, + DW_CFA_restore_state = 0x0b, + DW_CFA_def_cfa = 0x0c, + DW_CFA_def_cfa_register = 0x0d, + DW_CFA_def_cfa_offset = 0x0e, + DW_CFA_def_cfa_expression = 0x0f, + DW_CFA_expression = 0x10, + DW_CFA_offset_extended_sf = 0x11, + DW_CFA_def_cfa_sf = 0x12, + DW_CFA_def_cfa_offset_sf = 0x13, + DW_CFA_val_offset = 0x14, + DW_CFA_val_offset_sf = 0x15, + DW_CFA_val_expression = 0x16, + DW_CFA_lo_user = 0x1c, + DW_CFA_hi_user = 0x3f + }; + + } // End of namespace llvm + + #endif From jeffc at jolt-lang.org Thu Jan 26 10:49:12 2006 From: jeffc at jolt-lang.org (Jeff Cohen) Date: Thu, 26 Jan 2006 10:49:12 -0600 Subject: [llvm-commits] CVS: llvm/win32/x86/x86.vcproj Message-ID: <200601261649.KAA24834@zion.cs.uiuc.edu> Changes in directory llvm/win32/x86: x86.vcproj updated: 1.17 -> 1.18 --- Log message: Teach Visual Studio about X86 subtargets. --- Diffs of the changes: (+9 -4) x86.vcproj | 13 +++++++++---- 1 files changed, 9 insertions(+), 4 deletions(-) Index: llvm/win32/x86/x86.vcproj diff -u llvm/win32/x86/x86.vcproj:1.17 llvm/win32/x86/x86.vcproj:1.18 --- llvm/win32/x86/x86.vcproj:1.17 Fri Dec 16 18:14:47 2005 +++ llvm/win32/x86/x86.vcproj Thu Jan 26 10:49:00 2006 @@ -123,9 +123,10 @@ ..\$(IntDir)\TableGen.exe -gen-instr-desc -I ..\..\lib\Target\X86 $(InputPath) -o X86GenInstrInfo.inc ..\$(IntDir)\TableGen.exe -gen-asm-writer -I ..\..\lib\Target\X86 $(InputPath) -o X86GenAsmWriter.inc ..\$(IntDir)\TableGen.exe -gen-asm-writer -asmwriternum=1 -I ..\..\lib\Target\X86 $(InputPath) -o X86GenAsmWriter1.inc -..\$(IntDir)\TableGen.exe -gen-dag-isel -I ..\..\lib\Target\X86 $(InputPath) -o X86GenDAGISel.inc" +..\$(IntDir)\TableGen.exe -gen-dag-isel -I ..\..\lib\Target\X86 $(InputPath) -o X86GenDAGISel.inc +..\$(IntDir)\TableGen.exe -gen-subtarget -I ..\..\lib\Target\X86 $(InputPath) -o X86GenSubtarget.inc" AdditionalDependencies="$(InputDir)X86InstrInfo.td;$(InputDir)X86RegisterInfo.td;$(InputDir)..\Target.td;$(ProjectDir)..\$(IntDir)\TableGen.exe" - Outputs="X86GenRegisterNames.inc;X86GenRegisterInfo.h.inc;X86GenRegisterInfo.inc;X86GenInstrNames.inc;X86GenInstrInfo.inc;X86GenAsmWriter.inc;X86GenAsmWriter1.inc;X86GenDAGISel.inc"/> + Outputs="X86GenRegisterNames.inc;X86GenRegisterInfo.h.inc;X86GenRegisterInfo.inc;X86GenInstrNames.inc;X86GenInstrInfo.inc;X86GenAsmWriter.inc;X86GenAsmWriter1.inc;X86GenDAGISel.inc;X86GenSubtarget.inc"/> @@ -139,9 +140,10 @@ ..\$(IntDir)\TableGen.exe -gen-instr-desc -I ..\..\lib\Target\X86 $(InputPath) -o X86GenInstrInfo.inc ..\$(IntDir)\TableGen.exe -gen-asm-writer -I ..\..\lib\Target\X86 $(InputPath) -o X86GenAsmWriter.inc ..\$(IntDir)\TableGen.exe -gen-asm-writer -asmwriternum=1 -I ..\..\lib\Target\X86 $(InputPath) -o X86GenAsmWriter1.inc -..\$(IntDir)\TableGen.exe -gen-dag-isel -I ..\..\lib\Target\X86 $(InputPath) -o X86GenDAGISel.inc" +..\$(IntDir)\TableGen.exe -gen-dag-isel -I ..\..\lib\Target\X86 $(InputPath) -o X86GenDAGISel.inc +..\$(IntDir)\TableGen.exe -gen-subtarget -I ..\..\lib\Target\X86 $(InputPath) -o X86GenSubtarget.inc" AdditionalDependencies="$(InputDir)X86InstrInfo.td;$(InputDir)X86RegisterInfo.td;$(InputDir)..\Target.td;$(ProjectDir)..\$(IntDir)\TableGen.exe" - Outputs="X86GenRegisterNames.inc;X86GenRegisterInfo.h.inc;X86GenRegisterInfo.inc;X86GenInstrNames.inc;X86GenInstrInfo.inc;X86GenAsmWriter.inc;X86GenAsmWriter1.inc;X86GenDAGISel.inc"/> + Outputs="X86GenRegisterNames.inc;X86GenRegisterInfo.h.inc;X86GenRegisterInfo.inc;X86GenInstrNames.inc;X86GenInstrInfo.inc;X86GenAsmWriter.inc;X86GenAsmWriter1.inc;X86GenDAGISel.inc;X86GenSubtarget.inc"/> + + From alenhar2 at cs.uiuc.edu Thu Jan 26 11:44:06 2006 From: alenhar2 at cs.uiuc.edu (Andrew Lenharth) Date: Thu, 26 Jan 2006 11:44:06 -0600 Subject: [llvm-commits] CVS: llvm/test/Regression/CodeGen/Alpha/2005-12-12-MissingFCMov.ll 2006-01-26-VaargBreak.ll Message-ID: <200601261744.LAA18373@apoc.cs.uiuc.edu> Changes in directory llvm/test/Regression/CodeGen/Alpha: 2005-12-12-MissingFCMov.ll added (r1.1) 2006-01-26-VaargBreak.ll added (r1.1) --- Log message: added a couple test cases, including the new vaarg breakage --- Diffs of the changes: (+61 -0) 2005-12-12-MissingFCMov.ll | 44 ++++++++++++++++++++++++++++++++++++++++++++ 2006-01-26-VaargBreak.ll | 17 +++++++++++++++++ 2 files changed, 61 insertions(+) Index: llvm/test/Regression/CodeGen/Alpha/2005-12-12-MissingFCMov.ll diff -c /dev/null llvm/test/Regression/CodeGen/Alpha/2005-12-12-MissingFCMov.ll:1.1 *** /dev/null Thu Jan 26 11:43:52 2006 --- llvm/test/Regression/CodeGen/Alpha/2005-12-12-MissingFCMov.ll Thu Jan 26 11:43:42 2006 *************** *** 0 **** --- 1,44 ---- + ; This shouldn't crash + ; RUN: llvm-as < %s | llc -march=alpha + + ; ModuleID = 'bugpoint-reduced-simplified.bc' + target endian = little + target pointersize = 64 + %.str_4 = external global [44 x sbyte] ; <[44 x sbyte]*> [#uses=0] + + implementation ; Functions: + + declare void %printf(int, ...) + + void %main() { + entry: + %tmp.11861 = setlt long 0, 1 ; [#uses=1] + %tmp.19466 = setlt long 0, 1 ; [#uses=1] + %tmp.21571 = setlt long 0, 1 ; [#uses=1] + %tmp.36796 = setlt long 0, 1 ; [#uses=1] + br bool %tmp.11861, label %loopexit.2, label %no_exit.2 + + no_exit.2: ; preds = %entry + ret void + + loopexit.2: ; preds = %entry + br bool %tmp.19466, label %loopexit.3, label %no_exit.3.preheader + + no_exit.3.preheader: ; preds = %loopexit.2 + ret void + + loopexit.3: ; preds = %loopexit.2 + br bool %tmp.21571, label %no_exit.6, label %no_exit.4 + + no_exit.4: ; preds = %loopexit.3 + ret void + + no_exit.6: ; preds = %no_exit.6, %loopexit.3 + %tmp.30793 = setgt long 0, 0 ; [#uses=1] + br bool %tmp.30793, label %loopexit.6, label %no_exit.6 + + loopexit.6: ; preds = %no_exit.6 + %Z.1 = select bool %tmp.36796, double 1.000000e+00, double 0x3FEFFF7CEDE74EAE ; [#uses=2] + tail call void (int, ...)* %printf( int 0, long 0, long 0, long 0, double 1.000000e+00, double 1.000000e+00, double %Z.1, double %Z.1 ) + ret void + } Index: llvm/test/Regression/CodeGen/Alpha/2006-01-26-VaargBreak.ll diff -c /dev/null llvm/test/Regression/CodeGen/Alpha/2006-01-26-VaargBreak.ll:1.1 *** /dev/null Thu Jan 26 11:44:06 2006 --- llvm/test/Regression/CodeGen/Alpha/2006-01-26-VaargBreak.ll Thu Jan 26 11:43:42 2006 *************** *** 0 **** --- 1,17 ---- + ; This shouldn't crash + ; RUN: llvm-as < %s | llc -march=alpha + + ; ModuleID = 'simp.bc' + target endian = little + target pointersize = 64 + target triple = "alphaev6-unknown-linux-gnu" + deplibs = [ "c", "crtend", "stdc++" ] + %struct.__va_list_tag = type { sbyte*, int } + + implementation ; Functions: + + uint %emit_library_call_value(int %nargs, ...) { + entry: + %tmp.223 = va_arg %struct.__va_list_tag* null, uint ; [#uses=0] + ret uint %tmp.223 + } From alenhar2 at cs.uiuc.edu Thu Jan 26 12:37:38 2006 From: alenhar2 at cs.uiuc.edu (Andrew Lenharth) Date: Thu, 26 Jan 2006 12:37:38 -0600 Subject: [llvm-commits] CVS: llvm/lib/Support/PluginLoader.cpp Message-ID: <200601261837.MAA18556@apoc.cs.uiuc.edu> Changes in directory llvm/lib/Support: PluginLoader.cpp updated: 1.15 -> 1.16 --- Log message: Remember plugins should someone like bugpoint want to know them. --- Diffs of the changes: (+15 -0) PluginLoader.cpp | 15 +++++++++++++++ 1 files changed, 15 insertions(+) Index: llvm/lib/Support/PluginLoader.cpp diff -u llvm/lib/Support/PluginLoader.cpp:1.15 llvm/lib/Support/PluginLoader.cpp:1.16 --- llvm/lib/Support/PluginLoader.cpp:1.15 Thu Apr 21 23:08:29 2005 +++ llvm/lib/Support/PluginLoader.cpp Thu Jan 26 12:36:43 2006 @@ -15,13 +15,17 @@ #include "llvm/Support/PluginLoader.h" #include "llvm/System/DynamicLibrary.h" #include +#include using namespace llvm; +std::vector plugins; + void PluginLoader::operator=(const std::string &Filename) { std::string ErrorMessage; try { sys::DynamicLibrary::LoadLibraryPermanently(Filename.c_str()); + plugins.push_back(Filename); } catch (const std::string& errmsg) { if (errmsg.empty()) { ErrorMessage = "Unknown"; @@ -33,3 +37,14 @@ std::cerr << "Error opening '" << Filename << "': " << ErrorMessage << "\n -load request ignored.\n"; } + +unsigned PluginLoader::getNumPlugins() +{ + return plugins.size(); +} + +std::string& PluginLoader::getPlugin(unsigned num) +{ + assert(num < plugins.size() && "Asking for an out of bounds plugin"); + return plugins[num]; +} From alenhar2 at cs.uiuc.edu Thu Jan 26 12:37:38 2006 From: alenhar2 at cs.uiuc.edu (Andrew Lenharth) Date: Thu, 26 Jan 2006 12:37:38 -0600 Subject: [llvm-commits] CVS: llvm/tools/bugpoint/OptimizerDriver.cpp Message-ID: <200601261837.MAA18560@apoc.cs.uiuc.edu> Changes in directory llvm/tools/bugpoint: OptimizerDriver.cpp updated: 1.36 -> 1.37 --- Log message: Pass plugins on to children when optimizing. --- Diffs of the changes: (+10 -1) OptimizerDriver.cpp | 11 ++++++++++- 1 files changed, 10 insertions(+), 1 deletion(-) Index: llvm/tools/bugpoint/OptimizerDriver.cpp diff -u llvm/tools/bugpoint/OptimizerDriver.cpp:1.36 llvm/tools/bugpoint/OptimizerDriver.cpp:1.37 --- llvm/tools/bugpoint/OptimizerDriver.cpp:1.36 Sun Jan 22 18:32:33 2006 +++ llvm/tools/bugpoint/OptimizerDriver.cpp Thu Jan 26 12:37:21 2006 @@ -30,6 +30,10 @@ #include "llvm/System/Path.h" #include "llvm/System/Program.h" #include "llvm/Config/alloca.h" + +#define DONT_GET_PLUGIN_LOADER_OPTION +#include "llvm/Support/PluginLoader.h" + #include using namespace llvm; @@ -149,13 +153,18 @@ // setup the child process' arguments const char** args = (const char**) - alloca(sizeof(const char*)*(Passes.size()+10)); + alloca(sizeof(const char*) * + (Passes.size()+10+2*PluginLoader::getNumPlugins())); int n = 0; args[n++] = ToolName.c_str(); args[n++] = "-as-child"; args[n++] = "-child-output"; args[n++] = OutputFilename.c_str(); std::vector pass_args; + for (unsigned i = 0, e = PluginLoader::getNumPlugins(); i != e; ++i) { + pass_args.push_back( std::string("-load")); + pass_args.push_back( PluginLoader::getPlugin(i)); + } for (std::vector::const_iterator I = Passes.begin(), E = Passes.end(); I != E; ++I ) pass_args.push_back( std::string("-") + (*I)->getPassArgument() ); From alenhar2 at cs.uiuc.edu Thu Jan 26 12:37:40 2006 From: alenhar2 at cs.uiuc.edu (Andrew Lenharth) Date: Thu, 26 Jan 2006 12:37:40 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/Support/PluginLoader.h Message-ID: <200601261837.MAA18564@apoc.cs.uiuc.edu> Changes in directory llvm/include/llvm/Support: PluginLoader.h updated: 1.3 -> 1.4 --- Log message: Remember plugins should someone like bugpoint want to know them. --- Diffs of the changes: (+2 -0) PluginLoader.h | 2 ++ 1 files changed, 2 insertions(+) Index: llvm/include/llvm/Support/PluginLoader.h diff -u llvm/include/llvm/Support/PluginLoader.h:1.3 llvm/include/llvm/Support/PluginLoader.h:1.4 --- llvm/include/llvm/Support/PluginLoader.h:1.3 Thu Apr 21 15:44:59 2005 +++ llvm/include/llvm/Support/PluginLoader.h Thu Jan 26 12:36:50 2006 @@ -22,6 +22,8 @@ namespace llvm { struct PluginLoader { void operator=(const std::string &Filename); + static unsigned getNumPlugins(); + static std::string& getPlugin(unsigned num); }; #ifndef DONT_GET_PLUGIN_LOADER_OPTION From evan.cheng at apple.com Thu Jan 26 13:13:57 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Thu, 26 Jan 2006 13:13:57 -0600 Subject: [llvm-commits] CVS: llvm/utils/TableGen/DAGISelEmitter.cpp Message-ID: <200601261913.NAA08501@zion.cs.uiuc.edu> Changes in directory llvm/utils/TableGen: DAGISelEmitter.cpp updated: 1.143 -> 1.144 --- Log message: Another folding problem: if a node r/w chain or flag, don't fold it if it has already been selected. The number of use check is not strong enough since a node can be replaced with newly created target node. e.g. If the original node has two uses, when it is selected for one of the uses it is replaced with another. Each node now has a single use but isel still should not fold it. --- Diffs of the changes: (+20 -5) DAGISelEmitter.cpp | 25 ++++++++++++++++++++----- 1 files changed, 20 insertions(+), 5 deletions(-) Index: llvm/utils/TableGen/DAGISelEmitter.cpp diff -u llvm/utils/TableGen/DAGISelEmitter.cpp:1.143 llvm/utils/TableGen/DAGISelEmitter.cpp:1.144 --- llvm/utils/TableGen/DAGISelEmitter.cpp:1.143 Wed Jan 25 20:13:31 2006 +++ llvm/utils/TableGen/DAGISelEmitter.cpp Thu Jan 26 13:13:45 2006 @@ -1909,7 +1909,8 @@ unsigned OpNo = 0; bool NodeHasChain = NodeHasProperty(N, SDNodeInfo::SDNPHasChain, ISE); bool HasChain = PatternHasProperty(N, SDNodeInfo::SDNPHasChain, ISE); - bool EmittedCheck = false; + bool EmittedUseCheck = false; + bool EmittedSlctedCheck = false; if (HasChain) { if (NodeHasChain) OpNo = 1; @@ -1917,7 +1918,14 @@ const SDNodeInfo &CInfo = ISE.getSDNodeInfo(N->getOperator()); OS << " if (!" << RootName << ".hasOneUse()) goto P" << PatternNo << "Fail; // Multiple uses of actual result?\n"; - EmittedCheck = true; + EmittedUseCheck = true; + // hasOneUse() check is not strong enough. If the original node has + // already been selected, it may have been replaced with another. + for (unsigned j = 0; j < CInfo.getNumResults(); j++) + OS << " if (CodeGenMap.count(" << RootName + << ".getValue(" << j << "))) goto P" + << PatternNo << "Fail; // Already selected?\n"; + EmittedSlctedCheck = true; if (NodeHasChain) OS << " if (CodeGenMap.count(" << RootName << ".getValue(" << CInfo.getNumResults() << "))) goto P" @@ -1933,15 +1941,22 @@ // FIXME: we really need to separate the concepts of flag and "glue". Those // real flag results, e.g. X86CMP output, can have multiple uses. // FIXME: If the incoming flag is optional. Then it is ok to fold it. - if (!EmittedCheck && + if (!isRoot && (PatternHasProperty(N, SDNodeInfo::SDNPInFlag, ISE) || PatternHasProperty(N, SDNodeInfo::SDNPOptInFlag, ISE) || PatternHasProperty(N, SDNodeInfo::SDNPOutFlag, ISE))) { - if (!isRoot) { - const SDNodeInfo &CInfo = ISE.getSDNodeInfo(N->getOperator()); + const SDNodeInfo &CInfo = ISE.getSDNodeInfo(N->getOperator()); + if (!EmittedUseCheck) { OS << " if (!" << RootName << ".hasOneUse()) goto P" << PatternNo << "Fail; // Multiple uses of actual result?\n"; } + if (!EmittedSlctedCheck) + // hasOneUse() check is not strong enough. If the original node has + // already been selected, it may have been replaced with another. + for (unsigned j = 0; j < CInfo.getNumResults(); j++) + OS << " if (CodeGenMap.count(" << RootName + << ".getValue(" << j << "))) goto P" + << PatternNo << "Fail; // Already selected?\n"; } for (unsigned i = 0, e = N->getNumChildren(); i != e; ++i, ++OpNo) { From alenhar2 at cs.uiuc.edu Thu Jan 26 13:39:22 2006 From: alenhar2 at cs.uiuc.edu (Andrew Lenharth) Date: Thu, 26 Jan 2006 13:39:22 -0600 Subject: [llvm-commits] CVS: llvm/lib/Support/PluginLoader.cpp Message-ID: <200601261939.NAA18664@apoc.cs.uiuc.edu> Changes in directory llvm/lib/Support: PluginLoader.cpp updated: 1.16 -> 1.17 --- Log message: dynamically allocate plugin space as needed --- Diffs of the changes: (+12 -5) PluginLoader.cpp | 17 ++++++++++++----- 1 files changed, 12 insertions(+), 5 deletions(-) Index: llvm/lib/Support/PluginLoader.cpp diff -u llvm/lib/Support/PluginLoader.cpp:1.16 llvm/lib/Support/PluginLoader.cpp:1.17 --- llvm/lib/Support/PluginLoader.cpp:1.16 Thu Jan 26 12:36:43 2006 +++ llvm/lib/Support/PluginLoader.cpp Thu Jan 26 13:38:58 2006 @@ -19,13 +19,17 @@ using namespace llvm; -std::vector plugins; +static std::vector* plugins; void PluginLoader::operator=(const std::string &Filename) { std::string ErrorMessage; + + if (!plugins) + plugins = new std::vector(); + try { sys::DynamicLibrary::LoadLibraryPermanently(Filename.c_str()); - plugins.push_back(Filename); + plugins->push_back(Filename); } catch (const std::string& errmsg) { if (errmsg.empty()) { ErrorMessage = "Unknown"; @@ -40,11 +44,14 @@ unsigned PluginLoader::getNumPlugins() { - return plugins.size(); + if(plugins) + return plugins->size(); + else + return 0; } std::string& PluginLoader::getPlugin(unsigned num) { - assert(num < plugins.size() && "Asking for an out of bounds plugin"); - return plugins[num]; + assert(plugins && num < plugins->size() && "Asking for an out of bounds plugin"); + return (*plugins)[num]; } From lattner at cs.uiuc.edu Thu Jan 26 13:55:32 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Thu, 26 Jan 2006 13:55:32 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86JITInfo.cpp Message-ID: <200601261955.NAA23646@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: X86JITInfo.cpp updated: 1.14 -> 1.15 --- Log message: Improve compatibility with VC2005, patch by Morten Ofstad! --- Diffs of the changes: (+5 -3) X86JITInfo.cpp | 8 +++++--- 1 files changed, 5 insertions(+), 3 deletions(-) Index: llvm/lib/Target/X86/X86JITInfo.cpp diff -u llvm/lib/Target/X86/X86JITInfo.cpp:1.14 llvm/lib/Target/X86/X86JITInfo.cpp:1.15 --- llvm/lib/Target/X86/X86JITInfo.cpp:1.14 Fri Jul 22 15:49:37 2005 +++ llvm/lib/Target/X86/X86JITInfo.cpp Thu Jan 26 13:55:20 2006 @@ -20,6 +20,11 @@ #include using namespace llvm; +#ifdef _MSC_VER + extern "C" void *_AddressOfReturnAddress(void); + #pragma intrinsic(_AddressOfReturnAddress) +#endif + void X86JITInfo::replaceMachineCodeForFunction(void *Old, void *New) { unsigned char *OldByte = (unsigned char *)Old; *OldByte++ = 0xE9; // Emit JMP opcode. @@ -64,9 +69,6 @@ "popl %ebp\n" "ret\n"); #else - extern "C" void *_AddressOfReturnAddress(void); - #pragma intrinsic(_AddressOfReturnAddress) - void X86CompilationCallback2(void); _declspec(naked) void X86CompilationCallback(void) { From jlaskey at apple.com Thu Jan 26 14:09:47 2006 From: jlaskey at apple.com (Jim Laskey) Date: Thu, 26 Jan 2006 14:09:47 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/ADT/UniqueVector.h Message-ID: <200601262009.OAA26527@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/ADT: UniqueVector.h updated: 1.4 -> 1.5 --- Log message: Add support to find existing entries. --- Diffs of the changes: (+20 -0) UniqueVector.h | 20 ++++++++++++++++++++ 1 files changed, 20 insertions(+) Index: llvm/include/llvm/ADT/UniqueVector.h diff -u llvm/include/llvm/ADT/UniqueVector.h:1.4 llvm/include/llvm/ADT/UniqueVector.h:1.5 --- llvm/include/llvm/ADT/UniqueVector.h:1.4 Tue Jan 17 13:21:01 2006 +++ llvm/include/llvm/ADT/UniqueVector.h Thu Jan 26 14:09:35 2006 @@ -52,6 +52,19 @@ return ID; } + /// idFor - return the ID for an existing entry. Returns 0 if the entry is + /// not found. + unsigned idFor(const T &Entry) const { + // Search for entry in the map. + typename std::map::iterator MI = Map.lower_bound(Entry); + + // See if entry exists, if so return ID. + if (MI != Map.end() && MI->first == Entry) return MI->second; + + // No luck. + return 0; + } + /// operator[] - Returns a reference to the entry with the specified ID. /// const T &operator[](unsigned ID) const { return *Vector[ID - 1]; } @@ -63,6 +76,13 @@ /// empty - Returns true if the vector is empty. /// bool empty() const { return Vector.empty(); } + + /// reset - Clears all the entries. + /// + void reset() { + Map.clear(); + Vector.resize(0, 0); + } }; } // End of namespace llvm From jlaskey at apple.com Thu Jan 26 14:22:00 2006 From: jlaskey at apple.com (Jim Laskey) Date: Thu, 26 Jan 2006 14:22:00 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp Message-ID: <200601262022.OAA30073@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/PowerPC: PPCAsmPrinter.cpp updated: 1.142 -> 1.143 --- Log message: Set up MachineDebugInfo to scan for debug information form "llvm.db"g globals. Global Variable information is now pulled from "llvm.dbg.globals" --- Diffs of the changes: (+1 -1) PPCAsmPrinter.cpp | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp diff -u llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.142 llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.143 --- llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.142 Mon Jan 23 18:49:18 2006 +++ llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp Thu Jan 26 14:21:46 2006 @@ -431,7 +431,7 @@ /// method to print assembly for each instruction. /// bool DarwinAsmPrinter::runOnMachineFunction(MachineFunction &MF) { - // FIXME - is this the earliest this can be set. + // FIXME - is this the earliest this can be set? DW.SetDebugInfo(&getAnalysis()); SetupMachineFunction(MF); From jlaskey at apple.com Thu Jan 26 14:22:00 2006 From: jlaskey at apple.com (Jim Laskey) Date: Thu, 26 Jan 2006 14:22:00 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/AsmPrinter.cpp DwarfWriter.cpp MachineDebugInfo.cpp Message-ID: <200601262022.OAA30081@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen: AsmPrinter.cpp updated: 1.39 -> 1.40 DwarfWriter.cpp updated: 1.17 -> 1.18 MachineDebugInfo.cpp updated: 1.4 -> 1.5 --- Log message: Set up MachineDebugInfo to scan for debug information form "llvm.db"g globals. Global Variable information is now pulled from "llvm.dbg.globals" --- Diffs of the changes: (+289 -16) AsmPrinter.cpp | 5 DwarfWriter.cpp | 31 ++--- MachineDebugInfo.cpp | 269 +++++++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 289 insertions(+), 16 deletions(-) Index: llvm/lib/CodeGen/AsmPrinter.cpp diff -u llvm/lib/CodeGen/AsmPrinter.cpp:1.39 llvm/lib/CodeGen/AsmPrinter.cpp:1.40 --- llvm/lib/CodeGen/AsmPrinter.cpp:1.39 Mon Jan 23 22:15:29 2006 +++ llvm/lib/CodeGen/AsmPrinter.cpp Thu Jan 26 14:21:46 2006 @@ -78,6 +78,11 @@ << "\n" << CommentString << " End of file scope inline assembly\n"; SwitchSection("", 0); // Reset back to no section. + + if (MachineDebugInfo *DebugInfo = getAnalysisToUpdate()) { + DebugInfo->AnalyzeModule(M); + } + return false; } Index: llvm/lib/CodeGen/DwarfWriter.cpp diff -u llvm/lib/CodeGen/DwarfWriter.cpp:1.17 llvm/lib/CodeGen/DwarfWriter.cpp:1.18 --- llvm/lib/CodeGen/DwarfWriter.cpp:1.17 Wed Jan 25 11:18:50 2006 +++ llvm/lib/CodeGen/DwarfWriter.cpp Thu Jan 26 14:21:46 2006 @@ -18,6 +18,7 @@ #include "llvm/Type.h" #include "llvm/CodeGen/AsmPrinter.h" #include "llvm/CodeGen/MachineDebugInfo.h" +#include "llvm/Support/Dwarf.h" #include "llvm/Support/CommandLine.h" #include "llvm/Support/Mangler.h" #include "llvm/Target/TargetMachine.h" @@ -1719,28 +1720,26 @@ /// variables. void DwarfWriter::ConstructGlobalDIEs(Module &M) { const TargetData &TD = Asm->TM.getTargetData(); - - // Iterate throu each of the globals. - for (Module::const_global_iterator GI = M.global_begin(), GE = M.global_end(); - GI != GE; ++GI) { - if (!GI->hasInitializer()) continue; // External global require no code - - // Check to see if this is a special global used by LLVM, if so, emit it. - if (GI->hasAppendingLinkage() && (GI->getName() == "llvm.global_ctors" || - GI->getName() == "llvm.global_dtors")) - continue; + + std::vector GlobalVariables = DebugInfo->getGlobalVariables(M); + + for (unsigned i = 0, N = GlobalVariables.size(); i < N; ++i) { + GlobalWrapper &GW = GlobalVariables[i]; + GlobalVariable *GV = GW.getGlobalVariable(); - std::string Name = Asm->Mang->getValueName(GI); - Constant *C = GI->getInitializer(); + if (!GV->hasInitializer()) continue; // External global require no code + + // FIXME - Use global info type information when available. + std::string Name = Asm->Mang->getValueName(GV); + Constant *C = GV->getInitializer(); const Type *Ty = C->getType(); unsigned Size = TD.getTypeSize(Ty); unsigned Align = TD.getTypeAlignmentShift(Ty); if (C->isNullValue() && /* FIXME: Verify correct */ - (GI->hasInternalLinkage() || GI->hasWeakLinkage() || - GI->hasLinkOnceLinkage())) { + (GV->hasInternalLinkage() || GV->hasWeakLinkage() || + GV->hasLinkOnceLinkage())) { if (Size == 0) Size = 1; // .comm Foo, 0 is undefined, avoid it. - } /// FIXME - Get correct compile unit context. @@ -1748,7 +1747,7 @@ DWContext *Context = CompileUnits[0]->getContext(); /// Create new global. - NewGlobalVariable(Context, GI->getName(), Name, Ty, Size, Align); + NewGlobalVariable(Context, GV->getName(), Name, Ty, Size, Align); } } Index: llvm/lib/CodeGen/MachineDebugInfo.cpp diff -u llvm/lib/CodeGen/MachineDebugInfo.cpp:1.4 llvm/lib/CodeGen/MachineDebugInfo.cpp:1.5 --- llvm/lib/CodeGen/MachineDebugInfo.cpp:1.4 Tue Jan 17 11:31:53 2006 +++ llvm/lib/CodeGen/MachineDebugInfo.cpp Thu Jan 26 14:21:46 2006 @@ -9,6 +9,13 @@ #include "llvm/CodeGen/MachineDebugInfo.h" +#include "llvm/Constants.h" +#include "llvm/DerivedTypes.h" +#include "llvm/Intrinsics.h" +#include "llvm/Instructions.h" +#include "llvm/Module.h" +#include "llvm/Support/Dwarf.h" + using namespace llvm; // Handle the Pass registration stuff necessary to use TargetData's. @@ -16,8 +23,220 @@ RegisterPass X("machinedebuginfo", "Debug Information"); } +//===----------------------------------------------------------------------===// + +/// getGlobalVariablesUsing - Return all of the global variables which have the +/// specified value in their initializer somewhere. +static void +getGlobalVariablesUsing(Value *V, std::vector &Result) { + // Scan though value users. + for (Value::use_iterator I = V->use_begin(), E = V->use_end(); I != E; ++I) { + if (GlobalVariable *GV = dyn_cast(*I)) { + // If the user is a global variable then add to result. + Result.push_back(GV); + } else if (Constant *C = dyn_cast(*I)) { + // If the user is a constant variable then scan its users + getGlobalVariablesUsing(C, Result); + } + } +} + +/// getGlobalVariablesUsing - Return all of the global variables that use the +/// named global variable. +static std::vector +getGlobalVariablesUsing(Module &M, const std::string &RootName) { + std::vector Result; // Global variables matching criteria. + + // Get the global variable root. + GlobalVariable *UseRoot = M.getGlobalVariable(RootName, + StructType::get(std::vector())); + + // If present and linkonce then scan for users. + if (UseRoot && UseRoot->hasLinkOnceLinkage()) { + getGlobalVariablesUsing(UseRoot, Result); + } + + return Result; +} + +/// getStringValue - Turn an LLVM constant pointer that eventually points to a +/// global into a string value. Return an empty string if we can't do it. +/// +const static std::string getStringValue(Value *V, unsigned Offset = 0) { + if (GlobalVariable *GV = dyn_cast(V)) { + if (GV->hasInitializer() && isa(GV->getInitializer())) { + ConstantArray *Init = cast(GV->getInitializer()); + if (Init->isString()) { + std::string Result = Init->getAsString(); + if (Offset < Result.size()) { + // If we are pointing INTO The string, erase the beginning... + Result.erase(Result.begin(), Result.begin()+Offset); + + // Take off the null terminator, and any string fragments after it. + std::string::size_type NullPos = Result.find_first_of((char)0); + if (NullPos != std::string::npos) + Result.erase(Result.begin()+NullPos, Result.end()); + return Result; + } + } + } + } else if (Constant *C = dyn_cast(V)) { + if (GlobalValue *GV = dyn_cast(C)) + return getStringValue(GV, Offset); + else if (ConstantExpr *CE = dyn_cast(C)) { + if (CE->getOpcode() == Instruction::GetElementPtr) { + // Turn a gep into the specified offset. + if (CE->getNumOperands() == 3 && + cast(CE->getOperand(1))->isNullValue() && + isa(CE->getOperand(2))) { + return getStringValue(CE->getOperand(0), + Offset+cast(CE->getOperand(2))->getRawValue()); + } + } + } + } + return ""; +} + +//===----------------------------------------------------------------------===// + +DebugInfoWrapper::DebugInfoWrapper(GlobalVariable *G) +: GV(G) +, IC(dyn_cast(GV->getInitializer())) { + assert(IC && "llvm.db.global is missing structured constant"); +} + +//===----------------------------------------------------------------------===// + +CompileUnitWrapper::CompileUnitWrapper(GlobalVariable *G) +: DebugInfoWrapper(G) +{ + // FIXME - should probably ease up on the number of operands (version.) + assert(IC->getNumOperands() == 7 && + "Compile unit does not have correct number of operands"); +} + +/// getTag - Return the compile unit's tag number. Currently should be +/// DW_TAG_variable. +unsigned CompileUnitWrapper::getTag() const { + ConstantUInt *CI = dyn_cast(IC->getOperand(0)); + assert(CI && "Compile unit tag not an unsigned integer"); + return CI->getValue(); +} + +/// isCorrectDebugVersion - Return true if is the correct llvm debug version. +/// Currently the value is 0 (zero.) If the value is is not correct then +/// ignore all debug information. +bool CompileUnitWrapper::isCorrectDebugVersion() const { + ConstantUInt *CI = dyn_cast(IC->getOperand(1)); + assert(CI && "Compile unit debug version not an unsigned integer"); + return CI->getValue() == 0; +} + +/// getLanguage - Return the compile unit's language number (ex. DW_LANG_C89.) +/// +unsigned CompileUnitWrapper::getLanguage() const { + ConstantUInt *CI = dyn_cast(IC->getOperand(2)); + assert(CI && "Compile unit language number not an unsigned integer"); + return CI->getValue(); +} + +/// getFileName - Return the compile unit's file name. +/// +const std::string CompileUnitWrapper::getFileName() const { + return getStringValue(IC->getOperand(3)); +} + +/// getDirectory - Return the compile unit's file directory. +/// +const std::string CompileUnitWrapper::getDirectory() const { + return getStringValue(IC->getOperand(4)); +} +/// getProducer - Return the compile unit's generator name. +/// +const std::string CompileUnitWrapper::getProducer() const { + return getStringValue(IC->getOperand(5)); +} + //===----------------------------------------------------------------------===// + +GlobalWrapper::GlobalWrapper(GlobalVariable *G) +: DebugInfoWrapper(G) +{ + // FIXME - should probably ease up on the number of operands (version.) + assert(IC->getNumOperands() == 8 && + "Global does not have correct number of operands"); +} + +/// getTag - Return the global's tag number. Currently should be +/// DW_TAG_variable or DW_TAG_subprogram. +unsigned GlobalWrapper::getTag() const { + ConstantUInt *CI = dyn_cast(IC->getOperand(0)); + assert(CI && "Global tag not an unsigned integer"); + return CI->getValue(); +} + +/// getContext - Return the "lldb.compile_unit" context global. +/// +GlobalVariable *GlobalWrapper::getContext() const { + return dyn_cast(IC->getOperand(1)); +} + +/// getName - Return the name of the global. +/// +const std::string GlobalWrapper::getName() const { + return getStringValue(IC->getOperand(2)); +} + +/// getType - Return the type of the global. +/// +const GlobalVariable *GlobalWrapper::getType() const { + return dyn_cast(IC->getOperand(4)); +} + +/// isStatic - Return true if the global is static. +/// +bool GlobalWrapper::isStatic() const { + ConstantBool *CB = dyn_cast(IC->getOperand(5)); + assert(CB && "Global static flag is not boolean"); + return CB->getValue(); +} + +/// isDefinition - Return true if the global is a definition. +/// +bool GlobalWrapper::isDefinition() const { + ConstantBool *CB = dyn_cast(IC->getOperand(6)); + assert(CB && "Global definition flag is not boolean"); + return CB->getValue(); +} + +/// getGlobalVariable - Return the global variable (tag == DW_TAG_variable.) +/// +GlobalVariable *GlobalWrapper::getGlobalVariable() const { + ConstantExpr *CE = dyn_cast(IC->getOperand(7)); + assert(CE && CE->getOpcode() == Instruction::Cast && + "Global location is not a cast of GlobalVariable"); + GlobalVariable *GV = dyn_cast(CE->getOperand(0)); + assert(GV && "Global location is not a cast of GlobalVariable"); + return GV; +} + +//===----------------------------------------------------------------------===// + + +MachineDebugInfo::MachineDebugInfo() +: CompileUnits() +, Directories() +, SourceFiles() +, Lines() +{ + +} +MachineDebugInfo::~MachineDebugInfo() { + +} + /// doInitialization - Initialize the debug state for a new module. /// bool MachineDebugInfo::doInitialization() { @@ -29,3 +248,53 @@ bool MachineDebugInfo::doFinalization() { return false; } + +/// AnalyzeModule - Scan the module for global debug information. +/// +void MachineDebugInfo::AnalyzeModule(Module &M) { + SetupCompileUnits(M); +} + +/// SetupCompileUnits - Set up the unique vector of compile units. +/// +void MachineDebugInfo::SetupCompileUnits(Module &M) { + // Get vector of all debug compile units. + std::vector Globals = + getGlobalVariablesUsing(M, "llvm.dbg.translation_units"); + + // Scan all compile unit globals. + for (unsigned i = 0, N = Globals.size(); i < N; ++i) { + // Create wrapper for compile unit. + CompileUnitWrapper CUI(Globals[i]); + // Add to result. + if (CUI.isCorrectDebugVersion()) CompileUnits.insert(CUI); + } + + // If there any bad compile units then suppress debug information + if (CompileUnits.size() != Globals.size()) CompileUnits.reset(); +} + +/// getGlobalVariables - Return a vector of debug global variables. +/// +std::vector MachineDebugInfo::getGlobalVariables(Module &M) { + // Get vector of all debug global objects. + std::vector Globals = + getGlobalVariablesUsing(M, "llvm.dbg.globals"); + + // Accumulation of global variables. + std::vector GlobalVariables; + +// FIXME - skip until globals have new format +#if 0 + // Scan all globals. + for (unsigned i = 0, N = Globals.size(); i < N; ++i) { + // Create wrapper for global. + GlobalWrapper GW(Globals[i]); + // If the global is a variable then add to result. + if (GW.getTag() == DW_TAG_variable) GlobalVariables.push_back(GW); + } +#endif + + return GlobalVariables; +} + From jlaskey at apple.com Thu Jan 26 14:22:00 2006 From: jlaskey at apple.com (Jim Laskey) Date: Thu, 26 Jan 2006 14:22:00 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/DwarfWriter.h MachineDebugInfo.h Message-ID: <200601262022.OAA30071@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/CodeGen: DwarfWriter.h updated: 1.16 -> 1.17 MachineDebugInfo.h updated: 1.6 -> 1.7 --- Log message: Set up MachineDebugInfo to scan for debug information form "llvm.db"g globals. Global Variable information is now pulled from "llvm.dbg.globals" --- Diffs of the changes: (+128 -421) DwarfWriter.h | 409 ----------------------------------------------------- MachineDebugInfo.h | 140 ++++++++++++++++-- 2 files changed, 128 insertions(+), 421 deletions(-) Index: llvm/include/llvm/CodeGen/DwarfWriter.h diff -u llvm/include/llvm/CodeGen/DwarfWriter.h:1.16 llvm/include/llvm/CodeGen/DwarfWriter.h:1.17 --- llvm/include/llvm/CodeGen/DwarfWriter.h:1.16 Mon Jan 23 18:49:18 2006 +++ llvm/include/llvm/CodeGen/DwarfWriter.h Thu Jan 26 14:21:46 2006 @@ -27,415 +27,6 @@ namespace llvm { - - //===--------------------------------------------------------------------===// - // Dwarf constants as gleaned from the DWARF Debugging Information Format V.3 - // reference manual http://dwarf.freestandards.org . - // - enum dwarf_constants { - DWARF_VERSION = 2, - - // Tags - DW_TAG_array_type = 0x01, - DW_TAG_class_type = 0x02, - DW_TAG_entry_point = 0x03, - DW_TAG_enumeration_type = 0x04, - DW_TAG_formal_parameter = 0x05, - DW_TAG_imported_declaration = 0x08, - DW_TAG_label = 0x0a, - DW_TAG_lexical_block = 0x0b, - DW_TAG_member = 0x0d, - DW_TAG_pointer_type = 0x0f, - DW_TAG_reference_type = 0x10, - DW_TAG_compile_unit = 0x11, - DW_TAG_string_type = 0x12, - DW_TAG_structure_type = 0x13, - DW_TAG_subroutine_type = 0x15, - DW_TAG_typedef = 0x16, - DW_TAG_union_type = 0x17, - DW_TAG_unspecified_parameters = 0x18, - DW_TAG_variant = 0x19, - DW_TAG_common_block = 0x1a, - DW_TAG_common_inclusion = 0x1b, - DW_TAG_inheritance = 0x1c, - DW_TAG_inlined_subroutine = 0x1d, - DW_TAG_module = 0x1e, - DW_TAG_ptr_to_member_type = 0x1f, - DW_TAG_set_type = 0x20, - DW_TAG_subrange_type = 0x21, - DW_TAG_with_stmt = 0x22, - DW_TAG_access_declaration = 0x23, - DW_TAG_base_type = 0x24, - DW_TAG_catch_block = 0x25, - DW_TAG_const_type = 0x26, - DW_TAG_constant = 0x27, - DW_TAG_enumerator = 0x28, - DW_TAG_file_type = 0x29, - DW_TAG_friend = 0x2a, - DW_TAG_namelist = 0x2b, - DW_TAG_namelist_item = 0x2c, - DW_TAG_packed_type = 0x2d, - DW_TAG_subprogram = 0x2e, - DW_TAG_template_type_parameter = 0x2f, - DW_TAG_template_value_parameter = 0x30, - DW_TAG_thrown_type = 0x31, - DW_TAG_try_block = 0x32, - DW_TAG_variant_part = 0x33, - DW_TAG_variable = 0x34, - DW_TAG_volatile_type = 0x35, - DW_TAG_dwarf_procedure = 0x36, - DW_TAG_restrict_type = 0x37, - DW_TAG_interface_type = 0x38, - DW_TAG_namespace = 0x39, - DW_TAG_imported_module = 0x3a, - DW_TAG_unspecified_type = 0x3b, - DW_TAG_partial_unit = 0x3c, - DW_TAG_imported_unit = 0x3d, - DW_TAG_condition = 0x3f, - DW_TAG_shared_type = 0x40, - DW_TAG_lo_user = 0x4080, - DW_TAG_hi_user = 0xffff, - - // Children flag - DW_CHILDREN_no = 0x00, - DW_CHILDREN_yes = 0x01, - - // Attributes - DW_AT_sibling = 0x01, - DW_AT_location = 0x02, - DW_AT_name = 0x03, - DW_AT_ordering = 0x09, - DW_AT_byte_size = 0x0b, - DW_AT_bit_offset = 0x0c, - DW_AT_bit_size = 0x0d, - DW_AT_stmt_list = 0x10, - DW_AT_low_pc = 0x11, - DW_AT_high_pc = 0x12, - DW_AT_language = 0x13, - DW_AT_discr = 0x15, - DW_AT_discr_value = 0x16, - DW_AT_visibility = 0x17, - DW_AT_import = 0x18, - DW_AT_string_length = 0x19, - DW_AT_common_reference = 0x1a, - DW_AT_comp_dir = 0x1b, - DW_AT_const_value = 0x1c, - DW_AT_containing_type = 0x1d, - DW_AT_default_value = 0x1e, - DW_AT_inline = 0x20, - DW_AT_is_optional = 0x21, - DW_AT_lower_bound = 0x22, - DW_AT_producer = 0x25, - DW_AT_prototyped = 0x27, - DW_AT_return_addr = 0x2a, - DW_AT_start_scope = 0x2c, - DW_AT_bit_stride = 0x2e, - DW_AT_upper_bound = 0x2f, - DW_AT_abstract_origin = 0x31, - DW_AT_accessibility = 0x32, - DW_AT_address_class = 0x33, - DW_AT_artificial = 0x34, - DW_AT_base_types = 0x35, - DW_AT_calling_convention = 0x36, - DW_AT_count = 0x37, - DW_AT_data_member_location = 0x38, - DW_AT_decl_column = 0x39, - DW_AT_decl_file = 0x3a, - DW_AT_decl_line = 0x3b, - DW_AT_declaration = 0x3c, - DW_AT_discr_list = 0x3d, - DW_AT_encoding = 0x3e, - DW_AT_external = 0x3f, - DW_AT_frame_base = 0x40, - DW_AT_friend = 0x41, - DW_AT_identifier_case = 0x42, - DW_AT_macro_info = 0x43, - DW_AT_namelist_item = 0x44, - DW_AT_priority = 0x45, - DW_AT_segment = 0x46, - DW_AT_specification = 0x47, - DW_AT_static_link = 0x48, - DW_AT_type = 0x49, - DW_AT_use_location = 0x4a, - DW_AT_variable_parameter = 0x4b, - DW_AT_virtuality = 0x4c, - DW_AT_vtable_elem_location = 0x4d, - DW_AT_allocated = 0x4e, - DW_AT_associated = 0x4f, - DW_AT_data_location = 0x50, - DW_AT_byte_stride = 0x51, - DW_AT_entry_pc = 0x52, - DW_AT_use_UTF8 = 0x53, - DW_AT_extension = 0x54, - DW_AT_ranges = 0x55, - DW_AT_trampoline = 0x56, - DW_AT_call_column = 0x57, - DW_AT_call_file = 0x58, - DW_AT_call_line = 0x59, - DW_AT_description = 0x5a, - DW_AT_binary_scale = 0x5b, - DW_AT_decimal_scale = 0x5c, - DW_AT_small = 0x5d, - DW_AT_decimal_sign = 0x5e, - DW_AT_digit_count = 0x5f, - DW_AT_picture_string = 0x60, - DW_AT_mutable = 0x61, - DW_AT_threads_scaled = 0x62, - DW_AT_explicit = 0x63, - DW_AT_object_pointer = 0x64, - DW_AT_endianity = 0x65, - DW_AT_elemental = 0x66, - DW_AT_pure = 0x67, - DW_AT_recursive = 0x68, - DW_AT_lo_user = 0x2000, - DW_AT_hi_user = 0x3fff, - - // Attribute form encodings - DW_FORM_addr = 0x01, - DW_FORM_block2 = 0x03, - DW_FORM_block4 = 0x04, - DW_FORM_data2 = 0x05, - DW_FORM_data4 = 0x06, - DW_FORM_data8 = 0x07, - DW_FORM_string = 0x08, - DW_FORM_block = 0x09, - DW_FORM_block1 = 0x0a, - DW_FORM_data1 = 0x0b, - DW_FORM_flag = 0x0c, - DW_FORM_sdata = 0x0d, - DW_FORM_strp = 0x0e, - DW_FORM_udata = 0x0f, - DW_FORM_ref_addr = 0x10, - DW_FORM_ref1 = 0x11, - DW_FORM_ref2 = 0x12, - DW_FORM_ref4 = 0x13, - DW_FORM_ref8 = 0x14, - DW_FORM_ref_udata = 0x15, - DW_FORM_indirect = 0x16, - - // Operation encodings - DW_OP_addr = 0x03, - DW_OP_deref = 0x06, - DW_OP_const1u = 0x08, - DW_OP_const1s = 0x09, - DW_OP_const2u = 0x0a, - DW_OP_const2s = 0x0b, - DW_OP_const4u = 0x0c, - DW_OP_const4s = 0x0d, - DW_OP_const8u = 0x0e, - DW_OP_const8s = 0x0f, - DW_OP_constu = 0x10, - DW_OP_consts = 0x11, - DW_OP_dup = 0x12, - DW_OP_drop = 0x13, - DW_OP_over = 0x14, - DW_OP_pick = 0x15, - DW_OP_swap = 0x16, - DW_OP_rot = 0x17, - DW_OP_xderef = 0x18, - DW_OP_abs = 0x19, - DW_OP_and = 0x1a, - DW_OP_div = 0x1b, - DW_OP_minus = 0x1c, - DW_OP_mod = 0x1d, - DW_OP_mul = 0x1e, - DW_OP_neg = 0x1f, - DW_OP_not = 0x20, - DW_OP_or = 0x21, - DW_OP_plus = 0x22, - DW_OP_plus_uconst = 0x23, - DW_OP_shl = 0x24, - DW_OP_shr = 0x25, - DW_OP_shra = 0x26, - DW_OP_xor = 0x27, - DW_OP_skip = 0x2f, - DW_OP_bra = 0x28, - DW_OP_eq = 0x29, - DW_OP_ge = 0x2a, - DW_OP_gt = 0x2b, - DW_OP_le = 0x2c, - DW_OP_lt = 0x2d, - DW_OP_ne = 0x2e, - DW_OP_lit0 = 0x30, - DW_OP_lit1 = 0x31, - DW_OP_lit31 = 0x4f, - DW_OP_reg0 = 0x50, - DW_OP_reg1 = 0x51, - DW_OP_reg31 = 0x6f, - DW_OP_breg0 = 0x70, - DW_OP_breg1 = 0x71, - DW_OP_breg31 = 0x8f, - DW_OP_regx = 0x90, - DW_OP_fbreg = 0x91, - DW_OP_bregx = 0x92, - DW_OP_piece = 0x93, - DW_OP_deref_size = 0x94, - DW_OP_xderef_size = 0x95, - DW_OP_nop = 0x96, - DW_OP_push_object_address = 0x97, - DW_OP_call2 = 0x98, - DW_OP_call4 = 0x99, - DW_OP_call_ref = 0x9a, - DW_OP_form_tls_address = 0x9b, - DW_OP_call_frame_cfa = 0x9c, - DW_OP_lo_user = 0xe0, - DW_OP_hi_user = 0xff, - - // Encoding attribute values - DW_ATE_address = 0x01, - DW_ATE_boolean = 0x02, - DW_ATE_complex_float = 0x03, - DW_ATE_float = 0x04, - DW_ATE_signed = 0x05, - DW_ATE_signed_char = 0x06, - DW_ATE_unsigned = 0x07, - DW_ATE_unsigned_char = 0x08, - DW_ATE_imaginary_float = 0x09, - DW_ATE_packed_decimal = 0x0a, - DW_ATE_numeric_string = 0x0b, - DW_ATE_edited = 0x0c, - DW_ATE_signed_fixed = 0x0d, - DW_ATE_unsigned_fixed = 0x0e, - DW_ATE_decimal_float = 0x0f, - DW_ATE_lo_user = 0x80, - DW_ATE_hi_user = 0xff, - - // Decimal sign attribute values - DW_DS_unsigned = 0x01, - DW_DS_leading_overpunch = 0x02, - DW_DS_trailing_overpunch = 0x03, - DW_DS_leading_separate = 0x04, - DW_DS_trailing_separate = 0x05, - - // Endianity attribute values - DW_END_default = 0x00, - DW_END_big = 0x01, - DW_END_little = 0x02, - DW_END_lo_user = 0x40, - DW_END_hi_user = 0xff, - - // Accessibility codes - DW_ACCESS_public = 0x01, - DW_ACCESS_protected = 0x02, - DW_ACCESS_private = 0x03, - - // Visibility codes - DW_VIS_local = 0x01, - DW_VIS_exported = 0x02, - DW_VIS_qualified = 0x03, - - // Virtuality codes - DW_VIRTUALITY_none = 0x00, - DW_VIRTUALITY_virtual = 0x01, - DW_VIRTUALITY_pure_virtual = 0x02, - - // Language names - DW_LANG_C89 = 0x0001, - DW_LANG_C = 0x0002, - DW_LANG_Ada83 = 0x0003, - DW_LANG_C_plus_plus = 0x0004, - DW_LANG_Cobol74 = 0x0005, - DW_LANG_Cobol85 = 0x0006, - DW_LANG_Fortran77 = 0x0007, - DW_LANG_Fortran90 = 0x0008, - DW_LANG_Pascal83 = 0x0009, - DW_LANG_Modula2 = 0x000a, - DW_LANG_Java = 0x000b, - DW_LANG_C99 = 0x000c, - DW_LANG_Ada95 = 0x000d, - DW_LANG_Fortran95 = 0x000e, - DW_LANG_PLI = 0x000f, - DW_LANG_ObjC = 0x0010, - DW_LANG_ObjC_plus_plus = 0x0011, - DW_LANG_UPC = 0x0012, - DW_LANG_D = 0x0013, - DW_LANG_lo_user = 0x8000, - DW_LANG_hi_user = 0xffff, - - // Identifier case codes - DW_ID_case_sensitive = 0x00, - DW_ID_up_case = 0x01, - DW_ID_down_case = 0x02, - DW_ID_case_insensitive = 0x03, - - // Calling convention codes - DW_CC_normal = 0x01, - DW_CC_program = 0x02, - DW_CC_nocall = 0x03, - DW_CC_lo_user = 0x40, - DW_CC_hi_user = 0xff, - - // Inline codes - DW_INL_not_inlined = 0x00, - DW_INL_inlined = 0x01, - DW_INL_declared_not_inlined = 0x02, - DW_INL_declared_inlined = 0x03, - - // Array ordering - DW_ORD_row_major = 0x00, - DW_ORD_col_major = 0x01, - - // Discriminant descriptor values - DW_DSC_label = 0x00, - DW_DSC_range = 0x01, - - // Line Number Standard Opcode Encodings - DW_LNS_copy = 0x01, - DW_LNS_advance_pc = 0x02, - DW_LNS_advance_line = 0x03, - DW_LNS_set_file = 0x04, - DW_LNS_set_column = 0x05, - DW_LNS_negate_stmt = 0x06, - DW_LNS_set_basic_block = 0x07, - DW_LNS_const_add_pc = 0x08, - DW_LNS_fixed_advance_pc = 0x09, - DW_LNS_set_prologue_end = 0x0a, - DW_LNS_set_epilogue_begin = 0x0b, - DW_LNS_set_isa = 0x0c, - - // Line Number Extended Opcode Encodings - DW_LNE_end_sequence = 0x01, - DW_LNE_set_address = 0x02, - DW_LNE_define_file = 0x03, - DW_LNE_lo_user = 0x80, - DW_LNE_hi_user = 0xff, - - // Macinfo Type Encodings - DW_MACINFO_define = 0x01, - DW_MACINFO_undef = 0x02, - DW_MACINFO_start_file = 0x03, - DW_MACINFO_end_file = 0x04, - DW_MACINFO_vendor_ext = 0xff, - - // Call frame instruction encodings - DW_CFA_advance_loc = 0x40, - DW_CFA_offset = 0x80, - DW_CFA_restore = 0xc0, - DW_CFA_set_loc = 0x01, - DW_CFA_advance_loc1 = 0x02, - DW_CFA_advance_loc2 = 0x03, - DW_CFA_advance_loc4 = 0x04, - DW_CFA_offset_extended = 0x05, - DW_CFA_restore_extended = 0x06, - DW_CFA_undefined = 0x07, - DW_CFA_same_value = 0x08, - DW_CFA_register = 0x09, - DW_CFA_remember_state = 0x0a, - DW_CFA_restore_state = 0x0b, - DW_CFA_def_cfa = 0x0c, - DW_CFA_def_cfa_register = 0x0d, - DW_CFA_def_cfa_offset = 0x0e, - DW_CFA_def_cfa_expression = 0x0f, - DW_CFA_expression = 0x10, - DW_CFA_offset_extended_sf = 0x11, - DW_CFA_def_cfa_sf = 0x12, - DW_CFA_def_cfa_offset_sf = 0x13, - DW_CFA_val_offset = 0x14, - DW_CFA_val_offset_sf = 0x15, - DW_CFA_val_expression = 0x16, - DW_CFA_lo_user = 0x1c, - DW_CFA_hi_user = 0x3f - }; //===--------------------------------------------------------------------===// // Forward declarations. Index: llvm/include/llvm/CodeGen/MachineDebugInfo.h diff -u llvm/include/llvm/CodeGen/MachineDebugInfo.h:1.6 llvm/include/llvm/CodeGen/MachineDebugInfo.h:1.7 --- llvm/include/llvm/CodeGen/MachineDebugInfo.h:1.6 Tue Jan 17 11:31:53 2006 +++ llvm/include/llvm/CodeGen/MachineDebugInfo.h Thu Jan 26 14:21:46 2006 @@ -39,6 +39,113 @@ namespace llvm { +// Forward declarations. +class ConstantStruct; +class GlobalVariable; +class Module; + +//===----------------------------------------------------------------------===// +/// DebugInfoWrapper - This class is the base class for debug info wrappers. +/// +class DebugInfoWrapper { +protected: + GlobalVariable *GV; // "llvm.db" global + ConstantStruct *IC; // Initializer constant. + +public: + DebugInfoWrapper(GlobalVariable *G); + + /// getGlobal - Return the "llvm.db" global. + /// + GlobalVariable *getGlobal() const { return GV; } + + /// operator== - Used by Uniquevector to locate entry. + /// + bool operator==(const DebugInfoWrapper &DI) const { return IC == DI.IC; } + + /// operator< - Used by Uniquevector to locate entry. + /// + bool operator<(const DebugInfoWrapper &DI) const { return IC < DI.IC; } +}; + + +//===----------------------------------------------------------------------===// +/// CompileUnitWrapper - This class wraps a "lldb.compile_unit" global to +/// provide easy access to its attributes. +class CompileUnitWrapper : public DebugInfoWrapper { +public: + CompileUnitWrapper(GlobalVariable *G); + + /// getGlobal - Return the "lldb.compile_unit" global. + /// + GlobalVariable *getGlobal() const { return GV; } + + /// getTag - Return the compile unit's tag number. Currently DW_TAG_variable, + /// DW_TAG_subprogram or DW_TAG_compile_unit. + unsigned getTag() const; + + /// isCorrectDebugVersion - Return true if is the correct llvm debug version. + /// Currently the value is 0 (zero.) If the value is is not correct then + /// ignore all debug information. + bool isCorrectDebugVersion() const; + + /// getLanguage - Return the compile unit's language number (ex. DW_LANG_C89.) + /// + unsigned getLanguage() const; + + /// getFileName - Return the compile unit's file name. + /// + const std::string getFileName() const; + + /// getDirectory - Return the compile unit's file directory. + /// + const std::string getDirectory() const; + + /// getProducer - Return the compile unit's generator name. + /// + const std::string getProducer() const; +}; + +//===----------------------------------------------------------------------===// +/// GlobalWrapper - This class wraps a "lldb.global" global to provide easy +/// access to its attributes. +class GlobalWrapper : public DebugInfoWrapper { +public: + GlobalWrapper(GlobalVariable *G); + + /// getGlobal - Return the "lldb.global" global. + /// + GlobalVariable *getGlobal() const { return GV; } + + /// getContext - Return the "lldb.compile_unit" context global. + /// + GlobalVariable *getContext() const; + + /// getTag - Return the global's tag number. Currently should be + /// DW_TAG_variable or DW_TAG_subprogram. + unsigned getTag() const; + + /// getName - Return the name of the global. + /// + const std::string getName() const; + + /// getType - Return the type of the global. + /// + const GlobalVariable *getType() const; + + /// isStatic - Return true if the global is static. + /// + bool isStatic() const; + + /// isDefinition - Return true if the global is a definition. + /// + bool isDefinition() const; + + /// getGlobalVariable - Return the global variable (tag == DW_TAG_variable.) + /// + GlobalVariable *getGlobalVariable() const; +}; + //===----------------------------------------------------------------------===// /// SourceLineInfo - This class is used to record source line correspondence. /// @@ -94,36 +201,37 @@ /// class MachineDebugInfo : public ImmutablePass { private: - // DirectoryMap - UniqueVector for directories. + // CompileUnits - Uniquing vector for compile units. + UniqueVector CompileUnits; + + // Directories - Uniquing vector for directories. UniqueVector Directories; - // SourceMap - UniqueVector for source files. + // SourceFiles - Uniquing vector for source files. UniqueVector SourceFiles; // Lines - List of of source line correspondence. std::vector Lines; public: - MachineDebugInfo() - : Directories() - , SourceFiles() - , Lines() - {} - ~MachineDebugInfo() { } + MachineDebugInfo(); + ~MachineDebugInfo(); /// doInitialization - Initialize the debug state for a new module. /// bool doInitialization(); - /// doFinalization - Tear down the debug state after completion of a module. /// bool doFinalization(); - /// hasInfo - Returns true if debug info is present. + /// AnalyzeModule - Scan the module for global debug information. + /// + void AnalyzeModule(Module &M); + + /// hasInfo - Returns true if valid debug info is present. /// - // FIXME - need proper scheme to suppress debug output. - bool hasInfo() const { return !SourceFiles.empty(); } + bool hasInfo() const { return !CompileUnits.empty(); } /// RecordLabel - Records location information and associates it with a /// debug label. Returns a unique label ID used to generate a label and @@ -159,6 +267,14 @@ return Lines; } + /// SetupCompileUnits - Set up the unique vector of compile units. + /// + void MachineDebugInfo::SetupCompileUnits(Module &M); + + /// getGlobalVariables - Return a vector of debug global variables. + /// + static std::vector getGlobalVariables(Module &M); + }; // End class MachineDebugInfo } // End llvm namespace From lattner at cs.uiuc.edu Thu Jan 26 14:27:45 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Thu, 26 Jan 2006 14:27:45 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/Target/TargetLowering.h Message-ID: <200601262027.OAA32545@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/Target: TargetLowering.h updated: 1.36 -> 1.37 --- Log message: Add a method for inline asm support. --- Diffs of the changes: (+11 -0) TargetLowering.h | 11 +++++++++++ 1 files changed, 11 insertions(+) Index: llvm/include/llvm/Target/TargetLowering.h diff -u llvm/include/llvm/Target/TargetLowering.h:1.36 llvm/include/llvm/Target/TargetLowering.h:1.37 --- llvm/include/llvm/Target/TargetLowering.h:1.36 Wed Jan 25 12:21:52 2006 +++ llvm/include/llvm/Target/TargetLowering.h Thu Jan 26 14:27:33 2006 @@ -391,6 +391,17 @@ uint64_t Mask) const; //===--------------------------------------------------------------------===// + // Inline Asm Support hooks + // + + /// getRegForInlineAsmConstraint - Given a constraint letter or register + /// name (e.g. "r" or "edx"), return a list of registers that can be used to + /// satisfy the constraint. If the constraint isn't supported, or isn't a + /// register constraint, return an empty list. + virtual std::vector + getRegForInlineAsmConstraint(const std::string &Constraint) const; + + //===--------------------------------------------------------------------===// // Scheduler hooks // From jlaskey at apple.com Thu Jan 26 14:31:03 2006 From: jlaskey at apple.com (Jim Laskey) Date: Thu, 26 Jan 2006 14:31:03 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/ADT/UniqueVector.h Message-ID: <200601262031.OAA01156@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/ADT: UniqueVector.h updated: 1.5 -> 1.6 --- Log message: Use find instead of lower_bounds. --- Diffs of the changes: (+2 -2) UniqueVector.h | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/include/llvm/ADT/UniqueVector.h diff -u llvm/include/llvm/ADT/UniqueVector.h:1.5 llvm/include/llvm/ADT/UniqueVector.h:1.6 --- llvm/include/llvm/ADT/UniqueVector.h:1.5 Thu Jan 26 14:09:35 2006 +++ llvm/include/llvm/ADT/UniqueVector.h Thu Jan 26 14:30:51 2006 @@ -56,10 +56,10 @@ /// not found. unsigned idFor(const T &Entry) const { // Search for entry in the map. - typename std::map::iterator MI = Map.lower_bound(Entry); + typename std::map::iterator MI = Map.find(Entry); // See if entry exists, if so return ID. - if (MI != Map.end() && MI->first == Entry) return MI->second; + if (MI != Map.end()) return MI->second; // No luck. return 0; From jlaskey at apple.com Thu Jan 26 14:32:12 2006 From: jlaskey at apple.com (Jim Laskey) Date: Thu, 26 Jan 2006 14:32:12 -0600 Subject: [llvm-commits] CVS: llvm/Xcode/LLVM.xcodeproj/project.pbxproj Message-ID: <200601262032.OAA01499@zion.cs.uiuc.edu> Changes in directory llvm/Xcode/LLVM.xcodeproj: project.pbxproj updated: 1.17 -> 1.18 --- Log message: Update files lists. --- Diffs of the changes: (+9 -5) project.pbxproj | 14 +++++++++----- 1 files changed, 9 insertions(+), 5 deletions(-) Index: llvm/Xcode/LLVM.xcodeproj/project.pbxproj diff -u llvm/Xcode/LLVM.xcodeproj/project.pbxproj:1.17 llvm/Xcode/LLVM.xcodeproj/project.pbxproj:1.18 --- llvm/Xcode/LLVM.xcodeproj/project.pbxproj:1.17 Tue Jan 17 11:29:20 2006 +++ llvm/Xcode/LLVM.xcodeproj/project.pbxproj Thu Jan 26 14:32:00 2006 @@ -92,7 +92,6 @@ CF490CDF0903C9260072DB1C /* PPCISelDAGToDAG.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = PPCISelDAGToDAG.cpp; sourceTree = ""; }; CF490CE00903C9260072DB1C /* PPCISelLowering.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = PPCISelLowering.cpp; sourceTree = ""; }; CF490CE10903C9260072DB1C /* PPCISelLowering.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = PPCISelLowering.h; sourceTree = ""; }; - CF490CE20903C9260072DB1C /* PPCISelPattern.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = PPCISelPattern.cpp; sourceTree = ""; }; CF490CE30903C9260072DB1C /* PPCJITInfo.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = PPCJITInfo.cpp; sourceTree = ""; }; CF490CE40903C9260072DB1C /* PPCJITInfo.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = PPCJITInfo.h; sourceTree = ""; }; CF490CE50903C9260072DB1C /* PPCRegisterInfo.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = PPCRegisterInfo.cpp; sourceTree = ""; }; @@ -116,6 +115,10 @@ CF6529A6095B21A8007F884E /* MachineDebugInfo.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = MachineDebugInfo.cpp; sourceTree = ""; }; CF6B5AFD095C82C300D1EA42 /* DAGCombiner.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = DAGCombiner.cpp; sourceTree = ""; }; CF6F487109505E1500BC9E82 /* MachineDebugInfo.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = MachineDebugInfo.h; sourceTree = ""; }; + CF7FFA1F0985081C008B0087 /* ScheduleDAGList.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = ScheduleDAGList.cpp; sourceTree = ""; }; + CF7FFA200985081C008B0087 /* ScheduleDAGSimple.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = ScheduleDAGSimple.cpp; sourceTree = ""; }; + CF7FFA2109850864008B0087 /* ScheduleDAG.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = ScheduleDAG.h; sourceTree = ""; }; + CF8E00490989162500DA2399 /* Dwarf.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = Dwarf.h; sourceTree = ""; }; CF9BCD0808C74DE0001E7011 /* SubtargetFeature.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = SubtargetFeature.h; sourceTree = ""; }; CF9BCD1508C75070001E7011 /* SubtargetFeature.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = SubtargetFeature.cpp; sourceTree = ""; }; CFBD8B1A090E76540020B107 /* AlphaISelDAGToDAG.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = AlphaISelDAGToDAG.cpp; sourceTree = ""; }; @@ -150,7 +153,6 @@ DE4DA04A091147ED0012D44B /* PPCISelDAGToDAG.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; name = PPCISelDAGToDAG.cpp; path = ../lib/Target/PowerPC/PPCISelDAGToDAG.cpp; sourceTree = SOURCE_ROOT; }; DE4DA04B091147ED0012D44B /* PPCISelLowering.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; name = PPCISelLowering.cpp; path = ../lib/Target/PowerPC/PPCISelLowering.cpp; sourceTree = SOURCE_ROOT; }; DE4DA04C091147ED0012D44B /* PPCISelLowering.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; name = PPCISelLowering.h; path = ../lib/Target/PowerPC/PPCISelLowering.h; sourceTree = SOURCE_ROOT; }; - DE4DA04D091147ED0012D44B /* PPCISelPattern.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; name = PPCISelPattern.cpp; path = ../lib/Target/PowerPC/PPCISelPattern.cpp; sourceTree = SOURCE_ROOT; }; DE4DA04E091147ED0012D44B /* PPCJITInfo.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; name = PPCJITInfo.cpp; path = ../lib/Target/PowerPC/PPCJITInfo.cpp; sourceTree = SOURCE_ROOT; }; DE4DA04F091147ED0012D44B /* PPCJITInfo.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; name = PPCJITInfo.h; path = ../lib/Target/PowerPC/PPCJITInfo.h; sourceTree = SOURCE_ROOT; }; DE4DA050091147ED0012D44B /* PPCRegisterInfo.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; name = PPCRegisterInfo.cpp; path = ../lib/Target/PowerPC/PPCRegisterInfo.cpp; sourceTree = SOURCE_ROOT; }; @@ -1164,6 +1166,8 @@ children = ( CF6B5AFD095C82C300D1EA42 /* DAGCombiner.cpp */, DE66ED9008ABEC2B00323D32 /* LegalizeDAG.cpp */, + CF7FFA1F0985081C008B0087 /* ScheduleDAGList.cpp */, + CF7FFA200985081C008B0087 /* ScheduleDAGSimple.cpp */, DE694D9F08B51E0C0039C106 /* ScheduleDAG.cpp */, DE66ED9208ABEC2B00323D32 /* SelectionDAG.cpp */, DE66ED9308ABEC2B00323D32 /* SelectionDAGISel.cpp */, @@ -1458,7 +1462,6 @@ CF490CDF0903C9260072DB1C /* PPCISelDAGToDAG.cpp */, CF490CE00903C9260072DB1C /* PPCISelLowering.cpp */, CF490CE10903C9260072DB1C /* PPCISelLowering.h */, - CF490CE20903C9260072DB1C /* PPCISelPattern.cpp */, CF490CE30903C9260072DB1C /* PPCJITInfo.cpp */, CF490CE40903C9260072DB1C /* PPCJITInfo.h */, CF490CE50903C9260072DB1C /* PPCRegisterInfo.cpp */, @@ -1489,7 +1492,6 @@ DE4DA04A091147ED0012D44B /* PPCISelDAGToDAG.cpp */, DE4DA04B091147ED0012D44B /* PPCISelLowering.cpp */, DE4DA04C091147ED0012D44B /* PPCISelLowering.h */, - DE4DA04D091147ED0012D44B /* PPCISelPattern.cpp */, DE4DA04E091147ED0012D44B /* PPCJITInfo.cpp */, DE4DA04F091147ED0012D44B /* PPCJITInfo.h */, DE4DA050091147ED0012D44B /* PPCRegisterInfo.cpp */, @@ -1997,6 +1999,7 @@ DE66F24308ABF03100323D32 /* MachineRelocation.h */, DE66F24408ABF03100323D32 /* Passes.h */, DE66F24508ABF03100323D32 /* SchedGraphCommon.h */, + CF7FFA2109850864008B0087 /* ScheduleDAG.h */, DE66F24608ABF03100323D32 /* SelectionDAG.h */, DE66F24708ABF03100323D32 /* SelectionDAGISel.h */, DE66F24808ABF03100323D32 /* SelectionDAGNodes.h */, @@ -2054,6 +2057,7 @@ DE66F27B08ABF03200323D32 /* DOTGraphTraits.h */, DE66F27C08ABF03200323D32 /* DynamicLinker.h */, DE66F27D08ABF03200323D32 /* ELF.h */, + CF8E00490989162500DA2399 /* Dwarf.h */, DE66F27E08ABF03200323D32 /* FileUtilities.h */, DE66F27F08ABF03200323D32 /* GetElementPtrTypeIterator.h */, DE66F28008ABF03200323D32 /* GraphWriter.h */, @@ -2423,7 +2427,7 @@ }; CF0329BB08D1BE5D0030FD33 /* LLVM llc */ = { isa = PBXLegacyTarget; - buildArgumentsString = "$(ACTION) -j 4 "; + buildArgumentsString = "$(ACTION) -j 4"; buildConfigurationList = CF0329C308D1BEC40030FD33 /* Build configuration list for PBXLegacyTarget "LLVM llc" */; buildPhases = ( ); From lattner at cs.uiuc.edu Thu Jan 26 14:36:42 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Thu, 26 Jan 2006 14:36:42 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/ADT/StringExtras.h Message-ID: <200601262036.OAA03241@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/ADT: StringExtras.h updated: 1.26 -> 1.27 --- Log message: add some methods for case-insensitive string compares --- Diffs of the changes: (+21 -0) StringExtras.h | 21 +++++++++++++++++++++ 1 files changed, 21 insertions(+) Index: llvm/include/llvm/ADT/StringExtras.h diff -u llvm/include/llvm/ADT/StringExtras.h:1.26 llvm/include/llvm/ADT/StringExtras.h:1.27 --- llvm/include/llvm/ADT/StringExtras.h:1.26 Thu Apr 21 15:13:50 2005 +++ llvm/include/llvm/ADT/StringExtras.h Thu Jan 26 14:36:29 2006 @@ -113,6 +113,27 @@ return result; } +/// StringsEqualNoCase - Return true if the two strings are equal, ignoring +/// case. +static inline bool StringsEqualNoCase(const std::string &LHS, + const std::string &RHS) { + if (LHS.size() != RHS.size()) return false; + for (unsigned i = 0, e = LHS.size(); i != e; ++i) + if (tolower(LHS[i]) != tolower(RHS[i])) return false; + return true; +} + +/// StringsEqualNoCase - Return true if the two strings are equal, ignoring +/// case. +static inline bool StringsEqualNoCase(const std::string &LHS, + const char *RHS) { + for (unsigned i = 0, e = LHS.size(); i != e; ++i) { + if (RHS[i] == 0) return false; // RHS too short. + if (tolower(LHS[i]) != tolower(RHS[i])) return false; + } + return RHS[LHS.size()] == 0; // Not too long? +} + /// getToken - This function extracts one token from source, ignoring any /// leading characters that appear in the Delimiters string, and ending the /// token at any of the characters that appear in the Delimiters string. If From lattner at cs.uiuc.edu Thu Jan 26 14:37:16 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Thu, 26 Jan 2006 14:37:16 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/TargetLowering.cpp Message-ID: <200601262037.OAA04441@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target: TargetLowering.cpp updated: 1.20 -> 1.21 --- Log message: Implement a method for inline asm support --- Diffs of the changes: (+17 -0) TargetLowering.cpp | 17 +++++++++++++++++ 1 files changed, 17 insertions(+) Index: llvm/lib/Target/TargetLowering.cpp diff -u llvm/lib/Target/TargetLowering.cpp:1.20 llvm/lib/Target/TargetLowering.cpp:1.21 --- llvm/lib/Target/TargetLowering.cpp:1.20 Wed Jan 25 12:57:15 2006 +++ llvm/lib/Target/TargetLowering.cpp Thu Jan 26 14:37:03 2006 @@ -13,7 +13,9 @@ #include "llvm/Target/TargetLowering.h" #include "llvm/Target/TargetMachine.h" +#include "llvm/Target/MRegisterInfo.h" #include "llvm/CodeGen/SelectionDAG.h" +#include "llvm/ADT/StringExtras.h" using namespace llvm; TargetLowering::TargetLowering(TargetMachine &tm) @@ -132,3 +134,18 @@ uint64_t Mask) const { return false; } + +std::vector TargetLowering:: +getRegForInlineAsmConstraint(const std::string &Constraint) const { + // Scan to see if this constraint is a register name. + const MRegisterInfo *RI = TM.getRegisterInfo(); + for (unsigned i = 1, e = RI->getNumRegs(); i != e; ++i) { + if (const char *Name = RI->get(i).Name) + if (StringsEqualNoCase(Constraint, Name)) + return std::vector(1, i); + } + + // Not a physreg, must not be a register reference or something. + return std::vector(); +} + From jeffc at jolt-lang.org Thu Jan 26 14:41:46 2006 From: jeffc at jolt-lang.org (Jeff Cohen) Date: Thu, 26 Jan 2006 14:41:46 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/SubtargetFeature.cpp Message-ID: <200601262041.OAA07779@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target: SubtargetFeature.cpp updated: 1.8 -> 1.9 --- Log message: Improve compatibility with VC2005, patch by Morten Ofstad! --- Diffs of the changes: (+4 -1) SubtargetFeature.cpp | 5 ++++- 1 files changed, 4 insertions(+), 1 deletion(-) Index: llvm/lib/Target/SubtargetFeature.cpp diff -u llvm/lib/Target/SubtargetFeature.cpp:1.8 llvm/lib/Target/SubtargetFeature.cpp:1.9 --- llvm/lib/Target/SubtargetFeature.cpp:1.8 Tue Oct 25 10:15:28 2005 +++ llvm/lib/Target/SubtargetFeature.cpp Thu Jan 26 14:41:32 2006 @@ -112,10 +112,13 @@ /// Find KV in array using binary search. template const T *Find(const std::string &S, const T *A, size_t L) { + // Make the lower bound element we're looking for + T KV; + KV.Key = S.c_str(); // Determine the end of the array const T *Hi = A + L; // Binary search the array - const T *F = std::lower_bound(A, Hi, S); + const T *F = std::lower_bound(A, Hi, KV); // If not found then return NULL if (F == Hi || std::string(F->Key) != S) return NULL; // Return the found array item From jeffc at jolt-lang.org Thu Jan 26 14:41:47 2006 From: jeffc at jolt-lang.org (Jeff Cohen) Date: Thu, 26 Jan 2006 14:41:47 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/LiveInterval.h Message-ID: <200601262041.OAA07783@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/CodeGen: LiveInterval.h updated: 1.15 -> 1.16 --- Log message: Improve compatibility with VC2005, patch by Morten Ofstad! --- Diffs of the changes: (+3 -0) LiveInterval.h | 3 +++ 1 files changed, 3 insertions(+) Index: llvm/include/llvm/CodeGen/LiveInterval.h diff -u llvm/include/llvm/CodeGen/LiveInterval.h:1.15 llvm/include/llvm/CodeGen/LiveInterval.h:1.16 --- llvm/include/llvm/CodeGen/LiveInterval.h:1.15 Thu Oct 20 02:37:59 2005 +++ llvm/include/llvm/CodeGen/LiveInterval.h Thu Jan 26 14:41:32 2006 @@ -64,6 +64,9 @@ return V < LR.start; } + inline bool operator<(const LiveRange &LR, unsigned V) { + return LR.start < V; + } /// LiveInterval - This class represents some number of live ranges for a /// register or value. This class also contains a bit of register allocator From jeffc at jolt-lang.org Thu Jan 26 14:41:47 2006 From: jeffc at jolt-lang.org (Jeff Cohen) Date: Thu, 26 Jan 2006 14:41:47 -0600 Subject: [llvm-commits] CVS: llvm/lib/Transforms/Scalar/CorrelatedExprs.cpp Message-ID: <200601262041.OAA07795@zion.cs.uiuc.edu> Changes in directory llvm/lib/Transforms/Scalar: CorrelatedExprs.cpp updated: 1.31 -> 1.32 --- Log message: Improve compatibility with VC2005, patch by Morten Ofstad! --- Diffs of the changes: (+4 -2) CorrelatedExprs.cpp | 6 ++++-- 1 files changed, 4 insertions(+), 2 deletions(-) Index: llvm/lib/Transforms/Scalar/CorrelatedExprs.cpp diff -u llvm/lib/Transforms/Scalar/CorrelatedExprs.cpp:1.31 llvm/lib/Transforms/Scalar/CorrelatedExprs.cpp:1.32 --- llvm/lib/Transforms/Scalar/CorrelatedExprs.cpp:1.31 Sun Jan 22 17:32:06 2006 +++ llvm/lib/Transforms/Scalar/CorrelatedExprs.cpp Thu Jan 26 14:41:32 2006 @@ -135,7 +135,8 @@ Relation &getRelation(Value *V) { // Binary search for V's entry... std::vector::iterator I = - std::lower_bound(Relationships.begin(), Relationships.end(), V); + std::lower_bound(Relationships.begin(), Relationships.end(), + Relation(V)); // If we found the entry, return it... if (I != Relationships.end() && I->getValue() == V) @@ -148,7 +149,8 @@ const Relation *requestRelation(Value *V) const { // Binary search for V's entry... std::vector::const_iterator I = - std::lower_bound(Relationships.begin(), Relationships.end(), V); + std::lower_bound(Relationships.begin(), Relationships.end(), + Relation(V)); if (I != Relationships.end() && I->getValue() == V) return &*I; return 0; From jeffc at jolt-lang.org Thu Jan 26 14:41:47 2006 From: jeffc at jolt-lang.org (Jeff Cohen) Date: Thu, 26 Jan 2006 14:41:47 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86FloatingPoint.cpp Message-ID: <200601262041.OAA07791@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: X86FloatingPoint.cpp updated: 1.48 -> 1.49 --- Log message: Improve compatibility with VC2005, patch by Morten Ofstad! --- Diffs of the changes: (+6 -1) X86FloatingPoint.cpp | 7 ++++++- 1 files changed, 6 insertions(+), 1 deletion(-) Index: llvm/lib/Target/X86/X86FloatingPoint.cpp diff -u llvm/lib/Target/X86/X86FloatingPoint.cpp:1.48 llvm/lib/Target/X86/X86FloatingPoint.cpp:1.49 --- llvm/lib/Target/X86/X86FloatingPoint.cpp:1.48 Sun Jan 22 17:37:17 2006 +++ llvm/lib/Target/X86/X86FloatingPoint.cpp Thu Jan 26 14:41:32 2006 @@ -281,7 +281,12 @@ unsigned from; unsigned to; bool operator<(const TableEntry &TE) const { return from < TE.from; } - bool operator<(unsigned V) const { return from < V; } + friend bool operator<(const TableEntry &TE, unsigned V) { + return TE.from < V; + } + friend bool operator<(unsigned V, const TableEntry &TE) { + return V < TE.from; + } }; } From jeffc at jolt-lang.org Thu Jan 26 14:41:47 2006 From: jeffc at jolt-lang.org (Jeff Cohen) Date: Thu, 26 Jan 2006 14:41:47 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/Target/SubtargetFeature.h Message-ID: <200601262041.OAA07787@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/Target: SubtargetFeature.h updated: 1.5 -> 1.6 --- Log message: Improve compatibility with VC2005, patch by Morten Ofstad! --- Diffs of the changes: (+4 -4) SubtargetFeature.h | 8 ++++---- 1 files changed, 4 insertions(+), 4 deletions(-) Index: llvm/include/llvm/Target/SubtargetFeature.h diff -u llvm/include/llvm/Target/SubtargetFeature.h:1.5 llvm/include/llvm/Target/SubtargetFeature.h:1.6 --- llvm/include/llvm/Target/SubtargetFeature.h:1.5 Tue Oct 25 10:15:28 2005 +++ llvm/include/llvm/Target/SubtargetFeature.h Thu Jan 26 14:41:32 2006 @@ -36,8 +36,8 @@ uint32_t Value; // K-V integer value // Compare routine for std binary search - bool operator<(const std::string &S) const { - return strcmp(Key, S.c_str()) < 0; + bool operator<(const SubtargetFeatureKV &S) const { + return strcmp(Key, S.Key) < 0; } }; @@ -51,8 +51,8 @@ void *Value; // K-V pointer value // Compare routine for std binary search - bool operator<(const std::string &S) const { - return strcmp(Key, S.c_str()) < 0; + bool operator<(const SubtargetInfoKV &S) const { + return strcmp(Key, S.Key) < 0; } }; From jlaskey at apple.com Thu Jan 26 15:23:01 2006 From: jlaskey at apple.com (Jim Laskey) Date: Thu, 26 Jan 2006 15:23:01 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/DwarfWriter.cpp MachineDebugInfo.cpp Message-ID: <200601262123.PAA18378@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen: DwarfWriter.cpp updated: 1.18 -> 1.19 MachineDebugInfo.cpp updated: 1.5 -> 1.6 --- Log message: Use global information to fill out Dwarf compile units. --- Diffs of the changes: (+18 -22) DwarfWriter.cpp | 30 ++++++++++-------------------- MachineDebugInfo.cpp | 10 ++++++++-- 2 files changed, 18 insertions(+), 22 deletions(-) Index: llvm/lib/CodeGen/DwarfWriter.cpp diff -u llvm/lib/CodeGen/DwarfWriter.cpp:1.18 llvm/lib/CodeGen/DwarfWriter.cpp:1.19 --- llvm/lib/CodeGen/DwarfWriter.cpp:1.18 Thu Jan 26 14:21:46 2006 +++ llvm/lib/CodeGen/DwarfWriter.cpp Thu Jan 26 15:22:49 2006 @@ -1242,20 +1242,16 @@ /// NewCompileUnit - Create new compile unit information. /// -DIE *DwarfWriter::NewCompileUnit(const std::string &Directory, - const std::string &SourceName) { +DIE *DwarfWriter::NewCompileUnit(const CompileUnitWrapper &CompileUnit) { DIE *Unit = new DIE(DW_TAG_compile_unit, DW_CHILDREN_yes); // FIXME - use the correct line set. Unit->AddLabel (DW_AT_stmt_list, DW_FORM_data4, DWLabel("line", 0)); Unit->AddLabel (DW_AT_high_pc, DW_FORM_addr, DWLabel("text_end", 0)); Unit->AddLabel (DW_AT_low_pc, DW_FORM_addr, DWLabel("text_begin", 0)); - // FIXME - The producer needs to be in this form, but should come from - // an appropriate source. - Unit->AddString(DW_AT_producer, DW_FORM_string, - "llvm 3.4.x (LLVM Research Group)"); - Unit->AddInt (DW_AT_language, DW_FORM_data1, DW_LANG_C89); - Unit->AddString(DW_AT_name, DW_FORM_string, SourceName); - Unit->AddString(DW_AT_comp_dir, DW_FORM_string, Directory); + Unit->AddString(DW_AT_producer, DW_FORM_string, CompileUnit.getProducer()); + Unit->AddInt (DW_AT_language, DW_FORM_data1, CompileUnit.getLanguage()); + Unit->AddString(DW_AT_name, DW_FORM_string, CompileUnit.getFileName()); + Unit->AddString(DW_AT_comp_dir, DW_FORM_string, CompileUnit.getDirectory()); Unit->Complete(*this); return Unit; @@ -1700,17 +1696,11 @@ /// ConstructCompileUnitDIEs - Create a compile unit DIE for each source and /// header file. void DwarfWriter::ConstructCompileUnitDIEs() { - // Get directory and source information. - const UniqueVector &Directories = DebugInfo->getDirectories(); - const UniqueVector &SourceFiles = DebugInfo->getSourceFiles(); - - // Construct compile unit DIEs for each source. - for (unsigned SourceID = 1, NSID = SourceFiles.size(); - SourceID <= NSID; ++SourceID) { - const SourceFileInfo &SourceFile = SourceFiles[SourceID]; - const std::string &Directory = Directories[SourceFile.getDirectoryID()]; - const std::string &SourceName = SourceFile.getName(); - DIE *Unit = NewCompileUnit(Directory, SourceName); + const UniqueVector CUW = DebugInfo->getCompileUnits(); + + for (unsigned i = 1, N = CUW.size(); i <= N; ++i) { + const CompileUnitWrapper &CompileUnit = CUW[i]; + DIE *Unit = NewCompileUnit(CompileUnit); DWContext *Context = new DWContext(*this, NULL, Unit); CompileUnits.push_back(Unit); } Index: llvm/lib/CodeGen/MachineDebugInfo.cpp diff -u llvm/lib/CodeGen/MachineDebugInfo.cpp:1.5 llvm/lib/CodeGen/MachineDebugInfo.cpp:1.6 --- llvm/lib/CodeGen/MachineDebugInfo.cpp:1.5 Thu Jan 26 14:21:46 2006 +++ llvm/lib/CodeGen/MachineDebugInfo.cpp Thu Jan 26 15:22:49 2006 @@ -180,7 +180,7 @@ /// getContext - Return the "lldb.compile_unit" context global. /// GlobalVariable *GlobalWrapper::getContext() const { - return dyn_cast(IC->getOperand(1)); + return cast(IC->getOperand(1)); } /// getName - Return the name of the global. @@ -192,7 +192,7 @@ /// getType - Return the type of the global. /// const GlobalVariable *GlobalWrapper::getType() const { - return dyn_cast(IC->getOperand(4)); + return cast(IC->getOperand(4)); } /// isStatic - Return true if the global is static. @@ -274,6 +274,12 @@ if (CompileUnits.size() != Globals.size()) CompileUnits.reset(); } +/// getCompileUnits - Return a vector of debug compile units. +/// +const UniqueVector MachineDebugInfo::getCompileUnits()const{ + return CompileUnits; +} + /// getGlobalVariables - Return a vector of debug global variables. /// std::vector MachineDebugInfo::getGlobalVariables(Module &M) { From jlaskey at apple.com Thu Jan 26 15:23:01 2006 From: jlaskey at apple.com (Jim Laskey) Date: Thu, 26 Jan 2006 15:23:01 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/DwarfWriter.h MachineDebugInfo.h Message-ID: <200601262123.PAA18384@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/CodeGen: DwarfWriter.h updated: 1.17 -> 1.18 MachineDebugInfo.h updated: 1.7 -> 1.8 --- Log message: Use global information to fill out Dwarf compile units. --- Diffs of the changes: (+7 -2) DwarfWriter.h | 5 +++-- MachineDebugInfo.h | 4 ++++ 2 files changed, 7 insertions(+), 2 deletions(-) Index: llvm/include/llvm/CodeGen/DwarfWriter.h diff -u llvm/include/llvm/CodeGen/DwarfWriter.h:1.17 llvm/include/llvm/CodeGen/DwarfWriter.h:1.18 --- llvm/include/llvm/CodeGen/DwarfWriter.h:1.17 Thu Jan 26 14:21:46 2006 +++ llvm/include/llvm/CodeGen/DwarfWriter.h Thu Jan 26 15:22:49 2006 @@ -32,6 +32,7 @@ // Forward declarations. // class AsmPrinter; + class CompileUnitWrapper; class DIE; class DwarfWriter; class DWContext; @@ -645,10 +646,10 @@ unsigned Size, unsigned Align); private: + /// NewCompileUnit - Create new compile unit information. /// - DIE *NewCompileUnit(const std::string &Directory, - const std::string &SourceName); + DIE *DwarfWriter::NewCompileUnit(const CompileUnitWrapper &CompileUnit); /// EmitInitial - Emit initial Dwarf declarations. /// Index: llvm/include/llvm/CodeGen/MachineDebugInfo.h diff -u llvm/include/llvm/CodeGen/MachineDebugInfo.h:1.7 llvm/include/llvm/CodeGen/MachineDebugInfo.h:1.8 --- llvm/include/llvm/CodeGen/MachineDebugInfo.h:1.7 Thu Jan 26 14:21:46 2006 +++ llvm/include/llvm/CodeGen/MachineDebugInfo.h Thu Jan 26 15:22:49 2006 @@ -271,6 +271,10 @@ /// void MachineDebugInfo::SetupCompileUnits(Module &M); + /// getCompileUnits - Return a vector of debug compile units. + /// + const UniqueVector getCompileUnits() const; + /// getGlobalVariables - Return a vector of debug global variables. /// static std::vector getGlobalVariables(Module &M); From lattner at cs.uiuc.edu Thu Jan 26 16:23:56 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Thu, 26 Jan 2006 16:23:56 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/SelectionDAGNodes.h Message-ID: <200601262223.QAA28150@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/CodeGen: SelectionDAGNodes.h updated: 1.94 -> 1.95 --- Log message: Add new INLINEASM node --- Diffs of the changes: (+9 -0) SelectionDAGNodes.h | 9 +++++++++ 1 files changed, 9 insertions(+) Index: llvm/include/llvm/CodeGen/SelectionDAGNodes.h diff -u llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.94 llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.95 --- llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.94 Wed Jan 25 12:21:52 2006 +++ llvm/include/llvm/CodeGen/SelectionDAGNodes.h Thu Jan 26 16:23:45 2006 @@ -311,6 +311,15 @@ // the callee is known not to access the stack of the caller. CALL, TAILCALL, + + // INLINEASM - Represents an inline asm block. This node always has two + // return values: a chain and a flag result. The inputs are as follows: + // Operand #0 : Input chain. + // Operand #1 : a ExternalSymbolSDNode with a pointer to the asm string. + // Operand #2n+2: A RegisterNode. + // Operand #2n+3: A TargetConstant, indicating if the reg is a use/def + // Operand #last: Optional, an incoming flag. + INLINEASM, // STACKSAVE - STACKSAVE has one operand, an input chain. It produces a // value, the same type as the pointer type for the system, and an output From lattner at cs.uiuc.edu Thu Jan 26 16:25:03 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Thu, 26 Jan 2006 16:25:03 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp SelectionDAG.cpp SelectionDAGISel.cpp Message-ID: <200601262225.QAA28250@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/SelectionDAG: LegalizeDAG.cpp updated: 1.277 -> 1.278 SelectionDAG.cpp updated: 1.244 -> 1.245 SelectionDAGISel.cpp updated: 1.137 -> 1.138 --- Log message: initial selectiondag support for new INLINEASM node. Note that inline asms with outputs or inputs are not supported yet. :) --- Diffs of the changes: (+74 -1) LegalizeDAG.cpp | 22 ++++++++++++++++++++++ SelectionDAG.cpp | 3 ++- SelectionDAGISel.cpp | 50 ++++++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 74 insertions(+), 1 deletion(-) Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.277 llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.278 --- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.277 Wed Jan 25 12:21:52 2006 +++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Thu Jan 26 16:24:51 2006 @@ -881,6 +881,28 @@ AddLegalizedOperand(SDOperand(Node, 1), Tmp2); return Op.ResNo ? Tmp2 : Tmp1; } + case ISD::INLINEASM: + Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize Chain. + Tmp2 = Node->getOperand(Node->getNumOperands()-1); + if (Tmp2.getValueType() != MVT::Flag) // Legalize Flag if it exists. + Tmp2 = Tmp3 = SDOperand(0, 0); + else + Tmp3 = LegalizeOp(Tmp2); + + if (Tmp1 != Node->getOperand(0) || Tmp2 != Tmp3) { + std::vector Ops(Node->op_begin(), Node->op_end()); + Ops[0] = Tmp1; + Ops.back() = Tmp3; + std::vector VTs(Node->value_begin(), Node->value_end()); + Result = DAG.getNode(ISD::INLINEASM, VTs, Ops); + } else { + Result = SDOperand(Node, 0); + } + + // INLINE asm returns a chain and flag, make sure to add both to the map. + AddLegalizedOperand(SDOperand(Node, 0), Result); + AddLegalizedOperand(SDOperand(Node, 1), Result.getValue(1)); + return Result.getValue(Op.ResNo); case ISD::TAILCALL: case ISD::CALL: { Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain. Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.244 llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.245 --- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.244 Wed Jan 25 12:21:52 2006 +++ llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Thu Jan 26 16:24:51 2006 @@ -2028,7 +2028,8 @@ case ISD::CopyFromReg: return "CopyFromReg"; case ISD::UNDEF: return "undef"; case ISD::MERGE_VALUES: return "mergevalues"; - + case ISD::INLINEASM: return "inlineasm"; + // Unary operators case ISD::FABS: return "fabs"; case ISD::FNEG: return "fneg"; Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.137 llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.138 --- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.137 Wed Jan 25 12:21:52 2006 +++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Thu Jan 26 16:24:51 2006 @@ -19,6 +19,7 @@ #include "llvm/DerivedTypes.h" #include "llvm/Function.h" #include "llvm/GlobalVariable.h" +#include "llvm/InlineAsm.h" #include "llvm/Instructions.h" #include "llvm/Intrinsics.h" #include "llvm/CodeGen/IntrinsicLowering.h" @@ -468,6 +469,7 @@ void visitStore(StoreInst &I); void visitPHI(PHINode &I) { } // PHI nodes are handled specially. void visitCall(CallInst &I); + void visitInlineAsm(CallInst &I); const char *visitIntrinsicCall(CallInst &I, unsigned Intrinsic); void visitVAStart(CallInst &I); @@ -1122,6 +1124,9 @@ } } } + } else if (isa(I.getOperand(0))) { + visitInlineAsm(I); + return; } SDOperand Callee; @@ -1148,6 +1153,51 @@ DAG.setRoot(Result.second); } +/// visitInlineAsm - Handle a call to an InlineAsm object. +/// +void SelectionDAGLowering::visitInlineAsm(CallInst &I) { + InlineAsm *IA = cast(I.getOperand(0)); + + SDOperand AsmStr = DAG.getTargetExternalSymbol(IA->getAsmString().c_str(), + MVT::Other); + + // Note, we treat inline asms both with and without side-effects as the same. + // If an inline asm doesn't have side effects and doesn't access memory, we + // could not choose to not chain it. + bool hasSideEffects = IA->hasSideEffects(); + + std::vector > + Constraints = IA->ParseConstraints(); + + + /// AsmNodeOperands - A list of pairs. The first element is a register, the + /// second is a bitfield where bit #0 is set if it is a use and bit #1 is set + /// if it is a def of that register. + std::vector AsmNodeOperands; + AsmNodeOperands.push_back(SDOperand()); // reserve space for input chain + AsmNodeOperands.push_back(AsmStr); + + SDOperand Chain = getRoot(); + SDOperand Flag; + + // FIXME: input copies. + + // Finish up input operands. + AsmNodeOperands[0] = Chain; + if (Flag.Val) AsmNodeOperands.push_back(Flag); + + std::vector VTs; + VTs.push_back(MVT::Other); + VTs.push_back(MVT::Flag); + Chain = DAG.getNode(ISD::INLINEASM, VTs, AsmNodeOperands); + Flag = Chain.getValue(1); + + // FIXME: Copies out of registers here, setValue(CI). + + DAG.setRoot(Chain); +} + + void SelectionDAGLowering::visitMalloc(MallocInst &I) { SDOperand Src = getValue(I.getOperand(0)); From jlaskey at apple.com Thu Jan 26 16:25:15 2006 From: jlaskey at apple.com (Jim Laskey) Date: Thu, 26 Jan 2006 16:25:15 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/DwarfWriter.h Message-ID: <200601262225.QAA28260@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/CodeGen: DwarfWriter.h updated: 1.18 -> 1.19 --- Log message: Dropped DwarfWriter:: --- Diffs of the changes: (+1 -1) DwarfWriter.h | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/include/llvm/CodeGen/DwarfWriter.h diff -u llvm/include/llvm/CodeGen/DwarfWriter.h:1.18 llvm/include/llvm/CodeGen/DwarfWriter.h:1.19 --- llvm/include/llvm/CodeGen/DwarfWriter.h:1.18 Thu Jan 26 15:22:49 2006 +++ llvm/include/llvm/CodeGen/DwarfWriter.h Thu Jan 26 16:25:04 2006 @@ -649,7 +649,7 @@ /// NewCompileUnit - Create new compile unit information. /// - DIE *DwarfWriter::NewCompileUnit(const CompileUnitWrapper &CompileUnit); + DIE *NewCompileUnit(const CompileUnitWrapper &CompileUnit); /// EmitInitial - Emit initial Dwarf declarations. /// From lattner at cs.uiuc.edu Thu Jan 26 17:09:07 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Thu, 26 Jan 2006 17:09:07 -0600 Subject: [llvm-commits] CVS: llvm/utils/TableGen/DAGISelEmitter.cpp Message-ID: <200601262309.RAA16286@zion.cs.uiuc.edu> Changes in directory llvm/utils/TableGen: DAGISelEmitter.cpp updated: 1.144 -> 1.145 --- Log message: Teach the dag selectors to select InlineAsm nodes. Aren't we happy the pattern selectors are almost all gone? --- Diffs of the changes: (+18 -1) DAGISelEmitter.cpp | 19 ++++++++++++++++++- 1 files changed, 18 insertions(+), 1 deletion(-) Index: llvm/utils/TableGen/DAGISelEmitter.cpp diff -u llvm/utils/TableGen/DAGISelEmitter.cpp:1.144 llvm/utils/TableGen/DAGISelEmitter.cpp:1.145 --- llvm/utils/TableGen/DAGISelEmitter.cpp:1.144 Thu Jan 26 13:13:45 2006 +++ llvm/utils/TableGen/DAGISelEmitter.cpp Thu Jan 26 17:08:55 2006 @@ -2662,6 +2662,21 @@ } // Emit boilerplate. + OS << "SDOperand Select_INLINEASM(SDOperand N) {\n" + << " std::vector Ops(N.Val->op_begin(), N.Val->op_end());\n" + << " Ops[0] = Select(N.getOperand(0)); // Select the chain.\n\n" + << " // Select the flag operand.\n" + << " if (Ops.back().getValueType() == MVT::Flag)\n" + << " Ops.back() = Select(Ops.back());\n" + << " std::vector VTs;\n" + << " VTs.push_back(MVT::Other);\n" + << " VTs.push_back(MVT::Flag);\n" + << " SDOperand New = CurDAG->getNode(ISD::INLINEASM, VTs, Ops);\n" + << " CodeGenMap[N.getValue(0)] = New;\n" + << " CodeGenMap[N.getValue(1)] = New.getValue(1);\n" + << " return New.getValue(N.ResNo);\n" + << "}\n\n"; + OS << "// The main instruction selector code.\n" << "SDOperand SelectCode(SDOperand N) {\n" << " if (N.getOpcode() >= ISD::BUILTIN_OP_END &&\n" @@ -2737,7 +2752,9 @@ << " CodeGenMap[N.getValue(1)] = Result.getValue(1);\n" << " return Result.getValue(N.ResNo);\n" << " }\n" - << " }\n"; + << " }\n" + << " case ISD::INLINEASM: return Select_INLINEASM(N);\n"; + // Loop over all of the case statements, emiting a call to each method we // emitted above. From lattner at cs.uiuc.edu Thu Jan 26 17:27:14 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Thu, 26 Jan 2006 17:27:14 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/Target/TargetInstrInfo.h Message-ID: <200601262327.RAA17017@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/Target: TargetInstrInfo.h updated: 1.81 -> 1.82 --- Log message: Add a common INLINEASM opcode --- Diffs of the changes: (+5 -2) TargetInstrInfo.h | 7 +++++-- 1 files changed, 5 insertions(+), 2 deletions(-) Index: llvm/include/llvm/Target/TargetInstrInfo.h diff -u llvm/include/llvm/Target/TargetInstrInfo.h:1.81 llvm/include/llvm/Target/TargetInstrInfo.h:1.82 --- llvm/include/llvm/Target/TargetInstrInfo.h:1.81 Tue Nov 1 14:07:00 2005 +++ llvm/include/llvm/Target/TargetInstrInfo.h Thu Jan 26 17:27:02 2006 @@ -125,8 +125,11 @@ TargetInstrInfo(const TargetInstrDescriptor *desc, unsigned NumOpcodes); virtual ~TargetInstrInfo(); - // Invariant: All instruction sets use opcode #0 as the PHI instruction - enum { PHI = 0 }; + // Invariant opcodes: All instruction sets have these as their low opcodes. + enum { + PHI = 0, + INLINEASM = 1 + }; unsigned getNumOpcodes() const { return NumOpcodes; } From lattner at cs.uiuc.edu Thu Jan 26 17:28:16 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Thu, 26 Jan 2006 17:28:16 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp Message-ID: <200601262328.RAA17147@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/SelectionDAG: ScheduleDAG.cpp updated: 1.59 -> 1.60 --- Log message: Teach the scheduler to emit the appropriate INLINEASM MachineInstr for an ISD::INLINEASM node. --- Diffs of the changes: (+29 -0) ScheduleDAG.cpp | 29 +++++++++++++++++++++++++++++ 1 files changed, 29 insertions(+) Index: llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp diff -u llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.59 llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.60 --- llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.59 Wed Jan 25 12:54:24 2006 +++ llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp Thu Jan 26 17:28:04 2006 @@ -283,6 +283,35 @@ MRI->copyRegToReg(*BB, BB->end(), VRBase, SrcReg, TRC); break; } + case ISD::INLINEASM: { + unsigned NumOps = Node->getNumOperands(); + if (Node->getOperand(NumOps-1).getValueType() == MVT::Flag) + --NumOps; // Ignore the flag operand. + + // Create the inline asm machine instruction. + MachineInstr *MI = + new MachineInstr(BB, TargetInstrInfo::INLINEASM, (NumOps-2)/2+1); + + // Add the asm string as an external symbol operand. + const char *AsmStr = + cast(Node->getOperand(1))->getSymbol(); + MI->addExternalSymbolOperand(AsmStr, false); + + // Add all of the operand registers to the instruction. + for (unsigned i = 2; i != NumOps; i += 2) { + unsigned Reg = cast(Node->getOperand(i))->getReg(); + unsigned Flags = cast(Node->getOperand(i))->getValue(); + MachineOperand::UseType UseTy; + switch (Flags) { + default: assert(0 && "Bad flags!"); + case 1: UseTy = MachineOperand::Use; break; + case 2: UseTy = MachineOperand::Def; break; + case 3: UseTy = MachineOperand::UseAndDef; break; + } + MI->addMachineRegOperand(Reg, UseTy); + } + break; + } } } From lattner at cs.uiuc.edu Thu Jan 26 19:39:50 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Thu, 26 Jan 2006 19:39:50 -0600 Subject: [llvm-commits] CVS: llvm/utils/TableGen/CodeEmitterGen.cpp Message-ID: <200601270139.TAA30038@zion.cs.uiuc.edu> Changes in directory llvm/utils/TableGen: CodeEmitterGen.cpp updated: 1.42 -> 1.43 --- Log message: Don't emit JIT code for these instructions --- Diffs of the changes: (+2 -0) CodeEmitterGen.cpp | 2 ++ 1 files changed, 2 insertions(+) Index: llvm/utils/TableGen/CodeEmitterGen.cpp diff -u llvm/utils/TableGen/CodeEmitterGen.cpp:1.42 llvm/utils/TableGen/CodeEmitterGen.cpp:1.43 --- llvm/utils/TableGen/CodeEmitterGen.cpp:1.42 Mon Oct 24 10:04:15 2005 +++ llvm/utils/TableGen/CodeEmitterGen.cpp Thu Jan 26 19:39:38 2006 @@ -89,6 +89,8 @@ for (std::vector::iterator I = Insts.begin(), E = Insts.end(); I != E; ++I) { Record *R = *I; + if (R->getName() == "PHI" || R->getName() == "INLINEASM") continue; + o << " case " << Namespace << R->getName() << ": {\n" << " DEBUG(std::cerr << \"Emitting " << R->getName() << "\\n\");\n"; From lattner at cs.uiuc.edu Thu Jan 26 19:41:50 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Thu, 26 Jan 2006 19:41:50 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/TargetSchedule.td Message-ID: <200601270141.TAA30141@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target: TargetSchedule.td updated: 1.4 -> 1.5 --- Log message: Add a default NoItinerary class for targets to use. --- Diffs of the changes: (+1 -0) TargetSchedule.td | 1 + 1 files changed, 1 insertion(+) Index: llvm/lib/Target/TargetSchedule.td diff -u llvm/lib/Target/TargetSchedule.td:1.4 llvm/lib/Target/TargetSchedule.td:1.5 --- llvm/lib/Target/TargetSchedule.td:1.4 Sun Oct 23 17:07:20 2005 +++ llvm/lib/Target/TargetSchedule.td Thu Jan 26 19:41:38 2006 @@ -47,6 +47,7 @@ // instruction information. // class InstrItinClass; +def NoItinerary : InstrItinClass; //===----------------------------------------------------------------------===// // Instruction itinerary data - These values provide a runtime map of an From lattner at cs.uiuc.edu Thu Jan 26 19:42:07 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Thu, 26 Jan 2006 19:42:07 -0600 Subject: [llvm-commits] CVS: llvm/utils/TableGen/SubtargetEmitter.cpp Message-ID: <200601270142.TAA30153@zion.cs.uiuc.edu> Changes in directory llvm/utils/TableGen: SubtargetEmitter.cpp updated: 1.15 -> 1.16 --- Log message: There is at least a 'noitinerary' itinerary now --- Diffs of the changes: (+1 -1) SubtargetEmitter.cpp | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/utils/TableGen/SubtargetEmitter.cpp diff -u llvm/utils/TableGen/SubtargetEmitter.cpp:1.15 llvm/utils/TableGen/SubtargetEmitter.cpp:1.16 --- llvm/utils/TableGen/SubtargetEmitter.cpp:1.15 Fri Dec 30 08:56:37 2005 +++ llvm/utils/TableGen/SubtargetEmitter.cpp Thu Jan 26 19:41:55 2006 @@ -436,7 +436,7 @@ // Enumerate all the itinerary classes unsigned NItinClasses = CollectAllItinClasses(OS, ItinClassesMap); // Make sure the rest is worth the effort - HasItineraries = NItinClasses != 0; + HasItineraries = NItinClasses != 1; // Ignore NoItinerary. if (HasItineraries) { // Emit the stage data From lattner at cs.uiuc.edu Thu Jan 26 19:44:22 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Thu, 26 Jan 2006 19:44:22 -0600 Subject: [llvm-commits] CVS: llvm/utils/TableGen/InstrInfoEmitter.cpp Message-ID: <200601270144.TAA30232@zion.cs.uiuc.edu> Changes in directory llvm/utils/TableGen: InstrInfoEmitter.cpp updated: 1.34 -> 1.35 --- Log message: If we want to emit things in enum order, use getInstructionsByEnumValue to get the order, don't compute it ourselves. Don't emit stuff like (14<<0), emit 14 instead. Don't attempt to get target properties for builtin instructions. --- Diffs of the changes: (+25 -15) InstrInfoEmitter.cpp | 40 +++++++++++++++++++++++++--------------- 1 files changed, 25 insertions(+), 15 deletions(-) Index: llvm/utils/TableGen/InstrInfoEmitter.cpp diff -u llvm/utils/TableGen/InstrInfoEmitter.cpp:1.34 llvm/utils/TableGen/InstrInfoEmitter.cpp:1.35 --- llvm/utils/TableGen/InstrInfoEmitter.cpp:1.34 Fri Dec 30 08:56:37 2005 +++ llvm/utils/TableGen/InstrInfoEmitter.cpp Thu Jan 26 19:44:09 2006 @@ -93,7 +93,6 @@ CodeGenTarget Target; const std::string &TargetName = Target.getName(); Record *InstrInfo = Target.getInstructionSet(); - Record *PHI = InstrInfo->getValueAsDef("PHIInst"); // Emit empty implicit uses and defs lists OS << "static const unsigned EmptyImpList[] = { 0 };\n"; @@ -144,19 +143,16 @@ } } - // Emit all of the TargetInstrDescriptor records. + // Emit all of the TargetInstrDescriptor records in their ENUM ordering. // OS << "\nstatic const TargetInstrDescriptor " << TargetName << "Insts[] = {\n"; - emitRecord(Target.getPHIInstruction(), 0, InstrInfo, EmittedLists, - OperandInfosEmitted, OS); + std::vector NumberedInstructions; + Target.getInstructionsByEnumValue(NumberedInstructions); - unsigned i = 0; - for (CodeGenTarget::inst_iterator II = Target.inst_begin(), - E = Target.inst_end(); II != E; ++II) - if (II->second.TheDef != PHI) - emitRecord(II->second, ++i, InstrInfo, EmittedLists, - OperandInfosEmitted, OS); + for (unsigned i = 0, e = NumberedInstructions.size(); i != e; ++i) + emitRecord(*NumberedInstructions[i], i, InstrInfo, EmittedLists, + OperandInfosEmitted, OS); OS << "};\n"; OS << "} // End llvm namespace \n"; } @@ -272,8 +268,13 @@ RecordVal *RV = R->getValue(Val->getValue()); int Shift = ShiftInt->getValue(); - if (RV == 0 || RV->getValue() == 0) - throw R->getName() + " doesn't have a field named '" + Val->getValue()+"'!"; + if (RV == 0 || RV->getValue() == 0) { + // This isn't an error if this is a builtin instruction. + if (R->getName() != "PHI" && R->getName() != "INLINEASM") + throw R->getName() + " doesn't have a field named '" + + Val->getValue() + "'!"; + return; + } Init *Value = RV->getValue(); if (BitInit *BI = dynamic_cast(Value)) { @@ -284,13 +285,22 @@ Init *I = BI->convertInitializerTo(new IntRecTy()); if (I) if (IntInit *II = dynamic_cast(I)) { - if (II->getValue()) - OS << "|(" << II->getValue() << "<<" << Shift << ")"; + if (II->getValue()) { + if (Shift) + OS << "|(" << II->getValue() << "<<" << Shift << ")"; + else + OS << "|" << II->getValue(); + } return; } } else if (IntInit *II = dynamic_cast(Value)) { - if (II->getValue()) OS << "|(" << II->getValue() << "<<" << Shift << ")"; + if (II->getValue()) { + if (Shift) + OS << "|(" << II->getValue() << "<<" << Shift << ")"; + else + OS << II->getValue(); + } return; } From lattner at cs.uiuc.edu Thu Jan 26 19:45:18 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Thu, 26 Jan 2006 19:45:18 -0600 Subject: [llvm-commits] CVS: llvm/utils/TableGen/CodeGenTarget.cpp CodeGenTarget.h Message-ID: <200601270145.TAA30337@zion.cs.uiuc.edu> Changes in directory llvm/utils/TableGen: CodeGenTarget.cpp updated: 1.53 -> 1.54 CodeGenTarget.h updated: 1.23 -> 1.24 --- Log message: PHI and INLINEASM are now builtin instructions provided by Target.td --- Diffs of the changes: (+13 -21) CodeGenTarget.cpp | 30 +++++++++++++----------------- CodeGenTarget.h | 4 ---- 2 files changed, 13 insertions(+), 21 deletions(-) Index: llvm/utils/TableGen/CodeGenTarget.cpp diff -u llvm/utils/TableGen/CodeGenTarget.cpp:1.53 llvm/utils/TableGen/CodeGenTarget.cpp:1.54 --- llvm/utils/TableGen/CodeGenTarget.cpp:1.53 Mon Jan 9 12:27:06 2006 +++ llvm/utils/TableGen/CodeGenTarget.cpp Thu Jan 26 19:45:06 2006 @@ -205,10 +205,10 @@ void CodeGenTarget::ReadInstructions() const { std::vector Insts = Records.getAllDerivedDefinitions("Instruction"); - - if (Insts.empty()) + if (Insts.size() <= 2) throw std::string("No 'Instruction' subclasses defined!"); + // Parse the instructions defined in the .td file. std::string InstFormatName = getAsmWriter()->getValueAsString("InstFormatName"); @@ -219,29 +219,25 @@ } } -/// getPHIInstruction - Return the designated PHI instruction. -/// -const CodeGenInstruction &CodeGenTarget::getPHIInstruction() const { - Record *PHI = getInstructionSet()->getValueAsDef("PHIInst"); - std::map::const_iterator I = - getInstructions().find(PHI->getName()); - if (I == Instructions.end()) - throw "Could not find PHI instruction named '" + PHI->getName() + "'!"; - return I->second; -} - /// getInstructionsByEnumValue - Return all of the instructions defined by the /// target, ordered by their enum value. void CodeGenTarget:: getInstructionsByEnumValue(std::vector &NumberedInstructions) { - + std::map::const_iterator I; + I = getInstructions().find("PHI"); + if (I == Instructions.end()) throw "Could not find 'PHI' instruction!"; + const CodeGenInstruction *PHI = &I->second; + + I = getInstructions().find("INLINEASM"); + if (I == Instructions.end()) throw "Could not find 'INLINEASM' instruction!"; + const CodeGenInstruction *INLINEASM = &I->second; + // Print out the rest of the instructions now. - unsigned i = 0; - const CodeGenInstruction *PHI = &getPHIInstruction(); NumberedInstructions.push_back(PHI); + NumberedInstructions.push_back(INLINEASM); for (inst_iterator II = inst_begin(), E = inst_end(); II != E; ++II) - if (&II->second != PHI) + if (&II->second != PHI &&&II->second != INLINEASM) NumberedInstructions.push_back(&II->second); } Index: llvm/utils/TableGen/CodeGenTarget.h diff -u llvm/utils/TableGen/CodeGenTarget.h:1.23 llvm/utils/TableGen/CodeGenTarget.h:1.24 --- llvm/utils/TableGen/CodeGenTarget.h:1.23 Wed Dec 7 20:14:08 2005 +++ llvm/utils/TableGen/CodeGenTarget.h Thu Jan 26 19:45:06 2006 @@ -148,10 +148,6 @@ &NumberedInstructions); - /// getPHIInstruction - Return the designated PHI instruction. - /// - const CodeGenInstruction &getPHIInstruction() const; - /// isLittleEndianEncoding - are instruction bit patterns defined as [0..n]? /// bool isLittleEndianEncoding() const; From lattner at cs.uiuc.edu Thu Jan 26 19:46:32 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Thu, 26 Jan 2006 19:46:32 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86.td X86InstrInfo.td Message-ID: <200601270146.TAA30461@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: X86.td updated: 1.17 -> 1.18 X86InstrInfo.td updated: 1.218 -> 1.219 --- Log message: PHI and INLINEASM are now built-in instructions provided by Target.td --- Diffs of the changes: (+0 -4) X86.td | 1 - X86InstrInfo.td | 3 --- 2 files changed, 4 deletions(-) Index: llvm/lib/Target/X86/X86.td diff -u llvm/lib/Target/X86/X86.td:1.17 llvm/lib/Target/X86/X86.td:1.18 --- llvm/lib/Target/X86/X86.td:1.17 Thu Jan 26 03:53:06 2006 +++ llvm/lib/Target/X86/X86.td Thu Jan 26 19:46:15 2006 @@ -98,7 +98,6 @@ include "X86InstrInfo.td" def X86InstrInfo : InstrInfo { - let PHIInst = PHI; // Define how we want to layout our TargetSpecific information field... This // should be kept up-to-date with the fields in the X86InstrInfo.h file. Index: llvm/lib/Target/X86/X86InstrInfo.td diff -u llvm/lib/Target/X86/X86InstrInfo.td:1.218 llvm/lib/Target/X86/X86InstrInfo.td:1.219 --- llvm/lib/Target/X86/X86InstrInfo.td:1.218 Wed Jan 25 18:29:36 2006 +++ llvm/lib/Target/X86/X86InstrInfo.td Thu Jan 26 19:46:15 2006 @@ -378,9 +378,6 @@ // Instruction list... // -// Pseudo-instructions: -def PHI : I<0, Pseudo, (ops variable_ops), "PHINODE", []>; // PHI node. - def ADJCALLSTACKDOWN : I<0, Pseudo, (ops i32imm:$amt), "#ADJCALLSTACKDOWN", [(X86callseq_start imm:$amt)]>; def ADJCALLSTACKUP : I<0, Pseudo, (ops i32imm:$amt1, i32imm:$amt2), From lattner at cs.uiuc.edu Thu Jan 26 19:46:32 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Thu, 26 Jan 2006 19:46:32 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/SparcV8/SparcV8.td SparcV8InstrInfo.td Message-ID: <200601270146.TAA30499@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/SparcV8: SparcV8.td updated: 1.8 -> 1.9 SparcV8InstrInfo.td updated: 1.103 -> 1.104 --- Log message: PHI and INLINEASM are now built-in instructions provided by Target.td --- Diffs of the changes: (+0 -3) SparcV8.td | 2 -- SparcV8InstrInfo.td | 1 - 2 files changed, 3 deletions(-) Index: llvm/lib/Target/SparcV8/SparcV8.td diff -u llvm/lib/Target/SparcV8/SparcV8.td:1.8 llvm/lib/Target/SparcV8/SparcV8.td:1.9 --- llvm/lib/Target/SparcV8/SparcV8.td:1.8 Thu Jan 26 01:22:22 2006 +++ llvm/lib/Target/SparcV8/SparcV8.td Thu Jan 26 19:46:15 2006 @@ -43,8 +43,6 @@ include "SparcV8InstrInfo.td" def SparcV8InstrInfo : InstrInfo { - let PHIInst = PHI; - // Define how we want to layout our target-specific information field. let TSFlagsFields = []; let TSFlagsShifts = []; Index: llvm/lib/Target/SparcV8/SparcV8InstrInfo.td diff -u llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.103 llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.104 --- llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.103 Sun Jan 15 03:26:27 2006 +++ llvm/lib/Target/SparcV8/SparcV8InstrInfo.td Thu Jan 26 19:46:15 2006 @@ -107,7 +107,6 @@ class Pseudo pattern> : InstV8; -def PHI : Pseudo<(ops variable_ops), "PHI", []>; def ADJCALLSTACKDOWN : Pseudo<(ops i32imm:$amt), "!ADJCALLSTACKDOWN $amt", [(callseq_start imm:$amt)]>; From lattner at cs.uiuc.edu Thu Jan 26 19:46:32 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Thu, 26 Jan 2006 19:46:32 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/Target.td Message-ID: <200601270146.TAA30471@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target: Target.td updated: 1.68 -> 1.69 --- Log message: PHI and INLINEASM are now built-in instructions provided by Target.td --- Diffs of the changes: (+11 -3) Target.td | 14 +++++++++++--- 1 files changed, 11 insertions(+), 3 deletions(-) Index: llvm/lib/Target/Target.td diff -u llvm/lib/Target/Target.td:1.68 llvm/lib/Target/Target.td:1.69 --- llvm/lib/Target/Target.td:1.68 Mon Jan 9 12:28:21 2006 +++ llvm/lib/Target/Target.td Thu Jan 26 19:46:15 2006 @@ -171,7 +171,7 @@ bit hasCtrlDep = 0; // Does this instruction r/w ctrl-flow chains? bit noResults = 0; // Does this instruction produce no results? - InstrItinClass Itinerary; // Execution steps used for scheduling. + InstrItinClass Itinerary = NoItinerary;// Execution steps used for scheduling. } /// Predicates - These are extra conditionals which are turned into instruction @@ -213,8 +213,6 @@ // which are global to the the target machine. // class InstrInfo { - Instruction PHIInst; - // If the target wants to associate some target-specific information with each // instruction, it should provide these two lists to indicate how to assemble // the target specific information into the 32 bits available. @@ -229,6 +227,16 @@ bit isLittleEndianEncoding = 0; } +// Standard Instructions. +def PHI : Instruction { + let OperandList = (ops variable_ops); + let AsmString = "PHINODE"; +} +def INLINEASM : Instruction { + let OperandList = (ops variable_ops); + let AsmString = ""; +} + //===----------------------------------------------------------------------===// // AsmWriter - This class can be implemented by targets that need to customize // the format of the .s file writer. From lattner at cs.uiuc.edu Thu Jan 26 19:46:32 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Thu, 26 Jan 2006 19:46:32 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/SparcV9/SparcV9.td SparcV9InstrInfo.td Message-ID: <200601270146.TAA30467@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/SparcV9: SparcV9.td updated: 1.37 -> 1.38 SparcV9InstrInfo.td updated: 1.1 -> 1.2 --- Log message: PHI and INLINEASM are now built-in instructions provided by Target.td --- Diffs of the changes: (+0 -5) SparcV9.td | 2 -- SparcV9InstrInfo.td | 3 --- 2 files changed, 5 deletions(-) Index: llvm/lib/Target/SparcV9/SparcV9.td diff -u llvm/lib/Target/SparcV9/SparcV9.td:1.37 llvm/lib/Target/SparcV9/SparcV9.td:1.38 --- llvm/lib/Target/SparcV9/SparcV9.td:1.37 Tue Aug 10 13:15:31 2004 +++ llvm/lib/Target/SparcV9/SparcV9.td Thu Jan 26 19:46:15 2006 @@ -31,8 +31,6 @@ include "SparcV9InstrInfo.td" def SparcV9InstrInfo : InstrInfo { - let PHIInst = PHI; - // Define how we want to layout our TargetSpecific information field. let TSFlagsFields = []; let TSFlagsShifts = []; Index: llvm/lib/Target/SparcV9/SparcV9InstrInfo.td diff -u llvm/lib/Target/SparcV9/SparcV9InstrInfo.td:1.1 llvm/lib/Target/SparcV9/SparcV9InstrInfo.td:1.2 --- llvm/lib/Target/SparcV9/SparcV9InstrInfo.td:1.1 Tue Aug 10 13:15:31 2004 +++ llvm/lib/Target/SparcV9/SparcV9InstrInfo.td Thu Jan 26 19:46:15 2006 @@ -38,9 +38,6 @@ // Instruction list //===----------------------------------------------------------------------===// -// Pseudo-instructions -def PHI : Pseudo<"phi">; - // Section A.2: Add - p137 def ADDr : F3_1<2, 0b000000, "add">; // add rs1, rs2, rd def ADDi : F3_2<2, 0b000000, "add">; // add rs1, imm, rd From lattner at cs.uiuc.edu Thu Jan 26 19:46:32 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Thu, 26 Jan 2006 19:46:32 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/Alpha/Alpha.td AlphaInstrInfo.td Message-ID: <200601270146.TAA30495@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/Alpha: Alpha.td updated: 1.6 -> 1.7 AlphaInstrInfo.td updated: 1.109 -> 1.110 --- Log message: PHI and INLINEASM are now built-in instructions provided by Target.td --- Diffs of the changes: (+0 -4) Alpha.td | 2 -- AlphaInstrInfo.td | 2 -- 2 files changed, 4 deletions(-) Index: llvm/lib/Target/Alpha/Alpha.td diff -u llvm/lib/Target/Alpha/Alpha.td:1.6 llvm/lib/Target/Alpha/Alpha.td:1.7 --- llvm/lib/Target/Alpha/Alpha.td:1.6 Wed Oct 26 12:28:23 2005 +++ llvm/lib/Target/Alpha/Alpha.td Thu Jan 26 19:46:15 2006 @@ -38,8 +38,6 @@ include "AlphaInstrInfo.td" def AlphaInstrInfo : InstrInfo { - let PHIInst = PHI; - // Define how we want to layout our target-specific information field. // let TSFlagsFields = []; // let TSFlagsShifts = []; Index: llvm/lib/Target/Alpha/AlphaInstrInfo.td diff -u llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.109 llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.110 --- llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.109 Wed Jan 25 21:24:15 2006 +++ llvm/lib/Target/Alpha/AlphaInstrInfo.td Thu Jan 26 19:46:15 2006 @@ -113,8 +113,6 @@ //Pseudo ops for selection -def PHI : PseudoInstAlpha<(ops variable_ops), "#phi", []>; - def IDEF_I : PseudoInstAlpha<(ops GPRC:$RA), "#idef $RA", [(set GPRC:$RA, (undef))]>; def IDEF_F32 : PseudoInstAlpha<(ops F4RC:$RA), "#idef $RA", From lattner at cs.uiuc.edu Thu Jan 26 19:46:32 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Thu, 26 Jan 2006 19:46:32 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/IA64/IA64.td IA64InstrInfo.td Message-ID: <200601270146.TAA30489@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/IA64: IA64.td updated: 1.6 -> 1.7 IA64InstrInfo.td updated: 1.44 -> 1.45 --- Log message: PHI and INLINEASM are now built-in instructions provided by Target.td --- Diffs of the changes: (+1 -4) IA64.td | 4 +--- IA64InstrInfo.td | 1 - 2 files changed, 1 insertion(+), 4 deletions(-) Index: llvm/lib/Target/IA64/IA64.td diff -u llvm/lib/Target/IA64/IA64.td:1.6 llvm/lib/Target/IA64/IA64.td:1.7 --- llvm/lib/Target/IA64/IA64.td:1.6 Mon Jan 23 00:11:45 2006 +++ llvm/lib/Target/IA64/IA64.td Thu Jan 26 19:46:15 2006 @@ -28,9 +28,7 @@ include "IA64InstrInfo.td" -def IA64InstrInfo : InstrInfo { - let PHIInst = PHI; -} +def IA64InstrInfo : InstrInfo { } def IA64 : Target { // The following registers are always saved across calls: Index: llvm/lib/Target/IA64/IA64InstrInfo.td diff -u llvm/lib/Target/IA64/IA64InstrInfo.td:1.44 llvm/lib/Target/IA64/IA64InstrInfo.td:1.45 --- llvm/lib/Target/IA64/IA64InstrInfo.td:1.44 Thu Jan 26 03:08:31 2006 +++ llvm/lib/Target/IA64/IA64InstrInfo.td Thu Jan 26 19:46:15 2006 @@ -448,7 +448,6 @@ // TODO: support postincrement (reg, imm9) loads+stores - this needs more // tablegen support -def PHI : PseudoInstIA64<(ops variable_ops), "PHI">; def IDEF : PseudoInstIA64<(ops variable_ops), "// IDEF">; def IDEF_GR_D : PseudoInstIA64_DAG<(ops GR:$reg), "// $reg = IDEF", From lattner at cs.uiuc.edu Thu Jan 26 19:46:32 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Thu, 26 Jan 2006 19:46:32 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCInstrFormats.td PPCInstrInfo.td Message-ID: <200601270146.TAA30477@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/PowerPC: PPCInstrFormats.td updated: 1.63 -> 1.64 PPCInstrInfo.td updated: 1.174 -> 1.175 --- Log message: PHI and INLINEASM are now built-in instructions provided by Target.td --- Diffs of the changes: (+1 -5) PPCInstrFormats.td | 3 +-- PPCInstrInfo.td | 3 --- 2 files changed, 1 insertion(+), 5 deletions(-) Index: llvm/lib/Target/PowerPC/PPCInstrFormats.td diff -u llvm/lib/Target/PowerPC/PPCInstrFormats.td:1.63 llvm/lib/Target/PowerPC/PPCInstrFormats.td:1.64 --- llvm/lib/Target/PowerPC/PPCInstrFormats.td:1.63 Mon Dec 19 18:26:01 2005 +++ llvm/lib/Target/PowerPC/PPCInstrFormats.td Thu Jan 26 19:46:15 2006 @@ -644,9 +644,8 @@ } //===----------------------------------------------------------------------===// -def NoItin : InstrItinClass; class Pseudo pattern> - : I<0, OL, asmstr, NoItin> { + : I<0, OL, asmstr, NoItinerary> { let PPC64 = 0; let VMX = 0; let Pattern = pattern; Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td diff -u llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.174 llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.175 --- llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.174 Wed Jan 11 20:05:36 2006 +++ llvm/lib/Target/PowerPC/PPCInstrInfo.td Thu Jan 26 19:46:15 2006 @@ -194,7 +194,6 @@ // PowerPC Instruction Definitions. // Pseudo-instructions: -def PHI : Pseudo<(ops variable_ops), "; PHI", []>; let isLoad = 1, hasCtrlDep = 1 in { def ADJCALLSTACKDOWN : Pseudo<(ops u16imm:$amt), @@ -1087,8 +1086,6 @@ // PowerPCInstrInfo Definition // def PowerPCInstrInfo : InstrInfo { - let PHIInst = PHI; - let TSFlagsFields = [ "VMX", "PPC64" ]; let TSFlagsShifts = [ 0, 1 ]; From lattner at cs.uiuc.edu Thu Jan 26 19:46:32 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Thu, 26 Jan 2006 19:46:32 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/Skeleton/Skeleton.td SkeletonInstrInfo.td Message-ID: <200601270146.TAA30473@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/Skeleton: Skeleton.td updated: 1.3 -> 1.4 SkeletonInstrInfo.td updated: 1.3 -> 1.4 --- Log message: PHI and INLINEASM are now built-in instructions provided by Target.td --- Diffs of the changes: (+1 -4) Skeleton.td | 4 +--- SkeletonInstrInfo.td | 1 - 2 files changed, 1 insertion(+), 4 deletions(-) Index: llvm/lib/Target/Skeleton/Skeleton.td diff -u llvm/lib/Target/Skeleton/Skeleton.td:1.3 llvm/lib/Target/Skeleton/Skeleton.td:1.4 --- llvm/lib/Target/Skeleton/Skeleton.td:1.3 Fri Sep 30 01:43:58 2005 +++ llvm/lib/Target/Skeleton/Skeleton.td Thu Jan 26 19:46:15 2006 @@ -21,9 +21,7 @@ include "SkeletonRegisterInfo.td" include "SkeletonInstrInfo.td" -def SkeletonInstrInfo : InstrInfo { - let PHIInst = PHI; -} +def SkeletonInstrInfo : InstrInfo { } def Skeleton : Target { // Pointers are 32-bits in size. Index: llvm/lib/Target/Skeleton/SkeletonInstrInfo.td diff -u llvm/lib/Target/Skeleton/SkeletonInstrInfo.td:1.3 llvm/lib/Target/Skeleton/SkeletonInstrInfo.td:1.4 --- llvm/lib/Target/Skeleton/SkeletonInstrInfo.td:1.3 Tue Sep 21 12:30:54 2004 +++ llvm/lib/Target/Skeleton/SkeletonInstrInfo.td Thu Jan 26 19:46:15 2006 @@ -32,7 +32,6 @@ } // Pseudo-instructions: -def PHI : SkelInst<"PHI", 0, (ops), Pseudo>; // PHI node... def NOP : SkelInst<"NOP", 0, (ops), Pseudo>; // No-op def ADJCALLSTACKDOWN : SkelInst<"ADJCALLSTACKDOWN", 0, (ops), Pseudo>; def ADJCALLSTACKUP : SkelInst<"ADJCALLSTACKUP", 0, (ops), Pseudo>; From lattner at cs.uiuc.edu Thu Jan 26 20:09:28 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Thu, 26 Jan 2006 20:09:28 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/AsmPrinter.h Message-ID: <200601270209.UAA30742@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/CodeGen: AsmPrinter.h updated: 1.25 -> 1.26 --- Log message: add a method --- Diffs of the changes: (+3 -0) AsmPrinter.h | 3 +++ 1 files changed, 3 insertions(+) Index: llvm/include/llvm/CodeGen/AsmPrinter.h diff -u llvm/include/llvm/CodeGen/AsmPrinter.h:1.25 llvm/include/llvm/CodeGen/AsmPrinter.h:1.26 --- llvm/include/llvm/CodeGen/AsmPrinter.h:1.25 Wed Jan 4 16:28:25 2006 +++ llvm/include/llvm/CodeGen/AsmPrinter.h Thu Jan 26 20:09:16 2006 @@ -230,6 +230,9 @@ /// void EmitGlobalConstant(const Constant* CV); + /// printInlineAsm - This method formats and prints the specified machine + /// instruction that is an inline asm. + void printInlineAsm(const MachineInstr *MI) const; private: void EmitXXStructorList(Constant *List); From lattner at cs.uiuc.edu Thu Jan 26 20:10:21 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Thu, 26 Jan 2006 20:10:21 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/AsmPrinter.cpp Message-ID: <200601270210.UAA30782@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen: AsmPrinter.cpp updated: 1.40 -> 1.41 --- Log message: Stub out a method --- Diffs of the changes: (+6 -0) AsmPrinter.cpp | 6 ++++++ 1 files changed, 6 insertions(+) Index: llvm/lib/CodeGen/AsmPrinter.cpp diff -u llvm/lib/CodeGen/AsmPrinter.cpp:1.40 llvm/lib/CodeGen/AsmPrinter.cpp:1.41 --- llvm/lib/CodeGen/AsmPrinter.cpp:1.40 Thu Jan 26 14:21:46 2006 +++ llvm/lib/CodeGen/AsmPrinter.cpp Thu Jan 26 20:10:10 2006 @@ -452,3 +452,9 @@ EmitConstantValueOnly(CV); O << "\n"; } + +/// printInlineAsm - This method formats and prints the specified machine +/// instruction that is an inline asm. +void AsmPrinter::printInlineAsm(const MachineInstr *MI) const { + O << "INLINE ASM NOT EMITTED YET!\n"; +} From lattner at cs.uiuc.edu Thu Jan 26 20:11:02 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Thu, 26 Jan 2006 20:11:02 -0600 Subject: [llvm-commits] CVS: llvm/utils/TableGen/AsmWriterEmitter.cpp Message-ID: <200601270211.UAA30868@zion.cs.uiuc.edu> Changes in directory llvm/utils/TableGen: AsmWriterEmitter.cpp updated: 1.23 -> 1.24 --- Log message: Use printInlineAsm to, well, print inline asm's. --- Diffs of the changes: (+7 -4) AsmWriterEmitter.cpp | 11 +++++++---- 1 files changed, 7 insertions(+), 4 deletions(-) Index: llvm/utils/TableGen/AsmWriterEmitter.cpp diff -u llvm/utils/TableGen/AsmWriterEmitter.cpp:1.23 llvm/utils/TableGen/AsmWriterEmitter.cpp:1.24 --- llvm/utils/TableGen/AsmWriterEmitter.cpp:1.23 Wed Nov 30 12:54:35 2005 +++ llvm/utils/TableGen/AsmWriterEmitter.cpp Thu Jan 26 20:10:50 2006 @@ -345,6 +345,9 @@ break; } + std::vector NumberedInstructions; + Target.getInstructionsByEnumValue(NumberedInstructions); + if (AllStartWithString) { // Compute the CodeGenInstruction -> AsmWriterInst mapping. Note that not // all machine instructions are necessarily being printed, so there may be @@ -354,9 +357,6 @@ CGIAWIMap.insert(std::make_pair(Instructions[i].CGI, &Instructions[i])); // Emit a table of constant strings. - std::vector NumberedInstructions; - Target.getInstructionsByEnumValue(NumberedInstructions); - O << " static const char * const OpStrs[] = {\n"; for (unsigned i = 0, e = NumberedInstructions.size(); i != e; ++i) { AsmWriterInst *AWI = CGIAWIMap[NumberedInstructions[i]]; @@ -380,8 +380,11 @@ // elements in the vector. std::reverse(Instructions.begin(), Instructions.end()); + // Find the opcode # of inline asm O << " switch (MI->getOpcode()) {\n" - " default: return false;\n"; + " default: return false;\n" + " case " << NumberedInstructions.back()->Namespace + << "::INLINEASM: printInlineAsm(MI); break;\n"; while (!Instructions.empty()) EmitInstructions(Instructions, O); From evan.cheng at apple.com Fri Jan 27 02:09:57 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Fri, 27 Jan 2006 02:09:57 -0600 Subject: [llvm-commits] CVS: llvm/utils/TableGen/SubtargetEmitter.cpp Message-ID: <200601270809.CAA02524@zion.cs.uiuc.edu> Changes in directory llvm/utils/TableGen: SubtargetEmitter.cpp updated: 1.16 -> 1.17 --- Log message: Subtarget feature can now set any variable to any value --- Diffs of the changes: (+4 -3) SubtargetEmitter.cpp | 7 ++++--- 1 files changed, 4 insertions(+), 3 deletions(-) Index: llvm/utils/TableGen/SubtargetEmitter.cpp diff -u llvm/utils/TableGen/SubtargetEmitter.cpp:1.16 llvm/utils/TableGen/SubtargetEmitter.cpp:1.17 --- llvm/utils/TableGen/SubtargetEmitter.cpp:1.16 Thu Jan 26 19:41:55 2006 +++ llvm/utils/TableGen/SubtargetEmitter.cpp Fri Jan 27 02:09:42 2006 @@ -473,10 +473,11 @@ Record *R = Features[i]; std::string Instance = R->getName(); std::string Name = R->getValueAsString("Name"); - std::string Type = R->getValueAsString("Type"); + std::string Value = R->getValueAsString("Value"); std::string Attribute = R->getValueAsString("Attribute"); - - OS << " " << Attribute << " = (Bits & " << Instance << ") != 0;\n"; + + OS << " if ((Bits & " << Instance << ") != 0) " + << Attribute << " = " << Value << ";\n"; } if (HasItineraries) { From evan.cheng at apple.com Fri Jan 27 02:09:57 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Fri, 27 Jan 2006 02:09:57 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/SparcV8/SparcV8.td Message-ID: <200601270809.CAA02519@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/SparcV8: SparcV8.td updated: 1.9 -> 1.10 --- Log message: Subtarget feature can now set any variable to any value --- Diffs of the changes: (+3 -3) SparcV8.td | 6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-) Index: llvm/lib/Target/SparcV8/SparcV8.td diff -u llvm/lib/Target/SparcV8/SparcV8.td:1.9 llvm/lib/Target/SparcV8/SparcV8.td:1.10 --- llvm/lib/Target/SparcV8/SparcV8.td:1.9 Thu Jan 26 19:46:15 2006 +++ llvm/lib/Target/SparcV8/SparcV8.td Fri Jan 27 02:09:42 2006 @@ -21,13 +21,13 @@ // def FeatureV9 - : SubtargetFeature<"v9", "bool", "IsV9", + : SubtargetFeature<"v9", "IsV9", "true", "Enable SPARC-V9 instructions">; def FeatureV8Deprecated - : SubtargetFeature<"deprecated-v8", "bool", "V8DeprecatedInsts", + : SubtargetFeature<"deprecated-v8", "V8DeprecatedInsts", "true", "Enable deprecated V8 instructions in V9 mode">; def FeatureVIS - : SubtargetFeature<"vis", "bool", "IsVIS", + : SubtargetFeature<"vis", "IsVIS", "true", "Enable UltraSPARC Visual Instruction Set extensions">; //===----------------------------------------------------------------------===// From evan.cheng at apple.com Fri Jan 27 02:09:57 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Fri, 27 Jan 2006 02:09:57 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPC.td Message-ID: <200601270809.CAA02532@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/PowerPC: PPC.td updated: 1.10 -> 1.11 --- Log message: Subtarget feature can now set any variable to any value --- Diffs of the changes: (+5 -5) PPC.td | 10 +++++----- 1 files changed, 5 insertions(+), 5 deletions(-) Index: llvm/lib/Target/PowerPC/PPC.td diff -u llvm/lib/Target/PowerPC/PPC.td:1.10 llvm/lib/Target/PowerPC/PPC.td:1.11 --- llvm/lib/Target/PowerPC/PPC.td:1.10 Wed Oct 26 12:28:23 2005 +++ llvm/lib/Target/PowerPC/PPC.td Fri Jan 27 02:09:42 2006 @@ -19,15 +19,15 @@ // PowerPC Subtarget features. // -def Feature64Bit : SubtargetFeature<"64bit", "bool", "Is64Bit", +def Feature64Bit : SubtargetFeature<"64bit","Is64Bit", "true", "Enable 64-bit instructions">; -def Feature64BitRegs : SubtargetFeature<"64bitregs", "bool", "Has64BitRegs", +def Feature64BitRegs : SubtargetFeature<"64bitregs","Has64BitRegs", "true", "Enable 64-bit registers [beta]">; -def FeatureAltivec : SubtargetFeature<"altivec", "bool", "HasAltivec", +def FeatureAltivec : SubtargetFeature<"altivec","HasAltivec", "true", "Enable Altivec instructions">; -def FeatureGPUL : SubtargetFeature<"gpul", "bool", "IsGigaProcessor", +def FeatureGPUL : SubtargetFeature<"gpul","IsGigaProcessor", "true", "Enable GPUL instructions">; -def FeatureFSqrt : SubtargetFeature<"fsqrt", "bool", "HasFSQRT", +def FeatureFSqrt : SubtargetFeature<"fsqrt","HasFSQRT", "true", "Enable the fsqrt instruction">; //===----------------------------------------------------------------------===// From evan.cheng at apple.com Fri Jan 27 02:09:58 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Fri, 27 Jan 2006 02:09:58 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/Target.td Message-ID: <200601270809.CAA02536@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target: Target.td updated: 1.69 -> 1.70 --- Log message: Subtarget feature can now set any variable to any value --- Diffs of the changes: (+5 -5) Target.td | 10 +++++----- 1 files changed, 5 insertions(+), 5 deletions(-) Index: llvm/lib/Target/Target.td diff -u llvm/lib/Target/Target.td:1.69 llvm/lib/Target/Target.td:1.70 --- llvm/lib/Target/Target.td:1.69 Thu Jan 26 19:46:15 2006 +++ llvm/lib/Target/Target.td Fri Jan 27 02:09:42 2006 @@ -287,20 +287,20 @@ //===----------------------------------------------------------------------===// // SubtargetFeature - A characteristic of the chip set. // -class SubtargetFeature { +class SubtargetFeature { // Name - Feature name. Used by command line (-mattr=) to determine the // appropriate target chip. // string Name = n; - // Type - Type of attribute to be set by feature. - // - string Type = t; - // Attribute - Attribute to be set by feature. // string Attribute = a; + // Value - Value the attribute to be set to by feature. + // + string Value = v; + // Desc - Feature description. Used by command line (-mattr=) to display help // information. // From evan.cheng at apple.com Fri Jan 27 02:09:58 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Fri, 27 Jan 2006 02:09:58 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/Alpha/Alpha.td Message-ID: <200601270809.CAA02542@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/Alpha: Alpha.td updated: 1.7 -> 1.8 --- Log message: Subtarget feature can now set any variable to any value --- Diffs of the changes: (+2 -2) Alpha.td | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/lib/Target/Alpha/Alpha.td diff -u llvm/lib/Target/Alpha/Alpha.td:1.7 llvm/lib/Target/Alpha/Alpha.td:1.8 --- llvm/lib/Target/Alpha/Alpha.td:1.7 Thu Jan 26 19:46:15 2006 +++ llvm/lib/Target/Alpha/Alpha.td Fri Jan 27 02:09:42 2006 @@ -20,9 +20,9 @@ // Subtarget Features //===----------------------------------------------------------------------===// -def FeatureCIX : SubtargetFeature<"CIX", "bool", "HasCT", +def FeatureCIX : SubtargetFeature<"CIX", "HasCT", "true", "Enable CIX extentions">; -def FeatureFIX : SubtargetFeature<"FIX", "bool", "HasF2I", +def FeatureFIX : SubtargetFeature<"FIX", "HasF2I", "true", "Enable FIX extentions">; //===----------------------------------------------------------------------===// From evan.cheng at apple.com Fri Jan 27 02:10:58 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Fri, 27 Jan 2006 02:10:58 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86.h X86.td X86ISelDAGToDAG.cpp X86ISelLowering.cpp X86ISelLowering.h X86ISelPattern.cpp X86InstrInfo.td X86Subtarget.cpp X86Subtarget.h X86TargetMachine.cpp Message-ID: <200601270810.CAA02984@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: X86.h updated: 1.40 -> 1.41 X86.td updated: 1.18 -> 1.19 X86ISelDAGToDAG.cpp updated: 1.36 -> 1.37 X86ISelLowering.cpp updated: 1.58 -> 1.59 X86ISelLowering.h updated: 1.16 -> 1.17 X86ISelPattern.cpp updated: 1.201 -> 1.202 X86InstrInfo.td updated: 1.219 -> 1.220 X86Subtarget.cpp updated: 1.9 -> 1.10 X86Subtarget.h updated: 1.8 -> 1.9 X86TargetMachine.cpp updated: 1.98 -> 1.99 --- Log message: x86 CPU detection and proper subtarget support --- Diffs of the changes: (+135 -129) X86.h | 6 -- X86.td | 50 ++++++++++++------------ X86ISelDAGToDAG.cpp | 2 X86ISelLowering.cpp | 7 ++- X86ISelLowering.h | 8 +++ X86ISelPattern.cpp | 4 + X86InstrInfo.td | 8 +-- X86Subtarget.cpp | 105 ++++++++++++++++++++++++++++++--------------------- X86Subtarget.h | 37 +++++++++++------ X86TargetMachine.cpp | 37 ----------------- 10 files changed, 135 insertions(+), 129 deletions(-) Index: llvm/lib/Target/X86/X86.h diff -u llvm/lib/Target/X86/X86.h:1.40 llvm/lib/Target/X86/X86.h:1.41 --- llvm/lib/Target/X86/X86.h:1.40 Thu Jan 26 03:53:06 2006 +++ llvm/lib/Target/X86/X86.h Fri Jan 27 02:10:46 2006 @@ -25,12 +25,6 @@ class IntrinsicLowering; class MachineCodeEmitter; -enum X86VectorEnum { - AutoDetect, NoSSE, SSE, SSE2, SSE3 -}; - -extern X86VectorEnum X86Vector; -extern bool X86ScalarSSE; extern bool X86DAGIsel; /// createX86ISelPattern - This pass converts an LLVM function into a Index: llvm/lib/Target/X86/X86.td diff -u llvm/lib/Target/X86/X86.td:1.18 llvm/lib/Target/X86/X86.td:1.19 --- llvm/lib/Target/X86/X86.td:1.18 Thu Jan 26 19:46:15 2006 +++ llvm/lib/Target/X86/X86.td Fri Jan 27 02:10:46 2006 @@ -20,19 +20,19 @@ // X86 Subtarget features. // -def Feature64Bit : SubtargetFeature<"64bit", "bool", "Is64Bit", - "Enable 64-bit instructions">; -def FeatureMMX : SubtargetFeature<"mmx", "bool", "HasMMX", +def Feature64Bit : SubtargetFeature<"64bit", "Is64Bit", "true", + "Enabl e 64-bit instructions">; +def FeatureMMX : SubtargetFeature<"mmx","X86SSELevel", "MMX", "Enable MMX instructions">; -def FeatureSSE : SubtargetFeature<"sse", "bool", "HasSSE", +def FeatureSSE : SubtargetFeature<"sse", "X86SSELevel", "SSE", "Enable SSE instructions">; -def FeatureSSE2 : SubtargetFeature<"sse2", "bool", "HasSSE2", +def FeatureSSE2 : SubtargetFeature<"sse2", "X86SSELevel", "SSE2", "Enable SSE2 instructions">; -def FeatureSSE3 : SubtargetFeature<"sse3", "bool", "HasSSE3", +def FeatureSSE3 : SubtargetFeature<"sse3", "X86SSELevel", "SSE3", "Enable SSE3 instructions">; -def Feature3DNow : SubtargetFeature<"3dnow", "bool", "Has3DNow", +def Feature3DNow : SubtargetFeature<"3dnow", "X863DNowLevel", "ThreeDNow", "Enable 3DNow! instructions">; -def Feature3DNowA : SubtargetFeature<"3dnowa", "bool", "Has3DNowA", +def Feature3DNowA : SubtargetFeature<"3dnowa", "X863DNowLevel", "ThreeDNowA", "Enable 3DNow! Athlon instructions">; //===----------------------------------------------------------------------===// @@ -45,21 +45,20 @@ def : Proc<"generic", []>; def : Proc<"i386", []>; def : Proc<"i486", []>; -def : Proc<"i586", []>; def : Proc<"pentium", []>; def : Proc<"pentium-mmx", [FeatureMMX]>; def : Proc<"i686", []>; def : Proc<"pentiumpro", []>; def : Proc<"pentium2", [FeatureMMX]>; -def : Proc<"celeron", [FeatureMMX]>; def : Proc<"pentium3", [FeatureMMX, FeatureSSE]>; -def : Proc<"pentium3m", [FeatureMMX, FeatureSSE]>; def : Proc<"pentium-m", [FeatureMMX, FeatureSSE, FeatureSSE2]>; def : Proc<"pentium4", [FeatureMMX, FeatureSSE, FeatureSSE2]>; -def : Proc<"pentium4m", [FeatureMMX, FeatureSSE, FeatureSSE2]>; +def : Proc<"x86-64", [FeatureMMX, FeatureSSE, FeatureSSE2, + Feature64Bit]>; +def : Proc<"yonah", [FeatureMMX, FeatureSSE, FeatureSSE2, + FeatureSSE3]>; def : Proc<"prescott", [FeatureMMX, FeatureSSE, FeatureSSE2, FeatureSSE3]>; -def : Proc<"x86-64", [FeatureMMX, FeatureSSE, FeatureSSE2, Feature64Bit]>; def : Proc<"nocona", [FeatureMMX, FeatureSSE, FeatureSSE2, FeatureSSE3, Feature64Bit]>; @@ -68,17 +67,20 @@ def : Proc<"k6-3", [FeatureMMX, Feature3DNow]>; def : Proc<"athlon", [FeatureMMX, Feature3DNow, Feature3DNowA]>; def : Proc<"athlon-tbird", [FeatureMMX, Feature3DNow, Feature3DNowA]>; -def : Proc<"athlon-4", [FeatureMMX, FeatureSSE, Feature3DNow, Feature3DNowA]>; -def : Proc<"athlon-xp", [FeatureMMX, FeatureSSE, Feature3DNow, Feature3DNowA]>; -def : Proc<"athlon-mp", [FeatureMMX, FeatureSSE, Feature3DNow, Feature3DNowA]>; -def : Proc<"k8", [FeatureMMX, FeatureSSE, FeatureSSE2, Feature3DNow, - Feature3DNowA, Feature64Bit]>; -def : Proc<"opteron", [FeatureMMX, FeatureSSE, FeatureSSE2, Feature3DNow, - Feature3DNowA, Feature64Bit]>; -def : Proc<"athlon64", [FeatureMMX, FeatureSSE, FeatureSSE2, Feature3DNow, - Feature3DNowA, Feature64Bit]>; -def : Proc<"athlon-fx", [FeatureMMX, FeatureSSE, FeatureSSE2, Feature3DNow, - Feature3DNowA, Feature64Bit]>; +def : Proc<"athlon-4", [FeatureMMX, FeatureSSE, Feature3DNow, + Feature3DNowA]>; +def : Proc<"athlon-xp", [FeatureMMX, FeatureSSE, Feature3DNow, + Feature3DNowA]>; +def : Proc<"athlon-mp", [FeatureMMX, FeatureSSE, Feature3DNow, + Feature3DNowA]>; +def : Proc<"k8", [FeatureMMX, FeatureSSE, FeatureSSE2, + Feature3DNow, Feature3DNowA, Feature64Bit]>; +def : Proc<"opteron", [FeatureMMX, FeatureSSE, FeatureSSE2, + Feature3DNow, Feature3DNowA, Feature64Bit]>; +def : Proc<"athlon64", [FeatureMMX, FeatureSSE, FeatureSSE2, + Feature3DNow, Feature3DNowA, Feature64Bit]>; +def : Proc<"athlon-fx", [FeatureMMX, FeatureSSE, FeatureSSE2, + Feature3DNow, Feature3DNowA, Feature64Bit]>; def : Proc<"winchip-c6", [FeatureMMX]>; def : Proc<"winchip2", [FeatureMMX, Feature3DNow]>; Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp diff -u llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.36 llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.37 --- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.36 Sun Jan 22 17:37:17 2006 +++ llvm/lib/Target/X86/X86ISelDAGToDAG.cpp Fri Jan 27 02:10:46 2006 @@ -161,7 +161,7 @@ // If we are emitting FP stack code, scan the basic block to determine if this // block defines any FP values. If so, put an FP_REG_KILL instruction before // the terminator of the block. - if (X86Vector < SSE2) { + if (!Subtarget->hasSSE2()) { // Note that FP stack instructions *are* used in SSE code when returning // values, but these are not live out of the basic block, so we don't need // an FP_REG_KILL in this case either. Index: llvm/lib/Target/X86/X86ISelLowering.cpp diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.58 llvm/lib/Target/X86/X86ISelLowering.cpp:1.59 --- llvm/lib/Target/X86/X86ISelLowering.cpp:1.58 Wed Jan 25 20:13:10 2006 +++ llvm/lib/Target/X86/X86ISelLowering.cpp Fri Jan 27 02:10:46 2006 @@ -33,6 +33,9 @@ X86TargetLowering::X86TargetLowering(TargetMachine &TM) : TargetLowering(TM) { + Subtarget = &TM.getSubtarget(); + X86ScalarSSE = Subtarget->hasSSE2(); + // Set up the TargetLowering object. // X86 is weird, it always uses i8 for shift amounts and setcc results. @@ -1657,8 +1660,8 @@ case ISD::SELECT: { MVT::ValueType VT = Op.getValueType(); bool isFP = MVT::isFloatingPoint(VT); - bool isFPStack = isFP && (X86Vector < SSE2); - bool isFPSSE = isFP && (X86Vector >= SSE2); + bool isFPStack = isFP && !X86ScalarSSE; + bool isFPSSE = isFP && X86ScalarSSE; bool addTest = false; SDOperand Op0 = Op.getOperand(0); SDOperand Cond, CC; Index: llvm/lib/Target/X86/X86ISelLowering.h diff -u llvm/lib/Target/X86/X86ISelLowering.h:1.16 llvm/lib/Target/X86/X86ISelLowering.h:1.17 --- llvm/lib/Target/X86/X86ISelLowering.h:1.16 Wed Jan 25 12:21:52 2006 +++ llvm/lib/Target/X86/X86ISelLowering.h Fri Jan 27 02:10:46 2006 @@ -15,6 +15,7 @@ #ifndef X86ISELLOWERING_H #define X86ISELLOWERING_H +#include "X86Subtarget.h" #include "llvm/Target/TargetLowering.h" #include "llvm/CodeGen/SelectionDAG.h" @@ -227,6 +228,13 @@ std::pair LowerFastCCCallTo(SDOperand Chain, const Type *RetTy, bool isTailCall, SDOperand Callee, ArgListTy &Args, SelectionDAG &DAG); + + /// Subtarget - Keep a pointer to the X86Subtarget around so that we can + /// make the right decision when generating code for different targets. + const X86Subtarget *Subtarget; + + /// X86ScalarSSE - Select between SSE2 or x87 floating point ops. + bool X86ScalarSSE; }; } Index: llvm/lib/Target/X86/X86ISelPattern.cpp diff -u llvm/lib/Target/X86/X86ISelPattern.cpp:1.201 llvm/lib/Target/X86/X86ISelPattern.cpp:1.202 --- llvm/lib/Target/X86/X86ISelPattern.cpp:1.201 Wed Jan 25 02:00:36 2006 +++ llvm/lib/Target/X86/X86ISelPattern.cpp Fri Jan 27 02:10:46 2006 @@ -101,9 +101,13 @@ /// Subtarget - Keep a pointer to the X86Subtarget around so that we can /// make the right decision when generating code for different targets. const X86Subtarget *Subtarget; + + /// X86ScalarSSE - Select between SSE2 or x87 floating point ops. + bool X86ScalarSSE; public: ISel(TargetMachine &TM) : SelectionDAGISel(X86Lowering), X86Lowering(TM) { Subtarget = &TM.getSubtarget(); + X86ScalarSSE = Subtarget->hasSSE2(); } virtual const char *getPassName() const { Index: llvm/lib/Target/X86/X86InstrInfo.td diff -u llvm/lib/Target/X86/X86InstrInfo.td:1.219 llvm/lib/Target/X86/X86InstrInfo.td:1.220 --- llvm/lib/Target/X86/X86InstrInfo.td:1.219 Thu Jan 26 19:46:15 2006 +++ llvm/lib/Target/X86/X86InstrInfo.td Fri Jan 27 02:10:46 2006 @@ -189,10 +189,10 @@ //===----------------------------------------------------------------------===// // X86 Instruction Predicate Definitions. -def HasSSE1 : Predicate<"X86Vector >= SSE">; -def HasSSE2 : Predicate<"X86Vector >= SSE2">; -def HasSSE3 : Predicate<"X86Vector >= SSE3">; -def FPStack : Predicate<"X86Vector < SSE2">; +def HasSSE1 : Predicate<"Subtarget->hasSSE()">; +def HasSSE2 : Predicate<"Subtarget->hasSSE2()">; +def HasSSE3 : Predicate<"Subtarget->hasSSE3()">; +def FPStack : Predicate<"!Subtarget->hasSSE2()">; //===----------------------------------------------------------------------===// // X86 specific pattern fragments. Index: llvm/lib/Target/X86/X86Subtarget.cpp diff -u llvm/lib/Target/X86/X86Subtarget.cpp:1.9 llvm/lib/Target/X86/X86Subtarget.cpp:1.10 --- llvm/lib/Target/X86/X86Subtarget.cpp:1.9 Thu Jan 26 03:53:06 2006 +++ llvm/lib/Target/X86/X86Subtarget.cpp Fri Jan 27 02:10:46 2006 @@ -16,57 +16,78 @@ #include "X86GenSubtarget.inc" using namespace llvm; -#if defined(__APPLE__) -#include -#include -#include -#include +static void GetCpuIDAndInfo(unsigned value, unsigned *EAX, unsigned *EBX, + unsigned *ECX, unsigned *EDX) { +#if defined(i386) || defined(__i386__) || defined(__x86__) || defined(_M_IX86) +#if defined(__GNUC__) + asm ("pushl\t%%ebx\n\t" + "cpuid\n\t" + "popl\t%%ebx" + : "=a" (*EAX), +#if !defined(__DYNAMIC__) // This works around a gcc -fPIC bug + "=b" (*EBX), +#endif + "=c" (*ECX), + "=d" (*EDX) + : "a" (value)); +#endif +#endif +} -/// GetCurrentX86CPU - Returns the current CPUs features. static const char *GetCurrentX86CPU() { - host_basic_info_data_t hostInfo; - mach_msg_type_number_t infoCount; - - infoCount = HOST_BASIC_INFO_COUNT; - host_info(mach_host_self(), HOST_BASIC_INFO, (host_info_t)&hostInfo, - &infoCount); - - if (hostInfo.cpu_type != CPU_TYPE_I386) return "generic"; - - switch(hostInfo.cpu_subtype) { - case CPU_SUBTYPE_386: return "i386"; - case CPU_SUBTYPE_486: - case CPU_SUBTYPE_486SX: return "i486"; - case CPU_SUBTYPE_PENT: return "pentium"; - case CPU_SUBTYPE_PENTPRO: return "pentiumpro"; - case CPU_SUBTYPE_PENTII_M3: return "pentium2"; - case CPU_SUBTYPE_PENTII_M5: return "pentium2"; - case CPU_SUBTYPE_CELERON: - case CPU_SUBTYPE_CELERON_MOBILE: return "celeron"; - case CPU_SUBTYPE_PENTIUM_3: return "pentium3"; - case CPU_SUBTYPE_PENTIUM_3_M: return "pentium3m"; - case CPU_SUBTYPE_PENTIUM_3_XEON: return "pentium3"; // FIXME: not sure. - case CPU_SUBTYPE_PENTIUM_M: return "pentium-m"; - case CPU_SUBTYPE_PENTIUM_4: return "pentium4"; - case CPU_SUBTYPE_PENTIUM_4_M: return "pentium4m"; - // FIXME: prescott, yonah? Check CPU_THREADTYPE_INTEL_HTT? - case CPU_SUBTYPE_XEON: - case CPU_SUBTYPE_XEON_MP: return "nocona"; - default: ; + unsigned EAX = 0, DUMMY = 0, ECX = 0, EDX = 0; + GetCpuIDAndInfo(0x1, &EAX, &DUMMY, &ECX, &EDX); + unsigned Family = (EAX & (0xffffffff >> (32 - 4)) << 8) >> 8; // Bits 8 - 11 + unsigned Model = (EAX & (0xffffffff >> (32 - 4)) << 4) >> 4; // Bits 4 - 7 + GetCpuIDAndInfo(0x80000001, &EAX, &DUMMY, &ECX, &EDX); + bool Em64T = EDX & (1 << 29); + + switch (Family) { + case 3: + return "i386"; + case 4: + return "i486"; + case 5: + switch (Model) { + case 4: return "pentium-mmx"; + default: return "pentium"; + } + break; + case 6: + switch (Model) { + case 1: return "pentiumpro"; + case 3: + case 5: + case 6: return "pentium2"; + case 7: + case 8: + case 10: + case 11: return "pentium3"; + case 9: + case 13: return "pentium-m"; + case 14: return "yonah"; + default: return "i686"; + } + case 15: { + switch (Model) { + case 3: + case 4: + return (Em64T) ? "nocona" : "prescott"; + default: + return (Em64T) ? "x86-64" : "pentium4"; + } + } + + default: + return "generic"; } - - return "generic"; } -#endif X86Subtarget::X86Subtarget(const Module &M, const std::string &FS) : stackAlignment(8), indirectExternAndWeakGlobals(false) { // Determine default and user specified characteristics - std::string CPU = "generic"; -#if defined(__APPLE__) - CPU = GetCurrentX86CPU(); -#endif + std::string CPU = GetCurrentX86CPU(); // Parse features string. ParseSubtargetFeatures(FS, CPU); Index: llvm/lib/Target/X86/X86Subtarget.h diff -u llvm/lib/Target/X86/X86Subtarget.h:1.8 llvm/lib/Target/X86/X86Subtarget.h:1.9 --- llvm/lib/Target/X86/X86Subtarget.h:1.8 Thu Jan 26 03:53:06 2006 +++ llvm/lib/Target/X86/X86Subtarget.h Fri Jan 27 02:10:46 2006 @@ -23,6 +23,23 @@ class X86Subtarget : public TargetSubtarget { protected: + enum X86SSEEnum { + NoMMXSSE, MMX, SSE, SSE2, SSE3 + }; + + enum X863DNowEnum { + NoThreeDNow, ThreeDNow, ThreeDNowA + }; + + /// X86SSELevel - MMX, SSE, SSE2, SSE3, or none supported. + X86SSEEnum X86SSELevel; + + /// X863DNowLevel - 3DNow or 3DNow Athlon, or none supported. + X863DNowEnum X863DNowLevel; + + /// Is64Bit - True if the processor supports Em64T. + bool Is64Bit; + /// stackAlignment - The minimum alignment known to hold of the stack frame on /// entry to the function and which must be maintained by every function. unsigned stackAlignment; @@ -30,14 +47,6 @@ /// Used by instruction selector bool indirectExternAndWeakGlobals; - /// Arch. features used by isel. - bool Is64Bit; - bool HasMMX; - bool HasSSE; - bool HasSSE2; - bool HasSSE3; - bool Has3DNow; - bool Has3DNowA; public: enum { isELF, isCygwin, isDarwin, isWindows @@ -66,12 +75,12 @@ bool is64Bit() const { return Is64Bit; } - bool hasMMX() const { return HasMMX; } - bool hasSSE() const { return HasSSE; } - bool hasSSE2() const { return HasSSE2; } - bool hasSSE3() const { return HasSSE3; } - bool has3DNow() const { return Has3DNow; } - bool has3DNowA() const { return Has3DNowA; } + bool hasMMX() const { return X86SSELevel >= MMX; } + bool hasSSE() const { return X86SSELevel >= SSE; } + bool hasSSE2() const { return X86SSELevel >= SSE2; } + bool hasSSE3() const { return X86SSELevel >= SSE3; } + bool has3DNow() const { return X863DNowLevel >= ThreeDNow; } + bool has3DNowA() const { return X863DNowLevel >= ThreeDNowA; } }; } // End llvm namespace Index: llvm/lib/Target/X86/X86TargetMachine.cpp diff -u llvm/lib/Target/X86/X86TargetMachine.cpp:1.98 llvm/lib/Target/X86/X86TargetMachine.cpp:1.99 --- llvm/lib/Target/X86/X86TargetMachine.cpp:1.98 Thu Jan 26 03:53:06 2006 +++ llvm/lib/Target/X86/X86TargetMachine.cpp Fri Jan 27 02:10:46 2006 @@ -26,8 +26,6 @@ #include using namespace llvm; -X86VectorEnum llvm::X86Vector = AutoDetect; -bool llvm::X86ScalarSSE = false; bool llvm::X86DAGIsel = false; /// X86TargetMachineModule - Note that this is used on hosts that cannot link @@ -41,28 +39,11 @@ cl::opt DisableOutput("disable-x86-llc-output", cl::Hidden, cl::desc("Disable the X86 asm printer, for use " "when profiling the code generator.")); - cl::opt EnableSSEFP("enable-sse-scalar-fp", - cl::desc("Perform FP math in SSE regs instead of the FP stack"), - cl::location(X86ScalarSSE), - cl::init(false)); - cl::opt EnableX86DAGDAG("enable-x86-dag-isel", cl::Hidden, cl::desc("Enable DAG-to-DAG isel for X86"), cl::location(X86DAGIsel), cl::init(false)); - // FIXME: This should eventually be handled with target triples and - // subtarget support! - cl::opt - SSEArg( - cl::desc("Enable SSE support in the X86 target:"), - cl::values( - clEnumValN(SSE, "sse", " Enable SSE support"), - clEnumValN(SSE2, "sse2", " Enable SSE and SSE2 support"), - clEnumValN(SSE3, "sse3", " Enable SSE, SSE2, and SSE3 support"), - clEnumValEnd), - cl::location(X86Vector), cl::init(AutoDetect)); - // Register the target. RegisterTarget X("x86", " IA-32 (Pentium and above)"); } @@ -101,23 +82,7 @@ Subtarget(M, FS), FrameInfo(TargetFrameInfo::StackGrowsDown, Subtarget.getStackAlignment(), -4), - JITInfo(*this) { - if (X86Vector == AutoDetect) { - X86Vector = NoSSE; - if (Subtarget.hasSSE()) - X86Vector = SSE; - if (Subtarget.hasSSE2()) - X86Vector = SSE2; - if (Subtarget.hasSSE3()) - X86Vector = SSE3; - } - - // Scalar SSE FP requires at least SSE2 - X86ScalarSSE &= X86Vector >= SSE2; - - // Ignore -enable-sse-scalar-fp if -enable-x86-dag-isel. - X86ScalarSSE |= (X86DAGIsel && X86Vector >= SSE2); -} + JITInfo(*this) {} // addPassesToEmitFile - We currently use all of the same passes as the JIT From reid at x10sys.com Fri Jan 27 05:27:50 2006 From: reid at x10sys.com (Reid Spencer) Date: Fri, 27 Jan 2006 05:27:50 -0600 Subject: [llvm-commits] CVS: llvm/test/Regression/Bytecode/old-intrinsics.ll Message-ID: <200601271127.FAA00732@zion.cs.uiuc.edu> Changes in directory llvm/test/Regression/Bytecode: old-intrinsics.ll updated: 1.4 -> 1.5 --- Log message: This now passes. --- Diffs of the changes: (+0 -3) old-intrinsics.ll | 3 --- 1 files changed, 3 deletions(-) Index: llvm/test/Regression/Bytecode/old-intrinsics.ll diff -u llvm/test/Regression/Bytecode/old-intrinsics.ll:1.4 llvm/test/Regression/Bytecode/old-intrinsics.ll:1.5 --- llvm/test/Regression/Bytecode/old-intrinsics.ll:1.4 Tue Jan 24 00:13:48 2006 +++ llvm/test/Regression/Bytecode/old-intrinsics.ll Fri Jan 27 05:27:37 2006 @@ -1,6 +1,3 @@ ; RUN: llvm-dis %s.bc-16 -o /dev/null -f && ; RUN: llc %s.bc-16 -o /dev/null -f -march=c ; Just see if we can disassemble the bc file corresponding to this file. - -; XFAIL: * - From reid at x10sys.com Fri Jan 27 05:29:01 2006 From: reid at x10sys.com (Reid Spencer) Date: Fri, 27 Jan 2006 05:29:01 -0600 Subject: [llvm-commits] CVS: llvm/test/Regression/Bytecode/signed-intrinsics.ll signed-intrinsics.ll.bc-16 Message-ID: <200601271129.FAA00773@zion.cs.uiuc.edu> Changes in directory llvm/test/Regression/Bytecode: signed-intrinsics.ll added (r1.1) signed-intrinsics.ll.bc-16 added (r1.1) --- Log message: A test case for ensuring that conversion of old-format intrinsics with signed arguments get auto-upgraded correctly. --- Diffs of the changes: (+3 -0) signed-intrinsics.ll | 3 +++ signed-intrinsics.ll.bc-16 | 0 2 files changed, 3 insertions(+) Index: llvm/test/Regression/Bytecode/signed-intrinsics.ll diff -c /dev/null llvm/test/Regression/Bytecode/signed-intrinsics.ll:1.1 *** /dev/null Fri Jan 27 05:28:58 2006 --- llvm/test/Regression/Bytecode/signed-intrinsics.ll Fri Jan 27 05:28:48 2006 *************** *** 0 **** --- 1,3 ---- + ; RUN: llvm-dis %s.bc-16 -o /dev/null -f && + ; RUN: llc %s.bc-16 -o /dev/null -f -march=c + ; Just see if we can disassemble the bc file corresponding to this file. Index: llvm/test/Regression/Bytecode/signed-intrinsics.ll.bc-16 From reid at x10sys.com Fri Jan 27 05:49:40 2006 From: reid at x10sys.com (Reid Spencer) Date: Fri, 27 Jan 2006 05:49:40 -0600 Subject: [llvm-commits] CVS: llvm/lib/Bytecode/Reader/Reader.cpp Reader.h Message-ID: <200601271149.FAA02991@zion.cs.uiuc.edu> Changes in directory llvm/lib/Bytecode/Reader: Reader.cpp updated: 1.187 -> 1.188 Reader.h updated: 1.27 -> 1.28 --- Log message: Fix auto-upgrade of intrinsics to work properly with both assembly and bytecode reading. This code is crufty, the result of much hacking to get things working correctly. Cleanup patches will follow. --- Diffs of the changes: (+33 -18) Reader.cpp | 45 ++++++++++++++++++++++++++++++--------------- Reader.h | 6 +++--- 2 files changed, 33 insertions(+), 18 deletions(-) Index: llvm/lib/Bytecode/Reader/Reader.cpp diff -u llvm/lib/Bytecode/Reader/Reader.cpp:1.187 llvm/lib/Bytecode/Reader/Reader.cpp:1.188 --- llvm/lib/Bytecode/Reader/Reader.cpp:1.187 Wed Jan 25 17:08:15 2006 +++ llvm/lib/Bytecode/Reader/Reader.cpp Fri Jan 27 05:49:27 2006 @@ -861,7 +861,6 @@ Result = new CallInst(F, Params); if (isTailCall) cast(Result)->setTailCall(); if (CallingConv) cast(Result)->setCallingConv(CallingConv); - isCall = true; break; } case 56: // Invoke with encoded CC @@ -1034,13 +1033,6 @@ BB->getInstList().push_back(Result); - if (this->hasUpgradedIntrinsicFunctions && isCall) - if (Instruction* inst = UpgradeIntrinsicCall(cast(Result))) { - Result->replaceAllUsesWith(inst); - Result->eraseFromParent(); - Result = inst; - } - unsigned TypeSlot; if (Result->getType() == InstTy) TypeSlot = iType; @@ -1862,6 +1854,25 @@ delete PlaceHolder; } + // If upgraded intrinsic functions were detected during reading of the + // module information, then we need to look for instructions that need to + // be upgraded. This can't be done while the instructions are read in because + // additional instructions inserted mess up the slot numbering. + if (!upgradedFunctions.empty()) { + for (Function::iterator BI = F->begin(), BE = F->end(); BI != BE; ++BI) + for (BasicBlock::iterator II = BI->begin(), IE = BI->end(); + II != IE; ++II) + if (CallInst* CI = dyn_cast(II)) { + std::map::iterator FI = + upgradedFunctions.find(CI->getCalledFunction()); + if (FI != upgradedFunctions.end()) { + Instruction* newI = UpgradeIntrinsicCall(CI,FI->second); + CI->replaceAllUsesWith(newI); + CI->eraseFromParent(); + } + } + } + // Clear out function-level types... FunctionTypes.clear(); CompactionTypes.clear(); @@ -1937,6 +1948,7 @@ ++Fi; } LazyFunctionLoadMap.clear(); + } /// Parse the global type list @@ -2055,13 +2067,6 @@ Function *Func = new Function(FTy, GlobalValue::ExternalLinkage, "", TheModule); - // Replace with upgraded intrinsic function, if applicable. - if (Function* upgrdF = UpgradeIntrinsicFunction(Func)) { - hasUpgradedIntrinsicFunctions = true; - Func->eraseFromParent(); - Func = upgrdF; - } - insertValue(Func, (FnSignature & (~0U >> 1)) >> 5, ModuleValues); // Flags are not used yet. @@ -2433,6 +2438,16 @@ if (hasFunctions()) error("Function expected, but bytecode stream ended!"); + // Look for intrinsic functions to upgrade, upgrade them, and save the + // mapping from old function to new for use later when instructions are + // converted. + for (Module::iterator FI = TheModule->begin(), FE = TheModule->end(); + FI != FE; ++FI) + if (Function* newF = UpgradeIntrinsicFunction(FI)) { + upgradedFunctions.insert(std::make_pair(FI,newF)); + FI->setName(""); + } + // Tell the handler we're done with the module if (Handler) Handler->handleModuleEnd(ModuleID); Index: llvm/lib/Bytecode/Reader/Reader.h diff -u llvm/lib/Bytecode/Reader/Reader.h:1.27 llvm/lib/Bytecode/Reader/Reader.h:1.28 --- llvm/lib/Bytecode/Reader/Reader.h:1.27 Wed Jan 25 17:08:15 2006 +++ llvm/lib/Bytecode/Reader/Reader.h Fri Jan 27 05:49:27 2006 @@ -323,9 +323,9 @@ /// In release 1.7 we changed intrinsic functions to not be overloaded. There /// is no bytecode change for this, but to optimize the auto-upgrade of calls - /// to intrinsic functions, we set this flag to identify when a module has - /// been read that contains intrinsics that were upgraded. - bool hasUpgradedIntrinsicFunctions; + /// to intrinsic functions, we save a mapping of old function definitions to + /// the new ones so call instructions can be upgraded efficiently. + std::map upgradedFunctions; /// CompactionTypes - If a compaction table is active in the current function, /// this is the mapping that it contains. We keep track of what resolved type From reid at x10sys.com Fri Jan 27 05:49:41 2006 From: reid at x10sys.com (Reid Spencer) Date: Fri, 27 Jan 2006 05:49:41 -0600 Subject: [llvm-commits] CVS: llvm/lib/VMCore/AutoUpgrade.cpp Message-ID: <200601271149.FAA02997@zion.cs.uiuc.edu> Changes in directory llvm/lib/VMCore: AutoUpgrade.cpp updated: 1.7 -> 1.8 --- Log message: Fix auto-upgrade of intrinsics to work properly with both assembly and bytecode reading. This code is crufty, the result of much hacking to get things working correctly. Cleanup patches will follow. --- Diffs of the changes: (+98 -28) AutoUpgrade.cpp | 126 +++++++++++++++++++++++++++++++++++++++++++------------- 1 files changed, 98 insertions(+), 28 deletions(-) Index: llvm/lib/VMCore/AutoUpgrade.cpp diff -u llvm/lib/VMCore/AutoUpgrade.cpp:1.7 llvm/lib/VMCore/AutoUpgrade.cpp:1.8 --- llvm/lib/VMCore/AutoUpgrade.cpp:1.7 Mon Jan 23 01:42:30 2006 +++ llvm/lib/VMCore/AutoUpgrade.cpp Fri Jan 27 05:49:27 2006 @@ -75,9 +75,26 @@ return 0; } +// This assumes the Function is one of the intrinsics we upgraded. +static inline const Type* getTypeFromFunction(Function *F) { + const Type* Ty = F->getReturnType(); + if (Ty->isFloatingPoint()) + return Ty; + if (Ty->isSigned()) + return Ty->getUnsignedVersion(); + if (Ty->isInteger()) + return Ty; + if (Ty == Type::BoolTy) { + Function::const_arg_iterator ArgIt = F->arg_begin(); + if (ArgIt != F->arg_end()) + return ArgIt->getType(); + } + return 0; +} + bool llvm::IsUpgradeableIntrinsicName(const std::string& Name) { // Quickly eliminate it, if it's not a candidate. - if (Name.length() <= 5 || Name[0] != 'l' || Name[1] != 'l' || Name[2] != + if (Name.length() <= 8 || Name[0] != 'l' || Name[1] != 'l' || Name[2] != 'v' || Name[3] != 'm' || Name[4] != '.') return false; @@ -140,23 +157,68 @@ return 0; } -Instruction* llvm::UpgradeIntrinsicCall(CallInst *CI) { + +Instruction* llvm::MakeUpgradedCall( + Function* F, const std::vector& Params, BasicBlock* BB, + bool isTailCall, unsigned CallingConv) { + assert(F && "Need a Function to make a CallInst"); + assert(BB && "Need a BasicBlock to make a CallInst"); + + // Convert the params + bool signedArg = false; + std::vector Oprnds; + for (std::vector::const_iterator PI = Params.begin(), + PE = Params.end(); PI != PE; ++PI) { + const Type* opTy = (*PI)->getType(); + if (opTy->isSigned()) { + signedArg = true; + CastInst* cast = + new CastInst(*PI,opTy->getUnsignedVersion(), "autoupgrade_cast"); + BB->getInstList().push_back(cast); + Oprnds.push_back(cast); + } + else + Oprnds.push_back(*PI); + } + + Instruction* result = new CallInst(F,Oprnds,"autoupgrade_call"); + if (isTailCall) cast(result)->setTailCall(); + if (CallingConv) cast(result)->setCallingConv(CallingConv); + if (signedArg) { + const Type* newTy = F->getReturnType()->getUnsignedVersion(); + CastInst* final = new CastInst(result, newTy, "autoupgrade_uncast"); + BB->getInstList().push_back(result); + result = final; + } + return result; +} + +Instruction* llvm::UpgradeIntrinsicCall(CallInst *CI, Function* newF) { Function *F = CI->getCalledFunction(); - if (const Type* Ty = getTypeFromFunctionName(F)) { - Function* newF = UpgradeIntrinsicFunction(F); + if (const Type* Ty = + (newF ? getTypeFromFunction(newF) : getTypeFromFunctionName(F))) { std::vector Oprnds; - for (User::op_iterator OI = CI->op_begin(), OE = CI->op_end(); - OI != OE; ++OI) - Oprnds.push_back(CI); - CallInst* newCI = new CallInst(newF,Oprnds,"autoupgrade_call",CI); - if (Ty->isSigned()) { - const Type* newTy = Ty->getUnsignedVersion(); - newCI->setOperand(1,new CastInst(newCI->getOperand(1), newTy, - "autoupgrade_cast", newCI)); - CastInst* final = new CastInst(newCI, Ty, "autoupgrade_uncast",newCI); - newCI->moveBefore(final); - return final; + User::op_iterator OI = CI->op_begin(); + ++OI; + for (User::op_iterator OE = CI->op_end() ; OI != OE; ++OI) { + const Type* opTy = OI->get()->getType(); + if (opTy->isSigned()) + Oprnds.push_back( + new CastInst(OI->get(),opTy->getUnsignedVersion(), + "autoupgrade_cast",CI)); + else + Oprnds.push_back(*OI); } + CallInst* newCI = new CallInst((newF?newF:F),Oprnds,"autoupgrade_call",CI); + newCI->setTailCall(CI->isTailCall()); + newCI->setCallingConv(CI->getCallingConv()); + if (const Type* oldType = CI->getCalledFunction()->getReturnType()) + if (oldType->isSigned()) { + CastInst* final = + new CastInst(newCI, oldType, "autoupgrade_uncast",newCI); + newCI->moveBefore(final); + return final; + } return newCI; } return 0; @@ -170,20 +232,28 @@ std::vector Oprnds; User::op_iterator OI = CI->op_begin(); ++OI; - for (User::op_iterator OE = CI->op_end(); OI != OE; ++OI) - Oprnds.push_back(*OI); - CallInst* newCI = new CallInst(newF,Oprnds,"autoupgrade_call",CI); - const Type* Ty = Oprnds[0]->getType(); - if (Ty->isSigned()) { - const Type* newTy = Ty->getUnsignedVersion(); - newCI->setOperand(1,new CastInst(newCI->getOperand(1), newTy, - "autoupgrade_cast", newCI)); - CastInst* final = new CastInst(newCI, Ty, "autoupgrade_uncast",newCI); - newCI->moveBefore(final); - CI->replaceAllUsesWith(final); - } else { - CI->replaceAllUsesWith(newCI); + for (User::op_iterator OE = CI->op_end(); OI != OE; ++OI) { + const Type* opTy = OI->get()->getType(); + if (opTy->isSigned()) { + Oprnds.push_back( + new CastInst(OI->get(),opTy->getUnsignedVersion(), + "autoupgrade_cast",CI)); + } + else + Oprnds.push_back(*OI); } + CallInst* newCI = new CallInst(newF,Oprnds,"autoupgrade_call",CI); + newCI->setTailCall(CI->isTailCall()); + newCI->setCallingConv(CI->getCallingConv()); + if (const Type* Ty = CI->getCalledFunction()->getReturnType()) + if (Ty->isSigned()) { + CastInst* final = + new CastInst(newCI, Ty, "autoupgrade_uncast",newCI); + newCI->moveBefore(final); + CI->replaceAllUsesWith(final); + } else { + CI->replaceAllUsesWith(newCI); + } CI->eraseFromParent(); } } From reid at x10sys.com Fri Jan 27 05:49:41 2006 From: reid at x10sys.com (Reid Spencer) Date: Fri, 27 Jan 2006 05:49:41 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/Assembly/AutoUpgrade.h Message-ID: <200601271149.FAA03005@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/Assembly: AutoUpgrade.h updated: 1.3 -> 1.4 --- Log message: Fix auto-upgrade of intrinsics to work properly with both assembly and bytecode reading. This code is crufty, the result of much hacking to get things working correctly. Cleanup patches will follow. --- Diffs of the changes: (+12 -1) AutoUpgrade.h | 13 ++++++++++++- 1 files changed, 12 insertions(+), 1 deletion(-) Index: llvm/include/llvm/Assembly/AutoUpgrade.h diff -u llvm/include/llvm/Assembly/AutoUpgrade.h:1.3 llvm/include/llvm/Assembly/AutoUpgrade.h:1.4 --- llvm/include/llvm/Assembly/AutoUpgrade.h:1.3 Thu Jan 19 00:59:26 2006 +++ llvm/include/llvm/Assembly/AutoUpgrade.h Fri Jan 27 05:49:27 2006 @@ -15,11 +15,14 @@ #define LLVM_ASSEMBLY_AUTOUPGRADE_H #include +#include namespace llvm { class Function; class CallInst; class Instruction; + class Value; + class BasicBlock; /// This function determines if the \p Name provides is a name for which the /// auto-upgrade to a non-overloaded name applies. @@ -39,6 +42,14 @@ /// @brief Remove overloaded intrinsic function names. Function* UpgradeIntrinsicFunction(Function* F); + Instruction* MakeUpgradedCall( + Function* F, ///< The function to call + const std::vector& Params, ///< Operands of the call + BasicBlock* BB, ///< Basic block the caller will insert result to + bool isTailCall = false, ///< True if this is a tail call. + unsigned CallingConv = 0 ///< Calling convention to use + ); + /// In LLVM 1.7, the overloading of intrinsic functions was replaced with /// separate functions for each of the various argument sizes. This function /// implements the auto-upgrade feature from old overloaded names to the new @@ -52,7 +63,7 @@ /// @param CI The CallInst to potentially auto-upgrade. /// @returns An instrution to replace \p CI with. /// @brief Get replacement instruction for overloaded intrinsic function call. - Instruction* UpgradeIntrinsicCall(CallInst* CI); + Instruction* UpgradeIntrinsicCall(CallInst* CI, Function* newF = 0); /// Upgrade both the function and all the calls made to it, if that function /// needs to be upgraded. This is like a combination of the above two From jlaskey at apple.com Fri Jan 27 07:24:32 2006 From: jlaskey at apple.com (Jim Laskey) Date: Fri, 27 Jan 2006 07:24:32 -0600 Subject: [llvm-commits] CVS: llvm/Xcode/LLVM.xcodeproj/project.pbxproj Message-ID: <200601271324.HAA16049@zion.cs.uiuc.edu> Changes in directory llvm/Xcode/LLVM.xcodeproj: project.pbxproj updated: 1.18 -> 1.19 --- Log message: Catch up on some of the file addition/deletions. --- Diffs of the changes: (+44 -10) project.pbxproj | 54 ++++++++++++++++++++++++++++++++++++++++++++---------- 1 files changed, 44 insertions(+), 10 deletions(-) Index: llvm/Xcode/LLVM.xcodeproj/project.pbxproj diff -u llvm/Xcode/LLVM.xcodeproj/project.pbxproj:1.18 llvm/Xcode/LLVM.xcodeproj/project.pbxproj:1.19 --- llvm/Xcode/LLVM.xcodeproj/project.pbxproj:1.18 Thu Jan 26 14:32:00 2006 +++ llvm/Xcode/LLVM.xcodeproj/project.pbxproj Fri Jan 27 07:24:20 2006 @@ -115,6 +115,28 @@ CF6529A6095B21A8007F884E /* MachineDebugInfo.cpp */ = {isa = PBXFileReference; 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path = AlphaInstrInfo.cpp; sourceTree = ""; }; DE66EEA508ABEE5E00323D32 /* AlphaInstrInfo.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = AlphaInstrInfo.h; sourceTree = ""; }; DE66EEA608ABEE5E00323D32 /* AlphaInstrInfo.td */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = text; path = AlphaInstrInfo.td; sourceTree = ""; }; - DE66EEA708ABEE5E00323D32 /* AlphaISelPattern.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = AlphaISelPattern.cpp; sourceTree = ""; }; DE66EEA908ABEE5E00323D32 /* AlphaJITInfo.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = AlphaJITInfo.cpp; sourceTree = ""; }; DE66EEAA08ABEE5E00323D32 /* AlphaJITInfo.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = AlphaJITInfo.h; sourceTree = ""; }; DE66EEAB08ABEE5E00323D32 /* AlphaRegisterInfo.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = AlphaRegisterInfo.cpp; sourceTree = ""; }; @@ -387,7 +408,6 @@ DE66EF0308ABEE5E00323D32 /* IA64InstrInfo.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = IA64InstrInfo.cpp; sourceTree = ""; }; DE66EF0408ABEE5E00323D32 /* IA64InstrInfo.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = IA64InstrInfo.h; sourceTree = ""; }; DE66EF0508ABEE5E00323D32 /* IA64InstrInfo.td */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = text; path = IA64InstrInfo.td; sourceTree = ""; }; - DE66EF0608ABEE5E00323D32 /* IA64ISelPattern.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = IA64ISelPattern.cpp; sourceTree = ""; }; DE66EF0708ABEE5E00323D32 /* IA64MachineFunctionInfo.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = IA64MachineFunctionInfo.h; sourceTree = ""; }; DE66EF0808ABEE5E00323D32 /* IA64RegisterInfo.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = IA64RegisterInfo.cpp; sourceTree = ""; }; DE66EF0908ABEE5E00323D32 /* IA64RegisterInfo.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = IA64RegisterInfo.h; sourceTree = ""; }; @@ -421,7 +441,6 @@ DE66EFBE08ABEE5F00323D32 /* SparcV8InstrInfo.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = SparcV8InstrInfo.cpp; sourceTree = ""; }; DE66EFBF08ABEE5F00323D32 /* SparcV8InstrInfo.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = SparcV8InstrInfo.h; sourceTree = ""; }; DE66EFC008ABEE5F00323D32 /* SparcV8InstrInfo.td */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = text; path = SparcV8InstrInfo.td; sourceTree = ""; }; - DE66EFC208ABEE5F00323D32 /* SparcV8ISelSimple.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = SparcV8ISelSimple.cpp; sourceTree = ""; }; DE66EFC408ABEE5F00323D32 /* SparcV8RegisterInfo.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = SparcV8RegisterInfo.cpp; sourceTree = ""; }; DE66EFC508ABEE5F00323D32 /* SparcV8RegisterInfo.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = SparcV8RegisterInfo.h; sourceTree = ""; }; DE66EFC608ABEE5F00323D32 /* SparcV8RegisterInfo.td */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = text; path = SparcV8RegisterInfo.td; sourceTree = ""; }; @@ -470,7 +489,6 @@ DE66F05808ABEE6000323D32 /* LiveRange.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = LiveRange.h; sourceTree = ""; }; DE66F05908ABEE6000323D32 /* LiveRangeInfo.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = LiveRangeInfo.cpp; sourceTree = ""; }; DE66F05A08ABEE6000323D32 /* LiveRangeInfo.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = LiveRangeInfo.h; sourceTree = ""; }; - DE66F05C08ABEE6000323D32 /* Notes.txt */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = text; path = Notes.txt; sourceTree = ""; }; DE66F05D08ABEE6000323D32 /* PhyRegAlloc.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = PhyRegAlloc.cpp; sourceTree = ""; }; DE66F05E08ABEE6000323D32 /* PhyRegAlloc.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = PhyRegAlloc.h; sourceTree = ""; }; DE66F05F08ABEE6000323D32 /* RegAllocCommon.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = RegAllocCommon.h; sourceTree = ""; }; @@ -597,7 +615,6 @@ DE66F1B008ABEFB400323D32 /* LowerSelect.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = LowerSelect.cpp; sourceTree = ""; }; DE66F1B108ABEFB400323D32 /* LowerSwitch.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = LowerSwitch.cpp; sourceTree = ""; }; DE66F1B308ABEFB400323D32 /* Mem2Reg.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = Mem2Reg.cpp; sourceTree = ""; }; - DE66F1B408ABEFB400323D32 /* PRE.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = PRE.cpp; sourceTree = ""; }; DE66F1B508ABEFB400323D32 /* Reassociate.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = Reassociate.cpp; sourceTree = ""; }; DE66F1B608ABEFB400323D32 /* ScalarReplAggregates.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = ScalarReplAggregates.cpp; sourceTree = ""; }; DE66F1B708ABEFB400323D32 /* SCCP.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = SCCP.cpp; sourceTree = ""; }; @@ -983,6 +1000,7 @@ isa = PBXGroup; children = ( DE66EC5B08ABE86900323D32 /* AsmWriter.cpp */, + CF73C0BC098A551F00627152 /* AutoUpgrade.cpp */, DE66EC5C08ABE86A00323D32 /* BasicBlock.cpp */, DE66EC5D08ABE86A00323D32 /* ConstantFolding.cpp */, DE66EC5E08ABE86A00323D32 /* ConstantFolding.h */, @@ -991,6 +1009,7 @@ DE66EC6108ABE86A00323D32 /* Dominators.cpp */, DE66EC6208ABE86A00323D32 /* Function.cpp */, DE66EC6308ABE86A00323D32 /* Globals.cpp */, + CF73C0BD098A551F00627152 /* InlineAsm.cpp */, DE66EC6408ABE86A00323D32 /* Instruction.cpp */, DE66EC6508ABE86A00323D32 /* Instructions.cpp */, DE66EC6608ABE86A00323D32 /* LeakDetector.cpp */, @@ -1002,7 +1021,9 @@ DE66EC6C08ABE86A00323D32 /* SymbolTable.cpp */, DE66EC6D08ABE86A00323D32 /* SymbolTableListTraitsImpl.h */, DE66EC6E08ABE86A00323D32 /* Type.cpp */, + CF73C0BE098A551F00627152 /* TypeSymbolTable.cpp */, DE66EC6F08ABE86A00323D32 /* Value.cpp */, + CF73C0BF098A551F00627152 /* ValueSymbolTable.cpp */, DE66EC7008ABE86A00323D32 /* Verifier.cpp */, ); name = lib/VMCore; @@ -1077,6 +1098,7 @@ DE66ECC108ABEC0700323D32 /* AliasSetTracker.cpp */, DE66ECC208ABEC0700323D32 /* BasicAliasAnalysis.cpp */, DE66ECC308ABEC0700323D32 /* CFGPrinter.cpp */, + CF73C0B0098A523C00627152 /* ConstantFolding.cpp */, DE66ED1708ABEC0800323D32 /* InstCount.cpp */, DE66ED1808ABEC0800323D32 /* Interval.cpp */, DE66ED1908ABEC0800323D32 /* IntervalPartition.cpp */, @@ -1397,7 +1419,6 @@ DE66EEA408ABEE5E00323D32 /* AlphaInstrInfo.cpp */, DE66EEA508ABEE5E00323D32 /* AlphaInstrInfo.h */, DE66EEA608ABEE5E00323D32 /* AlphaInstrInfo.td */, - DE66EEA708ABEE5E00323D32 /* AlphaISelPattern.cpp */, DE66EEA908ABEE5E00323D32 /* AlphaJITInfo.cpp */, DE66EEAA08ABEE5E00323D32 /* AlphaJITInfo.h */, DE66EEAB08ABEE5E00323D32 /* AlphaRegisterInfo.cpp */, @@ -1425,6 +1446,7 @@ DE66EEF808ABEE5E00323D32 /* IA64.h */, DE66EEF908ABEE5E00323D32 /* IA64.td */, DE66EEFA08ABEE5E00323D32 /* IA64AsmPrinter.cpp */, + CF73C0B6098A53EF00627152 /* IA64Bundling.cpp */, DE66EF0108ABEE5E00323D32 /* IA64InstrBuilder.h */, DE66EF0208ABEE5E00323D32 /* IA64InstrFormats.td */, DE66EF0308ABEE5E00323D32 /* IA64InstrInfo.cpp */, @@ -1433,7 +1455,6 @@ CFC244BF0959F2E3009F8C47 /* IA64ISelDAGToDAG.cpp */, CFC244C00959F2E3009F8C47 /* IA64ISelLowering.cpp */, CFC244C10959F2E3009F8C47 /* IA64ISelLowering.h */, - DE66EF0608ABEE5E00323D32 /* IA64ISelPattern.cpp */, DE66EF0708ABEE5E00323D32 /* IA64MachineFunctionInfo.h */, DE66EF0808ABEE5E00323D32 /* IA64RegisterInfo.cpp */, DE66EF0908ABEE5E00323D32 /* IA64RegisterInfo.h */, @@ -1545,11 +1566,12 @@ DE66EFBE08ABEE5F00323D32 /* SparcV8InstrInfo.cpp */, DE66EFBF08ABEE5F00323D32 /* SparcV8InstrInfo.h */, DE66EFC008ABEE5F00323D32 /* SparcV8InstrInfo.td */, - DE66EFC208ABEE5F00323D32 /* SparcV8ISelSimple.cpp */, DE66EFC408ABEE5F00323D32 /* SparcV8RegisterInfo.cpp */, DE66EFC508ABEE5F00323D32 /* SparcV8RegisterInfo.h */, DE66EFC608ABEE5F00323D32 /* SparcV8RegisterInfo.td */, CFC244BE0959F284009F8C47 /* SparcV8ISelDAGToDAG.cpp */, + CF73C0B4098A538B00627152 /* SparcV8Subtarget.cpp */, + CF73C0B5098A538B00627152 /* SparcV8Subtarget.h */, DE66EFC708ABEE5F00323D32 /* SparcV8TargetMachine.cpp */, DE66EFC808ABEE5F00323D32 /* SparcV8TargetMachine.h */, ); @@ -1670,7 +1692,6 @@ DE66F05808ABEE6000323D32 /* LiveRange.h */, DE66F05908ABEE6000323D32 /* LiveRangeInfo.cpp */, DE66F05A08ABEE6000323D32 /* LiveRangeInfo.h */, - DE66F05C08ABEE6000323D32 /* Notes.txt */, DE66F05D08ABEE6000323D32 /* PhyRegAlloc.cpp */, DE66F05E08ABEE6000323D32 /* PhyRegAlloc.h */, DE66F05F08ABEE6000323D32 /* RegAllocCommon.h */, @@ -1741,6 +1762,8 @@ DE66F0FF08ABEFB300323D32 /* EmitFunctions.cpp */, DE66F11B08ABEFB300323D32 /* ProfilingUtils.cpp */, DE66F11C08ABEFB300323D32 /* ProfilingUtils.h */, + CF73C0B7098A546000627152 /* RSProfiling.cpp */, + CF73C0B8098A546000627152 /* RSProfiling.h */, DE66F11D08ABEFB300323D32 /* TraceBasicBlocks.cpp */, DE66F11E08ABEFB300323D32 /* TraceValues.cpp */, ); @@ -1797,8 +1820,8 @@ DE66F1B008ABEFB400323D32 /* LowerSelect.cpp */, DE66F1B108ABEFB400323D32 /* LowerSwitch.cpp */, DE66F1B308ABEFB400323D32 /* Mem2Reg.cpp */, - DE66F1B408ABEFB400323D32 /* PRE.cpp */, DE66F1B508ABEFB400323D32 /* Reassociate.cpp */, + CF73C0B9098A546000627152 /* Reg2Mem.cpp */, DE66F1B608ABEFB400323D32 /* ScalarReplAggregates.cpp */, DE66F1B708ABEFB400323D32 /* SCCP.cpp */, DE66F1B808ABEFB400323D32 /* SimplifyCFG.cpp */, @@ -1856,6 +1879,7 @@ DE66F25E08ABF03100323D32 /* Function.h */, DE66F25F08ABF03100323D32 /* GlobalValue.h */, DE66F26008ABF03100323D32 /* GlobalVariable.h */, + CF73C0A2098A4FDF00627152 /* InlineAsm.h */, DE66F26108ABF03100323D32 /* InstrTypes.h */, DE66F26208ABF03100323D32 /* Instruction.def */, DE66F26308ABF03100323D32 /* Instruction.h */, @@ -1872,9 +1896,11 @@ DE66F29208ABF03200323D32 /* SymbolTable.h */, DE66F29308ABF03200323D32 /* SymbolTableListTraits.h */, DE66F2B708ABF03200323D32 /* Type.h */, + CF73C0A3098A4FDF00627152 /* TypeSymbolTable.h */, DE66F2B808ABF03200323D32 /* Use.h */, DE66F2B908ABF03200323D32 /* User.h */, DE66F2BA08ABF03200323D32 /* Value.h */, + CF73C0A4098A4FDF00627152 /* ValueSymbolTable.h */, ); name = include/llvm; path = ../include/llvm; @@ -1914,13 +1940,16 @@ DE66F20508ABF03100323D32 /* AliasSetTracker.h */, DE66F20608ABF03100323D32 /* CallGraph.h */, DE66F20708ABF03100323D32 /* CFGPrinter.h */, + CF73C0A5098A507300627152 /* ConstantFolding.h */, DE66F20808ABF03100323D32 /* ConstantsScanner.h */, DE66F20908ABF03100323D32 /* DataStructure */, DE66F20F08ABF03100323D32 /* Dominators.h */, + CF73C0A6098A507300627152 /* ET-Forest.h */, DE66F21208ABF03100323D32 /* FindUsedTypes.h */, DE66F21308ABF03100323D32 /* Interval.h */, DE66F21408ABF03100323D32 /* IntervalIterator.h */, DE66F21508ABF03100323D32 /* IntervalPartition.h */, + CF73C0A7098A507300627152 /* LinkAllAnalyses.h */, DE66F21608ABF03100323D32 /* LoadValueNumbering.h */, DE66F21708ABF03100323D32 /* LoopInfo.h */, DE66F21808ABF03100323D32 /* Passes.h */, @@ -1954,6 +1983,7 @@ isa = PBXGroup; children = ( DE66F22508ABF03100323D32 /* AsmAnnotationWriter.h */, + CF73C0A8098A50C200627152 /* AutoUpgrade.h */, DE66F22608ABF03100323D32 /* CachedWriter.h */, DE66F22708ABF03100323D32 /* Parser.h */, DE66F22808ABF03100323D32 /* PrintModulePass.h */, @@ -2014,6 +2044,7 @@ isa = PBXGroup; children = ( DE66F24E08ABF03100323D32 /* alloca.h */, + CF73C0A9098A50FD00627152 /* config.h */, DE66F25008ABF03100323D32 /* config.h.in */, ); path = Config; @@ -2052,6 +2083,7 @@ DE66F27508ABF03200323D32 /* CommandLine.h */, DE66F27608ABF03200323D32 /* Compressor.h */, DE66F27708ABF03200323D32 /* ConstantRange.h */, + CF73C0AD098A519400627152 /* DataTypes.h */, DE66F27908ABF03200323D32 /* DataTypes.h.in */, DE66F27A08ABF03200323D32 /* Debug.h */, DE66F27B08ABF03200323D32 /* DOTGraphTraits.h */, @@ -2084,6 +2116,7 @@ DE66F29408ABF03200323D32 /* System */ = { isa = PBXGroup; children = ( + CF73C0AE098A51AD00627152 /* Alarm.h */, DE66F29508ABF03200323D32 /* DynamicLibrary.h */, DE66F29608ABF03200323D32 /* LICENSE.TXT */, DE66F29708ABF03200323D32 /* MappedFile.h */, @@ -2124,6 +2157,7 @@ DE66F2AC08ABF03200323D32 /* Instrumentation.h */, DE66F2AD08ABF03200323D32 /* IPO.h */, DE66F2AE08ABF03200323D32 /* LinkAllPasses.h */, + CF73C0AF098A51DD00627152 /* RSProfiling.h */, DE66F2AF08ABF03200323D32 /* Scalar.h */, DE66F2B008ABF03200323D32 /* Utils */, ); From jlaskey at apple.com Fri Jan 27 09:21:06 2006 From: jlaskey at apple.com (Jim Laskey) Date: Fri, 27 Jan 2006 09:21:06 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/DwarfWriter.cpp MachineDebugInfo.cpp Message-ID: <200601271521.JAA22865@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen: DwarfWriter.cpp updated: 1.19 -> 1.20 MachineDebugInfo.cpp updated: 1.6 -> 1.7 --- Log message: Improve visibility/correctness of operand indices in "llvm.db" objects. Handle 64 in DIEs. --- Diffs of the changes: (+71 -48) DwarfWriter.cpp | 59 ++++++++++++++++++++++++++++++++++++-------------- MachineDebugInfo.cpp | 60 +++++++++++++++++++++++---------------------------- 2 files changed, 71 insertions(+), 48 deletions(-) Index: llvm/lib/CodeGen/DwarfWriter.cpp diff -u llvm/lib/CodeGen/DwarfWriter.cpp:1.19 llvm/lib/CodeGen/DwarfWriter.cpp:1.20 --- llvm/lib/CodeGen/DwarfWriter.cpp:1.19 Thu Jan 26 15:22:49 2006 +++ llvm/lib/CodeGen/DwarfWriter.cpp Fri Jan 27 09:20:54 2006 @@ -674,6 +674,7 @@ case DW_FORM_data1: DW.EmitByte(Integer); break; case DW_FORM_data2: DW.EmitShort(Integer); break; case DW_FORM_data4: DW.EmitLong(Integer); break; + case DW_FORM_data8: DW.EmitLongLong(Integer); break; case DW_FORM_udata: DW.EmitULEB128Bytes(Integer); break; case DW_FORM_sdata: DW.EmitSLEB128Bytes(Integer); break; default: assert(0 && "DIE Value form not supported yet"); break; @@ -688,6 +689,7 @@ case DW_FORM_data1: return sizeof(int8_t); case DW_FORM_data2: return sizeof(int16_t); case DW_FORM_data4: return sizeof(int32_t); + case DW_FORM_data8: return sizeof(int64_t); case DW_FORM_udata: return DW.SizeULEB128(Integer); case DW_FORM_sdata: return DW.SizeSLEB128(Integer); default: assert(0 && "DIE Value form not supported yet"); break; @@ -796,20 +798,27 @@ if (Context) delete Context; } -/// AddInt - Add a simple integer attribute data and value. +/// AddUInt - Add an unsigned integer attribute data and value. /// -void DIE::AddInt(unsigned Attribute, unsigned Form, - int Integer, bool IsSigned) { +void DIE::AddUInt(unsigned Attribute, unsigned Form, uint64_t Integer) { if (Form == 0) { - if (IsSigned) { - if ((char)Integer == Integer) Form = DW_FORM_data1; - else if ((short)Integer == Integer) Form = DW_FORM_data2; - else Form = DW_FORM_data4; - } else { if ((unsigned char)Integer == Integer) Form = DW_FORM_data1; else if ((unsigned short)Integer == Integer) Form = DW_FORM_data2; - else Form = DW_FORM_data4; - } + else if ((unsigned int)Integer == Integer) Form = DW_FORM_data4; + else Form = DW_FORM_data8; + } + Abbrev->AddAttribute(Attribute, Form); + Values.push_back(new DIEInteger(Integer)); +} + +/// AddSInt - Add an signed integer attribute data and value. +/// +void DIE::AddSInt(unsigned Attribute, unsigned Form, int64_t Integer) { + if (Form == 0) { + if ((char)Integer == Integer) Form = DW_FORM_data1; + else if ((short)Integer == Integer) Form = DW_FORM_data2; + else if ((int)Integer == Integer) Form = DW_FORM_data4; + else Form = DW_FORM_data8; } Abbrev->AddAttribute(Attribute, Form); Values.push_back(new DIEInteger(Integer)); @@ -932,8 +941,8 @@ // construct the type DIE. TypeDie = new DIE(DW_TAG_base_type, DW_CHILDREN_no); TypeDie->AddString(DW_AT_name, DW_FORM_string, Name); - TypeDie->AddInt (DW_AT_byte_size, DW_FORM_data1, Size); - TypeDie->AddInt (DW_AT_encoding, DW_FORM_data1, Encoding); + TypeDie->AddUInt (DW_AT_byte_size, DW_FORM_data1, Size); + TypeDie->AddUInt (DW_AT_encoding, DW_FORM_data1, Encoding); TypeDie->Complete(DW); // Add to context owner. @@ -958,10 +967,10 @@ // FIXME - need source file name line number. VariableDie = new DIE(DW_TAG_variable, DW_CHILDREN_no); VariableDie->AddString (DW_AT_name, DW_FORM_string, Name); - VariableDie->AddInt (DW_AT_decl_file, 0, 0); - VariableDie->AddInt (DW_AT_decl_line, 0, 0); + VariableDie->AddUInt (DW_AT_decl_file, 0, 0); + VariableDie->AddUInt (DW_AT_decl_line, 0, 0); VariableDie->AddDIEntry (DW_AT_type, DW_FORM_ref4, Type); - VariableDie->AddInt (DW_AT_external, DW_FORM_flag, 1); + VariableDie->AddUInt (DW_AT_external, DW_FORM_flag, 1); // FIXME - needs to be a proper expression. VariableDie->AddObjectLabel(DW_AT_location, DW_FORM_block1, MangledName); VariableDie->Complete(DW); @@ -1096,6 +1105,24 @@ PrintHex(Value); } +/// EmitLongLong - Emit a long long directive and value. +/// +void DwarfWriter::EmitLongLong(uint64_t Value) const { + if (Asm->Data64bitsDirective) { + O << Asm->Data64bitsDirective << "0x" << std::hex << Value << std::dec; + } else { + const TargetData &TD = Asm->TM.getTargetData(); + + if (TD.isBigEndian()) { + EmitLong(unsigned(Value >> 32)); O << "\n"; + EmitLong(unsigned(Value)); + } else { + EmitLong(unsigned(Value)); O << "\n"; + EmitLong(unsigned(Value >> 32)); + } + } +} + /// EmitString - Emit a string with quotes and a null terminator. /// Special characters are emitted properly. (Eg. '\t') void DwarfWriter::EmitString(const std::string &String) const { @@ -1249,7 +1276,7 @@ Unit->AddLabel (DW_AT_high_pc, DW_FORM_addr, DWLabel("text_end", 0)); Unit->AddLabel (DW_AT_low_pc, DW_FORM_addr, DWLabel("text_begin", 0)); Unit->AddString(DW_AT_producer, DW_FORM_string, CompileUnit.getProducer()); - Unit->AddInt (DW_AT_language, DW_FORM_data1, CompileUnit.getLanguage()); + Unit->AddUInt (DW_AT_language, DW_FORM_data1, CompileUnit.getLanguage()); Unit->AddString(DW_AT_name, DW_FORM_string, CompileUnit.getFileName()); Unit->AddString(DW_AT_comp_dir, DW_FORM_string, CompileUnit.getDirectory()); Unit->Complete(*this); Index: llvm/lib/CodeGen/MachineDebugInfo.cpp diff -u llvm/lib/CodeGen/MachineDebugInfo.cpp:1.6 llvm/lib/CodeGen/MachineDebugInfo.cpp:1.7 --- llvm/lib/CodeGen/MachineDebugInfo.cpp:1.6 Thu Jan 26 15:22:49 2006 +++ llvm/lib/CodeGen/MachineDebugInfo.cpp Fri Jan 27 09:20:54 2006 @@ -97,6 +97,19 @@ } return ""; } + +/// getGlobalValue - Return either a direct or cast Global value. +/// +static GlobalVariable *getGlobalValue(Value *V) { + if (GlobalVariable *GV = dyn_cast(V)) { + return GV; + } else if (ConstantExpr *CE = dyn_cast(V)) { + return CE->getOpcode() == Instruction::Cast ? dyn_cast(V) + : NULL; + } + return NULL; +} + //===----------------------------------------------------------------------===// @@ -112,51 +125,45 @@ : DebugInfoWrapper(G) { // FIXME - should probably ease up on the number of operands (version.) - assert(IC->getNumOperands() == 7 && + assert(IC->getNumOperands() == N_op && "Compile unit does not have correct number of operands"); } /// getTag - Return the compile unit's tag number. Currently should be /// DW_TAG_variable. unsigned CompileUnitWrapper::getTag() const { - ConstantUInt *CI = dyn_cast(IC->getOperand(0)); - assert(CI && "Compile unit tag not an unsigned integer"); - return CI->getValue(); + return cast(IC->getOperand(Tag_op))->getValue(); } /// isCorrectDebugVersion - Return true if is the correct llvm debug version. /// Currently the value is 0 (zero.) If the value is is not correct then /// ignore all debug information. bool CompileUnitWrapper::isCorrectDebugVersion() const { - ConstantUInt *CI = dyn_cast(IC->getOperand(1)); - assert(CI && "Compile unit debug version not an unsigned integer"); - return CI->getValue() == 0; + return cast(IC->getOperand(Version_op))->getValue(); } /// getLanguage - Return the compile unit's language number (ex. DW_LANG_C89.) /// unsigned CompileUnitWrapper::getLanguage() const { - ConstantUInt *CI = dyn_cast(IC->getOperand(2)); - assert(CI && "Compile unit language number not an unsigned integer"); - return CI->getValue(); + return cast(IC->getOperand(Language_op))->getValue(); } /// getFileName - Return the compile unit's file name. /// const std::string CompileUnitWrapper::getFileName() const { - return getStringValue(IC->getOperand(3)); + return getStringValue(IC->getOperand(FileName_op)); } /// getDirectory - Return the compile unit's file directory. /// const std::string CompileUnitWrapper::getDirectory() const { - return getStringValue(IC->getOperand(4)); + return getStringValue(IC->getOperand(Directory_op)); } /// getProducer - Return the compile unit's generator name. /// const std::string CompileUnitWrapper::getProducer() const { - return getStringValue(IC->getOperand(5)); + return getStringValue(IC->getOperand(Producer_op)); } //===----------------------------------------------------------------------===// @@ -165,61 +172,50 @@ : DebugInfoWrapper(G) { // FIXME - should probably ease up on the number of operands (version.) - assert(IC->getNumOperands() == 8 && + assert(IC->getNumOperands() == N_op && "Global does not have correct number of operands"); } /// getTag - Return the global's tag number. Currently should be /// DW_TAG_variable or DW_TAG_subprogram. unsigned GlobalWrapper::getTag() const { - ConstantUInt *CI = dyn_cast(IC->getOperand(0)); - assert(CI && "Global tag not an unsigned integer"); - return CI->getValue(); + return cast(IC->getOperand(Tag_op))->getValue(); } /// getContext - Return the "lldb.compile_unit" context global. /// GlobalVariable *GlobalWrapper::getContext() const { - return cast(IC->getOperand(1)); + return getGlobalValue(IC->getOperand(Context_op)); } /// getName - Return the name of the global. /// const std::string GlobalWrapper::getName() const { - return getStringValue(IC->getOperand(2)); + return getStringValue(IC->getOperand(Name_op)); } /// getType - Return the type of the global. /// const GlobalVariable *GlobalWrapper::getType() const { - return cast(IC->getOperand(4)); + return getGlobalValue(IC->getOperand(Type_op)); } /// isStatic - Return true if the global is static. /// bool GlobalWrapper::isStatic() const { - ConstantBool *CB = dyn_cast(IC->getOperand(5)); - assert(CB && "Global static flag is not boolean"); - return CB->getValue(); + return cast(IC->getOperand(Static_op))->getValue(); } /// isDefinition - Return true if the global is a definition. /// bool GlobalWrapper::isDefinition() const { - ConstantBool *CB = dyn_cast(IC->getOperand(6)); - assert(CB && "Global definition flag is not boolean"); - return CB->getValue(); + return dyn_cast(IC->getOperand(Definition_op))->getValue(); } /// getGlobalVariable - Return the global variable (tag == DW_TAG_variable.) /// GlobalVariable *GlobalWrapper::getGlobalVariable() const { - ConstantExpr *CE = dyn_cast(IC->getOperand(7)); - assert(CE && CE->getOpcode() == Instruction::Cast && - "Global location is not a cast of GlobalVariable"); - GlobalVariable *GV = dyn_cast(CE->getOperand(0)); - assert(GV && "Global location is not a cast of GlobalVariable"); - return GV; + return getGlobalValue(IC->getOperand(GlobalVariable_op)); } //===----------------------------------------------------------------------===// From jlaskey at apple.com Fri Jan 27 09:21:07 2006 From: jlaskey at apple.com (Jim Laskey) Date: Fri, 27 Jan 2006 09:21:07 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/DwarfWriter.h MachineDebugInfo.h Message-ID: <200601271521.JAA22897@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/CodeGen: DwarfWriter.h updated: 1.19 -> 1.20 MachineDebugInfo.h updated: 1.8 -> 1.9 --- Log message: Improve visibility/correctness of operand indices in "llvm.db" objects. Handle 64 in DIEs. --- Diffs of the changes: (+39 -5) DwarfWriter.h | 17 ++++++++++++----- MachineDebugInfo.h | 27 +++++++++++++++++++++++++++ 2 files changed, 39 insertions(+), 5 deletions(-) Index: llvm/include/llvm/CodeGen/DwarfWriter.h diff -u llvm/include/llvm/CodeGen/DwarfWriter.h:1.19 llvm/include/llvm/CodeGen/DwarfWriter.h:1.20 --- llvm/include/llvm/CodeGen/DwarfWriter.h:1.19 Thu Jan 26 16:25:04 2006 +++ llvm/include/llvm/CodeGen/DwarfWriter.h Fri Jan 27 09:20:54 2006 @@ -176,10 +176,10 @@ // class DIEInteger : public DIEValue { private: - int Integer; + uint64_t Integer; public: - DIEInteger(int I) : DIEValue(isInteger), Integer(I) {} + DIEInteger(uint64_t I) : DIEValue(isInteger), Integer(I) {} // Implement isa/cast/dyncast. static bool classof(const DIEInteger *) { return true; } @@ -334,10 +334,13 @@ /// sibling. unsigned SiblingOffset() const { return Offset + Size; } - /// AddInt - Add a simple integer attribute data and value. + /// AddUInt - Add an unsigned integer attribute data and value. /// - void AddInt(unsigned Attribute, unsigned Form, - int Integer, bool IsSigned = false); + void AddUInt(unsigned Attribute, unsigned Form, uint64_t Integer); + + /// AddSInt - Add an signed integer attribute data and value. + /// + void AddSInt(unsigned Attribute, unsigned Form, int64_t Integer); /// AddString - Add a std::string attribute data and value. /// @@ -586,6 +589,10 @@ /// void EmitLong(int Value) const; + /// EmitLongLong - Emit a long long directive and value. + /// + void EmitLongLong(uint64_t Value) const; + /// EmitString - Emit a string with quotes and a null terminator. /// Special characters are emitted properly. (Eg. '\t') void EmitString(const std::string &String) const; Index: llvm/include/llvm/CodeGen/MachineDebugInfo.h diff -u llvm/include/llvm/CodeGen/MachineDebugInfo.h:1.8 llvm/include/llvm/CodeGen/MachineDebugInfo.h:1.9 --- llvm/include/llvm/CodeGen/MachineDebugInfo.h:1.8 Thu Jan 26 15:22:49 2006 +++ llvm/include/llvm/CodeGen/MachineDebugInfo.h Fri Jan 27 09:20:54 2006 @@ -73,6 +73,19 @@ /// CompileUnitWrapper - This class wraps a "lldb.compile_unit" global to /// provide easy access to its attributes. class CompileUnitWrapper : public DebugInfoWrapper { +private: + // Operand indices. + enum { + Tag_op, + Version_op, + Language_op, + FileName_op, + Directory_op, + Producer_op, + Anchor_op, // ignored + N_op + }; + public: CompileUnitWrapper(GlobalVariable *G); @@ -110,6 +123,20 @@ /// GlobalWrapper - This class wraps a "lldb.global" global to provide easy /// access to its attributes. class GlobalWrapper : public DebugInfoWrapper { +private: + // Operand indices. + enum { + Tag_op, + Context_op, + Name_op, + Anchor_op, // ignored + Type_op, + Static_op, + Definition_op, + GlobalVariable_op, + N_op + }; + public: GlobalWrapper(GlobalVariable *G); From jlaskey at apple.com Fri Jan 27 09:47:05 2006 From: jlaskey at apple.com (Jim Laskey) Date: Fri, 27 Jan 2006 09:47:05 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/MachineDebugInfo.cpp Message-ID: <200601271547.JAA06690@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen: MachineDebugInfo.cpp updated: 1.7 -> 1.8 --- Log message: Forgot the version number. --- Diffs of the changes: (+1 -1) MachineDebugInfo.cpp | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/CodeGen/MachineDebugInfo.cpp diff -u llvm/lib/CodeGen/MachineDebugInfo.cpp:1.7 llvm/lib/CodeGen/MachineDebugInfo.cpp:1.8 --- llvm/lib/CodeGen/MachineDebugInfo.cpp:1.7 Fri Jan 27 09:20:54 2006 +++ llvm/lib/CodeGen/MachineDebugInfo.cpp Fri Jan 27 09:46:54 2006 @@ -139,7 +139,7 @@ /// Currently the value is 0 (zero.) If the value is is not correct then /// ignore all debug information. bool CompileUnitWrapper::isCorrectDebugVersion() const { - return cast(IC->getOperand(Version_op))->getValue(); + return cast(IC->getOperand(Version_op))->getValue() == 0; } /// getLanguage - Return the compile unit's language number (ex. DW_LANG_C89.) From lattner at cs.uiuc.edu Fri Jan 27 11:31:42 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Fri, 27 Jan 2006 11:31:42 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/MachineDebugInfo.cpp Message-ID: <200601271731.LAA03641@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen: MachineDebugInfo.cpp updated: 1.8 -> 1.9 --- Log message: Fix build error that is apparently only a warning with some compilers. --- Diffs of the changes: (+1 -1) MachineDebugInfo.cpp | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/CodeGen/MachineDebugInfo.cpp diff -u llvm/lib/CodeGen/MachineDebugInfo.cpp:1.8 llvm/lib/CodeGen/MachineDebugInfo.cpp:1.9 --- llvm/lib/CodeGen/MachineDebugInfo.cpp:1.8 Fri Jan 27 09:46:54 2006 +++ llvm/lib/CodeGen/MachineDebugInfo.cpp Fri Jan 27 11:31:30 2006 @@ -62,7 +62,7 @@ /// getStringValue - Turn an LLVM constant pointer that eventually points to a /// global into a string value. Return an empty string if we can't do it. /// -const static std::string getStringValue(Value *V, unsigned Offset = 0) { +static const std::string getStringValue(Value *V, unsigned Offset = 0) { if (GlobalVariable *GV = dyn_cast(V)) { if (GV->hasInitializer() && isa(GV->getInitializer())) { ConstantArray *Init = cast(GV->getInitializer()); From alenhar2 at cs.uiuc.edu Fri Jan 27 12:16:39 2006 From: alenhar2 at cs.uiuc.edu (Andrew Lenharth) Date: Fri, 27 Jan 2006 12:16:39 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/DwarfWriter.cpp Message-ID: <200601271816.MAA20372@apoc.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen: DwarfWriter.cpp updated: 1.20 -> 1.21 --- Log message: fix build --- Diffs of the changes: (+1 -1) DwarfWriter.cpp | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/CodeGen/DwarfWriter.cpp diff -u llvm/lib/CodeGen/DwarfWriter.cpp:1.20 llvm/lib/CodeGen/DwarfWriter.cpp:1.21 --- llvm/lib/CodeGen/DwarfWriter.cpp:1.20 Fri Jan 27 09:20:54 2006 +++ llvm/lib/CodeGen/DwarfWriter.cpp Fri Jan 27 12:16:17 2006 @@ -10,7 +10,7 @@ // This file contains support for writing dwarf debug info into asm files. // //===----------------------------------------------------------------------===// - +#include "llvm/Support/DataTypes.h" #include "llvm/CodeGen/DwarfWriter.h" #include "llvm/ADT/StringExtras.h" From lattner at cs.uiuc.edu Fri Jan 27 12:27:30 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Fri, 27 Jan 2006 12:27:30 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86CodeEmitter.cpp Message-ID: <200601271827.MAA14988@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: X86CodeEmitter.cpp updated: 1.84 -> 1.85 --- Log message: Unbreak the JIT with SSE --- Diffs of the changes: (+8 -0) X86CodeEmitter.cpp | 8 ++++++++ 1 files changed, 8 insertions(+) Index: llvm/lib/Target/X86/X86CodeEmitter.cpp diff -u llvm/lib/Target/X86/X86CodeEmitter.cpp:1.84 llvm/lib/Target/X86/X86CodeEmitter.cpp:1.85 --- llvm/lib/Target/X86/X86CodeEmitter.cpp:1.84 Mon Jan 23 22:50:48 2006 +++ llvm/lib/Target/X86/X86CodeEmitter.cpp Fri Jan 27 12:27:18 2006 @@ -372,6 +372,14 @@ MCE.emitByte(0x0F); // Two-byte opcode prefix break; case X86II::REP: break; // already handled. + case X86II::XS: // F3 0F + MCE.emitByte(0xF3); + MCE.emitByte(0x0F); + break; + case X86II::XD: // F2 0F + MCE.emitByte(0xF2); + MCE.emitByte(0x0F); + break; case X86II::D8: case X86II::D9: case X86II::DA: case X86II::DB: case X86II::DC: case X86II::DD: case X86II::DE: case X86II::DF: MCE.emitByte(0xD8+ From jlaskey at apple.com Fri Jan 27 12:28:42 2006 From: jlaskey at apple.com (Jim Laskey) Date: Fri, 27 Jan 2006 12:28:42 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/DwarfWriter.cpp Message-ID: <200601271828.MAA15002@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen: DwarfWriter.cpp updated: 1.21 -> 1.22 --- Log message: Following convention. --- Diffs of the changes: (+1 -1) DwarfWriter.cpp | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/CodeGen/DwarfWriter.cpp diff -u llvm/lib/CodeGen/DwarfWriter.cpp:1.21 llvm/lib/CodeGen/DwarfWriter.cpp:1.22 --- llvm/lib/CodeGen/DwarfWriter.cpp:1.21 Fri Jan 27 12:16:17 2006 +++ llvm/lib/CodeGen/DwarfWriter.cpp Fri Jan 27 12:28:31 2006 @@ -10,7 +10,6 @@ // This file contains support for writing dwarf debug info into asm files. // //===----------------------------------------------------------------------===// -#include "llvm/Support/DataTypes.h" #include "llvm/CodeGen/DwarfWriter.h" #include "llvm/ADT/StringExtras.h" @@ -18,6 +17,7 @@ #include "llvm/Type.h" #include "llvm/CodeGen/AsmPrinter.h" #include "llvm/CodeGen/MachineDebugInfo.h" +#include "llvm/Support/DataTypes.h" #include "llvm/Support/Dwarf.h" #include "llvm/Support/CommandLine.h" #include "llvm/Support/Mangler.h" From lattner at cs.uiuc.edu Fri Jan 27 12:31:01 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Fri, 27 Jan 2006 12:31:01 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86Subtarget.cpp Message-ID: <200601271831.MAA15430@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: X86Subtarget.cpp updated: 1.10 -> 1.11 --- Log message: force sse/3dnow off until they work. This fixes all the x86 failures last night --- Diffs of the changes: (+5 -0) X86Subtarget.cpp | 5 +++++ 1 files changed, 5 insertions(+) Index: llvm/lib/Target/X86/X86Subtarget.cpp diff -u llvm/lib/Target/X86/X86Subtarget.cpp:1.10 llvm/lib/Target/X86/X86Subtarget.cpp:1.11 --- llvm/lib/Target/X86/X86Subtarget.cpp:1.10 Fri Jan 27 02:10:46 2006 +++ llvm/lib/Target/X86/X86Subtarget.cpp Fri Jan 27 12:30:50 2006 @@ -94,6 +94,11 @@ // Default to ELF unless otherwise specified. TargetType = isELF; + + // FIXME: Force these off until they work. An llc-beta option should turn + // them back on. + X86SSELevel = NoMMXSSE; + X863DNowLevel = NoThreeDNow; // Set the boolean corresponding to the current target triple, or the default // if one cannot be determined, to true. From jlaskey at apple.com Fri Jan 27 12:32:53 2006 From: jlaskey at apple.com (Jim Laskey) Date: Fri, 27 Jan 2006 12:32:53 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/DwarfWriter.cpp Message-ID: <200601271832.MAA15486@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen: DwarfWriter.cpp updated: 1.22 -> 1.23 --- Log message: Sorry - really folowing convention. --- Diffs of the changes: (+1 -1) DwarfWriter.cpp | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/CodeGen/DwarfWriter.cpp diff -u llvm/lib/CodeGen/DwarfWriter.cpp:1.22 llvm/lib/CodeGen/DwarfWriter.cpp:1.23 --- llvm/lib/CodeGen/DwarfWriter.cpp:1.22 Fri Jan 27 12:28:31 2006 +++ llvm/lib/CodeGen/DwarfWriter.cpp Fri Jan 27 12:32:41 2006 @@ -10,6 +10,7 @@ // This file contains support for writing dwarf debug info into asm files. // //===----------------------------------------------------------------------===// + #include "llvm/CodeGen/DwarfWriter.h" #include "llvm/ADT/StringExtras.h" @@ -17,7 +18,6 @@ #include "llvm/Type.h" #include "llvm/CodeGen/AsmPrinter.h" #include "llvm/CodeGen/MachineDebugInfo.h" -#include "llvm/Support/DataTypes.h" #include "llvm/Support/Dwarf.h" #include "llvm/Support/CommandLine.h" #include "llvm/Support/Mangler.h" From jlaskey at apple.com Fri Jan 27 12:32:54 2006 From: jlaskey at apple.com (Jim Laskey) Date: Fri, 27 Jan 2006 12:32:54 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/DwarfWriter.h Message-ID: <200601271832.MAA15490@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/CodeGen: DwarfWriter.h updated: 1.20 -> 1.21 --- Log message: Sorry - really folowing convention. --- Diffs of the changes: (+1 -0) DwarfWriter.h | 1 + 1 files changed, 1 insertion(+) Index: llvm/include/llvm/CodeGen/DwarfWriter.h diff -u llvm/include/llvm/CodeGen/DwarfWriter.h:1.20 llvm/include/llvm/CodeGen/DwarfWriter.h:1.21 --- llvm/include/llvm/CodeGen/DwarfWriter.h:1.20 Fri Jan 27 09:20:54 2006 +++ llvm/include/llvm/CodeGen/DwarfWriter.h Fri Jan 27 12:32:41 2006 @@ -21,6 +21,7 @@ #define LLVM_CODEGEN_DWARFWRITER_H #include "llvm/ADT/UniqueVector.h" +#include "llvm/Support/DataTypes.h" #include #include From evan.cheng at apple.com Fri Jan 27 13:30:42 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Fri, 27 Jan 2006 13:30:42 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86Subtarget.cpp Message-ID: <200601271930.NAA21328@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: X86Subtarget.cpp updated: 1.11 -> 1.12 --- Log message: A better workaround --- Diffs of the changes: (+5 -6) X86Subtarget.cpp | 11 +++++------ 1 files changed, 5 insertions(+), 6 deletions(-) Index: llvm/lib/Target/X86/X86Subtarget.cpp diff -u llvm/lib/Target/X86/X86Subtarget.cpp:1.11 llvm/lib/Target/X86/X86Subtarget.cpp:1.12 --- llvm/lib/Target/X86/X86Subtarget.cpp:1.11 Fri Jan 27 12:30:50 2006 +++ llvm/lib/Target/X86/X86Subtarget.cpp Fri Jan 27 13:30:30 2006 @@ -22,11 +22,10 @@ #if defined(__GNUC__) asm ("pushl\t%%ebx\n\t" "cpuid\n\t" + "movl\t%%ebx, %%esi\n\t" "popl\t%%ebx" : "=a" (*EAX), -#if !defined(__DYNAMIC__) // This works around a gcc -fPIC bug - "=b" (*EBX), -#endif + "=S" (*EBX), "=c" (*ECX), "=d" (*EDX) : "a" (value)); @@ -35,11 +34,11 @@ } static const char *GetCurrentX86CPU() { - unsigned EAX = 0, DUMMY = 0, ECX = 0, EDX = 0; - GetCpuIDAndInfo(0x1, &EAX, &DUMMY, &ECX, &EDX); + unsigned EAX = 0, EBX = 0, ECX = 0, EDX = 0; + GetCpuIDAndInfo(0x1, &EAX, &EBX, &ECX, &EDX); unsigned Family = (EAX & (0xffffffff >> (32 - 4)) << 8) >> 8; // Bits 8 - 11 unsigned Model = (EAX & (0xffffffff >> (32 - 4)) << 4) >> 4; // Bits 4 - 7 - GetCpuIDAndInfo(0x80000001, &EAX, &DUMMY, &ECX, &EDX); + GetCpuIDAndInfo(0x80000001, &EAX, &EBX, &ECX, &EDX); bool Em64T = EDX & (1 << 29); switch (Family) { From alenhar2 at cs.uiuc.edu Fri Jan 27 13:49:19 2006 From: alenhar2 at cs.uiuc.edu (Andrew Lenharth) Date: Fri, 27 Jan 2006 13:49:19 -0600 Subject: [llvm-commits] CVS: llvm-test/External/SPEC/CINT95/126.gcc/Makefile Message-ID: <200601271949.NAA20696@apoc.cs.uiuc.edu> Changes in directory llvm-test/External/SPEC/CINT95/126.gcc: Makefile updated: 1.6 -> 1.7 --- Log message: set some flags to lessen the errors --- Diffs of the changes: (+6 -1) Makefile | 7 ++++++- 1 files changed, 6 insertions(+), 1 deletion(-) Index: llvm-test/External/SPEC/CINT95/126.gcc/Makefile diff -u llvm-test/External/SPEC/CINT95/126.gcc/Makefile:1.6 llvm-test/External/SPEC/CINT95/126.gcc/Makefile:1.7 --- llvm-test/External/SPEC/CINT95/126.gcc/Makefile:1.6 Mon Sep 6 23:18:02 2004 +++ llvm-test/External/SPEC/CINT95/126.gcc/Makefile Fri Jan 27 13:48:57 2006 @@ -10,5 +10,10 @@ STDOUT_FILENAME = amptjp.s endif -include ../../Makefile.spec95 +include ${LEVEL}/Makefile.config + +ifeq ($(ARCH),Alpha) +CPPFLAGS += -DHOST_BITS_PER_WIDE_INT=64 -DHOST_WIDE_INT=long +endif +include ../../Makefile.spec95 From jlaskey at apple.com Fri Jan 27 14:31:37 2006 From: jlaskey at apple.com (Jim Laskey) Date: Fri, 27 Jan 2006 14:31:37 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/DwarfWriter.h Message-ID: <200601272031.OAA27825@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/CodeGen: DwarfWriter.h updated: 1.21 -> 1.22 --- Log message: Using bit size of integers instead of ambiguous "long" et all. --- Diffs of the changes: (+8 -8) DwarfWriter.h | 16 ++++++++-------- 1 files changed, 8 insertions(+), 8 deletions(-) Index: llvm/include/llvm/CodeGen/DwarfWriter.h diff -u llvm/include/llvm/CodeGen/DwarfWriter.h:1.21 llvm/include/llvm/CodeGen/DwarfWriter.h:1.22 --- llvm/include/llvm/CodeGen/DwarfWriter.h:1.21 Fri Jan 27 12:32:41 2006 +++ llvm/include/llvm/CodeGen/DwarfWriter.h Fri Jan 27 14:31:25 2006 @@ -578,21 +578,21 @@ /// value. static unsigned SizeSLEB128(int Value); - /// EmitByte - Emit a byte directive and value. + /// EmitInt8 - Emit a byte directive and value. /// - void EmitByte(int Value) const; + void EmitInt8(int Value) const; - /// EmitShort - Emit a short directive and value. + /// EmitInt16 - Emit a short directive and value. /// - void EmitShort(int Value) const; + void EmitInt16(int Value) const; - /// EmitLong - Emit a long directive and value. + /// EmitInt32 - Emit a long directive and value. /// - void EmitLong(int Value) const; + void EmitInt32(int Value) const; - /// EmitLongLong - Emit a long long directive and value. + /// EmitInt64 - Emit a long long directive and value. /// - void EmitLongLong(uint64_t Value) const; + void EmitInt64(uint64_t Value) const; /// EmitString - Emit a string with quotes and a null terminator. /// Special characters are emitted properly. (Eg. '\t') From jlaskey at apple.com Fri Jan 27 14:31:37 2006 From: jlaskey at apple.com (Jim Laskey) Date: Fri, 27 Jan 2006 14:31:37 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/DwarfWriter.cpp Message-ID: <200601272031.OAA27829@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen: DwarfWriter.cpp updated: 1.23 -> 1.24 --- Log message: Using bit size of integers instead of ambiguous "long" et all. --- Diffs of the changes: (+62 -62) DwarfWriter.cpp | 124 ++++++++++++++++++++++++++++---------------------------- 1 files changed, 62 insertions(+), 62 deletions(-) Index: llvm/lib/CodeGen/DwarfWriter.cpp diff -u llvm/lib/CodeGen/DwarfWriter.cpp:1.23 llvm/lib/CodeGen/DwarfWriter.cpp:1.24 --- llvm/lib/CodeGen/DwarfWriter.cpp:1.23 Fri Jan 27 12:32:41 2006 +++ llvm/lib/CodeGen/DwarfWriter.cpp Fri Jan 27 14:31:25 2006 @@ -671,10 +671,10 @@ void DIEInteger::EmitValue(const DwarfWriter &DW, unsigned Form) const { switch (Form) { case DW_FORM_flag: // Fall thru - case DW_FORM_data1: DW.EmitByte(Integer); break; - case DW_FORM_data2: DW.EmitShort(Integer); break; - case DW_FORM_data4: DW.EmitLong(Integer); break; - case DW_FORM_data8: DW.EmitLongLong(Integer); break; + case DW_FORM_data1: DW.EmitInt8(Integer); break; + case DW_FORM_data2: DW.EmitInt16(Integer); break; + case DW_FORM_data4: DW.EmitInt32(Integer); break; + case DW_FORM_data8: DW.EmitInt64(Integer); break; case DW_FORM_udata: DW.EmitULEB128Bytes(Integer); break; case DW_FORM_sdata: DW.EmitSLEB128Bytes(Integer); break; default: assert(0 && "DIE Value form not supported yet"); break; @@ -730,10 +730,10 @@ /// EmitValue - Emit label value. /// void DIEObjectLabel::EmitValue(const DwarfWriter &DW, unsigned Form) const { - DW.EmitByte(sizeof(int8_t) + DW.getAddressSize()); + DW.EmitInt8(sizeof(int8_t) + DW.getAddressSize()); DW.EOL("DW_FORM_block1 length"); - DW.EmitByte(DW_OP_addr); + DW.EmitInt8(DW_OP_addr); DW.EOL("DW_OP_addr"); DW.EmitReference(Label); @@ -763,7 +763,7 @@ /// EmitValue - Emit extry offset. /// void DIEntry::EmitValue(const DwarfWriter &DW, unsigned Form) const { - DW.EmitLong(Entry->getOffset()); + DW.EmitInt32(Entry->getOffset()); } /// SizeOf - Determine size of label value in bytes. @@ -1084,41 +1084,41 @@ return Size; } -/// EmitByte - Emit a byte directive and value. +/// EmitInt8 - Emit a byte directive and value. /// -void DwarfWriter::EmitByte(int Value) const { +void DwarfWriter::EmitInt8(int Value) const { O << Asm->Data8bitsDirective; PrintHex(Value); } -/// EmitShort - Emit a short directive and value. +/// EmitInt16 - Emit a short directive and value. /// -void DwarfWriter::EmitShort(int Value) const { +void DwarfWriter::EmitInt16(int Value) const { O << Asm->Data16bitsDirective; PrintHex(Value); } -/// EmitLong - Emit a long directive and value. +/// EmitInt32 - Emit a long directive and value. /// -void DwarfWriter::EmitLong(int Value) const { +void DwarfWriter::EmitInt32(int Value) const { O << Asm->Data32bitsDirective; PrintHex(Value); } -/// EmitLongLong - Emit a long long directive and value. +/// EmitInt64 - Emit a long long directive and value. /// -void DwarfWriter::EmitLongLong(uint64_t Value) const { +void DwarfWriter::EmitInt64(uint64_t Value) const { if (Asm->Data64bitsDirective) { O << Asm->Data64bitsDirective << "0x" << std::hex << Value << std::dec; } else { const TargetData &TD = Asm->TM.getTargetData(); if (TD.isBigEndian()) { - EmitLong(unsigned(Value >> 32)); O << "\n"; - EmitLong(unsigned(Value)); + EmitInt32(unsigned(Value >> 32)); O << "\n"; + EmitInt32(unsigned(Value)); } else { - EmitLong(unsigned(Value)); O << "\n"; - EmitLong(unsigned(Value >> 32)); + EmitInt32(unsigned(Value)); O << "\n"; + EmitInt32(unsigned(Value >> 32)); } } } @@ -1329,7 +1329,7 @@ switch (Attr) { case DW_AT_sibling: { - EmitLong(Die->SiblingOffset()); + EmitInt32(Die->SiblingOffset()); break; } default: { @@ -1352,7 +1352,7 @@ EmitDIE(Children[j]); } - EmitByte(0); EOL("End Of Children Mark"); + EmitInt8(0); EOL("End Of Children Mark"); } } @@ -1428,14 +1428,14 @@ // Emit size of content not including length itself unsigned ContentSize = CompileUnits[N - 1]->SiblingOffset(); - EmitLong(ContentSize - sizeof(int32_t)); + EmitInt32(ContentSize - sizeof(int32_t)); EOL("Length of Compilation Unit Info"); - EmitShort(DWARF_VERSION); EOL("DWARF version number"); + EmitInt16(DWARF_VERSION); EOL("DWARF version number"); EmitReference("abbrev_begin", 0); EOL("Offset Into Abbrev. Section"); - EmitByte(AddressSize); EOL("Address Size (in bytes)"); + EmitInt8(AddressSize); EOL("Address Size (in bytes)"); // Process each compile unit. for (unsigned i = 0; i < N; ++i) { @@ -1490,32 +1490,32 @@ EOL("Length of Source Line Info"); EmitLabel("line_begin", 0); - EmitShort(DWARF_VERSION); EOL("DWARF version number"); + EmitInt16(DWARF_VERSION); EOL("DWARF version number"); EmitDifference("line_prolog_end", 0, "line_prolog_begin", 0); EOL("Prolog Length"); EmitLabel("line_prolog_begin", 0); - EmitByte(1); EOL("Minimum Instruction Length"); + EmitInt8(1); EOL("Minimum Instruction Length"); - EmitByte(1); EOL("Default is_stmt_start flag"); + EmitInt8(1); EOL("Default is_stmt_start flag"); - EmitByte(MinLineDelta); EOL("Line Base Value (Special Opcodes)"); + EmitInt8(MinLineDelta); EOL("Line Base Value (Special Opcodes)"); - EmitByte(MaxLineDelta); EOL("Line Range Value (Special Opcodes)"); + EmitInt8(MaxLineDelta); EOL("Line Range Value (Special Opcodes)"); - EmitByte(-MinLineDelta); EOL("Special Opcode Base"); + EmitInt8(-MinLineDelta); EOL("Special Opcode Base"); // Line number standard opcode encodings argument count - EmitByte(0); EOL("DW_LNS_copy arg count"); - EmitByte(1); EOL("DW_LNS_advance_pc arg count"); - EmitByte(1); EOL("DW_LNS_advance_line arg count"); - EmitByte(1); EOL("DW_LNS_set_file arg count"); - EmitByte(1); EOL("DW_LNS_set_column arg count"); - EmitByte(0); EOL("DW_LNS_negate_stmt arg count"); - EmitByte(0); EOL("DW_LNS_set_basic_block arg count"); - EmitByte(0); EOL("DW_LNS_const_add_pc arg count"); - EmitByte(1); EOL("DW_LNS_fixed_advance_pc arg count"); + EmitInt8(0); EOL("DW_LNS_copy arg count"); + EmitInt8(1); EOL("DW_LNS_advance_pc arg count"); + EmitInt8(1); EOL("DW_LNS_advance_line arg count"); + EmitInt8(1); EOL("DW_LNS_set_file arg count"); + EmitInt8(1); EOL("DW_LNS_set_column arg count"); + EmitInt8(0); EOL("DW_LNS_negate_stmt arg count"); + EmitInt8(0); EOL("DW_LNS_set_basic_block arg count"); + EmitInt8(0); EOL("DW_LNS_const_add_pc arg count"); + EmitInt8(1); EOL("DW_LNS_fixed_advance_pc arg count"); const UniqueVector &Directories = DebugInfo->getDirectories(); const UniqueVector &SourceFiles = DebugInfo->getSourceFiles(); @@ -1525,7 +1525,7 @@ DirectoryID <= NDID; ++DirectoryID) { EmitString(Directories[DirectoryID]); EOL("Directory"); } - EmitByte(0); EOL("End of directories"); + EmitInt8(0); EOL("End of directories"); // Emit files. for (unsigned SourceID = 1, NSID = SourceFiles.size(); @@ -1536,7 +1536,7 @@ EmitULEB128Bytes(0); EOL("Mod date"); EmitULEB128Bytes(0); EOL("File size"); } - EmitByte(0); EOL("End of files"); + EmitInt8(0); EOL("End of files"); EmitLabel("line_prolog_end", 0); @@ -1552,15 +1552,15 @@ SourceLineInfo *LineInfo = LineInfos[i]; // Define the line address. - EmitByte(0); EOL("Extended Op"); - EmitByte(4 + 1); EOL("Op size"); - EmitByte(DW_LNE_set_address); EOL("DW_LNE_set_address"); + EmitInt8(0); EOL("Extended Op"); + EmitInt8(4 + 1); EOL("Op size"); + EmitInt8(DW_LNE_set_address); EOL("DW_LNE_set_address"); EmitReference("loc", i + 1); EOL("Location label"); // If change of source, then switch to the new source. if (Source != LineInfo->getSourceID()) { Source = LineInfo->getSourceID(); - EmitByte(DW_LNS_set_file); EOL("DW_LNS_set_file"); + EmitInt8(DW_LNS_set_file); EOL("DW_LNS_set_file"); EmitULEB128Bytes(0); EOL("New Source"); } @@ -1576,23 +1576,23 @@ // If delta is small enough and in range... if (Delta >= 0 && Delta < (MaxLineDelta - 1)) { // ... then use fast opcode. - EmitByte(Delta - MinLineDelta); EOL("Line Delta"); + EmitInt8(Delta - MinLineDelta); EOL("Line Delta"); } else { // ... otherwise use long hand. - EmitByte(DW_LNS_advance_line); EOL("DW_LNS_advance_line"); + EmitInt8(DW_LNS_advance_line); EOL("DW_LNS_advance_line"); EmitSLEB128Bytes(Offset); EOL("Line Offset"); - EmitByte(DW_LNS_copy); EOL("DW_LNS_copy"); + EmitInt8(DW_LNS_copy); EOL("DW_LNS_copy"); } } else { // Copy the previous row (different address or source) - EmitByte(DW_LNS_copy); EOL("DW_LNS_copy"); + EmitInt8(DW_LNS_copy); EOL("DW_LNS_copy"); } } // Mark end of matrix. - EmitByte(0); EOL("DW_LNE_end_sequence"); + EmitInt8(0); EOL("DW_LNE_end_sequence"); EmitULEB128Bytes(1); O << "\n"; - EmitByte(1); O << "\n"; + EmitInt8(1); O << "\n"; EmitLabel("line_end", 0); } @@ -1616,7 +1616,7 @@ EmitLabel("pubnames_begin", 0); - EmitShort(DWARF_VERSION); EOL("DWARF Version"); + EmitInt16(DWARF_VERSION); EOL("DWARF Version"); EmitReference("info_begin", 0); EOL("Offset of Compilation Unit Info"); @@ -1629,12 +1629,12 @@ const std::string &Name = GI->first; DIE * Entity = GI->second; - EmitLong(Entity->getOffset()); EOL("DIE offset"); + EmitInt32(Entity->getOffset()); EOL("DIE offset"); EmitString(Name); EOL("External Name"); } - EmitLong(0); EOL("End Mark"); + EmitInt32(0); EOL("End Mark"); EmitLabel("pubnames_end", 0); } } @@ -1685,25 +1685,25 @@ // FIXME - Mock up // Don't include size of length - EmitLong(0x1c); EOL("Length of Address Ranges Info"); + EmitInt32(0x1c); EOL("Length of Address Ranges Info"); - EmitShort(DWARF_VERSION); EOL("Dwarf Version"); + EmitInt16(DWARF_VERSION); EOL("Dwarf Version"); EmitReference("info_begin", 0); EOL("Offset of Compilation Unit Info"); - EmitByte(AddressSize); EOL("Size of Address"); + EmitInt8(AddressSize); EOL("Size of Address"); - EmitByte(0); EOL("Size of Segment Descriptor"); + EmitInt8(0); EOL("Size of Segment Descriptor"); - EmitShort(0); EOL("Pad (1)"); - EmitShort(0); EOL("Pad (2)"); + EmitInt16(0); EOL("Pad (1)"); + EmitInt16(0); EOL("Pad (2)"); // Range 1 EmitReference("text_begin", 0); EOL("Address"); EmitDifference("text_end", 0, "text_begin", 0); EOL("Length"); - EmitLong(0); EOL("EOM (1)"); - EmitLong(0); EOL("EOM (2)"); + EmitInt32(0); EOL("EOM (1)"); + EmitInt32(0); EOL("EOM (2)"); } /// EmitDebugRanges - Emit visible names into a debug ranges section. From alenhar2 at cs.uiuc.edu Fri Jan 27 14:48:55 2006 From: alenhar2 at cs.uiuc.edu (Andrew Lenharth) Date: Fri, 27 Jan 2006 14:48:55 -0600 Subject: [llvm-commits] CVS: llvm-test/External/SPEC/CINT95/Makefile Message-ID: <200601272048.OAA20763@apoc.cs.uiuc.edu> Changes in directory llvm-test/External/SPEC/CINT95: Makefile updated: 1.8 -> 1.9 --- Log message: no idea why this is disabled, it works --- Diffs of the changes: (+0 -7) Makefile | 7 ------- 1 files changed, 7 deletions(-) Index: llvm-test/External/SPEC/CINT95/Makefile diff -u llvm-test/External/SPEC/CINT95/Makefile:1.8 llvm-test/External/SPEC/CINT95/Makefile:1.9 --- llvm-test/External/SPEC/CINT95/Makefile:1.8 Fri Dec 2 13:16:17 2005 +++ llvm-test/External/SPEC/CINT95/Makefile Fri Jan 27 14:48:33 2006 @@ -9,13 +9,6 @@ 134.perl \ 147.vortex -# Get the $(ARCH) setting -include ${LEVEL}/Makefile.config - -ifeq ($(ARCH), Alpha) -PARALLEL_DIRS := $(filter-out 134.perl, $(PARALLEL_DIRS)) -endif - # Include the standard makefiles include ${LEVEL}/External/Makefile.external From natebegeman at mac.com Fri Jan 27 15:09:36 2006 From: natebegeman at mac.com (Nate Begeman) Date: Fri, 27 Jan 2006 15:09:36 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/IA64/IA64ISelLowering.cpp IA64ISelLowering.h Message-ID: <200601272109.PAA29530@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/IA64: IA64ISelLowering.cpp updated: 1.28 -> 1.29 IA64ISelLowering.h updated: 1.6 -> 1.7 --- Log message: Remove TLI.LowerReturnTo, and just let targets custom lower ISD::RET for the same functionality. This addresses another piece of bug 680: http://llvm.cs.uiuc.edu/PR680 . Next, on to fixing Alpha VAARG, which I broke last time. --- Diffs of the changes: (+31 -61) IA64ISelLowering.cpp | 83 +++++++++++++++++++-------------------------------- IA64ISelLowering.h | 9 ----- 2 files changed, 31 insertions(+), 61 deletions(-) Index: llvm/lib/Target/IA64/IA64ISelLowering.cpp diff -u llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.28 llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.29 --- llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.28 Wed Jan 25 12:52:42 2006 +++ llvm/lib/Target/IA64/IA64ISelLowering.cpp Fri Jan 27 15:09:22 2006 @@ -537,44 +537,6 @@ return std::make_pair(RetVal, Chain); } -SDOperand IA64TargetLowering::LowerReturnTo(SDOperand Chain, SDOperand Op, - SelectionDAG &DAG) { - SDOperand Copy, InFlag; - SDOperand AR_PFSVal = DAG.getCopyFromReg(Chain, this->VirtGPR, - MVT::i64); - Chain = AR_PFSVal.getValue(1); - - switch (Op.getValueType()) { - default: assert(0 && "Unknown type to return! (promote?)"); - case MVT::i64: - Copy = DAG.getCopyToReg(Chain, IA64::r8, Op, InFlag); - break; - case MVT::f64: - Copy = DAG.getCopyToReg(Chain, IA64::F8, Op, InFlag); - break; - } - - Chain = Copy.getValue(0); - InFlag = Copy.getValue(1); - // we need to copy VirtGPR (the vreg (to become a real reg)) that holds - // the output of this function's alloc instruction back into ar.pfs - // before we return. this copy must not float up above the last - // outgoing call in this function - we flag this to the ret instruction - Chain = DAG.getCopyToReg(Chain, IA64::AR_PFS, AR_PFSVal, InFlag); - InFlag = Chain.getValue(1); - - // and then just emit a 'ret' instruction - std::vector NodeTys; - std::vector RetOperands; - NodeTys.push_back(MVT::Other); - NodeTys.push_back(MVT::Flag); - RetOperands.push_back(Chain); - RetOperands.push_back(InFlag); - - return DAG.getNode(IA64ISD::RET_FLAG, NodeTys, RetOperands); -// return DAG.getNode(IA64ISD::RET_FLAG, MVT::Other, MVT::Other, Copy, Chain, InFlag); -} - std::pair IA64TargetLowering:: LowerFrameReturnAddress(bool isFrameAddress, SDOperand Chain, unsigned Depth, SelectionDAG &DAG) { @@ -586,21 +548,38 @@ LowerOperation(SDOperand Op, SelectionDAG &DAG) { switch (Op.getOpcode()) { default: assert(0 && "Should not custom lower this!"); - case ISD::RET: { // the DAGgy stuff takes care of - // restoring ar.pfs before adding a br.ret for functions - // that return something, but we need to take care of stuff - // that returns void manually, so here it is: - assert(Op.getNumOperands()==1 && - "trying to custom lower a return other than void! (numops!=1)"); + case ISD::RET: { + SDOperand AR_PFSVal, Copy; - SDOperand Chain = Op.getOperand(0); - SDOperand AR_PFSVal = DAG.getCopyFromReg(Chain, this->VirtGPR, - MVT::i64); - Chain = AR_PFSVal.getValue(1); - Chain = DAG.getCopyToReg(Chain, IA64::AR_PFS, AR_PFSVal); - - // and then just emit a 'ret' instruction - return DAG.getNode(IA64ISD::RET_FLAG, MVT::Other, Chain); + switch(Op.getNumOperands()) { + default: + assert(0 && "Do not know how to return this many arguments!"); + abort(); + case 1: + AR_PFSVal = DAG.getCopyFromReg(Op.getOperand(0), VirtGPR, MVT::i64); + AR_PFSVal = DAG.getCopyToReg(AR_PFSVal.getValue(1), IA64::AR_PFS, + AR_PFSVal); + return DAG.getNode(IA64ISD::RET_FLAG, MVT::Other, AR_PFSVal); + case 2: { + // Copy the result into the output register & restore ar.pfs + MVT::ValueType ArgVT = Op.getOperand(1).getValueType(); + unsigned ArgReg = MVT::isInteger(ArgVT) ? IA64::r8 : IA64::F8; + + AR_PFSVal = DAG.getCopyFromReg(Op.getOperand(0), VirtGPR, MVT::i64); + Copy = DAG.getCopyToReg(AR_PFSVal.getValue(1), ArgReg, Op.getOperand(1), + SDOperand()); + AR_PFSVal = DAG.getCopyToReg(Copy.getValue(0), IA64::AR_PFS, AR_PFSVal, + Copy.getValue(1)); + std::vector NodeTys; + std::vector RetOperands; + NodeTys.push_back(MVT::Other); + NodeTys.push_back(MVT::Flag); + RetOperands.push_back(AR_PFSVal); + RetOperands.push_back(AR_PFSVal.getValue(1)); + return DAG.getNode(IA64ISD::RET_FLAG, NodeTys, RetOperands); + } + } + return SDOperand(); } case ISD::VAARG: { MVT::ValueType VT = getPointerTy(); Index: llvm/lib/Target/IA64/IA64ISelLowering.h diff -u llvm/lib/Target/IA64/IA64ISelLowering.h:1.6 llvm/lib/Target/IA64/IA64ISelLowering.h:1.7 --- llvm/lib/Target/IA64/IA64ISelLowering.h:1.6 Wed Jan 25 12:21:52 2006 +++ llvm/lib/Target/IA64/IA64ISelLowering.h Fri Jan 27 15:09:22 2006 @@ -48,10 +48,6 @@ unsigned VirtGPR; // this is public so it can be accessed in the selector // for ISD::RET. add an accessor instead? FIXME - /// LowerOperation - Provide custom lowering hooks for some operations. - /// -// XXX virtual SDOperand LowerOperation(SDOperand Op, SelectionDAG &DAG); - const char *getTargetNodeName(unsigned Opcode) const; /// LowerArguments - This hook must be implemented to indicate how we should @@ -67,11 +63,6 @@ bool isTailCall, SDOperand Callee, ArgListTy &Args, SelectionDAG &DAG); - /// LowerReturnTo - This spits out restore-previous-frame-state+br.ret - /// instructions - virtual SDOperand LowerReturnTo(SDOperand Chain, SDOperand Op, - SelectionDAG &DAG); - /// LowerOperation - for custom lowering specific ops /// (currently, only "ret void") virtual SDOperand LowerOperation(SDOperand Op, SelectionDAG &DAG); From natebegeman at mac.com Fri Jan 27 15:09:37 2006 From: natebegeman at mac.com (Nate Begeman) Date: Fri, 27 Jan 2006 15:09:37 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/Target/TargetLowering.h Message-ID: <200601272109.PAA29542@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/Target: TargetLowering.h updated: 1.37 -> 1.38 --- Log message: Remove TLI.LowerReturnTo, and just let targets custom lower ISD::RET for the same functionality. This addresses another piece of bug 680: http://llvm.cs.uiuc.edu/PR680 . Next, on to fixing Alpha VAARG, which I broke last time. --- Diffs of the changes: (+0 -6) TargetLowering.h | 6 ------ 1 files changed, 6 deletions(-) Index: llvm/include/llvm/Target/TargetLowering.h diff -u llvm/include/llvm/Target/TargetLowering.h:1.37 llvm/include/llvm/Target/TargetLowering.h:1.38 --- llvm/include/llvm/Target/TargetLowering.h:1.37 Thu Jan 26 14:27:33 2006 +++ llvm/include/llvm/Target/TargetLowering.h Fri Jan 27 15:09:21 2006 @@ -360,12 +360,6 @@ unsigned CallingConv, bool isTailCall, SDOperand Callee, ArgListTy &Args, SelectionDAG &DAG) = 0; - /// LowerReturnTo - This hook lowers a return instruction into the appropriate - /// legal ISD::RET node for the target's current ABI. This method is optional - /// and is intended for targets that need non-standard behavior. - virtual SDOperand LowerReturnTo(SDOperand Chain, SDOperand Op, - SelectionDAG &DAG); - /// LowerFrameReturnAddress - This hook lowers a call to llvm.returnaddress or /// llvm.frameaddress (depending on the value of the first argument). The /// return values are the result pointer and the resultant token chain. If From natebegeman at mac.com Fri Jan 27 15:09:37 2006 From: natebegeman at mac.com (Nate Begeman) Date: Fri, 27 Jan 2006 15:09:37 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelLowering.cpp PPCISelLowering.h Message-ID: <200601272109.PAA29536@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/PowerPC: PPCISelLowering.cpp updated: 1.71 -> 1.72 PPCISelLowering.h updated: 1.15 -> 1.16 --- Log message: Remove TLI.LowerReturnTo, and just let targets custom lower ISD::RET for the same functionality. This addresses another piece of bug 680: http://llvm.cs.uiuc.edu/PR680 . Next, on to fixing Alpha VAARG, which I broke last time. --- Diffs of the changes: (+27 -27) PPCISelLowering.cpp | 51 +++++++++++++++++++++++++++------------------------ PPCISelLowering.h | 3 --- 2 files changed, 27 insertions(+), 27 deletions(-) Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.71 llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.72 --- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.71 Wed Jan 25 12:52:42 2006 +++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp Fri Jan 27 15:09:22 2006 @@ -110,6 +110,9 @@ setOperationAction(ISD::GlobalAddress, MVT::i32, Custom); setOperationAction(ISD::ConstantPool, MVT::i32, Custom); + // RET must be custom lowered, to meet ABI requirements + setOperationAction(ISD::RET , MVT::Other, Custom); + // VASTART needs to be custom lowered to use the VarArgsFrameIndex setOperationAction(ISD::VASTART , MVT::Other, Custom); @@ -440,6 +443,30 @@ return DAG.getNode(ISD::STORE, MVT::Other, Op.getOperand(0), FR, Op.getOperand(1), Op.getOperand(2)); } + case ISD::RET: { + SDOperand Copy; + + switch(Op.getNumOperands()) { + default: + assert(0 && "Do not know how to return this many arguments!"); + abort(); + case 1: + return SDOperand(); // ret void is legal + case 2: { + MVT::ValueType ArgVT = Op.getOperand(1).getValueType(); + unsigned ArgReg = MVT::isInteger(ArgVT) ? PPC::R3 : PPC::F1; + Copy = DAG.getCopyToReg(Op.getOperand(0), ArgReg, Op.getOperand(1), + SDOperand()); + break; + } + case 3: + Copy = DAG.getCopyToReg(Op.getOperand(0), PPC::R3, Op.getOperand(2), + SDOperand()); + Copy = DAG.getCopyToReg(Copy, PPC::R4, Op.getOperand(1),Copy.getValue(1)); + break; + } + return DAG.getNode(PPCISD::RET_FLAG, MVT::Other, Copy, Copy.getValue(1)); + } } return SDOperand(); } @@ -835,30 +862,6 @@ return std::make_pair(RetVal, Chain); } -SDOperand PPCTargetLowering::LowerReturnTo(SDOperand Chain, SDOperand Op, - SelectionDAG &DAG) { - SDOperand Copy; - switch (Op.getValueType()) { - default: assert(0 && "Unknown type to return!"); - case MVT::i32: - Copy = DAG.getCopyToReg(Chain, PPC::R3, Op, SDOperand()); - break; - case MVT::f32: - case MVT::f64: - Copy = DAG.getCopyToReg(Chain, PPC::F1, Op, SDOperand()); - break; - case MVT::i64: - SDOperand Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, MVT::i32, Op, - DAG.getConstant(1, MVT::i32)); - SDOperand Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, MVT::i32, Op, - DAG.getConstant(0, MVT::i32)); - Copy = DAG.getCopyToReg(Chain, PPC::R3, Hi, SDOperand()); - Copy = DAG.getCopyToReg(Copy, PPC::R4, Lo, Copy.getValue(1)); - break; - } - return DAG.getNode(PPCISD::RET_FLAG, MVT::Other, Copy, Copy.getValue(1)); -} - std::pair PPCTargetLowering:: LowerFrameReturnAddress(bool isFrameAddress, SDOperand Chain, unsigned Depth, SelectionDAG &DAG) { Index: llvm/lib/Target/PowerPC/PPCISelLowering.h diff -u llvm/lib/Target/PowerPC/PPCISelLowering.h:1.15 llvm/lib/Target/PowerPC/PPCISelLowering.h:1.16 --- llvm/lib/Target/PowerPC/PPCISelLowering.h:1.15 Wed Jan 25 12:21:52 2006 +++ llvm/lib/Target/PowerPC/PPCISelLowering.h Fri Jan 27 15:09:22 2006 @@ -91,9 +91,6 @@ bool isTailCall, SDOperand Callee, ArgListTy &Args, SelectionDAG &DAG); - virtual SDOperand LowerReturnTo(SDOperand Chain, SDOperand Op, - SelectionDAG &DAG); - virtual std::pair LowerFrameReturnAddress(bool isFrameAddr, SDOperand Chain, unsigned Depth, SelectionDAG &DAG); From natebegeman at mac.com Fri Jan 27 15:09:37 2006 From: natebegeman at mac.com (Nate Begeman) Date: Fri, 27 Jan 2006 15:09:37 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Message-ID: <200601272109.PAA29540@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/SelectionDAG: SelectionDAGISel.cpp updated: 1.138 -> 1.139 --- Log message: Remove TLI.LowerReturnTo, and just let targets custom lower ISD::RET for the same functionality. This addresses another piece of bug 680: http://llvm.cs.uiuc.edu/PR680 . Next, on to fixing Alpha VAARG, which I broke last time. --- Diffs of the changes: (+22 -37) SelectionDAGISel.cpp | 59 +++++++++++++++++++-------------------------------- 1 files changed, 22 insertions(+), 37 deletions(-) Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.138 llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.139 --- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.138 Thu Jan 26 16:24:51 2006 +++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Fri Jan 27 15:09:21 2006 @@ -496,40 +496,30 @@ DAG.setRoot(DAG.getNode(ISD::RET, MVT::Other, getRoot())); return; } + std::vector NewValues; + NewValues.push_back(getRoot()); + for (unsigned i = 0, e = I.getNumOperands(); i != e; ++i) { + SDOperand RetOp = getValue(I.getOperand(i)); + + // If this is an integer return value, we need to promote it ourselves to + // the full width of a register, since LegalizeOp will use ANY_EXTEND rather + // than sign/zero. + if (MVT::isInteger(RetOp.getValueType()) && + RetOp.getValueType() < MVT::i64) { + MVT::ValueType TmpVT; + if (TLI.getTypeAction(MVT::i32) == TargetLowering::Promote) + TmpVT = TLI.getTypeToTransformTo(MVT::i32); + else + TmpVT = MVT::i32; - SDOperand Op1 = getValue(I.getOperand(0)); - MVT::ValueType TmpVT; - - switch (Op1.getValueType()) { - default: assert(0 && "Unknown value type!"); - case MVT::i1: - case MVT::i8: - case MVT::i16: - case MVT::i32: - // If this is a machine where 32-bits is legal or expanded, promote to - // 32-bits, otherwise, promote to 64-bits. - if (TLI.getTypeAction(MVT::i32) == TargetLowering::Promote) - TmpVT = TLI.getTypeToTransformTo(MVT::i32); - else - TmpVT = MVT::i32; - - // Extend integer types to result type. - if (I.getOperand(0)->getType()->isSigned()) - Op1 = DAG.getNode(ISD::SIGN_EXTEND, TmpVT, Op1); - else - Op1 = DAG.getNode(ISD::ZERO_EXTEND, TmpVT, Op1); - break; - case MVT::f32: - // If this is a machine where f32 is promoted to f64, do so now. - if (TLI.getTypeAction(MVT::f32) == TargetLowering::Promote) - Op1 = DAG.getNode(ISD::FP_EXTEND, TLI.getTypeToTransformTo(MVT::f32),Op1); - break; - case MVT::i64: - case MVT::f64: - break; // No extension needed! + if (I.getOperand(i)->getType()->isSigned()) + RetOp = DAG.getNode(ISD::SIGN_EXTEND, TmpVT, RetOp); + else + RetOp = DAG.getNode(ISD::ZERO_EXTEND, TmpVT, RetOp); + } + NewValues.push_back(RetOp); } - // Allow targets to lower this further to meet ABI requirements - DAG.setRoot(TLI.LowerReturnTo(getRoot(), Op1, DAG)); + DAG.setRoot(DAG.getNode(ISD::RET, MVT::Other, NewValues)); } void SelectionDAGLowering::visitBr(BranchInst &I) { @@ -1249,11 +1239,6 @@ return 0; } -SDOperand TargetLowering::LowerReturnTo(SDOperand Chain, SDOperand Op, - SelectionDAG &DAG) { - return DAG.getNode(ISD::RET, MVT::Other, Chain, Op); -} - void SelectionDAGLowering::visitVAStart(CallInst &I) { DAG.setRoot(DAG.getNode(ISD::VASTART, MVT::Other, getRoot(), getValue(I.getOperand(1)), From natebegeman at mac.com Fri Jan 27 15:09:37 2006 From: natebegeman at mac.com (Nate Begeman) Date: Fri, 27 Jan 2006 15:09:37 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp Message-ID: <200601272109.PAA29552@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/SparcV8: SparcV8ISelDAGToDAG.cpp updated: 1.60 -> 1.61 --- Log message: Remove TLI.LowerReturnTo, and just let targets custom lower ISD::RET for the same functionality. This addresses another piece of bug 680: http://llvm.cs.uiuc.edu/PR680 . Next, on to fixing Alpha VAARG, which I broke last time. --- Diffs of the changes: (+32 -29) SparcV8ISelDAGToDAG.cpp | 61 +++++++++++++++++++++++++----------------------- 1 files changed, 32 insertions(+), 29 deletions(-) Index: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp diff -u llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.60 llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.61 --- llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.60 Thu Jan 26 01:22:22 2006 +++ llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp Fri Jan 27 15:09:22 2006 @@ -63,9 +63,6 @@ unsigned CC, bool isTailCall, SDOperand Callee, ArgListTy &Args, SelectionDAG &DAG); - - virtual SDOperand LowerReturnTo(SDOperand Chain, SDOperand Op, - SelectionDAG &DAG); virtual std::pair LowerFrameReturnAddress(bool isFrameAddr, SDOperand Chain, unsigned Depth, SelectionDAG &DAG); @@ -156,6 +153,9 @@ setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand); setOperationAction(ISD::DEBUG_LABEL, MVT::Other, Expand); + // RET must be custom lowered, to meet ABI requirements + setOperationAction(ISD::RET , MVT::Other, Custom); + // VASTART needs to be custom lowered to use the VarArgsFrameIndex setOperationAction(ISD::VASTART , MVT::Other, Custom); @@ -576,32 +576,6 @@ return std::make_pair(RetVal, Chain); } -SDOperand SparcV8TargetLowering::LowerReturnTo(SDOperand Chain, SDOperand Op, - SelectionDAG &DAG) { - SDOperand Copy; - switch (Op.getValueType()) { - default: assert(0 && "Unknown type to return!"); - case MVT::i32: - Copy = DAG.getCopyToReg(Chain, V8::I0, Op, SDOperand()); - break; - case MVT::f32: - Copy = DAG.getCopyToReg(Chain, V8::F0, Op, SDOperand()); - break; - case MVT::f64: - Copy = DAG.getCopyToReg(Chain, V8::D0, Op, SDOperand()); - break; - case MVT::i64: - SDOperand Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, MVT::i32, Op, - DAG.getConstant(1, MVT::i32)); - SDOperand Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, MVT::i32, Op, - DAG.getConstant(0, MVT::i32)); - Copy = DAG.getCopyToReg(Chain, V8::I0, Hi, SDOperand()); - Copy = DAG.getCopyToReg(Copy, V8::I1, Lo, Copy.getValue(1)); - break; - } - return DAG.getNode(V8ISD::RET_FLAG, MVT::Other, Copy, Copy.getValue(1)); -} - std::pair SparcV8TargetLowering:: LowerFrameReturnAddress(bool isFrameAddr, SDOperand Chain, unsigned Depth, SelectionDAG &DAG) { @@ -694,6 +668,35 @@ return DAG.getNode(ISD::STORE, MVT::Other, Op.getOperand(0), Offset, Op.getOperand(1), Op.getOperand(2)); } + case ISD::RET: { + SDOperand Copy; + + switch(Op.getNumOperands()) { + default: + assert(0 && "Do not know how to return this many arguments!"); + abort(); + case 1: + return SDOperand(); // ret void is legal + case 2: { + unsigned ArgReg; + switch(Op.getOperand(1).getValueType()) { + default: assert(0 && "Unknown type to return!"); + case MVT::i32: ArgReg = V8::I0; break; + case MVT::f32: ArgReg = V8::F0; break; + case MVT::f64: ArgReg = V8::D0; break; + } + Copy = DAG.getCopyToReg(Op.getOperand(0), ArgReg, Op.getOperand(1), + SDOperand()); + break; + } + case 3: + Copy = DAG.getCopyToReg(Op.getOperand(0), V8::I0, Op.getOperand(2), + SDOperand()); + Copy = DAG.getCopyToReg(Copy, V8::I1, Op.getOperand(1), Copy.getValue(1)); + break; + } + return DAG.getNode(V8ISD::RET_FLAG, MVT::Other, Copy, Copy.getValue(1)); + } } } From natebegeman at mac.com Fri Jan 27 15:09:37 2006 From: natebegeman at mac.com (Nate Begeman) Date: Fri, 27 Jan 2006 15:09:37 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp X86ISelLowering.h Message-ID: <200601272109.PAA29551@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: X86ISelLowering.cpp updated: 1.59 -> 1.60 X86ISelLowering.h updated: 1.17 -> 1.18 --- Log message: Remove TLI.LowerReturnTo, and just let targets custom lower ISD::RET for the same functionality. This addresses another piece of bug 680: http://llvm.cs.uiuc.edu/PR680 . Next, on to fixing Alpha VAARG, which I broke last time. --- Diffs of the changes: (+60 -71) X86ISelLowering.cpp | 128 ++++++++++++++++++++++++---------------------------- X86ISelLowering.h | 3 - 2 files changed, 60 insertions(+), 71 deletions(-) Index: llvm/lib/Target/X86/X86ISelLowering.cpp diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.59 llvm/lib/Target/X86/X86ISelLowering.cpp:1.60 --- llvm/lib/Target/X86/X86ISelLowering.cpp:1.59 Fri Jan 27 02:10:46 2006 +++ llvm/lib/Target/X86/X86ISelLowering.cpp Fri Jan 27 15:09:22 2006 @@ -269,69 +269,6 @@ return LowerCCCCallTo(Chain, RetTy, isVarArg, isTailCall, Callee, Args, DAG); } -SDOperand X86TargetLowering::LowerReturnTo(SDOperand Chain, SDOperand Op, - SelectionDAG &DAG) { - if (!X86DAGIsel) - return DAG.getNode(ISD::RET, MVT::Other, Chain, Op); - - SDOperand Copy; - MVT::ValueType OpVT = Op.getValueType(); - switch (OpVT) { - default: assert(0 && "Unknown type to return!"); - case MVT::i32: - Copy = DAG.getCopyToReg(Chain, X86::EAX, Op, SDOperand()); - break; - case MVT::i64: { - SDOperand Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, MVT::i32, Op, - DAG.getConstant(1, MVT::i32)); - SDOperand Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, MVT::i32, Op, - DAG.getConstant(0, MVT::i32)); - Copy = DAG.getCopyToReg(Chain, X86::EDX, Hi, SDOperand()); - Copy = DAG.getCopyToReg(Copy, X86::EAX, Lo, Copy.getValue(1)); - break; - } - case MVT::f32: - case MVT::f64: - if (!X86ScalarSSE) { - std::vector Tys; - Tys.push_back(MVT::Other); - Tys.push_back(MVT::Flag); - std::vector Ops; - Ops.push_back(Chain); - Ops.push_back(Op); - Copy = DAG.getNode(X86ISD::FP_SET_RESULT, Tys, Ops); - } else { - // Spill the value to memory and reload it into top of stack. - unsigned Size = MVT::getSizeInBits(OpVT)/8; - MachineFunction &MF = DAG.getMachineFunction(); - int SSFI = MF.getFrameInfo()->CreateStackObject(Size, Size); - SDOperand StackSlot = DAG.getFrameIndex(SSFI, getPointerTy()); - Chain = DAG.getNode(ISD::STORE, MVT::Other, Chain, Op, - StackSlot, DAG.getSrcValue(NULL)); - std::vector Tys; - Tys.push_back(MVT::f64); - Tys.push_back(MVT::Other); - std::vector Ops; - Ops.push_back(Chain); - Ops.push_back(StackSlot); - Ops.push_back(DAG.getValueType(OpVT)); - Copy = DAG.getNode(X86ISD::FLD, Tys, Ops); - Tys.clear(); - Tys.push_back(MVT::Other); - Tys.push_back(MVT::Flag); - Ops.clear(); - Ops.push_back(Copy.getValue(1)); - Ops.push_back(Copy); - Copy = DAG.getNode(X86ISD::FP_SET_RESULT, Tys, Ops); - } - break; - } - - return DAG.getNode(X86ISD::RET_FLAG, MVT::Other, - Copy, DAG.getConstant(getBytesToPopOnReturn(), MVT::i16), - Copy.getValue(1)); -} - //===----------------------------------------------------------------------===// // C Calling Convention implementation //===----------------------------------------------------------------------===// @@ -1766,11 +1703,6 @@ return DAG.getNode(X86ISD::BRCOND, Op.getValueType(), Op.getOperand(0), Op.getOperand(2), CC, Cond); } - case ISD::RET: { - // Can only be return void. - return DAG.getNode(X86ISD::RET_FLAG, MVT::Other, Op.getOperand(0), - DAG.getConstant(getBytesToPopOnReturn(), MVT::i16)); - } case ISD::MEMSET: { SDOperand InFlag; SDOperand Chain = Op.getOperand(0); @@ -1897,6 +1829,66 @@ return DAG.getNode(ISD::STORE, MVT::Other, Op.getOperand(0), FR, Op.getOperand(1), Op.getOperand(2)); } + case ISD::RET: { + SDOperand Copy; + + switch(Op.getNumOperands()) { + default: + assert(0 && "Do not know how to return this many arguments!"); + abort(); + case 1: + return DAG.getNode(X86ISD::RET_FLAG, MVT::Other, Op.getOperand(0), + DAG.getConstant(getBytesToPopOnReturn(), MVT::i16)); + case 2: { + MVT::ValueType ArgVT = Op.getOperand(1).getValueType(); + if (MVT::isInteger(ArgVT)) + Copy = DAG.getCopyToReg(Op.getOperand(0), X86::EAX, Op.getOperand(1), + SDOperand()); + else if (!X86ScalarSSE) { + std::vector Tys; + Tys.push_back(MVT::Other); + Tys.push_back(MVT::Flag); + std::vector Ops; + Ops.push_back(Op.getOperand(0)); + Ops.push_back(Op.getOperand(1)); + Copy = DAG.getNode(X86ISD::FP_SET_RESULT, Tys, Ops); + } else { + // Spill the value to memory and reload it into top of stack. + unsigned Size = MVT::getSizeInBits(ArgVT)/8; + MachineFunction &MF = DAG.getMachineFunction(); + int SSFI = MF.getFrameInfo()->CreateStackObject(Size, Size); + SDOperand StackSlot = DAG.getFrameIndex(SSFI, getPointerTy()); + SDOperand Chain = DAG.getNode(ISD::STORE, MVT::Other, Op.getOperand(0), + Op.getOperand(1), StackSlot, + DAG.getSrcValue(0)); + std::vector Tys; + Tys.push_back(MVT::f64); + Tys.push_back(MVT::Other); + std::vector Ops; + Ops.push_back(Chain); + Ops.push_back(StackSlot); + Ops.push_back(DAG.getValueType(ArgVT)); + Copy = DAG.getNode(X86ISD::FLD, Tys, Ops); + Tys.clear(); + Tys.push_back(MVT::Other); + Tys.push_back(MVT::Flag); + Ops.clear(); + Ops.push_back(Copy.getValue(1)); + Ops.push_back(Copy); + Copy = DAG.getNode(X86ISD::FP_SET_RESULT, Tys, Ops); + } + break; + } + case 3: + Copy = DAG.getCopyToReg(Op.getOperand(0), X86::EDX, Op.getOperand(2), + SDOperand()); + Copy = DAG.getCopyToReg(Copy, X86::EAX,Op.getOperand(1),Copy.getValue(1)); + break; + } + return DAG.getNode(X86ISD::RET_FLAG, MVT::Other, + Copy, DAG.getConstant(getBytesToPopOnReturn(), MVT::i16), + Copy.getValue(1)); + } } } Index: llvm/lib/Target/X86/X86ISelLowering.h diff -u llvm/lib/Target/X86/X86ISelLowering.h:1.17 llvm/lib/Target/X86/X86ISelLowering.h:1.18 --- llvm/lib/Target/X86/X86ISelLowering.h:1.17 Fri Jan 27 02:10:46 2006 +++ llvm/lib/Target/X86/X86ISelLowering.h Fri Jan 27 15:09:22 2006 @@ -193,9 +193,6 @@ bool isTailCall, SDOperand Callee, ArgListTy &Args, SelectionDAG &DAG); - virtual SDOperand LowerReturnTo(SDOperand Chain, SDOperand Op, - SelectionDAG &DAG); - virtual std::pair LowerFrameReturnAddress(bool isFrameAddr, SDOperand Chain, unsigned Depth, SelectionDAG &DAG); From evan.cheng at apple.com Fri Jan 27 15:13:38 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Fri, 27 Jan 2006 15:13:38 -0600 Subject: [llvm-commits] CVS: llvm/test/Regression/CodeGen/X86/2005-12-03-IndirectTailCall.ll fast-cc-tail-call.ll Message-ID: <200601272113.PAA29626@zion.cs.uiuc.edu> Changes in directory llvm/test/Regression/CodeGen/X86: 2005-12-03-IndirectTailCall.ll updated: 1.1 -> 1.2 fast-cc-tail-call.ll updated: 1.2 -> 1.3 --- Log message: XFAIL tailcall test cases until it's implemented. --- Diffs of the changes: (+2 -0) 2005-12-03-IndirectTailCall.ll | 1 + fast-cc-tail-call.ll | 1 + 2 files changed, 2 insertions(+) Index: llvm/test/Regression/CodeGen/X86/2005-12-03-IndirectTailCall.ll diff -u llvm/test/Regression/CodeGen/X86/2005-12-03-IndirectTailCall.ll:1.1 llvm/test/Regression/CodeGen/X86/2005-12-03-IndirectTailCall.ll:1.2 --- llvm/test/Regression/CodeGen/X86/2005-12-03-IndirectTailCall.ll:1.1 Sun Dec 4 00:03:25 2005 +++ llvm/test/Regression/CodeGen/X86/2005-12-03-IndirectTailCall.ll Fri Jan 27 15:13:27 2006 @@ -1,3 +1,4 @@ +; XFAIL: * ; RUN: llvm-as < %s | llc -march=x86 -enable-x86-fastcc | grep 'jmp \*%ecx' declare int %putchar(int) Index: llvm/test/Regression/CodeGen/X86/fast-cc-tail-call.ll diff -u llvm/test/Regression/CodeGen/X86/fast-cc-tail-call.ll:1.2 llvm/test/Regression/CodeGen/X86/fast-cc-tail-call.ll:1.3 --- llvm/test/Regression/CodeGen/X86/fast-cc-tail-call.ll:1.2 Wed Aug 3 16:01:46 2005 +++ llvm/test/Regression/CodeGen/X86/fast-cc-tail-call.ll Fri Jan 27 15:13:27 2006 @@ -1,3 +1,4 @@ +; XFAIL: * ; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel -enable-x86-fastcc | not grep call fastcc int %bar(int %X, int(double, int) *%FP) { From evan.cheng at apple.com Fri Jan 27 15:14:35 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Fri, 27 Jan 2006 15:14:35 -0600 Subject: [llvm-commits] CVS: llvm/test/Regression/CodeGen/X86/fabs.ll fildll.ll fp-immediate-shorten.ll negatize_zero.ll Message-ID: <200601272114.PAA29659@zion.cs.uiuc.edu> Changes in directory llvm/test/Regression/CodeGen/X86: fabs.ll updated: 1.5 -> 1.6 fildll.ll updated: 1.1 -> 1.2 fp-immediate-shorten.ll updated: 1.1 -> 1.2 negatize_zero.ll updated: 1.1 -> 1.2 --- Log message: These are fp stack test cases. --- Diffs of the changes: (+4 -4) fabs.ll | 2 +- fildll.ll | 2 +- fp-immediate-shorten.ll | 2 +- negatize_zero.ll | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) Index: llvm/test/Regression/CodeGen/X86/fabs.ll diff -u llvm/test/Regression/CodeGen/X86/fabs.ll:1.5 llvm/test/Regression/CodeGen/X86/fabs.ll:1.6 --- llvm/test/Regression/CodeGen/X86/fabs.ll:1.5 Thu Aug 18 20:14:40 2005 +++ llvm/test/Regression/CodeGen/X86/fabs.ll Fri Jan 27 15:14:23 2006 @@ -1,5 +1,5 @@ ; Make sure this testcase codegens to the fabs instruction, not a call to fabsf -; RUN: llvm-as < %s | llc -march=x86 | grep 'fabs$' | wc -l | grep 2 +; RUN: llvm-as < %s | llc -march=x86 -mattr=-sse2 | grep 'fabs$' | wc -l | grep 2 declare float %fabsf(float) Index: llvm/test/Regression/CodeGen/X86/fildll.ll diff -u llvm/test/Regression/CodeGen/X86/fildll.ll:1.1 llvm/test/Regression/CodeGen/X86/fildll.ll:1.2 --- llvm/test/Regression/CodeGen/X86/fildll.ll:1.1 Sat May 14 02:09:25 2005 +++ llvm/test/Regression/CodeGen/X86/fildll.ll Fri Jan 27 15:14:23 2006 @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=att | grep fildll | wc -l | grep 2 +; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=att -mattr=-sse2 | grep fildll | wc -l | grep 2 fastcc double %sint64_to_fp(long %X) { %R = cast long %X to double Index: llvm/test/Regression/CodeGen/X86/fp-immediate-shorten.ll diff -u llvm/test/Regression/CodeGen/X86/fp-immediate-shorten.ll:1.1 llvm/test/Regression/CodeGen/X86/fp-immediate-shorten.ll:1.2 --- llvm/test/Regression/CodeGen/X86/fp-immediate-shorten.ll:1.1 Fri Jan 7 01:56:08 2005 +++ llvm/test/Regression/CodeGen/X86/fp-immediate-shorten.ll Fri Jan 27 15:14:23 2006 @@ -1,5 +1,5 @@ ;; Test that this FP immediate is stored in the constant pool as a float. -; RUN: llvm-as < %s | llc -march=x86 | grep '.long.1123418112' +; RUN: llvm-as < %s | llc -march=x86 -mattr=-sse2 | grep '.long.1123418112' double %D() { ret double 123.0 } Index: llvm/test/Regression/CodeGen/X86/negatize_zero.ll diff -u llvm/test/Regression/CodeGen/X86/negatize_zero.ll:1.1 llvm/test/Regression/CodeGen/X86/negatize_zero.ll:1.2 --- llvm/test/Regression/CodeGen/X86/negatize_zero.ll:1.1 Thu Jan 6 15:18:53 2005 +++ llvm/test/Regression/CodeGen/X86/negatize_zero.ll Fri Jan 27 15:14:23 2006 @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep fchs +; RUN: llvm-as < %s | llc -march=x86 -mattr=-sse2 | grep fchs double %T() { From evan.cheng at apple.com Fri Jan 27 15:15:34 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Fri, 27 Jan 2006 15:15:34 -0600 Subject: [llvm-commits] CVS: llvm/test/Regression/CodeGen/X86/bswap.ll Message-ID: <200601272115.PAA29696@zion.cs.uiuc.edu> Changes in directory llvm/test/Regression/CodeGen/X86: bswap.ll updated: 1.1 -> 1.2 --- Log message: X86 dag isel is now (soon) the default. --- Diffs of the changes: (+2 -2) bswap.ll | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/test/Regression/CodeGen/X86/bswap.ll diff -u llvm/test/Regression/CodeGen/X86/bswap.ll:1.1 llvm/test/Regression/CodeGen/X86/bswap.ll:1.2 --- llvm/test/Regression/CodeGen/X86/bswap.ll:1.1 Fri Jan 13 21:14:10 2006 +++ llvm/test/Regression/CodeGen/X86/bswap.ll Fri Jan 27 15:15:22 2006 @@ -1,7 +1,7 @@ ; bswap should be constant folded when it is passed a constant argument -; RUN: llvm-as < %s | llc -march=x86 -enable-x86-dag-isel | grep bswapl | wc -l | grep 3 && -; RUN: llvm-as < %s | llc -march=x86 -enable-x86-dag-isel | grep rolw | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=x86 | grep bswapl | wc -l | grep 3 && +; RUN: llvm-as < %s | llc -march=x86 | grep rolw | wc -l | grep 1 declare ushort %llvm.bswap.i16(ushort) declare uint %llvm.bswap.i32(uint) From evan.cheng at apple.com Fri Jan 27 15:27:05 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Fri, 27 Jan 2006 15:27:05 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86.h X86ISelLowering.cpp X86TargetMachine.cpp Message-ID: <200601272127.PAA30165@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: X86.h updated: 1.41 -> 1.42 X86ISelLowering.cpp updated: 1.60 -> 1.61 X86TargetMachine.cpp updated: 1.99 -> 1.100 --- Log message: Bye bye Pattern ISel, hello DAG ISel. --- Diffs of the changes: (+17 -17) X86.h | 2 +- X86ISelLowering.cpp | 12 ++++++------ X86TargetMachine.cpp | 20 ++++++++++---------- 3 files changed, 17 insertions(+), 17 deletions(-) Index: llvm/lib/Target/X86/X86.h diff -u llvm/lib/Target/X86/X86.h:1.41 llvm/lib/Target/X86/X86.h:1.42 --- llvm/lib/Target/X86/X86.h:1.41 Fri Jan 27 02:10:46 2006 +++ llvm/lib/Target/X86/X86.h Fri Jan 27 15:26:54 2006 @@ -25,7 +25,7 @@ class IntrinsicLowering; class MachineCodeEmitter; -extern bool X86DAGIsel; +extern bool X86PatIsel; /// createX86ISelPattern - This pass converts an LLVM function into a /// machine code representation using pattern matching and a machine Index: llvm/lib/Target/X86/X86ISelLowering.cpp diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.60 llvm/lib/Target/X86/X86ISelLowering.cpp:1.61 --- llvm/lib/Target/X86/X86ISelLowering.cpp:1.60 Fri Jan 27 15:09:22 2006 +++ llvm/lib/Target/X86/X86ISelLowering.cpp Fri Jan 27 15:26:54 2006 @@ -95,7 +95,7 @@ setOperationAction(ISD::BIT_CONVERT, MVT::f32, Expand); setOperationAction(ISD::BIT_CONVERT, MVT::i32, Expand); - if (X86DAGIsel) { + if (!X86PatIsel) { setOperationAction(ISD::BRCOND , MVT::Other, Custom); } setOperationAction(ISD::BRCONDTWOWAY , MVT::Other, Expand); @@ -118,7 +118,7 @@ setOperationAction(ISD::CTLZ , MVT::i32 , Expand); setOperationAction(ISD::READCYCLECOUNTER , MVT::i64 , Custom); - if (!X86DAGIsel) { + if (X86PatIsel) { setOperationAction(ISD::BSWAP , MVT::i32 , Expand); setOperationAction(ISD::ROTL , MVT::i8 , Expand); setOperationAction(ISD::ROTR , MVT::i8 , Expand); @@ -141,7 +141,7 @@ // These should be promoted to a larger select which is supported. setOperationAction(ISD::SELECT , MVT::i1 , Promote); setOperationAction(ISD::SELECT , MVT::i8 , Promote); - if (X86DAGIsel) { + if (!X86PatIsel) { // X86 wants to expand cmov itself. setOperationAction(ISD::SELECT , MVT::i16 , Custom); setOperationAction(ISD::SELECT , MVT::i32 , Custom); @@ -218,7 +218,7 @@ // Set up the FP register classes. addRegisterClass(MVT::f64, X86::RFPRegisterClass); - if (X86DAGIsel) { + if (!X86PatIsel) { setOperationAction(ISD::SINT_TO_FP, MVT::i16, Custom); setOperationAction(ISD::SINT_TO_FP, MVT::i32, Custom); } @@ -456,7 +456,7 @@ break; } - if (X86DAGIsel) { + if (!X86PatIsel) { std::vector NodeTys; NodeTys.push_back(MVT::Other); // Returns a chain NodeTys.push_back(MVT::Flag); // Returns a flag for retval copy to use. @@ -932,7 +932,7 @@ break; } - if (X86DAGIsel) { + if (!X86PatIsel) { // Build a sequence of copy-to-reg nodes chained together with token chain // and flag operands which copy the outgoing args into registers. SDOperand InFlag; Index: llvm/lib/Target/X86/X86TargetMachine.cpp diff -u llvm/lib/Target/X86/X86TargetMachine.cpp:1.99 llvm/lib/Target/X86/X86TargetMachine.cpp:1.100 --- llvm/lib/Target/X86/X86TargetMachine.cpp:1.99 Fri Jan 27 02:10:46 2006 +++ llvm/lib/Target/X86/X86TargetMachine.cpp Fri Jan 27 15:26:54 2006 @@ -26,7 +26,7 @@ #include using namespace llvm; -bool llvm::X86DAGIsel = false; +bool llvm::X86PatIsel = true; /// X86TargetMachineModule - Note that this is used on hosts that cannot link /// in a library unless there are references into the library. In particular, @@ -39,9 +39,9 @@ cl::opt DisableOutput("disable-x86-llc-output", cl::Hidden, cl::desc("Disable the X86 asm printer, for use " "when profiling the code generator.")); - cl::opt EnableX86DAGDAG("enable-x86-dag-isel", cl::Hidden, - cl::desc("Enable DAG-to-DAG isel for X86"), - cl::location(X86DAGIsel), + cl::opt EnableX86PatISel("enable-x86-pattern-isel", cl::Hidden, + cl::desc("Enable the pattern based isel for X86"), + cl::location(X86PatIsel), cl::init(false)); // Register the target. @@ -106,10 +106,10 @@ PM.add(createUnreachableBlockEliminationPass()); // Install an instruction selector. - if (X86DAGIsel) - PM.add(createX86ISelDag(*this)); - else + if (X86PatIsel) PM.add(createX86ISelPattern(*this)); + else + PM.add(createX86ISelDag(*this)); // Print the instruction selected machine code... if (PrintMachineCode) @@ -173,10 +173,10 @@ PM.add(createUnreachableBlockEliminationPass()); // Install an instruction selector. - if (X86DAGIsel) - PM.add(createX86ISelDag(TM)); - else + if (X86PatIsel) PM.add(createX86ISelPattern(TM)); + else + PM.add(createX86ISelDag(TM)); // FIXME: Add SSA based peephole optimizer here. From evan.cheng at apple.com Fri Jan 27 15:49:46 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Fri, 27 Jan 2006 15:49:46 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86Subtarget.cpp Message-ID: <200601272149.PAA30823@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: X86Subtarget.cpp updated: 1.12 -> 1.13 --- Log message: Added a temporary option -enable-x86-sse to enable sse support. It is used by llc-beta. --- Diffs of the changes: (+11 -2) X86Subtarget.cpp | 13 +++++++++++-- 1 files changed, 11 insertions(+), 2 deletions(-) Index: llvm/lib/Target/X86/X86Subtarget.cpp diff -u llvm/lib/Target/X86/X86Subtarget.cpp:1.12 llvm/lib/Target/X86/X86Subtarget.cpp:1.13 --- llvm/lib/Target/X86/X86Subtarget.cpp:1.12 Fri Jan 27 13:30:30 2006 +++ llvm/lib/Target/X86/X86Subtarget.cpp Fri Jan 27 15:49:34 2006 @@ -16,6 +16,13 @@ #include "X86GenSubtarget.inc" using namespace llvm; +// FIXME: temporary. +#include "llvm/Support/CommandLine.h" +namespace { + cl::opt EnableSSE("enable-x86-sse", cl::Hidden, + cl::desc("Enable sse on X86")); +} + static void GetCpuIDAndInfo(unsigned value, unsigned *EAX, unsigned *EBX, unsigned *ECX, unsigned *EDX) { #if defined(i386) || defined(__i386__) || defined(__x86__) || defined(_M_IX86) @@ -96,8 +103,10 @@ // FIXME: Force these off until they work. An llc-beta option should turn // them back on. - X86SSELevel = NoMMXSSE; - X863DNowLevel = NoThreeDNow; + if (!EnableSSE) { + X86SSELevel = NoMMXSSE; + X863DNowLevel = NoThreeDNow; + } // Set the boolean corresponding to the current target triple, or the default // if one cannot be determined, to true. From evan.cheng at apple.com Fri Jan 27 15:53:54 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Fri, 27 Jan 2006 15:53:54 -0600 Subject: [llvm-commits] CVS: llvm-test/Makefile.programs Message-ID: <200601272153.PAA31025@zion.cs.uiuc.edu> Changes in directory llvm-test: Makefile.programs updated: 1.186 -> 1.187 --- Log message: X86 llc-beta option: -enable-x86-sse --- Diffs of the changes: (+1 -1) Makefile.programs | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm-test/Makefile.programs diff -u llvm-test/Makefile.programs:1.186 llvm-test/Makefile.programs:1.187 --- llvm-test/Makefile.programs:1.186 Mon Jan 23 15:57:27 2006 +++ llvm-test/Makefile.programs Fri Jan 27 15:53:43 2006 @@ -197,7 +197,7 @@ LLCBETAOPTION := -sched=simple endif ifeq ($(ARCH),x86) -LLCBETAOPTION := -enable-x86-dag-isel +LLCBETAOPTION := -enable-x86-sse endif # Given a version of the entire program linked together into a single unit of From lattner at cs.uiuc.edu Fri Jan 27 16:06:13 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Fri, 27 Jan 2006 16:06:13 -0600 Subject: [llvm-commits] CVS: llvm/docs/MakefileGuide.html Message-ID: <200601272206.QAA31172@zion.cs.uiuc.edu> Changes in directory llvm/docs: MakefileGuide.html updated: 1.26 -> 1.27 --- Log message: Remove FAKE_SOURCES --- Diffs of the changes: (+1 -9) MakefileGuide.html | 10 +--------- 1 files changed, 1 insertion(+), 9 deletions(-) Index: llvm/docs/MakefileGuide.html diff -u llvm/docs/MakefileGuide.html:1.26 llvm/docs/MakefileGuide.html:1.27 --- llvm/docs/MakefileGuide.html:1.26 Mon Oct 24 11:47:40 2005 +++ llvm/docs/MakefileGuide.html Fri Jan 27 16:06:01 2006 @@ -646,14 +646,6 @@ source files, all built sources, all Makefiles, and most documentation files will be automatically distributed. Use this variable to distribute any files that are not automatically distributed. -
      FAKE_SOURCES(optional) -
      -
      This variable is like SOURCES except that - the source files don't need to exist. The makefiles only use - FAKE_SOURCES to create the names of derived objects that should be - included in the directory's result. It is assumed that the project's - Makefile will define how to build the derived objects - necessary.
      KEEP_SYMBOLS
      If set to any value, specifies that when linking executables the makefiles should retain debug symbols in the executable. Normally, symbols @@ -999,7 +991,7 @@ Reid Spencer
      The LLVM Compiler Infrastructure
      - Last modified: $Date: 2005/10/24 16:47:40 $ + Last modified: $Date: 2006/01/27 22:06:01 $ From lattner at cs.uiuc.edu Fri Jan 27 16:06:34 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Fri, 27 Jan 2006 16:06:34 -0600 Subject: [llvm-commits] CVS: llvm/runtime/GCCLibraries/crtend/Makefile Message-ID: <200601272206.QAA31207@zion.cs.uiuc.edu> Changes in directory llvm/runtime/GCCLibraries/crtend: Makefile updated: 1.29 -> 1.30 --- Log message: Remove the only use of FAKE_SOURCES --- Diffs of the changes: (+11 -3) Makefile | 14 +++++++++++--- 1 files changed, 11 insertions(+), 3 deletions(-) Index: llvm/runtime/GCCLibraries/crtend/Makefile diff -u llvm/runtime/GCCLibraries/crtend/Makefile:1.29 llvm/runtime/GCCLibraries/crtend/Makefile:1.30 --- llvm/runtime/GCCLibraries/crtend/Makefile:1.29 Tue Oct 18 13:50:26 2005 +++ llvm/runtime/GCCLibraries/crtend/Makefile Fri Jan 27 16:06:23 2006 @@ -17,7 +17,6 @@ LEVEL = ../../.. DONT_BUILD_RELINKED = 1 -BYTECODE_LIBRARY = 1 LIBRARYNAME = crtend BYTECODE_DESTINATION = $(CFERuntimeLibDir) @@ -28,8 +27,6 @@ # FAKE_SOURCES for dependencies, distribution, etc. It is assumed the makefile # will know how to build the objects eventhough the sources don't exist. -FAKE_SOURCES := comp_main.c comp_genericeh.c comp_sjljeh.c - MainSrc := crtend.c listend.ll GenericEHSrc := Exception.cpp SJLJEHSrc := SJLJ-Exception.cpp @@ -63,3 +60,14 @@ $(Verb) $(GCCLD) -link-as-library \ -internalize-public-api-file=$(PROJ_SRC_DIR)/comp_sjljeh.lst \ $(SJLJEHObj) -o $@ + +SYMBOLHACKEDOBJS := $(ObjDir)/comp_main.bc $(ObjDir)/comp_genericeh.bc \ + $(ObjDir)/comp_sjljeh.bc + +all-local:: $(LibName.BCA) + +$(LibName.BCA): $(SYMBOLHACKEDOBJS) $(LibDir)/.dir $(LLVMToolDir)/llvm-ar + $(Echo) Building $(BuildMode) Bytecode Archive $(notdir $@) + $(Verb) $(RM) -f $@ + $(Verb) $(LArchive) $@ $(SYMBOLHACKEDOBJS) + From lattner at cs.uiuc.edu Fri Jan 27 16:07:02 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Fri, 27 Jan 2006 16:07:02 -0600 Subject: [llvm-commits] CVS: llvm/runtime/GCCLibraries/crtend/Makefile Message-ID: <200601272207.QAA31242@zion.cs.uiuc.edu> Changes in directory llvm/runtime/GCCLibraries/crtend: Makefile updated: 1.30 -> 1.31 --- Log message: Remove out of date comment --- Diffs of the changes: (+0 -7) Makefile | 7 ------- 1 files changed, 7 deletions(-) Index: llvm/runtime/GCCLibraries/crtend/Makefile diff -u llvm/runtime/GCCLibraries/crtend/Makefile:1.30 llvm/runtime/GCCLibraries/crtend/Makefile:1.31 --- llvm/runtime/GCCLibraries/crtend/Makefile:1.30 Fri Jan 27 16:06:23 2006 +++ llvm/runtime/GCCLibraries/crtend/Makefile Fri Jan 27 16:06:50 2006 @@ -20,13 +20,6 @@ LIBRARYNAME = crtend BYTECODE_DESTINATION = $(CFERuntimeLibDir) -# Note: We're using FAKE_SOURCES because the comp_*.c don't really exist. -# However this makefile builds comp_*.bc and that's what we want in the library. -# The FAKE_SOURCES variable supports this kind of construction. It uses the -# FAKE_SOURCES to determine a list of things to build, but doesn't use -# FAKE_SOURCES for dependencies, distribution, etc. It is assumed the makefile -# will know how to build the objects eventhough the sources don't exist. - MainSrc := crtend.c listend.ll GenericEHSrc := Exception.cpp SJLJEHSrc := SJLJ-Exception.cpp From evan.cheng at apple.com Fri Jan 27 16:11:13 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Fri, 27 Jan 2006 16:11:13 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/README.txt Message-ID: <200601272211.QAA31345@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: README.txt updated: 1.23 -> 1.24 --- Log message: Added notes about a x86 isel deficiency. --- Diffs of the changes: (+22 -0) README.txt | 22 ++++++++++++++++++++++ 1 files changed, 22 insertions(+) Index: llvm/lib/Target/X86/README.txt diff -u llvm/lib/Target/X86/README.txt:1.23 llvm/lib/Target/X86/README.txt:1.24 --- llvm/lib/Target/X86/README.txt:1.23 Mon Jan 16 11:52:31 2006 +++ llvm/lib/Target/X86/README.txt Fri Jan 27 16:11:01 2006 @@ -166,3 +166,25 @@ Combine: a = sin(x), b = cos(x) into a,b = sincos(x). +//===---------------------------------------------------------------------===// + +Solve this DAG isel folding deficiency: + +int X, Y; + +void fn1(void) +{ + X = X | (Y << 3); +} + +compiles to + +fn1: + movl Y, %eax + shll $3, %eax + orl X, %eax + movl %eax, X + ret + +The problem is the store's chain operand is not the load X but rather +a TokenFactor of the load X and load Y. This prevents the folding. From lattner at cs.uiuc.edu Fri Jan 27 16:13:24 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Fri, 27 Jan 2006 16:13:24 -0600 Subject: [llvm-commits] CVS: llvm/Makefile.rules Message-ID: <200601272213.QAA31412@zion.cs.uiuc.edu> Changes in directory llvm: Makefile.rules updated: 1.338 -> 1.339 --- Log message: * Eliminate FAKE_SOURCES * Make runtimes and projects build with the new front-end by not relying on 'llvm-gcc -c' to build a .bc file. Instead, use llvm-gcc -S -emit-llvm, then an explicit invocation of gccas. Also, don't use llvm-gcc to link .bc files together, use gccld directly. --- Diffs of the changes: (+46 -50) Makefile.rules | 96 +++++++++++++++++++++++++++------------------------------ 1 files changed, 46 insertions(+), 50 deletions(-) Index: llvm/Makefile.rules diff -u llvm/Makefile.rules:1.338 llvm/Makefile.rules:1.339 --- llvm/Makefile.rules:1.338 Fri Dec 23 16:27:56 2005 +++ llvm/Makefile.rules Fri Jan 27 16:13:12 2006 @@ -41,7 +41,7 @@ # Reset the list of suffixes we know how to build #-------------------------------------------------------------------- .SUFFIXES: -.SUFFIXES: .c .cpp .cc .h .hpp .y .l .lo .o .a .bc .td .ps .dot +.SUFFIXES: .c .cpp .cc .h .hpp .y .l .lo .o .a .bc .td .ps .dot .ll .SUFFIXES: $(SHLIBEXT) $(SUFFIXES) #-------------------------------------------------------------------- @@ -361,13 +361,13 @@ Compile.C = $(CC) $(CPP.Flags) $(CompileCommonOpts) -c $(C.Flags) LTCompile.C = $(LIBTOOL) $(LibTool.Flags) --mode=compile $(Compile.C) BCCompile.C = $(LLVMGCCWITHPATH) $(CPP.Flags) $(CompileCommonOpts) \ - $(C.Flags) -c + $(C.Flags) Preprocess.C = $(CC) $(CPP.Flags) $(CompileCommonOpts) -E $(C.Flags) Compile.CXX = $(CXX) $(CPP.Flags) $(CompileCommonOpts) $(CXX.Flags) -c LTCompile.CXX = $(LIBTOOL) $(LibTool.Flags) --mode=compile $(Compile.CXX) BCCompile.CXX = $(LLVMGXXWITHPATH) $(CPP.Flags) $(CompileCommonOpts) \ - $(CXX.Flags) -c + $(CXX.Flags) Preprocess.CXX= $(CXX) $(CPP.Flags) $(CompileCommonOpts) $(CXX.Flags) -E Link = $(LIBTOOL) $(LibTool.Flags) --mode=link $(CXX) $(CPP.Flags) \ $(CompileCommonOpts) $(LD.Flags) $(Strip) @@ -391,35 +391,25 @@ # Get the list of source files and compute object file # names from them. #---------------------------------------------------------- -ifdef FAKE_SOURCES - Sources := - FakeSources := $(FAKE_SOURCES) - ifdef BUILT_SOURCES - FakeSources += $(filter %.cpp %.c %.cc %.y %.l,$(BUILT_SOURCES)) - endif - BaseNameSources := $(sort $(basename $(FakeSources))) - ObjectsO := $(BaseNameSources:%=$(ObjDir)/%.o) - ObjectsLO := $(BaseNameSources:%=$(ObjDir)/%.lo) - ObjectsBC := $(BaseNameSources:%=$(ObjDir)/%.bc) -else - ifndef SOURCES - Sources := $(notdir $(wildcard $(PROJ_SRC_DIR)/*.cpp \ - $(PROJ_SRC_DIR)/*.cc $(PROJ_SRC_DIR)/*.c $(PROJ_SRC_DIR)/*.y \ - $(PROJ_SRC_DIR)/*.l)) - else - Sources := $(SOURCES) - endif - ifdef BUILT_SOURCES - Sources += $(filter %.cpp %.c %.cc %.y %.l,$(BUILT_SOURCES)) - endif +ifndef SOURCES + Sources := $(notdir $(wildcard $(PROJ_SRC_DIR)/*.cpp \ + $(PROJ_SRC_DIR)/*.cc $(PROJ_SRC_DIR)/*.c $(PROJ_SRC_DIR)/*.y \ + $(PROJ_SRC_DIR)/*.l)) +else + Sources := $(SOURCES) +endif - BaseNameSources := $(sort $(basename $(Sources))) - ObjectsO := $(BaseNameSources:%=$(ObjDir)/%.o) - ObjectsLO := $(BaseNameSources:%=$(ObjDir)/%.lo) - ObjectsBC := $(BaseNameSources:%=$(ObjDir)/%.bc) +ifdef BUILT_SOURCES +Sources += $(filter %.cpp %.c %.cc %.y %.l,$(BUILT_SOURCES)) endif +BaseNameSources := $(sort $(basename $(Sources))) + +ObjectsO := $(BaseNameSources:%=$(ObjDir)/%.o) +ObjectsLO := $(BaseNameSources:%=$(ObjDir)/%.lo) +ObjectsBC := $(BaseNameSources:%=$(ObjDir)/%.bc) + ############################################################################### # DIRECTORIES: Handle recursive descent of directory structure ############################################################################### @@ -664,10 +654,10 @@ else Module := $(LibDir)/$(MODULE_NAME).bc -LinkModule := $(LLVMGCCWITHPATH) -shared -nostdlib +LinkModule := $(GCCLD) ifdef EXPORTED_SYMBOL_FILE -LinkModule += -Xlinker -internalize-public-api-file=$(EXPORTED_SYMBOL_FILE) +LinkModule += -internalize-public-api-file=$(EXPORTED_SYMBOL_FILE) endif $(Module): $(BUILT_SOURCES) $(ObjectsBC) $(LibDir)/.dir $(GCCLD) @@ -771,17 +761,10 @@ $(warning Bytecode libraries require llvm-gcc which could not be found ****) else -# make the C and C++ compilers strip debug info out of bytecode libraries. -ifndef DEBUG_RUNTIME -BCCompile.C += -Wa,-strip-debug -BCCompile.CXX += -Wa,-strip-debug -endif - all-local:: $(LibName.BCA) ifdef EXPORTED_SYMBOL_FILE -BCLinkLib = $(LLVMGCCWITHPATH) -shared -nostdlib -Xlinker \ - -internalize-public-api-file=$(EXPORTED_SYMBOL_FILE) +BCLinkLib = $(GCCLD) -internalize-public-api-file=$(EXPORTED_SYMBOL_FILE) $(LibName.BCA): $(ObjectsBC) $(LibDir)/.dir $(GCCLD) \ $(LLVMToolDir)/llvm-ar @@ -1035,21 +1018,22 @@ #--------------------------------------------------------- # Create .bc files in the ObjDir directory from .cpp .cc and .c files... #--------------------------------------------------------- -$(ObjDir)/%.bc: %.cpp $(ObjDir)/.dir $(GCCAS) $(BUILT_SOURCES) + +$(ObjDir)/%.ll: %.cpp $(ObjDir)/.dir $(BUILT_SOURCES) $(Echo) "Compiling $*.cpp for $(BuildMode) build (bytecode)" - $(Verb) if $(BCCompile.CXX) -MD -MT $@ -MP -MF "$(ObjDir)/$*.BCCXXd" $< -o $@ ; \ + $(Verb) if $(BCCompile.CXX) -MD -MT $@ -MP -MF "$(ObjDir)/$*.BCCXXd" $< -o $@ -S -emit-llvm ; \ then $(MV) -f "$(ObjDir)/$*.BCCXXd" "$(ObjDir)/$*.d"; \ else $(RM) -f "$(ObjDir)/$*.BCCXXd"; exit 1; fi -$(ObjDir)/%.bc: %.cc $(ObjDir)/.dir $(GCCAS) $(BUILT_SOURCES) +$(ObjDir)/%.ll: %.cc $(ObjDir)/.dir $(BUILT_SOURCES) $(Echo) "Compiling $*.cc for $(BuildMode) build (bytecode)" - $(Verb) if $(BCCompile.CXX) -MD -MT $@ -MP -MF "$(ObjDir)/$*.BCCXXd" $< -o $@ ; \ + $(Verb) if $(BCCompile.CXX) -MD -MT $@ -MP -MF "$(ObjDir)/$*.BCCXXd" $< -o $@ -S -emit-llvm ; \ then $(MV) -f "$(ObjDir)/$*.BCCXXd" "$(ObjDir)/$*.d"; \ else $(RM) -f "$(ObjDir)/$*.BCCXXd"; exit 1; fi -$(ObjDir)/%.bc: %.c $(ObjDir)/.dir $(GCCAS) $(BUILT_SOURCES) +$(ObjDir)/%.ll: %.c $(ObjDir)/.dir $(BUILT_SOURCES) $(Echo) "Compiling $*.c for $(BuildMode) build (bytecode)" - $(Verb) if $(BCCompile.C) -MD -MT $@ -MP -MF "$(ObjDir)/$*.BCCd" $< -o $@ ; \ + $(Verb) if $(BCCompile.C) -MD -MT $@ -MP -MF "$(ObjDir)/$*.BCCd" $< -o $@ -S -emit-llvm ; \ then $(MV) -f "$(ObjDir)/$*.BCCd" "$(ObjDir)/$*.d"; \ else $(RM) -f "$(ObjDir)/$*.BCCd"; exit 1; fi @@ -1085,20 +1069,32 @@ $(Compile.C) $< -o $@ endif -$(ObjDir)/%.bc: %.cpp $(ObjDir)/.dir $(GCCAS) $(BUILT_SOURCES) +$(ObjDir)/%.ll: %.cpp $(ObjDir)/.dir $(BUILT_SOURCES) $(Echo) "Compiling $*.cpp for $(BuildMode) build (bytecode)" - $(BCCompile.CXX) $< -o $@ + $(BCCompile.CXX) $< -o $@ -S -emit-llvm -$(ObjDir)/%.bc: %.cc $(ObjDir)/.dir $(GCCAS) $(BUILT_SOURCES) +$(ObjDir)/%.ll: %.cc $(ObjDir)/.dir $(BUILT_SOURCES) $(Echo) "Compiling $*.cc for $(BuildMode) build (bytecode)" - $(BCCompile.CXX) $< -o $@ + $(BCCompile.CXX) $< -o $@ -S -emit-llvm -$(ObjDir)/%.bc: %.c $(ObjDir)/.dir $(GCCAS) $(BUILT_SOURCES) +$(ObjDir)/%.ll: %.c $(ObjDir)/.dir $(BUILT_SOURCES) $(Echo) "Compiling $*.c for $(BuildMode) build (bytecode)" - $(BCCompile.C) $< -o $@ + $(BCCompile.C) $< -o $@ -S -emit-llvm endif +# make the C and C++ compilers strip debug info out of bytecode libraries. +ifdef DEBUG_RUNTIME +$(ObjectsBC): $(ObjDir)/%.bc: $(ObjDir)/%.ll $(GCCAS) + $(Echo) "Compiling $*.ll to $*.bc for $(BuildMode) build (bytecode)" + @$(GCCAS) $< -o $@ +else +$(ObjectsBC): $(ObjDir)/%.bc: $(ObjDir)/%.ll $(GCCAS) + $(Echo) "Compiling $*.ll to $*.bc for $(BuildMode) build (bytecode)" + @$(GCCAS) -strip-debug $< -o $@ +endif + + #--------------------------------------------------------- # Provide rule to build .bc files from .ll sources, # regardless of dependencies From evan.cheng at apple.com Fri Jan 27 16:13:57 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Fri, 27 Jan 2006 16:13:57 -0600 Subject: [llvm-commits] CVS: llvm/utils/TableGen/DAGISelEmitter.cpp Message-ID: <200601272213.QAA31422@zion.cs.uiuc.edu> Changes in directory llvm/utils/TableGen: DAGISelEmitter.cpp updated: 1.145 -> 1.146 --- Log message: (store (op (load ...)), ...) If store's chain operand is load, then use load's chain operand instead. If it isn't (likely a TokenFactor), then do not allow the folding. --- Diffs of the changes: (+10 -3) DAGISelEmitter.cpp | 13 ++++++++++--- 1 files changed, 10 insertions(+), 3 deletions(-) Index: llvm/utils/TableGen/DAGISelEmitter.cpp diff -u llvm/utils/TableGen/DAGISelEmitter.cpp:1.145 llvm/utils/TableGen/DAGISelEmitter.cpp:1.146 --- llvm/utils/TableGen/DAGISelEmitter.cpp:1.145 Thu Jan 26 17:08:55 2006 +++ llvm/utils/TableGen/DAGISelEmitter.cpp Fri Jan 27 16:13:45 2006 @@ -1931,9 +1931,16 @@ << ".getValue(" << CInfo.getNumResults() << "))) goto P" << PatternNo << "Fail; // Already selected for a chain use?\n"; } - if (NodeHasChain && !FoundChain) { - OS << " SDOperand Chain = " << RootName << ".getOperand(0);\n"; - FoundChain = true; + if (NodeHasChain) { + if (!FoundChain) { + OS << " SDOperand Chain = " << RootName << ".getOperand(0);\n"; + FoundChain = true; + } else { + OS << " if (Chain.Val == " << RootName << ".Val)\n"; + OS << " Chain = " << RootName << ".getOperand(0);\n"; + OS << " else\n"; + OS << " goto P" << PatternNo << "Fail;\n"; + } } } From jeffc at jolt-lang.org Fri Jan 27 16:22:40 2006 From: jeffc at jolt-lang.org (Jeff Cohen) Date: Fri, 27 Jan 2006 16:22:40 -0600 Subject: [llvm-commits] CVS: llvm/utils/TableGen/DAGISelEmitter.cpp DAGISelEmitter.h Message-ID: <200601272222.QAA31505@zion.cs.uiuc.edu> Changes in directory llvm/utils/TableGen: DAGISelEmitter.cpp updated: 1.146 -> 1.147 DAGISelEmitter.h updated: 1.51 -> 1.52 --- Log message: Teach tablegen to generate code that is VC++ warning-free. --- Diffs of the changes: (+65 -23) DAGISelEmitter.cpp | 86 +++++++++++++++++++++++++++++++++++++++-------------- DAGISelEmitter.h | 2 - 2 files changed, 65 insertions(+), 23 deletions(-) Index: llvm/utils/TableGen/DAGISelEmitter.cpp diff -u llvm/utils/TableGen/DAGISelEmitter.cpp:1.146 llvm/utils/TableGen/DAGISelEmitter.cpp:1.147 --- llvm/utils/TableGen/DAGISelEmitter.cpp:1.146 Fri Jan 27 16:13:45 2006 +++ llvm/utils/TableGen/DAGISelEmitter.cpp Fri Jan 27 16:22:28 2006 @@ -1828,6 +1828,7 @@ // Matched instruction. TreePatternNode *Instruction; unsigned PatternNo; + bool GotosFail; std::ostream &OS; // Node to name mapping std::map VariableMap; @@ -1843,7 +1844,9 @@ TreePatternNode *pattern, TreePatternNode *instr, unsigned PatNum, std::ostream &os) : ISE(ise), Predicates(preds), Pattern(pattern), Instruction(instr), - PatternNo(PatNum), OS(os), TmpNo(0) {} + PatternNo(PatNum), GotosFail(false), OS(os), TmpNo(0) {} + + bool UsesFailLabel() { return GotosFail; } /// EmitMatchCode - Emit a matcher for N, going to the label for PatternNo /// if the match fails. At this point, we already know that the opcode for N @@ -1862,8 +1865,10 @@ else OS << " && "; OS << "!(" << Def->getValueAsString("CondString") << ")"; - if (i == e-1) + if (i == e-1) { OS << ") goto P" << PatternNo << "Fail;\n"; + GotosFail = true; + } } else { Def->dump(); assert(0 && "Unknown predicate type!"); @@ -1877,6 +1882,7 @@ OS << " if (cast(" << RootName << ")->getSignExtended() != " << II->getValue() << ")\n" << " goto P" << PatternNo << "Fail;\n"; + GotosFail = true; return; } else if (!NodeIsComplexPattern(N)) { assert(0 && "Cannot match this as a leaf value!"); @@ -1897,6 +1903,7 @@ // previously named thing. OS << " if (" << VarMapEntry << " != " << RootName << ") goto P" << PatternNo << "Fail;\n"; + GotosFail = true; return; } @@ -1918,18 +1925,23 @@ const SDNodeInfo &CInfo = ISE.getSDNodeInfo(N->getOperator()); OS << " if (!" << RootName << ".hasOneUse()) goto P" << PatternNo << "Fail; // Multiple uses of actual result?\n"; + GotosFail = true; EmittedUseCheck = true; // hasOneUse() check is not strong enough. If the original node has // already been selected, it may have been replaced with another. - for (unsigned j = 0; j < CInfo.getNumResults(); j++) + for (unsigned j = 0; j < CInfo.getNumResults(); j++) { OS << " if (CodeGenMap.count(" << RootName << ".getValue(" << j << "))) goto P" << PatternNo << "Fail; // Already selected?\n"; + GotosFail = true; + } EmittedSlctedCheck = true; - if (NodeHasChain) + if (NodeHasChain) { OS << " if (CodeGenMap.count(" << RootName << ".getValue(" << CInfo.getNumResults() << "))) goto P" << PatternNo << "Fail; // Already selected for a chain use?\n"; + GotosFail = true; + } } if (NodeHasChain) { if (!FoundChain) { @@ -1956,14 +1968,17 @@ if (!EmittedUseCheck) { OS << " if (!" << RootName << ".hasOneUse()) goto P" << PatternNo << "Fail; // Multiple uses of actual result?\n"; + GotosFail = true; } if (!EmittedSlctedCheck) // hasOneUse() check is not strong enough. If the original node has // already been selected, it may have been replaced with another. - for (unsigned j = 0; j < CInfo.getNumResults(); j++) + for (unsigned j = 0; j < CInfo.getNumResults(); j++) { OS << " if (CodeGenMap.count(" << RootName << ".getValue(" << j << "))) goto P" << PatternNo << "Fail; // Already selected?\n"; + GotosFail = true; + } } for (unsigned i = 0, e = N->getNumChildren(); i != e; ++i, ++OpNo) { @@ -1976,6 +1991,7 @@ const SDNodeInfo &CInfo = ISE.getSDNodeInfo(Child->getOperator()); OS << " if (" << RootName << OpNo << ".getOpcode() != " << CInfo.getEnumName() << ") goto P" << PatternNo << "Fail;\n"; + GotosFail = true; EmitMatchCode(Child, RootName + utostr(OpNo), FoundChain); if (NodeHasProperty(Child, SDNodeInfo::SDNPHasChain, ISE)) { FoldedChains.push_back(std::make_pair(RootName + utostr(OpNo), @@ -1989,12 +2005,13 @@ if (VarMapEntry.empty()) { VarMapEntry = RootName + utostr(OpNo); } else { - // If we get here, this is a second reference to a specific name. Since - // we already have checked that the first reference is valid, we don't - // have to recursively match it, just check that it's the same as the - // previously named thing. + // If we get here, this is a second reference to a specific name. + // Since we already have checked that the first reference is valid, + // we don't have to recursively match it, just check that it's the + // same as the previously named thing. OS << " if (" << VarMapEntry << " != " << RootName << OpNo << ") goto P" << PatternNo << "Fail;\n"; + GotosFail = true; Duplicates.insert(RootName + utostr(OpNo)); continue; } @@ -2016,21 +2033,25 @@ OS << " if (cast(" << RootName << OpNo << ")->getVT() != " << "MVT::" << LeafRec->getName() << ") goto P" << PatternNo << "Fail;\n"; + GotosFail = true; } else if (LeafRec->isSubClassOf("CondCode")) { // Make sure this is the specified cond code. OS << " if (cast(" << RootName << OpNo << ")->get() != " << "ISD::" << LeafRec->getName() << ") goto P" << PatternNo << "Fail;\n"; + GotosFail = true; } else { Child->dump(); std::cerr << " "; assert(0 && "Unknown leaf type!"); } } else if (IntInit *II = dynamic_cast(Child->getLeafValue())) { - OS << " if (!isa(" << RootName << OpNo << ") ||\n" + OS << " if (!isa(" << RootName << OpNo + << ") ||\n" << " cast(" << RootName << OpNo << ")->getSignExtended() != " << II->getValue() << ")\n" << " goto P" << PatternNo << "Fail;\n"; + GotosFail = true; } else { Child->dump(); assert(0 && "Unknown leaf type!"); @@ -2039,9 +2060,11 @@ } // If there is a node predicate for this, emit the call. - if (!N->getPredicateFn().empty()) + if (!N->getPredicateFn().empty()) { OS << " if (!" << N->getPredicateFn() << "(" << RootName << ".Val)) goto P" << PatternNo << "Fail;\n"; + GotosFail = true; + } } /// EmitResultCode - Emit the action for a pattern. Now that it has matched @@ -2072,7 +2095,8 @@ case MVT::i32: OS << " unsigned Tmp"; break; case MVT::i64: OS << " uint64_t Tmp"; break; } - OS << ResNo << "C = cast(" << Val << ")->getValue();\n"; + OS << ResNo << "C = (unsigned)cast(" << Val + << ")->getValue();\n"; OS << " SDOperand Tmp" << utostr(ResNo) << " = CurDAG->getTargetConstant(Tmp" << ResNo << "C, MVT::" << getEnumName(N->getTypeNum(0)) << ");\n"; @@ -2112,6 +2136,7 @@ for (unsigned i = 0; i < NumRes; i++) OS << ", Tmp" << i + ResNo; OS << ")) goto P" << PatternNo << "Fail;\n"; + GotosFail = true; TmpNo = ResNo + NumRes; } else { OS << " SDOperand Tmp" << ResNo << " = Select(" << Val << ");\n"; @@ -2416,6 +2441,7 @@ Pat->setTypes(Other->getExtTypes()); OS << " if (" << Prefix << ".Val->getValueType(0) != MVT::" << getName(Pat->getTypeNum(0)) << ") goto P" << PatternNo << "Fail;\n"; + GotosFail = true; return true; } @@ -2528,8 +2554,9 @@ /// EmitCodeForPattern - Given a pattern to match, emit code to the specified /// stream to match the pattern, and generate the code for the match if it -/// succeeds. -void DAGISelEmitter::EmitCodeForPattern(PatternToMatch &Pattern, +/// succeeds. Returns true if execution may jump to the fail label instead of +/// returning. +bool DAGISelEmitter::EmitCodeForPattern(PatternToMatch &Pattern, std::ostream &OS) { static unsigned PatternCount = 0; unsigned PatternNo = PatternCount++; @@ -2591,7 +2618,12 @@ delete Pat; - OS << " }\n P" << PatternNo << "Fail:\n"; + if (Emitter.UsesFailLabel()) + OS << " }\n P" << PatternNo << "Fail:\n"; + else + OS << " }\n"; + + return Emitter.UsesFailLabel(); } @@ -2658,14 +2690,24 @@ std::stable_sort(Patterns.begin(), Patterns.end(), PatternSortingPredicate(*this)); - for (unsigned i = 0, e = Patterns.size(); i != e; ++i) - EmitCodeForPattern(*Patterns[i], OS); + bool mightNotReturn = true; + for (unsigned i = 0, e = Patterns.size(); i != e; ++i) { + if (!mightNotReturn) { + std::cerr << "Pattern " + << Patterns[i]->getDstPattern()->getOperator()->getName() + << " is impossible to select!\n"; + exit(1); + } + mightNotReturn = EmitCodeForPattern(*Patterns[i], OS); + } - OS << " std::cerr << \"Cannot yet select: \";\n" - << " N.Val->dump(CurDAG);\n" - << " std::cerr << '\\n';\n" - << " abort();\n" - << "}\n\n"; + if (mightNotReturn) + OS << " std::cerr << \"Cannot yet select: \";\n" + << " N.Val->dump(CurDAG);\n" + << " std::cerr << '\\n';\n" + << " abort();\n"; + + OS << "}\n\n"; } // Emit boilerplate. Index: llvm/utils/TableGen/DAGISelEmitter.h diff -u llvm/utils/TableGen/DAGISelEmitter.h:1.51 llvm/utils/TableGen/DAGISelEmitter.h:1.52 --- llvm/utils/TableGen/DAGISelEmitter.h:1.51 Tue Jan 17 15:31:18 2006 +++ llvm/utils/TableGen/DAGISelEmitter.h Fri Jan 27 16:22:28 2006 @@ -468,7 +468,7 @@ std::map &InstResults, std::vector &InstImpInputs, std::vector &InstImpResults); - void EmitCodeForPattern(PatternToMatch &Pattern, std::ostream &OS); + bool EmitCodeForPattern(PatternToMatch &Pattern, std::ostream &OS); void EmitInstructionSelector(std::ostream &OS); }; From lattner at cs.uiuc.edu Fri Jan 27 16:25:18 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Fri, 27 Jan 2006 16:25:18 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelLowering.cpp PPCISelLowering.h Message-ID: <200601272225.QAA31630@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/PowerPC: PPCISelLowering.cpp updated: 1.72 -> 1.73 PPCISelLowering.h updated: 1.16 -> 1.17 --- Log message: Make llvm.frame/returnaddr not crash on ppc --- Diffs of the changes: (+0 -11) PPCISelLowering.cpp | 7 ------- PPCISelLowering.h | 4 ---- 2 files changed, 11 deletions(-) Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.72 llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.73 --- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.72 Fri Jan 27 15:09:22 2006 +++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp Fri Jan 27 16:25:06 2006 @@ -862,13 +862,6 @@ return std::make_pair(RetVal, Chain); } -std::pair PPCTargetLowering:: -LowerFrameReturnAddress(bool isFrameAddress, SDOperand Chain, unsigned Depth, - SelectionDAG &DAG) { - assert(0 && "LowerFrameReturnAddress unimplemented"); - abort(); -} - MachineBasicBlock * PPCTargetLowering::InsertAtEndOfBasicBlock(MachineInstr *MI, MachineBasicBlock *BB) { Index: llvm/lib/Target/PowerPC/PPCISelLowering.h diff -u llvm/lib/Target/PowerPC/PPCISelLowering.h:1.16 llvm/lib/Target/PowerPC/PPCISelLowering.h:1.17 --- llvm/lib/Target/PowerPC/PPCISelLowering.h:1.16 Fri Jan 27 15:09:22 2006 +++ llvm/lib/Target/PowerPC/PPCISelLowering.h Fri Jan 27 16:25:06 2006 @@ -91,10 +91,6 @@ bool isTailCall, SDOperand Callee, ArgListTy &Args, SelectionDAG &DAG); - virtual std::pair - LowerFrameReturnAddress(bool isFrameAddr, SDOperand Chain, unsigned Depth, - SelectionDAG &DAG); - virtual MachineBasicBlock *InsertAtEndOfBasicBlock(MachineInstr *MI, MachineBasicBlock *MBB); }; From lattner at cs.uiuc.edu Fri Jan 27 16:37:21 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Fri, 27 Jan 2006 16:37:21 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86Subtarget.cpp Message-ID: <200601272237.QAA31803@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: X86Subtarget.cpp updated: 1.13 -> 1.14 --- Log message: initialize all instance vars --- Diffs of the changes: (+7 -3) X86Subtarget.cpp | 10 +++++++--- 1 files changed, 7 insertions(+), 3 deletions(-) Index: llvm/lib/Target/X86/X86Subtarget.cpp diff -u llvm/lib/Target/X86/X86Subtarget.cpp:1.13 llvm/lib/Target/X86/X86Subtarget.cpp:1.14 --- llvm/lib/Target/X86/X86Subtarget.cpp:1.13 Fri Jan 27 15:49:34 2006 +++ llvm/lib/Target/X86/X86Subtarget.cpp Fri Jan 27 16:37:09 2006 @@ -89,9 +89,13 @@ } } -X86Subtarget::X86Subtarget(const Module &M, const std::string &FS) - : stackAlignment(8), indirectExternAndWeakGlobals(false) { - +X86Subtarget::X86Subtarget(const Module &M, const std::string &FS) { + stackAlignment = 8; + indirectExternAndWeakGlobals = false; + X86SSELevel = NoMMXSSE; + X863DNowLevel = NoThreeDNow; + Is64Bit = false; + // Determine default and user specified characteristics std::string CPU = GetCurrentX86CPU(); From lattner at cs.uiuc.edu Fri Jan 27 16:38:48 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Fri, 27 Jan 2006 16:38:48 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/SparcV8/SparcV8Subtarget.cpp Message-ID: <200601272238.QAA31844@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/SparcV8: SparcV8Subtarget.cpp updated: 1.2 -> 1.3 --- Log message: initialize member vars --- Diffs of the changes: (+5 -0) SparcV8Subtarget.cpp | 5 +++++ 1 files changed, 5 insertions(+) Index: llvm/lib/Target/SparcV8/SparcV8Subtarget.cpp diff -u llvm/lib/Target/SparcV8/SparcV8Subtarget.cpp:1.2 llvm/lib/Target/SparcV8/SparcV8Subtarget.cpp:1.3 --- llvm/lib/Target/SparcV8/SparcV8Subtarget.cpp:1.2 Thu Jan 26 01:22:22 2006 +++ llvm/lib/Target/SparcV8/SparcV8Subtarget.cpp Fri Jan 27 16:38:36 2006 @@ -16,6 +16,11 @@ using namespace llvm; SparcV8Subtarget::SparcV8Subtarget(const Module &M, const std::string &FS) { + // Set the default features. + IsV9 = false; + V8DeprecatedInsts = false; + IsVIS = false; + // Determine default and user specified characteristics std::string CPU = "generic"; From evan.cheng at apple.com Fri Jan 27 16:52:03 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Fri, 27 Jan 2006 16:52:03 -0600 Subject: [llvm-commits] CVS: llvm/test/Regression/CodeGen/X86/fp_constant_op.llx fp_load_fold.llx Message-ID: <200601272252.QAA31933@zion.cs.uiuc.edu> Changes in directory llvm/test/Regression/CodeGen/X86: fp_constant_op.llx updated: 1.1 -> 1.2 fp_load_fold.llx updated: 1.1 -> 1.2 --- Log message: Use Intel assembly syntax to look for ST --- Diffs of the changes: (+2 -2) fp_constant_op.llx | 2 +- fp_load_fold.llx | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/test/Regression/CodeGen/X86/fp_constant_op.llx diff -u llvm/test/Regression/CodeGen/X86/fp_constant_op.llx:1.1 llvm/test/Regression/CodeGen/X86/fp_constant_op.llx:1.2 --- llvm/test/Regression/CodeGen/X86/fp_constant_op.llx:1.1 Sun Apr 11 15:24:01 2004 +++ llvm/test/Regression/CodeGen/X86/fp_constant_op.llx Fri Jan 27 16:51:51 2006 @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep ST | not grep 'fadd\|fsub\|fdiv\|fmul' +; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | grep ST | not grep 'fadd\|fsub\|fdiv\|fmul' ; Test that the load of the constant is folded into the operation. Index: llvm/test/Regression/CodeGen/X86/fp_load_fold.llx diff -u llvm/test/Regression/CodeGen/X86/fp_load_fold.llx:1.1 llvm/test/Regression/CodeGen/X86/fp_load_fold.llx:1.2 --- llvm/test/Regression/CodeGen/X86/fp_load_fold.llx:1.1 Sun Apr 11 17:05:16 2004 +++ llvm/test/Regression/CodeGen/X86/fp_load_fold.llx Fri Jan 27 16:51:51 2006 @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep ST | not grep 'fadd\|fsub\|fdiv\|fmul' +; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | grep ST | not grep 'fadd\|fsub\|fdiv\|fmul' ; Test that the load of the memory location is folded into the operation. From evan.cheng at apple.com Fri Jan 27 16:53:41 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Fri, 27 Jan 2006 16:53:41 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86InstrInfo.td Message-ID: <200601272253.QAA31948@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: X86InstrInfo.td updated: 1.220 -> 1.221 --- Log message: AT&T assembly convention: registers are in lower case. --- Diffs of the changes: (+16 -16) X86InstrInfo.td | 32 ++++++++++++++++---------------- 1 files changed, 16 insertions(+), 16 deletions(-) Index: llvm/lib/Target/X86/X86InstrInfo.td diff -u llvm/lib/Target/X86/X86InstrInfo.td:1.220 llvm/lib/Target/X86/X86InstrInfo.td:1.221 --- llvm/lib/Target/X86/X86InstrInfo.td:1.220 Fri Jan 27 02:10:46 2006 +++ llvm/lib/Target/X86/X86InstrInfo.td Fri Jan 27 16:53:29 2006 @@ -2775,22 +2775,22 @@ // of some of the 'reverse' forms of the fsub and fdiv instructions. As such, // we have to put some 'r's in and take them out of weird places. def FADDST0r : FPST0rInst <0xC0, "fadd $op">; -def FADDrST0 : FPrST0Inst <0xC0, "fadd {%ST(0), $op|$op, %ST(0)}">; +def FADDrST0 : FPrST0Inst <0xC0, "fadd {%st(0), $op|$op, %ST(0)}">; def FADDPrST0 : FPrST0PInst<0xC0, "faddp $op">; def FSUBRST0r : FPST0rInst <0xE8, "fsubr $op">; -def FSUBrST0 : FPrST0Inst <0xE8, "fsub{r} {%ST(0), $op|$op, %ST(0)}">; +def FSUBrST0 : FPrST0Inst <0xE8, "fsub{r} {%st(0), $op|$op, %ST(0)}">; def FSUBPrST0 : FPrST0PInst<0xE8, "fsub{r}p $op">; def FSUBST0r : FPST0rInst <0xE0, "fsub $op">; -def FSUBRrST0 : FPrST0Inst <0xE0, "fsub{|r} {%ST(0), $op|$op, %ST(0)}">; +def FSUBRrST0 : FPrST0Inst <0xE0, "fsub{|r} {%st(0), $op|$op, %ST(0)}">; def FSUBRPrST0 : FPrST0PInst<0xE0, "fsub{|r}p $op">; def FMULST0r : FPST0rInst <0xC8, "fmul $op">; -def FMULrST0 : FPrST0Inst <0xC8, "fmul {%ST(0), $op|$op, %ST(0)}">; +def FMULrST0 : FPrST0Inst <0xC8, "fmul {%st(0), $op|$op, %ST(0)}">; def FMULPrST0 : FPrST0PInst<0xC8, "fmulp $op">; def FDIVRST0r : FPST0rInst <0xF8, "fdivr $op">; -def FDIVrST0 : FPrST0Inst <0xF8, "fdiv{r} {%ST(0), $op|$op, %ST(0)}">; +def FDIVrST0 : FPrST0Inst <0xF8, "fdiv{r} {%st(0), $op|$op, %ST(0)}">; def FDIVPrST0 : FPrST0PInst<0xF8, "fdiv{r}p $op">; def FDIVST0r : FPST0rInst <0xF0, "fdiv $op">; -def FDIVRrST0 : FPrST0Inst <0xF0, "fdiv{|r} {%ST(0), $op|$op, %ST(0)}">; +def FDIVRrST0 : FPrST0Inst <0xF0, "fdiv{|r} {%st(0), $op|$op, %ST(0)}">; def FDIVRPrST0 : FPrST0PInst<0xF0, "fdiv{|r}p $op">; @@ -2845,21 +2845,21 @@ } def FCMOVB : FPI<0xC0, AddRegFrm, (ops RST:$op), - "fcmovb {$op, %ST(0)|%ST(0), $op}">, DA; + "fcmovb {$op, %st(0)|%ST(0), $op}">, DA; def FCMOVBE : FPI<0xD0, AddRegFrm, (ops RST:$op), - "fcmovbe {$op, %ST(0)|%ST(0), $op}">, DA; + "fcmovbe {$op, %st(0)|%ST(0), $op}">, DA; def FCMOVE : FPI<0xC8, AddRegFrm, (ops RST:$op), - "fcmove {$op, %ST(0)|%ST(0), $op}">, DA; + "fcmove {$op, %st(0)|%ST(0), $op}">, DA; def FCMOVP : FPI<0xD8, AddRegFrm, (ops RST:$op), - "fcmovu {$op, %ST(0)|%ST(0), $op}">, DA; + "fcmovu {$op, %st(0)|%ST(0), $op}">, DA; def FCMOVNB : FPI<0xC0, AddRegFrm, (ops RST:$op), - "fcmovnb {$op, %ST(0)|%ST(0), $op}">, DB; + "fcmovnb {$op, %st(0)|%ST(0), $op}">, DB; def FCMOVNBE : FPI<0xD0, AddRegFrm, (ops RST:$op), - "fcmovnbe {$op, %ST(0)|%ST(0), $op}">, DB; + "fcmovnbe {$op, %st(0)|%ST(0), $op}">, DB; def FCMOVNE : FPI<0xC8, AddRegFrm, (ops RST:$op), - "fcmovne {$op, %ST(0)|%ST(0), $op}">, DB; + "fcmovne {$op, %st(0)|%ST(0), $op}">, DB; def FCMOVNP : FPI<0xD8, AddRegFrm, (ops RST:$op), - "fcmovnu {$op, %ST(0)|%ST(0), $op}">, DB; + "fcmovnu {$op, %st(0)|%ST(0), $op}">, DB; // Floating point loads & stores. def FpLD32m : FpI<(ops RFP:$dst, f32mem:$src), ZeroArgFP, @@ -2933,10 +2933,10 @@ def FUCOMIr : FPI<0xE8, AddRegFrm, // CC = cmp ST(0) with ST(i) (ops RST:$reg), - "fucomi {$reg, %ST(0)|%ST(0), $reg}">, DB, Imp<[ST0],[]>; + "fucomi {$reg, %st(0)|%ST(0), $reg}">, DB, Imp<[ST0],[]>; def FUCOMIPr : FPI<0xE8, AddRegFrm, // CC = cmp ST(0) with ST(i), pop (ops RST:$reg), - "fucomip {$reg, %ST(0)|%ST(0), $reg}">, DF, Imp<[ST0],[]>; + "fucomip {$reg, %st(0)|%ST(0), $reg}">, DF, Imp<[ST0],[]>; // Floating point flag ops. From evan.cheng at apple.com Fri Jan 27 16:54:44 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Fri, 27 Jan 2006 16:54:44 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/README.txt Message-ID: <200601272254.QAA31985@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: README.txt updated: 1.24 -> 1.25 --- Log message: A bit of wisdom from Chris on the last entry. --- Diffs of the changes: (+10 -1) README.txt | 11 ++++++++++- 1 files changed, 10 insertions(+), 1 deletion(-) Index: llvm/lib/Target/X86/README.txt diff -u llvm/lib/Target/X86/README.txt:1.24 llvm/lib/Target/X86/README.txt:1.25 --- llvm/lib/Target/X86/README.txt:1.24 Fri Jan 27 16:11:01 2006 +++ llvm/lib/Target/X86/README.txt Fri Jan 27 16:54:32 2006 @@ -187,4 +187,13 @@ ret The problem is the store's chain operand is not the load X but rather -a TokenFactor of the load X and load Y. This prevents the folding. +a TokenFactor of the load X and load Y, which prevents the folding. + +There are two ways to fix this: + +1. The dag combiner can start using alias analysis to realize that y/x + don't alias, making the store to X not dependent on the load from Y. +2. The generated isel could be made smarter in the case it can't + disambiguate the pointers. + +Number 1 is the preferred solution. From lattner at cs.uiuc.edu Fri Jan 27 17:30:15 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Fri, 27 Jan 2006 17:30:15 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp SparcV8InstrInfo.td Message-ID: <200601272330.RAA32206@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/SparcV8: SparcV8ISelDAGToDAG.cpp updated: 1.61 -> 1.62 SparcV8InstrInfo.td updated: 1.104 -> 1.105 --- Log message: Use V8ISD::CALL instead of ISD::CALL --- Diffs of the changes: (+9 -5) SparcV8ISelDAGToDAG.cpp | 12 ++++++++---- SparcV8InstrInfo.td | 2 +- 2 files changed, 9 insertions(+), 5 deletions(-) Index: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp diff -u llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.61 llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.62 --- llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.61 Fri Jan 27 15:09:22 2006 +++ llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp Fri Jan 27 17:30:03 2006 @@ -46,6 +46,7 @@ SELECT_ICC, // Select between two values using the current ICC flags. SELECT_FCC, // Select between two values using the current FCC flags. + CALL, // A V8 call instruction. RET_FLAG, // Return with a flag operand. }; } @@ -185,6 +186,7 @@ case V8ISD::ITOF: return "V8ISD::ITOF"; case V8ISD::SELECT_ICC: return "V8ISD::SELECT_ICC"; case V8ISD::SELECT_FCC: return "V8ISD::SELECT_FCC"; + case V8ISD::CALL: return "V8ISD::CALL"; case V8ISD::RET_FLAG: return "V8ISD::RET_FLAG"; } } @@ -526,10 +528,12 @@ std::vector NodeTys; NodeTys.push_back(MVT::Other); // Returns a chain NodeTys.push_back(MVT::Flag); // Returns a flag for retval copy to use. + std::vector Ops; + Ops.push_back(Chain); + Ops.push_back(Callee); if (InFlag.Val) - Chain = SDOperand(DAG.getCall(NodeTys, Chain, Callee, InFlag), 0); - else - Chain = SDOperand(DAG.getCall(NodeTys, Chain, Callee), 0); + Ops.push_back(InFlag); + Chain = DAG.getNode(V8ISD::CALL, NodeTys, Ops); InFlag = Chain.getValue(1); MVT::ValueType RetTyVT = getValueType(RetTy); @@ -981,7 +985,7 @@ // The high part is in the Y register. return CurDAG->SelectNodeTo(N, V8::RDY, MVT::i32, Mul.getValue(1)); } - case ISD::CALL: + case V8ISD::CALL: // FIXME: This is a workaround for a bug in tblgen. { // Pattern #47: (call:Flag (tglobaladdr:i32):$dst, ICC:Flag) // Emits: (CALL:void (tglobaladdr:i32):$dst) Index: llvm/lib/Target/SparcV8/SparcV8InstrInfo.td diff -u llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.104 llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.105 --- llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.104 Thu Jan 26 19:46:15 2006 +++ llvm/lib/Target/SparcV8/SparcV8InstrInfo.td Fri Jan 27 17:30:03 2006 @@ -92,7 +92,7 @@ def callseq_end : SDNode<"ISD::CALLSEQ_END", SDT_V8CallSeq, [SDNPHasChain]>; def SDT_V8Call : SDTypeProfile<0, 1, [SDTCisVT<0, i32>]>; -def call : SDNode<"ISD::CALL", SDT_V8Call, +def call : SDNode<"V8ISD::CALL", SDT_V8Call, [SDNPHasChain, SDNPOptInFlag, SDNPOutFlag]>; def SDT_V8RetFlag : SDTypeProfile<0, 0, []>; From lattner at cs.uiuc.edu Fri Jan 27 17:34:14 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Fri, 27 Jan 2006 17:34:14 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp PPCISelLowering.cpp PPCISelLowering.h Message-ID: <200601272334.RAA32302@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/PowerPC: PPCISelDAGToDAG.cpp updated: 1.152 -> 1.153 PPCISelLowering.cpp updated: 1.73 -> 1.74 PPCISelLowering.h updated: 1.17 -> 1.18 --- Log message: Use PPCISD::CALL instead of ISD::CALL --- Diffs of the changes: (+11 -6) PPCISelDAGToDAG.cpp | 3 +-- PPCISelLowering.cpp | 9 ++++++--- PPCISelLowering.h | 5 ++++- 3 files changed, 11 insertions(+), 6 deletions(-) Index: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp diff -u llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.152 llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.153 --- llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.152 Sun Jan 22 17:37:17 2006 +++ llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp Fri Jan 27 17:34:02 2006 @@ -821,8 +821,7 @@ case ISD::ADD_PARTS: return SelectADD_PARTS(Op); case ISD::SUB_PARTS: return SelectSUB_PARTS(Op); case ISD::SETCC: return SelectSETCC(Op); - case ISD::CALL: return SelectCALL(Op); - case ISD::TAILCALL: return SelectCALL(Op); + case PPCISD::CALL: return SelectCALL(Op); case PPCISD::GlobalBaseReg: return getGlobalBaseReg(); case ISD::FrameIndex: { Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.73 llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.74 --- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.73 Fri Jan 27 16:25:06 2006 +++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp Fri Jan 27 17:34:02 2006 @@ -666,7 +666,7 @@ unsigned CallingConv, bool isTailCall, SDOperand Callee, ArgListTy &Args, SelectionDAG &DAG) { - // args_to_use will accumulate outgoing args for the ISD::CALL case in + // args_to_use will accumulate outgoing args for the PPCISD::CALL case in // SelectExpr to use to put the arguments in the appropriate registers. std::vector args_to_use; @@ -844,8 +844,11 @@ if (GlobalAddressSDNode *G = dyn_cast(Callee)) Callee = DAG.getTargetGlobalAddress(G->getGlobal(), MVT::i32); - SDOperand TheCall = SDOperand(DAG.getCall(RetVals, - Chain, Callee, args_to_use), 0); + std::vector Ops; + Ops.push_back(Chain); + Ops.push_back(Callee); + Ops.insert(Ops.end(), args_to_use.begin(), args_to_use.end()); + SDOperand TheCall = DAG.getNode(PPCISD::CALL, RetVals, Ops); Chain = TheCall.getValue(RetTyVT != MVT::isVoid); Chain = DAG.getNode(ISD::CALLSEQ_END, MVT::Other, Chain, DAG.getConstant(NumBytes, getPointerTy())); Index: llvm/lib/Target/PowerPC/PPCISelLowering.h diff -u llvm/lib/Target/PowerPC/PPCISelLowering.h:1.17 llvm/lib/Target/PowerPC/PPCISelLowering.h:1.18 --- llvm/lib/Target/PowerPC/PPCISelLowering.h:1.17 Fri Jan 27 16:25:06 2006 +++ llvm/lib/Target/PowerPC/PPCISelLowering.h Fri Jan 27 17:34:02 2006 @@ -59,9 +59,12 @@ /// code. SRL, SRA, SHL, + /// CALL - A function call. + CALL, + /// Return with a flag operand, matched by 'blr' RET_FLAG, -}; + }; } class PPCTargetLowering : public TargetLowering { From lattner at cs.uiuc.edu Fri Jan 27 17:39:11 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Fri, 27 Jan 2006 17:39:11 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp AlphaISelLowering.cpp AlphaISelLowering.h Message-ID: <200601272339.RAA32392@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/Alpha: AlphaISelDAGToDAG.cpp updated: 1.29 -> 1.30 AlphaISelLowering.cpp updated: 1.32 -> 1.33 AlphaISelLowering.h updated: 1.12 -> 1.13 --- Log message: Switch to AlphaISD::CALL instead of ISD::CALL --- Diffs of the changes: (+10 -4) AlphaISelDAGToDAG.cpp | 3 +-- AlphaISelLowering.cpp | 8 ++++++-- AlphaISelLowering.h | 3 +++ 3 files changed, 10 insertions(+), 4 deletions(-) Index: llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp diff -u llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:1.29 llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:1.30 --- llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:1.29 Sun Jan 22 17:37:17 2006 +++ llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp Fri Jan 27 17:39:00 2006 @@ -161,8 +161,7 @@ switch (N->getOpcode()) { default: break; - case ISD::TAILCALL: - case ISD::CALL: return SelectCALL(Op); + case AlphaISD::CALL: return SelectCALL(Op); case ISD::FrameIndex: { int FI = cast(N)->getIndex(); Index: llvm/lib/Target/Alpha/AlphaISelLowering.cpp diff -u llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.32 llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.33 --- llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.32 Wed Jan 25 17:33:32 2006 +++ llvm/lib/Target/Alpha/AlphaISelLowering.cpp Fri Jan 27 17:39:00 2006 @@ -164,6 +164,7 @@ case AlphaISD::GPRelLo: return "Alpha::GPRelLo"; case AlphaISD::RelLit: return "Alpha::RelLit"; case AlphaISD::GlobalBaseReg: return "Alpha::GlobalBaseReg"; + case AlphaISD::CALL: return "Alpha::CALL"; case AlphaISD::DivCall: return "Alpha::DivCall"; case AlphaISD::LDQ_: return "Alpha::LDQ_"; case AlphaISD::LDT_: return "Alpha::LDT_"; @@ -357,8 +358,11 @@ RetVals.push_back(ActualRetTyVT); RetVals.push_back(MVT::Other); - SDOperand TheCall = SDOperand(DAG.getCall(RetVals, - Chain, Callee, args_to_use), 0); + std::vector Ops; + Ops.push_back(Chain); + Ops.push_back(Callee); + Ops.insert(Ops.end(), args_to_use.begin(), args_to_use.end()); + SDOperand TheCall = DAG.getNode(AlphaISD::CALL, RetVals, Ops); Chain = TheCall.getValue(RetTyVT != MVT::isVoid); Chain = DAG.getNode(ISD::CALLSEQ_END, MVT::Other, Chain, DAG.getConstant(NumBytes, getPointerTy())); Index: llvm/lib/Target/Alpha/AlphaISelLowering.h diff -u llvm/lib/Target/Alpha/AlphaISelLowering.h:1.12 llvm/lib/Target/Alpha/AlphaISelLowering.h:1.13 --- llvm/lib/Target/Alpha/AlphaISelLowering.h:1.12 Wed Jan 25 12:21:52 2006 +++ llvm/lib/Target/Alpha/AlphaISelLowering.h Fri Jan 27 17:39:00 2006 @@ -37,6 +37,9 @@ /// GlobalBaseReg - used to restore the GOT ptr GlobalBaseReg, + + /// CALL - Normal call. + CALL, /// DIVCALL - used for special library calls for div and rem DivCall, From lattner at cs.uiuc.edu Fri Jan 27 18:03:03 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Fri, 27 Jan 2006 18:03:03 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp IA64ISelLowering.cpp Message-ID: <200601280003.SAA32556@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/IA64: IA64ISelDAGToDAG.cpp updated: 1.30 -> 1.31 IA64ISelLowering.cpp updated: 1.29 -> 1.30 --- Log message: Remove some dead code --- Diffs of the changes: (+0 -35) IA64ISelDAGToDAG.cpp | 30 ------------------------------ IA64ISelLowering.cpp | 5 ----- 2 files changed, 35 deletions(-) Index: llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp diff -u llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp:1.30 llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp:1.31 --- llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp:1.30 Sun Jan 22 17:37:17 2006 +++ llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp Fri Jan 27 18:02:51 2006 @@ -413,36 +413,6 @@ return Result; } - case ISD::CALL: - case ISD::TAILCALL: { { - // FIXME: This is a workaround for a bug in tblgen. - // Pattern #47: (call:Flag (tglobaladdr:i32):$dst, ICC:Flag) - // Emits: (CALL:void (tglobaladdr:i32):$dst) - // Pattern complexity = 2 cost = 1 - SDOperand N1 = N->getOperand(1); - if (N1.getOpcode() != ISD::TargetGlobalAddress && - N1.getOpcode() != ISD::ExternalSymbol) goto P47Fail; - SDOperand InFlag = SDOperand(0, 0); - SDOperand Chain = N->getOperand(0); - SDOperand Tmp0 = N1; - Chain = Select(Chain); - SDOperand Result; - if (N->getNumOperands() == 3) { - InFlag = Select(N->getOperand(2)); - Result = CurDAG->getTargetNode(IA64::BRCALL, MVT::Other, MVT::Flag, Tmp0, - Chain, InFlag); - } else { - Result = CurDAG->getTargetNode(IA64::BRCALL, MVT::Other, MVT::Flag, Tmp0, - Chain); - } - Chain = CodeGenMap[SDOperand(N, 0)] = Result.getValue(0); - CodeGenMap[SDOperand(N, 1)] = Result.getValue(1); - return Result.getValue(Op.ResNo); - } - P47Fail:; - - } - case ISD::FDIV: case ISD::SDIV: case ISD::UDIV: Index: llvm/lib/Target/IA64/IA64ISelLowering.cpp diff -u llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.29 llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.30 --- llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.29 Fri Jan 27 15:09:22 2006 +++ llvm/lib/Target/IA64/IA64ISelLowering.cpp Fri Jan 27 18:02:51 2006 @@ -461,11 +461,6 @@ else assert(0 && "this should never happen!\n"); -/* out with the old... - Chain = SDOperand(DAG.getCall(NodeTys, Chain, Callee, InFlag), 0); - else - Chain = SDOperand(DAG.getCall(NodeTys, Chain, Callee), 0); -*/ // to make way for a hack: Chain = DAG.getNode(IA64ISD::BRCALL, NodeTys, CallOperands); InFlag = Chain.getValue(1); From lattner at cs.uiuc.edu Fri Jan 27 18:18:39 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Fri, 27 Jan 2006 18:18:39 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/SelectionDAG.h SelectionDAGNodes.h Message-ID: <200601280018.SAA32729@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/CodeGen: SelectionDAG.h updated: 1.88 -> 1.89 SelectionDAGNodes.h updated: 1.95 -> 1.96 --- Log message: The 'target-independent' ISD::CALL isn't. Nuke it, making way for Nate's future work. --- Diffs of the changes: (+0 -43) SelectionDAG.h | 35 ----------------------------------- SelectionDAGNodes.h | 8 -------- 2 files changed, 43 deletions(-) Index: llvm/include/llvm/CodeGen/SelectionDAG.h diff -u llvm/include/llvm/CodeGen/SelectionDAG.h:1.88 llvm/include/llvm/CodeGen/SelectionDAG.h:1.89 --- llvm/include/llvm/CodeGen/SelectionDAG.h:1.88 Wed Jan 25 12:21:52 2006 +++ llvm/include/llvm/CodeGen/SelectionDAG.h Fri Jan 27 18:18:27 2006 @@ -188,41 +188,6 @@ return getNode(ISD::CopyFromReg, ResultTys, Ops); } - /// getCall - Note that this destroys the vector of RetVals passed in. - /// - SDNode *getCall(std::vector &RetVals, SDOperand Chain, - SDOperand Callee, bool isTailCall = false) { - SDNode *NN = new SDNode(isTailCall ? ISD::TAILCALL : ISD::CALL, Chain, - Callee); - setNodeValueTypes(NN, RetVals); - AllNodes.push_back(NN); - return NN; - } - /// getCall - Note that this destroys the vector of RetVals passed in. - /// - SDNode *getCall(std::vector &RetVals, SDOperand Chain, - SDOperand Callee, SDOperand Flag, bool isTailCall = false) { - SDNode *NN = new SDNode(isTailCall ? ISD::TAILCALL : ISD::CALL, Chain, - Callee, Flag); - setNodeValueTypes(NN, RetVals); - AllNodes.push_back(NN); - return NN; - } - - /// getCall - This is identical to the one above, and should be used for calls - /// where arguments are passed in physical registers. This destroys the - /// RetVals and ArgsInRegs vectors. - SDNode *getCall(std::vector &RetVals, SDOperand Chain, - SDOperand Callee, std::vector &ArgsInRegs, - bool isTailCall = false) { - ArgsInRegs.insert(ArgsInRegs.begin(), Callee); - ArgsInRegs.insert(ArgsInRegs.begin(), Chain); - SDNode *NN = new SDNode(isTailCall ? ISD::TAILCALL : ISD::CALL, ArgsInRegs); - setNodeValueTypes(NN, RetVals); - AllNodes.push_back(NN); - return NN; - } - SDOperand getCondCode(ISD::CondCode Cond); /// getZeroExtendInReg - Return the expression required to zero extend the Op Index: llvm/include/llvm/CodeGen/SelectionDAGNodes.h diff -u llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.95 llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.96 --- llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.95 Thu Jan 26 16:23:45 2006 +++ llvm/include/llvm/CodeGen/SelectionDAGNodes.h Fri Jan 27 18:18:27 2006 @@ -304,14 +304,6 @@ // function. This operation can have variable number of operands. RET, - // CALL - Call to a function pointer. The first operand is the chain, the - // second is the destination function pointer (a GlobalAddress for a direct - // call). Arguments have already been lowered to explicit DAGs according to - // the calling convention in effect here. TAILCALL is the same as CALL, but - // the callee is known not to access the stack of the caller. - CALL, - TAILCALL, - // INLINEASM - Represents an inline asm block. This node always has two // return values: a chain and a flag result. The inputs are as follows: // Operand #0 : Input chain. From lattner at cs.uiuc.edu Fri Jan 27 18:19:10 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Fri, 27 Jan 2006 18:19:10 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp SelectionDAG.cpp Message-ID: <200601280019.SAA32766@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/SelectionDAG: LegalizeDAG.cpp updated: 1.278 -> 1.279 SelectionDAG.cpp updated: 1.245 -> 1.246 --- Log message: Remove the ISD::CALL and ISD::TAILCALL nodes --- Diffs of the changes: (+1 -83) LegalizeDAG.cpp | 80 ------------------------------------------------------- SelectionDAG.cpp | 4 -- 2 files changed, 1 insertion(+), 83 deletions(-) Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.278 llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.279 --- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.278 Thu Jan 26 16:24:51 2006 +++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Fri Jan 27 18:18:58 2006 @@ -903,34 +903,6 @@ AddLegalizedOperand(SDOperand(Node, 0), Result); AddLegalizedOperand(SDOperand(Node, 1), Result.getValue(1)); return Result.getValue(Op.ResNo); - case ISD::TAILCALL: - case ISD::CALL: { - Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain. - Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the callee. - - bool Changed = false; - std::vector Ops; - for (unsigned i = 2, e = Node->getNumOperands(); i != e; ++i) { - Ops.push_back(LegalizeOp(Node->getOperand(i))); - Changed |= Ops.back() != Node->getOperand(i); - } - - if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1) || Changed) { - std::vector RetTyVTs; - RetTyVTs.reserve(Node->getNumValues()); - for (unsigned i = 0, e = Node->getNumValues(); i != e; ++i) - RetTyVTs.push_back(Node->getValueType(i)); - Result = SDOperand(DAG.getCall(RetTyVTs, Tmp1, Tmp2, Ops, - Node->getOpcode() == ISD::TAILCALL), 0); - } else { - Result = Result.getValue(0); - } - // Since calls produce multiple values, make sure to remember that we - // legalized all of them. - for (unsigned i = 0, e = Node->getNumValues(); i != e; ++i) - AddLegalizedOperand(SDOperand(Node, i), Result.getValue(i)); - return Result.getValue(Op.ResNo); - } case ISD::BR: Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain. if (Tmp1 != Node->getOperand(0)) @@ -3278,29 +3250,6 @@ Node->getOperand(1), Tmp2, Tmp3, Node->getOperand(4)); break; - case ISD::TAILCALL: - case ISD::CALL: { - Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain. - Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the callee. - - std::vector Ops; - for (unsigned i = 2, e = Node->getNumOperands(); i != e; ++i) - Ops.push_back(LegalizeOp(Node->getOperand(i))); - - assert(Node->getNumValues() == 2 && Op.ResNo == 0 && - "Can only promote single result calls"); - std::vector RetTyVTs; - RetTyVTs.reserve(2); - RetTyVTs.push_back(NVT); - RetTyVTs.push_back(MVT::Other); - SDNode *NC = DAG.getCall(RetTyVTs, Tmp1, Tmp2, Ops, - Node->getOpcode() == ISD::TAILCALL); - Result = SDOperand(NC, 0); - - // Insert the new chain mapping. - AddLegalizedOperand(Op.getValue(1), Result.getValue(1)); - break; - } case ISD::BSWAP: Tmp1 = Node->getOperand(0); Tmp1 = DAG.getNode(ISD::ZERO_EXTEND, NVT, Tmp1); @@ -4079,35 +4028,6 @@ } break; } - case ISD::TAILCALL: - case ISD::CALL: { - SDOperand Chain = LegalizeOp(Node->getOperand(0)); // Legalize the chain. - SDOperand Callee = LegalizeOp(Node->getOperand(1)); // Legalize the callee. - - bool Changed = false; - std::vector Ops; - for (unsigned i = 2, e = Node->getNumOperands(); i != e; ++i) { - Ops.push_back(LegalizeOp(Node->getOperand(i))); - Changed |= Ops.back() != Node->getOperand(i); - } - - assert(Node->getNumValues() == 2 && Op.ResNo == 0 && - "Can only expand a call once so far, not i64 -> i16!"); - - std::vector RetTyVTs; - RetTyVTs.reserve(3); - RetTyVTs.push_back(NVT); - RetTyVTs.push_back(NVT); - RetTyVTs.push_back(MVT::Other); - SDNode *NC = DAG.getCall(RetTyVTs, Chain, Callee, Ops, - Node->getOpcode() == ISD::TAILCALL); - Lo = SDOperand(NC, 0); - Hi = SDOperand(NC, 1); - - // Insert the new chain mapping. - AddLegalizedOperand(Op.getValue(1), Hi.getValue(2)); - break; - } case ISD::AND: case ISD::OR: case ISD::XOR: { // Simple logical operators -> two trivial pieces. Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.245 llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.246 --- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.245 Thu Jan 26 16:24:51 2006 +++ llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Fri Jan 27 18:18:58 2006 @@ -374,7 +374,7 @@ // flag result (which cannot be CSE'd) or is one of the special cases that are // not subject to CSE. if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag && - N->getOpcode() != ISD::CALL && N->getOpcode() != ISD::CALLSEQ_START && + N->getOpcode() != ISD::CALLSEQ_START && N->getOpcode() != ISD::CALLSEQ_END && !N->isTargetOpcode()) { N->dump(); @@ -2096,8 +2096,6 @@ case ISD::BR_CC: return "br_cc"; case ISD::BRTWOWAY_CC: return "brtwoway_cc"; case ISD::RET: return "ret"; - case ISD::CALL: return "call"; - case ISD::TAILCALL:return "tailcall"; case ISD::CALLSEQ_START: return "callseq_start"; case ISD::CALLSEQ_END: return "callseq_end"; From evan.cheng at apple.com Fri Jan 27 18:37:14 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Fri, 27 Jan 2006 18:37:14 -0600 Subject: [llvm-commits] CVS: llvm-test/SingleSource/UnitTests/2005-07-17-INT-To-FP.c Message-ID: <200601280037.SAA00394@zion.cs.uiuc.edu> Changes in directory llvm-test/SingleSource/UnitTests: 2005-07-17-INT-To-FP.c updated: 1.4 -> 1.5 --- Log message: Work around a GCC bug where it is incorrectly eliding a float truncate by using a value that is fully precise as a float.CVS: ---------------------------------------------------------------------- --- Diffs of the changes: (+1 -1) 2005-07-17-INT-To-FP.c | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm-test/SingleSource/UnitTests/2005-07-17-INT-To-FP.c diff -u llvm-test/SingleSource/UnitTests/2005-07-17-INT-To-FP.c:1.4 llvm-test/SingleSource/UnitTests/2005-07-17-INT-To-FP.c:1.5 --- llvm-test/SingleSource/UnitTests/2005-07-17-INT-To-FP.c:1.4 Fri Nov 11 16:25:53 2005 +++ llvm-test/SingleSource/UnitTests/2005-07-17-INT-To-FP.c Fri Jan 27 18:37:03 2006 @@ -3,7 +3,7 @@ int tests[] = { 0x80000000, - -123456789, + -123456792, -10, -2, -1, From natebegeman at mac.com Fri Jan 27 19:06:41 2006 From: natebegeman at mac.com (Nate Begeman) Date: Fri, 27 Jan 2006 19:06:41 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Message-ID: <200601280106.TAA00515@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/SelectionDAG: DAGCombiner.cpp updated: 1.86 -> 1.87 --- Log message: Add a missing case to the dag combiner. --- Diffs of the changes: (+3 -2) DAGCombiner.cpp | 5 +++-- 1 files changed, 3 insertions(+), 2 deletions(-) Index: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp diff -u llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.86 llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.87 --- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.86 Sun Jan 22 17:39:54 2006 +++ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Fri Jan 27 19:06:30 2006 @@ -1035,9 +1035,10 @@ WorkList.push_back(ANDNode.Val); return DAG.getNode(ISD::ZERO_EXTEND, VT, ANDNode); } - // fold (and (shl/srl x), (shl/srl y)) -> (shl/srl (and x, y)) + // fold (and (shl/srl/sra x), (shl/srl/sra y)) -> (shl/srl/sra (and x, y)) if (((N0.getOpcode() == ISD::SHL && N1.getOpcode() == ISD::SHL) || - (N0.getOpcode() == ISD::SRL && N1.getOpcode() == ISD::SRL)) && + (N0.getOpcode() == ISD::SRL && N1.getOpcode() == ISD::SRL) || + (N0.getOpcode() == ISD::SRA && N1.getOpcode() == ISD::SRA)) && N0.getOperand(1) == N1.getOperand(1)) { SDOperand ANDNode = DAG.getNode(ISD::AND, N0.getOperand(0).getValueType(), N0.getOperand(0), N1.getOperand(0)); From natebegeman at mac.com Fri Jan 27 19:22:22 2006 From: natebegeman at mac.com (Nate Begeman) Date: Fri, 27 Jan 2006 19:22:22 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/README.txt Message-ID: <200601280122.TAA00558@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/PowerPC: README.txt updated: 1.46 -> 1.47 --- Log message: Add a couple more things to the readme. --- Diffs of the changes: (+53 -0) README.txt | 53 +++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 53 insertions(+) Index: llvm/lib/Target/PowerPC/README.txt diff -u llvm/lib/Target/PowerPC/README.txt:1.46 llvm/lib/Target/PowerPC/README.txt:1.47 --- llvm/lib/Target/PowerPC/README.txt:1.46 Wed Jan 18 20:09:38 2006 +++ llvm/lib/Target/PowerPC/README.txt Fri Jan 27 19:22:10 2006 @@ -194,6 +194,59 @@ ===-------------------------------------------------------------------------=== +176.gcc contains a bunch of code like this (this occurs dozens of times): + +int %test(uint %mode.0.i.0) { + %tmp.79 = cast uint %mode.0.i.0 to sbyte ; [#uses=1] + %tmp.80 = cast sbyte %tmp.79 to int ; [#uses=1] + %tmp.81 = shl int %tmp.80, ubyte 16 ; [#uses=1] + %tmp.82 = and int %tmp.81, 16711680 + ret int %tmp.82 +} + +which we compile to: + +_test: + extsb r2, r3 + rlwinm r3, r2, 16, 8, 15 + blr + +The extsb is obviously dead. This can be handled by a future thing like +MaskedValueIsZero that checks to see if bits are ever demanded (in this case, +the sign bits are never used, so we can fold the sext_inreg to nothing). + +I'm seeing code like this: + + srwi r3, r3, 16 + extsb r3, r3 + rlwimi r4, r3, 16, 8, 15 + +in which the extsb is preventing the srwi from being nuked. + +===-------------------------------------------------------------------------=== + +Another example that occurs is: + +uint %test(int %specbits.6.1) { + %tmp.2540 = shr int %specbits.6.1, ubyte 11 ; [#uses=1] + %tmp.2541 = cast int %tmp.2540 to uint ; [#uses=1] + %tmp.2542 = shl uint %tmp.2541, ubyte 13 ; [#uses=1] + %tmp.2543 = and uint %tmp.2542, 8192 ; [#uses=1] + ret uint %tmp.2543 +} + +which we codegen as: + +l1_test: + srawi r2, r3, 11 + rlwinm r3, r2, 13, 18, 18 + blr + +the srawi can be nuked by turning the SAR into a logical SHR (the sext bits are +dead), which I think can then be folded into the rlwinm. + +===-------------------------------------------------------------------------=== + Compile offsets from allocas: int *%test() { From evan.cheng at apple.com Fri Jan 27 20:41:24 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Fri, 27 Jan 2006 20:41:24 -0600 Subject: [llvm-commits] CVS: llvm-test/SingleSource/UnitTests/2005-07-17-INT-To-FP.c Message-ID: <200601280241.UAA01063@zion.cs.uiuc.edu> Changes in directory llvm-test/SingleSource/UnitTests: 2005-07-17-INT-To-FP.c updated: 1.5 -> 1.6 --- Log message: Back out last check-in. Turns out we are bug compatible with gcc. :-) --- Diffs of the changes: (+1 -1) 2005-07-17-INT-To-FP.c | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm-test/SingleSource/UnitTests/2005-07-17-INT-To-FP.c diff -u llvm-test/SingleSource/UnitTests/2005-07-17-INT-To-FP.c:1.5 llvm-test/SingleSource/UnitTests/2005-07-17-INT-To-FP.c:1.6 --- llvm-test/SingleSource/UnitTests/2005-07-17-INT-To-FP.c:1.5 Fri Jan 27 18:37:03 2006 +++ llvm-test/SingleSource/UnitTests/2005-07-17-INT-To-FP.c Fri Jan 27 20:41:13 2006 @@ -3,7 +3,7 @@ int tests[] = { 0x80000000, - -123456792, + -123456789, -10, -2, -1, From natebegeman at mac.com Fri Jan 27 21:14:44 2006 From: natebegeman at mac.com (Nate Begeman) Date: Fri, 27 Jan 2006 21:14:44 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/IA64/IA64ISelLowering.cpp Message-ID: <200601280314.VAA01574@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/IA64: IA64ISelLowering.cpp updated: 1.30 -> 1.31 --- Log message: Implement Promote for VAARG, and allow it to be custom promoted for people who don't want the default behavior (Alpha). --- Diffs of the changes: (+1 -1) IA64ISelLowering.cpp | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/Target/IA64/IA64ISelLowering.cpp diff -u llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.30 llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.31 --- llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.30 Fri Jan 27 18:02:51 2006 +++ llvm/lib/Target/IA64/IA64ISelLowering.cpp Fri Jan 27 21:14:31 2006 @@ -588,7 +588,7 @@ VAIncr = DAG.getNode(ISD::STORE, MVT::Other, VAList.getValue(1), VAIncr, Op.getOperand(1), Op.getOperand(2)); // Load the actual argument out of the pointer VAList - return DAG.getLoad(VT, VAIncr, VAList, DAG.getSrcValue(0)); + return DAG.getLoad(Op.getValueType(), VAIncr, VAList, DAG.getSrcValue(0)); } case ISD::VASTART: { // vastart just stores the address of the VarArgsFrameIndex slot into the From natebegeman at mac.com Fri Jan 27 21:14:44 2006 From: natebegeman at mac.com (Nate Begeman) Date: Fri, 27 Jan 2006 21:14:44 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaISelLowering.cpp AlphaISelLowering.h Message-ID: <200601280314.VAA01573@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/Alpha: AlphaISelLowering.cpp updated: 1.33 -> 1.34 AlphaISelLowering.h updated: 1.13 -> 1.14 --- Log message: Implement Promote for VAARG, and allow it to be custom promoted for people who don't want the default behavior (Alpha). --- Diffs of the changes: (+12 -0) AlphaISelLowering.cpp | 11 +++++++++++ AlphaISelLowering.h | 1 + 2 files changed, 12 insertions(+) Index: llvm/lib/Target/Alpha/AlphaISelLowering.cpp diff -u llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.33 llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.34 --- llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.33 Fri Jan 27 17:39:00 2006 +++ llvm/lib/Target/Alpha/AlphaISelLowering.cpp Fri Jan 27 21:14:31 2006 @@ -141,6 +141,7 @@ setOperationAction(ISD::VAEND, MVT::Other, Expand); setOperationAction(ISD::VACOPY, MVT::Other, Custom); setOperationAction(ISD::VAARG, MVT::Other, Custom); + setOperationAction(ISD::VAARG, MVT::i32, Custom); setStackPointerRegisterToSaveRestore(Alpha::R30); @@ -691,3 +692,13 @@ return SDOperand(); } + +SDOperand AlphaTargetLowering::CustomPromoteOperation(SDOperand Op, + SelectionDAG &DAG) { + assert(Op.getValueType() == MVT::i32 && + Op.getOpcode() == ISD::VAARG && + "Unknown node to custom promote!"); + + // The code in LowerOperation already handles i32 vaarg + return LowerOperation(Op, DAG); +} Index: llvm/lib/Target/Alpha/AlphaISelLowering.h diff -u llvm/lib/Target/Alpha/AlphaISelLowering.h:1.13 llvm/lib/Target/Alpha/AlphaISelLowering.h:1.14 --- llvm/lib/Target/Alpha/AlphaISelLowering.h:1.13 Fri Jan 27 17:39:00 2006 +++ llvm/lib/Target/Alpha/AlphaISelLowering.h Fri Jan 27 21:14:31 2006 @@ -62,6 +62,7 @@ /// LowerOperation - Provide custom lowering hooks for some operations. /// virtual SDOperand LowerOperation(SDOperand Op, SelectionDAG &DAG); + virtual SDOperand CustomPromoteOperation(SDOperand Op, SelectionDAG &DAG); //Friendly names for dumps const char *getTargetNodeName(unsigned Opcode) const; From natebegeman at mac.com Fri Jan 27 21:14:44 2006 From: natebegeman at mac.com (Nate Begeman) Date: Fri, 27 Jan 2006 21:14:44 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp SelectionDAGISel.cpp Message-ID: <200601280314.VAA01582@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/SelectionDAG: LegalizeDAG.cpp updated: 1.279 -> 1.280 SelectionDAGISel.cpp updated: 1.139 -> 1.140 --- Log message: Implement Promote for VAARG, and allow it to be custom promoted for people who don't want the default behavior (Alpha). --- Diffs of the changes: (+32 -1) LegalizeDAG.cpp | 26 +++++++++++++++++++++++++- SelectionDAGISel.cpp | 7 +++++++ 2 files changed, 32 insertions(+), 1 deletion(-) Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.279 llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.280 --- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.279 Fri Jan 27 18:18:58 2006 +++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Fri Jan 27 21:14:31 2006 @@ -3209,7 +3209,31 @@ Tmp2 = LegalizeOp(Node->getOperand(1)); Result = DAG.getNode(ISD::SRL, NVT, Tmp1, Tmp2); break; - + + case ISD::VAARG: + Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain. + Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the pointer. + if (TLI.getOperationAction(ISD::VAARG, VT) == TargetLowering::Custom) { + Tmp3 = DAG.getVAArg(VT, Tmp1, Tmp2, Node->getOperand(2)); + Result = TLI.CustomPromoteOperation(Tmp3, DAG); + } else { + SDOperand VAList = DAG.getLoad(TLI.getPointerTy(), Tmp1, Tmp2, + Node->getOperand(2)); + // Increment the pointer, VAList, to the next vaarg + Tmp3 = DAG.getNode(ISD::ADD, TLI.getPointerTy(), VAList, + DAG.getConstant(MVT::getSizeInBits(VT)/8, + TLI.getPointerTy())); + // Store the incremented VAList to the legalized pointer + Tmp3 = DAG.getNode(ISD::STORE, MVT::Other, VAList.getValue(1), Tmp3, Tmp2, + Node->getOperand(2)); + // Load the actual argument out of the pointer VAList + Result = DAG.getExtLoad(ISD::EXTLOAD, NVT, Tmp3, VAList, + DAG.getSrcValue(0), VT); + } + // Remember that we legalized the chain. + AddLegalizedOperand(Op.getValue(1), Result.getValue(1)); + break; + case ISD::LOAD: Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain. Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the pointer. Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.139 llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.140 --- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.139 Fri Jan 27 15:09:21 2006 +++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Fri Jan 27 21:14:31 2006 @@ -1281,6 +1281,13 @@ return SDOperand(); } +SDOperand TargetLowering::CustomPromoteOperation(SDOperand Op, + SelectionDAG &DAG) { + assert(0 && "CustomPromoteOperation not implemented for this target!"); + abort(); + return SDOperand(); +} + void SelectionDAGLowering::visitFrameReturnAddress(CallInst &I, bool isFrame) { unsigned Depth = (unsigned)cast(I.getOperand(1))->getValue(); std::pair Result = From natebegeman at mac.com Fri Jan 27 21:14:45 2006 From: natebegeman at mac.com (Nate Begeman) Date: Fri, 27 Jan 2006 21:14:45 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/Target/TargetLowering.h Message-ID: <200601280314.VAA01587@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/Target: TargetLowering.h updated: 1.38 -> 1.39 --- Log message: Implement Promote for VAARG, and allow it to be custom promoted for people who don't want the default behavior (Alpha). --- Diffs of the changes: (+6 -1) TargetLowering.h | 7 ++++++- 1 files changed, 6 insertions(+), 1 deletion(-) Index: llvm/include/llvm/Target/TargetLowering.h diff -u llvm/include/llvm/Target/TargetLowering.h:1.38 llvm/include/llvm/Target/TargetLowering.h:1.39 --- llvm/include/llvm/Target/TargetLowering.h:1.38 Fri Jan 27 15:09:21 2006 +++ llvm/include/llvm/Target/TargetLowering.h Fri Jan 27 21:14:31 2006 @@ -369,11 +369,16 @@ SelectionDAG &DAG); /// LowerOperation - For operations that are unsupported by the target, and - /// which are registered to use 'custom' lowering. This callback is invoked. + /// which are registered to use 'custom' lowering, this callback is invoked. /// If the target has no operations that require custom lowering, it need not /// implement this. The default implementation of this aborts. virtual SDOperand LowerOperation(SDOperand Op, SelectionDAG &DAG); + /// CustomPromoteOperation - For operations that are unsupported by the + /// target, are registered to use 'custom' lowering, and whose type needs to + /// be promoted, this callback is invoked. + virtual SDOperand CustomPromoteOperation(SDOperand Op, SelectionDAG &DAG); + /// getTargetNodeName() - This method returns the name of a target specific /// DAG node. virtual const char *getTargetNodeName(unsigned Opcode) const; From lattner at cs.uiuc.edu Fri Jan 27 21:37:01 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Fri, 27 Jan 2006 21:37:01 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/Target/TargetLowering.h Message-ID: <200601280337.VAA01782@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/Target: TargetLowering.h updated: 1.39 -> 1.40 --- Log message: add a new callback --- Diffs of the changes: (+12 -5) TargetLowering.h | 17 ++++++++++++----- 1 files changed, 12 insertions(+), 5 deletions(-) Index: llvm/include/llvm/Target/TargetLowering.h diff -u llvm/include/llvm/Target/TargetLowering.h:1.39 llvm/include/llvm/Target/TargetLowering.h:1.40 --- llvm/include/llvm/Target/TargetLowering.h:1.39 Fri Jan 27 21:14:31 2006 +++ llvm/include/llvm/Target/TargetLowering.h Fri Jan 27 21:36:49 2006 @@ -368,17 +368,24 @@ LowerFrameReturnAddress(bool isFrameAddr, SDOperand Chain, unsigned Depth, SelectionDAG &DAG); - /// LowerOperation - For operations that are unsupported by the target, and - /// which are registered to use 'custom' lowering, this callback is invoked. + /// LowerOperation - This callback is invoked for operations that are + /// unsupported by the target, which are registered to use 'custom' lowering, + /// and whose defined values are all legal. /// If the target has no operations that require custom lowering, it need not /// implement this. The default implementation of this aborts. virtual SDOperand LowerOperation(SDOperand Op, SelectionDAG &DAG); - /// CustomPromoteOperation - For operations that are unsupported by the - /// target, are registered to use 'custom' lowering, and whose type needs to - /// be promoted, this callback is invoked. + /// CustomPromoteOperation - This callback is invoked for operations that are + /// unsupported by the target, are registered to use 'custom' lowering, and + /// whose type needs to be promoted. virtual SDOperand CustomPromoteOperation(SDOperand Op, SelectionDAG &DAG); + /// CustomExpandOperation - This callback is invoked for operations that are + /// unsupported by the target, are registered to use 'custom' lowering, and + /// whose type needs to be expanded. + virtual void CustomExpandOperation(SDOperand Op, SDOperand &Lo, SDOperand &Hi, + SelectionDAG &DAG); + /// getTargetNodeName() - This method returns the name of a target specific /// DAG node. virtual const char *getTargetNodeName(unsigned Opcode) const; From lattner at cs.uiuc.edu Fri Jan 27 21:37:15 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Fri, 27 Jan 2006 21:37:15 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Message-ID: <200601280337.VAA01792@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/SelectionDAG: SelectionDAGISel.cpp updated: 1.140 -> 1.141 --- Log message: add a new callback --- Diffs of the changes: (+7 -0) SelectionDAGISel.cpp | 7 +++++++ 1 files changed, 7 insertions(+) Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.140 llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.141 --- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.140 Fri Jan 27 21:14:31 2006 +++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Fri Jan 27 21:37:03 2006 @@ -1288,6 +1288,13 @@ return SDOperand(); } +void TargetLowering::CustomExpandOperation(SDOperand Op, SDOperand &Lo, + SDOperand &Hi, SelectionDAG &DAG) { + assert(0 && "CustomExpandOperation not implemented for this target!"); + abort(); + return SDOperand(); +} + void SelectionDAGLowering::visitFrameReturnAddress(CallInst &I, bool isFrame) { unsigned Depth = (unsigned)cast(I.getOperand(1))->getValue(); std::pair Result = From lattner at cs.uiuc.edu Fri Jan 27 21:43:21 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Fri, 27 Jan 2006 21:43:21 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Message-ID: <200601280343.VAA01862@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/SelectionDAG: SelectionDAGISel.cpp updated: 1.141 -> 1.142 --- Log message: remove method I just added --- Diffs of the changes: (+0 -7) SelectionDAGISel.cpp | 7 ------- 1 files changed, 7 deletions(-) Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.141 llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.142 --- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.141 Fri Jan 27 21:37:03 2006 +++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Fri Jan 27 21:43:09 2006 @@ -1288,13 +1288,6 @@ return SDOperand(); } -void TargetLowering::CustomExpandOperation(SDOperand Op, SDOperand &Lo, - SDOperand &Hi, SelectionDAG &DAG) { - assert(0 && "CustomExpandOperation not implemented for this target!"); - abort(); - return SDOperand(); -} - void SelectionDAGLowering::visitFrameReturnAddress(CallInst &I, bool isFrame) { unsigned Depth = (unsigned)cast(I.getOperand(1))->getValue(); std::pair Result = From lattner at cs.uiuc.edu Fri Jan 27 21:43:45 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Fri, 27 Jan 2006 21:43:45 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/Target/TargetLowering.h Message-ID: <200601280343.VAA01895@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/Target: TargetLowering.h updated: 1.40 -> 1.41 --- Log message: remove this method I just added, now is not the time. --- Diffs of the changes: (+0 -6) TargetLowering.h | 6 ------ 1 files changed, 6 deletions(-) Index: llvm/include/llvm/Target/TargetLowering.h diff -u llvm/include/llvm/Target/TargetLowering.h:1.40 llvm/include/llvm/Target/TargetLowering.h:1.41 --- llvm/include/llvm/Target/TargetLowering.h:1.40 Fri Jan 27 21:36:49 2006 +++ llvm/include/llvm/Target/TargetLowering.h Fri Jan 27 21:43:33 2006 @@ -380,12 +380,6 @@ /// whose type needs to be promoted. virtual SDOperand CustomPromoteOperation(SDOperand Op, SelectionDAG &DAG); - /// CustomExpandOperation - This callback is invoked for operations that are - /// unsupported by the target, are registered to use 'custom' lowering, and - /// whose type needs to be expanded. - virtual void CustomExpandOperation(SDOperand Op, SDOperand &Lo, SDOperand &Hi, - SelectionDAG &DAG); - /// getTargetNodeName() - This method returns the name of a target specific /// DAG node. virtual const char *getTargetNodeName(unsigned Opcode) const; From lattner at cs.uiuc.edu Fri Jan 27 22:23:24 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Fri, 27 Jan 2006 22:23:24 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Message-ID: <200601280423.WAA02065@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/SelectionDAG: LegalizeDAG.cpp updated: 1.280 -> 1.281 --- Log message: Eliminate the need to do another iteration of the legalizer after inserting a libcall. --- Diffs of the changes: (+2 -3) LegalizeDAG.cpp | 5 ++--- 1 files changed, 2 insertions(+), 3 deletions(-) Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.280 llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.281 --- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.280 Fri Jan 27 21:14:31 2006 +++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Fri Jan 27 22:23:12 2006 @@ -2208,7 +2208,7 @@ // Floating point mod -> fmod libcall. const char *FnName = Node->getValueType(0) == MVT::f32 ? "fmodf":"fmod"; SDOperand Dummy; - Result = ExpandLibCall(FnName, Node, Dummy); + Result = LegalizeOp(ExpandLibCall(FnName, Node, Dummy)); } break; } @@ -2624,7 +2624,7 @@ default: assert(0 && "Unreachable!"); } SDOperand Dummy; - Result = ExpandLibCall(FnName, Node, Dummy); + Result = LegalizeOp(ExpandLibCall(FnName, Node, Dummy)); break; } default: @@ -3711,7 +3711,6 @@ } SpliceCallInto(CallInfo.second, OutChain); - NeedsAnotherIteration = true; return Result; } From lattner at cs.uiuc.edu Fri Jan 27 22:28:38 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Fri, 27 Jan 2006 22:28:38 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Message-ID: <200601280428.WAA02139@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/SelectionDAG: LegalizeDAG.cpp updated: 1.281 -> 1.282 --- Log message: Instead of making callers of ExpandLibCall legalize the result, make ExpandLibCall do it itself. --- Diffs of the changes: (+7 -6) LegalizeDAG.cpp | 13 +++++++------ 1 files changed, 7 insertions(+), 6 deletions(-) Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.281 llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.282 --- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.281 Fri Jan 27 22:23:12 2006 +++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Fri Jan 27 22:28:26 2006 @@ -2208,7 +2208,7 @@ // Floating point mod -> fmod libcall. const char *FnName = Node->getValueType(0) == MVT::f32 ? "fmodf":"fmod"; SDOperand Dummy; - Result = LegalizeOp(ExpandLibCall(FnName, Node, Dummy)); + Result = ExpandLibCall(FnName, Node, Dummy); } break; } @@ -2624,7 +2624,7 @@ default: assert(0 && "Unreachable!"); } SDOperand Dummy; - Result = LegalizeOp(ExpandLibCall(FnName, Node, Dummy)); + Result = ExpandLibCall(FnName, Node, Dummy); break; } default: @@ -3700,16 +3700,17 @@ switch (getTypeAction(CallInfo.first.getValueType())) { default: assert(0 && "Unknown thing"); case Legal: - Result = CallInfo.first; + // If the result is legal, make sure that we relegalize the inserted result. + Result = LegalizeOp(CallInfo.first); break; case Promote: assert(0 && "Cannot promote this yet!"); case Expand: ExpandOp(CallInfo.first, Result, Hi); - CallInfo.second = LegalizeOp(CallInfo.second); break; } - + + CallInfo.second = LegalizeOp(CallInfo.second); SpliceCallInto(CallInfo.second, OutChain); return Result; } @@ -4415,7 +4416,7 @@ } Lo = DAG.getNode(ISD::MUL, NVT, LL, RL); } else { - Lo = ExpandLibCall("__muldi3" , Node, Hi); break; + Lo = ExpandLibCall("__muldi3" , Node, Hi); } break; } From lattner at cs.uiuc.edu Fri Jan 27 23:08:03 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Fri, 27 Jan 2006 23:08:03 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Message-ID: <200601280508.XAA02330@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/SelectionDAG: LegalizeDAG.cpp updated: 1.282 -> 1.283 --- Log message: Eliminate the need for ExpandOp to set 'needsanotheriteration', as it already relegalizes the stuff it returns. Add the ability to custom expand ADD/SUB, so that targets don't need to deal with ADD_PARTS/SUB_PARTS if they don't want. Fix some obscure potential bugs and simplify code. --- Diffs of the changes: (+80 -131) LegalizeDAG.cpp | 211 +++++++++++++++++++++----------------------------------- 1 files changed, 80 insertions(+), 131 deletions(-) Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.282 llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.283 --- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.282 Fri Jan 27 22:28:26 2006 +++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Fri Jan 27 23:07:51 2006 @@ -143,9 +143,6 @@ SDOperand &Lo, SDOperand &Hi); void ExpandShiftParts(unsigned NodeOp, SDOperand Op, SDOperand Amt, SDOperand &Lo, SDOperand &Hi); - void ExpandByParts(unsigned NodeOp, SDOperand LHS, SDOperand RHS, - SDOperand &Lo, SDOperand &Hi); - void SpliceCallInto(const SDOperand &CallResult, SDNode *OutChain); SDOperand getIntPtrConstant(uint64_t Val) { @@ -3335,26 +3332,6 @@ return DAG.getLoad(DestVT, Store, FIPtr, DAG.getSrcValue(0)); } -/// ExpandAddSub - Find a clever way to expand this add operation into -/// subcomponents. -void SelectionDAGLegalize:: -ExpandByParts(unsigned NodeOp, SDOperand LHS, SDOperand RHS, - SDOperand &Lo, SDOperand &Hi) { - // Expand the subcomponents. - SDOperand LHSL, LHSH, RHSL, RHSH; - ExpandOp(LHS, LHSL, LHSH); - ExpandOp(RHS, RHSL, RHSH); - - std::vector Ops; - Ops.push_back(LHSL); - Ops.push_back(LHSH); - Ops.push_back(RHSL); - Ops.push_back(RHSH); - std::vector VTs(2, LHSL.getValueType()); - Lo = DAG.getNode(NodeOp, VTs, Ops); - Hi = Lo.getValue(1); -} - void SelectionDAGLegalize::ExpandShiftParts(unsigned NodeOp, SDOperand Op, SDOperand Amt, SDOperand &Lo, SDOperand &Hi) { @@ -3841,11 +3818,6 @@ return; } - // Expanding to multiple registers needs to perform an optimization step, and - // is not careful to avoid operations the target does not support. Make sure - // that all generated operations are legalized in the next iteration. - NeedsAnotherIteration = true; - switch (Node->getOpcode()) { case ISD::CopyFromReg: assert(0 && "CopyFromReg must be legal!"); @@ -3887,11 +3859,9 @@ } case ISD::BUILD_PAIR: - // Legalize both operands. FIXME: in the future we should handle the case - // where the two elements are not legal. - assert(isTypeLegal(NVT) && "Cannot expand this multiple times yet!"); - Lo = LegalizeOp(Node->getOperand(0)); - Hi = LegalizeOp(Node->getOperand(1)); + // Return the operands. + Lo = Node->getOperand(0); + Hi = Node->getOperand(1); break; case ISD::SIGN_EXTEND_INREG: @@ -3951,12 +3921,13 @@ } case ISD::VAARG: { - SDOperand Ch = LegalizeOp(Node->getOperand(0)); // Legalize the chain. - SDOperand Ptr = LegalizeOp(Node->getOperand(1)); // Legalize the pointer. + SDOperand Ch = Node->getOperand(0); // Legalize the chain. + SDOperand Ptr = Node->getOperand(1); // Legalize the pointer. Lo = DAG.getVAArg(NVT, Ch, Ptr, Node->getOperand(2)); Hi = DAG.getVAArg(NVT, Lo.getValue(1), Ptr, Node->getOperand(2)); // Remember that we legalized the chain. + Hi = LegalizeOp(Hi); AddLegalizedOperand(Op.getValue(1), Hi.getValue(1)); if (!TLI.isLittleEndian()) std::swap(Lo, Hi); @@ -3964,16 +3935,15 @@ } case ISD::LOAD: { - SDOperand Ch = LegalizeOp(Node->getOperand(0)); // Legalize the chain. - SDOperand Ptr = LegalizeOp(Node->getOperand(1)); // Legalize the pointer. + SDOperand Ch = Node->getOperand(0); // Legalize the chain. + SDOperand Ptr = Node->getOperand(1); // Legalize the pointer. Lo = DAG.getLoad(NVT, Ch, Ptr, Node->getOperand(2)); // Increment the pointer to the other half. unsigned IncrementSize = MVT::getSizeInBits(Lo.getValueType())/8; Ptr = DAG.getNode(ISD::ADD, Ptr.getValueType(), Ptr, getIntPtrConstant(IncrementSize)); - //Is this safe? declaring that the two parts of the split load - //are from the same instruction? + // FIXME: This creates a bogus srcvalue! Hi = DAG.getLoad(NVT, Ch, Ptr, Node->getOperand(2)); // Build a factor node to remember that this load is independent of the @@ -3982,14 +3952,14 @@ Hi.getValue(1)); // Remember that we legalized the chain. - AddLegalizedOperand(Op.getValue(1), TF); + AddLegalizedOperand(Op.getValue(1), LegalizeOp(TF)); if (!TLI.isLittleEndian()) std::swap(Lo, Hi); break; } case ISD::VLOAD: { - SDOperand Ch = LegalizeOp(Node->getOperand(0)); // Legalize the chain. - SDOperand Ptr = LegalizeOp(Node->getOperand(1)); // Legalize the pointer. + SDOperand Ch = Node->getOperand(0); // Legalize the chain. + SDOperand Ptr = Node->getOperand(1); // Legalize the pointer. unsigned NumElements =cast(Node->getOperand(2))->getValue(); MVT::ValueType EVT = cast(Node->getOperand(3))->getVT(); @@ -4002,8 +3972,7 @@ unsigned IncrementSize = MVT::getSizeInBits(EVT)/8; Ptr = DAG.getNode(ISD::ADD, Ptr.getValueType(), Ptr, getIntPtrConstant(IncrementSize)); - //Is this safe? declaring that the two parts of the split load - //are from the same instruction? + // FIXME: This creates a bogus srcvalue! Hi = DAG.getLoad(EVT, Ch, Ptr, Node->getOperand(4)); } else { NumElements /= 2; // Split the vector in half @@ -4011,8 +3980,7 @@ unsigned IncrementSize = NumElements * MVT::getSizeInBits(EVT)/8; Ptr = DAG.getNode(ISD::ADD, Ptr.getValueType(), Ptr, getIntPtrConstant(IncrementSize)); - //Is this safe? declaring that the two parts of the split load - //are from the same instruction? + // FIXME: This creates a bogus srcvalue! Hi = DAG.getVecLoad(NumElements, EVT, Ch, Ptr, Node->getOperand(4)); } @@ -4022,7 +3990,7 @@ Hi.getValue(1)); // Remember that we legalized the chain. - AddLegalizedOperand(Op.getValue(1), TF); + AddLegalizedOperand(Op.getValue(1), LegalizeOp(TF)); if (!TLI.isLittleEndian()) std::swap(Lo, Hi); break; @@ -4088,13 +4056,11 @@ Node->getOperand(1), TL, FL, Node->getOperand(4)); Hi = DAG.getNode(ISD::SELECT_CC, NVT, Node->getOperand(0), Node->getOperand(1), TH, FH, Node->getOperand(4)); - Lo = LegalizeOp(Lo); - Hi = LegalizeOp(Hi); break; } case ISD::SEXTLOAD: { - SDOperand Chain = LegalizeOp(Node->getOperand(0)); - SDOperand Ptr = LegalizeOp(Node->getOperand(1)); + SDOperand Chain = Node->getOperand(0); + SDOperand Ptr = Node->getOperand(1); MVT::ValueType EVT = cast(Node->getOperand(3))->getVT(); if (EVT == NVT) @@ -4104,20 +4070,18 @@ EVT); // Remember that we legalized the chain. - AddLegalizedOperand(SDOperand(Node, 1), Lo.getValue(1)); + AddLegalizedOperand(SDOperand(Node, 1), LegalizeOp(Lo.getValue(1))); // The high part is obtained by SRA'ing all but one of the bits of the lo // part. unsigned LoSize = MVT::getSizeInBits(Lo.getValueType()); Hi = DAG.getNode(ISD::SRA, NVT, Lo, DAG.getConstant(LoSize-1, TLI.getShiftAmountTy())); - Lo = LegalizeOp(Lo); - Hi = LegalizeOp(Hi); break; } case ISD::ZEXTLOAD: { - SDOperand Chain = LegalizeOp(Node->getOperand(0)); - SDOperand Ptr = LegalizeOp(Node->getOperand(1)); + SDOperand Chain = Node->getOperand(0); + SDOperand Ptr = Node->getOperand(1); MVT::ValueType EVT = cast(Node->getOperand(3))->getVT(); if (EVT == NVT) @@ -4127,16 +4091,15 @@ EVT); // Remember that we legalized the chain. - AddLegalizedOperand(SDOperand(Node, 1), Lo.getValue(1)); + AddLegalizedOperand(SDOperand(Node, 1), LegalizeOp(Lo.getValue(1))); // The high part is just a zero. - Hi = LegalizeOp(DAG.getConstant(0, NVT)); - Lo = LegalizeOp(Lo); + Hi = DAG.getConstant(0, NVT); break; } case ISD::EXTLOAD: { - SDOperand Chain = LegalizeOp(Node->getOperand(0)); - SDOperand Ptr = LegalizeOp(Node->getOperand(1)); + SDOperand Chain = Node->getOperand(0); + SDOperand Ptr = Node->getOperand(1); MVT::ValueType EVT = cast(Node->getOperand(3))->getVT(); if (EVT == NVT) @@ -4146,73 +4109,38 @@ EVT); // Remember that we legalized the chain. - AddLegalizedOperand(SDOperand(Node, 1), Lo.getValue(1)); + AddLegalizedOperand(SDOperand(Node, 1), LegalizeOp(Lo.getValue(1))); // The high part is undefined. - Hi = LegalizeOp(DAG.getNode(ISD::UNDEF, NVT)); - Lo = LegalizeOp(Lo); + Hi = DAG.getNode(ISD::UNDEF, NVT); break; } - case ISD::ANY_EXTEND: { - SDOperand In; - switch (getTypeAction(Node->getOperand(0).getValueType())) { - case Expand: assert(0 && "expand-expand not implemented yet!"); - case Legal: In = LegalizeOp(Node->getOperand(0)); break; - case Promote: - In = PromoteOp(Node->getOperand(0)); - break; - } - + case ISD::ANY_EXTEND: // The low part is any extension of the input (which degenerates to a copy). - Lo = DAG.getNode(ISD::ANY_EXTEND, NVT, In); + Lo = DAG.getNode(ISD::ANY_EXTEND, NVT, Node->getOperand(0)); // The high part is undefined. Hi = DAG.getNode(ISD::UNDEF, NVT); break; - } case ISD::SIGN_EXTEND: { - SDOperand In; - switch (getTypeAction(Node->getOperand(0).getValueType())) { - case Expand: assert(0 && "expand-expand not implemented yet!"); - case Legal: In = LegalizeOp(Node->getOperand(0)); break; - case Promote: - In = PromoteOp(Node->getOperand(0)); - // Emit the appropriate sign_extend_inreg to get the value we want. - In = DAG.getNode(ISD::SIGN_EXTEND_INREG, In.getValueType(), In, - DAG.getValueType(Node->getOperand(0).getValueType())); - break; - } - // The low part is just a sign extension of the input (which degenerates to // a copy). - Lo = DAG.getNode(ISD::SIGN_EXTEND, NVT, In); + Lo = DAG.getNode(ISD::SIGN_EXTEND, NVT, Node->getOperand(0)); // The high part is obtained by SRA'ing all but one of the bits of the lo // part. unsigned LoSize = MVT::getSizeInBits(Lo.getValueType()); - Hi = DAG.getNode(ISD::SRA, NVT, Lo, DAG.getConstant(LoSize-1, - TLI.getShiftAmountTy())); + Hi = DAG.getNode(ISD::SRA, NVT, Lo, + DAG.getConstant(LoSize-1, TLI.getShiftAmountTy())); break; } - case ISD::ZERO_EXTEND: { - SDOperand In; - switch (getTypeAction(Node->getOperand(0).getValueType())) { - case Expand: assert(0 && "expand-expand not implemented yet!"); - case Legal: In = LegalizeOp(Node->getOperand(0)); break; - case Promote: - In = PromoteOp(Node->getOperand(0)); - // Emit the appropriate zero_extend_inreg to get the value we want. - In = DAG.getZeroExtendInReg(In, Node->getOperand(0).getValueType()); - break; - } - + case ISD::ZERO_EXTEND: // The low part is just a zero extension of the input (which degenerates to // a copy). - Lo = DAG.getNode(ISD::ZERO_EXTEND, NVT, In); + Lo = DAG.getNode(ISD::ZERO_EXTEND, NVT, Node->getOperand(0)); // The high part is just a zero. Hi = DAG.getConstant(0, NVT); break; - } case ISD::BIT_CONVERT: { SDOperand Tmp = ExpandBIT_CONVERT(Node->getValueType(0), @@ -4221,18 +4149,16 @@ break; } - case ISD::READCYCLECOUNTER: { + case ISD::READCYCLECOUNTER: assert(TLI.getOperationAction(ISD::READCYCLECOUNTER, VT) == TargetLowering::Custom && "Must custom expand ReadCycleCounter"); - SDOperand T = TLI.LowerOperation(Op, DAG); - assert(T.Val && "Node must be custom expanded!"); - Lo = LegalizeOp(T.getValue(0)); - Hi = LegalizeOp(T.getValue(1)); + Lo = TLI.LowerOperation(Op, DAG); + assert(Lo.Val && "Node must be custom expanded!"); + Hi = Lo.getValue(1); AddLegalizedOperand(SDOperand(Node, 1), // Remember we legalized the chain. - LegalizeOp(T.getValue(2))); + LegalizeOp(Lo.getValue(2))); break; - } // These operators cannot be expanded directly, emit them as calls to // library functions. @@ -4241,8 +4167,8 @@ SDOperand Op; switch (getTypeAction(Node->getOperand(0).getValueType())) { case Expand: assert(0 && "cannot expand FP!"); - case Legal: Op = LegalizeOp(Node->getOperand(0)); break; - case Promote: Op = PromoteOp(Node->getOperand(0)); break; + case Legal: Op = LegalizeOp(Node->getOperand(0)); break; + case Promote: Op = PromoteOp (Node->getOperand(0)); break; } Op = TLI.LowerOperation(DAG.getNode(ISD::FP_TO_SINT, VT, Op), DAG); @@ -4263,11 +4189,16 @@ case ISD::FP_TO_UINT: if (TLI.getOperationAction(ISD::FP_TO_UINT, VT) == TargetLowering::Custom) { - SDOperand Op = DAG.getNode(ISD::FP_TO_UINT, VT, - LegalizeOp(Node->getOperand(0))); - // Now that the custom expander is done, expand the result, which is still - // VT. - Op = TLI.LowerOperation(Op, DAG); + SDOperand Op; + switch (getTypeAction(Node->getOperand(0).getValueType())) { + case Expand: assert(0 && "cannot expand FP!"); + case Legal: Op = LegalizeOp(Node->getOperand(0)); break; + case Promote: Op = PromoteOp (Node->getOperand(0)); break; + } + + Op = TLI.LowerOperation(DAG.getNode(ISD::FP_TO_UINT, VT, Op), DAG); + + // Now that the custom expander is done, expand the result. if (Op.Val) { ExpandOp(Op, Lo, Hi); break; @@ -4284,8 +4215,7 @@ // If the target wants custom lowering, do so. SDOperand ShiftAmt = LegalizeOp(Node->getOperand(1)); if (TLI.getOperationAction(ISD::SHL, VT) == TargetLowering::Custom) { - SDOperand Op = DAG.getNode(ISD::SHL, VT, Node->getOperand(0), - ShiftAmt); + SDOperand Op = DAG.getNode(ISD::SHL, VT, Node->getOperand(0), ShiftAmt); Op = TLI.LowerOperation(Op, DAG); if (Op.Val) { // Now that the custom expander is done, expand the result, which is @@ -4317,8 +4247,7 @@ // If the target wants custom lowering, do so. SDOperand ShiftAmt = LegalizeOp(Node->getOperand(1)); if (TLI.getOperationAction(ISD::SRA, VT) == TargetLowering::Custom) { - SDOperand Op = DAG.getNode(ISD::SRA, VT, Node->getOperand(0), - ShiftAmt); + SDOperand Op = DAG.getNode(ISD::SRA, VT, Node->getOperand(0), ShiftAmt); Op = TLI.LowerOperation(Op, DAG); if (Op.Val) { // Now that the custom expander is done, expand the result, which is @@ -4350,8 +4279,7 @@ // If the target wants custom lowering, do so. SDOperand ShiftAmt = LegalizeOp(Node->getOperand(1)); if (TLI.getOperationAction(ISD::SRL, VT) == TargetLowering::Custom) { - SDOperand Op = DAG.getNode(ISD::SRL, VT, Node->getOperand(0), - ShiftAmt); + SDOperand Op = DAG.getNode(ISD::SRL, VT, Node->getOperand(0), ShiftAmt); Op = TLI.LowerOperation(Op, DAG); if (Op.Val) { // Now that the custom expander is done, expand the result, which is @@ -4380,13 +4308,34 @@ } case ISD::ADD: - ExpandByParts(ISD::ADD_PARTS, Node->getOperand(0), Node->getOperand(1), - Lo, Hi); - break; - case ISD::SUB: - ExpandByParts(ISD::SUB_PARTS, Node->getOperand(0), Node->getOperand(1), - Lo, Hi); + case ISD::SUB: { + // If the target wants to custom expand this, let them. + if (TLI.getOperationAction(Node->getOpcode(), VT) == + TargetLowering::Custom) { + Op = TLI.LowerOperation(Op, DAG); + if (Op.Val) { + ExpandOp(Op, Lo, Hi); + break; + } + } + + // Expand the subcomponents. + SDOperand LHSL, LHSH, RHSL, RHSH; + ExpandOp(Node->getOperand(0), LHSL, LHSH); + ExpandOp(Node->getOperand(1), RHSL, RHSH); + + std::vector Ops; + Ops.push_back(LHSL); + Ops.push_back(LHSH); + Ops.push_back(RHSL); + Ops.push_back(RHSH); + std::vector VTs(2, LHSL.getValueType()); + unsigned Opc = + Node->getOpcode() == ISD::ADD ? ISD::ADD_PARTS : ISD::SUB_PARTS; + Lo = DAG.getNode(Opc, VTs, Ops); + Hi = Lo.getValue(1); break; + } case ISD::MUL: { if (TLI.isOperationLegal(ISD::MULHU, NVT)) { SDOperand LL, LH, RL, RH; From lattner at cs.uiuc.edu Fri Jan 27 23:40:58 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Fri, 27 Jan 2006 23:40:58 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCSubtarget.cpp README.txt Message-ID: <200601280540.XAA02537@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/PowerPC: PPCSubtarget.cpp updated: 1.16 -> 1.17 README.txt updated: 1.47 -> 1.48 --- Log message: add a note about how we should implement this FIXME from the legalizer: // FIXME: revisit this when we have some kind of mechanism by which targets // can decided legality of vector constants, of which there may be very // many. --- Diffs of the changes: (+7 -1) PPCSubtarget.cpp | 2 +- README.txt | 6 ++++++ 2 files changed, 7 insertions(+), 1 deletion(-) Index: llvm/lib/Target/PowerPC/PPCSubtarget.cpp diff -u llvm/lib/Target/PowerPC/PPCSubtarget.cpp:1.16 llvm/lib/Target/PowerPC/PPCSubtarget.cpp:1.17 --- llvm/lib/Target/PowerPC/PPCSubtarget.cpp:1.16 Thu Nov 17 12:55:48 2005 +++ llvm/lib/Target/PowerPC/PPCSubtarget.cpp Fri Jan 27 23:40:47 2006 @@ -1,4 +1,4 @@ -//===- PowerPCSubtarget.cpp - PPC Subtarget Information ---------*- C++ -*-===// +//===- PowerPCSubtarget.cpp - PPC Subtarget Information -------------------===// // // The LLVM Compiler Infrastructure // Index: llvm/lib/Target/PowerPC/README.txt diff -u llvm/lib/Target/PowerPC/README.txt:1.47 llvm/lib/Target/PowerPC/README.txt:1.48 --- llvm/lib/Target/PowerPC/README.txt:1.47 Fri Jan 27 19:22:10 2006 +++ llvm/lib/Target/PowerPC/README.txt Fri Jan 27 23:40:47 2006 @@ -396,3 +396,9 @@ Generate lwbrx and other byteswapping load/store instructions when reasonable. +===-------------------------------------------------------------------------=== + +Implement TargetConstantVec, and set up PPC to custom lower ConstantVec into +TargetConstantVec's if it's one of the many forms that are algorithmically +computable using the spiffy altivec instructions. + From lattner at cs.uiuc.edu Sat Jan 28 00:05:53 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Sat, 28 Jan 2006 00:05:53 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86Subtarget.cpp Message-ID: <200601280605.AAA02673@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: X86Subtarget.cpp updated: 1.14 -> 1.15 --- Log message: make this work on non-native hosts --- Diffs of the changes: (+7 -3) X86Subtarget.cpp | 10 +++++++--- 1 files changed, 7 insertions(+), 3 deletions(-) Index: llvm/lib/Target/X86/X86Subtarget.cpp diff -u llvm/lib/Target/X86/X86Subtarget.cpp:1.14 llvm/lib/Target/X86/X86Subtarget.cpp:1.15 --- llvm/lib/Target/X86/X86Subtarget.cpp:1.14 Fri Jan 27 16:37:09 2006 +++ llvm/lib/Target/X86/X86Subtarget.cpp Sat Jan 28 00:05:41 2006 @@ -23,7 +23,9 @@ cl::desc("Enable sse on X86")); } -static void GetCpuIDAndInfo(unsigned value, unsigned *EAX, unsigned *EBX, +/// GetCpuIDAndInfo - Execute the specified cpuid and return the 4 values in the +/// specified arguments. If we can't run cpuid on the host, return true. +static bool GetCpuIDAndInfo(unsigned value, unsigned *EAX, unsigned *EBX, unsigned *ECX, unsigned *EDX) { #if defined(i386) || defined(__i386__) || defined(__x86__) || defined(_M_IX86) #if defined(__GNUC__) @@ -36,13 +38,16 @@ "=c" (*ECX), "=d" (*EDX) : "a" (value)); + return false; #endif #endif + return true; } static const char *GetCurrentX86CPU() { unsigned EAX = 0, EBX = 0, ECX = 0, EDX = 0; - GetCpuIDAndInfo(0x1, &EAX, &EBX, &ECX, &EDX); + if (GetCpuIDAndInfo(0x1, &EAX, &EBX, &ECX, &EDX)) + return "generic"; unsigned Family = (EAX & (0xffffffff >> (32 - 4)) << 8) >> 8; // Bits 8 - 11 unsigned Model = (EAX & (0xffffffff >> (32 - 4)) << 4) >> 4; // Bits 4 - 7 GetCpuIDAndInfo(0x80000001, &EAX, &EBX, &ECX, &EDX); @@ -58,7 +63,6 @@ case 4: return "pentium-mmx"; default: return "pentium"; } - break; case 6: switch (Model) { case 1: return "pentiumpro"; From lattner at cs.uiuc.edu Sat Jan 28 01:33:15 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Sat, 28 Jan 2006 01:33:15 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelLowering.cpp Message-ID: <200601280733.BAA02990@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/PowerPC: PPCISelLowering.cpp updated: 1.74 -> 1.75 --- Log message: Fix a bug in my elimination of ISD::CALL this morning. PPC now has to provide the expansion for i64 calls itself --- Diffs of the changes: (+9 -2) PPCISelLowering.cpp | 11 +++++++++-- 1 files changed, 9 insertions(+), 2 deletions(-) Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.74 llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.75 --- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.74 Fri Jan 27 17:34:02 2006 +++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp Sat Jan 28 01:33:03 2006 @@ -173,6 +173,7 @@ case PPCISD::SRL: return "PPCISD::SRL"; case PPCISD::SRA: return "PPCISD::SRA"; case PPCISD::SHL: return "PPCISD::SHL"; + case PPCISD::CALL: return "PPCISD::CALL"; case PPCISD::RET_FLAG: return "PPCISD::RET_FLAG"; } } @@ -835,8 +836,12 @@ if (RetTyVT >= MVT::i1 && RetTyVT <= MVT::i16) ActualRetTyVT = MVT::i32; // Promote result to i32. - if (RetTyVT != MVT::isVoid) + if (RetTyVT == MVT::i64) { + RetVals.push_back(MVT::i32); + RetVals.push_back(MVT::i32); + } else if (RetTyVT != MVT::isVoid) { RetVals.push_back(ActualRetTyVT); + } RetVals.push_back(MVT::Other); // If the callee is a GlobalAddress node (quite common, every direct call is) @@ -849,7 +854,7 @@ Ops.push_back(Callee); Ops.insert(Ops.end(), args_to_use.begin(), args_to_use.end()); SDOperand TheCall = DAG.getNode(PPCISD::CALL, RetVals, Ops); - Chain = TheCall.getValue(RetTyVT != MVT::isVoid); + Chain = TheCall.getValue(TheCall.Val->getNumValues()-1); Chain = DAG.getNode(ISD::CALLSEQ_END, MVT::Other, Chain, DAG.getConstant(NumBytes, getPointerTy())); SDOperand RetVal = TheCall; @@ -860,6 +865,8 @@ RetVal = DAG.getNode(RetTy->isSigned() ? ISD::AssertSext : ISD::AssertZext, MVT::i32, RetVal, DAG.getValueType(RetTyVT)); RetVal = DAG.getNode(ISD::TRUNCATE, RetTyVT, RetVal); + } else if (RetTyVT == MVT::i64) { + RetVal = DAG.getNode(ISD::BUILD_PAIR, MVT::i64, RetVal, RetVal.getValue(1)); } return std::make_pair(RetVal, Chain); From lattner at cs.uiuc.edu Sat Jan 28 01:39:42 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Sat, 28 Jan 2006 01:39:42 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Message-ID: <200601280739.BAA03084@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/SelectionDAG: LegalizeDAG.cpp updated: 1.283 -> 1.284 --- Log message: Several major changes: 1. Pull out the expand cases for BSWAP and CT* into a separate function, reducing the size of LegalizeOp. 2. Fix a bug where expand(bswap i64) was wrong when i64 is legal. 3. Changed LegalizeOp/PromoteOp so that the legalizer never needs to be iterative. It now operates in a single pass over the nodes. 4. Simplify a LOT of code, with a net reduction of ~280 lines. --- Diffs of the changes: (+487 -763) LegalizeDAG.cpp | 1250 +++++++++++++++++++++----------------------------------- 1 files changed, 487 insertions(+), 763 deletions(-) Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.283 llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.284 --- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.283 Fri Jan 27 23:07:51 2006 +++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Sat Jan 28 01:39:30 2006 @@ -54,12 +54,6 @@ /// This can be queried with "getTypeAction(VT)". unsigned long long ValueTypeActions; - /// NeedsAnotherIteration - This is set when we expand a large integer - /// operation into smaller integer operations, but the smaller operations are - /// not set. This occurs only rarely in practice, for targets that don't have - /// 32-bit or larger integer registers. - bool NeedsAnotherIteration; - /// LegalizedNodes - For nodes that are of legal width, and that have more /// than one use, this map indicates what regularized operand to use. This /// allows us to avoid legalizing the same thing more than once. @@ -93,18 +87,6 @@ SelectionDAGLegalize(SelectionDAG &DAG); - /// Run - While there is still lowering to do, perform a pass over the DAG. - /// Most regularization can be done in a single pass, but targets that require - /// large values to be split into registers multiple times (e.g. i64 -> 4x - /// i16) require iteration for these values (the first iteration will demote - /// to i32, the second will demote to i16). - void Run() { - do { - NeedsAnotherIteration = false; - LegalizeDAG(); - } while (NeedsAnotherIteration); - } - /// getTypeAction - Return how we should legalize values of this type, either /// it is already legal or we need to expand it into multiple registers of /// smaller integer type, or we need to promote it to a larger type. @@ -118,9 +100,10 @@ return getTypeAction(VT) == Legal; } -private: void LegalizeDAG(); +private: + SDOperand LegalizeOp(SDOperand O); void ExpandOp(SDOperand O, SDOperand &Lo, SDOperand &Hi); SDOperand PromoteOp(SDOperand O); @@ -139,6 +122,8 @@ SDOperand PromoteLegalFP_TO_INT(SDOperand LegalOp, MVT::ValueType DestVT, bool isSigned); + SDOperand ExpandBSWAP(SDOperand Op); + SDOperand ExpandBitCount(unsigned Opc, SDOperand Op); bool ExpandShift(unsigned Opc, SDOperand Op, SDOperand Amt, SDOperand &Lo, SDOperand &Hi); void ExpandShiftParts(unsigned NodeOp, SDOperand Op, SDOperand Amt, @@ -384,6 +369,119 @@ return LegalizeOp(N); } +/// ExpandBSWAP - Open code the operations for BSWAP of the specified operation. +/// +SDOperand SelectionDAGLegalize::ExpandBSWAP(SDOperand Op) { + MVT::ValueType VT = Op.getValueType(); + MVT::ValueType SHVT = TLI.getShiftAmountTy(); + SDOperand Tmp1, Tmp2, Tmp3, Tmp4, Tmp5, Tmp6, Tmp7, Tmp8; + switch (VT) { + default: assert(0 && "Unhandled Expand type in BSWAP!"); abort(); + case MVT::i16: + Tmp2 = DAG.getNode(ISD::SHL, VT, Op, DAG.getConstant(8, SHVT)); + Tmp1 = DAG.getNode(ISD::SRL, VT, Op, DAG.getConstant(8, SHVT)); + return DAG.getNode(ISD::OR, VT, Tmp1, Tmp2); + case MVT::i32: + Tmp4 = DAG.getNode(ISD::SHL, VT, Op, DAG.getConstant(24, SHVT)); + Tmp3 = DAG.getNode(ISD::SHL, VT, Op, DAG.getConstant(8, SHVT)); + Tmp2 = DAG.getNode(ISD::SRL, VT, Op, DAG.getConstant(8, SHVT)); + Tmp1 = DAG.getNode(ISD::SRL, VT, Op, DAG.getConstant(24, SHVT)); + Tmp3 = DAG.getNode(ISD::AND, VT, Tmp3, DAG.getConstant(0xFF0000, VT)); + Tmp2 = DAG.getNode(ISD::AND, VT, Tmp2, DAG.getConstant(0xFF00, VT)); + Tmp4 = DAG.getNode(ISD::OR, VT, Tmp4, Tmp3); + Tmp2 = DAG.getNode(ISD::OR, VT, Tmp2, Tmp1); + return DAG.getNode(ISD::OR, VT, Tmp4, Tmp2); + case MVT::i64: + Tmp8 = DAG.getNode(ISD::SHL, VT, Op, DAG.getConstant(56, SHVT)); + Tmp7 = DAG.getNode(ISD::SHL, VT, Op, DAG.getConstant(40, SHVT)); + Tmp6 = DAG.getNode(ISD::SHL, VT, Op, DAG.getConstant(24, SHVT)); + Tmp5 = DAG.getNode(ISD::SHL, VT, Op, DAG.getConstant(8, SHVT)); + Tmp4 = DAG.getNode(ISD::SRL, VT, Op, DAG.getConstant(8, SHVT)); + Tmp3 = DAG.getNode(ISD::SRL, VT, Op, DAG.getConstant(24, SHVT)); + Tmp2 = DAG.getNode(ISD::SRL, VT, Op, DAG.getConstant(40, SHVT)); + Tmp1 = DAG.getNode(ISD::SRL, VT, Op, DAG.getConstant(56, SHVT)); + Tmp7 = DAG.getNode(ISD::AND, VT, Tmp7, DAG.getConstant(255ULL<<48, VT)); + Tmp6 = DAG.getNode(ISD::AND, VT, Tmp6, DAG.getConstant(255ULL<<40, VT)); + Tmp5 = DAG.getNode(ISD::AND, VT, Tmp5, DAG.getConstant(255ULL<<32, VT)); + Tmp4 = DAG.getNode(ISD::AND, VT, Tmp4, DAG.getConstant(255ULL<<24, VT)); + Tmp3 = DAG.getNode(ISD::AND, VT, Tmp3, DAG.getConstant(255ULL<<16, VT)); + Tmp2 = DAG.getNode(ISD::AND, VT, Tmp2, DAG.getConstant(255ULL<<8 , VT)); + Tmp8 = DAG.getNode(ISD::OR, VT, Tmp8, Tmp7); + Tmp6 = DAG.getNode(ISD::OR, VT, Tmp6, Tmp5); + Tmp4 = DAG.getNode(ISD::OR, VT, Tmp4, Tmp3); + Tmp2 = DAG.getNode(ISD::OR, VT, Tmp2, Tmp1); + Tmp8 = DAG.getNode(ISD::OR, VT, Tmp8, Tmp6); + Tmp4 = DAG.getNode(ISD::OR, VT, Tmp4, Tmp2); + return DAG.getNode(ISD::OR, VT, Tmp8, Tmp4); + } +} + +/// ExpandBitCount - Expand the specified bitcount instruction into operations. +/// +SDOperand SelectionDAGLegalize::ExpandBitCount(unsigned Opc, SDOperand Op) { + switch (Opc) { + default: assert(0 && "Cannot expand this yet!"); + case ISD::CTPOP: { + static const uint64_t mask[6] = { + 0x5555555555555555ULL, 0x3333333333333333ULL, + 0x0F0F0F0F0F0F0F0FULL, 0x00FF00FF00FF00FFULL, + 0x0000FFFF0000FFFFULL, 0x00000000FFFFFFFFULL + }; + MVT::ValueType VT = Op.getValueType(); + MVT::ValueType ShVT = TLI.getShiftAmountTy(); + unsigned len = getSizeInBits(VT); + for (unsigned i = 0; (1U << i) <= (len / 2); ++i) { + //x = (x & mask[i][len/8]) + (x >> (1 << i) & mask[i][len/8]) + SDOperand Tmp2 = DAG.getConstant(mask[i], VT); + SDOperand Tmp3 = DAG.getConstant(1ULL << i, ShVT); + Op = DAG.getNode(ISD::ADD, VT, DAG.getNode(ISD::AND, VT, Op, Tmp2), + DAG.getNode(ISD::AND, VT, + DAG.getNode(ISD::SRL, VT, Op, Tmp3),Tmp2)); + } + return Op; + } + case ISD::CTLZ: { + // for now, we do this: + // x = x | (x >> 1); + // x = x | (x >> 2); + // ... + // x = x | (x >>16); + // x = x | (x >>32); // for 64-bit input + // return popcount(~x); + // + // but see also: http://www.hackersdelight.org/HDcode/nlz.cc + MVT::ValueType VT = Op.getValueType(); + MVT::ValueType ShVT = TLI.getShiftAmountTy(); + unsigned len = getSizeInBits(VT); + for (unsigned i = 0; (1U << i) <= (len / 2); ++i) { + SDOperand Tmp3 = DAG.getConstant(1ULL << i, ShVT); + Op = DAG.getNode(ISD::OR, VT, Op, DAG.getNode(ISD::SRL, VT, Op, Tmp3)); + } + Op = DAG.getNode(ISD::XOR, VT, Op, DAG.getConstant(~0ULL, VT)); + return DAG.getNode(ISD::CTPOP, VT, Op); + } + case ISD::CTTZ: { + // for now, we use: { return popcount(~x & (x - 1)); } + // unless the target has ctlz but not ctpop, in which case we use: + // { return 32 - nlz(~x & (x-1)); } + // see also http://www.hackersdelight.org/HDcode/ntz.cc + MVT::ValueType VT = Op.getValueType(); + SDOperand Tmp2 = DAG.getConstant(~0ULL, VT); + SDOperand Tmp3 = DAG.getNode(ISD::AND, VT, + DAG.getNode(ISD::XOR, VT, Op, Tmp2), + DAG.getNode(ISD::SUB, VT, Op, DAG.getConstant(1, VT))); + // If ISD::CTLZ is legal and CTPOP isn't, then do that instead. + if (!TLI.isOperationLegal(ISD::CTPOP, VT) && + TLI.isOperationLegal(ISD::CTLZ, VT)) + return DAG.getNode(ISD::SUB, VT, + DAG.getConstant(getSizeInBits(VT), VT), + DAG.getNode(ISD::CTLZ, VT, Tmp3)); + return DAG.getNode(ISD::CTPOP, VT, Tmp3); + } + } +} + + /// ComputeTopDownOrdering - Add the specified node to the Order list if it has /// not been visited yet and if all of its operands have already been visited. static void ComputeTopDownOrdering(SDNode *N, std::vector &Order, @@ -483,7 +581,7 @@ case Promote: PromoteOp(Op.getValue(i)); assert(LegalizedNodes.count(Op) && - "Expansion didn't add legal operands!"); + "Promotion didn't add legal operands!"); return LegalizedNodes[Op]; } } @@ -494,9 +592,9 @@ if (I != LegalizedNodes.end()) return I->second; SDOperand Tmp1, Tmp2, Tmp3, Tmp4; - SDOperand Result = Op; - + bool isCustom = false; + switch (Node->getOpcode()) { default: if (Node->getOpcode() >= ISD::BUILTIN_OP_END) { @@ -546,7 +644,7 @@ case TargetLowering::Custom: { SDOperand Tmp = TLI.LowerOperation(Op, DAG); if (Tmp.Val) { - Result = LegalizeOp(Tmp); + Result = Tmp; break; } } // FALLTHROUGH if the target doesn't want to lower this op after all. @@ -563,7 +661,8 @@ Node->getOperand(1)); break; case ISD::MERGE_VALUES: - return LegalizeOp(Node->getOperand(Op.ResNo)); + Result = Node->getOperand(Op.ResNo); + break; case ISD::CopyFromReg: Tmp1 = LegalizeOp(Node->getOperand(0)); Result = Op.getValue(0); @@ -593,7 +692,6 @@ switch (TLI.getOperationAction(ISD::UNDEF, VT)) { default: assert(0 && "This action is not supported yet!"); case TargetLowering::Expand: - case TargetLowering::Promote: if (MVT::isInteger(VT)) Result = DAG.getConstant(0, VT); else if (MVT::isFloatingPoint(VT)) @@ -646,7 +744,6 @@ } else { Result = Tmp1; // chain } - Result = LegalizeOp(Result); // Relegalize new nodes. break; } case TargetLowering::Legal: @@ -673,8 +770,6 @@ case ISD::DEBUG_LOC: assert(Node->getNumOperands() == 4 && "Invalid DEBUG_LOC node!"); switch (TLI.getOperationAction(ISD::DEBUG_LOC, MVT::Other)) { - case TargetLowering::Promote: - case TargetLowering::Expand: default: assert(0 && "This action is not supported yet!"); case TargetLowering::Legal: Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain. @@ -695,8 +790,6 @@ case ISD::DEBUG_LABEL: assert(Node->getNumOperands() == 2 && "Invalid DEBUG_LABEL node!"); switch (TLI.getOperationAction(ISD::DEBUG_LABEL, MVT::Other)) { - case TargetLowering::Promote: - case TargetLowering::Expand: default: assert(0 && "This action is not supported yet!"); case TargetLowering::Legal: Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain. @@ -722,7 +815,6 @@ // codegen them. Targets often have some immediate values that can be // efficiently generated into an FP register without a load. We explicitly // leave these constants as ConstantFP nodes for the target to deal with. - ConstantFPSDNode *CFP = cast(Node); // Check to see if this FP immediate is already legal. @@ -738,9 +830,10 @@ // Otherwise we need to spill the constant to memory. bool Extend = false; - // If a FP immediate is precise when represented as a float, we put it - // into the constant pool as a float, even if it's is statically typed - // as a double. + // If a FP immediate is precise when represented as a float and if the + // target can do an extending load from float to double, we put it into + // the constant pool as a float, even if it's is statically typed as a + // double. MVT::ValueType VT = CFP->getValueType(0); bool isDouble = VT == MVT::f64; ConstantFP *LLVMC = ConstantFP::get(isDouble ? Type::DoubleTy : @@ -754,8 +847,7 @@ Extend = true; } - SDOperand CPIdx = - LegalizeOp(DAG.getConstantPool(LLVMC, TLI.getPointerTy())); + SDOperand CPIdx = DAG.getConstantPool(LLVMC, TLI.getPointerTy()); if (Extend) { Result = DAG.getExtLoad(ISD::EXTLOAD, MVT::f64, DAG.getEntryNode(), CPIdx, DAG.getSrcValue(NULL), MVT::f32); @@ -770,9 +862,7 @@ // We assume that vector constants are not legal, and will be immediately // spilled to the constant pool. // - // FIXME: revisit this when we have some kind of mechanism by which targets - // can decided legality of vector constants, of which there may be very - // many. + // FIXME: Allow custom lowering to TargetConstantVec's. // // Create a ConstantPacked, and put it in the constant pool. std::vector CV; @@ -788,7 +878,7 @@ cast(OpN)->getValue())); } Constant *CP = ConstantPacked::get(CV); - SDOperand CPIdx = LegalizeOp(DAG.getConstantPool(CP, TLI.getPointerTy())); + SDOperand CPIdx = DAG.getConstantPool(CP, TLI.getPointerTy()); Result = DAG.getLoad(VT, DAG.getEntryNode(), CPIdx, DAG.getSrcValue(NULL)); break; } @@ -865,8 +955,8 @@ case TargetLowering::Custom: Tmp3 = TLI.LowerOperation(Tmp1, DAG); if (Tmp3.Val) { - Tmp1 = LegalizeOp(Tmp3); - Tmp2 = LegalizeOp(Tmp3.getValue(1)); + Tmp1 = Tmp3; + Tmp2 = Tmp3.getValue(1); } break; case TargetLowering::Legal: @@ -874,8 +964,8 @@ } // Since this op produce two values, make sure to remember that we // legalized both of them. - AddLegalizedOperand(SDOperand(Node, 0), Tmp1); - AddLegalizedOperand(SDOperand(Node, 1), Tmp2); + AddLegalizedOperand(SDOperand(Node, 0), LegalizeOp(Tmp1)); + AddLegalizedOperand(SDOperand(Node, 1), LegalizeOp(Tmp2)); return Op.ResNo ? Tmp2 : Tmp1; } case ISD::INLINEASM: @@ -918,9 +1008,19 @@ Tmp2 = PromoteOp(Node->getOperand(1)); // Promote the condition. break; } + + // Basic block destination (Op#2) is always legal. + if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1)) + Result = DAG.getNode(ISD::BRCOND, MVT::Other, Tmp1, Tmp2, + Node->getOperand(2)); switch (TLI.getOperationAction(ISD::BRCOND, MVT::Other)) { default: assert(0 && "This action is not supported yet!"); + case TargetLowering::Legal: break; + case TargetLowering::Custom: + Tmp1 = TLI.LowerOperation(Result, DAG); + if (Tmp1.Val) Result = Tmp1; + break; case TargetLowering::Expand: // Expand brcond's setcc into its constituent parts and create a BR_CC // Node. @@ -938,24 +1038,7 @@ DAG.getConstant(0, Tmp2.getValueType()), Node->getOperand(2)); } - Result = LegalizeOp(Result); // Relegalize new nodes. break; - case TargetLowering::Custom: { - SDOperand Tmp = - TLI.LowerOperation(DAG.getNode(ISD::BRCOND, Node->getValueType(0), - Tmp1, Tmp2, Node->getOperand(2)), DAG); - if (Tmp.Val) { - Result = LegalizeOp(Tmp); - break; - } - // FALLTHROUGH if the target thinks it is legal. - } - case TargetLowering::Legal: - // Basic block destination (Op#2) is always legal. - if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1)) - Result = DAG.getNode(ISD::BRCOND, MVT::Other, Tmp1, Tmp2, - Node->getOperand(2)); - break; } break; case ISD::BR_CC: @@ -985,23 +1068,18 @@ Tmp2 = LegalizeOp(Node->getOperand(2)); // LHS Tmp3 = LegalizeOp(Node->getOperand(3)); // RHS + if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(2) || + Tmp3 != Node->getOperand(3)) { + Result = DAG.getNode(ISD::BR_CC, MVT::Other, Tmp1, Node->getOperand(1), + Tmp2, Tmp3, Node->getOperand(4)); + } + switch (TLI.getOperationAction(ISD::BR_CC, Tmp3.getValueType())) { default: assert(0 && "Unexpected action for BR_CC!"); - case TargetLowering::Custom: { - Tmp4 = DAG.getNode(ISD::BR_CC, MVT::Other, Tmp1, Node->getOperand(1), - Tmp2, Tmp3, Node->getOperand(4)); - Tmp4 = TLI.LowerOperation(Tmp4, DAG); - if (Tmp4.Val) { - Result = LegalizeOp(Tmp4); - break; - } - } // FALLTHROUGH if the target doesn't want to lower this op after all. - case TargetLowering::Legal: - if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(2) || - Tmp3 != Node->getOperand(3)) { - Result = DAG.getNode(ISD::BR_CC, MVT::Other, Tmp1, Node->getOperand(1), - Tmp2, Tmp3, Node->getOperand(4)); - } + case TargetLowering::Legal: break; + case TargetLowering::Custom: + Tmp4 = TLI.LowerOperation(Result, DAG); + if (Tmp4.Val) Result = Tmp4; break; } break; @@ -1016,6 +1094,8 @@ Tmp2 = PromoteOp(Node->getOperand(1)); // Promote the condition. break; } + + // If this target does not support BRCONDTWOWAY, lower it to a BRCOND/BR // pair. switch (TLI.getOperationAction(ISD::BRCONDTWOWAY, MVT::Other)) { @@ -1047,10 +1127,9 @@ } } else { Result = DAG.getNode(ISD::BRCOND, MVT::Other, Tmp1, Tmp2, - Node->getOperand(2)); + Node->getOperand(2)); Result = DAG.getNode(ISD::BR, MVT::Other, Result, Node->getOperand(3)); } - Result = LegalizeOp(Result); // Relegalize new nodes. break; } break; @@ -1095,7 +1174,6 @@ Result = DAG.getNode(ISD::BR, MVT::Other, Result, Node->getOperand(5)); break; } - Result = LegalizeOp(Result); // Relegalize new nodes. } break; case ISD::LOAD: { @@ -1103,28 +1181,24 @@ Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the pointer. MVT::ValueType VT = Node->getValueType(0); + if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1)) + Result = DAG.getLoad(VT, Tmp1, Tmp2, Node->getOperand(2)); + else + Result = SDOperand(Node, 0); + switch (TLI.getOperationAction(Node->getOpcode(), VT)) { default: assert(0 && "This action is not supported yet!"); - case TargetLowering::Custom: { - SDOperand Op = DAG.getLoad(VT, Tmp1, Tmp2, Node->getOperand(2)); - SDOperand Tmp = TLI.LowerOperation(Op, DAG); - if (Tmp.Val) { - Result = LegalizeOp(Tmp); + case TargetLowering::Custom: + Tmp1 = TLI.LowerOperation(Result, DAG); + if (Tmp1.Val) { // Since loads produce two values, make sure to remember that we // legalized both of them. - AddLegalizedOperand(SDOperand(Node, 0), Result); - AddLegalizedOperand(SDOperand(Node, 1), Result.getValue(1)); - return Result.getValue(Op.ResNo); + AddLegalizedOperand(SDOperand(Node, 0), LegalizeOp(Tmp1)); + AddLegalizedOperand(SDOperand(Node, 1), LegalizeOp(Tmp1.getValue(1))); + return Tmp1.getValue(Op.ResNo); } // FALLTHROUGH if the target thinks it is legal. - } case TargetLowering::Legal: - if (Tmp1 != Node->getOperand(0) || - Tmp2 != Node->getOperand(1)) - Result = DAG.getLoad(VT, Tmp1, Tmp2, Node->getOperand(2)); - else - Result = SDOperand(Node, 0); - // Since loads produce two values, make sure to remember that we legalized // both of them. AddLegalizedOperand(SDOperand(Node, 0), Result); @@ -1152,34 +1226,30 @@ AddLegalizedOperand(SDOperand(Node, 1), Result.getValue(1)); return Result.getValue(Op.ResNo); - case TargetLowering::Custom: { - SDOperand Op = DAG.getExtLoad(Node->getOpcode(), Node->getValueType(0), - Tmp1, Tmp2, Node->getOperand(2), - SrcVT); - SDOperand Tmp = TLI.LowerOperation(Op, DAG); - if (Tmp.Val) { - Result = LegalizeOp(Tmp); - // Since loads produce two values, make sure to remember that we legalized - // both of them. - AddLegalizedOperand(SDOperand(Node, 0), Result); - AddLegalizedOperand(SDOperand(Node, 1), Result.getValue(1)); - return Result.getValue(Op.ResNo); - } - // FALLTHROUGH if the target thinks it is legal. - } + case TargetLowering::Custom: + isCustom = true; + // FALLTHROUGH case TargetLowering::Legal: - if (Tmp1 != Node->getOperand(0) || - Tmp2 != Node->getOperand(1)) + if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1)) Result = DAG.getExtLoad(Node->getOpcode(), Node->getValueType(0), Tmp1, Tmp2, Node->getOperand(2), SrcVT); else Result = SDOperand(Node, 0); + Tmp1 = Result.getValue(1); + + if (isCustom) { + Tmp3 = TLI.LowerOperation(Tmp3, DAG); + if (Tmp3.Val) { + Result = LegalizeOp(Tmp3); + Tmp1 = LegalizeOp(Tmp3.getValue(1)); + } + } // Since loads produce two values, make sure to remember that we legalized // both of them. AddLegalizedOperand(SDOperand(Node, 0), Result); - AddLegalizedOperand(SDOperand(Node, 1), Result.getValue(1)); - return Result.getValue(Op.ResNo); + AddLegalizedOperand(SDOperand(Node, 1), Tmp1); + return Op.ResNo ? Tmp1 : Result; case TargetLowering::Expand: // f64 = EXTLOAD f32 should expand to LOAD, FP_EXTEND if (SrcVT == MVT::f32 && Node->getValueType(0) == MVT::f64) { @@ -1189,9 +1259,7 @@ Load = LegalizeOp(Load); AddLegalizedOperand(SDOperand(Node, 0), Result); AddLegalizedOperand(SDOperand(Node, 1), Load.getValue(1)); - if (Op.ResNo) - return Load.getValue(1); - return Result; + return Op.ResNo ? Load.getValue(1) : Result; } assert(Node->getOpcode() != ISD::EXTLOAD && "EXTLOAD should always be supported!"); @@ -1209,9 +1277,7 @@ ValRes = LegalizeOp(ValRes); // Relegalize new nodes. AddLegalizedOperand(SDOperand(Node, 0), ValRes); AddLegalizedOperand(SDOperand(Node, 1), Result.getValue(1)); - if (Op.ResNo) - return Result.getValue(1); - return ValRes; + return Op.ResNo ? Result.getValue(1) : ValRes; } assert(0 && "Unreachable"); } @@ -1233,7 +1299,6 @@ Result = DAG.getNode(ISD::TRUNCATE, Node->getValueType(0), Node->getOperand(0)); } - Result = LegalizeOp(Result); break; case Expand: // Get both the low and high parts. @@ -1328,16 +1393,10 @@ switch (TLI.getOperationAction(Node->getOpcode(), Node->getValueType(0))) { default: assert(0 && "This action is not supported yet!"); - case TargetLowering::Custom: { - SDOperand Tmp = TLI.LowerOperation(Result, DAG); - if (Tmp.Val) { - Result = LegalizeOp(Tmp); - break; - } - // FALLTHROUGH if the target thinks it is legal. - } - case TargetLowering::Legal: - // Nothing to do. + case TargetLowering::Legal: break; + case TargetLowering::Custom: + Tmp1 = TLI.LowerOperation(Result, DAG); + if (Tmp1.Val) Result = Tmp1; break; } break; @@ -1346,47 +1405,39 @@ Tmp2 = LegalizeOp(Node->getOperand(2)); // Legalize the pointer. // Turn 'store float 1.0, Ptr' -> 'store int 0x12345678, Ptr' + // FIXME: We shouldn't do this for TargetConstantFP's. if (ConstantFPSDNode *CFP =dyn_cast(Node->getOperand(1))){ if (CFP->getValueType(0) == MVT::f32) { Result = DAG.getNode(ISD::STORE, MVT::Other, Tmp1, DAG.getConstant(FloatToBits(CFP->getValue()), MVT::i32), - Tmp2, - Node->getOperand(3)); + Tmp2, Node->getOperand(3)); } else { assert(CFP->getValueType(0) == MVT::f64 && "Unknown FP type!"); Result = DAG.getNode(ISD::STORE, MVT::Other, Tmp1, DAG.getConstant(DoubleToBits(CFP->getValue()), MVT::i64), - Tmp2, - Node->getOperand(3)); + Tmp2, Node->getOperand(3)); } - Result = LegalizeOp(Result); break; } switch (getTypeAction(Node->getOperand(1).getValueType())) { case Legal: { SDOperand Val = LegalizeOp(Node->getOperand(1)); - if (Val != Node->getOperand(1) || Tmp1 != Node->getOperand(0) || + if (Tmp1 != Node->getOperand(0) || Val != Node->getOperand(1) || Tmp2 != Node->getOperand(2)) Result = DAG.getNode(ISD::STORE, MVT::Other, Tmp1, Val, Tmp2, Node->getOperand(3)); MVT::ValueType VT = Result.Val->getOperand(1).getValueType(); - switch (TLI.getOperationAction(Result.Val->getOpcode(), VT)) { - default: assert(0 && "This action is not supported yet!"); - case TargetLowering::Custom: { - SDOperand Tmp = TLI.LowerOperation(Result, DAG); - if (Tmp.Val) { - Result = LegalizeOp(Tmp); - break; - } - // FALLTHROUGH if the target thinks it is legal. - } - case TargetLowering::Legal: - // Nothing to do. - break; + switch (TLI.getOperationAction(ISD::STORE, VT)) { + default: assert(0 && "This action is not supported yet!"); + case TargetLowering::Legal: break; + case TargetLowering::Custom: + Tmp1 = TLI.LowerOperation(Result, DAG); + if (Tmp1.Val) Result = Tmp1; + break; } break; } @@ -1400,7 +1451,6 @@ case Expand: SDOperand Lo, Hi; - unsigned IncrementSize; ExpandOp(Node->getOperand(1), Lo, Hi); if (!TLI.isLittleEndian()) @@ -1411,6 +1461,7 @@ // If this is a vector type, then we have to calculate the increment as // the product of the element size in bytes, and the number of elements // in the high half of the vector. + unsigned IncrementSize; if (MVT::Vector == Hi.getValueType()) { unsigned NumElems = cast(Hi.getOperand(2))->getValue(); MVT::ValueType EVT = cast(Hi.getOperand(3))->getVT(); @@ -1422,7 +1473,8 @@ getIntPtrConstant(IncrementSize)); assert(isTypeLegal(Tmp2.getValueType()) && "Pointers must be legal!"); - //Again, claiming both parts of the store came form the same Instr + // FIXME: This sets the srcvalue of both halves to be the same, which is + // wrong. Hi = DAG.getNode(ISD::STORE, MVT::Other, Tmp1, Hi, Tmp2, Node->getOperand(3)); Result = DAG.getNode(ISD::TokenFactor, MVT::Other, Lo, Hi); @@ -1445,40 +1497,40 @@ Ops.push_back(Tmp1); Result = DAG.getNode(ISD::STACKSAVE, VTs, Ops); } - + + Tmp1 = Result.getValue(1); + switch (TLI.getOperationAction(ISD::STACKSAVE, MVT::Other)) { default: assert(0 && "This action is not supported yet!"); - case TargetLowering::Custom: { - SDOperand Tmp = TLI.LowerOperation(Result, DAG); - if (Tmp.Val) { - Result = LegalizeOp(Tmp); - break; + case TargetLowering::Legal: break; + case TargetLowering::Custom: + Tmp2 = TLI.LowerOperation(Result, DAG); + if (Tmp2.Val) { + Result = LegalizeOp(Tmp2); + Tmp1 = LegalizeOp(Tmp2.getValue(1)); } - // FALLTHROUGH if the target thinks it is legal. - } - case TargetLowering::Legal: - // Since stacksave produce two values, make sure to remember that we - // legalized both of them. - AddLegalizedOperand(SDOperand(Node, 0), Result); - AddLegalizedOperand(SDOperand(Node, 1), Result.getValue(1)); - return Result.getValue(Op.ResNo); + break; case TargetLowering::Expand: // Expand to CopyFromReg if the target set // StackPointerRegisterToSaveRestore. if (unsigned SP = TLI.getStackPointerRegisterToSaveRestore()) { - Tmp1 = DAG.getCopyFromReg(Tmp1, SP, + Tmp2 = DAG.getCopyFromReg(Result.getOperand(0), SP, Node->getValueType(0)); - AddLegalizedOperand(SDOperand(Node, 0), Tmp1); - AddLegalizedOperand(SDOperand(Node, 1), Tmp1.getValue(1)); - return Tmp1.getValue(Op.ResNo); + Result = Tmp2; + Tmp1 = Tmp2.getValue(1); } else { - Tmp1 = DAG.getNode(ISD::UNDEF, Node->getValueType(0)); - AddLegalizedOperand(SDOperand(Node, 0), Tmp1); - AddLegalizedOperand(SDOperand(Node, 1), Node->getOperand(0)); - return Op.ResNo ? Node->getOperand(0) : Tmp1; + Result = DAG.getNode(ISD::UNDEF, Node->getValueType(0)); + Tmp1 = Node->getOperand(0); } + break; } - + + // Since stacksave produce two values, make sure to remember that we + // legalized both of them. + AddLegalizedOperand(SDOperand(Node, 0), Result); + AddLegalizedOperand(SDOperand(Node, 1), Tmp1); + return Op.ResNo ? Tmp1 : Result; + case ISD::STACKRESTORE: Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain. Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the pointer. @@ -1487,15 +1539,10 @@ switch (TLI.getOperationAction(ISD::STACKRESTORE, MVT::Other)) { default: assert(0 && "This action is not supported yet!"); - case TargetLowering::Custom: { - SDOperand Tmp = TLI.LowerOperation(Result, DAG); - if (Tmp.Val) { - Result = LegalizeOp(Tmp); - break; - } - // FALLTHROUGH if the target thinks it is legal. - } - case TargetLowering::Legal: + case TargetLowering::Legal: break; + case TargetLowering::Custom: + Tmp1 = TLI.LowerOperation(Result, DAG); + if (Tmp1.Val) Result = Tmp1; break; case TargetLowering::Expand: // Expand to CopyToReg if the target set @@ -1530,45 +1577,34 @@ Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain. Tmp3 = LegalizeOp(Node->getOperand(2)); // Legalize the pointer. - switch (getTypeAction(Node->getOperand(1).getValueType())) { - case Promote: - case Expand: - assert(0 && "Cannot handle illegal TRUNCSTORE yet!"); - case Legal: - Tmp2 = LegalizeOp(Node->getOperand(1)); - - // The only promote case we handle is TRUNCSTORE:i1 X into - // -> TRUNCSTORE:i8 (and X, 1) - if (cast(Node->getOperand(4))->getVT() == MVT::i1 && - TLI.getOperationAction(ISD::TRUNCSTORE, MVT::i1) == - TargetLowering::Promote) { - // Promote the bool to a mask then store. - Tmp2 = DAG.getNode(ISD::AND, Tmp2.getValueType(), Tmp2, - DAG.getConstant(1, Tmp2.getValueType())); - Result = DAG.getNode(ISD::TRUNCSTORE, MVT::Other, Tmp1, Tmp2, Tmp3, - Node->getOperand(3), DAG.getValueType(MVT::i8)); - - } else if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1) || - Tmp3 != Node->getOperand(2)) { - Result = DAG.getNode(ISD::TRUNCSTORE, MVT::Other, Tmp1, Tmp2, Tmp3, - Node->getOperand(3), Node->getOperand(4)); - } + assert(isTypeLegal(Node->getOperand(1).getValueType()) && + "Cannot handle illegal TRUNCSTORE yet!"); + Tmp2 = LegalizeOp(Node->getOperand(1)); + + // The only promote case we handle is TRUNCSTORE:i1 X into + // -> TRUNCSTORE:i8 (and X, 1) + if (cast(Node->getOperand(4))->getVT() == MVT::i1 && + TLI.getOperationAction(ISD::TRUNCSTORE, MVT::i1) == + TargetLowering::Promote) { + // Promote the bool to a mask then store. + Tmp2 = DAG.getNode(ISD::AND, Tmp2.getValueType(), Tmp2, + DAG.getConstant(1, Tmp2.getValueType())); + Result = DAG.getNode(ISD::TRUNCSTORE, MVT::Other, Tmp1, Tmp2, Tmp3, + Node->getOperand(3), DAG.getValueType(MVT::i8)); + + } else if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1) || + Tmp3 != Node->getOperand(2)) { + Result = DAG.getNode(ISD::TRUNCSTORE, MVT::Other, Tmp1, Tmp2, Tmp3, + Node->getOperand(3), Node->getOperand(4)); + } - MVT::ValueType StVT = cast(Result.Val->getOperand(4))->getVT(); - switch (TLI.getOperationAction(Result.Val->getOpcode(), StVT)) { - default: assert(0 && "This action is not supported yet!"); - case TargetLowering::Custom: { - SDOperand Tmp = TLI.LowerOperation(Result, DAG); - if (Tmp.Val) { - Result = LegalizeOp(Tmp); - break; - } - // FALLTHROUGH if the target thinks it is legal. - } - case TargetLowering::Legal: - // Nothing to do. - break; - } + MVT::ValueType StVT = cast(Result.Val->getOperand(4))->getVT(); + switch (TLI.getOperationAction(Result.Val->getOpcode(), StVT)) { + default: assert(0 && "This action is not supported yet!"); + case TargetLowering::Legal: break; + case TargetLowering::Custom: + Tmp1 = TLI.LowerOperation(Result, DAG); + if (Tmp1.Val) Result = Tmp1; break; } break; @@ -1586,8 +1622,19 @@ Tmp2 = LegalizeOp(Node->getOperand(1)); // TrueVal Tmp3 = LegalizeOp(Node->getOperand(2)); // FalseVal + if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1) || + Tmp3 != Node->getOperand(2)) + Result = DAG.getNode(ISD::SELECT, Node->getValueType(0), + Tmp1, Tmp2, Tmp3); + switch (TLI.getOperationAction(ISD::SELECT, Tmp2.getValueType())) { default: assert(0 && "This action is not supported yet!"); + case TargetLowering::Legal: break; + case TargetLowering::Custom: { + Tmp1 = TLI.LowerOperation(Result, DAG); + if (Tmp1.Val) Result = Tmp1; + break; + } case TargetLowering::Expand: if (Tmp1.getOpcode() == ISD::SETCC) { Result = DAG.getSelectCC(Tmp1.getOperand(0), Tmp1.getOperand(1), @@ -1601,34 +1648,17 @@ DAG.getConstant(0, Tmp1.getValueType()), Tmp2, Tmp3, ISD::SETNE); } - Result = LegalizeOp(Result); // Relegalize new nodes. - break; - case TargetLowering::Custom: { - SDOperand Tmp = - TLI.LowerOperation(DAG.getNode(ISD::SELECT, Node->getValueType(0), - Tmp1, Tmp2, Tmp3), DAG); - if (Tmp.Val) { - Result = LegalizeOp(Tmp); - break; - } - // FALLTHROUGH if the target thinks it is legal. - } - case TargetLowering::Legal: - if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1) || - Tmp3 != Node->getOperand(2)) - Result = DAG.getNode(ISD::SELECT, Node->getValueType(0), - Tmp1, Tmp2, Tmp3); break; case TargetLowering::Promote: { MVT::ValueType NVT = TLI.getTypeToPromoteTo(ISD::SELECT, Tmp2.getValueType()); unsigned ExtOp, TruncOp; if (MVT::isInteger(Tmp2.getValueType())) { - ExtOp = ISD::ANY_EXTEND; - TruncOp = ISD::TRUNCATE; + ExtOp = ISD::ANY_EXTEND; + TruncOp = ISD::TRUNCATE; } else { - ExtOp = ISD::FP_EXTEND; - TruncOp = ISD::FP_ROUND; + ExtOp = ISD::FP_EXTEND; + TruncOp = ISD::FP_ROUND; } // Promote each of the values to the new type. Tmp2 = DAG.getNode(ExtOp, NVT, Tmp2); @@ -1636,7 +1666,6 @@ // Perform the larger operation, then round down. Result = DAG.getNode(ISD::SELECT, NVT, Tmp1, Tmp2,Tmp3); Result = DAG.getNode(TruncOp, Node->getValueType(0), Result); - Result = LegalizeOp(Result); break; } } @@ -1646,29 +1675,22 @@ Tmp4 = LegalizeOp(Node->getOperand(3)); // False if (isTypeLegal(Node->getOperand(0).getValueType())) { + Tmp1 = LegalizeOp(Node->getOperand(0)); // LHS + Tmp2 = LegalizeOp(Node->getOperand(1)); // RHS + if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1) || + Tmp3 != Node->getOperand(2) || Tmp4 != Node->getOperand(3)) { + Result = DAG.getNode(ISD::SELECT_CC, Node->getValueType(0), Tmp1,Tmp2, + Tmp3, Tmp4, Node->getOperand(4)); + } + // Everything is legal, see if we should expand this op or something. switch (TLI.getOperationAction(ISD::SELECT_CC, Node->getOperand(0).getValueType())) { default: assert(0 && "This action is not supported yet!"); - case TargetLowering::Custom: { - SDOperand Tmp = - TLI.LowerOperation(DAG.getNode(ISD::SELECT_CC, Node->getValueType(0), - Node->getOperand(0), - Node->getOperand(1), Tmp3, Tmp4, - Node->getOperand(4)), DAG); - if (Tmp.Val) { - Result = LegalizeOp(Tmp); - break; - } - } // FALLTHROUGH if the target can't lower this operation after all. - case TargetLowering::Legal: - Tmp1 = LegalizeOp(Node->getOperand(0)); // LHS - Tmp2 = LegalizeOp(Node->getOperand(1)); // RHS - if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1) || - Tmp3 != Node->getOperand(2) || Tmp4 != Node->getOperand(3)) { - Result = DAG.getNode(ISD::SELECT_CC, Node->getValueType(0), Tmp1,Tmp2, - Tmp3, Tmp4, Node->getOperand(4)); - } + case TargetLowering::Legal: break; + case TargetLowering::Custom: + Tmp1 = TLI.LowerOperation(Result, DAG); + if (Tmp1.Val) Result = Tmp1; break; } break; @@ -1802,10 +1824,20 @@ } } - switch(TLI.getOperationAction(ISD::SETCC, - Node->getOperand(0).getValueType())) { - default: - assert(0 && "Cannot handle this action for SETCC yet!"); + switch (TLI.getOperationAction(ISD::SETCC, + Node->getOperand(0).getValueType())) { + default: assert(0 && "Cannot handle this action for SETCC yet!"); + case TargetLowering::Custom: + isCustom = true; + // FALLTHROUGH. + case TargetLowering::Legal: + if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1)) + Result = DAG.getNode(ISD::SETCC, Node->getValueType(0), Tmp1, Tmp2, + Node->getOperand(2)); + if (isCustom) { + Tmp3 = TLI.LowerOperation(Result, DAG); + if (Tmp3.Val) Result = Tmp3; + } break; case TargetLowering::Promote: { // First step, figure out the appropriate operation to use. @@ -1839,21 +1871,6 @@ Result = LegalizeOp(Result); break; } - case TargetLowering::Custom: { - SDOperand Tmp = - TLI.LowerOperation(DAG.getNode(ISD::SETCC, Node->getValueType(0), - Tmp1, Tmp2, Node->getOperand(2)), DAG); - if (Tmp.Val) { - Result = LegalizeOp(Tmp); - break; - } - // FALLTHROUGH if the target thinks it is legal. - } - case TargetLowering::Legal: - if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1)) - Result = DAG.getNode(ISD::SETCC, Node->getValueType(0), Tmp1, Tmp2, - Node->getOperand(2)); - break; case TargetLowering::Expand: // Expand a setcc node into a select_cc of the same condition, lhs, and // rhs that selects between const 1 (true) and const 0 (false). @@ -1865,7 +1882,6 @@ break; } break; - case ISD::MEMSET: case ISD::MEMCPY: case ISD::MEMMOVE: { @@ -1915,16 +1931,9 @@ switch (TLI.getOperationAction(Node->getOpcode(), MVT::Other)) { default: assert(0 && "This action not implemented for this operation!"); - case TargetLowering::Custom: { - SDOperand Tmp = - TLI.LowerOperation(DAG.getNode(Node->getOpcode(), MVT::Other, Tmp1, - Tmp2, Tmp3, Tmp4, Tmp5), DAG); - if (Tmp.Val) { - Result = LegalizeOp(Tmp); - break; - } - // FALLTHROUGH if the target thinks it is legal. - } + case TargetLowering::Custom: + isCustom = true; + // FALLTHROUGH case TargetLowering::Legal: if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1) || Tmp3 != Node->getOperand(2) || Tmp4 != Node->getOperand(3) || @@ -1934,6 +1943,10 @@ Ops.push_back(Tmp4); Ops.push_back(Tmp5); Result = DAG.getNode(Node->getOpcode(), MVT::Other, Ops); } + if (isCustom) { + Tmp1 = TLI.LowerOperation(Result, DAG); + if (Tmp1.Val) Result = Tmp1; + } break; case TargetLowering::Expand: { // Otherwise, the target does not support this operation. Lower the @@ -1964,7 +1977,7 @@ std::pair CallResult = TLI.LowerCallTo(Tmp1, Type::VoidTy, false, CallingConv::C, false, DAG.getExternalSymbol(FnName, IntPtr), Args, DAG); - Result = LegalizeOp(CallResult.second); + Result = CallResult.second; break; } } @@ -2047,7 +2060,6 @@ Result = DAG.getNode(ISD::STORE, MVT::Other, Node->getOperand(0), Node->getOperand(1), Node->getOperand(2), DAG.getSrcValue(NULL)); - Result = LegalizeOp(Result); break; } break; @@ -2071,12 +2083,13 @@ switch (TLI.getOperationAction(Node->getOpcode(), Node->getValueType(0))) { default: assert(0 && "This action is not supported yet!"); - case TargetLowering::Custom: { - SDOperand Tmp = TLI.LowerOperation(Result, DAG); - if (Tmp.Val) { - SDOperand Tmp2, RetVal(0,0); + case TargetLowering::Legal: break; + case TargetLowering::Custom: + Tmp1 = TLI.LowerOperation(Result, DAG); + if (Tmp1.Val) { + SDOperand Tmp2, RetVal(0, 0); for (unsigned i = 0, e = Node->getNumValues(); i != e; ++i) { - Tmp2 = LegalizeOp(Tmp.getValue(i)); + Tmp2 = LegalizeOp(Tmp1.getValue(i)); AddLegalizedOperand(SDOperand(Node, i), Tmp2); if (i == Op.ResNo) RetVal = Tmp2; @@ -2084,10 +2097,6 @@ assert(RetVal.Val && "Illegal result number"); return RetVal; } - // FALLTHROUGH if the target thinks it is legal. - } - case TargetLowering::Legal: - // Nothing to do. break; } @@ -2126,23 +2135,17 @@ Tmp2 = PromoteOp(Node->getOperand(1)); // Promote the RHS. break; } + + if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1)) + Result = DAG.getNode(Node->getOpcode(), Node->getValueType(0), Tmp1,Tmp2); + switch (TLI.getOperationAction(Node->getOpcode(), Node->getValueType(0))) { - case TargetLowering::Custom: { - Result = DAG.getNode(Node->getOpcode(), Node->getValueType(0), Tmp1, Tmp2); - SDOperand Tmp = TLI.LowerOperation(Result, DAG); - if (Tmp.Val) { - Tmp = LegalizeOp(Tmp); // Relegalize input. - AddLegalizedOperand(Op, Tmp); - return Tmp; - } //else it was considered legal and we fall through - } - case TargetLowering::Legal: - if (Tmp1 != Node->getOperand(0) || - Tmp2 != Node->getOperand(1)) - Result = DAG.getNode(Node->getOpcode(), Node->getValueType(0), Tmp1,Tmp2); + default: assert(0 && "Operation not supported"); + case TargetLowering::Legal: break; + case TargetLowering::Custom: + Tmp1 = TLI.LowerOperation(Result, DAG); + if (Tmp1.Val) Result = Tmp1; break; - default: - assert(0 && "Operation not supported"); } break; @@ -2152,20 +2155,20 @@ Tmp1 = LegalizeOp(Node->getOperand(0)); // Lo Tmp2 = LegalizeOp(Node->getOperand(1)); // Hi switch (TLI.getOperationAction(ISD::BUILD_PAIR, PairTy)) { + case TargetLowering::Promote: + case TargetLowering::Custom: + assert(0 && "Cannot promote/custom this yet!"); case TargetLowering::Legal: if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1)) Result = DAG.getNode(ISD::BUILD_PAIR, PairTy, Tmp1, Tmp2); break; - case TargetLowering::Promote: - case TargetLowering::Custom: - assert(0 && "Cannot promote/custom this yet!"); case TargetLowering::Expand: Tmp1 = DAG.getNode(ISD::ZERO_EXTEND, PairTy, Tmp1); Tmp2 = DAG.getNode(ISD::ANY_EXTEND, PairTy, Tmp2); Tmp2 = DAG.getNode(ISD::SHL, PairTy, Tmp2, DAG.getConstant(MVT::getSizeInBits(PairTy)/2, TLI.getShiftAmountTy())); - Result = LegalizeOp(DAG.getNode(ISD::OR, PairTy, Tmp1, Tmp2)); + Result = DAG.getNode(ISD::OR, PairTy, Tmp1, Tmp2); break; } break; @@ -2176,28 +2179,26 @@ case ISD::FREM: Tmp1 = LegalizeOp(Node->getOperand(0)); // LHS Tmp2 = LegalizeOp(Node->getOperand(1)); // RHS + switch (TLI.getOperationAction(Node->getOpcode(), Node->getValueType(0))) { - case TargetLowering::Custom: { - Result = DAG.getNode(Node->getOpcode(), Node->getValueType(0), Tmp1,Tmp2); - SDOperand Tmp = TLI.LowerOperation(Result, DAG); - if (Tmp.Val) { - Tmp = LegalizeOp(Tmp); // Relegalize input. - AddLegalizedOperand(Op, Tmp); - return Tmp; - } //else it was considered legal and we fall through - } + case TargetLowering::Promote: assert(0 && "Cannot promote this yet!"); + case TargetLowering::Custom: + isCustom = true; + // FALLTHROUGH case TargetLowering::Legal: - if (Tmp1 != Node->getOperand(0) || - Tmp2 != Node->getOperand(1)) - Result = DAG.getNode(Node->getOpcode(), Node->getValueType(0), Tmp1, - Tmp2); + if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1)) + Result = DAG.getNode(Node->getOpcode(), Node->getValueType(0), + Tmp1, Tmp2); + if (isCustom) { + Tmp1 = TLI.LowerOperation(Result, DAG); + if (Tmp1.Val) Result = Tmp1; + } break; - case TargetLowering::Promote: - assert(0 && "Cannot promote handle this yet!"); case TargetLowering::Expand: if (MVT::isInteger(Node->getValueType(0))) { + // X % Y -> X-X/Y*Y MVT::ValueType VT = Node->getValueType(0); - unsigned Opc = (Node->getOpcode() == ISD::UREM) ? ISD::UDIV : ISD::SDIV; + unsigned Opc = Node->getOpcode() == ISD::UREM ? ISD::UDIV : ISD::SDIV; Result = DAG.getNode(Opc, VT, Tmp1, Tmp2); Result = DAG.getNode(ISD::MUL, VT, Result, Tmp2); Result = DAG.getNode(ISD::SUB, VT, Tmp1, Result); @@ -2210,29 +2211,31 @@ break; } break; - case ISD::VAARG: { Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain. Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the pointer. - MVT::ValueType VT = Node->getValueType(0); + MVT::ValueType VT; switch (TLI.getOperationAction(Node->getOpcode(), MVT::Other)) { default: assert(0 && "This action is not supported yet!"); - case TargetLowering::Custom: { - SDOperand Op = DAG.getVAArg(VT, Tmp1, Tmp2, Node->getOperand(2)); - SDOperand Tmp = TLI.LowerOperation(Op, DAG); - if (Tmp.Val) { - Result = LegalizeOp(Tmp); - break; - } - // FALLTHROUGH if the target thinks it is legal. - } + case TargetLowering::Custom: + isCustom = true; + // FALLTHROUGH case TargetLowering::Legal: - if (Tmp1 != Node->getOperand(0) || - Tmp2 != Node->getOperand(1)) + VT = Node->getValueType(0); + if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1)) Result = DAG.getVAArg(VT, Tmp1, Tmp2, Node->getOperand(2)); else Result = SDOperand(Node, 0); + Tmp1 = Result.getValue(1); + + if (isCustom) { + Tmp2 = TLI.LowerOperation(Result, DAG); + if (Tmp2.Val) { + Result = LegalizeOp(Tmp2); + Tmp1 = LegalizeOp(Tmp2.getValue(1)); + } + } break; case TargetLowering::Expand: { SDOperand VAList = DAG.getLoad(TLI.getPointerTy(), Tmp1, Tmp2, @@ -2246,6 +2249,7 @@ Node->getOperand(2)); // Load the actual argument out of the pointer VAList Result = DAG.getLoad(VT, Tmp3, VAList, DAG.getSrcValue(0)); + Tmp1 = LegalizeOp(Result.getValue(1)); Result = LegalizeOp(Result); break; } @@ -2253,8 +2257,8 @@ // Since VAARG produces two values, make sure to remember that we // legalized both of them. AddLegalizedOperand(SDOperand(Node, 0), Result); - AddLegalizedOperand(SDOperand(Node, 1), Result.getValue(1)); - return Result.getValue(Op.ResNo); + AddLegalizedOperand(SDOperand(Node, 1), Tmp1); + return Op.ResNo ? Tmp1 : Result; } case ISD::VACOPY: @@ -2264,22 +2268,18 @@ switch (TLI.getOperationAction(ISD::VACOPY, MVT::Other)) { default: assert(0 && "This action is not supported yet!"); - case TargetLowering::Custom: { - SDOperand Op = DAG.getNode(ISD::VACOPY, MVT::Other, Tmp1, Tmp2, Tmp3, - Node->getOperand(3), Node->getOperand(4)); - SDOperand Tmp = TLI.LowerOperation(Op, DAG); - if (Tmp.Val) { - Result = LegalizeOp(Tmp); - break; - } - // FALLTHROUGH if the target thinks it is legal. - } + case TargetLowering::Custom: + isCustom = true; + // FALLTHROUGH case TargetLowering::Legal: - if (Tmp1 != Node->getOperand(0) || - Tmp2 != Node->getOperand(1) || + if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1) || Tmp3 != Node->getOperand(2)) Result = DAG.getNode(ISD::VACOPY, MVT::Other, Tmp1, Tmp2, Tmp3, Node->getOperand(3), Node->getOperand(4)); + if (isCustom) { + Tmp1 = TLI.LowerOperation(Result, DAG); + if (Tmp1.Val) Result = Tmp1; + } break; case TargetLowering::Expand: // This defaults to loading a pointer from the input and storing it to the @@ -2287,7 +2287,6 @@ Tmp4 = DAG.getLoad(TLI.getPointerTy(), Tmp1, Tmp3, Node->getOperand(3)); Result = DAG.getNode(ISD::STORE, MVT::Other, Tmp4.getValue(1), Tmp4, Tmp2, Node->getOperand(4)); - Result = LegalizeOp(Result); break; } break; @@ -2298,21 +2297,17 @@ switch (TLI.getOperationAction(ISD::VAEND, MVT::Other)) { default: assert(0 && "This action is not supported yet!"); - case TargetLowering::Custom: { - SDOperand Op = DAG.getNode(ISD::VAEND, MVT::Other, Tmp1, Tmp2, - Node->getOperand(2)); - SDOperand Tmp = TLI.LowerOperation(Op, DAG); - if (Tmp.Val) { - Result = LegalizeOp(Tmp); - break; - } - // FALLTHROUGH if the target thinks it is legal. - } + case TargetLowering::Custom: + isCustom = true; + // FALLTHROUGH case TargetLowering::Legal: - if (Tmp1 != Node->getOperand(0) || - Tmp2 != Node->getOperand(1)) + if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1)) Result = DAG.getNode(ISD::VAEND, MVT::Other, Tmp1, Tmp2, Node->getOperand(2)); + if (isCustom) { + Tmp1 = TLI.LowerOperation(Tmp1, DAG); + if (Tmp1.Val) Result = Tmp1; + } break; case TargetLowering::Expand: Result = Tmp1; // Default to a no-op, return the chain @@ -2324,23 +2319,16 @@ Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain. Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the pointer. + if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1)) + Result = DAG.getNode(ISD::VASTART, MVT::Other, Tmp1, Tmp2, + Node->getOperand(2)); + switch (TLI.getOperationAction(ISD::VASTART, MVT::Other)) { default: assert(0 && "This action is not supported yet!"); - case TargetLowering::Custom: { - SDOperand Op = DAG.getNode(ISD::VASTART, MVT::Other, Tmp1, Tmp2, - Node->getOperand(2)); - SDOperand Tmp = TLI.LowerOperation(Op, DAG); - if (Tmp.Val) { - Result = LegalizeOp(Tmp); - break; - } - // FALLTHROUGH if the target thinks it is legal. - } - case TargetLowering::Legal: - if (Tmp1 != Node->getOperand(0) || - Tmp2 != Node->getOperand(1)) - Result = DAG.getNode(ISD::VASTART, MVT::Other, Tmp1, Tmp2, - Node->getOperand(2)); + case TargetLowering::Legal: break; + case TargetLowering::Custom: + Tmp1 = TLI.LowerOperation(Result, DAG); + if (Tmp1.Val) Result = Tmp1; break; } break; @@ -2349,110 +2337,36 @@ case ISD::ROTR: Tmp1 = LegalizeOp(Node->getOperand(0)); // LHS Tmp2 = LegalizeOp(Node->getOperand(1)); // RHS - switch (TLI.getOperationAction(Node->getOpcode(), Node->getValueType(0))) { - case TargetLowering::Custom: - case TargetLowering::Promote: - case TargetLowering::Expand: - assert(0 && "Cannot handle this yet!"); - case TargetLowering::Legal: - if (Tmp1 != Node->getOperand(0) || - Tmp2 != Node->getOperand(1)) - Result = DAG.getNode(Node->getOpcode(), Node->getValueType(0), Tmp1, - Tmp2); - break; - } + + assert(TLI.isOperationLegal(Node->getOpcode(), Node->getValueType(0)) && + "Cannot handle this yet!"); + if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1)) + Result = DAG.getNode(Node->getOpcode(), Node->getValueType(0), Tmp1,Tmp2); break; case ISD::BSWAP: Tmp1 = LegalizeOp(Node->getOperand(0)); // Op switch (TLI.getOperationAction(Node->getOpcode(), Node->getValueType(0))) { - case TargetLowering::Legal: - if (Tmp1 != Node->getOperand(0)) - Result = DAG.getNode(Node->getOpcode(), Node->getValueType(0), Tmp1); - break; - case TargetLowering::Promote: { - MVT::ValueType OVT = Tmp1.getValueType(); - MVT::ValueType NVT = TLI.getTypeToPromoteTo(Node->getOpcode(), OVT); - unsigned DiffBits = getSizeInBits(NVT) - getSizeInBits(OVT); - - Tmp1 = DAG.getNode(ISD::ZERO_EXTEND, NVT, Tmp1); - Tmp1 = DAG.getNode(ISD::BSWAP, NVT, Tmp1); - Result = DAG.getNode(ISD::SRL, NVT, Tmp1, - DAG.getConstant(DiffBits, TLI.getShiftAmountTy())); - Result = LegalizeOp(Result); - break; - } - case TargetLowering::Custom: - assert(0 && "Cannot custom legalize this yet!"); - case TargetLowering::Expand: { - MVT::ValueType VT = Tmp1.getValueType(); - switch (VT) { - default: assert(0 && "Unhandled Expand type in BSWAP!"); abort(); - case MVT::i16: - Tmp2 = DAG.getNode(ISD::SHL, VT, Tmp1, - DAG.getConstant(8, TLI.getShiftAmountTy())); - Tmp1 = DAG.getNode(ISD::SRL, VT, Tmp1, - DAG.getConstant(8, TLI.getShiftAmountTy())); - Result = DAG.getNode(ISD::OR, VT, Tmp1, Tmp2); - break; - case MVT::i32: - Tmp4 = DAG.getNode(ISD::SHL, VT, Tmp1, - DAG.getConstant(24, TLI.getShiftAmountTy())); - Tmp3 = DAG.getNode(ISD::SHL, VT, Tmp1, - DAG.getConstant(8, TLI.getShiftAmountTy())); - Tmp2 = DAG.getNode(ISD::SRL, VT, Tmp1, - DAG.getConstant(8, TLI.getShiftAmountTy())); - Tmp1 = DAG.getNode(ISD::SRL, VT, Tmp1, - DAG.getConstant(24, TLI.getShiftAmountTy())); - Tmp3 = DAG.getNode(ISD::AND, VT, Tmp3, DAG.getConstant(0xFF0000, VT)); - Tmp2 = DAG.getNode(ISD::AND, VT, Tmp2, DAG.getConstant(0xFF00, VT)); - Tmp4 = DAG.getNode(ISD::OR, VT, Tmp4, Tmp3); - Tmp2 = DAG.getNode(ISD::OR, VT, Tmp2, Tmp1); - Result = DAG.getNode(ISD::OR, VT, Tmp4, Tmp2); - break; - case MVT::i64: { - SDOperand Tmp5, Tmp6, Tmp7, Tmp8; - Tmp8 = DAG.getNode(ISD::SHL, VT, Tmp1, - DAG.getConstant(56, TLI.getShiftAmountTy())); - Tmp7 = DAG.getNode(ISD::SHL, VT, Tmp1, - DAG.getConstant(40, TLI.getShiftAmountTy())); - Tmp6 = DAG.getNode(ISD::SHL, VT, Tmp1, - DAG.getConstant(24, TLI.getShiftAmountTy())); - Tmp5 = DAG.getNode(ISD::SHL, VT, Tmp1, - DAG.getConstant(8, TLI.getShiftAmountTy())); - Tmp4 = DAG.getNode(ISD::SRL, VT, Tmp1, - DAG.getConstant(8, TLI.getShiftAmountTy())); - Tmp3 = DAG.getNode(ISD::SRL, VT, Tmp1, - DAG.getConstant(24, TLI.getShiftAmountTy())); - Tmp2 = DAG.getNode(ISD::SRL, VT, Tmp1, - DAG.getConstant(40, TLI.getShiftAmountTy())); - Tmp1 = DAG.getNode(ISD::SRL, VT, Tmp1, - DAG.getConstant(56, TLI.getShiftAmountTy())); - Tmp7 = DAG.getNode(ISD::AND, VT, Tmp7, - DAG.getConstant(0x00FF000000000000ULL, VT)); - Tmp6 = DAG.getNode(ISD::AND, VT, Tmp7, - DAG.getConstant(0x0000FF0000000000ULL, VT)); - Tmp5 = DAG.getNode(ISD::AND, VT, Tmp7, - DAG.getConstant(0x000000FF00000000ULL, VT)); - Tmp4 = DAG.getNode(ISD::AND, VT, Tmp7, - DAG.getConstant(0x00000000FF000000ULL, VT)); - Tmp3 = DAG.getNode(ISD::AND, VT, Tmp7, - DAG.getConstant(0x0000000000FF0000ULL, VT)); - Tmp2 = DAG.getNode(ISD::AND, VT, Tmp7, - DAG.getConstant(0x000000000000FF00ULL, VT)); - Tmp8 = DAG.getNode(ISD::OR, VT, Tmp8, Tmp7); - Tmp6 = DAG.getNode(ISD::OR, VT, Tmp6, Tmp5); - Tmp4 = DAG.getNode(ISD::OR, VT, Tmp4, Tmp3); - Tmp2 = DAG.getNode(ISD::OR, VT, Tmp2, Tmp1); - Tmp8 = DAG.getNode(ISD::OR, VT, Tmp8, Tmp6); - Tmp4 = DAG.getNode(ISD::OR, VT, Tmp4, Tmp2); - Result = DAG.getNode(ISD::OR, VT, Tmp8, Tmp4); - break; - } - } - Result = LegalizeOp(Result); - break; - } + case TargetLowering::Custom: + assert(0 && "Cannot custom legalize this yet!"); + case TargetLowering::Legal: + if (Tmp1 != Node->getOperand(0)) + Result = DAG.getNode(Node->getOpcode(), Node->getValueType(0), Tmp1); + break; + case TargetLowering::Promote: { + MVT::ValueType OVT = Tmp1.getValueType(); + MVT::ValueType NVT = TLI.getTypeToPromoteTo(Node->getOpcode(), OVT); + unsigned DiffBits = getSizeInBits(NVT) - getSizeInBits(OVT); + + Tmp1 = DAG.getNode(ISD::ZERO_EXTEND, NVT, Tmp1); + Tmp1 = DAG.getNode(ISD::BSWAP, NVT, Tmp1); + Result = DAG.getNode(ISD::SRL, NVT, Tmp1, + DAG.getConstant(DiffBits, TLI.getShiftAmountTy())); + break; + } + case TargetLowering::Expand: + Result = ExpandBSWAP(Tmp1); + break; } break; @@ -2461,6 +2375,7 @@ case ISD::CTLZ: Tmp1 = LegalizeOp(Node->getOperand(0)); // Op switch (TLI.getOperationAction(Node->getOpcode(), Node->getValueType(0))) { + case TargetLowering::Custom: assert(0 && "Cannot custom handle this yet!"); case TargetLowering::Legal: if (Tmp1 != Node->getOperand(0)) Result = DAG.getNode(Node->getOpcode(), Node->getValueType(0), Tmp1); @@ -2473,8 +2388,7 @@ Tmp1 = DAG.getNode(ISD::ZERO_EXTEND, NVT, Tmp1); // Perform the larger operation, then subtract if needed. Tmp1 = DAG.getNode(Node->getOpcode(), Node->getValueType(0), Tmp1); - switch(Node->getOpcode()) - { + switch (Node->getOpcode()) { case ISD::CTPOP: Result = Tmp1; break; @@ -2487,90 +2401,16 @@ DAG.getConstant(getSizeInBits(OVT),NVT), Tmp1); break; case ISD::CTLZ: - //Tmp1 = Tmp1 - (sizeinbits(NVT) - sizeinbits(Old VT)) + // Tmp1 = Tmp1 - (sizeinbits(NVT) - sizeinbits(Old VT)) Result = DAG.getNode(ISD::SUB, NVT, Tmp1, DAG.getConstant(getSizeInBits(NVT) - getSizeInBits(OVT), NVT)); break; } - Result = LegalizeOp(Result); break; } - case TargetLowering::Custom: - assert(0 && "Cannot custom handle this yet!"); case TargetLowering::Expand: - switch(Node->getOpcode()) - { - case ISD::CTPOP: { - static const uint64_t mask[6] = { - 0x5555555555555555ULL, 0x3333333333333333ULL, - 0x0F0F0F0F0F0F0F0FULL, 0x00FF00FF00FF00FFULL, - 0x0000FFFF0000FFFFULL, 0x00000000FFFFFFFFULL - }; - MVT::ValueType VT = Tmp1.getValueType(); - MVT::ValueType ShVT = TLI.getShiftAmountTy(); - unsigned len = getSizeInBits(VT); - for (unsigned i = 0; (1U << i) <= (len / 2); ++i) { - //x = (x & mask[i][len/8]) + (x >> (1 << i) & mask[i][len/8]) - Tmp2 = DAG.getConstant(mask[i], VT); - Tmp3 = DAG.getConstant(1ULL << i, ShVT); - Tmp1 = DAG.getNode(ISD::ADD, VT, - DAG.getNode(ISD::AND, VT, Tmp1, Tmp2), - DAG.getNode(ISD::AND, VT, - DAG.getNode(ISD::SRL, VT, Tmp1, Tmp3), - Tmp2)); - } - Result = LegalizeOp(Tmp1); - break; - } - case ISD::CTLZ: { - /* for now, we do this: - x = x | (x >> 1); - x = x | (x >> 2); - ... - x = x | (x >>16); - x = x | (x >>32); // for 64-bit input - return popcount(~x); - - but see also: http://www.hackersdelight.org/HDcode/nlz.cc */ - MVT::ValueType VT = Tmp1.getValueType(); - MVT::ValueType ShVT = TLI.getShiftAmountTy(); - unsigned len = getSizeInBits(VT); - for (unsigned i = 0; (1U << i) <= (len / 2); ++i) { - Tmp3 = DAG.getConstant(1ULL << i, ShVT); - Tmp1 = DAG.getNode(ISD::OR, VT, Tmp1, - DAG.getNode(ISD::SRL, VT, Tmp1, Tmp3)); - } - Tmp3 = DAG.getNode(ISD::XOR, VT, Tmp1, DAG.getConstant(~0ULL, VT)); - Result = LegalizeOp(DAG.getNode(ISD::CTPOP, VT, Tmp3)); - break; - } - case ISD::CTTZ: { - // for now, we use: { return popcount(~x & (x - 1)); } - // unless the target has ctlz but not ctpop, in which case we use: - // { return 32 - nlz(~x & (x-1)); } - // see also http://www.hackersdelight.org/HDcode/ntz.cc - MVT::ValueType VT = Tmp1.getValueType(); - Tmp2 = DAG.getConstant(~0ULL, VT); - Tmp3 = DAG.getNode(ISD::AND, VT, - DAG.getNode(ISD::XOR, VT, Tmp1, Tmp2), - DAG.getNode(ISD::SUB, VT, Tmp1, - DAG.getConstant(1, VT))); - // If ISD::CTLZ is legal and CTPOP isn't, then do that instead - if (!TLI.isOperationLegal(ISD::CTPOP, VT) && - TLI.isOperationLegal(ISD::CTLZ, VT)) { - Result = LegalizeOp(DAG.getNode(ISD::SUB, VT, - DAG.getConstant(getSizeInBits(VT), VT), - DAG.getNode(ISD::CTLZ, VT, Tmp3))); - } else { - Result = LegalizeOp(DAG.getNode(ISD::CTPOP, VT, Tmp3)); - } - break; - } - default: - assert(0 && "Cannot expand this yet!"); - break; - } + Result = ExpandBitCount(Node->getOpcode(), Tmp1); break; } break; @@ -2583,22 +2423,21 @@ case ISD::FCOS: Tmp1 = LegalizeOp(Node->getOperand(0)); switch (TLI.getOperationAction(Node->getOpcode(), Node->getValueType(0))) { + case TargetLowering::Promote: + case TargetLowering::Custom: + assert(0 && "Cannot promote/custom handle this yet!"); case TargetLowering::Legal: if (Tmp1 != Node->getOperand(0)) Result = DAG.getNode(Node->getOpcode(), Node->getValueType(0), Tmp1); break; - case TargetLowering::Promote: - case TargetLowering::Custom: - assert(0 && "Cannot promote/custom handle this yet!"); case TargetLowering::Expand: - switch(Node->getOpcode()) { - case ISD::FNEG: { + switch (Node->getOpcode()) { + default: assert(0 && "Unreachable!"); + case ISD::FNEG: // Expand Y = FNEG(X) -> Y = SUB -0.0, X Tmp2 = DAG.getConstantFP(-0.0, Node->getValueType(0)); - Result = LegalizeOp(DAG.getNode(ISD::FSUB, Node->getValueType(0), - Tmp2, Tmp1)); + Result = DAG.getNode(ISD::FSUB, Node->getValueType(0), Tmp2, Tmp1); break; - } case ISD::FABS: { // Expand Y = FABS(X) -> Y = (X >u 0.0) ? X : fneg(X). MVT::ValueType VT = Node->getValueType(0); @@ -2606,7 +2445,6 @@ Tmp2 = DAG.getSetCC(TLI.getSetCCResultTy(), Tmp1, Tmp2, ISD::SETUGT); Tmp3 = DAG.getNode(ISD::FNEG, VT, Tmp1); Result = DAG.getNode(ISD::SELECT, VT, Tmp2, Tmp1, Tmp3); - Result = LegalizeOp(Result); break; } case ISD::FSQRT: @@ -2624,8 +2462,6 @@ Result = ExpandLibCall(FnName, Node, Dummy); break; } - default: - assert(0 && "Unreachable!"); } break; } @@ -2634,14 +2470,12 @@ case ISD::BIT_CONVERT: if (!isTypeLegal(Node->getOperand(0).getValueType())) { Result = ExpandBIT_CONVERT(Node->getValueType(0), Node->getOperand(0)); - Result = LegalizeOp(Result); } else { switch (TLI.getOperationAction(ISD::BIT_CONVERT, Node->getOperand(0).getValueType())) { default: assert(0 && "Unknown operation action!"); case TargetLowering::Expand: Result = ExpandBIT_CONVERT(Node->getValueType(0), Node->getOperand(0)); - Result = LegalizeOp(Result); break; case TargetLowering::Legal: Tmp1 = LegalizeOp(Node->getOperand(0)); @@ -2660,38 +2494,29 @@ switch (TLI.getOperationAction(Node->getOpcode(), Node->getOperand(0).getValueType())) { default: assert(0 && "Unknown operation action!"); + case TargetLowering::Custom: + isCustom = true; + // FALLTHROUGH + case TargetLowering::Legal: + Tmp1 = LegalizeOp(Node->getOperand(0)); + if (Tmp1 != Node->getOperand(0)) + Result = DAG.getNode(Node->getOpcode(), Node->getValueType(0), Tmp1); + if (isCustom) { + Tmp1 = TLI.LowerOperation(Result, DAG); + if (Tmp1.Val) Result = Tmp1; + } + break; case TargetLowering::Expand: Result = ExpandLegalINT_TO_FP(isSigned, LegalizeOp(Node->getOperand(0)), Node->getValueType(0)); - AddLegalizedOperand(Op, Result); - return Result; + break; case TargetLowering::Promote: Result = PromoteLegalINT_TO_FP(LegalizeOp(Node->getOperand(0)), Node->getValueType(0), isSigned); - AddLegalizedOperand(Op, Result); - return Result; - case TargetLowering::Legal: break; - case TargetLowering::Custom: { - Tmp1 = LegalizeOp(Node->getOperand(0)); - SDOperand Tmp = - DAG.getNode(Node->getOpcode(), Node->getValueType(0), Tmp1); - Tmp = TLI.LowerOperation(Tmp, DAG); - if (Tmp.Val) { - Tmp = LegalizeOp(Tmp); // Relegalize input. - AddLegalizedOperand(Op, Tmp); - return Tmp; - } else { - assert(0 && "Target Must Lower this"); - } } - } - - Tmp1 = LegalizeOp(Node->getOperand(0)); - if (Tmp1 != Node->getOperand(0)) - Result = DAG.getNode(Node->getOpcode(), Node->getValueType(0), Tmp1); break; case Expand: Result = ExpandIntToFP(Node->getOpcode() == ISD::SINT_TO_FP, @@ -2742,6 +2567,22 @@ switch (TLI.getOperationAction(Node->getOpcode(), Node->getValueType(0))){ default: assert(0 && "Unknown operation action!"); + case TargetLowering::Custom: + isCustom = true; + // FALLTHROUGH + case TargetLowering::Legal: + if (Tmp1 != Node->getOperand(0)) + Result = DAG.getNode(Node->getOpcode(), Node->getValueType(0), Tmp1); + + if (isCustom) { + Tmp1 = TLI.LowerOperation(Result, DAG); + if (Tmp1.Val) Result = Tmp1; + } + break; + case TargetLowering::Promote: + Result = PromoteLegalFP_TO_INT(Tmp1, Node->getValueType(0), + Node->getOpcode() == ISD::FP_TO_SINT); + break; case TargetLowering::Expand: if (Node->getOpcode() == ISD::FP_TO_UINT) { SDOperand True, False; @@ -2757,37 +2598,13 @@ Tmp2)); False = DAG.getNode(ISD::XOR, NVT, False, DAG.getConstant(1ULL << ShiftAmt, NVT)); - Result = LegalizeOp(DAG.getNode(ISD::SELECT, NVT, Tmp3, True, False)); - AddLegalizedOperand(SDOperand(Node, 0), Result); - return Result; + Result = DAG.getNode(ISD::SELECT, NVT, Tmp3, True, False); + break; } else { assert(0 && "Do not know how to expand FP_TO_SINT yet!"); } break; - case TargetLowering::Promote: - Result = PromoteLegalFP_TO_INT(Tmp1, Node->getValueType(0), - Node->getOpcode() == ISD::FP_TO_SINT); - AddLegalizedOperand(Op, Result); - return Result; - case TargetLowering::Custom: { - SDOperand Tmp = - DAG.getNode(Node->getOpcode(), Node->getValueType(0), Tmp1); - Tmp = TLI.LowerOperation(Tmp, DAG); - if (Tmp.Val) { - Tmp = LegalizeOp(Tmp); - AddLegalizedOperand(Op, Tmp); - return Tmp; - } else { - // The target thinks this is legal afterall. - break; - } - } - case TargetLowering::Legal: - break; } - - if (Tmp1 != Node->getOperand(0)) - Result = DAG.getNode(Node->getOpcode(), Node->getValueType(0), Tmp1); break; case Expand: assert(0 && "Shouldn't need to expand other operators here!"); @@ -2804,14 +2621,12 @@ case ISD::FP_EXTEND: case ISD::FP_ROUND: switch (getTypeAction(Node->getOperand(0).getValueType())) { + case Expand: assert(0 && "Shouldn't need to expand other operators here!"); case Legal: Tmp1 = LegalizeOp(Node->getOperand(0)); if (Tmp1 != Node->getOperand(0)) Result = DAG.getNode(Node->getOpcode(), Node->getValueType(0), Tmp1); break; - case Expand: - assert(0 && "Shouldn't need to expand other operators here!"); - case Promote: switch (Node->getOpcode()) { case ISD::ANY_EXTEND: @@ -2893,12 +2708,15 @@ } else { assert(0 && "Unknown op"); } - Result = LegalizeOp(Result); break; } break; } } + + // Make sure that the generated code is itself legal. + if (Result != Op) + Result = LegalizeOp(Result); // Note that LegalizeOp may be reentered even from single-use nodes, which // means that we always must cache transformed nodes. @@ -2919,18 +2737,12 @@ "Cannot promote to smaller type!"); SDOperand Tmp1, Tmp2, Tmp3; - SDOperand Result; SDNode *Node = Op.Val; std::map::iterator I = PromotedNodes.find(Op); if (I != PromotedNodes.end()) return I->second; - // Promotion needs an optimization step to clean up after it, and is not - // careful to avoid operations the target does not support. Make sure that - // all generated operations are legalized in the next iteration. - NeedsAnotherIteration = true; - switch (Node->getOpcode()) { case ISD::CopyFromReg: assert(0 && "CopyFromReg must be legal!"); @@ -2957,7 +2769,6 @@ assert(isTypeLegal(TLI.getSetCCResultTy()) && "SetCC type is not legal??"); Result = DAG.getNode(ISD::SETCC, TLI.getSetCCResultTy(),Node->getOperand(0), Node->getOperand(1), Node->getOperand(2)); - Result = LegalizeOp(Result); break; case ISD::TRUNCATE: @@ -2987,8 +2798,7 @@ case Expand: assert(0 && "BUG: Smaller reg should have been promoted!"); case Legal: // Input is legal? Just do extend all the way to the larger type. - Result = LegalizeOp(Node->getOperand(0)); - Result = DAG.getNode(Node->getOpcode(), NVT, Result); + Result = DAG.getNode(Node->getOpcode(), NVT, Node->getOperand(0)); break; case Promote: // Promote the reg if it's smaller. @@ -3016,8 +2826,7 @@ case Promote: assert(0 && "Unreachable with 2 FP types!"); case Legal: // Input is legal? Do an FP_ROUND_INREG. - Result = LegalizeOp(Node->getOperand(0)); - Result = DAG.getNode(ISD::FP_ROUND_INREG, NVT, Result, + Result = DAG.getNode(ISD::FP_ROUND_INREG, NVT, Node->getOperand(0), DAG.getValueType(VT)); break; } @@ -3027,9 +2836,8 @@ case ISD::UINT_TO_FP: switch (getTypeAction(Node->getOperand(0).getValueType())) { case Legal: - Result = LegalizeOp(Node->getOperand(0)); // No extra round required here. - Result = DAG.getNode(Node->getOpcode(), NVT, Result); + Result = DAG.getNode(Node->getOpcode(), NVT, Node->getOperand(0)); break; case Promote: @@ -3064,7 +2872,7 @@ case ISD::FP_TO_UINT: switch (getTypeAction(Node->getOperand(0).getValueType())) { case Legal: - Tmp1 = LegalizeOp(Node->getOperand(0)); + Tmp1 = Node->getOperand(0); break; case Promote: // The input result is prerounded, so we don't have to do anything @@ -3105,7 +2913,7 @@ Tmp1 = PromoteOp(Node->getOperand(0)); assert(Tmp1.getValueType() == NVT); Result = DAG.getNode(Node->getOpcode(), NVT, Tmp1); - if(NoExcessFPPrecision) + if (NoExcessFPPrecision) Result = DAG.getNode(ISD::FP_ROUND_INREG, NVT, Result, DAG.getValueType(VT)); break; @@ -3127,8 +2935,6 @@ case ISD::FADD: case ISD::FSUB: case ISD::FMUL: - // The input may have strange things in the top bits of the registers, but - // these operations don't care. Tmp1 = PromoteOp(Node->getOperand(0)); Tmp2 = PromoteOp(Node->getOperand(1)); assert(Tmp1.getValueType() == NVT && Tmp2.getValueType() == NVT); @@ -3188,28 +2994,25 @@ case ISD::SHL: Tmp1 = PromoteOp(Node->getOperand(0)); - Tmp2 = LegalizeOp(Node->getOperand(1)); - Result = DAG.getNode(ISD::SHL, NVT, Tmp1, Tmp2); + Result = DAG.getNode(ISD::SHL, NVT, Tmp1, Node->getOperand(1)); break; case ISD::SRA: // The input value must be properly sign extended. Tmp1 = PromoteOp(Node->getOperand(0)); Tmp1 = DAG.getNode(ISD::SIGN_EXTEND_INREG, NVT, Tmp1, DAG.getValueType(VT)); - Tmp2 = LegalizeOp(Node->getOperand(1)); - Result = DAG.getNode(ISD::SRA, NVT, Tmp1, Tmp2); + Result = DAG.getNode(ISD::SRA, NVT, Tmp1, Node->getOperand(1)); break; case ISD::SRL: // The input value must be properly zero extended. Tmp1 = PromoteOp(Node->getOperand(0)); Tmp1 = DAG.getZeroExtendInReg(Tmp1, VT); - Tmp2 = LegalizeOp(Node->getOperand(1)); - Result = DAG.getNode(ISD::SRL, NVT, Tmp1, Tmp2); + Result = DAG.getNode(ISD::SRL, NVT, Tmp1, Node->getOperand(1)); break; case ISD::VAARG: - Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain. - Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the pointer. + Tmp1 = Node->getOperand(0); // Get the chain. + Tmp2 = Node->getOperand(1); // Get the pointer. if (TLI.getOperationAction(ISD::VAARG, VT) == TargetLowering::Custom) { Tmp3 = DAG.getVAArg(VT, Tmp1, Tmp2, Node->getOperand(2)); Result = TLI.CustomPromoteOperation(Tmp3, DAG); @@ -3228,48 +3031,34 @@ DAG.getSrcValue(0), VT); } // Remember that we legalized the chain. - AddLegalizedOperand(Op.getValue(1), Result.getValue(1)); + AddLegalizedOperand(Op.getValue(1), LegalizeOp(Result.getValue(1))); break; case ISD::LOAD: - Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain. - Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the pointer. - Result = DAG.getExtLoad(ISD::EXTLOAD, NVT, Tmp1, Tmp2, - Node->getOperand(2), VT); + Result = DAG.getExtLoad(ISD::EXTLOAD, NVT, Node->getOperand(0), + Node->getOperand(1), Node->getOperand(2), VT); // Remember that we legalized the chain. - AddLegalizedOperand(Op.getValue(1), Result.getValue(1)); + AddLegalizedOperand(Op.getValue(1), LegalizeOp(Result.getValue(1))); break; case ISD::SEXTLOAD: case ISD::ZEXTLOAD: case ISD::EXTLOAD: - Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain. - Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the pointer. - Result = DAG.getExtLoad(Node->getOpcode(), NVT, Tmp1, Tmp2, - Node->getOperand(2), + Result = DAG.getExtLoad(Node->getOpcode(), NVT, Node->getOperand(0), + Node->getOperand(1), Node->getOperand(2), cast(Node->getOperand(3))->getVT()); // Remember that we legalized the chain. - AddLegalizedOperand(Op.getValue(1), Result.getValue(1)); + AddLegalizedOperand(Op.getValue(1), LegalizeOp(Result.getValue(1))); break; case ISD::SELECT: - switch (getTypeAction(Node->getOperand(0).getValueType())) { - case Expand: assert(0 && "It's impossible to expand bools"); - case Legal: - Tmp1 = LegalizeOp(Node->getOperand(0));// Legalize the condition. - break; - case Promote: - Tmp1 = PromoteOp(Node->getOperand(0)); // Promote the condition. - break; - } Tmp2 = PromoteOp(Node->getOperand(1)); // Legalize the op0 Tmp3 = PromoteOp(Node->getOperand(2)); // Legalize the op1 - Result = DAG.getNode(ISD::SELECT, NVT, Tmp1, Tmp2, Tmp3); + Result = DAG.getNode(ISD::SELECT, NVT, Node->getOperand(0), Tmp2, Tmp3); break; case ISD::SELECT_CC: Tmp2 = PromoteOp(Node->getOperand(2)); // True Tmp3 = PromoteOp(Node->getOperand(3)); // False Result = DAG.getNode(ISD::SELECT_CC, NVT, Node->getOperand(0), - Node->getOperand(1), Tmp2, Tmp3, - Node->getOperand(4)); + Node->getOperand(1), Tmp2, Tmp3, Node->getOperand(4)); break; case ISD::BSWAP: Tmp1 = Node->getOperand(0); @@ -3282,22 +3071,20 @@ case ISD::CTPOP: case ISD::CTTZ: case ISD::CTLZ: - Tmp1 = Node->getOperand(0); - //Zero extend the argument - Tmp1 = DAG.getNode(ISD::ZERO_EXTEND, NVT, Tmp1); + // Zero extend the argument + Tmp1 = DAG.getNode(ISD::ZERO_EXTEND, NVT, Node->getOperand(0)); // Perform the larger operation, then subtract if needed. Tmp1 = DAG.getNode(Node->getOpcode(), NVT, Tmp1); - switch(Node->getOpcode()) - { + switch(Node->getOpcode()) { case ISD::CTPOP: Result = Tmp1; break; case ISD::CTTZ: - //if Tmp1 == sizeinbits(NVT) then Tmp1 = sizeinbits(Old VT) + // if Tmp1 == sizeinbits(NVT) then Tmp1 = sizeinbits(Old VT) Tmp2 = DAG.getSetCC(TLI.getSetCCResultTy(), Tmp1, DAG.getConstant(getSizeInBits(NVT), NVT), ISD::SETEQ); Result = DAG.getNode(ISD::SELECT, NVT, Tmp2, - DAG.getConstant(getSizeInBits(VT),NVT), Tmp1); + DAG.getConstant(getSizeInBits(VT), NVT), Tmp1); break; case ISD::CTLZ: //Tmp1 = Tmp1 - (sizeinbits(NVT) - sizeinbits(Old VT)) @@ -3310,6 +3097,11 @@ } assert(Result.Val && "Didn't set a result!"); + + // Make sure the result is itself legal. + Result = LegalizeOp(Result); + + // Remember that we promoted this! AddPromotedOperand(Op, Result); return Result; } @@ -3428,62 +3220,7 @@ return true; } } - // FIXME: The following code for expanding shifts using ISD::SELECT is buggy, - // so disable it for now. Currently targets are handling this via SHL_PARTS - // and friends. return false; - - // If we have an efficient select operation (or if the selects will all fold - // away), lower to some complex code, otherwise just emit the libcall. - if (!TLI.isOperationLegal(ISD::SELECT, NVT) && !isa(Amt)) - return false; - - SDOperand InL, InH; - ExpandOp(Op, InL, InH); - SDOperand NAmt = DAG.getNode(ISD::SUB, ShTy, // NAmt = 32-ShAmt - DAG.getConstant(NVTBits, ShTy), ShAmt); - - // Compare the unmasked shift amount against 32. - SDOperand Cond = DAG.getSetCC(TLI.getSetCCResultTy(), ShAmt, - DAG.getConstant(NVTBits, ShTy), ISD::SETGE); - - if (TLI.getShiftAmountFlavor() != TargetLowering::Mask) { - ShAmt = DAG.getNode(ISD::AND, ShTy, ShAmt, // ShAmt &= 31 - DAG.getConstant(NVTBits-1, ShTy)); - NAmt = DAG.getNode(ISD::AND, ShTy, NAmt, // NAmt &= 31 - DAG.getConstant(NVTBits-1, ShTy)); - } - - if (Opc == ISD::SHL) { - SDOperand T1 = DAG.getNode(ISD::OR, NVT,// T1 = (Hi << Amt) | (Lo >> NAmt) - DAG.getNode(ISD::SHL, NVT, InH, ShAmt), - DAG.getNode(ISD::SRL, NVT, InL, NAmt)); - SDOperand T2 = DAG.getNode(ISD::SHL, NVT, InL, ShAmt); // T2 = Lo << Amt&31 - - Hi = DAG.getNode(ISD::SELECT, NVT, Cond, T2, T1); - Lo = DAG.getNode(ISD::SELECT, NVT, Cond, DAG.getConstant(0, NVT), T2); - } else { - SDOperand HiLoPart = DAG.getNode(ISD::SELECT, NVT, - DAG.getSetCC(TLI.getSetCCResultTy(), NAmt, - DAG.getConstant(32, ShTy), - ISD::SETEQ), - DAG.getConstant(0, NVT), - DAG.getNode(ISD::SHL, NVT, InH, NAmt)); - SDOperand T1 = DAG.getNode(ISD::OR, NVT,// T1 = (Hi << NAmt) | (Lo >> Amt) - HiLoPart, - DAG.getNode(ISD::SRL, NVT, InL, ShAmt)); - SDOperand T2 = DAG.getNode(Opc, NVT, InH, ShAmt); // T2 = InH >> ShAmt&31 - - SDOperand HiPart; - if (Opc == ISD::SRA) - HiPart = DAG.getNode(ISD::SRA, NVT, InH, - DAG.getConstant(NVTBits-1, ShTy)); - else - HiPart = DAG.getConstant(0, NVT); - Lo = DAG.getNode(ISD::SELECT, NVT, Cond, T2, T1); - Hi = DAG.getNode(ISD::SELECT, NVT, Cond, HiPart, T2); - } - return true; } /// FindLatestCallSeqStart - Scan up the dag to find the latest (highest @@ -3677,11 +3414,8 @@ switch (getTypeAction(CallInfo.first.getValueType())) { default: assert(0 && "Unknown thing"); case Legal: - // If the result is legal, make sure that we relegalize the inserted result. - Result = LegalizeOp(CallInfo.first); + Result = CallInfo.first; break; - case Promote: - assert(0 && "Cannot promote this yet!"); case Expand: ExpandOp(CallInfo.first, Result, Hi); break; @@ -4031,21 +3765,11 @@ break; } case ISD::SELECT: { - SDOperand C, LL, LH, RL, RH; - - switch (getTypeAction(Node->getOperand(0).getValueType())) { - case Expand: assert(0 && "It's impossible to expand bools"); - case Legal: - C = LegalizeOp(Node->getOperand(0)); // Legalize the condition. - break; - case Promote: - C = PromoteOp(Node->getOperand(0)); // Promote the condition. - break; - } + SDOperand LL, LH, RL, RH; ExpandOp(Node->getOperand(1), LL, LH); ExpandOp(Node->getOperand(2), RL, RH); - Lo = DAG.getNode(ISD::SELECT, NVT, C, LL, RL); - Hi = DAG.getNode(ISD::SELECT, NVT, C, LH, RH); + Lo = DAG.getNode(ISD::SELECT, NVT, Node->getOperand(0), LL, RL); + Hi = DAG.getNode(ISD::SELECT, NVT, Node->getOperand(0), LH, RH); break; } case ISD::SELECT_CC: { @@ -4394,6 +4118,6 @@ void SelectionDAG::Legalize() { /// run - This is the main entry point to this class. /// - SelectionDAGLegalize(*this).Run(); + SelectionDAGLegalize(*this).LegalizeDAG(); } From lattner at cs.uiuc.edu Sat Jan 28 01:42:20 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Sat, 28 Jan 2006 01:42:20 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Message-ID: <200601280742.BAA03122@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/SelectionDAG: LegalizeDAG.cpp updated: 1.284 -> 1.285 --- Log message: fix a bug --- Diffs of the changes: (+1 -2) LegalizeDAG.cpp | 3 +-- 1 files changed, 1 insertion(+), 2 deletions(-) Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.284 llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.285 --- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.284 Sat Jan 28 01:39:30 2006 +++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Sat Jan 28 01:42:08 2006 @@ -2215,14 +2215,13 @@ Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain. Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the pointer. - MVT::ValueType VT; + MVT::ValueType VT = Node->getValueType(0); switch (TLI.getOperationAction(Node->getOpcode(), MVT::Other)) { default: assert(0 && "This action is not supported yet!"); case TargetLowering::Custom: isCustom = true; // FALLTHROUGH case TargetLowering::Legal: - VT = Node->getValueType(0); if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1)) Result = DAG.getVAArg(VT, Tmp1, Tmp2, Node->getOperand(2)); else From lattner at cs.uiuc.edu Sat Jan 28 02:23:09 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Sat, 28 Jan 2006 02:23:09 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Message-ID: <200601280823.CAA09955@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/SelectionDAG: LegalizeDAG.cpp updated: 1.285 -> 1.286 --- Log message: remove a couple more now-extraneous legalizeop's --- Diffs of the changes: (+5 -9) LegalizeDAG.cpp | 14 +++++--------- 1 files changed, 5 insertions(+), 9 deletions(-) Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.285 llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.286 --- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.285 Sat Jan 28 01:42:08 2006 +++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Sat Jan 28 02:22:56 2006 @@ -215,7 +215,7 @@ // if f32 then cast to f32 Result = DAG.getNode(ISD::FP_ROUND, MVT::f32, Sub); } - return LegalizeOp(Result); + return Result; } assert(!isSigned && "Legalize cannot Expand SINT_TO_FP for i64 yet"); SDOperand Tmp1 = DAG.getNode(ISD::SINT_TO_FP, DestVT, Op0); @@ -254,7 +254,7 @@ DAG.getSrcValue(NULL), MVT::f32)); } - return LegalizeOp(DAG.getNode(ISD::FADD, DestVT, Tmp1, FudgeInReg)); + return DAG.getNode(ISD::FADD, DestVT, Tmp1, FudgeInReg); } /// PromoteLegalINT_TO_FP - This function is responsible for legalizing a @@ -307,11 +307,9 @@ // Okay, we found the operation and type to use. Zero extend our input to the // desired type then run the operation on it. - SDOperand N = DAG.getNode(OpToUse, DestVT, + return DAG.getNode(OpToUse, DestVT, DAG.getNode(isSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND, NewInTy, LegalOp)); - // Make sure to legalize any nodes we create here. - return LegalizeOp(N); } /// PromoteLegalFP_TO_INT - This function is responsible for legalizing a @@ -363,10 +361,8 @@ // Okay, we found the operation and type to use. Truncate the result of the // extended FP_TO_*INT operation to the desired size. - SDOperand N = DAG.getNode(ISD::TRUNCATE, DestVT, - DAG.getNode(OpToUse, NewOutTy, LegalOp)); - // Make sure to legalize any nodes we create here in the next pass. - return LegalizeOp(N); + return DAG.getNode(ISD::TRUNCATE, DestVT, + DAG.getNode(OpToUse, NewOutTy, LegalOp)); } /// ExpandBSWAP - Open code the operations for BSWAP of the specified operation. From lattner at cs.uiuc.edu Sat Jan 28 02:26:10 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Sat, 28 Jan 2006 02:26:10 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Message-ID: <200601280826.CAA11291@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/SelectionDAG: LegalizeDAG.cpp updated: 1.286 -> 1.287 --- Log message: move a bunch of code, no other change. --- Diffs of the changes: (+415 -417) LegalizeDAG.cpp | 832 +++++++++++++++++++++++++++----------------------------- 1 files changed, 415 insertions(+), 417 deletions(-) Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.286 llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.287 --- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.286 Sat Jan 28 02:22:56 2006 +++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Sat Jan 28 02:25:58 2006 @@ -152,332 +152,6 @@ "Too many value types for ValueTypeActions to hold!"); } -/// ExpandLegalINT_TO_FP - This function is responsible for legalizing a -/// INT_TO_FP operation of the specified operand when the target requests that -/// we expand it. At this point, we know that the result and operand types are -/// legal for the target. -SDOperand SelectionDAGLegalize::ExpandLegalINT_TO_FP(bool isSigned, - SDOperand Op0, - MVT::ValueType DestVT) { - if (Op0.getValueType() == MVT::i32) { - // simple 32-bit [signed|unsigned] integer to float/double expansion - - // get the stack frame index of a 8 byte buffer - MachineFunction &MF = DAG.getMachineFunction(); - int SSFI = MF.getFrameInfo()->CreateStackObject(8, 8); - // get address of 8 byte buffer - SDOperand StackSlot = DAG.getFrameIndex(SSFI, TLI.getPointerTy()); - // word offset constant for Hi/Lo address computation - SDOperand WordOff = DAG.getConstant(sizeof(int), TLI.getPointerTy()); - // set up Hi and Lo (into buffer) address based on endian - SDOperand Hi, Lo; - if (TLI.isLittleEndian()) { - Hi = DAG.getNode(ISD::ADD, TLI.getPointerTy(), StackSlot, WordOff); - Lo = StackSlot; - } else { - Hi = StackSlot; - Lo = DAG.getNode(ISD::ADD, TLI.getPointerTy(), StackSlot, WordOff); - } - // if signed map to unsigned space - SDOperand Op0Mapped; - if (isSigned) { - // constant used to invert sign bit (signed to unsigned mapping) - SDOperand SignBit = DAG.getConstant(0x80000000u, MVT::i32); - Op0Mapped = DAG.getNode(ISD::XOR, MVT::i32, Op0, SignBit); - } else { - Op0Mapped = Op0; - } - // store the lo of the constructed double - based on integer input - SDOperand Store1 = DAG.getNode(ISD::STORE, MVT::Other, DAG.getEntryNode(), - Op0Mapped, Lo, DAG.getSrcValue(NULL)); - // initial hi portion of constructed double - SDOperand InitialHi = DAG.getConstant(0x43300000u, MVT::i32); - // store the hi of the constructed double - biased exponent - SDOperand Store2 = DAG.getNode(ISD::STORE, MVT::Other, Store1, - InitialHi, Hi, DAG.getSrcValue(NULL)); - // load the constructed double - SDOperand Load = DAG.getLoad(MVT::f64, Store2, StackSlot, - DAG.getSrcValue(NULL)); - // FP constant to bias correct the final result - SDOperand Bias = DAG.getConstantFP(isSigned ? - BitsToDouble(0x4330000080000000ULL) - : BitsToDouble(0x4330000000000000ULL), - MVT::f64); - // subtract the bias - SDOperand Sub = DAG.getNode(ISD::FSUB, MVT::f64, Load, Bias); - // final result - SDOperand Result; - // handle final rounding - if (DestVT == MVT::f64) { - // do nothing - Result = Sub; - } else { - // if f32 then cast to f32 - Result = DAG.getNode(ISD::FP_ROUND, MVT::f32, Sub); - } - return Result; - } - assert(!isSigned && "Legalize cannot Expand SINT_TO_FP for i64 yet"); - SDOperand Tmp1 = DAG.getNode(ISD::SINT_TO_FP, DestVT, Op0); - - SDOperand SignSet = DAG.getSetCC(TLI.getSetCCResultTy(), Op0, - DAG.getConstant(0, Op0.getValueType()), - ISD::SETLT); - SDOperand Zero = getIntPtrConstant(0), Four = getIntPtrConstant(4); - SDOperand CstOffset = DAG.getNode(ISD::SELECT, Zero.getValueType(), - SignSet, Four, Zero); - - // If the sign bit of the integer is set, the large number will be treated - // as a negative number. To counteract this, the dynamic code adds an - // offset depending on the data type. - uint64_t FF; - switch (Op0.getValueType()) { - default: assert(0 && "Unsupported integer type!"); - case MVT::i8 : FF = 0x43800000ULL; break; // 2^8 (as a float) - case MVT::i16: FF = 0x47800000ULL; break; // 2^16 (as a float) - case MVT::i32: FF = 0x4F800000ULL; break; // 2^32 (as a float) - case MVT::i64: FF = 0x5F800000ULL; break; // 2^64 (as a float) - } - if (TLI.isLittleEndian()) FF <<= 32; - static Constant *FudgeFactor = ConstantUInt::get(Type::ULongTy, FF); - - SDOperand CPIdx = DAG.getConstantPool(FudgeFactor, TLI.getPointerTy()); - CPIdx = DAG.getNode(ISD::ADD, TLI.getPointerTy(), CPIdx, CstOffset); - SDOperand FudgeInReg; - if (DestVT == MVT::f32) - FudgeInReg = DAG.getLoad(MVT::f32, DAG.getEntryNode(), CPIdx, - DAG.getSrcValue(NULL)); - else { - assert(DestVT == MVT::f64 && "Unexpected conversion"); - FudgeInReg = LegalizeOp(DAG.getExtLoad(ISD::EXTLOAD, MVT::f64, - DAG.getEntryNode(), CPIdx, - DAG.getSrcValue(NULL), MVT::f32)); - } - - return DAG.getNode(ISD::FADD, DestVT, Tmp1, FudgeInReg); -} - -/// PromoteLegalINT_TO_FP - This function is responsible for legalizing a -/// *INT_TO_FP operation of the specified operand when the target requests that -/// we promote it. At this point, we know that the result and operand types are -/// legal for the target, and that there is a legal UINT_TO_FP or SINT_TO_FP -/// operation that takes a larger input. -SDOperand SelectionDAGLegalize::PromoteLegalINT_TO_FP(SDOperand LegalOp, - MVT::ValueType DestVT, - bool isSigned) { - // First step, figure out the appropriate *INT_TO_FP operation to use. - MVT::ValueType NewInTy = LegalOp.getValueType(); - - unsigned OpToUse = 0; - - // Scan for the appropriate larger type to use. - while (1) { - NewInTy = (MVT::ValueType)(NewInTy+1); - assert(MVT::isInteger(NewInTy) && "Ran out of possibilities!"); - - // If the target supports SINT_TO_FP of this type, use it. - switch (TLI.getOperationAction(ISD::SINT_TO_FP, NewInTy)) { - default: break; - case TargetLowering::Legal: - if (!TLI.isTypeLegal(NewInTy)) - break; // Can't use this datatype. - // FALL THROUGH. - case TargetLowering::Custom: - OpToUse = ISD::SINT_TO_FP; - break; - } - if (OpToUse) break; - if (isSigned) continue; - - // If the target supports UINT_TO_FP of this type, use it. - switch (TLI.getOperationAction(ISD::UINT_TO_FP, NewInTy)) { - default: break; - case TargetLowering::Legal: - if (!TLI.isTypeLegal(NewInTy)) - break; // Can't use this datatype. - // FALL THROUGH. - case TargetLowering::Custom: - OpToUse = ISD::UINT_TO_FP; - break; - } - if (OpToUse) break; - - // Otherwise, try a larger type. - } - - // Okay, we found the operation and type to use. Zero extend our input to the - // desired type then run the operation on it. - return DAG.getNode(OpToUse, DestVT, - DAG.getNode(isSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND, - NewInTy, LegalOp)); -} - -/// PromoteLegalFP_TO_INT - This function is responsible for legalizing a -/// FP_TO_*INT operation of the specified operand when the target requests that -/// we promote it. At this point, we know that the result and operand types are -/// legal for the target, and that there is a legal FP_TO_UINT or FP_TO_SINT -/// operation that returns a larger result. -SDOperand SelectionDAGLegalize::PromoteLegalFP_TO_INT(SDOperand LegalOp, - MVT::ValueType DestVT, - bool isSigned) { - // First step, figure out the appropriate FP_TO*INT operation to use. - MVT::ValueType NewOutTy = DestVT; - - unsigned OpToUse = 0; - - // Scan for the appropriate larger type to use. - while (1) { - NewOutTy = (MVT::ValueType)(NewOutTy+1); - assert(MVT::isInteger(NewOutTy) && "Ran out of possibilities!"); - - // If the target supports FP_TO_SINT returning this type, use it. - switch (TLI.getOperationAction(ISD::FP_TO_SINT, NewOutTy)) { - default: break; - case TargetLowering::Legal: - if (!TLI.isTypeLegal(NewOutTy)) - break; // Can't use this datatype. - // FALL THROUGH. - case TargetLowering::Custom: - OpToUse = ISD::FP_TO_SINT; - break; - } - if (OpToUse) break; - - // If the target supports FP_TO_UINT of this type, use it. - switch (TLI.getOperationAction(ISD::FP_TO_UINT, NewOutTy)) { - default: break; - case TargetLowering::Legal: - if (!TLI.isTypeLegal(NewOutTy)) - break; // Can't use this datatype. - // FALL THROUGH. - case TargetLowering::Custom: - OpToUse = ISD::FP_TO_UINT; - break; - } - if (OpToUse) break; - - // Otherwise, try a larger type. - } - - // Okay, we found the operation and type to use. Truncate the result of the - // extended FP_TO_*INT operation to the desired size. - return DAG.getNode(ISD::TRUNCATE, DestVT, - DAG.getNode(OpToUse, NewOutTy, LegalOp)); -} - -/// ExpandBSWAP - Open code the operations for BSWAP of the specified operation. -/// -SDOperand SelectionDAGLegalize::ExpandBSWAP(SDOperand Op) { - MVT::ValueType VT = Op.getValueType(); - MVT::ValueType SHVT = TLI.getShiftAmountTy(); - SDOperand Tmp1, Tmp2, Tmp3, Tmp4, Tmp5, Tmp6, Tmp7, Tmp8; - switch (VT) { - default: assert(0 && "Unhandled Expand type in BSWAP!"); abort(); - case MVT::i16: - Tmp2 = DAG.getNode(ISD::SHL, VT, Op, DAG.getConstant(8, SHVT)); - Tmp1 = DAG.getNode(ISD::SRL, VT, Op, DAG.getConstant(8, SHVT)); - return DAG.getNode(ISD::OR, VT, Tmp1, Tmp2); - case MVT::i32: - Tmp4 = DAG.getNode(ISD::SHL, VT, Op, DAG.getConstant(24, SHVT)); - Tmp3 = DAG.getNode(ISD::SHL, VT, Op, DAG.getConstant(8, SHVT)); - Tmp2 = DAG.getNode(ISD::SRL, VT, Op, DAG.getConstant(8, SHVT)); - Tmp1 = DAG.getNode(ISD::SRL, VT, Op, DAG.getConstant(24, SHVT)); - Tmp3 = DAG.getNode(ISD::AND, VT, Tmp3, DAG.getConstant(0xFF0000, VT)); - Tmp2 = DAG.getNode(ISD::AND, VT, Tmp2, DAG.getConstant(0xFF00, VT)); - Tmp4 = DAG.getNode(ISD::OR, VT, Tmp4, Tmp3); - Tmp2 = DAG.getNode(ISD::OR, VT, Tmp2, Tmp1); - return DAG.getNode(ISD::OR, VT, Tmp4, Tmp2); - case MVT::i64: - Tmp8 = DAG.getNode(ISD::SHL, VT, Op, DAG.getConstant(56, SHVT)); - Tmp7 = DAG.getNode(ISD::SHL, VT, Op, DAG.getConstant(40, SHVT)); - Tmp6 = DAG.getNode(ISD::SHL, VT, Op, DAG.getConstant(24, SHVT)); - Tmp5 = DAG.getNode(ISD::SHL, VT, Op, DAG.getConstant(8, SHVT)); - Tmp4 = DAG.getNode(ISD::SRL, VT, Op, DAG.getConstant(8, SHVT)); - Tmp3 = DAG.getNode(ISD::SRL, VT, Op, DAG.getConstant(24, SHVT)); - Tmp2 = DAG.getNode(ISD::SRL, VT, Op, DAG.getConstant(40, SHVT)); - Tmp1 = DAG.getNode(ISD::SRL, VT, Op, DAG.getConstant(56, SHVT)); - Tmp7 = DAG.getNode(ISD::AND, VT, Tmp7, DAG.getConstant(255ULL<<48, VT)); - Tmp6 = DAG.getNode(ISD::AND, VT, Tmp6, DAG.getConstant(255ULL<<40, VT)); - Tmp5 = DAG.getNode(ISD::AND, VT, Tmp5, DAG.getConstant(255ULL<<32, VT)); - Tmp4 = DAG.getNode(ISD::AND, VT, Tmp4, DAG.getConstant(255ULL<<24, VT)); - Tmp3 = DAG.getNode(ISD::AND, VT, Tmp3, DAG.getConstant(255ULL<<16, VT)); - Tmp2 = DAG.getNode(ISD::AND, VT, Tmp2, DAG.getConstant(255ULL<<8 , VT)); - Tmp8 = DAG.getNode(ISD::OR, VT, Tmp8, Tmp7); - Tmp6 = DAG.getNode(ISD::OR, VT, Tmp6, Tmp5); - Tmp4 = DAG.getNode(ISD::OR, VT, Tmp4, Tmp3); - Tmp2 = DAG.getNode(ISD::OR, VT, Tmp2, Tmp1); - Tmp8 = DAG.getNode(ISD::OR, VT, Tmp8, Tmp6); - Tmp4 = DAG.getNode(ISD::OR, VT, Tmp4, Tmp2); - return DAG.getNode(ISD::OR, VT, Tmp8, Tmp4); - } -} - -/// ExpandBitCount - Expand the specified bitcount instruction into operations. -/// -SDOperand SelectionDAGLegalize::ExpandBitCount(unsigned Opc, SDOperand Op) { - switch (Opc) { - default: assert(0 && "Cannot expand this yet!"); - case ISD::CTPOP: { - static const uint64_t mask[6] = { - 0x5555555555555555ULL, 0x3333333333333333ULL, - 0x0F0F0F0F0F0F0F0FULL, 0x00FF00FF00FF00FFULL, - 0x0000FFFF0000FFFFULL, 0x00000000FFFFFFFFULL - }; - MVT::ValueType VT = Op.getValueType(); - MVT::ValueType ShVT = TLI.getShiftAmountTy(); - unsigned len = getSizeInBits(VT); - for (unsigned i = 0; (1U << i) <= (len / 2); ++i) { - //x = (x & mask[i][len/8]) + (x >> (1 << i) & mask[i][len/8]) - SDOperand Tmp2 = DAG.getConstant(mask[i], VT); - SDOperand Tmp3 = DAG.getConstant(1ULL << i, ShVT); - Op = DAG.getNode(ISD::ADD, VT, DAG.getNode(ISD::AND, VT, Op, Tmp2), - DAG.getNode(ISD::AND, VT, - DAG.getNode(ISD::SRL, VT, Op, Tmp3),Tmp2)); - } - return Op; - } - case ISD::CTLZ: { - // for now, we do this: - // x = x | (x >> 1); - // x = x | (x >> 2); - // ... - // x = x | (x >>16); - // x = x | (x >>32); // for 64-bit input - // return popcount(~x); - // - // but see also: http://www.hackersdelight.org/HDcode/nlz.cc - MVT::ValueType VT = Op.getValueType(); - MVT::ValueType ShVT = TLI.getShiftAmountTy(); - unsigned len = getSizeInBits(VT); - for (unsigned i = 0; (1U << i) <= (len / 2); ++i) { - SDOperand Tmp3 = DAG.getConstant(1ULL << i, ShVT); - Op = DAG.getNode(ISD::OR, VT, Op, DAG.getNode(ISD::SRL, VT, Op, Tmp3)); - } - Op = DAG.getNode(ISD::XOR, VT, Op, DAG.getConstant(~0ULL, VT)); - return DAG.getNode(ISD::CTPOP, VT, Op); - } - case ISD::CTTZ: { - // for now, we use: { return popcount(~x & (x - 1)); } - // unless the target has ctlz but not ctpop, in which case we use: - // { return 32 - nlz(~x & (x-1)); } - // see also http://www.hackersdelight.org/HDcode/ntz.cc - MVT::ValueType VT = Op.getValueType(); - SDOperand Tmp2 = DAG.getConstant(~0ULL, VT); - SDOperand Tmp3 = DAG.getNode(ISD::AND, VT, - DAG.getNode(ISD::XOR, VT, Op, Tmp2), - DAG.getNode(ISD::SUB, VT, Op, DAG.getConstant(1, VT))); - // If ISD::CTLZ is legal and CTPOP isn't, then do that instead. - if (!TLI.isOperationLegal(ISD::CTPOP, VT) && - TLI.isOperationLegal(ISD::CTLZ, VT)) - return DAG.getNode(ISD::SUB, VT, - DAG.getConstant(getSizeInBits(VT), VT), - DAG.getNode(ISD::CTLZ, VT, Tmp3)); - return DAG.getNode(ISD::CTPOP, VT, Tmp3); - } - } -} - - /// ComputeTopDownOrdering - Add the specified node to the Order list if it has /// not been visited yet and if all of its operands have already been visited. static void ComputeTopDownOrdering(SDNode *N, std::vector &Order, @@ -3416,111 +3090,435 @@ break; } - CallInfo.second = LegalizeOp(CallInfo.second); - SpliceCallInto(CallInfo.second, OutChain); - return Result; + CallInfo.second = LegalizeOp(CallInfo.second); + SpliceCallInto(CallInfo.second, OutChain); + return Result; +} + + +/// ExpandIntToFP - Expand a [US]INT_TO_FP operation, assuming that the +/// destination type is legal. +SDOperand SelectionDAGLegalize:: +ExpandIntToFP(bool isSigned, MVT::ValueType DestTy, SDOperand Source) { + assert(isTypeLegal(DestTy) && "Destination type is not legal!"); + assert(getTypeAction(Source.getValueType()) == Expand && + "This is not an expansion!"); + assert(Source.getValueType() == MVT::i64 && "Only handle expand from i64!"); + + if (!isSigned) { + assert(Source.getValueType() == MVT::i64 && + "This only works for 64-bit -> FP"); + // The 64-bit value loaded will be incorrectly if the 'sign bit' of the + // incoming integer is set. To handle this, we dynamically test to see if + // it is set, and, if so, add a fudge factor. + SDOperand Lo, Hi; + ExpandOp(Source, Lo, Hi); + + // If this is unsigned, and not supported, first perform the conversion to + // signed, then adjust the result if the sign bit is set. + SDOperand SignedConv = ExpandIntToFP(true, DestTy, + DAG.getNode(ISD::BUILD_PAIR, Source.getValueType(), Lo, Hi)); + + SDOperand SignSet = DAG.getSetCC(TLI.getSetCCResultTy(), Hi, + DAG.getConstant(0, Hi.getValueType()), + ISD::SETLT); + SDOperand Zero = getIntPtrConstant(0), Four = getIntPtrConstant(4); + SDOperand CstOffset = DAG.getNode(ISD::SELECT, Zero.getValueType(), + SignSet, Four, Zero); + uint64_t FF = 0x5f800000ULL; + if (TLI.isLittleEndian()) FF <<= 32; + static Constant *FudgeFactor = ConstantUInt::get(Type::ULongTy, FF); + + SDOperand CPIdx = DAG.getConstantPool(FudgeFactor, TLI.getPointerTy()); + CPIdx = DAG.getNode(ISD::ADD, TLI.getPointerTy(), CPIdx, CstOffset); + SDOperand FudgeInReg; + if (DestTy == MVT::f32) + FudgeInReg = DAG.getLoad(MVT::f32, DAG.getEntryNode(), CPIdx, + DAG.getSrcValue(NULL)); + else { + assert(DestTy == MVT::f64 && "Unexpected conversion"); + FudgeInReg = DAG.getExtLoad(ISD::EXTLOAD, MVT::f64, DAG.getEntryNode(), + CPIdx, DAG.getSrcValue(NULL), MVT::f32); + } + return DAG.getNode(ISD::FADD, DestTy, SignedConv, FudgeInReg); + } + + // Check to see if the target has a custom way to lower this. If so, use it. + switch (TLI.getOperationAction(ISD::SINT_TO_FP, Source.getValueType())) { + default: assert(0 && "This action not implemented for this operation!"); + case TargetLowering::Legal: + case TargetLowering::Expand: + break; // This case is handled below. + case TargetLowering::Custom: { + SDOperand NV = TLI.LowerOperation(DAG.getNode(ISD::SINT_TO_FP, DestTy, + Source), DAG); + if (NV.Val) + return LegalizeOp(NV); + break; // The target decided this was legal after all + } + } + + // Expand the source, then glue it back together for the call. We must expand + // the source in case it is shared (this pass of legalize must traverse it). + SDOperand SrcLo, SrcHi; + ExpandOp(Source, SrcLo, SrcHi); + Source = DAG.getNode(ISD::BUILD_PAIR, Source.getValueType(), SrcLo, SrcHi); + + SDNode *OutChain = 0; + SDOperand InChain = FindInputOutputChains(Source.Val, OutChain, + DAG.getEntryNode()); + const char *FnName = 0; + if (DestTy == MVT::f32) + FnName = "__floatdisf"; + else { + assert(DestTy == MVT::f64 && "Unknown fp value type!"); + FnName = "__floatdidf"; + } + + SDOperand Callee = DAG.getExternalSymbol(FnName, TLI.getPointerTy()); + + TargetLowering::ArgListTy Args; + const Type *ArgTy = MVT::getTypeForValueType(Source.getValueType()); + + Args.push_back(std::make_pair(Source, ArgTy)); + + // We don't care about token chains for libcalls. We just use the entry + // node as our input and ignore the output chain. This allows us to place + // calls wherever we need them to satisfy data dependences. + const Type *RetTy = MVT::getTypeForValueType(DestTy); + + std::pair CallResult = + TLI.LowerCallTo(InChain, RetTy, false, CallingConv::C, true, + Callee, Args, DAG); + + SpliceCallInto(CallResult.second, OutChain); + return CallResult.first; +} + +/// ExpandLegalINT_TO_FP - This function is responsible for legalizing a +/// INT_TO_FP operation of the specified operand when the target requests that +/// we expand it. At this point, we know that the result and operand types are +/// legal for the target. +SDOperand SelectionDAGLegalize::ExpandLegalINT_TO_FP(bool isSigned, + SDOperand Op0, + MVT::ValueType DestVT) { + if (Op0.getValueType() == MVT::i32) { + // simple 32-bit [signed|unsigned] integer to float/double expansion + + // get the stack frame index of a 8 byte buffer + MachineFunction &MF = DAG.getMachineFunction(); + int SSFI = MF.getFrameInfo()->CreateStackObject(8, 8); + // get address of 8 byte buffer + SDOperand StackSlot = DAG.getFrameIndex(SSFI, TLI.getPointerTy()); + // word offset constant for Hi/Lo address computation + SDOperand WordOff = DAG.getConstant(sizeof(int), TLI.getPointerTy()); + // set up Hi and Lo (into buffer) address based on endian + SDOperand Hi, Lo; + if (TLI.isLittleEndian()) { + Hi = DAG.getNode(ISD::ADD, TLI.getPointerTy(), StackSlot, WordOff); + Lo = StackSlot; + } else { + Hi = StackSlot; + Lo = DAG.getNode(ISD::ADD, TLI.getPointerTy(), StackSlot, WordOff); + } + // if signed map to unsigned space + SDOperand Op0Mapped; + if (isSigned) { + // constant used to invert sign bit (signed to unsigned mapping) + SDOperand SignBit = DAG.getConstant(0x80000000u, MVT::i32); + Op0Mapped = DAG.getNode(ISD::XOR, MVT::i32, Op0, SignBit); + } else { + Op0Mapped = Op0; + } + // store the lo of the constructed double - based on integer input + SDOperand Store1 = DAG.getNode(ISD::STORE, MVT::Other, DAG.getEntryNode(), + Op0Mapped, Lo, DAG.getSrcValue(NULL)); + // initial hi portion of constructed double + SDOperand InitialHi = DAG.getConstant(0x43300000u, MVT::i32); + // store the hi of the constructed double - biased exponent + SDOperand Store2 = DAG.getNode(ISD::STORE, MVT::Other, Store1, + InitialHi, Hi, DAG.getSrcValue(NULL)); + // load the constructed double + SDOperand Load = DAG.getLoad(MVT::f64, Store2, StackSlot, + DAG.getSrcValue(NULL)); + // FP constant to bias correct the final result + SDOperand Bias = DAG.getConstantFP(isSigned ? + BitsToDouble(0x4330000080000000ULL) + : BitsToDouble(0x4330000000000000ULL), + MVT::f64); + // subtract the bias + SDOperand Sub = DAG.getNode(ISD::FSUB, MVT::f64, Load, Bias); + // final result + SDOperand Result; + // handle final rounding + if (DestVT == MVT::f64) { + // do nothing + Result = Sub; + } else { + // if f32 then cast to f32 + Result = DAG.getNode(ISD::FP_ROUND, MVT::f32, Sub); + } + return Result; + } + assert(!isSigned && "Legalize cannot Expand SINT_TO_FP for i64 yet"); + SDOperand Tmp1 = DAG.getNode(ISD::SINT_TO_FP, DestVT, Op0); + + SDOperand SignSet = DAG.getSetCC(TLI.getSetCCResultTy(), Op0, + DAG.getConstant(0, Op0.getValueType()), + ISD::SETLT); + SDOperand Zero = getIntPtrConstant(0), Four = getIntPtrConstant(4); + SDOperand CstOffset = DAG.getNode(ISD::SELECT, Zero.getValueType(), + SignSet, Four, Zero); + + // If the sign bit of the integer is set, the large number will be treated + // as a negative number. To counteract this, the dynamic code adds an + // offset depending on the data type. + uint64_t FF; + switch (Op0.getValueType()) { + default: assert(0 && "Unsupported integer type!"); + case MVT::i8 : FF = 0x43800000ULL; break; // 2^8 (as a float) + case MVT::i16: FF = 0x47800000ULL; break; // 2^16 (as a float) + case MVT::i32: FF = 0x4F800000ULL; break; // 2^32 (as a float) + case MVT::i64: FF = 0x5F800000ULL; break; // 2^64 (as a float) + } + if (TLI.isLittleEndian()) FF <<= 32; + static Constant *FudgeFactor = ConstantUInt::get(Type::ULongTy, FF); + + SDOperand CPIdx = DAG.getConstantPool(FudgeFactor, TLI.getPointerTy()); + CPIdx = DAG.getNode(ISD::ADD, TLI.getPointerTy(), CPIdx, CstOffset); + SDOperand FudgeInReg; + if (DestVT == MVT::f32) + FudgeInReg = DAG.getLoad(MVT::f32, DAG.getEntryNode(), CPIdx, + DAG.getSrcValue(NULL)); + else { + assert(DestVT == MVT::f64 && "Unexpected conversion"); + FudgeInReg = LegalizeOp(DAG.getExtLoad(ISD::EXTLOAD, MVT::f64, + DAG.getEntryNode(), CPIdx, + DAG.getSrcValue(NULL), MVT::f32)); + } + + return DAG.getNode(ISD::FADD, DestVT, Tmp1, FudgeInReg); +} + +/// PromoteLegalINT_TO_FP - This function is responsible for legalizing a +/// *INT_TO_FP operation of the specified operand when the target requests that +/// we promote it. At this point, we know that the result and operand types are +/// legal for the target, and that there is a legal UINT_TO_FP or SINT_TO_FP +/// operation that takes a larger input. +SDOperand SelectionDAGLegalize::PromoteLegalINT_TO_FP(SDOperand LegalOp, + MVT::ValueType DestVT, + bool isSigned) { + // First step, figure out the appropriate *INT_TO_FP operation to use. + MVT::ValueType NewInTy = LegalOp.getValueType(); + + unsigned OpToUse = 0; + + // Scan for the appropriate larger type to use. + while (1) { + NewInTy = (MVT::ValueType)(NewInTy+1); + assert(MVT::isInteger(NewInTy) && "Ran out of possibilities!"); + + // If the target supports SINT_TO_FP of this type, use it. + switch (TLI.getOperationAction(ISD::SINT_TO_FP, NewInTy)) { + default: break; + case TargetLowering::Legal: + if (!TLI.isTypeLegal(NewInTy)) + break; // Can't use this datatype. + // FALL THROUGH. + case TargetLowering::Custom: + OpToUse = ISD::SINT_TO_FP; + break; + } + if (OpToUse) break; + if (isSigned) continue; + + // If the target supports UINT_TO_FP of this type, use it. + switch (TLI.getOperationAction(ISD::UINT_TO_FP, NewInTy)) { + default: break; + case TargetLowering::Legal: + if (!TLI.isTypeLegal(NewInTy)) + break; // Can't use this datatype. + // FALL THROUGH. + case TargetLowering::Custom: + OpToUse = ISD::UINT_TO_FP; + break; + } + if (OpToUse) break; + + // Otherwise, try a larger type. + } + + // Okay, we found the operation and type to use. Zero extend our input to the + // desired type then run the operation on it. + return DAG.getNode(OpToUse, DestVT, + DAG.getNode(isSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND, + NewInTy, LegalOp)); } +/// PromoteLegalFP_TO_INT - This function is responsible for legalizing a +/// FP_TO_*INT operation of the specified operand when the target requests that +/// we promote it. At this point, we know that the result and operand types are +/// legal for the target, and that there is a legal FP_TO_UINT or FP_TO_SINT +/// operation that returns a larger result. +SDOperand SelectionDAGLegalize::PromoteLegalFP_TO_INT(SDOperand LegalOp, + MVT::ValueType DestVT, + bool isSigned) { + // First step, figure out the appropriate FP_TO*INT operation to use. + MVT::ValueType NewOutTy = DestVT; -/// ExpandIntToFP - Expand a [US]INT_TO_FP operation, assuming that the -/// destination type is legal. -SDOperand SelectionDAGLegalize:: -ExpandIntToFP(bool isSigned, MVT::ValueType DestTy, SDOperand Source) { - assert(isTypeLegal(DestTy) && "Destination type is not legal!"); - assert(getTypeAction(Source.getValueType()) == Expand && - "This is not an expansion!"); - assert(Source.getValueType() == MVT::i64 && "Only handle expand from i64!"); - - if (!isSigned) { - assert(Source.getValueType() == MVT::i64 && - "This only works for 64-bit -> FP"); - // The 64-bit value loaded will be incorrectly if the 'sign bit' of the - // incoming integer is set. To handle this, we dynamically test to see if - // it is set, and, if so, add a fudge factor. - SDOperand Lo, Hi; - ExpandOp(Source, Lo, Hi); + unsigned OpToUse = 0; - // If this is unsigned, and not supported, first perform the conversion to - // signed, then adjust the result if the sign bit is set. - SDOperand SignedConv = ExpandIntToFP(true, DestTy, - DAG.getNode(ISD::BUILD_PAIR, Source.getValueType(), Lo, Hi)); + // Scan for the appropriate larger type to use. + while (1) { + NewOutTy = (MVT::ValueType)(NewOutTy+1); + assert(MVT::isInteger(NewOutTy) && "Ran out of possibilities!"); - SDOperand SignSet = DAG.getSetCC(TLI.getSetCCResultTy(), Hi, - DAG.getConstant(0, Hi.getValueType()), - ISD::SETLT); - SDOperand Zero = getIntPtrConstant(0), Four = getIntPtrConstant(4); - SDOperand CstOffset = DAG.getNode(ISD::SELECT, Zero.getValueType(), - SignSet, Four, Zero); - uint64_t FF = 0x5f800000ULL; - if (TLI.isLittleEndian()) FF <<= 32; - static Constant *FudgeFactor = ConstantUInt::get(Type::ULongTy, FF); + // If the target supports FP_TO_SINT returning this type, use it. + switch (TLI.getOperationAction(ISD::FP_TO_SINT, NewOutTy)) { + default: break; + case TargetLowering::Legal: + if (!TLI.isTypeLegal(NewOutTy)) + break; // Can't use this datatype. + // FALL THROUGH. + case TargetLowering::Custom: + OpToUse = ISD::FP_TO_SINT; + break; + } + if (OpToUse) break; - SDOperand CPIdx = DAG.getConstantPool(FudgeFactor, TLI.getPointerTy()); - CPIdx = DAG.getNode(ISD::ADD, TLI.getPointerTy(), CPIdx, CstOffset); - SDOperand FudgeInReg; - if (DestTy == MVT::f32) - FudgeInReg = DAG.getLoad(MVT::f32, DAG.getEntryNode(), CPIdx, - DAG.getSrcValue(NULL)); - else { - assert(DestTy == MVT::f64 && "Unexpected conversion"); - FudgeInReg = DAG.getExtLoad(ISD::EXTLOAD, MVT::f64, DAG.getEntryNode(), - CPIdx, DAG.getSrcValue(NULL), MVT::f32); + // If the target supports FP_TO_UINT of this type, use it. + switch (TLI.getOperationAction(ISD::FP_TO_UINT, NewOutTy)) { + default: break; + case TargetLowering::Legal: + if (!TLI.isTypeLegal(NewOutTy)) + break; // Can't use this datatype. + // FALL THROUGH. + case TargetLowering::Custom: + OpToUse = ISD::FP_TO_UINT; + break; } - return DAG.getNode(ISD::FADD, DestTy, SignedConv, FudgeInReg); - } + if (OpToUse) break; - // Check to see if the target has a custom way to lower this. If so, use it. - switch (TLI.getOperationAction(ISD::SINT_TO_FP, Source.getValueType())) { - default: assert(0 && "This action not implemented for this operation!"); - case TargetLowering::Legal: - case TargetLowering::Expand: - break; // This case is handled below. - case TargetLowering::Custom: { - SDOperand NV = TLI.LowerOperation(DAG.getNode(ISD::SINT_TO_FP, DestTy, - Source), DAG); - if (NV.Val) - return LegalizeOp(NV); - break; // The target decided this was legal after all - } + // Otherwise, try a larger type. } - // Expand the source, then glue it back together for the call. We must expand - // the source in case it is shared (this pass of legalize must traverse it). - SDOperand SrcLo, SrcHi; - ExpandOp(Source, SrcLo, SrcHi); - Source = DAG.getNode(ISD::BUILD_PAIR, Source.getValueType(), SrcLo, SrcHi); + // Okay, we found the operation and type to use. Truncate the result of the + // extended FP_TO_*INT operation to the desired size. + return DAG.getNode(ISD::TRUNCATE, DestVT, + DAG.getNode(OpToUse, NewOutTy, LegalOp)); +} - SDNode *OutChain = 0; - SDOperand InChain = FindInputOutputChains(Source.Val, OutChain, - DAG.getEntryNode()); - const char *FnName = 0; - if (DestTy == MVT::f32) - FnName = "__floatdisf"; - else { - assert(DestTy == MVT::f64 && "Unknown fp value type!"); - FnName = "__floatdidf"; +/// ExpandBSWAP - Open code the operations for BSWAP of the specified operation. +/// +SDOperand SelectionDAGLegalize::ExpandBSWAP(SDOperand Op) { + MVT::ValueType VT = Op.getValueType(); + MVT::ValueType SHVT = TLI.getShiftAmountTy(); + SDOperand Tmp1, Tmp2, Tmp3, Tmp4, Tmp5, Tmp6, Tmp7, Tmp8; + switch (VT) { + default: assert(0 && "Unhandled Expand type in BSWAP!"); abort(); + case MVT::i16: + Tmp2 = DAG.getNode(ISD::SHL, VT, Op, DAG.getConstant(8, SHVT)); + Tmp1 = DAG.getNode(ISD::SRL, VT, Op, DAG.getConstant(8, SHVT)); + return DAG.getNode(ISD::OR, VT, Tmp1, Tmp2); + case MVT::i32: + Tmp4 = DAG.getNode(ISD::SHL, VT, Op, DAG.getConstant(24, SHVT)); + Tmp3 = DAG.getNode(ISD::SHL, VT, Op, DAG.getConstant(8, SHVT)); + Tmp2 = DAG.getNode(ISD::SRL, VT, Op, DAG.getConstant(8, SHVT)); + Tmp1 = DAG.getNode(ISD::SRL, VT, Op, DAG.getConstant(24, SHVT)); + Tmp3 = DAG.getNode(ISD::AND, VT, Tmp3, DAG.getConstant(0xFF0000, VT)); + Tmp2 = DAG.getNode(ISD::AND, VT, Tmp2, DAG.getConstant(0xFF00, VT)); + Tmp4 = DAG.getNode(ISD::OR, VT, Tmp4, Tmp3); + Tmp2 = DAG.getNode(ISD::OR, VT, Tmp2, Tmp1); + return DAG.getNode(ISD::OR, VT, Tmp4, Tmp2); + case MVT::i64: + Tmp8 = DAG.getNode(ISD::SHL, VT, Op, DAG.getConstant(56, SHVT)); + Tmp7 = DAG.getNode(ISD::SHL, VT, Op, DAG.getConstant(40, SHVT)); + Tmp6 = DAG.getNode(ISD::SHL, VT, Op, DAG.getConstant(24, SHVT)); + Tmp5 = DAG.getNode(ISD::SHL, VT, Op, DAG.getConstant(8, SHVT)); + Tmp4 = DAG.getNode(ISD::SRL, VT, Op, DAG.getConstant(8, SHVT)); + Tmp3 = DAG.getNode(ISD::SRL, VT, Op, DAG.getConstant(24, SHVT)); + Tmp2 = DAG.getNode(ISD::SRL, VT, Op, DAG.getConstant(40, SHVT)); + Tmp1 = DAG.getNode(ISD::SRL, VT, Op, DAG.getConstant(56, SHVT)); + Tmp7 = DAG.getNode(ISD::AND, VT, Tmp7, DAG.getConstant(255ULL<<48, VT)); + Tmp6 = DAG.getNode(ISD::AND, VT, Tmp6, DAG.getConstant(255ULL<<40, VT)); + Tmp5 = DAG.getNode(ISD::AND, VT, Tmp5, DAG.getConstant(255ULL<<32, VT)); + Tmp4 = DAG.getNode(ISD::AND, VT, Tmp4, DAG.getConstant(255ULL<<24, VT)); + Tmp3 = DAG.getNode(ISD::AND, VT, Tmp3, DAG.getConstant(255ULL<<16, VT)); + Tmp2 = DAG.getNode(ISD::AND, VT, Tmp2, DAG.getConstant(255ULL<<8 , VT)); + Tmp8 = DAG.getNode(ISD::OR, VT, Tmp8, Tmp7); + Tmp6 = DAG.getNode(ISD::OR, VT, Tmp6, Tmp5); + Tmp4 = DAG.getNode(ISD::OR, VT, Tmp4, Tmp3); + Tmp2 = DAG.getNode(ISD::OR, VT, Tmp2, Tmp1); + Tmp8 = DAG.getNode(ISD::OR, VT, Tmp8, Tmp6); + Tmp4 = DAG.getNode(ISD::OR, VT, Tmp4, Tmp2); + return DAG.getNode(ISD::OR, VT, Tmp8, Tmp4); } - - SDOperand Callee = DAG.getExternalSymbol(FnName, TLI.getPointerTy()); - - TargetLowering::ArgListTy Args; - const Type *ArgTy = MVT::getTypeForValueType(Source.getValueType()); - - Args.push_back(std::make_pair(Source, ArgTy)); - - // We don't care about token chains for libcalls. We just use the entry - // node as our input and ignore the output chain. This allows us to place - // calls wherever we need them to satisfy data dependences. - const Type *RetTy = MVT::getTypeForValueType(DestTy); - - std::pair CallResult = - TLI.LowerCallTo(InChain, RetTy, false, CallingConv::C, true, - Callee, Args, DAG); - - SpliceCallInto(CallResult.second, OutChain); - return CallResult.first; } +/// ExpandBitCount - Expand the specified bitcount instruction into operations. +/// +SDOperand SelectionDAGLegalize::ExpandBitCount(unsigned Opc, SDOperand Op) { + switch (Opc) { + default: assert(0 && "Cannot expand this yet!"); + case ISD::CTPOP: { + static const uint64_t mask[6] = { + 0x5555555555555555ULL, 0x3333333333333333ULL, + 0x0F0F0F0F0F0F0F0FULL, 0x00FF00FF00FF00FFULL, + 0x0000FFFF0000FFFFULL, 0x00000000FFFFFFFFULL + }; + MVT::ValueType VT = Op.getValueType(); + MVT::ValueType ShVT = TLI.getShiftAmountTy(); + unsigned len = getSizeInBits(VT); + for (unsigned i = 0; (1U << i) <= (len / 2); ++i) { + //x = (x & mask[i][len/8]) + (x >> (1 << i) & mask[i][len/8]) + SDOperand Tmp2 = DAG.getConstant(mask[i], VT); + SDOperand Tmp3 = DAG.getConstant(1ULL << i, ShVT); + Op = DAG.getNode(ISD::ADD, VT, DAG.getNode(ISD::AND, VT, Op, Tmp2), + DAG.getNode(ISD::AND, VT, + DAG.getNode(ISD::SRL, VT, Op, Tmp3),Tmp2)); + } + return Op; + } + case ISD::CTLZ: { + // for now, we do this: + // x = x | (x >> 1); + // x = x | (x >> 2); + // ... + // x = x | (x >>16); + // x = x | (x >>32); // for 64-bit input + // return popcount(~x); + // + // but see also: http://www.hackersdelight.org/HDcode/nlz.cc + MVT::ValueType VT = Op.getValueType(); + MVT::ValueType ShVT = TLI.getShiftAmountTy(); + unsigned len = getSizeInBits(VT); + for (unsigned i = 0; (1U << i) <= (len / 2); ++i) { + SDOperand Tmp3 = DAG.getConstant(1ULL << i, ShVT); + Op = DAG.getNode(ISD::OR, VT, Op, DAG.getNode(ISD::SRL, VT, Op, Tmp3)); + } + Op = DAG.getNode(ISD::XOR, VT, Op, DAG.getConstant(~0ULL, VT)); + return DAG.getNode(ISD::CTPOP, VT, Op); + } + case ISD::CTTZ: { + // for now, we use: { return popcount(~x & (x - 1)); } + // unless the target has ctlz but not ctpop, in which case we use: + // { return 32 - nlz(~x & (x-1)); } + // see also http://www.hackersdelight.org/HDcode/ntz.cc + MVT::ValueType VT = Op.getValueType(); + SDOperand Tmp2 = DAG.getConstant(~0ULL, VT); + SDOperand Tmp3 = DAG.getNode(ISD::AND, VT, + DAG.getNode(ISD::XOR, VT, Op, Tmp2), + DAG.getNode(ISD::SUB, VT, Op, DAG.getConstant(1, VT))); + // If ISD::CTLZ is legal and CTPOP isn't, then do that instead. + if (!TLI.isOperationLegal(ISD::CTPOP, VT) && + TLI.isOperationLegal(ISD::CTLZ, VT)) + return DAG.getNode(ISD::SUB, VT, + DAG.getConstant(getSizeInBits(VT), VT), + DAG.getNode(ISD::CTLZ, VT, Tmp3)); + return DAG.getNode(ISD::CTPOP, VT, Tmp3); + } + } +} /// ExpandOp - Expand the specified SDOperand into its two component pieces From lattner at cs.uiuc.edu Sat Jan 28 02:31:16 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Sat, 28 Jan 2006 02:31:16 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Message-ID: <200601280831.CAA13221@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/SelectionDAG: LegalizeDAG.cpp updated: 1.287 -> 1.288 --- Log message: minor tweaks --- Diffs of the changes: (+21 -21) LegalizeDAG.cpp | 42 +++++++++++++++++++++--------------------- 1 files changed, 21 insertions(+), 21 deletions(-) Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.287 llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.288 --- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.287 Sat Jan 28 02:25:58 2006 +++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Sat Jan 28 02:31:04 2006 @@ -266,6 +266,23 @@ bool isCustom = false; switch (Node->getOpcode()) { + case ISD::FrameIndex: + case ISD::EntryToken: + case ISD::Register: + case ISD::BasicBlock: + case ISD::TargetFrameIndex: + case ISD::TargetConstant: + case ISD::TargetConstantPool: + case ISD::TargetGlobalAddress: + case ISD::TargetExternalSymbol: + case ISD::VALUETYPE: + case ISD::SRCVALUE: + case ISD::STRING: + case ISD::CONDCODE: + // Primitives must all be legal. + assert(TLI.isOperationLegal(Node->getValueType(0), Node->getValueType(0)) && + "This must be legal!"); + break; default: if (Node->getOpcode() >= ISD::BUILTIN_OP_END) { // If this is a target node, legalize it by legalizing the operands then @@ -293,33 +310,16 @@ std::cerr << "NODE: "; Node->dump(); std::cerr << "\n"; assert(0 && "Do not know how to legalize this operator!"); abort(); - case ISD::EntryToken: - case ISD::FrameIndex: - case ISD::TargetFrameIndex: - case ISD::Register: - case ISD::TargetConstant: - case ISD::TargetConstantPool: case ISD::GlobalAddress: - case ISD::TargetGlobalAddress: case ISD::ExternalSymbol: - case ISD::TargetExternalSymbol: case ISD::ConstantPool: // Nothing to do. - case ISD::BasicBlock: - case ISD::CONDCODE: - case ISD::VALUETYPE: - case ISD::SRCVALUE: - case ISD::STRING: switch (TLI.getOperationAction(Node->getOpcode(), Node->getValueType(0))) { default: assert(0 && "This action is not supported yet!"); - case TargetLowering::Custom: { - SDOperand Tmp = TLI.LowerOperation(Op, DAG); - if (Tmp.Val) { - Result = Tmp; - break; - } - } // FALLTHROUGH if the target doesn't want to lower this op after all. + case TargetLowering::Custom: + Tmp1 = TLI.LowerOperation(Op, DAG); + if (Tmp1.Val) Result = Tmp1; + // FALLTHROUGH if the target doesn't want to lower this op after all. case TargetLowering::Legal: - assert(isTypeLegal(Node->getValueType(0)) && "This must be legal!"); break; } break; From lattner at cs.uiuc.edu Sat Jan 28 03:32:14 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Sat, 28 Jan 2006 03:32:14 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/SelectionDAG.h Message-ID: <200601280932.DAA03039@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/CodeGen: SelectionDAG.h updated: 1.89 -> 1.90 --- Log message: Add some methods --- Diffs of the changes: (+17 -0) SelectionDAG.h | 17 +++++++++++++++++ 1 files changed, 17 insertions(+) Index: llvm/include/llvm/CodeGen/SelectionDAG.h diff -u llvm/include/llvm/CodeGen/SelectionDAG.h:1.89 llvm/include/llvm/CodeGen/SelectionDAG.h:1.90 --- llvm/include/llvm/CodeGen/SelectionDAG.h:1.89 Fri Jan 27 18:18:27 2006 +++ llvm/include/llvm/CodeGen/SelectionDAG.h Sat Jan 28 03:32:01 2006 @@ -262,6 +262,19 @@ // getSrcValue - construct a node to track a Value* through the backend SDOperand getSrcValue(const Value* I, int offset = 0); + /// UpdateNodeOperands - *Mutate* the specified node in-place to have the + /// specified operands. If the resultant node already exists in the DAG, + /// this does not modify the specified node, instead it returns the node that + /// already exists. If the resultant node does not exist in the DAG, the + /// input node is returned. As a degenerate case, if you specify the same + /// input operands as the node already has, the input node is returned. + SDOperand UpdateNodeOperands(SDOperand N, SDOperand Op); + SDOperand UpdateNodeOperands(SDOperand N, SDOperand Op1, SDOperand Op2); + SDOperand UpdateNodeOperands(SDOperand N, SDOperand Op1, SDOperand Op2, + SDOperand Op3); + SDOperand UpdateNodeOperands(SDOperand N, SDOperand Op1, SDOperand Op2, + SDOperand Op3, SDOperand Op4); + SDOperand UpdateNodeOperands(SDOperand N, const std::vector &Op); /// SelectNodeTo - These are used for target selectors to *mutate* the /// specified node to have the specified return type, Target opcode, and @@ -551,6 +564,10 @@ private: void RemoveNodeFromCSEMaps(SDNode *N); SDNode *AddNonLeafNodeToCSEMaps(SDNode *N); + SDNode **FindModifiedNodeSlot(SDNode *N, SDOperand Op); + SDNode **FindModifiedNodeSlot(SDNode *N, SDOperand Op1, SDOperand Op2); + SDNode **FindModifiedNodeSlot(SDNode *N, const std::vector &Ops); + void DestroyDeadNode(SDNode *N); void DeleteNodeNotInCSEMaps(SDNode *N); void setNodeValueTypes(SDNode *N, std::vector &RetVals); From lattner at cs.uiuc.edu Sat Jan 28 03:32:57 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Sat, 28 Jan 2006 03:32:57 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Message-ID: <200601280932.DAA03206@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/SelectionDAG: SelectionDAG.cpp updated: 1.246 -> 1.247 --- Log message: add some methods for updating nodes --- Diffs of the changes: (+234 -0) SelectionDAG.cpp | 234 +++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 234 insertions(+) Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.246 llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.247 --- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.246 Fri Jan 27 18:18:58 2006 +++ llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Sat Jan 28 03:32:45 2006 @@ -440,6 +440,107 @@ return 0; } +/// FindModifiedNodeSlot - Find a slot for the specified node if its operands +/// were replaced with those specified. If this node is never memoized, +/// return null, otherwise return a pointer to the slot it would take. If a +/// node already exists with these operands, the slot will be non-null. +SDNode **SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDOperand Op) { + if (N->getOpcode() == ISD::CALLSEQ_START || + N->getOpcode() == ISD::CALLSEQ_END || + N->getOpcode() == ISD::HANDLENODE || N->getValueType(0) == MVT::Flag) + return 0; // Never add these nodes. + + // Check that remaining values produced are not flags. + for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) + if (N->getValueType(i) == MVT::Flag) + return 0; // Never CSE anything that produces a flag. + + if (N->getNumValues() == 1) { + return &UnaryOps[std::make_pair(N->getOpcode(), + std::make_pair(Op, N->getValueType(0)))]; + } else { + // Remove the node from the ArbitraryNodes map. + std::vector RV(N->value_begin(), N->value_end()); + std::vector Ops; + Ops.push_back(Op); + return &ArbitraryNodes[std::make_pair(N->getOpcode(), + std::make_pair(RV, Ops))]; + } + return 0; +} + +/// FindModifiedNodeSlot - Find a slot for the specified node if its operands +/// were replaced with those specified. If this node is never memoized, +/// return null, otherwise return a pointer to the slot it would take. If a +/// node already exists with these operands, the slot will be non-null. +SDNode **SelectionDAG::FindModifiedNodeSlot(SDNode *N, + SDOperand Op1, SDOperand Op2) { + if (N->getOpcode() == ISD::CALLSEQ_START || + N->getOpcode() == ISD::CALLSEQ_END || + N->getOpcode() == ISD::HANDLENODE || N->getValueType(0) == MVT::Flag) + return 0; // Never add these nodes. + + // Check that remaining values produced are not flags. + for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) + if (N->getValueType(i) == MVT::Flag) + return 0; // Never CSE anything that produces a flag. + + if (N->getNumValues() == 1) { + return &BinaryOps[std::make_pair(N->getOpcode(), + std::make_pair(Op1, Op2))]; + } else { + std::vector RV(N->value_begin(), N->value_end()); + std::vector Ops; + Ops.push_back(Op1); + Ops.push_back(Op2); + return &ArbitraryNodes[std::make_pair(N->getOpcode(), + std::make_pair(RV, Ops))]; + } + return 0; +} + + +/// FindModifiedNodeSlot - Find a slot for the specified node if its operands +/// were replaced with those specified. If this node is never memoized, +/// return null, otherwise return a pointer to the slot it would take. If a +/// node already exists with these operands, the slot will be non-null. +SDNode **SelectionDAG::FindModifiedNodeSlot(SDNode *N, + const std::vector &Ops) { + if (N->getOpcode() == ISD::CALLSEQ_START || + N->getOpcode() == ISD::CALLSEQ_END || + N->getOpcode() == ISD::HANDLENODE || N->getValueType(0) == MVT::Flag) + return 0; // Never add these nodes. + + // Check that remaining values produced are not flags. + for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) + if (N->getValueType(i) == MVT::Flag) + return 0; // Never CSE anything that produces a flag. + + if (N->getNumValues() == 1) { + if (N->getNumOperands() == 1) { + return &UnaryOps[std::make_pair(N->getOpcode(), + std::make_pair(Ops[0], + N->getValueType(0)))]; + } else if (N->getNumOperands() == 2) { + return &BinaryOps[std::make_pair(N->getOpcode(), + std::make_pair(Ops[0], Ops[1]))]; + } else { + return &OneResultNodes[std::make_pair(N->getOpcode(), + std::make_pair(N->getValueType(0), + Ops))]; + } + } else { + if (N->getOpcode() == ISD::LOAD) { + return &Loads[std::make_pair(Ops[1], + std::make_pair(Ops[0], N->getValueType(0)))]; + } else { + std::vector RV(N->value_begin(), N->value_end()); + return &ArbitraryNodes[std::make_pair(N->getOpcode(), + std::make_pair(RV, Ops))]; + } + } + return 0; +} SelectionDAG::~SelectionDAG() { @@ -1537,6 +1638,139 @@ N->setValueTypes(&(*VTList.begin())[0], 2); } +/// UpdateNodeOperands - *Mutate* the specified node in-place to have the +/// specified operands. If the resultant node already exists in the DAG, +/// this does not modify the specified node, instead it returns the node that +/// already exists. If the resultant node does not exist in the DAG, the +/// input node is returned. As a degenerate case, if you specify the same +/// input operands as the node already has, the input node is returned. +SDOperand SelectionDAG:: +UpdateNodeOperands(SDOperand InN, SDOperand Op) { + SDNode *N = InN.Val; + assert(N->getNumOperands() == 1 && "Update with wrong number of operands"); + + // Check to see if there is no change. + if (Op == N->getOperand(0)) return InN; + + // See if the modified node already exists. + SDNode **NewSlot = FindModifiedNodeSlot(N, Op); + if (NewSlot && *NewSlot) + return SDOperand(*NewSlot, InN.ResNo); + + // Nope it doesn't. Remove the node from it's current place in the maps. + if (NewSlot) + RemoveNodeFromCSEMaps(N); + + // Now we update the operands. + N->OperandList[0].Val->removeUser(N); + Op.Val->addUser(N); + N->OperandList[0] = Op; + + // If this gets put into a CSE map, add it. + if (NewSlot) *NewSlot = N; + return InN; +} + +SDOperand SelectionDAG:: +UpdateNodeOperands(SDOperand InN, SDOperand Op1, SDOperand Op2) { + SDNode *N = InN.Val; + assert(N->getNumOperands() == 2 && "Update with wrong number of operands"); + + // Check to see if there is no change. + bool AnyChange = false; + if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1)) + return InN; // No operands changed, just return the input node. + + // See if the modified node already exists. + SDNode **NewSlot = FindModifiedNodeSlot(N, Op1, Op2); + if (NewSlot && *NewSlot) + return SDOperand(*NewSlot, InN.ResNo); + + // Nope it doesn't. Remove the node from it's current place in the maps. + if (NewSlot) + RemoveNodeFromCSEMaps(N); + + // Now we update the operands. + if (N->OperandList[0] != Op1) { + N->OperandList[0].Val->removeUser(N); + Op1.Val->addUser(N); + N->OperandList[0] = Op1; + } + if (N->OperandList[1] != Op2) { + N->OperandList[1].Val->removeUser(N); + Op2.Val->addUser(N); + N->OperandList[1] = Op2; + } + + // If this gets put into a CSE map, add it. + if (NewSlot) *NewSlot = N; + return InN; +} + +SDOperand SelectionDAG:: +UpdateNodeOperands(SDOperand N, SDOperand Op1, SDOperand Op2, SDOperand Op3) { + std::vector Ops; + Ops.push_back(Op1); + Ops.push_back(Op2); + Ops.push_back(Op3); + return UpdateNodeOperands(N, Ops); +} + +SDOperand SelectionDAG:: +UpdateNodeOperands(SDOperand N, SDOperand Op1, SDOperand Op2, + SDOperand Op3, SDOperand Op4) { + std::vector Ops; + Ops.push_back(Op1); + Ops.push_back(Op2); + Ops.push_back(Op3); + Ops.push_back(Op4); + return UpdateNodeOperands(N, Ops); +} + +SDOperand SelectionDAG:: +UpdateNodeOperands(SDOperand InN, const std::vector &Ops) { + SDNode *N = InN.Val; + assert(N->getNumOperands() == Ops.size() && + "Update with wrong number of operands"); + + // Check to see if there is no change. + unsigned NumOps = Ops.size(); + bool AnyChange = false; + for (unsigned i = 0; i != NumOps; ++i) { + if (Ops[i] != N->getOperand(i)) { + AnyChange = true; + break; + } + } + + // No operands changed, just return the input node. + if (!AnyChange) return InN; + + // See if the modified node already exists. + SDNode **NewSlot = FindModifiedNodeSlot(N, Ops); + if (NewSlot && *NewSlot) + return SDOperand(*NewSlot, InN.ResNo); + + // Nope it doesn't. Remove the node from it's current place in the maps. + if (NewSlot) + RemoveNodeFromCSEMaps(N); + + // Now we update the operands. + for (unsigned i = 0; i != NumOps; ++i) { + if (N->OperandList[i] != Ops[i]) { + N->OperandList[i].Val->removeUser(N); + Ops[i].Val->addUser(N); + N->OperandList[i] = Ops[i]; + } + } + + // If this gets put into a CSE map, add it. + if (NewSlot) *NewSlot = N; + return InN; +} + + + /// SelectNodeTo - These are used for target selectors to *mutate* the /// specified node to have the specified return type, Target opcode, and From lattner at cs.uiuc.edu Sat Jan 28 04:09:10 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Sat, 28 Jan 2006 04:09:10 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/SelectionDAG.h Message-ID: <200601281009.EAA10566@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/CodeGen: SelectionDAG.h updated: 1.90 -> 1.91 --- Log message: add another variant --- Diffs of the changes: (+2 -0) SelectionDAG.h | 2 ++ 1 files changed, 2 insertions(+) Index: llvm/include/llvm/CodeGen/SelectionDAG.h diff -u llvm/include/llvm/CodeGen/SelectionDAG.h:1.90 llvm/include/llvm/CodeGen/SelectionDAG.h:1.91 --- llvm/include/llvm/CodeGen/SelectionDAG.h:1.90 Sat Jan 28 03:32:01 2006 +++ llvm/include/llvm/CodeGen/SelectionDAG.h Sat Jan 28 04:08:58 2006 @@ -274,6 +274,8 @@ SDOperand Op3); SDOperand UpdateNodeOperands(SDOperand N, SDOperand Op1, SDOperand Op2, SDOperand Op3, SDOperand Op4); + SDOperand UpdateNodeOperands(SDOperand N, SDOperand Op1, SDOperand Op2, + SDOperand Op3, SDOperand Op4, SDOperand Op5); SDOperand UpdateNodeOperands(SDOperand N, const std::vector &Op); /// SelectNodeTo - These are used for target selectors to *mutate* the From lattner at cs.uiuc.edu Sat Jan 28 04:09:37 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Sat, 28 Jan 2006 04:09:37 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Message-ID: <200601281009.EAA10835@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/SelectionDAG: SelectionDAG.cpp updated: 1.247 -> 1.248 --- Log message: add another method variant --- Diffs of the changes: (+18 -3) SelectionDAG.cpp | 21 ++++++++++++++++++--- 1 files changed, 18 insertions(+), 3 deletions(-) Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.247 llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.248 --- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.247 Sat Jan 28 03:32:45 2006 +++ llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Sat Jan 28 04:09:25 2006 @@ -317,7 +317,8 @@ Erased = ExternalSymbols.erase(cast(N)->getSymbol()); break; case ISD::TargetExternalSymbol: - Erased = TargetExternalSymbols.erase(cast(N)->getSymbol()); + Erased = + TargetExternalSymbols.erase(cast(N)->getSymbol()); break; case ISD::VALUETYPE: Erased = ValueTypeNodes[cast(N)->getVT()] != 0; @@ -416,7 +417,7 @@ } else { std::vector Ops(N->op_begin(), N->op_end()); SDNode *&ORN = OneResultNodes[std::make_pair(N->getOpcode(), - std::make_pair(N->getValueType(0), Ops))]; + std::make_pair(N->getValueType(0), Ops))]; if (ORN) return ORN; ORN = N; } @@ -687,7 +688,8 @@ return SDOperand(N, 0); } -SDOperand SelectionDAG::getTargetExternalSymbol(const char *Sym, MVT::ValueType VT) { +SDOperand SelectionDAG::getTargetExternalSymbol(const char *Sym, + MVT::ValueType VT) { SDNode *&N = TargetExternalSymbols[Sym]; if (N) return SDOperand(N, 0); N = new ExternalSymbolSDNode(true, Sym, VT); @@ -1728,6 +1730,19 @@ } SDOperand SelectionDAG:: +UpdateNodeOperands(SDOperand N, SDOperand Op1, SDOperand Op2, + SDOperand Op3, SDOperand Op4, SDOperand Op5) { + std::vector Ops; + Ops.push_back(Op1); + Ops.push_back(Op2); + Ops.push_back(Op3); + Ops.push_back(Op4); + Ops.push_back(Op5); + return UpdateNodeOperands(N, Ops); +} + + +SDOperand SelectionDAG:: UpdateNodeOperands(SDOperand InN, const std::vector &Ops) { SDNode *N = InN.Val; assert(N->getNumOperands() == Ops.size() && From lattner at cs.uiuc.edu Sat Jan 28 04:34:59 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Sat, 28 Jan 2006 04:34:59 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp Message-ID: <200601281034.EAA12748@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: X86ISelLowering.cpp updated: 1.61 -> 1.62 --- Log message: silence a warning --- Diffs of the changes: (+1 -0) X86ISelLowering.cpp | 1 + 1 files changed, 1 insertion(+) Index: llvm/lib/Target/X86/X86ISelLowering.cpp diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.61 llvm/lib/Target/X86/X86ISelLowering.cpp:1.62 --- llvm/lib/Target/X86/X86ISelLowering.cpp:1.61 Fri Jan 27 15:26:54 2006 +++ llvm/lib/Target/X86/X86ISelLowering.cpp Sat Jan 28 04:34:47 2006 @@ -1293,6 +1293,7 @@ // Get the X86 opcode to use. unsigned Opc; switch (MI->getOpcode()) { + default: assert(0 && "illegal opcode!"); case X86::FP_TO_INT16_IN_MEM: Opc = X86::FpIST16m; break; case X86::FP_TO_INT32_IN_MEM: Opc = X86::FpIST32m; break; case X86::FP_TO_INT64_IN_MEM: Opc = X86::FpIST64m; break; From lattner at cs.uiuc.edu Sat Jan 28 04:59:08 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Sat, 28 Jan 2006 04:59:08 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Message-ID: <200601281059.EAA20408@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/SelectionDAG: LegalizeDAG.cpp updated: 1.288 -> 1.289 --- Log message: Use the new "UpdateNodeOperands" method to simplify LegalizeDAG and make it faster. This cuts about 120 lines of code out of the legalizer (mostly code checking to see if operands have changed). It also fixes an ugly performance issue, where the legalizer cloned the entire graph after any change. Now the "UpdateNodeOperands" method gives it a chance to reuse nodes if the operands of a node change but not its opcode or valuetypes. This speeds up instruction selection time on kimwitu++ by about 8.2% with a release build. --- Diffs of the changes: (+194 -317) LegalizeDAG.cpp | 511 +++++++++++++++++++++----------------------------------- 1 files changed, 194 insertions(+), 317 deletions(-) Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.288 llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.289 --- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.288 Sat Jan 28 02:31:04 2006 +++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Sat Jan 28 04:58:55 2006 @@ -326,30 +326,25 @@ case ISD::AssertSext: case ISD::AssertZext: Tmp1 = LegalizeOp(Node->getOperand(0)); - if (Tmp1 != Node->getOperand(0)) - Result = DAG.getNode(Node->getOpcode(), Node->getValueType(0), Tmp1, - Node->getOperand(1)); + Result = DAG.UpdateNodeOperands(Result, Tmp1, Node->getOperand(1)); break; case ISD::MERGE_VALUES: + // Legalize eliminates MERGE_VALUES nodes. Result = Node->getOperand(Op.ResNo); break; case ISD::CopyFromReg: Tmp1 = LegalizeOp(Node->getOperand(0)); Result = Op.getValue(0); if (Node->getNumValues() == 2) { - if (Tmp1 != Node->getOperand(0)) - Result = DAG.getCopyFromReg(Tmp1, - cast(Node->getOperand(1))->getReg(), - Node->getValueType(0)); + Result = DAG.UpdateNodeOperands(Result, Tmp1, Node->getOperand(1)); } else { assert(Node->getNumValues() == 3 && "Invalid copyfromreg!"); - if (Node->getNumOperands() == 3) + if (Node->getNumOperands() == 3) { Tmp2 = LegalizeOp(Node->getOperand(2)); - if (Tmp1 != Node->getOperand(0) || - (Node->getNumOperands() == 3 && Tmp2 != Node->getOperand(2))) - Result = DAG.getCopyFromReg(Tmp1, - cast(Node->getOperand(1))->getReg(), - Node->getValueType(0), Tmp2); + Result = DAG.UpdateNodeOperands(Result, Tmp1, Node->getOperand(1),Tmp2); + } else { + Result = DAG.UpdateNodeOperands(Result, Tmp1, Node->getOperand(1)); + } AddLegalizedOperand(Op.getValue(2), Result.getValue(2)); } // Since CopyFromReg produces two values, make sure to remember that we @@ -431,7 +426,7 @@ } Ops.push_back(Node->getOperand(3)); // filename must be legal. Ops.push_back(Node->getOperand(4)); // working dir # must be legal. - Result = DAG.getNode(ISD::LOCATION, MVT::Other, Ops); + Result = DAG.UpdateNodeOperands(Result, Ops); } break; } @@ -446,13 +441,7 @@ Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the line #. Tmp3 = LegalizeOp(Node->getOperand(2)); // Legalize the col #. Tmp4 = LegalizeOp(Node->getOperand(3)); // Legalize the source file id. - - if (Tmp1 != Node->getOperand(0) || - Tmp2 != Node->getOperand(1) || - Tmp3 != Node->getOperand(2) || - Tmp4 != Node->getOperand(3)) { - Result = DAG.getNode(ISD::DEBUG_LOC,MVT::Other, Tmp1, Tmp2, Tmp3, Tmp4); - } + Result = DAG.UpdateNodeOperands(Result, Tmp1, Tmp2, Tmp3, Tmp4); break; } break; @@ -464,11 +453,7 @@ case TargetLowering::Legal: Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain. Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the label id. - - if (Tmp1 != Node->getOperand(0) || - Tmp2 != Node->getOperand(1)) { - Result = DAG.getNode(ISD::DEBUG_LABEL, MVT::Other, Tmp1, Tmp2); - } + Result = DAG.UpdateNodeOperands(Result, Tmp1, Tmp2); break; } break; @@ -554,22 +539,20 @@ } case ISD::TokenFactor: if (Node->getNumOperands() == 2) { - bool Changed = false; - SDOperand Op0 = LegalizeOp(Node->getOperand(0)); - SDOperand Op1 = LegalizeOp(Node->getOperand(1)); - if (Op0 != Node->getOperand(0) || Op1 != Node->getOperand(1)) - Result = DAG.getNode(ISD::TokenFactor, MVT::Other, Op0, Op1); + Tmp1 = LegalizeOp(Node->getOperand(0)); + Tmp2 = LegalizeOp(Node->getOperand(1)); + Result = DAG.UpdateNodeOperands(Result, Tmp1, Tmp2); + } else if (Node->getNumOperands() == 3) { + Tmp1 = LegalizeOp(Node->getOperand(0)); + Tmp2 = LegalizeOp(Node->getOperand(1)); + Tmp3 = LegalizeOp(Node->getOperand(2)); + Result = DAG.UpdateNodeOperands(Result, Tmp1, Tmp2, Tmp3); } else { std::vector Ops; - bool Changed = false; // Legalize the operands. - for (unsigned i = 0, e = Node->getNumOperands(); i != e; ++i) { - SDOperand Op = Node->getOperand(i); - Ops.push_back(LegalizeOp(Op)); - Changed |= Ops[i] != Op; - } - if (Changed) - Result = DAG.getNode(ISD::TokenFactor, MVT::Other, Ops); + for (unsigned i = 0, e = Node->getNumOperands(); i != e; ++i) + Ops.push_back(LegalizeOp(Node->getOperand(i))); + Result = DAG.UpdateNodeOperands(Result, Ops); } break; @@ -597,16 +580,9 @@ Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain. Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the size. Tmp3 = LegalizeOp(Node->getOperand(2)); // Legalize the alignment. - if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1) || - Tmp3 != Node->getOperand(2)) { - std::vector VTs(Node->value_begin(), Node->value_end()); - std::vector Ops; - Ops.push_back(Tmp1); Ops.push_back(Tmp2); Ops.push_back(Tmp3); - Result = DAG.getNode(ISD::DYNAMIC_STACKALLOC, VTs, Ops); - } else - Result = Op.getValue(0); + Result = DAG.UpdateNodeOperands(Result, Tmp1, Tmp2, Tmp3); - Tmp1 = Result; + Tmp1 = Result.getValue(0); Tmp2 = Result.getValue(1); switch (TLI.getOperationAction(Node->getOpcode(), Node->getValueType(0))) { @@ -620,13 +596,15 @@ SDOperand SP = DAG.getCopyFromReg(Chain, SPReg, Node->getValueType(0)); Tmp1 = DAG.getNode(ISD::SUB, Node->getValueType(0), SP, Size); // Value Tmp2 = DAG.getCopyToReg(SP.getValue(1), SPReg, Tmp1); // Output chain + Tmp1 = LegalizeOp(Tmp1); + Tmp2 = LegalizeOp(Tmp2); break; } case TargetLowering::Custom: Tmp3 = TLI.LowerOperation(Tmp1, DAG); if (Tmp3.Val) { - Tmp1 = Tmp3; - Tmp2 = Tmp3.getValue(1); + Tmp1 = LegalizeOp(Tmp3); + Tmp2 = LegalizeOp(Tmp3.getValue(1)); } break; case TargetLowering::Legal: @@ -634,14 +612,14 @@ } // Since this op produce two values, make sure to remember that we // legalized both of them. - AddLegalizedOperand(SDOperand(Node, 0), LegalizeOp(Tmp1)); - AddLegalizedOperand(SDOperand(Node, 1), LegalizeOp(Tmp2)); + AddLegalizedOperand(SDOperand(Node, 0), Tmp1); + AddLegalizedOperand(SDOperand(Node, 1), Tmp2); return Op.ResNo ? Tmp2 : Tmp1; } case ISD::INLINEASM: Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize Chain. Tmp2 = Node->getOperand(Node->getNumOperands()-1); - if (Tmp2.getValueType() != MVT::Flag) // Legalize Flag if it exists. + if (Tmp2.getValueType() == MVT::Flag) // Legalize Flag if it exists. Tmp2 = Tmp3 = SDOperand(0, 0); else Tmp3 = LegalizeOp(Tmp2); @@ -649,21 +627,17 @@ if (Tmp1 != Node->getOperand(0) || Tmp2 != Tmp3) { std::vector Ops(Node->op_begin(), Node->op_end()); Ops[0] = Tmp1; - Ops.back() = Tmp3; - std::vector VTs(Node->value_begin(), Node->value_end()); - Result = DAG.getNode(ISD::INLINEASM, VTs, Ops); - } else { - Result = SDOperand(Node, 0); + if (Tmp3.Val) Ops.back() = Tmp3; + Result = DAG.UpdateNodeOperands(Result, Ops); } // INLINE asm returns a chain and flag, make sure to add both to the map. - AddLegalizedOperand(SDOperand(Node, 0), Result); + AddLegalizedOperand(SDOperand(Node, 0), Result.getValue(0)); AddLegalizedOperand(SDOperand(Node, 1), Result.getValue(1)); return Result.getValue(Op.ResNo); case ISD::BR: Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain. - if (Tmp1 != Node->getOperand(0)) - Result = DAG.getNode(ISD::BR, MVT::Other, Tmp1, Node->getOperand(1)); + Result = DAG.UpdateNodeOperands(Result, Tmp1, Node->getOperand(1)); break; case ISD::BRCOND: @@ -680,9 +654,7 @@ } // Basic block destination (Op#2) is always legal. - if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1)) - Result = DAG.getNode(ISD::BRCOND, MVT::Other, Tmp1, Tmp2, - Node->getOperand(2)); + Result = DAG.UpdateNodeOperands(Result, Tmp1, Tmp2, Node->getOperand(2)); switch (TLI.getOperationAction(ISD::BRCOND, MVT::Other)) { default: assert(0 && "This action is not supported yet!"); @@ -738,11 +710,8 @@ Tmp2 = LegalizeOp(Node->getOperand(2)); // LHS Tmp3 = LegalizeOp(Node->getOperand(3)); // RHS - if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(2) || - Tmp3 != Node->getOperand(3)) { - Result = DAG.getNode(ISD::BR_CC, MVT::Other, Tmp1, Node->getOperand(1), - Tmp2, Tmp3, Node->getOperand(4)); - } + Result = DAG.UpdateNodeOperands(Result, Tmp1, Node->getOperand(1), Tmp2, + Tmp3, Node->getOperand(4)); switch (TLI.getOperationAction(ISD::BR_CC, Tmp3.getValueType())) { default: assert(0 && "Unexpected action for BR_CC!"); @@ -765,21 +734,14 @@ break; } - // If this target does not support BRCONDTWOWAY, lower it to a BRCOND/BR // pair. switch (TLI.getOperationAction(ISD::BRCONDTWOWAY, MVT::Other)) { case TargetLowering::Promote: default: assert(0 && "This action is not supported yet!"); case TargetLowering::Legal: - if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1)) { - std::vector Ops; - Ops.push_back(Tmp1); - Ops.push_back(Tmp2); - Ops.push_back(Node->getOperand(2)); - Ops.push_back(Node->getOperand(3)); - Result = DAG.getNode(ISD::BRCONDTWOWAY, MVT::Other, Ops); - } + Result = DAG.UpdateNodeOperands(Result, Tmp1, Tmp2, Node->getOperand(2), + Node->getOperand(3)); break; case TargetLowering::Expand: // If BRTWOWAY_CC is legal for this target, then simply expand this node @@ -810,8 +772,14 @@ Tmp3 = LegalizeOp(Node->getOperand(3)); // RHS if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(2) || Tmp3 != Node->getOperand(3)) { - Result = DAG.getBR2Way_CC(Tmp1, Node->getOperand(1), Tmp2, Tmp3, - Node->getOperand(4), Node->getOperand(5)); + std::vector Ops; + Ops.push_back(Tmp1); + Ops.push_back(Node->getOperand(1)); + Ops.push_back(Tmp2); + Ops.push_back(Tmp3); + Ops.push_back(Node->getOperand(4)); + Ops.push_back(Node->getOperand(5)); + Result = DAG.UpdateNodeOperands(Result, Ops); } break; } else { @@ -823,21 +791,27 @@ // pair. switch (TLI.getOperationAction(ISD::BRTWOWAY_CC, MVT::Other)) { default: assert(0 && "This action is not supported yet!"); - case TargetLowering::Legal: + case TargetLowering::Legal: { // If we get a SETCC back from legalizing the SETCC node we just // created, then use its LHS, RHS, and CC directly in creating a new // node. Otherwise, select between the true and false value based on // comparing the result of the legalized with zero. + std::vector Ops; + Ops.push_back(Tmp1); if (Tmp2.getOpcode() == ISD::SETCC) { - Result = DAG.getBR2Way_CC(Tmp1, Tmp2.getOperand(2), - Tmp2.getOperand(0), Tmp2.getOperand(1), - Node->getOperand(4), Node->getOperand(5)); + Ops.push_back(Tmp2.getOperand(2)); + Ops.push_back(Tmp2.getOperand(0)); + Ops.push_back(Tmp2.getOperand(1)); } else { - Result = DAG.getBR2Way_CC(Tmp1, DAG.getCondCode(ISD::SETNE), Tmp2, - DAG.getConstant(0, Tmp2.getValueType()), - Node->getOperand(4), Node->getOperand(5)); + Ops.push_back(DAG.getCondCode(ISD::SETNE)); + Ops.push_back(Tmp2); + Ops.push_back(DAG.getConstant(0, Tmp2.getValueType())); } + Ops.push_back(Node->getOperand(4)); + Ops.push_back(Node->getOperand(5)); + Result = DAG.UpdateNodeOperands(Result, Ops); break; + } case TargetLowering::Expand: Result = DAG.getNode(ISD::BRCOND, MVT::Other, Tmp1, Tmp2, Node->getOperand(4)); @@ -851,31 +825,26 @@ Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the pointer. MVT::ValueType VT = Node->getValueType(0); - if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1)) - Result = DAG.getLoad(VT, Tmp1, Tmp2, Node->getOperand(2)); - else - Result = SDOperand(Node, 0); + Result = DAG.UpdateNodeOperands(Result, Tmp1, Tmp2, Node->getOperand(2)); + Tmp2 = Result.getValue(0); + Tmp3 = Result.getValue(1); switch (TLI.getOperationAction(Node->getOpcode(), VT)) { default: assert(0 && "This action is not supported yet!"); + case TargetLowering::Legal: break; case TargetLowering::Custom: - Tmp1 = TLI.LowerOperation(Result, DAG); + Tmp1 = TLI.LowerOperation(Tmp2, DAG); if (Tmp1.Val) { - // Since loads produce two values, make sure to remember that we - // legalized both of them. - AddLegalizedOperand(SDOperand(Node, 0), LegalizeOp(Tmp1)); - AddLegalizedOperand(SDOperand(Node, 1), LegalizeOp(Tmp1.getValue(1))); - return Tmp1.getValue(Op.ResNo); + Tmp2 = LegalizeOp(Tmp1); + Tmp3 = LegalizeOp(Tmp1.getValue(1)); } - // FALLTHROUGH if the target thinks it is legal. - case TargetLowering::Legal: - // Since loads produce two values, make sure to remember that we legalized - // both of them. - AddLegalizedOperand(SDOperand(Node, 0), Result); - AddLegalizedOperand(SDOperand(Node, 1), Result.getValue(1)); - return Result.getValue(Op.ResNo); + break; } - assert(0 && "Unreachable"); + // Since loads produce two values, make sure to remember that we + // legalized both of them. + AddLegalizedOperand(SDOperand(Node, 0), Tmp2); + AddLegalizedOperand(SDOperand(Node, 1), Tmp3); + return Op.ResNo ? Tmp3 : Tmp2; } case ISD::EXTLOAD: case ISD::SEXTLOAD: @@ -888,48 +857,36 @@ default: assert(0 && "This action is not supported yet!"); case TargetLowering::Promote: assert(SrcVT == MVT::i1 && "Can only promote EXTLOAD from i1 -> i8!"); - Result = DAG.getExtLoad(Node->getOpcode(), Node->getValueType(0), - Tmp1, Tmp2, Node->getOperand(2), MVT::i8); - // Since loads produce two values, make sure to remember that we legalized - // both of them. - AddLegalizedOperand(SDOperand(Node, 0), Result); - AddLegalizedOperand(SDOperand(Node, 1), Result.getValue(1)); - return Result.getValue(Op.ResNo); - + Result = DAG.UpdateNodeOperands(Result, Tmp1, Tmp2, Node->getOperand(2), + DAG.getValueType(MVT::i8)); + Tmp1 = Result.getValue(0); + Tmp2 = Result.getValue(1); + break; case TargetLowering::Custom: isCustom = true; // FALLTHROUGH case TargetLowering::Legal: - if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1)) - Result = DAG.getExtLoad(Node->getOpcode(), Node->getValueType(0), - Tmp1, Tmp2, Node->getOperand(2), SrcVT); - else - Result = SDOperand(Node, 0); - Tmp1 = Result.getValue(1); + Result = DAG.UpdateNodeOperands(Result, Tmp1, Tmp2, Node->getOperand(2), + Node->getOperand(3)); + Tmp1 = Result.getValue(0); + Tmp2 = Result.getValue(1); if (isCustom) { Tmp3 = TLI.LowerOperation(Tmp3, DAG); if (Tmp3.Val) { - Result = LegalizeOp(Tmp3); - Tmp1 = LegalizeOp(Tmp3.getValue(1)); + Tmp1 = LegalizeOp(Tmp3); + Tmp2 = LegalizeOp(Tmp3.getValue(1)); } } - - // Since loads produce two values, make sure to remember that we legalized - // both of them. - AddLegalizedOperand(SDOperand(Node, 0), Result); - AddLegalizedOperand(SDOperand(Node, 1), Tmp1); - return Op.ResNo ? Tmp1 : Result; + break; case TargetLowering::Expand: // f64 = EXTLOAD f32 should expand to LOAD, FP_EXTEND if (SrcVT == MVT::f32 && Node->getValueType(0) == MVT::f64) { SDOperand Load = DAG.getLoad(SrcVT, Tmp1, Tmp2, Node->getOperand(2)); Result = DAG.getNode(ISD::FP_EXTEND, Node->getValueType(0), Load); - Result = LegalizeOp(Result); // Relegalize new nodes. - Load = LegalizeOp(Load); - AddLegalizedOperand(SDOperand(Node, 0), Result); - AddLegalizedOperand(SDOperand(Node, 1), Load.getValue(1)); - return Op.ResNo ? Load.getValue(1) : Result; + Tmp1 = LegalizeOp(Result); // Relegalize new nodes. + Tmp2 = LegalizeOp(Load.getValue(1)); + break; } assert(Node->getOpcode() != ISD::EXTLOAD && "EXTLOAD should always be supported!"); @@ -943,20 +900,20 @@ Result, DAG.getValueType(SrcVT)); else ValRes = DAG.getZeroExtendInReg(Result, SrcVT); - Result = LegalizeOp(Result); // Relegalize new nodes. - ValRes = LegalizeOp(ValRes); // Relegalize new nodes. - AddLegalizedOperand(SDOperand(Node, 0), ValRes); - AddLegalizedOperand(SDOperand(Node, 1), Result.getValue(1)); - return Op.ResNo ? Result.getValue(1) : ValRes; + Tmp1 = LegalizeOp(ValRes); // Relegalize new nodes. + Tmp2 = LegalizeOp(Result.getValue(1)); // Relegalize new nodes. + break; } - assert(0 && "Unreachable"); + // Since loads produce two values, make sure to remember that we legalized + // both of them. + AddLegalizedOperand(SDOperand(Node, 0), Tmp1); + AddLegalizedOperand(SDOperand(Node, 1), Tmp2); + return Op.ResNo ? Tmp2 : Tmp1; } case ISD::EXTRACT_ELEMENT: { MVT::ValueType OpTy = Node->getOperand(0).getValueType(); switch (getTypeAction(OpTy)) { - default: - assert(0 && "EXTRACT_ELEMENT action for type unimplemented!"); - break; + default: assert(0 && "EXTRACT_ELEMENT action for type unimplemented!"); case Legal: if (cast(Node->getOperand(1))->getValue()) { // 1 -> Hi @@ -990,24 +947,22 @@ // Legalize the incoming value (must be a legal type). Tmp2 = LegalizeOp(Node->getOperand(2)); if (Node->getNumValues() == 1) { - if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(2)) - Result = DAG.getNode(ISD::CopyToReg, MVT::Other, Tmp1, - Node->getOperand(1), Tmp2); + Result = DAG.UpdateNodeOperands(Result, Tmp1, Node->getOperand(1), Tmp2); } else { assert(Node->getNumValues() == 2 && "Unknown CopyToReg"); - if (Node->getNumOperands() == 4) + if (Node->getNumOperands() == 4) { Tmp3 = LegalizeOp(Node->getOperand(3)); - if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(2) || - (Node->getNumOperands() == 4 && Tmp3 != Node->getOperand(3))) { - unsigned Reg = cast(Node->getOperand(1))->getReg(); - Result = DAG.getCopyToReg(Tmp1, Reg, Tmp2, Tmp3); + Result = DAG.UpdateNodeOperands(Result, Tmp1, Node->getOperand(1), Tmp2, + Tmp3); + } else { + Result = DAG.UpdateNodeOperands(Result, Tmp1, Node->getOperand(1),Tmp2); } // Since this produces two values, make sure to remember that we legalized // both of them. - AddLegalizedOperand(SDOperand(Node, 0), Result); + AddLegalizedOperand(SDOperand(Node, 0), Result.getValue(0)); AddLegalizedOperand(SDOperand(Node, 1), Result.getValue(1)); - return Result.getValue(Op.ResNo); + return Result; } break; @@ -1018,8 +973,7 @@ switch (getTypeAction(Node->getOperand(1).getValueType())) { case Legal: Tmp2 = LegalizeOp(Node->getOperand(1)); - if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1)) - Result = DAG.getNode(ISD::RET, MVT::Other, Tmp1, Tmp2); + Result = DAG.UpdateNodeOperands(Result, Tmp1, Tmp2); break; case Expand: { SDOperand Lo, Hi; @@ -1029,13 +983,13 @@ } case Promote: Tmp2 = PromoteOp(Node->getOperand(1)); - Result = DAG.getNode(ISD::RET, MVT::Other, Tmp1, Tmp2); + Result = DAG.UpdateNodeOperands(Result, Tmp1, Tmp2); + Result = LegalizeOp(Result); break; } break; case 1: // ret void - if (Tmp1 != Node->getOperand(0)) - Result = DAG.getNode(ISD::RET, MVT::Other, Tmp1); + Result = DAG.UpdateNodeOperands(Result, Tmp1); break; default: { // ret std::vector NewValues; @@ -1055,7 +1009,11 @@ case Promote: assert(0 && "Can't promote multiple return value yet!"); } - Result = DAG.getNode(ISD::RET, MVT::Other, NewValues); + + if (NewValues.size() == Node->getNumOperands()) + Result = DAG.UpdateNodeOperands(Result, NewValues); + else + Result = DAG.getNode(ISD::RET, MVT::Other, NewValues); break; } } @@ -1078,29 +1036,23 @@ // FIXME: We shouldn't do this for TargetConstantFP's. if (ConstantFPSDNode *CFP =dyn_cast(Node->getOperand(1))){ if (CFP->getValueType(0) == MVT::f32) { - Result = DAG.getNode(ISD::STORE, MVT::Other, Tmp1, - DAG.getConstant(FloatToBits(CFP->getValue()), - MVT::i32), - Tmp2, Node->getOperand(3)); + Tmp3 = DAG.getConstant(FloatToBits(CFP->getValue()), MVT::i32); } else { assert(CFP->getValueType(0) == MVT::f64 && "Unknown FP type!"); - Result = DAG.getNode(ISD::STORE, MVT::Other, Tmp1, - DAG.getConstant(DoubleToBits(CFP->getValue()), - MVT::i64), - Tmp2, Node->getOperand(3)); + Tmp3 = DAG.getConstant(DoubleToBits(CFP->getValue()), MVT::i64); } + Result = DAG.getNode(ISD::STORE, MVT::Other, Tmp1, Tmp3, Tmp2, + Node->getOperand(3)); break; } switch (getTypeAction(Node->getOperand(1).getValueType())) { case Legal: { - SDOperand Val = LegalizeOp(Node->getOperand(1)); - if (Tmp1 != Node->getOperand(0) || Val != Node->getOperand(1) || - Tmp2 != Node->getOperand(2)) - Result = DAG.getNode(ISD::STORE, MVT::Other, Tmp1, Val, Tmp2, - Node->getOperand(3)); + Tmp3 = LegalizeOp(Node->getOperand(1)); + Result = DAG.UpdateNodeOperands(Result, Tmp1, Tmp3, Tmp2, + Node->getOperand(3)); - MVT::ValueType VT = Result.Val->getOperand(1).getValueType(); + MVT::ValueType VT = Tmp3.getValueType(); switch (TLI.getOperationAction(ISD::STORE, VT)) { default: assert(0 && "This action is not supported yet!"); case TargetLowering::Legal: break; @@ -1154,58 +1106,48 @@ } case ISD::PCMARKER: Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain. - if (Tmp1 != Node->getOperand(0)) - Result = DAG.getNode(ISD::PCMARKER, MVT::Other, Tmp1,Node->getOperand(1)); + Result = DAG.UpdateNodeOperands(Result, Tmp1, Node->getOperand(1)); break; case ISD::STACKSAVE: Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain. - if (Tmp1 != Node->getOperand(0)) { - std::vector VTs; - VTs.push_back(Node->getValueType(0)); - VTs.push_back(MVT::Other); - std::vector Ops; - Ops.push_back(Tmp1); - Result = DAG.getNode(ISD::STACKSAVE, VTs, Ops); - } - - Tmp1 = Result.getValue(1); + Result = DAG.UpdateNodeOperands(Result, Tmp1); + Tmp1 = Result.getValue(0); + Tmp2 = Result.getValue(1); switch (TLI.getOperationAction(ISD::STACKSAVE, MVT::Other)) { default: assert(0 && "This action is not supported yet!"); case TargetLowering::Legal: break; case TargetLowering::Custom: - Tmp2 = TLI.LowerOperation(Result, DAG); - if (Tmp2.Val) { - Result = LegalizeOp(Tmp2); - Tmp1 = LegalizeOp(Tmp2.getValue(1)); + Tmp3 = TLI.LowerOperation(Result, DAG); + if (Tmp3.Val) { + Tmp1 = LegalizeOp(Tmp3); + Tmp2 = LegalizeOp(Tmp3.getValue(1)); } break; case TargetLowering::Expand: // Expand to CopyFromReg if the target set // StackPointerRegisterToSaveRestore. if (unsigned SP = TLI.getStackPointerRegisterToSaveRestore()) { - Tmp2 = DAG.getCopyFromReg(Result.getOperand(0), SP, + Tmp1 = DAG.getCopyFromReg(Result.getOperand(0), SP, Node->getValueType(0)); - Result = Tmp2; - Tmp1 = Tmp2.getValue(1); + Tmp2 = Tmp1.getValue(1); } else { - Result = DAG.getNode(ISD::UNDEF, Node->getValueType(0)); - Tmp1 = Node->getOperand(0); + Tmp1 = DAG.getNode(ISD::UNDEF, Node->getValueType(0)); + Tmp2 = Node->getOperand(0); } break; } // Since stacksave produce two values, make sure to remember that we // legalized both of them. - AddLegalizedOperand(SDOperand(Node, 0), Result); - AddLegalizedOperand(SDOperand(Node, 1), Tmp1); - return Op.ResNo ? Tmp1 : Result; + AddLegalizedOperand(SDOperand(Node, 0), Tmp1); + AddLegalizedOperand(SDOperand(Node, 1), Tmp2); + return Op.ResNo ? Tmp2 : Tmp1; case ISD::STACKRESTORE: Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain. Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the pointer. - if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1)) - Result = DAG.getNode(ISD::STACKRESTORE, MVT::Other, Tmp1, Tmp2); + Result = DAG.UpdateNodeOperands(Result, Tmp1, Tmp2); switch (TLI.getOperationAction(ISD::STACKRESTORE, MVT::Other)) { default: assert(0 && "This action is not supported yet!"); @@ -1228,20 +1170,13 @@ case ISD::READCYCLECOUNTER: Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain - if (Tmp1 != Node->getOperand(0)) { - std::vector rtypes; - std::vector rvals; - rtypes.push_back(MVT::i64); - rtypes.push_back(MVT::Other); - rvals.push_back(Tmp1); - Result = DAG.getNode(ISD::READCYCLECOUNTER, rtypes, rvals); - } + Result = DAG.UpdateNodeOperands(Result, Tmp1); // Since rdcc produce two values, make sure to remember that we legalized // both of them. - AddLegalizedOperand(SDOperand(Node, 0), Result); + AddLegalizedOperand(SDOperand(Node, 0), Result.getValue(0)); AddLegalizedOperand(SDOperand(Node, 1), Result.getValue(1)); - return Result.getValue(Op.ResNo); + return Result; case ISD::TRUNCSTORE: { Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain. @@ -1264,8 +1199,8 @@ } else if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1) || Tmp3 != Node->getOperand(2)) { - Result = DAG.getNode(ISD::TRUNCSTORE, MVT::Other, Tmp1, Tmp2, Tmp3, - Node->getOperand(3), Node->getOperand(4)); + Result = DAG.UpdateNodeOperands(Result, Tmp1, Tmp2, Tmp3, + Node->getOperand(3), Node->getOperand(4)); } MVT::ValueType StVT = cast(Result.Val->getOperand(4))->getVT(); @@ -1292,10 +1227,7 @@ Tmp2 = LegalizeOp(Node->getOperand(1)); // TrueVal Tmp3 = LegalizeOp(Node->getOperand(2)); // FalseVal - if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1) || - Tmp3 != Node->getOperand(2)) - Result = DAG.getNode(ISD::SELECT, Node->getValueType(0), - Tmp1, Tmp2, Tmp3); + Result = DAG.UpdateNodeOperands(Result, Tmp1, Tmp2, Tmp3); switch (TLI.getOperationAction(ISD::SELECT, Tmp2.getValueType())) { default: assert(0 && "This action is not supported yet!"); @@ -1347,11 +1279,9 @@ if (isTypeLegal(Node->getOperand(0).getValueType())) { Tmp1 = LegalizeOp(Node->getOperand(0)); // LHS Tmp2 = LegalizeOp(Node->getOperand(1)); // RHS - if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1) || - Tmp3 != Node->getOperand(2) || Tmp4 != Node->getOperand(3)) { - Result = DAG.getNode(ISD::SELECT_CC, Node->getValueType(0), Tmp1,Tmp2, - Tmp3, Tmp4, Node->getOperand(4)); - } + + Result = DAG.UpdateNodeOperands(Result, Tmp1, Tmp2, Tmp3, Tmp4, + Node->getOperand(4)); // Everything is legal, see if we should expand this op or something. switch (TLI.getOperationAction(ISD::SELECT_CC, @@ -1501,9 +1431,7 @@ isCustom = true; // FALLTHROUGH. case TargetLowering::Legal: - if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1)) - Result = DAG.getNode(ISD::SETCC, Node->getValueType(0), Tmp1, Tmp2, - Node->getOperand(2)); + Result = DAG.UpdateNodeOperands(Result, Tmp1, Tmp2, Node->getOperand(2)); if (isCustom) { Tmp3 = TLI.LowerOperation(Result, DAG); if (Tmp3.Val) Result = Tmp3; @@ -1535,9 +1463,9 @@ Tmp1 = DAG.getNode(ISD::FP_EXTEND, NewInTy, Tmp1); Tmp2 = DAG.getNode(ISD::FP_EXTEND, NewInTy, Tmp2); } - - Result = DAG.getNode(ISD::SETCC, Node->getValueType(0), Tmp1, Tmp2, - Node->getOperand(2)); + Tmp1 = LegalizeOp(Tmp1); + Tmp2 = LegalizeOp(Tmp2); + Result = DAG.UpdateNodeOperands(Result, Tmp1, Tmp2, Node->getOperand(2)); Result = LegalizeOp(Result); break; } @@ -1548,7 +1476,6 @@ Result = DAG.getNode(ISD::SELECT_CC, VT, Tmp1, Tmp2, DAG.getConstant(1, VT), DAG.getConstant(0, VT), Node->getOperand(2)); - Result = LegalizeOp(Result); break; } break; @@ -1605,14 +1532,7 @@ isCustom = true; // FALLTHROUGH case TargetLowering::Legal: - if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1) || - Tmp3 != Node->getOperand(2) || Tmp4 != Node->getOperand(3) || - Tmp5 != Node->getOperand(4)) { - std::vector Ops; - Ops.push_back(Tmp1); Ops.push_back(Tmp2); Ops.push_back(Tmp3); - Ops.push_back(Tmp4); Ops.push_back(Tmp5); - Result = DAG.getNode(Node->getOpcode(), MVT::Other, Ops); - } + Result = DAG.UpdateNodeOperands(Result, Tmp1, Tmp2, Tmp3, Tmp4, Tmp5); if (isCustom) { Tmp1 = TLI.LowerOperation(Result, DAG); if (Tmp1.Val) Result = Tmp1; @@ -1657,27 +1577,18 @@ case ISD::READPORT: Tmp1 = LegalizeOp(Node->getOperand(0)); Tmp2 = LegalizeOp(Node->getOperand(1)); + Result = DAG.UpdateNodeOperands(Result, Tmp1, Tmp2); - if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1)) { - std::vector VTs(Node->value_begin(), Node->value_end()); - std::vector Ops; - Ops.push_back(Tmp1); - Ops.push_back(Tmp2); - Result = DAG.getNode(ISD::READPORT, VTs, Ops); - } else - Result = SDOperand(Node, 0); // Since these produce two values, make sure to remember that we legalized // both of them. - AddLegalizedOperand(SDOperand(Node, 0), Result); + AddLegalizedOperand(SDOperand(Node, 0), Result.getValue(0)); AddLegalizedOperand(SDOperand(Node, 1), Result.getValue(1)); - return Result.getValue(Op.ResNo); + return Result; case ISD::WRITEPORT: Tmp1 = LegalizeOp(Node->getOperand(0)); Tmp2 = LegalizeOp(Node->getOperand(1)); Tmp3 = LegalizeOp(Node->getOperand(2)); - if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1) || - Tmp3 != Node->getOperand(2)) - Result = DAG.getNode(Node->getOpcode(), MVT::Other, Tmp1, Tmp2, Tmp3); + Result = DAG.UpdateNodeOperands(Result, Tmp1, Tmp2, Tmp3); break; case ISD::READIO: @@ -1688,14 +1599,7 @@ case TargetLowering::Custom: default: assert(0 && "This action not implemented for this operation!"); case TargetLowering::Legal: - if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1)) { - std::vector VTs(Node->value_begin(), Node->value_end()); - std::vector Ops; - Ops.push_back(Tmp1); - Ops.push_back(Tmp2); - Result = DAG.getNode(ISD::READPORT, VTs, Ops); - } else - Result = SDOperand(Node, 0); + Result = DAG.UpdateNodeOperands(Result, Tmp1, Tmp2); break; case TargetLowering::Expand: // Replace this with a load from memory. @@ -1707,7 +1611,7 @@ // Since these produce two values, make sure to remember that we legalized // both of them. - AddLegalizedOperand(SDOperand(Node, 0), Result); + AddLegalizedOperand(SDOperand(Node, 0), Result.getValue(0)); AddLegalizedOperand(SDOperand(Node, 1), Result.getValue(1)); return Result.getValue(Op.ResNo); @@ -1721,9 +1625,7 @@ case TargetLowering::Custom: default: assert(0 && "This action not implemented for this operation!"); case TargetLowering::Legal: - if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1) || - Tmp3 != Node->getOperand(2)) - Result = DAG.getNode(Node->getOpcode(), MVT::Other, Tmp1, Tmp2, Tmp3); + Result = DAG.UpdateNodeOperands(Result, Tmp1, Tmp2, Tmp3); break; case TargetLowering::Expand: // Replace this with a store to memory. @@ -1745,10 +1647,8 @@ Ops.push_back(LegalizeOp(Node->getOperand(i))); Changed |= Ops.back() != Node->getOperand(i); } - if (Changed) { - std::vector VTs(Node->value_begin(), Node->value_end()); - Result = DAG.getNode(Node->getOpcode(), VTs, Ops); - } + if (Changed) + Result = DAG.UpdateNodeOperands(Result, Ops); switch (TLI.getOperationAction(Node->getOpcode(), Node->getValueType(0))) { @@ -1805,9 +1705,8 @@ Tmp2 = PromoteOp(Node->getOperand(1)); // Promote the RHS. break; } - - if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1)) - Result = DAG.getNode(Node->getOpcode(), Node->getValueType(0), Tmp1,Tmp2); + + Result = DAG.UpdateNodeOperands(Result, Tmp1, Tmp2); switch (TLI.getOperationAction(Node->getOpcode(), Node->getValueType(0))) { default: assert(0 && "Operation not supported"); @@ -1856,9 +1755,7 @@ isCustom = true; // FALLTHROUGH case TargetLowering::Legal: - if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1)) - Result = DAG.getNode(Node->getOpcode(), Node->getValueType(0), - Tmp1, Tmp2); + Result = DAG.UpdateNodeOperands(Result, Tmp1, Tmp2); if (isCustom) { Tmp1 = TLI.LowerOperation(Result, DAG); if (Tmp1.Val) Result = Tmp1; @@ -1892,10 +1789,8 @@ isCustom = true; // FALLTHROUGH case TargetLowering::Legal: - if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1)) - Result = DAG.getVAArg(VT, Tmp1, Tmp2, Node->getOperand(2)); - else - Result = SDOperand(Node, 0); + Result = DAG.UpdateNodeOperands(Result, Tmp1, Tmp2, Node->getOperand(2)); + Result = Result.getValue(0); Tmp1 = Result.getValue(1); if (isCustom) { @@ -1941,10 +1836,8 @@ isCustom = true; // FALLTHROUGH case TargetLowering::Legal: - if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1) || - Tmp3 != Node->getOperand(2)) - Result = DAG.getNode(ISD::VACOPY, MVT::Other, Tmp1, Tmp2, Tmp3, - Node->getOperand(3), Node->getOperand(4)); + Result = DAG.UpdateNodeOperands(Result, Tmp1, Tmp2, Tmp3, + Node->getOperand(3), Node->getOperand(4)); if (isCustom) { Tmp1 = TLI.LowerOperation(Result, DAG); if (Tmp1.Val) Result = Tmp1; @@ -1970,9 +1863,7 @@ isCustom = true; // FALLTHROUGH case TargetLowering::Legal: - if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1)) - Result = DAG.getNode(ISD::VAEND, MVT::Other, Tmp1, Tmp2, - Node->getOperand(2)); + Result = DAG.UpdateNodeOperands(Result, Tmp1, Tmp2, Node->getOperand(2)); if (isCustom) { Tmp1 = TLI.LowerOperation(Tmp1, DAG); if (Tmp1.Val) Result = Tmp1; @@ -1988,10 +1879,8 @@ Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain. Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the pointer. - if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1)) - Result = DAG.getNode(ISD::VASTART, MVT::Other, Tmp1, Tmp2, - Node->getOperand(2)); - + Result = DAG.UpdateNodeOperands(Result, Tmp1, Tmp2, Node->getOperand(2)); + switch (TLI.getOperationAction(ISD::VASTART, MVT::Other)) { default: assert(0 && "This action is not supported yet!"); case TargetLowering::Legal: break; @@ -2009,8 +1898,7 @@ assert(TLI.isOperationLegal(Node->getOpcode(), Node->getValueType(0)) && "Cannot handle this yet!"); - if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1)) - Result = DAG.getNode(Node->getOpcode(), Node->getValueType(0), Tmp1,Tmp2); + Result = DAG.UpdateNodeOperands(Result, Tmp1, Tmp2); break; case ISD::BSWAP: @@ -2019,8 +1907,7 @@ case TargetLowering::Custom: assert(0 && "Cannot custom legalize this yet!"); case TargetLowering::Legal: - if (Tmp1 != Node->getOperand(0)) - Result = DAG.getNode(Node->getOpcode(), Node->getValueType(0), Tmp1); + Result = DAG.UpdateNodeOperands(Result, Tmp1); break; case TargetLowering::Promote: { MVT::ValueType OVT = Tmp1.getValueType(); @@ -2046,8 +1933,7 @@ switch (TLI.getOperationAction(Node->getOpcode(), Node->getValueType(0))) { case TargetLowering::Custom: assert(0 && "Cannot custom handle this yet!"); case TargetLowering::Legal: - if (Tmp1 != Node->getOperand(0)) - Result = DAG.getNode(Node->getOpcode(), Node->getValueType(0), Tmp1); + Result = DAG.UpdateNodeOperands(Result, Tmp1); break; case TargetLowering::Promote: { MVT::ValueType OVT = Tmp1.getValueType(); @@ -2096,8 +1982,7 @@ case TargetLowering::Custom: assert(0 && "Cannot promote/custom handle this yet!"); case TargetLowering::Legal: - if (Tmp1 != Node->getOperand(0)) - Result = DAG.getNode(Node->getOpcode(), Node->getValueType(0), Tmp1); + Result = DAG.UpdateNodeOperands(Result, Tmp1); break; case TargetLowering::Expand: switch (Node->getOpcode()) { @@ -2148,8 +2033,7 @@ break; case TargetLowering::Legal: Tmp1 = LegalizeOp(Node->getOperand(0)); - if (Tmp1 != Node->getOperand(0)) - Result = DAG.getNode(ISD::BIT_CONVERT, Node->getValueType(0), Tmp1); + Result = DAG.UpdateNodeOperands(Result, Tmp1); break; } } @@ -2168,8 +2052,7 @@ // FALLTHROUGH case TargetLowering::Legal: Tmp1 = LegalizeOp(Node->getOperand(0)); - if (Tmp1 != Node->getOperand(0)) - Result = DAG.getNode(Node->getOpcode(), Node->getValueType(0), Tmp1); + Result = DAG.UpdateNodeOperands(Result, Tmp1); if (isCustom) { Tmp1 = TLI.LowerOperation(Result, DAG); if (Tmp1.Val) Result = Tmp1; @@ -2192,17 +2075,16 @@ Node->getValueType(0), Node->getOperand(0)); break; case Promote: + Tmp1 = PromoteOp(Node->getOperand(0)); if (isSigned) { - Result = PromoteOp(Node->getOperand(0)); - Result = DAG.getNode(ISD::SIGN_EXTEND_INREG, Result.getValueType(), - Result, DAG.getValueType(Node->getOperand(0).getValueType())); - Result = DAG.getNode(ISD::SINT_TO_FP, Op.getValueType(), Result); + Tmp1 = DAG.getNode(ISD::SIGN_EXTEND_INREG, Tmp1.getValueType(), + Tmp1, DAG.getValueType(Node->getOperand(0).getValueType())); } else { - Result = PromoteOp(Node->getOperand(0)); - Result = DAG.getZeroExtendInReg(Result, - Node->getOperand(0).getValueType()); - Result = DAG.getNode(ISD::UINT_TO_FP, Op.getValueType(), Result); + Tmp1 = DAG.getZeroExtendInReg(Tmp1, + Node->getOperand(0).getValueType()); } + Result = DAG.UpdateNodeOperands(Result, Tmp1); + Result = LegalizeOp(Result); // The 'op' is not necessarily legal! break; } break; @@ -2211,8 +2093,7 @@ switch (getTypeAction(Node->getOperand(0).getValueType())) { case Legal: Tmp1 = LegalizeOp(Node->getOperand(0)); - if (Tmp1 != Node->getOperand(0)) - Result = DAG.getNode(Node->getOpcode(), Node->getValueType(0), Tmp1); + Result = DAG.UpdateNodeOperands(Result, Tmp1); break; case Expand: ExpandOp(Node->getOperand(0), Tmp1, Tmp2); @@ -2240,9 +2121,7 @@ isCustom = true; // FALLTHROUGH case TargetLowering::Legal: - if (Tmp1 != Node->getOperand(0)) - Result = DAG.getNode(Node->getOpcode(), Node->getValueType(0), Tmp1); - + Result = DAG.UpdateNodeOperands(Result, Tmp1); if (isCustom) { Tmp1 = TLI.LowerOperation(Result, DAG); if (Tmp1.Val) Result = Tmp1; @@ -2278,8 +2157,9 @@ case Expand: assert(0 && "Shouldn't need to expand other operators here!"); case Promote: - Result = PromoteOp(Node->getOperand(0)); - Result = DAG.getNode(Node->getOpcode(), Op.getValueType(), Result); + Tmp1 = PromoteOp(Node->getOperand(0)); + Result = DAG.UpdateNodeOperands(Result, LegalizeOp(Tmp1)); + Result = LegalizeOp(Result); break; } break; @@ -2293,14 +2173,13 @@ case Expand: assert(0 && "Shouldn't need to expand other operators here!"); case Legal: Tmp1 = LegalizeOp(Node->getOperand(0)); - if (Tmp1 != Node->getOperand(0)) - Result = DAG.getNode(Node->getOpcode(), Node->getValueType(0), Tmp1); + Result = DAG.UpdateNodeOperands(Result, Tmp1); break; case Promote: switch (Node->getOpcode()) { case ISD::ANY_EXTEND: - Result = PromoteOp(Node->getOperand(0)); - Result = DAG.getNode(ISD::ANY_EXTEND, Op.getValueType(), Result); + Tmp1 = PromoteOp(Node->getOperand(0)); + Result = DAG.getNode(ISD::ANY_EXTEND, Op.getValueType(), Tmp1); break; case ISD::ZERO_EXTEND: Result = PromoteOp(Node->getOperand(0)); @@ -2338,9 +2217,7 @@ switch (TLI.getOperationAction(Node->getOpcode(), ExtraVT)) { default: assert(0 && "This action not supported for this op yet!"); case TargetLowering::Legal: - if (Tmp1 != Node->getOperand(0)) - Result = DAG.getNode(Node->getOpcode(), Node->getValueType(0), Tmp1, - DAG.getValueType(ExtraVT)); + Result = DAG.UpdateNodeOperands(Result, Tmp1, Node->getOperand(1)); break; case TargetLowering::Expand: // If this is an integer extend and shifts are supported, do that. From jeffc at jolt-lang.org Sat Jan 28 12:09:31 2006 From: jeffc at jolt-lang.org (Jeff Cohen) Date: Sat, 28 Jan 2006 12:09:31 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86Subtarget.cpp Message-ID: <200601281809.MAA17475@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: X86Subtarget.cpp updated: 1.15 -> 1.16 --- Log message: Improve X86 subtarget support for Windows and AMD. --- Diffs of the changes: (+77 -38) X86Subtarget.cpp | 115 ++++++++++++++++++++++++++++++++++++------------------- 1 files changed, 77 insertions(+), 38 deletions(-) Index: llvm/lib/Target/X86/X86Subtarget.cpp diff -u llvm/lib/Target/X86/X86Subtarget.cpp:1.15 llvm/lib/Target/X86/X86Subtarget.cpp:1.16 --- llvm/lib/Target/X86/X86Subtarget.cpp:1.15 Sat Jan 28 00:05:41 2006 +++ llvm/lib/Target/X86/X86Subtarget.cpp Sat Jan 28 12:09:06 2006 @@ -25,20 +25,34 @@ /// GetCpuIDAndInfo - Execute the specified cpuid and return the 4 values in the /// specified arguments. If we can't run cpuid on the host, return true. -static bool GetCpuIDAndInfo(unsigned value, unsigned *EAX, unsigned *EBX, - unsigned *ECX, unsigned *EDX) { +static bool GetCpuIDAndInfo(unsigned value, unsigned *rEAX, unsigned *rEBX, + unsigned *rECX, unsigned *rEDX) { #if defined(i386) || defined(__i386__) || defined(__x86__) || defined(_M_IX86) #if defined(__GNUC__) asm ("pushl\t%%ebx\n\t" "cpuid\n\t" "movl\t%%ebx, %%esi\n\t" "popl\t%%ebx" - : "=a" (*EAX), - "=S" (*EBX), - "=c" (*ECX), - "=d" (*EDX) + : "=a" (*rEAX), + "=S" (*rEBX), + "=c" (*rECX), + "=d" (*rEDX) : "a" (value)); return false; +#elif defined(_MSC_VER) + __asm { + mov eax,value + cpuid + mov esi,rEAX + mov dword ptr [esi],eax + mov esi,rEBX + mov dword ptr [esi],ebx + mov esi,rECX + mov dword ptr [esi],ecx + mov esi,rEDX + mov dword ptr [esi],edx + } + return false; #endif #endif return true; @@ -53,42 +67,61 @@ GetCpuIDAndInfo(0x80000001, &EAX, &EBX, &ECX, &EDX); bool Em64T = EDX & (1 << 29); - switch (Family) { - case 3: - return "i386"; - case 4: - return "i486"; - case 5: - switch (Model) { - case 4: return "pentium-mmx"; - default: return "pentium"; - } - case 6: - switch (Model) { - case 1: return "pentiumpro"; + unsigned text[12]; + GetCpuIDAndInfo(0x80000002, text+0, text+1, text+2, text+3); + GetCpuIDAndInfo(0x80000003, text+4, text+5, text+6, text+7); + GetCpuIDAndInfo(0x80000004, text+8, text+9, text+10, text+11); + char *t = reinterpret_cast(&text[0]); + + if (memcmp(t, "Intel", 5) == 0) { + switch (Family) { case 3: - case 5: - case 6: return "pentium2"; - case 7: - case 8: - case 10: - case 11: return "pentium3"; - case 9: - case 13: return "pentium-m"; - case 14: return "yonah"; - default: return "i686"; - } - case 15: { - switch (Model) { - case 3: + return "i386"; case 4: - return (Em64T) ? "nocona" : "prescott"; - default: - return (Em64T) ? "x86-64" : "pentium4"; + return "i486"; + case 5: + switch (Model) { + case 4: return "pentium-mmx"; + default: return "pentium"; + } + case 6: + switch (Model) { + case 1: return "pentiumpro"; + case 3: + case 5: + case 6: return "pentium2"; + case 7: + case 8: + case 10: + case 11: return "pentium3"; + case 9: + case 13: return "pentium-m"; + case 14: return "yonah"; + default: return "i686"; + } + case 15: { + switch (Model) { + case 3: + case 4: + return (Em64T) ? "nocona" : "prescott"; + default: + return (Em64T) ? "x86-64" : "pentium4"; + } } + + default: + return "generic"; } - - default: + } else if (memcmp(t, "AMD", 3) == 0) { + // FIXME: fill in remaining family/model combinations + switch (Family) { + case 15: + return (Em64T) ? "athlon64" : "athlon"; + + default: + return "generic"; + } + } else { return "generic"; } } @@ -106,6 +139,12 @@ // Parse features string. ParseSubtargetFeatures(FS, CPU); + // FIXME: Just because the CPU supports 64-bit operation doesn't mean it isn't + // currently running a 32-bit operating system. This must be taken into account. + // This hack will do for now, though obviously it breaks cross-compilation. + if (sizeof(void *) == 4) + Is64Bit = false; + // Default to ELF unless otherwise specified. TargetType = isELF; From lattner at cs.uiuc.edu Sat Jan 28 12:19:58 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Sat, 28 Jan 2006 12:19:58 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86CodeEmitter.cpp Message-ID: <200601281819.MAA21720@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: X86CodeEmitter.cpp updated: 1.85 -> 1.86 --- Log message: Fix a bunch of JIT failures with the new isel --- Diffs of the changes: (+15 -4) X86CodeEmitter.cpp | 19 +++++++++++++++---- 1 files changed, 15 insertions(+), 4 deletions(-) Index: llvm/lib/Target/X86/X86CodeEmitter.cpp diff -u llvm/lib/Target/X86/X86CodeEmitter.cpp:1.85 llvm/lib/Target/X86/X86CodeEmitter.cpp:1.86 --- llvm/lib/Target/X86/X86CodeEmitter.cpp:1.85 Fri Jan 27 12:27:18 2006 +++ llvm/lib/Target/X86/X86CodeEmitter.cpp Sat Jan 28 12:19:37 2006 @@ -394,10 +394,21 @@ switch (Desc.TSFlags & X86II::FormMask) { default: assert(0 && "Unknown FormMask value in X86 MachineCodeEmitter!"); case X86II::Pseudo: - if (Opcode != X86::IMPLICIT_USE && - Opcode != X86::IMPLICIT_DEF && - Opcode != X86::FP_REG_KILL) - std::cerr << "X86 Machine Code Emitter: No 'form', not emitting: " << MI; +#ifndef NDEBUG + switch (Opcode) { + default: + assert(0 && "psuedo instructions should be removed before code emission"); + case X86::IMPLICIT_USE: + case X86::IMPLICIT_DEF: + case X86::IMPLICIT_DEF_R8: + case X86::IMPLICIT_DEF_R16: + case X86::IMPLICIT_DEF_R32: + case X86::IMPLICIT_DEF_FR32: + case X86::IMPLICIT_DEF_FR64: + case X86::FP_REG_KILL: + break; + } +#endif break; case X86II::RawFrm: From lattner at cs.uiuc.edu Sat Jan 28 12:24:00 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Sat, 28 Jan 2006 12:24:00 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86Subtarget.cpp Message-ID: <200601281824.MAA22634@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: X86Subtarget.cpp updated: 1.16 -> 1.17 --- Log message: Is64Bit reflects the capability of the chip, not an aspect of the target os --- Diffs of the changes: (+0 -6) X86Subtarget.cpp | 6 ------ 1 files changed, 6 deletions(-) Index: llvm/lib/Target/X86/X86Subtarget.cpp diff -u llvm/lib/Target/X86/X86Subtarget.cpp:1.16 llvm/lib/Target/X86/X86Subtarget.cpp:1.17 --- llvm/lib/Target/X86/X86Subtarget.cpp:1.16 Sat Jan 28 12:09:06 2006 +++ llvm/lib/Target/X86/X86Subtarget.cpp Sat Jan 28 12:23:48 2006 @@ -139,12 +139,6 @@ // Parse features string. ParseSubtargetFeatures(FS, CPU); - // FIXME: Just because the CPU supports 64-bit operation doesn't mean it isn't - // currently running a 32-bit operating system. This must be taken into account. - // This hack will do for now, though obviously it breaks cross-compilation. - if (sizeof(void *) == 4) - Is64Bit = false; - // Default to ELF unless otherwise specified. TargetType = isELF; From jeffc at jolt-lang.org Sat Jan 28 12:38:32 2006 From: jeffc at jolt-lang.org (Jeff Cohen) Date: Sat, 28 Jan 2006 12:38:32 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86Subtarget.cpp Message-ID: <200601281838.MAA22878@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: X86Subtarget.cpp updated: 1.17 -> 1.18 --- Log message: Fix recognition of Intel CPUs. --- Diffs of the changes: (+2 -0) X86Subtarget.cpp | 2 ++ 1 files changed, 2 insertions(+) Index: llvm/lib/Target/X86/X86Subtarget.cpp diff -u llvm/lib/Target/X86/X86Subtarget.cpp:1.17 llvm/lib/Target/X86/X86Subtarget.cpp:1.18 --- llvm/lib/Target/X86/X86Subtarget.cpp:1.17 Sat Jan 28 12:23:48 2006 +++ llvm/lib/Target/X86/X86Subtarget.cpp Sat Jan 28 12:38:20 2006 @@ -72,6 +72,8 @@ GetCpuIDAndInfo(0x80000003, text+4, text+5, text+6, text+7); GetCpuIDAndInfo(0x80000004, text+8, text+9, text+10, text+11); char *t = reinterpret_cast(&text[0]); + while (*t == ' ') + t++; if (memcmp(t, "Intel", 5) == 0) { switch (Family) { From jeffc at jolt-lang.org Sat Jan 28 12:47:44 2006 From: jeffc at jolt-lang.org (Jeff Cohen) Date: Sat, 28 Jan 2006 12:47:44 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86Subtarget.cpp Message-ID: <200601281847.MAA23035@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: X86Subtarget.cpp updated: 1.18 -> 1.19 --- Log message: Use union instead of reinterpret_cast. --- Diffs of the changes: (+9 -5) X86Subtarget.cpp | 14 +++++++++----- 1 files changed, 9 insertions(+), 5 deletions(-) Index: llvm/lib/Target/X86/X86Subtarget.cpp diff -u llvm/lib/Target/X86/X86Subtarget.cpp:1.18 llvm/lib/Target/X86/X86Subtarget.cpp:1.19 --- llvm/lib/Target/X86/X86Subtarget.cpp:1.18 Sat Jan 28 12:38:20 2006 +++ llvm/lib/Target/X86/X86Subtarget.cpp Sat Jan 28 12:47:32 2006 @@ -67,11 +67,15 @@ GetCpuIDAndInfo(0x80000001, &EAX, &EBX, &ECX, &EDX); bool Em64T = EDX & (1 << 29); - unsigned text[12]; - GetCpuIDAndInfo(0x80000002, text+0, text+1, text+2, text+3); - GetCpuIDAndInfo(0x80000003, text+4, text+5, text+6, text+7); - GetCpuIDAndInfo(0x80000004, text+8, text+9, text+10, text+11); - char *t = reinterpret_cast(&text[0]); + union { + unsigned u[12]; + char c[48]; + } text; + + GetCpuIDAndInfo(0x80000002, text.u+0, text.u+1, text.u+2, text.u+3); + GetCpuIDAndInfo(0x80000003, text.u+4, text.u+5, text.u+6, text.u+7); + GetCpuIDAndInfo(0x80000004, text.u+8, text.u+9, text.u+10, text.u+11); + char *t = text.c; while (*t == ' ') t++; From lattner at cs.uiuc.edu Sat Jan 28 13:07:02 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Sat, 28 Jan 2006 13:07:02 -0600 Subject: [llvm-commits] CVS: llvm/utils/TableGen/DAGISelEmitter.cpp Message-ID: <200601281907.NAA23402@zion.cs.uiuc.edu> Changes in directory llvm/utils/TableGen: DAGISelEmitter.cpp updated: 1.147 -> 1.148 --- Log message: Fit to 80 columns, no functionality change --- Diffs of the changes: (+20 -14) DAGISelEmitter.cpp | 34 ++++++++++++++++++++-------------- 1 files changed, 20 insertions(+), 14 deletions(-) Index: llvm/utils/TableGen/DAGISelEmitter.cpp diff -u llvm/utils/TableGen/DAGISelEmitter.cpp:1.147 llvm/utils/TableGen/DAGISelEmitter.cpp:1.148 --- llvm/utils/TableGen/DAGISelEmitter.cpp:1.147 Fri Jan 27 16:22:28 2006 +++ llvm/utils/TableGen/DAGISelEmitter.cpp Sat Jan 28 13:06:51 2006 @@ -72,7 +72,8 @@ /// vector contains isFP or a FP value type. static bool isExtFloatingPointInVTs(std::vector EVTs) { assert(!EVTs.empty() && "Cannot check for integer in empty ExtVT list!"); - return EVTs[0] == MVT::isFP || !(FilterEVTs(EVTs, MVT::isFloatingPoint).empty()); + return EVTs[0] == MVT::isFP || + !(FilterEVTs(EVTs, MVT::isFloatingPoint).empty()); } //===----------------------------------------------------------------------===// @@ -339,7 +340,8 @@ } if (ExtVTs[0] == MVT::isFP && isExtFloatingPointInVTs(getExtTypes())) { assert(hasTypeSet() && "should be handled above!"); - std::vector FVTs = FilterEVTs(getExtTypes(), MVT::isFloatingPoint); + std::vector FVTs = + FilterEVTs(getExtTypes(), MVT::isFloatingPoint); if (getExtTypes() == FVTs) return false; setTypes(FVTs); @@ -1290,8 +1292,8 @@ Record *InRec = static_cast(InVal->getLeafValue())->getDef(); if (CGI.OperandList[i].Rec != InRec && !InRec->isSubClassOf("ComplexPattern")) - I->error("Operand $" + OpName + - "'s register class disagrees between the operand and pattern"); + I->error("Operand $" + OpName + "'s register class disagrees" + " between the operand and pattern"); } Operands.push_back(CGI.OperandList[i].Rec); @@ -1890,7 +1892,7 @@ } } - // If this node has a name associated with it, capture it in VariableMap. If + // If this node has a name associated with it, capture it in VariableMap. If // we already saw this in the pattern, emit code to verify dagness. if (!N->getName().empty()) { std::string &VarMapEntry = VariableMap[N->getName()]; @@ -1998,7 +2000,7 @@ CInfo.getNumResults())); } } else { - // If this child has a name associated with it, capture it in VarMap. If + // If this child has a name associated with it, capture it in VarMap. If // we already saw this in the pattern, emit code to verify dagness. if (!Child->getName().empty()) { std::string &VarMapEntry = VariableMap[Child->getName()]; @@ -2030,7 +2032,8 @@ // Place holder for SRCVALUE nodes. Nothing to do here. } else if (LeafRec->isSubClassOf("ValueType")) { // Make sure this is the specified value type. - OS << " if (cast(" << RootName << OpNo << ")->getVT() != " + OS << " if (cast(" << RootName << OpNo + << ")->getVT() != " << "MVT::" << LeafRec->getName() << ") goto P" << PatternNo << "Fail;\n"; GotosFail = true; @@ -2045,7 +2048,8 @@ std::cerr << " "; assert(0 && "Unknown leaf type!"); } - } else if (IntInit *II = dynamic_cast(Child->getLeafValue())) { + } else if (IntInit *II = + dynamic_cast(Child->getLeafValue())) { OS << " if (!isa(" << RootName << OpNo << ") ||\n" << " cast(" << RootName << OpNo @@ -2429,8 +2433,8 @@ } } - /// InsertOneTypeCheck - Insert a type-check for an unresolved type in 'Pat' and - /// add it to the tree. 'Pat' and 'Other' are isomorphic trees except that + /// InsertOneTypeCheck - Insert a type-check for an unresolved type in 'Pat' + /// and add it to the tree. 'Pat' and 'Other' are isomorphic trees except that /// 'Pat' may be missing types. If we find an unresolved type to add a check /// for, this returns true otherwise false if Pat has all types. bool InsertOneTypeCheck(TreePatternNode *Pat, TreePatternNode *Other, @@ -2602,7 +2606,8 @@ try { bool MadeChange = true; while (MadeChange) - MadeChange = Pat->ApplyTypeConstraints(TP,true/*Ignore reg constraints*/); + MadeChange = Pat->ApplyTypeConstraints(TP, + true/*Ignore reg constraints*/); } catch (...) { assert(0 && "Error: could not find consistent types for something we" " already decided was ok!"); @@ -2659,14 +2664,15 @@ } else if ((CP = NodeGetComplexPattern(Node, *this))) { std::vector OpNodes = CP->getRootNodes(); for (unsigned j = 0, e = OpNodes.size(); j != e; j++) { - PatternsByOpcode[OpNodes[j]].insert(PatternsByOpcode[OpNodes[j]].begin(), - &PatternsToMatch[i]); + PatternsByOpcode[OpNodes[j]] + .insert(PatternsByOpcode[OpNodes[j]].begin(), &PatternsToMatch[i]); } } else { std::cerr << "Unrecognized opcode '"; Node->dump(); std::cerr << "' on tree pattern '"; - std::cerr << PatternsToMatch[i].getDstPattern()->getOperator()->getName(); + std::cerr << + PatternsToMatch[i].getDstPattern()->getOperator()->getName(); std::cerr << "'!\n"; exit(1); } From reid at x10sys.com Sat Jan 28 13:45:00 2006 From: reid at x10sys.com (Reid Spencer) Date: Sat, 28 Jan 2006 13:45:00 -0600 Subject: [llvm-commits] CVS: llvm/utils/NightlyTestTemplate.html Message-ID: <200601281945.NAA24027@zion.cs.uiuc.edu> Changes in directory llvm/utils: NightlyTestTemplate.html updated: 1.42 -> 1.43 --- Log message: Make long warnings wrap and have less indent so other portions of the page are not skewed out of view. --- Diffs of the changes: (+1 -2) NightlyTestTemplate.html | 3 +-- 1 files changed, 1 insertion(+), 2 deletions(-) Index: llvm/utils/NightlyTestTemplate.html diff -u llvm/utils/NightlyTestTemplate.html:1.42 llvm/utils/NightlyTestTemplate.html:1.43 --- llvm/utils/NightlyTestTemplate.html:1.42 Fri Oct 28 11:35:18 2005 +++ llvm/utils/NightlyTestTemplate.html Sat Jan 28 13:44:48 2006 @@ -77,8 +77,7 @@

      Warnings during the build:

      -
        $WarningsList -

      +

      $WarningsList



    • From jeffc at jolt-lang.org Sat Jan 28 13:48:46 2006 From: jeffc at jolt-lang.org (Jeff Cohen) Date: Sat, 28 Jan 2006 13:48:46 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86Subtarget.cpp Message-ID: <200601281948.NAA24092@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: X86Subtarget.cpp updated: 1.19 -> 1.20 --- Log message: Correctly determine CPU vendor. --- Diffs of the changes: (+5 -11) X86Subtarget.cpp | 16 +++++----------- 1 files changed, 5 insertions(+), 11 deletions(-) Index: llvm/lib/Target/X86/X86Subtarget.cpp diff -u llvm/lib/Target/X86/X86Subtarget.cpp:1.19 llvm/lib/Target/X86/X86Subtarget.cpp:1.20 --- llvm/lib/Target/X86/X86Subtarget.cpp:1.19 Sat Jan 28 12:47:32 2006 +++ llvm/lib/Target/X86/X86Subtarget.cpp Sat Jan 28 13:48:34 2006 @@ -68,18 +68,12 @@ bool Em64T = EDX & (1 << 29); union { - unsigned u[12]; - char c[48]; + unsigned u[3]; + char c[12]; } text; - GetCpuIDAndInfo(0x80000002, text.u+0, text.u+1, text.u+2, text.u+3); - GetCpuIDAndInfo(0x80000003, text.u+4, text.u+5, text.u+6, text.u+7); - GetCpuIDAndInfo(0x80000004, text.u+8, text.u+9, text.u+10, text.u+11); - char *t = text.c; - while (*t == ' ') - t++; - - if (memcmp(t, "Intel", 5) == 0) { + GetCpuIDAndInfo(0, &EAX, text.u+0, text.u+2, text.u+1); + if (memcmp(text.c, "GenuineIntel", 12) == 0) { switch (Family) { case 3: return "i386"; @@ -118,7 +112,7 @@ default: return "generic"; } - } else if (memcmp(t, "AMD", 3) == 0) { + } else if (memcmp(text.c, "AuthenticAMD", 12) == 0) { // FIXME: fill in remaining family/model combinations switch (Family) { case 15: From jeffc at jolt-lang.org Sat Jan 28 14:30:29 2006 From: jeffc at jolt-lang.org (Jeff Cohen) Date: Sat, 28 Jan 2006 14:30:29 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86Subtarget.cpp Message-ID: <200601282030.OAA24901@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: X86Subtarget.cpp updated: 1.20 -> 1.21 --- Log message: Flesh out AMD family/models. --- Diffs of the changes: (+27 -2) X86Subtarget.cpp | 29 +++++++++++++++++++++++++++-- 1 files changed, 27 insertions(+), 2 deletions(-) Index: llvm/lib/Target/X86/X86Subtarget.cpp diff -u llvm/lib/Target/X86/X86Subtarget.cpp:1.20 llvm/lib/Target/X86/X86Subtarget.cpp:1.21 --- llvm/lib/Target/X86/X86Subtarget.cpp:1.20 Sat Jan 28 13:48:34 2006 +++ llvm/lib/Target/X86/X86Subtarget.cpp Sat Jan 28 14:30:18 2006 @@ -113,10 +113,35 @@ return "generic"; } } else if (memcmp(text.c, "AuthenticAMD", 12) == 0) { - // FIXME: fill in remaining family/model combinations + // FIXME: this poorly matches the generated SubtargetFeatureKV table. There + // appears to be no way to generate the wide variety of AMD-specific targets + // from the information returned from CPUID. switch (Family) { + case 4: + return "i486"; + case 5: + switch (Model) { + case 6: + case 7: return "k6"; + case 8: return "k6-2"; + case 9: + case 13: return "k6-3"; + default: return "pentium"; + } + case 6: + switch (Model) { + case 4: return "athlon-tbird"; + case 6: + case 7: + case 8: return "athlon-mp"; + case 10: return "athlon-xp"; + default: return "athlon"; + } case 15: - return (Em64T) ? "athlon64" : "athlon"; + switch (Model) { + case 5: return "athlon-fx"; // also opteron + default: return "athlon64"; + } default: return "generic"; From lattner at cs.uiuc.edu Sat Jan 28 14:31:36 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Sat, 28 Jan 2006 14:31:36 -0600 Subject: [llvm-commits] CVS: llvm/utils/TableGen/DAGISelEmitter.cpp Message-ID: <200601282031.OAA24911@zion.cs.uiuc.edu> Changes in directory llvm/utils/TableGen: DAGISelEmitter.cpp updated: 1.148 -> 1.149 --- Log message: Change PatternCodeEmitter to emit code into a buffer instead of emitting it directly to the output file. This makes things simple because the code doesn't have to worry about indentation or the case when there is no goto. It also allows us to indent the code better without touching everything :) --- Diffs of the changes: (+248 -260) DAGISelEmitter.cpp | 508 +++++++++++++++++++++++++---------------------------- 1 files changed, 248 insertions(+), 260 deletions(-) Index: llvm/utils/TableGen/DAGISelEmitter.cpp diff -u llvm/utils/TableGen/DAGISelEmitter.cpp:1.148 llvm/utils/TableGen/DAGISelEmitter.cpp:1.149 --- llvm/utils/TableGen/DAGISelEmitter.cpp:1.148 Sat Jan 28 13:06:51 2006 +++ llvm/utils/TableGen/DAGISelEmitter.cpp Sat Jan 28 14:31:24 2006 @@ -1830,8 +1830,7 @@ // Matched instruction. TreePatternNode *Instruction; unsigned PatternNo; - bool GotosFail; - std::ostream &OS; + // Node to name mapping std::map VariableMap; // Node to operator mapping @@ -1839,16 +1838,30 @@ // Names of all the folded nodes which produce chains. std::vector > FoldedChains; std::set Duplicates; - unsigned TmpNo; + /// GeneratedCode - This is the buffer that we emit code to. The first bool + /// indicates whether this is an exit predicate (something that should be + /// tested, and if true, the match fails) [when true] or normal code to emit + /// [when false]. + std::vector > &GeneratedCode; + + unsigned TmpNo; + + void emitCheck(const std::string &S) { + if (!S.empty()) + GeneratedCode.push_back(std::make_pair(true, S)); + } + void emitCode(const std::string &S) { + if (!S.empty()) + GeneratedCode.push_back(std::make_pair(false, S)); + } public: PatternCodeEmitter(DAGISelEmitter &ise, ListInit *preds, TreePatternNode *pattern, TreePatternNode *instr, - unsigned PatNum, std::ostream &os) : - ISE(ise), Predicates(preds), Pattern(pattern), Instruction(instr), - PatternNo(PatNum), GotosFail(false), OS(os), TmpNo(0) {} - - bool UsesFailLabel() { return GotosFail; } + unsigned PatNum, + std::vector > &gc) + : ISE(ise), Predicates(preds), Pattern(pattern), Instruction(instr), + PatternNo(PatNum), GeneratedCode(gc), TmpNo(0) {} /// EmitMatchCode - Emit a matcher for N, going to the label for PatternNo /// if the match fails. At this point, we already know that the opcode for N @@ -1858,33 +1871,27 @@ // Emit instruction predicates. Each predicate is just a string for now. if (isRoot) { + std::string PredicateCheck; for (unsigned i = 0, e = Predicates->getSize(); i != e; ++i) { if (DefInit *Pred = dynamic_cast(Predicates->getElement(i))) { Record *Def = Pred->getDef(); - if (Def->isSubClassOf("Predicate")) { - if (i == 0) - OS << " if ("; - else - OS << " && "; - OS << "!(" << Def->getValueAsString("CondString") << ")"; - if (i == e-1) { - OS << ") goto P" << PatternNo << "Fail;\n"; - GotosFail = true; - } - } else { + if (!Def->isSubClassOf("Predicate")) { Def->dump(); assert(0 && "Unknown predicate type!"); } + if (!PredicateCheck.empty()) + PredicateCheck += " && "; + PredicateCheck += "!(" + Def->getValueAsString("CondString") + ")"; } } + + emitCheck(PredicateCheck); } if (N->isLeaf()) { if (IntInit *II = dynamic_cast(N->getLeafValue())) { - OS << " if (cast(" << RootName - << ")->getSignExtended() != " << II->getValue() << ")\n" - << " goto P" << PatternNo << "Fail;\n"; - GotosFail = true; + emitCheck("cast(" + RootName + + ")->getSignExtended() != " + itostr(II->getValue())); return; } else if (!NodeIsComplexPattern(N)) { assert(0 && "Cannot match this as a leaf value!"); @@ -1903,9 +1910,7 @@ // we already have checked that the first reference is valid, we don't // have to recursively match it, just check that it's the same as the // previously named thing. - OS << " if (" << VarMapEntry << " != " << RootName - << ") goto P" << PatternNo << "Fail;\n"; - GotosFail = true; + emitCheck(VarMapEntry + " != " + RootName); return; } @@ -1925,35 +1930,27 @@ OpNo = 1; if (!isRoot) { const SDNodeInfo &CInfo = ISE.getSDNodeInfo(N->getOperator()); - OS << " if (!" << RootName << ".hasOneUse()) goto P" - << PatternNo << "Fail; // Multiple uses of actual result?\n"; - GotosFail = true; + // Multiple uses of actual result? + emitCheck("!" + RootName + ".hasOneUse()"); EmittedUseCheck = true; // hasOneUse() check is not strong enough. If the original node has // already been selected, it may have been replaced with another. - for (unsigned j = 0; j < CInfo.getNumResults(); j++) { - OS << " if (CodeGenMap.count(" << RootName - << ".getValue(" << j << "))) goto P" - << PatternNo << "Fail; // Already selected?\n"; - GotosFail = true; - } + for (unsigned j = 0; j != CInfo.getNumResults(); j++) + emitCheck("CodeGenMap.count(" + RootName + ".getValue(" + utostr(j) + + "))"); + EmittedSlctedCheck = true; - if (NodeHasChain) { - OS << " if (CodeGenMap.count(" << RootName - << ".getValue(" << CInfo.getNumResults() << "))) goto P" - << PatternNo << "Fail; // Already selected for a chain use?\n"; - GotosFail = true; - } + if (NodeHasChain) + emitCheck("CodeGenMap.count(" + RootName + ".getValue(" + + utostr(CInfo.getNumResults()) + "))"); } if (NodeHasChain) { if (!FoundChain) { - OS << " SDOperand Chain = " << RootName << ".getOperand(0);\n"; + emitCode("SDOperand Chain = " + RootName + ".getOperand(0);"); FoundChain = true; } else { - OS << " if (Chain.Val == " << RootName << ".Val)\n"; - OS << " Chain = " << RootName << ".getOperand(0);\n"; - OS << " else\n"; - OS << " goto P" << PatternNo << "Fail;\n"; + emitCheck("Chain.Val != " + RootName + ".Val"); + emitCode("Chain = " + RootName + ".getOperand(0);"); } } } @@ -1968,37 +1965,31 @@ PatternHasProperty(N, SDNodeInfo::SDNPOutFlag, ISE))) { const SDNodeInfo &CInfo = ISE.getSDNodeInfo(N->getOperator()); if (!EmittedUseCheck) { - OS << " if (!" << RootName << ".hasOneUse()) goto P" - << PatternNo << "Fail; // Multiple uses of actual result?\n"; - GotosFail = true; + // Multiple uses of actual result? + emitCheck("!" + RootName + ".hasOneUse()"); } if (!EmittedSlctedCheck) // hasOneUse() check is not strong enough. If the original node has // already been selected, it may have been replaced with another. - for (unsigned j = 0; j < CInfo.getNumResults(); j++) { - OS << " if (CodeGenMap.count(" << RootName - << ".getValue(" << j << "))) goto P" - << PatternNo << "Fail; // Already selected?\n"; - GotosFail = true; - } + for (unsigned j = 0; j < CInfo.getNumResults(); j++) + emitCheck("CodeGenMap.count(" + RootName + ".getValue(" + utostr(j) + + "))"); } for (unsigned i = 0, e = N->getNumChildren(); i != e; ++i, ++OpNo) { - OS << " SDOperand " << RootName << OpNo << " = " - << RootName << ".getOperand(" << OpNo << ");\n"; + emitCode("SDOperand " + RootName + utostr(OpNo) + " = " + + RootName + ".getOperand(" +utostr(OpNo) + ");"); TreePatternNode *Child = N->getChild(i); if (!Child->isLeaf()) { // If it's not a leaf, recursively match. const SDNodeInfo &CInfo = ISE.getSDNodeInfo(Child->getOperator()); - OS << " if (" << RootName << OpNo << ".getOpcode() != " - << CInfo.getEnumName() << ") goto P" << PatternNo << "Fail;\n"; - GotosFail = true; + emitCheck(RootName + utostr(OpNo) + ".getOpcode() != " + + CInfo.getEnumName()); EmitMatchCode(Child, RootName + utostr(OpNo), FoundChain); - if (NodeHasProperty(Child, SDNodeInfo::SDNPHasChain, ISE)) { + if (NodeHasProperty(Child, SDNodeInfo::SDNPHasChain, ISE)) FoldedChains.push_back(std::make_pair(RootName + utostr(OpNo), CInfo.getNumResults())); - } } else { // If this child has a name associated with it, capture it in VarMap. If // we already saw this in the pattern, emit code to verify dagness. @@ -2011,9 +2002,7 @@ // Since we already have checked that the first reference is valid, // we don't have to recursively match it, just check that it's the // same as the previously named thing. - OS << " if (" << VarMapEntry << " != " << RootName << OpNo - << ") goto P" << PatternNo << "Fail;\n"; - GotosFail = true; + emitCheck(VarMapEntry + " != " + RootName + utostr(OpNo)); Duplicates.insert(RootName + utostr(OpNo)); continue; } @@ -2032,17 +2021,12 @@ // Place holder for SRCVALUE nodes. Nothing to do here. } else if (LeafRec->isSubClassOf("ValueType")) { // Make sure this is the specified value type. - OS << " if (cast(" << RootName << OpNo - << ")->getVT() != " - << "MVT::" << LeafRec->getName() << ") goto P" << PatternNo - << "Fail;\n"; - GotosFail = true; + emitCheck("cast(" + RootName + utostr(OpNo) + + ")->getVT() != MVT::" + LeafRec->getName()); } else if (LeafRec->isSubClassOf("CondCode")) { // Make sure this is the specified cond code. - OS << " if (cast(" << RootName << OpNo - << ")->get() != " << "ISD::" << LeafRec->getName() - << ") goto P" << PatternNo << "Fail;\n"; - GotosFail = true; + emitCheck("cast(" + RootName + utostr(OpNo) + + ")->get() != ISD::" + LeafRec->getName()); } else { Child->dump(); std::cerr << " "; @@ -2050,12 +2034,9 @@ } } else if (IntInit *II = dynamic_cast(Child->getLeafValue())) { - OS << " if (!isa(" << RootName << OpNo - << ") ||\n" - << " cast(" << RootName << OpNo - << ")->getSignExtended() != " << II->getValue() << ")\n" - << " goto P" << PatternNo << "Fail;\n"; - GotosFail = true; + emitCheck("!isa(" + RootName + utostr(OpNo) + + ") || cast(" + RootName + utostr(OpNo) + + ")->getSignExtended() != " + itostr(II->getValue())); } else { Child->dump(); assert(0 && "Unknown leaf type!"); @@ -2064,11 +2045,8 @@ } // If there is a node predicate for this, emit the call. - if (!N->getPredicateFn().empty()) { - OS << " if (!" << N->getPredicateFn() << "(" << RootName - << ".Val)) goto P" << PatternNo << "Fail;\n"; - GotosFail = true; - } + if (!N->getPredicateFn().empty()) + emitCheck("!" + N->getPredicateFn() + "(" + RootName + ".Val)"); } /// EmitResultCode - Emit the action for a pattern. Now that it has matched @@ -2091,59 +2069,61 @@ unsigned NumRes = 1; if (!N->isLeaf() && N->getOperator()->getName() == "imm") { assert(N->getExtTypes().size() == 1 && "Multiple types not handled!"); + const char *Code; switch (N->getTypeNum(0)) { - default: assert(0 && "Unknown type for constant node!"); - case MVT::i1: OS << " bool Tmp"; break; - case MVT::i8: OS << " unsigned char Tmp"; break; - case MVT::i16: OS << " unsigned short Tmp"; break; - case MVT::i32: OS << " unsigned Tmp"; break; - case MVT::i64: OS << " uint64_t Tmp"; break; - } - OS << ResNo << "C = (unsigned)cast(" << Val - << ")->getValue();\n"; - OS << " SDOperand Tmp" << utostr(ResNo) - << " = CurDAG->getTargetConstant(Tmp" - << ResNo << "C, MVT::" << getEnumName(N->getTypeNum(0)) << ");\n"; + default: assert(0 && "Unknown type for constant node!"); + case MVT::i1: Code = "bool Tmp"; break; + case MVT::i8: Code = "unsigned char Tmp"; break; + case MVT::i16: Code = "unsigned short Tmp"; break; + case MVT::i32: Code = "unsigned Tmp"; break; + case MVT::i64: Code = "uint64_t Tmp"; break; + } + emitCode(Code + utostr(ResNo) + "C = (unsigned)cast(" + + Val + ")->getValue();"); + emitCode("SDOperand Tmp" + utostr(ResNo) + + " = CurDAG->getTargetConstant(Tmp" + utostr(ResNo) + + "C, MVT::" + getEnumName(N->getTypeNum(0)) + ");"); } else if (!N->isLeaf() && N->getOperator()->getName() == "texternalsym"){ Record *Op = OperatorMap[N->getName()]; // Transform ExternalSymbol to TargetExternalSymbol if (Op && Op->getName() == "externalsym") { - OS << " SDOperand Tmp" << ResNo - << " = CurDAG->getTargetExternalSymbol(cast(" - << Val << ")->getSymbol(), MVT::" << getEnumName(N->getTypeNum(0)) - << ");\n"; - } else - OS << " SDOperand Tmp" << ResNo << " = " << Val << ";\n"; + emitCode("SDOperand Tmp" + utostr(ResNo) + " = CurDAG->getTarget" + "ExternalSymbol(cast(" + + Val + ")->getSymbol(), MVT::" + + getEnumName(N->getTypeNum(0)) + ");"); + } else { + emitCode("SDOperand Tmp" + utostr(ResNo) + " = " + Val + ";"); + } } else if (!N->isLeaf() && N->getOperator()->getName() == "tglobaladdr") { Record *Op = OperatorMap[N->getName()]; // Transform GlobalAddress to TargetGlobalAddress if (Op && Op->getName() == "globaladdr") { - OS << " SDOperand Tmp" << ResNo - << " = CurDAG->getTargetGlobalAddress(cast(" - << Val << ")->getGlobal(), MVT::" << getEnumName(N->getTypeNum(0)) - << ");\n"; - } else - OS << " SDOperand Tmp" << ResNo << " = " << Val << ";\n"; + emitCode("SDOperand Tmp" + utostr(ResNo) + " = CurDAG->getTarget" + "GlobalAddress(cast(" + Val + + ")->getGlobal(), MVT::" + getEnumName(N->getTypeNum(0)) + + ");"); + } else { + emitCode("SDOperand Tmp" + utostr(ResNo) + " = " + Val + ";"); + } } else if (!N->isLeaf() && N->getOperator()->getName() == "texternalsym"){ - OS << " SDOperand Tmp" << ResNo << " = " << Val << ";\n"; + emitCode("SDOperand Tmp" + utostr(ResNo) + " = " + Val + ";"); } else if (!N->isLeaf() && N->getOperator()->getName() == "tconstpool") { - OS << " SDOperand Tmp" << ResNo << " = " << Val << ";\n"; + emitCode("SDOperand Tmp" + utostr(ResNo) + " = " + Val + ";"); } else if (N->isLeaf() && (CP = NodeGetComplexPattern(N, ISE))) { std::string Fn = CP->getSelectFunc(); NumRes = CP->getNumOperands(); - OS << " SDOperand "; + std::string Code = "SDOperand "; for (unsigned i = 0; i < NumRes - 1; ++i) - OS << "Tmp" << (i+ResNo) << ","; - OS << "Tmp" << (NumRes - 1 + ResNo) << ";\n"; - - OS << " if (!" << Fn << "(" << Val; + Code += "Tmp" + utostr(i+ResNo) + ", "; + emitCode(Code + "Tmp" + utostr(NumRes - 1 + ResNo) + ";"); + + Code = "!" + Fn + "(" + Val; for (unsigned i = 0; i < NumRes; i++) - OS << ", Tmp" << i + ResNo; - OS << ")) goto P" << PatternNo << "Fail;\n"; - GotosFail = true; + Code += ", Tmp" + utostr(i + ResNo); + emitCheck(Code + ")"); TmpNo = ResNo + NumRes; } else { - OS << " SDOperand Tmp" << ResNo << " = Select(" << Val << ");\n"; + emitCode("SDOperand Tmp" + utostr(ResNo) + " = Select(" + Val + ");"); } // Add Tmp to VariableMap, so that we don't multiply select this // value if used multiple times by this pattern result. @@ -2156,19 +2136,17 @@ if (DefInit *DI = dynamic_cast(N->getLeafValue())) { unsigned ResNo = TmpNo++; if (DI->getDef()->isSubClassOf("Register")) { - OS << " SDOperand Tmp" << ResNo << " = CurDAG->getRegister(" - << ISE.getQualifiedName(DI->getDef()) << ", MVT::" - << getEnumName(N->getTypeNum(0)) - << ");\n"; + emitCode("SDOperand Tmp" + utostr(ResNo) + " = CurDAG->getRegister(" + + ISE.getQualifiedName(DI->getDef()) + ", MVT::" + + getEnumName(N->getTypeNum(0)) + ");"); return std::make_pair(1, ResNo); } } else if (IntInit *II = dynamic_cast(N->getLeafValue())) { unsigned ResNo = TmpNo++; assert(N->getExtTypes().size() == 1 && "Multiple types not handled!"); - OS << " SDOperand Tmp" << ResNo << " = CurDAG->getTargetConstant(" - << II->getValue() << ", MVT::" - << getEnumName(N->getTypeNum(0)) - << ");\n"; + emitCode("SDOperand Tmp" + utostr(ResNo) + + " = CurDAG->getTargetConstant(" + itostr(II->getValue()) + + ", MVT::" + getEnumName(N->getTypeNum(0)) + ");"); return std::make_pair(1, ResNo); } @@ -2196,9 +2174,9 @@ (isRoot && PatternHasProperty(Pattern, SDNodeInfo::SDNPHasChain, ISE)); if (HasInFlag || NodeHasOutFlag || HasOptInFlag || HasImpInputs) - OS << " SDOperand InFlag = SDOperand(0, 0);\n"; + emitCode("SDOperand InFlag = SDOperand(0, 0);"); if (HasOptInFlag) - OS << " bool HasOptInFlag = false;\n"; + emitCode("bool HasOptInFlag = false;"); // How many results is this pattern expected to produce? unsigned NumExpectedResults = 0; @@ -2242,176 +2220,172 @@ // Emit all the chain and CopyToReg stuff. bool ChainEmitted = HasChain; if (HasChain) - OS << " Chain = Select(Chain);\n"; + emitCode("Chain = Select(Chain);"); if (HasInFlag || HasOptInFlag || HasImpInputs) EmitInFlagSelectCode(Pattern, "N", ChainEmitted, true); unsigned NumResults = Inst.getNumResults(); unsigned ResNo = TmpNo++; if (!isRoot) { - OS << " SDOperand Tmp" << ResNo << " = CurDAG->getTargetNode(" - << II.Namespace << "::" << II.TheDef->getName(); + std::string Code = + "SDOperand Tmp" + utostr(ResNo) + " = CurDAG->getTargetNode(" + + II.Namespace + "::" + II.TheDef->getName(); if (N->getTypeNum(0) != MVT::isVoid) - OS << ", MVT::" << getEnumName(N->getTypeNum(0)); + Code += ", MVT::" + getEnumName(N->getTypeNum(0)); if (NodeHasOutFlag) - OS << ", MVT::Flag"; + Code += ", MVT::Flag"; unsigned LastOp = 0; for (unsigned i = 0, e = Ops.size(); i != e; ++i) { LastOp = Ops[i]; - OS << ", Tmp" << LastOp; + Code += ", Tmp" + utostr(LastOp); } - OS << ");\n"; + emitCode(Code + ");"); if (HasChain) { // Must have at least one result - OS << " Chain = Tmp" << LastOp << ".getValue(" - << NumResults << ");\n"; + emitCode("Chain = Tmp" + utostr(LastOp) + ".getValue(" + + utostr(NumResults) + ");"); } } else if (HasChain || NodeHasOutFlag) { if (HasOptInFlag) { - OS << " SDOperand Result = SDOperand(0, 0);\n"; + emitCode("SDOperand Result = SDOperand(0, 0);"); unsigned FlagNo = (unsigned) NodeHasChain + Pattern->getNumChildren(); - OS << " if (HasOptInFlag)\n"; - OS << " Result = CurDAG->getTargetNode(" - << II.Namespace << "::" << II.TheDef->getName(); + emitCode("if (HasOptInFlag)"); + std::string Code = " Result = CurDAG->getTargetNode(" + + II.Namespace + "::" + II.TheDef->getName(); // Output order: results, chain, flags // Result types. if (NumResults > 0) { if (N->getTypeNum(0) != MVT::isVoid) - OS << ", MVT::" << getEnumName(N->getTypeNum(0)); + Code += ", MVT::" + getEnumName(N->getTypeNum(0)); } if (HasChain) - OS << ", MVT::Other"; + Code += ", MVT::Other"; if (NodeHasOutFlag) - OS << ", MVT::Flag"; + Code += ", MVT::Flag"; // Inputs. for (unsigned i = 0, e = Ops.size(); i != e; ++i) - OS << ", Tmp" << Ops[i]; - if (HasChain) OS << ", Chain"; - OS << ", InFlag);\n"; - - OS << " else\n"; - OS << " Result = CurDAG->getTargetNode(" - << II.Namespace << "::" << II.TheDef->getName(); + Code += ", Tmp" + utostr(Ops[i]); + if (HasChain) Code += ", Chain"; + emitCode(Code + ", InFlag);"); + + emitCode("else"); + Code = " Result = CurDAG->getTargetNode(" + II.Namespace + "::" + + II.TheDef->getName(); // Output order: results, chain, flags // Result types. - if (NumResults > 0) { - if (N->getTypeNum(0) != MVT::isVoid) - OS << ", MVT::" << getEnumName(N->getTypeNum(0)); - } + if (NumResults > 0 && N->getTypeNum(0) != MVT::isVoid) + Code += ", MVT::" + getEnumName(N->getTypeNum(0)); if (HasChain) - OS << ", MVT::Other"; + Code += ", MVT::Other"; if (NodeHasOutFlag) - OS << ", MVT::Flag"; + Code += ", MVT::Flag"; // Inputs. for (unsigned i = 0, e = Ops.size(); i != e; ++i) - OS << ", Tmp" << Ops[i]; - if (HasChain) OS << ", Chain);\n"; + Code += ", Tmp" + utostr(Ops[i]); + if (HasChain) Code += ", Chain);"; + emitCode(Code); } else { - OS << " SDOperand Result = CurDAG->getTargetNode(" - << II.Namespace << "::" << II.TheDef->getName(); + std::string Code = "SDOperand Result = CurDAG->getTargetNode(" + + II.Namespace + "::" + II.TheDef->getName(); // Output order: results, chain, flags // Result types. - if (NumResults > 0) { - if (N->getTypeNum(0) != MVT::isVoid) - OS << ", MVT::" << getEnumName(N->getTypeNum(0)); - } + if (NumResults > 0 && N->getTypeNum(0) != MVT::isVoid) + Code += ", MVT::" + getEnumName(N->getTypeNum(0)); if (HasChain) - OS << ", MVT::Other"; + Code += ", MVT::Other"; if (NodeHasOutFlag) - OS << ", MVT::Flag"; + Code += ", MVT::Flag"; // Inputs. for (unsigned i = 0, e = Ops.size(); i != e; ++i) - OS << ", Tmp" << Ops[i]; - if (HasChain) OS << ", Chain"; - if (HasInFlag || HasImpInputs) OS << ", InFlag"; - OS << ");\n"; + Code += ", Tmp" + utostr(Ops[i]); + if (HasChain) Code += ", Chain"; + if (HasInFlag || HasImpInputs) Code += ", InFlag"; + emitCode(Code + ");"); } unsigned ValNo = 0; for (unsigned i = 0; i < NumResults; i++) { - OS << " CodeGenMap[N.getValue(" << ValNo << ")] = Result" - << ".getValue(" << ValNo << ");\n"; + emitCode("CodeGenMap[N.getValue(" + utostr(ValNo) + ")] = Result" + ".getValue(" + utostr(ValNo) + ");"); ValNo++; } if (HasChain) - OS << " Chain = Result.getValue(" << ValNo << ");\n"; + emitCode("Chain = Result.getValue(" + utostr(ValNo) + ");"); if (NodeHasOutFlag) - OS << " InFlag = Result.getValue(" - << ValNo + (unsigned)HasChain << ");\n"; + emitCode("InFlag = Result.getValue(" + + utostr(ValNo + (unsigned)HasChain) + ");"); - if (HasImpResults) { - if (EmitCopyFromRegs(N, ChainEmitted)) { - OS << " CodeGenMap[N.getValue(" << ValNo << ")] = " - << "Result.getValue(" << ValNo << ");\n"; - ValNo++; - } + if (HasImpResults && EmitCopyFromRegs(N, ChainEmitted)) { + emitCode("CodeGenMap[N.getValue(" + utostr(ValNo) + ")] = " + "Result.getValue(" + utostr(ValNo) + ");"); + ValNo++; } // User does not expect that the instruction produces a chain! bool AddedChain = HasChain && !NodeHasChain; if (NodeHasChain) - OS << " CodeGenMap[N.getValue(" << ValNo++ << ")] = Chain;\n"; + emitCode("CodeGenMap[N.getValue(" + utostr(ValNo++) + ")] = Chain;"); if (FoldedChains.size() > 0) { - OS << " "; + std::string Code; for (unsigned j = 0, e = FoldedChains.size(); j < e; j++) - OS << "CodeGenMap[" << FoldedChains[j].first << ".getValue(" - << FoldedChains[j].second << ")] = "; - OS << "Chain;\n"; + Code += "CodeGenMap[" + FoldedChains[j].first + ".getValue(" + + utostr(FoldedChains[j].second) + ")] = "; + emitCode(Code + "Chain;"); } if (NodeHasOutFlag) - OS << " CodeGenMap[N.getValue(" << ValNo << ")] = InFlag;\n"; + emitCode("CodeGenMap[N.getValue(" + utostr(ValNo) + ")] = InFlag;"); if (AddedChain && NodeHasOutFlag) { if (NumExpectedResults == 0) { - OS << " return Result.getValue(N.ResNo+1);\n"; + emitCode("return Result.getValue(N.ResNo+1);"); } else { - OS << " if (N.ResNo < " << NumExpectedResults << ")\n"; - OS << " return Result.getValue(N.ResNo);\n"; - OS << " else\n"; - OS << " return Result.getValue(N.ResNo+1);\n"; + emitCode("if (N.ResNo < " + utostr(NumExpectedResults) + ")"); + emitCode(" return Result.getValue(N.ResNo);"); + emitCode("else"); + emitCode(" return Result.getValue(N.ResNo+1);"); } } else { - OS << " return Result.getValue(N.ResNo);\n"; + emitCode("return Result.getValue(N.ResNo);"); } } else { // If this instruction is the root, and if there is only one use of it, // use SelectNodeTo instead of getTargetNode to avoid an allocation. - OS << " if (N.Val->hasOneUse()) {\n"; - OS << " return CurDAG->SelectNodeTo(N.Val, " - << II.Namespace << "::" << II.TheDef->getName(); + emitCode("if (N.Val->hasOneUse()) {"); + std::string Code = " return CurDAG->SelectNodeTo(N.Val, " + + II.Namespace + "::" + II.TheDef->getName(); if (N->getTypeNum(0) != MVT::isVoid) - OS << ", MVT::" << getEnumName(N->getTypeNum(0)); + Code += ", MVT::" + getEnumName(N->getTypeNum(0)); if (NodeHasOutFlag) - OS << ", MVT::Flag"; + Code += ", MVT::Flag"; for (unsigned i = 0, e = Ops.size(); i != e; ++i) - OS << ", Tmp" << Ops[i]; + Code += ", Tmp" + utostr(Ops[i]); if (HasInFlag || HasImpInputs) - OS << ", InFlag"; - OS << ");\n"; - OS << " } else {\n"; - OS << " return CodeGenMap[N] = CurDAG->getTargetNode(" - << II.Namespace << "::" << II.TheDef->getName(); + Code += ", InFlag"; + emitCode(Code + ");"); + emitCode("} else {"); + Code = " return CodeGenMap[N] = CurDAG->getTargetNode(" + + II.Namespace + "::" + II.TheDef->getName(); if (N->getTypeNum(0) != MVT::isVoid) - OS << ", MVT::" << getEnumName(N->getTypeNum(0)); + Code += ", MVT::" + getEnumName(N->getTypeNum(0)); if (NodeHasOutFlag) - OS << ", MVT::Flag"; + Code += ", MVT::Flag"; for (unsigned i = 0, e = Ops.size(); i != e; ++i) - OS << ", Tmp" << Ops[i]; + Code += ", Tmp" + utostr(Ops[i]); if (HasInFlag || HasImpInputs) - OS << ", InFlag"; - OS << ");\n"; - OS << " }\n"; + Code += ", InFlag"; + emitCode(Code + ");"); + emitCode("}"); } return std::make_pair(1, ResNo); @@ -2419,11 +2393,11 @@ assert(N->getNumChildren() == 1 && "node xform should have one child!"); unsigned OpVal = EmitResultCode(N->getChild(0)).second; unsigned ResNo = TmpNo++; - OS << " SDOperand Tmp" << ResNo << " = Transform_" << Op->getName() - << "(Tmp" << OpVal << ".Val);\n"; + emitCode("SDOperand Tmp" + utostr(ResNo) + " = Transform_" + Op->getName() + + "(Tmp" + utostr(OpVal) + ".Val);"); if (isRoot) { - OS << " CodeGenMap[N] = Tmp" << ResNo << ";\n"; - OS << " return Tmp" << ResNo << ";\n"; + emitCode("CodeGenMap[N] = Tmp" +utostr(ResNo) + ";"); + emitCode("return Tmp" + utostr(ResNo) + ";"); } return std::make_pair(1, ResNo); } else { @@ -2443,9 +2417,8 @@ if (!Pat->hasTypeSet()) { // Move a type over from 'other' to 'pat'. Pat->setTypes(Other->getExtTypes()); - OS << " if (" << Prefix << ".Val->getValueType(0) != MVT::" - << getName(Pat->getTypeNum(0)) << ") goto P" << PatternNo << "Fail;\n"; - GotosFail = true; + emitCheck(Prefix + ".Val->getValueType(0) != MVT::" + + getName(Pat->getTypeNum(0))); return true; } @@ -2485,22 +2458,21 @@ if (RR->isSubClassOf("Register")) { MVT::ValueType RVT = getRegisterValueType(RR, T); if (RVT == MVT::Flag) { - OS << " InFlag = Select(" << RootName << OpNo << ");\n"; + emitCode("InFlag = Select(" + RootName + utostr(OpNo) + ");"); } else { if (!ChainEmitted) { - OS << " SDOperand Chain = CurDAG->getEntryNode();\n"; + emitCode("SDOperand Chain = CurDAG->getEntryNode();"); ChainEmitted = true; } - OS << " SDOperand " << RootName << "CR" << i << ";\n"; - OS << " " << RootName << "CR" << i - << " = CurDAG->getCopyToReg(Chain, CurDAG->getRegister(" - << ISE.getQualifiedName(RR) << ", MVT::" - << getEnumName(RVT) << ")" - << ", Select(" << RootName << OpNo << "), InFlag);\n"; - OS << " Chain = " << RootName << "CR" << i - << ".getValue(0);\n"; - OS << " InFlag = " << RootName << "CR" << i - << ".getValue(1);\n"; + emitCode("SDOperand " + RootName + "CR" + utostr(i) + ";"); + emitCode(RootName + "CR" + utostr(i) + + " = CurDAG->getCopyToReg(Chain, CurDAG->getRegister(" + + ISE.getQualifiedName(RR) + ", MVT::" + getEnumName(RVT) + + "), Select(" + RootName + utostr(OpNo) + "), InFlag);"); + emitCode("Chain = " + RootName + "CR" + utostr(i) + + ".getValue(0);"); + emitCode("InFlag = " + RootName + "CR" + utostr(i) + + ".getValue(1);"); } } } @@ -2508,16 +2480,17 @@ } if (HasInFlag || HasOptInFlag) { + std::string Code; if (HasOptInFlag) { - OS << " if (" << RootName << ".getNumOperands() == " - << OpNo+1 << ") {\n"; - OS << " "; + emitCode("if (" + RootName + ".getNumOperands() == " + utostr(OpNo+1) + + ") {"); + Code = " "; } - OS << " InFlag = Select(" << RootName << ".getOperand(" - << OpNo << "));\n"; + emitCode(Code + "InFlag = Select(" + RootName + ".getOperand(" + + utostr(OpNo) + "));"); if (HasOptInFlag) { - OS << " HasOptInFlag = true;\n"; - OS << " }\n"; + emitCode(" HasOptInFlag = true;"); + emitCode("}"); } } } @@ -2539,14 +2512,14 @@ MVT::ValueType RVT = getRegisterValueType(RR, CGT); if (RVT != MVT::Flag) { if (!ChainEmitted) { - OS << " SDOperand Chain = CurDAG->getEntryNode();\n"; + emitCode("SDOperand Chain = CurDAG->getEntryNode();"); ChainEmitted = true; } - OS << " Result = CurDAG->getCopyFromReg(Chain, " - << ISE.getQualifiedName(RR) - << ", MVT::" << getEnumName(RVT) << ", InFlag);\n"; - OS << " Chain = Result.getValue(1);\n"; - OS << " InFlag = Result.getValue(2);\n"; + emitCode("Result = CurDAG->getCopyFromReg(Chain, " + + ISE.getQualifiedName(RR) + ", MVT::" + getEnumName(RVT) + + ", InFlag);"); + emitCode("Chain = Result.getValue(1);"); + emitCode("InFlag = Result.getValue(2);"); RetVal = true; } } @@ -2564,19 +2537,11 @@ std::ostream &OS) { static unsigned PatternCount = 0; unsigned PatternNo = PatternCount++; - OS << " { // Pattern #" << PatternNo << ": "; - Pattern.getSrcPattern()->print(OS); - OS << "\n // Emits: "; - Pattern.getDstPattern()->print(OS); - OS << "\n"; - OS << " // Pattern complexity = " - << getPatternSize(Pattern.getSrcPattern(), *this) - << " cost = " - << getResultPatternCost(Pattern.getDstPattern()) << "\n"; + std::vector > GeneratedCode; PatternCodeEmitter Emitter(*this, Pattern.getPredicates(), Pattern.getSrcPattern(), Pattern.getDstPattern(), - PatternNo, OS); + PatternNo, GeneratedCode); // Emit the matcher, capturing named arguments in VariableMap. bool FoundChain = false; @@ -2623,12 +2588,35 @@ delete Pat; - if (Emitter.UsesFailLabel()) - OS << " }\n P" << PatternNo << "Fail:\n"; - else - OS << " }\n"; + + OS << " { // Pattern #" << PatternNo << ": "; + Pattern.getSrcPattern()->print(OS); + OS << "\n // Emits: "; + Pattern.getDstPattern()->print(OS); + OS << "\n"; + OS << " // Pattern complexity = " + << getPatternSize(Pattern.getSrcPattern(), *this) + << " cost = " + << getResultPatternCost(Pattern.getDstPattern()) << "\n"; + + // Actually output the generated code now. + bool CanFail = false; + for (unsigned i = 0, e = GeneratedCode.size(); i != e; ++i) { + if (!GeneratedCode[i].first) { + // Normal code. + OS << " " << GeneratedCode[i].second << "\n"; + } else { + OS << " if (" << GeneratedCode[i].second << ") goto P" + << PatternNo << "Fail;\n"; + CanFail = true; + } + } + + OS << " }\n"; + if (CanFail) + OS << "P" << PatternNo << "Fail:\n"; - return Emitter.UsesFailLabel(); + return CanFail; } From lattner at cs.uiuc.edu Sat Jan 28 14:44:04 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Sat, 28 Jan 2006 14:44:04 -0600 Subject: [llvm-commits] CVS: llvm/utils/TableGen/DAGISelEmitter.cpp Message-ID: <200601282044.OAA25024@zion.cs.uiuc.edu> Changes in directory llvm/utils/TableGen: DAGISelEmitter.cpp updated: 1.149 -> 1.150 --- Log message: now that we have control over emission of the code, emit the code using nested "if" statements (indenting it appropriately, of course) instead of using goto's. This inverts the logic for all of the if statements, which makes things simpler to understand in addition to making the generated code easier to read. --- Diffs of the changes: (+27 -26) DAGISelEmitter.cpp | 53 +++++++++++++++++++++++++++-------------------------- 1 files changed, 27 insertions(+), 26 deletions(-) Index: llvm/utils/TableGen/DAGISelEmitter.cpp diff -u llvm/utils/TableGen/DAGISelEmitter.cpp:1.149 llvm/utils/TableGen/DAGISelEmitter.cpp:1.150 --- llvm/utils/TableGen/DAGISelEmitter.cpp:1.149 Sat Jan 28 14:31:24 2006 +++ llvm/utils/TableGen/DAGISelEmitter.cpp Sat Jan 28 14:43:52 2006 @@ -1880,8 +1880,8 @@ assert(0 && "Unknown predicate type!"); } if (!PredicateCheck.empty()) - PredicateCheck += " && "; - PredicateCheck += "!(" + Def->getValueAsString("CondString") + ")"; + PredicateCheck += " || "; + PredicateCheck += "(" + Def->getValueAsString("CondString") + ")"; } } @@ -1891,7 +1891,7 @@ if (N->isLeaf()) { if (IntInit *II = dynamic_cast(N->getLeafValue())) { emitCheck("cast(" + RootName + - ")->getSignExtended() != " + itostr(II->getValue())); + ")->getSignExtended() == " + itostr(II->getValue())); return; } else if (!NodeIsComplexPattern(N)) { assert(0 && "Cannot match this as a leaf value!"); @@ -1910,7 +1910,7 @@ // we already have checked that the first reference is valid, we don't // have to recursively match it, just check that it's the same as the // previously named thing. - emitCheck(VarMapEntry + " != " + RootName); + emitCheck(VarMapEntry + " == " + RootName); return; } @@ -1931,17 +1931,17 @@ if (!isRoot) { const SDNodeInfo &CInfo = ISE.getSDNodeInfo(N->getOperator()); // Multiple uses of actual result? - emitCheck("!" + RootName + ".hasOneUse()"); + emitCheck(RootName + ".hasOneUse()"); EmittedUseCheck = true; // hasOneUse() check is not strong enough. If the original node has // already been selected, it may have been replaced with another. for (unsigned j = 0; j != CInfo.getNumResults(); j++) - emitCheck("CodeGenMap.count(" + RootName + ".getValue(" + utostr(j) + + emitCheck("!CodeGenMap.count(" + RootName + ".getValue(" + utostr(j) + "))"); EmittedSlctedCheck = true; if (NodeHasChain) - emitCheck("CodeGenMap.count(" + RootName + ".getValue(" + + emitCheck("!CodeGenMap.count(" + RootName + ".getValue(" + utostr(CInfo.getNumResults()) + "))"); } if (NodeHasChain) { @@ -1949,7 +1949,7 @@ emitCode("SDOperand Chain = " + RootName + ".getOperand(0);"); FoundChain = true; } else { - emitCheck("Chain.Val != " + RootName + ".Val"); + emitCheck("Chain.Val == " + RootName + ".Val"); emitCode("Chain = " + RootName + ".getOperand(0);"); } } @@ -1966,13 +1966,13 @@ const SDNodeInfo &CInfo = ISE.getSDNodeInfo(N->getOperator()); if (!EmittedUseCheck) { // Multiple uses of actual result? - emitCheck("!" + RootName + ".hasOneUse()"); + emitCheck(RootName + ".hasOneUse()"); } if (!EmittedSlctedCheck) // hasOneUse() check is not strong enough. If the original node has // already been selected, it may have been replaced with another. for (unsigned j = 0; j < CInfo.getNumResults(); j++) - emitCheck("CodeGenMap.count(" + RootName + ".getValue(" + utostr(j) + + emitCheck("!CodeGenMap.count(" + RootName + ".getValue(" + utostr(j) + "))"); } @@ -1984,7 +1984,7 @@ if (!Child->isLeaf()) { // If it's not a leaf, recursively match. const SDNodeInfo &CInfo = ISE.getSDNodeInfo(Child->getOperator()); - emitCheck(RootName + utostr(OpNo) + ".getOpcode() != " + + emitCheck(RootName + utostr(OpNo) + ".getOpcode() == " + CInfo.getEnumName()); EmitMatchCode(Child, RootName + utostr(OpNo), FoundChain); if (NodeHasProperty(Child, SDNodeInfo::SDNPHasChain, ISE)) @@ -2002,7 +2002,7 @@ // Since we already have checked that the first reference is valid, // we don't have to recursively match it, just check that it's the // same as the previously named thing. - emitCheck(VarMapEntry + " != " + RootName + utostr(OpNo)); + emitCheck(VarMapEntry + " == " + RootName + utostr(OpNo)); Duplicates.insert(RootName + utostr(OpNo)); continue; } @@ -2022,11 +2022,11 @@ } else if (LeafRec->isSubClassOf("ValueType")) { // Make sure this is the specified value type. emitCheck("cast(" + RootName + utostr(OpNo) + - ")->getVT() != MVT::" + LeafRec->getName()); + ")->getVT() == MVT::" + LeafRec->getName()); } else if (LeafRec->isSubClassOf("CondCode")) { // Make sure this is the specified cond code. emitCheck("cast(" + RootName + utostr(OpNo) + - ")->get() != ISD::" + LeafRec->getName()); + ")->get() == ISD::" + LeafRec->getName()); } else { Child->dump(); std::cerr << " "; @@ -2034,9 +2034,9 @@ } } else if (IntInit *II = dynamic_cast(Child->getLeafValue())) { - emitCheck("!isa(" + RootName + utostr(OpNo) + - ") || cast(" + RootName + utostr(OpNo) + - ")->getSignExtended() != " + itostr(II->getValue())); + emitCheck("isa(" + RootName + utostr(OpNo) + + ") && cast(" + RootName + utostr(OpNo) + + ")->getSignExtended() == " + itostr(II->getValue())); } else { Child->dump(); assert(0 && "Unknown leaf type!"); @@ -2046,7 +2046,7 @@ // If there is a node predicate for this, emit the call. if (!N->getPredicateFn().empty()) - emitCheck("!" + N->getPredicateFn() + "(" + RootName + ".Val)"); + emitCheck(N->getPredicateFn() + "(" + RootName + ".Val)"); } /// EmitResultCode - Emit the action for a pattern. Now that it has matched @@ -2117,7 +2117,7 @@ Code += "Tmp" + utostr(i+ResNo) + ", "; emitCode(Code + "Tmp" + utostr(NumRes - 1 + ResNo) + ";"); - Code = "!" + Fn + "(" + Val; + Code = Fn + "(" + Val; for (unsigned i = 0; i < NumRes; i++) Code += ", Tmp" + utostr(i + ResNo); emitCheck(Code + ")"); @@ -2417,7 +2417,7 @@ if (!Pat->hasTypeSet()) { // Move a type over from 'other' to 'pat'. Pat->setTypes(Other->getExtTypes()); - emitCheck(Prefix + ".Val->getValueType(0) != MVT::" + + emitCheck(Prefix + ".Val->getValueType(0) == MVT::" + getName(Pat->getTypeNum(0))); return true; } @@ -2601,21 +2601,22 @@ // Actually output the generated code now. bool CanFail = false; + unsigned Indent = 4; for (unsigned i = 0, e = GeneratedCode.size(); i != e; ++i) { if (!GeneratedCode[i].first) { // Normal code. - OS << " " << GeneratedCode[i].second << "\n"; + OS << std::string(Indent, ' ') << GeneratedCode[i].second << "\n"; } else { - OS << " if (" << GeneratedCode[i].second << ") goto P" - << PatternNo << "Fail;\n"; CanFail = true; + OS << std::string(Indent, ' ') + << "if (" << GeneratedCode[i].second << ") {\n"; + Indent += 2; } } + for (; Indent != 4; Indent -= 2) + OS << std::string(Indent-2, ' ') << "}\n"; OS << " }\n"; - if (CanFail) - OS << "P" << PatternNo << "Fail:\n"; - return CanFail; } From lattner at cs.uiuc.edu Sat Jan 28 20:43:46 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Sat, 28 Jan 2006 20:43:46 -0600 Subject: [llvm-commits] CVS: llvm/utils/TableGen/DAGISelEmitter.cpp DAGISelEmitter.h Message-ID: <200601290243.UAA26668@zion.cs.uiuc.edu> Changes in directory llvm/utils/TableGen: DAGISelEmitter.cpp updated: 1.150 -> 1.151 DAGISelEmitter.h updated: 1.52 -> 1.53 --- Log message: move some code around, no change in the generated code --- Diffs of the changes: (+51 -52) DAGISelEmitter.cpp | 96 +++++++++++++++++++++++++---------------------------- DAGISelEmitter.h | 7 ++- 2 files changed, 51 insertions(+), 52 deletions(-) Index: llvm/utils/TableGen/DAGISelEmitter.cpp diff -u llvm/utils/TableGen/DAGISelEmitter.cpp:1.150 llvm/utils/TableGen/DAGISelEmitter.cpp:1.151 --- llvm/utils/TableGen/DAGISelEmitter.cpp:1.150 Sat Jan 28 14:43:52 2006 +++ llvm/utils/TableGen/DAGISelEmitter.cpp Sat Jan 28 20:43:35 2006 @@ -1829,7 +1829,6 @@ TreePatternNode *Pattern; // Matched instruction. TreePatternNode *Instruction; - unsigned PatternNo; // Node to name mapping std::map VariableMap; @@ -1858,10 +1857,9 @@ public: PatternCodeEmitter(DAGISelEmitter &ise, ListInit *preds, TreePatternNode *pattern, TreePatternNode *instr, - unsigned PatNum, std::vector > &gc) : ISE(ise), Predicates(preds), Pattern(pattern), Instruction(instr), - PatternNo(PatNum), GeneratedCode(gc), TmpNo(0) {} + GeneratedCode(gc), TmpNo(0) {} /// EmitMatchCode - Emit a matcher for N, going to the label for PatternNo /// if the match fails. At this point, we already know that the opcode for N @@ -2531,17 +2529,12 @@ /// EmitCodeForPattern - Given a pattern to match, emit code to the specified /// stream to match the pattern, and generate the code for the match if it -/// succeeds. Returns true if execution may jump to the fail label instead of -/// returning. -bool DAGISelEmitter::EmitCodeForPattern(PatternToMatch &Pattern, - std::ostream &OS) { - static unsigned PatternCount = 0; - unsigned PatternNo = PatternCount++; - - std::vector > GeneratedCode; +/// succeeds. Returns true if the pattern is not guaranteed to match. +void DAGISelEmitter::EmitCodeForPattern(PatternToMatch &Pattern, + std::vector > &GeneratedCode) { PatternCodeEmitter Emitter(*this, Pattern.getPredicates(), Pattern.getSrcPattern(), Pattern.getDstPattern(), - PatternNo, GeneratedCode); + GeneratedCode); // Emit the matcher, capturing named arguments in VariableMap. bool FoundChain = false; @@ -2585,39 +2578,7 @@ } while (Emitter.InsertOneTypeCheck(Pat, Pattern.getSrcPattern(), "N")); Emitter.EmitResultCode(Pattern.getDstPattern(), true /*the root*/); - delete Pat; - - - OS << " { // Pattern #" << PatternNo << ": "; - Pattern.getSrcPattern()->print(OS); - OS << "\n // Emits: "; - Pattern.getDstPattern()->print(OS); - OS << "\n"; - OS << " // Pattern complexity = " - << getPatternSize(Pattern.getSrcPattern(), *this) - << " cost = " - << getResultPatternCost(Pattern.getDstPattern()) << "\n"; - - // Actually output the generated code now. - bool CanFail = false; - unsigned Indent = 4; - for (unsigned i = 0, e = GeneratedCode.size(); i != e; ++i) { - if (!GeneratedCode[i].first) { - // Normal code. - OS << std::string(Indent, ' ') << GeneratedCode[i].second << "\n"; - } else { - CanFail = true; - OS << std::string(Indent, ' ') - << "if (" << GeneratedCode[i].second << ") {\n"; - Indent += 2; - } - } - for (; Indent != 4; Indent -= 2) - OS << std::string(Indent-2, ' ') << "}\n"; - - OS << " }\n"; - return CanFail; } @@ -2678,6 +2639,7 @@ const SDNodeInfo &OpcodeInfo = getSDNodeInfo(PBOI->first); std::vector &Patterns = PBOI->second; + assert(!Patterns.empty() && "No patterns but map has entry?"); // We want to emit all of the matching code now. However, we want to emit // the matches in order of minimal cost. Sort the patterns so the least @@ -2685,18 +2647,52 @@ std::stable_sort(Patterns.begin(), Patterns.end(), PatternSortingPredicate(*this)); - bool mightNotReturn = true; + bool mightNotMatch = true; for (unsigned i = 0, e = Patterns.size(); i != e; ++i) { - if (!mightNotReturn) { + PatternToMatch &Pattern = *Patterns[i]; + std::vector > GeneratedCode; + EmitCodeForPattern(Pattern, GeneratedCode); + + static unsigned PatternCount = 0; + unsigned PatternNo = PatternCount++; + + OS << " { // Pattern #" << PatternNo << ": "; + Pattern.getSrcPattern()->print(OS); + OS << "\n // Emits: "; + Pattern.getDstPattern()->print(OS); + OS << "\n"; + OS << " // Pattern complexity = " + << getPatternSize(Pattern.getSrcPattern(), *this) << " cost = " + << getResultPatternCost(Pattern.getDstPattern()) << "\n"; + + // Actually output the generated code now. + mightNotMatch = false; + unsigned Indent = 4; + for (unsigned j = 0, e = GeneratedCode.size(); j != e; ++j) { + if (!GeneratedCode[j].first) { + // Normal code. + OS << std::string(Indent, ' ') << GeneratedCode[j].second << "\n"; + } else { + mightNotMatch = true; + OS << std::string(Indent, ' ') + << "if (" << GeneratedCode[j].second << ") {\n"; + Indent += 2; + } + } + for (; Indent != 4; Indent -= 2) + OS << std::string(Indent-2, ' ') << "}\n"; + + OS << " }\n"; + + if (!mightNotMatch && i != Patterns.size()-1) { std::cerr << "Pattern " - << Patterns[i]->getDstPattern()->getOperator()->getName() - << " is impossible to select!\n"; + << Patterns[i+1]->getDstPattern()->getOperator()->getName() + << " is impossible to select!\n"; exit(1); } - mightNotReturn = EmitCodeForPattern(*Patterns[i], OS); } - if (mightNotReturn) + if (mightNotMatch) OS << " std::cerr << \"Cannot yet select: \";\n" << " N.Val->dump(CurDAG);\n" << " std::cerr << '\\n';\n" Index: llvm/utils/TableGen/DAGISelEmitter.h diff -u llvm/utils/TableGen/DAGISelEmitter.h:1.52 llvm/utils/TableGen/DAGISelEmitter.h:1.53 --- llvm/utils/TableGen/DAGISelEmitter.h:1.52 Fri Jan 27 16:22:28 2006 +++ llvm/utils/TableGen/DAGISelEmitter.h Sat Jan 28 20:43:35 2006 @@ -155,7 +155,9 @@ : Types(), Operator(Op), Val(0), TransformFn(0), Children(Ch) { Types.push_back(MVT::isUnknown); } TreePatternNode(Init *val) // leaf ctor - : Types(), Operator(0), Val(val), TransformFn(0) { Types.push_back(MVT::isUnknown); } + : Types(), Operator(0), Val(val), TransformFn(0) { + Types.push_back(MVT::isUnknown); + } ~TreePatternNode(); const std::string &getName() const { return Name; } @@ -468,7 +470,8 @@ std::map &InstResults, std::vector &InstImpInputs, std::vector &InstImpResults); - bool EmitCodeForPattern(PatternToMatch &Pattern, std::ostream &OS); + void EmitCodeForPattern(PatternToMatch &Pattern, + std::vector > &GeneratedCode); void EmitInstructionSelector(std::ostream &OS); }; From lattner at cs.uiuc.edu Sat Jan 28 20:57:50 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Sat, 28 Jan 2006 20:57:50 -0600 Subject: [llvm-commits] CVS: llvm/utils/TableGen/DAGISelEmitter.cpp Message-ID: <200601290257.UAA26763@zion.cs.uiuc.edu> Changes in directory llvm/utils/TableGen: DAGISelEmitter.cpp updated: 1.151 -> 1.152 --- Log message: Split out code generation from analysis from emission --- Diffs of the changes: (+36 -14) DAGISelEmitter.cpp | 50 ++++++++++++++++++++++++++++++++++++-------------- 1 files changed, 36 insertions(+), 14 deletions(-) Index: llvm/utils/TableGen/DAGISelEmitter.cpp diff -u llvm/utils/TableGen/DAGISelEmitter.cpp:1.151 llvm/utils/TableGen/DAGISelEmitter.cpp:1.152 --- llvm/utils/TableGen/DAGISelEmitter.cpp:1.151 Sat Jan 28 20:43:35 2006 +++ llvm/utils/TableGen/DAGISelEmitter.cpp Sat Jan 28 20:57:39 2006 @@ -2647,16 +2647,43 @@ std::stable_sort(Patterns.begin(), Patterns.end(), PatternSortingPredicate(*this)); - bool mightNotMatch = true; + typedef std::vector > CodeList; + + std::vector > CodeForPatterns; for (unsigned i = 0, e = Patterns.size(); i != e; ++i) { - PatternToMatch &Pattern = *Patterns[i]; - std::vector > GeneratedCode; - EmitCodeForPattern(Pattern, GeneratedCode); + CodeList GeneratedCode; + EmitCodeForPattern(*Patterns[i], GeneratedCode); + CodeForPatterns.push_back(std::make_pair(Patterns[i], GeneratedCode)); + } + + // Scan the code to see if all of the patterns are reachable and if it is + // possible that the last one might not match. + bool mightNotMatch = true; + for (unsigned i = 0, e = CodeForPatterns.size(); i != e; ++i) { + CodeList &GeneratedCode = CodeForPatterns[i].second; + mightNotMatch = false; - static unsigned PatternCount = 0; - unsigned PatternNo = PatternCount++; + for (unsigned j = 0, e = GeneratedCode.size(); j != e; ++j) { + if (GeneratedCode[j].first) { // predicate. + mightNotMatch = true; + break; + } + } + + // If this pattern definitely matches, and if it isn't the last one, the + // patterns after it CANNOT ever match. Error out. + if (mightNotMatch == false && i != CodeForPatterns.size()-1) { + std::cerr << "Pattern '"; + CodeForPatterns[i+1].first->getSrcPattern()->print(OS); + std::cerr << "' is impossible to select!\n"; + exit(1); + } + } - OS << " { // Pattern #" << PatternNo << ": "; + for (unsigned i = 0, e = CodeForPatterns.size(); i != e; ++i) { + CodeList &GeneratedCode = CodeForPatterns[i].second; + PatternToMatch &Pattern = *CodeForPatterns[i].first; + OS << " { // Pattern: "; Pattern.getSrcPattern()->print(OS); OS << "\n // Emits: "; Pattern.getDstPattern()->print(OS); @@ -2683,15 +2710,10 @@ OS << std::string(Indent-2, ' ') << "}\n"; OS << " }\n"; - - if (!mightNotMatch && i != Patterns.size()-1) { - std::cerr << "Pattern " - << Patterns[i+1]->getDstPattern()->getOperator()->getName() - << " is impossible to select!\n"; - exit(1); - } } + // If the last pattern has predicates (which could fail) emit code to catch + // the case where nothing handles a pattern. if (mightNotMatch) OS << " std::cerr << \"Cannot yet select: \";\n" << " N.Val->dump(CurDAG);\n" From jeffc at jolt-lang.org Sat Jan 28 21:45:47 2006 From: jeffc at jolt-lang.org (Jeff Cohen) Date: Sat, 28 Jan 2006 21:45:47 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86.td Message-ID: <200601290345.VAA26963@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: X86.td updated: 1.19 -> 1.20 --- Log message: Fix typo. --- Diffs of the changes: (+1 -1) X86.td | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/Target/X86/X86.td diff -u llvm/lib/Target/X86/X86.td:1.19 llvm/lib/Target/X86/X86.td:1.20 --- llvm/lib/Target/X86/X86.td:1.19 Fri Jan 27 02:10:46 2006 +++ llvm/lib/Target/X86/X86.td Sat Jan 28 21:45:35 2006 @@ -21,7 +21,7 @@ // def Feature64Bit : SubtargetFeature<"64bit", "Is64Bit", "true", - "Enabl e 64-bit instructions">; + "Enable 64-bit instructions">; def FeatureMMX : SubtargetFeature<"mmx","X86SSELevel", "MMX", "Enable MMX instructions">; def FeatureSSE : SubtargetFeature<"sse", "X86SSELevel", "SSE", From lattner at cs.uiuc.edu Sat Jan 28 21:47:42 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Sat, 28 Jan 2006 21:47:42 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaInstrInfo.td Message-ID: <200601290347.VAA27034@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/Alpha: AlphaInstrInfo.td updated: 1.110 -> 1.111 --- Log message: cmovle != cmovlt --- Diffs of the changes: (+1 -1) AlphaInstrInfo.td | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/Target/Alpha/AlphaInstrInfo.td diff -u llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.110 llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.111 --- llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.110 Thu Jan 26 19:46:15 2006 +++ llvm/lib/Target/Alpha/AlphaInstrInfo.td Sat Jan 28 21:47:30 2006 @@ -184,7 +184,7 @@ def CMOVGT : OForm4< 0x11, 0x66, "cmovgt $RCOND,$RTRUE,$RDEST", [(set GPRC:$RDEST, (select (setgt GPRC:$RCOND, 0), GPRC:$RTRUE, GPRC:$RFALSE))]>; def CMOVLE : OForm4< 0x11, 0x64, "cmovle $RCOND,$RTRUE,$RDEST", - [(set GPRC:$RDEST, (select (setlt GPRC:$RCOND, 0), GPRC:$RTRUE, GPRC:$RFALSE))]>; + [(set GPRC:$RDEST, (select (setle GPRC:$RCOND, 0), GPRC:$RTRUE, GPRC:$RFALSE))]>; def CMOVLT : OForm4< 0x11, 0x44, "cmovlt $RCOND,$RTRUE,$RDEST", [(set GPRC:$RDEST, (select (setlt GPRC:$RCOND, 0), GPRC:$RTRUE, GPRC:$RFALSE))]>; def CMOVNE : OForm4< 0x11, 0x26, "cmovne $RCOND,$RTRUE,$RDEST", From lattner at cs.uiuc.edu Sat Jan 28 22:25:37 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Sat, 28 Jan 2006 22:25:37 -0600 Subject: [llvm-commits] CVS: llvm/utils/TableGen/DAGISelEmitter.cpp DAGISelEmitter.h Message-ID: <200601290425.WAA27277@zion.cs.uiuc.edu> Changes in directory llvm/utils/TableGen: DAGISelEmitter.cpp updated: 1.152 -> 1.153 DAGISelEmitter.h updated: 1.53 -> 1.54 --- Log message: Factor matching code that is common between patterns. This works around GCC not jump-threading across this common code, and produces far nicer output. --- Diffs of the changes: (+112 -35) DAGISelEmitter.cpp | 142 ++++++++++++++++++++++++++++++++++++++++------------- DAGISelEmitter.h | 5 + 2 files changed, 112 insertions(+), 35 deletions(-) Index: llvm/utils/TableGen/DAGISelEmitter.cpp diff -u llvm/utils/TableGen/DAGISelEmitter.cpp:1.152 llvm/utils/TableGen/DAGISelEmitter.cpp:1.153 --- llvm/utils/TableGen/DAGISelEmitter.cpp:1.152 Sat Jan 28 20:57:39 2006 +++ llvm/utils/TableGen/DAGISelEmitter.cpp Sat Jan 28 22:25:26 2006 @@ -2032,9 +2032,12 @@ } } else if (IntInit *II = dynamic_cast(Child->getLeafValue())) { - emitCheck("isa(" + RootName + utostr(OpNo) + - ") && cast(" + RootName + utostr(OpNo) + - ")->getSignExtended() == " + itostr(II->getValue())); + emitCheck("isa(" + RootName + utostr(OpNo) + ")"); + unsigned CTmp = TmpNo++; + emitCode("int CN"+utostr(CTmp)+" = cast("+ + RootName + utostr(OpNo) + ")->getSignExtended();"); + + emitCheck("CN" + utostr(CTmp) + " == " +itostr(II->getValue())); } else { Child->dump(); assert(0 && "Unknown leaf type!"); @@ -2530,7 +2533,7 @@ /// EmitCodeForPattern - Given a pattern to match, emit code to the specified /// stream to match the pattern, and generate the code for the match if it /// succeeds. Returns true if the pattern is not guaranteed to match. -void DAGISelEmitter::EmitCodeForPattern(PatternToMatch &Pattern, +void DAGISelEmitter::GenerateCodeForPattern(PatternToMatch &Pattern, std::vector > &GeneratedCode) { PatternCodeEmitter Emitter(*this, Pattern.getPredicates(), Pattern.getSrcPattern(), Pattern.getDstPattern(), @@ -2581,6 +2584,95 @@ delete Pat; } +/// EmitPatterns - Emit code for at least one pattern, but try to group common +/// code together between the patterns. +void DAGISelEmitter::EmitPatterns(std::vector > > > + &Patterns, unsigned Indent, + std::ostream &OS) { + typedef std::pair CodeLine; + typedef std::vector CodeList; + typedef std::vector > PatternList; + + if (Patterns.empty()) return; + + // Figure out how many patterns share the next code line: + const CodeLine &FirstCodeLine = Patterns.back().second.back(); + unsigned LastMatch = Patterns.size()-1; + while (LastMatch != 0 && Patterns[LastMatch-1].second.back() == FirstCodeLine) + --LastMatch; + + // If not all patterns share this line, split the list into two pieces. The + // first chunk will use this line, the second chunk won't. + if (LastMatch != 0) { + PatternList Shared(Patterns.begin()+LastMatch, Patterns.end()); + PatternList Other(Patterns.begin(), Patterns.begin()+LastMatch); + + // FIXME: Emit braces? + if (Shared.size() == 1) { + PatternToMatch &Pattern = *Shared.back().first; + OS << "\n" << std::string(Indent, ' ') << "// Pattern: "; + Pattern.getSrcPattern()->print(OS); + OS << "\n" << std::string(Indent, ' ') << "// Emits: "; + Pattern.getDstPattern()->print(OS); + OS << "\n"; + OS << std::string(Indent, ' ') << "// Pattern complexity = " + << getPatternSize(Pattern.getSrcPattern(), *this) << " cost = " + << getResultPatternCost(Pattern.getDstPattern()) << "\n"; + } + if (!FirstCodeLine.first) { + OS << std::string(Indent, ' ') << "{\n"; + Indent += 2; + } + EmitPatterns(Shared, Indent, OS); + if (!FirstCodeLine.first) { + Indent -= 2; + OS << std::string(Indent, ' ') << "}\n"; + } + + if (Other.size() == 1) { + PatternToMatch &Pattern = *Other.back().first; + OS << "\n" << std::string(Indent, ' ') << "// Pattern: "; + Pattern.getSrcPattern()->print(OS); + OS << "\n" << std::string(Indent, ' ') << "// Emits: "; + Pattern.getDstPattern()->print(OS); + OS << "\n"; + OS << std::string(Indent, ' ') << "// Pattern complexity = " + << getPatternSize(Pattern.getSrcPattern(), *this) << " cost = " + << getResultPatternCost(Pattern.getDstPattern()) << "\n"; + } + EmitPatterns(Other, Indent, OS); + return; + } + + bool isPredicate = FirstCodeLine.first; + + // Otherwise, every pattern in the list has this line. Emit it. + if (!isPredicate) { + // Normal code. + OS << std::string(Indent, ' ') << FirstCodeLine.second << "\n"; + } else { + OS << std::string(Indent, ' ') + << "if (" << FirstCodeLine.second << ") {\n"; + Indent += 2; + } + + // Remove this code from all of the patterns that share it. + for (unsigned i = 0, e = Patterns.size(); i != e; ++i) { + Patterns[i].second.pop_back(); + if (Patterns[i].second.empty()) { + Patterns.erase(Patterns.begin()+i); + --i; --e; + } + } + + EmitPatterns(Patterns, Indent, OS); + + if (isPredicate) + OS << std::string(Indent-2, ' ') << "}\n"; +} + + namespace { /// CompareByRecordName - An ordering predicate that implements less-than by @@ -2652,7 +2744,7 @@ std::vector > CodeForPatterns; for (unsigned i = 0, e = Patterns.size(); i != e; ++i) { CodeList GeneratedCode; - EmitCodeForPattern(*Patterns[i], GeneratedCode); + GenerateCodeForPattern(*Patterns[i], GeneratedCode); CodeForPatterns.push_back(std::make_pair(Patterns[i], GeneratedCode)); } @@ -2679,39 +2771,21 @@ exit(1); } } - + + // Loop through and reverse all of the CodeList vectors, as we will be + // accessing them from their logical front, but accessing the end of a + // vector is more efficient. for (unsigned i = 0, e = CodeForPatterns.size(); i != e; ++i) { CodeList &GeneratedCode = CodeForPatterns[i].second; - PatternToMatch &Pattern = *CodeForPatterns[i].first; - OS << " { // Pattern: "; - Pattern.getSrcPattern()->print(OS); - OS << "\n // Emits: "; - Pattern.getDstPattern()->print(OS); - OS << "\n"; - OS << " // Pattern complexity = " - << getPatternSize(Pattern.getSrcPattern(), *this) << " cost = " - << getResultPatternCost(Pattern.getDstPattern()) << "\n"; - - // Actually output the generated code now. - mightNotMatch = false; - unsigned Indent = 4; - for (unsigned j = 0, e = GeneratedCode.size(); j != e; ++j) { - if (!GeneratedCode[j].first) { - // Normal code. - OS << std::string(Indent, ' ') << GeneratedCode[j].second << "\n"; - } else { - mightNotMatch = true; - OS << std::string(Indent, ' ') - << "if (" << GeneratedCode[j].second << ") {\n"; - Indent += 2; - } - } - for (; Indent != 4; Indent -= 2) - OS << std::string(Indent-2, ' ') << "}\n"; - - OS << " }\n"; + std::reverse(GeneratedCode.begin(), GeneratedCode.end()); } + // Next, reverse the list of patterns itself for the same reason. + std::reverse(CodeForPatterns.begin(), CodeForPatterns.end()); + + // Emit all of the patterns now, grouped together to share code. + EmitPatterns(CodeForPatterns, 2, OS); + // If the last pattern has predicates (which could fail) emit code to catch // the case where nothing handles a pattern. if (mightNotMatch) Index: llvm/utils/TableGen/DAGISelEmitter.h diff -u llvm/utils/TableGen/DAGISelEmitter.h:1.53 llvm/utils/TableGen/DAGISelEmitter.h:1.54 --- llvm/utils/TableGen/DAGISelEmitter.h:1.53 Sat Jan 28 20:43:35 2006 +++ llvm/utils/TableGen/DAGISelEmitter.h Sat Jan 28 22:25:26 2006 @@ -470,8 +470,11 @@ std::map &InstResults, std::vector &InstImpInputs, std::vector &InstImpResults); - void EmitCodeForPattern(PatternToMatch &Pattern, + void GenerateCodeForPattern(PatternToMatch &Pattern, std::vector > &GeneratedCode); + void EmitPatterns(std::vector > > > &Patterns, + unsigned Indent, std::ostream &OS); void EmitInstructionSelector(std::ostream &OS); }; From lattner at cs.uiuc.edu Sat Jan 28 22:41:18 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Sat, 28 Jan 2006 22:41:18 -0600 Subject: [llvm-commits] CVS: llvm/utils/TableGen/DAGISelEmitter.cpp Message-ID: <200601290441.WAA27397@zion.cs.uiuc.edu> Changes in directory llvm/utils/TableGen: DAGISelEmitter.cpp updated: 1.153 -> 1.154 --- Log message: Emit series of conditionals with &&, emitting stuff like this: if (N1.getOpcode() == ISD::LOAD && N1.hasOneUse() && !CodeGenMap.count(N1.getValue(0)) && !CodeGenMap.count(N1.getValue(1))) { instead of this: if (N1.getOpcode() == ISD::LOAD) { if (N1.hasOneUse()) { if (!CodeGenMap.count(N1.getValue(0))) { if (!CodeGenMap.count(N1.getValue(1))) { --- Diffs of the changes: (+48 -13) DAGISelEmitter.cpp | 61 +++++++++++++++++++++++++++++++++++++++++------------ 1 files changed, 48 insertions(+), 13 deletions(-) Index: llvm/utils/TableGen/DAGISelEmitter.cpp diff -u llvm/utils/TableGen/DAGISelEmitter.cpp:1.153 llvm/utils/TableGen/DAGISelEmitter.cpp:1.154 --- llvm/utils/TableGen/DAGISelEmitter.cpp:1.153 Sat Jan 28 22:25:26 2006 +++ llvm/utils/TableGen/DAGISelEmitter.cpp Sat Jan 28 22:41:05 2006 @@ -2584,6 +2584,24 @@ delete Pat; } +/// EraseCodeLine - Erase one code line from all of the patterns. If removing +/// a line causes any of them to be empty, remove them and return true when +/// done. +static bool EraseCodeLine(std::vector > > > + &Patterns) { + bool ErasedPatterns = false; + for (unsigned i = 0, e = Patterns.size(); i != e; ++i) { + Patterns[i].second.pop_back(); + if (Patterns[i].second.empty()) { + Patterns.erase(Patterns.begin()+i); + --i; --e; + ErasedPatterns = true; + } + } + return ErasedPatterns; +} + /// EmitPatterns - Emit code for at least one pattern, but try to group common /// code together between the patterns. void DAGISelEmitter::EmitPatterns(std::vector Changes in directory llvm/utils/TableGen: DAGISelEmitter.cpp updated: 1.154 -> 1.155 --- Log message: start of the 64bit safety cleanup --- Diffs of the changes: (+1 -1) DAGISelEmitter.cpp | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/utils/TableGen/DAGISelEmitter.cpp diff -u llvm/utils/TableGen/DAGISelEmitter.cpp:1.154 llvm/utils/TableGen/DAGISelEmitter.cpp:1.155 --- llvm/utils/TableGen/DAGISelEmitter.cpp:1.154 Sat Jan 28 22:41:05 2006 +++ llvm/utils/TableGen/DAGISelEmitter.cpp Sat Jan 28 23:07:04 2006 @@ -2079,7 +2079,7 @@ case MVT::i32: Code = "unsigned Tmp"; break; case MVT::i64: Code = "uint64_t Tmp"; break; } - emitCode(Code + utostr(ResNo) + "C = (unsigned)cast(" + + emitCode(Code + utostr(ResNo) + "C = (uint64_t)cast(" + Val + ")->getValue();"); emitCode("SDOperand Tmp" + utostr(ResNo) + " = CurDAG->getTargetConstant(Tmp" + utostr(ResNo) + From alenhar2 at cs.uiuc.edu Sat Jan 28 23:17:33 2006 From: alenhar2 at cs.uiuc.edu (Andrew Lenharth) Date: Sat, 28 Jan 2006 23:17:33 -0600 Subject: [llvm-commits] CVS: llvm/utils/TableGen/DAGISelEmitter.cpp Message-ID: <200601290517.XAA27608@zion.cs.uiuc.edu> Changes in directory llvm/utils/TableGen: DAGISelEmitter.cpp updated: 1.155 -> 1.156 --- Log message: make the casts actually cast to the variable type --- Diffs of the changes: (+10 -7) DAGISelEmitter.cpp | 17 ++++++++++------- 1 files changed, 10 insertions(+), 7 deletions(-) Index: llvm/utils/TableGen/DAGISelEmitter.cpp diff -u llvm/utils/TableGen/DAGISelEmitter.cpp:1.155 llvm/utils/TableGen/DAGISelEmitter.cpp:1.156 --- llvm/utils/TableGen/DAGISelEmitter.cpp:1.155 Sat Jan 28 23:07:04 2006 +++ llvm/utils/TableGen/DAGISelEmitter.cpp Sat Jan 28 23:17:22 2006 @@ -2069,18 +2069,21 @@ unsigned ResNo = TmpNo++; unsigned NumRes = 1; if (!N->isLeaf() && N->getOperator()->getName() == "imm") { + const char* CastType; assert(N->getExtTypes().size() == 1 && "Multiple types not handled!"); const char *Code; switch (N->getTypeNum(0)) { default: assert(0 && "Unknown type for constant node!"); - case MVT::i1: Code = "bool Tmp"; break; - case MVT::i8: Code = "unsigned char Tmp"; break; - case MVT::i16: Code = "unsigned short Tmp"; break; - case MVT::i32: Code = "unsigned Tmp"; break; - case MVT::i64: Code = "uint64_t Tmp"; break; + case MVT::i1: CastType = "bool"; Code = "bool Tmp"; break; + case MVT::i8: + CastType = "unsigned char"; Code = "unsigned char Tmp"; break; + case MVT::i16: + CastType = "unsigned short"; Code = "unsigned short Tmp"; break; + case MVT::i32: CastType = "unsigned"; Code = "unsigned Tmp"; break; + case MVT::i64: CastType = "uint64_t"; Code = "uint64_t Tmp"; break; } - emitCode(Code + utostr(ResNo) + "C = (uint64_t)cast(" + - Val + ")->getValue();"); + emitCode(Code + utostr(ResNo) + "C = (" + CastType + + ")cast(" + Val + ")->getValue();"); emitCode("SDOperand Tmp" + utostr(ResNo) + " = CurDAG->getTargetConstant(Tmp" + utostr(ResNo) + "C, MVT::" + getEnumName(N->getTypeNum(0)) + ");"); From alenhar2 at cs.uiuc.edu Sat Jan 28 23:22:49 2006 From: alenhar2 at cs.uiuc.edu (Andrew Lenharth) Date: Sat, 28 Jan 2006 23:22:49 -0600 Subject: [llvm-commits] CVS: llvm/utils/TableGen/DAGISelEmitter.cpp Message-ID: <200601290522.XAA27642@zion.cs.uiuc.edu> Changes in directory llvm/utils/TableGen: DAGISelEmitter.cpp updated: 1.156 -> 1.157 --- Log message: it is nice not to chop off bits for those blessed with lots of bits --- Diffs of the changes: (+1 -1) DAGISelEmitter.cpp | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/utils/TableGen/DAGISelEmitter.cpp diff -u llvm/utils/TableGen/DAGISelEmitter.cpp:1.156 llvm/utils/TableGen/DAGISelEmitter.cpp:1.157 --- llvm/utils/TableGen/DAGISelEmitter.cpp:1.156 Sat Jan 28 23:17:22 2006 +++ llvm/utils/TableGen/DAGISelEmitter.cpp Sat Jan 28 23:22:37 2006 @@ -2034,7 +2034,7 @@ dynamic_cast(Child->getLeafValue())) { emitCheck("isa(" + RootName + utostr(OpNo) + ")"); unsigned CTmp = TmpNo++; - emitCode("int CN"+utostr(CTmp)+" = cast("+ + emitCode("int64_t CN"+utostr(CTmp)+" = cast("+ RootName + utostr(OpNo) + ")->getSignExtended();"); emitCheck("CN" + utostr(CTmp) + " == " +itostr(II->getValue())); From lattner at cs.uiuc.edu Sun Jan 29 00:00:57 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Sun, 29 Jan 2006 00:00:57 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp LegalizeDAG.cpp Message-ID: <200601290600.AAA27871@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/SelectionDAG: DAGCombiner.cpp updated: 1.87 -> 1.88 LegalizeDAG.cpp updated: 1.289 -> 1.290 --- Log message: eliminate uses of SelectionDAG::getBR2Way_CC --- Diffs of the changes: (+24 -9) DAGCombiner.cpp | 13 ++++++++++--- LegalizeDAG.cpp | 20 ++++++++++++++------ 2 files changed, 24 insertions(+), 9 deletions(-) Index: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp diff -u llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.87 llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.88 --- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.87 Fri Jan 27 19:06:30 2006 +++ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Sun Jan 29 00:00:45 2006 @@ -2092,9 +2092,16 @@ if (SCCC && SCCC->isNullValue()) return DAG.getNode(ISD::BR, MVT::Other, Chain, N5); // fold to a simpler setcc - if (SCC.Val && SCC.getOpcode() == ISD::SETCC) - return DAG.getBR2Way_CC(Chain, SCC.getOperand(2), SCC.getOperand(0), - SCC.getOperand(1), N4, N5); + if (SCC.Val && SCC.getOpcode() == ISD::SETCC) { + std::vector Ops; + Ops.push_back(Chain); + Ops.push_back(SCC.getOperand(2)); + Ops.push_back(SCC.getOperand(0)); + Ops.push_back(SCC.getOperand(1)); + Ops.push_back(N4); + Ops.push_back(N5); + return DAG.getNode(ISD::BRTWOWAY_CC, MVT::Other, Ops); + } return SDOperand(); } Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.289 llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.290 --- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.289 Sat Jan 28 04:58:55 2006 +++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Sun Jan 29 00:00:45 2006 @@ -749,14 +749,22 @@ // BRCOND/BR pair. if (TLI.isOperationLegal(ISD::BRTWOWAY_CC, MVT::Other)) { if (Tmp2.getOpcode() == ISD::SETCC) { - Result = DAG.getBR2Way_CC(Tmp1, Tmp2.getOperand(2), - Tmp2.getOperand(0), Tmp2.getOperand(1), - Node->getOperand(2), Node->getOperand(3)); + Tmp3 = Tmp2.getOperand(0); + Tmp4 = Tmp2.getOperand(1); + Tmp2 = Tmp2.getOperand(2); } else { - Result = DAG.getBR2Way_CC(Tmp1, DAG.getCondCode(ISD::SETNE), Tmp2, - DAG.getConstant(0, Tmp2.getValueType()), - Node->getOperand(2), Node->getOperand(3)); + Tmp3 = Tmp2; + Tmp4 = DAG.getConstant(0, Tmp2.getValueType()); + Tmp2 = DAG.getCondCode(ISD::SETNE); } + std::vector Ops; + Ops.push_back(Tmp1); + Ops.push_back(Tmp2); + Ops.push_back(Tmp3); + Ops.push_back(Tmp4); + Ops.push_back(Node->getOperand(2)); + Ops.push_back(Node->getOperand(3)); + Result = DAG.getNode(ISD::BRTWOWAY_CC, MVT::Other, Ops); } else { Result = DAG.getNode(ISD::BRCOND, MVT::Other, Tmp1, Tmp2, Node->getOperand(2)); From lattner at cs.uiuc.edu Sun Jan 29 00:01:25 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Sun, 29 Jan 2006 00:01:25 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/SelectionDAG.h Message-ID: <200601290601.AAA27913@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/CodeGen: SelectionDAG.h updated: 1.91 -> 1.92 --- Log message: remove the getBR2Way_CC method --- Diffs of the changes: (+0 -15) SelectionDAG.h | 15 --------------- 1 files changed, 15 deletions(-) Index: llvm/include/llvm/CodeGen/SelectionDAG.h diff -u llvm/include/llvm/CodeGen/SelectionDAG.h:1.91 llvm/include/llvm/CodeGen/SelectionDAG.h:1.92 --- llvm/include/llvm/CodeGen/SelectionDAG.h:1.91 Sat Jan 28 04:08:58 2006 +++ llvm/include/llvm/CodeGen/SelectionDAG.h Sun Jan 29 00:01:13 2006 @@ -229,21 +229,6 @@ return getNode(ISD::SELECT_CC, VT, LHS, RHS, True, False,getCondCode(Cond)); } - /// getBR2Way_CC - Helper function to make it easier to build BRTWOWAY_CC - /// nodes. - /// - SDOperand getBR2Way_CC(SDOperand Chain, SDOperand CCNode, SDOperand LHS, - SDOperand RHS, SDOperand True, SDOperand False) { - std::vector Ops; - Ops.push_back(Chain); - Ops.push_back(CCNode); - Ops.push_back(LHS); - Ops.push_back(RHS); - Ops.push_back(True); - Ops.push_back(False); - return getNode(ISD::BRTWOWAY_CC, MVT::Other, Ops); - } - /// getVAArg - VAArg produces a result and token chain, and takes a pointer /// and a source value as input. SDOperand getVAArg(MVT::ValueType VT, SDOperand Chain, SDOperand Ptr, From lattner at cs.uiuc.edu Sun Jan 29 00:24:52 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Sun, 29 Jan 2006 00:24:52 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/LiveIntervalAnalysis.h SelectionDAG.h SelectionDAGNodes.h Message-ID: <200601290624.AAA28058@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/CodeGen: LiveIntervalAnalysis.h updated: 1.48 -> 1.49 SelectionDAG.h updated: 1.92 -> 1.93 SelectionDAGNodes.h updated: 1.96 -> 1.97 --- Log message: Make ConstantFP legalize into TargetConstantFP like other leaf nodes do. Allow targets to register custom legalizers for ConstantFP in case there isn't a fixed list of constants that can be generated. On some architectures (ia64?) all fp immediates are legal. --- Diffs of the changes: (+16 -6) LiveIntervalAnalysis.h | 6 +++++- SelectionDAG.h | 2 ++ SelectionDAGNodes.h | 14 +++++++++----- 3 files changed, 16 insertions(+), 6 deletions(-) Index: llvm/include/llvm/CodeGen/LiveIntervalAnalysis.h diff -u llvm/include/llvm/CodeGen/LiveIntervalAnalysis.h:1.48 llvm/include/llvm/CodeGen/LiveIntervalAnalysis.h:1.49 --- llvm/include/llvm/CodeGen/LiveIntervalAnalysis.h:1.48 Fri Oct 21 10:49:28 2005 +++ llvm/include/llvm/CodeGen/LiveIntervalAnalysis.h Sun Jan 29 00:24:40 2006 @@ -148,7 +148,9 @@ /// handleVirtualRegisterDef) void handleRegisterDef(MachineBasicBlock* mbb, MachineBasicBlock::iterator mi, - unsigned reg); + unsigned reg, + std::map, + unsigned> &PhysRegValueMap); /// handleVirtualRegisterDef - update intervals for a virtual /// register def @@ -165,6 +167,8 @@ MachineBasicBlock::iterator mi, LiveInterval& interval, unsigned SrcReg, unsigned DestReg, + std::map, + unsigned> *PhysRegValueMap, bool isLiveIn = false); /// Return true if the two specified registers belong to different Index: llvm/include/llvm/CodeGen/SelectionDAG.h diff -u llvm/include/llvm/CodeGen/SelectionDAG.h:1.92 llvm/include/llvm/CodeGen/SelectionDAG.h:1.93 --- llvm/include/llvm/CodeGen/SelectionDAG.h:1.92 Sun Jan 29 00:01:13 2006 +++ llvm/include/llvm/CodeGen/SelectionDAG.h Sun Jan 29 00:24:40 2006 @@ -113,6 +113,7 @@ SDOperand getConstant(uint64_t Val, MVT::ValueType VT); SDOperand getTargetConstant(uint64_t Val, MVT::ValueType VT); SDOperand getConstantFP(double Val, MVT::ValueType VT); + SDOperand getTargetConstantFP(double Val, MVT::ValueType VT); SDOperand getGlobalAddress(const GlobalValue *GV, MVT::ValueType VT, int offset = 0); SDOperand getTargetGlobalAddress(const GlobalValue *GV, MVT::ValueType VT, @@ -587,6 +588,7 @@ std::map, SDNode*> Constants; std::map, SDNode*> TargetConstants; std::map, SDNode*> ConstantFPs; + std::map, SDNode*> TargetConstantFPs; std::map FrameIndices, TargetFrameIndices; std::map ConstantPoolIndices; std::map TargetConstantPoolIndices; Index: llvm/include/llvm/CodeGen/SelectionDAGNodes.h diff -u llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.96 llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.97 --- llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.96 Fri Jan 27 18:18:27 2006 +++ llvm/include/llvm/CodeGen/SelectionDAGNodes.h Sun Jan 29 00:24:40 2006 @@ -71,9 +71,11 @@ // leaf node. All operands are either Constant or ConstantFP nodes. ConstantVec, - // TargetConstant - Like Constant, but the DAG does not do any folding or - // simplification of the constant. This is used by the DAG->DAG selector. + // TargetConstant* - Like Constant*, but the DAG does not do any folding or + // simplification of the constant. TargetConstant, + TargetConstantFP, + TargetConstantVec, // TargetGlobalAddress - Like GlobalAddress, but the DAG does no folding or // anything else with this node, and this is valid in the target-specific @@ -997,8 +999,9 @@ double Value; protected: friend class SelectionDAG; - ConstantFPSDNode(double val, MVT::ValueType VT) - : SDNode(ISD::ConstantFP, VT), Value(val) { + ConstantFPSDNode(bool isTarget, double val, MVT::ValueType VT) + : SDNode(isTarget ? ISD::TargetConstantFP : ISD::ConstantFP, VT), + Value(val) { } public: @@ -1012,7 +1015,8 @@ static bool classof(const ConstantFPSDNode *) { return true; } static bool classof(const SDNode *N) { - return N->getOpcode() == ISD::ConstantFP; + return N->getOpcode() == ISD::ConstantFP || + N->getOpcode() == ISD::TargetConstantFP; } }; From lattner at cs.uiuc.edu Sun Jan 29 00:25:34 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Sun, 29 Jan 2006 00:25:34 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp AlphaISelLowering.cpp Message-ID: <200601290625.AAA28096@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/Alpha: AlphaISelDAGToDAG.cpp updated: 1.30 -> 1.31 AlphaISelLowering.cpp updated: 1.34 -> 1.35 --- Log message: Update alpha to reflect recent constantfp legalize changes. It's not clear why all this code isn't autogenerated. :( --- Diffs of the changes: (+18 -16) AlphaISelDAGToDAG.cpp | 32 ++++++++++++++++---------------- AlphaISelLowering.cpp | 2 ++ 2 files changed, 18 insertions(+), 16 deletions(-) Index: llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp diff -u llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:1.30 llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:1.31 --- llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:1.30 Fri Jan 27 17:39:00 2006 +++ llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp Sun Jan 29 00:25:22 2006 @@ -237,23 +237,23 @@ return CurDAG->SelectNodeTo(N, Alpha::LDQr, MVT::i64, MVT::Other, CPI, Tmp, CurDAG->getEntryNode()); } - case ISD::ConstantFP: - if (ConstantFPSDNode *CN = dyn_cast(N)) { - bool isDouble = N->getValueType(0) == MVT::f64; - MVT::ValueType T = isDouble ? MVT::f64 : MVT::f32; - if (CN->isExactlyValue(+0.0)) { - return CurDAG->SelectNodeTo(N, isDouble ? Alpha::CPYST : Alpha::CPYSS, - T, CurDAG->getRegister(Alpha::F31, T), - CurDAG->getRegister(Alpha::F31, T)); - } else if ( CN->isExactlyValue(-0.0)) { - return CurDAG->SelectNodeTo(N, isDouble ? Alpha::CPYSNT : Alpha::CPYSNS, - T, CurDAG->getRegister(Alpha::F31, T), - CurDAG->getRegister(Alpha::F31, T)); - } else { - abort(); - } - break; + case ISD::TargetConstantFP: { + ConstantFPSDNode *CN = cast(N); + bool isDouble = N->getValueType(0) == MVT::f64; + MVT::ValueType T = isDouble ? MVT::f64 : MVT::f32; + if (CN->isExactlyValue(+0.0)) { + return CurDAG->SelectNodeTo(N, isDouble ? Alpha::CPYST : Alpha::CPYSS, + T, CurDAG->getRegister(Alpha::F31, T), + CurDAG->getRegister(Alpha::F31, T)); + } else if ( CN->isExactlyValue(-0.0)) { + return CurDAG->SelectNodeTo(N, isDouble ? Alpha::CPYSNT : Alpha::CPYSNS, + T, CurDAG->getRegister(Alpha::F31, T), + CurDAG->getRegister(Alpha::F31, T)); + } else { + abort(); } + break; + } case ISD::SETCC: if (MVT::isFloatingPoint(N->getOperand(0).Val->getValueType(0))) { Index: llvm/lib/Target/Alpha/AlphaISelLowering.cpp diff -u llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.34 llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.35 --- llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.34 Fri Jan 27 21:14:31 2006 +++ llvm/lib/Target/Alpha/AlphaISelLowering.cpp Sun Jan 29 00:25:22 2006 @@ -145,6 +145,8 @@ setStackPointerRegisterToSaveRestore(Alpha::R30); + setOperationAction(ISD::ConstantFP, MVT::f64, Expand); + setOperationAction(ISD::ConstantFP, MVT::f32, Expand); addLegalFPImmediate(+0.0); //F31 addLegalFPImmediate(-0.0); //-F31 From lattner at cs.uiuc.edu Sun Jan 29 00:26:21 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Sun, 29 Jan 2006 00:26:21 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp Message-ID: <200601290626.AAA28171@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: X86ISelLowering.cpp updated: 1.62 -> 1.63 --- Log message: Targets all now request ConstantFP to be legalized into TargetConstantFP. 'fpimm' in .td files is now TargetConstantFP. --- Diffs of the changes: (+6 -1) X86ISelLowering.cpp | 7 ++++++- 1 files changed, 6 insertions(+), 1 deletion(-) Index: llvm/lib/Target/X86/X86ISelLowering.cpp diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.62 llvm/lib/Target/X86/X86ISelLowering.cpp:1.63 --- llvm/lib/Target/X86/X86ISelLowering.cpp:1.62 Sat Jan 28 04:34:47 2006 +++ llvm/lib/Target/X86/X86ISelLowering.cpp Sun Jan 29 00:26:08 2006 @@ -45,7 +45,7 @@ setSchedulingPreference(SchedulingForRegPressure); setShiftAmountFlavor(Mask); // shl X, 32 == shl X, 0 setStackPointerRegisterToSaveRestore(X86::ESP); - + // Set up the register classes. addRegisterClass(MVT::i8, X86::R8RegisterClass); addRegisterClass(MVT::i16, X86::R16RegisterClass); @@ -213,6 +213,10 @@ setOperationAction(ISD::FNEG , MVT::f32, Expand); setOperationAction(ISD::FREM , MVT::f32, Expand); + // Expand FP immediates into loads from the stack, except for the special + // cases we handle. + setOperationAction(ISD::ConstantFP, MVT::f64, Expand); + setOperationAction(ISD::ConstantFP, MVT::f32, Expand); addLegalFPImmediate(+0.0); // xorps / xorpd } else { // Set up the FP register classes. @@ -228,6 +232,7 @@ setOperationAction(ISD::FCOS , MVT::f64 , Expand); } + setOperationAction(ISD::ConstantFP, MVT::f64, Expand); addLegalFPImmediate(+0.0); // FLD0 addLegalFPImmediate(+1.0); // FLD1 addLegalFPImmediate(-0.0); // FLD0/FCHS From lattner at cs.uiuc.edu Sun Jan 29 00:26:21 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Sun, 29 Jan 2006 00:26:21 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/TargetSelectionDAG.td Message-ID: <200601290626.AAA28177@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target: TargetSelectionDAG.td updated: 1.44 -> 1.45 --- Log message: Targets all now request ConstantFP to be legalized into TargetConstantFP. 'fpimm' in .td files is now TargetConstantFP. --- Diffs of the changes: (+2 -1) TargetSelectionDAG.td | 3 ++- 1 files changed, 2 insertions(+), 1 deletion(-) Index: llvm/lib/Target/TargetSelectionDAG.td diff -u llvm/lib/Target/TargetSelectionDAG.td:1.44 llvm/lib/Target/TargetSelectionDAG.td:1.45 --- llvm/lib/Target/TargetSelectionDAG.td:1.44 Fri Jan 13 21:14:10 2006 +++ llvm/lib/Target/TargetSelectionDAG.td Sun Jan 29 00:26:07 2006 @@ -194,7 +194,8 @@ def srcvalue; def imm : SDNode<"ISD::Constant" , SDTIntLeaf , [], "ConstantSDNode">; -def fpimm : SDNode<"ISD::ConstantFP", SDTFPLeaf , [], "ConstantFPSDNode">; +def fpimm : SDNode<"ISD::TargetConstantFP", + SDTFPLeaf, [], "ConstantFPSDNode">; def vt : SDNode<"ISD::VALUETYPE" , SDTOther , [], "VTSDNode">; def bb : SDNode<"ISD::BasicBlock", SDTOther , [], "BasicBlockSDNode">; def cond : SDNode<"ISD::CONDCODE" , SDTOther , [], "CondCodeSDNode">; From lattner at cs.uiuc.edu Sun Jan 29 00:26:21 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Sun, 29 Jan 2006 00:26:21 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp IA64ISelLowering.cpp Message-ID: <200601290626.AAA28169@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/IA64: IA64ISelDAGToDAG.cpp updated: 1.31 -> 1.32 IA64ISelLowering.cpp updated: 1.31 -> 1.32 --- Log message: Targets all now request ConstantFP to be legalized into TargetConstantFP. 'fpimm' in .td files is now TargetConstantFP. --- Diffs of the changes: (+2 -1) IA64ISelDAGToDAG.cpp | 2 +- IA64ISelLowering.cpp | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) Index: llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp diff -u llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp:1.31 llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp:1.32 --- llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp:1.31 Fri Jan 27 18:02:51 2006 +++ llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp Sun Jan 29 00:26:07 2006 @@ -419,7 +419,7 @@ case ISD::SREM: case ISD::UREM: return SelectDIV(Op); - case ISD::ConstantFP: { + case ISD::TargetConstantFP: { SDOperand Chain = CurDAG->getEntryNode(); // this is a constant, so.. if (cast(N)->isExactlyValue(+0.0)) Index: llvm/lib/Target/IA64/IA64ISelLowering.cpp diff -u llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.31 llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.32 --- llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.31 Fri Jan 27 21:14:31 2006 +++ llvm/lib/Target/IA64/IA64ISelLowering.cpp Sun Jan 29 00:26:07 2006 @@ -104,6 +104,7 @@ computeRegisterProperties(); + setOperationAction(ISD::ConstantFP, MVT::f64, Expand); addLegalFPImmediate(+0.0); addLegalFPImmediate(+1.0); } From lattner at cs.uiuc.edu Sun Jan 29 00:26:21 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Sun, 29 Jan 2006 00:26:21 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelLowering.cpp Message-ID: <200601290626.AAA28181@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/PowerPC: PPCISelLowering.cpp updated: 1.75 -> 1.76 --- Log message: Targets all now request ConstantFP to be legalized into TargetConstantFP. 'fpimm' in .td files is now TargetConstantFP. --- Diffs of the changes: (+3 -0) PPCISelLowering.cpp | 3 +++ 1 files changed, 3 insertions(+) Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.75 llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.76 --- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.75 Sat Jan 28 01:33:03 2006 +++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp Sun Jan 29 00:26:07 2006 @@ -37,6 +37,9 @@ addRegisterClass(MVT::f32, PPC::F4RCRegisterClass); addRegisterClass(MVT::f64, PPC::F8RCRegisterClass); + setOperationAction(ISD::ConstantFP, MVT::f64, Expand); + setOperationAction(ISD::ConstantFP, MVT::f32, Expand); + // PowerPC has no intrinsics for these particular operations setOperationAction(ISD::MEMMOVE, MVT::Other, Expand); setOperationAction(ISD::MEMSET, MVT::Other, Expand); From lattner at cs.uiuc.edu Sun Jan 29 00:27:08 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Sun, 29 Jan 2006 00:27:08 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp SelectionDAG.cpp Message-ID: <200601290627.AAA28225@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/SelectionDAG: LegalizeDAG.cpp updated: 1.290 -> 1.291 SelectionDAG.cpp updated: 1.248 -> 1.249 --- Log message: Legalize ConstantFP into TargetConstantFP when the target allows. Implement custom expansion of ConstantFP nodes. --- Diffs of the changes: (+39 -2) LegalizeDAG.cpp | 19 ++++++++++++++++++- SelectionDAG.cpp | 22 +++++++++++++++++++++- 2 files changed, 39 insertions(+), 2 deletions(-) Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.290 llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.291 --- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.290 Sun Jan 29 00:00:45 2006 +++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Sun Jan 29 00:26:56 2006 @@ -272,6 +272,8 @@ case ISD::BasicBlock: case ISD::TargetFrameIndex: case ISD::TargetConstant: + case ISD::TargetConstantFP: + case ISD::TargetConstantVec: case ISD::TargetConstantPool: case ISD::TargetGlobalAddress: case ISD::TargetExternalSymbol: @@ -481,7 +483,22 @@ break; } - if (!isLegal) { + // If this is a legal constant, turn it into a TargetConstantFP node. + if (isLegal) { + Result = DAG.getTargetConstantFP(CFP->getValue(), CFP->getValueType(0)); + break; + } + + switch (TLI.getOperationAction(ISD::ConstantFP, CFP->getValueType(0))) { + default: assert(0 && "This action is not supported yet!"); + case TargetLowering::Custom: + Tmp3 = TLI.LowerOperation(Result, DAG); + if (Tmp3.Val) { + Result = Tmp3; + break; + } + // FALLTHROUGH + case TargetLowering::Expand: // Otherwise we need to spill the constant to memory. bool Extend = false; Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.248 llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.249 --- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.248 Sat Jan 28 04:09:25 2006 +++ llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Sun Jan 29 00:26:56 2006 @@ -277,6 +277,11 @@ Erased = ConstantFPs.erase(std::make_pair(V, N->getValueType(0))); break; } + case ISD::TargetConstantFP: { + uint64_t V = DoubleToBits(cast(N)->getValue()); + Erased = TargetConstantFPs.erase(std::make_pair(V, N->getValueType(0))); + break; + } case ISD::STRING: Erased = StringNodes.erase(cast(N)->getValue()); break; @@ -606,7 +611,22 @@ // we don't have issues with SNANs. SDNode *&N = ConstantFPs[std::make_pair(DoubleToBits(Val), VT)]; if (N) return SDOperand(N, 0); - N = new ConstantFPSDNode(Val, VT); + N = new ConstantFPSDNode(false, Val, VT); + AllNodes.push_back(N); + return SDOperand(N, 0); +} + +SDOperand SelectionDAG::getTargetConstantFP(double Val, MVT::ValueType VT) { + assert(MVT::isFloatingPoint(VT) && "Cannot create integer FP constant!"); + if (VT == MVT::f32) + Val = (float)Val; // Mask out extra precision. + + // Do the map lookup using the actual bit pattern for the floating point + // value, so that we don't have problems with 0.0 comparing equal to -0.0, and + // we don't have issues with SNANs. + SDNode *&N = TargetConstantFPs[std::make_pair(DoubleToBits(Val), VT)]; + if (N) return SDOperand(N, 0); + N = new ConstantFPSDNode(true, Val, VT); AllNodes.push_back(N); return SDOperand(N, 0); } From lattner at cs.uiuc.edu Sun Jan 29 00:33:09 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Sun, 29 Jan 2006 00:33:09 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelLowering.cpp Message-ID: <200601290633.AAA28313@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/PowerPC: PPCISelLowering.cpp updated: 1.76 -> 1.77 --- Log message: Request expansion of ConstantVec nodes. --- Diffs of the changes: (+5 -0) PPCISelLowering.cpp | 5 +++++ 1 files changed, 5 insertions(+) Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.76 llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.77 --- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.76 Sun Jan 29 00:26:07 2006 +++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp Sun Jan 29 00:32:58 2006 @@ -153,6 +153,11 @@ if (TM.getSubtarget().hasAltivec()) { addRegisterClass(MVT::v4f32, PPC::VRRCRegisterClass); addRegisterClass(MVT::v4i32, PPC::VRRCRegisterClass); + + // FIXME: We don't support any ConstantVec's yet. We should custom expand + // the ones we do! + setOperationAction(ISD::ConstantVec, MVT::v4f32, Expand); + setOperationAction(ISD::ConstantVec, MVT::v4i32, Expand); } setSetCCResultContents(ZeroOrOneSetCCResult); From lattner at cs.uiuc.edu Sun Jan 29 00:34:27 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Sun, 29 Jan 2006 00:34:27 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Message-ID: <200601290634.AAA28374@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/SelectionDAG: LegalizeDAG.cpp updated: 1.291 -> 1.292 --- Log message: Allow custom expansion of ConstantVec nodes. PPC will use this in the future. --- Diffs of the changes: (+35 -22) LegalizeDAG.cpp | 57 ++++++++++++++++++++++++++++++++++---------------------- 1 files changed, 35 insertions(+), 22 deletions(-) Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.291 llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.292 --- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.291 Sun Jan 29 00:26:56 2006 +++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Sun Jan 29 00:34:16 2006 @@ -530,30 +530,43 @@ } break; } - case ISD::ConstantVec: { - // We assume that vector constants are not legal, and will be immediately - // spilled to the constant pool. - // - // FIXME: Allow custom lowering to TargetConstantVec's. - // - // Create a ConstantPacked, and put it in the constant pool. - std::vector CV; - MVT::ValueType VT = Node->getValueType(0); - for (unsigned I = 0, E = Node->getNumOperands(); I < E; ++I) { - SDOperand OpN = Node->getOperand(I); - const Type* OpNTy = MVT::getTypeForValueType(OpN.getValueType()); - if (MVT::isFloatingPoint(VT)) - CV.push_back(ConstantFP::get(OpNTy, - cast(OpN)->getValue())); - else - CV.push_back(ConstantUInt::get(OpNTy, - cast(OpN)->getValue())); + case ISD::ConstantVec: + switch (TLI.getOperationAction(ISD::ConstantVec, Node->getValueType(0))) { + default: assert(0 && "This action is not supported yet!"); + case TargetLowering::Custom: + Tmp3 = TLI.LowerOperation(Result, DAG); + if (Tmp3.Val) { + Result = Tmp3; + break; + } + // FALLTHROUGH + case TargetLowering::Expand: + // We assume that vector constants are not legal, and will be immediately + // spilled to the constant pool. + // + // Create a ConstantPacked, and put it in the constant pool. + MVT::ValueType VT = Node->getValueType(0); + const Type *OpNTy = + MVT::getTypeForValueType(Node->getOperand(0).getValueType()); + std::vector CV; + if (MVT::isFloatingPoint(VT)) { + for (unsigned i = 0, e = Node->getNumOperands(); i != e; ++i) { + double V = cast(Node->getOperand(i))->getValue(); + CV.push_back(ConstantFP::get(OpNTy, V)); + } + } else { + for (unsigned i = 0, e = Node->getNumOperands(); i != e; ++i) { + uint64_t V = cast(Node->getOperand(i))->getValue(); + CV.push_back(ConstantUInt::get(OpNTy, V)); + } + } + Constant *CP = ConstantPacked::get(CV); + SDOperand CPIdx = DAG.getConstantPool(CP, TLI.getPointerTy()); + Result = DAG.getLoad(VT, DAG.getEntryNode(), CPIdx, + DAG.getSrcValue(NULL)); + break; } - Constant *CP = ConstantPacked::get(CV); - SDOperand CPIdx = DAG.getConstantPool(CP, TLI.getPointerTy()); - Result = DAG.getLoad(VT, DAG.getEntryNode(), CPIdx, DAG.getSrcValue(NULL)); break; - } case ISD::TokenFactor: if (Node->getNumOperands() == 2) { Tmp1 = LegalizeOp(Node->getOperand(0)); From lattner at cs.uiuc.edu Sun Jan 29 00:44:34 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Sun, 29 Jan 2006 00:44:34 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp X86InstrInfo.td Message-ID: <200601290644.AAA28490@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: X86ISelLowering.cpp updated: 1.63 -> 1.64 X86InstrInfo.td updated: 1.221 -> 1.222 --- Log message: The FP stack doesn't support UNDEF, ask the legalizer to legalize it instead of lying and saying we have it. --- Diffs of the changes: (+3 -5) X86ISelLowering.cpp | 4 +++- X86InstrInfo.td | 4 ---- 2 files changed, 3 insertions(+), 5 deletions(-) Index: llvm/lib/Target/X86/X86ISelLowering.cpp diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.63 llvm/lib/Target/X86/X86ISelLowering.cpp:1.64 --- llvm/lib/Target/X86/X86ISelLowering.cpp:1.63 Sun Jan 29 00:26:08 2006 +++ llvm/lib/Target/X86/X86ISelLowering.cpp Sun Jan 29 00:44:22 2006 @@ -221,7 +221,9 @@ } else { // Set up the FP register classes. addRegisterClass(MVT::f64, X86::RFPRegisterClass); - + + setOperationAction(ISD::UNDEF, MVT::f64, Expand); + if (!X86PatIsel) { setOperationAction(ISD::SINT_TO_FP, MVT::i16, Custom); setOperationAction(ISD::SINT_TO_FP, MVT::i32, Custom); Index: llvm/lib/Target/X86/X86InstrInfo.td diff -u llvm/lib/Target/X86/X86InstrInfo.td:1.221 llvm/lib/Target/X86/X86InstrInfo.td:1.222 --- llvm/lib/Target/X86/X86InstrInfo.td:1.221 Fri Jan 27 16:53:29 2006 +++ llvm/lib/Target/X86/X86InstrInfo.td Sun Jan 29 00:44:22 2006 @@ -3022,10 +3022,6 @@ def : Pat<(f64 fp64immneg0), (FpCHS (FpLD0))>, Requires<[FPStack]>; def : Pat<(f64 fp64immneg1), (FpCHS (FpLD1))>, Requires<[FPStack]>; -// RFP undef -def : Pat<(f64 (undef)), (FpLD0)>, Requires<[FPStack]>; - - //===----------------------------------------------------------------------===// // Some peepholes //===----------------------------------------------------------------------===// From lattner at cs.uiuc.edu Sun Jan 29 00:45:43 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Sun, 29 Jan 2006 00:45:43 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86ISelPattern.cpp Message-ID: <200601290645.AAA28529@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: X86ISelPattern.cpp updated: 1.202 -> 1.203 --- Log message: remove now-dead code, the legalizer takes care of this for us --- Diffs of the changes: (+1 -6) X86ISelPattern.cpp | 7 +------ 1 files changed, 1 insertion(+), 6 deletions(-) Index: llvm/lib/Target/X86/X86ISelPattern.cpp diff -u llvm/lib/Target/X86/X86ISelPattern.cpp:1.202 llvm/lib/Target/X86/X86ISelPattern.cpp:1.203 --- llvm/lib/Target/X86/X86ISelPattern.cpp:1.202 Fri Jan 27 02:10:46 2006 +++ llvm/lib/Target/X86/X86ISelPattern.cpp Sun Jan 29 00:45:31 2006 @@ -1353,12 +1353,7 @@ BuildMI(BB, Opc, 1,Result).addImm(cast(N)->getValue()); return Result; case ISD::UNDEF: - if (Node->getValueType(0) == MVT::f64) { - // FIXME: SHOULD TEACH STACKIFIER ABOUT UNDEF VALUES! - BuildMI(BB, X86::FpLD0, 0, Result); - } else { - BuildMI(BB, X86::IMPLICIT_DEF, 0, Result); - } + BuildMI(BB, X86::IMPLICIT_DEF, 0, Result); return Result; case ISD::GlobalAddress: { GlobalValue *GV = cast(N)->getGlobal(); From reid at x10sys.com Sun Jan 29 00:48:36 2006 From: reid at x10sys.com (Reid Spencer) Date: Sun, 29 Jan 2006 00:48:36 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/README.txt Message-ID: <200601290648.AAA28549@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: README.txt updated: 1.25 -> 1.26 --- Log message: Add a note about lowering llvm.memset, llvm.memcpy, and llvm.memmove to a few stores under certain conditions. --- Diffs of the changes: (+7 -0) README.txt | 7 +++++++ 1 files changed, 7 insertions(+) Index: llvm/lib/Target/X86/README.txt diff -u llvm/lib/Target/X86/README.txt:1.25 llvm/lib/Target/X86/README.txt:1.26 --- llvm/lib/Target/X86/README.txt:1.25 Fri Jan 27 16:54:32 2006 +++ llvm/lib/Target/X86/README.txt Sun Jan 29 00:48:25 2006 @@ -168,6 +168,13 @@ //===---------------------------------------------------------------------===// +For all targets, not just X86: +When llvm.memcpy, llvm.memset, or llvm.memmove are lowered, they should be +optimized to a few store instructions if the source is constant and the length +is smallish (< 8). This will greatly help some tests like Shootout/strcat.c + +//===---------------------------------------------------------------------===// + Solve this DAG isel folding deficiency: int X, Y; From lattner at cs.uiuc.edu Sun Jan 29 01:31:45 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Sun, 29 Jan 2006 01:31:45 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelLowering.cpp Message-ID: <200601290731.BAA28832@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/PowerPC: PPCISelLowering.cpp updated: 1.77 -> 1.78 --- Log message: disable this for now --- Diffs of the changes: (+2 -2) PPCISelLowering.cpp | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.77 llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.78 --- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.77 Sun Jan 29 00:32:58 2006 +++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp Sun Jan 29 01:31:33 2006 @@ -156,8 +156,8 @@ // FIXME: We don't support any ConstantVec's yet. We should custom expand // the ones we do! - setOperationAction(ISD::ConstantVec, MVT::v4f32, Expand); - setOperationAction(ISD::ConstantVec, MVT::v4i32, Expand); + //setOperationAction(ISD::ConstantVec, MVT::v4f32, Expand); + //setOperationAction(ISD::ConstantVec, MVT::v4i32, Expand); } setSetCCResultContents(ZeroOrOneSetCCResult); From lattner at cs.uiuc.edu Sun Jan 29 01:57:23 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Sun, 29 Jan 2006 01:57:23 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/SelectionDAGNodes.h Message-ID: <200601290757.BAA28975@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/CodeGen: SelectionDAGNodes.h updated: 1.97 -> 1.98 --- Log message: remove some methods --- Diffs of the changes: (+0 -5) SelectionDAGNodes.h | 5 ----- 1 files changed, 5 deletions(-) Index: llvm/include/llvm/CodeGen/SelectionDAGNodes.h diff -u llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.97 llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.98 --- llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.97 Sun Jan 29 00:24:40 2006 +++ llvm/include/llvm/CodeGen/SelectionDAGNodes.h Sun Jan 29 01:57:11 2006 @@ -658,11 +658,6 @@ static bool classof(const SDNode *) { return true; } - - /// setAdjCallChain - This method should only be used by the legalizer. - void setAdjCallChain(SDOperand N); - void setAdjCallFlag(SDOperand N); - protected: friend class SelectionDAG; From lattner at cs.uiuc.edu Sun Jan 29 01:58:27 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Sun, 29 Jan 2006 01:58:27 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp SelectionDAG.cpp Message-ID: <200601290758.BAA29034@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/SelectionDAG: LegalizeDAG.cpp updated: 1.292 -> 1.293 SelectionDAG.cpp updated: 1.249 -> 1.250 --- Log message: Remove some special case hacks for CALLSEQ_*, using UpdateNodeOperands instead. --- Diffs of the changes: (+27 -60) LegalizeDAG.cpp | 37 +++++++++++++++++++++---------------- SelectionDAG.cpp | 50 ++++++-------------------------------------------- 2 files changed, 27 insertions(+), 60 deletions(-) Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.292 llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.293 --- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.292 Sun Jan 29 00:34:16 2006 +++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Sun Jan 29 01:58:15 2006 @@ -589,22 +589,24 @@ case ISD::CALLSEQ_START: case ISD::CALLSEQ_END: Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain. - // Do not try to legalize the target-specific arguments (#1+) - Tmp2 = Node->getOperand(0); - if (Tmp1 != Tmp2) - Node->setAdjCallChain(Tmp1); - - // If this has a flag input, do legalize it. - if (Node->getOperand(Node->getNumOperands()-1).getValueType() == MVT::Flag){ - Tmp1 = LegalizeOp(Node->getOperand(Node->getNumOperands()-1)); - if (Tmp1 != Node->getOperand(Node->getNumOperands()-1)) - Node->setAdjCallFlag(Tmp1); + // Do not try to legalize the target-specific arguments (#1+), except for + // an optional flag input. + if (Node->getOperand(Node->getNumOperands()-1).getValueType() != MVT::Flag){ + if (Tmp1 != Node->getOperand(0)) { + std::vector Ops(Node->op_begin(), Node->op_end()); + Ops[0] = Tmp1; + Result = DAG.UpdateNodeOperands(Result, Ops); + } + } else { + Tmp2 = LegalizeOp(Node->getOperand(Node->getNumOperands()-1)); + if (Tmp1 != Node->getOperand(0) || + Tmp2 != Node->getOperand(Node->getNumOperands()-1)) { + std::vector Ops(Node->op_begin(), Node->op_end()); + Ops[0] = Tmp1; + Ops.back() = Tmp2; + Result = DAG.UpdateNodeOperands(Result, Ops); + } } - - // Note that we do not create new CALLSEQ_DOWN/UP nodes here. These - // nodes are treated specially and are mutated in place. This makes the dag - // legalization process more efficient and also makes libcall insertion - // easier. break; case ISD::DYNAMIC_STACKALLOC: { Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain. @@ -2964,7 +2966,10 @@ SDOperand InToken = DAG.getNode(ISD::TokenFactor, MVT::Other, CallResult, OutChain->getOperand(0)); // Change the node to refer to the new token. - OutChain->setAdjCallChain(InToken); + std::vector Ops(OutChain->op_begin(), OutChain->op_end()); + Ops[0] = InToken; + SDOperand Res = DAG.UpdateNodeOperands(SDOperand(OutChain, 0), Ops); + assert(Res.Val == OutChain && "Didn't update in place!"); } Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.249 llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.250 --- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.249 Sun Jan 29 00:26:56 2006 +++ llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Sun Jan 29 01:58:15 2006 @@ -380,9 +380,7 @@ // flag result (which cannot be CSE'd) or is one of the special cases that are // not subject to CSE. if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag && - N->getOpcode() != ISD::CALLSEQ_START && - N->getOpcode() != ISD::CALLSEQ_END && !N->isTargetOpcode()) { - + !N->isTargetOpcode()) { N->dump(); assert(0 && "Node is not in map!"); } @@ -396,9 +394,7 @@ /// SDNode *SelectionDAG::AddNonLeafNodeToCSEMaps(SDNode *N) { assert(N->getNumOperands() && "This is a leaf node!"); - if (N->getOpcode() == ISD::CALLSEQ_START || - N->getOpcode() == ISD::CALLSEQ_END || - N->getOpcode() == ISD::HANDLENODE || N->getValueType(0) == MVT::Flag) + if (N->getOpcode() == ISD::HANDLENODE || N->getValueType(0) == MVT::Flag) return 0; // Never add these nodes. // Check that remaining values produced are not flags. @@ -451,9 +447,7 @@ /// return null, otherwise return a pointer to the slot it would take. If a /// node already exists with these operands, the slot will be non-null. SDNode **SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDOperand Op) { - if (N->getOpcode() == ISD::CALLSEQ_START || - N->getOpcode() == ISD::CALLSEQ_END || - N->getOpcode() == ISD::HANDLENODE || N->getValueType(0) == MVT::Flag) + if (N->getOpcode() == ISD::HANDLENODE || N->getValueType(0) == MVT::Flag) return 0; // Never add these nodes. // Check that remaining values produced are not flags. @@ -481,9 +475,7 @@ /// node already exists with these operands, the slot will be non-null. SDNode **SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDOperand Op1, SDOperand Op2) { - if (N->getOpcode() == ISD::CALLSEQ_START || - N->getOpcode() == ISD::CALLSEQ_END || - N->getOpcode() == ISD::HANDLENODE || N->getValueType(0) == MVT::Flag) + if (N->getOpcode() == ISD::HANDLENODE || N->getValueType(0) == MVT::Flag) return 0; // Never add these nodes. // Check that remaining values produced are not flags. @@ -512,9 +504,7 @@ /// node already exists with these operands, the slot will be non-null. SDNode **SelectionDAG::FindModifiedNodeSlot(SDNode *N, const std::vector &Ops) { - if (N->getOpcode() == ISD::CALLSEQ_START || - N->getOpcode() == ISD::CALLSEQ_END || - N->getOpcode() == ISD::HANDLENODE || N->getValueType(0) == MVT::Flag) + if (N->getOpcode() == ISD::HANDLENODE || N->getValueType(0) == MVT::Flag) return 0; // Never add these nodes. // Check that remaining values produced are not flags. @@ -1296,8 +1286,7 @@ // Memoize this node if possible. SDNode *N; - if (Opcode != ISD::CALLSEQ_START && Opcode != ISD::CALLSEQ_END && - VT != MVT::Flag) { + if (VT != MVT::Flag) { SDNode *&BON = BinaryOps[std::make_pair(Opcode, std::make_pair(N1, N2))]; if (BON) return SDOperand(BON, 0); @@ -1387,33 +1376,6 @@ return getNode(Opcode, VT, Ops); } -// setAdjCallChain - This method changes the token chain of an -// CALLSEQ_START/END node to be the specified operand. -void SDNode::setAdjCallChain(SDOperand N) { - assert(N.getValueType() == MVT::Other); - assert((getOpcode() == ISD::CALLSEQ_START || - getOpcode() == ISD::CALLSEQ_END) && "Cannot adjust this node!"); - - OperandList[0].Val->removeUser(this); - OperandList[0] = N; - OperandList[0].Val->Uses.push_back(this); -} - -// setAdjCallFlag - This method changes the flag input of an -// CALLSEQ_START/END node to be the specified operand. -void SDNode::setAdjCallFlag(SDOperand N) { - assert(N.getValueType() == MVT::Flag); - assert((getOpcode() == ISD::CALLSEQ_START || - getOpcode() == ISD::CALLSEQ_END) && "Cannot adjust this node!"); - - SDOperand &FlagOp = OperandList[getNumOperands()-1]; - assert(FlagOp.getValueType() == MVT::Flag); - FlagOp.Val->removeUser(this); - FlagOp = N; - FlagOp.Val->Uses.push_back(this); -} - - SDOperand SelectionDAG::getLoad(MVT::ValueType VT, SDOperand Chain, SDOperand Ptr, SDOperand SV) { From lattner at cs.uiuc.edu Sun Jan 29 01:59:49 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Sun, 29 Jan 2006 01:59:49 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/LiveIntervalAnalysis.h Message-ID: <200601290759.BAA29172@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/CodeGen: LiveIntervalAnalysis.h updated: 1.49 -> 1.50 --- Log message: revert an accidental commit --- Diffs of the changes: (+1 -5) LiveIntervalAnalysis.h | 6 +----- 1 files changed, 1 insertion(+), 5 deletions(-) Index: llvm/include/llvm/CodeGen/LiveIntervalAnalysis.h diff -u llvm/include/llvm/CodeGen/LiveIntervalAnalysis.h:1.49 llvm/include/llvm/CodeGen/LiveIntervalAnalysis.h:1.50 --- llvm/include/llvm/CodeGen/LiveIntervalAnalysis.h:1.49 Sun Jan 29 00:24:40 2006 +++ llvm/include/llvm/CodeGen/LiveIntervalAnalysis.h Sun Jan 29 01:59:37 2006 @@ -148,9 +148,7 @@ /// handleVirtualRegisterDef) void handleRegisterDef(MachineBasicBlock* mbb, MachineBasicBlock::iterator mi, - unsigned reg, - std::map, - unsigned> &PhysRegValueMap); + unsigned reg); /// handleVirtualRegisterDef - update intervals for a virtual /// register def @@ -167,8 +165,6 @@ MachineBasicBlock::iterator mi, LiveInterval& interval, unsigned SrcReg, unsigned DestReg, - std::map, - unsigned> *PhysRegValueMap, bool isLiveIn = false); /// Return true if the two specified registers belong to different From lattner at cs.uiuc.edu Sun Jan 29 02:40:49 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Sun, 29 Jan 2006 02:40:49 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/Target/TargetLowering.h Message-ID: <200601290840.CAA06810@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/Target: TargetLowering.h updated: 1.41 -> 1.42 --- Log message: Clean up the interface to ValueTypeActions, allowing Legalize to use a copy of it more cleanly. Double the size of OpActions, allowing it to hold actions for any VT. --- Diffs of the changes: (+36 -11) TargetLowering.h | 47 ++++++++++++++++++++++++++++++++++++----------- 1 files changed, 36 insertions(+), 11 deletions(-) Index: llvm/include/llvm/Target/TargetLowering.h diff -u llvm/include/llvm/Target/TargetLowering.h:1.41 llvm/include/llvm/Target/TargetLowering.h:1.42 --- llvm/include/llvm/Target/TargetLowering.h:1.41 Fri Jan 27 21:43:33 2006 +++ llvm/include/llvm/Target/TargetLowering.h Sun Jan 29 02:40:37 2006 @@ -127,14 +127,41 @@ return RegClassForVT[VT] != 0; } + class ValueTypeActionImpl { + /// ValueTypeActions - This is a bitvector that contains two bits for each + /// value type, where the two bits correspond to the LegalizeAction enum. + /// This can be queried with "getTypeAction(VT)". + uint32_t ValueTypeActions[2]; + public: + ValueTypeActionImpl() { + ValueTypeActions[0] = ValueTypeActions[1] = 0; + } + ValueTypeActionImpl(const ValueTypeActionImpl &RHS) { + ValueTypeActions[0] = RHS.ValueTypeActions[0]; + ValueTypeActions[1] = RHS.ValueTypeActions[1]; + } + + LegalizeAction getTypeAction(MVT::ValueType VT) const { + return (LegalizeAction)((ValueTypeActions[VT>>4] >> ((2*VT) & 31)) & 3); + } + void setTypeAction(MVT::ValueType VT, LegalizeAction Action) { + assert(unsigned(VT >> 4) < + sizeof(ValueTypeActions)/sizeof(ValueTypeActions[0])); + ValueTypeActions[VT>>4] |= Action << ((VT*2) & 31); + } + }; + + const ValueTypeActionImpl &getValueTypeActions() const { + return ValueTypeActions; + } + /// getTypeAction - Return how we should legalize values of this type, either /// it is already legal (return 'Legal') or we need to promote it to a larger /// type (return 'Promote'), or we need to expand it into multiple registers /// of smaller integer type (return 'Expand'). 'Custom' is not an option. LegalizeAction getTypeAction(MVT::ValueType VT) const { - return (LegalizeAction)((ValueTypeActions >> (2*VT)) & 3); + return ValueTypeActions.getTypeAction(VT); } - unsigned long long getValueTypeActions() const { return ValueTypeActions; } /// getTypeToTransformTo - For types supported by the target, this is an /// identity function. For types that must be promoted to larger types, this @@ -236,8 +263,9 @@ /// such replacements don't generate code that causes an alignment error /// (trap) on the target machine. /// @brief Determine if the target supports unaligned memory accesses. - bool allowsUnalignedMemoryAccesses() const - { return allowUnalignedMemoryAccesses; } + bool allowsUnalignedMemoryAccesses() const { + return allowUnalignedMemoryAccesses; + } /// usesUnderscoreSetJmpLongJmp - Determine if we should use _setjmp or setjmp /// to implement llvm.setjmp. @@ -327,7 +355,7 @@ /// with the specified type and indicate what to do about it. void setOperationAction(unsigned Op, MVT::ValueType VT, LegalizeAction Action) { - assert(VT < 16 && Op < sizeof(OpActions)/sizeof(OpActions[0]) && + assert(VT < 32 && Op < sizeof(OpActions)/sizeof(OpActions[0]) && "Table isn't big enough!"); OpActions[Op] |= Action << VT*2; } @@ -473,11 +501,6 @@ TargetRegisterClass *RegClassForVT[MVT::LAST_VALUETYPE]; unsigned char NumElementsForVT[MVT::LAST_VALUETYPE]; - /// ValueTypeActions - This is a bitvector that contains two bits for each - /// value type, where the two bits correspond to the LegalizeAction enum. - /// This can be queried with "getTypeAction(VT)". - unsigned long long ValueTypeActions; - /// TransformToType - For any value types we are promoting or expanding, this /// contains the value type that we are changing to. For Expanded types, this /// contains one step of the expand (e.g. i64 -> i32), even if there are @@ -490,7 +513,9 @@ /// Most operations are Legal (aka, supported natively by the target), but /// operations that are not should be described. Note that operations on /// non-legal value types are not described here. - unsigned OpActions[128]; + uint64_t OpActions[128]; + + ValueTypeActionImpl ValueTypeActions; std::vector LegalFPImmediates; From lattner at cs.uiuc.edu Sun Jan 29 02:41:23 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Sun, 29 Jan 2006 02:41:23 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/TargetLowering.cpp Message-ID: <200601290841.CAA06867@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target: TargetLowering.cpp updated: 1.21 -> 1.22 --- Log message: clean up interface to ValueTypeActions --- Diffs of the changes: (+3 -3) TargetLowering.cpp | 6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-) Index: llvm/lib/Target/TargetLowering.cpp diff -u llvm/lib/Target/TargetLowering.cpp:1.21 llvm/lib/Target/TargetLowering.cpp:1.22 --- llvm/lib/Target/TargetLowering.cpp:1.21 Thu Jan 26 14:37:03 2006 +++ llvm/lib/Target/TargetLowering.cpp Sun Jan 29 02:41:12 2006 @@ -19,7 +19,7 @@ using namespace llvm; TargetLowering::TargetLowering(TargetMachine &tm) - : TM(tm), TD(TM.getTargetData()), ValueTypeActions(0) { + : TM(tm), TD(TM.getTargetData()) { assert(ISD::BUILTIN_OP_END <= 128 && "Fixed size array in TargetLowering is not large enough!"); // All operations default to being supported. @@ -46,8 +46,8 @@ TargetLowering::LegalizeAction Action, TargetLowering &TLI, MVT::ValueType *TransformToType, - unsigned long long &ValueTypeActions) { - ValueTypeActions |= (unsigned long long)Action << (VT*2); + TargetLowering::ValueTypeActionImpl &ValueTypeActions) { + ValueTypeActions.setTypeAction(VT, Action); if (Action == TargetLowering::Promote) { MVT::ValueType PromoteTo; if (VT == MVT::f32) From lattner at cs.uiuc.edu Sun Jan 29 02:41:49 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Sun, 29 Jan 2006 02:41:49 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelLowering.cpp Message-ID: <200601290841.CAA06923@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/PowerPC: PPCISelLowering.cpp updated: 1.78 -> 1.79 --- Log message: Now that OpActions is big enough, we can specify actions for vector types --- Diffs of the changes: (+2 -2) PPCISelLowering.cpp | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.78 llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.79 --- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.78 Sun Jan 29 01:31:33 2006 +++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp Sun Jan 29 02:41:37 2006 @@ -156,8 +156,8 @@ // FIXME: We don't support any ConstantVec's yet. We should custom expand // the ones we do! - //setOperationAction(ISD::ConstantVec, MVT::v4f32, Expand); - //setOperationAction(ISD::ConstantVec, MVT::v4i32, Expand); + setOperationAction(ISD::ConstantVec, MVT::v4f32, Expand); + setOperationAction(ISD::ConstantVec, MVT::v4i32, Expand); } setSetCCResultContents(ZeroOrOneSetCCResult); From lattner at cs.uiuc.edu Sun Jan 29 02:42:18 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Sun, 29 Jan 2006 02:42:18 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Message-ID: <200601290842.CAA06984@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/SelectionDAG: LegalizeDAG.cpp updated: 1.293 -> 1.294 --- Log message: cleanups to the ValueTypeActions interface --- Diffs of the changes: (+5 -7) LegalizeDAG.cpp | 12 +++++------- 1 files changed, 5 insertions(+), 7 deletions(-) Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.293 llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.294 --- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.293 Sun Jan 29 01:58:15 2006 +++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Sun Jan 29 02:42:06 2006 @@ -41,18 +41,16 @@ TargetLowering &TLI; SelectionDAG &DAG; - /// LegalizeAction - This enum indicates what action we should take for each - /// value type the can occur in the program. enum LegalizeAction { - Legal, // The target natively supports this value type. - Promote, // This should be promoted to the next larger type. - Expand, // This integer type should be broken into smaller pieces. + Legal, // The target natively supports this operation. + Promote, // This operation should be executed in a larger type. + Expand, // Try to expand this to other ops, otherwise use a libcall. }; /// ValueTypeActions - This is a bitvector that contains two bits for each /// value type, where the two bits correspond to the LegalizeAction enum. /// This can be queried with "getTypeAction(VT)". - unsigned long long ValueTypeActions; + TargetLowering::ValueTypeActionImpl ValueTypeActions; /// LegalizedNodes - For nodes that are of legal width, and that have more /// than one use, this map indicates what regularized operand to use. This @@ -91,7 +89,7 @@ /// it is already legal or we need to expand it into multiple registers of /// smaller integer type, or we need to promote it to a larger type. LegalizeAction getTypeAction(MVT::ValueType VT) const { - return (LegalizeAction)((ValueTypeActions >> (2*VT)) & 3); + return (LegalizeAction)ValueTypeActions.getTypeAction(VT); } /// isTypeLegal - Return true if this type is legal on this target. From lattner at cs.uiuc.edu Sun Jan 29 03:08:29 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Sun, 29 Jan 2006 03:08:29 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/README.txt Message-ID: <200601290908.DAA26879@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: README.txt updated: 1.26 -> 1.27 --- Log message: add a missed optimization --- Diffs of the changes: (+10 -0) README.txt | 10 ++++++++++ 1 files changed, 10 insertions(+) Index: llvm/lib/Target/X86/README.txt diff -u llvm/lib/Target/X86/README.txt:1.26 llvm/lib/Target/X86/README.txt:1.27 --- llvm/lib/Target/X86/README.txt:1.26 Sun Jan 29 00:48:25 2006 +++ llvm/lib/Target/X86/README.txt Sun Jan 29 03:08:15 2006 @@ -204,3 +204,13 @@ disambiguate the pointers. Number 1 is the preferred solution. + +//===---------------------------------------------------------------------===// + +The instruction selector sometimes misses folding a load into a compare. The +pattern is written as (cmp reg, (load p)). Because the compare isn't +commutative, it is not matched with the load on both sides. The dag combiner +should be made smart enough to cannonicalize the load into the RHS of a compare +when it can invert the result of the compare for free. + + From lattner at cs.uiuc.edu Sun Jan 29 03:15:00 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Sun, 29 Jan 2006 03:15:00 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/README.txt Message-ID: <200601290915.DAA29489@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: README.txt updated: 1.27 -> 1.28 --- Log message: add a high-priority SSE issue from sgefa --- Diffs of the changes: (+34 -0) README.txt | 34 ++++++++++++++++++++++++++++++++++ 1 files changed, 34 insertions(+) Index: llvm/lib/Target/X86/README.txt diff -u llvm/lib/Target/X86/README.txt:1.27 llvm/lib/Target/X86/README.txt:1.28 --- llvm/lib/Target/X86/README.txt:1.27 Sun Jan 29 03:08:15 2006 +++ llvm/lib/Target/X86/README.txt Sun Jan 29 03:14:47 2006 @@ -213,4 +213,38 @@ should be made smart enough to cannonicalize the load into the RHS of a compare when it can invert the result of the compare for free. +//===---------------------------------------------------------------------===// + +The code generated for 'abs' is truly aweful: + +float %foo(float %tmp.38) { + %tmp.39 = setgt float %tmp.38, 0.000000e+00 + %tmp.45 = sub float -0.000000e+00, %tmp.38 + %mem_tmp.0.0 = select bool %tmp.39, float %tmp.38, float %tmp.45 + ret float %mem_tmp.0.0 +} + +_foo: + subl $4, %esp + movss LCPI1_0, %xmm0 + movss 8(%esp), %xmm1 + subss %xmm1, %xmm0 + xorps %xmm2, %xmm2 + ucomiss %xmm2, %xmm1 + setp %al + seta %cl + orb %cl, %al + testb %al, %al + jne LBB_foo_2 # +LBB_foo_1: # + movss %xmm0, %xmm1 +LBB_foo_2: # + movss %xmm1, (%esp) + flds (%esp) + addl $4, %esp + ret + +This should be a high-priority to fix. With the fp-stack, this is a single +instruction. With SSE it could be far better than this. Why is the sequence +above using 'setp'? It shouldn't care about nan's. From lattner at cs.uiuc.edu Sun Jan 29 03:42:33 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Sun, 29 Jan 2006 03:42:33 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/README.txt Message-ID: <200601290942.DAA30099@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: README.txt updated: 1.28 -> 1.29 --- Log message: add some performance notes from looking at sgefa --- Diffs of the changes: (+34 -0) README.txt | 34 ++++++++++++++++++++++++++++++++++ 1 files changed, 34 insertions(+) Index: llvm/lib/Target/X86/README.txt diff -u llvm/lib/Target/X86/README.txt:1.28 llvm/lib/Target/X86/README.txt:1.29 --- llvm/lib/Target/X86/README.txt:1.28 Sun Jan 29 03:14:47 2006 +++ llvm/lib/Target/X86/README.txt Sun Jan 29 03:42:20 2006 @@ -248,3 +248,37 @@ instruction. With SSE it could be far better than this. Why is the sequence above using 'setp'? It shouldn't care about nan's. +//===---------------------------------------------------------------------===// + +Is there a better way to implement Y = -X (fneg) than the literal code: + +float %test(float %X) { + %Y = sub float -0.0, %X + ret float %Y +} + + movss LCPI1_0, %xmm0 ;; load -0.0 + subss 8(%esp), %xmm0 ;; subtract + +//===---------------------------------------------------------------------===// + +None of the SSE instructions are handled in X86RegisterInfo::foldMemoryOperand, +which prevents the spiller from folding spill code into the instructions. + +This leads to code like this: + +mov %eax, 8(%esp) +cvtsi2sd %eax, %xmm0 +instead of: +cvtsi2sd 8(%esp), %xmm0 + +//===---------------------------------------------------------------------===// + +This instruction selector selects 'int X = 0' as 'mov Reg, 0' not 'xor Reg,Reg' +This is bigger and slower. + +//===---------------------------------------------------------------------===// + +LSR should be turned on for the X86 backend and tuned to take advantage of its +addressing modes. + From lattner at cs.uiuc.edu Sun Jan 29 03:46:18 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Sun, 29 Jan 2006 03:46:18 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/README.txt Message-ID: <200601290946.DAA30915@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: README.txt updated: 1.29 -> 1.30 --- Log message: add another note --- Diffs of the changes: (+4 -0) README.txt | 4 ++++ 1 files changed, 4 insertions(+) Index: llvm/lib/Target/X86/README.txt diff -u llvm/lib/Target/X86/README.txt:1.29 llvm/lib/Target/X86/README.txt:1.30 --- llvm/lib/Target/X86/README.txt:1.29 Sun Jan 29 03:42:20 2006 +++ llvm/lib/Target/X86/README.txt Sun Jan 29 03:46:06 2006 @@ -282,3 +282,7 @@ LSR should be turned on for the X86 backend and tuned to take advantage of its addressing modes. +//===---------------------------------------------------------------------===// + +When compiled with unsafemath enabled, "main" should enable SSE DAZ mode and +other fast SSE modes. From jlaskey at apple.com Sun Jan 29 03:52:23 2006 From: jlaskey at apple.com (Jim Laskey) Date: Sun, 29 Jan 2006 03:52:23 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineDebugInfo.h Message-ID: <200601290952.DAA01305@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/CodeGen: MachineDebugInfo.h updated: 1.9 -> 1.10 --- Log message: Remove extra qualifier. --- Diffs of the changes: (+1 -1) MachineDebugInfo.h | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/include/llvm/CodeGen/MachineDebugInfo.h diff -u llvm/include/llvm/CodeGen/MachineDebugInfo.h:1.9 llvm/include/llvm/CodeGen/MachineDebugInfo.h:1.10 --- llvm/include/llvm/CodeGen/MachineDebugInfo.h:1.9 Fri Jan 27 09:20:54 2006 +++ llvm/include/llvm/CodeGen/MachineDebugInfo.h Sun Jan 29 03:52:11 2006 @@ -296,7 +296,7 @@ /// SetupCompileUnits - Set up the unique vector of compile units. /// - void MachineDebugInfo::SetupCompileUnits(Module &M); + void SetupCompileUnits(Module &M); /// getCompileUnits - Return a vector of debug compile units. /// From lattner at cs.uiuc.edu Sun Jan 29 14:01:47 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Sun, 29 Jan 2006 14:01:47 -0600 Subject: [llvm-commits] CVS: llvm/utils/TableGen/DAGISelEmitter.cpp Message-ID: <200601292001.OAA17106@zion.cs.uiuc.edu> Changes in directory llvm/utils/TableGen: DAGISelEmitter.cpp updated: 1.157 -> 1.158 --- Log message: simplify some code --- Diffs of the changes: (+7 -10) DAGISelEmitter.cpp | 17 +++++++---------- 1 files changed, 7 insertions(+), 10 deletions(-) Index: llvm/utils/TableGen/DAGISelEmitter.cpp diff -u llvm/utils/TableGen/DAGISelEmitter.cpp:1.157 llvm/utils/TableGen/DAGISelEmitter.cpp:1.158 --- llvm/utils/TableGen/DAGISelEmitter.cpp:1.157 Sat Jan 28 23:22:37 2006 +++ llvm/utils/TableGen/DAGISelEmitter.cpp Sun Jan 29 14:01:35 2006 @@ -2069,20 +2069,17 @@ unsigned ResNo = TmpNo++; unsigned NumRes = 1; if (!N->isLeaf() && N->getOperator()->getName() == "imm") { - const char* CastType; assert(N->getExtTypes().size() == 1 && "Multiple types not handled!"); - const char *Code; + std::string CastType; switch (N->getTypeNum(0)) { default: assert(0 && "Unknown type for constant node!"); - case MVT::i1: CastType = "bool"; Code = "bool Tmp"; break; - case MVT::i8: - CastType = "unsigned char"; Code = "unsigned char Tmp"; break; - case MVT::i16: - CastType = "unsigned short"; Code = "unsigned short Tmp"; break; - case MVT::i32: CastType = "unsigned"; Code = "unsigned Tmp"; break; - case MVT::i64: CastType = "uint64_t"; Code = "uint64_t Tmp"; break; + case MVT::i1: CastType = "bool"; break; + case MVT::i8: CastType = "unsigned char"; break; + case MVT::i16: CastType = "unsigned short"; break; + case MVT::i32: CastType = "unsigned"; break; + case MVT::i64: CastType = "uint64_t"; break; } - emitCode(Code + utostr(ResNo) + "C = (" + CastType + + emitCode(CastType + " Tmp" + utostr(ResNo) + "C = (" + CastType + ")cast(" + Val + ")->getValue();"); emitCode("SDOperand Tmp" + utostr(ResNo) + " = CurDAG->getTargetConstant(Tmp" + utostr(ResNo) + From lattner at cs.uiuc.edu Sun Jan 29 14:48:51 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Sun, 29 Jan 2006 14:48:51 -0600 Subject: [llvm-commits] CVS: llvm-test/SingleSource/UnitTests/2006-01-29-SimpleIndirectCall.c Message-ID: <200601292048.OAA17316@zion.cs.uiuc.edu> Changes in directory llvm-test/SingleSource/UnitTests: 2006-01-29-SimpleIndirectCall.c added (r1.1) --- Log message: new testcase for PR704: http://llvm.cs.uiuc.edu/PR704 --- Diffs of the changes: (+18 -0) 2006-01-29-SimpleIndirectCall.c | 18 ++++++++++++++++++ 1 files changed, 18 insertions(+) Index: llvm-test/SingleSource/UnitTests/2006-01-29-SimpleIndirectCall.c diff -c /dev/null llvm-test/SingleSource/UnitTests/2006-01-29-SimpleIndirectCall.c:1.1 *** /dev/null Sun Jan 29 14:48:49 2006 --- llvm-test/SingleSource/UnitTests/2006-01-29-SimpleIndirectCall.c Sun Jan 29 14:48:39 2006 *************** *** 0 **** --- 1,18 ---- + // PR704 + + #include + + void hello() { + printf("Hello, world!\n"); + } + + void goodbye() { + printf("Goodbye, world!\n"); + } + + int main(int argc, char **argv) { + void (*f)() = (argc > 1) ? &hello : &goodbye; + f(); + return 0; + } + From lattner at cs.uiuc.edu Sun Jan 29 14:49:29 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Sun, 29 Jan 2006 14:49:29 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCCodeEmitter.cpp PPCISelLowering.cpp Message-ID: <200601292049.OAA17332@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/PowerPC: PPCCodeEmitter.cpp updated: 1.44 -> 1.45 PPCISelLowering.cpp updated: 1.79 -> 1.80 --- Log message: Functions that are lazily streamed in from the .bc file are *not* external. This fixes llvm-test/SingleSource/UnitTests/2006-01-29-SimpleIndirectCall.c and PR704: http://llvm.cs.uiuc.edu/PR704 --- Diffs of the changes: (+4 -2) PPCCodeEmitter.cpp | 3 ++- PPCISelLowering.cpp | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-) Index: llvm/lib/Target/PowerPC/PPCCodeEmitter.cpp diff -u llvm/lib/Target/PowerPC/PPCCodeEmitter.cpp:1.44 llvm/lib/Target/PowerPC/PPCCodeEmitter.cpp:1.45 --- llvm/lib/Target/PowerPC/PPCCodeEmitter.cpp:1.44 Sun Jan 22 16:53:01 2006 +++ llvm/lib/Target/PowerPC/PPCCodeEmitter.cpp Sun Jan 29 14:49:17 2006 @@ -196,7 +196,8 @@ bool isExternal = MO.isExternalSymbol() || MO.getGlobal()->hasWeakLinkage() || MO.getGlobal()->hasLinkOnceLinkage() || - MO.getGlobal()->isExternal(); + (MO.getGlobal()->isExternal() && + !MO.getGlobal()->hasNotBeenReadFromBytecode()); unsigned Reloc = 0; if (MI.getOpcode() == PPC::BL) Reloc = PPC::reloc_pcrel_bx; Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.79 llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.80 --- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.79 Sun Jan 29 02:41:37 2006 +++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp Sun Jan 29 14:49:17 2006 @@ -437,7 +437,8 @@ SDOperand Lo = DAG.getNode(PPCISD::Lo, MVT::i32, GA, Zero); Lo = DAG.getNode(ISD::ADD, MVT::i32, Hi, Lo); - if (!GV->hasWeakLinkage() && !GV->hasLinkOnceLinkage() && !GV->isExternal()) + if (!GV->hasWeakLinkage() && !GV->hasLinkOnceLinkage() && + (!GV->isExternal() || GV->hasNotBeenReadFromBytecode())) return Lo; // If the global is weak or external, we have to go through the lazy From lattner at cs.uiuc.edu Sun Jan 29 15:02:35 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Sun, 29 Jan 2006 15:02:35 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Message-ID: <200601292102.PAA17497@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/SelectionDAG: LegalizeDAG.cpp updated: 1.294 -> 1.295 --- Log message: Fix RET of promoted values on targets that custom expand RET to a target node. --- Diffs of the changes: (+9 -8) LegalizeDAG.cpp | 17 +++++++++-------- 1 files changed, 9 insertions(+), 8 deletions(-) Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.294 llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.295 --- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.294 Sun Jan 29 02:42:06 2006 +++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Sun Jan 29 15:02:23 2006 @@ -1056,14 +1056,15 @@ } } - switch (TLI.getOperationAction(Node->getOpcode(), - Node->getValueType(0))) { - default: assert(0 && "This action is not supported yet!"); - case TargetLowering::Legal: break; - case TargetLowering::Custom: - Tmp1 = TLI.LowerOperation(Result, DAG); - if (Tmp1.Val) Result = Tmp1; - break; + if (Result.getOpcode() == ISD::RET) { + switch (TLI.getOperationAction(Result.getOpcode(), MVT::Other)) { + default: assert(0 && "This action is not supported yet!"); + case TargetLowering::Legal: break; + case TargetLowering::Custom: + Tmp1 = TLI.LowerOperation(Result, DAG); + if (Tmp1.Val) Result = Tmp1; + break; + } } break; case ISD::STORE: { From jeffc at jolt-lang.org Sun Jan 29 16:03:04 2006 From: jeffc at jolt-lang.org (Jeff Cohen) Date: Sun, 29 Jan 2006 16:03:04 -0600 Subject: [llvm-commits] CVS: llvm/lib/System/Win32/DynamicLibrary.inc Message-ID: <200601292203.QAA22987@zion.cs.uiuc.edu> Changes in directory llvm/lib/System/Win32: DynamicLibrary.inc updated: 1.12 -> 1.13 --- Log message: Fix indentation. --- Diffs of the changes: (+4 -4) DynamicLibrary.inc | 8 ++++---- 1 files changed, 4 insertions(+), 4 deletions(-) Index: llvm/lib/System/Win32/DynamicLibrary.inc diff -u llvm/lib/System/Win32/DynamicLibrary.inc:1.12 llvm/lib/System/Win32/DynamicLibrary.inc:1.13 --- llvm/lib/System/Win32/DynamicLibrary.inc:1.12 Thu May 5 17:33:09 2005 +++ llvm/lib/System/Win32/DynamicLibrary.inc Sun Jan 29 16:02:52 2006 @@ -92,12 +92,12 @@ if (filename) { HMODULE a_handle = LoadLibrary(filename); - if (a_handle == 0) - ThrowError(std::string(filename) + ": Can't open : "); + if (a_handle == 0) + ThrowError(std::string(filename) + ": Can't open : "); - OpenedHandles.push_back(a_handle); + OpenedHandles.push_back(a_handle); } else { - // When no file is specified, enumerate all DLLs and EXEs in the + // When no file is specified, enumerate all DLLs and EXEs in the // process. EnumerateLoadedModules(GetCurrentProcess(), ELM_Callback, 0); } From lattner at cs.uiuc.edu Sun Jan 29 20:04:08 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Sun, 29 Jan 2006 20:04:08 -0600 Subject: [llvm-commits] CVS: llvm/runtime/GCCLibraries/crtend/Makefile Message-ID: <200601300204.UAA24522@zion.cs.uiuc.edu> Changes in directory llvm/runtime/GCCLibraries/crtend: Makefile updated: 1.31 -> 1.32 --- Log message: fix make install/uninstall of libcrtend. --- Diffs of the changes: (+19 -0) Makefile | 19 +++++++++++++++++++ 1 files changed, 19 insertions(+) Index: llvm/runtime/GCCLibraries/crtend/Makefile diff -u llvm/runtime/GCCLibraries/crtend/Makefile:1.31 llvm/runtime/GCCLibraries/crtend/Makefile:1.32 --- llvm/runtime/GCCLibraries/crtend/Makefile:1.31 Fri Jan 27 16:06:50 2006 +++ llvm/runtime/GCCLibraries/crtend/Makefile Sun Jan 29 20:03:56 2006 @@ -59,8 +59,27 @@ all-local:: $(LibName.BCA) +ifdef BYTECODE_DESTINATION +BytecodeDestDir := $(BYTECODE_DESTINATION) +else +BytecodeDestDir := $(PROJ_libdir) +endif + +DestBytecodeLib = $(BytecodeDestDir)/lib$(LIBRARYNAME).a +install-bytecode-local:: $(DestBytecodeLib) +install-local:: $(DestBytecodeLib) + $(LibName.BCA): $(SYMBOLHACKEDOBJS) $(LibDir)/.dir $(LLVMToolDir)/llvm-ar $(Echo) Building $(BuildMode) Bytecode Archive $(notdir $@) $(Verb) $(RM) -f $@ $(Verb) $(LArchive) $@ $(SYMBOLHACKEDOBJS) +$(DestBytecodeLib): $(BytecodeDestDir) $(LibName.BCA) + $(Echo) Installing $(BuildMode) Bytecode Archive $(DestBytecodeLib) + $(Verb) $(DataInstall) $(LibName.BCA) $(DestBytecodeLib) + +uninstall-local:: + $(Echo) Uninstalling $(BuildMode) Bytecode Archive $(DestBytecodeLib) + -$(Verb) $(RM) -f $(DestBytecodeLib) + + From lattner at cs.uiuc.edu Sun Jan 29 21:48:48 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Sun, 29 Jan 2006 21:48:48 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/Target/TargetLowering.h Message-ID: <200601300348.VAA26963@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/Target: TargetLowering.h updated: 1.42 -> 1.43 --- Log message: Pass the address of the main MaskedValueIsZero function to allow recursion. --- Diffs of the changes: (+5 -3) TargetLowering.h | 8 +++++--- 1 files changed, 5 insertions(+), 3 deletions(-) Index: llvm/include/llvm/Target/TargetLowering.h diff -u llvm/include/llvm/Target/TargetLowering.h:1.42 llvm/include/llvm/Target/TargetLowering.h:1.43 --- llvm/include/llvm/Target/TargetLowering.h:1.42 Sun Jan 29 02:40:37 2006 +++ llvm/include/llvm/Target/TargetLowering.h Sun Jan 29 21:48:36 2006 @@ -414,9 +414,11 @@ /// isMaskedValueZeroForTargetNode - Return true if 'Op & Mask' is known to /// be zero. Op is expected to be a target specific node. Used by DAG - /// combiner. - virtual bool isMaskedValueZeroForTargetNode(const SDOperand &Op, - uint64_t Mask) const; + /// combiner. MVIZ is a function pointer to the main MaskedValueIsZero + /// function. + typedef bool (*MVIZFnPtr)(const SDOperand&, uint64_t, const TargetLowering &); + virtual bool isMaskedValueZeroForTargetNode(const SDOperand &Op,uint64_t Mask, + MVIZFnPtr MVIZ) const; //===--------------------------------------------------------------------===// // Inline Asm Support hooks From lattner at cs.uiuc.edu Sun Jan 29 21:49:19 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Sun, 29 Jan 2006 21:49:19 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/TargetLowering.cpp Message-ID: <200601300349.VAA27025@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target: TargetLowering.cpp updated: 1.22 -> 1.23 --- Log message: adjust prototype --- Diffs of the changes: (+2 -1) TargetLowering.cpp | 3 ++- 1 files changed, 2 insertions(+), 1 deletion(-) Index: llvm/lib/Target/TargetLowering.cpp diff -u llvm/lib/Target/TargetLowering.cpp:1.22 llvm/lib/Target/TargetLowering.cpp:1.23 --- llvm/lib/Target/TargetLowering.cpp:1.22 Sun Jan 29 02:41:12 2006 +++ llvm/lib/Target/TargetLowering.cpp Sun Jan 29 21:49:07 2006 @@ -131,7 +131,8 @@ } bool TargetLowering::isMaskedValueZeroForTargetNode(const SDOperand &Op, - uint64_t Mask) const { + uint64_t Mask, + MVIZFnPtr MVIZ) const { return false; } From lattner at cs.uiuc.edu Sun Jan 29 21:49:19 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Sun, 29 Jan 2006 21:49:19 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp X86ISelLowering.h Message-ID: <200601300349.VAA27031@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: X86ISelLowering.cpp updated: 1.64 -> 1.65 X86ISelLowering.h updated: 1.18 -> 1.19 --- Log message: adjust prototype --- Diffs of the changes: (+4 -2) X86ISelLowering.cpp | 3 ++- X86ISelLowering.h | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-) Index: llvm/lib/Target/X86/X86ISelLowering.cpp diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.64 llvm/lib/Target/X86/X86ISelLowering.cpp:1.65 --- llvm/lib/Target/X86/X86ISelLowering.cpp:1.64 Sun Jan 29 00:44:22 2006 +++ llvm/lib/Target/X86/X86ISelLowering.cpp Sun Jan 29 21:49:07 2006 @@ -1932,7 +1932,8 @@ } bool X86TargetLowering::isMaskedValueZeroForTargetNode(const SDOperand &Op, - uint64_t Mask) const { + uint64_t Mask, + MVIZFnPtr MVIZ) const { unsigned Opc = Op.getOpcode(); Index: llvm/lib/Target/X86/X86ISelLowering.h diff -u llvm/lib/Target/X86/X86ISelLowering.h:1.18 llvm/lib/Target/X86/X86ISelLowering.h:1.19 --- llvm/lib/Target/X86/X86ISelLowering.h:1.18 Fri Jan 27 15:09:22 2006 +++ llvm/lib/Target/X86/X86ISelLowering.h Sun Jan 29 21:49:07 2006 @@ -208,7 +208,8 @@ /// be zero. Op is expected to be a target specific node. Used by DAG /// combiner. virtual bool isMaskedValueZeroForTargetNode(const SDOperand &Op, - uint64_t Mask) const; + uint64_t Mask, + MVIZFnPtr MVIZ) const; SDOperand getReturnAddressFrameIndex(SelectionDAG &DAG); From lattner at cs.uiuc.edu Sun Jan 29 21:49:49 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Sun, 29 Jan 2006 21:49:49 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Message-ID: <200601300349.VAA27064@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/SelectionDAG: DAGCombiner.cpp updated: 1.88 -> 1.89 --- Log message: pass the address of MaskedValueIsZero into isMaskedValueZeroForTargetNode, to permit recursion --- Diffs of the changes: (+1 -1) DAGCombiner.cpp | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp diff -u llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.88 llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.89 --- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.88 Sun Jan 29 00:00:45 2006 +++ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Sun Jan 29 21:49:37 2006 @@ -462,7 +462,7 @@ return (Mask & (MVT::getSizeInBits(Op.getValueType())*2-1)) == 0; default: if (Op.getOpcode() >= ISD::BUILTIN_OP_END) - return TLI.isMaskedValueZeroForTargetNode(Op, Mask); + return TLI.isMaskedValueZeroForTargetNode(Op, Mask, MaskedValueIsZero); break; } return false; From lattner at cs.uiuc.edu Sun Jan 29 21:51:57 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Sun, 29 Jan 2006 21:51:57 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp Message-ID: <200601300351.VAA27126@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/SparcV8: SparcV8ISelDAGToDAG.cpp updated: 1.62 -> 1.63 --- Log message: Implement isMaskedValueZeroForTargetNode for the various v8 selectcc nodes, allowing redundant and's to be eliminated by the dag combiner. --- Diffs of the changes: (+26 -0) SparcV8ISelDAGToDAG.cpp | 26 ++++++++++++++++++++++++++ 1 files changed, 26 insertions(+) Index: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp diff -u llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.62 llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.63 --- llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.62 Fri Jan 27 17:30:03 2006 +++ llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp Sun Jan 29 21:51:45 2006 @@ -57,6 +57,14 @@ public: SparcV8TargetLowering(TargetMachine &TM); virtual SDOperand LowerOperation(SDOperand Op, SelectionDAG &DAG); + + /// isMaskedValueZeroForTargetNode - Return true if 'Op & Mask' is known to + /// be zero. Op is expected to be a target specific node. Used by DAG + /// combiner. + virtual bool isMaskedValueZeroForTargetNode(const SDOperand &Op, + uint64_t Mask, + MVIZFnPtr MVIZ) const; + virtual std::vector LowerArguments(Function &F, SelectionDAG &DAG); virtual std::pair @@ -191,6 +199,24 @@ } } +/// isMaskedValueZeroForTargetNode - Return true if 'Op & Mask' is known to +/// be zero. Op is expected to be a target specific node. Used by DAG +/// combiner. +bool SparcV8TargetLowering:: +isMaskedValueZeroForTargetNode(const SDOperand &Op, uint64_t Mask, + MVIZFnPtr MVIZ) const { + switch (Op.getOpcode()) { + default: return false; + case V8ISD::SELECT_ICC: + case V8ISD::SELECT_FCC: + assert(MVT::isInteger(Op.getValueType()) && "Not an integer select!"); + // These operations are masked zero if both the left and the right are zero. + return MVIZ(Op.getOperand(0), Mask, *this) && + MVIZ(Op.getOperand(1), Mask, *this); + } +} + + /// LowerArguments - V8 uses a very simple ABI, where all values are passed in /// either one or two GPRs, including FP values. TODO: we should pass FP values /// in FP registers for fastcc functions. From jeffc at jolt-lang.org Sun Jan 29 22:07:34 2006 From: jeffc at jolt-lang.org (Jeff Cohen) Date: Sun, 29 Jan 2006 22:07:34 -0600 Subject: [llvm-commits] CVS: llvm/win32/CodeGen/CodeGen.vcproj Message-ID: <200601300407.WAA27353@zion.cs.uiuc.edu> Changes in directory llvm/win32/CodeGen: CodeGen.vcproj updated: 1.20 -> 1.21 --- Log message: Add _CRT_SECURE_NO_DEPRECATE preprocessor symbol to make VS2005 happy. --- Diffs of the changes: (+2 -2) CodeGen.vcproj | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/win32/CodeGen/CodeGen.vcproj diff -u llvm/win32/CodeGen/CodeGen.vcproj:1.20 llvm/win32/CodeGen/CodeGen.vcproj:1.21 --- llvm/win32/CodeGen/CodeGen.vcproj:1.20 Mon Jan 23 22:40:54 2006 +++ llvm/win32/CodeGen/CodeGen.vcproj Sun Jan 29 22:07:07 2006 @@ -20,7 +20,7 @@ Name="VCCLCompilerTool" Optimization="0" AdditionalIncludeDirectories="..\..\include;.." - PreprocessorDefinitions="WIN32;_DEBUG;_LIB;__STDC_LIMIT_MACROS" + PreprocessorDefinitions="_CRT_SECURE_NO_DEPRECATE;WIN32;_DEBUG;_LIB;__STDC_LIMIT_MACROS" StringPooling="TRUE" MinimalRebuild="TRUE" BasicRuntimeChecks="3" @@ -66,7 +66,7 @@ Changes in directory llvm/win32/AsmParser: AsmParser.vcproj updated: 1.8 -> 1.9 --- Log message: Add _CRT_SECURE_NO_DEPRECATE preprocessor symbol to make VS2005 happy. --- Diffs of the changes: (+2 -2) AsmParser.vcproj | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/win32/AsmParser/AsmParser.vcproj diff -u llvm/win32/AsmParser/AsmParser.vcproj:1.8 llvm/win32/AsmParser/AsmParser.vcproj:1.9 --- llvm/win32/AsmParser/AsmParser.vcproj:1.8 Fri Dec 16 18:14:46 2005 +++ llvm/win32/AsmParser/AsmParser.vcproj Sun Jan 29 22:07:07 2006 @@ -21,7 +21,7 @@ Name="VCCLCompilerTool" Optimization="0" AdditionalIncludeDirectories="..\..\include;..;..\..\lib\AsmParser" - PreprocessorDefinitions="WIN32;_DEBUG;_LIB;__STDC_LIMIT_MACROS" + PreprocessorDefinitions="_CRT_SECURE_NO_DEPRECATE;WIN32;_DEBUG;_LIB;__STDC_LIMIT_MACROS" StringPooling="TRUE" MinimalRebuild="TRUE" BasicRuntimeChecks="3" @@ -67,7 +67,7 @@ Changes in directory llvm/win32/VMCore: VMCore.vcproj updated: 1.14 -> 1.15 --- Log message: Add _CRT_SECURE_NO_DEPRECATE preprocessor symbol to make VS2005 happy. --- Diffs of the changes: (+2 -2) VMCore.vcproj | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/win32/VMCore/VMCore.vcproj diff -u llvm/win32/VMCore/VMCore.vcproj:1.14 llvm/win32/VMCore/VMCore.vcproj:1.15 --- llvm/win32/VMCore/VMCore.vcproj:1.14 Mon Jan 23 22:40:54 2006 +++ llvm/win32/VMCore/VMCore.vcproj Sun Jan 29 22:07:07 2006 @@ -20,7 +20,7 @@ Name="VCCLCompilerTool" Optimization="0" AdditionalIncludeDirectories="..\..\include;.." - PreprocessorDefinitions="WIN32;_DEBUG;_LIB;__STDC_LIMIT_MACROS;HASH_NAMESPACE="stdext"" + PreprocessorDefinitions="_CRT_SECURE_NO_DEPRECATE;WIN32;_DEBUG;_LIB;__STDC_LIMIT_MACROS" StringPooling="TRUE" MinimalRebuild="TRUE" BasicRuntimeChecks="3" @@ -66,7 +66,7 @@ Changes in directory llvm/win32/Support: Support.vcproj updated: 1.13 -> 1.14 --- Log message: Add _CRT_SECURE_NO_DEPRECATE preprocessor symbol to make VS2005 happy. --- Diffs of the changes: (+2 -2) Support.vcproj | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/win32/Support/Support.vcproj diff -u llvm/win32/Support/Support.vcproj:1.13 llvm/win32/Support/Support.vcproj:1.14 --- llvm/win32/Support/Support.vcproj:1.13 Mon Jan 16 23:13:21 2006 +++ llvm/win32/Support/Support.vcproj Sun Jan 29 22:07:07 2006 @@ -21,7 +21,7 @@ Name="VCCLCompilerTool" Optimization="0" AdditionalIncludeDirectories="..\..\include;.." - PreprocessorDefinitions="WIN32;_DEBUG;_LIB;__STDC_LIMIT_MACROS" + PreprocessorDefinitions="_CRT_SECURE_NO_DEPRECATE;WIN32;_DEBUG;_LIB;__STDC_LIMIT_MACROS" StringPooling="TRUE" MinimalRebuild="TRUE" BasicRuntimeChecks="3" @@ -67,7 +67,7 @@ Changes in directory llvm/win32/TableGen: TableGen.vcproj updated: 1.19 -> 1.20 --- Log message: Add _CRT_SECURE_NO_DEPRECATE preprocessor symbol to make VS2005 happy. --- Diffs of the changes: (+2 -2) TableGen.vcproj | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/win32/TableGen/TableGen.vcproj diff -u llvm/win32/TableGen/TableGen.vcproj:1.19 llvm/win32/TableGen/TableGen.vcproj:1.20 --- llvm/win32/TableGen/TableGen.vcproj:1.19 Fri Dec 16 18:14:47 2005 +++ llvm/win32/TableGen/TableGen.vcproj Sun Jan 29 22:07:07 2006 @@ -20,7 +20,7 @@ Name="VCCLCompilerTool" Optimization="0" AdditionalIncludeDirectories="..\..\include;..;..\..\utils\tablegen" - PreprocessorDefinitions="WIN32;_DEBUG;_CONSOLE;__STDC_LIMIT_MACROS" + PreprocessorDefinitions="_CRT_SECURE_NO_DEPRECATE;WIN32;_DEBUG;_CONSOLE;__STDC_LIMIT_MACROS" StringPooling="TRUE" MinimalRebuild="TRUE" BasicRuntimeChecks="3" @@ -74,7 +74,7 @@ Changes in directory llvm/win32/llc: llc.vcproj updated: 1.8 -> 1.9 --- Log message: Add _CRT_SECURE_NO_DEPRECATE preprocessor symbol to make VS2005 happy. --- Diffs of the changes: (+2 -2) llc.vcproj | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/win32/llc/llc.vcproj diff -u llvm/win32/llc/llc.vcproj:1.8 llvm/win32/llc/llc.vcproj:1.9 --- llvm/win32/llc/llc.vcproj:1.8 Fri Dec 16 18:14:47 2005 +++ llvm/win32/llc/llc.vcproj Sun Jan 29 22:07:07 2006 @@ -20,7 +20,7 @@ Name="VCCLCompilerTool" Optimization="0" AdditionalIncludeDirectories="..\..\include;.." - PreprocessorDefinitions="WIN32;_DEBUG;_CONSOLE;__STDC_LIMIT_MACROS" + PreprocessorDefinitions="_CRT_SECURE_NO_DEPRECATE;WIN32;_DEBUG;_CONSOLE;__STDC_LIMIT_MACROS" StringPooling="TRUE" MinimalRebuild="TRUE" BasicRuntimeChecks="3" @@ -74,7 +74,7 @@ Changes in directory llvm/win32/Fibonacci: Fibonacci.vcproj updated: 1.10 -> 1.11 --- Log message: Add _CRT_SECURE_NO_DEPRECATE preprocessor symbol to make VS2005 happy. --- Diffs of the changes: (+2 -2) Fibonacci.vcproj | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/win32/Fibonacci/Fibonacci.vcproj diff -u llvm/win32/Fibonacci/Fibonacci.vcproj:1.10 llvm/win32/Fibonacci/Fibonacci.vcproj:1.11 --- llvm/win32/Fibonacci/Fibonacci.vcproj:1.10 Fri Dec 16 18:14:47 2005 +++ llvm/win32/Fibonacci/Fibonacci.vcproj Sun Jan 29 22:07:07 2006 @@ -21,7 +21,7 @@ Name="VCCLCompilerTool" Optimization="0" AdditionalIncludeDirectories="..\..\include;.." - PreprocessorDefinitions="WIN32;_DEBUG;_CONSOLE;__STDC_LIMIT_MACROS" + PreprocessorDefinitions="_CRT_SECURE_NO_DEPRECATE;WIN32;_DEBUG;_CONSOLE;__STDC_LIMIT_MACROS" StringPooling="TRUE" MinimalRebuild="TRUE" BasicRuntimeChecks="3" @@ -76,7 +76,7 @@ Changes in directory llvm/win32/llvm-ld: llvm-ld.vcproj updated: 1.3 -> 1.4 --- Log message: Add _CRT_SECURE_NO_DEPRECATE preprocessor symbol to make VS2005 happy. --- Diffs of the changes: (+2 -2) llvm-ld.vcproj | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/win32/llvm-ld/llvm-ld.vcproj diff -u llvm/win32/llvm-ld/llvm-ld.vcproj:1.3 llvm/win32/llvm-ld/llvm-ld.vcproj:1.4 --- llvm/win32/llvm-ld/llvm-ld.vcproj:1.3 Fri Dec 16 18:14:47 2005 +++ llvm/win32/llvm-ld/llvm-ld.vcproj Sun Jan 29 22:07:07 2006 @@ -20,7 +20,7 @@ Name="VCCLCompilerTool" Optimization="0" AdditionalIncludeDirectories="..\..\include;.." - PreprocessorDefinitions="WIN32;_DEBUG;_CONSOLE;__STDC_LIMIT_MACROS" + PreprocessorDefinitions="_CRT_SECURE_NO_DEPRECATE;WIN32;_DEBUG;_CONSOLE;__STDC_LIMIT_MACROS" StringPooling="TRUE" MinimalRebuild="TRUE" BasicRuntimeChecks="3" @@ -73,7 +73,7 @@ Changes in directory llvm/win32/llvm-prof: llvm-prof.vcproj updated: 1.3 -> 1.4 --- Log message: Add _CRT_SECURE_NO_DEPRECATE preprocessor symbol to make VS2005 happy. --- Diffs of the changes: (+2 -2) llvm-prof.vcproj | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/win32/llvm-prof/llvm-prof.vcproj diff -u llvm/win32/llvm-prof/llvm-prof.vcproj:1.3 llvm/win32/llvm-prof/llvm-prof.vcproj:1.4 --- llvm/win32/llvm-prof/llvm-prof.vcproj:1.3 Fri Dec 16 18:14:47 2005 +++ llvm/win32/llvm-prof/llvm-prof.vcproj Sun Jan 29 22:07:07 2006 @@ -20,7 +20,7 @@ Name="VCCLCompilerTool" Optimization="0" AdditionalIncludeDirectories="..\..\include;.." - PreprocessorDefinitions="WIN32;_DEBUG;_CONSOLE;__STDC_LIMIT_MACROS" + PreprocessorDefinitions="_CRT_SECURE_NO_DEPRECATE;WIN32;_DEBUG;_CONSOLE;__STDC_LIMIT_MACROS" StringPooling="TRUE" MinimalRebuild="TRUE" BasicRuntimeChecks="3" @@ -73,7 +73,7 @@ Changes in directory llvm/win32/opt: opt.vcproj updated: 1.3 -> 1.4 --- Log message: Add _CRT_SECURE_NO_DEPRECATE preprocessor symbol to make VS2005 happy. --- Diffs of the changes: (+2 -2) opt.vcproj | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/win32/opt/opt.vcproj diff -u llvm/win32/opt/opt.vcproj:1.3 llvm/win32/opt/opt.vcproj:1.4 --- llvm/win32/opt/opt.vcproj:1.3 Fri Dec 16 18:14:47 2005 +++ llvm/win32/opt/opt.vcproj Sun Jan 29 22:07:08 2006 @@ -20,7 +20,7 @@ Name="VCCLCompilerTool" Optimization="0" AdditionalIncludeDirectories="..\..\include;.." - PreprocessorDefinitions="WIN32;_DEBUG;_CONSOLE;__STDC_LIMIT_MACROS" + PreprocessorDefinitions="_CRT_SECURE_NO_DEPRECATE;WIN32;_DEBUG;_CONSOLE;__STDC_LIMIT_MACROS" StringPooling="TRUE" MinimalRebuild="TRUE" BasicRuntimeChecks="3" @@ -73,7 +73,7 @@ Changes in directory llvm/win32/x86: x86.vcproj updated: 1.18 -> 1.19 --- Log message: Add _CRT_SECURE_NO_DEPRECATE preprocessor symbol to make VS2005 happy. --- Diffs of the changes: (+2 -2) x86.vcproj | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/win32/x86/x86.vcproj diff -u llvm/win32/x86/x86.vcproj:1.18 llvm/win32/x86/x86.vcproj:1.19 --- llvm/win32/x86/x86.vcproj:1.18 Thu Jan 26 10:49:00 2006 +++ llvm/win32/x86/x86.vcproj Sun Jan 29 22:07:08 2006 @@ -21,7 +21,7 @@ Name="VCCLCompilerTool" Optimization="0" AdditionalIncludeDirectories=".;..\..\include;.." - PreprocessorDefinitions="WIN32;_DEBUG;_LIB;__STDC_LIMIT_MACROS" + PreprocessorDefinitions="_CRT_SECURE_NO_DEPRECATE;WIN32;_DEBUG;_LIB;__STDC_LIMIT_MACROS" StringPooling="TRUE" MinimalRebuild="TRUE" BasicRuntimeChecks="3" @@ -67,7 +67,7 @@ Changes in directory llvm/win32/llvm-bcanalyzer: llvm-bcanalyzer.vcproj updated: 1.3 -> 1.4 --- Log message: Add _CRT_SECURE_NO_DEPRECATE preprocessor symbol to make VS2005 happy. --- Diffs of the changes: (+2 -2) llvm-bcanalyzer.vcproj | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/win32/llvm-bcanalyzer/llvm-bcanalyzer.vcproj diff -u llvm/win32/llvm-bcanalyzer/llvm-bcanalyzer.vcproj:1.3 llvm/win32/llvm-bcanalyzer/llvm-bcanalyzer.vcproj:1.4 --- llvm/win32/llvm-bcanalyzer/llvm-bcanalyzer.vcproj:1.3 Fri Dec 16 18:14:47 2005 +++ llvm/win32/llvm-bcanalyzer/llvm-bcanalyzer.vcproj Sun Jan 29 22:07:07 2006 @@ -20,7 +20,7 @@ Name="VCCLCompilerTool" Optimization="0" AdditionalIncludeDirectories="..\..\include;.." - PreprocessorDefinitions="WIN32;_DEBUG;_CONSOLE;__STDC_LIMIT_MACROS" + PreprocessorDefinitions="_CRT_SECURE_NO_DEPRECATE;WIN32;_DEBUG;_CONSOLE;__STDC_LIMIT_MACROS" StringPooling="TRUE" MinimalRebuild="TRUE" BasicRuntimeChecks="3" @@ -73,7 +73,7 @@ Changes in directory llvm/win32/CBackend: CBackend.vcproj updated: 1.4 -> 1.5 --- Log message: Add _CRT_SECURE_NO_DEPRECATE preprocessor symbol to make VS2005 happy. --- Diffs of the changes: (+2 -2) CBackend.vcproj | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/win32/CBackend/CBackend.vcproj diff -u llvm/win32/CBackend/CBackend.vcproj:1.4 llvm/win32/CBackend/CBackend.vcproj:1.5 --- llvm/win32/CBackend/CBackend.vcproj:1.4 Fri Dec 16 18:14:46 2005 +++ llvm/win32/CBackend/CBackend.vcproj Sun Jan 29 22:07:07 2006 @@ -20,7 +20,7 @@ Name="VCCLCompilerTool" Optimization="0" AdditionalIncludeDirectories="..\..\include;.." - PreprocessorDefinitions="WIN32;_DEBUG;_LIB;__STDC_LIMIT_MACROS" + PreprocessorDefinitions="_CRT_SECURE_NO_DEPRECATE;WIN32;_DEBUG;_LIB;__STDC_LIMIT_MACROS" StringPooling="TRUE" MinimalRebuild="TRUE" BasicRuntimeChecks="3" @@ -66,7 +66,7 @@ Changes in directory llvm/win32/llvm-ranlib: llvm-ranlib.vcproj updated: 1.3 -> 1.4 --- Log message: Add _CRT_SECURE_NO_DEPRECATE preprocessor symbol to make VS2005 happy. --- Diffs of the changes: (+2 -2) llvm-ranlib.vcproj | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/win32/llvm-ranlib/llvm-ranlib.vcproj diff -u llvm/win32/llvm-ranlib/llvm-ranlib.vcproj:1.3 llvm/win32/llvm-ranlib/llvm-ranlib.vcproj:1.4 --- llvm/win32/llvm-ranlib/llvm-ranlib.vcproj:1.3 Fri Dec 16 18:14:47 2005 +++ llvm/win32/llvm-ranlib/llvm-ranlib.vcproj Sun Jan 29 22:07:08 2006 @@ -20,7 +20,7 @@ Name="VCCLCompilerTool" Optimization="0" AdditionalIncludeDirectories="..\..\include;.." - PreprocessorDefinitions="WIN32;_DEBUG;_CONSOLE;__STDC_LIMIT_MACROS" + PreprocessorDefinitions="_CRT_SECURE_NO_DEPRECATE;WIN32;_DEBUG;_CONSOLE;__STDC_LIMIT_MACROS" StringPooling="TRUE" MinimalRebuild="TRUE" BasicRuntimeChecks="3" @@ -73,7 +73,7 @@ Changes in directory llvm/win32/Target: Target.vcproj updated: 1.12 -> 1.13 --- Log message: Add _CRT_SECURE_NO_DEPRECATE preprocessor symbol to make VS2005 happy. --- Diffs of the changes: (+2 -2) Target.vcproj | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/win32/Target/Target.vcproj diff -u llvm/win32/Target/Target.vcproj:1.12 llvm/win32/Target/Target.vcproj:1.13 --- llvm/win32/Target/Target.vcproj:1.12 Fri Dec 16 18:14:47 2005 +++ llvm/win32/Target/Target.vcproj Sun Jan 29 22:07:07 2006 @@ -20,7 +20,7 @@ Name="VCCLCompilerTool" Optimization="0" AdditionalIncludeDirectories="..\..\include;.." - PreprocessorDefinitions="WIN32;_DEBUG;_LIB;__STDC_LIMIT_MACROS" + PreprocessorDefinitions="_CRT_SECURE_NO_DEPRECATE;WIN32;_DEBUG;_LIB;__STDC_LIMIT_MACROS" StringPooling="TRUE" MinimalRebuild="TRUE" BasicRuntimeChecks="3" @@ -66,7 +66,7 @@ Changes in directory llvm/win32/llvm-dis: llvm-dis.vcproj updated: 1.4 -> 1.5 --- Log message: Add _CRT_SECURE_NO_DEPRECATE preprocessor symbol to make VS2005 happy. --- Diffs of the changes: (+2 -2) llvm-dis.vcproj | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/win32/llvm-dis/llvm-dis.vcproj diff -u llvm/win32/llvm-dis/llvm-dis.vcproj:1.4 llvm/win32/llvm-dis/llvm-dis.vcproj:1.5 --- llvm/win32/llvm-dis/llvm-dis.vcproj:1.4 Fri Dec 16 18:14:47 2005 +++ llvm/win32/llvm-dis/llvm-dis.vcproj Sun Jan 29 22:07:07 2006 @@ -20,7 +20,7 @@ Name="VCCLCompilerTool" Optimization="0" AdditionalIncludeDirectories="..\..\include;.." - PreprocessorDefinitions="WIN32;_DEBUG;_CONSOLE;__STDC_LIMIT_MACROS" + PreprocessorDefinitions="_CRT_SECURE_NO_DEPRECATE;WIN32;_DEBUG;_CONSOLE;__STDC_LIMIT_MACROS" StringPooling="TRUE" MinimalRebuild="TRUE" BasicRuntimeChecks="3" @@ -73,7 +73,7 @@ Changes in directory llvm/win32/Analysis: Analysis.vcproj updated: 1.17 -> 1.18 --- Log message: Add _CRT_SECURE_NO_DEPRECATE preprocessor symbol to make VS2005 happy. --- Diffs of the changes: (+2 -2) Analysis.vcproj | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/win32/Analysis/Analysis.vcproj diff -u llvm/win32/Analysis/Analysis.vcproj:1.17 llvm/win32/Analysis/Analysis.vcproj:1.18 --- llvm/win32/Analysis/Analysis.vcproj:1.17 Sun Jan 8 12:29:44 2006 +++ llvm/win32/Analysis/Analysis.vcproj Sun Jan 29 22:07:07 2006 @@ -20,7 +20,7 @@ Name="VCCLCompilerTool" Optimization="0" AdditionalIncludeDirectories="..\..\include;.." - PreprocessorDefinitions="WIN32;_DEBUG;_LIB;__STDC_LIMIT_MACROS" + PreprocessorDefinitions="_CRT_SECURE_NO_DEPRECATE;WIN32;_DEBUG;_LIB;__STDC_LIMIT_MACROS" StringPooling="TRUE" MinimalRebuild="TRUE" BasicRuntimeChecks="3" @@ -66,7 +66,7 @@ Changes in directory llvm/win32/Configure: Configure.vcproj updated: 1.11 -> 1.12 --- Log message: Add _CRT_SECURE_NO_DEPRECATE preprocessor symbol to make VS2005 happy. --- Diffs of the changes: (+1 -1) Configure.vcproj | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/win32/Configure/Configure.vcproj diff -u llvm/win32/Configure/Configure.vcproj:1.11 llvm/win32/Configure/Configure.vcproj:1.12 --- llvm/win32/Configure/Configure.vcproj:1.11 Thu Jan 19 22:34:45 2006 +++ llvm/win32/Configure/Configure.vcproj Sun Jan 29 22:07:07 2006 @@ -20,7 +20,7 @@ Changes in directory llvm/win32/System: System.vcproj updated: 1.16 -> 1.17 --- Log message: Add _CRT_SECURE_NO_DEPRECATE preprocessor symbol to make VS2005 happy. --- Diffs of the changes: (+2 -2) System.vcproj | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/win32/System/System.vcproj diff -u llvm/win32/System/System.vcproj:1.16 llvm/win32/System/System.vcproj:1.17 --- llvm/win32/System/System.vcproj:1.16 Fri Dec 16 18:14:47 2005 +++ llvm/win32/System/System.vcproj Sun Jan 29 22:07:07 2006 @@ -21,7 +21,7 @@ Name="VCCLCompilerTool" Optimization="0" AdditionalIncludeDirectories="..\..\include;.." - PreprocessorDefinitions="WIN32;_DEBUG;_LIB;__STDC_LIMIT_MACROS" + PreprocessorDefinitions="_CRT_SECURE_NO_DEPRECATE;WIN32;_DEBUG;_LIB;__STDC_LIMIT_MACROS" StringPooling="TRUE" MinimalRebuild="TRUE" BasicRuntimeChecks="3" @@ -67,7 +67,7 @@ Changes in directory llvm/win32/Linker: Linker.vcproj updated: 1.5 -> 1.6 --- Log message: Add _CRT_SECURE_NO_DEPRECATE preprocessor symbol to make VS2005 happy. --- Diffs of the changes: (+2 -2) Linker.vcproj | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/win32/Linker/Linker.vcproj diff -u llvm/win32/Linker/Linker.vcproj:1.5 llvm/win32/Linker/Linker.vcproj:1.6 --- llvm/win32/Linker/Linker.vcproj:1.5 Fri Dec 16 18:14:47 2005 +++ llvm/win32/Linker/Linker.vcproj Sun Jan 29 22:07:07 2006 @@ -20,7 +20,7 @@ Name="VCCLCompilerTool" Optimization="0" AdditionalIncludeDirectories="..\..\include;.." - PreprocessorDefinitions="WIN32;_DEBUG;_LIB;__STDC_LIMIT_MACROS" + PreprocessorDefinitions="_CRT_SECURE_NO_DEPRECATE;WIN32;_DEBUG;_LIB;__STDC_LIMIT_MACROS" StringPooling="TRUE" MinimalRebuild="TRUE" BasicRuntimeChecks="3" @@ -66,7 +66,7 @@ Changes in directory llvm/win32/llvm-ar: llvm-ar.vcproj updated: 1.3 -> 1.4 --- Log message: Add _CRT_SECURE_NO_DEPRECATE preprocessor symbol to make VS2005 happy. --- Diffs of the changes: (+2 -2) llvm-ar.vcproj | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/win32/llvm-ar/llvm-ar.vcproj diff -u llvm/win32/llvm-ar/llvm-ar.vcproj:1.3 llvm/win32/llvm-ar/llvm-ar.vcproj:1.4 --- llvm/win32/llvm-ar/llvm-ar.vcproj:1.3 Fri Dec 16 18:14:47 2005 +++ llvm/win32/llvm-ar/llvm-ar.vcproj Sun Jan 29 22:07:07 2006 @@ -20,7 +20,7 @@ Name="VCCLCompilerTool" Optimization="0" AdditionalIncludeDirectories="..\..\include;.." - PreprocessorDefinitions="WIN32;_DEBUG;_CONSOLE;__STDC_LIMIT_MACROS" + PreprocessorDefinitions="_CRT_SECURE_NO_DEPRECATE;WIN32;_DEBUG;_CONSOLE;__STDC_LIMIT_MACROS" StringPooling="TRUE" MinimalRebuild="TRUE" BasicRuntimeChecks="3" @@ -73,7 +73,7 @@ Changes in directory llvm/win32/Transforms: Transforms.vcproj updated: 1.20 -> 1.21 --- Log message: Add _CRT_SECURE_NO_DEPRECATE preprocessor symbol to make VS2005 happy. --- Diffs of the changes: (+2 -2) Transforms.vcproj | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/win32/Transforms/Transforms.vcproj diff -u llvm/win32/Transforms/Transforms.vcproj:1.20 llvm/win32/Transforms/Transforms.vcproj:1.21 --- llvm/win32/Transforms/Transforms.vcproj:1.20 Mon Jan 16 23:13:21 2006 +++ llvm/win32/Transforms/Transforms.vcproj Sun Jan 29 22:07:07 2006 @@ -20,7 +20,7 @@ Name="VCCLCompilerTool" Optimization="0" AdditionalIncludeDirectories="..\..\include;.." - PreprocessorDefinitions="WIN32;_DEBUG;_LIB;__STDC_LIMIT_MACROS;HASH_NAMESPACE="stdext"" + PreprocessorDefinitions="_CRT_SECURE_NO_DEPRECATE;WIN32;_DEBUG;_LIB;__STDC_LIMIT_MACROS" StringPooling="TRUE" MinimalRebuild="TRUE" BasicRuntimeChecks="3" @@ -66,7 +66,7 @@ Changes in directory llvm/win32/lli: lli.vcproj updated: 1.7 -> 1.8 --- Log message: Add _CRT_SECURE_NO_DEPRECATE preprocessor symbol to make VS2005 happy. --- Diffs of the changes: (+2 -2) lli.vcproj | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/win32/lli/lli.vcproj diff -u llvm/win32/lli/lli.vcproj:1.7 llvm/win32/lli/lli.vcproj:1.8 --- llvm/win32/lli/lli.vcproj:1.7 Fri Dec 16 18:14:47 2005 +++ llvm/win32/lli/lli.vcproj Sun Jan 29 22:07:07 2006 @@ -20,7 +20,7 @@ Name="VCCLCompilerTool" Optimization="0" AdditionalIncludeDirectories="..\..\include;.." - PreprocessorDefinitions="WIN32;_DEBUG;_CONSOLE;__STDC_LIMIT_MACROS" + PreprocessorDefinitions="_CRT_SECURE_NO_DEPRECATE;WIN32;_DEBUG;_CONSOLE;__STDC_LIMIT_MACROS" StringPooling="TRUE" MinimalRebuild="TRUE" BasicRuntimeChecks="3" @@ -74,7 +74,7 @@ Changes in directory llvm/win32/llvm-link: llvm-link.vcproj updated: 1.3 -> 1.4 --- Log message: Add _CRT_SECURE_NO_DEPRECATE preprocessor symbol to make VS2005 happy. --- Diffs of the changes: (+2 -2) llvm-link.vcproj | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/win32/llvm-link/llvm-link.vcproj diff -u llvm/win32/llvm-link/llvm-link.vcproj:1.3 llvm/win32/llvm-link/llvm-link.vcproj:1.4 --- llvm/win32/llvm-link/llvm-link.vcproj:1.3 Fri Dec 16 18:14:47 2005 +++ llvm/win32/llvm-link/llvm-link.vcproj Sun Jan 29 22:07:07 2006 @@ -20,7 +20,7 @@ Name="VCCLCompilerTool" Optimization="0" AdditionalIncludeDirectories="..\..\include;.." - PreprocessorDefinitions="WIN32;_DEBUG;_CONSOLE;__STDC_LIMIT_MACROS" + PreprocessorDefinitions="_CRT_SECURE_NO_DEPRECATE;WIN32;_DEBUG;_CONSOLE;__STDC_LIMIT_MACROS" StringPooling="TRUE" MinimalRebuild="TRUE" BasicRuntimeChecks="3" @@ -73,7 +73,7 @@ Changes in directory llvm/win32/bugpoint: bugpoint.vcproj updated: 1.3 -> 1.4 --- Log message: Add _CRT_SECURE_NO_DEPRECATE preprocessor symbol to make VS2005 happy. --- Diffs of the changes: (+2 -2) bugpoint.vcproj | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/win32/bugpoint/bugpoint.vcproj diff -u llvm/win32/bugpoint/bugpoint.vcproj:1.3 llvm/win32/bugpoint/bugpoint.vcproj:1.4 --- llvm/win32/bugpoint/bugpoint.vcproj:1.3 Fri Dec 16 18:14:47 2005 +++ llvm/win32/bugpoint/bugpoint.vcproj Sun Jan 29 22:07:07 2006 @@ -20,7 +20,7 @@ Name="VCCLCompilerTool" Optimization="0" AdditionalIncludeDirectories="..\..\include;.." - PreprocessorDefinitions="WIN32;_DEBUG;_CONSOLE;__STDC_LIMIT_MACROS" + PreprocessorDefinitions="_CRT_SECURE_NO_DEPRECATE;WIN32;_DEBUG;_CONSOLE;__STDC_LIMIT_MACROS" StringPooling="TRUE" MinimalRebuild="TRUE" BasicRuntimeChecks="3" @@ -73,7 +73,7 @@ Changes in directory llvm/win32/ExecutionEngine: ExecutionEngine.vcproj updated: 1.8 -> 1.9 --- Log message: Add _CRT_SECURE_NO_DEPRECATE preprocessor symbol to make VS2005 happy. --- Diffs of the changes: (+2 -2) ExecutionEngine.vcproj | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/win32/ExecutionEngine/ExecutionEngine.vcproj diff -u llvm/win32/ExecutionEngine/ExecutionEngine.vcproj:1.8 llvm/win32/ExecutionEngine/ExecutionEngine.vcproj:1.9 --- llvm/win32/ExecutionEngine/ExecutionEngine.vcproj:1.8 Fri Dec 16 18:14:46 2005 +++ llvm/win32/ExecutionEngine/ExecutionEngine.vcproj Sun Jan 29 22:07:07 2006 @@ -20,7 +20,7 @@ Name="VCCLCompilerTool" Optimization="0" AdditionalIncludeDirectories="..\..\include;.." - PreprocessorDefinitions="WIN32;_DEBUG;_LIB;__STDC_LIMIT_MACROS" + PreprocessorDefinitions="_CRT_SECURE_NO_DEPRECATE;WIN32;_DEBUG;_LIB;__STDC_LIMIT_MACROS" StringPooling="TRUE" MinimalRebuild="TRUE" BasicRuntimeChecks="3" @@ -66,7 +66,7 @@ Changes in directory llvm/win32/llvm-nm: llvm-nm.vcproj updated: 1.3 -> 1.4 --- Log message: Add _CRT_SECURE_NO_DEPRECATE preprocessor symbol to make VS2005 happy. --- Diffs of the changes: (+2 -2) llvm-nm.vcproj | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/win32/llvm-nm/llvm-nm.vcproj diff -u llvm/win32/llvm-nm/llvm-nm.vcproj:1.3 llvm/win32/llvm-nm/llvm-nm.vcproj:1.4 --- llvm/win32/llvm-nm/llvm-nm.vcproj:1.3 Fri Dec 16 18:14:47 2005 +++ llvm/win32/llvm-nm/llvm-nm.vcproj Sun Jan 29 22:07:07 2006 @@ -20,7 +20,7 @@ Name="VCCLCompilerTool" Optimization="0" AdditionalIncludeDirectories="..\..\include;.." - PreprocessorDefinitions="WIN32;_DEBUG;_CONSOLE;__STDC_LIMIT_MACROS" + PreprocessorDefinitions="_CRT_SECURE_NO_DEPRECATE;WIN32;_DEBUG;_CONSOLE;__STDC_LIMIT_MACROS" StringPooling="TRUE" MinimalRebuild="TRUE" BasicRuntimeChecks="3" @@ -73,7 +73,7 @@ Changes in directory llvm/win32/llvm-as: llvm-as.vcproj updated: 1.3 -> 1.4 --- Log message: Add _CRT_SECURE_NO_DEPRECATE preprocessor symbol to make VS2005 happy. --- Diffs of the changes: (+2 -2) llvm-as.vcproj | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/win32/llvm-as/llvm-as.vcproj diff -u llvm/win32/llvm-as/llvm-as.vcproj:1.3 llvm/win32/llvm-as/llvm-as.vcproj:1.4 --- llvm/win32/llvm-as/llvm-as.vcproj:1.3 Fri Dec 16 18:14:47 2005 +++ llvm/win32/llvm-as/llvm-as.vcproj Sun Jan 29 22:07:07 2006 @@ -20,7 +20,7 @@ Name="VCCLCompilerTool" Optimization="0" AdditionalIncludeDirectories="..\..\include;.." - PreprocessorDefinitions="WIN32;_DEBUG;_CONSOLE;__STDC_LIMIT_MACROS" + PreprocessorDefinitions="_CRT_SECURE_NO_DEPRECATE;WIN32;_DEBUG;_CONSOLE;__STDC_LIMIT_MACROS" StringPooling="TRUE" MinimalRebuild="TRUE" BasicRuntimeChecks="3" @@ -73,7 +73,7 @@ Changes in directory llvm/win32/analyze: analyze.vcproj updated: 1.6 -> 1.7 --- Log message: Add _CRT_SECURE_NO_DEPRECATE preprocessor symbol to make VS2005 happy. --- Diffs of the changes: (+2 -2) analyze.vcproj | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/win32/analyze/analyze.vcproj diff -u llvm/win32/analyze/analyze.vcproj:1.6 llvm/win32/analyze/analyze.vcproj:1.7 --- llvm/win32/analyze/analyze.vcproj:1.6 Fri Dec 16 18:14:47 2005 +++ llvm/win32/analyze/analyze.vcproj Sun Jan 29 22:07:07 2006 @@ -20,7 +20,7 @@ Name="VCCLCompilerTool" Optimization="0" AdditionalIncludeDirectories="..\..\include;.." - PreprocessorDefinitions="WIN32;_DEBUG;_CONSOLE;__STDC_LIMIT_MACROS" + PreprocessorDefinitions="_CRT_SECURE_NO_DEPRECATE;WIN32;_DEBUG;_CONSOLE;__STDC_LIMIT_MACROS" StringPooling="TRUE" MinimalRebuild="TRUE" BasicRuntimeChecks="3" @@ -73,7 +73,7 @@ Changes in directory llvm/win32/Bytecode: Bytecode.vcproj updated: 1.5 -> 1.6 --- Log message: Add _CRT_SECURE_NO_DEPRECATE preprocessor symbol to make VS2005 happy. --- Diffs of the changes: (+2 -2) Bytecode.vcproj | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/win32/Bytecode/Bytecode.vcproj diff -u llvm/win32/Bytecode/Bytecode.vcproj:1.5 llvm/win32/Bytecode/Bytecode.vcproj:1.6 --- llvm/win32/Bytecode/Bytecode.vcproj:1.5 Fri Dec 16 18:14:46 2005 +++ llvm/win32/Bytecode/Bytecode.vcproj Sun Jan 29 22:07:07 2006 @@ -20,7 +20,7 @@ Name="VCCLCompilerTool" Optimization="0" AdditionalIncludeDirectories="..\..\include;.." - PreprocessorDefinitions="WIN32;_DEBUG;_LIB;__STDC_LIMIT_MACROS" + PreprocessorDefinitions="_CRT_SECURE_NO_DEPRECATE;WIN32;_DEBUG;_LIB;__STDC_LIMIT_MACROS" StringPooling="TRUE" MinimalRebuild="TRUE" BasicRuntimeChecks="3" @@ -66,7 +66,7 @@ Changes in directory llvm/include/llvm/Target: TargetLowering.h updated: 1.43 -> 1.44 --- Log message: Move MaskedValueIsZero from the DAGCombiner to the TargetLowering interface, making isMaskedValueZeroForTargetNode simpler, and useable from other parts of the compiler. --- Diffs of the changes: (+14 -6) TargetLowering.h | 20 ++++++++++++++------ 1 files changed, 14 insertions(+), 6 deletions(-) Index: llvm/include/llvm/Target/TargetLowering.h diff -u llvm/include/llvm/Target/TargetLowering.h:1.43 llvm/include/llvm/Target/TargetLowering.h:1.44 --- llvm/include/llvm/Target/TargetLowering.h:1.43 Sun Jan 29 21:48:36 2006 +++ llvm/include/llvm/Target/TargetLowering.h Sun Jan 29 22:08:18 2006 @@ -281,6 +281,17 @@ } //===--------------------------------------------------------------------===// + // TargetLowering Optimization Methods + // + + /// MaskedValueIsZero - Return true if 'Op & Mask' is known to be zero. We + /// use this predicate to simplify operations downstream. Op and Mask are + /// known to be the same type. Targets can implement the + /// isMaskedValueZeroForTargetNode method, to allow target nodes to be + /// understood. + bool MaskedValueIsZero(const SDOperand &Op, uint64_t Mask) const; + + //===--------------------------------------------------------------------===// // TargetLowering Configuration Methods - These methods should be invoked by // the derived class constructor to configure this object for the target. // @@ -413,12 +424,9 @@ virtual const char *getTargetNodeName(unsigned Opcode) const; /// isMaskedValueZeroForTargetNode - Return true if 'Op & Mask' is known to - /// be zero. Op is expected to be a target specific node. Used by DAG - /// combiner. MVIZ is a function pointer to the main MaskedValueIsZero - /// function. - typedef bool (*MVIZFnPtr)(const SDOperand&, uint64_t, const TargetLowering &); - virtual bool isMaskedValueZeroForTargetNode(const SDOperand &Op,uint64_t Mask, - MVIZFnPtr MVIZ) const; + /// be zero. Op is expected to be a target specific node. + virtual bool isMaskedValueZeroForTargetNode(const SDOperand &Op, + uint64_t Mask) const; //===--------------------------------------------------------------------===// // Inline Asm Support hooks From lattner at cs.uiuc.edu Sun Jan 29 22:09:17 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Sun, 29 Jan 2006 22:09:17 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp X86ISelLowering.h Message-ID: <200601300409.WAA27624@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: X86ISelLowering.cpp updated: 1.65 -> 1.66 X86ISelLowering.h updated: 1.19 -> 1.20 --- Log message: Move MaskedValueIsZero from the DAGCombiner to the TargetLowering interface,making isMaskedValueZeroForTargetNode simpler, and useable from other partsof the compiler. --- Diffs of the changes: (+2 -4) X86ISelLowering.cpp | 3 +-- X86ISelLowering.h | 3 +-- 2 files changed, 2 insertions(+), 4 deletions(-) Index: llvm/lib/Target/X86/X86ISelLowering.cpp diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.65 llvm/lib/Target/X86/X86ISelLowering.cpp:1.66 --- llvm/lib/Target/X86/X86ISelLowering.cpp:1.65 Sun Jan 29 21:49:07 2006 +++ llvm/lib/Target/X86/X86ISelLowering.cpp Sun Jan 29 22:09:04 2006 @@ -1932,8 +1932,7 @@ } bool X86TargetLowering::isMaskedValueZeroForTargetNode(const SDOperand &Op, - uint64_t Mask, - MVIZFnPtr MVIZ) const { + uint64_t Mask) const { unsigned Opc = Op.getOpcode(); Index: llvm/lib/Target/X86/X86ISelLowering.h diff -u llvm/lib/Target/X86/X86ISelLowering.h:1.19 llvm/lib/Target/X86/X86ISelLowering.h:1.20 --- llvm/lib/Target/X86/X86ISelLowering.h:1.19 Sun Jan 29 21:49:07 2006 +++ llvm/lib/Target/X86/X86ISelLowering.h Sun Jan 29 22:09:04 2006 @@ -208,8 +208,7 @@ /// be zero. Op is expected to be a target specific node. Used by DAG /// combiner. virtual bool isMaskedValueZeroForTargetNode(const SDOperand &Op, - uint64_t Mask, - MVIZFnPtr MVIZ) const; + uint64_t Mask) const; SDOperand getReturnAddressFrameIndex(SelectionDAG &DAG); From lattner at cs.uiuc.edu Sun Jan 29 22:09:16 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Sun, 29 Jan 2006 22:09:16 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/TargetLowering.cpp Message-ID: <200601300409.WAA27618@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target: TargetLowering.cpp updated: 1.23 -> 1.24 --- Log message: Move MaskedValueIsZero from the DAGCombiner to the TargetLowering interface,making isMaskedValueZeroForTargetNode simpler, and useable from other partsof the compiler. --- Diffs of the changes: (+107 -2) TargetLowering.cpp | 109 ++++++++++++++++++++++++++++++++++++++++++++++++++++- 1 files changed, 107 insertions(+), 2 deletions(-) Index: llvm/lib/Target/TargetLowering.cpp diff -u llvm/lib/Target/TargetLowering.cpp:1.23 llvm/lib/Target/TargetLowering.cpp:1.24 --- llvm/lib/Target/TargetLowering.cpp:1.23 Sun Jan 29 21:49:07 2006 +++ llvm/lib/Target/TargetLowering.cpp Sun Jan 29 22:09:04 2006 @@ -16,6 +16,7 @@ #include "llvm/Target/MRegisterInfo.h" #include "llvm/CodeGen/SelectionDAG.h" #include "llvm/ADT/StringExtras.h" +#include "llvm/Support/MathExtras.h" using namespace llvm; TargetLowering::TargetLowering(TargetMachine &tm) @@ -130,9 +131,113 @@ return NULL; } + + +/// MaskedValueIsZero - Return true if 'Op & Mask' is known to be zero. We use +/// this predicate to simplify operations downstream. Op and Mask are known to +/// be the same type. +bool TargetLowering::MaskedValueIsZero(const SDOperand &Op, + uint64_t Mask) const { + unsigned SrcBits; + if (Mask == 0) return true; + + // If we know the result of a setcc has the top bits zero, use this info. + switch (Op.getOpcode()) { + case ISD::Constant: + return (cast(Op)->getValue() & Mask) == 0; + case ISD::SETCC: + return ((Mask & 1) == 0) && + getSetCCResultContents() == TargetLowering::ZeroOrOneSetCCResult; + case ISD::ZEXTLOAD: + SrcBits = MVT::getSizeInBits(cast(Op.getOperand(3))->getVT()); + return (Mask & ((1ULL << SrcBits)-1)) == 0; // Returning only the zext bits. + case ISD::ZERO_EXTEND: + SrcBits = MVT::getSizeInBits(Op.getOperand(0).getValueType()); + return MaskedValueIsZero(Op.getOperand(0),Mask & (~0ULL >> (64-SrcBits))); + case ISD::AssertZext: + SrcBits = MVT::getSizeInBits(cast(Op.getOperand(1))->getVT()); + return (Mask & ((1ULL << SrcBits)-1)) == 0; // Returning only the zext bits. + case ISD::AND: + // If either of the operands has zero bits, the result will too. + if (MaskedValueIsZero(Op.getOperand(1), Mask) || + MaskedValueIsZero(Op.getOperand(0), Mask)) + return true; + // (X & C1) & C2 == 0 iff C1 & C2 == 0. + if (ConstantSDNode *AndRHS = dyn_cast(Op.getOperand(1))) + return MaskedValueIsZero(Op.getOperand(0),AndRHS->getValue() & Mask); + return false; + case ISD::OR: + case ISD::XOR: + return MaskedValueIsZero(Op.getOperand(0), Mask) && + MaskedValueIsZero(Op.getOperand(1), Mask); + case ISD::SELECT: + return MaskedValueIsZero(Op.getOperand(1), Mask) && + MaskedValueIsZero(Op.getOperand(2), Mask); + case ISD::SELECT_CC: + return MaskedValueIsZero(Op.getOperand(2), Mask) && + MaskedValueIsZero(Op.getOperand(3), Mask); + case ISD::SRL: + // (ushr X, C1) & C2 == 0 iff X & (C2 << C1) == 0 + if (ConstantSDNode *ShAmt = dyn_cast(Op.getOperand(1))) { + uint64_t NewVal = Mask << ShAmt->getValue(); + SrcBits = MVT::getSizeInBits(Op.getValueType()); + if (SrcBits != 64) NewVal &= (1ULL << SrcBits)-1; + return MaskedValueIsZero(Op.getOperand(0), NewVal); + } + return false; + case ISD::SHL: + // (ushl X, C1) & C2 == 0 iff X & (C2 >> C1) == 0 + if (ConstantSDNode *ShAmt = dyn_cast(Op.getOperand(1))) { + uint64_t NewVal = Mask >> ShAmt->getValue(); + return MaskedValueIsZero(Op.getOperand(0), NewVal); + } + return false; + case ISD::ADD: + // (add X, Y) & C == 0 iff (X&C)|(Y&C) == 0 and all bits are low bits. + if ((Mask&(Mask+1)) == 0) { // All low bits + if (MaskedValueIsZero(Op.getOperand(0), Mask) && + MaskedValueIsZero(Op.getOperand(1), Mask)) + return true; + } + break; + case ISD::SUB: + if (ConstantSDNode *CLHS = dyn_cast(Op.getOperand(0))) { + // We know that the top bits of C-X are clear if X contains less bits + // than C (i.e. no wrap-around can happen). For example, 20-X is + // positive if we can prove that X is >= 0 and < 16. + unsigned Bits = MVT::getSizeInBits(CLHS->getValueType(0)); + if ((CLHS->getValue() & (1 << (Bits-1))) == 0) { // sign bit clear + unsigned NLZ = CountLeadingZeros_64(CLHS->getValue()+1); + uint64_t MaskV = (1ULL << (63-NLZ))-1; + if (MaskedValueIsZero(Op.getOperand(1), ~MaskV)) { + // High bits are clear this value is known to be >= C. + unsigned NLZ2 = CountLeadingZeros_64(CLHS->getValue()); + if ((Mask & ((1ULL << (64-NLZ2))-1)) == 0) + return true; + } + } + } + break; + case ISD::CTTZ: + case ISD::CTLZ: + case ISD::CTPOP: + // Bit counting instructions can not set the high bits of the result + // register. The max number of bits sets depends on the input. + return (Mask & (MVT::getSizeInBits(Op.getValueType())*2-1)) == 0; + default: + // Allow the target to implement this method for its nodes. + if (Op.getOpcode() >= ISD::BUILTIN_OP_END) + return isMaskedValueZeroForTargetNode(Op, Mask); + break; + } + return false; +} + bool TargetLowering::isMaskedValueZeroForTargetNode(const SDOperand &Op, - uint64_t Mask, - MVIZFnPtr MVIZ) const { + uint64_t Mask) const { + assert(Op.getOpcode() >= ISD::BUILTIN_OP_END && + "Should use MaskedValueIsZero if you don't know whether Op" + " is a target node!"); return false; } From lattner at cs.uiuc.edu Sun Jan 29 22:09:17 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Sun, 29 Jan 2006 22:09:17 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp Message-ID: <200601300409.WAA27628@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/SparcV8: SparcV8ISelDAGToDAG.cpp updated: 1.63 -> 1.64 --- Log message: Move MaskedValueIsZero from the DAGCombiner to the TargetLowering interface,making isMaskedValueZeroForTargetNode simpler, and useable from other partsof the compiler. --- Diffs of the changes: (+4 -6) SparcV8ISelDAGToDAG.cpp | 10 ++++------ 1 files changed, 4 insertions(+), 6 deletions(-) Index: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp diff -u llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.63 llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.64 --- llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.63 Sun Jan 29 21:51:45 2006 +++ llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp Sun Jan 29 22:09:04 2006 @@ -62,8 +62,7 @@ /// be zero. Op is expected to be a target specific node. Used by DAG /// combiner. virtual bool isMaskedValueZeroForTargetNode(const SDOperand &Op, - uint64_t Mask, - MVIZFnPtr MVIZ) const; + uint64_t Mask) const; virtual std::vector LowerArguments(Function &F, SelectionDAG &DAG); @@ -203,16 +202,15 @@ /// be zero. Op is expected to be a target specific node. Used by DAG /// combiner. bool SparcV8TargetLowering:: -isMaskedValueZeroForTargetNode(const SDOperand &Op, uint64_t Mask, - MVIZFnPtr MVIZ) const { +isMaskedValueZeroForTargetNode(const SDOperand &Op, uint64_t Mask) const { switch (Op.getOpcode()) { default: return false; case V8ISD::SELECT_ICC: case V8ISD::SELECT_FCC: assert(MVT::isInteger(Op.getValueType()) && "Not an integer select!"); // These operations are masked zero if both the left and the right are zero. - return MVIZ(Op.getOperand(0), Mask, *this) && - MVIZ(Op.getOperand(1), Mask, *this); + return MaskedValueIsZero(Op.getOperand(0), Mask) && + MaskedValueIsZero(Op.getOperand(1), Mask); } } From lattner at cs.uiuc.edu Sun Jan 29 22:09:39 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Sun, 29