From resistor at mac.com  Mon Jun 12 02:05:59 2006
From: resistor at mac.com (Owen Anderson)
Date: Mon, 12 Jun 2006 02:05:59 -0500
Subject: [llvm-commits] 
	CVS: llvm/test/Regression/Transforms/LCSSA/2006-06-12-MultipleExitsSameBlock.ll
Message-ID: <200606120705.CAA17911@zion.cs.uiuc.edu>



Changes in directory llvm/test/Regression/Transforms/LCSSA:

2006-06-12-MultipleExitsSameBlock.ll added (r1.1)
---
Log message:

Make sure that LCSSA works properly when it encounters an exit block that has
more than one predecessor inside the loop.


---
Diffs of the changes:  (+28 -0)

 2006-06-12-MultipleExitsSameBlock.ll |   28 ++++++++++++++++++++++++++++
 1 files changed, 28 insertions(+)


Index: llvm/test/Regression/Transforms/LCSSA/2006-06-12-MultipleExitsSameBlock.ll
diff -c /dev/null llvm/test/Regression/Transforms/LCSSA/2006-06-12-MultipleExitsSameBlock.ll:1.1
*** /dev/null	Mon Jun 12 02:05:57 2006
--- llvm/test/Regression/Transforms/LCSSA/2006-06-12-MultipleExitsSameBlock.ll	Mon Jun 12 02:05:47 2006
***************
*** 0 ****
--- 1,28 ----
+ ; RUN: llvm-as < %s | opt -lcssa | llvm-dis | grep "%X.1.lcssa" &&
+ ; RUN: llvm-as < %s | opt -lcssa | llvm-dis | not grep "%X.1.lcssa1"
+ 
+ declare bool %c1()
+ declare bool %c2()
+ 
+ int %foo() {
+ entry:
+   br label %loop_begin
+ 
+ loop_begin:
+   br bool true, label %loop_body.1, label %loop_exit2
+ 
+ loop_body.1:
+   %X.1 = add int 0, 1
+   %rel.1 = call bool %c1()
+   br bool %rel.1, label %loop_exit, label %loop_body.2
+   
+ loop_body.2:
+   %rel.2 = call bool %c2()
+   br bool %rel.2, label %loop_exit, label %loop_begin
+ 
+ loop_exit:
+   ret int %X.1
+   
+ loop_exit2:
+   ret int 1
+ }





From resistor at mac.com  Mon Jun 12 02:10:29 2006
From: resistor at mac.com (Owen Anderson)
Date: Mon, 12 Jun 2006 02:10:29 -0500
Subject: [llvm-commits] CVS: llvm/lib/Transforms/Utils/LCSSA.cpp 
Message-ID: <200606120710.CAA19412@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Transforms/Utils:

LCSSA.cpp updated: 1.19 -> 1.20
---
Log message:

Fix for 2006-06-26-MultipleExitsSingleBlock.

If a single exit block has multiple predecessors within the loop, it will
appear in the exit blocks list more than once.  LCSSA needs to take that into
account so that it doesn't double process that exit block.


---
Diffs of the changes:  (+7 -4)

 LCSSA.cpp |   11 +++++++----
 1 files changed, 7 insertions(+), 4 deletions(-)


Index: llvm/lib/Transforms/Utils/LCSSA.cpp
diff -u llvm/lib/Transforms/Utils/LCSSA.cpp:1.19 llvm/lib/Transforms/Utils/LCSSA.cpp:1.20
--- llvm/lib/Transforms/Utils/LCSSA.cpp:1.19	Sun Jun 11 14:22:28 2006
+++ llvm/lib/Transforms/Utils/LCSSA.cpp	Mon Jun 12 02:10:16 2006
@@ -155,13 +155,16 @@
   std::vector<PHINode*> workList;
   
   for (std::vector<BasicBlock*>::const_iterator BBI = exitBlocks.begin(),
-      BBE = exitBlocks.end(); BBI != BBE; ++BBI)
-    if (DT->getNode(Instr->getParent())->dominates(DT->getNode(*BBI))) {
-      PHINode *phi = new PHINode(Instr->getType(), Instr->getName()+".lcssa",
+      BBE = exitBlocks.end(); BBI != BBE; ++BBI) {
+    Instruction*& phi = Phis[*BBI];
+    if (phi == 0 &&
+        DT->getNode(Instr->getParent())->dominates(DT->getNode(*BBI))) {
+      phi = new PHINode(Instr->getType(), Instr->getName()+".lcssa",
                                  (*BBI)->begin());
-      workList.push_back(phi);
+      workList.push_back(cast<PHINode>(phi));
       Phis[*BBI] = phi;
     }
+  }
   
   // Phi nodes that need to have their incoming values filled.
   std::vector<PHINode*> needIncomingValues;





From rafael.espindola at gmail.com  Mon Jun 12 07:28:36 2006
From: rafael.espindola at gmail.com (Rafael Espindola)
Date: Mon, 12 Jun 2006 07:28:36 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp 
Message-ID: <200606121228.HAA24354@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/ARM:

ARMISelDAGToDAG.cpp updated: 1.11 -> 1.12
---
Log message:

lower more then 4 formal arguments. The offset is currently hard coded.
implement SelectFrameIndex



---
Diffs of the changes:  (+50 -15)

 ARMISelDAGToDAG.cpp |   65 ++++++++++++++++++++++++++++++++++++++++------------
 1 files changed, 50 insertions(+), 15 deletions(-)


Index: llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
diff -u llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.11 llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.12
--- llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.11	Mon Jun  5 17:26:14 2006
+++ llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp	Mon Jun 12 07:28:08 2006
@@ -74,30 +74,49 @@
   return DAG.getNode(ISD::BRIND, MVT::Other, Copy, LR);
 }
 
-static SDOperand LowerFORMAL_ARGUMENTS(SDOperand Op, SelectionDAG &DAG) {
+static SDOperand LowerFORMAL_ARGUMENT(SDOperand Op, SelectionDAG &DAG,
+				      unsigned ArgNo) {
   MachineFunction &MF = DAG.getMachineFunction();
-  SSARegMap *RegMap = MF.getSSARegMap();
-  std::vector<SDOperand> ArgValues;
+  MVT::ValueType ObjectVT = Op.getValue(ArgNo).getValueType();
+  assert (ObjectVT == MVT::i32);
   SDOperand Root = Op.getOperand(0);
+  SSARegMap *RegMap = MF.getSSARegMap();
 
-  unsigned reg_idx = 0;
   unsigned num_regs = 4;
-
   static const unsigned REGS[] = {
     ARM::R0, ARM::R1, ARM::R2, ARM::R3
   };
 
-  for (unsigned ArgNo = 0, e = Op.Val->getNumValues()-1; ArgNo != e; ++ArgNo) {
-    SDOperand ArgVal;
+  if(ArgNo < num_regs) {
+    unsigned VReg = RegMap->createVirtualRegister(&ARM::IntRegsRegClass);
+    MF.addLiveIn(REGS[ArgNo], VReg);
+    return DAG.getCopyFromReg(Root, VReg, MVT::i32);
+  } else {
+    // If the argument is actually used, emit a load from the right stack
+      // slot.
+    if (!Op.Val->hasNUsesOfValue(0, ArgNo)) {
+      //hack
+      unsigned ArgOffset = 0;
+
+      MachineFrameInfo *MFI = MF.getFrameInfo();
+      unsigned ObjSize = MVT::getSizeInBits(ObjectVT)/8;
+      int FI = MFI->CreateFixedObject(ObjSize, ArgOffset);
+      SDOperand FIN = DAG.getFrameIndex(FI, MVT::i32);
+      return DAG.getLoad(ObjectVT, Root, FIN,
+			 DAG.getSrcValue(NULL));
+    } else {
+      // Don't emit a dead load.
+      return DAG.getNode(ISD::UNDEF, ObjectVT);
+    }
+  }
+}
 
-    MVT::ValueType ObjectVT = Op.getValue(ArgNo).getValueType();
-    assert (ObjectVT == MVT::i32);
+static SDOperand LowerFORMAL_ARGUMENTS(SDOperand Op, SelectionDAG &DAG) {
+  std::vector<SDOperand> ArgValues;
+  SDOperand Root = Op.getOperand(0);
 
-    assert(reg_idx < num_regs);
-    unsigned VReg = RegMap->createVirtualRegister(&ARM::IntRegsRegClass);
-    MF.addLiveIn(REGS[reg_idx], VReg);
-    ArgVal = DAG.getCopyFromReg(Root, VReg, MVT::i32);
-    ++reg_idx;
+  for (unsigned ArgNo = 0, e = Op.Val->getNumValues()-1; ArgNo != e; ++ArgNo) {
+    SDOperand ArgVal = LowerFORMAL_ARGUMENT(Op, DAG, ArgNo);
 
     ArgValues.push_back(ArgVal);
   }
@@ -164,8 +183,24 @@
   ScheduleAndEmitDAG(DAG);
 }
 
+static void SelectFrameIndex(SelectionDAG *CurDAG, SDOperand &Result, SDNode *N) {
+  int FI = cast<FrameIndexSDNode>(N)->getIndex();
+  Result = CurDAG->SelectNodeTo(N, ARM::movrr, MVT::i32,
+				CurDAG->getTargetFrameIndex(FI, MVT::i32));
+}
+
 void ARMDAGToDAGISel::Select(SDOperand &Result, SDOperand Op) {
-  SelectCode(Result, Op);
+  SDNode *N = Op.Val;
+
+  switch (N->getOpcode()) {
+  default:
+    SelectCode(Result, Op);
+    break;
+
+  case ISD::FrameIndex:
+    SelectFrameIndex(CurDAG, Result, N);
+    break;
+  }
 }
 
 }  // end anonymous namespace





From alenhar2 at cs.uiuc.edu  Mon Jun 12 11:06:20 2006
From: alenhar2 at cs.uiuc.edu (Andrew Lenharth)
Date: Mon, 12 Jun 2006 11:06:20 -0500
Subject: [llvm-commits] CVS: llvm/include/llvm/Target/TargetLowering.h 
Message-ID: <200606121606.LAA31813@zion.cs.uiuc.edu>



Changes in directory llvm/include/llvm/Target:

TargetLowering.h updated: 1.76 -> 1.77
---
Log message:

Start on my todo list

---
Diffs of the changes:  (+2 -3)

 TargetLowering.h |    5 ++---
 1 files changed, 2 insertions(+), 3 deletions(-)


Index: llvm/include/llvm/Target/TargetLowering.h
diff -u llvm/include/llvm/Target/TargetLowering.h:1.76 llvm/include/llvm/Target/TargetLowering.h:1.77
--- llvm/include/llvm/Target/TargetLowering.h:1.76	Wed May 24 14:21:13 2006
+++ llvm/include/llvm/Target/TargetLowering.h	Mon Jun 12 11:06:08 2006
@@ -25,7 +25,6 @@
 #include "llvm/Type.h"
 #include "llvm/CodeGen/SelectionDAGNodes.h"
 #include <map>
-#include <list>
 
 namespace llvm {
   class Value;
@@ -654,9 +653,9 @@
   // Div utility functions
   //
   SDOperand BuildSDIV(SDNode *N, SelectionDAG &DAG, 
-		      std::list<SDNode*>* Created) const;
+		      std::vector<SDNode*>* Created) const;
   SDOperand BuildUDIV(SDNode *N, SelectionDAG &DAG, 
-		      std::list<SDNode*>* Created) const;
+		      std::vector<SDNode*>* Created) const;
 
 
 protected:





From alenhar2 at cs.uiuc.edu  Mon Jun 12 11:06:55 2006
From: alenhar2 at cs.uiuc.edu (Andrew Lenharth)
Date: Mon, 12 Jun 2006 11:06:55 -0500
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp 
Message-ID: <200606121606.LAA31852@zion.cs.uiuc.edu>



Changes in directory llvm/lib/CodeGen/SelectionDAG:

DAGCombiner.cpp updated: 1.172 -> 1.173
---
Log message:

Start on my todo list

---
Diffs of the changes:  (+4 -4)

 DAGCombiner.cpp |    8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)


Index: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.172 llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.173
--- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.172	Wed May 31 01:08:35 2006
+++ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp	Mon Jun 12 11:06:43 2006
@@ -3454,10 +3454,10 @@
 /// multiplying by a magic number.  See:
 /// <http://the.wall.riscom.net/books/proc/ppc/cwg/code2.html>
 SDOperand DAGCombiner::BuildSDIV(SDNode *N) {
-  std::list<SDNode*> Built;
+  std::vector<SDNode*> Built;
   SDOperand S = TLI.BuildSDIV(N, DAG, &Built);
 
-  for (std::list<SDNode*>::iterator ii = Built.begin(), ee = Built.end();
+  for (std::vector<SDNode*>::iterator ii = Built.begin(), ee = Built.end();
        ii != ee; ++ii)
     AddToWorkList(*ii);
   return S;
@@ -3468,10 +3468,10 @@
 /// multiplying by a magic number.  See:
 /// <http://the.wall.riscom.net/books/proc/ppc/cwg/code2.html>
 SDOperand DAGCombiner::BuildUDIV(SDNode *N) {
-  std::list<SDNode*> Built;
+  std::vector<SDNode*> Built;
   SDOperand S = TLI.BuildUDIV(N, DAG, &Built);
 
-  for (std::list<SDNode*>::iterator ii = Built.begin(), ee = Built.end();
+  for (std::vector<SDNode*>::iterator ii = Built.begin(), ee = Built.end();
        ii != ee; ++ii)
     AddToWorkList(*ii);
   return S;





From alenhar2 at cs.uiuc.edu  Mon Jun 12 11:07:30 2006
From: alenhar2 at cs.uiuc.edu (Andrew Lenharth)
Date: Mon, 12 Jun 2006 11:07:30 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/TargetLowering.cpp 
Message-ID: <200606121607.LAA31879@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target:

TargetLowering.cpp updated: 1.66 -> 1.67
---
Log message:

Start on my todo list

---
Diffs of the changes:  (+2 -2)

 TargetLowering.cpp |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)


Index: llvm/lib/Target/TargetLowering.cpp
diff -u llvm/lib/Target/TargetLowering.cpp:1.66 llvm/lib/Target/TargetLowering.cpp:1.67
--- llvm/lib/Target/TargetLowering.cpp:1.66	Wed May 17 13:22:14 2006
+++ llvm/lib/Target/TargetLowering.cpp	Mon Jun 12 11:07:18 2006
@@ -1511,7 +1511,7 @@
 /// multiplying by a magic number.  See:
 /// <http://the.wall.riscom.net/books/proc/ppc/cwg/code2.html>
 SDOperand TargetLowering::BuildSDIV(SDNode *N, SelectionDAG &DAG, 
-				    std::list<SDNode*>* Created) const {
+				    std::vector<SDNode*>* Created) const {
   MVT::ValueType VT = N->getValueType(0);
   
   // Check to see if we can do this.
@@ -1559,7 +1559,7 @@
 /// multiplying by a magic number.  See:
 /// <http://the.wall.riscom.net/books/proc/ppc/cwg/code2.html>
 SDOperand TargetLowering::BuildUDIV(SDNode *N, SelectionDAG &DAG,
-				    std::list<SDNode*>* Created) const {
+				    std::vector<SDNode*>* Created) const {
   MVT::ValueType VT = N->getValueType(0);
   
   // Check to see if we can do this.





From alenhar2 at cs.uiuc.edu  Mon Jun 12 13:09:36 2006
From: alenhar2 at cs.uiuc.edu (Andrew Lenharth)
Date: Mon, 12 Jun 2006 13:09:36 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaISelLowering.cpp
	AlphaISelLowering.h AlphaInstrFormats.td AlphaInstrInfo.td
	AlphaRegisterInfo.cpp 
Message-ID: <200606121809.NAA32598@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/Alpha:

AlphaISelLowering.cpp updated: 1.49 -> 1.50
AlphaISelLowering.h updated: 1.16 -> 1.17
AlphaInstrFormats.td updated: 1.27 -> 1.28
AlphaInstrInfo.td updated: 1.120 -> 1.121
AlphaRegisterInfo.cpp updated: 1.45 -> 1.46
---
Log message:

Let the alpha breakage begin.  First Formals and RET.  next Calls

---
Diffs of the changes:  (+102 -72)

 AlphaISelLowering.cpp |  141 +++++++++++++++++++++++++++-----------------------
 AlphaISelLowering.h   |   10 +--
 AlphaInstrFormats.td  |   14 ++++
 AlphaInstrInfo.td     |    7 ++
 AlphaRegisterInfo.cpp |    2 
 5 files changed, 102 insertions(+), 72 deletions(-)


Index: llvm/lib/Target/Alpha/AlphaISelLowering.cpp
diff -u llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.49 llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.50
--- llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.49	Tue May 16 12:42:15 2006
+++ llvm/lib/Target/Alpha/AlphaISelLowering.cpp	Mon Jun 12 13:09:24 2006
@@ -128,6 +128,8 @@
   setOperationAction(ISD::VAARG,   MVT::Other, Custom);
   setOperationAction(ISD::VAARG,   MVT::i32,   Custom);
 
+  setOperationAction(ISD::RET,     MVT::Other, Custom);
+
   setStackPointerRegisterToSaveRestore(Alpha::R30);
 
   setOperationAction(ISD::ConstantFP, MVT::f64, Expand);
@@ -154,6 +156,7 @@
   case AlphaISD::GlobalBaseReg: return "Alpha::GlobalBaseReg";
   case AlphaISD::CALL:   return "Alpha::CALL";
   case AlphaISD::DivCall: return "Alpha::DivCall";
+  case AlphaISD::RET_FLAG: return "Alpha::RET_FLAG";
   }
 }
 
@@ -175,116 +178,121 @@
 // //#define GP    $29
 // //#define SP    $30
 
-std::vector<SDOperand>
-AlphaTargetLowering::LowerArguments(Function &F, SelectionDAG &DAG)
-{
+static SDOperand LowerFORMAL_ARGUMENTS(SDOperand Op, SelectionDAG &DAG,
+				       int &VarArgsBase,
+				       int &VarArgsOffset,
+				       unsigned int &GP,
+				       unsigned int &RA) {
   MachineFunction &MF = DAG.getMachineFunction();
   MachineFrameInfo *MFI = MF.getFrameInfo();
+  SSARegMap *RegMap = MF.getSSARegMap();
   std::vector<SDOperand> ArgValues;
+  SDOperand Root = Op.getOperand(0);
+
+  GP = AddLiveIn(MF, Alpha::R29, &Alpha::GPRCRegClass);
+  RA = AddLiveIn(MF, Alpha::R26, &Alpha::GPRCRegClass);
 
   unsigned args_int[] = {
     Alpha::R16, Alpha::R17, Alpha::R18, Alpha::R19, Alpha::R20, Alpha::R21};
   unsigned args_float[] = {
     Alpha::F16, Alpha::F17, Alpha::F18, Alpha::F19, Alpha::F20, Alpha::F21};
-
-  int count = 0;
-
-  GP = AddLiveIn(MF, Alpha::R29, getRegClassFor(MVT::i64));
-  RA = AddLiveIn(MF, Alpha::R26, getRegClassFor(MVT::i64));
-
-  for (Function::arg_iterator I = F.arg_begin(), E = F.arg_end(); I != E; ++I)
-  {
+  
+  for (unsigned ArgNo = 0, e = Op.Val->getNumValues()-1; ArgNo != e; ++ArgNo) {
     SDOperand argt;
-    if (count  < 6) {
+    MVT::ValueType ObjectVT = Op.getValue(ArgNo).getValueType();
+    SDOperand ArgVal;
+
+    if (ArgNo  < 6) {
       unsigned Vreg;
-      MVT::ValueType VT = getValueType(I->getType());
-      switch (VT) {
+      switch (ObjectVT) {
       default:
-        std::cerr << "Unknown Type " << VT << "\n";
+        std::cerr << "Unknown Type " << ObjectVT << "\n";
         abort();
       case MVT::f64:
       case MVT::f32:
-        args_float[count] = AddLiveIn(MF, args_float[count], getRegClassFor(VT));
-        argt = DAG.getCopyFromReg(DAG.getRoot(), args_float[count], VT);
-        DAG.setRoot(argt.getValue(1));
+        args_float[ArgNo] = AddLiveIn(MF, args_float[ArgNo], 
+				      &Alpha::F8RCRegClass);
+        ArgVal = DAG.getCopyFromReg(Root, args_float[ArgNo], ObjectVT);
         break;
-      case MVT::i1:
-      case MVT::i8:
-      case MVT::i16:
-      case MVT::i32:
       case MVT::i64:
-        args_int[count] = AddLiveIn(MF, args_int[count], getRegClassFor(MVT::i64));
-        argt = DAG.getCopyFromReg(DAG.getRoot(), args_int[count], MVT::i64);
-        DAG.setRoot(argt.getValue(1));
-        if (VT != MVT::i64) {
-          unsigned AssertOp = 
-            I->getType()->isSigned() ? ISD::AssertSext : ISD::AssertZext;
-          argt = DAG.getNode(AssertOp, MVT::i64, argt, 
-                             DAG.getValueType(VT));
-          argt = DAG.getNode(ISD::TRUNCATE, VT, argt);
-        }
+        args_int[ArgNo] = AddLiveIn(MF, args_int[ArgNo], 
+				    &Alpha::GPRCRegClass);
+        ArgVal = DAG.getCopyFromReg(Root, args_int[ArgNo], MVT::i64);
         break;
       }
     } else { //more args
       // Create the frame index object for this incoming parameter...
-      int FI = MFI->CreateFixedObject(8, 8 * (count - 6));
+      int FI = MFI->CreateFixedObject(8, 8 * (ArgNo - 6));
 
       // Create the SelectionDAG nodes corresponding to a load
       //from this parameter
       SDOperand FIN = DAG.getFrameIndex(FI, MVT::i64);
-      argt = DAG.getLoad(getValueType(I->getType()),
-                         DAG.getEntryNode(), FIN, DAG.getSrcValue(NULL));
+      ArgVal = DAG.getLoad(ObjectVT, Root, FIN, DAG.getSrcValue(NULL));
     }
-    ++count;
-    ArgValues.push_back(argt);
+    ArgValues.push_back(ArgVal);
   }
 
   // If the functions takes variable number of arguments, copy all regs to stack
-  if (F.isVarArg()) {
-    VarArgsOffset = count * 8;
+  bool isVarArg = cast<ConstantSDNode>(Op.getOperand(2))->getValue() != 0;
+  if (isVarArg) {
+    VarArgsOffset = (Op.Val->getNumValues()-1) * 8;
     std::vector<SDOperand> LS;
     for (int i = 0; i < 6; ++i) {
       if (MRegisterInfo::isPhysicalRegister(args_int[i]))
-        args_int[i] = AddLiveIn(MF, args_int[i], getRegClassFor(MVT::i64));
-      SDOperand argt = DAG.getCopyFromReg(DAG.getRoot(), args_int[i], MVT::i64);
+        args_int[i] = AddLiveIn(MF, args_int[i], &Alpha::GPRCRegClass);
+      SDOperand argt = DAG.getCopyFromReg(Root, args_int[i], MVT::i64);
       int FI = MFI->CreateFixedObject(8, -8 * (6 - i));
       if (i == 0) VarArgsBase = FI;
       SDOperand SDFI = DAG.getFrameIndex(FI, MVT::i64);
-      LS.push_back(DAG.getNode(ISD::STORE, MVT::Other, DAG.getRoot(), argt,
+      LS.push_back(DAG.getNode(ISD::STORE, MVT::Other, Root, argt,
                                SDFI, DAG.getSrcValue(NULL)));
 
       if (MRegisterInfo::isPhysicalRegister(args_float[i]))
-        args_float[i] = AddLiveIn(MF, args_float[i], getRegClassFor(MVT::f64));
-      argt = DAG.getCopyFromReg(DAG.getRoot(), args_float[i], MVT::f64);
+        args_float[i] = AddLiveIn(MF, args_float[i], &Alpha::F8RCRegClass);
+      argt = DAG.getCopyFromReg(Root, args_float[i], MVT::f64);
       FI = MFI->CreateFixedObject(8, - 8 * (12 - i));
       SDFI = DAG.getFrameIndex(FI, MVT::i64);
-      LS.push_back(DAG.getNode(ISD::STORE, MVT::Other, DAG.getRoot(), argt,
+      LS.push_back(DAG.getNode(ISD::STORE, MVT::Other, Root, argt,
                                SDFI, DAG.getSrcValue(NULL)));
     }
 
     //Set up a token factor with all the stack traffic
-    DAG.setRoot(DAG.getNode(ISD::TokenFactor, MVT::Other, LS));
+    Root = DAG.getNode(ISD::TokenFactor, MVT::Other, LS);
   }
 
-  // Finally, inform the code generator which regs we return values in.
-  switch (getValueType(F.getReturnType())) {
-  default: assert(0 && "Unknown type!");
-  case MVT::isVoid: break;
-  case MVT::i1:
-  case MVT::i8:
-  case MVT::i16:
-  case MVT::i32:
-  case MVT::i64:
-    MF.addLiveOut(Alpha::R0);
-    break;
-  case MVT::f32:
-  case MVT::f64:
-    MF.addLiveOut(Alpha::F0);
+  ArgValues.push_back(Root);
+
+  // Return the new list of results.
+  std::vector<MVT::ValueType> RetVT(Op.Val->value_begin(),
+                                    Op.Val->value_end());
+  return DAG.getNode(ISD::MERGE_VALUES, RetVT, ArgValues);
+}
+
+static SDOperand LowerRET(SDOperand Op, SelectionDAG &DAG) {
+  SDOperand Copy;
+  switch (Op.getNumOperands()) {
+  default:
+    assert(0 && "Do not know how to return this many arguments!");
+    abort();
+  case 1: 
+    return SDOperand(); // ret void is legal
+  case 3: {
+    MVT::ValueType ArgVT = Op.getOperand(1).getValueType();
+    unsigned ArgReg;
+    if (MVT::isInteger(ArgVT))
+      ArgReg = Alpha::R0;
+    else {
+      assert(MVT::isFloatingPoint(ArgVT));
+      ArgReg = Alpha::F0;
+    }
+    Copy = DAG.getCopyToReg(Op.getOperand(0), ArgReg, Op.getOperand(1),
+                            SDOperand());
+    if(DAG.getMachineFunction().liveout_empty())
+      DAG.getMachineFunction().addLiveOut(ArgReg);
     break;
   }
-
-  //return the arguments+
-  return ArgValues;
+  }
+  return DAG.getNode(AlphaISD::RET_FLAG, MVT::Other, Copy, Copy.getValue(1));
 }
 
 std::pair<SDOperand, SDOperand>
@@ -371,7 +379,12 @@
 ///
 SDOperand AlphaTargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) {
   switch (Op.getOpcode()) {
-  default: assert(0 && "Wasn't expecting to be able to lower this!"); 
+  default: assert(0 && "Wasn't expecting to be able to lower this!");
+  case ISD::FORMAL_ARGUMENTS: return LowerFORMAL_ARGUMENTS(Op, DAG, 
+							   VarArgsBase,
+							   VarArgsOffset,
+							   GP, RA);
+  case ISD::RET: return LowerRET(Op,DAG);
   case ISD::SINT_TO_FP: {
     assert(MVT::i64 == Op.getOperand(0).getValueType() && 
            "Unhandled SINT_TO_FP type in custom expander!");


Index: llvm/lib/Target/Alpha/AlphaISelLowering.h
diff -u llvm/lib/Target/Alpha/AlphaISelLowering.h:1.16 llvm/lib/Target/Alpha/AlphaISelLowering.h:1.17
--- llvm/lib/Target/Alpha/AlphaISelLowering.h:1.16	Wed May 24 12:04:04 2006
+++ llvm/lib/Target/Alpha/AlphaISelLowering.h	Mon Jun 12 13:09:24 2006
@@ -42,7 +42,10 @@
       CALL,
 
       /// DIVCALL - used for special library calls for div and rem
-      DivCall
+      DivCall,
+      
+      /// return flag operand
+      RET_FLAG
 
     };
   }
@@ -64,11 +67,6 @@
     //Friendly names for dumps
     const char *getTargetNodeName(unsigned Opcode) const;
 
-    /// LowerArguments - This hook must be implemented to indicate how we should
-    /// lower the arguments for the specified function, into the specified DAG.
-    virtual std::vector<SDOperand>
-    LowerArguments(Function &F, SelectionDAG &DAG);
-
     /// LowerCallTo - This hook lowers an abstract call to a function into an
     /// actual call.
     virtual std::pair<SDOperand, SDOperand>


Index: llvm/lib/Target/Alpha/AlphaInstrFormats.td
diff -u llvm/lib/Target/Alpha/AlphaInstrFormats.td:1.27 llvm/lib/Target/Alpha/AlphaInstrFormats.td:1.28
--- llvm/lib/Target/Alpha/AlphaInstrFormats.td:1.27	Thu Mar  9 11:16:45 2006
+++ llvm/lib/Target/Alpha/AlphaInstrFormats.td	Mon Jun 12 13:09:24 2006
@@ -75,6 +75,20 @@
   let Inst{15-14} = TB;
   let Inst{13-0} = disp;
 }
+class MbrpForm<bits<6> opcode, bits<2> TB, dag OL, string asmstr, list<dag> pattern, InstrItinClass itin>
+    : InstAlpha<opcode, asmstr, itin> {
+  let Pattern=pattern;
+  bits<5> Ra;
+  bits<5> Rb;
+  bits<14> disp;
+
+  let OperandList = OL;
+
+  let Inst{25-21} = Ra;
+  let Inst{20-16} = Rb;
+  let Inst{15-14} = TB;
+  let Inst{13-0} = disp;
+}
 
 //3.3.2
 def target : Operand<OtherVT> {}


Index: llvm/lib/Target/Alpha/AlphaInstrInfo.td
diff -u llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.120 llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.121
--- llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.120	Sat Jun  3 19:25:51 2006
+++ llvm/lib/Target/Alpha/AlphaInstrInfo.td	Mon Jun 12 13:09:24 2006
@@ -28,6 +28,9 @@
 def Alpha_gprelhi : SDNode<"AlphaISD::GPRelHi",   SDTIntBinOp, []>;
 def Alpha_rellit  : SDNode<"AlphaISD::RelLit",    SDTIntBinOp, []>;
 
+def retflag       : SDNode<"AlphaISD::RET_FLAG", SDTRet,
+	                   [SDNPHasChain, SDNPOptInFlag]>;
+
 // These are target-independent nodes, but have target-specific formats.
 def SDT_AlphaCallSeq : SDTypeProfile<0, 1, [ SDTCisVT<0, i64> ]>;
 def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_AlphaCallSeq,[SDNPHasChain]>;
@@ -425,8 +428,10 @@
 def : Pat<(setune GPRC:$X, immUExt8:$Y), (CMPEQi (CMPEQ GPRC:$X, immUExt8:$Y), 0)>;
 
 
-let isReturn = 1, isTerminator = 1, noResults = 1, Ra = 31, Rb = 26, disp = 1, Uses = [R26] in 
+let isReturn = 1, isTerminator = 1, noResults = 1, Ra = 31, Rb = 26, disp = 1, Uses = [R26] in {
   def RETDAG : MbrForm< 0x1A, 0x02, (ops), "ret $$31,($$26),1", s_jsr>; //Return from subroutine
+  def RETDAGp : MbrpForm< 0x1A, 0x02, (ops), "ret $$31,($$26),1", [(retflag)], s_jsr>; //Return from subroutine
+}
 
 def JMP : MbrForm< 0x1A, 0x00, (ops GPRC:$RD, GPRC:$RS, GPRC:$DISP), "jmp $RD,($RS),$DISP", s_jsr>; //Jump
 let isCall = 1, noResults = 1, Ra = 26,


Index: llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp
diff -u llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp:1.45 llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp:1.46
--- llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp:1.45	Wed May 17 19:11:53 2006
+++ llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp	Mon Jun 12 13:09:24 2006
@@ -346,7 +346,7 @@
                                      MachineBasicBlock &MBB) const {
   const MachineFrameInfo *MFI = MF.getFrameInfo();
   MachineBasicBlock::iterator MBBI = prior(MBB.end());
-  assert(MBBI->getOpcode() == Alpha::RETDAG
+  assert(MBBI->getOpcode() == Alpha::RETDAG || MBBI->getOpcode() == Alpha::RETDAGp
          && "Can only insert epilog into returning blocks");
 
   bool FP = hasFP(MF);





From lattner at cs.uiuc.edu  Mon Jun 12 13:24:44 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Mon, 12 Jun 2006 13:24:44 -0500
Subject: [llvm-commits] 
	CVS: llvm/test/Regression/CodeGen/Generic/2006-06-12-LowerSwitchCrash.ll
Message-ID: <200606121824.NAA32722@zion.cs.uiuc.edu>



Changes in directory llvm/test/Regression/CodeGen/Generic:

2006-06-12-LowerSwitchCrash.ll added (r1.1)
---
Log message:

New testcase that crashes llc



---
Diffs of the changes:  (+10 -0)

 2006-06-12-LowerSwitchCrash.ll |   10 ++++++++++
 1 files changed, 10 insertions(+)


Index: llvm/test/Regression/CodeGen/Generic/2006-06-12-LowerSwitchCrash.ll
diff -c /dev/null llvm/test/Regression/CodeGen/Generic/2006-06-12-LowerSwitchCrash.ll:1.1
*** /dev/null	Mon Jun 12 13:24:42 2006
--- llvm/test/Regression/CodeGen/Generic/2006-06-12-LowerSwitchCrash.ll	Mon Jun 12 13:24:32 2006
***************
*** 0 ****
--- 1,10 ----
+ ; RUN: llvm-as < %s | llc -fast
+ 
+ float %test(uint %tmp12771278) {
+         switch uint %tmp12771278, label %bb1279 [
+         ]
+ 
+ bb1279:         ; preds = %cond_next1272
+         ret float 1.0
+ }
+ 





From lattner at cs.uiuc.edu  Mon Jun 12 13:25:42 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Mon, 12 Jun 2006 13:25:42 -0500
Subject: [llvm-commits] 
	CVS: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
Message-ID: <200606121825.NAA00371@zion.cs.uiuc.edu>



Changes in directory llvm/lib/CodeGen/SelectionDAG:

SelectionDAGISel.cpp updated: 1.255 -> 1.256
---
Log message:

Make sure to update the CFG correctly if a switch only has a default dest.
This fixes CodeGen/Generic/2006-06-12-LowerSwitchCrash.ll



---
Diffs of the changes:  (+1 -0)

 SelectionDAGISel.cpp |    1 +
 1 files changed, 1 insertion(+)


Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.255 llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.256
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.255	Thu Jun  8 13:27:11 2006
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp	Mon Jun 12 13:25:29 2006
@@ -869,6 +869,7 @@
     if (DefaultMBB != NextBlock)
       DAG.setRoot(DAG.getNode(ISD::BR, MVT::Other, getRoot(),
                               DAG.getBasicBlock(DefaultMBB)));
+    CurMBB->addSuccessor(DefaultMBB);
     return;
   }
   





From lattner at cs.uiuc.edu  Mon Jun 12 14:03:29 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Mon, 12 Jun 2006 14:03:29 -0500
Subject: [llvm-commits] CVS: llvm/utils/NightlyTest.pl 
Message-ID: <200606121903.OAA00566@zion.cs.uiuc.edu>



Changes in directory llvm/utils:

NightlyTest.pl updated: 1.108 -> 1.109
---
Log message:

Add a new -compileflags options, remove old externals location specifiers.
People should just use -with-externals.


---
Diffs of the changes:  (+12 -25)

 NightlyTest.pl |   37 ++++++++++++-------------------------
 1 files changed, 12 insertions(+), 25 deletions(-)


Index: llvm/utils/NightlyTest.pl
diff -u llvm/utils/NightlyTest.pl:1.108 llvm/utils/NightlyTest.pl:1.109
--- llvm/utils/NightlyTest.pl:1.108	Wed Jun  7 00:28:07 2006
+++ llvm/utils/NightlyTest.pl	Mon Jun 12 14:03:17 2006
@@ -17,9 +17,6 @@
 #                   -norunningtests.
 #  -norunningtests  Do not run the Olden benchmark suite with
 #                   LARGE_PROBLEM_SIZE enabled.
-#  -noexternals     Do not run the external tests (for cases where povray
-#                   or SPEC are not installed)
-#  -with-externals  Specify a directory where the external tests are located.
 #  -nodejagnu       Do not run feature or regression tests
 #  -parallel        Run two parallel jobs with GNU Make.
 #  -release         Build an LLVM Release version
@@ -43,14 +40,15 @@
 #                   override the default.
 #  -ldflags         Next argument specifies that linker options that override
 #                   the default.
-#  -extraflags      Next argument specifies extra options that are passed to
-#                   compile the tests.
+#  -compileflags    Next argument specifies extra options passed to make when
+#                   building LLVM.
 #
 #  ---------------- Options to configure llvm-test ----------------------------
-#  -spec2000path    Path to the benchspec directory in the SPEC 2000 distro
-#  -spec95path      Path to the benchspec directory in the SPEC 95 distro.
-#  -povraypath      Path to the povray sources
-#  -namdpath        Path to the namd sources
+#  -extraflags      Next argument specifies extra options that are passed to
+#                   compile the tests.
+#  -noexternals     Do not run the external tests (for cases where povray
+#                   or SPEC are not installed)
+#  -with-externals  Specify a directory where the external tests are located.
 #
 # CVSROOT is the CVS repository from which the tree will be checked out,
 #  specified either in the full :method:user at host:/dir syntax, or
@@ -100,8 +98,6 @@
 my $NICE = "";
 my $NODEJAGNU = 0;
 
-my $LLVMTESTCONFIGARGS = "";
-
 sub ReadFile {
   if (open (FILE, $_[0])) {
     undef $/;
@@ -334,23 +330,14 @@
   if (/^-ldflags/)         {
     $MAKEOPTS = "$MAKEOPTS LD.Flags=\'$ARGV[0]\'"; shift; next;
   }
-  if (/^-extraflags/)         {
+  if (/^-compileflags/)    {
+    $MAKEOPTS = "$MAKEOPTS $ARGV[0]"; shift; next;
+  }
+  if (/^-extraflags/)      {
     $PROGTESTOPTS .= " EXTRA_FLAGS=\'$ARGV[0]\'"; shift; next;
   }
   if (/^-noexternals$/)    { $NOEXTERNALS = 1; next; }
   if (/^-nodejagnu$/)      { $NODEJAGNU = 1; next; }
-  if (/^-spec2000path$/)   {
-    $LLVMTESTCONFIGARGS .= " --enable-spec2000=$ARGV[0]"; shift; next;
-  }
-  if (/^-spec95path$/)     {
-    $LLVMTESTCONFIGARGS .= " --enable-spec95=$ARGV[0]"; shift; next;
-  }
-  if (/^-povraypath$/)     {
-    $LLVMTESTCONFIGARGS .= " --enable-povray=$ARGV[0]"; shift; next;
-  }
-  if (/^-namdpath$/)       {
-    $LLVMTESTCONFIGARGS .= " --enable-namd=$ARGV[0]"; shift; next;
-  }
   print "Unknown option: $_ : ignoring!\n";
 }
 
@@ -462,7 +449,7 @@
 #
 if (!$NOCHECKOUT) {
   if ( $VERBOSE ) { print "CONFIGURE STAGE\n"; }
-  my $EXTRAFLAGS = "--enable-spec --with-objroot=.$LLVMTESTCONFIGARGS";
+  my $EXTRAFLAGS = "--enable-spec --with-objroot=.";
   system "(time -p $NICE ./configure $CONFIGUREARGS $EXTRAFLAGS) > $BuildLog 2>&1";
 
   if ( $VERBOSE ) { print "BUILD STAGE\n"; }





From lattner at cs.uiuc.edu  Mon Jun 12 15:17:56 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Mon, 12 Jun 2006 15:17:56 -0500
Subject: [llvm-commits] 
	CVS: llvm/test/Regression/Transforms/SimplifyCFG/2006-06-12-InfLoop.ll
Message-ID: <200606122017.PAA00979@zion.cs.uiuc.edu>



Changes in directory llvm/test/Regression/Transforms/SimplifyCFG:

2006-06-12-InfLoop.ll added (r1.1)
---
Log message:

TEstcase that makes simplifycfg infloop.


---
Diffs of the changes:  (+613 -0)

 2006-06-12-InfLoop.ll |  613 ++++++++++++++++++++++++++++++++++++++++++++++++++
 1 files changed, 613 insertions(+)


Index: llvm/test/Regression/Transforms/SimplifyCFG/2006-06-12-InfLoop.ll
diff -c /dev/null llvm/test/Regression/Transforms/SimplifyCFG/2006-06-12-InfLoop.ll:1.1
*** /dev/null	Mon Jun 12 15:17:54 2006
--- llvm/test/Regression/Transforms/SimplifyCFG/2006-06-12-InfLoop.ll	Mon Jun 12 15:17:44 2006
***************
*** 0 ****
--- 1,613 ----
+ ; RUN: llvm-as < %s | opt -simplifycfg -disable-output
+ 
+ void %main(int %c) {
+ entry:
+ 	%tmp.9 = seteq int %c, 2		; <bool> [#uses=1]
+ 	br bool %tmp.9, label %endif.0, label %then.0
+ 
+ then.0:		; preds = %entry
+ 	ret void
+ 
+ endif.0:		; preds = %entry
+ 	br bool false, label %then.1, label %endif.1
+ 
+ then.1:		; preds = %endif.0
+ 	ret void
+ 
+ endif.1:		; preds = %endif.0
+ 	br bool false, label %then.2, label %endif.2
+ 
+ then.2:		; preds = %endif.1
+ 	ret void
+ 
+ endif.2:		; preds = %endif.1
+ 	br bool false, label %then.3, label %loopentry.0
+ 
+ then.3:		; preds = %endif.2
+ 	ret void
+ 
+ loopentry.0:		; preds = %endif.2
+ 	br bool false, label %no_exit.0.preheader, label %loopexit.0
+ 
+ no_exit.0.preheader:		; preds = %loopentry.0
+ 	br label %no_exit.0
+ 
+ no_exit.0:		; preds = %endif.4, %no_exit.0.preheader
+ 	br bool false, label %then.4, label %endif.4
+ 
+ then.4:		; preds = %no_exit.0
+ 	ret void
+ 
+ endif.4:		; preds = %no_exit.0
+ 	br bool false, label %no_exit.0, label %loopexit.0.loopexit
+ 
+ loopexit.0.loopexit:		; preds = %endif.4
+ 	br label %loopexit.0
+ 
+ loopexit.0:		; preds = %loopexit.0.loopexit, %loopentry.0
+ 	br bool false, label %then.5, label %loopentry.1
+ 
+ then.5:		; preds = %loopexit.0
+ 	ret void
+ 
+ loopentry.1:		; preds = %loopexit.0
+ 	%tmp.143 = setgt int 0, 0		; <bool> [#uses=4]
+ 	br bool %tmp.143, label %no_exit.1.preheader, label %loopexit.1
+ 
+ no_exit.1.preheader:		; preds = %loopentry.1
+ 	br label %no_exit.1
+ 
+ no_exit.1:		; preds = %endif.6, %no_exit.1.preheader
+ 	br bool false, label %then.6, label %shortcirc_next.3
+ 
+ shortcirc_next.3:		; preds = %no_exit.1
+ 	br bool false, label %then.6, label %shortcirc_next.4
+ 
+ shortcirc_next.4:		; preds = %shortcirc_next.3
+ 	br bool false, label %then.6, label %endif.6
+ 
+ then.6:		; preds = %shortcirc_next.4, %shortcirc_next.3, %no_exit.1
+ 	ret void
+ 
+ endif.6:		; preds = %shortcirc_next.4
+ 	br bool false, label %no_exit.1, label %loopexit.1.loopexit
+ 
+ loopexit.1.loopexit:		; preds = %endif.6
+ 	br label %loopexit.1
+ 
+ loopexit.1:		; preds = %loopexit.1.loopexit, %loopentry.1
+ 	br bool false, label %then.i, label %loopentry.0.i
+ 
+ then.i:		; preds = %loopexit.1
+ 	ret void
+ 
+ loopentry.0.i:		; preds = %loopexit.1
+ 	br bool %tmp.143, label %no_exit.0.i.preheader, label %readvector.exit
+ 
+ no_exit.0.i.preheader:		; preds = %loopentry.0.i
+ 	br label %no_exit.0.i
+ 
+ no_exit.0.i:		; preds = %loopexit.1.i, %no_exit.0.i.preheader
+ 	br bool false, label %no_exit.1.i.preheader, label %loopexit.1.i
+ 
+ no_exit.1.i.preheader:		; preds = %no_exit.0.i
+ 	br label %no_exit.1.i
+ 
+ no_exit.1.i:		; preds = %loopexit.2.i, %no_exit.1.i.preheader
+ 	br bool false, label %no_exit.2.i.preheader, label %loopexit.2.i
+ 
+ no_exit.2.i.preheader:		; preds = %no_exit.1.i
+ 	br label %no_exit.2.i
+ 
+ no_exit.2.i:		; preds = %no_exit.2.i, %no_exit.2.i.preheader
+ 	br bool false, label %no_exit.2.i, label %loopexit.2.i.loopexit
+ 
+ loopexit.2.i.loopexit:		; preds = %no_exit.2.i
+ 	br label %loopexit.2.i
+ 
+ loopexit.2.i:		; preds = %loopexit.2.i.loopexit, %no_exit.1.i
+ 	br bool false, label %no_exit.1.i, label %loopexit.1.i.loopexit
+ 
+ loopexit.1.i.loopexit:		; preds = %loopexit.2.i
+ 	br label %loopexit.1.i
+ 
+ loopexit.1.i:		; preds = %loopexit.1.i.loopexit, %no_exit.0.i
+ 	br bool false, label %no_exit.0.i, label %readvector.exit.loopexit
+ 
+ readvector.exit.loopexit:		; preds = %loopexit.1.i
+ 	br label %readvector.exit
+ 
+ readvector.exit:		; preds = %readvector.exit.loopexit, %loopentry.0.i
+ 	br bool %tmp.143, label %loopentry.1.preheader.i, label %loopexit.0.i
+ 
+ loopentry.1.preheader.i:		; preds = %readvector.exit
+ 	br label %loopentry.1.outer.i
+ 
+ loopentry.1.outer.i:		; preds = %loopexit.1.i110, %loopentry.1.preheader.i
+ 	br label %loopentry.1.i85
+ 
+ loopentry.1.i85.loopexit:		; preds = %hamming.exit16.i
+ 	br label %loopentry.1.i85
+ 
+ loopentry.1.i85:		; preds = %loopentry.1.i85.loopexit, %loopentry.1.outer.i
+ 	br bool false, label %no_exit.1.preheader.i, label %loopexit.1.i110.loopexit1
+ 
+ no_exit.1.preheader.i:		; preds = %loopentry.1.i85
+ 	br label %no_exit.1.i87
+ 
+ no_exit.1.i87:		; preds = %then.1.i107, %no_exit.1.preheader.i
+ 	br bool false, label %no_exit.i.i101.preheader, label %hamming.exit.i104
+ 
+ no_exit.i.i101.preheader:		; preds = %no_exit.1.i87
+ 	br label %no_exit.i.i101
+ 
+ no_exit.i.i101:		; preds = %no_exit.i.i101, %no_exit.i.i101.preheader
+ 	br bool false, label %no_exit.i.i101, label %hamming.exit.i104.loopexit
+ 
+ hamming.exit.i104.loopexit:		; preds = %no_exit.i.i101
+ 	br label %hamming.exit.i104
+ 
+ hamming.exit.i104:		; preds = %hamming.exit.i104.loopexit, %no_exit.1.i87
+ 	br bool false, label %no_exit.i15.i.preheader, label %hamming.exit16.i
+ 
+ no_exit.i15.i.preheader:		; preds = %hamming.exit.i104
+ 	br label %no_exit.i15.i
+ 
+ no_exit.i15.i:		; preds = %no_exit.i15.i, %no_exit.i15.i.preheader
+ 	br bool false, label %no_exit.i15.i, label %hamming.exit16.i.loopexit
+ 
+ hamming.exit16.i.loopexit:		; preds = %no_exit.i15.i
+ 	br label %hamming.exit16.i
+ 
+ hamming.exit16.i:		; preds = %hamming.exit16.i.loopexit, %hamming.exit.i104
+ 	br bool false, label %loopentry.1.i85.loopexit, label %then.1.i107
+ 
+ then.1.i107:		; preds = %hamming.exit16.i
+ 	br bool false, label %no_exit.1.i87, label %loopexit.1.i110.loopexit
+ 
+ loopexit.1.i110.loopexit:		; preds = %then.1.i107
+ 	br label %loopexit.1.i110
+ 
+ loopexit.1.i110.loopexit1:		; preds = %loopentry.1.i85
+ 	br label %loopexit.1.i110
+ 
+ loopexit.1.i110:		; preds = %loopexit.1.i110.loopexit1, %loopexit.1.i110.loopexit
+ 	br bool false, label %loopentry.1.outer.i, label %loopexit.0.i.loopexit
+ 
+ loopexit.0.i.loopexit:		; preds = %loopexit.1.i110
+ 	br label %loopexit.0.i
+ 
+ loopexit.0.i:		; preds = %loopexit.0.i.loopexit, %readvector.exit
+ 	br bool false, label %UnifiedReturnBlock.i113, label %then.2.i112
+ 
+ then.2.i112:		; preds = %loopexit.0.i
+ 	br label %checkham.exit
+ 
+ UnifiedReturnBlock.i113:		; preds = %loopexit.0.i
+ 	br label %checkham.exit
+ 
+ checkham.exit:		; preds = %UnifiedReturnBlock.i113, %then.2.i112
+ 	br bool false, label %loopentry.1.i14.preheader, label %loopentry.3.i.preheader
+ 
+ loopentry.1.i14.preheader:		; preds = %checkham.exit
+ 	br label %loopentry.1.i14
+ 
+ loopentry.1.i14:		; preds = %loopexit.1.i18, %loopentry.1.i14.preheader
+ 	br bool false, label %no_exit.1.i16.preheader, label %loopexit.1.i18
+ 
+ no_exit.1.i16.preheader:		; preds = %loopentry.1.i14
+ 	br label %no_exit.1.i16
+ 
+ no_exit.1.i16:		; preds = %no_exit.1.i16, %no_exit.1.i16.preheader
+ 	br bool false, label %no_exit.1.i16, label %loopexit.1.i18.loopexit
+ 
+ loopexit.1.i18.loopexit:		; preds = %no_exit.1.i16
+ 	br label %loopexit.1.i18
+ 
+ loopexit.1.i18:		; preds = %loopexit.1.i18.loopexit, %loopentry.1.i14
+ 	br bool false, label %loopentry.1.i14, label %loopentry.3.i.loopexit
+ 
+ loopentry.3.i.loopexit:		; preds = %loopexit.1.i18
+ 	br label %loopentry.3.i.preheader
+ 
+ loopentry.3.i.preheader:		; preds = %loopentry.3.i.loopexit, %checkham.exit
+ 	br label %loopentry.3.i
+ 
+ loopentry.3.i:		; preds = %endif.1.i, %loopentry.3.i.preheader
+ 	br bool false, label %loopentry.4.i.preheader, label %endif.1.i
+ 
+ loopentry.4.i.preheader:		; preds = %loopentry.3.i
+ 	br label %loopentry.4.i
+ 
+ loopentry.4.i:		; preds = %loopexit.4.i, %loopentry.4.i.preheader
+ 	br bool false, label %no_exit.4.i.preheader, label %loopexit.4.i
+ 
+ no_exit.4.i.preheader:		; preds = %loopentry.4.i
+ 	br label %no_exit.4.i
+ 
+ no_exit.4.i:		; preds = %no_exit.4.i.backedge, %no_exit.4.i.preheader
+ 	br bool false, label %endif.0.i, label %else.i
+ 
+ else.i:		; preds = %no_exit.4.i
+ 	br bool false, label %no_exit.4.i.backedge, label %loopexit.4.i.loopexit
+ 
+ no_exit.4.i.backedge:		; preds = %endif.0.i, %else.i
+ 	br label %no_exit.4.i
+ 
+ endif.0.i:		; preds = %no_exit.4.i
+ 	br bool false, label %no_exit.4.i.backedge, label %loopexit.4.i.loopexit
+ 
+ loopexit.4.i.loopexit:		; preds = %endif.0.i, %else.i
+ 	br label %loopexit.4.i
+ 
+ loopexit.4.i:		; preds = %loopexit.4.i.loopexit, %loopentry.4.i
+ 	br bool false, label %loopentry.4.i, label %endif.1.i.loopexit
+ 
+ endif.1.i.loopexit:		; preds = %loopexit.4.i
+ 	br label %endif.1.i
+ 
+ endif.1.i:		; preds = %endif.1.i.loopexit, %loopentry.3.i
+ 	%exitcond = seteq uint 0, 10		; <bool> [#uses=1]
+ 	br bool %exitcond, label %generateT.exit, label %loopentry.3.i
+ 
+ generateT.exit:		; preds = %endif.1.i
+ 	br bool false, label %then.0.i, label %loopentry.1.i30.preheader
+ 
+ then.0.i:		; preds = %generateT.exit
+ 	ret void
+ 
+ loopentry.1.i30.loopexit:		; preds = %loopexit.3.i
+ 	br label %loopentry.1.i30.backedge
+ 
+ loopentry.1.i30.preheader:		; preds = %generateT.exit
+ 	br label %loopentry.1.i30
+ 
+ loopentry.1.i30:		; preds = %loopentry.1.i30.backedge, %loopentry.1.i30.preheader
+ 	br bool %tmp.143, label %no_exit.0.i31.preheader, label %loopentry.1.i30.backedge
+ 
+ loopentry.1.i30.backedge:		; preds = %loopentry.1.i30, %loopentry.1.i30.loopexit
+ 	br label %loopentry.1.i30
+ 
+ no_exit.0.i31.preheader:		; preds = %loopentry.1.i30
+ 	br label %no_exit.0.i31
+ 
+ no_exit.0.i31:		; preds = %loopexit.3.i, %no_exit.0.i31.preheader
+ 	br bool false, label %then.1.i, label %else.0.i
+ 
+ then.1.i:		; preds = %no_exit.0.i31
+ 	br bool undef, label %then.0.i29, label %loopentry.0.i31
+ 
+ then.0.i29:		; preds = %then.1.i
+ 	unreachable
+ 
+ loopentry.0.i31:		; preds = %then.1.i
+ 	br bool false, label %no_exit.0.i38.preheader, label %loopentry.1.i.preheader
+ 
+ no_exit.0.i38.preheader:		; preds = %loopentry.0.i31
+ 	br label %no_exit.0.i38
+ 
+ no_exit.0.i38:		; preds = %no_exit.0.i38, %no_exit.0.i38.preheader
+ 	br bool undef, label %no_exit.0.i38, label %loopentry.1.i.preheader.loopexit
+ 
+ loopentry.1.i.preheader.loopexit:		; preds = %no_exit.0.i38
+ 	br label %loopentry.1.i.preheader
+ 
+ loopentry.1.i.preheader:		; preds = %loopentry.1.i.preheader.loopexit, %loopentry.0.i31
+ 	br label %loopentry.1.i
+ 
+ loopentry.1.i:		; preds = %endif.2.i, %loopentry.1.i.preheader
+ 	br bool undef, label %loopentry.2.i39.preheader, label %loopexit.1.i79.loopexit2
+ 
+ loopentry.2.i39.preheader:		; preds = %loopentry.1.i
+ 	br label %loopentry.2.i39
+ 
+ loopentry.2.i39:		; preds = %loopexit.5.i77, %loopentry.2.i39.preheader
+ 	br bool false, label %loopentry.3.i40.preheader, label %hamming.exit.i71
+ 
+ loopentry.3.i40.preheader:		; preds = %loopentry.2.i39
+ 	br label %loopentry.3.i40
+ 
+ loopentry.3.i40:		; preds = %loopexit.3.i51, %loopentry.3.i40.preheader
+ 	br bool false, label %no_exit.3.preheader.i42, label %loopexit.3.i51
+ 
+ no_exit.3.preheader.i42:		; preds = %loopentry.3.i40
+ 	br label %no_exit.3.i49
+ 
+ no_exit.3.i49:		; preds = %no_exit.3.i49, %no_exit.3.preheader.i42
+ 	br bool undef, label %no_exit.3.i49, label %loopexit.3.i51.loopexit
+ 
+ loopexit.3.i51.loopexit:		; preds = %no_exit.3.i49
+ 	br label %loopexit.3.i51
+ 
+ loopexit.3.i51:		; preds = %loopexit.3.i51.loopexit, %loopentry.3.i40
+ 	br bool undef, label %loopentry.3.i40, label %loopentry.4.i52
+ 
+ loopentry.4.i52:		; preds = %loopexit.3.i51
+ 	br bool false, label %no_exit.4.i54.preheader, label %hamming.exit.i71
+ 
+ no_exit.4.i54.preheader:		; preds = %loopentry.4.i52
+ 	br label %no_exit.4.i54
+ 
+ no_exit.4.i54:		; preds = %no_exit.4.backedge.i, %no_exit.4.i54.preheader
+ 	br bool undef, label %then.1.i55, label %endif.1.i56
+ 
+ then.1.i55:		; preds = %no_exit.4.i54
+ 	br bool undef, label %no_exit.4.backedge.i, label %loopexit.4.i57
+ 
+ no_exit.4.backedge.i:		; preds = %endif.1.i56, %then.1.i55
+ 	br label %no_exit.4.i54
+ 
+ endif.1.i56:		; preds = %no_exit.4.i54
+ 	br bool undef, label %no_exit.4.backedge.i, label %loopexit.4.i57
+ 
+ loopexit.4.i57:		; preds = %endif.1.i56, %then.1.i55
+ 	br bool false, label %no_exit.i.i69.preheader, label %hamming.exit.i71
+ 
+ no_exit.i.i69.preheader:		; preds = %loopexit.4.i57
+ 	br label %no_exit.i.i69
+ 
+ no_exit.i.i69:		; preds = %no_exit.i.i69, %no_exit.i.i69.preheader
+ 	br bool undef, label %no_exit.i.i69, label %hamming.exit.i71.loopexit
+ 
+ hamming.exit.i71.loopexit:		; preds = %no_exit.i.i69
+ 	br label %hamming.exit.i71
+ 
+ hamming.exit.i71:		; preds = %hamming.exit.i71.loopexit, %loopexit.4.i57, %loopentry.4.i52, %loopentry.2.i39
+ 	br bool undef, label %endif.2.i, label %loopentry.5.i72
+ 
+ loopentry.5.i72:		; preds = %hamming.exit.i71
+ 	br bool false, label %shortcirc_next.i74.preheader, label %loopexit.5.i77
+ 
+ shortcirc_next.i74.preheader:		; preds = %loopentry.5.i72
+ 	br label %shortcirc_next.i74
+ 
+ shortcirc_next.i74:		; preds = %no_exit.5.i76, %shortcirc_next.i74.preheader
+ 	br bool undef, label %no_exit.5.i76, label %loopexit.5.i77.loopexit
+ 
+ no_exit.5.i76:		; preds = %shortcirc_next.i74
+ 	br bool undef, label %shortcirc_next.i74, label %loopexit.5.i77.loopexit
+ 
+ loopexit.5.i77.loopexit:		; preds = %no_exit.5.i76, %shortcirc_next.i74
+ 	br label %loopexit.5.i77
+ 
+ loopexit.5.i77:		; preds = %loopexit.5.i77.loopexit, %loopentry.5.i72
+ 	br bool undef, label %loopentry.2.i39, label %loopexit.1.i79.loopexit
+ 
+ endif.2.i:		; preds = %hamming.exit.i71
+ 	br label %loopentry.1.i
+ 
+ loopexit.1.i79.loopexit:		; preds = %loopexit.5.i77
+ 	br label %loopexit.1.i79
+ 
+ loopexit.1.i79.loopexit2:		; preds = %loopentry.1.i
+ 	br label %loopexit.1.i79
+ 
+ loopexit.1.i79:		; preds = %loopexit.1.i79.loopexit2, %loopexit.1.i79.loopexit
+ 	br bool undef, label %then.3.i, label %loopentry.6.i80
+ 
+ then.3.i:		; preds = %loopexit.1.i79
+ 	br bool false, label %no_exit.6.i82.preheader, label %run.exit
+ 
+ loopentry.6.i80:		; preds = %loopexit.1.i79
+ 	br bool false, label %no_exit.6.i82.preheader, label %run.exit
+ 
+ no_exit.6.i82.preheader:		; preds = %loopentry.6.i80, %then.3.i
+ 	br label %no_exit.6.i82
+ 
+ no_exit.6.i82:		; preds = %no_exit.6.i82, %no_exit.6.i82.preheader
+ 	br bool undef, label %no_exit.6.i82, label %run.exit.loopexit
+ 
+ run.exit.loopexit:		; preds = %no_exit.6.i82
+ 	br label %run.exit
+ 
+ run.exit:		; preds = %run.exit.loopexit, %loopentry.6.i80, %then.3.i
+ 	br bool false, label %no_exit.1.i36.preheader, label %loopentry.3.i37
+ 
+ else.0.i:		; preds = %no_exit.0.i31
+ 	br bool false, label %then.0.i4, label %loopentry.0.i6
+ 
+ then.0.i4:		; preds = %else.0.i
+ 	unreachable
+ 
+ loopentry.0.i6:		; preds = %else.0.i
+ 	br bool false, label %no_exit.0.i8.preheader, label %loopentry.2.i.preheader
+ 
+ no_exit.0.i8.preheader:		; preds = %loopentry.0.i6
+ 	br label %no_exit.0.i8
+ 
+ no_exit.0.i8:		; preds = %no_exit.0.i8, %no_exit.0.i8.preheader
+ 	br bool false, label %no_exit.0.i8, label %loopentry.2.i.preheader.loopexit
+ 
+ loopentry.2.i.preheader.loopexit:		; preds = %no_exit.0.i8
+ 	br label %loopentry.2.i.preheader
+ 
+ loopentry.2.i.preheader:		; preds = %loopentry.2.i.preheader.loopexit, %loopentry.0.i6
+ 	br label %loopentry.2.i
+ 
+ loopentry.2.i:		; preds = %endif.3.i19, %loopentry.2.i.preheader
+ 	br bool false, label %loopentry.3.i10.preheader, label %loopentry.4.i15
+ 
+ loopentry.3.i10.preheader:		; preds = %loopentry.2.i
+ 	br label %loopentry.3.i10
+ 
+ loopentry.3.i10:		; preds = %loopexit.3.i14, %loopentry.3.i10.preheader
+ 	br bool false, label %no_exit.3.preheader.i, label %loopexit.3.i14
+ 
+ no_exit.3.preheader.i:		; preds = %loopentry.3.i10
+ 	br label %no_exit.3.i12
+ 
+ no_exit.3.i12:		; preds = %no_exit.3.i12, %no_exit.3.preheader.i
+ 	br bool false, label %no_exit.3.i12, label %loopexit.3.i14.loopexit
+ 
+ loopexit.3.i14.loopexit:		; preds = %no_exit.3.i12
+ 	br label %loopexit.3.i14
+ 
+ loopexit.3.i14:		; preds = %loopexit.3.i14.loopexit, %loopentry.3.i10
+ 	br bool false, label %loopentry.3.i10, label %loopentry.4.i15.loopexit
+ 
+ loopentry.4.i15.loopexit:		; preds = %loopexit.3.i14
+ 	br label %loopentry.4.i15
+ 
+ loopentry.4.i15:		; preds = %loopentry.4.i15.loopexit, %loopentry.2.i
+ 	br bool false, label %loopentry.5.outer.i.preheader, label %loopentry.7.i
+ 
+ loopentry.5.outer.i.preheader:		; preds = %loopentry.4.i15
+ 	br label %loopentry.5.outer.i
+ 
+ loopentry.5.outer.i:		; preds = %loopexit.5.i, %loopentry.5.outer.i.preheader
+ 	br label %loopentry.5.i
+ 
+ loopentry.5.i:		; preds = %endif.1.i18, %loopentry.5.outer.i
+ 	br bool false, label %no_exit.5.i.preheader, label %loopexit.5.i.loopexit3
+ 
+ no_exit.5.i.preheader:		; preds = %loopentry.5.i
+ 	br label %no_exit.5.i
+ 
+ no_exit.5.i:		; preds = %then.2.i, %no_exit.5.i.preheader
+ 	br bool false, label %loopentry.6.i, label %endif.1.i18
+ 
+ loopentry.6.i:		; preds = %no_exit.5.i
+ 	br bool false, label %no_exit.6.preheader.i, label %loopexit.6.i
+ 
+ no_exit.6.preheader.i:		; preds = %loopentry.6.i
+ 	br label %no_exit.6.i
+ 
+ no_exit.6.i:		; preds = %no_exit.6.i, %no_exit.6.preheader.i
+ 	br bool false, label %no_exit.6.i, label %loopexit.6.i.loopexit
+ 
+ loopexit.6.i.loopexit:		; preds = %no_exit.6.i
+ 	br label %loopexit.6.i
+ 
+ loopexit.6.i:		; preds = %loopexit.6.i.loopexit, %loopentry.6.i
+ 	br bool false, label %then.2.i, label %endif.1.i18
+ 
+ then.2.i:		; preds = %loopexit.6.i
+ 	br bool false, label %no_exit.5.i, label %loopexit.5.i.loopexit
+ 
+ endif.1.i18:		; preds = %loopexit.6.i, %no_exit.5.i
+ 	br label %loopentry.5.i
+ 
+ loopexit.5.i.loopexit:		; preds = %then.2.i
+ 	br label %loopexit.5.i
+ 
+ loopexit.5.i.loopexit3:		; preds = %loopentry.5.i
+ 	br label %loopexit.5.i
+ 
+ loopexit.5.i:		; preds = %loopexit.5.i.loopexit3, %loopexit.5.i.loopexit
+ 	br bool false, label %loopentry.5.outer.i, label %loopentry.7.i.loopexit
+ 
+ loopentry.7.i.loopexit:		; preds = %loopexit.5.i
+ 	br label %loopentry.7.i
+ 
+ loopentry.7.i:		; preds = %loopentry.7.i.loopexit, %loopentry.4.i15
+ 	br bool false, label %no_exit.7.i.preheader, label %hamming.exit.i
+ 
+ no_exit.7.i.preheader:		; preds = %loopentry.7.i
+ 	br label %no_exit.7.i
+ 
+ no_exit.7.i:		; preds = %no_exit.7.i, %no_exit.7.i.preheader
+ 	br bool false, label %no_exit.7.i, label %loopexit.7.i
+ 
+ loopexit.7.i:		; preds = %no_exit.7.i
+ 	br bool false, label %no_exit.i.i.preheader, label %hamming.exit.i
+ 
+ no_exit.i.i.preheader:		; preds = %loopexit.7.i
+ 	br label %no_exit.i.i
+ 
+ no_exit.i.i:		; preds = %no_exit.i.i, %no_exit.i.i.preheader
+ 	br bool false, label %no_exit.i.i, label %hamming.exit.i.loopexit
+ 
+ hamming.exit.i.loopexit:		; preds = %no_exit.i.i
+ 	br label %hamming.exit.i
+ 
+ hamming.exit.i:		; preds = %hamming.exit.i.loopexit, %loopexit.7.i, %loopentry.7.i
+ 	br bool false, label %endif.3.i19, label %loopentry.8.i
+ 
+ loopentry.8.i:		; preds = %hamming.exit.i
+ 	br bool false, label %shortcirc_next.i.preheader, label %loopexit.8.i
+ 
+ shortcirc_next.i.preheader:		; preds = %loopentry.8.i
+ 	br label %shortcirc_next.i
+ 
+ shortcirc_next.i:		; preds = %no_exit.8.i, %shortcirc_next.i.preheader
+ 	br bool false, label %no_exit.8.i, label %loopexit.8.i.loopexit
+ 
+ no_exit.8.i:		; preds = %shortcirc_next.i
+ 	br bool false, label %shortcirc_next.i, label %loopexit.8.i.loopexit
+ 
+ loopexit.8.i.loopexit:		; preds = %no_exit.8.i, %shortcirc_next.i
+ 	br label %loopexit.8.i
+ 
+ loopexit.8.i:		; preds = %loopexit.8.i.loopexit, %loopentry.8.i
+ 	br bool false, label %no_exit.9.i.preheader, label %endif.3.i19
+ 
+ no_exit.9.i.preheader:		; preds = %loopexit.8.i
+ 	br label %no_exit.9.i
+ 
+ no_exit.9.i:		; preds = %no_exit.9.i, %no_exit.9.i.preheader
+ 	br bool false, label %no_exit.9.i, label %endif.3.i19.loopexit
+ 
+ endif.3.i19.loopexit:		; preds = %no_exit.9.i
+ 	br label %endif.3.i19
+ 
+ endif.3.i19:		; preds = %endif.3.i19.loopexit, %loopexit.8.i, %hamming.exit.i
+ 	br bool false, label %loopentry.2.i, label %loopexit.1.i20
+ 
+ loopexit.1.i20:		; preds = %endif.3.i19
+ 	br bool false, label %then.4.i, label %UnifiedReturnBlock.i
+ 
+ then.4.i:		; preds = %loopexit.1.i20
+ 	br label %runcont.exit
+ 
+ UnifiedReturnBlock.i:		; preds = %loopexit.1.i20
+ 	br label %runcont.exit
+ 
+ runcont.exit:		; preds = %UnifiedReturnBlock.i, %then.4.i
+ 	br bool false, label %no_exit.1.i36.preheader, label %loopentry.3.i37
+ 
+ no_exit.1.i36.preheader:		; preds = %runcont.exit, %run.exit
+ 	br label %no_exit.1.i36
+ 
+ no_exit.1.i36:		; preds = %no_exit.1.i36, %no_exit.1.i36.preheader
+ 	br bool false, label %no_exit.1.i36, label %loopentry.3.i37.loopexit
+ 
+ loopentry.3.i37.loopexit:		; preds = %no_exit.1.i36
+ 	br label %loopentry.3.i37
+ 
+ loopentry.3.i37:		; preds = %loopentry.3.i37.loopexit, %runcont.exit, %run.exit
+ 	br bool false, label %loopentry.4.i38.preheader, label %loopexit.3.i
+ 
+ loopentry.4.i38.preheader:		; preds = %loopentry.3.i37
+ 	br label %loopentry.4.i38
+ 
+ loopentry.4.i38:		; preds = %loopexit.4.i42, %loopentry.4.i38.preheader
+ 	br bool false, label %no_exit.3.i.preheader, label %loopexit.4.i42
+ 
+ no_exit.3.i.preheader:		; preds = %loopentry.4.i38
+ 	br label %no_exit.3.i
+ 
+ no_exit.3.i:		; preds = %no_exit.3.i.backedge, %no_exit.3.i.preheader
+ 	br bool false, label %endif.3.i, label %else.1.i
+ 
+ else.1.i:		; preds = %no_exit.3.i
+ 	br bool false, label %no_exit.3.i.backedge, label %loopexit.4.i42.loopexit
+ 
+ no_exit.3.i.backedge:		; preds = %endif.3.i, %else.1.i
+ 	br label %no_exit.3.i
+ 
+ endif.3.i:		; preds = %no_exit.3.i
+ 	br bool false, label %no_exit.3.i.backedge, label %loopexit.4.i42.loopexit
+ 
+ loopexit.4.i42.loopexit:		; preds = %endif.3.i, %else.1.i
+ 	br label %loopexit.4.i42
+ 
+ loopexit.4.i42:		; preds = %loopexit.4.i42.loopexit, %loopentry.4.i38
+ 	br bool false, label %loopentry.4.i38, label %loopexit.3.i.loopexit
+ 
+ loopexit.3.i.loopexit:		; preds = %loopexit.4.i42
+ 	br label %loopexit.3.i
+ 
+ loopexit.3.i:		; preds = %loopexit.3.i.loopexit, %loopentry.3.i37
+ 	%tmp.13.i155 = setlt int 0, 0		; <bool> [#uses=1]
+ 	br bool %tmp.13.i155, label %no_exit.0.i31, label %loopentry.1.i30.loopexit
+ }





From lattner at cs.uiuc.edu  Mon Jun 12 15:18:13 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Mon, 12 Jun 2006 15:18:13 -0500
Subject: [llvm-commits] CVS: llvm/lib/Transforms/Utils/SimplifyCFG.cpp 
Message-ID: <200606122018.PAA00991@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Transforms/Utils:

SimplifyCFG.cpp updated: 1.97 -> 1.98
---
Log message:

Fix an infinite loop on Transforms/SimplifyCFG/2006-06-12-InfLoop.ll


---
Diffs of the changes:  (+10 -1)

 SimplifyCFG.cpp |   11 ++++++++++-
 1 files changed, 10 insertions(+), 1 deletion(-)


Index: llvm/lib/Transforms/Utils/SimplifyCFG.cpp
diff -u llvm/lib/Transforms/Utils/SimplifyCFG.cpp:1.97 llvm/lib/Transforms/Utils/SimplifyCFG.cpp:1.98
--- llvm/lib/Transforms/Utils/SimplifyCFG.cpp:1.97	Sun May 14 13:45:44 2006
+++ llvm/lib/Transforms/Utils/SimplifyCFG.cpp	Mon Jun 12 15:18:01 2006
@@ -1515,12 +1515,21 @@
               // keep getting unwound.
               if (PBIOp != -1 && PBI->getSuccessor(PBIOp) == BB)
                 PBIOp = BIOp = -1;
-              
+
               // Finally, if everything is ok, fold the branches to logical ops.
               if (PBIOp != -1) {
                 BasicBlock *CommonDest = PBI->getSuccessor(PBIOp);
                 BasicBlock *OtherDest  = BI->getSuccessor(BIOp ^ 1);
 
+                // If OtherDest *is* BB, then this is a basic block with just
+                // a conditional branch in it, where one edge (OtherDesg) goes
+                // back to the block.  We know that the program doesn't get
+                // stuck in the infinite loop, so the condition must be such
+                // that OtherDest isn't branched through. Forward to CommonDest,
+                // and avoid an infinite loop at optimizer time.
+                if (OtherDest == BB)
+                  OtherDest = CommonDest;
+                
                 DEBUG(std::cerr << "FOLDING BRs:" << *PBI->getParent()
                                 << "AND: " << *BI->getParent());
                                 





From lattner at cs.uiuc.edu  Mon Jun 12 15:32:56 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Mon, 12 Jun 2006 15:32:56 -0500
Subject: [llvm-commits] CVS: llvm-www/pubs/2006-06-07-LewyckyChecker.html
	2006-06-07-LewyckyChecker.pdf 2006-06-07-LewyckyChecker.ps 
Message-ID: <200606122032.PAA01227@zion.cs.uiuc.edu>



Changes in directory llvm-www/pubs:

2006-06-07-LewyckyChecker.html added (r1.1)
2006-06-07-LewyckyChecker.pdf added (r1.1)
2006-06-07-LewyckyChecker.ps added (r1.1)
---
Log message:

New thesis


---
Diffs of the changes:  (+5254 -0)

 2006-06-07-LewyckyChecker.html |   56 
 2006-06-07-LewyckyChecker.pdf  |    0 
 2006-06-07-LewyckyChecker.ps   | 5198 +++++++++++++++++++++++++++++++++++++++++
 3 files changed, 5254 insertions(+)


Index: llvm-www/pubs/2006-06-07-LewyckyChecker.html
diff -c /dev/null llvm-www/pubs/2006-06-07-LewyckyChecker.html:1.1
*** /dev/null	Mon Jun 12 15:32:54 2006
--- llvm-www/pubs/2006-06-07-LewyckyChecker.html	Mon Jun 12 15:32:44 2006
***************
*** 0 ****
--- 1,56 ----
+ <!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
+ <html>
+ <head>
+   <meta http-equiv="Content-Type" content="text/html; charset=UTF-8" />
+   <link rel="stylesheet" href="../llvm.css" type="text/css" media="screen" />
+   <title>Checker: a Static Program Checker</title>
+ </head>
+ <body>
+ 
+ <div class="pub_title">
+   Checker: a Static Program Checker
+ </div>
+ <div class="pub_author">
+   Nicholas Lewycky, B.Sc. Thesis
+ </div>
+ 
+ 
+ <h2>Abstract:</h2>
+ <blockquote>
+ <p>Automated software analysis is the process of testing program source
+ code against a set of conditions. These may be as simple as verifying
+ the coding standards, or as complicated as new languages which are
+ formally verifiable by a theorem solver.</p>
+ 
+ <p>Checker is able to find two small classes of errors, one is memory
+ faults, the other, non-deterministic behaviour. Lacking interprocedural
+ analysis, checker can not be applied to real-world software.</p>
+ </blockquote>
+ 
+ <h2>Published:</h2>
+ <blockquote>
+   Checker: a Static Program Checker.<br>
+   <i>Undergraduate Thesis</i>, Computer Science Dept., Ryerson University, June 2006.
+ </blockquote>
+ 
+ <h2>Download:</h2>
+ <ul>
+   <li><a href="2006-06-07-LewyckyChecker.ps">Checker: a Static Program Checker</a> (PS)</li>
+   <li><a href="2006-06-07-LewyckyChecker.pdf">Checker: a Static Program Checker</a> (PDF)</li>
+ </ul>
+ 
+ <h2>BibTeX Entry:</h2>
+ <pre>
+   @MastersThesis{Lewycky:Checker06,
+     author  = {Nicholas Lewycky},
+     title   = "{Checker: a Static Program Checker}",
+     school  = "{Computer Science Dept., Ryerson University}",
+     year    = {2006},
+     address = {Toronto, ON},
+     month   = {June},
+     note    = {{\em See {\tt http://wagon.no-ip.org/checker}.}}
+   }
+ </pre>
+ 
+ </body>
+ </html>


Index: llvm-www/pubs/2006-06-07-LewyckyChecker.pdf


Index: llvm-www/pubs/2006-06-07-LewyckyChecker.ps
diff -c /dev/null llvm-www/pubs/2006-06-07-LewyckyChecker.ps:1.1
*** /dev/null	Mon Jun 12 15:32:56 2006
--- llvm-www/pubs/2006-06-07-LewyckyChecker.ps	Mon Jun 12 15:32:44 2006
***************
*** 0 ****
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+ %%CreationDate: 1991 Aug 18 17:48:50
+ % Copyright (C) 1997 American Mathematical Society. All Rights Reserved.
+ 11 dict begin
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+ /Notice (Copyright (C) 1997 American Mathematical Society. All Rights Reserved) readonly def
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+ %%CreationDate: 1996 Jul 23 07:53:54
+ % Copyright (C) 1997 American Mathematical Society. All Rights Reserved.
+ 11 dict begin
+ /FontInfo 7 dict dup begin
+ /version (1.100) readonly def
+ /Notice (Copyright (C) 1997 American Mathematical Society. All Rights Reserved) readonly def
+ /FullName (CMMI8) readonly def
+ /FamilyName (Computer Modern) readonly def
+ /Weight (Medium) readonly def
+ /ItalicAngle -14.04 def
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+ /FontName /CMMI8 def
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+ /FontType 1 def
+ /FontMatrix [0.001 0 0 0.001 0 0] readonly def
+ /Encoding 256 array
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+ cleartomark
+ %%EndFont 
+ %%BeginFont: CMSY10
+ %!PS-AdobeFont-1.1: CMSY10 1.0
+ %%CreationDate: 1991 Aug 15 07:20:57
+ % Copyright (C) 1997 American Mathematical Society. All Rights Reserved.
+ 11 dict begin
+ /FontInfo 7 dict dup begin
+ /version (1.0) readonly def
+ /Notice (Copyright (C) 1997 American Mathematical Society. All Rights Reserved) readonly def
+ /FullName (CMSY10) readonly def
+ /FamilyName (Computer Modern) readonly def
+ /Weight (Medium) readonly def
+ /ItalicAngle -14.035 def
+ /isFixedPitch false def
+ end readonly def
+ /FontName /CMSY10 def
+ /PaintType 0 def
+ /FontType 1 def
+ /FontMatrix [0.001 0 0 0.001 0 0] readonly def
+ /Encoding 256 array
+ 0 1 255 {1 index exch /.notdef put} for
+ dup 15 /bullet put
+ dup 32 /arrowleft put
+ dup 102 /braceleft put
+ dup 103 /braceright put
+ readonly def
+ /FontBBox{-29 -960 1116 775}readonly def
+ currentdict end
+ currentfile eexec
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+ %%CreationDate: 1991 Aug 20 16:39:40
+ % Copyright (C) 1997 American Mathematical Society. All Rights Reserved.
+ 11 dict begin
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+ % Copyright (C) 1997 American Mathematical Society. All Rights Reserved.
+ 11 dict begin
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+ %%BeginFont: CMTT12
+ %!PS-AdobeFont-1.1: CMTT12 1.0
+ %%CreationDate: 1991 Aug 20 16:45:46
+ % Copyright (C) 1997 American Mathematical Society. All Rights Reserved.
+ 11 dict begin
+ /FontInfo 7 dict dup begin
+ /version (1.0) readonly def
+ /Notice (Copyright (C) 1997 American Mathematical Society. All Rights Reserved) readonly def
+ /FullName (CMTT12) readonly def
+ /FamilyName (Computer Modern) readonly def
+ /Weight (Medium) readonly def
+ /ItalicAngle 0 def
+ /isFixedPitch true def
+ end readonly def
+ /FontName /CMTT12 def
+ /PaintType 0 def
+ /FontType 1 def
+ /FontMatrix [0.001 0 0 0.001 0 0] readonly def
+ /Encoding 256 array
+ 0 1 255 {1 index exch /.notdef put} for
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+ dup 38 /ampersand put
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+ dup 40 /parenleft put
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+ dup 45 /hyphen put
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+ readonly def
+ /FontBBox{-1 -234 524 695}readonly def
+ currentdict end
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+ cleartomark
+ %%EndFont 
+ %%BeginFont: CMBX12
+ %!PS-AdobeFont-1.1: CMBX12 1.0
+ %%CreationDate: 1991 Aug 20 16:34:54
+ % Copyright (C) 1997 American Mathematical Society. All Rights Reserved.
+ 11 dict begin
+ /FontInfo 7 dict dup begin
+ /version (1.0) readonly def
+ /Notice (Copyright (C) 1997 American Mathematical Society. All Rights Reserved) readonly def
+ /FullName (CMBX12) readonly def
+ /FamilyName (Computer Modern) readonly def
+ /Weight (Bold) readonly def
+ /ItalicAngle 0 def
+ /isFixedPitch false def
+ end readonly def
+ /FontName /CMBX12 def
+ /PaintType 0 def
+ /FontType 1 def
+ /FontMatrix [0.001 0 0 0.001 0 0] readonly def
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+ readonly def
+ /FontBBox{-53 -251 1139 750}readonly def
+ currentdict end
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+ %%BeginFont: CMR12
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+ %%CreationDate: 1991 Aug 20 16:38:05
+ % Copyright (C) 1997 American Mathematical Society. All Rights Reserved.
+ 11 dict begin
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+ /version (1.0) readonly def
+ /Notice (Copyright (C) 1997 American Mathematical Society. All Rights Reserved) readonly def
+ /FullName (CMR12) readonly def
+ /FamilyName (Computer Modern) readonly def
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+ end readonly def
+ /FontName /CMR12 def
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+ cleartomark
+ %%EndFont 
+ %%BeginFont: CMR10
+ %!PS-AdobeFont-1.1: CMR10 1.00B
+ %%CreationDate: 1992 Feb 19 19:54:52
+ % Copyright (C) 1997 American Mathematical Society. All Rights Reserved.
+ 11 dict begin
+ /FontInfo 7 dict dup begin
+ /version (1.00B) readonly def
+ /Notice (Copyright (C) 1997 American Mathematical Society. All Rights Reserved) readonly def
+ /FullName (CMR10) readonly def
+ /FamilyName (Computer Modern) readonly def
+ /Weight (Medium) readonly def
+ /ItalicAngle 0 def
+ /isFixedPitch false def
+ end readonly def
+ /FontName /CMR10 def
+ /PaintType 0 def
+ /FontType 1 def
+ /FontMatrix [0.001 0 0 0.001 0 0] readonly def
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+ readonly def
+ /FontBBox{-251 -250 1009 969}readonly def
+ currentdict end
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+ cleartomark
+ %%EndFont 
+ %%BeginFont: CMBX10
+ %!PS-AdobeFont-1.1: CMBX10 1.00B
+ %%CreationDate: 1992 Feb 19 19:54:06
+ % Copyright (C) 1997 American Mathematical Society. All Rights Reserved.
+ 11 dict begin
+ /FontInfo 7 dict dup begin
+ /version (1.00B) readonly def
+ /Notice (Copyright (C) 1997 American Mathematical Society. All Rights Reserved) readonly def
+ /FullName (CMBX10) readonly def
+ /FamilyName (Computer Modern) readonly def
+ /Weight (Bold) readonly def
+ /ItalicAngle 0 def
+ /isFixedPitch false def
+ end readonly def
+ /FontName /CMBX10 def
+ /PaintType 0 def
+ /FontType 1 def
+ /FontMatrix [0.001 0 0 0.001 0 0] readonly def
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+ dup 97 /a put
+ dup 98 /b put
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+ dup 116 /t put
+ readonly def
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+ currentdict end
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+ b(Julian)45 b(Sew)m(ard)h(and)f(Nic)m(k)h(Nethercote.)80
+ b(V)-8 b(algrind,)48 b(an)d(op)s(en-source)809 1797 y(memory)33
+ b(debugger)h(for)e(x86-GNU/Lin)m(ux.)809 1918 y(h)m(ttp://www.v)-5
+ b(algrind.org/)1894 5251 y(18)p eop end
+ %%Trailer
+ 
+ userdict /end-hook known{end-hook}if
+ %%EOF





From lattner at cs.uiuc.edu  Mon Jun 12 15:34:54 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Mon, 12 Jun 2006 15:34:54 -0500
Subject: [llvm-commits] CVS: llvm-www/pubs/index.html 
Message-ID: <200606122034.PAA01258@zion.cs.uiuc.edu>



Changes in directory llvm-www/pubs:

index.html updated: 1.38 -> 1.39
---
Log message:

Add a new pub


---
Diffs of the changes:  (+3 -0)

 index.html |    3 +++
 1 files changed, 3 insertions(+)


Index: llvm-www/pubs/index.html
diff -u llvm-www/pubs/index.html:1.38 llvm-www/pubs/index.html:1.39
--- llvm-www/pubs/index.html:1.38	Fri Apr 28 12:16:22 2006
+++ llvm-www/pubs/index.html	Mon Jun 12 15:34:42 2006
@@ -38,6 +38,9 @@
 
 <ol>
 
+<li>"<a href="2006-06-07-LewyckyChecker.html">Checker: a Static Program Checker</a>"<br>
+Nicholas Lewycky.<br> <i>B.Sc. Thesis</i>, Computer Science Dept., Ryerson University, June 2006.</li>
+
 <li>"<a href="2006-06-15-VEE-VectorLLVA.html">Vector LLVA:  A Virtual Vector Instruction Set for Media Processing</a>"<br>Robert L. Bocchino Jr. and Vikram S. Adve.<br><i>
 Proc. of the Second International Conference on Virtual Execution Environments (VEE'06)</i>, Ottawa, Canada, 2006.<br></li>
 





From resistor at mac.com  Mon Jun 12 16:49:33 2006
From: resistor at mac.com (Owen Anderson)
Date: Mon, 12 Jun 2006 16:49:33 -0500
Subject: [llvm-commits] CVS: llvm/lib/Transforms/Scalar/LoopUnswitch.cpp 
Message-ID: <200606122149.QAA30269@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Transforms/Scalar:

LoopUnswitch.cpp updated: 1.38 -> 1.39
---
Log message:

Reapply my 6/9 changes.  The bug Evan saw no longer occurs.


---
Diffs of the changes:  (+7 -1)

 LoopUnswitch.cpp |    8 +++++++-
 1 files changed, 7 insertions(+), 1 deletion(-)


Index: llvm/lib/Transforms/Scalar/LoopUnswitch.cpp
diff -u llvm/lib/Transforms/Scalar/LoopUnswitch.cpp:1.38 llvm/lib/Transforms/Scalar/LoopUnswitch.cpp:1.39
--- llvm/lib/Transforms/Scalar/LoopUnswitch.cpp:1.38	Sun Jun 11 04:32:57 2006
+++ llvm/lib/Transforms/Scalar/LoopUnswitch.cpp	Mon Jun 12 16:49:21 2006
@@ -73,6 +73,8 @@
       AU.addPreservedID(LoopSimplifyID);
       AU.addRequired<LoopInfo>();
       AU.addPreserved<LoopInfo>();
+      AU.addRequiredID(LCSSAID);
+      AU.addPreservedID(LCSSAID);
     }
 
   private:
@@ -154,6 +156,8 @@
 }
 
 bool LoopUnswitch::visitLoop(Loop *L) {
+  assert(L->isLCSSAForm());
+  
   bool Changed = false;
   
   // Loop over all of the basic blocks in the loop.  If we find an interior
@@ -198,7 +202,9 @@
         }
       }
   }
-    
+  
+  assert(L->isLCSSAForm());
+  
   return Changed;
 }
 





From lattner at cs.uiuc.edu  Mon Jun 12 16:51:09 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Mon, 12 Jun 2006 16:51:09 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp 
Message-ID: <200606122151.QAA30351@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/PowerPC:

PPCRegisterInfo.cpp updated: 1.67 -> 1.68
---
Log message:

Fix spilling and reloading of CR regs to reload the right values.  This fixes
Olden/power (and probably others) with -regalloc=local.


---
Diffs of the changes:  (+24 -2)

 PPCRegisterInfo.cpp |   26 ++++++++++++++++++++++++--
 1 files changed, 24 insertions(+), 2 deletions(-)


Index: llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
diff -u llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.67 llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.68
--- llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.67	Wed May 17 19:12:25 2006
+++ llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp	Mon Jun 12 16:50:57 2006
@@ -102,7 +102,19 @@
     BuildMI(MBB, MI, PPC::MFLR, 1, PPC::R11);
     addFrameReference(BuildMI(MBB, MI, PPC::STW, 3).addReg(PPC::R11), FrameIdx);
   } else if (RC == PPC::CRRCRegisterClass) {
+    // We need to store the CR in the low 4-bits of the saved value.  First,
+    // issue a MFCR to save all of the CRBits.
     BuildMI(MBB, MI, PPC::MFCR, 0, PPC::R11);
+    
+    // If the saved register wasn't CR0, shift the bits left so that they are in
+    // CR0's slot.
+    if (SrcReg != PPC::CR0) {
+      unsigned ShiftBits = PPCRegisterInfo::getRegisterNumbering(SrcReg)*4;
+      // rlwinm r11, r11, ShiftBits, 0, 31.
+      BuildMI(MBB, MI, PPC::RLWINM, 4, PPC::R11)
+        .addReg(PPC::R11).addImm(ShiftBits).addImm(0).addImm(31);
+    }
+    
     addFrameReference(BuildMI(MBB, MI, PPC::STW, 3).addReg(PPC::R11), FrameIdx);
   } else if (RC == PPC::GPRCRegisterClass) {
     addFrameReference(BuildMI(MBB, MI, PPC::STW, 3).addReg(SrcReg),FrameIdx);
@@ -137,6 +149,16 @@
     BuildMI(MBB, MI, PPC::MTLR, 1).addReg(PPC::R11);
   } else if (RC == PPC::CRRCRegisterClass) {
     addFrameReference(BuildMI(MBB, MI, PPC::LWZ, 2, PPC::R11), FrameIdx);
+    
+    // If the reloaded register isn't CR0, shift the bits right so that they are
+    // in the right CR's slot.
+    if (DestReg != PPC::CR0) {
+      unsigned ShiftBits = PPCRegisterInfo::getRegisterNumbering(DestReg)*4;
+      // rlwinm r11, r11, 32-ShiftBits, 0, 31.
+      BuildMI(MBB, MI, PPC::RLWINM, 4, PPC::R11)
+        .addReg(PPC::R11).addImm(32-ShiftBits).addImm(0).addImm(31);
+    }
+    
     BuildMI(MBB, MI, PPC::MTCRF, 1, DestReg).addReg(PPC::R11);
   } else if (RC == PPC::GPRCRegisterClass) {
     addFrameReference(BuildMI(MBB, MI, PPC::LWZ, 2, DestReg), FrameIdx);
@@ -407,8 +429,8 @@
 /// VRRegNo - Map from a numbered VR register to its enum value.
 ///
 static const unsigned short VRRegNo[] = {
- PPC::V0 , PPC::V1 , PPC::V2 , PPC::V3 , PPC::V4 , PPC::V5 , PPC::V6 , PPC::V7 , 
- PPC::V8 , PPC::V9 , PPC::V10, PPC::V11, PPC::V12, PPC::V13, PPC::V14, PPC::V15, 
+ PPC::V0 , PPC::V1 , PPC::V2 , PPC::V3 , PPC::V4 , PPC::V5 , PPC::V6 , PPC::V7 ,
+ PPC::V8 , PPC::V9 , PPC::V10, PPC::V11, PPC::V12, PPC::V13, PPC::V14, PPC::V15,
  PPC::V16, PPC::V17, PPC::V18, PPC::V19, PPC::V20, PPC::V21, PPC::V22, PPC::V23,
  PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31
 };





From lattner at cs.uiuc.edu  Mon Jun 12 18:59:28 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Mon, 12 Jun 2006 18:59:28 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp 
Message-ID: <200606122359.SAA31119@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/PowerPC:

PPCRegisterInfo.cpp updated: 1.68 -> 1.69
---
Log message:

Gaar!  Don't use r11 for CR save/restore, use R0.  R11 can be register 
allocated, thus live across the save/reload.  This fixes

llc-beta /MultiSource/Applications/spiff/spiff
llc-beta /MultiSource/Benchmarks/sim/sim:
llc-beta /MultiSource/Benchmarks/Ptrdist/bc/bc
llc-beta /MultiSource/Benchmarks/McCat/12-IOtest/iotest:
llc-beta /MultiSource/Benchmarks/FreeBench/fourinarow/fourinarow
llc-beta /MultiSource/Benchmarks/Fhourstones-3.1/fhourstones3.1
llc-beta /MultiSource/Benchmarks/mediabench/adpcm/rawdaudio/rawdaudio
llc-beta /MultiSource/Benchmarks/mediabench/adpcm/rawcaudio/rawcaudio
llc-beta /MultiSource/Benchmarks/mediabench/g721/g721encode/encode
llc-beta /MultiSource/Benchmarks/mediabench/jpeg/jpeg-6a/cjpeg

and probably others, with -regalloc=local.



---
Diffs of the changes:  (+11 -9)

 PPCRegisterInfo.cpp |   20 +++++++++++---------
 1 files changed, 11 insertions(+), 9 deletions(-)


Index: llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
diff -u llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.68 llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.69
--- llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.68	Mon Jun 12 16:50:57 2006
+++ llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp	Mon Jun 12 18:59:16 2006
@@ -102,20 +102,21 @@
     BuildMI(MBB, MI, PPC::MFLR, 1, PPC::R11);
     addFrameReference(BuildMI(MBB, MI, PPC::STW, 3).addReg(PPC::R11), FrameIdx);
   } else if (RC == PPC::CRRCRegisterClass) {
+    // FIXME: We use R0 here, because it isn't available for RA.
     // We need to store the CR in the low 4-bits of the saved value.  First,
     // issue a MFCR to save all of the CRBits.
-    BuildMI(MBB, MI, PPC::MFCR, 0, PPC::R11);
+    BuildMI(MBB, MI, PPC::MFCR, 0, PPC::R0);
     
     // If the saved register wasn't CR0, shift the bits left so that they are in
     // CR0's slot.
     if (SrcReg != PPC::CR0) {
       unsigned ShiftBits = PPCRegisterInfo::getRegisterNumbering(SrcReg)*4;
-      // rlwinm r11, r11, ShiftBits, 0, 31.
-      BuildMI(MBB, MI, PPC::RLWINM, 4, PPC::R11)
-        .addReg(PPC::R11).addImm(ShiftBits).addImm(0).addImm(31);
+      // rlwinm r0, r0, ShiftBits, 0, 31.
+      BuildMI(MBB, MI, PPC::RLWINM, 4, PPC::R0)
+        .addReg(PPC::R0).addImm(ShiftBits).addImm(0).addImm(31);
     }
     
-    addFrameReference(BuildMI(MBB, MI, PPC::STW, 3).addReg(PPC::R11), FrameIdx);
+    addFrameReference(BuildMI(MBB, MI, PPC::STW, 3).addReg(PPC::R0), FrameIdx);
   } else if (RC == PPC::GPRCRegisterClass) {
     addFrameReference(BuildMI(MBB, MI, PPC::STW, 3).addReg(SrcReg),FrameIdx);
   } else if (RC == PPC::G8RCRegisterClass) {
@@ -148,18 +149,19 @@
     addFrameReference(BuildMI(MBB, MI, PPC::LWZ, 2, PPC::R11), FrameIdx);
     BuildMI(MBB, MI, PPC::MTLR, 1).addReg(PPC::R11);
   } else if (RC == PPC::CRRCRegisterClass) {
-    addFrameReference(BuildMI(MBB, MI, PPC::LWZ, 2, PPC::R11), FrameIdx);
+    // FIXME: We use R0 here, because it isn't available for RA.
+    addFrameReference(BuildMI(MBB, MI, PPC::LWZ, 2, PPC::R0), FrameIdx);
     
     // If the reloaded register isn't CR0, shift the bits right so that they are
     // in the right CR's slot.
     if (DestReg != PPC::CR0) {
       unsigned ShiftBits = PPCRegisterInfo::getRegisterNumbering(DestReg)*4;
       // rlwinm r11, r11, 32-ShiftBits, 0, 31.
-      BuildMI(MBB, MI, PPC::RLWINM, 4, PPC::R11)
-        .addReg(PPC::R11).addImm(32-ShiftBits).addImm(0).addImm(31);
+      BuildMI(MBB, MI, PPC::RLWINM, 4, PPC::R0)
+        .addReg(PPC::R0).addImm(32-ShiftBits).addImm(0).addImm(31);
     }
     
-    BuildMI(MBB, MI, PPC::MTCRF, 1, DestReg).addReg(PPC::R11);
+    BuildMI(MBB, MI, PPC::MTCRF, 1, DestReg).addReg(PPC::R0);
   } else if (RC == PPC::GPRCRegisterClass) {
     addFrameReference(BuildMI(MBB, MI, PPC::LWZ, 2, DestReg), FrameIdx);
   } else if (RC == PPC::G8RCRegisterClass) {





From lattner at cs.uiuc.edu  Mon Jun 12 22:05:59 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Mon, 12 Jun 2006 22:05:59 -0500
Subject: [llvm-commits] CVS: llvm/docs/LangRef.html 
Message-ID: <200606130305.WAA32096@zion.cs.uiuc.edu>



Changes in directory llvm/docs:

LangRef.html updated: 1.153 -> 1.154
---
Log message:

Decribe the "implementation" keyword.


---
Diffs of the changes:  (+11 -1)

 LangRef.html |   12 +++++++++++-
 1 files changed, 11 insertions(+), 1 deletion(-)


Index: llvm/docs/LangRef.html
diff -u llvm/docs/LangRef.html:1.153 llvm/docs/LangRef.html:1.154
--- llvm/docs/LangRef.html:1.153	Fri May 19 16:15:36 2006
+++ llvm/docs/LangRef.html	Mon Jun 12 22:05:47 2006
@@ -350,6 +350,9 @@
 <i>; External declaration of the puts function</i>
 <a href="#functionstructure">declare</a> int %puts(sbyte*)                                            <i>; int(sbyte*)* </i>
 
+<i>; Global variable / Function body section separator</i>
+implementation
+
 <i>; Definition of main function</i>
 int %main() {                                                        <i>; int()* </i>
         <i>; Convert [13x sbyte]* to sbyte *...</i>
@@ -373,6 +376,13 @@
 array of char, and a pointer to a function), and have one of the following <a
 href="#linkage">linkage types</a>.</p>
 
+<p>Due to a limitation in the current LLVM assembly parser (it is limited by
+one-token lookahead), modules are split into two pieces by the "implementation"
+keyword.  Global variable prototypes and definitions must occur before the
+keyword, and function definitions must occur after it.  Function prototypes may
+occur either before or after it.  In the future, the implementation keyword may
+become a noop, if the parser gets smarter.</p>
+
 </div>
 
 <!-- ======================================================================= -->
@@ -3830,7 +3840,7 @@
 
   <a href="mailto:sabre at nondot.org">Chris Lattner</a><br>
   <a href="http://llvm.org">The LLVM Compiler Infrastructure</a><br>
-  Last modified: $Date: 2006/05/19 21:15:36 $
+  Last modified: $Date: 2006/06/13 03:05:47 $
 </address>
 </body>
 </html>





From lattner at cs.uiuc.edu  Mon Jun 12 22:11:00 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Mon, 12 Jun 2006 22:11:00 -0500
Subject: [llvm-commits] CVS: llvm/tools/bugpoint/BugDriver.cpp BugDriver.h
	ExecutionDriver.cpp OptimizerDriver.cpp bugpoint.cpp 
Message-ID: <200606130311.WAA32179@zion.cs.uiuc.edu>



Changes in directory llvm/tools/bugpoint:

BugDriver.cpp updated: 1.45 -> 1.46
BugDriver.h updated: 1.42 -> 1.43
ExecutionDriver.cpp updated: 1.60 -> 1.61
OptimizerDriver.cpp updated: 1.38 -> 1.39
bugpoint.cpp updated: 1.30 -> 1.31
---
Log message:

Teach bugpoint to kill optimization passes that run over the timeout limit,
which allows it to debug optimizer infinite loops.  This patch is contributed
by Nick Lewycky, thanks!


---
Diffs of the changes:  (+14 -12)

 BugDriver.cpp       |    5 +++--
 BugDriver.h         |    3 ++-
 ExecutionDriver.cpp |    9 ++-------
 OptimizerDriver.cpp |    2 +-
 bugpoint.cpp        |    7 ++++++-
 5 files changed, 14 insertions(+), 12 deletions(-)


Index: llvm/tools/bugpoint/BugDriver.cpp
diff -u llvm/tools/bugpoint/BugDriver.cpp:1.45 llvm/tools/bugpoint/BugDriver.cpp:1.46
--- llvm/tools/bugpoint/BugDriver.cpp:1.45	Tue Jun  6 17:30:59 2006
+++ llvm/tools/bugpoint/BugDriver.cpp	Mon Jun 12 22:10:48 2006
@@ -62,9 +62,10 @@
   return Result;
 }
 
-BugDriver::BugDriver(const char *toolname, bool as_child)
+BugDriver::BugDriver(const char *toolname, bool as_child, unsigned timeout)
   : ToolName(toolname), ReferenceOutputFile(OutputFile),
-    Program(0), Interpreter(0), cbe(0), gcc(0), run_as_child(as_child) {}
+    Program(0), Interpreter(0), cbe(0), gcc(0), run_as_child(as_child),
+    Timeout(timeout) {}
 
 
 /// ParseInputFile - Given a bytecode or assembly input filename, parse and


Index: llvm/tools/bugpoint/BugDriver.h
diff -u llvm/tools/bugpoint/BugDriver.h:1.42 llvm/tools/bugpoint/BugDriver.h:1.43
--- llvm/tools/bugpoint/BugDriver.h:1.42	Thu Dec 22 14:02:55 2005
+++ llvm/tools/bugpoint/BugDriver.h	Mon Jun 12 22:10:48 2006
@@ -48,13 +48,14 @@
   CBE *cbe;
   GCC *gcc;
   bool run_as_child;
+  unsigned Timeout;
 
   // FIXME: sort out public/private distinctions...
   friend class ReducePassList;
   friend class ReduceMisCodegenFunctions;
 
 public:
-  BugDriver(const char *toolname, bool as_child);
+  BugDriver(const char *toolname, bool as_child, unsigned timeout);
 
   const std::string &getToolName() const { return ToolName; }
 


Index: llvm/tools/bugpoint/ExecutionDriver.cpp
diff -u llvm/tools/bugpoint/ExecutionDriver.cpp:1.60 llvm/tools/bugpoint/ExecutionDriver.cpp:1.61
--- llvm/tools/bugpoint/ExecutionDriver.cpp:1.60	Tue Jun  6 17:30:59 2006
+++ llvm/tools/bugpoint/ExecutionDriver.cpp	Mon Jun 12 22:10:48 2006
@@ -63,11 +63,6 @@
                 cl::desc("Additional shared objects to load "
                          "into executing programs"));
 
-  cl::opt<unsigned>
-  TimeoutValue("timeout", cl::init(300), cl::value_desc("seconds"),
-               cl::desc("Number of seconds program is allowed to run before it "
-                        "is killed (default is 300s), 0 disables timeout"));
-
   cl::list<std::string>
     AdditionalLinkerArgs("Xlinker", 
       cl::desc("Additional arguments to pass to the linker"));
@@ -231,11 +226,11 @@
   if (InterpreterSel == RunLLC || InterpreterSel == RunCBE)
     RetVal = AI->ExecuteProgram(BytecodeFile, InputArgv, InputFile,
                                 OutputFile, AdditionalLinkerArgs, SharedObjs, 
-                                TimeoutValue);
+                                Timeout);
   else 
     RetVal = AI->ExecuteProgram(BytecodeFile, InputArgv, InputFile,
                                 OutputFile, std::vector<std::string>(), 
-                                SharedObjs, TimeoutValue);
+                                SharedObjs, Timeout);
 
   if (RetVal == -1) {
     std::cerr << "<timeout>";


Index: llvm/tools/bugpoint/OptimizerDriver.cpp
diff -u llvm/tools/bugpoint/OptimizerDriver.cpp:1.38 llvm/tools/bugpoint/OptimizerDriver.cpp:1.39
--- llvm/tools/bugpoint/OptimizerDriver.cpp:1.38	Sun May 14 14:11:40 2006
+++ llvm/tools/bugpoint/OptimizerDriver.cpp	Mon Jun 12 22:10:48 2006
@@ -179,7 +179,7 @@
   args[n++] = 0;
 
   sys::Path prog(sys::Program::FindProgramByName(ToolName));
-  int result = sys::Program::ExecuteAndWait(prog,args);
+  int result = sys::Program::ExecuteAndWait(prog,args,0,0,Timeout);
 
   // If we are supposed to delete the bytecode file or if the passes crashed,
   // remove it now.  This may fail if the file was never created, but that's ok.


Index: llvm/tools/bugpoint/bugpoint.cpp
diff -u llvm/tools/bugpoint/bugpoint.cpp:1.30 llvm/tools/bugpoint/bugpoint.cpp:1.31
--- llvm/tools/bugpoint/bugpoint.cpp:1.30	Wed Jun  7 18:06:50 2006
+++ llvm/tools/bugpoint/bugpoint.cpp	Mon Jun 12 22:10:48 2006
@@ -36,6 +36,11 @@
 InputFilenames(cl::Positional, cl::OneOrMore,
                cl::desc("<input llvm ll/bc files>"));
 
+static cl::opt<unsigned>
+TimeoutValue("timeout", cl::init(300), cl::value_desc("seconds"),
+             cl::desc("Number of seconds program is allowed to run before it "
+                      "is killed (default is 300s), 0 disables timeout"));
+
 // The AnalysesList is automatically populated with registered Passes by the
 // PassNameParser.
 //
@@ -57,7 +62,7 @@
   sys::PrintStackTraceOnErrorSignal();
   sys::SetInterruptFunction(BugpointInterruptFunction);
   
-  BugDriver D(argv[0],AsChild);
+  BugDriver D(argv[0],AsChild,TimeoutValue);
   if (D.addSources(InputFilenames)) return 1;
   D.addPasses(PassList.begin(), PassList.end());
 





From evan.cheng at apple.com  Tue Jun 13 00:14:56 2006
From: evan.cheng at apple.com (Evan Cheng)
Date: Tue, 13 Jun 2006 00:14:56 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86RegisterInfo.cpp 
Message-ID: <200606130514.AAA00310@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/X86:

X86RegisterInfo.cpp updated: 1.157 -> 1.158
---
Log message:

Cygwin support: use _alloca to allocate stack if > 4k. Patch by Anton Korobeynikov.

---
Diffs of the changes:  (+21 -4)

 X86RegisterInfo.cpp |   25 +++++++++++++++++++++----
 1 files changed, 21 insertions(+), 4 deletions(-)


Index: llvm/lib/Target/X86/X86RegisterInfo.cpp
diff -u llvm/lib/Target/X86/X86RegisterInfo.cpp:1.157 llvm/lib/Target/X86/X86RegisterInfo.cpp:1.158
--- llvm/lib/Target/X86/X86RegisterInfo.cpp:1.157	Tue Jun  6 18:30:24 2006
+++ llvm/lib/Target/X86/X86RegisterInfo.cpp	Tue Jun 13 00:14:44 2006
@@ -740,7 +740,7 @@
   const Function* Fn = MF.getFunction();
   const X86Subtarget* Subtarget = &MF.getTarget().getSubtarget<X86Subtarget>();
   MachineInstr *MI;
-
+  
   // Get the number of bytes to allocate from the FrameInfo
   unsigned NumBytes = MFI->getStackSize();
   if (MFI->hasCalls() || MF.getFrameInfo()->hasVarSizedObjects()) {
@@ -760,9 +760,20 @@
   MFI->setStackSize(NumBytes);
 
   if (NumBytes) {   // adjust stack pointer: ESP -= numbytes
-    unsigned Opc = NumBytes < 128 ? X86::SUB32ri8 : X86::SUB32ri;
-    MI = BuildMI(Opc, 1, X86::ESP,MachineOperand::UseAndDef).addImm(NumBytes);
-    MBB.insert(MBBI, MI);
+    if (NumBytes >= 4096 && Subtarget->TargetType == X86Subtarget::isCygwin) {
+      // Function prologue calls _alloca to probe the stack when allocating  
+      // more than 4k bytes in one go. Touching the stack at 4K increments is  
+      // necessary to ensure that the guard pages used by the OS virtual memory
+      // manager are allocated in correct sequence.
+      MI = BuildMI(X86::MOV32ri, 2, X86::EAX).addImm(NumBytes);
+      MBB.insert(MBBI, MI);
+      MI = BuildMI(X86::CALLpcrel32, 1).addExternalSymbol("_alloca");
+      MBB.insert(MBBI, MI);
+    } else {
+      unsigned Opc = NumBytes < 128 ? X86::SUB32ri8 : X86::SUB32ri;
+      MI = BuildMI(Opc, 1, X86::ESP,MachineOperand::UseAndDef).addImm(NumBytes);
+      MBB.insert(MBBI, MI);
+    }
   }
 
   if (hasFP(MF)) {
@@ -789,6 +800,12 @@
       Subtarget->TargetType == X86Subtarget::isCygwin) {
     MI = BuildMI(X86::AND32ri, 2, X86::ESP).addImm(-Align);
     MBB.insert(MBBI, MI);
+
+    // Probe the stack
+    MI = BuildMI(X86::MOV32ri, 2, X86::EAX).addImm(Align);
+    MBB.insert(MBBI, MI);
+    MI = BuildMI(X86::CALLpcrel32, 1).addExternalSymbol("_alloca");
+    MBB.insert(MBBI, MI);
   }
 }
 





From sabre at nondot.org  Tue Jun 13 00:34:27 2006
From: sabre at nondot.org (Chris Lattner)
Date: Tue, 13 Jun 2006 00:34:27 -0500 (CDT)
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86RegisterInfo.cpp 
In-Reply-To: <200606130514.AAA00310@zion.cs.uiuc.edu>
References: <200606130514.AAA00310@zion.cs.uiuc.edu>
Message-ID: <Pine.LNX.4.61.0606130034170.23038@nondot.org>


Does this fix PR331?

-Chris

On Tue, 13 Jun 2006, Evan Cheng wrote:

>
>
> Changes in directory llvm/lib/Target/X86:
>
> X86RegisterInfo.cpp updated: 1.157 -> 1.158
> ---
> Log message:
>
> Cygwin support: use _alloca to allocate stack if > 4k. Patch by Anton Korobeynikov.
>
> ---
> Diffs of the changes:  (+21 -4)
>
> X86RegisterInfo.cpp |   25 +++++++++++++++++++++----
> 1 files changed, 21 insertions(+), 4 deletions(-)
>
>
> Index: llvm/lib/Target/X86/X86RegisterInfo.cpp
> diff -u llvm/lib/Target/X86/X86RegisterInfo.cpp:1.157 llvm/lib/Target/X86/X86RegisterInfo.cpp:1.158
> --- llvm/lib/Target/X86/X86RegisterInfo.cpp:1.157	Tue Jun  6 18:30:24 2006
> +++ llvm/lib/Target/X86/X86RegisterInfo.cpp	Tue Jun 13 00:14:44 2006
> @@ -740,7 +740,7 @@
>   const Function* Fn = MF.getFunction();
>   const X86Subtarget* Subtarget = &MF.getTarget().getSubtarget<X86Subtarget>();
>   MachineInstr *MI;
> -
> +
>   // Get the number of bytes to allocate from the FrameInfo
>   unsigned NumBytes = MFI->getStackSize();
>   if (MFI->hasCalls() || MF.getFrameInfo()->hasVarSizedObjects()) {
> @@ -760,9 +760,20 @@
>   MFI->setStackSize(NumBytes);
>
>   if (NumBytes) {   // adjust stack pointer: ESP -= numbytes
> -    unsigned Opc = NumBytes < 128 ? X86::SUB32ri8 : X86::SUB32ri;
> -    MI = BuildMI(Opc, 1, X86::ESP,MachineOperand::UseAndDef).addImm(NumBytes);
> -    MBB.insert(MBBI, MI);
> +    if (NumBytes >= 4096 && Subtarget->TargetType == X86Subtarget::isCygwin) {
> +      // Function prologue calls _alloca to probe the stack when allocating
> +      // more than 4k bytes in one go. Touching the stack at 4K increments is
> +      // necessary to ensure that the guard pages used by the OS virtual memory
> +      // manager are allocated in correct sequence.
> +      MI = BuildMI(X86::MOV32ri, 2, X86::EAX).addImm(NumBytes);
> +      MBB.insert(MBBI, MI);
> +      MI = BuildMI(X86::CALLpcrel32, 1).addExternalSymbol("_alloca");
> +      MBB.insert(MBBI, MI);
> +    } else {
> +      unsigned Opc = NumBytes < 128 ? X86::SUB32ri8 : X86::SUB32ri;
> +      MI = BuildMI(Opc, 1, X86::ESP,MachineOperand::UseAndDef).addImm(NumBytes);
> +      MBB.insert(MBBI, MI);
> +    }
>   }
>
>   if (hasFP(MF)) {
> @@ -789,6 +800,12 @@
>       Subtarget->TargetType == X86Subtarget::isCygwin) {
>     MI = BuildMI(X86::AND32ri, 2, X86::ESP).addImm(-Align);
>     MBB.insert(MBBI, MI);
> +
> +    // Probe the stack
> +    MI = BuildMI(X86::MOV32ri, 2, X86::EAX).addImm(Align);
> +    MBB.insert(MBBI, MI);
> +    MI = BuildMI(X86::CALLpcrel32, 1).addExternalSymbol("_alloca");
> +    MBB.insert(MBBI, MI);
>   }
> }
>
>
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>

-Chris

-- 
http://nondot.org/sabre/
http://llvm.org/


From sabre at nondot.org  Tue Jun 13 00:35:57 2006
From: sabre at nondot.org (Chris Lattner)
Date: Tue, 13 Jun 2006 00:35:57 -0500 (CDT)
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86RegisterInfo.cpp 
In-Reply-To: <Pine.LNX.4.61.0606130034170.23038@nondot.org>
References: <200606130514.AAA00310@zion.cs.uiuc.edu>
	<Pine.LNX.4.61.0606130034170.23038@nondot.org>
Message-ID: <Pine.LNX.4.61.0606130035350.23038@nondot.org>

On Tue, 13 Jun 2006, Chris Lattner wrote:
> Does this fix PR331?

Actually no, I don't think it does.  Dynamic alloca lowering would also 
need to be updated.  That would be a logical next step :)

-Chris

> -Chris
>
> On Tue, 13 Jun 2006, Evan Cheng wrote:
>
>> 
>> 
>> Changes in directory llvm/lib/Target/X86:
>> 
>> X86RegisterInfo.cpp updated: 1.157 -> 1.158
>> ---
>> Log message:
>> 
>> Cygwin support: use _alloca to allocate stack if > 4k. Patch by Anton 
>> Korobeynikov.
>> 
>> ---
>> Diffs of the changes:  (+21 -4)
>> 
>> X86RegisterInfo.cpp |   25 +++++++++++++++++++++----
>> 1 files changed, 21 insertions(+), 4 deletions(-)
>> 
>> 
>> Index: llvm/lib/Target/X86/X86RegisterInfo.cpp
>> diff -u llvm/lib/Target/X86/X86RegisterInfo.cpp:1.157 
>> llvm/lib/Target/X86/X86RegisterInfo.cpp:1.158
>> --- llvm/lib/Target/X86/X86RegisterInfo.cpp:1.157	Tue Jun  6 18:30:24 
>> 2006
>> +++ llvm/lib/Target/X86/X86RegisterInfo.cpp	Tue Jun 13 00:14:44 2006
>> @@ -740,7 +740,7 @@
>>   const Function* Fn = MF.getFunction();
>>   const X86Subtarget* Subtarget = 
>> &MF.getTarget().getSubtarget<X86Subtarget>();
>>   MachineInstr *MI;
>> -
>> +
>>   // Get the number of bytes to allocate from the FrameInfo
>>   unsigned NumBytes = MFI->getStackSize();
>>   if (MFI->hasCalls() || MF.getFrameInfo()->hasVarSizedObjects()) {
>> @@ -760,9 +760,20 @@
>>   MFI->setStackSize(NumBytes);
>> 
>>   if (NumBytes) {   // adjust stack pointer: ESP -= numbytes
>> -    unsigned Opc = NumBytes < 128 ? X86::SUB32ri8 : X86::SUB32ri;
>> -    MI = BuildMI(Opc, 1, 
>> X86::ESP,MachineOperand::UseAndDef).addImm(NumBytes);
>> -    MBB.insert(MBBI, MI);
>> +    if (NumBytes >= 4096 && Subtarget->TargetType == 
>> X86Subtarget::isCygwin) {
>> +      // Function prologue calls _alloca to probe the stack when 
>> allocating
>> +      // more than 4k bytes in one go. Touching the stack at 4K increments 
>> is
>> +      // necessary to ensure that the guard pages used by the OS virtual 
>> memory
>> +      // manager are allocated in correct sequence.
>> +      MI = BuildMI(X86::MOV32ri, 2, X86::EAX).addImm(NumBytes);
>> +      MBB.insert(MBBI, MI);
>> +      MI = BuildMI(X86::CALLpcrel32, 1).addExternalSymbol("_alloca");
>> +      MBB.insert(MBBI, MI);
>> +    } else {
>> +      unsigned Opc = NumBytes < 128 ? X86::SUB32ri8 : X86::SUB32ri;
>> +      MI = BuildMI(Opc, 1, 
>> X86::ESP,MachineOperand::UseAndDef).addImm(NumBytes);
>> +      MBB.insert(MBBI, MI);
>> +    }
>>   }
>> 
>>   if (hasFP(MF)) {
>> @@ -789,6 +800,12 @@
>>       Subtarget->TargetType == X86Subtarget::isCygwin) {
>>     MI = BuildMI(X86::AND32ri, 2, X86::ESP).addImm(-Align);
>>     MBB.insert(MBBI, MI);
>> +
>> +    // Probe the stack
>> +    MI = BuildMI(X86::MOV32ri, 2, X86::EAX).addImm(Align);
>> +    MBB.insert(MBBI, MI);
>> +    MI = BuildMI(X86::CALLpcrel32, 1).addExternalSymbol("_alloca");
>> +    MBB.insert(MBBI, MI);
>>   }
>> }
>> 
>> 
>> 
>> 
>> _______________________________________________
>> llvm-commits mailing list
>> llvm-commits at cs.uiuc.edu
>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>> 
>
> -Chris
>
>

-Chris

-- 
http://nondot.org/sabre/
http://llvm.org/


From jlaskey at apple.com  Tue Jun 13 08:09:24 2006
From: jlaskey at apple.com (Jim Laskey)
Date: Tue, 13 Jun 2006 08:09:24 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/TargetLowering.cpp 
Message-ID: <200606131309.IAA02502@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target:

TargetLowering.cpp updated: 1.67 -> 1.68
---
Log message:

TargetLowering::ComputeMaskedBits was not clearing reciprocal bits on shifts.





---
Diffs of the changes:  (+11 -6)

 TargetLowering.cpp |   17 +++++++++++------
 1 files changed, 11 insertions(+), 6 deletions(-)


Index: llvm/lib/Target/TargetLowering.cpp
diff -u llvm/lib/Target/TargetLowering.cpp:1.67 llvm/lib/Target/TargetLowering.cpp:1.68
--- llvm/lib/Target/TargetLowering.cpp:1.67	Mon Jun 12 11:07:18 2006
+++ llvm/lib/Target/TargetLowering.cpp	Tue Jun 13 08:08:58 2006
@@ -780,12 +780,14 @@
   case ISD::SHL:
     // (shl X, C1) & C2 == 0   iff   (X & C2 >>u C1) == 0
     if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
+      uint64_t LowBits = (1ULL << SA->getValue())-1;
       Mask >>= SA->getValue();
       ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1);
       assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 
       KnownZero <<= SA->getValue();
       KnownOne  <<= SA->getValue();
-      KnownZero |= (1ULL << SA->getValue())-1;  // low bits known zero.
+      KnownZero |= LowBits;  // low bits known zero
+      KnownOne &= ~LowBits;  // and known not to be one.
     }
     return;
   case ISD::SRL:
@@ -798,7 +800,8 @@
       assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 
       KnownZero >>= SA->getValue();
       KnownOne  >>= SA->getValue();
-      KnownZero |= HighBits;  // high bits known zero.
+      KnownZero |= HighBits;  // high bits known zero
+      KnownOne  &= ~HighBits; // and known not to be one.
     }
     return;
   case ISD::SRA:
@@ -815,10 +818,12 @@
       uint64_t SignBit = 1ULL << (MVT::getSizeInBits(Op.getValueType())-1);
       SignBit >>= SA->getValue();  // Adjust to where it is now in the mask.
       
-      if (KnownZero & SignBit) {       // New bits are known zero.
-        KnownZero |= HighBits;
-      } else if (KnownOne & SignBit) { // New bits are known one.
-        KnownOne |= HighBits;
+      if (KnownZero & SignBit) {       
+        KnownZero |= HighBits;  // New bits are known zero
+        KnownOne  &= ~HighBits; // and known not to be one.
+      } else if (KnownOne & SignBit) {
+        KnownOne  |= HighBits;  // New bits are known one
+        KnownZero &= ~HighBits; // and known not to be zero.
       }
     }
     return;





From jlaskey at apple.com  Tue Jun 13 08:10:56 2006
From: jlaskey at apple.com (Jim Laskey)
Date: Tue, 13 Jun 2006 08:10:56 -0500
Subject: [llvm-commits] 
	CVS: llvm/test/Regression/CodeGen/Generic/2006-06-13-ComputeMaskedBitsCrash.ll
Message-ID: <200606131310.IAA02618@zion.cs.uiuc.edu>



Changes in directory llvm/test/Regression/CodeGen/Generic:

2006-06-13-ComputeMaskedBitsCrash.ll added (r1.1)
---
Log message:

Tests to make sure that ComputeMaskedBits discards bits for shifts.


---
Diffs of the changes:  (+50 -0)

 2006-06-13-ComputeMaskedBitsCrash.ll |   50 +++++++++++++++++++++++++++++++++++
 1 files changed, 50 insertions(+)


Index: llvm/test/Regression/CodeGen/Generic/2006-06-13-ComputeMaskedBitsCrash.ll
diff -c /dev/null llvm/test/Regression/CodeGen/Generic/2006-06-13-ComputeMaskedBitsCrash.ll:1.1
*** /dev/null	Tue Jun 13 08:10:54 2006
--- llvm/test/Regression/CodeGen/Generic/2006-06-13-ComputeMaskedBitsCrash.ll	Tue Jun 13 08:10:44 2006
***************
*** 0 ****
--- 1,50 ----
+ ; RUN: llvm-as < %s | llc -fast
+ 
+ uint %test1(uint %tmp1) {
+   %tmp2 = or uint %tmp1, 2147483648
+   %tmp3 = shr uint %tmp2, ubyte 31
+   %tmp4 = and uint %tmp3, 2147483648
+   %tmp5 = seteq uint %tmp4, 0
+   br bool %tmp5, label %cond_true, label %cond_false
+   
+ cond_true:
+   ret uint %tmp1
+   
+ cond_false:
+ 
+   ret uint %tmp2
+ }
+ 
+ 
+ uint %test2(uint %tmp1) {
+   %tmp2 = or uint %tmp1, 2147483648
+   %tmp3 = cast uint %tmp2 to int
+   %tmp4 = shr int %tmp3, ubyte 31
+   %tmp5 = cast int %tmp4 to uint
+   %tmp6 = and uint %tmp5, 2147483648
+   %tmp7 = seteq uint %tmp6, 0
+   br bool %tmp7, label %cond_true, label %cond_false
+   
+ cond_true:
+   ret uint %tmp1
+   
+ cond_false:
+ 
+   ret uint %tmp2
+ }
+ 
+ 
+ uint %test3(uint %tmp1) {
+   %tmp2 = or uint %tmp1, 1
+   %tmp3 = shl uint %tmp2, ubyte 31
+   %tmp4 = and uint %tmp3, 1
+   %tmp5 = seteq uint %tmp4, 0
+   br bool %tmp5, label %cond_true, label %cond_false
+   
+ cond_true:
+   ret uint %tmp1
+   
+ cond_false:
+ 
+   ret uint %tmp2
+ }





From jlaskey at apple.com  Tue Jun 13 10:23:01 2006
From: jlaskey at apple.com (Jim Laskey)
Date: Tue, 13 Jun 2006 10:23:01 -0500
Subject: [llvm-commits] 
	CVS: llvm/test/Regression/CodeGen/Generic/2006-06-13-ComputeMaskedBitsCrash.ll
Message-ID: <200606131523.KAA14635@zion.cs.uiuc.edu>



Changes in directory llvm/test/Regression/CodeGen/Generic:

2006-06-13-ComputeMaskedBitsCrash.ll updated: 1.1 -> 1.2
---
Log message:

My original test case was bogus.  Reverting to crasher case.


---
Diffs of the changes:  (+31 -44)

 2006-06-13-ComputeMaskedBitsCrash.ll |   75 ++++++++++++++---------------------
 1 files changed, 31 insertions(+), 44 deletions(-)


Index: llvm/test/Regression/CodeGen/Generic/2006-06-13-ComputeMaskedBitsCrash.ll
diff -u llvm/test/Regression/CodeGen/Generic/2006-06-13-ComputeMaskedBitsCrash.ll:1.1 llvm/test/Regression/CodeGen/Generic/2006-06-13-ComputeMaskedBitsCrash.ll:1.2
--- llvm/test/Regression/CodeGen/Generic/2006-06-13-ComputeMaskedBitsCrash.ll:1.1	Tue Jun 13 08:10:44 2006
+++ llvm/test/Regression/CodeGen/Generic/2006-06-13-ComputeMaskedBitsCrash.ll	Tue Jun 13 10:22:49 2006
@@ -1,50 +1,37 @@
 ; RUN: llvm-as < %s | llc -fast
 
-uint %test1(uint %tmp1) {
-  %tmp2 = or uint %tmp1, 2147483648
-  %tmp3 = shr uint %tmp2, ubyte 31
-  %tmp4 = and uint %tmp3, 2147483648
-  %tmp5 = seteq uint %tmp4, 0
-  br bool %tmp5, label %cond_true, label %cond_false
-  
-cond_true:
-  ret uint %tmp1
-  
-cond_false:
-
-  ret uint %tmp2
-}
-
-
-uint %test2(uint %tmp1) {
-  %tmp2 = or uint %tmp1, 2147483648
-  %tmp3 = cast uint %tmp2 to int
-  %tmp4 = shr int %tmp3, ubyte 31
-  %tmp5 = cast int %tmp4 to uint
-  %tmp6 = and uint %tmp5, 2147483648
-  %tmp7 = seteq uint %tmp6, 0
-  br bool %tmp7, label %cond_true, label %cond_false
-  
-cond_true:
-  ret uint %tmp1
-  
-cond_false:
-
-  ret uint %tmp2
-}
+	%struct.cl_perfunc_opts = type { ubyte, ubyte, ubyte, ubyte, ubyte, ubyte, ubyte, ubyte, ubyte, ubyte, ubyte, ubyte, int, int, int, int, int, int, int }
+%cl_pf_opts = external global %struct.cl_perfunc_opts		; <%struct.cl_perfunc_opts*> [#uses=2]
 
+implementation   ; Functions:
 
-uint %test3(uint %tmp1) {
-  %tmp2 = or uint %tmp1, 1
-  %tmp3 = shl uint %tmp2, ubyte 31
-  %tmp4 = and uint %tmp3, 1
-  %tmp5 = seteq uint %tmp4, 0
-  br bool %tmp5, label %cond_true, label %cond_false
-  
-cond_true:
-  ret uint %tmp1
-  
-cond_false:
+void %set_flags_from_O() {
+entry:
+	%tmp22 = setgt int 0, 0		; <bool> [#uses=1]
+	br bool %tmp22, label %cond_true23, label %cond_next159
+
+cond_true23:		; preds = %entry
+	%tmp138 = getelementptr %struct.cl_perfunc_opts* %cl_pf_opts, int 0, uint 8		; <ubyte*> [#uses=1]
+	%tmp138 = cast ubyte* %tmp138 to uint*		; <uint*> [#uses=2]
+	%tmp139 = load uint* %tmp138		; <uint> [#uses=1]
+	%tmp140 = shl uint 1, ubyte 27		; <uint> [#uses=1]
+	%tmp141 = and uint %tmp140, 134217728		; <uint> [#uses=1]
+	%tmp142 = and uint %tmp139, 4160749567		; <uint> [#uses=1]
+	%tmp143 = or uint %tmp142, %tmp141		; <uint> [#uses=1]
+	store uint %tmp143, uint* %tmp138
+	%tmp144 = getelementptr %struct.cl_perfunc_opts* %cl_pf_opts, int 0, uint 8		; <ubyte*> [#uses=1]
+	%tmp144 = cast ubyte* %tmp144 to uint*		; <uint*> [#uses=1]
+	%tmp145 = load uint* %tmp144		; <uint> [#uses=1]
+	%tmp146 = shl uint %tmp145, ubyte 22		; <uint> [#uses=1]
+	%tmp147 = shr uint %tmp146, ubyte 31		; <uint> [#uses=1]
+	%tmp147 = cast uint %tmp147 to ubyte		; <ubyte> [#uses=1]
+	%tmp148 = seteq ubyte %tmp147, 0		; <bool> [#uses=1]
+	br bool %tmp148, label %cond_true149, label %cond_next159
+
+cond_true149:		; preds = %cond_true23
+	%tmp150 = cast ubyte* null to uint*		; <uint*> [#uses=0]
+	ret void
 
-  ret uint %tmp2
+cond_next159:		; preds = %cond_true23, %entry
+	ret void
 }





From lattner at cs.uiuc.edu  Tue Jun 13 11:52:49 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue, 13 Jun 2006 11:52:49 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/TargetLowering.cpp 
Message-ID: <200606131652.LAA15096@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target:

TargetLowering.cpp updated: 1.68 -> 1.69
---
Log message:

Port some bugfixes in shift handling from SimplifyDemandedBits over to 
ComputeMaskedBits.  DemandedMasks and KnownZero/One masks should never have
bits set out of the range of the base datatype.


---
Diffs of the changes:  (+51 -35)

 TargetLowering.cpp |   86 +++++++++++++++++++++++++++++++----------------------
 1 files changed, 51 insertions(+), 35 deletions(-)


Index: llvm/lib/Target/TargetLowering.cpp
diff -u llvm/lib/Target/TargetLowering.cpp:1.68 llvm/lib/Target/TargetLowering.cpp:1.69
--- llvm/lib/Target/TargetLowering.cpp:1.68	Tue Jun 13 08:08:58 2006
+++ llvm/lib/Target/TargetLowering.cpp	Tue Jun 13 11:52:37 2006
@@ -442,10 +442,7 @@
       unsigned ShAmt = SA->getValue();
       
       // Compute the new bits that are at the top now.
-      uint64_t HighBits = (1ULL << ShAmt)-1;
-      HighBits <<= MVT::getSizeInBits(VT) - ShAmt;
       uint64_t TypeMask = MVT::getIntVTBitMask(VT);
-      
       if (SimplifyDemandedBits(Op.getOperand(0), 
                                (DemandedMask << ShAmt) & TypeMask,
                                KnownZero, KnownOne, TLO, Depth+1))
@@ -455,7 +452,10 @@
       KnownOne  &= TypeMask;
       KnownZero >>= ShAmt;
       KnownOne  >>= ShAmt;
-      KnownZero |= HighBits;  // high bits known zero.
+
+      uint64_t HighBits = (1ULL << ShAmt)-1;
+      HighBits <<= MVT::getSizeInBits(VT) - ShAmt;
+      KnownZero |= HighBits;  // High bits known zero.
     }
     break;
   case ISD::SRA:
@@ -464,14 +464,14 @@
       unsigned ShAmt = SA->getValue();
       
       // Compute the new bits that are at the top now.
-      uint64_t HighBits = (1ULL << ShAmt)-1;
-      HighBits <<= MVT::getSizeInBits(VT) - ShAmt;
       uint64_t TypeMask = MVT::getIntVTBitMask(VT);
       
       uint64_t InDemandedMask = (DemandedMask << ShAmt) & TypeMask;
 
       // If any of the demanded bits are produced by the sign extension, we also
       // demand the input sign bit.
+      uint64_t HighBits = (1ULL << ShAmt)-1;
+      HighBits <<= MVT::getSizeInBits(VT) - ShAmt;
       if (HighBits & DemandedMask)
         InDemandedMask |= MVT::getIntVTSignBit(VT);
       
@@ -481,12 +481,12 @@
       assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 
       KnownZero &= TypeMask;
       KnownOne  &= TypeMask;
-      KnownZero >>= SA->getValue();
-      KnownOne  >>= SA->getValue();
+      KnownZero >>= ShAmt;
+      KnownOne  >>= ShAmt;
       
       // Handle the sign bits.
       uint64_t SignBit = MVT::getIntVTSignBit(VT);
-      SignBit >>= SA->getValue();  // Adjust to where it is now in the mask.
+      SignBit >>= ShAmt;  // Adjust to where it is now in the mask.
       
       // If the input sign bit is known to be zero, or if none of the top bits
       // are demanded, turn this into an unsigned shift right.
@@ -780,50 +780,66 @@
   case ISD::SHL:
     // (shl X, C1) & C2 == 0   iff   (X & C2 >>u C1) == 0
     if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
-      uint64_t LowBits = (1ULL << SA->getValue())-1;
-      Mask >>= SA->getValue();
-      ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1);
+      ComputeMaskedBits(Op.getOperand(0), Mask >> SA->getValue(),
+                        KnownZero, KnownOne, Depth+1);
       assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 
       KnownZero <<= SA->getValue();
       KnownOne  <<= SA->getValue();
-      KnownZero |= LowBits;  // low bits known zero
-      KnownOne &= ~LowBits;  // and known not to be one.
+      KnownZero |= (1ULL << SA->getValue())-1;  // low bits known zero.
     }
     return;
   case ISD::SRL:
     // (ushr X, C1) & C2 == 0   iff  (-1 >> C1) & C2 == 0
     if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
-      uint64_t HighBits = (1ULL << SA->getValue())-1;
-      HighBits <<= MVT::getSizeInBits(Op.getValueType())-SA->getValue();
-      Mask <<= SA->getValue();
-      ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1);
+      MVT::ValueType VT = Op.getValueType();
+      unsigned ShAmt = SA->getValue();
+
+      uint64_t TypeMask = MVT::getIntVTBitMask(VT);
+      ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt) & TypeMask,
+                        KnownZero, KnownOne, Depth+1);
       assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 
-      KnownZero >>= SA->getValue();
-      KnownOne  >>= SA->getValue();
-      KnownZero |= HighBits;  // high bits known zero
-      KnownOne  &= ~HighBits; // and known not to be one.
+      KnownZero &= TypeMask;
+      KnownOne  &= TypeMask;
+      KnownZero >>= ShAmt;
+      KnownOne  >>= ShAmt;
+
+      uint64_t HighBits = (1ULL << ShAmt)-1;
+      HighBits <<= MVT::getSizeInBits(VT)-ShAmt;
+      KnownZero |= HighBits;  // High bits known zero.
     }
     return;
   case ISD::SRA:
     if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
-      uint64_t HighBits = (1ULL << SA->getValue())-1;
-      HighBits <<= MVT::getSizeInBits(Op.getValueType())-SA->getValue();
-      Mask <<= SA->getValue();
-      ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1);
-      assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 
-      KnownZero >>= SA->getValue();
-      KnownOne  >>= SA->getValue();
+      MVT::ValueType VT = Op.getValueType();
+      unsigned ShAmt = SA->getValue();
+
+      // Compute the new bits that are at the top now.
+      uint64_t TypeMask = MVT::getIntVTBitMask(VT);
+
+      uint64_t InDemandedMask = (Mask << ShAmt) & TypeMask;
+      // If any of the demanded bits are produced by the sign extension, we also
+      // demand the input sign bit.
+      uint64_t HighBits = (1ULL << ShAmt)-1;
+      HighBits <<= MVT::getSizeInBits(VT) - ShAmt;
+      if (HighBits & Mask)
+        InDemandedMask |= MVT::getIntVTSignBit(VT);
+      
+      ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne,
+                        Depth+1);
+      assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 
+      KnownZero &= TypeMask;
+      KnownOne  &= TypeMask;
+      KnownZero >>= ShAmt;
+      KnownOne  >>= ShAmt;
       
       // Handle the sign bits.
-      uint64_t SignBit = 1ULL << (MVT::getSizeInBits(Op.getValueType())-1);
-      SignBit >>= SA->getValue();  // Adjust to where it is now in the mask.
+      uint64_t SignBit = MVT::getIntVTSignBit(VT);
+      SignBit >>= ShAmt;  // Adjust to where it is now in the mask.
       
       if (KnownZero & SignBit) {       
-        KnownZero |= HighBits;  // New bits are known zero
-        KnownOne  &= ~HighBits; // and known not to be one.
+        KnownZero |= HighBits;  // New bits are known zero.
       } else if (KnownOne & SignBit) {
-        KnownOne  |= HighBits;  // New bits are known one
-        KnownZero &= ~HighBits; // and known not to be zero.
+        KnownOne  |= HighBits;  // New bits are known one.
       }
     }
     return;





From alenhar2 at cs.uiuc.edu  Tue Jun 13 13:27:51 2006
From: alenhar2 at cs.uiuc.edu (Andrew Lenharth)
Date: Tue, 13 Jun 2006 13:27:51 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp
	AlphaISelLowering.cpp AlphaISelLowering.h 
Message-ID: <200606131827.NAA15721@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/Alpha:

AlphaISelDAGToDAG.cpp updated: 1.43 -> 1.44
AlphaISelLowering.cpp updated: 1.50 -> 1.51
AlphaISelLowering.h updated: 1.17 -> 1.18
---
Log message:

It really helps to be returning to the correct place

---
Diffs of the changes:  (+17 -33)

 AlphaISelDAGToDAG.cpp |   32 +++++---------------------------
 AlphaISelLowering.cpp |   15 +++++++++------
 AlphaISelLowering.h   |    3 +++
 3 files changed, 17 insertions(+), 33 deletions(-)


Index: llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp
diff -u llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:1.43 llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:1.44
--- llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:1.43	Fri May 26 18:10:12 2006
+++ llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp	Tue Jun 13 13:27:39 2006
@@ -124,7 +124,7 @@
     
 private:
     SDOperand getGlobalBaseReg();
-    SDOperand getRASaveReg();
+    SDOperand getGlobalRetAddr();
     SDOperand SelectCALL(SDOperand Op);
 
   };
@@ -141,7 +141,7 @@
 
 /// getRASaveReg - Grab the return address
 ///
-SDOperand AlphaDAGToDAGISel::getRASaveReg() {
+SDOperand AlphaDAGToDAGISel::getGlobalRetAddr() {
   return CurDAG->getCopyFromReg(CurDAG->getEntryNode(),
                                 AlphaLowering.getVRegRA(), 
                                 MVT::i64);
@@ -197,6 +197,9 @@
   case AlphaISD::GlobalBaseReg: 
     Result = getGlobalBaseReg();
     return;
+  case AlphaISD::GlobalRetAddr:
+    Result = getGlobalRetAddr();
+    return;
   
   case AlphaISD::DivCall: {
     SDOperand Chain = CurDAG->getEntryNode();
@@ -226,30 +229,6 @@
     return;
   }
 
-  case ISD::RET: {
-    SDOperand Chain;
-    Select(Chain, N->getOperand(0));     // Token chain.
-    SDOperand InFlag(0,0);
-
-    if (N->getNumOperands() == 3) {
-      SDOperand Val;
-      Select(Val, N->getOperand(1));
-      if (N->getOperand(1).getValueType() == MVT::i64) {
-        Chain = CurDAG->getCopyToReg(Chain, Alpha::R0, Val, InFlag);
-        InFlag = Chain.getValue(1);
-      } else if (N->getOperand(1).getValueType() == MVT::f64 ||
-                 N->getOperand(1).getValueType() == MVT::f32) {
-        Chain = CurDAG->getCopyToReg(Chain, Alpha::F0, Val, InFlag);
-        InFlag = Chain.getValue(1);
-      }
-    }
-    Chain = CurDAG->getCopyToReg(Chain, Alpha::R26, getRASaveReg(), InFlag);
-    InFlag = Chain.getValue(1);
-    
-    // Finally, select this to a ret instruction.
-    Result = CurDAG->SelectNodeTo(N, Alpha::RETDAG, MVT::Other, Chain, InFlag);
-    return;
-  }
   case ISD::Constant: {
     uint64_t uval = cast<ConstantSDNode>(N)->getValue();
     
@@ -469,7 +448,6 @@
        assert(0 && "Unknown operand"); 
    }
 
-
    // Finally, once everything is in registers to pass to the call, emit the
    // call itself.
    if (Addr.getOpcode() == AlphaISD::GPRelLo) {


Index: llvm/lib/Target/Alpha/AlphaISelLowering.cpp
diff -u llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.50 llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.51
--- llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.50	Mon Jun 12 13:09:24 2006
+++ llvm/lib/Target/Alpha/AlphaISelLowering.cpp	Tue Jun 13 13:27:39 2006
@@ -154,6 +154,7 @@
   case AlphaISD::GPRelLo: return "Alpha::GPRelLo";
   case AlphaISD::RelLit: return "Alpha::RelLit";
   case AlphaISD::GlobalBaseReg: return "Alpha::GlobalBaseReg";
+  case AlphaISD::GlobalRetAddr: return "Alpha::GlobalRetAddr";
   case AlphaISD::CALL:   return "Alpha::CALL";
   case AlphaISD::DivCall: return "Alpha::DivCall";
   case AlphaISD::RET_FLAG: return "Alpha::RET_FLAG";
@@ -268,14 +269,17 @@
   return DAG.getNode(ISD::MERGE_VALUES, RetVT, ArgValues);
 }
 
-static SDOperand LowerRET(SDOperand Op, SelectionDAG &DAG) {
-  SDOperand Copy;
+static SDOperand LowerRET(SDOperand Op, SelectionDAG &DAG, unsigned int RA) {
+  SDOperand Copy = DAG.getCopyToReg(Op.getOperand(0), Alpha::R26, 
+				    DAG.getNode(AlphaISD::GlobalRetAddr, MVT::i64),
+				    SDOperand());
   switch (Op.getNumOperands()) {
   default:
     assert(0 && "Do not know how to return this many arguments!");
     abort();
   case 1: 
-    return SDOperand(); // ret void is legal
+    break;
+    //return SDOperand(); // ret void is legal
   case 3: {
     MVT::ValueType ArgVT = Op.getOperand(1).getValueType();
     unsigned ArgReg;
@@ -285,8 +289,7 @@
       assert(MVT::isFloatingPoint(ArgVT));
       ArgReg = Alpha::F0;
     }
-    Copy = DAG.getCopyToReg(Op.getOperand(0), ArgReg, Op.getOperand(1),
-                            SDOperand());
+    Copy = DAG.getCopyToReg(Copy, ArgReg, Op.getOperand(1), Copy.getValue(1));
     if(DAG.getMachineFunction().liveout_empty())
       DAG.getMachineFunction().addLiveOut(ArgReg);
     break;
@@ -384,7 +387,7 @@
 							   VarArgsBase,
 							   VarArgsOffset,
 							   GP, RA);
-  case ISD::RET: return LowerRET(Op,DAG);
+  case ISD::RET: return LowerRET(Op,DAG, getVRegRA());
   case ISD::SINT_TO_FP: {
     assert(MVT::i64 == Op.getOperand(0).getValueType() && 
            "Unhandled SINT_TO_FP type in custom expander!");


Index: llvm/lib/Target/Alpha/AlphaISelLowering.h
diff -u llvm/lib/Target/Alpha/AlphaISelLowering.h:1.17 llvm/lib/Target/Alpha/AlphaISelLowering.h:1.18
--- llvm/lib/Target/Alpha/AlphaISelLowering.h:1.17	Mon Jun 12 13:09:24 2006
+++ llvm/lib/Target/Alpha/AlphaISelLowering.h	Tue Jun 13 13:27:39 2006
@@ -37,6 +37,9 @@
 
       /// GlobalBaseReg - used to restore the GOT ptr
       GlobalBaseReg,
+
+      /// GlobalRetAddr - used to restore the return address
+      GlobalRetAddr,
       
       /// CALL - Normal call.
       CALL,





From lattner at cs.uiuc.edu  Tue Jun 13 13:52:41 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue, 13 Jun 2006 13:52:41 -0500
Subject: [llvm-commits] CVS: llvm-test/External/SPEC/Makefile.spec 
Message-ID: <200606131852.NAA15919@zion.cs.uiuc.edu>



Changes in directory llvm-test/External/SPEC:

Makefile.spec updated: 1.53 -> 1.54
---
Log message:

Use the new bugpoint -Xlinker option to pass down LDFLAGS to bugpoint, allowing
us to debug NAG Fortran programs and povray without ugly hacks


---
Diffs of the changes:  (+6 -0)

 Makefile.spec |    6 ++++++
 1 files changed, 6 insertions(+)


Index: llvm-test/External/SPEC/Makefile.spec
diff -u llvm-test/External/SPEC/Makefile.spec:1.53 llvm-test/External/SPEC/Makefile.spec:1.54
--- llvm-test/External/SPEC/Makefile.spec:1.53	Mon Feb 27 16:11:02 2006
+++ llvm-test/External/SPEC/Makefile.spec	Tue Jun 13 13:52:28 2006
@@ -135,6 +135,12 @@
 BUGPOINT_OPTIONS += -abs-tolerance $(FP_ABSTOLERANCE)
 endif
 
+
+# Give bugpoint information about LDFLAGS to pass down to the actual link stage
+# of the program.
+BUGPOINT_OPTIONS += $(LDFLAGS:%=-Xlinker=%) 
+
+
 # Specify stdin, reference output, and command line options for the program...
 BUGPOINT_OPTIONS += -input=$(STDIN_FILENAME) -output=../$*.out-nat
 BUGPOINT_OPTIONS += -timeout=$(RUNTIMELIMIT)





From lattner at cs.uiuc.edu  Tue Jun 13 13:52:41 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue, 13 Jun 2006 13:52:41 -0500
Subject: [llvm-commits] CVS: llvm-test/Makefile.programs 
Message-ID: <200606131852.NAA15923@zion.cs.uiuc.edu>



Changes in directory llvm-test:

Makefile.programs updated: 1.215 -> 1.216
---
Log message:

Use the new bugpoint -Xlinker option to pass down LDFLAGS to bugpoint, allowing
us to debug NAG Fortran programs and povray without ugly hacks


---
Diffs of the changes:  (+4 -0)

 Makefile.programs |    4 ++++
 1 files changed, 4 insertions(+)


Index: llvm-test/Makefile.programs
diff -u llvm-test/Makefile.programs:1.215 llvm-test/Makefile.programs:1.216
--- llvm-test/Makefile.programs:1.215	Fri Jun  9 16:47:24 2006
+++ llvm-test/Makefile.programs	Tue Jun 13 13:52:28 2006
@@ -379,6 +379,10 @@
 BUGPOINT_OPTIONS += -abs-tolerance $(FP_ABSTOLERANCE)
 endif
 
+# Give bugpoint information about LDFLAGS to pass down to the actual link stage
+# of the program.
+BUGPOINT_OPTIONS += $(LDFLAGS:%=-Xlinker=%) 
+
 # Specify stdin, reference output, and command line options for the program...
 BUGPOINT_OPTIONS += -input=$(STDIN_FILENAME) -output=Output/$*.out-nat
 BUGPOINT_OPTIONS += -timeout=$(RUNTIMELIMIT)





From resistor at mac.com  Tue Jun 13 14:37:30 2006
From: resistor at mac.com (Owen Anderson)
Date: Tue, 13 Jun 2006 14:37:30 -0500
Subject: [llvm-commits] CVS: llvm/lib/Transforms/Utils/LCSSA.cpp 
Message-ID: <200606131937.OAA16142@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Transforms/Utils:

LCSSA.cpp updated: 1.20 -> 1.21
---
Log message:

Fix a bug that was causing major slowdowns in povray.  This was due to LCSSA
not handling PHI nodes correctly when determining if a value was live-out.

This patch reduces the number of detected live-out variables in the testcase
from 6565 to 485.


---
Diffs of the changes:  (+7 -2)

 LCSSA.cpp |    9 +++++++--
 1 files changed, 7 insertions(+), 2 deletions(-)


Index: llvm/lib/Transforms/Utils/LCSSA.cpp
diff -u llvm/lib/Transforms/Utils/LCSSA.cpp:1.20 llvm/lib/Transforms/Utils/LCSSA.cpp:1.21
--- llvm/lib/Transforms/Utils/LCSSA.cpp:1.20	Mon Jun 12 02:10:16 2006
+++ llvm/lib/Transforms/Utils/LCSSA.cpp	Tue Jun 13 14:37:18 2006
@@ -91,6 +91,7 @@
 /// runOnFunction - Process all loops in the function, inner-most out.
 bool LCSSA::runOnFunction(Function &F) {
   bool changed = false;
+  
   LI = &getAnalysis<LoopInfo>();
   DF = &getAnalysis<DominanceFrontier>();
   DT = &getAnalysis<DominatorTree>();
@@ -107,7 +108,7 @@
 bool LCSSA::visitSubloop(Loop* L) {
   for (Loop::iterator I = L->begin(), E = L->end(); I != E; ++I)
     visitSubloop(*I);
-  
+    
   // Speed up queries by creating a sorted list of blocks
   LoopBlocks.clear();
   LoopBlocks.insert(LoopBlocks.end(), L->block_begin(), L->block_end());
@@ -162,7 +163,6 @@
       phi = new PHINode(Instr->getType(), Instr->getName()+".lcssa",
                                  (*BBI)->begin());
       workList.push_back(cast<PHINode>(phi));
-      Phis[*BBI] = phi;
     }
   }
   
@@ -253,6 +253,11 @@
       for (Value::use_iterator UI = I->use_begin(), E = I->use_end(); UI != E;
            ++UI) {
         BasicBlock *UserBB = cast<Instruction>(*UI)->getParent();
+        if (PHINode* p = dyn_cast<PHINode>(*UI)) {
+          unsigned OperandNo = UI.getOperandNo();
+          UserBB = p->getIncomingBlock(OperandNo/2);
+        }
+        
         if (!inLoop(UserBB)) {
           AffectedValues.insert(I);
           break;





From alenhar2 at cs.uiuc.edu  Tue Jun 13 15:35:00 2006
From: alenhar2 at cs.uiuc.edu (Andrew Lenharth)
Date: Tue, 13 Jun 2006 15:35:00 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp 
Message-ID: <200606132035.PAA16496@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/Alpha:

AlphaISelDAGToDAG.cpp updated: 1.44 -> 1.45
---
Log message:

I am sure I had commited this workaround before.  Perhaps soon I should sort it all out

---
Diffs of the changes:  (+6 -6)

 AlphaISelDAGToDAG.cpp |   12 ++++++------
 1 files changed, 6 insertions(+), 6 deletions(-)


Index: llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp
diff -u llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:1.44 llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:1.45
--- llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:1.44	Tue Jun 13 13:27:39 2006
+++ llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp	Tue Jun 13 15:34:47 2006
@@ -286,12 +286,12 @@
       bool isNE = false;
       switch(CC) {
       default: N->dump(); assert(0 && "Unknown FP comparison!");
-      case ISD::SETEQ: Opc = Alpha::CMPTEQ; break;
-      case ISD::SETLT: Opc = Alpha::CMPTLT; break;
-      case ISD::SETLE: Opc = Alpha::CMPTLE; break;
-      case ISD::SETGT: Opc = Alpha::CMPTLT; rev = true; break;
-      case ISD::SETGE: Opc = Alpha::CMPTLE; rev = true; break;
-      case ISD::SETNE: Opc = Alpha::CMPTEQ; isNE = true; break;
+      case ISD::SETEQ: case ISD::SETOEQ: case ISD::SETUEQ: Opc = Alpha::CMPTEQ; break;
+      case ISD::SETLT: case ISD::SETOLT: case ISD::SETULT: Opc = Alpha::CMPTLT; break;
+      case ISD::SETLE: case ISD::SETOLE: case ISD::SETULE: Opc = Alpha::CMPTLE; break;
+      case ISD::SETGT: case ISD::SETOGT: case ISD::SETUGT: Opc = Alpha::CMPTLT; rev = true; break;
+      case ISD::SETGE: case ISD::SETOGE: case ISD::SETUGE: Opc = Alpha::CMPTLE; rev = true; break;
+      case ISD::SETNE: case ISD::SETONE: case ISD::SETUNE: Opc = Alpha::CMPTEQ; isNE = true; break;
       };
       SDOperand tmp1, tmp2;
       Select(tmp1, N->getOperand(0));





From resistor at mac.com  Tue Jun 13 15:45:34 2006
From: resistor at mac.com (Owen Anderson)
Date: Tue, 13 Jun 2006 15:45:34 -0500
Subject: [llvm-commits] CVS: llvm/lib/Analysis/LoopInfo.cpp 
Message-ID: <200606132045.PAA16646@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Analysis:

LoopInfo.cpp updated: 1.73 -> 1.74
---
Log message:

Update isLCSSAForm to handle PHI nodes specially for live-out detection.  This
is the same as the recent patch to LCSSA.cpp.


---
Diffs of the changes:  (+6 -1)

 LoopInfo.cpp |    7 ++++++-
 1 files changed, 6 insertions(+), 1 deletion(-)


Index: llvm/lib/Analysis/LoopInfo.cpp
diff -u llvm/lib/Analysis/LoopInfo.cpp:1.73 llvm/lib/Analysis/LoopInfo.cpp:1.74
--- llvm/lib/Analysis/LoopInfo.cpp:1.73	Sun Jun 11 14:22:28 2006
+++ llvm/lib/Analysis/LoopInfo.cpp	Tue Jun 13 15:45:22 2006
@@ -487,7 +487,12 @@
       for (Value::use_iterator UI = I->use_begin(), E = I->use_end(); UI != E;
            ++UI) {
         BasicBlock *UserBB = cast<Instruction>(*UI)->getParent();
-        if (!isa<PHINode>(*UI) && !contains(UserBB)) {
+        if (PHINode* p = dyn_cast<PHINode>(*UI)) {
+          unsigned OperandNo = UI.getOperandNo();
+          UserBB = p->getIncomingBlock(OperandNo/2);
+        }
+        
+        if (!contains(UserBB)) {
           return false;
         }
       }





From resistor at mac.com  Tue Jun 13 15:50:22 2006
From: resistor at mac.com (Owen Anderson)
Date: Tue, 13 Jun 2006 15:50:22 -0500
Subject: [llvm-commits] CVS: llvm/lib/Transforms/Utils/LCSSA.cpp 
Message-ID: <200606132050.PAA16714@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Transforms/Utils:

LCSSA.cpp updated: 1.21 -> 1.22
---
Log message:

Fix another instance where PHI nodes need special treatment.


---
Diffs of the changes:  (+6 -0)

 LCSSA.cpp |    6 ++++++
 1 files changed, 6 insertions(+)


Index: llvm/lib/Transforms/Utils/LCSSA.cpp
diff -u llvm/lib/Transforms/Utils/LCSSA.cpp:1.21 llvm/lib/Transforms/Utils/LCSSA.cpp:1.22
--- llvm/lib/Transforms/Utils/LCSSA.cpp:1.21	Tue Jun 13 14:37:18 2006
+++ llvm/lib/Transforms/Utils/LCSSA.cpp	Tue Jun 13 15:50:09 2006
@@ -215,6 +215,12 @@
   for (Instruction::use_iterator UI = Instr->use_begin(), UE = Instr->use_end();
        UI != UE; ++UI) {
     Instruction* use = cast<Instruction>(*UI);
+    BasicBlock* UserBB = use->getParent();
+    if (PHINode* p = dyn_cast<PHINode>(use)) {
+      unsigned OperandNo = UI.getOperandNo();
+      UserBB = p->getIncomingBlock(OperandNo/2);
+    }
+    
     // Don't need to update uses within the loop body.
     if (!inLoop(use->getParent()))
       Uses.push_back(use);





From evan.cheng at apple.com  Tue Jun 13 16:47:40 2006
From: evan.cheng at apple.com (Evan Cheng)
Date: Tue, 13 Jun 2006 16:47:40 -0500
Subject: [llvm-commits] CVS: llvm/utils/TableGen/DAGISelEmitter.cpp 
Message-ID: <200606132147.QAA17087@zion.cs.uiuc.edu>



Changes in directory llvm/utils/TableGen:

DAGISelEmitter.cpp updated: 1.208 -> 1.209
---
Log message:

getOperandNum(): error if specified operand number is out of range.


---
Diffs of the changes:  (+7 -0)

 DAGISelEmitter.cpp |    7 +++++++
 1 files changed, 7 insertions(+)


Index: llvm/utils/TableGen/DAGISelEmitter.cpp
diff -u llvm/utils/TableGen/DAGISelEmitter.cpp:1.208 llvm/utils/TableGen/DAGISelEmitter.cpp:1.209
--- llvm/utils/TableGen/DAGISelEmitter.cpp:1.208	Fri Jun  9 18:59:44 2006
+++ llvm/utils/TableGen/DAGISelEmitter.cpp	Tue Jun 13 16:47:27 2006
@@ -121,6 +121,13 @@
   assert(NumResults <= 1 &&
          "We only work with nodes with zero or one result so far!");
   
+  if (OpNo >= (NumResults + N->getNumChildren())) {
+    std::cerr << "Invalid operand number " << OpNo << " ";
+    N->dump();
+    std::cerr << '\n';
+    exit(1);
+  }
+
   if (OpNo < NumResults)
     return N;  // FIXME: need value #
   else





From lattner at cs.uiuc.edu  Tue Jun 13 20:14:09 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue, 13 Jun 2006 20:14:09 -0500
Subject: [llvm-commits] CVS: llvm/lib/Transforms/Utils/LCSSA.cpp 
Message-ID: <200606140114.UAA18043@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Transforms/Utils:

LCSSA.cpp updated: 1.22 -> 1.23
---
Log message:

Use the PotDoms map to memoize 'dominating value' lookup.  With this patch,
LCSSA is still the slowest pass when gccas'ing 252.eon, but now it only takes
39s instead of 289s. :)


---
Diffs of the changes:  (+14 -17)

 LCSSA.cpp |   31 ++++++++++++++-----------------
 1 files changed, 14 insertions(+), 17 deletions(-)


Index: llvm/lib/Transforms/Utils/LCSSA.cpp
diff -u llvm/lib/Transforms/Utils/LCSSA.cpp:1.22 llvm/lib/Transforms/Utils/LCSSA.cpp:1.23
--- llvm/lib/Transforms/Utils/LCSSA.cpp:1.22	Tue Jun 13 15:50:09 2006
+++ llvm/lib/Transforms/Utils/LCSSA.cpp	Tue Jun 13 20:13:57 2006
@@ -74,8 +74,12 @@
   private:
     SetVector<Instruction*> getLoopValuesUsedOutsideLoop(Loop *L);
     Instruction *getValueDominatingBlock(BasicBlock *BB,
+                                 std::map<BasicBlock*, Instruction*>& PotDoms) {
+      return getValueDominatingDTNode(DT->getNode(BB), PotDoms);
+    }
+    Instruction *getValueDominatingDTNode(DominatorTree::Node *Node,
                                   std::map<BasicBlock*, Instruction*>& PotDoms);
-                                  
+                                      
     /// inLoop - returns true if the given block is within the current loop
     const bool inLoop(BasicBlock* B) {
       return std::binary_search(LoopBlocks.begin(), LoopBlocks.end(), B);
@@ -237,8 +241,8 @@
         }
       }
     } else {
-       Value *NewVal = getValueDominatingBlock((*II)->getParent(), Phis);
-       (*II)->replaceUsesOfWith(Instr, NewVal);
+      Value *NewVal = getValueDominatingBlock((*II)->getParent(), Phis);
+      (*II)->replaceUsesOfWith(Instr, NewVal);
     }
   }
 }
@@ -275,19 +279,12 @@
 
 /// getValueDominatingBlock - Return the value within the potential dominators
 /// map that dominates the given block.
-Instruction *LCSSA::getValueDominatingBlock(BasicBlock *BB,
-                                 std::map<BasicBlock*, Instruction*>& PotDoms) {
-  DominatorTree::Node* bbNode = DT->getNode(BB);
-  while (bbNode != 0) {
-    std::map<BasicBlock*, Instruction*>::iterator I =
-                                               PotDoms.find(bbNode->getBlock());
-    if (I != PotDoms.end()) {
-      return (*I).second;
-    }
-    bbNode = bbNode->getIDom();
-  }
-  
-  assert(0 && "No dominating value found.");
+Instruction *LCSSA::getValueDominatingDTNode(DominatorTree::Node *Node,
+                              std::map<BasicBlock*, Instruction*>& PotDoms) {
+  assert(Node != 0 && "Didn't find dom value?");
+  Instruction *&CacheSlot = PotDoms[Node->getBlock()];
+  if (CacheSlot) return CacheSlot;
   
-  return 0;
+  // Otherwise, return the value of the idom and remember this for next time.
+  return CacheSlot = getValueDominatingDTNode(Node->getIDom(), PotDoms);
 }





From resistor at mac.com  Tue Jun 13 23:43:26 2006
From: resistor at mac.com (Owen Anderson)
Date: Tue, 13 Jun 2006 23:43:26 -0500
Subject: [llvm-commits] CVS: llvm/lib/VMCore/BasicBlock.cpp 
Message-ID: <200606140443.XAA19375@zion.cs.uiuc.edu>



Changes in directory llvm/lib/VMCore:

BasicBlock.cpp updated: 1.70 -> 1.71
---
Log message:

When asked not to delete useless PHIs, really don't delete them, no matter how
redundant they are.


---
Diffs of the changes:  (+2 -1)

 BasicBlock.cpp |    3 ++-
 1 files changed, 2 insertions(+), 1 deletion(-)


Index: llvm/lib/VMCore/BasicBlock.cpp
diff -u llvm/lib/VMCore/BasicBlock.cpp:1.70 llvm/lib/VMCore/BasicBlock.cpp:1.71
--- llvm/lib/VMCore/BasicBlock.cpp:1.70	Thu Jun  8 11:03:13 2006
+++ llvm/lib/VMCore/BasicBlock.cpp	Tue Jun 13 23:43:14 2006
@@ -213,7 +213,8 @@
       PN->removeIncomingValue(Pred, false);
       // If all incoming values to the Phi are the same, we can replace the Phi
       // with that value.
-      if (Value *PNV = PN->hasConstantValue()) {
+      Value* PNV = 0;
+      if (!DontDeleteUselessPHIs && (PNV = PN->hasConstantValue())) {
         PN->replaceAllUsesWith(PNV);
         PN->eraseFromParent();
       }





From lattner at cs.uiuc.edu  Tue Jun 13 23:45:57 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue, 13 Jun 2006 23:45:57 -0500
Subject: [llvm-commits] 
	CVS: llvm/test/Regression/Transforms/LoopUnswitch/2006-06-13-SingleEntryPHI.ll
Message-ID: <200606140445.XAA19469@zion.cs.uiuc.edu>



Changes in directory llvm/test/Regression/Transforms/LoopUnswitch:

2006-06-13-SingleEntryPHI.ll added (r1.1)
---
Log message:

new testcase, distilled from povray


---
Diffs of the changes:  (+44 -0)

 2006-06-13-SingleEntryPHI.ll |   44 +++++++++++++++++++++++++++++++++++++++++++
 1 files changed, 44 insertions(+)


Index: llvm/test/Regression/Transforms/LoopUnswitch/2006-06-13-SingleEntryPHI.ll
diff -c /dev/null llvm/test/Regression/Transforms/LoopUnswitch/2006-06-13-SingleEntryPHI.ll:1.1
*** /dev/null	Tue Jun 13 23:45:55 2006
--- llvm/test/Regression/Transforms/LoopUnswitch/2006-06-13-SingleEntryPHI.ll	Tue Jun 13 23:45:45 2006
***************
*** 0 ****
--- 1,44 ----
+ ; RUN: llvm-as < %s | opt -loop-unswitch -disable-output
+ 
+ 	%struct.BLEND_MAP = type { short, short, short, int, %struct.BLEND_MAP_ENTRY* }
+ 	%struct.BLEND_MAP_ENTRY = type { float, ubyte, { [5 x float], [4 x ubyte] } }
+ 	%struct.TPATTERN = type { ushort, ushort, ushort, int, float, float, float, %struct.WARP*, %struct.TPATTERN*, %struct.BLEND_MAP*, { %struct.anon, [4 x ubyte] } }
+ 	%struct.TURB = type { ushort, %struct.WARP*, [3 x double], int, float, float }
+ 	%struct.WARP = type { ushort, %struct.WARP* }
+ 	%struct.anon = type { float, [3 x double] }
+ 
+ implementation   ; Functions:
+ 
+ void %Parse_Pattern() {
+ entry:
+ 	br label %bb1096.outer20
+ 
+ bb671:		; preds = %cond_true1099
+ 	br label %bb1096.outer23
+ 
+ bb1096.outer20.loopexit:		; preds = %cond_true1099
+ 	%Local_Turb.0.ph24.lcssa = phi %struct.TURB* [ %Local_Turb.0.ph24, %cond_true1099 ]		; <%struct.TURB*> [#uses=1]
+ 	br label %bb1096.outer20
+ 
+ bb1096.outer20:		; preds = %bb1096.outer20.loopexit, %entry
+ 	%Local_Turb.0.ph22 = phi %struct.TURB* [ undef, %entry ], [ %Local_Turb.0.ph24.lcssa, %bb1096.outer20.loopexit ]		; <%struct.TURB*> [#uses=1]
+ 	%tmp1098 = seteq int 0, 0		; <bool> [#uses=1]
+ 	br label %bb1096.outer23
+ 
+ bb1096.outer23:		; preds = %bb1096.outer20, %bb671
+ 	%Local_Turb.0.ph24 = phi %struct.TURB* [ %Local_Turb.0.ph22, %bb1096.outer20 ], [ null, %bb671 ]		; <%struct.TURB*> [#uses=2]
+ 	br label %bb1096
+ 
+ bb1096:		; preds = %cond_true1099, %bb1096.outer23
+ 	br bool %tmp1098, label %cond_true1099, label %bb1102
+ 
+ cond_true1099:		; preds = %bb1096
+ 	switch int 0, label %bb1096.outer20.loopexit [
+ 		 int 161, label %bb671
+ 		 int 359, label %bb1096
+ 	]
+ 
+ bb1102:		; preds = %bb1096
+ 	%Local_Turb.0.ph24.lcssa1 = phi %struct.TURB* [ %Local_Turb.0.ph24, %bb1096 ]		; <%struct.TURB*> [#uses=0]
+ 	ret void
+ }





From lattner at cs.uiuc.edu  Tue Jun 13 23:46:29 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue, 13 Jun 2006 23:46:29 -0500
Subject: [llvm-commits] CVS: llvm/lib/Transforms/Scalar/LoopUnswitch.cpp 
Message-ID: <200606140446.XAA19500@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Transforms/Scalar:

LoopUnswitch.cpp updated: 1.39 -> 1.40
---
Log message:

Fix Transforms/LoopUnswitch/2006-06-13-SingleEntryPHI.ll, a loop unswitch
bug exposed by the recent lcssa work.


---
Diffs of the changes:  (+13 -1)

 LoopUnswitch.cpp |   14 +++++++++++++-
 1 files changed, 13 insertions(+), 1 deletion(-)


Index: llvm/lib/Transforms/Scalar/LoopUnswitch.cpp
diff -u llvm/lib/Transforms/Scalar/LoopUnswitch.cpp:1.39 llvm/lib/Transforms/Scalar/LoopUnswitch.cpp:1.40
--- llvm/lib/Transforms/Scalar/LoopUnswitch.cpp:1.39	Mon Jun 12 16:49:21 2006
+++ llvm/lib/Transforms/Scalar/LoopUnswitch.cpp	Tue Jun 13 23:46:17 2006
@@ -401,7 +401,7 @@
                     << Cost << "\n");
     return false;
   }
-      
+   
   // If this is a trivial condition to unswitch (which results in no code
   // duplication), do it now.
   Constant *CondVal;
@@ -456,6 +456,18 @@
     // If the successor only has a single pred, split the top of the successor
     // block.
     assert(SP == BB && "CFG broken");
+    
+    // If this block has a single predecessor, remove any phi nodes.  Unswitch
+    // expect that, after split the edges from inside the loop to the exit
+    // block, that there will be no phi nodes in the new exit block.  Single
+    // entry phi nodes break this assumption.
+    BasicBlock::iterator I = Succ->begin();
+    while (PHINode *PN = dyn_cast<PHINode>(I)) {
+      PN->replaceAllUsesWith(PN->getIncomingValue(0));
+      PN->eraseFromParent();
+      I = Succ->begin();
+    }
+    
     return SplitBlock(Succ, Succ->begin());
   } else {
     // Otherwise, if BB has a single successor, split it at the bottom of the





From lattner at cs.uiuc.edu  Tue Jun 13 23:48:49 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Tue, 13 Jun 2006 23:48:49 -0500
Subject: [llvm-commits] CVS: llvm-test/Makefile.programs 
Message-ID: <200606140448.XAA19543@zion.cs.uiuc.edu>



Changes in directory llvm-test:

Makefile.programs updated: 1.216 -> 1.217
---
Log message:

For good measure, test that -fast doesn't expose any bugs either.


---
Diffs of the changes:  (+1 -1)

 Makefile.programs |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm-test/Makefile.programs
diff -u llvm-test/Makefile.programs:1.216 llvm-test/Makefile.programs:1.217
--- llvm-test/Makefile.programs:1.216	Tue Jun 13 13:52:28 2006
+++ llvm-test/Makefile.programs	Tue Jun 13 23:48:37 2006
@@ -187,7 +187,7 @@
 endif#DISABLE_DIFFS
 
 ifeq ($(ARCH),PowerPC)
-LLCBETAOPTION := -regalloc=local
+LLCBETAOPTION := -regalloc=local -fast
 endif
 ifeq ($(ARCH),Alpha)
 LLCBETAOPTION := -sched=list-td 





From jlaskey at apple.com  Wed Jun 14 06:35:16 2006
From: jlaskey at apple.com (Jim Laskey)
Date: Wed, 14 Jun 2006 06:35:16 -0500
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/DwarfWriter.cpp
	MachineDebugInfo.cpp 
Message-ID: <200606141135.GAA19324@zion.cs.uiuc.edu>



Changes in directory llvm/lib/CodeGen:

DwarfWriter.cpp updated: 1.60 -> 1.61
MachineDebugInfo.cpp updated: 1.38 -> 1.39
---
Log message:

Place dwarf headers at earliest possible point.  Well behaved when skipping
functions.


---
Diffs of the changes:  (+57 -51)

 DwarfWriter.cpp      |  100 +++++++++++++++++++++++++++------------------------
 MachineDebugInfo.cpp |    8 ++--
 2 files changed, 57 insertions(+), 51 deletions(-)


Index: llvm/lib/CodeGen/DwarfWriter.cpp
diff -u llvm/lib/CodeGen/DwarfWriter.cpp:1.60 llvm/lib/CodeGen/DwarfWriter.cpp:1.61
--- llvm/lib/CodeGen/DwarfWriter.cpp:1.60	Fri May 12 01:33:48 2006
+++ llvm/lib/CodeGen/DwarfWriter.cpp	Wed Jun 14 06:35:03 2006
@@ -1646,7 +1646,11 @@
 /// EmitInitial - Emit initial Dwarf declarations.  This is necessary for cc
 /// tools to recognize the object file contains Dwarf information.
 ///
-void DwarfWriter::EmitInitial() const {
+void DwarfWriter::EmitInitial() {
+  // Check to see if we already emitted intial headers.
+  if (didInitial) return;
+  didInitial = true;
+  
   // Dwarf sections base addresses.
   Asm->SwitchToDataSection(DwarfFrameSection, 0);
   EmitLabel("section_frame", 0);
@@ -1676,6 +1680,9 @@
   EmitLabel("text_begin", 0);
   Asm->SwitchToDataSection(DataSection, 0);
   EmitLabel("data_begin", 0);
+  
+  // Emit common frame information.
+  EmitInitialDebugFrame();
 }
 
 /// EmitDIE - Recusively Emits a debug information entry.
@@ -2286,35 +2293,6 @@
   }
 }
 
-/// ShouldEmitDwarf - Determine if Dwarf declarations should be made.
-///
-bool DwarfWriter::ShouldEmitDwarf() {
-  // Check if debug info is present.
-  if (!DebugInfo || !DebugInfo->hasInfo()) return false;
-  
-  // Make sure initial declarations are made.
-  if (!didInitial) {
-    EmitInitial();
-  
-    // Emit common frame information.
-    EmitInitialDebugFrame();
-  
-    // Create all the compile unit DIEs.
-    ConstructCompileUnitDIEs();
-    
-    // Create DIEs for each of the externally visible global variables.
-    ConstructGlobalDIEs();
-
-    // Create DIEs for each of the externally visible subprograms.
-    ConstructSubprogramDIEs();
-
-    didInitial = true;
-  }
-  
-  // Okay to emit.
-  return true;
-}
-
 //===----------------------------------------------------------------------===//
 // Main entry points.
 //
@@ -2328,6 +2306,8 @@
 , MF(NULL)
 , DebugInfo(NULL)
 , didInitial(false)
+, shouldEmit(false)
+, IsNormalText(false)
 , SubprogramCount(0)
 , CompileUnits()
 , Abbreviations()
@@ -2363,7 +2343,23 @@
 /// SetDebugInfo - Set DebugInfo when it's known that pass manager has
 /// created it.  Set by the target AsmPrinter.
 void DwarfWriter::SetDebugInfo(MachineDebugInfo *DI) {
-  DebugInfo = DI;
+  // Make sure initial declarations are made.
+  if (!DebugInfo && DI->hasInfo()) {
+    DebugInfo = DI;
+    shouldEmit = true;
+    
+    // Emit initial sections
+    EmitInitial();
+  
+    // Create all the compile unit DIEs.
+    ConstructCompileUnitDIEs();
+    
+    // Create DIEs for each of the externally visible global variables.
+    ConstructGlobalDIEs();
+
+    // Create DIEs for each of the externally visible subprograms.
+    ConstructSubprogramDIEs();
+  }
 }
 
 /// BeginModule - Emit all Dwarf sections that should come prior to the content.
@@ -2420,17 +2416,24 @@
 
 /// BeginFunction - Gather pre-function debug information.  Assumes being 
 /// emitted immediately after the function entry point.
-void DwarfWriter::BeginFunction(MachineFunction *MF) {
+void DwarfWriter::BeginFunction(MachineFunction *MF, bool IsNormalText) {
   this->MF = MF;
+  // FIXME - should be able to debug coalesced functions.
+  this->IsNormalText = IsNormalText;
   
-  // Begin accumulating function debug information.
-  DebugInfo->BeginFunction(MF);
-  
-  if (!ShouldEmitDwarf()) return;
-  EOL("Dwarf Begin Function");
-  
-  // Assumes in correct section after the entry point.
-  EmitLabel("func_begin", ++SubprogramCount);
+  // FIXME - should be able to debug coalesced functions.
+  if (IsNormalText) {
+    // Begin accumulating function debug information.
+    DebugInfo->BeginFunction(MF);
+    
+    if (!ShouldEmitDwarf()) return;
+    EOL("Dwarf Begin Function");
+  
+    // Assumes in correct section after the entry point.
+    EmitLabel("func_begin", ++SubprogramCount);
+  } else {
+    ShouldEmitDwarf();
+  }
 }
 
 /// EndFunction - Gather and emit post-function debug information.
@@ -2439,14 +2442,17 @@
   if (!ShouldEmitDwarf()) return;
   EOL("Dwarf End Function");
   
-  // Define end label for subprogram.
-  EmitLabel("func_end", SubprogramCount);
-  
-  // Construct scopes for subprogram.
-  ConstructRootScope(DebugInfo->getRootScope());
+  // FIXME - should be able to debug coalesced functions.
+  if (IsNormalText) {
+    // Define end label for subprogram.
+    EmitLabel("func_end", SubprogramCount);
   
-  // Emit function frame information.
-  EmitFunctionDebugFrame();
+    // Construct scopes for subprogram.
+    ConstructRootScope(DebugInfo->getRootScope());
+    
+    // Emit function frame information.
+    EmitFunctionDebugFrame();
+  }
   
   // Clear function debug information.
   DebugInfo->EndFunction();


Index: llvm/lib/CodeGen/MachineDebugInfo.cpp
diff -u llvm/lib/CodeGen/MachineDebugInfo.cpp:1.38 llvm/lib/CodeGen/MachineDebugInfo.cpp:1.39
--- llvm/lib/CodeGen/MachineDebugInfo.cpp:1.38	Thu Apr 13 13:29:58 2006
+++ llvm/lib/CodeGen/MachineDebugInfo.cpp	Wed Jun 14 06:35:03 2006
@@ -262,10 +262,10 @@
     Elements.push_back(ConstantUInt::get(Type::UIntTy, Field));
   }
   virtual void Apply(int64_t &Field) {
-    Elements.push_back(ConstantSInt::get(Type::IntTy, Field));
+    Elements.push_back(ConstantSInt::get(Type::LongTy, Field));
   }
   virtual void Apply(uint64_t &Field) {
-    Elements.push_back(ConstantUInt::get(Type::UIntTy, Field));
+    Elements.push_back(ConstantUInt::get(Type::ULongTy, Field));
   }
   virtual void Apply(bool &Field) {
     Elements.push_back(ConstantBool::get(Field));
@@ -345,10 +345,10 @@
     Fields.push_back(Type::UIntTy);
   }
   virtual void Apply(int64_t &Field) {
-    Fields.push_back(Type::IntTy);
+    Fields.push_back(Type::LongTy);
   }
   virtual void Apply(uint64_t &Field) {
-    Fields.push_back(Type::UIntTy);
+    Fields.push_back(Type::ULongTy);
   }
   virtual void Apply(bool &Field) {
     Fields.push_back(Type::BoolTy);





From jlaskey at apple.com  Wed Jun 14 06:35:17 2006
From: jlaskey at apple.com (Jim Laskey)
Date: Wed, 14 Jun 2006 06:35:17 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86ATTAsmPrinter.cpp 
Message-ID: <200606141135.GAA19328@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/X86:

X86ATTAsmPrinter.cpp updated: 1.50 -> 1.51
---
Log message:

Place dwarf headers at earliest possible point.  Well behaved when skipping
functions.


---
Diffs of the changes:  (+4 -1)

 X86ATTAsmPrinter.cpp |    5 ++++-
 1 files changed, 4 insertions(+), 1 deletion(-)


Index: llvm/lib/Target/X86/X86ATTAsmPrinter.cpp
diff -u llvm/lib/Target/X86/X86ATTAsmPrinter.cpp:1.50 llvm/lib/Target/X86/X86ATTAsmPrinter.cpp:1.51
--- llvm/lib/Target/X86/X86ATTAsmPrinter.cpp:1.50	Wed May 31 17:34:26 2006
+++ llvm/lib/Target/X86/X86ATTAsmPrinter.cpp	Wed Jun 14 06:35:03 2006
@@ -29,6 +29,8 @@
   // Let PassManager know we need debug information and relay
   // the MachineDebugInfo address on to DwarfWriter.
   DW.SetDebugInfo(&getAnalysis<MachineDebugInfo>());
+  // FIXME - should be able to debug coalesced functions.
+  bool IsNormalText = true;
 
   SetupMachineFunction(MF);
   O << "\n\n";
@@ -72,13 +74,14 @@
       SwitchToTextSection("", F);
       O << "\t.weak " << CurrentFnName << "\n";
     }
+    IsNormalText = false;
     break;
   }
   O << CurrentFnName << ":\n";
 
   if (Subtarget->TargetType == X86Subtarget::isDarwin) {
     // Emit pre-function debug information.
-    DW.BeginFunction(&MF);
+    DW.BeginFunction(&MF, IsNormalText);
   }
 
   // Print out code for the function.





From jlaskey at apple.com  Wed Jun 14 06:35:18 2006
From: jlaskey at apple.com (Jim Laskey)
Date: Wed, 14 Jun 2006 06:35:18 -0500
Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/DwarfWriter.h 
Message-ID: <200606141135.GAA19332@zion.cs.uiuc.edu>



Changes in directory llvm/include/llvm/CodeGen:

DwarfWriter.h updated: 1.36 -> 1.37
---
Log message:

Place dwarf headers at earliest possible point.  Well behaved when skipping
functions.


---
Diffs of the changes:  (+17 -5)

 DwarfWriter.h |   22 +++++++++++++++++-----
 1 files changed, 17 insertions(+), 5 deletions(-)


Index: llvm/include/llvm/CodeGen/DwarfWriter.h
diff -u llvm/include/llvm/CodeGen/DwarfWriter.h:1.36 llvm/include/llvm/CodeGen/DwarfWriter.h:1.37
--- llvm/include/llvm/CodeGen/DwarfWriter.h:1.36	Fri May 19 14:07:54 2006
+++ llvm/include/llvm/CodeGen/DwarfWriter.h	Wed Jun 14 06:35:03 2006
@@ -106,6 +106,15 @@
   ///
   bool didInitial;
   
+  /// shouldEmit - Flag to indicate if debug information should be emitted.
+  ///
+  bool shouldEmit;
+  
+  /// IsNormalText - Flag to indicate if routine is not special case text
+  /// (coalesced.)
+  // FIXME - should be able to debug coalesced functions.
+  bool IsNormalText;
+
   /// SubprogramCount - The running count of functions being compiled.
   ///
   unsigned SubprogramCount;
@@ -372,7 +381,7 @@
 
   /// EmitInitial - Emit initial Dwarf declarations.
   ///
-  void EmitInitial() const;
+  void EmitInitial();
   
   /// EmitDIE - Recusively Emits a debug information entry.
   ///
@@ -448,9 +457,8 @@
   void ConstructSubprogramDIEs();
 
   /// ShouldEmitDwarf - Returns true if Dwarf declarations should be made.
-  /// When called it also checks to see if debug info is newly available.  if
-  /// so the initial Dwarf headers are emitted.
-  bool ShouldEmitDwarf();
+  ///
+  bool ShouldEmitDwarf() const { return shouldEmit; }
 
 public:
   
@@ -475,11 +483,15 @@
   
   /// BeginFunction - Gather pre-function debug information.  Assumes being 
   /// emitted immediately after the function entry point.
-  void BeginFunction(MachineFunction *MF);
+  void BeginFunction(MachineFunction *MF, bool IsNormalText);
   
   /// EndFunction - Gather and emit post-function debug information.
   ///
   void EndFunction();
+  
+  /// NonFunction - Function does not have a true body.
+  ///
+  void NonFunction();
 };
 
 } // end llvm namespace





From jlaskey at apple.com  Wed Jun 14 06:35:19 2006
From: jlaskey at apple.com (Jim Laskey)
Date: Wed, 14 Jun 2006 06:35:19 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp 
Message-ID: <200606141135.GAA19336@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/PowerPC:

PPCAsmPrinter.cpp updated: 1.176 -> 1.177
---
Log message:

Place dwarf headers at earliest possible point.  Well behaved when skipping
functions.


---
Diffs of the changes:  (+4 -2)

 PPCAsmPrinter.cpp |    6 ++++--
 1 files changed, 4 insertions(+), 2 deletions(-)


Index: llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
diff -u llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.176 llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.177
--- llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.176	Mon May 15 00:48:32 2006
+++ llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp	Wed Jun 14 06:35:03 2006
@@ -488,8 +488,9 @@
 /// method to print assembly for each instruction.
 ///
 bool DarwinAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
-  // FIXME - is this the earliest this can be set?
   DW.SetDebugInfo(&getAnalysis<MachineDebugInfo>());
+  // FIXME - should be able to debug coalesced functions.
+  bool IsNormalText = true;
 
   SetupMachineFunction(MF);
   O << "\n\n";
@@ -517,13 +518,14 @@
                 ".section __TEXT,__textcoal_nt,coalesced,pure_instructions", F);
     O << "\t.globl\t" << CurrentFnName << "\n";
     O << "\t.weak_definition\t" << CurrentFnName << "\n";
+    IsNormalText = false;
     break;
   }
   EmitAlignment(4, F);
   O << CurrentFnName << ":\n";
 
   // Emit pre-function debug information.
-  DW.BeginFunction(&MF);
+  DW.BeginFunction(&MF, IsNormalText);
 
   // Print out code for the function.
   for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();





From jlaskey at apple.com  Wed Jun 14 09:45:51 2006
From: jlaskey at apple.com (Jim Laskey)
Date: Wed, 14 Jun 2006 09:45:51 -0500
Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineDebugInfo.h 
Message-ID: <200606141445.JAA02068@zion.cs.uiuc.edu>



Changes in directory llvm/include/llvm/CodeGen:

MachineDebugInfo.h updated: 1.33 -> 1.34
---
Log message:

Change versioning to per debug info descriptor (merged with tag.)



---
Diffs of the changes:  (+21 -26)

 MachineDebugInfo.h |   47 +++++++++++++++++++++--------------------------
 1 files changed, 21 insertions(+), 26 deletions(-)


Index: llvm/include/llvm/CodeGen/MachineDebugInfo.h
diff -u llvm/include/llvm/CodeGen/MachineDebugInfo.h:1.33 llvm/include/llvm/CodeGen/MachineDebugInfo.h:1.34
--- llvm/include/llvm/CodeGen/MachineDebugInfo.h:1.33	Fri Apr  7 11:34:45 2006
+++ llvm/include/llvm/CodeGen/MachineDebugInfo.h	Wed Jun 14 09:45:39 2006
@@ -90,23 +90,35 @@
 ///
 class DebugInfoDesc {
 private:
+  enum {
+    tag_mask = 0x0000ffff,
+    version_shift = 16
+  };
+
+
   unsigned Tag;                         // Content indicator.  Dwarf values are
                                         // used but that does not limit use to
                                         // Dwarf writers.
   
 protected:
-  DebugInfoDesc(unsigned T) : Tag(T) {}
+  DebugInfoDesc(unsigned T) : Tag(T | (LLVMDebugVersion << version_shift)) {}
   
 public:
   virtual ~DebugInfoDesc() {}
 
   // Accessors
-  unsigned getTag()          const { return Tag; }
+  unsigned getTag()          const { return Tag & tag_mask; }
+  unsigned getVersion()      const { return Tag >> version_shift; }
   
-  /// TagFromGlobal - Returns the Tag number from a debug info descriptor
-  /// GlobalVariable.  Return DIIValid if operand is not an unsigned int.
+  /// TagFromGlobal - Returns the tag number from a debug info descriptor
+  /// GlobalVariable.   Return DIIValid if operand is not an unsigned int. 
   static unsigned TagFromGlobal(GlobalVariable *GV);
 
+  /// VersionFromGlobal - Returns the version number from a debug info
+  /// descriptor GlobalVariable.  Return DIIValid if operand is not an unsigned
+  /// int.
+  static unsigned VersionFromGlobal(GlobalVariable *GV);
+
   /// DescFactory - Create an instance of debug info descriptor based on Tag.
   /// Return NULL if not a recognized Tag.
   static DebugInfoDesc *DescFactory(unsigned Tag);
@@ -216,7 +228,6 @@
 /// source/header file.
 class CompileUnitDesc : public AnchoredDesc {
 private:  
-  unsigned DebugVersion;                // LLVM debug version when produced.
   unsigned Language;                    // Language number (ex. DW_LANG_C89.)
   std::string FileName;                 // Source file name.
   std::string Directory;                // Source file directory.
@@ -227,7 +238,6 @@
   
   
   // Accessors
-  unsigned getDebugVersion()              const { return DebugVersion; }
   unsigned getLanguage()                  const { return Language; }
   const std::string &getFileName()        const { return FileName; }
   const std::string &getDirectory()       const { return Directory; }
@@ -243,10 +253,6 @@
   static bool classof(const CompileUnitDesc *) { return true; }
   static bool classof(const DebugInfoDesc *D);
   
-  /// DebugVersionFromGlobal - Returns the version number from a compile unit
-  /// GlobalVariable.  Return DIIValid if operand is not an unsigned int.
-  static unsigned DebugVersionFromGlobal(GlobalVariable *GV);
-  
   /// ApplyToFields - Target the visitor to the fields of the CompileUnitDesc.
   ///
   virtual void ApplyToFields(DIVisitor *Visitor);
@@ -702,17 +708,13 @@
 /// into DebugInfoDesc objects.
 class DIDeserializer {
 private:
-  unsigned DebugVersion;                // Version of debug information in use.
   std::map<GlobalVariable *, DebugInfoDesc *> GlobalDescs;
                                         // Previously defined gloabls.
   
 public:
-  DIDeserializer() : DebugVersion(LLVMDebugVersion) {}
+  DIDeserializer() {}
   ~DIDeserializer() {}
   
-  // Accessors
-  unsigned getDebugVersion() const { return DebugVersion; }
-  
   /// Deserialize - Reconstitute a GlobalVariable into it's component
   /// DebugInfoDesc objects.
   DebugInfoDesc *Deserialize(Value *V);
@@ -780,14 +782,12 @@
     Invalid,
     Valid
   };
-  unsigned DebugVersion;                // Version of debug information in use.
   std::map<GlobalVariable *, unsigned> Validity;// Tracks prior results.
   std::map<unsigned, unsigned> Counts;  // Count of fields per Tag type.
   
 public:
   DIVerifier()
-  : DebugVersion(LLVMDebugVersion)
-  , Validity()
+  : Validity()
   , Counts()
   {}
   ~DIVerifier() {}
@@ -1039,15 +1039,10 @@
     std::vector<T *> AnchoredDescs;
     for (unsigned i = 0, N = Globals.size(); i < N; ++i) {
       GlobalVariable *GV = Globals[i];
-      unsigned Tag = DebugInfoDesc::TagFromGlobal(GV);
-      
-      if (isa<CompileUnitDesc>(&Desc)) {
-        unsigned DebugVersion = CompileUnitDesc::DebugVersionFromGlobal(GV);
-        // FIXME - In the short term, changes are too drastic to continue.
-        if (DebugVersion != LLVMDebugVersion) break;
-      }
       
-      if (Tag == Desc.getTag()) {
+      // FIXME - In the short term, changes are too drastic to continue.
+      if (DebugInfoDesc::TagFromGlobal(GV) == Desc.getTag() &&
+          DebugInfoDesc::VersionFromGlobal(GV) == LLVMDebugVersion) {
         AnchoredDescs.push_back(cast<T>(DR.Deserialize(GV)));
       }
     }





From jlaskey at apple.com  Wed Jun 14 09:45:52 2006
From: jlaskey at apple.com (Jim Laskey)
Date: Wed, 14 Jun 2006 09:45:52 -0500
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/MachineDebugInfo.cpp 
Message-ID: <200606141445.JAA02072@zion.cs.uiuc.edu>



Changes in directory llvm/lib/CodeGen:

MachineDebugInfo.cpp updated: 1.39 -> 1.40
---
Log message:

Change versioning to per debug info descriptor (merged with tag.)



---
Diffs of the changes:  (+24 -28)

 MachineDebugInfo.cpp |   52 +++++++++++++++++++++++----------------------------
 1 files changed, 24 insertions(+), 28 deletions(-)


Index: llvm/lib/CodeGen/MachineDebugInfo.cpp
diff -u llvm/lib/CodeGen/MachineDebugInfo.cpp:1.39 llvm/lib/CodeGen/MachineDebugInfo.cpp:1.40
--- llvm/lib/CodeGen/MachineDebugInfo.cpp:1.39	Wed Jun 14 06:35:03 2006
+++ llvm/lib/CodeGen/MachineDebugInfo.cpp	Wed Jun 14 09:45:39 2006
@@ -455,11 +455,20 @@
 
 //===----------------------------------------------------------------------===//
 
-/// TagFromGlobal - Returns the Tag number from a debug info descriptor
-/// GlobalVariable.  
+/// TagFromGlobal - Returns the tag number from a debug info descriptor
+/// GlobalVariable.   Return DIIValid if operand is not an unsigned int. 
 unsigned DebugInfoDesc::TagFromGlobal(GlobalVariable *GV) {
   ConstantUInt *C = getUIntOperand(GV, 0);
-  return C ? (unsigned)C->getValue() : (unsigned)DW_TAG_invalid;
+  return C ? ((unsigned)C->getValue() & tag_mask) : (unsigned)DW_TAG_invalid;
+}
+
+/// VersionFromGlobal - Returns the version number from a debug info
+/// descriptor GlobalVariable.  Return DIIValid if operand is not an unsigned
+/// int.
+unsigned  DebugInfoDesc::VersionFromGlobal(GlobalVariable *GV) {
+  ConstantUInt *C = getUIntOperand(GV, 0);
+  return C ? ((unsigned)C->getValue() >> version_shift) :
+             (unsigned)DW_TAG_invalid;
 }
 
 /// DescFactory - Create an instance of debug info descriptor based on Tag.
@@ -563,6 +572,7 @@
 #ifndef NDEBUG
 void AnchorDesc::dump() {
   std::cerr << getDescString() << " "
+            << "Version(" << getVersion() << "), "
             << "Tag(" << getTag() << "), "
             << "AnchorTag(" << AnchorTag << ")\n";
 }
@@ -589,7 +599,6 @@
 
 CompileUnitDesc::CompileUnitDesc()
 : AnchoredDesc(DW_TAG_compile_unit)
-, DebugVersion(LLVMDebugVersion)
 , Language(0)
 , FileName("")
 , Directory("")
@@ -601,19 +610,11 @@
   return D->getTag() == DW_TAG_compile_unit;
 }
 
-/// DebugVersionFromGlobal - Returns the version number from a compile unit
-/// GlobalVariable.
-unsigned CompileUnitDesc::DebugVersionFromGlobal(GlobalVariable *GV) {
-  ConstantUInt *C = getUIntOperand(GV, 2);
-  return C ? (unsigned)C->getValue() : (unsigned)DW_TAG_invalid;
-}
-  
 /// ApplyToFields - Target the visitor to the fields of the CompileUnitDesc.
 ///
 void CompileUnitDesc::ApplyToFields(DIVisitor *Visitor) {
   AnchoredDesc::ApplyToFields(Visitor);
 
-  Visitor->Apply(DebugVersion);
   Visitor->Apply(Language);
   Visitor->Apply(FileName);
   Visitor->Apply(Directory);
@@ -642,9 +643,9 @@
 #ifndef NDEBUG
 void CompileUnitDesc::dump() {
   std::cerr << getDescString() << " "
+            << "Version(" << getVersion() << "), "
             << "Tag(" << getTag() << "), "
             << "Anchor(" << getAnchor() << "), "
-            << "DebugVersion(" << DebugVersion << "), "
             << "Language(" << Language << "), "
             << "FileName(\"" << FileName << "\"), "
             << "Directory(\"" << Directory << "\"), "
@@ -696,6 +697,7 @@
 #ifndef NDEBUG
 void TypeDesc::dump() {
   std::cerr << getDescString() << " "
+            << "Version(" << getVersion() << "), "
             << "Tag(" << getTag() << "), "
             << "Context(" << Context << "), "
             << "Name(\"" << Name << "\"), "
@@ -742,6 +744,7 @@
 #ifndef NDEBUG
 void BasicTypeDesc::dump() {
   std::cerr << getDescString() << " "
+            << "Version(" << getVersion() << "), "
             << "Tag(" << getTag() << "), "
             << "Context(" << getContext() << "), "
             << "Name(\"" << getName() << "\"), "
@@ -799,6 +802,7 @@
 #ifndef NDEBUG
 void DerivedTypeDesc::dump() {
   std::cerr << getDescString() << " "
+            << "Version(" << getVersion() << "), "
             << "Tag(" << getTag() << "), "
             << "Context(" << getContext() << "), "
             << "Name(\"" << getName() << "\"), "
@@ -853,6 +857,7 @@
 #ifndef NDEBUG
 void CompositeTypeDesc::dump() {
   std::cerr << getDescString() << " "
+            << "Version(" << getVersion() << "), "
             << "Tag(" << getTag() << "), "
             << "Context(" << getContext() << "), "
             << "Name(\"" << getName() << "\"), "
@@ -901,6 +906,7 @@
 #ifndef NDEBUG
 void SubrangeDesc::dump() {
   std::cerr << getDescString() << " "
+            << "Version(" << getVersion() << "), "
             << "Tag(" << getTag() << "), "
             << "Lo(" << Lo << "), "
             << "Hi(" << Hi << ")\n";
@@ -944,6 +950,7 @@
 #ifndef NDEBUG
 void EnumeratorDesc::dump() {
   std::cerr << getDescString() << " "
+            << "Version(" << getVersion() << "), "
             << "Tag(" << getTag() << "), "
             << "Name(" << Name << "), "
             << "Value(" << Value << ")\n";
@@ -1005,6 +1012,7 @@
 #ifndef NDEBUG
 void VariableDesc::dump() {
   std::cerr << getDescString() << " "
+            << "Version(" << getVersion() << "), "
             << "Tag(" << getTag() << "), "
             << "Context(" << Context << "), "
             << "Name(\"" << Name << "\"), "
@@ -1087,6 +1095,7 @@
 #ifndef NDEBUG
 void GlobalVariableDesc::dump() {
   std::cerr << getDescString() << " "
+            << "Version(" << getVersion() << "), "
             << "Tag(" << getTag() << "), "
             << "Anchor(" << getAnchor() << "), "
             << "Name(\"" << getName() << "\"), "
@@ -1138,6 +1147,7 @@
 #ifndef NDEBUG
 void SubprogramDesc::dump() {
   std::cerr << getDescString() << " "
+            << "Version(" << getVersion() << "), "
             << "Tag(" << getTag() << "), "
             << "Anchor(" << getAnchor() << "), "
             << "Name(\"" << getName() << "\"), "
@@ -1184,6 +1194,7 @@
 #ifndef NDEBUG
 void BlockDesc::dump() {
   std::cerr << getDescString() << " "
+            << "Version(" << getVersion() << "), "
             << "Tag(" << getTag() << "),"
             << "Context(" << Context << ")\n";
 }
@@ -1205,11 +1216,6 @@
   // Get the Tag from the global.
   unsigned Tag = DebugInfoDesc::TagFromGlobal(GV);
   
-  // Get the debug version if a compile unit.
-  if (Tag == DW_TAG_compile_unit) {
-    DebugVersion = CompileUnitDesc::DebugVersionFromGlobal(GV);
-  }
-  
   // Create an empty instance of the correct sort.
   Slot = DebugInfoDesc::DescFactory(Tag);
   
@@ -1366,16 +1372,6 @@
   // Check for user defined descriptors.
   if (Tag == DW_TAG_invalid) return true;
 
-  // If a compile unit we need the debug version.
-  if (Tag == DW_TAG_compile_unit) {
-    DebugVersion = CompileUnitDesc::DebugVersionFromGlobal(GV);
-    // FIXME - In the short term, changes are too drastic to continue.
-    if (DebugVersion != LLVMDebugVersion) {
-      ValiditySlot = Invalid;
-      return false;
-    }
-  }
-  
   // Construct an empty DebugInfoDesc.
   DebugInfoDesc *DD = DebugInfoDesc::DescFactory(Tag);
   





From evan.cheng at apple.com  Wed Jun 14 13:17:52 2006
From: evan.cheng at apple.com (Evan Cheng)
Date: Wed, 14 Jun 2006 13:17:52 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp 
Message-ID: <200606141817.NAA03436@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/X86:

X86ISelLowering.cpp updated: 1.228 -> 1.229
---
Log message:

Add argument registers to the end of call operand list (partial fix).

---
Diffs of the changes:  (+15 -1)

 X86ISelLowering.cpp |   16 +++++++++++++++-
 1 files changed, 15 insertions(+), 1 deletion(-)


Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.228 llvm/lib/Target/X86/X86ISelLowering.cpp:1.229
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.228	Fri Jun  9 01:24:42 2006
+++ llvm/lib/Target/X86/X86ISelLowering.cpp	Wed Jun 14 13:17:40 2006
@@ -617,6 +617,13 @@
   std::vector<SDOperand> Ops;
   Ops.push_back(Chain);
   Ops.push_back(Callee);
+
+  // Add argument registers to the end of the list so that they are known live
+  // into the call.
+  for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i)
+    Ops.push_back(DAG.getRegister(RegsToPass[i].first, 
+                                  RegsToPass[i].second.getValueType()));
+
   if (InFlag.Val)
     Ops.push_back(InFlag);
 
@@ -985,7 +992,7 @@
   return DAG.getNode(ISD::MERGE_VALUES, RetVTs, ArgValues);
 }
 
- SDOperand X86TargetLowering::LowerFastCCCallTo(SDOperand Op, SelectionDAG &DAG) {
+SDOperand X86TargetLowering::LowerFastCCCallTo(SDOperand Op, SelectionDAG &DAG) {
   SDOperand Chain     = Op.getOperand(0);
   unsigned CallingConv= cast<ConstantSDNode>(Op.getOperand(1))->getValue();
   bool isVarArg       = cast<ConstantSDNode>(Op.getOperand(2))->getValue() != 0;
@@ -1139,6 +1146,13 @@
   std::vector<SDOperand> Ops;
   Ops.push_back(Chain);
   Ops.push_back(Callee);
+
+  // Add argument registers to the end of the list so that they are known live
+  // into the call.
+  for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i)
+    Ops.push_back(DAG.getRegister(RegsToPass[i].first, 
+                                  RegsToPass[i].second.getValueType()));
+
   if (InFlag.Val)
     Ops.push_back(InFlag);
 





From evan.cheng at apple.com  Wed Jun 14 14:28:03 2006
From: evan.cheng at apple.com (Evan Cheng)
Date: Wed, 14 Jun 2006 14:28:03 -0500
Subject: [llvm-commits] CVS: llvm/utils/TableGen/DAGISelEmitter.cpp 
Message-ID: <200606141928.OAA03878@zion.cs.uiuc.edu>



Changes in directory llvm/utils/TableGen:

DAGISelEmitter.cpp updated: 1.209 -> 1.210
---
Log message:

Fix support for optional input flag.

---
Diffs of the changes:  (+11 -17)

 DAGISelEmitter.cpp |   28 +++++++++++-----------------
 1 files changed, 11 insertions(+), 17 deletions(-)


Index: llvm/utils/TableGen/DAGISelEmitter.cpp
diff -u llvm/utils/TableGen/DAGISelEmitter.cpp:1.209 llvm/utils/TableGen/DAGISelEmitter.cpp:1.210
--- llvm/utils/TableGen/DAGISelEmitter.cpp:1.209	Tue Jun 13 16:47:27 2006
+++ llvm/utils/TableGen/DAGISelEmitter.cpp	Wed Jun 14 14:27:50 2006
@@ -2515,8 +2515,10 @@
 
       if (NodeHasInFlag || NodeHasOutFlag || NodeHasOptInFlag || HasImpInputs)
         emitDecl("InFlag");
-      if (NodeHasOptInFlag)
-        emitCode("bool HasOptInFlag = false;");
+      if (NodeHasOptInFlag) {
+        emitCode("bool HasOptInFlag = "
+             "N.getOperand(N.getNumOperands()-1).getValueType() == MVT::Flag;");
+      }
 
       // How many results is this pattern expected to produce?
       unsigned PatResults = 0;
@@ -2576,8 +2578,12 @@
       bool ChainEmitted = NodeHasChain;
       if (NodeHasChain)
         emitCode("Select(" + ChainName + ", " + ChainName + ");");
-      if (NodeHasInFlag || NodeHasOptInFlag || HasImpInputs)
+      if (NodeHasInFlag || HasImpInputs)
         EmitInFlagSelectCode(Pattern, "N", ChainEmitted, true);
+      if (NodeHasOptInFlag) {
+        emitCode("if (HasOptInFlag)");
+        emitCode("  Select(InFlag, N.getOperand(N.getNumOperands()-1));");
+      }
 
       if (isRoot) {
         // The operands have been selected. Remove them from InFlightSet.
@@ -2854,7 +2860,6 @@
     unsigned OpNo =
       (unsigned) NodeHasProperty(N, SDNodeInfo::SDNPHasChain, ISE);
     bool HasInFlag = NodeHasProperty(N, SDNodeInfo::SDNPInFlag, ISE);
-    bool HasOptInFlag = NodeHasProperty(N, SDNodeInfo::SDNPOptInFlag, ISE);
     for (unsigned i = 0, e = N->getNumChildren(); i != e; ++i, ++OpNo) {
       TreePatternNode *Child = N->getChild(i);
       if (!Child->isLeaf()) {
@@ -2894,20 +2899,9 @@
       }
     }
 
-    if (HasInFlag || HasOptInFlag) {
-      std::string Code;
-      if (HasOptInFlag) {
-        emitCode("if (" + RootName + ".getNumOperands() == " + utostr(OpNo+1) +
-                 ") {");
-        Code = "  ";
-      }
-      emitCode(Code + "Select(InFlag, " + RootName +
+    if (HasInFlag)
+      emitCode("Select(InFlag, " + RootName +
                ".getOperand(" + utostr(OpNo) + "));");
-      if (HasOptInFlag) {
-        emitCode("  HasOptInFlag = true;");
-        emitCode("}");
-      }
-    }
   }
 
   /// EmitCopyFromRegs - Emit code to copy result to physical registers





From alenhar2 at cs.uiuc.edu  Wed Jun 14 16:17:47 2006
From: alenhar2 at cs.uiuc.edu (Andrew Lenharth)
Date: Wed, 14 Jun 2006 16:17:47 -0500
Subject: [llvm-commits] CVS: llvm-poolalloc/lib/PoolAllocate/Heuristic.cpp
	PoolAllocate.h 
Message-ID: <200606142117.QAA04366@zion.cs.uiuc.edu>



Changes in directory llvm-poolalloc/lib/PoolAllocate:

Heuristic.cpp updated: 1.13 -> 1.14
PoolAllocate.h updated: 1.48 -> 1.49
---
Log message:

Fix compile problems

---
Diffs of the changes:  (+2 -2)

 Heuristic.cpp  |    2 +-
 PoolAllocate.h |    2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)


Index: llvm-poolalloc/lib/PoolAllocate/Heuristic.cpp
diff -u llvm-poolalloc/lib/PoolAllocate/Heuristic.cpp:1.13 llvm-poolalloc/lib/PoolAllocate/Heuristic.cpp:1.14
--- llvm-poolalloc/lib/PoolAllocate/Heuristic.cpp:1.13	Wed May 18 14:56:28 2005
+++ llvm-poolalloc/lib/PoolAllocate/Heuristic.cpp	Wed Jun 14 16:17:32 2006
@@ -31,7 +31,7 @@
     SmartCoallesceNodes,
     CyclicNodes,
     AllButUnreachableFromMemory,
-    AllNodes,
+    AllNodes
   };
   cl::opt<PoolAllocHeuristic>
   TheHeuristic("poolalloc-heuristic",


Index: llvm-poolalloc/lib/PoolAllocate/PoolAllocate.h
diff -u llvm-poolalloc/lib/PoolAllocate/PoolAllocate.h:1.48 llvm-poolalloc/lib/PoolAllocate/PoolAllocate.h:1.49
--- llvm-poolalloc/lib/PoolAllocate/PoolAllocate.h:1.48	Thu Dec 22 10:32:21 2005
+++ llvm-poolalloc/lib/PoolAllocate/PoolAllocate.h	Wed Jun 14 16:17:32 2006
@@ -107,7 +107,7 @@
     }
   };
 
-}; // end PA namespace
+} // end PA namespace
 
 
 





From alenhar2 at cs.uiuc.edu  Wed Jun 14 16:17:47 2006
From: alenhar2 at cs.uiuc.edu (Andrew Lenharth)
Date: Wed, 14 Jun 2006 16:17:47 -0500
Subject: [llvm-commits] CVS: llvm-poolalloc/runtime/Makefile 
Message-ID: <200606142117.QAA04360@zion.cs.uiuc.edu>



Changes in directory llvm-poolalloc/runtime:

Makefile updated: 1.10 -> 1.11
---
Log message:

Fix compile problems

---
Diffs of the changes:  (+1 -1)

 Makefile |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm-poolalloc/runtime/Makefile
diff -u llvm-poolalloc/runtime/Makefile:1.10 llvm-poolalloc/runtime/Makefile:1.11
--- llvm-poolalloc/runtime/Makefile:1.10	Thu Dec 22 12:04:25 2005
+++ llvm-poolalloc/runtime/Makefile	Wed Jun 14 16:17:32 2006
@@ -6,6 +6,6 @@
 #
 # List all of the subdirectories that we will compile.
 #
-DIRS=PoolAllocator FreeListAllocator FL2Allocator
+DIRS=FreeListAllocator FL2Allocator
 
 include $(LEVEL)/Makefile.common





From alenhar2 at cs.uiuc.edu  Wed Jun 14 16:17:47 2006
From: alenhar2 at cs.uiuc.edu (Andrew Lenharth)
Date: Wed, 14 Jun 2006 16:17:47 -0500
Subject: [llvm-commits] 
	CVS: llvm-poolalloc/runtime/FL2Allocator/PoolAllocator.cpp
	PoolAllocator.h 
Message-ID: <200606142117.QAA04378@zion.cs.uiuc.edu>



Changes in directory llvm-poolalloc/runtime/FL2Allocator:

PoolAllocator.cpp updated: 1.52 -> 1.53
PoolAllocator.h updated: 1.26 -> 1.27
---
Log message:

Fix compile problems

---
Diffs of the changes:  (+3 -3)

 PoolAllocator.cpp |    2 +-
 PoolAllocator.h   |    4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)


Index: llvm-poolalloc/runtime/FL2Allocator/PoolAllocator.cpp
diff -u llvm-poolalloc/runtime/FL2Allocator/PoolAllocator.cpp:1.52 llvm-poolalloc/runtime/FL2Allocator/PoolAllocator.cpp:1.53
--- llvm-poolalloc/runtime/FL2Allocator/PoolAllocator.cpp:1.52	Thu Apr 27 10:50:02 2006
+++ llvm-poolalloc/runtime/FL2Allocator/PoolAllocator.cpp	Wed Jun 14 16:17:32 2006
@@ -542,7 +542,7 @@
   DO_IF_TRACE(fprintf(stderr, "[%d] poolalloc%s(%d) -> ",
                       getPoolNumber(Pool), PoolTraits::getSuffix(), NumBytesA));
 
-  int NumBytes = NumBytesA;
+  unsigned NumBytes = NumBytesA;
 
   // If a null pool descriptor is passed in, this is not a pool allocated data
   // structure.  Hand off to the system malloc.


Index: llvm-poolalloc/runtime/FL2Allocator/PoolAllocator.h
diff -u llvm-poolalloc/runtime/FL2Allocator/PoolAllocator.h:1.26 llvm-poolalloc/runtime/FL2Allocator/PoolAllocator.h:1.27
--- llvm-poolalloc/runtime/FL2Allocator/PoolAllocator.h:1.26	Thu Apr 27 10:50:02 2006
+++ llvm-poolalloc/runtime/FL2Allocator/PoolAllocator.h	Wed Jun 14 16:17:32 2006
@@ -37,7 +37,7 @@
   typedef unsigned long NodeHeaderType;
   enum {
     UseLargeArrayObjects = 1,
-    CanGrowPool = 1,
+    CanGrowPool = 1
   };
 
   // Pointers are just pointers.
@@ -69,7 +69,7 @@
 
   enum {
     UseLargeArrayObjects = 0,
-    CanGrowPool = 0,
+    CanGrowPool = 0
   };
 
   // Represent pointers with indexes from the pool base.





From alenhar2 at cs.uiuc.edu  Wed Jun 14 16:17:47 2006
From: alenhar2 at cs.uiuc.edu (Andrew Lenharth)
Date: Wed, 14 Jun 2006 16:17:47 -0500
Subject: [llvm-commits] 
	CVS: llvm-poolalloc/runtime/FreeListAllocator/PoolAllocator.cpp
	PoolSlab.h 
Message-ID: <200606142117.QAA04372@zion.cs.uiuc.edu>



Changes in directory llvm-poolalloc/runtime/FreeListAllocator:

PoolAllocator.cpp updated: 1.34 -> 1.35
PoolSlab.h updated: 1.6 -> 1.7
---
Log message:

Fix compile problems

---
Diffs of the changes:  (+4 -4)

 PoolAllocator.cpp |    5 ++---
 PoolSlab.h        |    3 ++-
 2 files changed, 4 insertions(+), 4 deletions(-)


Index: llvm-poolalloc/runtime/FreeListAllocator/PoolAllocator.cpp
diff -u llvm-poolalloc/runtime/FreeListAllocator/PoolAllocator.cpp:1.34 llvm-poolalloc/runtime/FreeListAllocator/PoolAllocator.cpp:1.35
--- llvm-poolalloc/runtime/FreeListAllocator/PoolAllocator.cpp:1.34	Wed May 18 14:56:31 2005
+++ llvm-poolalloc/runtime/FreeListAllocator/PoolAllocator.cpp	Wed Jun 14 16:17:32 2006
@@ -99,7 +99,6 @@
       NodesPerSlab = MaxNodesPerPage;
     }
   }
-
   NewSlab->NodesPerSlab = NodesPerSlab;
   NewSlab->NextFreeData = NewSlab->LiveNodes = 0;
   NewSlab->Next = NULL;
@@ -413,7 +412,7 @@
   //
   // Find the data block that corresponds with this pointer.
   //
-  Data = (Slabp->Data + (Pool->NodeSize * (Pool->FreeList.Next - &(Slabp->BlockList[0]))));
+  Data = (Slabp->Data + (Pool->NodeSize * (Pool->FreeList.Next - &(BlockList(Slabp)[0]))));
 
   //
   // Unlink the first block.
@@ -451,7 +450,7 @@
   // Find the node pointer that corresponds to this data block.
   //
   NodePointer Node;
-  Node.Next = &(slabp->BlockList[((unsigned char *)Block - slabp->Data)/Pool->NodeSize]);
+  Node.Next = &(BlockList(slabp)[((unsigned char *)Block - slabp->Data)/Pool->NodeSize]);
 
   //
   // Add the node back to the free list.


Index: llvm-poolalloc/runtime/FreeListAllocator/PoolSlab.h
diff -u llvm-poolalloc/runtime/FreeListAllocator/PoolSlab.h:1.6 llvm-poolalloc/runtime/FreeListAllocator/PoolSlab.h:1.7
--- llvm-poolalloc/runtime/FreeListAllocator/PoolSlab.h:1.6	Wed May 18 14:56:32 2005
+++ llvm-poolalloc/runtime/FreeListAllocator/PoolSlab.h	Wed Jun 14 16:17:33 2006
@@ -73,7 +73,8 @@
   unsigned char * Data;
 
   // Pointer to the list of nodes
-  NodePointer BlockList [];
+  //NodePointer* BlockList;
 };
+#define BlockList(x) ((NodePointer*)((char*)x + sizeof(SlabHeader)))
 
 #endif /* _POOLSLAB_H */





From lattner at cs.uiuc.edu  Wed Jun 14 16:25:09 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed, 14 Jun 2006 16:25:09 -0500
Subject: [llvm-commits] 
	CVS: llvm/test/Regression/CodeGen/X86/vec_ins_extract.ll
Message-ID: <200606142125.QAA04461@zion.cs.uiuc.edu>



Changes in directory llvm/test/Regression/CodeGen/X86:

vec_ins_extract.ll added (r1.1)
---
Log message:

new testcase, not currently working.


---
Diffs of the changes:  (+52 -0)

 vec_ins_extract.ll |   52 ++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 files changed, 52 insertions(+)


Index: llvm/test/Regression/CodeGen/X86/vec_ins_extract.ll
diff -c /dev/null llvm/test/Regression/CodeGen/X86/vec_ins_extract.ll:1.1
*** /dev/null	Wed Jun 14 16:25:07 2006
--- llvm/test/Regression/CodeGen/X86/vec_ins_extract.ll	Wed Jun 14 16:24:57 2006
***************
*** 0 ****
--- 1,52 ----
+ ; RUN: llvm-as< %s | llc -march=x86 -mcpu=yonah &&
+ ; RUN: llvm-as< %s | llc -march=x86 -mcpu=yonah | not grep sub.*esp
+ 
+ ; This checks that various insert/extract idiom work without going to the 
+ ; stack.
+ ; XFAIL: *
+ 
+ void %test(<4 x float>* %F, float %f) {
+ entry:
+ 	%tmp = load <4 x float>* %F		; <<4 x float>> [#uses=2]
+ 	%tmp3 = add <4 x float> %tmp, %tmp		; <<4 x float>> [#uses=1]
+ 	%tmp10 = insertelement <4 x float> %tmp3, float %f, uint 0		; <<4 x float>> [#uses=2]
+ 	%tmp6 = add <4 x float> %tmp10, %tmp10		; <<4 x float>> [#uses=1]
+ 	store <4 x float> %tmp6, <4 x float>* %F
+ 	ret void
+ }
+ 
+ void %test2(<4 x float>* %F, float %f) {
+ entry:
+ 	%G = alloca <4 x float>, align 16		; <<4 x float>*> [#uses=3]
+ 	%tmp = load <4 x float>* %F		; <<4 x float>> [#uses=2]
+ 	%tmp3 = add <4 x float> %tmp, %tmp		; <<4 x float>> [#uses=1]
+ 	store <4 x float> %tmp3, <4 x float>* %G
+ 	%tmp = getelementptr <4 x float>* %G, int 0, int 2		; <float*> [#uses=1]
+ 	store float %f, float* %tmp
+ 	%tmp4 = load <4 x float>* %G		; <<4 x float>> [#uses=2]
+ 	%tmp6 = add <4 x float> %tmp4, %tmp4		; <<4 x float>> [#uses=1]
+ 	store <4 x float> %tmp6, <4 x float>* %F
+ 	ret void
+ }
+ 
+ void %test3(<4 x float>* %F, float* %f) {
+ entry:
+ 	%G = alloca <4 x float>, align 16		; <<4 x float>*> [#uses=2]
+ 	%tmp = load <4 x float>* %F		; <<4 x float>> [#uses=2]
+ 	%tmp3 = add <4 x float> %tmp, %tmp		; <<4 x float>> [#uses=1]
+ 	store <4 x float> %tmp3, <4 x float>* %G
+ 	%tmp = getelementptr <4 x float>* %G, int 0, int 2		; <float*> [#uses=1]
+ 	%tmp = load float* %tmp		; <float> [#uses=1]
+ 	store float %tmp, float* %f
+ 	ret void
+ }
+ 
+ void %test4(<4 x float>* %F, float* %f) {
+ entry:
+ 	%tmp = load <4 x float>* %F		; <<4 x float>> [#uses=2]
+ 	%tmp5.lhs = extractelement <4 x float> %tmp, uint 0		; <float> [#uses=1]
+ 	%tmp5.rhs = extractelement <4 x float> %tmp, uint 0		; <float> [#uses=1]
+ 	%tmp5 = add float %tmp5.lhs, %tmp5.rhs		; <float> [#uses=1]
+ 	store float %tmp5, float* %f
+ 	ret void
+ }





From lattner at cs.uiuc.edu  Wed Jun 14 16:26:30 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Wed, 14 Jun 2006 16:26:30 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/README-SSE.txt 
Message-ID: <200606142126.QAA04506@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/X86:

README-SSE.txt updated: 1.2 -> 1.3
---
Log message:

add a note


---
Diffs of the changes:  (+29 -0)

 README-SSE.txt |   29 +++++++++++++++++++++++++++++
 1 files changed, 29 insertions(+)


Index: llvm/lib/Target/X86/README-SSE.txt
diff -u llvm/lib/Target/X86/README-SSE.txt:1.2 llvm/lib/Target/X86/README-SSE.txt:1.3
--- llvm/lib/Target/X86/README-SSE.txt:1.2	Tue May 30 18:56:31 2006
+++ llvm/lib/Target/X86/README-SSE.txt	Wed Jun 14 16:26:18 2006
@@ -664,3 +664,32 @@
 //===---------------------------------------------------------------------===//
 
 Add hooks to commute some CMPP operations.
+
+//===---------------------------------------------------------------------===//
+
+Implement some missing insert/extract element operations without going through
+the stack.  Testcase here:
+CodeGen/X86/vec_ins_extract.ll
+corresponds to this C code:
+
+typedef float vectorfloat __attribute__((vector_size(16)));
+void test(vectorfloat *F, float f) {
+  vectorfloat G = *F + *F;
+  *((float*)&G) = f;
+  *F = G + G;
+}
+void test2(vectorfloat *F, float f) {
+  vectorfloat G = *F + *F;
+  ((float*)&G)[2] = f;
+  *F = G + G;
+}
+void test3(vectorfloat *F, float *f) {
+  vectorfloat G = *F + *F;
+  *f = ((float*)&G)[2];
+}
+void test4(vectorfloat *F, float *f) {
+  vectorfloat G = *F + *F;
+  *f = *((float*)&G);
+}
+
+//===---------------------------------------------------------------------===//





From evan.cheng at apple.com  Wed Jun 14 17:22:33 2006
From: evan.cheng at apple.com (Evan Cheng)
Date: Wed, 14 Jun 2006 17:22:33 -0500
Subject: [llvm-commits] CVS: llvm/utils/TableGen/DAGISelEmitter.cpp 
Message-ID: <200606142222.RAA04925@zion.cs.uiuc.edu>



Changes in directory llvm/utils/TableGen:

DAGISelEmitter.cpp updated: 1.210 -> 1.211
---
Log message:

Added support for variable_ops.


---
Diffs of the changes:  (+78 -85)

 DAGISelEmitter.cpp |  163 +++++++++++++++++++++++++----------------------------
 1 files changed, 78 insertions(+), 85 deletions(-)


Index: llvm/utils/TableGen/DAGISelEmitter.cpp
diff -u llvm/utils/TableGen/DAGISelEmitter.cpp:1.210 llvm/utils/TableGen/DAGISelEmitter.cpp:1.211
--- llvm/utils/TableGen/DAGISelEmitter.cpp:1.210	Wed Jun 14 14:27:50 2006
+++ llvm/utils/TableGen/DAGISelEmitter.cpp	Wed Jun 14 17:22:20 2006
@@ -2500,6 +2500,7 @@
       if (InstPatNode && InstPatNode->getOperator()->getName() == "set") {
         InstPatNode = InstPatNode->getChild(1);
       }
+      bool HasVarOps     = isRoot && II.hasVariableNumberOfOperands;
       bool HasImpInputs  = isRoot && Inst.getNumImpOperands() > 0;
       bool HasImpResults = isRoot && Inst.getNumImpResults() > 0;
       bool NodeHasOptInFlag = isRoot &&
@@ -2515,10 +2516,11 @@
 
       if (NodeHasInFlag || NodeHasOutFlag || NodeHasOptInFlag || HasImpInputs)
         emitDecl("InFlag");
-      if (NodeHasOptInFlag) {
-        emitCode("bool HasOptInFlag = "
+      if (NodeHasOptInFlag)
+        emitCode("bool HasInFlag = "
              "N.getOperand(N.getNumOperands()-1).getValueType() == MVT::Flag;");
-      }
+      if (HasVarOps)
+        emitCode("std::vector<SDOperand> Ops;");
 
       // How many results is this pattern expected to produce?
       unsigned PatResults = 0;
@@ -2581,7 +2583,7 @@
       if (NodeHasInFlag || HasImpInputs)
         EmitInFlagSelectCode(Pattern, "N", ChainEmitted, true);
       if (NodeHasOptInFlag) {
-        emitCode("if (HasOptInFlag)");
+        emitCode("if (HasInFlag)");
         emitCode("  Select(InFlag, N.getOperand(N.getNumOperands()-1));");
       }
 
@@ -2596,96 +2598,87 @@
       unsigned ResNo = TmpNo++;
       if (!isRoot || InputHasChain || NodeHasChain || NodeHasOutFlag ||
           NodeHasOptInFlag) {
-        if (NodeHasOptInFlag) {
-          unsigned FlagNo = (unsigned) NodeHasChain + Pattern->getNumChildren();
-          emitDecl("ResNode", true);
-          emitCode("if (HasOptInFlag)");
-          std::string Code = "  ResNode = CurDAG->getTargetNode(" +
-             II.Namespace + "::" + II.TheDef->getName();
-
-          // Output order: results, chain, flags
-          // Result types.
-          if (PatResults > 0) { 
-            if (N->getTypeNum(0) != MVT::isVoid)
-              Code += ", " + getEnumName(N->getTypeNum(0));
-          }
-          if (NodeHasChain)
-            Code += ", MVT::Other";
-          if (NodeHasOutFlag)
-            Code += ", MVT::Flag";
+        std::string Code;
+        std::string Code2;
+        std::string NodeName;
+        if (!isRoot) {
+          NodeName = "Tmp" + utostr(ResNo);
+          emitDecl(NodeName);
+          Code2 = NodeName + " = SDOperand(";
+        } else {
+          NodeName = "ResNode";
+          emitDecl(NodeName, true);
+          Code2 = NodeName + " = ";
+        }
+        Code = "CurDAG->getTargetNode(" +
+          II.Namespace + "::" + II.TheDef->getName();
 
-          // Inputs.
-          for (unsigned i = 0, e = Ops.size(); i != e; ++i)
-            Code += ", Tmp" + utostr(Ops[i]);
-          if (NodeHasChain)  Code += ", " + ChainName;
-          emitCode(Code + ", InFlag);");
+        // Output order: results, chain, flags
+        // Result types.
+        if (NumResults > 0 && N->getTypeNum(0) != MVT::isVoid)
+          Code += ", " + getEnumName(N->getTypeNum(0));
+        if (NodeHasChain)
+          Code += ", MVT::Other";
+        if (NodeHasOutFlag)
+          Code += ", MVT::Flag";
 
-          emitCode("else");
-          Code = "  ResNode = CurDAG->getTargetNode(" + II.Namespace + "::" +
-                 II.TheDef->getName();
+        // Inputs.
+        for (unsigned i = 0, e = Ops.size(); i != e; ++i) {
+          if (HasVarOps)
+            emitCode("Ops.push_back(Tmp" + utostr(Ops[i]) + ");");
+          else
+            Code += ", Tmp" + utostr(Ops[i]);
+        }
 
-          // Output order: results, chain, flags
-          // Result types.
-          if (PatResults > 0 && N->getTypeNum(0) != MVT::isVoid)
-            Code += ", " + getEnumName(N->getTypeNum(0));
-          if (NodeHasChain)
-            Code += ", MVT::Other";
-          if (NodeHasOutFlag)
-            Code += ", MVT::Flag";
+        if (HasVarOps) {
+          if (NodeHasInFlag || HasImpInputs)
+            emitCode("for (unsigned i = 2, e = N.getNumOperands()-1; "
+                     "i != e; ++i) {");
+          else if (NodeHasOptInFlag) 
+            emitCode("for (unsigned i = 2, e = N.getNumOperands()-HasInFlag; "
+                     "i != e; ++i) {");
+          else
+            emitCode("for (unsigned i = 2, e = N.getNumOperands(); "
+                     "i != e; ++i) {");
+          emitCode("  SDOperand VarOp(0, 0);");
+          emitCode("  Select(VarOp, N.getOperand(i));");
+          emitCode("  Ops.push_back(VarOp);");
+          emitCode("}");
+        }
 
-          // Inputs.
-          for (unsigned i = 0, e = Ops.size(); i != e; ++i)
-            Code += ", Tmp" + utostr(Ops[i]);
-          if (NodeHasChain) Code += ", " + ChainName + ");";
-          emitCode(Code);
+        if (NodeHasChain) {
+          if (HasVarOps)
+            emitCode("Ops.push_back(" + ChainName + ");");
+          else
+            Code += ", " + ChainName;
+        }
+        if (NodeHasInFlag || HasImpInputs) {
+          if (HasVarOps)
+            emitCode("Ops.push_back(InFlag);");
+          else
+            Code += ", InFlag";
+        } else if (NodeHasOptInFlag && HasVarOps) {
+          emitCode("if (HasInFlag)");
+          emitCode("  Ops.push_back(InFlag);");
+        }
 
-          if (NodeHasChain)
-            // Remember which op produces the chain.
-            emitCode(ChainName + " = SDOperand(ResNode" +
-                     ", " + utostr(PatResults) + ");");
-        } else {
-          std::string Code;
-          std::string NodeName;
-          if (!isRoot) {
-            NodeName = "Tmp" + utostr(ResNo);
-            emitDecl(NodeName);
-            Code = NodeName + " = SDOperand(";
-          } else {
-            NodeName = "ResNode";
-            emitDecl(NodeName, true);
-            Code = NodeName + " = ";
-          }
-          Code += "CurDAG->getTargetNode(" +
-            II.Namespace + "::" + II.TheDef->getName();
+        if (HasVarOps)
+          Code += ", Ops";
+        else if (NodeHasOptInFlag)
+          Code = "HasInFlag ? " + Code + ", InFlag) : " + Code;
 
-          // Output order: results, chain, flags
-          // Result types.
-          if (NumResults > 0 && N->getTypeNum(0) != MVT::isVoid)
-            Code += ", " + getEnumName(N->getTypeNum(0));
-          if (NodeHasChain)
-            Code += ", MVT::Other";
-          if (NodeHasOutFlag)
-            Code += ", MVT::Flag";
+        if (!isRoot)
+          Code += "), 0";
+        emitCode(Code2 + Code + ");");
 
-          // Inputs.
-          for (unsigned i = 0, e = Ops.size(); i != e; ++i)
-            Code += ", Tmp" + utostr(Ops[i]);
-          if (NodeHasChain) Code += ", " + ChainName;
-          if (NodeHasInFlag || HasImpInputs) Code += ", InFlag";
+        if (NodeHasChain)
+          // Remember which op produces the chain.
           if (!isRoot)
-            emitCode(Code + "), 0);");
+            emitCode(ChainName + " = SDOperand(" + NodeName +
+                     ".Val, " + utostr(PatResults) + ");");
           else
-            emitCode(Code + ");");
-
-          if (NodeHasChain)
-            // Remember which op produces the chain.
-            if (!isRoot)
-              emitCode(ChainName + " = SDOperand(" + NodeName +
-                       ".Val, " + utostr(PatResults) + ");");
-            else
-              emitCode(ChainName + " = SDOperand(" + NodeName +
-                       ", " + utostr(PatResults) + ");");
-        }
+            emitCode(ChainName + " = SDOperand(" + NodeName +
+                     ", " + utostr(PatResults) + ");");
 
         if (!isRoot)
           return std::make_pair(1, ResNo);





From evan.cheng at apple.com  Wed Jun 14 17:25:08 2006
From: evan.cheng at apple.com (Evan Cheng)
Date: Wed, 14 Jun 2006 17:25:08 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86InstrInfo.td 
Message-ID: <200606142225.RAA04951@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/X86:

X86InstrInfo.td updated: 1.275 -> 1.276
---
Log message:

X86 call instructions can take variable number of operands. Parameters of
vector types are passed via XMM registers.


---
Diffs of the changes:  (+6 -5)

 X86InstrInfo.td |   11 ++++++-----
 1 files changed, 6 insertions(+), 5 deletions(-)


Index: llvm/lib/Target/X86/X86InstrInfo.td
diff -u llvm/lib/Target/X86/X86InstrInfo.td:1.275 llvm/lib/Target/X86/X86InstrInfo.td:1.276
--- llvm/lib/Target/X86/X86InstrInfo.td:1.275	Fri Jun  2 16:09:10 2006
+++ llvm/lib/Target/X86/X86InstrInfo.td	Wed Jun 14 17:24:55 2006
@@ -438,11 +438,12 @@
   // All calls clobber the non-callee saved registers...
   let Defs = [EAX, ECX, EDX, FP0, FP1, FP2, FP3, FP4, FP5, FP6, ST0,
               XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7] in {
-    def CALLpcrel32 : I<0xE8, RawFrm, (ops i32imm:$dst), "call ${dst:call}",
-                      []>;
-    def CALL32r     : I<0xFF, MRM2r, (ops GR32:$dst), "call {*}$dst",
-                      [(X86call GR32:$dst)]>;
-    def CALL32m     : I<0xFF, MRM2m, (ops i32mem:$dst), "call {*}$dst", []>;
+    def CALLpcrel32 : I<0xE8, RawFrm, (ops i32imm:$dst, variable_ops),
+                        "call ${dst:call}", []>;
+    def CALL32r     : I<0xFF, MRM2r, (ops GR32:$dst, variable_ops),
+                        "call {*}$dst", [(X86call GR32:$dst)]>;
+    def CALL32m     : I<0xFF, MRM2m, (ops i32mem:$dst, variable_ops),
+                        "call {*}$dst", []>;
   }
 
 // Tail call stuff.





From evan.cheng at apple.com  Wed Jun 14 19:16:49 2006
From: evan.cheng at apple.com (Evan Cheng)
Date: Wed, 14 Jun 2006 19:16:49 -0500
Subject: [llvm-commits] CVS: llvm/utils/TableGen/CodeGenTarget.cpp
	DAGISelEmitter.cpp RegisterInfoEmitter.cpp 
Message-ID: <200606150016.TAA05571@zion.cs.uiuc.edu>



Changes in directory llvm/utils/TableGen:

CodeGenTarget.cpp updated: 1.67 -> 1.68
DAGISelEmitter.cpp updated: 1.211 -> 1.212
RegisterInfoEmitter.cpp updated: 1.44 -> 1.45
---
Log message:

Allow more use of iPTR in patterns.

---
Diffs of the changes:  (+24 -24)

 CodeGenTarget.cpp       |   44 ++++++++++++++++++++++----------------------
 DAGISelEmitter.cpp      |    2 +-
 RegisterInfoEmitter.cpp |    2 +-
 3 files changed, 24 insertions(+), 24 deletions(-)


Index: llvm/utils/TableGen/CodeGenTarget.cpp
diff -u llvm/utils/TableGen/CodeGenTarget.cpp:1.67 llvm/utils/TableGen/CodeGenTarget.cpp:1.68
--- llvm/utils/TableGen/CodeGenTarget.cpp:1.67	Wed May 17 19:08:46 2006
+++ llvm/utils/TableGen/CodeGenTarget.cpp	Wed Jun 14 19:16:37 2006
@@ -36,28 +36,28 @@
 std::string llvm::getName(MVT::ValueType T) {
   switch (T) {
   case MVT::Other: return "UNKNOWN";
-  case MVT::i1:    return "i1";
-  case MVT::i8:    return "i8";
-  case MVT::i16:   return "i16";
-  case MVT::i32:   return "i32";
-  case MVT::i64:   return "i64";
-  case MVT::i128:  return "i128";
-  case MVT::f32:   return "f32";
-  case MVT::f64:   return "f64";
-  case MVT::f80:   return "f80";
-  case MVT::f128:  return "f128";
-  case MVT::Flag:  return "Flag";
-  case MVT::isVoid:return "void";
-  case MVT::v8i8:  return "v8i8";
-  case MVT::v4i16: return "v4i16";
-  case MVT::v2i32: return "v2i32";
-  case MVT::v16i8: return "v16i8";
-  case MVT::v8i16: return "v8i16";
-  case MVT::v4i32: return "v4i32";
-  case MVT::v2i64: return "v2i64";
-  case MVT::v2f32: return "v2f32";
-  case MVT::v4f32: return "v4f32";
-  case MVT::v2f64: return "v2f64";
+  case MVT::i1:    return "MVT::i1";
+  case MVT::i8:    return "MVT::i8";
+  case MVT::i16:   return "MVT::i16";
+  case MVT::i32:   return "MVT::i32";
+  case MVT::i64:   return "MVT::i64";
+  case MVT::i128:  return "MVT::i128";
+  case MVT::f32:   return "MVT::f32";
+  case MVT::f64:   return "MVT::f64";
+  case MVT::f80:   return "MVT::f80";
+  case MVT::f128:  return "MVT::f128";
+  case MVT::Flag:  return "MVT::Flag";
+  case MVT::isVoid:return "MVT::void";
+  case MVT::v8i8:  return "MVT::v8i8";
+  case MVT::v4i16: return "MVT::v4i16";
+  case MVT::v2i32: return "MVT::v2i32";
+  case MVT::v16i8: return "MVT::v16i8";
+  case MVT::v8i16: return "MVT::v8i16";
+  case MVT::v4i32: return "MVT::v4i32";
+  case MVT::v2i64: return "MVT::v2i64";
+  case MVT::v2f32: return "MVT::v2f32";
+  case MVT::v4f32: return "MVT::v4f32";
+  case MVT::v2f64: return "MVT::v2f64";
   case MVT::iPTR:  return "TLI.getPointerTy()";
   default: assert(0 && "ILLEGAL VALUE TYPE!"); return "";
   }


Index: llvm/utils/TableGen/DAGISelEmitter.cpp
diff -u llvm/utils/TableGen/DAGISelEmitter.cpp:1.211 llvm/utils/TableGen/DAGISelEmitter.cpp:1.212
--- llvm/utils/TableGen/DAGISelEmitter.cpp:1.211	Wed Jun 14 17:22:20 2006
+++ llvm/utils/TableGen/DAGISelEmitter.cpp	Wed Jun 14 19:16:37 2006
@@ -2830,7 +2830,7 @@
     if (Pat->getExtTypes() != Other->getExtTypes()) {
       // Move a type over from 'other' to 'pat'.
       Pat->setTypes(Other->getExtTypes());
-      emitCheck(Prefix + ".Val->getValueType(0) == MVT::" +
+      emitCheck(Prefix + ".Val->getValueType(0) == " +
                 getName(Pat->getTypeNum(0)));
       return true;
     }


Index: llvm/utils/TableGen/RegisterInfoEmitter.cpp
diff -u llvm/utils/TableGen/RegisterInfoEmitter.cpp:1.44 llvm/utils/TableGen/RegisterInfoEmitter.cpp:1.45
--- llvm/utils/TableGen/RegisterInfoEmitter.cpp:1.44	Wed May 24 12:04:05 2006
+++ llvm/utils/TableGen/RegisterInfoEmitter.cpp	Wed Jun 14 19:16:37 2006
@@ -151,7 +151,7 @@
       << " Register Class Value Types...\n  const MVT::ValueType " << Name
       << "[] = {\n    ";
     for (unsigned i = 0, e = RC.VTs.size(); i != e; ++i)
-      OS << "MVT::" << RC.VTs[i] << ", ";
+      OS << RC.VTs[i] << ", ";
     OS << "MVT::Other\n  };\n\n";
   }
   OS << "}  // end anonymous namespace\n\n";





From evan.cheng at apple.com  Thu Jun 15 02:22:30 2006
From: evan.cheng at apple.com (Evan Cheng)
Date: Thu, 15 Jun 2006 02:22:30 -0500
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp 
Message-ID: <200606150722.CAA13191@zion.cs.uiuc.edu>



Changes in directory llvm/lib/CodeGen/SelectionDAG:

ScheduleDAG.cpp updated: 1.95 -> 1.96
---
Log message:

Instructions with variable operands (variable_ops) can have a number required
operands. e.g.
def CALL32r : I<0xFF, MRM2r, (ops GR32:$dst, variable_ops),
                "call {*}$dst", [(X86call GR32:$dst)]>;
TableGen should emit operand informations for the "required" operands.

Added a target instruction info flag M_VARIABLE_OPS to indicate the target
instruction may have more operands in addition to the minimum required
operands.


---
Diffs of the changes:  (+2 -1)

 ScheduleDAG.cpp |    3 ++-
 1 files changed, 2 insertions(+), 1 deletion(-)


Index: llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.95 llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.96
--- llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.95	Wed May 31 13:03:39 2006
+++ llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp	Thu Jun 15 02:22:16 2006
@@ -358,7 +358,8 @@
     unsigned NodeOperands = CountOperands(Node);
     unsigned NumMIOperands = NodeOperands + NumResults;
 #ifndef NDEBUG
-    assert((unsigned(II.numOperands) == NumMIOperands || II.numOperands == -1)&&
+    assert((unsigned(II.numOperands) == NumMIOperands ||
+            (II.Flags & M_VARIABLE_OPS)) &&
            "#operands for dag node doesn't match .td file!"); 
 #endif
 





From evan.cheng at apple.com  Thu Jun 15 02:22:31 2006
From: evan.cheng at apple.com (Evan Cheng)
Date: Thu, 15 Jun 2006 02:22:31 -0500
Subject: [llvm-commits] CVS: llvm/include/llvm/Target/TargetInstrInfo.h 
Message-ID: <200606150722.CAA13200@zion.cs.uiuc.edu>



Changes in directory llvm/include/llvm/Target:

TargetInstrInfo.h updated: 1.87 -> 1.88
---
Log message:

Instructions with variable operands (variable_ops) can have a number required
operands. e.g.
def CALL32r : I<0xFF, MRM2r, (ops GR32:$dst, variable_ops),
                "call {*}$dst", [(X86call GR32:$dst)]>;
TableGen should emit operand informations for the "required" operands.

Added a target instruction info flag M_VARIABLE_OPS to indicate the target
instruction may have more operands in addition to the minimum required
operands.


---
Diffs of the changes:  (+14 -1)

 TargetInstrInfo.h |   15 ++++++++++++++-
 1 files changed, 14 insertions(+), 1 deletion(-)


Index: llvm/include/llvm/Target/TargetInstrInfo.h
diff -u llvm/include/llvm/Target/TargetInstrInfo.h:1.87 llvm/include/llvm/Target/TargetInstrInfo.h:1.88
--- llvm/include/llvm/Target/TargetInstrInfo.h:1.87	Thu May 18 15:42:07 2006
+++ llvm/include/llvm/Target/TargetInstrInfo.h	Thu Jun 15 02:22:16 2006
@@ -76,6 +76,10 @@
 // block.
 const unsigned M_USES_CUSTOM_DAG_SCHED_INSERTION = 1 << 11;
 
+// M_VARIABLE_OPS - Set if this instruction can have a variable number of extra
+// operands in addition to the minimum number operands specified.
+const unsigned M_VARIABLE_OPS = 1 << 12;
+
 // Machine operand flags
 // M_LOOK_UP_PTR_REG_CLASS - Set if this operand is a pointer value and it
 // requires a callback to look up its register class.
@@ -97,7 +101,7 @@
 class TargetInstrDescriptor {
 public:
   const char *    Name;          // Assembly language mnemonic for the opcode.
-  int             numOperands;   // Number of args; -1 if variable #args
+  unsigned        numOperands;   // Num of args (may be more if variable_ops).
   InstrSchedClass schedClass;    // enum  identifying instr sched class
   unsigned        Flags;         // flags identifying machine instr class
   unsigned        TSFlags;       // Target Specific Flag values
@@ -144,6 +148,11 @@
 
   const TargetRegisterClass
   *getInstrOperandRegClass(const TargetInstrDescriptor *II, unsigned Op) const {
+    if (Op >= II->numOperands) {
+      if (II->Flags & M_VARIABLE_OPS)
+        return NULL;
+      assert(false && "Invalid operand # of instruction");
+    }
     const TargetOperandInfo &toi = II->OpInfo[Op];
     return (toi.Flags & M_LOOK_UP_PTR_REG_CLASS)
            ? getPointerRegClass() : toi.RegClass;
@@ -212,6 +221,10 @@
     return get(Opcode).Flags & M_USES_CUSTOM_DAG_SCHED_INSERTION;
   }
 
+  bool hasVariableOperands(MachineOpCode Opcode) const {
+    return get(Opcode).Flags & M_VARIABLE_OPS;
+  }
+
   /// Return true if the instruction is a register to register move
   /// and leave the source and dest operands in the passed parameters.
   virtual bool isMoveInstr(const MachineInstr& MI,





From evan.cheng at apple.com  Thu Jun 15 02:22:31 2006
From: evan.cheng at apple.com (Evan Cheng)
Date: Thu, 15 Jun 2006 02:22:31 -0500
Subject: [llvm-commits] CVS: llvm/utils/TableGen/InstrInfoEmitter.cpp 
Message-ID: <200606150722.CAA13204@zion.cs.uiuc.edu>



Changes in directory llvm/utils/TableGen:

InstrInfoEmitter.cpp updated: 1.42 -> 1.43
---
Log message:

Instructions with variable operands (variable_ops) can have a number required
operands. e.g.
def CALL32r : I<0xFF, MRM2r, (ops GR32:$dst, variable_ops),
                "call {*}$dst", [(X86call GR32:$dst)]>;
TableGen should emit operand informations for the "required" operands.

Added a target instruction info flag M_VARIABLE_OPS to indicate the target
instruction may have more operands in addition to the minimum required
operands.


---
Diffs of the changes:  (+7 -10)

 InstrInfoEmitter.cpp |   17 +++++++----------
 1 files changed, 7 insertions(+), 10 deletions(-)


Index: llvm/utils/TableGen/InstrInfoEmitter.cpp
diff -u llvm/utils/TableGen/InstrInfoEmitter.cpp:1.42 llvm/utils/TableGen/InstrInfoEmitter.cpp:1.43
--- llvm/utils/TableGen/InstrInfoEmitter.cpp:1.42	Thu May 18 15:42:07 2006
+++ llvm/utils/TableGen/InstrInfoEmitter.cpp	Thu Jun 15 02:22:16 2006
@@ -64,9 +64,6 @@
 
 static std::vector<Record*> GetOperandInfo(const CodeGenInstruction &Inst) {
   std::vector<Record*> Result;
-  if (Inst.hasVariableNumberOfOperands)
-    return Result;  // No info for variable operand instrs.
-
   for (unsigned i = 0, e = Inst.OperandList.size(); i != e; ++i) {
     if (Inst.OperandList[i].Rec->isSubClassOf("RegisterClass")) {
       Result.push_back(Inst.OperandList[i].Rec);
@@ -170,15 +167,13 @@
                          std::map<std::vector<Record*>, unsigned> &EmittedLists,
                                std::map<std::vector<Record*>, unsigned> &OpInfo,
                                   std::ostream &OS) {
-  int NumOperands;
-  if (Inst.hasVariableNumberOfOperands)
-    NumOperands = -1;
-  else if (!Inst.OperandList.empty())
+  int MinOperands;
+  if (!Inst.OperandList.empty())
     // Each logical operand can be multiple MI operands.
-    NumOperands = Inst.OperandList.back().MIOperandNo +
+    MinOperands = Inst.OperandList.back().MIOperandNo +
                   Inst.OperandList.back().MINumOperands;
   else
-    NumOperands = 0;
+    MinOperands = 0;
   
   OS << "  { \"";
   if (Inst.Name.empty())
@@ -189,7 +184,7 @@
   unsigned ItinClass = !IsItineraries ? 0 :
             ItinClassNumber(Inst.TheDef->getValueAsDef("Itinerary")->getName());
   
-  OS << "\",\t" << NumOperands << ", " << ItinClass
+  OS << "\",\t" << MinOperands << ", " << ItinClass
      << ", 0";
 
   // Try to determine (from the pattern), if the instruction is a store.
@@ -224,6 +219,8 @@
   if (Inst.isTerminator) OS << "|M_TERMINATOR_FLAG";
   if (Inst.usesCustomDAGSchedInserter)
     OS << "|M_USES_CUSTOM_DAG_SCHED_INSERTION";
+  if (Inst.hasVariableNumberOfOperands)
+    OS << "|M_VARIABLE_OPS";
   OS << ", 0";
 
   // Emit all of the target-specific flags...





From evan.cheng at apple.com  Thu Jun 15 02:22:31 2006
From: evan.cheng at apple.com (Evan Cheng)
Date: Thu, 15 Jun 2006 02:22:31 -0500
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/MachineInstr.cpp 
Message-ID: <200606150722.CAA13195@zion.cs.uiuc.edu>



Changes in directory llvm/lib/CodeGen:

MachineInstr.cpp updated: 1.123 -> 1.124
---
Log message:

Instructions with variable operands (variable_ops) can have a number required
operands. e.g.
def CALL32r : I<0xFF, MRM2r, (ops GR32:$dst, variable_ops),
                "call {*}$dst", [(X86call GR32:$dst)]>;
TableGen should emit operand informations for the "required" operands.

Added a target instruction info flag M_VARIABLE_OPS to indicate the target
instruction may have more operands in addition to the minimum required
operands.


---
Diffs of the changes:  (+2 -1)

 MachineInstr.cpp |    3 ++-
 1 files changed, 2 insertions(+), 1 deletion(-)


Index: llvm/lib/CodeGen/MachineInstr.cpp
diff -u llvm/lib/CodeGen/MachineInstr.cpp:1.123 llvm/lib/CodeGen/MachineInstr.cpp:1.124
--- llvm/lib/CodeGen/MachineInstr.cpp:1.123	Fri May 26 03:00:14 2006
+++ llvm/lib/CodeGen/MachineInstr.cpp	Thu Jun 15 02:22:16 2006
@@ -91,7 +91,8 @@
 ///
 bool MachineInstr::OperandsComplete() const {
   int NumOperands = TargetInstrDescriptors[Opcode].numOperands;
-  if (NumOperands >= 0 && getNumOperands() >= (unsigned)NumOperands)
+  if ((TargetInstrDescriptors[Opcode].Flags & M_VARIABLE_OPS) == 0 &&
+      getNumOperands() >= (unsigned)NumOperands)
     return true;  // Broken: we have all the operands of this instruction!
   return false;
 }





From evan.cheng at apple.com  Thu Jun 15 02:25:25 2006
From: evan.cheng at apple.com (Evan Cheng)
Date: Thu, 15 Jun 2006 02:25:25 -0500
Subject: [llvm-commits] CVS: llvm-test/TimedExec.sh 
Message-ID: <200606150725.CAA14257@zion.cs.uiuc.edu>



Changes in directory llvm-test:

TimedExec.sh updated: 1.3 -> 1.4
---
Log message:

Remove unnecessary flag.

---
Diffs of the changes:  (+1 -2)

 TimedExec.sh |    3 +--
 1 files changed, 1 insertion(+), 2 deletions(-)


Index: llvm-test/TimedExec.sh
diff -u llvm-test/TimedExec.sh:1.3 llvm-test/TimedExec.sh:1.4
--- llvm-test/TimedExec.sh:1.3	Wed Jun  7 16:19:34 2006
+++ llvm-test/TimedExec.sh	Thu Jun 15 02:25:13 2006
@@ -18,12 +18,11 @@
 fi
 
 TIMEOUT=$1
-PROGRAM=$2
 shift
 
 if [ -z "$PARENT" ]; then
     # Start a watchdog process
-    $0 -p $$ $TIMEOUT $PROGRAM $* &
+    $0 -p $$ $TIMEOUT $* &
     exec "$@"
 else
     # Sleep for a specified time then wake up to kill the parent process.





From evan.cheng at apple.com  Thu Jun 15 03:10:41 2006
From: evan.cheng at apple.com (Evan Cheng)
Date: Thu, 15 Jun 2006 03:10:41 -0500
Subject: [llvm-commits] CVS: llvm/include/llvm/Target/TargetInstrInfo.h 
Message-ID: <200606150810.DAA05000@zion.cs.uiuc.edu>



Changes in directory llvm/include/llvm/Target:

TargetInstrInfo.h updated: 1.88 -> 1.89
---
Log message:

Avoid undesirable behavior when assert is not enabled.

---
Diffs of the changes:  (+3 -3)

 TargetInstrInfo.h |    6 +++---
 1 files changed, 3 insertions(+), 3 deletions(-)


Index: llvm/include/llvm/Target/TargetInstrInfo.h
diff -u llvm/include/llvm/Target/TargetInstrInfo.h:1.88 llvm/include/llvm/Target/TargetInstrInfo.h:1.89
--- llvm/include/llvm/Target/TargetInstrInfo.h:1.88	Thu Jun 15 02:22:16 2006
+++ llvm/include/llvm/Target/TargetInstrInfo.h	Thu Jun 15 03:10:27 2006
@@ -149,9 +149,9 @@
   const TargetRegisterClass
   *getInstrOperandRegClass(const TargetInstrDescriptor *II, unsigned Op) const {
     if (Op >= II->numOperands) {
-      if (II->Flags & M_VARIABLE_OPS)
-        return NULL;
-      assert(false && "Invalid operand # of instruction");
+      if (!(II->Flags & M_VARIABLE_OPS))
+        assert(false && "Invalid operand # of instruction");
+      return NULL;
     }
     const TargetOperandInfo &toi = II->OpInfo[Op];
     return (toi.Flags & M_LOOK_UP_PTR_REG_CLASS)





From evan.cheng at apple.com  Thu Jun 15 03:11:09 2006
From: evan.cheng at apple.com (Evan Cheng)
Date: Thu, 15 Jun 2006 03:11:09 -0500
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/AsmPrinter.cpp 
Message-ID: <200606150811.DAA05103@zion.cs.uiuc.edu>



Changes in directory llvm/lib/CodeGen:

AsmPrinter.cpp updated: 1.79 -> 1.80
---
Log message:

Assert. Rather than silently stop printing.

---
Diffs of the changes:  (+2 -0)

 AsmPrinter.cpp |    2 ++
 1 files changed, 2 insertions(+)


Index: llvm/lib/CodeGen/AsmPrinter.cpp
diff -u llvm/lib/CodeGen/AsmPrinter.cpp:1.79 llvm/lib/CodeGen/AsmPrinter.cpp:1.80
--- llvm/lib/CodeGen/AsmPrinter.cpp:1.79	Thu Jun  8 13:00:47 2006
+++ llvm/lib/CodeGen/AsmPrinter.cpp	Thu Jun 15 03:10:56 2006
@@ -536,6 +536,8 @@
     break;
   case Type::PointerTyID:
     if (TD->getPointerSize() == 8) {
+      assert(Data64bitsDirective &&
+             "Target cannot handle 64-bit pointer exprs!");
       O << Data64bitsDirective;
       break;
     }





From evan.cheng at apple.com  Thu Jun 15 03:12:07 2006
From: evan.cheng at apple.com (Evan Cheng)
Date: Thu, 15 Jun 2006 03:12:07 -0500
Subject: [llvm-commits] 
	CVS: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
Message-ID: <200606150812.DAA06193@zion.cs.uiuc.edu>



Changes in directory llvm/lib/CodeGen/SelectionDAG:

SelectionDAGISel.cpp updated: 1.256 -> 1.257
---
Log message:

Consistency. EXTRACT_ELEMENT index operand should have ptr type.

---
Diffs of the changes:  (+13 -10)

 SelectionDAGISel.cpp |   23 +++++++++++++----------
 1 files changed, 13 insertions(+), 10 deletions(-)


Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.256 llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.257
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.256	Mon Jun 12 13:25:29 2006
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp	Thu Jun 15 03:11:54 2006
@@ -136,7 +136,8 @@
     /// specified value into the registers specified by this object.  This uses 
     /// Chain/Flag as the input and updates them for the output Chain/Flag.
     void getCopyToRegs(SDOperand Val, SelectionDAG &DAG,
-                       SDOperand &Chain, SDOperand &Flag) const;
+                       SDOperand &Chain, SDOperand &Flag,
+                       MVT::ValueType PtrVT) const;
     
     /// AddInlineAsmOperands - Add this value to the specified inlineasm node
     /// operand list.  This adds the code marker and includes the number of 
@@ -1800,7 +1801,8 @@
 /// specified value into the registers specified by this object.  This uses 
 /// Chain/Flag as the input and updates them for the output Chain/Flag.
 void RegsForValue::getCopyToRegs(SDOperand Val, SelectionDAG &DAG,
-                                 SDOperand &Chain, SDOperand &Flag) const {
+                                 SDOperand &Chain, SDOperand &Flag,
+                                 MVT::ValueType PtrVT) const {
   if (Regs.size() == 1) {
     // If there is a single register and the types differ, this must be
     // a promotion.
@@ -1822,7 +1824,7 @@
     
     for (unsigned i = 0, e = R.size(); i != e; ++i) {
       SDOperand Part = DAG.getNode(ISD::EXTRACT_ELEMENT, RegVT, Val, 
-                                   DAG.getConstant(i, MVT::i32));
+                                   DAG.getConstant(i, PtrVT));
       Chain = DAG.getCopyToReg(Chain, R[i], Part, Flag);
       Flag = Chain.getValue(1);
     }
@@ -2184,7 +2186,8 @@
         }
         
         // Use the produced MatchedRegs object to 
-        MatchedRegs.getCopyToRegs(InOperandVal, DAG, Chain, Flag);
+        MatchedRegs.getCopyToRegs(InOperandVal, DAG, Chain, Flag,
+                                  TLI.getPointerTy());
         MatchedRegs.AddInlineAsmOperands(1 /*REGUSE*/, DAG, AsmNodeOperands);
         break;
       }
@@ -2232,7 +2235,7 @@
       // FIXME: should be match fail.
       assert(!InRegs.Regs.empty() && "Couldn't allocate input reg!");
 
-      InRegs.getCopyToRegs(InOperandVal, DAG, Chain, Flag);
+      InRegs.getCopyToRegs(InOperandVal, DAG, Chain, Flag, TLI.getPointerTy());
       
       InRegs.AddInlineAsmOperands(1/*REGUSE*/, DAG, AsmNodeOperands);
       break;
@@ -3300,7 +3303,7 @@
     SDOperand Root = SDL.getRoot();
     for (unsigned i = 0; i != NE; ++i) {
       SDOperand Elt = DAG.getNode(ISD::VEXTRACT_VECTOR_ELT, PTyElementVT,
-                                  Op, DAG.getConstant(i, MVT::i32));
+                                  Op, DAG.getConstant(i, TLI.getPointerTy()));
       if (PTyElementVT == PTyLegalElementVT) {
         // Elements are legal.
         OutChains.push_back(DAG.getCopyToReg(Root, Reg++, Elt));
@@ -3315,9 +3318,9 @@
         // Elements are expanded.
         // The src value is expanded into multiple registers.
         SDOperand Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, PTyLegalElementVT,
-                                   Elt, DAG.getConstant(0, MVT::i32));
+                                   Elt, DAG.getConstant(0, TLI.getPointerTy()));
         SDOperand Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, PTyLegalElementVT,
-                                   Elt, DAG.getConstant(1, MVT::i32));
+                                   Elt, DAG.getConstant(1, TLI.getPointerTy()));
         OutChains.push_back(DAG.getCopyToReg(Root, Reg++, Lo));
         OutChains.push_back(DAG.getCopyToReg(Root, Reg++, Hi));
       }
@@ -3333,9 +3336,9 @@
   } else  {
     // The src value is expanded into multiple registers.
     SDOperand Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, DestVT,
-                               Op, DAG.getConstant(0, MVT::i32));
+                               Op, DAG.getConstant(0, TLI.getPointerTy()));
     SDOperand Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, DestVT,
-                               Op, DAG.getConstant(1, MVT::i32));
+                               Op, DAG.getConstant(1, TLI.getPointerTy()));
     Op = DAG.getCopyToReg(SDL.getRoot(), Reg, Lo);
     return DAG.getCopyToReg(Op, Reg+1, Hi);
   }





From evan.cheng at apple.com  Thu Jun 15 03:15:07 2006
From: evan.cheng at apple.com (Evan Cheng)
Date: Thu, 15 Jun 2006 03:15:07 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp
	X86InstrSSE.td 
Message-ID: <200606150815.DAA16846@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/X86:

X86ISelLowering.cpp updated: 1.229 -> 1.230
X86InstrSSE.td updated: 1.122 -> 1.123
---
Log message:

Type of vector extract / insert index operand should be iPTR.

---
Diffs of the changes:  (+18 -18)

 X86ISelLowering.cpp |   10 +++++-----
 X86InstrSSE.td      |   26 +++++++++++++-------------
 2 files changed, 18 insertions(+), 18 deletions(-)


Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.229 llvm/lib/Target/X86/X86ISelLowering.cpp:1.230
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.229	Wed Jun 14 13:17:40 2006
+++ llvm/lib/Target/X86/X86ISelLowering.cpp	Thu Jun 15 03:14:54 2006
@@ -2784,7 +2784,7 @@
     Vec = DAG.getNode(ISD::VECTOR_SHUFFLE, Vec.getValueType(),
                       Vec, Vec, Mask);
     return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, VT, Vec,
-                       DAG.getConstant(0, MVT::i32));
+                       DAG.getConstant(0, getPointerTy()));
   } else if (MVT::getSizeInBits(VT) == 64) {
     SDOperand Vec = Op.getOperand(0);
     unsigned Idx = cast<ConstantSDNode>(Op.getOperand(1))->getValue();
@@ -2802,7 +2802,7 @@
     Vec = DAG.getNode(ISD::VECTOR_SHUFFLE, Vec.getValueType(),
                       Vec, DAG.getNode(ISD::UNDEF, Vec.getValueType()), Mask);
     return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, VT, Vec,
-                       DAG.getConstant(0, MVT::i32));
+                       DAG.getConstant(0, getPointerTy()));
   }
 
   return SDOperand();
@@ -2848,15 +2848,15 @@
           N1 = DAG.getNode(ISD::SCALAR_TO_VECTOR, MVT::v4f32, N1);
           N1 = DAG.getNode(ISD::BIT_CONVERT, MVT::v4i32, N1);
           N1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, MVT::i32, N1,
-                           DAG.getConstant(0, MVT::i32));
+                           DAG.getConstant(0, getPointerTy()));
         }
       }
       N0 = DAG.getNode(ISD::BIT_CONVERT, MVT::v8i16, N0);
       N0 = DAG.getNode(X86ISD::PINSRW, MVT::v8i16, N0, N1,
-                       DAG.getConstant(Idx, MVT::i32));
+                       DAG.getConstant(Idx, getPointerTy()));
       N1 = DAG.getNode(ISD::SRL, MVT::i32, N1, DAG.getConstant(16, MVT::i8));
       N0 = DAG.getNode(X86ISD::PINSRW, MVT::v8i16, N0, N1,
-                       DAG.getConstant(Idx+1, MVT::i32));
+                       DAG.getConstant(Idx+1, getPointerTy()));
       return DAG.getNode(ISD::BIT_CONVERT, VT, N0);
     }
   }


Index: llvm/lib/Target/X86/X86InstrSSE.td
diff -u llvm/lib/Target/X86/X86InstrSSE.td:1.122 llvm/lib/Target/X86/X86InstrSSE.td:1.123
--- llvm/lib/Target/X86/X86InstrSSE.td:1.122	Wed May 31 14:00:07 2006
+++ llvm/lib/Target/X86/X86InstrSSE.td	Thu Jun 15 03:14:54 2006
@@ -811,11 +811,11 @@
 def MOVLPSmr : PSI<0x13, MRMDestMem, (ops f64mem:$dst, VR128:$src),
                    "movlps {$src, $dst|$dst, $src}",
                    [(store (f64 (vector_extract (bc_v2f64 (v4f32 VR128:$src)),
-                                 (i32 0))), addr:$dst)]>;
+                                 (iPTR 0))), addr:$dst)]>;
 def MOVLPDmr : PDI<0x13, MRMDestMem, (ops f64mem:$dst, VR128:$src),
                    "movlpd {$src, $dst|$dst, $src}",
                    [(store (f64 (vector_extract (v2f64 VR128:$src),
-                                 (i32 0))), addr:$dst)]>;
+                                 (iPTR 0))), addr:$dst)]>;
 
 // v2f64 extract element 1 is always custom lowered to unpack high to low
 // and extract element 0 so the non-store version isn't too horrible.
@@ -824,13 +824,13 @@
                    [(store (f64 (vector_extract
                                  (v2f64 (vector_shuffle
                                          (bc_v2f64 (v4f32 VR128:$src)), (undef),
-                                         UNPCKH_shuffle_mask)), (i32 0))),
+                                         UNPCKH_shuffle_mask)), (iPTR 0))),
                      addr:$dst)]>;
 def MOVHPDmr : PDI<0x17, MRMDestMem, (ops f64mem:$dst, VR128:$src),
                    "movhpd {$src, $dst|$dst, $src}",
                    [(store (f64 (vector_extract
                                  (v2f64 (vector_shuffle VR128:$src, (undef),
-                                         UNPCKH_shuffle_mask)), (i32 0))),
+                                         UNPCKH_shuffle_mask)), (iPTR 0))),
                      addr:$dst)]>;
 
 let isTwoAddress = 1 in {
@@ -2020,14 +2020,14 @@
                      (ops VR128:$dst, VR128:$src1, GR32:$src2, i32i8imm:$src3),
                      "pinsrw {$src3, $src2, $dst|$dst, $src2, $src3}",
                      [(set VR128:$dst, (v8i16 (X86pinsrw (v8i16 VR128:$src1),
-                                               GR32:$src2, (i32 imm:$src3))))]>;
+                                               GR32:$src2, (iPTR imm:$src3))))]>;
 def PINSRWrmi : PDIi8<0xC4, MRMSrcMem,
                      (ops VR128:$dst, VR128:$src1, i16mem:$src2, i32i8imm:$src3),
                      "pinsrw {$src3, $src2, $dst|$dst, $src2, $src3}",
                      [(set VR128:$dst,
                        (v8i16 (X86pinsrw (v8i16 VR128:$src1),
                                (i32 (anyext (loadi16 addr:$src2))),
-                               (i32 imm:$src3))))]>;
+                               (iPTR imm:$src3))))]>;
 }
 
 //===----------------------------------------------------------------------===//
@@ -2166,32 +2166,32 @@
 // FIXME: may not be able to eliminate this movss with coalescing the src and
 // dest register classes are different. We really want to write this pattern
 // like this:
-// def : Pat<(f32 (vector_extract (v4f32 VR128:$src), (i32 0))),
+// def : Pat<(f32 (vector_extract (v4f32 VR128:$src), (iPTR 0))),
 //           (f32 FR32:$src)>;
 def MOVPS2SSrr : SSI<0x10, MRMSrcReg, (ops FR32:$dst, VR128:$src),
                      "movss {$src, $dst|$dst, $src}",
                      [(set FR32:$dst, (vector_extract (v4f32 VR128:$src),
-                                       (i32 0)))]>;
+                                       (iPTR 0)))]>;
 def MOVPS2SSmr : SSI<0x11, MRMDestMem, (ops f32mem:$dst, VR128:$src),
                      "movss {$src, $dst|$dst, $src}",
                      [(store (f32 (vector_extract (v4f32 VR128:$src),
-                                   (i32 0))), addr:$dst)]>;
+                                   (iPTR 0))), addr:$dst)]>;
 def MOVPD2SDrr : SDI<0x10, MRMSrcReg, (ops FR64:$dst, VR128:$src),
                      "movsd {$src, $dst|$dst, $src}",
                      [(set FR64:$dst, (vector_extract (v2f64 VR128:$src),
-                                       (i32 0)))]>;
+                                       (iPTR 0)))]>;
 def MOVPD2SDmr : SDI<0x11, MRMDestMem, (ops f64mem:$dst, VR128:$src),
                      "movsd {$src, $dst|$dst, $src}",
                      [(store (f64 (vector_extract (v2f64 VR128:$src),
-                                   (i32 0))), addr:$dst)]>;
+                                   (iPTR 0))), addr:$dst)]>;
 def MOVPDI2DIrr  : PDI<0x7E, MRMDestReg, (ops GR32:$dst, VR128:$src),
                        "movd {$src, $dst|$dst, $src}",
                        [(set GR32:$dst, (vector_extract (v4i32 VR128:$src),
-                                        (i32 0)))]>;
+                                        (iPTR 0)))]>;
 def MOVPDI2DImr  : PDI<0x7E, MRMDestMem, (ops i32mem:$dst, VR128:$src),
                        "movd {$src, $dst|$dst, $src}",
                        [(store (i32 (vector_extract (v4i32 VR128:$src),
-                                     (i32 0))), addr:$dst)]>;
+                                     (iPTR 0))), addr:$dst)]>;
 
 // Move to lower bits of a VR128, leaving upper bits alone.
 // Three operand (but two address) aliases.





From evan.cheng at apple.com  Thu Jun 15 03:17:19 2006
From: evan.cheng at apple.com (Evan Cheng)
Date: Thu, 15 Jun 2006 03:17:19 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelLowering.cpp 
Message-ID: <200606150817.DAA30913@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/PowerPC:

PPCISelLowering.cpp updated: 1.187 -> 1.188
---
Log message:

Type of extract_element index operand should be iPTR.

---
Diffs of the changes:  (+15 -12)

 PPCISelLowering.cpp |   27 +++++++++++++++------------
 1 files changed, 15 insertions(+), 12 deletions(-)


Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.187 llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.188
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.187	Fri Jun  9 20:14:28 2006
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp	Thu Jun 15 03:17:07 2006
@@ -1334,7 +1334,8 @@
   return FP;
 }
 
-static SDOperand LowerSHL(SDOperand Op, SelectionDAG &DAG) {
+static SDOperand LowerSHL(SDOperand Op, SelectionDAG &DAG,
+                          MVT::ValueType PtrVT) {
   assert(Op.getValueType() == MVT::i64 &&
          Op.getOperand(1).getValueType() == MVT::i32 && "Unexpected SHL!");
   // The generic code does a fine job expanding shift by a constant.
@@ -1343,9 +1344,9 @@
   // Otherwise, expand into a bunch of logical ops.  Note that these ops
   // depend on the PPC behavior for oversized shift amounts.
   SDOperand Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, MVT::i32, Op.getOperand(0),
-                             DAG.getConstant(0, MVT::i32));
+                             DAG.getConstant(0, PtrVT));
   SDOperand Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, MVT::i32, Op.getOperand(0),
-                             DAG.getConstant(1, MVT::i32));
+                             DAG.getConstant(1, PtrVT));
   SDOperand Amt = Op.getOperand(1);
   
   SDOperand Tmp1 = DAG.getNode(ISD::SUB, MVT::i32,
@@ -1361,7 +1362,8 @@
   return DAG.getNode(ISD::BUILD_PAIR, MVT::i64, OutLo, OutHi);
 }
 
-static SDOperand LowerSRL(SDOperand Op, SelectionDAG &DAG) {
+static SDOperand LowerSRL(SDOperand Op, SelectionDAG &DAG,
+                          MVT::ValueType PtrVT) {
   assert(Op.getValueType() == MVT::i64 &&
          Op.getOperand(1).getValueType() == MVT::i32 && "Unexpected SHL!");
   // The generic code does a fine job expanding shift by a constant.
@@ -1370,9 +1372,9 @@
   // Otherwise, expand into a bunch of logical ops.  Note that these ops
   // depend on the PPC behavior for oversized shift amounts.
   SDOperand Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, MVT::i32, Op.getOperand(0),
-                             DAG.getConstant(0, MVT::i32));
+                             DAG.getConstant(0, PtrVT));
   SDOperand Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, MVT::i32, Op.getOperand(0),
-                             DAG.getConstant(1, MVT::i32));
+                             DAG.getConstant(1, PtrVT));
   SDOperand Amt = Op.getOperand(1);
   
   SDOperand Tmp1 = DAG.getNode(ISD::SUB, MVT::i32,
@@ -1388,7 +1390,8 @@
   return DAG.getNode(ISD::BUILD_PAIR, MVT::i64, OutLo, OutHi);
 }
 
-static SDOperand LowerSRA(SDOperand Op, SelectionDAG &DAG) {
+static SDOperand LowerSRA(SDOperand Op, SelectionDAG &DAG,
+                          MVT::ValueType PtrVT) {
   assert(Op.getValueType() == MVT::i64 &&
          Op.getOperand(1).getValueType() == MVT::i32 && "Unexpected SRA!");
   // The generic code does a fine job expanding shift by a constant.
@@ -1396,9 +1399,9 @@
   
   // Otherwise, expand into a bunch of logical ops, followed by a select_cc.
   SDOperand Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, MVT::i32, Op.getOperand(0),
-                             DAG.getConstant(0, MVT::i32));
+                             DAG.getConstant(0, PtrVT));
   SDOperand Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, MVT::i32, Op.getOperand(0),
-                             DAG.getConstant(1, MVT::i32));
+                             DAG.getConstant(1, PtrVT));
   SDOperand Amt = Op.getOperand(1);
   
   SDOperand Tmp1 = DAG.getNode(ISD::SUB, MVT::i32,
@@ -2132,9 +2135,9 @@
   case ISD::SINT_TO_FP:         return LowerSINT_TO_FP(Op, DAG);
 
   // Lower 64-bit shifts.
-  case ISD::SHL:                return LowerSHL(Op, DAG);
-  case ISD::SRL:                return LowerSRL(Op, DAG);
-  case ISD::SRA:                return LowerSRA(Op, DAG);
+  case ISD::SHL:                return LowerSHL(Op, DAG, getPointerTy());
+  case ISD::SRL:                return LowerSRL(Op, DAG, getPointerTy());
+  case ISD::SRA:                return LowerSRA(Op, DAG, getPointerTy());
 
   // Vector-related lowering.
   case ISD::BUILD_VECTOR:       return LowerBUILD_VECTOR(Op, DAG);





From evan.cheng at apple.com  Thu Jun 15 03:18:19 2006
From: evan.cheng at apple.com (Evan Cheng)
Date: Thu, 15 Jun 2006 03:18:19 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp 
Message-ID: <200606150818.DAA31768@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/Sparc:

SparcISelDAGToDAG.cpp updated: 1.98 -> 1.99
---
Log message:

Type of extract_element index operand should be iPTR.

---
Diffs of the changes:  (+2 -2)

 SparcISelDAGToDAG.cpp |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)


Index: llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp
diff -u llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp:1.98 llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp:1.99
--- llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp:1.98	Fri May 26 18:10:12 2006
+++ llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp	Thu Jun 15 03:18:06 2006
@@ -564,9 +564,9 @@
       }
       
       // Split the value into top and bottom part.  Top part goes in a reg.
-      SDOperand Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, MVT::i32, Val, 
+      SDOperand Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, getPointerTy(), Val, 
                                  DAG.getConstant(1, MVT::i32));
-      SDOperand Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, MVT::i32, Val,
+      SDOperand Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, getPointerTy(), Val,
                                  DAG.getConstant(0, MVT::i32));
       RegValuesToPass.push_back(Hi);
       





From evan.cheng at apple.com  Thu Jun 15 03:19:17 2006
From: evan.cheng at apple.com (Evan Cheng)
Date: Thu, 15 Jun 2006 03:19:17 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/TargetSelectionDAG.td 
Message-ID: <200606150819.DAA04254@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target:

TargetSelectionDAG.td updated: 1.67 -> 1.68
---
Log message:

Vector extract / insert index operand should have ptr type.

---
Diffs of the changes:  (+2 -2)

 TargetSelectionDAG.td |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)


Index: llvm/lib/Target/TargetSelectionDAG.td
diff -u llvm/lib/Target/TargetSelectionDAG.td:1.67 llvm/lib/Target/TargetSelectionDAG.td:1.68
--- llvm/lib/Target/TargetSelectionDAG.td:1.67	Sat Apr 22 13:53:45 2006
+++ llvm/lib/Target/TargetSelectionDAG.td	Thu Jun 15 03:19:05 2006
@@ -320,9 +320,9 @@
 def scalar_to_vector : SDNode<"ISD::SCALAR_TO_VECTOR", SDTypeProfile<1, 1, []>,
                               []>;
 def vector_extract : SDNode<"ISD::EXTRACT_VECTOR_ELT",
-    SDTypeProfile<1, 2, []>, []>;
+    SDTypeProfile<1, 2, [SDTCisPtrTy<2>]>, []>;
 def vector_insert : SDNode<"ISD::INSERT_VECTOR_ELT",
-    SDTypeProfile<1, 3, [SDTCisSameAs<0, 1>]>, []>;
+    SDTypeProfile<1, 3, [SDTCisSameAs<0, 1>, SDTCisPtrTy<3>]>, []>;
 
 // Nodes for intrinsics, you should use the intrinsic itself and let tblgen use
 // these internally.  Don't reference these directly.





From jlaskey at apple.com  Thu Jun 15 08:11:25 2006
From: jlaskey at apple.com (Jim Laskey)
Date: Thu, 15 Jun 2006 08:11:25 -0500
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/AsmPrinter.cpp 
Message-ID: <200606151311.IAA19882@zion.cs.uiuc.edu>



Changes in directory llvm/lib/CodeGen:

AsmPrinter.cpp updated: 1.80 -> 1.81
---
Log message:

Alignment of globals has not been quite right.  Needed to drop the pointer type
to get the alignment of the element type.


---
Diffs of the changes:  (+3 -5)

 AsmPrinter.cpp |    8 +++-----
 1 files changed, 3 insertions(+), 5 deletions(-)


Index: llvm/lib/CodeGen/AsmPrinter.cpp
diff -u llvm/lib/CodeGen/AsmPrinter.cpp:1.80 llvm/lib/CodeGen/AsmPrinter.cpp:1.81
--- llvm/lib/CodeGen/AsmPrinter.cpp:1.80	Thu Jun 15 03:10:56 2006
+++ llvm/lib/CodeGen/AsmPrinter.cpp	Thu Jun 15 08:10:58 2006
@@ -244,18 +244,16 @@
 /// specified global, returned in log form.  This includes an explicitly
 /// requested alignment (if the global has one).
 unsigned AsmPrinter::getPreferredAlignmentLog(const GlobalVariable *GV) const {
-  unsigned Alignment = TM.getTargetData()->getTypeAlignmentShift(GV->getType());
+  const Type *ElemType = GV->getType()->getElementType();
+  unsigned Alignment = TM.getTargetData()->getTypeAlignmentShift(ElemType);
   if (GV->getAlignment() > (1U << Alignment))
     Alignment = Log2_32(GV->getAlignment());
   
   if (GV->hasInitializer()) {
-    // Always round up alignment of global doubles to 8 bytes.
-    if (GV->getType()->getElementType() == Type::DoubleTy && Alignment < 3)
-      Alignment = 3;
     if (Alignment < 4) {
       // If the global is not external, see if it is large.  If so, give it a
       // larger alignment.
-      if (TM.getTargetData()->getTypeSize(GV->getType()->getElementType()) > 128)
+      if (TM.getTargetData()->getTypeSize(ElemType) > 128)
         Alignment = 4;    // 16-byte alignment.
     }
   }





From reid at x10sys.com  Thu Jun 15 11:10:24 2006
From: reid at x10sys.com (Reid Spencer)
Date: Thu, 15 Jun 2006 11:10:24 -0500
Subject: [llvm-commits] CVS: llvm/tools/llvm2cpp/CppWriter.cpp 
Message-ID: <200606151610.LAA22063@zion.cs.uiuc.edu>



Changes in directory llvm/tools/llvm2cpp:

CppWriter.cpp updated: 1.12 -> 1.13
---
Log message:

Actually add instructions to the list of defined values so it gets
recognized as such!  This prevents the CppWriter from treating every 
operand as a forward reference and making a mess of the output.


---
Diffs of the changes:  (+1 -0)

 CppWriter.cpp |    1 +
 1 files changed, 1 insertion(+)


Index: llvm/tools/llvm2cpp/CppWriter.cpp
diff -u llvm/tools/llvm2cpp/CppWriter.cpp:1.12 llvm/tools/llvm2cpp/CppWriter.cpp:1.13
--- llvm/tools/llvm2cpp/CppWriter.cpp:1.12	Thu Jun  1 18:43:47 2006
+++ llvm/tools/llvm2cpp/CppWriter.cpp	Thu Jun 15 11:09:59 2006
@@ -1193,6 +1193,7 @@
       break;
     }
   }
+  DefinedValues.insert(I);
   Out << "\n";
   delete [] opNames;
 }





From lattner at cs.uiuc.edu  Thu Jun 15 12:31:34 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu, 15 Jun 2006 12:31:34 -0500
Subject: [llvm-commits] CVS: llvm/Makefile.rules 
Message-ID: <200606151731.MAA22379@zion.cs.uiuc.edu>



Changes in directory llvm:

Makefile.rules updated: 1.378 -> 1.379
---
Log message:

Fix building on case-sensitive file systems, grr :)


---
Diffs of the changes:  (+2 -2)

 Makefile.rules |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)


Index: llvm/Makefile.rules
diff -u llvm/Makefile.rules:1.378 llvm/Makefile.rules:1.379
--- llvm/Makefile.rules:1.378	Thu Jun  1 19:27:42 2006
+++ llvm/Makefile.rules	Thu Jun 15 12:31:22 2006
@@ -373,10 +373,10 @@
 # apps.
 ifdef UNIVERSAL
   CompileCommonOpts += \
-      -arch i386 -arch ppc -isysroot /Developer/SDKs/MACOSX10.4u.sdk/
+      -arch i386 -arch ppc -isysroot /Developer/SDKs/MacOSX10.4u.sdk/
   Relink.Flags := -XCClinker -arch -XCClinker i386 -XCClinker -arch \
       -XCClinker ppc -XCClinker \
-      -isysroot -XCClinker /Developer/SDKs/MACOSX10.4u.sdk/
+      -isysroot -XCClinker /Developer/SDKs/MacOSX10.4u.sdk/
   DISABLE_AUTO_DEPENDENCIES=1
 endif
 





From lattner at cs.uiuc.edu  Thu Jun 15 14:06:55 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu, 15 Jun 2006 14:06:55 -0500
Subject: [llvm-commits] 
	CVS: llvm/test/Regression/Transforms/InstCombine/bswap.ll
Message-ID: <200606151906.OAA23075@zion.cs.uiuc.edu>



Changes in directory llvm/test/Regression/Transforms/InstCombine:

bswap.ll added (r1.1)
---
Log message:

new testcase, instcombine should turn these into llvm.bswap intrinsics.


---
Diffs of the changes:  (+28 -0)

 bswap.ll |   28 ++++++++++++++++++++++++++++
 1 files changed, 28 insertions(+)


Index: llvm/test/Regression/Transforms/InstCombine/bswap.ll
diff -c /dev/null llvm/test/Regression/Transforms/InstCombine/bswap.ll:1.1
*** /dev/null	Thu Jun 15 14:06:52 2006
--- llvm/test/Regression/Transforms/InstCombine/bswap.ll	Thu Jun 15 14:06:42 2006
***************
*** 0 ****
--- 1,28 ----
+ ; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep 'call.*llvm.bswap' | wc -l | grep 2
+ 
+ uint %test1(uint %i) {
+         %tmp1 = shr uint %i, ubyte 24           ; <uint> [#uses=1]
+         %tmp3 = shr uint %i, ubyte 8            ; <uint> [#uses=1]
+         %tmp4 = and uint %tmp3, 65280           ; <uint> [#uses=1]
+         %tmp5 = or uint %tmp1, %tmp4            ; <uint> [#uses=1]
+         %tmp7 = shl uint %i, ubyte 8            ; <uint> [#uses=1]
+         %tmp8 = and uint %tmp7, 16711680                ; <uint> [#uses=1]
+         %tmp9 = or uint %tmp5, %tmp8            ; <uint> [#uses=1]
+         %tmp11 = shl uint %i, ubyte 24          ; <uint> [#uses=1]
+         %tmp12 = or uint %tmp9, %tmp11          ; <uint> [#uses=1]
+         ret uint %tmp12
+ }
+ 
+ uint %test2(uint %arg) {
+         %tmp2 = shl uint %arg, ubyte 24         ; <uint> [#uses=1]
+         %tmp4 = shl uint %arg, ubyte 8          ; <uint> [#uses=1]
+         %tmp5 = and uint %tmp4, 16711680                ; <uint> [#uses=1]
+         %tmp6 = or uint %tmp2, %tmp5            ; <uint> [#uses=1]
+         %tmp8 = shr uint %arg, ubyte 8          ; <uint> [#uses=1]
+         %tmp9 = and uint %tmp8, 65280           ; <uint> [#uses=1]
+         %tmp10 = or uint %tmp6, %tmp9           ; <uint> [#uses=1]
+         %tmp12 = shr uint %arg, ubyte 24                ; <uint> [#uses=1]
+         %tmp14 = or uint %tmp10, %tmp12         ; <uint> [#uses=1]
+         ret uint %tmp14
+ }
+ 





From lattner at cs.uiuc.edu  Thu Jun 15 14:07:39 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu, 15 Jun 2006 14:07:39 -0500
Subject: [llvm-commits] 
	CVS: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
Message-ID: <200606151907.OAA23108@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Transforms/Scalar:

InstructionCombining.cpp updated: 1.490 -> 1.491
---
Log message:

Implement Transforms/InstCombine/bswap.ll, turning common shift/and/or bswap 
idioms into bswap intrinsics.


---
Diffs of the changes:  (+131 -1)

 InstructionCombining.cpp |  132 ++++++++++++++++++++++++++++++++++++++++++++++-
 1 files changed, 131 insertions(+), 1 deletion(-)


Index: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
diff -u llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.490 llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.491
--- llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.490	Tue Jun  6 17:26:02 2006
+++ llvm/lib/Transforms/Scalar/InstructionCombining.cpp	Thu Jun 15 14:07:26 2006
@@ -256,7 +256,8 @@
     Instruction *InsertRangeTest(Value *V, Constant *Lo, Constant *Hi,
                                  bool Inside, Instruction &IB);
     Instruction *PromoteCastOfAllocation(CastInst &CI, AllocationInst &AI);
-    
+    Instruction *MatchBSwap(BinaryOperator &I);
+
     Value *EvaluateInDifferentType(Value *V, const Type *Ty);
   };
 
@@ -2791,6 +2792,128 @@
   return Changed ? &I : 0;
 }
 
+/// CollectBSwapParts - Look to see if the specified value defines a single byte
+/// in the result.  If it does, and if the specified byte hasn't been filled in
+/// yet, fill it in and return false.
+static bool CollectBSwapParts(Value *V, std::vector<Value*> &ByteValues) {
+  Instruction *I = dyn_cast<Instruction>(V);
+  if (I == 0) return true;
+
+  // If this is an or instruction, it is an inner node of the bswap.
+  if (I->getOpcode() == Instruction::Or)
+    return CollectBSwapParts(I->getOperand(0), ByteValues) ||
+           CollectBSwapParts(I->getOperand(1), ByteValues);
+  
+  // If this is a shift by a constant int, and it is "24", then its operand
+  // defines a byte.  We only handle unsigned types here.
+  if (isa<ShiftInst>(I) && isa<ConstantInt>(I->getOperand(1))) {
+    // Not shifting the entire input by N-1 bytes?
+    if (cast<ConstantInt>(I->getOperand(1))->getRawValue() !=
+        8*(ByteValues.size()-1))
+      return true;
+    
+    unsigned DestNo;
+    if (I->getOpcode() == Instruction::Shl) {
+      // X << 24 defines the top byte with the lowest of the input bytes.
+      DestNo = ByteValues.size()-1;
+    } else {
+      // X >>u 24 defines the low byte with the highest of the input bytes.
+      DestNo = 0;
+    }
+    
+    // If the destination byte value is already defined, the values are or'd
+    // together, which isn't a bswap (unless it's an or of the same bits).
+    if (ByteValues[DestNo] && ByteValues[DestNo] != I->getOperand(0))
+      return true;
+    ByteValues[DestNo] = I->getOperand(0);
+    return false;
+  }
+  
+  // Otherwise, we can only handle and(shift X, imm), imm).  Bail out of if we
+  // don't have this.
+  Value *Shift = 0, *ShiftLHS = 0;
+  ConstantInt *AndAmt = 0, *ShiftAmt = 0;
+  if (!match(I, m_And(m_Value(Shift), m_ConstantInt(AndAmt))) ||
+      !match(Shift, m_Shift(m_Value(ShiftLHS), m_ConstantInt(ShiftAmt))))
+    return true;
+  Instruction *SI = cast<Instruction>(Shift);
+
+  // Make sure that the shift amount is by a multiple of 8 and isn't too big.
+  if (ShiftAmt->getRawValue() & 7 ||
+      ShiftAmt->getRawValue() > 8*ByteValues.size())
+    return true;
+  
+  // Turn 0xFF -> 0, 0xFF00 -> 1, 0xFF0000 -> 2, etc.
+  unsigned DestByte;
+  for (DestByte = 0; DestByte != ByteValues.size(); ++DestByte)
+    if (AndAmt->getRawValue() == uint64_t(0xFF) << 8*DestByte)
+      break;
+  // Unknown mask for bswap.
+  if (DestByte == ByteValues.size()) return true;
+  
+  unsigned ShiftBytes = ShiftAmt->getRawValue()/8;
+  unsigned SrcByte;
+  if (SI->getOpcode() == Instruction::Shl)
+    SrcByte = DestByte - ShiftBytes;
+  else
+    SrcByte = DestByte + ShiftBytes;
+  
+  // If the SrcByte isn't a bswapped value from the DestByte, reject it.
+  if (SrcByte != ByteValues.size()-DestByte-1)
+    return true;
+  
+  // If the destination byte value is already defined, the values are or'd
+  // together, which isn't a bswap (unless it's an or of the same bits).
+  if (ByteValues[DestByte] && ByteValues[DestByte] != SI->getOperand(0))
+    return true;
+  ByteValues[DestByte] = SI->getOperand(0);
+  return false;
+}
+
+/// MatchBSwap - Given an OR instruction, check to see if this is a bswap idiom.
+/// If so, insert the new bswap intrinsic and return it.
+Instruction *InstCombiner::MatchBSwap(BinaryOperator &I) {
+  // We can only handle bswap of unsigned integers, and cannot bswap one byte.
+  if (!I.getType()->isUnsigned() || I.getType() == Type::UByteTy)
+    return 0;
+  
+  /// ByteValues - For each byte of the result, we keep track of which value
+  /// defines each byte.
+  std::vector<Value*> ByteValues;
+  ByteValues.resize(I.getType()->getPrimitiveSize());
+    
+  // Try to find all the pieces corresponding to the bswap.
+  if (CollectBSwapParts(I.getOperand(0), ByteValues) ||
+      CollectBSwapParts(I.getOperand(1), ByteValues))
+    return 0;
+  
+  // Check to see if all of the bytes come from the same value.
+  Value *V = ByteValues[0];
+  if (V == 0) return 0;  // Didn't find a byte?  Must be zero.
+  
+  // Check to make sure that all of the bytes come from the same value.
+  for (unsigned i = 1, e = ByteValues.size(); i != e; ++i)
+    if (ByteValues[i] != V)
+      return 0;
+    
+  // If they do then *success* we can turn this into a bswap.  Figure out what
+  // bswap to make it into.
+  Module *M = I.getParent()->getParent()->getParent();
+  const char *FnName;
+  if (I.getType() == Type::UShortTy)
+    FnName = "llvm.bswap.i16";
+  else if (I.getType() == Type::UIntTy)
+    FnName = "llvm.bswap.i32";
+  else if (I.getType() == Type::ULongTy)
+    FnName = "llvm.bswap.i64";
+  else
+    assert(0 && "Unknown integer type!");
+  Function *F = M->getOrInsertFunction(FnName, I.getType(), I.getType(), NULL);
+  
+  return new CallInst(F, V);
+}
+
+
 Instruction *InstCombiner::visitOr(BinaryOperator &I) {
   bool Changed = SimplifyCommutative(I);
   Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1);
@@ -2850,6 +2973,13 @@
     if (A == Op0 || B == Op0)    // A | (A & ?)  --> A
       return ReplaceInstUsesWith(I, Op0);
 
+  // (A | B) | C  and  A | (B | C)  -> bswap if possible.
+  if (match(Op0, m_Or(m_Value(), m_Value())) ||
+      match(Op1, m_Or(m_Value(), m_Value()))) {
+    if (Instruction *BSwap = MatchBSwap(I))
+      return BSwap;
+  }
+  
   // (X^C)|Y -> (X|Y)^C iff Y&C == 0
   if (Op0->hasOneUse() && match(Op0, m_Xor(m_Value(A), m_ConstantInt(C1))) &&
       MaskedValueIsZero(Op1, C1->getZExtValue())) {





From lattner at cs.uiuc.edu  Thu Jun 15 14:25:40 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu, 15 Jun 2006 14:25:40 -0500
Subject: [llvm-commits] CVS: llvm/include/llvm/Support/PatternMatch.h 
Message-ID: <200606151925.OAA23237@zion.cs.uiuc.edu>



Changes in directory llvm/include/llvm/Support:

PatternMatch.h updated: 1.7 -> 1.8
---
Log message:

Add some more matcher classes for shifts.


---
Diffs of the changes:  (+21 -6)

 PatternMatch.h |   27 +++++++++++++++++++++------
 1 files changed, 21 insertions(+), 6 deletions(-)


Index: llvm/include/llvm/Support/PatternMatch.h
diff -u llvm/include/llvm/Support/PatternMatch.h:1.7 llvm/include/llvm/Support/PatternMatch.h:1.8
--- llvm/include/llvm/Support/PatternMatch.h:1.7	Mon Feb 13 17:06:39 2006
+++ llvm/include/llvm/Support/PatternMatch.h	Thu Jun 15 14:25:28 2006
@@ -68,7 +68,7 @@
 inline bind_ty<ConstantInt> m_ConstantInt(ConstantInt *&CI) { return CI; }
 
 //===----------------------------------------------------------------------===//
-// Matchers for specific binary operators
+// Matchers for specific binary operators.
 //
 
 template<typename LHS_t, typename RHS_t, 
@@ -157,13 +157,13 @@
 // Matchers for binary classes
 //
 
-template<typename LHS_t, typename RHS_t, typename Class>
+template<typename LHS_t, typename RHS_t, typename Class, typename OpcType>
 struct BinaryOpClass_match {
-  Instruction::BinaryOps &Opcode;
+  OpcType &Opcode;
   LHS_t L;
   RHS_t R;
 
-  BinaryOpClass_match(Instruction::BinaryOps &Op, const LHS_t &LHS,
+  BinaryOpClass_match(OpcType &Op, const LHS_t &LHS,
                       const RHS_t &RHS)
     : Opcode(Op), L(LHS), R(RHS) {}
 
@@ -184,11 +184,26 @@
 };
 
 template<typename LHS, typename RHS>
-inline BinaryOpClass_match<LHS, RHS, SetCondInst>
+inline BinaryOpClass_match<LHS, RHS, SetCondInst, Instruction::BinaryOps>
 m_SetCond(Instruction::BinaryOps &Op, const LHS &L, const RHS &R) {
-  return BinaryOpClass_match<LHS, RHS, SetCondInst>(Op, L, R);
+  return BinaryOpClass_match<LHS, RHS, 
+                             SetCondInst, Instruction::BinaryOps>(Op, L, R);
 }
 
+template<typename LHS, typename RHS>
+inline BinaryOpClass_match<LHS, RHS, ShiftInst, Instruction::OtherOps>
+m_Shift(Instruction::OtherOps &Op, const LHS &L, const RHS &R) {
+  return BinaryOpClass_match<LHS, RHS, 
+                             ShiftInst, Instruction::OtherOps>(Op, L, R);
+}
+
+template<typename LHS, typename RHS>
+inline BinaryOpClass_match<LHS, RHS, ShiftInst, Instruction::OtherOps>
+m_Shift(const LHS &L, const RHS &R) {
+  Instruction::OtherOps Op; 
+  return BinaryOpClass_match<LHS, RHS, 
+                             ShiftInst, Instruction::OtherOps>(Op, L, R);
+}
 
 //===----------------------------------------------------------------------===//
 // Matchers for unary operators





From jlaskey at apple.com  Thu Jun 15 14:35:19 2006
From: jlaskey at apple.com (Jim Laskey)
Date: Thu, 15 Jun 2006 14:35:19 -0500
Subject: [llvm-commits] CVS: llvm/test/Regression/CodeGen/PowerPC/align.ll 
Message-ID: <200606151935.OAA23301@zion.cs.uiuc.edu>



Changes in directory llvm/test/Regression/CodeGen/PowerPC:

align.ll added (r1.1)
---
Log message:

Make sure global doubles and vectors are aligned properly.


---
Diffs of the changes:  (+9 -0)

 align.ll |    9 +++++++++
 1 files changed, 9 insertions(+)


Index: llvm/test/Regression/CodeGen/PowerPC/align.ll
diff -c /dev/null llvm/test/Regression/CodeGen/PowerPC/align.ll:1.1
*** /dev/null	Thu Jun 15 14:35:17 2006
--- llvm/test/Regression/CodeGen/PowerPC/align.ll	Thu Jun 15 14:35:07 2006
***************
*** 0 ****
--- 1,9 ----
+ ; RUN: llvm-as < %s | llc -march=ppc32 | grep "align.4" | wc -l | grep 1 &&
+ ; RUN: llvm-as < %s | llc -march=ppc32 | grep "align.2" | wc -l | grep 1 &&
+ ; RUN: llvm-as < %s | llc -march=ppc32 | grep "align.3" | wc -l | grep 1
+ 
+ 
+ %A = global <4 x uint> < uint 10, uint 20, uint 30, uint 40 >
+ %B = global float 1.000000e+02
+ %C = global double 2.000000e+03
+ 





From jlaskey at apple.com  Thu Jun 15 14:37:26 2006
From: jlaskey at apple.com (Jim Laskey)
Date: Thu, 15 Jun 2006 14:37:26 -0500
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/AsmPrinter.cpp 
Message-ID: <200606151937.OAA23335@zion.cs.uiuc.edu>



Changes in directory llvm/lib/CodeGen:

AsmPrinter.cpp updated: 1.81 -> 1.82
---
Log message:

Was pointed out that structure alignment and type alignment are not the same
thing.  Doubles still need to be special cased.


---
Diffs of the changes:  (+3 -0)

 AsmPrinter.cpp |    3 +++
 1 files changed, 3 insertions(+)


Index: llvm/lib/CodeGen/AsmPrinter.cpp
diff -u llvm/lib/CodeGen/AsmPrinter.cpp:1.81 llvm/lib/CodeGen/AsmPrinter.cpp:1.82
--- llvm/lib/CodeGen/AsmPrinter.cpp:1.81	Thu Jun 15 08:10:58 2006
+++ llvm/lib/CodeGen/AsmPrinter.cpp	Thu Jun 15 14:37:14 2006
@@ -250,6 +250,9 @@
     Alignment = Log2_32(GV->getAlignment());
   
   if (GV->hasInitializer()) {
+    // Always round up alignment of global doubles to 8 bytes.
+    if (GV->getType()->getElementType() == Type::DoubleTy && Alignment < 3)
+      Alignment = 3;
     if (Alignment < 4) {
       // If the global is not external, see if it is large.  If so, give it a
       // larger alignment.





From jlaskey at apple.com  Thu Jun 15 15:51:59 2006
From: jlaskey at apple.com (Jim Laskey)
Date: Thu, 15 Jun 2006 15:51:59 -0500
Subject: [llvm-commits] CVS: llvm/include/llvm/Support/Dwarf.h 
Message-ID: <200606152051.PAA24151@zion.cs.uiuc.edu>



Changes in directory llvm/include/llvm/Support:

Dwarf.h updated: 1.6 -> 1.7
---
Log message:

1. Support standard dwarf format (was bootstrapping in Apple format.)

2. Add vector support.


---
Diffs of the changes:  (+10 -3)

 Dwarf.h |   13 ++++++++++---
 1 files changed, 10 insertions(+), 3 deletions(-)


Index: llvm/include/llvm/Support/Dwarf.h
diff -u llvm/include/llvm/Support/Dwarf.h:1.6 llvm/include/llvm/Support/Dwarf.h:1.7
--- llvm/include/llvm/Support/Dwarf.h:1.6	Thu Mar 23 12:07:55 2006
+++ llvm/include/llvm/Support/Dwarf.h	Thu Jun 15 15:51:43 2006
@@ -37,10 +37,10 @@
   DW_TAG_arg_variable = 0x101,          // Tag for argument variables.
   DW_TAG_return_variable = 0x102,       // Tag for return variables.
   
-  DW_TAG_user_base = 0x1000,             // Recommended base for user tags.
+  DW_TAG_user_base = 0x1000,            // Recommended base for user tags.
   
-  DW_CIE_VERSION = 1,                    // Common frame information version.
-  DW_CIE_ID	 = 0xffffffff                // Common frame information mark.
+  DW_CIE_VERSION = 1,                   // Common frame information version.
+  DW_CIE_ID	 = 0xffffffff               // Common frame information mark.
 };
 
 enum dwarf_constants {
@@ -198,6 +198,13 @@
   DW_AT_elemental = 0x66,
   DW_AT_pure = 0x67,
   DW_AT_recursive = 0x68,
+  DW_AT_sf_names = 0x2101,
+  DW_AT_src_info = 0x2102,
+  DW_AT_mac_info = 0x2103,
+  DW_AT_src_coords = 0x2104,
+  DW_AT_body_begin = 0x2105,
+  DW_AT_body_end = 0x2106,
+  DW_AT_GNU_vector = 0x2107,
   DW_AT_lo_user = 0x2000,
   DW_AT_hi_user = 0x3fff,
 





From jlaskey at apple.com  Thu Jun 15 15:51:59 2006
From: jlaskey at apple.com (Jim Laskey)
Date: Thu, 15 Jun 2006 15:51:59 -0500
Subject: [llvm-commits] CVS: llvm/docs/SourceLevelDebugging.html 
Message-ID: <200606152051.PAA24155@zion.cs.uiuc.edu>



Changes in directory llvm/docs:

SourceLevelDebugging.html updated: 1.18 -> 1.19
---
Log message:

1. Support standard dwarf format (was bootstrapping in Apple format.)

2. Add vector support.


---
Diffs of the changes:  (+7 -2)

 SourceLevelDebugging.html |    9 +++++++--
 1 files changed, 7 insertions(+), 2 deletions(-)


Index: llvm/docs/SourceLevelDebugging.html
diff -u llvm/docs/SourceLevelDebugging.html:1.18 llvm/docs/SourceLevelDebugging.html:1.19
--- llvm/docs/SourceLevelDebugging.html:1.18	Fri Mar 24 03:20:27 2006
+++ llvm/docs/SourceLevelDebugging.html	Thu Jun 15 15:51:43 2006
@@ -575,6 +575,7 @@
     uint,   ;; Size in bits
     uint,   ;; Alignment in bits
     uint,   ;; Offset in bits
+    bool,   ;; Is vector flag
     {  }*   ;; Reference to array of member descriptors
   }
 </pre>
@@ -590,6 +591,8 @@
   DW_TAG_union_type = 23
 </pre>
 
+<p>The vector flag indicates that an array type is a native packed vector.</p>
+
 <p>The members of array types (tag = <tt>DW_TAG_array_type</tt>) are <a
 href="#format_subrange">subrange descriptors</a>, each representing the range of
 subscripts at that level of indexing.</p>
@@ -1600,7 +1603,8 @@
     uint 96, 
     uint 32, 
     uint 0, 
-    {  }* null, 
+    {  }* null,
+    bool false,
     {  }* cast ([3 x {  }*]* %llvm.dbg.array to {  }*) }, section "llvm.metadata"
 %str2 = internal constant [6 x sbyte] c"Color\00", section "llvm.metadata"
 
@@ -1693,6 +1697,7 @@
     uint 32, 
     uint 0, 
     {  }* null, 
+    bool false,
     {  }* cast ([3 x {  }*]* %llvm.dbg.array to {  }*) }, section "llvm.metadata"
 %str1 = internal constant [6 x sbyte] c"Trees\00", section "llvm.metadata"
 
@@ -1745,7 +1750,7 @@
 
   <a href="mailto:sabre at nondot.org">Chris Lattner</a><br>
   <a href="http://llvm.org">LLVM Compiler Infrastructure</a><br>
-  Last modified: $Date: 2006/03/24 09:20:27 $
+  Last modified: $Date: 2006/06/15 20:51:43 $
 </address>
 
 </body>





From jlaskey at apple.com  Thu Jun 15 15:51:58 2006
From: jlaskey at apple.com (Jim Laskey)
Date: Thu, 15 Jun 2006 15:51:58 -0500
Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineDebugInfo.h 
Message-ID: <200606152051.PAA24147@zion.cs.uiuc.edu>



Changes in directory llvm/include/llvm/CodeGen:

MachineDebugInfo.h updated: 1.34 -> 1.35
---
Log message:

1. Support standard dwarf format (was bootstrapping in Apple format.)

2. Add vector support.


---
Diffs of the changes:  (+4 -1)

 MachineDebugInfo.h |    5 ++++-
 1 files changed, 4 insertions(+), 1 deletion(-)


Index: llvm/include/llvm/CodeGen/MachineDebugInfo.h
diff -u llvm/include/llvm/CodeGen/MachineDebugInfo.h:1.34 llvm/include/llvm/CodeGen/MachineDebugInfo.h:1.35
--- llvm/include/llvm/CodeGen/MachineDebugInfo.h:1.34	Wed Jun 14 09:45:39 2006
+++ llvm/include/llvm/CodeGen/MachineDebugInfo.h	Thu Jun 15 15:51:43 2006
@@ -57,7 +57,7 @@
 // Debug info constants.
 
 enum {
-  LLVMDebugVersion = 3                  // Current version of debug information.
+  LLVMDebugVersion = 4                  // Current version of debug information.
 };
 
 //===----------------------------------------------------------------------===//
@@ -400,13 +400,16 @@
 /// array/struct types (eg., arrays, struct, union, enums.)
 class CompositeTypeDesc : public DerivedTypeDesc {
 private:
+  bool IsVector;                        // packed/vector array
   std::vector<DebugInfoDesc *> Elements;// Information used to compose type.
 
 public:
   CompositeTypeDesc(unsigned T);
   
   // Accessors
+  bool isVector() const { return IsVector; }
   std::vector<DebugInfoDesc *> &getElements() { return Elements; }
+  void setIsVector() { IsVector = true; }
 
   // Implement isa/cast/dyncast.
   static bool classof(const CompositeTypeDesc *) { return true; }





From jlaskey at apple.com  Thu Jun 15 15:52:00 2006
From: jlaskey at apple.com (Jim Laskey)
Date: Thu, 15 Jun 2006 15:52:00 -0500
Subject: [llvm-commits] CVS: llvm/lib/Support/Dwarf.cpp 
Message-ID: <200606152052.PAA24169@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Support:

Dwarf.cpp updated: 1.2 -> 1.3
---
Log message:

1. Support standard dwarf format (was bootstrapping in Apple format.)

2. Add vector support.


---
Diffs of the changes:  (+7 -0)

 Dwarf.cpp |    7 +++++++
 1 files changed, 7 insertions(+)


Index: llvm/lib/Support/Dwarf.cpp
diff -u llvm/lib/Support/Dwarf.cpp:1.2 llvm/lib/Support/Dwarf.cpp:1.3
--- llvm/lib/Support/Dwarf.cpp:1.2	Mon Feb 27 16:37:23 2006
+++ llvm/lib/Support/Dwarf.cpp	Thu Jun 15 15:51:43 2006
@@ -188,6 +188,13 @@
     case DW_AT_elemental:                  return "AT_elemental";
     case DW_AT_pure:                       return "AT_pure";
     case DW_AT_recursive:                  return "AT_recursive";
+    case DW_AT_sf_names:                   return "AT_sf_names";
+    case DW_AT_src_info:                   return "AT_src_info";
+    case DW_AT_mac_info:                   return "AT_mac_info";
+    case DW_AT_src_coords:                 return "AT_src_coords";
+    case DW_AT_body_begin:                 return "AT_body_begin";
+    case DW_AT_body_end:                   return "AT_body_end";
+    case DW_AT_GNU_vector:                 return "AT_GNU_vector";
     case DW_AT_lo_user:                    return "AT_lo_user";
     case DW_AT_hi_user:                    return "AT_hi_user";
   }





From jlaskey at apple.com  Thu Jun 15 15:51:59 2006
From: jlaskey at apple.com (Jim Laskey)
Date: Thu, 15 Jun 2006 15:51:59 -0500
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/DwarfWriter.cpp
	MachineDebugInfo.cpp 
Message-ID: <200606152051.PAA24165@zion.cs.uiuc.edu>



Changes in directory llvm/lib/CodeGen:

DwarfWriter.cpp updated: 1.61 -> 1.62
MachineDebugInfo.cpp updated: 1.40 -> 1.41
---
Log message:

1. Support standard dwarf format (was bootstrapping in Apple format.)

2. Add vector support.


---
Diffs of the changes:  (+14 -4)

 DwarfWriter.cpp      |   16 ++++++++++++----
 MachineDebugInfo.cpp |    2 ++
 2 files changed, 14 insertions(+), 4 deletions(-)


Index: llvm/lib/CodeGen/DwarfWriter.cpp
diff -u llvm/lib/CodeGen/DwarfWriter.cpp:1.61 llvm/lib/CodeGen/DwarfWriter.cpp:1.62
--- llvm/lib/CodeGen/DwarfWriter.cpp:1.61	Wed Jun 14 06:35:03 2006
+++ llvm/lib/CodeGen/DwarfWriter.cpp	Thu Jun 15 15:51:43 2006
@@ -1265,7 +1265,7 @@
     // Fundamental types like int, float, bool
     Slot = Ty = new DIE(DW_TAG_base_type);
     unsigned Encoding = BasicTy->getEncoding();
-    Ty->AddUInt  (DW_AT_encoding,  DW_FORM_data1, Encoding);
+    Ty->AddUInt(DW_AT_encoding,  DW_FORM_data1, Encoding);
   } else if (DerivedTypeDesc *DerivedTy = dyn_cast<DerivedTypeDesc>(TyDesc)) {
     // Create specific DIE.
     Slot = Ty = new DIE(DerivedTy->getTag());
@@ -1287,6 +1287,12 @@
         Ty->AddDIEntry(DW_AT_type, DW_FORM_ref4,
                        NewType(Context, FromTy, Unit));
       }
+      
+      // check for vector type
+      if (CompTy->isVector()) {
+        Ty->AddUInt(DW_AT_GNU_vector, DW_FORM_flag, 1);
+      }
+      
       // Don't emit size attribute.
       Size = 0;
       
@@ -1419,7 +1425,8 @@
                                          unsigned ID) {
   // Construct debug information entry.
   DIE *Die = new DIE(DW_TAG_compile_unit);
-  Die->AddLabel (DW_AT_stmt_list, DW_FORM_data4,  DWLabel("line", 0));
+  Die->AddDelta (DW_AT_stmt_list, DW_FORM_data4,  DWLabel("line", 0),
+                                                  DWLabel("section_line", 0));
   Die->AddLabel (DW_AT_high_pc,   DW_FORM_addr,   DWLabel("text_end", 0));
   Die->AddLabel (DW_AT_low_pc,    DW_FORM_addr,   DWLabel("text_begin", 0));
   Die->AddString(DW_AT_producer,  DW_FORM_string, UnitDesc->getProducer());
@@ -1842,7 +1849,7 @@
         int stackGrowth =
             Asm->TM.getFrameInfo()->getStackGrowthDirection() ==
               TargetFrameInfo::StackGrowsUp ?
-            AddressSize : -AddressSize;
+                AddressSize : -AddressSize;
         
         EmitULEB128Bytes(Src.getOffset() / stackGrowth);
         EOL("Offset");
@@ -1875,7 +1882,8 @@
                              
       EmitInt32(ContentSize);  EOL("Length of Compilation Unit Info");
       EmitInt16(DWARF_VERSION); EOL("DWARF version number");
-      EmitReference("abbrev_begin", 0); EOL("Offset Into Abbrev. Section");
+      EmitDifference("abbrev_begin", 0, "section_abbrev", 0);
+      EOL("Offset Into Abbrev. Section");
       EmitInt8(AddressSize); EOL("Address Size (in bytes)");
     
       EmitDIE(Die);


Index: llvm/lib/CodeGen/MachineDebugInfo.cpp
diff -u llvm/lib/CodeGen/MachineDebugInfo.cpp:1.40 llvm/lib/CodeGen/MachineDebugInfo.cpp:1.41
--- llvm/lib/CodeGen/MachineDebugInfo.cpp:1.40	Wed Jun 14 09:45:39 2006
+++ llvm/lib/CodeGen/MachineDebugInfo.cpp	Thu Jun 15 15:51:43 2006
@@ -817,6 +817,7 @@
 
 CompositeTypeDesc::CompositeTypeDesc(unsigned T)
 : DerivedTypeDesc(T)
+, IsVector(false)
 , Elements()
 {}
   
@@ -839,6 +840,7 @@
 void CompositeTypeDesc::ApplyToFields(DIVisitor *Visitor) {
   DerivedTypeDesc::ApplyToFields(Visitor);
   
+  Visitor->Apply(IsVector);
   Visitor->Apply(Elements);
 }
 





From jlaskey at apple.com  Thu Jun 15 15:51:59 2006
From: jlaskey at apple.com (Jim Laskey)
Date: Thu, 15 Jun 2006 15:51:59 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp 
Message-ID: <200606152051.PAA24159@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/PowerPC:

PPCAsmPrinter.cpp updated: 1.177 -> 1.178
---
Log message:

1. Support standard dwarf format (was bootstrapping in Apple format.)

2. Add vector support.


---
Diffs of the changes:  (+11 -11)

 PPCAsmPrinter.cpp |   22 +++++++++++-----------
 1 files changed, 11 insertions(+), 11 deletions(-)


Index: llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
diff -u llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.177 llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.178
--- llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.177	Wed Jun 14 06:35:03 2006
+++ llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp	Thu Jun 15 15:51:43 2006
@@ -246,17 +246,17 @@
     : DwarfWriter(o, ap)
     {
       needsSet = true;
-      DwarfAbbrevSection = ".section __DWARFA,__debug_abbrev";
-      DwarfInfoSection = ".section __DWARFA,__debug_info";
-      DwarfLineSection = ".section __DWARFA,__debug_line";
-      DwarfFrameSection = ".section __DWARFA,__debug_frame";
-      DwarfPubNamesSection = ".section __DWARFA,__debug_pubnames";
-      DwarfPubTypesSection = ".section __DWARFA,__debug_pubtypes";
-      DwarfStrSection = ".section __DWARFA,__debug_str";
-      DwarfLocSection = ".section __DWARFA,__debug_loc";
-      DwarfARangesSection = ".section __DWARFA,__debug_aranges";
-      DwarfRangesSection = ".section __DWARFA,__debug_ranges";
-      DwarfMacInfoSection = ".section __DWARFA,__debug_macinfo";
+      DwarfAbbrevSection = ".section __DWARF,__debug_abbrev";
+      DwarfInfoSection = ".section __DWARF,__debug_info";
+      DwarfLineSection = ".section __DWARF,__debug_line";
+      DwarfFrameSection = ".section __DWARF,__debug_frame";
+      DwarfPubNamesSection = ".section __DWARF,__debug_pubnames";
+      DwarfPubTypesSection = ".section __DWARF,__debug_pubtypes";
+      DwarfStrSection = ".section __DWARF,__debug_str";
+      DwarfLocSection = ".section __DWARF,__debug_loc";
+      DwarfARangesSection = ".section __DWARF,__debug_aranges";
+      DwarfRangesSection = ".section __DWARF,__debug_ranges";
+      DwarfMacInfoSection = ".section __DWARF,__debug_macinfo";
       TextSection = ".text";
       DataSection = ".data";
     }





From lattner at cs.uiuc.edu  Thu Jun 15 16:33:43 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu, 15 Jun 2006 16:33:43 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/README.txt 
Message-ID: <200606152133.QAA24428@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/X86:

README.txt updated: 1.116 -> 1.117
---
Log message:

Add a note that Nate noticed.


---
Diffs of the changes:  (+34 -0)

 README.txt |   34 ++++++++++++++++++++++++++++++++++
 1 files changed, 34 insertions(+)


Index: llvm/lib/Target/X86/README.txt
diff -u llvm/lib/Target/X86/README.txt:1.116 llvm/lib/Target/X86/README.txt:1.117
--- llvm/lib/Target/X86/README.txt:1.116	Sun Jun  4 04:08:00 2006
+++ llvm/lib/Target/X86/README.txt	Thu Jun 15 16:33:31 2006
@@ -668,3 +668,37 @@
 //===---------------------------------------------------------------------===//
 
 We should handle __attribute__ ((__visibility__ ("hidden"))).
+
+//===---------------------------------------------------------------------===//
+
+Consider:
+int foo(int *a, int t) {
+int x;
+for (x=0; x<40; ++x)
+   t = t + a[x] + x;
+return t;
+}
+
+We generate:
+LBB1_1: #cond_true
+        movl %ecx, %esi
+        movl (%edx,%eax,4), %edi
+        movl %esi, %ecx
+        addl %edi, %ecx
+        addl %eax, %ecx
+        incl %eax
+        cmpl $40, %eax
+        jne LBB1_1      #cond_true
+
+GCC generates:
+
+L2:
+        addl    (%ecx,%edx,4), %eax
+        addl    %edx, %eax
+        addl    $1, %edx
+        cmpl    $40, %edx
+        jne     L2
+
+Smells like a register coallescing/reassociation issue.
+
+//===---------------------------------------------------------------------===//





From lattner at cs.uiuc.edu  Thu Jun 15 17:22:05 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu, 15 Jun 2006 17:22:05 -0500
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/RegAllocLocal.cpp 
Message-ID: <200606152222.RAA24730@zion.cs.uiuc.edu>



Changes in directory llvm/lib/CodeGen:

RegAllocLocal.cpp updated: 1.78 -> 1.79
---
Log message:

Teach the local allocator to know that live-in values (e.g. arguments) are
live at function entry.  This prevents it from using arg registers for other
purposes before the arguments are used.


---
Diffs of the changes:  (+20 -0)

 RegAllocLocal.cpp |   20 ++++++++++++++++++++
 1 files changed, 20 insertions(+)


Index: llvm/lib/CodeGen/RegAllocLocal.cpp
diff -u llvm/lib/CodeGen/RegAllocLocal.cpp:1.78 llvm/lib/CodeGen/RegAllocLocal.cpp:1.79
--- llvm/lib/CodeGen/RegAllocLocal.cpp:1.78	Thu May  4 12:52:23 2006
+++ llvm/lib/CodeGen/RegAllocLocal.cpp	Thu Jun 15 17:21:53 2006
@@ -491,6 +491,26 @@
   // loop over each instruction
   MachineBasicBlock::iterator MII = MBB.begin();
   const TargetInstrInfo &TII = *TM->getInstrInfo();
+  
+  // If this is the first basic block in the machine function, add live-in
+  // registers as active.
+  if (&MBB == &*MF->begin()) {
+    for (MachineFunction::livein_iterator I = MF->livein_begin(),
+         E = MF->livein_end(); I != E; ++I) {
+      unsigned Reg = I->first;
+      PhysRegsEverUsed[Reg] = true;
+      PhysRegsUsed[Reg] = 0;            // It is free and reserved now
+      PhysRegsUseOrder.push_back(Reg);
+      for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg);
+           *AliasSet; ++AliasSet) {
+        PhysRegsUseOrder.push_back(*AliasSet);
+        PhysRegsUsed[*AliasSet] = 0;  // It is free and reserved now
+        PhysRegsEverUsed[*AliasSet] = true;
+      }
+    }    
+  }
+  
+  // Otherwise, sequentially allocate each instruction in the MBB.
   while (MII != MBB.end()) {
     MachineInstr *MI = MII++;
     const TargetInstrDescriptor &TID = TII.get(MI->getOpcode());





From reid at x10sys.com  Thu Jun 15 19:01:10 2006
From: reid at x10sys.com (Reid Spencer)
Date: Thu, 15 Jun 2006 19:01:10 -0500
Subject: [llvm-commits] CVS: llvm/lib/System/Unix/Signals.inc 
Message-ID: <200606160001.TAA25235@zion.cs.uiuc.edu>



Changes in directory llvm/lib/System/Unix:

Signals.inc updated: 1.10 -> 1.11
---
Log message:

Only print the stack trace if it was requested. Previously, any call into
the Signals module that registered the handlers would cause the stack trace
to be generated. Now, you must explicitly call PrintStackTraceOnErrorSignal
in order for that to happen.


---
Diffs of the changes:  (+5 -1)

 Signals.inc |    6 +++++-
 1 files changed, 5 insertions(+), 1 deletion(-)


Index: llvm/lib/System/Unix/Signals.inc
diff -u llvm/lib/System/Unix/Signals.inc:1.10 llvm/lib/System/Unix/Signals.inc:1.11
--- llvm/lib/System/Unix/Signals.inc:1.10	Mon Aug  1 21:14:22 2005
+++ llvm/lib/System/Unix/Signals.inc	Thu Jun 15 19:00:57 2006
@@ -24,6 +24,8 @@
 
 namespace {
 
+bool StackTraceRequested = false; 
+
 /// InterruptFunction - The function to call if ctrl-c is pressed.
 void (*InterruptFunction)() = 0;
 
@@ -132,7 +134,8 @@
 
   // Otherwise if it is a fault (like SEGV) output the stacktrace to
   // STDERR (if we can) and reissue the signal to die...
-  PrintStackTrace();
+  if (StackTraceRequested)
+    PrintStackTrace();
   signal(Sig, SIG_DFL);
 }
 
@@ -178,6 +181,7 @@
 /// PrintStackTraceOnErrorSignal - When an error signal (such as SIBABRT or
 /// SIGSEGV) is delivered to the process, print a stack trace and then exit.
 void sys::PrintStackTraceOnErrorSignal() {
+  StackTraceRequested = true;
   std::for_each(KillSigs, KillSigsEnd, RegisterHandler);
 }
 





From lattner at cs.uiuc.edu  Thu Jun 15 20:21:10 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu, 15 Jun 2006 20:21:10 -0500
Subject: [llvm-commits] 
	CVS: llvm/test/Regression/Linker/2006-06-15-GlobalVarAlignment.ll
Message-ID: <200606160121.UAA25731@zion.cs.uiuc.edu>



Changes in directory llvm/test/Regression/Linker:

2006-06-15-GlobalVarAlignment.ll added (r1.1)
---
Log message:

New testcase, the linker is not merging alignments right.


---
Diffs of the changes:  (+7 -0)

 2006-06-15-GlobalVarAlignment.ll |    7 +++++++
 1 files changed, 7 insertions(+)


Index: llvm/test/Regression/Linker/2006-06-15-GlobalVarAlignment.ll
diff -c /dev/null llvm/test/Regression/Linker/2006-06-15-GlobalVarAlignment.ll:1.1
*** /dev/null	Thu Jun 15 20:21:08 2006
--- llvm/test/Regression/Linker/2006-06-15-GlobalVarAlignment.ll	Thu Jun 15 20:20:58 2006
***************
*** 0 ****
--- 1,7 ----
+ ; The linker should choose the largest alignment when linking.
+ 
+ ; RUN: echo "%X = global int 7, align 8" | llvm-as > %t.2.bc
+ ; RUN: llvm-as < %s > %t.1.bc
+ ; RUN: llvm-link %t.[12].bc | llvm-dis | grep 'align 8'
+ 
+ %X = weak global int 7, align 4





From lattner at cs.uiuc.edu  Thu Jun 15 20:24:16 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu, 15 Jun 2006 20:24:16 -0500
Subject: [llvm-commits] CVS: llvm/lib/Linker/LinkModules.cpp 
Message-ID: <200606160124.UAA25805@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Linker:

LinkModules.cpp updated: 1.114 -> 1.115
---
Log message:

Fix Regression/Linker/2006-06-15-GlobalVarAnment.ll


---
Diffs of the changes:  (+18 -5)

 LinkModules.cpp |   23 ++++++++++++++++++-----
 1 files changed, 18 insertions(+), 5 deletions(-)


Index: llvm/lib/Linker/LinkModules.cpp
diff -u llvm/lib/Linker/LinkModules.cpp:1.114 llvm/lib/Linker/LinkModules.cpp:1.115
--- llvm/lib/Linker/LinkModules.cpp:1.114	Thu Jun  1 14:14:22 2006
+++ llvm/lib/Linker/LinkModules.cpp	Thu Jun 15 20:24:04 2006
@@ -452,7 +452,8 @@
   SymbolTable *ST = (SymbolTable*)&Dest->getSymbolTable();
 
   // Loop over all of the globals in the src module, mapping them over as we go
-  for (Module::global_iterator I = Src->global_begin(), E = Src->global_end(); I != E; ++I) {
+  for (Module::global_iterator I = Src->global_begin(), E = Src->global_end();
+       I != E; ++I) {
     GlobalVariable *SGV = I;
     GlobalVariable *DGV = 0;
     // Check to see if may have to link the global.
@@ -487,7 +488,9 @@
         new GlobalVariable(SGV->getType()->getElementType(),
                            SGV->isConstant(), SGV->getLinkage(), /*init*/0,
                            SGV->getName(), Dest);
-
+      // Propagate alignment info.
+      NewDGV->setAlignment(SGV->getAlignment());
+      
       // If the LLVM runtime renamed the global, but it is an externally visible
       // symbol, DGV must be an existing global with internal linkage.  Rename
       // it.
@@ -509,12 +512,18 @@
                            SGV->isConstant(), SGV->getLinkage(), /*init*/0,
                            "", Dest);
 
+      // Propagate alignment info.
+      NewDGV->setAlignment(std::max(DGV->getAlignment(), SGV->getAlignment()));
+
       // Make sure to remember this mapping...
       ValueMap.insert(std::make_pair(SGV, NewDGV));
 
       // Keep track that this is an appending variable...
       AppendingVars.insert(std::make_pair(SGV->getName(), NewDGV));
     } else {
+      // Propagate alignment info.
+      DGV->setAlignment(std::max(DGV->getAlignment(), SGV->getAlignment()));
+
       // Otherwise, perform the mapping as instructed by GetLinkageResult.  If
       // the types don't match, and if we are to link from the source, nuke DGV
       // and create a new one of the appropriate type.
@@ -522,6 +531,7 @@
         GlobalVariable *NewDGV =
           new GlobalVariable(SGV->getType()->getElementType(),
                              DGV->isConstant(), DGV->getLinkage());
+        NewDGV->setAlignment(DGV->getAlignment());
         Dest->getGlobalList().insert(DGV, NewDGV);
         DGV->replaceAllUsesWith(ConstantExpr::getCast(NewDGV, DGV->getType()));
         DGV->eraseFromParent();
@@ -560,7 +570,8 @@
                             std::string *Err) {
 
   // Loop over all of the globals in the src module, mapping them over as we go
-  for (Module::const_global_iterator I = Src->global_begin(), E = Src->global_end(); I != E; ++I){
+  for (Module::const_global_iterator I = Src->global_begin(),
+       E = Src->global_end(); I != E; ++I) {
     const GlobalVariable *SGV = I;
 
     if (SGV->hasInitializer()) {      // Only process initialized GV's
@@ -709,7 +720,8 @@
           *OI = RemapOperand(*OI, GlobalMap);
 
   // There is no need to map the arguments anymore.
-  for (Function::arg_iterator I = Src->arg_begin(), E = Src->arg_end(); I != E; ++I)
+  for (Function::arg_iterator I = Src->arg_begin(), E = Src->arg_end();
+       I != E; ++I)
     GlobalMap.erase(I);
 
   return false;
@@ -892,7 +904,8 @@
   // it's functionality here.
   std::map<std::string, GlobalValue*> GlobalsByName;
 
-  for (Module::global_iterator I = Dest->global_begin(), E = Dest->global_end(); I != E; ++I) {
+  for (Module::global_iterator I = Dest->global_begin(), E = Dest->global_end();
+       I != E; ++I) {
     // Add all of the appending globals already in the Dest module to
     // AppendingVars.
     if (I->hasAppendingLinkage())





From lattner at cs.uiuc.edu  Thu Jun 15 20:37:39 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Thu, 15 Jun 2006 20:37:39 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCSubtarget.cpp
	PPCSubtarget.h PPCTargetMachine.cpp PPCTargetMachine.h 
Message-ID: <200606160137.UAA25960@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/PowerPC:

PPCSubtarget.cpp updated: 1.19 -> 1.20
PPCSubtarget.h updated: 1.13 -> 1.14
PPCTargetMachine.cpp updated: 1.91 -> 1.92
PPCTargetMachine.h updated: 1.21 -> 1.22
---
Log message:

First baby step towards ppc64 support.  This adds a new -march=ppc64 backend
that is currently just like ppc32 :)


---
Diffs of the changes:  (+88 -26)

 PPCSubtarget.cpp     |    2 -
 PPCSubtarget.h       |    6 ++++-
 PPCTargetMachine.cpp |   59 ++++++++++++++++++++++++++++++++++++++++++---------
 PPCTargetMachine.h   |   47 ++++++++++++++++++++++++++++------------
 4 files changed, 88 insertions(+), 26 deletions(-)


Index: llvm/lib/Target/PowerPC/PPCSubtarget.cpp
diff -u llvm/lib/Target/PowerPC/PPCSubtarget.cpp:1.19 llvm/lib/Target/PowerPC/PPCSubtarget.cpp:1.20
--- llvm/lib/Target/PowerPC/PPCSubtarget.cpp:1.19	Tue Feb 28 23:50:56 2006
+++ llvm/lib/Target/PowerPC/PPCSubtarget.cpp	Thu Jun 15 20:37:27 2006
@@ -69,7 +69,7 @@
 #endif
 
 
-PPCSubtarget::PPCSubtarget(const Module &M, const std::string &FS)
+PPCSubtarget::PPCSubtarget(const Module &M, const std::string &FS, bool is64Bit)
   : StackAlignment(16)
   , InstrItins()
   , IsGigaProcessor(false)


Index: llvm/lib/Target/PowerPC/PPCSubtarget.h
diff -u llvm/lib/Target/PowerPC/PPCSubtarget.h:1.13 llvm/lib/Target/PowerPC/PPCSubtarget.h:1.14
--- llvm/lib/Target/PowerPC/PPCSubtarget.h:1.13	Tue Feb 28 01:08:22 2006
+++ llvm/lib/Target/PowerPC/PPCSubtarget.h	Thu Jun 15 20:37:27 2006
@@ -44,7 +44,7 @@
   /// This constructor initializes the data members to match that
   /// of the specified module.
   ///
-  PPCSubtarget(const Module &M, const std::string &FS);
+  PPCSubtarget(const Module &M, const std::string &FS, bool is64Bit);
   
   /// ParseSubtargetFeatures - Parses features string setting specified 
   /// subtarget options.  Definition of function is auto generated by tblgen.
@@ -59,6 +59,10 @@
   /// selection.
   const InstrItineraryData getInstrItineraryData() const { return InstrItins; }
   
+  const char *getTargetDataString() const {
+    // FIXME: Make is64Bit be for the processor, not the target.
+    return true ? "E-p:32:32-d:32-l:32" : "E-p:64:64-d:32-l:32";
+  }
 
   bool hasFSQRT() const { return HasFSQRT; }
   bool hasSTFIWX() const { return HasSTFIWX; }


Index: llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
diff -u llvm/lib/Target/PowerPC/PPCTargetMachine.cpp:1.91 llvm/lib/Target/PowerPC/PPCTargetMachine.cpp:1.92
--- llvm/lib/Target/PowerPC/PPCTargetMachine.cpp:1.91	Sat May 20 18:28:54 2006
+++ llvm/lib/Target/PowerPC/PPCTargetMachine.cpp	Thu Jun 15 20:37:27 2006
@@ -29,19 +29,29 @@
 
 namespace {
   // Register the targets
-  RegisterTarget<PPCTargetMachine>
-  X("ppc32", "  PowerPC");
+  RegisterTarget<PPC32TargetMachine>
+  X("ppc32", "  PowerPC 32");
+  RegisterTarget<PPC64TargetMachine>
+  Y("ppc64", "  PowerPC 64");
 }
 
-unsigned PPCTargetMachine::getJITMatchQuality() {
+unsigned PPC32TargetMachine::getJITMatchQuality() {
 #if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER)
-  return 10;
+  if (sizeof(void*) == 4)
+    return 10;
 #else
   return 0;
 #endif
 }
+unsigned PPC64TargetMachine::getJITMatchQuality() {
+#if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER)
+  if (sizeof(void*) == 8)
+    return 10 * 0/*FIXME: not PPC64-JIT support yet! */;
+#endif
+  return 0;
+}
 
-unsigned PPCTargetMachine::getModuleMatchQuality(const Module &M) {
+unsigned PPC32TargetMachine::getModuleMatchQuality(const Module &M) {
   // We strongly match "powerpc-*".
   std::string TT = M.getTargetTriple();
   if (TT.size() >= 8 && std::string(TT.begin(), TT.begin()+8) == "powerpc-")
@@ -57,11 +67,31 @@
   return getJITMatchQuality()/2;
 }
 
-PPCTargetMachine::PPCTargetMachine(const Module &M, const std::string &FS)
-: TargetMachine("PowerPC"),
-  DataLayout(std::string("PowerPC"), std::string("E-p:32:32-d:32-l:32")),
-  Subtarget(M, FS), FrameInfo(*this, false), JITInfo(*this),
-  TLInfo(*this), InstrItins(Subtarget.getInstrItineraryData()) {
+unsigned PPC64TargetMachine::getModuleMatchQuality(const Module &M) {
+  // We strongly match "powerpc64-*".
+  std::string TT = M.getTargetTriple();
+  if (TT.size() >= 10 && std::string(TT.begin(), TT.begin()+10) == "powerpc64-")
+    return 20;
+  
+  if (M.getEndianness()  == Module::BigEndian &&
+      M.getPointerSize() == Module::Pointer64)
+    return 10;                                   // Weak match
+  else if (M.getEndianness() != Module::AnyEndianness ||
+           M.getPointerSize() != Module::AnyPointerSize)
+    return 0;                                    // Match for some other target
+  
+  return getJITMatchQuality()/2;
+}
+
+
+PPCTargetMachine::PPCTargetMachine(const Module &M, const std::string &FS,
+                                   bool is64Bit)
+  : TargetMachine("PowerPC"), Subtarget(M, FS, is64Bit),
+    DataLayout(std::string("PowerPC"), 
+               std::string(Subtarget.getTargetDataString())),
+    FrameInfo(*this, false), JITInfo(*this), TLInfo(*this),
+    InstrItins(Subtarget.getInstrItineraryData()) {
+
   if (TargetDefault == PPCTarget) {
     if (Subtarget.isAIX()) PPCTarget = TargetAIX;
     if (Subtarget.isDarwin()) PPCTarget = TargetDarwin;
@@ -73,6 +103,15 @@
       setRelocationModel(Reloc::PIC);
 }
 
+PPC32TargetMachine::PPC32TargetMachine(const Module &M, const std::string &FS) 
+  : PPCTargetMachine(M, FS, false) {
+}
+
+
+PPC64TargetMachine::PPC64TargetMachine(const Module &M, const std::string &FS)
+  : PPCTargetMachine(M, FS, true) {
+}
+
 /// addPassesToEmitFile - Add passes to the specified pass manager to implement
 /// a static compiler for this target.
 ///


Index: llvm/lib/Target/PowerPC/PPCTargetMachine.h
diff -u llvm/lib/Target/PowerPC/PPCTargetMachine.h:1.21 llvm/lib/Target/PowerPC/PPCTargetMachine.h:1.22
--- llvm/lib/Target/PowerPC/PPCTargetMachine.h:1.21	Fri May 12 16:09:57 2006
+++ llvm/lib/Target/PowerPC/PPCTargetMachine.h	Thu Jun 15 20:37:27 2006
@@ -26,44 +26,63 @@
 class PassManager;
 class GlobalValue;
 
+/// PPCTargetMachine - Common code between 32-bit and 64-bit PowerPC targets.
+///
 class PPCTargetMachine : public TargetMachine {
-  const TargetData DataLayout;       // Calculates type size & alignment
-  PPCInstrInfo           InstrInfo;
-  PPCSubtarget           Subtarget;
-  PPCFrameInfo           FrameInfo;
-  PPCJITInfo             JITInfo;
-  PPCTargetLowering      TLInfo;
-  InstrItineraryData     InstrItins;
+  PPCSubtarget        Subtarget;
+  const TargetData    DataLayout;       // Calculates type size & alignment
+  PPCInstrInfo        InstrInfo;
+  PPCFrameInfo        FrameInfo;
+  PPCJITInfo          JITInfo;
+  PPCTargetLowering   TLInfo;
+  InstrItineraryData  InstrItins;
 public:
-  PPCTargetMachine(const Module &M, const std::string &FS);
+  PPCTargetMachine(const Module &M, const std::string &FS, bool is64Bit);
 
   virtual const PPCInstrInfo     *getInstrInfo() const { return &InstrInfo; }
   virtual const TargetFrameInfo  *getFrameInfo() const { return &FrameInfo; }
   virtual       TargetJITInfo    *getJITInfo()         { return &JITInfo; }
-  virtual const TargetSubtarget  *getSubtargetImpl() const{ return &Subtarget; }
   virtual       PPCTargetLowering *getTargetLowering() const { 
    return const_cast<PPCTargetLowering*>(&TLInfo); 
   }
   virtual const MRegisterInfo    *getRegisterInfo() const {
     return &InstrInfo.getRegisterInfo();
   }
-  virtual const TargetData       *getTargetData() const { return &DataLayout; }
+  
+  virtual const TargetData    *getTargetData() const    { return &DataLayout; }
+  virtual const PPCSubtarget  *getSubtargetImpl() const { return &Subtarget; }
   virtual const InstrItineraryData getInstrItineraryData() const {  
     return InstrItins;
   }
   
 
-  static unsigned getJITMatchQuality();
-
-  static unsigned getModuleMatchQuality(const Module &M);
-  
   virtual bool addPassesToEmitFile(PassManager &PM, std::ostream &Out,
                                    CodeGenFileType FileType, bool Fast);
   
   bool addPassesToEmitMachineCode(FunctionPassManager &PM,
                                   MachineCodeEmitter &MCE);
 };
+
+/// PPC32TargetMachine - PowerPC 32-bit target machine.
+///
+class PPC32TargetMachine : public PPCTargetMachine {
+public:
+  PPC32TargetMachine(const Module &M, const std::string &FS);
   
+  static unsigned getJITMatchQuality();
+  static unsigned getModuleMatchQuality(const Module &M);
+};
+
+/// PPC64TargetMachine - PowerPC 64-bit target machine.
+///
+class PPC64TargetMachine : public PPCTargetMachine {
+public:
+  PPC64TargetMachine(const Module &M, const std::string &FS);
+  
+  static unsigned getJITMatchQuality();
+  static unsigned getModuleMatchQuality(const Module &M);
+};
+
 } // end namespace llvm
 
 #endif





From evan.cheng at apple.com  Thu Jun 15 23:52:42 2006
From: evan.cheng at apple.com (Evan Cheng)
Date: Thu, 15 Jun 2006 23:52:42 -0500
Subject: [llvm-commits] CVS: llvm/lib/Transforms/IPO/SimplifyLibCalls.cpp 
Message-ID: <200606160452.XAA26765@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Transforms/IPO:

SimplifyLibCalls.cpp updated: 1.64 -> 1.65
---
Log message:

Simplify fprintf(file, "%s", str) to fputs(str, file).


---
Diffs of the changes:  (+36 -16)

 SimplifyLibCalls.cpp |   52 +++++++++++++++++++++++++++++++++++----------------
 1 files changed, 36 insertions(+), 16 deletions(-)


Index: llvm/lib/Transforms/IPO/SimplifyLibCalls.cpp
diff -u llvm/lib/Transforms/IPO/SimplifyLibCalls.cpp:1.64 llvm/lib/Transforms/IPO/SimplifyLibCalls.cpp:1.65
--- llvm/lib/Transforms/IPO/SimplifyLibCalls.cpp:1.64	Fri May 12 18:35:26 2006
+++ llvm/lib/Transforms/IPO/SimplifyLibCalls.cpp	Thu Jun 15 23:52:30 2006
@@ -229,6 +229,15 @@
     return fputc_func;
   }
 
+  /// @brief Return a Function* for the fputs libcall
+  Function* get_fputs(const Type* FILEptr_type) {
+    if (!fputs_func)
+      fputs_func = M->getOrInsertFunction("fputs", Type::IntTy,
+                                          PointerType::get(Type::SByteTy),
+                                          FILEptr_type, NULL);
+    return fputs_func;
+  }
+
   /// @brief Return a Function* for the fwrite libcall
   Function* get_fwrite(const Type* FILEptr_type) {
     if (!fwrite_func)
@@ -310,6 +319,7 @@
     M = &mod;
     TD = &getAnalysis<TargetData>();
     fputc_func = 0;
+    fputs_func = 0;
     fwrite_func = 0;
     memcpy_func = 0;
     memchr_func = 0;
@@ -325,7 +335,7 @@
 
 private:
   /// Caches for function pointers.
-  Function *fputc_func, *fwrite_func;
+  Function *fputc_func, *fputs_func, *fwrite_func;
   Function *memcpy_func, *memchr_func;
   Function* sqrt_func;
   Function *strcpy_func, *strlen_func;
@@ -1340,21 +1350,31 @@
       {
         uint64_t len = 0;
         ConstantArray* CA = 0;
-        if (!getConstantStringLength(ci->getOperand(3), len, &CA))
-          return false;
-
-        // fprintf(file,"%s",str) -> fwrite(fmt,strlen(fmt),1,file)
-        const Type* FILEptr_type = ci->getOperand(1)->getType();
-        Function* fwrite_func = SLC.get_fwrite(FILEptr_type);
-        if (!fwrite_func)
-          return false;
-        std::vector<Value*> args;
-        args.push_back(CastToCStr(ci->getOperand(3), *ci));
-        args.push_back(ConstantUInt::get(SLC.getIntPtrType(),len));
-        args.push_back(ConstantUInt::get(SLC.getIntPtrType(),1));
-        args.push_back(ci->getOperand(1));
-        new CallInst(fwrite_func,args,ci->getName(),ci);
-        ci->replaceAllUsesWith(ConstantSInt::get(Type::IntTy,len));
+        if (getConstantStringLength(ci->getOperand(3), len, &CA)) {
+          // fprintf(file,"%s",str) -> fwrite(str,strlen(str),1,file)
+          const Type* FILEptr_type = ci->getOperand(1)->getType();
+          Function* fwrite_func = SLC.get_fwrite(FILEptr_type);
+          if (!fwrite_func)
+            return false;
+          std::vector<Value*> args;
+          args.push_back(CastToCStr(ci->getOperand(3), *ci));
+          args.push_back(ConstantUInt::get(SLC.getIntPtrType(),len));
+          args.push_back(ConstantUInt::get(SLC.getIntPtrType(),1));
+          args.push_back(ci->getOperand(1));
+          new CallInst(fwrite_func,args,ci->getName(),ci);
+          ci->replaceAllUsesWith(ConstantSInt::get(Type::IntTy,len));
+        } else {
+          // fprintf(file,"%s",str) -> fputs(str,file)
+          const Type* FILEptr_type = ci->getOperand(1)->getType();
+          Function* fputs_func = SLC.get_fputs(FILEptr_type);
+          if (!fputs_func)
+            return false;
+          std::vector<Value*> args;
+          args.push_back(ci->getOperand(3));
+          args.push_back(ci->getOperand(1));
+          new CallInst(fputs_func,args,ci->getName(),ci);
+          ci->replaceAllUsesWith(ConstantSInt::get(Type::IntTy,len));
+        }
         break;
       }
       case 'c':





From evan.cheng at apple.com  Fri Jun 16 03:36:49 2006
From: evan.cheng at apple.com (Evan Cheng)
Date: Fri, 16 Jun 2006 03:36:49 -0500
Subject: [llvm-commits] CVS: llvm/lib/Transforms/IPO/SimplifyLibCalls.cpp 
Message-ID: <200606160836.DAA25665@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Transforms/IPO:

SimplifyLibCalls.cpp updated: 1.65 -> 1.66
---
Log message:

More libcall transformations:
printf("%s\n", str) -> puts(str)
printf("%c", c) -> putchar(c)
Also fixed fprintf(file, "%c", c) -> fputc(c, file)


---
Diffs of the changes:  (+110 -8)

 SimplifyLibCalls.cpp |  118 +++++++++++++++++++++++++++++++++++++++++++++++----
 1 files changed, 110 insertions(+), 8 deletions(-)


Index: llvm/lib/Transforms/IPO/SimplifyLibCalls.cpp
diff -u llvm/lib/Transforms/IPO/SimplifyLibCalls.cpp:1.65 llvm/lib/Transforms/IPO/SimplifyLibCalls.cpp:1.66
--- llvm/lib/Transforms/IPO/SimplifyLibCalls.cpp:1.65	Thu Jun 15 23:52:30 2006
+++ llvm/lib/Transforms/IPO/SimplifyLibCalls.cpp	Fri Jun 16 03:36:35 2006
@@ -221,6 +221,23 @@
   /// @brief Return the size_t type -- syntactic shortcut
   const Type* getIntPtrType() const { return TD->getIntPtrType(); }
 
+  /// @brief Return a Function* for the putchar libcall
+  Function* get_putchar() {
+    if (!putchar_func)
+      putchar_func = M->getOrInsertFunction("putchar", Type::IntTy, Type::IntTy,
+                                            NULL);
+    return putchar_func;
+  }
+
+  /// @brief Return a Function* for the puts libcall
+  Function* get_puts() {
+    if (!puts_func)
+      puts_func = M->getOrInsertFunction("puts", Type::IntTy,
+                                         PointerType::get(Type::SByteTy),
+                                         NULL);
+    return puts_func;
+  }
+
   /// @brief Return a Function* for the fputc libcall
   Function* get_fputc(const Type* FILEptr_type) {
     if (!fputc_func)
@@ -318,6 +335,8 @@
   void reset(Module& mod) {
     M = &mod;
     TD = &getAnalysis<TargetData>();
+    putchar_func = 0;
+    puts_func = 0;
     fputc_func = 0;
     fputs_func = 0;
     fwrite_func = 0;
@@ -335,6 +354,7 @@
 
 private:
   /// Caches for function pointers.
+  Function *putchar_func, *puts_func;
   Function *fputc_func, *fputs_func, *fwrite_func;
   Function *memcpy_func, *memchr_func;
   Function* sqrt_func;
@@ -1264,10 +1284,94 @@
   }
 } PowOptimizer;
 
+/// This LibCallOptimization will simplify calls to the "printf" library
+/// function. It looks for cases where the result of printf is not used and the
+/// operation can be reduced to something simpler.
+/// @brief Simplify the printf library function.
+struct PrintfOptimization : public LibCallOptimization {
+public:
+  /// @brief Default Constructor
+  PrintfOptimization() : LibCallOptimization("printf",
+      "Number of 'printf' calls simplified") {}
+
+  /// @brief Make sure that the "printf" function has the right prototype
+  virtual bool ValidateCalledFunction(const Function* f, SimplifyLibCalls& SLC){
+    // Just make sure this has at least 1 arguments
+    return (f->arg_size() >= 1);
+  }
+
+  /// @brief Perform the printf optimization.
+  virtual bool OptimizeCall(CallInst* ci, SimplifyLibCalls& SLC) {
+    // If the call has more than 2 operands, we can't optimize it
+    if (ci->getNumOperands() > 3 || ci->getNumOperands() <= 2)
+      return false;
+
+    // If the result of the printf call is used, none of these optimizations
+    // can be made.
+    if (!ci->use_empty())
+      return false;
+
+    // All the optimizations depend on the length of the first argument and the
+    // fact that it is a constant string array. Check that now
+    uint64_t len = 0;
+    ConstantArray* CA = 0;
+    if (!getConstantStringLength(ci->getOperand(1), len, &CA))
+      return false;
+
+    if (len != 2 && len != 3)
+      return false;
+
+    // The first character has to be a %
+    if (ConstantInt* CI = dyn_cast<ConstantInt>(CA->getOperand(0)))
+      if (CI->getRawValue() != '%')
+        return false;
+
+    // Get the second character and switch on its value
+    ConstantInt* CI = dyn_cast<ConstantInt>(CA->getOperand(1));
+    switch (CI->getRawValue()) {
+      case 's':
+      {
+        if (len != 3 ||
+            dyn_cast<ConstantInt>(CA->getOperand(2))->getRawValue() != '\n')
+          return false;
+
+        // printf("%s\n",str) -> puts(str)
+        Function* puts_func = SLC.get_puts();
+        if (!puts_func)
+          return false;
+        std::vector<Value*> args;
+        args.push_back(ci->getOperand(2));
+        new CallInst(puts_func,args,ci->getName(),ci);
+        ci->replaceAllUsesWith(ConstantSInt::get(Type::IntTy,len));
+        break;
+      }
+      case 'c':
+      {
+        // printf("%c",c) -> putchar(c)
+        if (len != 2)
+          return false;
+
+        Function* putchar_func = SLC.get_putchar();
+        if (!putchar_func)
+          return false;
+        CastInst* cast = new CastInst(ci->getOperand(2), Type::IntTy,
+                                      CI->getName()+".int", ci);
+        new CallInst(putchar_func, cast, "", ci);
+        ci->replaceAllUsesWith(ConstantSInt::get(Type::IntTy, 1));
+        break;
+      }
+      default:
+        return false;
+    }
+    ci->eraseFromParent();
+    return true;
+  }
+} PrintfOptimizer;
+
 /// This LibCallOptimization will simplify calls to the "fprintf" library
 /// function. It looks for cases where the result of fprintf is not used and the
 /// operation can be reduced to something simpler.
-/// @brief Simplify the pow library function.
+/// @brief Simplify the fprintf library function.
 struct FPrintFOptimization : public LibCallOptimization {
 public:
   /// @brief Default Constructor
@@ -1379,15 +1483,13 @@
       }
       case 'c':
       {
-        ConstantInt* CI = dyn_cast<ConstantInt>(ci->getOperand(3));
-        if (!CI)
-          return false;
-
+        // fprintf(file,"%c",c) -> fputc(c,file)
         const Type* FILEptr_type = ci->getOperand(1)->getType();
         Function* fputc_func = SLC.get_fputc(FILEptr_type);
         if (!fputc_func)
           return false;
-        CastInst* cast = new CastInst(CI,Type::IntTy,CI->getName()+".int",ci);
+        CastInst* cast = new CastInst(ci->getOperand(3), Type::IntTy,
+                                      CI->getName()+".int", ci);
         new CallInst(fputc_func,cast,ci->getOperand(1),"",ci);
         ci->replaceAllUsesWith(ConstantSInt::get(Type::IntTy,1));
         break;
@@ -1403,7 +1505,7 @@
 /// This LibCallOptimization will simplify calls to the "sprintf" library
 /// function. It looks for cases where the result of sprintf is not used and the
 /// operation can be reduced to something simpler.
-/// @brief Simplify the pow library function.
+/// @brief Simplify the sprintf library function.
 struct SPrintFOptimization : public LibCallOptimization {
 public:
   /// @brief Default Constructor
@@ -1530,7 +1632,7 @@
 /// This LibCallOptimization will simplify calls to the "fputs" library
 /// function. It looks for cases where the result of fputs is not used and the
 /// operation can be reduced to something simpler.
-/// @brief Simplify the pow library function.
+/// @brief Simplify the puts library function.
 struct PutsOptimization : public LibCallOptimization {
 public:
   /// @brief Default Constructor





From jlaskey at apple.com  Fri Jun 16 08:14:28 2006
From: jlaskey at apple.com (Jim Laskey)
Date: Fri, 16 Jun 2006 08:14:28 -0500
Subject: [llvm-commits] CVS: llvm/include/llvm/Support/Dwarf.h 
Message-ID: <200606161314.IAA05179@zion.cs.uiuc.edu>



Changes in directory llvm/include/llvm/Support:

Dwarf.h updated: 1.7 -> 1.8
---
Log message:

1. Revise vector debug support.

2. Update docs for vector debug support and new version control.

3. Simplify serialization of DebugDescInfo subclasses.


---
Diffs of the changes:  (+2 -0)

 Dwarf.h |    2 ++
 1 files changed, 2 insertions(+)


Index: llvm/include/llvm/Support/Dwarf.h
diff -u llvm/include/llvm/Support/Dwarf.h:1.7 llvm/include/llvm/Support/Dwarf.h:1.8
--- llvm/include/llvm/Support/Dwarf.h:1.7	Thu Jun 15 15:51:43 2006
+++ llvm/include/llvm/Support/Dwarf.h	Fri Jun 16 08:14:03 2006
@@ -37,6 +37,8 @@
   DW_TAG_arg_variable = 0x101,          // Tag for argument variables.
   DW_TAG_return_variable = 0x102,       // Tag for return variables.
   
+  DW_TAG_vector_type = 0x103,           // Tag for vector types.
+  
   DW_TAG_user_base = 0x1000,            // Recommended base for user tags.
   
   DW_CIE_VERSION = 1,                   // Common frame information version.





From jlaskey at apple.com  Fri Jun 16 08:14:28 2006
From: jlaskey at apple.com (Jim Laskey)
Date: Fri, 16 Jun 2006 08:14:28 -0500
Subject: [llvm-commits] CVS: llvm/docs/SourceLevelDebugging.html 
Message-ID: <200606161314.IAA05180@zion.cs.uiuc.edu>



Changes in directory llvm/docs:

SourceLevelDebugging.html updated: 1.19 -> 1.20
---
Log message:

1. Revise vector debug support.

2. Update docs for vector debug support and new version control.

3. Simplify serialization of DebugDescInfo subclasses.


---
Diffs of the changes:  (+56 -56)

 SourceLevelDebugging.html |  112 +++++++++++++++++++++++-----------------------
 1 files changed, 56 insertions(+), 56 deletions(-)


Index: llvm/docs/SourceLevelDebugging.html
diff -u llvm/docs/SourceLevelDebugging.html:1.19 llvm/docs/SourceLevelDebugging.html:1.20
--- llvm/docs/SourceLevelDebugging.html:1.19	Thu Jun 15 15:51:43 2006
+++ llvm/docs/SourceLevelDebugging.html	Fri Jun 16 08:14:02 2006
@@ -295,13 +295,15 @@
   }
 </pre>
 
-<p>The first field of a descriptor is always an <tt>uint</tt> containing a tag
-value identifying the content of the descriptor. The remaining fields are
-specific to the descriptor.  The values of tags are loosely bound to the tag
-values of Dwarf information entries.  However, that does not restrict the use of
-the information supplied to Dwarf targets.</p>
+<p><a name="LLVMDebugVersion">The first field of a descriptor is always an
+<tt>uint</tt> containing a tag value identifying the content of the descriptor.
+The remaining fields are specific to the descriptor.  The values of tags are
+loosely bound to the tag values of Dwarf information entries.  However, that
+does not restrict the use of the information supplied to Dwarf targets.  To
+facilitate versioning of debug information, the tag is augmented with the
+current debug version (LLVMDebugVersion = 4 << 16 or 0x40000.)</a></p>
 
-<p>The details of the various descriptors follow.</p>
+<p>The details of the various descriptors follow.</p>  
 
 </div>
 
@@ -314,7 +316,7 @@
 
 <pre>
   %<a href="#format_anchors">llvm.dbg.anchor.type</a> = type {
-    uint,   ;; Tag = 0
+    uint,   ;; Tag = 0 + <a href="#LLVMDebugVersion">LLVMDebugVersion</a>
     uint    ;; Tag of descriptors grouped by the anchor
   }
 </pre>
@@ -352,9 +354,8 @@
 
 <pre>
   %<a href="#format_compile_units">llvm.dbg.compile_unit.type</a> = type {
-    uint,   ;; Tag = 17 (DW_TAG_compile_unit)
+    uint,   ;; Tag = 17 + <a href="#LLVMDebugVersion">LLVMDebugVersion</a> (DW_TAG_compile_unit)
     {  }*,  ;; Compile unit anchor = cast = (%<a href="#format_anchors">llvm.dbg.anchor.type</a>* %<a href="#format_compile_units">llvm.dbg.compile_units</a> to {  }*)
-    uint,   ;; LLVM debug version number = 3
     uint,   ;; Dwarf language identifier (ex. DW_LANG_C89) 
     sbyte*, ;; Source file name
     sbyte*, ;; Source file directory (includes trailing slash)
@@ -362,11 +363,11 @@
   }
 </pre>
 
-<p>These descriptors contain the version number for the debug info (currently
-3), a source language ID for the file (we use the Dwarf 3.0 ID numbers, such as
-<tt>DW_LANG_C89</tt>, <tt>DW_LANG_C_plus_plus</tt>, <tt>DW_LANG_Cobol74</tt>,
-etc), three strings describing the filename, working directory of the compiler,
-and an identifier string for the compiler that produced it.</p>
+<p>These descriptors contain a source language ID for the file (we use the Dwarf
+3.0 ID numbers, such as <tt>DW_LANG_C89</tt>, <tt>DW_LANG_C_plus_plus</tt>,
+<tt>DW_LANG_Cobol74</tt>, etc), three strings describing the filename, working
+directory of the compiler, and an identifier string for the compiler that
+produced it.</p>
 
 <p> Compile unit descriptors provide the root context for objects declared in a
 specific source file.  Global variables and top level functions would be defined
@@ -384,7 +385,7 @@
 
 <pre>
   %<a href="#format_global_variables">llvm.dbg.global_variable.type</a> = type {
-    uint,   ;; Tag = 52 (DW_TAG_variable)
+    uint,   ;; Tag = 52 + <a href="#LLVMDebugVersion">LLVMDebugVersion</a> (DW_TAG_variable)
     {  }*,  ;; Global variable anchor = cast (%<a href="#format_anchors">llvm.dbg.anchor.type</a>* %<a href="#format_global_variables">llvm.dbg.global_variables</a> to {  }*),  
     {  }*,  ;; Reference to context descriptor
     sbyte*, ;; Name
@@ -411,7 +412,7 @@
 
 <pre>
   %<a href="#format_subprograms">llvm.dbg.subprogram.type</a> = type {
-    uint,   ;; Tag = 46 (DW_TAG_subprogram)
+    uint,   ;; Tag = 46 + <a href="#LLVMDebugVersion">LLVMDebugVersion</a> (DW_TAG_subprogram)
     {  }*,  ;; Subprogram anchor = cast (%<a href="#format_anchors">llvm.dbg.anchor.type</a>* %<a href="#format_subprograms">llvm.dbg.subprograms</a> to {  }*),  
     {  }*,  ;; Reference to context descriptor
     sbyte*, ;; Name
@@ -437,7 +438,7 @@
 
 <pre>
   %<a href="#format_blocks">llvm.dbg.block</a> = type {
-    uint,   ;; Tag = 13 (DW_TAG_lexical_block)
+    uint,   ;; Tag = 13 + <a href="#LLVMDebugVersion">LLVMDebugVersion</a> (DW_TAG_lexical_block)
     {  }*   ;; Reference to context descriptor
   }
 </pre>
@@ -457,7 +458,7 @@
 
 <pre>
   %<a href="#format_basic_type">llvm.dbg.basictype.type</a> = type {
-    uint,   ;; Tag = 36 (DW_TAG_base_type)
+    uint,   ;; Tag = 36 + <a href="#LLVMDebugVersion">LLVMDebugVersion</a> (DW_TAG_base_type)
     {  }*,  ;; Reference to context (typically a compile unit)
     sbyte*, ;; Name (may be "" for anonymous types)
     {  }*,  ;; Reference to compile unit where defined (may be NULL)
@@ -575,7 +576,6 @@
     uint,   ;; Size in bits
     uint,   ;; Alignment in bits
     uint,   ;; Offset in bits
-    bool,   ;; Is vector flag
     {  }*   ;; Reference to array of member descriptors
   }
 </pre>
@@ -589,13 +589,15 @@
   DW_TAG_enumeration_type = 4
   DW_TAG_structure_type = 19
   DW_TAG_union_type = 23
+  DW_TAG_vector_type = 259
 </pre>
 
 <p>The vector flag indicates that an array type is a native packed vector.</p>
 
-<p>The members of array types (tag = <tt>DW_TAG_array_type</tt>) are <a
-href="#format_subrange">subrange descriptors</a>, each representing the range of
-subscripts at that level of indexing.</p>
+<p>The members of array types (tag = <tt>DW_TAG_array_type</tt>) or vector types
+(tag = <tt>DW_TAG_vector_type</tt>) are <a href="#format_subrange">subrange
+descriptors</a>, each representing the range of subscripts at that level of
+indexing.</p>
 
 <p>The members of enumeration types (tag = <tt>DW_TAG_enumeration_type</tt>) are
 <a href="#format_enumeration">enumerator descriptors</a>, each representing the
@@ -627,7 +629,7 @@
 
 <pre>
   %<a href="#format_subrange">llvm.dbg.subrange.type</a> = type {
-    uint,   ;; Tag = 33 (DW_TAG_subrange_type)
+    uint,   ;; Tag = 33 + <a href="#LLVMDebugVersion">LLVMDebugVersion</a> (DW_TAG_subrange_type)
     uint,   ;; Low value
     uint    ;; High value
   }
@@ -650,7 +652,7 @@
 
 <pre>
   %<a href="#format_enumeration">llvm.dbg.enumerator.type</a> = type {
-    uint,   ;; Tag = 40 (DW_TAG_enumerator)
+    uint,   ;; Tag = 40 + <a href="#LLVMDebugVersion">LLVMDebugVersion</a> (DW_TAG_enumerator)
     sbyte*, ;; Name
     uint    ;; Value
   }
@@ -1042,7 +1044,7 @@
 ;; Define the compile unit for the source file "/Users/mine/sources/MySource.cpp".
 ;;
 %<a href="#format_compile_units">llvm.dbg.compile_unit1</a> = internal constant %<a href="#format_compile_units">llvm.dbg.compile_unit.type</a> {
-    uint 17, 
+    uint add(uint 17, uint 262144), 
     {  }* cast (%<a href="#format_anchors">llvm.dbg.anchor.type</a>* %<a href="#format_compile_units">llvm.dbg.compile_units</a> to {  }*), 
     uint 1, 
     uint 1, 
@@ -1054,7 +1056,7 @@
 ;; Define the compile unit for the header file "/Users/mine/sources/MyHeader.h".
 ;;
 %<a href="#format_compile_units">llvm.dbg.compile_unit2</a> = internal constant %<a href="#format_compile_units">llvm.dbg.compile_unit.type</a> {
-    uint 17, 
+    uint add(uint 17, uint 262144), 
     {  }* cast (%<a href="#format_anchors">llvm.dbg.anchor.type</a>* %<a href="#format_compile_units">llvm.dbg.compile_units</a> to {  }*), 
     uint 1, 
     uint 1, 
@@ -1117,7 +1119,7 @@
 ;; variable anchor and the global variable itself.
 ;;
 %<a href="#format_global_variables">llvm.dbg.global_variable</a> = internal constant %<a href="#format_global_variables">llvm.dbg.global_variable.type</a> {
-    uint 52, 
+    uint add(uint 52, uint 262144), 
     {  }* cast (%<a href="#format_anchors">llvm.dbg.anchor.type</a>* %<a href="#format_global_variables">llvm.dbg.global_variables</a> to {  }*), 
     {  }* cast (%<a href="#format_compile_units">llvm.dbg.compile_unit.type</a>* %<a href="#format_compile_units">llvm.dbg.compile_unit</a> to {  }*), 
     sbyte* getelementptr ([9 x sbyte]* %str1, int 0, int 0), 
@@ -1133,7 +1135,7 @@
 ;; intrinsic type the source file is NULL and line 0.
 ;;    
 %<a href="#format_basic_type">llvm.dbg.basictype</a> = internal constant %<a href="#format_basic_type">llvm.dbg.basictype.type</a> {
-    uint 36, 
+    uint add(uint 36, uint 262144), 
     {  }* cast (%<a href="#format_compile_units">llvm.dbg.compile_unit.type</a>* %<a href="#format_compile_units">llvm.dbg.compile_unit</a> to {  }*), 
     sbyte* getelementptr ([4 x sbyte]* %str2, int 0, int 0), 
     {  }* null, 
@@ -1190,7 +1192,7 @@
 ;; Define the descriptor for the subprogram.  TODO - more details.
 ;;
 %<a href="#format_subprograms">llvm.dbg.subprogram</a> = internal constant %<a href="#format_subprograms">llvm.dbg.subprogram.type</a> {
-    uint 46, 
+    uint add(uint 46, uint 262144), 
     {  }* cast (%<a href="#format_anchors">llvm.dbg.anchor.type</a>* %<a href="#format_subprograms">llvm.dbg.subprograms</a> to {  }*), 
     {  }* cast (%<a href="#format_compile_units">llvm.dbg.compile_unit.type</a>* %<a href="#format_compile_units">llvm.dbg.compile_unit</a> to {  }*), 
     sbyte* getelementptr ([5 x sbyte]* %str1, int 0, int 0), 
@@ -1235,7 +1237,7 @@
 
 <pre>
 %<a href="#format_basic_type">llvm.dbg.basictype</a> = internal constant %<a href="#format_basic_type">llvm.dbg.basictype.type</a> {
-    uint 36, 
+    uint add(uint 36, uint 262144), 
     {  }* cast (%<a href="#format_compile_units">llvm.dbg.compile_unit.type</a>* %<a href="#format_compile_units">llvm.dbg.compile_unit</a> to {  }*), 
     sbyte* getelementptr ([5 x sbyte]* %str1, int 0, int 0), 
     {  }* null, 
@@ -1258,7 +1260,7 @@
 
 <pre>
 %<a href="#format_basic_type">llvm.dbg.basictype</a> = internal constant %<a href="#format_basic_type">llvm.dbg.basictype.type</a> {
-    uint 36, 
+    uint add(uint 36, uint 262144), 
     {  }* cast (%<a href="#format_compile_units">llvm.dbg.compile_unit.type</a>* %<a href="#format_compile_units">llvm.dbg.compile_unit</a> to {  }*), 
     sbyte* getelementptr ([5 x sbyte]* %str1, int 0, int 0), 
     {  }* null, 
@@ -1281,7 +1283,7 @@
 
 <pre>
 %<a href="#format_basic_type">llvm.dbg.basictype</a> = internal constant %<a href="#format_basic_type">llvm.dbg.basictype.type</a> {
-    uint 36, 
+    uint add(uint 36, uint 262144), 
     {  }* cast (%<a href="#format_compile_units">llvm.dbg.compile_unit.type</a>* %<a href="#format_compile_units">llvm.dbg.compile_unit</a> to {  }*), 
     sbyte* getelementptr ([14 x sbyte]* %str1, int 0, int 0), 
     {  }* null, 
@@ -1304,7 +1306,7 @@
 
 <pre>
 %<a href="#format_basic_type">llvm.dbg.basictype</a> = internal constant %<a href="#format_basic_type">llvm.dbg.basictype.type</a> {
-    uint 36, 
+    uint add(uint 36, uint 262144), 
     {  }* cast (%<a href="#format_compile_units">llvm.dbg.compile_unit.type</a>* %<a href="#format_compile_units">llvm.dbg.compile_unit</a> to {  }*), 
     sbyte* getelementptr ([10 x sbyte]* %str1, int 0, int 0), 
     {  }* null, 
@@ -1327,7 +1329,7 @@
 
 <pre>
 %<a href="#format_basic_type">llvm.dbg.basictype</a> = internal constant %<a href="#format_basic_type">llvm.dbg.basictype.type</a> {
-    uint 36, 
+    uint add(uint 36, uint 262144), 
     {  }* cast (%<a href="#format_compile_units">llvm.dbg.compile_unit.type</a>* %<a href="#format_compile_units">llvm.dbg.compile_unit</a> to {  }*), 
     sbyte* getelementptr ([19 x sbyte]* %str1, int 0, int 0), 
     {  }* null, 
@@ -1350,7 +1352,7 @@
 
 <pre>
 %<a href="#format_basic_type">llvm.dbg.basictype</a> = internal constant %<a href="#format_basic_type">llvm.dbg.basictype.type</a> {
-    uint 36, 
+    uint add(uint 36, uint 262144), 
     {  }* cast (%<a href="#format_compile_units">llvm.dbg.compile_unit.type</a>* %<a href="#format_compile_units">llvm.dbg.compile_unit</a> to {  }*), 
     sbyte* getelementptr ([4 x sbyte]* %str1, int 0, int 0), 
     {  }* null, 
@@ -1373,7 +1375,7 @@
 
 <pre>
 %<a href="#format_basic_type">llvm.dbg.basictype</a> = internal constant %<a href="#format_basic_type">llvm.dbg.basictype.type</a> {
-    uint 36, 
+    uint add(uint 36, uint 262144), 
     {  }* cast (%<a href="#format_compile_units">llvm.dbg.compile_unit.type</a>* %<a href="#format_compile_units">llvm.dbg.compile_unit</a> to {  }*), 
     sbyte* getelementptr ([13 x sbyte]* %str1, int 0, int 0), 
     {  }* null, 
@@ -1396,7 +1398,7 @@
 
 <pre>
 %<a href="#format_basic_type">llvm.dbg.basictype</a> = internal constant %<a href="#format_basic_type">llvm.dbg.basictype.type</a> {
-    uint 36, 
+    uint add(uint 36, uint 262144), 
     {  }* cast (%<a href="#format_compile_units">llvm.dbg.compile_unit.type</a>* %<a href="#format_compile_units">llvm.dbg.compile_unit</a> to {  }*), 
     sbyte* getelementptr ([14 x sbyte]* %str1, int 0, int 0), 
     {  }* null, 
@@ -1419,7 +1421,7 @@
 
 <pre>
 %<a href="#format_basic_type">llvm.dbg.basictype</a> = internal constant %<a href="#format_basic_type">llvm.dbg.basictype.type</a> {
-    uint 36, 
+    uint add(uint 36, uint 262144), 
     {  }* cast (%<a href="#format_compile_units">llvm.dbg.compile_unit.type</a>* %<a href="#format_compile_units">llvm.dbg.compile_unit</a> to {  }*), 
     sbyte* getelementptr ([23 x sbyte]* %str1, int 0, int 0), 
     {  }* null, 
@@ -1442,7 +1444,7 @@
 
 <pre>
 %<a href="#format_basic_type">llvm.dbg.basictype</a> = internal constant %<a href="#format_basic_type">llvm.dbg.basictype.type</a> {
-    uint 36, 
+    uint add(uint 36, uint 262144), 
     {  }* cast (%<a href="#format_compile_units">llvm.dbg.compile_unit.type</a>* %<a href="#format_compile_units">llvm.dbg.compile_unit</a> to {  }*), 
     sbyte* getelementptr ([6 x sbyte]* %str1, int 0, int 0), 
     {  }* null, 
@@ -1465,7 +1467,7 @@
 
 <pre>
 %<a href="#format_basic_type">llvm.dbg.basictype</a> = internal constant %<a href="#format_basic_type">llvm.dbg.basictype.type</a> {
-    uint 36, 
+    uint add(uint 36, uint 262144), 
     {  }* cast (%<a href="#format_compile_units">llvm.dbg.compile_unit.type</a>* %<a href="#format_compile_units">llvm.dbg.compile_unit</a> to {  }*), 
     sbyte* getelementptr ([7 x sbyte]* %str1, int 0, int 0), 
     {  }* null, 
@@ -1499,7 +1501,7 @@
 ;; Define the typedef "IntPtr".
 ;;
 %<a href="#format_derived_type">llvm.dbg.derivedtype1</a> = internal constant %<a href="#format_derived_type">llvm.dbg.derivedtype.type</a> {
-    uint 22, 
+    uint add(uint 22, uint 262144), 
     {  }* cast (%<a href="#format_compile_units">llvm.dbg.compile_unit.type</a>* %<a href="#format_compile_units">llvm.dbg.compile_unit</a> to {  }*), 
     sbyte* getelementptr ([7 x sbyte]* %str1, int 0, int 0), 
     {  }* cast (%<a href="#format_compile_units">llvm.dbg.compile_unit.type</a>* %<a href="#format_compile_units">llvm.dbg.compile_unit</a> to {  }*), 
@@ -1514,7 +1516,7 @@
 ;; Define the pointer type.
 ;;
 %<a href="#format_derived_type">llvm.dbg.derivedtype2</a> = internal constant %<a href="#format_derived_type">llvm.dbg.derivedtype.type</a> {
-    uint 15, 
+    uint add(uint 15, uint 262144), 
     {  }* cast (%<a href="#format_compile_units">llvm.dbg.compile_unit.type</a>* %<a href="#format_compile_units">llvm.dbg.compile_unit</a> to {  }*), 
     sbyte* null, 
     {  }* null, 
@@ -1528,7 +1530,7 @@
 ;; Define the const type.
 ;;
 %<a href="#format_derived_type">llvm.dbg.derivedtype3</a> = internal constant %<a href="#format_derived_type">llvm.dbg.derivedtype.type</a> {
-    uint 38, 
+    uint add(uint 38, uint 262144), 
     {  }* cast (%<a href="#format_compile_units">llvm.dbg.compile_unit.type</a>* %<a href="#format_compile_units">llvm.dbg.compile_unit</a> to {  }*), 
     sbyte* null, 
     {  }* null, 
@@ -1542,7 +1544,7 @@
 ;; Define the int type.
 ;;
 %<a href="#format_basic_type">llvm.dbg.basictype1</a> = internal constant %<a href="#format_basic_type">llvm.dbg.basictype.type</a> {
-    uint 36, 
+    uint add(uint 36, uint 262144), 
     {  }* cast (%<a href="#format_compile_units">llvm.dbg.compile_unit.type</a>* %<a href="#format_compile_units">llvm.dbg.compile_unit</a> to {  }*), 
     sbyte* getelementptr ([4 x sbyte]* %str2, int 0, int 0), 
     {  }* null, 
@@ -1580,7 +1582,7 @@
 ;; Define basic type for unsigned int.
 ;;
 %<a href="#format_basic_type">llvm.dbg.basictype</a> = internal constant %<a href="#format_basic_type">llvm.dbg.basictype.type</a> {
-    uint 36, 
+    uint add(uint 36, uint 262144), 
     {  }* cast (%<a href="#format_compile_units">llvm.dbg.compile_unit.type</a>* %<a href="#format_compile_units">llvm.dbg.compile_unit</a> to {  }*), 
     sbyte* getelementptr ([13 x sbyte]* %str1, int 0, int 0), 
     {  }* null, 
@@ -1595,7 +1597,7 @@
 ;; Define composite type for struct Color.
 ;;
 %<a href="#format_composite_type">llvm.dbg.compositetype</a> = internal constant %<a href="#format_composite_type">llvm.dbg.compositetype.type</a> {
-    uint 19, 
+    uint add(uint 19, uint 262144), 
     {  }* cast (%<a href="#format_compile_units">llvm.dbg.compile_unit.type</a>* %<a href="#format_compile_units">llvm.dbg.compile_unit</a> to {  }*), 
     sbyte* getelementptr ([6 x sbyte]* %str2, int 0, int 0), 
     {  }* cast (%<a href="#format_compile_units">llvm.dbg.compile_unit.type</a>* %<a href="#format_compile_units">llvm.dbg.compile_unit</a> to {  }*), 
@@ -1604,7 +1606,6 @@
     uint 32, 
     uint 0, 
     {  }* null,
-    bool false,
     {  }* cast ([3 x {  }*]* %llvm.dbg.array to {  }*) }, section "llvm.metadata"
 %str2 = internal constant [6 x sbyte] c"Color\00", section "llvm.metadata"
 
@@ -1612,7 +1613,7 @@
 ;; Define the Red field.
 ;;
 %<a href="#format_derived_type">llvm.dbg.derivedtype1</a> = internal constant %<a href="#format_derived_type">llvm.dbg.derivedtype.type</a> {
-    uint 13, 
+    uint add(uint 13, uint 262144), 
     {  }* null, 
     sbyte* getelementptr ([4 x sbyte]* %str3, int 0, int 0), 
     {  }* cast (%<a href="#format_compile_units">llvm.dbg.compile_unit.type</a>* %<a href="#format_compile_units">llvm.dbg.compile_unit</a> to {  }*), 
@@ -1627,7 +1628,7 @@
 ;; Define the Green field.
 ;;
 %<a href="#format_derived_type">llvm.dbg.derivedtype2</a> = internal constant %<a href="#format_derived_type">llvm.dbg.derivedtype.type</a> {
-    uint 13, 
+    uint add(uint 13, uint 262144), 
     {  }* null, 
     sbyte* getelementptr ([6 x sbyte]* %str4, int 0, int 0), 
     {  }* cast (%<a href="#format_compile_units">llvm.dbg.compile_unit.type</a>* %<a href="#format_compile_units">llvm.dbg.compile_unit</a> to {  }*), 
@@ -1642,7 +1643,7 @@
 ;; Define the Blue field.
 ;;
 %<a href="#format_derived_type">llvm.dbg.derivedtype3</a> = internal constant %<a href="#format_derived_type">llvm.dbg.derivedtype.type</a> {
-    uint 13, 
+    uint add(uint 13, uint 262144), 
     {  }* null, 
     sbyte* getelementptr ([5 x sbyte]* %str5, int 0, int 0), 
     {  }* cast (%<a href="#format_compile_units">llvm.dbg.compile_unit.type</a>* %<a href="#format_compile_units">llvm.dbg.compile_unit</a> to {  }*), 
@@ -1688,7 +1689,7 @@
 ;; Define composite type for enum Trees
 ;;
 %<a href="#format_composite_type">llvm.dbg.compositetype</a> = internal constant %<a href="#format_composite_type">llvm.dbg.compositetype.type</a> {
-    uint 4, 
+    uint add(uint 4, uint 262144), 
     {  }* cast (%<a href="#format_compile_units">llvm.dbg.compile_unit.type</a>* %<a href="#format_compile_units">llvm.dbg.compile_unit</a> to {  }*), 
     sbyte* getelementptr ([6 x sbyte]* %str1, int 0, int 0), 
     {  }* cast (%<a href="#format_compile_units">llvm.dbg.compile_unit.type</a>* %<a href="#format_compile_units">llvm.dbg.compile_unit</a> to {  }*), 
@@ -1697,7 +1698,6 @@
     uint 32, 
     uint 0, 
     {  }* null, 
-    bool false,
     {  }* cast ([3 x {  }*]* %llvm.dbg.array to {  }*) }, section "llvm.metadata"
 %str1 = internal constant [6 x sbyte] c"Trees\00", section "llvm.metadata"
 
@@ -1705,7 +1705,7 @@
 ;; Define Spruce enumerator.
 ;;
 %<a href="#format_enumeration">llvm.dbg.enumerator1</a> = internal constant %<a href="#format_enumeration">llvm.dbg.enumerator.type</a> {
-    uint 40, 
+    uint add(uint 40, uint 262144), 
     sbyte* getelementptr ([7 x sbyte]* %str2, int 0, int 0), 
     int 100 }, section "llvm.metadata"
 %str2 = internal constant [7 x sbyte] c"Spruce\00", section "llvm.metadata"
@@ -1714,7 +1714,7 @@
 ;; Define Oak enumerator.
 ;;
 %<a href="#format_enumeration">llvm.dbg.enumerator2</a> = internal constant %<a href="#format_enumeration">llvm.dbg.enumerator.type</a> {
-    uint 40, 
+    uint add(uint 40, uint 262144), 
     sbyte* getelementptr ([4 x sbyte]* %str3, int 0, int 0), 
     int 200 }, section "llvm.metadata"
 %str3 = internal constant [4 x sbyte] c"Oak\00", section "llvm.metadata"
@@ -1723,7 +1723,7 @@
 ;; Define Maple enumerator.
 ;;
 %<a href="#format_enumeration">llvm.dbg.enumerator3</a> = internal constant %<a href="#format_enumeration">llvm.dbg.enumerator.type</a> {
-    uint 40, 
+    uint add(uint 40, uint 262144), 
     sbyte* getelementptr ([6 x sbyte]* %str4, int 0, int 0), 
     int 300 }, section "llvm.metadata"
 %str4 = internal constant [6 x sbyte] c"Maple\00", section "llvm.metadata"
@@ -1750,7 +1750,7 @@
 
   <a href="mailto:sabre at nondot.org">Chris Lattner</a><br>
   <a href="http://llvm.org">LLVM Compiler Infrastructure</a><br>
-  Last modified: $Date: 2006/06/15 20:51:43 $
+  Last modified: $Date: 2006/06/16 13:14:02 $
 </address>
 
 </body>





From jlaskey at apple.com  Fri Jun 16 08:14:28 2006
From: jlaskey at apple.com (Jim Laskey)
Date: Fri, 16 Jun 2006 08:14:28 -0500
Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineDebugInfo.h 
Message-ID: <200606161314.IAA05178@zion.cs.uiuc.edu>



Changes in directory llvm/include/llvm/CodeGen:

MachineDebugInfo.h updated: 1.35 -> 1.36
---
Log message:

1. Revise vector debug support.

2. Update docs for vector debug support and new version control.

3. Simplify serialization of DebugDescInfo subclasses.


---
Diffs of the changes:  (+51 -34)

 MachineDebugInfo.h |   85 +++++++++++++++++++++++++++++++----------------------
 1 files changed, 51 insertions(+), 34 deletions(-)


Index: llvm/include/llvm/CodeGen/MachineDebugInfo.h
diff -u llvm/include/llvm/CodeGen/MachineDebugInfo.h:1.35 llvm/include/llvm/CodeGen/MachineDebugInfo.h:1.36
--- llvm/include/llvm/CodeGen/MachineDebugInfo.h:1.35	Thu Jun 15 15:51:43 2006
+++ llvm/include/llvm/CodeGen/MachineDebugInfo.h	Fri Jun 16 08:14:03 2006
@@ -57,7 +57,8 @@
 // Debug info constants.
 
 enum {
-  LLVMDebugVersion = 4                  // Current version of debug information.
+  LLVMDebugVersion = (4 << 16),         // Current version of debug information.
+  LLVMDebugVersionMask = 0xffff0000     // Mask for version number.
 };
 
 //===----------------------------------------------------------------------===//
@@ -90,25 +91,20 @@
 ///
 class DebugInfoDesc {
 private:
-  enum {
-    tag_mask = 0x0000ffff,
-    version_shift = 16
-  };
-
-
   unsigned Tag;                         // Content indicator.  Dwarf values are
                                         // used but that does not limit use to
                                         // Dwarf writers.
   
 protected:
-  DebugInfoDesc(unsigned T) : Tag(T | (LLVMDebugVersion << version_shift)) {}
+  DebugInfoDesc(unsigned T) : Tag(T | LLVMDebugVersion) {}
   
 public:
   virtual ~DebugInfoDesc() {}
 
   // Accessors
-  unsigned getTag()          const { return Tag & tag_mask; }
-  unsigned getVersion()      const { return Tag >> version_shift; }
+  unsigned getTag()          const { return Tag & ~LLVMDebugVersionMask; }
+  unsigned getVersion()      const { return Tag &  LLVMDebugVersionMask; }
+  void setTag(unsigned T)          { Tag = T | LLVMDebugVersion; }
   
   /// TagFromGlobal - Returns the tag number from a debug info descriptor
   /// GlobalVariable.   Return DIIValid if operand is not an unsigned int. 
@@ -199,7 +195,7 @@
 /// descriptors.
 class AnchoredDesc : public DebugInfoDesc {
 private:  
-  AnchorDesc *Anchor;                   // Anchor for all descriptors of the
+  DebugInfoDesc *Anchor;                // Anchor for all descriptors of the
                                         // same type.
 
 protected:
@@ -208,8 +204,8 @@
 
 public:  
   // Accessors.
-  AnchorDesc *getAnchor() const { return Anchor; }
-  void setAnchor(AnchorDesc *A) { Anchor = A; }
+  AnchorDesc *getAnchor() const { return static_cast<AnchorDesc *>(Anchor); }
+  void setAnchor(AnchorDesc *A) { Anchor = static_cast<DebugInfoDesc *>(A); }
 
   //===--------------------------------------------------------------------===//
   // Subclasses should supply the following virtual methods.
@@ -282,7 +278,7 @@
 private:
   DebugInfoDesc *Context;               // Context debug descriptor.
   std::string Name;                     // Type name (may be empty.)
-  CompileUnitDesc *File;                // Defined compile unit (may be NULL.)
+  DebugInfoDesc *File;                  // Defined compile unit (may be NULL.)
   unsigned Line;                        // Defined line# (may be zero.)
   uint64_t Size;                        // Type bit size (may be zero.)
   uint64_t Align;                       // Type bit alignment (may be zero.)
@@ -294,14 +290,18 @@
   // Accessors
   DebugInfoDesc *getContext()                const { return Context; }
   const std::string &getName()               const { return Name; }
-  CompileUnitDesc *getFile()                 const { return File; }
+  CompileUnitDesc *getFile() const {
+    return static_cast<CompileUnitDesc *>(File);
+  }
   unsigned getLine()                         const { return Line; }
   uint64_t getSize()                         const { return Size; }
   uint64_t getAlign()                        const { return Align; }
   uint64_t getOffset()                       const { return Offset; }
   void setContext(DebugInfoDesc *C)                { Context = C; }
   void setName(const std::string &N)               { Name = N; }
-  void setFile(CompileUnitDesc *U)                 { File = U; }
+  void setFile(CompileUnitDesc *U) {
+    File = static_cast<DebugInfoDesc *>(U);
+  }
   void setLine(unsigned L)                         { Line = L; }
   void setSize(uint64_t S)                         { Size = S; }
   void setAlign(uint64_t A)                        { Align = A; }
@@ -365,14 +365,18 @@
 /// derived types (eg., typedef, pointer, reference.)
 class DerivedTypeDesc : public TypeDesc {
 private:
-  TypeDesc *FromType;                   // Type derived from.
+  DebugInfoDesc *FromType;              // Type derived from.
 
 public:
   DerivedTypeDesc(unsigned T);
   
   // Accessors
-  TypeDesc *getFromType()                    const { return FromType; }
-  void setFromType(TypeDesc *F)                    { FromType = F; }
+  TypeDesc *getFromType() const {
+    return static_cast<TypeDesc *>(FromType);
+  }
+  void setFromType(TypeDesc *F) {
+    FromType = static_cast<DebugInfoDesc *>(F);
+  }
 
   // Implement isa/cast/dyncast.
   static bool classof(const DerivedTypeDesc *) { return true; }
@@ -400,16 +404,13 @@
 /// array/struct types (eg., arrays, struct, union, enums.)
 class CompositeTypeDesc : public DerivedTypeDesc {
 private:
-  bool IsVector;                        // packed/vector array
   std::vector<DebugInfoDesc *> Elements;// Information used to compose type.
 
 public:
   CompositeTypeDesc(unsigned T);
   
   // Accessors
-  bool isVector() const { return IsVector; }
   std::vector<DebugInfoDesc *> &getElements() { return Elements; }
-  void setIsVector() { IsVector = true; }
 
   // Implement isa/cast/dyncast.
   static bool classof(const CompositeTypeDesc *) { return true; }
@@ -516,9 +517,9 @@
 private:
   DebugInfoDesc *Context;               // Context debug descriptor.
   std::string Name;                     // Type name (may be empty.)
-  CompileUnitDesc *File;                // Defined compile unit (may be NULL.)
+  DebugInfoDesc *File;                  // Defined compile unit (may be NULL.)
   unsigned Line;                        // Defined line# (may be zero.)
-  TypeDesc *TyDesc;                     // Type of variable.
+  DebugInfoDesc *TyDesc;                // Type of variable.
 
 public:
   VariableDesc(unsigned T);
@@ -526,14 +527,22 @@
   // Accessors
   DebugInfoDesc *getContext()                const { return Context; }
   const std::string &getName()               const { return Name; }
-  CompileUnitDesc *getFile()                 const { return File; }
+  CompileUnitDesc *getFile() const {
+    return static_cast<CompileUnitDesc *>(File);
+  }
   unsigned getLine()                         const { return Line; }
-  TypeDesc *getType()                        const { return TyDesc; }
+  TypeDesc *getType() const {
+    return static_cast<TypeDesc *>(TyDesc);
+  }
   void setContext(DebugInfoDesc *C)                { Context = C; }
   void setName(const std::string &N)               { Name = N; }
-  void setFile(CompileUnitDesc *U)                 { File = U; }
+  void setFile(CompileUnitDesc *U) {
+    File = static_cast<DebugInfoDesc *>(U);
+  }
   void setLine(unsigned L)                         { Line = L; }
-  void setType(TypeDesc *T)                        { TyDesc = T; }
+  void setType(TypeDesc *T) {
+    TyDesc = static_cast<DebugInfoDesc *>(T);
+  }
   
   // Implement isa/cast/dyncast.
   static bool classof(const VariableDesc *) { return true; }
@@ -563,9 +572,9 @@
 private:
   DebugInfoDesc *Context;               // Context debug descriptor.
   std::string Name;                     // Global name.
-  CompileUnitDesc *File;                // Defined compile unit (may be NULL.)
+  DebugInfoDesc *File;                  // Defined compile unit (may be NULL.)
   unsigned Line;                        // Defined line# (may be zero.)
-  TypeDesc *TyDesc;                     // Type debug descriptor.
+  DebugInfoDesc *TyDesc;                // Type debug descriptor.
   bool IsStatic;                        // Is the global a static.
   bool IsDefinition;                    // Is the global defined in context.
   
@@ -576,16 +585,24 @@
   // Accessors
   DebugInfoDesc *getContext()                const { return Context; }
   const std::string &getName()               const { return Name; }
-  CompileUnitDesc *getFile()                 const { return File; }
+  CompileUnitDesc *getFile() const {
+    return static_cast<CompileUnitDesc *>(File);
+  }
   unsigned getLine()                         const { return Line; }
-  TypeDesc *getType()                        const { return TyDesc; }
+  TypeDesc *getType() const {
+    return static_cast<TypeDesc *>(TyDesc);
+  }
   bool isStatic()                            const { return IsStatic; }
   bool isDefinition()                        const { return IsDefinition; }
   void setContext(DebugInfoDesc *C)                { Context = C; }
   void setName(const std::string &N)               { Name = N; }
-  void setFile(CompileUnitDesc *U)                 { File = U; }
+  void setFile(CompileUnitDesc *U) {
+    File = static_cast<DebugInfoDesc *>(U);
+  }
   void setLine(unsigned L)                         { Line = L; }
-  void setType(TypeDesc *T)                        { TyDesc = T; }
+  void setType(TypeDesc *T) {
+    TyDesc = static_cast<DebugInfoDesc *>(T);
+  }
   void setIsStatic(bool IS)                        { IsStatic = IS; }
   void setIsDefinition(bool ID)                    { IsDefinition = ID; }
 





From jlaskey at apple.com  Fri Jun 16 08:14:28 2006
From: jlaskey at apple.com (Jim Laskey)
Date: Fri, 16 Jun 2006 08:14:28 -0500
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/DwarfWriter.cpp
	MachineDebugInfo.cpp 
Message-ID: <200606161314.IAA05182@zion.cs.uiuc.edu>



Changes in directory llvm/lib/CodeGen:

DwarfWriter.cpp updated: 1.62 -> 1.63
MachineDebugInfo.cpp updated: 1.41 -> 1.42
---
Log message:

1. Revise vector debug support.

2. Update docs for vector debug support and new version control.

3. Simplify serialization of DebugDescInfo subclasses.


---
Diffs of the changes:  (+24 -35)

 DwarfWriter.cpp      |   16 +++++++++-------
 MachineDebugInfo.cpp |   43 +++++++++++++++----------------------------
 2 files changed, 24 insertions(+), 35 deletions(-)


Index: llvm/lib/CodeGen/DwarfWriter.cpp
diff -u llvm/lib/CodeGen/DwarfWriter.cpp:1.62 llvm/lib/CodeGen/DwarfWriter.cpp:1.63
--- llvm/lib/CodeGen/DwarfWriter.cpp:1.62	Thu Jun 15 15:51:43 2006
+++ llvm/lib/CodeGen/DwarfWriter.cpp	Fri Jun 16 08:14:03 2006
@@ -1276,11 +1276,18 @@
                      NewType(Context, FromTy, Unit));
     }
   } else if (CompositeTypeDesc *CompTy = dyn_cast<CompositeTypeDesc>(TyDesc)) {
+    // Fetch tag
+    unsigned Tag = CompTy->getTag();
+    
     // Create specific DIE.
-    Slot = Ty = new DIE(CompTy->getTag());
+    Slot = Ty = Tag == DW_TAG_vector_type ? new DIE(DW_TAG_array_type) :
+                                            new DIE(Tag);
+    
     std::vector<DebugInfoDesc *> &Elements = CompTy->getElements();
     
-    switch (CompTy->getTag()) {
+    switch (Tag) {
+    case DW_TAG_vector_type: Ty->AddUInt(DW_AT_GNU_vector, DW_FORM_flag, 1);
+      // Fall thru
     case DW_TAG_array_type: {
       // Add element type.
       if (TypeDesc *FromTy = CompTy->getFromType()) {
@@ -1288,11 +1295,6 @@
                        NewType(Context, FromTy, Unit));
       }
       
-      // check for vector type
-      if (CompTy->isVector()) {
-        Ty->AddUInt(DW_AT_GNU_vector, DW_FORM_flag, 1);
-      }
-      
       // Don't emit size attribute.
       Size = 0;
       


Index: llvm/lib/CodeGen/MachineDebugInfo.cpp
diff -u llvm/lib/CodeGen/MachineDebugInfo.cpp:1.41 llvm/lib/CodeGen/MachineDebugInfo.cpp:1.42
--- llvm/lib/CodeGen/MachineDebugInfo.cpp:1.41	Thu Jun 15 15:51:43 2006
+++ llvm/lib/CodeGen/MachineDebugInfo.cpp	Fri Jun 16 08:14:03 2006
@@ -459,7 +459,8 @@
 /// GlobalVariable.   Return DIIValid if operand is not an unsigned int. 
 unsigned DebugInfoDesc::TagFromGlobal(GlobalVariable *GV) {
   ConstantUInt *C = getUIntOperand(GV, 0);
-  return C ? ((unsigned)C->getValue() & tag_mask) : (unsigned)DW_TAG_invalid;
+  return C ? ((unsigned)C->getValue() & ~LLVMDebugVersionMask) :
+             (unsigned)DW_TAG_invalid;
 }
 
 /// VersionFromGlobal - Returns the version number from a debug info
@@ -467,7 +468,7 @@
 /// int.
 unsigned  DebugInfoDesc::VersionFromGlobal(GlobalVariable *GV) {
   ConstantUInt *C = getUIntOperand(GV, 0);
-  return C ? ((unsigned)C->getValue() >> version_shift) :
+  return C ? ((unsigned)C->getValue() & LLVMDebugVersionMask) :
              (unsigned)DW_TAG_invalid;
 }
 
@@ -491,7 +492,8 @@
   case DW_TAG_array_type:
   case DW_TAG_structure_type:
   case DW_TAG_union_type:
-  case DW_TAG_enumeration_type: return new CompositeTypeDesc(Tag);
+  case DW_TAG_enumeration_type:
+  case DW_TAG_vector_type:      return new CompositeTypeDesc(Tag);
   case DW_TAG_subrange_type:    return new SubrangeDesc();
   case DW_TAG_enumerator:       return new EnumeratorDesc();
   case DW_TAG_return_variable:
@@ -590,9 +592,7 @@
 void AnchoredDesc::ApplyToFields(DIVisitor *Visitor) {
   DebugInfoDesc::ApplyToFields(Visitor);
 
-  DebugInfoDesc *Tmp = Anchor;
-  Visitor->Apply(Tmp);
-  Anchor = (AnchorDesc*)Tmp;
+  Visitor->Apply(Anchor);
 }
 
 //===----------------------------------------------------------------------===//
@@ -673,9 +673,7 @@
   
   Visitor->Apply(Context);
   Visitor->Apply(Name);
-  DebugInfoDesc* Tmp = File;
-  Visitor->Apply(Tmp);
-  File = (CompileUnitDesc*)Tmp;
+  Visitor->Apply(File);
   Visitor->Apply(Line);
   Visitor->Apply(Size);
   Visitor->Apply(Align);
@@ -782,9 +780,7 @@
 void DerivedTypeDesc::ApplyToFields(DIVisitor *Visitor) {
   TypeDesc::ApplyToFields(Visitor);
   
-  DebugInfoDesc* Tmp = FromType;
-  Visitor->Apply(Tmp);
-  FromType = (TypeDesc*)Tmp;
+  Visitor->Apply(FromType);
 }
 
 /// getDescString - Return a string used to compose global names and labels.
@@ -817,7 +813,6 @@
 
 CompositeTypeDesc::CompositeTypeDesc(unsigned T)
 : DerivedTypeDesc(T)
-, IsVector(false)
 , Elements()
 {}
   
@@ -829,6 +824,7 @@
   case DW_TAG_structure_type:
   case DW_TAG_union_type:
   case DW_TAG_enumeration_type:
+  case DW_TAG_vector_type:
     return true;
   default: break;
   }
@@ -838,9 +834,8 @@
 /// ApplyToFields - Target the visitor to the fields of the CompositeTypeDesc.
 ///
 void CompositeTypeDesc::ApplyToFields(DIVisitor *Visitor) {
-  DerivedTypeDesc::ApplyToFields(Visitor);
-  
-  Visitor->Apply(IsVector);
+  DerivedTypeDesc::ApplyToFields(Visitor);  
+
   Visitor->Apply(Elements);
 }
 
@@ -990,13 +985,9 @@
   
   Visitor->Apply(Context);
   Visitor->Apply(Name);
-  DebugInfoDesc* Tmp1 = File;
-  Visitor->Apply(Tmp1);
-  File = (CompileUnitDesc*)Tmp1;
+  Visitor->Apply(File);
   Visitor->Apply(Line);
-  DebugInfoDesc* Tmp2 = TyDesc;
-  Visitor->Apply(Tmp2);
-  TyDesc = (TypeDesc*)Tmp2;
+  Visitor->Apply(TyDesc);
 }
 
 /// getDescString - Return a string used to compose global names and labels.
@@ -1044,13 +1035,9 @@
 
   Visitor->Apply(Context);
   Visitor->Apply(Name);
-  DebugInfoDesc* Tmp1 = File;
-  Visitor->Apply(Tmp1);
-  File = (CompileUnitDesc*)Tmp1;
+  Visitor->Apply(File);
   Visitor->Apply(Line);
-  DebugInfoDesc* Tmp2 = TyDesc;
-  Visitor->Apply(Tmp2);
-  TyDesc = (TypeDesc*)Tmp2;
+  Visitor->Apply(TyDesc);
   Visitor->Apply(IsStatic);
   Visitor->Apply(IsDefinition);
 }





From jlaskey at apple.com  Fri Jun 16 08:45:50 2006
From: jlaskey at apple.com (Jim Laskey)
Date: Fri, 16 Jun 2006 08:45:50 -0500
Subject: [llvm-commits] CVS: llvm/docs/SourceLevelDebugging.html 
Message-ID: <200606161345.IAA07855@zion.cs.uiuc.edu>



Changes in directory llvm/docs:

SourceLevelDebugging.html updated: 1.20 -> 1.21
---
Log message:

add decimal form of LLVMDebugVersion

---
Diffs of the changes:  (+2 -2)

 SourceLevelDebugging.html |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)


Index: llvm/docs/SourceLevelDebugging.html
diff -u llvm/docs/SourceLevelDebugging.html:1.20 llvm/docs/SourceLevelDebugging.html:1.21
--- llvm/docs/SourceLevelDebugging.html:1.20	Fri Jun 16 08:14:02 2006
+++ llvm/docs/SourceLevelDebugging.html	Fri Jun 16 08:45:38 2006
@@ -301,7 +301,7 @@
 loosely bound to the tag values of Dwarf information entries.  However, that
 does not restrict the use of the information supplied to Dwarf targets.  To
 facilitate versioning of debug information, the tag is augmented with the
-current debug version (LLVMDebugVersion = 4 << 16 or 0x40000.)</a></p>
+current debug version (LLVMDebugVersion = 4 << 16 or 0x40000 or 262144.)</a></p>
 
 <p>The details of the various descriptors follow.</p>  
 
@@ -1750,7 +1750,7 @@
 
   <a href="mailto:sabre at nondot.org">Chris Lattner</a><br>
   <a href="http://llvm.org">LLVM Compiler Infrastructure</a><br>
-  Last modified: $Date: 2006/06/16 13:14:02 $
+  Last modified: $Date: 2006/06/16 13:45:38 $
 </address>
 
 </body>





From alenhar2 at cs.uiuc.edu  Fri Jun 16 09:33:14 2006
From: alenhar2 at cs.uiuc.edu (Andrew Lenharth)
Date: Fri, 16 Jun 2006 09:33:14 -0500
Subject: [llvm-commits] CVS: llvm/include/llvm/Analysis/LinkAllAnalyses.h
	CallTargets.h 
Message-ID: <200606161433.JAA08150@zion.cs.uiuc.edu>



Changes in directory llvm/include/llvm/Analysis:

LinkAllAnalyses.h updated: 1.5 -> 1.6
CallTargets.h (r1.1) removed
---
Log message:

move header

---
Diffs of the changes:  (+1 -1)

 LinkAllAnalyses.h |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/include/llvm/Analysis/LinkAllAnalyses.h
diff -u llvm/include/llvm/Analysis/LinkAllAnalyses.h:1.5 llvm/include/llvm/Analysis/LinkAllAnalyses.h:1.6
--- llvm/include/llvm/Analysis/LinkAllAnalyses.h:1.5	Mon May 29 17:58:38 2006
+++ llvm/include/llvm/Analysis/LinkAllAnalyses.h	Fri Jun 16 09:33:00 2006
@@ -22,7 +22,7 @@
 #include "llvm/Analysis/Passes.h"
 #include "llvm/Analysis/ScalarEvolution.h"
 #include "llvm/Analysis/DataStructure/DataStructure.h"
-#include "llvm/Analysis/CallTargets.h"
+#include "llvm/Analysis/DataStructure/CallTargets.h"
 #include "llvm/Function.h"
 #include <cstdlib>
 





From alenhar2 at cs.uiuc.edu  Fri Jun 16 09:33:14 2006
From: alenhar2 at cs.uiuc.edu (Andrew Lenharth)
Date: Fri, 16 Jun 2006 09:33:14 -0500
Subject: [llvm-commits] 
	CVS: llvm/include/llvm/Analysis/DataStructure/CallTargets.h
Message-ID: <200606161433.JAA08152@zion.cs.uiuc.edu>



Changes in directory llvm/include/llvm/Analysis/DataStructure:

CallTargets.h added (r1.1)
---
Log message:

move header

---
Diffs of the changes:  (+54 -0)

 CallTargets.h |   54 ++++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 files changed, 54 insertions(+)


Index: llvm/include/llvm/Analysis/DataStructure/CallTargets.h
diff -c /dev/null llvm/include/llvm/Analysis/DataStructure/CallTargets.h:1.1
*** /dev/null	Fri Jun 16 09:33:10 2006
--- llvm/include/llvm/Analysis/DataStructure/CallTargets.h	Fri Jun 16 09:33:00 2006
***************
*** 0 ****
--- 1,54 ----
+ //=- llvm/Analysis/CallTargets.h - Resolve Indirect Call Targets --*- C++ -*-=//
+ //
+ //                     The LLVM Compiler Infrastructure
+ //
+ // This file was developed by the LLVM research group and is distributed under
+ // the University of Illinois Open Source License. See LICENSE.TXT for details.
+ //
+ //===----------------------------------------------------------------------===//
+ //
+ // This pass uses DSA to map targets of all calls, and reports on if it
+ // thinks it knows all targets of a given call.
+ //
+ //===----------------------------------------------------------------------===//
+ 
+ #ifndef LLVM_ANALYSIS_CALLTARGETS_H
+ #define LLVM_ANALYSIS_CALLTARGETS_H
+ 
+ #include "llvm/Pass.h"
+ #include "llvm/Support/CallSite.h"
+ 
+ #include <set>
+ #include <list>
+ 
+ namespace llvm {
+ 
+   class CallTargetFinder : public ModulePass {
+     std::map<CallSite, std::vector<Function*> > IndMap;
+     std::set<CallSite> CompleteSites;
+     std::list<CallSite> AllSites;
+ 
+     void findIndTargets(Module &M);
+   public:
+     virtual bool runOnModule(Module &M);
+ 
+     virtual void getAnalysisUsage(AnalysisUsage &AU) const;
+ 
+     virtual void print(std::ostream &O, const Module *M) const;
+ 
+     // Given a CallSite, get an iterator of callees
+     std::vector<Function*>::iterator begin(CallSite cs);
+     std::vector<Function*>::iterator end(CallSite cs);
+ 
+     // Iterate over CallSites in program
+     std::list<CallSite>::iterator cs_begin();
+     std::list<CallSite>::iterator cs_end();
+ 
+     // Do we think we have complete knowledge of this site?
+     // That is, do we think there are no missing callees
+     bool isComplete(CallSite cs) const;
+   };
+   
+ }
+ 
+ #endif





From alenhar2 at cs.uiuc.edu  Fri Jun 16 09:34:05 2006
From: alenhar2 at cs.uiuc.edu (Andrew Lenharth)
Date: Fri, 16 Jun 2006 09:34:05 -0500
Subject: [llvm-commits] CVS: llvm/lib/Analysis/DataStructure/CallTargets.cpp
Message-ID: <200606161434.JAA08185@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Analysis/DataStructure:

CallTargets.cpp updated: 1.1 -> 1.2
---
Log message:

move header

---
Diffs of the changes:  (+1 -1)

 CallTargets.cpp |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/lib/Analysis/DataStructure/CallTargets.cpp
diff -u llvm/lib/Analysis/DataStructure/CallTargets.cpp:1.1 llvm/lib/Analysis/DataStructure/CallTargets.cpp:1.2
--- llvm/lib/Analysis/DataStructure/CallTargets.cpp:1.1	Mon May 29 18:39:48 2006
+++ llvm/lib/Analysis/DataStructure/CallTargets.cpp	Fri Jun 16 09:33:53 2006
@@ -21,7 +21,7 @@
 #include "llvm/Instructions.h"
 #include "llvm/Analysis/DataStructure/DataStructure.h"
 #include "llvm/Analysis/DataStructure/DSGraph.h"
-#include "llvm/Analysis/CallTargets.h"
+#include "llvm/Analysis/DataStructure/CallTargets.h"
 #include "llvm/ADT/Statistic.h"
 #include <iostream>
 #include "llvm/Constants.h"





From alenhar2 at cs.uiuc.edu  Fri Jun 16 09:43:49 2006
From: alenhar2 at cs.uiuc.edu (Andrew Lenharth)
Date: Fri, 16 Jun 2006 09:43:49 -0500
Subject: [llvm-commits] 
	CVS: llvm/lib/Analysis/DataStructure/CompleteBottomUp.cpp
Message-ID: <200606161443.JAA08249@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Analysis/DataStructure:

CompleteBottomUp.cpp updated: 1.34 -> 1.35
---
Log message:

Add a error message to cbu to match bu

---
Diffs of the changes:  (+7 -1)

 CompleteBottomUp.cpp |    8 +++++++-
 1 files changed, 7 insertions(+), 1 deletion(-)


Index: llvm/lib/Analysis/DataStructure/CompleteBottomUp.cpp
diff -u llvm/lib/Analysis/DataStructure/CompleteBottomUp.cpp:1.34 llvm/lib/Analysis/DataStructure/CompleteBottomUp.cpp:1.35
--- llvm/lib/Analysis/DataStructure/CompleteBottomUp.cpp:1.34	Sun Jan 22 17:19:18 2006
+++ llvm/lib/Analysis/DataStructure/CompleteBottomUp.cpp	Fri Jun 16 09:43:36 2006
@@ -56,8 +56,14 @@
   }
 
   for (Module::iterator I = M.begin(), E = M.end(); I != E; ++I)
-    if (!I->isExternal() && !DSInfo.count(I))
+    if (!I->isExternal() && !DSInfo.count(I)) {
+#ifndef NDEBUG
+      if (MainFunc)
+        std::cerr << "*** CBU: Function unreachable from main: "
+                  << I->getName() << "\n";
+#endif
       calculateSCCGraphs(getOrCreateGraph(*I), Stack, NextID, ValMap);
+    }
 
   GlobalsGraph->removeTriviallyDeadNodes();
 





From lattner at cs.uiuc.edu  Fri Jun 16 11:37:02 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 16 Jun 2006 11:37:02 -0500
Subject: [llvm-commits] CVS: llvm/test/Regression/CodeGen/ARM/ret_arg5.ll 
Message-ID: <200606161637.LAA09035@zion.cs.uiuc.edu>



Changes in directory llvm/test/Regression/CodeGen/ARM:

ret_arg5.ll updated: 1.1 -> 1.2
---
Log message:

This test isn't implemented yet


---
Diffs of the changes:  (+1 -0)

 ret_arg5.ll |    1 +
 1 files changed, 1 insertion(+)


Index: llvm/test/Regression/CodeGen/ARM/ret_arg5.ll
diff -u llvm/test/Regression/CodeGen/ARM/ret_arg5.ll:1.1 llvm/test/Regression/CodeGen/ARM/ret_arg5.ll:1.2
--- llvm/test/Regression/CodeGen/ARM/ret_arg5.ll:1.1	Thu Jun  1 17:01:25 2006
+++ llvm/test/Regression/CodeGen/ARM/ret_arg5.ll	Fri Jun 16 11:36:50 2006
@@ -1,4 +1,5 @@
 ; RUN: llvm-as < %s | llc -march=arm
+; XFAIL: *
 int %test(int %a1, int %a2, int %a3, int %a4, int %a5) {
   ret int %a5
 }





From jlaskey at apple.com  Fri Jun 16 11:50:37 2006
From: jlaskey at apple.com (Jim Laskey)
Date: Fri, 16 Jun 2006 11:50:37 -0500
Subject: [llvm-commits] 
	CVS: llvm/test/Regression/CFrontend/2005-12-04-DeclarationLineNumbers.c
	2006-01-13-Includes.c 
Message-ID: <200606161650.LAA09134@zion.cs.uiuc.edu>



Changes in directory llvm/test/Regression/CFrontend:

2005-12-04-DeclarationLineNumbers.c updated: 1.3 -> 1.4
2006-01-13-Includes.c updated: 1.3 -> 1.4
---
Log message:

debug info is alive again

---
Diffs of the changes:  (+0 -4)

 2005-12-04-DeclarationLineNumbers.c |    2 --
 2006-01-13-Includes.c               |    2 --
 2 files changed, 4 deletions(-)


Index: llvm/test/Regression/CFrontend/2005-12-04-DeclarationLineNumbers.c
diff -u llvm/test/Regression/CFrontend/2005-12-04-DeclarationLineNumbers.c:1.3 llvm/test/Regression/CFrontend/2005-12-04-DeclarationLineNumbers.c:1.4
--- llvm/test/Regression/CFrontend/2005-12-04-DeclarationLineNumbers.c:1.3	Thu Apr 13 16:19:13 2006
+++ llvm/test/Regression/CFrontend/2005-12-04-DeclarationLineNumbers.c	Fri Jun 16 11:50:24 2006
@@ -21,5 +21,3 @@
 return s0734 + s1625;
 }
 
-// FIXME: PR735
-// XFAIL: llvmgcc4


Index: llvm/test/Regression/CFrontend/2006-01-13-Includes.c
diff -u llvm/test/Regression/CFrontend/2006-01-13-Includes.c:1.3 llvm/test/Regression/CFrontend/2006-01-13-Includes.c:1.4
--- llvm/test/Regression/CFrontend/2006-01-13-Includes.c:1.3	Thu Apr 13 12:35:36 2006
+++ llvm/test/Regression/CFrontend/2006-01-13-Includes.c	Fri Jun 16 11:50:24 2006
@@ -1,6 +1,4 @@
 // RUN: %llvmgcc %s -g -S -o - | gccas | llvm-dis | grep "test/Regression/CFrontend"
-// XFAIL: llvmgcc4
-// PR676
 
 #include <stdio.h>
 





From jlaskey at apple.com  Fri Jun 16 11:57:55 2006
From: jlaskey at apple.com (Jim Laskey)
Date: Fri, 16 Jun 2006 11:57:55 -0500
Subject: [llvm-commits] 
	CVS: llvm/test/Regression/CFrontend/2006-01-13-Includes.c
Message-ID: <200606161657.LAA09250@zion.cs.uiuc.edu>



Changes in directory llvm/test/Regression/CFrontend:

2006-01-13-Includes.c updated: 1.4 -> 1.5
---
Log message:

PR# not associated with XFAIL

---
Diffs of the changes:  (+1 -0)

 2006-01-13-Includes.c |    1 +
 1 files changed, 1 insertion(+)


Index: llvm/test/Regression/CFrontend/2006-01-13-Includes.c
diff -u llvm/test/Regression/CFrontend/2006-01-13-Includes.c:1.4 llvm/test/Regression/CFrontend/2006-01-13-Includes.c:1.5
--- llvm/test/Regression/CFrontend/2006-01-13-Includes.c:1.4	Fri Jun 16 11:50:24 2006
+++ llvm/test/Regression/CFrontend/2006-01-13-Includes.c	Fri Jun 16 11:57:43 2006
@@ -1,4 +1,5 @@
 // RUN: %llvmgcc %s -g -S -o - | gccas | llvm-dis | grep "test/Regression/CFrontend"
+// PR676
 
 #include <stdio.h>
 





From lattner at cs.uiuc.edu  Fri Jun 16 12:20:46 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 16 Jun 2006 12:20:46 -0500
Subject: [llvm-commits] CVS: llvm/docs/GettingStarted.html 
Message-ID: <200606161720.MAA09412@zion.cs.uiuc.edu>



Changes in directory llvm/docs:

GettingStarted.html updated: 1.132 -> 1.133
---
Log message:

apple's compiler works too


---
Diffs of the changes:  (+4 -4)

 GettingStarted.html |    8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)


Index: llvm/docs/GettingStarted.html
diff -u llvm/docs/GettingStarted.html:1.132 llvm/docs/GettingStarted.html:1.133
--- llvm/docs/GettingStarted.html:1.132	Thu Apr 20 13:46:45 2006
+++ llvm/docs/GettingStarted.html	Fri Jun 16 12:20:33 2006
@@ -486,9 +486,9 @@
 
 <p>LLVM is very demanding of the host C++ compiler, and as such tends to expose
 bugs in the compiler.  In particular, several versions of GCC crash when trying
-to compile LLVM.  We routinely use GCC 3.3.3 and GCC 3.4.0 and have had success
-with them (however, see below).  Other versions of GCC will probably
-work as well.  GCC versions listed
+to compile LLVM.  We routinely use GCC 3.3.3, 3.4.0, and Apple 4.0.1 
+successfully with them (however, see below).  Other versions of GCC will 
+probably work as well.  GCC versions listed
 here are known to not work.  If you are using one of these versions, please try
 to upgrade your GCC to something more recent.  If you run into a problem with a
 version of GCC not listed here, please <a href="mailto:llvmdev at cs.uiuc.edu">let
@@ -1536,7 +1536,7 @@
   <a href="mailto:sabre at nondot.org">Chris Lattner</a><br>
   <a href="http://llvm.x10sys.com/rspencer/">Reid Spencer</a><br>
   <a href="http://llvm.org">The LLVM Compiler Infrastructure</a><br>
-  Last modified: $Date: 2006/04/20 18:46:45 $
+  Last modified: $Date: 2006/06/16 17:20:33 $
 </address>
 </body>
 </html>





From lattner at cs.uiuc.edu  Fri Jun 16 12:34:25 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 16 Jun 2006 12:34:25 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPC.td
	PPCISelLowering.cpp PPCSubtarget.cpp PPCSubtarget.h 
Message-ID: <200606161734.MAA09522@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/PowerPC:

PPC.td updated: 1.17 -> 1.18
PPCISelLowering.cpp updated: 1.188 -> 1.189
PPCSubtarget.cpp updated: 1.20 -> 1.21
PPCSubtarget.h updated: 1.14 -> 1.15
---
Log message:

Rename some subtarget features.  A CPU now can *have* 64-bit instructions,
can in 32-bit mode we can choose to optionally *use* 64-bit registers.



---
Diffs of the changes:  (+12 -12)

 PPC.td              |    6 +++---
 PPCISelLowering.cpp |    6 +++---
 PPCSubtarget.cpp    |    4 ++--
 PPCSubtarget.h      |    8 ++++----
 4 files changed, 12 insertions(+), 12 deletions(-)


Index: llvm/lib/Target/PowerPC/PPC.td
diff -u llvm/lib/Target/PowerPC/PPC.td:1.17 llvm/lib/Target/PowerPC/PPC.td:1.18
--- llvm/lib/Target/PowerPC/PPC.td:1.17	Wed May 17 19:12:25 2006
+++ llvm/lib/Target/PowerPC/PPC.td	Fri Jun 16 12:34:12 2006
@@ -19,10 +19,10 @@
 // PowerPC Subtarget features.
 //
  
-def Feature64Bit     : SubtargetFeature<"64bit","Is64Bit", "true",
+def Feature64Bit     : SubtargetFeature<"64bit","Has64BitSupport", "true",
                                         "Enable 64-bit instructions">;
-def Feature64BitRegs : SubtargetFeature<"64bitregs","Has64BitRegs", "true",
-                                        "Enable 64-bit registers [beta]">;
+def Feature64BitRegs : SubtargetFeature<"64bitregs","Use64BitRegs", "true",
+                              "Enable 64-bit registers usage for ppc32 [beta]">;
 def FeatureAltivec   : SubtargetFeature<"altivec","HasAltivec", "true",
                                         "Enable Altivec instructions">;
 def FeatureGPUL      : SubtargetFeature<"gpul","IsGigaProcessor", "true",


Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.188 llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.189
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.188	Thu Jun 15 03:17:07 2006
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp	Fri Jun 16 12:34:12 2006
@@ -146,7 +146,7 @@
   // We want to custom lower some of our intrinsics.
   setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::Other, Custom);
   
-  if (TM.getSubtarget<PPCSubtarget>().is64Bit()) {
+  if (TM.getSubtarget<PPCSubtarget>().has64BitSupport()) {
     // They also have instructions for converting between i64 and fp.
     setOperationAction(ISD::FP_TO_SINT, MVT::i64, Custom);
     setOperationAction(ISD::SINT_TO_FP, MVT::i64, Custom);
@@ -163,7 +163,7 @@
     setOperationAction(ISD::FP_TO_UINT, MVT::i32, Expand);
   }
 
-  if (TM.getSubtarget<PPCSubtarget>().has64BitRegs()) {
+  if (TM.getSubtarget<PPCSubtarget>().use64BitRegs()) {
     // 64 bit PowerPC implementations can support i64 types directly
     addRegisterClass(MVT::i64, PPC::G8RCRegisterClass);
     // BUILD_PAIR can't be handled natively, and should be expanded to shl/or
@@ -2227,7 +2227,7 @@
   switch (N->getOpcode()) {
   default: break;
   case ISD::SINT_TO_FP:
-    if (TM.getSubtarget<PPCSubtarget>().is64Bit()) {
+    if (TM.getSubtarget<PPCSubtarget>().has64BitSupport()) {
       if (N->getOperand(0).getOpcode() == ISD::FP_TO_SINT) {
         // Turn (sint_to_fp (fp_to_sint X)) -> fctidz/fcfid without load/stores.
         // We allow the src/dst to be either f32/f64, but the intermediate


Index: llvm/lib/Target/PowerPC/PPCSubtarget.cpp
diff -u llvm/lib/Target/PowerPC/PPCSubtarget.cpp:1.20 llvm/lib/Target/PowerPC/PPCSubtarget.cpp:1.21
--- llvm/lib/Target/PowerPC/PPCSubtarget.cpp:1.20	Thu Jun 15 20:37:27 2006
+++ llvm/lib/Target/PowerPC/PPCSubtarget.cpp	Fri Jun 16 12:34:12 2006
@@ -73,8 +73,8 @@
   : StackAlignment(16)
   , InstrItins()
   , IsGigaProcessor(false)
-  , Is64Bit(false)
-  , Has64BitRegs(false)
+  , Has64BitSupport(false)
+  , Use64BitRegs(false)
   , HasAltivec(false)
   , HasFSQRT(false)
   , HasSTFIWX(false)


Index: llvm/lib/Target/PowerPC/PPCSubtarget.h
diff -u llvm/lib/Target/PowerPC/PPCSubtarget.h:1.14 llvm/lib/Target/PowerPC/PPCSubtarget.h:1.15
--- llvm/lib/Target/PowerPC/PPCSubtarget.h:1.14	Thu Jun 15 20:37:27 2006
+++ llvm/lib/Target/PowerPC/PPCSubtarget.h	Fri Jun 16 12:34:12 2006
@@ -33,8 +33,8 @@
 
   /// Used by the ISel to turn in optimizations for POWER4-derived architectures
   bool IsGigaProcessor;
-  bool Is64Bit;
-  bool Has64BitRegs;
+  bool Has64BitSupport;
+  bool Use64BitRegs;
   bool HasAltivec;
   bool HasFSQRT;
   bool HasSTFIWX;
@@ -66,12 +66,12 @@
 
   bool hasFSQRT() const { return HasFSQRT; }
   bool hasSTFIWX() const { return HasSTFIWX; }
-  bool has64BitRegs() const { return Has64BitRegs; }
+  bool use64BitRegs() const { return Use64BitRegs; }
   bool hasAltivec() const { return HasAltivec; }
   
   bool isAIX() const { return IsAIX; }
   bool isDarwin() const { return IsDarwin; }
-  bool is64Bit() const { return Is64Bit; }
+  bool has64BitSupport() const { return Has64BitSupport; }
   bool isGigaProcessor() const { return IsGigaProcessor; }
 };
 } // End llvm namespace





From lattner at cs.uiuc.edu  Fri Jun 16 12:50:24 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 16 Jun 2006 12:50:24 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCSubtarget.cpp
	PPCSubtarget.h 
Message-ID: <200606161750.MAA09710@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/PowerPC:

PPCSubtarget.cpp updated: 1.21 -> 1.22
PPCSubtarget.h updated: 1.15 -> 1.16
---
Log message:

Document the subtarget features better, make sure that 64-bit mode, 64-bit
support, and 64-bit register use are all consistent with each other.

Add a new "IsPPC" feature, to distinguish ppc32 vs ppc64 targets, use this
to configure TargetData differently.  This not makes ppc64 blow up on lots
of stuff :)


---
Diffs of the changes:  (+42 -6)

 PPCSubtarget.cpp |   21 +++++++++++++++++++++
 PPCSubtarget.h   |   27 +++++++++++++++++++++------
 2 files changed, 42 insertions(+), 6 deletions(-)


Index: llvm/lib/Target/PowerPC/PPCSubtarget.cpp
diff -u llvm/lib/Target/PowerPC/PPCSubtarget.cpp:1.21 llvm/lib/Target/PowerPC/PPCSubtarget.cpp:1.22
--- llvm/lib/Target/PowerPC/PPCSubtarget.cpp:1.21	Fri Jun 16 12:34:12 2006
+++ llvm/lib/Target/PowerPC/PPCSubtarget.cpp	Fri Jun 16 12:50:12 2006
@@ -16,6 +16,7 @@
 #include "llvm/Module.h"
 #include "llvm/Support/CommandLine.h"
 #include "PPCGenSubtarget.inc"
+#include <iostream>
 
 using namespace llvm;
 PPCTargetEnum llvm::PPCTarget = TargetDefault;
@@ -75,6 +76,7 @@
   , IsGigaProcessor(false)
   , Has64BitSupport(false)
   , Use64BitRegs(false)
+  , IsPPC64(is64Bit)
   , HasAltivec(false)
   , HasFSQRT(false)
   , HasSTFIWX(false)
@@ -90,6 +92,25 @@
   // Parse features string.
   ParseSubtargetFeatures(FS, CPU);
 
+  // If we are generating code for ppc64, verify that options make sense.
+  if (is64Bit) {
+    if (!has64BitSupport()) {
+      std::cerr << "PPC: Generation of 64-bit code for a 32-bit processor "
+                   "requested.  Ignoring 32-bit processor feature.\n";
+      Has64BitSupport = true;
+      // Silently force 64-bit register use on ppc64.
+      Use64BitRegs = true;
+    }
+  }
+  
+  // If the user requested use of 64-bit regs, but the cpu selected doesn't
+  // support it, warn and ignore.
+  if (use64BitRegs() && !has64BitSupport()) {
+    std::cerr << "PPC: 64-bit registers requested on CPU without support.  "
+                 "Disabling 64-bit register use.\n";
+    Use64BitRegs = false;
+  }
+  
   // Set the boolean corresponding to the current target triple, or the default
   // if one cannot be determined, to true.
   const std::string& TT = M.getTargetTriple();


Index: llvm/lib/Target/PowerPC/PPCSubtarget.h
diff -u llvm/lib/Target/PowerPC/PPCSubtarget.h:1.15 llvm/lib/Target/PowerPC/PPCSubtarget.h:1.16
--- llvm/lib/Target/PowerPC/PPCSubtarget.h:1.15	Fri Jun 16 12:34:12 2006
+++ llvm/lib/Target/PowerPC/PPCSubtarget.h	Fri Jun 16 12:50:12 2006
@@ -35,6 +35,7 @@
   bool IsGigaProcessor;
   bool Has64BitSupport;
   bool Use64BitRegs;
+  bool IsPPC64;
   bool HasAltivec;
   bool HasFSQRT;
   bool HasSTFIWX;
@@ -58,21 +59,35 @@
   /// getInstrItins - Return the instruction itineraies based on subtarget 
   /// selection.
   const InstrItineraryData getInstrItineraryData() const { return InstrItins; }
-  
+
+  /// getTargetDataString - Return the pointer size and type alignment
+  /// properties of this subtarget.
   const char *getTargetDataString() const {
-    // FIXME: Make is64Bit be for the processor, not the target.
-    return true ? "E-p:32:32-d:32-l:32" : "E-p:64:64-d:32-l:32";
+    return isPPC64() ? "E-p:64:64-d:32-l:32" : "E-p:32:32-d:32-l:32";
   }
 
+  /// isPPC64 - Return true if we are generating code for 64-bit pointer mode.
+  ///
+  bool isPPC64() const { return IsPPC64; }
+  
+  /// has64BitSupport - Return true if the selected CPU supports 64-bit
+  /// instructions, regardless of whether we are in 32-bit or 64-bit mode.
+  bool has64BitSupport() const { return Has64BitSupport; }
+  
+  /// use64BitRegs - Return true if in 64-bit mode or if we should use 64-bit
+  /// registers in 32-bit mode when possible.  This can only true if
+  /// has64BitSupport() returns true.
+  bool use64BitRegs() const { return Use64BitRegs; }
+  
+  
+  // Specific obvious features.
   bool hasFSQRT() const { return HasFSQRT; }
   bool hasSTFIWX() const { return HasSTFIWX; }
-  bool use64BitRegs() const { return Use64BitRegs; }
   bool hasAltivec() const { return HasAltivec; }
+  bool isGigaProcessor() const { return IsGigaProcessor; }
   
   bool isAIX() const { return IsAIX; }
   bool isDarwin() const { return IsDarwin; }
-  bool has64BitSupport() const { return Has64BitSupport; }
-  bool isGigaProcessor() const { return IsGigaProcessor; }
 };
 } // End llvm namespace
 





From lattner at cs.uiuc.edu  Fri Jun 16 13:08:50 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 16 Jun 2006 13:08:50 -0500
Subject: [llvm-commits] 
	CVS: llvm/lib/ExecutionEngine/Interpreter/Interpreter.cpp
	Interpreter.h 
Message-ID: <200606161808.NAA09904@zion.cs.uiuc.edu>



Changes in directory llvm/lib/ExecutionEngine/Interpreter:

Interpreter.cpp updated: 1.30 -> 1.31
Interpreter.h updated: 1.74 -> 1.75
---
Log message:

Simplify interpreter construction.


---
Diffs of the changes:  (+11 -21)

 Interpreter.cpp |   30 ++++++++++--------------------
 Interpreter.h   |    2 +-
 2 files changed, 11 insertions(+), 21 deletions(-)


Index: llvm/lib/ExecutionEngine/Interpreter/Interpreter.cpp
diff -u llvm/lib/ExecutionEngine/Interpreter/Interpreter.cpp:1.30 llvm/lib/ExecutionEngine/Interpreter/Interpreter.cpp:1.31
--- llvm/lib/ExecutionEngine/Interpreter/Interpreter.cpp:1.30	Tue May  2 20:29:56 2006
+++ llvm/lib/ExecutionEngine/Interpreter/Interpreter.cpp	Fri Jun 16 13:08:38 2006
@@ -39,37 +39,27 @@
     return 0;  // error materializing the module.
   }
   
-  bool isLittleEndian = false;
-  switch (M->getEndianness()) {
-  case Module::LittleEndian: isLittleEndian = true; break;
-  case Module::BigEndian:    isLittleEndian = false; break;
-  case Module::AnyPointerSize:
+  if (M->getEndianness() == Module::AnyEndianness) {
     int Test = 0;
     *(char*)&Test = 1;    // Return true if the host is little endian
-    isLittleEndian = (Test == 1);
-    break;
+    bool isLittleEndian = (Test == 1);
+    M->setEndianness(isLittleEndian ? Module::LittleEndian : Module::BigEndian);
   }
 
-  bool isLongPointer = false;
-  switch (M->getPointerSize()) {
-  case Module::Pointer32: isLongPointer = false; break;
-  case Module::Pointer64: isLongPointer = true; break;
-  case Module::AnyPointerSize:
-    isLongPointer = (sizeof(void*) == 8);  // Follow host
-    break;
+  if (M->getPointerSize() == Module::AnyPointerSize) {
+    // Follow host.
+    bool Ptr64 = sizeof(void*) == 8;
+    M->setPointerSize(Ptr64 ? Module::Pointer64 : Module::Pointer32);
   }
 
-  return new Interpreter(M, isLittleEndian, isLongPointer);
+  return new Interpreter(M);
 }
 
 //===----------------------------------------------------------------------===//
 // Interpreter ctor - Initialize stuff
 //
-Interpreter::Interpreter(Module *M, bool isLittleEndian, bool isLongPointer)
-  : ExecutionEngine(M),
-    TD("lli", isLittleEndian, isLongPointer ? 8 : 4, isLongPointer ? 8 : 4,
-       isLongPointer ? 8 : 4) {
-
+Interpreter::Interpreter(Module *M) : ExecutionEngine(M), TD("lli", M) {
+      
   memset(&ExitValue, 0, sizeof(ExitValue));
   setTargetData(&TD);
   // Initialize the "backend"


Index: llvm/lib/ExecutionEngine/Interpreter/Interpreter.h
diff -u llvm/lib/ExecutionEngine/Interpreter/Interpreter.h:1.74 llvm/lib/ExecutionEngine/Interpreter/Interpreter.h:1.75
--- llvm/lib/ExecutionEngine/Interpreter/Interpreter.h:1.74	Wed Mar 22 23:22:51 2006
+++ llvm/lib/ExecutionEngine/Interpreter/Interpreter.h	Fri Jun 16 13:08:38 2006
@@ -94,7 +94,7 @@
   std::vector<Function*> AtExitHandlers;
 
 public:
-  Interpreter(Module *M, bool isLittleEndian, bool isLongPointer);
+  Interpreter(Module *M);
   ~Interpreter();
 
   /// runAtExitHandlers - Run any functions registered by the program's calls to





From lattner at cs.uiuc.edu  Fri Jun 16 13:09:40 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 16 Jun 2006 13:09:40 -0500
Subject: [llvm-commits] CVS: llvm/lib/ExecutionEngine/JIT/JITEmitter.cpp 
Message-ID: <200606161809.NAA09941@zion.cs.uiuc.edu>



Changes in directory llvm/lib/ExecutionEngine/JIT:

JITEmitter.cpp updated: 1.103 -> 1.104
---
Log message:

Only count instructions as code size, not constant pools and other per-function stuff.


---
Diffs of the changes:  (+10 -6)

 JITEmitter.cpp |   16 ++++++++++------
 1 files changed, 10 insertions(+), 6 deletions(-)


Index: llvm/lib/ExecutionEngine/JIT/JITEmitter.cpp
diff -u llvm/lib/ExecutionEngine/JIT/JITEmitter.cpp:1.103 llvm/lib/ExecutionEngine/JIT/JITEmitter.cpp:1.104
--- llvm/lib/ExecutionEngine/JIT/JITEmitter.cpp:1.103	Thu Jun  1 12:29:22 2006
+++ llvm/lib/ExecutionEngine/JIT/JITEmitter.cpp	Fri Jun 16 13:09:26 2006
@@ -760,8 +760,14 @@
   
   emitJumpTableInfo(F.getJumpTableInfo());
   
-  MemMgr.endFunctionBody(F.getFunction(), BufferBegin, CurBufferPtr);
-  NumBytes += getCurrentPCOffset();
+  // FnStart is the start of the text, not the start of the constant pool and
+  // other per-function data.
+  unsigned char *FnStart =
+    (unsigned char *)TheJIT->getPointerToGlobalIfAvailable(F.getFunction());
+  unsigned char *FnEnd   = CurBufferPtr;
+  
+  MemMgr.endFunctionBody(F.getFunction(), BufferBegin, FnEnd);
+  NumBytes += FnEnd-FnStart;
 
   if (!Relocations.empty()) {
     NumRelos += Relocations.size();
@@ -815,11 +821,9 @@
     }
   }
 
-  DEBUG(void *FnStart = TheJIT->getPointerToGlobalIfAvailable(F.getFunction());
-        char *FnEnd   = (char*)getCurrentPCOffset();
-        std::cerr << "JIT: Finished CodeGen of [" << FnStart
+  DEBUG(std::cerr << "JIT: Finished CodeGen of [" << (void*)FnStart
                   << "] Function: " << F.getFunction()->getName()
-                  << ": " << (FnEnd-(char*)FnStart) << " bytes of text, "
+                  << ": " << (FnEnd-FnStart) << " bytes of text, "
                   << Relocations.size() << " relocations\n");
   Relocations.clear();
   return false;





From lattner at cs.uiuc.edu  Fri Jun 16 13:11:20 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 16 Jun 2006 13:11:20 -0500
Subject: [llvm-commits] CVS: llvm/include/llvm/Target/TargetData.h 
Message-ID: <200606161811.NAA10039@zion.cs.uiuc.edu>



Changes in directory llvm/include/llvm/Target:

TargetData.h updated: 1.38 -> 1.39
---
Log message:

Remove ctor with each piece specifyable (which causes overload ambiguities),
add a new init method.


---
Diffs of the changes:  (+11 -10)

 TargetData.h |   21 +++++++++++----------
 1 files changed, 11 insertions(+), 10 deletions(-)


Index: llvm/include/llvm/Target/TargetData.h
diff -u llvm/include/llvm/Target/TargetData.h:1.38 llvm/include/llvm/Target/TargetData.h:1.39
--- llvm/include/llvm/Target/TargetData.h:1.38	Sat May 20 18:28:54 2006
+++ llvm/include/llvm/Target/TargetData.h	Fri Jun 16 13:11:07 2006
@@ -45,20 +45,16 @@
   unsigned char PointerAlignment;      // Defaults to 8 bytes
 
 public:
-  TargetData(const std::string &TargetName = "",
-             bool LittleEndian = false,
-             unsigned char PtrSize = 8,
-             unsigned char PtrAl   = 8, unsigned char DoubleAl = 8,
-             unsigned char FloatAl = 4, unsigned char LongAl   = 8,
-             unsigned char IntAl   = 4, unsigned char ShortAl  = 2,
-             unsigned char ByteAl  = 1, unsigned char BoolAl   = 1);
-
   /// Constructs a TargetData from a string of the following format:
   /// "E-p:64:64-d:64-f:32-l:64-i:32-s:16-b:8-B:8"
   /// The above string is considered the default, and any values not specified
   /// in the string will be assumed to be as above.
-  TargetData(const std::string &TargetName,
-             const std::string &TargetDescription);
+  TargetData(const std::string &TargetName = "",
+             const std::string &TargetDescription = "") {
+    assert(!TargetName.empty() &&
+           "ERROR: Tool did not specify a target data to use!");
+    init(TargetDescription);
+  }
   
   // Copy constructor
   TargetData (const TargetData &TD) :
@@ -78,6 +74,11 @@
   TargetData(const std::string &ToolName, const Module *M);
   ~TargetData();  // Not virtual, do not subclass this class
 
+  /// init - Specify configuration if not available at ctor time.
+  ///
+  void init(const std::string &TargetDescription);
+  
+  
   /// Target endianness...
   bool          isLittleEndian()       const { return     LittleEndian; }
   bool          isBigEndian()          const { return    !LittleEndian; }





From lattner at cs.uiuc.edu  Fri Jun 16 13:11:38 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 16 Jun 2006 13:11:38 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/TargetData.cpp 
Message-ID: <200606161811.NAA10072@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target:

TargetData.cpp updated: 1.68 -> 1.69
---
Log message:

Remove ctor with each piece specifyable (which causes overload ambiguities),
add a new init method.


---
Diffs of the changes:  (+1 -32)

 TargetData.cpp |   33 +--------------------------------
 1 files changed, 1 insertion(+), 32 deletions(-)


Index: llvm/lib/Target/TargetData.cpp
diff -u llvm/lib/Target/TargetData.cpp:1.68 llvm/lib/Target/TargetData.cpp:1.69
--- llvm/lib/Target/TargetData.cpp:1.68	Sat May 20 18:28:54 2006
+++ llvm/lib/Target/TargetData.cpp	Fri Jun 16 13:11:26 2006
@@ -95,38 +95,7 @@
 //                       TargetData Class Implementation
 //===----------------------------------------------------------------------===//
 
-TargetData::TargetData(const std::string &TargetName,
-                       bool isLittleEndian, unsigned char PtrSize,
-                       unsigned char PtrAl, unsigned char DoubleAl,
-                       unsigned char FloatAl, unsigned char LongAl,
-                       unsigned char IntAl, unsigned char ShortAl,
-                       unsigned char ByteAl, unsigned char BoolAl) {
-
-  // If this assert triggers, a pass "required" TargetData information, but the
-  // top level tool did not provide one for it.  We do not want to default
-  // construct, or else we might end up using a bad endianness or pointer size!
-  //
-  assert(!TargetName.empty() &&
-         "ERROR: Tool did not specify a target data to use!");
-
-  LittleEndian     = isLittleEndian;
-  PointerSize      = PtrSize;
-  PointerAlignment = PtrAl;
-  DoubleAlignment  = DoubleAl;
-  FloatAlignment   = FloatAl;
-  LongAlignment    = LongAl;
-  IntAlignment     = IntAl;
-  ShortAlignment   = ShortAl;
-  ByteAlignment    = ByteAl;
-  BoolAlignment    = BoolAl;
-}
-
-TargetData::TargetData(const std::string &TargetName,
-                       const std::string &TargetDescription) {
-  assert(!TargetName.empty() &&
-         "ERROR: Tool did not specify a target data to use!");
-
-                       
+void TargetData::init(const std::string &TargetDescription) {
   std::string temp = TargetDescription;
   
   LittleEndian = false;





From lattner at cs.uiuc.edu  Fri Jun 16 13:22:05 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 16 Jun 2006 13:22:05 -0500
Subject: [llvm-commits] CVS: llvm/include/llvm/Target/TargetData.h 
Message-ID: <200606161822.NAA10213@zion.cs.uiuc.edu>



Changes in directory llvm/include/llvm/Target:

TargetData.h updated: 1.39 -> 1.40
---
Log message:

Simplify the targetdata ctor by not passing in a "targetname" which is always
ignored.


---
Diffs of the changes:  (+14 -8)

 TargetData.h |   22 ++++++++++++++--------
 1 files changed, 14 insertions(+), 8 deletions(-)


Index: llvm/include/llvm/Target/TargetData.h
diff -u llvm/include/llvm/Target/TargetData.h:1.39 llvm/include/llvm/Target/TargetData.h:1.40
--- llvm/include/llvm/Target/TargetData.h:1.39	Fri Jun 16 13:11:07 2006
+++ llvm/include/llvm/Target/TargetData.h	Fri Jun 16 13:21:53 2006
@@ -45,19 +45,26 @@
   unsigned char PointerAlignment;      // Defaults to 8 bytes
 
 public:
+  /// Default ctor - This has to exist, because this is a pass, but it should
+  /// never be used.
+  TargetData() {
+    assert(0 && "ERROR: Bad TargetData ctor used.  "
+           "Tool did not specify a TargetData to use?");
+    abort();
+  }
+    
   /// Constructs a TargetData from a string of the following format:
   /// "E-p:64:64-d:64-f:32-l:64-i:32-s:16-b:8-B:8"
   /// The above string is considered the default, and any values not specified
   /// in the string will be assumed to be as above.
-  TargetData(const std::string &TargetName = "",
-             const std::string &TargetDescription = "") {
-    assert(!TargetName.empty() &&
-           "ERROR: Tool did not specify a target data to use!");
+  TargetData(const std::string &TargetDescription) {
     init(TargetDescription);
   }
-  
-  // Copy constructor
-  TargetData (const TargetData &TD) :
+
+  /// Initialize target data from properties stored in the module.
+  TargetData(const Module *M);
+
+  TargetData(const TargetData &TD) : 
     ImmutablePass(),
     LittleEndian(TD.isLittleEndian()),
     BoolAlignment(TD.getBoolAlignment()),
@@ -71,7 +78,6 @@
     PointerAlignment(TD.getPointerAlignment()) {
   }
 
-  TargetData(const std::string &ToolName, const Module *M);
   ~TargetData();  // Not virtual, do not subclass this class
 
   /// init - Specify configuration if not available at ctor time.





From lattner at cs.uiuc.edu  Fri Jun 16 13:23:08 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 16 Jun 2006 13:23:08 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/ARM/ARMTargetMachine.cpp 
Message-ID: <200606161823.NAA10289@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/ARM:

ARMTargetMachine.cpp updated: 1.2 -> 1.3
---
Log message:

Don't pass target name into TargetData anymore, it is never used or needed.
Remove explicit casts to std::string now that there is no overload resolution
issues in the TargetData ctors.


---
Diffs of the changes:  (+1 -3)

 ARMTargetMachine.cpp |    4 +---
 1 files changed, 1 insertion(+), 3 deletions(-)


Index: llvm/lib/Target/ARM/ARMTargetMachine.cpp
diff -u llvm/lib/Target/ARM/ARMTargetMachine.cpp:1.2 llvm/lib/Target/ARM/ARMTargetMachine.cpp:1.3
--- llvm/lib/Target/ARM/ARMTargetMachine.cpp:1.2	Fri May 19 19:24:56 2006
+++ llvm/lib/Target/ARM/ARMTargetMachine.cpp	Fri Jun 16 13:22:52 2006
@@ -32,9 +32,7 @@
 /// TargetMachine ctor - Create an ILP32 architecture model
 ///
 ARMTargetMachine::ARMTargetMachine(const Module &M, const std::string &FS)
-  : TargetMachine("ARM"),
-    DataLayout(std::string("ARM"), std::string("E-p:32:32")),
-    InstrInfo(),
+  : TargetMachine("ARM"), DataLayout("E-p:32:32"),
     FrameInfo(TargetFrameInfo::StackGrowsDown, 8, 0) {
 }
 





From lattner at cs.uiuc.edu  Fri Jun 16 13:23:10 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 16 Jun 2006 13:23:10 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/CBackend/CTargetMachine.h 
Message-ID: <200606161823.NAA10295@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/CBackend:

CTargetMachine.h updated: 1.13 -> 1.14
---
Log message:

Don't pass target name into TargetData anymore, it is never used or needed.
Remove explicit casts to std::string now that there is no overload resolution
issues in the TargetData ctors.


---
Diffs of the changes:  (+1 -2)

 CTargetMachine.h |    3 +--
 1 files changed, 1 insertion(+), 2 deletions(-)


Index: llvm/lib/Target/CBackend/CTargetMachine.h
diff -u llvm/lib/Target/CBackend/CTargetMachine.h:1.13 llvm/lib/Target/CBackend/CTargetMachine.h:1.14
--- llvm/lib/Target/CBackend/CTargetMachine.h:1.13	Fri May 12 01:33:48 2006
+++ llvm/lib/Target/CBackend/CTargetMachine.h	Fri Jun 16 13:22:52 2006
@@ -23,8 +23,7 @@
   const TargetData DataLayout;       // Calculates type size & alignment
 
   CTargetMachine(const Module &M, const std::string &FS)
-    : TargetMachine("CBackend", M),
-      DataLayout("CBackend", &M) {}
+    : TargetMachine("CBackend", M), DataLayout(&M) {}
 
   // This is the only thing that actually does anything here.
   virtual bool addPassesToEmitFile(PassManager &PM, std::ostream &Out,





From lattner at cs.uiuc.edu  Fri Jun 16 13:23:11 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 16 Jun 2006 13:23:11 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86TargetMachine.cpp 
Message-ID: <200606161823.NAA10317@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/X86:

X86TargetMachine.cpp updated: 1.116 -> 1.117
---
Log message:

Don't pass target name into TargetData anymore, it is never used or needed.
Remove explicit casts to std::string now that there is no overload resolution
issues in the TargetData ctors.


---
Diffs of the changes:  (+1 -1)

 X86TargetMachine.cpp |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/lib/Target/X86/X86TargetMachine.cpp
diff -u llvm/lib/Target/X86/X86TargetMachine.cpp:1.116 llvm/lib/Target/X86/X86TargetMachine.cpp:1.117
--- llvm/lib/Target/X86/X86TargetMachine.cpp:1.116	Tue May 30 16:45:53 2006
+++ llvm/lib/Target/X86/X86TargetMachine.cpp	Fri Jun 16 13:22:52 2006
@@ -70,7 +70,7 @@
 X86TargetMachine::X86TargetMachine(const Module &M, const std::string &FS)
   : TargetMachine("X86"),
     Subtarget(M, FS),
-    DataLayout(std::string("X86"), std::string("e-p:32:32-d:32-l:32")),
+    DataLayout("e-p:32:32-d:32-l:32"),
     FrameInfo(TargetFrameInfo::StackGrowsDown,
               Subtarget.getStackAlignment(), -4),
     InstrInfo(*this), JITInfo(*this), TLInfo(*this) {





From lattner at cs.uiuc.edu  Fri Jun 16 13:23:11 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 16 Jun 2006 13:23:11 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/Sparc/SparcTargetMachine.cpp 
Message-ID: <200606161823.NAA10322@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/Sparc:

SparcTargetMachine.cpp updated: 1.47 -> 1.48
---
Log message:

Don't pass target name into TargetData anymore, it is never used or needed.
Remove explicit casts to std::string now that there is no overload resolution
issues in the TargetData ctors.


---
Diffs of the changes:  (+1 -2)

 SparcTargetMachine.cpp |    3 +--
 1 files changed, 1 insertion(+), 2 deletions(-)


Index: llvm/lib/Target/Sparc/SparcTargetMachine.cpp
diff -u llvm/lib/Target/Sparc/SparcTargetMachine.cpp:1.47 llvm/lib/Target/Sparc/SparcTargetMachine.cpp:1.48
--- llvm/lib/Target/Sparc/SparcTargetMachine.cpp:1.47	Fri May 19 19:49:30 2006
+++ llvm/lib/Target/Sparc/SparcTargetMachine.cpp	Fri Jun 16 13:22:52 2006
@@ -31,8 +31,7 @@
 /// SparcTargetMachine ctor - Create an ILP32 architecture model
 ///
 SparcTargetMachine::SparcTargetMachine(const Module &M, const std::string &FS)
-  : TargetMachine("Sparc"),
-    DataLayout(std::string("Sparc"), std::string("E-p:32:32")),
+  : TargetMachine("Sparc"), DataLayout("E-p:32:32"),
     Subtarget(M, FS), InstrInfo(Subtarget),
     FrameInfo(TargetFrameInfo::StackGrowsDown, 8, 0) {
 }





From lattner at cs.uiuc.edu  Fri Jun 16 13:23:11 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 16 Jun 2006 13:23:11 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaTargetMachine.cpp 
Message-ID: <200606161823.NAA10320@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/Alpha:

AlphaTargetMachine.cpp updated: 1.25 -> 1.26
---
Log message:

Don't pass target name into TargetData anymore, it is never used or needed.
Remove explicit casts to std::string now that there is no overload resolution
issues in the TargetData ctors.


---
Diffs of the changes:  (+1 -2)

 AlphaTargetMachine.cpp |    3 +--
 1 files changed, 1 insertion(+), 2 deletions(-)


Index: llvm/lib/Target/Alpha/AlphaTargetMachine.cpp
diff -u llvm/lib/Target/Alpha/AlphaTargetMachine.cpp:1.25 llvm/lib/Target/Alpha/AlphaTargetMachine.cpp:1.26
--- llvm/lib/Target/Alpha/AlphaTargetMachine.cpp:1.25	Fri May 19 19:24:56 2006
+++ llvm/lib/Target/Alpha/AlphaTargetMachine.cpp	Fri Jun 16 13:22:52 2006
@@ -54,8 +54,7 @@
 }
 
 AlphaTargetMachine::AlphaTargetMachine(const Module &M, const std::string &FS)
-  : TargetMachine("alpha"),
-    DataLayout(std::string("alpha"), std::string("e")),
+  : TargetMachine("alpha"), DataLayout("e"),
     FrameInfo(TargetFrameInfo::StackGrowsDown, 16, 0),
     JITInfo(*this),
     Subtarget(M, FS)





From lattner at cs.uiuc.edu  Fri Jun 16 13:23:11 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 16 Jun 2006 13:23:11 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/IA64/IA64TargetMachine.cpp 
Message-ID: <200606161823.NAA10338@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/IA64:

IA64TargetMachine.cpp updated: 1.16 -> 1.17
---
Log message:

Don't pass target name into TargetData anymore, it is never used or needed.
Remove explicit casts to std::string now that there is no overload resolution
issues in the TargetData ctors.


---
Diffs of the changes:  (+1 -1)

 IA64TargetMachine.cpp |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/lib/Target/IA64/IA64TargetMachine.cpp
diff -u llvm/lib/Target/IA64/IA64TargetMachine.cpp:1.16 llvm/lib/Target/IA64/IA64TargetMachine.cpp:1.17
--- llvm/lib/Target/IA64/IA64TargetMachine.cpp:1.16	Fri May 19 19:24:56 2006
+++ llvm/lib/Target/IA64/IA64TargetMachine.cpp	Fri Jun 16 13:22:52 2006
@@ -76,7 +76,7 @@
 /// IA64TargetMachine ctor - Create an LP64 architecture model
 ///
 IA64TargetMachine::IA64TargetMachine(const Module &M, const std::string &FS)
-  : TargetMachine("IA64"), DataLayout(std::string("IA64"), std::string("e")),
+  : TargetMachine("IA64"), DataLayout("e"),
     FrameInfo(TargetFrameInfo::StackGrowsDown, 16, 0),
     TLInfo(*this) { // FIXME? check this stuff
 }





From lattner at cs.uiuc.edu  Fri Jun 16 13:23:11 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 16 Jun 2006 13:23:11 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/TargetData.cpp 
Message-ID: <200606161823.NAA10332@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target:

TargetData.cpp updated: 1.69 -> 1.70
---
Log message:

Don't pass target name into TargetData anymore, it is never used or needed.
Remove explicit casts to std::string now that there is no overload resolution
issues in the TargetData ctors.


---
Diffs of the changes:  (+1 -1)

 TargetData.cpp |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/lib/Target/TargetData.cpp
diff -u llvm/lib/Target/TargetData.cpp:1.69 llvm/lib/Target/TargetData.cpp:1.70
--- llvm/lib/Target/TargetData.cpp:1.69	Fri Jun 16 13:11:26 2006
+++ llvm/lib/Target/TargetData.cpp	Fri Jun 16 13:22:52 2006
@@ -152,7 +152,7 @@
   }
 }
 
-TargetData::TargetData(const std::string &ToolName, const Module *M) {
+TargetData::TargetData(const Module *M) {
   LittleEndian     = M->getEndianness() != Module::BigEndian;
   PointerSize      = M->getPointerSize() != Module::Pointer64 ? 4 : 8;
   PointerAlignment = PointerSize;





From lattner at cs.uiuc.edu  Fri Jun 16 13:23:11 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 16 Jun 2006 13:23:11 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCTargetMachine.cpp 
Message-ID: <200606161823.NAA10331@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/PowerPC:

PPCTargetMachine.cpp updated: 1.92 -> 1.93
---
Log message:

Don't pass target name into TargetData anymore, it is never used or needed.
Remove explicit casts to std::string now that there is no overload resolution
issues in the TargetData ctors.


---
Diffs of the changes:  (+1 -2)

 PPCTargetMachine.cpp |    3 +--
 1 files changed, 1 insertion(+), 2 deletions(-)


Index: llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
diff -u llvm/lib/Target/PowerPC/PPCTargetMachine.cpp:1.92 llvm/lib/Target/PowerPC/PPCTargetMachine.cpp:1.93
--- llvm/lib/Target/PowerPC/PPCTargetMachine.cpp:1.92	Thu Jun 15 20:37:27 2006
+++ llvm/lib/Target/PowerPC/PPCTargetMachine.cpp	Fri Jun 16 13:22:52 2006
@@ -87,8 +87,7 @@
 PPCTargetMachine::PPCTargetMachine(const Module &M, const std::string &FS,
                                    bool is64Bit)
   : TargetMachine("PowerPC"), Subtarget(M, FS, is64Bit),
-    DataLayout(std::string("PowerPC"), 
-               std::string(Subtarget.getTargetDataString())),
+    DataLayout(Subtarget.getTargetDataString()),
     FrameInfo(*this, false), JITInfo(*this), TLInfo(*this),
     InstrItins(Subtarget.getInstrItineraryData()) {
 





From lattner at cs.uiuc.edu  Fri Jun 16 13:24:06 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 16 Jun 2006 13:24:06 -0500
Subject: [llvm-commits] CVS: llvm/tools/opt/opt.cpp 
Message-ID: <200606161824.NAA10461@zion.cs.uiuc.edu>



Changes in directory llvm/tools/opt:

opt.cpp updated: 1.109 -> 1.110
---
Log message:

Don't pass target name into TargetData anymore, it is never used or needed.



---
Diffs of the changes:  (+1 -1)

 opt.cpp |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/tools/opt/opt.cpp
diff -u llvm/tools/opt/opt.cpp:1.109 llvm/tools/opt/opt.cpp:1.110
--- llvm/tools/opt/opt.cpp:1.109	Wed Jun  7 18:03:13 2006
+++ llvm/tools/opt/opt.cpp	Fri Jun 16 13:23:49 2006
@@ -134,7 +134,7 @@
     PassManager Passes;
 
     // Add an appropriate TargetData instance for this module...
-    Passes.add(new TargetData("opt", M.get()));
+    Passes.add(new TargetData(M.get()));
 
     // Create a new optimization pass for each one specified on the command line
     for (unsigned i = 0; i < OptimizationList.size(); ++i) {





From lattner at cs.uiuc.edu  Fri Jun 16 13:24:06 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 16 Jun 2006 13:24:06 -0500
Subject: [llvm-commits] CVS: llvm/tools/llvm-ld/Optimize.cpp 
Message-ID: <200606161824.NAA10465@zion.cs.uiuc.edu>



Changes in directory llvm/tools/llvm-ld:

Optimize.cpp updated: 1.8 -> 1.9
---
Log message:

Don't pass target name into TargetData anymore, it is never used or needed.



---
Diffs of the changes:  (+1 -1)

 Optimize.cpp |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/tools/llvm-ld/Optimize.cpp
diff -u llvm/tools/llvm-ld/Optimize.cpp:1.8 llvm/tools/llvm-ld/Optimize.cpp:1.9
--- llvm/tools/llvm-ld/Optimize.cpp:1.8	Wed Jun  7 18:07:51 2006
+++ llvm/tools/llvm-ld/Optimize.cpp	Fri Jun 16 13:23:48 2006
@@ -102,7 +102,7 @@
     Passes.add(createVerifierPass());
 
   // Add an appropriate TargetData instance for this module...
-  addPass(Passes, new TargetData("gccld", M));
+  addPass(Passes, new TargetData(M));
 
   // Often if the programmer does not specify proper prototypes for the
   // functions they are calling, they end up calling a vararg version of the





From lattner at cs.uiuc.edu  Fri Jun 16 13:24:07 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 16 Jun 2006 13:24:07 -0500
Subject: [llvm-commits] CVS: llvm/tools/analyze/analyze.cpp 
Message-ID: <200606161824.NAA10472@zion.cs.uiuc.edu>



Changes in directory llvm/tools/analyze:

analyze.cpp updated: 1.67 -> 1.68
---
Log message:

Don't pass target name into TargetData anymore, it is never used or needed.



---
Diffs of the changes:  (+1 -1)

 analyze.cpp |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/tools/analyze/analyze.cpp
diff -u llvm/tools/analyze/analyze.cpp:1.67 llvm/tools/analyze/analyze.cpp:1.68
--- llvm/tools/analyze/analyze.cpp:1.67	Wed Jun  7 18:03:13 2006
+++ llvm/tools/analyze/analyze.cpp	Fri Jun 16 13:23:48 2006
@@ -148,7 +148,7 @@
     PassManager Passes;
 
     // Add an appropriate TargetData instance for this module...
-    Passes.add(new TargetData("analyze", CurMod));
+    Passes.add(new TargetData(CurMod));
 
     // Make sure the input LLVM is well formed.
     if (!NoVerify)





From lattner at cs.uiuc.edu  Fri Jun 16 13:24:08 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 16 Jun 2006 13:24:08 -0500
Subject: [llvm-commits] CVS: llvm/tools/gccld/GenerateCode.cpp 
Message-ID: <200606161824.NAA10492@zion.cs.uiuc.edu>



Changes in directory llvm/tools/gccld:

GenerateCode.cpp updated: 1.57 -> 1.58
---
Log message:

Don't pass target name into TargetData anymore, it is never used or needed.



---
Diffs of the changes:  (+1 -1)

 GenerateCode.cpp |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/tools/gccld/GenerateCode.cpp
diff -u llvm/tools/gccld/GenerateCode.cpp:1.57 llvm/tools/gccld/GenerateCode.cpp:1.58
--- llvm/tools/gccld/GenerateCode.cpp:1.57	Sun May 14 14:17:28 2006
+++ llvm/tools/gccld/GenerateCode.cpp	Fri Jun 16 13:23:48 2006
@@ -207,7 +207,7 @@
   if (Verify) Passes.add(createVerifierPass());
 
   // Add an appropriate TargetData instance for this module...
-  addPass(Passes, new TargetData("gccld", M));
+  addPass(Passes, new TargetData(M));
 
   // Often if the programmer does not specify proper prototypes for the
   // functions they are calling, they end up calling a vararg version of the





From lattner at cs.uiuc.edu  Fri Jun 16 13:24:07 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 16 Jun 2006 13:24:07 -0500
Subject: [llvm-commits] CVS: llvm/tools/llvm-extract/llvm-extract.cpp 
Message-ID: <200606161824.NAA10470@zion.cs.uiuc.edu>



Changes in directory llvm/tools/llvm-extract:

llvm-extract.cpp updated: 1.29 -> 1.30
---
Log message:

Don't pass target name into TargetData anymore, it is never used or needed.



---
Diffs of the changes:  (+1 -1)

 llvm-extract.cpp |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/tools/llvm-extract/llvm-extract.cpp
diff -u llvm/tools/llvm-extract/llvm-extract.cpp:1.29 llvm/tools/llvm-extract/llvm-extract.cpp:1.30
--- llvm/tools/llvm-extract/llvm-extract.cpp:1.29	Sun Apr 24 12:35:15 2005
+++ llvm/tools/llvm-extract/llvm-extract.cpp	Fri Jun 16 13:23:48 2006
@@ -66,7 +66,7 @@
     // In addition to deleting all other functions, we also want to spiff it
     // up a little bit.  Do this now.
     PassManager Passes;
-    Passes.add(new TargetData("extract", M.get())); // Use correct TargetData
+    Passes.add(new TargetData(M.get())); // Use correct TargetData
     // Either isolate the function or delete it from the Module
     Passes.add(createFunctionExtractionPass(F, DeleteFn));
     Passes.add(createGlobalDCEPass());             // Delete unreachable globals





From lattner at cs.uiuc.edu  Fri Jun 16 13:24:08 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 16 Jun 2006 13:24:08 -0500
Subject: [llvm-commits] CVS: llvm/tools/gccas/gccas.cpp 
Message-ID: <200606161824.NAA10488@zion.cs.uiuc.edu>



Changes in directory llvm/tools/gccas:

gccas.cpp updated: 1.115 -> 1.116
---
Log message:

Don't pass target name into TargetData anymore, it is never used or needed.



---
Diffs of the changes:  (+1 -1)

 gccas.cpp |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/tools/gccas/gccas.cpp
diff -u llvm/tools/gccas/gccas.cpp:1.115 llvm/tools/gccas/gccas.cpp:1.116
--- llvm/tools/gccas/gccas.cpp:1.115	Wed Feb 22 01:33:49 2006
+++ llvm/tools/gccas/gccas.cpp	Fri Jun 16 13:23:48 2006
@@ -192,7 +192,7 @@
     PassManager Passes;
 
     // Add an appropriate TargetData instance for this module...
-    Passes.add(new TargetData("gccas", M.get()));
+    Passes.add(new TargetData(M.get()));
 
     // Add all of the transformation passes to the pass manager to do the cleanup
     // and optimization of the GCC output.





From lattner at cs.uiuc.edu  Fri Jun 16 13:24:07 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 16 Jun 2006 13:24:07 -0500
Subject: [llvm-commits] CVS: llvm/tools/bugpoint/ExtractFunction.cpp
	OptimizerDriver.cpp 
Message-ID: <200606161824.NAA10478@zion.cs.uiuc.edu>



Changes in directory llvm/tools/bugpoint:

ExtractFunction.cpp updated: 1.47 -> 1.48
OptimizerDriver.cpp updated: 1.39 -> 1.40
---
Log message:

Don't pass target name into TargetData anymore, it is never used or needed.



---
Diffs of the changes:  (+2 -2)

 ExtractFunction.cpp |    2 +-
 OptimizerDriver.cpp |    2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)


Index: llvm/tools/bugpoint/ExtractFunction.cpp
diff -u llvm/tools/bugpoint/ExtractFunction.cpp:1.47 llvm/tools/bugpoint/ExtractFunction.cpp:1.48
--- llvm/tools/bugpoint/ExtractFunction.cpp:1.47	Fri May 12 12:28:36 2006
+++ llvm/tools/bugpoint/ExtractFunction.cpp	Fri Jun 16 13:23:48 2006
@@ -80,7 +80,7 @@
   // Spiff up the output a little bit.
   PassManager Passes;
   // Make sure that the appropriate target data is always used...
-  Passes.add(new TargetData("bugpoint", Result));
+  Passes.add(new TargetData(Result));
 
   /// FIXME: If this used runPasses() like the methods below, we could get rid
   /// of the -disable-* options!


Index: llvm/tools/bugpoint/OptimizerDriver.cpp
diff -u llvm/tools/bugpoint/OptimizerDriver.cpp:1.39 llvm/tools/bugpoint/OptimizerDriver.cpp:1.40
--- llvm/tools/bugpoint/OptimizerDriver.cpp:1.39	Mon Jun 12 22:10:48 2006
+++ llvm/tools/bugpoint/OptimizerDriver.cpp	Fri Jun 16 13:23:48 2006
@@ -104,7 +104,7 @@
 
   PassManager PM;
   // Make sure that the appropriate target data is always used...
-  PM.add(new TargetData("bugpoint", Program));
+  PM.add(new TargetData(Program));
 
   for (unsigned i = 0, e = Passes.size(); i != e; ++i) {
     if (Passes[i]->getNormalCtor())





From lattner at cs.uiuc.edu  Fri Jun 16 13:24:07 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 16 Jun 2006 13:24:07 -0500
Subject: [llvm-commits] 
	CVS: llvm/projects/Stacker/lib/compiler/StackerCompiler.cpp
Message-ID: <200606161824.NAA10476@zion.cs.uiuc.edu>



Changes in directory llvm/projects/Stacker/lib/compiler:

StackerCompiler.cpp updated: 1.16 -> 1.17
---
Log message:

Don't pass target name into TargetData anymore, it is never used or needed.



---
Diffs of the changes:  (+1 -1)

 StackerCompiler.cpp |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/projects/Stacker/lib/compiler/StackerCompiler.cpp
diff -u llvm/projects/Stacker/lib/compiler/StackerCompiler.cpp:1.16 llvm/projects/Stacker/lib/compiler/StackerCompiler.cpp:1.17
--- llvm/projects/Stacker/lib/compiler/StackerCompiler.cpp:1.16	Fri May 12 12:29:40 2006
+++ llvm/projects/Stacker/lib/compiler/StackerCompiler.cpp	Fri Jun 16 13:23:49 2006
@@ -264,7 +264,7 @@
         // Set up a pass manager
         PassManager Passes;
         // Add in the passes we want to execute
-        Passes.add(new TargetData("stkrc",TheModule));
+        Passes.add(new TargetData(TheModule));
         // Verify we start with valid
         Passes.add(createVerifierPass());
 





From lattner at cs.uiuc.edu  Fri Jun 16 13:24:51 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 16 Jun 2006 13:24:51 -0500
Subject: [llvm-commits] 
	CVS: llvm/lib/ExecutionEngine/Interpreter/Interpreter.cpp
Message-ID: <200606161824.NAA10529@zion.cs.uiuc.edu>



Changes in directory llvm/lib/ExecutionEngine/Interpreter:

Interpreter.cpp updated: 1.31 -> 1.32
---
Log message:

Simplify TargetData ctor call


---
Diffs of the changes:  (+1 -1)

 Interpreter.cpp |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/lib/ExecutionEngine/Interpreter/Interpreter.cpp
diff -u llvm/lib/ExecutionEngine/Interpreter/Interpreter.cpp:1.31 llvm/lib/ExecutionEngine/Interpreter/Interpreter.cpp:1.32
--- llvm/lib/ExecutionEngine/Interpreter/Interpreter.cpp:1.31	Fri Jun 16 13:08:38 2006
+++ llvm/lib/ExecutionEngine/Interpreter/Interpreter.cpp	Fri Jun 16 13:24:38 2006
@@ -58,7 +58,7 @@
 //===----------------------------------------------------------------------===//
 // Interpreter ctor - Initialize stuff
 //
-Interpreter::Interpreter(Module *M) : ExecutionEngine(M), TD("lli", M) {
+Interpreter::Interpreter(Module *M) : ExecutionEngine(M), TD(M) {
       
   memset(&ExitValue, 0, sizeof(ExitValue));
   setTargetData(&TD);





From lattner at cs.uiuc.edu  Fri Jun 16 13:25:18 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 16 Jun 2006 13:25:18 -0500
Subject: [llvm-commits] CVS: llvm/utils/TableGen/DAGISelEmitter.cpp 
Message-ID: <200606161825.NAA10567@zion.cs.uiuc.edu>



Changes in directory llvm/utils/TableGen:

DAGISelEmitter.cpp updated: 1.212 -> 1.213
---
Log message:

Improve a comment.


---
Diffs of the changes:  (+1 -1)

 DAGISelEmitter.cpp |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/utils/TableGen/DAGISelEmitter.cpp
diff -u llvm/utils/TableGen/DAGISelEmitter.cpp:1.212 llvm/utils/TableGen/DAGISelEmitter.cpp:1.213
--- llvm/utils/TableGen/DAGISelEmitter.cpp:1.212	Wed Jun 14 19:16:37 2006
+++ llvm/utils/TableGen/DAGISelEmitter.cpp	Fri Jun 16 13:25:06 2006
@@ -145,7 +145,7 @@
   assert(NumResults <= 1 &&
          "We only work with nodes with zero or one result so far!");
   
-  // Check that the number of operands is sane.
+  // Check that the number of operands is sane.  Negative operands -> varargs.
   if (NodeInfo.getNumOperands() >= 0) {
     if (N->getNumChildren() != (unsigned)NodeInfo.getNumOperands())
       TP.error(N->getOperator()->getName() + " node requires exactly " +





From evan.cheng at apple.com  Fri Jun 16 13:37:27 2006
From: evan.cheng at apple.com (Evan Cheng)
Date: Fri, 16 Jun 2006 13:37:27 -0500
Subject: [llvm-commits] CVS: llvm/lib/Transforms/IPO/SimplifyLibCalls.cpp 
Message-ID: <200606161837.NAA10675@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Transforms/IPO:

SimplifyLibCalls.cpp updated: 1.66 -> 1.67
---
Log message:

Add missing casts. This fixed some regressions.

---
Diffs of the changes:  (+2 -2)

 SimplifyLibCalls.cpp |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)


Index: llvm/lib/Transforms/IPO/SimplifyLibCalls.cpp
diff -u llvm/lib/Transforms/IPO/SimplifyLibCalls.cpp:1.66 llvm/lib/Transforms/IPO/SimplifyLibCalls.cpp:1.67
--- llvm/lib/Transforms/IPO/SimplifyLibCalls.cpp:1.66	Fri Jun 16 03:36:35 2006
+++ llvm/lib/Transforms/IPO/SimplifyLibCalls.cpp	Fri Jun 16 13:37:15 2006
@@ -1340,7 +1340,7 @@
         if (!puts_func)
           return false;
         std::vector<Value*> args;
-        args.push_back(ci->getOperand(2));
+        args.push_back(CastToCStr(ci->getOperand(2), *ci));
         new CallInst(puts_func,args,ci->getName(),ci);
         ci->replaceAllUsesWith(ConstantSInt::get(Type::IntTy,len));
         break;
@@ -1474,7 +1474,7 @@
           if (!fputs_func)
             return false;
           std::vector<Value*> args;
-          args.push_back(ci->getOperand(3));
+          args.push_back(CastToCStr(ci->getOperand(3), *ci));
           args.push_back(ci->getOperand(1));
           new CallInst(fputs_func,args,ci->getName(),ci);
           ci->replaceAllUsesWith(ConstantSInt::get(Type::IntTy,len));





From lattner at cs.uiuc.edu  Fri Jun 16 13:51:00 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 16 Jun 2006 13:51:00 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPC.h
	PPCRegisterInfo.td PPCSubtarget.cpp PPCTargetMachine.cpp 
Message-ID: <200606161851.NAA10833@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/PowerPC:

PPC.h updated: 1.28 -> 1.29
PPCRegisterInfo.td updated: 1.36 -> 1.37
PPCSubtarget.cpp updated: 1.22 -> 1.23
PPCTargetMachine.cpp updated: 1.93 -> 1.94
---
Log message:

Remove the -darwin and -aix llc options, inferring darwinism and aixism from
the target triple & subtarget info.  woo.



---
Diffs of the changes:  (+7 -35)

 PPC.h                |    7 -------
 PPCRegisterInfo.td   |    4 ++--
 PPCSubtarget.cpp     |   18 +++---------------
 PPCTargetMachine.cpp |   13 ++-----------
 4 files changed, 7 insertions(+), 35 deletions(-)


Index: llvm/lib/Target/PowerPC/PPC.h
diff -u llvm/lib/Target/PowerPC/PPC.h:1.28 llvm/lib/Target/PowerPC/PPC.h:1.29
--- llvm/lib/Target/PowerPC/PPC.h:1.28	Mon Mar 13 17:20:37 2006
+++ llvm/lib/Target/PowerPC/PPC.h	Fri Jun 16 13:50:48 2006
@@ -21,17 +21,10 @@
 
 class FunctionPass;
 class PPCTargetMachine;
-
-enum PPCTargetEnum {
-  TargetDefault, TargetAIX, TargetDarwin
-};
-
 FunctionPass *createPPCBranchSelectionPass();
 FunctionPass *createPPCISelDag(PPCTargetMachine &TM);
 FunctionPass *createDarwinAsmPrinter(std::ostream &OS, PPCTargetMachine &TM);
 FunctionPass *createAIXAsmPrinter(std::ostream &OS, PPCTargetMachine &TM);
-
-extern PPCTargetEnum PPCTarget;
 } // end namespace llvm;
 
 // GCC #defines PPC on Linux but we use it as our namespace name


Index: llvm/lib/Target/PowerPC/PPCRegisterInfo.td
diff -u llvm/lib/Target/PowerPC/PPCRegisterInfo.td:1.36 llvm/lib/Target/PowerPC/PPCRegisterInfo.td:1.37
--- llvm/lib/Target/PowerPC/PPCRegisterInfo.td:1.36	Thu May  4 11:56:45 2006
+++ llvm/lib/Target/PowerPC/PPCRegisterInfo.td	Fri Jun 16 13:50:48 2006
@@ -215,7 +215,7 @@
   let MethodBodies = [{
     GPRCClass::iterator
     GPRCClass::allocation_order_begin(MachineFunction &MF) const {
-      return begin() + ((TargetAIX == PPCTarget) ? 1 : 0);
+      return begin();
     }
     GPRCClass::iterator
     GPRCClass::allocation_order_end(MachineFunction &MF) const {
@@ -238,7 +238,7 @@
   let MethodBodies = [{
     G8RCClass::iterator
     G8RCClass::allocation_order_begin(MachineFunction &MF) const {
-      return begin() + ((TargetAIX == PPCTarget) ? 1 : 0);
+      return begin();
     }
     G8RCClass::iterator
     G8RCClass::allocation_order_end(MachineFunction &MF) const {


Index: llvm/lib/Target/PowerPC/PPCSubtarget.cpp
diff -u llvm/lib/Target/PowerPC/PPCSubtarget.cpp:1.22 llvm/lib/Target/PowerPC/PPCSubtarget.cpp:1.23
--- llvm/lib/Target/PowerPC/PPCSubtarget.cpp:1.22	Fri Jun 16 12:50:12 2006
+++ llvm/lib/Target/PowerPC/PPCSubtarget.cpp	Fri Jun 16 13:50:48 2006
@@ -14,24 +14,10 @@
 #include "PPCSubtarget.h"
 #include "PPC.h"
 #include "llvm/Module.h"
-#include "llvm/Support/CommandLine.h"
 #include "PPCGenSubtarget.inc"
 #include <iostream>
-
 using namespace llvm;
-PPCTargetEnum llvm::PPCTarget = TargetDefault;
 
-namespace llvm {
-  cl::opt<PPCTargetEnum, true>
-  PPCTargetArg(cl::desc("Force generation of code for a specific PPC target:"),
-               cl::values(
-                          clEnumValN(TargetAIX,  "aix", "  Enable AIX codegen"),
-                          clEnumValN(TargetDarwin,"darwin",
-                                     "  Enable Darwin codegen"),
-                          clEnumValEnd),
-               cl::location(PPCTarget), cl::init(TargetDefault));  
-} 
- 
 #if defined(__APPLE__)
 #include <mach/mach.h>
 #include <mach/mach_host.h>
@@ -115,7 +101,9 @@
   // if one cannot be determined, to true.
   const std::string& TT = M.getTargetTriple();
   if (TT.length() > 5) {
-    IsDarwin = TT.find("darwin") != std::string::npos;
+    IsDarwin = TT.find("-darwin") != std::string::npos;
+    if (!IsDarwin)
+      IsAIX = TT.find("-aix") != std::string::npos;
   } else if (TT.empty()) {
 #if defined(_POWER)
     IsAIX = true;


Index: llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
diff -u llvm/lib/Target/PowerPC/PPCTargetMachine.cpp:1.93 llvm/lib/Target/PowerPC/PPCTargetMachine.cpp:1.94
--- llvm/lib/Target/PowerPC/PPCTargetMachine.cpp:1.93	Fri Jun 16 13:22:52 2006
+++ llvm/lib/Target/PowerPC/PPCTargetMachine.cpp	Fri Jun 16 13:50:48 2006
@@ -91,10 +91,6 @@
     FrameInfo(*this, false), JITInfo(*this), TLInfo(*this),
     InstrItins(Subtarget.getInstrItineraryData()) {
 
-  if (TargetDefault == PPCTarget) {
-    if (Subtarget.isAIX()) PPCTarget = TargetAIX;
-    if (Subtarget.isDarwin()) PPCTarget = TargetDarwin;
-  }
   if (getRelocationModel() == Reloc::Default)
     if (Subtarget.isDarwin())
       setRelocationModel(Reloc::DynamicNoPIC);
@@ -153,15 +149,10 @@
 
   // Decide which asm printer to use.  If the user has not specified one on
   // the command line, choose whichever one matches the default (current host).
-  switch (PPCTarget) {
-  case TargetAIX:
+  if (Subtarget.isAIX())
     PM.add(createAIXAsmPrinter(Out, *this));
-    break;
-  case TargetDefault:
-  case TargetDarwin:
+  else
     PM.add(createDarwinAsmPrinter(Out, *this));
-    break;
-  }
 
   PM.add(createMachineCodeDeleter());
   return false;





From lattner at cs.uiuc.edu  Fri Jun 16 14:53:52 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 16 Jun 2006 14:53:52 -0500
Subject: [llvm-commits] CVS: llvm/docs/GettingStarted.html 
Message-ID: <200606161953.OAA11093@zion.cs.uiuc.edu>



Changes in directory llvm/docs:

GettingStarted.html updated: 1.133 -> 1.134
---
Log message:

Document known xcode 2.3 issue


---
Diffs of the changes:  (+4 -1)

 GettingStarted.html |    5 ++++-
 1 files changed, 4 insertions(+), 1 deletion(-)


Index: llvm/docs/GettingStarted.html
diff -u llvm/docs/GettingStarted.html:1.133 llvm/docs/GettingStarted.html:1.134
--- llvm/docs/GettingStarted.html:1.133	Fri Jun 16 12:20:33 2006
+++ llvm/docs/GettingStarted.html	Fri Jun 16 14:53:39 2006
@@ -515,6 +515,9 @@
    to a newer version of GCC.</p>
 <p><b>IA-64 GCC 4.0.0</b>: The IA-64 version of GCC 4.0.0 is known to
    miscompile LLVM.</p>
+<p><b>Apple Xcode 2.3</b>: GCC crashes when compiling LLVM at -O3 (which is the
+   default with ENABLE_OPTIMIZED=1.  To work around this, build with 
+   "ENABLE_OPTIMIZED=1 OPTIMIZE_OPTION=-O2".</p>
 </div>
 
 
@@ -1536,7 +1539,7 @@
   <a href="mailto:sabre at nondot.org">Chris Lattner</a><br>
   <a href="http://llvm.x10sys.com/rspencer/">Reid Spencer</a><br>
   <a href="http://llvm.org">The LLVM Compiler Infrastructure</a><br>
-  Last modified: $Date: 2006/06/16 17:20:33 $
+  Last modified: $Date: 2006/06/16 19:53:39 $
 </address>
 </body>
 </html>





From lattner at cs.uiuc.edu  Fri Jun 16 15:05:19 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 16 Jun 2006 15:05:19 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCSubtarget.cpp 
Message-ID: <200606162005.PAA11219@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/PowerPC:

PPCSubtarget.cpp updated: 1.23 -> 1.24
---
Log message:

Force 64-bit register availability in 64-bit mode.  For real.


---
Diffs of the changes:  (+2 -2)

 PPCSubtarget.cpp |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)


Index: llvm/lib/Target/PowerPC/PPCSubtarget.cpp
diff -u llvm/lib/Target/PowerPC/PPCSubtarget.cpp:1.23 llvm/lib/Target/PowerPC/PPCSubtarget.cpp:1.24
--- llvm/lib/Target/PowerPC/PPCSubtarget.cpp:1.23	Fri Jun 16 13:50:48 2006
+++ llvm/lib/Target/PowerPC/PPCSubtarget.cpp	Fri Jun 16 15:05:06 2006
@@ -84,9 +84,9 @@
       std::cerr << "PPC: Generation of 64-bit code for a 32-bit processor "
                    "requested.  Ignoring 32-bit processor feature.\n";
       Has64BitSupport = true;
-      // Silently force 64-bit register use on ppc64.
-      Use64BitRegs = true;
     }
+    // Silently force 64-bit register use on ppc64.
+    Use64BitRegs = true;
   }
   
   // If the user requested use of 64-bit regs, but the cpu selected doesn't





From lattner at cs.uiuc.edu  Fri Jun 16 15:22:14 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 16 Jun 2006 15:22:14 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCInstr64Bit.td
	PPCInstrInfo.td 
Message-ID: <200606162022.PAA11436@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/PowerPC:

PPCInstr64Bit.td added (r1.1)
PPCInstrInfo.td updated: 1.222 -> 1.223
---
Log message:

Split 64-bit instructions out into a separate .td file


---
Diffs of the changes:  (+185 -130)

 PPCInstr64Bit.td |  183 +++++++++++++++++++++++++++++++++++++++++++++++++++++++
 PPCInstrInfo.td  |  132 ---------------------------------------
 2 files changed, 185 insertions(+), 130 deletions(-)


Index: llvm/lib/Target/PowerPC/PPCInstr64Bit.td
diff -c /dev/null llvm/lib/Target/PowerPC/PPCInstr64Bit.td:1.1
*** /dev/null	Fri Jun 16 15:22:11 2006
--- llvm/lib/Target/PowerPC/PPCInstr64Bit.td	Fri Jun 16 15:22:01 2006
***************
*** 0 ****
--- 1,183 ----
+ //===- PPCInstr64Bit.td - The PowerPC 64-bit Support -------*- tablegen -*-===//
+ // 
+ //                     The LLVM Compiler Infrastructure
+ //
+ // This file was developed by Chris Lattner and is distributed under
+ // the University of Illinois Open Source License. See LICENSE.TXT for details.
+ // 
+ //===----------------------------------------------------------------------===//
+ //
+ // This file describes the PowerPC 64-bit instructions.  These patterns are used
+ // both when in ppc64 mode and when in "use 64-bit extensions in 32-bit" mode.
+ //
+ //===----------------------------------------------------------------------===//
+ 
+ 
+ //===----------------------------------------------------------------------===//
+ // Fixed point instructions.
+ //
+ 
+ let PPC970_Unit = 1 in {  // FXU Operations.
+ 
+ def OR8  : XForm_6<31, 444, (ops G8RC:$rA, G8RC:$rS, G8RC:$rB),
+                    "or $rA, $rS, $rB", IntGeneral,
+                    [(set G8RC:$rA, (or G8RC:$rS, G8RC:$rB))]>;
+ def OR4To8  : XForm_6<31, 444, (ops G8RC:$rA, GPRC:$rS, GPRC:$rB),
+                    "or $rA, $rS, $rB", IntGeneral,
+                    []>;
+ def OR8To4  : XForm_6<31, 444, (ops GPRC:$rA, G8RC:$rS, G8RC:$rB),
+                    "or $rA, $rS, $rB", IntGeneral,
+                    []>;
+                    
+ def ADD8  : XOForm_1<31, 266, 0, (ops G8RC:$rT, G8RC:$rA, G8RC:$rB),
+                      "add $rT, $rA, $rB", IntGeneral,
+                      [(set G8RC:$rT, (add G8RC:$rA, G8RC:$rB))]>;
+ def MULHD : XOForm_1<31, 73, 0, (ops G8RC:$rT, G8RC:$rA, G8RC:$rB),
+                      "mulhd $rT, $rA, $rB", IntMulHW,
+                      [(set G8RC:$rT, (mulhs G8RC:$rA, G8RC:$rB))]>;
+ def MULHDU : XOForm_1<31, 9, 0, (ops G8RC:$rT, G8RC:$rA, G8RC:$rB),
+                      "mulhdu $rT, $rA, $rB", IntMulHWU,
+                      [(set G8RC:$rT, (mulhu G8RC:$rA, G8RC:$rB))]>;
+ 
+ def CMPDI : DForm_5_ext<11, (ops CRRC:$crD, GPRC:$rA, s16imm:$imm),
+                         "cmpdi $crD, $rA, $imm", IntCompare>, isPPC64;
+ 
+ def CMPLDI : DForm_6_ext<10, (ops CRRC:$dst, GPRC:$src1, u16imm:$src2),
+                          "cmpldi $dst, $src1, $src2", IntCompare>, isPPC64;
+ def CMPD   : XForm_16_ext<31, 0, (ops CRRC:$crD, GPRC:$rA, GPRC:$rB),
+                           "cmpd $crD, $rA, $rB", IntCompare>, isPPC64;
+ def CMPLD  : XForm_16_ext<31, 32, (ops CRRC:$crD, GPRC:$rA, GPRC:$rB),
+                           "cmpld $crD, $rA, $rB", IntCompare>, isPPC64;
+ 
+ def SLD  : XForm_6<31,  27, (ops G8RC:$rA, G8RC:$rS, G8RC:$rB),
+                    "sld $rA, $rS, $rB", IntRotateD,
+                    [(set G8RC:$rA, (shl G8RC:$rS, G8RC:$rB))]>, isPPC64;
+ def SRD  : XForm_6<31, 539, (ops G8RC:$rA, G8RC:$rS, G8RC:$rB),
+                    "srd $rA, $rS, $rB", IntRotateD,
+                    [(set G8RC:$rA, (srl G8RC:$rS, G8RC:$rB))]>, isPPC64;
+ def SRAD : XForm_6<31, 794, (ops G8RC:$rA, G8RC:$rS, G8RC:$rB),
+                    "srad $rA, $rS, $rB", IntRotateD,
+                    [(set G8RC:$rA, (sra G8RC:$rS, G8RC:$rB))]>, isPPC64;
+ def EXTSW  : XForm_11<31, 986, (ops G8RC:$rA, G8RC:$rS),
+                       "extsw $rA, $rS", IntGeneral,
+                       [(set G8RC:$rA, (sext_inreg G8RC:$rS, i32))]>, isPPC64;
+ /// EXTSW_32 - Just like EXTSW, but works on '32-bit' registers.
+ def EXTSW_32 : XForm_11<31, 986, (ops GPRC:$rA, GPRC:$rS),
+                       "extsw $rA, $rS", IntGeneral,
+                       [(set GPRC:$rA, (PPCextsw_32 GPRC:$rS))]>, isPPC64;
+ 
+ def SRADI  : XSForm_1<31, 413, (ops GPRC:$rA, GPRC:$rS, u6imm:$SH),
+                       "sradi $rA, $rS, $SH", IntRotateD>, isPPC64;
+ def DIVD  : XOForm_1<31, 489, 0, (ops G8RC:$rT, G8RC:$rA, G8RC:$rB),
+                      "divd $rT, $rA, $rB", IntDivD,
+                      [(set G8RC:$rT, (sdiv G8RC:$rA, G8RC:$rB))]>, isPPC64,
+                      PPC970_DGroup_First, PPC970_DGroup_Cracked;
+ def DIVDU : XOForm_1<31, 457, 0, (ops G8RC:$rT, G8RC:$rA, G8RC:$rB),
+                      "divdu $rT, $rA, $rB", IntDivD,
+                      [(set G8RC:$rT, (udiv G8RC:$rA, G8RC:$rB))]>, isPPC64,
+                      PPC970_DGroup_First, PPC970_DGroup_Cracked;
+ def MULLD : XOForm_1<31, 233, 0, (ops G8RC:$rT, G8RC:$rA, G8RC:$rB),
+                      "mulld $rT, $rA, $rB", IntMulHD,
+                      [(set G8RC:$rT, (mul G8RC:$rA, G8RC:$rB))]>, isPPC64;
+ 
+ let isTwoAddress = 1, isCommutable = 1 in {
+ def RLDIMI : MDForm_1<30, 3,
+                       (ops G8RC:$rA, G8RC:$rSi, G8RC:$rS, u6imm:$SH, u6imm:$MB),
+                       "rldimi $rA, $rS, $SH, $MB", IntRotateD,
+                       []>, isPPC64;
+ }
+ 
+ // Rotate instructions.
+ def RLDICL : MDForm_1<30, 0,
+                       (ops G8RC:$rA, G8RC:$rS, u6imm:$SH, u6imm:$MB),
+                       "rldicl $rA, $rS, $SH, $MB", IntRotateD,
+                       []>, isPPC64;
+ def RLDICR : MDForm_1<30, 1,
+                       (ops G8RC:$rA, G8RC:$rS, u6imm:$SH, u6imm:$ME),
+                       "rldicr $rA, $rS, $SH, $ME", IntRotateD,
+                       []>, isPPC64;
+ }
+ 
+ 
+ //===----------------------------------------------------------------------===//
+ // Load/Store instructions.
+ //
+ 
+ 
+ let isLoad = 1, PPC970_Unit = 2 in {
+ def LWAX : XForm_1<31, 341, (ops G8RC:$rD, memrr:$src),
+                    "lwax $rD, $src", LdStLHA,
+                    [(set G8RC:$rD, (sextload xaddr:$src, i32))]>, isPPC64,
+                    PPC970_DGroup_Cracked;
+ def LDX  : XForm_1<31,  21, (ops G8RC:$rD, memrr:$src),
+                    "ldx $rD, $src", LdStLD,
+                    [(set G8RC:$rD, (load xaddr:$src))]>, isPPC64;
+ }
+ 
+ 
+ // DS-Form instructions.  Load/Store instructions available in PPC-64
+ //
+ let isLoad = 1, PPC970_Unit = 2 in {
+ def LWA  : DSForm_1<58, 2, (ops GPRC:$rT, s16immX4:$DS, GPRC:$rA),
+                     "lwa $rT, $DS($rA)", LdStLWA,
+                     []>, isPPC64, PPC970_DGroup_Cracked;
+ def LD   : DSForm_2<58, 0, (ops GPRC:$rT, s16immX4:$DS, GPRC:$rA),
+                     "ld $rT, $DS($rA)", LdStLD,
+                     []>, isPPC64;
+ }
+ let isStore = 1, noResults = 1, PPC970_Unit = 2 in {
+ def STD  : DSForm_2<62, 0, (ops GPRC:$rT, s16immX4:$DS, GPRC:$rA),
+                     "std $rT, $DS($rA)", LdStSTD,
+                     []>, isPPC64;
+ 
+ // STD_32/STDX_32 - Just like STD/STDX, but uses a '32-bit' input register.
+ def STD_32  : DSForm_2<62, 0, (ops GPRC:$rT, memrix:$dst),
+                        "std $rT, $dst", LdStSTD,
+                        [(PPCstd_32  GPRC:$rT, ixaddr:$dst)]>, isPPC64;
+ def STDX_32  : XForm_8<31, 149, (ops GPRC:$rT, memrr:$dst),
+                        "stdx $rT, $dst", LdStSTD,
+                        [(PPCstd_32  GPRC:$rT, xaddr:$dst)]>, isPPC64,
+                        PPC970_DGroup_Cracked;
+ 
+ def STDX  : XForm_8<31, 149, (ops GPRC:$rS, GPRC:$rA, GPRC:$rB),
+                    "stdx $rS, $rA, $rB", LdStSTD,
+                    []>, isPPC64, PPC970_DGroup_Cracked;
+ def STDUX : XForm_8<31, 181, (ops GPRC:$rS, GPRC:$rA, GPRC:$rB),
+                    "stdux $rS, $rA, $rB", LdStSTD,
+                    []>, isPPC64;
+ }
+ 
+ 
+ 
+ //===----------------------------------------------------------------------===//
+ // Floating point instructions.
+ //
+ 
+ 
+ let PPC970_Unit = 3 in {  // FPU Operations.
+ def FCFID  : XForm_26<63, 846, (ops F8RC:$frD, F8RC:$frB),
+                       "fcfid $frD, $frB", FPGeneral,
+                       [(set F8RC:$frD, (PPCfcfid F8RC:$frB))]>, isPPC64;
+ def FCTIDZ : XForm_26<63, 815, (ops F8RC:$frD, F8RC:$frB),
+                       "fctidz $frD, $frB", FPGeneral,
+                       [(set F8RC:$frD, (PPCfctidz F8RC:$frB))]>, isPPC64;
+ }
+ 
+ 
+ //===----------------------------------------------------------------------===//
+ // Instruction Patterns
+ //
+ 
+ // Extensions and truncates to/from 32-bit regs.
+ def : Pat<(i64 (zext GPRC:$in)),
+           (RLDICL (OR4To8 GPRC:$in, GPRC:$in), 0, 32)>;
+ def : Pat<(i64 (anyext GPRC:$in)),
+           (OR4To8 GPRC:$in, GPRC:$in)>;
+ def : Pat<(i32 (trunc G8RC:$in)),
+           (OR8To4 G8RC:$in, G8RC:$in)>;
+ 
+ // SHL/SRL
+ def : Pat<(shl G8RC:$in, (i64 imm:$imm)),
+           (RLDICR G8RC:$in, imm:$imm, (SHL64 imm:$imm))>;
+ def : Pat<(srl G8RC:$in, (i64 imm:$imm)),
+           (RLDICL G8RC:$in, (SRL64 imm:$imm), imm:$imm)>;


Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td
diff -u llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.222 llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.223
--- llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.222	Fri Jun  9 20:14:28 2006
+++ llvm/lib/Target/PowerPC/PPCInstrInfo.td	Fri Jun 16 15:22:01 2006
@@ -419,14 +419,10 @@
                     "cmpi $crD, $L, $rA, $imm", IntCompare>;
 def CMPWI : DForm_5_ext<11, (ops CRRC:$crD, GPRC:$rA, s16imm:$imm),
                         "cmpwi $crD, $rA, $imm", IntCompare>;
-def CMPDI : DForm_5_ext<11, (ops CRRC:$crD, GPRC:$rA, s16imm:$imm),
-                        "cmpdi $crD, $rA, $imm", IntCompare>, isPPC64;
 def CMPLI  : DForm_6<10, (ops CRRC:$dst, i1imm:$size, GPRC:$src1, u16imm:$src2),
                      "cmpli $dst, $size, $src1, $src2", IntCompare>;
 def CMPLWI : DForm_6_ext<10, (ops CRRC:$dst, GPRC:$src1, u16imm:$src2),
                          "cmplwi $dst, $src1, $src2", IntCompare>;
-def CMPLDI : DForm_6_ext<10, (ops CRRC:$dst, GPRC:$src1, u16imm:$src2),
-                         "cmpldi $dst, $src1, $src2", IntCompare>, isPPC64;
 }
 let isLoad = 1, PPC970_Unit = 2 in {
 def LFS : DForm_8<48, (ops F4RC:$rD, memri:$src),
@@ -445,31 +441,6 @@
                    [(store F8RC:$rS, iaddr:$dst)]>;
 }
 
-// DS-Form instructions.  Load/Store instructions available in PPC-64
-//
-let isLoad = 1, PPC970_Unit = 2 in {
-def LWA  : DSForm_1<58, 2, (ops GPRC:$rT, s16immX4:$DS, GPRC:$rA),
-                    "lwa $rT, $DS($rA)", LdStLWA,
-                    []>, isPPC64, PPC970_DGroup_Cracked;
-def LD   : DSForm_2<58, 0, (ops GPRC:$rT, s16immX4:$DS, GPRC:$rA),
-                    "ld $rT, $DS($rA)", LdStLD,
-                    []>, isPPC64;
-}
-let isStore = 1, noResults = 1, PPC970_Unit = 2 in {
-def STD  : DSForm_2<62, 0, (ops GPRC:$rT, s16immX4:$DS, GPRC:$rA),
-                    "std $rT, $DS($rA)", LdStSTD,
-                    []>, isPPC64;
-
-// STD_32/STDX_32 - Just like STD/STDX, but uses a '32-bit' input register.
-def STD_32  : DSForm_2<62, 0, (ops GPRC:$rT, memrix:$dst),
-                       "std $rT, $dst", LdStSTD,
-                       [(PPCstd_32  GPRC:$rT, ixaddr:$dst)]>, isPPC64;
-def STDX_32  : XForm_8<31, 149, (ops GPRC:$rT, memrr:$dst),
-                       "stdx $rT, $dst", LdStSTD,
-                       [(PPCstd_32  GPRC:$rT, xaddr:$dst)]>, isPPC64,
-                       PPC970_DGroup_Cracked;
-}
-
 // X-Form instructions.  Most instructions that perform an operation on a
 // register and another register are of this type.
 //
@@ -484,16 +455,9 @@
 def LHZX : XForm_1<31, 279, (ops GPRC:$rD, memrr:$src),
                    "lhzx $rD, $src", LdStGeneral,
                    [(set GPRC:$rD, (zextload xaddr:$src, i16))]>;
-def LWAX : XForm_1<31, 341, (ops G8RC:$rD, memrr:$src),
-                   "lwax $rD, $src", LdStLHA,
-                   [(set G8RC:$rD, (sextload xaddr:$src, i32))]>, isPPC64,
-                   PPC970_DGroup_Cracked;
 def LWZX : XForm_1<31,  23, (ops GPRC:$rD, memrr:$src),
                    "lwzx $rD, $src", LdStGeneral,
                    [(set GPRC:$rD, (load xaddr:$src))]>;
-def LDX  : XForm_1<31,  21, (ops G8RC:$rD, memrr:$src),
-                   "ldx $rD, $src", LdStLD,
-                   [(set G8RC:$rD, (load xaddr:$src))]>, isPPC64;
 }
 
 let PPC970_Unit = 1 in {  // FXU Operations.
@@ -512,15 +476,6 @@
 def OR4  : XForm_6<31, 444, (ops GPRC:$rA, GPRC:$rS, GPRC:$rB),
                    "or $rA, $rS, $rB", IntGeneral,
                    [(set GPRC:$rA, (or GPRC:$rS, GPRC:$rB))]>;
-def OR8  : XForm_6<31, 444, (ops G8RC:$rA, G8RC:$rS, G8RC:$rB),
-                   "or $rA, $rS, $rB", IntGeneral,
-                   [(set G8RC:$rA, (or G8RC:$rS, G8RC:$rB))]>;
-def OR4To8  : XForm_6<31, 444, (ops G8RC:$rA, GPRC:$rS, GPRC:$rB),
-                   "or $rA, $rS, $rB", IntGeneral,
-                   []>;
-def OR8To4  : XForm_6<31, 444, (ops GPRC:$rA, G8RC:$rS, G8RC:$rB),
-                   "or $rA, $rS, $rB", IntGeneral,
-                   []>;
 def NOR  : XForm_6<31, 124, (ops GPRC:$rA, GPRC:$rS, GPRC:$rB),
                    "nor $rA, $rS, $rB", IntGeneral,
                    [(set GPRC:$rA, (not (or GPRC:$rS, GPRC:$rB)))]>;
@@ -536,21 +491,12 @@
 def XOR  : XForm_6<31, 316, (ops GPRC:$rA, GPRC:$rS, GPRC:$rB),
                    "xor $rA, $rS, $rB", IntGeneral,
                    [(set GPRC:$rA, (xor GPRC:$rS, GPRC:$rB))]>;                   
-def SLD  : XForm_6<31,  27, (ops G8RC:$rA, G8RC:$rS, G8RC:$rB),
-                   "sld $rA, $rS, $rB", IntRotateD,
-                   [(set G8RC:$rA, (shl G8RC:$rS, G8RC:$rB))]>, isPPC64;
 def SLW  : XForm_6<31,  24, (ops GPRC:$rA, GPRC:$rS, GPRC:$rB),
                    "slw $rA, $rS, $rB", IntGeneral,
                    [(set GPRC:$rA, (PPCshl GPRC:$rS, GPRC:$rB))]>;
-def SRD  : XForm_6<31, 539, (ops G8RC:$rA, G8RC:$rS, G8RC:$rB),
-                   "srd $rA, $rS, $rB", IntRotateD,
-                   [(set G8RC:$rA, (srl G8RC:$rS, G8RC:$rB))]>, isPPC64;
 def SRW  : XForm_6<31, 536, (ops GPRC:$rA, GPRC:$rS, GPRC:$rB),
                    "srw $rA, $rS, $rB", IntGeneral,
                    [(set GPRC:$rA, (PPCsrl GPRC:$rS, GPRC:$rB))]>;
-def SRAD : XForm_6<31, 794, (ops G8RC:$rA, G8RC:$rS, G8RC:$rB),
-                   "srad $rA, $rS, $rB", IntRotateD,
-                   [(set G8RC:$rA, (sra G8RC:$rS, G8RC:$rB))]>, isPPC64;
 def SRAW : XForm_6<31, 792, (ops GPRC:$rA, GPRC:$rS, GPRC:$rB),
                    "sraw $rA, $rS, $rB", IntShift,
                    [(set GPRC:$rA, (PPCsra GPRC:$rS, GPRC:$rB))]>;
@@ -571,12 +517,6 @@
 def STWUX : XForm_8<31, 183, (ops GPRC:$rS, GPRC:$rA, GPRC:$rB),
                    "stwux $rS, $rA, $rB", LdStGeneral,
                    []>;
-def STDX  : XForm_8<31, 149, (ops GPRC:$rS, GPRC:$rA, GPRC:$rB),
-                   "stdx $rS, $rA, $rB", LdStSTD,
-                   []>, isPPC64, PPC970_DGroup_Cracked;
-def STDUX : XForm_8<31, 181, (ops GPRC:$rS, GPRC:$rA, GPRC:$rB),
-                   "stdux $rS, $rA, $rB", LdStSTD,
-                   []>, isPPC64;
 }
 let PPC970_Unit = 1 in {  // FXU Operations.
 def SRAWI : XForm_10<31, 824, (ops GPRC:$rA, GPRC:$rS, u5imm:$SH), 
@@ -591,13 +531,6 @@
 def EXTSH  : XForm_11<31, 922, (ops GPRC:$rA, GPRC:$rS),
                       "extsh $rA, $rS", IntGeneral,
                       [(set GPRC:$rA, (sext_inreg GPRC:$rS, i16))]>;
-def EXTSW  : XForm_11<31, 986, (ops G8RC:$rA, G8RC:$rS),
-                      "extsw $rA, $rS", IntGeneral,
-                      [(set G8RC:$rA, (sext_inreg G8RC:$rS, i32))]>, isPPC64;
-/// EXTSW_32 - Just like EXTSW, but works on '32-bit' registers.
-def EXTSW_32 : XForm_11<31, 986, (ops GPRC:$rA, GPRC:$rS),
-                      "extsw $rA, $rS", IntGeneral,
-                      [(set GPRC:$rA, (PPCextsw_32 GPRC:$rS))]>, isPPC64;
 
 def CMP    : XForm_16<31, 0, (ops CRRC:$crD, i1imm:$long, GPRC:$rA, GPRC:$rB),
                       "cmp $crD, $long, $rA, $rB", IntCompare>;
@@ -605,12 +538,8 @@
                       "cmpl $crD, $long, $rA, $rB", IntCompare>;
 def CMPW   : XForm_16_ext<31, 0, (ops CRRC:$crD, GPRC:$rA, GPRC:$rB),
                           "cmpw $crD, $rA, $rB", IntCompare>;
-def CMPD   : XForm_16_ext<31, 0, (ops CRRC:$crD, GPRC:$rA, GPRC:$rB),
-                          "cmpd $crD, $rA, $rB", IntCompare>, isPPC64;
 def CMPLW  : XForm_16_ext<31, 32, (ops CRRC:$crD, GPRC:$rA, GPRC:$rB),
                           "cmplw $crD, $rA, $rB", IntCompare>;
-def CMPLD  : XForm_16_ext<31, 32, (ops CRRC:$crD, GPRC:$rA, GPRC:$rB),
-                          "cmpld $crD, $rA, $rB", IntCompare>, isPPC64;
 }
 let PPC970_Unit = 3 in {  // FPU Operations.
 //def FCMPO  : XForm_17<63, 32, (ops CRRC:$crD, FPRC:$fA, FPRC:$fB),
@@ -629,12 +558,6 @@
                       [(set F8RC:$frD, (load xaddr:$src))]>;
 }
 let PPC970_Unit = 3 in {  // FPU Operations.
-def FCFID  : XForm_26<63, 846, (ops F8RC:$frD, F8RC:$frB),
-                      "fcfid $frD, $frB", FPGeneral,
-                      [(set F8RC:$frD, (PPCfcfid F8RC:$frB))]>, isPPC64;
-def FCTIDZ : XForm_26<63, 815, (ops F8RC:$frD, F8RC:$frB),
-                      "fctidz $frD, $frB", FPGeneral,
-                      [(set F8RC:$frD, (PPCfctidz F8RC:$frB))]>, isPPC64;
 def FCTIWZ : XForm_26<63, 15, (ops F8RC:$frD, F8RC:$frB),
                       "fctiwz $frD, $frB", FPGeneral,
                       [(set F8RC:$frD, (PPCfctiwz F8RC:$frB))]>;
@@ -741,20 +664,13 @@
                        "mfcr $rT, $FXM", SprMFCR>,
             PPC970_DGroup_First, PPC970_Unit_CRU;
 
-// XS-Form instructions.  Just 'sradi'
-//
 let PPC970_Unit = 1 in {  // FXU Operations.
-def SRADI  : XSForm_1<31, 413, (ops GPRC:$rA, GPRC:$rS, u6imm:$SH),
-                      "sradi $rA, $rS, $SH", IntRotateD>, isPPC64;
 
 // XO-Form instructions.  Arithmetic instructions that can set overflow bit
 //
 def ADD4  : XOForm_1<31, 266, 0, (ops GPRC:$rT, GPRC:$rA, GPRC:$rB),
                      "add $rT, $rA, $rB", IntGeneral,
                      [(set GPRC:$rT, (add GPRC:$rA, GPRC:$rB))]>;
-def ADD8  : XOForm_1<31, 266, 0, (ops G8RC:$rT, G8RC:$rA, G8RC:$rB),
-                     "add $rT, $rA, $rB", IntGeneral,
-                     [(set G8RC:$rT, (add G8RC:$rA, G8RC:$rB))]>;
 def ADDC  : XOForm_1<31, 10, 0, (ops GPRC:$rT, GPRC:$rA, GPRC:$rB),
                      "addc $rT, $rA, $rB", IntGeneral,
                      [(set GPRC:$rT, (addc GPRC:$rA, GPRC:$rB))]>,
@@ -762,14 +678,6 @@
 def ADDE  : XOForm_1<31, 138, 0, (ops GPRC:$rT, GPRC:$rA, GPRC:$rB),
                      "adde $rT, $rA, $rB", IntGeneral,
                      [(set GPRC:$rT, (adde GPRC:$rA, GPRC:$rB))]>;
-def DIVD  : XOForm_1<31, 489, 0, (ops G8RC:$rT, G8RC:$rA, G8RC:$rB),
-                     "divd $rT, $rA, $rB", IntDivD,
-                     [(set G8RC:$rT, (sdiv G8RC:$rA, G8RC:$rB))]>, isPPC64,
-                     PPC970_DGroup_First, PPC970_DGroup_Cracked;
-def DIVDU : XOForm_1<31, 457, 0, (ops G8RC:$rT, G8RC:$rA, G8RC:$rB),
-                     "divdu $rT, $rA, $rB", IntDivD,
-                     [(set G8RC:$rT, (udiv G8RC:$rA, G8RC:$rB))]>, isPPC64,
-                     PPC970_DGroup_First, PPC970_DGroup_Cracked;
 def DIVW  : XOForm_1<31, 491, 0, (ops GPRC:$rT, GPRC:$rA, GPRC:$rB),
                      "divw $rT, $rA, $rB", IntDivW,
                      [(set GPRC:$rT, (sdiv GPRC:$rA, GPRC:$rB))]>,
@@ -778,21 +686,12 @@
                      "divwu $rT, $rA, $rB", IntDivW,
                      [(set GPRC:$rT, (udiv GPRC:$rA, GPRC:$rB))]>,
                      PPC970_DGroup_First, PPC970_DGroup_Cracked;
-def MULHD : XOForm_1<31, 73, 0, (ops G8RC:$rT, G8RC:$rA, G8RC:$rB),
-                     "mulhd $rT, $rA, $rB", IntMulHW,
-                     [(set G8RC:$rT, (mulhs G8RC:$rA, G8RC:$rB))]>;
-def MULHDU : XOForm_1<31, 9, 0, (ops G8RC:$rT, G8RC:$rA, G8RC:$rB),
-                     "mulhdu $rT, $rA, $rB", IntMulHWU,
-                     [(set G8RC:$rT, (mulhu G8RC:$rA, G8RC:$rB))]>;
 def MULHW : XOForm_1<31, 75, 0, (ops GPRC:$rT, GPRC:$rA, GPRC:$rB),
                      "mulhw $rT, $rA, $rB", IntMulHW,
                      [(set GPRC:$rT, (mulhs GPRC:$rA, GPRC:$rB))]>;
 def MULHWU : XOForm_1<31, 11, 0, (ops GPRC:$rT, GPRC:$rA, GPRC:$rB),
                      "mulhwu $rT, $rA, $rB", IntMulHWU,
                      [(set GPRC:$rT, (mulhu GPRC:$rA, GPRC:$rB))]>;
-def MULLD : XOForm_1<31, 233, 0, (ops G8RC:$rT, G8RC:$rA, G8RC:$rB),
-                     "mulld $rT, $rA, $rB", IntMulHD,
-                     [(set G8RC:$rT, (mul G8RC:$rA, G8RC:$rB))]>, isPPC64;
 def MULLW : XOForm_1<31, 235, 0, (ops GPRC:$rT, GPRC:$rA, GPRC:$rB),
                      "mullw $rT, $rA, $rB", IntMulHW,
                      [(set GPRC:$rT, (mul GPRC:$rA, GPRC:$rB))]>;
@@ -930,10 +829,6 @@
                      (ops GPRC:$rA, GPRC:$rSi, GPRC:$rS, u5imm:$SH, u5imm:$MB, 
                       u5imm:$ME), "rlwimi $rA, $rS, $SH, $MB, $ME", IntRotate,
                       []>, PPC970_DGroup_Cracked;
-def RLDIMI : MDForm_1<30, 3,
-                      (ops G8RC:$rA, G8RC:$rSi, G8RC:$rS, u6imm:$SH, u6imm:$MB),
-                      "rldimi $rA, $rS, $SH, $MB", IntRotateD,
-                      []>, isPPC64;
 }
 def RLWINM : MForm_2<21,
                      (ops GPRC:$rA, GPRC:$rS, u5imm:$SH, u5imm:$MB, u5imm:$ME),
@@ -947,17 +842,6 @@
                      (ops GPRC:$rA, GPRC:$rS, GPRC:$rB, u5imm:$MB, u5imm:$ME),
                      "rlwnm $rA, $rS, $rB, $MB, $ME", IntGeneral,
                      []>;
-
-// MD-Form instructions.  64 bit rotate instructions.
-//
-def RLDICL : MDForm_1<30, 0,
-                      (ops G8RC:$rA, G8RC:$rS, u6imm:$SH, u6imm:$MB),
-                      "rldicl $rA, $rS, $SH, $MB", IntRotateD,
-                      []>, isPPC64;
-def RLDICR : MDForm_1<30, 1,
-                      (ops G8RC:$rA, G8RC:$rS, u6imm:$SH, u6imm:$ME),
-                      "rldicr $rA, $rS, $SH, $ME", IntRotateD,
-                      []>, isPPC64;
 }
 
 
@@ -1002,24 +886,11 @@
 // Return void support.
 def : Pat<(ret), (BLR)>;
 
-// 64-bit support
-def : Pat<(i64 (zext GPRC:$in)),
-          (RLDICL (OR4To8 GPRC:$in, GPRC:$in), 0, 32)>;
-def : Pat<(i64 (anyext GPRC:$in)),
-          (OR4To8 GPRC:$in, GPRC:$in)>;
-def : Pat<(i32 (trunc G8RC:$in)),
-          (OR8To4 G8RC:$in, G8RC:$in)>;
-
-// SHL
+// SHL/SRL
 def : Pat<(shl GPRC:$in, (i32 imm:$imm)),
           (RLWINM GPRC:$in, imm:$imm, 0, (SHL32 imm:$imm))>;
-def : Pat<(shl G8RC:$in, (i64 imm:$imm)),
-          (RLDICR G8RC:$in, imm:$imm, (SHL64 imm:$imm))>;
-// SRL
 def : Pat<(srl GPRC:$in, (i32 imm:$imm)),
           (RLWINM GPRC:$in, (SRL32 imm:$imm), imm:$imm, 31)>;
-def : Pat<(srl G8RC:$in, (i64 imm:$imm)),
-          (RLDICL G8RC:$in, (SRL64 imm:$imm), imm:$imm)>;
 
 // ROTL
 def : Pat<(rotl GPRC:$in, GPRC:$sh),
@@ -1088,3 +959,4 @@
 
 
 include "PPCInstrAltivec.td"
+include "PPCInstr64Bit.td"





From lattner at cs.uiuc.edu  Fri Jun 16 16:01:48 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 16 Jun 2006 16:01:48 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
	PPCInstr64Bit.td PPCInstrInfo.td 
Message-ID: <200606162101.QAA11737@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/PowerPC:

PPCISelLowering.cpp updated: 1.189 -> 1.190
PPCInstr64Bit.td updated: 1.1 -> 1.2
PPCInstrInfo.td updated: 1.223 -> 1.224
---
Log message:

fix some assumptions that pointers can only be 32-bits.  With this, we can
now compile:

static unsigned long X;
void test1() {
  X = 0;
}

into:

_test1:
        lis r2, ha16(_X)
        li r3, 0
        stw r3, lo16(_X)(r2)
        blr

Totally amazing :)



---
Diffs of the changes:  (+59 -62)

 PPCISelLowering.cpp |   67 +++++++++++++++++++++++++++-------------------------
 PPCInstr64Bit.td    |   33 ++++++++++---------------
 PPCInstrInfo.td     |   21 +++++++---------
 3 files changed, 59 insertions(+), 62 deletions(-)


Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.189 llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.190
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.189	Fri Jun 16 12:34:12 2006
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp	Fri Jun 16 16:01:35 2006
@@ -128,7 +128,10 @@
   setOperationAction(ISD::GlobalAddress, MVT::i32, Custom);
   setOperationAction(ISD::ConstantPool,  MVT::i32, Custom);
   setOperationAction(ISD::JumpTable,     MVT::i32, Custom);
-
+  setOperationAction(ISD::GlobalAddress, MVT::i64, Custom);
+  setOperationAction(ISD::ConstantPool,  MVT::i64, Custom);
+  setOperationAction(ISD::JumpTable,     MVT::i64, Custom);
+  
   // RET must be custom lowered, to meet ABI requirements
   setOperationAction(ISD::RET               , MVT::Other, Custom);
   
@@ -583,94 +586,94 @@
 //===----------------------------------------------------------------------===//
 
 static SDOperand LowerConstantPool(SDOperand Op, SelectionDAG &DAG) {
+  MVT::ValueType PtrVT = Op.getValueType();
   ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(Op);
   Constant *C = CP->get();
-  SDOperand CPI = DAG.getTargetConstantPool(C, MVT::i32, CP->getAlignment());
-  SDOperand Zero = DAG.getConstant(0, MVT::i32);
+  SDOperand CPI = DAG.getTargetConstantPool(C, PtrVT, CP->getAlignment());
+  SDOperand Zero = DAG.getConstant(0, PtrVT);
 
   const TargetMachine &TM = DAG.getTarget();
   
+  SDOperand Hi = DAG.getNode(PPCISD::Hi, PtrVT, CPI, Zero);
+  SDOperand Lo = DAG.getNode(PPCISD::Lo, PtrVT, CPI, Zero);
+
   // If this is a non-darwin platform, we don't support non-static relo models
   // yet.
   if (TM.getRelocationModel() == Reloc::Static ||
       !TM.getSubtarget<PPCSubtarget>().isDarwin()) {
     // Generate non-pic code that has direct accesses to the constant pool.
     // The address of the global is just (hi(&g)+lo(&g)).
-    SDOperand Hi = DAG.getNode(PPCISD::Hi, MVT::i32, CPI, Zero);
-    SDOperand Lo = DAG.getNode(PPCISD::Lo, MVT::i32, CPI, Zero);
-    return DAG.getNode(ISD::ADD, MVT::i32, Hi, Lo);
+    return DAG.getNode(ISD::ADD, PtrVT, Hi, Lo);
   }
   
-  SDOperand Hi = DAG.getNode(PPCISD::Hi, MVT::i32, CPI, Zero);
   if (TM.getRelocationModel() == Reloc::PIC) {
     // With PIC, the first instruction is actually "GR+hi(&G)".
-    Hi = DAG.getNode(ISD::ADD, MVT::i32,
-                     DAG.getNode(PPCISD::GlobalBaseReg, MVT::i32), Hi);
+    Hi = DAG.getNode(ISD::ADD, PtrVT,
+                     DAG.getNode(PPCISD::GlobalBaseReg, PtrVT), Hi);
   }
   
-  SDOperand Lo = DAG.getNode(PPCISD::Lo, MVT::i32, CPI, Zero);
-  Lo = DAG.getNode(ISD::ADD, MVT::i32, Hi, Lo);
+  Lo = DAG.getNode(ISD::ADD, PtrVT, Hi, Lo);
   return Lo;
 }
 
 static SDOperand LowerJumpTable(SDOperand Op, SelectionDAG &DAG) {
+  MVT::ValueType PtrVT = Op.getValueType();
   JumpTableSDNode *JT = cast<JumpTableSDNode>(Op);
-  SDOperand JTI = DAG.getTargetJumpTable(JT->getIndex(), MVT::i32);
-  SDOperand Zero = DAG.getConstant(0, MVT::i32);
+  SDOperand JTI = DAG.getTargetJumpTable(JT->getIndex(), PtrVT);
+  SDOperand Zero = DAG.getConstant(0, PtrVT);
   
   const TargetMachine &TM = DAG.getTarget();
-  
+
+  SDOperand Hi = DAG.getNode(PPCISD::Hi, PtrVT, JTI, Zero);
+  SDOperand Lo = DAG.getNode(PPCISD::Lo, PtrVT, JTI, Zero);
+
   // If this is a non-darwin platform, we don't support non-static relo models
   // yet.
   if (TM.getRelocationModel() == Reloc::Static ||
       !TM.getSubtarget<PPCSubtarget>().isDarwin()) {
     // Generate non-pic code that has direct accesses to the constant pool.
     // The address of the global is just (hi(&g)+lo(&g)).
-    SDOperand Hi = DAG.getNode(PPCISD::Hi, MVT::i32, JTI, Zero);
-    SDOperand Lo = DAG.getNode(PPCISD::Lo, MVT::i32, JTI, Zero);
-    return DAG.getNode(ISD::ADD, MVT::i32, Hi, Lo);
+    return DAG.getNode(ISD::ADD, PtrVT, Hi, Lo);
   }
   
-  SDOperand Hi = DAG.getNode(PPCISD::Hi, MVT::i32, JTI, Zero);
   if (TM.getRelocationModel() == Reloc::PIC) {
     // With PIC, the first instruction is actually "GR+hi(&G)".
-    Hi = DAG.getNode(ISD::ADD, MVT::i32,
+    Hi = DAG.getNode(ISD::ADD, PtrVT,
                      DAG.getNode(PPCISD::GlobalBaseReg, MVT::i32), Hi);
   }
   
-  SDOperand Lo = DAG.getNode(PPCISD::Lo, MVT::i32, JTI, Zero);
-  Lo = DAG.getNode(ISD::ADD, MVT::i32, Hi, Lo);
+  Lo = DAG.getNode(ISD::ADD, PtrVT, Hi, Lo);
   return Lo;
 }
 
 static SDOperand LowerGlobalAddress(SDOperand Op, SelectionDAG &DAG) {
+  MVT::ValueType PtrVT = Op.getValueType();
   GlobalAddressSDNode *GSDN = cast<GlobalAddressSDNode>(Op);
   GlobalValue *GV = GSDN->getGlobal();
-  SDOperand GA = DAG.getTargetGlobalAddress(GV, MVT::i32, GSDN->getOffset());
-  SDOperand Zero = DAG.getConstant(0, MVT::i32);
+  SDOperand GA = DAG.getTargetGlobalAddress(GV, PtrVT, GSDN->getOffset());
+  SDOperand Zero = DAG.getConstant(0, PtrVT);
   
   const TargetMachine &TM = DAG.getTarget();
 
+  SDOperand Hi = DAG.getNode(PPCISD::Hi, PtrVT, GA, Zero);
+  SDOperand Lo = DAG.getNode(PPCISD::Lo, PtrVT, GA, Zero);
+
   // If this is a non-darwin platform, we don't support non-static relo models
   // yet.
   if (TM.getRelocationModel() == Reloc::Static ||
       !TM.getSubtarget<PPCSubtarget>().isDarwin()) {
     // Generate non-pic code that has direct accesses to globals.
     // The address of the global is just (hi(&g)+lo(&g)).
-    SDOperand Hi = DAG.getNode(PPCISD::Hi, MVT::i32, GA, Zero);
-    SDOperand Lo = DAG.getNode(PPCISD::Lo, MVT::i32, GA, Zero);
-    return DAG.getNode(ISD::ADD, MVT::i32, Hi, Lo);
+    return DAG.getNode(ISD::ADD, PtrVT, Hi, Lo);
   }
   
-  SDOperand Hi = DAG.getNode(PPCISD::Hi, MVT::i32, GA, Zero);
   if (TM.getRelocationModel() == Reloc::PIC) {
     // With PIC, the first instruction is actually "GR+hi(&G)".
-    Hi = DAG.getNode(ISD::ADD, MVT::i32,
-                     DAG.getNode(PPCISD::GlobalBaseReg, MVT::i32), Hi);
+    Hi = DAG.getNode(ISD::ADD, PtrVT,
+                     DAG.getNode(PPCISD::GlobalBaseReg, PtrVT), Hi);
   }
   
-  SDOperand Lo = DAG.getNode(PPCISD::Lo, MVT::i32, GA, Zero);
-  Lo = DAG.getNode(ISD::ADD, MVT::i32, Hi, Lo);
+  Lo = DAG.getNode(ISD::ADD, PtrVT, Hi, Lo);
   
   if (!GV->hasWeakLinkage() && !GV->hasLinkOnceLinkage() &&
       (!GV->isExternal() || GV->hasNotBeenReadFromBytecode()))
@@ -678,7 +681,7 @@
   
   // If the global is weak or external, we have to go through the lazy
   // resolution stub.
-  return DAG.getLoad(MVT::i32, DAG.getEntryNode(), Lo, DAG.getSrcValue(0));
+  return DAG.getLoad(PtrVT, DAG.getEntryNode(), Lo, DAG.getSrcValue(0));
 }
 
 static SDOperand LowerSETCC(SDOperand Op, SelectionDAG &DAG) {


Index: llvm/lib/Target/PowerPC/PPCInstr64Bit.td
diff -u llvm/lib/Target/PowerPC/PPCInstr64Bit.td:1.1 llvm/lib/Target/PowerPC/PPCInstr64Bit.td:1.2
--- llvm/lib/Target/PowerPC/PPCInstr64Bit.td:1.1	Fri Jun 16 15:22:01 2006
+++ llvm/lib/Target/PowerPC/PPCInstr64Bit.td	Fri Jun 16 16:01:35 2006
@@ -105,6 +105,13 @@
 
 
 let isLoad = 1, PPC970_Unit = 2 in {
+def LWA  : DSForm_1<58, 2, (ops GPRC:$rT, s16immX4:$DS, GPRC:$rA),
+                    "lwa $rT, $DS($rA)", LdStLWA,
+                    []>, isPPC64, PPC970_DGroup_Cracked;
+def LD   : DSForm_2<58, 0, (ops GPRC:$rT, s16immX4:$DS, GPRC:$rA),
+                    "ld $rT, $DS($rA)", LdStLD,
+                    []>, isPPC64;
+
 def LWAX : XForm_1<31, 341, (ops G8RC:$rD, memrr:$src),
                    "lwax $rD, $src", LdStLHA,
                    [(set G8RC:$rD, (sextload xaddr:$src, i32))]>, isPPC64,
@@ -113,23 +120,18 @@
                    "ldx $rD, $src", LdStLD,
                    [(set G8RC:$rD, (load xaddr:$src))]>, isPPC64;
 }
-
-
-// DS-Form instructions.  Load/Store instructions available in PPC-64
-//
-let isLoad = 1, PPC970_Unit = 2 in {
-def LWA  : DSForm_1<58, 2, (ops GPRC:$rT, s16immX4:$DS, GPRC:$rA),
-                    "lwa $rT, $DS($rA)", LdStLWA,
-                    []>, isPPC64, PPC970_DGroup_Cracked;
-def LD   : DSForm_2<58, 0, (ops GPRC:$rT, s16immX4:$DS, GPRC:$rA),
-                    "ld $rT, $DS($rA)", LdStLD,
-                    []>, isPPC64;
-}
 let isStore = 1, noResults = 1, PPC970_Unit = 2 in {
 def STD  : DSForm_2<62, 0, (ops GPRC:$rT, s16immX4:$DS, GPRC:$rA),
                     "std $rT, $DS($rA)", LdStSTD,
                     []>, isPPC64;
 
+def STDX  : XForm_8<31, 149, (ops GPRC:$rS, GPRC:$rA, GPRC:$rB),
+                   "stdx $rS, $rA, $rB", LdStSTD,
+                   []>, isPPC64, PPC970_DGroup_Cracked;
+def STDUX : XForm_8<31, 181, (ops GPRC:$rS, GPRC:$rA, GPRC:$rB),
+                   "stdux $rS, $rA, $rB", LdStSTD,
+                   []>, isPPC64;
+                   
 // STD_32/STDX_32 - Just like STD/STDX, but uses a '32-bit' input register.
 def STD_32  : DSForm_2<62, 0, (ops GPRC:$rT, memrix:$dst),
                        "std $rT, $dst", LdStSTD,
@@ -138,13 +140,6 @@
                        "stdx $rT, $dst", LdStSTD,
                        [(PPCstd_32  GPRC:$rT, xaddr:$dst)]>, isPPC64,
                        PPC970_DGroup_Cracked;
-
-def STDX  : XForm_8<31, 149, (ops GPRC:$rS, GPRC:$rA, GPRC:$rB),
-                   "stdx $rS, $rA, $rB", LdStSTD,
-                   []>, isPPC64, PPC970_DGroup_Cracked;
-def STDUX : XForm_8<31, 181, (ops GPRC:$rS, GPRC:$rA, GPRC:$rB),
-                   "stdux $rS, $rA, $rB", LdStSTD,
-                   []>, isPPC64;
 }
 
 


Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td
diff -u llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.223 llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.224
--- llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.223	Fri Jun 16 15:22:01 2006
+++ llvm/lib/Target/PowerPC/PPCInstrInfo.td	Fri Jun 16 16:01:35 2006
@@ -183,13 +183,13 @@
 def target : Operand<OtherVT> {
   let PrintMethod = "printBranchOperand";
 }
-def calltarget : Operand<i32> {
+def calltarget : Operand<iPTR> {
   let PrintMethod = "printCallOperand";
 }
-def aaddr : Operand<i32> {
+def aaddr : Operand<iPTR> {
   let PrintMethod = "printAbsAddrOperand";
 }
-def piclabel: Operand<i32> {
+def piclabel: Operand<iPTR> {
   let PrintMethod = "printPICLabel";
 }
 def symbolHi: Operand<i32> {
@@ -202,27 +202,27 @@
   let PrintMethod = "printcrbitm";
 }
 // Address operands
-def memri : Operand<i32> {
+def memri : Operand<iPTR> {
   let PrintMethod = "printMemRegImm";
   let NumMIOperands = 2;
   let MIOperandInfo = (ops i32imm, GPRC);
 }
-def memrr : Operand<i32> {
+def memrr : Operand<iPTR> {
   let PrintMethod = "printMemRegReg";
   let NumMIOperands = 2;
   let MIOperandInfo = (ops GPRC, GPRC);
 }
-def memrix : Operand<i32> {   // memri where the imm is shifted 2 bits.
+def memrix : Operand<iPTR> {   // memri where the imm is shifted 2 bits.
   let PrintMethod = "printMemRegImmShifted";
   let NumMIOperands = 2;
   let MIOperandInfo = (ops i32imm, GPRC);
 }
 
 // Define PowerPC specific addressing mode.
-def iaddr  : ComplexPattern<i32, 2, "SelectAddrImm",    []>;
-def xaddr  : ComplexPattern<i32, 2, "SelectAddrIdx",    []>;
-def xoaddr : ComplexPattern<i32, 2, "SelectAddrIdxOnly",[]>;
-def ixaddr : ComplexPattern<i32, 2, "SelectAddrImmShift", []>; // "std"
+def iaddr  : ComplexPattern<iPTR, 2, "SelectAddrImm",    []>;
+def xaddr  : ComplexPattern<iPTR, 2, "SelectAddrIdx",    []>;
+def xoaddr : ComplexPattern<iPTR, 2, "SelectAddrIdxOnly",[]>;
+def ixaddr : ComplexPattern<iPTR, 2, "SelectAddrImmShift", []>; // "std"
 
 //===----------------------------------------------------------------------===//
 // PowerPC Instruction Predicate Definitions.
@@ -957,6 +957,5 @@
 def : Pat<(f64 (extload xaddr:$src, f32)),
           (FMRSD (LFSX xaddr:$src))>;
 
-
 include "PPCInstrAltivec.td"
 include "PPCInstr64Bit.td"





From lattner at cs.uiuc.edu  Fri Jun 16 16:29:15 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 16 Jun 2006 16:29:15 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCInstrInfo.td 
Message-ID: <200606162129.QAA12006@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/PowerPC:

PPCInstrInfo.td updated: 1.224 -> 1.225
---
Log message:

In 64-bit mode, addr mode operands use G8RC instead of GPRC.


---
Diffs of the changes:  (+3 -3)

 PPCInstrInfo.td |    6 +++---
 1 files changed, 3 insertions(+), 3 deletions(-)


Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td
diff -u llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.224 llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.225
--- llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.224	Fri Jun 16 16:01:35 2006
+++ llvm/lib/Target/PowerPC/PPCInstrInfo.td	Fri Jun 16 16:29:03 2006
@@ -205,17 +205,17 @@
 def memri : Operand<iPTR> {
   let PrintMethod = "printMemRegImm";
   let NumMIOperands = 2;
-  let MIOperandInfo = (ops i32imm, GPRC);
+  let MIOperandInfo = (ops i32imm, ptr_rc);
 }
 def memrr : Operand<iPTR> {
   let PrintMethod = "printMemRegReg";
   let NumMIOperands = 2;
-  let MIOperandInfo = (ops GPRC, GPRC);
+  let MIOperandInfo = (ops ptr_rc, ptr_rc);
 }
 def memrix : Operand<iPTR> {   // memri where the imm is shifted 2 bits.
   let PrintMethod = "printMemRegImmShifted";
   let NumMIOperands = 2;
-  let MIOperandInfo = (ops i32imm, GPRC);
+  let MIOperandInfo = (ops i32imm, ptr_rc);
 }
 
 // Define PowerPC specific addressing mode.





From lattner at cs.uiuc.edu  Fri Jun 16 16:29:53 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 16 Jun 2006 16:29:53 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCInstr64Bit.td 
Message-ID: <200606162129.QAA12041@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/PowerPC:

PPCInstr64Bit.td updated: 1.2 -> 1.3
---
Log message:

Upgrade some load/store instructions to use the proper addressing mode stuff.


---
Diffs of the changes:  (+10 -10)

 PPCInstr64Bit.td |   20 ++++++++++----------
 1 files changed, 10 insertions(+), 10 deletions(-)


Index: llvm/lib/Target/PowerPC/PPCInstr64Bit.td
diff -u llvm/lib/Target/PowerPC/PPCInstr64Bit.td:1.2 llvm/lib/Target/PowerPC/PPCInstr64Bit.td:1.3
--- llvm/lib/Target/PowerPC/PPCInstr64Bit.td:1.2	Fri Jun 16 16:01:35 2006
+++ llvm/lib/Target/PowerPC/PPCInstr64Bit.td	Fri Jun 16 16:29:41 2006
@@ -105,11 +105,11 @@
 
 
 let isLoad = 1, PPC970_Unit = 2 in {
-def LWA  : DSForm_1<58, 2, (ops GPRC:$rT, s16immX4:$DS, GPRC:$rA),
-                    "lwa $rT, $DS($rA)", LdStLWA,
+def LWA  : DSForm_1<58, 2, (ops G8RC:$rT, memrix:$src),
+                    "lwa $rT, $src", LdStLWA,
                     []>, isPPC64, PPC970_DGroup_Cracked;
-def LD   : DSForm_2<58, 0, (ops GPRC:$rT, s16immX4:$DS, GPRC:$rA),
-                    "ld $rT, $DS($rA)", LdStLD,
+def LD   : DSForm_2<58, 0, (ops G8RC:$rT, memrix:$src),
+                    "ld $rT, $src", LdStLD,
                     []>, isPPC64;
 
 def LWAX : XForm_1<31, 341, (ops G8RC:$rD, memrr:$src),
@@ -121,15 +121,15 @@
                    [(set G8RC:$rD, (load xaddr:$src))]>, isPPC64;
 }
 let isStore = 1, noResults = 1, PPC970_Unit = 2 in {
-def STD  : DSForm_2<62, 0, (ops GPRC:$rT, s16immX4:$DS, GPRC:$rA),
-                    "std $rT, $DS($rA)", LdStSTD,
+def STD  : DSForm_2<62, 0, (ops G8RC:$rT, memrix:$src),
+                    "std $rT, $src", LdStSTD,
                     []>, isPPC64;
 
-def STDX  : XForm_8<31, 149, (ops GPRC:$rS, GPRC:$rA, GPRC:$rB),
-                   "stdx $rS, $rA, $rB", LdStSTD,
+def STDX  : XForm_8<31, 149, (ops GPRC:$rS, memrr:$dst),
+                   "stdx $rS, $dst", LdStSTD,
                    []>, isPPC64, PPC970_DGroup_Cracked;
-def STDUX : XForm_8<31, 181, (ops GPRC:$rS, GPRC:$rA, GPRC:$rB),
-                   "stdux $rS, $rA, $rB", LdStSTD,
+def STDUX : XForm_8<31, 181, (ops GPRC:$rS, memrr:$dst),
+                   "stdux $rS, $dst", LdStSTD,
                    []>, isPPC64;
                    
 // STD_32/STDX_32 - Just like STD/STDX, but uses a '32-bit' input register.





From lattner at cs.uiuc.edu  Fri Jun 16 16:48:11 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 16 Jun 2006 16:48:11 -0500
Subject: [llvm-commits] CVS: llvm/Makefile.rules 
Message-ID: <200606162148.QAA12286@zion.cs.uiuc.edu>



Changes in directory llvm:

Makefile.rules updated: 1.379 -> 1.380
---
Log message:

Do not hardcode random paths into the makefile.  Make the user specify the
SDK to use when building "universal" on Mac OS/X, if they want to use a
specific one.


---
Diffs of the changes:  (+11 -5)

 Makefile.rules |   16 +++++++++++-----
 1 files changed, 11 insertions(+), 5 deletions(-)


Index: llvm/Makefile.rules
diff -u llvm/Makefile.rules:1.379 llvm/Makefile.rules:1.380
--- llvm/Makefile.rules:1.379	Thu Jun 15 12:31:22 2006
+++ llvm/Makefile.rules	Fri Jun 16 16:47:59 2006
@@ -370,13 +370,19 @@
 
 # If we are building a universal binary on Mac OS/X, pass extra options.  This
 # is useful to people that want to link the LLVM libraries into their universal
-# apps.
+# apps.  The UNIVERSAL_SDK_PATH variable can optionally be specified as a path
+# to the SDK to use.  For Mac OS/X 10.4 Intel machines, the traditional one is:
+#   UNIVERSAL_SDK_PATH=/Developer/SDKs/MacOSX10.4u.sdk/
 ifdef UNIVERSAL
-  CompileCommonOpts += \
-      -arch i386 -arch ppc -isysroot /Developer/SDKs/MacOSX10.4u.sdk/
+  CompileCommonOpts += -arch i386 -arch ppc
   Relink.Flags := -XCClinker -arch -XCClinker i386 -XCClinker -arch \
-      -XCClinker ppc -XCClinker \
-      -isysroot -XCClinker /Developer/SDKs/MacOSX10.4u.sdk/
+                  -XCClinker ppc
+  ifdef UNIVERSAL_SDK_PATH
+    CompileCommonOpts += -isysroot $(UNIVERSAL_SDK_PATH)
+    Relink.Flags      += -XCClinker -isysroot -XCClinker $(UNIVERSAL_SDK_PATH)
+  endif
+
+  # Building universal cannot compute dependencies automatically.
   DISABLE_AUTO_DEPENDENCIES=1
 endif
 





From evan.cheng at apple.com  Fri Jun 16 16:59:01 2006
From: evan.cheng at apple.com (Evan Cheng)
Date: Fri, 16 Jun 2006 16:59:01 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86Subtarget.cpp 
Message-ID: <200606162159.QAA12455@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/X86:

X86Subtarget.cpp updated: 1.27 -> 1.28
---
Log message:

Later models likely to have Yonah like attributes.


---
Diffs of the changes:  (+2 -1)

 X86Subtarget.cpp |    3 ++-
 1 files changed, 2 insertions(+), 1 deletion(-)


Index: llvm/lib/Target/X86/X86Subtarget.cpp
diff -u llvm/lib/Target/X86/X86Subtarget.cpp:1.27 llvm/lib/Target/X86/X86Subtarget.cpp:1.28
--- llvm/lib/Target/X86/X86Subtarget.cpp:1.27	Thu May 25 16:59:08 2006
+++ llvm/lib/Target/X86/X86Subtarget.cpp	Fri Jun 16 16:58:49 2006
@@ -90,7 +90,8 @@
         case 9:
         case 13: return "pentium-m";
         case 14: return "yonah";
-        default: return "i686";
+        default:
+          return (Model > 14) ? "yonah" : "i686";
         }
       case 15: {
         switch (Model) {





From jlaskey at apple.com  Fri Jun 16 18:20:34 2006
From: jlaskey at apple.com (Jim Laskey)
Date: Fri, 16 Jun 2006 18:20:34 -0500
Subject: [llvm-commits] CVS: llvm/docs/GettingStarted.html 
Message-ID: <200606162320.SAA13147@zion.cs.uiuc.edu>



Changes in directory llvm/docs:

GettingStarted.html updated: 1.134 -> 1.135
---
Log message:

Include information about svn repository for llvm-gcc4.


---
Diffs of the changes:  (+5 -1)

 GettingStarted.html |    6 +++++-
 1 files changed, 5 insertions(+), 1 deletion(-)


Index: llvm/docs/GettingStarted.html
diff -u llvm/docs/GettingStarted.html:1.134 llvm/docs/GettingStarted.html:1.135
--- llvm/docs/GettingStarted.html:1.134	Fri Jun 16 14:53:39 2006
+++ llvm/docs/GettingStarted.html	Fri Jun 16 18:20:21 2006
@@ -640,6 +640,10 @@
   <dd>Binary release of the llvm-gcc4 front end for MacOS X/X86.<br/></dd>
 </dl>
 
+<p>It is also possible to download the sources of the llvm-gcc4 front end from
+a read-only subversion mirror at svn://anonsvn.opensource.apple.com/svn/llvm.
+</p>
+
 </div>
 
 <!-- ======================================================================= -->
@@ -1539,7 +1543,7 @@
   <a href="mailto:sabre at nondot.org">Chris Lattner</a><br>
   <a href="http://llvm.x10sys.com/rspencer/">Reid Spencer</a><br>
   <a href="http://llvm.org">The LLVM Compiler Infrastructure</a><br>
-  Last modified: $Date: 2006/06/16 19:53:39 $
+  Last modified: $Date: 2006/06/16 23:20:21 $
 </address>
 </body>
 </html>





From jlaskey at apple.com  Fri Jun 16 18:35:01 2006
From: jlaskey at apple.com (Jim Laskey)
Date: Fri, 16 Jun 2006 18:35:01 -0500
Subject: [llvm-commits] CVS: llvm/docs/CFEBuildInstrs.html 
Message-ID: <200606162335.SAA13273@zion.cs.uiuc.edu>



Changes in directory llvm/docs:

CFEBuildInstrs.html updated: 1.56 -> 1.57
---
Log message:

Include information of svn repository for llvm-gcc4.


---
Diffs of the changes:  (+17 -1)

 CFEBuildInstrs.html |   18 +++++++++++++++++-
 1 files changed, 17 insertions(+), 1 deletion(-)


Index: llvm/docs/CFEBuildInstrs.html
diff -u llvm/docs/CFEBuildInstrs.html:1.56 llvm/docs/CFEBuildInstrs.html:1.57
--- llvm/docs/CFEBuildInstrs.html:1.56	Mon Mar 13 23:39:39 2006
+++ llvm/docs/CFEBuildInstrs.html	Fri Jun 16 18:34:49 2006
@@ -101,6 +101,22 @@
 <div class="doc_text">
 <p>
 <ol>
+<li>
+<p>Retrieve the appropriate llvm-gcc4-x.y.source.tar.gz archive from the llvm
+web site.</p>
+<p>It is also possible to download the sources of the llvm-gcc4 front end from
+a read-only mirror using subversion.  To check out the code the first time use;
+</p>
+
+<tt>svn co svn://anonsvn.opensource.apple.com/svn/llvm <i>dst-directory</i></tt>
+
+<p>After that, the code can be be updated in the destination directory using;
+</p>
+
+<tt>svn update</tt>
+
+<p>The mirror is brought up to date every evening.</p>
+</li>
 <li><p>Configure and build the LLVM libraries and tools. There are two ways to
 do this: either with <i>objdir</i> == <i>srcdir</i> or
 <i>objdir</i> != <i>srcdir</i>. It is recommended 
@@ -357,7 +373,7 @@
 
   Brian Gaeke<br>
   <a href="http://llvm.org">LLVM Compiler Infrastructure</a><br>
-  Last modified: $Date: 2006/03/14 05:39:39 $
+  Last modified: $Date: 2006/06/16 23:34:49 $
 </address>
 
 </body>





From jlaskey at apple.com  Fri Jun 16 18:36:24 2006
From: jlaskey at apple.com (Jim Laskey)
Date: Fri, 16 Jun 2006 18:36:24 -0500
Subject: [llvm-commits] CVS: llvm/lib/VMCore/IntrinsicInst.cpp 
Message-ID: <200606162336.SAA13287@zion.cs.uiuc.edu>



Changes in directory llvm/lib/VMCore:

IntrinsicInst.cpp updated: 1.6 -> 1.7
---
Log message:

Forgot operands were hard coded for compile unit.


---
Diffs of the changes:  (+2 -2)

 IntrinsicInst.cpp |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)


Index: llvm/lib/VMCore/IntrinsicInst.cpp
diff -u llvm/lib/VMCore/IntrinsicInst.cpp:1.6 llvm/lib/VMCore/IntrinsicInst.cpp:1.7
--- llvm/lib/VMCore/IntrinsicInst.cpp:1.6	Wed Jun  7 17:00:26 2006
+++ llvm/lib/VMCore/IntrinsicInst.cpp	Fri Jun 16 18:36:12 2006
@@ -61,13 +61,13 @@
 std::string DbgStopPointInst::getFileName() const {
   GlobalVariable *GV = cast<GlobalVariable>(getContext());
   ConstantStruct *CS = cast<ConstantStruct>(GV->getInitializer());
-  return CS->getOperand(4)->getStringValue();
+  return CS->getOperand(3)->getStringValue();
 }
 
 std::string DbgStopPointInst::getDirectory() const {
   GlobalVariable *GV = cast<GlobalVariable>(getContext());
   ConstantStruct *CS = cast<ConstantStruct>(GV->getInitializer());
-  return CS->getOperand(5)->getStringValue();
+  return CS->getOperand(4)->getStringValue();
 }
 
 //===----------------------------------------------------------------------===//





From lattner at cs.uiuc.edu  Fri Jun 16 19:01:16 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 16 Jun 2006 19:01:16 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
	PPCInstrInfo.h PPCTargetMachine.cpp 
Message-ID: <200606170001.TAA13454@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/PowerPC:

PPCInstrInfo.cpp updated: 1.20 -> 1.21
PPCInstrInfo.h updated: 1.15 -> 1.16
PPCTargetMachine.cpp updated: 1.94 -> 1.95
---
Log message:

Implement the getPointerRegClass method, which is required for the ptr_rc
magic to work.


---
Diffs of the changes:  (+20 -6)

 PPCInstrInfo.cpp     |   16 +++++++++++++---
 PPCInstrInfo.h       |    8 ++++++--
 PPCTargetMachine.cpp |    2 +-
 3 files changed, 20 insertions(+), 6 deletions(-)


Index: llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
diff -u llvm/lib/Target/PowerPC/PPCInstrInfo.cpp:1.20 llvm/lib/Target/PowerPC/PPCInstrInfo.cpp:1.21
--- llvm/lib/Target/PowerPC/PPCInstrInfo.cpp:1.20	Thu May  4 12:52:23 2006
+++ llvm/lib/Target/PowerPC/PPCInstrInfo.cpp	Fri Jun 16 19:01:04 2006
@@ -13,13 +13,23 @@
 
 #include "PPCInstrInfo.h"
 #include "PPCGenInstrInfo.inc"
-#include "PPC.h"
+#include "PPCTargetMachine.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
 #include <iostream>
 using namespace llvm;
 
-PPCInstrInfo::PPCInstrInfo()
-  : TargetInstrInfo(PPCInsts, sizeof(PPCInsts)/sizeof(PPCInsts[0])) {}
+PPCInstrInfo::PPCInstrInfo(PPCTargetMachine &tm)
+  : TargetInstrInfo(PPCInsts, sizeof(PPCInsts)/sizeof(PPCInsts[0])), TM(tm) {}
+
+/// getPointerRegClass - Return the register class to use to hold pointers.
+/// This is used for addressing modes.
+const TargetRegisterClass *PPCInstrInfo::getPointerRegClass() const {
+  if (TM.getSubtargetImpl()->isPPC64())
+    return &PPC::G8RCRegClass;
+  else
+    return &PPC::GPRCRegClass;
+}
+
 
 bool PPCInstrInfo::isMoveInstr(const MachineInstr& MI,
                                unsigned& sourceReg,


Index: llvm/lib/Target/PowerPC/PPCInstrInfo.h
diff -u llvm/lib/Target/PowerPC/PPCInstrInfo.h:1.15 llvm/lib/Target/PowerPC/PPCInstrInfo.h:1.16
--- llvm/lib/Target/PowerPC/PPCInstrInfo.h:1.15	Wed May 24 12:04:04 2006
+++ llvm/lib/Target/PowerPC/PPCInstrInfo.h	Fri Jun 16 19:01:04 2006
@@ -62,9 +62,10 @@
   
   
 class PPCInstrInfo : public TargetInstrInfo {
+  PPCTargetMachine &TM;
   const PPCRegisterInfo RI;
 public:
-  PPCInstrInfo();
+  PPCInstrInfo(PPCTargetMachine &TM);
 
   /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info.  As
   /// such, whenever a client has an instance of instruction info, it should
@@ -72,7 +73,10 @@
   ///
   virtual const MRegisterInfo &getRegisterInfo() const { return RI; }
 
-  //
+  /// getPointerRegClass - Return the register class to use to hold pointers.
+  /// This is used for addressing modes.
+  virtual const TargetRegisterClass *getPointerRegClass() const;  
+
   // Return true if the instruction is a register to register move and
   // leave the source and dest operands in the passed parameters.
   //


Index: llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
diff -u llvm/lib/Target/PowerPC/PPCTargetMachine.cpp:1.94 llvm/lib/Target/PowerPC/PPCTargetMachine.cpp:1.95
--- llvm/lib/Target/PowerPC/PPCTargetMachine.cpp:1.94	Fri Jun 16 13:50:48 2006
+++ llvm/lib/Target/PowerPC/PPCTargetMachine.cpp	Fri Jun 16 19:01:04 2006
@@ -87,7 +87,7 @@
 PPCTargetMachine::PPCTargetMachine(const Module &M, const std::string &FS,
                                    bool is64Bit)
   : TargetMachine("PowerPC"), Subtarget(M, FS, is64Bit),
-    DataLayout(Subtarget.getTargetDataString()),
+    DataLayout(Subtarget.getTargetDataString()), InstrInfo(*this),
     FrameInfo(*this, false), JITInfo(*this), TLInfo(*this),
     InstrItins(Subtarget.getInstrItineraryData()) {
 





From evan.cheng at apple.com  Fri Jun 16 19:46:02 2006
From: evan.cheng at apple.com (Evan Cheng)
Date: Fri, 16 Jun 2006 19:46:02 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/README.txt 
Message-ID: <200606170046.TAA13882@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/X86:

README.txt updated: 1.117 -> 1.118
---
Log message:

A new entry.

---
Diffs of the changes:  (+2 -0)

 README.txt |    2 ++
 1 files changed, 2 insertions(+)


Index: llvm/lib/Target/X86/README.txt
diff -u llvm/lib/Target/X86/README.txt:1.117 llvm/lib/Target/X86/README.txt:1.118
--- llvm/lib/Target/X86/README.txt:1.117	Thu Jun 15 16:33:31 2006
+++ llvm/lib/Target/X86/README.txt	Fri Jun 16 19:45:49 2006
@@ -702,3 +702,5 @@
 Smells like a register coallescing/reassociation issue.
 
 //===---------------------------------------------------------------------===//
+
+Use cpuid to auto-detect CPU features such as SSE, SSE2, and SSE3.





From lattner at cs.uiuc.edu  Fri Jun 16 20:01:42 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 16 Jun 2006 20:01:42 -0500
Subject: [llvm-commits] 
	CVS: llvm/test/Regression/Transforms/IndVarsSimplify/2006-06-16-Indvar-LCSSA-Crash.ll
Message-ID: <200606170101.UAA14082@zion.cs.uiuc.edu>



Changes in directory llvm/test/Regression/Transforms/IndVarsSimplify:

2006-06-16-Indvar-LCSSA-Crash.ll added (r1.1)
---
Log message:

new testcase that crashes indvars


---
Diffs of the changes:  (+21 -0)

 2006-06-16-Indvar-LCSSA-Crash.ll |   21 +++++++++++++++++++++
 1 files changed, 21 insertions(+)


Index: llvm/test/Regression/Transforms/IndVarsSimplify/2006-06-16-Indvar-LCSSA-Crash.ll
diff -c /dev/null llvm/test/Regression/Transforms/IndVarsSimplify/2006-06-16-Indvar-LCSSA-Crash.ll:1.1
*** /dev/null	Fri Jun 16 20:01:40 2006
--- llvm/test/Regression/Transforms/IndVarsSimplify/2006-06-16-Indvar-LCSSA-Crash.ll	Fri Jun 16 20:01:30 2006
***************
*** 0 ****
--- 1,21 ----
+ ; RUN: llvm-as < %s | opt -indvars -disable-output
+ 
+ void %get_block() {
+ endif.0:		; preds = %entry
+ 	br label %no_exit.30
+ 
+ no_exit.30:		; preds = %no_exit.30, %endif.0
+ 	%x.12.0 = phi int [ %inc.28, %no_exit.30 ], [ -2, %endif.0 ]		; <int> [#uses=1]
+ 	%tmp.583 = load ushort* null		; <ushort> [#uses=1]
+ 	%tmp.584 = cast ushort %tmp.583 to int		; <int> [#uses=1]
+ 	%tmp.588 = load int* null		; <int> [#uses=1]
+ 	%tmp.589 = mul int %tmp.584, %tmp.588		; <int> [#uses=1]
+ 	%tmp.591 = add int %tmp.589, 0		; <int> [#uses=1]
+ 	%inc.28 = add int %x.12.0, 1		; <int> [#uses=2]
+ 	%tmp.565 = setgt int %inc.28, 3		; <bool> [#uses=1]
+ 	br bool %tmp.565, label %loopexit.30, label %no_exit.30
+ 
+ loopexit.30:		; preds = %no_exit.30
+ 	%tmp.591.lcssa = phi int [ %tmp.591, %no_exit.30 ]		; <int> [#uses=0]
+ 	ret void
+ }





From lattner at cs.uiuc.edu  Fri Jun 16 20:02:44 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Fri, 16 Jun 2006 20:02:44 -0500
Subject: [llvm-commits] CVS: llvm/lib/Transforms/Scalar/IndVarSimplify.cpp 
Message-ID: <200606170102.UAA14094@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Transforms/Scalar:

IndVarSimplify.cpp updated: 1.82 -> 1.83
---
Log message:

Fix IndVarsSimplify/2006-06-16-Indvar-LCSSA-Crash.ll, a case where a 
"LCSSA" phi node causes indvars to break dominance properties.  This fixes
causes indvars to avoid inserting aggressive code in this case, instead
indvars should be fixed to be more aggressive in the face of lcssa phi's.


---
Diffs of the changes:  (+19 -4)

 IndVarSimplify.cpp |   23 +++++++++++++++++++----
 1 files changed, 19 insertions(+), 4 deletions(-)


Index: llvm/lib/Transforms/Scalar/IndVarSimplify.cpp
diff -u llvm/lib/Transforms/Scalar/IndVarSimplify.cpp:1.82 llvm/lib/Transforms/Scalar/IndVarSimplify.cpp:1.83
--- llvm/lib/Transforms/Scalar/IndVarSimplify.cpp:1.82	Fri Nov 18 12:30:47 2005
+++ llvm/lib/Transforms/Scalar/IndVarSimplify.cpp	Fri Jun 16 20:02:31 2006
@@ -321,11 +321,26 @@
               HasConstantItCount) {
             // Find out if this predictably varying value is actually used
             // outside of the loop.  "extra" as opposed to "intra".
-            std::vector<User*> ExtraLoopUsers;
+            std::vector<Instruction*> ExtraLoopUsers;
             for (Value::use_iterator UI = I->use_begin(), E = I->use_end();
-                 UI != E; ++UI)
-              if (!L->contains(cast<Instruction>(*UI)->getParent()))
-                ExtraLoopUsers.push_back(*UI);
+                 UI != E; ++UI) {
+              Instruction *User = cast<Instruction>(*UI);
+              if (!L->contains(User->getParent())) {
+                // If this is a PHI node in the exit block and we're inserting,
+                // into the exit block, it must have a single entry.  In this
+                // case, we can't insert the code after the PHI and have the PHI
+                // still use it.  Instead, don't insert the the PHI.
+                if (PHINode *PN = dyn_cast<PHINode>(User)) {
+                  // FIXME: This is a case where LCSSA pessimizes code, this
+                  // should be fixed better.
+                  if (PN->getNumOperands() == 2 && 
+                      PN->getParent() == BlockToInsertInto)
+                    continue;
+                }
+                ExtraLoopUsers.push_back(User);
+              }
+            }
+            
             if (!ExtraLoopUsers.empty()) {
               // Okay, this instruction has a user outside of the current loop
               // and varies predictably in this loop.  Evaluate the value it





From evan.cheng at apple.com  Fri Jun 16 20:42:33 2006
From: evan.cheng at apple.com (Evan Cheng)
Date: Fri, 16 Jun 2006 20:42:33 -0500
Subject: [llvm-commits] CVS: llvm/include/llvm/Target/TargetInstrInfo.h 
Message-ID: <200606170142.UAA14432@zion.cs.uiuc.edu>



Changes in directory llvm/include/llvm/Target:

TargetInstrInfo.h updated: 1.89 -> 1.90
---
Log message:

Clean up

---
Diffs of the changes:  (+1 -2)

 TargetInstrInfo.h |    3 +--
 1 files changed, 1 insertion(+), 2 deletions(-)


Index: llvm/include/llvm/Target/TargetInstrInfo.h
diff -u llvm/include/llvm/Target/TargetInstrInfo.h:1.89 llvm/include/llvm/Target/TargetInstrInfo.h:1.90
--- llvm/include/llvm/Target/TargetInstrInfo.h:1.89	Thu Jun 15 03:10:27 2006
+++ llvm/include/llvm/Target/TargetInstrInfo.h	Fri Jun 16 20:42:20 2006
@@ -149,8 +149,7 @@
   const TargetRegisterClass
   *getInstrOperandRegClass(const TargetInstrDescriptor *II, unsigned Op) const {
     if (Op >= II->numOperands) {
-      if (!(II->Flags & M_VARIABLE_OPS))
-        assert(false && "Invalid operand # of instruction");
+      assert((II->Flags & M_VARIABLE_OPS)&& "Invalid operand # of instruction");
       return NULL;
     }
     const TargetOperandInfo &toi = II->OpInfo[Op];





From lattner at cs.uiuc.edu  Sat Jun 17 03:07:02 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sat, 17 Jun 2006 03:07:02 -0500
Subject: [llvm-commits] CVS: llvm/test/TestRunner.sh 
Message-ID: <200606170807.DAA10624@zion.cs.uiuc.edu>



Changes in directory llvm/test:

TestRunner.sh updated: 1.11 -> 1.12
---
Log message:

Just a minor tweak so you can run things like:

TestRunner.sh Foo/Bar/test.ll

instead of just

TestRunner.sh test.ll

which is convenient in conjunction with find.



---
Diffs of the changes:  (+2 -1)

 TestRunner.sh |    3 ++-
 1 files changed, 2 insertions(+), 1 deletion(-)


Index: llvm/test/TestRunner.sh
diff -u llvm/test/TestRunner.sh:1.11 llvm/test/TestRunner.sh:1.12
--- llvm/test/TestRunner.sh:1.11	Wed Mar  8 16:28:19 2006
+++ llvm/test/TestRunner.sh	Sat Jun 17 03:06:33 2006
@@ -13,7 +13,8 @@
 FILENAME=$1
 TESTNAME=$1
 SUBST=$1
-OUTPUT=Output/$FILENAME.out
+FILENAME_ONLY=`basename $1`
+OUTPUT=Output/$FILENAME_ONLY.out
 
 # create the output directory if it does not already exist
 mkdir Output > /dev/null 2>&1





From lattner at cs.uiuc.edu  Sat Jun 17 13:18:05 2006
From: lattner at cs.uiuc.edu (Chris Lattner)
Date: Sat, 17 Jun 2006 13:18:05 -0500
Subject: [llvm-commits] CVS: llvm/lib/Analysis/ConstantFolding.cpp 
Message-ID: <200606171818.NAA26373@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Analysis:

ConstantFolding.cpp updated: 1.3 -> 1.4
---
Log message:

Constant fold sqrtf


---
Diffs of the changes:  (+4 -1)

 ConstantFolding.cpp |    5 ++++-
 1 files changed, 4 insertions(+), 1 deletion(-)


Index: llvm/lib/Analysis/ConstantFolding.cpp
diff -u llvm/lib/Analysis/ConstantFolding.cpp:1.3 llvm/lib/Analysis/ConstantFolding.cpp:1.4
--- llvm/lib/Analysis/ConstantFolding.cpp:1.3	Mon Jan 16 15:12:35 2006
+++ llvm/lib/Analysis/ConstantFolding.cpp	Sat Jun 17 13:17:52 2006
@@ -76,7 +76,8 @@
     case 'p':
       return Name == "pow";
     case 's':
-      return Name == "sin" || Name == "sinh" || Name == "sqrt";
+      return Name == "sin" || Name == "sinh" || 
+             Name == "sqrt" || Name == "sqrtf";
     case 't':
       return Name == "tan" || Name == "tanh";
     default:
@@ -150,6 +151,8 @@
             return ConstantFP::get(Ty, sinh(V));
           else if (Name == "sqrt" && V >= 0)
             return ConstantFP::get(Ty, sqrt(V));
+          else if (Name == "sqrtf" && V >= 0)
+            return ConstantFP::get(Ty, sqrt((float)V));
           break;
         case 't':
           if (Name == "tan")





From rafael.espindola at gmail.com  Sat Jun 17 19:08:20 2006
From: rafael.espindola at gmail.com (Rafael Espindola)
Date: Sat, 17 Jun 2006 19:08:20 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/ARM/ARMInstrInfo.td
	ARMRegisterInfo.cpp ARMRegisterInfo.td 
Message-ID: <200606180008.TAA29673@zion.cs.uiuc.edu>



Changes in directory llvm/lib/Target/ARM:

ARMInstrInfo.td updated: 1.4 -> 1.5
ARMRegisterInfo.cpp updated: 1.3 -> 1.4
ARMRegisterInfo.td updated: 1.1 -> 1.2
---
Log message:

initial implementation of ARMRegisterInfo::eliminateFrameIndex
fixes test/Regression/CodeGen/ARM/ret_arg5.ll



---
Diffs of the changes:  (+34 -2)

 ARMInstrInfo.td     |    4 ++++
 ARMRegisterInfo.cpp |   24 +++++++++++++++++++++++-
 ARMRegisterInfo.td  |    8 +++++++-
 3 files changed, 34 insertions(+), 2 deletions(-)


Index: llvm/lib/Target/ARM/ARMInstrInfo.td
diff -u llvm/lib/Target/ARM/ARMInstrInfo.td:1.4 llvm/lib/Target/ARM/ARMInstrInfo.td:1.5
--- llvm/lib/Target/ARM/ARMInstrInfo.td:1.4	Tue May 30 12:33:19 2006
+++ llvm/lib/Target/ARM/ARMInstrInfo.td	Sat Jun 17 19:08:07 2006
@@ -53,3 +53,7 @@
 
 def movri   : InstARM<(ops IntRegs:$dst, i32imm:$src),
                        "mov $dst, $src", [(set IntRegs:$dst, imm:$src)]>;
+
+def addri   : InstARM<(ops IntRegs:$dst, IntRegs:$a, i32imm:$b),
+                       "add $dst, $a, $b",
+		       [(set IntRegs:$dst, (add IntRegs:$a, imm:$b))]>;


Index: llvm/lib/Target/ARM/ARMRegisterInfo.cpp
diff -u llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.3 llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.4
--- llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.3	Thu May 18 16:45:49 2006
+++ llvm/lib/Target/ARM/ARMRegisterInfo.cpp	Sat Jun 17 19:08:07 2006
@@ -77,7 +77,29 @@
 
 void
 ARMRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II) const {
-  assert(0 && "Not Implemented");
+  MachineInstr &MI = *II;
+  MachineBasicBlock &MBB = *MI.getParent();
+  MachineFunction &MF = *MBB.getParent();
+
+  assert (MI.getOpcode() == ARM::movrr);
+
+  unsigned FrameIdx = 1;
+
+  int FrameIndex = MI.getOperand(FrameIdx).getFrameIndex();
+
+  int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex);
+
+  unsigned StackSize = MF.getFrameInfo()->getStackSize();
+
+  Offset += StackSize;
+
+  // Insert a set of r12 with the full address
+  // r12 = r13 + offset
+  MachineBasicBlock *MBB2 = MI.getParent();
+  BuildMI(*MBB2, II, ARM::addri, 2, ARM::R12).addReg(ARM::R13).addImm(Offset);
+
+  // Replace the FrameIndex with r12
+  MI.getOperand(FrameIdx).ChangeToRegister(ARM::R12);
 }
 
 void ARMRegisterInfo::


Index: llvm/lib/Target/ARM/ARMRegisterInfo.td
diff -u llvm/lib/Target/ARM/ARMRegisterInfo.td:1.1 llvm/lib/Target/ARM/ARMRegisterInfo.td:1.2
--- llvm/lib/Target/ARM/ARMRegisterInfo.td:1.1	Sun May 14 17:18:28 2006
+++ llvm/lib/Target/ARM/ARMRegisterInfo.td	Sat Jun 17 19:08:07 2006
@@ -50,7 +50,13 @@
   let MethodBodies = [{
     IntRegsClass::iterator
     IntRegsClass::allocation_order_end(MachineFunction &MF) const {
-      return end() - 1;
+      // r15 == Program Counter
+      // r14 == Link Register
+      // r13 == Stack Pointer
+      // r12 == ip (scratch)
+      // r11 == Frame Pointer
+      // r10 == Stack Limit
+      return end() - 4;
     }
   }];
 }





From rafael.espindola at gmail.com  Sat Jun 17 19:08:21 2006
From: rafael.espindola at gmail.com (Rafael Espindola)
Date: Sat, 17 Jun 2006 19:08:21 -0500
Subject: [llvm-commits] CVS: llvm/test/Regression/CodeGen/ARM/ret_arg5.ll 
Message-ID: <200606180008.TAA29677@zion.cs.uiuc.edu>



Changes in directory llvm/test/Regression/CodeGen/ARM:

ret_arg5.ll updated: 1.2 -> 1.3
---
Log message:

initial implementation of ARMRegisterInfo::eliminateFrameIndex
fixes test/Regression/CodeGen/ARM/ret_arg5.ll



---
Diffs of the changes:  (+0 -1)

 ret_arg5.ll |    1 -
 1 files changed, 1 deletion(-)


Index: llvm/test/Regression/CodeGen/ARM/ret_arg5.ll
diff -u llvm/test/Regression/CodeGen/ARM/ret_arg5.ll:1.2 llvm/test/Regression/CodeGen/ARM/ret_arg5.ll:1.3
--- llvm/test/Regression/CodeGen/ARM/ret_arg5.ll:1.2	Fri Jun 16 11:36:50 2006
+++ llvm/test/Regression/CodeGen/ARM/ret_arg5.ll	Sat Jun 17 19:08:07 2006
@@ -1,5 +1,4 @@
 ; RUN: llvm-as < %s | llc -march=arm
-; XFAIL: *
 int %test(int %a1, int %a2, int %a3, int %a4, int %a5) {
   ret int %a5
 }