From evan.cheng at apple.com Mon Sep 11 00:25:29 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 11 Sep 2006 00:25:29 -0500 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/README.txt Message-ID: <200609110525.k8B5PTnv030355@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: README.txt updated: 1.124 -> 1.125 --- Log message: Update README file. --- Diffs of the changes: (+3 -98) README.txt | 101 +------------------------------------------------------------ 1 files changed, 3 insertions(+), 98 deletions(-) Index: llvm/lib/Target/X86/README.txt diff -u llvm/lib/Target/X86/README.txt:1.124 llvm/lib/Target/X86/README.txt:1.125 --- llvm/lib/Target/X86/README.txt:1.124 Tue Aug 15 21:47:44 2006 +++ llvm/lib/Target/X86/README.txt Mon Sep 11 00:25:15 2006 @@ -80,15 +80,6 @@ //===---------------------------------------------------------------------===// -Model X86 EFLAGS as a real register to avoid redudant cmp / test. e.g. - - cmpl $1, %eax - setg %al - testb %al, %al # unnecessary - jne .BB7 - -//===---------------------------------------------------------------------===// - Count leading zeros and count trailing zeros: int clz(int X) { return __builtin_clz(X); } @@ -126,6 +117,8 @@ should be made smart enough to cannonicalize the load into the RHS of a compare when it can invert the result of the compare for free. +//===---------------------------------------------------------------------===// + How about intrinsics? An example is: *res = _mm_mulhi_epu16(*A, _mm_mul_epu32(*B, *C)); @@ -140,51 +133,6 @@ //===---------------------------------------------------------------------===// -The DAG Isel doesn't fold the loads into the adds in this testcase. The -pattern selector does. This is because the chain value of the load gets -selected first, and the loads aren't checking to see if they are only used by -and add. - -.ll: - -int %test(int* %x, int* %y, int* %z) { - %X = load int* %x - %Y = load int* %y - %Z = load int* %z - %a = add int %X, %Y - %b = add int %a, %Z - ret int %b -} - -dag isel: - -_test: - movl 4(%esp), %eax - movl (%eax), %eax - movl 8(%esp), %ecx - movl (%ecx), %ecx - addl %ecx, %eax - movl 12(%esp), %ecx - movl (%ecx), %ecx - addl %ecx, %eax - ret - -pattern isel: - -_test: - movl 12(%esp), %ecx - movl 4(%esp), %edx - movl 8(%esp), %eax - movl (%eax), %eax - addl (%edx), %eax - addl (%ecx), %eax - ret - -This is bad for register pressure, though the dag isel is producing a -better schedule. :) - -//===---------------------------------------------------------------------===// - In many cases, LLVM generates code like this: _test: @@ -198,7 +146,7 @@ _test: movl 8(%esp), %ebx - xor %eax, %eax + xor %eax, %eax cmpl %ebx, 4(%esp) setl %al ret @@ -207,38 +155,6 @@ //===---------------------------------------------------------------------===// -We should generate 'test' instead of 'cmp' in various cases, e.g.: - -bool %test(int %X) { - %Y = shl int %X, ubyte 1 - %C = seteq int %Y, 0 - ret bool %C -} -bool %test(int %X) { - %Y = and int %X, 8 - %C = seteq int %Y, 0 - ret bool %C -} - -This may just be a matter of using 'test' to write bigger patterns for X86cmp. - -An important case is comparison against zero: - -if (X == 0) ... - -instead of: - - cmpl $0, %eax - je LBB4_2 #cond_next - -use: - test %eax, %eax - jz LBB4_2 - -which is smaller. - -//===---------------------------------------------------------------------===// - We should generate bts/btr/etc instructions on targets where they are cheap or when codesize is important. e.g., for: @@ -564,17 +480,6 @@ //===---------------------------------------------------------------------===// -Some ideas for instruction selection code simplification: 1. A pre-pass to -determine which chain producing node can or cannot be folded. The generated -isel code would then use the information. 2. The same pre-pass can force -ordering of TokenFactor operands to allow load / store folding. 3. During isel, -instead of recursively going up the chain operand chain, mark the chain operand -as available and put it in some work list. Select other nodes in the normal -manner. The chain operands are selected after all other nodes are selected. Uses -of chain nodes are modified after instruction selection is completed. - -//===---------------------------------------------------------------------===// - Another instruction selector deficiency: void %bar() { From evan.cheng at apple.com Mon Sep 11 00:35:31 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 11 Sep 2006 00:35:31 -0500 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/README-SSE.txt README.txt Message-ID: <200609110535.k8B5ZVEX030612@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: README-SSE.txt updated: 1.4 -> 1.5 README.txt updated: 1.125 -> 1.126 --- Log message: Updates. --- Diffs of the changes: (+0 -154) README-SSE.txt | 116 --------------------------------------------------------- README.txt | 38 ------------------ 2 files changed, 154 deletions(-) Index: llvm/lib/Target/X86/README-SSE.txt diff -u llvm/lib/Target/X86/README-SSE.txt:1.4 llvm/lib/Target/X86/README-SSE.txt:1.5 --- llvm/lib/Target/X86/README-SSE.txt:1.4 Mon Jul 10 16:42:16 2006 +++ llvm/lib/Target/X86/README-SSE.txt Mon Sep 11 00:35:17 2006 @@ -147,32 +147,6 @@ //===---------------------------------------------------------------------===// -The first BB of this code: - -declare bool %foo() -int %bar() { - %V = call bool %foo() - br bool %V, label %T, label %F -T: - ret int 1 -F: - call bool %foo() - ret int 12 -} - -compiles to: - -_bar: - subl $12, %esp - call L_foo$stub - xorb $1, %al - testb %al, %al - jne LBB_bar_2 # F - -It would be better to emit "cmp %al, 1" than a xor and test. - -//===---------------------------------------------------------------------===// - Lower memcpy / memset to a series of SSE 128 bit move instructions when it's feasible. @@ -274,33 +248,6 @@ //===---------------------------------------------------------------------===// -Use movddup to splat a v2f64 directly from a memory source. e.g. - -#include - -void test(__m128d *r, double A) { - *r = _mm_set1_pd(A); -} - -llc: - -_test: - movsd 8(%esp), %xmm0 - unpcklpd %xmm0, %xmm0 - movl 4(%esp), %eax - movapd %xmm0, (%eax) - ret - -icc: - -_test: - movl 4(%esp), %eax - movddup 8(%esp), %xmm0 - movapd %xmm0, (%eax) - ret - -//===---------------------------------------------------------------------===// - X86RegisterInfo::copyRegToReg() returns X86::MOVAPSrr for VR128. Is it possible to choose between movaps, movapd, and movdqa based on types of source and destination? @@ -311,69 +258,6 @@ //===---------------------------------------------------------------------===// -We are emitting bad code for this: - -float %test(float* %V, int %I, int %D, float %V) { -entry: - %tmp = seteq int %D, 0 - br bool %tmp, label %cond_true, label %cond_false23 - -cond_true: - %tmp3 = getelementptr float* %V, int %I - %tmp = load float* %tmp3 - %tmp5 = setgt float %tmp, %V - %tmp6 = tail call bool %llvm.isunordered.f32( float %tmp, float %V ) - %tmp7 = or bool %tmp5, %tmp6 - br bool %tmp7, label %UnifiedReturnBlock, label %cond_next - -cond_next: - %tmp10 = add int %I, 1 - %tmp12 = getelementptr float* %V, int %tmp10 - %tmp13 = load float* %tmp12 - %tmp15 = setle float %tmp13, %V - %tmp16 = tail call bool %llvm.isunordered.f32( float %tmp13, float %V ) - %tmp17 = or bool %tmp15, %tmp16 - %retval = select bool %tmp17, float 0.000000e+00, float 1.000000e+00 - ret float %retval - -cond_false23: - %tmp28 = tail call float %foo( float* %V, int %I, int %D, float %V ) - ret float %tmp28 - -UnifiedReturnBlock: ; preds = %cond_true - ret float 0.000000e+00 -} - -declare bool %llvm.isunordered.f32(float, float) - -declare float %foo(float*, int, int, float) - - -It exposes a known load folding problem: - - movss (%edx,%ecx,4), %xmm1 - ucomiss %xmm1, %xmm0 - -As well as this: - -LBB_test_2: # cond_next - movss LCPI1_0, %xmm2 - pxor %xmm3, %xmm3 - ucomiss %xmm0, %xmm1 - jbe LBB_test_6 # cond_next -LBB_test_5: # cond_next - movaps %xmm2, %xmm3 -LBB_test_6: # cond_next - movss %xmm3, 40(%esp) - flds 40(%esp) - addl $44, %esp - ret - -Clearly it's unnecessary to clear %xmm3. It's also not clear why we are emitting -three moves (movss, movaps, movss). - -//===---------------------------------------------------------------------===// - External test Nurbs exposed some problems. Look for __ZN15Nurbs_SSE_Cubic17TessellateSurfaceE, bb cond_next140. This is what icc emits: Index: llvm/lib/Target/X86/README.txt diff -u llvm/lib/Target/X86/README.txt:1.125 llvm/lib/Target/X86/README.txt:1.126 --- llvm/lib/Target/X86/README.txt:1.125 Mon Sep 11 00:25:15 2006 +++ llvm/lib/Target/X86/README.txt Mon Sep 11 00:35:17 2006 @@ -390,44 +390,6 @@ //===---------------------------------------------------------------------===// -This code generates ugly code, probably due to costs being off or something: - -void %test(float* %P, <4 x float>* %P2 ) { - %xFloat0.688 = load float* %P - %loadVector37.712 = load <4 x float>* %P2 - %inFloat3.713 = insertelement <4 x float> %loadVector37.712, float 0.000000e+00, uint 3 - store <4 x float> %inFloat3.713, <4 x float>* %P2 - ret void -} - -Generates: - -_test: - pxor %xmm0, %xmm0 - movd %xmm0, %eax ;; EAX = 0! - movl 8(%esp), %ecx - movaps (%ecx), %xmm0 - pinsrw $6, %eax, %xmm0 - shrl $16, %eax ;; EAX = 0 again! - pinsrw $7, %eax, %xmm0 - movaps %xmm0, (%ecx) - ret - -It would be better to generate: - -_test: - movl 8(%esp), %ecx - movaps (%ecx), %xmm0 - xor %eax, %eax - pinsrw $6, %eax, %xmm0 - pinsrw $7, %eax, %xmm0 - movaps %xmm0, (%ecx) - ret - -or use pxor (to make a zero vector) and shuffle (to insert it). - -//===---------------------------------------------------------------------===// - Bad codegen: char foo(int x) { return x; } From rafael.espindola at gmail.com Mon Sep 11 07:49:52 2006 From: rafael.espindola at gmail.com (Rafael Espindola) Date: Mon, 11 Sep 2006 07:49:52 -0500 Subject: [llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp Message-ID: <200609111249.k8BCnqeb014692@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/ARM: ARMAsmPrinter.cpp updated: 1.17 -> 1.18 --- Log message: call AsmPrinter::doInitialization in ARMAsmPrinter::doInitialization --- Diffs of the changes: (+1 -0) ARMAsmPrinter.cpp | 1 + 1 files changed, 1 insertion(+) Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.17 llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.18 --- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.17 Sun Sep 10 16:17:03 2006 +++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Mon Sep 11 07:49:38 2006 @@ -201,6 +201,7 @@ } bool ARMAsmPrinter::doInitialization(Module &M) { + AsmPrinter::doInitialization(M); return false; // success } From criswell at cs.uiuc.edu Mon Sep 11 09:46:28 2006 From: criswell at cs.uiuc.edu (John Criswell) Date: Mon, 11 Sep 2006 09:46:28 -0500 Subject: [llvm-commits] CVS: llvm-www/attrib.incl Message-ID: <200609111446.JAA04790@choi.cs.uiuc.edu> Changes in directory llvm-www: attrib.incl added (r1.1) --- Log message: Include file that contains HTML for the UIUC CS department attribution that we're required to put on the web site. --- Diffs of the changes: (+4 -0) attrib.incl | 4 ++++ 1 files changed, 4 insertions(+) Index: llvm-www/attrib.incl diff -c /dev/null llvm-www/attrib.incl:1.1 *** /dev/null Mon Sep 11 09:46:11 2006 --- llvm-www/attrib.incl Mon Sep 11 09:46:01 2006 *************** *** 0 **** --- 1,4 ---- + This Web site is supported by the + Computer Science Department + at the + University of Illinois at Urbana-Champaign. From criswell at cs.uiuc.edu Mon Sep 11 09:47:07 2006 From: criswell at cs.uiuc.edu (John Criswell) Date: Mon, 11 Sep 2006 09:47:07 -0500 Subject: [llvm-commits] CVS: llvm-www/www-index.html Message-ID: <200609111447.JAA04824@choi.cs.uiuc.edu> Changes in directory llvm-www: www-index.html updated: 1.129 -> 1.130 --- Log message: First crack at adding an attribution notice to the LLVM web page. --- Diffs of the changes: (+3 -0) www-index.html | 3 +++ 1 files changed, 3 insertions(+) Index: llvm-www/www-index.html diff -u llvm-www/www-index.html:1.129 llvm-www/www-index.html:1.130 --- llvm-www/www-index.html:1.129 Wed Aug 9 01:06:12 2006 +++ llvm-www/www-index.html Mon Sep 11 09:46:40 2006 @@ -154,4 +154,7 @@ +
+ + From criswell at cs.uiuc.edu Mon Sep 11 09:48:38 2006 From: criswell at cs.uiuc.edu (John Criswell) Date: Mon, 11 Sep 2006 09:48:38 -0500 Subject: [llvm-commits] CVS: llvm-www/releases/index.html Message-ID: <200609111448.JAA04856@choi.cs.uiuc.edu> Changes in directory llvm-www/releases: index.html updated: 1.29 -> 1.30 --- Log message: Added UIUC CS attribution. --- Diffs of the changes: (+3 -0) index.html | 3 +++ 1 files changed, 3 insertions(+) Index: llvm-www/releases/index.html diff -u llvm-www/releases/index.html:1.29 llvm-www/releases/index.html:1.30 --- llvm-www/releases/index.html:1.29 Wed Aug 9 01:03:33 2006 +++ llvm-www/releases/index.html Mon Sep 11 09:48:16 2006 @@ -91,5 +91,8 @@ +
+ + From criswell at cs.uiuc.edu Mon Sep 11 09:49:19 2006 From: criswell at cs.uiuc.edu (John Criswell) Date: Mon, 11 Sep 2006 09:49:19 -0500 Subject: [llvm-commits] CVS: llvm-www/releases/index.html Message-ID: <200609111449.JAA04880@choi.cs.uiuc.edu> Changes in directory llvm-www/releases: index.html updated: 1.30 -> 1.31 --- Log message: Fix the include of the attribution. --- Diffs of the changes: (+1 -1) index.html | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm-www/releases/index.html diff -u llvm-www/releases/index.html:1.30 llvm-www/releases/index.html:1.31 --- llvm-www/releases/index.html:1.30 Mon Sep 11 09:48:16 2006 +++ llvm-www/releases/index.html Mon Sep 11 09:48:58 2006 @@ -92,7 +92,7 @@
- + From criswell at cs.uiuc.edu Mon Sep 11 09:52:48 2006 From: criswell at cs.uiuc.edu (John Criswell) Date: Mon, 11 Sep 2006 09:52:48 -0500 Subject: [llvm-commits] CVS: llvm/docs/doxygen.footer Message-ID: <200609111452.JAA04921@choi.cs.uiuc.edu> Changes in directory llvm/docs: doxygen.footer updated: 1.5 -> 1.6 --- Log message: Include the UIUC CS department attribution on the main doxygen page. --- Diffs of the changes: (+4 -0) doxygen.footer | 4 ++++ 1 files changed, 4 insertions(+) Index: llvm/docs/doxygen.footer diff -u llvm/docs/doxygen.footer:1.5 llvm/docs/doxygen.footer:1.6 --- llvm/docs/doxygen.footer:1.5 Mon May 15 16:36:13 2006 +++ llvm/docs/doxygen.footer Mon Sep 11 09:52:26 2006 @@ -5,5 +5,9 @@ align="middle" border="0"/>$doxygenversion
Copyright © 2003,2004,2005,2006 University of Illinois at Urbana-Champaign. All Rights Reserved.

+ +
+ + From lattner at cs.uiuc.edu Mon Sep 11 11:26:15 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon, 11 Sep 2006 11:26:15 -0500 Subject: [llvm-commits] CVS: llvm-www/attrib.incl Message-ID: <200609111626.k8BGQFpe018579@zion.cs.uiuc.edu> Changes in directory llvm-www: attrib.incl updated: 1.1 -> 1.2 --- Log message: Web -> web. Clarify that "support" means web hosting. --- Diffs of the changes: (+1 -1) attrib.incl | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm-www/attrib.incl diff -u llvm-www/attrib.incl:1.1 llvm-www/attrib.incl:1.2 --- llvm-www/attrib.incl:1.1 Mon Sep 11 09:46:01 2006 +++ llvm-www/attrib.incl Mon Sep 11 11:26:01 2006 @@ -1,4 +1,4 @@ -This Web site is supported by the +This web site is hosted by the Computer Science Department at the University of Illinois at Urbana-Champaign. From llvm at cs.uiuc.edu Mon Sep 11 11:03:12 2006 From: llvm at cs.uiuc.edu (LLVM) Date: Mon, 11 Sep 2006 11:03:12 -0500 Subject: [llvm-commits] CVS: llvm/utils/NightlyTest.pl Message-ID: <200609111603.k8BG3CLT018145@zion.cs.uiuc.edu> Changes in directory llvm/utils: NightlyTest.pl (r1.113) removed --- Log message: No longer used, and confuses maintainers --- Diffs of the changes: (+0 -0) 0 files changed From jlaskey at apple.com Mon Sep 11 11:48:39 2006 From: jlaskey at apple.com (Jim Laskey) Date: Mon, 11 Sep 2006 11:48:39 -0500 Subject: [llvm-commits] CVS: nightlytest-serverside/ProgramResults.php Message-ID: <200609111648.k8BGmdoh019015@zion.cs.uiuc.edu> Changes in directory nightlytest-serverside: ProgramResults.php updated: 1.46 -> 1.47 --- Log message: Strip extraneous colon --- Diffs of the changes: (+23 -17) ProgramResults.php | 40 +++++++++++++++++++++++----------------- 1 files changed, 23 insertions(+), 17 deletions(-) Index: nightlytest-serverside/ProgramResults.php diff -u nightlytest-serverside/ProgramResults.php:1.46 nightlytest-serverside/ProgramResults.php:1.47 --- nightlytest-serverside/ProgramResults.php:1.46 Fri Sep 8 19:24:04 2006 +++ nightlytest-serverside/ProgramResults.php Mon Sep 11 11:48:25 2006 @@ -136,21 +136,22 @@ #print "SELECT * FROM program WHERE night=$night_id ORDER BY program ASC
\n"; $program_query = mysql_query("SELECT * FROM program WHERE night=$night_id ORDER BY program ASC") or die (mysql_error()); while($row = mysql_fetch_array($program_query)){ - $result["{$row['program']}"]=array(); - array_push($result["{$row['program']}"], "{$row['type']}"); + $program = rtrim($row['program'], ":"); + $result[$program] = array(); + array_push($result[$program], "{$row['type']}"); $index=0; $data = $row['result']; $data = str_replace("
", " ", $data); foreach ($array_of_measures as $x){ $value=array(); $reg_exp="/$x:\s*([[0-9\.]+|\*|\-|n\/a|\?],)/"; - #print "{$row['program']} => running preg_match($reg_exp, $data, $value)
\n"; + #print "{$program} => running preg_match($reg_exp, $data, $value)
\n"; preg_match($reg_exp, $data, $value); if(isset($value[1])){ - array_push($result["{$row['program']}"], $value[1]); + array_push($result[$program], $value[1]); } else{ - array_push($result["{$row['program']}"], "-"); + array_push($result[$program], "-"); } $index++; }//end foreach @@ -424,7 +425,8 @@ $query = "SELECT * FROM tests WHERE night=$night_id AND result=\"FAIL\" ORDER BY program ASC"; $program_query = mysql_query($query) or die (mysql_error()); while($row = mysql_fetch_array($program_query)) { - $result .= $row['program'] . "\n"; + $program = rtrim($row['program'], ":"); + $result .= $program . "\n"; } mysql_free_result($program_query); @@ -433,8 +435,9 @@ while($row = mysql_fetch_array($program_query)) { $test_result = $row['result']; if (!isTestPass($test_result)) { + $program = rtrim($row['program'], ":"); $reasons = getFailReasons($test_result); - $result .= "{$row['program']}{$reasons}\n"; + $result .= $program . $reasons . "\n"; } } mysql_free_result($program_query); @@ -461,7 +464,8 @@ $query = "SELECT * FROM tests WHERE night=$night_id AND result=\"FAIL\""; $program_query = mysql_query($query) or die (mysql_error()); while($row = mysql_fetch_array($program_query)){ - $result .= $row['program'] . "\n"; + $program = rtrim($row['program'], ":"); + $result .= $program . "\n"; } mysql_free_result($program_query); } @@ -489,7 +493,8 @@ $query = "SELECT * FROM $table WHERE night=$id"; $program_query = mysql_query($query) or die (mysql_error()); while ($row = mysql_fetch_array($program_query)) { - $test_hash[$row['program']] = $row['result']; + $program = rtrim($row['program'], ":"); + $test_hash[$program] = $row['result']; } mysql_free_result($program_query); return $test_hash; @@ -506,9 +511,9 @@ $query = "SELECT * FROM $table WHERE night=$id ORDER BY program ASC"; $program_query = mysql_query($query) or die (mysql_error()); while ($row = mysql_fetch_array($program_query)) { - $test_key = $row['program']; - if (!isset($test_hash[$test_key])) { - $result .= $test_key . "\n"; + $program = rtrim($row['program'], ":"); + if (!isset($test_hash[$program])) { + $result .= $program . "\n"; } } mysql_free_result($program_query); @@ -595,7 +600,8 @@ $program_query = mysql_query($query) or die (mysql_error()); while ($row = mysql_fetch_array($program_query)) { if (!isTestPass($row['result'])) { - $test_hash[$row['program']] = $row['result']; + $program = rtrim($row['program'], ":"); + $test_hash[$program] = $row['result']; } } mysql_free_result($program_query); @@ -613,10 +619,10 @@ $query = "SELECT * FROM $table WHERE night=$id ORDER BY program ASC"; $program_query = mysql_query($query) or die (mysql_error()); while ($row = mysql_fetch_array($program_query)) { - $test_key = $row['program']; - if (isset($test_hash[$test_key]) && isTestPass($row['result'])) { - $reasons = getFailReasons($test_hash[$test_key]); - $result .= "{$test_key}{$reasons}\n"; + $program = rtrim($row['program'], ":"); + if (isset($test_hash[$program]) && isTestPass($row['result'])) { + $reasons = getFailReasons($test_hash[$program]); + $result .= $program . $reasons . "\n"; } } mysql_free_result($program_query); From jlaskey at apple.com Mon Sep 11 12:07:38 2006 From: jlaskey at apple.com (Jim Laskey) Date: Mon, 11 Sep 2006 12:07:38 -0500 Subject: [llvm-commits] CVS: nightlytest-serverside/ProgramResults.php Message-ID: <200609111707.k8BH7clE019686@zion.cs.uiuc.edu> Changes in directory nightlytest-serverside: ProgramResults.php updated: 1.47 -> 1.48 --- Log message: Strip extraneous colon attempt #2 --- Diffs of the changes: (+8 -8) ProgramResults.php | 16 ++++++++-------- 1 files changed, 8 insertions(+), 8 deletions(-) Index: nightlytest-serverside/ProgramResults.php diff -u nightlytest-serverside/ProgramResults.php:1.47 nightlytest-serverside/ProgramResults.php:1.48 --- nightlytest-serverside/ProgramResults.php:1.47 Mon Sep 11 11:48:25 2006 +++ nightlytest-serverside/ProgramResults.php Mon Sep 11 12:07:24 2006 @@ -136,7 +136,7 @@ #print "SELECT * FROM program WHERE night=$night_id ORDER BY program ASC
\n"; $program_query = mysql_query("SELECT * FROM program WHERE night=$night_id ORDER BY program ASC") or die (mysql_error()); while($row = mysql_fetch_array($program_query)){ - $program = rtrim($row['program'], ":"); + $program = rtrim($row['program'], ": "); $result[$program] = array(); array_push($result[$program], "{$row['type']}"); $index=0; @@ -425,7 +425,7 @@ $query = "SELECT * FROM tests WHERE night=$night_id AND result=\"FAIL\" ORDER BY program ASC"; $program_query = mysql_query($query) or die (mysql_error()); while($row = mysql_fetch_array($program_query)) { - $program = rtrim($row['program'], ":"); + $program = rtrim($row['program'], ": "); $result .= $program . "\n"; } mysql_free_result($program_query); @@ -435,7 +435,7 @@ while($row = mysql_fetch_array($program_query)) { $test_result = $row['result']; if (!isTestPass($test_result)) { - $program = rtrim($row['program'], ":"); + $program = rtrim($row['program'], ": "); $reasons = getFailReasons($test_result); $result .= $program . $reasons . "\n"; } @@ -464,7 +464,7 @@ $query = "SELECT * FROM tests WHERE night=$night_id AND result=\"FAIL\""; $program_query = mysql_query($query) or die (mysql_error()); while($row = mysql_fetch_array($program_query)){ - $program = rtrim($row['program'], ":"); + $program = rtrim($row['program'], ": "); $result .= $program . "\n"; } mysql_free_result($program_query); @@ -493,7 +493,7 @@ $query = "SELECT * FROM $table WHERE night=$id"; $program_query = mysql_query($query) or die (mysql_error()); while ($row = mysql_fetch_array($program_query)) { - $program = rtrim($row['program'], ":"); + $program = rtrim($row['program'], ": "); $test_hash[$program] = $row['result']; } mysql_free_result($program_query); @@ -511,7 +511,7 @@ $query = "SELECT * FROM $table WHERE night=$id ORDER BY program ASC"; $program_query = mysql_query($query) or die (mysql_error()); while ($row = mysql_fetch_array($program_query)) { - $program = rtrim($row['program'], ":"); + $program = rtrim($row['program'], ": "); if (!isset($test_hash[$program])) { $result .= $program . "\n"; } @@ -600,7 +600,7 @@ $program_query = mysql_query($query) or die (mysql_error()); while ($row = mysql_fetch_array($program_query)) { if (!isTestPass($row['result'])) { - $program = rtrim($row['program'], ":"); + $program = rtrim($row['program'], ": "); $test_hash[$program] = $row['result']; } } @@ -619,7 +619,7 @@ $query = "SELECT * FROM $table WHERE night=$id ORDER BY program ASC"; $program_query = mysql_query($query) or die (mysql_error()); while ($row = mysql_fetch_array($program_query)) { - $program = rtrim($row['program'], ":"); + $program = rtrim($row['program'], ": "); if (isset($test_hash[$program]) && isTestPass($row['result'])) { $reasons = getFailReasons($test_hash[$program]); $result .= $program . $reasons . "\n"; From nicholas at mxc.ca Mon Sep 11 12:23:48 2006 From: nicholas at mxc.ca (Nick Lewycky) Date: Mon, 11 Sep 2006 12:23:48 -0500 Subject: [llvm-commits] CVS: llvm/lib/Transforms/Scalar/PredicateSimplifier.cpp Message-ID: <200609111723.k8BHNmTS019987@zion.cs.uiuc.edu> Changes in directory llvm/lib/Transforms/Scalar: PredicateSimplifier.cpp updated: 1.6 -> 1.7 --- Log message: Skip the linear search if the answer is already known. --- Diffs of the changes: (+22 -20) PredicateSimplifier.cpp | 42 ++++++++++++++++++++++-------------------- 1 files changed, 22 insertions(+), 20 deletions(-) Index: llvm/lib/Transforms/Scalar/PredicateSimplifier.cpp diff -u llvm/lib/Transforms/Scalar/PredicateSimplifier.cpp:1.6 llvm/lib/Transforms/Scalar/PredicateSimplifier.cpp:1.7 --- llvm/lib/Transforms/Scalar/PredicateSimplifier.cpp:1.6 Sat Sep 9 21:27:07 2006 +++ llvm/lib/Transforms/Scalar/PredicateSimplifier.cpp Mon Sep 11 12:23:34 2006 @@ -501,30 +501,32 @@ Value *SCI0 = resolve(SCI->getOperand(0), KP), *SCI1 = resolve(SCI->getOperand(1), KP); - PropertySet::ConstPropertyIterator NE = - KP.findProperty(PropertySet::NE, SCI0, SCI1); - - if (NE != KP.Properties.end()) { - switch (SCI->getOpcode()) { - case Instruction::SetEQ: - return ConstantBool::False; - case Instruction::SetNE: - return ConstantBool::True; - case Instruction::SetLE: - case Instruction::SetGE: - case Instruction::SetLT: - case Instruction::SetGT: - break; - default: - assert(0 && "Unknown opcode in SetCondInst."); - break; - } - } ConstantIntegral *CI1 = dyn_cast(SCI0), *CI2 = dyn_cast(SCI1); - if (!CI1 || !CI2) return SCI; + if (!CI1 || !CI2) { + PropertySet::ConstPropertyIterator NE = + KP.findProperty(PropertySet::NE, SCI0, SCI1); + + if (NE != KP.Properties.end()) { + switch (SCI->getOpcode()) { + case Instruction::SetEQ: + return ConstantBool::False; + case Instruction::SetNE: + return ConstantBool::True; + case Instruction::SetLE: + case Instruction::SetGE: + case Instruction::SetLT: + case Instruction::SetGT: + break; + default: + assert(0 && "Unknown opcode in SetCondInst."); + break; + } + } + return SCI; + } switch(SCI->getOpcode()) { case Instruction::SetLE: From rafael.espindola at gmail.com Mon Sep 11 12:25:54 2006 From: rafael.espindola at gmail.com (Rafael Espindola) Date: Mon, 11 Sep 2006 12:25:54 -0500 Subject: [llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp ARMISelDAGToDAG.cpp ARMInstrInfo.cpp ARMInstrInfo.td ARMRegisterInfo.cpp Message-ID: <200609111725.k8BHPsiF020046@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/ARM: ARMAsmPrinter.cpp updated: 1.18 -> 1.19 ARMISelDAGToDAG.cpp updated: 1.41 -> 1.42 ARMInstrInfo.cpp updated: 1.5 -> 1.6 ARMInstrInfo.td updated: 1.25 -> 1.26 ARMRegisterInfo.cpp updated: 1.17 -> 1.18 --- Log message: partial implementation of the ARM Addressing Mode 1 --- Diffs of the changes: (+75 -38) ARMAsmPrinter.cpp | 13 +++++++++++ ARMISelDAGToDAG.cpp | 21 ++++++++++++++++++- ARMInstrInfo.cpp | 14 ++++++------ ARMInstrInfo.td | 57 ++++++++++++++++++++++++++++------------------------ ARMRegisterInfo.cpp | 8 +++---- 5 files changed, 75 insertions(+), 38 deletions(-) Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.18 llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.19 --- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.18 Mon Sep 11 07:49:38 2006 +++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Mon Sep 11 12:25:40 2006 @@ -54,6 +54,8 @@ return "ARM Assembly Printer"; } + void printAddrMode1(const MachineInstr *MI, int opNum); + void printMemRegImm(const MachineInstr *MI, int opNum, const char *Modifier = NULL) { const MachineOperand &MO1 = MI->getOperand(opNum); @@ -155,6 +157,17 @@ return false; } +void ARMAsmPrinter::printAddrMode1(const MachineInstr *MI, int opNum) { + const MachineOperand &MO1 = MI->getOperand(opNum); + + if(MO1.isImmediate()) { + printOperand(MI, opNum); + } else { + assert(MO1.isRegister()); + printOperand(MI, opNum); + } +} + void ARMAsmPrinter::printOperand(const MachineInstr *MI, int opNum) { const MachineOperand &MO = MI->getOperand (opNum); const MRegisterInfo &RI = *TM.getRegisterInfo(); Index: llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp diff -u llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.41 llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.42 --- llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.41 Mon Sep 4 14:05:01 2006 +++ llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp Mon Sep 11 12:25:40 2006 @@ -386,7 +386,7 @@ SDOperand ARMCC = DAG.getConstant(DAGCCToARMCC(CC), MVT::i32); SDOperand Cmp = DAG.getNode(ARMISD::CMP, MVT::Flag, LHS, RHS); - return DAG.getNode(ARMISD::SELECT, MVT::i32, FalseVal, TrueVal, ARMCC, Cmp); + return DAG.getNode(ARMISD::SELECT, MVT::i32, TrueVal, FalseVal, ARMCC, Cmp); } static SDOperand LowerBR_CC(SDOperand Op, SelectionDAG &DAG) { @@ -445,6 +445,7 @@ SDNode *Select(SDOperand Op); virtual void InstructionSelectBasicBlock(SelectionDAG &DAG); bool SelectAddrRegImm(SDOperand N, SDOperand &Offset, SDOperand &Base); + bool SelectAddrMode1(SDOperand N, SDOperand &Arg); // Include the pieces autogenerated from the target description. #include "ARMGenDAGISel.inc" @@ -478,6 +479,24 @@ return isInt12Immediate(Op.Val, Imm); } +bool ARMDAGToDAGISel::SelectAddrMode1(SDOperand N, + SDOperand &Arg) { + switch(N.getOpcode()) { + case ISD::CopyFromReg: + Arg = N; + return true; + case ISD::Constant: { + //TODO:check that we have a valid constant + int32_t t = cast(N)->getValue(); + Arg = CurDAG->getTargetConstant(t, MVT::i32); + return true; + } + default: + std::cerr << "OpCode = " << N.getOpcode() << "\n"; + assert(0); + } +} + //register plus/minus 12 bit offset bool ARMDAGToDAGISel::SelectAddrRegImm(SDOperand N, SDOperand &Offset, SDOperand &Base) { Index: llvm/lib/Target/ARM/ARMInstrInfo.cpp diff -u llvm/lib/Target/ARM/ARMInstrInfo.cpp:1.5 llvm/lib/Target/ARM/ARMInstrInfo.cpp:1.6 --- llvm/lib/Target/ARM/ARMInstrInfo.cpp:1.5 Tue Aug 8 15:35:03 2006 +++ llvm/lib/Target/ARM/ARMInstrInfo.cpp Mon Sep 11 12:25:40 2006 @@ -33,15 +33,15 @@ unsigned &SrcReg, unsigned &DstReg) const { MachineOpCode oc = MI.getOpcode(); switch (oc) { - default: - return false; - case ARM::movrr: + case ARM::MOV: assert(MI.getNumOperands() == 2 && MI.getOperand(0).isRegister() && - MI.getOperand(1).isRegister() && "Invalid ARM MOV instruction"); - SrcReg = MI.getOperand(1).getReg();; - DstReg = MI.getOperand(0).getReg();; - return true; + if (MI.getOperand(1).isRegister()) { + SrcReg = MI.getOperand(1).getReg(); + DstReg = MI.getOperand(0).getReg(); + return true; + } } + return false; } Index: llvm/lib/Target/ARM/ARMInstrInfo.td diff -u llvm/lib/Target/ARM/ARMInstrInfo.td:1.25 llvm/lib/Target/ARM/ARMInstrInfo.td:1.26 --- llvm/lib/Target/ARM/ARMInstrInfo.td:1.25 Fri Sep 8 12:36:23 2006 +++ llvm/lib/Target/ARM/ARMInstrInfo.td Mon Sep 11 12:25:40 2006 @@ -13,6 +13,12 @@ //===----------------------------------------------------------------------===// // Address operands +def op_addr_mode1 : Operand { + let PrintMethod = "printAddrMode1"; + let NumMIOperands = 1; + let MIOperandInfo = (ops ptr_rc); +} + def memri : Operand { let PrintMethod = "printMemRegImm"; let NumMIOperands = 2; @@ -20,6 +26,9 @@ } // Define ARM specific addressing mode. +//Addressing Mode 1: data processing operands +def addr_mode1 : ComplexPattern; + //register plus/minus 12 bit offset def iaddr : ComplexPattern; //register plus scaled register @@ -89,15 +98,12 @@ "str $src, $addr", [(store IntRegs:$src, iaddr:$addr)]>; -def movrr : InstARM<(ops IntRegs:$dst, IntRegs:$src), - "mov $dst, $src", []>; - -def movri : InstARM<(ops IntRegs:$dst, i32imm:$src), - "mov $dst, $src", [(set IntRegs:$dst, imm:$src)]>; +def MOV : InstARM<(ops IntRegs:$dst, op_addr_mode1:$src), + "mov $dst, $src", [(set IntRegs:$dst, addr_mode1:$src)]>; -def addri : InstARM<(ops IntRegs:$dst, IntRegs:$a, i32imm:$b), +def ADD : InstARM<(ops IntRegs:$dst, IntRegs:$a, op_addr_mode1:$b), "add $dst, $a, $b", - [(set IntRegs:$dst, (add IntRegs:$a, imm:$b))]>; + [(set IntRegs:$dst, (add IntRegs:$a, addr_mode1:$b))]>; // "LEA" forms of add def lea_addri : InstARM<(ops IntRegs:$dst, memri:$addr), @@ -105,14 +111,13 @@ [(set IntRegs:$dst, iaddr:$addr)]>; -def subri : InstARM<(ops IntRegs:$dst, IntRegs:$a, i32imm:$b), +def SUB : InstARM<(ops IntRegs:$dst, IntRegs:$a, op_addr_mode1:$b), "sub $dst, $a, $b", - [(set IntRegs:$dst, (sub IntRegs:$a, imm:$b))]>; - -def andrr : InstARM<(ops IntRegs:$dst, IntRegs:$a, IntRegs:$b), - "and $dst, $a, $b", - [(set IntRegs:$dst, (and IntRegs:$a, IntRegs:$b))]>; + [(set IntRegs:$dst, (sub IntRegs:$a, addr_mode1:$b))]>; +def AND : InstARM<(ops IntRegs:$dst, IntRegs:$a, op_addr_mode1:$b), + "and $dst, $a, $b", + [(set IntRegs:$dst, (and IntRegs:$a, addr_mode1:$b))]>; // All arm data processing instructions have a shift. Maybe we don't have // to implement this @@ -124,20 +129,20 @@ "mov $dst, $a, asr $b", [(set IntRegs:$dst, (sra IntRegs:$a, IntRegs:$b))]>; - -def eor_rr : InstARM<(ops IntRegs:$dst, IntRegs:$a, IntRegs:$b), - "eor $dst, $a, $b", - [(set IntRegs:$dst, (xor IntRegs:$a, IntRegs:$b))]>; - -def orr_rr : InstARM<(ops IntRegs:$dst, IntRegs:$a, IntRegs:$b), - "orr $dst, $a, $b", - [(set IntRegs:$dst, (or IntRegs:$a, IntRegs:$b))]>; - +def EOR : InstARM<(ops IntRegs:$dst, IntRegs:$a, op_addr_mode1:$b), + "eor $dst, $a, $b", + [(set IntRegs:$dst, (xor IntRegs:$a, addr_mode1:$b))]>; + +def ORR : InstARM<(ops IntRegs:$dst, IntRegs:$a, op_addr_mode1:$b), + "orr $dst, $a, $b", + [(set IntRegs:$dst, (or IntRegs:$a, addr_mode1:$b))]>; let isTwoAddress = 1 in { - def movcond : InstARM<(ops IntRegs:$dst, IntRegs:$false, IntRegs:$true, CCOp:$cc), + def movcond : InstARM<(ops IntRegs:$dst, IntRegs:$false, + op_addr_mode1:$true, CCOp:$cc), "mov$cc $dst, $true", - [(set IntRegs:$dst, (armselect IntRegs:$true, IntRegs:$false, imm:$cc))]>; + [(set IntRegs:$dst, (armselect addr_mode1:$true, + IntRegs:$false, imm:$cc))]>; } def bcond : InstARM<(ops brtarget:$dst, CCOp:$cc), @@ -148,6 +153,6 @@ "b $dst", [(br bb:$dst)]>; -def cmp : InstARM<(ops IntRegs:$a, IntRegs:$b), +def cmp : InstARM<(ops IntRegs:$a, op_addr_mode1:$b), "cmp $a, $b", - [(armcmp IntRegs:$a, IntRegs:$b)]>; + [(armcmp IntRegs:$a, addr_mode1:$b)]>; Index: llvm/lib/Target/ARM/ARMRegisterInfo.cpp diff -u llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.17 llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.18 --- llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.17 Mon Sep 4 21:31:13 2006 +++ llvm/lib/Target/ARM/ARMRegisterInfo.cpp Mon Sep 11 12:25:40 2006 @@ -48,7 +48,7 @@ unsigned DestReg, unsigned SrcReg, const TargetRegisterClass *RC) const { assert (RC == ARM::IntRegsRegisterClass); - BuildMI(MBB, I, ARM::movrr, 1, DestReg).addReg(SrcReg); + BuildMI(MBB, I, ARM::MOV, 1, DestReg).addReg(SrcReg); } MachineInstr *ARMRegisterInfo::foldMemoryOperand(MachineInstr* MI, @@ -114,7 +114,7 @@ // Insert a set of r12 with the full address // r12 = r13 + offset MachineBasicBlock *MBB2 = MI.getParent(); - BuildMI(*MBB2, II, ARM::addri, 2, ARM::R12).addReg(ARM::R13).addImm(Offset); + BuildMI(*MBB2, II, ARM::ADD, 2, ARM::R12).addReg(ARM::R13).addImm(Offset); // Replace the FrameIndex with r12 MI.getOperand(FrameIdx).ChangeToRegister(ARM::R12, false); @@ -140,7 +140,7 @@ MFI->setStackSize(NumBytes); //sub sp, sp, #NumBytes - BuildMI(MBB, MBBI, ARM::subri, 2, ARM::R13).addReg(ARM::R13).addImm(NumBytes); + BuildMI(MBB, MBBI, ARM::SUB, 2, ARM::R13).addReg(ARM::R13).addImm(NumBytes); } void ARMRegisterInfo::emitEpilogue(MachineFunction &MF, @@ -153,7 +153,7 @@ int NumBytes = (int) MFI->getStackSize(); //add sp, sp, #NumBytes - BuildMI(MBB, MBBI, ARM::addri, 2, ARM::R13).addReg(ARM::R13).addImm(NumBytes); + BuildMI(MBB, MBBI, ARM::ADD, 2, ARM::R13).addReg(ARM::R13).addImm(NumBytes); } unsigned ARMRegisterInfo::getRARegister() const { From lattner at cs.uiuc.edu Mon Sep 11 12:28:25 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon, 11 Sep 2006 12:28:25 -0500 Subject: [llvm-commits] CVS: llvm/LICENSE.TXT Message-ID: <200609111728.k8BHSPob020140@zion.cs.uiuc.edu> Changes in directory llvm: LICENSE.TXT updated: 1.27 -> 1.28 --- Log message: burg is gone --- Diffs of the changes: (+0 -1) LICENSE.TXT | 1 - 1 files changed, 1 deletion(-) Index: llvm/LICENSE.TXT diff -u llvm/LICENSE.TXT:1.27 llvm/LICENSE.TXT:1.28 --- llvm/LICENSE.TXT:1.27 Thu Apr 20 00:51:53 2006 +++ llvm/LICENSE.TXT Mon Sep 11 12:28:11 2006 @@ -68,5 +68,4 @@ Autoconf llvm/autoconf llvm/projects/ModuleMaker/autoconf llvm/projects/sample/autoconf -Burg llvm/utils/Burg GNU Libc llvm/runtime/GCCLibraries/libc From jlaskey at apple.com Mon Sep 11 12:48:45 2006 From: jlaskey at apple.com (Jim Laskey) Date: Mon, 11 Sep 2006 12:48:45 -0500 Subject: [llvm-commits] CVS: nightlytest-serverside/ProgramResults.php Message-ID: <200609111748.k8BHmj7I020488@zion.cs.uiuc.edu> Changes in directory nightlytest-serverside: ProgramResults.php updated: 1.48 -> 1.49 --- Log message: Isolating why #1 --- Diffs of the changes: (+6 -1) ProgramResults.php | 7 ++++++- 1 files changed, 6 insertions(+), 1 deletion(-) Index: nightlytest-serverside/ProgramResults.php diff -u nightlytest-serverside/ProgramResults.php:1.48 nightlytest-serverside/ProgramResults.php:1.49 --- nightlytest-serverside/ProgramResults.php:1.48 Mon Sep 11 12:07:24 2006 +++ nightlytest-serverside/ProgramResults.php Mon Sep 11 12:48:31 2006 @@ -396,7 +396,12 @@ for ($i = 0; $i < count($phases); $i++) { $phase = $phases[$i]; - if (strpos($phase, "*") !== false) { + if (strcmp($phase, "PASS") == 0 || + strcmp($phase, "FAIL") == 0 || + strcmp($phase, "XFAIL") == 0) { + $result = $phase; + break; + } else if (strpos($phase, "*") !== false) { list($tool, $tool_result) = split(": ", $phase); if (strcmp($result, "") != 0) { $result .= ", "; From jlaskey at apple.com Mon Sep 11 12:51:49 2006 From: jlaskey at apple.com (Jim Laskey) Date: Mon, 11 Sep 2006 12:51:49 -0500 Subject: [llvm-commits] CVS: nightlytest-serverside/ProgramResults.php Message-ID: <200609111751.k8BHpnwv020653@zion.cs.uiuc.edu> Changes in directory nightlytest-serverside: ProgramResults.php updated: 1.49 -> 1.50 --- Log message: Isolating why #2 --- Diffs of the changes: (+2 -7) ProgramResults.php | 9 ++------- 1 files changed, 2 insertions(+), 7 deletions(-) Index: nightlytest-serverside/ProgramResults.php diff -u nightlytest-serverside/ProgramResults.php:1.49 nightlytest-serverside/ProgramResults.php:1.50 --- nightlytest-serverside/ProgramResults.php:1.49 Mon Sep 11 12:48:31 2006 +++ nightlytest-serverside/ProgramResults.php Mon Sep 11 12:51:35 2006 @@ -396,12 +396,7 @@ for ($i = 0; $i < count($phases); $i++) { $phase = $phases[$i]; - if (strcmp($phase, "PASS") == 0 || - strcmp($phase, "FAIL") == 0 || - strcmp($phase, "XFAIL") == 0) { - $result = $phase; - break; - } else if (strpos($phase, "*") !== false) { + if (strpos($phase, "*") !== false) { list($tool, $tool_result) = split(": ", $phase); if (strcmp($result, "") != 0) { $result .= ", "; @@ -431,7 +426,7 @@ $program_query = mysql_query($query) or die (mysql_error()); while($row = mysql_fetch_array($program_query)) { $program = rtrim($row['program'], ": "); - $result .= $program . "\n"; + $result .= $program . "[" . $row['result'] . "]" . "\n"; } mysql_free_result($program_query); From jlaskey at apple.com Mon Sep 11 12:55:45 2006 From: jlaskey at apple.com (Jim Laskey) Date: Mon, 11 Sep 2006 12:55:45 -0500 Subject: [llvm-commits] CVS: nightlytest-serverside/ProgramResults.php Message-ID: <200609111755.k8BHtjPC020790@zion.cs.uiuc.edu> Changes in directory nightlytest-serverside: ProgramResults.php updated: 1.50 -> 1.51 --- Log message: Isolating why #3 --- Diffs of the changes: (+2 -1) ProgramResults.php | 3 ++- 1 files changed, 2 insertions(+), 1 deletion(-) Index: nightlytest-serverside/ProgramResults.php diff -u nightlytest-serverside/ProgramResults.php:1.50 nightlytest-serverside/ProgramResults.php:1.51 --- nightlytest-serverside/ProgramResults.php:1.50 Mon Sep 11 12:51:35 2006 +++ nightlytest-serverside/ProgramResults.php Mon Sep 11 12:55:31 2006 @@ -422,7 +422,8 @@ function getFailures($night_id) { $result=""; if ($night_id >= 684) { - $query = "SELECT * FROM tests WHERE night=$night_id AND result=\"FAIL\" ORDER BY program ASC"; +// $query = "SELECT * FROM tests WHERE night=$night_id AND result=\"FAIL\" ORDER BY program ASC"; + $query = "SELECT * FROM tests WHERE night=$night_id ORDER BY program ASC"; $program_query = mysql_query($query) or die (mysql_error()); while($row = mysql_fetch_array($program_query)) { $program = rtrim($row['program'], ": "); From jlaskey at apple.com Mon Sep 11 13:33:21 2006 From: jlaskey at apple.com (Jim Laskey) Date: Mon, 11 Sep 2006 13:33:21 -0500 Subject: [llvm-commits] CVS: nightlytest-serverside/ProgramResults.php Message-ID: <200609111833.k8BIXLm0021554@zion.cs.uiuc.edu> Changes in directory nightlytest-serverside: ProgramResults.php updated: 1.51 -> 1.52 --- Log message: Isolating why #4 --- Diffs of the changes: (+10 -3) ProgramResults.php | 13 ++++++++++--- 1 files changed, 10 insertions(+), 3 deletions(-) Index: nightlytest-serverside/ProgramResults.php diff -u nightlytest-serverside/ProgramResults.php:1.51 nightlytest-serverside/ProgramResults.php:1.52 --- nightlytest-serverside/ProgramResults.php:1.51 Mon Sep 11 12:55:31 2006 +++ nightlytest-serverside/ProgramResults.php Mon Sep 11 13:33:07 2006 @@ -422,8 +422,7 @@ function getFailures($night_id) { $result=""; if ($night_id >= 684) { -// $query = "SELECT * FROM tests WHERE night=$night_id AND result=\"FAIL\" ORDER BY program ASC"; - $query = "SELECT * FROM tests WHERE night=$night_id ORDER BY program ASC"; + $query = "SELECT * FROM tests WHERE night=$night_id AND result=\"FAIL\" ORDER BY program ASC"; $program_query = mysql_query($query) or die (mysql_error()); while($row = mysql_fetch_array($program_query)) { $program = rtrim($row['program'], ": "); @@ -621,7 +620,15 @@ $program_query = mysql_query($query) or die (mysql_error()); while ($row = mysql_fetch_array($program_query)) { $program = rtrim($row['program'], ": "); - if (isset($test_hash[$program]) && isTestPass($row['result'])) { + $wasfailing = isset($test_hash[$program]); + $ispassing = isTestPass($row['result']); + + if (strcmp($program, "/Volumes/Muggles/LLVM/nightlytest/build/llvm/test/Regression/Transforms/TailDup/MergeTest.ll") == 0) { + $result = "MergeTest.ll " . $test_hash[$program] . " " . $row['result'] . " " . + ($wasfailing ? "was failing " : " ") . ($ispassing ? "is passing\n" : "\n"); + } + + if ($wasfailing && $ispassing) { $reasons = getFailReasons($test_hash[$program]); $result .= $program . $reasons . "\n"; } From jlaskey at apple.com Mon Sep 11 13:47:43 2006 From: jlaskey at apple.com (Jim Laskey) Date: Mon, 11 Sep 2006 13:47:43 -0500 Subject: [llvm-commits] CVS: nightlytest-serverside/ProgramResults.php Message-ID: <200609111847.k8BIlhd4021826@zion.cs.uiuc.edu> Changes in directory nightlytest-serverside: ProgramResults.php updated: 1.52 -> 1.53 --- Log message: Isolating why #5 --- Diffs of the changes: (+2 -2) ProgramResults.php | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: nightlytest-serverside/ProgramResults.php diff -u nightlytest-serverside/ProgramResults.php:1.52 nightlytest-serverside/ProgramResults.php:1.53 --- nightlytest-serverside/ProgramResults.php:1.52 Mon Sep 11 13:33:07 2006 +++ nightlytest-serverside/ProgramResults.php Mon Sep 11 13:47:29 2006 @@ -624,8 +624,8 @@ $ispassing = isTestPass($row['result']); if (strcmp($program, "/Volumes/Muggles/LLVM/nightlytest/build/llvm/test/Regression/Transforms/TailDup/MergeTest.ll") == 0) { - $result = "MergeTest.ll " . $test_hash[$program] . " " . $row['result'] . " " . - ($wasfailing ? "was failing " : " ") . ($ispassing ? "is passing\n" : "\n"); + $result = "MergeTest.ll (" . $test_hash[$program] . ") (" . $row['result'] . ") " . + ($wasfailing ? "was failing " : "was passing") . ($ispassing ? "is passing\n" : "is failing\n"); } if ($wasfailing && $ispassing) { From jlaskey at apple.com Mon Sep 11 13:51:12 2006 From: jlaskey at apple.com (Jim Laskey) Date: Mon, 11 Sep 2006 13:51:12 -0500 Subject: [llvm-commits] CVS: nightlytest-serverside/ProgramResults.php Message-ID: <200609111851.k8BIpCiD021942@zion.cs.uiuc.edu> Changes in directory nightlytest-serverside: ProgramResults.php updated: 1.53 -> 1.54 --- Log message: Isolating why #6 --- Diffs of the changes: (+1 -9) ProgramResults.php | 10 +--------- 1 files changed, 1 insertion(+), 9 deletions(-) Index: nightlytest-serverside/ProgramResults.php diff -u nightlytest-serverside/ProgramResults.php:1.53 nightlytest-serverside/ProgramResults.php:1.54 --- nightlytest-serverside/ProgramResults.php:1.53 Mon Sep 11 13:47:29 2006 +++ nightlytest-serverside/ProgramResults.php Mon Sep 11 13:50:58 2006 @@ -584,9 +584,7 @@ * an asterix appears by each tool that has failed. */ function isTestPass($test_result) { - return strcmp($test_result, "PASS") == 0 || - strcmp($test_result, "XFAIL") == 0 || - strpos($test_result, "*") === false; + return !(strcmp($test_result, "FAIL") == 0 || strpos($test_result, "*") !== false); } /* @@ -622,12 +620,6 @@ $program = rtrim($row['program'], ": "); $wasfailing = isset($test_hash[$program]); $ispassing = isTestPass($row['result']); - - if (strcmp($program, "/Volumes/Muggles/LLVM/nightlytest/build/llvm/test/Regression/Transforms/TailDup/MergeTest.ll") == 0) { - $result = "MergeTest.ll (" . $test_hash[$program] . ") (" . $row['result'] . ") " . - ($wasfailing ? "was failing " : "was passing") . ($ispassing ? "is passing\n" : "is failing\n"); - } - if ($wasfailing && $ispassing) { $reasons = getFailReasons($test_hash[$program]); $result .= $program . $reasons . "\n"; From jlaskey at apple.com Mon Sep 11 13:55:34 2006 From: jlaskey at apple.com (Jim Laskey) Date: Mon, 11 Sep 2006 13:55:34 -0500 Subject: [llvm-commits] CVS: nightlytest-serverside/ProgramResults.php Message-ID: <200609111855.k8BItY2h022129@zion.cs.uiuc.edu> Changes in directory nightlytest-serverside: ProgramResults.php updated: 1.54 -> 1.55 --- Log message: Isolating why #7 --- Diffs of the changes: (+1 -1) ProgramResults.php | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: nightlytest-serverside/ProgramResults.php diff -u nightlytest-serverside/ProgramResults.php:1.54 nightlytest-serverside/ProgramResults.php:1.55 --- nightlytest-serverside/ProgramResults.php:1.54 Mon Sep 11 13:50:58 2006 +++ nightlytest-serverside/ProgramResults.php Mon Sep 11 13:55:20 2006 @@ -426,7 +426,7 @@ $program_query = mysql_query($query) or die (mysql_error()); while($row = mysql_fetch_array($program_query)) { $program = rtrim($row['program'], ": "); - $result .= $program . "[" . $row['result'] . "]" . "\n"; + $result .= $program . "\n"; } mysql_free_result($program_query); From rafael.espindola at gmail.com Mon Sep 11 14:23:46 2006 From: rafael.espindola at gmail.com (Rafael Espindola) Date: Mon, 11 Sep 2006 14:23:46 -0500 Subject: [llvm-commits] CVS: llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp Message-ID: <200609111923.k8BJNkpW022655@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/ARM: ARMISelDAGToDAG.cpp updated: 1.42 -> 1.43 --- Log message: add the correct fallback for ARMDAGToDAGISel::SelectAddrMode1 --- Diffs of the changes: (+3 -6) ARMISelDAGToDAG.cpp | 9 +++------ 1 files changed, 3 insertions(+), 6 deletions(-) Index: llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp diff -u llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.42 llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.43 --- llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.42 Mon Sep 11 12:25:40 2006 +++ llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp Mon Sep 11 14:23:32 2006 @@ -482,19 +482,16 @@ bool ARMDAGToDAGISel::SelectAddrMode1(SDOperand N, SDOperand &Arg) { switch(N.getOpcode()) { - case ISD::CopyFromReg: - Arg = N; - return true; case ISD::Constant: { //TODO:check that we have a valid constant int32_t t = cast(N)->getValue(); Arg = CurDAG->getTargetConstant(t, MVT::i32); return true; } - default: - std::cerr << "OpCode = " << N.getOpcode() << "\n"; - assert(0); } + + Arg = N; + return true; } //register plus/minus 12 bit offset From rafael.espindola at gmail.com Mon Sep 11 14:24:33 2006 From: rafael.espindola at gmail.com (Rafael Espindola) Date: Mon, 11 Sep 2006 14:24:33 -0500 Subject: [llvm-commits] CVS: llvm/lib/Target/ARM/ARMInstrInfo.td Message-ID: <200609111924.k8BJOXQa022678@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/ARM: ARMInstrInfo.td updated: 1.26 -> 1.27 --- Log message: implement SRL and MUL --- Diffs of the changes: (+9 -0) ARMInstrInfo.td | 9 +++++++++ 1 files changed, 9 insertions(+) Index: llvm/lib/Target/ARM/ARMInstrInfo.td diff -u llvm/lib/Target/ARM/ARMInstrInfo.td:1.26 llvm/lib/Target/ARM/ARMInstrInfo.td:1.27 --- llvm/lib/Target/ARM/ARMInstrInfo.td:1.26 Mon Sep 11 12:25:40 2006 +++ llvm/lib/Target/ARM/ARMInstrInfo.td Mon Sep 11 14:24:19 2006 @@ -129,6 +129,11 @@ "mov $dst, $a, asr $b", [(set IntRegs:$dst, (sra IntRegs:$a, IntRegs:$b))]>; +def SRL : InstARM<(ops IntRegs:$dst, IntRegs:$a, IntRegs:$b), + "mov $dst, $a, lsr $b", + [(set IntRegs:$dst, (srl IntRegs:$a, IntRegs:$b))]>; + + def EOR : InstARM<(ops IntRegs:$dst, IntRegs:$a, op_addr_mode1:$b), "eor $dst, $a, $b", [(set IntRegs:$dst, (xor IntRegs:$a, addr_mode1:$b))]>; @@ -145,6 +150,10 @@ IntRegs:$false, imm:$cc))]>; } +def MUL : InstARM<(ops IntRegs:$dst, IntRegs:$a, IntRegs:$b), + "mul $dst, $a, $b", + [(set IntRegs:$dst, (mul IntRegs:$a, IntRegs:$b))]>; + def bcond : InstARM<(ops brtarget:$dst, CCOp:$cc), "b$cc $dst", [(armbr bb:$dst, imm:$cc)]>; From jlaskey at apple.com Mon Sep 11 14:32:47 2006 From: jlaskey at apple.com (Jim Laskey) Date: Mon, 11 Sep 2006 14:32:47 -0500 Subject: [llvm-commits] CVS: nightlytest-serverside/ProgramResults.php Message-ID: <200609111932.k8BJWlT2022927@zion.cs.uiuc.edu> Changes in directory nightlytest-serverside: ProgramResults.php updated: 1.55 -> 1.56 --- Log message: Trim excess path #1 --- Diffs of the changes: (+23 -11) ProgramResults.php | 34 +++++++++++++++++++++++----------- 1 files changed, 23 insertions(+), 11 deletions(-) Index: nightlytest-serverside/ProgramResults.php diff -u nightlytest-serverside/ProgramResults.php:1.55 nightlytest-serverside/ProgramResults.php:1.56 --- nightlytest-serverside/ProgramResults.php:1.55 Mon Sep 11 13:55:20 2006 +++ nightlytest-serverside/ProgramResults.php Mon Sep 11 14:32:33 2006 @@ -411,13 +411,25 @@ return $result; } + + +/* + * Trim test path to exclude redundant info. + */ +function trimTestPath($program) { + list($head, $tail) = split("/llvm/test/", $program); + if (isset($tail)) { + $program = $tail; + } + return $program; +} /* * Get failing tests * * This is somewhat of a hack because from night 684 forward we now store the test - * in their own table as oppoesd in the night table. + * in their own table as opposed in the night table. */ function getFailures($night_id) { $result=""; @@ -426,7 +438,7 @@ $program_query = mysql_query($query) or die (mysql_error()); while($row = mysql_fetch_array($program_query)) { $program = rtrim($row['program'], ": "); - $result .= $program . "\n"; + $result .= trimTestPath($program) . "\n"; } mysql_free_result($program_query); @@ -449,7 +461,7 @@ * Get Unexpected failing tests * * This is somewhat of a hack because from night 684 forward we now store the test - * in their own table as oppoesd in the night table. + * in their own table as opposed in the night table. */ function getUnexpectedFailures($night_id){ $result=""; @@ -465,7 +477,7 @@ $program_query = mysql_query($query) or die (mysql_error()); while($row = mysql_fetch_array($program_query)){ $program = rtrim($row['program'], ": "); - $result .= $program . "\n"; + $result .= trimTestPath($program) . "\n"; } mysql_free_result($program_query); } @@ -513,7 +525,7 @@ while ($row = mysql_fetch_array($program_query)) { $program = rtrim($row['program'], ": "); if (!isset($test_hash[$program])) { - $result .= $program . "\n"; + $result .= trimTestPath($program) . "\n"; } } mysql_free_result($program_query); @@ -527,7 +539,7 @@ * in their own table as opposed in the night table. */ function getNewTests($cur_id, $prev_id){ - if (strcmp($prev_id, "") === 0 || strcmp($cur_id, "") === 0) { + if (strlen($prev_id) === 0 || strlen($cur_id) === 0) { return ""; } @@ -555,7 +567,7 @@ * in their own table as opposed in the night table. */ function getRemovedTests($cur_id, $prev_id){ - if (strcmp($prev_id, "") === 0 || strcmp($cur_id, "") === 0) { + if (strlen($prev_id) === 0 || strlen($cur_id) === 0) { return ""; } @@ -622,7 +634,7 @@ $ispassing = isTestPass($row['result']); if ($wasfailing && $ispassing) { $reasons = getFailReasons($test_hash[$program]); - $result .= $program . $reasons . "\n"; + $result .= trimTestPath($program) . $reasons . "\n"; } } mysql_free_result($program_query); @@ -636,7 +648,7 @@ * in their own table as opposed in the night table. */ function getFixedTests($cur_id, $prev_id){ - if (strcmp($prev_id, "") === 0 || strcmp($cur_id, "") === 0) { + if (strlen($prev_id) === 0 || strlen($cur_id) === 0) { return ""; } @@ -661,10 +673,10 @@ * Get Broken Tests * * This is somewhat of a hack because from night 684 forward we now store the test - * in their own table as oppoesd in the night table. + * in their own table as opposed in the night table. */ function getBrokenTests($cur_id, $prev_id){ - if (strcmp($prev_id, "") === 0 || strcmp($cur_id, "") === 0) { + if (strlen($prev_id) === 0 || strlen($cur_id) === 0) { return ""; } From jlaskey at apple.com Mon Sep 11 14:40:04 2006 From: jlaskey at apple.com (Jim Laskey) Date: Mon, 11 Sep 2006 14:40:04 -0500 Subject: [llvm-commits] CVS: nightlytest-serverside/ProgramResults.php Message-ID: <200609111940.k8BJe4wG023107@zion.cs.uiuc.edu> Changes in directory nightlytest-serverside: ProgramResults.php updated: 1.56 -> 1.57 --- Log message: Trim excess path #2 --- Diffs of the changes: (+1 -1) ProgramResults.php | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: nightlytest-serverside/ProgramResults.php diff -u nightlytest-serverside/ProgramResults.php:1.56 nightlytest-serverside/ProgramResults.php:1.57 --- nightlytest-serverside/ProgramResults.php:1.56 Mon Sep 11 14:32:33 2006 +++ nightlytest-serverside/ProgramResults.php Mon Sep 11 14:39:50 2006 @@ -419,7 +419,7 @@ function trimTestPath($program) { list($head, $tail) = split("/llvm/test/", $program); if (isset($tail)) { - $program = $tail; + $program = "test/" . $tail; } return $program; } From lattner at cs.uiuc.edu Mon Sep 11 16:42:10 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon, 11 Sep 2006 16:42:10 -0500 Subject: [llvm-commits] CVS: llvm/test/Regression/Transforms/InstCombine/2006-09-11-EmptyStructCrash.ll Message-ID: <200609112142.k8BLgAJ4025222@zion.cs.uiuc.edu> Changes in directory llvm/test/Regression/Transforms/InstCombine: 2006-09-11-EmptyStructCrash.ll added (r1.1) --- Log message: new testcase for PR905: http://llvm.org/PR905 --- Diffs of the changes: (+47 -0) 2006-09-11-EmptyStructCrash.ll | 47 +++++++++++++++++++++++++++++++++++++++++ 1 files changed, 47 insertions(+) Index: llvm/test/Regression/Transforms/InstCombine/2006-09-11-EmptyStructCrash.ll diff -c /dev/null llvm/test/Regression/Transforms/InstCombine/2006-09-11-EmptyStructCrash.ll:1.1 *** /dev/null Mon Sep 11 16:42:06 2006 --- llvm/test/Regression/Transforms/InstCombine/2006-09-11-EmptyStructCrash.ll Mon Sep 11 16:41:56 2006 *************** *** 0 **** --- 1,47 ---- + ; RUN: llvm-as < %s | opt -instcombine -disable-output + ; PR905 + + %RPYTHON_EXCEPTION = type { %RPYTHON_EXCEPTION_VTABLE* } + %RPYTHON_EXCEPTION_VTABLE = type { %RPYTHON_EXCEPTION_VTABLE*, int, int, %RPyOpaque_RuntimeTypeInfo*, %arraytype_Char*, %functiontype_12* } + %RPyOpaque_RuntimeTypeInfo = type opaque* + %arraytype_Char = type { int, [0 x sbyte] } + %fixarray_array1019 = type [1019 x sbyte*] + %functiontype_12 = type %RPYTHON_EXCEPTION* () + %functiontype_14 = type void (%structtype_pypy.rpython.memory.gc.MarkSweepGC*) + %structtype_AddressLinkedListChunk = type { %structtype_AddressLinkedListChunk*, int, %fixarray_array1019 } + %structtype_exceptions.Exception = type { %RPYTHON_EXCEPTION } + %structtype_gc_pool = type { } + %structtype_gc_pool_node = type { %structtype_header*, %structtype_gc_pool_node* } + %structtype_header = type { int, %structtype_header* } + %structtype_pypy.rpython.memory.gc.MarkSweepGC = type { %structtype_exceptions.Exception, int, int, bool, %structtype_gc_pool*, int, %structtype_header*, %structtype_header*, %structtype_gc_pool_node*, double, double } + + implementation ; Functions: + + fastcc void %pypy_MarkSweepGC.collect() { + block0: + %v1221 = load %structtype_AddressLinkedListChunk** null ; <%structtype_AddressLinkedListChunk*> [#uses=1] + %v1222 = setne %structtype_AddressLinkedListChunk* %v1221, null ; [#uses=1] + br bool %v1222, label %block79, label %block4 + + block4: ; preds = %block0 + ret void + + block22: ; preds = %block79 + ret void + + block67: ; preds = %block79 + %v1459 = load %structtype_gc_pool** null ; <%structtype_gc_pool*> [#uses=1] + %v1460 = cast %structtype_gc_pool* %v1459 to sbyte* ; [#uses=1] + %tmp_873 = cast sbyte* %v1460 to int ; [#uses=1] + %tmp_874 = sub int %tmp_873, 0 ; [#uses=1] + %v1461 = cast int %tmp_874 to sbyte* ; [#uses=1] + %v1462 = cast sbyte* %v1461 to %structtype_header* ; <%structtype_header*> [#uses=1] + %tmp_876 = getelementptr %structtype_header* %v1462, int 0, uint 0 ; [#uses=1] + store int 0, int* %tmp_876 + ret void + + block79: ; preds = %block0 + %v1291 = load %structtype_gc_pool** null ; <%structtype_gc_pool*> [#uses=1] + %v1292 = setne %structtype_gc_pool* %v1291, null ; [#uses=1] + br bool %v1292, label %block67, label %block22 + } From lattner at cs.uiuc.edu Mon Sep 11 16:43:30 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon, 11 Sep 2006 16:43:30 -0500 Subject: [llvm-commits] CVS: llvm/lib/Transforms/Scalar/InstructionCombining.cpp Message-ID: <200609112143.k8BLhU6h025308@zion.cs.uiuc.edu> Changes in directory llvm/lib/Transforms/Scalar: InstructionCombining.cpp updated: 1.503 -> 1.504 --- Log message: Fix PR905: http://llvm.org/PR905 and InstCombine/2006-09-11-EmptyStructCrash.ll --- Diffs of the changes: (+2 -1) InstructionCombining.cpp | 3 ++- 1 files changed, 2 insertions(+), 1 deletion(-) Index: llvm/lib/Transforms/Scalar/InstructionCombining.cpp diff -u llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.503 llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.504 --- llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.503 Sat Sep 9 17:02:56 2006 +++ llvm/lib/Transforms/Scalar/InstructionCombining.cpp Mon Sep 11 16:43:16 2006 @@ -5187,7 +5187,8 @@ Constant *ZeroUInt = Constant::getNullValue(Type::UIntTy); unsigned NumZeros = 0; while (SrcTy != DstTy && - isa(SrcTy) && !isa(SrcTy)) { + isa(SrcTy) && !isa(SrcTy) && + SrcTy->getNumContainedTypes() /* not "{}" */) { SrcTy = cast(SrcTy)->getTypeAtIndex(ZeroUInt); ++NumZeros; } From lattner at cs.uiuc.edu Mon Sep 11 17:48:38 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon, 11 Sep 2006 17:48:38 -0500 Subject: [llvm-commits] CVS: llvm/test/Regression/CFrontend/2006-09-11-BitfieldRefCrash.c Message-ID: <200609112248.k8BMmc9K026448@zion.cs.uiuc.edu> Changes in directory llvm/test/Regression/CFrontend: 2006-09-11-BitfieldRefCrash.c added (r1.1) --- Log message: new testcase for PR906: http://llvm.org/PR906 --- Diffs of the changes: (+12 -0) 2006-09-11-BitfieldRefCrash.c | 12 ++++++++++++ 1 files changed, 12 insertions(+) Index: llvm/test/Regression/CFrontend/2006-09-11-BitfieldRefCrash.c diff -c /dev/null llvm/test/Regression/CFrontend/2006-09-11-BitfieldRefCrash.c:1.1 *** /dev/null Mon Sep 11 17:48:33 2006 --- llvm/test/Regression/CFrontend/2006-09-11-BitfieldRefCrash.c Mon Sep 11 17:48:23 2006 *************** *** 0 **** --- 1,12 ---- + // RUN: %llvmgcc %s -S -o - + // PR906 + + struct state_struct { + unsigned long long phys_frame: 50; + unsigned valid : 2; + } s; + + int mem_access(struct state_struct *p) { + return p->valid; + } + From lattner at cs.uiuc.edu Mon Sep 11 17:58:05 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon, 11 Sep 2006 17:58:05 -0500 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/README.txt Message-ID: <200609112258.k8BMw5Ix026691@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: README.txt updated: 1.126 -> 1.127 --- Log message: add compilable testcase --- Diffs of the changes: (+6 -1) README.txt | 7 ++++++- 1 files changed, 6 insertions(+), 1 deletion(-) Index: llvm/lib/Target/X86/README.txt diff -u llvm/lib/Target/X86/README.txt:1.126 llvm/lib/Target/X86/README.txt:1.127 --- llvm/lib/Target/X86/README.txt:1.126 Mon Sep 11 00:35:17 2006 +++ llvm/lib/Target/X86/README.txt Mon Sep 11 17:57:51 2006 @@ -581,7 +581,12 @@ Codegen: -if ((variable == 4) || (variable == 6)) { stuff } +int f(int a, int b) { + if (a == 4 || a == 6) + b++; + return b; +} + as: From lattner at cs.uiuc.edu Mon Sep 11 18:01:10 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Mon, 11 Sep 2006 18:01:10 -0500 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/README.txt Message-ID: <200609112301.k8BN1AmQ026781@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: README.txt updated: 1.127 -> 1.128 --- Log message: Testcase noticed from PR906: http://llvm.org/PR906 --- Diffs of the changes: (+34 -0) README.txt | 34 ++++++++++++++++++++++++++++++++++ 1 files changed, 34 insertions(+) Index: llvm/lib/Target/X86/README.txt diff -u llvm/lib/Target/X86/README.txt:1.127 llvm/lib/Target/X86/README.txt:1.128 --- llvm/lib/Target/X86/README.txt:1.127 Mon Sep 11 17:57:51 2006 +++ llvm/lib/Target/X86/README.txt Mon Sep 11 18:00:56 2006 @@ -594,3 +594,37 @@ cmp eax, 6 jz label +//===---------------------------------------------------------------------===// + +Compile: +int %test(ulong *%tmp) { + %tmp = load ulong* %tmp ; [#uses=1] + %tmp.mask = shr ulong %tmp, ubyte 50 ; [#uses=1] + %tmp.mask = cast ulong %tmp.mask to ubyte ; [#uses=1] + %tmp2 = and ubyte %tmp.mask, 3 ; [#uses=1] + %tmp2 = cast ubyte %tmp2 to int ; [#uses=1] + ret int %tmp2 +} + +to: + +_test: + movl 4(%esp), %eax + movl 4(%eax), %eax + shrl $18, %eax + andl $3, %eax + ret + +instead of: + +_test: + movl 4(%esp), %eax + movl 4(%eax), %eax + shrl $18, %eax + # TRUNCATE movb %al, %al + andb $3, %al + movzbl %al, %eax + ret + +This saves a movzbl, and saves a truncate if it doesn't get coallesced right. +This is a simple DAGCombine to propagate the zext through the and. From nicholas at mxc.ca Mon Sep 11 19:18:42 2006 From: nicholas at mxc.ca (Nick Lewycky) Date: Mon, 11 Sep 2006 19:18:42 -0500 Subject: [llvm-commits] CVS: llvm/include/llvm/Analysis/Dominators.h Message-ID: <200609120018.k8C0Ig8u028113@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/Analysis: Dominators.h updated: 1.59 -> 1.60 --- Log message: Add ability to remove nodes from DominatorTree, for when a BasicBlock is being removed. --- Diffs of the changes: (+8 -0) Dominators.h | 8 ++++++++ 1 files changed, 8 insertions(+) Index: llvm/include/llvm/Analysis/Dominators.h diff -u llvm/include/llvm/Analysis/Dominators.h:1.59 llvm/include/llvm/Analysis/Dominators.h:1.60 --- llvm/include/llvm/Analysis/Dominators.h:1.59 Tue Aug 1 17:24:38 2006 +++ llvm/include/llvm/Analysis/Dominators.h Mon Sep 11 19:18:28 2006 @@ -399,6 +399,14 @@ N->setIDom(NewIDom); } + /// removeNode - Removes a node from the dominator tree. Block must not + /// dominate any other blocks. Invalidates any node pointing to removed + /// block. + void removeNode(BasicBlock *BB) { + assert(getNode(BB) && "Removing node that isn't in dominator tree."); + Nodes.erase(BB); + } + /// print - Convert to human readable form /// virtual void print(std::ostream &OS, const Module* = 0) const; From lattner at cs.uiuc.edu Tue Sep 12 01:36:16 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue, 12 Sep 2006 01:36:16 -0500 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/README.txt Message-ID: <200609120636.k8C6aGq3001249@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: README.txt updated: 1.128 -> 1.129 --- Log message: add a note --- Diffs of the changes: (+14 -0) README.txt | 14 ++++++++++++++ 1 files changed, 14 insertions(+) Index: llvm/lib/Target/X86/README.txt diff -u llvm/lib/Target/X86/README.txt:1.128 llvm/lib/Target/X86/README.txt:1.129 --- llvm/lib/Target/X86/README.txt:1.128 Mon Sep 11 18:00:56 2006 +++ llvm/lib/Target/X86/README.txt Tue Sep 12 01:36:01 2006 @@ -628,3 +628,17 @@ This saves a movzbl, and saves a truncate if it doesn't get coallesced right. This is a simple DAGCombine to propagate the zext through the and. + +//===---------------------------------------------------------------------===// + +Instead of: + + cmpl $4294967295, %edx + jg LBB1_8 #cond_false49 + +emit: + + testl %edx, %edx + js LBB1_8 + +This saves a byte of code space. From jlaskey at apple.com Tue Sep 12 06:37:22 2006 From: jlaskey at apple.com (Jim Laskey) Date: Tue, 12 Sep 2006 06:37:22 -0500 Subject: [llvm-commits] CVS: nightlytest-serverside/EmailReport.php Message-ID: <200609121137.k8CBbMML016200@zion.cs.uiuc.edu> Changes in directory nightlytest-serverside: EmailReport.php updated: 1.6 -> 1.7 --- Log message: testing --- Diffs of the changes: (+22 -26) EmailReport.php | 48 ++++++++++++++++++++++-------------------------- 1 files changed, 22 insertions(+), 26 deletions(-) Index: nightlytest-serverside/EmailReport.php diff -u nightlytest-serverside/EmailReport.php:1.6 nightlytest-serverside/EmailReport.php:1.7 --- nightlytest-serverside/EmailReport.php:1.6 Fri Sep 8 19:24:04 2006 +++ nightlytest-serverside/EmailReport.php Tue Sep 12 06:37:07 2006 @@ -1,21 +1,18 @@ + + \n"; + next($row); + } +} +mysql_free_result($night_query); mysql_close($mysql_link); ?> + + From lattner at cs.uiuc.edu Tue Sep 12 11:28:28 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue, 12 Sep 2006 11:28:28 -0500 Subject: [llvm-commits] CVS: llvm/test/Regression/C++Frontend/2006-09-12-OpaqueStructCrash.cpp Message-ID: <200609121628.k8CGSSAQ021445@zion.cs.uiuc.edu> Changes in directory llvm/test/Regression/C++Frontend: 2006-09-12-OpaqueStructCrash.cpp added (r1.1) --- Log message: Testcase that crashes the C++ FE. --- Diffs of the changes: (+28 -0) 2006-09-12-OpaqueStructCrash.cpp | 28 ++++++++++++++++++++++++++++ 1 files changed, 28 insertions(+) Index: llvm/test/Regression/C++Frontend/2006-09-12-OpaqueStructCrash.cpp diff -c /dev/null llvm/test/Regression/C++Frontend/2006-09-12-OpaqueStructCrash.cpp:1.1 *** /dev/null Tue Sep 12 11:28:24 2006 --- llvm/test/Regression/C++Frontend/2006-09-12-OpaqueStructCrash.cpp Tue Sep 12 11:28:14 2006 *************** *** 0 **** --- 1,28 ---- + // RUN: llvm-g++ -O3 -S -o - %s + + struct A { + virtual ~A(); + }; + + template + struct B : public A { + ~B () { delete [] val; } + private: + Ty* val; + }; + + template + struct C : public A { + C (); + ~C (); + }; + + template + struct D : public A { + D () {} + private: + B > blocks; + }; + + template class D; + From lattner at cs.uiuc.edu Tue Sep 12 14:16:18 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue, 12 Sep 2006 14:16:18 -0500 Subject: [llvm-commits] CVS: llvm/test/Regression/Transforms/LICM/2006-09-12-DeadUserOfSunkInstr.ll Message-ID: <200609121916.k8CJGIQj024427@zion.cs.uiuc.edu> Changes in directory llvm/test/Regression/Transforms/LICM: 2006-09-12-DeadUserOfSunkInstr.ll added (r1.1) --- Log message: testcase for PR908: http://llvm.org/PR908 --- Diffs of the changes: (+215 -0) 2006-09-12-DeadUserOfSunkInstr.ll | 215 ++++++++++++++++++++++++++++++++++++++ 1 files changed, 215 insertions(+) Index: llvm/test/Regression/Transforms/LICM/2006-09-12-DeadUserOfSunkInstr.ll diff -c /dev/null llvm/test/Regression/Transforms/LICM/2006-09-12-DeadUserOfSunkInstr.ll:1.1 *** /dev/null Tue Sep 12 14:16:14 2006 --- llvm/test/Regression/Transforms/LICM/2006-09-12-DeadUserOfSunkInstr.ll Tue Sep 12 14:16:04 2006 *************** *** 0 **** --- 1,215 ---- + ; RUN: llvm-as < %s | opt -licm -disable-output + ; PR908 + + %struct.alloc_chain = type { sbyte*, %struct.alloc_chain* } + %struct.oggpack_buffer = type { int, int, ubyte*, ubyte*, int } + %struct.vorbis_block = type { float**, %struct.oggpack_buffer, int, int, int, int, int, int, long, long, %struct.vorbis_dsp_state*, sbyte*, int, int, int, %struct.alloc_chain*, int, int, int, int, sbyte* } + %struct.vorbis_dsp_state = type { int, %struct.vorbis_info*, float**, float**, int, int, int, int, int, int, int, int, int, long, long, long, long, long, long, sbyte* } + %struct.vorbis_info = type { int, int, int, int, int, int, int, sbyte* } + + implementation ; Functions: + + fastcc void %_01forward() { + entry: + br bool false, label %bb222.preheader, label %bb241 + + cond_true67: ; preds = %cond_true87 + br label %cond_next80 + + cond_next80: ; preds = %cond_true87, %cond_true67 + br label %bb83 + + bb83.preheader: ; preds = %cond_true226 + br bool false, label %bb83.us.preheader, label %bb83.preheader1 + + bb83.us.preheader: ; preds = %bb83.preheader + br label %bb83.us + + bb83.us: ; preds = %cond_next80.us, %bb83.us.preheader + br bool false, label %cond_true87.us, label %cond_next92.loopexit2 + + cond_next80.us: ; preds = %bb59.loopexit.us, %cond_true67.us + br label %bb83.us + + cond_true67.us: ; preds = %bb59.loopexit.us + br label %cond_next80.us + + cond_next.us: ; preds = %cond_true56.us, %cond_true38.us + br bool false, label %cond_true56.us, label %bb59.loopexit.us + + cond_true38.us: ; preds = %cond_true56.us + br label %cond_next.us + + cond_true56.us: ; preds = %cond_true87.us, %cond_next.us + br bool false, label %cond_true38.us, label %cond_next.us + + cond_true87.us: ; preds = %bb83.us + br label %cond_true56.us + + bb59.loopexit.us: ; preds = %cond_next.us + br bool false, label %cond_true67.us, label %cond_next80.us + + bb83.preheader1: ; preds = %bb83.preheader + br label %bb83 + + bb83: ; preds = %bb83.preheader1, %cond_next80 + br bool false, label %cond_next92.loopexit, label %cond_true87 + + cond_true87: ; preds = %bb83 + br bool false, label %cond_true67, label %cond_next80 + + cond_next92.loopexit: ; preds = %bb83 + br label %cond_next92 + + cond_next92.loopexit2: ; preds = %bb83.us + br label %cond_next92 + + cond_next92: ; preds = %cond_true226, %cond_next92.loopexit2, %cond_next92.loopexit + br bool false, label %cond_true218.loopexit, label %bb222 + + cond_true139: ; preds = %cond_true202 + br bool false, label %cond_next195, label %cond_true155 + + cond_true155: ; preds = %cond_true139 + br bool false, label %cond_true249.i.preheader, label %_encodepart.exit + + cond_true.i: ; preds = %cond_true115.i + br bool false, label %bb60.i.preheader, label %cond_next97.i + + bb60.i.preheader: ; preds = %cond_true.i + br label %bb60.i + + bb60.i: ; preds = %cond_true63.i, %bb60.i.preheader + br bool false, label %cond_true63.i, label %cond_next97.i.loopexit + + cond_true63.i: ; preds = %bb60.i + br bool false, label %bb60.i, label %cond_next97.i.loopexit + + bb86.i.preheader: ; preds = %cond_true115.i + br label %bb86.i + + bb86.i: ; preds = %cond_true93.i, %bb86.i.preheader + br bool false, label %cond_true93.i, label %cond_next97.i.loopexit3 + + cond_true93.i: ; preds = %bb86.i + br bool false, label %cond_next97.i.loopexit3, label %bb86.i + + cond_next97.i.loopexit: ; preds = %cond_true63.i, %bb60.i + br label %cond_next97.i + + cond_next97.i.loopexit3: ; preds = %cond_true93.i, %bb86.i + br label %cond_next97.i + + cond_next97.i: ; preds = %cond_next97.i.loopexit3, %cond_next97.i.loopexit, %cond_true.i + br bool false, label %bb118.i.loopexit, label %cond_true115.i + + cond_true115.i.preheader: ; preds = %cond_true249.i + br label %cond_true115.i + + cond_true115.i: ; preds = %cond_true115.i.preheader, %cond_next97.i + br bool false, label %cond_true.i, label %bb86.i.preheader + + bb118.i.loopexit: ; preds = %cond_next97.i + br label %bb118.i + + bb118.i: ; preds = %cond_true249.i, %bb118.i.loopexit + br bool false, label %cond_next204.i, label %cond_true128.i + + cond_true128.i: ; preds = %bb118.i + br bool false, label %cond_true199.i.preheader, label %cond_next204.i + + cond_true199.i.preheader: ; preds = %cond_true128.i + br label %cond_true199.i + + cond_true199.i.us: ; No predecessors! + br bool false, label %cond_true167.i.us, label %cond_next187.i.us + + cond_next187.i.us: ; preds = %bb170.i.loopexit.us, %bb170.i.us.cond_next187.i.us_crit_edge, %cond_true199.i.us + unreachable + + bb170.i.us.cond_next187.i.us_crit_edge: ; preds = %bb170.i.loopexit.us + br label %cond_next187.i.us + + cond_true167.i.us: ; preds = %cond_true167.i.us, %cond_true199.i.us + br bool false, label %cond_true167.i.us, label %bb170.i.loopexit.us + + bb170.i.loopexit.us: ; preds = %cond_true167.i.us + br bool false, label %cond_next187.i.us, label %bb170.i.us.cond_next187.i.us_crit_edge + + cond_true199.i: ; preds = %cond_true199.i, %cond_true199.i.preheader + br bool false, label %cond_next204.i.loopexit, label %cond_true199.i + + cond_next204.i.loopexit: ; preds = %cond_true199.i + br label %cond_next204.i + + cond_next204.i: ; preds = %cond_next204.i.loopexit, %cond_true128.i, %bb118.i + br label %bb233.i + + cond_true230.i: ; No predecessors! + %exitcond155 = seteq uint 0, %tmp16.i ; [#uses=0] + unreachable + + bb233.i: ; preds = %cond_next204.i + br bool false, label %_encodepart.exit.loopexit, label %cond_true249.i + + cond_true249.i.preheader: ; preds = %cond_true155 + br label %cond_true249.i + + cond_true249.i: ; preds = %cond_true249.i.preheader, %bb233.i + %tmp16.i = cast int 0 to uint ; [#uses=1] + br bool false, label %cond_true115.i.preheader, label %bb118.i + + _encodepart.exit.loopexit: ; preds = %bb233.i + br label %_encodepart.exit + + _encodepart.exit: ; preds = %_encodepart.exit.loopexit, %cond_true155 + br label %cond_next195 + + cond_next195: ; preds = %cond_true202, %_encodepart.exit, %cond_true139 + br bool false, label %bb205.loopexit, label %cond_true202 + + cond_true202.preheader: ; preds = %cond_true218 + br label %cond_true202 + + cond_true202: ; preds = %cond_true202.preheader, %cond_next195 + br bool false, label %cond_next195, label %cond_true139 + + bb205.loopexit: ; preds = %cond_next195 + br label %bb205 + + bb205: ; preds = %cond_true218, %bb205.loopexit + br bool false, label %cond_true218, label %bb222.outer105.loopexit + + cond_true218.loopexit: ; preds = %cond_next92 + br label %cond_true218 + + cond_true218: ; preds = %cond_true218.loopexit, %bb205 + br bool false, label %cond_true202.preheader, label %bb205 + + bb222.preheader: ; preds = %entry + br label %bb222.outer + + bb222.outer: ; preds = %bb229, %bb222.preheader + br label %bb222.outer105 + + bb222.outer105.loopexit: ; preds = %bb205 + br label %bb222.outer105 + + bb222.outer105: ; preds = %bb222.outer105.loopexit, %bb222.outer + br label %bb222 + + bb222: ; preds = %bb222.outer105, %cond_next92 + br bool false, label %cond_true226, label %bb229 + + cond_true226: ; preds = %bb222 + br bool false, label %bb83.preheader, label %cond_next92 + + bb229: ; preds = %bb222 + br bool false, label %bb222.outer, label %bb241.loopexit + + bb241.loopexit: ; preds = %bb229 + br label %bb241 + + bb241: ; preds = %bb241.loopexit, %entry + ret void + } From lattner at cs.uiuc.edu Tue Sep 12 14:17:23 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue, 12 Sep 2006 14:17:23 -0500 Subject: [llvm-commits] CVS: llvm/lib/Transforms/Scalar/LICM.cpp Message-ID: <200609121917.k8CJHNQS024463@zion.cs.uiuc.edu> Changes in directory llvm/lib/Transforms/Scalar: LICM.cpp updated: 1.78 -> 1.79 --- Log message: An sinkable instruction may exist with uses, if those uses are in dead blocks. Handle this. This fixes PR908: http://llvm.org/PR908 and Transforms/LICM/2006-09-12-DeadUserOfSunkInstr.ll --- Diffs of the changes: (+4 -0) LICM.cpp | 4 ++++ 1 files changed, 4 insertions(+) Index: llvm/lib/Transforms/Scalar/LICM.cpp diff -u llvm/lib/Transforms/Scalar/LICM.cpp:1.78 llvm/lib/Transforms/Scalar/LICM.cpp:1.79 --- llvm/lib/Transforms/Scalar/LICM.cpp:1.78 Sun Aug 27 17:42:52 2006 +++ llvm/lib/Transforms/Scalar/LICM.cpp Tue Sep 12 14:17:09 2006 @@ -447,6 +447,8 @@ if (!isExitBlockDominatedByBlockInLoop(ExitBlocks[0], I.getParent())) { // Instruction is not used, just delete it. CurAST->deleteValue(&I); + if (!I.use_empty()) // If I has users in unreachable blocks, eliminate. + I.replaceAllUsesWith(UndefValue::get(I.getType())); I.eraseFromParent(); } else { // Move the instruction to the start of the exit block, after any PHI @@ -460,6 +462,8 @@ } else if (ExitBlocks.size() == 0) { // The instruction is actually dead if there ARE NO exit blocks. CurAST->deleteValue(&I); + if (!I.use_empty()) // If I has users in unreachable blocks, eliminate. + I.replaceAllUsesWith(UndefValue::get(I.getType())); I.eraseFromParent(); } else { // Otherwise, if we have multiple exits, use the PromoteMem2Reg function to From criswell at cs.uiuc.edu Tue Sep 12 15:28:26 2006 From: criswell at cs.uiuc.edu (John Criswell) Date: Tue, 12 Sep 2006 15:28:26 -0500 Subject: [llvm-commits] CVS: llvm-www/releases/index.html Message-ID: <200609122028.PAA19552@choi.cs.uiuc.edu> Changes in directory llvm-www/releases: index.html updated: 1.31 -> 1.32 --- Log message: Move the addition of the line (
) above the UIUC CS attribtuion to the attrib.incl file. --- Diffs of the changes: (+0 -1) index.html | 1 - 1 files changed, 1 deletion(-) Index: llvm-www/releases/index.html diff -u llvm-www/releases/index.html:1.31 llvm-www/releases/index.html:1.32 --- llvm-www/releases/index.html:1.31 Mon Sep 11 09:48:58 2006 +++ llvm-www/releases/index.html Tue Sep 12 15:27:59 2006 @@ -91,7 +91,6 @@ -
From criswell at cs.uiuc.edu Tue Sep 12 15:28:25 2006 From: criswell at cs.uiuc.edu (John Criswell) Date: Tue, 12 Sep 2006 15:28:25 -0500 Subject: [llvm-commits] CVS: llvm-www/attrib.incl www-index.html Message-ID: <200609122028.PAA19548@choi.cs.uiuc.edu> Changes in directory llvm-www: attrib.incl updated: 1.2 -> 1.3 www-index.html updated: 1.130 -> 1.131 --- Log message: Move the addition of the line (
) above the UIUC CS attribtuion to the attrib.incl file. --- Diffs of the changes: (+1 -2) attrib.incl | 1 + www-index.html | 2 -- 2 files changed, 1 insertion(+), 2 deletions(-) Index: llvm-www/attrib.incl diff -u llvm-www/attrib.incl:1.2 llvm-www/attrib.incl:1.3 --- llvm-www/attrib.incl:1.2 Mon Sep 11 11:26:01 2006 +++ llvm-www/attrib.incl Tue Sep 12 15:27:56 2006 @@ -1,3 +1,4 @@ +
This web site is hosted by the Computer Science Department at the Index: llvm-www/www-index.html diff -u llvm-www/www-index.html:1.130 llvm-www/www-index.html:1.131 --- llvm-www/www-index.html:1.130 Mon Sep 11 09:46:40 2006 +++ llvm-www/www-index.html Tue Sep 12 15:27:56 2006 @@ -154,7 +154,5 @@ -
- From criswell at cs.uiuc.edu Tue Sep 12 15:30:37 2006 From: criswell at cs.uiuc.edu (John Criswell) Date: Tue, 12 Sep 2006 15:30:37 -0500 Subject: [llvm-commits] CVS: llvm/docs/doxygen.footer Message-ID: <200609122030.PAA19597@choi.cs.uiuc.edu> Changes in directory llvm/docs: doxygen.footer updated: 1.6 -> 1.7 --- Log message: Correct the URL to the attrib.incl file. --- Diffs of the changes: (+1 -1) doxygen.footer | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/docs/doxygen.footer diff -u llvm/docs/doxygen.footer:1.6 llvm/docs/doxygen.footer:1.7 --- llvm/docs/doxygen.footer:1.6 Mon Sep 11 09:52:26 2006 +++ llvm/docs/doxygen.footer Tue Sep 12 15:30:13 2006 @@ -7,7 +7,7 @@ All Rights Reserved.

- + From criswell at cs.uiuc.edu Tue Sep 12 15:35:44 2006 From: criswell at cs.uiuc.edu (John Criswell) Date: Tue, 12 Sep 2006 15:35:44 -0500 Subject: [llvm-commits] CVS: llvm-www/attrib.incl Message-ID: <200609122035.PAA19640@choi.cs.uiuc.edu> Changes in directory llvm-www: attrib.incl updated: 1.3 -> 1.4 --- Log message: Reduce the font size of the attribution. --- Diffs of the changes: (+2 -0) attrib.incl | 2 ++ 1 files changed, 2 insertions(+) Index: llvm-www/attrib.incl diff -u llvm-www/attrib.incl:1.3 llvm-www/attrib.incl:1.4 --- llvm-www/attrib.incl:1.3 Tue Sep 12 15:27:56 2006 +++ llvm-www/attrib.incl Tue Sep 12 15:35:18 2006 @@ -1,5 +1,7 @@
+ This web site is hosted by the Computer Science Department at the University of Illinois at Urbana-Champaign. + From evan.cheng at apple.com Tue Sep 12 15:59:36 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 12 Sep 2006 15:59:36 -0500 Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/AsmPrinter.h MachineConstantPool.h SelectionDAG.h SelectionDAGCSEMap.h SelectionDAGNodes.h Message-ID: <200609122059.k8CKxaH6026379@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/CodeGen: AsmPrinter.h updated: 1.47 -> 1.48 MachineConstantPool.h updated: 1.17 -> 1.18 SelectionDAG.h updated: 1.129 -> 1.130 SelectionDAGCSEMap.h updated: 1.7 -> 1.8 SelectionDAGNodes.h updated: 1.145 -> 1.146 --- Log message: Added support for machine specific constantpool values. These are useful for representing expressions that can only be resolved at link time, etc. --- Diffs of the changes: (+123 -10) AsmPrinter.h | 9 ++++++- MachineConstantPool.h | 63 +++++++++++++++++++++++++++++++++++++++++++++++--- SelectionDAG.h | 9 ++++++- SelectionDAGCSEMap.h | 1 SelectionDAGNodes.h | 51 ++++++++++++++++++++++++++++++++++++---- 5 files changed, 123 insertions(+), 10 deletions(-) Index: llvm/include/llvm/CodeGen/AsmPrinter.h diff -u llvm/include/llvm/CodeGen/AsmPrinter.h:1.47 llvm/include/llvm/CodeGen/AsmPrinter.h:1.48 --- llvm/include/llvm/CodeGen/AsmPrinter.h:1.47 Thu Sep 7 17:06:40 2006 +++ llvm/include/llvm/CodeGen/AsmPrinter.h Tue Sep 12 15:59:22 2006 @@ -24,6 +24,7 @@ class ConstantArray; class GlobalVariable; class MachineConstantPoolEntry; + class MachineConstantPoolValue; class Mangler; class TargetAsmInfo; @@ -174,6 +175,8 @@ /// EmitGlobalConstant - Print a general LLVM constant to the .s file. /// void EmitGlobalConstant(const Constant* CV); + + virtual void EmitMachineConstantPoolValue(MachineConstantPoolValue *MCPV); /// printInlineAsm - This method formats and prints the specified machine /// instruction that is an inline asm. @@ -188,7 +191,11 @@ /// printSetLabel - This method prints a set label for the specified /// MachineBasicBlock void printSetLabel(unsigned uid, const MachineBasicBlock *MBB) const; - + + /// printDataDirective - This method prints the asm directive for the + /// specified type. + void printDataDirective(const Type *type); + private: void EmitXXStructorList(Constant *List); void EmitConstantPool(unsigned Alignment, const char *Section, Index: llvm/include/llvm/CodeGen/MachineConstantPool.h diff -u llvm/include/llvm/CodeGen/MachineConstantPool.h:1.17 llvm/include/llvm/CodeGen/MachineConstantPool.h:1.18 --- llvm/include/llvm/CodeGen/MachineConstantPool.h:1.17 Mon May 15 11:12:01 2006 +++ llvm/include/llvm/CodeGen/MachineConstantPool.h Tue Sep 12 15:59:22 2006 @@ -15,22 +15,77 @@ #ifndef LLVM_CODEGEN_MACHINECONSTANTPOOL_H #define LLVM_CODEGEN_MACHINECONSTANTPOOL_H +#include "llvm/CodeGen/SelectionDAGCSEMap.h" #include #include namespace llvm { +class AsmPrinter; class Constant; class TargetData; +class TargetMachine; +class MachineConstantPool; + +/// Abstract base class for all machine specific constantpool value subclasses. +/// +class MachineConstantPoolValue { + const Type *Ty; + +public: + MachineConstantPoolValue(const Type *ty) : Ty(ty) {} + virtual ~MachineConstantPoolValue() {}; + + /// getType - get type of this MachineConstantPoolValue. + /// + inline const Type *getType() const { return Ty; } + + virtual int getExistingMachineCPValue(MachineConstantPool *CP, + unsigned Alignment) = 0; + + virtual void AddSelectionDAGCSEId(SelectionDAGCSEMap::NodeID *Id) = 0; + + /// print - Implement operator<<... + /// + virtual void print(std::ostream &O) const = 0; +}; + +inline std::ostream &operator<<(std::ostream &OS, + const MachineConstantPoolValue &V) { + V.print(OS); + return OS; +} /// This class is a data container for one entry in a MachineConstantPool. /// It contains a pointer to the value and an offset from the start of /// the constant pool. /// @brief An entry in a MachineConstantPool struct MachineConstantPoolEntry { - Constant *Val; ///< The constant itself. - unsigned Offset; ///< The offset of the constant from the start of the pool. - MachineConstantPoolEntry(Constant *V, unsigned O) : Val(V), Offset(O) {} + /// The constant itself. + union { + Constant *ConstVal; + MachineConstantPoolValue *MachineCPVal; + } Val; + + /// The offset of the constant from the start of the pool. It's really + /// 31-bit only. The top bit is set when Val is a MachineConstantPoolValue. + unsigned Offset; + + MachineConstantPoolEntry(Constant *V, unsigned O) + : Offset(O) { + assert((int)Offset >= 0 && "Offset is too large"); + Val.ConstVal = V; + } + MachineConstantPoolEntry(MachineConstantPoolValue *V, unsigned O) + : Offset(O){ + assert((int)Offset >= 0 && "Offset is too large"); + Val.MachineCPVal = V; + Offset |= 1 << (sizeof(unsigned)*8-1); + } + + bool isMachineConstantPoolEntry() const { + return (int)Offset < 0; + } }; /// The MachineConstantPool class keeps track of constants referenced by a @@ -50,6 +105,7 @@ public: /// @brief The only constructor. MachineConstantPool(const TargetData *td) : TD(td), PoolAlignment(1) {} + ~MachineConstantPool(); /// getConstantPoolAlignment - Return the log2 of the alignment required by /// the whole constant pool, of which the first element must be aligned. @@ -58,6 +114,7 @@ /// getConstantPoolIndex - Create a new entry in the constant pool or return /// an existing one. User must specify an alignment in bytes for the object. unsigned getConstantPoolIndex(Constant *C, unsigned Alignment); + unsigned getConstantPoolIndex(MachineConstantPoolValue *V,unsigned Alignment); /// isEmpty - Return true if this constant pool contains no constants. bool isEmpty() const { return Constants.empty(); } Index: llvm/include/llvm/CodeGen/SelectionDAG.h diff -u llvm/include/llvm/CodeGen/SelectionDAG.h:1.129 llvm/include/llvm/CodeGen/SelectionDAG.h:1.130 --- llvm/include/llvm/CodeGen/SelectionDAG.h:1.129 Wed Aug 30 00:56:52 2006 +++ llvm/include/llvm/CodeGen/SelectionDAG.h Tue Sep 12 15:59:22 2006 @@ -15,7 +15,6 @@ #ifndef LLVM_CODEGEN_SELECTIONDAG_H #define LLVM_CODEGEN_SELECTIONDAG_H -#include "llvm/CodeGen/SelectionDAGNodes.h" #include "llvm/CodeGen/SelectionDAGCSEMap.h" #include "llvm/ADT/ilist" @@ -30,6 +29,7 @@ class TargetMachine; class MachineDebugInfo; class MachineFunction; + class MachineConstantPoolValue; /// SelectionDAG class - This is used to represent a portion of an LLVM function /// in a low-level Data Dependence DAG representation suitable for instruction @@ -167,6 +167,13 @@ unsigned Align = 0, int Offset = 0) { return getConstantPool(C, VT, Align, Offset, true); } + SDOperand getConstantPool(MachineConstantPoolValue *C, MVT::ValueType VT, + unsigned Align = 0, int Offs = 0, bool isT=false); + SDOperand getTargetConstantPool(MachineConstantPoolValue *C, + MVT::ValueType VT, unsigned Align = 0, + int Offset = 0) { + return getConstantPool(C, VT, Align, Offset, true); + } SDOperand getBasicBlock(MachineBasicBlock *MBB); SDOperand getExternalSymbol(const char *Sym, MVT::ValueType VT); SDOperand getTargetExternalSymbol(const char *Sym, MVT::ValueType VT); Index: llvm/include/llvm/CodeGen/SelectionDAGCSEMap.h diff -u llvm/include/llvm/CodeGen/SelectionDAGCSEMap.h:1.7 llvm/include/llvm/CodeGen/SelectionDAGCSEMap.h:1.8 --- llvm/include/llvm/CodeGen/SelectionDAGCSEMap.h:1.7 Tue Aug 15 14:11:05 2006 +++ llvm/include/llvm/CodeGen/SelectionDAGCSEMap.h Tue Sep 12 15:59:22 2006 @@ -16,6 +16,7 @@ #define LLVM_CODEGEN_SELECTIONDAGCSEMAP_H #include "llvm/ADT/SmallVector.h" +#include "llvm/CodeGen/SelectionDAGNodes.h" namespace llvm { class SDNode; Index: llvm/include/llvm/CodeGen/SelectionDAGNodes.h diff -u llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.145 llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.146 --- llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.145 Sat Sep 9 00:55:44 2006 +++ llvm/include/llvm/CodeGen/SelectionDAGNodes.h Tue Sep 12 15:59:22 2006 @@ -19,11 +19,11 @@ #ifndef LLVM_CODEGEN_SELECTIONDAGNODES_H #define LLVM_CODEGEN_SELECTIONDAGNODES_H -#include "llvm/CodeGen/ValueTypes.h" #include "llvm/Value.h" #include "llvm/ADT/GraphTraits.h" #include "llvm/ADT/iterator" #include "llvm/ADT/SmallVector.h" +#include "llvm/CodeGen/ValueTypes.h" #include "llvm/Support/DataTypes.h" #include @@ -32,6 +32,7 @@ class SelectionDAG; class GlobalValue; class MachineBasicBlock; +class MachineConstantPoolValue; class SDNode; template struct simplify_type; template struct ilist_traits; @@ -1145,7 +1146,10 @@ }; class ConstantPoolSDNode : public SDNode { - Constant *C; + union { + Constant *ConstVal; + MachineConstantPoolValue *MachineCPVal; + } Val; int Offset; unsigned Alignment; protected: @@ -1153,20 +1157,57 @@ ConstantPoolSDNode(bool isTarget, Constant *c, MVT::ValueType VT, int o=0) : SDNode(isTarget ? ISD::TargetConstantPool : ISD::ConstantPool, VT), - C(c), Offset(o), Alignment(0) {} + Offset(o), Alignment(0) { + assert((int)Offset >= 0 && "Offset is too large"); + Val.ConstVal = c; + } ConstantPoolSDNode(bool isTarget, Constant *c, MVT::ValueType VT, int o, unsigned Align) : SDNode(isTarget ? ISD::TargetConstantPool : ISD::ConstantPool, VT), - C(c), Offset(o), Alignment(Align) {} + Offset(o), Alignment(Align) { + assert((int)Offset >= 0 && "Offset is too large"); + Val.ConstVal = c; + } + ConstantPoolSDNode(bool isTarget, MachineConstantPoolValue *v, + MVT::ValueType VT, int o=0) + : SDNode(isTarget ? ISD::TargetConstantPool : ISD::ConstantPool, VT), + Offset(o), Alignment(0) { + assert((int)Offset >= 0 && "Offset is too large"); + Val.MachineCPVal = v; + Offset |= 1 << (sizeof(unsigned)*8-1); + } + ConstantPoolSDNode(bool isTarget, MachineConstantPoolValue *v, + MVT::ValueType VT, int o, unsigned Align) + : SDNode(isTarget ? ISD::TargetConstantPool : ISD::ConstantPool, VT), + Offset(o), Alignment(Align) { + assert((int)Offset >= 0 && "Offset is too large"); + Val.MachineCPVal = v; + Offset |= 1 << (sizeof(unsigned)*8-1); + } public: - Constant *get() const { return C; } + bool isMachineConstantPoolEntry() const { + return (int)Offset < 0; + } + + Constant *getConstVal() const { + assert(!isMachineConstantPoolEntry() && "Wrong constantpool type"); + return Val.ConstVal; + } + + MachineConstantPoolValue *getMachineCPVal() const { + assert(isMachineConstantPoolEntry() && "Wrong constantpool type"); + return Val.MachineCPVal; + } + int getOffset() const { return Offset; } // Return the alignment of this constant pool object, which is either 0 (for // default alignment) or log2 of the desired value. unsigned getAlignment() const { return Alignment; } + const Type *getType() const; + static bool classof(const ConstantPoolSDNode *) { return true; } static bool classof(const SDNode *N) { return N->getOpcode() == ISD::ConstantPool || From evan.cheng at apple.com Tue Sep 12 16:00:14 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 12 Sep 2006 16:00:14 -0500 Subject: [llvm-commits] CVS: llvm/lib/ExecutionEngine/JIT/JITEmitter.cpp Message-ID: <200609122100.k8CL0ElS026410@zion.cs.uiuc.edu> Changes in directory llvm/lib/ExecutionEngine/JIT: JITEmitter.cpp updated: 1.112 -> 1.113 --- Log message: Reflect MachineConstantPoolEntry changes. --- Diffs of the changes: (+12 -3) JITEmitter.cpp | 15 ++++++++++++--- 1 files changed, 12 insertions(+), 3 deletions(-) Index: llvm/lib/ExecutionEngine/JIT/JITEmitter.cpp diff -u llvm/lib/ExecutionEngine/JIT/JITEmitter.cpp:1.112 llvm/lib/ExecutionEngine/JIT/JITEmitter.cpp:1.113 --- llvm/lib/ExecutionEngine/JIT/JITEmitter.cpp:1.112 Sun Sep 10 18:03:44 2006 +++ llvm/lib/ExecutionEngine/JIT/JITEmitter.cpp Tue Sep 12 15:59:59 2006 @@ -861,8 +861,11 @@ const std::vector &Constants = MCP->getConstants(); if (Constants.empty()) return; - unsigned Size = Constants.back().Offset; - Size += TheJIT->getTargetData()->getTypeSize(Constants.back().Val->getType()); + MachineConstantPoolEntry CPE = Constants.back(); + unsigned Size = CPE.Offset; + const Type *Ty = CPE.isMachineConstantPoolEntry() + ? CPE.Val.ConstVal->getType() : CPE.Val.MachineCPVal->getType(); + Size += TheJIT->getTargetData()->getTypeSize(Ty); ConstantPoolBase = allocateSpace(Size, 1 << MCP->getConstantPoolAlignment()); ConstantPool = MCP; @@ -872,7 +875,13 @@ // Initialize the memory for all of the constant pool entries. for (unsigned i = 0, e = Constants.size(); i != e; ++i) { void *CAddr = (char*)ConstantPoolBase+Constants[i].Offset; - TheJIT->InitializeMemory(Constants[i].Val, CAddr); + if (Constants[i].isMachineConstantPoolEntry()) { + // FIXME: add support to lower machine constant pool values into bytes! + std::cerr << "Initialize memory with machine specific constant pool entry" + << " has not been implemented!\n"; + abort(); + } + TheJIT->InitializeMemory(Constants[i].Val.ConstVal, CAddr); } } From evan.cheng at apple.com Tue Sep 12 16:00:52 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 12 Sep 2006 16:00:52 -0500 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp SelectionDAG.cpp SelectionDAGCSEMap.cpp SelectionDAGPrinter.cpp Message-ID: <200609122100.k8CL0qPk026465@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/SelectionDAG: ScheduleDAG.cpp updated: 1.102 -> 1.103 SelectionDAG.cpp updated: 1.337 -> 1.338 SelectionDAGCSEMap.cpp updated: 1.8 -> 1.9 SelectionDAGPrinter.cpp updated: 1.33 -> 1.34 --- Log message: Added support for machine specific constantpool values. These are useful for representing expressions that can only be resolved at link time, etc. --- Diffs of the changes: (+57 -13) ScheduleDAG.cpp | 14 +++++++++----- SelectionDAG.cpp | 30 +++++++++++++++++++++++++++++- SelectionDAGCSEMap.cpp | 7 ++++++- SelectionDAGPrinter.cpp | 19 +++++++++++++------ 4 files changed, 57 insertions(+), 13 deletions(-) Index: llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp diff -u llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.102 llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.103 --- llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.102 Mon Sep 4 21:31:13 2006 +++ llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp Tue Sep 12 16:00:35 2006 @@ -324,22 +324,26 @@ dyn_cast(Op)) { int Offset = CP->getOffset(); unsigned Align = CP->getAlignment(); + const Type *Type = CP->getType(); // MachineConstantPool wants an explicit alignment. if (Align == 0) { - if (CP->get()->getType() == Type::DoubleTy) + if (Type == Type::DoubleTy) Align = 3; // always 8-byte align doubles. else { - Align = TM.getTargetData() - ->getTypeAlignmentShift(CP->get()->getType()); + Align = TM.getTargetData()->getTypeAlignmentShift(Type); if (Align == 0) { // Alignment of packed types. FIXME! - Align = TM.getTargetData()->getTypeSize(CP->get()->getType()); + Align = TM.getTargetData()->getTypeSize(Type); Align = Log2_64(Align); } } } - unsigned Idx = ConstPool->getConstantPoolIndex(CP->get(), Align); + unsigned Idx; + if (CP->isMachineConstantPoolEntry()) + Idx = ConstPool->getConstantPoolIndex(CP->getMachineCPVal(), Align); + else + Idx = ConstPool->getConstantPoolIndex(CP->getConstVal(), Align); MI->addConstantPoolIndexOperand(Idx, Offset); } else if (ExternalSymbolSDNode *ES = dyn_cast(Op)) { Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.337 llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.338 --- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.337 Sat Sep 9 01:03:30 2006 +++ llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Tue Sep 12 16:00:35 2006 @@ -17,6 +17,7 @@ #include "llvm/Intrinsics.h" #include "llvm/Assembly/Writer.h" #include "llvm/CodeGen/MachineBasicBlock.h" +#include "llvm/CodeGen/MachineConstantPool.h" #include "llvm/Support/MathExtras.h" #include "llvm/Target/MRegisterInfo.h" #include "llvm/Target/TargetLowering.h" @@ -587,6 +588,25 @@ } +SDOperand SelectionDAG::getConstantPool(MachineConstantPoolValue *C, + MVT::ValueType VT, + unsigned Alignment, int Offset, + bool isTarget) { + unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; + SelectionDAGCSEMap::NodeID ID(Opc, getVTList(VT)); + ID.AddInteger(Alignment); + ID.AddInteger(Offset); + C->AddSelectionDAGCSEId(&ID); + void *IP = 0; + if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) + return SDOperand(E, 0); + SDNode *N = new ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment); + CSEMap.InsertNode(N, IP); + AllNodes.push_back(N); + return SDOperand(N, 0); +} + + SDOperand SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { SelectionDAGCSEMap::NodeID ID(ISD::BasicBlock, getVTList(MVT::Other)); ID.AddPointer(MBB); @@ -2586,7 +2606,10 @@ std::cerr << "<" << FIDN->getIndex() << ">"; } else if (const ConstantPoolSDNode *CP = dyn_cast(this)){ int offset = CP->getOffset(); - std::cerr << "<" << *CP->get() << ">"; + if (CP->isMachineConstantPoolEntry()) + std::cerr << "<" << *CP->getMachineCPVal() << ">"; + else + std::cerr << "<" << *CP->getConstVal() << ">"; if (offset > 0) std::cerr << " + " << offset; else @@ -2648,3 +2671,8 @@ std::cerr << "\n\n"; } +const Type *ConstantPoolSDNode::getType() const { + if (isMachineConstantPoolEntry()) + return Val.MachineCPVal->getType(); + return Val.ConstVal->getType(); +} Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGCSEMap.cpp diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAGCSEMap.cpp:1.8 llvm/lib/CodeGen/SelectionDAG/SelectionDAGCSEMap.cpp:1.9 --- llvm/lib/CodeGen/SelectionDAG/SelectionDAGCSEMap.cpp:1.8 Tue Aug 15 14:11:05 2006 +++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGCSEMap.cpp Tue Sep 12 16:00:35 2006 @@ -12,6 +12,7 @@ //===----------------------------------------------------------------------===// #include "llvm/CodeGen/SelectionDAG.h" +#include "llvm/CodeGen/MachineConstantPool.h" #include "llvm/Support/MathExtras.h" using namespace llvm; @@ -70,7 +71,11 @@ case ISD::TargetConstantPool: AddInteger(cast(N)->getAlignment()); AddInteger(cast(N)->getOffset()); - AddPointer(cast(N)->get()); + if (cast(N)->isMachineConstantPoolEntry()) + cast(N)->getMachineCPVal()-> + AddSelectionDAGCSEId(this); + else + AddPointer(cast(N)->getConstVal()); break; } } Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp:1.33 llvm/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp:1.34 --- llvm/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp:1.33 Tue Jun 27 11:49:46 2006 +++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp Tue Sep 12 16:00:35 2006 @@ -15,6 +15,7 @@ #include "llvm/Function.h" #include "llvm/Assembly/Writer.h" #include "llvm/CodeGen/SelectionDAG.h" +#include "llvm/CodeGen/MachineConstantPool.h" #include "llvm/CodeGen/MachineFunction.h" #include "llvm/Target/MRegisterInfo.h" #include "llvm/Target/TargetMachine.h" @@ -80,14 +81,20 @@ } else if (const FrameIndexSDNode *FIDN = dyn_cast(Node)) { Op += " " + itostr(FIDN->getIndex()); } else if (const ConstantPoolSDNode *CP = dyn_cast(Node)){ - if (ConstantFP *CFP = dyn_cast(CP->get())) - Op += "<" + ftostr(CFP->getValue()) + ">"; - else if (ConstantInt *CI = dyn_cast(CP->get())) - Op += "<" + utostr(CI->getZExtValue()) + ">"; - else { + if (CP->isMachineConstantPoolEntry()) { std::ostringstream SS; - WriteAsOperand(SS, CP->get(), false); + CP->getMachineCPVal()->print(SS); Op += "<" + SS.str() + ">"; + } else { + if (ConstantFP *CFP = dyn_cast(CP->getConstVal())) + Op += "<" + ftostr(CFP->getValue()) + ">"; + else if (ConstantInt *CI = dyn_cast(CP->getConstVal())) + Op += "<" + utostr(CI->getZExtValue()) + ">"; + else { + std::ostringstream SS; + WriteAsOperand(SS, CP->getConstVal(), false); + Op += "<" + SS.str() + ">"; + } } } else if (const BasicBlockSDNode *BBDN = dyn_cast(Node)) { Op = "BB: "; From evan.cheng at apple.com Tue Sep 12 16:00:52 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 12 Sep 2006 16:00:52 -0500 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/AsmPrinter.cpp MachineFunction.cpp Message-ID: <200609122100.k8CL0qPE026449@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen: AsmPrinter.cpp updated: 1.93 -> 1.94 MachineFunction.cpp updated: 1.97 -> 1.98 --- Log message: Added support for machine specific constantpool values. These are useful for representing expressions that can only be resolved at link time, etc. --- Diffs of the changes: (+95 -38) AsmPrinter.cpp | 93 ++++++++++++++++++++++++++++++++-------------------- MachineFunction.cpp | 40 ++++++++++++++++++++-- 2 files changed, 95 insertions(+), 38 deletions(-) Index: llvm/lib/CodeGen/AsmPrinter.cpp diff -u llvm/lib/CodeGen/AsmPrinter.cpp:1.93 llvm/lib/CodeGen/AsmPrinter.cpp:1.94 --- llvm/lib/CodeGen/AsmPrinter.cpp:1.93 Thu Sep 7 17:06:40 2006 +++ llvm/lib/CodeGen/AsmPrinter.cpp Tue Sep 12 16:00:35 2006 @@ -126,10 +126,11 @@ std::vector > EightByteCPs; std::vector > SixteenByteCPs; std::vector > OtherCPs; + std::vector > TargetCPs; for (unsigned i = 0, e = CP.size(); i != e; ++i) { MachineConstantPoolEntry CPE = CP[i]; - const Constant *CV = CPE.Val; - const Type *Ty = CV->getType(); + const Type *Ty = CPE.isMachineConstantPoolEntry() + ? CPE.Val.MachineCPVal->getType() : CPE.Val.ConstVal->getType(); if (TAI->getFourByteConstantSection() && TM.getTargetData()->getTypeSize(Ty) == 4) FourByteCPs.push_back(std::make_pair(CPE, i)); @@ -160,11 +161,20 @@ for (unsigned i = 0, e = CP.size(); i != e; ++i) { O << TAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber() << '_' << CP[i].second << ":\t\t\t\t\t" << TAI->getCommentString() << " "; - WriteTypeSymbolic(O, CP[i].first.Val->getType(), 0) << '\n'; - EmitGlobalConstant(CP[i].first.Val); + if (CP[i].first.isMachineConstantPoolEntry()) { + WriteTypeSymbolic(O, CP[i].first.Val.MachineCPVal->getType(), 0) << '\n'; + printDataDirective(CP[i].first.Val.MachineCPVal->getType()); + EmitMachineConstantPoolValue(CP[i].first.Val.MachineCPVal); + } else { + WriteTypeSymbolic(O, CP[i].first.Val.ConstVal->getType(), 0) << '\n'; + EmitGlobalConstant(CP[i].first.Val.ConstVal); + } if (i != e-1) { + const Type *Ty = CP[i].first.isMachineConstantPoolEntry() + ? CP[i].first.Val.MachineCPVal->getType() + : CP[i].first.Val.ConstVal->getType(); unsigned EntSize = - TM.getTargetData()->getTypeSize(CP[i].first.Val->getType()); + TM.getTargetData()->getTypeSize(Ty); unsigned ValEnd = CP[i].first.Offset + EntSize; // Emit inter-object padding for alignment. EmitZeros(CP[i+1].first.Offset-ValEnd); @@ -580,40 +590,17 @@ } const Type *type = CV->getType(); - switch (type->getTypeID()) { - case Type::BoolTyID: - case Type::UByteTyID: case Type::SByteTyID: - O << TAI->getData8bitsDirective(); - break; - case Type::UShortTyID: case Type::ShortTyID: - O << TAI->getData16bitsDirective(); - break; - case Type::PointerTyID: - if (TD->getPointerSize() == 8) { - assert(TAI->getData64bitsDirective() && - "Target cannot handle 64-bit pointer exprs!"); - O << TAI->getData64bitsDirective(); - break; - } - //Fall through for pointer size == int size - case Type::UIntTyID: case Type::IntTyID: - O << TAI->getData32bitsDirective(); - break; - case Type::ULongTyID: case Type::LongTyID: - assert(TAI->getData64bitsDirective() && - "Target cannot handle 64-bit constant exprs!"); - O << TAI->getData64bitsDirective(); - break; - case Type::FloatTyID: case Type::DoubleTyID: - assert (0 && "Should have already output floating point constant."); - default: - assert (0 && "Can't handle printing this type of thing"); - break; - } + printDataDirective(type); EmitConstantValueOnly(CV); O << "\n"; } +void +AsmPrinter::EmitMachineConstantPoolValue(MachineConstantPoolValue *MCPV) { + // Target doesn't support this yet! + abort(); +} + /// printInlineAsm - This method formats and prints the specified machine /// instruction that is an inline asm. void AsmPrinter::printInlineAsm(const MachineInstr *MI) const { @@ -829,3 +816,39 @@ O << '-' << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber() << '_' << uid << '\n'; } + +/// printDataDirective - This method prints the asm directive for the +/// specified type. +void AsmPrinter::printDataDirective(const Type *type) { + const TargetData *TD = TM.getTargetData(); + switch (type->getTypeID()) { + case Type::BoolTyID: + case Type::UByteTyID: case Type::SByteTyID: + O << TAI->getData8bitsDirective(); + break; + case Type::UShortTyID: case Type::ShortTyID: + O << TAI->getData16bitsDirective(); + break; + case Type::PointerTyID: + if (TD->getPointerSize() == 8) { + assert(TAI->getData64bitsDirective() && + "Target cannot handle 64-bit pointer exprs!"); + O << TAI->getData64bitsDirective(); + break; + } + //Fall through for pointer size == int size + case Type::UIntTyID: case Type::IntTyID: + O << TAI->getData32bitsDirective(); + break; + case Type::ULongTyID: case Type::LongTyID: + assert(TAI->getData64bitsDirective() && + "Target cannot handle 64-bit constant exprs!"); + O << TAI->getData64bitsDirective(); + break; + case Type::FloatTyID: case Type::DoubleTyID: + assert (0 && "Should have already output floating point constant."); + default: + assert (0 && "Can't handle printing this type of thing"); + break; + } +} Index: llvm/lib/CodeGen/MachineFunction.cpp diff -u llvm/lib/CodeGen/MachineFunction.cpp:1.97 llvm/lib/CodeGen/MachineFunction.cpp:1.98 --- llvm/lib/CodeGen/MachineFunction.cpp:1.97 Sun Aug 27 07:54:01 2006 +++ llvm/lib/CodeGen/MachineFunction.cpp Tue Sep 12 16:00:35 2006 @@ -351,6 +351,12 @@ // MachineConstantPool implementation //===----------------------------------------------------------------------===// +MachineConstantPool::~MachineConstantPool() { + for (unsigned i = 0, e = Constants.size(); i != e; ++i) + if (Constants[i].isMachineConstantPoolEntry()) + delete Constants[i].Val.MachineCPVal; +} + /// getConstantPoolIndex - Create a new entry in the constant pool or return /// an existing one. User must specify an alignment in bytes for the object. /// @@ -364,13 +370,13 @@ // FIXME, this could be made much more efficient for large constant pools. unsigned AlignMask = (1 << Alignment)-1; for (unsigned i = 0, e = Constants.size(); i != e; ++i) - if (Constants[i].Val == C && (Constants[i].Offset & AlignMask) == 0) + if (Constants[i].Val.ConstVal == C && (Constants[i].Offset & AlignMask)== 0) return i; unsigned Offset = 0; if (!Constants.empty()) { Offset = Constants.back().Offset; - Offset += TD->getTypeSize(Constants.back().Val->getType()); + Offset += TD->getTypeSize(Constants.back().Val.ConstVal->getType()); Offset = (Offset+AlignMask)&~AlignMask; } @@ -378,10 +384,38 @@ return Constants.size()-1; } +unsigned MachineConstantPool::getConstantPoolIndex(MachineConstantPoolValue *V, + unsigned Alignment) { + assert(Alignment && "Alignment must be specified!"); + if (Alignment > PoolAlignment) PoolAlignment = Alignment; + + // Check to see if we already have this constant. + // + // FIXME, this could be made much more efficient for large constant pools. + unsigned AlignMask = (1 << Alignment)-1; + int Idx = V->getExistingMachineCPValue(this, Alignment); + if (Idx != -1) + return (unsigned)Idx; + + unsigned Offset = 0; + if (!Constants.empty()) { + Offset = Constants.back().Offset; + Offset += TD->getTypeSize(Constants.back().Val.MachineCPVal->getType()); + Offset = (Offset+AlignMask)&~AlignMask; + } + + Constants.push_back(MachineConstantPoolEntry(V, Offset)); + return Constants.size()-1; +} + void MachineConstantPool::print(std::ostream &OS) const { for (unsigned i = 0, e = Constants.size(); i != e; ++i) { - OS << " is" << *(Value*)Constants[i].Val; + OS << " is"; + if (Constants[i].isMachineConstantPoolEntry()) + Constants[i].Val.MachineCPVal->print(OS); + else + OS << *(Value*)Constants[i].Val.ConstVal; OS << " , offset=" << Constants[i].Offset; OS << "\n"; } From evan.cheng at apple.com Tue Sep 12 16:02:19 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 12 Sep 2006 16:02:19 -0500 Subject: [llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaISelLowering.cpp Message-ID: <200609122102.k8CL2J2B026513@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/Alpha: AlphaISelLowering.cpp updated: 1.59 -> 1.60 --- Log message: Reflects MachineConstantPoolEntry changes. --- Diffs of the changes: (+1 -1) AlphaISelLowering.cpp | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/Target/Alpha/AlphaISelLowering.cpp diff -u llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.59 llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.60 --- llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.59 Mon Sep 4 19:22:25 2006 +++ llvm/lib/Target/Alpha/AlphaISelLowering.cpp Tue Sep 12 16:02:05 2006 @@ -436,7 +436,7 @@ } case ISD::ConstantPool: { ConstantPoolSDNode *CP = cast(Op); - Constant *C = CP->get(); + Constant *C = CP->getConstVal(); SDOperand CPI = DAG.getTargetConstantPool(C, MVT::i64, CP->getAlignment()); SDOperand Hi = DAG.getNode(AlphaISD::GPRelHi, MVT::i64, CPI, From evan.cheng at apple.com Tue Sep 12 16:02:34 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 12 Sep 2006 16:02:34 -0500 Subject: [llvm-commits] CVS: llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp IA64ISelLowering.cpp Message-ID: <200609122102.k8CL2YC8026533@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/IA64: IA64ISelDAGToDAG.cpp updated: 1.53 -> 1.54 IA64ISelLowering.cpp updated: 1.42 -> 1.43 --- Log message: Reflects MachineConstantPoolEntry changes. --- Diffs of the changes: (+2 -2) IA64ISelDAGToDAG.cpp | 2 +- IA64ISelLowering.cpp | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp diff -u llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp:1.53 llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp:1.54 --- llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp:1.53 Sun Aug 27 03:12:51 2006 +++ llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp Tue Sep 12 16:02:20 2006 @@ -429,7 +429,7 @@ case ISD::ConstantPool: { // TODO: nuke the constant pool // (ia64 doesn't need one) ConstantPoolSDNode *CP = cast(N); - Constant *C = CP->get(); + Constant *C = CP->getConstVal(); SDOperand CPI = CurDAG->getTargetConstantPool(C, MVT::i64, CP->getAlignment()); return CurDAG->getTargetNode(IA64::ADDL_GA, MVT::i64, // ? Index: llvm/lib/Target/IA64/IA64ISelLowering.cpp diff -u llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.42 llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.43 --- llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.42 Mon Sep 4 01:21:35 2006 +++ llvm/lib/Target/IA64/IA64ISelLowering.cpp Tue Sep 12 16:02:20 2006 @@ -136,7 +136,7 @@ else if (Op.getOpcode() == ISD::EXTLOAD || Op.getOpcode() == ISD::LOAD) { // Maybe this has already been legalized into the constant pool? if (ConstantPoolSDNode *CP = dyn_cast(Op.getOperand(1))) - if (ConstantFP *CFP = dyn_cast(CP->get())) + if (ConstantFP *CFP = dyn_cast(CP->getConstVal())) return CFP->isExactlyValue(-0.0) || CFP->isExactlyValue(0.0); } return false; From evan.cheng at apple.com Tue Sep 12 16:02:49 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 12 Sep 2006 16:02:49 -0500 Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelLowering.cpp Message-ID: <200609122102.k8CL2nu1026549@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/PowerPC: PPCISelLowering.cpp updated: 1.205 -> 1.206 --- Log message: Reflects MachineConstantPoolEntry changes. --- Diffs of the changes: (+2 -2) PPCISelLowering.cpp | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.205 llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.206 --- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.205 Sun Aug 27 20:02:49 2006 +++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp Tue Sep 12 16:02:35 2006 @@ -314,7 +314,7 @@ else if (Op.getOpcode() == ISD::EXTLOAD || Op.getOpcode() == ISD::LOAD) { // Maybe this has already been legalized into the constant pool? if (ConstantPoolSDNode *CP = dyn_cast(Op.getOperand(1))) - if (ConstantFP *CFP = dyn_cast(CP->get())) + if (ConstantFP *CFP = dyn_cast(CP->getConstVal())) return CFP->isExactlyValue(-0.0) || CFP->isExactlyValue(0.0); } return false; @@ -601,7 +601,7 @@ static SDOperand LowerConstantPool(SDOperand Op, SelectionDAG &DAG) { MVT::ValueType PtrVT = Op.getValueType(); ConstantPoolSDNode *CP = cast(Op); - Constant *C = CP->get(); + Constant *C = CP->getConstVal(); SDOperand CPI = DAG.getTargetConstantPool(C, PtrVT, CP->getAlignment()); SDOperand Zero = DAG.getConstant(0, PtrVT); From evan.cheng at apple.com Tue Sep 12 16:03:24 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 12 Sep 2006 16:03:24 -0500 Subject: [llvm-commits] CVS: llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp Message-ID: <200609122103.k8CL3OIa026575@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/Sparc: SparcISelDAGToDAG.cpp updated: 1.107 -> 1.108 --- Log message: Reflects MachineConstantPoolEntry changes. --- Diffs of the changes: (+1 -1) SparcISelDAGToDAG.cpp | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp diff -u llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp:1.107 llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp:1.108 --- llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp:1.107 Sat Aug 26 02:59:33 2006 +++ llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp Tue Sep 12 16:03:10 2006 @@ -704,7 +704,7 @@ return DAG.getNode(ISD::ADD, MVT::i32, Lo, Hi); } case ISD::ConstantPool: { - Constant *C = cast(Op)->get(); + Constant *C = cast(Op)->getConstVal(); SDOperand CP = DAG.getTargetConstantPool(C, MVT::i32, cast(Op)->getAlignment()); SDOperand Hi = DAG.getNode(SPISD::Hi, MVT::i32, CP); From evan.cheng at apple.com Tue Sep 12 16:03:53 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 12 Sep 2006 16:03:53 -0500 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp X86ISelLowering.cpp Message-ID: <200609122103.k8CL3rRP026606@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: X86ISelDAGToDAG.cpp updated: 1.105 -> 1.106 X86ISelLowering.cpp updated: 1.254 -> 1.255 --- Log message: Reflects MachineConstantPoolEntry changes. --- Diffs of the changes: (+5 -4) X86ISelDAGToDAG.cpp | 4 ++-- X86ISelLowering.cpp | 5 +++-- 2 files changed, 5 insertions(+), 4 deletions(-) Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp diff -u llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.105 llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.106 --- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.105 Fri Sep 8 01:48:29 2006 +++ llvm/lib/Target/X86/X86ISelDAGToDAG.cpp Tue Sep 12 16:03:39 2006 @@ -540,7 +540,7 @@ if (ConstantPoolSDNode *CP = dyn_cast(N.getOperand(0))) { if (AM.CP == 0) { - AM.CP = CP->get(); + AM.CP = CP->getConstVal(); AM.Align = CP->getAlignment(); AM.Disp += CP->getOffset(); if (isRIP) @@ -872,7 +872,7 @@ G->getOffset() + Offset); } else if (ConstantPoolSDNode *CP = dyn_cast(N0.getOperand(0))) { - C = CurDAG->getTargetConstantPool(CP->get(), PtrVT, + C = CurDAG->getTargetConstantPool(CP->getConstVal(), PtrVT, CP->getAlignment(), CP->getOffset()+Offset); } Index: llvm/lib/Target/X86/X86ISelLowering.cpp diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.254 llvm/lib/Target/X86/X86ISelLowering.cpp:1.255 --- llvm/lib/Target/X86/X86ISelLowering.cpp:1.254 Sun Sep 10 21:19:56 2006 +++ llvm/lib/Target/X86/X86ISelLowering.cpp Tue Sep 12 16:03:39 2006 @@ -3329,8 +3329,9 @@ X86TargetLowering::LowerConstantPool(SDOperand Op, SelectionDAG &DAG) { ConstantPoolSDNode *CP = cast(Op); SDOperand Result = DAG.getNode(X86ISD::Wrapper, getPointerTy(), - DAG.getTargetConstantPool(CP->get(), getPointerTy(), - CP->getAlignment())); + DAG.getTargetConstantPool(CP->getConstVal(), + getPointerTy(), + CP->getAlignment())); if (Subtarget->isTargetDarwin()) { // With PIC, the address is actually $g + Offset. if (!Subtarget->is64Bit() && From evan.cheng at apple.com Tue Sep 12 16:04:20 2006 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 12 Sep 2006 16:04:20 -0500 Subject: [llvm-commits] CVS: llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp Message-ID: <200609122104.k8CL4K0o026627@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/ARM: ARMISelDAGToDAG.cpp updated: 1.43 -> 1.44 --- Log message: Reflects MachineConstantPoolEntry changes. --- Diffs of the changes: (+1 -1) ARMISelDAGToDAG.cpp | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp diff -u llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.43 llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.44 --- llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.43 Mon Sep 11 14:23:32 2006 +++ llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp Tue Sep 12 16:04:05 2006 @@ -294,7 +294,7 @@ static SDOperand LowerConstantPool(SDOperand Op, SelectionDAG &DAG) { MVT::ValueType PtrVT = Op.getValueType(); ConstantPoolSDNode *CP = cast(Op); - Constant *C = CP->get(); + Constant *C = CP->getConstVal(); SDOperand CPI = DAG.getTargetConstantPool(C, PtrVT, CP->getAlignment()); return CPI; From isanbard at gmail.com Tue Sep 12 19:59:36 2006 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 12 Sep 2006 19:59:36 -0500 Subject: [llvm-commits] CVS: llvm-test/External/SPEC/CFP2006/447.dealII/Makefile Message-ID: <200609130059.k8D0xar9030386@zion.cs.uiuc.edu> Changes in directory llvm-test/External/SPEC/CFP2006/447.dealII: Makefile updated: 1.1 -> 1.2 --- Log message: dealII: Needed -D flag specified. povray: Output filename changed. --- Diffs of the changes: (+5 -2) Makefile | 7 +++++-- 1 files changed, 5 insertions(+), 2 deletions(-) Index: llvm-test/External/SPEC/CFP2006/447.dealII/Makefile diff -u llvm-test/External/SPEC/CFP2006/447.dealII/Makefile:1.1 llvm-test/External/SPEC/CFP2006/447.dealII/Makefile:1.2 --- llvm-test/External/SPEC/CFP2006/447.dealII/Makefile:1.1 Fri Sep 1 18:27:13 2006 +++ llvm-test/External/SPEC/CFP2006/447.dealII/Makefile Tue Sep 12 19:59:19 2006 @@ -8,9 +8,12 @@ FP_ABSTOLERANCE = 0.0000001; -include ../../Makefile.spec2006 +CPPFLAGS += \ + -Ddeal_II_dimension=3 \ + -DBOOST_DISABLE_THREADS \ + -I$(SPEC_BENCH_DIR)/src/include -CPPFLAGS += -I$(SPEC_BENCH_DIR)/src/include -DBOOST_DISABLE_THREADS +include ../../Makefile.spec2006 ifeq ($(RUN_TYPE),test) RUN_OPTIONS := 8 From isanbard at gmail.com Tue Sep 12 19:59:36 2006 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 12 Sep 2006 19:59:36 -0500 Subject: [llvm-commits] CVS: llvm-test/External/SPEC/CFP2006/453.povray/Makefile Message-ID: <200609130059.k8D0xaFT030391@zion.cs.uiuc.edu> Changes in directory llvm-test/External/SPEC/CFP2006/453.povray: Makefile updated: 1.2 -> 1.3 --- Log message: dealII: Needed -D flag specified. povray: Output filename changed. --- Diffs of the changes: (+2 -2) Makefile | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm-test/External/SPEC/CFP2006/453.povray/Makefile diff -u llvm-test/External/SPEC/CFP2006/453.povray/Makefile:1.2 llvm-test/External/SPEC/CFP2006/453.povray/Makefile:1.3 --- llvm-test/External/SPEC/CFP2006/453.povray/Makefile:1.2 Wed Sep 6 15:41:12 2006 +++ llvm-test/External/SPEC/CFP2006/453.povray/Makefile Tue Sep 12 19:59:19 2006 @@ -13,12 +13,12 @@ ifeq ($(RUN_TYPE),test) FP_TOLERANCE = 0.0002 RUN_OPTIONS = SPEC-benchmark-test - STDOUT_FILENAME := test.out else FP_TOLERANCE = 0.00005 RUN_OPTIONS = SPEC-benchmark-train - STDOUT_FILENAME := train.out endif +STDOUT_FILENAME := SPEC-benchmark.log + LDFLAGS = -lstdc++ -lm LIBS = -lstdc++ -lm From dpatel at apple.com Tue Sep 12 20:02:40 2006 From: dpatel at apple.com (Devang Patel) Date: Tue, 12 Sep 2006 20:02:40 -0500 Subject: [llvm-commits] CVS: llvm/lib/Transforms/IPO/Internalize.cpp Message-ID: <200609130102.k8D12etm030459@zion.cs.uiuc.edu> Changes in directory llvm/lib/Transforms/IPO: Internalize.cpp updated: 1.35 -> 1.36 --- Log message: Initialize DontInternalize. --- Diffs of the changes: (+2 -1) Internalize.cpp | 3 ++- 1 files changed, 2 insertions(+), 1 deletion(-) Index: llvm/lib/Transforms/IPO/Internalize.cpp diff -u llvm/lib/Transforms/IPO/Internalize.cpp:1.35 llvm/lib/Transforms/IPO/Internalize.cpp:1.36 --- llvm/lib/Transforms/IPO/Internalize.cpp:1.35 Sun Aug 27 17:42:52 2006 +++ llvm/lib/Transforms/IPO/Internalize.cpp Tue Sep 12 20:02:26 2006 @@ -63,7 +63,8 @@ DontInternalize = true; } -InternalizePass::InternalizePass(const std::vector&exportList) { +InternalizePass::InternalizePass(const std::vector&exportList) + : DontInternalize(false){ for(std::vector::const_iterator itr = exportList.begin(); itr != exportList.end(); itr++) { ExternalNames.insert(*itr); From lattner at cs.uiuc.edu Tue Sep 12 22:21:41 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue, 12 Sep 2006 22:21:41 -0500 Subject: [llvm-commits] CVS: llvm/test/Regression/CodeGen/X86/jump_sign.ll Message-ID: <200609130321.k8D3LfDK000648@zion.cs.uiuc.edu> Changes in directory llvm/test/Regression/CodeGen/X86: jump_sign.ll added (r1.1) --- Log message: new testcase --- Diffs of the changes: (+20 -0) jump_sign.ll | 20 ++++++++++++++++++++ 1 files changed, 20 insertions(+) Index: llvm/test/Regression/CodeGen/X86/jump_sign.ll diff -c /dev/null llvm/test/Regression/CodeGen/X86/jump_sign.ll:1.1 *** /dev/null Tue Sep 12 22:21:37 2006 --- llvm/test/Regression/CodeGen/X86/jump_sign.ll Tue Sep 12 22:21:27 2006 *************** *** 0 **** --- 1,20 ---- + ; RUN: llvm-as < %s | llc -march=x86 | grep js + int %f(int %X) { + entry: + %tmp1 = add int %X, 1 ; [#uses=1] + %tmp = setlt int %tmp1, 0 ; [#uses=1] + br bool %tmp, label %cond_true, label %cond_next + + cond_true: ; preds = %entry + %tmp2 = tail call int (...)* %bar( ) ; [#uses=0] + br label %cond_next + + cond_next: ; preds = %entry, %cond_true + %tmp3 = tail call int (...)* %baz( ) ; [#uses=0] + ret int undef + } + + declare int %bar(...) + + declare int %baz(...) + From lattner at cs.uiuc.edu Tue Sep 12 22:22:25 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue, 12 Sep 2006 22:22:25 -0500 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/README.txt X86ISelLowering.cpp Message-ID: <200609130322.k8D3MPCn000688@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: README.txt updated: 1.129 -> 1.130 X86ISelLowering.cpp updated: 1.255 -> 1.256 --- Log message: Compile X > -1 -> text X,X; js dest This implements CodeGen/X86/jump_sign.ll. --- Diffs of the changes: (+23 -28) README.txt | 12 ------------ X86ISelLowering.cpp | 39 +++++++++++++++++++++++---------------- 2 files changed, 23 insertions(+), 28 deletions(-) Index: llvm/lib/Target/X86/README.txt diff -u llvm/lib/Target/X86/README.txt:1.129 llvm/lib/Target/X86/README.txt:1.130 --- llvm/lib/Target/X86/README.txt:1.129 Tue Sep 12 01:36:01 2006 +++ llvm/lib/Target/X86/README.txt Tue Sep 12 22:22:10 2006 @@ -630,15 +630,3 @@ This is a simple DAGCombine to propagate the zext through the and. //===---------------------------------------------------------------------===// - -Instead of: - - cmpl $4294967295, %edx - jg LBB1_8 #cond_false49 - -emit: - - testl %edx, %edx - js LBB1_8 - -This saves a byte of code space. Index: llvm/lib/Target/X86/X86ISelLowering.cpp diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.255 llvm/lib/Target/X86/X86ISelLowering.cpp:1.256 --- llvm/lib/Target/X86/X86ISelLowering.cpp:1.255 Tue Sep 12 16:03:39 2006 +++ llvm/lib/Target/X86/X86ISelLowering.cpp Tue Sep 12 22:22:10 2006 @@ -1866,13 +1866,23 @@ /// translateX86CC - do a one to one translation of a ISD::CondCode to the X86 /// specific condition code. It returns a false if it cannot do a direct -/// translation. X86CC is the translated CondCode. Flip is set to true if the -/// the order of comparison operands should be flipped. +/// translation. X86CC is the translated CondCode. LHS/RHS are modified as +/// needed. static bool translateX86CC(ISD::CondCode SetCCOpcode, bool isFP, - unsigned &X86CC, bool &Flip) { - Flip = false; + unsigned &X86CC, SDOperand &LHS, SDOperand &RHS, + SelectionDAG &DAG) { X86CC = X86ISD::COND_INVALID; if (!isFP) { + if (SetCCOpcode == ISD::SETGT) { + if (ConstantSDNode *RHSC = dyn_cast(RHS)) + if (RHSC->isAllOnesValue()) { + // X > -1 -> X == 0, jump on sign. + RHS = DAG.getConstant(0, RHS.getValueType()); + X86CC = X86ISD::COND_S; + return true; + } + } + switch (SetCCOpcode) { default: break; case ISD::SETEQ: X86CC = X86ISD::COND_E; break; @@ -1893,6 +1903,7 @@ // 0 | 0 | 1 | X < Y // 1 | 0 | 0 | X == Y // 1 | 1 | 1 | unordered + bool Flip = false; switch (SetCCOpcode) { default: break; case ISD::SETUEQ: @@ -1914,16 +1925,13 @@ case ISD::SETUO: X86CC = X86ISD::COND_P; break; case ISD::SETO: X86CC = X86ISD::COND_NP; break; } + if (Flip) + std::swap(LHS, RHS); } return X86CC != X86ISD::COND_INVALID; } -static bool translateX86CC(SDOperand CC, bool isFP, unsigned &X86CC, - bool &Flip) { - return translateX86CC(cast(CC)->get(), isFP, X86CC, Flip); -} - /// hasFPCMov - is there a floating point cmov for the specific X86 condition /// code. Current x86 isa includes the following FP cmov instructions: /// fcmovb, fcomvbe, fcomve, fcmovu, fcmovae, fcmova, fcmovne, fcmovnu. @@ -3620,12 +3628,11 @@ ISD::CondCode SetCCOpcode = cast(CC)->get(); const MVT::ValueType *VTs = DAG.getNodeValueTypes(MVT::Other, MVT::Flag); bool isFP = MVT::isFloatingPoint(Op.getOperand(1).getValueType()); - bool Flip; unsigned X86CC; VTs = DAG.getNodeValueTypes(MVT::i8, MVT::Flag); - if (translateX86CC(CC, isFP, X86CC, Flip)) { - if (Flip) std::swap(Op0, Op1); + if (translateX86CC(cast(CC)->get(), isFP, X86CC, + Op0, Op1, DAG)) { SDOperand Ops1[] = { Chain, Op0, Op1 }; Cond = DAG.getNode(X86ISD::CMP, VTs, 2, Ops1, 3).getValue(1); SDOperand Ops2[] = { DAG.getConstant(X86CC, MVT::i8), Cond }; @@ -4356,13 +4363,13 @@ break; } - bool Flip; unsigned X86CC; - translateX86CC(CC, true, X86CC, Flip); + SDOperand LHS = Op.getOperand(1); + SDOperand RHS = Op.getOperand(2); + translateX86CC(CC, true, X86CC, LHS, RHS, DAG); const MVT::ValueType *VTs = DAG.getNodeValueTypes(MVT::Other, MVT::Flag); - SDOperand Ops1[] = { DAG.getEntryNode(), Op.getOperand(Flip?2:1), - Op.getOperand(Flip?1:2) }; + SDOperand Ops1[] = { DAG.getEntryNode(), LHS, RHS }; SDOperand Cond = DAG.getNode(Opc, VTs, 2, Ops1, 3); VTs = DAG.getNodeValueTypes(MVT::i8, MVT::Flag); SDOperand Ops2[] = { DAG.getConstant(X86CC, MVT::i8), Cond }; From lattner at cs.uiuc.edu Tue Sep 12 22:50:54 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue, 12 Sep 2006 22:50:54 -0500 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Message-ID: <200609130350.k8D3osV2001291@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/SelectionDAG: LegalizeDAG.cpp updated: 1.392 -> 1.393 --- Log message: Compile X << 1 (where X is a long-long) to: addl %ecx, %ecx adcl %eax, %eax instead of: movl %ecx, %edx addl %edx, %edx shrl $31, %ecx addl %eax, %eax orl %ecx, %eax and to: addc r5, r5, r5 adde r4, r4, r4 instead of: slwi r2,r9,1 srwi r0,r11,31 slwi r3,r11,1 or r2,r0,r2 on PPC. --- Diffs of the changes: (+24 -7) LegalizeDAG.cpp | 31 ++++++++++++++++++++++++------- 1 files changed, 24 insertions(+), 7 deletions(-) Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.392 llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.393 --- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.392 Sat Sep 9 01:03:30 2006 +++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Tue Sep 12 22:50:39 2006 @@ -4559,6 +4559,24 @@ } } + // If ADDC/ADDE are supported and if the shift amount is a constant 1, emit + // this X << 1 as X+X. + if (ConstantSDNode *ShAmt = dyn_cast(ShiftAmt)) { + if (ShAmt->getValue() == 1 && TLI.isOperationLegal(ISD::ADDC, NVT) && + TLI.isOperationLegal(ISD::ADDE, NVT)) { + SDOperand LoOps[2], HiOps[3]; + ExpandOp(Node->getOperand(0), LoOps[0], HiOps[0]); + SDVTList VTList = DAG.getVTList(LoOps[0].getValueType(), MVT::Flag); + LoOps[1] = LoOps[0]; + Lo = DAG.getNode(ISD::ADDC, VTList, LoOps, 2); + + HiOps[1] = HiOps[0]; + HiOps[2] = Lo.getValue(1); + Hi = DAG.getNode(ISD::ADDE, VTList, HiOps, 3); + break; + } + } + // If we can emit an efficient shift operation, do so now. if (ExpandShift(ISD::SHL, Node->getOperand(0), ShiftAmt, Lo, Hi)) break; @@ -4657,21 +4675,20 @@ SDOperand LHSL, LHSH, RHSL, RHSH; ExpandOp(Node->getOperand(0), LHSL, LHSH); ExpandOp(Node->getOperand(1), RHSL, RHSH); - const MVT::ValueType *VTs = - DAG.getNodeValueTypes(LHSL.getValueType(),MVT::Flag); - SDOperand LoOps[2], HiOps[2]; + SDVTList VTList = DAG.getVTList(LHSL.getValueType(), MVT::Flag); + SDOperand LoOps[2], HiOps[3]; LoOps[0] = LHSL; LoOps[1] = RHSL; HiOps[0] = LHSH; HiOps[1] = RHSH; if (Node->getOpcode() == ISD::ADD) { - Lo = DAG.getNode(ISD::ADDC, VTs, 2, LoOps, 2); + Lo = DAG.getNode(ISD::ADDC, VTList, LoOps, 2); HiOps[2] = Lo.getValue(1); - Hi = DAG.getNode(ISD::ADDE, VTs, 2, HiOps, 3); + Hi = DAG.getNode(ISD::ADDE, VTList, HiOps, 3); } else { - Lo = DAG.getNode(ISD::SUBC, VTs, 2, LoOps, 2); + Lo = DAG.getNode(ISD::SUBC, VTList, LoOps, 2); HiOps[2] = Lo.getValue(1); - Hi = DAG.getNode(ISD::SUBE, VTs, 2, HiOps, 3); + Hi = DAG.getNode(ISD::SUBE, VTList, HiOps, 3); } break; } From lattner at cs.uiuc.edu Tue Sep 12 22:55:08 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue, 12 Sep 2006 22:55:08 -0500 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/README.txt Message-ID: <200609130355.k8D3t8Y1001390@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: README.txt updated: 1.130 -> 1.131 --- Log message: new note --- Diffs of the changes: (+13 -0) README.txt | 13 +++++++++++++ 1 files changed, 13 insertions(+) Index: llvm/lib/Target/X86/README.txt diff -u llvm/lib/Target/X86/README.txt:1.130 llvm/lib/Target/X86/README.txt:1.131 --- llvm/lib/Target/X86/README.txt:1.130 Tue Sep 12 22:22:10 2006 +++ llvm/lib/Target/X86/README.txt Tue Sep 12 22:54:54 2006 @@ -45,6 +45,19 @@ Another useful one would be ~0ULL >> X and ~0ULL << X. +One better solution for 1LL << x is: + xorl %eax, %eax + xorl %edx, %edx + testb $32, %cl + sete %al + setne %dl + sall %cl, %eax + sall %cl, %edx + +But that requires good 8-bit subreg support. + + + //===---------------------------------------------------------------------===// Compile this: From lattner at cs.uiuc.edu Tue Sep 12 23:20:04 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue, 12 Sep 2006 23:20:04 -0500 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/README.txt Message-ID: <200609130420.k8D4K48R001819@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: README.txt updated: 1.131 -> 1.132 --- Log message: new note --- Diffs of the changes: (+32 -0) README.txt | 32 ++++++++++++++++++++++++++++++++ 1 files changed, 32 insertions(+) Index: llvm/lib/Target/X86/README.txt diff -u llvm/lib/Target/X86/README.txt:1.131 llvm/lib/Target/X86/README.txt:1.132 --- llvm/lib/Target/X86/README.txt:1.131 Tue Sep 12 22:54:54 2006 +++ llvm/lib/Target/X86/README.txt Tue Sep 12 23:19:50 2006 @@ -643,3 +643,35 @@ This is a simple DAGCombine to propagate the zext through the and. //===---------------------------------------------------------------------===// + +GCC's ix86_expand_int_movcc function (in i386.c) has a ton of interesting +simplifications for integer "x cmp y ? a : b". For example, instead of: + +int G; +void f(int X, int Y) { + G = X < 0 ? 14 : 13; +} + +compiling to: + +_f: + movl $14, %eax + movl $13, %ecx + movl 4(%esp), %edx + testl %edx, %edx + cmovl %eax, %ecx + movl %ecx, _G + ret + +it could be: +_f: + movl 4(%esp), %eax + sarl $31, %eax + notl %eax + addl $14, %eax + movl %eax, _G + ret + +etc. + +//===---------------------------------------------------------------------===// From lattner at cs.uiuc.edu Tue Sep 12 23:43:41 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue, 12 Sep 2006 23:43:41 -0500 Subject: [llvm-commits] CVS: llvm/test/Regression/CodeGen/X86/lea-2.ll Message-ID: <200609130443.k8D4hfke002232@zion.cs.uiuc.edu> Changes in directory llvm/test/Regression/CodeGen/X86: lea-2.ll added (r1.1) --- Log message: New testcase --- Diffs of the changes: (+10 -0) lea-2.ll | 10 ++++++++++ 1 files changed, 10 insertions(+) Index: llvm/test/Regression/CodeGen/X86/lea-2.ll diff -c /dev/null llvm/test/Regression/CodeGen/X86/lea-2.ll:1.1 *** /dev/null Tue Sep 12 23:43:36 2006 --- llvm/test/Regression/CodeGen/X86/lea-2.ll Tue Sep 12 23:43:26 2006 *************** *** 0 **** --- 1,10 ---- + ; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | grep 'lea EAX, DWORD PTR \[... + 4\*... - 5\]' && + ; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | not grep add + + int %test1(int %A, int %B) { + %tmp1 = shl int %A, ubyte 2 ; [#uses=1] + %tmp3 = add int %B, -5 ; [#uses=1] + %tmp4 = add int %tmp3, %tmp1 ; [#uses=1] + ret int %tmp4 + } + From lattner at cs.uiuc.edu Tue Sep 12 23:45:39 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Tue, 12 Sep 2006 23:45:39 -0500 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp Message-ID: <200609130445.k8D4jdBU002301@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: X86ISelDAGToDAG.cpp updated: 1.106 -> 1.107 --- Log message: Fix a regression in the 32-bit port from the 64-bit port landing. We now compile CodeGen/X86/lea-2.ll into: _test: movl 4(%esp), %eax movl 8(%esp), %ecx leal -5(%ecx,%eax,4), %eax ret instead of: _test: movl 4(%esp), %eax leal (,%eax,4), %eax addl 8(%esp), %eax addl $4294967291, %eax ret --- Diffs of the changes: (+2 -2) X86ISelDAGToDAG.cpp | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp diff -u llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.106 llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.107 --- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.106 Tue Sep 12 16:03:39 2006 +++ llvm/lib/Target/X86/X86ISelDAGToDAG.cpp Tue Sep 12 23:45:25 2006 @@ -498,7 +498,7 @@ // RIP relative addressing: %rip + 32-bit displacement! if (AM.isRIPRel) { if (!AM.ES && AM.JT != -1 && N.getOpcode() == ISD::Constant) { - uint64_t Val = cast(N)->getValue(); + int64_t Val = cast(N)->getSignExtended(); if (isInt32(AM.Disp + Val)) { AM.Disp += Val; return false; @@ -513,7 +513,7 @@ switch (N.getOpcode()) { default: break; case ISD::Constant: { - uint64_t Val = cast(N)->getValue(); + int64_t Val = cast(N)->getSignExtended(); if (isInt32(AM.Disp + Val)) { AM.Disp += Val; return false; From lattner at cs.uiuc.edu Wed Sep 13 00:59:40 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Wed, 13 Sep 2006 00:59:40 -0500 Subject: [llvm-commits] CVS: llvm/test/Regression/CodeGen/X86/loop-hoist.ll Message-ID: <200609130559.k8D5xeXt003612@zion.cs.uiuc.edu> Changes in directory llvm/test/Regression/CodeGen/X86: loop-hoist.ll added (r1.1) --- Log message: new testcase --- Diffs of the changes: (+25 -0) loop-hoist.ll | 25 +++++++++++++++++++++++++ 1 files changed, 25 insertions(+) Index: llvm/test/Regression/CodeGen/X86/loop-hoist.ll diff -c /dev/null llvm/test/Regression/CodeGen/X86/loop-hoist.ll:1.1 *** /dev/null Wed Sep 13 00:59:35 2006 --- llvm/test/Regression/CodeGen/X86/loop-hoist.ll Wed Sep 13 00:59:25 2006 *************** *** 0 **** --- 1,25 ---- + ; RUN: llvm-as < %s | llc -relocation-model=dynamic-no-pic -mtriple=i686-apple-darwin8.7.2 | grep L_Arr.non_lazy_ptr && + ; RUN: llvm-as < %s | llc -relocation-model=dynamic-no-pic -mtriple=i686-apple-darwin8.7.2 | %prcontext L_Arr.non_lazy_ptr 1 | grep '4(%esp)' + + %Arr = external global [0 x int] ; <[0 x int]*> [#uses=2] + + implementation ; Functions: + + void %foo(int %N) { + entry: + %N = cast int %N to uint ; [#uses=1] + br label %cond_true + + cond_true: ; preds = %cond_true, %entry + %indvar = phi uint [ 0, %entry ], [ %indvar.next, %cond_true ] ; [#uses=3] + %i.0.0 = cast uint %indvar to int ; [#uses=1] + %tmp = getelementptr [0 x int]* %Arr, int 0, uint %indvar ; [#uses=1] + store int %i.0.0, int* %tmp + %indvar.next = add uint %indvar, 1 ; [#uses=2] + %exitcond = seteq uint %indvar.next, %N ; [#uses=1] + br bool %exitcond, label %return, label %cond_true + + return: ; preds = %cond_true, %entry + ret void + } + From lattner at cs.uiuc.edu Wed Sep 13 01:02:56 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Wed, 13 Sep 2006 01:02:56 -0500 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Message-ID: <200609130602.k8D62umc003680@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/SelectionDAG: SelectionDAGISel.cpp updated: 1.275 -> 1.276 --- Log message: If LSR went through a lot of trouble to put constants (e.g. the addr of a global in a specific BB, don't undo this!). This allows us to compile CodeGen/X86/loop-hoist.ll into: _foo: xorl %eax, %eax *** movl L_Arr$non_lazy_ptr, %ecx movl 4(%esp), %edx LBB1_1: #cond_true movl %eax, (%ecx,%eax,4) incl %eax cmpl %edx, %eax jne LBB1_1 #cond_true LBB1_2: #return ret instead of: _foo: xorl %eax, %eax movl 4(%esp), %ecx LBB1_1: #cond_true *** movl L_Arr$non_lazy_ptr, %edx movl %eax, (%edx,%eax,4) incl %eax cmpl %ecx, %eax jne LBB1_1 #cond_true LBB1_2: #return ret This was noticed in 464.h264ref. This doesn't usually affect PPC, but strikes X86 all the time. --- Diffs of the changes: (+9 -0) SelectionDAGISel.cpp | 9 +++++++++ 1 files changed, 9 insertions(+) Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.275 llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.276 --- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.275 Sun Sep 10 01:36:57 2006 +++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Wed Sep 13 01:02:42 2006 @@ -3234,6 +3234,15 @@ if (GetElementPtrInst *GEPI = dyn_cast(I)) { MadeChange |= OptimizeGEPExpression(GEPI, TLI.getTargetData()); } else if (CastInst *CI = dyn_cast(I)) { + // If the source of the cast is a constant, then this should have + // already been constant folded. The only reason NOT to constant fold + // it is if something (e.g. LSR) was careful to place the constant + // evaluation in a block other than then one that uses it (e.g. to hoist + // the address of globals out of a loop). If this is the case, we don't + // want to forward-subst the cast. + if (isa(CI->getOperand(0))) + continue; + // If this is a noop copy, sink it into user blocks to reduce the number // of virtual registers that must be created and coallesced. MVT::ValueType SrcVT = TLI.getValueType(CI->getOperand(0)->getType()); From rafael.espindola at gmail.com Wed Sep 13 07:10:05 2006 From: rafael.espindola at gmail.com (Rafael Espindola) Date: Wed, 13 Sep 2006 07:10:05 -0500 Subject: [llvm-commits] CVS: llvm/lib/Target/ARM/ARM.h ARMAsmPrinter.cpp ARMISelDAGToDAG.cpp ARMInstrInfo.cpp ARMInstrInfo.td ARMRegisterInfo.cpp Message-ID: <200609131210.k8DCA5iC008738@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/ARM: ARM.h updated: 1.4 -> 1.5 ARMAsmPrinter.cpp updated: 1.19 -> 1.20 ARMISelDAGToDAG.cpp updated: 1.44 -> 1.45 ARMInstrInfo.cpp updated: 1.6 -> 1.7 ARMInstrInfo.td updated: 1.27 -> 1.28 ARMRegisterInfo.cpp updated: 1.18 -> 1.19 --- Log message: add shifts to addressing mode 1 --- Diffs of the changes: (+81 -32) ARM.h | 10 ++++++++++ ARMAsmPrinter.cpp | 31 ++++++++++++++++++++++++++++--- ARMISelDAGToDAG.cpp | 30 ++++++++++++++++++++++++++---- ARMInstrInfo.cpp | 9 ++++++--- ARMInstrInfo.td | 21 +++------------------ ARMRegisterInfo.cpp | 12 ++++++++---- 6 files changed, 81 insertions(+), 32 deletions(-) Index: llvm/lib/Target/ARM/ARM.h diff -u llvm/lib/Target/ARM/ARM.h:1.4 llvm/lib/Target/ARM/ARM.h:1.5 --- llvm/lib/Target/ARM/ARM.h:1.4 Sat Sep 2 15:24:25 2006 +++ llvm/lib/Target/ARM/ARM.h Wed Sep 13 07:09:43 2006 @@ -41,6 +41,16 @@ }; } + namespace ARMShift { + enum ShiftTypes { + LSL, + LSR, + ASR, + ROR, + RRX + }; + } + static const char *ARMCondCodeToString(ARMCC::CondCodes CC) { switch (CC) { default: assert(0 && "Unknown condition code"); Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.19 llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.20 --- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.19 Mon Sep 11 12:25:40 2006 +++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Wed Sep 13 07:09:43 2006 @@ -158,13 +158,38 @@ } void ARMAsmPrinter::printAddrMode1(const MachineInstr *MI, int opNum) { - const MachineOperand &MO1 = MI->getOperand(opNum); + const MachineOperand &Arg = MI->getOperand(opNum); + const MachineOperand &Shift = MI->getOperand(opNum + 1); + const MachineOperand &ShiftType = MI->getOperand(opNum + 2); - if(MO1.isImmediate()) { + if(Arg.isImmediate()) { + assert(Shift.getImmedValue() == 0); printOperand(MI, opNum); } else { - assert(MO1.isRegister()); + assert(Arg.isRegister()); printOperand(MI, opNum); + if(Shift.isRegister() || Shift.getImmedValue() != 0) { + const char *s = NULL; + switch(ShiftType.getImmedValue()) { + case ARMShift::LSL: + s = ", lsl "; + break; + case ARMShift::LSR: + s = ", lsr "; + break; + case ARMShift::ASR: + s = ", asr "; + break; + case ARMShift::ROR: + s = ", ror "; + break; + case ARMShift::RRX: + s = ", rrx "; + break; + } + O << s; + printOperand(MI, opNum + 1); + } } } Index: llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp diff -u llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.44 llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.45 --- llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.44 Tue Sep 12 16:04:05 2006 +++ llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp Wed Sep 13 07:09:43 2006 @@ -445,7 +445,8 @@ SDNode *Select(SDOperand Op); virtual void InstructionSelectBasicBlock(SelectionDAG &DAG); bool SelectAddrRegImm(SDOperand N, SDOperand &Offset, SDOperand &Base); - bool SelectAddrMode1(SDOperand N, SDOperand &Arg); + bool SelectAddrMode1(SDOperand N, SDOperand &Arg, SDOperand &Shift, + SDOperand &ShiftType); // Include the pieces autogenerated from the target description. #include "ARMGenDAGISel.inc" @@ -480,17 +481,38 @@ } bool ARMDAGToDAGISel::SelectAddrMode1(SDOperand N, - SDOperand &Arg) { + SDOperand &Arg, + SDOperand &Shift, + SDOperand &ShiftType) { switch(N.getOpcode()) { case ISD::Constant: { //TODO:check that we have a valid constant int32_t t = cast(N)->getValue(); - Arg = CurDAG->getTargetConstant(t, MVT::i32); + Arg = CurDAG->getTargetConstant(t, MVT::i32); + Shift = CurDAG->getTargetConstant(0, MVT::i32); + ShiftType = CurDAG->getTargetConstant(ARMShift::LSL, MVT::i32); return true; } + case ISD::SRA: + Arg = N.getOperand(0); + Shift = N.getOperand(1); + ShiftType = CurDAG->getTargetConstant(ARMShift::ASR, MVT::i32); + return true; + case ISD::SRL: + Arg = N.getOperand(0); + Shift = N.getOperand(1); + ShiftType = CurDAG->getTargetConstant(ARMShift::LSR, MVT::i32); + return true; + case ISD::SHL: + Arg = N.getOperand(0); + Shift = N.getOperand(1); + ShiftType = CurDAG->getTargetConstant(ARMShift::LSL, MVT::i32); + return true; } - Arg = N; + Arg = N; + Shift = CurDAG->getTargetConstant(0, MVT::i32); + ShiftType = CurDAG->getTargetConstant(ARMShift::LSL, MVT::i32); return true; } Index: llvm/lib/Target/ARM/ARMInstrInfo.cpp diff -u llvm/lib/Target/ARM/ARMInstrInfo.cpp:1.6 llvm/lib/Target/ARM/ARMInstrInfo.cpp:1.7 --- llvm/lib/Target/ARM/ARMInstrInfo.cpp:1.6 Mon Sep 11 12:25:40 2006 +++ llvm/lib/Target/ARM/ARMInstrInfo.cpp Wed Sep 13 07:09:43 2006 @@ -33,15 +33,18 @@ unsigned &SrcReg, unsigned &DstReg) const { MachineOpCode oc = MI.getOpcode(); switch (oc) { - case ARM::MOV: - assert(MI.getNumOperands() == 2 && + case ARM::MOV: { + assert(MI.getNumOperands() == 4 && MI.getOperand(0).isRegister() && "Invalid ARM MOV instruction"); - if (MI.getOperand(1).isRegister()) { + const MachineOperand &Arg = MI.getOperand(1); + const MachineOperand &Shift = MI.getOperand(2); + if (Arg.isRegister() && Shift.isImmediate() && Shift.getImmedValue() == 0) { SrcReg = MI.getOperand(1).getReg(); DstReg = MI.getOperand(0).getReg(); return true; } } + } return false; } Index: llvm/lib/Target/ARM/ARMInstrInfo.td diff -u llvm/lib/Target/ARM/ARMInstrInfo.td:1.27 llvm/lib/Target/ARM/ARMInstrInfo.td:1.28 --- llvm/lib/Target/ARM/ARMInstrInfo.td:1.27 Mon Sep 11 14:24:19 2006 +++ llvm/lib/Target/ARM/ARMInstrInfo.td Wed Sep 13 07:09:43 2006 @@ -15,8 +15,8 @@ // Address operands def op_addr_mode1 : Operand { let PrintMethod = "printAddrMode1"; - let NumMIOperands = 1; - let MIOperandInfo = (ops ptr_rc); + let NumMIOperands = 3; + let MIOperandInfo = (ops ptr_rc, ptr_rc, i32imm); } def memri : Operand { @@ -27,7 +27,7 @@ // Define ARM specific addressing mode. //Addressing Mode 1: data processing operands -def addr_mode1 : ComplexPattern; +def addr_mode1 : ComplexPattern; //register plus/minus 12 bit offset def iaddr : ComplexPattern; @@ -119,21 +119,6 @@ "and $dst, $a, $b", [(set IntRegs:$dst, (and IntRegs:$a, addr_mode1:$b))]>; -// All arm data processing instructions have a shift. Maybe we don't have -// to implement this -def SHL : InstARM<(ops IntRegs:$dst, IntRegs:$a, IntRegs:$b), - "mov $dst, $a, lsl $b", - [(set IntRegs:$dst, (shl IntRegs:$a, IntRegs:$b))]>; - -def SRA : InstARM<(ops IntRegs:$dst, IntRegs:$a, IntRegs:$b), - "mov $dst, $a, asr $b", - [(set IntRegs:$dst, (sra IntRegs:$a, IntRegs:$b))]>; - -def SRL : InstARM<(ops IntRegs:$dst, IntRegs:$a, IntRegs:$b), - "mov $dst, $a, lsr $b", - [(set IntRegs:$dst, (srl IntRegs:$a, IntRegs:$b))]>; - - def EOR : InstARM<(ops IntRegs:$dst, IntRegs:$a, op_addr_mode1:$b), "eor $dst, $a, $b", [(set IntRegs:$dst, (xor IntRegs:$a, addr_mode1:$b))]>; Index: llvm/lib/Target/ARM/ARMRegisterInfo.cpp diff -u llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.18 llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.19 --- llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.18 Mon Sep 11 12:25:40 2006 +++ llvm/lib/Target/ARM/ARMRegisterInfo.cpp Wed Sep 13 07:09:43 2006 @@ -48,7 +48,8 @@ unsigned DestReg, unsigned SrcReg, const TargetRegisterClass *RC) const { assert (RC == ARM::IntRegsRegisterClass); - BuildMI(MBB, I, ARM::MOV, 1, DestReg).addReg(SrcReg); + BuildMI(MBB, I, ARM::MOV, 3, DestReg).addReg(SrcReg).addImm(0) + .addImm(ARMShift::LSL); } MachineInstr *ARMRegisterInfo::foldMemoryOperand(MachineInstr* MI, @@ -114,7 +115,8 @@ // Insert a set of r12 with the full address // r12 = r13 + offset MachineBasicBlock *MBB2 = MI.getParent(); - BuildMI(*MBB2, II, ARM::ADD, 2, ARM::R12).addReg(ARM::R13).addImm(Offset); + BuildMI(*MBB2, II, ARM::ADD, 4, ARM::R12).addReg(ARM::R13).addImm(Offset) + .addImm(0).addImm(ARMShift::LSL); // Replace the FrameIndex with r12 MI.getOperand(FrameIdx).ChangeToRegister(ARM::R12, false); @@ -140,7 +142,8 @@ MFI->setStackSize(NumBytes); //sub sp, sp, #NumBytes - BuildMI(MBB, MBBI, ARM::SUB, 2, ARM::R13).addReg(ARM::R13).addImm(NumBytes); + BuildMI(MBB, MBBI, ARM::SUB, 4, ARM::R13).addReg(ARM::R13).addImm(NumBytes) + .addImm(0).addImm(ARMShift::LSL); } void ARMRegisterInfo::emitEpilogue(MachineFunction &MF, @@ -153,7 +156,8 @@ int NumBytes = (int) MFI->getStackSize(); //add sp, sp, #NumBytes - BuildMI(MBB, MBBI, ARM::ADD, 2, ARM::R13).addReg(ARM::R13).addImm(NumBytes); + BuildMI(MBB, MBBI, ARM::ADD, 4, ARM::R13).addReg(ARM::R13).addImm(NumBytes) + .addImm(0).addImm(ARMShift::LSL); } unsigned ARMRegisterInfo::getRARegister() const { From lattner at cs.uiuc.edu Wed Sep 13 11:21:29 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Wed, 13 Sep 2006 11:21:29 -0500 Subject: [llvm-commits] CVS: llvm/lib/ExecutionEngine/JIT/JITEmitter.cpp Message-ID: <200609131621.k8DGLTGT031896@zion.cs.uiuc.edu> Changes in directory llvm/lib/ExecutionEngine/JIT: JITEmitter.cpp updated: 1.113 -> 1.114 --- Log message: Fix a ton of jit failures --- Diffs of the changes: (+1 -1) JITEmitter.cpp | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/ExecutionEngine/JIT/JITEmitter.cpp diff -u llvm/lib/ExecutionEngine/JIT/JITEmitter.cpp:1.113 llvm/lib/ExecutionEngine/JIT/JITEmitter.cpp:1.114 --- llvm/lib/ExecutionEngine/JIT/JITEmitter.cpp:1.113 Tue Sep 12 15:59:59 2006 +++ llvm/lib/ExecutionEngine/JIT/JITEmitter.cpp Wed Sep 13 11:21:10 2006 @@ -864,7 +864,7 @@ MachineConstantPoolEntry CPE = Constants.back(); unsigned Size = CPE.Offset; const Type *Ty = CPE.isMachineConstantPoolEntry() - ? CPE.Val.ConstVal->getType() : CPE.Val.MachineCPVal->getType(); + ? CPE.Val.MachineCPVal->getType() : CPE.Val.ConstVal->getType(); Size += TheJIT->getTargetData()->getTypeSize(Ty); ConstantPoolBase = allocateSpace(Size, 1 << MCP->getConstantPoolAlignment()); From lattner at cs.uiuc.edu Wed Sep 13 11:56:27 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Wed, 13 Sep 2006 11:56:27 -0500 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp Message-ID: <200609131656.k8DGuRdT032523@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: X86ISelLowering.cpp updated: 1.256 -> 1.257 --- Log message: The sense of this branch was inverted :( --- Diffs of the changes: (+1 -1) X86ISelLowering.cpp | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/Target/X86/X86ISelLowering.cpp diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.256 llvm/lib/Target/X86/X86ISelLowering.cpp:1.257 --- llvm/lib/Target/X86/X86ISelLowering.cpp:1.256 Tue Sep 12 22:22:10 2006 +++ llvm/lib/Target/X86/X86ISelLowering.cpp Wed Sep 13 11:56:12 2006 @@ -1878,7 +1878,7 @@ if (RHSC->isAllOnesValue()) { // X > -1 -> X == 0, jump on sign. RHS = DAG.getConstant(0, RHS.getValueType()); - X86CC = X86ISD::COND_S; + X86CC = X86ISD::COND_NS; return true; } } From lattner at cs.uiuc.edu Wed Sep 13 12:05:08 2006 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Wed, 13 Sep 2006 12:05:08 -0500 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp Message-ID: <200609131705.k8DH58la032706@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: X86ISelLowering.cpp updated: 1.257 -> 1.258 --- Log message: Turn X < 0 -> TEST X,X js --- Diffs of the changes: (+11 -8) X86ISelLowering.cpp | 19 +++++++++++-------- 1 files changed, 11 insertions(+), 8 deletions(-) Index: llvm/lib/Target/X86/X86ISelLowering.cpp diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.257 llvm/lib/Target/X86/X86ISelLowering.cpp:1.258 --- llvm/lib/Target/X86/X86ISelLowering.cpp:1.257 Wed Sep 13 11:56:12 2006 +++ llvm/lib/Target/X86/X86ISelLowering.cpp Wed Sep 13 12:04:54 2006 @@ -1873,14 +1873,17 @@ SelectionDAG &DAG) { X86CC = X86ISD::COND_INVALID; if (!isFP) { - if (SetCCOpcode == ISD::SETGT) { - if (ConstantSDNode *RHSC = dyn_cast(RHS)) - if (RHSC->isAllOnesValue()) { - // X > -1 -> X == 0, jump on sign. - RHS = DAG.getConstant(0, RHS.getValueType()); - X86CC = X86ISD::COND_NS; - return true; - } + if (ConstantSDNode *RHSC = dyn_cast(RHS)) { + if (SetCCOpcode == ISD::SETGT && RHSC->isAllOnesValue()) { + // X > -1 -> X == 0, jump !sign. + RHS = DAG.getConstant(0, RHS.getValueType()); + X86CC = X86ISD::COND_NS; + return true; + } else if (SetCCOpcode == ISD::SETLT && RHSC->isNullValue()) { + // X < 0 -> X == 0, jump on sign. + X86CC = X86ISD::COND_S; + return true; + } } switch (SetCCOpcode) { From jlaskey at apple.com Wed Sep 13 12:24:49 2006 From: jlaskey at apple.com (Jim Laskey) Date: Wed, 13 Sep 2006 12:24:49 -0500 Subject: [llvm-commits] CVS: nightlytest-serverside/individualgraph.php Message-ID: <200609131724.k8DHOnWY000608@zion.cs.uiuc.edu> Changes in directory nightlytest-serverside: individualgraph.php updated: 1.3 -> 1.4 --- Log message: fix typo --- Diffs of the changes: (+1 -1) individualgraph.php | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: nightlytest-serverside/individualgraph.php diff -u nightlytest-serverside/individualgraph.php:1.3 nightlytest-serverside/individualgraph.php:1.4 --- nightlytest-serverside/individualgraph.php:1.3 Fri Sep 8 17:47:25 2006 +++ nightlytest-serverside/individualgraph.php Wed Sep 13 12:24:35 2006 @@ -182,7 +182,7 @@ -LLVM Nightly Test Results Custum Graphs For <?php print $measure; ?> +LLVM Nightly Test Results Custom Graphs For <?php print $measure; ?>