From sabre at nondot.org Mon Mar 5 01:53:14 2007 From: sabre at nondot.org (Chris Lattner) Date: Mon, 5 Mar 2007 01:53:14 -0600 Subject: [llvm-commits] CVS: llvm/lib/Transforms/Scalar/ScalarReplAggregates.cpp Message-ID: <200703050753.l257rEb4006841@zion.cs.uiuc.edu> Changes in directory llvm/lib/Transforms/Scalar: ScalarReplAggregates.cpp updated: 1.75 -> 1.76 --- Log message: This is the first major step of implementing PR1226: http://llvm.org/PR1226 . We now successfully scalarrepl things down to elements, but mem2reg can't promote elements that are memset/memcpy'd. Until then, the code is disabled "0 &&". --- Diffs of the changes: (+156 -5) ScalarReplAggregates.cpp | 161 +++++++++++++++++++++++++++++++++++++++++++++-- 1 files changed, 156 insertions(+), 5 deletions(-) Index: llvm/lib/Transforms/Scalar/ScalarReplAggregates.cpp diff -u llvm/lib/Transforms/Scalar/ScalarReplAggregates.cpp:1.75 llvm/lib/Transforms/Scalar/ScalarReplAggregates.cpp:1.76 --- llvm/lib/Transforms/Scalar/ScalarReplAggregates.cpp:1.75 Wed Feb 14 21:39:18 2007 +++ llvm/lib/Transforms/Scalar/ScalarReplAggregates.cpp Mon Mar 5 01:52:57 2007 @@ -24,8 +24,9 @@ #include "llvm/Constants.h" #include "llvm/DerivedTypes.h" #include "llvm/Function.h" -#include "llvm/Pass.h" #include "llvm/Instructions.h" +#include "llvm/IntrinsicInst.h" +#include "llvm/Pass.h" #include "llvm/Analysis/Dominators.h" #include "llvm/Target/TargetData.h" #include "llvm/Transforms/Utils/PromoteMemToReg.h" @@ -60,11 +61,15 @@ private: int isSafeElementUse(Value *Ptr); - int isSafeUseOfAllocation(Instruction *User); + int isSafeUseOfAllocation(Instruction *User, AllocationInst *AI); + bool isSafeUseOfBitCastedAllocation(BitCastInst *User, AllocationInst *AI); int isSafeAllocaToScalarRepl(AllocationInst *AI); void CanonicalizeAllocaUsers(AllocationInst *AI); AllocaInst *AddNewAlloca(Function &F, const Type *Ty, AllocationInst *Base); + void RewriteBitCastUserOfAlloca(BitCastInst *BCInst, AllocationInst *AI, + SmallVector &NewElts); + const Type *CanConvertToScalar(Value *V, bool &IsNotTrivial); void ConvertToScalar(AllocationInst *AI, const Type *Ty); void ConvertUsesToScalar(Value *Ptr, AllocaInst *NewAI, unsigned Offset); @@ -180,7 +185,7 @@ DOUT << "Found inst to xform: " << *AI; Changed = true; - std::vector ElementAllocas; + SmallVector ElementAllocas; if (const StructType *ST = dyn_cast(AI->getAllocatedType())) { ElementAllocas.reserve(ST->getNumContainedTypes()); for (unsigned i = 0, e = ST->getNumContainedTypes(); i != e; ++i) { @@ -207,6 +212,11 @@ // while (!AI->use_empty()) { Instruction *User = cast(AI->use_back()); + if (BitCastInst *BCInst = dyn_cast(User)) { + RewriteBitCastUserOfAlloca(BCInst, AI, ElementAllocas); + continue; + } + GetElementPtrInst *GEPI = cast(User); // We now know that the GEP is of the form: GEP , 0, unsigned Idx = @@ -291,7 +301,9 @@ /// isSafeUseOfAllocation - Check to see if this user is an allowed use for an /// aggregate allocation. /// -int SROA::isSafeUseOfAllocation(Instruction *User) { +int SROA::isSafeUseOfAllocation(Instruction *User, AllocationInst *AI) { + if (BitCastInst *C = dyn_cast(User)) + return 0 && (isSafeUseOfBitCastedAllocation(C, AI) ? 3 : 0); if (!isa(User)) return 0; GetElementPtrInst *GEPI = cast(User); @@ -352,6 +364,145 @@ return isSafeElementUse(GEPI); } +/// isSafeUseOfBitCastedAllocation - Return true if all users of this bitcast +/// are +bool SROA::isSafeUseOfBitCastedAllocation(BitCastInst *BC, AllocationInst *AI) { + for (Value::use_iterator UI = BC->use_begin(), E = BC->use_end(); + UI != E; ++UI) { + if (BitCastInst *BCU = dyn_cast(UI)) { + if (!isSafeUseOfBitCastedAllocation(BCU, AI)) + return false; + } else if (MemIntrinsic *MI = dyn_cast(UI)) { + // If not constant length, give up. + ConstantInt *Length = dyn_cast(MI->getLength()); + if (!Length) return false; + + // If not the whole aggregate, give up. + const TargetData &TD = getAnalysis(); + if (Length->getZExtValue() != + TD.getTypeSize(AI->getType()->getElementType())) + return false; + + // We only know about memcpy/memset/memmove. + if (!isa(MI) && !isa(MI) && + !isa(MI)) + return false; + // Otherwise, we can transform it. + } else { + return false; + } + } + return true; +} + +/// RewriteBitCastUserOfAlloca - BCInst (transitively) casts AI. Transform +/// users of the cast to use the new values instead. +void SROA::RewriteBitCastUserOfAlloca(BitCastInst *BCInst, AllocationInst *AI, + SmallVector &NewElts) { + Constant *Zero = Constant::getNullValue(Type::Int32Ty); + const TargetData &TD = getAnalysis(); + while (!BCInst->use_empty()) { + if (BitCastInst *BCU = dyn_cast(BCInst->use_back())) { + RewriteBitCastUserOfAlloca(BCU, AI, NewElts); + continue; + } + + // Otherwise, must be memcpy/memmove/memset of the entire aggregate. Split + // into one per element. + MemIntrinsic *MI = cast(BCInst->use_back()); + + // If this is a memcpy/memmove, construct the other pointer as the + // appropriate type. + Value *OtherPtr = 0; + if (MemCpyInst *MCI = dyn_cast(MI)) { + if (BCInst == MCI->getRawDest()) + OtherPtr = MCI->getRawSource(); + else { + assert(BCInst == MCI->getRawSource()); + OtherPtr = MCI->getRawDest(); + } + } else if (MemMoveInst *MMI = dyn_cast(MI)) { + if (BCInst == MMI->getRawDest()) + OtherPtr = MMI->getRawSource(); + else { + assert(BCInst == MMI->getRawSource()); + OtherPtr = MMI->getRawDest(); + } + } + + // If there is an other pointer, we want to convert it to the same pointer + // type as AI has, so we can GEP through it. + if (OtherPtr) { + // It is likely that OtherPtr is a bitcast, if so, remove it. + if (BitCastInst *BC = dyn_cast(OtherPtr)) + OtherPtr = BC->getOperand(0); + if (ConstantExpr *BCE = dyn_cast(OtherPtr)) + if (BCE->getOpcode() == Instruction::BitCast) + OtherPtr = BCE->getOperand(0); + + // If the pointer is not the right type, insert a bitcast to the right + // type. + if (OtherPtr->getType() != AI->getType()) + OtherPtr = new BitCastInst(OtherPtr, AI->getType(), OtherPtr->getName(), + MI); + } + + // Process each element of the aggregate. + Value *TheFn = MI->getOperand(0); + const Type *BytePtrTy = MI->getRawDest()->getType(); + bool SROADest = MI->getRawDest() == BCInst; + + for (unsigned i = 0, e = NewElts.size(); i != e; ++i) { + // If this is a memcpy/memmove, emit a GEP of the other element address. + Value *OtherElt = 0; + if (OtherPtr) { + OtherElt = new GetElementPtrInst(OtherPtr, Zero, + ConstantInt::get(Type::Int32Ty, i), + OtherPtr->getNameStr()+"."+utostr(i), + MI); + if (OtherElt->getType() != BytePtrTy) + OtherElt = new BitCastInst(OtherElt, BytePtrTy,OtherElt->getNameStr(), + MI); + } + + Value *EltPtr = NewElts[i]; + unsigned EltSize = + TD.getTypeSize(cast(EltPtr->getType())->getElementType()); + + // Cast the element pointer to BytePtrTy. + if (EltPtr->getType() != BytePtrTy) + EltPtr = new BitCastInst(EltPtr, BytePtrTy, EltPtr->getNameStr(), MI); + + + // Finally, insert the meminst for this element. + if (isa(MI) || isa(MI)) { + Value *Ops[] = { + SROADest ? EltPtr : OtherElt, // Dest ptr + SROADest ? OtherElt : EltPtr, // Src ptr + ConstantInt::get(MI->getOperand(3)->getType(), EltSize), // Size + Zero // Align + }; + new CallInst(TheFn, Ops, 4, "", MI); + } else if (isa(MI)) { + Value *Ops[] = { + EltPtr, MI->getOperand(2), // Dest, Value, + ConstantInt::get(MI->getOperand(3)->getType(), EltSize), // Size + Zero // Align + }; + new CallInst(TheFn, Ops, 4, "", MI); + } + } + + // Finally, MI is now dead, as we've modified its actions to occur on all of + // the elements of the aggregate. + MI->eraseFromParent(); + } + + // The cast is dead, remove it. + BCInst->eraseFromParent(); +} + + /// isSafeStructAllocaToScalarRepl - Check to see if the specified allocation of /// an aggregate can be broken down into elements. Return 0 if not, 3 if safe, /// or 1 if safe after canonicalization has been performed. @@ -363,7 +514,7 @@ int isSafe = 3; for (Value::use_iterator I = AI->use_begin(), E = AI->use_end(); I != E; ++I) { - isSafe &= isSafeUseOfAllocation(cast(*I)); + isSafe &= isSafeUseOfAllocation(cast(*I), AI); if (isSafe == 0) { DOUT << "Cannot transform: " << *AI << " due to user: " << **I; return 0; From llvm at cs.uiuc.edu Mon Mar 5 02:18:28 2007 From: llvm at cs.uiuc.edu (LLVM) Date: Mon, 5 Mar 2007 02:18:28 -0600 Subject: [llvm-commits] CVS: llvm/test/AdaFrontend/ Message-ID: <200703050818.l258IS5I014935@zion.cs.uiuc.edu> Changes in directory llvm/test/AdaFrontend: --- Log message: Directory /var/cvs/llvm/llvm/test/AdaFrontend added to the repository --- Diffs of the changes: (+0 -0) 0 files changed From baldrick at free.fr Mon Mar 5 02:21:05 2007 From: baldrick at free.fr (Duncan Sands) Date: Mon, 5 Mar 2007 02:21:05 -0600 Subject: [llvm-commits] CVS: llvm/test/AdaFrontend/non_lvalue.adb non_lvalue.ads Message-ID: <200703050821.l258L5T9016325@zion.cs.uiuc.edu> Changes in directory llvm/test/AdaFrontend: non_lvalue.adb added (r1.1) non_lvalue.ads added (r1.1) --- Log message: New directory for Ada testcases. Test handling of NON_LVALUE_EXPR. --- Diffs of the changes: (+18 -0) non_lvalue.adb | 7 +++++++ non_lvalue.ads | 11 +++++++++++ 2 files changed, 18 insertions(+) Index: llvm/test/AdaFrontend/non_lvalue.adb diff -c /dev/null llvm/test/AdaFrontend/non_lvalue.adb:1.1 *** /dev/null Mon Mar 5 02:20:58 2007 --- llvm/test/AdaFrontend/non_lvalue.adb Mon Mar 5 02:20:48 2007 *************** *** 0 **** --- 1,7 ---- + -- RUN: %llvmgcc -c %s -o /dev/null + package body Non_LValue is + function A (Y : U) return String is + begin + return Y.X.B; + end; + end; Index: llvm/test/AdaFrontend/non_lvalue.ads diff -c /dev/null llvm/test/AdaFrontend/non_lvalue.ads:1.1 *** /dev/null Mon Mar 5 02:21:05 2007 --- llvm/test/AdaFrontend/non_lvalue.ads Mon Mar 5 02:20:48 2007 *************** *** 0 **** --- 1,11 ---- + package Non_LValue is + type T (Length : Natural) is record + A : String (1 .. Length); + B : String (1 .. Length); + end record; + type T_Ptr is access all T; + type U is record + X : T_Ptr; + end record; + function A (Y : U) return String; + end; From baldrick at free.fr Mon Mar 5 02:34:52 2007 From: baldrick at free.fr (Duncan Sands) Date: Mon, 5 Mar 2007 02:34:52 -0600 Subject: [llvm-commits] CVS: llvm/test/AdaFrontend/fat_fields.adb fat_fields.ads Message-ID: <200703050834.l258YqID016585@zion.cs.uiuc.edu> Changes in directory llvm/test/AdaFrontend: fat_fields.adb added (r1.1) fat_fields.ads added (r1.1) --- Log message: Testcase causing the Ada front-end to create bogus constructor fields. --- Diffs of the changes: (+16 -0) fat_fields.adb | 10 ++++++++++ fat_fields.ads | 6 ++++++ 2 files changed, 16 insertions(+) Index: llvm/test/AdaFrontend/fat_fields.adb diff -c /dev/null llvm/test/AdaFrontend/fat_fields.adb:1.1 *** /dev/null Mon Mar 5 02:34:45 2007 --- llvm/test/AdaFrontend/fat_fields.adb Mon Mar 5 02:34:35 2007 *************** *** 0 **** --- 1,10 ---- + -- RUN: %llvmgcc -c %s -o /dev/null + -- RUN: %llvmgcc -c %s -O2 -o /dev/null + package body Fat_Fields is + procedure Proc is + begin + if P = null then + null; + end if; + end; + end; Index: llvm/test/AdaFrontend/fat_fields.ads diff -c /dev/null llvm/test/AdaFrontend/fat_fields.ads:1.1 *** /dev/null Mon Mar 5 02:34:52 2007 --- llvm/test/AdaFrontend/fat_fields.ads Mon Mar 5 02:34:35 2007 *************** *** 0 **** --- 1,6 ---- + package Fat_Fields is + pragma Elaborate_Body; + type A is array (Positive range <>) of Boolean; + type A_Ptr is access A; + P : A_Ptr := null; + end; From baldrick at free.fr Mon Mar 5 02:40:15 2007 From: baldrick at free.fr (Duncan Sands) Date: Mon, 5 Mar 2007 02:40:15 -0600 Subject: [llvm-commits] CVS: llvm/test/AdaFrontend/emit_var.ads Message-ID: <200703050840.l258eFm7016717@zion.cs.uiuc.edu> Changes in directory llvm/test/AdaFrontend: emit_var.ads added (r1.1) --- Log message: Testcase for handling of static constant declarations in EmitBIND_EXPR. --- Diffs of the changes: (+5 -0) emit_var.ads | 5 +++++ 1 files changed, 5 insertions(+) Index: llvm/test/AdaFrontend/emit_var.ads diff -c /dev/null llvm/test/AdaFrontend/emit_var.ads:1.1 *** /dev/null Mon Mar 5 02:40:08 2007 --- llvm/test/AdaFrontend/emit_var.ads Mon Mar 5 02:39:58 2007 *************** *** 0 **** --- 1,5 ---- + -- RUN: %llvmgcc -c %s -o /dev/null + with Ada.Finalization; + package Emit_Var is + type Search_Type is new Ada.Finalization.Controlled with null record; + end; From nicolas.geoffray at lip6.fr Mon Mar 5 02:58:53 2007 From: nicolas.geoffray at lip6.fr (Nicolas Geoffray) Date: Mon, 05 Mar 2007 09:58:53 +0100 Subject: [llvm-commits] llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp In-Reply-To: References: <45E46A95.5000500@lip6.fr> <061382E6-AE05-4A71-899F-098B91E14DA3@apple.com> <45E7F5A0.2000604@lip6.fr> <45E98679.2000908@lip6.fr> Message-ID: <45EBDBCD.7070509@lip6.fr> Chris Lattner wrote: > > Ok, so it's not related to NoFramePointerElim? If that's the case, > you should just have Macho and ELF return different sets of callee > saved regs. > No, that's not the issue. Let me rephrase why I need this patch :) In PowerPC, whether it's on ELF ABI or MachO, R31 is a normal, callee-saved register. With one exception: when it is used as a frame pointer. When it is used as a frame pointer, both MachO and ELF remove R31 from the callee-saved registers set. There are two different ways to use R31 as a frame pointer: 1) with an alloca when the stack is growing in a non-compilation deterministic size, or 2) when NoFramePointerElim is set. 1) When there is an alloca that modifies the size of the stack, compilation goes through the LowerDYNAMIC_STACKALLOC method. In this method, you find the code: // Find out what the fix offset of the frame pointer save area. int FPOffset = PPCFrameInfo::getFramePointerSaveOffset(IsPPC64, isMachoABI); // Allocate the frame index for frame pointer save area. FPSI = MF.getFrameInfo()->CreateFixedObject(IsPPC64? 8 : 4, FPOffset); // Save the result. FI->setFramePointerSaveIndex(FPSI); With this code you give the info to the FrameInfo object that the frame pointer offset is at FPOffset. Therefore, this offset will never be used as an offset for another purpose. And this is _really_ important for ELF, because the frame pointer, R31, is saved in the callee-saved area. With this code, you are sure that no callee-saved register will be spilled to R31's offset. 2) When NoFramePointerElim is set, R31 is always used as a frame pointer. However, the stack size may be decided at a compilation time, therefore the compilation process never goes through the LowerDYNAMIC_STACKALLOC. And LowerDYNAMIC_STACKALLOC is the only method that saves the frame pointer offset in the frame info. The bug arrives here: the frame info object never had the info that R31 is saved in the callee-saved area. Therefore, it may allocate the frame pointer offset for spilling an other register. This was not an issue for the MachO ABI because the frame pointer offset in MachO is not in the callee-saved area. With this patch I give the info to the FrameInfo object, before the callee-saved scan, that R31 is saved in the callee-saved area. Thus I am sure that no register will be spilled in R31's offset. I hope it's clearer now (maybe it already was, but I was getting confused by your replies :)) Best, Nicolas From baldrick at free.fr Mon Mar 5 03:21:28 2007 From: baldrick at free.fr (Duncan Sands) Date: Mon, 5 Mar 2007 03:21:28 -0600 Subject: [llvm-commits] CVS: llvm/CREDITS.TXT Message-ID: <200703050921.l259LS3B017799@zion.cs.uiuc.edu> Changes in directory llvm: CREDITS.TXT updated: 1.70 -> 1.71 --- Log message: Credit self for Ada front-end. --- Diffs of the changes: (+4 -0) CREDITS.TXT | 4 ++++ 1 files changed, 4 insertions(+) Index: llvm/CREDITS.TXT diff -u llvm/CREDITS.TXT:1.70 llvm/CREDITS.TXT:1.71 --- llvm/CREDITS.TXT:1.70 Tue Feb 27 04:44:42 2007 +++ llvm/CREDITS.TXT Mon Mar 5 03:21:11 2007 @@ -169,6 +169,10 @@ E: ghost at cs.msu.su D: Made inst_iterator behave like a proper iterator, LowerConstantExprs pass +N: Duncan Sands +E: baldrick at free.fr +D: Ada front-end + N: Ruchira Sasanka E: sasanka at uiuc.edu D: Graph coloring register allocator for the Sparc64 backend From zhousheng00 at gmail.com Mon Mar 5 10:43:26 2007 From: zhousheng00 at gmail.com (Zhou Sheng) Date: Mon, 5 Mar 2007 10:43:26 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/ADT/APInt.h Message-ID: <200703051643.l25GhQb1026554@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/ADT: APInt.h updated: 1.39 -> 1.40 --- Log message: Correct the calculation in APInt::logBase2(). --- Diffs of the changes: (+1 -1) APInt.h | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/include/llvm/ADT/APInt.h diff -u llvm/include/llvm/ADT/APInt.h:1.39 llvm/include/llvm/ADT/APInt.h:1.40 --- llvm/include/llvm/ADT/APInt.h:1.39 Sat Mar 3 02:34:02 2007 +++ llvm/include/llvm/ADT/APInt.h Mon Mar 5 10:42:58 2007 @@ -697,7 +697,7 @@ /// @returns the floor log base 2 of this APInt. inline uint32_t logBase2() const { - return getNumWords() * APINT_BITS_PER_WORD - 1 - countLeadingZeros(); + return BitWidth - 1 - countLeadingZeros(); } /// @brief Converts this APInt to a double value. From jeffc at jolt-lang.org Mon Mar 5 11:22:50 2007 From: jeffc at jolt-lang.org (Jeff Cohen) Date: Mon, 5 Mar 2007 11:22:50 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/ADT/SmallVector.h Message-ID: <200703051722.l25HMo9s027266@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/ADT: SmallVector.h updated: 1.26 -> 1.27 --- Log message: The hack won't work on VS 2005, and it might not be needed anyway. --- Diffs of the changes: (+5 -1) SmallVector.h | 6 +++++- 1 files changed, 5 insertions(+), 1 deletion(-) Index: llvm/include/llvm/ADT/SmallVector.h diff -u llvm/include/llvm/ADT/SmallVector.h:1.26 llvm/include/llvm/ADT/SmallVector.h:1.27 --- llvm/include/llvm/ADT/SmallVector.h:1.26 Sun Mar 4 18:46:22 2007 +++ llvm/include/llvm/ADT/SmallVector.h Mon Mar 5 11:22:33 2007 @@ -20,10 +20,10 @@ #ifdef _MSC_VER namespace std { +#if _MSC_VER <= 1310 // Work around flawed VC++ implementation of std::uninitialized_copy. Define // additional overloads so that elements with pointer types are recognized as // scalars and not objects, causing bizarre type conversion errors. - // FIXME: this hack may or may not be correct for Visual Studio 2005. template inline _Scalar_ptr_iterator_tag _Ptr_cat(T1 **, T2 **) { _Scalar_ptr_iterator_tag _Cat; @@ -35,6 +35,10 @@ _Scalar_ptr_iterator_tag _Cat; return _Cat; } +#else +// FIXME: It is not clear if the problem is fixed in VS 2005. What is clear +// is that the above hack won't work if it wasn't fixed. +#endif } #endif From lauro.venancio at gmail.com Mon Mar 5 12:00:15 2007 From: lauro.venancio at gmail.com (Lauro Ramos Venancio) Date: Mon, 5 Mar 2007 12:00:15 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/ARM/ARMTargetAsmInfo.cpp Message-ID: <200703051800.l25I0FLK027935@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/ARM: ARMTargetAsmInfo.cpp updated: 1.11 -> 1.12 --- Log message: Use init_array/fini_array sections for static contructors/destructors when the ABI is AAPCS. Fix SingleSource/Regression/C/ConstructorDestructorAttributes test on arm-linux-gnueabi. --- Diffs of the changes: (+7 -2) ARMTargetAsmInfo.cpp | 9 +++++++-- 1 files changed, 7 insertions(+), 2 deletions(-) Index: llvm/lib/Target/ARM/ARMTargetAsmInfo.cpp diff -u llvm/lib/Target/ARM/ARMTargetAsmInfo.cpp:1.11 llvm/lib/Target/ARM/ARMTargetAsmInfo.cpp:1.12 --- llvm/lib/Target/ARM/ARMTargetAsmInfo.cpp:1.11 Thu Feb 1 15:43:53 2007 +++ llvm/lib/Target/ARM/ARMTargetAsmInfo.cpp Mon Mar 5 11:59:58 2007 @@ -58,8 +58,13 @@ } else { PrivateGlobalPrefix = ".L"; WeakRefDirective = "\t.weak\t"; - StaticCtorsSection = "\t.section .ctors,\"aw\",%progbits"; - StaticDtorsSection = "\t.section .dtors,\"aw\",%progbits"; + if (Subtarget->isAAPCS_ABI()) { + StaticCtorsSection = "\t.section .init_array,\"aw\",%init_array"; + StaticDtorsSection = "\t.section .fini_array,\"aw\",%fini_array"; + } else { + StaticCtorsSection = "\t.section .ctors,\"aw\",%progbits"; + StaticDtorsSection = "\t.section .dtors,\"aw\",%progbits"; + } } ZeroDirective = "\t.space\t"; From lauro.venancio at gmail.com Mon Mar 5 12:00:17 2007 From: lauro.venancio at gmail.com (Lauro Ramos Venancio) Date: Mon, 5 Mar 2007 12:00:17 -0600 Subject: [llvm-commits] CVS: llvm/test/CodeGen/ARM/ctors_dtors.ll Message-ID: <200703051800.l25I0HQ5027940@zion.cs.uiuc.edu> Changes in directory llvm/test/CodeGen/ARM: ctors_dtors.ll updated: 1.2 -> 1.3 --- Log message: Use init_array/fini_array sections for static contructors/destructors when the ABI is AAPCS. Fix SingleSource/Regression/C/ConstructorDestructorAttributes test on arm-linux-gnueabi. --- Diffs of the changes: (+4 -2) ctors_dtors.ll | 6 ++++-- 1 files changed, 4 insertions(+), 2 deletions(-) Index: llvm/test/CodeGen/ARM/ctors_dtors.ll diff -u llvm/test/CodeGen/ARM/ctors_dtors.ll:1.2 llvm/test/CodeGen/ARM/ctors_dtors.ll:1.3 --- llvm/test/CodeGen/ARM/ctors_dtors.ll:1.2 Fri Jan 19 03:20:23 2007 +++ llvm/test/CodeGen/ARM/ctors_dtors.ll Mon Mar 5 11:59:58 2007 @@ -1,8 +1,10 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm && ; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-apple-darwin | grep '\.mod_init_func' && ; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-apple-darwin | grep '\.mod_term_func' && -; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-linux | grep '\.section \.ctors,"aw",.progbits' && -; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-linux | grep '\.section \.dtors,"aw",.progbits' +; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-linux-gnu | grep '\.section \.ctors,"aw",.progbits' && +; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-linux-gnu | grep '\.section \.dtors,"aw",.progbits' && +; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-linux-gnueabi | grep '\.section \.init_array,"aw",.init_array' && +; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-linux-gnueabi | grep '\.section \.fini_array,"aw",.fini_array' %llvm.global_ctors = appending global [1 x { int, void ()* }] [ { int, void ()* } { int 65535, void ()* %__mf_init } ] ; <[1 x { int, void ()* }]*> [#uses=0] %llvm.global_dtors = appending global [1 x { int, void ()* }] [ { int, void ()* } { int 65535, void ()* %__mf_fini } ] ; <[1 x { int, void ()* }]*> [#uses=0] From dpatel at apple.com Mon Mar 5 12:21:08 2007 From: dpatel at apple.com (Devang Patel) Date: Mon, 5 Mar 2007 12:21:08 -0600 Subject: [llvm-commits] CVS: llvm/lib/VMCore/PassManager.cpp Message-ID: <200703051821.l25IL8Ye028298@zion.cs.uiuc.edu> Changes in directory llvm/lib/VMCore: PassManager.cpp updated: 1.139 -> 1.140 --- Log message: Account for time consumed by releaseMemory() properly. --- Diffs of the changes: (+2 -2) PassManager.cpp | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/lib/VMCore/PassManager.cpp diff -u llvm/lib/VMCore/PassManager.cpp:1.139 llvm/lib/VMCore/PassManager.cpp:1.140 --- llvm/lib/VMCore/PassManager.cpp:1.139 Sun Mar 4 18:00:42 2007 +++ llvm/lib/VMCore/PassManager.cpp Mon Mar 5 12:20:51 2007 @@ -564,9 +564,9 @@ std::string Msg1 = " Freeing Pass '"; dumpPassInfo(*I, Msg1, Msg); - if (TheTimeInfo) TheTimeInfo->passStarted(P); + if (TheTimeInfo) TheTimeInfo->passStarted(*I); (*I)->releaseMemory(); - if (TheTimeInfo) TheTimeInfo->passEnded(P); + if (TheTimeInfo) TheTimeInfo->passEnded(*I); std::map::iterator Pos = AvailableAnalysis.find((*I)->getPassInfo()); From dpatel at apple.com Mon Mar 5 14:01:51 2007 From: dpatel at apple.com (Devang Patel) Date: Mon, 5 Mar 2007 14:01:51 -0600 Subject: [llvm-commits] CVS: llvm/lib/Analysis/IPA/CallGraphSCCPass.cpp Message-ID: <200703052001.l25K1ppM030129@zion.cs.uiuc.edu> Changes in directory llvm/lib/Analysis/IPA: CallGraphSCCPass.cpp updated: 1.19 -> 1.20 --- Log message: Avoid constructing std::strings unless pass debugging is ON. --- Diffs of the changes: (+5 -10) CallGraphSCCPass.cpp | 15 +++++---------- 1 files changed, 5 insertions(+), 10 deletions(-) Index: llvm/lib/Analysis/IPA/CallGraphSCCPass.cpp diff -u llvm/lib/Analysis/IPA/CallGraphSCCPass.cpp:1.19 llvm/lib/Analysis/IPA/CallGraphSCCPass.cpp:1.20 --- llvm/lib/Analysis/IPA/CallGraphSCCPass.cpp:1.19 Tue Feb 27 09:00:39 2007 +++ llvm/lib/Analysis/IPA/CallGraphSCCPass.cpp Mon Mar 5 14:01:30 2007 @@ -77,9 +77,6 @@ CallGraph &CG = getAnalysis(); bool Changed = doInitialization(CG); - std::string Msg1 = "Executing Pass '"; - std::string Msg3 = "' Made Modification '"; - // Walk SCC for (scc_iterator I = scc_begin(&CG), E = scc_end(&CG); I != E; ++I) { @@ -91,8 +88,7 @@ AnalysisUsage AnUsage; P->getAnalysisUsage(AnUsage); - std::string Msg2 = "' on Call Graph ...\n'"; - dumpPassInfo(P, Msg1, Msg2); + dumpPassInfo(P, EXECUTION_MSG, ON_CG_MSG, ""); dumpAnalysisSetInfo("Required", P, AnUsage.getRequiredSet()); initializeAnalysisImpl(P); @@ -109,21 +105,20 @@ for (unsigned i = 0, e = SCC.size(); i != e; ++i) { Function *F = SCC[i]->getFunction(); if (F) { - std::string Msg4 = "' on Function '" + F->getName() + "'...\n"; - dumpPassInfo(P, Msg1, Msg4); - Changed |= FPP->runOnFunction(*F); + dumpPassInfo(P, EXECUTION_MSG, ON_FUNCTION_MSG, F->getName()); + Changed |= FPP->runOnFunction(*F); } } } StopPassTimer(P); if (Changed) - dumpPassInfo(P, Msg3, Msg2); + dumpPassInfo(P, MODIFICATION_MSG, ON_CG_MSG, ""); dumpAnalysisSetInfo("Preserved", P, AnUsage.getPreservedSet()); removeNotPreservedAnalysis(P); recordAvailableAnalysis(P); - removeDeadPasses(P, Msg2); + removeDeadPasses(P, "", ON_CG_MSG); } } Changed |= doFinalization(CG); From dpatel at apple.com Mon Mar 5 14:01:52 2007 From: dpatel at apple.com (Devang Patel) Date: Mon, 5 Mar 2007 14:01:52 -0600 Subject: [llvm-commits] CVS: llvm/lib/Analysis/LoopPass.cpp Message-ID: <200703052001.l25K1qum030134@zion.cs.uiuc.edu> Changes in directory llvm/lib/Analysis: LoopPass.cpp updated: 1.8 -> 1.9 --- Log message: Avoid constructing std::strings unless pass debugging is ON. --- Diffs of the changes: (+3 -7) LoopPass.cpp | 10 +++------- 1 files changed, 3 insertions(+), 7 deletions(-) Index: llvm/lib/Analysis/LoopPass.cpp diff -u llvm/lib/Analysis/LoopPass.cpp:1.8 llvm/lib/Analysis/LoopPass.cpp:1.9 --- llvm/lib/Analysis/LoopPass.cpp:1.8 Fri Feb 23 12:05:55 2007 +++ llvm/lib/Analysis/LoopPass.cpp Mon Mar 5 14:01:30 2007 @@ -91,9 +91,6 @@ for (LoopInfo::iterator I = LI.begin(), E = LI.end(); I != E; ++I) addLoopIntoQueue(*I, LQ); - std::string Msg1 = "Executing Pass '"; - std::string Msg3 = "' Made Modification '"; - // Walk Loops while (!LQ->empty()) { @@ -108,8 +105,7 @@ AnalysisUsage AnUsage; P->getAnalysisUsage(AnUsage); - std::string Msg2 = "' on Loop ...\n'"; - dumpPassInfo(P, Msg1, Msg2); + dumpPassInfo(P, EXECUTION_MSG, ON_LOOP_MSG, ""); dumpAnalysisSetInfo("Required", P, AnUsage.getRequiredSet()); initializeAnalysisImpl(P); @@ -121,12 +117,12 @@ StopPassTimer(P); if (Changed) - dumpPassInfo(P, Msg3, Msg2); + dumpPassInfo(P, MODIFICATION_MSG, ON_LOOP_MSG, ""); dumpAnalysisSetInfo("Preserved", P, AnUsage.getPreservedSet()); removeNotPreservedAnalysis(P); recordAvailableAnalysis(P); - removeDeadPasses(P, Msg2); + removeDeadPasses(P, "", ON_LOOP_MSG); if (skipThisLoop) // Do not run other passes on this loop. From dpatel at apple.com Mon Mar 5 14:01:57 2007 From: dpatel at apple.com (Devang Patel) Date: Mon, 5 Mar 2007 14:01:57 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/PassManagers.h Message-ID: <200703052001.l25K1vId030143@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm: PassManagers.h updated: 1.10 -> 1.11 --- Log message: Avoid constructing std::strings unless pass debugging is ON. --- Diffs of the changes: (+15 -2) PassManagers.h | 17 +++++++++++++++-- 1 files changed, 15 insertions(+), 2 deletions(-) Index: llvm/include/llvm/PassManagers.h diff -u llvm/include/llvm/PassManagers.h:1.10 llvm/include/llvm/PassManagers.h:1.11 --- llvm/include/llvm/PassManagers.h:1.10 Tue Feb 27 09:00:39 2007 +++ llvm/include/llvm/PassManagers.h Mon Mar 5 14:01:30 2007 @@ -93,6 +93,18 @@ TLM_Pass // PassManager }; +// enums for debugging strings +enum PassDebuggingString { + EXECUTION_MSG, // "Executing Pass '" + MODIFICATION_MSG, // "' Made Modification '" + FREEING_MSG, // " Freeing Pass '" + ON_BASICBLOCK_MSG, // "' on BasicBlock '" + PassName + "'...\n" + ON_FUNCTION_MSG, // "' on Function '" + FunctionName + "'...\n" + ON_MODULE_MSG, // "' on Module '" + ModuleName + "'...\n" + ON_LOOP_MSG, // " 'on Loop ...\n'" + ON_CG_MSG // "' on Call Graph ...\n'" +}; + //===----------------------------------------------------------------------===// // PMTopLevelManager // @@ -202,7 +214,7 @@ void removeNotPreservedAnalysis(Pass *P); /// Remove dead passes - void removeDeadPasses(Pass *P, std::string &Msg); + void removeDeadPasses(Pass *P, std::string Msg, enum PassDebuggingString); /// Add pass P into the PassVector. Update /// AvailableAnalysis appropriately if ProcessAnalysis is true. @@ -238,7 +250,8 @@ // Print routines used by debug-pass void dumpLastUses(Pass *P, unsigned Offset) const; void dumpPassArguments() const; - void dumpPassInfo(Pass *P, std::string &Msg1, std::string &Msg2) const; + void dumpPassInfo(Pass *P, enum PassDebuggingString S1, + enum PassDebuggingString S2, std::string Msg); void dumpAnalysisSetInfo(const char *Msg, Pass *P, const std::vector &Set) const; From dpatel at apple.com Mon Mar 5 14:01:57 2007 From: dpatel at apple.com (Devang Patel) Date: Mon, 5 Mar 2007 14:01:57 -0600 Subject: [llvm-commits] CVS: llvm/lib/VMCore/PassManager.cpp Message-ID: <200703052001.l25K1vac030140@zion.cs.uiuc.edu> Changes in directory llvm/lib/VMCore: PassManager.cpp updated: 1.140 -> 1.141 --- Log message: Avoid constructing std::strings unless pass debugging is ON. --- Diffs of the changes: (+52 -32) PassManager.cpp | 84 ++++++++++++++++++++++++++++++++++---------------------- 1 files changed, 52 insertions(+), 32 deletions(-) Index: llvm/lib/VMCore/PassManager.cpp diff -u llvm/lib/VMCore/PassManager.cpp:1.140 llvm/lib/VMCore/PassManager.cpp:1.141 --- llvm/lib/VMCore/PassManager.cpp:1.140 Mon Mar 5 12:20:51 2007 +++ llvm/lib/VMCore/PassManager.cpp Mon Mar 5 14:01:30 2007 @@ -553,7 +553,8 @@ } /// Remove analysis passes that are not used any longer -void PMDataManager::removeDeadPasses(Pass *P, std::string &Msg) { +void PMDataManager::removeDeadPasses(Pass *P, std::string Msg, + enum PassDebuggingString DBG_STR) { std::vector DeadPasses; TPM->collectLastUses(DeadPasses, P); @@ -561,8 +562,7 @@ for (std::vector::iterator I = DeadPasses.begin(), E = DeadPasses.end(); I != E; ++I) { - std::string Msg1 = " Freeing Pass '"; - dumpPassInfo(*I, Msg1, Msg); + dumpPassInfo(*I, FREEING_MSG, DBG_STR, Msg); if (TheTimeInfo) TheTimeInfo->passStarted(*I); (*I)->releaseMemory(); @@ -720,14 +720,44 @@ } } -void PMDataManager:: dumpPassInfo(Pass *P, std::string &Msg1, - std::string &Msg2) const { +void PMDataManager:: dumpPassInfo(Pass *P, enum PassDebuggingString S1, + enum PassDebuggingString S2, + std::string Msg) { if (PassDebugging < Executions) return; cerr << (void*)this << std::string(getDepth()*2+1, ' '); - cerr << Msg1; - cerr << P->getPassName(); - cerr << Msg2; + switch (S1) { + case EXECUTION_MSG: + cerr << "Executing Pass '" << P->getPassName(); + break; + case MODIFICATION_MSG: + cerr << "' Made Modification '" << P->getPassName(); + break; + case FREEING_MSG: + cerr << " Freeing Pass '" << P->getPassName(); + break; + default: + break; + } + switch (S2) { + case ON_BASICBLOCK_MSG: + cerr << "' on BasicBlock '" << Msg << "...\n"; + break; + case ON_FUNCTION_MSG: + cerr << "' on Function '" << Msg << "...\n"; + break; + case ON_MODULE_MSG: + cerr << "' on Module '" << Msg << "...\n"; + break; + case ON_LOOP_MSG: + cerr << "' on Loop " << Msg << "...\n"; + break; + case ON_CG_MSG: + cerr << "' on Call Graph " << Msg << "...\n"; + break; + default: + break; + } } void PMDataManager::dumpAnalysisSetInfo(const char *Msg, Pass *P, @@ -774,17 +804,13 @@ bool Changed = doInitialization(F); - std::string Msg1 = "Executing Pass '"; - std::string Msg3 = "' Made Modification '"; - for (Function::iterator I = F.begin(), E = F.end(); I != E; ++I) for (unsigned Index = 0; Index < getNumContainedPasses(); ++Index) { BasicBlockPass *BP = getContainedPass(Index); AnalysisUsage AnUsage; BP->getAnalysisUsage(AnUsage); - std::string Msg2 = "' on BasicBlock '" + (*I).getName() + "'...\n"; - dumpPassInfo(BP, Msg1, Msg2); + dumpPassInfo(BP, EXECUTION_MSG, ON_BASICBLOCK_MSG, (*I).getName()); dumpAnalysisSetInfo("Required", BP, AnUsage.getRequiredSet()); initializeAnalysisImpl(BP); @@ -793,13 +819,14 @@ Changed |= BP->runOnBasicBlock(*I); if (TheTimeInfo) TheTimeInfo->passEnded(BP); - if (Changed) - dumpPassInfo(BP, Msg3, Msg2); + if (Changed) + dumpPassInfo(BP, MODIFICATION_MSG, ON_BASICBLOCK_MSG, (*I).getName()); dumpAnalysisSetInfo("Preserved", BP, AnUsage.getPreservedSet()); removeNotPreservedAnalysis(BP); recordAvailableAnalysis(BP); - removeDeadPasses(BP, Msg2); + removeDeadPasses(BP, (*I).getName(), ON_BASICBLOCK_MSG); + } return Changed |= doFinalization(F); } @@ -973,17 +1000,13 @@ if (F.isDeclaration()) return false; - std::string Msg1 = "Executing Pass '"; - std::string Msg3 = "' Made Modification '"; - for (unsigned Index = 0; Index < getNumContainedPasses(); ++Index) { FunctionPass *FP = getContainedPass(Index); AnalysisUsage AnUsage; FP->getAnalysisUsage(AnUsage); - std::string Msg2 = "' on Function '" + F.getName() + "'...\n"; - dumpPassInfo(FP, Msg1, Msg2); + dumpPassInfo(FP, EXECUTION_MSG, ON_FUNCTION_MSG, F.getName()); dumpAnalysisSetInfo("Required", FP, AnUsage.getRequiredSet()); initializeAnalysisImpl(FP); @@ -992,13 +1015,13 @@ Changed |= FP->runOnFunction(F); if (TheTimeInfo) TheTimeInfo->passEnded(FP); - if (Changed) - dumpPassInfo(FP, Msg3, Msg2); + if (Changed) + dumpPassInfo(FP, MODIFICATION_MSG, ON_FUNCTION_MSG, F.getName()); dumpAnalysisSetInfo("Preserved", FP, AnUsage.getPreservedSet()); removeNotPreservedAnalysis(FP); recordAvailableAnalysis(FP); - removeDeadPasses(FP, Msg2); + removeDeadPasses(FP, F.getName(), ON_FUNCTION_MSG); } return Changed; } @@ -1045,17 +1068,13 @@ MPPassManager::runOnModule(Module &M) { bool Changed = false; - std::string Msg1 = "Executing Pass '"; - std::string Msg3 = "' Made Modification '"; - for (unsigned Index = 0; Index < getNumContainedPasses(); ++Index) { ModulePass *MP = getContainedPass(Index); AnalysisUsage AnUsage; MP->getAnalysisUsage(AnUsage); - std::string Msg2 = "' on Module '" + M.getModuleIdentifier() + "'...\n"; - dumpPassInfo(MP, Msg1, Msg2); + dumpPassInfo(MP, EXECUTION_MSG, ON_MODULE_MSG, M.getModuleIdentifier()); dumpAnalysisSetInfo("Required", MP, AnUsage.getRequiredSet()); initializeAnalysisImpl(MP); @@ -1064,13 +1083,14 @@ Changed |= MP->runOnModule(M); if (TheTimeInfo) TheTimeInfo->passEnded(MP); - if (Changed) - dumpPassInfo(MP, Msg3, Msg2); + if (Changed) + dumpPassInfo(MP, MODIFICATION_MSG, ON_MODULE_MSG, + M.getModuleIdentifier()); dumpAnalysisSetInfo("Preserved", MP, AnUsage.getPreservedSet()); removeNotPreservedAnalysis(MP); recordAvailableAnalysis(MP); - removeDeadPasses(MP, Msg2); + removeDeadPasses(MP, M.getModuleIdentifier(), ON_MODULE_MSG); } return Changed; } From lauro.venancio at gmail.com Mon Mar 5 14:28:47 2007 From: lauro.venancio at gmail.com (Lauro Ramos Venancio) Date: Mon, 5 Mar 2007 14:28:47 -0600 Subject: [llvm-commits] CVS: llvm-test/SingleSource/Regression/C/casts.c Message-ID: <200703052028.l25KSlsu030722@zion.cs.uiuc.edu> Changes in directory llvm-test/SingleSource/Regression/C: casts.c updated: 1.5 -> 1.6 --- Log message: Fix test bug: int64_t isn't the same thing that long --- Diffs of the changes: (+2 -2) casts.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm-test/SingleSource/Regression/C/casts.c diff -u llvm-test/SingleSource/Regression/C/casts.c:1.5 llvm-test/SingleSource/Regression/C/casts.c:1.6 --- llvm-test/SingleSource/Regression/C/casts.c:1.5 Sat Nov 11 08:31:54 2006 +++ llvm-test/SingleSource/Regression/C/casts.c Mon Mar 5 14:28:30 2007 @@ -23,8 +23,8 @@ int i1, i; unsigned ui1; - int64_t L, l1; - uint64_t ul1; + long L, l1; + unsigned long ul1; float F; double D; From rspencer at reidspencer.com Mon Mar 5 15:39:31 2007 From: rspencer at reidspencer.com (Reid Spencer) Date: Mon, 05 Mar 2007 13:39:31 -0800 Subject: [llvm-commits] Bug In InstCombine? Message-ID: <1173130771.24497.95.camel@bashful.x10sys.com> Chris, While reviewing some of Sheng's patches, I think I found an existing bug in InstCombine. Please review this and if its okay I'll commit the patch: Index: InstructionCombining.cpp =================================================================== RCS file: /var/cvs/llvm/llvm/lib/Transforms/Scalar/InstructionCombining.cpp,v retrieving revision 1.647 diff -t -d -u -p -5 -r1.647 InstructionCombining.cpp --- InstructionCombining.cpp 5 Mar 2007 00:11:19 -0000 1.647 +++ InstructionCombining.cpp 5 Mar 2007 21:37:17 -0000 @@ -2408,11 +2408,11 @@ Instruction *InstCombiner::visitUDiv(Bin // udiv X, (Select Cond, C1, C2) --> Select Cond, (shr X, C1), (shr X, C2) // where C1&C2 are powers of two. if (SelectInst *SI = dyn_cast(Op1)) { if (ConstantInt *STO = dyn_cast(SI->getOperand(1))) if (ConstantInt *SFO = dyn_cast(SI->getOperand(2))) - if (!STO->isNullValue() && !STO->isNullValue()) { + if (!STO->isZero() && !SFO->isZero()) { While I've changed it to use the less expensive isZero, the real bug is that this is testing X & X. That is, the second term should check SF0 against zero, not ST0. I can't think of any reason why testing ST0 twice would be correct. uint64_t TVA = STO->getZExtValue(), FVA = SFO->getZExtValue(); if (isPowerOf2_64(TVA) && isPowerOf2_64(FVA)) { // Compute the shift amounts unsigned TSA = Log2_64(TVA), FSA = Log2_64(FVA); // Construct the "on true" case of the select From dpatel at apple.com Mon Mar 5 16:40:20 2007 From: dpatel at apple.com (dpatel at apple.com) Date: Mon, 5 Mar 2007 14:40:20 -0800 (PST) Subject: [llvm-commits] [124571] While reading PCH, Parse Bytecodes directly from memory. Message-ID: <20070305224020.336968008AF7@src> Revision: 124571 Author: dpatel Date: 2007-03-05 14:40:18 -0800 (Mon, 05 Mar 2007) Log Message: ----------- While reading PCH, Parse Bytecodes directly from memory. Modified Paths: -------------- apple-local/branches/llvm/gcc/c-pch.c apple-local/branches/llvm/gcc/llvm-backend.cpp apple-local/branches/llvm/gcc/llvm.h Modified: apple-local/branches/llvm/gcc/c-pch.c =================================================================== --- apple-local/branches/llvm/gcc/c-pch.c 2007-03-05 11:35:52 UTC (rev 124570) +++ apple-local/branches/llvm/gcc/c-pch.c 2007-03-05 22:40:18 UTC (rev 124571) @@ -415,6 +415,13 @@ if (!flag_preprocess_only) { + /* APPLE LOCAL begin LLVM */ +#ifdef ENABLE_LLVM + unsigned char *buf = xmalloc (h.asm_size); + if (fread (buf, h.asm_size, 1, f) != 1) + cpp_errno (pfile, CPP_DL_ERROR, "reading"); + llvm_pch_read(buf, h.asm_size); +#else unsigned long written; char * buf = xmalloc (16384); @@ -428,13 +435,9 @@ cpp_errno (pfile, CPP_DL_ERROR, "reading"); written += size; } +#endif + /* APPLE LOCAL end LLVM */ free (buf); - /* APPLE LOCAL begin LLVM */ -#ifdef ENABLE_LLVM - llvm_pch_read(); -#endif - /* APPLE LOCAL end LLVM */ - } else { Modified: apple-local/branches/llvm/gcc/llvm-backend.cpp =================================================================== --- apple-local/branches/llvm/gcc/llvm-backend.cpp 2007-03-05 11:35:52 UTC (rev 124570) +++ apple-local/branches/llvm/gcc/llvm-backend.cpp 2007-03-05 22:40:18 UTC (rev 124571) @@ -189,16 +189,16 @@ /// Read bytecode from PCH file. Initialize TheModue and setup /// LTypes vector. -void llvm_pch_read(void) { +void llvm_pch_read(const unsigned char *Buffer, unsigned Size) { + std::string ModuleName = TheModule->getModuleIdentifier(); if (TheModule) delete TheModule; - fclose (asm_out_file); - - std::string ErrMsg; clearTargetBuiltinCache(); - TheModule = ParseBytecodeFile(asm_file_name, + + std::string ErrMsg; + TheModule = ParseBytecodeBuffer(Buffer, Size, ModuleName, Compressor::decompressToNewBuffer, &ErrMsg); if (!TheModule) { @@ -207,12 +207,6 @@ exit(1); } - // Reopen asm_out_file for the rest of the compiler's use. - // This also removes llvm byte code from the asm_out_file. - asm_out_file = fopen (asm_file_name, "w+b"); - if (asm_out_file == 0) - fatal_error ("can%'t open %s for writing: %m", asm_file_name); - // Read LLVM Types string table readLLVMTypesStringTable(); readLLVMValuesStringTable(); Modified: apple-local/branches/llvm/gcc/llvm.h =================================================================== --- apple-local/branches/llvm/gcc/llvm.h 2007-03-05 11:35:52 UTC (rev 124570) +++ apple-local/branches/llvm/gcc/llvm.h 2007-03-05 22:40:18 UTC (rev 124571) @@ -89,7 +89,7 @@ void llvm_pch_write_init(void); /* Read bytecodes from PCH file. */ -void llvm_pch_read(void); +void llvm_pch_read(const unsigned char *, unsigned); /* llvm_asm_file_start - Start the .s file. */ void llvm_asm_file_start(void); From clattner at apple.com Mon Mar 5 16:51:23 2007 From: clattner at apple.com (Chris Lattner) Date: Mon, 5 Mar 2007 14:51:23 -0800 Subject: [llvm-commits] Bug In InstCombine? In-Reply-To: <1173130771.24497.95.camel@bashful.x10sys.com> References: <1173130771.24497.95.camel@bashful.x10sys.com> Message-ID: On Mar 5, 2007, at 1:39 PM, Reid Spencer wrote: > Chris, > > While reviewing some of Sheng's patches, I think I found an > existing bug > in InstCombine. Please review this and if its okay I'll commit the > patch: > > Index: InstructionCombining.cpp > =================================================================== > RCS > file: /var/cvs/llvm/llvm/lib/Transforms/Scalar/ > InstructionCombining.cpp,v > retrieving revision 1.647 > diff -t -d -u -p -5 -r1.647 InstructionCombining.cpp > --- InstructionCombining.cpp 5 Mar 2007 00:11:19 -0000 1.647 > +++ InstructionCombining.cpp 5 Mar 2007 21:37:17 -0000 > @@ -2408,11 +2408,11 @@ Instruction *InstCombiner::visitUDiv(Bin > // udiv X, (Select Cond, C1, C2) --> Select Cond, (shr X, C1), (shr > X, C2) > // where C1&C2 are powers of two. > if (SelectInst *SI = dyn_cast(Op1)) { > if (ConstantInt *STO = dyn_cast(SI->getOperand(1))) > if (ConstantInt *SFO = dyn_cast(SI->getOperand > (2))) > - if (!STO->isNullValue() && !STO->isNullValue()) { > + if (!STO->isZero() && !SFO->isZero()) { > > While I've changed it to use the less expensive isZero, the real > bug is > that this is testing X & X. That is, the second term should check SF0 > against zero, not ST0. I can't think of any reason why testing ST0 > twice > would be correct. Interesting case. the full code looks like this: if (!STO->isNullValue() && !STO->isNullValue()) { uint64_t TVA = STO->getZExtValue(), FVA = SFO->getZExtValue (); if (isPowerOf2_64(TVA) && isPowerOf2_64(FVA)) { The isPowerOf2_64 calls check that the argument is not zero. As such, you can drop the isNullValue checks entirely. Thanks Reid, -Chris From reid at x10sys.com Mon Mar 5 16:51:31 2007 From: reid at x10sys.com (Reid Spencer) Date: Mon, 5 Mar 2007 16:51:31 -0600 Subject: [llvm-commits] CVS: llvm/test/Transforms/InstCombine/udiv_select_to_select_shift.ll Message-ID: <200703052251.l25MpVkS003482@zion.cs.uiuc.edu> Changes in directory llvm/test/Transforms/InstCombine: udiv_select_to_select_shift.ll added (r1.1) --- Log message: Add a test case for a particular udiv/select transform. --- Diffs of the changes: (+17 -0) udiv_select_to_select_shift.ll | 17 +++++++++++++++++ 1 files changed, 17 insertions(+) Index: llvm/test/Transforms/InstCombine/udiv_select_to_select_shift.ll diff -c /dev/null llvm/test/Transforms/InstCombine/udiv_select_to_select_shift.ll:1.1 *** /dev/null Mon Mar 5 16:51:18 2007 --- llvm/test/Transforms/InstCombine/udiv_select_to_select_shift.ll Mon Mar 5 16:51:08 2007 *************** *** 0 **** --- 1,17 ---- + ; This tests that this transform: + ; udiv X, (Select Cond, C1, C2) --> Select Cond, (shr X, C1), (shr X, C2) + ; + ; RUN: llvm-as %s -o - | opt -instcombine | llvm-dis -f -o %t && \ + ; RUN: grep select %t | wc -l | grep 1 && \ + ; RUN: grep lshr %t | wc -l | grep 2 && \ + ; RUN: grep udiv %t | wc -l | grep 0 + + define i64 @test(i64 %X, i1 %Cond ) { + entry: + %divisor1 = select i1 %Cond, i64 8, i64 16 + %quotient1 = udiv i64 %X, %divisor1 + %divisor2 = select i1 %Cond, i64 8, i64 0 + %quotient2 = udiv i64 %X, %divisor2 + %sum = add i64 %quotient1, %quotient2 + ret i64 %sum + } From dpatel at apple.com Mon Mar 5 16:58:06 2007 From: dpatel at apple.com (Devang Patel) Date: Mon, 5 Mar 2007 16:58:06 -0600 Subject: [llvm-commits] CVS: llvm/lib/VMCore/PassManager.cpp Message-ID: <200703052258.l25Mw6Gs003616@zion.cs.uiuc.edu> Changes in directory llvm/lib/VMCore: PassManager.cpp updated: 1.141 -> 1.142 --- Log message: Current pass manager, not the parent pass manager, assumes the role of last user when one of the managed pass uses info provided by parent pass manager. This was exposed by LPPassManager work. --- Diffs of the changes: (+10 -22) PassManager.cpp | 32 ++++++++++---------------------- 1 files changed, 10 insertions(+), 22 deletions(-) Index: llvm/lib/VMCore/PassManager.cpp diff -u llvm/lib/VMCore/PassManager.cpp:1.141 llvm/lib/VMCore/PassManager.cpp:1.142 --- llvm/lib/VMCore/PassManager.cpp:1.141 Mon Mar 5 14:01:30 2007 +++ llvm/lib/VMCore/PassManager.cpp Mon Mar 5 16:57:49 2007 @@ -158,7 +158,6 @@ recordAvailableAnalysis(IP); } else { P->assignPassManager(activeStack); - activeStack.handleLastUserOverflow(); } } @@ -259,7 +258,6 @@ recordAvailableAnalysis(IP); } else { P->assignPassManager(activeStack); - activeStack.handleLastUserOverflow(); } } @@ -587,6 +585,10 @@ AnalysisResolver *AR = new AnalysisResolver(*this); P->setResolver(AR); + // If a FunctionPass F is the last user of ModulePass info M + // then the F's manager, not F, records itself as a last user of M. + std::vector TransferLastUses; + if (ProcessAnalysis) { // At the moment, this pass is the last user of all required passes. @@ -622,6 +624,12 @@ LastUses.push_back(P); TPM->setLastUser(LastUses, P); + if (!TransferLastUses.empty()) { + Pass *My_PM = dynamic_cast(this); + TPM->setLastUser(TransferLastUses, My_PM); + TransferLastUses.clear(); + } + // Take a note of analysis required and made available by this pass. // Remove the analysis not preserved by this pass removeNotPreservedAnalysis(P); @@ -1231,26 +1239,6 @@ printf ("\n"); } -// Walk Pass Manager stack and set LastUse markers if any -// manager is transfering this priviledge to its parent manager -void PMStack::handleLastUserOverflow() { - - for(PMStack::iterator I = this->begin(), E = this->end(); I != E;) { - - PMDataManager *Child = *I++; - if (I != E) { - PMDataManager *Parent = *I++; - PMTopLevelManager *TPM = Parent->getTopLevelManager(); - std::vector &TLU = Child->getTransferredLastUses(); - if (!TLU.empty()) { - Pass *P = dynamic_cast(Parent); - TPM->setLastUser(TLU, P); - TLU.clear(); - } - } - } -} - /// Find appropriate Module Pass Manager in the PM Stack and /// add self into that manager. void ModulePass::assignPassManager(PMStack &PMS, From dpatel at apple.com Mon Mar 5 16:58:08 2007 From: dpatel at apple.com (Devang Patel) Date: Mon, 5 Mar 2007 16:58:08 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/PassManagers.h Message-ID: <200703052258.l25Mw867003622@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm: PassManagers.h updated: 1.11 -> 1.12 --- Log message: Current pass manager, not the parent pass manager, assumes the role of last user when one of the managed pass uses info provided by parent pass manager. This was exposed by LPPassManager work. --- Diffs of the changes: (+0 -11) PassManagers.h | 11 ----------- 1 files changed, 11 deletions(-) Index: llvm/include/llvm/PassManagers.h diff -u llvm/include/llvm/PassManagers.h:1.11 llvm/include/llvm/PassManagers.h:1.12 --- llvm/include/llvm/PassManagers.h:1.11 Mon Mar 5 14:01:30 2007 +++ llvm/include/llvm/PassManagers.h Mon Mar 5 16:57:49 2007 @@ -222,7 +222,6 @@ /// Initialize available analysis information. void initializeAnalysisInfo() { - TransferLastUses.clear(); AvailableAnalysis.clear(); } @@ -255,10 +254,6 @@ void dumpAnalysisSetInfo(const char *Msg, Pass *P, const std::vector &Set) const; - std::vector& getTransferredLastUses() { - return TransferLastUses; - } - virtual unsigned getNumContainedPasses() { return PassVector.size(); } @@ -269,12 +264,6 @@ } protected: - // If a FunctionPass F is the last user of ModulePass info M - // then the F's manager, not F, records itself as a last user of M. - // Current pass manage is requesting parent manager to record parent - // manager as the last user of these TrransferLastUses passes. - std::vector TransferLastUses; - // Top level manager. PMTopLevelManager *TPM; From reid at x10sys.com Mon Mar 5 17:06:49 2007 From: reid at x10sys.com (Reid Spencer) Date: Mon, 5 Mar 2007 17:06:49 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/Value.h Message-ID: <200703052306.l25N6nT1003786@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm: Value.h updated: 1.98 -> 1.99 --- Log message: Document the use of getValueType() more accurately, specifically explain that the instruction opcode is added to the InstructionVal value and the consequences of that. --- Diffs of the changes: (+6 -4) Value.h | 10 ++++++---- 1 files changed, 6 insertions(+), 4 deletions(-) Index: llvm/include/llvm/Value.h diff -u llvm/include/llvm/Value.h:1.98 llvm/include/llvm/Value.h:1.99 --- llvm/include/llvm/Value.h:1.98 Thu Feb 15 12:53:54 2007 +++ llvm/include/llvm/Value.h Mon Mar 5 17:06:32 2007 @@ -181,10 +181,12 @@ /// getValueType - Return an ID for the concrete type of this object. This is /// used to implement the classof checks. This should not be used for any /// other purpose, as the values may change as LLVM evolves. Also, note that - /// starting with the InstructionVal value, the value stored is actually the - /// Instruction opcode, so there are more than just these values possible here - /// (and Instruction must be last). - /// + /// for instructions, the Instruction's opcode is added to InstructionVal. So + /// this means three things: + /// # there is no value with code InstructionVal (no opcode==0). + /// # there are more possible values for the value type than in ValueTy enum. + /// # the InstructionVal enumerator must be the highest valued enumerator in + /// the ValueTy enum. unsigned getValueType() const { return SubclassID; } From isanbard at gmail.com Mon Mar 5 17:10:05 2007 From: isanbard at gmail.com (Bill Wendling) Date: Mon, 5 Mar 2007 17:10:05 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/IntrinsicsX86.td Message-ID: <200703052310.l25NA5Yp003905@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm: IntrinsicsX86.td updated: 1.31 -> 1.32 --- Log message: Add the emms intrinsic for MMX support. --- Diffs of the changes: (+9 -0) IntrinsicsX86.td | 9 +++++++++ 1 files changed, 9 insertions(+) Index: llvm/include/llvm/IntrinsicsX86.td diff -u llvm/include/llvm/IntrinsicsX86.td:1.31 llvm/include/llvm/IntrinsicsX86.td:1.32 --- llvm/include/llvm/IntrinsicsX86.td:1.31 Sun Dec 31 16:24:55 2006 +++ llvm/include/llvm/IntrinsicsX86.td Mon Mar 5 17:09:45 2007 @@ -535,3 +535,12 @@ Intrinsic<[llvm_void_ty, llvm_i32_ty, llvm_i32_ty], [IntrWriteMem]>; } + +//===----------------------------------------------------------------------===// +// MMX + +// Empty MMX state op. +let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". + def int_x86_mmx_emms : GCCBuiltin<"__builtin_ia32_emms">, + Intrinsic<[llvm_void_ty], [IntrWriteMem]>; +} From isanbard at gmail.com Mon Mar 5 17:10:07 2007 From: isanbard at gmail.com (Bill Wendling) Date: Mon, 5 Mar 2007 17:10:07 -0600 Subject: [llvm-commits] CVS: llvm/test/CodeGen/X86/mmx-emms.ll Message-ID: <200703052310.l25NA77B003910@zion.cs.uiuc.edu> Changes in directory llvm/test/CodeGen/X86: mmx-emms.ll added (r1.1) --- Log message: Add the emms intrinsic for MMX support. --- Diffs of the changes: (+11 -0) mmx-emms.ll | 11 +++++++++++ 1 files changed, 11 insertions(+) Index: llvm/test/CodeGen/X86/mmx-emms.ll diff -c /dev/null llvm/test/CodeGen/X86/mmx-emms.ll:1.1 *** /dev/null Mon Mar 5 17:09:55 2007 --- llvm/test/CodeGen/X86/mmx-emms.ll Mon Mar 5 17:09:45 2007 *************** *** 0 **** --- 1,11 ---- + ; RUN: llvm-as < %s | llc -march=x86 -mattr=+mmx | grep emms + define void @foo() { + entry: + call void @llvm.x86.mmx.emms( ) + br label %return + + return: ; preds = %entry + ret void + } + + declare void @llvm.x86.mmx.emms() From isanbard at gmail.com Mon Mar 5 17:10:07 2007 From: isanbard at gmail.com (Bill Wendling) Date: Mon, 5 Mar 2007 17:10:07 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86InstrMMX.td Message-ID: <200703052310.l25NA7tl003915@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: X86InstrMMX.td updated: 1.13 -> 1.14 --- Log message: Add the emms intrinsic for MMX support. --- Diffs of the changes: (+4 -1) X86InstrMMX.td | 5 ++++- 1 files changed, 4 insertions(+), 1 deletion(-) Index: llvm/lib/Target/X86/X86InstrMMX.td diff -u llvm/lib/Target/X86/X86InstrMMX.td:1.13 llvm/lib/Target/X86/X86InstrMMX.td:1.14 --- llvm/lib/Target/X86/X86InstrMMX.td:1.13 Tue Jul 18 19:27:29 2006 +++ llvm/lib/Target/X86/X86InstrMMX.td Mon Mar 5 17:09:45 2007 @@ -33,6 +33,10 @@ def : Pat<(v4i16 (undef)), (IMPLICIT_DEF_VR64)>, Requires<[HasMMX]>; def : Pat<(v2i32 (undef)), (IMPLICIT_DEF_VR64)>, Requires<[HasMMX]>; +// EMMS +def EMMS : I<0x77, RawFrm, (ops), "emms", [(int_x86_mmx_emms)]>, TB, + Requires<[HasMMX]>; + // Move Instructions def MOVD64rr : I<0x6E, MRMSrcReg, (ops VR64:$dst, GR32:$src), "movd {$src, $dst|$dst, $src}", []>, TB, @@ -94,4 +98,3 @@ def MASKMOVQ : I<0xF7, MRMDestMem, (ops VR64:$src, VR64:$mask), "maskmovq {$mask, $src|$src, $mask}", []>, TB, Requires<[HasMMX]>; - From rspencer at reidspencer.com Mon Mar 5 17:10:20 2007 From: rspencer at reidspencer.com (Reid Spencer) Date: Mon, 05 Mar 2007 15:10:20 -0800 Subject: [llvm-commits] Bug In InstCombine? In-Reply-To: References: <1173130771.24497.95.camel@bashful.x10sys.com> Message-ID: <1173136220.24497.130.camel@bashful.x10sys.com> On Mon, 2007-03-05 at 14:51 -0800, Chris Lattner wrote: > Interesting case. the full code looks like this: > > if (!STO->isNullValue() && !STO->isNullValue()) { > uint64_t TVA = STO->getZExtValue(), FVA = SFO->getZExtValue > (); > if (isPowerOf2_64(TVA) && isPowerOf2_64(FVA)) { > > The isPowerOf2_64 calls check that the argument is not zero. As > such, you can drop the isNullValue checks entirely. Yup! Even better. Thanks, Reid. From reid at x10sys.com Mon Mar 5 17:36:30 2007 From: reid at x10sys.com (Reid Spencer) Date: Mon, 5 Mar 2007 17:36:30 -0600 Subject: [llvm-commits] CVS: llvm/lib/Transforms/Scalar/InstructionCombining.cpp Message-ID: <200703052336.l25NaUQU004366@zion.cs.uiuc.edu> Changes in directory llvm/lib/Transforms/Scalar: InstructionCombining.cpp updated: 1.647 -> 1.648 --- Log message: Remove an unnecessary if statement and adjust indentation. --- Diffs of the changes: (+20 -22) InstructionCombining.cpp | 42 ++++++++++++++++++++---------------------- 1 files changed, 20 insertions(+), 22 deletions(-) Index: llvm/lib/Transforms/Scalar/InstructionCombining.cpp diff -u llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.647 llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.648 --- llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.647 Sun Mar 4 18:11:19 2007 +++ llvm/lib/Transforms/Scalar/InstructionCombining.cpp Mon Mar 5 17:36:13 2007 @@ -2407,31 +2407,29 @@ // udiv X, (Select Cond, C1, C2) --> Select Cond, (shr X, C1), (shr X, C2) // where C1&C2 are powers of two. - if (SelectInst *SI = dyn_cast(Op1)) { + if (SelectInst *SI = dyn_cast(Op1)) if (ConstantInt *STO = dyn_cast(SI->getOperand(1))) - if (ConstantInt *SFO = dyn_cast(SI->getOperand(2))) - if (!STO->isNullValue() && !STO->isNullValue()) { - uint64_t TVA = STO->getZExtValue(), FVA = SFO->getZExtValue(); - if (isPowerOf2_64(TVA) && isPowerOf2_64(FVA)) { - // Compute the shift amounts - unsigned TSA = Log2_64(TVA), FSA = Log2_64(FVA); - // Construct the "on true" case of the select - Constant *TC = ConstantInt::get(Op0->getType(), TSA); - Instruction *TSI = BinaryOperator::createLShr( - Op0, TC, SI->getName()+".t"); - TSI = InsertNewInstBefore(TSI, I); - - // Construct the "on false" case of the select - Constant *FC = ConstantInt::get(Op0->getType(), FSA); - Instruction *FSI = BinaryOperator::createLShr( - Op0, FC, SI->getName()+".f"); - FSI = InsertNewInstBefore(FSI, I); + if (ConstantInt *SFO = dyn_cast(SI->getOperand(2))) { + uint64_t TVA = STO->getZExtValue(), FVA = SFO->getZExtValue(); + if (isPowerOf2_64(TVA) && isPowerOf2_64(FVA)) { + // Compute the shift amounts + unsigned TSA = Log2_64(TVA), FSA = Log2_64(FVA); + // Construct the "on true" case of the select + Constant *TC = ConstantInt::get(Op0->getType(), TSA); + Instruction *TSI = BinaryOperator::createLShr( + Op0, TC, SI->getName()+".t"); + TSI = InsertNewInstBefore(TSI, I); + + // Construct the "on false" case of the select + Constant *FC = ConstantInt::get(Op0->getType(), FSA); + Instruction *FSI = BinaryOperator::createLShr( + Op0, FC, SI->getName()+".f"); + FSI = InsertNewInstBefore(FSI, I); - // construct the select instruction and return it. - return new SelectInst(SI->getOperand(0), TSI, FSI, SI->getName()); - } + // construct the select instruction and return it. + return new SelectInst(SI->getOperand(0), TSI, FSI, SI->getName()); } - } + } return 0; } From dpatel at apple.com Mon Mar 5 18:42:35 2007 From: dpatel at apple.com (dpatel at apple.com) Date: Mon, 5 Mar 2007 16:42:35 -0800 (PST) Subject: [llvm-commits] [124572] Handle -mllvm. Message-ID: <20070306004235.53B0B80B17A6@src> Revision: 124572 Author: dpatel Date: 2007-03-05 16:42:33 -0800 (Mon, 05 Mar 2007) Log Message: ----------- Handle -mllvm. Modified Paths: -------------- apple-local/branches/llvm/gcc/config/darwin.h apple-local/branches/llvm/gcc/gcc.c Modified: apple-local/branches/llvm/gcc/config/darwin.h =================================================================== --- apple-local/branches/llvm/gcc/config/darwin.h 2007-03-05 22:40:18 UTC (rev 124571) +++ apple-local/branches/llvm/gcc/config/darwin.h 2007-03-06 00:42:33 UTC (rev 124572) @@ -156,6 +156,8 @@ { "-image_base", "-Zimage_base" }, \ { "-init", "-Zinit" }, \ { "-install_name", "-Zinstall_name" }, \ + /* APPLE LOCAL llvm */ \ + { "-mllvm", "-Zmllvm" }, \ /* APPLE LOCAL mainline */ \ { "-mkernel", "-mkernel -static -Wa,-static" }, \ { "-multiply_defined_unused", "-Zmultiplydefinedunused" }, \ @@ -305,6 +307,8 @@ !strcmp (STR, "Zimage_base") ? 1 : \ !strcmp (STR, "Zinit") ? 1 : \ !strcmp (STR, "Zinstall_name") ? 1 : \ + /* APPLE LOCAL llvm */ \ + !strcmp (STR, "Zmllvm") ? 1 : \ !strcmp (STR, "Zmultiplydefinedunused") ? 1 : \ !strcmp (STR, "Zmultiply_defined") ? 1 : \ !strcmp (STR, "precomp-trustfile") ? 1 : \ Modified: apple-local/branches/llvm/gcc/gcc.c =================================================================== --- apple-local/branches/llvm/gcc/gcc.c 2007-03-05 22:40:18 UTC (rev 124571) +++ apple-local/branches/llvm/gcc/gcc.c 2007-03-06 00:42:33 UTC (rev 124572) @@ -829,7 +829,8 @@ %{fastcp:-O3}" /* APPLE LOCAL end -fast */ "%{pg:%{fomit-frame-pointer:%e-pg and -fomit-frame-pointer are incompatible}}\ - %1 %{!Q:-quiet} -dumpbase %B %{d*} %{m*} %{a*}\ +"/* APPLE LOCAL llvm */"\ + %1 %{!Q:-quiet} -dumpbase %B %{d*} %{Zmllvm*: -mllvm %*} %{m*} %{a*}\ %{c|S:%{o*:-auxbase-strip %*}%{!o*:-auxbase %b}}%{!c:%{!S:-auxbase %b}}\ %{g*} %{O*} %{W*&pedantic*} %{w} %{std*&ansi&trigraphs}\ %{v:-version} %{pg:-p} %{p} %{f*} %{undef}\ From sabre at nondot.org Mon Mar 5 19:00:16 2007 From: sabre at nondot.org (Chris Lattner) Date: Mon, 5 Mar 2007 19:00:16 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCCallingConv.td Makefile PPC.td PPCISelLowering.cpp Message-ID: <200703060100.l2610GAr005887@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/PowerPC: PPCCallingConv.td added (r1.1) Makefile updated: 1.23 -> 1.24 PPC.td updated: 1.19 -> 1.20 PPCISelLowering.cpp updated: 1.259 -> 1.260 --- Log message: Switch PPC return lower to use an autogenerated CC description. --- Diffs of the changes: (+103 -41) Makefile | 3 +- PPC.td | 6 ++++ PPCCallingConv.td | 65 ++++++++++++++++++++++++++++++++++++++++++++++++ PPCISelLowering.cpp | 70 ++++++++++++++++++++++------------------------------ 4 files changed, 103 insertions(+), 41 deletions(-) Index: llvm/lib/Target/PowerPC/PPCCallingConv.td diff -c /dev/null llvm/lib/Target/PowerPC/PPCCallingConv.td:1.1 *** /dev/null Mon Mar 5 19:00:09 2007 --- llvm/lib/Target/PowerPC/PPCCallingConv.td Mon Mar 5 18:59:59 2007 *************** *** 0 **** --- 1,65 ---- + //===- PPCCallingConv.td - Calling Conventions for PowerPC ------*- C++ -*-===// + // + // The LLVM Compiler Infrastructure + // + // This file was developed by Chris Lattner and is distributed under + // the University of Illinois Open Source License. See LICENSE.TXT for details. + // + //===----------------------------------------------------------------------===// + // + // This describes the calling conventions for the PowerPC 32- and 64-bit + // architectures. + // + //===----------------------------------------------------------------------===// + + /// CCIfSubtarget - Match if the current subtarget has a feature F. + class CCIfSubtarget + : CCIf().", F), A>; + + //===----------------------------------------------------------------------===// + // Return Value Calling Convention + //===----------------------------------------------------------------------===// + + // Return-value convention for PowerPC + def RetCC_PPC : CallingConv<[ + CCIfType<[i32], CCAssignToReg<[R3, R4]>>, + CCIfType<[i64], CCAssignToReg<[X3, X4]>>, + + CCIfType<[f32, f64], CCAssignToReg<[F1]>>, + + // Vector types are always returned in V2. + CCIfType<[v16i8, v8i16, v4i32, v4f32], CCAssignToReg<[V2]>> + ]>; + + + //===----------------------------------------------------------------------===// + // PowerPC Argument Calling Conventions + //===----------------------------------------------------------------------===// + /* + def CC_PPC : CallingConv<[ + // The first 8 integer arguments are passed in integer registers. + CCIfType<[i32], CCAssignToReg<[R3, R4, R5, R6, R7, R8, R9, R10]>>, + CCIfType<[i64], CCAssignToReg<[X3, X4, X5, X6, X7, X8, X9, X10]>>, + + // Darwin passes FP values in F1 - F13 + CCIfType<[f32, f64], CCIfSubtarget<"isMachoABI()", + CCAssignToReg<[F1, F2, F3, F4, F5, F6, F7, F8,F9,F10,F11,F12,F13]>>>, + // Other sub-targets pass FP values in F1-10. + CCIfType<[f32, f64], CCAssignToReg<[F1, F2, F3, F4, F5, F6, F7, F8, F9,F10]>>, + + // The first 12 Vector arguments are passed in altivec registers. + CCIfType<[v16i8, v8i16, v4i32, v4f32], + CCAssignToReg<[V2, V3, V4, V5, V6, V7, V8, V9, V10,V11,V12,V13]>> + + /* + // Integer/FP values get stored in stack slots that are 8 bytes in size and + // 8-byte aligned if there are no more registers to hold them. + CCIfType<[i32, i64, f32, f64], CCAssignToStack<8, 8>>, + + // Vectors get 16-byte stack slots that are 16-byte aligned. + CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64], + CCAssignToStack<16, 16>>*/ + ]>; + + */ + Index: llvm/lib/Target/PowerPC/Makefile diff -u llvm/lib/Target/PowerPC/Makefile:1.23 llvm/lib/Target/PowerPC/Makefile:1.24 --- llvm/lib/Target/PowerPC/Makefile:1.23 Fri Oct 27 19:49:54 2006 +++ llvm/lib/Target/PowerPC/Makefile Mon Mar 5 18:59:59 2007 @@ -14,6 +14,7 @@ BUILT_SOURCES = PPCGenInstrNames.inc PPCGenRegisterNames.inc \ PPCGenAsmWriter.inc PPCGenCodeEmitter.inc \ PPCGenRegisterInfo.h.inc PPCGenRegisterInfo.inc \ - PPCGenInstrInfo.inc PPCGenDAGISel.inc PPCGenSubtarget.inc + PPCGenInstrInfo.inc PPCGenDAGISel.inc \ + PPCGenSubtarget.inc PPCGenCallingConv.inc include $(LEVEL)/Makefile.common Index: llvm/lib/Target/PowerPC/PPC.td diff -u llvm/lib/Target/PowerPC/PPC.td:1.19 llvm/lib/Target/PowerPC/PPC.td:1.20 --- llvm/lib/Target/PowerPC/PPC.td:1.19 Tue Dec 12 14:57:07 2006 +++ llvm/lib/Target/PowerPC/PPC.td Mon Mar 5 18:59:59 2007 @@ -89,6 +89,12 @@ Feature64Bit /*, Feature64BitRegs */]>; +//===----------------------------------------------------------------------===// +// Calling Conventions +//===----------------------------------------------------------------------===// + +include "PPCCallingConv.td" + def PPCInstrInfo : InstrInfo { // Define how we want to layout our TargetSpecific information field... This // should be kept up-to-date with the fields in the PPCInstrInfo.h file. Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.259 llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.260 --- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.259 Thu Mar 1 07:11:38 2007 +++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp Mon Mar 5 18:59:59 2007 @@ -18,6 +18,7 @@ #include "PPCPerfectShuffle.h" #include "llvm/ADT/VectorExtras.h" #include "llvm/Analysis/ScalarEvolutionExpressions.h" +#include "llvm/CodeGen/CallingConvLower.h" #include "llvm/CodeGen/MachineFrameInfo.h" #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineInstrBuilder.h" @@ -1096,6 +1097,8 @@ SV->getOffset()); } +#include "PPCGenCallingConv.inc" + /// GetFPR - Get the set of FP registers that should be allocated for arguments, /// depending on which subtarget is selected. static const unsigned *GetFPR(const PPCSubtarget &Subtarget) { @@ -1626,47 +1629,34 @@ return Res.getValue(Op.ResNo); } -static SDOperand LowerRET(SDOperand Op, SelectionDAG &DAG) { - SDOperand Chain = Op.getOperand(0); - switch(Op.getNumOperands()) { - default: - assert(0 && "Do not know how to return this many arguments!"); - abort(); - case 1: - return DAG.getNode(PPCISD::RET_FLAG, MVT::Other, Chain); - case 3: { - MVT::ValueType ArgVT = Op.getOperand(1).getValueType(); - unsigned ArgReg; - if (ArgVT == MVT::i32) { - ArgReg = PPC::R3; - } else if (ArgVT == MVT::i64) { - ArgReg = PPC::X3; - } else if (MVT::isVector(ArgVT)) { - ArgReg = PPC::V2; - } else { - assert(MVT::isFloatingPoint(ArgVT)); - ArgReg = PPC::F1; - } - - Chain = DAG.getCopyToReg(Chain, ArgReg, Op.getOperand(1), SDOperand()); - - // If we haven't noted the R3/F1 are live out, do so now. - if (DAG.getMachineFunction().liveout_empty()) - DAG.getMachineFunction().addLiveOut(ArgReg); - break; +static SDOperand LowerRET(SDOperand Op, SelectionDAG &DAG, TargetMachine &TM) { + SmallVector RVLocs; + unsigned CC = DAG.getMachineFunction().getFunction()->getCallingConv(); + CCState CCInfo(CC, TM, RVLocs); + CCInfo.AnalyzeReturn(Op.Val, RetCC_PPC); + + // If this is the first return lowered for this function, add the regs to the + // liveout set for the function. + if (DAG.getMachineFunction().liveout_empty()) { + for (unsigned i = 0; i != RVLocs.size(); ++i) + DAG.getMachineFunction().addLiveOut(RVLocs[i].getLocReg()); } - case 5: - Chain = DAG.getCopyToReg(Chain, PPC::R3, Op.getOperand(3), SDOperand()); - Chain = DAG.getCopyToReg(Chain, PPC::R4, Op.getOperand(1), - Chain.getValue(1)); - // If we haven't noted the R3+R4 are live out, do so now. - if (DAG.getMachineFunction().liveout_empty()) { - DAG.getMachineFunction().addLiveOut(PPC::R3); - DAG.getMachineFunction().addLiveOut(PPC::R4); - } - break; + + SDOperand Chain = Op.getOperand(0); + SDOperand Flag; + + // Copy the result values into the output registers. + for (unsigned i = 0; i != RVLocs.size(); ++i) { + CCValAssign &VA = RVLocs[i]; + assert(VA.isRegLoc() && "Can only return in registers!"); + Chain = DAG.getCopyToReg(Chain, VA.getLocReg(), Op.getOperand(i*2+1), Flag); + Flag = Chain.getValue(1); } - return DAG.getNode(PPCISD::RET_FLAG, MVT::Other, Chain, Chain.getValue(1)); + + if (Flag.Val) + return DAG.getNode(PPCISD::RET_FLAG, MVT::Other, Chain, Flag); + else + return DAG.getNode(PPCISD::RET_FLAG, MVT::Other, Chain); } static SDOperand LowerSTACKRESTORE(SDOperand Op, SelectionDAG &DAG, @@ -2677,7 +2667,7 @@ case ISD::FORMAL_ARGUMENTS: return LowerFORMAL_ARGUMENTS(Op, DAG, VarArgsFrameIndex, PPCSubTarget); case ISD::CALL: return LowerCALL(Op, DAG, PPCSubTarget); - case ISD::RET: return LowerRET(Op, DAG); + case ISD::RET: return LowerRET(Op, DAG, getTargetMachine()); case ISD::STACKRESTORE: return LowerSTACKRESTORE(Op, DAG, PPCSubTarget); case ISD::DYNAMIC_STACKALLOC: return LowerDYNAMIC_STACKALLOC(Op, DAG, PPCSubTarget); From dpatel at apple.com Mon Mar 5 19:06:38 2007 From: dpatel at apple.com (Devang Patel) Date: Mon, 5 Mar 2007 19:06:38 -0600 Subject: [llvm-commits] CVS: llvm/lib/VMCore/PassManager.cpp Message-ID: <200703060106.l2616cwG006029@zion.cs.uiuc.edu> Changes in directory llvm/lib/VMCore: PassManager.cpp updated: 1.142 -> 1.143 --- Log message: Add preparePassManager() hook. This allows each pass to check whether current active pass manager is appropriate or not. A loop pass may consider current LPPassManager in appropraite if loop pass is not preserving analysis information that is used by other passes managed by current LPPassManager. In such situation, loop pass can pop current LPPassManager from the PMStack using this hook and use new LPPassManager for itself. --- Diffs of the changes: (+3 -0) PassManager.cpp | 3 +++ 1 files changed, 3 insertions(+) Index: llvm/lib/VMCore/PassManager.cpp diff -u llvm/lib/VMCore/PassManager.cpp:1.142 llvm/lib/VMCore/PassManager.cpp:1.143 --- llvm/lib/VMCore/PassManager.cpp:1.142 Mon Mar 5 16:57:49 2007 +++ llvm/lib/VMCore/PassManager.cpp Mon Mar 5 19:06:16 2007 @@ -385,6 +385,9 @@ if (findAnalysisPass(P->getPassInfo())) return; + // Give pass a chance to prepare the stage. + P->preparePassManager(activeStack); + AnalysisUsage AnUsage; P->getAnalysisUsage(AnUsage); const std::vector &RequiredSet = AnUsage.getRequiredSet(); From dpatel at apple.com Mon Mar 5 19:06:38 2007 From: dpatel at apple.com (Devang Patel) Date: Mon, 5 Mar 2007 19:06:38 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/Pass.h Message-ID: <200703060106.l2616cb8006032@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm: Pass.h updated: 1.79 -> 1.80 --- Log message: Add preparePassManager() hook. This allows each pass to check whether current active pass manager is appropriate or not. A loop pass may consider current LPPassManager in appropraite if loop pass is not preserving analysis information that is used by other passes managed by current LPPassManager. In such situation, loop pass can pop current LPPassManager from the PMStack using this hook and use new LPPassManager for itself. --- Diffs of the changes: (+5 -0) Pass.h | 5 +++++ 1 files changed, 5 insertions(+) Index: llvm/include/llvm/Pass.h diff -u llvm/include/llvm/Pass.h:1.79 llvm/include/llvm/Pass.h:1.80 --- llvm/include/llvm/Pass.h:1.79 Thu Jan 25 18:23:00 2007 +++ llvm/include/llvm/Pass.h Mon Mar 5 19:06:16 2007 @@ -119,8 +119,13 @@ void print(std::ostream *O, const Module *M) const { if (O) print(*O, M); } void dump() const; // dump - call print(std::cerr, 0); + /// Each pass is responsible for assigning a pass manager to itself. + /// PMS is the stack of available pass manager. virtual void assignPassManager(PMStack &PMS, PassManagerType T = PMT_Unknown) {} + /// Check if available pass managers are suitable for this pass or not. + virtual void preparePassManager(PMStack &PMS) {} + // Access AnalysisResolver inline void setResolver(AnalysisResolver *AR) { Resolver = AR; } inline AnalysisResolver *getResolver() { return Resolver; } From clattner at apple.com Mon Mar 5 19:07:11 2007 From: clattner at apple.com (clattner at apple.com) Date: Mon, 5 Mar 2007 17:07:11 -0800 (PST) Subject: [llvm-commits] [124573] Fix http://llvm.org/bugs/show_bug.cgi?id=1242, by emitting a more-complete Message-ID: <20070306010711.DDC9380CE0CF@src> Revision: 124573 Author: clattner Date: 2007-03-05 17:07:09 -0800 (Mon, 05 Mar 2007) Log Message: ----------- Fix http://llvm.org/bugs/show_bug.cgi?id=1242, by emitting a more-complete target data string. On darwin, we now emit: target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" instead of: target datalayout = "E-p:32:32" Modified Paths: -------------- apple-local/branches/llvm/gcc/llvm-backend.cpp Modified: apple-local/branches/llvm/gcc/llvm-backend.cpp =================================================================== --- apple-local/branches/llvm/gcc/llvm-backend.cpp 2007-03-06 00:42:33 UTC (rev 124572) +++ apple-local/branches/llvm/gcc/llvm-backend.cpp 2007-03-06 01:07:09 UTC (rev 124573) @@ -140,11 +140,6 @@ #endif TheModule->setTargetTriple(TargetTriple); - std::string DataLayout; - DataLayout.append(BITS_BIG_ENDIAN ? "E" : "e"); - DataLayout.append(POINTER_SIZE == 32 ? "-p:32:32" : "-p:64:64"); - TheModule->setDataLayout(DataLayout); - TheTypeConverter = new TypeConverter(); // Create the TargetMachine we will be generating code with. @@ -156,7 +151,7 @@ cerr << "Did not get a target machine!\n"; exit(1); } - + // Figure out the subtarget feature string we pass to the target. std::string FeatureStr; // The target can set LLVM_SET_SUBTARGET_FEATURES to configure the LLVM @@ -168,6 +163,11 @@ #endif TheTarget = TME->CtorFn(*TheModule, FeatureStr); + // Install information about target datalayout stuff into the module for + // optimizer use. + TheModule->setDataLayout(TheTarget->getTargetData()-> + getStringRepresentation()); + if (optimize) { RegisterScheduler::setDefault(createDefaultScheduler); } else { From dpatel at apple.com Mon Mar 5 19:56:07 2007 From: dpatel at apple.com (Devang Patel) Date: Mon, 5 Mar 2007 19:56:07 -0600 Subject: [llvm-commits] CVS: llvm/lib/VMCore/PassManager.cpp Message-ID: <200703060156.l261u74b006953@zion.cs.uiuc.edu> Changes in directory llvm/lib/VMCore: PassManager.cpp updated: 1.143 -> 1.144 --- Log message: Keep track of inherited analysis. For example, if a loop pass does not preserve dominator info then it should update parent FPPassManager's available analysis info to reflect this. --- Diffs of the changes: (+21 -0) PassManager.cpp | 21 +++++++++++++++++++++ 1 files changed, 21 insertions(+) Index: llvm/lib/VMCore/PassManager.cpp diff -u llvm/lib/VMCore/PassManager.cpp:1.143 llvm/lib/VMCore/PassManager.cpp:1.144 --- llvm/lib/VMCore/PassManager.cpp:1.143 Mon Mar 5 19:06:16 2007 +++ llvm/lib/VMCore/PassManager.cpp Mon Mar 5 19:55:46 2007 @@ -551,6 +551,27 @@ AvailableAnalysis.erase(Info); } } + + // Check inherited analysis also. If P is not preserving analysis + // provided by parent manager then remove it here. + for (unsigned Index = 0; Index < PMT_Last; ++Index) { + + if (!InheritedAnalysis[Index]) + continue; + + for (std::map::iterator + I = InheritedAnalysis[Index]->begin(), + E = InheritedAnalysis[Index]->end(); I != E; ) { + std::map::iterator Info = I++; + if (std::find(PreservedSet.begin(), PreservedSet.end(), Info->first) == + PreservedSet.end()) { + // Remove this analysis + if (!dynamic_cast(Info->second)) + InheritedAnalysis[Index]->erase(Info); + } + } + } + } /// Remove analysis passes that are not used any longer From dpatel at apple.com Mon Mar 5 19:56:07 2007 From: dpatel at apple.com (Devang Patel) Date: Mon, 5 Mar 2007 19:56:07 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/Pass.h PassManagers.h Message-ID: <200703060156.l261u7SO006960@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm: Pass.h updated: 1.80 -> 1.81 PassManagers.h updated: 1.12 -> 1.13 --- Log message: Keep track of inherited analysis. For example, if a loop pass does not preserve dominator info then it should update parent FPPassManager's available analysis info to reflect this. --- Diffs of the changes: (+23 -1) Pass.h | 3 ++- PassManagers.h | 21 +++++++++++++++++++++ 2 files changed, 23 insertions(+), 1 deletion(-) Index: llvm/include/llvm/Pass.h diff -u llvm/include/llvm/Pass.h:1.80 llvm/include/llvm/Pass.h:1.81 --- llvm/include/llvm/Pass.h:1.80 Mon Mar 5 19:06:16 2007 +++ llvm/include/llvm/Pass.h Mon Mar 5 19:55:46 2007 @@ -64,7 +64,8 @@ PMT_CallGraphPassManager, /// CGPassManager PMT_FunctionPassManager, /// FPPassManager PMT_LoopPassManager, /// LPPassManager - PMT_BasicBlockPassManager /// BBPassManager + PMT_BasicBlockPassManager, /// BBPassManager + PMT_Last }; typedef enum PassManagerType PassManagerType; Index: llvm/include/llvm/PassManagers.h diff -u llvm/include/llvm/PassManagers.h:1.12 llvm/include/llvm/PassManagers.h:1.13 --- llvm/include/llvm/PassManagers.h:1.12 Mon Mar 5 16:57:49 2007 +++ llvm/include/llvm/PassManagers.h Mon Mar 5 19:55:46 2007 @@ -197,6 +197,7 @@ /// used by pass managers. class PMDataManager { public: + PMDataManager(int Depth) : TPM(NULL), Depth(Depth) { initializeAnalysisInfo(); } @@ -223,6 +224,8 @@ /// Initialize available analysis information. void initializeAnalysisInfo() { AvailableAnalysis.clear(); + for (unsigned i = 0; i < PMT_Last; ++i) + InheritedAnalysis[i] = NULL; } /// Populate RequiredPasses with the analysis pass that are required by @@ -262,6 +265,19 @@ assert ( 0 && "Invalid use of getPassManagerType"); return PMT_Unknown; } + + std::map *getAvailableAnalysis() { + return &AvailableAnalysis; + } + + // Collect AvailableAnalysis from all the active Pass Managers. + void populateInheritedAnalysis(PMStack &PMS) { + unsigned Index = 0; + for (PMStack::iterator I = PMS.begin(), E = PMS.end(); + I != E; ++I) + InheritedAnalysis[Index++] = (*I)->getAvailableAnalysis(); + } + protected: // Top level manager. @@ -270,6 +286,11 @@ // Collection of pass that are managed by this manager std::vector PassVector; + // Collection of Analysis provided by Parent pass manager and + // used by current pass manager. At at time there can not be more + // then PMT_Last active pass mangers. + std::map *InheritedAnalysis[PMT_Last]; + private: // Set of available Analysis. This information is used while scheduling // pass. If a pass requires an analysis which is not not available then From dpatel at apple.com Mon Mar 5 20:31:06 2007 From: dpatel at apple.com (Devang Patel) Date: Mon, 5 Mar 2007 20:31:06 -0600 Subject: [llvm-commits] CVS: llvm/lib/Analysis/LoopPass.cpp Message-ID: <200703060231.l262V6gq007700@zion.cs.uiuc.edu> Changes in directory llvm/lib/Analysis: LoopPass.cpp updated: 1.9 -> 1.10 --- Log message: Use std::deque to manage loop queue inside LPPassManager. --- Diffs of the changes: (+6 -40) LoopPass.cpp | 46 ++++++---------------------------------------- 1 files changed, 6 insertions(+), 40 deletions(-) Index: llvm/lib/Analysis/LoopPass.cpp diff -u llvm/lib/Analysis/LoopPass.cpp:1.9 llvm/lib/Analysis/LoopPass.cpp:1.10 --- llvm/lib/Analysis/LoopPass.cpp:1.9 Mon Mar 5 14:01:30 2007 +++ llvm/lib/Analysis/LoopPass.cpp Mon Mar 5 20:30:46 2007 @@ -14,38 +14,9 @@ //===----------------------------------------------------------------------===// #include "llvm/Analysis/LoopPass.h" -#include using namespace llvm; //===----------------------------------------------------------------------===// -// LoopQueue - -namespace llvm { - -// Compare Two loops based on their depth in loop nest. -class LoopCompare { -public: - bool operator()( Loop *L1, Loop *L2) const { - // Loops with highest depth has the highest priority. - return L1->getLoopDepth() < L2->getLoopDepth(); - } -}; - -// Loop queue used by Loop Pass Manager. This is a wrapper class -// that hides implemenation detail (use of priority_queue) inside .cpp file. -class LoopQueue { -public: - inline void push(Loop *L) { LPQ.push(L); } - inline void pop() { LPQ.pop(); } - inline Loop *top() { return LPQ.top(); } - inline bool empty() { return LPQ.empty(); } -private: - std::priority_queue, LoopCompare> LPQ; -}; - -} // End of LLVM namespace - -//===----------------------------------------------------------------------===// // LPPassManager // /// LPPassManager manages FPPassManagers and CalLGraphSCCPasses. @@ -53,11 +24,6 @@ LPPassManager::LPPassManager(int Depth) : PMDataManager(Depth) { skipThisLoop = false; redoThisLoop = false; - LQ = new LoopQueue(); -} - -LPPassManager::~LPPassManager() { - delete LQ; } /// Delete loop from the loop queue. This is used by Loop pass to inform @@ -75,10 +41,10 @@ } // Recurse through all subloops and all loops into LQ. -static void addLoopIntoQueue(Loop *L, LoopQueue *LQ) { +static void addLoopIntoQueue(Loop *L, std::deque &LQ) { for (Loop::iterator I = L->begin(), E = L->end(); I != E; ++I) addLoopIntoQueue(*I, LQ); - LQ->push(L); + LQ.push_back(L); } /// run - Execute all of the passes scheduled for execution. Keep track of @@ -92,9 +58,9 @@ addLoopIntoQueue(*I, LQ); // Walk Loops - while (!LQ->empty()) { + while (!LQ.empty()) { - Loop *L = LQ->top(); + Loop *L = LQ.back(); skipThisLoop = false; redoThisLoop = false; @@ -130,10 +96,10 @@ } // Pop the loop from queue after running all passes. - LQ->pop(); + LQ.pop_back(); if (redoThisLoop) - LQ->push(L); + LQ.push_back(L); } return Changed; From dpatel at apple.com Mon Mar 5 20:31:07 2007 From: dpatel at apple.com (Devang Patel) Date: Mon, 5 Mar 2007 20:31:07 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/Analysis/LoopPass.h Message-ID: <200703060231.l262V74k007705@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/Analysis: LoopPass.h updated: 1.7 -> 1.8 --- Log message: Use std::deque to manage loop queue inside LPPassManager. --- Diffs of the changes: (+1 -3) LoopPass.h | 4 +--- 1 files changed, 1 insertion(+), 3 deletions(-) Index: llvm/include/llvm/Analysis/LoopPass.h diff -u llvm/include/llvm/Analysis/LoopPass.h:1.7 llvm/include/llvm/Analysis/LoopPass.h:1.8 --- llvm/include/llvm/Analysis/LoopPass.h:1.7 Tue Feb 27 09:00:39 2007 +++ llvm/include/llvm/Analysis/LoopPass.h Mon Mar 5 20:30:46 2007 @@ -25,7 +25,6 @@ class LPPassManager; class Loop; class Function; -class LoopQueue; class LoopPass : public Pass { @@ -47,7 +46,6 @@ public: LPPassManager(int Depth); - ~LPPassManager(); /// run - Execute all of the passes scheduled for execution. Keep track of /// whether any of the passes modifies the module, and if so, return true. @@ -95,7 +93,7 @@ // utility may send LPPassManager into infinite loops so use caution. void redoLoop(Loop *L); private: - LoopQueue *LQ; + std::deque LQ; bool skipThisLoop; bool redoThisLoop; }; From reid at x10sys.com Mon Mar 5 21:00:33 2007 From: reid at x10sys.com (Reid Spencer) Date: Mon, 5 Mar 2007 21:00:33 -0600 Subject: [llvm-commits] CVS: llvm/test/CFrontend/2007-03-05-DataLayout.c Message-ID: <200703060300.l2630XOM008327@zion.cs.uiuc.edu> Changes in directory llvm/test/CFrontend: 2007-03-05-DataLayout.c added (r1.1) --- Log message: Test to ensure that data layout is generated correctly for host platform. This is for PR1242: http://llvm.org/PR1242 . --- Diffs of the changes: (+51 -0) 2007-03-05-DataLayout.c | 51 ++++++++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 51 insertions(+) Index: llvm/test/CFrontend/2007-03-05-DataLayout.c diff -c /dev/null llvm/test/CFrontend/2007-03-05-DataLayout.c:1.1 *** /dev/null Mon Mar 5 21:00:27 2007 --- llvm/test/CFrontend/2007-03-05-DataLayout.c Mon Mar 5 21:00:17 2007 *************** *** 0 **** --- 1,51 ---- + // Testcase for PR1242 + // RUN: %llvmgcc -c %s -o %t && lli --force-interpreter=1 %t + #include + #define NDIM 3 + #define BODY 01 + typedef double vector[NDIM]; + typedef struct bnode* bodyptr; + // { i16, double, [3 x double], i32, i32, [3 x double], [3 x double], [3 x + // double], double, \2 *, \2 * } + struct bnode { + short int type; + double mass; + vector pos; + int proc; + int new_proc; + vector vel; + vector acc; + vector new_acc; + double phi; + bodyptr next; + bodyptr proc_next; + } body; + + #define Type(x) ((x)->type) + #define Mass(x) ((x)->mass) + #define Pos(x) ((x)->pos) + #define Proc(x) ((x)->proc) + #define New_Proc(x) ((x)->new_proc) + #define Vel(x) ((x)->vel) + #define Acc(x) ((x)->acc) + #define New_Acc(x) ((x)->new_acc) + #define Phi(x) ((x)->phi) + #define Next(x) ((x)->next) + #define Proc_Next(x) ((x)->proc_next) + + bodyptr ubody_alloc(int p) + { + register bodyptr tmp; + tmp = (bodyptr)malloc(sizeof(body)); + + Type(tmp) = BODY; + Proc(tmp) = p; + Proc_Next(tmp) = NULL; + New_Proc(tmp) = p; + return tmp; + } + + int main(int argc, char** argv) { + bodyptr b = ubody_alloc(17); + return 0; + } From reid at x10sys.com Mon Mar 5 21:02:11 2007 From: reid at x10sys.com (Reid Spencer) Date: Mon, 5 Mar 2007 21:02:11 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/ExecutionEngine/ExecutionEngine.h GenericValue.h Message-ID: <200703060302.l2632BKl008376@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/ExecutionEngine: ExecutionEngine.h updated: 1.43 -> 1.44 GenericValue.h updated: 1.10 -> 1.11 --- Log message: Make GenericeValue into a struct with a union instead of just a union. This allows an APInt value to be constructed. Remove all the native integer types from the union. These are replaced with the single IntVal of type APInt. --- Diffs of the changes: (+16 -23) ExecutionEngine.h | 2 +- GenericValue.h | 37 +++++++++++++++---------------------- 2 files changed, 16 insertions(+), 23 deletions(-) Index: llvm/include/llvm/ExecutionEngine/ExecutionEngine.h diff -u llvm/include/llvm/ExecutionEngine/ExecutionEngine.h:1.43 llvm/include/llvm/ExecutionEngine/ExecutionEngine.h:1.44 --- llvm/include/llvm/ExecutionEngine/ExecutionEngine.h:1.43 Sat Mar 3 12:18:11 2007 +++ llvm/include/llvm/ExecutionEngine/ExecutionEngine.h Mon Mar 5 21:01:54 2007 @@ -24,7 +24,7 @@ namespace llvm { -union GenericValue; +struct GenericValue; class Constant; class Function; class GlobalVariable; Index: llvm/include/llvm/ExecutionEngine/GenericValue.h diff -u llvm/include/llvm/ExecutionEngine/GenericValue.h:1.10 llvm/include/llvm/ExecutionEngine/GenericValue.h:1.11 --- llvm/include/llvm/ExecutionEngine/GenericValue.h:1.10 Sat Mar 3 01:36:44 2007 +++ llvm/include/llvm/ExecutionEngine/GenericValue.h Mon Mar 5 21:01:54 2007 @@ -15,37 +15,30 @@ #ifndef GENERIC_VALUE_H #define GENERIC_VALUE_H +#include "llvm/ADT/APInt.h" #include "llvm/Support/DataTypes.h" namespace llvm { -typedef uintptr_t PointerTy; +typedef void* PointerTy; class APInt; -class Type; -union GenericValue { - bool Int1Val; - unsigned char Int8Val; - unsigned short Int16Val; - unsigned int Int32Val; - uint64_t Int64Val; - APInt *APIntVal; - double DoubleVal; - float FloatVal; - struct { unsigned int first; unsigned int second; } UIntPairVal; - PointerTy PointerVal; - unsigned char Untyped[8]; - - GenericValue() {} - GenericValue(void *V) { - PointerVal = (PointerTy)(intptr_t)V; - } +struct GenericValue { + union { + double DoubleVal; + float FloatVal; + PointerTy PointerVal; + struct { unsigned int first; unsigned int second; } UIntPairVal; + unsigned char Untyped[8]; + }; + APInt IntVal; + + GenericValue() : DoubleVal(0.0), IntVal(1,0) {} + GenericValue(void *V) : PointerVal(V), IntVal(1,0) { } }; inline GenericValue PTOGV(void *P) { return GenericValue(P); } -inline void* GVTOP(const GenericValue &GV) { - return (void*)(intptr_t)GV.PointerVal; -} +inline void* GVTOP(const GenericValue &GV) { return GV.PointerVal; } } // End llvm namespace #endif From reid at x10sys.com Mon Mar 5 21:04:21 2007 From: reid at x10sys.com (Reid Spencer) Date: Mon, 5 Mar 2007 21:04:21 -0600 Subject: [llvm-commits] CVS: llvm/lib/ExecutionEngine/ExecutionEngine.cpp Message-ID: <200703060304.l2634LZs008420@zion.cs.uiuc.edu> Changes in directory llvm/lib/ExecutionEngine: ExecutionEngine.cpp updated: 1.110 -> 1.111 --- Log message: Simplify things significantly because GenericValue now has a single integer field, of type APInt, instead of multiple integer fields. Also, get rid of the special endianness code in StoreValueToMemory and LoadValueToMemory. ExecutionEngine is always used to execute on the host platform so this is now unnecessary. --- Diffs of the changes: (+72 -281) ExecutionEngine.cpp | 353 ++++++++++------------------------------------------ 1 files changed, 72 insertions(+), 281 deletions(-) Index: llvm/lib/ExecutionEngine/ExecutionEngine.cpp diff -u llvm/lib/ExecutionEngine/ExecutionEngine.cpp:1.110 llvm/lib/ExecutionEngine/ExecutionEngine.cpp:1.111 --- llvm/lib/ExecutionEngine/ExecutionEngine.cpp:1.110 Sat Mar 3 12:19:18 2007 +++ llvm/lib/ExecutionEngine/ExecutionEngine.cpp Mon Mar 5 21:04:04 2007 @@ -229,7 +229,7 @@ const char * const * envp) { std::vector GVArgs; GenericValue GVArgc; - GVArgc.Int32Val = argv.size(); + GVArgc.IntVal = APInt(32, argv.size()); unsigned NumArgs = Fn->getFunctionType()->getNumParams(); if (NumArgs) { GVArgs.push_back(GVArgc); // Arg #0 = argc. @@ -245,7 +245,7 @@ } } } - return runFunction(Fn, GVArgs).Int32Val; + return runFunction(Fn, GVArgs).IntVal.getZExtValue(); } /// If possible, create a JIT, unless the caller specifically requests an @@ -298,28 +298,6 @@ return state.getGlobalAddressMap(locked)[GV]; } -/// This macro is used to handle a variety of situations involing integer -/// values where the action should be done to one of the GenericValue members. -/// THEINTTY is a const Type * for the integer type. ACTION1 comes before -/// the GenericValue, ACTION2 comes after. -#define DO_FOR_INTEGER(THEINTTY, ACTION) \ - { \ - unsigned BitWidth = cast(THEINTTY)->getBitWidth(); \ - if (BitWidth == 1) {\ - ACTION(Int1Val); \ - } else if (BitWidth <= 8) {\ - ACTION(Int8Val); \ - } else if (BitWidth <= 16) {\ - ACTION(Int16Val); \ - } else if (BitWidth <= 32) { \ - ACTION(Int32Val); \ - } else if (BitWidth <= 64) { \ - ACTION(Int64Val); \ - } else {\ - assert(0 && "Not implemented: integer types > 64 bits"); \ - } \ - } - /// This function converts a Constant* into a GenericValue. The interesting /// part is if C is a ConstantExpr. /// @brief Get a GenericValue for a Constnat* @@ -341,10 +319,8 @@ TD->getIndexedOffset(CE->getOperand(0)->getType(), &Indices[0], Indices.size()); - if (getTargetData()->getPointerSize() == 4) - Result.Int32Val += Offset; - else - Result.Int64Val += Offset; + char* tmp = (char*) Result.PointerVal; + Result = PTOGV(tmp + Offset); return Result; } case Instruction::Trunc: @@ -375,21 +351,15 @@ // IntToPtr casts are just so special. Cast to intptr_t first. Constant *Op = CE->getOperand(0); GenericValue GV = getConstantValue(Op); -#define INT_TO_PTR_ACTION(FIELD) \ - return PTOGV((void*)(uintptr_t)GV.FIELD) - DO_FOR_INTEGER(Op->getType(), INT_TO_PTR_ACTION) -#undef INT_TO_PTR_ACTION + return PTOGV((void*)(uintptr_t)GV.IntVal.getZExtValue()); break; } case Instruction::Add: switch (CE->getOperand(0)->getType()->getTypeID()) { default: assert(0 && "Bad add type!"); abort(); case Type::IntegerTyID: -#define ADD_ACTION(FIELD) \ - Result.FIELD = getConstantValue(CE->getOperand(0)).FIELD + \ - getConstantValue(CE->getOperand(1)).FIELD; - DO_FOR_INTEGER(CE->getOperand(0)->getType(),ADD_ACTION); -#undef ADD_ACTION + Result.IntVal = getConstantValue(CE->getOperand(0)).IntVal + \ + getConstantValue(CE->getOperand(1)).IntVal; break; case Type::FloatTyID: Result.FloatVal = getConstantValue(CE->getOperand(0)).FloatVal + @@ -409,28 +379,15 @@ } switch (C->getType()->getTypeID()) { -#define GET_CONST_VAL(TY, CTY, CLASS, GETMETH) \ - case Type::TY##TyID: Result.TY##Val = (CTY)cast(C)->GETMETH(); break - GET_CONST_VAL(Float , float , ConstantFP, getValue); - GET_CONST_VAL(Double, double , ConstantFP, getValue); -#undef GET_CONST_VAL - case Type::IntegerTyID: { - unsigned BitWidth = cast(C->getType())->getBitWidth(); - if (BitWidth == 1) - Result.Int1Val = (bool)cast(C)->getZExtValue(); - else if (BitWidth <= 8) - Result.Int8Val = (uint8_t )cast(C)->getZExtValue(); - else if (BitWidth <= 16) - Result.Int16Val = (uint16_t )cast(C)->getZExtValue(); - else if (BitWidth <= 32) - Result.Int32Val = (uint32_t )cast(C)->getZExtValue(); - else if (BitWidth <= 64) - Result.Int64Val = (uint64_t )cast(C)->getZExtValue(); - else - Result.APIntVal = const_cast(&cast(C)->getValue()); + case Type::FloatTyID: + Result.FloatVal = (float)cast(C)->getValue(); + break; + case Type::DoubleTyID: + Result.DoubleVal = (double)cast(C)->getValue(); + break; + case Type::IntegerTyID: + Result.IntVal = cast(C)->getValue(); break; - } - case Type::PointerTyID: if (isa(C)) Result.PointerVal = 0; @@ -455,126 +412,37 @@ /// void ExecutionEngine::StoreValueToMemory(GenericValue Val, GenericValue *Ptr, const Type *Ty) { - if (getTargetData()->isLittleEndian()) { - switch (Ty->getTypeID()) { - case Type::IntegerTyID: { - unsigned BitWidth = cast(Ty)->getBitWidth(); - uint64_t BitMask = cast(Ty)->getBitMask(); - GenericValue TmpVal = Val; - if (BitWidth <= 8) - Ptr->Untyped[0] = Val.Int8Val & BitMask; - else if (BitWidth <= 16) { - TmpVal.Int16Val &= BitMask; - Ptr->Untyped[0] = TmpVal.Int16Val & 255; - Ptr->Untyped[1] = (TmpVal.Int16Val >> 8) & 255; - } else if (BitWidth <= 32) { - TmpVal.Int32Val &= BitMask; - Ptr->Untyped[0] = TmpVal.Int32Val & 255; - Ptr->Untyped[1] = (TmpVal.Int32Val >> 8) & 255; - Ptr->Untyped[2] = (TmpVal.Int32Val >> 16) & 255; - Ptr->Untyped[3] = (TmpVal.Int32Val >> 24) & 255; - } else if (BitWidth <= 64) { - TmpVal.Int64Val &= BitMask; - Ptr->Untyped[0] = (unsigned char)(TmpVal.Int64Val ); - Ptr->Untyped[1] = (unsigned char)(TmpVal.Int64Val >> 8); - Ptr->Untyped[2] = (unsigned char)(TmpVal.Int64Val >> 16); - Ptr->Untyped[3] = (unsigned char)(TmpVal.Int64Val >> 24); - Ptr->Untyped[4] = (unsigned char)(TmpVal.Int64Val >> 32); - Ptr->Untyped[5] = (unsigned char)(TmpVal.Int64Val >> 40); - Ptr->Untyped[6] = (unsigned char)(TmpVal.Int64Val >> 48); - Ptr->Untyped[7] = (unsigned char)(TmpVal.Int64Val >> 56); - } else { - uint64_t *Dest = (uint64_t*)Ptr; - const uint64_t *Src = Val.APIntVal->getRawData(); - for (uint32_t i = 0; i < Val.APIntVal->getNumWords(); ++i) - Dest[i] = Src[i]; - } - break; - } -Store4BytesLittleEndian: - case Type::FloatTyID: - Ptr->Untyped[0] = Val.Int32Val & 255; - Ptr->Untyped[1] = (Val.Int32Val >> 8) & 255; - Ptr->Untyped[2] = (Val.Int32Val >> 16) & 255; - Ptr->Untyped[3] = (Val.Int32Val >> 24) & 255; - break; - case Type::PointerTyID: - if (getTargetData()->getPointerSize() == 4) - goto Store4BytesLittleEndian; - /* FALL THROUGH */ - case Type::DoubleTyID: - Ptr->Untyped[0] = (unsigned char)(Val.Int64Val ); - Ptr->Untyped[1] = (unsigned char)(Val.Int64Val >> 8); - Ptr->Untyped[2] = (unsigned char)(Val.Int64Val >> 16); - Ptr->Untyped[3] = (unsigned char)(Val.Int64Val >> 24); - Ptr->Untyped[4] = (unsigned char)(Val.Int64Val >> 32); - Ptr->Untyped[5] = (unsigned char)(Val.Int64Val >> 40); - Ptr->Untyped[6] = (unsigned char)(Val.Int64Val >> 48); - Ptr->Untyped[7] = (unsigned char)(Val.Int64Val >> 56); - break; - default: - cerr << "Cannot store value of type " << *Ty << "!\n"; - } - } else { - switch (Ty->getTypeID()) { - case Type::IntegerTyID: { - unsigned BitWidth = cast(Ty)->getBitWidth(); - uint64_t BitMask = cast(Ty)->getBitMask(); - GenericValue TmpVal = Val; - if (BitWidth <= 8) - Ptr->Untyped[0] = Val.Int8Val & BitMask; - else if (BitWidth <= 16) { - TmpVal.Int16Val &= BitMask; - Ptr->Untyped[1] = TmpVal.Int16Val & 255; - Ptr->Untyped[0] = (TmpVal.Int16Val >> 8) & 255; - } else if (BitWidth <= 32) { - TmpVal.Int32Val &= BitMask; - Ptr->Untyped[3] = TmpVal.Int32Val & 255; - Ptr->Untyped[2] = (TmpVal.Int32Val >> 8) & 255; - Ptr->Untyped[1] = (TmpVal.Int32Val >> 16) & 255; - Ptr->Untyped[0] = (TmpVal.Int32Val >> 24) & 255; - } else if (BitWidth <= 64) { - TmpVal.Int64Val &= BitMask; - Ptr->Untyped[7] = (unsigned char)(TmpVal.Int64Val ); - Ptr->Untyped[6] = (unsigned char)(TmpVal.Int64Val >> 8); - Ptr->Untyped[5] = (unsigned char)(TmpVal.Int64Val >> 16); - Ptr->Untyped[4] = (unsigned char)(TmpVal.Int64Val >> 24); - Ptr->Untyped[3] = (unsigned char)(TmpVal.Int64Val >> 32); - Ptr->Untyped[2] = (unsigned char)(TmpVal.Int64Val >> 40); - Ptr->Untyped[1] = (unsigned char)(TmpVal.Int64Val >> 48); - Ptr->Untyped[0] = (unsigned char)(TmpVal.Int64Val >> 56); - } else { - uint64_t *Dest = (uint64_t*)Ptr; - const uint64_t *Src = Val.APIntVal->getRawData(); - for (uint32_t i = 0; i < Val.APIntVal->getNumWords(); ++i) - Dest[i] = Src[i]; - } - break; - } - Store4BytesBigEndian: - case Type::FloatTyID: - Ptr->Untyped[3] = Val.Int32Val & 255; - Ptr->Untyped[2] = (Val.Int32Val >> 8) & 255; - Ptr->Untyped[1] = (Val.Int32Val >> 16) & 255; - Ptr->Untyped[0] = (Val.Int32Val >> 24) & 255; - break; - case Type::PointerTyID: - if (getTargetData()->getPointerSize() == 4) - goto Store4BytesBigEndian; - /* FALL THROUGH */ - case Type::DoubleTyID: - Ptr->Untyped[7] = (unsigned char)(Val.Int64Val ); - Ptr->Untyped[6] = (unsigned char)(Val.Int64Val >> 8); - Ptr->Untyped[5] = (unsigned char)(Val.Int64Val >> 16); - Ptr->Untyped[4] = (unsigned char)(Val.Int64Val >> 24); - Ptr->Untyped[3] = (unsigned char)(Val.Int64Val >> 32); - Ptr->Untyped[2] = (unsigned char)(Val.Int64Val >> 40); - Ptr->Untyped[1] = (unsigned char)(Val.Int64Val >> 48); - Ptr->Untyped[0] = (unsigned char)(Val.Int64Val >> 56); - break; - default: - cerr << "Cannot store value of type " << *Ty << "!\n"; + switch (Ty->getTypeID()) { + case Type::IntegerTyID: { + unsigned BitWidth = cast(Ty)->getBitWidth(); + GenericValue TmpVal = Val; + if (BitWidth <= 8) + *((uint8_t*)Ptr) = uint8_t(Val.IntVal.getZExtValue()); + else if (BitWidth <= 16) { + *((uint16_t*)Ptr) = uint16_t(Val.IntVal.getZExtValue()); + } else if (BitWidth <= 32) { + *((uint32_t*)Ptr) = uint32_t(Val.IntVal.getZExtValue()); + } else if (BitWidth <= 64) { + *((uint64_t*)Ptr) = uint32_t(Val.IntVal.getZExtValue()); + } else { + uint64_t *Dest = (uint64_t*)Ptr; + const uint64_t *Src = Val.IntVal.getRawData(); + for (uint32_t i = 0; i < Val.IntVal.getNumWords(); ++i) + Dest[i] = Src[i]; } + break; + } + case Type::FloatTyID: + *((float*)Ptr) = Val.FloatVal; + break; + case Type::DoubleTyID: + *((double*)Ptr) = Val.DoubleVal; + break; + case Type::PointerTyID: + *((PointerTy*)Ptr) = Val.PointerVal; + break; + default: + cerr << "Cannot store value of type " << *Ty << "!\n"; } } @@ -583,110 +451,33 @@ void ExecutionEngine::LoadValueFromMemory(GenericValue &Result, GenericValue *Ptr, const Type *Ty) { - if (getTargetData()->isLittleEndian()) { - switch (Ty->getTypeID()) { - case Type::IntegerTyID: { - unsigned BitWidth = cast(Ty)->getBitWidth(); - if (BitWidth <= 8) - Result.Int8Val = Ptr->Untyped[0]; - else if (BitWidth <= 16) { - Result.Int16Val = (unsigned)Ptr->Untyped[0] | - ((unsigned)Ptr->Untyped[1] << 8); - } else if (BitWidth <= 32) { - Result.Int32Val = (unsigned)Ptr->Untyped[0] | - ((unsigned)Ptr->Untyped[1] << 8) | - ((unsigned)Ptr->Untyped[2] << 16) | - ((unsigned)Ptr->Untyped[3] << 24); - } else if (BitWidth <= 64) { - Result.Int64Val = (uint64_t)Ptr->Untyped[0] | - ((uint64_t)Ptr->Untyped[1] << 8) | - ((uint64_t)Ptr->Untyped[2] << 16) | - ((uint64_t)Ptr->Untyped[3] << 24) | - ((uint64_t)Ptr->Untyped[4] << 32) | - ((uint64_t)Ptr->Untyped[5] << 40) | - ((uint64_t)Ptr->Untyped[6] << 48) | - ((uint64_t)Ptr->Untyped[7] << 56); - } else - *(Result.APIntVal) = APInt(BitWidth, BitWidth/64, (uint64_t*)Ptr); - break; - } - Load4BytesLittleEndian: - case Type::FloatTyID: - Result.Int32Val = (unsigned)Ptr->Untyped[0] | - ((unsigned)Ptr->Untyped[1] << 8) | - ((unsigned)Ptr->Untyped[2] << 16) | - ((unsigned)Ptr->Untyped[3] << 24); - break; - case Type::PointerTyID: - if (getTargetData()->getPointerSize() == 4) - goto Load4BytesLittleEndian; - /* FALL THROUGH */ - case Type::DoubleTyID: - Result.Int64Val = (uint64_t)Ptr->Untyped[0] | - ((uint64_t)Ptr->Untyped[1] << 8) | - ((uint64_t)Ptr->Untyped[2] << 16) | - ((uint64_t)Ptr->Untyped[3] << 24) | - ((uint64_t)Ptr->Untyped[4] << 32) | - ((uint64_t)Ptr->Untyped[5] << 40) | - ((uint64_t)Ptr->Untyped[6] << 48) | - ((uint64_t)Ptr->Untyped[7] << 56); - break; - default: - cerr << "Cannot load value of type " << *Ty << "!\n"; - abort(); - } - } else { - switch (Ty->getTypeID()) { - case Type::IntegerTyID: { - uint32_t BitWidth = cast(Ty)->getBitWidth(); - if (BitWidth <= 8) - Result.Int8Val = Ptr->Untyped[0]; - else if (BitWidth <= 16) { - Result.Int16Val = (unsigned)Ptr->Untyped[1] | - ((unsigned)Ptr->Untyped[0] << 8); - } else if (BitWidth <= 32) { - Result.Int32Val = (unsigned)Ptr->Untyped[3] | - ((unsigned)Ptr->Untyped[2] << 8) | - ((unsigned)Ptr->Untyped[1] << 16) | - ((unsigned)Ptr->Untyped[0] << 24); - } else if (BitWidth <= 64) { - Result.Int64Val = (uint64_t)Ptr->Untyped[7] | - ((uint64_t)Ptr->Untyped[6] << 8) | - ((uint64_t)Ptr->Untyped[5] << 16) | - ((uint64_t)Ptr->Untyped[4] << 24) | - ((uint64_t)Ptr->Untyped[3] << 32) | - ((uint64_t)Ptr->Untyped[2] << 40) | - ((uint64_t)Ptr->Untyped[1] << 48) | - ((uint64_t)Ptr->Untyped[0] << 56); - } else - *(Result.APIntVal) = APInt(BitWidth, BitWidth/64, (uint64_t*)Ptr); - break; - } - Load4BytesBigEndian: - case Type::FloatTyID: - Result.Int32Val = (unsigned)Ptr->Untyped[3] | - ((unsigned)Ptr->Untyped[2] << 8) | - ((unsigned)Ptr->Untyped[1] << 16) | - ((unsigned)Ptr->Untyped[0] << 24); - break; - case Type::PointerTyID: - if (getTargetData()->getPointerSize() == 4) - goto Load4BytesBigEndian; - /* FALL THROUGH */ - case Type::DoubleTyID: - Result.Int64Val = (uint64_t)Ptr->Untyped[7] | - ((uint64_t)Ptr->Untyped[6] << 8) | - ((uint64_t)Ptr->Untyped[5] << 16) | - ((uint64_t)Ptr->Untyped[4] << 24) | - ((uint64_t)Ptr->Untyped[3] << 32) | - ((uint64_t)Ptr->Untyped[2] << 40) | - ((uint64_t)Ptr->Untyped[1] << 48) | - ((uint64_t)Ptr->Untyped[0] << 56); - break; - default: - cerr << "Cannot load value of type " << *Ty << "!\n"; - abort(); - } + switch (Ty->getTypeID()) { + case Type::IntegerTyID: { + unsigned BitWidth = cast(Ty)->getBitWidth(); + if (BitWidth <= 8) + Result.IntVal = APInt(BitWidth, *((uint8_t*)Ptr)); + else if (BitWidth <= 16) { + Result.IntVal = APInt(BitWidth, *((uint16_t*)Ptr)); + } else if (BitWidth <= 32) { + Result.IntVal = APInt(BitWidth, *((uint32_t*)Ptr)); + } else if (BitWidth <= 64) { + Result.IntVal = APInt(BitWidth, *((uint64_t*)Ptr)); + } else + Result.IntVal = APInt(BitWidth, BitWidth/64, (uint64_t*)Ptr); + break; + } + case Type::FloatTyID: + Result.FloatVal = *((float*)Ptr); + break; + case Type::DoubleTyID: + Result.DoubleVal = *((double*)Ptr); + break; + case Type::PointerTyID: + Result.PointerVal = *((PointerTy*)Ptr); + break; + default: + cerr << "Cannot load value of type " << *Ty << "!\n"; + abort(); } } From reid at x10sys.com Mon Mar 5 21:06:14 2007 From: reid at x10sys.com (Reid Spencer) Date: Mon, 5 Mar 2007 21:06:14 -0600 Subject: [llvm-commits] CVS: llvm/lib/ExecutionEngine/Interpreter/Interpreter.cpp Message-ID: <200703060306.l2636EWT008457@zion.cs.uiuc.edu> Changes in directory llvm/lib/ExecutionEngine/Interpreter: Interpreter.cpp updated: 1.38 -> 1.39 --- Log message: Remove the insufficient code in Interpreter::create that computed the Target DataLayout incorrectly. For now, we'll trust that the module has got the correct DataLayout. In the future, this needs to be changed to tell the TargetData to be "current host". --- Diffs of the changes: (+0 -12) Interpreter.cpp | 12 ------------ 1 files changed, 12 deletions(-) Index: llvm/lib/ExecutionEngine/Interpreter/Interpreter.cpp diff -u llvm/lib/ExecutionEngine/Interpreter/Interpreter.cpp:1.38 llvm/lib/ExecutionEngine/Interpreter/Interpreter.cpp:1.39 --- llvm/lib/ExecutionEngine/Interpreter/Interpreter.cpp:1.38 Sat Mar 3 12:29:16 2007 +++ llvm/lib/ExecutionEngine/Interpreter/Interpreter.cpp Mon Mar 5 21:05:57 2007 @@ -46,18 +46,6 @@ // when the module is deleted via the ExistingModuleProvide via EE. delete MP; - // FIXME: This should probably compute the entire data layout - std::string DataLayout; - int Test = 0; - *(char*)&Test = 1; // Return true if the host is little endian - bool isLittleEndian = (Test == 1); - DataLayout.append(isLittleEndian ? "e" : "E"); - - bool Ptr64 = sizeof(void*) == 8; - DataLayout.append(Ptr64 ? "-p:64:64" : "-p:32:32"); - - M->setDataLayout(DataLayout); - return new Interpreter(M); } From reid at x10sys.com Mon Mar 5 21:07:05 2007 From: reid at x10sys.com (Reid Spencer) Date: Mon, 5 Mar 2007 21:07:05 -0600 Subject: [llvm-commits] CVS: llvm/lib/ExecutionEngine/Interpreter/Interpreter.h Message-ID: <200703060307.l263752E008484@zion.cs.uiuc.edu> Changes in directory llvm/lib/ExecutionEngine/Interpreter: Interpreter.h updated: 1.85 -> 1.86 --- Log message: APInt's are no longer allocated on the heap because they are direct members of GenericValue. Consequently the code to clean them up isn't needed. --- Diffs of the changes: (+0 -12) Interpreter.h | 12 ------------ 1 files changed, 12 deletions(-) Index: llvm/lib/ExecutionEngine/Interpreter/Interpreter.h diff -u llvm/lib/ExecutionEngine/Interpreter/Interpreter.h:1.85 llvm/lib/ExecutionEngine/Interpreter/Interpreter.h:1.86 --- llvm/lib/ExecutionEngine/Interpreter/Interpreter.h:1.85 Sat Mar 3 12:19:18 2007 +++ llvm/lib/ExecutionEngine/Interpreter/Interpreter.h Mon Mar 5 21:06:48 2007 @@ -76,18 +76,6 @@ CallSite Caller; // Holds the call that called subframes. // NULL if main func or debugger invoked fn AllocaHolderHandle Allocas; // Track memory allocated by alloca - std::vector APInts; // Track memory allocated for APInts - APInt* getAPInt(uint32_t BitWidth) { - APInt* Result = new APInt(BitWidth, 0); - APInts.push_back(Result); - return Result; - } - ~ExecutionContext() { - while (!APInts.empty()) { - delete APInts.back(); - APInts.pop_back(); - } - } }; // Interpreter - This class represents the entirety of the interpreter. From dalej at apple.com Mon Mar 5 21:08:17 2007 From: dalej at apple.com (Dale Johannesen) Date: Mon, 5 Mar 2007 21:08:17 -0600 Subject: [llvm-commits] CVS: llvm-test/Makefile.programs Message-ID: <200703060308.l2638H1S008528@zion.cs.uiuc.edu> Changes in directory llvm-test: Makefile.programs updated: 1.257 -> 1.258 --- Log message: Add -enable-tail-merge to PPC flags. --- Diffs of the changes: (+1 -1) Makefile.programs | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm-test/Makefile.programs diff -u llvm-test/Makefile.programs:1.257 llvm-test/Makefile.programs:1.258 --- llvm-test/Makefile.programs:1.257 Thu Feb 8 21:43:45 2007 +++ llvm-test/Makefile.programs Mon Mar 5 21:07:59 2007 @@ -211,7 +211,7 @@ endif#DISABLE_DIFFS ifeq ($(ARCH),PowerPC) -LLCBETAOPTION := --enable-ppc-preinc +LLCBETAOPTION := --enable-ppc-preinc --enable-tail-merge #--enable-tail-merge #-regalloc=local -fast endif From reid at x10sys.com Mon Mar 5 21:08:29 2007 From: reid at x10sys.com (Reid Spencer) Date: Mon, 5 Mar 2007 21:08:29 -0600 Subject: [llvm-commits] CVS: llvm/lib/ExecutionEngine/Interpreter/ExternalFunctions.cpp Message-ID: <200703060308.l2638TOH008542@zion.cs.uiuc.edu> Changes in directory llvm/lib/ExecutionEngine/Interpreter: ExternalFunctions.cpp updated: 1.95 -> 1.96 --- Log message: Adjust and simplify external function processing now that GenericValue has a single integer field of type APInt. --- Diffs of the changes: (+41 -33) ExternalFunctions.cpp | 74 +++++++++++++++++++++++++++----------------------- 1 files changed, 41 insertions(+), 33 deletions(-) Index: llvm/lib/ExecutionEngine/Interpreter/ExternalFunctions.cpp diff -u llvm/lib/ExecutionEngine/Interpreter/ExternalFunctions.cpp:1.95 llvm/lib/ExecutionEngine/Interpreter/ExternalFunctions.cpp:1.96 --- llvm/lib/ExecutionEngine/Interpreter/ExternalFunctions.cpp:1.95 Fri Jan 12 01:05:13 2007 +++ llvm/lib/ExecutionEngine/Interpreter/ExternalFunctions.cpp Mon Mar 5 21:08:12 2007 @@ -114,19 +114,19 @@ // void putchar(sbyte) GenericValue lle_VB_putchar(FunctionType *M, const vector &Args) { - cout << Args[0].Int8Val; + cout << ((char)Args[0].IntVal.getZExtValue()); return GenericValue(); } // int putchar(int) GenericValue lle_ii_putchar(FunctionType *M, const vector &Args) { - cout << ((char)Args[0].Int32Val) << std::flush; + cout << ((char)Args[0].IntVal.getZExtValue()) << std::flush; return Args[0]; } // void putchar(ubyte) GenericValue lle_Vb_putchar(FunctionType *M, const vector &Args) { - cout << Args[0].Int8Val << std::flush; + cout << ((char)Args[0].IntVal.getZExtValue()) << std::flush; return Args[0]; } @@ -135,7 +135,7 @@ assert(Args.size() == 1); TheInterpreter->addAtExitHandler((Function*)GVTOP(Args[0])); GenericValue GV; - GV.Int32Val = 0; + GV.IntVal = 0; return GV; } @@ -154,13 +154,14 @@ // void *malloc(uint) GenericValue lle_X_malloc(FunctionType *M, const vector &Args) { assert(Args.size() == 1 && "Malloc expects one argument!"); - return PTOGV(malloc(Args[0].Int32Val)); + return PTOGV(malloc(Args[0].IntVal.getZExtValue())); } // void *calloc(uint, uint) GenericValue lle_X_calloc(FunctionType *M, const vector &Args) { assert(Args.size() == 2 && "calloc expects two arguments!"); - return PTOGV(calloc(Args[0].Int32Val, Args[1].Int32Val)); + return PTOGV(calloc(Args[0].IntVal.getZExtValue(), + Args[1].IntVal.getZExtValue())); } // void free(void *) @@ -174,7 +175,7 @@ GenericValue lle_X_atoi(FunctionType *M, const vector &Args) { assert(Args.size() == 1); GenericValue GV; - GV.Int32Val = atoi((char*)GVTOP(Args[0])); + GV.IntVal = APInt(32, atoi((char*)GVTOP(Args[0]))); return GV; } @@ -249,14 +250,14 @@ GenericValue lle_X_rand(FunctionType *M, const vector &Args) { assert(Args.size() == 0); GenericValue GV; - GV.Int32Val = rand(); + GV.IntVal = APInt(32, rand()); return GV; } // void srand(uint) GenericValue lle_X_srand(FunctionType *M, const vector &Args) { assert(Args.size() == 1); - srand(Args[0].Int32Val); + srand(Args[0].IntVal.getZExtValue()); return GenericValue(); } @@ -264,7 +265,7 @@ GenericValue lle_X_puts(FunctionType *M, const vector &Args) { assert(Args.size() == 1); GenericValue GV; - GV.Int32Val = puts((char*)GVTOP(Args[0])); + GV.IntVal = APInt(32, puts((char*)GVTOP(Args[0]))); return GV; } @@ -277,7 +278,8 @@ // printf should return # chars printed. This is completely incorrect, but // close enough for now. - GenericValue GV; GV.Int32Val = strlen(FmtStr); + GenericValue GV; + GV.IntVal = APInt(32, strlen(FmtStr)); while (1) { switch (*FmtStr) { case 0: return GV; // Null terminator... @@ -308,7 +310,8 @@ case '%': sprintf(Buffer, FmtBuf); break; case 'c': - sprintf(Buffer, FmtBuf, Args[ArgNo++].Int32Val); break; + sprintf(Buffer, FmtBuf, uint32_t(Args[ArgNo++].IntVal.getZExtValue())); + break; case 'd': case 'i': case 'u': case 'o': case 'x': case 'X': @@ -323,9 +326,10 @@ FmtBuf[Size+1] = 0; FmtBuf[Size-1] = 'l'; } - sprintf(Buffer, FmtBuf, Args[ArgNo++].Int64Val); + sprintf(Buffer, FmtBuf, Args[ArgNo++].IntVal.getZExtValue()); } else - sprintf(Buffer, FmtBuf, Args[ArgNo++].Int32Val); break; + sprintf(Buffer, FmtBuf,uint32_t(Args[ArgNo++].IntVal.getZExtValue())); + break; case 'e': case 'E': case 'g': case 'G': case 'f': sprintf(Buffer, FmtBuf, Args[ArgNo++].DoubleVal); break; case 'p': @@ -439,8 +443,8 @@ Args[i] = (char*)GVTOP(args[i]); GenericValue GV; - GV.Int32Val = sscanf(Args[0], Args[1], Args[2], Args[3], Args[4], - Args[5], Args[6], Args[7], Args[8], Args[9]); + GV.IntVal = APInt(32, sscanf(Args[0], Args[1], Args[2], Args[3], Args[4], + Args[5], Args[6], Args[7], Args[8], Args[9])); ByteswapSCANFResults(Args[1], Args[2], Args[3], Args[4], Args[5], Args[6], Args[7], Args[8], Args[9], 0); return GV; @@ -455,8 +459,8 @@ Args[i] = (char*)GVTOP(args[i]); GenericValue GV; - GV.Int32Val = scanf( Args[0], Args[1], Args[2], Args[3], Args[4], - Args[5], Args[6], Args[7], Args[8], Args[9]); + GV.IntVal = APInt(32, scanf( Args[0], Args[1], Args[2], Args[3], Args[4], + Args[5], Args[6], Args[7], Args[8], Args[9])); ByteswapSCANFResults(Args[0], Args[1], Args[2], Args[3], Args[4], Args[5], Args[6], Args[7], Args[8], Args[9]); return GV; @@ -466,7 +470,8 @@ // int clock(void) - Profiling implementation GenericValue lle_i_clock(FunctionType *M, const vector &Args) { extern unsigned int clock(void); - GenericValue GV; GV.Int32Val = clock(); + GenericValue GV; + GV.IntVal = APInt(32, clock()); return GV; } @@ -479,7 +484,7 @@ GenericValue lle_X_strcmp(FunctionType *M, const vector &Args) { assert(Args.size() == 2); GenericValue Ret; - Ret.Int32Val = strcmp((char*)GVTOP(Args[0]), (char*)GVTOP(Args[1])); + Ret.IntVal = APInt(32, strcmp((char*)GVTOP(Args[0]), (char*)GVTOP(Args[1]))); return Ret; } @@ -498,10 +503,10 @@ static GenericValue size_t_to_GV (size_t n) { GenericValue Ret; if (sizeof (size_t) == sizeof (uint64_t)) { - Ret.Int64Val = n; + Ret.IntVal = APInt(64, n); } else { assert (sizeof (size_t) == sizeof (unsigned int)); - Ret.Int32Val = n; + Ret.IntVal = APInt(32, n); } return Ret; } @@ -509,10 +514,10 @@ static size_t GV_to_size_t (GenericValue GV) { size_t count; if (sizeof (size_t) == sizeof (uint64_t)) { - count = (size_t)GV.Int64Val; + count = (size_t)GV.IntVal.getZExtValue(); } else { assert (sizeof (size_t) == sizeof (unsigned int)); - count = (size_t)GV.Int32Val; + count = (size_t)GV.IntVal.getZExtValue(); } return count; } @@ -540,7 +545,8 @@ GenericValue lle_X_memset(FunctionType *M, const vector &Args) { assert(Args.size() == 3); size_t count = GV_to_size_t (Args[2]); - return PTOGV(memset(GVTOP(Args[0]), Args[1].Int32Val, count)); + return PTOGV(memset(GVTOP(Args[0]), uint32_t(Args[1].IntVal.getZExtValue()), + count)); } // void *memcpy(void *Dest, void *src, size_t Size); @@ -569,7 +575,7 @@ GenericValue lle_X_fclose(FunctionType *M, const vector &Args) { assert(Args.size() == 1); GenericValue GV; - GV.Int32Val = fclose(getFILE(GVTOP(Args[0]))); + GV.IntVal = APInt(32, fclose(getFILE(GVTOP(Args[0])))); return GV; } @@ -578,7 +584,7 @@ assert(Args.size() == 1); GenericValue GV; - GV.Int32Val = feof(getFILE(GVTOP(Args[0]))); + GV.IntVal = APInt(32, feof(getFILE(GVTOP(Args[0])))); return GV; } @@ -605,7 +611,7 @@ // char *fgets(char *s, int n, FILE *stream); GenericValue lle_X_fgets(FunctionType *M, const vector &Args) { assert(Args.size() == 3); - return GVTOP(fgets((char*)GVTOP(Args[0]), Args[1].Int32Val, + return GVTOP(fgets((char*)GVTOP(Args[0]), Args[1].IntVal.getZExtValue(), getFILE(GVTOP(Args[2])))); } @@ -620,7 +626,7 @@ GenericValue lle_X_fflush(FunctionType *M, const vector &Args) { assert(Args.size() == 1); GenericValue GV; - GV.Int32Val = fflush(getFILE(GVTOP(Args[0]))); + GV.IntVal = APInt(32, fflush(getFILE(GVTOP(Args[0])))); return GV; } @@ -628,7 +634,7 @@ GenericValue lle_X_getc(FunctionType *M, const vector &Args) { assert(Args.size() == 1); GenericValue GV; - GV.Int32Val = getc(getFILE(GVTOP(Args[0]))); + GV.IntVal = APInt(32, getc(getFILE(GVTOP(Args[0])))); return GV; } @@ -641,7 +647,8 @@ GenericValue lle_X_fputc(FunctionType *M, const vector &Args) { assert(Args.size() == 2); GenericValue GV; - GV.Int32Val = fputc(Args[0].Int32Val, getFILE(GVTOP(Args[1]))); + GV.IntVal = APInt(32, fputc(Args[0].IntVal.getZExtValue(), + getFILE(GVTOP(Args[1])))); return GV; } @@ -649,7 +656,8 @@ GenericValue lle_X_ungetc(FunctionType *M, const vector &Args) { assert(Args.size() == 2); GenericValue GV; - GV.Int32Val = ungetc(Args[0].Int32Val, getFILE(GVTOP(Args[1]))); + GV.IntVal = APInt(32, ungetc(Args[0].IntVal.getZExtValue(), + getFILE(GVTOP(Args[1])))); return GV; } @@ -657,7 +665,7 @@ GenericValue lle_X_ferror(FunctionType *M, const vector &Args) { assert(Args.size() == 1); GenericValue GV; - GV.Int32Val = ferror (getFILE(GVTOP(Args[0]))); + GV.IntVal = APInt(32, ferror (getFILE(GVTOP(Args[0])))); return GV; } From reid at x10sys.com Mon Mar 5 21:09:48 2007 From: reid at x10sys.com (Reid Spencer) Date: Mon, 5 Mar 2007 21:09:48 -0600 Subject: [llvm-commits] CVS: llvm/lib/ExecutionEngine/Interpreter/Execution.cpp Message-ID: <200703060309.l2639mNT008581@zion.cs.uiuc.edu> Changes in directory llvm/lib/ExecutionEngine/Interpreter: Execution.cpp updated: 1.172 -> 1.173 --- Log message: Radically simplify execution. This patch gets rid of all the special handling for integer of various sizes. GenericValue now has just a single integer field of type APInt. We use its facilities directly in the execution of all instructions. --- Diffs of the changes: (+128 -636) Execution.cpp | 764 +++++++++------------------------------------------------- 1 files changed, 128 insertions(+), 636 deletions(-) Index: llvm/lib/ExecutionEngine/Interpreter/Execution.cpp diff -u llvm/lib/ExecutionEngine/Interpreter/Execution.cpp:1.172 llvm/lib/ExecutionEngine/Interpreter/Execution.cpp:1.173 --- llvm/lib/ExecutionEngine/Interpreter/Execution.cpp:1.172 Sat Mar 3 02:38:04 2007 +++ llvm/lib/ExecutionEngine/Interpreter/Execution.cpp Mon Mar 5 21:09:31 2007 @@ -32,12 +32,6 @@ // Various Helper Functions //===----------------------------------------------------------------------===// -inline void initializeAPInt(GenericValue &GV, const Type* Ty, - ExecutionContext &SF) { - if (const IntegerType *ITy = dyn_cast(Ty)) - GV.APIntVal = SF.getAPInt(ITy->getBitWidth()); -} - static inline uint64_t doSignExtension(uint64_t Val, const IntegerType* ITy) { // Determine if the value is signed or not bool isSigned = (Val & (1 << (ITy->getBitWidth()-1))) != 0; @@ -47,22 +41,6 @@ return Val; } -static inline void maskToBitWidth(GenericValue& GV, unsigned BitWidth) { - uint64_t BitMask = ~(uint64_t)(0ull) >> (64-BitWidth); - if (BitWidth <= 8) - GV.Int8Val &= BitMask; - else if (BitWidth <= 16) - GV.Int16Val &= BitMask; - else if (BitWidth <= 32) - GV.Int32Val &= BitMask; - else if (BitWidth <= 64) - GV.Int64Val &= BitMask; - else { - assert(GV.APIntVal && "Unallocated GV.APIntVal"); - *(GV.APIntVal) &= APInt::getAllOnesValue(BitWidth); - } -} - static void SetValue(Value *V, GenericValue Val, ExecutionContext &SF) { SF.Values[V] = Val; } @@ -76,79 +54,21 @@ //===----------------------------------------------------------------------===// #define IMPLEMENT_BINARY_OPERATOR(OP, TY) \ - case Type::TY##TyID: Dest.TY##Val = Src1.TY##Val OP Src2.TY##Val; break + case Type::TY##TyID: \ + Dest.TY##Val = Src1.TY##Val OP Src2.TY##Val; \ + break -#define IMPLEMENT_INTEGER_BINOP(OP, TY) \ +#define IMPLEMENT_INTEGER_BINOP1(OP, TY) \ case Type::IntegerTyID: { \ - unsigned BitWidth = cast(TY)->getBitWidth(); \ - if (BitWidth == 1) {\ - Dest.Int1Val = Src1.Int1Val OP Src2.Int1Val; \ - maskToBitWidth(Dest, BitWidth); \ - } else if (BitWidth <= 8) {\ - Dest.Int8Val = Src1.Int8Val OP Src2.Int8Val; \ - maskToBitWidth(Dest, BitWidth); \ - } else if (BitWidth <= 16) {\ - Dest.Int16Val = Src1.Int16Val OP Src2.Int16Val; \ - maskToBitWidth(Dest, BitWidth); \ - } else if (BitWidth <= 32) {\ - Dest.Int32Val = Src1.Int32Val OP Src2.Int32Val; \ - maskToBitWidth(Dest, BitWidth); \ - } else if (BitWidth <= 64) {\ - Dest.Int64Val = Src1.Int64Val OP Src2.Int64Val; \ - maskToBitWidth(Dest, BitWidth); \ - } else \ - *(Dest.APIntVal) = *(Src1.APIntVal) OP *(Src2.APIntVal); \ + Dest.IntVal = Src1.IntVal OP Src2.IntVal; \ break; \ } -#define IMPLEMENT_SIGNED_BINOP(OP, TY, APOP) \ - if (const IntegerType *ITy = dyn_cast(TY)) { \ - unsigned BitWidth = ITy->getBitWidth(); \ - if (BitWidth <= 8) { \ - Dest.Int8Val = ((int8_t)Src1.Int8Val) OP ((int8_t)Src2.Int8Val); \ - maskToBitWidth(Dest, BitWidth); \ - } else if (BitWidth <= 16) { \ - Dest.Int16Val = ((int16_t)Src1.Int16Val) OP ((int16_t)Src2.Int16Val); \ - maskToBitWidth(Dest, BitWidth); \ - } else if (BitWidth <= 32) { \ - Dest.Int32Val = ((int32_t)Src1.Int32Val) OP ((int32_t)Src2.Int32Val); \ - maskToBitWidth(Dest, BitWidth); \ - } else if (BitWidth <= 64) { \ - Dest.Int64Val = ((int64_t)Src1.Int64Val) OP ((int64_t)Src2.Int64Val); \ - maskToBitWidth(Dest, BitWidth); \ - } else \ - *(Dest.APIntVal) = Src1.APIntVal->APOP(*(Src2.APIntVal)); \ - } else { \ - cerr << "Unhandled type for " #OP " operator: " << *Ty << "\n"; \ - abort(); \ - } - -#define IMPLEMENT_UNSIGNED_BINOP(OP, TY, APOP) \ - if (const IntegerType *ITy = dyn_cast(TY)) { \ - unsigned BitWidth = ITy->getBitWidth(); \ - if (BitWidth <= 8) {\ - Dest.Int8Val = ((uint8_t)Src1.Int8Val) OP ((uint8_t)Src2.Int8Val); \ - maskToBitWidth(Dest, BitWidth); \ - } else if (BitWidth <= 16) {\ - Dest.Int16Val = ((uint16_t)Src1.Int16Val) OP ((uint16_t)Src2.Int16Val); \ - maskToBitWidth(Dest, BitWidth); \ - } else if (BitWidth <= 32) {\ - Dest.Int32Val = ((uint32_t)Src1.Int32Val) OP ((uint32_t)Src2.Int32Val); \ - maskToBitWidth(Dest, BitWidth); \ - } else if (BitWidth <= 64) {\ - Dest.Int64Val = ((uint64_t)Src1.Int64Val) OP ((uint64_t)Src2.Int64Val); \ - maskToBitWidth(Dest, BitWidth); \ - } else \ - *(Dest.APIntVal) = Src1.APIntVal->APOP(*(Src2.APIntVal)); \ - } else { \ - cerr << "Unhandled type for " #OP " operator: " << *Ty << "\n"; \ - abort(); \ - } static void executeAddInst(GenericValue &Dest, GenericValue Src1, GenericValue Src2, const Type *Ty) { switch (Ty->getTypeID()) { - IMPLEMENT_INTEGER_BINOP(+, Ty); + IMPLEMENT_INTEGER_BINOP1(+, Ty); IMPLEMENT_BINARY_OPERATOR(+, Float); IMPLEMENT_BINARY_OPERATOR(+, Double); default: @@ -160,7 +80,7 @@ static void executeSubInst(GenericValue &Dest, GenericValue Src1, GenericValue Src2, const Type *Ty) { switch (Ty->getTypeID()) { - IMPLEMENT_INTEGER_BINOP(-, Ty); + IMPLEMENT_INTEGER_BINOP1(-, Ty); IMPLEMENT_BINARY_OPERATOR(-, Float); IMPLEMENT_BINARY_OPERATOR(-, Double); default: @@ -172,7 +92,7 @@ static void executeMulInst(GenericValue &Dest, GenericValue Src1, GenericValue Src2, const Type *Ty) { switch (Ty->getTypeID()) { - IMPLEMENT_INTEGER_BINOP(*, Ty); + IMPLEMENT_INTEGER_BINOP1(*, Ty); IMPLEMENT_BINARY_OPERATOR(*, Float); IMPLEMENT_BINARY_OPERATOR(*, Double); default: @@ -181,16 +101,6 @@ } } -static void executeUDivInst(GenericValue &Dest, GenericValue Src1, - GenericValue Src2, const Type *Ty) { - IMPLEMENT_UNSIGNED_BINOP(/,Ty,udiv) -} - -static void executeSDivInst(GenericValue &Dest, GenericValue Src1, - GenericValue Src2, const Type *Ty) { - IMPLEMENT_SIGNED_BINOP(/,Ty,sdiv) -} - static void executeFDivInst(GenericValue &Dest, GenericValue Src1, GenericValue Src2, const Type *Ty) { switch (Ty->getTypeID()) { @@ -202,16 +112,6 @@ } } -static void executeURemInst(GenericValue &Dest, GenericValue Src1, - GenericValue Src2, const Type *Ty) { - IMPLEMENT_UNSIGNED_BINOP(%,Ty,urem) -} - -static void executeSRemInst(GenericValue &Dest, GenericValue Src1, - GenericValue Src2, const Type *Ty) { - IMPLEMENT_SIGNED_BINOP(%,Ty,srem) -} - static void executeFRemInst(GenericValue &Dest, GenericValue Src1, GenericValue Src2, const Type *Ty) { switch (Ty->getTypeID()) { @@ -227,71 +127,10 @@ } } -static void executeAndInst(GenericValue &Dest, GenericValue Src1, - GenericValue Src2, const Type *Ty) { - IMPLEMENT_UNSIGNED_BINOP(&,Ty,And) -} - -static void executeOrInst(GenericValue &Dest, GenericValue Src1, - GenericValue Src2, const Type *Ty) { - IMPLEMENT_UNSIGNED_BINOP(|,Ty,Or) -} - -static void executeXorInst(GenericValue &Dest, GenericValue Src1, - GenericValue Src2, const Type *Ty) { - IMPLEMENT_UNSIGNED_BINOP(^,Ty,Xor) -} - -#define IMPLEMENT_SIGNED_ICMP(OP, TY, APOP) \ - case Type::IntegerTyID: { \ - const IntegerType* ITy = cast(TY); \ - unsigned BitWidth = ITy->getBitWidth(); \ - int64_t LHS = 0, RHS = 0; \ - if (BitWidth <= 8) { \ - LHS = int64_t(doSignExtension(uint64_t(Src1.Int8Val), ITy)); \ - RHS = int64_t(doSignExtension(uint64_t(Src2.Int8Val), ITy)); \ - Dest.Int1Val = LHS OP RHS; \ - } else if (BitWidth <= 16) { \ - LHS = int64_t(doSignExtension(uint64_t(Src1.Int16Val), ITy)); \ - RHS = int64_t(doSignExtension(uint64_t(Src2.Int16Val), ITy)); \ - Dest.Int1Val = LHS OP RHS; \ - } else if (BitWidth <= 32) { \ - LHS = int64_t(doSignExtension(uint64_t(Src1.Int32Val), ITy)); \ - RHS = int64_t(doSignExtension(uint64_t(Src2.Int32Val), ITy)); \ - Dest.Int1Val = LHS OP RHS; \ - } else if (BitWidth <= 64) { \ - LHS = int64_t(doSignExtension(uint64_t(Src1.Int64Val), ITy)); \ - RHS = int64_t(doSignExtension(uint64_t(Src2.Int64Val), ITy)); \ - Dest.Int1Val = LHS OP RHS; \ - } else { \ - Dest.Int1Val = Src1.APIntVal->APOP(*(Src2.APIntVal)); \ - } \ - break; \ - } - -#define IMPLEMENT_UNSIGNED_ICMP(OP, TY, APOP) \ - case Type::IntegerTyID: { \ - unsigned BitWidth = cast(TY)->getBitWidth(); \ - if (BitWidth == 1) { \ - Dest.Int1Val = ((uint8_t)Src1.Int1Val) OP ((uint8_t)Src2.Int1Val); \ - maskToBitWidth(Dest, BitWidth); \ - } else if (BitWidth <= 8) { \ - Dest.Int1Val = ((uint8_t)Src1.Int8Val) OP ((uint8_t)Src2.Int8Val); \ - maskToBitWidth(Dest, BitWidth); \ - } else if (BitWidth <= 16) { \ - Dest.Int1Val = ((uint16_t)Src1.Int16Val) OP ((uint16_t)Src2.Int16Val); \ - maskToBitWidth(Dest, BitWidth); \ - } else if (BitWidth <= 32) { \ - Dest.Int1Val = ((uint32_t)Src1.Int32Val) OP ((uint32_t)Src2.Int32Val); \ - maskToBitWidth(Dest, BitWidth); \ - } else if (BitWidth <= 64) { \ - Dest.Int1Val = ((uint64_t)Src1.Int64Val) OP ((uint64_t)Src2.Int64Val); \ - maskToBitWidth(Dest, BitWidth); \ - } else { \ - Dest.Int1Val = Src1.APIntVal->APOP(*(Src2.APIntVal)); \ - } \ - break; \ - } +#define IMPLEMENT_INTEGER_ICMP(OP, TY) \ + case Type::IntegerTyID: \ + Dest.IntVal = APInt(1,Src1.IntVal.OP(Src2.IntVal)); \ + break; // Handle pointers specially because they must be compared with only as much // width as the host has. We _do not_ want to be comparing 64 bit values when @@ -299,14 +138,15 @@ // comparisons if they contain garbage. #define IMPLEMENT_POINTER_ICMP(OP) \ case Type::PointerTyID: \ - Dest.Int1Val = (void*)(intptr_t)Src1.PointerVal OP \ - (void*)(intptr_t)Src2.PointerVal; break + Dest.IntVal = APInt(1,(void*)(intptr_t)Src1.PointerVal OP \ + (void*)(intptr_t)Src2.PointerVal); \ + break; static GenericValue executeICMP_EQ(GenericValue Src1, GenericValue Src2, const Type *Ty) { GenericValue Dest; switch (Ty->getTypeID()) { - IMPLEMENT_UNSIGNED_ICMP(==, Ty, eq); + IMPLEMENT_INTEGER_ICMP(eq,Ty); IMPLEMENT_POINTER_ICMP(==); default: cerr << "Unhandled type for ICMP_EQ predicate: " << *Ty << "\n"; @@ -319,7 +159,7 @@ const Type *Ty) { GenericValue Dest; switch (Ty->getTypeID()) { - IMPLEMENT_UNSIGNED_ICMP(!=, Ty, ne); + IMPLEMENT_INTEGER_ICMP(ne,Ty); IMPLEMENT_POINTER_ICMP(!=); default: cerr << "Unhandled type for ICMP_NE predicate: " << *Ty << "\n"; @@ -332,7 +172,7 @@ const Type *Ty) { GenericValue Dest; switch (Ty->getTypeID()) { - IMPLEMENT_UNSIGNED_ICMP(<, Ty, ult); + IMPLEMENT_INTEGER_ICMP(ult,Ty); IMPLEMENT_POINTER_ICMP(<); default: cerr << "Unhandled type for ICMP_ULT predicate: " << *Ty << "\n"; @@ -345,7 +185,7 @@ const Type *Ty) { GenericValue Dest; switch (Ty->getTypeID()) { - IMPLEMENT_SIGNED_ICMP(<, Ty, slt); + IMPLEMENT_INTEGER_ICMP(slt,Ty); IMPLEMENT_POINTER_ICMP(<); default: cerr << "Unhandled type for ICMP_SLT predicate: " << *Ty << "\n"; @@ -358,7 +198,7 @@ const Type *Ty) { GenericValue Dest; switch (Ty->getTypeID()) { - IMPLEMENT_UNSIGNED_ICMP(>, Ty, ugt); + IMPLEMENT_INTEGER_ICMP(ugt,Ty); IMPLEMENT_POINTER_ICMP(>); default: cerr << "Unhandled type for ICMP_UGT predicate: " << *Ty << "\n"; @@ -371,7 +211,7 @@ const Type *Ty) { GenericValue Dest; switch (Ty->getTypeID()) { - IMPLEMENT_SIGNED_ICMP(>, Ty, sgt); + IMPLEMENT_INTEGER_ICMP(sgt,Ty); IMPLEMENT_POINTER_ICMP(>); default: cerr << "Unhandled type for ICMP_SGT predicate: " << *Ty << "\n"; @@ -384,7 +224,7 @@ const Type *Ty) { GenericValue Dest; switch (Ty->getTypeID()) { - IMPLEMENT_UNSIGNED_ICMP(<=, Ty, ule); + IMPLEMENT_INTEGER_ICMP(ule,Ty); IMPLEMENT_POINTER_ICMP(<=); default: cerr << "Unhandled type for ICMP_ULE predicate: " << *Ty << "\n"; @@ -397,7 +237,7 @@ const Type *Ty) { GenericValue Dest; switch (Ty->getTypeID()) { - IMPLEMENT_SIGNED_ICMP(<=, Ty, sle); + IMPLEMENT_INTEGER_ICMP(sle,Ty); IMPLEMENT_POINTER_ICMP(<=); default: cerr << "Unhandled type for ICMP_SLE predicate: " << *Ty << "\n"; @@ -410,7 +250,7 @@ const Type *Ty) { GenericValue Dest; switch (Ty->getTypeID()) { - IMPLEMENT_UNSIGNED_ICMP(>=, Ty, uge); + IMPLEMENT_INTEGER_ICMP(uge,Ty); IMPLEMENT_POINTER_ICMP(>=); default: cerr << "Unhandled type for ICMP_UGE predicate: " << *Ty << "\n"; @@ -423,7 +263,7 @@ const Type *Ty) { GenericValue Dest; switch (Ty->getTypeID()) { - IMPLEMENT_SIGNED_ICMP(>=, Ty, sge); + IMPLEMENT_INTEGER_ICMP(sge,Ty); IMPLEMENT_POINTER_ICMP(>=); default: cerr << "Unhandled type for ICMP_SGE predicate: " << *Ty << "\n"; @@ -459,7 +299,9 @@ } #define IMPLEMENT_FCMP(OP, TY) \ - case Type::TY##TyID: Dest.Int1Val = Src1.TY##Val OP Src2.TY##Val; break + case Type::TY##TyID: \ + Dest.IntVal = APInt(1,Src1.TY##Val OP Src2.TY##Val); \ + break static GenericValue executeFCMP_OEQ(GenericValue Src1, GenericValue Src2, const Type *Ty) { @@ -543,11 +385,11 @@ #define IMPLEMENT_UNORDERED(TY, X,Y) \ if (TY == Type::FloatTy) \ if (X.FloatVal != X.FloatVal || Y.FloatVal != Y.FloatVal) { \ - Dest.Int1Val = true; \ + Dest.IntVal = APInt(1,true); \ return Dest; \ } \ else if (X.DoubleVal != X.DoubleVal || Y.DoubleVal != Y.DoubleVal) { \ - Dest.Int1Val = true; \ + Dest.IntVal = APInt(1,true); \ return Dest; \ } @@ -598,11 +440,11 @@ const Type *Ty) { GenericValue Dest; if (Ty == Type::FloatTy) - Dest.Int1Val = (Src1.FloatVal == Src1.FloatVal && - Src2.FloatVal == Src2.FloatVal); + Dest.IntVal = APInt(1,(Src1.FloatVal == Src1.FloatVal && + Src2.FloatVal == Src2.FloatVal)); else - Dest.Int1Val = (Src1.DoubleVal == Src1.DoubleVal && - Src2.DoubleVal == Src2.DoubleVal); + Dest.IntVal = APInt(1,(Src1.DoubleVal == Src1.DoubleVal && + Src2.DoubleVal == Src2.DoubleVal)); return Dest; } @@ -610,11 +452,11 @@ const Type *Ty) { GenericValue Dest; if (Ty == Type::FloatTy) - Dest.Int1Val = (Src1.FloatVal != Src1.FloatVal || - Src2.FloatVal != Src2.FloatVal); + Dest.IntVal = APInt(1,(Src1.FloatVal != Src1.FloatVal || + Src2.FloatVal != Src2.FloatVal)); else - Dest.Int1Val = (Src1.DoubleVal != Src1.DoubleVal || - Src2.DoubleVal != Src2.DoubleVal); + Dest.IntVal = APInt(1,(Src1.DoubleVal != Src1.DoubleVal || + Src2.DoubleVal != Src2.DoubleVal)); return Dest; } @@ -626,8 +468,8 @@ GenericValue R; // Result switch (I.getPredicate()) { - case FCmpInst::FCMP_FALSE: R.Int1Val = false; break; - case FCmpInst::FCMP_TRUE: R.Int1Val = true; break; + case FCmpInst::FCMP_FALSE: R.IntVal = APInt(1,false); break; + case FCmpInst::FCMP_TRUE: R.IntVal = APInt(1,true); break; case FCmpInst::FCMP_ORD: R = executeFCMP_ORD(Src1, Src2, Ty); break; case FCmpInst::FCMP_UNO: R = executeFCMP_UNO(Src1, Src2, Ty); break; case FCmpInst::FCMP_UEQ: R = executeFCMP_UEQ(Src1, Src2, Ty); break; @@ -680,12 +522,12 @@ case FCmpInst::FCMP_UGE: return executeFCMP_UGE(Src1, Src2, Ty); case FCmpInst::FCMP_FALSE: { GenericValue Result; - Result.Int1Val = false; + Result.IntVal = APInt(1, false); return Result; } case FCmpInst::FCMP_TRUE: { GenericValue Result; - Result.Int1Val = true; + Result.IntVal = APInt(1, true); return Result; } default: @@ -700,21 +542,20 @@ GenericValue Src1 = getOperandValue(I.getOperand(0), SF); GenericValue Src2 = getOperandValue(I.getOperand(1), SF); GenericValue R; // Result - initializeAPInt(R, Ty, SF); switch (I.getOpcode()) { case Instruction::Add: executeAddInst (R, Src1, Src2, Ty); break; case Instruction::Sub: executeSubInst (R, Src1, Src2, Ty); break; case Instruction::Mul: executeMulInst (R, Src1, Src2, Ty); break; - case Instruction::UDiv: executeUDivInst (R, Src1, Src2, Ty); break; - case Instruction::SDiv: executeSDivInst (R, Src1, Src2, Ty); break; case Instruction::FDiv: executeFDivInst (R, Src1, Src2, Ty); break; - case Instruction::URem: executeURemInst (R, Src1, Src2, Ty); break; - case Instruction::SRem: executeSRemInst (R, Src1, Src2, Ty); break; case Instruction::FRem: executeFRemInst (R, Src1, Src2, Ty); break; - case Instruction::And: executeAndInst (R, Src1, Src2, Ty); break; - case Instruction::Or: executeOrInst (R, Src1, Src2, Ty); break; - case Instruction::Xor: executeXorInst (R, Src1, Src2, Ty); break; + case Instruction::UDiv: R.IntVal = Src1.IntVal.udiv(Src2.IntVal); break; + case Instruction::SDiv: R.IntVal = Src1.IntVal.sdiv(Src2.IntVal); break; + case Instruction::URem: R.IntVal = Src1.IntVal.urem(Src2.IntVal); break; + case Instruction::SRem: R.IntVal = Src1.IntVal.srem(Src2.IntVal); break; + case Instruction::And: R.IntVal = Src1.IntVal & Src2.IntVal; break; + case Instruction::Or: R.IntVal = Src1.IntVal | Src2.IntVal; break; + case Instruction::Xor: R.IntVal = Src1.IntVal ^ Src2.IntVal; break; default: cerr << "Don't know how to handle this binary operator!\n-->" << I; abort(); @@ -725,7 +566,7 @@ static GenericValue executeSelectInst(GenericValue Src1, GenericValue Src2, GenericValue Src3) { - return Src1.Int1Val ? Src2 : Src3; + return Src1.IntVal == 0 ? Src3 : Src2; } void Interpreter::visitSelectInst(SelectInst &I) { @@ -733,9 +574,7 @@ GenericValue Src1 = getOperandValue(I.getOperand(0), SF); GenericValue Src2 = getOperandValue(I.getOperand(1), SF); GenericValue Src3 = getOperandValue(I.getOperand(2), SF); - GenericValue R; - initializeAPInt(R, I.getOperand(1)->getType(), SF); - R = executeSelectInst(Src1, Src2, Src3); + GenericValue R = executeSelectInst(Src1, Src2, Src3); SetValue(&I, R, SF); } @@ -750,7 +589,7 @@ // the stack before interpreting atexit handlers. ECStack.clear (); runAtExitHandlers (); - exit (GV.Int32Val); + exit (GV.IntVal.zextOrTrunc(32).getZExtValue()); } /// Pop the last stack frame off of ECStack and then copy the result @@ -830,7 +669,7 @@ Dest = I.getSuccessor(0); // Uncond branches have a fixed dest... if (!I.isUnconditional()) { Value *Cond = I.getCondition(); - if (getOperandValue(Cond, SF).Int1Val == 0) // If false cond... + if (getOperandValue(Cond, SF).IntVal == 0) // If false cond... Dest = I.getSuccessor(1); } SwitchToNewBasicBlock(Dest, SF); @@ -844,8 +683,8 @@ // Check to see if any of the cases match... BasicBlock *Dest = 0; for (unsigned i = 2, e = I.getNumOperands(); i != e; i += 2) - if (executeICMP_EQ(CondVal, - getOperandValue(I.getOperand(i), SF), ElTy).Int1Val) { + if (executeICMP_EQ(CondVal, getOperandValue(I.getOperand(i), SF), ElTy) + .IntVal != 0) { Dest = cast(I.getOperand(i+1)); break; } @@ -902,10 +741,19 @@ const Type *Ty = I.getType()->getElementType(); // Type to be allocated // Get the number of elements being allocated by the array... - unsigned NumElements = getOperandValue(I.getOperand(0), SF).Int32Val; + unsigned NumElements = + getOperandValue(I.getOperand(0), SF).IntVal.getZExtValue(); + + unsigned TypeSize = (size_t)TD.getTypeSize(Ty); + + unsigned MemToAlloc = NumElements * TypeSize; // Allocate enough memory to hold the type... - void *Memory = malloc(NumElements * (size_t)TD.getTypeSize(Ty)); + void *Memory = malloc(MemToAlloc); + + DOUT << "Allocated Type: " << *Ty << " (" << TypeSize << " bytes) x " + << NumElements << " (Total: " << MemToAlloc << ") at " + << unsigned(Memory) << '\n'; GenericValue Result = PTOGV(Memory); assert(Result.PointerVal != 0 && "Null pointer returned by malloc!"); @@ -931,7 +779,7 @@ assert(isa(Ptr->getType()) && "Cannot getElementOffset of a nonpointer type!"); - PointerTy Total = 0; + uint64_t Total = 0; for (; I != E; ++I) { if (const StructType *STy = dyn_cast(*I)) { @@ -940,7 +788,7 @@ const ConstantInt *CPU = cast(I.getOperand()); unsigned Index = unsigned(CPU->getZExtValue()); - Total += (PointerTy)SLO->getElementOffset(Index); + Total += SLO->getElementOffset(Index); } else { const SequentialType *ST = cast(*I); // Get the index number for the array... which must be long type... @@ -950,17 +798,18 @@ unsigned BitWidth = cast(I.getOperand()->getType())->getBitWidth(); if (BitWidth == 32) - Idx = (int64_t)(int32_t)IdxGV.Int32Val; + Idx = (int64_t)(int32_t)IdxGV.IntVal.getZExtValue(); else if (BitWidth == 64) - Idx = (int64_t)IdxGV.Int64Val; + Idx = (int64_t)IdxGV.IntVal.getZExtValue(); else assert(0 && "Invalid index type for getelementptr"); - Total += PointerTy(TD.getTypeSize(ST->getElementType())*Idx); + Total += TD.getTypeSize(ST->getElementType())*Idx; } } GenericValue Result; - Result.PointerVal = getOperandValue(Ptr, SF).PointerVal + Total; + Result.PointerVal = ((char*)getOperandValue(Ptr, SF).PointerVal) + Total; + DOUT << "GEP Index " << Total << " bytes.\n"; return Result; } @@ -975,7 +824,6 @@ GenericValue SRC = getOperandValue(I.getPointerOperand(), SF); GenericValue *Ptr = (GenericValue*)GVTOP(SRC); GenericValue Result; - initializeAPInt(Result, I.getType(), SF); LoadValueFromMemory(Result, Ptr, I.getType()); SetValue(&I, Result, SF); } @@ -1044,14 +892,9 @@ // this by zero or sign extending the value as appropriate according to the // source type. const Type *Ty = V->getType(); - if (Ty->isInteger()) { - if (Ty->getPrimitiveSizeInBits() == 1) - ArgVals.back().Int32Val = ArgVals.back().Int1Val; - else if (Ty->getPrimitiveSizeInBits() <= 8) - ArgVals.back().Int32Val = ArgVals.back().Int8Val; - else if (Ty->getPrimitiveSizeInBits() <= 16) - ArgVals.back().Int32Val = ArgVals.back().Int16Val; - } + if (Ty->isInteger()) + if (ArgVals.back().IntVal.getBitWidth() < 32) + ArgVals.back().IntVal = ArgVals.back().IntVal.sext(32); } // To handle indirect calls, we must get the pointer value from the argument @@ -1060,129 +903,33 @@ callFunction((Function*)GVTOP(SRC), ArgVals); } -static void executeShlInst(GenericValue &Dest, GenericValue Src1, - GenericValue Src2, const Type *Ty) { - if (const IntegerType *ITy = cast(Ty)) { - unsigned BitWidth = ITy->getBitWidth(); - if (BitWidth <= 8) { - Dest.Int8Val = ((uint8_t)Src1.Int8Val) << ((uint32_t)Src2.Int8Val); - maskToBitWidth(Dest, BitWidth); - } else if (BitWidth <= 16) { - Dest.Int16Val = ((uint16_t)Src1.Int16Val) << ((uint32_t)Src2.Int16Val); - maskToBitWidth(Dest, BitWidth); - } else if (BitWidth <= 32) { - Dest.Int32Val = ((uint32_t)Src1.Int32Val) << ((uint32_t)Src2.Int32Val); - maskToBitWidth(Dest, BitWidth); - } else if (BitWidth <= 64) { - Dest.Int64Val = ((uint64_t)Src1.Int64Val) << ((uint32_t)Src2.Int64Val); - maskToBitWidth(Dest, BitWidth); - } else { - *(Dest.APIntVal) = Src1.APIntVal->shl(Src2.APIntVal->getZExtValue()); - } - } else { - cerr << "Unhandled type for Shl instruction: " << *Ty << "\n"; - abort(); - } -} - -static void executeLShrInst(GenericValue &Dest, GenericValue Src1, - GenericValue Src2, const Type *Ty) { - if (const IntegerType *ITy = cast(Ty)) { - unsigned BitWidth = ITy->getBitWidth(); - if (BitWidth <= 8) { - Dest.Int8Val = ((uint8_t)Src1.Int8Val) >> ((uint32_t)Src2.Int8Val); - maskToBitWidth(Dest, BitWidth); - } else if (BitWidth <= 16) { - Dest.Int16Val = ((uint16_t)Src1.Int16Val) >> ((uint32_t)Src2.Int16Val); - maskToBitWidth(Dest, BitWidth); - } else if (BitWidth <= 32) { - Dest.Int32Val = ((uint32_t)Src1.Int32Val) >> ((uint32_t)Src2.Int32Val); - maskToBitWidth(Dest, BitWidth); - } else if (BitWidth <= 64) { - Dest.Int64Val = ((uint64_t)Src1.Int64Val) >> ((uint32_t)Src2.Int64Val); - maskToBitWidth(Dest, BitWidth); - } else { - *(Dest.APIntVal) = Src1.APIntVal->lshr(Src2.APIntVal->getZExtValue()); - } - } else { - cerr << "Unhandled type for LShr instruction: " << *Ty << "\n"; - abort(); - } -} - -static void executeAShrInst(GenericValue &Dest, GenericValue Src1, - GenericValue Src2, const Type *Ty) { - if (const IntegerType *ITy = cast(Ty)) { - unsigned BitWidth = ITy->getBitWidth(); - if (BitWidth <= 8) { - Dest.Int8Val = ((int8_t)Src1.Int8Val) >> ((int32_t)Src2.Int8Val); - maskToBitWidth(Dest, BitWidth); - } else if (BitWidth <= 16) { - Dest.Int16Val = ((int16_t)Src1.Int16Val) >> ((int32_t)Src2.Int8Val); - maskToBitWidth(Dest, BitWidth); - } else if (BitWidth <= 32) { - Dest.Int32Val = ((int32_t)Src1.Int32Val) >> ((int32_t)Src2.Int8Val); - maskToBitWidth(Dest, BitWidth); - } else if (BitWidth <= 64) { - Dest.Int64Val = ((int64_t)Src1.Int64Val) >> ((int32_t)Src2.Int8Val); - maskToBitWidth(Dest, BitWidth); - } else { - *(Dest.APIntVal) = Src1.APIntVal->ashr(Src2.APIntVal->getZExtValue()); - } - } else { - cerr << "Unhandled type for AShr instruction: " << *Ty << "\n"; - abort(); - } -} - void Interpreter::visitShl(BinaryOperator &I) { ExecutionContext &SF = ECStack.back(); - const Type *Ty = I.getOperand(0)->getType(); GenericValue Src1 = getOperandValue(I.getOperand(0), SF); GenericValue Src2 = getOperandValue(I.getOperand(1), SF); GenericValue Dest; - initializeAPInt(Dest, Ty, SF); - executeShlInst (Dest, Src1, Src2, Ty); + Dest.IntVal = Src1.IntVal.shl(Src2.IntVal.getZExtValue()); SetValue(&I, Dest, SF); } void Interpreter::visitLShr(BinaryOperator &I) { ExecutionContext &SF = ECStack.back(); - const Type *Ty = I.getOperand(0)->getType(); GenericValue Src1 = getOperandValue(I.getOperand(0), SF); GenericValue Src2 = getOperandValue(I.getOperand(1), SF); GenericValue Dest; - initializeAPInt(Dest, Ty, SF); - executeLShrInst (Dest, Src1, Src2, Ty); + Dest.IntVal = Src1.IntVal.lshr(Src2.IntVal.getZExtValue()); SetValue(&I, Dest, SF); } void Interpreter::visitAShr(BinaryOperator &I) { ExecutionContext &SF = ECStack.back(); - const Type *Ty = I.getOperand(0)->getType(); GenericValue Src1 = getOperandValue(I.getOperand(0), SF); GenericValue Src2 = getOperandValue(I.getOperand(1), SF); - GenericValue Dest; - initializeAPInt(Dest, Ty, SF); - executeAShrInst (Dest, Src1, Src2, Ty); + GenericValue Dest; + Dest.IntVal = Src1.IntVal.ashr(Src2.IntVal.getZExtValue()); SetValue(&I, Dest, SF); } -#define INTEGER_ASSIGN(DEST, BITWIDTH, VAL) \ - { \ - uint64_t Mask = ~(uint64_t)(0ull) >> (64-BITWIDTH); \ - if (BITWIDTH == 1) { \ - Dest.Int1Val = (bool) (VAL & Mask); \ - } else if (BITWIDTH <= 8) { \ - Dest.Int8Val = (uint8_t) (VAL & Mask); \ - } else if (BITWIDTH <= 16) { \ - Dest.Int16Val = (uint16_t) (VAL & Mask); \ - } else if (BITWIDTH <= 32) { \ - Dest.Int32Val = (uint32_t) (VAL & Mask); \ - } else \ - Dest.Int64Val = (uint64_t) (VAL & Mask); \ - } - GenericValue Interpreter::executeTruncInst(Value *SrcVal, const Type *DstTy, ExecutionContext &SF) { const Type *SrcTy = SrcVal->getType(); @@ -1192,31 +939,7 @@ unsigned DBitWidth = DITy->getBitWidth(); unsigned SBitWidth = SITy->getBitWidth(); assert(SBitWidth > DBitWidth && "Invalid truncate"); - - if (DBitWidth > 64) { - // Both values are APInt, just use the APInt trunc - initializeAPInt(Dest, DstTy, SF); - *(Dest.APIntVal) = Src.APIntVal->trunc(DBitWidth); - return Dest; - } - - uint64_t MaskedVal = 0; - uint64_t Mask = (1ULL << DBitWidth) - 1; - - // Mask the source value to its actual bit width. This ensures that any - // high order bits are cleared. - if (SBitWidth <= 8) - MaskedVal = Src.Int8Val & Mask; - else if (SBitWidth <= 16) - MaskedVal = Src.Int16Val & Mask; - else if (SBitWidth <= 32) - MaskedVal = Src.Int32Val & Mask; - else if (SBitWidth <= 64) - MaskedVal = Src.Int64Val & Mask; - else - MaskedVal = Src.APIntVal->trunc(DBitWidth).getZExtValue(); - - INTEGER_ASSIGN(Dest, DBitWidth, MaskedVal); + Dest.IntVal = Src.IntVal.trunc(DBitWidth); return Dest; } @@ -1229,36 +952,7 @@ unsigned DBitWidth = DITy->getBitWidth(); unsigned SBitWidth = SITy->getBitWidth(); assert(SBitWidth < DBitWidth && "Invalid sign extend"); - - if (SBitWidth > 64) { - // Both values are APInt, just use the APInt::sext method; - initializeAPInt(Dest, DstTy, SF); - *(Dest.APIntVal) = Src.APIntVal->sext(DBitWidth); - return Dest; - } - - // Normalize to a 64-bit value. - uint64_t Normalized = 0; - if (SBitWidth <= 8) - Normalized = Src.Int8Val; - else if (SBitWidth <= 16) - Normalized = Src.Int16Val; - else if (SBitWidth <= 32) - Normalized = Src.Int32Val; - else - Normalized = Src.Int64Val; - - if (DBitWidth > 64) { - // Destination is an APint, construct it and return - initializeAPInt(Dest, DstTy, SF); - *(Dest.APIntVal) = APInt(SBitWidth, Normalized).sext(DBitWidth); - return Dest; - } - - Normalized = doSignExtension(Normalized, SITy); - - // Now that we have a sign extended value, assign it to the destination - INTEGER_ASSIGN(Dest, DBitWidth, Normalized); + Dest.IntVal = Src.IntVal.sext(DBitWidth); return Dest; } @@ -1271,36 +965,7 @@ unsigned DBitWidth = DITy->getBitWidth(); unsigned SBitWidth = SITy->getBitWidth(); assert(SBitWidth < DBitWidth && "Invalid sign extend"); - - if (SBitWidth > 64) { - // Both values are APInt, just use the APInt::sext method; - initializeAPInt(Dest, DstTy, SF); - *(Dest.APIntVal) = Src.APIntVal->zext(DBitWidth); - return Dest; - } - - uint64_t Extended = 0; - if (SBitWidth == 1) - // For sign extension from bool, we must extend the source bits. - Extended = (uint64_t) (Src.Int1Val & 1); - else if (SBitWidth <= 8) - Extended = (uint64_t) (uint8_t)Src.Int8Val; - else if (SBitWidth <= 16) - Extended = (uint64_t) (uint16_t)Src.Int16Val; - else if (SBitWidth <= 32) - Extended = (uint64_t) (uint32_t)Src.Int32Val; - else - Extended = (uint64_t) Src.Int64Val; - - if (DBitWidth > 64) { - // Destination is an APint, construct it and return - initializeAPInt(Dest, DstTy, SF); - *(Dest.APIntVal) = APInt(SBitWidth, Extended).zext(DBitWidth); - return Dest; - } - - // Now that we have a sign extended value, assign it to the destination - INTEGER_ASSIGN(Dest, DBitWidth, Extended); + Dest.IntVal = Src.IntVal.zext(DBitWidth); return Dest; } @@ -1327,167 +992,73 @@ GenericValue Interpreter::executeFPToUIInst(Value *SrcVal, const Type *DstTy, ExecutionContext &SF) { const Type *SrcTy = SrcVal->getType(); + uint32_t DBitWidth = cast(DstTy)->getBitWidth(); GenericValue Dest, Src = getOperandValue(SrcVal, SF); - const IntegerType *DITy = cast(DstTy); - unsigned DBitWidth = DITy->getBitWidth(); assert(SrcTy->isFloatingPoint() && "Invalid FPToUI instruction"); - if (DBitWidth > 64) { - initializeAPInt(Dest, DITy, SF); - if (SrcTy->getTypeID() == Type::FloatTyID) - *(Dest.APIntVal) = APIntOps::RoundFloatToAPInt(Src.FloatVal, DBitWidth); - else - *(Dest.APIntVal) = APIntOps::RoundDoubleToAPInt(Src.DoubleVal, DBitWidth); - return Dest; - } - - uint64_t Converted = 0; if (SrcTy->getTypeID() == Type::FloatTyID) - Converted = (uint64_t) Src.FloatVal; + Dest.IntVal = APIntOps::RoundFloatToAPInt(Src.FloatVal, DBitWidth); else - Converted = (uint64_t) Src.DoubleVal; - - INTEGER_ASSIGN(Dest, DBitWidth, Converted); + Dest.IntVal = APIntOps::RoundDoubleToAPInt(Src.DoubleVal, DBitWidth); return Dest; } GenericValue Interpreter::executeFPToSIInst(Value *SrcVal, const Type *DstTy, ExecutionContext &SF) { const Type *SrcTy = SrcVal->getType(); + uint32_t DBitWidth = cast(DstTy)->getBitWidth(); GenericValue Dest, Src = getOperandValue(SrcVal, SF); - const IntegerType *DITy = cast(DstTy); - unsigned DBitWidth = DITy->getBitWidth(); assert(SrcTy->isFloatingPoint() && "Invalid FPToSI instruction"); - if (DBitWidth > 64) { - initializeAPInt(Dest, DITy, SF); - if (SrcTy->getTypeID() == Type::FloatTyID) - *(Dest.APIntVal) = APIntOps::RoundFloatToAPInt(Src.FloatVal, DBitWidth); - else - *(Dest.APIntVal) = APIntOps::RoundDoubleToAPInt(Src.DoubleVal, DBitWidth); - return Dest; - } - - int64_t Converted = 0; if (SrcTy->getTypeID() == Type::FloatTyID) - Converted = (int64_t) Src.FloatVal; + Dest.IntVal = APIntOps::RoundFloatToAPInt(Src.FloatVal, DBitWidth); else - Converted = (int64_t) Src.DoubleVal; - - INTEGER_ASSIGN(Dest, DBitWidth, Converted); + Dest.IntVal = APIntOps::RoundDoubleToAPInt(Src.DoubleVal, DBitWidth); return Dest; } GenericValue Interpreter::executeUIToFPInst(Value *SrcVal, const Type *DstTy, ExecutionContext &SF) { - const Type *SrcTy = SrcVal->getType(); GenericValue Dest, Src = getOperandValue(SrcVal, SF); - const IntegerType *SITy = cast(SrcTy); - unsigned SBitWidth = SITy->getBitWidth(); assert(DstTy->isFloatingPoint() && "Invalid UIToFP instruction"); - if (SBitWidth > 64) { - if (DstTy->getTypeID() == Type::FloatTyID) - Dest.FloatVal = APIntOps::RoundAPIntToFloat(*(Src.APIntVal)); - else - Dest.DoubleVal = APIntOps::RoundAPIntToDouble(*(Src.APIntVal)); - return Dest; - } - - uint64_t Converted = 0; - if (SBitWidth == 1) - Converted = (uint64_t) Src.Int1Val; - else if (SBitWidth <= 8) - Converted = (uint64_t) Src.Int8Val; - else if (SBitWidth <= 16) - Converted = (uint64_t) Src.Int16Val; - else if (SBitWidth <= 32) - Converted = (uint64_t) Src.Int32Val; - else - Converted = (uint64_t) Src.Int64Val; - if (DstTy->getTypeID() == Type::FloatTyID) - Dest.FloatVal = (float) Converted; + Dest.FloatVal = APIntOps::RoundAPIntToFloat(Src.IntVal); else - Dest.DoubleVal = (double) Converted; + Dest.DoubleVal = APIntOps::RoundAPIntToDouble(Src.IntVal); return Dest; } GenericValue Interpreter::executeSIToFPInst(Value *SrcVal, const Type *DstTy, ExecutionContext &SF) { - const Type *SrcTy = SrcVal->getType(); GenericValue Dest, Src = getOperandValue(SrcVal, SF); - const IntegerType *SITy = cast(SrcTy); - unsigned SBitWidth = SITy->getBitWidth(); assert(DstTy->isFloatingPoint() && "Invalid SIToFP instruction"); - if (SBitWidth > 64) { - if (DstTy->getTypeID() == Type::FloatTyID) - Dest.FloatVal = APIntOps::RoundSignedAPIntToFloat(*(Src.APIntVal)); - else - Dest.DoubleVal = APIntOps::RoundSignedAPIntToDouble(*(Src.APIntVal)); - return Dest; - } - - int64_t Converted = 0; - if (SBitWidth == 1) - Converted = 0LL - Src.Int1Val; - else if (SBitWidth <= 8) - Converted = (int64_t) (int8_t)Src.Int8Val; - else if (SBitWidth <= 16) - Converted = (int64_t) (int16_t)Src.Int16Val; - else if (SBitWidth <= 32) - Converted = (int64_t) (int32_t)Src.Int32Val; - else - Converted = (int64_t) Src.Int64Val; - if (DstTy->getTypeID() == Type::FloatTyID) - Dest.FloatVal = (float) Converted; + Dest.FloatVal = APIntOps::RoundSignedAPIntToFloat(Src.IntVal); else - Dest.DoubleVal = (double) Converted; + Dest.DoubleVal = APIntOps::RoundSignedAPIntToDouble(Src.IntVal); return Dest; + } GenericValue Interpreter::executePtrToIntInst(Value *SrcVal, const Type *DstTy, ExecutionContext &SF) { const Type *SrcTy = SrcVal->getType(); + uint32_t DBitWidth = cast(DstTy)->getBitWidth(); GenericValue Dest, Src = getOperandValue(SrcVal, SF); - const IntegerType *DITy = cast(DstTy); - unsigned DBitWidth = DITy->getBitWidth(); assert(isa(SrcTy) && "Invalid PtrToInt instruction"); - if (DBitWidth > 64) { - initializeAPInt(Dest, DstTy, SF); - *(Dest.APIntVal) = (intptr_t) Src.PointerVal; - } - - INTEGER_ASSIGN(Dest, DBitWidth, (intptr_t) Src.PointerVal); + Dest.IntVal = APInt(DBitWidth, (intptr_t) Src.PointerVal); return Dest; } GenericValue Interpreter::executeIntToPtrInst(Value *SrcVal, const Type *DstTy, ExecutionContext &SF) { - const Type *SrcTy = SrcVal->getType(); GenericValue Dest, Src = getOperandValue(SrcVal, SF); - const IntegerType *SITy = cast(SrcTy); - unsigned SBitWidth = SITy->getBitWidth(); assert(isa(DstTy) && "Invalid PtrToInt instruction"); - uint64_t Converted = 0; - if (SBitWidth == 1) - Converted = (uint64_t) Src.Int1Val; - else if (SBitWidth <= 8) - Converted = (uint64_t) Src.Int8Val; - else if (SBitWidth <= 16) - Converted = (uint64_t) Src.Int16Val; - else if (SBitWidth <= 32) - Converted = (uint64_t) Src.Int32Val; - else if (SBitWidth <= 64) - Converted = (uint64_t) Src.Int64Val; - else - Converted = (uint64_t) Src.APIntVal->trunc(64).getZExtValue(); - - Dest.PointerVal = (PointerTy) Converted; + Dest.PointerVal = (PointerTy) Src.IntVal.trunc(64).getZExtValue(); return Dest; } @@ -1500,44 +1071,22 @@ assert(isa(SrcTy) && "Invalid BitCast"); Dest.PointerVal = Src.PointerVal; } else if (DstTy->isInteger()) { - const IntegerType *DITy = cast(DstTy); - unsigned DBitWidth = DITy->getBitWidth(); if (SrcTy == Type::FloatTy) { - Dest.Int32Val = FloatToBits(Src.FloatVal); + Dest.IntVal.floatToBits(Src.FloatVal); } else if (SrcTy == Type::DoubleTy) { - Dest.Int64Val = DoubleToBits(Src.DoubleVal); + Dest.IntVal.doubleToBits(Src.DoubleVal); } else if (SrcTy->isInteger()) { - const IntegerType *SITy = cast(SrcTy); - unsigned SBitWidth = SITy->getBitWidth(); - assert(SBitWidth == DBitWidth && "Invalid BitCast"); - if (SBitWidth == 1) { - Dest.Int1Val = Src.Int1Val; - maskToBitWidth(Dest, DBitWidth); - } else if (SBitWidth <= 8) { - Dest.Int8Val = Src.Int8Val; - maskToBitWidth(Dest, DBitWidth); - } else if (SBitWidth <= 16) { - Dest.Int16Val = Src.Int16Val; - maskToBitWidth(Dest, DBitWidth); - } else if (SBitWidth <= 32) { - Dest.Int32Val = Src.Int32Val; - maskToBitWidth(Dest, DBitWidth); - } else if (SBitWidth <= 64) { - Dest.Int64Val = Src.Int64Val; - maskToBitWidth(Dest, DBitWidth); - } else { - *(Dest.APIntVal) = *(Src.APIntVal); - } + Dest.IntVal = Src.IntVal; } else assert(0 && "Invalid BitCast"); } else if (DstTy == Type::FloatTy) { if (SrcTy->isInteger()) - Dest.FloatVal = BitsToFloat(Src.Int32Val); + Dest.FloatVal = Src.IntVal.bitsToFloat(); else Dest.FloatVal = Src.FloatVal; } else if (DstTy == Type::DoubleTy) { if (SrcTy->isInteger()) - Dest.DoubleVal = BitsToDouble(Src.Int64Val); + Dest.DoubleVal = Src.IntVal.bitsToDouble(); else Dest.DoubleVal = Src.DoubleVal; } else @@ -1617,30 +1166,10 @@ GenericValue VAList = getOperandValue(I.getOperand(0), SF); GenericValue Dest; GenericValue Src = ECStack[VAList.UIntPairVal.first] - .VarArgs[VAList.UIntPairVal.second]; + .VarArgs[VAList.UIntPairVal.second]; const Type *Ty = I.getType(); switch (Ty->getTypeID()) { - case Type::IntegerTyID: { - unsigned BitWidth = cast(Ty)->getBitWidth(); - if (BitWidth == 1) { - Dest.Int1Val = Src.Int1Val; - maskToBitWidth(Dest, BitWidth); - } else if (BitWidth <= 8) { - Dest.Int8Val = Src.Int8Val; - maskToBitWidth(Dest, BitWidth); - } else if (BitWidth <= 16) { - Dest.Int16Val = Src.Int16Val; - maskToBitWidth(Dest, BitWidth); - } else if (BitWidth <= 32) { - Dest.Int32Val = Src.Int32Val; - maskToBitWidth(Dest, BitWidth); - } else if (BitWidth <= 64) { - Dest.Int64Val = Src.Int64Val; - maskToBitWidth(Dest, BitWidth); - } else { - *(Dest.APIntVal) = *(Src.APIntVal); - } - } + case Type::IntegerTyID: Dest.IntVal = Src.IntVal; IMPLEMENT_VAARG(Pointer); IMPLEMENT_VAARG(Float); IMPLEMENT_VAARG(Double); @@ -1702,69 +1231,32 @@ // The cases below here require a GenericValue parameter for the result // so we initialize one, compute it and then return it. + GenericValue Op0 = getOperandValue(CE->getOperand(0), SF); + GenericValue Op1 = getOperandValue(CE->getOperand(1), SF); GenericValue Dest; - initializeAPInt(Dest, CE->getType(), SF); + const Type * Ty = CE->getOperand(0)->getType(); switch (CE->getOpcode()) { - case Instruction::Add: - executeAddInst(Dest, getOperandValue(CE->getOperand(0), SF), - getOperandValue(CE->getOperand(1), SF), - CE->getOperand(0)->getType()); - case Instruction::Sub: - executeSubInst(Dest, getOperandValue(CE->getOperand(0), SF), - getOperandValue(CE->getOperand(1), SF), - CE->getOperand(0)->getType()); - case Instruction::Mul: - executeMulInst(Dest, getOperandValue(CE->getOperand(0), SF), - getOperandValue(CE->getOperand(1), SF), - CE->getOperand(0)->getType()); - case Instruction::SDiv: - executeSDivInst(Dest, getOperandValue(CE->getOperand(0), SF), - getOperandValue(CE->getOperand(1), SF), - CE->getOperand(0)->getType()); - case Instruction::UDiv: - executeUDivInst(Dest, getOperandValue(CE->getOperand(0), SF), - getOperandValue(CE->getOperand(1), SF), - CE->getOperand(0)->getType()); - case Instruction::FDiv: - executeFDivInst(Dest, getOperandValue(CE->getOperand(0), SF), - getOperandValue(CE->getOperand(1), SF), - CE->getOperand(0)->getType()); - case Instruction::URem: - executeURemInst(Dest, getOperandValue(CE->getOperand(0), SF), - getOperandValue(CE->getOperand(1), SF), - CE->getOperand(0)->getType()); - case Instruction::SRem: - executeSRemInst(Dest, getOperandValue(CE->getOperand(0), SF), - getOperandValue(CE->getOperand(1), SF), - CE->getOperand(0)->getType()); - case Instruction::FRem: - executeFRemInst(Dest, getOperandValue(CE->getOperand(0), SF), - getOperandValue(CE->getOperand(1), SF), - CE->getOperand(0)->getType()); - case Instruction::And: - executeAndInst(Dest, getOperandValue(CE->getOperand(0), SF), - getOperandValue(CE->getOperand(1), SF), - CE->getOperand(0)->getType()); - case Instruction::Or: - executeOrInst(Dest, getOperandValue(CE->getOperand(0), SF), - getOperandValue(CE->getOperand(1), SF), - CE->getOperand(0)->getType()); - case Instruction::Xor: - executeXorInst(Dest, getOperandValue(CE->getOperand(0), SF), - getOperandValue(CE->getOperand(1), SF), - CE->getOperand(0)->getType()); - case Instruction::Shl: - executeShlInst(Dest, getOperandValue(CE->getOperand(0), SF), - getOperandValue(CE->getOperand(1), SF), - CE->getOperand(0)->getType()); - case Instruction::LShr: - executeLShrInst(Dest, getOperandValue(CE->getOperand(0), SF), - getOperandValue(CE->getOperand(1), SF), - CE->getOperand(0)->getType()); - case Instruction::AShr: - executeAShrInst(Dest, getOperandValue(CE->getOperand(0), SF), - getOperandValue(CE->getOperand(1), SF), - CE->getOperand(0)->getType()); + case Instruction::Add: executeAddInst (Dest, Op0, Op1, Ty); break; + case Instruction::Sub: executeSubInst (Dest, Op0, Op1, Ty); break; + case Instruction::Mul: executeMulInst (Dest, Op0, Op1, Ty); break; + case Instruction::FDiv: executeFDivInst(Dest, Op0, Op1, Ty); break; + case Instruction::FRem: executeFRemInst(Dest, Op0, Op1, Ty); break; + case Instruction::SDiv: Dest.IntVal = Op0.IntVal.sdiv(Op1.IntVal); break; + case Instruction::UDiv: Dest.IntVal = Op0.IntVal.udiv(Op1.IntVal); break; + case Instruction::URem: Dest.IntVal = Op0.IntVal.urem(Op1.IntVal); break; + case Instruction::SRem: Dest.IntVal = Op0.IntVal.srem(Op1.IntVal); break; + case Instruction::And: Dest.IntVal = Op0.IntVal.And(Op1.IntVal); break; + case Instruction::Or: Dest.IntVal = Op0.IntVal.Or(Op1.IntVal); break; + case Instruction::Xor: Dest.IntVal = Op0.IntVal.Xor(Op1.IntVal); break; + case Instruction::Shl: + Dest.IntVal = Op0.IntVal.shl(Op1.IntVal.getZExtValue()); + break; + case Instruction::LShr: + Dest.IntVal = Op0.IntVal.lshr(Op1.IntVal.getZExtValue()); + break; + case Instruction::AShr: + Dest.IntVal = Op0.IntVal.ashr(Op1.IntVal.getZExtValue()); + break; default: cerr << "Unhandled ConstantExpr: " << *CE << "\n"; abort(); From reid at x10sys.com Mon Mar 5 21:11:48 2007 From: reid at x10sys.com (Reid Spencer) Date: Mon, 5 Mar 2007 21:11:48 -0600 Subject: [llvm-commits] CVS: llvm/lib/ExecutionEngine/JIT/JIT.cpp Message-ID: <200703060311.l263Bmv3008639@zion.cs.uiuc.edu> Changes in directory llvm/lib/ExecutionEngine/JIT: JIT.cpp updated: 1.93 -> 1.94 --- Log message: Simplify code as a result of the change in GenericValue to have a single integer field of type APInt instead of different sized integer fields. --- Diffs of the changes: (+15 -28) JIT.cpp | 43 +++++++++++++++---------------------------- 1 files changed, 15 insertions(+), 28 deletions(-) Index: llvm/lib/ExecutionEngine/JIT/JIT.cpp diff -u llvm/lib/ExecutionEngine/JIT/JIT.cpp:1.93 llvm/lib/ExecutionEngine/JIT/JIT.cpp:1.94 --- llvm/lib/ExecutionEngine/JIT/JIT.cpp:1.93 Tue Feb 13 23:52:17 2007 +++ llvm/lib/ExecutionEngine/JIT/JIT.cpp Mon Mar 5 21:11:31 2007 @@ -107,8 +107,9 @@ // Call the function. GenericValue rv; - rv.Int32Val = PF(ArgValues[0].Int32Val, (char **)GVTOP(ArgValues[1]), - (const char **)GVTOP(ArgValues[2])); + rv.IntVal = APInt(32, PF(ArgValues[0].IntVal.getZExtValue(), + (char **)GVTOP(ArgValues[1]), + (const char **)GVTOP(ArgValues[2]))); return rv; } break; @@ -120,7 +121,8 @@ // Call the function. GenericValue rv; - rv.Int32Val = PF(ArgValues[0].Int32Val, (char **)GVTOP(ArgValues[1])); + rv.IntVal = APInt(32, PF(ArgValues[0].IntVal.getZExtValue(), + (char **)GVTOP(ArgValues[1]))); return rv; } break; @@ -130,7 +132,7 @@ FTy->getParamType(0) == Type::Int32Ty)) { GenericValue rv; int (*PF)(int) = (int(*)(int))(intptr_t)FPtr; - rv.Int32Val = PF(ArgValues[0].Int32Val); + rv.IntVal = APInt(32, PF(ArgValues[0].IntVal.getZExtValue())); return rv; } break; @@ -145,21 +147,21 @@ case Type::IntegerTyID: { unsigned BitWidth = cast(RetTy)->getBitWidth(); if (BitWidth == 1) - rv.Int1Val = ((bool(*)())(intptr_t)FPtr)(); + rv.IntVal = APInt(BitWidth, ((bool(*)())(intptr_t)FPtr)()); else if (BitWidth <= 8) - rv.Int8Val = ((char(*)())(intptr_t)FPtr)(); + rv.IntVal = APInt(BitWidth, ((char(*)())(intptr_t)FPtr)()); else if (BitWidth <= 16) - rv.Int16Val = ((short(*)())(intptr_t)FPtr)(); + rv.IntVal = APInt(BitWidth, ((short(*)())(intptr_t)FPtr)()); else if (BitWidth <= 32) - rv.Int32Val = ((int(*)())(intptr_t)FPtr)(); + rv.IntVal = APInt(BitWidth, ((int(*)())(intptr_t)FPtr)()); else if (BitWidth <= 64) - rv.Int64Val = ((int64_t(*)())(intptr_t)FPtr)(); + rv.IntVal = APInt(BitWidth, ((int64_t(*)())(intptr_t)FPtr)()); else assert(0 && "Integer types > 64 bits not supported"); return rv; } case Type::VoidTyID: - rv.Int32Val = ((int(*)())(intptr_t)FPtr)(); + rv.IntVal = APInt(32, ((int(*)())(intptr_t)FPtr)()); return rv; case Type::FloatTyID: rv.FloatVal = ((float(*)())(intptr_t)FPtr)(); @@ -194,24 +196,9 @@ const GenericValue &AV = ArgValues[i]; switch (ArgTy->getTypeID()) { default: assert(0 && "Unknown argument type for function call!"); - case Type::IntegerTyID: { - unsigned BitWidth = cast(ArgTy)->getBitWidth(); - if (BitWidth == 1) - C = ConstantInt::get(ArgTy, AV.Int1Val); - else if (BitWidth <= 8) - C = ConstantInt::get(ArgTy, AV.Int8Val); - else if (BitWidth <= 16) - C = ConstantInt::get(ArgTy, AV.Int16Val); - else if (BitWidth <= 32) - C = ConstantInt::get(ArgTy, AV.Int32Val); - else if (BitWidth <= 64) - C = ConstantInt::get(ArgTy, AV.Int64Val); - else - assert(0 && "Integer types > 64 bits not supported"); - break; - } - case Type::FloatTyID: C = ConstantFP ::get(ArgTy, AV.FloatVal); break; - case Type::DoubleTyID: C = ConstantFP ::get(ArgTy, AV.DoubleVal); break; + case Type::IntegerTyID: C = ConstantInt::get(AV.IntVal); break; + case Type::FloatTyID: C = ConstantFP ::get(ArgTy, AV.FloatVal); break; + case Type::DoubleTyID: C = ConstantFP ::get(ArgTy, AV.DoubleVal); break; case Type::PointerTyID: void *ArgPtr = GVTOP(AV); if (sizeof(void*) == 4) { From reid at x10sys.com Mon Mar 5 21:13:12 2007 From: reid at x10sys.com (Reid Spencer) Date: Mon, 5 Mar 2007 21:13:12 -0600 Subject: [llvm-commits] CVS: llvm/tools/lli/lli.cpp Message-ID: <200703060313.l263DCGU008674@zion.cs.uiuc.edu> Changes in directory llvm/tools/lli: lli.cpp updated: 1.68 -> 1.69 --- Log message: Obtain the exit function before execution just in case the module disappears before we get to calling the exit function. --- Diffs of the changes: (+7 -5) lli.cpp | 12 +++++++----- 1 files changed, 7 insertions(+), 5 deletions(-) Index: llvm/tools/lli/lli.cpp diff -u llvm/tools/lli/lli.cpp:1.68 llvm/tools/lli/lli.cpp:1.69 --- llvm/tools/lli/lli.cpp:1.68 Sat Mar 3 12:21:44 2007 +++ llvm/tools/lli/lli.cpp Mon Mar 5 21:12:55 2007 @@ -124,6 +124,10 @@ return -1; } + // If the program doesn't explicitly call exit, we will need the Exit + // function later on to make an explicit call, so get the function now. + Constant *Exit = Mod->getOrInsertFunction("exit", Type::VoidTy, + Type::Int32Ty, NULL); // Run static constructors. EE->runStaticConstructorsDestructors(false); @@ -133,14 +137,12 @@ // Run static destructors. EE->runStaticConstructorsDestructors(true); - // If the program didn't explicitly call exit, call exit now, for the - // program. This ensures that any atexit handlers get called correctly. - Constant *Exit = Mod->getOrInsertFunction("exit", Type::VoidTy, - Type::Int32Ty, NULL); + // If the program didn't call exit explicitly, we should call it now. + // This ensures that any atexit handlers get called correctly. if (Function *ExitF = dyn_cast(Exit)) { std::vector Args; GenericValue ResultGV; - ResultGV.Int32Val = Result; + ResultGV.IntVal = APInt(32, Result); Args.push_back(ResultGV); EE->runFunction(ExitF, Args); std::cerr << "ERROR: exit(" << Result << ") returned!\n"; From reid at x10sys.com Mon Mar 5 21:42:08 2007 From: reid at x10sys.com (Reid Spencer) Date: Mon, 5 Mar 2007 21:42:08 -0600 Subject: [llvm-commits] CVS: llvm/lib/ExecutionEngine/Interpreter/Execution.cpp Message-ID: <200703060342.l263g8eS009205@zion.cs.uiuc.edu> Changes in directory llvm/lib/ExecutionEngine/Interpreter: Execution.cpp updated: 1.173 -> 1.174 --- Log message: Fix a bug in IntToPtr. Truncating to 64-bits only works if the integer is larger. Adjust so that it truncates to pointer width, only if necessary. --- Diffs of the changes: (+5 -1) Execution.cpp | 6 +++++- 1 files changed, 5 insertions(+), 1 deletion(-) Index: llvm/lib/ExecutionEngine/Interpreter/Execution.cpp diff -u llvm/lib/ExecutionEngine/Interpreter/Execution.cpp:1.173 llvm/lib/ExecutionEngine/Interpreter/Execution.cpp:1.174 --- llvm/lib/ExecutionEngine/Interpreter/Execution.cpp:1.173 Mon Mar 5 21:09:31 2007 +++ llvm/lib/ExecutionEngine/Interpreter/Execution.cpp Mon Mar 5 21:41:50 2007 @@ -1058,7 +1058,11 @@ GenericValue Dest, Src = getOperandValue(SrcVal, SF); assert(isa(DstTy) && "Invalid PtrToInt instruction"); - Dest.PointerVal = (PointerTy) Src.IntVal.trunc(64).getZExtValue(); + uint32_t PtrSize = TD.getPointerSize(); + if (PtrSize != Src.IntVal.getBitWidth()) + Src.IntVal = Src.IntVal.trunc(PtrSize); + + Dest.PointerVal = (PointerTy) Src.IntVal.getZExtValue(); return Dest; } From reid at x10sys.com Mon Mar 5 21:46:58 2007 From: reid at x10sys.com (Reid Spencer) Date: Mon, 5 Mar 2007 21:46:58 -0600 Subject: [llvm-commits] CVS: llvm/lib/ExecutionEngine/Interpreter/Execution.cpp Message-ID: <200703060346.l263kwLx009281@zion.cs.uiuc.edu> Changes in directory llvm/lib/ExecutionEngine/Interpreter: Execution.cpp updated: 1.174 -> 1.175 --- Log message: Fix some thinko's in the last patch. PtrSize has to be in bits and we might need to zext not just trunc the value. --- Diffs of the changes: (+2 -2) Execution.cpp | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/lib/ExecutionEngine/Interpreter/Execution.cpp diff -u llvm/lib/ExecutionEngine/Interpreter/Execution.cpp:1.174 llvm/lib/ExecutionEngine/Interpreter/Execution.cpp:1.175 --- llvm/lib/ExecutionEngine/Interpreter/Execution.cpp:1.174 Mon Mar 5 21:41:50 2007 +++ llvm/lib/ExecutionEngine/Interpreter/Execution.cpp Mon Mar 5 21:46:41 2007 @@ -1058,9 +1058,9 @@ GenericValue Dest, Src = getOperandValue(SrcVal, SF); assert(isa(DstTy) && "Invalid PtrToInt instruction"); - uint32_t PtrSize = TD.getPointerSize(); + uint32_t PtrSize = TD.getPointerSizeInBits(); if (PtrSize != Src.IntVal.getBitWidth()) - Src.IntVal = Src.IntVal.trunc(PtrSize); + Src.IntVal = Src.IntVal.zextOrTrunc(PtrSize); Dest.PointerVal = (PointerTy) Src.IntVal.getZExtValue(); return Dest; From johannes at apple.com Mon Mar 5 20:43:51 2007 From: johannes at apple.com (johannes at apple.com) Date: Mon, 5 Mar 2007 18:43:51 -0800 (PST) Subject: [llvm-commits] [124625] Don't enable unrolling at -Os. Message-ID: <20070306024351.6C5698116748@src> Revision: 124625 Author: johannes Date: 2007-03-05 18:43:49 -0800 (Mon, 05 Mar 2007) Log Message: ----------- Don't enable unrolling at -Os. Modified Paths: -------------- apple-local/branches/llvm/gcc/opts.c Modified: apple-local/branches/llvm/gcc/opts.c =================================================================== --- apple-local/branches/llvm/gcc/opts.c 2007-03-06 02:26:56 UTC (rev 124624) +++ apple-local/branches/llvm/gcc/opts.c 2007-03-06 02:43:49 UTC (rev 124625) @@ -576,7 +576,7 @@ } /* APPLE LOCAL begin LLVM */ /* Enable loop unrolling at -O2 if -f[no-]unroll-loops is not used. */ - if (!flag_unroll_loops_set) + if (!flag_unroll_loops_set && !optimize_size) flag_unroll_loops = 1; /* APPLE LOCAL end LLVM */ } From sabre at nondot.org Mon Mar 5 22:54:02 2007 From: sabre at nondot.org (Chris Lattner) Date: Mon, 5 Mar 2007 22:54:02 -0600 Subject: [llvm-commits] CVS: llvm-test/Makefile.programs Message-ID: <200703060454.l264s2tX010518@zion.cs.uiuc.edu> Changes in directory llvm-test: Makefile.programs updated: 1.258 -> 1.259 --- Log message: ppc llc-beta can be just tail merging. --- Diffs of the changes: (+2 -2) Makefile.programs | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm-test/Makefile.programs diff -u llvm-test/Makefile.programs:1.258 llvm-test/Makefile.programs:1.259 --- llvm-test/Makefile.programs:1.258 Mon Mar 5 21:07:59 2007 +++ llvm-test/Makefile.programs Mon Mar 5 22:53:45 2007 @@ -211,8 +211,8 @@ endif#DISABLE_DIFFS ifeq ($(ARCH),PowerPC) -LLCBETAOPTION := --enable-ppc-preinc --enable-tail-merge -#--enable-tail-merge +LLCBETAOPTION := --enable-tail-merge +# --enable-ppc-preinc #-regalloc=local -fast endif ifeq ($(ARCH),Alpha) From reid at x10sys.com Mon Mar 5 23:02:45 2007 From: reid at x10sys.com (Reid Spencer) Date: Mon, 5 Mar 2007 23:02:45 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/ExecutionEngine/ExecutionEngine.h Message-ID: <200703060502.l2652j9v010688@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/ExecutionEngine: ExecutionEngine.h updated: 1.44 -> 1.45 --- Log message: Make StoreValueToMemory a little more efficient by not copying a GenericValue to a temporary. --- Diffs of the changes: (+1 -1) ExecutionEngine.h | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/include/llvm/ExecutionEngine/ExecutionEngine.h diff -u llvm/include/llvm/ExecutionEngine/ExecutionEngine.h:1.44 llvm/include/llvm/ExecutionEngine/ExecutionEngine.h:1.45 --- llvm/include/llvm/ExecutionEngine/ExecutionEngine.h:1.44 Mon Mar 5 21:01:54 2007 +++ llvm/include/llvm/ExecutionEngine/ExecutionEngine.h Mon Mar 5 23:02:28 2007 @@ -176,7 +176,7 @@ const GlobalValue *getGlobalValueAtAddress(void *Addr); - void StoreValueToMemory(GenericValue Val, GenericValue *Ptr, const Type *Ty); + void StoreValueToMemory(const GenericValue &Val, GenericValue *Ptr, const Type *Ty); void InitializeMemory(const Constant *Init, void *Addr); /// recompileAndRelinkFunction - This method is used to force a function From reid at x10sys.com Mon Mar 5 23:03:34 2007 From: reid at x10sys.com (Reid Spencer) Date: Mon, 5 Mar 2007 23:03:34 -0600 Subject: [llvm-commits] CVS: llvm/lib/ExecutionEngine/ExecutionEngine.cpp Message-ID: <200703060503.l2653YAR010721@zion.cs.uiuc.edu> Changes in directory llvm/lib/ExecutionEngine: ExecutionEngine.cpp updated: 1.111 -> 1.112 --- Log message: 1. Make StoreValueToMemory a little more efficient by not requiring caller to make a copy of the GenericValue. 2. Fix a copy & paste bug in StoreValueToMemory where 64-bit values were truncated to 32 --- Diffs of the changes: (+2 -2) ExecutionEngine.cpp | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/lib/ExecutionEngine/ExecutionEngine.cpp diff -u llvm/lib/ExecutionEngine/ExecutionEngine.cpp:1.111 llvm/lib/ExecutionEngine/ExecutionEngine.cpp:1.112 --- llvm/lib/ExecutionEngine/ExecutionEngine.cpp:1.111 Mon Mar 5 21:04:04 2007 +++ llvm/lib/ExecutionEngine/ExecutionEngine.cpp Mon Mar 5 23:03:16 2007 @@ -410,7 +410,7 @@ /// It is not a pointer to a GenericValue containing the address at which to /// store Val. /// -void ExecutionEngine::StoreValueToMemory(GenericValue Val, GenericValue *Ptr, +void ExecutionEngine::StoreValueToMemory(const GenericValue &Val, GenericValue *Ptr, const Type *Ty) { switch (Ty->getTypeID()) { case Type::IntegerTyID: { @@ -423,7 +423,7 @@ } else if (BitWidth <= 32) { *((uint32_t*)Ptr) = uint32_t(Val.IntVal.getZExtValue()); } else if (BitWidth <= 64) { - *((uint64_t*)Ptr) = uint32_t(Val.IntVal.getZExtValue()); + *((uint64_t*)Ptr) = uint64_t(Val.IntVal.getZExtValue()); } else { uint64_t *Dest = (uint64_t*)Ptr; const uint64_t *Src = Val.IntVal.getRawData(); From asl at math.spbu.ru Mon Mar 5 23:33:08 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Mon, 5 Mar 2007 23:33:08 -0600 Subject: [llvm-commits] CVS: llvm/lib/ExecutionEngine/JIT/JITEmitter.cpp Message-ID: <200703060533.l265X8ZR011220@zion.cs.uiuc.edu> Changes in directory llvm/lib/ExecutionEngine/JIT: JITEmitter.cpp updated: 1.130 -> 1.131 --- Log message: Implement PR1240: http://llvm.org/PR1240 --- Diffs of the changes: (+3 -2) JITEmitter.cpp | 5 +++-- 1 files changed, 3 insertions(+), 2 deletions(-) Index: llvm/lib/ExecutionEngine/JIT/JITEmitter.cpp diff -u llvm/lib/ExecutionEngine/JIT/JITEmitter.cpp:1.130 llvm/lib/ExecutionEngine/JIT/JITEmitter.cpp:1.131 --- llvm/lib/ExecutionEngine/JIT/JITEmitter.cpp:1.130 Fri Feb 23 20:57:03 2007 +++ llvm/lib/ExecutionEngine/JIT/JITEmitter.cpp Mon Mar 5 23:32:48 2007 @@ -876,8 +876,9 @@ Relocations.clear(); #ifndef NDEBUG - DOUT << "Disassembled code:\n" - << sys::disassembleBuffer(FnStart, FnEnd-FnStart, (uintptr_t)FnStart); + if (sys::hasDisassembler()) + DOUT << "Disassembled code:\n" + << sys::disassembleBuffer(FnStart, FnEnd-FnStart, (uintptr_t)FnStart); #endif return false; From asl at math.spbu.ru Mon Mar 5 23:33:09 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Mon, 5 Mar 2007 23:33:09 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/System/Disassembler.h Message-ID: <200703060533.l265X93O011225@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/System: Disassembler.h updated: 1.1 -> 1.2 --- Log message: Implement PR1240: http://llvm.org/PR1240 --- Diffs of the changes: (+4 -0) Disassembler.h | 4 ++++ 1 files changed, 4 insertions(+) Index: llvm/include/llvm/System/Disassembler.h diff -u llvm/include/llvm/System/Disassembler.h:1.1 llvm/include/llvm/System/Disassembler.h:1.2 --- llvm/include/llvm/System/Disassembler.h:1.1 Tue Jan 23 04:26:08 2007 +++ llvm/include/llvm/System/Disassembler.h Mon Mar 5 23:32:48 2007 @@ -21,6 +21,10 @@ namespace llvm { namespace sys { +/// This function returns true, if there is possible to use some external +/// disassembler library. False otherwise. +bool hasDisassembler(void); + /// This function provides some "glue" code to call external disassembler /// libraries. std::string disassembleBuffer(uint8_t* start, size_t length, uint64_t pc = 0); From asl at math.spbu.ru Mon Mar 5 23:33:09 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Mon, 5 Mar 2007 23:33:09 -0600 Subject: [llvm-commits] CVS: llvm/lib/System/Disassembler.cpp Message-ID: <200703060533.l265X9vm011230@zion.cs.uiuc.edu> Changes in directory llvm/lib/System: Disassembler.cpp updated: 1.2 -> 1.3 --- Log message: Implement PR1240: http://llvm.org/PR1240 --- Diffs of the changes: (+10 -0) Disassembler.cpp | 10 ++++++++++ 1 files changed, 10 insertions(+) Index: llvm/lib/System/Disassembler.cpp diff -u llvm/lib/System/Disassembler.cpp:1.2 llvm/lib/System/Disassembler.cpp:1.3 --- llvm/lib/System/Disassembler.cpp:1.2 Sun Mar 4 00:36:24 2007 +++ llvm/lib/System/Disassembler.cpp Mon Mar 5 23:32:48 2007 @@ -26,6 +26,16 @@ using namespace llvm; +bool llvm::sys::hasDisassembler(void) +{ +#if defined (__i386__) || defined (__amd64__) || defined (__x86_64__) + // We have option to enable udis86 library. + return true; +#else + return false; +#endif +} + std::string llvm::sys::disassembleBuffer(uint8_t* start, size_t length, uint64_t pc) { std::stringstream res; From asl at math.spbu.ru Tue Mar 6 00:10:52 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Tue, 6 Mar 2007 00:10:52 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/SelectionDAGISel.h Message-ID: <200703060610.l266Aqj7012420@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/CodeGen: SelectionDAGISel.h updated: 1.31 -> 1.32 --- Log message: Enumerate SDISel formal parameter attributes. Make use of new enumeration. --- Diffs of the changes: (+14 -0) SelectionDAGISel.h | 14 ++++++++++++++ 1 files changed, 14 insertions(+) Index: llvm/include/llvm/CodeGen/SelectionDAGISel.h diff -u llvm/include/llvm/CodeGen/SelectionDAGISel.h:1.31 llvm/include/llvm/CodeGen/SelectionDAGISel.h:1.32 --- llvm/include/llvm/CodeGen/SelectionDAGISel.h:1.31 Sat Oct 28 13:21:29 2006 +++ llvm/include/llvm/CodeGen/SelectionDAGISel.h Tue Mar 6 00:10:33 2007 @@ -31,6 +31,20 @@ class FunctionLoweringInfo; class HazardRecognizer; + namespace SDISelParamFlags { + enum Flags { + NoFlagSet = 0, + Signed = 1<<0, + SignedOffs = 0, + InReg = 1<<1, + InRegOffs = 1, + StructReturn = 1<<2, + StructReturnOffs = 2, + OrigAlignment = 0x1F<<27, + OrigAlignmentOffs = 27 + }; + } + /// SelectionDAGISel - This is the common base class used for SelectionDAG-based /// pattern-matching instruction selectors. class SelectionDAGISel : public FunctionPass { From asl at math.spbu.ru Tue Mar 6 00:10:51 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Tue, 6 Mar 2007 00:10:51 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Message-ID: <200703060610.l266ApMM012415@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/SelectionDAG: SelectionDAGISel.cpp updated: 1.380 -> 1.381 --- Log message: Enumerate SDISel formal parameter attributes. Make use of new enumeration. --- Diffs of the changes: (+24 -22) SelectionDAGISel.cpp | 46 ++++++++++++++++++++++++---------------------- 1 files changed, 24 insertions(+), 22 deletions(-) Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.380 llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.381 --- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.380 Sun Mar 4 18:00:42 2007 +++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Tue Mar 6 00:10:33 2007 @@ -3099,22 +3099,21 @@ for (Function::arg_iterator I = F.arg_begin(), E = F.arg_end(); I != E; ++I, ++j) { MVT::ValueType VT = getValueType(I->getType()); - bool isInReg = FTy->paramHasAttr(j, FunctionType::InRegAttribute); - bool isSRet = FTy->paramHasAttr(j, FunctionType::StructRetAttribute); + unsigned Flags = SDISelParamFlags::NoFlagSet; unsigned OriginalAlignment = getTargetData()->getABITypeAlignment(I->getType()); - // Flags[31:27] -> OriginalAlignment - // Flags[2] -> isSRet - // Flags[1] -> isInReg - // Flags[0] -> isSigned - unsigned Flags = (isInReg << 1) | (isSRet << 2) | (OriginalAlignment << 27); // FIXME: Distinguish between a formal with no [sz]ext attribute from one // that is zero extended! if (FTy->paramHasAttr(j, FunctionType::ZExtAttribute)) - Flags |= 0; + Flags &= ~(SDISelParamFlags::Signed); if (FTy->paramHasAttr(j, FunctionType::SExtAttribute)) - Flags |= 1; + Flags |= SDISelParamFlags::Signed; + if (FTy->paramHasAttr(j, FunctionType::InRegAttribute)) + Flags |= SDISelParamFlags::InReg; + if (FTy->paramHasAttr(j, FunctionType::StructRetAttribute)) + Flags |= SDISelParamFlags::StructReturn; + Flags |= (OriginalAlignment << SDISelParamFlags::OrigAlignmentOffs); switch (getTypeAction(VT)) { default: assert(0 && "Unknown type action!"); @@ -3136,7 +3135,9 @@ for (unsigned i = 0; i != NumVals; ++i) { RetVals.push_back(NVT); // if it isn't first piece, alignment must be 1 - if (i == 1) Flags = (Flags & 0x07ffffff) | (1 << 27); + if (i > 0) + Flags = (Flags & (~SDISelParamFlags::OrigAlignment)) | + (1 << SDISelParamFlags::OrigAlignmentOffs); Ops.push_back(DAG.getConstant(Flags, MVT::i32)); } } else { @@ -3245,7 +3246,8 @@ if (TLI.getTypeAction(VT) != TargetLowering::Expand) { // if it isn't first piece, alignment must be 1 if (!isFirst) - Flags = (Flags & 0x07ffffff) | (1 << 27); + Flags = (Flags & (~SDISelParamFlags::OrigAlignment)) | + (1 << SDISelParamFlags::OrigAlignmentOffs); Ops.push_back(Arg); Ops.push_back(DAG.getConstant(Flags, MVT::i32)); return; @@ -3292,18 +3294,18 @@ for (unsigned i = 0, e = Args.size(); i != e; ++i) { MVT::ValueType VT = getValueType(Args[i].Ty); SDOperand Op = Args[i].Node; - bool isSigned = Args[i].isSigned; - bool isInReg = Args[i].isInReg; - bool isSRet = Args[i].isSRet; + unsigned Flags = SDISelParamFlags::NoFlagSet; unsigned OriginalAlignment = getTargetData()->getABITypeAlignment(Args[i].Ty); - // Flags[31:27] -> OriginalAlignment - // Flags[2] -> isSRet - // Flags[1] -> isInReg - // Flags[0] -> isSigned - unsigned Flags = (isSRet << 2) | (isInReg << 1) | unsigned(isSigned) | - (OriginalAlignment << 27); - + + if (Args[i].isSigned) + Flags |= SDISelParamFlags::Signed; + if (Args[i].isInReg) + Flags |= SDISelParamFlags::InReg; + if (Args[i].isSRet) + Flags |= SDISelParamFlags::StructReturn; + Flags |= OriginalAlignment << SDISelParamFlags::OrigAlignmentOffs; + switch (getTypeAction(VT)) { default: assert(0 && "Unknown type action!"); case Legal: @@ -3312,7 +3314,7 @@ break; case Promote: if (MVT::isInteger(VT)) { - unsigned ExtOp = isSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; + unsigned ExtOp = Args[i].isSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; Op = DAG.getNode(ExtOp, getTypeToTransformTo(VT), Op); } else { assert(MVT::isFloatingPoint(VT) && "Not int or FP?"); From sabre at nondot.org Tue Mar 6 00:27:51 2007 From: sabre at nondot.org (Chris Lattner) Date: Tue, 6 Mar 2007 00:27:51 -0600 Subject: [llvm-commits] CVS: llvm/docs/GettingStarted.html Message-ID: <200703060627.l266RphQ012826@zion.cs.uiuc.edu> Changes in directory llvm/docs: GettingStarted.html updated: 1.155 -> 1.156 --- Log message: llvm-gcc 3.4 is dead. --- Diffs of the changes: (+5 -10) GettingStarted.html | 15 +++++---------- 1 files changed, 5 insertions(+), 10 deletions(-) Index: llvm/docs/GettingStarted.html diff -u llvm/docs/GettingStarted.html:1.155 llvm/docs/GettingStarted.html:1.156 --- llvm/docs/GettingStarted.html:1.155 Wed Feb 14 01:34:22 2007 +++ llvm/docs/GettingStarted.html Tue Mar 6 00:27:34 2007 @@ -89,7 +89,7 @@

The second piece is the GCC front end. This component provides a version of GCC that compiles C and C++ code into LLVM bytecode. Currently, the GCC front -end is a modified version of GCC 3.4 (we track the GCC 3.4 development). Once +end uses the GCC parser to convert code to LLVM. Once compiled into LLVM bytecode, a program can be manipulated with the LLVM tools from the LLVM suite.

@@ -712,14 +712,9 @@ configured by the LLVM configure script as well as automatically updated when you run cvs update.

-

If you would like to get the GCC 3.4 front end source code, you can also get it from the CVS repository:

- -
-  cvs -z3 -d :pserver:anon at llvm.org:/var/cvs/llvm co llvm-gcc
-
- -

Please note that you must follow these -instructions to successfully build the LLVM GCC front-end.

+

If you would like to get the GCC front end source code, you can also get it +and build it yourself. Please follow these +instructions to successfully get and build the LLVM GCC front-end.

@@ -1616,7 +1611,7 @@ Chris Lattner
Reid Spencer
The LLVM Compiler Infrastructure
- Last modified: $Date: 2007/02/14 07:34:22 $ + Last modified: $Date: 2007/03/06 06:27:34 $ From sabre at nondot.org Tue Mar 6 01:30:20 2007 From: sabre at nondot.org (Chris Lattner) Date: Tue, 6 Mar 2007 01:30:20 -0600 Subject: [llvm-commits] CVS: llvm/examples/Makefile Message-ID: <200703060730.l267UKPh013991@zion.cs.uiuc.edu> Changes in directory llvm/examples: Makefile updated: 1.8 -> 1.9 --- Log message: temporarily disable this until Reid has a chance to fix it. --- Diffs of the changes: (+2 -2) Makefile | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/examples/Makefile diff -u llvm/examples/Makefile:1.8 llvm/examples/Makefile:1.9 --- llvm/examples/Makefile:1.8 Thu Nov 30 18:37:14 2006 +++ llvm/examples/Makefile Tue Mar 6 01:30:03 2007 @@ -10,10 +10,10 @@ include $(LEVEL)/Makefile.config -PARALLEL_DIRS:= Fibonacci HowToUseJIT ModuleMaker BFtoLLVM +#PARALLEL_DIRS:= Fibonacci HowToUseJIT ModuleMaker BFtoLLVM ifeq ($(HAVE_PTHREAD),1) -PARALLEL_DIRS += ParallelJIT +#PARALLEL_DIRS += ParallelJIT endif include $(LEVEL)/Makefile.common From asl at math.spbu.ru Tue Mar 6 02:12:58 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Tue, 6 Mar 2007 02:12:58 -0600 Subject: [llvm-commits] CVS: llvm/utils/TableGen/CallingConvEmitter.cpp Message-ID: <200703060812.l268CwlW017867@zion.cs.uiuc.edu> Changes in directory llvm/utils/TableGen: CallingConvEmitter.cpp updated: 1.4 -> 1.5 --- Log message: Use new SDIselParamAttr enumeration. This removes "magick" constants from formal attributes' flags processing. --- Diffs of the changes: (+2 -2) CallingConvEmitter.cpp | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/utils/TableGen/CallingConvEmitter.cpp diff -u llvm/utils/TableGen/CallingConvEmitter.cpp:1.4 llvm/utils/TableGen/CallingConvEmitter.cpp:1.5 --- llvm/utils/TableGen/CallingConvEmitter.cpp:1.4 Tue Feb 27 23:29:06 2007 +++ llvm/utils/TableGen/CallingConvEmitter.cpp Tue Mar 6 02:12:33 2007 @@ -123,8 +123,8 @@ } else if (Action->isSubClassOf("CCPromoteToType")) { Record *DestTy = Action->getValueAsDef("DestTy"); O << IndentStr << "LocVT = " << getEnumName(getValueType(DestTy)) <<";\n"; - O << IndentStr << "LocInfo = (ArgFlags & 1) ? CCValAssign::SExt" - << " : CCValAssign::ZExt;\n"; + O << IndentStr << "LocInfo = (ArgFlags & SDISelParamFlags::Signed) ? \n" + << IndentStr << IndentStr << "CCValAssign::SExt : CCValAssign::ZExt;\n"; } else { Action->dump(); throw "Unknown CCAction!"; From asl at math.spbu.ru Tue Mar 6 02:13:00 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Tue, 6 Mar 2007 02:13:00 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/ARM/ARMISelLowering.cpp Message-ID: <200703060813.l268D0a0017874@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/ARM: ARMISelLowering.cpp updated: 1.17 -> 1.18 --- Log message: Use new SDIselParamAttr enumeration. This removes "magick" constants from formal attributes' flags processing. --- Diffs of the changes: (+2 -1) ARMISelLowering.cpp | 3 ++- 1 files changed, 2 insertions(+), 1 deletion(-) Index: llvm/lib/Target/ARM/ARMISelLowering.cpp diff -u llvm/lib/Target/ARM/ARMISelLowering.cpp:1.17 llvm/lib/Target/ARM/ARMISelLowering.cpp:1.18 --- llvm/lib/Target/ARM/ARMISelLowering.cpp:1.17 Fri Feb 23 14:32:57 2007 +++ llvm/lib/Target/ARM/ARMISelLowering.cpp Tue Mar 6 02:12:33 2007 @@ -27,6 +27,7 @@ #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineInstrBuilder.h" #include "llvm/CodeGen/SelectionDAG.h" +#include "llvm/CodeGen/SelectionDAGISel.h" #include "llvm/CodeGen/SSARegMap.h" #include "llvm/Target/TargetOptions.h" #include "llvm/ADT/VectorExtras.h" @@ -346,7 +347,7 @@ NeededGPRs = 0; StackPad = 0; GPRPad = 0; - unsigned align = (Flags >> 27); + unsigned align = (Flags >> SDISelParamFlags::OrigAlignmentOffs); GPRPad = NumGPRs % ((align + 3)/4); StackPad = StackOffset % align; unsigned firstGPR = NumGPRs + GPRPad; From asl at math.spbu.ru Tue Mar 6 02:13:00 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Tue, 6 Mar 2007 02:13:00 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp Message-ID: <200703060813.l268D01h017877@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: X86ISelLowering.cpp updated: 1.360 -> 1.361 --- Log message: Use new SDIselParamAttr enumeration. This removes "magick" constants from formal attributes' flags processing. --- Diffs of the changes: (+8 -3) X86ISelLowering.cpp | 11 ++++++++--- 1 files changed, 8 insertions(+), 3 deletions(-) Index: llvm/lib/Target/X86/X86ISelLowering.cpp diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.360 llvm/lib/Target/X86/X86ISelLowering.cpp:1.361 --- llvm/lib/Target/X86/X86ISelLowering.cpp:1.360 Fri Mar 2 17:16:35 2007 +++ llvm/lib/Target/X86/X86ISelLowering.cpp Tue Mar 6 02:12:33 2007 @@ -29,6 +29,7 @@ #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineInstrBuilder.h" #include "llvm/CodeGen/SelectionDAG.h" +#include "llvm/CodeGen/SelectionDAGISel.h" #include "llvm/CodeGen/SSARegMap.h" #include "llvm/Support/MathExtras.h" #include "llvm/Target/TargetOptions.h" @@ -665,10 +666,12 @@ BytesToPopOnReturn = StackSize; // Callee pops everything.. BytesCallerReserves = 0; } else { - BytesToPopOnReturn = 0; // Callee pops hidden struct pointer. + BytesToPopOnReturn = 0; // Callee pops nothing. // If this is an sret function, the return should pop the hidden pointer. - if (NumArgs && (cast(Op.getOperand(3))->getValue() & 4)) + if (NumArgs && + (cast(Op.getOperand(3))->getValue() & + SDISelParamFlags::StructReturn)) BytesToPopOnReturn = 4; BytesCallerReserves = StackSize; @@ -740,7 +743,9 @@ } // If the first argument is an sret pointer, remember it. - bool isSRet = NumOps &&(cast(Op.getOperand(6))->getValue()&4); + bool isSRet = NumOps && + (cast(Op.getOperand(6))->getValue() & + SDISelParamFlags::StructReturn); if (!MemOpChains.empty()) Chain = DAG.getNode(ISD::TokenFactor, MVT::Other, From asl at math.spbu.ru Tue Mar 6 02:13:03 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Tue, 6 Mar 2007 02:13:03 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/TargetCallingConv.td Message-ID: <200703060813.l268D3vQ017910@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target: TargetCallingConv.td updated: 1.3 -> 1.4 --- Log message: Use new SDIselParamAttr enumeration. This removes "magick" constants from formal attributes' flags processing. --- Diffs of the changes: (+1 -1) TargetCallingConv.td | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/Target/TargetCallingConv.td diff -u llvm/lib/Target/TargetCallingConv.td:1.3 llvm/lib/Target/TargetCallingConv.td:1.4 --- llvm/lib/Target/TargetCallingConv.td:1.3 Tue Feb 27 23:29:33 2007 +++ llvm/lib/Target/TargetCallingConv.td Tue Mar 6 02:12:33 2007 @@ -38,7 +38,7 @@ /// CCIfInReg - If this argument is marked with the 'inreg' attribute, apply /// the specified action. -class CCIfInReg : CCIf<"ArgFlags & 2", A> {} +class CCIfInReg : CCIf<"ArgFlags & SDISelParamFlags::InReg", A> {} /// CCAssignToReg - This action matches if there is a register in the specified From evan.cheng at apple.com Tue Mar 6 04:01:00 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 6 Mar 2007 04:01:00 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/RegisterScavenging.h Message-ID: <200703061001.l26A10os025539@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/CodeGen: RegisterScavenging.h updated: 1.7 -> 1.8 --- Log message: Register scavenger is now capable of scavenging. It spills a register whose use of furthest away to make it available. --- Diffs of the changes: (+39 -2) RegisterScavenging.h | 41 +++++++++++++++++++++++++++++++++++++++-- 1 files changed, 39 insertions(+), 2 deletions(-) Index: llvm/include/llvm/CodeGen/RegisterScavenging.h diff -u llvm/include/llvm/CodeGen/RegisterScavenging.h:1.7 llvm/include/llvm/CodeGen/RegisterScavenging.h:1.8 --- llvm/include/llvm/CodeGen/RegisterScavenging.h:1.7 Thu Mar 1 02:56:24 2007 +++ llvm/include/llvm/CodeGen/RegisterScavenging.h Tue Mar 6 04:00:43 2007 @@ -22,6 +22,8 @@ namespace llvm { +class MRegisterInfo; +class TargetInstrInfo; class TargetRegisterClass; class RegScavenger { @@ -33,6 +35,18 @@ /// registers. bool Tracking; + /// ScavengingFrameIndex - Special spill slot used for scavenging a register + /// post register allocation. + int ScavengingFrameIndex; + + /// ScavengedReg - If none zero, the specific register is currently being + /// scavenged. That is, it is spilled to the special scavenging stack slot. + unsigned ScavengedReg; + + /// ScavengedRC - Register class of the scavenged register. + /// + const TargetRegisterClass *ScavengedRC; + /// RegStates - The current state of all the physical registers immediately /// before MBBI. One bit per physical register. If bit is set that means it's /// available, unset means the register is currently being used. @@ -40,10 +54,12 @@ public: RegScavenger() - : MBB(NULL), NumPhysRegs(0), Tracking(false) {}; + : MBB(NULL), NumPhysRegs(0), Tracking(false), + ScavengingFrameIndex(-1), ScavengedReg(0), ScavengedRC(NULL) {}; RegScavenger(MachineBasicBlock *mbb) - : MBB(mbb), NumPhysRegs(0), Tracking(false) {}; + : MBB(mbb), NumPhysRegs(0), Tracking(false), + ScavengingFrameIndex(-1), ScavengedReg(0), ScavengedRC(NULL) {}; /// enterBasicBlock - Start tracking liveness from the begin of the specific /// basic block. @@ -88,7 +104,24 @@ unsigned FindUnusedReg(const TargetRegisterClass *RegClass, bool ExCalleeSaved = false) const; + /// setScavengingFrameIndex / getScavengingFrameIndex - accessor and setter of + /// ScavengingFrameIndex. + void setScavengingFrameIndex(int FI) { ScavengingFrameIndex = FI; } + int getScavengingFrameIndex() const { return ScavengingFrameIndex; } + + /// scavengeRegister - Make a register of the specific register class + /// available and do the appropriate bookkeeping. Returns the scavenged + /// register. + unsigned scavengeRegister(const TargetRegisterClass *RegClass, + MachineBasicBlock::iterator I); + unsigned scavengeRegister(const TargetRegisterClass *RegClass) { + return scavengeRegister(RegClass, MBBI); + } + private: + const MRegisterInfo *RegInfo; + const TargetInstrInfo *TII; + /// CalleeSavedrRegs - A bitvector of callee saved registers for the target. /// BitVector CalleeSavedRegs; @@ -96,6 +129,10 @@ /// ReservedRegs - A bitvector of reserved registers. /// BitVector ReservedRegs; + + /// restoreScavengedReg - Restore scavenged by loading it back from the + /// emergency spill slot. Mark it used. + void restoreScavengedReg(); }; } // End llvm namespace From evan.cheng at apple.com Tue Mar 6 04:01:42 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 6 Mar 2007 04:01:42 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/RegisterScavenging.cpp Message-ID: <200703061001.l26A1g5e025574@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen: RegisterScavenging.cpp updated: 1.10 -> 1.11 --- Log message: Register scavenger is now capable of scavenging. It spills a register whose use of furthest away to make it available. --- Diffs of the changes: (+90 -2) RegisterScavenging.cpp | 92 +++++++++++++++++++++++++++++++++++++++++++++++-- 1 files changed, 90 insertions(+), 2 deletions(-) Index: llvm/lib/CodeGen/RegisterScavenging.cpp diff -u llvm/lib/CodeGen/RegisterScavenging.cpp:1.10 llvm/lib/CodeGen/RegisterScavenging.cpp:1.11 --- llvm/lib/CodeGen/RegisterScavenging.cpp:1.10 Fri Mar 2 04:43:16 2007 +++ llvm/lib/CodeGen/RegisterScavenging.cpp Tue Mar 6 04:01:25 2007 @@ -28,7 +28,8 @@ void RegScavenger::enterBasicBlock(MachineBasicBlock *mbb) { const MachineFunction &MF = *mbb->getParent(); const TargetMachine &TM = MF.getTarget(); - const MRegisterInfo *RegInfo = TM.getRegisterInfo(); + TII = TM.getInstrInfo(); + RegInfo = TM.getRegisterInfo(); assert((NumPhysRegs == 0 || NumPhysRegs == RegInfo->getNumRegs()) && "Target changed?"); @@ -65,6 +66,19 @@ Tracking = false; } +void RegScavenger::restoreScavengedReg() { + if (!ScavengedReg) + return; + + RegInfo->loadRegFromStackSlot(*MBB, MBBI, ScavengedReg, + ScavengingFrameIndex, ScavengedRC); + MachineBasicBlock::iterator II = prior(MBBI); + RegInfo->eliminateFrameIndex(II, this); + setUsed(ScavengedReg); + ScavengedReg = 0; + ScavengedRC = NULL; +} + void RegScavenger::forward() { // Move ptr forward. if (!Tracking) { @@ -76,6 +90,12 @@ } MachineInstr *MI = MBBI; + + // Reaching a terminator instruction. Restore a scavenged register (which + // must be life out. + if (TII->isTerminatorInstr(MI->getOpcode())) + restoreScavengedReg(); + // Process uses first. BitVector ChangedRegs(NumPhysRegs); for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { @@ -85,7 +105,13 @@ unsigned Reg = MO.getReg(); if (Reg == 0) continue; - assert(isUsed(Reg)); + if (!isUsed(Reg)) { + // Register has been scavenged. Restore it! + if (Reg != ScavengedReg) + assert(false); + else + restoreScavengedReg(); + } if (MO.isKill() && !isReserved(Reg)) ChangedRegs.set(Reg); } @@ -191,3 +217,65 @@ int Reg = RegStatesCopy.find_first(); return (Reg == -1) ? 0 : Reg; } + +/// calcDistanceToUse - Calculate the distance to the first use of the +/// specified register. +static unsigned calcDistanceToUse(MachineBasicBlock *MBB, + MachineBasicBlock::iterator I, unsigned Reg) { + unsigned Dist = 0; + I = next(I); + while (I != MBB->end()) { + Dist++; + if (I->findRegisterUseOperand(Reg)) + return Dist; + I = next(I); + } + return Dist + 1; +} + +unsigned RegScavenger::scavengeRegister(const TargetRegisterClass *RC, + MachineBasicBlock::iterator I) { + assert(ScavengingFrameIndex >= 0 && + "Cannot scavenge a register without an emergency spill slot!"); + + // Mask off the registers which are not in the TargetRegisterClass. + BitVector Candidates(NumPhysRegs, false); + CreateRegClassMask(RC, Candidates); + Candidates ^= ReservedRegs; // Do not include reserved registers. + + // Exclude all the registers being used by the instruction. + for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i) { + MachineOperand &MO = I->getOperand(i); + if (MO.isReg()) + Candidates.reset(MO.getReg()); + } + + // Find the register whose use is furtherest aaway. + unsigned SReg = 0; + unsigned MaxDist = 0; + int Reg = Candidates.find_first(); + while (Reg != -1) { + unsigned Dist = calcDistanceToUse(MBB, I, Reg); + if (Dist >= MaxDist) { + MaxDist = Dist; + SReg = Reg; + } + Reg = Candidates.find_next(Reg); + } + + if (ScavengedReg != 0) { + // First restore previously scavenged register. + RegInfo->loadRegFromStackSlot(*MBB, I, ScavengedReg, + ScavengingFrameIndex, ScavengedRC); + MachineBasicBlock::iterator II = prior(I); + RegInfo->eliminateFrameIndex(II, this); + } + + RegInfo->storeRegToStackSlot(*MBB, I, SReg, ScavengingFrameIndex, RC); + MachineBasicBlock::iterator II = prior(I); + RegInfo->eliminateFrameIndex(II, this); + ScavengedReg = SReg; + ScavengedRC = RC; + + return SReg; +} From evan.cheng at apple.com Tue Mar 6 04:05:31 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 6 Mar 2007 04:05:31 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp PPCRegisterInfo.h Message-ID: <200703061005.l26A5VXN026213@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/PowerPC: PPCRegisterInfo.cpp updated: 1.115 -> 1.116 PPCRegisterInfo.h updated: 1.32 -> 1.33 --- Log message: Minor interface change. --- Diffs of the changes: (+4 -2) PPCRegisterInfo.cpp | 3 ++- PPCRegisterInfo.h | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-) Index: llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp diff -u llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.115 llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.116 --- llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.115 Tue Feb 27 18:19:26 2007 +++ llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp Tue Mar 6 04:05:14 2007 @@ -874,7 +874,8 @@ MFI->setStackSize(FrameSize); } -void PPCRegisterInfo::processFunctionBeforeCalleeSavedScan(MachineFunction &MF) +void PPCRegisterInfo::processFunctionBeforeCalleeSavedScan(MachineFunction &MF, + RegScavenger *RS) const { // Save and clear the LR state. PPCFunctionInfo *FI = MF.getInfo(); Index: llvm/lib/Target/PowerPC/PPCRegisterInfo.h diff -u llvm/lib/Target/PowerPC/PPCRegisterInfo.h:1.32 llvm/lib/Target/PowerPC/PPCRegisterInfo.h:1.33 --- llvm/lib/Target/PowerPC/PPCRegisterInfo.h:1.32 Tue Feb 27 18:19:26 2007 +++ llvm/lib/Target/PowerPC/PPCRegisterInfo.h Tue Mar 6 04:05:14 2007 @@ -83,7 +83,8 @@ /// frame size. void determineFrameLayout(MachineFunction &MF) const; - void processFunctionBeforeCalleeSavedScan(MachineFunction &MF) const; + void processFunctionBeforeCalleeSavedScan(MachineFunction &MF, + RegScavenger *RS = NULL) const; void emitPrologue(MachineFunction &MF) const; void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const; From evan.cheng at apple.com Tue Mar 6 04:02:55 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 6 Mar 2007 04:02:55 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/PrologEpilogInserter.cpp Message-ID: <200703061002.l26A2tSS026046@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen: PrologEpilogInserter.cpp updated: 1.76 -> 1.77 --- Log message: If target decides to create an emergency spill slot, make sure it's closest to SP or frame pointer. --- Diffs of the changes: (+56 -7) PrologEpilogInserter.cpp | 63 +++++++++++++++++++++++++++++++++++++++++------ 1 files changed, 56 insertions(+), 7 deletions(-) Index: llvm/lib/CodeGen/PrologEpilogInserter.cpp diff -u llvm/lib/CodeGen/PrologEpilogInserter.cpp:1.76 llvm/lib/CodeGen/PrologEpilogInserter.cpp:1.77 --- llvm/lib/CodeGen/PrologEpilogInserter.cpp:1.76 Thu Mar 1 04:23:33 2007 +++ llvm/lib/CodeGen/PrologEpilogInserter.cpp Tue Mar 6 04:02:38 2007 @@ -39,6 +39,9 @@ /// frame indexes with appropriate references. /// bool runOnMachineFunction(MachineFunction &Fn) { + const MRegisterInfo *MRI = Fn.getTarget().getRegisterInfo(); + RS = MRI->requiresRegisterScavenging(Fn) ? new RegScavenger() : NULL; + // Get MachineModuleInfo so that we can track the construction of the // frame. if (MachineModuleInfo *MMI = getAnalysisToUpdate()) { @@ -47,8 +50,7 @@ // Allow the target machine to make some adjustments to the function // e.g. UsedPhysRegs before calculateCalleeSavedRegisters. - Fn.getTarget().getRegisterInfo() - ->processFunctionBeforeCalleeSavedScan(Fn); + MRI->processFunctionBeforeCalleeSavedScan(Fn, RS); // Scan the function for modified callee saved registers and insert spill // code for any callee saved registers that are modified. Also calculate @@ -78,10 +80,13 @@ // replaceFrameIndices(Fn); + delete RS; return true; } private: + RegScavenger *RS; + // MinCSFrameIndex, MaxCSFrameIndex - Keeps the range of callee saved // stack frame indexes. unsigned MinCSFrameIndex, MaxCSFrameIndex; @@ -363,11 +368,37 @@ } } + // Make sure the special register scavenging spill slot is closest to the + // frame pointer if a frame pointer is required. + const MRegisterInfo *RegInfo = Fn.getTarget().getRegisterInfo(); + if (RS && RegInfo->hasFP(Fn)) { + int SFI = RS->getScavengingFrameIndex(); + if (SFI >= 0) { + // If stack grows down, we need to add size of find the lowest + // address of the object. + if (StackGrowsDown) + Offset += FFI->getObjectSize(SFI); + + unsigned Align = FFI->getObjectAlignment(SFI); + // Adjust to alignment boundary + Offset = (Offset+Align-1)/Align*Align; + + if (StackGrowsDown) { + FFI->setObjectOffset(SFI, -Offset); // Set the computed offset + } else { + FFI->setObjectOffset(SFI, Offset); + Offset += FFI->getObjectSize(SFI); + } + } + } + // Then assign frame offsets to stack objects that are not used to spill // callee saved registers. for (unsigned i = 0, e = FFI->getObjectIndexEnd(); i != e; ++i) { if (i >= MinCSFrameIndex && i <= MaxCSFrameIndex) continue; + if (RS && (int)i == RS->getScavengingFrameIndex()) + continue; // If stack grows down, we need to add size of find the lowest // address of the object. @@ -389,10 +420,32 @@ } } + // Make sure the special register scavenging spill slot is closest to the + // stack pointer. + if (RS) { + int SFI = RS->getScavengingFrameIndex(); + if (SFI >= 0) { + // If stack grows down, we need to add size of find the lowest + // address of the object. + if (StackGrowsDown) + Offset += FFI->getObjectSize(SFI); + + unsigned Align = FFI->getObjectAlignment(SFI); + // Adjust to alignment boundary + Offset = (Offset+Align-1)/Align*Align; + + if (StackGrowsDown) { + FFI->setObjectOffset(SFI, -Offset); // Set the computed offset + } else { + FFI->setObjectOffset(SFI, Offset); + Offset += FFI->getObjectSize(SFI); + } + } + } + // Round up the size to a multiple of the alignment, but only if there are // calls or alloca's in the function. This ensures that any calls to // subroutines have their stack frames suitable aligned. - const MRegisterInfo *RegInfo = Fn.getTarget().getRegisterInfo(); if (!RegInfo->targetHandlesStackFrameRounding() && (FFI->hasCalls() || FFI->hasVarSizedObjects())) { // When we have no frame pointer, we reserve argument space for call sites @@ -442,7 +495,6 @@ const TargetMachine &TM = Fn.getTarget(); assert(TM.getRegisterInfo() && "TM::getRegisterInfo() must be implemented!"); const MRegisterInfo &MRI = *TM.getRegisterInfo(); - RegScavenger *RS=MRI.requiresRegisterScavenging(Fn) ? new RegScavenger():NULL; for (MachineFunction::iterator BB = Fn.begin(), E = Fn.end(); BB != E; ++BB) { if (RS) RS->enterBasicBlock(BB); @@ -458,7 +510,4 @@ if (RS) RS->forward(I); } } - - delete RS; } - From evan.cheng at apple.com Tue Mar 6 04:04:13 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 6 Mar 2007 04:04:13 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/ARM/ARMRegisterInfo.cpp ARMRegisterInfo.h Message-ID: <200703061004.l26A4DhH026153@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/ARM: ARMRegisterInfo.cpp updated: 1.79 -> 1.80 ARMRegisterInfo.h updated: 1.15 -> 1.16 --- Log message: Scavenge a register using the register scavenger when needed. --- Diffs of the changes: (+111 -14) ARMRegisterInfo.cpp | 115 ++++++++++++++++++++++++++++++++++++++++++++++++---- ARMRegisterInfo.h | 10 +--- 2 files changed, 111 insertions(+), 14 deletions(-) Index: llvm/lib/Target/ARM/ARMRegisterInfo.cpp diff -u llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.79 llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.80 --- llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.79 Thu Mar 1 19:17:17 2007 +++ llvm/lib/Target/ARM/ARMRegisterInfo.cpp Tue Mar 6 04:03:56 2007 @@ -85,11 +85,6 @@ : ARMGenRegisterInfo(ARM::ADJCALLSTACKDOWN, ARM::ADJCALLSTACKUP), TII(tii), STI(sti), FramePtr(STI.useThumbBacktraces() ? ARM::R7 : ARM::R11) { - RS = (EnableScavenging) ? new RegScavenger() : NULL; -} - -ARMRegisterInfo::~ARMRegisterInfo() { - delete RS; } bool ARMRegisterInfo::spillCalleeSavedRegisters(MachineBasicBlock &MBB, @@ -329,6 +324,25 @@ } bool +ARMRegisterInfo::isReservedReg(const MachineFunction &MF, unsigned Reg) const { + switch (Reg) { + default: break; + case ARM::SP: + case ARM::PC: + return true; + case ARM::R7: + case ARM::R11: + if (FramePtr == Reg && (STI.isTargetDarwin() || hasFP(MF))) + return true; + break; + case ARM::R9: + return STI.isR9Reserved(); + } + + return false; +} + +bool ARMRegisterInfo::requiresRegisterScavenging(const MachineFunction &MF) const { const ARMFunctionInfo *AFI = MF.getInfo(); return EnableScavenging && !AFI->isThumbFunction(); @@ -918,15 +932,34 @@ // to form it with a series of ADDri's. Do this by taking 8-bit chunks // out of 'Offset'. unsigned ScratchReg = findScratchRegister(RS, &ARM::GPRRegClass, AFI); - assert(ScratchReg && "Unable to find a free register!"); + if (ScratchReg == 0) + // No register is "free". Scavenge a register. + ScratchReg = RS->scavengeRegister(&ARM::GPRRegClass, II); emitARMRegPlusImmediate(MBB, II, ScratchReg, FrameReg, isSub ? -Offset : Offset, TII); MI.getOperand(i).ChangeToRegister(ScratchReg, false, false, true); } } -void ARMRegisterInfo:: -processFunctionBeforeCalleeSavedScan(MachineFunction &MF) const { +static unsigned estimateStackSize(MachineFunction &MF, MachineFrameInfo *MFI) { + const MachineFrameInfo *FFI = MF.getFrameInfo(); + int Offset = 0; + for (int i = FFI->getObjectIndexBegin(); i != 0; ++i) { + int FixedOff = -FFI->getObjectOffset(i); + if (FixedOff > Offset) Offset = FixedOff; + } + for (unsigned i = 0, e = FFI->getObjectIndexEnd(); i != e; ++i) { + Offset += FFI->getObjectSize(i); + unsigned Align = FFI->getObjectAlignment(i); + // Adjust to alignment boundary + Offset = (Offset+Align-1)/Align*Align; + } + return (unsigned)Offset; +} + +void +ARMRegisterInfo::processFunctionBeforeCalleeSavedScan(MachineFunction &MF, + RegScavenger *RS) const { // This tells PEI to spill the FP as if it is any other callee-save register // to take advantage the eliminateFrameIndex machinery. This also ensures it // is spilled in the order specified by getCalleeSavedRegs() to make it easier @@ -1020,6 +1053,7 @@ } } + bool ExtraCSSpill = false; if (!CanEliminateFrame || hasFP(MF)) { AFI->setHasStackFrame(true); @@ -1032,6 +1066,7 @@ UnspilledCS1GPRs.erase(std::find(UnspilledCS1GPRs.begin(), UnspilledCS1GPRs.end(), (unsigned)ARM::LR)); ForceLRSpill = false; + ExtraCSSpill = true; } // Darwin ABI requires FP to point to the stack slot that contains the @@ -1050,10 +1085,74 @@ unsigned Reg = UnspilledCS1GPRs.front(); MF.changePhyRegUsed(Reg, true); AFI->setCSRegisterIsSpilled(Reg); + if (!isReservedReg(MF, Reg)) + ExtraCSSpill = true; } else if (!UnspilledCS2GPRs.empty()) { unsigned Reg = UnspilledCS2GPRs.front(); MF.changePhyRegUsed(Reg, true); AFI->setCSRegisterIsSpilled(Reg); + if (!isReservedReg(MF, Reg)) + ExtraCSSpill = true; + } + } + + // Estimate if we might need to scavenge a register at some point in order + // to materialize a stack offset. If so, either spill one additiona + // callee-saved register or reserve a special spill slot to facilitate + // register scavenging. + if (RS && !ExtraCSSpill && !AFI->isThumbFunction()) { + MachineFrameInfo *MFI = MF.getFrameInfo(); + unsigned Size = estimateStackSize(MF, MFI); + unsigned Limit = (1 << 12) - 1; + for (MachineFunction::iterator BB = MF.begin(),E = MF.end();BB != E; ++BB) + for (MachineBasicBlock::iterator I= BB->begin(); I != BB->end(); ++I) { + for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i) + if (I->getOperand(i).isFrameIndex()) { + unsigned Opcode = I->getOpcode(); + const TargetInstrDescriptor &Desc = TII.get(Opcode); + unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); + if (AddrMode == ARMII::AddrMode3) { + Limit = (1 << 8) - 1; + goto DoneEstimating; + } else if (AddrMode == ARMII::AddrMode5) { + Limit = ((1 << 8) - 1) * 4; + goto DoneEstimating; + } + } + } + DoneEstimating: + if (Size >= Limit) { + // If any non-reserved CS register isn't spilled, just spill one or two + // extra. That should take care of it! + unsigned NumExtras = TargetAlign / 4; + SmallVector Extras; + while (NumExtras && !UnspilledCS1GPRs.empty()) { + unsigned Reg = UnspilledCS1GPRs.back(); + UnspilledCS1GPRs.pop_back(); + if (!isReservedReg(MF, Reg)) { + Extras.push_back(Reg); + NumExtras--; + } + } + while (NumExtras && !UnspilledCS2GPRs.empty()) { + unsigned Reg = UnspilledCS2GPRs.back(); + UnspilledCS2GPRs.pop_back(); + if (!isReservedReg(MF, Reg)) { + Extras.push_back(Reg); + NumExtras--; + } + } + if (Extras.size() && NumExtras == 0) { + for (unsigned i = 0, e = Extras.size(); i != e; ++i) { + MF.changePhyRegUsed(Extras[i], true); + AFI->setCSRegisterIsSpilled(Extras[i]); + } + } else { + // Reserve a slot closest to SP or frame pointer. + const TargetRegisterClass *RC = &ARM::GPRRegClass; + RS->setScavengingFrameIndex(MFI->CreateStackObject(RC->getSize(), + RC->getAlignment())); + } } } } Index: llvm/lib/Target/ARM/ARMRegisterInfo.h diff -u llvm/lib/Target/ARM/ARMRegisterInfo.h:1.15 llvm/lib/Target/ARM/ARMRegisterInfo.h:1.16 --- llvm/lib/Target/ARM/ARMRegisterInfo.h:1.15 Tue Feb 27 18:59:19 2007 +++ llvm/lib/Target/ARM/ARMRegisterInfo.h Tue Mar 6 04:03:56 2007 @@ -27,17 +27,12 @@ const TargetInstrInfo &TII; const ARMSubtarget &STI; private: - /// RS - An instance of the register scavenger. - RegScavenger *RS; - /// FramePtr - ARM physical register used as frame ptr. unsigned FramePtr; public: ARMRegisterInfo(const TargetInstrInfo &tii, const ARMSubtarget &STI); - ~ARMRegisterInfo(); - /// getRegisterNumbering - Given the enum value for some register, e.g. /// ARM::LR, return the number that it corresponds to (e.g. 14). static unsigned getRegisterNumbering(unsigned RegEnum); @@ -74,6 +69,8 @@ BitVector getReservedRegs(const MachineFunction &MF) const; + bool isReservedReg(const MachineFunction &MF, unsigned Reg) const; + bool requiresRegisterScavenging(const MachineFunction &MF) const; bool hasFP(const MachineFunction &MF) const; @@ -85,7 +82,8 @@ void eliminateFrameIndex(MachineBasicBlock::iterator II, RegScavenger *RS = NULL) const; - void processFunctionBeforeCalleeSavedScan(MachineFunction &MF) const; + void processFunctionBeforeCalleeSavedScan(MachineFunction &MF, + RegScavenger *RS = NULL) const; void emitPrologue(MachineFunction &MF) const; void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const; From evan.cheng at apple.com Tue Mar 6 04:04:55 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 6 Mar 2007 04:04:55 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/Target/MRegisterInfo.h Message-ID: <200703061004.l26A4tb4026183@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/Target: MRegisterInfo.h updated: 1.100 -> 1.101 --- Log message: Minor interface change. --- Diffs of the changes: (+3 -1) MRegisterInfo.h | 4 +++- 1 files changed, 3 insertions(+), 1 deletion(-) Index: llvm/include/llvm/Target/MRegisterInfo.h diff -u llvm/include/llvm/Target/MRegisterInfo.h:1.100 llvm/include/llvm/Target/MRegisterInfo.h:1.101 --- llvm/include/llvm/Target/MRegisterInfo.h:1.100 Tue Feb 27 18:57:39 2007 +++ llvm/include/llvm/Target/MRegisterInfo.h Tue Mar 6 04:04:38 2007 @@ -433,7 +433,9 @@ /// processFunctionBeforeCalleeSavedScan - This method is called immediately /// before PrologEpilogInserter scans the physical registers used to determine /// what callee saved registers should be spilled. This method is optional. - virtual void processFunctionBeforeCalleeSavedScan(MachineFunction &MF) const { + virtual void processFunctionBeforeCalleeSavedScan(MachineFunction &MF, + RegScavenger *RS = NULL) const { + } /// processFunctionBeforeFrameFinalized - This method is called immediately From baldrick at free.fr Tue Mar 6 10:25:32 2007 From: baldrick at free.fr (Duncan Sands) Date: Tue, 6 Mar 2007 17:25:32 +0100 Subject: [llvm-commits] llvm-gcc: better support for variable size struct fields Message-ID: <200703061725.32640.baldrick@free.fr> This patch applies on top of the previously posted patch "llvm-gcc: use component_ref_field_offset in component references", http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20070226/045399.html. This fixes wrong handling of structs containing more than one variable sized field. Two C testcases are attached. Consider for example the struct from VarSizeInStruct1: struct f { char w; char x[n]; char z[]; }; DecodeStructFields does the following: it creates a field for w; it skips x; it doesn't skip z because it is the last field, however it thinks it starts at byte offset 0 because it starts at the variable offset n+1, and so pops w out of the struct and replaces it with z, leading to the LLVM struct { [0 * i8] }. This causes an assertion failure later on in EmitLV_COMPONENT_REF. The other testcase is similar, and leads to a different assertion failure. I first prepared a minimal fix, but later noticed that the code for handling variable sized struct fields was unnecessarily complicated and came up with this more involved patch, which removes a bunch of special casing. The existing code seems rather fixated on whether TYPE_SIZE is constant or not, when what really matters is whether the field starts at a constant offset. I simply skip over fields if and only if they don't start at a constant offset, and let variable sized fields be emitted and indexed like any others (no more ~0U field indices). I remove the special casing for ~0U field indices everywhere in favour of the generic code, for example in EmitLV_COMPONENT_REF. The only place where something still needs to be done is in ConvertRecordCONSTRUCTOR, but there too the code simplifies. I see no additional failures in the regression test suite or in MultiSource with these changes. Enjoy! Duncan. -------------- next part -------------- A non-text attachment was scrubbed... Name: var_size.diff Type: text/x-diff Size: 8878 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20070306/75035ac5/attachment.bin -------------- next part -------------- A non-text attachment was scrubbed... Name: 2007-03-06-VarSizeInStruct1.c Type: text/x-csrc Size: 128 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20070306/75035ac5/attachment-0001.bin -------------- next part -------------- A non-text attachment was scrubbed... Name: 2007-03-06-VarSizeInStruct2.c Type: text/x-csrc Size: 119 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20070306/75035ac5/attachment-0002.bin From dpatel at apple.com Tue Mar 6 10:59:20 2007 From: dpatel at apple.com (Devang Patel) Date: Tue, 6 Mar 2007 10:59:20 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/Analysis/LoopPass.h Message-ID: <200703061659.l26GxKp8000880@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/Analysis: LoopPass.h updated: 1.8 -> 1.9 --- Log message: LPPassManager : Add initialization and finalizatino hooks. --- Diffs of the changes: (+9 -0) LoopPass.h | 9 +++++++++ 1 files changed, 9 insertions(+) Index: llvm/include/llvm/Analysis/LoopPass.h diff -u llvm/include/llvm/Analysis/LoopPass.h:1.8 llvm/include/llvm/Analysis/LoopPass.h:1.9 --- llvm/include/llvm/Analysis/LoopPass.h:1.8 Mon Mar 5 20:30:46 2007 +++ llvm/include/llvm/Analysis/LoopPass.h Tue Mar 6 10:59:03 2007 @@ -36,6 +36,15 @@ return false; } + // Initialization and finalization hooks. + virtual bool doInitialization(Loop *L, LPPassManager &LPM) { + return false; + } + + // Finalization hook does not supply Loop because at this time + // loop nest is completely different. + virtual bool doFinalization() { return false; } + /// Assign pass manager to manager this pass virtual void assignPassManager(PMStack &PMS, PassManagerType PMT = PMT_LoopPassManager); From dpatel at apple.com Tue Mar 6 10:59:22 2007 From: dpatel at apple.com (Devang Patel) Date: Tue, 6 Mar 2007 10:59:22 -0600 Subject: [llvm-commits] CVS: llvm/lib/Analysis/LoopPass.cpp Message-ID: <200703061659.l26GxMDt000885@zion.cs.uiuc.edu> Changes in directory llvm/lib/Analysis: LoopPass.cpp updated: 1.10 -> 1.11 --- Log message: LPPassManager : Add initialization and finalizatino hooks. --- Diffs of the changes: (+20 -0) LoopPass.cpp | 20 ++++++++++++++++++++ 1 files changed, 20 insertions(+) Index: llvm/lib/Analysis/LoopPass.cpp diff -u llvm/lib/Analysis/LoopPass.cpp:1.10 llvm/lib/Analysis/LoopPass.cpp:1.11 --- llvm/lib/Analysis/LoopPass.cpp:1.10 Mon Mar 5 20:30:46 2007 +++ llvm/lib/Analysis/LoopPass.cpp Tue Mar 6 10:59:03 2007 @@ -57,6 +57,18 @@ for (LoopInfo::iterator I = LI.begin(), E = LI.end(); I != E; ++I) addLoopIntoQueue(*I, LQ); + // Initialization + for (std::deque::const_iterator I = LQ.begin(), E = LQ.end(); + I != E; ++I) { + Loop *L = *I; + for (unsigned Index = 0; Index < getNumContainedPasses(); ++Index) { + Pass *P = getContainedPass(Index); + LoopPass *LP = dynamic_cast(P); + if (LP) + Changed |= LP->doInitialization(L, *this); + } + } + // Walk Loops while (!LQ.empty()) { @@ -101,6 +113,14 @@ if (redoThisLoop) LQ.push_back(L); } + + // Finalization + for (unsigned Index = 0; Index < getNumContainedPasses(); ++Index) { + Pass *P = getContainedPass(Index); + LoopPass *LP = dynamic_cast (P); + if (LP) + Changed |= LP->doFinalization(); + } return Changed; } From rspencer at reidspencer.com Tue Mar 6 11:19:43 2007 From: rspencer at reidspencer.com (Reid Spencer) Date: Tue, 06 Mar 2007 09:19:43 -0800 Subject: [llvm-commits] CVS: llvm/examples/Makefile In-Reply-To: <200703060730.l267UKPh013991@zion.cs.uiuc.edu> References: <200703060730.l267UKPh013991@zion.cs.uiuc.edu> Message-ID: <1173201583.24497.141.camel@bashful.x10sys.com> On Tue, 2007-03-06 at 01:30 -0600, Chris Lattner wrote: > > Changes in directory llvm/examples: > > Makefile updated: 1.8 -> 1.9 > --- > Log message: > > temporarily disable this until Reid has a chance to fix it. What's wrong with it? > > > --- > Diffs of the changes: (+2 -2) > > Makefile | 4 ++-- > 1 files changed, 2 insertions(+), 2 deletions(-) > > > Index: llvm/examples/Makefile > diff -u llvm/examples/Makefile:1.8 llvm/examples/Makefile:1.9 > --- llvm/examples/Makefile:1.8 Thu Nov 30 18:37:14 2006 > +++ llvm/examples/Makefile Tue Mar 6 01:30:03 2007 > @@ -10,10 +10,10 @@ > > include $(LEVEL)/Makefile.config > > -PARALLEL_DIRS:= Fibonacci HowToUseJIT ModuleMaker BFtoLLVM > +#PARALLEL_DIRS:= Fibonacci HowToUseJIT ModuleMaker BFtoLLVM > > ifeq ($(HAVE_PTHREAD),1) > -PARALLEL_DIRS += ParallelJIT > +#PARALLEL_DIRS += ParallelJIT > endif > > include $(LEVEL)/Makefile.common > > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From dpatel at apple.com Tue Mar 6 11:22:03 2007 From: dpatel at apple.com (Devang Patel) Date: Tue, 6 Mar 2007 09:22:03 -0800 Subject: [llvm-commits] CVS: llvm/examples/Makefile In-Reply-To: <1173201583.24497.141.camel@bashful.x10sys.com> References: <200703060730.l267UKPh013991@zion.cs.uiuc.edu> <1173201583.24497.141.camel@bashful.x10sys.com> Message-ID: On Mar 6, 2007, at 9:19 AM, Reid Spencer wrote: > On Tue, 2007-03-06 at 01:30 -0600, Chris Lattner wrote: >> >> Changes in directory llvm/examples: >> >> Makefile updated: 1.8 -> 1.9 >> --- >> Log message: >> >> temporarily disable this until Reid has a chance to fix it. > > What's wrong with it? From: isanbard at gmail.com Subject: [LLVMbugs] Build broke again Date: March 5, 2007 11:17:10 PM PST To: llvmbugs at cs.uiuc.edu I'm getting this: llvm[2]: Compiling fibonacci.cpp for Debug build /Users/wendling/llvm/llvm.src/examples/Fibonacci/fibonacci.cpp: In function 'int main(int, char**)': /Users/wendling/llvm/llvm.src/examples/Fibonacci/fibonacci.cpp:115: error: 'struct llvm::GenericValue' has no member named 'Int32Val' /Users/wendling/llvm/llvm.src/examples/Fibonacci/fibonacci.cpp:119: error: 'struct llvm::GenericValue' has no member named 'Int32Val' make[2]: *** [/Users/wendling/llvm/llvm.obj/examples/Fibonacci/Debug/ fibonacci.o] Error 1 make[1]: *** [Fibonacci/.makeall] Error 2 make: *** [all] Error 1 -bw _____ -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20070306/114edbbc/attachment.html From reid at x10sys.com Tue Mar 6 11:24:51 2007 From: reid at x10sys.com (Reid Spencer) Date: Tue, 6 Mar 2007 11:24:51 -0600 Subject: [llvm-commits] CVS: llvm/examples/ParallelJIT/ParallelJIT.cpp Message-ID: <200703061724.l26HOpet001352@zion.cs.uiuc.edu> Changes in directory llvm/examples/ParallelJIT: ParallelJIT.cpp updated: 1.10 -> 1.11 --- Log message: Adjust for changes in GenericValue type. --- Diffs of the changes: (+2 -2) ParallelJIT.cpp | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/examples/ParallelJIT/ParallelJIT.cpp diff -u llvm/examples/ParallelJIT/ParallelJIT.cpp:1.10 llvm/examples/ParallelJIT/ParallelJIT.cpp:1.11 --- llvm/examples/ParallelJIT/ParallelJIT.cpp:1.10 Fri Jan 19 16:45:50 2007 +++ llvm/examples/ParallelJIT/ParallelJIT.cpp Tue Mar 6 11:24:31 2007 @@ -221,12 +221,12 @@ // Call the `foo' function with no arguments: std::vector Args(1); - Args[0].Int32Val = p->value; + Args[0].IntVal = APInt(32, p->value); synchronize.block(); // wait until other threads are at this point GenericValue gv = p->EE->runFunction(p->F, Args); - return (void*) intptr_t(gv.Int32Val); + return (void*)(intptr_t)gv.IntVal.getZExtValue(); } int main() From reid at x10sys.com Tue Mar 6 11:24:53 2007 From: reid at x10sys.com (Reid Spencer) Date: Tue, 6 Mar 2007 11:24:53 -0600 Subject: [llvm-commits] CVS: llvm/examples/Fibonacci/fibonacci.cpp Message-ID: <200703061724.l26HOr3h001362@zion.cs.uiuc.edu> Changes in directory llvm/examples/Fibonacci: fibonacci.cpp updated: 1.15 -> 1.16 --- Log message: Adjust for changes in GenericValue type. --- Diffs of the changes: (+2 -2) fibonacci.cpp | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/examples/Fibonacci/fibonacci.cpp diff -u llvm/examples/Fibonacci/fibonacci.cpp:1.15 llvm/examples/Fibonacci/fibonacci.cpp:1.16 --- llvm/examples/Fibonacci/fibonacci.cpp:1.15 Sun Jan 7 01:40:09 2007 +++ llvm/examples/Fibonacci/fibonacci.cpp Tue Mar 6 11:24:31 2007 @@ -112,10 +112,10 @@ // Call the Fibonacci function with argument n: std::vector Args(1); - Args[0].Int32Val = n; + Args[0].IntVal = APInt(32, n); GenericValue GV = EE->runFunction(FibF, Args); // import result of execution - std::cout << "Result: " << GV.Int32Val << "\n"; + std::cout << "Result: " << GV.IntVal.toString(10) << "\n"; return 0; } From reid at x10sys.com Tue Mar 6 11:24:52 2007 From: reid at x10sys.com (Reid Spencer) Date: Tue, 6 Mar 2007 11:24:52 -0600 Subject: [llvm-commits] CVS: llvm/examples/HowToUseJIT/HowToUseJIT.cpp Message-ID: <200703061724.l26HOq2t001357@zion.cs.uiuc.edu> Changes in directory llvm/examples/HowToUseJIT: HowToUseJIT.cpp updated: 1.16 -> 1.17 --- Log message: Adjust for changes in GenericValue type. --- Diffs of the changes: (+1 -1) HowToUseJIT.cpp | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/examples/HowToUseJIT/HowToUseJIT.cpp diff -u llvm/examples/HowToUseJIT/HowToUseJIT.cpp:1.16 llvm/examples/HowToUseJIT/HowToUseJIT.cpp:1.17 --- llvm/examples/HowToUseJIT/HowToUseJIT.cpp:1.16 Tue Feb 13 00:06:26 2007 +++ llvm/examples/HowToUseJIT/HowToUseJIT.cpp Tue Mar 6 11:24:31 2007 @@ -107,6 +107,6 @@ GenericValue gv = EE->runFunction(FooF, noargs); // Import result of execution: - std::cout << "Result: " << gv.Int32Val << "\n"; + std::cout << "Result: " << gv.IntVal.toString(10) << "\n"; return 0; } From reid at x10sys.com Tue Mar 6 11:26:31 2007 From: reid at x10sys.com (Reid Spencer) Date: Tue, 6 Mar 2007 11:26:31 -0600 Subject: [llvm-commits] CVS: llvm/examples/Makefile Message-ID: <200703061726.l26HQV3m001408@zion.cs.uiuc.edu> Changes in directory llvm/examples: Makefile updated: 1.9 -> 1.10 --- Log message: Revert last patch. The examples build now. --- Diffs of the changes: (+2 -2) Makefile | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/examples/Makefile diff -u llvm/examples/Makefile:1.9 llvm/examples/Makefile:1.10 --- llvm/examples/Makefile:1.9 Tue Mar 6 01:30:03 2007 +++ llvm/examples/Makefile Tue Mar 6 11:26:14 2007 @@ -10,10 +10,10 @@ include $(LEVEL)/Makefile.config -#PARALLEL_DIRS:= Fibonacci HowToUseJIT ModuleMaker BFtoLLVM +PARALLEL_DIRS:= Fibonacci HowToUseJIT ModuleMaker BFtoLLVM ifeq ($(HAVE_PTHREAD),1) -#PARALLEL_DIRS += ParallelJIT +PARALLEL_DIRS += ParallelJIT endif include $(LEVEL)/Makefile.common From reid at x10sys.com Tue Mar 6 11:45:00 2007 From: reid at x10sys.com (Reid Spencer) Date: Tue, 6 Mar 2007 11:45:00 -0600 Subject: [llvm-commits] CVS: llvm/test/CFrontend/2003-08-17-DeadCodeShortCircuit.c.tr Message-ID: <200703061745.l26Hj0aR001746@zion.cs.uiuc.edu> Changes in directory llvm/test/CFrontend: 2003-08-17-DeadCodeShortCircuit.c.tr updated: 1.2 -> 1.3 --- Log message: Fix this to put its output in the output directory. --- Diffs of the changes: (+1 -1) 2003-08-17-DeadCodeShortCircuit.c.tr | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/test/CFrontend/2003-08-17-DeadCodeShortCircuit.c.tr diff -u llvm/test/CFrontend/2003-08-17-DeadCodeShortCircuit.c.tr:1.2 llvm/test/CFrontend/2003-08-17-DeadCodeShortCircuit.c.tr:1.3 --- llvm/test/CFrontend/2003-08-17-DeadCodeShortCircuit.c.tr:1.2 Thu Nov 6 15:13:45 2003 +++ llvm/test/CFrontend/2003-08-17-DeadCodeShortCircuit.c.tr Tue Mar 6 11:44:43 2007 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -xc %s -c +// RUN: %llvmgcc -xc %s -c -o %t.o int test(_Bool pos, _Bool color) { return 0; From reid at x10sys.com Tue Mar 6 11:47:02 2007 From: reid at x10sys.com (Reid Spencer) Date: Tue, 6 Mar 2007 11:47:02 -0600 Subject: [llvm-commits] CVS: llvm-stacker/lib/compiler/StackerCompiler.cpp Message-ID: <200703061747.l26Hl2Aj001788@zion.cs.uiuc.edu> Changes in directory llvm-stacker/lib/compiler: StackerCompiler.cpp updated: 1.35 -> 1.36 --- Log message: Update for new ConstantInt interface, to prevent compiler warning. --- Diffs of the changes: (+1 -1) StackerCompiler.cpp | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm-stacker/lib/compiler/StackerCompiler.cpp diff -u llvm-stacker/lib/compiler/StackerCompiler.cpp:1.35 llvm-stacker/lib/compiler/StackerCompiler.cpp:1.36 --- llvm-stacker/lib/compiler/StackerCompiler.cpp:1.35 Sun Feb 18 23:05:07 2007 +++ llvm-stacker/lib/compiler/StackerCompiler.cpp Tue Mar 6 11:46:45 2007 @@ -1092,7 +1092,7 @@ // bb->getInstList().push_back( negop ); // So we'll multiply by -1 (ugh) BinaryOperator* multop = BinaryOperator::create( Instruction::Mul, op1, - ConstantInt::get( Type::Int64Ty, -1 ) ); + ConstantInt::get( Type::Int64Ty, -1ULL ) ); bb->getInstList().push_back( multop ); push_value( bb, multop ); break; From reid at x10sys.com Tue Mar 6 11:48:42 2007 From: reid at x10sys.com (Reid Spencer) Date: Tue, 6 Mar 2007 11:48:42 -0600 Subject: [llvm-commits] CVS: llvm/test/CFrontend/2007-03-05-DataLayout.c Message-ID: <200703061748.l26Hmg3p001825@zion.cs.uiuc.edu> Changes in directory llvm/test/CFrontend: 2007-03-05-DataLayout.c updated: 1.1 -> 1.2 --- Log message: Don't run lli in llvm-test. Instead just check that the datalayout string is the right length. --- Diffs of the changes: (+1 -1) 2007-03-05-DataLayout.c | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/test/CFrontend/2007-03-05-DataLayout.c diff -u llvm/test/CFrontend/2007-03-05-DataLayout.c:1.1 llvm/test/CFrontend/2007-03-05-DataLayout.c:1.2 --- llvm/test/CFrontend/2007-03-05-DataLayout.c:1.1 Mon Mar 5 21:00:17 2007 +++ llvm/test/CFrontend/2007-03-05-DataLayout.c Tue Mar 6 11:48:25 2007 @@ -1,5 +1,5 @@ // Testcase for PR1242 -// RUN: %llvmgcc -c %s -o %t && lli --force-interpreter=1 %t +// RUN: %llvmgcc -S %s -o - | grep datalayout | wc -c | grep 130 #include #define NDIM 3 #define BODY 01 From dpatel at apple.com Tue Mar 6 11:53:11 2007 From: dpatel at apple.com (Devang Patel) Date: Tue, 6 Mar 2007 11:53:11 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/PassManagers.h Message-ID: <200703061753.l26HrBPp001932@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm: PassManagers.h updated: 1.13 -> 1.14 --- Log message: Keep track of higher level analysis. --- Diffs of the changes: (+9 -0) PassManagers.h | 9 +++++++++ 1 files changed, 9 insertions(+) Index: llvm/include/llvm/PassManagers.h diff -u llvm/include/llvm/PassManagers.h:1.13 llvm/include/llvm/PassManagers.h:1.14 --- llvm/include/llvm/PassManagers.h:1.13 Mon Mar 5 19:55:46 2007 +++ llvm/include/llvm/PassManagers.h Tue Mar 6 11:52:53 2007 @@ -228,6 +228,11 @@ InheritedAnalysis[i] = NULL; } + // Return true if P preserves high level analysis used by other + // passes that are managed by this manager. + bool preserveHigherLevelAnalysis(Pass *P); + + /// Populate RequiredPasses with the analysis pass that are required by /// pass P. void collectRequiredAnalysisPasses(std::vector &RequiredPasses, @@ -298,6 +303,10 @@ // scheduled to run. std::map AvailableAnalysis; + // Collection of higher level analysis used by the pass managed by + // this manager. + std::vector HigherLevelAnalysis; + unsigned Depth; }; From dpatel at apple.com Tue Mar 6 11:53:12 2007 From: dpatel at apple.com (Devang Patel) Date: Tue, 6 Mar 2007 11:53:12 -0600 Subject: [llvm-commits] CVS: llvm/lib/VMCore/PassManager.cpp Message-ID: <200703061753.l26HrCq2001937@zion.cs.uiuc.edu> Changes in directory llvm/lib/VMCore: PassManager.cpp updated: 1.144 -> 1.145 --- Log message: Keep track of higher level analysis. --- Diffs of the changes: (+26 -0) PassManager.cpp | 26 ++++++++++++++++++++++++++ 1 files changed, 26 insertions(+) Index: llvm/lib/VMCore/PassManager.cpp diff -u llvm/lib/VMCore/PassManager.cpp:1.144 llvm/lib/VMCore/PassManager.cpp:1.145 --- llvm/lib/VMCore/PassManager.cpp:1.144 Mon Mar 5 19:55:46 2007 +++ llvm/lib/VMCore/PassManager.cpp Tue Mar 6 11:52:53 2007 @@ -532,6 +532,30 @@ } } +// Return true if P preserves high level analysis used by other +// passes managed by this manager +bool PMDataManager::preserveHigherLevelAnalysis(Pass *P) { + + AnalysisUsage AnUsage; + P->getAnalysisUsage(AnUsage); + + if (AnUsage.getPreservesAll()) + return true; + + const std::vector &PreservedSet = AnUsage.getPreservedSet(); + for (std::vector::iterator I = HigherLevelAnalysis.begin(), + E = HigherLevelAnalysis.end(); I != E; ++I) { + Pass *P1 = *I; + if (std::find(PreservedSet.begin(), PreservedSet.end(), P1->getPassInfo()) == + PreservedSet.end()) { + if (!dynamic_cast(P1)) + return false; + } + } + + return true; +} + /// Remove Analyss not preserved by Pass P void PMDataManager::removeNotPreservedAnalysis(Pass *P) { AnalysisUsage AnUsage; @@ -634,6 +658,8 @@ else if (PDepth > RDepth) { // Let the parent claim responsibility of last use TransferLastUses.push_back(PRequired); + // Keep track of higher level analysis used by this manager. + HigherLevelAnalysis.push_back(PRequired); } else { // Note : This feature is not yet implemented assert (0 && From dpatel at apple.com Tue Mar 6 11:59:54 2007 From: dpatel at apple.com (Devang Patel) Date: Tue, 6 Mar 2007 11:59:54 -0600 Subject: [llvm-commits] CVS: llvm/lib/Analysis/LoopPass.cpp Message-ID: <200703061759.l26HxsJf002061@zion.cs.uiuc.edu> Changes in directory llvm/lib/Analysis: LoopPass.cpp updated: 1.11 -> 1.12 --- Log message: LPPassManager. Implement preparePassManager() hook. --- Diffs of the changes: (+25 -0) LoopPass.cpp | 25 +++++++++++++++++++++++++ 1 files changed, 25 insertions(+) Index: llvm/lib/Analysis/LoopPass.cpp diff -u llvm/lib/Analysis/LoopPass.cpp:1.11 llvm/lib/Analysis/LoopPass.cpp:1.12 --- llvm/lib/Analysis/LoopPass.cpp:1.11 Tue Mar 6 10:59:03 2007 +++ llvm/lib/Analysis/LoopPass.cpp Tue Mar 6 11:59:37 2007 @@ -129,6 +129,31 @@ //===----------------------------------------------------------------------===// // LoopPass +// Check if this pass is suitable for the current LPPassManager, if +// available. This pass P is not suitable for a LPPassManager if P +// is not preserving higher level analysis info used by other +// LPPassManager passes. In such case, pop LPPassManager from the +// stack. This will force assignPassManager() to create new +// LPPassManger as expected. +void LoopPass::preparePassManager(PMStack &PMS) { + + // Find LPPassManager + while (!PMS.empty()) { + if (PMS.top()->getPassManagerType() > PMT_LoopPassManager) + PMS.pop(); + else; + break; + } + + LPPassManager *LPPM = dynamic_cast(PMS.top()); + + // If this pass is destroying high level information that is used + // by other passes that are managed by LPM then do not insert + // this pass in current LPM. Use new LPPassManager. + if (LPPM && !LPPM->preserveHigherLevelAnalysis(this)) + PMS.pop(); +} + /// Assign pass manager to manage this pass. void LoopPass::assignPassManager(PMStack &PMS, PassManagerType PreferredType) { From dpatel at apple.com Tue Mar 6 11:59:56 2007 From: dpatel at apple.com (Devang Patel) Date: Tue, 6 Mar 2007 11:59:56 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/Analysis/LoopPass.h Message-ID: <200703061759.l26HxuYH002066@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/Analysis: LoopPass.h updated: 1.9 -> 1.10 --- Log message: LPPassManager. Implement preparePassManager() hook. --- Diffs of the changes: (+9 -1) LoopPass.h | 10 +++++++++- 1 files changed, 9 insertions(+), 1 deletion(-) Index: llvm/include/llvm/Analysis/LoopPass.h diff -u llvm/include/llvm/Analysis/LoopPass.h:1.9 llvm/include/llvm/Analysis/LoopPass.h:1.10 --- llvm/include/llvm/Analysis/LoopPass.h:1.9 Tue Mar 6 10:59:03 2007 +++ llvm/include/llvm/Analysis/LoopPass.h Tue Mar 6 11:59:37 2007 @@ -44,7 +44,15 @@ // Finalization hook does not supply Loop because at this time // loop nest is completely different. virtual bool doFinalization() { return false; } - + + // Check if this pass is suitable for the current LPPassManager, if + // available. This pass P is not suitable for a LPPassManager if P + // is not preserving higher level analysis info used by other + // LPPassManager passes. In such case, pop LPPassManager from the + // stack. This will force assignPassManager() to create new + // LPPassManger as expected. + void preparePassManager(PMStack &PMS); + /// Assign pass manager to manager this pass virtual void assignPassManager(PMStack &PMS, PassManagerType PMT = PMT_LoopPassManager); From evan.cheng at apple.com Tue Mar 6 12:02:58 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 6 Mar 2007 12:02:58 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp Message-ID: <200703061802.l26I2wVa002141@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/ARM: ARMLoadStoreOptimizer.cpp updated: 1.1 -> 1.2 --- Log message: Code clean up. Prepare to use register scavenger. --- Diffs of the changes: (+37 -22) ARMLoadStoreOptimizer.cpp | 59 ++++++++++++++++++++++++++++------------------ 1 files changed, 37 insertions(+), 22 deletions(-) Index: llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp diff -u llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp:1.1 llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp:1.2 --- llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp:1.1 Fri Jan 19 01:51:42 2007 +++ llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp Tue Mar 6 12:02:41 2007 @@ -23,7 +23,9 @@ #include "llvm/CodeGen/MachineFunctionPass.h" #include "llvm/CodeGen/MachineInstr.h" #include "llvm/CodeGen/MachineInstrBuilder.h" +#include "llvm/CodeGen/RegisterScavenging.h" #include "llvm/Support/Compiler.h" +#include "llvm/Target/MRegisterInfo.h" #include "llvm/Target/TargetInstrInfo.h" #include "llvm/Target/TargetMachine.h" using namespace llvm; @@ -36,6 +38,8 @@ namespace { struct VISIBILITY_HIDDEN ARMLoadStoreOpt : public MachineFunctionPass { const TargetInstrInfo *TII; + const MRegisterInfo *MRI; + RegScavenger *RS; virtual bool runOnMachineFunction(MachineFunction &Fn); @@ -448,6 +452,25 @@ return true; } +/// isMemoryOp - Returns true if instruction is a memory operations (that this +/// pass is capable of operating on). +static bool isMemoryOp(MachineInstr *MI) { + int Opcode = MI->getOpcode(); + switch (Opcode) { + default: break; + case ARM::LDR: + case ARM::STR: + return MI->getOperand(1).isRegister() && MI->getOperand(2).getReg() == 0; + case ARM::FLDS: + case ARM::FSTS: + return MI->getOperand(1).isRegister(); + case ARM::FLDD: + case ARM::FSTD: + return MI->getOperand(1).isRegister(); + } + return false; +} + /// LoadStoreMultipleOpti - An optimization pass to turn multiple LDR / STR /// ops of the same base and incrementing offset into LDM / STM ops. bool ARMLoadStoreOpt::LoadStoreMultipleOpti(MachineBasicBlock &MBB) { @@ -458,34 +481,20 @@ int CurrOpc = -1; unsigned CurrSize = 0; unsigned Position = 0; + + if (RS) RS->enterBasicBlock(&MBB); MachineBasicBlock::iterator MBBI = MBB.begin(), E = MBB.end(); while (MBBI != E) { bool Advance = false; bool TryMerge = false; bool Clobber = false; - int Opcode = MBBI->getOpcode(); - bool isMemOp = false; - bool isAM2 = false; - unsigned Size = 4; - switch (Opcode) { - case ARM::LDR: - case ARM::STR: - isMemOp = - (MBBI->getOperand(1).isRegister() && MBBI->getOperand(2).getReg() == 0); - isAM2 = true; - break; - case ARM::FLDS: - case ARM::FSTS: - isMemOp = MBBI->getOperand(1).isRegister(); - break; - case ARM::FLDD: - case ARM::FSTD: - isMemOp = MBBI->getOperand(1).isRegister(); - Size = 8; - break; - } + bool isMemOp = isMemoryOp(MBBI); if (isMemOp) { + int Opcode = MBBI->getOpcode(); + bool isAM2 = Opcode == ARM::LDR || Opcode == ARM::STR; + unsigned Size = getLSMultipleTransferSize(MBBI); + unsigned Base = MBBI->getOperand(1).getReg(); unsigned OffIdx = MBBI->getNumOperands()-1; unsigned OffField = MBBI->getOperand(OffIdx).getImm(); @@ -616,7 +625,11 @@ } bool ARMLoadStoreOpt::runOnMachineFunction(MachineFunction &Fn) { - TII = Fn.getTarget().getInstrInfo(); + const TargetMachine &TM = Fn.getTarget(); + TII = TM.getInstrInfo(); + MRI = TM.getRegisterInfo(); + RS = MRI->requiresRegisterScavenging(Fn) ? new RegScavenger() : NULL; + bool Modified = false; for (MachineFunction::iterator MFI = Fn.begin(), E = Fn.end(); MFI != E; ++MFI) { @@ -624,5 +637,7 @@ Modified |= LoadStoreMultipleOpti(MBB); Modified |= MergeReturnIntoLDM(MBB); } + + delete RS; return Modified; } From nicolas.geoffray at lip6.fr Tue Mar 6 12:03:00 2007 From: nicolas.geoffray at lip6.fr (Nicolas Geoffray) Date: Tue, 06 Mar 2007 19:03:00 +0100 Subject: [llvm-commits] Stack and register alignment in linux/ppc calls Message-ID: <45EDACD4.5050407@lip6.fr> This patch corrects arguments passing alignment for linux/ppc calls (ELF ABI). It affects LowerFORMAL_ARGUMENTS and LowerCALL of PPCISelLowering.cpp. OK to commit? -------------- next part -------------- A non-text attachment was scrubbed... Name: calling-conv-ELF.patch Type: text/x-patch Size: 7173 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20070306/8ad3c1cb/attachment.bin From nicolas.geoffray at lip6.fr Tue Mar 6 12:11:36 2007 From: nicolas.geoffray at lip6.fr (Nicolas Geoffray) Date: Tue, 06 Mar 2007 19:11:36 +0100 Subject: [llvm-commits] Stack and register alignment in linux/ppc calls In-Reply-To: <45EDACD4.5050407@lip6.fr> References: <45EDACD4.5050407@lip6.fr> Message-ID: <45EDAED8.2040902@lip6.fr> Small mistake, here's the correct patch. Nicolas Nicolas Geoffray wrote: > This patch corrects arguments passing alignment for linux/ppc calls > (ELF ABI). > It affects LowerFORMAL_ARGUMENTS and LowerCALL of PPCISelLowering.cpp. > > OK to commit? > -------------- next part -------------- A non-text attachment was scrubbed... Name: calling-conv-ELF.patch Type: text/x-patch Size: 7172 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20070306/916c3de0/attachment.bin From clattner at apple.com Tue Mar 6 12:29:05 2007 From: clattner at apple.com (Chris Lattner) Date: Tue, 6 Mar 2007 10:29:05 -0800 Subject: [llvm-commits] CVS: llvm/test/CFrontend/2007-03-05-DataLayout.c In-Reply-To: <200703061748.l26Hmg3p001825@zion.cs.uiuc.edu> References: <200703061748.l26Hmg3p001825@zion.cs.uiuc.edu> Message-ID: > > Index: llvm/test/CFrontend/2007-03-05-DataLayout.c > diff -u llvm/test/CFrontend/2007-03-05-DataLayout.c:1.1 llvm/test/ > CFrontend/2007-03-05-DataLayout.c:1.2 > --- llvm/test/CFrontend/2007-03-05-DataLayout.c:1.1 Mon Mar 5 > 21:00:17 2007 > +++ llvm/test/CFrontend/2007-03-05-DataLayout.c Tue Mar 6 11:48:25 > 2007 > @@ -1,5 +1,5 @@ > // Testcase for PR1242 > -// RUN: %llvmgcc -c %s -o %t && lli --force-interpreter=1 %t > +// RUN: %llvmgcc -S %s -o - | grep datalayout | wc -c | grep 130 > #include This will fail when run on a non-linux platform. Please check that the length is > 6 characters, or whatever the old string was. -Chris From clattner at apple.com Tue Mar 6 12:34:15 2007 From: clattner at apple.com (Chris Lattner) Date: Tue, 6 Mar 2007 10:34:15 -0800 Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/SelectionDAGISel.h In-Reply-To: <200703060610.l266Aqj7012420@zion.cs.uiuc.edu> References: <200703060610.l266Aqj7012420@zion.cs.uiuc.edu> Message-ID: <54EA5BE3-50C8-4545-B8CD-CF18BEC88390@apple.com> > Enumerate SDISel formal parameter attributes. Make use of new > enumeration. Cool. > + namespace SDISelParamFlags { > + enum Flags { > + NoFlagSet = 0, > + Signed = 1<<0, > + SignedOffs = 0, Can you please rename 'Signed' to 'SExt' for consistency? Can you please also add "ZExt" as well? -Chris > + InReg = 1<<1, > + InRegOffs = 1, > + StructReturn = 1<<2, > + StructReturnOffs = 2, > + OrigAlignment = 0x1F<<27, > + OrigAlignmentOffs = 27 > + }; > + } > + > /// SelectionDAGISel - This is the common base class used for > SelectionDAG-based > /// pattern-matching instruction selectors. > class SelectionDAGISel : public FunctionPass { > > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From clattner at apple.com Tue Mar 6 12:35:55 2007 From: clattner at apple.com (Chris Lattner) Date: Tue, 6 Mar 2007 10:35:55 -0800 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp In-Reply-To: <200703060610.l266ApMM012415@zion.cs.uiuc.edu> References: <200703060610.l266ApMM012415@zion.cs.uiuc.edu> Message-ID: > // FIXME: Distinguish between a formal with no [sz]ext > attribute from one > // that is zero extended! > if (FTy->paramHasAttr(j, FunctionType::ZExtAttribute)) > - Flags |= 0; > + Flags &= ~(SDISelParamFlags::Signed); this should set the zext bit. > case Promote: > if (MVT::isInteger(VT)) { > - unsigned ExtOp = isSigned ? ISD::SIGN_EXTEND : > ISD::ZERO_EXTEND; > + unsigned ExtOp = Args[i].isSigned ? ISD::SIGN_EXTEND : > ISD::ZERO_EXTEND; > Op = DAG.getNode(ExtOp, getTypeToTransformTo(VT), Op); > } else { > assert(MVT::isFloatingPoint(VT) && "Not int or FP?"); This should use ZERO_EXTEND if zext, SIGN_EXTEND if sext, and ANY_EXTEND if neither, -Chris From clattner at apple.com Tue Mar 6 12:37:20 2007 From: clattner at apple.com (Chris Lattner) Date: Tue, 6 Mar 2007 10:37:20 -0800 Subject: [llvm-commits] CVS: llvm/lib/Target/ARM/ARMISelLowering.cpp In-Reply-To: <200703060813.l268D0a0017874@zion.cs.uiuc.edu> References: <200703060813.l268D0a0017874@zion.cs.uiuc.edu> Message-ID: > @@ -27,6 +27,7 @@ > #include "llvm/CodeGen/MachineFunction.h" > #include "llvm/CodeGen/MachineInstrBuilder.h" > #include "llvm/CodeGen/SelectionDAG.h" > +#include "llvm/CodeGen/SelectionDAGISel.h" Please put the enum into SelectionDAGNodes.h so that SDISel.h doesn't need to be pulled into other code like this. Thanks, -Chris > #include "llvm/CodeGen/SSARegMap.h" > #include "llvm/Target/TargetOptions.h" > #include "llvm/ADT/VectorExtras.h" > @@ -346,7 +347,7 @@ > NeededGPRs = 0; > StackPad = 0; > GPRPad = 0; > - unsigned align = (Flags >> 27); > + unsigned align = (Flags >> SDISelParamFlags::OrigAlignmentOffs); > GPRPad = NumGPRs % ((align + 3)/4); > StackPad = StackOffset % align; > unsigned firstGPR = NumGPRs + GPRPad; > > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From dpatel at apple.com Tue Mar 6 12:38:51 2007 From: dpatel at apple.com (Devang Patel) Date: Tue, 6 Mar 2007 12:38:51 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/Analysis/LoopPass.h Message-ID: <200703061838.l26Icpv5003243@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/Analysis: LoopPass.h updated: 1.10 -> 1.11 --- Log message: LPPassManager::deleteLoopFromQueue() add meat. Cut-n-paste code from LoopUnswitch pass. --- Diffs of the changes: (+2 -0) LoopPass.h | 2 ++ 1 files changed, 2 insertions(+) Index: llvm/include/llvm/Analysis/LoopPass.h diff -u llvm/include/llvm/Analysis/LoopPass.h:1.10 llvm/include/llvm/Analysis/LoopPass.h:1.11 --- llvm/include/llvm/Analysis/LoopPass.h:1.10 Tue Mar 6 11:59:37 2007 +++ llvm/include/llvm/Analysis/LoopPass.h Tue Mar 6 12:38:33 2007 @@ -113,6 +113,8 @@ std::deque LQ; bool skipThisLoop; bool redoThisLoop; + LoopInfo *LI; + Loop *CurrentLoop; }; } // End llvm namespace From dpatel at apple.com Tue Mar 6 12:38:52 2007 From: dpatel at apple.com (Devang Patel) Date: Tue, 6 Mar 2007 12:38:52 -0600 Subject: [llvm-commits] CVS: llvm/lib/Analysis/LoopPass.cpp Message-ID: <200703061838.l26IcqPi003248@zion.cs.uiuc.edu> Changes in directory llvm/lib/Analysis: LoopPass.cpp updated: 1.12 -> 1.13 --- Log message: LPPassManager::deleteLoopFromQueue() add meat. Cut-n-paste code from LoopUnswitch pass. --- Diffs of the changes: (+71 -7) LoopPass.cpp | 78 +++++++++++++++++++++++++++++++++++++++++++++++++++++------ 1 files changed, 71 insertions(+), 7 deletions(-) Index: llvm/lib/Analysis/LoopPass.cpp diff -u llvm/lib/Analysis/LoopPass.cpp:1.12 llvm/lib/Analysis/LoopPass.cpp:1.13 --- llvm/lib/Analysis/LoopPass.cpp:1.12 Tue Mar 6 11:59:37 2007 +++ llvm/lib/Analysis/LoopPass.cpp Tue Mar 6 12:38:33 2007 @@ -24,13 +24,77 @@ LPPassManager::LPPassManager(int Depth) : PMDataManager(Depth) { skipThisLoop = false; redoThisLoop = false; + LI = NULL; + CurrentLoop = NULL; } -/// Delete loop from the loop queue. This is used by Loop pass to inform -/// Loop Pass Manager that it should skip rest of the passes for this loop. +/// Delete loop from the loop queue and loop hierarcy (LoopInfo). void LPPassManager::deleteLoopFromQueue(Loop *L) { - // Do not pop loop from LQ here. It will be done by runOnFunction while loop. - skipThisLoop = true; + + if (Loop *ParentLoop = L->getParentLoop()) { // Not a top-level loop. + // Reparent all of the blocks in this loop. Since BBLoop had a parent, + // they are now all in it. + for (Loop::block_iterator I = L->block_begin(), E = L->block_end(); + I != E; ++I) + if (LI->getLoopFor(*I) == L) // Don't change blocks in subloops. + LI->changeLoopFor(*I, ParentLoop); + + // Remove the loop from its parent loop. + for (Loop::iterator I = ParentLoop->begin(), E = ParentLoop->end();; + ++I) { + assert(I != E && "Couldn't find loop"); + if (*I == L) { + ParentLoop->removeChildLoop(I); + break; + } + } + + // Move all subloops into the parent loop. + while (L->begin() != L->end()) + ParentLoop->addChildLoop(L->removeChildLoop(L->end()-1)); + } else { + // Reparent all of the blocks in this loop. Since BBLoop had no parent, + // they no longer in a loop at all. + + for (unsigned i = 0; i != L->getBlocks().size(); ++i) { + // Don't change blocks in subloops. + if (LI->getLoopFor(L->getBlocks()[i]) == L) { + LI->removeBlock(L->getBlocks()[i]); + --i; + } + } + + // Remove the loop from the top-level LoopInfo object. + for (LoopInfo::iterator I = LI->begin(), E = LI->end();; ++I) { + assert(I != E && "Couldn't find loop"); + if (*I == L) { + LI->removeLoop(I); + break; + } + } + + // Move all of the subloops to the top-level. + while (L->begin() != L->end()) + LI->addTopLevelLoop(L->removeChildLoop(L->end()-1)); + } + + delete L; + + // If L is current loop then skip rest of the passes and let + // runOnFunction remove L from LQ. Otherwise, remove L from LQ now + // and continue applying other passes on CurrentLoop. + if (CurrentLoop == L) { + skipThisLoop = true; + return; + } + + for (std::deque::iterator I = LQ.begin(), + E = LQ.end(); I != E; ++I) { + if (*I == L) { + LQ.erase(I); + break; + } + } } // Reoptimize this loop. LPPassManager will re-insert this loop into the @@ -72,7 +136,7 @@ // Walk Loops while (!LQ.empty()) { - Loop *L = LQ.back(); + CurrentLoop = LQ.back(); skipThisLoop = false; redoThisLoop = false; @@ -91,7 +155,7 @@ StartPassTimer(P); LoopPass *LP = dynamic_cast(P); assert (LP && "Invalid LPPassManager member"); - LP->runOnLoop(L, *this); + LP->runOnLoop(CurrentLoop, *this); StopPassTimer(P); if (Changed) @@ -111,7 +175,7 @@ LQ.pop_back(); if (redoThisLoop) - LQ.push_back(L); + LQ.push_back(CurrentLoop); } // Finalization From clattner at apple.com Tue Mar 6 12:48:18 2007 From: clattner at apple.com (Chris Lattner) Date: Tue, 6 Mar 2007 10:48:18 -0800 Subject: [llvm-commits] Fwd: [llvm-testresults] Grawp i386 nightly tester results References: <200703061529.l26FTa4V031902@zion.cs.uiuc.edu> Message-ID: Hi Reid, Can you take a look at these JIT failures? They are almost certainly GenericValue related. Thanks, -Chris Begin forwarded message: > From: Nobody > Date: March 6, 2007 7:29:36 AM PST > To: llvm-testresults at cs.uiuc.edu > Subject: [llvm-testresults] Grawp i386 nightly tester results > > http://llvm.org/nightlytest/test.php?machine=64&night=2376 > Name: grawp.apple.com > Nickname: Grawp > Buildstatus: OK > > New Test Passes: > None > > New Test Failures: > Applications/kimwitu++/kc [JIT codegen, JIT] > Applications/lambda-0.1.3/lambda [JIT codegen, JIT] > Benchmarks/CoyoteBench/fftbench [JIT codegen, JIT] > Benchmarks/Prolangs-C++/city/city [JIT codegen, JIT] > Benchmarks/Prolangs-C++/deriv1/deriv1 [JIT codegen, JIT] > Benchmarks/Prolangs-C++/deriv2/deriv2 [JIT codegen, JIT] > Benchmarks/Prolangs-C++/employ/employ [JIT codegen, JIT] > Benchmarks/Prolangs-C++/family/family [JIT codegen, JIT] > Benchmarks/Prolangs-C++/garage/garage [JIT codegen, JIT] > Benchmarks/Prolangs-C++/life/life [JIT codegen, JIT] > Benchmarks/Prolangs-C++/NP/np [JIT codegen, JIT] > Benchmarks/Prolangs-C++/objects/objects [JIT codegen, JIT] > Benchmarks/Prolangs-C++/ocean/ocean [JIT codegen, JIT] > Benchmarks/Prolangs-C++/office/office [JIT codegen, JIT] > Benchmarks/Prolangs-C++/primes/primes [JIT codegen, JIT] > Benchmarks/Prolangs-C++/shapes/shapes [JIT codegen, JIT] > Benchmarks/Prolangs-C++/simul/simul [JIT codegen, JIT] > Benchmarks/Prolangs-C++/trees/trees [JIT codegen, JIT] > Benchmarks/Prolangs-C++/vcirc/vcirc [JIT codegen, JIT] > Benchmarks/Shootout-C++/methcall [JIT codegen, JIT] > Benchmarks/Shootout-C++/objinst [JIT codegen, JIT] > Benchmarks/tramp3d-v4/tramp3d-v4 [JIT codegen, ] > Nurbs/nurbs [JIT codegen, ] > SPEC/CFP2006/444.namd/444.namd [JIT codegen, JIT] > SPEC/CFP2006/447.dealII/447.dealII [JIT codegen, ] > SPEC/CINT2000/252.eon/252.eon [JIT codegen, JIT] > SPEC/CINT2006/473.astar/473.astar [JIT codegen, JIT] > > > Added Tests: > test/CFrontend/2007-03-05-DataLayout.c > test/CodeGen/X86/mmx-emms.ll > test/Transforms/InstCombine/udiv_select_to_select_shift.ll > > > Removed Tests: > None > > Significant changes in test results: > JIT: > singlesource/Benchmarks/Shootout-C++/ackermann: 9.47% (3.80 => 3.44) > singlesource/Benchmarks/Shootout/matrix: 11.57% (10.72 => 9.48) > LLC-BETA: > external/SPEC/CFP2000/179.art/179.art: 8.75% (2.40 => 2.19) > > _______________________________________________ > llvm-testresults mailing list > llvm-testresults at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-testresults From isanbard at gmail.com Tue Mar 6 12:54:00 2007 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 6 Mar 2007 12:54:00 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp X86InstrMMX.td Message-ID: <200703061854.l26Is0RJ003552@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: X86ISelLowering.cpp updated: 1.361 -> 1.362 X86InstrMMX.td updated: 1.14 -> 1.15 --- Log message: Add LOAD/STORE support for MMX. --- Diffs of the changes: (+47 -22) X86ISelLowering.cpp | 3 ++ X86InstrMMX.td | 66 ++++++++++++++++++++++++++++++++++------------------ 2 files changed, 47 insertions(+), 22 deletions(-) Index: llvm/lib/Target/X86/X86ISelLowering.cpp diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.361 llvm/lib/Target/X86/X86ISelLowering.cpp:1.362 --- llvm/lib/Target/X86/X86ISelLowering.cpp:1.361 Tue Mar 6 02:12:33 2007 +++ llvm/lib/Target/X86/X86ISelLowering.cpp Tue Mar 6 12:53:42 2007 @@ -327,6 +327,9 @@ addRegisterClass(MVT::v2i32, X86::VR64RegisterClass); // FIXME: add MMX packed arithmetics + setOperationAction(ISD::LOAD, MVT::v8i8, Legal); + setOperationAction(ISD::LOAD, MVT::v4i16, Legal); + setOperationAction(ISD::LOAD, MVT::v2i32, Legal); setOperationAction(ISD::BUILD_VECTOR, MVT::v8i8, Expand); setOperationAction(ISD::BUILD_VECTOR, MVT::v4i16, Expand); setOperationAction(ISD::BUILD_VECTOR, MVT::v2i32, Expand); Index: llvm/lib/Target/X86/X86InstrMMX.td diff -u llvm/lib/Target/X86/X86InstrMMX.td:1.14 llvm/lib/Target/X86/X86InstrMMX.td:1.15 --- llvm/lib/Target/X86/X86InstrMMX.td:1.14 Mon Mar 5 17:09:45 2007 +++ llvm/lib/Target/X86/X86InstrMMX.td Tue Mar 6 12:53:42 2007 @@ -13,7 +13,10 @@ // //===----------------------------------------------------------------------===// +//===----------------------------------------------------------------------===// // Instruction templates +//===----------------------------------------------------------------------===// + // MMXI - MMX instructions with TB prefix. // MMX2I - MMX / SSE2 instructions with TB and OpSize prefixes. // MMXIi8 - MMX instructions with ImmT == Imm8 and TB prefix. @@ -30,33 +33,42 @@ [(set VR64:$dst, (v8i8 (undef)))]>, Requires<[HasMMX]>; +def : Pat<(v8i8 (undef)), (IMPLICIT_DEF_VR64)>, Requires<[HasMMX]>; def : Pat<(v4i16 (undef)), (IMPLICIT_DEF_VR64)>, Requires<[HasMMX]>; def : Pat<(v2i32 (undef)), (IMPLICIT_DEF_VR64)>, Requires<[HasMMX]>; -// EMMS -def EMMS : I<0x77, RawFrm, (ops), "emms", [(int_x86_mmx_emms)]>, TB, - Requires<[HasMMX]>; +//===----------------------------------------------------------------------===// +// MMX Pattern Fragments +//===----------------------------------------------------------------------===// -// Move Instructions -def MOVD64rr : I<0x6E, MRMSrcReg, (ops VR64:$dst, GR32:$src), - "movd {$src, $dst|$dst, $src}", []>, TB, - Requires<[HasMMX]>; -def MOVD64rm : I<0x6E, MRMSrcMem, (ops VR64:$dst, i32mem:$src), - "movd {$src, $dst|$dst, $src}", []>, TB, - Requires<[HasMMX]>; -def MOVD64mr : I<0x7E, MRMDestMem, (ops i32mem:$dst, VR64:$src), - "movd {$src, $dst|$dst, $src}", []>, TB, - Requires<[HasMMX]>; +def loadv2i32 : PatFrag<(ops node:$ptr), (v2i32 (load node:$ptr))>; -def MOVQ64rr : I<0x6F, MRMSrcReg, (ops VR64:$dst, VR64:$src), - "movq {$src, $dst|$dst, $src}", []>, TB, - Requires<[HasMMX]>; -def MOVQ64rm : I<0x6F, MRMSrcMem, (ops VR64:$dst, i64mem:$src), - "movq {$src, $dst|$dst, $src}", []>, TB, - Requires<[HasMMX]>; -def MOVQ64mr : I<0x7F, MRMDestMem, (ops i64mem:$dst, VR64:$src), - "movq {$src, $dst|$dst, $src}", []>, TB, - Requires<[HasMMX]>; +//===----------------------------------------------------------------------===// +// MMX EMMS Instruction +//===----------------------------------------------------------------------===// + +def EMMS : MMXI<0x77, RawFrm, (ops), "emms", [(int_x86_mmx_emms)]>; + +//===----------------------------------------------------------------------===// +// MMX Scalar Instructions +//===----------------------------------------------------------------------===// + +// Move Instructions +def MOVD64rr : MMXI<0x6E, MRMSrcReg, (ops VR64:$dst, GR32:$src), + "movd {$src, $dst|$dst, $src}", []>; +def MOVD64rm : MMXI<0x6E, MRMSrcMem, (ops VR64:$dst, i32mem:$src), + "movd {$src, $dst|$dst, $src}", []>; +def MOVD64mr : MMXI<0x7E, MRMDestMem, (ops i32mem:$dst, VR64:$src), + "movd {$src, $dst|$dst, $src}", []>; + +def MOVQ64rr : MMXI<0x6F, MRMSrcReg, (ops VR64:$dst, VR64:$src), + "movq {$src, $dst|$dst, $src}", []>; +def MOVQ64rm : MMXI<0x6F, MRMSrcMem, (ops VR64:$dst, i64mem:$src), + "movq {$src, $dst|$dst, $src}", + [(set VR64:$dst, (loadv2i32 addr:$src))]>; +def MOVQ64mr : MMXI<0x7F, MRMDestMem, (ops i64mem:$dst, VR64:$src), + "movq {$src, $dst|$dst, $src}", + [(store (v2i32 VR64:$src), addr:$dst)]>; // Conversion instructions def CVTPI2PSrr : MMXI<0x2A, MRMSrcReg, (ops VR128:$dst, VR64:$src), @@ -98,3 +110,13 @@ def MASKMOVQ : I<0xF7, MRMDestMem, (ops VR64:$src, VR64:$mask), "maskmovq {$mask, $src|$src, $mask}", []>, TB, Requires<[HasMMX]>; + +//===----------------------------------------------------------------------===// +// Non-Instruction Patterns +//===----------------------------------------------------------------------===// + +// Store 64-bit integer vector values. +def : Pat<(store (v8i8 VR64:$src), addr:$dst), + (MOVQ64mr addr:$dst, VR64:$src)>; +def : Pat<(store (v4i16 VR64:$src), addr:$dst), + (MOVQ64mr addr:$dst, VR64:$src)>; From dpatel at apple.com Tue Mar 6 13:00:24 2007 From: dpatel at apple.com (Devang Patel) Date: Tue, 6 Mar 2007 13:00:24 -0600 Subject: [llvm-commits] CVS: llvm/lib/Analysis/LoopPass.cpp Message-ID: <200703061900.l26J0Oku003787@zion.cs.uiuc.edu> Changes in directory llvm/lib/Analysis: LoopPass.cpp updated: 1.13 -> 1.14 --- Log message: Add LPPassManager::insertLoop(). --- Diffs of the changes: (+32 -0) LoopPass.cpp | 32 ++++++++++++++++++++++++++++++++ 1 files changed, 32 insertions(+) Index: llvm/lib/Analysis/LoopPass.cpp diff -u llvm/lib/Analysis/LoopPass.cpp:1.13 llvm/lib/Analysis/LoopPass.cpp:1.14 --- llvm/lib/Analysis/LoopPass.cpp:1.13 Tue Mar 6 12:38:33 2007 +++ llvm/lib/Analysis/LoopPass.cpp Tue Mar 6 13:00:02 2007 @@ -97,10 +97,42 @@ } } +// Inset loop into loop nest (LoopInfo) and loop queue (LQ). +void LPPassManager::insertLoop(Loop *L, Loop *ParentLoop) { + + assert (CurrentLoop != L && "Cannot insert CurrentLoop"); + + // Insert into loop nest + if (ParentLoop) + ParentLoop->addChildLoop(L); + else + LI->addTopLevelLoop(L); + + // Insert L into loop queue + if (L == CurrentLoop) + redoLoop(L); + else if (!ParentLoop) + // This is top level loop. + LQ.push_front(L); + else { + // Insert L after ParentLoop + for (std::deque::iterator I = LQ.begin(), + E = LQ.end(); I != E; ++I) { + if (*I == ParentLoop) { + // deque does not support insert after. + ++I; + LQ.insert(I, 1, L); + break; + } + } + } +} + // Reoptimize this loop. LPPassManager will re-insert this loop into the // queue. This allows LoopPass to change loop nest for the loop. This // utility may send LPPassManager into infinite loops so use caution. void LPPassManager::redoLoop(Loop *L) { + assert (CurrentLoop != L && "Can redo only CurrentLoop"); redoThisLoop = true; } From dpatel at apple.com Tue Mar 6 13:00:24 2007 From: dpatel at apple.com (Devang Patel) Date: Tue, 6 Mar 2007 13:00:24 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/Analysis/LoopPass.h Message-ID: <200703061900.l26J0OLo003782@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/Analysis: LoopPass.h updated: 1.11 -> 1.12 --- Log message: Add LPPassManager::insertLoop(). --- Diffs of the changes: (+4 -2) LoopPass.h | 6 ++++-- 1 files changed, 4 insertions(+), 2 deletions(-) Index: llvm/include/llvm/Analysis/LoopPass.h diff -u llvm/include/llvm/Analysis/LoopPass.h:1.11 llvm/include/llvm/Analysis/LoopPass.h:1.12 --- llvm/include/llvm/Analysis/LoopPass.h:1.11 Tue Mar 6 12:38:33 2007 +++ llvm/include/llvm/Analysis/LoopPass.h Tue Mar 6 13:00:02 2007 @@ -101,9 +101,11 @@ } public: - // Delete loop from the loop queue. This is used by Loop pass to inform - // Loop Pass Manager that it should skip rest of the passes for this loop. + // Delete loop from the loop queue and loop nest (LoopInfo). void deleteLoopFromQueue(Loop *L); + + // Inset loop into the loop nest(LoopInfo) and loop queue(LQ). + void insertLoop(Loop *L, Loop *ParentLoop); // Reoptimize this loop. LPPassManager will re-insert this loop into the // queue. This allows LoopPass to change loop nest for the loop. This From dpatel at apple.com Tue Mar 6 13:11:47 2007 From: dpatel at apple.com (Devang Patel) Date: Tue, 6 Mar 2007 13:11:47 -0600 Subject: [llvm-commits] CVS: llvm/lib/Analysis/LoopPass.cpp Message-ID: <200703061911.l26JBlou004135@zion.cs.uiuc.edu> Changes in directory llvm/lib/Analysis: LoopPass.cpp updated: 1.14 -> 1.15 --- Log message: Use schedulePass() instead of assignPassManager() to add new LPPassManager. This ensures that require analysis info is available. --- Diffs of the changes: (+11 -3) LoopPass.cpp | 14 +++++++++++--- 1 files changed, 11 insertions(+), 3 deletions(-) Index: llvm/lib/Analysis/LoopPass.cpp diff -u llvm/lib/Analysis/LoopPass.cpp:1.14 llvm/lib/Analysis/LoopPass.cpp:1.15 --- llvm/lib/Analysis/LoopPass.cpp:1.14 Tue Mar 6 13:00:02 2007 +++ llvm/lib/Analysis/LoopPass.cpp Tue Mar 6 13:11:25 2007 @@ -143,14 +143,22 @@ LQ.push_back(L); } +/// Pass Manager itself does not invalidate any analysis info. +void LPPassManager::getAnalysisUsage(AnalysisUsage &Info) const { + // LPPassManager needs LoopInfo. In the long term LoopInfo class will + // become part of LPPassManager. + Info.addRequired(); + Info.setPreservesAll(); +} + /// run - Execute all of the passes scheduled for execution. Keep track of /// whether any of the passes modifies the function, and if so, return true. bool LPPassManager::runOnFunction(Function &F) { - LoopInfo &LI = getAnalysis(); + LI = &getAnalysis(); bool Changed = false; // Populate Loop Queue - for (LoopInfo::iterator I = LI.begin(), E = LI.end(); I != E; ++I) + for (LoopInfo::iterator I = LI->begin(), E = LI->end(); I != E; ++I) addLoopIntoQueue(*I, LQ); // Initialization @@ -279,7 +287,7 @@ // [3] Assign manager to manage this new manager. This may create // and push new managers into PMS Pass *P = dynamic_cast(LPPM); - P->assignPassManager(PMS); + TPM->schedulePass(P); // [4] Push new manager into PMS PMS.push(LPPM); From dpatel at apple.com Tue Mar 6 13:11:47 2007 From: dpatel at apple.com (Devang Patel) Date: Tue, 6 Mar 2007 13:11:47 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/Analysis/LoopPass.h Message-ID: <200703061911.l26JBl0h004138@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/Analysis: LoopPass.h updated: 1.12 -> 1.13 --- Log message: Use schedulePass() instead of assignPassManager() to add new LPPassManager. This ensures that require analysis info is available. --- Diffs of the changes: (+2 -6) LoopPass.h | 8 ++------ 1 files changed, 2 insertions(+), 6 deletions(-) Index: llvm/include/llvm/Analysis/LoopPass.h diff -u llvm/include/llvm/Analysis/LoopPass.h:1.12 llvm/include/llvm/Analysis/LoopPass.h:1.13 --- llvm/include/llvm/Analysis/LoopPass.h:1.12 Tue Mar 6 13:00:02 2007 +++ llvm/include/llvm/Analysis/LoopPass.h Tue Mar 6 13:11:25 2007 @@ -69,12 +69,8 @@ bool runOnFunction(Function &F); /// Pass Manager itself does not invalidate any analysis info. - void getAnalysisUsage(AnalysisUsage &Info) const { - // LPPassManager needs LoopInfo. In the long term LoopInfo class will - // be consumed by LPPassManager. - Info.addRequired(); - Info.setPreservesAll(); - } + // LPPassManager needs LoopInfo. + void getAnalysisUsage(AnalysisUsage &Info) const; virtual const char *getPassName() const { return "Loop Pass Manager"; From rspencer at reidspencer.com Tue Mar 6 13:15:30 2007 From: rspencer at reidspencer.com (Reid Spencer) Date: Tue, 06 Mar 2007 11:15:30 -0800 Subject: [llvm-commits] Fwd: [llvm-testresults] Grawp i386 nightly tester results In-Reply-To: References: <200703061529.l26FTa4V031902@zion.cs.uiuc.edu> Message-ID: <1173208530.24497.153.camel@bashful.x10sys.com> On Tue, 2007-03-06 at 10:48 -0800, Chris Lattner wrote: > Hi Reid, > > Can you take a look at these JIT failures? They are almost certainly > GenericValue related. Already am. There were similar ones on your ppc32 as well. > > Thanks, > > -Chris > > Begin forwarded message: > > > From: Nobody > > Date: March 6, 2007 7:29:36 AM PST > > To: llvm-testresults at cs.uiuc.edu > > Subject: [llvm-testresults] Grawp i386 nightly tester results > > > > http://llvm.org/nightlytest/test.php?machine=64&night=2376 > > Name: grawp.apple.com > > Nickname: Grawp > > Buildstatus: OK > > > > New Test Passes: > > None > > > > New Test Failures: > > Applications/kimwitu++/kc [JIT codegen, JIT] > > Applications/lambda-0.1.3/lambda [JIT codegen, JIT] > > Benchmarks/CoyoteBench/fftbench [JIT codegen, JIT] > > Benchmarks/Prolangs-C++/city/city [JIT codegen, JIT] > > Benchmarks/Prolangs-C++/deriv1/deriv1 [JIT codegen, JIT] > > Benchmarks/Prolangs-C++/deriv2/deriv2 [JIT codegen, JIT] > > Benchmarks/Prolangs-C++/employ/employ [JIT codegen, JIT] > > Benchmarks/Prolangs-C++/family/family [JIT codegen, JIT] > > Benchmarks/Prolangs-C++/garage/garage [JIT codegen, JIT] > > Benchmarks/Prolangs-C++/life/life [JIT codegen, JIT] > > Benchmarks/Prolangs-C++/NP/np [JIT codegen, JIT] > > Benchmarks/Prolangs-C++/objects/objects [JIT codegen, JIT] > > Benchmarks/Prolangs-C++/ocean/ocean [JIT codegen, JIT] > > Benchmarks/Prolangs-C++/office/office [JIT codegen, JIT] > > Benchmarks/Prolangs-C++/primes/primes [JIT codegen, JIT] > > Benchmarks/Prolangs-C++/shapes/shapes [JIT codegen, JIT] > > Benchmarks/Prolangs-C++/simul/simul [JIT codegen, JIT] > > Benchmarks/Prolangs-C++/trees/trees [JIT codegen, JIT] > > Benchmarks/Prolangs-C++/vcirc/vcirc [JIT codegen, JIT] > > Benchmarks/Shootout-C++/methcall [JIT codegen, JIT] > > Benchmarks/Shootout-C++/objinst [JIT codegen, JIT] > > Benchmarks/tramp3d-v4/tramp3d-v4 [JIT codegen, ] > > Nurbs/nurbs [JIT codegen, ] > > SPEC/CFP2006/444.namd/444.namd [JIT codegen, JIT] > > SPEC/CFP2006/447.dealII/447.dealII [JIT codegen, ] > > SPEC/CINT2000/252.eon/252.eon [JIT codegen, JIT] > > SPEC/CINT2006/473.astar/473.astar [JIT codegen, JIT] > > > > > > Added Tests: > > test/CFrontend/2007-03-05-DataLayout.c > > test/CodeGen/X86/mmx-emms.ll > > test/Transforms/InstCombine/udiv_select_to_select_shift.ll > > > > > > Removed Tests: > > None > > > > Significant changes in test results: > > JIT: > > singlesource/Benchmarks/Shootout-C++/ackermann: 9.47% (3.80 => 3.44) > > singlesource/Benchmarks/Shootout/matrix: 11.57% (10.72 => 9.48) > > LLC-BETA: > > external/SPEC/CFP2000/179.art/179.art: 8.75% (2.40 => 2.19) > > > > _______________________________________________ > > llvm-testresults mailing list > > llvm-testresults at cs.uiuc.edu > > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-testresults > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From asl at math.spbu.ru Tue Mar 6 13:25:20 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Tue, 6 Mar 2007 13:25:20 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/AsmPrinter.cpp Message-ID: <200703061925.l26JPKoG004362@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen: AsmPrinter.cpp updated: 1.153 -> 1.154 --- Log message: Small eye-candy: use asciz directive everywhere, where possible. --- Diffs of the changes: (+10 -3) AsmPrinter.cpp | 13 ++++++++++--- 1 files changed, 10 insertions(+), 3 deletions(-) Index: llvm/lib/CodeGen/AsmPrinter.cpp diff -u llvm/lib/CodeGen/AsmPrinter.cpp:1.153 llvm/lib/CodeGen/AsmPrinter.cpp:1.154 --- llvm/lib/CodeGen/AsmPrinter.cpp:1.153 Wed Feb 21 16:48:45 2007 +++ llvm/lib/CodeGen/AsmPrinter.cpp Tue Mar 6 13:25:02 2007 @@ -559,13 +559,20 @@ /// Special characters are emitted properly. /// \literal (Eg. '\t') \endliteral void AsmPrinter::EmitString(const std::string &String) const { - O << TAI->getAsciiDirective() - << "\""; + const char* AscizDirective = TAI->getAscizDirective(); + if (AscizDirective) + O << AscizDirective; + else + O << TAI->getAsciiDirective(); + O << "\""; for (unsigned i = 0, N = String.size(); i < N; ++i) { unsigned char C = String[i]; printStringChar(O, C); } - O << "\\0\""; + if (AscizDirective) + O << "\""; + else + O << "\\0\""; } From dpatel at apple.com Tue Mar 6 13:51:06 2007 From: dpatel at apple.com (Devang Patel) Date: Tue, 6 Mar 2007 13:51:06 -0600 Subject: [llvm-commits] CVS: llvm/lib/Analysis/LoopPass.cpp Message-ID: <200703061951.l26Jp6B0004982@zion.cs.uiuc.edu> Changes in directory llvm/lib/Analysis: LoopPass.cpp updated: 1.15 -> 1.16 --- Log message: Insert loop into LQ before visiting children. --- Diffs of the changes: (+1 -1) LoopPass.cpp | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/Analysis/LoopPass.cpp diff -u llvm/lib/Analysis/LoopPass.cpp:1.15 llvm/lib/Analysis/LoopPass.cpp:1.16 --- llvm/lib/Analysis/LoopPass.cpp:1.15 Tue Mar 6 13:11:25 2007 +++ llvm/lib/Analysis/LoopPass.cpp Tue Mar 6 13:50:49 2007 @@ -138,9 +138,9 @@ // Recurse through all subloops and all loops into LQ. static void addLoopIntoQueue(Loop *L, std::deque &LQ) { + LQ.push_back(L); for (Loop::iterator I = L->begin(), E = L->end(); I != E; ++I) addLoopIntoQueue(*I, LQ); - LQ.push_back(L); } /// Pass Manager itself does not invalidate any analysis info. From sabre at nondot.org Tue Mar 6 14:01:24 2007 From: sabre at nondot.org (Chris Lattner) Date: Tue, 6 Mar 2007 14:01:24 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Message-ID: <200703062001.l26K1Ovx005255@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/SelectionDAG: LegalizeDAG.cpp updated: 1.482 -> 1.483 --- Log message: big endian 32-bit systems (e.g. ppc32) want to return the high reg first, not the lo-reg first. This is fallout from my ppc calling conv change yesterday, it fixes test/ExecutionEngine/2003-05-06-LivenessClobber.llx --- Diffs of the changes: (+5 -0) LegalizeDAG.cpp | 5 +++++ 1 files changed, 5 insertions(+) Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.482 llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.483 --- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.482 Sat Mar 3 17:43:21 2007 +++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Tue Mar 6 14:01:06 2007 @@ -1675,6 +1675,11 @@ if (Tmp2.getValueType() != MVT::Vector) { SDOperand Lo, Hi; ExpandOp(Tmp2, Lo, Hi); + + // Big endian systems want the hi reg first. + if (!TLI.isLittleEndian()) + std::swap(Lo, Hi); + if (Hi.Val) Result = DAG.getNode(ISD::RET, MVT::Other, Tmp1, Lo, Tmp3, Hi,Tmp3); else From dpatel at apple.com Tue Mar 6 15:14:29 2007 From: dpatel at apple.com (Devang Patel) Date: Tue, 6 Mar 2007 15:14:29 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/Transforms/Scalar.h Message-ID: <200703062114.l26LET5n006568@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/Transforms: Scalar.h updated: 1.72 -> 1.73 --- Log message: Now LoopStrengthReduce is a LoopPass. --- Diffs of the changes: (+2 -1) Scalar.h | 3 ++- 1 files changed, 2 insertions(+), 1 deletion(-) Index: llvm/include/llvm/Transforms/Scalar.h diff -u llvm/include/llvm/Transforms/Scalar.h:1.72 llvm/include/llvm/Transforms/Scalar.h:1.73 --- llvm/include/llvm/Transforms/Scalar.h:1.72 Wed Feb 14 20:26:09 2007 +++ llvm/include/llvm/Transforms/Scalar.h Tue Mar 6 15:14:09 2007 @@ -20,6 +20,7 @@ namespace llvm { class FunctionPass; +class LoopPass; class Pass; class GetElementPtrInst; class PassInfo; @@ -120,7 +121,7 @@ // optional parameter used to consult the target machine whether certain // transformations are profitable. // -FunctionPass *createLoopStrengthReducePass(const TargetLowering *TLI = NULL); +LoopPass *createLoopStrengthReducePass(const TargetLowering *TLI = NULL); //===----------------------------------------------------------------------===// // From dpatel at apple.com Tue Mar 6 15:14:30 2007 From: dpatel at apple.com (Devang Patel) Date: Tue, 6 Mar 2007 15:14:30 -0600 Subject: [llvm-commits] CVS: llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp Message-ID: <200703062114.l26LEUO2006574@zion.cs.uiuc.edu> Changes in directory llvm/lib/Transforms/Scalar: LoopStrengthReduce.cpp updated: 1.114 -> 1.115 --- Log message: Now LoopStrengthReduce is a LoopPass. --- Diffs of the changes: (+14 -23) LoopStrengthReduce.cpp | 37 ++++++++++++++----------------------- 1 files changed, 14 insertions(+), 23 deletions(-) Index: llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp diff -u llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp:1.114 llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp:1.115 --- llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp:1.114 Fri Mar 2 17:51:25 2007 +++ llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp Tue Mar 6 15:14:09 2007 @@ -23,6 +23,7 @@ #include "llvm/DerivedTypes.h" #include "llvm/Analysis/Dominators.h" #include "llvm/Analysis/LoopInfo.h" +#include "llvm/Analysis/LoopPass.h" #include "llvm/Analysis/ScalarEvolutionExpander.h" #include "llvm/Support/CFG.h" #include "llvm/Support/GetElementPtrTypeIterator.h" @@ -104,7 +105,7 @@ } }; - class VISIBILITY_HIDDEN LoopStrengthReduce : public FunctionPass { + class VISIBILITY_HIDDEN LoopStrengthReduce : public LoopPass { LoopInfo *LI; ETForest *EF; ScalarEvolution *SE; @@ -143,19 +144,7 @@ : TLI(tli) { } - virtual bool runOnFunction(Function &) { - LI = &getAnalysis(); - EF = &getAnalysis(); - SE = &getAnalysis(); - TD = &getAnalysis(); - UIntPtrTy = TD->getIntPtrType(); - Changed = false; - - for (LoopInfo::iterator I = LI->begin(), E = LI->end(); I != E; ++I) - runOnLoop(*I); - - return Changed; - } + bool runOnLoop(Loop *L, LPPassManager &LPM); virtual void getAnalysisUsage(AnalysisUsage &AU) const { // We split critical edges, so we change the CFG. However, we do update @@ -179,7 +168,6 @@ /// Value *getCastedVersionOf(Instruction::CastOps opcode, Value *V); private: - void runOnLoop(Loop *L); bool AddUsersIfInteresting(Instruction *I, Loop *L, std::set &Processed); SCEVHandle GetExpressionSCEV(Instruction *E, Loop *L); @@ -196,7 +184,7 @@ RegisterPass X("loop-reduce", "Loop Strength Reduction"); } -FunctionPass *llvm::createLoopStrengthReducePass(const TargetLowering *TLI) { +LoopPass *llvm::createLoopStrengthReducePass(const TargetLowering *TLI) { return new LoopStrengthReduce(TLI); } @@ -1271,12 +1259,15 @@ }; } -void LoopStrengthReduce::runOnLoop(Loop *L) { - // First step, transform all loops nesting inside of this loop. - for (LoopInfo::iterator I = L->begin(), E = L->end(); I != E; ++I) - runOnLoop(*I); +bool LoopStrengthReduce::runOnLoop(Loop *L, LPPassManager &LPM) { - // Next, find all uses of induction variables in this loop, and catagorize + LI = &getAnalysis(); + EF = &getAnalysis(); + SE = &getAnalysis(); + TD = &getAnalysis(); + UIntPtrTy = TD->getIntPtrType(); + + // Find all uses of induction variables in this loop, and catagorize // them by stride. Start by finding all of the PHI nodes in the header for // this loop. If they are induction variables, inspect their uses. std::set Processed; // Don't reprocess instructions. @@ -1284,7 +1275,7 @@ AddUsersIfInteresting(I, L, Processed); // If we have nothing to do, return. - if (IVUsesByStride.empty()) return; + if (IVUsesByStride.empty()) return false; // Optimize induction variables. Some indvar uses can be transformed to use // strides that will be needed for other purposes. A common example of this @@ -1368,5 +1359,5 @@ CastedPointers.clear(); IVUsesByStride.clear(); StrideOrder.clear(); - return; + return false; } From dpatel at apple.com Tue Mar 6 15:14:31 2007 From: dpatel at apple.com (Devang Patel) Date: Tue, 6 Mar 2007 15:14:31 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/LLVMTargetMachine.cpp Message-ID: <200703062114.l26LEVWl006579@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen: LLVMTargetMachine.cpp updated: 1.9 -> 1.10 --- Log message: Now LoopStrengthReduce is a LoopPass. --- Diffs of the changes: (+1 -0) LLVMTargetMachine.cpp | 1 + 1 files changed, 1 insertion(+) Index: llvm/lib/CodeGen/LLVMTargetMachine.cpp diff -u llvm/lib/CodeGen/LLVMTargetMachine.cpp:1.9 llvm/lib/CodeGen/LLVMTargetMachine.cpp:1.10 --- llvm/lib/CodeGen/LLVMTargetMachine.cpp:1.9 Thu Feb 22 10:22:15 2007 +++ llvm/lib/CodeGen/LLVMTargetMachine.cpp Tue Mar 6 15:14:09 2007 @@ -14,6 +14,7 @@ #include "llvm/Target/TargetMachine.h" #include "llvm/PassManager.h" #include "llvm/Pass.h" +#include "llvm/Analysis/LoopPass.h" #include "llvm/CodeGen/Passes.h" #include "llvm/Target/TargetOptions.h" #include "llvm/Transforms/Scalar.h" From sabre at nondot.org Tue Mar 6 15:49:36 2007 From: sabre at nondot.org (Chris Lattner) Date: Tue, 6 Mar 2007 15:49:36 -0600 Subject: [llvm-commits] CVS: llvm-www/OpenProjects.html Message-ID: <200703062149.l26LnaZE007233@zion.cs.uiuc.edu> Changes in directory llvm-www: OpenProjects.html updated: 1.19 -> 1.20 --- Log message: add a note --- Diffs of the changes: (+2 -2) OpenProjects.html | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm-www/OpenProjects.html diff -u llvm-www/OpenProjects.html:1.19 llvm-www/OpenProjects.html:1.20 --- llvm-www/OpenProjects.html:1.19 Thu Feb 8 00:07:55 2007 +++ llvm-www/OpenProjects.html Tue Mar 6 15:49:19 2007 @@ -297,7 +297,7 @@
  1. Implement GVN-PRE, a powerful and simple Partial Redundancy Elimination -algorithm for SSA form
  2. +algorithm for SSA form (in progress, ask on llvmdev)
  3. Implement a Dependence Analysis Infrastructure
    - Design some way to represent and query dep analysis
  4. Value range propagation pass
  5. @@ -375,7 +375,7 @@ src="http://www.w3.org/Icons/valid-html401" alt="Valid HTML 4.01!"> LLVM Compiler Infrastructure
    - Last modified: $Date: 2007/02/08 06:07:55 $ + Last modified: $Date: 2007/03/06 21:49:19 $ From evan.cheng at apple.com Tue Mar 6 15:58:32 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 6 Mar 2007 15:58:32 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/RegisterScavenging.cpp Message-ID: <200703062158.l26LwWYO007413@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen: RegisterScavenging.cpp updated: 1.11 -> 1.12 --- Log message: Minor bug fix. --- Diffs of the changes: (+2 -0) RegisterScavenging.cpp | 2 ++ 1 files changed, 2 insertions(+) Index: llvm/lib/CodeGen/RegisterScavenging.cpp diff -u llvm/lib/CodeGen/RegisterScavenging.cpp:1.11 llvm/lib/CodeGen/RegisterScavenging.cpp:1.12 --- llvm/lib/CodeGen/RegisterScavenging.cpp:1.11 Tue Mar 6 04:01:25 2007 +++ llvm/lib/CodeGen/RegisterScavenging.cpp Tue Mar 6 15:58:15 2007 @@ -50,6 +50,8 @@ } MBB = mbb; + ScavengedReg = 0; + ScavengedRC = NULL; // All registers started out unused. RegStates.set(); From evan.cheng at apple.com Tue Mar 6 15:59:37 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 6 Mar 2007 15:59:37 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp Message-ID: <200703062159.l26LxbGM007455@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/ARM: ARMLoadStoreOptimizer.cpp updated: 1.2 -> 1.3 --- Log message: Make load / store optimizer use register scavenger. --- Diffs of the changes: (+58 -21) ARMLoadStoreOptimizer.cpp | 79 +++++++++++++++++++++++++++++++++------------- 1 files changed, 58 insertions(+), 21 deletions(-) Index: llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp diff -u llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp:1.2 llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp:1.3 --- llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp:1.2 Tue Mar 6 12:02:41 2007 +++ llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp Tue Mar 6 15:59:20 2007 @@ -59,6 +59,8 @@ typedef SmallVector MemOpQueue; typedef MemOpQueue::iterator MemOpQueueIter; + void AdvanceRS(MachineBasicBlock *MBB, MemOpQueue &MemOps); + SmallVector MergeLDR_STR(MachineBasicBlock &MBB, unsigned SIndex, unsigned Base, int Opcode, unsigned Size, MemOpQueue &MemOps); @@ -103,8 +105,9 @@ /// registers in Regs as the register operands that would be loaded / stored. /// It returns true if the transformation is done. static bool mergeOps(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, - int Offset, unsigned Base, int Opcode, - SmallVector &Regs, + int Offset, unsigned Base, bool BaseKill, int Opcode, + SmallVector, 8> &Regs, + RegScavenger *RS, const TargetInstrInfo *TII) { // Only a single register to load / store. Don't bother. unsigned NumRegs = Regs.size(); @@ -130,10 +133,12 @@ if (Opcode == ARM::LDR) // If it is a load, then just use one of the destination register to // use as the new base. - NewBase = Regs[NumRegs-1]; + NewBase = Regs[NumRegs-1].first; else { - // FIXME: Try scavenging a register to use as a new base. - NewBase = ARM::R12; + // Try to find a free register to use as a new base. + NewBase = RS ? RS->FindUnusedReg(&ARM::GPRRegClass) : (unsigned)ARM::R12; + if (NewBase == 0) + return false; } int BaseOpc = ARM::ADDri; if (Offset < 0) { @@ -143,52 +148,78 @@ int ImmedOffset = ARM_AM::getSOImmVal(Offset); if (ImmedOffset == -1) return false; // Probably not worth it then. - BuildMI(MBB, MBBI, TII->get(BaseOpc), NewBase).addReg(Base).addImm(ImmedOffset); + + BuildMI(MBB, MBBI, TII->get(BaseOpc), NewBase) + .addReg(Base, false, false, BaseKill).addImm(ImmedOffset); Base = NewBase; + BaseKill = true; // New base is always killed right its use. } bool isDPR = Opcode == ARM::FLDD || Opcode == ARM::FSTD; bool isDef = Opcode == ARM::LDR || Opcode == ARM::FLDS || Opcode == ARM::FLDD; Opcode = getLoadStoreMultipleOpcode(Opcode); MachineInstrBuilder MIB = (isAM4) - ? BuildMI(MBB, MBBI, TII->get(Opcode)).addReg(Base) + ? BuildMI(MBB, MBBI, TII->get(Opcode)).addReg(Base, false, false, BaseKill) .addImm(ARM_AM::getAM4ModeImm(Mode)) - : BuildMI(MBB, MBBI, TII->get(Opcode)).addReg(Base) + : BuildMI(MBB, MBBI, TII->get(Opcode)).addReg(Base, false, false, BaseKill) .addImm(ARM_AM::getAM5Opc(Mode, false, isDPR ? NumRegs<<1 : NumRegs)); for (unsigned i = 0; i != NumRegs; ++i) - MIB = MIB.addReg(Regs[i], Opcode == isDef); + MIB = MIB.addReg(Regs[i].first, isDef, false, Regs[i].second); return true; } +/// AdvanceRS - Advance register scavenger to just before the earliest memory +/// op that is being merged. +void ARMLoadStoreOpt::AdvanceRS(MachineBasicBlock *MBB, MemOpQueue &MemOps) { + MachineBasicBlock::iterator Loc = MemOps[0].MBBI; + unsigned Position = MemOps[0].Position; + for (unsigned i = 1, e = MemOps.size(); i != e; ++i) { + if (MemOps[i].Position < Position) { + Position = MemOps[i].Position; + Loc = MemOps[i].MBBI; + } + } + + if (Loc != MBB->begin()) + RS->forward(prior(Loc)); +} + +/// MergeLDR_STR - Merge a number of load / store instructions into one or more +/// load / store multiple instructions. SmallVector ARMLoadStoreOpt::MergeLDR_STR(MachineBasicBlock &MBB, unsigned SIndex, unsigned Base, int Opcode, unsigned Size, MemOpQueue &MemOps) { - bool isAM4 = Opcode == ARM::LDR || Opcode == ARM::STR; + if (RS && SIndex == 0) + AdvanceRS(&MBB, MemOps); + SmallVector Merges; + SmallVector, 8> Regs; + bool isAM4 = Opcode == ARM::LDR || Opcode == ARM::STR; int Offset = MemOps[SIndex].Offset; int SOffset = Offset; unsigned Pos = MemOps[SIndex].Position; MachineBasicBlock::iterator Loc = MemOps[SIndex].MBBI; - SmallVector Regs; unsigned PReg = MemOps[SIndex].MBBI->getOperand(0).getReg(); unsigned PRegNum = ARMRegisterInfo::getRegisterNumbering(PReg); - Regs.push_back(PReg); + bool isKill = MemOps[SIndex].MBBI->getOperand(0).isKill(); + Regs.push_back(std::make_pair(PReg, isKill)); for (unsigned i = SIndex+1, e = MemOps.size(); i != e; ++i) { int NewOffset = MemOps[i].Offset; unsigned Reg = MemOps[i].MBBI->getOperand(0).getReg(); unsigned RegNum = ARMRegisterInfo::getRegisterNumbering(Reg); + isKill = MemOps[i].MBBI->getOperand(0).isKill(); // AM4 - register numbers in ascending order. // AM5 - consecutive register numbers in ascending order. if (NewOffset == Offset + (int)Size && ((isAM4 && RegNum > PRegNum) || RegNum == PRegNum+1)) { Offset += Size; - Regs.push_back(Reg); + Regs.push_back(std::make_pair(Reg, isKill)); PRegNum = RegNum; } else { // Can't merge this in. Try merge the earlier ones first. - if (mergeOps(MBB, ++Loc, SOffset, Base, Opcode, Regs, TII)) { + if (mergeOps(MBB, ++Loc, SOffset, Base, false, Opcode, Regs, RS, TII)) { Merges.push_back(prior(Loc)); for (unsigned j = SIndex; j < i; ++j) { MBB.erase(MemOps[j].MBBI); @@ -207,7 +238,8 @@ } } - if (mergeOps(MBB, ++Loc, SOffset, Base, Opcode, Regs, TII)) { + bool BaseKill = Loc->findRegisterUseOperand(Base, true) != NULL; + if (mergeOps(MBB, ++Loc, SOffset, Base, BaseKill, Opcode, Regs, RS, TII)) { Merges.push_back(prior(Loc)); for (unsigned i = SIndex, e = MemOps.size(); i != e; ++i) { MBB.erase(MemOps[i].MBBI); @@ -381,6 +413,7 @@ const TargetInstrInfo *TII) { MachineInstr *MI = MBBI; unsigned Base = MI->getOperand(1).getReg(); + bool BaseKill = MI->getOperand(1).isKill(); unsigned Bytes = getLSMultipleTransferSize(MI); int Opcode = MI->getOpcode(); bool isAM2 = Opcode == ARM::LDR || Opcode == ARM::STR; @@ -434,18 +467,23 @@ true, isDPR ? 2 : 1); if (isLd) { if (isAM2) + // LDR_PRE, LDR_POST; BuildMI(MBB, MBBI, TII->get(NewOpc), MI->getOperand(0).getReg()) - .addReg(Base, true).addReg(Base).addReg(0).addImm(Offset); + .addReg(Base, true) + .addReg(Base).addReg(0).addImm(Offset); else - BuildMI(MBB, MBBI, TII->get(NewOpc)).addReg(Base) + BuildMI(MBB, MBBI, TII->get(NewOpc)).addReg(Base, false, false, BaseKill) .addImm(Offset).addReg(MI->getOperand(0).getReg(), true); } else { + MachineOperand &MO = MI->getOperand(0); if (isAM2) - BuildMI(MBB, MBBI, TII->get(NewOpc), Base).addReg(MI->getOperand(0).getReg()) + // STR_PRE, STR_POST; + BuildMI(MBB, MBBI, TII->get(NewOpc), Base) + .addReg(MO.getReg(), false, false, MO.isKill()) .addReg(Base).addReg(0).addImm(Offset); else BuildMI(MBB, MBBI, TII->get(NewOpc)).addReg(Base) - .addImm(Offset).addReg(MI->getOperand(0).getReg(), false); + .addImm(Offset).addReg(MO.getReg(), false, false, MO.isKill()); } MBB.erase(MBBI); @@ -494,7 +532,6 @@ int Opcode = MBBI->getOpcode(); bool isAM2 = Opcode == ARM::LDR || Opcode == ARM::STR; unsigned Size = getLSMultipleTransferSize(MBBI); - unsigned Base = MBBI->getOperand(1).getReg(); unsigned OffIdx = MBBI->getNumOperands()-1; unsigned OffField = MBBI->getOperand(OffIdx).getImm(); @@ -564,7 +601,7 @@ if (TryMerge) { if (NumMemOps > 1) { SmallVector MBBII = - MergeLDR_STR(MBB, 0, CurrBase, CurrOpc, CurrSize,MemOps); + MergeLDR_STR(MBB, 0, CurrBase, CurrOpc, CurrSize, MemOps); // Try folding preceeding/trailing base inc/dec into the generated // LDM/STM ops. for (unsigned i = 0, e = MBBII.size(); i < e; ++i) From evan.cheng at apple.com Tue Mar 6 16:03:11 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 6 Mar 2007 16:03:11 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/ARM/ARMRegisterInfo.cpp Message-ID: <200703062203.l26M3Bpi007541@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/ARM: ARMRegisterInfo.cpp updated: 1.80 -> 1.81 --- Log message: Register scavenging is now on by default for ARM. --- Diffs of the changes: (+4 -3) ARMRegisterInfo.cpp | 7 ++++--- 1 files changed, 4 insertions(+), 3 deletions(-) Index: llvm/lib/Target/ARM/ARMRegisterInfo.cpp diff -u llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.80 llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.81 --- llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.80 Tue Mar 6 04:03:56 2007 +++ llvm/lib/Target/ARM/ARMRegisterInfo.cpp Tue Mar 6 16:02:53 2007 @@ -36,8 +36,9 @@ #include using namespace llvm; -static cl::opt EnableScavenging("enable-arm-reg-scavenging", cl::Hidden, - cl::desc("Enable register scavenging on ARM")); +static cl::opt ThumbRegScavenging("enable-thumb-reg-scavenging", + cl::Hidden, + cl::desc("Enable register scavenging on Thumb")); unsigned ARMRegisterInfo::getRegisterNumbering(unsigned RegEnum) { using namespace ARM; @@ -345,7 +346,7 @@ bool ARMRegisterInfo::requiresRegisterScavenging(const MachineFunction &MF) const { const ARMFunctionInfo *AFI = MF.getInfo(); - return EnableScavenging && !AFI->isThumbFunction(); + return ThumbRegScavenging || !AFI->isThumbFunction(); } /// hasFP - Return true if the specified function should have a dedicated frame From reid at x10sys.com Tue Mar 6 16:23:32 2007 From: reid at x10sys.com (Reid Spencer) Date: Tue, 6 Mar 2007 16:23:32 -0600 Subject: [llvm-commits] CVS: llvm/lib/ExecutionEngine/ExecutionEngine.cpp Message-ID: <200703062223.l26MNW2p007922@zion.cs.uiuc.edu> Changes in directory llvm/lib/ExecutionEngine: ExecutionEngine.cpp updated: 1.112 -> 1.113 --- Log message: Fix all of last night's JIT failures in Prolangs-C++ by finishing the implementation of getConstantValue(). --- Diffs of the changes: (+151 -42) ExecutionEngine.cpp | 193 ++++++++++++++++++++++++++++++++++++++++------------ 1 files changed, 151 insertions(+), 42 deletions(-) Index: llvm/lib/ExecutionEngine/ExecutionEngine.cpp diff -u llvm/lib/ExecutionEngine/ExecutionEngine.cpp:1.112 llvm/lib/ExecutionEngine/ExecutionEngine.cpp:1.113 --- llvm/lib/ExecutionEngine/ExecutionEngine.cpp:1.112 Mon Mar 5 23:03:16 2007 +++ llvm/lib/ExecutionEngine/ExecutionEngine.cpp Tue Mar 6 16:23:15 2007 @@ -302,82 +302,191 @@ /// part is if C is a ConstantExpr. /// @brief Get a GenericValue for a Constnat* GenericValue ExecutionEngine::getConstantValue(const Constant *C) { - // Declare the result as garbage. - GenericValue Result; - // If its undefined, return the garbage. - if (isa(C)) return Result; + if (isa(C)) + return GenericValue(); // If the value is a ConstantExpr if (const ConstantExpr *CE = dyn_cast(C)) { + Constant *Op0 = CE->getOperand(0); switch (CE->getOpcode()) { case Instruction::GetElementPtr: { // Compute the index - Result = getConstantValue(CE->getOperand(0)); + GenericValue Result = getConstantValue(Op0); SmallVector Indices(CE->op_begin()+1, CE->op_end()); uint64_t Offset = - TD->getIndexedOffset(CE->getOperand(0)->getType(), - &Indices[0], Indices.size()); + TD->getIndexedOffset(Op0->getType(), &Indices[0], Indices.size()); char* tmp = (char*) Result.PointerVal; Result = PTOGV(tmp + Offset); return Result; } - case Instruction::Trunc: - case Instruction::ZExt: - case Instruction::SExt: - case Instruction::FPTrunc: - case Instruction::FPExt: - case Instruction::UIToFP: - case Instruction::SIToFP: - case Instruction::FPToUI: - case Instruction::FPToSI: - break; - case Instruction::PtrToInt: { - Constant *Op = CE->getOperand(0); - GenericValue GV = getConstantValue(Op); + case Instruction::Trunc: { + GenericValue GV = getConstantValue(Op0); + uint32_t BitWidth = cast(CE->getType())->getBitWidth(); + GV.IntVal = GV.IntVal.trunc(BitWidth); return GV; } - case Instruction::BitCast: { - // Bit casts are no-ops but we can only return the GV of the operand if - // they are the same basic type (pointer->pointer, packed->packed, etc.) - Constant *Op = CE->getOperand(0); - GenericValue GV = getConstantValue(Op); - if (Op->getType()->getTypeID() == C->getType()->getTypeID()) - return GV; - break; + case Instruction::ZExt: { + GenericValue GV = getConstantValue(Op0); + uint32_t BitWidth = cast(CE->getType())->getBitWidth(); + GV.IntVal = GV.IntVal.zext(BitWidth); + return GV; + } + case Instruction::SExt: { + GenericValue GV = getConstantValue(Op0); + uint32_t BitWidth = cast(CE->getType())->getBitWidth(); + GV.IntVal = GV.IntVal.sext(BitWidth); + return GV; + } + case Instruction::FPTrunc: { + GenericValue GV = getConstantValue(Op0); + GV.FloatVal = float(GV.DoubleVal); + return GV; + } + case Instruction::FPExt:{ + GenericValue GV = getConstantValue(Op0); + GV.DoubleVal = double(GV.FloatVal); + return GV; + } + case Instruction::UIToFP: { + GenericValue GV = getConstantValue(Op0); + if (CE->getType() == Type::FloatTy) + GV.FloatVal = float(GV.IntVal.roundToDouble()); + else + GV.DoubleVal = GV.IntVal.roundToDouble(); + return GV; + } + case Instruction::SIToFP: { + GenericValue GV = getConstantValue(Op0); + if (CE->getType() == Type::FloatTy) + GV.FloatVal = float(GV.IntVal.signedRoundToDouble()); + else + GV.DoubleVal = GV.IntVal.signedRoundToDouble(); + return GV; + } + case Instruction::FPToUI: // double->APInt conversion handles sign + case Instruction::FPToSI: { + GenericValue GV = getConstantValue(Op0); + uint32_t BitWidth = cast(CE->getType())->getBitWidth(); + if (Op0->getType() == Type::FloatTy) + GV.IntVal = APIntOps::RoundFloatToAPInt(GV.FloatVal, BitWidth); + else + GV.IntVal = APIntOps::RoundDoubleToAPInt(GV.DoubleVal, BitWidth); + return GV; + } + case Instruction::PtrToInt: { + GenericValue GV = getConstantValue(Op0); + uint32_t PtrWidth = TD->getPointerSizeInBits(); + GV.IntVal = APInt(PtrWidth, uintptr_t(GV.PointerVal)); + return GV; } case Instruction::IntToPtr: { - // IntToPtr casts are just so special. Cast to intptr_t first. - Constant *Op = CE->getOperand(0); - GenericValue GV = getConstantValue(Op); - return PTOGV((void*)(uintptr_t)GV.IntVal.getZExtValue()); - break; + GenericValue GV = getConstantValue(Op0); + uint32_t PtrWidth = TD->getPointerSizeInBits(); + if (PtrWidth != GV.IntVal.getBitWidth()) + GV.IntVal = GV.IntVal.zextOrTrunc(PtrWidth); + assert(GV.IntVal.getBitWidth() <= 64 && "Bad pointer width"); + GV.PointerVal = PointerTy(uintptr_t(GV.IntVal.getZExtValue())); + return GV; + } + case Instruction::BitCast: { + GenericValue GV = getConstantValue(Op0); + const Type* DestTy = CE->getType(); + switch (Op0->getType()->getTypeID()) { + default: assert(0 && "Invalid bitcast operand"); + case Type::IntegerTyID: + assert(DestTy->isFloatingPoint() && "invalid bitcast"); + if (DestTy == Type::FloatTy) + GV.FloatVal = GV.IntVal.bitsToFloat(); + else if (DestTy == Type::DoubleTy) + GV.DoubleVal = GV.IntVal.bitsToDouble(); + break; + case Type::FloatTyID: + assert(DestTy == Type::Int32Ty && "Invalid bitcast"); + GV.IntVal.floatToBits(GV.FloatVal); + break; + case Type::DoubleTyID: + assert(DestTy == Type::Int64Ty && "Invalid bitcast"); + GV.IntVal.doubleToBits(GV.DoubleVal); + break; + case Type::PointerTyID: + assert(isa(DestTy) && "Invalid bitcast"); + break; // getConstantValue(Op0) above already converted it + } + return GV; } case Instruction::Add: + case Instruction::Sub: + case Instruction::Mul: + case Instruction::UDiv: + case Instruction::SDiv: + case Instruction::URem: + case Instruction::SRem: + case Instruction::And: + case Instruction::Or: + case Instruction::Xor: { + GenericValue LHS = getConstantValue(Op0); + GenericValue RHS = getConstantValue(CE->getOperand(1)); + GenericValue GV; switch (CE->getOperand(0)->getType()->getTypeID()) { default: assert(0 && "Bad add type!"); abort(); case Type::IntegerTyID: - Result.IntVal = getConstantValue(CE->getOperand(0)).IntVal + \ - getConstantValue(CE->getOperand(1)).IntVal; + switch (CE->getOpcode()) { + default: assert(0 && "Invalid integer opcode"); + case Instruction::Add: GV.IntVal = LHS.IntVal + RHS.IntVal; break; + case Instruction::Sub: GV.IntVal = LHS.IntVal - RHS.IntVal; break; + case Instruction::Mul: GV.IntVal = LHS.IntVal * RHS.IntVal; break; + case Instruction::UDiv:GV.IntVal = LHS.IntVal.udiv(RHS.IntVal); break; + case Instruction::SDiv:GV.IntVal = LHS.IntVal.sdiv(RHS.IntVal); break; + case Instruction::URem:GV.IntVal = LHS.IntVal.urem(RHS.IntVal); break; + case Instruction::SRem:GV.IntVal = LHS.IntVal.srem(RHS.IntVal); break; + case Instruction::And: GV.IntVal = LHS.IntVal & RHS.IntVal; break; + case Instruction::Or: GV.IntVal = LHS.IntVal | RHS.IntVal; break; + case Instruction::Xor: GV.IntVal = LHS.IntVal ^ RHS.IntVal; break; + } break; case Type::FloatTyID: - Result.FloatVal = getConstantValue(CE->getOperand(0)).FloatVal + - getConstantValue(CE->getOperand(1)).FloatVal; + switch (CE->getOpcode()) { + default: assert(0 && "Invalid float opcode"); abort(); + case Instruction::Add: + GV.FloatVal = LHS.FloatVal + RHS.FloatVal; break; + case Instruction::Sub: + GV.FloatVal = LHS.FloatVal - RHS.FloatVal; break; + case Instruction::Mul: + GV.FloatVal = LHS.FloatVal * RHS.FloatVal; break; + case Instruction::FDiv: + GV.FloatVal = LHS.FloatVal / RHS.FloatVal; break; + case Instruction::FRem: + GV.FloatVal = ::fmodf(LHS.FloatVal,RHS.FloatVal); break; + } break; case Type::DoubleTyID: - Result.DoubleVal = getConstantValue(CE->getOperand(0)).DoubleVal + - getConstantValue(CE->getOperand(1)).DoubleVal; + switch (CE->getOpcode()) { + default: assert(0 && "Invalid double opcode"); abort(); + case Instruction::Add: + GV.DoubleVal = LHS.DoubleVal + RHS.DoubleVal; break; + case Instruction::Sub: + GV.DoubleVal = LHS.DoubleVal - RHS.DoubleVal; break; + case Instruction::Mul: + GV.DoubleVal = LHS.DoubleVal * RHS.DoubleVal; break; + case Instruction::FDiv: + GV.DoubleVal = LHS.DoubleVal / RHS.DoubleVal; break; + case Instruction::FRem: + GV.DoubleVal = ::fmod(LHS.DoubleVal,RHS.DoubleVal); break; + } break; } - return Result; + return GV; + } default: break; } - cerr << "ConstantExpr not handled as global var init: " << *CE << "\n"; + cerr << "ConstantExpr not handled: " << *CE << "\n"; abort(); } + GenericValue Result; switch (C->getType()->getTypeID()) { case Type::FloatTyID: Result.FloatVal = (float)cast(C)->getValue(); @@ -399,7 +508,7 @@ assert(0 && "Unknown constant pointer type!"); break; default: - cerr << "ERROR: Constant unimp for type: " << *C->getType() << "\n"; + cerr << "ERROR: Constant unimplemented for type: " << *C->getType() << "\n"; abort(); } return Result; From rspencer at reidspencer.com Tue Mar 6 16:42:35 2007 From: rspencer at reidspencer.com (Reid Spencer) Date: Tue, 06 Mar 2007 14:42:35 -0800 Subject: [llvm-commits] JIT Failures On Grawp i386 nightly tester In-Reply-To: <1173208530.24497.153.camel@bashful.x10sys.com> References: <200703061529.l26FTa4V031902@zion.cs.uiuc.edu> <1173208530.24497.153.camel@bashful.x10sys.com> Message-ID: <1173220956.24497.174.camel@bashful.x10sys.com> As far as I can tell, these issues have all been fixed with the improvement of ExecutionEngine::getConstantValue(). I'm not sure how anything worked previously as none of the casting operators were implemented. In any event, constant expressions are fully implemented now. All the tests pass on Linux. We'll see if they pass on Darwin tonight. Reid. On Tue, 2007-03-06 at 11:15 -0800, Reid Spencer wrote: > On Tue, 2007-03-06 at 10:48 -0800, Chris Lattner wrote: > > Hi Reid, > > > > Can you take a look at these JIT failures? They are almost certainly > > GenericValue related. > > Already am. There were similar ones on your ppc32 as well. > > > > Thanks, > > > > -Chris > > > > Begin forwarded message: > > > > > From: Nobody > > > Date: March 6, 2007 7:29:36 AM PST > > > To: llvm-testresults at cs.uiuc.edu > > > Subject: [llvm-testresults] Grawp i386 nightly tester results > > > > > > http://llvm.org/nightlytest/test.php?machine=64&night=2376 > > > Name: grawp.apple.com > > > Nickname: Grawp > > > Buildstatus: OK > > > > > > New Test Passes: > > > None > > > > > > New Test Failures: > > > Applications/kimwitu++/kc [JIT codegen, JIT] > > > Applications/lambda-0.1.3/lambda [JIT codegen, JIT] > > > Benchmarks/CoyoteBench/fftbench [JIT codegen, JIT] > > > Benchmarks/Prolangs-C++/city/city [JIT codegen, JIT] > > > Benchmarks/Prolangs-C++/deriv1/deriv1 [JIT codegen, JIT] > > > Benchmarks/Prolangs-C++/deriv2/deriv2 [JIT codegen, JIT] > > > Benchmarks/Prolangs-C++/employ/employ [JIT codegen, JIT] > > > Benchmarks/Prolangs-C++/family/family [JIT codegen, JIT] > > > Benchmarks/Prolangs-C++/garage/garage [JIT codegen, JIT] > > > Benchmarks/Prolangs-C++/life/life [JIT codegen, JIT] > > > Benchmarks/Prolangs-C++/NP/np [JIT codegen, JIT] > > > Benchmarks/Prolangs-C++/objects/objects [JIT codegen, JIT] > > > Benchmarks/Prolangs-C++/ocean/ocean [JIT codegen, JIT] > > > Benchmarks/Prolangs-C++/office/office [JIT codegen, JIT] > > > Benchmarks/Prolangs-C++/primes/primes [JIT codegen, JIT] > > > Benchmarks/Prolangs-C++/shapes/shapes [JIT codegen, JIT] > > > Benchmarks/Prolangs-C++/simul/simul [JIT codegen, JIT] > > > Benchmarks/Prolangs-C++/trees/trees [JIT codegen, JIT] > > > Benchmarks/Prolangs-C++/vcirc/vcirc [JIT codegen, JIT] > > > Benchmarks/Shootout-C++/methcall [JIT codegen, JIT] > > > Benchmarks/Shootout-C++/objinst [JIT codegen, JIT] > > > Benchmarks/tramp3d-v4/tramp3d-v4 [JIT codegen, ] > > > Nurbs/nurbs [JIT codegen, ] > > > SPEC/CFP2006/444.namd/444.namd [JIT codegen, JIT] > > > SPEC/CFP2006/447.dealII/447.dealII [JIT codegen, ] > > > SPEC/CINT2000/252.eon/252.eon [JIT codegen, JIT] > > > SPEC/CINT2006/473.astar/473.astar [JIT codegen, JIT] > > > > > > > > > Added Tests: > > > test/CFrontend/2007-03-05-DataLayout.c > > > test/CodeGen/X86/mmx-emms.ll > > > test/Transforms/InstCombine/udiv_select_to_select_shift.ll > > > > > > > > > Removed Tests: > > > None > > > > > > Significant changes in test results: > > > JIT: > > > singlesource/Benchmarks/Shootout-C++/ackermann: 9.47% (3.80 => 3.44) > > > singlesource/Benchmarks/Shootout/matrix: 11.57% (10.72 => 9.48) > > > LLC-BETA: > > > external/SPEC/CFP2000/179.art/179.art: 8.75% (2.40 => 2.19) > > > > > > _______________________________________________ > > > llvm-testresults mailing list > > > llvm-testresults at cs.uiuc.edu > > > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-testresults > > > > _______________________________________________ > > llvm-commits mailing list > > llvm-commits at cs.uiuc.edu > > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From criswell at cs.uiuc.edu Tue Mar 6 16:44:55 2007 From: criswell at cs.uiuc.edu (John Criswell) Date: Tue, 6 Mar 2007 16:44:55 -0600 Subject: [llvm-commits] [see] CVS: llvm-poolalloc/lib/DSA/DataStructure.cpp Message-ID: <200703062244.l26MitI0008337@zion.cs.uiuc.edu> Changes in directory llvm-poolalloc/lib/DSA: DataStructure.cpp updated: 1.248.2.4.2.1 -> 1.248.2.4.2.2 --- Log message: Disabled debugging output. --- Diffs of the changes: (+2 -0) DataStructure.cpp | 2 ++ 1 files changed, 2 insertions(+) Index: llvm-poolalloc/lib/DSA/DataStructure.cpp diff -u llvm-poolalloc/lib/DSA/DataStructure.cpp:1.248.2.4.2.1 llvm-poolalloc/lib/DSA/DataStructure.cpp:1.248.2.4.2.2 --- llvm-poolalloc/lib/DSA/DataStructure.cpp:1.248.2.4.2.1 Wed Feb 28 11:35:32 2007 +++ llvm-poolalloc/lib/DSA/DataStructure.cpp Tue Mar 6 16:44:38 2007 @@ -1402,10 +1402,12 @@ Value *dest = getMetaPoolValue(); Value *curr = other->getMetaPoolValue(); if (dest != curr) { +#if 0 std::cerr << "LLVA: Merging metapools: " << this->Creator->getParent()->getParent()->getName() << " : " << other->Creator->getParent()->getParent()->getName() << "\n" << "LLVA: " << *(this->Creator) << "\n" << "LLVA: " << *(other->Creator) << "\n"; curr->replaceAllUsesWith(dest); +#endif } //merge the hash sets in to other From clattner at apple.com Tue Mar 6 16:45:16 2007 From: clattner at apple.com (Chris Lattner) Date: Tue, 6 Mar 2007 14:45:16 -0800 Subject: [llvm-commits] JIT Failures On Grawp i386 nightly tester In-Reply-To: <1173220956.24497.174.camel@bashful.x10sys.com> References: <200703061529.l26FTa4V031902@zion.cs.uiuc.edu> <1173208530.24497.153.camel@bashful.x10sys.com> <1173220956.24497.174.camel@bashful.x10sys.com> Message-ID: On Mar 6, 2007, at 2:42 PM, Reid Spencer wrote: > As far as I can tell, these issues have all been fixed with the > improvement of ExecutionEngine::getConstantValue(). I'm not sure how > anything worked previously as none of the casting operators were > implemented. In any event, constant expressions are fully implemented > now. All the tests pass on Linux. We'll see if they pass on Darwin > tonight. Thanks Reid! -Chris From evan.cheng at apple.com Tue Mar 6 18:12:35 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 6 Mar 2007 18:12:35 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/ARM/ARMRegisterInfo.cpp Message-ID: <200703070012.l270CZUO009983@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/ARM: ARMRegisterInfo.cpp updated: 1.81 -> 1.82 --- Log message: Fix one more Thumb eliminateFrameIndex bug. --- Diffs of the changes: (+23 -9) ARMRegisterInfo.cpp | 32 +++++++++++++++++++++++--------- 1 files changed, 23 insertions(+), 9 deletions(-) Index: llvm/lib/Target/ARM/ARMRegisterInfo.cpp diff -u llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.81 llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.82 --- llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.81 Tue Mar 6 16:02:53 2007 +++ llvm/lib/Target/ARM/ARMRegisterInfo.cpp Tue Mar 6 18:12:18 2007 @@ -398,7 +398,7 @@ Bytes -= ThisVal; NumMIs++; NumBits = 8; - Scale = 1; + Scale = 1; // Followed by a number of tADDi8. Chunk = ((1 << NumBits) - 1) * Scale; } @@ -685,7 +685,7 @@ const TargetInstrDescriptor &Desc = TII.get(Opcode); unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); bool isSub = false; - + if (Opcode == ARM::ADDri) { Offset += MI.getOperand(i+1).getImm(); if (Offset == 0) { @@ -724,8 +724,21 @@ MI.getOperand(i+1).ChangeToImmediate(ThisSOImmVal); } else if (Opcode == ARM::tADDrSPi) { Offset += MI.getOperand(i+1).getImm(); - assert((Offset & 3) == 0 && - "Thumb add/sub sp, #imm immediate must be multiple of 4!"); + + // Can't use tADDrSPi if it's based off the frame pointer. + unsigned NumBits = 0; + unsigned Scale = 1; + if (FrameReg != ARM::SP) { + Opcode = ARM::tADDi3; + MI.setInstrDescriptor(TII.get(ARM::tADDi3)); + NumBits = 3; + } else { + NumBits = 8; + Scale = 4; + assert((Offset & 3) == 0 && + "Thumb add/sub sp, #imm immediate must be multiple of 4!"); + } + if (Offset == 0) { // Turn it into a move. MI.setInstrDescriptor(TII.get(ARM::tMOVrr)); @@ -735,16 +748,17 @@ } // Common case: small offset, fits into instruction. - if (((Offset >> 2) & ~255U) == 0) { + unsigned Mask = (1 << NumBits) - 1; + if (((Offset / Scale) & ~Mask) == 0) { // Replace the FrameIndex with sp / fp MI.getOperand(i).ChangeToRegister(FrameReg, false); - MI.getOperand(i+1).ChangeToImmediate(Offset >> 2); + MI.getOperand(i+1).ChangeToImmediate(Offset / Scale); return; } unsigned DestReg = MI.getOperand(0).getReg(); unsigned Bytes = (Offset > 0) ? Offset : -Offset; - unsigned NumMIs = calcNumMI(Opcode, 0, Bytes, 8, 1); + unsigned NumMIs = calcNumMI(Opcode, 0, Bytes, NumBits, Scale); // MI would expand into a large number of instructions. Don't try to // simplify the immediate. if (NumMIs > 2) { @@ -758,8 +772,8 @@ // r0 = add sp, 255*4 // r0 = add r0, (imm - 255*4) MI.getOperand(i).ChangeToRegister(FrameReg, false); - MI.getOperand(i+1).ChangeToImmediate(255); - Offset = (Offset - 255 * 4); + MI.getOperand(i+1).ChangeToImmediate(Mask); + Offset = (Offset - Mask * Scale); MachineBasicBlock::iterator NII = next(II); emitThumbRegPlusImmediate(MBB, NII, DestReg, DestReg, Offset, TII); } else { From evan.cheng at apple.com Tue Mar 6 18:14:05 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 6 Mar 2007 18:14:05 -0600 Subject: [llvm-commits] CVS: llvm/test/CodeGen/ARM/2007-03-06-AddR7.ll Message-ID: <200703070014.l270E5CB010019@zion.cs.uiuc.edu> Changes in directory llvm/test/CodeGen/ARM: 2007-03-06-AddR7.ll added (r1.1) --- Log message: New test case. --- Diffs of the changes: (+117 -0) 2007-03-06-AddR7.ll | 117 ++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 117 insertions(+) Index: llvm/test/CodeGen/ARM/2007-03-06-AddR7.ll diff -c /dev/null llvm/test/CodeGen/ARM/2007-03-06-AddR7.ll:1.1 *** /dev/null Tue Mar 6 18:13:58 2007 --- llvm/test/CodeGen/ARM/2007-03-06-AddR7.ll Tue Mar 6 18:13:48 2007 *************** *** 0 **** --- 1,117 ---- + ; RUN: llvm-as < %s | llc -march=thumb && + ; RUN: llvm-as < %s | llc -mtriple=thumb-apple-darwin -relocation-model=pic -mattr=+v6,+vfp2 | not grep 'add r., r7, #2 \* 4' + + %struct.__fooAllocator = type opaque + %struct.__fooY = type { %struct.fooXBase, %struct.__fooString*, %struct.__fooU*, %struct.__fooV*, i8** } + %struct.__fooZ = type opaque + %struct.__fooU = type opaque + %struct.__fooString = type opaque + %struct.__fooV = type opaque + %struct.fooXBase = type { i32, [4 x i8] } + %struct.fooXClass = type { i32, i8*, void (i8*)*, i8* (%struct.__fooAllocator*, i8*)*, void (i8*)*, i8 (i8*, i8*) zext *, i32 (i8*)*, %struct.__fooString* (i8*, %struct.__fooZ*)*, %struct.__fooString* (i8*)* } + %struct.aa_cache = type { i32, i32, [1 x %struct.aa_method*] } + %struct.aa_class = type { %struct.aa_class*, %struct.aa_class*, i8*, i32, i32, i32, %struct.aa_ivar_list*, %struct.aa_method_list**, %struct.aa_cache*, %struct.aa_protocol_list* } + %struct.aa_ivar = type { i8*, i8*, i32 } + %struct.aa_ivar_list = type { i32, [1 x %struct.aa_ivar] } + %struct.aa_method = type { %struct.aa_ss*, i8*, %struct.aa_object* (%struct.aa_object*, %struct.aa_ss*, ...)* } + %struct.aa_method_list = type { %struct.aa_method_list*, i32, [1 x %struct.aa_method] } + %struct.aa_object = type { %struct.aa_class* } + %struct.aa_protocol_list = type { %struct.aa_protocol_list*, i32, [1 x %struct.aa_object*] } + %struct.aa_ss = type opaque + @__kfooYTypeID = external global i32 ; [#uses=3] + @__fooYClass = external constant %struct.fooXClass ; <%struct.fooXClass*> [#uses=1] + @__fooXClassTableSize = external global i32 ; [#uses=1] + @__fooXAaClassTable = external global i32* ; [#uses=1] + @s.10319 = external global %struct.aa_ss* ; <%struct.aa_ss**> [#uses=2] + @str15 = external constant [24 x i8] ; <[24 x i8]*> [#uses=1] + + implementation ; Functions: + + define i8 @test(%struct.__fooY* %calendar, double* %atp, i8* %componentDesc, ...) zext { + entry: + %args = alloca i8*, align 4 ; [#uses=5] + %args4 = bitcast i8** %args to i8* ; [#uses=2] + call void @llvm.va_start( i8* %args4 ) + %tmp6 = load i32* @__kfooYTypeID ; [#uses=1] + icmp eq i32 %tmp6, 0 ; :0 [#uses=1] + br i1 %0, label %cond_true, label %cond_next + + cond_true: ; preds = %entry + %tmp7 = call i32 @_fooXRegisterClass( %struct.fooXClass* @__fooYClass ) ; [#uses=1] + store i32 %tmp7, i32* @__kfooYTypeID + br label %cond_next + + cond_next: ; preds = %cond_true, %entry + %tmp8 = load i32* @__kfooYTypeID ; [#uses=2] + %tmp15 = load i32* @__fooXClassTableSize ; [#uses=1] + icmp ugt i32 %tmp15, %tmp8 ; :1 [#uses=1] + br i1 %1, label %cond_next18, label %cond_true58 + + cond_next18: ; preds = %cond_next + %tmp21 = getelementptr %struct.__fooY* %calendar, i32 0, i32 0, i32 0 ; [#uses=1] + %tmp22 = load i32* %tmp21 ; [#uses=2] + %tmp29 = load i32** @__fooXAaClassTable ; [#uses=1] + %tmp31 = getelementptr i32* %tmp29, i32 %tmp8 ; [#uses=1] + %tmp32 = load i32* %tmp31 ; [#uses=1] + icmp eq i32 %tmp22, %tmp32 ; :2 [#uses=1] + %.not = xor i1 %2, true ; [#uses=1] + icmp ugt i32 %tmp22, 4095 ; :3 [#uses=1] + %bothcond = and i1 %.not, %3 ; [#uses=1] + br i1 %bothcond, label %cond_true58, label %bb48 + + bb48: ; preds = %cond_next18 + %tmp78 = call i32 @strlen( i8* %componentDesc ) ; [#uses=4] + %tmp92 = alloca i32, i32 %tmp78 ; [#uses=2] + icmp sgt i32 %tmp78, 0 ; :4 [#uses=1] + br i1 %4, label %cond_true111, label %bb114 + + cond_true58: ; preds = %cond_next18, %cond_next + %tmp59 = load %struct.aa_ss** @s.10319 ; <%struct.aa_ss*> [#uses=2] + icmp eq %struct.aa_ss* %tmp59, null ; :5 [#uses=1] + %tmp6869 = bitcast %struct.__fooY* %calendar to i8* ; [#uses=2] + br i1 %5, label %cond_true60, label %cond_next64 + + cond_true60: ; preds = %cond_true58 + %tmp63 = call %struct.aa_ss* @sel_registerName( i8* getelementptr ([24 x i8]* @str15, i32 0, i32 0) ) ; <%struct.aa_ss*> [#uses=2] + store %struct.aa_ss* %tmp63, %struct.aa_ss** @s.10319 + %tmp66137 = volatile load i8** %args ; [#uses=1] + %tmp73138 = call i8 (i8*, %struct.aa_ss*, ...) zext * bitcast (%struct.aa_object* (%struct.aa_object*, %struct.aa_ss*, ...)* @aa_mm to i8 (i8*, %struct.aa_ss*, ...) zext *)( i8* %tmp6869, %struct.aa_ss* %tmp63, double* %atp, i8* %componentDesc, i8* %tmp66137 ) zext ; [#uses=1] + ret i8 %tmp73138 + + cond_next64: ; preds = %cond_true58 + %tmp66 = volatile load i8** %args ; [#uses=1] + %tmp73 = call i8 (i8*, %struct.aa_ss*, ...) zext * bitcast (%struct.aa_object* (%struct.aa_object*, %struct.aa_ss*, ...)* @aa_mm to i8 (i8*, %struct.aa_ss*, ...) zext *)( i8* %tmp6869, %struct.aa_ss* %tmp59, double* %atp, i8* %componentDesc, i8* %tmp66 ) zext ; [#uses=1] + ret i8 %tmp73 + + cond_true111: ; preds = %cond_true111, %bb48 + %idx.2132.0 = phi i32 [ 0, %bb48 ], [ %indvar.next, %cond_true111 ] ; [#uses=2] + %tmp95 = volatile load i8** %args ; [#uses=2] + %tmp97 = getelementptr i8* %tmp95, i32 4 ; [#uses=1] + volatile store i8* %tmp97, i8** %args + %tmp9899 = bitcast i8* %tmp95 to i32* ; [#uses=1] + %tmp100 = load i32* %tmp9899 ; [#uses=1] + %tmp104 = getelementptr i32* %tmp92, i32 %idx.2132.0 ; [#uses=1] + store i32 %tmp100, i32* %tmp104 + %indvar.next = add i32 %idx.2132.0, 1 ; [#uses=2] + icmp eq i32 %indvar.next, %tmp78 ; :6 [#uses=1] + br i1 %6, label %bb114, label %cond_true111 + + bb114: ; preds = %cond_true111, %bb48 + call void @llvm.va_end( i8* %args4 ) + %tmp122 = call i8 @_fooYCCV( %struct.__fooY* %calendar, double* %atp, i8* %componentDesc, i32* %tmp92, i32 %tmp78 ) zext ; [#uses=1] + ret i8 %tmp122 + } + + declare i32 @_fooXRegisterClass(%struct.fooXClass*) + + declare i8 @_fooYCCV(%struct.__fooY*, double*, i8*, i32*, i32) zext + + declare %struct.aa_object* @aa_mm(%struct.aa_object*, %struct.aa_ss*, ...) + + declare %struct.aa_ss* @sel_registerName(i8*) + + declare void @llvm.va_start(i8*) + + declare i32 @strlen(i8*) + + declare void @llvm.va_end(i8*) From dpatel at apple.com Tue Mar 6 18:26:30 2007 From: dpatel at apple.com (Devang Patel) Date: Tue, 6 Mar 2007 18:26:30 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/Transforms/Scalar.h Message-ID: <200703070026.l270QUBg010246@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/Transforms: Scalar.h updated: 1.73 -> 1.74 --- Log message: Now LoopUnswitch is a LoopPass. --- Diffs of the changes: (+1 -1) Scalar.h | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/include/llvm/Transforms/Scalar.h diff -u llvm/include/llvm/Transforms/Scalar.h:1.73 llvm/include/llvm/Transforms/Scalar.h:1.74 --- llvm/include/llvm/Transforms/Scalar.h:1.73 Tue Mar 6 15:14:09 2007 +++ llvm/include/llvm/Transforms/Scalar.h Tue Mar 6 18:26:10 2007 @@ -127,7 +127,7 @@ // // LoopUnswitch - This pass is a simple loop unswitching pass. // -FunctionPass *createLoopUnswitchPass(); +LoopPass *createLoopUnswitchPass(); //===----------------------------------------------------------------------===// // From dpatel at apple.com Tue Mar 6 18:26:33 2007 From: dpatel at apple.com (Devang Patel) Date: Tue, 6 Mar 2007 18:26:33 -0600 Subject: [llvm-commits] CVS: llvm/lib/Transforms/Scalar/LoopUnswitch.cpp Message-ID: <200703070026.l270QXop010251@zion.cs.uiuc.edu> Changes in directory llvm/lib/Transforms/Scalar: LoopUnswitch.cpp updated: 1.64 -> 1.65 --- Log message: Now LoopUnswitch is a LoopPass. --- Diffs of the changes: (+17 -86) LoopUnswitch.cpp | 103 +++++++++---------------------------------------------- 1 files changed, 17 insertions(+), 86 deletions(-) Index: llvm/lib/Transforms/Scalar/LoopUnswitch.cpp diff -u llvm/lib/Transforms/Scalar/LoopUnswitch.cpp:1.64 llvm/lib/Transforms/Scalar/LoopUnswitch.cpp:1.65 --- llvm/lib/Transforms/Scalar/LoopUnswitch.cpp:1.64 Fri Mar 2 17:35:28 2007 +++ llvm/lib/Transforms/Scalar/LoopUnswitch.cpp Tue Mar 6 18:26:10 2007 @@ -34,6 +34,7 @@ #include "llvm/Instructions.h" #include "llvm/Analysis/ConstantFolding.h" #include "llvm/Analysis/LoopInfo.h" +#include "llvm/Analysis/LoopPass.h" #include "llvm/Transforms/Utils/Cloning.h" #include "llvm/Transforms/Utils/Local.h" #include "llvm/Transforms/Utils/BasicBlockUtils.h" @@ -58,16 +59,17 @@ Threshold("loop-unswitch-threshold", cl::desc("Max loop size to unswitch"), cl::init(10), cl::Hidden); - class VISIBILITY_HIDDEN LoopUnswitch : public FunctionPass { + class VISIBILITY_HIDDEN LoopUnswitch : public LoopPass { LoopInfo *LI; // Loop information + LPPassManager *LPM; - // LoopProcessWorklist - List of loops we need to process. + // LoopProcessWorklist - Used to check if second loop needs processing + // after RewriteLoopBodyWithConditionConstant rewrites first loop. std::vector LoopProcessWorklist; SmallPtrSet UnswitchedVals; public: - virtual bool runOnFunction(Function &F); - bool visitLoop(Loop *L); + bool runOnLoop(Loop *L, LPPassManager &LPM); /// This transformation requires natural loop information & requires that /// loop preheaders be inserted into the CFG... @@ -110,29 +112,7 @@ RegisterPass X("loop-unswitch", "Unswitch loops"); } -FunctionPass *llvm::createLoopUnswitchPass() { return new LoopUnswitch(); } - -bool LoopUnswitch::runOnFunction(Function &F) { - bool Changed = false; - LI = &getAnalysis(); - - // Populate the worklist of loops to process in post-order. - for (LoopInfo::iterator I = LI->begin(), E = LI->end(); I != E; ++I) - for (po_iterator LI = po_begin(*I), E = po_end(*I); LI != E; ++LI) - LoopProcessWorklist.push_back(*LI); - - // Process the loops in worklist order, this is a post-order visitation of - // the loops. We use a worklist of loops so that loops can be removed at any - // time if they are deleted (e.g. the backedge of a loop is removed). - while (!LoopProcessWorklist.empty()) { - Loop *L = LoopProcessWorklist.back(); - LoopProcessWorklist.pop_back(); - Changed |= visitLoop(L); - } - - UnswitchedVals.clear(); - return Changed; -} +LoopPass *llvm::createLoopUnswitchPass() { return new LoopUnswitch(); } /// FindLIVLoopCondition - Cond is a condition that occurs in L. If it is /// invariant in the loop, or has an invariant piece, return the invariant. @@ -160,9 +140,10 @@ return 0; } -bool LoopUnswitch::visitLoop(Loop *L) { +bool LoopUnswitch::runOnLoop(Loop *L, LPPassManager &LPM_Ref) { assert(L->isLCSSAForm()); - + LI = &getAnalysis(); + LPM = &LPM_Ref; bool Changed = false; // Loop over all of the basic blocks in the loop. If we find an interior @@ -466,13 +447,10 @@ /// CloneLoop - Recursively clone the specified loop and all of its children, /// mapping the blocks with the specified map. static Loop *CloneLoop(Loop *L, Loop *PL, DenseMap &VM, - LoopInfo *LI) { + LoopInfo *LI, LPPassManager *LPM) { Loop *New = new Loop(); - if (PL) - PL->addChildLoop(New); - else - LI->addTopLevelLoop(New); + LPM->insertLoop(New, PL); // Add all of the blocks in L to the new loop. for (Loop::block_iterator I = L->block_begin(), E = L->block_end(); @@ -482,7 +460,7 @@ // Add all of the subloops to the new loop. for (Loop::iterator I = L->begin(), E = L->end(); I != E; ++I) - CloneLoop(*I, New, VM, LI); + CloneLoop(*I, New, VM, LI, LPM); return New; } @@ -545,7 +523,7 @@ OrigPH->getTerminator()->eraseFromParent(); // We need to reprocess this loop, it could be unswitched again. - LoopProcessWorklist.push_back(L); + LPM->redoLoop(L); // Now that we know that the loop is never entered when this condition is a // particular value, rewrite the loop with this info. We know that this will @@ -654,7 +632,7 @@ NewBlocks[0], F->end()); // Now we create the new Loop object for the versioned loop. - Loop *NewLoop = CloneLoop(L, L->getParentLoop(), ValueMap, LI); + Loop *NewLoop = CloneLoop(L, L->getParentLoop(), ValueMap, LI, LPM); Loop *ParentLoop = L->getParentLoop(); if (ParentLoop) { // Make sure to add the cloned preheader and exit blocks to the parent loop @@ -699,8 +677,8 @@ EmitPreheaderBranchOnCondition(LIC, Val, NewBlocks[0], LoopBlocks[0], OldBR); OldBR->eraseFromParent(); - LoopProcessWorklist.push_back(L); LoopProcessWorklist.push_back(NewLoop); + LPM->redoLoop(L); // Now we rewrite the original code to know that the condition is true and the // new code to know that the condition is false. @@ -855,54 +833,7 @@ /// so they just reparent loops. If the loops are actually dead, they will be /// removed later. void LoopUnswitch::RemoveLoopFromHierarchy(Loop *L) { - if (Loop *ParentLoop = L->getParentLoop()) { // Not a top-level loop. - // Reparent all of the blocks in this loop. Since BBLoop had a parent, - // they are now all in it. - for (Loop::block_iterator I = L->block_begin(), E = L->block_end(); - I != E; ++I) - if (LI->getLoopFor(*I) == L) // Don't change blocks in subloops. - LI->changeLoopFor(*I, ParentLoop); - - // Remove the loop from its parent loop. - for (Loop::iterator I = ParentLoop->begin(), E = ParentLoop->end();; - ++I) { - assert(I != E && "Couldn't find loop"); - if (*I == L) { - ParentLoop->removeChildLoop(I); - break; - } - } - - // Move all subloops into the parent loop. - while (L->begin() != L->end()) - ParentLoop->addChildLoop(L->removeChildLoop(L->end()-1)); - } else { - // Reparent all of the blocks in this loop. Since BBLoop had no parent, - // they no longer in a loop at all. - - for (unsigned i = 0; i != L->getBlocks().size(); ++i) { - // Don't change blocks in subloops. - if (LI->getLoopFor(L->getBlocks()[i]) == L) { - LI->removeBlock(L->getBlocks()[i]); - --i; - } - } - - // Remove the loop from the top-level LoopInfo object. - for (LoopInfo::iterator I = LI->begin(), E = LI->end();; ++I) { - assert(I != E && "Couldn't find loop"); - if (*I == L) { - LI->removeLoop(I); - break; - } - } - - // Move all of the subloops to the top-level. - while (L->begin() != L->end()) - LI->addTopLevelLoop(L->removeChildLoop(L->end()-1)); - } - - delete L; + LPM->deleteLoopFromQueue(L); RemoveLoopFromWorklist(L); } From dpatel at apple.com Tue Mar 6 18:26:36 2007 From: dpatel at apple.com (Devang Patel) Date: Tue, 6 Mar 2007 18:26:36 -0600 Subject: [llvm-commits] CVS: llvm/tools/opt/opt.cpp Message-ID: <200703070026.l270QaIW010258@zion.cs.uiuc.edu> Changes in directory llvm/tools/opt: opt.cpp updated: 1.131 -> 1.132 --- Log message: Now LoopUnswitch is a LoopPass. --- Diffs of the changes: (+1 -0) opt.cpp | 1 + 1 files changed, 1 insertion(+) Index: llvm/tools/opt/opt.cpp diff -u llvm/tools/opt/opt.cpp:1.131 llvm/tools/opt/opt.cpp:1.132 --- llvm/tools/opt/opt.cpp:1.131 Wed Feb 7 15:41:02 2007 +++ llvm/tools/opt/opt.cpp Tue Mar 6 18:26:10 2007 @@ -18,6 +18,7 @@ #include "llvm/Bytecode/WriteBytecodePass.h" #include "llvm/Assembly/PrintModulePass.h" #include "llvm/Analysis/Verifier.h" +#include "llvm/Analysis/LoopPass.h" #include "llvm/Target/TargetData.h" #include "llvm/Target/TargetMachine.h" #include "llvm/Support/PassNameParser.h" From dpatel at apple.com Tue Mar 6 18:26:37 2007 From: dpatel at apple.com (Devang Patel) Date: Tue, 6 Mar 2007 18:26:37 -0600 Subject: [llvm-commits] CVS: llvm/lib/Analysis/LoopPass.cpp Message-ID: <200703070026.l270Qbqf010263@zion.cs.uiuc.edu> Changes in directory llvm/lib/Analysis: LoopPass.cpp updated: 1.16 -> 1.17 --- Log message: Now LoopUnswitch is a LoopPass. --- Diffs of the changes: (+2 -1) LoopPass.cpp | 3 ++- 1 files changed, 2 insertions(+), 1 deletion(-) Index: llvm/lib/Analysis/LoopPass.cpp diff -u llvm/lib/Analysis/LoopPass.cpp:1.16 llvm/lib/Analysis/LoopPass.cpp:1.17 --- llvm/lib/Analysis/LoopPass.cpp:1.16 Tue Mar 6 13:50:49 2007 +++ llvm/lib/Analysis/LoopPass.cpp Tue Mar 6 18:26:10 2007 @@ -132,7 +132,7 @@ // queue. This allows LoopPass to change loop nest for the loop. This // utility may send LPPassManager into infinite loops so use caution. void LPPassManager::redoLoop(Loop *L) { - assert (CurrentLoop != L && "Can redo only CurrentLoop"); + assert (CurrentLoop == L && "Can redo only CurrentLoop"); redoThisLoop = true; } @@ -279,6 +279,7 @@ // [1] Create new Call Graph Pass Manager LPPM = new LPPassManager(PMD->getDepth() + 1); + LPPM->populateInheritedAnalysis(PMS); // [2] Set up new manager's top level manager PMTopLevelManager *TPM = PMD->getTopLevelManager(); From reid at x10sys.com Tue Mar 6 18:32:29 2007 From: reid at x10sys.com (Reid Spencer) Date: Tue, 6 Mar 2007 18:32:29 -0600 Subject: [llvm-commits] CVS: llvm/test/CFrontend/2007-03-05-DataLayout.c Message-ID: <200703070032.l270WTkA010372@zion.cs.uiuc.edu> Changes in directory llvm/test/CFrontend: 2007-03-05-DataLayout.c updated: 1.2 -> 1.3 --- Log message: Make this test more reliable across platforms. --- Diffs of the changes: (+2 -1) 2007-03-05-DataLayout.c | 3 ++- 1 files changed, 2 insertions(+), 1 deletion(-) Index: llvm/test/CFrontend/2007-03-05-DataLayout.c diff -u llvm/test/CFrontend/2007-03-05-DataLayout.c:1.2 llvm/test/CFrontend/2007-03-05-DataLayout.c:1.3 --- llvm/test/CFrontend/2007-03-05-DataLayout.c:1.2 Tue Mar 6 11:48:25 2007 +++ llvm/test/CFrontend/2007-03-05-DataLayout.c Tue Mar 6 18:32:12 2007 @@ -1,5 +1,6 @@ // Testcase for PR1242 -// RUN: %llvmgcc -S %s -o - | grep datalayout | wc -c | grep 130 +// RUN: %llvmgcc -S %s -o - | grep datalayout | \ +// RUN: not grep '"[Ee]-p:[36][24]:[36]:[24]"' #include #define NDIM 3 #define BODY 01 From reid at x10sys.com Tue Mar 6 18:39:28 2007 From: reid at x10sys.com (Reid Spencer) Date: Tue, 6 Mar 2007 18:39:28 -0600 Subject: [llvm-commits] CVS: llvm/test/CFrontend/2007-03-05-DataLayout.c Message-ID: <200703070039.l270dSJJ010517@zion.cs.uiuc.edu> Changes in directory llvm/test/CFrontend: 2007-03-05-DataLayout.c updated: 1.3 -> 1.4 --- Log message: Fix the pattern. --- Diffs of the changes: (+1 -1) 2007-03-05-DataLayout.c | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/test/CFrontend/2007-03-05-DataLayout.c diff -u llvm/test/CFrontend/2007-03-05-DataLayout.c:1.3 llvm/test/CFrontend/2007-03-05-DataLayout.c:1.4 --- llvm/test/CFrontend/2007-03-05-DataLayout.c:1.3 Tue Mar 6 18:32:12 2007 +++ llvm/test/CFrontend/2007-03-05-DataLayout.c Tue Mar 6 18:39:11 2007 @@ -1,6 +1,6 @@ // Testcase for PR1242 // RUN: %llvmgcc -S %s -o - | grep datalayout | \ -// RUN: not grep '"[Ee]-p:[36][24]:[36]:[24]"' +// RUN: not grep '"[Ee]-p:[36][24]:[36][24]"' #include #define NDIM 3 #define BODY 01 From reid at x10sys.com Tue Mar 6 19:09:41 2007 From: reid at x10sys.com (Reid Spencer) Date: Tue, 6 Mar 2007 19:09:41 -0600 Subject: [llvm-commits] CVS: llvm-test/SingleSource/UnitTests/Integer/sign.reference_output Message-ID: <200703070109.l2719fNl011006@zion.cs.uiuc.edu> Changes in directory llvm-test/SingleSource/UnitTests/Integer: sign.reference_output updated: 1.1 -> 1.2 --- Log message: Correct the reference output. The result is -1 for the last test. --- Diffs of the changes: (+1 -1) sign.reference_output | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm-test/SingleSource/UnitTests/Integer/sign.reference_output diff -u llvm-test/SingleSource/UnitTests/Integer/sign.reference_output:1.1 llvm-test/SingleSource/UnitTests/Integer/sign.reference_output:1.2 --- llvm-test/SingleSource/UnitTests/Integer/sign.reference_output:1.1 Fri Jan 26 17:34:47 2007 +++ llvm-test/SingleSource/UnitTests/Integer/sign.reference_output Tue Mar 6 19:09:24 2007 @@ -3,5 +3,5 @@ z=1, uz=1 z=0, uz=0 z=12, uz=12 -z=-1, uz=53428 +z=-1, uz=16777215 exit 0 From dpatel at apple.com Tue Mar 6 19:38:27 2007 From: dpatel at apple.com (Devang Patel) Date: Tue, 6 Mar 2007 19:38:27 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/Transforms/Scalar.h Message-ID: <200703070138.l271cRRh011567@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/Transforms: Scalar.h updated: 1.74 -> 1.75 --- Log message: Now LoopUnroll is a LoopPass. --- Diffs of the changes: (+1 -1) Scalar.h | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/include/llvm/Transforms/Scalar.h diff -u llvm/include/llvm/Transforms/Scalar.h:1.74 llvm/include/llvm/Transforms/Scalar.h:1.75 --- llvm/include/llvm/Transforms/Scalar.h:1.74 Tue Mar 6 18:26:10 2007 +++ llvm/include/llvm/Transforms/Scalar.h Tue Mar 6 19:38:05 2007 @@ -133,7 +133,7 @@ // // LoopUnroll - This pass is a simple loop unrolling pass. // -FunctionPass *createLoopUnrollPass(); +LoopPass *createLoopUnrollPass(); //===----------------------------------------------------------------------===// // From dpatel at apple.com Tue Mar 6 19:38:27 2007 From: dpatel at apple.com (Devang Patel) Date: Tue, 6 Mar 2007 19:38:27 -0600 Subject: [llvm-commits] CVS: llvm/lib/Transforms/Scalar/LoopUnroll.cpp Message-ID: <200703070138.l271cRa6011562@zion.cs.uiuc.edu> Changes in directory llvm/lib/Transforms/Scalar: LoopUnroll.cpp updated: 1.37 -> 1.38 --- Log message: Now LoopUnroll is a LoopPass. --- Diffs of the changes: (+7 -36) LoopUnroll.cpp | 43 +++++++------------------------------------ 1 files changed, 7 insertions(+), 36 deletions(-) Index: llvm/lib/Transforms/Scalar/LoopUnroll.cpp diff -u llvm/lib/Transforms/Scalar/LoopUnroll.cpp:1.37 llvm/lib/Transforms/Scalar/LoopUnroll.cpp:1.38 --- llvm/lib/Transforms/Scalar/LoopUnroll.cpp:1.37 Fri Mar 2 17:31:34 2007 +++ llvm/lib/Transforms/Scalar/LoopUnroll.cpp Tue Mar 6 19:38:05 2007 @@ -24,6 +24,7 @@ #include "llvm/Instructions.h" #include "llvm/Analysis/ConstantFolding.h" #include "llvm/Analysis/LoopInfo.h" +#include "llvm/Analysis/LoopPass.h" #include "llvm/Transforms/Utils/Cloning.h" #include "llvm/Transforms/Utils/Local.h" #include "llvm/Support/CFG.h" @@ -45,11 +46,10 @@ UnrollThreshold("unroll-threshold", cl::init(100), cl::Hidden, cl::desc("The cut-off point for loop unrolling")); - class VISIBILITY_HIDDEN LoopUnroll : public FunctionPass { + class VISIBILITY_HIDDEN LoopUnroll : public LoopPass { LoopInfo *LI; // The current loop information public: - virtual bool runOnFunction(Function &F); - bool visitLoop(Loop *L); + bool runOnLoop(Loop *L, LPPassManager &LPM); BasicBlock* FoldBlockIntoPredecessor(BasicBlock* BB); /// This transformation requires natural loop information & requires that @@ -66,20 +66,7 @@ RegisterPass X("loop-unroll", "Unroll loops"); } -FunctionPass *llvm::createLoopUnrollPass() { return new LoopUnroll(); } - -bool LoopUnroll::runOnFunction(Function &F) { - bool Changed = false; - LI = &getAnalysis(); - - // Transform all the top-level loops. Copy the loop list so that the child - // can update the loop tree if it needs to delete the loop. - std::vector SubLoops(LI->begin(), LI->end()); - for (unsigned i = 0, e = SubLoops.size(); i != e; ++i) - Changed |= visitLoop(SubLoops[i]); - - return Changed; -} +LoopPass *llvm::createLoopUnrollPass() { return new LoopUnroll(); } /// ApproximateLoopSize - Approximate the size of the loop after it has been /// unrolled. @@ -171,15 +158,9 @@ return OnlyPred; } -bool LoopUnroll::visitLoop(Loop *L) { +bool LoopUnroll::runOnLoop(Loop *L, LPPassManager &LPM) { bool Changed = false; - - // Recurse through all subloops before we process this loop. Copy the loop - // list so that the child can update the loop tree if it needs to delete the - // loop. - std::vector SubLoops(L->begin(), L->end()); - for (unsigned i = 0, e = SubLoops.size(); i != e; ++i) - Changed |= visitLoop(SubLoops[i]); + LI = &getAnalysis(); BasicBlock* Header = L->getHeader(); BasicBlock* LatchBlock = L->getLoopLatch(); @@ -367,18 +348,8 @@ } // Update the loop information for this loop. - Loop *Parent = L->getParentLoop(); - - // Move all of the basic blocks in the loop into the parent loop. - for (std::vector::const_iterator BB = NewLoopBlocks.begin(), - E = NewLoopBlocks.end(); BB != E; ++BB) - LI->changeLoopFor(*BB, Parent); - // Remove the loop from the parent. - if (Parent) - delete Parent->removeChildLoop(std::find(Parent->begin(), Parent->end(),L)); - else - delete LI->removeLoop(std::find(LI->begin(), LI->end(), L)); + LPM.deleteLoopFromQueue(L); ++NumUnrolled; return true; From evan.cheng at apple.com Tue Mar 6 20:36:33 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 6 Mar 2007 20:36:33 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/RegisterScavenging.h Message-ID: <200703070236.l272aXeu012484@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/CodeGen: RegisterScavenging.h updated: 1.8 -> 1.9 --- Log message: Add skipTo to set internal iterator. Useful when pointed to instruction is deleted. --- Diffs of the changes: (+4 -0) RegisterScavenging.h | 4 ++++ 1 files changed, 4 insertions(+) Index: llvm/include/llvm/CodeGen/RegisterScavenging.h diff -u llvm/include/llvm/CodeGen/RegisterScavenging.h:1.8 llvm/include/llvm/CodeGen/RegisterScavenging.h:1.9 --- llvm/include/llvm/CodeGen/RegisterScavenging.h:1.8 Tue Mar 6 04:00:43 2007 +++ llvm/include/llvm/CodeGen/RegisterScavenging.h Tue Mar 6 20:36:16 2007 @@ -79,6 +79,10 @@ while (MBBI != I) backward(); } + /// skipTo - Move the internal MBB iterator but do not update register states. + /// + void skipTo(MachineBasicBlock::iterator I) { MBBI = I; } + /// isReserved - Returns true if a register is reserved. It is never "unused". bool isReserved(unsigned Reg) const { return ReservedRegs[Reg]; } From evan.cheng at apple.com Tue Mar 6 20:38:22 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 6 Mar 2007 20:38:22 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp Message-ID: <200703070238.l272cMCV012542@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/ARM: ARMLoadStoreOptimizer.cpp updated: 1.3 -> 1.4 --- Log message: Fix some brittle code. Watch out for cases where register scavenger is pointing to deleted instructions. --- Diffs of the changes: (+39 -41) ARMLoadStoreOptimizer.cpp | 80 ++++++++++++++++++++++------------------------ 1 files changed, 39 insertions(+), 41 deletions(-) Index: llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp diff -u llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp:1.3 llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp:1.4 --- llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp:1.3 Tue Mar 6 15:59:20 2007 +++ llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp Tue Mar 6 20:38:05 2007 @@ -40,6 +40,7 @@ const TargetInstrInfo *TII; const MRegisterInfo *MRI; RegScavenger *RS; + MachineBasicBlock::iterator RSI; virtual bool runOnMachineFunction(MachineFunction &Fn); @@ -59,11 +60,10 @@ typedef SmallVector MemOpQueue; typedef MemOpQueue::iterator MemOpQueueIter; - void AdvanceRS(MachineBasicBlock *MBB, MemOpQueue &MemOps); - SmallVector MergeLDR_STR(MachineBasicBlock &MBB, unsigned SIndex, unsigned Base, - int Opcode, unsigned Size, MemOpQueue &MemOps); + int Opcode, unsigned Size, unsigned Scratch, + MemOpQueue &MemOps); bool LoadStoreMultipleOpti(MachineBasicBlock &MBB); bool MergeReturnIntoLDM(MachineBasicBlock &MBB); @@ -106,8 +106,8 @@ /// It returns true if the transformation is done. static bool mergeOps(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, int Offset, unsigned Base, bool BaseKill, int Opcode, + unsigned Scratch, SmallVector, 8> &Regs, - RegScavenger *RS, const TargetInstrInfo *TII) { // Only a single register to load / store. Don't bother. unsigned NumRegs = Regs.size(); @@ -135,8 +135,8 @@ // use as the new base. NewBase = Regs[NumRegs-1].first; else { - // Try to find a free register to use as a new base. - NewBase = RS ? RS->FindUnusedReg(&ARM::GPRRegClass) : (unsigned)ARM::R12; + // Use the scratch register to use as a new base. + NewBase = Scratch; if (NewBase == 0) return false; } @@ -169,31 +169,12 @@ return true; } -/// AdvanceRS - Advance register scavenger to just before the earliest memory -/// op that is being merged. -void ARMLoadStoreOpt::AdvanceRS(MachineBasicBlock *MBB, MemOpQueue &MemOps) { - MachineBasicBlock::iterator Loc = MemOps[0].MBBI; - unsigned Position = MemOps[0].Position; - for (unsigned i = 1, e = MemOps.size(); i != e; ++i) { - if (MemOps[i].Position < Position) { - Position = MemOps[i].Position; - Loc = MemOps[i].MBBI; - } - } - - if (Loc != MBB->begin()) - RS->forward(prior(Loc)); -} - /// MergeLDR_STR - Merge a number of load / store instructions into one or more /// load / store multiple instructions. SmallVector -ARMLoadStoreOpt::MergeLDR_STR(MachineBasicBlock &MBB, - unsigned SIndex, unsigned Base, int Opcode, - unsigned Size, MemOpQueue &MemOps) { - if (RS && SIndex == 0) - AdvanceRS(&MBB, MemOps); - +ARMLoadStoreOpt::MergeLDR_STR(MachineBasicBlock &MBB, unsigned SIndex, + unsigned Base, int Opcode, unsigned Size, + unsigned Scratch, MemOpQueue &MemOps) { SmallVector Merges; SmallVector, 8> Regs; bool isAM4 = Opcode == ARM::LDR || Opcode == ARM::STR; @@ -219,7 +200,7 @@ PRegNum = RegNum; } else { // Can't merge this in. Try merge the earlier ones first. - if (mergeOps(MBB, ++Loc, SOffset, Base, false, Opcode, Regs, RS, TII)) { + if (mergeOps(MBB, ++Loc, SOffset, Base, false, Opcode,Scratch,Regs,TII)) { Merges.push_back(prior(Loc)); for (unsigned j = SIndex; j < i; ++j) { MBB.erase(MemOps[j].MBBI); @@ -227,7 +208,7 @@ } } SmallVector Merges2 = - MergeLDR_STR(MBB, i, Base, Opcode, Size, MemOps); + MergeLDR_STR(MBB, i, Base, Opcode, Size, Scratch, MemOps); Merges.append(Merges2.begin(), Merges2.end()); return Merges; } @@ -239,7 +220,7 @@ } bool BaseKill = Loc->findRegisterUseOperand(Base, true) != NULL; - if (mergeOps(MBB, ++Loc, SOffset, Base, BaseKill, Opcode, Regs, RS, TII)) { + if (mergeOps(MBB, ++Loc, SOffset, Base, BaseKill, Opcode,Scratch,Regs, TII)) { Merges.push_back(prior(Loc)); for (unsigned i = SIndex, e = MemOps.size(); i != e; ++i) { MBB.erase(MemOps[i].MBBI); @@ -520,7 +501,8 @@ unsigned CurrSize = 0; unsigned Position = 0; - if (RS) RS->enterBasicBlock(&MBB); + RS->enterBasicBlock(&MBB); + RSI = MBB.begin(); MachineBasicBlock::iterator MBBI = MBB.begin(), E = MBB.end(); while (MBBI != E) { bool Advance = false; @@ -600,22 +582,38 @@ if (TryMerge) { if (NumMemOps > 1) { + // Try to find a free register to use as a new base in case it's needed. + unsigned Scratch = ARM::R12; + // First advance to the instruction just before the start of the chain. + if (RSI != MBB.begin()) + RS->forward(prior(RSI)); + // Find a scratch register. + Scratch = RS->FindUnusedReg(&ARM::GPRRegClass); + // Process the load / store instructions. + RS->forward(prior(MBBI)); + + // Merge ops. SmallVector MBBII = - MergeLDR_STR(MBB, 0, CurrBase, CurrOpc, CurrSize, MemOps); + MergeLDR_STR(MBB, 0, CurrBase, CurrOpc, CurrSize, Scratch, MemOps); + // Try folding preceeding/trailing base inc/dec into the generated // LDM/STM ops. for (unsigned i = 0, e = MBBII.size(); i < e; ++i) if (mergeBaseUpdateLSMultiple(MBB, MBBII[i])) NumMerges++; NumMerges += MBBII.size(); - } - // Try folding preceeding/trailing base inc/dec into those load/store - // that were not merged to form LDM/STM ops. - for (unsigned i = 0; i != NumMemOps; ++i) - if (!MemOps[i].Merged) - if (mergeBaseUpdateLoadStore(MBB, MemOps[i].MBBI, TII)) - NumMerges++; + // Try folding preceeding/trailing base inc/dec into those load/store + // that were not merged to form LDM/STM ops. + for (unsigned i = 0; i != NumMemOps; ++i) + if (!MemOps[i].Merged) + if (mergeBaseUpdateLoadStore(MBB, MemOps[i].MBBI, TII)) + NumMerges++; + + // RS may be pointing to an instruction that's deleted. + RS->skipTo(prior(MBBI)); + RSI = MBBI; + } CurrBase = 0; CurrOpc = -1; @@ -665,7 +663,7 @@ const TargetMachine &TM = Fn.getTarget(); TII = TM.getInstrInfo(); MRI = TM.getRegisterInfo(); - RS = MRI->requiresRegisterScavenging(Fn) ? new RegScavenger() : NULL; + RS = new RegScavenger(); bool Modified = false; for (MachineFunction::iterator MFI = Fn.begin(), E = Fn.end(); MFI != E; From evan.cheng at apple.com Tue Mar 6 20:46:40 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 6 Mar 2007 20:46:40 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/ARM/ARMRegisterInfo.td Message-ID: <200703070246.l272kedp012753@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/ARM: ARMRegisterInfo.td updated: 1.13 -> 1.14 --- Log message: ARM always use register scavenger. No longer reserves R12. --- Diffs of the changes: (+12 -50) ARMRegisterInfo.td | 62 ++++++++++------------------------------------------- 1 files changed, 12 insertions(+), 50 deletions(-) Index: llvm/lib/Target/ARM/ARMRegisterInfo.td diff -u llvm/lib/Target/ARM/ARMRegisterInfo.td:1.13 llvm/lib/Target/ARM/ARMRegisterInfo.td:1.14 --- llvm/lib/Target/ARM/ARMRegisterInfo.td:1.13 Tue Feb 27 18:59:19 2007 +++ llvm/lib/Target/ARM/ARMRegisterInfo.td Tue Mar 6 20:46:23 2007 @@ -99,51 +99,26 @@ // generate large stack offset. Make it available once we have register // scavenging. Similarly r3 is reserved in Thumb mode for now. let MethodBodies = [{ - // FP is R11, R9 is available. - static const unsigned ARM_GPR_AO_1[] = { - ARM::R3, ARM::R2, ARM::R1, ARM::R0, - ARM::R4, ARM::R5, ARM::R6, ARM::R7, - ARM::R8, ARM::R9, ARM::R10, - ARM::LR, ARM::R11 }; - // FP is R11, R9 is not available. - static const unsigned ARM_GPR_AO_2[] = { - ARM::R3, ARM::R2, ARM::R1, ARM::R0, - ARM::R4, ARM::R5, ARM::R6, ARM::R7, - ARM::R8, ARM::R10, - ARM::LR, ARM::R11 }; - // FP is R7, R9 is available. - static const unsigned ARM_GPR_AO_3[] = { - ARM::R3, ARM::R2, ARM::R1, ARM::R0, - ARM::R4, ARM::R5, ARM::R6, ARM::R8, - ARM::R9, ARM::R10,ARM::R11, - ARM::LR, ARM::R7 }; - // FP is R7, R9 is not available. - static const unsigned ARM_GPR_AO_4[] = { - ARM::R3, ARM::R2, ARM::R1, ARM::R0, - ARM::R4, ARM::R5, ARM::R6, ARM::R8, - ARM::R10,ARM::R11, - ARM::LR, ARM::R7 }; - // FP is R11, R9 is available, R12 is available. - static const unsigned ARM_GPR_AO_5[] = { + static const unsigned ARM_GPR_AO_1[] = { ARM::R3, ARM::R2, ARM::R1, ARM::R0, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10,ARM::R12, ARM::LR, ARM::R11 }; // FP is R11, R9 is not available, R12 is available. - static const unsigned ARM_GPR_AO_6[] = { + static const unsigned ARM_GPR_AO_2[] = { ARM::R3, ARM::R2, ARM::R1, ARM::R0, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R10,ARM::R12, ARM::LR, ARM::R11 }; // FP is R7, R9 is available, R12 is available. - static const unsigned ARM_GPR_AO_7[] = { + static const unsigned ARM_GPR_AO_3[] = { ARM::R3, ARM::R2, ARM::R1, ARM::R0, ARM::R4, ARM::R5, ARM::R6, ARM::R8, ARM::R9, ARM::R10,ARM::R11,ARM::R12, ARM::LR, ARM::R7 }; // FP is R7, R9 is not available, R12 is available. - static const unsigned ARM_GPR_AO_8[] = { + static const unsigned ARM_GPR_AO_4[] = { ARM::R3, ARM::R2, ARM::R1, ARM::R0, ARM::R4, ARM::R5, ARM::R6, ARM::R8, ARM::R10,ARM::R11,ARM::R12, @@ -157,20 +132,19 @@ GPRClass::iterator GPRClass::allocation_order_begin(const MachineFunction &MF) const { const TargetMachine &TM = MF.getTarget(); - const MRegisterInfo *RI = TM.getRegisterInfo(); const ARMSubtarget &Subtarget = TM.getSubtarget(); if (Subtarget.isThumb()) return THUMB_GPR_AO; if (Subtarget.useThumbBacktraces()) { if (Subtarget.isR9Reserved()) - return RI->requiresRegisterScavenging(MF) ? ARM_GPR_AO_8:ARM_GPR_AO_4; + return ARM_GPR_AO_4; else - return RI->requiresRegisterScavenging(MF) ? ARM_GPR_AO_7:ARM_GPR_AO_3; + return ARM_GPR_AO_3; } else { if (Subtarget.isR9Reserved()) - return RI->requiresRegisterScavenging(MF) ? ARM_GPR_AO_6:ARM_GPR_AO_2; + return ARM_GPR_AO_2; else - return RI->requiresRegisterScavenging(MF) ? ARM_GPR_AO_5:ARM_GPR_AO_1; + return ARM_GPR_AO_1; } } @@ -184,27 +158,15 @@ I = THUMB_GPR_AO + (sizeof(THUMB_GPR_AO)/sizeof(unsigned)); else if (Subtarget.useThumbBacktraces()) { if (Subtarget.isR9Reserved()) { - if (RI->requiresRegisterScavenging(MF)) - I = ARM_GPR_AO_8 + (sizeof(ARM_GPR_AO_8)/sizeof(unsigned)); - else - I = ARM_GPR_AO_4 + (sizeof(ARM_GPR_AO_4)/sizeof(unsigned)); + I = ARM_GPR_AO_4 + (sizeof(ARM_GPR_AO_4)/sizeof(unsigned)); } else { - if (RI->requiresRegisterScavenging(MF)) - I = ARM_GPR_AO_7 + (sizeof(ARM_GPR_AO_7)/sizeof(unsigned)); - else - I = ARM_GPR_AO_3 + (sizeof(ARM_GPR_AO_3)/sizeof(unsigned)); + I = ARM_GPR_AO_3 + (sizeof(ARM_GPR_AO_3)/sizeof(unsigned)); } } else { if (Subtarget.isR9Reserved()) { - if (RI->requiresRegisterScavenging(MF)) - I = ARM_GPR_AO_6 + (sizeof(ARM_GPR_AO_6)/sizeof(unsigned)); - else - I = ARM_GPR_AO_2 + (sizeof(ARM_GPR_AO_2)/sizeof(unsigned)); + I = ARM_GPR_AO_2 + (sizeof(ARM_GPR_AO_2)/sizeof(unsigned)); } else { - if (RI->requiresRegisterScavenging(MF)) - I = ARM_GPR_AO_5 + (sizeof(ARM_GPR_AO_5)/sizeof(unsigned)); - else - I = ARM_GPR_AO_1 + (sizeof(ARM_GPR_AO_1)/sizeof(unsigned)); + I = ARM_GPR_AO_1 + (sizeof(ARM_GPR_AO_1)/sizeof(unsigned)); } } From asl at math.spbu.ru Tue Mar 6 20:48:18 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Tue, 6 Mar 2007 20:48:18 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/TargetAsmInfo.cpp Message-ID: <200703070248.l272mIuM012803@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target: TargetAsmInfo.cpp updated: 1.19 -> 1.20 --- Log message: Fix DWARF debugging information on x86/Linux and (hopefully) Mingw32/Cygwin targets. This fixes PR978: http://llvm.org/PR978 --- Diffs of the changes: (+3 -0) TargetAsmInfo.cpp | 3 +++ 1 files changed, 3 insertions(+) Index: llvm/lib/Target/TargetAsmInfo.cpp diff -u llvm/lib/Target/TargetAsmInfo.cpp:1.19 llvm/lib/Target/TargetAsmInfo.cpp:1.20 --- llvm/lib/Target/TargetAsmInfo.cpp:1.19 Wed Feb 21 16:43:40 2007 +++ llvm/lib/Target/TargetAsmInfo.cpp Tue Mar 6 20:47:57 2007 @@ -69,11 +69,13 @@ UsedDirective(0), WeakRefDirective(0), HiddenDirective("\t.hidden\t"), + AbsoluteSectionOffsets(false), HasLEB128(false), HasDotLoc(false), HasDotFile(false), SupportsExceptionHandling(false), DwarfRequiresFrameSection(true), + DwarfSectionOffsetDirective(0), DwarfAbbrevSection(".debug_abbrev"), DwarfInfoSection(".debug_info"), DwarfLineSection(".debug_line"), @@ -106,3 +108,4 @@ // Multiply by the worst-case length for each instruction. return NumInsts * MaxInstLength; } + From asl at math.spbu.ru Tue Mar 6 20:48:20 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Tue, 6 Mar 2007 20:48:20 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/DwarfWriter.cpp Message-ID: <200703070248.l272mKqk012808@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen: DwarfWriter.cpp updated: 1.130 -> 1.131 --- Log message: Fix DWARF debugging information on x86/Linux and (hopefully) Mingw32/Cygwin targets. This fixes PR978: http://llvm.org/PR978 --- Diffs of the changes: (+61 -17) DwarfWriter.cpp | 78 +++++++++++++++++++++++++++++++++++++++++++------------- 1 files changed, 61 insertions(+), 17 deletions(-) Index: llvm/lib/CodeGen/DwarfWriter.cpp diff -u llvm/lib/CodeGen/DwarfWriter.cpp:1.130 llvm/lib/CodeGen/DwarfWriter.cpp:1.131 --- llvm/lib/CodeGen/DwarfWriter.cpp:1.130 Thu Mar 1 14:26:43 2007 +++ llvm/lib/CodeGen/DwarfWriter.cpp Tue Mar 6 20:47:57 2007 @@ -823,8 +823,12 @@ void PrintLabelName(DWLabel Label) const { PrintLabelName(Label.Tag, Label.Number); } - void PrintLabelName(const char *Tag, unsigned Number) const { - O << TAI->getPrivateGlobalPrefix() << Tag; + void PrintLabelName(const char *Tag, unsigned Number, + bool isInSection = false) const { + if (isInSection && TAI->getDwarfSectionOffsetDirective()) + O << TAI->getDwarfSectionOffsetDirective() << Tag; + else + O << TAI->getPrivateGlobalPrefix() << Tag; if (Number) O << Number; } @@ -907,7 +911,44 @@ PrintLabelName(TagLo, NumberLo); } } - + + void EmitSectionOffset(const char* Label, const char* Section, + unsigned LabelNumber, unsigned SectionNumber, + bool IsSmall = false) const { + if (TAI->needsSet()) { + static unsigned SetCounter = 1; + + O << "\t.set\t"; + PrintLabelName("set", SetCounter); + O << ","; + PrintLabelName(Label, LabelNumber, true); + if (!TAI->isAbsoluteSectionOffsets()) { + O << "-"; + PrintLabelName(Section, SectionNumber); + } + O << "\n"; + + if (IsSmall || TAI->getAddressSize() == sizeof(int32_t)) + O << TAI->getData32bitsDirective(); + else + O << TAI->getData64bitsDirective(); + + PrintLabelName("set", SetCounter); + ++SetCounter; + } else { + if (IsSmall || TAI->getAddressSize() == sizeof(int32_t)) + O << TAI->getData32bitsDirective(); + else + O << TAI->getData64bitsDirective(); + + PrintLabelName(Label, LabelNumber, true); + if (!TAI->isAbsoluteSectionOffsets()) { + O << "-"; + PrintLabelName(Section, SectionNumber); + } + } + } + /// EmitFrameMoves - Emit frame instructions to describe the layout of the /// frame. void EmitFrameMoves(const char *BaseLabel, unsigned BaseLabelID, @@ -1649,8 +1690,11 @@ CompileUnit *NewCompileUnit(CompileUnitDesc *UnitDesc, unsigned ID) { // Construct debug information entry. DIE *Die = new DIE(DW_TAG_compile_unit); - AddDelta(Die, DW_AT_stmt_list, DW_FORM_data4, DWLabel("section_line", 0), - DWLabel("section_line", 0)); + if (TAI->isAbsoluteSectionOffsets()) + AddLabel(Die, DW_AT_stmt_list, DW_FORM_data4, DWLabel("section_line", 0)); + else + AddDelta(Die, DW_AT_stmt_list, DW_FORM_data4, DWLabel("section_line", 0), + DWLabel("section_line", 0)); AddString(Die, DW_AT_producer, DW_FORM_string, UnitDesc->getProducer()); AddUInt (Die, DW_AT_language, DW_FORM_data1, UnitDesc->getLanguage()); AddString(Die, DW_AT_name, DW_FORM_string, UnitDesc->getFileName()); @@ -2065,7 +2109,7 @@ Asm->EmitInt32(ContentSize); Asm->EOL("Length of Compilation Unit Info"); Asm->EmitInt16(DWARF_VERSION); Asm->EOL("DWARF version number"); - EmitDifference("abbrev_begin", 0, "section_abbrev", 0, true); + EmitSectionOffset("abbrev_begin", "section_abbrev", 0, 0, true); Asm->EOL("Offset Into Abbrev. Section"); Asm->EmitInt8(TAI->getAddressSize()); Asm->EOL("Address Size (in bytes)"); @@ -2323,8 +2367,8 @@ Asm->EOL("Length of Frame Information Entry"); EmitLabel("frame_begin", SubprogramCount); - - EmitDifference("frame_common_begin", 0, "section_frame", 0, true); + + EmitSectionOffset("frame_common_begin", "section_frame", 0, 0, true); Asm->EOL("FDE CIE offset"); EmitReference("func_begin", SubprogramCount); @@ -2358,8 +2402,8 @@ EmitLabel("pubnames_begin", Unit->getID()); Asm->EmitInt16(DWARF_VERSION); Asm->EOL("DWARF Version"); - - EmitDifference("info_begin", Unit->getID(), "section_info", 0, true); + + EmitSectionOffset("info_begin", "section_info", Unit->getID(), 0, true); Asm->EOL("Offset of Compilation Unit Info"); EmitDifference("info_end", Unit->getID(), "info_begin", Unit->getID(),true); @@ -2786,9 +2830,9 @@ Asm->EOL("Length of Frame Information Entry"); EmitLabel("eh_frame_begin", SubprogramCount); - - EmitDifference("eh_frame_begin", SubprogramCount, - "section_eh_frame", 0, true); + + EmitSectionOffset("eh_frame_begin", "section_eh_frame", + SubprogramCount, 0, true); Asm->EOL("FDE CIE offset"); EmitReference("eh_func_begin", SubprogramCount, true); @@ -2951,8 +2995,8 @@ // Emit the landng pad site information. for (unsigned i = 0, N = LandingPads.size(); i != N; ++i) { const LandingPadInfo &LandingPad = LandingPads[i]; - EmitDifference("label", LandingPad.BeginLabel, - "eh_func_begin", SubprogramCount); + EmitSectionOffset("label", "eh_func_begin", + LandingPad.BeginLabel, SubprogramCount); Asm->EOL("Region start"); EmitDifference("label", LandingPad.EndLabel, @@ -2965,8 +3009,8 @@ else Asm->EmitInt64(0); } else { - EmitDifference("label", LandingPad.LandingPadLabel, - "eh_func_begin", SubprogramCount); + EmitSectionOffset("label", "eh_func_begin", + LandingPad.LandingPadLabel, SubprogramCount); } Asm->EOL("Landing pad"); From asl at math.spbu.ru Tue Mar 6 20:48:20 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Tue, 6 Mar 2007 20:48:20 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/Target/TargetAsmInfo.h Message-ID: <200703070248.l272mKRr012813@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/Target: TargetAsmInfo.h updated: 1.26 -> 1.27 --- Log message: Fix DWARF debugging information on x86/Linux and (hopefully) Mingw32/Cygwin targets. This fixes PR978: http://llvm.org/PR978 --- Diffs of the changes: (+13 -0) TargetAsmInfo.h | 13 +++++++++++++ 1 files changed, 13 insertions(+) Index: llvm/include/llvm/Target/TargetAsmInfo.h diff -u llvm/include/llvm/Target/TargetAsmInfo.h:1.26 llvm/include/llvm/Target/TargetAsmInfo.h:1.27 --- llvm/include/llvm/Target/TargetAsmInfo.h:1.26 Wed Feb 21 16:43:40 2007 +++ llvm/include/llvm/Target/TargetAsmInfo.h Tue Mar 6 20:47:57 2007 @@ -246,6 +246,10 @@ //===--- Dwarf Emission Directives -----------------------------------===// + /// AbsoluteSectionOffsets - True if we should emit abolute section + /// offsets. Defaults to false. + bool AbsoluteSectionOffsets; + /// HasLEB128 - True if target asm supports leb128 directives. /// bool HasLEB128; // Defaults to false. @@ -266,6 +270,9 @@ /// bool DwarfRequiresFrameSection; // Defaults to true. + /// DwarfSectionOffsetDirective - Special section offset directive. + const char* DwarfSectionOffsetDirective; // Defaults to NULL + /// DwarfAbbrevSection - Section directive for Dwarf abbrev. /// const char *DwarfAbbrevSection; // Defaults to ".debug_abbrev". @@ -494,6 +501,9 @@ const char *getHiddenDirective() const { return HiddenDirective; } + bool isAbsoluteSectionOffsets() const { + return AbsoluteSectionOffsets; + } bool hasLEB128() const { return HasLEB128; } @@ -509,6 +519,9 @@ bool getDwarfRequiresFrameSection() const { return DwarfRequiresFrameSection; } + const char *getDwarfSectionOffsetDirective() const { + return DwarfSectionOffsetDirective; + } const char *getDwarfAbbrevSection() const { return DwarfAbbrevSection; } From asl at math.spbu.ru Tue Mar 6 20:48:23 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Tue, 6 Mar 2007 20:48:23 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86TargetAsmInfo.cpp Message-ID: <200703070248.l272mN8A012819@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: X86TargetAsmInfo.cpp updated: 1.32 -> 1.33 --- Log message: Fix DWARF debugging information on x86/Linux and (hopefully) Mingw32/Cygwin targets. This fixes PR978: http://llvm.org/PR978 --- Diffs of the changes: (+3 -0) X86TargetAsmInfo.cpp | 3 +++ 1 files changed, 3 insertions(+) Index: llvm/lib/Target/X86/X86TargetAsmInfo.cpp diff -u llvm/lib/Target/X86/X86TargetAsmInfo.cpp:1.32 llvm/lib/Target/X86/X86TargetAsmInfo.cpp:1.33 --- llvm/lib/Target/X86/X86TargetAsmInfo.cpp:1.32 Thu Feb 22 19:58:50 2007 +++ llvm/lib/Target/X86/X86TargetAsmInfo.cpp Tue Mar 6 20:47:57 2007 @@ -97,6 +97,7 @@ case X86Subtarget::isELF: // Set up DWARF directives HasLEB128 = true; // Target asm supports leb128 directives (little-endian) + AbsoluteSectionOffsets = true; // bool HasLEB128; // Defaults to false. // hasDotLoc - True if target asm supports .loc directives. // bool HasDotLoc; // Defaults to false. @@ -130,9 +131,11 @@ // Set up DWARF directives HasLEB128 = true; // Target asm supports leb128 directives (little-endian) + AbsoluteSectionOffsets = true; PrivateGlobalPrefix = "L"; // Prefix for private global symbols WeakRefDirective = "\t.weak\t"; DwarfRequiresFrameSection = false; + DwarfSectionOffsetDirective = "\t.secrel32\t"; DwarfAbbrevSection = "\t.section\t.debug_abbrev,\"dr\""; DwarfInfoSection = "\t.section\t.debug_info,\"dr\""; DwarfLineSection = "\t.section\t.debug_line,\"dr\""; From dpatel at apple.com Tue Mar 6 22:35:28 2007 From: dpatel at apple.com (dpatel at apple.com) Date: Tue, 6 Mar 2007 20:35:28 -0800 (PST) Subject: [llvm-commits] [124656] Include looppass.h Message-ID: <20070307043528.F2B6E84AE065@src> Revision: 124656 Author: dpatel Date: 2007-03-06 20:35:26 -0800 (Tue, 06 Mar 2007) Log Message: ----------- Include looppass.h Modified Paths: -------------- apple-local/branches/llvm/gcc/llvm-backend.cpp Modified: apple-local/branches/llvm/gcc/llvm-backend.cpp =================================================================== --- apple-local/branches/llvm/gcc/llvm-backend.cpp 2007-03-07 01:01:43 UTC (rev 124655) +++ apple-local/branches/llvm/gcc/llvm-backend.cpp 2007-03-07 04:35:26 UTC (rev 124656) @@ -28,6 +28,7 @@ #include "llvm/Module.h" #include "llvm/ModuleProvider.h" #include "llvm/PassManager.h" +#include "llvm/Analysis/LoopPass.h" #include "llvm/Analysis/Verifier.h" #include "llvm/Assembly/Writer.h" #include "llvm/Assembly/PrintModulePass.h" From dpatel at apple.com Tue Mar 6 22:41:50 2007 From: dpatel at apple.com (Devang Patel) Date: Tue, 6 Mar 2007 22:41:50 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/Transforms/Scalar.h Message-ID: <200703070441.l274fo7b014617@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/Transforms: Scalar.h updated: 1.75 -> 1.76 --- Log message: Now LICM is a LoopPass. --- Diffs of the changes: (+1 -1) Scalar.h | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/include/llvm/Transforms/Scalar.h diff -u llvm/include/llvm/Transforms/Scalar.h:1.75 llvm/include/llvm/Transforms/Scalar.h:1.76 --- llvm/include/llvm/Transforms/Scalar.h:1.75 Tue Mar 6 19:38:05 2007 +++ llvm/include/llvm/Transforms/Scalar.h Tue Mar 6 22:41:30 2007 @@ -112,7 +112,7 @@ // // LICM - This pass is a loop invariant code motion and memory promotion pass. // -FunctionPass *createLICMPass(); +LoopPass *createLICMPass(); //===----------------------------------------------------------------------===// // From dpatel at apple.com Tue Mar 6 22:41:53 2007 From: dpatel at apple.com (Devang Patel) Date: Tue, 6 Mar 2007 22:41:53 -0600 Subject: [llvm-commits] CVS: llvm/lib/Transforms/Scalar/LICM.cpp Message-ID: <200703070441.l274fr76014623@zion.cs.uiuc.edu> Changes in directory llvm/lib/Transforms/Scalar: LICM.cpp updated: 1.87 -> 1.88 --- Log message: Now LICM is a LoopPass. --- Diffs of the changes: (+26 -30) LICM.cpp | 56 ++++++++++++++++++++++++++------------------------------ 1 files changed, 26 insertions(+), 30 deletions(-) Index: llvm/lib/Transforms/Scalar/LICM.cpp diff -u llvm/lib/Transforms/Scalar/LICM.cpp:1.87 llvm/lib/Transforms/Scalar/LICM.cpp:1.88 --- llvm/lib/Transforms/Scalar/LICM.cpp:1.87 Mon Feb 5 17:32:05 2007 +++ llvm/lib/Transforms/Scalar/LICM.cpp Tue Mar 6 22:41:30 2007 @@ -38,6 +38,7 @@ #include "llvm/Instructions.h" #include "llvm/Target/TargetData.h" #include "llvm/Analysis/LoopInfo.h" +#include "llvm/Analysis/LoopPass.h" #include "llvm/Analysis/AliasAnalysis.h" #include "llvm/Analysis/AliasSetTracker.h" #include "llvm/Analysis/Dominators.h" @@ -61,8 +62,8 @@ DisablePromotion("disable-licm-promotion", cl::Hidden, cl::desc("Disable memory promotion in LICM pass")); - struct VISIBILITY_HIDDEN LICM : public FunctionPass { - virtual bool runOnFunction(Function &F); + struct VISIBILITY_HIDDEN LICM : public LoopPass { + virtual bool runOnLoop(Loop *L, LPPassManager &LPM); /// This transformation requires natural loop information & requires that /// loop preheaders be inserted into the CFG... @@ -76,6 +77,11 @@ AU.addRequired(); } + bool doFinalize() { + LoopToAliasMap.clear(); + return false; + } + private: // Various analyses that we use... AliasAnalysis *AA; // Current AliasAnalysis information @@ -88,10 +94,7 @@ BasicBlock *Preheader; // The preheader block of the current loop... Loop *CurLoop; // The current loop we are working on... AliasSetTracker *CurAST; // AliasSet information for the current loop... - - /// visitLoop - Hoist expressions out of the specified loop... - /// - void visitLoop(Loop *L, AliasSetTracker &AST); + std::map LoopToAliasMap; /// SinkRegion - Walk the specified region of the CFG (defined by all blocks /// dominated by the specified block, and that are in the current loop) in @@ -199,12 +202,11 @@ RegisterPass X("licm", "Loop Invariant Code Motion"); } -FunctionPass *llvm::createLICMPass() { return new LICM(); } +LoopPass *llvm::createLICMPass() { return new LICM(); } -/// runOnFunction - For LICM, this simply traverses the loop structure of the -/// function, hoisting expressions out of loops if possible. +/// Hoist expressions out of the specified loop... /// -bool LICM::runOnFunction(Function &) { +bool LICM::runOnLoop(Loop *L, LPPassManager &LPM) { Changed = false; // Get our Loop and Alias Analysis information... @@ -213,28 +215,19 @@ DF = &getAnalysis(); DT = &getAnalysis(); - // Hoist expressions out of all of the top-level loops. - for (LoopInfo::iterator I = LI->begin(), E = LI->end(); I != E; ++I) { - AliasSetTracker AST(*AA); - visitLoop(*I, AST); - } - return Changed; -} - - -/// visitLoop - Hoist expressions out of the specified loop... -/// -void LICM::visitLoop(Loop *L, AliasSetTracker &AST) { - // Recurse through all subloops before we process this loop... - for (Loop::iterator I = L->begin(), E = L->end(); I != E; ++I) { - AliasSetTracker SubAST(*AA); - visitLoop(*I, SubAST); + CurAST = new AliasSetTracker(*AA); + // Collect Alias info frmo subloops + for (Loop::iterator LoopItr = L->begin(), LoopItrE = L->end(); + LoopItr != LoopItrE; ++LoopItr) { + Loop *InnerL = *LoopItr; + AliasSetTracker *InnerAST = LoopToAliasMap[InnerL]; + assert (InnerAST && "Where is my AST?"); - // Incorporate information about the subloops into this loop... - AST.add(SubAST); + // What if InnerLoop was modified by other passes ? + CurAST->add(*InnerAST); } + CurLoop = L; - CurAST = &AST; // Get the preheader block to move instructions into... Preheader = L->getLoopPreheader(); @@ -247,7 +240,7 @@ for (std::vector::const_iterator I = L->getBlocks().begin(), E = L->getBlocks().end(); I != E; ++I) if (LI->getLoopFor(*I) == L) // Ignore blocks in subloops... - AST.add(**I); // Incorporate the specified basic block + CurAST->add(**I); // Incorporate the specified basic block // We want to visit all of the instructions in this loop... that are not parts // of our subloops (they have already had their invariants hoisted out of @@ -270,6 +263,9 @@ // Clear out loops state information for the next iteration CurLoop = 0; Preheader = 0; + + LoopToAliasMap[L] = CurAST; + return Changed; } /// SinkRegion - Walk the specified region of the CFG (defined by all blocks From dpatel at apple.com Tue Mar 6 22:41:55 2007 From: dpatel at apple.com (Devang Patel) Date: Tue, 6 Mar 2007 22:41:55 -0600 Subject: [llvm-commits] CVS: llvm/tools/llvm-ld/Optimize.cpp Message-ID: <200703070441.l274fteG014633@zion.cs.uiuc.edu> Changes in directory llvm/tools/llvm-ld: Optimize.cpp updated: 1.17 -> 1.18 --- Log message: Now LICM is a LoopPass. --- Diffs of the changes: (+1 -0) Optimize.cpp | 1 + 1 files changed, 1 insertion(+) Index: llvm/tools/llvm-ld/Optimize.cpp diff -u llvm/tools/llvm-ld/Optimize.cpp:1.17 llvm/tools/llvm-ld/Optimize.cpp:1.18 --- llvm/tools/llvm-ld/Optimize.cpp:1.17 Thu Feb 8 12:13:59 2007 +++ llvm/tools/llvm-ld/Optimize.cpp Tue Mar 6 22:41:30 2007 @@ -15,6 +15,7 @@ #include "llvm/PassManager.h" #include "llvm/Analysis/LoadValueNumbering.h" #include "llvm/Analysis/Passes.h" +#include "llvm/Analysis/LoopPass.h" #include "llvm/Analysis/Verifier.h" #include "llvm/Support/CommandLine.h" #include "llvm/System/DynamicLibrary.h" From dpatel at apple.com Tue Mar 6 22:41:56 2007 From: dpatel at apple.com (Devang Patel) Date: Tue, 6 Mar 2007 22:41:56 -0600 Subject: [llvm-commits] CVS: llvm/tools/lto/lto.cpp Message-ID: <200703070441.l274fue5014638@zion.cs.uiuc.edu> Changes in directory llvm/tools/lto: lto.cpp updated: 1.37 -> 1.38 --- Log message: Now LICM is a LoopPass. --- Diffs of the changes: (+1 -0) lto.cpp | 1 + 1 files changed, 1 insertion(+) Index: llvm/tools/lto/lto.cpp diff -u llvm/tools/lto/lto.cpp:1.37 llvm/tools/lto/lto.cpp:1.38 --- llvm/tools/lto/lto.cpp:1.37 Fri Feb 16 13:11:07 2007 +++ llvm/tools/lto/lto.cpp Tue Mar 6 22:41:30 2007 @@ -26,6 +26,7 @@ #include "llvm/System/Program.h" #include "llvm/System/Signals.h" #include "llvm/Analysis/Passes.h" +#include "llvm/Analysis/LoopPass.h" #include "llvm/Analysis/Verifier.h" #include "llvm/CodeGen/FileWriters.h" #include "llvm/Target/SubtargetFeature.h" From resistor at mac.com Tue Mar 6 23:31:57 2007 From: resistor at mac.com (Owen Anderson) Date: Tue, 6 Mar 2007 23:31:57 -0600 Subject: [llvm-commits] CVS: llvm-www/OpenProjects.html Message-ID: <200703070531.l275VvoH015608@zion.cs.uiuc.edu> Changes in directory llvm-www: OpenProjects.html updated: 1.20 -> 1.21 --- Log message: Fix broken link. --- Diffs of the changes: (+2 -2) OpenProjects.html | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm-www/OpenProjects.html diff -u llvm-www/OpenProjects.html:1.20 llvm-www/OpenProjects.html:1.21 --- llvm-www/OpenProjects.html:1.20 Tue Mar 6 15:49:19 2007 +++ llvm-www/OpenProjects.html Tue Mar 6 23:31:39 2007 @@ -186,7 +186,7 @@ would be nice to have a transformation which could be "required" by these passes which makes irreducible graphs reducible. This can easily be accomplished through code duplication. See Making Graphs Reducible +href="http://citeseer.ist.psu.edu/janssen97making.html">Making Graphs Reducible with Controlled Node Splitting and perhaps Nesting of Reducible and Irreducible Loops. @@ -375,7 +375,7 @@ src="http://www.w3.org/Icons/valid-html401" alt="Valid HTML 4.01!"> LLVM Compiler Infrastructure
    - Last modified: $Date: 2007/03/06 21:49:19 $ + Last modified: $Date: 2007/03/07 05:31:39 $ From isanbard at gmail.com Tue Mar 6 23:43:35 2007 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 6 Mar 2007 23:43:35 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp X86InstrMMX.td Message-ID: <200703070543.l275hZfd015841@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: X86ISelLowering.cpp updated: 1.362 -> 1.363 X86InstrMMX.td updated: 1.15 -> 1.16 --- Log message: Properly support v8i8 and v4i16 types. It now converts them to v2i32 for load and stores. --- Diffs of the changes: (+20 -6) X86ISelLowering.cpp | 7 +++++-- X86InstrMMX.td | 19 +++++++++++++++---- 2 files changed, 20 insertions(+), 6 deletions(-) Index: llvm/lib/Target/X86/X86ISelLowering.cpp diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.362 llvm/lib/Target/X86/X86ISelLowering.cpp:1.363 --- llvm/lib/Target/X86/X86ISelLowering.cpp:1.362 Tue Mar 6 12:53:42 2007 +++ llvm/lib/Target/X86/X86ISelLowering.cpp Tue Mar 6 23:43:18 2007 @@ -327,9 +327,12 @@ addRegisterClass(MVT::v2i32, X86::VR64RegisterClass); // FIXME: add MMX packed arithmetics - setOperationAction(ISD::LOAD, MVT::v8i8, Legal); - setOperationAction(ISD::LOAD, MVT::v4i16, Legal); + setOperationAction(ISD::LOAD, MVT::v8i8, Promote); + AddPromotedToType (ISD::LOAD, MVT::v8i8, MVT::v2i32); + setOperationAction(ISD::LOAD, MVT::v4i16, Promote); + AddPromotedToType (ISD::LOAD, MVT::v4i16, MVT::v2i32); setOperationAction(ISD::LOAD, MVT::v2i32, Legal); + setOperationAction(ISD::BUILD_VECTOR, MVT::v8i8, Expand); setOperationAction(ISD::BUILD_VECTOR, MVT::v4i16, Expand); setOperationAction(ISD::BUILD_VECTOR, MVT::v2i32, Expand); Index: llvm/lib/Target/X86/X86InstrMMX.td diff -u llvm/lib/Target/X86/X86InstrMMX.td:1.15 llvm/lib/Target/X86/X86InstrMMX.td:1.16 --- llvm/lib/Target/X86/X86InstrMMX.td:1.15 Tue Mar 6 12:53:42 2007 +++ llvm/lib/Target/X86/X86InstrMMX.td Tue Mar 6 23:43:18 2007 @@ -1,4 +1,4 @@ -//====- X86InstrMMX.td - Describe the X86 Instruction Set -------*- C++ -*-===// +//====- X86InstrMMX.td - Describe the X86 Instruction Set --*- tablegen -*-===// // // The LLVM Compiler Infrastructure // @@ -33,14 +33,17 @@ [(set VR64:$dst, (v8i8 (undef)))]>, Requires<[HasMMX]>; -def : Pat<(v8i8 (undef)), (IMPLICIT_DEF_VR64)>, Requires<[HasMMX]>; -def : Pat<(v4i16 (undef)), (IMPLICIT_DEF_VR64)>, Requires<[HasMMX]>; -def : Pat<(v2i32 (undef)), (IMPLICIT_DEF_VR64)>, Requires<[HasMMX]>; +// 64-bit vector undef's. +def : Pat<(v8i8 (undef)), (IMPLICIT_DEF_VR64)>; +def : Pat<(v4i16 (undef)), (IMPLICIT_DEF_VR64)>; +def : Pat<(v2i32 (undef)), (IMPLICIT_DEF_VR64)>; //===----------------------------------------------------------------------===// // MMX Pattern Fragments //===----------------------------------------------------------------------===// +def loadv8i8 : PatFrag<(ops node:$ptr), (v8i8 (load node:$ptr))>; +def loadv4i16 : PatFrag<(ops node:$ptr), (v4i16 (load node:$ptr))>; def loadv2i32 : PatFrag<(ops node:$ptr), (v2i32 (load node:$ptr))>; //===----------------------------------------------------------------------===// @@ -120,3 +123,11 @@ (MOVQ64mr addr:$dst, VR64:$src)>; def : Pat<(store (v4i16 VR64:$src), addr:$dst), (MOVQ64mr addr:$dst, VR64:$src)>; + +// Bit convert. +def : Pat<(v8i8 (bitconvert (v2i32 VR64:$src))), (v8i8 VR64:$src)>; +def : Pat<(v8i8 (bitconvert (v4i16 VR64:$src))), (v8i8 VR64:$src)>; +def : Pat<(v4i16 (bitconvert (v2i32 VR64:$src))), (v4i16 VR64:$src)>; +def : Pat<(v4i16 (bitconvert (v8i8 VR64:$src))), (v4i16 VR64:$src)>; +def : Pat<(v2i32 (bitconvert (v4i16 VR64:$src))), (v2i32 VR64:$src)>; +def : Pat<(v2i32 (bitconvert (v8i8 VR64:$src))), (v2i32 VR64:$src)>; From dpatel at apple.com Wed Mar 7 00:39:21 2007 From: dpatel at apple.com (Devang Patel) Date: Wed, 7 Mar 2007 00:39:21 -0600 Subject: [llvm-commits] CVS: llvm/lib/Transforms/Scalar/IndVarSimplify.cpp Message-ID: <200703070639.l276dLvn026097@zion.cs.uiuc.edu> Changes in directory llvm/lib/Transforms/Scalar: IndVarSimplify.cpp updated: 1.114 -> 1.115 --- Log message: Now IndVarSimplify is a LoopPass. --- Diffs of the changes: (+32 -27) IndVarSimplify.cpp | 59 ++++++++++++++++++++++++++++------------------------- 1 files changed, 32 insertions(+), 27 deletions(-) Index: llvm/lib/Transforms/Scalar/IndVarSimplify.cpp diff -u llvm/lib/Transforms/Scalar/IndVarSimplify.cpp:1.114 llvm/lib/Transforms/Scalar/IndVarSimplify.cpp:1.115 --- llvm/lib/Transforms/Scalar/IndVarSimplify.cpp:1.114 Sat Mar 3 21:43:23 2007 +++ llvm/lib/Transforms/Scalar/IndVarSimplify.cpp Wed Mar 7 00:39:01 2007 @@ -45,6 +45,7 @@ #include "llvm/Type.h" #include "llvm/Analysis/ScalarEvolutionExpander.h" #include "llvm/Analysis/LoopInfo.h" +#include "llvm/Analysis/LoopPass.h" #include "llvm/Support/CFG.h" #include "llvm/Support/Compiler.h" #include "llvm/Support/Debug.h" @@ -62,33 +63,26 @@ STATISTIC(NumLFTR , "Number of loop exit tests replaced"); namespace { - class VISIBILITY_HIDDEN IndVarSimplify : public FunctionPass { + class VISIBILITY_HIDDEN IndVarSimplify : public LoopPass { LoopInfo *LI; ScalarEvolution *SE; bool Changed; public: - virtual bool runOnFunction(Function &) { - LI = &getAnalysis(); - SE = &getAnalysis(); - Changed = false; - - // Induction Variables live in the header nodes of loops - for (LoopInfo::iterator I = LI->begin(), E = LI->end(); I != E; ++I) - runOnLoop(*I); - return Changed; - } + + bool runOnLoop(Loop *L, LPPassManager &LPM); + bool doInitialization(Loop *L, LPPassManager &LPM); + virtual void getAnalysisUsage(AnalysisUsage &AU) const { + AU.addRequiredID(LCSSAID); + AU.addRequiredID(LoopSimplifyID); + AU.addRequired(); + AU.addRequired(); + AU.addPreservedID(LoopSimplifyID); + AU.addPreservedID(LCSSAID); + AU.setPreservesCFG(); + } - virtual void getAnalysisUsage(AnalysisUsage &AU) const { - AU.addRequiredID(LCSSAID); - AU.addRequiredID(LoopSimplifyID); - AU.addRequired(); - AU.addRequired(); - AU.addPreservedID(LoopSimplifyID); - AU.addPreservedID(LCSSAID); - AU.setPreservesCFG(); - } private: - void runOnLoop(Loop *L); + void EliminatePointerRecurrence(PHINode *PN, BasicBlock *Preheader, std::set &DeadInsts); Instruction *LinearFunctionTestReplace(Loop *L, SCEV *IterationCount, @@ -100,7 +94,7 @@ RegisterPass X("indvars", "Canonicalize Induction Variables"); } -FunctionPass *llvm::createIndVarSimplifyPass() { +LoopPass *llvm::createIndVarSimplifyPass() { return new IndVarSimplify(); } @@ -410,14 +404,16 @@ DeleteTriviallyDeadInstructions(InstructionsToDelete); } +bool IndVarSimplify::doInitialization(Loop *L, LPPassManager &LPM) { -void IndVarSimplify::runOnLoop(Loop *L) { + Changed = false; // First step. Check to see if there are any trivial GEP pointer recurrences. // If there are, change them into integer recurrences, permitting analysis by // the SCEV routines. // BasicBlock *Header = L->getHeader(); BasicBlock *Preheader = L->getLoopPreheader(); + SE = &LPM.getAnalysis(); std::set DeadInsts; for (BasicBlock::iterator I = Header->begin(); isa(I); ++I) { @@ -429,11 +425,19 @@ if (!DeadInsts.empty()) DeleteTriviallyDeadInstructions(DeadInsts); + return Changed; +} + +bool IndVarSimplify::runOnLoop(Loop *L, LPPassManager &LPM) { + - // Next, transform all loops nesting inside of this loop. - for (LoopInfo::iterator I = L->begin(), E = L->end(); I != E; ++I) - runOnLoop(*I); + LI = &getAnalysis(); + SE = &getAnalysis(); + Changed = false; + BasicBlock *Header = L->getHeader(); + std::set DeadInsts; + // Verify the input to the pass in already in LCSSA form. assert(L->isLCSSAForm()); @@ -483,7 +487,7 @@ DeleteTriviallyDeadInstructions(InstructionsToDelete); } } - return; + return Changed; } // Compute the type of the largest recurrence expression. @@ -585,4 +589,5 @@ DeleteTriviallyDeadInstructions(DeadInsts); assert(L->isLCSSAForm()); + return Changed; } From dpatel at apple.com Wed Mar 7 00:39:22 2007 From: dpatel at apple.com (Devang Patel) Date: Wed, 7 Mar 2007 00:39:22 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/Transforms/Scalar.h Message-ID: <200703070639.l276dMl8026103@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/Transforms: Scalar.h updated: 1.76 -> 1.77 --- Log message: Now IndVarSimplify is a LoopPass. --- Diffs of the changes: (+1 -1) Scalar.h | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/include/llvm/Transforms/Scalar.h diff -u llvm/include/llvm/Transforms/Scalar.h:1.76 llvm/include/llvm/Transforms/Scalar.h:1.77 --- llvm/include/llvm/Transforms/Scalar.h:1.76 Tue Mar 6 22:41:30 2007 +++ llvm/include/llvm/Transforms/Scalar.h Wed Mar 7 00:39:01 2007 @@ -92,7 +92,7 @@ // InductionVariableSimplify - Transform induction variables in a program to all // use a single canonical induction variable per loop. // -FunctionPass *createIndVarSimplifyPass(); +LoopPass *createIndVarSimplifyPass(); //===----------------------------------------------------------------------===// // From dpatel at apple.com Wed Mar 7 00:39:23 2007 From: dpatel at apple.com (Devang Patel) Date: Wed, 7 Mar 2007 00:39:23 -0600 Subject: [llvm-commits] CVS: llvm/lib/Analysis/LoopPass.cpp Message-ID: <200703070639.l276dNC0026108@zion.cs.uiuc.edu> Changes in directory llvm/lib/Analysis: LoopPass.cpp updated: 1.17 -> 1.18 --- Log message: Now IndVarSimplify is a LoopPass. --- Diffs of the changes: (+3 -0) LoopPass.cpp | 3 +++ 1 files changed, 3 insertions(+) Index: llvm/lib/Analysis/LoopPass.cpp diff -u llvm/lib/Analysis/LoopPass.cpp:1.17 llvm/lib/Analysis/LoopPass.cpp:1.18 --- llvm/lib/Analysis/LoopPass.cpp:1.17 Tue Mar 6 18:26:10 2007 +++ llvm/lib/Analysis/LoopPass.cpp Wed Mar 7 00:39:01 2007 @@ -14,6 +14,7 @@ //===----------------------------------------------------------------------===// #include "llvm/Analysis/LoopPass.h" +#include "llvm/Analysis/ScalarEvolutionExpander.h" using namespace llvm; //===----------------------------------------------------------------------===// @@ -148,6 +149,8 @@ // LPPassManager needs LoopInfo. In the long term LoopInfo class will // become part of LPPassManager. Info.addRequired(); + // Used by IndVar doInitialization. + Info.addRequired(); Info.setPreservesAll(); } From evan.cheng at apple.com Wed Mar 7 02:04:58 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 7 Mar 2007 02:04:58 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/SelectionDAGNodes.h Message-ID: <200703070804.l2784wnd027855@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/CodeGen: SelectionDAGNodes.h updated: 1.179 -> 1.180 --- Log message: Add a utility function to test whether a load is unindexed. --- Diffs of the changes: (+7 -0) SelectionDAGNodes.h | 7 +++++++ 1 files changed, 7 insertions(+) Index: llvm/include/llvm/CodeGen/SelectionDAGNodes.h diff -u llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.179 llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.180 --- llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.179 Sun Mar 4 14:40:06 2007 +++ llvm/include/llvm/CodeGen/SelectionDAGNodes.h Wed Mar 7 02:04:41 2007 @@ -1620,6 +1620,13 @@ cast(N)->getExtensionType() == ISD::ZEXTLOAD; } + /// isUNINDEXEDLoad - Returns true if the specified node is a unindexed load. + /// + inline bool isUNINDEXEDLoad(const SDNode *N) { + return N->getOpcode() == ISD::LOAD && + cast(N)->getAddressingMode() == ISD::UNINDEXED; + } + /// isNON_TRUNCStore - Returns true if the specified node is a non-truncating /// store. inline bool isNON_TRUNCStore(const SDNode *N) { From evan.cheng at apple.com Wed Mar 7 02:07:20 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 7 Mar 2007 02:07:20 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Message-ID: <200703070807.l2787KKQ027921@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/SelectionDAG: DAGCombiner.cpp updated: 1.274 -> 1.275 --- Log message: Avoid combining indexed load further. --- Diffs of the changes: (+14 -8) DAGCombiner.cpp | 22 ++++++++++++++-------- 1 files changed, 14 insertions(+), 8 deletions(-) Index: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp diff -u llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.274 llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.275 --- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.274 Sun Mar 4 14:40:38 2007 +++ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Wed Mar 7 02:07:03 2007 @@ -1245,7 +1245,7 @@ SimplifyDemandedBits(SDOperand(N, 0))) return SDOperand(N, 0); // fold (zext_inreg (extload x)) -> (zextload x) - if (ISD::isEXTLoad(N0.Val)) { + if (ISD::isEXTLoad(N0.Val) && ISD::isUNINDEXEDLoad(N0.Val)) { LoadSDNode *LN0 = cast(N0); MVT::ValueType EVT = LN0->getLoadedVT(); // If we zero all the possible extended bits, then we can turn this into @@ -1261,7 +1261,8 @@ } } // fold (zext_inreg (sextload x)) -> (zextload x) iff load has one use - if (ISD::isSEXTLoad(N0.Val) && N0.hasOneUse()) { + if (ISD::isSEXTLoad(N0.Val) && ISD::isUNINDEXEDLoad(N0.Val) && + N0.hasOneUse()) { LoadSDNode *LN0 = cast(N0); MVT::ValueType EVT = LN0->getLoadedVT(); // If we zero all the possible extended bits, then we can turn this into @@ -1282,6 +1283,7 @@ if (N1C && N0.getOpcode() == ISD::LOAD) { LoadSDNode *LN0 = cast(N0); if (LN0->getExtensionType() != ISD::SEXTLOAD && + LN0->getAddressingMode() == ISD::UNINDEXED && N0.hasOneUse()) { MVT::ValueType EVT, LoadedVT; if (N1C->getValue() == 255) @@ -2064,7 +2066,8 @@ // fold (sext (sextload x)) -> (sext (truncate (sextload x))) // fold (sext ( extload x)) -> (sext (truncate (sextload x))) - if ((ISD::isSEXTLoad(N0.Val) || ISD::isEXTLoad(N0.Val)) && N0.hasOneUse()) { + if ((ISD::isSEXTLoad(N0.Val) || ISD::isEXTLoad(N0.Val)) && + ISD::isUNINDEXEDLoad(N0.Val) && N0.hasOneUse()) { LoadSDNode *LN0 = cast(N0); MVT::ValueType EVT = LN0->getLoadedVT(); if (!AfterLegalize || TLI.isLoadXLegal(ISD::SEXTLOAD, EVT)) { @@ -2135,7 +2138,8 @@ // fold (zext (zextload x)) -> (zext (truncate (zextload x))) // fold (zext ( extload x)) -> (zext (truncate (zextload x))) - if ((ISD::isZEXTLoad(N0.Val) || ISD::isEXTLoad(N0.Val)) && N0.hasOneUse()) { + if ((ISD::isZEXTLoad(N0.Val) || ISD::isEXTLoad(N0.Val)) && + ISD::isUNINDEXEDLoad(N0.Val) && N0.hasOneUse()) { LoadSDNode *LN0 = cast(N0); MVT::ValueType EVT = LN0->getLoadedVT(); SDOperand ExtLoad = DAG.getExtLoad(ISD::ZEXTLOAD, VT, LN0->getChain(), @@ -2205,7 +2209,8 @@ // fold (aext (zextload x)) -> (aext (truncate (zextload x))) // fold (aext (sextload x)) -> (aext (truncate (sextload x))) // fold (aext ( extload x)) -> (aext (truncate (extload x))) - if (N0.getOpcode() == ISD::LOAD && !ISD::isNON_EXTLoad(N0.Val) && + if (N0.getOpcode() == ISD::LOAD && + !ISD::isNON_EXTLoad(N0.Val) && ISD::isUNINDEXEDLoad(N0.Val) && N0.hasOneUse()) { LoadSDNode *LN0 = cast(N0); MVT::ValueType EVT = LN0->getLoadedVT(); @@ -2263,6 +2268,7 @@ // fold (sext_inreg (extload x)) -> (sextload x) if (ISD::isEXTLoad(N0.Val) && + ISD::isUNINDEXEDLoad(N0.Val) && EVT == cast(N0)->getLoadedVT() && (!AfterLegalize || TLI.isLoadXLegal(ISD::SEXTLOAD, EVT))) { LoadSDNode *LN0 = cast(N0); @@ -2274,7 +2280,8 @@ return SDOperand(N, 0); // Return N so it doesn't get rechecked! } // fold (sext_inreg (zextload x)) -> (sextload x) iff load has one use - if (ISD::isZEXTLoad(N0.Val) && N0.hasOneUse() && + if (ISD::isZEXTLoad(N0.Val) && ISD::isUNINDEXEDLoad(N0.Val) && + N0.hasOneUse() && EVT == cast(N0)->getLoadedVT() && (!AfterLegalize || TLI.isLoadXLegal(ISD::SEXTLOAD, EVT))) { LoadSDNode *LN0 = cast(N0); @@ -2868,8 +2875,7 @@ if (LD->getAddressingMode() != ISD::UNINDEXED) return false; VT = LD->getLoadedVT(); - if (LD->getAddressingMode() != ISD::UNINDEXED && - !TLI.isIndexedLoadLegal(ISD::PRE_INC, VT) && + if (!TLI.isIndexedLoadLegal(ISD::PRE_INC, VT) && !TLI.isIndexedLoadLegal(ISD::PRE_DEC, VT)) return false; Ptr = LD->getBasePtr(); From evan.cheng at apple.com Wed Mar 7 02:12:56 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 7 Mar 2007 02:12:56 -0600 Subject: [llvm-commits] CVS: llvm/test/CodeGen/ARM/2007-03-07-CombinerCrash.ll Message-ID: <200703070812.l278CuxP028026@zion.cs.uiuc.edu> Changes in directory llvm/test/CodeGen/ARM: 2007-03-07-CombinerCrash.ll added (r1.1) --- Log message: New test case. --- Diffs of the changes: (+21 -0) 2007-03-07-CombinerCrash.ll | 21 +++++++++++++++++++++ 1 files changed, 21 insertions(+) Index: llvm/test/CodeGen/ARM/2007-03-07-CombinerCrash.ll diff -c /dev/null llvm/test/CodeGen/ARM/2007-03-07-CombinerCrash.ll:1.1 *** /dev/null Wed Mar 7 02:12:49 2007 --- llvm/test/CodeGen/ARM/2007-03-07-CombinerCrash.ll Wed Mar 7 02:12:39 2007 *************** *** 0 **** --- 1,21 ---- + ; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin -mattr=+v6,+vfp2 + + define fastcc i8* @read_sleb128(i8* %p, i32* %val) { + br label %bb + + bb: + %p_addr.0 = getelementptr i8* %p, i32 0 + %tmp2 = load i8* %p_addr.0 + %tmp4.rec = add i32 0, 1 + %tmp4 = getelementptr i8* %p, i32 %tmp4.rec + %tmp56 = zext i8 %tmp2 to i32 + %tmp7 = and i32 %tmp56, 127 + %tmp9 = shl i32 %tmp7, 0 + %tmp11 = or i32 %tmp9, 0 + icmp slt i8 %tmp2, 0 + br i1 %0, label %bb, label %cond_next28 + + cond_next28: + store i32 %tmp11, i32* %val + ret i8* %tmp4 + } From asl at math.spbu.ru Wed Mar 7 02:25:30 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Wed, 7 Mar 2007 02:25:30 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/DwarfWriter.cpp Message-ID: <200703070825.l278PUuq028250@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen: DwarfWriter.cpp updated: 1.131 -> 1.132 --- Log message: Cleanup: make SetCounter an instance variable --- Diffs of the changes: (+26 -28) DwarfWriter.cpp | 54 ++++++++++++++++++++++++++---------------------------- 1 files changed, 26 insertions(+), 28 deletions(-) Index: llvm/lib/CodeGen/DwarfWriter.cpp diff -u llvm/lib/CodeGen/DwarfWriter.cpp:1.131 llvm/lib/CodeGen/DwarfWriter.cpp:1.132 --- llvm/lib/CodeGen/DwarfWriter.cpp:1.131 Tue Mar 6 20:47:57 2007 +++ llvm/lib/CodeGen/DwarfWriter.cpp Wed Mar 7 02:25:02 2007 @@ -237,7 +237,7 @@ unsigned getOffset() const { return Offset; } unsigned getSize() const { return Size; } const std::vector &getChildren() const { return Children; } - const std::vector &getValues() const { return Values; } + std::vector &getValues() { return Values; } void setTag(unsigned Tag) { Abbrev.setTag(Tag); } void setOffset(unsigned O) { Offset = O; } void setSize(unsigned S) { Size = S; } @@ -315,7 +315,7 @@ /// EmitValue - Emit value via the Dwarf writer. /// - virtual void EmitValue(const DwarfDebug &DD, unsigned Form) const = 0; + virtual void EmitValue(DwarfDebug &DD, unsigned Form) = 0; /// SizeOf - Return the size of a value in bytes. /// @@ -365,7 +365,7 @@ /// EmitValue - Emit integer of appropriate size. /// - virtual void EmitValue(const DwarfDebug &DD, unsigned Form) const; + virtual void EmitValue(DwarfDebug &DD, unsigned Form); /// SizeOf - Determine size of integer value in bytes. /// @@ -402,7 +402,7 @@ /// EmitValue - Emit string value. /// - virtual void EmitValue(const DwarfDebug &DD, unsigned Form) const; + virtual void EmitValue(DwarfDebug &DD, unsigned Form); /// SizeOf - Determine size of string value in bytes. /// @@ -441,7 +441,7 @@ /// EmitValue - Emit label value. /// - virtual void EmitValue(const DwarfDebug &DD, unsigned Form) const; + virtual void EmitValue(DwarfDebug &DD, unsigned Form); /// SizeOf - Determine size of label value in bytes. /// @@ -479,7 +479,7 @@ /// EmitValue - Emit label value. /// - virtual void EmitValue(const DwarfDebug &DD, unsigned Form) const; + virtual void EmitValue(DwarfDebug &DD, unsigned Form); /// SizeOf - Determine size of label value in bytes. /// @@ -517,7 +517,7 @@ /// EmitValue - Emit delta value. /// - virtual void EmitValue(const DwarfDebug &DD, unsigned Form) const; + virtual void EmitValue(DwarfDebug &DD, unsigned Form); /// SizeOf - Determine size of delta value in bytes. /// @@ -559,7 +559,7 @@ /// EmitValue - Emit debug information entry offset. /// - virtual void EmitValue(const DwarfDebug &DD, unsigned Form) const; + virtual void EmitValue(DwarfDebug &DD, unsigned Form); /// SizeOf - Determine size of debug information entry in bytes. /// @@ -624,7 +624,7 @@ /// EmitValue - Emit block data. /// - virtual void EmitValue(const DwarfDebug &DD, unsigned Form) const; + virtual void EmitValue(DwarfDebug &DD, unsigned Form); /// SizeOf - Determine size of block data in bytes. /// @@ -795,7 +795,8 @@ /// SubprogramCount - The running count of functions being compiled. /// unsigned SubprogramCount; - + + unsigned SetCounter; Dwarf(std::ostream &OS, AsmPrinter *A, const TargetAsmInfo *T) : O(OS) , Asm(A) @@ -806,6 +807,7 @@ , MF(NULL) , MMI(NULL) , SubprogramCount(0) + , SetCounter(1) { } @@ -873,17 +875,15 @@ /// assemblers do not behave with absolute expressions with data directives, /// so there is an option (needsSet) to use an intermediary set expression. void EmitDifference(DWLabel LabelHi, DWLabel LabelLo, - bool IsSmall = false) const { + bool IsSmall = false) { EmitDifference(LabelHi.Tag, LabelHi.Number, LabelLo.Tag, LabelLo.Number, IsSmall); } void EmitDifference(const char *TagHi, unsigned NumberHi, const char *TagLo, unsigned NumberLo, - bool IsSmall = false) const { + bool IsSmall = false) { if (TAI->needsSet()) { - static unsigned SetCounter = 1; - O << "\t.set\t"; PrintLabelName("set", SetCounter); O << ","; @@ -914,10 +914,8 @@ void EmitSectionOffset(const char* Label, const char* Section, unsigned LabelNumber, unsigned SectionNumber, - bool IsSmall = false) const { + bool IsSmall = false) { if (TAI->needsSet()) { - static unsigned SetCounter = 1; - O << "\t.set\t"; PrintLabelName("set", SetCounter); O << ","; @@ -1978,7 +1976,7 @@ /// EmitDIE - Recusively Emits a debug information entry. /// - void EmitDIE(DIE *Die) const { + void EmitDIE(DIE *Die) { // Get the abbreviation for this DIE. unsigned AbbrevNumber = Die->getAbbrevNumber(); const DIEAbbrev *Abbrev = Abbreviations[AbbrevNumber - 1]; @@ -1993,7 +1991,7 @@ ":0x" + utohexstr(Die->getSize()) + " " + TagString(Abbrev->getTag()))); - const std::vector &Values = Die->getValues(); + std::vector &Values = Die->getValues(); const std::vector &AbbrevData = Abbrev->getData(); // Emit the DIE attribute values. @@ -2092,7 +2090,7 @@ /// EmitDebugInfo - Emit the debug info section. /// - void EmitDebugInfo() const { + void EmitDebugInfo() { // Start debug info section. Asm->SwitchToDataSection(TAI->getDwarfInfoSection()); @@ -2160,7 +2158,7 @@ /// EmitDebugLines - Emit source line information. /// - void EmitDebugLines() const { + void EmitDebugLines() { // Minimum line delta, thus ranging from -10..(255-10). const int MinLineDelta = -(DW_LNS_fixed_advance_pc + 1); // Maximum line delta, thus ranging from -10..(255-10). @@ -3199,7 +3197,7 @@ /// EmitValue - Emit integer of appropriate size. /// -void DIEInteger::EmitValue(const DwarfDebug &DD, unsigned Form) const { +void DIEInteger::EmitValue(DwarfDebug &DD, unsigned Form) { switch (Form) { case DW_FORM_flag: // Fall thru case DW_FORM_ref1: // Fall thru @@ -3240,7 +3238,7 @@ /// EmitValue - Emit string value. /// -void DIEString::EmitValue(const DwarfDebug &DD, unsigned Form) const { +void DIEString::EmitValue(DwarfDebug &DD, unsigned Form) { DD.getAsm()->EmitString(String); } @@ -3248,7 +3246,7 @@ /// EmitValue - Emit label value. /// -void DIEDwarfLabel::EmitValue(const DwarfDebug &DD, unsigned Form) const { +void DIEDwarfLabel::EmitValue(DwarfDebug &DD, unsigned Form) { DD.EmitReference(Label); } @@ -3262,7 +3260,7 @@ /// EmitValue - Emit label value. /// -void DIEObjectLabel::EmitValue(const DwarfDebug &DD, unsigned Form) const { +void DIEObjectLabel::EmitValue(DwarfDebug &DD, unsigned Form) { DD.EmitReference(Label); } @@ -3276,7 +3274,7 @@ /// EmitValue - Emit delta value. /// -void DIEDelta::EmitValue(const DwarfDebug &DD, unsigned Form) const { +void DIEDelta::EmitValue(DwarfDebug &DD, unsigned Form) { bool IsSmall = Form == DW_FORM_data4; DD.EmitDifference(LabelHi, LabelLo, IsSmall); } @@ -3292,7 +3290,7 @@ /// EmitValue - Emit debug information entry offset. /// -void DIEntry::EmitValue(const DwarfDebug &DD, unsigned Form) const { +void DIEntry::EmitValue(DwarfDebug &DD, unsigned Form) { DD.getAsm()->EmitInt32(Entry->getOffset()); } @@ -3313,7 +3311,7 @@ /// EmitValue - Emit block data. /// -void DIEBlock::EmitValue(const DwarfDebug &DD, unsigned Form) const { +void DIEBlock::EmitValue(DwarfDebug &DD, unsigned Form) { switch (Form) { case DW_FORM_block1: DD.getAsm()->EmitInt8(Size); break; case DW_FORM_block2: DD.getAsm()->EmitInt16(Size); break; From asl at math.spbu.ru Wed Mar 7 10:25:44 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Wed, 7 Mar 2007 10:25:44 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/ARM/ARMISelLowering.cpp Message-ID: <200703071625.l27GPiM5006335@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/ARM: ARMISelLowering.cpp updated: 1.18 -> 1.19 --- Log message: Refactoring of formal parameter flags. Enable properly use of zext/sext/aext stuff. --- Diffs of the changes: (+1 -2) ARMISelLowering.cpp | 3 +-- 1 files changed, 1 insertion(+), 2 deletions(-) Index: llvm/lib/Target/ARM/ARMISelLowering.cpp diff -u llvm/lib/Target/ARM/ARMISelLowering.cpp:1.18 llvm/lib/Target/ARM/ARMISelLowering.cpp:1.19 --- llvm/lib/Target/ARM/ARMISelLowering.cpp:1.18 Tue Mar 6 02:12:33 2007 +++ llvm/lib/Target/ARM/ARMISelLowering.cpp Wed Mar 7 10:25:08 2007 @@ -27,7 +27,6 @@ #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineInstrBuilder.h" #include "llvm/CodeGen/SelectionDAG.h" -#include "llvm/CodeGen/SelectionDAGISel.h" #include "llvm/CodeGen/SSARegMap.h" #include "llvm/Target/TargetOptions.h" #include "llvm/ADT/VectorExtras.h" @@ -347,7 +346,7 @@ NeededGPRs = 0; StackPad = 0; GPRPad = 0; - unsigned align = (Flags >> SDISelParamFlags::OrigAlignmentOffs); + unsigned align = (Flags >> ISD::ParamFlags::OrigAlignmentOffs); GPRPad = NumGPRs % ((align + 3)/4); StackPad = StackOffset % align; unsigned firstGPR = NumGPRs + GPRPad; From asl at math.spbu.ru Wed Mar 7 10:25:44 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Wed, 7 Mar 2007 10:25:44 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/TargetCallingConv.td Message-ID: <200703071625.l27GPitf006337@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target: TargetCallingConv.td updated: 1.4 -> 1.5 --- Log message: Refactoring of formal parameter flags. Enable properly use of zext/sext/aext stuff. --- Diffs of the changes: (+1 -1) TargetCallingConv.td | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/Target/TargetCallingConv.td diff -u llvm/lib/Target/TargetCallingConv.td:1.4 llvm/lib/Target/TargetCallingConv.td:1.5 --- llvm/lib/Target/TargetCallingConv.td:1.4 Tue Mar 6 02:12:33 2007 +++ llvm/lib/Target/TargetCallingConv.td Wed Mar 7 10:25:08 2007 @@ -38,7 +38,7 @@ /// CCIfInReg - If this argument is marked with the 'inreg' attribute, apply /// the specified action. -class CCIfInReg : CCIf<"ArgFlags & SDISelParamFlags::InReg", A> {} +class CCIfInReg : CCIf<"ArgFlags & ISD::ParamFlags::InReg", A> {} /// CCAssignToReg - This action matches if there is a register in the specified From asl at math.spbu.ru Wed Mar 7 10:25:45 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Wed, 7 Mar 2007 10:25:45 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp Message-ID: <200703071625.l27GPjJj006345@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/Sparc: SparcISelDAGToDAG.cpp updated: 1.121 -> 1.122 --- Log message: Refactoring of formal parameter flags. Enable properly use of zext/sext/aext stuff. --- Diffs of the changes: (+4 -2) SparcISelDAGToDAG.cpp | 6 ++++-- 1 files changed, 4 insertions(+), 2 deletions(-) Index: llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp diff -u llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp:1.121 llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp:1.122 --- llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp:1.121 Thu Feb 22 08:56:36 2007 +++ llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp Wed Mar 7 10:25:09 2007 @@ -516,9 +516,11 @@ case MVT::i16: { // Promote the integer to 32-bits. If the input type is signed, use a // sign extend, otherwise use a zero extend. - ISD::NodeType ExtendKind = ISD::ZERO_EXTEND; - if (Args[i].isSigned) + ISD::NodeType ExtendKind = ISD::ANY_EXTEND; + if (Args[i].isSExt) ExtendKind = ISD::SIGN_EXTEND; + else if (Args[i].isZExt) + ExtendKind = ISD::ZERO_EXTEND; Val = DAG.getNode(ExtendKind, MVT::i32, Val); // FALL THROUGH } From asl at math.spbu.ru Wed Mar 7 10:25:52 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Wed, 7 Mar 2007 10:25:52 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/SelectionDAGISel.h SelectionDAGNodes.h Message-ID: <200703071625.l27GPqZS006352@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/CodeGen: SelectionDAGISel.h updated: 1.32 -> 1.33 SelectionDAGNodes.h updated: 1.180 -> 1.181 --- Log message: Refactoring of formal parameter flags. Enable properly use of zext/sext/aext stuff. --- Diffs of the changes: (+17 -16) SelectionDAGISel.h | 16 +--------------- SelectionDAGNodes.h | 17 ++++++++++++++++- 2 files changed, 17 insertions(+), 16 deletions(-) Index: llvm/include/llvm/CodeGen/SelectionDAGISel.h diff -u llvm/include/llvm/CodeGen/SelectionDAGISel.h:1.32 llvm/include/llvm/CodeGen/SelectionDAGISel.h:1.33 --- llvm/include/llvm/CodeGen/SelectionDAGISel.h:1.32 Tue Mar 6 00:10:33 2007 +++ llvm/include/llvm/CodeGen/SelectionDAGISel.h Wed Mar 7 10:25:08 2007 @@ -30,21 +30,7 @@ class TargetLowering; class FunctionLoweringInfo; class HazardRecognizer; - - namespace SDISelParamFlags { - enum Flags { - NoFlagSet = 0, - Signed = 1<<0, - SignedOffs = 0, - InReg = 1<<1, - InRegOffs = 1, - StructReturn = 1<<2, - StructReturnOffs = 2, - OrigAlignment = 0x1F<<27, - OrigAlignmentOffs = 27 - }; - } - + /// SelectionDAGISel - This is the common base class used for SelectionDAG-based /// pattern-matching instruction selectors. class SelectionDAGISel : public FunctionPass { Index: llvm/include/llvm/CodeGen/SelectionDAGNodes.h diff -u llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.180 llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.181 --- llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.180 Wed Mar 7 02:04:41 2007 +++ llvm/include/llvm/CodeGen/SelectionDAGNodes.h Wed Mar 7 10:25:08 2007 @@ -48,11 +48,26 @@ unsigned short NumVTs; }; - /// ISD namespace - This namespace contains an enum which represents all of the /// SelectionDAG node types and value types. /// namespace ISD { + namespace ParamFlags { + enum Flags { + NoFlagSet = 0, + ZExt = 1<<0, ///< Parameter should be zero extended + ZExtOffs = 0, + SExt = 1<<1, ///< Parameter should be sign extended + SExtOffs = 1, + InReg = 1<<2, ///< Parameter should be passed in register + InRegOffs = 2, + StructReturn = 1<<3, ///< Hidden struct-return pointer + StructReturnOffs = 3, + OrigAlignment = 0x1F<<27, + OrigAlignmentOffs = 27 + }; + } + //===--------------------------------------------------------------------===// /// ISD::NodeType enum - This enum defines all of the operators valid in a /// SelectionDAG. From asl at math.spbu.ru Wed Mar 7 10:25:52 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Wed, 7 Mar 2007 10:25:52 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaISelLowering.cpp Message-ID: <200703071625.l27GPqJg006355@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/Alpha: AlphaISelLowering.cpp updated: 1.83 -> 1.84 --- Log message: Refactoring of formal parameter flags. Enable properly use of zext/sext/aext stuff. --- Diffs of the changes: (+4 -2) AlphaISelLowering.cpp | 6 ++++-- 1 files changed, 4 insertions(+), 2 deletions(-) Index: llvm/lib/Target/Alpha/AlphaISelLowering.cpp diff -u llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.83 llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.84 --- llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.83 Thu Feb 22 08:56:36 2007 +++ llvm/lib/Target/Alpha/AlphaISelLowering.cpp Wed Mar 7 10:25:08 2007 @@ -337,10 +337,12 @@ case MVT::i32: // Promote the integer to 64 bits. If the input type is signed use a // sign extend, otherwise use a zero extend. - if (Args[i].isSigned) + if (Args[i].isSExt) Args[i].Node = DAG.getNode(ISD::SIGN_EXTEND, MVT::i64, Args[i].Node); - else + else if (Args[i].isZExt) Args[i].Node = DAG.getNode(ISD::ZERO_EXTEND, MVT::i64, Args[i].Node); + else + Args[i].Node = DAG.getNode(ISD::ANY_EXTEND, MVT::i64, Args[i].Node); break; case MVT::i64: case MVT::f64: From asl at math.spbu.ru Wed Mar 7 10:25:52 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Wed, 7 Mar 2007 10:25:52 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/Target/TargetLowering.h Message-ID: <200703071625.l27GPqxP006363@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/Target: TargetLowering.h updated: 1.110 -> 1.111 --- Log message: Refactoring of formal parameter flags. Enable properly use of zext/sext/aext stuff. --- Diffs of the changes: (+3 -2) TargetLowering.h | 5 +++-- 1 files changed, 3 insertions(+), 2 deletions(-) Index: llvm/include/llvm/Target/TargetLowering.h diff -u llvm/include/llvm/Target/TargetLowering.h:1.110 llvm/include/llvm/Target/TargetLowering.h:1.111 --- llvm/include/llvm/Target/TargetLowering.h:1.110 Thu Feb 22 09:37:19 2007 +++ llvm/include/llvm/Target/TargetLowering.h Wed Mar 7 10:25:08 2007 @@ -765,11 +765,12 @@ struct ArgListEntry { SDOperand Node; const Type* Ty; - bool isSigned; + bool isSExt; + bool isZExt; bool isInReg; bool isSRet; - ArgListEntry():isSigned(false), isInReg(false), isSRet(false) { }; + ArgListEntry():isSExt(false), isZExt(false), isInReg(false), isSRet(false) { }; }; typedef std::vector ArgListTy; virtual std::pair From asl at math.spbu.ru Wed Mar 7 10:25:52 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Wed, 7 Mar 2007 10:25:52 -0600 Subject: [llvm-commits] CVS: llvm/utils/TableGen/CallingConvEmitter.cpp Message-ID: <200703071625.l27GPqHi006364@zion.cs.uiuc.edu> Changes in directory llvm/utils/TableGen: CallingConvEmitter.cpp updated: 1.5 -> 1.6 --- Log message: Refactoring of formal parameter flags. Enable properly use of zext/sext/aext stuff. --- Diffs of the changes: (+6 -2) CallingConvEmitter.cpp | 8 ++++++-- 1 files changed, 6 insertions(+), 2 deletions(-) Index: llvm/utils/TableGen/CallingConvEmitter.cpp diff -u llvm/utils/TableGen/CallingConvEmitter.cpp:1.5 llvm/utils/TableGen/CallingConvEmitter.cpp:1.6 --- llvm/utils/TableGen/CallingConvEmitter.cpp:1.5 Tue Mar 6 02:12:33 2007 +++ llvm/utils/TableGen/CallingConvEmitter.cpp Wed Mar 7 10:25:09 2007 @@ -123,8 +123,12 @@ } else if (Action->isSubClassOf("CCPromoteToType")) { Record *DestTy = Action->getValueAsDef("DestTy"); O << IndentStr << "LocVT = " << getEnumName(getValueType(DestTy)) <<";\n"; - O << IndentStr << "LocInfo = (ArgFlags & SDISelParamFlags::Signed) ? \n" - << IndentStr << IndentStr << "CCValAssign::SExt : CCValAssign::ZExt;\n"; + O << IndentStr << "if (ArgFlags & ISD::ParamFlags::SExt)\n" + << IndentStr << IndentStr << "LocInfo = CCValAssign::SExt;\n" + << IndentStr << "else if (ArgFlags & ISD::ParamFlags::ZExt)\n" + << IndentStr << IndentStr << "LocInfo = CCValAssign::ZExt;\n" + << IndentStr << "else\n" + << IndentStr << IndentStr << "LocInfo = CCValAssign::AExt;\n"; } else { Action->dump(); throw "Unknown CCAction!"; From asl at math.spbu.ru Wed Mar 7 10:25:53 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Wed, 7 Mar 2007 10:25:53 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp Message-ID: <200703071625.l27GPrE7006372@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: X86ISelLowering.cpp updated: 1.363 -> 1.364 --- Log message: Refactoring of formal parameter flags. Enable properly use of zext/sext/aext stuff. --- Diffs of the changes: (+2 -12) X86ISelLowering.cpp | 14 ++------------ 1 files changed, 2 insertions(+), 12 deletions(-) Index: llvm/lib/Target/X86/X86ISelLowering.cpp diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.363 llvm/lib/Target/X86/X86ISelLowering.cpp:1.364 --- llvm/lib/Target/X86/X86ISelLowering.cpp:1.363 Tue Mar 6 23:43:18 2007 +++ llvm/lib/Target/X86/X86ISelLowering.cpp Wed Mar 7 10:25:09 2007 @@ -29,7 +29,6 @@ #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineInstrBuilder.h" #include "llvm/CodeGen/SelectionDAG.h" -#include "llvm/CodeGen/SelectionDAGISel.h" #include "llvm/CodeGen/SSARegMap.h" #include "llvm/Support/MathExtras.h" #include "llvm/Target/TargetOptions.h" @@ -677,7 +676,7 @@ // If this is an sret function, the return should pop the hidden pointer. if (NumArgs && (cast(Op.getOperand(3))->getValue() & - SDISelParamFlags::StructReturn)) + ISD::ParamFlags::StructReturn)) BytesToPopOnReturn = 4; BytesCallerReserves = StackSize; @@ -751,7 +750,7 @@ // If the first argument is an sret pointer, remember it. bool isSRet = NumOps && (cast(Op.getOperand(6))->getValue() & - SDISelParamFlags::StructReturn); + ISD::ParamFlags::StructReturn); if (!MemOpChains.empty()) Chain = DAG.getNode(ISD::TokenFactor, MVT::Other, @@ -3408,16 +3407,10 @@ TargetLowering::ArgListEntry Entry; Entry.Node = Op.getOperand(1); Entry.Ty = IntPtrTy; - Entry.isSigned = false; - Entry.isInReg = false; - Entry.isSRet = false; Args.push_back(Entry); // Extend the unsigned i8 argument to be an int value for the call. Entry.Node = DAG.getNode(ISD::ZERO_EXTEND, MVT::i32, Op.getOperand(2)); Entry.Ty = IntPtrTy; - Entry.isSigned = false; - Entry.isInReg = false; - Entry.isSRet = false; Args.push_back(Entry); Entry.Node = Op.getOperand(3); Args.push_back(Entry); @@ -3568,9 +3561,6 @@ TargetLowering::ArgListTy Args; TargetLowering::ArgListEntry Entry; Entry.Ty = getTargetData()->getIntPtrType(); - Entry.isSigned = false; - Entry.isInReg = false; - Entry.isSRet = false; Entry.Node = Op.getOperand(1); Args.push_back(Entry); Entry.Node = Op.getOperand(2); Args.push_back(Entry); Entry.Node = Op.getOperand(3); Args.push_back(Entry); From asl at math.spbu.ru Wed Mar 7 10:25:53 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Wed, 7 Mar 2007 10:25:53 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp SelectionDAGISel.cpp Message-ID: <200703071625.l27GPrVj006379@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/SelectionDAG: LegalizeDAG.cpp updated: 1.483 -> 1.484 SelectionDAGISel.cpp updated: 1.381 -> 1.382 --- Log message: Refactoring of formal parameter flags. Enable properly use of zext/sext/aext stuff. --- Diffs of the changes: (+31 -31) LegalizeDAG.cpp | 11 ++++------- SelectionDAGISel.cpp | 51 +++++++++++++++++++++++++++------------------------ 2 files changed, 31 insertions(+), 31 deletions(-) Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.483 llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.484 --- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.483 Tue Mar 6 14:01:06 2007 +++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Wed Mar 7 10:25:08 2007 @@ -2242,8 +2242,7 @@ const char *FnName = 0; if (Node->getOpcode() == ISD::MEMSET) { - Entry.Node = Tmp2; Entry.isSigned = false; Entry.Ty = IntPtrTy; - Entry.isInReg = false; Entry.isSRet = false; + Entry.Node = Tmp2; Entry.Ty = IntPtrTy; Args.push_back(Entry); // Extend the (previously legalized) ubyte argument to be an int value // for the call. @@ -2251,17 +2250,15 @@ Tmp3 = DAG.getNode(ISD::TRUNCATE, MVT::i32, Tmp3); else Tmp3 = DAG.getNode(ISD::ZERO_EXTEND, MVT::i32, Tmp3); - Entry.Node = Tmp3; Entry.Ty = Type::Int32Ty; Entry.isSigned = true; - Entry.isInReg = false; Entry.isSRet = false; + Entry.Node = Tmp3; Entry.Ty = Type::Int32Ty; Entry.isSExt = true; Args.push_back(Entry); - Entry.Node = Tmp4; Entry.Ty = IntPtrTy; Entry.isSigned = false; + Entry.Node = Tmp4; Entry.Ty = IntPtrTy; Entry.isSExt = false; Args.push_back(Entry); FnName = "memset"; } else if (Node->getOpcode() == ISD::MEMCPY || Node->getOpcode() == ISD::MEMMOVE) { Entry.Ty = IntPtrTy; - Entry.isSigned = false; Entry.isInReg = false; Entry.isSRet = false; Entry.Node = Tmp2; Args.push_back(Entry); Entry.Node = Tmp3; Args.push_back(Entry); Entry.Node = Tmp4; Args.push_back(Entry); @@ -4228,7 +4225,7 @@ MVT::ValueType ArgVT = Node->getOperand(i).getValueType(); const Type *ArgTy = MVT::getTypeForValueType(ArgVT); Entry.Node = Node->getOperand(i); Entry.Ty = ArgTy; - Entry.isSigned = isSigned; Entry.isInReg = false; Entry.isSRet = false; + Entry.isSExt = isSigned; Args.push_back(Entry); } SDOperand Callee = DAG.getExternalSymbol(Name, TLI.getPointerTy()); Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.381 llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.382 --- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.381 Tue Mar 6 00:10:33 2007 +++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Wed Mar 7 10:25:08 2007 @@ -2279,7 +2279,8 @@ Value *Arg = I.getOperand(i); SDOperand ArgNode = getValue(Arg); Entry.Node = ArgNode; Entry.Ty = Arg->getType(); - Entry.isSigned = FTy->paramHasAttr(i, FunctionType::SExtAttribute); + Entry.isSExt = FTy->paramHasAttr(i, FunctionType::SExtAttribute); + Entry.isZExt = FTy->paramHasAttr(i, FunctionType::ZExtAttribute); Entry.isInReg = FTy->paramHasAttr(i, FunctionType::InRegAttribute); Entry.isSRet = FTy->paramHasAttr(i, FunctionType::StructRetAttribute); Args.push_back(Entry); @@ -2983,9 +2984,6 @@ TargetLowering::ArgListEntry Entry; Entry.Node = Src; Entry.Ty = TLI.getTargetData()->getIntPtrType(); - Entry.isSigned = false; - Entry.isInReg = false; - Entry.isSRet = false; Args.push_back(Entry); std::pair Result = @@ -3001,9 +2999,6 @@ TargetLowering::ArgListEntry Entry; Entry.Node = getValue(I.getOperand(0)); Entry.Ty = TLI.getTargetData()->getIntPtrType(); - Entry.isSigned = false; - Entry.isInReg = false; - Entry.isSRet = false; Args.push_back(Entry); MVT::ValueType IntPtr = TLI.getPointerTy(); std::pair Result = @@ -3099,21 +3094,21 @@ for (Function::arg_iterator I = F.arg_begin(), E = F.arg_end(); I != E; ++I, ++j) { MVT::ValueType VT = getValueType(I->getType()); - unsigned Flags = SDISelParamFlags::NoFlagSet; + unsigned Flags = ISD::ParamFlags::NoFlagSet; unsigned OriginalAlignment = getTargetData()->getABITypeAlignment(I->getType()); // FIXME: Distinguish between a formal with no [sz]ext attribute from one // that is zero extended! if (FTy->paramHasAttr(j, FunctionType::ZExtAttribute)) - Flags &= ~(SDISelParamFlags::Signed); + Flags &= ~(ISD::ParamFlags::SExt); if (FTy->paramHasAttr(j, FunctionType::SExtAttribute)) - Flags |= SDISelParamFlags::Signed; + Flags |= ISD::ParamFlags::SExt; if (FTy->paramHasAttr(j, FunctionType::InRegAttribute)) - Flags |= SDISelParamFlags::InReg; + Flags |= ISD::ParamFlags::InReg; if (FTy->paramHasAttr(j, FunctionType::StructRetAttribute)) - Flags |= SDISelParamFlags::StructReturn; - Flags |= (OriginalAlignment << SDISelParamFlags::OrigAlignmentOffs); + Flags |= ISD::ParamFlags::StructReturn; + Flags |= (OriginalAlignment << ISD::ParamFlags::OrigAlignmentOffs); switch (getTypeAction(VT)) { default: assert(0 && "Unknown type action!"); @@ -3136,8 +3131,8 @@ RetVals.push_back(NVT); // if it isn't first piece, alignment must be 1 if (i > 0) - Flags = (Flags & (~SDISelParamFlags::OrigAlignment)) | - (1 << SDISelParamFlags::OrigAlignmentOffs); + Flags = (Flags & (~ISD::ParamFlags::OrigAlignment)) | + (1 << ISD::ParamFlags::OrigAlignmentOffs); Ops.push_back(DAG.getConstant(Flags, MVT::i32)); } } else { @@ -3246,8 +3241,8 @@ if (TLI.getTypeAction(VT) != TargetLowering::Expand) { // if it isn't first piece, alignment must be 1 if (!isFirst) - Flags = (Flags & (~SDISelParamFlags::OrigAlignment)) | - (1 << SDISelParamFlags::OrigAlignmentOffs); + Flags = (Flags & (~ISD::ParamFlags::OrigAlignment)) | + (1 << ISD::ParamFlags::OrigAlignmentOffs); Ops.push_back(Arg); Ops.push_back(DAG.getConstant(Flags, MVT::i32)); return; @@ -3294,17 +3289,19 @@ for (unsigned i = 0, e = Args.size(); i != e; ++i) { MVT::ValueType VT = getValueType(Args[i].Ty); SDOperand Op = Args[i].Node; - unsigned Flags = SDISelParamFlags::NoFlagSet; + unsigned Flags = ISD::ParamFlags::NoFlagSet; unsigned OriginalAlignment = getTargetData()->getABITypeAlignment(Args[i].Ty); - if (Args[i].isSigned) - Flags |= SDISelParamFlags::Signed; + if (Args[i].isSExt) + Flags |= ISD::ParamFlags::SExt; + if (Args[i].isZExt) + Flags |= ISD::ParamFlags::ZExt; if (Args[i].isInReg) - Flags |= SDISelParamFlags::InReg; + Flags |= ISD::ParamFlags::InReg; if (Args[i].isSRet) - Flags |= SDISelParamFlags::StructReturn; - Flags |= OriginalAlignment << SDISelParamFlags::OrigAlignmentOffs; + Flags |= ISD::ParamFlags::StructReturn; + Flags |= OriginalAlignment << ISD::ParamFlags::OrigAlignmentOffs; switch (getTypeAction(VT)) { default: assert(0 && "Unknown type action!"); @@ -3314,7 +3311,13 @@ break; case Promote: if (MVT::isInteger(VT)) { - unsigned ExtOp = Args[i].isSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; + unsigned ExtOp; + if (Args[i].isSExt) + ExtOp = ISD::SIGN_EXTEND; + else if (Args[i].isZExt) + ExtOp = ISD::ZERO_EXTEND; + else + ExtOp = ISD::ANY_EXTEND; Op = DAG.getNode(ExtOp, getTypeToTransformTo(VT), Op); } else { assert(MVT::isFloatingPoint(VT) && "Not int or FP?"); From asl at math.spbu.ru Wed Mar 7 10:25:53 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Wed, 7 Mar 2007 10:25:53 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/IA64/IA64ISelLowering.cpp Message-ID: <200703071625.l27GPrnO006376@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/IA64: IA64ISelLowering.cpp updated: 1.55 -> 1.56 --- Log message: Refactoring of formal parameter flags. Enable properly use of zext/sext/aext stuff. --- Diffs of the changes: (+4 -2) IA64ISelLowering.cpp | 6 ++++-- 1 files changed, 4 insertions(+), 2 deletions(-) Index: llvm/lib/Target/IA64/IA64ISelLowering.cpp diff -u llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.55 llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.56 --- llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.55 Thu Feb 22 08:56:36 2007 +++ llvm/lib/Target/IA64/IA64ISelLowering.cpp Wed Mar 7 10:25:09 2007 @@ -341,9 +341,11 @@ case MVT::i32: { //promote to 64-bits, sign/zero extending based on type //of the argument - ISD::NodeType ExtendKind = ISD::ZERO_EXTEND; - if (Args[i].isSigned) + ISD::NodeType ExtendKind = ISD::ANY_EXTEND; + if (Args[i].isSExt) ExtendKind = ISD::SIGN_EXTEND; + else if (Args[i].isZExt) + ExtendKind = ISD::ZERO_EXTEND; Val = DAG.getNode(ExtendKind, MVT::i64, Val); // XXX: fall through } From clattner at apple.com Wed Mar 7 11:58:33 2007 From: clattner at apple.com (Chris Lattner) Date: Wed, 7 Mar 2007 09:58:33 -0800 Subject: [llvm-commits] CVS: llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp In-Reply-To: <200703071625.l27GPjJj006345@zion.cs.uiuc.edu> References: <200703071625.l27GPjJj006345@zion.cs.uiuc.edu> Message-ID: <797D32EF-B77D-428C-BDA5-0F94871F1FF1@apple.com> > Refactoring of formal parameter flags. Enable properly use of > zext/sext/aext stuff. Thanks Anton! -Chris > > --- > Diffs of the changes: (+4 -2) > > SparcISelDAGToDAG.cpp | 6 ++++-- > 1 files changed, 4 insertions(+), 2 deletions(-) > > > Index: llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp > diff -u llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp:1.121 llvm/lib/ > Target/Sparc/SparcISelDAGToDAG.cpp:1.122 > --- llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp:1.121 Thu Feb 22 > 08:56:36 2007 > +++ llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp Wed Mar 7 10:25:09 > 2007 > @@ -516,9 +516,11 @@ > case MVT::i16: { > // Promote the integer to 32-bits. If the input type is > signed, use a > // sign extend, otherwise use a zero extend. > - ISD::NodeType ExtendKind = ISD::ZERO_EXTEND; > - if (Args[i].isSigned) > + ISD::NodeType ExtendKind = ISD::ANY_EXTEND; > + if (Args[i].isSExt) > ExtendKind = ISD::SIGN_EXTEND; > + else if (Args[i].isZExt) > + ExtendKind = ISD::ZERO_EXTEND; > Val = DAG.getNode(ExtendKind, MVT::i32, Val); > // FALL THROUGH > } > > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From isanbard at gmail.com Wed Mar 7 12:23:32 2007 From: isanbard at gmail.com (Bill Wendling) Date: Wed, 7 Mar 2007 12:23:32 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86InstrMMX.td Message-ID: <200703071823.l27INWVl008440@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: X86InstrMMX.td updated: 1.16 -> 1.17 --- Log message: Remove useless pattern fragments. --- Diffs of the changes: (+0 -2) X86InstrMMX.td | 2 -- 1 files changed, 2 deletions(-) Index: llvm/lib/Target/X86/X86InstrMMX.td diff -u llvm/lib/Target/X86/X86InstrMMX.td:1.16 llvm/lib/Target/X86/X86InstrMMX.td:1.17 --- llvm/lib/Target/X86/X86InstrMMX.td:1.16 Tue Mar 6 23:43:18 2007 +++ llvm/lib/Target/X86/X86InstrMMX.td Wed Mar 7 12:23:09 2007 @@ -42,8 +42,6 @@ // MMX Pattern Fragments //===----------------------------------------------------------------------===// -def loadv8i8 : PatFrag<(ops node:$ptr), (v8i8 (load node:$ptr))>; -def loadv4i16 : PatFrag<(ops node:$ptr), (v4i16 (load node:$ptr))>; def loadv2i32 : PatFrag<(ops node:$ptr), (v2i32 (load node:$ptr))>; //===----------------------------------------------------------------------===// From evan.cheng at apple.com Wed Mar 7 14:31:05 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 7 Mar 2007 14:31:05 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp Message-ID: <200703072031.l27KV5Fa016915@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/ARM: ARMLoadStoreOptimizer.cpp updated: 1.4 -> 1.5 --- Log message: Only safe to use a call-clobbered or spilled callee-saved register as scratch register. --- Diffs of the changes: (+8 -2) ARMLoadStoreOptimizer.cpp | 10 ++++++++-- 1 files changed, 8 insertions(+), 2 deletions(-) Index: llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp diff -u llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp:1.4 llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp:1.5 --- llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp:1.4 Tue Mar 6 20:38:05 2007 +++ llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp Wed Mar 7 14:30:36 2007 @@ -15,6 +15,7 @@ #define DEBUG_TYPE "arm-ldst-opt" #include "ARM.h" #include "ARMAddressingModes.h" +#include "ARMMachineFunctionInfo.h" #include "ARMRegisterInfo.h" #include "llvm/ADT/STLExtras.h" #include "llvm/ADT/SmallVector.h" @@ -39,6 +40,7 @@ struct VISIBILITY_HIDDEN ARMLoadStoreOpt : public MachineFunctionPass { const TargetInstrInfo *TII; const MRegisterInfo *MRI; + ARMFunctionInfo *AFI; RegScavenger *RS; MachineBasicBlock::iterator RSI; @@ -587,8 +589,11 @@ // First advance to the instruction just before the start of the chain. if (RSI != MBB.begin()) RS->forward(prior(RSI)); - // Find a scratch register. - Scratch = RS->FindUnusedReg(&ARM::GPRRegClass); + // Find a scratch register. Make sure it's a call clobbered register or + // a spilled callee-saved register. + Scratch = RS->FindUnusedReg(&ARM::GPRRegClass, true); + if (!Scratch) + RS->FindUnusedReg(&ARM::GPRRegClass, AFI->getSpilledCSRegisters()); // Process the load / store instructions. RS->forward(prior(MBBI)); @@ -661,6 +666,7 @@ bool ARMLoadStoreOpt::runOnMachineFunction(MachineFunction &Fn) { const TargetMachine &TM = Fn.getTarget(); + AFI = Fn.getInfo(); TII = TM.getInstrInfo(); MRI = TM.getRegisterInfo(); RS = new RegScavenger(); From criswell at cs.uiuc.edu Wed Mar 7 16:50:11 2007 From: criswell at cs.uiuc.edu (John Criswell) Date: Wed, 7 Mar 2007 16:50:11 -0600 Subject: [llvm-commits] [see] CVS: llvm-poolalloc/lib/DSA/DataStructure.cpp Message-ID: <200703072250.l27MoB7S021240@zion.cs.uiuc.edu> Changes in directory llvm-poolalloc/lib/DSA: DataStructure.cpp updated: 1.248.2.4.2.2 -> 1.248.2.4.2.3 --- Log message: Mark globals that are accessable to external functions incomplete. --- Diffs of the changes: (+3 -1) DataStructure.cpp | 4 +++- 1 files changed, 3 insertions(+), 1 deletion(-) Index: llvm-poolalloc/lib/DSA/DataStructure.cpp diff -u llvm-poolalloc/lib/DSA/DataStructure.cpp:1.248.2.4.2.2 llvm-poolalloc/lib/DSA/DataStructure.cpp:1.248.2.4.2.3 --- llvm-poolalloc/lib/DSA/DataStructure.cpp:1.248.2.4.2.2 Tue Mar 6 16:44:38 2007 +++ llvm-poolalloc/lib/DSA/DataStructure.cpp Wed Mar 7 16:49:43 2007 @@ -1996,7 +1996,9 @@ for (DSScalarMap::global_iterator I = ScalarMap.global_begin(), E = ScalarMap.global_end(); I != E; ++I) if (GlobalVariable *GV = dyn_cast(*I)) - if (!GV->hasInitializer() || // Always mark external globals incomp. + if (!GV->hasInitializer() || // Always mark external globals incomp. + GV->hasExternalLinkage() || + GV->hasExternalWeakLinkage() || (!GV->isConstant() && (Flags & DSGraph::IgnoreGlobals) == 0)) markIncompleteNode(ScalarMap[GV].getNode()); } From criswell at cs.uiuc.edu Wed Mar 7 16:54:16 2007 From: criswell at cs.uiuc.edu (John Criswell) Date: Wed, 7 Mar 2007 16:54:16 -0600 Subject: [llvm-commits] [see] CVS: llvm-poolalloc/lib/DSA/TopDownClosure.cpp Message-ID: <200703072254.l27MsGBH021354@zion.cs.uiuc.edu> Changes in directory llvm-poolalloc/lib/DSA: TopDownClosure.cpp updated: 1.92.2.1.2.1 -> 1.92.2.1.2.2 --- Log message: It is possible that MetaPools may be added which have no DSNode. Skip them properly. --- Diffs of the changes: (+1 -1) TopDownClosure.cpp | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm-poolalloc/lib/DSA/TopDownClosure.cpp diff -u llvm-poolalloc/lib/DSA/TopDownClosure.cpp:1.92.2.1.2.1 llvm-poolalloc/lib/DSA/TopDownClosure.cpp:1.92.2.1.2.2 --- llvm-poolalloc/lib/DSA/TopDownClosure.cpp:1.92.2.1.2.1 Wed Feb 28 11:35:33 2007 +++ llvm-poolalloc/lib/DSA/TopDownClosure.cpp Wed Mar 7 16:53:59 2007 @@ -73,7 +73,7 @@ for (DSScalarMap::global_iterator I=GGSM.global_begin(), E=GGSM.global_end(); I != E; ++I) { DSNode *N = GGSM.find(*I)->second.getNode(); - if (N->isIncomplete()) + if ((N) && (N->isIncomplete())) markReachableFunctionsExternallyAccessible(N, Visited); } From criswell at cs.uiuc.edu Wed Mar 7 17:43:05 2007 From: criswell at cs.uiuc.edu (John Criswell) Date: Wed, 7 Mar 2007 17:43:05 -0600 Subject: [llvm-commits] [see] CVS: llvm-poolalloc/lib/DSA/Local.cpp Message-ID: <200703072343.l27Nh5JJ025990@zion.cs.uiuc.edu> Changes in directory llvm-poolalloc/lib/DSA: Local.cpp updated: 1.158.2.4.2.2 -> 1.158.2.4.2.3 --- Log message: Nodes returned from llva_save_stackp() are now collapsed. Ensure that all globals with a DSNode have a MetaPool. Disabled debugging and random kernel hacks. --- Diffs of the changes: (+56 -2) Local.cpp | 58 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++-- 1 files changed, 56 insertions(+), 2 deletions(-) Index: llvm-poolalloc/lib/DSA/Local.cpp diff -u llvm-poolalloc/lib/DSA/Local.cpp:1.158.2.4.2.2 llvm-poolalloc/lib/DSA/Local.cpp:1.158.2.4.2.3 --- llvm-poolalloc/lib/DSA/Local.cpp:1.158.2.4.2.2 Wed Feb 28 11:35:32 2007 +++ llvm-poolalloc/lib/DSA/Local.cpp Wed Mar 7 17:42:43 2007 @@ -386,7 +386,7 @@ void GraphBuilder::visitGetElementPtrInst(User &GEP) { #ifdef LLVA_KERNEL -#if 1 +#if 0 int debug = 0; if (isa(GEP)) { Instruction * IGEP = (Instruction *)(&GEP); @@ -589,7 +589,7 @@ if (isPointerType(StoredTy)) Dest.addEdgeTo(getValueDest(*SI.getOperand(0))); #ifdef LLVA_KERNEL -#if 1 +#if 0 { if (SI.getParent()->getParent()->getName() == "alloc_vfsmnt") { DSNode * N = getValueDest(*SI.getOperand(1)).getNode(); @@ -1120,7 +1120,9 @@ } else { Value *actualPD = *(CS.arg_begin()); if (!isa(actualPD)) { +#if 0 std::cerr << "WARNING: Pool is not global. Function = " << CS.getCaller()->getName() << "\n"; +#endif } else { ++GlobalPools; } @@ -1183,7 +1185,9 @@ } else { Value *actualPD = *(CS.arg_begin()); if (!isa(actualPD)) { +#if 0 std::cerr << "WARNING: Pool is not global. Function = " << CS.getCaller()->getName() << "\n"; +#endif } else { ++GlobalPools; } @@ -1241,6 +1245,7 @@ N->setAllocaNodeMarker(); N->setUnknownNodeMarker(); N->setIncompleteMarker(); + N->foldNodeCompletely(); // // TODO: @@ -1248,6 +1253,7 @@ // are ignored by our analysis. // #endif +#if 0 } else if (F->getName() == "__generic_copy_from_user") { if (CS.getCaller()->getName() == "kmem_cache_alloc") return false; @@ -1260,6 +1266,7 @@ return true; #endif } +#endif return false; } @@ -1291,7 +1298,9 @@ } else { Value *actualPD = *(CS.arg_begin()); if (!isa(actualPD)) { +#if 0 std::cerr << "WARNING: Pool is not global. Function = " << CS.getCaller()->getName() << "\n"; +#endif } else { ++GlobalPools; } @@ -1377,7 +1386,9 @@ } else { Value *actualPD = *(CS.arg_begin()); if (!isa(actualPD)) { +#if 0 std::cerr << "WARNING: Pool is not global. Function = " << CS.getCaller()->getName() << "\n"; +#endif } else { ++GlobalPools; } @@ -1702,6 +1713,49 @@ DEBUG(std::cerr << "Eliminating " << ECGlobals.size() << " EC Globals!\n"); ECGlobals.clear(); +#ifdef LLVA_KERNEL + // + // Scan through all the globals; if they have a DSNode but no MetaPool, give + // them a MetaPool. + // + const Type * VoidPtrType = PointerType::get(Type::SByteTy); + for (Module::global_iterator I = M.global_begin(), E = M.global_end(); + I != E; ++I) { + // Skip functions and externally declared variables + if (!isa(I)) continue; + if (I->isExternal()) continue; + + GlobalValue * GV = I; + GlobalValue * GVL = GlobalsGraph->getScalarMap().getLeaderForGlobal(I); + DSNode *Node = GlobalsGraph->getNodeForValue(GVL).getNode(); + + // If this global happens to be a MetaPool, it will have no DSNode. + // In that case, do not assign a MetaPool. + if (!Node) continue; + + // + // Add the MetaPool for the DSNode if it does not already have one. + // + if (GlobalsGraph->getPoolDescriptorsMap().count(Node) == 0) { + Value * TheMetaPool = 0; + TheMetaPool = new GlobalVariable( + /*type=*/ VoidPtrType, + /*isConstant=*/ false, + /*Linkage=*/ GlobalValue::InternalLinkage, + /*initializer=*/ Constant::getNullValue(VoidPtrType), + /*name=*/ "_metaPool_", + /*parent=*/ &M ); + + // + // Create the internal data structure for the MetaPool and associate the + // DSNode with it. + // + MetaPoolHandle* tmpvh = new MetaPoolHandle(new MetaPool(TheMetaPool), NULL); + GlobalsGraph->getPoolDescriptorsMap()[Node] = tmpvh; + } + } +#endif + // Calculate all of the graphs... for (Module::iterator I = M.begin(), E = M.end(); I != E; ++I) if (!I->isExternal()) From evan.cheng at apple.com Wed Mar 7 18:59:35 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 7 Mar 2007 18:59:35 -0600 Subject: [llvm-commits] CVS: llvm/lib/VMCore/Constants.cpp Message-ID: <200703080059.l280xZG3027627@zion.cs.uiuc.edu> Changes in directory llvm/lib/VMCore: Constants.cpp updated: 1.226 -> 1.227 --- Log message: Added ContainsRelocations() to check if a constant might only be resolvable at load time. --- Diffs of the changes: (+11 -0) Constants.cpp | 11 +++++++++++ 1 files changed, 11 insertions(+) Index: llvm/lib/VMCore/Constants.cpp diff -u llvm/lib/VMCore/Constants.cpp:1.226 llvm/lib/VMCore/Constants.cpp:1.227 --- llvm/lib/VMCore/Constants.cpp:1.226 Thu Mar 1 13:30:34 2007 +++ llvm/lib/VMCore/Constants.cpp Wed Mar 7 18:59:12 2007 @@ -90,6 +90,17 @@ } } +/// ContaintsRelocations - Return true if the constant value contains +/// relocations which cannot be resolved at compile time. +bool Constant::ContainsRelocations() const { + if (isa(this)) + return true; + for (unsigned i = 0, e = getNumOperands(); i != e; ++i) + if (getOperand(i)->ContainsRelocations()) + return true; + return false; +} + // Static constructor to create a '0' constant of arbitrary type... Constant *Constant::getNullValue(const Type *Ty) { switch (Ty->getTypeID()) { From evan.cheng at apple.com Wed Mar 7 18:59:35 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 7 Mar 2007 18:59:35 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/Constant.h Message-ID: <200703080059.l280xZA7027626@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm: Constant.h updated: 1.34 -> 1.35 --- Log message: Added ContainsRelocations() to check if a constant might only be resolvable at load time. --- Diffs of the changes: (+4 -0) Constant.h | 4 ++++ 1 files changed, 4 insertions(+) Index: llvm/include/llvm/Constant.h diff -u llvm/include/llvm/Constant.h:1.34 llvm/include/llvm/Constant.h:1.35 --- llvm/include/llvm/Constant.h:1.34 Sun Feb 11 23:18:08 2007 +++ llvm/include/llvm/Constant.h Wed Mar 7 18:59:12 2007 @@ -59,6 +59,10 @@ /// true for things like constant expressions that could divide by zero. bool canTrap() const; + /// ContaintsRelocations - Return true if the constant value contains + /// relocations which cannot be resolved at compile time. + bool ContainsRelocations() const; + // Specialize get/setOperand for Constant's as their operands are always // constants as well. Constant *getOperand(unsigned i) { From evan.cheng at apple.com Wed Mar 7 19:00:55 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 7 Mar 2007 19:00:55 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/TargetAsmInfo.cpp Message-ID: <200703080100.l2810tf8027677@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target: TargetAsmInfo.cpp updated: 1.20 -> 1.21 --- Log message: Add ReadOnlySection directive. --- Diffs of the changes: (+1 -0) TargetAsmInfo.cpp | 1 + 1 files changed, 1 insertion(+) Index: llvm/lib/Target/TargetAsmInfo.cpp diff -u llvm/lib/Target/TargetAsmInfo.cpp:1.20 llvm/lib/Target/TargetAsmInfo.cpp:1.21 --- llvm/lib/Target/TargetAsmInfo.cpp:1.20 Tue Mar 6 20:47:57 2007 +++ llvm/lib/Target/TargetAsmInfo.cpp Wed Mar 7 19:00:38 2007 @@ -60,6 +60,7 @@ FourByteConstantSection(0), EightByteConstantSection(0), SixteenByteConstantSection(0), + ReadOnlySection(0), GlobalDirective(0), SetDirective(0), LCOMMDirective(0), From evan.cheng at apple.com Wed Mar 7 19:00:57 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 7 Mar 2007 19:00:57 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/Target/TargetAsmInfo.h Message-ID: <200703080100.l2810vsH027683@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/Target: TargetAsmInfo.h updated: 1.27 -> 1.28 --- Log message: Add ReadOnlySection directive. --- Diffs of the changes: (+9 -1) TargetAsmInfo.h | 10 +++++++++- 1 files changed, 9 insertions(+), 1 deletion(-) Index: llvm/include/llvm/Target/TargetAsmInfo.h diff -u llvm/include/llvm/Target/TargetAsmInfo.h:1.27 llvm/include/llvm/Target/TargetAsmInfo.h:1.28 --- llvm/include/llvm/Target/TargetAsmInfo.h:1.27 Tue Mar 6 20:47:57 2007 +++ llvm/include/llvm/Target/TargetAsmInfo.h Wed Mar 7 19:00:38 2007 @@ -203,7 +203,12 @@ const char *FourByteConstantSection; const char *EightByteConstantSection; const char *SixteenByteConstantSection; - + + /// ReadOnlySection - This is the directive that is emitted to switch to a + /// read-only section for constant data (e.g. data declared const, + /// jump tables). + const char *ReadOnlySection; // Defaults to NULL + //===--- Global Variable Emission Directives --------------------------===// /// GlobalDirective - This is the directive used to declare a global entity. @@ -474,6 +479,9 @@ const char *getSixteenByteConstantSection() const { return SixteenByteConstantSection; } + const char *getReadOnlySection() const { + return ReadOnlySection; + } const char *getGlobalDirective() const { return GlobalDirective; } From evan.cheng at apple.com Wed Mar 7 19:07:24 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 7 Mar 2007 19:07:24 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86AsmPrinter.cpp X86TargetAsmInfo.cpp Message-ID: <200703080107.l2817O7d027811@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: X86AsmPrinter.cpp updated: 1.235 -> 1.236 X86TargetAsmInfo.cpp updated: 1.33 -> 1.34 --- Log message: Put constant data to .const, .const_data, .literal{4|8|16} sections. --- Diffs of the changes: (+25 -2) X86AsmPrinter.cpp | 25 +++++++++++++++++++++++-- X86TargetAsmInfo.cpp | 2 ++ 2 files changed, 25 insertions(+), 2 deletions(-) Index: llvm/lib/Target/X86/X86AsmPrinter.cpp diff -u llvm/lib/Target/X86/X86AsmPrinter.cpp:1.235 llvm/lib/Target/X86/X86AsmPrinter.cpp:1.236 --- llvm/lib/Target/X86/X86AsmPrinter.cpp:1.235 Thu Mar 1 10:29:22 2007 +++ llvm/lib/Target/X86/X86AsmPrinter.cpp Wed Mar 7 19:07:07 2007 @@ -145,7 +145,8 @@ std::string name = Mang->getValueName(I); Constant *C = I->getInitializer(); - unsigned Size = TD->getTypeSize(C->getType()); + const Type *Type = C->getType(); + unsigned Size = TD->getTypeSize(Type); unsigned Align = TD->getPreferredAlignmentLog(I); if (I->hasHiddenVisibility()) @@ -250,8 +251,28 @@ } else { if (C->isNullValue() && !NoZerosInBSS && TAI->getBSSSection()) SwitchToDataSection(TAI->getBSSSection(), I); - else + else if (!I->isConstant()) SwitchToDataSection(TAI->getDataSection(), I); + else { + // Read-only data. + bool isIntFPLiteral = Type->isInteger() || Type->isFloatingPoint(); + if (C->ContainsRelocations() && Subtarget->isTargetDarwin() && + TM.getRelocationModel() != Reloc::Static) + SwitchToDataSection("\t.const_data\n"); + else if (isIntFPLiteral && Size == 4 && + TAI->getFourByteConstantSection()) + SwitchToDataSection(TAI->getFourByteConstantSection(), I); + else if (isIntFPLiteral && Size == 8 && + TAI->getEightByteConstantSection()) + SwitchToDataSection(TAI->getEightByteConstantSection(), I); + else if (isIntFPLiteral && Size == 16 && + TAI->getSixteenByteConstantSection()) + SwitchToDataSection(TAI->getSixteenByteConstantSection(), I); + else if (TAI->getReadOnlySection()) + SwitchToDataSection(TAI->getReadOnlySection(), I); + else + SwitchToDataSection(TAI->getDataSection(), I); + } } break; Index: llvm/lib/Target/X86/X86TargetAsmInfo.cpp diff -u llvm/lib/Target/X86/X86TargetAsmInfo.cpp:1.33 llvm/lib/Target/X86/X86TargetAsmInfo.cpp:1.34 --- llvm/lib/Target/X86/X86TargetAsmInfo.cpp:1.33 Tue Mar 6 20:47:57 2007 +++ llvm/lib/Target/X86/X86TargetAsmInfo.cpp Wed Mar 7 19:07:07 2007 @@ -56,6 +56,7 @@ EightByteConstantSection = "\t.literal8\n"; if (Subtarget->is64Bit()) SixteenByteConstantSection = "\t.literal16\n"; + ReadOnlySection = "\t.const\n"; LCOMMDirective = "\t.lcomm\t"; COMMDirectiveTakesAlignment = false; HasDotTypeDotSizeDirective = false; @@ -103,6 +104,7 @@ // bool HasDotLoc; // Defaults to false. // HasDotFile - True if target asm supports .file directives. // bool HasDotFile; // Defaults to false. + ReadOnlySection = "\t.section\t.rodata\n"; PrivateGlobalPrefix = ".L"; WeakRefDirective = "\t.weak\t"; DwarfRequiresFrameSection = false; From evan.cheng at apple.com Wed Mar 7 19:25:47 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 7 Mar 2007 19:25:47 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp ARMTargetAsmInfo.cpp Message-ID: <200703080125.l281PlbK028136@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/ARM: ARMAsmPrinter.cpp updated: 1.58 -> 1.59 ARMTargetAsmInfo.cpp updated: 1.12 -> 1.13 --- Log message: For Darwin, put constant data into .const, .const_data, .literal{4|8|16} sections. --- Diffs of the changes: (+26 -2) ARMAsmPrinter.cpp | 25 +++++++++++++++++++++++-- ARMTargetAsmInfo.cpp | 3 +++ 2 files changed, 26 insertions(+), 2 deletions(-) Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.58 llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.59 --- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.58 Thu Mar 1 00:05:39 2007 +++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Wed Mar 7 19:25:25 2007 @@ -743,7 +743,8 @@ std::string name = Mang->getValueName(I); Constant *C = I->getInitializer(); - unsigned Size = TD->getTypeSize(C->getType()); + const Type *Type = C->getType(); + unsigned Size = TD->getTypeSize(Type); unsigned Align = TD->getPreferredAlignmentLog(I); if (I->hasHiddenVisibility()) @@ -829,8 +830,28 @@ } else { if (C->isNullValue() && !NoZerosInBSS && TAI->getBSSSection()) SwitchToDataSection(TAI->getBSSSection(), I); - else + else if (!I->isConstant()) SwitchToDataSection(TAI->getDataSection(), I); + else { + // Read-only data. + bool isIntFPLiteral = Type->isInteger() || Type->isFloatingPoint(); + if (C->ContainsRelocations() && Subtarget->isTargetDarwin() && + TM.getRelocationModel() != Reloc::Static) + SwitchToDataSection("\t.const_data\n"); + else if (isIntFPLiteral && Size == 4 && + TAI->getFourByteConstantSection()) + SwitchToDataSection(TAI->getFourByteConstantSection(), I); + else if (isIntFPLiteral && Size == 8 && + TAI->getEightByteConstantSection()) + SwitchToDataSection(TAI->getEightByteConstantSection(), I); + else if (isIntFPLiteral && Size == 16 && + TAI->getSixteenByteConstantSection()) + SwitchToDataSection(TAI->getSixteenByteConstantSection(), I); + else if (TAI->getReadOnlySection()) + SwitchToDataSection(TAI->getReadOnlySection(), I); + else + SwitchToDataSection(TAI->getDataSection(), I); + } } break; Index: llvm/lib/Target/ARM/ARMTargetAsmInfo.cpp diff -u llvm/lib/Target/ARM/ARMTargetAsmInfo.cpp:1.12 llvm/lib/Target/ARM/ARMTargetAsmInfo.cpp:1.13 --- llvm/lib/Target/ARM/ARMTargetAsmInfo.cpp:1.12 Mon Mar 5 11:59:58 2007 +++ llvm/lib/Target/ARM/ARMTargetAsmInfo.cpp Wed Mar 7 19:25:25 2007 @@ -27,6 +27,9 @@ HiddenDirective = "\t.private_extern\t"; JumpTableDataSection = ".const"; CStringSection = "\t.cstring"; + FourByteConstantSection = "\t.literal4\n"; + EightByteConstantSection = "\t.literal8\n"; + ReadOnlySection = "\t.const\n"; HasDotTypeDotSizeDirective = false; if (TM.getRelocationModel() == Reloc::Static) { StaticCtorsSection = ".constructor"; From evan.cheng at apple.com Wed Mar 7 19:25:47 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 7 Mar 2007 19:25:47 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp PPCTargetAsmInfo.cpp Message-ID: <200703080125.l281Plb4028143@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/PowerPC: PPCAsmPrinter.cpp updated: 1.235 -> 1.236 PPCTargetAsmInfo.cpp updated: 1.18 -> 1.19 --- Log message: For Darwin, put constant data into .const, .const_data, .literal{4|8|16} sections. --- Diffs of the changes: (+27 -2) PPCAsmPrinter.cpp | 26 ++++++++++++++++++++++++-- PPCTargetAsmInfo.cpp | 3 +++ 2 files changed, 27 insertions(+), 2 deletions(-) Index: llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp diff -u llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.235 llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.236 --- llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.235 Fri Mar 2 23:29:51 2007 +++ llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp Wed Mar 7 19:25:25 2007 @@ -893,7 +893,8 @@ O << Directive << name << "\n"; Constant *C = I->getInitializer(); - unsigned Size = TD->getTypeSize(C->getType()); + const Type *Type = C->getType(); + unsigned Size = TD->getTypeSize(Type); unsigned Align = TD->getPreferredAlignmentLog(I); if (C->isNullValue() && /* FIXME: Verify correct */ @@ -937,7 +938,28 @@ } } - SwitchToDataSection("\t.data", I); + if (!I->isConstant()) + SwitchToDataSection(TAI->getDataSection(), I); + else { + // Read-only data. + bool isIntFPLiteral = Type->isInteger() || Type->isFloatingPoint(); + if (C->ContainsRelocations() && + TM.getRelocationModel() != Reloc::Static) + SwitchToDataSection("\t.const_data\n"); + else if (isIntFPLiteral && Size == 4 && + TAI->getFourByteConstantSection()) + SwitchToDataSection(TAI->getFourByteConstantSection(), I); + else if (isIntFPLiteral && Size == 8 && + TAI->getEightByteConstantSection()) + SwitchToDataSection(TAI->getEightByteConstantSection(), I); + else if (isIntFPLiteral && Size == 16 && + TAI->getSixteenByteConstantSection()) + SwitchToDataSection(TAI->getSixteenByteConstantSection(), I); + else if (TAI->getReadOnlySection()) + SwitchToDataSection(TAI->getReadOnlySection(), I); + else + SwitchToDataSection(TAI->getDataSection(), I); + } break; default: cerr << "Unknown linkage type!"; Index: llvm/lib/Target/PowerPC/PPCTargetAsmInfo.cpp diff -u llvm/lib/Target/PowerPC/PPCTargetAsmInfo.cpp:1.18 llvm/lib/Target/PowerPC/PPCTargetAsmInfo.cpp:1.19 --- llvm/lib/Target/PowerPC/PPCTargetAsmInfo.cpp:1.18 Wed Feb 21 16:43:40 2007 +++ llvm/lib/Target/PowerPC/PPCTargetAsmInfo.cpp Wed Mar 7 19:25:25 2007 @@ -57,6 +57,9 @@ JumpTableDataSection = ".const"; GlobalDirective = "\t.globl\t"; CStringSection = "\t.cstring"; + FourByteConstantSection = "\t.literal4\n"; + EightByteConstantSection = "\t.literal8\n"; + ReadOnlySection = "\t.const\n"; if (TM.getRelocationModel() == Reloc::Static) { StaticCtorsSection = ".constructor"; StaticDtorsSection = ".destructor"; From reid at x10sys.com Wed Mar 7 19:46:56 2007 From: reid at x10sys.com (Reid Spencer) Date: Wed, 7 Mar 2007 19:46:56 -0600 Subject: [llvm-commits] CVS: llvm/lib/Transforms/Scalar/InstructionCombining.cpp Message-ID: <200703080146.l281kuhh028510@zion.cs.uiuc.edu> Changes in directory llvm/lib/Transforms/Scalar: InstructionCombining.cpp updated: 1.648 -> 1.649 --- Log message: For PR1205: http://llvm.org/PR1205 : Add a new ComputeMaskedBits function that is APIntified. We'll slowly convert things over to use this version. When its all done, we'll remove the existing version. --- Diffs of the changes: (+206 -1) InstructionCombining.cpp | 207 ++++++++++++++++++++++++++++++++++++++++++++++- 1 files changed, 206 insertions(+), 1 deletion(-) Index: llvm/lib/Transforms/Scalar/InstructionCombining.cpp diff -u llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.648 llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.649 --- llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.648 Mon Mar 5 17:36:13 2007 +++ llvm/lib/Transforms/Scalar/InstructionCombining.cpp Wed Mar 7 19:46:38 2007 @@ -568,9 +568,214 @@ /// ComputeMaskedBits - Determine which of the bits specified in Mask are /// known to be either zero or one and return them in the KnownZero/KnownOne +/// bit sets. This code only analyzes bits in Mask, in order to short-circuit +/// processing. +/// NOTE: we cannot consider 'undef' to be "IsZero" here. The problem is that +/// we cannot optimize based on the assumption that it is zero without changing +/// it to be an explicit zero. If we don't change it to zero, other code could +/// optimized based on the contradictory assumption that it is non-zero. +/// Because instcombine aggressively folds operations with undef args anyway, +/// this won't lose us code quality. +static void ComputeMaskedBits(Value *V, APInt Mask, APInt& KnownZero, + APInt& KnownOne, unsigned Depth = 0) { + uint32_t BitWidth = Mask.getBitWidth(); + assert(KnownZero.getBitWidth() == BitWidth && + KnownOne.getBitWidth() == BitWidth && + "Mask, KnownOne and KnownZero should have same BitWidth"); + if (ConstantInt *CI = dyn_cast(V)) { + // We know all of the bits for a constant! + APInt Tmp(CI->getValue()); + Tmp.zextOrTrunc(BitWidth); + KnownOne = Tmp & Mask; + KnownZero = ~KnownOne & Mask; + return; + } + + KnownZero.clear(); KnownOne.clear(); // Don't know anything. + if (Depth == 6 || Mask == 0) + return; // Limit search depth. + + Instruction *I = dyn_cast(V); + if (!I) return; + + APInt KnownZero2(KnownZero), KnownOne2(KnownOne); + Mask &= APInt::getAllOnesValue( + cast(V->getType())->getBitWidth()).zextOrTrunc(BitWidth); + + switch (I->getOpcode()) { + case Instruction::And: + // If either the LHS or the RHS are Zero, the result is zero. + ComputeMaskedBits(I->getOperand(1), Mask, KnownZero, KnownOne, Depth+1); + Mask &= ~KnownZero; + ComputeMaskedBits(I->getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1); + assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); + assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); + + // Output known-1 bits are only known if set in both the LHS & RHS. + KnownOne &= KnownOne2; + // Output known-0 are known to be clear if zero in either the LHS | RHS. + KnownZero |= KnownZero2; + return; + case Instruction::Or: + ComputeMaskedBits(I->getOperand(1), Mask, KnownZero, KnownOne, Depth+1); + Mask &= ~KnownOne; + ComputeMaskedBits(I->getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1); + assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); + assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); + + // Output known-0 bits are only known if clear in both the LHS & RHS. + KnownZero &= KnownZero2; + // Output known-1 are known to be set if set in either the LHS | RHS. + KnownOne |= KnownOne2; + return; + case Instruction::Xor: { + ComputeMaskedBits(I->getOperand(1), Mask, KnownZero, KnownOne, Depth+1); + ComputeMaskedBits(I->getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1); + assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); + assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); + + // Output known-0 bits are known if clear or set in both the LHS & RHS. + APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2); + // Output known-1 are known to be set if set in only one of the LHS, RHS. + KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2); + KnownZero = KnownZeroOut; + return; + } + case Instruction::Select: + ComputeMaskedBits(I->getOperand(2), Mask, KnownZero, KnownOne, Depth+1); + ComputeMaskedBits(I->getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1); + assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); + assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); + + // Only known if known in both the LHS and RHS. + KnownOne &= KnownOne2; + KnownZero &= KnownZero2; + return; + case Instruction::FPTrunc: + case Instruction::FPExt: + case Instruction::FPToUI: + case Instruction::FPToSI: + case Instruction::SIToFP: + case Instruction::PtrToInt: + case Instruction::UIToFP: + case Instruction::IntToPtr: + return; // Can't work with floating point or pointers + case Instruction::Trunc: + // All these have integer operands + ComputeMaskedBits(I->getOperand(0), Mask, KnownZero, KnownOne, Depth+1); + return; + case Instruction::BitCast: { + const Type *SrcTy = I->getOperand(0)->getType(); + if (SrcTy->isInteger()) { + ComputeMaskedBits(I->getOperand(0), Mask, KnownZero, KnownOne, Depth+1); + return; + } + break; + } + case Instruction::ZExt: { + // Compute the bits in the result that are not present in the input. + const IntegerType *SrcTy = cast(I->getOperand(0)->getType()); + APInt NotIn(~SrcTy->getMask()); + APInt NewBits = APInt::getAllOnesValue(BitWidth) & + NotIn.zext(BitWidth); + + Mask &= ~NotIn; + ComputeMaskedBits(I->getOperand(0), Mask, KnownZero, KnownOne, Depth+1); + assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); + // The top bits are known to be zero. + KnownZero |= NewBits; + return; + } + case Instruction::SExt: { + // Compute the bits in the result that are not present in the input. + const IntegerType *SrcTy = cast(I->getOperand(0)->getType()); + APInt NotIn(~SrcTy->getMask()); + APInt NewBits = APInt::getAllOnesValue(BitWidth) & + NotIn.zext(BitWidth); + + Mask &= ~NotIn; + ComputeMaskedBits(I->getOperand(0), Mask, KnownZero, KnownOne, Depth+1); + assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); + + // If the sign bit of the input is known set or clear, then we know the + // top bits of the result. + APInt InSignBit(APInt::getSignedMinValue(SrcTy->getBitWidth())); + InSignBit.zextOrTrunc(BitWidth); + if ((KnownZero & InSignBit) != 0) { // Input sign bit known zero + KnownZero |= NewBits; + KnownOne &= ~NewBits; + } else if ((KnownOne & InSignBit) != 0) { // Input sign bit known set + KnownOne |= NewBits; + KnownZero &= ~NewBits; + } else { // Input sign bit unknown + KnownZero &= ~NewBits; + KnownOne &= ~NewBits; + } + return; + } + case Instruction::Shl: + // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0 + if (ConstantInt *SA = dyn_cast(I->getOperand(1))) { + uint64_t ShiftAmt = SA->getZExtValue(); + Mask = APIntOps::lshr(Mask, ShiftAmt); + ComputeMaskedBits(I->getOperand(0), Mask, KnownZero, KnownOne, Depth+1); + assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); + KnownZero = APIntOps::shl(KnownZero, ShiftAmt); + KnownOne = APIntOps::shl(KnownOne, ShiftAmt); + KnownZero |= APInt(BitWidth, 1ULL).shl(ShiftAmt)-1; // low bits known zero. + return; + } + break; + case Instruction::LShr: + // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0 + if (ConstantInt *SA = dyn_cast(I->getOperand(1))) { + // Compute the new bits that are at the top now. + uint64_t ShiftAmt = SA->getZExtValue(); + APInt HighBits(APInt::getAllOnesValue(BitWidth).shl(BitWidth-ShiftAmt)); + + // Unsigned shift right. + Mask = APIntOps::shl(Mask, ShiftAmt); + ComputeMaskedBits(I->getOperand(0), Mask, KnownZero,KnownOne,Depth+1); + assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); + KnownZero = APIntOps::lshr(KnownZero, ShiftAmt); + KnownOne = APIntOps::lshr(KnownOne, ShiftAmt); + KnownZero |= HighBits; // high bits known zero. + return; + } + break; + case Instruction::AShr: + // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0 + if (ConstantInt *SA = dyn_cast(I->getOperand(1))) { + // Compute the new bits that are at the top now. + uint64_t ShiftAmt = SA->getZExtValue(); + APInt HighBits(APInt::getAllOnesValue(BitWidth).shl(BitWidth-ShiftAmt)); + + // Signed shift right. + Mask = APIntOps::shl(Mask, ShiftAmt); + ComputeMaskedBits(I->getOperand(0), Mask, KnownZero,KnownOne,Depth+1); + assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); + KnownZero = APIntOps::lshr(KnownZero, ShiftAmt); + KnownOne = APIntOps::lshr(KnownOne, ShiftAmt); + + // Handle the sign bits and adjust to where it is now in the mask. + APInt SignBit = APInt::getSignedMinValue(BitWidth).lshr(ShiftAmt); + + if ((KnownZero & SignBit) != 0) { // New bits are known zero. + KnownZero |= HighBits; + } else if ((KnownOne & SignBit) != 0) { // New bits are known one. + KnownOne |= HighBits; + } + return; + } + break; + } +} + +/// ComputeMaskedBits - Determine which of the bits specified in Mask are +/// known to be either zero or one and return them in the KnownZero/KnownOne /// bitsets. This code only analyzes bits in Mask, in order to short-circuit /// processing. -static void ComputeMaskedBits(Value *V, uint64_t Mask, uint64_t &KnownZero, +static void ComputeMaskedBits(Value *V, uint64_t Mask, uint64_t &KnownZero, uint64_t &KnownOne, unsigned Depth = 0) { // Note, we cannot consider 'undef' to be "IsZero" here. The problem is that // we cannot optimize based on the assumption that it is zero without changing From reid at x10sys.com Wed Mar 7 19:53:15 2007 From: reid at x10sys.com (Reid Spencer) Date: Wed, 7 Mar 2007 19:53:15 -0600 Subject: [llvm-commits] CVS: llvm/lib/Transforms/Scalar/InstructionCombining.cpp Message-ID: <200703080153.l281rFYS028622@zion.cs.uiuc.edu> Changes in directory llvm/lib/Transforms/Scalar: InstructionCombining.cpp updated: 1.649 -> 1.650 --- Log message: For PR1205: http://llvm.org/PR1205 : Provide an APIntified version of MaskedValueIsZero. This will (temporarily) cause a "defined but not used" message from the compiler. It will be used in the next patch in this series. Patch by Sheng Zhou. --- Diffs of the changes: (+10 -0) InstructionCombining.cpp | 10 ++++++++++ 1 files changed, 10 insertions(+) Index: llvm/lib/Transforms/Scalar/InstructionCombining.cpp diff -u llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.649 llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.650 --- llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.649 Wed Mar 7 19:46:38 2007 +++ llvm/lib/Transforms/Scalar/InstructionCombining.cpp Wed Mar 7 19:52:58 2007 @@ -979,6 +979,16 @@ return (KnownZero & Mask) == Mask; } +/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use +/// this predicate to simplify operations downstream. Mask is known to be zero +/// for bits that V cannot have. +static bool MaskedValueIsZero(Value *V, const APInt& Mask, unsigned Depth = 0) { + APInt KnownZero(Mask), KnownOne(Mask); + ComputeMaskedBits(V, Mask, KnownZero, KnownOne, Depth); + assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); + return (KnownZero & Mask) == Mask; +} + /// ShrinkDemandedConstant - Check to see if the specified operand of the /// specified instruction is a constant integer. If so, check to see if there /// are any bits set in the constant that are not demanded. If so, shrink the From evan.cheng at apple.com Wed Mar 7 20:55:25 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 7 Mar 2007 20:55:25 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp Message-ID: <200703080255.l282tPYJ029800@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/ARM: ARMLoadStoreOptimizer.cpp updated: 1.5 -> 1.6 --- Log message: Bug fix. Not advancing the register scavenger iterator correctly. --- Diffs of the changes: (+21 -8) ARMLoadStoreOptimizer.cpp | 29 +++++++++++++++++++++-------- 1 files changed, 21 insertions(+), 8 deletions(-) Index: llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp diff -u llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp:1.5 llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp:1.6 --- llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp:1.5 Wed Mar 7 14:30:36 2007 +++ llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp Wed Mar 7 20:55:08 2007 @@ -42,7 +42,6 @@ const MRegisterInfo *MRI; ARMFunctionInfo *AFI; RegScavenger *RS; - MachineBasicBlock::iterator RSI; virtual bool runOnMachineFunction(MachineFunction &Fn); @@ -67,6 +66,7 @@ int Opcode, unsigned Size, unsigned Scratch, MemOpQueue &MemOps); + void AdvanceRS(MachineBasicBlock &MBB, MemOpQueue &MemOps); bool LoadStoreMultipleOpti(MachineBasicBlock &MBB); bool MergeReturnIntoLDM(MachineBasicBlock &MBB); }; @@ -492,6 +492,22 @@ return false; } +/// AdvanceRS - Advance register scavenger to just before the earliest memory +/// op that is being merged. +void ARMLoadStoreOpt::AdvanceRS(MachineBasicBlock &MBB, MemOpQueue &MemOps) { + MachineBasicBlock::iterator Loc = MemOps[0].MBBI; + unsigned Position = MemOps[0].Position; + for (unsigned i = 1, e = MemOps.size(); i != e; ++i) { + if (MemOps[i].Position < Position) { + Position = MemOps[i].Position; + Loc = MemOps[i].MBBI; + } + } + + if (Loc != MBB.begin()) + RS->forward(prior(Loc)); +} + /// LoadStoreMultipleOpti - An optimization pass to turn multiple LDR / STR /// ops of the same base and incrementing offset into LDM / STM ops. bool ARMLoadStoreOpt::LoadStoreMultipleOpti(MachineBasicBlock &MBB) { @@ -504,7 +520,6 @@ unsigned Position = 0; RS->enterBasicBlock(&MBB); - RSI = MBB.begin(); MachineBasicBlock::iterator MBBI = MBB.begin(), E = MBB.end(); while (MBBI != E) { bool Advance = false; @@ -585,15 +600,14 @@ if (TryMerge) { if (NumMemOps > 1) { // Try to find a free register to use as a new base in case it's needed. - unsigned Scratch = ARM::R12; // First advance to the instruction just before the start of the chain. - if (RSI != MBB.begin()) - RS->forward(prior(RSI)); + AdvanceRS(MBB, MemOps); // Find a scratch register. Make sure it's a call clobbered register or // a spilled callee-saved register. - Scratch = RS->FindUnusedReg(&ARM::GPRRegClass, true); + unsigned Scratch = RS->FindUnusedReg(&ARM::GPRRegClass, true); if (!Scratch) - RS->FindUnusedReg(&ARM::GPRRegClass, AFI->getSpilledCSRegisters()); + Scratch = RS->FindUnusedReg(&ARM::GPRRegClass, + AFI->getSpilledCSRegisters()); // Process the load / store instructions. RS->forward(prior(MBBI)); @@ -617,7 +631,6 @@ // RS may be pointing to an instruction that's deleted. RS->skipTo(prior(MBBI)); - RSI = MBBI; } CurrBase = 0; From evan.cheng at apple.com Wed Mar 7 20:56:57 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 7 Mar 2007 20:56:57 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/ARM/ARMRegisterInfo.td Message-ID: <200703080256.l282uv1d029995@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/ARM: ARMRegisterInfo.td updated: 1.14 -> 1.15 --- Log message: Change register allocation order to Dale's suggestion. --- Diffs of the changes: (+18 -14) ARMRegisterInfo.td | 32 ++++++++++++++++++-------------- 1 files changed, 18 insertions(+), 14 deletions(-) Index: llvm/lib/Target/ARM/ARMRegisterInfo.td diff -u llvm/lib/Target/ARM/ARMRegisterInfo.td:1.14 llvm/lib/Target/ARM/ARMRegisterInfo.td:1.15 --- llvm/lib/Target/ARM/ARMRegisterInfo.td:1.14 Tue Mar 6 20:46:23 2007 +++ llvm/lib/Target/ARM/ARMRegisterInfo.td Wed Mar 7 20:56:40 2007 @@ -99,30 +99,34 @@ // generate large stack offset. Make it available once we have register // scavenging. Similarly r3 is reserved in Thumb mode for now. let MethodBodies = [{ - // FP is R11, R9 is available, R12 is available. + // FP is R11, R9 is available. static const unsigned ARM_GPR_AO_1[] = { ARM::R3, ARM::R2, ARM::R1, ARM::R0, + ARM::R12,ARM::LR, ARM::R4, ARM::R5, ARM::R6, ARM::R7, - ARM::R8, ARM::R9, ARM::R10,ARM::R12, - ARM::LR, ARM::R11 }; - // FP is R11, R9 is not available, R12 is available. + ARM::R8, ARM::R9, ARM::R10, + ARM::R11 }; + // FP is R11, R9 is not available. static const unsigned ARM_GPR_AO_2[] = { ARM::R3, ARM::R2, ARM::R1, ARM::R0, + ARM::R12,ARM::LR, ARM::R4, ARM::R5, ARM::R6, ARM::R7, - ARM::R8, ARM::R10,ARM::R12, - ARM::LR, ARM::R11 }; - // FP is R7, R9 is available, R12 is available. + ARM::R8, ARM::R10, + ARM::R11 }; + // FP is R7, R9 is available. static const unsigned ARM_GPR_AO_3[] = { ARM::R3, ARM::R2, ARM::R1, ARM::R0, - ARM::R4, ARM::R5, ARM::R6, ARM::R8, - ARM::R9, ARM::R10,ARM::R11,ARM::R12, - ARM::LR, ARM::R7 }; - // FP is R7, R9 is not available, R12 is available. + ARM::R12,ARM::LR, + ARM::R4, ARM::R5, ARM::R6, + ARM::R8, ARM::R9, ARM::R10,ARM::R11, + ARM::R7 }; + // FP is R7, R9 is not available. static const unsigned ARM_GPR_AO_4[] = { ARM::R3, ARM::R2, ARM::R1, ARM::R0, - ARM::R4, ARM::R5, ARM::R6, ARM::R8, - ARM::R10,ARM::R11,ARM::R12, - ARM::LR, ARM::R7 }; + ARM::R12,ARM::LR, + ARM::R4, ARM::R5, ARM::R6, + ARM::R8, ARM::R10,ARM::R11, + ARM::R7 }; // FP is R7, only low registers available. static const unsigned THUMB_GPR_AO[] = { From clattner at apple.com Wed Mar 7 23:15:58 2007 From: clattner at apple.com (Chris Lattner) Date: Wed, 7 Mar 2007 21:15:58 -0800 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86AsmPrinter.cpp X86TargetAsmInfo.cpp In-Reply-To: <200703080107.l2817O7d027811@zion.cs.uiuc.edu> References: <200703080107.l2817O7d027811@zion.cs.uiuc.edu> Message-ID: <6D34F439-A0AE-4ACF-BC26-BDFC632A1861@apple.com> > + // Read-only data. > + bool isIntFPLiteral = Type->isInteger() || Type- > >isFloatingPoint(); > + if (C->ContainsRelocations() && Subtarget->isTargetDarwin > () && > + TM.getRelocationModel() != Reloc::Static) Please rearrange this to: if (isdarwin && not static && containsrelocations) putting the expensive check last. > + SwitchToDataSection("\t.const_data\n"); > + else if (isIntFPLiteral && Size == 4 && > + TAI->getFourByteConstantSection()) > + SwitchToDataSection(TAI->getFourByteConstantSection(), > I); > + else if (isIntFPLiteral && Size == 8 && > + TAI->getEightByteConstantSection()) > + SwitchToDataSection(TAI->getEightByteConstantSection > (), I); > + else if (isIntFPLiteral && Size == 16 && > + TAI->getSixteenByteConstantSection()) > + SwitchToDataSection(TAI->getSixteenByteConstantSection > (), I); Do we really need to check isIntFPLiteral here? Why can't something like {short,short} go in literal4 ? -Chris From zhousheng00 at gmail.com Wed Mar 7 23:42:17 2007 From: zhousheng00 at gmail.com (Zhou Sheng) Date: Wed, 7 Mar 2007 23:42:17 -0600 Subject: [llvm-commits] CVS: llvm/lib/Transforms/Scalar/InstructionCombining.cpp Message-ID: <200703080542.l285gH9N001101@zion.cs.uiuc.edu> Changes in directory llvm/lib/Transforms/Scalar: InstructionCombining.cpp updated: 1.650 -> 1.651 --- Log message: Fix a bug in APIntified ComputeMaskedBits(). --- Diffs of the changes: (+4 -8) InstructionCombining.cpp | 12 ++++-------- 1 files changed, 4 insertions(+), 8 deletions(-) Index: llvm/lib/Transforms/Scalar/InstructionCombining.cpp diff -u llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.650 llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.651 --- llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.650 Wed Mar 7 19:52:58 2007 +++ llvm/lib/Transforms/Scalar/InstructionCombining.cpp Wed Mar 7 23:42:00 2007 @@ -675,11 +675,9 @@ case Instruction::ZExt: { // Compute the bits in the result that are not present in the input. const IntegerType *SrcTy = cast(I->getOperand(0)->getType()); - APInt NotIn(~SrcTy->getMask()); - APInt NewBits = APInt::getAllOnesValue(BitWidth) & - NotIn.zext(BitWidth); + APInt NewBits(APInt::getAllOnesValue(BitWidth).shl(SrcTy->getBitWidth())); - Mask &= ~NotIn; + Mask &= SrcTy->getMask().zext(BitWidth); ComputeMaskedBits(I->getOperand(0), Mask, KnownZero, KnownOne, Depth+1); assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); // The top bits are known to be zero. @@ -689,11 +687,9 @@ case Instruction::SExt: { // Compute the bits in the result that are not present in the input. const IntegerType *SrcTy = cast(I->getOperand(0)->getType()); - APInt NotIn(~SrcTy->getMask()); - APInt NewBits = APInt::getAllOnesValue(BitWidth) & - NotIn.zext(BitWidth); + APInt NewBits(APInt::getAllOnesValue(BitWidth).shl(SrcTy->getBitWidth())); - Mask &= ~NotIn; + Mask &= SrcTy->getMask().zext(BitWidth); ComputeMaskedBits(I->getOperand(0), Mask, KnownZero, KnownOne, Depth+1); assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); From sabre at nondot.org Thu Mar 8 00:37:11 2007 From: sabre at nondot.org (Chris Lattner) Date: Thu, 8 Mar 2007 00:37:11 -0600 Subject: [llvm-commits] CVS: llvm/lib/Transforms/Scalar/ScalarReplAggregates.cpp Message-ID: <200703080637.l286bBtc002022@zion.cs.uiuc.edu> Changes in directory llvm/lib/Transforms/Scalar: ScalarReplAggregates.cpp updated: 1.76 -> 1.77 --- Log message: Second half of PR1226: http://llvm.org/PR1226 . This is currently still disabled, until I have a chance to do the correctness/performance analysis testing. --- Diffs of the changes: (+67 -9) ScalarReplAggregates.cpp | 76 +++++++++++++++++++++++++++++++++++++++++------ 1 files changed, 67 insertions(+), 9 deletions(-) Index: llvm/lib/Transforms/Scalar/ScalarReplAggregates.cpp diff -u llvm/lib/Transforms/Scalar/ScalarReplAggregates.cpp:1.76 llvm/lib/Transforms/Scalar/ScalarReplAggregates.cpp:1.77 --- llvm/lib/Transforms/Scalar/ScalarReplAggregates.cpp:1.76 Mon Mar 5 01:52:57 2007 +++ llvm/lib/Transforms/Scalar/ScalarReplAggregates.cpp Thu Mar 8 00:36:54 2007 @@ -460,20 +460,77 @@ ConstantInt::get(Type::Int32Ty, i), OtherPtr->getNameStr()+"."+utostr(i), MI); - if (OtherElt->getType() != BytePtrTy) - OtherElt = new BitCastInst(OtherElt, BytePtrTy,OtherElt->getNameStr(), - MI); } Value *EltPtr = NewElts[i]; - unsigned EltSize = - TD.getTypeSize(cast(EltPtr->getType())->getElementType()); + const Type *EltTy =cast(EltPtr->getType())->getElementType(); + + // If we got down to a scalar, insert a load or store as appropriate. + if (EltTy->isFirstClassType()) { + if (isa(MI) || isa(MI)) { + Value *Elt = new LoadInst(SROADest ? OtherElt : EltPtr, "tmp", + MI); + new StoreInst(Elt, SROADest ? EltPtr : OtherElt, MI); + continue; + } else { + assert(isa(MI)); + + // If the stored element is zero (common case), just store a null + // constant. + Constant *StoreVal; + if (ConstantInt *CI = dyn_cast(MI->getOperand(2))) { + if (CI->isZero()) { + StoreVal = Constant::getNullValue(EltTy); // 0.0, null, 0, <0,0> + } else { + // If EltTy is a packed type, get the element type. + const Type *ValTy = EltTy; + if (const VectorType *VTy = dyn_cast(ValTy)) + ValTy = VTy->getElementType(); + + // Construct an integer with the right value. + unsigned EltSize = TD.getTypeSize(ValTy); + APInt OneVal(EltSize*8, CI->getZExtValue()); + APInt TotalVal(OneVal); + // Set each byte. + for (unsigned i = 0; i != EltSize-1; ++i) { + TotalVal = TotalVal.shl(8); + TotalVal |= OneVal; + } + + // Convert the integer value to the appropriate type. + StoreVal = ConstantInt::get(TotalVal); + if (isa(ValTy)) + StoreVal = ConstantExpr::getIntToPtr(StoreVal, ValTy); + else if (ValTy->isFloatingPoint()) + StoreVal = ConstantExpr::getBitCast(StoreVal, ValTy); + assert(StoreVal->getType() == ValTy && "Type mismatch!"); + + // If the requested value was a vector constant, create it. + if (EltTy != ValTy) { + unsigned NumElts = cast(ValTy)->getNumElements(); + SmallVector Elts(NumElts, StoreVal); + StoreVal = ConstantVector::get(&Elts[0], NumElts); + } + } + new StoreInst(StoreVal, EltPtr, MI); + continue; + } + // Otherwise, if we're storing a byte variable, use a memset call for + // this element. + } + } // Cast the element pointer to BytePtrTy. if (EltPtr->getType() != BytePtrTy) EltPtr = new BitCastInst(EltPtr, BytePtrTy, EltPtr->getNameStr(), MI); - - + + // Cast the other pointer (if we have one) to BytePtrTy. + if (OtherElt && OtherElt->getType() != BytePtrTy) + OtherElt = new BitCastInst(OtherElt, BytePtrTy,OtherElt->getNameStr(), + MI); + + unsigned EltSize = TD.getTypeSize(EltTy); + // Finally, insert the meminst for this element. if (isa(MI) || isa(MI)) { Value *Ops[] = { @@ -483,7 +540,8 @@ Zero // Align }; new CallInst(TheFn, Ops, 4, "", MI); - } else if (isa(MI)) { + } else { + assert(isa(MI)); Value *Ops[] = { EltPtr, MI->getOperand(2), // Dest, Value, ConstantInt::get(MI->getOperand(3)->getType(), EltSize), // Size @@ -491,7 +549,7 @@ }; new CallInst(TheFn, Ops, 4, "", MI); } - } + } // Finally, MI is now dead, as we've modified its actions to occur on all of // the elements of the aggregate. From sabre at nondot.org Thu Mar 8 01:04:12 2007 From: sabre at nondot.org (Chris Lattner) Date: Thu, 8 Mar 2007 01:04:12 -0600 Subject: [llvm-commits] CVS: llvm/lib/Transforms/Scalar/ScalarReplAggregates.cpp Message-ID: <200703080704.l2874CSf002657@zion.cs.uiuc.edu> Changes in directory llvm/lib/Transforms/Scalar: ScalarReplAggregates.cpp updated: 1.77 -> 1.78 --- Log message: This appears correct, enable it so we can see perf changes on testers --- Diffs of the changes: (+1 -1) ScalarReplAggregates.cpp | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/Transforms/Scalar/ScalarReplAggregates.cpp diff -u llvm/lib/Transforms/Scalar/ScalarReplAggregates.cpp:1.77 llvm/lib/Transforms/Scalar/ScalarReplAggregates.cpp:1.78 --- llvm/lib/Transforms/Scalar/ScalarReplAggregates.cpp:1.77 Thu Mar 8 00:36:54 2007 +++ llvm/lib/Transforms/Scalar/ScalarReplAggregates.cpp Thu Mar 8 01:03:55 2007 @@ -303,7 +303,7 @@ /// int SROA::isSafeUseOfAllocation(Instruction *User, AllocationInst *AI) { if (BitCastInst *C = dyn_cast(User)) - return 0 && (isSafeUseOfBitCastedAllocation(C, AI) ? 3 : 0); + return isSafeUseOfBitCastedAllocation(C, AI) ? 3 : 0; if (!isa(User)) return 0; GetElementPtrInst *GEPI = cast(User); From sabre at nondot.org Thu Mar 8 01:07:20 2007 From: sabre at nondot.org (Chris Lattner) Date: Thu, 8 Mar 2007 01:07:20 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Message-ID: <200703080707.l2877K0f002733@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/SelectionDAG: SelectionDAGISel.cpp updated: 1.382 -> 1.383 --- Log message: make this fail even in non-assert builds. --- Diffs of the changes: (+4 -2) SelectionDAGISel.cpp | 6 ++++-- 1 files changed, 4 insertions(+), 2 deletions(-) Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.382 llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.383 --- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.382 Wed Mar 7 10:25:08 2007 +++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Thu Mar 8 01:07:03 2007 @@ -2883,8 +2883,10 @@ // Memory input. // Check that the operand isn't a float. - if (!MVT::isInteger(InOperandVal.getValueType())) - assert(0 && "MATCH FAIL!"); + if (!MVT::isInteger(InOperandVal.getValueType())) { + cerr << "Match failed, can't handle floats yet!\n"; + exit(1); + } // Extend/truncate to the right pointer type if needed. MVT::ValueType PtrType = TLI.getPointerTy(); From evan.cheng at apple.com Thu Mar 8 01:22:51 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 7 Mar 2007 23:22:51 -0800 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86AsmPrinter.cpp X86TargetAsmInfo.cpp In-Reply-To: <6D34F439-A0AE-4ACF-BC26-BDFC632A1861@apple.com> References: <200703080107.l2817O7d027811@zion.cs.uiuc.edu> <6D34F439-A0AE-4ACF-BC26-BDFC632A1861@apple.com> Message-ID: <47728D72-8905-482B-A1EA-5FD38624036D@apple.com> On Mar 7, 2007, at 9:15 PM, Chris Lattner wrote: >> + // Read-only data. >> + bool isIntFPLiteral = Type->isInteger() || Type- >> >isFloatingPoint(); >> + if (C->ContainsRelocations() && Subtarget- >> >isTargetDarwin() && >> + TM.getRelocationModel() != Reloc::Static) > > Please rearrange this to: > if (isdarwin && not static && containsrelocations) > > putting the expensive check last. > >> + SwitchToDataSection("\t.const_data\n"); >> + else if (isIntFPLiteral && Size == 4 && >> + TAI->getFourByteConstantSection()) >> + SwitchToDataSection(TAI->getFourByteConstantSection >> (), I); >> + else if (isIntFPLiteral && Size == 8 && >> + TAI->getEightByteConstantSection()) >> + SwitchToDataSection(TAI->getEightByteConstantSection >> (), I); >> + else if (isIntFPLiteral && Size == 16 && >> + TAI->getSixteenByteConstantSection()) >> + SwitchToDataSection(TAI->getSixteenByteConstantSection >> (), I); > > Do we really need to check isIntFPLiteral here? Why can't > something like {short,short} go in literal4 ? We don't. But ContainsRelocations has to be checked first. We can't use FourByteConstantSection, etc. if the constant has relocations. Evan > > -Chris From clattner at apple.com Thu Mar 8 01:29:37 2007 From: clattner at apple.com (Chris Lattner) Date: Wed, 7 Mar 2007 23:29:37 -0800 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86AsmPrinter.cpp X86TargetAsmInfo.cpp In-Reply-To: <47728D72-8905-482B-A1EA-5FD38624036D@apple.com> References: <200703080107.l2817O7d027811@zion.cs.uiuc.edu> <6D34F439-A0AE-4ACF-BC26-BDFC632A1861@apple.com> <47728D72-8905-482B-A1EA-5FD38624036D@apple.com> Message-ID: On Mar 7, 2007, at 11:22 PM, Evan Cheng wrote: > > On Mar 7, 2007, at 9:15 PM, Chris Lattner wrote: > >>> + // Read-only data. >>> + bool isIntFPLiteral = Type->isInteger() || Type- >>> >isFloatingPoint(); >>> + if (C->ContainsRelocations() && Subtarget- >>> >isTargetDarwin() && >>> + TM.getRelocationModel() != Reloc::Static) >> >> Please rearrange this to: >> if (isdarwin && not static && containsrelocations) >> >> putting the expensive check last. >> >>> + SwitchToDataSection("\t.const_data\n"); >>> + else if (isIntFPLiteral && Size == 4 && >>> + TAI->getFourByteConstantSection()) >>> + SwitchToDataSection(TAI->getFourByteConstantSection >>> (), I); >>> + else if (isIntFPLiteral && Size == 8 && >>> + TAI->getEightByteConstantSection()) >>> + SwitchToDataSection(TAI->getEightByteConstantSection >>> (), I); >>> + else if (isIntFPLiteral && Size == 16 && >>> + TAI->getSixteenByteConstantSection()) >>> + SwitchToDataSection(TAI- >>> >getSixteenByteConstantSection(), I); >> >> Do we really need to check isIntFPLiteral here? Why can't >> something like {short,short} go in literal4 ? > > We don't. But ContainsRelocations has to be checked first. We can't > use FourByteConstantSection, etc. if the constant has relocations. Ah, ok, so instead of "isIntFPLiteral", you really mean "!contains relocations" -Chris From evan.cheng at apple.com Thu Mar 8 02:12:01 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Thu, 8 Mar 2007 00:12:01 -0800 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86AsmPrinter.cpp X86TargetAsmInfo.cpp In-Reply-To: References: <200703080107.l2817O7d027811@zion.cs.uiuc.edu> <6D34F439-A0AE-4ACF-BC26-BDFC632A1861@apple.com> <47728D72-8905-482B-A1EA-5FD38624036D@apple.com> Message-ID: <0E99F41D-D397-4446-B428-CDCD95833070@apple.com> On Mar 7, 2007, at 11:29 PM, Chris Lattner wrote: > > On Mar 7, 2007, at 11:22 PM, Evan Cheng wrote: > >> >> On Mar 7, 2007, at 9:15 PM, Chris Lattner wrote: >> >>>> + // Read-only data. >>>> + bool isIntFPLiteral = Type->isInteger() || Type- >>>> >isFloatingPoint(); >>>> + if (C->ContainsRelocations() && Subtarget- >>>> >isTargetDarwin() && >>>> + TM.getRelocationModel() != Reloc::Static) >>> >>> Please rearrange this to: >>> if (isdarwin && not static && containsrelocations) >>> >>> putting the expensive check last. >>> >>>> + SwitchToDataSection("\t.const_data\n"); >>>> + else if (isIntFPLiteral && Size == 4 && >>>> + TAI->getFourByteConstantSection()) >>>> + SwitchToDataSection(TAI->getFourByteConstantSection >>>> (), I); >>>> + else if (isIntFPLiteral && Size == 8 && >>>> + TAI->getEightByteConstantSection()) >>>> + SwitchToDataSection(TAI->getEightByteConstantSection >>>> (), I); >>>> + else if (isIntFPLiteral && Size == 16 && >>>> + TAI->getSixteenByteConstantSection()) >>>> + SwitchToDataSection(TAI- >>>> >getSixteenByteConstantSection(), I); >>> >>> Do we really need to check isIntFPLiteral here? Why can't >>> something like {short,short} go in literal4 ? >> >> We don't. But ContainsRelocations has to be checked first. We >> can't use FourByteConstantSection, etc. if the constant has >> relocations. > > Ah, ok, so instead of "isIntFPLiteral", you really mean "!contains > relocations" Not really. :-) But I am fixing that. Evan > > -Chris From evan.cheng at apple.com Thu Mar 8 02:26:10 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Thu, 8 Mar 2007 02:26:10 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86AsmPrinter.cpp Message-ID: <200703080826.l288QAid004765@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: X86AsmPrinter.cpp updated: 1.236 -> 1.237 --- Log message: Putting more constants which do not contain relocations into .literal{4|8|16} --- Diffs of the changes: (+6 -5) X86AsmPrinter.cpp | 11 ++++++----- 1 files changed, 6 insertions(+), 5 deletions(-) Index: llvm/lib/Target/X86/X86AsmPrinter.cpp diff -u llvm/lib/Target/X86/X86AsmPrinter.cpp:1.236 llvm/lib/Target/X86/X86AsmPrinter.cpp:1.237 --- llvm/lib/Target/X86/X86AsmPrinter.cpp:1.236 Wed Mar 7 19:07:07 2007 +++ llvm/lib/Target/X86/X86AsmPrinter.cpp Thu Mar 8 02:25:26 2007 @@ -255,17 +255,18 @@ SwitchToDataSection(TAI->getDataSection(), I); else { // Read-only data. - bool isIntFPLiteral = Type->isInteger() || Type->isFloatingPoint(); - if (C->ContainsRelocations() && Subtarget->isTargetDarwin() && + bool HasReloc = C->ContainsRelocations(); + if (HasReloc && + Subtarget->isTargetDarwin() && TM.getRelocationModel() != Reloc::Static) SwitchToDataSection("\t.const_data\n"); - else if (isIntFPLiteral && Size == 4 && + else if (!HasReloc && Size == 4 && TAI->getFourByteConstantSection()) SwitchToDataSection(TAI->getFourByteConstantSection(), I); - else if (isIntFPLiteral && Size == 8 && + else if (!HasReloc && Size == 8 && TAI->getEightByteConstantSection()) SwitchToDataSection(TAI->getEightByteConstantSection(), I); - else if (isIntFPLiteral && Size == 16 && + else if (!HasReloc && Size == 16 && TAI->getSixteenByteConstantSection()) SwitchToDataSection(TAI->getSixteenByteConstantSection(), I); else if (TAI->getReadOnlySection()) From evan.cheng at apple.com Thu Mar 8 02:27:34 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Thu, 8 Mar 2007 02:27:34 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp Message-ID: <200703080827.l288RYPh004799@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/ARM: ARMAsmPrinter.cpp updated: 1.59 -> 1.60 --- Log message: Putting more constants which do not contain relocations into .literal{4|8|16} --- Diffs of the changes: (+6 -5) ARMAsmPrinter.cpp | 11 ++++++----- 1 files changed, 6 insertions(+), 5 deletions(-) Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.59 llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.60 --- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.59 Wed Mar 7 19:25:25 2007 +++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Thu Mar 8 02:27:16 2007 @@ -834,17 +834,18 @@ SwitchToDataSection(TAI->getDataSection(), I); else { // Read-only data. - bool isIntFPLiteral = Type->isInteger() || Type->isFloatingPoint(); - if (C->ContainsRelocations() && Subtarget->isTargetDarwin() && + bool HasReloc = C->ContainsRelocations(); + if (HasReloc && + Subtarget->isTargetDarwin() && TM.getRelocationModel() != Reloc::Static) SwitchToDataSection("\t.const_data\n"); - else if (isIntFPLiteral && Size == 4 && + else if (!HasReloc && Size == 4 && TAI->getFourByteConstantSection()) SwitchToDataSection(TAI->getFourByteConstantSection(), I); - else if (isIntFPLiteral && Size == 8 && + else if (!HasReloc && Size == 8 && TAI->getEightByteConstantSection()) SwitchToDataSection(TAI->getEightByteConstantSection(), I); - else if (isIntFPLiteral && Size == 16 && + else if (!HasReloc && Size == 16 && TAI->getSixteenByteConstantSection()) SwitchToDataSection(TAI->getSixteenByteConstantSection(), I); else if (TAI->getReadOnlySection()) From evan.cheng at apple.com Thu Mar 8 02:32:45 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Thu, 8 Mar 2007 02:32:45 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp Message-ID: <200703080832.l288Wj5C004913@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/PowerPC: PPCAsmPrinter.cpp updated: 1.236 -> 1.237 --- Log message: Putting more constants which do not contain relocations into .literal{4|8|16} --- Diffs of the changes: (+9 -6) PPCAsmPrinter.cpp | 15 +++++++++------ 1 files changed, 9 insertions(+), 6 deletions(-) Index: llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp diff -u llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.236 llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.237 --- llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.236 Wed Mar 7 19:25:25 2007 +++ llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp Thu Mar 8 02:31:54 2007 @@ -701,7 +701,10 @@ + ",\"aw\", at progbits"; SwitchToDataSection(SectionName.c_str()); } else { - SwitchToDataSection(TAI->getDataSection(), I); + if (I->isConstant() && TAI->getReadOnlySection()) + SwitchToDataSection(TAI->getReadOnlySection(), I); + else + SwitchToDataSection(TAI->getDataSection(), I); } break; default: @@ -942,17 +945,17 @@ SwitchToDataSection(TAI->getDataSection(), I); else { // Read-only data. - bool isIntFPLiteral = Type->isInteger() || Type->isFloatingPoint(); - if (C->ContainsRelocations() && + bool HasReloc = C->ContainsRelocations(); + if (HasReloc && TM.getRelocationModel() != Reloc::Static) SwitchToDataSection("\t.const_data\n"); - else if (isIntFPLiteral && Size == 4 && + else if (!HasReloc && Size == 4 && TAI->getFourByteConstantSection()) SwitchToDataSection(TAI->getFourByteConstantSection(), I); - else if (isIntFPLiteral && Size == 8 && + else if (!HasReloc && Size == 8 && TAI->getEightByteConstantSection()) SwitchToDataSection(TAI->getEightByteConstantSection(), I); - else if (isIntFPLiteral && Size == 16 && + else if (!HasReloc && Size == 16 && TAI->getSixteenByteConstantSection()) SwitchToDataSection(TAI->getSixteenByteConstantSection(), I); else if (TAI->getReadOnlySection()) From baldrick at free.fr Thu Mar 8 06:35:29 2007 From: baldrick at free.fr (Duncan Sands) Date: Thu, 8 Mar 2007 13:35:29 +0100 Subject: [llvm-commits] llvm-gcc: take object size from target, not source, in VIEW_CONVERT_EXPR Message-ID: <200703081335.29782.baldrick@free.fr> VIEW_CONVERT_EXPR is sometimes used as a way of specifying the size of an object when the size would otherwise be unknown. In the (Ada) testcase an array, the type of which involves placeholder expressions, is view converted to an array type with length 2 (the compiler knows it has length 2, but presumably considers it too hard to work out what value should be substituted in the placeholder in order to get length 2 out, so uses a VIEW_CONVERT_EXPR instead). I think this can only happen for lvalues, though I'm not completely sure. This patch special cases view conversion of aggregate lvalues, using the size of the target type rather than the source type in the call to EmitAggregateCopy. Ciao, Duncan. -------------- next part -------------- A non-text attachment was scrubbed... Name: vce.diff Type: text/x-diff Size: 2506 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20070308/a5060be3/attachment.bin -------------- next part -------------- A non-text attachment was scrubbed... Name: vce-test.diff Type: text/x-diff Size: 389 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20070308/a5060be3/attachment-0001.bin From zhousheng00 at gmail.com Thu Mar 8 09:15:38 2007 From: zhousheng00 at gmail.com (Zhou Sheng) Date: Thu, 8 Mar 2007 09:15:38 -0600 Subject: [llvm-commits] CVS: llvm/lib/Transforms/Scalar/InstructionCombining.cpp Message-ID: <200703081515.l28FFcTV011992@zion.cs.uiuc.edu> Changes in directory llvm/lib/Transforms/Scalar: InstructionCombining.cpp updated: 1.651 -> 1.652 --- Log message: Fix a bug in function ComputeMaskedBits(). --- Diffs of the changes: (+2 -2) InstructionCombining.cpp | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/lib/Transforms/Scalar/InstructionCombining.cpp diff -u llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.651 llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.652 --- llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.651 Wed Mar 7 23:42:00 2007 +++ llvm/lib/Transforms/Scalar/InstructionCombining.cpp Thu Mar 8 09:15:18 2007 @@ -677,7 +677,7 @@ const IntegerType *SrcTy = cast(I->getOperand(0)->getType()); APInt NewBits(APInt::getAllOnesValue(BitWidth).shl(SrcTy->getBitWidth())); - Mask &= SrcTy->getMask().zext(BitWidth); + Mask &= SrcTy->getMask().zextOrTrunc(BitWidth); ComputeMaskedBits(I->getOperand(0), Mask, KnownZero, KnownOne, Depth+1); assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); // The top bits are known to be zero. @@ -689,7 +689,7 @@ const IntegerType *SrcTy = cast(I->getOperand(0)->getType()); APInt NewBits(APInt::getAllOnesValue(BitWidth).shl(SrcTy->getBitWidth())); - Mask &= SrcTy->getMask().zext(BitWidth); + Mask &= SrcTy->getMask().zextOrTrunc(BitWidth); ComputeMaskedBits(I->getOperand(0), Mask, KnownZero, KnownOne, Depth+1); assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); From dpatel at apple.com Thu Mar 8 13:05:22 2007 From: dpatel at apple.com (Devang Patel) Date: Thu, 8 Mar 2007 13:05:22 -0600 Subject: [llvm-commits] CVS: llvm/lib/VMCore/PassManager.cpp Message-ID: <200703081905.l28J5MPk023463@zion.cs.uiuc.edu> Changes in directory llvm/lib/VMCore: PassManager.cpp updated: 1.145 -> 1.146 --- Log message: Speed Up Pass Manager. - Check Immutableness before searching PreservedSet. - Avoid unnecessary traversal while setting Last User. --- Diffs of the changes: (+16 -15) PassManager.cpp | 31 ++++++++++++++++--------------- 1 files changed, 16 insertions(+), 15 deletions(-) Index: llvm/lib/VMCore/PassManager.cpp diff -u llvm/lib/VMCore/PassManager.cpp:1.145 llvm/lib/VMCore/PassManager.cpp:1.146 --- llvm/lib/VMCore/PassManager.cpp:1.145 Tue Mar 6 11:52:53 2007 +++ llvm/lib/VMCore/PassManager.cpp Thu Mar 8 13:05:01 2007 @@ -353,6 +353,10 @@ E = AnalysisPasses.end(); I != E; ++I) { Pass *AP = *I; LastUser[AP] = P; + + if (P == AP) + continue; + // If AP is the last user of other passes then make P last user of // such passes. for (std::map::iterator LUI = LastUser.begin(), @@ -546,11 +550,10 @@ for (std::vector::iterator I = HigherLevelAnalysis.begin(), E = HigherLevelAnalysis.end(); I != E; ++I) { Pass *P1 = *I; - if (std::find(PreservedSet.begin(), PreservedSet.end(), P1->getPassInfo()) == - PreservedSet.end()) { - if (!dynamic_cast(P1)) - return false; - } + if (!dynamic_cast(P1) + && std::find(PreservedSet.begin(), PreservedSet.end(), P1->getPassInfo()) == + PreservedSet.end()) + return false; } return true; @@ -568,12 +571,11 @@ for (std::map::iterator I = AvailableAnalysis.begin(), E = AvailableAnalysis.end(); I != E; ) { std::map::iterator Info = I++; - if (std::find(PreservedSet.begin(), PreservedSet.end(), Info->first) == - PreservedSet.end()) { + if (!dynamic_cast(Info->second) + && std::find(PreservedSet.begin(), PreservedSet.end(), Info->first) == + PreservedSet.end()) // Remove this analysis - if (!dynamic_cast(Info->second)) - AvailableAnalysis.erase(Info); - } + AvailableAnalysis.erase(Info); } // Check inherited analysis also. If P is not preserving analysis @@ -587,12 +589,11 @@ I = InheritedAnalysis[Index]->begin(), E = InheritedAnalysis[Index]->end(); I != E; ) { std::map::iterator Info = I++; - if (std::find(PreservedSet.begin(), PreservedSet.end(), Info->first) == - PreservedSet.end()) { + if (!dynamic_cast(Info->second) + && std::find(PreservedSet.begin(), PreservedSet.end(), Info->first) == + PreservedSet.end()) // Remove this analysis - if (!dynamic_cast(Info->second)) - InheritedAnalysis[Index]->erase(Info); - } + InheritedAnalysis[Index]->erase(Info); } } From evan.cheng at apple.com Thu Mar 8 13:26:27 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Thu, 8 Mar 2007 13:26:27 -0600 Subject: [llvm-commits] CVS: llvm/test/CodeGen/ARM/bx_fold.ll Message-ID: <200703081926.l28JQRdi023804@zion.cs.uiuc.edu> Changes in directory llvm/test/CodeGen/ARM: bx_fold.ll updated: 1.1 -> 1.2 --- Log message: Fix test case. --- Diffs of the changes: (+21 -16) bx_fold.ll | 37 +++++++++++++++++++++---------------- 1 files changed, 21 insertions(+), 16 deletions(-) Index: llvm/test/CodeGen/ARM/bx_fold.ll diff -u llvm/test/CodeGen/ARM/bx_fold.ll:1.1 llvm/test/CodeGen/ARM/bx_fold.ll:1.2 --- llvm/test/CodeGen/ARM/bx_fold.ll:1.1 Fri Jan 19 03:20:23 2007 +++ llvm/test/CodeGen/ARM/bx_fold.ll Thu Mar 8 13:26:11 2007 @@ -1,25 +1,30 @@ -; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | not grep bx +; RUN: llvm-as < %s | llc -march=arm +; RUN: llvm-as < %s | llc -march=arm | not grep bx -void %test(int %Ptr, ubyte* %L) { +define void @test(i32 %Ptr, i8* %L) { entry: br label %bb1 -bb: - %tmp7 = getelementptr ubyte* %L, uint %indvar - store ubyte 0, ubyte* %tmp7 - %indvar.next = add uint %indvar, 1 +bb: ; preds = %bb1 + %gep.upgrd.1 = zext i32 %indvar to i64 ; [#uses=1] + %tmp7 = getelementptr i8* %L, i64 %gep.upgrd.1 ; [#uses=1] + store i8 0, i8* %tmp7 + %indvar.next = add i32 %indvar, 1 ; [#uses=1] br label %bb1 -bb1: - %indvar = phi uint [ 0, %entry ], [ %indvar.next, %bb ] - %i.0 = cast uint %indvar to int - %Ptr_addr.0 = sub int %Ptr, %i.0 - %tmp12 = seteq int %i.0, %Ptr - %tmp12.not = xor bool %tmp12, true - %bothcond = and bool %tmp12.not, false - br bool %bothcond, label %bb, label %bb18 +bb1: ; preds = %bb, %entry + %indvar = phi i32 [ 0, %entry ], [ %indvar.next, %bb ] ; [#uses=3] + %i.0 = bitcast i32 %indvar to i32 ; [#uses=2] + %tmp = tail call i32 (...)* @bar( ) ; [#uses=1] + %tmp2 = add i32 %i.0, %tmp ; [#uses=1] + %Ptr_addr.0 = sub i32 %Ptr, %tmp2 ; [#uses=0] + %tmp12 = icmp eq i32 %i.0, %Ptr ; [#uses=1] + %tmp12.not = xor i1 %tmp12, true ; [#uses=1] + %bothcond = and i1 %tmp12.not, false ; [#uses=1] + br i1 %bothcond, label %bb, label %bb18 -bb18: +bb18: ; preds = %bb1 ret void } + +declare i32 @bar(...) From evan.cheng at apple.com Thu Mar 8 13:27:49 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Thu, 8 Mar 2007 13:27:49 -0600 Subject: [llvm-commits] CVS: llvm/test/CodeGen/ARM/insn-sched1.ll Message-ID: <200703081927.l28JRnoq023844@zion.cs.uiuc.edu> Changes in directory llvm/test/CodeGen/ARM: insn-sched1.ll updated: 1.4 -> 1.5 --- Log message: Fix test case. --- Diffs of the changes: (+1 -1) insn-sched1.ll | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/test/CodeGen/ARM/insn-sched1.ll diff -u llvm/test/CodeGen/ARM/insn-sched1.ll:1.4 llvm/test/CodeGen/ARM/insn-sched1.ll:1.5 --- llvm/test/CodeGen/ARM/insn-sched1.ll:1.4 Wed Jan 31 16:27:07 2007 +++ llvm/test/CodeGen/ARM/insn-sched1.ll Thu Mar 8 13:27:32 2007 @@ -1,5 +1,5 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+v6 && -; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-apple-darwin -mattr=+v6 | grep mov | wc -l | grep 2 +; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-apple-darwin -mattr=+v6 | grep mov | wc -l | grep 3 int %test(int %x) { %tmp = cast int %x to short From evan.cheng at apple.com Thu Mar 8 15:59:58 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Thu, 8 Mar 2007 15:59:58 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/ARM/ARMISelLowering.cpp Message-ID: <200703082159.l28Lxwd4031050@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/ARM: ARMISelLowering.cpp updated: 1.19 -> 1.20 --- Log message: Fix a typo. --- Diffs of the changes: (+1 -1) ARMISelLowering.cpp | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/Target/ARM/ARMISelLowering.cpp diff -u llvm/lib/Target/ARM/ARMISelLowering.cpp:1.19 llvm/lib/Target/ARM/ARMISelLowering.cpp:1.20 --- llvm/lib/Target/ARM/ARMISelLowering.cpp:1.19 Wed Mar 7 10:25:08 2007 +++ llvm/lib/Target/ARM/ARMISelLowering.cpp Thu Mar 8 15:59:30 2007 @@ -167,7 +167,7 @@ setOperationAction(ISD::LOCATION, MVT::Other, Expand); setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand); // FIXME - use subtarget debug flags - if (Subtarget->isTargetDarwin()) + if (!Subtarget->isTargetDarwin()) setOperationAction(ISD::LABEL, MVT::Other, Expand); setOperationAction(ISD::RET, MVT::Other, Custom); From isanbard at gmail.com Thu Mar 8 16:09:32 2007 From: isanbard at gmail.com (Bill Wendling) Date: Thu, 8 Mar 2007 16:09:32 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp X86InstrInfo.cpp X86InstrMMX.td X86RegisterInfo.cpp Message-ID: <200703082209.l28M9WFE031243@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: X86ISelLowering.cpp updated: 1.364 -> 1.365 X86InstrInfo.cpp updated: 1.77 -> 1.78 X86InstrMMX.td updated: 1.17 -> 1.18 X86RegisterInfo.cpp updated: 1.206 -> 1.207 --- Log message: Added "padd*" support for MMX. Added MMX move stuff to X86InstrInfo so that moves, loads, etc. are recognized. --- Diffs of the changes: (+73 -10) X86ISelLowering.cpp | 23 ++++++++++++++--------- X86InstrInfo.cpp | 7 ++++++- X86InstrMMX.td | 47 +++++++++++++++++++++++++++++++++++++++++++++++ X86RegisterInfo.cpp | 6 ++++++ 4 files changed, 73 insertions(+), 10 deletions(-) Index: llvm/lib/Target/X86/X86ISelLowering.cpp diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.364 llvm/lib/Target/X86/X86ISelLowering.cpp:1.365 --- llvm/lib/Target/X86/X86ISelLowering.cpp:1.364 Wed Mar 7 10:25:09 2007 +++ llvm/lib/Target/X86/X86ISelLowering.cpp Thu Mar 8 16:09:11 2007 @@ -326,15 +326,20 @@ addRegisterClass(MVT::v2i32, X86::VR64RegisterClass); // FIXME: add MMX packed arithmetics - setOperationAction(ISD::LOAD, MVT::v8i8, Promote); - AddPromotedToType (ISD::LOAD, MVT::v8i8, MVT::v2i32); - setOperationAction(ISD::LOAD, MVT::v4i16, Promote); - AddPromotedToType (ISD::LOAD, MVT::v4i16, MVT::v2i32); - setOperationAction(ISD::LOAD, MVT::v2i32, Legal); - - setOperationAction(ISD::BUILD_VECTOR, MVT::v8i8, Expand); - setOperationAction(ISD::BUILD_VECTOR, MVT::v4i16, Expand); - setOperationAction(ISD::BUILD_VECTOR, MVT::v2i32, Expand); + + setOperationAction(ISD::ADD, MVT::v8i8, Legal); + setOperationAction(ISD::ADD, MVT::v4i16, Legal); + setOperationAction(ISD::ADD, MVT::v2i32, Legal); + + setOperationAction(ISD::LOAD, MVT::v8i8, Promote); + AddPromotedToType (ISD::LOAD, MVT::v8i8, MVT::v2i32); + setOperationAction(ISD::LOAD, MVT::v4i16, Promote); + AddPromotedToType (ISD::LOAD, MVT::v4i16, MVT::v2i32); + setOperationAction(ISD::LOAD, MVT::v2i32, Legal); + + setOperationAction(ISD::BUILD_VECTOR, MVT::v8i8, Expand); + setOperationAction(ISD::BUILD_VECTOR, MVT::v4i16, Expand); + setOperationAction(ISD::BUILD_VECTOR, MVT::v2i32, Expand); } if (Subtarget->hasSSE1()) { Index: llvm/lib/Target/X86/X86InstrInfo.cpp diff -u llvm/lib/Target/X86/X86InstrInfo.cpp:1.77 llvm/lib/Target/X86/X86InstrInfo.cpp:1.78 --- llvm/lib/Target/X86/X86InstrInfo.cpp:1.77 Fri Jan 26 08:34:51 2007 +++ llvm/lib/Target/X86/X86InstrInfo.cpp Thu Mar 8 16:09:11 2007 @@ -37,7 +37,8 @@ oc == X86::FsMOVAPSrr || oc == X86::FsMOVAPDrr || oc == X86::MOVAPSrr || oc == X86::MOVAPDrr || oc == X86::MOVSS2PSrr || oc == X86::MOVSD2PDrr || - oc == X86::MOVPS2SSrr || oc == X86::MOVPD2SDrr) { + oc == X86::MOVPS2SSrr || oc == X86::MOVPD2SDrr || + oc == X86::MOVD64rr || oc == X86::MOVQ64rr) { assert(MI.getNumOperands() == 2 && MI.getOperand(0).isRegister() && MI.getOperand(1).isRegister() && @@ -64,6 +65,8 @@ case X86::MOVSDrm: case X86::MOVAPSrm: case X86::MOVAPDrm: + case X86::MOVD64rm: + case X86::MOVQ64rm: if (MI->getOperand(1).isFrameIndex() && MI->getOperand(2).isImmediate() && MI->getOperand(3).isRegister() && MI->getOperand(4).isImmediate() && MI->getOperand(2).getImmedValue() == 1 && @@ -92,6 +95,8 @@ case X86::MOVSDmr: case X86::MOVAPSmr: case X86::MOVAPDmr: + case X86::MOVD64mr: + case X86::MOVQ64mr: if (MI->getOperand(0).isFrameIndex() && MI->getOperand(1).isImmediate() && MI->getOperand(2).isRegister() && MI->getOperand(3).isImmediate() && MI->getOperand(1).getImmedValue() == 1 && Index: llvm/lib/Target/X86/X86InstrMMX.td diff -u llvm/lib/Target/X86/X86InstrMMX.td:1.17 llvm/lib/Target/X86/X86InstrMMX.td:1.18 --- llvm/lib/Target/X86/X86InstrMMX.td:1.17 Wed Mar 7 12:23:09 2007 +++ llvm/lib/Target/X86/X86InstrMMX.td Thu Mar 8 16:09:11 2007 @@ -45,6 +45,42 @@ def loadv2i32 : PatFrag<(ops node:$ptr), (v2i32 (load node:$ptr))>; //===----------------------------------------------------------------------===// +// MMX Multiclasses +//===----------------------------------------------------------------------===// + +let isTwoAddress = 1 in { + // MMXI_binop_rm - Simple MMX binary operator. + multiclass MMXI_binop_rm opc, string OpcodeStr, SDNode OpNode, + ValueType OpVT, bit Commutable = 0> { + def rr : MMXI { + let isCommutable = Commutable; + } + def rm : MMXI; + } +} + +let isTwoAddress = 1 in { + multiclass MMXI_binop_rm_int opc, string OpcodeStr, Intrinsic IntId, + bit Commutable = 0> { + def rr : MMXI { + let isCommutable = Commutable; + } + def rm : MMXI; + } +} + +//===----------------------------------------------------------------------===// // MMX EMMS Instruction //===----------------------------------------------------------------------===// @@ -54,6 +90,17 @@ // MMX Scalar Instructions //===----------------------------------------------------------------------===// +// Arithmetic Instructions +defm MMX_PADDB : MMXI_binop_rm<0xFC, "paddb", add, v8i8, 1>; +defm MMX_PADDW : MMXI_binop_rm<0xFD, "paddw", add, v4i16, 1>; +defm MMX_PADDD : MMXI_binop_rm<0xFE, "paddd", add, v2i32, 1>; + +defm MMX_PADDSB : MMXI_binop_rm_int<0xEC, "paddsb" , int_x86_mmx_padds_b, 1>; +defm MMX_PADDSW : MMXI_binop_rm_int<0xED, "paddsw" , int_x86_mmx_padds_w, 1>; + +defm MMX_PADDUSB : MMXI_binop_rm_int<0xDC, "paddusb", int_x86_mmx_paddus_b, 1>; +defm MMX_PADDUSW : MMXI_binop_rm_int<0xDD, "paddusw", int_x86_mmx_paddus_w, 1>; + // Move Instructions def MOVD64rr : MMXI<0x6E, MRMSrcReg, (ops VR64:$dst, GR32:$src), "movd {$src, $dst|$dst, $src}", []>; Index: llvm/lib/Target/X86/X86RegisterInfo.cpp diff -u llvm/lib/Target/X86/X86RegisterInfo.cpp:1.206 llvm/lib/Target/X86/X86RegisterInfo.cpp:1.207 --- llvm/lib/Target/X86/X86RegisterInfo.cpp:1.206 Tue Feb 27 18:20:26 2007 +++ llvm/lib/Target/X86/X86RegisterInfo.cpp Thu Mar 8 16:09:11 2007 @@ -89,6 +89,8 @@ Opc = X86::MOVSDmr; } else if (RC == &X86::VR128RegClass) { Opc = X86::MOVAPSmr; + } else if (RC == &X86::VR64RegClass) { + Opc = X86::MOVQ64mr; } else { assert(0 && "Unknown regclass"); abort(); @@ -122,6 +124,8 @@ Opc = X86::MOVSDrm; } else if (RC == &X86::VR128RegClass) { Opc = X86::MOVAPSrm; + } else if (RC == &X86::VR64RegClass) { + Opc = X86::MOVQ64rm; } else { assert(0 && "Unknown regclass"); abort(); @@ -154,6 +158,8 @@ Opc = X86::FsMOVAPDrr; } else if (RC == &X86::VR128RegClass) { Opc = X86::MOVAPSrr; + } else if (RC == &X86::VR64RegClass) { + Opc = X86::MOVQ64rr; } else { assert(0 && "Unknown regclass"); abort(); From isanbard at gmail.com Thu Mar 8 16:09:33 2007 From: isanbard at gmail.com (Bill Wendling) Date: Thu, 8 Mar 2007 16:09:33 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/Intrinsics.td IntrinsicsX86.td Message-ID: <200703082209.l28M9XZM031250@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm: Intrinsics.td updated: 1.49 -> 1.50 IntrinsicsX86.td updated: 1.32 -> 1.33 --- Log message: Added "padd*" support for MMX. Added MMX move stuff to X86InstrInfo so that moves, loads, etc. are recognized. --- Diffs of the changes: (+21 -0) Intrinsics.td | 4 ++++ IntrinsicsX86.td | 17 +++++++++++++++++ 2 files changed, 21 insertions(+) Index: llvm/include/llvm/Intrinsics.td diff -u llvm/include/llvm/Intrinsics.td:1.49 llvm/include/llvm/Intrinsics.td:1.50 --- llvm/include/llvm/Intrinsics.td:1.49 Thu Mar 1 14:23:39 2007 +++ llvm/include/llvm/Intrinsics.td Thu Mar 8 16:09:11 2007 @@ -98,6 +98,10 @@ def llvm_v4f32_ty : LLVMVectorType; // 4 x float def llvm_v2f64_ty : LLVMVectorType;// 2 x double +// MMX Vector Types +def llvm_v8i8_ty : LLVMVectorType; // 8 x i8 +def llvm_v4i16_ty : LLVMVectorType; // 4 x i16 + def llvm_vararg_ty : LLVMType; // vararg //===----------------------------------------------------------------------===// Index: llvm/include/llvm/IntrinsicsX86.td diff -u llvm/include/llvm/IntrinsicsX86.td:1.32 llvm/include/llvm/IntrinsicsX86.td:1.33 --- llvm/include/llvm/IntrinsicsX86.td:1.32 Mon Mar 5 17:09:45 2007 +++ llvm/include/llvm/IntrinsicsX86.td Thu Mar 8 16:09:11 2007 @@ -544,3 +544,20 @@ def int_x86_mmx_emms : GCCBuiltin<"__builtin_ia32_emms">, Intrinsic<[llvm_void_ty], [IntrWriteMem]>; } + +// Integer arithmetic ops. +let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". + def int_x86_mmx_padds_b : GCCBuiltin<"__builtin_ia32_paddsb">, + Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty, + llvm_v8i8_ty], [IntrNoMem]>; + def int_x86_mmx_padds_w : GCCBuiltin<"__builtin_ia32_paddsw">, + Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty, + llvm_v4i16_ty], [IntrNoMem]>; + + def int_x86_mmx_paddus_b : GCCBuiltin<"__builtin_ia32_paddusb">, + Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty, + llvm_v8i8_ty], [IntrNoMem]>; + def int_x86_mmx_paddus_w : GCCBuiltin<"__builtin_ia32_paddusw">, + Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty, + llvm_v4i16_ty], [IntrNoMem]>; +} From isanbard at gmail.com Thu Mar 8 16:15:10 2007 From: isanbard at gmail.com (Bill Wendling) Date: Thu, 8 Mar 2007 16:15:10 -0600 Subject: [llvm-commits] CVS: llvm/test/CodeGen/X86/mmx-arith.ll Message-ID: <200703082215.l28MFANo031710@zion.cs.uiuc.edu> Changes in directory llvm/test/CodeGen/X86: mmx-arith.ll added (r1.1) --- Log message: Add MMX arithmetic testcase. --- Diffs of the changes: (+35 -0) mmx-arith.ll | 35 +++++++++++++++++++++++++++++++++++ 1 files changed, 35 insertions(+) Index: llvm/test/CodeGen/X86/mmx-arith.ll diff -c /dev/null llvm/test/CodeGen/X86/mmx-arith.ll:1.1 *** /dev/null Thu Mar 8 16:15:01 2007 --- llvm/test/CodeGen/X86/mmx-arith.ll Thu Mar 8 16:14:51 2007 *************** *** 0 **** --- 1,35 ---- + ; RUN: llvm-as < %s | llc -march=x86 -mattr=+mmx + + ;; A basic sanity check to make sure that MMX arithmetic actually compiles. + + define void @foo(<2 x i32>* %A, <2 x i32>* %B) { + entry: + %tmp1 = load <2 x i32>* %A ; <<2 x i32>> [#uses=1] + %tmp3 = load <2 x i32>* %B ; <<2 x i32>> [#uses=1] + %tmp4 = add <2 x i32> %tmp1, %tmp3 ; <<2 x i32>> [#uses=1] + store <2 x i32> %tmp4, <2 x i32>* %A + tail call void @llvm.x86.mmx.emms( ) + ret void + } + + define void @bar(<4 x i16>* %A, <4 x i16>* %B) { + entry: + %tmp1 = load <4 x i16>* %A ; <<4 x i16>> [#uses=1] + %tmp3 = load <4 x i16>* %B ; <<4 x i16>> [#uses=1] + %tmp4 = add <4 x i16> %tmp1, %tmp3 ; <<4 x i16>> [#uses=1] + store <4 x i16> %tmp4, <4 x i16>* %A + tail call void @llvm.x86.mmx.emms( ) + ret void + } + + define void @baz(<8 x i8>* %A, <8 x i8>* %B) { + entry: + %tmp1 = load <8 x i8>* %A ; <<8 x i8>> [#uses=1] + %tmp3 = load <8 x i8>* %B ; <<8 x i8>> [#uses=1] + %tmp4 = add <8 x i8> %tmp1, %tmp3 ; <<8 x i8>> [#uses=1] + store <8 x i8> %tmp4, <8 x i8>* %A + tail call void @llvm.x86.mmx.emms( ) + ret void + } + + declare void @llvm.x86.mmx.emms() From sabre at nondot.org Thu Mar 8 16:30:04 2007 From: sabre at nondot.org (Chris Lattner) Date: Thu, 8 Mar 2007 16:30:04 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Message-ID: <200703082230.l28MU4xW032056@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen/SelectionDAG: SelectionDAGISel.cpp updated: 1.383 -> 1.384 --- Log message: implement support for floating point constants used as inline asm memory operands. --- Diffs of the changes: (+7 -2) SelectionDAGISel.cpp | 9 +++++++-- 1 files changed, 7 insertions(+), 2 deletions(-) Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.383 llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.384 --- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.383 Thu Mar 8 01:07:03 2007 +++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Thu Mar 8 16:29:47 2007 @@ -2882,9 +2882,14 @@ } else if (CTy == TargetLowering::C_Memory) { // Memory input. - // Check that the operand isn't a float. + // If the operand is a float, spill to a constant pool entry to get its + // address. + if (ConstantFP *Val = dyn_cast(I.getOperand(OpNum-1))) + InOperandVal = DAG.getConstantPool(Val, TLI.getPointerTy()); + if (!MVT::isInteger(InOperandVal.getValueType())) { - cerr << "Match failed, can't handle floats yet!\n"; + cerr << "Match failed, cannot handle this yet!\n"; + InOperandVal.Val->dump(); exit(1); } From sabre at nondot.org Thu Mar 8 16:33:22 2007 From: sabre at nondot.org (Chris Lattner) Date: Thu, 8 Mar 2007 16:33:22 -0600 Subject: [llvm-commits] CVS: llvm/test/CodeGen/X86/inline-asm.ll Message-ID: <200703082233.l28MXM96032132@zion.cs.uiuc.edu> Changes in directory llvm/test/CodeGen/X86: inline-asm.ll updated: 1.3 -> 1.4 --- Log message: upgrade this testcase, add test for fp immediate to memory operand. --- Diffs of the changes: (+13 -6) inline-asm.ll | 19 +++++++++++++------ 1 files changed, 13 insertions(+), 6 deletions(-) Index: llvm/test/CodeGen/X86/inline-asm.ll diff -u llvm/test/CodeGen/X86/inline-asm.ll:1.3 llvm/test/CodeGen/X86/inline-asm.ll:1.4 --- llvm/test/CodeGen/X86/inline-asm.ll:1.3 Fri Dec 1 22:23:08 2006 +++ llvm/test/CodeGen/X86/inline-asm.ll Thu Mar 8 16:33:06 2007 @@ -1,14 +1,21 @@ -; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 +; RUN: llvm-as < %s | llc -march=x86 -int %test1() { +define i32 @test1() { ; Dest is AX, dest type = i32. - %tmp4 = call int asm sideeffect "FROB $0", "={ax}"() - ret int %tmp4 + %tmp4 = call i32 asm sideeffect "FROB $0", "={ax}"() + ret i32 %tmp4 } -void %test2(int %V) { +define void @test2(i32 %V) { ; input is AX, in type = i32. - call void asm sideeffect "FROB $0", "{ax}"(int %V) + call void asm sideeffect "FROB $0", "{ax}"(i32 %V) ret void } +define void @test3() { + ; FP constant as a memory operand. + tail call void asm sideeffect "frob $0", "m"( float 0x41E0000000000000) + ret void +} + + From evan.cheng at apple.com Thu Mar 8 16:43:03 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Thu, 8 Mar 2007 16:43:03 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp Message-ID: <200703082243.l28Mh3RL032342@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/ARM: ARMAsmPrinter.cpp updated: 1.60 -> 1.61 --- Log message: Implement inline asm modifier c. --- Diffs of the changes: (+3 -0) ARMAsmPrinter.cpp | 3 +++ 1 files changed, 3 insertions(+) Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.60 llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.61 --- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.60 Thu Mar 8 02:27:16 2007 +++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Thu Mar 8 16:42:46 2007 @@ -662,6 +662,9 @@ switch (ExtraCode[0]) { default: return true; // Unknown modifier. + case 'c': // Don't print "$" before a global var name or constant. + printOperand(MI, OpNo); + return false; case 'Q': if (TM.getTargetData()->isLittleEndian()) break; From evan.cheng at apple.com Thu Mar 8 16:45:48 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Thu, 8 Mar 2007 16:45:48 -0600 Subject: [llvm-commits] CVS: llvm/test/CodeGen/ARM/inlineasm.ll Message-ID: <200703082245.l28Mjm4g032396@zion.cs.uiuc.edu> Changes in directory llvm/test/CodeGen/ARM: inlineasm.ll updated: 1.1 -> 1.2 --- Log message: Test inline asm modifier 'c'. --- Diffs of the changes: (+15 -11) inlineasm.ll | 26 +++++++++++++++----------- 1 files changed, 15 insertions(+), 11 deletions(-) Index: llvm/test/CodeGen/ARM/inlineasm.ll diff -u llvm/test/CodeGen/ARM/inlineasm.ll:1.1 llvm/test/CodeGen/ARM/inlineasm.ll:1.2 --- llvm/test/CodeGen/ARM/inlineasm.ll:1.1 Fri Jan 19 03:20:23 2007 +++ llvm/test/CodeGen/ARM/inlineasm.ll Thu Mar 8 16:45:31 2007 @@ -1,15 +1,19 @@ -; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+v6 +; RUN: llvm-as < %s | llc -march=arm -mattr=+v6 -uint %test1(uint %tmp54) { - %tmp56 = tail call uint asm "uxtb16 $0,$1", "=r,r"( uint %tmp54 ) - ret uint %tmp56 +define i32 @test1(i32 %tmp54) { + %tmp56 = tail call i32 asm "uxtb16 $0,$1", "=r,r"( i32 %tmp54 ) ; [#uses=1] + ret i32 %tmp56 } -void %test2() { - %tmp1 = call long asm "ldmia $1!, {$0, ${0:H}}", "=r,==r,1"( int** null, int* null ) - %tmp1 = cast long %tmp1 to ulong - %tmp2 = shr ulong %tmp1, ubyte 32 - %tmp3 = cast ulong %tmp2 to int - %tmp4 = call int asm "pkhbt $0, $1, $2, lsl #16", "=r,r,r"( int 0, int %tmp3 ) - ret void +define void @test2() { + %tmp1 = call i64 asm "ldmia $1!, {$0, ${0:H}}", "=r,==r,1"( i32** null, i32* null ) ; [#uses=2] + %tmp2 = lshr i64 %tmp1, 32 ; [#uses=1] + %tmp3 = trunc i64 %tmp2 to i32 ; [#uses=1] + %tmp4 = call i32 asm "pkhbt $0, $1, $2, lsl #16", "=r,r,r"( i32 0, i32 %tmp3 ) ; [#uses=0] + ret void +} + +define void @test3() { + tail call void asm sideeffect "/* number: ${0:c} */", "i"( i32 1 ) + ret void } From isanbard at gmail.com Thu Mar 8 17:27:11 2007 From: isanbard at gmail.com (Bill Wendling) Date: Thu, 8 Mar 2007 17:27:11 -0600 Subject: [llvm-commits] CVS: llvm/lib/ExecutionEngine/Interpreter/Execution.cpp Message-ID: <200703082327.l28NRB16000670@zion.cs.uiuc.edu> Changes in directory llvm/lib/ExecutionEngine/Interpreter: Execution.cpp updated: 1.175 -> 1.176 --- Log message: Don't use a cast. It causes an error on some platforms. --- Diffs of the changes: (+1 -1) Execution.cpp | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/ExecutionEngine/Interpreter/Execution.cpp diff -u llvm/lib/ExecutionEngine/Interpreter/Execution.cpp:1.175 llvm/lib/ExecutionEngine/Interpreter/Execution.cpp:1.176 --- llvm/lib/ExecutionEngine/Interpreter/Execution.cpp:1.175 Mon Mar 5 21:46:41 2007 +++ llvm/lib/ExecutionEngine/Interpreter/Execution.cpp Thu Mar 8 17:26:50 2007 @@ -753,7 +753,7 @@ DOUT << "Allocated Type: " << *Ty << " (" << TypeSize << " bytes) x " << NumElements << " (Total: " << MemToAlloc << ") at " - << unsigned(Memory) << '\n'; + << std::hex << Memory << '\n'; GenericValue Result = PTOGV(Memory); assert(Result.PointerVal != 0 && "Null pointer returned by malloc!"); From clattner at apple.com Thu Mar 8 17:28:02 2007 From: clattner at apple.com (Chris Lattner) Date: Thu, 8 Mar 2007 15:28:02 -0800 Subject: [llvm-commits] CVS: llvm/lib/ExecutionEngine/Interpreter/Execution.cpp In-Reply-To: <200703082327.l28NRB16000670@zion.cs.uiuc.edu> References: <200703082327.l28NRB16000670@zion.cs.uiuc.edu> Message-ID: On Mar 8, 2007, at 3:27 PM, Bill Wendling wrote: > Changes in directory llvm/lib/ExecutionEngine/Interpreter: > Execution.cpp updated: 1.175 -> 1.176 > --- > Log message: > > Don't use a cast. It causes an error on some platforms. std::hex is sticky. Please don't use it. I assume that this fails because memory is a pointer? If so, try casting to uintptr_t -Chris > > --- > Diffs of the changes: (+1 -1) > > Execution.cpp | 2 +- > 1 files changed, 1 insertion(+), 1 deletion(-) > > > Index: llvm/lib/ExecutionEngine/Interpreter/Execution.cpp > diff -u llvm/lib/ExecutionEngine/Interpreter/Execution.cpp:1.175 > llvm/lib/ExecutionEngine/Interpreter/Execution.cpp:1.176 > --- llvm/lib/ExecutionEngine/Interpreter/Execution.cpp:1.175 Mon > Mar 5 21:46:41 2007 > +++ llvm/lib/ExecutionEngine/Interpreter/Execution.cpp Thu Mar 8 > 17:26:50 2007 > @@ -753,7 +753,7 @@ > > DOUT << "Allocated Type: " << *Ty << " (" << TypeSize << " > bytes) x " > << NumElements << " (Total: " << MemToAlloc << ") at " > - << unsigned(Memory) << '\n'; > + << std::hex << Memory << '\n'; > > GenericValue Result = PTOGV(Memory); > assert(Result.PointerVal != 0 && "Null pointer returned by > malloc!"); > > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From isanbard at gmail.com Thu Mar 8 17:37:42 2007 From: isanbard at gmail.com (Bill Wendling) Date: Thu, 8 Mar 2007 17:37:42 -0600 Subject: [llvm-commits] CVS: llvm/lib/ExecutionEngine/Interpreter/Execution.cpp Message-ID: <200703082337.l28Nbg1p000911@zion.cs.uiuc.edu> Changes in directory llvm/lib/ExecutionEngine/Interpreter: Execution.cpp updated: 1.176 -> 1.177 --- Log message: Don't use std::hex. --- Diffs of the changes: (+1 -1) Execution.cpp | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/ExecutionEngine/Interpreter/Execution.cpp diff -u llvm/lib/ExecutionEngine/Interpreter/Execution.cpp:1.176 llvm/lib/ExecutionEngine/Interpreter/Execution.cpp:1.177 --- llvm/lib/ExecutionEngine/Interpreter/Execution.cpp:1.176 Thu Mar 8 17:26:50 2007 +++ llvm/lib/ExecutionEngine/Interpreter/Execution.cpp Thu Mar 8 17:37:24 2007 @@ -753,7 +753,7 @@ DOUT << "Allocated Type: " << *Ty << " (" << TypeSize << " bytes) x " << NumElements << " (Total: " << MemToAlloc << ") at " - << std::hex << Memory << '\n'; + << uintptr_t(Memory) << '\n'; GenericValue Result = PTOGV(Memory); assert(Result.PointerVal != 0 && "Null pointer returned by malloc!"); From isanbard at gmail.com Thu Mar 8 17:38:34 2007 From: isanbard at gmail.com (Bill) Date: Thu, 8 Mar 2007 15:38:34 -0800 Subject: [llvm-commits] CVS: llvm/lib/ExecutionEngine/Interpreter/Execution.cpp In-Reply-To: References: <200703082327.l28NRB16000670@zion.cs.uiuc.edu> Message-ID: <16e5fdf90703081538w7349337el46a190b6e60598e1@mail.gmail.com> On 3/8/07, Chris Lattner wrote: > On Mar 8, 2007, at 3:27 PM, Bill Wendling wrote: > > Changes in directory llvm/lib/ExecutionEngine/Interpreter: > > Execution.cpp updated: 1.175 -> 1.176 > > --- > > Log message: > > > > Don't use a cast. It causes an error on some platforms. > > std::hex is sticky. Please don't use it. > > I assume that this fails because memory is a pointer? If so, try > casting to uintptr_t > What means you this "sticky"? Done :-) -bw From rspencer at reidspencer.com Thu Mar 8 19:27:54 2007 From: rspencer at reidspencer.com (Reid Spencer) Date: Thu, 08 Mar 2007 17:27:54 -0800 Subject: [llvm-commits] CVS: llvm/lib/ExecutionEngine/Interpreter/Execution.cpp In-Reply-To: <16e5fdf90703081538w7349337el46a190b6e60598e1@mail.gmail.com> References: <200703082327.l28NRB16000670@zion.cs.uiuc.edu> <16e5fdf90703081538w7349337el46a190b6e60598e1@mail.gmail.com> Message-ID: <1173403674.11195.155.camel@bashful.x10sys.com> On Thu, 2007-03-08 at 15:38 -0800, Bill wrote: > On 3/8/07, Chris Lattner wrote: > > On Mar 8, 2007, at 3:27 PM, Bill Wendling wrote: > > > Changes in directory llvm/lib/ExecutionEngine/Interpreter: > > > Execution.cpp updated: 1.175 -> 1.176 > > > --- > > > Log message: > > > > > > Don't use a cast. It causes an error on some platforms. > > > > std::hex is sticky. Please don't use it. > > > > I assume that this fails because memory is a pointer? If so, try > > casting to uintptr_t > > > What means you this "sticky"? Its sticky because it sets a hex mode output for all subsequent numeric << operators. Of course, you can set it back with something like: cerr << std::hex << hexValue << std::dec; > > Done :-) > > -bw > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From evan.cheng at apple.com Fri Mar 9 00:02:34 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Fri, 9 Mar 2007 00:02:34 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/LiveVariables.cpp Message-ID: <200703090602.l2962YiD009662@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen: LiveVariables.cpp updated: 1.68 -> 1.69 --- Log message: Avoid variable shadowing. --- Diffs of the changes: (+2 -2) LiveVariables.cpp | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/lib/CodeGen/LiveVariables.cpp diff -u llvm/lib/CodeGen/LiveVariables.cpp:1.68 llvm/lib/CodeGen/LiveVariables.cpp:1.69 --- llvm/lib/CodeGen/LiveVariables.cpp:1.68 Mon Feb 19 15:49:53 2007 +++ llvm/lib/CodeGen/LiveVariables.cpp Fri Mar 9 00:02:17 2007 @@ -341,8 +341,8 @@ // Convert and transfer the dead / killed information we have gathered into // VirtRegInfo onto MI's. // - for (unsigned i = 0, e = VirtRegInfo.size(); i != e; ++i) - for (unsigned j = 0, e = VirtRegInfo[i].Kills.size(); j != e; ++j) { + for (unsigned i = 0, e1 = VirtRegInfo.size(); i != e1; ++i) + for (unsigned j = 0, e2 = VirtRegInfo[i].Kills.size(); j != e2; ++j) { if (VirtRegInfo[i].Kills[j] == VirtRegInfo[i].DefInst) addRegisterDead(i + MRegisterInfo::FirstVirtualRegister, VirtRegInfo[i].Kills[j]); From evan.cheng at apple.com Fri Mar 9 02:29:36 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Fri, 9 Mar 2007 02:29:36 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/MachineBasicBlock.cpp Message-ID: <200703090829.l298TaCW011915@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen: MachineBasicBlock.cpp updated: 1.42 -> 1.43 --- Log message: Print preds / succs BB numbers. --- Diffs of the changes: (+2 -2) MachineBasicBlock.cpp | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/lib/CodeGen/MachineBasicBlock.cpp diff -u llvm/lib/CodeGen/MachineBasicBlock.cpp:1.42 llvm/lib/CodeGen/MachineBasicBlock.cpp:1.43 --- llvm/lib/CodeGen/MachineBasicBlock.cpp:1.42 Mon Feb 19 15:49:53 2007 +++ llvm/lib/CodeGen/MachineBasicBlock.cpp Fri Mar 9 02:29:08 2007 @@ -126,7 +126,7 @@ if (!pred_empty()) { OS << " Predecessors according to CFG:"; for (const_pred_iterator PI = pred_begin(), E = pred_end(); PI != E; ++PI) - OS << " " << *PI; + OS << " " << *PI << " (#" << (*PI)->getNumber() << ")"; OS << "\n"; } @@ -139,7 +139,7 @@ if (!succ_empty()) { OS << " Successors according to CFG:"; for (const_succ_iterator SI = succ_begin(), E = succ_end(); SI != E; ++SI) - OS << " " << *SI; + OS << " " << *SI << " (#" << (*SI)->getNumber() << ")"; OS << "\n"; } } From evan.cheng at apple.com Fri Mar 9 03:49:13 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Fri, 9 Mar 2007 03:49:13 -0600 Subject: [llvm-commits] CVS: llvm/lib/CodeGen/LiveVariables.cpp Message-ID: <200703090949.l299nD64013448@zion.cs.uiuc.edu> Changes in directory llvm/lib/CodeGen: LiveVariables.cpp updated: 1.69 -> 1.70 --- Log message: If a virtual register is already marked alive in this block, that means it is alive in one of the successor block. Do not add it to the kill list. --- Diffs of the changes: (+6 -1) LiveVariables.cpp | 7 ++++++- 1 files changed, 6 insertions(+), 1 deletion(-) Index: llvm/lib/CodeGen/LiveVariables.cpp diff -u llvm/lib/CodeGen/LiveVariables.cpp:1.69 llvm/lib/CodeGen/LiveVariables.cpp:1.70 --- llvm/lib/CodeGen/LiveVariables.cpp:1.69 Fri Mar 9 00:02:17 2007 +++ llvm/lib/CodeGen/LiveVariables.cpp Fri Mar 9 03:48:56 2007 @@ -152,7 +152,12 @@ "Should have kill for defblock!"); // Add a new kill entry for this basic block. - VRInfo.Kills.push_back(MI); + unsigned BBNum = MBB->getNumber(); + // If this virtual register is already marked as alive in this basic block, + // that means it is alive in at least one of the successor block, it's not + // a kill. + if (VRInfo.AliveBlocks.size() <= BBNum || !VRInfo.AliveBlocks[BBNum]) + VRInfo.Kills.push_back(MI); // Update all dominating blocks to mark them known live. for (MachineBasicBlock::const_pred_iterator PI = MBB->pred_begin(), From nicolas.geoffray at lip6.fr Fri Mar 9 03:51:53 2007 From: nicolas.geoffray at lip6.fr (Nicolas Geoffray) Date: Fri, 09 Mar 2007 10:51:53 +0100 Subject: [llvm-commits] Stack and register alignment in linux/ppc calls In-Reply-To: <45EDAED8.2040902@lip6.fr> References: <45EDACD4.5050407@lip6.fr> <45EDAED8.2040902@lip6.fr> Message-ID: <45F12E39.1020301@lip6.fr> If there is no objection, I'm checking this in. Nicolas Nicolas Geoffray wrote: > Small mistake, here's the correct patch. > > Nicolas > > Nicolas Geoffray wrote: >> This patch corrects arguments passing alignment for linux/ppc calls >> (ELF ABI). >> It affects LowerFORMAL_ARGUMENTS and LowerCALL of PPCISelLowering.cpp. >> >> OK to commit? >> > ------------------------------------------------------------------------ > > Index: PPCISelLowering.cpp > =================================================================== > RCS file: /var/cvs/llvm/llvm/lib/Target/PowerPC/PPCISelLowering.cpp,v > retrieving revision 1.259 > diff -t -d -u -p -5 -r1.259 PPCISelLowering.cpp > --- PPCISelLowering.cpp 1 Mar 2007 13:11:38 -0000 1.259 > +++ PPCISelLowering.cpp 6 Mar 2007 18:09:01 -0000 > @@ -1127,10 +1127,11 @@ static SDOperand LowerFORMAL_ARGUMENTS(S > SDOperand Root = Op.getOperand(0); > > MVT::ValueType PtrVT = DAG.getTargetLoweringInfo().getPointerTy(); > bool isPPC64 = PtrVT == MVT::i64; > bool isMachoABI = Subtarget.isMachoABI(); > + bool isELF_ABI = Subtarget.isELF_ABI(); > unsigned PtrByteSize = isPPC64 ? 8 : 4; > > unsigned ArgOffset = PPCFrameInfo::getLinkageSize(isPPC64, isMachoABI); > > static const unsigned GPR_32[] = { // 32-bit registers. > @@ -1164,24 +1165,34 @@ static SDOperand LowerFORMAL_ARGUMENTS(S > SDOperand ArgVal; > bool needsLoad = false; > MVT::ValueType ObjectVT = Op.getValue(ArgNo).getValueType(); > unsigned ObjSize = MVT::getSizeInBits(ObjectVT)/8; > unsigned ArgSize = ObjSize; > + unsigned Flags = cast(Op.getOperand(ArgNo+3))->getValue(); > + // See if next argument requires stack alignment in ELF > + unsigned Expand = (ObjectVT == MVT::f64) || ((ArgNo + 1 < e) && > + (cast(Op.getOperand(ArgNo+4))->getValue() & (1 << 27)) && > + (!(Flags & (1 << 27)))); > > unsigned CurArgOffset = ArgOffset; > switch (ObjectVT) { > default: assert(0 && "Unhandled argument type!"); > case MVT::i32: > + // Double word align in ELF > + if (Expand && isELF_ABI && !isPPC64) GPR_idx += (GPR_idx % 2); > if (GPR_idx != Num_GPR_Regs) { > unsigned VReg = RegMap->createVirtualRegister(&PPC::GPRCRegClass); > MF.addLiveIn(GPR[GPR_idx], VReg); > ArgVal = DAG.getCopyFromReg(Root, VReg, MVT::i32); > ++GPR_idx; > } else { > needsLoad = true; > ArgSize = PtrByteSize; > } > + // Stack align in ELF > + if (needsLoad && Expand && isELF_ABI && !isPPC64) > + ArgOffset += ((ArgOffset/4) % 2) * PtrByteSize; > // All int arguments reserve stack space in Macho ABI. > if (isMachoABI || needsLoad) ArgOffset += PtrByteSize; > break; > > case MVT::i64: // PPC64 > @@ -1199,11 +1210,11 @@ static SDOperand LowerFORMAL_ARGUMENTS(S > > case MVT::f32: > case MVT::f64: > // Every 4 bytes of argument space consumes one of the GPRs available for > // argument passing. > - if (GPR_idx != Num_GPR_Regs) { > + if (GPR_idx != Num_GPR_Regs && isMachoABI) { > ++GPR_idx; > if (ObjSize == 8 && GPR_idx != Num_GPR_Regs && !isPPC64) > ++GPR_idx; > } > if (FPR_idx != Num_FPR_Regs) { > @@ -1217,10 +1228,13 @@ static SDOperand LowerFORMAL_ARGUMENTS(S > ++FPR_idx; > } else { > needsLoad = true; > } > > + // Stack align in ELF > + if (needsLoad && Expand && isELF_ABI && !isPPC64) > + ArgOffset += ((ArgOffset/4) % 2) * PtrByteSize; > // All FP arguments reserve stack space in Macho ABI. > if (isMachoABI || needsLoad) ArgOffset += isPPC64 ? 8 : ObjSize; > break; > case MVT::v4f32: > case MVT::v4i32: > @@ -1319,10 +1333,11 @@ static SDOperand LowerCALL(SDOperand Op, > bool isVarArg = cast(Op.getOperand(2))->getValue() != 0; > SDOperand Callee = Op.getOperand(4); > unsigned NumOps = (Op.getNumOperands() - 5) / 2; > > bool isMachoABI = Subtarget.isMachoABI(); > + bool isELF_ABI = Subtarget.isELF_ABI(); > > MVT::ValueType PtrVT = DAG.getTargetLoweringInfo().getPointerTy(); > bool isPPC64 = PtrVT == MVT::i64; > unsigned PtrByteSize = isPPC64 ? 8 : 4; > > @@ -1394,35 +1409,58 @@ static SDOperand LowerCALL(SDOperand Op, > std::vector > RegsToPass; > SmallVector MemOpChains; > for (unsigned i = 0; i != NumOps; ++i) { > bool inMem = false; > SDOperand Arg = Op.getOperand(5+2*i); > - > + unsigned Flags = cast(Op.getOperand(5+2*i+1))->getValue(); > + // See if next argument requires stack alignment in ELF > + unsigned Expand = (Arg.getValueType() == MVT::f64) || > + ((i + 1 < NumOps) && > + (cast(Op.getOperand(5+2*(i+1)+1))->getValue() > + & (1 << 27)) && > + (!(Flags & (1 << 27)))); > + > // PtrOff will be used to store the current argument to the stack if a > // register cannot be found for it. > - SDOperand PtrOff = DAG.getConstant(ArgOffset, StackPtr.getValueType()); > + SDOperand PtrOff; > + > + // Stack align in ELF > + if (isELF_ABI && Expand && !isPPC64) > + PtrOff = DAG.getConstant(ArgOffset + ((ArgOffset/4) % 2) * PtrByteSize, > + StackPtr.getValueType()); > + else > + PtrOff = DAG.getConstant(ArgOffset, StackPtr.getValueType()); > + > PtrOff = DAG.getNode(ISD::ADD, PtrVT, StackPtr, PtrOff); > > // On PPC64, promote integers to 64-bit values. > if (isPPC64 && Arg.getValueType() == MVT::i32) { > - unsigned Flags = cast(Op.getOperand(5+2*i+1))->getValue(); > unsigned ExtOp = (Flags & 1) ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; > > Arg = DAG.getNode(ExtOp, MVT::i64, Arg); > } > > switch (Arg.getValueType()) { > default: assert(0 && "Unexpected ValueType for argument!"); > case MVT::i32: > case MVT::i64: > + // Double word align in ELF > + if (isELF_ABI && Expand && !isPPC64) GPR_idx += (GPR_idx % 2); > if (GPR_idx != NumGPRs) { > RegsToPass.push_back(std::make_pair(GPR[GPR_idx++], Arg)); > } else { > MemOpChains.push_back(DAG.getStore(Chain, Arg, PtrOff, NULL, 0)); > inMem = true; > } > - if (inMem || isMachoABI) ArgOffset += PtrByteSize; > + if (inMem || isMachoABI) > + { > + // Stack align in ELF > + if (isELF_ABI && Expand && !isPPC64) > + ArgOffset += ((ArgOffset/4) % 2) * PtrByteSize; > + > + ArgOffset += PtrByteSize; > + } > break; > case MVT::f32: > case MVT::f64: > if (isVarArg) { > // Float varargs need to be promoted to double. > @@ -1467,10 +1505,13 @@ static SDOperand LowerCALL(SDOperand Op, > } else { > MemOpChains.push_back(DAG.getStore(Chain, Arg, PtrOff, NULL, 0)); > inMem = true; > } > if (inMem || isMachoABI) { > + // Stack align in ELF > + if (isELF_ABI && Expand && !isPPC64) > + ArgOffset += ((ArgOffset/4) % 2) * PtrByteSize; > if (isPPC64) > ArgOffset += 8; > else > ArgOffset += Arg.getValueType() == MVT::f32 ? 4 : 8; > } > @@ -1498,11 +1539,11 @@ static SDOperand LowerCALL(SDOperand Op, > InFlag); > InFlag = Chain.getValue(1); > } > > // With the ELF ABI, set CR6 to true if this is a vararg call. > - if (isVarArg && !isMachoABI) { > + if (isVarArg && isELF_ABI) { > SDOperand SetCR(DAG.getTargetNode(PPC::SETCR, MVT::i32), 0); > Chain = DAG.getCopyToReg(Chain, PPC::CR6, SetCR, InFlag); > InFlag = Chain.getValue(1); > } > > > ------------------------------------------------------------------------ > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > From nicolas.geoffray at lip6.fr Fri Mar 9 03:53:20 2007 From: nicolas.geoffray at lip6.fr (Nicolas Geoffray) Date: Fri, 09 Mar 2007 10:53:20 +0100 Subject: [llvm-commits] llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp In-Reply-To: <45EBDBCD.7070509@lip6.fr> References: <45E46A95.5000500@lip6.fr> <061382E6-AE05-4A71-899F-098B91E14DA3@apple.com> <45E7F5A0.2000604@lip6.fr> <45E98679.2000908@lip6.fr> <45EBDBCD.7070509@lip6.fr> Message-ID: <45F12E90.20604@lip6.fr> Chris (and everyone), I hope I convinced you :) If it's the case, I'm checking this in. Nicolas Nicolas Geoffray wrote: > Chris Lattner wrote: > >> Ok, so it's not related to NoFramePointerElim? If that's the case, >> you should just have Macho and ELF return different sets of callee >> saved regs. >> >> > No, that's not the issue. > > Let me rephrase why I need this patch :) > > In PowerPC, whether it's on ELF ABI or MachO, R31 is a normal, > callee-saved register. With one exception: when it is used as a frame > pointer. When it is used as a frame pointer, both MachO and ELF remove > R31 from the callee-saved registers set. > > There are two different ways to use R31 as a frame pointer: 1) with an > alloca when the stack is growing in a non-compilation deterministic > size, or 2) when NoFramePointerElim is set. > > 1) When there is an alloca that modifies the size of the stack, > compilation goes through the LowerDYNAMIC_STACKALLOC method. In this > method, you find the code: > > > // Find out what the fix offset of the frame pointer save area. > int FPOffset = PPCFrameInfo::getFramePointerSaveOffset(IsPPC64, > isMachoABI); > // Allocate the frame index for frame pointer save area. > FPSI = MF.getFrameInfo()->CreateFixedObject(IsPPC64? 8 : 4, FPOffset); > // Save the result. > FI->setFramePointerSaveIndex(FPSI); > > With this code you give the info to the FrameInfo object that the frame > pointer offset is at FPOffset. Therefore, this offset will never be used > as an offset for another purpose. And this is _really_ important for > ELF, because the frame pointer, R31, is saved in the callee-saved area. > With this code, you are sure that no callee-saved register will be > spilled to R31's offset. > > > 2) When NoFramePointerElim is set, R31 is always used as a frame > pointer. However, the stack size may be decided at a compilation time, > therefore the compilation process never goes through the > LowerDYNAMIC_STACKALLOC. And LowerDYNAMIC_STACKALLOC is the only method > that saves the frame pointer offset in the frame info. > The bug arrives here: the frame info object never had the info that R31 > is saved in the callee-saved area. Therefore, it may allocate the frame > pointer offset for spilling an other register. This was not an issue for > the MachO ABI because the frame pointer offset in MachO is not in the > callee-saved area. > > With this patch I give the info to the FrameInfo object, before the > callee-saved scan, that R31 is saved in the callee-saved area. Thus I am > sure that no register will be spilled in R31's offset. > > > I hope it's clearer now (maybe it already was, but I was getting > confused by your replies :)) > > Best, > Nicolas > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > From baldrick at free.fr Fri Mar 9 03:56:06 2007 From: baldrick at free.fr (Duncan Sands) Date: Fri, 9 Mar 2007 10:56:06 +0100 Subject: [llvm-commits] llvm-gcc: use array_ref_element_size when emitting an ARRAY_REF Message-ID: <200703091056.06713.baldrick@free.fr> The array element type doesn't always have a known size, which is why the ARRAY_REF supplies the size, extractable with array_ref_element_size. Fix and Ada testcase attached. Ciao, Duncan. -------------- next part -------------- A non-text attachment was scrubbed... Name: array_ref.diff Type: text/x-diff Size: 1180 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20070309/96cd443f/attachment.bin -------------- next part -------------- A non-text attachment was scrubbed... Name: array_ref_test.diff Type: text/x-diff Size: 545 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20070309/96cd443f/attachment-0001.bin From clattner at apple.com Fri Mar 9 05:38:46 2007 From: clattner at apple.com (Chris Lattner) Date: Fri, 9 Mar 2007 03:38:46 -0800 Subject: [llvm-commits] Stack and register alignment in linux/ppc calls In-Reply-To: <45EDACD4.5050407@lip6.fr> References: <45EDACD4.5050407@lip6.fr> Message-ID: <856FC03F-5F37-4D10-9115-40A7C050051B@apple.com> On Mar 6, 2007, at 10:03 AM, Nicolas Geoffray wrote: > This patch corrects arguments passing alignment for linux/ppc calls > (ELF ABI). > It affects LowerFORMAL_ARGUMENTS and LowerCALL of PPCISelLowering.cpp. Sure, sorry for the delay. Please add some high-level comments that explain what is going on here (what the ABI says). I would eventually like to switch PPC over to using autogenerated callingconv code, but I haven't had a chance to finish argument passing. > @@ -1164,24 +1165,34 @@ static SDOperand LowerFORMAL_ARGUMENTS(S > SDOperand ArgVal; > bool needsLoad = false; > MVT::ValueType ObjectVT = Op.getValue(ArgNo).getValueType(); > unsigned ObjSize = MVT::getSizeInBits(ObjectVT)/8; > unsigned ArgSize = ObjSize; > + unsigned Flags = cast(Op.getOperand(ArgNo+3))- > >getValue(); > + // See if next argument requires stack alignment in ELF > + unsigned Expand = (ObjectVT == MVT::f64) || ((ArgNo + 1 < e) && > + (cast(Op.getOperand(ArgNo+4))->getValue() & > (1 << 27)) && > + (!(Flags & (1 << 27)))); Please update this to use the enums that anton recently added for decoding the flags values. > unsigned CurArgOffset = ArgOffset; > switch (ObjectVT) { > default: assert(0 && "Unhandled argument type!"); > case MVT::i32: > + // Double word align in ELF > + if (Expand && !isELF_ABI && !isPPC64) GPR_idx += (GPR_idx % 2); This says "!isELF_ABI", shouldn't it be "isELF_ABI"? If not, you're modifying the Darwin/PPC ABI. > - > + unsigned Flags = cast(Op.getOperand(5+2*i+1))- > >getValue(); > + // See if next argument requires stack alignment in ELF > + unsigned Expand = (Arg.getValueType() == MVT::f64) || > + ((i + 1 < NumOps) && > + (cast(Op.getOperand(5+2*(i+1)+1))->getValue() > + & (1 > << 27)) && > + (!(Flags & (1 << 27)))); Likewise, plz use enums here. Also, there is some funky indentation going on here. Perhaps making a "ConstantSDNode *Tmp" would make this more natural. > // PtrOff will be used to store the current argument to the > stack if a > // register cannot be found for it. > - SDOperand PtrOff = DAG.getConstant(ArgOffset, > StackPtr.getValueType()); > + SDOperand PtrOff; > + > + // Stack align in ELF > + if (isELF_ABI && Expand && !isPPC64) > + PtrOff = DAG.getConstant(ArgOffset + ((ArgOffset/4) % 2) * > PtrByteSize, > + StackPtr.getValueType()); > + else > + PtrOff = DAG.getConstant(ArgOffset, StackPtr.getValueType()); > + Funky indentation. Statements should be indented by 2. Subexpressions (StackPtr.getValueType() should be aligned to the (. Otherwise, looks great, thanks! -Chris From clattner at apple.com Fri Mar 9 05:43:53 2007 From: clattner at apple.com (Chris Lattner) Date: Fri, 9 Mar 2007 03:43:53 -0800 Subject: [llvm-commits] llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp In-Reply-To: <45EBDBCD.7070509@lip6.fr> References: <45E46A95.5000500@lip6.fr> <061382E6-AE05-4A71-899F-098B91E14DA3@apple.com> <45E7F5A0.2000604@lip6.fr> <45E98679.2000908@lip6.fr> <45EBDBCD.7070509@lip6.fr> Message-ID: On Mar 5, 2007, at 12:58 AM, Nicolas Geoffray wrote: > Chris Lattner wrote: >> >> Ok, so it's not related to NoFramePointerElim? If that's the >> case, you should just have Macho and ELF return different sets of >> callee saved regs. >> > No, that's not the issue. > > Let me rephrase why I need this patch :) > > In PowerPC, whether it's on ELF ABI or MachO, R31 is a normal, > callee-saved register. With one exception: when it is used as a > frame pointer. When it is used as a frame pointer, both MachO and > ELF remove R31 from the callee-saved registers set. Ok. > There are two different ways to use R31 as a frame pointer: 1) with > an alloca when the stack is growing in a non-compilation > deterministic size, or 2) when NoFramePointerElim is set. Ah, gotcha. > 1) When there is an alloca that modifies the size of the stack, > compilation goes through the LowerDYNAMIC_STACKALLOC method. In > this method, you find the code: > > > // Find out what the fix offset of the frame pointer save area. > int FPOffset = PPCFrameInfo::getFramePointerSaveOffset(IsPPC64, > isMachoABI); > // Allocate the frame index for frame pointer save area. > FPSI = MF.getFrameInfo()->CreateFixedObject(IsPPC64? 8 : 4, > FPOffset); > // Save the result. > FI->setFramePointerSaveIndex(FPSI); Ok > With this code you give the info to the FrameInfo object that the > frame pointer offset is at FPOffset. Therefore, this offset will > never be used as an offset for another purpose. And this is > _really_ important for ELF, because the frame pointer, R31, is > saved in the callee-saved area. With this code, you are sure that > no callee-saved register will be spilled to R31's offset. Ok. > 2) When NoFramePointerElim is set, R31 is always used as a frame > pointer. However, the stack size may be decided at a compilation > time, therefore the compilation process never goes through the > LowerDYNAMIC_STACKALLOC. And LowerDYNAMIC_STACKALLOC is the only > method that saves the frame pointer offset in the frame info. > The bug arrives here: the frame info object never had the info that > R31 is saved in the callee-saved area. Therefore, it may allocate > the frame pointer offset for spilling an other register. This was > not an issue for the MachO ABI because the frame pointer offset in > MachO is not in the callee-saved area. > > With this patch I give the info to the FrameInfo object, before the > callee-saved scan, that R31 is saved in the callee-saved area. Thus > I am sure that no register will be spilled in R31's offset. Ahhh, ok. I think I understand now what is going on. Thank you for the very clear explanation. In this case, it seems like a clearly good thing to just call CreateFixedObject unconditionally early on (e.g.) when lowering the arguments. I don't have your proposed patch handy, but it seems like you know what the issues are :), so go ahead and check it in. -Chris From asl at math.spbu.ru Fri Mar 9 05:53:51 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Fri, 9 Mar 2007 05:53:51 -0600 Subject: [llvm-commits] CVS: llvm/lib/System/Win32/Program.inc Message-ID: <200703091153.l29Brphx016137@zion.cs.uiuc.edu> Changes in directory llvm/lib/System/Win32: Program.inc updated: 1.21 -> 1.22 --- Log message: Unbreak mingw32 build --- Diffs of the changes: (+8 -0) Program.inc | 8 ++++++++ 1 files changed, 8 insertions(+) Index: llvm/lib/System/Win32/Program.inc diff -u llvm/lib/System/Win32/Program.inc:1.21 llvm/lib/System/Win32/Program.inc:1.22 --- llvm/lib/System/Win32/Program.inc:1.21 Sun Mar 4 23:45:08 2007 +++ llvm/lib/System/Win32/Program.inc Fri Mar 9 05:53:34 2007 @@ -98,6 +98,14 @@ return h; } +#ifdef __MINGW32__ + // Due to unknown reason, mingw32's w32api doesn't have this declaration. + BOOL WINAPI SetInformationJobObject(HANDLE hJob, + JOBOBJECTINFOCLASS JobObjectInfoClass, + LPVOID lpJobObjectInfo, + DWORD cbJobObjectInfoLength); +#endif + int Program::ExecuteAndWait(const Path& path, const char** args, From alenhar2 at cs.uiuc.edu Fri Mar 9 11:28:29 2007 From: alenhar2 at cs.uiuc.edu (Andrew Lenharth) Date: Fri, 9 Mar 2007 11:28:29 -0600 Subject: [llvm-commits] [see] CVS: llvm-poolalloc/include/dsa/DSGraph.h DSNode.h Message-ID: <200703091728.l29HST1W000661@apoc.cs.uiuc.edu> Changes in directory llvm-poolalloc/include/dsa: DSGraph.h updated: 1.110.2.4.2.1 -> 1.110.2.4.2.2 DSNode.h updated: 1.58.2.2 -> 1.58.2.2.2.1 --- Log message: use nifty new, simpler, smaller, easy to understand metapool inference (yea yea, theres a memory leak in it --- Diffs of the changes: (+69 -89) DSGraph.h | 91 ++------------------------------------------------------------ DSNode.h | 67 ++++++++++++++++++++++++++++++++++++++++++++- 2 files changed, 69 insertions(+), 89 deletions(-) Index: llvm-poolalloc/include/dsa/DSGraph.h diff -u llvm-poolalloc/include/dsa/DSGraph.h:1.110.2.4.2.1 llvm-poolalloc/include/dsa/DSGraph.h:1.110.2.4.2.2 --- llvm-poolalloc/include/dsa/DSGraph.h:1.110.2.4.2.1 Wed Feb 28 11:35:41 2007 +++ llvm-poolalloc/include/dsa/DSGraph.h Fri Mar 9 11:27:50 2007 @@ -23,6 +23,8 @@ #include #include #include +#include + namespace llvm { //typedef map PoolDescriptorMapType; @@ -174,63 +176,6 @@ DSNodeHandle &AddGlobal(GlobalValue *GV); }; - -#ifdef LLVA_KERNEL -class MetaPool; -class MetaPoolHandle { - MetaPool *Rep; - Instruction * Creator; -public: - MetaPoolHandle(MetaPool *mp, Instruction * Maker = 0); - - MetaPool *getMetaPool() { - return Rep; - } - void setMetaPool(MetaPool *v) { - Rep = v; - } - ~MetaPoolHandle() { - //do nothing for now - } - const std::string &getName(); - Value *getMetaPoolValue(); - void merge(MetaPoolHandle *other); -}; - - class MetaPool { - Value *MPD; - hash_set HandleSet; - - public: - MetaPool(Value *mpd) : MPD(mpd) { - } - void addMetaPoolHandles(hash_set & mpHS) { - HandleSet.insert(mpHS.begin(), mpHS.end()); - } - hash_set& getHandleSet() { - return HandleSet; - } - Value * getMetaPoolValue() { - return MPD; - } - void setMetaPoolValue(Value *V) { - MPD = V; - } - void insert(MetaPoolHandle *mph) { - HandleSet.insert(mph); - } - const std::string& getName() { - return MPD->getName(); - } - ~MetaPool() { - HandleSet.clear(); - } - }; - -#endif - - - //===----------------------------------------------------------------------===// /// DSGraph - The graph that represents a function. /// @@ -280,12 +225,6 @@ /// constructed for. const TargetData &TD; -#ifdef LLVA_KERNEL - hash_map PoolDescriptors; -#endif - - - void operator=(const DSGraph &); // DO NOT IMPLEMENT DSGraph(const DSGraph&); // DO NOT IMPLEMENT public: @@ -311,31 +250,6 @@ DSGraph *getGlobalsGraph() const { return GlobalsGraph; } void setGlobalsGraph(DSGraph *G) { GlobalsGraph = G; } -#ifdef LLVA_KERNEL -#if 1 - hash_map& getPoolDescriptorsMap() { - return PoolDescriptors; - } - MetaPoolHandle *getPoolForNode(const DSNode *N) { - if (PoolDescriptors.count(N) > 0) { - return PoolDescriptors[N]; - } - return 0; - } -#else - hash_map& getPoolDescriptorsMap() { - return PoolDescriptors; - } - MetaPoolHandle *getPoolForNode(const DSNodeHandle *N) { - if (PoolDescriptors.count(N) > 0) { - return PoolDescriptors[N]; - } - return 0; - } -#endif - -#endif - /// getGlobalECs - Return the set of equivalence classes that the global /// variables in the program form. EquivalenceClasses &getGlobalECs() const { @@ -615,6 +529,7 @@ /// removeDeadNodes. /// void removeTriviallyDeadNodes(); + }; Index: llvm-poolalloc/include/dsa/DSNode.h diff -u llvm-poolalloc/include/dsa/DSNode.h:1.58.2.2 llvm-poolalloc/include/dsa/DSNode.h:1.58.2.2.2.1 --- llvm-poolalloc/include/dsa/DSNode.h:1.58.2.2 Wed Dec 13 10:24:48 2006 +++ llvm-poolalloc/include/dsa/DSNode.h Fri Mar 9 11:27:50 2007 @@ -16,6 +16,7 @@ #include "dsa/DSSupport.h" #include "llvm/ADT/hash_map" +#include namespace llvm { @@ -23,6 +24,62 @@ class DSNodeIterator; // Data structure graph traversal iterator class TargetData; +#if 1 + class MetaPool { + protected: + Value *MPD; + MetaPool* fw; + + public: + std::list allocs; + std::list GVs; + MetaPool(CallSite& C) : MPD(0), fw(0) { + allocs.push_back(C); + } + MetaPool(GlobalValue* GV) : MPD(0),fw(0) { + GVs.push_back(GV); + } + + MetaPool() : MPD(0),fw(0) {} + MetaPool(const MetaPool& M) :MPD(0), fw(const_cast(&M)) {} + + Value * getMetaPoolValue() { + return MPD; + } + void setMetaPoolValue(Value *V) { + MPD = V; + } + void merge(MetaPool* M) { + if(!M || M == this) return; + allocs.splice(allocs.begin(), M->allocs); + GVs.splice(GVs.begin(), M->GVs); + M->fw = this; + } + MetaPool* getFW() { return fw; } + }; + class MetaPoolHandle { + MetaPool* MP; + + public: + MetaPoolHandle(MetaPool* P) :MP(P) {} + // MetaPoolHandle() : MP(0) {} + MetaPool* getPool() { + while(MP && MP->getFW()) + MP = MP->getFW(); + return MP; + } + MetaPool* getPool() const{ + MetaPool* RP = MP; + while(RP && RP->getFW()) + RP = RP->getFW(); + return RP; + } + void set(MetaPool* P) { MP = P; } + }; +#endif + + + //===----------------------------------------------------------------------===// /// DSNode - Data structure node class /// @@ -105,8 +162,16 @@ /// private: unsigned short NodeType; -public: +#if 1 +protected: + MetaPoolHandle MP; +public: + MetaPool* getMP() { return MP.getPool(); } + MetaPool* getMP() const { return MP.getPool(); } + void setMP(MetaPool* P) { MP.set(P); } +#endif + public: /// DSNode ctor - Create a node of the specified type, inserting it into the /// specified graph. /// From alenhar2 at cs.uiuc.edu Fri Mar 9 11:28:29 2007 From: alenhar2 at cs.uiuc.edu (Andrew Lenharth) Date: Fri, 9 Mar 2007 11:28:29 -0600 Subject: [llvm-commits] [see] CVS: llvm-poolalloc/lib/DSA/DataStructure.cpp Local.cpp Message-ID: <200703091728.l29HSTxc000662@apoc.cs.uiuc.edu> Changes in directory llvm-poolalloc/lib/DSA: DataStructure.cpp updated: 1.248.2.4.2.3 -> 1.248.2.4.2.4 Local.cpp updated: 1.158.2.4.2.3 -> 1.158.2.4.2.4 --- Log message: use nifty new, simpler, smaller, easy to understand metapool inference (yea yea, theres a memory leak in it --- Diffs of the changes: (+49 -553) DataStructure.cpp | 243 ++++-------------------------------- Local.cpp | 359 ++---------------------------------------------------- 2 files changed, 49 insertions(+), 553 deletions(-) Index: llvm-poolalloc/lib/DSA/DataStructure.cpp diff -u llvm-poolalloc/lib/DSA/DataStructure.cpp:1.248.2.4.2.3 llvm-poolalloc/lib/DSA/DataStructure.cpp:1.248.2.4.2.4 --- llvm-poolalloc/lib/DSA/DataStructure.cpp:1.248.2.4.2.3 Wed Mar 7 16:49:43 2007 +++ llvm-poolalloc/lib/DSA/DataStructure.cpp Fri Mar 9 11:27:51 2007 @@ -98,6 +98,7 @@ DSNodeHandle &DSScalarMap::AddGlobal(GlobalValue *GV) { assert(ValueMap.count(GV) == 0 && "GV already exists!"); + assert(isa((Value*)GV) && "not a global"); // If the node doesn't exist, check to see if it's a global that is // equated to another global in the program. @@ -125,7 +126,11 @@ //===----------------------------------------------------------------------===// DSNode::DSNode(const Type *T, DSGraph *G) - : NumReferrers(0), Size(0), ParentGraph(G), Ty(Type::VoidTy), NodeType(0) { + : NumReferrers(0), Size(0), ParentGraph(G), Ty(Type::VoidTy), NodeType(0) +#ifdef LLVA_KERNEL + , MP(0) +#endif + { // Add the type entry if it is specified... if (T) mergeTypeInfo(T, 0); if (G) G->addNode(this); @@ -138,7 +143,11 @@ // DSNode copy constructor... do not copy over the referrers list! DSNode::DSNode(const DSNode &N, DSGraph *G, bool NullLinks) : NumReferrers(0), Size(N.Size), ParentGraph(G), - Ty(N.Ty), Globals(N.Globals), NodeType(N.NodeType) { + Ty(N.Ty), Globals(N.Globals), NodeType(N.NodeType) +#ifdef LLVA_KERNEL + , MP(N.MP.getPool()) +#endif + { if (!NullLinks) { Links = N.Links; } else @@ -153,19 +162,6 @@ DSNode::~DSNode() { dropAllReferences(); assert(hasNoReferrers() && "Referrers to dead node exist!"); - -#ifdef LLVA_KERNEL - // - // Remove all references to this node from the Pool Descriptor Map. - // -#if JTC - std::cerr << "LLVA: Removing " << this << "\n"; -#endif - if (ParentGraph) { - hash_map &pdm=ParentGraph->getPoolDescriptorsMap(); - pdm.erase (this); - } -#endif } /// getTargetData - Get the target data object used to construct this node. @@ -201,6 +197,13 @@ NodeType = DEAD; Size = 0; Ty = Type::VoidTy; +#ifdef LLVA_KERNEL + MetaPool* MP = new MetaPool(); + MP->merge(getMP()); + MP->merge(To->getMP()); + setMP(MP); + To->setMP(MP); +#endif // Remove this node from the parent graph's Nodes list. ParentGraph->unlinkNode(this); @@ -261,21 +264,13 @@ DestNode->Ty = Type::VoidTy; DestNode->Size = 1; DestNode->Globals.swap(Globals); +#ifdef LLVA_KERNEL + DestNode->setMP(getMP()); +#endif #if JTC std::cerr << "LLVA: foldNode: " << this << " becomes " << DestNode << "\n"; #endif -#ifdef LLVA_KERNEL - //Again we have created a new DSNode, we need to fill in the - // pool desc map appropriately - assert(ParentGraph && "parent graph is not null \n"); - hash_map &pdm = ParentGraph->getPoolDescriptorsMap(); - if (pdm.count(this) > 0) { - pdm[DestNode] = pdm[this]; - } else { - //do nothing - } -#endif // Start forwarding to the destination node... forwardNode(DestNode, 0); @@ -871,60 +866,11 @@ #endif } #ifdef LLVA_KERNEL - DSNode *currNode = CurNodeH.getNode(); - DSNode *NNode = NH.getNode(); - DSGraph *pGraph = currNode->getParentGraph(); - assert((pGraph == NNode->getParentGraph()) && "LLVA_KERNEL : merging nodes in two different graphs?"); - //get the pooldescriptor map - hash_map &pdm = pGraph->getPoolDescriptorsMap(); - if (pdm.count(currNode) == 0) { - if (pdm.count(NNode) == 0) { - //do nothing (common case) - } else { - if (pdm[NNode]) { -#if JTC - std::cerr << "LLVA: 1: currNode (" << currNode << ") becomes " << pdm[NNode]->getName() << "(" << NNode << ")\n"; -#endif - pdm[currNode] = pdm[NNode]; - } - } - } else { - if (pdm.count(NNode) == 0) { -#if 1 - // - // FIXME: - // Verify that this is correct. I believe it is; it seems to make sense - // since either node can be used after the merge. - // -#if JTC -std::cerr << "LLVA: MergeNodes: currnode has something, newnode has nothing\n"; - std::cerr << "LLVA: 2: currNode (" << currNode << ") becomes " << "(" << NNode << ")\n"; -#endif - pdm[NNode] = pdm[currNode]; -#endif - //do nothing - } else { - if (pdm[currNode] != pdm[NNode]) { - //The following is commented because pdm[..] could be null! - //std::cerr << "LLVA: OldPool: " << pdm[currNode]->getName() << "(" - // << pdm[currNode] << ") " - // << " NewPool: " << pdm[NNode]->getName() << "(" - // << pdm[NNode] << ")" << std::endl; - pdm[NNode]->merge(pdm[currNode]); - /* - Value *currN = pdm[currNode]->getMetaPoolValue(); - Value *NN = pdm[NNode]->getMetaPoolValue(); - if (currN != NN) { - std::cerr << "LLVA: Two Pools for one DSNode\n"; - currN->replaceAllUsesWith(NN); - pdm[currNode]->merge(pdm[NNode]); - } else { - //The nodes are same - } - */ - } - } - } + MetaPool* MP = new MetaPool(); + MP->merge(CurNodeH.getNode()->getMP()); + MP->merge(NH.getNode()->getMP()); + CurNodeH.getNode()->setMP(MP); + NH.getNode()->setMP(MP); #endif // Merge the type entries of the two nodes together... if (NH.getNode()->Ty != Type::VoidTy) @@ -1087,21 +1033,6 @@ DSNode *DN = new DSNode(*SN, &Dest, true /* Null out all links */); DN->maskNodeTypes(BitsToKeep); NH = DN; -#if JTC -std::cerr << "LLVA: getClonedNH: " << SN << " becomes " << DN << "\n"; -#endif -#if 1 -#ifdef LLVA_KERNEL - //Again we have created a new DSNode, we need to fill in the - // pool desc map appropriately - hash_map &pdm = Dest.getPoolDescriptorsMap(); - if (pdm.count(SN) > 0) { - pdm[DN] = pdm[SN]; - } else { - //do nothing - } -#endif -#endif // Next, recursively clone all outgoing links as necessary. Note that // adding these links can cause the node to collapse itself at any time, and @@ -1260,58 +1191,15 @@ } } -#if JTC -std::cerr << "LLVA: mergeWith: " << SN << " becomes " << DN << "\n"; -#endif #ifdef LLVA_KERNEL - //Here some merge is going on just like in DSNode::merge - //I think because of the inplace merging we don't update the pool desc maps - //This is modification from DSNode::MergeNodes - //Here DN and SN may belong to different graphs - DN = NH.getNode(); -#if 0 - DSGraph *destGraph = DN->getParentGraph(); - DSGraph *srcGraph = SN->getParentGraph(); -#else - DSGraph *destGraph = NH.getNode()->getParentGraph(); - DSGraph *srcGraph = SN->getParentGraph(); -#endif - if (destGraph && srcGraph) { - //get the pooldescriptor map - hash_map &destpdm = destGraph->getPoolDescriptorsMap(); - hash_map &srcpdm = srcGraph->getPoolDescriptorsMap(); - if (destpdm.count(DN) == 0) { - if (srcpdm.count(SN) == 0) { - //do nothing (common case) - } else { - if (srcpdm[SN]) { -#if JTC - std::cerr << "LLVA: DN becomes " << srcpdm[SN]->getName() << std::endl; -#endif - destpdm[DN] = srcpdm[SN]; - } - } - } else { - if (srcpdm.count(SN) == 0) { - srcpdm[SN] = destpdm[DN]; - } else { - if (destpdm[DN] != srcpdm[SN]) { - srcpdm[SN]->merge(destpdm[DN]); - /* - Value *dnv = destpdm[DN]->getMetaPoolValue(); - Value *snv = srcpdm[SN]->getMetaPoolValue(); - if (dnv != snv) { - DEBUG(std::cerr << "LLVA: Two Pools for one DSNode\n"); - dnv->replaceAllUsesWith(snv); - destpdm[DN]->setMetaPoolValue(snv); - } - */ - } - } - } - } + MetaPool* MP = new MetaPool(); + MP->merge(NH.getNode()->getMP()); + MP->merge(SrcNH.getNode()->getMP()); + NH.getNode()->setMP(MP); + SrcNH.getNode()->setMP(MP); #endif + // Next, recursively merge all outgoing links as necessary. Note that // adding these links can cause the destination node to collapse itself at // any time, and the current node may be merged with arbitrary other nodes. @@ -1380,55 +1268,6 @@ NH = RC.getClonedNH(Src); } -#ifdef LLVA_KERNEL -// MetaPoolHandle Implementation - //The following should go in a cpp file later - MetaPoolHandle::MetaPoolHandle(MetaPool *mp, Instruction * Maker) { - Rep = mp; - Rep->insert(this); - Creator = Maker; - } - const std::string& MetaPoolHandle::getName() { - assert(Rep != 0 && "Null meta pool ??\n"); - return Rep->getName(); - } - Value *MetaPoolHandle::getMetaPoolValue() { - assert(Rep != 0 && "Null meta pool ??\n"); - return Rep->getMetaPoolValue(); - } - void MetaPoolHandle::merge(MetaPoolHandle *other) { - //after this operation other points to what this points to . - //first replace all uses - Value *dest = getMetaPoolValue(); - Value *curr = other->getMetaPoolValue(); - if (dest != curr) { -#if 0 - std::cerr << "LLVA: Merging metapools: " << this->Creator->getParent()->getParent()->getName() << " : " << other->Creator->getParent()->getParent()->getName() << "\n" - << "LLVA: " << *(this->Creator) << "\n" - << "LLVA: " << *(other->Creator) << "\n"; - curr->replaceAllUsesWith(dest); -#endif - } - - //merge the hash sets in to other - hash_set &otherHandleSet = other->getMetaPool()->getHandleSet(); - hash_set::iterator ohsI = otherHandleSet.begin(), ohsE = otherHandleSet.end(); - for (; ohsI != ohsE; ++ohsI) { - MetaPoolHandle *omph = *ohsI; - //now make sure that this omph points to what we point to - omph->setMetaPool(Rep); - Rep->insert(omph); - } - - //now delete others MetaPool - //gd delete other->getMetaPool(); - - //Assign our metapool to other - other->setMetaPool(Rep); -} - -#endif - //===----------------------------------------------------------------------===// // DSGraph Implementation //===----------------------------------------------------------------------===// @@ -1462,9 +1301,6 @@ AuxFunctionCalls.clear(); ScalarMap.clear(); ReturnNodes.clear(); -#ifdef LLVA_KERNEL - PoolDescriptors.clear(); -#endif // Drop all intra-node references, so that assertions don't fail... for (node_iterator NI = node_begin(), E = node_end(); NI != E; ++NI) NI->dropAllReferences(); @@ -1540,10 +1376,6 @@ DSNode *New = new DSNode(*I, this); New->maskNodeTypes(~BitsToClear); OldNodeMap[I] = New; -#ifdef LLVA_KERNEL - if (G.getPoolForNode(&*I)) - PoolDescriptors[New] = G.getPoolForNode(&*I); -#endif } #ifndef NDEBUG @@ -1621,17 +1453,6 @@ // Merge the scalar map in. ScalarMap.spliceFrom(RHS.ScalarMap); - -#ifdef LLVA_KERNEL - //Take all from the pooldescriptor map -#if 0 - PoolDescriptors.swap(RHS.getPoolDescriptorsMap()); -#else - hash_map& rhsmap = RHS.getPoolDescriptorsMap(); - PoolDescriptors.insert(rhsmap.begin(), rhsmap.end()); -#endif - RHS.getPoolDescriptorsMap().clear(); -#endif } /// spliceFrom - Copy all entries from RHS, then clear RHS. Index: llvm-poolalloc/lib/DSA/Local.cpp diff -u llvm-poolalloc/lib/DSA/Local.cpp:1.158.2.4.2.3 llvm-poolalloc/lib/DSA/Local.cpp:1.158.2.4.2.4 --- llvm-poolalloc/lib/DSA/Local.cpp:1.158.2.4.2.3 Wed Mar 7 17:42:43 2007 +++ llvm-poolalloc/lib/DSA/Local.cpp Fri Mar 9 11:27:51 2007 @@ -593,9 +593,8 @@ { if (SI.getParent()->getParent()->getName() == "alloc_vfsmnt") { DSNode * N = getValueDest(*SI.getOperand(1)).getNode(); - if (G.getPoolDescriptorsMap().count(N) != 0) - if (G.getPoolDescriptorsMap()[N]) - std::cerr << "LLVA: Store: Pool for " << SI.getName() << " is " << G.getPoolDescriptorsMap()[N]->getName() << "\n"; + if (N->getMP()) + std::cerr << "LLVA: Store: Pool for " << SI.getName() << " is " << N->getMP() << "\n"; } } #endif @@ -1098,135 +1097,6 @@ if (DSNode *N = getValueDest(**(CS.arg_begin() + 1)).getNode()) N->setReadMarker(); return true; -#ifdef LLVA_KERNEL_0 - } else if (F->getName() == "kmem_cache_alloc") { - DEBUG(std::cerr << "LLVA: kmem_cache_alloc" << std::endl); - // Update the statistics count - ++CacheAllocs; - - // Create a new DSNode for this memory allocation - DSNode *N = createNode(); - N->setHeapNodeMarker(); - setDestTo(*CS.getInstruction(), N); - - // Get the pool handle - if (CS.arg_begin() == CS.arg_end()) { - abort(); //Hanlde this later - // Treat it as a kmalloc - N->foldNodeCompletely(); - //This becomes a kmalloc pool - MetaPoolHandle* tmpvh = new MetaPoolHandle(new MetaPool(KMallocPool)); - G.getPoolDescriptorsMap()[N] = tmpvh; - } else { - Value *actualPD = *(CS.arg_begin()); - if (!isa(actualPD)) { -#if 0 - std::cerr << "WARNING: Pool is not global. Function = " << CS.getCaller()->getName() << "\n"; -#endif - } else { - ++GlobalPools; - } - Value *TheMetaPool = actualPD; - if (G.getPoolDescriptorsMap().count(N)== 0) { - //Here we insert a global meta pool - //Get the Module first - Module * M = F->getParent(); - //Now create a meta pool for this value, DSN Node - const Type * VoidPtrType = PointerType::get(Type::SByteTy); - TheMetaPool = new GlobalVariable( - /*type=*/ VoidPtrType, - /*isConstant=*/ false, - /*Linkage=*/ GlobalValue::InternalLinkage, - /*initializer=*/ Constant::getNullValue(VoidPtrType), - /*name=*/ "_metaPool_", - /*parent=*/ M ); - //Inserted a global meta pool - } - //Now insert a function call that takes care of adding this pool to the global pool - - //First get the Insert point - Instruction *InsertPoint = CS.getInstruction(); - - //Assumes AddPoolDescToMetaPool is in the module - CastInst *CastMetaPool = - new CastInst(TheMetaPool, - PointerType::get(Type::SByteTy), "metapool.casted", InsertPoint); - CastInst *CastActualPD = - new CastInst(actualPD, - PointerType::get(Type::SByteTy), "poolhandle.lscasted", InsertPoint); - - // Create the call to AddPoolDescToMetaPool - std::vector args(1,CastMetaPool); - args.push_back(CastActualPD); - new CallInst(AddPoolDescToMetaPool,args,"", InsertPoint); - MetaPoolHandle* tmpvh = new MetaPoolHandle(new MetaPool(TheMetaPool)); - G.getPoolDescriptorsMap()[N] = tmpvh; - } - } else if (F->getName() == "poolalloc") { - if (CS.getCaller()->getName() == "kmem_cache_alloc") - return; - // Update the statistics - ++KMallocs; - - // Create a DSNode for the memory allocated by this function call - DSNode *N = createNode(); - N->setHeapNodeMarker(); - setDestTo(*CS.getInstruction(), N); - - // Get the pool handle, if possible - if (CS.arg_begin() == CS.arg_end()) { - abort(); //handle later - // Treat it as kmalloc - N->foldNodeCompletely(); - //This becomes a kmalloc pool - //So get the kmalloc pool - MetaPoolHandle* tmpvh = new MetaPoolHandle(new MetaPool(KMallocPool)); - G.getPoolDescriptorsMap()[N] = tmpvh; - } else { - Value *actualPD = *(CS.arg_begin()); - if (!isa(actualPD)) { -#if 0 - std::cerr << "WARNING: Pool is not global. Function = " << CS.getCaller()->getName() << "\n"; -#endif - } else { - ++GlobalPools; - } - Value *TheMetaPool = actualPD; - if (G.getPoolDescriptorsMap().count(N)== 0) { - //Here we insert a global meta pool - //Get the Module first - Module * M = F->getParent(); - //Now create a meta pool for this value, DSN Node - const Type * VoidPtrType = PointerType::get(Type::SByteTy); - TheMetaPool = new GlobalVariable( - /*type=*/ VoidPtrType, - /*isConstant=*/ false, - /*Linkage=*/ GlobalValue::InternalLinkage, - /*initializer=*/ Constant::getNullValue(VoidPtrType), - /*name=*/ "_metaPool_", - /*parent=*/ M ); - //Inserted a global meta pool - } - //Now insert a function call that takes care of adding this pool to the global pool - //First get the Insert point - Instruction *InsertPoint = CS.getInstruction(); - - //Assumes AddPoolDescToMetaPool is in the module - CastInst *CastMetaPool = - new CastInst(TheMetaPool, - PointerType::get(Type::SByteTy), "metapool.casted", InsertPoint); - CastInst *CastActualPD = - new CastInst(actualPD, - PointerType::get(Type::SByteTy), "poolhandle.lscasted", InsertPoint); - - // Create the call to AddPoolDescToMetaPool - std::vector args(1,CastMetaPool); - args.push_back(CastActualPD); - new CallInst(AddPoolDescToMetaPool,args,"", InsertPoint); - MetaPoolHandle* tmpvh = new MetaPoolHandle(new MetaPool(TheMetaPool)); - G.getPoolDescriptorsMap()[N] = tmpvh; - } -#endif #ifdef LLVA_KERNEL } else if (F->getName() == "llva_memcpy") { if (CS.getCaller()->getName() == "kmem_cache_alloc") @@ -1274,172 +1144,7 @@ void GraphBuilder::visitCallSite(CallSite CS) { Value *Callee = CS.getCalledValue(); - // Special case handling of certain libc allocation functions here. if (Function *F = dyn_cast(Callee)) { -#ifdef LLVA_KERNEL - if (F->getName() == "kmem_cache_alloc") { - DEBUG(std::cerr << "LLVA: kmem_cache_alloc" << std::endl); - // Update the statistics count - ++CacheAllocs; - - // Create a new DSNode for this memory allocation - DSNode *N = createNode(); - N->setHeapNodeMarker(); - setDestTo(*CS.getInstruction(), N); - - // Get the pool handle - if (CS.arg_begin() == CS.arg_end()) { - abort(); //Handle this later - // Treat it as a kmalloc - N->foldNodeCompletely(); - //This becomes a kmalloc pool - MetaPoolHandle* mpvh = new MetaPoolHandle(new MetaPool(KMallocPool)); - G.getPoolDescriptorsMap()[N] = mpvh; - } else { - Value *actualPD = *(CS.arg_begin()); - if (!isa(actualPD)) { -#if 0 - std::cerr << "WARNING: Pool is not global. Function = " << CS.getCaller()->getName() << "\n"; -#endif - } else { - ++GlobalPools; - } - Value *TheMetaPool = actualPD; - //Get the Module first - Module * M = F->getParent(); - if (G.getPoolDescriptorsMap().count(N)== 0) { - //Here we insert a global meta pool - //Now create a meta pool for this value, DSN Node - const Type * VoidPtrType = PointerType::get(Type::SByteTy); - TheMetaPool = new GlobalVariable( - /*type=*/ VoidPtrType, - /*isConstant=*/ false, - /*Linkage=*/ GlobalValue::InternalLinkage, - /*initializer=*/ Constant::getNullValue(VoidPtrType), - /*name=*/ "_metaPool_", - /*parent=*/ M ); - //Inserted a global meta pool - } -#if 1 - else { - // Lookup the meta pool - TheMetaPool = G.getPoolForNode(N)->getMetaPoolValue(); - } -#endif - //Now insert a function call that takes care of adding this pool to the global pool - - //First get the Insert point - Instruction *InsertPoint = CS.getInstruction(); - - //Assumes AddPoolDescToMetaPool is in the module - const Type * VoidPtrType = PointerType::get(Type::SByteTy); - const Type * VoidPtrPtrType = PointerType::get(VoidPtrType); - CastInst *CastMetaPool = - new CastInst(TheMetaPool, - VoidPtrPtrType, "metapool.casted", InsertPoint); - CastInst *CastActualPD = - new CastInst(actualPD, - PointerType::get(Type::SByteTy), "poolhandle.lscasted", InsertPoint); - - // Create the call to AddPoolDescToMetaPool - std::vector args(1,CastMetaPool); - args.push_back(CastActualPD); - - //Get the AddPoolDescToMetaPool function from the module - //FIXME optimize it by getting it once per module - std::vector Arg(1, VoidPtrPtrType); - Arg.push_back(VoidPtrType); - FunctionType *AddPoolDescToMetaPoolTy = - FunctionType::get(Type::VoidTy,Arg, false); - Function *AddPoolDescToMetaPool = M->getOrInsertFunction("AddPoolDescToMetaPool", AddPoolDescToMetaPoolTy); - - - new CallInst(AddPoolDescToMetaPool,args,"", InsertPoint); -#if 0 - MetaPoolHandle* tmpvh = new MetaPoolHandle(new MetaPool(TheMetaPool)); -#else - MetaPoolHandle* tmpvh = new MetaPoolHandle(new MetaPool(TheMetaPool), CS.getInstruction()); -#endif - G.getPoolDescriptorsMap()[N] = tmpvh; - } - return; - } else if (F->getName() == "poolalloc") { - if (CS.getCaller()->getName() == "kmem_cache_alloc") - return; - // Update the statistics - ++KMallocs; - - // Create a DSNode for the memory allocated by this function call - DSNode *N = createNode(); - N->setHeapNodeMarker(); - setDestTo(*CS.getInstruction(), N); - - // Get the pool handle, if possible - if (CS.arg_begin() == CS.arg_end()) { - abort() ; //Handle this later - // Treat it as kmalloc - N->foldNodeCompletely(); - //This becomes a kmalloc pool - //So get the kmalloc pool - MetaPoolHandle* tmpvh = new MetaPoolHandle(new MetaPool(KMallocPool)); - G.getPoolDescriptorsMap()[N] = tmpvh; - } else { - Value *actualPD = *(CS.arg_begin()); - if (!isa(actualPD)) { -#if 0 - std::cerr << "WARNING: Pool is not global. Function = " << CS.getCaller()->getName() << "\n"; -#endif - } else { - ++GlobalPools; - } - Value *TheMetaPool = actualPD; - Module * M = F->getParent(); - if (G.getPoolDescriptorsMap().count(N)== 0) { - //Here we insert a global meta pool - //Get the Module first - //Now create a meta pool for this value, DSN Node - const Type * VoidPtrType = PointerType::get(Type::SByteTy); - TheMetaPool = new GlobalVariable( - /*type=*/ VoidPtrType, - /*isConstant=*/ false, - /*Linkage=*/ GlobalValue::InternalLinkage, - /*initializer=*/ Constant::getNullValue(VoidPtrType), - /*name=*/ "_metaPool_", - /*parent=*/ M ); - //Inserted a global meta pool - } - //Now insert a function call that takes care of adding this pool to the global pool - //First get the Insert point - Instruction *InsertPoint = CS.getInstruction(); - - //Assumes AddPoolDescToMetaPool is in the module - const Type * VoidPtrType = PointerType::get(Type::SByteTy); - const Type * VoidPtrPtrType = PointerType::get(VoidPtrType); - CastInst *CastMetaPool = - new CastInst(TheMetaPool, - VoidPtrPtrType, "metapool.casted", InsertPoint); - CastInst *CastActualPD = - new CastInst(actualPD, - PointerType::get(Type::SByteTy), "poolhandle.lscasted", InsertPoint); - - // Create the call to AddPoolDescToMetaPool - std::vector args(1,CastMetaPool); - args.push_back(CastActualPD); - - //FIXME optimize it by getting it once per module - std::vector Arg(1, VoidPtrPtrType); - Arg.push_back(VoidPtrType); - FunctionType *AddPoolDescToMetaPoolTy = - FunctionType::get(Type::VoidTy,Arg, false); - Function *AddPoolDescToMetaPool = M->getOrInsertFunction("AddPoolDescToMetaPool", AddPoolDescToMetaPoolTy); - - new CallInst(AddPoolDescToMetaPool,args,"", InsertPoint); - MetaPoolHandle* tmpvh = new MetaPoolHandle(new MetaPool(TheMetaPool)); - G.getPoolDescriptorsMap()[N] = tmpvh; - } - return; - } -#endif if (F->isExternal()) if (F->isIntrinsic() && visitIntrinsic(CS, F)) return; @@ -1447,8 +1152,10 @@ // Determine if the called function is one of the specified heap // allocation functions if (AllocList.end() != std::find(AllocList.begin(), AllocList.end(), F->getName())) { - setDestTo(*CS.getInstruction(), - createNode()->setHeapNodeMarker()->setModifiedMarker()); + DSNode* N = createNode()->setHeapNodeMarker()->setModifiedMarker(); + setDestTo(*CS.getInstruction(), N); + MetaPool* MP = new MetaPool(CS); + N->setMP(MP); return; } @@ -1606,6 +1313,10 @@ // Get a node handle to the global node and merge the initializer into it. DSNodeHandle NH = getValueDest(*GV); MergeConstantInitIntoNode(NH, GV->getInitializer()); + MetaPool* MP = new MetaPool(GV); + if (NH.getNode()->getMP()) + MP->merge(NH.getNode()->getMP()); + NH.getNode()->setMP(MP); } @@ -1692,6 +1403,13 @@ } bool LocalDataStructures::runOnModule(Module &M) { + +#ifdef LLVA_KERNEL + AllocList.push_back("kmalloc"); + AllocList.push_back("__vmalloc"); + AllocList.push_back("kmem_cache_alloc"); +#endif + const TargetData &TD = getAnalysis(); // First step, build the globals graph. @@ -1713,49 +1431,6 @@ DEBUG(std::cerr << "Eliminating " << ECGlobals.size() << " EC Globals!\n"); ECGlobals.clear(); -#ifdef LLVA_KERNEL - // - // Scan through all the globals; if they have a DSNode but no MetaPool, give - // them a MetaPool. - // - const Type * VoidPtrType = PointerType::get(Type::SByteTy); - for (Module::global_iterator I = M.global_begin(), E = M.global_end(); - I != E; ++I) { - // Skip functions and externally declared variables - if (!isa(I)) continue; - if (I->isExternal()) continue; - - GlobalValue * GV = I; - GlobalValue * GVL = GlobalsGraph->getScalarMap().getLeaderForGlobal(I); - DSNode *Node = GlobalsGraph->getNodeForValue(GVL).getNode(); - - // If this global happens to be a MetaPool, it will have no DSNode. - // In that case, do not assign a MetaPool. - if (!Node) continue; - - // - // Add the MetaPool for the DSNode if it does not already have one. - // - if (GlobalsGraph->getPoolDescriptorsMap().count(Node) == 0) { - Value * TheMetaPool = 0; - TheMetaPool = new GlobalVariable( - /*type=*/ VoidPtrType, - /*isConstant=*/ false, - /*Linkage=*/ GlobalValue::InternalLinkage, - /*initializer=*/ Constant::getNullValue(VoidPtrType), - /*name=*/ "_metaPool_", - /*parent=*/ &M ); - - // - // Create the internal data structure for the MetaPool and associate the - // DSNode with it. - // - MetaPoolHandle* tmpvh = new MetaPoolHandle(new MetaPool(TheMetaPool), NULL); - GlobalsGraph->getPoolDescriptorsMap()[Node] = tmpvh; - } - } -#endif - // Calculate all of the graphs... for (Module::iterator I = M.begin(), E = M.end(); I != E; ++I) if (!I->isExternal()) From baldrick at free.fr Fri Mar 9 12:09:03 2007 From: baldrick at free.fr (Duncan Sands) Date: Fri, 9 Mar 2007 19:09:03 +0100 Subject: [llvm-commits] llvm-gcc: "support" for update_setjmp_buf Message-ID: <200703091909.03319.baldrick@free.fr> The same level of support as for setjmp and longjmp ;) Duncan. -------------- next part -------------- A non-text attachment was scrubbed... Name: setjmp.diff Type: text/x-diff Size: 523 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20070309/4b770dc3/attachment.bin From dalej at apple.com Fri Mar 9 11:58:35 2007 From: dalej at apple.com (Dale Johannesen) Date: Fri, 9 Mar 2007 11:58:35 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/ARM/README.txt Message-ID: <200703091758.l29HwZWA022509@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/ARM: README.txt updated: 1.15 -> 1.16 --- Log message: Add some observations from CoreGraphics benchmark. Remove register scavenging todo item, since it is now implemented. --- Diffs of the changes: (+47 -47) README.txt | 94 ++++++++++++++++++++++++++++++------------------------------- 1 files changed, 47 insertions(+), 47 deletions(-) Index: llvm/lib/Target/ARM/README.txt diff -u llvm/lib/Target/ARM/README.txt:1.15 llvm/lib/Target/ARM/README.txt:1.16 --- llvm/lib/Target/ARM/README.txt:1.15 Wed Feb 28 12:41:23 2007 +++ llvm/lib/Target/ARM/README.txt Fri Mar 9 11:58:17 2007 @@ -140,6 +140,29 @@ aligned on 8-byte boundary. This requires more information on load / store nodes (and MI's?) then we currently carry. +6) (From CoreGraphics): struct copies appear to be done field by field +instead of by words, at least sometimes: + +struct foo { int x; short s; char c1; char c2; }; +void cpy(struct foo*a, struct foo*b) { *a = *b; } + +llvm code (-O2) + ldrb r3, [r1, #+6] + ldr r2, [r1] + ldrb r12, [r1, #+7] + ldrh r1, [r1, #+4] + str r2, [r0] + strh r1, [r0, #+4] + strb r3, [r0, #+6] + strb r12, [r0, #+7] +gcc code (-O2) + ldmia r1, {r1-r2} + stmia r0, {r1-r2} + +In this benchmark poor handling of aggregate copies has shown up as +having a large effect on size, and possibly speed as well (we don't have +a good way to measure on ARM). + //===---------------------------------------------------------------------===// * Consider this silly example: @@ -282,53 +305,8 @@ //===---------------------------------------------------------------------===// -We need register scavenging. Currently, the 'ip' register is reserved in case -frame indexes are too big. This means that we generate extra code for stuff -like this: - -void foo(unsigned x, unsigned y, unsigned z, unsigned *a, unsigned *b, unsigned *c) { - short Rconst = (short) (16384.0f * 1.40200 + 0.5 ); - *a = x * Rconst; - *b = y * Rconst; - *c = z * Rconst; -} - -we compile it to: - -_foo: -*** stmfd sp!, {r4, r7} -*** add r7, sp, #4 - mov r4, #186 - orr r4, r4, #89, 24 @ 22784 - mul r0, r0, r4 - str r0, [r3] - mul r0, r1, r4 - ldr r1, [sp, #+8] - str r0, [r1] - mul r0, r2, r4 - ldr r1, [sp, #+12] - str r0, [r1] -*** sub sp, r7, #4 -*** ldmfd sp!, {r4, r7} - bx lr - -GCC produces: - -_foo: - ldr ip, L4 - mul r0, ip, r0 - mul r1, ip, r1 - str r0, [r3, #0] - ldr r3, [sp, #0] - mul r2, ip, r2 - str r1, [r3, #0] - ldr r3, [sp, #4] - str r2, [r3, #0] - bx lr -L4: - .long 22970 - -This is apparently all because we couldn't use ip here. +Register scavenging is now implemented. The example in the previous version +of this document produces optimal code at -O2. //===---------------------------------------------------------------------===// @@ -449,3 +427,25 @@ http://citeseer.ist.psu.edu/debus04linktime.html //===---------------------------------------------------------------------===// +(CoreGraphics): gcc generates smaller code for this function at -O2 or -Os: + +void foo(signed char* p) { + if (*p == 3) + bar(); + else if (*p == 4) + baz(); + else if (*p == 5) + quux(); +} + +llvm decides it's a good idea to turn the repeated if...else into a +binary tree, as if it were a switch; the resulting code requires -1 +compare-and-branches when *p<=2 or *p==5, the same number if *p==4 +or *p>6, and +1 if *p==3. So it should be a speed win +(on balance). However, the revised code is larger, with 4 conditional +branches instead of 3. + +More seriously, there is a byte->word extend before +each comparison, where there should be only one, and the condition codes +are not remembered when the same two values are compared twice. + From dalej at apple.com Fri Mar 9 13:19:16 2007 From: dalej at apple.com (Dale Johannesen) Date: Fri, 9 Mar 2007 13:19:16 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/ARM/README.txt Message-ID: <200703091919.l29JJGIF023955@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/ARM: README.txt updated: 1.16 -> 1.17 --- Log message: apply comments from review of last patch --- Diffs of the changes: (+2 -2) README.txt | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/lib/Target/ARM/README.txt diff -u llvm/lib/Target/ARM/README.txt:1.16 llvm/lib/Target/ARM/README.txt:1.17 --- llvm/lib/Target/ARM/README.txt:1.16 Fri Mar 9 11:58:17 2007 +++ llvm/lib/Target/ARM/README.txt Fri Mar 9 13:18:59 2007 @@ -140,7 +140,7 @@ aligned on 8-byte boundary. This requires more information on load / store nodes (and MI's?) then we currently carry. -6) (From CoreGraphics): struct copies appear to be done field by field +6) struct copies appear to be done field by field instead of by words, at least sometimes: struct foo { int x; short s; char c1; char c2; }; @@ -427,7 +427,7 @@ http://citeseer.ist.psu.edu/debus04linktime.html //===---------------------------------------------------------------------===// -(CoreGraphics): gcc generates smaller code for this function at -O2 or -Os: +gcc generates smaller code for this function at -O2 or -Os: void foo(signed char* p) { if (*p == 3) From reid at x10sys.com Fri Mar 9 13:27:09 2007 From: reid at x10sys.com (Reid Spencer) Date: Fri, 9 Mar 2007 13:27:09 -0600 Subject: [llvm-commits] CVS: llvm/lib/AsmParser/Lexer.l Message-ID: <200703091927.l29JR9m7024098@zion.cs.uiuc.edu> Changes in directory llvm/lib/AsmParser: Lexer.l updated: 1.99 -> 1.100 --- Log message: For PR1245: http://llvm.org/PR1245 : Account for the sign bit when computing the number of bits required for a negative integer literal constant. --- Diffs of the changes: (+1 -1) Lexer.l | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/AsmParser/Lexer.l diff -u llvm/lib/AsmParser/Lexer.l:1.99 llvm/lib/AsmParser/Lexer.l:1.100 --- llvm/lib/AsmParser/Lexer.l:1.99 Tue Feb 27 20:24:27 2007 +++ llvm/lib/AsmParser/Lexer.l Fri Mar 9 13:26:52 2007 @@ -377,7 +377,7 @@ } } {NInteger} { int len = strlen(yytext); - uint32_t numBits = (((len-1) * 64) / 19) + 1; + uint32_t numBits = (((len-1) * 64) / 19) + 2; APInt Tmp(numBits, yytext, len, 10); uint32_t minBits = Tmp.getMinSignedBits(); if (minBits > 0 && minBits < numBits) From evan.cheng at apple.com Fri Mar 9 13:35:08 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Fri, 9 Mar 2007 13:35:08 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/ARM/README.txt Message-ID: <200703091935.l29JZ8G7024273@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/ARM: README.txt updated: 1.17 -> 1.18 --- Log message: Unfinished work and ideas related to register scavenger. --- Diffs of the changes: (+14 -0) README.txt | 14 ++++++++++++++ 1 files changed, 14 insertions(+) Index: llvm/lib/Target/ARM/README.txt diff -u llvm/lib/Target/ARM/README.txt:1.17 llvm/lib/Target/ARM/README.txt:1.18 --- llvm/lib/Target/ARM/README.txt:1.17 Fri Mar 9 13:18:59 2007 +++ llvm/lib/Target/ARM/README.txt Fri Mar 9 13:34:51 2007 @@ -427,6 +427,7 @@ http://citeseer.ist.psu.edu/debus04linktime.html //===---------------------------------------------------------------------===// + gcc generates smaller code for this function at -O2 or -Os: void foo(signed char* p) { @@ -449,3 +450,16 @@ each comparison, where there should be only one, and the condition codes are not remembered when the same two values are compared twice. +//===---------------------------------------------------------------------===// + +More register scavenging work: + +1. Use the register scavenger to track frame index materialized into registers + (those that do not fit in addressing modes) to allow reuse in the same BB. +2. Finish scavenging for Thumb. +3. We know some spills and restores are unnecessary. The issue is once live + intervals are merged, they are not never split. So every def is spilled + and every use requires a restore if the register allocator decides the + resulting live interval is not assigned a physical register. It may be + possible (with the help of the scavenger) to turn some spill / restore + pairs into register copies. From evan.cheng at apple.com Fri Mar 9 13:35:53 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Fri, 9 Mar 2007 13:35:53 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/ARM/README.txt Message-ID: <200703091935.l29JZrnd024298@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/ARM: README.txt updated: 1.18 -> 1.19 --- Log message: Add comments about LSR / ARM. --- Diffs of the changes: (+4 -0) README.txt | 4 ++++ 1 files changed, 4 insertions(+) Index: llvm/lib/Target/ARM/README.txt diff -u llvm/lib/Target/ARM/README.txt:1.18 llvm/lib/Target/ARM/README.txt:1.19 --- llvm/lib/Target/ARM/README.txt:1.18 Fri Mar 9 13:34:51 2007 +++ llvm/lib/Target/ARM/README.txt Fri Mar 9 13:35:33 2007 @@ -463,3 +463,7 @@ resulting live interval is not assigned a physical register. It may be possible (with the help of the scavenger) to turn some spill / restore pairs into register copies. + +//===---------------------------------------------------------------------===// + +Teach LSR about ARM addressing modes. From evan.cheng at apple.com Fri Mar 9 13:46:23 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Fri, 9 Mar 2007 13:46:23 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/ARM/README.txt Message-ID: <200703091946.l29JkNO9024504@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/ARM: README.txt updated: 1.19 -> 1.20 --- Log message: Minor stuff. --- Diffs of the changes: (+4 -0) README.txt | 4 ++++ 1 files changed, 4 insertions(+) Index: llvm/lib/Target/ARM/README.txt diff -u llvm/lib/Target/ARM/README.txt:1.19 llvm/lib/Target/ARM/README.txt:1.20 --- llvm/lib/Target/ARM/README.txt:1.19 Fri Mar 9 13:35:33 2007 +++ llvm/lib/Target/ARM/README.txt Fri Mar 9 13:46:06 2007 @@ -30,6 +30,10 @@ 3. There might be some compile-time efficiency to be had by representing consecutive islands as a single block rather than multiple blocks. +4. Use a priority queue to sort constant pool users in inverse order of + position so we always process the one closed to the end of functions + first. This may simply CreateNewWater. + //===---------------------------------------------------------------------===// We need to start generating predicated instructions. The .td files have a way From evan.cheng at apple.com Fri Mar 9 14:46:47 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Fri, 9 Mar 2007 12:46:47 -0800 Subject: [llvm-commits] Updated LowerSwitch pass In-Reply-To: <1173042076.12999.65.camel@asl.dorms.spbu.ru> References: <1173042076.12999.65.camel@asl.dorms.spbu.ru> Message-ID: <4405CE8C-13B8-4C29-AFC2-D2814894F285@apple.com> Chris has reviewed the previous patches, right? If so, this looks good, please commit. Evan On Mar 4, 2007, at 1:01 PM, Anton Korobeynikov wrote: > Hello, Everyone. > > This is updated LowerSwitch patch. I've also attached examples - > before > & after. I'll add testcase soon after commit. > > -- > With best regards, Anton Korobeynikov. > > Faculty of Mathematics & Mechanics, Saint Petersburg State University. > > > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From reid at x10sys.com Fri Mar 9 15:19:26 2007 From: reid at x10sys.com (Reid Spencer) Date: Fri, 9 Mar 2007 15:19:26 -0600 Subject: [llvm-commits] CVS: llvm/lib/AsmParser/Lexer.cpp.cvs Lexer.l.cvs Message-ID: <200703092119.l29LJQGr026105@zion.cs.uiuc.edu> Changes in directory llvm/lib/AsmParser: Lexer.cpp.cvs updated: 1.32 -> 1.33 Lexer.l.cvs updated: 1.26 -> 1.27 --- Log message: Regenerate. --- Diffs of the changes: (+3 -3) Lexer.cpp.cvs | 4 ++-- Lexer.l.cvs | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) Index: llvm/lib/AsmParser/Lexer.cpp.cvs diff -u llvm/lib/AsmParser/Lexer.cpp.cvs:1.32 llvm/lib/AsmParser/Lexer.cpp.cvs:1.33 --- llvm/lib/AsmParser/Lexer.cpp.cvs:1.32 Tue Feb 27 20:24:54 2007 +++ llvm/lib/AsmParser/Lexer.cpp.cvs Fri Mar 9 15:19:09 2007 @@ -20,7 +20,7 @@ /* A lexical scanner generated by flex*/ /* Scanner skeleton version: - * $Header: /var/cvs/llvm/llvm/lib/AsmParser/Lexer.cpp.cvs,v 1.32 2007/02/28 02:24:54 reid Exp $ + * $Header: /var/cvs/llvm/llvm/lib/AsmParser/Lexer.cpp.cvs,v 1.33 2007/03/09 21:19:09 reid Exp $ */ #define FLEX_SCANNER @@ -1940,7 +1940,7 @@ YY_RULE_SETUP #line 379 "/proj/llvm/llvm-1/lib/AsmParser/Lexer.l" { int len = strlen(yytext); - uint32_t numBits = (((len-1) * 64) / 19) + 1; + uint32_t numBits = (((len-1) * 64) / 19) + 2; APInt Tmp(numBits, yytext, len, 10); uint32_t minBits = Tmp.getMinSignedBits(); if (minBits > 0 && minBits < numBits) Index: llvm/lib/AsmParser/Lexer.l.cvs diff -u llvm/lib/AsmParser/Lexer.l.cvs:1.26 llvm/lib/AsmParser/Lexer.l.cvs:1.27 --- llvm/lib/AsmParser/Lexer.l.cvs:1.26 Tue Feb 27 20:24:54 2007 +++ llvm/lib/AsmParser/Lexer.l.cvs Fri Mar 9 15:19:09 2007 @@ -377,7 +377,7 @@ } } {NInteger} { int len = strlen(yytext); - uint32_t numBits = (((len-1) * 64) / 19) + 1; + uint32_t numBits = (((len-1) * 64) / 19) + 2; APInt Tmp(numBits, yytext, len, 10); uint32_t minBits = Tmp.getMinSignedBits(); if (minBits > 0 && minBits < numBits) From dpatel at apple.com Fri Mar 9 15:20:15 2007 From: dpatel at apple.com (Devang Patel) Date: Fri, 9 Mar 2007 15:20:15 -0600 Subject: [llvm-commits] CVS: llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp Message-ID: <200703092120.l29LKFwT026138@zion.cs.uiuc.edu> Changes in directory llvm/lib/Transforms/Scalar: LoopStrengthReduce.cpp updated: 1.115 -> 1.116 --- Log message: Increment iterator now because IVUseShouldUsePostIncValue may remove User from the list of I users. --- Diffs of the changes: (+6 -2) LoopStrengthReduce.cpp | 8 ++++++-- 1 files changed, 6 insertions(+), 2 deletions(-) Index: llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp diff -u llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp:1.115 llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp:1.116 --- llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp:1.115 Tue Mar 6 15:14:09 2007 +++ llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp Fri Mar 9 15:19:53 2007 @@ -400,10 +400,14 @@ SCEVHandle Stride = Start; if (!getSCEVStartAndStride(ISE, L, Start, Stride)) return false; // Non-reducible symbolic expression, bail out. - - for (Value::use_iterator UI = I->use_begin(), E = I->use_end(); UI != E;++UI){ + + for (Value::use_iterator UI = I->use_begin(), E = I->use_end(); UI != E;) { Instruction *User = cast(*UI); + // Increment iterator now because IVUseShouldUsePostIncValue may remove + // User from the list of I users. + ++UI; + // Do not infinitely recurse on PHI nodes. if (isa(User) && Processed.count(User)) continue; From dpatel at apple.com Fri Mar 9 17:39:31 2007 From: dpatel at apple.com (Devang Patel) Date: Fri, 9 Mar 2007 17:39:31 -0600 Subject: [llvm-commits] CVS: llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp Message-ID: <200703092339.l29NdVwd028428@zion.cs.uiuc.edu> Changes in directory llvm/lib/Transforms/Utils: PromoteMemoryToRegister.cpp updated: 1.93 -> 1.94 --- Log message: Avoid recursion. Use iterative algorithm for RenamePass(). --- Diffs of the changes: (+31 -4) PromoteMemoryToRegister.cpp | 35 +++++++++++++++++++++++++++++++---- 1 files changed, 31 insertions(+), 4 deletions(-) Index: llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp diff -u llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp:1.93 llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp:1.94 --- llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp:1.93 Tue Feb 6 19:15:04 2007 +++ llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp Fri Mar 9 17:39:14 2007 @@ -72,6 +72,17 @@ } namespace { + + // Data package used by RenamePass() + class VISIBILITY_HIDDEN RenamePassData { + public: + RenamePassData(BasicBlock *B, BasicBlock *P, + std::vector V) : BB(B), Pred(P), Values(V) {} + BasicBlock *BB; + BasicBlock *Pred; + std::vector Values; + }; + struct VISIBILITY_HIDDEN PromoteMem2Reg { /// Allocas - The alloca instructions being promoted. /// @@ -111,6 +122,9 @@ /// non-determinstic behavior. DenseMap BBNumbers; + /// RenamePassWorkList - Worklist used by RenamePass() + std::vector RenamePassWorkList; + public: PromoteMem2Reg(const std::vector &A, SmallVector &Retry, DominatorTree &dt, @@ -146,6 +160,7 @@ bool QueuePhiNode(BasicBlock *BB, unsigned AllocaIdx, unsigned &Version, SmallPtrSet &InsertedPHINodes); }; + } // end of anonymous namespace void PromoteMem2Reg::run() { @@ -391,8 +406,17 @@ // Walks all basic blocks in the function performing the SSA rename algorithm // and inserting the phi nodes we marked as necessary // - RenamePass(F.begin(), 0, Values); - + //RenamePass(F.begin(), 0, Values); + RenamePassWorkList.clear(); + RenamePassData *RPD = new RenamePassData(F.begin(), 0, Values); + RenamePassWorkList.push_back(RPD); + while(!RenamePassWorkList.empty()) { + RenamePassData *RPD = RenamePassWorkList.back(); RenamePassWorkList.pop_back(); + // RenamePass may add new worklist entries. + RenamePass(RPD->BB, RPD->Pred, RPD->Values); + delete RPD; + } + // The renamer uses the Visited set to avoid infinite loops. Clear it now. Visited.clear(); @@ -772,8 +796,11 @@ // Recurse to our successors. TerminatorInst *TI = BB->getTerminator(); for (unsigned i = 0; i != TI->getNumSuccessors(); i++) { - std::vector OutgoingVals(IncomingVals); - RenamePass(TI->getSuccessor(i), BB, OutgoingVals); + RenamePassData *RPD = new RenamePassData(TI->getSuccessor(i), BB, + IncomingVals); + RenamePassWorkList.push_back(RPD); + // std::vector OutgoingVals(IncomingVals); + // RenamePass(TI->getSuccessor(i), BB, OutgoingVals); } } From dpatel at apple.com Fri Mar 9 17:41:20 2007 From: dpatel at apple.com (Devang Patel) Date: Fri, 9 Mar 2007 17:41:20 -0600 Subject: [llvm-commits] CVS: llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp Message-ID: <200703092341.l29NfKAb028475@zion.cs.uiuc.edu> Changes in directory llvm/lib/Transforms/Utils: PromoteMemoryToRegister.cpp updated: 1.94 -> 1.95 --- Log message: Remove dead comments. --- Diffs of the changes: (+0 -3) PromoteMemoryToRegister.cpp | 3 --- 1 files changed, 3 deletions(-) Index: llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp diff -u llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp:1.94 llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp:1.95 --- llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp:1.94 Fri Mar 9 17:39:14 2007 +++ llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp Fri Mar 9 17:41:03 2007 @@ -406,7 +406,6 @@ // Walks all basic blocks in the function performing the SSA rename algorithm // and inserting the phi nodes we marked as necessary // - //RenamePass(F.begin(), 0, Values); RenamePassWorkList.clear(); RenamePassData *RPD = new RenamePassData(F.begin(), 0, Values); RenamePassWorkList.push_back(RPD); @@ -799,8 +798,6 @@ RenamePassData *RPD = new RenamePassData(TI->getSuccessor(i), BB, IncomingVals); RenamePassWorkList.push_back(RPD); - // std::vector OutgoingVals(IncomingVals); - // RenamePass(TI->getSuccessor(i), BB, OutgoingVals); } } From dpatel at apple.com Fri Mar 9 17:59:47 2007 From: dpatel at apple.com (dpatel at apple.com) Date: Fri, 9 Mar 2007 15:59:47 -0800 (PST) Subject: [llvm-commits] [124795] Ignore BUILT_IN_UPDATE_SETJMP_BUF. Message-ID: <20070309235947.6A9168E44FAA@src> Revision: 124795 Author: dpatel Date: 2007-03-09 15:59:47 -0800 (Fri, 09 Mar 2007) Log Message: ----------- Ignore BUILT_IN_UPDATE_SETJMP_BUF. Patch by Duncan Sands. Modified Paths: -------------- apple-local/branches/llvm/gcc/llvm-convert.cpp Modified: apple-local/branches/llvm/gcc/llvm-convert.cpp =================================================================== --- apple-local/branches/llvm/gcc/llvm-convert.cpp 2007-03-09 21:37:10 UTC (rev 124794) +++ apple-local/branches/llvm/gcc/llvm-convert.cpp 2007-03-09 23:59:47 UTC (rev 124795) @@ -3928,6 +3928,7 @@ case BUILT_IN_AGGREGATE_INCOMING_ADDRESS: case BUILT_IN_SETJMP: case BUILT_IN_LONGJMP: + case BUILT_IN_UPDATE_SETJMP_BUF: case BUILT_IN_TRAP: // Various hooks for the DWARF 2 __throw routine. From reid at x10sys.com Fri Mar 9 23:58:14 2007 From: reid at x10sys.com (Reid Spencer) Date: Fri, 9 Mar 2007 23:58:14 -0600 Subject: [llvm-commits] CVS: llvm-stacker/lib/compiler/StackerCompiler.cpp Message-ID: <200703100558.l2A5wE2Q002008@zion.cs.uiuc.edu> Changes in directory llvm-stacker/lib/compiler: StackerCompiler.cpp updated: 1.36 -> 1.37 --- Log message: Add required header file. --- Diffs of the changes: (+1 -0) StackerCompiler.cpp | 1 + 1 files changed, 1 insertion(+) Index: llvm-stacker/lib/compiler/StackerCompiler.cpp diff -u llvm-stacker/lib/compiler/StackerCompiler.cpp:1.36 llvm-stacker/lib/compiler/StackerCompiler.cpp:1.37 --- llvm-stacker/lib/compiler/StackerCompiler.cpp:1.36 Tue Mar 6 11:46:45 2007 +++ llvm-stacker/lib/compiler/StackerCompiler.cpp Fri Mar 9 23:57:57 2007 @@ -14,6 +14,7 @@ #define DEBUG_TYPE "stacker" #include "llvm/PassManager.h" +#include "llvm/Analysis/LoopPass.h" #include "llvm/Analysis/LoadValueNumbering.h" #include "llvm/Analysis/Verifier.h" #include "llvm/Assembly/Parser.h" From isanbard at gmail.com Sat Mar 10 03:57:26 2007 From: isanbard at gmail.com (Bill Wendling) Date: Sat, 10 Mar 2007 03:57:26 -0600 Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp X86InstrMMX.td Message-ID: <200703100957.l2A9vQ3i005607@zion.cs.uiuc.edu> Changes in directory llvm/lib/Target/X86: X86ISelLowering.cpp updated: 1.365 -> 1.366 X86InstrMMX.td updated: 1.18 -> 1.19 --- Log message: Adding more arithmetic operators to MMX. This is an almost exact copy of the addition. Please let me know if you have suggestions. --- Diffs of the changes: (+14 -0) X86ISelLowering.cpp | 4 ++++ X86InstrMMX.td | 10 ++++++++++ 2 files changed, 14 insertions(+) Index: llvm/lib/Target/X86/X86ISelLowering.cpp diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.365 llvm/lib/Target/X86/X86ISelLowering.cpp:1.366 --- llvm/lib/Target/X86/X86ISelLowering.cpp:1.365 Thu Mar 8 16:09:11 2007 +++ llvm/lib/Target/X86/X86ISelLowering.cpp Sat Mar 10 03:57:05 2007 @@ -331,6 +331,10 @@ setOperationAction(ISD::ADD, MVT::v4i16, Legal); setOperationAction(ISD::ADD, MVT::v2i32, Legal); + setOperationAction(ISD::SUB, MVT::v8i8, Legal); + setOperationAction(ISD::SUB, MVT::v4i16, Legal); + setOperationAction(ISD::SUB, MVT::v2i32, Legal); + setOperationAction(ISD::LOAD, MVT::v8i8, Promote); AddPromotedToType (ISD::LOAD, MVT::v8i8, MVT::v2i32); setOperationAction(ISD::LOAD, MVT::v4i16, Promote); Index: llvm/lib/Target/X86/X86InstrMMX.td diff -u llvm/lib/Target/X86/X86InstrMMX.td:1.18 llvm/lib/Target/X86/X86InstrMMX.td:1.19 --- llvm/lib/Target/X86/X86InstrMMX.td:1.18 Thu Mar 8 16:09:11 2007 +++ llvm/lib/Target/X86/X86InstrMMX.td Sat Mar 10 03:57:05 2007 @@ -101,6 +101,16 @@ defm MMX_PADDUSB : MMXI_binop_rm_int<0xDC, "paddusb", int_x86_mmx_paddus_b, 1>; defm MMX_PADDUSW : MMXI_binop_rm_int<0xDD, "paddusw", int_x86_mmx_paddus_w, 1>; +defm MMX_PSUBB : MMXI_binop_rm<0xF8, "psubb", sub, v8i8>; +defm MMX_PSUBW : MMXI_binop_rm<0xF9, "psubw", sub, v4i16>; +defm MMX_PSUBD : MMXI_binop_rm<0xFA, "psubd", sub, v2i32>; + +defm MMX_PSUBSB : MMXI_binop_rm_int<0xE8, "psubsb" , int_x86_mmx_psubs_b>; +defm MMX_PSUBSW : MMXI_binop_rm_int<0xE9, "psubsw" , int_x86_mmx_psubs_w>; + +defm MMX_PSUBUSB : MMXI_binop_rm_int<0xD8, "psubusb", int_x86_mmx_psubus_b>; +defm MMX_PSUBUSW : MMXI_binop_rm_int<0xD9, "psubusw", int_x86_mmx_psubus_w>; + // Move Instructions def MOVD64rr : MMXI<0x6E, MRMSrcReg, (ops VR64:$dst, GR32:$src), "movd {$src, $dst|$dst, $src}", []>; From isanbard at gmail.com Sat Mar 10 03:57:27 2007 From: isanbard at gmail.com (Bill Wendling) Date: Sat, 10 Mar 2007 03:57:27 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/IntrinsicsX86.td Message-ID: <200703100957.l2A9vR3E005613@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm: IntrinsicsX86.td updated: 1.33 -> 1.34 --- Log message: Adding more arithmetic operators to MMX. This is an almost exact copy of the addition. Please let me know if you have suggestions. --- Diffs of the changes: (+16 -0) IntrinsicsX86.td | 16 ++++++++++++++++ 1 files changed, 16 insertions(+) Index: llvm/include/llvm/IntrinsicsX86.td diff -u llvm/include/llvm/IntrinsicsX86.td:1.33 llvm/include/llvm/IntrinsicsX86.td:1.34 --- llvm/include/llvm/IntrinsicsX86.td:1.33 Thu Mar 8 16:09:11 2007 +++ llvm/include/llvm/IntrinsicsX86.td Sat Mar 10 03:57:05 2007 @@ -547,6 +547,7 @@ // Integer arithmetic ops. let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". + // Addition def int_x86_mmx_padds_b : GCCBuiltin<"__builtin_ia32_paddsb">, Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty, llvm_v8i8_ty], [IntrNoMem]>; @@ -560,4 +561,19 @@ def int_x86_mmx_paddus_w : GCCBuiltin<"__builtin_ia32_paddusw">, Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty, llvm_v4i16_ty], [IntrNoMem]>; + + // Subtraction + def int_x86_mmx_psubs_b : GCCBuiltin<"__builtin_ia32_psubsb">, + Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty, + llvm_v8i8_ty], [IntrNoMem]>; + def int_x86_mmx_psubs_w : GCCBuiltin<"__builtin_ia32_psubsw">, + Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty, + llvm_v4i16_ty], [IntrNoMem]>; + + def int_x86_mmx_psubus_b : GCCBuiltin<"__builtin_ia32_psubusb">, + Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty, + llvm_v8i8_ty], [IntrNoMem]>; + def int_x86_mmx_psubus_w : GCCBuiltin<"__builtin_ia32_psubusw">, + Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty, + llvm_v4i16_ty], [IntrNoMem]>; } From isanbard at gmail.com Sat Mar 10 03:57:28 2007 From: isanbard at gmail.com (Bill Wendling) Date: Sat, 10 Mar 2007 03:57:28 -0600 Subject: [llvm-commits] CVS: llvm/test/CodeGen/X86/mmx-arith.ll Message-ID: <200703100957.l2A9vShj005618@zion.cs.uiuc.edu> Changes in directory llvm/test/CodeGen/X86: mmx-arith.ll updated: 1.1 -> 1.2 --- Log message: Adding more arithmetic operators to MMX. This is an almost exact copy of the addition. Please let me know if you have suggestions. --- Diffs of the changes: (+64 -15) mmx-arith.ll | 79 +++++++++++++++++++++++++++++++++++++++++++++++------------ 1 files changed, 64 insertions(+), 15 deletions(-) Index: llvm/test/CodeGen/X86/mmx-arith.ll diff -u llvm/test/CodeGen/X86/mmx-arith.ll:1.1 llvm/test/CodeGen/X86/mmx-arith.ll:1.2 --- llvm/test/CodeGen/X86/mmx-arith.ll:1.1 Thu Mar 8 16:14:51 2007 +++ llvm/test/CodeGen/X86/mmx-arith.ll Sat Mar 10 03:57:05 2007 @@ -2,34 +2,83 @@ ;; A basic sanity check to make sure that MMX arithmetic actually compiles. -define void @foo(<2 x i32>* %A, <2 x i32>* %B) { +define void @foo(<8 x i8>* %A, <8 x i8>* %B) { entry: - %tmp1 = load <2 x i32>* %A ; <<2 x i32>> [#uses=1] - %tmp3 = load <2 x i32>* %B ; <<2 x i32>> [#uses=1] - %tmp4 = add <2 x i32> %tmp1, %tmp3 ; <<2 x i32>> [#uses=1] - store <2 x i32> %tmp4, <2 x i32>* %A + %tmp5 = load <8 x i8>* %A ; <<8 x i8>> [#uses=1] + %tmp7 = load <8 x i8>* %B ; <<8 x i8>> [#uses=1] + %tmp8 = add <8 x i8> %tmp5, %tmp7 ; <<8 x i8>> [#uses=2] + store <8 x i8> %tmp8, <8 x i8>* %A + %tmp14 = load <8 x i8>* %B ; <<8 x i8>> [#uses=1] + %tmp25 = tail call <8 x i8> @llvm.x86.mmx.padds.b( <8 x i8> %tmp14, <8 x i8> %tmp8 ) ; <<8 x i8>> [#uses=2] + store <8 x i8> %tmp25, <8 x i8>* %B + %tmp36 = load <8 x i8>* %A ; <<8 x i8>> [#uses=1] + %tmp49 = tail call <8 x i8> @llvm.x86.mmx.paddus.b( <8 x i8> %tmp36, <8 x i8> %tmp25 ) ; <<8 x i8>> [#uses=2] + store <8 x i8> %tmp49, <8 x i8>* %B + %tmp58 = load <8 x i8>* %A ; <<8 x i8>> [#uses=1] + %tmp61 = sub <8 x i8> %tmp58, %tmp49 ; <<8 x i8>> [#uses=2] + store <8 x i8> %tmp61, <8 x i8>* %B + %tmp64 = load <8 x i8>* %A ; <<8 x i8>> [#uses=1] + %tmp80 = tail call <8 x i8> @llvm.x86.mmx.psubs.b( <8 x i8> %tmp61, <8 x i8> %tmp64 ) ; <<8 x i8>> [#uses=2] + store <8 x i8> %tmp80, <8 x i8>* %A + %tmp89 = load <8 x i8>* %B ; <<8 x i8>> [#uses=1] + %tmp105 = tail call <8 x i8> @llvm.x86.mmx.psubus.b( <8 x i8> %tmp80, <8 x i8> %tmp89 ) ; <<8 x i8>> [#uses=1] + store <8 x i8> %tmp105, <8 x i8>* %A tail call void @llvm.x86.mmx.emms( ) ret void } -define void @bar(<4 x i16>* %A, <4 x i16>* %B) { +define void @baz(<2 x i32>* %A, <2 x i32>* %B) { entry: - %tmp1 = load <4 x i16>* %A ; <<4 x i16>> [#uses=1] - %tmp3 = load <4 x i16>* %B ; <<4 x i16>> [#uses=1] - %tmp4 = add <4 x i16> %tmp1, %tmp3 ; <<4 x i16>> [#uses=1] - store <4 x i16> %tmp4, <4 x i16>* %A + %tmp1 = load <2 x i32>* %A ; <<2 x i32>> [#uses=1] + %tmp3 = load <2 x i32>* %B ; <<2 x i32>> [#uses=1] + %tmp4 = add <2 x i32> %tmp1, %tmp3 ; <<2 x i32>> [#uses=2] + store <2 x i32> %tmp4, <2 x i32>* %A + %tmp9 = load <2 x i32>* %B ; <<2 x i32>> [#uses=1] + %tmp10 = sub <2 x i32> %tmp4, %tmp9 ; <<2 x i32>> [#uses=1] + store <2 x i32> %tmp10, <2 x i32>* %B tail call void @llvm.x86.mmx.emms( ) ret void } -define void @baz(<8 x i8>* %A, <8 x i8>* %B) { +define void @bar(<4 x i16>* %A, <4 x i16>* %B) { entry: - %tmp1 = load <8 x i8>* %A ; <<8 x i8>> [#uses=1] - %tmp3 = load <8 x i8>* %B ; <<8 x i8>> [#uses=1] - %tmp4 = add <8 x i8> %tmp1, %tmp3 ; <<8 x i8>> [#uses=1] - store <8 x i8> %tmp4, <8 x i8>* %A + %tmp5 = load <4 x i16>* %A ; <<4 x i16>> [#uses=1] + %tmp7 = load <4 x i16>* %B ; <<4 x i16>> [#uses=1] + %tmp8 = add <4 x i16> %tmp5, %tmp7 ; <<4 x i16>> [#uses=2] + store <4 x i16> %tmp8, <4 x i16>* %A + %tmp14 = load <4 x i16>* %B ; <<4 x i16>> [#uses=1] + %tmp25 = tail call <4 x i16> @llvm.x86.mmx.padds.w( <4 x i16> %tmp14, <4 x i16> %tmp8 ) ; <<4 x i16>> [#uses=2] + store <4 x i16> %tmp25, <4 x i16>* %B + %tmp36 = load <4 x i16>* %A ; <<4 x i16>> [#uses=1] + %tmp49 = tail call <4 x i16> @llvm.x86.mmx.paddus.w( <4 x i16> %tmp36, <4 x i16> %tmp25 ) ; <<4 x i16>> [#uses=2] + store <4 x i16> %tmp49, <4 x i16>* %B + %tmp58 = load <4 x i16>* %A ; <<4 x i16>> [#uses=1] + %tmp61 = sub <4 x i16> %tmp58, %tmp49 ; <<4 x i16>> [#uses=2] + store <4 x i16> %tmp61, <4 x i16>* %B + %tmp64 = load <4 x i16>* %A ; <<4 x i16>> [#uses=1] + %tmp80 = tail call <4 x i16> @llvm.x86.mmx.psubs.w( <4 x i16> %tmp61, <4 x i16> %tmp64 ) ; <<4 x i16>> [#uses=2] + store <4 x i16> %tmp80, <4 x i16>* %A + %tmp89 = load <4 x i16>* %B ; <<4 x i16>> [#uses=1] + %tmp105 = tail call <4 x i16> @llvm.x86.mmx.psubus.w( <4 x i16> %tmp80, <4 x i16> %tmp89 ) ; <<4 x i16>> [#uses=1] + store <4 x i16> %tmp105, <4 x i16>* %A tail call void @llvm.x86.mmx.emms( ) ret void } +declare <4 x i16> @llvm.x86.mmx.padds.w(<4 x i16>, <4 x i16>) + +declare <4 x i16> @llvm.x86.mmx.paddus.w(<4 x i16>, <4 x i16>) + +declare <4 x i16> @llvm.x86.mmx.psubs.w(<4 x i16>, <4 x i16>) + +declare <4 x i16> @llvm.x86.mmx.psubus.w(<4 x i16>, <4 x i16>) + +declare <8 x i8> @llvm.x86.mmx.padds.b(<8 x i8>, <8 x i8>) + +declare <8 x i8> @llvm.x86.mmx.paddus.b(<8 x i8>, <8 x i8>) + +declare <8 x i8> @llvm.x86.mmx.psubs.b(<8 x i8>, <8 x i8>) + +declare <8 x i8> @llvm.x86.mmx.psubus.b(<8 x i8>, <8 x i8>) + declare void @llvm.x86.mmx.emms() From nicholas at mxc.ca Sat Mar 10 09:54:30 2007 From: nicholas at mxc.ca (Nick Lewycky) Date: Sat, 10 Mar 2007 09:54:30 -0600 Subject: [llvm-commits] CVS: llvm/lib/Support/ConstantRange.cpp Message-ID: <200703101554.l2AFsUfV011857@zion.cs.uiuc.edu> Changes in directory llvm/lib/Support: ConstantRange.cpp updated: 1.40 -> 1.41 --- Log message: Add getter methods for the extremes of a ConstantRange. --- Diffs of the changes: (+64 -0) ConstantRange.cpp | 64 ++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 64 insertions(+) Index: llvm/lib/Support/ConstantRange.cpp diff -u llvm/lib/Support/ConstantRange.cpp:1.40 llvm/lib/Support/ConstantRange.cpp:1.41 --- llvm/lib/Support/ConstantRange.cpp:1.40 Thu Mar 1 21:33:05 2007 +++ llvm/lib/Support/ConstantRange.cpp Sat Mar 10 09:54:12 2007 @@ -84,6 +84,70 @@ return Upper - Lower; } +/// getUnsignedMax - Return the largest unsigned value contained in the +/// ConstantRange. +/// +APInt ConstantRange::getUnsignedMax() const { + if (isFullSet() || isWrappedSet()) + return APInt::getMaxValue(getBitWidth()); + else + return getUpper() - 1; +} + +/// getUnsignedMin - Return the smallest unsigned value contained in the +/// ConstantRange. +/// +APInt ConstantRange::getUnsignedMin() const { + if (isFullSet() || (isWrappedSet() && getUpper() != 0)) + return APInt::getMinValue(getBitWidth()); + else + return getLower(); +} + +/// getSignedMax - Return the largest signed value contained in the +/// ConstantRange. +/// +APInt ConstantRange::getSignedMax() const { + APInt SignedMax = APInt::getSignedMaxValue(getBitWidth()); + if (!isWrappedSet()) { + if (getLower().slt(getUpper() - 1)) + return getUpper() - 1; + else + return SignedMax; + } else { + if ((getUpper() - 1).slt(getLower())) { + if (getLower() != SignedMax) + return SignedMax; + else + return getUpper() - 1; + } else { + return getUpper() - 1; + } + } +} + +/// getSignedMin - Return the smallest signed value contained in the +/// ConstantRange. +/// +APInt ConstantRange::getSignedMin() const { + APInt SignedMin = APInt::getSignedMinValue(getBitWidth()); + if (!isWrappedSet()) { + if (getLower().slt(getUpper() - 1)) + return getLower(); + else + return SignedMin; + } else { + if ((getUpper() - 1).slt(getLower())) { + if (getUpper() != SignedMin) + return SignedMin; + else + return getLower(); + } else { + return getLower(); + } + } +} + /// contains - Return true if the specified value is in the set. /// bool ConstantRange::contains(const APInt &V) const { From nicholas at mxc.ca Sat Mar 10 09:54:32 2007 From: nicholas at mxc.ca (Nick Lewycky) Date: Sat, 10 Mar 2007 09:54:32 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/Support/ConstantRange.h Message-ID: <200703101554.l2AFsWln011863@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/Support: ConstantRange.h updated: 1.20 -> 1.21 --- Log message: Add getter methods for the extremes of a ConstantRange. --- Diffs of the changes: (+20 -0) ConstantRange.h | 20 ++++++++++++++++++++ 1 files changed, 20 insertions(+) Index: llvm/include/llvm/Support/ConstantRange.h diff -u llvm/include/llvm/Support/ConstantRange.h:1.20 llvm/include/llvm/Support/ConstantRange.h:1.21 --- llvm/include/llvm/Support/ConstantRange.h:1.20 Thu Mar 1 01:54:15 2007 +++ llvm/include/llvm/Support/ConstantRange.h Sat Mar 10 09:54:12 2007 @@ -102,6 +102,26 @@ /// APInt getSetSize() const; + /// getUnsignedMax - Return the largest unsigned value contained in the + /// ConstantRange. + /// + APInt getUnsignedMax() const; + + /// getUnsignedMin - Return the smallest unsigned value contained in the + /// ConstantRange. + /// + APInt getUnsignedMin() const; + + /// getSignedMax - Return the largest signed value contained in the + /// ConstantRange. + /// + APInt getSignedMax() const; + + /// getSignedMin - Return the smallest signed value contained in the + /// ConstantRange. + /// + APInt getSignedMin() const; + /// operator== - Return true if this range is equal to another range. /// bool operator==(const ConstantRange &CR) const { From asl at math.spbu.ru Sat Mar 10 10:46:50 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Sat, 10 Mar 2007 10:46:50 -0600 Subject: [llvm-commits] CVS: llvm/lib/Transforms/Utils/LowerSwitch.cpp Message-ID: <200703101646.l2AGkojC012678@zion.cs.uiuc.edu> Changes in directory llvm/lib/Transforms/Utils: LowerSwitch.cpp updated: 1.34 -> 1.35 --- Log message: Use range tests in LowerSwitch, where possible --- Diffs of the changes: (+114 -31) LowerSwitch.cpp | 145 ++++++++++++++++++++++++++++++++++++++++++++------------ 1 files changed, 114 insertions(+), 31 deletions(-) Index: llvm/lib/Transforms/Utils/LowerSwitch.cpp diff -u llvm/lib/Transforms/Utils/LowerSwitch.cpp:1.34 llvm/lib/Transforms/Utils/LowerSwitch.cpp:1.35 --- llvm/lib/Transforms/Utils/LowerSwitch.cpp:1.34 Fri Mar 2 17:15:21 2007 +++ llvm/lib/Transforms/Utils/LowerSwitch.cpp Sat Mar 10 10:46:28 2007 @@ -40,26 +40,38 @@ AU.addPreservedID(LowerInvokePassID); AU.addPreservedID(LowerAllocationsID); } - - typedef std::pair Case; - typedef std::vector::iterator CaseItr; + + struct CaseRange { + Constant* Low; + Constant* High; + BasicBlock* BB; + + CaseRange(Constant* _Low = NULL, Constant* _High = NULL, + BasicBlock* _BB = NULL): + Low(_Low), High(_High), BB(_BB) { } + }; + + typedef std::vector CaseVector; + typedef std::vector::iterator CaseItr; private: void processSwitchInst(SwitchInst *SI); BasicBlock* switchConvert(CaseItr Begin, CaseItr End, Value* Val, BasicBlock* OrigBlock, BasicBlock* Default); - BasicBlock* newLeafBlock(Case& Leaf, Value* Val, + BasicBlock* newLeafBlock(CaseRange& Leaf, Value* Val, BasicBlock* OrigBlock, BasicBlock* Default); + unsigned Clusterify(CaseVector& Cases, SwitchInst *SI); }; /// The comparison function for sorting the switch case values in the vector. + /// WARNING: Case ranges should be disjoint! struct CaseCmp { - bool operator () (const LowerSwitch::Case& C1, - const LowerSwitch::Case& C2) { + bool operator () (const LowerSwitch::CaseRange& C1, + const LowerSwitch::CaseRange& C2) { - const ConstantInt* CI1 = cast(C1.first); - const ConstantInt* CI2 = cast(C2.first); - return CI1->getValue().ult(CI2->getValue()); + const ConstantInt* CI1 = cast(C1.Low); + const ConstantInt* CI2 = cast(C2.High); + return CI1->getValue().slt(CI2->getValue()); } }; @@ -91,19 +103,20 @@ // operator<< - Used for debugging purposes. // -std::ostream& operator<<(std::ostream &O, - const std::vector &C) { +static std::ostream& operator<<(std::ostream &O, + const LowerSwitch::CaseVector &C) { O << "["; - for (std::vector::const_iterator B = C.begin(), + for (LowerSwitch::CaseVector::const_iterator B = C.begin(), E = C.end(); B != E; ) { - O << *B->first; + O << *B->Low << " -" << *B->High; if (++B != E) O << ", "; } return O << "]"; } -OStream& operator<<(OStream &O, const std::vector &C) { + +static OStream& operator<<(OStream &O, const LowerSwitch::CaseVector &C) { if (O.stream()) *O.stream() << C; return O; } @@ -121,14 +134,16 @@ return newLeafBlock(*Begin, Val, OrigBlock, Default); unsigned Mid = Size / 2; - std::vector LHS(Begin, Begin + Mid); + std::vector LHS(Begin, Begin + Mid); DOUT << "LHS: " << LHS << "\n"; - std::vector RHS(Begin + Mid, End); + std::vector RHS(Begin + Mid, End); DOUT << "RHS: " << RHS << "\n"; - Case& Pivot = *(Begin + Mid); + CaseRange& Pivot = *(Begin + Mid); DEBUG( DOUT << "Pivot ==> " - << cast(Pivot.first)->getValue().toStringSigned(10) + << cast(Pivot.Low)->getValue().toStringSigned(10) + << " -" + << cast(Pivot.High)->getValue().toStringSigned(10) << "\n"); BasicBlock* LBranch = switchConvert(LHS.begin(), LHS.end(), Val, @@ -142,7 +157,7 @@ BasicBlock* NewNode = new BasicBlock("NodeBlock"); F->getBasicBlockList().insert(OrigBlock->getNext(), NewNode); - ICmpInst* Comp = new ICmpInst(ICmpInst::ICMP_ULT, Val, Pivot.first, "Pivot"); + ICmpInst* Comp = new ICmpInst(ICmpInst::ICMP_SLT, Val, Pivot.Low, "Pivot"); NewNode->getInstList().push_back(Comp); new BranchInst(LBranch, RBranch, Comp, NewNode); return NewNode; @@ -154,7 +169,7 @@ // can't be another valid case value, so the jump to the "default" branch // is warranted. // -BasicBlock* LowerSwitch::newLeafBlock(Case& Leaf, Value* Val, +BasicBlock* LowerSwitch::newLeafBlock(CaseRange& Leaf, Value* Val, BasicBlock* OrigBlock, BasicBlock* Default) { @@ -162,19 +177,49 @@ BasicBlock* NewLeaf = new BasicBlock("LeafBlock"); F->getBasicBlockList().insert(OrigBlock->getNext(), NewLeaf); - // Make the seteq instruction... - ICmpInst* Comp = new ICmpInst(ICmpInst::ICMP_EQ, Val, - Leaf.first, "SwitchLeaf"); - NewLeaf->getInstList().push_back(Comp); + // Emit comparison + ICmpInst* Comp = NULL; + if (Leaf.Low == Leaf.High) { + // Make the seteq instruction... + Comp = new ICmpInst(ICmpInst::ICMP_EQ, Val, Leaf.Low, + "SwitchLeaf", NewLeaf); + } else { + // Make range comparison + if (cast(Leaf.Low)->isMinValue(true /*isSigned*/)) { + // Val >= Min && Val <= Hi --> Val <= Hi + Comp = new ICmpInst(ICmpInst::ICMP_SLE, Val, Leaf.High, + "SwitchLeaf", NewLeaf); + } else if (cast(Leaf.Low)->isZero()) { + // Val >= 0 && Val <= Hi --> Val <=u Hi + Comp = new ICmpInst(ICmpInst::ICMP_ULE, Val, Leaf.High, + "SwitchLeaf", NewLeaf); + } else { + // Emit V-Lo <=u Hi-Lo + Constant* NegLo = ConstantExpr::getNeg(Leaf.Low); + Instruction* Add = BinaryOperator::createAdd(Val, NegLo, + Val->getName()+".off", + NewLeaf); + Constant *UpperBound = ConstantExpr::getAdd(NegLo, Leaf.High); + Comp = new ICmpInst(ICmpInst::ICMP_ULE, Add, UpperBound, + "SwitchLeaf", NewLeaf); + } + } // Make the conditional branch... - BasicBlock* Succ = Leaf.second; + BasicBlock* Succ = Leaf.BB; new BranchInst(Succ, Default, Comp, NewLeaf); // If there were any PHI nodes in this successor, rewrite one entry // from OrigBlock to come from NewLeaf. for (BasicBlock::iterator I = Succ->begin(); isa(I); ++I) { PHINode* PN = cast(I); + // Remove all but one incoming entries from the cluster + uint64_t Range = cast(Leaf.High)->getSExtValue() - + cast(Leaf.Low)->getSExtValue(); + for (uint64_t j = 0; j < Range; ++j) { + PN->removeIncomingValue(OrigBlock); + } + int BlockIdx = PN->getBasicBlockIndex(OrigBlock); assert(BlockIdx != -1 && "Switch didn't go to this successor??"); PN->setIncomingBlock((unsigned)BlockIdx, NewLeaf); @@ -183,6 +228,44 @@ return NewLeaf; } +// Clusterify - Transform simple list of Cases into list of CaseRange's +unsigned LowerSwitch::Clusterify(CaseVector& Cases, SwitchInst *SI) { + unsigned numCmps = 0; + + // Start with "simple" cases + for (unsigned i = 1; i < SI->getNumSuccessors(); ++i) + Cases.push_back(CaseRange(SI->getSuccessorValue(i), + SI->getSuccessorValue(i), + SI->getSuccessor(i))); + sort(Cases.begin(), Cases.end(), CaseCmp()); + + // Merge case into clusters + if (Cases.size()>=2) + for (CaseItr I=Cases.begin(), J=++(Cases.begin()), E=Cases.end(); J!=E; ) { + int64_t nextValue = cast(J->Low)->getSExtValue(); + int64_t currentValue = cast(I->High)->getSExtValue(); + BasicBlock* nextBB = J->BB; + BasicBlock* currentBB = I->BB; + + // If the two neighboring cases go to the same destination, merge them + // into a single case. + if ((nextValue-currentValue==1) && (currentBB == nextBB)) { + I->High = J->High; + J = Cases.erase(J); + } else { + I = J++; + } + } + + for (CaseItr I=Cases.begin(), E=Cases.end(); I!=E; ++I, ++numCmps) { + if (I->Low != I->High) + // A range counts double, since it requires two compares. + ++numCmps; + } + + return numCmps; +} + // processSwitchInst - Replace the specified switch instruction with a sequence // of chained if-then insts in a balanced binary search. // @@ -216,14 +299,14 @@ PN->setIncomingBlock((unsigned)BlockIdx, NewDefault); } - std::vector Cases; - - // Expand comparisons for all of the non-default cases... - for (unsigned i = 1; i < SI->getNumSuccessors(); ++i) - Cases.push_back(Case(SI->getSuccessorValue(i), SI->getSuccessor(i))); + // Prepare cases vector. + CaseVector Cases; + unsigned numCmps = Clusterify(Cases, SI); - std::sort(Cases.begin(), Cases.end(), CaseCmp()); + DOUT << "Clusterify finished. Total clusters: " << Cases.size() + << ". Total compares: " << numCmps << "\n"; DOUT << "Cases: " << Cases << "\n"; + BasicBlock* SwitchBlock = switchConvert(Cases.begin(), Cases.end(), Val, OrigBlock, NewDefault); From asl at math.spbu.ru Sat Mar 10 10:46:50 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Sat, 10 Mar 2007 10:46:50 -0600 Subject: [llvm-commits] CVS: llvm/test/Transforms/LowerSwitch/feature.ll Message-ID: <200703101646.l2AGko4R012681@zion.cs.uiuc.edu> Changes in directory llvm/test/Transforms/LowerSwitch: feature.ll added (r1.1) --- Log message: Use range tests in LowerSwitch, where possible --- Diffs of the changes: (+50 -0) feature.ll | 50 ++++++++++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 50 insertions(+) Index: llvm/test/Transforms/LowerSwitch/feature.ll diff -c /dev/null llvm/test/Transforms/LowerSwitch/feature.ll:1.1 *** /dev/null Sat Mar 10 10:46:38 2007 --- llvm/test/Transforms/LowerSwitch/feature.ll Sat Mar 10 10:46:28 2007 *************** *** 0 **** --- 1,50 ---- + ; RUN: llvm-as %s -o - | opt -lowerswitch | llvm-dis | grep slt | wc -l | grep 10 && + ; RUN: llvm-as %s -o - | opt -lowerswitch | llvm-dis | grep ule | wc -l | grep 3 && + ; RUN: llvm-as %s -o - | opt -lowerswitch | llvm-dis | grep eq | wc -l | grep 9 + + define i32 @main(i32 %tmp158) { + entry: + switch i32 %tmp158, label %bb336 [ + i32 -2, label %bb338 + i32 -3, label %bb338 + i32 -4, label %bb338 + i32 -5, label %bb338 + i32 -6, label %bb338 + i32 0, label %bb338 + i32 1, label %bb338 + i32 2, label %bb338 + i32 3, label %bb338 + i32 4, label %bb338 + i32 5, label %bb338 + i32 6, label %bb338 + i32 7, label %bb + i32 8, label %bb338 + i32 9, label %bb322 + i32 10, label %bb324 + i32 11, label %bb326 + i32 12, label %bb328 + i32 13, label %bb330 + i32 14, label %bb332 + i32 15, label %bb334 + ] + bb: + ret i32 2 + bb322: + ret i32 3 + bb324: + ret i32 4 + bb326: + ret i32 5 + bb328: + ret i32 6 + bb330: + ret i32 7 + bb332: + ret i32 8 + bb334: + ret i32 9 + bb336: + ret i32 10 + bb338: + ret i32 11 + } From nicholas at mxc.ca Sat Mar 10 10:50:41 2007 From: nicholas at mxc.ca (Nick Lewycky) Date: Sat, 10 Mar 2007 11:50:41 -0500 Subject: [llvm-commits] CVS: llvm/lib/Transforms/Utils/LowerSwitch.cpp In-Reply-To: <200703101646.l2AGkojC012678@zion.cs.uiuc.edu> References: <200703101646.l2AGkojC012678@zion.cs.uiuc.edu> Message-ID: <45F2E1E1.6070209@mxc.ca> Anton Korobeynikov wrote: > > Changes in directory llvm/lib/Transforms/Utils: > > LowerSwitch.cpp updated: 1.34 -> 1.35 > --- > Log message: > > Use range tests in LowerSwitch, where possible > > > --- > Diffs of the changes: (+114 -31) > > LowerSwitch.cpp | 145 ++++++++++++++++++++++++++++++++++++++++++++------------ > 1 files changed, 114 insertions(+), 31 deletions(-) > > > Index: llvm/lib/Transforms/Utils/LowerSwitch.cpp > diff -u llvm/lib/Transforms/Utils/LowerSwitch.cpp:1.34 llvm/lib/Transforms/Utils/LowerSwitch.cpp:1.35 > --- llvm/lib/Transforms/Utils/LowerSwitch.cpp:1.34 Fri Mar 2 17:15:21 2007 > +++ llvm/lib/Transforms/Utils/LowerSwitch.cpp Sat Mar 10 10:46:28 2007 > @@ -40,26 +40,38 @@ > AU.addPreservedID(LowerInvokePassID); > AU.addPreservedID(LowerAllocationsID); > } > - > - typedef std::pair Case; > - typedef std::vector::iterator CaseItr; > + > + struct CaseRange { > + Constant* Low; > + Constant* High; > + BasicBlock* BB; > + > + CaseRange(Constant* _Low = NULL, Constant* _High = NULL, > + BasicBlock* _BB = NULL): > + Low(_Low), High(_High), BB(_BB) { } > + }; Do you ever store non-ConstantInt in Low and High? If not, could you either replace this with, or make it a wrapper around ConstantRange? Nick From nicholas at mxc.ca Sat Mar 10 12:13:05 2007 From: nicholas at mxc.ca (Nick Lewycky) Date: Sat, 10 Mar 2007 12:13:05 -0600 Subject: [llvm-commits] CVS: llvm/lib/Transforms/Scalar/PredicateSimplifier.cpp Message-ID: <200703101813.l2AID5b5014194@zion.cs.uiuc.edu> Changes in directory llvm/lib/Transforms/Scalar: PredicateSimplifier.cpp updated: 1.55 -> 1.56 --- Log message: Add value ranges. Currently inefficient in both execution time and optimization power. --- Diffs of the changes: (+397 -219) PredicateSimplifier.cpp | 616 ++++++++++++++++++++++++++++++------------------ 1 files changed, 397 insertions(+), 219 deletions(-) Index: llvm/lib/Transforms/Scalar/PredicateSimplifier.cpp diff -u llvm/lib/Transforms/Scalar/PredicateSimplifier.cpp:1.55 llvm/lib/Transforms/Scalar/PredicateSimplifier.cpp:1.56 --- llvm/lib/Transforms/Scalar/PredicateSimplifier.cpp:1.55 Sun Mar 4 18:00:42 2007 +++ llvm/lib/Transforms/Scalar/PredicateSimplifier.cpp Sat Mar 10 12:12:48 2007 @@ -29,9 +29,9 @@ // // These relationships define a graph between values of the same type. Each // Value is stored in a map table that retrieves the associated Node. This -// is how EQ relationships are stored; the map contains pointers to the -// same node. The node contains a most canonical Value* form and the list of -// known relationships. +// is how EQ relationships are stored; the map contains pointers from equal +// Value to the same node. The node contains a most canonical Value* form +// and the list of known relationships with other nodes. // // If two nodes are known to be inequal, then they will contain pointers to // each other with an "NE" relationship. If node getNode(%x) is less than @@ -52,9 +52,9 @@ // responsible for analyzing the variable and seeing what new inferences // can be made from each property. For example: // -// %P = icmp ne int* %ptr, null -// %a = and bool %P, %Q -// br bool %a label %cond_true, label %cond_false +// %P = icmp ne i32* %ptr, null +// %a = and i1 %P, %Q +// br i1 %a label %cond_true, label %cond_false // // For the true branch, the VRPSolver will start with %a EQ true and look at // the definition of %a and find that it can infer that %P and %Q are both @@ -83,6 +83,7 @@ #include "llvm/Analysis/ET-Forest.h" #include "llvm/Support/CFG.h" #include "llvm/Support/Compiler.h" +#include "llvm/Support/ConstantRange.h" #include "llvm/Support/Debug.h" #include "llvm/Support/InstVisitor.h" #include "llvm/Transforms/Utils/Local.h" @@ -165,6 +166,20 @@ return Rev; } + /// This is a StrictWeakOrdering predicate that sorts ETNodes by how many + /// children they have. With this, you can iterate through a list sorted by + /// this operation and the first matching entry is the most specific match + /// for your basic block. The order provided is total; ETNodes with the + /// same number of children are sorted by pointer address. + struct VISIBILITY_HIDDEN OrderByDominance { + bool operator()(const ETNode *LHS, const ETNode *RHS) const { + unsigned LHS_spread = LHS->getDFSNumOut() - LHS->getDFSNumIn(); + unsigned RHS_spread = RHS->getDFSNumOut() - RHS->getDFSNumIn(); + if (LHS_spread != RHS_spread) return LHS_spread < RHS_spread; + else return LHS < RHS; + } + }; + /// The InequalityGraph stores the relationships between values. /// Each Value in the graph is assigned to a Node. Nodes are pointer /// comparable for equality. The caller is expected to maintain the logical @@ -182,24 +197,10 @@ class Node; - /// This is a StrictWeakOrdering predicate that sorts ETNodes by how many - /// children they have. With this, you can iterate through a list sorted by - /// this operation and the first matching entry is the most specific match - /// for your basic block. The order provided is total; ETNodes with the - /// same number of children are sorted by pointer address. - struct VISIBILITY_HIDDEN OrderByDominance { - bool operator()(const ETNode *LHS, const ETNode *RHS) const { - unsigned LHS_spread = LHS->getDFSNumOut() - LHS->getDFSNumIn(); - unsigned RHS_spread = RHS->getDFSNumOut() - RHS->getDFSNumIn(); - if (LHS_spread != RHS_spread) return LHS_spread < RHS_spread; - else return LHS < RHS; - } - }; - /// An Edge is contained inside a Node making one end of the edge implicit /// and contains a pointer to the other end. The edge contains a lattice - /// value specifying the relationship between the two nodes. Further, there - /// is an ETNode specifying which subtree of the dominator the edge applies. + /// value specifying the relationship and an ETNode specifying the root + /// in the dominator tree to which this edge applies. class VISIBILITY_HIDDEN Edge { public: Edge(unsigned T, LatticeVal V, ETNode *ST) @@ -221,10 +222,6 @@ /// A single node in the InequalityGraph. This stores the canonical Value /// for the node, as well as the relationships with the neighbours. /// - /// Because the lists are intended to be used for traversal, it is invalid - /// for the node to list itself in LessEqual or GreaterEqual lists. The - /// fact that a node is equal to itself is implied, and may be checked - /// with pointer comparison. /// @brief A single node in the InequalityGraph. class VISIBILITY_HIDDEN Node { friend class InequalityGraph; @@ -366,96 +363,6 @@ std::vector Nodes; - std::vector > Ints; - - /// This is used to keep the ConstantInts list in unsigned ascending order. - /// If the bitwidths don't match, this sorts smaller values ahead. - struct SortByZExt { - bool operator()(const std::pair &LHS, - const std::pair &RHS) const { - if (LHS.first->getType()->getBitWidth() != - RHS.first->getType()->getBitWidth()) - return LHS.first->getType()->getBitWidth() < - RHS.first->getType()->getBitWidth(); - return LHS.first->getValue().ult(RHS.first->getValue()); - } - }; - - /// True when the bitwidth of LHS < bitwidth of RHS. - struct FindByIntegerWidth { - bool operator()(const std::pair &LHS, - const std::pair &RHS) const { - return LHS.first->getType()->getBitWidth() < - RHS.first->getType()->getBitWidth(); - } - }; - - void initializeInt(ConstantInt *CI, unsigned index) { - std::vector >::iterator begin, end, - last, iULT, iUGT, iSLT, iSGT; - - std::pair pair = std::make_pair(CI, index); - - begin = std::lower_bound(Ints.begin(), Ints.end(), pair, - FindByIntegerWidth()); - end = std::upper_bound(begin, Ints.end(), pair, FindByIntegerWidth()); - - if (begin == end) last = end; - else last = end - 1; - - iUGT = std::lower_bound(begin, end, pair, SortByZExt()); - iULT = (iUGT == begin || begin == end) ? end : iUGT - 1; - - if (iUGT != end && iULT != end && - iULT->first->getValue().isNegative() == - iUGT->first->getValue().isNegative()) { // signs match - iSGT = iUGT; - iSLT = iULT; - } else { - if (iULT == end || iUGT == end) { - if (iULT == end) iSLT = last; else iSLT = iULT; - if (iUGT == end) iSGT = begin; else iSGT = iUGT; - } else if (iULT->first->getValue().isNegative()) { - assert(iUGT->first->getValue().isPositive() && - "Bad sign comparison."); - iSGT = iUGT; - iSLT = iULT; - } else { - assert(iULT->first->getValue().isPositive() && - iUGT->first->getValue().isNegative() &&"Bad sign comparison."); - iSGT = iULT; - iSLT = iUGT; - } - - if (iSGT != end && - iSGT->first->getValue().slt(CI->getValue())) - iSGT = end; - if (iSLT != end && - iSLT->first->getValue().sgt(CI->getValue())) - iSLT = end; - - if (begin != end) { - if (begin->first->getValue().slt(CI->getValue())) - if (iSLT == end || - begin->first->getValue().sgt(iSLT->first->getValue())) - iSLT = begin; - } - if (last != end) { - if (last->first->getValue().sgt(CI->getValue())) - if (iSGT == end || - last->first->getValue().slt(iSGT->first->getValue())) - iSGT = last; - } - } - - if (iULT != end) addInequality(iULT->second, index, TreeRoot, ULT); - if (iUGT != end) addInequality(iUGT->second, index, TreeRoot, UGT); - if (iSLT != end) addInequality(iSLT->second, index, TreeRoot, SLT); - if (iSGT != end) addInequality(iSGT->second, index, TreeRoot, SGT); - - Ints.insert(iUGT, pair); - } - public: /// node - returns the node object at a given index retrieved from getNode. /// Index zero is reserved and may not be passed in here. The pointer @@ -498,10 +405,6 @@ "Attempt to create a duplicate Node."); NodeMap.insert(std::lower_bound(NodeMap.begin(), NodeMap.end(), MapEntry), MapEntry); - - if (ConstantInt *CI = dyn_cast(V)) - initializeInt(CI, MapEntry.index); - return MapEntry.index; } @@ -679,20 +582,25 @@ N2->update(n1, reversePredicate(LV1), Subtree); } - /// Removes a Value from the graph, but does not delete any nodes. As this - /// method does not delete Nodes, V may not be the canonical choice for - /// a node with any relationships. It is invalid to call newNode on a Value - /// that has been removed. + /// remove - Removes a Value from the graph. If the value is the canonical + /// choice for a Node, destroys the Node from the graph deleting all edges + /// to and from it. This method does not renumber the nodes. void remove(Value *V) { for (unsigned i = 0; i < NodeMap.size();) { NodeMapType::iterator I = NodeMap.begin()+i; - assert((node(I->index)->getValue() != V || node(I->index)->begin() == - node(I->index)->end()) && "Tried to delete in-use node."); if (I->V == V) { -#ifndef NDEBUG - if (node(I->index)->getValue() == V) - node(I->index)->Canonical = NULL; -#endif + Node *N = node(I->index); + if (node(I->index)->getValue() == V) { + for (Node::iterator NI = N->begin(), NE = N->end(); NI != NE; ++NI){ + Node::iterator Iter = node(NI->To)->find(I->index, TreeRoot); + do { + node(NI->To)->Relations.erase(Iter); + Iter = node(NI->To)->find(I->index, TreeRoot); + } while (Iter != node(NI->To)->end()); + } + N->Canonical = NULL; + } + N->Relations.clear(); NodeMap.erase(I); } else ++i; } @@ -721,6 +629,297 @@ #endif }; + class VRPSolver; + + /// ValueRanges tracks the known integer ranges and anti-ranges of the nodes + /// in the InequalityGraph. + class VISIBILITY_HIDDEN ValueRanges { + + /// A ScopedRange ties an InequalityGraph node with a ConstantRange under + /// the scope of a rooted subtree in the dominator tree. + class VISIBILITY_HIDDEN ScopedRange { + public: + ScopedRange(Value *V, ConstantRange CR, ETNode *ST) + : V(V), CR(CR), Subtree(ST) {} + + Value *V; + ConstantRange CR; + ETNode *Subtree; + + bool operator<(const ScopedRange &range) const { + if (V != range.V) return V < range.V; + else return OrderByDominance()(Subtree, range.Subtree); + } + + bool operator<(const Value *value) const { + return V < value; + } + }; + + std::vector Ranges; + typedef std::vector::iterator iterator; + + // XXX: this is a copy of the code in InequalityGraph::Node. Perhaps a + // intrusive domtree-scoped container is in order? + + iterator begin() { return Ranges.begin(); } + iterator end() { return Ranges.end(); } + + iterator find(Value *V, ETNode *Subtree) { + iterator E = end(); + for (iterator I = std::lower_bound(begin(), E, V); + I != E && I->V == V; ++I) { + if (Subtree->DominatedBy(I->Subtree)) + return I; + } + return E; + } + + void update(Value *V, ConstantRange CR, ETNode *Subtree) { + assert(!CR.isEmptySet() && "Empty ConstantRange!"); + if (CR.isFullSet()) return; + + iterator I = find(V, Subtree); + if (I == end()) { + ScopedRange range(V, CR, Subtree); + iterator Insert = std::lower_bound(begin(), end(), range); + Ranges.insert(Insert, range); + } else { + CR = CR.intersectWith(I->CR); + assert(!CR.isEmptySet() && "Empty intersection of ConstantRanges!"); + + if (CR != I->CR) { + if (Subtree != I->Subtree) { + assert(Subtree->DominatedBy(I->Subtree) && + "Find returned subtree that doesn't apply."); + + ScopedRange range(V, CR, Subtree); + iterator Insert = std::lower_bound(begin(), end(), range); + Ranges.insert(Insert, range); // invalidates I + I = find(V, Subtree); + } + + // Also, we have to tighten any edge that Subtree dominates. + for (iterator B = begin(); I->V == V; --I) { + if (I->Subtree->DominatedBy(Subtree)) { + CR = CR.intersectWith(I->CR); + assert(!CR.isEmptySet() && + "Empty intersection of ConstantRanges!"); + I->CR = CR; + } + if (I == B) break; + } + } + } + } + + /// range - Creates a ConstantRange representing the set of all values + /// that match the ICmpInst::Predicate with any of the values in CR. + ConstantRange range(ICmpInst::Predicate ICmpOpcode, + const ConstantRange &CR) { + uint32_t W = CR.getBitWidth(); + switch (ICmpOpcode) { + default: assert(!"Invalid ICmp opcode to range()"); + case ICmpInst::ICMP_EQ: + return ConstantRange(CR.getLower(), CR.getUpper()); + case ICmpInst::ICMP_NE: + if (CR.isSingleElement()) + return ConstantRange(CR.getUpper(), CR.getLower()); + return ConstantRange(W); + case ICmpInst::ICMP_ULT: + return ConstantRange(APInt::getMinValue(W), CR.getUnsignedMax()); + case ICmpInst::ICMP_SLT: + return ConstantRange(APInt::getSignedMinValue(W), CR.getSignedMax()); + case ICmpInst::ICMP_ULE: { + APInt UMax = CR.getUnsignedMax(); + if (UMax == APInt::getMaxValue(W)) + return ConstantRange(W); + return ConstantRange(APInt::getMinValue(W), UMax + 1); + } + case ICmpInst::ICMP_SLE: { + APInt SMax = CR.getSignedMax(); + if (SMax == APInt::getSignedMaxValue(W) || + SMax + 1 == APInt::getSignedMaxValue(W)) + return ConstantRange(W); + return ConstantRange(APInt::getSignedMinValue(W), SMax + 1); + } + case ICmpInst::ICMP_UGT: + return ConstantRange(CR.getUnsignedMin() + 1, + APInt::getMaxValue(W) + 1); + case ICmpInst::ICMP_SGT: + return ConstantRange(CR.getSignedMin() + 1, + APInt::getSignedMaxValue(W) + 1); + case ICmpInst::ICMP_UGE: { + APInt UMin = CR.getUnsignedMin(); + if (UMin == APInt::getMinValue(W)) + return ConstantRange(W); + return ConstantRange(UMin, APInt::getMaxValue(W) + 1); + } + case ICmpInst::ICMP_SGE: { + APInt SMin = CR.getSignedMin(); + if (SMin == APInt::getSignedMinValue(W)) + return ConstantRange(W); + return ConstantRange(SMin, APInt::getSignedMaxValue(W) + 1); + } + } + } + + /// create - Creates a ConstantRange that matches the given LatticeVal + /// relation with a given integer. + ConstantRange create(LatticeVal LV, const ConstantRange &CR) { + assert(!CR.isEmptySet() && "Can't deal with empty set."); + + if (LV == NE) + return range(ICmpInst::ICMP_NE, CR); + + unsigned LV_s = LV & (SGT_BIT|SLT_BIT); + unsigned LV_u = LV & (UGT_BIT|ULT_BIT); + bool hasEQ = LV & EQ_BIT; + + ConstantRange Range(CR.getBitWidth()); + + if (LV_s == SGT_BIT) { + Range = Range.intersectWith(range( + hasEQ ? ICmpInst::ICMP_SGE : ICmpInst::ICMP_SGT, CR)); + } else if (LV_s == SLT_BIT) { + Range = Range.intersectWith(range( + hasEQ ? ICmpInst::ICMP_SLE : ICmpInst::ICMP_SLT, CR)); + } + + if (LV_u == UGT_BIT) { + Range = Range.intersectWith(range( + hasEQ ? ICmpInst::ICMP_UGE : ICmpInst::ICMP_UGT, CR)); + } else if (LV_u == ULT_BIT) { + Range = Range.intersectWith(range( + hasEQ ? ICmpInst::ICMP_ULE : ICmpInst::ICMP_ULT, CR)); + } + + return Range; + } + + ConstantRange rangeFromValue(Value *V, ETNode *Subtree, uint32_t W) { + ConstantInt *C = dyn_cast(V); + if (C) { + return ConstantRange(C->getValue()); + } else { + iterator I = find(V, Subtree); + if (I != end()) + return I->CR; + } + return ConstantRange(W); + } + + static uint32_t widthOfValue(Value *V) { + const Type *Ty = V->getType(); + if (const IntegerType *ITy = dyn_cast(Ty)) + return ITy->getBitWidth(); + + // XXX: I'd like to transform T* into the appropriate integer by + // bit length, however that data may not be available. + + return 0; + } + + public: + + bool isRelatedBy(Value *V1, Value *V2, ETNode *Subtree, LatticeVal LV) { + uint32_t W = widthOfValue(V1); + if (!W) return false; + + ConstantRange CR1 = rangeFromValue(V1, Subtree, W); + ConstantRange CR2 = rangeFromValue(V2, Subtree, W); + + // True iff all values in CR1 are LV to all values in CR2. + switch(LV) { + default: assert(!"Impossible lattice value!"); + case NE: + return CR1.intersectWith(CR2).isEmptySet(); + case ULT: + return CR1.getUnsignedMax().ult(CR2.getUnsignedMin()); + case ULE: + return CR1.getUnsignedMax().ule(CR2.getUnsignedMin()); + case UGT: + return CR1.getUnsignedMin().ugt(CR2.getUnsignedMax()); + case UGE: + return CR1.getUnsignedMin().uge(CR2.getUnsignedMax()); + case SLT: + return CR1.getSignedMax().slt(CR2.getSignedMin()); + case SLE: + return CR1.getSignedMax().sle(CR2.getSignedMin()); + case SGT: + return CR1.getSignedMin().sgt(CR2.getSignedMax()); + case SGE: + return CR1.getSignedMin().sge(CR2.getSignedMax()); + case LT: + return CR1.getUnsignedMax().ult(CR2.getUnsignedMin()) && + CR1.getSignedMax().slt(CR2.getUnsignedMin()); + case LE: + return CR1.getUnsignedMax().ule(CR2.getUnsignedMin()) && + CR1.getSignedMax().sle(CR2.getUnsignedMin()); + case GT: + return CR1.getUnsignedMin().ugt(CR2.getUnsignedMax()) && + CR1.getSignedMin().sgt(CR2.getSignedMax()); + case GE: + return CR1.getUnsignedMin().uge(CR2.getUnsignedMax()) && + CR1.getSignedMin().sge(CR2.getSignedMax()); + case SLTUGT: + return CR1.getSignedMax().slt(CR2.getSignedMin()) && + CR1.getUnsignedMin().ugt(CR2.getUnsignedMax()); + case SLEUGE: + return CR1.getSignedMax().sle(CR2.getSignedMin()) && + CR1.getUnsignedMin().uge(CR2.getUnsignedMax()); + case SGTULT: + return CR1.getSignedMin().sgt(CR2.getSignedMax()) && + CR1.getUnsignedMax().ult(CR2.getUnsignedMin()); + case SGEULE: + return CR1.getSignedMin().sge(CR2.getSignedMax()) && + CR1.getUnsignedMax().ule(CR2.getUnsignedMin()); + } + } + + void addToWorklist(Value *V, const APInt *I, ICmpInst::Predicate Pred, + VRPSolver *VRP); + + void addInequality(Value *V1, Value *V2, ETNode *Subtree, LatticeVal LV, + VRPSolver *VRP) { + assert(!isRelatedBy(V1, V2, Subtree, LV) && "Asked to do useless work."); + + if (LV == NE) return; // we can't represent those. + // XXX: except in the case where isSingleElement and equal to either + // Lower or Upper. That's probably not profitable. (Type::Int1Ty?) + + uint32_t W = widthOfValue(V1); + if (!W) return; + + ConstantRange CR1 = rangeFromValue(V1, Subtree, W); + ConstantRange CR2 = rangeFromValue(V2, Subtree, W); + + if (!CR1.isSingleElement()) { + ConstantRange NewCR1 = CR1.intersectWith(create(LV, CR2)); + if (NewCR1 != CR1) { + if (NewCR1.isSingleElement()) + addToWorklist(V1, NewCR1.getSingleElement(), + ICmpInst::ICMP_EQ, VRP); + else + update(V1, NewCR1, Subtree); + } + } + + if (!CR2.isSingleElement()) { + ConstantRange NewCR2 = CR2.intersectWith(create(reversePredicate(LV), + CR1)); + if (NewCR2 != CR2) { + if (NewCR2.isSingleElement()) + addToWorklist(V2, NewCR2.getSingleElement(), + ICmpInst::ICMP_EQ, VRP); + else + update(V2, NewCR2, Subtree); + } + } + } + }; + + /// UnreachableBlocks keeps tracks of blocks that are for one reason or /// another discovered to be unreachable. This is used to cull the graph when /// analyzing instructions, and to mark blocks with the "unreachable" @@ -781,6 +980,8 @@ /// @brief VRPSolver calculates inferences from a new relationship. class VISIBILITY_HIDDEN VRPSolver { private: + friend class ValueRanges; + struct Operation { Value *LHS, *RHS; ICmpInst::Predicate Op; @@ -792,6 +993,8 @@ InequalityGraph &IG; UnreachableBlocks &UB; + ValueRanges &VR; + ETForest *Forest; ETNode *Top; BasicBlock *TopBB; @@ -997,14 +1200,7 @@ if (exitEarly) return true; // Create N1. - // XXX: this should call newNode, but instead the node might be created - // in isRelatedBy. That's also a fixme. - if (!n1) { - n1 = IG.getOrInsertNode(V1, Top); - - if (isa(V1)) - if (IG.isRelatedBy(n1, n2, Top, NE)) return false; - } + if (!n1) n1 = IG.newNode(V1); // Migrate relationships from removed nodes to N1. Node *N1 = IG.node(n1); @@ -1094,20 +1290,22 @@ } public: - VRPSolver(InequalityGraph &IG, UnreachableBlocks &UB, ETForest *Forest, - bool &modified, BasicBlock *TopBB) + VRPSolver(InequalityGraph &IG, UnreachableBlocks &UB, ValueRanges &VR, + ETForest *Forest, bool &modified, BasicBlock *TopBB) : IG(IG), UB(UB), + VR(VR), Forest(Forest), Top(Forest->getNodeForBlock(TopBB)), TopBB(TopBB), TopInst(NULL), modified(modified) {} - VRPSolver(InequalityGraph &IG, UnreachableBlocks &UB, ETForest *Forest, - bool &modified, Instruction *TopInst) + VRPSolver(InequalityGraph &IG, UnreachableBlocks &UB, ValueRanges &VR, + ETForest *Forest, bool &modified, Instruction *TopInst) : IG(IG), UB(UB), + VR(VR), Forest(Forest), TopInst(TopInst), modified(modified) @@ -1122,12 +1320,6 @@ return ConstantExpr::getCompare(Pred, C1, C2) == ConstantInt::getTrue(); - // XXX: this is lousy. If we're passed a Constant, then we might miss - // some relationships if it isn't in the IG because the relationships - // added by initializeConstant are missing. - if (isa(V1)) IG.getOrInsertNode(V1, Top); - if (isa(V2)) IG.getOrInsertNode(V2, Top); - if (unsigned n1 = IG.getNode(V1, Top)) if (unsigned n2 = IG.getNode(V2, Top)) { if (n1 == n2) return Pred == ICmpInst::ICMP_EQ || @@ -1136,10 +1328,11 @@ Pred == ICmpInst::ICMP_SLE || Pred == ICmpInst::ICMP_SGE; if (Pred == ICmpInst::ICMP_EQ) return false; - return IG.isRelatedBy(n1, n2, Top, cmpInstToLattice(Pred)); + if (IG.isRelatedBy(n1, n2, Top, cmpInstToLattice(Pred))) return true; } - return false; + if (Pred == ICmpInst::ICMP_EQ) return V1 == V2; + return VR.isRelatedBy(V1, V2, Top, cmpInstToLattice(Pred)); } /// add - adds a new property to the work queue @@ -1169,12 +1362,11 @@ Value *Op0 = IG.canonicalize(BO->getOperand(0), Top); Value *Op1 = IG.canonicalize(BO->getOperand(1), Top); - // TODO: "and bool true, %x" EQ %y then %x EQ %y. + // TODO: "and i32 -1, %x" EQ %y then %x EQ %y. switch (BO->getOpcode()) { case Instruction::And: { - // "and int %a, %b" EQ -1 then %a EQ -1 and %b EQ -1 - // "and bool %a, %b" EQ true then %a EQ true and %b EQ true + // "and i32 %a, %b" EQ -1 then %a EQ -1 and %b EQ -1 ConstantInt *CI = ConstantInt::getAllOnesValue(Ty); if (Canonical == CI) { add(CI, Op0, ICmpInst::ICMP_EQ, NewContext); @@ -1182,8 +1374,7 @@ } } break; case Instruction::Or: { - // "or int %a, %b" EQ 0 then %a EQ 0 and %b EQ 0 - // "or bool %a, %b" EQ false then %a EQ false and %b EQ false + // "or i32 %a, %b" EQ 0 then %a EQ 0 and %b EQ 0 Constant *Zero = Constant::getNullValue(Ty); if (Canonical == Zero) { add(Zero, Op0, ICmpInst::ICMP_EQ, NewContext); @@ -1191,13 +1382,10 @@ } } break; case Instruction::Xor: { - // "xor bool true, %a" EQ true then %a EQ false - // "xor bool true, %a" EQ false then %a EQ true - // "xor bool false, %a" EQ true then %a EQ true - // "xor bool false, %a" EQ false then %a EQ false - // "xor int %c, %a" EQ %c then %a EQ 0 - // "xor int %c, %a" NE %c then %a NE 0 - // 1. Repeat all of the above, with order of operands reversed. + // "xor i32 %c, %a" EQ %b then %a EQ %c ^ %b + // "xor i32 %c, %a" EQ %c then %a EQ 0 + // "xor i32 %c, %a" NE %c then %a NE 0 + // Repeat the above, with order of operands reversed. Value *LHS = Op0; Value *RHS = Op1; if (!isa(LHS)) std::swap(LHS, RHS); @@ -1221,7 +1409,7 @@ break; } } else if (ICmpInst *IC = dyn_cast(I)) { - // "icmp ult int %a, int %y" EQ true then %a u< y + // "icmp ult i32 %a, %y" EQ true then %a u< y // etc. if (Canonical == ConstantInt::getTrue()) { @@ -1234,7 +1422,7 @@ } else if (SelectInst *SI = dyn_cast(I)) { if (I->getType()->isFPOrFPVector()) return; - // Given: "%a = select bool %x, int %b, int %c" + // Given: "%a = select i1 %x, i32 %b, i32 %c" // %a EQ %b and %b NE %c then %x EQ true // %a EQ %c and %b NE %c then %x EQ false @@ -1246,7 +1434,7 @@ add(SI->getCondition(), ConstantInt::getTrue(), ICmpInst::ICMP_EQ, NewContext); else if (Canonical == IG.canonicalize(False, Top) || - isRelatedBy(I, True, ICmpInst::ICMP_NE)) + isRelatedBy(Canonical, True, ICmpInst::ICMP_NE)) add(SI->getCondition(), ConstantInt::getFalse(), ICmpInst::ICMP_EQ, NewContext); } @@ -1293,10 +1481,10 @@ } } - // "%x = add int %y, %z" and %x EQ %y then %z EQ 0 - // "%x = mul int %y, %z" and %x EQ %y then %z EQ 1 + // "%x = add i32 %y, %z" and %x EQ %y then %z EQ 0 + // "%x = mul i32 %y, %z" and %x EQ %y then %z EQ 1 // 1. Repeat all of the above, with order of operands reversed. - // "%x = udiv int %y, %z" and %x EQ %y then %z EQ 1 + // "%x = udiv i32 %y, %z" and %x EQ %y then %z EQ 1 Value *Known = Op0, *Unknown = Op1; if (Known != BO) std::swap(Known, Unknown); @@ -1326,11 +1514,11 @@ } } - // TODO: "%a = add int %b, 1" and %b > %z then %a >= %z. + // TODO: "%a = add i32 %b, 1" and %b > %z then %a >= %z. } else if (ICmpInst *IC = dyn_cast(I)) { - // "%a = icmp ult %b, %c" and %b u< %c then %a EQ true - // "%a = icmp ult %b, %c" and %b u>= %c then %a EQ false + // "%a = icmp ult i32 %b, %c" and %b u< %c then %a EQ true + // "%a = icmp ult i32 %b, %c" and %b u>= %c then %a EQ false // etc. Value *Op0 = IG.canonicalize(IC->getOperand(0), Top); @@ -1343,7 +1531,7 @@ add(IC, ConstantInt::getFalse(), ICmpInst::ICMP_EQ, NewContext); } - // TODO: "bool %x s %y" implies %x = true and %y = false. + // TODO: "i1 %x s %y" implies %x = true and %y = false. // TODO: make the predicate more strict, if possible. @@ -1363,11 +1551,12 @@ add(SI, SI->getTrueValue(), ICmpInst::ICMP_EQ, NewContext); } } else if (CastInst *CI = dyn_cast(I)) { - if (CI->getDestTy()->isFPOrFPVector()) return; + const Type *Ty = CI->getDestTy(); + if (Ty->isFPOrFPVector()) return; if (Constant *C = dyn_cast( IG.canonicalize(CI->getOperand(0), Top))) { - add(CI, ConstantExpr::getCast(CI->getOpcode(), C, CI->getDestTy()), + add(CI, ConstantExpr::getCast(CI->getOpcode(), C, Ty), ICmpInst::ICMP_EQ, NewContext); } @@ -1413,20 +1602,20 @@ } } - if (compare(O.RHS, O.LHS)) { + if (compare(O.LHS, O.RHS)) { std::swap(O.LHS, O.RHS); O.Op = ICmpInst::getSwappedPredicate(O.Op); } if (O.Op == ICmpInst::ICMP_EQ) { - if (!makeEqual(O.LHS, O.RHS)) + if (!makeEqual(O.RHS, O.LHS)) UB.mark(TopBB); } else { LatticeVal LV = cmpInstToLattice(O.Op); if ((LV & EQ_BIT) && isRelatedBy(O.LHS, O.RHS, ICmpInst::getSwappedPredicate(O.Op))) { - if (!makeEqual(O.LHS, O.RHS)) + if (!makeEqual(O.RHS, O.LHS)) UB.mark(TopBB); } else { if (isRelatedBy(O.LHS, O.RHS, ICmpInst::getInversePredicate(O.Op))){ @@ -1435,10 +1624,10 @@ continue; } - unsigned n1 = IG.getOrInsertNode(O.LHS, Top); - unsigned n2 = IG.getOrInsertNode(O.RHS, Top); + unsigned n1 = IG.getNode(O.LHS, Top); + unsigned n2 = IG.getNode(O.RHS, Top); - if (n1 == n2) { + if (n1 && n1 == n2) { if (O.Op != ICmpInst::ICMP_UGE && O.Op != ICmpInst::ICMP_ULE && O.Op != ICmpInst::ICMP_SGE && O.Op != ICmpInst::ICMP_SLE) UB.mark(TopBB); @@ -1447,40 +1636,20 @@ continue; } - if (IG.isRelatedBy(n1, n2, Top, LV)) { + if (VR.isRelatedBy(O.LHS, O.RHS, Top, LV) || + (n1 && n2 && IG.isRelatedBy(n1, n2, Top, LV))) { WorkList.pop_front(); continue; } - // Generalize %x u> -10 to %x > -10. - if (ConstantInt *CI = dyn_cast(O.RHS)) { - // xform doesn't apply to i1 - if (CI->getType()->getBitWidth() > 1) { - if (LV == SLT && CI->getValue().isNegative()) { - // i8 %x s< -5 implies %x < -5 and %x u> 127 - - const IntegerType *Ty = CI->getType(); - LV = LT; - add(O.LHS, ConstantInt::get( - APInt::getSignedMaxValue(Ty->getBitWidth())), - ICmpInst::ICMP_UGT); - } else if (LV == SGT && CI->getValue().isPositive()) { - // i8 %x s> 5 implies %x > 5 and %x u< 128 - - const IntegerType *Ty = CI->getType(); - LV = LT; - add(O.LHS, ConstantInt::get( - APInt::getSignedMinValue(Ty->getBitWidth())), - ICmpInst::ICMP_ULT); - } else if (CI->getValue().isPositive()) { - if (LV == ULT || LV == SLT) LV = LT; - if (LV == UGT || LV == SGT) LV = GT; - } - } + VR.addInequality(O.LHS, O.RHS, Top, LV, this); + if ((!isa(O.RHS) && !isa(O.LHS)) || + LV == NE) { + if (!n1) n1 = IG.newNode(O.LHS); + if (!n2) n2 = IG.newNode(O.RHS); + IG.addInequality(n1, n2, Top, LV); } - IG.addInequality(n1, n2, Top, LV); - if (Instruction *I1 = dyn_cast(O.LHS)) { if (below(I1) || Top->DominatedBy(Forest->getNodeForBlock(I1->getParent()))) @@ -1523,6 +1692,11 @@ } }; + void ValueRanges::addToWorklist(Value *V, const APInt *I, + ICmpInst::Predicate Pred, VRPSolver *VRP) { + VRP->add(V, ConstantInt::get(*I), Pred, VRP->TopInst); + } + /// PredicateSimplifier - This class is a simplifier that replaces /// one equivalent variable with another. It also tracks what /// can't be equal and will solve setcc instructions when possible. @@ -1533,6 +1707,7 @@ bool modified; InequalityGraph *IG; UnreachableBlocks UB; + ValueRanges *VR; std::vector WorkList; @@ -1560,9 +1735,10 @@ public: InequalityGraph &IG; UnreachableBlocks &UB; + ValueRanges &VR; Forwards(PredicateSimplifier *PS, DominatorTree::Node *DTNode) - : PS(PS), DTNode(DTNode), IG(*PS->IG), UB(PS->UB) {} + : PS(PS), DTNode(DTNode), IG(*PS->IG), UB(PS->UB), VR(*PS->VR) {} void visitTerminatorInst(TerminatorInst &TI); void visitBranchInst(BranchInst &BI); @@ -1577,7 +1753,7 @@ void visitBinaryOperator(BinaryOperator &BO); }; - + // Used by terminator instructions to proceed from the current basic // block to the next. Verifies that "current" dominates "next", // then calls visitBasicBlock. @@ -1665,6 +1841,7 @@ modified = false; BasicBlock *RootBlock = &F.getEntryBlock(); IG = new InequalityGraph(Forest->getNodeForBlock(RootBlock)); + VR = new ValueRanges(); WorkList.push_back(DT->getRootNode()); do { @@ -1673,6 +1850,7 @@ if (!UB.isDead(DTNode->getBlock())) visitBasicBlock(DTNode); } while (!WorkList.empty()); + delete VR; delete IG; modified |= UB.kill(); @@ -1707,13 +1885,13 @@ if (Dest == TrueDest) { DOUT << "(" << DTNode->getBlock()->getName() << ") true set:\n"; - VRPSolver VRP(IG, UB, PS->Forest, PS->modified, Dest); + VRPSolver VRP(IG, UB, VR, PS->Forest, PS->modified, Dest); VRP.add(ConstantInt::getTrue(), Condition, ICmpInst::ICMP_EQ); VRP.solve(); DEBUG(IG.dump()); } else if (Dest == FalseDest) { DOUT << "(" << DTNode->getBlock()->getName() << ") false set:\n"; - VRPSolver VRP(IG, UB, PS->Forest, PS->modified, Dest); + VRPSolver VRP(IG, UB, VR, PS->Forest, PS->modified, Dest); VRP.add(ConstantInt::getFalse(), Condition, ICmpInst::ICMP_EQ); VRP.solve(); DEBUG(IG.dump()); @@ -1735,7 +1913,7 @@ DOUT << "Switch thinking about BB %" << BB->getName() << "(" << PS->Forest->getNodeForBlock(BB)->getDFSNumIn() << ")\n"; - VRPSolver VRP(IG, UB, PS->Forest, PS->modified, BB); + VRPSolver VRP(IG, UB, VR, PS->Forest, PS->modified, BB); if (BB == SI.getDefaultDest()) { for (unsigned i = 1, e = SI.getNumCases(); i < e; ++i) if (SI.getSuccessor(i) != BB) @@ -1750,7 +1928,7 @@ } void PredicateSimplifier::Forwards::visitAllocaInst(AllocaInst &AI) { - VRPSolver VRP(IG, UB, PS->Forest, PS->modified, &AI); + VRPSolver VRP(IG, UB, VR, PS->Forest, PS->modified, &AI); VRP.add(Constant::getNullValue(AI.getType()), &AI, ICmpInst::ICMP_NE); VRP.solve(); } @@ -1760,7 +1938,7 @@ // avoid "load uint* null" -> null NE null. if (isa(Ptr)) return; - VRPSolver VRP(IG, UB, PS->Forest, PS->modified, &LI); + VRPSolver VRP(IG, UB, VR, PS->Forest, PS->modified, &LI); VRP.add(Constant::getNullValue(Ptr->getType()), Ptr, ICmpInst::ICMP_NE); VRP.solve(); } @@ -1769,13 +1947,13 @@ Value *Ptr = SI.getPointerOperand(); if (isa(Ptr)) return; - VRPSolver VRP(IG, UB, PS->Forest, PS->modified, &SI); + VRPSolver VRP(IG, UB, VR, PS->Forest, PS->modified, &SI); VRP.add(Constant::getNullValue(Ptr->getType()), Ptr, ICmpInst::ICMP_NE); VRP.solve(); } void PredicateSimplifier::Forwards::visitSExtInst(SExtInst &SI) { - VRPSolver VRP(IG, UB, PS->Forest, PS->modified, &SI); + VRPSolver VRP(IG, UB, VR, PS->Forest, PS->modified, &SI); uint32_t SrcBitWidth = cast(SI.getSrcTy())->getBitWidth(); uint32_t DstBitWidth = cast(SI.getDestTy())->getBitWidth(); APInt Min(APInt::getSignedMinValue(SrcBitWidth)); @@ -1788,7 +1966,7 @@ } void PredicateSimplifier::Forwards::visitZExtInst(ZExtInst &ZI) { - VRPSolver VRP(IG, UB, PS->Forest, PS->modified, &ZI); + VRPSolver VRP(IG, UB, VR, PS->Forest, PS->modified, &ZI); uint32_t SrcBitWidth = cast(ZI.getSrcTy())->getBitWidth(); uint32_t DstBitWidth = cast(ZI.getDestTy())->getBitWidth(); APInt Max(APInt::getMaxValue(SrcBitWidth)); @@ -1806,7 +1984,7 @@ case Instruction::UDiv: case Instruction::SDiv: { Value *Divisor = BO.getOperand(1); - VRPSolver VRP(IG, UB, PS->Forest, PS->modified, &BO); + VRPSolver VRP(IG, UB, VR, PS->Forest, PS->modified, &BO); VRP.add(Constant::getNullValue(Divisor->getType()), Divisor, ICmpInst::ICMP_NE); VRP.solve(); From zhousheng00 at gmail.com Sun Mar 11 01:16:27 2007 From: zhousheng00 at gmail.com (Zhou Sheng) Date: Sun, 11 Mar 2007 01:16:27 -0600 Subject: [llvm-commits] CVS: llvm/include/llvm/ADT/APInt.h Message-ID: <200703110716.l2B7GRFf027475@zion.cs.uiuc.edu> Changes in directory llvm/include/llvm/ADT: APInt.h updated: 1.40 -> 1.41 --- Log message: Add getSignBit() and operator<<= into APInt for convenience. --- Diffs of the changes: (+23 -0) APInt.h | 23 +++++++++++++++++++++++ 1 files changed, 23 insertions(+) Index: llvm/include/llvm/ADT/APInt.h diff -u llvm/include/llvm/ADT/APInt.h:1.40 llvm/include/llvm/ADT/APInt.h:1.41 --- llvm/include/llvm/ADT/APInt.h:1.40 Mon Mar 5 10:42:58 2007 +++ llvm/include/llvm/ADT/APInt.h Sun Mar 11 01:16:10 2007 @@ -386,6 +386,14 @@ /// @brief Left-shift function. APInt shl(uint32_t shiftAmt) const; + /// Left-shift this APInt by shiftAmt and + /// assigns the result to this APInt. + /// @brief Lef-shift assignment function. + inline APInt& operator<<=(uint32_t shiftAmt) { + *this = shl(shiftAmt); + return *this; + } + /// Signed divide this APInt by APInt RHS. /// @brief Signed division function for APInt. inline APInt sdiv(const APInt& RHS) const { @@ -464,6 +472,14 @@ /// @brief Toggles a given bit to its opposite value. APInt& flip(uint32_t bitPosition); + inline void setWordToValue(uint32_t idx, uint64_t Val) { + assert(idx < getNumWords() && "Invalid word array index"); + if (isSingleWord()) + VAL = Val; + else + pVal[idx] = Val; + } + /// This function returns the number of active bits which is defined as the /// bit width minus the number of leading zeros. This is used in several /// computations to see how "wide" the value is. @@ -551,6 +567,13 @@ return APInt(numBits, 0).set(numBits - 1); } + /// getSignBit - This is just a wrapper function of getSignedMinValue(), and + /// it helps code readability when we want to get a SignBit. + /// @brief Get the SignBit for a specific bit width. + inline static APInt getSignBit(uint32_t BitWidth) { + return getSignedMinValue(BitWidth); + } + /// @returns the all-ones value for an APInt of the specified bit-width. /// @brief Get the all-ones value. static APInt getAllOnesValue(uint32_t numBits) {