From reid at x10sys.com Mon Apr 30 00:12:22 2007
From: reid at x10sys.com (Reid Spencer)
Date: Mon, 30 Apr 2007 00:12:22 -0500
Subject: [llvm-commits] CVS:
llvm/test/CodeGen/PowerPC/2006-11-10-DAGCombineMiscompile.ll
ispositive.ll vector-identity-shuffle.ll
Message-ID: <200704300512.l3U5CM8k031591@zion.cs.uiuc.edu>
Changes in directory llvm/test/CodeGen/PowerPC:
2006-11-10-DAGCombineMiscompile.ll added (r1.1)
ispositive.ll added (r1.1)
vector-identity-shuffle.ll added (r1.1)
---
Log message:
For PR1370: http://llvm.org/PR1370 :
Rearrange some tests so that if PowerPC is not being built we don't try to
run PowerPC specific tests.
---
Diffs of the changes: (+40 -0)
2006-11-10-DAGCombineMiscompile.ll | 14 ++++++++++++++
ispositive.ll | 10 ++++++++++
vector-identity-shuffle.ll | 16 ++++++++++++++++
3 files changed, 40 insertions(+)
Index: llvm/test/CodeGen/PowerPC/2006-11-10-DAGCombineMiscompile.ll
diff -c /dev/null llvm/test/CodeGen/PowerPC/2006-11-10-DAGCombineMiscompile.ll:1.1
*** /dev/null Mon Apr 30 00:12:08 2007
--- llvm/test/CodeGen/PowerPC/2006-11-10-DAGCombineMiscompile.ll Mon Apr 30 00:11:58 2007
***************
*** 0 ****
--- 1,14 ----
+ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | grep rlwimi
+
+ void %test(short %div.0.i.i.i.i, int %L_num.0.i.i.i.i, int %tmp1.i.i206.i.i, short* %P) {
+ %X = shl short %div.0.i.i.i.i, ubyte 1 ; [#uses=1]
+ %tmp28.i.i.i.i = shl int %L_num.0.i.i.i.i, ubyte 1 ; [#uses=2]
+ %tmp31.i.i.i.i = setlt int %tmp28.i.i.i.i, %tmp1.i.i206.i.i ; [#uses=2]
+
+ %tmp31.i.i.i.i = cast bool %tmp31.i.i.i.i to short ; [#uses=1]
+ %tmp371.i.i.i.i1 = or short %tmp31.i.i.i.i, %X ; [#uses=1]
+ %div.0.be.i.i.i.i = xor short %tmp371.i.i.i.i1, 1 ; [#uses=1]
+ store short %div.0.be.i.i.i.i, short* %P
+ ret void
+ }
+
Index: llvm/test/CodeGen/PowerPC/ispositive.ll
diff -c /dev/null llvm/test/CodeGen/PowerPC/ispositive.ll:1.1
*** /dev/null Mon Apr 30 00:12:22 2007
--- llvm/test/CodeGen/PowerPC/ispositive.ll Mon Apr 30 00:11:58 2007
***************
*** 0 ****
--- 1,10 ----
+ ; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-apple-darwin8 | \
+ ; RUN: grep {srwi r3, r3, 31}
+
+ define i32 @test1(i32 %X) {
+ entry:
+ icmp slt i32 %X, 0 ; :0 [#uses=1]
+ zext i1 %0 to i32 ; :1 [#uses=1]
+ ret i32 %1
+ }
+
Index: llvm/test/CodeGen/PowerPC/vector-identity-shuffle.ll
diff -c /dev/null llvm/test/CodeGen/PowerPC/vector-identity-shuffle.ll:1.1
*** /dev/null Mon Apr 30 00:12:22 2007
--- llvm/test/CodeGen/PowerPC/vector-identity-shuffle.ll Mon Apr 30 00:11:58 2007
***************
*** 0 ****
--- 1,16 ----
+ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5 | grep test:
+ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5 | not grep vperm
+
+ void %test(<4 x float> *%tmp2.i) {
+ %tmp2.i = load <4x float>* %tmp2.i
+ %xFloat0.48 = extractelement <4 x float> %tmp2.i, uint 0 ; [#uses=1]
+ %inFloat0.49 = insertelement <4 x float> undef, float %xFloat0.48, uint 0 ; <<4 x float>> [#uses=1]
+ %xFloat1.50 = extractelement <4 x float> %tmp2.i, uint 1 ; [#uses=1]
+ %inFloat1.52 = insertelement <4 x float> %inFloat0.49, float %xFloat1.50, uint 1 ; <<4 x float>> [#uses=1]
+ %xFloat2.53 = extractelement <4 x float> %tmp2.i, uint 2 ; [#uses=1]
+ %inFloat2.55 = insertelement <4 x float> %inFloat1.52, float %xFloat2.53, uint 2 ; <<4 x float>> [#uses=1]
+ %xFloat3.56 = extractelement <4 x float> %tmp2.i, uint 3 ; [#uses=1]
+ %inFloat3.58 = insertelement <4 x float> %inFloat2.55, float %xFloat3.56, uint 3 ; <<4 x float>> [#uses=4]
+ store <4 x float> %inFloat3.58, <4x float>* %tmp2.i
+ ret void
+ }
From reid at x10sys.com Mon Apr 30 00:12:26 2007
From: reid at x10sys.com (Reid Spencer)
Date: Mon, 30 Apr 2007 00:12:26 -0500
Subject: [llvm-commits] CVS:
llvm/test/CodeGen/Generic/vector-identity-shuffle.ll
2006-11-10-DAGCombineMiscompile.ll ispositive.ll
Message-ID: <200704300512.l3U5CQ8k031596@zion.cs.uiuc.edu>
Changes in directory llvm/test/CodeGen/Generic:
vector-identity-shuffle.ll updated: 1.5 -> 1.6
2006-11-10-DAGCombineMiscompile.ll (r1.2) removed
ispositive.ll (r1.5) removed
---
Log message:
For PR1370: http://llvm.org/PR1370 :
Rearrange some tests so that if PowerPC is not being built we don't try to
run PowerPC specific tests.
---
Diffs of the changes: (+0 -2)
vector-identity-shuffle.ll | 2 --
1 files changed, 2 deletions(-)
Index: llvm/test/CodeGen/Generic/vector-identity-shuffle.ll
diff -u llvm/test/CodeGen/Generic/vector-identity-shuffle.ll:1.5 llvm/test/CodeGen/Generic/vector-identity-shuffle.ll:1.6
--- llvm/test/CodeGen/Generic/vector-identity-shuffle.ll:1.5 Mon Apr 16 12:36:06 2007
+++ llvm/test/CodeGen/Generic/vector-identity-shuffle.ll Mon Apr 30 00:11:58 2007
@@ -1,5 +1,3 @@
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5 | grep test:
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5 | not grep vperm
; RUN: llvm-upgrade < %s | llvm-as | llc
void %test(<4 x float> *%tmp2.i) {
From reid at x10sys.com Mon Apr 30 00:12:28 2007
From: reid at x10sys.com (Reid Spencer)
Date: Mon, 30 Apr 2007 00:12:28 -0500
Subject: [llvm-commits] CVS: llvm/test/CodeGen/ARM/ispositive.ll
Message-ID: <200704300512.l3U5CSHP031606@zion.cs.uiuc.edu>
Changes in directory llvm/test/CodeGen/ARM:
ispositive.ll added (r1.1)
---
Log message:
For PR1370: http://llvm.org/PR1370 :
Rearrange some tests so that if PowerPC is not being built we don't try to
run PowerPC specific tests.
---
Diffs of the changes: (+10 -0)
ispositive.ll | 10 ++++++++++
1 files changed, 10 insertions(+)
Index: llvm/test/CodeGen/ARM/ispositive.ll
diff -c /dev/null llvm/test/CodeGen/ARM/ispositive.ll:1.1
*** /dev/null Mon Apr 30 00:12:08 2007
--- llvm/test/CodeGen/ARM/ispositive.ll Mon Apr 30 00:11:58 2007
***************
*** 0 ****
--- 1,10 ----
+ ; RUN: llvm-as < %s | llc -march=arm | grep {mov r0, r0, lsr #31}
+ ; RUN: llvm-as < %s | llc -march=thumb | grep {lsr r0, r0, #31}
+
+ define i32 @test1(i32 %X) {
+ entry:
+ icmp slt i32 %X, 0 ; :0 [#uses=1]
+ zext i1 %0 to i32 ; :1 [#uses=1]
+ ret i32 %1
+ }
+
From reid at x10sys.com Mon Apr 30 00:12:28 2007
From: reid at x10sys.com (Reid Spencer)
Date: Mon, 30 Apr 2007 00:12:28 -0500
Subject: [llvm-commits] CVS: llvm/test/CodeGen/X86/ispositive.ll
Message-ID: <200704300512.l3U5CSQe031603@zion.cs.uiuc.edu>
Changes in directory llvm/test/CodeGen/X86:
ispositive.ll added (r1.1)
---
Log message:
For PR1370: http://llvm.org/PR1370 :
Rearrange some tests so that if PowerPC is not being built we don't try to
run PowerPC specific tests.
---
Diffs of the changes: (+9 -0)
ispositive.ll | 9 +++++++++
1 files changed, 9 insertions(+)
Index: llvm/test/CodeGen/X86/ispositive.ll
diff -c /dev/null llvm/test/CodeGen/X86/ispositive.ll:1.1
*** /dev/null Mon Apr 30 00:12:08 2007
--- llvm/test/CodeGen/X86/ispositive.ll Mon Apr 30 00:11:58 2007
***************
*** 0 ****
--- 1,9 ----
+ ; RUN: llvm-as < %s | llc -march=x86 | grep {shrl.*31}
+
+ define i32 @test1(i32 %X) {
+ entry:
+ icmp slt i32 %X, 0 ; :0 [#uses=1]
+ zext i1 %0 to i32 ; :1 [#uses=1]
+ ret i32 %1
+ }
+
From clattner at apple.com Mon Apr 30 00:29:17 2007
From: clattner at apple.com (Chris Lattner)
Date: Sun, 29 Apr 2007 22:29:17 -0700
Subject: [llvm-commits] CVS: llvm/test/CodeGen/X86/ispositive.ll
In-Reply-To: <200704300512.l3U5CSQe031603@zion.cs.uiuc.edu>
References: <200704300512.l3U5CSQe031603@zion.cs.uiuc.edu>
Message-ID: <05E51D6B-B2C0-401E-A544-C070DB085D0F@apple.com>
Reid, why are you duplicating these tests?
-Chris
On Apr 29, 2007, at 10:12 PM, Reid Spencer wrote:
>
>
> Changes in directory llvm/test/CodeGen/X86:
>
> ispositive.ll added (r1.1)
> ---
> Log message:
>
> For PR1370: http://llvm.org/PR1370 :
> Rearrange some tests so that if PowerPC is not being built we don't
> try to
> run PowerPC specific tests.
>
>
> ---
> Diffs of the changes: (+9 -0)
>
> ispositive.ll | 9 +++++++++
> 1 files changed, 9 insertions(+)
>
>
> Index: llvm/test/CodeGen/X86/ispositive.ll
> diff -c /dev/null llvm/test/CodeGen/X86/ispositive.ll:1.1
> *** /dev/null Mon Apr 30 00:12:08 2007
> --- llvm/test/CodeGen/X86/ispositive.ll Mon Apr 30 00:11:58 2007
> ***************
> *** 0 ****
> --- 1,9 ----
> + ; RUN: llvm-as < %s | llc -march=x86 | grep {shrl.*31}
> +
> + define i32 @test1(i32 %X) {
> + entry:
> + icmp slt i32 %X, 0 ; :0 [#uses=1]
> + zext i1 %0 to i32 ; :1 [#uses=1]
> + ret i32 %1
> + }
> +
>
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
From asl at math.spbu.ru Mon Apr 30 05:29:00 2007
From: asl at math.spbu.ru (Anton Korobeynikov)
Date: Mon, 30 Apr 2007 05:29:00 -0500
Subject: [llvm-commits] CVS: llvm/lib/VMCore/Globals.cpp
Message-ID: <200704301029.l3UAT0m4013798@zion.cs.uiuc.edu>
Changes in directory llvm/lib/VMCore:
Globals.cpp updated: 1.22 -> 1.23
---
Log message:
Fix typo. Interesting, but old variant worked too :)
---
Diffs of the changes: (+1 -1)
Globals.cpp | 2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/lib/VMCore/Globals.cpp
diff -u llvm/lib/VMCore/Globals.cpp:1.22 llvm/lib/VMCore/Globals.cpp:1.23
--- llvm/lib/VMCore/Globals.cpp:1.22 Sun Apr 29 13:02:48 2007
+++ llvm/lib/VMCore/Globals.cpp Mon Apr 30 05:28:40 2007
@@ -217,7 +217,7 @@
return GV;
else {
const ConstantExpr *CE = 0;
- if ((CE = dyn_cast(Aliasee)) &&
+ if ((CE = dyn_cast(C)) &&
(CE->getOpcode() == Instruction::BitCast))
return cast(CE->getOperand(0));
else
From rspencer at reidspencer.com Mon Apr 30 05:41:38 2007
From: rspencer at reidspencer.com (Reid Spencer)
Date: Mon, 30 Apr 2007 06:41:38 -0400
Subject: [llvm-commits] CVS: llvm/test/CodeGen/X86/ispositive.ll
In-Reply-To: <05E51D6B-B2C0-401E-A544-C070DB085D0F@apple.com>
References: <200704300512.l3U5CSQe031603@zion.cs.uiuc.edu>
<05E51D6B-B2C0-401E-A544-C070DB085D0F@apple.com>
Message-ID:
On Sun, 29 Apr 2007 22:29:17 -0700
Chris Lattner wrote:
>
>Reid, why are you duplicating these tests?
Because they need to be. Such tests will cause false regressions if LLVM is not built with support for all the targets used in the test case. Duplicating them into the various target sub-directories (instead of in the Generic directory) eliminates the "false positives" when fewer targets are built. Please see PR1370 for a more complete description. If you still have a problem with this, call me on my cell phone to discuss.
>
>-Chris
>
>On Apr 29, 2007, at 10:12 PM, Reid Spencer wrote:
>
>>
>>
>> Changes in directory llvm/test/CodeGen/X86:
>>
>> ispositive.ll added (r1.1)
>> ---
>> Log message:
>>
>> For PR1370: http://llvm.org/PR1370 :
>> Rearrange some tests so that if PowerPC is not being built we don't
>> try to
>> run PowerPC specific tests.
>>
>>
>> ---
>> Diffs of the changes: (+9 -0)
>>
>> ispositive.ll | 9 +++++++++
>> 1 files changed, 9 insertions(+)
>>
>>
>> Index: llvm/test/CodeGen/X86/ispositive.ll
>> diff -c /dev/null llvm/test/CodeGen/X86/ispositive.ll:1.1
>> *** /dev/null Mon Apr 30 00:12:08 2007
>> --- llvm/test/CodeGen/X86/ispositive.ll Mon Apr 30 00:11:58 2007
>> ***************
>> *** 0 ****
>> --- 1,9 ----
>> + ; RUN: llvm-as < %s | llc -march=x86 | grep {shrl.*31}
>> +
>> + define i32 @test1(i32 %X) {
>> + entry:
>> + icmp slt i32 %X, 0 ; :0 [#uses=1]
>> + zext i1 %0 to i32 ; :1 [#uses=1]
>> + ret i32 %1
>> + }
>> +
>>
>>
>>
>> _______________________________________________
>> llvm-commits mailing list
>> llvm-commits at cs.uiuc.edu
>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>
>_______________________________________________
>llvm-commits mailing list
>llvm-commits at cs.uiuc.edu
>http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
From lauro.venancio at gmail.com Mon Apr 30 08:55:52 2007
From: lauro.venancio at gmail.com (Lauro Ramos Venancio)
Date: Mon, 30 Apr 2007 10:55:52 -0300
Subject: [llvm-commits] CVS: llvm/lib/Target/ARM/ARMRegisterInfo.cpp
In-Reply-To:
References: <200704271758.l3RHwOvn001069@zion.cs.uiuc.edu>
Message-ID: <9c10c9f0704300655j5da5e8b9p2c958f6e542040fe@mail.gmail.com>
Evan,
The problem is the semantics. A possible solution is rename
UseThumbBacktraces to UseThumbFramePtrReg.
Lauro
2007/4/27, Evan Cheng :
>
> Hi Lauro,
>
> It would be better to fix ARMSubtarget.cpp instead. Just initialize
> UseThumbBacktraces to the value of input parameter thumb to the
> ARMSubtarget ctor.
>
> Evan
>
> On Apr 27, 2007, at 10:58 AM, Lauro Ramos Venancio wrote:
>
> >
> >
> > Changes in directory llvm/lib/Target/ARM:
> >
> > ARMRegisterInfo.cpp updated: 1.88 -> 1.89
> > ---
> > Log message:
> >
> > In Thumb mode, the frame register must be R7.
> >
> >
> > ---
> > Diffs of the changes: (+2 -2)
> >
> > ARMRegisterInfo.cpp | 4 ++--
> > 1 files changed, 2 insertions(+), 2 deletions(-)
> >
> >
> > Index: llvm/lib/Target/ARM/ARMRegisterInfo.cpp
> > diff -u llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.88 llvm/lib/
> > Target/ARM/ARMRegisterInfo.cpp:1.89
> > --- llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.88 Wed Apr 25
> > 17:13:27 2007
> > +++ llvm/lib/Target/ARM/ARMRegisterInfo.cpp Fri Apr 27 12:58:03 2007
> > @@ -85,7 +85,7 @@
> > const ARMSubtarget &sti)
> > : ARMGenRegisterInfo(ARM::ADJCALLSTACKDOWN, ARM::ADJCALLSTACKUP),
> > TII(tii), STI(sti),
> > - FramePtr(STI.useThumbBacktraces() ? ARM::R7 : ARM::R11) {
> > + FramePtr(STI.useThumbBacktraces() || STI.isThumb() ? ARM::R7 :
> > ARM::R11) {
> > }
> >
> > bool ARMRegisterInfo::spillCalleeSavedRegisters(MachineBasicBlock
> > &MBB,
> > @@ -1472,7 +1472,7 @@
> >
> > unsigned ARMRegisterInfo::getFrameRegister(MachineFunction &MF)
> > const {
> > if (STI.isTargetDarwin() || hasFP(MF))
> > - return STI.useThumbBacktraces() ? ARM::R7 : ARM::R11;
> > + return STI.useThumbBacktraces() || STI.isThumb() ? ARM::R7 :
> > ARM::R11;
> > else
> > return ARM::SP;
> > }
> >
> >
> >
> > _______________________________________________
> > llvm-commits mailing list
> > llvm-commits at cs.uiuc.edu
> > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>
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From jlh at gmx.ch Mon Apr 30 08:45:54 2007
From: jlh at gmx.ch (jlh)
Date: Mon, 30 Apr 2007 15:45:54 +0200
Subject: [llvm-commits] Patch for bug in llvm-ld
Message-ID: <4635F312.5040301@gmx.ch>
Hello!
I've been told to send this here. In tools/llvm-ld/llvm-ld.cpp,
line 360, a const char* to a temporary std::string is being
stored, with the string going out of scope right after, making
that pointer invalid.
std::string lib_name = "-l" + LinkItems[index].first;
args.push_back(lib_name.c_str());
The attached patch fixes this in a simple way.
jlh
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From sabre at nondot.org Mon Apr 30 12:00:49 2007
From: sabre at nondot.org (Chris Lattner)
Date: Mon, 30 Apr 2007 12:00:49 -0500
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/AsmPrinter.cpp
Message-ID: <200704301700.l3UH0nme021396@zion.cs.uiuc.edu>
Changes in directory llvm/lib/CodeGen:
AsmPrinter.cpp updated: 1.159 -> 1.160
---
Log message:
Clean up multi-line asam string printing. Instead of printing:
# InlineAsm Start
subfc r3,r5,r4
subfze r4,r3
# InlineAsm End
print:
# InlineAsm Start
subfc r3,r5,r4
subfze r4,r3
# InlineAsm End
---
Diffs of the changes: (+1 -1)
AsmPrinter.cpp | 2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/lib/CodeGen/AsmPrinter.cpp
diff -u llvm/lib/CodeGen/AsmPrinter.cpp:1.159 llvm/lib/CodeGen/AsmPrinter.cpp:1.160
--- llvm/lib/CodeGen/AsmPrinter.cpp:1.159 Sun Apr 29 13:02:48 2007
+++ llvm/lib/CodeGen/AsmPrinter.cpp Mon Apr 30 12:00:18 2007
@@ -954,7 +954,7 @@
}
case '\n':
++LastEmitted; // Consume newline character.
- O << "\n\t"; // Indent code with newline.
+ O << "\n"; // Indent code with newline.
break;
case '$': {
++LastEmitted; // Consume '$' character.
From sabre at nondot.org Mon Apr 30 12:16:45 2007
From: sabre at nondot.org (Chris Lattner)
Date: Mon, 30 Apr 2007 12:16:45 -0500
Subject: [llvm-commits] CVS:
llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
Message-ID: <200704301716.l3UHGjiL021797@zion.cs.uiuc.edu>
Changes in directory llvm/lib/CodeGen/SelectionDAG:
SelectionDAGISel.cpp updated: 1.439 -> 1.440
---
Log message:
refactor some code, no functionality change
---
Diffs of the changes: (+52 -44)
SelectionDAGISel.cpp | 96 +++++++++++++++++++++++++++------------------------
1 files changed, 52 insertions(+), 44 deletions(-)
Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.439 llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.440
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.439 Sun Apr 29 13:58:03 2007
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Mon Apr 30 12:16:27 2007
@@ -3134,44 +3134,6 @@
return RegsForValue();
}
-/// getConstraintGenerality - Return an integer indicating how general CT is.
-static unsigned getConstraintGenerality(TargetLowering::ConstraintType CT) {
- switch (CT) {
- default: assert(0 && "Unknown constraint type!");
- case TargetLowering::C_Other:
- case TargetLowering::C_Unknown:
- return 0;
- case TargetLowering::C_Register:
- return 1;
- case TargetLowering::C_RegisterClass:
- return 2;
- case TargetLowering::C_Memory:
- return 3;
- }
-}
-
-static std::string GetMostGeneralConstraint(std::vector &C,
- const TargetLowering &TLI) {
- assert(!C.empty() && "Must have at least one constraint");
- if (C.size() == 1) return C[0];
-
- std::string *Current = &C[0];
- // If we have multiple constraints, try to pick the most general one ahead
- // of time. This isn't a wonderful solution, but handles common cases.
- TargetLowering::ConstraintType Flavor = TLI.getConstraintType(Current[0]);
- for (unsigned j = 1, e = C.size(); j != e; ++j) {
- TargetLowering::ConstraintType ThisFlavor = TLI.getConstraintType(C[j]);
- if (getConstraintGenerality(ThisFlavor) >
- getConstraintGenerality(Flavor)) {
- // This constraint letter is more general than the previous one,
- // use it.
- Flavor = ThisFlavor;
- Current = &C[j];
- }
- }
- return *Current;
-}
-
namespace {
/// AsmOperandInfo - This contains information for each constraint that we are
/// lowering.
@@ -3197,9 +3159,59 @@
ConstraintType(TargetLowering::C_Unknown),
CallOperand(0,0), CallOperandVal(0), ConstraintVT(MVT::Other) {
}
+
+ void ComputeConstraintToUse(const TargetLowering &TLI);
};
} // end anon namespace.
+/// getConstraintGenerality - Return an integer indicating how general CT is.
+static unsigned getConstraintGenerality(TargetLowering::ConstraintType CT) {
+ switch (CT) {
+ default: assert(0 && "Unknown constraint type!");
+ case TargetLowering::C_Other:
+ case TargetLowering::C_Unknown:
+ return 0;
+ case TargetLowering::C_Register:
+ return 1;
+ case TargetLowering::C_RegisterClass:
+ return 2;
+ case TargetLowering::C_Memory:
+ return 3;
+ }
+}
+
+void AsmOperandInfo::ComputeConstraintToUse(const TargetLowering &TLI) {
+ assert(!Codes.empty() && "Must have at least one constraint");
+
+ std::string *Current = &Codes[0];
+ TargetLowering::ConstraintType CurType = TLI.getConstraintType(*Current);
+ if (Codes.size() == 1) { // Single-letter constraints ('r') are very common.
+ ConstraintCode = *Current;
+ ConstraintType = CurType;
+ return;
+ }
+
+ unsigned CurGenerality = getConstraintGenerality(CurType);
+
+ // If we have multiple constraints, try to pick the most general one ahead
+ // of time. This isn't a wonderful solution, but handles common cases.
+ for (unsigned j = 1, e = Codes.size(); j != e; ++j) {
+ TargetLowering::ConstraintType ThisType = TLI.getConstraintType(Codes[j]);
+ unsigned ThisGenerality = getConstraintGenerality(ThisType);
+ if (ThisGenerality > CurGenerality) {
+ // This constraint letter is more general than the previous one,
+ // use it.
+ CurType = ThisType;
+ Current = &Codes[j];
+ CurGenerality = ThisGenerality;
+ }
+ }
+
+ ConstraintCode = *Current;
+ ConstraintType = CurType;
+}
+
+
/// visitInlineAsm - Handle a call to an InlineAsm object.
///
void SelectionDAGLowering::visitInlineAsm(CallInst &I) {
@@ -3274,12 +3286,8 @@
OpInfo.ConstraintVT = OpVT;
- // Compute the constraint code to use.
- OpInfo.ConstraintCode = GetMostGeneralConstraint(OpInfo.Codes, TLI);
-
- // Compute the constraint type.
- // FIXME: merge this into GetMostGeneralConstraint.
- OpInfo.ConstraintType = TLI.getConstraintType(OpInfo.ConstraintCode);
+ // Compute the constraint code and ConstraintType to use.
+ OpInfo.ComputeConstraintToUse(TLI);
// If this is a memory input, and if the operand is not indirect, do what we
From tonic at nondot.org Mon Apr 30 12:29:03 2007
From: tonic at nondot.org (Tanya Lattner)
Date: Mon, 30 Apr 2007 12:29:03 -0500
Subject: [llvm-commits] CVS: nightlytest-serverside/AcceptTestResults.php
Message-ID: <200704301729.l3UHT3kS022103@zion.cs.uiuc.edu>
Changes in directory nightlytest-serverside:
AcceptTestResults.php updated: 1.1 -> 1.2
---
Log message:
Removed extra call to function.
---
Diffs of the changes: (+1 -2)
AcceptTestResults.php | 3 +--
1 files changed, 1 insertion(+), 2 deletions(-)
Index: nightlytest-serverside/AcceptTestResults.php
diff -u nightlytest-serverside/AcceptTestResults.php:1.1 nightlytest-serverside/AcceptTestResults.php:1.2
--- nightlytest-serverside/AcceptTestResults.php:1.1 Sun Apr 29 13:56:27 2007
+++ nightlytest-serverside/AcceptTestResults.php Mon Apr 30 12:28:47 2007
@@ -548,5 +548,4 @@
shutdown($mysql_link);
}
-acceptTestResults();
-?>
\ No newline at end of file
+?>
From sabre at nondot.org Mon Apr 30 12:29:48 2007
From: sabre at nondot.org (Chris Lattner)
Date: Mon, 30 Apr 2007 12:29:48 -0500
Subject: [llvm-commits] CVS:
llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
Message-ID: <200704301729.l3UHTmis022145@zion.cs.uiuc.edu>
Changes in directory llvm/lib/CodeGen/SelectionDAG:
SelectionDAGISel.cpp updated: 1.440 -> 1.441
---
Log message:
refactor GetRegistersForValue to take OpInfo as an argument instead of various
pieces of it. No functionality change.
---
Diffs of the changes: (+101 -98)
SelectionDAGISel.cpp | 199 +++++++++++++++++++++++++--------------------------
1 files changed, 101 insertions(+), 98 deletions(-)
Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.440 llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.441
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.440 Mon Apr 30 12:16:27 2007
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Mon Apr 30 12:29:31 2007
@@ -82,6 +82,8 @@
createDefaultScheduler);
} // namespace
+namespace { struct AsmOperandInfo; }
+
namespace {
/// RegsForValue - This struct represents the physical registers that a
/// particular value is assigned and the type information about the value.
@@ -516,8 +518,7 @@
N = NewN;
}
- RegsForValue GetRegistersForValue(const std::string &ConstrCode,
- MVT::ValueType VT,
+ RegsForValue GetRegistersForValue(AsmOperandInfo &OpInfo,
bool OutReg, bool InReg,
std::set &OutputRegs,
std::set &InputRegs);
@@ -3013,23 +3014,105 @@
return FoundRC;
}
+
+namespace {
+/// AsmOperandInfo - This contains information for each constraint that we are
+/// lowering.
+struct AsmOperandInfo : public InlineAsm::ConstraintInfo {
+ /// ConstraintCode - This contains the actual string for the code, like "m".
+ std::string ConstraintCode;
+
+ /// ConstraintType - Information about the constraint code, e.g. Register,
+ /// RegisterClass, Memory, Other, Unknown.
+ TargetLowering::ConstraintType ConstraintType;
+
+ /// CallOperand/CallOperandval - If this is the result output operand or a
+ /// clobber, this is null, otherwise it is the incoming operand to the
+ /// CallInst. This gets modified as the asm is processed.
+ SDOperand CallOperand;
+ Value *CallOperandVal;
+
+ /// ConstraintVT - The ValueType for the operand value.
+ MVT::ValueType ConstraintVT;
+
+ AsmOperandInfo(const InlineAsm::ConstraintInfo &info)
+ : InlineAsm::ConstraintInfo(info),
+ ConstraintType(TargetLowering::C_Unknown),
+ CallOperand(0,0), CallOperandVal(0), ConstraintVT(MVT::Other) {
+ }
+
+ void ComputeConstraintToUse(const TargetLowering &TLI);
+};
+} // end anon namespace.
+
+/// getConstraintGenerality - Return an integer indicating how general CT is.
+static unsigned getConstraintGenerality(TargetLowering::ConstraintType CT) {
+ switch (CT) {
+ default: assert(0 && "Unknown constraint type!");
+ case TargetLowering::C_Other:
+ case TargetLowering::C_Unknown:
+ return 0;
+ case TargetLowering::C_Register:
+ return 1;
+ case TargetLowering::C_RegisterClass:
+ return 2;
+ case TargetLowering::C_Memory:
+ return 3;
+ }
+}
+
+void AsmOperandInfo::ComputeConstraintToUse(const TargetLowering &TLI) {
+ assert(!Codes.empty() && "Must have at least one constraint");
+
+ std::string *Current = &Codes[0];
+ TargetLowering::ConstraintType CurType = TLI.getConstraintType(*Current);
+ if (Codes.size() == 1) { // Single-letter constraints ('r') are very common.
+ ConstraintCode = *Current;
+ ConstraintType = CurType;
+ return;
+ }
+
+ unsigned CurGenerality = getConstraintGenerality(CurType);
+
+ // If we have multiple constraints, try to pick the most general one ahead
+ // of time. This isn't a wonderful solution, but handles common cases.
+ for (unsigned j = 1, e = Codes.size(); j != e; ++j) {
+ TargetLowering::ConstraintType ThisType = TLI.getConstraintType(Codes[j]);
+ unsigned ThisGenerality = getConstraintGenerality(ThisType);
+ if (ThisGenerality > CurGenerality) {
+ // This constraint letter is more general than the previous one,
+ // use it.
+ CurType = ThisType;
+ Current = &Codes[j];
+ CurGenerality = ThisGenerality;
+ }
+ }
+
+ ConstraintCode = *Current;
+ ConstraintType = CurType;
+}
+
+
RegsForValue SelectionDAGLowering::
-GetRegistersForValue(const std::string &ConstrCode,
- MVT::ValueType VT, bool isOutReg, bool isInReg,
+GetRegistersForValue(AsmOperandInfo &OpInfo, bool isOutReg, bool isInReg,
std::set &OutputRegs,
std::set &InputRegs) {
std::pair PhysReg =
- TLI.getRegForInlineAsmConstraint(ConstrCode, VT);
+ TLI.getRegForInlineAsmConstraint(OpInfo.ConstraintCode,OpInfo.ConstraintVT);
std::vector Regs;
- unsigned NumRegs = VT != MVT::Other ? TLI.getNumElements(VT) : 1;
+ unsigned NumRegs = 1;
+ if (OpInfo.ConstraintVT != MVT::Other)
+ NumRegs = TLI.getNumElements(OpInfo.ConstraintVT);
MVT::ValueType RegVT;
- MVT::ValueType ValueVT = VT;
+ MVT::ValueType ValueVT = OpInfo.ConstraintVT;
+ MachineFunction &MF = DAG.getMachineFunction();
+
// If this is a constraint for a specific physical register, like {r17},
// assign it now.
if (PhysReg.first) {
- if (VT == MVT::Other)
+ if (OpInfo.ConstraintVT == MVT::Other)
ValueVT = *PhysReg.second->vt_begin();
// Get the actual register value type. This is important, because the user
@@ -3067,11 +3150,11 @@
if (!isOutReg || !isInReg) {
RegVT = *PhysReg.second->vt_begin();
- if (VT == MVT::Other)
+ if (OpInfo.ConstraintVT == MVT::Other)
ValueVT = RegVT;
// Create the appropriate number of virtual registers.
- SSARegMap *RegMap = DAG.getMachineFunction().getSSARegMap();
+ SSARegMap *RegMap = MF.getSSARegMap();
for (; NumRegs; --NumRegs)
Regs.push_back(RegMap->createVirtualRegister(PhysReg.second));
@@ -3086,11 +3169,11 @@
// This is a reference to a register class that doesn't directly correspond
// to an LLVM register class. Allocate NumRegs consecutive, available,
// registers from the class.
- RegClassRegs = TLI.getRegClassForInlineAsmConstraint(ConstrCode, VT);
+ RegClassRegs = TLI.getRegClassForInlineAsmConstraint(OpInfo.ConstraintCode,
+ OpInfo.ConstraintVT);
}
const MRegisterInfo *MRI = DAG.getTarget().getRegisterInfo();
- MachineFunction &MF = *CurMBB->getParent();
unsigned NumAllocated = 0;
for (unsigned i = 0, e = RegClassRegs.size(); i != e; ++i) {
unsigned Reg = RegClassRegs[i];
@@ -3126,7 +3209,7 @@
if (isInReg) InputRegs.insert(Reg); // Mark reg used.
}
- return RegsForValue(Regs, *RC->vt_begin(), VT);
+ return RegsForValue(Regs, *RC->vt_begin(), OpInfo.ConstraintVT);
}
}
@@ -3134,83 +3217,6 @@
return RegsForValue();
}
-namespace {
-/// AsmOperandInfo - This contains information for each constraint that we are
-/// lowering.
-struct AsmOperandInfo : public InlineAsm::ConstraintInfo {
- /// ConstraintCode - This contains the actual string for the code, like "m".
- std::string ConstraintCode;
-
- /// ConstraintType - Information about the constraint code, e.g. Register,
- /// RegisterClass, Memory, Other, Unknown.
- TargetLowering::ConstraintType ConstraintType;
-
- /// CallOperand/CallOperandval - If this is the result output operand or a
- /// clobber, this is null, otherwise it is the incoming operand to the
- /// CallInst. This gets modified as the asm is processed.
- SDOperand CallOperand;
- Value *CallOperandVal;
-
- /// ConstraintVT - The ValueType for the operand value.
- MVT::ValueType ConstraintVT;
-
- AsmOperandInfo(const InlineAsm::ConstraintInfo &info)
- : InlineAsm::ConstraintInfo(info),
- ConstraintType(TargetLowering::C_Unknown),
- CallOperand(0,0), CallOperandVal(0), ConstraintVT(MVT::Other) {
- }
-
- void ComputeConstraintToUse(const TargetLowering &TLI);
-};
-} // end anon namespace.
-
-/// getConstraintGenerality - Return an integer indicating how general CT is.
-static unsigned getConstraintGenerality(TargetLowering::ConstraintType CT) {
- switch (CT) {
- default: assert(0 && "Unknown constraint type!");
- case TargetLowering::C_Other:
- case TargetLowering::C_Unknown:
- return 0;
- case TargetLowering::C_Register:
- return 1;
- case TargetLowering::C_RegisterClass:
- return 2;
- case TargetLowering::C_Memory:
- return 3;
- }
-}
-
-void AsmOperandInfo::ComputeConstraintToUse(const TargetLowering &TLI) {
- assert(!Codes.empty() && "Must have at least one constraint");
-
- std::string *Current = &Codes[0];
- TargetLowering::ConstraintType CurType = TLI.getConstraintType(*Current);
- if (Codes.size() == 1) { // Single-letter constraints ('r') are very common.
- ConstraintCode = *Current;
- ConstraintType = CurType;
- return;
- }
-
- unsigned CurGenerality = getConstraintGenerality(CurType);
-
- // If we have multiple constraints, try to pick the most general one ahead
- // of time. This isn't a wonderful solution, but handles common cases.
- for (unsigned j = 1, e = Codes.size(); j != e; ++j) {
- TargetLowering::ConstraintType ThisType = TLI.getConstraintType(Codes[j]);
- unsigned ThisGenerality = getConstraintGenerality(ThisType);
- if (ThisGenerality > CurGenerality) {
- // This constraint letter is more general than the previous one,
- // use it.
- CurType = ThisType;
- Current = &Codes[j];
- CurGenerality = ThisGenerality;
- }
- }
-
- ConstraintCode = *Current;
- ConstraintType = CurType;
-}
-
/// visitInlineAsm - Handle a call to an InlineAsm object.
///
@@ -3336,8 +3342,7 @@
// Build a list of regs that this operand uses. This always has a single
// element for promoted/expanded operands.
- RegsForValue Regs = GetRegistersForValue(OpInfo.ConstraintCode, OpVT,
- false, false,
+ RegsForValue Regs = GetRegistersForValue(OpInfo, false, false,
OutputRegs, InputRegs);
switch (OpInfo.Type) {
@@ -3407,8 +3412,7 @@
// Copy the output from the appropriate register. Find a register that
// we can use.
RegsForValue Regs =
- GetRegistersForValue(OpInfo.ConstraintCode, OpInfo.ConstraintVT,
- true, UsesInputRegister,
+ GetRegistersForValue(OpInfo, true, UsesInputRegister,
OutputRegs, InputRegs);
if (Regs.Regs.empty()) {
cerr << "Couldn't allocate output reg for contraint '"
@@ -3515,8 +3519,7 @@
// Copy the input into the appropriate registers.
RegsForValue InRegs =
- GetRegistersForValue(OpInfo.ConstraintCode, OpInfo.ConstraintVT,
- false, true, OutputRegs, InputRegs);
+ GetRegistersForValue(OpInfo, false, true, OutputRegs, InputRegs);
// FIXME: should be match fail.
assert(!InRegs.Regs.empty() && "Couldn't allocate input reg!");
@@ -3527,8 +3530,8 @@
}
case InlineAsm::isClobber: {
RegsForValue ClobberedRegs =
- GetRegistersForValue(OpInfo.ConstraintCode, MVT::Other, false, false,
- OutputRegs, InputRegs);
+ GetRegistersForValue(OpInfo, false,
+ false, OutputRegs, InputRegs);
// Add the clobbered value to the operand list, so that the register
// allocator is aware that the physreg got clobbered.
if (!ClobberedRegs.Regs.empty())
From tonic at nondot.org Mon Apr 30 13:05:35 2007
From: tonic at nondot.org (Tanya Lattner)
Date: Mon, 30 Apr 2007 13:05:35 -0500
Subject: [llvm-commits] CVS: nightlytest-serverside/AcceptTestResults.php
Message-ID: <200704301805.l3UI5Z7A022886@zion.cs.uiuc.edu>
Changes in directory nightlytest-serverside:
AcceptTestResults.php updated: 1.2 -> 1.3
---
Log message:
Adding target triple.
---
Diffs of the changes: (+7 -1)
AcceptTestResults.php | 8 +++++++-
1 files changed, 7 insertions(+), 1 deletion(-)
Index: nightlytest-serverside/AcceptTestResults.php
diff -u nightlytest-serverside/AcceptTestResults.php:1.2 nightlytest-serverside/AcceptTestResults.php:1.3
--- nightlytest-serverside/AcceptTestResults.php:1.2 Mon Apr 30 12:28:47 2007
+++ nightlytest-serverside/AcceptTestResults.php Mon Apr 30 13:05:20 2007
@@ -367,7 +367,7 @@
$machine_data = $_POST['machine_data'];
if (!isset($_POST['machine_data'])) {
- shutdown();
+ shutdown($mysql_link);
}
$MACHINE_DATA = split("\n", $machine_data);
@@ -379,6 +379,12 @@
$time = matchOne("/time\:\s*(.+)/", $MACHINE_DATA[5], "");
$nickname = $_POST['nickname'];
+if(!isset($_POST['target_triple'])) {
+ shutdown($mysql_link);
+}
+
+$targetTriple = $_POST['target_triple'];
+
//Get machine id or add new machine
$machineId = getMachineID($targetTriple, $hostname, $nickname);
From evan.cheng at apple.com Mon Apr 30 13:42:29 2007
From: evan.cheng at apple.com (Evan Cheng)
Date: Mon, 30 Apr 2007 13:42:29 -0500
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/README.txt
Message-ID: <200704301842.l3UIgTZI023562@zion.cs.uiuc.edu>
Changes in directory llvm/lib/CodeGen:
README.txt updated: 1.4 -> 1.5
---
Log message:
Updates.
---
Diffs of the changes: (+57 -1)
README.txt | 58 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++-
1 files changed, 57 insertions(+), 1 deletion(-)
Index: llvm/lib/CodeGen/README.txt
diff -u llvm/lib/CodeGen/README.txt:1.4 llvm/lib/CodeGen/README.txt:1.5
--- llvm/lib/CodeGen/README.txt:1.4 Mon Apr 16 13:10:22 2007
+++ llvm/lib/CodeGen/README.txt Mon Apr 30 13:42:09 2007
@@ -85,4 +85,60 @@
//===---------------------------------------------------------------------===//
-Re-Materialize load from frame index.
+Use local info (i.e. register scavenger) to assign it a free register to allow
+reuse:
+ ldr r3, [sp, #+4]
+ add r3, r3, #3
+ ldr r2, [sp, #+8]
+ add r2, r2, #2
+ ldr r1, [sp, #+4] <==
+ add r1, r1, #1
+ ldr r0, [sp, #+4]
+ add r0, r0, #2
+
+//===---------------------------------------------------------------------===//
+
+LLVM aggressively lift CSE out of loop. Sometimes this can be negative side-
+effects:
+
+R1 = X + 4
+R2 = X + 7
+R3 = X + 15
+
+loop:
+load [i + R1]
+...
+load [i + R2]
+...
+load [i + R3]
+
+Suppose there is high register pressure, R1, R2, R3, can be spilled. We need
+to implement proper re-materialization to handle this:
+
+R1 = X + 4
+R2 = X + 7
+R3 = X + 15
+
+loop:
+R1 = X + 4 @ re-materialized
+load [i + R1]
+...
+R2 = X + 7 @ re-materialized
+load [i + R2]
+...
+R3 = X + 15 @ re-materialized
+load [i + R3]
+
+Furthermore, with re-association, we can enable sharing:
+
+R1 = X + 4
+R2 = X + 7
+R3 = X + 15
+
+loop:
+T = i + X
+load [T + 4]
+...
+load [T + 7]
+...
+load [T + 15]
From tonic at nondot.org Mon Apr 30 14:12:57 2007
From: tonic at nondot.org (Tanya Lattner)
Date: Mon, 30 Apr 2007 14:12:57 -0500
Subject: [llvm-commits] CVS: nightlytest-serverside/AcceptTestResults.php
Message-ID: <200704301912.l3UJCv7X024145@zion.cs.uiuc.edu>
Changes in directory nightlytest-serverside:
AcceptTestResults.php updated: 1.3 -> 1.4
---
Log message:
target triple not require for now.
---
Diffs of the changes: (+0 -4)
AcceptTestResults.php | 4 ----
1 files changed, 4 deletions(-)
Index: nightlytest-serverside/AcceptTestResults.php
diff -u nightlytest-serverside/AcceptTestResults.php:1.3 nightlytest-serverside/AcceptTestResults.php:1.4
--- nightlytest-serverside/AcceptTestResults.php:1.3 Mon Apr 30 13:05:20 2007
+++ nightlytest-serverside/AcceptTestResults.php Mon Apr 30 14:12:42 2007
@@ -379,10 +379,6 @@
$time = matchOne("/time\:\s*(.+)/", $MACHINE_DATA[5], "");
$nickname = $_POST['nickname'];
-if(!isset($_POST['target_triple'])) {
- shutdown($mysql_link);
-}
-
$targetTriple = $_POST['target_triple'];
//Get machine id or add new machine
From bwendlin at apple.com Mon Apr 30 14:14:36 2007
From: bwendlin at apple.com (bwendlin at apple.com)
Date: Mon, 30 Apr 2007 12:14:36 -0700 (PDT)
Subject: [llvm-commits] [126737] Fix the race condition where a dylib is
used before it' s actually created.
Message-ID: <20070430191436.392A13EFC5B@src>
Revision: 126737
Author: bwendlin
Date: 2007-04-30 12:14:35 -0700 (Mon, 30 Apr 2007)
Log Message:
-----------
Fix the race condition where a dylib is used before it's actually created.
Naming it a unique name for each stage will fix this.
Modified Paths:
--------------
apple-local/branches/llvm/gcc/Makefile.in
Modified: apple-local/branches/llvm/gcc/Makefile.in
===================================================================
--- apple-local/branches/llvm/gcc/Makefile.in 2007-04-30 19:04:35 UTC (rev 126736)
+++ apple-local/branches/llvm/gcc/Makefile.in 2007-04-30 19:14:35 UTC (rev 126737)
@@ -1124,16 +1124,16 @@
# llvm-linker-hack.cpp
DYLIB_COMPILE_FLAGS := $(filter-out -mdynamic-no-pic, \
$(ALL_CXXFLAGS) $(ALL_CPPFLAGS))
-libllvmgcc.dylib: llvm-linker-hack.cpp $(LLVMLIBFILES)
+libllvmgcc$(LLVM_STAGE).dylib: llvm-linker-hack.cpp $(LLVMLIBFILES)
echo $(LLVMLIBFILES)
$(CXX) $(DYLIB_COMPILE_FLAGS) $(INCLUDES) -o $@ \
$< $(LLVMLIBFILES) -dynamiclib -single_module \
-install_name @executable_path/$@
-LLVMBACKENDFILES := libllvmgcc.dylib
+LLVMBACKENDFILES := libllvmgcc$(LLVM_STAGE).dylib
# Make sure that 'make install' knows about the dylib.
-EXTRA_PROGRAMS += libllvmgcc.dylib
+EXTRA_PROGRAMS += libllvmgcc$(LLVM_STAGE).dylib
# APPLE LOCAL begin LLVM - set DYLD path
SET_DYLIB_PATH=1
@@ -4073,7 +4073,8 @@
$(MAKE) CC="$(CC)" libdir=$(libdir) LANGUAGES="$(BOOT_LANGUAGES)" \
CFLAGS="$(STAGE1_CFLAGS) $(STAGE1_CHECKING)" \
MAKEINFO="$(MAKEINFO)" MAKEINFOFLAGS="$(MAKEINFOFLAGS)" \
- COVERAGE_FLAGS= OBJS-onestep="$(OBJS)"
+ COVERAGE_FLAGS= OBJS-onestep="$(OBJS)" \
+ LLVM_STAGE="-stage1"
$(STAMP) stage1_build
echo stage1_build > stage_last
@@ -4083,13 +4084,11 @@
echo stage2_build > stage_last
stage2_build: stage1_copy
- if test "${SET_DYLIB_PATH}" = "1"; then \
- DYLD_LIBRARY_PATH="`${PWD_COMMAND}`/stage1"; \
- fi; \
$(MAKE) CC="$(STAGE_CC_WRAPPER) stage1/xgcc$(exeext) -Bstage1/ -B$(build_tooldir)/bin/" CC_FOR_BUILD="$(STAGE_CC_WRAPPER) stage1/xgcc$(exeext) -Bstage1/ -B$(build_tooldir)/bin/" \
STAGE_PREFIX=stage1/ \
$(POSTSTAGE1_FLAGS_TO_PASS) \
- $(STAGE2_FLAGS_TO_PASS)
+ $(STAGE2_FLAGS_TO_PASS) \
+ LLVM_STAGE="-stage2"
$(STAMP) stage2_build
echo stage2_build > stage_last
@@ -4099,13 +4098,11 @@
echo stage3_build > stage_last
stageprofile_build: stage1_copy
- if test "${SET_DYLIB_PATH}" = "1"; then \
- DYLD_LIBRARY_PATH="`${PWD_COMMAND}`/stage1"; \
- fi; \
$(MAKE) CC="$(STAGE_CC_WRAPPER) stage1/xgcc$(exeext) -Bstage1/ -B$(build_tooldir)/bin/" CC_FOR_BUILD="$(STAGE_CC_WRAPPER) stage1/xgcc$(exeext) -Bstage1/ -B$(build_tooldir)/bin/" \
STAGE_PREFIX=stage1/ \
$(POSTSTAGE1_FLAGS_TO_PASS) \
- $(STAGEPROFILE_FLAGS_TO_PASS)
+ $(STAGEPROFILE_FLAGS_TO_PASS) \
+ LLVM_STAGE="-stage_profile"
$(STAMP) stageprofile_build
echo stageprofile_build > stage_last
@@ -4115,24 +4112,20 @@
echo stagefeedback_build > stage_last
stage3_build: stage2_copy
- if test "${SET_DYLIB_PATH}" = "1"; then \
- DYLD_LIBRARY_PATH="`${PWD_COMMAND}`/stage2"; \
- fi; \
$(MAKE) CC="$(STAGE_CC_WRAPPER) stage2/xgcc$(exeext) -Bstage2/ -B$(build_tooldir)/bin/" CC_FOR_BUILD="$(STAGE_CC_WRAPPER) stage2/xgcc$(exeext) -Bstage2/ -B$(build_tooldir)/bin/" \
STAGE_PREFIX=stage2/ \
$(POSTSTAGE1_FLAGS_TO_PASS) \
- $(STAGE2_FLAGS_TO_PASS)
+ $(STAGE2_FLAGS_TO_PASS) \
+ LLVM_STAGE=""
$(STAMP) stage3_build
echo stage3_build > stage_last
stagefeedback_build: stageprofile_copy stage1_copy
- if test "${SET_DYLIB_PATH}" = "1"; then \
- DYLD_LIBRARY_PATH="`${PWD_COMMAND}`/stage1"; \
- fi; \
$(MAKE) CC="$(STAGE_CC_WRAPPER) stage1/xgcc$(exeext) -Bstage1/ -B$(build_tooldir)/bin/" CC_FOR_BUILD="$(STAGE_CC_WRAPPER) stage1/xgcc$(exeext) -Bstage1/ -B$(build_tooldir)/bin/" \
STAGE_PREFIX=stage1/ \
$(POSTSTAGE1_FLAGS_TO_PASS) \
- $(STAGEFEEDBACK_FLAGS_TO_PASS)
+ $(STAGEFEEDBACK_FLAGS_TO_PASS) \
+ LLVM_STAGE="-stage_feedback"
$(STAMP) stagefeedback_build
echo stagefeedback_build > stage_last
@@ -4148,9 +4141,6 @@
echo stage4_build > stage_last
stage4_build: stage3_copy
- if test "${SET_DYLIB_PATH}" = "1"; then \
- DYLD_LIBRARY_PATH="`${PWD_COMMAND}`/stage3"; \
- fi; \
$(MAKE) CC="$(STAGE_CC_WRAPPER) stage3/xgcc$(exeext) -Bstage3/ -B$(build_tooldir)/bin/" CC_FOR_BUILD="$(STAGE_CC_WRAPPER) stage3/xgcc$(exeext) -Bstage3/ -B$(build_tooldir)/bin/" \
STAGE_PREFIX=stage3/ \
$(POSTSTAGE1_FLAGS_TO_PASS) \
From asl at math.spbu.ru Mon Apr 30 14:15:14 2007
From: asl at math.spbu.ru (Anton Korobeynikov)
Date: Mon, 30 Apr 2007 14:15:14 -0500
Subject: [llvm-commits] CVS: llvm/include/llvm/GlobalValue.h
Message-ID: <200704301915.l3UJFDFr024195@zion.cs.uiuc.edu>
Changes in directory llvm/include/llvm:
GlobalValue.h updated: 1.41 -> 1.42
---
Log message:
Fix comment
---
Diffs of the changes: (+4 -3)
GlobalValue.h | 7 ++++---
1 files changed, 4 insertions(+), 3 deletions(-)
Index: llvm/include/llvm/GlobalValue.h
diff -u llvm/include/llvm/GlobalValue.h:1.41 llvm/include/llvm/GlobalValue.h:1.42
--- llvm/include/llvm/GlobalValue.h:1.41 Sun Apr 29 13:35:00 2007
+++ llvm/include/llvm/GlobalValue.h Mon Apr 30 14:14:56 2007
@@ -8,9 +8,10 @@
//===----------------------------------------------------------------------===//
//
// This file is a common base class of all globally definable objects. As such,
-// it is subclassed by GlobalVariable and by Function. This is used because you
-// can do certain things with these global objects that you can't do to anything
-// else. For example, use the address of one as a constant.
+// it is subclassed by GlobalVariable, GlobalAlias and by Function. This is
+// used because you can do certain things with these global objects that you
+// can't do to anything else. For example, use the address of one as a
+// constant.
//
//===----------------------------------------------------------------------===//
From evan.cheng at apple.com Mon Apr 30 15:28:58 2007
From: evan.cheng at apple.com (Evan Cheng)
Date: Mon, 30 Apr 2007 13:28:58 -0700
Subject: [llvm-commits] CVS: llvm/lib/Target/ARM/ARMRegisterInfo.cpp
In-Reply-To: <9c10c9f0704300655j5da5e8b9p2c958f6e542040fe@mail.gmail.com>
References: <200704271758.l3RHwOvn001069@zion.cs.uiuc.edu>
<9c10c9f0704300655j5da5e8b9p2c958f6e542040fe@mail.gmail.com>
Message-ID: <190CA316-74E3-4D67-90F7-BBD0871CD5E4@apple.com>
That's fine. Thanks.
Evan
On Apr 30, 2007, at 6:55 AM, Lauro Ramos Venancio wrote:
> Evan,
>
> The problem is the semantics. A possible solution is rename
> UseThumbBacktraces to UseThumbFramePtrReg.
>
> Lauro
>
> 2007/4/27, Evan Cheng < evan.cheng at apple.com>:
> Hi Lauro,
>
> It would be better to fix ARMSubtarget.cpp instead. Just initialize
> UseThumbBacktraces to the value of input parameter thumb to the
> ARMSubtarget ctor.
>
> Evan
>
> On Apr 27, 2007, at 10:58 AM, Lauro Ramos Venancio wrote:
>
> >
> >
> > Changes in directory llvm/lib/Target/ARM:
> >
> > ARMRegisterInfo.cpp updated: 1.88 -> 1.89
> > ---
> > Log message:
> >
> > In Thumb mode, the frame register must be R7.
> >
> >
> > ---
> > Diffs of the changes: (+2 -2)
> >
> > ARMRegisterInfo.cpp | 4 ++--
> > 1 files changed, 2 insertions(+), 2 deletions(-)
> >
> >
> > Index: llvm/lib/Target/ARM/ARMRegisterInfo.cpp
> > diff -u llvm/lib/Target/ARM/ARMRegisterInfo.cpp: 1.88 llvm/lib/
> > Target/ARM/ARMRegisterInfo.cpp:1.89
> > --- llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.88 Wed Apr 25
> > 17:13:27 2007
> > +++ llvm/lib/Target/ARM/ARMRegisterInfo.cpp Fri Apr 27 12:58:03
> 2007
> > @@ -85,7 +85,7 @@
> > const ARMSubtarget &sti)
> > : ARMGenRegisterInfo(ARM::ADJCALLSTACKDOWN, ARM::ADJCALLSTACKUP),
> > TII(tii), STI(sti),
> > - FramePtr( STI.useThumbBacktraces() ? ARM::R7 : ARM::R11) {
> > + FramePtr(STI.useThumbBacktraces() || STI.isThumb() ? ARM::R7 :
> > ARM::R11) {
> > }
> >
> > bool ARMRegisterInfo::spillCalleeSavedRegisters(MachineBasicBlock
> > &MBB,
> > @@ -1472,7 +1472,7 @@
> >
> > unsigned ARMRegisterInfo::getFrameRegister(MachineFunction &MF)
> > const {
> > if (STI.isTargetDarwin() || hasFP(MF))
> > - return STI.useThumbBacktraces () ? ARM::R7 : ARM::R11;
> > + return STI.useThumbBacktraces() || STI.isThumb() ? ARM::R7 :
> > ARM::R11;
> > else
> > return ARM::SP;
> > }
> >
> >
> >
> > _______________________________________________
> > llvm-commits mailing list
> > llvm-commits at cs.uiuc.edu
> > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
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From christopher.lamb at gmail.com Mon Apr 30 15:41:38 2007
From: christopher.lamb at gmail.com (Christopher Lamb)
Date: Mon, 30 Apr 2007 15:41:38 -0500
Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/ELFRelocation.h
Message-ID: <200704302041.l3UKfcR8025811@zion.cs.uiuc.edu>
Changes in directory llvm/include/llvm/CodeGen:
ELFRelocation.h added (r1.1)
---
Log message:
Header file for ELF relocations.
---
Diffs of the changes: (+49 -0)
ELFRelocation.h | 49 +++++++++++++++++++++++++++++++++++++++++++++++++
1 files changed, 49 insertions(+)
Index: llvm/include/llvm/CodeGen/ELFRelocation.h
diff -c /dev/null llvm/include/llvm/CodeGen/ELFRelocation.h:1.1
*** /dev/null Mon Apr 30 15:41:18 2007
--- llvm/include/llvm/CodeGen/ELFRelocation.h Mon Apr 30 15:41:08 2007
***************
*** 0 ****
--- 1,49 ----
+ //=== ELFRelocation.h - ELF Relocation Info ---------------------*- C++ -*-===//
+ //
+ // The LLVM Compiler Infrastructure
+ //
+ // This file was developed by Christopher Lamb and is distributed under the
+ // University of Illinois Open Source License. See LICENSE.TXT for details.
+ //
+ //===----------------------------------------------------------------------===//
+ //
+ // This file defines the ELFRelocation class.
+ //
+ //===----------------------------------------------------------------------===//
+
+ #ifndef LLVM_CODEGEN_ELF_RELOCATION_H
+ #define LLVM_CODEGEN_ELF_RELOCATION_H
+
+ namespace llvm {
+
+ /// ELFRelocation - This class contains all the information necessary to
+ /// to generate any 32-bit or 64-bit ELF relocation entry.
+ class ELFRelocation {
+ uint64_t r_offset; // offset in the section of the object this applies to
+ uint32_t r_symidx; // symbol table index of the symbol to use
+ uint32_t r_type; // machine specific relocation type
+ int64_t r_add; // explicit relocation addend
+ bool r_rela; // if true then the addend is part of the entry
+ // otherwise the addend is at the location specified
+ // by r_offset
+ public:
+
+ uint64_t getInfo(bool is64Bit = false) const {
+ if (is64Bit)
+ return ((uint64_t)r_symidx << 32) + ((uint64_t)r_type & 0xFFFFFFFFL);
+ else
+ return (r_symidx << 8) + (r_type & 0xFFL);
+ }
+
+ uint64_t getOffset() const { return r_offset; }
+ uint64_t getAddress() const { return r_add; }
+
+ ELFRelocation(uint64_t off, uint32_t sym, uint32_t type,
+ bool rela = true, int64_t addend = 0) :
+ r_offset(off), r_symidx(sym), r_type(type),
+ r_add(addend), r_rela(rela) {}
+ };
+
+ } // end llvm namespace
+
+ #endif // LLVM_CODEGEN_ELF_RELOCATION_H
\ No newline at end of file
From sabre at nondot.org Mon Apr 30 16:10:32 2007
From: sabre at nondot.org (Chris Lattner)
Date: Mon, 30 Apr 2007 16:10:32 -0500
Subject: [llvm-commits] CVS:
llvm/test/CodeGen/PowerPC/2007-04-30-InlineAsmEarlyClobber.ll
Message-ID: <200704302110.l3ULAWHq026349@zion.cs.uiuc.edu>
Changes in directory llvm/test/CodeGen/PowerPC:
2007-04-30-InlineAsmEarlyClobber.ll added (r1.1)
---
Log message:
testcase for PR1357: http://llvm.org/PR1357
---
Diffs of the changes: (+27 -0)
2007-04-30-InlineAsmEarlyClobber.ll | 27 +++++++++++++++++++++++++++
1 files changed, 27 insertions(+)
Index: llvm/test/CodeGen/PowerPC/2007-04-30-InlineAsmEarlyClobber.ll
diff -c /dev/null llvm/test/CodeGen/PowerPC/2007-04-30-InlineAsmEarlyClobber.ll:1.1
*** /dev/null Mon Apr 30 16:10:23 2007
--- llvm/test/CodeGen/PowerPC/2007-04-30-InlineAsmEarlyClobber.ll Mon Apr 30 16:10:13 2007
***************
*** 0 ****
--- 1,27 ----
+ ; RUN: llvm-as < %s | llc | grep {subfc r2,r5,r4}
+ ; RUN: llvm-as < %s | llc | grep {subfze r4,r3}
+
+ ; PR1357
+
+ target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
+ target triple = "powerpc-apple-darwin8.8.0"
+
+ ;long long test(int A, int B, int C) {
+ ; unsigned X, Y;
+ ; __asm__ ("subf%I3c %1,%4,%3\n\tsubfze %0,%2"
+ ; : "=r" (X), "=&r" (Y)
+ ; : "r" (A), "rI" (B), "r" (C));
+ ; return ((long long)Y << 32) | X;
+ ;}
+
+ define i64 @test(i32 %A, i32 %B, i32 %C) {
+ entry:
+ %Y = alloca i32, align 4 ; [#uses=2]
+ %tmp4 = call i32 asm "subf${3:I}c $1,$4,$3\0A\09subfze $0,$2", "=r,=*&r,r,rI,r"( i32* %Y, i32 %A, i32 %B, i32 %C ) ; [#uses=1]
+ %tmp5 = load i32* %Y ; [#uses=1]
+ %tmp56 = zext i32 %tmp5 to i64 ; [#uses=1]
+ %tmp7 = shl i64 %tmp56, 32 ; [#uses=1]
+ %tmp89 = zext i32 %tmp4 to i64 ; [#uses=1]
+ %tmp10 = or i64 %tmp7, %tmp89 ; [#uses=1]
+ ret i64 %tmp10
+ }
From sabre at nondot.org Mon Apr 30 16:11:35 2007
From: sabre at nondot.org (Chris Lattner)
Date: Mon, 30 Apr 2007 16:11:35 -0500
Subject: [llvm-commits] CVS:
llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
Message-ID: <200704302111.l3ULBZnG026373@zion.cs.uiuc.edu>
Changes in directory llvm/lib/CodeGen/SelectionDAG:
SelectionDAGISel.cpp updated: 1.441 -> 1.442
---
Log message:
Continue refactoring inline asm code. If there is an earlyclobber output
register, preallocate all input registers and the early clobbered output.
This fixes PR1357: http://llvm.org/PR1357 and CodeGen/PowerPC/2007-04-30-InlineAsmEarlyClobber.ll
---
Diffs of the changes: (+108 -79)
SelectionDAGISel.cpp | 187 +++++++++++++++++++++++++++++----------------------
1 files changed, 108 insertions(+), 79 deletions(-)
Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.441 llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.442
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.441 Mon Apr 30 12:29:31 2007
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Mon Apr 30 16:11:17 2007
@@ -518,10 +518,9 @@
N = NewN;
}
- RegsForValue GetRegistersForValue(AsmOperandInfo &OpInfo,
- bool OutReg, bool InReg,
- std::set &OutputRegs,
- std::set &InputRegs);
+ void GetRegistersForValue(AsmOperandInfo &OpInfo, bool HasEarlyClobber,
+ std::set &OutputRegs,
+ std::set &InputRegs);
void FindMergedConditions(Value *Cond, MachineBasicBlock *TBB,
MachineBasicBlock *FBB, MachineBasicBlock *CurBB,
@@ -3035,6 +3034,10 @@
/// ConstraintVT - The ValueType for the operand value.
MVT::ValueType ConstraintVT;
+ /// AssignedRegs - If this is a register or register class operand, this
+ /// contains the set of register corresponding to the operand.
+ RegsForValue AssignedRegs;
+
AsmOperandInfo(const InlineAsm::ConstraintInfo &info)
: InlineAsm::ConstraintInfo(info),
ConstraintType(TargetLowering::C_Unknown),
@@ -3042,6 +3045,17 @@
}
void ComputeConstraintToUse(const TargetLowering &TLI);
+
+ /// MarkAllocatedRegs - Once AssignedRegs is set, mark the assigned registers
+ /// busy in OutputRegs/InputRegs.
+ void MarkAllocatedRegs(bool isOutReg, bool isInReg,
+ std::set &OutputRegs,
+ std::set &InputRegs) const {
+ if (isOutReg)
+ OutputRegs.insert(AssignedRegs.Regs.begin(), AssignedRegs.Regs.end());
+ if (isInReg)
+ InputRegs.insert(AssignedRegs.Regs.begin(), AssignedRegs.Regs.end());
+ }
};
} // end anon namespace.
@@ -3093,13 +3107,42 @@
}
-RegsForValue SelectionDAGLowering::
-GetRegistersForValue(AsmOperandInfo &OpInfo, bool isOutReg, bool isInReg,
+void SelectionDAGLowering::
+GetRegistersForValue(AsmOperandInfo &OpInfo, bool HasEarlyClobber,
std::set &OutputRegs,
std::set &InputRegs) {
- std::pair PhysReg =
- TLI.getRegForInlineAsmConstraint(OpInfo.ConstraintCode,OpInfo.ConstraintVT);
+ // Compute whether this value requires an input register, an output register,
+ // or both.
+ bool isOutReg = false;
+ bool isInReg = false;
+ switch (OpInfo.Type) {
+ case InlineAsm::isOutput:
+ isOutReg = true;
+
+ // If this is an early-clobber output, or if there is an input
+ // constraint that matches this, we need to reserve the input register
+ // so no other inputs allocate to it.
+ isInReg = OpInfo.isEarlyClobber || OpInfo.hasMatchingInput;
+ break;
+ case InlineAsm::isInput:
+ isInReg = true;
+ isOutReg = false;
+ break;
+ case InlineAsm::isClobber:
+ isOutReg = true;
+ isInReg = true;
+ break;
+ }
+
+
+ MachineFunction &MF = DAG.getMachineFunction();
std::vector Regs;
+
+ // If this is a constraint for a single physreg, or a constraint for a
+ // register class, find it.
+ std::pair PhysReg =
+ TLI.getRegForInlineAsmConstraint(OpInfo.ConstraintCode,
+ OpInfo.ConstraintVT);
unsigned NumRegs = 1;
if (OpInfo.ConstraintVT != MVT::Other)
@@ -3107,7 +3150,6 @@
MVT::ValueType RegVT;
MVT::ValueType ValueVT = OpInfo.ConstraintVT;
- MachineFunction &MF = DAG.getMachineFunction();
// If this is a constraint for a specific physical register, like {r17},
// assign it now.
@@ -3137,7 +3179,9 @@
Regs.push_back(*I);
}
}
- return RegsForValue(Regs, RegVT, ValueVT);
+ OpInfo.AssignedRegs = RegsForValue(Regs, RegVT, ValueVT);
+ OpInfo.MarkAllocatedRegs(isOutReg, isInReg, OutputRegs, InputRegs);
+ return;
}
// Otherwise, if this was a reference to an LLVM register class, create vregs
@@ -3147,7 +3191,11 @@
// If this is an early clobber or tied register, our regalloc doesn't know
// how to maintain the constraint. If it isn't, go ahead and create vreg
// and let the regalloc do the right thing.
- if (!isOutReg || !isInReg) {
+ if (!OpInfo.hasMatchingInput && !OpInfo.isEarlyClobber &&
+ // If there is some other early clobber and this is an input register,
+ // then we are forced to pre-allocate the input reg so it doesn't
+ // conflict with the earlyclobber.
+ !(OpInfo.Type == InlineAsm::isInput && HasEarlyClobber)) {
RegVT = *PhysReg.second->vt_begin();
if (OpInfo.ConstraintVT == MVT::Other)
@@ -3158,7 +3206,9 @@
for (; NumRegs; --NumRegs)
Regs.push_back(RegMap->createVirtualRegister(PhysReg.second));
- return RegsForValue(Regs, RegVT, ValueVT);
+ OpInfo.AssignedRegs = RegsForValue(Regs, RegVT, ValueVT);
+ OpInfo.MarkAllocatedRegs(isOutReg, isInReg, OutputRegs, InputRegs);
+ return;
}
// Otherwise, we can't allocate it. Let the code below figure out how to
@@ -3172,7 +3222,7 @@
RegClassRegs = TLI.getRegClassForInlineAsmConstraint(OpInfo.ConstraintCode,
OpInfo.ConstraintVT);
}
-
+
const MRegisterInfo *MRI = DAG.getTarget().getRegisterInfo();
unsigned NumAllocated = 0;
for (unsigned i = 0, e = RegClassRegs.size(); i != e; ++i) {
@@ -3202,19 +3252,18 @@
unsigned RegStart = (i-NumAllocated)+1;
unsigned RegEnd = i+1;
// Mark all of the allocated registers used.
- for (unsigned i = RegStart; i != RegEnd; ++i) {
- unsigned Reg = RegClassRegs[i];
- Regs.push_back(Reg);
- if (isOutReg) OutputRegs.insert(Reg); // Mark reg used.
- if (isInReg) InputRegs.insert(Reg); // Mark reg used.
- }
+ for (unsigned i = RegStart; i != RegEnd; ++i)
+ Regs.push_back(RegClassRegs[i]);
- return RegsForValue(Regs, *RC->vt_begin(), OpInfo.ConstraintVT);
+ OpInfo.AssignedRegs = RegsForValue(Regs, *RC->vt_begin(),
+ OpInfo.ConstraintVT);
+ OpInfo.MarkAllocatedRegs(isOutReg, isInReg, OutputRegs, InputRegs);
+ return;
}
}
// Otherwise, we couldn't allocate enough registers for this.
- return RegsForValue();
+ return;
}
@@ -3235,7 +3284,13 @@
// ConstraintOperands list.
std::vector
ConstraintInfos = IA->ParseConstraints();
- unsigned OpNo = 1;
+
+ // SawEarlyClobber - Keep track of whether we saw an earlyclobber output
+ // constraint. If so, we can't let the register allocator allocate any input
+ // registers, because it will not know to avoid the earlyclobbered output reg.
+ bool SawEarlyClobber = false;
+
+ unsigned OpNo = 1; // OpNo - The operand of the CallInst.
for (unsigned i = 0, e = ConstraintInfos.size(); i != e; ++i) {
ConstraintOperands.push_back(AsmOperandInfo(ConstraintInfos[i]));
AsmOperandInfo &OpInfo = ConstraintOperands.back();
@@ -3295,6 +3350,8 @@
// Compute the constraint code and ConstraintType to use.
OpInfo.ComputeConstraintToUse(TLI);
+ // Keep track of whether we see an earlyclobber.
+ SawEarlyClobber |= OpInfo.isEarlyClobber;
// If this is a memory input, and if the operand is not indirect, do what we
// need to to provide an address for the memory input.
@@ -3333,42 +3390,25 @@
OpInfo.isIndirect = true;
}
-
- if (TLI.getRegForInlineAsmConstraint(OpInfo.ConstraintCode, OpVT).first ==0)
- continue; // Not assigned a fixed reg.
-
- // For GCC register classes where we don't have a direct match, we fully
- // assign registers at isel time. This is not optimal, but works.
-
- // Build a list of regs that this operand uses. This always has a single
- // element for promoted/expanded operands.
- RegsForValue Regs = GetRegistersForValue(OpInfo, false, false,
- OutputRegs, InputRegs);
-
- switch (OpInfo.Type) {
- case InlineAsm::isOutput:
- // We can't assign any other output to this register.
- OutputRegs.insert(Regs.Regs.begin(), Regs.Regs.end());
- // If this is an early-clobber output, it cannot be assigned to the same
- // value as the input reg.
- if (OpInfo.isEarlyClobber || OpInfo.hasMatchingInput)
- InputRegs.insert(Regs.Regs.begin(), Regs.Regs.end());
- break;
- case InlineAsm::isInput:
- // We can't assign any other input to this register.
- InputRegs.insert(Regs.Regs.begin(), Regs.Regs.end());
- break;
- case InlineAsm::isClobber:
- // Clobbered regs cannot be used as inputs or outputs.
- InputRegs.insert(Regs.Regs.begin(), Regs.Regs.end());
- OutputRegs.insert(Regs.Regs.begin(), Regs.Regs.end());
- break;
- }
+ // If this constraint is for a specific register, allocate it before
+ // anything else.
+ if (OpInfo.ConstraintType == TargetLowering::C_Register)
+ GetRegistersForValue(OpInfo, SawEarlyClobber, OutputRegs, InputRegs);
}
-
ConstraintInfos.clear();
+ // Second pass - Loop over all of the operands, assigning virtual or physregs
+ // to registerclass operands.
+ for (unsigned i = 0, e = ConstraintOperands.size(); i != e; ++i) {
+ AsmOperandInfo &OpInfo = ConstraintOperands[i];
+
+ // C_Register operands have already been allocated, Other/Memory don't need
+ // to be.
+ if (OpInfo.ConstraintType == TargetLowering::C_RegisterClass)
+ GetRegistersForValue(OpInfo, SawEarlyClobber, OutputRegs, InputRegs);
+ }
+
// AsmNodeOperands - The operands for the ISD::INLINEASM node.
std::vector AsmNodeOperands;
AsmNodeOperands.push_back(SDOperand()); // reserve space for input chain
@@ -3402,19 +3442,9 @@
// Otherwise, this is a register or register class output.
- // If this is an early-clobber output, or if there is an input
- // constraint that matches this, we need to reserve the input register
- // so no other inputs allocate to it.
- bool UsesInputRegister = false;
- if (OpInfo.isEarlyClobber || OpInfo.hasMatchingInput)
- UsesInputRegister = true;
-
// Copy the output from the appropriate register. Find a register that
// we can use.
- RegsForValue Regs =
- GetRegistersForValue(OpInfo, true, UsesInputRegister,
- OutputRegs, InputRegs);
- if (Regs.Regs.empty()) {
+ if (OpInfo.AssignedRegs.Regs.empty()) {
cerr << "Couldn't allocate output reg for contraint '"
<< OpInfo.ConstraintCode << "'!\n";
exit(1);
@@ -3425,15 +3455,16 @@
assert(RetValRegs.Regs.empty() &&
"Cannot have multiple output constraints yet!");
assert(I.getType() != Type::VoidTy && "Bad inline asm!");
- RetValRegs = Regs;
+ RetValRegs = OpInfo.AssignedRegs;
} else {
- IndirectStoresToEmit.push_back(std::make_pair(Regs,
+ IndirectStoresToEmit.push_back(std::make_pair(OpInfo.AssignedRegs,
OpInfo.CallOperandVal));
}
// Add information to the INLINEASM node to know that this register is
// set.
- Regs.AddInlineAsmOperands(2 /*REGDEF*/, DAG, AsmNodeOperands);
+ OpInfo.AssignedRegs.AddInlineAsmOperands(2 /*REGDEF*/, DAG,
+ AsmNodeOperands);
break;
}
case InlineAsm::isInput: {
@@ -3518,24 +3549,22 @@
"Don't know how to handle indirect register inputs yet!");
// Copy the input into the appropriate registers.
- RegsForValue InRegs =
- GetRegistersForValue(OpInfo, false, true, OutputRegs, InputRegs);
- // FIXME: should be match fail.
- assert(!InRegs.Regs.empty() && "Couldn't allocate input reg!");
+ assert(!OpInfo.AssignedRegs.Regs.empty() &&
+ "Couldn't allocate input reg!");
- InRegs.getCopyToRegs(InOperandVal, DAG, Chain, Flag, TLI.getPointerTy());
+ OpInfo.AssignedRegs.getCopyToRegs(InOperandVal, DAG, Chain, Flag,
+ TLI.getPointerTy());
- InRegs.AddInlineAsmOperands(1/*REGUSE*/, DAG, AsmNodeOperands);
+ OpInfo.AssignedRegs.AddInlineAsmOperands(1/*REGUSE*/, DAG,
+ AsmNodeOperands);
break;
}
case InlineAsm::isClobber: {
- RegsForValue ClobberedRegs =
- GetRegistersForValue(OpInfo, false,
- false, OutputRegs, InputRegs);
// Add the clobbered value to the operand list, so that the register
// allocator is aware that the physreg got clobbered.
- if (!ClobberedRegs.Regs.empty())
- ClobberedRegs.AddInlineAsmOperands(2/*REGDEF*/, DAG, AsmNodeOperands);
+ if (!OpInfo.AssignedRegs.Regs.empty())
+ OpInfo.AssignedRegs.AddInlineAsmOperands(2/*REGDEF*/, DAG,
+ AsmNodeOperands);
break;
}
}
From bwendlin at apple.com Mon Apr 30 16:36:54 2007
From: bwendlin at apple.com (bwendlin at apple.com)
Date: Mon, 30 Apr 2007 14:36:54 -0700 (PDT)
Subject: [llvm-commits] [126738] This function isn't used when ENABLE_LLVM
is defined.
Message-ID: <20070430213654.1FC7A484C94@src>
Revision: 126738
Author: bwendlin
Date: 2007-04-30 14:36:53 -0700 (Mon, 30 Apr 2007)
Log Message:
-----------
This function isn't used when ENABLE_LLVM is defined.
Modified Paths:
--------------
apple-local/branches/llvm/gcc/varasm.c
Modified: apple-local/branches/llvm/gcc/varasm.c
===================================================================
--- apple-local/branches/llvm/gcc/varasm.c 2007-04-30 19:14:35 UTC (rev 126737)
+++ apple-local/branches/llvm/gcc/varasm.c 2007-04-30 21:36:53 UTC (rev 126738)
@@ -4634,6 +4634,8 @@
/* Given an assembly name, find the decl it is associated with. At the
same time, mark it needed for cgraph. */
+/* APPLE LOCAL LLVM */
+#ifndef ENABLE_LLVM
static tree
find_decl_and_mark_needed (tree decl, tree target)
{
@@ -4671,6 +4673,8 @@
else
return NULL_TREE;
}
+/* APPLE LOCAL LLVM */
+#endif
static void
do_assemble_alias (tree decl, tree target)
From bwendlin at apple.com Mon Apr 30 17:03:23 2007
From: bwendlin at apple.com (bwendlin at apple.com)
Date: Mon, 30 Apr 2007 15:03:23 -0700 (PDT)
Subject: [llvm-commits] [126739] Merged revisions 122105, 122108, 122111,
122302, 122305, 122339, 122341, 122345-122346, 122350, 122406, 122408-122410,
122488-122489,
Message-ID: <20070430220323.8E4FE4A314F@src>
Revision: 126739
Author: bwendlin
Date: 2007-04-30 15:03:04 -0700 (Mon, 30 Apr 2007)
Log Message:
-----------
Merged revisions 122105,122108,122111,122302,122305,122339,122341,122345-122346,122350,122406,122408-122410,122488-122489,
122493-122494,122654-122655,122659-122660,122673,122675,122792-122793,122797,122799,122828-122829,122858,122867-122869,
122888,122891,122893,122895-122897,122900,122903,123082,123127,123132,123134,123270,123293,123297,123338,123439,123488,
123490,123499,123501,123504,123556-123557,123560,123594,123612-123616,123618,123744,123746,123749,123792,123795,123801,
123803,123872-123873,123925-123926,123928,123930,123983,123985,123992,124029,124088,124121-124122,124124,124165,124272,124326,
124366,124368,124370,124409,124489,124496,124575,124652-124653,124655,124697-124698,124793-124794,124886,124922,124932,
124971,124974,124996-124997,125029,125031-125033,125078,125230,125233,125366,125369,125412,125415,125419,125422,125467,
125469,125526,125746-125747,125877,125916-125921,125924-125925,125949,125964,125966,126021,126083,126118,126247,
126283-126284,126286,126313,126315,126320,126347,126429,126433,126483-126484,126487,126547,126549,126624
via svnmerge from svn+ssh://src.apple.com/svn/fsf-gcc/apple-local/branches/positron
Modified Paths:
--------------
apple-local/branches/llvm/ChangeLog.apple
apple-local/branches/llvm/build_gcc
apple-local/branches/llvm/fixincludes/ChangeLog
apple-local/branches/llvm/fixincludes/mkheaders.in
apple-local/branches/llvm/gcc/ChangeLog
apple-local/branches/llvm/gcc/ChangeLog.apple
apple-local/branches/llvm/gcc/Makefile.in
apple-local/branches/llvm/gcc/ada/ChangeLog
apple-local/branches/llvm/gcc/ada/Makefile.in
apple-local/branches/llvm/gcc/ada/adaint.c
apple-local/branches/llvm/gcc/builtin-attrs.def
apple-local/branches/llvm/gcc/builtin-types.def
apple-local/branches/llvm/gcc/builtins.c
apple-local/branches/llvm/gcc/builtins.def
apple-local/branches/llvm/gcc/c-common.c
apple-local/branches/llvm/gcc/c-common.h
apple-local/branches/llvm/gcc/c-cppbuiltin.c
apple-local/branches/llvm/gcc/c-format.c
apple-local/branches/llvm/gcc/c-incpath.c
apple-local/branches/llvm/gcc/c-opts.c
apple-local/branches/llvm/gcc/c-parse.in
apple-local/branches/llvm/gcc/c.opt
apple-local/branches/llvm/gcc/calls.c
apple-local/branches/llvm/gcc/cfgexpand.c
apple-local/branches/llvm/gcc/collect2.c
apple-local/branches/llvm/gcc/combine.c
apple-local/branches/llvm/gcc/common.opt
apple-local/branches/llvm/gcc/config/alpha/osf.h
apple-local/branches/llvm/gcc/config/darwin-c.c
apple-local/branches/llvm/gcc/config/darwin-driver.c
apple-local/branches/llvm/gcc/config/darwin-protos.h
apple-local/branches/llvm/gcc/config/darwin.c
apple-local/branches/llvm/gcc/config/darwin.h
apple-local/branches/llvm/gcc/config/fr30/fr30.h
apple-local/branches/llvm/gcc/config/i386/beos-elf.h
apple-local/branches/llvm/gcc/config/i386/cygwin.h
apple-local/branches/llvm/gcc/config/i386/darwin.h
apple-local/branches/llvm/gcc/config/i386/i386-protos.h
apple-local/branches/llvm/gcc/config/i386/i386.c
apple-local/branches/llvm/gcc/config/i386/i386.h
apple-local/branches/llvm/gcc/config/i386/i386.md
apple-local/branches/llvm/gcc/config/i386/nto.h
apple-local/branches/llvm/gcc/config/i386/sol2.h
apple-local/branches/llvm/gcc/config/i386/sse.md
apple-local/branches/llvm/gcc/config/pa/pa-hpux10.h
apple-local/branches/llvm/gcc/config/pa/pa-hpux11.h
apple-local/branches/llvm/gcc/config/pa/pa64-hpux.h
apple-local/branches/llvm/gcc/config/rs6000/aix.h
apple-local/branches/llvm/gcc/config/rs6000/darwin.h
apple-local/branches/llvm/gcc/config/rs6000/linux64.h
apple-local/branches/llvm/gcc/config/rs6000/lynx.h
apple-local/branches/llvm/gcc/config/rs6000/rs6000.c
apple-local/branches/llvm/gcc/config/rs6000/rs6000.h
apple-local/branches/llvm/gcc/config/rs6000/rs6000.md
apple-local/branches/llvm/gcc/config/rs6000/sysv4.h
apple-local/branches/llvm/gcc/config/svr4.h
apple-local/branches/llvm/gcc/config/t-darwin
apple-local/branches/llvm/gcc/config.gcc
apple-local/branches/llvm/gcc/configure
apple-local/branches/llvm/gcc/configure.ac
apple-local/branches/llvm/gcc/cp/ChangeLog.apple
apple-local/branches/llvm/gcc/cp/Make-lang.in
apple-local/branches/llvm/gcc/cp/cp-tree.h
apple-local/branches/llvm/gcc/cp/except.c
apple-local/branches/llvm/gcc/cp/g++spec.c
apple-local/branches/llvm/gcc/cp/lex.c
apple-local/branches/llvm/gcc/cp/parser.c
apple-local/branches/llvm/gcc/cp/rtti.c
apple-local/branches/llvm/gcc/cppdefault.c
apple-local/branches/llvm/gcc/defaults.h
apple-local/branches/llvm/gcc/df.c
apple-local/branches/llvm/gcc/doc/cpp.texi
apple-local/branches/llvm/gcc/doc/extend.texi
apple-local/branches/llvm/gcc/doc/invoke.texi
apple-local/branches/llvm/gcc/doc/md.texi
apple-local/branches/llvm/gcc/doc/tm.texi
apple-local/branches/llvm/gcc/dwarf2.h
apple-local/branches/llvm/gcc/dwarf2out.c
apple-local/branches/llvm/gcc/function.c
apple-local/branches/llvm/gcc/function.h
apple-local/branches/llvm/gcc/gcc.c
apple-local/branches/llvm/gcc/gimplify.c
apple-local/branches/llvm/gcc/gsyslimits.h
apple-local/branches/llvm/gcc/libgcc2.c
apple-local/branches/llvm/gcc/limitx.h
apple-local/branches/llvm/gcc/limity.h
apple-local/branches/llvm/gcc/mips-tdump.c
apple-local/branches/llvm/gcc/mips-tfile.c
apple-local/branches/llvm/gcc/objc/ChangeLog.apple
apple-local/branches/llvm/gcc/objc/objc-act.c
apple-local/branches/llvm/gcc/objc/objc-act.h
apple-local/branches/llvm/gcc/params.def
apple-local/branches/llvm/gcc/real.c
apple-local/branches/llvm/gcc/reload1.c
apple-local/branches/llvm/gcc/stub-objc.c
apple-local/branches/llvm/gcc/target-def.h
apple-local/branches/llvm/gcc/target.h
apple-local/branches/llvm/gcc/targhooks.c
apple-local/branches/llvm/gcc/targhooks.h
apple-local/branches/llvm/gcc/testsuite/ChangeLog
apple-local/branches/llvm/gcc/testsuite/ChangeLog.apple
apple-local/branches/llvm/gcc/testsuite/bugs/powerpc/g++.xfail
apple-local/branches/llvm/gcc/testsuite/bugs/powerpc/gcc.xfail
apple-local/branches/llvm/gcc/testsuite/bugs/powerpc/obj-c++.xfail
apple-local/branches/llvm/gcc/testsuite/bugs/powerpc/objc.xfail
apple-local/branches/llvm/gcc/testsuite/g++.apple/asm-block-59.C
apple-local/branches/llvm/gcc/testsuite/gcc.apple/4861528.c
apple-local/branches/llvm/gcc/testsuite/gcc.apple/asm-block-59.c
apple-local/branches/llvm/gcc/testsuite/gcc.apple/i386-bitmask1.c
apple-local/branches/llvm/gcc/testsuite/gcc.dg/darwin64-abi.c
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/basic.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/bitfield-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/bitfield-2.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/bitfield-3.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/bitfield-4.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/class-attribute-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/comp-types-11.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/comp-types-12.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/comp-types-13.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/comp-types-9.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/const-cfstring-4.mm
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apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/const-cfstring-6.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/const-str-13.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/const-str-3.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/const-str-4.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/const-str-7.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/const-str-8.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/const-str-9.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/cxx-ivars-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/cxx-ivars-2.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/cxx-ivars-3.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/cxx-scope-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/cxx-scope-2.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/defs-warn-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/defs.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/dwarf-1.mm
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apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/isa-field-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/ivar-list-semi.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/layout-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/local-decl-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/lookup-2.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/lvalue-cast-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/message-metadata-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/method-10.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/method-11.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/method-13.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/method-15.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/method-17.mm
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apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/method-attribute-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/newproperty-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/newproperty-2.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/newproperty-3.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/newproperty-4.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/newproperty-copy-2.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/newproperty-copy-3.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/newproperty-deprecated-attr-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/newproperty-dot-syntax-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/newproperty-dotsyntax-setter-getter-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/newproperty-dotsyntax-setter-getter-2.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/newproperty-impl-nowarn-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/newproperty-lookup-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/newproperty-lookup-2.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/newproperty-lookup-3.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/newproperty-lookup-4.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/newproperty-lookup-5.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/newproperty-lookup-6.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/newproperty-neg-ivar-check-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/newproperty-neg-warn-ro-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/newproperty-neg-warn-unimp-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/newproperty-nowarn-compound-exp.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/newproperty-redundant-decl-accessor.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/newproperty-retain-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/newproperty-retain-2.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/newproperty-setter-getter-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/newproperty-syntax-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/newproperty-type-conv-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/newproperty-unimplementd-property-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/newproperty-weak-attribute-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/newproperty-weak-attribute-2.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/newproperty-weak-attribute-3.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/no-extra-load.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/no-typedef-ivar.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/objc-foreach-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/objc-foreach-10.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/objc-foreach-11.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/objc-foreach-2.mm
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apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/objc-foreach-5.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/objc-foreach-6.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/objc-foreach-7.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/objc-foreach-8.mm
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apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/objc-foreach-nil-collection-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/objc-gc-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/objc-gc-3.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/objc-gc-4.mm
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apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/objc-gc-6.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/objc-gc-8.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/objc-gc-9.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/objc-gc-section-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/objc-gc-section-2.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/objc-static-cast-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/objc-static-cast-2.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/objc-stret-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/objc2-4698856.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/objc2-defs-ok.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/objc2-ivar-test-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/objc2-protocol-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/objc2-protocol-2.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/objc2-protocol-3.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/objc2-protocol-4.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/objc2-protocol-5.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/objc2-protocol-7.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/objc2-protocol-9.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/objc2-super-class-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/objc2-visibility-hidden-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/objc2-visibility-hidden-2.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/property-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/property-10.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/property-11.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/property-12.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/property-13.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/property-14.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/property-15.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/property-16.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/property-17.mm
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apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/property-19.mm
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apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/property-20.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/property-3.mm
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apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/property-7.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/property-8.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/property-9.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/property-bycopy-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/property-bycopy-2.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/property-bycopy-3.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/property-byref-default-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/property-dwarf-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/property-incr-decr-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/property-metadata-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/property-metadata-2.mm
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apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/property-metadata-4.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/property-metadata-5.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/property-neg-1.mm
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apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/property-neg-3.mm
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apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/proto-lossage-2.mm
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apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/qual-types-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/selector-2.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/selector-3.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/stabs-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/stabs-2.mm
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apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/stubify-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/super-class-2.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/syntax-error-1.mm
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apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/try-catch-8.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/try-catch-9.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/typedef-alias-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/unknown-receiver.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/va-meth-1.mm
apple-local/branches/llvm/gcc/testsuite/objc/execute/Object2.h
apple-local/branches/llvm/gcc/testsuite/objc.dg/bitfield-2.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/category-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/class-attribute-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/const-cfstring-4-64bit.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/const-cfstring-4.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/const-cfstring-6.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/const-str-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/const-str-13.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/const-str-3.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/const-str-4.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/const-str-7.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/const-str-8.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/encode-2.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/encode-3.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/encode-4.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/encode-5.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/encode-7a.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/func-ptr-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/gnu-runtime-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/gnu-runtime-2.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/image-info.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/layout-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/message-metadata-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/method-4.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/method-attribute-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/newproperty-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/newproperty-2.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/newproperty-3.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/newproperty-4.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/newproperty-copy-2.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/newproperty-copy-3.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/newproperty-deprecated-attr-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/newproperty-dot-syntax-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/newproperty-dotsyntax-setter-getter-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/newproperty-dotsyntax-setter-getter-2.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/newproperty-dotsyntax-warn-setter-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/newproperty-impl-nowarn-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/newproperty-lookup-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/newproperty-lookup-2.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/newproperty-lookup-3.m
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apple-local/branches/llvm/gcc/testsuite/objc.dg/newproperty-lookup-5.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/newproperty-lookup-6.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/newproperty-neg-ivar-check-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/newproperty-neg-warn-ro-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/newproperty-neg-warn-unimp-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/newproperty-nowarn-compound-exp.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/newproperty-nowarn-readonly-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/newproperty-redundant-decl-accessor.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/newproperty-retain-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/newproperty-retain-2.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/newproperty-setter-getter-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/newproperty-syntax-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/newproperty-type-conv-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/newproperty-unimplementd-property-1.m
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apple-local/branches/llvm/gcc/testsuite/objc.dg/newproperty-weak-attribute-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/newproperty-weak-attribute-2.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/newproperty-weak-attribute-3.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/next-runtime-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/objc-dir-dispatch.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/objc-foreach-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/objc-foreach-10.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/objc-foreach-11.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/objc-foreach-2.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/objc-foreach-3.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/objc-foreach-4.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/objc-foreach-5.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/objc-foreach-6.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/objc-foreach-7.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/objc-foreach-8.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/objc-foreach-9.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/objc-foreach-nil-collection-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/objc-fpret-2.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/objc-fpret-64bit-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/objc-gc-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/objc-gc-2.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/objc-gc-3.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/objc-gc-5.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/objc-gc-7.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/objc-gc-section-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/objc-gc-section-2.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/objc2-4698856.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/objc2-alignment-test-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/objc2-const-str-64bit-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/objc2-defs-ok.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/objc2-ivar-test-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/objc2-protocol-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/objc2-protocol-2.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/objc2-protocol-3.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/objc2-protocol-4.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/objc2-protocol-5.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/objc2-protocol-7.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/objc2-protocol-9.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/objc2-protocol-enc-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/objc2-super-class-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/objc2-visibility-hidden-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/objc2-visibility-hidden-2.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/objc2-warn-prev-osx-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/objc2.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/property-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/property-10.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/property-11.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/property-12.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/property-13.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/property-14.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/property-15.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/property-16.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/property-17.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/property-18.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/property-2.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/property-3.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/property-4.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/property-5.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/property-6.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/property-7.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/property-8.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/property-9.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/property-bycopy-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/property-bycopy-2.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/property-bycopy-3.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/property-bycopy-4.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/property-byref-default-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/property-dwarf-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/property-incr-decr-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/property-metadata-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/property-metadata-2.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/property-metadata-3.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/property-metadata-4.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/property-metadata-5.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/property-neg-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/property-neg-10.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/property-neg-2.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/property-neg-3.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/property-neg-4.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/property-neg-5.m
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apple-local/branches/llvm/gcc/testsuite/objc.dg/property-neg-9.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/property-weak-attribute-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/property-weak-attribute-2.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/property-weak-attribute-3.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/property-weak-attribute-4.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/propperty-neg-8.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/proto-qual-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/selector-3.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/special/unclaimed-category-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/stret-2.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/stubify-2.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/symtab-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/threedotthree-abi-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/try-catch-15.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/type-size-2.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/volatile-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/zero-link-2.m
apple-local/branches/llvm/gcc/tlink.c
apple-local/branches/llvm/gcc/toplev.c
apple-local/branches/llvm/gcc/toplev.h
apple-local/branches/llvm/gcc/tree-optimize.c
apple-local/branches/llvm/gcc/tree-pass.h
apple-local/branches/llvm/gcc/tree-ssa-ccp.c
apple-local/branches/llvm/gcc/tree.h
apple-local/branches/llvm/gcc/version.c
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apple-local/branches/llvm/driverdriver.c
apple-local/branches/llvm/gcc/testsuite/g++.apple/4905666.C
apple-local/branches/llvm/gcc/testsuite/g++.apple/format-security-attribute-1.C
apple-local/branches/llvm/gcc/testsuite/g++.apple/format-security-attribute-2.C
apple-local/branches/llvm/gcc/testsuite/g++.apple/r5119788.C
apple-local/branches/llvm/gcc/testsuite/g++.dg/eh/cond3.C
apple-local/branches/llvm/gcc/testsuite/g++.dg/other/darwin-minversion-1.C
apple-local/branches/llvm/gcc/testsuite/g++.dg/rtti/darwin-builtin-linkage.C
apple-local/branches/llvm/gcc/testsuite/gcc.apple/4134510.c
apple-local/branches/llvm/gcc/testsuite/gcc.apple/4639472.c
apple-local/branches/llvm/gcc/testsuite/gcc.apple/4968055.c
apple-local/branches/llvm/gcc/testsuite/gcc.apple/format-security-attribute-1.c
apple-local/branches/llvm/gcc/testsuite/gcc.apple/format-security-attribute-2.c
apple-local/branches/llvm/gcc/testsuite/gcc.c-torture/execute/builtins/chk.h
apple-local/branches/llvm/gcc/testsuite/gcc.c-torture/execute/builtins/lib/chk.c
apple-local/branches/llvm/gcc/testsuite/gcc.c-torture/execute/builtins/memcpy-chk-lib.c
apple-local/branches/llvm/gcc/testsuite/gcc.c-torture/execute/builtins/memcpy-chk.c
apple-local/branches/llvm/gcc/testsuite/gcc.c-torture/execute/builtins/memmove-chk-lib.c
apple-local/branches/llvm/gcc/testsuite/gcc.c-torture/execute/builtins/memmove-chk.c
apple-local/branches/llvm/gcc/testsuite/gcc.c-torture/execute/builtins/mempcpy-chk-lib.c
apple-local/branches/llvm/gcc/testsuite/gcc.c-torture/execute/builtins/mempcpy-chk.c
apple-local/branches/llvm/gcc/testsuite/gcc.c-torture/execute/builtins/memset-chk-lib.c
apple-local/branches/llvm/gcc/testsuite/gcc.c-torture/execute/builtins/memset-chk.c
apple-local/branches/llvm/gcc/testsuite/gcc.c-torture/execute/builtins/pr23484-chk-lib.c
apple-local/branches/llvm/gcc/testsuite/gcc.c-torture/execute/builtins/pr23484-chk.c
apple-local/branches/llvm/gcc/testsuite/gcc.c-torture/execute/builtins/snprintf-chk-lib.c
apple-local/branches/llvm/gcc/testsuite/gcc.c-torture/execute/builtins/snprintf-chk.c
apple-local/branches/llvm/gcc/testsuite/gcc.c-torture/execute/builtins/sprintf-chk-lib.c
apple-local/branches/llvm/gcc/testsuite/gcc.c-torture/execute/builtins/sprintf-chk.c
apple-local/branches/llvm/gcc/testsuite/gcc.c-torture/execute/builtins/stpcpy-chk-lib.c
apple-local/branches/llvm/gcc/testsuite/gcc.c-torture/execute/builtins/stpcpy-chk.c
apple-local/branches/llvm/gcc/testsuite/gcc.c-torture/execute/builtins/strcat-chk-lib.c
apple-local/branches/llvm/gcc/testsuite/gcc.c-torture/execute/builtins/strcat-chk.c
apple-local/branches/llvm/gcc/testsuite/gcc.c-torture/execute/builtins/strcpy-chk-lib.c
apple-local/branches/llvm/gcc/testsuite/gcc.c-torture/execute/builtins/strcpy-chk.c
apple-local/branches/llvm/gcc/testsuite/gcc.c-torture/execute/builtins/strncat-chk-lib.c
apple-local/branches/llvm/gcc/testsuite/gcc.c-torture/execute/builtins/strncat-chk.c
apple-local/branches/llvm/gcc/testsuite/gcc.c-torture/execute/builtins/strncpy-chk-lib.c
apple-local/branches/llvm/gcc/testsuite/gcc.c-torture/execute/builtins/strncpy-chk.c
apple-local/branches/llvm/gcc/testsuite/gcc.c-torture/execute/builtins/vsnprintf-chk-lib.c
apple-local/branches/llvm/gcc/testsuite/gcc.c-torture/execute/builtins/vsnprintf-chk.c
apple-local/branches/llvm/gcc/testsuite/gcc.c-torture/execute/builtins/vsprintf-chk-lib.c
apple-local/branches/llvm/gcc/testsuite/gcc.c-torture/execute/builtins/vsprintf-chk.c
apple-local/branches/llvm/gcc/testsuite/gcc.c-torture/execute/fprintf-1.c
apple-local/branches/llvm/gcc/testsuite/gcc.c-torture/execute/fprintf-chk-1.c
apple-local/branches/llvm/gcc/testsuite/gcc.c-torture/execute/pr29302-1.c
apple-local/branches/llvm/gcc/testsuite/gcc.c-torture/execute/printf-1.c
apple-local/branches/llvm/gcc/testsuite/gcc.c-torture/execute/printf-chk-1.c
apple-local/branches/llvm/gcc/testsuite/gcc.c-torture/execute/vfprintf-1.c
apple-local/branches/llvm/gcc/testsuite/gcc.c-torture/execute/vfprintf-chk-1.c
apple-local/branches/llvm/gcc/testsuite/gcc.c-torture/execute/vprintf-1.c
apple-local/branches/llvm/gcc/testsuite/gcc.c-torture/execute/vprintf-chk-1.c
apple-local/branches/llvm/gcc/testsuite/gcc.dg/builtin-stringop-chk-1.c
apple-local/branches/llvm/gcc/testsuite/gcc.dg/builtin-stringop-chk-2.c
apple-local/branches/llvm/gcc/testsuite/gcc.dg/darwin-comm.c
apple-local/branches/llvm/gcc/testsuite/gcc.dg/darwin-minversion-1.c
apple-local/branches/llvm/gcc/testsuite/gcc.dg/darwin-minversion-2.c
apple-local/branches/llvm/gcc/testsuite/gcc.dg/ssp-1.c
apple-local/branches/llvm/gcc/testsuite/gcc.dg/ssp-2.c
apple-local/branches/llvm/gcc/testsuite/gcc.dg/tree-ssa/builtin-fprintf-1.c
apple-local/branches/llvm/gcc/testsuite/gcc.dg/tree-ssa/builtin-fprintf-chk-1.c
apple-local/branches/llvm/gcc/testsuite/gcc.dg/tree-ssa/builtin-printf-1.c
apple-local/branches/llvm/gcc/testsuite/gcc.dg/tree-ssa/builtin-printf-chk-1.c
apple-local/branches/llvm/gcc/testsuite/gcc.dg/tree-ssa/builtin-vfprintf-1.c
apple-local/branches/llvm/gcc/testsuite/gcc.dg/tree-ssa/builtin-vfprintf-chk-1.c
apple-local/branches/llvm/gcc/testsuite/gcc.dg/tree-ssa/builtin-vprintf-1.c
apple-local/branches/llvm/gcc/testsuite/gcc.dg/tree-ssa/builtin-vprintf-chk-1.c
apple-local/branches/llvm/gcc/testsuite/gcc.target/i386/5131847.c
apple-local/branches/llvm/gcc/testsuite/gcc.target/i386/reload-1.c
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/cxx-ivars-4.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/format-security-attribute-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/format-security-attribute-2.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/format-security-attribute-3.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/method-copyctor-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/newproperty-anon-category-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/newproperty-anon-category-2.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/newproperty-anon-category-3.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/newproperty-anon-category-4.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/newproperty-anon-category-5.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/newproperty-anon-category-6.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/newproperty-atomic-neg-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/newproperty-atomiccopy-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/newproperty-atomiccopy.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/newproperty-atomicretained-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/newproperty-atomicretained.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/newproperty-category-impl-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/newproperty-compound-setter-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/newproperty-nested-synthesis-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/newproperty-no-protocol-warn-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/newproperty-protocol-lookup-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/newproperty-setter-decl-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/newproperty-typedef-mangle-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/objc-foreach-elem-collection-elem.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/objc-foreach-lvalue-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/objc-gc-11.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/objc-gc-assign-ivar-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/objc-gc-section-3.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/objc-visibility-hidden-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/objc-weak-pointer.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/objc2-bitfield-abi-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/objc2-cplus-try-catch-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/objc2-ivar-test-2.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/objc2-none-fragile-ivar-use.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/objc2-package-ivar-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/objc2-try-catch-neg-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/try-catch-20.mm
apple-local/branches/llvm/gcc/testsuite/objc.dg/format-security-attribute-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/format-security-attribute-2.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/format-security-attribute-3.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/format-security-attribute-4.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/newproperty-anon-category-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/newproperty-anon-category-2.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/newproperty-anon-category-3.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/newproperty-anon-category-4.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/newproperty-anon-category-5.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/newproperty-anon-category-6.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/newproperty-atomic-neg-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/newproperty-atomiccopy-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/newproperty-atomiccopy.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/newproperty-atomicretained-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/newproperty-atomicretained.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/newproperty-category-impl-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/newproperty-compound-setter-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/newproperty-forward-class-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/newproperty-nested-synthesis-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/newproperty-no-protocol-warn-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/newproperty-protocol-lookup-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/newproperty-setter-decl-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/newproperty-typedef-mangle-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/objc-foreach-elem-collection-elem.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/objc-foreach-lvalue-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/objc-gc-9.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/objc-gc-assign-ivar-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/objc-gc-section-3.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/objc-visibility-hidden-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/objc-weak-pointer.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/objc2-bitfield-abi-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/objc2-ivar-layout-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/objc2-ivar-test-2.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/objc2-none-fragile-ivar-use.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/objc2-package-ivar-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/objc2-try-catch-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/objc2-try-catch-neg-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/try-catch-17.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/volatile-1-x86-64.m
apple-local/branches/llvm/gcc/tree-object-size.c
Removed Paths:
-------------
apple-local/branches/llvm/gcc/testsuite/gcc.dg/darwin-ld-6.c
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/hybrid-abi-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/hybrid-abi-2.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/newproperty-copy-1.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/newproperty-copy-4.mm
apple-local/branches/llvm/gcc/testsuite/obj-c++.dg/property-metadata-6.mm
apple-local/branches/llvm/gcc/testsuite/objc.dg/hybrid-abi-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/hybrid-abi-2.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/newproperty-copy-1.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/newproperty-copy-4.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/objc-gc-1-64bit.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/objc-gc-5-64bit.m
apple-local/branches/llvm/gcc/testsuite/objc.dg/property-metadata-6.m
apple-local/branches/llvm/sdk
apple-local/branches/llvm/sdk-test
Property Changed:
----------------
apple-local/branches/llvm/
Property changes on: apple-local/branches/llvm
___________________________________________________________________
Name: svnmerge-integrated
- /apple-local/branches/positron:1-122101
+ /apple-local/branches/positron:1-126649
Modified: apple-local/branches/llvm/ChangeLog.apple
===================================================================
--- apple-local/branches/llvm/ChangeLog.apple 2007-04-30 21:36:53 UTC (rev 126738)
+++ apple-local/branches/llvm/ChangeLog.apple 2007-04-30 22:03:04 UTC (rev 126739)
@@ -1,3 +1,14 @@
+2007-03-21 Mike Stump
+
+ Radar 5048438
+ * build_gcc: Add links for as and ld so the driver can find them
+ even when they aren't in the path.
+
+2007-03-15 Mike Stump
+
+ Radar 5020628
+ * build_gcc: Stubify libstdc++.dylib instead of symlinking.
+
2007-03-15 Geoffrey Keating
* build_gcc: Unset RC_DEBUG_OPTIONS when bootstrapping.
Modified: apple-local/branches/llvm/build_gcc
===================================================================
--- apple-local/branches/llvm/build_gcc 2007-04-30 21:36:53 UTC (rev 126738)
+++ apple-local/branches/llvm/build_gcc 2007-04-30 22:03:04 UTC (rev 126739)
@@ -387,6 +387,8 @@
cp -p $DIR/dst-$BUILD-$t$SL/$f .$DL/$f || exit 1
fi
done
+ ln -s ../../../../bin/as .$DL/as
+ ln -s ../../../../bin/ld .$DL/ld
done
# bin
@@ -452,9 +454,10 @@
done
for t in $TARGETS ; do
- ln -s ../../../libstdc++.6.dylib \
+ cp -p /usr/lib/libstdc++.6.dylib \
.$DEST_ROOT/lib/gcc/$t-apple-darwin$DARWIN_VERS/$VERS/libstdc++.dylib \
|| exit 1
+ strip -x -c .$DEST_ROOT/lib/gcc/$t-apple-darwin$DARWIN_VERS/$VERS/libstdc++.dylib || exit 1
done
# include
@@ -494,7 +497,7 @@
# Build driver-driver using fully-named drivers
for h in $HOSTS ; do
$h-apple-darwin$DARWIN_VERS-gcc-$VERS \
- $ORIG_SRC_DIR/gcc/config/darwin-driver.c \
+ $ORIG_SRC_DIR/driverdriver.c \
-DPDN="\"-apple-darwin$DARWIN_VERS-gcc-$VERS\"" \
-DIL="\"$DEST_ROOT/bin/\"" -I $ORIG_SRC_DIR/include \
-I $ORIG_SRC_DIR/gcc -I $ORIG_SRC_DIR/gcc/config \
@@ -504,7 +507,7 @@
-o $DEST_DIR/$DEST_ROOT/bin/tmp-$h-gcc-$MAJ_VERS || exit 1
$h-apple-darwin$DARWIN_VERS-gcc-$VERS \
- $ORIG_SRC_DIR/gcc/config/darwin-driver.c \
+ $ORIG_SRC_DIR/driverdriver.c \
-DPDN="\"-apple-darwin$DARWIN_VERS-g++-$VERS\"" \
-DIL="\"$DEST_ROOT/bin/\"" -I $ORIG_SRC_DIR/include \
-I $ORIG_SRC_DIR/gcc -I $ORIG_SRC_DIR/gcc/config \
@@ -525,9 +528,6 @@
rm $DEST_DIR/$DEST_ROOT/bin/tmp-*-gcc-$MAJ_VERS || exit 1
rm $DEST_DIR/$DEST_ROOT/bin/tmp-*-g++-$MAJ_VERS || exit 1
-# Build sdk bits
-#$SRC_DIR/sdk "$DEST_DIR" "$MAJ_VERS" "$VERS" "$TARGETS" || exit 1
-
########################################
# Create SYM_DIR with information required for debugging.
@@ -542,7 +542,7 @@
# Save .dSYM files and .a archives
cd $DEST_DIR || exit 1
-find . \( -name \*.dSYM -or -name \*.a \) -print \
+find . \( -path \*.dSYM/\* -or -name \*.a \) -print \
| cpio -pdml $SYM_DIR || exit 1
# Save source files.
mkdir $SYM_DIR/src || exit 1
@@ -553,7 +553,7 @@
# Remove debugging information from DEST_DIR.
find $DEST_DIR -perm -0111 \! -name \*.dylib \! -name fixinc.sh \
- \! -name mkheaders -type f -print \
+ \! -name mkheaders \! -name libstdc++.dylib -type f -print \
| xargs strip || exit 1
# APPLE LOCAL begin LLVM - Strip with -Sx instead of -SX
find $DEST_DIR \( -name \*.a -or -name \*.dylib \) \
Copied: apple-local/branches/llvm/driverdriver.c (from rev 126624, apple-local/branches/positron/driverdriver.c)
===================================================================
--- apple-local/branches/llvm/driverdriver.c (rev 0)
+++ apple-local/branches/llvm/driverdriver.c 2007-04-30 22:03:04 UTC (rev 126739)
@@ -0,0 +1,1550 @@
+/* APPLE LOCAL file driver driver */
+/* Darwin driver program that handles -arch commands and invokes
+ appropriate compiler driver.
+ Copyright (C) 2004, 2005 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 2, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING. If not, write to the Free
+Software Foundation, 59 Temple Place - Suite 330, Boston, MA
+02111-1307, USA. */
+
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include "libiberty.h"
+#include "filenames.h"
+#include "stdbool.h"
+/* Hack!.
+ Pay the price for including darwin.h. */
+typedef int tree;
+#define GTY(x) /* nothing */
+/* Include darwin.h for SWITCH_TAKES_ARG and
+ WORD_SWIATCH_TAKES_ARG. */
+
+#include "darwin.h"
+
+/* Include gcc.h for DEFAULT_SWITCH_TAKES_ARG and
+ DEFAULT_WORD_SWIATCH_TAKES_ARG. */
+
+#include "gcc.h"
+
+/* This program name. */
+const char *progname;
+
+/* driver prefix. */
+const char *driver_exec_prefix;
+
+/* driver prefix length. */
+int prefix_len;
+
+/* current working directory. */
+char *curr_dir;
+
+/* Use if -o flag is absent. */
+const char *final_output = "a.out";
+
+/* Variabless to track presence and/or absence of important command
+ line options. */
+int compile_only_request = 0;
+int asm_output_request = 0;
+int dash_capital_m_seen = 0;
+int preprocessed_output_request = 0;
+int ima_is_used = 0;
+int dash_dynamiclib_seen = 0;
+int verbose_flag = 0;
+int save_temps_seen = 0;
+
+/* Support at the max 10 arch. at a time. This is historical limit. */
+#define MAX_ARCHES 10
+
+/* Name of user supplied architectures. */
+const char *arches[MAX_ARCHES];
+
+/* -arch counter. */
+static int num_arches;
+
+/* Input filenames. */
+struct input_filename
+{
+ const char *name;
+ int index;
+ struct input_filename *next;
+};
+struct input_filename *in_files;
+struct input_filename *last_infile;
+
+static int num_infiles;
+
+/* User specified output file name. */
+const char *output_filename = NULL;
+
+/* Output file names used for arch specific driver invocation. These
+ are input file names for 'lipo'. */
+const char **out_files;
+static int num_outfiles;
+
+/* Architecture names used by config.guess does not match the names
+ used by NXGet... Use this hand coded mapping to connect them. */
+struct arch_config_guess_map
+{
+ const char *arch_name;
+ const char *config_string;
+};
+
+struct arch_config_guess_map arch_config_map [] =
+{
+ {"i386", "i686"},
+ {"ppc", "powerpc"},
+ {"ppc64", "powerpc"},
+ /* APPLE LOCAL x86_64 support 2006-02-02 */
+ {"x86_64", "i686"},
+ {NULL, NULL}
+};
+
+/* List of interpreted command line flags. Supply this to gcc driver. */
+const char **new_argv;
+int new_argc;
+
+/* Argument list for 'lipo'. */
+const char **lipo_argv;
+
+/* Info about the sub process. Need one subprocess for each arch plus
+ additional one for 'lipo'. */
+struct command
+{
+ const char *prog;
+ const char **argv;
+ int pid;
+} commands[MAX_ARCHES+1];
+
+/* total number of argc. */
+static int total_argc;
+
+static int greatest_status = 0;
+static int signal_count = 0;
+
+#ifndef SWITCH_TAKES_ARG
+#define SWITCH_TAKES_ARG(CHAR) DEFAULT_SWITCH_TAKES_ARG(CHAR)
+#endif
+
+#ifndef WORD_SWITCH_TAKES_ARG
+#define WORD_SWITCH_TAKES_ARG(STR) DEFAULT_WORD_SWITCH_TAKES_ARG (STR)
+#endif
+
+
+/* Local function prototypes. */
+static const char * get_arch_name (const char *);
+static char * get_driver_name (const char *);
+static void delete_out_files (void);
+static char * strip_path_and_suffix (const char *, const char *);
+static void initialize (void);
+static void final_cleanup (void);
+static int do_wait (int, const char *);
+static int do_lipo (int, const char *);
+static int do_compile (const char **, int);
+static int do_compile_separately (void);
+static int do_lipo_separately (void);
+static int add_arch_options (int, const char **, int);
+static int remove_arch_options (const char**, int);
+static void add_arch (const char *);
+static const char *resolve_symlink (const char *, char *, int, int);
+static const char *resolve_path_to_executable (const char *filename);
+static int get_prog_name_len (const char *prog);
+
+/* Find arch name for the given input string. If input name is NULL then local
+ arch name is used. */
+
+static const char *
+get_arch_name (const char *name)
+{
+ const NXArchInfo * a_info;
+ const NXArchInfo * all_info;
+ cpu_type_t cputype;
+ struct arch_config_guess_map *map;
+ const char *aname;
+
+ if (name)
+ {
+ /* Find config name based on arch name. */
+ aname = NULL;
+ map = arch_config_map;
+ while (map->arch_name)
+ {
+ if (!strcmp (map->arch_name, name))
+ return name;
+ else map++;
+ }
+ a_info = NXGetArchInfoFromName (name);
+ }
+ else
+ a_info = NXGetLocalArchInfo ();
+
+ if (!a_info)
+ fatal ("Invalid arch name : %s", name);
+
+ all_info = NXGetAllArchInfos();
+
+ if (!all_info)
+ fatal ("Unable to get architecture information");
+
+ /* Find first arch. that matches cputype. */
+ cputype = a_info->cputype;
+
+ while (all_info->name)
+ {
+ if (all_info->cputype == cputype)
+ break;
+ else
+ all_info++;
+ }
+
+ return all_info->name;
+}
+
+/* Find driver name based on input arch name. */
+
+static char *
+get_driver_name (const char *arch_name)
+{
+ char *driver_name;
+ const char *config_name;
+ int len;
+ int index;
+ struct arch_config_guess_map *map;
+
+ /* find config name based on arch name. */
+ config_name = NULL;
+ map = arch_config_map;
+ while (map->arch_name)
+ {
+ if (!strcmp (map->arch_name, arch_name))
+ {
+ config_name = map->config_string;
+ break;
+ }
+ else map++;
+ }
+
+ if (!config_name)
+ fatal ("Unable to guess config name for arch %s", arch_name);
+
+ len = strlen (config_name) + strlen (PDN) + prefix_len + 1;
+ driver_name = (char *) malloc (sizeof (char) * len);
+ driver_name[0] = '\0';
+
+ if (driver_exec_prefix)
+ strcpy (driver_name, driver_exec_prefix);
+ strcat (driver_name, config_name);
+ strcat (driver_name, PDN);
+
+ return driver_name;
+}
+
+/* Delete out_files. */
+
+static void
+delete_out_files (void)
+{
+ const char *temp;
+ struct stat st;
+ int i = 0;
+
+ for (i = 0, temp = out_files[i];
+ temp && i < total_argc * MAX_ARCHES;
+ temp = out_files[++i])
+ if (stat (temp, &st) >= 0 && S_ISREG (st.st_mode))
+ unlink (temp);
+
+}
+
+/* Put fatal error message on stderr and exit. */
+
+void
+fatal (const char *msgid, ...)
+{
+ va_list ap;
+
+ va_start (ap, msgid);
+
+ fprintf (stderr, "%s: ", progname);
+ vfprintf (stderr, msgid, ap);
+ va_end (ap);
+ fprintf (stderr, "\n");
+ delete_out_files ();
+ exit (1);
+}
+
+/* Print error message and exit. */
+
+static void
+pfatal_pexecute (const char *errmsg_fmt, const char *errmsg_arg)
+{
+ if (errmsg_arg)
+ {
+ int save_errno = errno;
+
+ /* Space for trailing '\0' is in %s. */
+ char *msg = (char *) malloc (strlen (errmsg_fmt) + strlen (errmsg_arg));
+ sprintf (msg, errmsg_fmt, errmsg_arg);
+ errmsg_fmt = msg;
+
+ errno = save_errno;
+ }
+
+ fprintf (stderr,"%s: %s: %s", progname, errmsg_fmt, xstrerror (errno));
+ delete_out_files ();
+ exit (1);
+}
+
+#ifdef DEBUG
+static void
+debug_command_line (const char **debug_argv, int debug_argc)
+{
+ int i;
+
+ fprintf (stderr,"%s: debug_command_line\n", progname);
+ fprintf (stderr,"%s: arg count = %d\n", progname, debug_argc);
+
+ for (i = 0; debug_argv[i]; i++)
+ fprintf (stderr,"%s: arg [%d] %s\n", progname, i, debug_argv[i]);
+}
+#endif
+
+/* Strip directory name from the input file name and replace file name
+ suffix with new. */
+
+static char *
+strip_path_and_suffix (const char *full_name, const char *new_suffix)
+{
+ char *name;
+ char *p;
+
+ if (!full_name || !new_suffix)
+ return NULL;
+
+ /* Strip path name. */
+ p = (char *)full_name + strlen (full_name);
+ while (p != full_name && !IS_DIR_SEPARATOR (p[-1]))
+ --p;
+
+ /* Now 'p' is a file name with suffix. */
+ name = (char *) malloc (strlen (p) + 1 + strlen (new_suffix));
+
+ strcpy (name, p);
+
+ p = name + strlen (name);
+ while (p != name && *p != '.')
+ --p;
+
+ /* If did not reach at the beginning of name then '.' is found.
+ Replace '.' with NULL. */
+ if (p != name)
+ *p = '\0';
+
+ strcat (name, new_suffix);
+ return name;
+}
+
+/* Initialization */
+
+static void
+initialize (void)
+{
+
+ int i;
+
+ /* Let's count, how many additional arguments driver driver will supply
+ to compiler driver:
+
+ Each "-arch" "" is replaced by approriate "-mcpu=".
+ That leaves one additional arg space available.
+
+ Note that only one -m* is supplied to each compiler driver. Which
+ means, extra "-arch" "" are removed from the original command
+ line. But lets not count how many additional slots are available.
+
+ Driver driver may need to specify temp. output file name, say
+ "-o" "foobar". That needs two extra argments.
+
+ Sometimes linker wants one additional "-Wl,-arch_multiple".
+
+ Sometimes linker wants to see "-final_output" "outputname".
+
+ In the end, we may need five extra arguments, plus one extra
+ space for the NULL terminator. */
+
+ new_argv = (const char **) malloc ((total_argc + 6) * sizeof (const char *));
+ if (!new_argv)
+ abort ();
+
+ /* First slot, new_argv[0] is reserved for the driver name. */
+ new_argc = 1;
+
+ /* For each -arch, three arguments are needed.
+ For example, "-arch" "ppc" "file". Additional slots are for
+ "lipo" "-create" "-o" "outputfilename" and the NULL. */
+ lipo_argv = (const char **) malloc ((total_argc * 3 + 5) * sizeof (const char *));
+ if (!lipo_argv)
+ abort ();
+
+ /* Need separate out_files for each arch, max is MAX_ARCHES.
+ Need separate out_files for each input file. */
+
+ out_files = (const char **) malloc ((total_argc * MAX_ARCHES) * sizeof (const char *));
+ if (!out_files)
+ abort ();
+
+ num_arches = 0;
+ num_infiles = 0;
+
+ in_files = NULL;
+ last_infile = NULL;
+
+ for (i = 0; i < (MAX_ARCHES + 1); i++)
+ {
+ commands[i].prog = NULL;
+ commands[i].argv = NULL;
+ commands[i].pid = 0;
+ }
+}
+
+/* Cleanup. */
+
+static void
+final_cleanup (void)
+{
+ int i;
+ struct input_filename *next;
+ delete_out_files ();
+ free (new_argv);
+ free (lipo_argv);
+ free (out_files);
+
+ for (i = 0, next = in_files;
+ i < num_infiles && next;
+ i++)
+ {
+ next = in_files->next;
+ free (in_files);
+ in_files = next;
+ }
+}
+
+/* Wait for the process pid and return appropriate code. */
+
+static int
+do_wait (int pid, const char *prog)
+{
+ int status = 0;
+ int ret = 0;
+
+ pid = pwait (pid, &status, 0);
+
+ if (WIFSIGNALED (status))
+ {
+ if (!signal_count &&
+ WEXITSTATUS (status) > greatest_status)
+ greatest_status = WEXITSTATUS (status);
+ ret = -1;
+ }
+ else if (WIFEXITED (status)
+ && WEXITSTATUS (status) >= 1)
+ {
+ if (WEXITSTATUS (status) > greatest_status)
+ greatest_status = WEXITSTATUS (status);
+ signal_count++;
+ ret = -1;
+ }
+ return ret;
+}
+
+/* Invoke 'lipo' and combine and all output files. */
+
+static int
+do_lipo (int start_outfile_index, const char *out_file)
+{
+ int i, j, pid;
+ char *errmsg_fmt, *errmsg_arg;
+
+ /* Populate lipo arguments. */
+ lipo_argv[0] = "lipo";
+ lipo_argv[1] = "-create";
+ lipo_argv[2] = "-o";
+ lipo_argv[3] = out_file;
+
+ /* Already 4 lipo arguments are set. Now add all lipo inputs. */
+ j = 4;
+ for (i = 0; i < num_arches; i++)
+ lipo_argv[j++] = out_files[start_outfile_index + i];
+
+ /* Add the NULL at the end. */
+ lipo_argv[j++] = NULL;
+
+#ifdef DEBUG
+ debug_command_line (lipo_argv, j);
+#endif
+
+ if (verbose_flag)
+ {
+ for (i = 0; lipo_argv[i]; i++)
+ fprintf (stderr, "%s ", lipo_argv[i]);
+ fprintf (stderr, "\n");
+ }
+ pid = pexecute (lipo_argv[0], (char *const *)lipo_argv, progname, NULL, &errmsg_fmt,
+ &errmsg_arg, PEXECUTE_SEARCH | PEXECUTE_LAST);
+
+ if (pid == -1)
+ pfatal_pexecute (errmsg_fmt, errmsg_arg);
+
+ return do_wait (pid, lipo_argv[0]);
+}
+
+/* Invoke compiler for all architectures. */
+
+static int
+do_compile (const char **current_argv, int current_argc)
+{
+ char *errmsg_fmt, *errmsg_arg;
+ int index = 0;
+ int ret = 0;
+
+ int dash_o_index = current_argc;
+ int of_index = current_argc + 1;
+ int argc_count = current_argc + 2;
+
+ while (index < num_arches)
+ {
+ int additional_arch_options = 0;
+
+ current_argv[0] = get_driver_name (get_arch_name (arches[index]));
+
+ /* setup output file. */
+ out_files[num_outfiles] = make_temp_file (".out");
+ current_argv[dash_o_index] = "-o";
+ current_argv[of_index] = out_files [num_outfiles];
+ num_outfiles++;
+
+ /* Add arch option as the last option. Do not add any other option
+ before removing this option. */
+ additional_arch_options = add_arch_options (index, current_argv, argc_count);
+ argc_count += additional_arch_options;
+
+ commands[index].prog = current_argv[0];
+ commands[index].argv = current_argv;
+
+ current_argv[argc_count] = NULL;
+
+#ifdef DEBUG
+ debug_command_line (current_argv, argc_count);
+#endif
+ commands[index].pid = pexecute (current_argv[0],
+ (char *const *)current_argv,
+ progname, NULL,
+ &errmsg_fmt,
+ &errmsg_arg,
+ PEXECUTE_SEARCH | PEXECUTE_LAST);
+
+ if (commands[index].pid == -1)
+ pfatal_pexecute (errmsg_fmt, errmsg_arg);
+
+ /* Remove the last arch option added in the current_argv list. */
+ if (additional_arch_options)
+ argc_count -= remove_arch_options (current_argv, argc_count);
+ index++;
+ }
+
+ index = 0;
+ while (index < num_arches)
+ {
+ ret = do_wait (commands[index].pid, commands[index].prog);
+ fflush (stdout);
+ index++;
+ }
+ return ret;
+}
+
+/* Invoke compiler for each input file separately.
+ Construct command line for each invocation with one input file. */
+
+static int
+do_compile_separately (void)
+{
+ const char **new_new_argv;
+ int i, new_new_argc;
+ struct input_filename *current_ifn;
+
+ if (num_infiles == 1 || ima_is_used)
+ abort ();
+
+ /* Total number of arguments in separate compiler invocation is :
+ total number of original arguments - total no input files + one input
+ file + "-o" + output file . */
+ new_new_argv = (const char **) malloc ((new_argc - num_infiles + 4) * sizeof (const char *));
+ if (!new_new_argv)
+ abort ();
+
+ for (current_ifn = in_files; current_ifn && current_ifn->name;
+ current_ifn = current_ifn->next)
+ {
+ struct input_filename *ifn = in_files;
+ int go_back = 0;
+ new_new_argc = 1;
+
+ for (i = 1; i < new_argc; i++)
+ {
+
+ if (ifn && ifn->name && !strcmp (new_argv[i], ifn->name))
+ {
+ /* This argument is one of the input file. */
+
+ if (!strcmp (new_argv[i], current_ifn->name))
+ {
+ /* If it is current input file name then add it in the new
+ list. */
+ new_new_argv[new_new_argc++] = new_argv[i];
+ }
+ /* This input file can not appear in
+ again on the command line so next time look for next input
+ file. */
+ ifn = ifn->next;
+ }
+ else
+ {
+ /* This argument is not a input file name. Add it into new
+ list. */
+ new_new_argv[new_new_argc++] = new_argv[i];
+ }
+ }
+
+ /* OK now we have only one input file and all other arguments. */
+ do_compile (new_new_argv, new_new_argc);
+ }
+}
+
+/* Invoke 'lipo' on set of output files and create multile FAT binaries. */
+
+static int
+do_lipo_separately (void)
+{
+ int ifn_index;
+ struct input_filename *ifn;
+ for (ifn_index = 0, ifn = in_files;
+ ifn_index < num_infiles && ifn && ifn->name;
+ ifn_index++, ifn = ifn->next)
+ do_lipo (ifn_index * num_arches,
+ strip_path_and_suffix (ifn->name, ".o"));
+}
+
+/* Replace -arch options with appropriate "-mcpu=" OR
+ "-march=". INDEX is the index in arches[] table. */
+
+static int
+add_arch_options (int index, const char **current_argv, int arch_index)
+{
+
+ int count;
+
+ /* We are adding 1 argument for selected arches. */
+ count = 1;
+
+#ifdef DEBUG
+ fprintf (stderr, "%s: add_arch_options: %s\n", progname, arches[index]);
+#endif
+
+ if (!strcmp (arches[index], "ppc601"))
+ current_argv[arch_index] = "-mcpu=601";
+ else if (!strcmp (arches[index], "ppc603"))
+ current_argv[arch_index] = "-mcpu=603";
+ else if (!strcmp (arches[index], "ppc604"))
+ current_argv[arch_index] = "-mcpu=604";
+ else if (!strcmp (arches[index], "ppc604e"))
+ current_argv[arch_index] = "-mcpu=604e";
+ else if (!strcmp (arches[index], "ppc750"))
+ current_argv[arch_index] = "-mcpu=750";
+ else if (!strcmp (arches[index], "ppc7400"))
+ current_argv[arch_index] = "-mcpu=7400";
+ else if (!strcmp (arches[index], "ppc7450"))
+ current_argv[arch_index] = "-mcpu=7450";
+ else if (!strcmp (arches[index], "ppc970"))
+ current_argv[arch_index] = "-mcpu=970";
+ else if (!strcmp (arches[index], "ppc64"))
+ current_argv[arch_index] = "-m64";
+ else if (!strcmp (arches[index], "i486"))
+ current_argv[arch_index] = "-march=i486";
+ else if (!strcmp (arches[index], "i586"))
+ current_argv[arch_index] = "-march=i586";
+ else if (!strcmp (arches[index], "i686"))
+ current_argv[arch_index] = "-march=i686";
+ else if (!strcmp (arches[index], "pentium"))
+ current_argv[arch_index] = "-march=pentium";
+ else if (!strcmp (arches[index], "pentium2"))
+ current_argv[arch_index] = "-march=pentium2";
+ else if (!strcmp (arches[index], "pentpro"))
+ current_argv[arch_index] = "-march=pentiumpro";
+ else if (!strcmp (arches[index], "pentIIm3"))
+ current_argv[arch_index] = "-march=pentium2";
+ /* APPLE LOCAL begin x86_64 support 2006-02-02 */
+ else if (!strcmp (arches[index], "x86_64"))
+ current_argv[arch_index] = "-m64";
+ /* APPLE LOCAL end x86_64 support 2006-02-02 */
+ else
+ count = 0;
+
+ return count;
+}
+
+/* Remove the last option, which is arch option, added by
+ add_arch_options. Return how count of arguments removed. */
+static int
+remove_arch_options (const char **current_argv, int arch_index)
+{
+#ifdef DEBUG
+ fprintf (stderr, "%s: Removing argument no %d\n", progname, arch_index);
+#endif
+
+ current_argv[arch_index] = '\0';
+
+#ifdef DEBUG
+ debug_command_line (current_argv, arch_index);
+#endif
+
+ return 1;
+}
+
+/* Add new arch request. */
+void
+add_arch (const char *new_arch)
+{
+ int i;
+
+ /* User can say cc -arch ppc -arch ppc foo.c
+ Do not invoke ppc compiler twice in this case. */
+ for (i = 0; i < num_arches; i++)
+ {
+ if (!strcmp (arches[i], new_arch))
+ return;
+ }
+
+ arches[num_arches] = new_arch;
+ num_arches++;
+}
+
+/* Rewrite the command line as requested in the QA_OVERRIDE_GCC3_OPTIONS
+ environment variable -- used for testing the compiler, working around bugs
+ in the Apple build environment, etc.
+
+ The override string is made up of a set of space-separated clauses. The
+ first letter of each clause describes what's to be done:
+ +string Add string as a new argument (at the end of the command line).
+ Multi-word command lines can be added with +x +y
+ s/x/y/ substitute x for y in the command line. X must be an entire
+ argument, and can be a regular expression as accepted by the
+ POSIX regexp code. Y will be substituted as a single argument,
+ and will not have regexp replacements added in.
+ xoption Removes argument matching option
+ Xoption Removes argument matching option and following word
+ Ox Removes any optimization flags in command line and replaces
+ with -Ox.
+
+
+ Here's some examples:
+ O2
+ s/precomp-trustfile=foo//
+ +-fexplore-antartica
+ +-fast
+ s/-fsetvalue=* //
+ x-fwritable-strings
+ s/-O[0-2]/-Osize/
+ x-v
+ X-o +-o +foo.o
+
+ Option substitutions are processed from left to right; matches and changes
+ are cumulative. An error in processing one element (such as trying to
+ remove an element and successor when the match is at the end) cause the
+ particular change to stop, but additional changes in the environment
+ variable to be applied.
+
+ Key details:
+ * we always want to be able to adjust optimization levels for testing
+ * adding options is a common task
+ * substitution and deletion are less common.
+
+ If the first character of the environment variable is #, changes are
+ silent. If not, diagnostics are written to stderr explaining what
+ changes are being performed.
+
+*/
+
+char **arg_array;
+int arg_array_size=0;
+int arg_count = 0;
+int confirm_changes = 1;
+const int ARG_ARRAY_INCREMENT_SIZE = 8;
+#define FALSE 0
+
+/* Routines for the argument array. The argument array routines are
+ responsible for allocation and deallocation of all objects in the
+ array */
+
+void read_args (int argc, char **argv)
+{
+ int i;
+
+ arg_array_size = argc+10;
+ arg_count = argc;
+ arg_array = (char**) malloc(sizeof(char*)*arg_array_size);
+
+ for (i=0;i pos; i--) {
+ arg_array[i+1] = arg_array[i];
+ }
+
+ arg_array[pos] = newArg;
+ arg_count++;
+
+ if (confirm_changes)
+ fprintf(stderr,"### Adding argument %s at position %d\n",arg_to_insert, pos);
+}
+
+
+void replace_arg (char *str, int pos) {
+ char *newArg = malloc(strlen(str)+1);
+ strcpy(newArg,str);
+
+ if (confirm_changes)
+ fprintf (stderr,"### Replacing %s with %s\n",arg_array[pos], str);
+
+ free (arg_array[pos]);
+ arg_array[pos] = newArg;
+}
+
+void append_arg (char *str)
+{
+ char *new_arg = malloc (strlen (str)+1);
+ strcpy (new_arg, str);
+ if (confirm_changes)
+ fprintf(stderr,"### Adding argument %s at end\n", str);
+
+ if (arg_count == arg_array_size) {
+ /* expand array */
+ arg_array_size = arg_count + ARG_ARRAY_INCREMENT_SIZE;
+ arg_array = (char**) realloc (arg_array, arg_array_size);
+ }
+
+ arg_array[arg_count++] = new_arg;
+}
+
+void delete_arg(int pos) {
+ int i;
+
+ if (confirm_changes)
+ fprintf(stderr,"### Deleting argument %s\n",arg_array[pos]);
+
+ free (arg_array[pos]);
+
+ for (i=pos; i < arg_count; i++)
+ arg_array[i] = arg_array[i+1];
+
+ arg_count--;
+}
+
+/* Changing optimization levels is a common testing pattern --
+ we've got a special option that searches for and replaces anything
+ beginning with -O */
+void replace_optimization_level (char *new_level) {
+ int i;
+ int optionFound = 0;
+ char *new_opt = malloc(strlen(new_opt)+3);
+ sprintf(new_opt, "-O%s",new_level);
+
+
+ for (i=0;i= arg_count -1) {
+ if (confirm_changes)
+ fprintf(stderr,"Not enough arguments to do X\n");
+ } else {
+ delete_arg(search_index); /* Delete the matching argument */
+ delete_arg(search_index); /* Delete the following argument */
+ }
+ }
+ free (searchStr);
+ break;
+
+ case 'O':
+ /* Change the optimization level to the specified value, and
+ remove any optimization arguments. This is a separate command
+ because we often want is to substitute our favorite
+ optimization level for whatever the project normally wants.
+ As we probably care about this a lot (for things like
+ testing file sizes at different optimization levels) we
+ make a special rewrite clause. */
+ arg = arg_string (override_options_line, line_pos, arg_len);
+ replace_optimization_level(arg);
+ free (arg);
+ break;
+ case 's':
+ /* Search for the regexp passed in, and replace a matching argument
+ with the provided replacement string */
+ searchStr = arg_string (override_options_line, line_pos, arg_len);
+ search_and_replace (searchStr);
+ free (searchStr);
+ break;
+
+ default:
+ fprintf(stderr,"### QA_OVERRIDE_GCC3_OPTIONS: invalid string (pos %d)\n",
+ line_pos);
+ break;
+ }
+ line_pos += arg_len;
+ }
+ *argc = arg_count;
+ *argv = arg_array;
+}
+
+/* Given a path to a file, potentially containing a directory name, return the
+ number of characters at the end of the path that make up the filename part of
+ the path. */
+
+static int
+get_prog_name_len (const char *prog)
+{
+ int result = 0;
+ const char *progend = prog + strlen(prog);
+ const char *progname = progend;
+ while (progname != prog && !IS_DIR_SEPARATOR (progname[-1]))
+ --progname;
+ return progend-progname;
+}
+
+/* Return true iff the path is an executable file and not a directory. */
+
+static bool
+is_x_file (const char *path)
+{
+ struct stat st;
+ if (access (path, X_OK))
+ return false;
+ if (stat (path, &st) == -1)
+ return false;
+ if (S_ISDIR (st.st_mode))
+ return false;
+ return true;
+}
+
+/* Given a FILENAME of an executable (for example "gcc") search the PATH
+ environment variable to find out which directory it is in and return a fully
+ qualified path to the executable.
+ */
+
+static const char *
+resolve_path_to_executable (const char *filename)
+{
+ char path_buffer[2*PATH_MAX+1];
+ char *PATH = getenv ("PATH");
+ if (PATH == 0) return filename; /* PATH not set */
+
+ do {
+ unsigned prefix_size;
+ struct stat st;
+ char *colon = strchr (PATH, ':');
+
+ /* If we didn't find a :, use the whole last chunk. */
+ prefix_size = colon ? colon-PATH : strlen (PATH);
+
+ /* Form the full path. */
+ memcpy (path_buffer, PATH, prefix_size);
+ path_buffer[prefix_size] = '/';
+ strcpy (path_buffer+prefix_size+1, filename);
+
+ /* Check to see if this file is executable, if so, return it. */
+ if (is_x_file (path_buffer))
+ return strdup (path_buffer);
+ PATH = colon ? colon+1 : PATH+prefix_size;
+ } while (PATH[0]);
+
+ return filename;
+}
+
+/* If prog is a symlink, we want to rewrite prog to an absolute location,
+ symlink_buffer contains the destination of the symlink. Glue these pieces
+ together to form an absolute path. */
+
+static const char *
+resolve_symlink (const char *prog, char *symlink_buffer,
+ int argv_0_len, int prog_len)
+{
+ /* If the link isn't to an absolute path, prefix it with the argv[0]
+ directory. */
+ if (!IS_ABSOLUTE_PATH (symlink_buffer))
+ {
+ int prefix_len = argv_0_len - prog_len;
+ memmove (symlink_buffer+prefix_len, symlink_buffer,
+ PATH_MAX-prefix_len+1);
+ memcpy (symlink_buffer, prog, prefix_len);
+ }
+ return strdup(symlink_buffer);
+}
+
+/* Main entry point. This is gcc driver driver!
+ Interpret -arch flag from the list of input arguments. Invoke appropriate
+ compiler driver. 'lipo' the results if more than one -arch is supplied. */
+int
+main (int argc, const char **argv)
+{
+ size_t i;
+ int l, pid, ret, argv_0_len, prog_len;
+ char *errmsg_fmt, *errmsg_arg;
+ char *override_option_str = NULL;
+ char path_buffer[2*PATH_MAX+1];
+ int linklen;
+
+ total_argc = argc;
+ prog_len = 0;
+
+ argv_0_len = strlen (argv[0]);
+
+ /* Get the progname, required by pexecute () and program location. */
+ prog_len = get_prog_name_len (argv[0]);
+
+ /* If argv[0] is all program name (no slashes), search the PATH environment
+ variable to get the fully resolved path to the executable. */
+ if (prog_len == argv_0_len)
+ {
+#ifdef DEBUG
+ progname = argv[0] + argv_0_len - prog_len;
+ fprintf (stderr,"%s: before PATH resolution, full progname = %s\n",
+ argv[0]+argv_0_len-prog_len, argv[0]);
+#endif
+ argv[0] = resolve_path_to_executable (argv[0]);
+ prog_len = get_prog_name_len (argv[0]);
+ argv_0_len = strlen(argv[0]);
+ }
+
+ /* If argv[0] is a symbolic link, use the directory of the pointed-to file
+ to find compiler components. */
+
+ if ((linklen = readlink (argv[0], path_buffer, PATH_MAX)) != -1)
+ {
+ /* readlink succeeds if argv[0] is a symlink. path_buffer now contains
+ the file referenced. */
+ path_buffer[linklen] = '\0';
+#ifdef DEBUG
+ progname = argv[0] + argv_0_len - prog_len;
+ fprintf (stderr, "%s: before symlink, full prog = %s target = %s\n",
+ progname, argv[0], path_buffer);
+#endif
+ argv[0] = resolve_symlink(argv[0], path_buffer, argv_0_len, prog_len);
+ argv_0_len = strlen(argv[0]);
+
+ /* Get the progname, required by pexecute () and program location. */
+ prog_len = get_prog_name_len (argv[0]);
+
+#ifdef DEBUG
+ progname = argv[0] + argv_0_len - prog_len;
+ printf("%s: ARGV[0] after symlink = %s\n", progname, argv[0]);
+#endif
+ }
+
+ progname = argv[0] + argv_0_len - prog_len;
+
+ /* Setup driver prefix. */
+ prefix_len = argv_0_len - prog_len;
+ curr_dir = (char *) malloc (sizeof (char) * (prefix_len + 1));
+ strncpy (curr_dir, argv[0], prefix_len);
+ curr_dir[prefix_len] = '\0';
+ driver_exec_prefix = (argv[0], "/usr/bin", curr_dir);
+
+#ifdef DEBUG
+ fprintf (stderr,"%s: full progname = %s\n", progname, argv[0]);
+ fprintf (stderr,"%s: progname = %s\n", progname, progname);
+ fprintf (stderr,"%s: driver_exec_prefix = %s\n", progname, driver_exec_prefix);
+#endif
+
+ /* Before we get too far, rewrite the command line with any requested overrides */
+ if ((override_option_str = getenv ("QA_OVERRIDE_GCC3_OPTIONS")) != NULL)
+ rewrite_command_line(override_option_str, &argc, (char***)&argv);
+
+
+
+ initialize ();
+
+ /* Process arguments. Take appropriate actions when
+ -arch, -c, -S, -E, -o is encountered. Find input file name. */
+ for (i = 1; i < argc; i++)
+ {
+ if (!strcmp (argv[i], "-arch"))
+ {
+ if (i + 1 >= argc)
+ abort ();
+
+ add_arch (argv[i+1]);
+ i++;
+ }
+ else if (!strcmp (argv[i], "-c"))
+ {
+ new_argv[new_argc++] = argv[i];
+ compile_only_request = 1;
+ }
+ else if (!strcmp (argv[i], "-S"))
+ {
+ new_argv[new_argc++] = argv[i];
+ asm_output_request = 1;
+ }
+ else if (!strcmp (argv[i], "-E"))
+ {
+ new_argv[new_argc++] = argv[i];
+ preprocessed_output_request = 1;
+ }
+ else if (!strcmp (argv[i], "-MD") || !strcmp (argv[i], "-MMD"))
+ {
+ new_argv[new_argc++] = argv[i];
+ dash_capital_m_seen = 1;
+ }
+ else if (!strcmp (argv[i], "-dynamiclib"))
+ {
+ new_argv[new_argc++] = argv[i];
+ dash_dynamiclib_seen = 1;
+ }
+ else if (!strcmp (argv[i], "-v"))
+ {
+ new_argv[new_argc++] = argv[i];
+ verbose_flag = 1;
+ }
+ else if (!strcmp (argv[i], "-o"))
+ {
+ if (i + 1 >= argc)
+ abort ();
+
+ output_filename = argv[i+1];
+ i++;
+ }
+ else if ((! strcmp (argv[i], "-pass-exit-codes"))
+ || (! strcmp (argv[i], "-print-search-dirs"))
+ || (! strcmp (argv[i], "-print-libgcc-file-name"))
+ || (! strncmp (argv[i], "-print-file-name=", 17))
+ || (! strncmp (argv[i], "-print-prog-name=", 17))
+ || (! strcmp (argv[i], "-print-multi-lib"))
+ || (! strcmp (argv[i], "-print-multi-directory"))
+ || (! strcmp (argv[i], "-print-multi-os-directory"))
+ || (! strcmp (argv[i], "-ftarget-help"))
+ || (! strcmp (argv[i], "-fhelp"))
+ || (! strcmp (argv[i], "+e"))
+ || (! strncmp (argv[i], "-Wa,",4))
+ || (! strncmp (argv[i], "-Wp,",4))
+ || (! strncmp (argv[i], "-Wl,",4))
+ || (! strncmp (argv[i], "-l", 2))
+ || (! strncmp (argv[i], "-weak-l", 7))
+ || (! strncmp (argv[i], "-specs=", 7))
+ || (! strcmp (argv[i], "-ObjC"))
+ || (! strcmp (argv[i], "-fobjC"))
+ || (! strcmp (argv[i], "-ObjC++"))
+ || (! strcmp (argv[i], "-time"))
+ || (! strcmp (argv[i], "-###"))
+ || (! strcmp (argv[i], "-fconstant-cfstrings"))
+ || (! strcmp (argv[i], "-fno-constant-cfstrings"))
+ || (! strcmp (argv[i], "-static-libgcc"))
+ || (! strcmp (argv[i], "-shared-libgcc"))
+ || (! strcmp (argv[i], "-pipe"))
+ )
+ {
+ new_argv[new_argc++] = argv[i];
+ }
+ else if (! strcmp (argv[i], "-save-temps")
+ || ! strcmp (argv[i], "--save-temps"))
+ {
+ new_argv[new_argc++] = argv[i];
+ save_temps_seen = 1;
+ }
+ else if ((! strcmp (argv[i], "-Xlinker"))
+ || (! strcmp (argv[i], "-Xassembler"))
+ || (! strcmp (argv[i], "-Xpreprocessor"))
+ || (! strcmp (argv[i], "-l"))
+ || (! strcmp (argv[i], "-weak_library"))
+ || (! strcmp (argv[i], "-weak_framework"))
+ || (! strcmp (argv[i], "-specs"))
+ || (! strcmp (argv[i], "-framework"))
+ )
+ {
+ new_argv[new_argc++] = argv[i];
+ i++;
+ new_argv[new_argc++] = argv[i];
+ }
+ else if (argv[i][0] == '-' && argv[i][1] != 0)
+ {
+ const char *p = &argv[i][1];
+ int c = *p;
+
+ /* First copy this flag itself. */
+ new_argv[new_argc++] = argv[i];
+
+ if (argv[i][1] == 'M')
+ dash_capital_m_seen = 1;
+
+ /* Now copy this flag's arguments, if any, appropriately. */
+ if ((SWITCH_TAKES_ARG (c) > (p[1] != 0))
+ || WORD_SWITCH_TAKES_ARG (p))
+ {
+ int j = 0;
+ int n_args = WORD_SWITCH_TAKES_ARG (p);
+ if (n_args == 0)
+ {
+ /* Count only the option arguments in separate argv elements. */
+ n_args = SWITCH_TAKES_ARG (c) - (p[1] != 0);
+ }
+ if (i + n_args >= argc)
+ fatal ("argument to `-%s' is missing", p);
+
+
+ while ( j < n_args)
+ {
+ i++;
+ new_argv[new_argc++] = argv[i];
+ j++;
+ }
+ }
+
+ }
+ else
+ {
+ struct input_filename *ifn;
+ new_argv[new_argc++] = argv[i];
+ ifn = (struct input_filename *) malloc (sizeof (struct input_filename));
+ ifn->name = argv[i];
+ ifn->index = i;
+ ifn->next = NULL;
+ num_infiles++;
+
+ if (last_infile)
+ last_infile->next = ifn;
+ else
+ in_files = ifn;
+
+ last_infile = ifn;
+ }
+ }
+
+#if 0
+ if (num_infiles == 0)
+ fatal ("no input files");
+#endif
+
+ if (num_arches > 1)
+ {
+ if (preprocessed_output_request
+ || save_temps_seen
+ || asm_output_request
+ || dash_capital_m_seen)
+ fatal ("-E, -S, -save-temps and -M options are not allowed with multiple -arch flags");
+ }
+ /* If -arch is not present OR Only one -arch is specified.
+ Invoke appropriate compiler driver. FAT build is not required in this
+ case. */
+
+ if (num_arches == 0 || num_arches == 1)
+ {
+
+ /* If no -arch is specified than use host compiler driver. */
+ if (num_arches == 0)
+ new_argv[0] = get_driver_name (get_arch_name (NULL));
+ else if (num_arches == 1)
+ {
+ /* Find compiler driver based on -arch and add approriate
+ -m* argument. */
+ new_argv[0] = get_driver_name (get_arch_name (arches[0]));
+ new_argc = new_argc + add_arch_options (0, new_argv, new_argc);
+ }
+
+
+#ifdef DEBUG
+ printf ("%s: invoking single driver name = %s\n", progname, new_argv[0]);
+#endif
+
+ /* Re insert output file name. */
+ if (output_filename)
+ {
+ new_argv[new_argc++] = "-o";
+ new_argv[new_argc++] = output_filename;
+ }
+
+ /* Add the NULL. */
+ new_argv[new_argc] = NULL;
+
+#ifdef DEBUG
+ debug_command_line (new_argv, new_argc);
+#endif
+
+ pid = pexecute (new_argv[0], (char *const *)new_argv, progname, NULL,
+ &errmsg_fmt, &errmsg_arg, PEXECUTE_SEARCH | PEXECUTE_LAST);
+
+ if (pid == -1)
+ pfatal_pexecute (errmsg_fmt, errmsg_arg);
+
+ ret = do_wait (pid, new_argv[0]);
+ }
+ else
+ {
+ /* Handle multiple -arch . */
+
+ /* If more than one input files are supplied but only one output filename
+ is present then IMA will be used. */
+ if (num_infiles > 1 && !compile_only_request)
+ ima_is_used = 1;
+
+ /* Linker wants to know this in case of multiple -arch. */
+ if (!compile_only_request && !dash_dynamiclib_seen)
+ new_argv[new_argc++] = "-Wl,-arch_multiple";
+
+
+ /* If only one input file is specified OR IMA is used then expected output
+ is one FAT binary. */
+ if (num_infiles == 1 || ima_is_used)
+ {
+ const char *out_file;
+
+ /* Create output file name based on
+ input filename, if required. */
+ if (compile_only_request && !output_filename && num_infiles == 1)
+ out_file = strip_path_and_suffix (in_files->name, ".o");
+ else
+ out_file = (output_filename ? output_filename : final_output);
+
+
+ /* Linker wants to know name of output file using one extra arg. */
+ if (!compile_only_request)
+ {
+ char *oname = (char *)(output_filename ? output_filename : final_output);
+ char *n = malloc (sizeof (char) * (strlen (oname) + 5));
+ strcpy (n, "-Wl,");
+ strcat (n, oname);
+ new_argv[new_argc++] = "-Wl,-final_output";
+ new_argv[new_argc++] = n;
+ }
+
+ /* Compile file(s) for each arch and lipo 'em together. */
+ ret = do_compile (new_argv, new_argc);
+
+ /* Make FAT binary by combining individual output files for each
+ architecture, using 'lipo'. */
+ ret = do_lipo (0, out_file);
+ }
+ else
+ {
+ /* Multiple input files are present and IMA is not used.
+ Which means need to generate multiple FAT files. */
+ ret = do_compile_separately ();
+ ret = do_lipo_separately ();
+ }
+ }
+
+ final_cleanup ();
+ free (curr_dir);
+ return greatest_status;
+}
Modified: apple-local/branches/llvm/fixincludes/ChangeLog
===================================================================
--- apple-local/branches/llvm/fixincludes/ChangeLog 2007-04-30 21:36:53 UTC (rev 126738)
+++ apple-local/branches/llvm/fixincludes/ChangeLog 2007-04-30 22:03:04 UTC (rev 126739)
@@ -1,3 +1,7 @@
+2007-02-04 Mike Stump
+
+ * mkheaders.in: Allow optional isysroot parameter.
+
2005-06-24 Geoffrey Keating
* inclhack.def (AAB_darwin7_9_long_double_funcs): New.
Modified: apple-local/branches/llvm/fixincludes/mkheaders.in
===================================================================
--- apple-local/branches/llvm/fixincludes/mkheaders.in 2007-04-30 21:36:53 UTC (rev 126738)
+++ apple-local/branches/llvm/fixincludes/mkheaders.in 2007-04-30 22:03:04 UTC (rev 126739)
@@ -1,6 +1,7 @@
#!/bin/sh
-# Copyright (C) 2002 Free Software Foundation, Inc.
+# APPLE LOCAL mainline
+# Copyright (C) 2002, 2007 Free Software Foundation, Inc.
#This file is part of GCC.
@@ -32,7 +33,8 @@
export VERBOSE
if [ x$1 = x--help ] ; then
- echo "Usage: mkheaders [options] [prefix]"
+ # APPLE LOCAL mainline
+ echo "Usage: mkheaders [options] [prefix [isysroot]]"
echo "Options:"
echo " -v Print more output (may be repeated for even more output)"
echo " --help This help"
@@ -42,7 +44,8 @@
if [ x$1 = x--version ] ; then
echo "mkheaders (GCC) version $version"
- echo "Copyright 2002 Free Software Foundation, Inc."
+ # APPLE LOCAL mainline
+ echo "Copyright 2002, 2007 Free Software Foundation, Inc."
echo "This program is free software; you may redistribute it under the"
echo "terms of the GNU General Public License. This program has"
echo "absolutely no warranty."
@@ -52,9 +55,22 @@
# Common prefix for installation directories.
if [ x$1 != x ] ; then
prefix=$1
+ # APPLE LOCAL mainline
+ shift
else
prefix=@prefix@
fi
+
+# APPLE LOCAL begin mainline
+# Allow for alternate isysroot in which to find headers
+if [ x$1 != x ] ; then
+ isysroot=$1
+ shift
+else
+ isysroot=
+fi
+# APPLE LOCAL end mainline
+
# Directory in which to put host dependent programs and libraries
exec_prefix=@exec_prefix@
# Directory in which to put the directories used by the compiler.
@@ -74,11 +90,12 @@
cd ${itoolsdir}
rm -rf ${incdir}/*
+# APPLE LOCAL begin mainline
if [ x${STMP_FIXINC} != x ] ; then
TARGET_MACHINE="${target}" target_canonical="${target}" \
MACRO_LIST="${itoolsdatadir}/macro_list" \
@SHELL@ ./fixinc.sh ${incdir} \
- ${SYSTEM_HEADER_DIR} ${OTHER_FIXINCLUDES_DIRS}
+ ${isysroot}${SYSTEM_HEADER_DIR} ${OTHER_FIXINCLUDES_DIRS}
rm -f ${incdir}/syslimits.h
if [ -f ${incdir}/limits.h ]; then
mv ${incdir}/limits.h ${incdir}/syslimits.h
@@ -92,5 +109,6 @@
if [ x${STMP_FIXPROTO} != x ] ; then
mkinstalldirs="@SHELL@ ${itoolsdir}/mkinstalldirs"
export FIXPROTO_DEFINES mkinstalldirs
- @SHELL@ fixproto ${incdir} ${incdir} ${SYSTEM_HEADER_DIR} || exit 1
+ @SHELL@ fixproto ${incdir} ${incdir} ${isysroot}${SYSTEM_HEADER_DIR} || exit 1
fi
+# APPLE LOCAL end mainline
Modified: apple-local/branches/llvm/gcc/ChangeLog
===================================================================
--- apple-local/branches/llvm/gcc/ChangeLog 2007-04-30 21:36:53 UTC (rev 126738)
+++ apple-local/branches/llvm/gcc/ChangeLog 2007-04-30 22:03:04 UTC (rev 126739)
@@ -1,3 +1,127 @@
+2007-04-09 Jan Hubicka
+
+ Radar 5097839
+ PR target/27869
+ * config/i386/sse.md
+ (sse_vmaddv4sf3, sse_vmmulv4sf3): Remove '%' modifier.
+ (sse_vmsmaxv4sf3_finite, sse_vmsminv4sf3_finite): Remove.
+ (sse2_vmaddv2df3, sse2_vmmulv2df3): Remove '%' modifier.
+ (sse2_vmsmaxv2df3_finite, sse2_vmsminv2df3_finite): Remove.
+
+2007-03-28 Mike Stump
+
+ Radar 5077358
+ * config/darwin9.h (ASM_OUTPUT_ALIGNED_COMMON): Add.
+ * config/darwin.h (MAX_OFILE_ALIGNMENT): Fix.
+ * config/rs6000/darwin.h (ASM_OUTPUT_ALIGNED_COMMON): Removed #undef.
+
+2006-12-13 Geoffrey Keating
+
+ Radar 4697325
+ * doc/invoke.texi (Darwin Options): Update documentation for
+ -mmacosx-version-min.
+ * config.gcc (*-*-darwin*): Set extra_gcc_objs.
+ * config/darwin-driver.c: New file.
+ * config/darwin.h (GCC_DRIVER_HOST_INITIALIZATION): New.
+ * config/t-darwin (darwin-driver.o): New rule.
+
+2006-12-12 Geoffrey Keating
+
+ * mips-tdump.c: Replace CROSS_COMPILE with
+ CROSS_DIRECTORY_STRUCTURE.
+ * mips-tfile.c: Likewise.
+ * gcc.c: Likewise.
+ * configure.ac: Likewise.
+ * cppdefault.c: Likewise.
+ * Makefile.in: Likewise.
+ * config/alpha/osf.h: Likewise.
+ * config/i386/cygwin.h: Likewise.
+ * config/i386/beos-elf.h: Likewise.
+ * config/i386/nto.h: Likewise.
+ * config/fr30/fr30.h: Likewise.
+ * config/svr4.h: Likewise.
+ * config/rs6000/aix.h: Likewise.
+ * config/rs6000/sysv4.h: Likewise.
+ * config/pa/pa64-hpux.h: Likewise.
+ * config/pa/pa-hpux10.h: Likewise.
+ * config/pa/pa-hpux11.h: Likewise.
+ * collect2.c: Likewise.
+ * configure: Regenerate.
+
+2007-03-13 Geoffrey Keating
+
+ * doc/invoke.texi (Spec Files): Update for '%{,' spec.
+
From clattner at apple.com Mon Apr 30 17:22:13 2007
From: clattner at apple.com (Chris Lattner)
Date: Mon, 30 Apr 2007 15:22:13 -0700
Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/ELFRelocation.h
In-Reply-To: <200704302041.l3UKfcR8025811@zion.cs.uiuc.edu>
References: <200704302041.l3UKfcR8025811@zion.cs.uiuc.edu>
Message-ID: <07AB8B75-4A19-4A19-8DF2-09F47018CC34@apple.com>
>
> Header file for ELF relocations.
Oooh cool
> + #ifndef LLVM_CODEGEN_ELF_RELOCATION_H
> + #define LLVM_CODEGEN_ELF_RELOCATION_H
Please #include "llvm/Support/DataTypes.h", since this file uses
int64_t etc.
> +
> + namespace llvm {
...
> + ELFRelocation(uint64_t off, uint32_t sym, uint32_t type,
> + bool rela = true, int64_t addend = 0) :
> + r_offset(off), r_symidx(sym), r_type(type),
> + r_add(addend), r_rela(rela) {}
> + };
> +
> + } // end llvm namespace
> +
> + #endif // LLVM_CODEGEN_ELF_RELOCATION_H
> \ No newline at end of file
Please add a newline at eof :)
-Chris
From bwendlin at apple.com Mon Apr 30 17:37:52 2007
From: bwendlin at apple.com (bwendlin at apple.com)
Date: Mon, 30 Apr 2007 15:37:52 -0700 (PDT)
Subject: [llvm-commits] [126740] Don't strip the libstdc++.dylib thingy.
Message-ID: <20070430223752.ADFA74C5D19@src>
Revision: 126740
Author: bwendlin
Date: 2007-04-30 15:37:52 -0700 (Mon, 30 Apr 2007)
Log Message:
-----------
Don't strip the libstdc++.dylib thingy.
Modified Paths:
--------------
apple-local/branches/llvm/build_gcc
Modified: apple-local/branches/llvm/build_gcc
===================================================================
--- apple-local/branches/llvm/build_gcc 2007-04-30 22:03:04 UTC (rev 126739)
+++ apple-local/branches/llvm/build_gcc 2007-04-30 22:37:52 UTC (rev 126740)
@@ -457,7 +457,8 @@
cp -p /usr/lib/libstdc++.6.dylib \
.$DEST_ROOT/lib/gcc/$t-apple-darwin$DARWIN_VERS/$VERS/libstdc++.dylib \
|| exit 1
- strip -x -c .$DEST_ROOT/lib/gcc/$t-apple-darwin$DARWIN_VERS/$VERS/libstdc++.dylib || exit 1
+# APPLE LOCAL LLVM
+# strip -x -c .$DEST_ROOT/lib/gcc/$t-apple-darwin$DARWIN_VERS/$VERS/libstdc++.dylib || exit 1
done
# include
From sabre at nondot.org Mon Apr 30 18:13:12 2007
From: sabre at nondot.org (Chris Lattner)
Date: Mon, 30 Apr 2007 18:13:12 -0500
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/MachineBasicBlock.cpp
Message-ID: <200704302313.l3UNDCr7028978@zion.cs.uiuc.edu>
Changes in directory llvm/lib/CodeGen:
MachineBasicBlock.cpp updated: 1.43 -> 1.44
---
Log message:
print isLandingPad() for MBBs
---
Diffs of the changes: (+5 -3)
MachineBasicBlock.cpp | 8 +++++---
1 files changed, 5 insertions(+), 3 deletions(-)
Index: llvm/lib/CodeGen/MachineBasicBlock.cpp
diff -u llvm/lib/CodeGen/MachineBasicBlock.cpp:1.43 llvm/lib/CodeGen/MachineBasicBlock.cpp:1.44
--- llvm/lib/CodeGen/MachineBasicBlock.cpp:1.43 Fri Mar 9 02:29:08 2007
+++ llvm/lib/CodeGen/MachineBasicBlock.cpp Mon Apr 30 18:12:53 2007
@@ -111,9 +111,11 @@
const BasicBlock *LBB = getBasicBlock();
OS << "\n";
- if (LBB) OS << LBB->getName();
- OS << " (" << (const void*)this
- << ", LLVM BB @" << (const void*) LBB << ", ID#" << getNumber()<< "):\n";
+ if (LBB) OS << LBB->getName() << ": ";
+ OS << (const void*)this
+ << ", LLVM BB @" << (const void*) LBB << ", ID#" << getNumber();
+ if (isLandingPad()) OS << ", EH LANDING PAD";
+ OS << ":\n";
const MRegisterInfo *MRI = MF->getTarget().getRegisterInfo();
if (livein_begin() != livein_end()) {
From sabre at nondot.org Mon Apr 30 18:35:05 2007
From: sabre at nondot.org (Chris Lattner)
Date: Mon, 30 Apr 2007 18:35:05 -0500
Subject: [llvm-commits] CVS:
llvm/test/CodeGen/Generic/2007-04-30-LandingPadBranchFolding.ll
Message-ID: <200704302335.l3UNZ5nh029526@zion.cs.uiuc.edu>
Changes in directory llvm/test/CodeGen/Generic:
2007-04-30-LandingPadBranchFolding.ll added (r1.1)
---
Log message:
testcase for PR1228: http://llvm.org/PR1228
---
Diffs of the changes: (+59 -0)
2007-04-30-LandingPadBranchFolding.ll | 59 ++++++++++++++++++++++++++++++++++
1 files changed, 59 insertions(+)
Index: llvm/test/CodeGen/Generic/2007-04-30-LandingPadBranchFolding.ll
diff -c /dev/null llvm/test/CodeGen/Generic/2007-04-30-LandingPadBranchFolding.ll:1.1
*** /dev/null Mon Apr 30 18:34:56 2007
--- llvm/test/CodeGen/Generic/2007-04-30-LandingPadBranchFolding.ll Mon Apr 30 18:34:46 2007
***************
*** 0 ****
--- 1,59 ----
+ ; RUN: llvm-as < %s | llc
+ ; PR1228
+
+ "struct.std::basic_string,std::allocator >::_Alloc_hider" = type { i8* }
+ "struct.std::locale" = type { "struct.std::locale::_Impl"* }
+ "struct.std::locale::_Impl" = type { i32, "struct.std::locale::facet"**, i32, "struct.std::locale::facet"**, i8** }
+ "struct.std::locale::facet" = type { i32 (...)**, i32 }
+ "struct.std::string" = type { "struct.std::basic_string,std::allocator >::_Alloc_hider" }
+
+ define void @_ZNKSt6locale4nameEv("struct.std::string"* %agg.result) {
+ entry:
+ %tmp105 = icmp eq i8* null, null ; [#uses=1]
+ br i1 %tmp105, label %cond_true, label %cond_true222
+
+ cond_true: ; preds = %entry
+ invoke void @_ZNSs14_M_replace_auxEjjjc( )
+ to label %cond_next1328 unwind label %cond_true1402
+
+ cond_true222: ; preds = %cond_true222, %entry
+ %tmp207 = call i32 @strcmp( ) ; [#uses=1]
+ %tmp208 = icmp eq i32 %tmp207, 0 ; [#uses=2]
+ %bothcond1480 = and i1 %tmp208, false ; [#uses=1]
+ br i1 %bothcond1480, label %cond_true222, label %cond_next226.loopexit
+
+ cond_next226.loopexit: ; preds = %cond_true222
+ %phitmp = xor i1 %tmp208, true ; [#uses=1]
+ br i1 %phitmp, label %cond_false280, label %cond_true235
+
+ cond_true235: ; preds = %cond_next226.loopexit
+ invoke void @_ZNSs6assignEPKcj( )
+ to label %cond_next1328 unwind label %cond_true1402
+
+ cond_false280: ; preds = %cond_next226.loopexit
+ invoke void @_ZNSs7reserveEj( )
+ to label %invcont282 unwind label %cond_true1402
+
+ invcont282: ; preds = %cond_false280
+ invoke void @_ZNSs6appendEPKcj( )
+ to label %invcont317 unwind label %cond_true1402
+
+ invcont317: ; preds = %invcont282
+ ret void
+
+ cond_next1328: ; preds = %cond_true235, %cond_true
+ ret void
+
+ cond_true1402: ; preds = %invcont282, %cond_false280, %cond_true235, %cond_true
+ ret void
+ }
+
+ declare void @_ZNSs14_M_replace_auxEjjjc()
+
+ declare i32 @strcmp()
+
+ declare void @_ZNSs6assignEPKcj()
+
+ declare void @_ZNSs7reserveEj()
+
+ declare void @_ZNSs6appendEPKcj()
From sabre at nondot.org Mon Apr 30 18:35:19 2007
From: sabre at nondot.org (Chris Lattner)
Date: Mon, 30 Apr 2007 18:35:19 -0500
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/BranchFolding.cpp
Message-ID: <200704302335.l3UNZJd2029566@zion.cs.uiuc.edu>
Changes in directory llvm/lib/CodeGen:
BranchFolding.cpp updated: 1.45 -> 1.46
---
Log message:
Fix PR1228: http://llvm.org/PR1228 and CodeGen/Generic/2007-04-30-LandingPadBranchFolding.ll
---
Diffs of the changes: (+8 -2)
BranchFolding.cpp | 10 ++++++++--
1 files changed, 8 insertions(+), 2 deletions(-)
Index: llvm/lib/CodeGen/BranchFolding.cpp
diff -u llvm/lib/CodeGen/BranchFolding.cpp:1.45 llvm/lib/CodeGen/BranchFolding.cpp:1.46
--- llvm/lib/CodeGen/BranchFolding.cpp:1.45 Tue Mar 20 16:35:06 2007
+++ llvm/lib/CodeGen/BranchFolding.cpp Mon Apr 30 18:35:00 2007
@@ -877,7 +877,7 @@
// Now we know that there was no fall-through into this block, check to
// see if it has a fall-through into its successor.
bool CurFallsThru = CanFallThrough(MBB, CurUnAnalyzable, CurTBB, CurFBB,
- CurCond);
+ CurCond);
if (!MBB->isLandingPad()) {
// Check all the predecessors of this block. If one of them has no fall
@@ -914,7 +914,13 @@
MachineBasicBlock *SuccBB = *SI;
MachineFunction::iterator SuccPrev = SuccBB; --SuccPrev;
std::vector SuccPrevCond;
- if (SuccBB != MBB && !CanFallThrough(SuccPrev)) {
+
+ // If this block doesn't already fall-through to that successor, and if
+ // the succ doesn't already have a block that can fall through into it,
+ // and if the successor isn't an EH destination, we can arrange for the
+ // fallthrough to happen.
+ if (SuccBB != MBB && !CanFallThrough(SuccPrev) &&
+ !SuccBB->isLandingPad()) {
MBB->moveBefore(SuccBB);
MadeChange = true;
return OptimizeBlock(MBB);
From christopher.lamb at gmail.com Mon Apr 30 18:54:30 2007
From: christopher.lamb at gmail.com (Christopher Lamb)
Date: Mon, 30 Apr 2007 18:54:30 -0500
Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/ELFRelocation.h
Message-ID: <200704302354.l3UNsUro030067@zion.cs.uiuc.edu>
Changes in directory llvm/include/llvm/CodeGen:
ELFRelocation.h updated: 1.1 -> 1.2
---
Log message:
Implement review feedback.
---
Diffs of the changes: (+4 -1)
ELFRelocation.h | 5 ++++-
1 files changed, 4 insertions(+), 1 deletion(-)
Index: llvm/include/llvm/CodeGen/ELFRelocation.h
diff -u llvm/include/llvm/CodeGen/ELFRelocation.h:1.1 llvm/include/llvm/CodeGen/ELFRelocation.h:1.2
--- llvm/include/llvm/CodeGen/ELFRelocation.h:1.1 Mon Apr 30 15:41:08 2007
+++ llvm/include/llvm/CodeGen/ELFRelocation.h Mon Apr 30 18:54:10 2007
@@ -14,6 +14,8 @@
#ifndef LLVM_CODEGEN_ELF_RELOCATION_H
#define LLVM_CODEGEN_ELF_RELOCATION_H
+#include "llvm/Support/DataTypes.h"
+
namespace llvm {
/// ELFRelocation - This class contains all the information necessary to
@@ -46,4 +48,5 @@
} // end llvm namespace
-#endif // LLVM_CODEGEN_ELF_RELOCATION_H
\ No newline at end of file
+#endif // LLVM_CODEGEN_ELF_RELOCATION_H
+
From evan.cheng at apple.com Mon Apr 30 19:38:39 2007
From: evan.cheng at apple.com (Evan Cheng)
Date: Mon, 30 Apr 2007 19:38:39 -0500
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Message-ID: <200705010038.l410ccOi031037@zion.cs.uiuc.edu>
Changes in directory llvm/lib/CodeGen/SelectionDAG:
DAGCombiner.cpp updated: 1.296 -> 1.297
---
Log message:
* Only turn a load to UNDEF if all of its outputs have no uses (indexed loads
produce two results.)
* Do not touch volatile loads.
---
Diffs of the changes: (+20 -5)
DAGCombiner.cpp | 25 ++++++++++++++++++++-----
1 files changed, 20 insertions(+), 5 deletions(-)
Index: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.296 llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.297
--- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.296 Sun Apr 22 18:15:30 2007
+++ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Mon Apr 30 19:38:21 2007
@@ -3326,11 +3326,26 @@
LoadSDNode *LD = cast(N);
SDOperand Chain = LD->getChain();
SDOperand Ptr = LD->getBasePtr();
-
- // If there are no uses of the loaded value, change uses of the chain value
- // into uses of the chain input (i.e. delete the dead load).
- if (N->hasNUsesOfValue(0, 0))
- return CombineTo(N, DAG.getNode(ISD::UNDEF, N->getValueType(0)), Chain);
+
+ // If load is not volatile and there are no uses of the loaded value (and
+ // the updated indexed value in case of indexed loads), change uses of the
+ // chain value into uses of the chain input (i.e. delete the dead load).
+ if (!LD->isVolatile()) {
+ bool HasUses = false;
+ SmallVector VTs;
+ for (unsigned i = 0, e = N->getNumValues(); i != e; ++i) {
+ if (!N->hasNUsesOfValue(0, i)) {
+ HasUses = true;
+ break;
+ }
+ VTs.push_back(N->getValueType(i));
+ }
+ if (!HasUses) {
+ SmallVector Ops;
+ return CombineTo(N, DAG.getNode(ISD::UNDEF, &VTs[0], VTs.size(), 0, 0),
+ Chain);
+ }
+ }
// If this load is directly stored, replace the load value with the stored
// value.
From evan.cheng at apple.com Mon Apr 30 19:40:57 2007
From: evan.cheng at apple.com (Evan Cheng)
Date: Mon, 30 Apr 2007 19:40:57 -0500
Subject: [llvm-commits] CVS:
llvm/test/CodeGen/ARM/2007-04-30-CombinerCrash.ll
Message-ID: <200705010040.l410evM8031092@zion.cs.uiuc.edu>
Changes in directory llvm/test/CodeGen/ARM:
2007-04-30-CombinerCrash.ll added (r1.1)
---
Log message:
Test a dag combiner crasher.
---
Diffs of the changes: (+32 -0)
2007-04-30-CombinerCrash.ll | 32 ++++++++++++++++++++++++++++++++
1 files changed, 32 insertions(+)
Index: llvm/test/CodeGen/ARM/2007-04-30-CombinerCrash.ll
diff -c /dev/null llvm/test/CodeGen/ARM/2007-04-30-CombinerCrash.ll:1.1
*** /dev/null Mon Apr 30 19:40:48 2007
--- llvm/test/CodeGen/ARM/2007-04-30-CombinerCrash.ll Mon Apr 30 19:40:38 2007
***************
*** 0 ****
--- 1,32 ----
+ ; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin -mattr=+v6,+vfp2
+
+ target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64"
+ target triple = "arm-apple-darwin8"
+ %struct.CHESS_POSITION = type { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i32, i32, i8, i8, [64 x i8], i8, i8, i8, i8, i8 }
+ @search = external global %struct.CHESS_POSITION ; <%struct.CHESS_POSITION*> [#uses=3]
+ @file_mask = external global [8 x i64] ; <[8 x i64]*> [#uses=1]
+ @rank_mask.1.b = external global i1 ; [#uses=1]
+
+ define fastcc void @EvaluateDevelopment() {
+ entry:
+ %tmp7 = load i64* getelementptr (%struct.CHESS_POSITION* @search, i32 0, i32 7) ; [#uses=1]
+ %tmp50 = load i64* getelementptr (%struct.CHESS_POSITION* @search, i32 0, i32 0) ; [#uses=1]
+ %tmp52 = load i64* getelementptr (%struct.CHESS_POSITION* @search, i32 0, i32 1) ; [#uses=1]
+ %tmp53 = or i64 %tmp52, %tmp50 ; [#uses=1]
+ %tmp57.b = load i1* @rank_mask.1.b ; [#uses=1]
+ %tmp57 = select i1 %tmp57.b, i64 71776119061217280, i64 0 ; [#uses=1]
+ %tmp58 = and i64 %tmp57, %tmp7 ; [#uses=1]
+ %tmp59 = lshr i64 %tmp58, 8 ; [#uses=1]
+ %tmp63 = load i64* getelementptr ([8 x i64]* @file_mask, i32 0, i32 4) ; [#uses=1]
+ %tmp64 = or i64 %tmp63, 0 ; [#uses=1]
+ %tmp65 = and i64 %tmp59, %tmp53 ; [#uses=1]
+ %tmp66 = and i64 %tmp65, %tmp64 ; [#uses=1]
+ %tmp67 = icmp eq i64 %tmp66, 0 ; [#uses=1]
+ br i1 %tmp67, label %cond_next145, label %cond_true70
+
+ cond_true70: ; preds = %entry
+ ret void
+
+ cond_next145: ; preds = %entry
+ ret void
+ }
From evan.cheng at apple.com Mon Apr 30 19:48:03 2007
From: evan.cheng at apple.com (Evan Cheng)
Date: Mon, 30 Apr 2007 19:48:03 -0500
Subject: [llvm-commits] CVS: llvm/include/llvm/Target/MRegisterInfo.h
Message-ID: <200705010048.l410m3k2031215@zion.cs.uiuc.edu>
Changes in directory llvm/include/llvm/Target:
MRegisterInfo.h updated: 1.107 -> 1.108
---
Log message:
Added hook hasReservedCallFrame(). It returns true if the call frame is
included as part of the stack frame.
---
Diffs of the changes: (+9 -0)
MRegisterInfo.h | 9 +++++++++
1 files changed, 9 insertions(+)
Index: llvm/include/llvm/Target/MRegisterInfo.h
diff -u llvm/include/llvm/Target/MRegisterInfo.h:1.107 llvm/include/llvm/Target/MRegisterInfo.h:1.108
--- llvm/include/llvm/Target/MRegisterInfo.h:1.107 Wed Apr 25 02:24:50 2007
+++ llvm/include/llvm/Target/MRegisterInfo.h Mon Apr 30 19:47:46 2007
@@ -451,6 +451,15 @@
/// variable sized allocas or if frame pointer elimination is disabled.
virtual bool hasFP(const MachineFunction &MF) const = 0;
+ // hasReservedCallFrame - Under normal circumstances, when a frame pointer is
+ // not required, we reserve argument space for call sites in the function
+ // immediately on entry to the current function. This eliminates the need for
+ // add/sub sp brackets around call sites. Returns true if the call frame is
+ // included as part of the stack frame.
+ virtual bool hasReservedCallFrame(MachineFunction &MF) const {
+ return !hasFP(MF);
+ }
+
/// getCallFrameSetup/DestroyOpcode - These methods return the opcode of the
/// frame setup/destroy instructions if they exist (-1 otherwise). Some
/// targets use pseudo instructions in order to abstract away the difference
From evan.cheng at apple.com Mon Apr 30 19:51:48 2007
From: evan.cheng at apple.com (Evan Cheng)
Date: Mon, 30 Apr 2007 19:51:48 -0500
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/PrologEpilogInserter.cpp
Message-ID: <200705010051.l410pmW5031285@zion.cs.uiuc.edu>
Changes in directory llvm/lib/CodeGen:
PrologEpilogInserter.cpp updated: 1.82 -> 1.83
---
Log message:
Under normal circumstances, when a frame pointer is not required, we reserve
argument space for call sites in the function immediately on entry to the
current function. This eliminates the need for add/sub sp brackets around call
sites. However, this is not always a good idea. If the "call frame" is large and
the target load / store instructions have small immediate field to encode sp
offset, this can cause poor codegen. In the worst case, this can make it
impossible to scavenge a register if the reserved spill slot is pushed too far
apart from sp / fp.
---
Diffs of the changes: (+14 -17)
PrologEpilogInserter.cpp | 31 ++++++++++++++-----------------
1 files changed, 14 insertions(+), 17 deletions(-)
Index: llvm/lib/CodeGen/PrologEpilogInserter.cpp
diff -u llvm/lib/CodeGen/PrologEpilogInserter.cpp:1.82 llvm/lib/CodeGen/PrologEpilogInserter.cpp:1.83
--- llvm/lib/CodeGen/PrologEpilogInserter.cpp:1.82 Wed Apr 25 17:11:48 2007
+++ llvm/lib/CodeGen/PrologEpilogInserter.cpp Mon Apr 30 19:51:28 2007
@@ -135,8 +135,9 @@
unsigned MaxCallFrameSize = 0;
bool HasCalls = false;
+ std::vector FrameSDOps;
for (MachineFunction::iterator BB = Fn.begin(), E = Fn.end(); BB != E; ++BB)
- for (MachineBasicBlock::iterator I = BB->begin(); I != BB->end(); )
+ for (MachineBasicBlock::iterator I = BB->begin(); I != BB->end(); ++I)
if (I->getOpcode() == FrameSetupOpcode ||
I->getOpcode() == FrameDestroyOpcode) {
assert(I->getNumOperands() >= 1 && "Call Frame Setup/Destroy Pseudo"
@@ -144,14 +145,16 @@
unsigned Size = I->getOperand(0).getImmedValue();
if (Size > MaxCallFrameSize) MaxCallFrameSize = Size;
HasCalls = true;
- RegInfo->eliminateCallFramePseudoInstr(Fn, *BB, I++);
- } else {
- ++I;
+ FrameSDOps.push_back(I);
}
MachineFrameInfo *FFI = Fn.getFrameInfo();
FFI->setHasCalls(HasCalls);
FFI->setMaxCallFrameSize(MaxCallFrameSize);
+ for (unsigned i = 0, e = FrameSDOps.size(); i != e; ++i) {
+ MachineBasicBlock::iterator I = FrameSDOps[i];
+ RegInfo->eliminateCallFramePseudoInstr(Fn, *I->getParent(), I);
+ }
// Now figure out which *callee saved* registers are modified by the current
// function, thus needing to be saved and restored in the prolog/epilog.
@@ -333,10 +336,7 @@
// First assign frame offsets to stack objects that are used to spill
// callee saved registers.
if (StackGrowsDown) {
- for (unsigned i = 0, e = FFI->getObjectIndexEnd(); i != e; ++i) {
- if (i < MinCSFrameIndex || i > MaxCSFrameIndex)
- continue;
-
+ for (unsigned i = MinCSFrameIndex; i <= MaxCSFrameIndex; ++i) {
// If stack grows down, we need to add size of find the lowest
// address of the object.
Offset += FFI->getObjectSize(i);
@@ -351,10 +351,7 @@
FFI->setObjectOffset(i, -Offset); // Set the computed offset
}
} else {
- for (int i = FFI->getObjectIndexEnd()-1; i >= 0; --i) {
- if ((unsigned)i < MinCSFrameIndex || (unsigned)i > MaxCSFrameIndex)
- continue;
-
+ for (unsigned i = MaxCSFrameIndex; i >= MinCSFrameIndex; --i) {
unsigned Align = FFI->getObjectAlignment(i);
// If the alignment of this object is greater than that of the stack, then
// increase the stack alignment to match.
@@ -373,7 +370,7 @@
if (RS && RegInfo->hasFP(Fn)) {
int SFI = RS->getScavengingFrameIndex();
if (SFI >= 0) {
- // If stack grows down, we need to add size of find the lowest
+ // If stack grows down, we need to add size of the lowest
// address of the object.
if (StackGrowsDown)
Offset += FFI->getObjectSize(SFI);
@@ -447,10 +444,10 @@
// subroutines have their stack frames suitable aligned.
if (!RegInfo->targetHandlesStackFrameRounding() &&
(FFI->hasCalls() || FFI->hasVarSizedObjects())) {
- // When we have no frame pointer, we reserve argument space for call sites
- // in the function immediately on entry to the current function. This
- // eliminates the need for add/sub sp brackets around call sites.
- if (!RegInfo->hasFP(Fn))
+ // If we have reserved argument space for call sites in the function
+ // immediately on entry to the current function, count it as part of the
+ // overall stack size.
+ if (RegInfo->hasReservedCallFrame(Fn))
Offset += FFI->getMaxCallFrameSize();
unsigned AlignMask = TFI.getStackAlignment() - 1;
From evan.cheng at apple.com Mon Apr 30 19:52:26 2007
From: evan.cheng at apple.com (Evan Cheng)
Date: Mon, 30 Apr 2007 19:52:26 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/ARM/ARMRegisterInfo.cpp
ARMRegisterInfo.h
Message-ID: <200705010052.l410qQVu031311@zion.cs.uiuc.edu>
Changes in directory llvm/lib/Target/ARM:
ARMRegisterInfo.cpp updated: 1.90 -> 1.91
ARMRegisterInfo.h updated: 1.17 -> 1.18
---
Log message:
Under normal circumstances, when a frame pointer is not required, we reserve
argument space for call sites in the function immediately on entry to the
current function. This eliminates the need for add/sub sp brackets around call
sites. However, this is not always a good idea. If the "call frame" is large and
the target load / store instructions have small immediate field to encode sp
offset, this can cause poor codegen. In the worst case, this can make it
impossible to scavenge a register if the reserved spill slot is pushed too far
apart from sp / fp.
---
Diffs of the changes: (+29 -3)
ARMRegisterInfo.cpp | 30 +++++++++++++++++++++++++++---
ARMRegisterInfo.h | 2 ++
2 files changed, 29 insertions(+), 3 deletions(-)
Index: llvm/lib/Target/ARM/ARMRegisterInfo.cpp
diff -u llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.90 llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.91
--- llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.90 Fri Apr 27 15:10:08 2007
+++ llvm/lib/Target/ARM/ARMRegisterInfo.cpp Mon Apr 30 19:52:08 2007
@@ -386,6 +386,29 @@
return NoFramePointerElim || MF.getFrameInfo()->hasVarSizedObjects();
}
+// hasReservedCallFrame - Under normal circumstances, when a frame pointer is
+// not required, we reserve argument space for call sites in the function
+// immediately on entry to the current function. This eliminates the need for
+// add/sub sp brackets around call sites. Returns true if the call frame is
+// included as part of the stack frame.
+bool ARMRegisterInfo::hasReservedCallFrame(MachineFunction &MF) const {
+ const MachineFrameInfo *FFI = MF.getFrameInfo();
+ unsigned CFSize = FFI->getMaxCallFrameSize();
+ ARMFunctionInfo *AFI = MF.getInfo();
+ // It's not always a good idea to include the call frame as part of the
+ // stack frame. ARM (especially Thumb) has small immediate offset to
+ // address the stack frame. So a large call frame can cause poor codegen
+ // and may even makes it impossible to scavenge a register.
+ if (AFI->isThumbFunction()) {
+ if (CFSize >= ((1 << 8) - 1) * 4 / 2) // Half of imm8 * 4
+ return false;
+ } else {
+ if (CFSize >= ((1 << 12) - 1) / 2) // Half of imm12
+ return false;
+ }
+ return !hasFP(MF);
+}
+
/// emitARMRegPlusImmediate - Emits a series of instructions to materialize
/// a destreg = basereg + immediate in ARM code.
static
@@ -605,7 +628,7 @@
void ARMRegisterInfo::
eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
MachineBasicBlock::iterator I) const {
- if (hasFP(MF)) {
+ if (!hasReservedCallFrame(MF)) {
// If we have alloca, convert as follows:
// ADJCALLSTACKDOWN -> sub, sp, sp, amount
// ADJCALLSTACKUP -> add, sp, sp, amount
@@ -1146,8 +1169,9 @@
Limit = (1 << 8) - 1;
goto DoneEstimating;
} else if (AddrMode == ARMII::AddrMode5) {
- Limit = ((1 << 8) - 1) * 4;
- goto DoneEstimating;
+ unsigned ThisLimit = ((1 << 8) - 1) * 4;
+ if (ThisLimit < Limit)
+ Limit = ThisLimit;
}
}
}
Index: llvm/lib/Target/ARM/ARMRegisterInfo.h
diff -u llvm/lib/Target/ARM/ARMRegisterInfo.h:1.17 llvm/lib/Target/ARM/ARMRegisterInfo.h:1.18
--- llvm/lib/Target/ARM/ARMRegisterInfo.h:1.17 Tue Mar 20 03:07:04 2007
+++ llvm/lib/Target/ARM/ARMRegisterInfo.h Mon Apr 30 19:52:08 2007
@@ -78,6 +78,8 @@
bool hasFP(const MachineFunction &MF) const;
+ bool hasReservedCallFrame(MachineFunction &MF) const;
+
void eliminateCallFramePseudoInstr(MachineFunction &MF,
MachineBasicBlock &MBB,
MachineBasicBlock::iterator I) const;
From sabre at nondot.org Mon Apr 30 21:12:23 2007
From: sabre at nondot.org (Chris Lattner)
Date: Mon, 30 Apr 2007 21:12:23 -0500
Subject: [llvm-commits] CVS: llvm/include/llvm/Bitcode/LLVMBitCodes.h
Message-ID: <200705010212.l412CNGX032621@zion.cs.uiuc.edu>
Changes in directory llvm/include/llvm/Bitcode:
LLVMBitCodes.h updated: 1.9 -> 1.10
---
Log message:
add missing opcode.
---
Diffs of the changes: (+10 -9)
LLVMBitCodes.h | 19 ++++++++++---------
1 files changed, 10 insertions(+), 9 deletions(-)
Index: llvm/include/llvm/Bitcode/LLVMBitCodes.h
diff -u llvm/include/llvm/Bitcode/LLVMBitCodes.h:1.9 llvm/include/llvm/Bitcode/LLVMBitCodes.h:1.10
--- llvm/include/llvm/Bitcode/LLVMBitCodes.h:1.9 Sun Apr 29 16:49:05 2007
+++ llvm/include/llvm/Bitcode/LLVMBitCodes.h Mon Apr 30 21:12:05 2007
@@ -164,20 +164,21 @@
FUNC_CODE_INST_SHUFFLEVEC = 8, // SHUFFLEVEC: [ty, opval, opval, opval]
FUNC_CODE_INST_CMP = 9, // CMP: [opty, opval, opval, pred]
- FUNC_CODE_INST_RET = 10, // RET: [opval]
+ FUNC_CODE_INST_RET = 10, // RET: [opty,opval]
FUNC_CODE_INST_BR = 11, // BR: [opval, bb#, bb#] or [bb#]
FUNC_CODE_INST_SWITCH = 12, // SWITCH: [opty, opval, n, n x ops]
- FUNC_CODE_INST_INVOKE = 13, // INVOKE:
+ FUNC_CODE_INST_INVOKE = 13, // INVOKE: [fnty, op0,op1,op2, ...]
FUNC_CODE_INST_UNWIND = 14, // UNWIND
FUNC_CODE_INST_UNREACHABLE = 15, // UNREACHABLE
- FUNC_CODE_INST_MALLOC = 16, // MALLOC: ..
- FUNC_CODE_INST_FREE = 17, // FREE: ..
- FUNC_CODE_INST_ALLOCA = 18, // ALLOCA: ..
- FUNC_CODE_INST_LOAD = 19, // LOAD: ..
- FUNC_CODE_INST_STORE = 20, // STORE: ..
- FUNC_CODE_INST_CALL = 21, // CALL: ..
- FUNC_CODE_INST_VAARG = 22 // VAARG: ..
+ FUNC_CODE_INST_PHI = 16, // PHI: [ty, #ops, val0,bb0, ...]
+ FUNC_CODE_INST_MALLOC = 17, // MALLOC: [instty, op, align]
+ FUNC_CODE_INST_FREE = 18, // FREE: [opty, op]
+ FUNC_CODE_INST_ALLOCA = 19, // ALLOCA: [instty, op, align]
+ FUNC_CODE_INST_LOAD = 20, // LOAD: [opty, op, align, vol]
+ FUNC_CODE_INST_STORE = 21, // STORE: [ptrty,val,ptr, align, vol]
+ FUNC_CODE_INST_CALL = 22, // CALL: [fnty, fnid, arg0, arg1...]
+ FUNC_CODE_INST_VAARG = 23 // VAARG: [valistty, valist, instty]
};
} // End bitc namespace
} // End llvm namespace
From sabre at nondot.org Mon Apr 30 21:13:43 2007
From: sabre at nondot.org (Chris Lattner)
Date: Mon, 30 Apr 2007 21:13:43 -0500
Subject: [llvm-commits] CVS: llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
Message-ID: <200705010213.l412Dhwv032726@zion.cs.uiuc.edu>
Changes in directory llvm/lib/Bitcode/Writer:
BitcodeWriter.cpp updated: 1.16 -> 1.17
---
Log message:
encode all of the instructions.
---
Diffs of the changes: (+166 -3)
BitcodeWriter.cpp | 169 +++++++++++++++++++++++++++++++++++++++++++++++++++++-
1 files changed, 166 insertions(+), 3 deletions(-)
Index: llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
diff -u llvm/lib/Bitcode/Writer/BitcodeWriter.cpp:1.16 llvm/lib/Bitcode/Writer/BitcodeWriter.cpp:1.17
--- llvm/lib/Bitcode/Writer/BitcodeWriter.cpp:1.16 Sun Apr 29 15:56:48 2007
+++ llvm/lib/Bitcode/Writer/BitcodeWriter.cpp Mon Apr 30 21:13:26 2007
@@ -485,13 +485,12 @@
static void WriteInstruction(const Instruction &I, ValueEnumerator &VE,
BitstreamWriter &Stream,
SmallVector &Vals) {
- return; // FIXME: REMOVE
unsigned Code = 0;
unsigned AbbrevToUse = 0;
switch (I.getOpcode()) {
default:
if (Instruction::isCast(I.getOpcode())) {
- Code = bitc::FUNC_CODE_INST_BINOP;
+ Code = bitc::FUNC_CODE_INST_CAST;
Vals.push_back(GetEncodedCastOpcode(I.getOpcode()));
Vals.push_back(VE.getTypeID(I.getType()));
Vals.push_back(VE.getTypeID(I.getOperand(0)->getType()));
@@ -505,15 +504,179 @@
Vals.push_back(VE.getValueID(I.getOperand(1)));
}
break;
+
+ case Instruction::GetElementPtr:
+ Code = bitc::FUNC_CODE_INST_GEP;
+ Vals.push_back(I.getNumOperands());
+ for (unsigned i = 0, e = I.getNumOperands(); i != e; ++i) {
+ Vals.push_back(VE.getTypeID(I.getOperand(i)->getType()));
+ Vals.push_back(VE.getValueID(I.getOperand(i)));
+ }
+ break;
+ case Instruction::Select:
+ Code = bitc::FUNC_CODE_INST_SELECT;
+ Vals.push_back(VE.getTypeID(I.getType()));
+ Vals.push_back(VE.getValueID(I.getOperand(0)));
+ Vals.push_back(VE.getValueID(I.getOperand(1)));
+ Vals.push_back(VE.getValueID(I.getOperand(2)));
+ break;
+ case Instruction::ExtractElement:
+ Code = bitc::FUNC_CODE_INST_EXTRACTELT;
+ Vals.push_back(VE.getTypeID(I.getOperand(0)->getType()));
+ Vals.push_back(VE.getValueID(I.getOperand(0)));
+ Vals.push_back(VE.getValueID(I.getOperand(1)));
+ break;
+ case Instruction::InsertElement:
+ Code = bitc::FUNC_CODE_INST_INSERTELT;
+ Vals.push_back(VE.getTypeID(I.getType()));
+ Vals.push_back(VE.getValueID(I.getOperand(0)));
+ Vals.push_back(VE.getValueID(I.getOperand(1)));
+ Vals.push_back(VE.getValueID(I.getOperand(2)));
+ break;
+ case Instruction::ShuffleVector:
+ Code = bitc::FUNC_CODE_INST_SHUFFLEVEC;
+ Vals.push_back(VE.getTypeID(I.getType()));
+ Vals.push_back(VE.getValueID(I.getOperand(0)));
+ Vals.push_back(VE.getValueID(I.getOperand(1)));
+ Vals.push_back(VE.getValueID(I.getOperand(2)));
+ break;
+ case Instruction::ICmp:
+ case Instruction::FCmp:
+ Code = bitc::FUNC_CODE_INST_CMP;
+ Vals.push_back(VE.getTypeID(I.getOperand(0)->getType()));
+ Vals.push_back(VE.getValueID(I.getOperand(0)));
+ Vals.push_back(VE.getValueID(I.getOperand(1)));
+ Vals.push_back(cast(I).getPredicate());
+ break;
+
+ case Instruction::Ret:
+ Code = bitc::FUNC_CODE_INST_RET;
+ if (I.getNumOperands()) {
+ Vals.push_back(VE.getTypeID(I.getOperand(0)->getType()));
+ Vals.push_back(VE.getValueID(I.getOperand(0)));
+ }
+ break;
+ case Instruction::Br:
+ Code = bitc::FUNC_CODE_INST_BR;
+ Vals.push_back(VE.getValueID(I.getOperand(0)));
+ if (cast(I).isConditional()) {
+ Vals.push_back(VE.getValueID(I.getOperand(1)));
+ Vals.push_back(VE.getValueID(I.getOperand(2)));
+ }
+ break;
+ case Instruction::Switch:
+ Code = bitc::FUNC_CODE_INST_SWITCH;
+ Vals.push_back(VE.getTypeID(I.getOperand(0)->getType()));
+ Vals.push_back(I.getNumOperands());
+ for (unsigned i = 0, e = I.getNumOperands(); i != e; ++i)
+ Vals.push_back(VE.getValueID(I.getOperand(i)));
+ break;
+ case Instruction::Invoke:
+ Code = bitc::FUNC_CODE_INST_INVOKE;
+ // FIXME: param attrs
+ Vals.push_back(VE.getTypeID(I.getOperand(0)->getType()));
+ Vals.push_back(VE.getValueID(I.getOperand(0))); // callee
+ Vals.push_back(VE.getValueID(I.getOperand(1))); // normal
+ Vals.push_back(VE.getValueID(I.getOperand(2))); // unwind
-
+ // Emit value #'s for the fixed parameters.
+ const PointerType *PTy = cast(I.getOperand(0)->getType());
+ const FunctionType *FTy = cast(PTy->getElementType());
+ for (unsigned i = 0, e = FTy->getNumParams(); i != e; ++i)
+ Vals.push_back(VE.getValueID(I.getOperand(i+3))); // fixed param.
+
+ // Emit type/value pairs for varargs params.
+ if (FTy->isVarArg()) {
+ unsigned NumVarargs = I.getNumOperands()-3-FTy->getNumParams();
+ Vals.push_back(NumVarargs);
+ for (unsigned i = I.getNumOperands()-NumVarargs, e = I.getNumOperands();
+ i != e; ++i) {
+ Vals.push_back(VE.getTypeID(I.getOperand(i)->getType()));
+ Vals.push_back(VE.getValueID(I.getOperand(i)));
+ }
+ }
+ break;
case Instruction::Unwind:
Code = bitc::FUNC_CODE_INST_UNWIND;
break;
case Instruction::Unreachable:
Code = bitc::FUNC_CODE_INST_UNREACHABLE;
break;
+
+ case Instruction::PHI:
+ Code = bitc::FUNC_CODE_INST_PHI;
+ Vals.push_back(VE.getTypeID(I.getType()));
+ Vals.push_back(I.getNumOperands());
+ for (unsigned i = 0, e = I.getNumOperands(); i != e; ++i)
+ Vals.push_back(VE.getValueID(I.getOperand(i)));
+ break;
+
+ case Instruction::Malloc:
+ Code = bitc::FUNC_CODE_INST_MALLOC;
+ Vals.push_back(VE.getTypeID(I.getType()));
+ Vals.push_back(VE.getValueID(I.getOperand(0))); // size.
+ Vals.push_back(Log2_32(cast(I).getAlignment())+1);
+ break;
+
+ case Instruction::Free:
+ Code = bitc::FUNC_CODE_INST_FREE;
+ Vals.push_back(VE.getTypeID(I.getOperand(0)->getType()));
+ Vals.push_back(VE.getValueID(I.getOperand(0)));
+ break;
+ case Instruction::Alloca:
+ Code = bitc::FUNC_CODE_INST_ALLOCA;
+ Vals.push_back(VE.getTypeID(I.getType()));
+ Vals.push_back(VE.getValueID(I.getOperand(0))); // size.
+ Vals.push_back(Log2_32(cast(I).getAlignment())+1);
+ break;
+
+ case Instruction::Load:
+ Code = bitc::FUNC_CODE_INST_LOAD;
+ Vals.push_back(VE.getTypeID(I.getOperand(0)->getType()));
+ Vals.push_back(VE.getValueID(I.getOperand(0))); // ptr.
+ Vals.push_back(Log2_32(cast(I).getAlignment())+1);
+ Vals.push_back(cast(I).isVolatile());
+ break;
+ case Instruction::Store:
+ Code = bitc::FUNC_CODE_INST_STORE;
+ Vals.push_back(VE.getTypeID(I.getOperand(1)->getType())); // Pointer
+ Vals.push_back(VE.getValueID(I.getOperand(0))); // val.
+ Vals.push_back(VE.getValueID(I.getOperand(1))); // ptr.
+ Vals.push_back(Log2_32(cast(I).getAlignment())+1);
+ Vals.push_back(cast(I).isVolatile());
+ break;
+ case Instruction::Call: {
+ Code = bitc::FUNC_CODE_INST_CALL;
+ // FIXME: param attrs
+ Vals.push_back(VE.getTypeID(I.getOperand(0)->getType()));
+ Vals.push_back(VE.getValueID(I.getOperand(0))); // callee
+
+ // Emit value #'s for the fixed parameters.
+ const PointerType *PTy = cast(I.getOperand(0)->getType());
+ const FunctionType *FTy = cast(PTy->getElementType());
+ for (unsigned i = 0, e = FTy->getNumParams(); i != e; ++i)
+ Vals.push_back(VE.getValueID(I.getOperand(i+1))); // fixed param.
+
+ // Emit type/value pairs for varargs params.
+ if (FTy->isVarArg()) {
+ unsigned NumVarargs = I.getNumOperands()-1-FTy->getNumParams();
+ Vals.push_back(NumVarargs);
+ for (unsigned i = I.getNumOperands()-NumVarargs, e = I.getNumOperands();
+ i != e; ++i) {
+ Vals.push_back(VE.getTypeID(I.getOperand(i)->getType()));
+ Vals.push_back(VE.getValueID(I.getOperand(i)));
+ }
+ }
+ }
+ break;
+
+ case Instruction::VAArg:
+ Code = bitc::FUNC_CODE_INST_VAARG;
+ Vals.push_back(VE.getTypeID(I.getOperand(0)->getType())); // valistty
+ Vals.push_back(VE.getValueID(I.getOperand(0))); // valist.
+ Vals.push_back(VE.getTypeID(I.getType())); // restype.
+ break;
}
Stream.EmitRecord(Code, Vals, AbbrevToUse);
From sabre at nondot.org Mon Apr 30 21:15:15 2007
From: sabre at nondot.org (Chris Lattner)
Date: Mon, 30 Apr 2007 21:15:15 -0500
Subject: [llvm-commits] CVS: llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
Message-ID: <200705010215.l412FFYD000319@zion.cs.uiuc.edu>
Changes in directory llvm/lib/Bitcode/Writer:
BitcodeWriter.cpp updated: 1.17 -> 1.18
---
Log message:
write the symbol table for function bodies
---
Diffs of the changes: (+33 -30)
BitcodeWriter.cpp | 63 ++++++++++++++++++++++++++++--------------------------
1 files changed, 33 insertions(+), 30 deletions(-)
Index: llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
diff -u llvm/lib/Bitcode/Writer/BitcodeWriter.cpp:1.17 llvm/lib/Bitcode/Writer/BitcodeWriter.cpp:1.18
--- llvm/lib/Bitcode/Writer/BitcodeWriter.cpp:1.17 Mon Apr 30 21:13:26 2007
+++ llvm/lib/Bitcode/Writer/BitcodeWriter.cpp Mon Apr 30 21:14:57 2007
@@ -683,6 +683,36 @@
Vals.clear();
}
+// Emit names for globals/functions etc.
+static void WriteValueSymbolTable(const ValueSymbolTable &VST,
+ const ValueEnumerator &VE,
+ BitstreamWriter &Stream) {
+ if (VST.empty()) return;
+ Stream.EnterSubblock(bitc::VALUE_SYMTAB_BLOCK_ID, 3);
+
+ // FIXME: Set up the abbrev, we know how many values there are!
+ // FIXME: We know if the type names can use 7-bit ascii.
+ SmallVector NameVals;
+
+ for (ValueSymbolTable::const_iterator SI = VST.begin(), SE = VST.end();
+ SI != SE; ++SI) {
+ unsigned AbbrevToUse = 0;
+
+ // VST_ENTRY: [valueid, namelen, namechar x N]
+ NameVals.push_back(VE.getValueID(SI->getValue()));
+
+ NameVals.push_back(SI->getKeyLength());
+ for (const char *P = SI->getKeyData(),
+ *E = SI->getKeyData()+SI->getKeyLength(); P != E; ++P)
+ NameVals.push_back((unsigned char)*P);
+
+ // Emit the finished record.
+ Stream.EmitRecord(bitc::VST_CODE_ENTRY, NameVals, AbbrevToUse);
+ NameVals.clear();
+ }
+ Stream.ExitBlock();
+}
+
/// WriteFunction - Emit a function body to the module stream.
static void WriteFunction(const Function &F, ValueEnumerator &VE,
BitstreamWriter &Stream) {
@@ -709,6 +739,9 @@
for (BasicBlock::const_iterator I = BB->begin(), E = BB->end(); I != E; ++I)
WriteInstruction(*I, VE, Stream, Vals);
+ // Emit names for all the instructions etc.
+ WriteValueSymbolTable(F.getValueSymbolTable(), VE, Stream);
+
VE.purgeFunction();
Stream.ExitBlock();
}
@@ -746,36 +779,6 @@
Stream.ExitBlock();
}
-// Emit names for globals/functions etc.
-static void WriteValueSymbolTable(const ValueSymbolTable &VST,
- const ValueEnumerator &VE,
- BitstreamWriter &Stream) {
- if (VST.empty()) return;
- Stream.EnterSubblock(bitc::VALUE_SYMTAB_BLOCK_ID, 3);
-
- // FIXME: Set up the abbrev, we know how many values there are!
- // FIXME: We know if the type names can use 7-bit ascii.
- SmallVector NameVals;
-
- for (ValueSymbolTable::const_iterator SI = VST.begin(), SE = VST.end();
- SI != SE; ++SI) {
- unsigned AbbrevToUse = 0;
-
- // VST_ENTRY: [valueid, namelen, namechar x N]
- NameVals.push_back(VE.getValueID(SI->getValue()));
-
- NameVals.push_back(SI->getKeyLength());
- for (const char *P = SI->getKeyData(),
- *E = SI->getKeyData()+SI->getKeyLength(); P != E; ++P)
- NameVals.push_back((unsigned char)*P);
-
- // Emit the finished record.
- Stream.EmitRecord(bitc::VST_CODE_ENTRY, NameVals, AbbrevToUse);
- NameVals.clear();
- }
- Stream.ExitBlock();
-}
-
/// WriteModule - Emit the specified module to the bitstream.
static void WriteModule(const Module *M, BitstreamWriter &Stream) {
From sabre at nondot.org Mon Apr 30 21:44:04 2007
From: sabre at nondot.org (Chris Lattner)
Date: Mon, 30 Apr 2007 21:44:04 -0500
Subject: [llvm-commits] CVS: llvm/tools/llvm-bcanalyzer/llvm-bcanalyzer.cpp
Message-ID: <200705010244.l412i42W000855@zion.cs.uiuc.edu>
Changes in directory llvm/tools/llvm-bcanalyzer:
llvm-bcanalyzer.cpp updated: 1.15 -> 1.16
---
Log message:
add phi
---
Diffs of the changes: (+5 -1)
llvm-bcanalyzer.cpp | 6 +++++-
1 files changed, 5 insertions(+), 1 deletion(-)
Index: llvm/tools/llvm-bcanalyzer/llvm-bcanalyzer.cpp
diff -u llvm/tools/llvm-bcanalyzer/llvm-bcanalyzer.cpp:1.15 llvm/tools/llvm-bcanalyzer/llvm-bcanalyzer.cpp:1.16
--- llvm/tools/llvm-bcanalyzer/llvm-bcanalyzer.cpp:1.15 Sun Apr 29 16:48:19 2007
+++ llvm/tools/llvm-bcanalyzer/llvm-bcanalyzer.cpp Mon Apr 30 21:43:46 2007
@@ -167,6 +167,7 @@
case bitc::FUNC_CODE_INST_UNWIND: return "INST_UNWIND";
case bitc::FUNC_CODE_INST_UNREACHABLE: return "INST_UNREACHABLE";
+ case bitc::FUNC_CODE_INST_PHI: return "INST_PHI";
case bitc::FUNC_CODE_INST_MALLOC: return "INST_MALLOC";
case bitc::FUNC_CODE_INST_FREE: return "INST_FREE";
case bitc::FUNC_CODE_INST_ALLOCA: return "INST_ALLOCA";
@@ -371,10 +372,11 @@
if (Dump) std::cerr << "\n\n";
+ uint64_t BufferSizeBits = Buffer->getBufferSize()*8;
// Print a summary of the read file.
std::cerr << "Summary of " << InputFilename << ":\n";
std::cerr << " Total size: ";
- PrintSize(Buffer->getBufferSize()*8);
+ PrintSize(BufferSizeBits);
std::cerr << "\n";
std::cerr << " Stream type: ";
switch (CurStreamType) {
@@ -402,6 +404,8 @@
std::cerr << " Average Size: ";
PrintSize(Stats.NumBits/(double)Stats.NumInstances);
std::cerr << "\n";
+ std::cerr << " % of file: "
+ << Stats.NumBits/(double)BufferSizeBits*100 << "\n";
std::cerr << " Tot/Avg SubBlocks: " << Stats.NumSubBlocks << "/"
<< Stats.NumSubBlocks/(double)Stats.NumInstances << "\n";
std::cerr << " Tot/Avg Abbrevs: " << Stats.NumAbbrevs << "/"
From reid at x10sys.com Mon Apr 30 21:56:39 2007
From: reid at x10sys.com (Reid Spencer)
Date: Mon, 30 Apr 2007 21:56:39 -0500
Subject: [llvm-commits] CVS: llvm/test/CodeGen/Generic/vector.ll
Message-ID: <200705010256.l412udbf001067@zion.cs.uiuc.edu>
Changes in directory llvm/test/CodeGen/Generic:
vector.ll updated: 1.13 -> 1.14
---
Log message:
Split target dependent test portions to target-specific directories.
---
Diffs of the changes: (+0 -4)
vector.ll | 4 ----
1 files changed, 4 deletions(-)
Index: llvm/test/CodeGen/Generic/vector.ll
diff -u llvm/test/CodeGen/Generic/vector.ll:1.13 llvm/test/CodeGen/Generic/vector.ll:1.14
--- llvm/test/CodeGen/Generic/vector.ll:1.13 Mon Apr 16 12:36:06 2007
+++ llvm/test/CodeGen/Generic/vector.ll Mon Apr 30 21:56:15 2007
@@ -1,10 +1,6 @@
; Test that vectors are scalarized/lowered correctly.
; RUN: llvm-upgrade < %s | llvm-as | llc
; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple a-b-c
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g3
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mcpu=i386
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mcpu=yonah
%f1 = type <1 x float>
%f2 = type <2 x float>
From reid at x10sys.com Mon Apr 30 21:56:39 2007
From: reid at x10sys.com (Reid Spencer)
Date: Mon, 30 Apr 2007 21:56:39 -0500
Subject: [llvm-commits] CVS: llvm/test/CodeGen/X86/vector.ll
Message-ID: <200705010256.l412udWE001072@zion.cs.uiuc.edu>
Changes in directory llvm/test/CodeGen/X86:
vector.ll added (r1.1)
---
Log message:
Split target dependent test portions to target-specific directories.
---
Diffs of the changes: (+157 -0)
vector.ll | 157 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
1 files changed, 157 insertions(+)
Index: llvm/test/CodeGen/X86/vector.ll
diff -c /dev/null llvm/test/CodeGen/X86/vector.ll:1.1
*** /dev/null Mon Apr 30 21:56:25 2007
--- llvm/test/CodeGen/X86/vector.ll Mon Apr 30 21:56:15 2007
***************
*** 0 ****
--- 1,157 ----
+ ; Test that vectors are scalarized/lowered correctly.
+ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mcpu=i386
+ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mcpu=yonah
+
+ %f1 = type <1 x float>
+ %f2 = type <2 x float>
+ %f4 = type <4 x float>
+ %i4 = type <4 x int>
+ %f8 = type <8 x float>
+ %d8 = type <8 x double>
+
+ implementation
+
+ ;;; TEST HANDLING OF VARIOUS VECTOR SIZES
+
+ void %test_f1(%f1 *%P, %f1* %Q, %f1 *%S) {
+ %p = load %f1 *%P
+ %q = load %f1* %Q
+ %R = add %f1 %p, %q
+ store %f1 %R, %f1 *%S
+ ret void
+ }
+
+ void %test_f2(%f2 *%P, %f2* %Q, %f2 *%S) {
+ %p = load %f2* %P
+ %q = load %f2* %Q
+ %R = add %f2 %p, %q
+ store %f2 %R, %f2 *%S
+ ret void
+ }
+
+ void %test_f4(%f4 *%P, %f4* %Q, %f4 *%S) {
+ %p = load %f4* %P
+ %q = load %f4* %Q
+ %R = add %f4 %p, %q
+ store %f4 %R, %f4 *%S
+ ret void
+ }
+
+ void %test_f8(%f8 *%P, %f8* %Q, %f8 *%S) {
+ %p = load %f8* %P
+ %q = load %f8* %Q
+ %R = add %f8 %p, %q
+ store %f8 %R, %f8 *%S
+ ret void
+ }
+
+ void %test_fmul(%f8 *%P, %f8* %Q, %f8 *%S) {
+ %p = load %f8* %P
+ %q = load %f8* %Q
+ %R = mul %f8 %p, %q
+ store %f8 %R, %f8 *%S
+ ret void
+ }
+
+ void %test_div(%f8 *%P, %f8* %Q, %f8 *%S) {
+ %p = load %f8* %P
+ %q = load %f8* %Q
+ %R = div %f8 %p, %q
+ store %f8 %R, %f8 *%S
+ ret void
+ }
+
+ ;;; TEST VECTOR CONSTRUCTS
+
+ void %test_cst(%f4 *%P, %f4 *%S) {
+ %p = load %f4* %P
+ %R = add %f4 %p,
+ store %f4 %R, %f4 *%S
+ ret void
+ }
+
+ void %test_zero(%f4 *%P, %f4 *%S) {
+ %p = load %f4* %P
+ %R = add %f4 %p, zeroinitializer
+ store %f4 %R, %f4 *%S
+ ret void
+ }
+
+ void %test_undef(%f4 *%P, %f4 *%S) {
+ %p = load %f4* %P
+ %R = add %f4 %p, undef
+ store %f4 %R, %f4 *%S
+ ret void
+ }
+
+ void %test_constant_insert(%f4 *%S) {
+ %R = insertelement %f4 zeroinitializer, float 10.0, uint 0
+ store %f4 %R, %f4 *%S
+ ret void
+ }
+
+ void %test_variable_buildvector(float %F, %f4 *%S) {
+ %R = insertelement %f4 zeroinitializer, float %F, uint 0
+ store %f4 %R, %f4 *%S
+ ret void
+ }
+
+ void %test_scalar_to_vector(float %F, %f4 *%S) {
+ %R = insertelement %f4 undef, float %F, uint 0 ;; R = scalar_to_vector F
+ store %f4 %R, %f4 *%S
+ ret void
+ }
+
+ float %test_extract_elt(%f8 *%P) {
+ %p = load %f8* %P
+ %R = extractelement %f8 %p, uint 3
+ ret float %R
+ }
+
+ double %test_extract_elt2(%d8 *%P) {
+ %p = load %d8* %P
+ %R = extractelement %d8 %p, uint 3
+ ret double %R
+ }
+
+ void %test_cast_1(<4 x float>* %b, <4 x int>* %a) {
+ %tmp = load <4 x float>* %b
+ %tmp2 = add <4 x float> %tmp,
+ %tmp3 = cast <4 x float> %tmp2 to <4 x int>
+ %tmp4 = add <4 x int> %tmp3,
+ store <4 x int> %tmp4, <4 x int>* %a
+ ret void
+ }
+
+ void %test_cast_2(<8 x float>* %a, <8 x int>* %b) {
+ %T = load <8 x float>* %a
+ %T2 = cast <8 x float> %T to <8 x int>
+ store <8 x int> %T2, <8 x int>* %b
+ ret void
+ }
+
+
+ ;;; TEST IMPORTANT IDIOMS
+
+ void %splat(%f4* %P, %f4* %Q, float %X) {
+ %tmp = insertelement %f4 undef, float %X, uint 0
+ %tmp2 = insertelement %f4 %tmp, float %X, uint 1
+ %tmp4 = insertelement %f4 %tmp2, float %X, uint 2
+ %tmp6 = insertelement %f4 %tmp4, float %X, uint 3
+ %q = load %f4* %Q
+ %R = add %f4 %q, %tmp6
+ store %f4 %R, %f4* %P
+ ret void
+ }
+
+ void %splat_i4(%i4* %P, %i4* %Q, int %X) {
+ %tmp = insertelement %i4 undef, int %X, uint 0
+ %tmp2 = insertelement %i4 %tmp, int %X, uint 1
+ %tmp4 = insertelement %i4 %tmp2, int %X, uint 2
+ %tmp6 = insertelement %i4 %tmp4, int %X, uint 3
+ %q = load %i4* %Q
+ %R = add %i4 %q, %tmp6
+ store %i4 %R, %i4* %P
+ ret void
+ }
+
From reid at x10sys.com Mon Apr 30 21:56:41 2007
From: reid at x10sys.com (Reid Spencer)
Date: Mon, 30 Apr 2007 21:56:41 -0500
Subject: [llvm-commits] CVS: llvm/test/CodeGen/PowerPC/vector.ll
Message-ID: <200705010256.l412ufOf001077@zion.cs.uiuc.edu>
Changes in directory llvm/test/CodeGen/PowerPC:
vector.ll added (r1.1)
---
Log message:
Split target dependent test portions to target-specific directories.
---
Diffs of the changes: (+157 -0)
vector.ll | 157 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
1 files changed, 157 insertions(+)
Index: llvm/test/CodeGen/PowerPC/vector.ll
diff -c /dev/null llvm/test/CodeGen/PowerPC/vector.ll:1.1
*** /dev/null Mon Apr 30 21:56:25 2007
--- llvm/test/CodeGen/PowerPC/vector.ll Mon Apr 30 21:56:15 2007
***************
*** 0 ****
--- 1,157 ----
+ ; Test that vectors are scalarized/lowered correctly.
+ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5
+ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g3
+
+ %f1 = type <1 x float>
+ %f2 = type <2 x float>
+ %f4 = type <4 x float>
+ %i4 = type <4 x int>
+ %f8 = type <8 x float>
+ %d8 = type <8 x double>
+
+ implementation
+
+ ;;; TEST HANDLING OF VARIOUS VECTOR SIZES
+
+ void %test_f1(%f1 *%P, %f1* %Q, %f1 *%S) {
+ %p = load %f1 *%P
+ %q = load %f1* %Q
+ %R = add %f1 %p, %q
+ store %f1 %R, %f1 *%S
+ ret void
+ }
+
+ void %test_f2(%f2 *%P, %f2* %Q, %f2 *%S) {
+ %p = load %f2* %P
+ %q = load %f2* %Q
+ %R = add %f2 %p, %q
+ store %f2 %R, %f2 *%S
+ ret void
+ }
+
+ void %test_f4(%f4 *%P, %f4* %Q, %f4 *%S) {
+ %p = load %f4* %P
+ %q = load %f4* %Q
+ %R = add %f4 %p, %q
+ store %f4 %R, %f4 *%S
+ ret void
+ }
+
+ void %test_f8(%f8 *%P, %f8* %Q, %f8 *%S) {
+ %p = load %f8* %P
+ %q = load %f8* %Q
+ %R = add %f8 %p, %q
+ store %f8 %R, %f8 *%S
+ ret void
+ }
+
+ void %test_fmul(%f8 *%P, %f8* %Q, %f8 *%S) {
+ %p = load %f8* %P
+ %q = load %f8* %Q
+ %R = mul %f8 %p, %q
+ store %f8 %R, %f8 *%S
+ ret void
+ }
+
+ void %test_div(%f8 *%P, %f8* %Q, %f8 *%S) {
+ %p = load %f8* %P
+ %q = load %f8* %Q
+ %R = div %f8 %p, %q
+ store %f8 %R, %f8 *%S
+ ret void
+ }
+
+ ;;; TEST VECTOR CONSTRUCTS
+
+ void %test_cst(%f4 *%P, %f4 *%S) {
+ %p = load %f4* %P
+ %R = add %f4 %p,
+ store %f4 %R, %f4 *%S
+ ret void
+ }
+
+ void %test_zero(%f4 *%P, %f4 *%S) {
+ %p = load %f4* %P
+ %R = add %f4 %p, zeroinitializer
+ store %f4 %R, %f4 *%S
+ ret void
+ }
+
+ void %test_undef(%f4 *%P, %f4 *%S) {
+ %p = load %f4* %P
+ %R = add %f4 %p, undef
+ store %f4 %R, %f4 *%S
+ ret void
+ }
+
+ void %test_constant_insert(%f4 *%S) {
+ %R = insertelement %f4 zeroinitializer, float 10.0, uint 0
+ store %f4 %R, %f4 *%S
+ ret void
+ }
+
+ void %test_variable_buildvector(float %F, %f4 *%S) {
+ %R = insertelement %f4 zeroinitializer, float %F, uint 0
+ store %f4 %R, %f4 *%S
+ ret void
+ }
+
+ void %test_scalar_to_vector(float %F, %f4 *%S) {
+ %R = insertelement %f4 undef, float %F, uint 0 ;; R = scalar_to_vector F
+ store %f4 %R, %f4 *%S
+ ret void
+ }
+
+ float %test_extract_elt(%f8 *%P) {
+ %p = load %f8* %P
+ %R = extractelement %f8 %p, uint 3
+ ret float %R
+ }
+
+ double %test_extract_elt2(%d8 *%P) {
+ %p = load %d8* %P
+ %R = extractelement %d8 %p, uint 3
+ ret double %R
+ }
+
+ void %test_cast_1(<4 x float>* %b, <4 x int>* %a) {
+ %tmp = load <4 x float>* %b
+ %tmp2 = add <4 x float> %tmp,
+ %tmp3 = cast <4 x float> %tmp2 to <4 x int>
+ %tmp4 = add <4 x int> %tmp3,
+ store <4 x int> %tmp4, <4 x int>* %a
+ ret void
+ }
+
+ void %test_cast_2(<8 x float>* %a, <8 x int>* %b) {
+ %T = load <8 x float>* %a
+ %T2 = cast <8 x float> %T to <8 x int>
+ store <8 x int> %T2, <8 x int>* %b
+ ret void
+ }
+
+
+ ;;; TEST IMPORTANT IDIOMS
+
+ void %splat(%f4* %P, %f4* %Q, float %X) {
+ %tmp = insertelement %f4 undef, float %X, uint 0
+ %tmp2 = insertelement %f4 %tmp, float %X, uint 1
+ %tmp4 = insertelement %f4 %tmp2, float %X, uint 2
+ %tmp6 = insertelement %f4 %tmp4, float %X, uint 3
+ %q = load %f4* %Q
+ %R = add %f4 %q, %tmp6
+ store %f4 %R, %f4* %P
+ ret void
+ }
+
+ void %splat_i4(%i4* %P, %i4* %Q, int %X) {
+ %tmp = insertelement %i4 undef, int %X, uint 0
+ %tmp2 = insertelement %i4 %tmp, int %X, uint 1
+ %tmp4 = insertelement %i4 %tmp2, int %X, uint 2
+ %tmp6 = insertelement %i4 %tmp4, int %X, uint 3
+ %q = load %i4* %Q
+ %R = add %i4 %q, %tmp6
+ store %i4 %R, %i4* %P
+ ret void
+ }
+
From clattner at apple.com Mon Apr 30 23:39:37 2007
From: clattner at apple.com (Chris Lattner)
Date: Mon, 30 Apr 2007 21:39:37 -0700
Subject: [llvm-commits] CVS:
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
In-Reply-To: <200705010038.l410ccOi031037@zion.cs.uiuc.edu>
References: <200705010038.l410ccOi031037@zion.cs.uiuc.edu>
Message-ID: <1E6DD6BA-308B-406A-AA3F-CD634D9A3412@apple.com>
> + bool HasUses = false;
> + SmallVector VTs;
> + for (unsigned i = 0, e = N->getNumValues(); i != e; ++i) {
> + if (!N->hasNUsesOfValue(0, i)) {
> + HasUses = true;
> + break;
> + }
> + VTs.push_back(N->getValueType(i));
> + }
> + if (!HasUses) {
> + SmallVector Ops;
> + return CombineTo(N, DAG.getNode(ISD::UNDEF, &VTs[0], VTs.size
> (), 0, 0),
> + Chain);
This can never trigger and isn't right if it did.
#1: This should trigger if the chain has uses but the other values do
not. If the entire node is dead, it will already have been removed.
#2. you can't create an undef with multiple results, you have to
create multiple undefs :)
I'd suggest just writing this as:
if (N->getValueType(1) == MVT::Other) {
// single result case.
} else {
assert(N->getValueType(2) == MVT::Other);
// multi result case.
}
This lets you drop the looping and smallvector.
-Chris
From sabre at nondot.org Mon Apr 30 23:59:24 2007
From: sabre at nondot.org (Chris Lattner)
Date: Mon, 30 Apr 2007 23:59:24 -0500
Subject: [llvm-commits] CVS: llvm/include/llvm/Bitcode/BitstreamReader.h
Message-ID: <200705010459.l414xOA4003472@zion.cs.uiuc.edu>
Changes in directory llvm/include/llvm/Bitcode:
BitstreamReader.h updated: 1.9 -> 1.10
---
Log message:
add JumpToBit, an explicit init method, and a default ctor.
---
Diffs of the changes: (+28 -2)
BitstreamReader.h | 30 ++++++++++++++++++++++++++++--
1 files changed, 28 insertions(+), 2 deletions(-)
Index: llvm/include/llvm/Bitcode/BitstreamReader.h
diff -u llvm/include/llvm/Bitcode/BitstreamReader.h:1.9 llvm/include/llvm/Bitcode/BitstreamReader.h:1.10
--- llvm/include/llvm/Bitcode/BitstreamReader.h:1.9 Sun Apr 29 16:49:05 2007
+++ llvm/include/llvm/Bitcode/BitstreamReader.h Mon Apr 30 23:59:06 2007
@@ -51,8 +51,20 @@
/// FirstChar - This remembers the first byte of the stream.
const unsigned char *FirstChar;
public:
- BitstreamReader(const unsigned char *Start, const unsigned char *End)
- : NextChar(Start), LastChar(End), FirstChar(Start) {
+ BitstreamReader() {
+ NextChar = FirstChar = LastChar = 0;
+ CurWord = 0;
+ BitsInCurWord = 0;
+ CurCodeSize = 0;
+ }
+
+ BitstreamReader(const unsigned char *Start, const unsigned char *End) {
+ init(Start, End);
+ }
+
+ void init(const unsigned char *Start, const unsigned char *End) {
+ NextChar = FirstChar = Start;
+ LastChar = End;
assert(((End-Start) & 3) == 0 &&"Bitcode stream not a multiple of 4 bytes");
CurWord = 0;
BitsInCurWord = 0;
@@ -79,6 +91,20 @@
return (NextChar-FirstChar)*8 + (32-BitsInCurWord);
}
+ /// JumpToBit - Reset the stream to the specified bit number.
+ void JumpToBit(uint64_t BitNo) {
+ unsigned WordNo = BitNo/32;
+ unsigned WordBitNo = BitNo & 31;
+ assert(WordNo < (unsigned)(LastChar-FirstChar) && "Invalid location");
+
+ // Move the cursor to the right word.
+ NextChar = FirstChar+WordNo;
+ BitsInCurWord = 0;
+
+ // Skip over any bits that are already consumed.
+ if (WordBitNo) Read(WordBitNo);
+ }
+
/// GetAbbrevIDWidth - Return the number of bits used to encode an abbrev #.
unsigned GetAbbrevIDWidth() const { return CurCodeSize; }
From sabre at nondot.org Tue May 1 00:00:05 2007
From: sabre at nondot.org (Chris Lattner)
Date: Tue, 1 May 2007 00:00:05 -0500
Subject: [llvm-commits] CVS: llvm/lib/Bitcode/Reader/BitcodeReader.cpp
BitcodeReader.h
Message-ID: <200705010500.l41505Tj003570@zion.cs.uiuc.edu>
Changes in directory llvm/lib/Bitcode/Reader:
BitcodeReader.cpp updated: 1.17 -> 1.18
BitcodeReader.h updated: 1.11 -> 1.12
---
Log message:
implement scafolding for lazy deserialization of function bodies
---
Diffs of the changes: (+85 -7)
BitcodeReader.cpp | 65 ++++++++++++++++++++++++++++++++++++++++++++++++++++--
BitcodeReader.h | 27 ++++++++++++++++++----
2 files changed, 85 insertions(+), 7 deletions(-)
Index: llvm/lib/Bitcode/Reader/BitcodeReader.cpp
diff -u llvm/lib/Bitcode/Reader/BitcodeReader.cpp:1.17 llvm/lib/Bitcode/Reader/BitcodeReader.cpp:1.18
--- llvm/lib/Bitcode/Reader/BitcodeReader.cpp:1.17 Sun Apr 29 15:56:48 2007
+++ llvm/lib/Bitcode/Reader/BitcodeReader.cpp Mon Apr 30 23:59:48 2007
@@ -13,7 +13,6 @@
#include "llvm/Bitcode/ReaderWriter.h"
#include "BitcodeReader.h"
-#include "llvm/Bitcode/BitstreamReader.h"
#include "llvm/Constants.h"
#include "llvm/DerivedTypes.h"
#include "llvm/Module.h"
@@ -660,6 +659,30 @@
}
}
+/// ParseFunction - When we see the block for a function body, remember where it
+/// is and then skip it. This lets us lazily deserialize the functions.
+bool BitcodeReader::ParseFunction(BitstreamReader &Stream) {
+ // Get the function we are talking about.
+ if (FunctionsWithBodies.empty())
+ return Error("Insufficient function protos");
+
+ Function *Fn = FunctionsWithBodies.back();
+ FunctionsWithBodies.pop_back();
+
+ // Save the current stream state.
+ uint64_t CurBit = Stream.GetCurrentBitNo();
+ DeferredFunctionInfo[Fn] = std::make_pair(CurBit, Fn->getLinkage());
+
+ // Set the functions linkage to GhostLinkage so we know it is lazily
+ // deserialized.
+ Fn->setLinkage(GlobalValue::GhostLinkage);
+
+ // Skip over the function block for now.
+ if (Stream.SkipBlock())
+ return Error("Malformed block record");
+ return false;
+}
+
bool BitcodeReader::ParseModule(BitstreamReader &Stream,
const std::string &ModuleID) {
// Reject multiple MODULE_BLOCK's in a single bitstream.
@@ -682,6 +705,8 @@
ResolveGlobalAndAliasInits();
if (!GlobalInits.empty() || !AliasInits.empty())
return Error("Malformed global initializer set");
+ if (!FunctionsWithBodies.empty())
+ return Error("Too few function bodies found");
if (Stream.ReadBlockEnd())
return Error("Error at end of module block");
return false;
@@ -709,6 +734,17 @@
if (ParseConstants(Stream) || ResolveGlobalAndAliasInits())
return true;
break;
+ case bitc::FUNCTION_BLOCK_ID:
+ // If this is the first function body we've seen, reverse the
+ // FunctionsWithBodies list.
+ if (!HasReversedFunctionsWithBodies) {
+ std::reverse(FunctionsWithBodies.begin(), FunctionsWithBodies.end());
+ HasReversedFunctionsWithBodies = true;
+ }
+
+ if (ParseFunction(Stream))
+ return true;
+ break;
}
continue;
}
@@ -819,6 +855,7 @@
"", TheModule);
Func->setCallingConv(Record[1]);
+ bool isProto = Record[2];
Func->setLinkage(GetDecodedLinkage(Record[3]));
Func->setAlignment((1 << Record[4]) >> 1);
if (Record[5]) {
@@ -829,6 +866,11 @@
Func->setVisibility(GetDecodedVisibility(Record[6]));
ValueList.push_back(Func);
+
+ // If this is a function with a body, remember the prototype we are
+ // creating now, so that we can match up the body with them later.
+ if (!isProto)
+ FunctionsWithBodies.push_back(Func);
break;
}
// ALIAS: [alias type, aliasee val#, linkage]
@@ -867,7 +909,7 @@
return Error("Bitcode stream should be a multiple of 4 bytes in length");
unsigned char *BufPtr = (unsigned char *)Buffer->getBufferStart();
- BitstreamReader Stream(BufPtr, BufPtr+Buffer->getBufferSize());
+ Stream.init(BufPtr, BufPtr+Buffer->getBufferSize());
// Sniff for the signature.
if (Stream.Read(8) != 'B' ||
@@ -900,6 +942,25 @@
return false;
}
+
+bool BitcodeReader::materializeFunction(Function *F, std::string *ErrInfo) {
+ // If it already is material, ignore the request.
+ if (!F->hasNotBeenReadFromBytecode()) return false;
+
+ DenseMap >::iterator DFII =
+ DeferredFunctionInfo.find(F);
+ assert(DFII != DeferredFunctionInfo.end() && "Deferred function not found!");
+
+ // Move the bit stream to the saved position of the deferred function body and
+ // restore the real linkage type for the function.
+ Stream.JumpToBit(DFII->second.first);
+ F->setLinkage((GlobalValue::LinkageTypes)DFII->second.second);
+ DeferredFunctionInfo.erase(DFII);
+
+ return false;
+}
+
+
//===----------------------------------------------------------------------===//
// External interface
//===----------------------------------------------------------------------===//
Index: llvm/lib/Bitcode/Reader/BitcodeReader.h
diff -u llvm/lib/Bitcode/Reader/BitcodeReader.h:1.11 llvm/lib/Bitcode/Reader/BitcodeReader.h:1.12
--- llvm/lib/Bitcode/Reader/BitcodeReader.h:1.11 Sun Apr 29 02:54:31 2007
+++ llvm/lib/Bitcode/Reader/BitcodeReader.h Mon Apr 30 23:59:48 2007
@@ -17,7 +17,9 @@
#include "llvm/ModuleProvider.h"
#include "llvm/Type.h"
#include "llvm/User.h"
+#include "llvm/Bitcode/BitstreamReader.h"
#include "llvm/Bitcode/LLVMBitCodes.h"
+#include "llvm/ADT/DenseMap.h"
#include
namespace llvm {
@@ -59,14 +61,31 @@
class BitcodeReader : public ModuleProvider {
MemoryBuffer *Buffer;
+ BitstreamReader Stream;
+
const char *ErrorString;
std::vector TypeList;
BitcodeReaderValueList ValueList;
std::vector > GlobalInits;
std::vector > AliasInits;
+
+ // When reading the module header, this list is populated with functions that
+ // have bodies later in the file.
+ std::vector FunctionsWithBodies;
+
+ // After the module header has been read, the FunctionsWithBodies list is
+ // reversed. This keeps track of whether we've done this yet.
+ bool HasReversedFunctionsWithBodies;
+
+ /// DeferredFunctionInfo - When function bodies are initially scanned, this
+ /// map contains info about where to find deferred function body (in the
+ /// stream) and what linkage the original function had.
+ DenseMap > DeferredFunctionInfo;
public:
- BitcodeReader(MemoryBuffer *buffer) : Buffer(buffer), ErrorString(0) {}
+ BitcodeReader(MemoryBuffer *buffer) : Buffer(buffer), ErrorString(0) {
+ HasReversedFunctionsWithBodies = false;
+ }
~BitcodeReader();
@@ -77,10 +96,7 @@
Buffer = 0;
}
- virtual bool materializeFunction(Function *F, std::string *ErrInfo = 0) {
- // FIXME: TODO
- return false;
- }
+ virtual bool materializeFunction(Function *F, std::string *ErrInfo = 0);
virtual Module *materializeModule(std::string *ErrInfo = 0) {
// FIXME: TODO
@@ -106,6 +122,7 @@
bool ParseTypeSymbolTable(BitstreamReader &Stream);
bool ParseValueSymbolTable(BitstreamReader &Stream);
bool ParseConstants(BitstreamReader &Stream);
+ bool ParseFunction(BitstreamReader &Stream);
bool ResolveGlobalAndAliasInits();
};
From sabre at nondot.org Tue May 1 00:01:52 2007
From: sabre at nondot.org (Chris Lattner)
Date: Tue, 1 May 2007 00:01:52 -0500
Subject: [llvm-commits] CVS: llvm/lib/Bitcode/Reader/BitcodeReader.cpp
BitcodeReader.h
Message-ID: <200705010501.l4151q0r003643@zion.cs.uiuc.edu>
Changes in directory llvm/lib/Bitcode/Reader:
BitcodeReader.cpp updated: 1.18 -> 1.19
BitcodeReader.h updated: 1.12 -> 1.13
---
Log message:
The stream to read from is now an ivar
---
Diffs of the changes: (+18 -20)
BitcodeReader.cpp | 25 ++++++++++++-------------
BitcodeReader.h | 13 ++++++-------
2 files changed, 18 insertions(+), 20 deletions(-)
Index: llvm/lib/Bitcode/Reader/BitcodeReader.cpp
diff -u llvm/lib/Bitcode/Reader/BitcodeReader.cpp:1.18 llvm/lib/Bitcode/Reader/BitcodeReader.cpp:1.19
--- llvm/lib/Bitcode/Reader/BitcodeReader.cpp:1.18 Mon Apr 30 23:59:48 2007
+++ llvm/lib/Bitcode/Reader/BitcodeReader.cpp Tue May 1 00:01:34 2007
@@ -152,7 +152,7 @@
}
-bool BitcodeReader::ParseTypeTable(BitstreamReader &Stream) {
+bool BitcodeReader::ParseTypeTable() {
if (Stream.EnterSubBlock())
return Error("Malformed block record");
@@ -298,7 +298,7 @@
}
-bool BitcodeReader::ParseTypeSymbolTable(BitstreamReader &Stream) {
+bool BitcodeReader::ParseTypeSymbolTable() {
if (Stream.EnterSubBlock())
return Error("Malformed block record");
@@ -346,7 +346,7 @@
}
}
-bool BitcodeReader::ParseValueSymbolTable(BitstreamReader &Stream) {
+bool BitcodeReader::ParseValueSymbolTable() {
if (Stream.EnterSubBlock())
return Error("Malformed block record");
@@ -444,7 +444,7 @@
}
-bool BitcodeReader::ParseConstants(BitstreamReader &Stream) {
+bool BitcodeReader::ParseConstants() {
if (Stream.EnterSubBlock())
return Error("Malformed block record");
@@ -661,7 +661,7 @@
/// ParseFunction - When we see the block for a function body, remember where it
/// is and then skip it. This lets us lazily deserialize the functions.
-bool BitcodeReader::ParseFunction(BitstreamReader &Stream) {
+bool BitcodeReader::ParseFunction() {
// Get the function we are talking about.
if (FunctionsWithBodies.empty())
return Error("Insufficient function protos");
@@ -683,8 +683,7 @@
return false;
}
-bool BitcodeReader::ParseModule(BitstreamReader &Stream,
- const std::string &ModuleID) {
+bool BitcodeReader::ParseModule(const std::string &ModuleID) {
// Reject multiple MODULE_BLOCK's in a single bitstream.
if (TheModule)
return Error("Multiple MODULE_BLOCKs in same stream");
@@ -719,19 +718,19 @@
return Error("Malformed block record");
break;
case bitc::TYPE_BLOCK_ID:
- if (ParseTypeTable(Stream))
+ if (ParseTypeTable())
return true;
break;
case bitc::TYPE_SYMTAB_BLOCK_ID:
- if (ParseTypeSymbolTable(Stream))
+ if (ParseTypeSymbolTable())
return true;
break;
case bitc::VALUE_SYMTAB_BLOCK_ID:
- if (ParseValueSymbolTable(Stream))
+ if (ParseValueSymbolTable())
return true;
break;
case bitc::CONSTANTS_BLOCK_ID:
- if (ParseConstants(Stream) || ResolveGlobalAndAliasInits())
+ if (ParseConstants() || ResolveGlobalAndAliasInits())
return true;
break;
case bitc::FUNCTION_BLOCK_ID:
@@ -742,7 +741,7 @@
HasReversedFunctionsWithBodies = true;
}
- if (ParseFunction(Stream))
+ if (ParseFunction())
return true;
break;
}
@@ -932,7 +931,7 @@
// We only know the MODULE subblock ID.
if (BlockID == bitc::MODULE_BLOCK_ID) {
- if (ParseModule(Stream, Buffer->getBufferIdentifier()))
+ if (ParseModule(Buffer->getBufferIdentifier()))
return true;
} else if (Stream.SkipBlock()) {
return Error("Malformed block record");
Index: llvm/lib/Bitcode/Reader/BitcodeReader.h
diff -u llvm/lib/Bitcode/Reader/BitcodeReader.h:1.12 llvm/lib/Bitcode/Reader/BitcodeReader.h:1.13
--- llvm/lib/Bitcode/Reader/BitcodeReader.h:1.12 Mon Apr 30 23:59:48 2007
+++ llvm/lib/Bitcode/Reader/BitcodeReader.h Tue May 1 00:01:34 2007
@@ -23,7 +23,6 @@
#include
namespace llvm {
- class BitstreamReader;
class MemoryBuffer;
class BitcodeReaderValueList : public User {
@@ -117,12 +116,12 @@
private:
const Type *getTypeByID(unsigned ID, bool isTypeTable = false);
- bool ParseModule(BitstreamReader &Stream, const std::string &ModuleID);
- bool ParseTypeTable(BitstreamReader &Stream);
- bool ParseTypeSymbolTable(BitstreamReader &Stream);
- bool ParseValueSymbolTable(BitstreamReader &Stream);
- bool ParseConstants(BitstreamReader &Stream);
- bool ParseFunction(BitstreamReader &Stream);
+ bool ParseModule(const std::string &ModuleID);
+ bool ParseTypeTable();
+ bool ParseTypeSymbolTable();
+ bool ParseValueSymbolTable();
+ bool ParseConstants();
+ bool ParseFunction();
bool ResolveGlobalAndAliasInits();
};
From sabre at nondot.org Tue May 1 00:51:51 2007
From: sabre at nondot.org (Chris Lattner)
Date: Tue, 1 May 2007 00:51:51 -0500
Subject: [llvm-commits] CVS: llvm/include/llvm/Bitcode/BitstreamReader.h
Message-ID: <200705010551.l415ppSj005064@zion.cs.uiuc.edu>
Changes in directory llvm/include/llvm/Bitcode:
BitstreamReader.h updated: 1.10 -> 1.11
---
Log message:
several bitfixes to JumpToBit
---
Diffs of the changes: (+7 -4)
BitstreamReader.h | 11 +++++++----
1 files changed, 7 insertions(+), 4 deletions(-)
Index: llvm/include/llvm/Bitcode/BitstreamReader.h
diff -u llvm/include/llvm/Bitcode/BitstreamReader.h:1.10 llvm/include/llvm/Bitcode/BitstreamReader.h:1.11
--- llvm/include/llvm/Bitcode/BitstreamReader.h:1.10 Mon Apr 30 23:59:06 2007
+++ llvm/include/llvm/Bitcode/BitstreamReader.h Tue May 1 00:51:32 2007
@@ -93,16 +93,19 @@
/// JumpToBit - Reset the stream to the specified bit number.
void JumpToBit(uint64_t BitNo) {
- unsigned WordNo = BitNo/32;
+ unsigned ByteNo = (BitNo/8) & ~3;
unsigned WordBitNo = BitNo & 31;
- assert(WordNo < (unsigned)(LastChar-FirstChar) && "Invalid location");
+ assert(ByteNo < (unsigned)(LastChar-FirstChar) && "Invalid location");
// Move the cursor to the right word.
- NextChar = FirstChar+WordNo;
+ NextChar = FirstChar+ByteNo;
BitsInCurWord = 0;
// Skip over any bits that are already consumed.
- if (WordBitNo) Read(WordBitNo);
+ if (WordBitNo) {
+ NextChar -= 4;
+ Read(WordBitNo);
+ }
}
/// GetAbbrevIDWidth - Return the number of bits used to encode an abbrev #.
From sabre at nondot.org Tue May 1 00:52:40 2007
From: sabre at nondot.org (Chris Lattner)
Date: Tue, 1 May 2007 00:52:40 -0500
Subject: [llvm-commits] CVS: llvm/lib/Bitcode/Reader/BitcodeReader.cpp
BitcodeReader.h
Message-ID: <200705010552.l415qeAi005113@zion.cs.uiuc.edu>
Changes in directory llvm/lib/Bitcode/Reader:
BitcodeReader.cpp updated: 1.19 -> 1.20
BitcodeReader.h updated: 1.13 -> 1.14
---
Log message:
implement materializeModule, force deallocation of vector memory when we
are done with them, start implementing ParseFunctionBody
---
Diffs of the changes: (+107 -15)
BitcodeReader.cpp | 105 ++++++++++++++++++++++++++++++++++++++++++++++++++----
BitcodeReader.h | 17 ++++----
2 files changed, 107 insertions(+), 15 deletions(-)
Index: llvm/lib/Bitcode/Reader/BitcodeReader.cpp
diff -u llvm/lib/Bitcode/Reader/BitcodeReader.cpp:1.19 llvm/lib/Bitcode/Reader/BitcodeReader.cpp:1.20
--- llvm/lib/Bitcode/Reader/BitcodeReader.cpp:1.19 Tue May 1 00:01:34 2007
+++ llvm/lib/Bitcode/Reader/BitcodeReader.cpp Tue May 1 00:52:21 2007
@@ -659,9 +659,10 @@
}
}
-/// ParseFunction - When we see the block for a function body, remember where it
-/// is and then skip it. This lets us lazily deserialize the functions.
-bool BitcodeReader::ParseFunction() {
+/// RememberAndSkipFunctionBody - When we see the block for a function body,
+/// remember where it is and then skip it. This lets us lazily deserialize the
+/// functions.
+bool BitcodeReader::RememberAndSkipFunctionBody() {
// Get the function we are talking about.
if (FunctionsWithBodies.empty())
return Error("Insufficient function protos");
@@ -701,13 +702,21 @@
while (!Stream.AtEndOfStream()) {
unsigned Code = Stream.ReadCode();
if (Code == bitc::END_BLOCK) {
+ if (Stream.ReadBlockEnd())
+ return Error("Error at end of module block");
+
+ // Patch the initializers for globals and aliases up.
ResolveGlobalAndAliasInits();
if (!GlobalInits.empty() || !AliasInits.empty())
return Error("Malformed global initializer set");
if (!FunctionsWithBodies.empty())
return Error("Too few function bodies found");
- if (Stream.ReadBlockEnd())
- return Error("Error at end of module block");
+
+ // Force deallocation of memory for these vectors to favor the client that
+ // want lazy deserialization.
+ std::vector >().swap(GlobalInits);
+ std::vector >().swap(AliasInits);
+ std::vector().swap(FunctionsWithBodies);
return false;
}
@@ -741,7 +750,7 @@
HasReversedFunctionsWithBodies = true;
}
- if (ParseFunction())
+ if (RememberAndSkipFunctionBody())
return true;
break;
}
@@ -956,6 +965,90 @@
F->setLinkage((GlobalValue::LinkageTypes)DFII->second.second);
DeferredFunctionInfo.erase(DFII);
+ if (ParseFunctionBody(F)) {
+ if (ErrInfo) *ErrInfo = ErrorString;
+ return true;
+ }
+
+ return false;
+}
+
+Module *BitcodeReader::materializeModule(std::string *ErrInfo) {
+ DenseMap >::iterator I =
+ DeferredFunctionInfo.begin();
+ while (!DeferredFunctionInfo.empty()) {
+ Function *F = (*I++).first;
+ assert(F->hasNotBeenReadFromBytecode() &&
+ "Deserialized function found in map!");
+ if (materializeFunction(F, ErrInfo))
+ return 0;
+ }
+ return TheModule;
+}
+
+
+/// ParseFunctionBody - Lazily parse the specified function body block.
+bool BitcodeReader::ParseFunctionBody(Function *F) {
+ if (Stream.EnterSubBlock())
+ return Error("Malformed block record");
+
+ unsigned ModuleValueListSize = ValueList.size();
+
+ // Add all the function arguments to the value table.
+ for(Function::arg_iterator I = F->arg_begin(), E = F->arg_end(); I != E; ++I)
+ ValueList.push_back(I);
+
+ // Read all the records.
+ SmallVector Record;
+ while (1) {
+ unsigned Code = Stream.ReadCode();
+ if (Code == bitc::END_BLOCK) {
+ if (Stream.ReadBlockEnd())
+ return Error("Error at end of function block");
+ break;
+ }
+
+ if (Code == bitc::ENTER_SUBBLOCK) {
+ switch (Stream.ReadSubBlockID()) {
+ default: // Skip unknown content.
+ if (Stream.SkipBlock())
+ return Error("Malformed block record");
+ break;
+ case bitc::CONSTANTS_BLOCK_ID:
+ if (ParseConstants()) return true;
+ break;
+ case bitc::VALUE_SYMTAB_BLOCK_ID:
+ if (ParseValueSymbolTable()) return true;
+ break;
+ }
+ continue;
+ }
+
+ if (Code == bitc::DEFINE_ABBREV) {
+ Stream.ReadAbbrevRecord();
+ continue;
+ }
+
+ // Read a record.
+ Record.clear();
+ switch (Stream.ReadRecord(Code, Record)) {
+ default: // Default behavior: unknown constant
+ case bitc::FUNC_CODE_DECLAREBLOCKS: // DECLAREBLOCKS: [nblocks]
+ if (Record.size() < 1)
+ return Error("Invalid FUNC_CODE_DECLAREBLOCKS record");
+ // Create all the basic blocks for the function.
+ FunctionBBs.resize(Record.size());
+ for (unsigned i = 0, e = FunctionBBs.size(); i != e; ++i)
+ FunctionBBs[i] = new BasicBlock("", F);
+ break;
+ }
+ }
+
+
+ // Trim the value list down to the size it was before we parsed this function.
+ ValueList.shrinkTo(ModuleValueListSize);
+ std::vector().swap(FunctionBBs);
+
return false;
}
Index: llvm/lib/Bitcode/Reader/BitcodeReader.h
diff -u llvm/lib/Bitcode/Reader/BitcodeReader.h:1.13 llvm/lib/Bitcode/Reader/BitcodeReader.h:1.14
--- llvm/lib/Bitcode/Reader/BitcodeReader.h:1.13 Tue May 1 00:01:34 2007
+++ llvm/lib/Bitcode/Reader/BitcodeReader.h Tue May 1 00:52:21 2007
@@ -44,7 +44,7 @@
void pop_back() { Uses.pop_back(); --NumOperands; }
bool empty() const { return NumOperands == 0; }
void shrinkTo(unsigned N) {
- assert(N < NumOperands && "Invalid shrinkTo request!");
+ assert(N <= NumOperands && "Invalid shrinkTo request!");
Uses.resize(N);
NumOperands = N;
}
@@ -69,6 +69,10 @@
std::vector > GlobalInits;
std::vector > AliasInits;
+ /// FunctionBBs - While parsing a function body, this is a list of the basic
+ /// blocks for the function.
+ std::vector FunctionBBs;
+
// When reading the module header, this list is populated with functions that
// have bodies later in the file.
std::vector FunctionsWithBodies;
@@ -96,13 +100,7 @@
}
virtual bool materializeFunction(Function *F, std::string *ErrInfo = 0);
-
- virtual Module *materializeModule(std::string *ErrInfo = 0) {
- // FIXME: TODO
- //if (ParseAllFunctionBodies(ErrMsg))
- // return 0;
- return TheModule;
- }
+ virtual Module *materializeModule(std::string *ErrInfo = 0);
bool Error(const char *Str) {
ErrorString = Str;
@@ -121,7 +119,8 @@
bool ParseTypeSymbolTable();
bool ParseValueSymbolTable();
bool ParseConstants();
- bool ParseFunction();
+ bool RememberAndSkipFunctionBody();
+ bool ParseFunctionBody(Function *F);
bool ResolveGlobalAndAliasInits();
};
From natebegeman at mac.com Tue May 1 00:57:37 2007
From: natebegeman at mac.com (Nate Begeman)
Date: Tue, 1 May 2007 00:57:37 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/Target.td
Message-ID: <200705010557.l415vbiV005225@zion.cs.uiuc.edu>
Changes in directory llvm/lib/Target:
Target.td updated: 1.96 -> 1.97
---
Log message:
llvm bug #1350, parts 1, 2, and 3.
---
Diffs of the changes: (+9 -7)
Target.td | 16 +++++++++-------
1 files changed, 9 insertions(+), 7 deletions(-)
Index: llvm/lib/Target/Target.td
diff -u llvm/lib/Target/Target.td:1.96 llvm/lib/Target/Target.td:1.97
--- llvm/lib/Target/Target.td:1.96 Fri Apr 20 16:13:46 2007
+++ llvm/lib/Target/Target.td Tue May 1 00:57:02 2007
@@ -67,13 +67,15 @@
let SubRegs = subregs;
}
-// RegisterGroup - This can be used to define instances of Register which
-// need to specify aliases.
-// List "aliases" specifies which registers are aliased to this one. This
-// allows the code generator to be careful not to put two values with
-// overlapping live ranges into registers which alias.
-class RegisterGroup aliases> : Register {
- let Aliases = aliases;
+// SubRegSet - This can be used to define a specific mapping of registers to
+// indices, for use as named subregs of a particular physical register. Each
+// register in 'subregs' becomes an addressable subregister at index 'n' of the
+// corresponding register in 'regs'.
+class SubRegSet regs, list subregs> {
+ int index = n;
+
+ list From = regs;
+ list To = subregs;
}
// RegisterClass - Now that all of the registers are defined, and aliases
From natebegeman at mac.com Tue May 1 00:57:37 2007
From: natebegeman at mac.com (Nate Begeman)
Date: Tue, 1 May 2007 00:57:37 -0500
Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h
Message-ID: <200705010557.l415vbgt005230@zion.cs.uiuc.edu>
Changes in directory llvm/include/llvm/CodeGen:
MachineInstr.h updated: 1.217 -> 1.218
---
Log message:
llvm bug #1350, parts 1, 2, and 3.
---
Diffs of the changes: (+31 -16)
MachineInstr.h | 47 +++++++++++++++++++++++++++++++----------------
1 files changed, 31 insertions(+), 16 deletions(-)
Index: llvm/include/llvm/CodeGen/MachineInstr.h
diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.217 llvm/include/llvm/CodeGen/MachineInstr.h:1.218
--- llvm/include/llvm/CodeGen/MachineInstr.h:1.217 Thu Apr 26 13:59:33 2007
+++ llvm/include/llvm/CodeGen/MachineInstr.h Tue May 1 00:57:01 2007
@@ -71,10 +71,17 @@
// immediately after the write. i.e. A register
// that is defined but never used.
- /// offset - Offset to address of global or external, only valid for
- /// MO_GlobalAddress, MO_ExternalSym and MO_ConstantPoolIndex
- int offset;
-
+ /// auxInfo - auxiliary information used by the MachineOperand
+ union {
+ /// offset - Offset to address of global or external, only valid for
+ /// MO_GlobalAddress, MO_ExternalSym and MO_ConstantPoolIndex
+ int offset;
+
+ /// subReg - SubRegister number, only valid for MO_Register. A value of 0
+ /// indicates the MO_Register has no subReg.
+ unsigned subReg;
+ } auxInfo;
+
MachineOperand() {}
void print(std::ostream &os) const;
@@ -95,7 +102,7 @@
Op.IsImp = false;
Op.IsKill = false;
Op.IsDead = false;
- Op.offset = 0;
+ Op.auxInfo.offset = 0;
return Op;
}
@@ -106,7 +113,7 @@
IsKill = MO.IsKill;
IsDead = MO.IsDead;
opType = MO.opType;
- offset = MO.offset;
+ auxInfo = MO.auxInfo;
return *this;
}
@@ -169,7 +176,11 @@
int getOffset() const {
assert((isGlobalAddress() || isExternalSymbol() || isConstantPoolIndex()) &&
"Wrong MachineOperand accessor");
- return offset;
+ return auxInfo.offset;
+ }
+ unsigned getSubReg() const {
+ assert(isRegister() && "Wrong MachineOperand accessor");
+ return auxInfo.subReg;
}
const char *getSymbolName() const {
assert(isExternalSymbol() && "Wrong MachineOperand accessor");
@@ -254,7 +265,11 @@
assert((isGlobalAddress() || isExternalSymbol() || isConstantPoolIndex() ||
isJumpTableIndex()) &&
"Wrong MachineOperand accessor");
- offset = Offset;
+ auxInfo.offset = Offset;
+ }
+ void setSubReg(unsigned subReg) {
+ assert(isRegister() && "Wrong MachineOperand accessor");
+ auxInfo.subReg = subReg;
}
void setConstantPoolIndex(unsigned Idx) {
assert(isConstantPoolIndex() && "Wrong MachineOperand accessor");
@@ -433,7 +448,7 @@
Op.IsKill = IsKill;
Op.IsDead = IsDead;
Op.contents.RegNo = Reg;
- Op.offset = 0;
+ Op.auxInfo.subReg = 0;
}
/// addImmOperand - Add a zero extended constant argument to the
@@ -443,14 +458,14 @@
MachineOperand &Op = AddNewOperand();
Op.opType = MachineOperand::MO_Immediate;
Op.contents.immedVal = Val;
- Op.offset = 0;
+ Op.auxInfo.offset = 0;
}
void addMachineBasicBlockOperand(MachineBasicBlock *MBB) {
MachineOperand &Op = AddNewOperand();
Op.opType = MachineOperand::MO_MachineBasicBlock;
Op.contents.MBB = MBB;
- Op.offset = 0;
+ Op.auxInfo.offset = 0;
}
/// addFrameIndexOperand - Add an abstract frame index to the instruction
@@ -459,7 +474,7 @@
MachineOperand &Op = AddNewOperand();
Op.opType = MachineOperand::MO_FrameIndex;
Op.contents.immedVal = Idx;
- Op.offset = 0;
+ Op.auxInfo.offset = 0;
}
/// addConstantPoolndexOperand - Add a constant pool object index to the
@@ -469,7 +484,7 @@
MachineOperand &Op = AddNewOperand();
Op.opType = MachineOperand::MO_ConstantPoolIndex;
Op.contents.immedVal = Idx;
- Op.offset = Offset;
+ Op.auxInfo.offset = Offset;
}
/// addJumpTableIndexOperand - Add a jump table object index to the
@@ -479,14 +494,14 @@
MachineOperand &Op = AddNewOperand();
Op.opType = MachineOperand::MO_JumpTableIndex;
Op.contents.immedVal = Idx;
- Op.offset = 0;
+ Op.auxInfo.offset = 0;
}
void addGlobalAddressOperand(GlobalValue *GV, int Offset) {
MachineOperand &Op = AddNewOperand();
Op.opType = MachineOperand::MO_GlobalAddress;
Op.contents.GV = GV;
- Op.offset = Offset;
+ Op.auxInfo.offset = Offset;
}
/// addExternalSymbolOperand - Add an external symbol operand to this instr
@@ -495,7 +510,7 @@
MachineOperand &Op = AddNewOperand();
Op.opType = MachineOperand::MO_ExternalSymbol;
Op.contents.SymbolName = SymName;
- Op.offset = 0;
+ Op.auxInfo.offset = 0;
}
//===--------------------------------------------------------------------===//
From natebegeman at mac.com Tue May 1 00:57:37 2007
From: natebegeman at mac.com (Nate Begeman)
Date: Tue, 1 May 2007 00:57:37 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCRegisterInfo.td
Message-ID: <200705010557.l415vbBF005233@zion.cs.uiuc.edu>
Changes in directory llvm/lib/Target/PowerPC:
PPCRegisterInfo.td updated: 1.44 -> 1.45
---
Log message:
llvm bug #1350, parts 1, 2, and 3.
---
Diffs of the changes: (+50 -1)
PPCRegisterInfo.td | 51 ++++++++++++++++++++++++++++++++++++++++++++++++++-
1 files changed, 50 insertions(+), 1 deletion(-)
Index: llvm/lib/Target/PowerPC/PPCRegisterInfo.td
diff -u llvm/lib/Target/PowerPC/PPCRegisterInfo.td:1.44 llvm/lib/Target/PowerPC/PPCRegisterInfo.td:1.45
--- llvm/lib/Target/PowerPC/PPCRegisterInfo.td:1.44 Mon Jan 29 16:57:48 2007
+++ llvm/lib/Target/PowerPC/PPCRegisterInfo.td Tue May 1 00:57:02 2007
@@ -43,10 +43,16 @@
}
// CR - One of the 8 4-bit condition registers
-class CR num, string n> : PPCReg {
+class CR num, string n> : PPCReg {
+ field bits<3> Num = num;
+}
+
+// CRBIT - One of the 32 1-bit condition register fields
+class CRBIT num, string n> : PPCReg {
field bits<5> Num = num;
}
+
// General-purpose registers
def R0 : GPR< 0, "r0">, DwarfRegNum<0>;
def R1 : GPR< 1, "r1">, DwarfRegNum<1>;
@@ -193,6 +199,49 @@
def CR6 : CR<6, "cr6">, DwarfRegNum<74>;
def CR7 : CR<7, "cr7">, DwarfRegNum<75>;
+// Condition register bits
+def CR0LT : CRBIT< 0, "0">, DwarfRegNum<0>;
+def CR0GT : CRBIT< 1, "1">, DwarfRegNum<0>;
+def CR0EQ : CRBIT< 2, "2">, DwarfRegNum<0>;
+def CR0UN : CRBIT< 3, "3">, DwarfRegNum<0>;
+def CR1LT : CRBIT< 4, "4">, DwarfRegNum<0>;
+def CR1GT : CRBIT< 5, "5">, DwarfRegNum<0>;
+def CR1EQ : CRBIT< 6, "6">, DwarfRegNum<0>;
+def CR1UN : CRBIT< 7, "7">, DwarfRegNum<0>;
+def CR2LT : CRBIT< 8, "8">, DwarfRegNum<0>;
+def CR2GT : CRBIT< 9, "9">, DwarfRegNum<0>;
+def CR2EQ : CRBIT<10, "10">, DwarfRegNum<0>;
+def CR2UN : CRBIT<11, "11">, DwarfRegNum<0>;
+def CR3LT : CRBIT<12, "12">, DwarfRegNum<0>;
+def CR3GT : CRBIT<13, "13">, DwarfRegNum<0>;
+def CR3EQ : CRBIT<14, "14">, DwarfRegNum<0>;
+def CR3UN : CRBIT<15, "15">, DwarfRegNum<0>;
+def CR4LT : CRBIT<16, "16">, DwarfRegNum<0>;
+def CR4GT : CRBIT<17, "17">, DwarfRegNum<0>;
+def CR4EQ : CRBIT<18, "18">, DwarfRegNum<0>;
+def CR4UN : CRBIT<19, "19">, DwarfRegNum<0>;
+def CR5LT : CRBIT<20, "20">, DwarfRegNum<0>;
+def CR5GT : CRBIT<21, "21">, DwarfRegNum<0>;
+def CR5EQ : CRBIT<22, "22">, DwarfRegNum<0>;
+def CR5UN : CRBIT<23, "23">, DwarfRegNum<0>;
+def CR6LT : CRBIT<24, "24">, DwarfRegNum<0>;
+def CR6GT : CRBIT<25, "25">, DwarfRegNum<0>;
+def CR6EQ : CRBIT<26, "26">, DwarfRegNum<0>;
+def CR6UN : CRBIT<27, "27">, DwarfRegNum<0>;
+def CR7LT : CRBIT<28, "28">, DwarfRegNum<0>;
+def CR7GT : CRBIT<29, "29">, DwarfRegNum<0>;
+def CR7EQ : CRBIT<30, "30">, DwarfRegNum<0>;
+def CR7UN : CRBIT<31, "31">, DwarfRegNum<0>;
+
+def : SubRegSet<1, [CR0, CR1, CR2, CR3, CR4, CR5, CR6, CR7],
+ [CR0LT, CR1LT, CR2LT, CR3LT, CR4LT, CR5LT, CR6LT, CR7LT]>;
+def : SubRegSet<2, [CR0, CR1, CR2, CR3, CR4, CR5, CR6, CR7],
+ [CR0GT, CR1GT, CR2GT, CR3GT, CR4GT, CR5GT, CR6GT, CR7GT]>;
+def : SubRegSet<3, [CR0, CR1, CR2, CR3, CR4, CR5, CR6, CR7],
+ [CR0EQ, CR1EQ, CR2EQ, CR3EQ, CR4EQ, CR5EQ, CR6EQ, CR7EQ]>;
+def : SubRegSet<4, [CR0, CR1, CR2, CR3, CR4, CR5, CR6, CR7],
+ [CR0UN, CR1UN, CR2UN, CR3UN, CR4UN, CR5UN, CR6UN, CR7UN]>;
+
// Link register
def LR : SPR<8, "lr">, DwarfRegNum<65>;
//let Aliases = [LR] in
From natebegeman at mac.com Tue May 1 00:57:37 2007
From: natebegeman at mac.com (Nate Begeman)
Date: Tue, 1 May 2007 00:57:37 -0500
Subject: [llvm-commits] CVS: llvm/utils/TableGen/RegisterInfoEmitter.cpp
Message-ID: <200705010557.l415vb52005240@zion.cs.uiuc.edu>
Changes in directory llvm/utils/TableGen:
RegisterInfoEmitter.cpp updated: 1.52 -> 1.53
---
Log message:
llvm bug #1350, parts 1, 2, and 3.
---
Diffs of the changes: (+36 -0)
RegisterInfoEmitter.cpp | 36 ++++++++++++++++++++++++++++++++++++
1 files changed, 36 insertions(+)
Index: llvm/utils/TableGen/RegisterInfoEmitter.cpp
diff -u llvm/utils/TableGen/RegisterInfoEmitter.cpp:1.52 llvm/utils/TableGen/RegisterInfoEmitter.cpp:1.53
--- llvm/utils/TableGen/RegisterInfoEmitter.cpp:1.52 Fri Apr 20 19:55:29 2007
+++ llvm/utils/TableGen/RegisterInfoEmitter.cpp Tue May 1 00:57:02 2007
@@ -61,6 +61,7 @@
<< " " << ClassName
<< "(int CallFrameSetupOpcode = -1, int CallFrameDestroyOpcode = -1);\n"
<< " int getDwarfRegNum(unsigned RegNum) const;\n"
+ << " unsigned getSubReg(unsigned RegNo, unsigned Index) const;\n"
<< "};\n\n";
const std::vector &RegisterClasses =
@@ -322,6 +323,7 @@
std::map > RegisterSubRegs;
std::map > RegisterSuperRegs;
std::map > RegisterAliases;
+ std::map > > SubRegVectors;
const std::vector &Regs = Target.getRegisters();
for (unsigned i = 0, e = Regs.size(); i != e; ++i) {
@@ -441,6 +443,40 @@
std::string ClassName = Target.getName() + "GenRegisterInfo";
+ // Calculate the mapping of subregister+index pairs to physical registers.
+ std::vector SubRegs = Records.getAllDerivedDefinitions("SubRegSet");
+ for (unsigned i = 0, e = SubRegs.size(); i != e; ++i) {
+ int subRegIndex = SubRegs[i]->getValueAsInt("index");
+ std::vector From = SubRegs[i]->getValueAsListOfDefs("From");
+ std::vector To = SubRegs[i]->getValueAsListOfDefs("To");
+
+ assert((From.size() == To.size()) &&
+ "SubRegSet has mismatched from/to size");
+
+ // For each entry in from/to vectors, insert the to register at index
+ for (unsigned ii = 0, ee = From.size(); ii != ee; ++ii)
+ SubRegVectors[From[ii]].push_back(std::make_pair(subRegIndex, To[ii]));
+ }
+
+ // Emit the subregister + index mapping function based on the information
+ // calculated above.
+ OS << "unsigned " << ClassName
+ << "::getSubReg(unsigned RegNo, unsigned Index) const {\n"
+ << " switch (RegNo) {\n"
+ << " default: abort(); break;\n";
+ for (std::map > >::iterator
+ I = SubRegVectors.begin(), E = SubRegVectors.end(); I != E; ++I) {
+ OS << " case " << getQualifiedName(I->first) << ":\n";
+ OS << " switch (Index) {\n";
+ OS << " default: abort(); break;\n";
+ for (unsigned i = 0, e = I->second.size(); i != e; ++i)
+ OS << " case " << (I->second)[i].first << ": return "
+ << getQualifiedName((I->second)[i].second) << ";\n";
+ OS << " }; break;\n";
+ }
+ OS << " };\n";
+ OS << "}\n\n";
+
// Emit the constructor of the class...
OS << ClassName << "::" << ClassName
<< "(int CallFrameSetupOpcode, int CallFrameDestroyOpcode)\n"
From natebegeman at mac.com Tue May 1 00:57:37 2007
From: natebegeman at mac.com (Nate Begeman)
Date: Tue, 1 May 2007 00:57:37 -0500
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/MachineInstr.cpp
Message-ID: <200705010557.l415vbKe005242@zion.cs.uiuc.edu>
Changes in directory llvm/lib/CodeGen:
MachineInstr.cpp updated: 1.147 -> 1.148
---
Log message:
llvm bug #1350, parts 1, 2, and 3.
---
Diffs of the changes: (+2 -2)
MachineInstr.cpp | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
Index: llvm/lib/CodeGen/MachineInstr.cpp
diff -u llvm/lib/CodeGen/MachineInstr.cpp:1.147 llvm/lib/CodeGen/MachineInstr.cpp:1.148
--- llvm/lib/CodeGen/MachineInstr.cpp:1.147 Thu Apr 26 13:59:33 2007
+++ llvm/lib/CodeGen/MachineInstr.cpp Tue May 1 00:57:02 2007
@@ -39,7 +39,7 @@
Op.IsKill = false;
Op.IsDead = false;
Op.contents.RegNo = *ImpDefs;
- Op.offset = 0;
+ Op.auxInfo.subReg = 0;
Operands.push_back(Op);
}
if (TID->ImplicitUses)
@@ -51,7 +51,7 @@
Op.IsKill = false;
Op.IsDead = false;
Op.contents.RegNo = *ImpUses;
- Op.offset = 0;
+ Op.auxInfo.subReg = 0;
Operands.push_back(Op);
}
}
From natebegeman at mac.com Tue May 1 00:57:38 2007
From: natebegeman at mac.com (Nate Begeman)
Date: Tue, 1 May 2007 00:57:38 -0500
Subject: [llvm-commits] CVS: llvm/include/llvm/Target/MRegisterInfo.h
Message-ID: <200705010557.l415vcbp005251@zion.cs.uiuc.edu>
Changes in directory llvm/include/llvm/Target:
MRegisterInfo.h updated: 1.108 -> 1.109
---
Log message:
llvm bug #1350, parts 1, 2, and 3.
---
Diffs of the changes: (+5 -1)
MRegisterInfo.h | 6 +++++-
1 files changed, 5 insertions(+), 1 deletion(-)
Index: llvm/include/llvm/Target/MRegisterInfo.h
diff -u llvm/include/llvm/Target/MRegisterInfo.h:1.108 llvm/include/llvm/Target/MRegisterInfo.h:1.109
--- llvm/include/llvm/Target/MRegisterInfo.h:1.108 Mon Apr 30 19:47:46 2007
+++ llvm/include/llvm/Target/MRegisterInfo.h Tue May 1 00:57:02 2007
@@ -41,7 +41,7 @@
/// The SubRegs field is a zero terminated array of registers that are
/// sub-registers of the specific register, e.g. AL, AH are sub-registers of AX.
/// The SuperRegs field is a zero terminated array of registers that are
-/// super-registers of the specific register, e.g. RAX, EAX, are sub-registers
+/// super-registers of the specific register, e.g. RAX, EAX, are super-registers
/// of AX.
///
struct TargetRegisterDesc {
@@ -354,6 +354,10 @@
/// register scavenger to determine what registers are free.
virtual BitVector getReservedRegs(const MachineFunction &MF) const = 0;
+ /// getSubReg - Returns the physical register number of sub-register "Index"
+ /// for physical register RegNo.
+ virtual unsigned getSubReg(unsigned RegNo, unsigned Index) const = 0;
+
//===--------------------------------------------------------------------===//
// Register Class Information
//
From natebegeman at mac.com Tue May 1 01:08:55 2007
From: natebegeman at mac.com (Nate Begeman)
Date: Tue, 1 May 2007 01:08:55 -0500
Subject: [llvm-commits] CVS: llvm/utils/TableGen/RegisterInfoEmitter.cpp
Message-ID: <200705010608.l4168tAn005539@zion.cs.uiuc.edu>
Changes in directory llvm/utils/TableGen:
RegisterInfoEmitter.cpp updated: 1.53 -> 1.54
---
Log message:
A bit of feedback from Chris that I missed; error rather than asserting.
---
Diffs of the changes: (+5 -2)
RegisterInfoEmitter.cpp | 7 +++++--
1 files changed, 5 insertions(+), 2 deletions(-)
Index: llvm/utils/TableGen/RegisterInfoEmitter.cpp
diff -u llvm/utils/TableGen/RegisterInfoEmitter.cpp:1.53 llvm/utils/TableGen/RegisterInfoEmitter.cpp:1.54
--- llvm/utils/TableGen/RegisterInfoEmitter.cpp:1.53 Tue May 1 00:57:02 2007
+++ llvm/utils/TableGen/RegisterInfoEmitter.cpp Tue May 1 01:08:36 2007
@@ -450,8 +450,11 @@
std::vector From = SubRegs[i]->getValueAsListOfDefs("From");
std::vector To = SubRegs[i]->getValueAsListOfDefs("To");
- assert((From.size() == To.size()) &&
- "SubRegSet has mismatched from/to size");
+ if (From.size() != To.size()) {
+ cerr << "Error: register list and sub-register list not of equal length"
+ << " in SubRegSet\n";
+ exit(1);
+ }
// For each entry in from/to vectors, insert the to register at index
for (unsigned ii = 0, ee = From.size(); ii != ee; ++ii)
From sabre at nondot.org Tue May 1 02:02:15 2007
From: sabre at nondot.org (Chris Lattner)
Date: Tue, 1 May 2007 02:02:15 -0500
Subject: [llvm-commits] CVS: llvm/lib/Bitcode/Reader/BitcodeReader.cpp
BitcodeReader.h
Message-ID: <200705010702.l4172Fup006430@zion.cs.uiuc.edu>
Changes in directory llvm/lib/Bitcode/Reader:
BitcodeReader.cpp updated: 1.20 -> 1.21
BitcodeReader.h updated: 1.14 -> 1.15
---
Log message:
handle function-level forward references, read binops.
---
Diffs of the changes: (+147 -22)
BitcodeReader.cpp | 150 ++++++++++++++++++++++++++++++++++++++++++++++--------
BitcodeReader.h | 19 ++++++
2 files changed, 147 insertions(+), 22 deletions(-)
Index: llvm/lib/Bitcode/Reader/BitcodeReader.cpp
diff -u llvm/lib/Bitcode/Reader/BitcodeReader.cpp:1.20 llvm/lib/Bitcode/Reader/BitcodeReader.cpp:1.21
--- llvm/lib/Bitcode/Reader/BitcodeReader.cpp:1.20 Tue May 1 00:52:21 2007
+++ llvm/lib/Bitcode/Reader/BitcodeReader.cpp Tue May 1 02:01:57 2007
@@ -15,6 +15,7 @@
#include "BitcodeReader.h"
#include "llvm/Constants.h"
#include "llvm/DerivedTypes.h"
+#include "llvm/Instructions.h"
#include "llvm/Module.h"
#include "llvm/ADT/SmallString.h"
#include "llvm/Support/MathExtras.h"
@@ -125,10 +126,9 @@
NumOperands = Idx+1;
}
- if (Uses[Idx]) {
- assert(Ty == getOperand(Idx)->getType() &&
- "Type mismatch in constant table!");
- return cast(getOperand(Idx));
+ if (Value *V = Uses[Idx]) {
+ assert(Ty == V->getType() && "Type mismatch in constant table!");
+ return cast(V);
}
// Create and return a placeholder, which will later be RAUW'd.
@@ -137,6 +137,25 @@
return C;
}
+Value *BitcodeReaderValueList::getValueFwdRef(unsigned Idx, const Type *Ty) {
+ if (Idx >= size()) {
+ // Insert a bunch of null values.
+ Uses.resize(Idx+1);
+ OperandList = &Uses[0];
+ NumOperands = Idx+1;
+ }
+
+ if (Value *V = Uses[Idx]) {
+ assert((Ty == 0 || Ty == V->getType()) && "Type mismatch in value table!");
+ return V;
+ }
+
+ // Create and return a placeholder, which will later be RAUW'd.
+ Value *V = new Argument(Ty);
+ Uses[Idx].init(V, this);
+ return V;
+}
+
const Type *BitcodeReader::getTypeByID(unsigned ID, bool isTypeTable) {
// If the TypeID is in range, return it.
@@ -151,7 +170,6 @@
return TypeList.back().get();
}
-
bool BitcodeReader::ParseTypeTable() {
if (Stream.EnterSubBlock())
return Error("Malformed block record");
@@ -643,18 +661,7 @@
}
}
- if (NextCstNo == ValueList.size())
- ValueList.push_back(V);
- else if (ValueList[NextCstNo] == 0)
- ValueList.initVal(NextCstNo, V);
- else {
- // If there was a forward reference to this constant,
- Value *OldV = ValueList[NextCstNo];
- ValueList.setOperand(NextCstNo, V);
- OldV->replaceAllUsesWith(V);
- delete OldV;
- }
-
+ ValueList.AssignValue(V, NextCstNo);
++NextCstNo;
}
}
@@ -998,6 +1005,8 @@
for(Function::arg_iterator I = F->arg_begin(), E = F->arg_end(); I != E; ++I)
ValueList.push_back(I);
+ unsigned NextValueNo = ValueList.size();
+
// Read all the records.
SmallVector Record;
while (1) {
@@ -1016,6 +1025,7 @@
break;
case bitc::CONSTANTS_BLOCK_ID:
if (ParseConstants()) return true;
+ NextValueNo = ValueList.size();
break;
case bitc::VALUE_SYMTAB_BLOCK_ID:
if (ParseValueSymbolTable()) return true;
@@ -1031,19 +1041,115 @@
// Read a record.
Record.clear();
+ Instruction *I = 0;
+ BasicBlock *CurBB = 0;
+ unsigned CurBBNo = 0;
switch (Stream.ReadRecord(Code, Record)) {
- default: // Default behavior: unknown constant
+ default: // Default behavior: reject
+ return Error("Unknown instruction");
case bitc::FUNC_CODE_DECLAREBLOCKS: // DECLAREBLOCKS: [nblocks]
- if (Record.size() < 1)
- return Error("Invalid FUNC_CODE_DECLAREBLOCKS record");
+ if (Record.size() < 1 || Record[0] == 0)
+ return Error("Invalid DECLAREBLOCKS record");
// Create all the basic blocks for the function.
FunctionBBs.resize(Record.size());
for (unsigned i = 0, e = FunctionBBs.size(); i != e; ++i)
FunctionBBs[i] = new BasicBlock("", F);
- break;
- }
+ CurBB = FunctionBBs[0];
+ continue;
+
+ case bitc::FUNC_CODE_INST_BINOP: {
+ // BINOP: [opcode, ty, opval, opval]
+ if (Record.size() < 4) return Error("Invalid BINOP record");
+ const Type *Ty = getTypeByID(Record[1]);
+ int Opc = GetDecodedBinaryOpcode(Record[0], Ty);
+ Value *LHS = getFnValueByID(Record[2], Ty);
+ Value *RHS = getFnValueByID(Record[3], Ty);
+ if (Opc == -1 || Ty == 0 || LHS == 0 || RHS == 0)
+ return Error("Invalid BINOP record");
+ I = BinaryOperator::create((Instruction::BinaryOps)Opc, LHS, RHS);
+ break;
+ }
+#if 0
+ case bitc::FUNC_CODE_INST_CAST:
+ // CAST: [opcode, ty, opty, opval]
+ case bitc::FUNC_CODE_INST_GEP:
+ // GEP: [n, n x operands]
+ case bitc::FUNC_CODE_INST_SELECT:
+ // SELECT: [ty, opval, opval, opval]
+ case bitc::FUNC_CODE_INST_EXTRACTELT:
+ // EXTRACTELT: [opty, opval, opval]
+ case bitc::FUNC_CODE_INST_INSERTELT:
+ // INSERTELT: [ty, opval, opval, opval]
+ case bitc::FUNC_CODE_INST_SHUFFLEVEC:
+ // SHUFFLEVEC: [ty, opval, opval, opval]
+ case bitc::FUNC_CODE_INST_CMP:
+ // CMP: [opty, opval, opval, pred]
+
+ case bitc::FUNC_CODE_INST_RET:
+ // RET: [opty,opval]
+ case bitc::FUNC_CODE_INST_BR:
+ // BR: [opval, bb#, bb#] or [bb#]
+ case bitc::FUNC_CODE_INST_SWITCH:
+ // SWITCH: [opty, opval, n, n x ops]
+ case bitc::FUNC_CODE_INST_INVOKE:
+ // INVOKE: [fnty, op0,op1,op2, ...]
+ case bitc::FUNC_CODE_INST_UNWIND:
+ // UNWIND
+ case bitc::FUNC_CODE_INST_UNREACHABLE:
+ // UNREACHABLE
+
+ case bitc::FUNC_CODE_INST_PHI:
+ // PHI: [ty, #ops, val0,bb0, ...]
+ case bitc::FUNC_CODE_INST_MALLOC:
+ // MALLOC: [instty, op, align]
+ case bitc::FUNC_CODE_INST_FREE:
+ // FREE: [opty, op]
+ case bitc::FUNC_CODE_INST_ALLOCA:
+ // ALLOCA: [instty, op, align]
+ case bitc::FUNC_CODE_INST_LOAD:
+ // LOAD: [opty, op, align, vol]
+ case bitc::FUNC_CODE_INST_STORE:
+ // STORE: [ptrty,val,ptr, align, vol]
+ case bitc::FUNC_CODE_INST_CALL:
+ // CALL: [fnty, fnid, arg0, arg1...]
+ case bitc::FUNC_CODE_INST_VAARG:
+ // VAARG: [valistty, valist, instty]
+ break;
+#endif
+ }
+
+ // Add instruction to end of current BB. If there is no current BB, reject
+ // this file.
+ if (CurBB == 0) {
+ delete I;
+ return Error("Invalid instruction with no BB");
+ }
+ CurBB->getInstList().push_back(I);
+
+ // If this was a terminator instruction, move to the next block.
+ if (isa(I)) {
+ ++CurBBNo;
+ CurBB = CurBBNo < FunctionBBs.size() ? FunctionBBs[CurBBNo] : 0;
+ }
+
+ // Non-void values get registered in the value table for future use.
+ if (I && I->getType() != Type::VoidTy)
+ ValueList.AssignValue(I, NextValueNo++);
}
+ // Check the function list for unresolved values.
+ if (Argument *A = dyn_cast(ValueList.back())) {
+ if (A->getParent() == 0) {
+ // We found at least one unresolved value. Nuke them all to avoid leaks.
+ for (unsigned i = ModuleValueListSize, e = ValueList.size(); i != e; ++i){
+ if ((A = dyn_cast(ValueList.back())) && A->getParent() == 0) {
+ A->replaceAllUsesWith(UndefValue::get(A->getType()));
+ delete A;
+ }
+ }
+ }
+ return Error("Never resolved value found in function!");
+ }
// Trim the value list down to the size it was before we parsed this function.
ValueList.shrinkTo(ModuleValueListSize);
Index: llvm/lib/Bitcode/Reader/BitcodeReader.h
diff -u llvm/lib/Bitcode/Reader/BitcodeReader.h:1.14 llvm/lib/Bitcode/Reader/BitcodeReader.h:1.15
--- llvm/lib/Bitcode/Reader/BitcodeReader.h:1.14 Tue May 1 00:52:21 2007
+++ llvm/lib/Bitcode/Reader/BitcodeReader.h Tue May 1 02:01:57 2007
@@ -51,6 +51,22 @@
virtual void print(std::ostream&) const {}
Constant *getConstantFwdRef(unsigned Idx, const Type *Ty);
+ Value *getValueFwdRef(unsigned Idx, const Type *Ty);
+
+ void AssignValue(Value *V, unsigned Idx) {
+ if (Idx == size()) {
+ push_back(V);
+ } else if (Value *OldV = getOperand(Idx)) {
+ // If there was a forward reference to this value, replace it.
+ setOperand(Idx, V);
+ OldV->replaceAllUsesWith(V);
+ delete OldV;
+ } else {
+ initVal(Idx, V);
+ }
+ }
+
+private:
void initVal(unsigned Idx, Value *V) {
assert(Uses[Idx] == 0 && "Cannot init an already init'd Use!");
Uses[Idx].init(V, this);
@@ -113,6 +129,9 @@
bool ParseBitcode();
private:
const Type *getTypeByID(unsigned ID, bool isTypeTable = false);
+ Value *getFnValueByID(unsigned ID, const Type *Ty) {
+ return ValueList.getValueFwdRef(ID, Ty);
+ }
bool ParseModule(const std::string &ModuleID);
bool ParseTypeTable();
From sabre at nondot.org Tue May 1 02:03:55 2007
From: sabre at nondot.org (Chris Lattner)
Date: Tue, 1 May 2007 02:03:55 -0500
Subject: [llvm-commits] CVS: llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
Message-ID: <200705010703.l4173tJ2006498@zion.cs.uiuc.edu>
Changes in directory llvm/lib/Bitcode/Writer:
BitcodeWriter.cpp updated: 1.18 -> 1.19
---
Log message:
fix build with non-buggy compilers
---
Diffs of the changes: (+11 -10)
BitcodeWriter.cpp | 21 +++++++++++----------
1 files changed, 11 insertions(+), 10 deletions(-)
Index: llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
diff -u llvm/lib/Bitcode/Writer/BitcodeWriter.cpp:1.18 llvm/lib/Bitcode/Writer/BitcodeWriter.cpp:1.19
--- llvm/lib/Bitcode/Writer/BitcodeWriter.cpp:1.18 Mon Apr 30 21:14:57 2007
+++ llvm/lib/Bitcode/Writer/BitcodeWriter.cpp Tue May 1 02:03:37 2007
@@ -571,7 +571,7 @@
for (unsigned i = 0, e = I.getNumOperands(); i != e; ++i)
Vals.push_back(VE.getValueID(I.getOperand(i)));
break;
- case Instruction::Invoke:
+ case Instruction::Invoke: {
Code = bitc::FUNC_CODE_INST_INVOKE;
// FIXME: param attrs
Vals.push_back(VE.getTypeID(I.getOperand(0)->getType()));
@@ -596,6 +596,7 @@
}
}
break;
+ }
case Instruction::Unwind:
Code = bitc::FUNC_CODE_INST_UNWIND;
break;
@@ -658,18 +659,18 @@
for (unsigned i = 0, e = FTy->getNumParams(); i != e; ++i)
Vals.push_back(VE.getValueID(I.getOperand(i+1))); // fixed param.
- // Emit type/value pairs for varargs params.
- if (FTy->isVarArg()) {
- unsigned NumVarargs = I.getNumOperands()-1-FTy->getNumParams();
- Vals.push_back(NumVarargs);
- for (unsigned i = I.getNumOperands()-NumVarargs, e = I.getNumOperands();
- i != e; ++i) {
- Vals.push_back(VE.getTypeID(I.getOperand(i)->getType()));
- Vals.push_back(VE.getValueID(I.getOperand(i)));
- }
+ // Emit type/value pairs for varargs params.
+ if (FTy->isVarArg()) {
+ unsigned NumVarargs = I.getNumOperands()-1-FTy->getNumParams();
+ Vals.push_back(NumVarargs);
+ for (unsigned i = I.getNumOperands()-NumVarargs, e = I.getNumOperands();
+ i != e; ++i) {
+ Vals.push_back(VE.getTypeID(I.getOperand(i)->getType()));
+ Vals.push_back(VE.getValueID(I.getOperand(i)));
}
}
break;
+ }
case Instruction::VAArg:
Code = bitc::FUNC_CODE_INST_VAARG;
From evan.cheng at apple.com Tue May 1 03:53:58 2007
From: evan.cheng at apple.com (Evan Cheng)
Date: Tue, 1 May 2007 03:53:58 -0500
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Message-ID: <200705010853.l418rw6E017457@zion.cs.uiuc.edu>
Changes in directory llvm/lib/CodeGen/SelectionDAG:
DAGCombiner.cpp updated: 1.297 -> 1.298
---
Log message:
Forgot about chain result; also UNDEF cannot have multiple values.
---
Diffs of the changes: (+12 -12)
DAGCombiner.cpp | 24 ++++++++++++------------
1 files changed, 12 insertions(+), 12 deletions(-)
Index: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.297 llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.298
--- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.297 Mon Apr 30 19:38:21 2007
+++ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Tue May 1 03:53:39 2007
@@ -3331,19 +3331,19 @@
// the updated indexed value in case of indexed loads), change uses of the
// chain value into uses of the chain input (i.e. delete the dead load).
if (!LD->isVolatile()) {
- bool HasUses = false;
- SmallVector VTs;
- for (unsigned i = 0, e = N->getNumValues(); i != e; ++i) {
- if (!N->hasNUsesOfValue(0, i)) {
- HasUses = true;
- break;
+ if (N->getValueType(1) == MVT::Other) {
+ // Unindexed loads.
+ if (N->hasNUsesOfValue(0, 0))
+ return CombineTo(N, DAG.getNode(ISD::UNDEF, N->getValueType(0)), Chain);
+ } else {
+ // Indexed loads.
+ assert(N->getValueType(2) == MVT::Other && "Malformed indexed loads?");
+ if (N->hasNUsesOfValue(0, 0) && N->hasNUsesOfValue(0, 1)) {
+ SDOperand Undef0 = DAG.getNode(ISD::UNDEF, N->getValueType(0));
+ SDOperand Undef1 = DAG.getNode(ISD::UNDEF, N->getValueType(1));
+ SDOperand To[] = { Undef0, Undef1, Chain };
+ return CombineTo(N, To, 3);
}
- VTs.push_back(N->getValueType(i));
- }
- if (!HasUses) {
- SmallVector Ops;
- return CombineTo(N, DAG.getNode(ISD::UNDEF, &VTs[0], VTs.size(), 0, 0),
- Chain);
}
}
From evan.cheng at apple.com Tue May 1 03:53:58 2007
From: evan.cheng at apple.com (Evan Cheng)
Date: Tue, 1 May 2007 01:53:58 -0700
Subject: [llvm-commits]
CVS: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
In-Reply-To: <1E6DD6BA-308B-406A-AA3F-CD634D9A3412@apple.com>
References: <200705010038.l410ccOi031037@zion.cs.uiuc.edu>
<1E6DD6BA-308B-406A-AA3F-CD634D9A3412@apple.com>
Message-ID:
Doh. Brain cramp.
Evan
On Apr 30, 2007, at 9:39 PM, Chris Lattner wrote:
>> + bool HasUses = false;
>> + SmallVector VTs;
>> + for (unsigned i = 0, e = N->getNumValues(); i != e; ++i) {
>> + if (!N->hasNUsesOfValue(0, i)) {
>> + HasUses = true;
>> + break;
>> + }
>> + VTs.push_back(N->getValueType(i));
>> + }
>> + if (!HasUses) {
>> + SmallVector Ops;
>> + return CombineTo(N, DAG.getNode(ISD::UNDEF, &VTs[0], VTs.size
>> (), 0, 0),
>> + Chain);
>
> This can never trigger and isn't right if it did.
>
> #1: This should trigger if the chain has uses but the other values do
> not. If the entire node is dead, it will already have been removed.
>
> #2. you can't create an undef with multiple results, you have to
> create multiple undefs :)
>
> I'd suggest just writing this as:
>
> if (N->getValueType(1) == MVT::Other) {
> // single result case.
> } else {
> assert(N->getValueType(2) == MVT::Other);
> // multi result case.
> }
>
> This lets you drop the looping and smallvector.
>
> -Chris
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
From evan.cheng at apple.com Tue May 1 03:58:45 2007
From: evan.cheng at apple.com (Evan Cheng)
Date: Tue, 1 May 2007 03:58:45 -0500
Subject: [llvm-commits] CVS: llvm/include/llvm/Target/MRegisterInfo.h
Message-ID: <200705010858.l418wjA6017545@zion.cs.uiuc.edu>
Changes in directory llvm/include/llvm/Target:
MRegisterInfo.h updated: 1.109 -> 1.110
---
Log message:
Add SPAdj parameter to account for call frame setup SP adjustment.
---
Diffs of the changes: (+4 -3)
MRegisterInfo.h | 7 ++++---
1 files changed, 4 insertions(+), 3 deletions(-)
Index: llvm/include/llvm/Target/MRegisterInfo.h
diff -u llvm/include/llvm/Target/MRegisterInfo.h:1.109 llvm/include/llvm/Target/MRegisterInfo.h:1.110
--- llvm/include/llvm/Target/MRegisterInfo.h:1.109 Tue May 1 00:57:02 2007
+++ llvm/include/llvm/Target/MRegisterInfo.h Tue May 1 03:58:27 2007
@@ -512,11 +512,12 @@
/// referenced by the iterator contains an MO_FrameIndex operand which must be
/// eliminated by this method. This method may modify or replace the
/// specified instruction, as long as it keeps the iterator pointing the the
- /// finished product. The return value is the number of instructions
- /// added to (negative if removed from) the basic block.
+ /// finished product. SPAdj is the SP adjustment due to call frame setup
+ /// instruction. The return value is the number of instructions added to
+ /// (negative if removed from) the basic block.
///
virtual void eliminateFrameIndex(MachineBasicBlock::iterator MI,
- RegScavenger *RS = NULL) const = 0;
+ int SPAdj, RegScavenger *RS=NULL) const = 0;
/// emitProlog/emitEpilog - These methods insert prolog and epilog code into
/// the function. The return value is the number of instructions
From evan.cheng at apple.com Tue May 1 03:59:37 2007
From: evan.cheng at apple.com (Evan Cheng)
Date: Tue, 1 May 2007 03:59:37 -0500
Subject: [llvm-commits] CVS: llvm/include/llvm/CodeGen/RegisterScavenging.h
Message-ID: <200705010859.l418xbmp017574@zion.cs.uiuc.edu>
Changes in directory llvm/include/llvm/CodeGen:
RegisterScavenging.h updated: 1.12 -> 1.13
---
Log message:
Pass call frame setup SP adjustment along to eliminateFrameIndex().
---
Diffs of the changes: (+6 -5)
RegisterScavenging.h | 11 ++++++-----
1 files changed, 6 insertions(+), 5 deletions(-)
Index: llvm/include/llvm/CodeGen/RegisterScavenging.h
diff -u llvm/include/llvm/CodeGen/RegisterScavenging.h:1.12 llvm/include/llvm/CodeGen/RegisterScavenging.h:1.13
--- llvm/include/llvm/CodeGen/RegisterScavenging.h:1.12 Mon Mar 26 17:23:54 2007
+++ llvm/include/llvm/CodeGen/RegisterScavenging.h Tue May 1 03:59:18 2007
@@ -117,12 +117,13 @@
int getScavengingFrameIndex() const { return ScavengingFrameIndex; }
/// scavengeRegister - Make a register of the specific register class
- /// available and do the appropriate bookkeeping. Returns the scavenged
- /// register.
+ /// available and do the appropriate bookkeeping. SPAdj is the stack
+ /// adjustment due to call frame, it's passed along to eliminateFrameIndex().
+ /// Returns the scavenged register.
unsigned scavengeRegister(const TargetRegisterClass *RegClass,
- MachineBasicBlock::iterator I);
- unsigned scavengeRegister(const TargetRegisterClass *RegClass) {
- return scavengeRegister(RegClass, MBBI);
+ MachineBasicBlock::iterator I, int SPAdj);
+ unsigned scavengeRegister(const TargetRegisterClass *RegClass, int SPAdj) {
+ return scavengeRegister(RegClass, MBBI, SPAdj);
}
private:
From evan.cheng at apple.com Tue May 1 04:02:00 2007
From: evan.cheng at apple.com (Evan Cheng)
Date: Tue, 1 May 2007 04:02:00 -0500
Subject: [llvm-commits] CVS: llvm/lib/CodeGen/PrologEpilogInserter.cpp
RegisterScavenging.cpp
Message-ID: <200705010902.l41920cI017643@zion.cs.uiuc.edu>
Changes in directory llvm/lib/CodeGen:
PrologEpilogInserter.cpp updated: 1.83 -> 1.84
RegisterScavenging.cpp updated: 1.16 -> 1.17
---
Log message:
If call frame is not part of stack frame and no dynamic alloc, eliminateFrameIndex() must adjust SP offset with size of call frames.
---
Diffs of the changes: (+49 -18)
PrologEpilogInserter.cpp | 58 +++++++++++++++++++++++++++++++++++------------
RegisterScavenging.cpp | 9 ++++---
2 files changed, 49 insertions(+), 18 deletions(-)
Index: llvm/lib/CodeGen/PrologEpilogInserter.cpp
diff -u llvm/lib/CodeGen/PrologEpilogInserter.cpp:1.83 llvm/lib/CodeGen/PrologEpilogInserter.cpp:1.84
--- llvm/lib/CodeGen/PrologEpilogInserter.cpp:1.83 Mon Apr 30 19:51:28 2007
+++ llvm/lib/CodeGen/PrologEpilogInserter.cpp Tue May 1 04:01:42 2007
@@ -26,6 +26,7 @@
#include "llvm/Target/TargetFrameInfo.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Support/Compiler.h"
+#include "llvm/ADT/STLExtras.h"
#include
using namespace llvm;
@@ -151,9 +152,14 @@
MachineFrameInfo *FFI = Fn.getFrameInfo();
FFI->setHasCalls(HasCalls);
FFI->setMaxCallFrameSize(MaxCallFrameSize);
+
for (unsigned i = 0, e = FrameSDOps.size(); i != e; ++i) {
MachineBasicBlock::iterator I = FrameSDOps[i];
- RegInfo->eliminateCallFramePseudoInstr(Fn, *I->getParent(), I);
+ // If call frames are not being included as part of the stack frame,
+ // and there is no dynamic allocation (therefore referencing frame slots
+ // off sp), leave the pseudo ops alone. We'll eliminate them later.
+ if (RegInfo->hasReservedCallFrame(Fn) || RegInfo->hasFP(Fn))
+ RegInfo->eliminateCallFramePseudoInstr(Fn, *I->getParent(), I);
}
// Now figure out which *callee saved* registers are modified by the current
@@ -491,25 +497,49 @@
const TargetMachine &TM = Fn.getTarget();
assert(TM.getRegisterInfo() && "TM::getRegisterInfo() must be implemented!");
const MRegisterInfo &MRI = *TM.getRegisterInfo();
+ const TargetFrameInfo *TFI = TM.getFrameInfo();
+ bool StackGrowsDown =
+ TFI->getStackGrowthDirection() == TargetFrameInfo::StackGrowsDown;
+ int FrameSetupOpcode = MRI.getCallFrameSetupOpcode();
+ int FrameDestroyOpcode = MRI.getCallFrameDestroyOpcode();
for (MachineFunction::iterator BB = Fn.begin(), E = Fn.end(); BB != E; ++BB) {
+ int SPAdj = 0; // SP offset due to call frame setup / destroy.
if (RS) RS->enterBasicBlock(BB);
for (MachineBasicBlock::iterator I = BB->begin(); I != BB->end(); ) {
- MachineInstr *MI = I++;
- for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
- if (MI->getOperand(i).isFrameIndex()) {
- // If this instruction has a FrameIndex operand, we need to use that
- // target machine register info object to eliminate it.
- MRI.eliminateFrameIndex(MI, RS);
-
- // Revisit the instruction in full. Some instructions (e.g. inline
- // asm instructions) can have multiple frame indices.
- --I;
- MI = 0;
- break;
- }
+ MachineInstr *MI = I;
+
+ // Remember how much SP has been adjustment to create the call frame.
+ if (I->getOpcode() == FrameSetupOpcode ||
+ I->getOpcode() == FrameDestroyOpcode) {
+ int Size = I->getOperand(0).getImmedValue();
+ if ((!StackGrowsDown && I->getOpcode() == FrameSetupOpcode) ||
+ (StackGrowsDown && I->getOpcode() == FrameDestroyOpcode))
+ Size = -Size;
+ SPAdj += Size;
+ MachineBasicBlock::iterator PrevI = prior(I);
+ MRI.eliminateCallFramePseudoInstr(Fn, *BB, I);
+ // Visit the instructions created by eliminateCallFramePseudoInstr().
+ I = next(PrevI);
+ MI = NULL;
+ } else {
+ I++;
+ for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
+ if (MI->getOperand(i).isFrameIndex()) {
+ // If this instruction has a FrameIndex operand, we need to use that
+ // target machine register info object to eliminate it.
+ MRI.eliminateFrameIndex(MI, SPAdj, RS);
+
+ // Revisit the instruction in full. Some instructions (e.g. inline
+ // asm instructions) can have multiple frame indices.
+ --I;
+ MI = 0;
+ break;
+ }
+ }
// Update register states.
if (RS && MI) RS->forward(MI);
}
+ assert(SPAdj == 0 && "Unbalanced call frame setup / destroy pairs?");
}
}
Index: llvm/lib/CodeGen/RegisterScavenging.cpp
diff -u llvm/lib/CodeGen/RegisterScavenging.cpp:1.16 llvm/lib/CodeGen/RegisterScavenging.cpp:1.17
--- llvm/lib/CodeGen/RegisterScavenging.cpp:1.16 Thu Apr 26 13:59:33 2007
+++ llvm/lib/CodeGen/RegisterScavenging.cpp Tue May 1 04:01:42 2007
@@ -75,7 +75,7 @@
RegInfo->loadRegFromStackSlot(*MBB, MBBI, ScavengedReg,
ScavengingFrameIndex, ScavengedRC);
MachineBasicBlock::iterator II = prior(MBBI);
- RegInfo->eliminateFrameIndex(II, this);
+ RegInfo->eliminateFrameIndex(II, 0, this);
setUsed(ScavengedReg);
ScavengedReg = 0;
ScavengedRC = NULL;
@@ -243,7 +243,8 @@
}
unsigned RegScavenger::scavengeRegister(const TargetRegisterClass *RC,
- MachineBasicBlock::iterator I) {
+ MachineBasicBlock::iterator I,
+ int SPAdj) {
assert(ScavengingFrameIndex >= 0 &&
"Cannot scavenge a register without an emergency spill slot!");
@@ -277,12 +278,12 @@
RegInfo->loadRegFromStackSlot(*MBB, I, ScavengedReg,
ScavengingFrameIndex, ScavengedRC);
MachineBasicBlock::iterator II = prior(I);
- RegInfo->eliminateFrameIndex(II, this);
+ RegInfo->eliminateFrameIndex(II, SPAdj, this);
}
RegInfo->storeRegToStackSlot(*MBB, I, SReg, ScavengingFrameIndex, RC);
MachineBasicBlock::iterator II = prior(I);
- RegInfo->eliminateFrameIndex(II, this);
+ RegInfo->eliminateFrameIndex(II, SPAdj, this);
ScavengedReg = SReg;
ScavengedRC = RC;
From evan.cheng at apple.com Tue May 1 04:13:40 2007
From: evan.cheng at apple.com (Evan Cheng)
Date: Tue, 1 May 2007 04:13:40 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/ARM/ARMRegisterInfo.cpp
ARMRegisterInfo.h
Message-ID: <200705010913.l419DeHV018373@zion.cs.uiuc.edu>
Changes in directory llvm/lib/Target/ARM:
ARMRegisterInfo.cpp updated: 1.91 -> 1.92
ARMRegisterInfo.h updated: 1.18 -> 1.19
---
Log message:
eliminateFrameIndex() change.
---
Diffs of the changes: (+5 -4)
ARMRegisterInfo.cpp | 7 ++++---
ARMRegisterInfo.h | 2 +-
2 files changed, 5 insertions(+), 4 deletions(-)
Index: llvm/lib/Target/ARM/ARMRegisterInfo.cpp
diff -u llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.91 llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.92
--- llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.91 Mon Apr 30 19:52:08 2007
+++ llvm/lib/Target/ARM/ARMRegisterInfo.cpp Tue May 1 04:13:03 2007
@@ -689,7 +689,7 @@
}
void ARMRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
- RegScavenger *RS) const{
+ int SPAdj, RegScavenger *RS) const{
unsigned i = 0;
MachineInstr &MI = *II;
MachineBasicBlock &MBB = *MI.getParent();
@@ -705,7 +705,7 @@
unsigned FrameReg = ARM::SP;
int FrameIndex = MI.getOperand(i).getFrameIndex();
int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex) +
- MF.getFrameInfo()->getStackSize();
+ MF.getFrameInfo()->getStackSize() + SPAdj;
if (AFI->isGPRCalleeSavedArea1Frame(FrameIndex))
Offset -= AFI->getGPRCalleeSavedArea1Offset();
@@ -714,6 +714,7 @@
else if (AFI->isDPRCalleeSavedAreaFrame(FrameIndex))
Offset -= AFI->getDPRCalleeSavedAreaOffset();
else if (hasFP(MF)) {
+ assert(SPAdj == 0 && "Unexpected");
// There is alloca()'s in this function, must reference off the frame
// pointer instead.
FrameReg = getFrameRegister(MF);
@@ -988,7 +989,7 @@
unsigned ScratchReg = findScratchRegister(RS, &ARM::GPRRegClass, AFI);
if (ScratchReg == 0)
// No register is "free". Scavenge a register.
- ScratchReg = RS->scavengeRegister(&ARM::GPRRegClass, II);
+ ScratchReg = RS->scavengeRegister(&ARM::GPRRegClass, II, SPAdj);
emitARMRegPlusImmediate(MBB, II, ScratchReg, FrameReg,
isSub ? -Offset : Offset, TII);
MI.getOperand(i).ChangeToRegister(ScratchReg, false, false, true);
Index: llvm/lib/Target/ARM/ARMRegisterInfo.h
diff -u llvm/lib/Target/ARM/ARMRegisterInfo.h:1.18 llvm/lib/Target/ARM/ARMRegisterInfo.h:1.19
--- llvm/lib/Target/ARM/ARMRegisterInfo.h:1.18 Mon Apr 30 19:52:08 2007
+++ llvm/lib/Target/ARM/ARMRegisterInfo.h Tue May 1 04:13:03 2007
@@ -85,7 +85,7 @@
MachineBasicBlock::iterator I) const;
void eliminateFrameIndex(MachineBasicBlock::iterator II,
- RegScavenger *RS = NULL) const;
+ int SPAdj, RegScavenger *RS = NULL) const;
void processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
RegScavenger *RS = NULL) const;
From evan.cheng at apple.com Tue May 1 04:13:40 2007
From: evan.cheng at apple.com (Evan Cheng)
Date: Tue, 1 May 2007 04:13:40 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/Sparc/SparcRegisterInfo.cpp
SparcRegisterInfo.h
Message-ID: <200705010913.l419DemK018378@zion.cs.uiuc.edu>
Changes in directory llvm/lib/Target/Sparc:
SparcRegisterInfo.cpp updated: 1.58 -> 1.59
SparcRegisterInfo.h updated: 1.23 -> 1.24
---
Log message:
eliminateFrameIndex() change.
---
Diffs of the changes: (+4 -2)
SparcRegisterInfo.cpp | 4 +++-
SparcRegisterInfo.h | 2 +-
2 files changed, 4 insertions(+), 2 deletions(-)
Index: llvm/lib/Target/Sparc/SparcRegisterInfo.cpp
diff -u llvm/lib/Target/Sparc/SparcRegisterInfo.cpp:1.58 llvm/lib/Target/Sparc/SparcRegisterInfo.cpp:1.59
--- llvm/lib/Target/Sparc/SparcRegisterInfo.cpp:1.58 Tue Mar 20 03:08:48 2007
+++ llvm/lib/Target/Sparc/SparcRegisterInfo.cpp Tue May 1 04:13:03 2007
@@ -165,7 +165,9 @@
}
void SparcRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
- RegScavenger *RS) const {
+ int SPAdj, RegScavenger *RS) const {
+ assert(SPAdj == 0 && "Unexpected");
+
unsigned i = 0;
MachineInstr &MI = *II;
while (!MI.getOperand(i).isFrameIndex()) {
Index: llvm/lib/Target/Sparc/SparcRegisterInfo.h
diff -u llvm/lib/Target/Sparc/SparcRegisterInfo.h:1.23 llvm/lib/Target/Sparc/SparcRegisterInfo.h:1.24
--- llvm/lib/Target/Sparc/SparcRegisterInfo.h:1.23 Tue Mar 20 03:08:48 2007
+++ llvm/lib/Target/Sparc/SparcRegisterInfo.h Tue May 1 04:13:03 2007
@@ -64,7 +64,7 @@
MachineBasicBlock::iterator I) const;
void eliminateFrameIndex(MachineBasicBlock::iterator II,
- RegScavenger *RS = NULL) const;
+ int SPAdj, RegScavenger *RS = NULL) const;
void processFunctionBeforeFrameFinalized(MachineFunction &MF) const;
From evan.cheng at apple.com Tue May 1 04:13:41 2007
From: evan.cheng at apple.com (Evan Cheng)
Date: Tue, 1 May 2007 04:13:41 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86RegisterInfo.cpp
X86RegisterInfo.h
Message-ID: <200705010913.l419DfjH018392@zion.cs.uiuc.edu>
Changes in directory llvm/lib/Target/X86:
X86RegisterInfo.cpp updated: 1.216 -> 1.217
X86RegisterInfo.h updated: 1.51 -> 1.52
---
Log message:
eliminateFrameIndex() change.
---
Diffs of the changes: (+4 -2)
X86RegisterInfo.cpp | 4 +++-
X86RegisterInfo.h | 2 +-
2 files changed, 4 insertions(+), 2 deletions(-)
Index: llvm/lib/Target/X86/X86RegisterInfo.cpp
diff -u llvm/lib/Target/X86/X86RegisterInfo.cpp:1.216 llvm/lib/Target/X86/X86RegisterInfo.cpp:1.217
--- llvm/lib/Target/X86/X86RegisterInfo.cpp:1.216 Wed Apr 25 20:09:28 2007
+++ llvm/lib/Target/X86/X86RegisterInfo.cpp Tue May 1 04:13:03 2007
@@ -986,7 +986,9 @@
}
void X86RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
- RegScavenger *RS) const{
+ int SPAdj, RegScavenger *RS) const{
+ assert(SPAdj == 0 && "Unexpected");
+
unsigned i = 0;
MachineInstr &MI = *II;
MachineFunction &MF = *MI.getParent()->getParent();
Index: llvm/lib/Target/X86/X86RegisterInfo.h
diff -u llvm/lib/Target/X86/X86RegisterInfo.h:1.51 llvm/lib/Target/X86/X86RegisterInfo.h:1.52
--- llvm/lib/Target/X86/X86RegisterInfo.h:1.51 Tue Mar 20 03:09:38 2007
+++ llvm/lib/Target/X86/X86RegisterInfo.h Tue May 1 04:13:03 2007
@@ -94,7 +94,7 @@
MachineBasicBlock::iterator MI) const;
void eliminateFrameIndex(MachineBasicBlock::iterator MI,
- RegScavenger *RS = NULL) const;
+ int SPAdj, RegScavenger *RS = NULL) const;
void processFunctionBeforeFrameFinalized(MachineFunction &MF) const;
From evan.cheng at apple.com Tue May 1 04:13:41 2007
From: evan.cheng at apple.com (Evan Cheng)
Date: Tue, 1 May 2007 04:13:41 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/IA64/IA64RegisterInfo.cpp
IA64RegisterInfo.h
Message-ID: <200705010913.l419DfZb018403@zion.cs.uiuc.edu>
Changes in directory llvm/lib/Target/IA64:
IA64RegisterInfo.cpp updated: 1.35 -> 1.36
IA64RegisterInfo.h updated: 1.17 -> 1.18
---
Log message:
eliminateFrameIndex() change.
---
Diffs of the changes: (+4 -2)
IA64RegisterInfo.cpp | 4 +++-
IA64RegisterInfo.h | 2 +-
2 files changed, 4 insertions(+), 2 deletions(-)
Index: llvm/lib/Target/IA64/IA64RegisterInfo.cpp
diff -u llvm/lib/Target/IA64/IA64RegisterInfo.cpp:1.35 llvm/lib/Target/IA64/IA64RegisterInfo.cpp:1.36
--- llvm/lib/Target/IA64/IA64RegisterInfo.cpp:1.35 Tue Mar 20 03:08:04 2007
+++ llvm/lib/Target/IA64/IA64RegisterInfo.cpp Tue May 1 04:13:03 2007
@@ -177,7 +177,9 @@
}
void IA64RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
- RegScavenger *RS)const{
+ int SPAdj, RegScavenger *RS)const{
+ assert(SPAdj == 0 && "Unexpected");
+
unsigned i = 0;
MachineInstr &MI = *II;
MachineBasicBlock &MBB = *MI.getParent();
Index: llvm/lib/Target/IA64/IA64RegisterInfo.h
diff -u llvm/lib/Target/IA64/IA64RegisterInfo.h:1.17 llvm/lib/Target/IA64/IA64RegisterInfo.h:1.18
--- llvm/lib/Target/IA64/IA64RegisterInfo.h:1.17 Tue Mar 20 03:08:04 2007
+++ llvm/lib/Target/IA64/IA64RegisterInfo.h Tue May 1 04:13:03 2007
@@ -60,7 +60,7 @@
MachineBasicBlock::iterator MI) const;
void eliminateFrameIndex(MachineBasicBlock::iterator MI,
- RegScavenger *RS = NULL) const;
+ int SPAdj, RegScavenger *RS = NULL) const;
void emitPrologue(MachineFunction &MF) const;
void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
From evan.cheng at apple.com Tue May 1 04:13:41 2007
From: evan.cheng at apple.com (Evan Cheng)
Date: Tue, 1 May 2007 04:13:41 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp
AlphaRegisterInfo.h
Message-ID: <200705010913.l419DfpV018387@zion.cs.uiuc.edu>
Changes in directory llvm/lib/Target/Alpha:
AlphaRegisterInfo.cpp updated: 1.65 -> 1.66
AlphaRegisterInfo.h updated: 1.23 -> 1.24
---
Log message:
eliminateFrameIndex() change.
---
Diffs of the changes: (+4 -2)
AlphaRegisterInfo.cpp | 4 +++-
AlphaRegisterInfo.h | 2 +-
2 files changed, 4 insertions(+), 2 deletions(-)
Index: llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp
diff -u llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp:1.65 llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp:1.66
--- llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp:1.65 Mon Apr 16 13:10:22 2007
+++ llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp Tue May 1 04:13:03 2007
@@ -255,7 +255,9 @@
//<- SP
void AlphaRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
- RegScavenger *RS) const {
+ int SPAdj, RegScavenger *RS) const {
+ assert(SPAdj == 0 && "Unexpected");
+
unsigned i = 0;
MachineInstr &MI = *II;
MachineBasicBlock &MBB = *MI.getParent();
Index: llvm/lib/Target/Alpha/AlphaRegisterInfo.h
diff -u llvm/lib/Target/Alpha/AlphaRegisterInfo.h:1.23 llvm/lib/Target/Alpha/AlphaRegisterInfo.h:1.24
--- llvm/lib/Target/Alpha/AlphaRegisterInfo.h:1.23 Tue Mar 20 03:07:46 2007
+++ llvm/lib/Target/Alpha/AlphaRegisterInfo.h Tue May 1 04:13:03 2007
@@ -61,7 +61,7 @@
MachineBasicBlock::iterator I) const;
void eliminateFrameIndex(MachineBasicBlock::iterator II,
- RegScavenger *RS = NULL) const;
+ int SPAdj, RegScavenger *RS = NULL) const;
//void processFunctionBeforeFrameFinalized(MachineFunction &MF) const;
From evan.cheng at apple.com Tue May 1 04:13:41 2007
From: evan.cheng at apple.com (Evan Cheng)
Date: Tue, 1 May 2007 04:13:41 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
PPCRegisterInfo.h
Message-ID: <200705010913.l419Df6G018405@zion.cs.uiuc.edu>
Changes in directory llvm/lib/Target/PowerPC:
PPCRegisterInfo.cpp updated: 1.122 -> 1.123
PPCRegisterInfo.h updated: 1.34 -> 1.35
---
Log message:
eliminateFrameIndex() change.
---
Diffs of the changes: (+4 -2)
PPCRegisterInfo.cpp | 4 +++-
PPCRegisterInfo.h | 2 +-
2 files changed, 4 insertions(+), 2 deletions(-)
Index: llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
diff -u llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.122 llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.123
--- llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.122 Wed Apr 25 17:13:27 2007
+++ llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp Tue May 1 04:13:03 2007
@@ -589,7 +589,9 @@
}
void PPCRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
- RegScavenger *RS) const {
+ int SPAdj, RegScavenger *RS) const {
+ assert(SPAdj == 0 && "Unexpected");
+
// Get the instruction.
MachineInstr &MI = *II;
// Get the instruction's basic block.
Index: llvm/lib/Target/PowerPC/PPCRegisterInfo.h
diff -u llvm/lib/Target/PowerPC/PPCRegisterInfo.h:1.34 llvm/lib/Target/PowerPC/PPCRegisterInfo.h:1.35
--- llvm/lib/Target/PowerPC/PPCRegisterInfo.h:1.34 Tue Mar 20 03:08:30 2007
+++ llvm/lib/Target/PowerPC/PPCRegisterInfo.h Tue May 1 04:13:03 2007
@@ -80,7 +80,7 @@
void lowerDynamicAlloc(MachineBasicBlock::iterator II) const;
void eliminateFrameIndex(MachineBasicBlock::iterator II,
- RegScavenger *RS = NULL) const;
+ int SPAdj, RegScavenger *RS = NULL) const;
/// determineFrameLayout - Determine the size of the frame and maximum call
/// frame size.
From asl at math.spbu.ru Tue May 1 05:16:26 2007
From: asl at math.spbu.ru (Anton Korobeynikov)
Date: Tue, 1 May 2007 05:16:26 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86TargetAsmInfo.cpp
Message-ID: <200705011016.l41AGQTf019332@zion.cs.uiuc.edu>
Changes in directory llvm/lib/Target/X86:
X86TargetAsmInfo.cpp updated: 1.36 -> 1.37
---
Log message:
Adjust correct EH-related sections
---
Diffs of the changes: (+4 -0)
X86TargetAsmInfo.cpp | 4 ++++
1 files changed, 4 insertions(+)
Index: llvm/lib/Target/X86/X86TargetAsmInfo.cpp
diff -u llvm/lib/Target/X86/X86TargetAsmInfo.cpp:1.36 llvm/lib/Target/X86/X86TargetAsmInfo.cpp:1.37
--- llvm/lib/Target/X86/X86TargetAsmInfo.cpp:1.36 Wed Apr 25 09:27:10 2007
+++ llvm/lib/Target/X86/X86TargetAsmInfo.cpp Tue May 1 05:16:06 2007
@@ -121,6 +121,10 @@
DwarfARangesSection = "\t.section\t.debug_aranges,\"\", at progbits";
DwarfRangesSection = "\t.section\t.debug_ranges,\"\", at progbits";
DwarfMacInfoSection = "\t.section\t.debug_macinfo,\"\", at progbits";
+
+ SupportsExceptionHandling = true;
+ DwarfEHFrameSection = "\t.section\t.eh_frame,\"aw\", at progbits";
+ DwarfExceptionSection = "\t.section\t.gcc_except_table,\"a\", at progbits";
break;
case X86Subtarget::isCygwin:
From asl at math.spbu.ru Tue May 1 05:19:50 2007
From: asl at math.spbu.ru (Anton Korobeynikov)
Date: Tue, 1 May 2007 05:19:50 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/X86/X86TargetAsmInfo.cpp
Message-ID: <200705011019.l41AJocY019390@zion.cs.uiuc.edu>
Changes in directory llvm/lib/Target/X86:
X86TargetAsmInfo.cpp updated: 1.37 -> 1.38
---
Log message:
Use correct PC symbol
---
Diffs of the changes: (+2 -0)
X86TargetAsmInfo.cpp | 2 ++
1 files changed, 2 insertions(+)
Index: llvm/lib/Target/X86/X86TargetAsmInfo.cpp
diff -u llvm/lib/Target/X86/X86TargetAsmInfo.cpp:1.37 llvm/lib/Target/X86/X86TargetAsmInfo.cpp:1.38
--- llvm/lib/Target/X86/X86TargetAsmInfo.cpp:1.37 Tue May 1 05:16:06 2007
+++ llvm/lib/Target/X86/X86TargetAsmInfo.cpp Tue May 1 05:19:31 2007
@@ -109,6 +109,8 @@
PrivateGlobalPrefix = ".L";
WeakRefDirective = "\t.weak\t";
SetDirective = "\t.set\t";
+ PCSymbol = ".";
+
DwarfRequiresFrameSection = false;
DwarfAbbrevSection = "\t.section\t.debug_abbrev,\"\", at progbits";
DwarfInfoSection = "\t.section\t.debug_info,\"\", at progbits";
From djg at cray.com Tue May 1 08:50:46 2007
From: djg at cray.com (Dan Gohman)
Date: Tue, 1 May 2007 08:50:46 -0500
Subject: [llvm-commits] ELF sections in X86AsmTargetAsm.cpp
Message-ID: <20070501135045.GS25688@village.us.cray.com>
The attached patch sets the section names for fixed-size constants for
ELF on x86 to match what GCC uses, and it uses the mergeable flag so
that duplicate constants can be merged.
This works for me with GAS; are there other assemblers (or linkers?)
being used with LLVM on x86 ELF targets that don't support this?
It looks like nasm/yasm wouldn't accept some of the other things
that LLVM currently emits anyway..
Dan
--
Dan Gohman, Cray Inc.
-------------- next part --------------
Index: lib/Target/X86/X86TargetAsmInfo.cpp
===================================================================
RCS file: /var/cvs/llvm/llvm/lib/Target/X86/X86TargetAsmInfo.cpp,v
retrieving revision 1.38
diff -u -r1.38 X86TargetAsmInfo.cpp
--- lib/Target/X86/X86TargetAsmInfo.cpp
+++ lib/Target/X86/X86TargetAsmInfo.cpp
@@ -106,6 +106,11 @@
// HasDotFile - True if target asm supports .file directives.
// bool HasDotFile; // Defaults to false.
ReadOnlySection = "\t.section\t.rodata\n";
+ FourByteConstantSection = "\t.section\t.rodata.cst4,\"aM\", at progbits,4";
+ EightByteConstantSection = "\t.section\t.rodata.cst8,\"aM\", at progbits,8";
+ SixteenByteConstantSection =
+ "\t.section\t.rodata.cst16,\"aM\", at progbits,16";
+ CStringSection = "\t.section\t.rodata.str1.1,\"aMS\", at progbits,1";
PrivateGlobalPrefix = ".L";
WeakRefDirective = "\t.weak\t";
SetDirective = "\t.set\t";
From clattner at apple.com Tue May 1 11:30:18 2007
From: clattner at apple.com (Chris Lattner)
Date: Tue, 1 May 2007 09:30:18 -0700
Subject: [llvm-commits] CVS:
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
In-Reply-To: <200705010853.l418rw6E017457@zion.cs.uiuc.edu>
References: <200705010853.l418rw6E017457@zion.cs.uiuc.edu>
Message-ID: <96216D8C-84AD-43CC-983F-17D477BD0ABC@apple.com>
> Forgot about chain result; also UNDEF cannot have multiple values.
Nice! Thanks Evan,
-Chris
> ---
> Diffs of the changes: (+12 -12)
>
> DAGCombiner.cpp | 24 ++++++++++++------------
> 1 files changed, 12 insertions(+), 12 deletions(-)
>
>
> Index: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
> diff -u llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.297 llvm/
> lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.298
> --- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.297 Mon Apr 30
> 19:38:21 2007
> +++ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Tue May 1
> 03:53:39 2007
> @@ -3331,19 +3331,19 @@
> // the updated indexed value in case of indexed loads), change
> uses of the
> // chain value into uses of the chain input (i.e. delete the
> dead load).
> if (!LD->isVolatile()) {
> - bool HasUses = false;
> - SmallVector VTs;
> - for (unsigned i = 0, e = N->getNumValues(); i != e; ++i) {
> - if (!N->hasNUsesOfValue(0, i)) {
> - HasUses = true;
> - break;
> + if (N->getValueType(1) == MVT::Other) {
> + // Unindexed loads.
> + if (N->hasNUsesOfValue(0, 0))
> + return CombineTo(N, DAG.getNode(ISD::UNDEF, N->getValueType
> (0)), Chain);
> + } else {
> + // Indexed loads.
> + assert(N->getValueType(2) == MVT::Other && "Malformed
> indexed loads?");
> + if (N->hasNUsesOfValue(0, 0) && N->hasNUsesOfValue(0, 1)) {
> + SDOperand Undef0 = DAG.getNode(ISD::UNDEF, N->getValueType
> (0));
> + SDOperand Undef1 = DAG.getNode(ISD::UNDEF, N->getValueType
> (1));
> + SDOperand To[] = { Undef0, Undef1, Chain };
> + return CombineTo(N, To, 3);
> }
> - VTs.push_back(N->getValueType(i));
> - }
> - if (!HasUses) {
> - SmallVector Ops;
> - return CombineTo(N, DAG.getNode(ISD::UNDEF, &VTs[0], VTs.size
> (), 0, 0),
> - Chain);
> }
> }
>
>
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
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From baldrick at free.fr Tue May 1 12:32:50 2007
From: baldrick at free.fr (Duncan Sands)
Date: Tue, 1 May 2007 19:32:50 +0200
Subject: [llvm-commits] llvm-gcc: handle TRY_CATCH_EXPR with compound-stmt
for handler
Message-ID: <200705011932.53014.baldrick@free.fr>
According to the documentation, the handler for a TRY_CATCH_EXPR can be:
- A sequence of statements to execute. When an exception occurs,
these statements are executed, and then the exception is rethrown.
- A sequence of CATCH_EXPR expressions. Each CATCH_EXPR
has a list of applicable exception types and handler code. If the
thrown exception matches one of the caught types, the associated
handler code is executed. If the handler code falls off the bottom,
execution continues after the original TRY_CATCH_EXPR.
- An EH_FILTER_EXPR expression. This has a list of
permitted exception types, and code to handle a match failure. If the
thrown exception does not match one of the allowed types, the
associated match failure code is executed. If the thrown exception
does match, it continues unwinding the stack looking for the next
handler.
However GatherTypeInfo wasn't expecting the first case, causing a crash
when building the C++ runtime. Fix and testcase attached.
Ciao,
Duncan.
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From clattner at apple.com Tue May 1 12:59:57 2007
From: clattner at apple.com (clattner at apple.com)
Date: Tue, 1 May 2007 10:59:57 -0700 (PDT)
Subject: [llvm-commits] [126768] improve support for
__builtin_extract_return_address and
Message-ID: <20070501175957.7CCFF6B40E4@src>
Revision: 126768
Author: clattner
Date: 2007-05-01 10:59:57 -0700 (Tue, 01 May 2007)
Log Message:
-----------
improve support for __builtin_extract_return_address and
__builtin_frob_return_address (?) for most targets.
This is one step towards solving PR1375, though it is not
correct for ARM, SPARC, MIPS etc.
Patch by Anton K!
Modified Paths:
--------------
apple-local/branches/llvm/gcc/llvm-convert.cpp
apple-local/branches/llvm/gcc/llvm-internal.h
Modified: apple-local/branches/llvm/gcc/llvm-convert.cpp
===================================================================
--- apple-local/branches/llvm/gcc/llvm-convert.cpp 2007-05-01 17:49:23 UTC (rev 126767)
+++ apple-local/branches/llvm/gcc/llvm-convert.cpp 2007-05-01 17:59:57 UTC (rev 126768)
@@ -4071,6 +4071,10 @@
case BUILT_IN_RETURN_ADDRESS: return EmitBuiltinReturnAddr(exp, Result,false);
case BUILT_IN_STACK_SAVE: return EmitBuiltinStackSave(exp, Result);
case BUILT_IN_STACK_RESTORE: return EmitBuiltinStackRestore(exp);
+ case BUILT_IN_EXTRACT_RETURN_ADDR:
+ return EmitBuiltinExtractReturnAddr(exp, Result);
+ case BUILT_IN_FROB_RETURN_ADDR:
+ return EmitBuiltinFrobReturnAddr(exp, Result);
#define HANDLE_UNARY_FP(F32, F64, V) \
Result = EmitBuiltinUnaryFPOp(V, Intrinsic::F32, Intrinsic::F64)
@@ -4162,8 +4166,6 @@
case BUILT_IN_DWARF_SP_COLUMN:
case BUILT_IN_INIT_DWARF_REG_SIZES:
#endif
- case BUILT_IN_FROB_RETURN_ADDR:
- case BUILT_IN_EXTRACT_RETURN_ADDR:
case BUILT_IN_EH_RETURN:
#ifdef EH_RETURN_DATA_REGNO
case BUILT_IN_EH_RETURN_DATA_REGNO:
@@ -4404,6 +4406,39 @@
return true;
}
+bool TreeToLLVM::EmitBuiltinExtractReturnAddr(tree exp, Value *&Result) {
+ tree arglist = TREE_OPERAND(exp, 1);
+
+ Value *Ptr = Emit(TREE_VALUE(arglist), 0);
+
+ // FIXME: Actually we should do something like this:
+ //
+ // Result = (Ptr & MASK_RETURN_ADDR) + RETURN_ADDR_OFFSET, if mask and
+ // offset are defined. This seems to be needed for: ARM, MIPS, Sparc.
+ // Unfortunately, these constants are defined as RTL expressions and
+ // should be handled separately.
+
+ Result = CastToType(Instruction::BitCast, Ptr, PointerType::get(Type::Int8Ty));
+
+ return true;
+}
+
+bool TreeToLLVM::EmitBuiltinFrobReturnAddr(tree exp, Value *&Result) {
+ tree arglist = TREE_OPERAND(exp, 1);
+
+ Value *Ptr = Emit(TREE_VALUE(arglist), 0);
+
+ // FIXME: Actually we should do something like this:
+ //
+ // Result = Ptr - RETURN_ADDR_OFFSET, if offset is defined. This seems to be
+ // needed for: MIPS, Sparc. Unfortunately, these constants are defined
+ // as RTL expressions and should be handled separately.
+
+ Result = CastToType(Instruction::BitCast, Ptr, PointerType::get(Type::Int8Ty));
+
+ return true;
+}
+
bool TreeToLLVM::EmitBuiltinStackSave(tree exp, Value *&Result) {
tree arglist = TREE_OPERAND(exp, 1);
if (!validate_arglist(arglist, VOID_TYPE))
Modified: apple-local/branches/llvm/gcc/llvm-internal.h
===================================================================
--- apple-local/branches/llvm/gcc/llvm-internal.h 2007-05-01 17:49:23 UTC (rev 126767)
+++ apple-local/branches/llvm/gcc/llvm-internal.h 2007-05-01 17:59:57 UTC (rev 126768)
@@ -524,6 +524,8 @@
bool EmitBuiltinBZero(tree_node *exp, Value *&Result);
bool EmitBuiltinPrefetch(tree_node *exp);
bool EmitBuiltinReturnAddr(tree_node *exp, Value *&Result, bool isFrame);
+ bool EmitBuiltinExtractReturnAddr(tree_node *exp, Value *&Result);
+ bool EmitBuiltinFrobReturnAddr(tree_node *exp, Value *&Result);
bool EmitBuiltinStackSave(tree_node *exp, Value *&Result);
bool EmitBuiltinStackRestore(tree_node *exp);
From clattner at apple.com Tue May 1 13:46:42 2007
From: clattner at apple.com (clattner at apple.com)
Date: Tue, 1 May 2007 11:46:42 -0700 (PDT)
Subject: [llvm-commits] [126769] From Duncan Sands:
Message-ID: <20070501184642.A9AF06EA192@src>
Revision: 126769
Author: clattner
Date: 2007-05-01 11:46:41 -0700 (Tue, 01 May 2007)
Log Message:
-----------
>From Duncan Sands:
According to the documentation, the handler for a TRY_CATCH_EXPR can be:
- A sequence of statements to execute. When an exception occurs,
these statements are executed, and then the exception is rethrown.
- A sequence of CATCH_EXPR expressions. Each CATCH_EXPR
has a list of applicable exception types and handler code. If the
thrown exception matches one of the caught types, the associated
handler code is executed. If the handler code falls off the bottom,
execution continues after the original TRY_CATCH_EXPR.
- An EH_FILTER_EXPR expression. This has a list of
permitted exception types, and code to handle a match failure. If the
thrown exception does not match one of the allowed types, the
associated match failure code is executed. If the thrown exception
does match, it continues unwinding the stack looking for the next
handler.
However GatherTypeInfo wasn't expecting the first case, causing a crash
when building the C++ runtime. Fix and testcase attached.
Testcase here: C++Frontend/2007-04-31-TryCatch.cpp
Modified Paths:
--------------
apple-local/branches/llvm/gcc/llvm-convert.cpp
Modified: apple-local/branches/llvm/gcc/llvm-convert.cpp
===================================================================
--- apple-local/branches/llvm/gcc/llvm-convert.cpp 2007-05-01 17:59:57 UTC (rev 126768)
+++ apple-local/branches/llvm/gcc/llvm-convert.cpp 2007-05-01 18:46:41 UTC (rev 126769)
@@ -1868,11 +1868,12 @@
TypeInfos.push_back(TypeInfo);
}
}
- } else {
- assert(TREE_CODE(exp) == STATEMENT_LIST && "Need an exp with typeinfo");
- // Each statement in the statement list will be a catch.
+ } else if (TREE_CODE(exp) == STATEMENT_LIST) {
+ // Each statement in the statement list will be a catch, or none will.
for (tree_stmt_iterator I = tsi_start(exp); !tsi_end_p(I); tsi_next(&I))
GatherTypeInfo(tsi_stmt(I), TypeInfos);
+ } else {
+ assert(TypeInfos.empty() && "Need an exp with typeinfo");
}
}
From baldrick at free.fr Tue May 1 13:49:49 2007
From: baldrick at free.fr (Duncan Sands)
Date: Tue, 1 May 2007 13:49:49 -0500
Subject: [llvm-commits] CVS: llvm/test/C++Frontend/2007-04-31-TryCatch.cpp
Message-ID: <200705011849.l41InnWb028253@zion.cs.uiuc.edu>
Changes in directory llvm/test/C++Frontend:
2007-04-31-TryCatch.cpp added (r1.1)
---
Log message:
Test handling of TRY_CATCH_EXPRs for which the handler is a sequence of
ordinary statements, rather than a list of CATCH_EXPRs or an EH_FILTER_EXPR.
---
Diffs of the changes: (+12 -0)
2007-04-31-TryCatch.cpp | 12 ++++++++++++
1 files changed, 12 insertions(+)
Index: llvm/test/C++Frontend/2007-04-31-TryCatch.cpp
diff -c /dev/null llvm/test/C++Frontend/2007-04-31-TryCatch.cpp:1.1
*** /dev/null Tue May 1 13:49:40 2007
--- llvm/test/C++Frontend/2007-04-31-TryCatch.cpp Tue May 1 13:49:30 2007
***************
*** 0 ****
--- 1,12 ----
+ // RUN: %llvmgxx -S %s -o /dev/null
+
+ #include
+
+ namespace std
+ {
+ codecvt::
+ codecvt(size_t __refs)
+ : __codecvt_abstract_base(__refs),
+ _M_c_locale_codecvt(_S_get_c_locale())
+ { }
+ }
From clattner at apple.com Tue May 1 13:53:17 2007
From: clattner at apple.com (Chris Lattner)
Date: Tue, 1 May 2007 11:53:17 -0700
Subject: [llvm-commits] Patch for bug in llvm-ld
In-Reply-To: <4635F312.5040301@gmx.ch>
References: <4635F312.5040301@gmx.ch>
Message-ID:
On Apr 30, 2007, at 6:45 AM, jlh wrote:
> Hello!
>
> I've been told to send this here. In tools/llvm-ld/llvm-ld.cpp,
> line 360, a const char* to a temporary std::string is being
> stored, with the string going out of scope right after, making
> that pointer invalid.
>
> std::string lib_name = "-l" + LinkItems[index].first;
> args.push_back(lib_name.c_str());
>
Thanks, but this doesn't seem safe. If the args_temp vector is
reallocated, it will move all the std::string objects, invalidating
the pointers.
-Chris
> The attached patch fixes this in a simple way.
>
> jlh
> Index: llvm-ld.cpp
> ===================================================================
> RCS file: /var/cvs/llvm/llvm/tools/llvm-ld/llvm-ld.cpp,v
> retrieving revision 1.51
> diff -u -r1.51 llvm-ld.cpp
> --- llvm-ld.cpp 29 Apr 2007 23:59:47 -0000 1.51
> +++ llvm-ld.cpp 30 Apr 2007 13:34:21 -0000
> @@ -330,6 +330,9 @@
> // We can't just assemble and link the file with the system
> assembler
> // and linker because we don't know where to put the _start
> symbol.
> // GCC mysteriously knows how to do it.
> +
> + // args_temp is for storing temporary strings while we have a
> const char * to them
> + std::vector args_temp;
> std::vector args;
> args.push_back(gcc.c_str());
> args.push_back("-fno-strict-aliasing");
> @@ -354,8 +357,8 @@
> for (unsigned index = 0; index < LinkItems.size(); index++)
> if (LinkItems[index].first != "crtend") {
> if (LinkItems[index].second) {
> - std::string lib_name = "-l" + LinkItems[index].first;
> - args.push_back(lib_name.c_str());
> + args_temp.push_back("-l" + LinkItems[index].first);
> + args.push_back(args_temp.back().c_str());
> } else
> args.push_back(LinkItems[index].first.c_str());
> }
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
From christopher.lamb at gmail.com Tue May 1 14:24:01 2007
From: christopher.lamb at gmail.com (Christopher Lamb)
Date: Tue, 1 May 2007 14:24:01 -0500
Subject: [llvm-commits] CVS: llvm/utils/TableGen/RegisterInfoEmitter.cpp
In-Reply-To: <200705010557.l415vb52005240@zion.cs.uiuc.edu>
References: <200705010557.l415vb52005240@zion.cs.uiuc.edu>
Message-ID:
Hi Nate,
Could you look into the possibility of re-using the sub/super
register support that Evan recently added? This may prevent much
duplication of information in the RegisterInfo.td, especially for
targets with vector registers that have many subregisters.
I believe that sub/super register generator unions the set of sub/
super registers in a deterministic fashion and produces the necessary
tables in the RegisterInfo.inc already. The only thing is that this
would make the sub register index implicit in the ordering of the sub
register list in the RegisterInfo.td.
Also, would it be possible to emit the information gathered as table
lookups rather than a massive two level switch statement? I believe
all the information to get the necessary mappings should be available.
--
Christopher Lamb
On May 1, 2007, at 12:57 AM, Nate Begeman wrote:
>
>
> Changes in directory llvm/utils/TableGen:
>
> RegisterInfoEmitter.cpp updated: 1.52 -> 1.53
> ---
> Log message:
>
> llvm bug #1350, parts 1, 2, and 3.
>
>
> ---
> Diffs of the changes: (+36 -0)
>
> RegisterInfoEmitter.cpp | 36 ++++++++++++++++++++++++++++++++++++
> 1 files changed, 36 insertions(+)
>
>
> Index: llvm/utils/TableGen/RegisterInfoEmitter.cpp
> diff -u llvm/utils/TableGen/RegisterInfoEmitter.cpp:1.52 llvm/utils/
> TableGen/RegisterInfoEmitter.cpp:1.53
> --- llvm/utils/TableGen/RegisterInfoEmitter.cpp:1.52 Fri Apr 20
> 19:55:29 2007
> +++ llvm/utils/TableGen/RegisterInfoEmitter.cpp Tue May 1 00:57:02
> 2007
> @@ -61,6 +61,7 @@
> << " " << ClassName
> << "(int CallFrameSetupOpcode = -1, int
> CallFrameDestroyOpcode = -1);\n"
> << " int getDwarfRegNum(unsigned RegNum) const;\n"
> + << " unsigned getSubReg(unsigned RegNo, unsigned Index)
> const;\n"
> << "};\n\n";
>
> const std::vector &RegisterClasses =
> @@ -322,6 +323,7 @@
> std::map > RegisterSubRegs;
> std::map > RegisterSuperRegs;
> std::map > RegisterAliases;
> + std::map > >
> SubRegVectors;
> const std::vector &Regs = Target.getRegisters();
>
> for (unsigned i = 0, e = Regs.size(); i != e; ++i) {
> @@ -441,6 +443,40 @@
>
> std::string ClassName = Target.getName() + "GenRegisterInfo";
>
> + // Calculate the mapping of subregister+index pairs to physical
> registers.
> + std::vector SubRegs = Records.getAllDerivedDefinitions
> ("SubRegSet");
> + for (unsigned i = 0, e = SubRegs.size(); i != e; ++i) {
> + int subRegIndex = SubRegs[i]->getValueAsInt("index");
> + std::vector From = SubRegs[i]->getValueAsListOfDefs
> ("From");
> + std::vector To = SubRegs[i]->getValueAsListOfDefs
> ("To");
> +
> + assert((From.size() == To.size()) &&
> + "SubRegSet has mismatched from/to size");
> +
> + // For each entry in from/to vectors, insert the to register
> at index
> + for (unsigned ii = 0, ee = From.size(); ii != ee; ++ii)
> + SubRegVectors[From[ii]].push_back(std::make_pair
> (subRegIndex, To[ii]));
> + }
> +
> + // Emit the subregister + index mapping function based on the
> information
> + // calculated above.
> + OS << "unsigned " << ClassName
> + << "::getSubReg(unsigned RegNo, unsigned Index) const {\n"
> + << " switch (RegNo) {\n"
> + << " default: abort(); break;\n";
> + for (std::map >
> >::iterator
> + I = SubRegVectors.begin(), E = SubRegVectors.end(); I !=
> E; ++I) {
> + OS << " case " << getQualifiedName(I->first) << ":\n";
> + OS << " switch (Index) {\n";
> + OS << " default: abort(); break;\n";
> + for (unsigned i = 0, e = I->second.size(); i != e; ++i)
> + OS << " case " << (I->second)[i].first << ": return "
> + << getQualifiedName((I->second)[i].second) << ";\n";
> + OS << " }; break;\n";
> + }
> + OS << " };\n";
> + OS << "}\n\n";
> +
> // Emit the constructor of the class...
> OS << ClassName << "::" << ClassName
> << "(int CallFrameSetupOpcode, int CallFrameDestroyOpcode)\n"
>
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
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From evan.cheng at apple.com Tue May 1 15:27:37 2007
From: evan.cheng at apple.com (Evan Cheng)
Date: Tue, 1 May 2007 15:27:37 -0500
Subject: [llvm-commits] CVS: llvm/lib/Target/ARM/ARMInstrThumb.td
Message-ID: <200705012027.l41KRb1j030238@zion.cs.uiuc.edu>
Changes in directory llvm/lib/Target/ARM:
ARMInstrThumb.td updated: 1.24 -> 1.25
---
Log message:
Doh. PC displacement is between the constantpool and the add instruction.
---
Diffs of the changes: (+1 -1)
ARMInstrThumb.td | 2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/lib/Target/ARM/ARMInstrThumb.td
diff -u llvm/lib/Target/ARM/ARMInstrThumb.td:1.24 llvm/lib/Target/ARM/ARMInstrThumb.td:1.25
--- llvm/lib/Target/ARM/ARMInstrThumb.td:1.24 Fri Apr 27 08:54:47 2007
+++ llvm/lib/Target/ARM/ARMInstrThumb.td Tue May 1 15:27:19 2007
@@ -511,7 +511,7 @@
// assembler.
def tLEApcrel : TIx2<(ops GPR:$dst, i32imm:$label),
!strconcat(!strconcat(".set PCRELV${:uid}, ($label-(",
- "${:private}PCRELL${:uid}+6))\n"),
+ "${:private}PCRELL${:uid}+4))\n"),
!strconcat("\tmov $dst, #PCRELV${:uid}\n",
"${:private}PCRELL${:uid}:\n\tadd $dst, pc")),
[]>;
From natebegeman at mac.com Tue May 1 15:28:54 2007
From: natebegeman at mac.com (Nate Begeman)
Date: Tue, 1 May 2007 13:28:54 -0700
Subject: [llvm-commits] CVS: llvm/utils/TableGen/RegisterInfoEmitter.cpp
In-Reply-To:
References: <200705010557.l415vb52005240@zion.cs.uiuc.edu>
Message-ID: <74F07314-F0B2-469B-8BEE-4DF28A2D9677@mac.com>
On May 1, 2007, at 12:24 PM, Christopher Lamb wrote:
> Hi Nate,
>
> Could you look into the possibility of re-using the sub/super
> register support that Evan recently added? This may prevent much
> duplication of information in the RegisterInfo.td, especially for
> targets with vector registers that have many subregisters.
It certainly would, I agree.
> I believe that sub/super register generator unions the set of sub/
> super registers in a deterministic fashion and produces the
> necessary tables in the RegisterInfo.inc already. The only thing is
> that this would make the sub register index implicit in the
> ordering of the sub register list in the RegisterInfo.td.
I'm not sure things are sufficiently well ordered internally for
that, or sorted in any particular fashion. I'll look into it, but it
seems like it would be less flexible and make the td files far less
intuitive as to what is actually going on. If tablegen picked the
numbering, I would have to go read the generated file to know what to
write in the ISel for that backend, which seems backwards to me.
> Also, would it be possible to emit the information gathered as
> table lookups rather than a massive two level switch statement? I
> believe all the information to get the necessary mappings should be
> available.
It would be possible, but seems like significantly more work. I'm
sure it will be possible to improve upon the initial implementation,
which should be good enough to address most of the issues blocked by
the lack of subregs exposed to the selection dag.
Nate
From dpatel at apple.com Tue May 1 15:55:58 2007
From: dpatel at apple.com (Devang Patel)
Date: Tue, 1 May 2007 15:55:58 -0500
Subject: [llvm-commits] CVS: llvm/docs/WritingAnLLVMPass.html
Message-ID: <200705012055.l41Ktw0L030819@zion.cs.uiuc.edu>
Changes in directory llvm/docs:
WritingAnLLVMPass.html updated: 1.56 -> 1.57
---
Log message:
Update doc to reflect changes I am about to install to fix PR 888: http://llvm.org/PR888 .
---
Diffs of the changes: (+20 -1)
WritingAnLLVMPass.html | 21 ++++++++++++++++++++-
1 files changed, 20 insertions(+), 1 deletion(-)
Index: llvm/docs/WritingAnLLVMPass.html
diff -u llvm/docs/WritingAnLLVMPass.html:1.56 llvm/docs/WritingAnLLVMPass.html:1.57
--- llvm/docs/WritingAnLLVMPass.html:1.56 Mon Apr 16 19:17:11 2007
+++ llvm/docs/WritingAnLLVMPass.html Tue May 1 15:55:38 2007
@@ -263,6 +263,14 @@
time.
+ static const int ID;
+ Hello() : FunctionPass((intptr_t)&ID) {}
+
+
+
This declares pass identifier used by LLVM to identify pass. This allows LLVM to
+avoid using expensive C++ runtime information.
+
+
virtual bool runOnFunction(Function &F) {
llvm::cerr << "Hello: " << F.getName() << "\n";
return false;
@@ -277,6 +285,13 @@
function.
+ const int Hello::ID = 0;
+
+
+ We initialize pass ID here. LLVM uses ID's address to identify pass so
+initialization value is not important.
+
+
RegisterPass<Hello> X("hello", "Hello World Pass");
} // end of anonymous namespace
@@ -295,6 +310,10 @@
namespace {
struct Hello : public FunctionPass {
+
+ static const int ID;
+ Hello() : FunctionPass((intptr_t)&ID) {}
+
virtual bool runOnFunction(Function &F) {
llvm::cerr << "Hello: " << F.getName() << "\n";
return false;
@@ -1788,7 +1807,7 @@
Chris Lattner
The LLVM Compiler Infrastructure
- Last modified: $Date: 2007/04/17 00:17:11 $
+ Last modified: $Date: 2007/05/01 20:55:38 $