are specified, the entire archive is printed.
-Printing bytecode files is ill-advised as they might confuse your terminal
+Printing bitcode files is ill-advised as they might confuse your terminal
settings. The F operation never modifies the archive.
=item q[Rfz]
@@ -146,7 +146,7 @@
Print the table of contents. Without any modifiers, this operation just prints
the names of the members to the standard output. With the F modifier,
-B also prints out the file type (B=bytecode, Z=compressed, S=symbol
+B also prints out the file type (B=bitcode, Z=compressed, S=symbol
table, blank=regular file), the permission mode, the owner and group, the
size, and the date. If any F are specified, the listing is only for
those files. If no F are specified, the table of contents for the
@@ -196,9 +196,9 @@
=item [k]
-Normally, B will not print the contents of bytecode files when the
+Normally, B will not print the contents of bitcode files when the
F operation is used. This modifier defeats the default and allows the
-bytecode members to be printed.
+bitcode members to be printed.
=item [N]
@@ -230,8 +230,8 @@
When inserting or replacing any file in the archive, compress the file first.
This
-modifier is safe to use when (previously) compressed bytecode files are added to
-the archive; the compressed bytecode files will not be doubly compressed.
+modifier is safe to use when (previously) compressed bitcode files are added to
+the archive; the compressed bitcode files will not be doubly compressed.
=back
@@ -252,7 +252,7 @@
This modifier requests that an archive index (or symbol table) be added to the
archive. This is the default mode of operation. The symbol table will contain
all the externally visible functions and global variables defined by all the
-bytecode files in the archive. Using this modifier is more efficient that using
+bitcode files in the archive. Using this modifier is more efficient that using
L which also creates the symbol table.
=item [S]
@@ -363,7 +363,7 @@
=item offset - vbr encoded 32-bit integer
-The offset item provides the offset into the archive file where the bytecode
+The offset item provides the offset into the archive file where the bitcode
member is stored that is associated with the symbol. The offset value is 0
based at the start of the first "normal" file member. To derive the actual
file offset of the member, you must add the number of bytes occupied by the file
Modified: llvm/trunk/docs/CommandGuide/llvm-as.pod
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CommandGuide/llvm-as.pod?rev=38452&r1=38451&r2=38452&view=diff
==============================================================================
--- llvm/trunk/docs/CommandGuide/llvm-as.pod (original)
+++ llvm/trunk/docs/CommandGuide/llvm-as.pod Mon Jul 9 06:24:05 2007
@@ -11,7 +11,7 @@
=head1 DESCRIPTION
B is the LLVM assembler. It reads a file containing human-readable
-LLVM assembly language, translates it to LLVM bytecode, and writes the result
+LLVM assembly language, translates it to LLVM bitcode, and writes the result
into a file or to standard output.
If F is omitted or is C<->, then B reads its input from
@@ -48,7 +48,7 @@
Force overwrite. Normally, B will refuse to overwrite an
output file that already exists. With this option, B
-will overwrite the output file and replace it with new bytecode.
+will overwrite the output file and replace it with new bitcode.
=item B<--help>
Modified: llvm/trunk/docs/CommandGuide/llvm-config.pod
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CommandGuide/llvm-config.pod?rev=38452&r1=38451&r2=38452&view=diff
==============================================================================
--- llvm/trunk/docs/CommandGuide/llvm-config.pod (original)
+++ llvm/trunk/docs/CommandGuide/llvm-config.pod Mon Jul 9 06:24:05 2007
@@ -115,7 +115,7 @@
=item B
-Includes either a native JIT or the bytecode interpreter.
+Includes either a native JIT or the bitcode interpreter.
=back
Modified: llvm/trunk/docs/CommandGuide/llvm-dis.pod
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CommandGuide/llvm-dis.pod?rev=38452&r1=38451&r2=38452&view=diff
==============================================================================
--- llvm/trunk/docs/CommandGuide/llvm-dis.pod (original)
+++ llvm/trunk/docs/CommandGuide/llvm-dis.pod Mon Jul 9 06:24:05 2007
@@ -11,7 +11,7 @@
=head1 DESCRIPTION
The B command is the LLVM disassembler. It takes an LLVM
-bytecode file and converts it into human-readable LLVM assembly language.
+bitcode file and converts it into human-readable LLVM assembly language.
If filename is omitted or specified as C<->, B reads its
input from standard input.
Modified: llvm/trunk/docs/CommandGuide/llvm-extract.pod
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CommandGuide/llvm-extract.pod?rev=38452&r1=38451&r2=38452&view=diff
==============================================================================
--- llvm/trunk/docs/CommandGuide/llvm-extract.pod (original)
+++ llvm/trunk/docs/CommandGuide/llvm-extract.pod Mon Jul 9 06:24:05 2007
@@ -11,10 +11,10 @@
=head1 DESCRIPTION
The B command takes the name of a function and extracts it from
-the specified LLVM bytecode file. It is primarily used as a debugging tool to
+the specified LLVM bitcode file. It is primarily used as a debugging tool to
reduce test cases from larger programs that are triggering a bug.
-In addition to extracting the bytecode of the specified function,
+In addition to extracting the bitcode of the specified function,
B will also remove unreachable global variables, prototypes, and
unused types.
@@ -30,11 +30,11 @@
Force overwrite. Normally, B will refuse to overwrite an
output file that already exists. With this option, B
-will overwrite the output file and replace it with new bytecode.
+will overwrite the output file and replace it with new bitcode.
=item B<--func> I
-Extract the function named I from the LLVM bytecode.
+Extract the function named I from the LLVM bitcode.
=item B<--help>
Modified: llvm/trunk/docs/CommandGuide/llvm-ld.pod
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CommandGuide/llvm-ld.pod?rev=38452&r1=38451&r2=38452&view=diff
==============================================================================
--- llvm/trunk/docs/CommandGuide/llvm-ld.pod (original)
+++ llvm/trunk/docs/CommandGuide/llvm-ld.pod Mon Jul 9 06:24:05 2007
@@ -10,9 +10,9 @@
=head1 DESCRIPTION
-The B tool takes a set of LLVM bytecode files and links them
-together into a single LLVM bytecode file. The output bytecode file can be
-another bytecode file or an executable bytecode program. Using additional
+The B tool takes a set of LLVM bitcode files and links them
+together into a single LLVM bitcode file. The output bitcode file can be
+another bitcode file or an executable bitcode program. Using additional
options, B is able to produce native code executables.
The B tool is the main linker for LLVM. It is used to link together
@@ -47,13 +47,13 @@
=head2 Link order
-All object and bytecode files are linked first in the order they were
+All object and bitcode files are linked first in the order they were
specified on the command line. All library files are linked next.
Some libraries may not be linked into the object program; see below.
=head2 Library Linkage
-Object files and static bytecode objects are always linked into the output
+Object files and static bitcode objects are always linked into the output
file. Library archives (.a files) load only the objects within the archive
that define symbols needed by the output file. Hence, libraries should be
listed after the object files and libraries which need them; otherwise, the
@@ -64,7 +64,7 @@
The B program has limited support for native code generation, when
using the B<-native> or B<-native-cbe> options. Native code generation is
-performed by converting the linked bytecode into native assembly (.s) or C code
+performed by converting the linked bitcode into native assembly (.s) or C code
and running the system compiler (typically gcc) on the result.
=head1 OPTIONS
@@ -121,7 +121,7 @@
=item B<-link-as-library>
-Link the bytecode files together as a library, not an executable. In this mode,
+Link the bitcode files together as a library, not an executable. In this mode,
undefined symbols will be permitted.
=item B<-r>
@@ -136,14 +136,14 @@
Generate a native machine code executable.
-When generating native executables, B first checks for a bytecode
+When generating native executables, B first checks for a bitcode
version of the library and links it in, if necessary. If the library is
missing, B skips it. Then, B links in the same
libraries as native code.
-In this way, B should be able to link in optimized bytecode
+In this way, B should be able to link in optimized bitcode
subsets of common libraries and then link in any part of the library that
-hasn't been converted to bytecode.
+hasn't been converted to bitcode.
=item B<-native-cbe>
@@ -236,7 +236,7 @@
=item B<-post-link-opt>F
-Run post-link optimization program. After linking is completed a bytecode file
+Run post-link optimization program. After linking is completed a bitcode file
will be generated. It will be passed to the program specified by F as the
first argument. The second argument to the program will be the name of a
temporary file into which the program should place its optimized output. For
@@ -254,7 +254,7 @@
=head1 ENVIRONMENT
-The C environment variable is used to find bytecode
+The C environment variable is used to find bitcode
libraries. Any paths specified in this variable will be searched after the C<-L>
options.
Modified: llvm/trunk/docs/CommandGuide/llvm-link.pod
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CommandGuide/llvm-link.pod?rev=38452&r1=38451&r2=38452&view=diff
==============================================================================
--- llvm/trunk/docs/CommandGuide/llvm-link.pod (original)
+++ llvm/trunk/docs/CommandGuide/llvm-link.pod Mon Jul 9 06:24:05 2007
@@ -10,8 +10,8 @@
=head1 DESCRIPTION
-B takes several LLVM bytecode files and links them together into a
-single LLVM bytecode file. It writes the output file to standard output, unless
+B takes several LLVM bitcode files and links them together into a
+single LLVM bitcode file. It writes the output file to standard output, unless
the B<-o> option is used to specify a filename.
B attempts to load the input files from the current directory. If
@@ -44,7 +44,7 @@
=item B<-d>
If specified, B prints a human-readable version of the output
-bytecode file to standard error.
+bitcode file to standard error.
=item B<--help>
@@ -53,7 +53,7 @@
=item B<-v>
Verbose mode. Print information about what B is doing. This
-typically includes a message for each bytecode file linked in and for each
+typically includes a message for each bitcode file linked in and for each
library found.
=back
Modified: llvm/trunk/docs/CommandGuide/llvm-nm.pod
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CommandGuide/llvm-nm.pod?rev=38452&r1=38451&r2=38452&view=diff
==============================================================================
--- llvm/trunk/docs/CommandGuide/llvm-nm.pod (original)
+++ llvm/trunk/docs/CommandGuide/llvm-nm.pod Mon Jul 9 06:24:05 2007
@@ -2,7 +2,7 @@
=head1 NAME
-llvm-nm - list LLVM bytecode file's symbol table
+llvm-nm - list LLVM bitcode file's symbol table
=head1 SYNOPSIS
@@ -10,11 +10,11 @@
=head1 DESCRIPTION
-The B utility lists the names of symbols from the LLVM bytecode files,
-or B archives containing LLVM bytecode files, named on the command line.
+The B utility lists the names of symbols from the LLVM bitcode files,
+or B archives containing LLVM bitcode files, named on the command line.
Each symbol is listed along with some simple information about its provenance.
If no file name is specified, or I<-> is used as a file name, B will
-process a bytecode file on its standard input stream.
+process a bitcode file on its standard input stream.
B's default output format is the traditional BSD B output format.
Each such output record consists of an (optional) 8-digit hexadecimal address,
@@ -28,7 +28,7 @@
=item U
-Named object is referenced but undefined in this bytecode file
+Named object is referenced but undefined in this bitcode file
=item C
@@ -60,10 +60,10 @@
=back
-Because LLVM bytecode files typically contain objects that are not considered to
+Because LLVM bitcode files typically contain objects that are not considered to
have addresses until they are linked into an executable image or dynamically
compiled "just-in-time", B does not print an address for any symbol,
-even symbols which are defined in the bytecode file.
+even symbols which are defined in the bitcode file.
=head1 OPTIONS
@@ -83,18 +83,18 @@
=item B<--defined-only>
-Print only symbols defined in this bytecode file (as opposed to
+Print only symbols defined in this bitcode file (as opposed to
symbols which may be referenced by objects in this file, but not
defined in this file.)
=item B<--extern-only>, B<-g>
Print only symbols whose definitions are external; that is, accessible
-from other bytecode files.
+from other bitcode files.
=item B<--undefined-only>, B<-u>
-Print only symbols referenced but not defined in this bytecode file.
+Print only symbols referenced but not defined in this bitcode file.
=item B<--format=>I, B<-f>
Modified: llvm/trunk/docs/CommandGuide/llvm-prof.pod
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CommandGuide/llvm-prof.pod?rev=38452&r1=38451&r2=38452&view=diff
==============================================================================
--- llvm/trunk/docs/CommandGuide/llvm-prof.pod (original)
+++ llvm/trunk/docs/CommandGuide/llvm-prof.pod Mon Jul 9 06:24:05 2007
@@ -6,12 +6,12 @@
=head1 SYNOPSIS
-B [I] [I] [I]
+B [I] [I] [I]
=head1 DESCRIPTION
The B tool reads in an F file (which can
-optionally use a specific file with the third program argument), a bytecode file
+optionally use a specific file with the third program argument), a bitcode file
for the program, and produces a human readable report, suitable for determining
where the program hotspots are.
@@ -47,7 +47,7 @@
=head1 EXIT STATUS
-B returns 1 if it cannot load the bytecode file or the profile
+B returns 1 if it cannot load the bitcode file or the profile
information. Otherwise, it exits with zero.
=head1 AUTHOR
Modified: llvm/trunk/docs/CommandGuide/llvm-ranlib.pod
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CommandGuide/llvm-ranlib.pod?rev=38452&r1=38451&r2=38452&view=diff
==============================================================================
--- llvm/trunk/docs/CommandGuide/llvm-ranlib.pod (original)
+++ llvm/trunk/docs/CommandGuide/llvm-ranlib.pod Mon Jul 9 06:24:05 2007
@@ -14,7 +14,7 @@
adds or updates the symbol table in an LLVM archive file. Note that using the
B modifier F is usually more efficient than running B
which is only provided only for completness and compatibility. Unlike other
-implementations of C, B indexes LLVM bytecode files, not
+implementations of C, B indexes LLVM bitcode files, not
native object modules. You can list the contents of the symbol table with the
C command.
Modified: llvm/trunk/docs/CommandGuide/llvm2cpp.pod
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CommandGuide/llvm2cpp.pod?rev=38452&r1=38451&r2=38452&view=diff
==============================================================================
--- llvm/trunk/docs/CommandGuide/llvm2cpp.pod (original)
+++ llvm/trunk/docs/CommandGuide/llvm2cpp.pod Mon Jul 9 06:24:05 2007
@@ -2,7 +2,7 @@
=head1 NAME
-llvm2xpp - LLVM bytecode to LLVM C++ IR translator
+llvm2xpp - LLVM bitcode to LLVM C++ IR translator
=head1 SYNOPSIS
@@ -10,7 +10,7 @@
=head1 DESCRIPTION
-B translates from LLVM bytecode (.bc files) to a
+B translates from LLVM bitcode (.bc files) to a
corresponding C++ source file that will make calls against the LLVM C++ API to
build the same module as the input. By default, the C++ output is a complete
program that builds the module, verifies it and then emits the module as
Modified: llvm/trunk/docs/CommandGuide/llvmc.pod
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CommandGuide/llvmc.pod?rev=38452&r1=38451&r2=38452&view=diff
==============================================================================
--- llvm/trunk/docs/CommandGuide/llvmc.pod (original)
+++ llvm/trunk/docs/CommandGuide/llvmc.pod Mon Jul 9 06:24:05 2007
@@ -69,13 +69,13 @@
=item * Pre-processing: gathering/filtering compiler input (optional).
-=item * Translation: source language to bytecode conversion.
+=item * Translation: source language to bitcode conversion.
-=item * Assembly: bytecode to native code conversion.
+=item * Assembly: bitcode to native code conversion.
-=item * Optimization: conversion of bytecode to something that runs faster.
+=item * Optimization: conversion of bitcode to something that runs faster.
-=item * Linking: combining multiple bytecodes to produce executable program.
+=item * Linking: combining multiple bitcode files to produce executable program.
=back
@@ -99,7 +99,7 @@
This option specifies that the linking phase is not to be run. All
previous phases, if applicable will run. This is generally how a given
-bytecode file is compiled and optimized for a source language module.
+bitcode file is compiled and optimized for a source language module.
=item B<-k> or B<--link> or default
@@ -220,7 +220,7 @@
=item B<--native>
-Normally, B produces bytecode files at most stages of compilation.
+Normally, B produces bitcode files at most stages of compilation.
With this option, B will arrange for native object files to be
generated with the B<-c> option, native assembly files to be generated
with the B<-S> option, and native executables to be generated with the
Modified: llvm/trunk/docs/CommandGuide/llvmgcc.pod
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CommandGuide/llvmgcc.pod?rev=38452&r1=38451&r2=38452&view=diff
==============================================================================
--- llvm/trunk/docs/CommandGuide/llvmgcc.pod (original)
+++ llvm/trunk/docs/CommandGuide/llvmgcc.pod Mon Jul 9 06:24:05 2007
@@ -12,10 +12,10 @@
The B command is the LLVM C front end. It is a modified
version of gcc that compiles C/ObjC programs into native objects, LLVM
-bytecode or LLVM assembly language, depending upon the options.
+bitcode or LLVM assembly language, depending upon the options.
By default, B compiles to native objects just like GCC does. If the
-B<-emit-llvm> option is given then it will generate LLVM bytecode files instead.
+B<-emit-llvm> option is given then it will generate LLVM bitcode files instead.
If B<-S> (assembly) is also given, then it will generate LLVM assembly.
Being derived from the GNU Compiler Collection, B has many
@@ -32,14 +32,14 @@
=item B<-S>
-Do not generate an LLVM bytecode file. Rather, compile the source
+Do not generate an LLVM bitcode file. Rather, compile the source
file into an LLVM assembly language file.
=item B<-c>
Do not generate a linked executable. Rather, compile the source
-file into an LLVM bytecode file. This bytecode file can then be
-linked with other bytecode files later on to generate a full LLVM
+file into an LLVM bitcode file. This bitcode file can then be
+linked with other bitcode files later on to generate a full LLVM
executable.
=item B<-o> I
@@ -59,11 +59,11 @@
=item B<-l>I
Link in the library libI.[bc | a | so]. This library should
-be a bytecode library.
+be a bitcode library.
=item B<-emit-llvm>
-Make the output be LLVM bytecode (or assembly) instead of native object (or
+Make the output be LLVM bitcode (or assembly) instead of native object (or
assembly).
=back
Modified: llvm/trunk/docs/CommandGuide/llvmgxx.pod
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CommandGuide/llvmgxx.pod?rev=38452&r1=38451&r2=38452&view=diff
==============================================================================
--- llvm/trunk/docs/CommandGuide/llvmgxx.pod (original)
+++ llvm/trunk/docs/CommandGuide/llvmgxx.pod Mon Jul 9 06:24:05 2007
@@ -12,10 +12,10 @@
The B command is the LLVM C++ front end. It is a modified
version of g++ that compiles C++/ObjC++ programs into native code,
-LLVM bytecode or assembly language, depending upon the options.
+LLVM bitcode or assembly language, depending upon the options.
By default, B compiles to native objects just like GCC does. If the
-B<-emit-llvm> option is given then it will generate LLVM bytecode files instead.
+B<-emit-llvm> option is given then it will generate LLVM bitcode files instead.
If B<-S> (assembly) is also given, then it will generate LLVM assembly.
Being derived from the GNU Compiler Collection, B has many
@@ -32,14 +32,14 @@
=item B<-S>
-Do not generate an LLVM bytecode file. Rather, compile the source
+Do not generate an LLVM bitcode file. Rather, compile the source
file into an LLVM assembly language file.
=item B<-c>
Do not generate a linked executable. Rather, compile the source
-file into an LLVM bytecode file. This bytecode file can then be
-linked with other bytecode files later on to generate a full LLVM
+file into an LLVM bitcode file. This bitcode file can then be
+linked with other bitcode files later on to generate a full LLVM
executable.
=item B<-o> I
@@ -59,11 +59,11 @@
=item B<-l>I
Link in the library libI.[bc | a | so]. This library should
-be a bytecode library.
+be a bitcode library.
=item B<-emit-llvm>
-Make the output be LLVM bytecode (or assembly) instead of native object (or
+Make the output be LLVM bitcode (or assembly) instead of native object (or
assembly).
=back
Modified: llvm/trunk/docs/CommandGuide/opt.pod
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CommandGuide/opt.pod?rev=38452&r1=38451&r2=38452&view=diff
==============================================================================
--- llvm/trunk/docs/CommandGuide/opt.pod (original)
+++ llvm/trunk/docs/CommandGuide/opt.pod Mon Jul 9 06:24:05 2007
@@ -11,24 +11,24 @@
=head1 DESCRIPTION
The B command is the modular LLVM optimizer and analyzer. It takes LLVM
-bytecode as input, runs the specified optimizations or analyses on it, and then
-outputs the optimized LLVM bytecode or the analysis results. The function of
+bitcode as input, runs the specified optimizations or analyses on it, and then
+outputs the optimized LLVM bitcode or the analysis results. The function of
B depends on whether the B<-analyze> option is given.
When B<-analyze> is specified, B performs various analyses of LLVM
-bytecode. It will usually print the results on standard output, but in a few
+bitcode. It will usually print the results on standard output, but in a few
cases, it will print output to standard error or generate a file with the
analysis output, which is usually done when the output is meant for another
program.
While B<-analyze> is I given, B attempts to produce an optimized
-bytecode file. The optimizations available via B depend upon what
+bitcode file. The optimizations available via B depend upon what
libraries were linked into it as well as any additional libraries that have
been loaded with the B<-load> option. Use the B<-help> option to determine
what optimizations you can use.
If I is omitted from the command line or is I<->, B reads its
-input from standard input. The input must be an LLVM bytecode file.
+input from standard input. The input must be an LLVM bitcode file.
If an output filename is not specified with the B<-o> option, B
writes its output to the standard output.
@@ -41,7 +41,7 @@
Force overwrite. Normally, B will refuse to overwrite an
output file that already exists. With this option, B will
-overwrite the output file and replace it with new bytecode.
+overwrite the output file and replace it with new bitcode.
=item B<-help>
Modified: llvm/trunk/docs/CommandGuide/stkrc.pod
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CommandGuide/stkrc.pod?rev=38452&r1=38451&r2=38452&view=diff
==============================================================================
--- llvm/trunk/docs/CommandGuide/stkrc.pod (original)
+++ llvm/trunk/docs/CommandGuide/stkrc.pod Mon Jul 9 06:24:05 2007
@@ -14,8 +14,8 @@
simple stack based, Forth-like language that was written as a demonstration
language for LLVM. For details on the language, please see
L . The B compiler is fairly
-minimal. It compiles to bytecode only and doesn't perform any optimizations.
-The output of stkrc (a bytecode file) can be piped through other LLVM tools
+minimal. It compiles to bitcode only and doesn't perform any optimizations.
+The output of stkrc (a bitcode file) can be piped through other LLVM tools
for optimization and linking.
If F is omitted or is C<->, then B reads its input
@@ -65,7 +65,7 @@
=item B<-f>
Force the output to be written. Normally, B won't overwrite an existing
-bytecode file. This option overrides that behavior.
+bitcode file. This option overrides that behavior.
=item B<-s> F
From ggreif at gmail.com Mon Jul 9 07:00:59 2007
From: ggreif at gmail.com (Gabor Greif)
Date: Mon, 09 Jul 2007 12:00:59 -0000
Subject: [llvm-commits] [llvm] r38453 - in /llvm/trunk:
include/llvm/CodeGen/SimpleRegisterCoalescing.h
lib/CodeGen/SimpleRegisterCoalescing.cpp
lib/ExecutionEngine/JIT/JITEmitter.cpp
Message-ID: <200707091201.l69C10xP001349@zion.cs.uiuc.edu>
Author: ggreif
Date: Mon Jul 9 07:00:59 2007
New Revision: 38453
URL: http://llvm.org/viewvc/llvm-project?rev=38453&view=rev
Log:
fix typos
Modified:
llvm/trunk/include/llvm/CodeGen/SimpleRegisterCoalescing.h
llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp
llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp
Modified: llvm/trunk/include/llvm/CodeGen/SimpleRegisterCoalescing.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SimpleRegisterCoalescing.h?rev=38453&r1=38452&r2=38453&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/SimpleRegisterCoalescing.h (original)
+++ llvm/trunk/include/llvm/CodeGen/SimpleRegisterCoalescing.h Mon Jul 9 07:00:59 2007
@@ -86,17 +86,17 @@
/// joinIntervals - join compatible live intervals
void joinIntervals();
- /// CopyCoallesceInMBB - Coallsece copies in the specified MBB, putting
- /// copies that cannot yet be coallesced into the "TryAgain" list.
- void CopyCoallesceInMBB(MachineBasicBlock *MBB,
+ /// CopyCoalesceInMBB - Coallesce copies in the specified MBB, putting
+ /// copies that cannot yet be coalesced into the "TryAgain" list.
+ void CopyCoalesceInMBB(MachineBasicBlock *MBB,
std::vector *TryAgain, bool PhysOnly = false);
/// JoinCopy - Attempt to join intervals corresponding to SrcReg/DstReg,
/// which are the src/dst of the copy instruction CopyMI. This returns true
- /// if the copy was successfully coallesced away, or if it is never possible
- /// to coallesce these this copy, due to register constraints. It returns
- /// false if it is not currently possible to coallesce this interval, but
- /// it may be possible if other things get coallesced.
+ /// if the copy was successfully coalesced away, or if it is never possible
+ /// to coalesce these this copy, due to register constraints. It returns
+ /// false if it is not currently possible to coalesce this interval, but
+ /// it may be possible if other things get coalesced.
bool JoinCopy(MachineInstr *CopyMI, unsigned SrcReg, unsigned DstReg,
bool PhysOnly = false);
Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp?rev=38453&r1=38452&r2=38453&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp (original)
+++ llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Mon Jul 9 07:00:59 2007
@@ -43,7 +43,7 @@
namespace {
static cl::opt
EnableJoining("join-liveintervals",
- cl::desc("Coallesce copies (default=true)"),
+ cl::desc("Coalesce copies (default=true)"),
cl::init(true));
RegisterPass
@@ -64,7 +64,7 @@
MachineFunctionPass::getAnalysisUsage(AU);
}
-/// AdjustCopiesBackFrom - We found a non-trivially-coallescable copy with IntA
+/// AdjustCopiesBackFrom - We found a non-trivially-coalescable copy with IntA
/// being the source and IntB being the dest, thus this defines a value number
/// in IntB. If the source value number (in IntA) is defined by a copy from B,
/// see if we can merge these two pieces of B into a single value number,
@@ -171,10 +171,10 @@
/// JoinCopy - Attempt to join intervals corresponding to SrcReg/DstReg,
/// which are the src/dst of the copy instruction CopyMI. This returns true
-/// if the copy was successfully coallesced away, or if it is never possible
-/// to coallesce this copy, due to register constraints. It returns
-/// false if it is not currently possible to coallesce this interval, but
-/// it may be possible if other things get coallesced.
+/// if the copy was successfully coalesced away, or if it is never possible
+/// to coalesce this copy, due to register constraints. It returns
+/// false if it is not currently possible to coalesce this interval, but
+/// it may be possible if other things get coalesced.
bool SimpleRegisterCoalescing::JoinCopy(MachineInstr *CopyMI,
unsigned SrcReg, unsigned DstReg, bool PhysOnly) {
DOUT << li_->getInstructionIndex(CopyMI) << '\t' << *CopyMI;
@@ -185,8 +185,8 @@
// If they are already joined we continue.
if (repSrcReg == repDstReg) {
- DOUT << "\tCopy already coallesced.\n";
- return true; // Not coallescable.
+ DOUT << "\tCopy already coalesced.\n";
+ return true; // Not coalescable.
}
bool SrcIsPhys = MRegisterInfo::isPhysicalRegister(repSrcReg);
@@ -197,24 +197,24 @@
// If they are both physical registers, we cannot join them.
if (SrcIsPhys && DstIsPhys) {
- DOUT << "\tCan not coallesce physregs.\n";
- return true; // Not coallescable.
+ DOUT << "\tCan not coalesce physregs.\n";
+ return true; // Not coalescable.
}
// We only join virtual registers with allocatable physical registers.
if (SrcIsPhys && !allocatableRegs_[repSrcReg]) {
DOUT << "\tSrc reg is unallocatable physreg.\n";
- return true; // Not coallescable.
+ return true; // Not coalescable.
}
if (DstIsPhys && !allocatableRegs_[repDstReg]) {
DOUT << "\tDst reg is unallocatable physreg.\n";
- return true; // Not coallescable.
+ return true; // Not coalescable.
}
// If they are not of the same register class, we cannot join them.
if (differingRegisterClasses(repSrcReg, repDstReg)) {
DOUT << "\tSrc/Dest are different register classes.\n";
- return true; // Not coallescable.
+ return true; // Not coalescable.
}
LiveInterval &SrcInt = li_->getInterval(repSrcReg);
@@ -320,7 +320,7 @@
LiveInInt.removeRange(RemoveStart, RemoveEnd);
}
} else {
- // Coallescing failed.
+ // Coalescing failed.
// If we can eliminate the copy without merging the live ranges, do so now.
if (AdjustCopiesBackFrom(SrcInt, DstInt, CopyMI))
@@ -448,7 +448,7 @@
// interval may be defined as copies from the RHS. Scan the overlapping
// portions of the LHS and RHS, keeping track of this and looking for
// overlapping live ranges that are NOT defined as copies. If these exist, we
- // cannot coallesce.
+ // cannot coalesce.
LiveInterval::iterator LHSIt = LHS.begin(), LHSEnd = LHS.end();
LiveInterval::iterator RHSIt = RHS.begin(), RHSEnd = RHS.end();
@@ -474,7 +474,7 @@
// If the live intervals overlap, there are two interesting cases: if the
// LHS interval is defined by a copy from the RHS, it's ok and we record
// that the LHS value # is the same as the RHS. If it's not, then we cannot
- // coallesce these live ranges and we bail out.
+ // coalesce these live ranges and we bail out.
if (Overlaps) {
// If we haven't already recorded that this value # is safe, check it.
if (!InVector(LHSIt->ValId, EliminatedLHSVals)) {
@@ -497,12 +497,12 @@
// One interesting case to check here. It's possible that we have
// something like "X3 = Y" which defines a new value number in the LHS,
// and is the last use of this liverange of the RHS. In this case, we
- // want to notice this copy (so that it gets coallesced away) even though
+ // want to notice this copy (so that it gets coalesced away) even though
// the live ranges don't actually overlap.
if (LHSIt->start == RHSIt->end) {
if (InVector(LHSIt->ValId, EliminatedLHSVals)) {
// We already know that this value number is going to be merged in
- // if coallescing succeeds. Just skip the liverange.
+ // if coalescing succeeds. Just skip the liverange.
if (++LHSIt == LHSEnd) break;
} else {
// Otherwise, if this is a copy from the RHS, mark it as being merged
@@ -520,7 +520,7 @@
}
}
- // If we got here, we know that the coallescing will be successful and that
+ // If we got here, we know that the coalescing will be successful and that
// the value numbers in EliminatedLHSVals will all be merged together. Since
// the most common case is that EliminatedLHSVals has a single number, we
// optimize for it: if there is more than one value, we merge them all into
@@ -569,7 +569,7 @@
/// below to update aliases.
bool SimpleRegisterCoalescing::JoinIntervals(LiveInterval &LHS, LiveInterval &RHS) {
// Compute the final value assignment, assuming that the live ranges can be
- // coallesced.
+ // coalesced.
SmallVector LHSValNoAssignments;
SmallVector RHSValNoAssignments;
SmallVector, 16> ValueNumberInfo;
@@ -607,7 +607,7 @@
unsigned RHSSrcReg = RHS.getSrcRegForValNum(0);
if ((RHSSrcReg == 0 || rep(RHSSrcReg) != LHS.reg)) {
// If RHS is not defined as a copy from the LHS, we can use simpler and
- // faster checks to see if the live ranges are coallescable. This joiner
+ // faster checks to see if the live ranges are coalescable. This joiner
// can't swap the LHS/RHS intervals though.
if (!MRegisterInfo::isPhysicalRegister(RHS.reg)) {
return SimpleJoin(LHS, RHS);
@@ -631,7 +631,7 @@
if (unsigned LHSSrcReg = LHS.getSrcRegForValNum(VN)) {
if (rep(LHSSrcReg) != RHS.reg) {
// If this is not a copy from the RHS, its value number will be
- // unmodified by the coallescing.
+ // unmodified by the coalescing.
ValueNumberInfo[VN] = LHS.getValNumInfo(VN);
LHSValNoAssignments[VN] = VN;
} else if (RHSValID == -1) {
@@ -723,7 +723,7 @@
}
// Armed with the mappings of LHS/RHS values to ultimate values, walk the
- // interval lists to see if these intervals are coallescable.
+ // interval lists to see if these intervals are coalescable.
LiveInterval::const_iterator I = LHS.begin();
LiveInterval::const_iterator IE = LHS.end();
LiveInterval::const_iterator J = RHS.begin();
@@ -750,7 +750,7 @@
// If so, check value # info to determine if they are really different.
if (Overlaps) {
// If the live range overlap will map to the same value number in the
- // result liverange, we can still coallesce them. If not, we can't.
+ // result liverange, we can still coalesce them. If not, we can't.
if (LHSValNoAssignments[I->ValId] != RHSValNoAssignments[J->ValId])
return false;
}
@@ -764,8 +764,8 @@
}
}
- // If we get here, we know that we can coallesce the live ranges. Ask the
- // intervals to coallesce themselves now.
+ // If we get here, we know that we can coalesce the live ranges. Ask the
+ // intervals to coalesce themselves now.
LHS.join(RHS, &LHSValNoAssignments[0], &RHSValNoAssignments[0],
ValueNumberInfo);
return true;
@@ -784,7 +784,7 @@
};
}
-void SimpleRegisterCoalescing::CopyCoallesceInMBB(MachineBasicBlock *MBB,
+void SimpleRegisterCoalescing::CopyCoalesceInMBB(MachineBasicBlock *MBB,
std::vector *TryAgain, bool PhysOnly) {
DOUT << ((Value*)MBB->getBasicBlock())->getName() << ":\n";
@@ -813,7 +813,7 @@
// If there are no loops in the function, join intervals in function order.
for (MachineFunction::iterator I = mf_->begin(), E = mf_->end();
I != E; ++I)
- CopyCoallesceInMBB(I, &TryAgainList);
+ CopyCoalesceInMBB(I, &TryAgainList);
} else {
// Otherwise, join intervals in inner loops before other intervals.
// Unfortunately we can't just iterate over loop hierarchy here because
@@ -830,9 +830,9 @@
// Finally, join intervals in loop nest order.
for (unsigned i = 0, e = MBBs.size(); i != e; ++i)
- CopyCoallesceInMBB(MBBs[i].second, NULL, true);
+ CopyCoalesceInMBB(MBBs[i].second, NULL, true);
for (unsigned i = 0, e = MBBs.size(); i != e; ++i)
- CopyCoallesceInMBB(MBBs[i].second, &TryAgainList, false);
+ CopyCoalesceInMBB(MBBs[i].second, &TryAgainList, false);
}
// Joining intervals can allow other intervals to be joined. Iteratively join
@@ -1037,7 +1037,7 @@
r2rMap_.grow(mf_->getSSARegMap()->getLastVirtReg());
- // Join (coallesce) intervals if requested.
+ // Join (coalesce) intervals if requested.
if (EnableJoining) {
joinIntervals();
DOUT << "********** INTERVALS POST JOINING **********\n";
Modified: llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp?rev=38453&r1=38452&r2=38453&view=diff
==============================================================================
--- llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp (original)
+++ llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp Mon Jul 9 07:00:59 2007
@@ -146,7 +146,7 @@
/// FreeBlock - Turn an allocated block into a free block, adjusting
/// bits in the object headers, and adding an end of region memory block.
-/// If possible, coallesce this block with neighboring blocks. Return the
+/// If possible, coalesce this block with neighboring blocks. Return the
/// FreeRangeHeader to allocate from.
FreeRangeHeader *MemoryRangeHeader::FreeBlock(FreeRangeHeader *FreeList) {
MemoryRangeHeader *FollowingBlock = &getBlockAfter();
@@ -159,7 +159,7 @@
if (!FollowingBlock->ThisAllocated) {
FreeRangeHeader &FollowingFreeBlock = *(FreeRangeHeader *)FollowingBlock;
// "FreeList" always needs to be a valid free block. If we're about to
- // coallesce with it, update our notion of what the free list is.
+ // coalesce with it, update our notion of what the free list is.
if (&FollowingFreeBlock == FreeList) {
FreeList = FollowingFreeBlock.Next;
FreeListToReturn = 0;
@@ -171,12 +171,12 @@
BlockSize += FollowingFreeBlock.BlockSize;
FollowingBlock = &FollowingFreeBlock.getBlockAfter();
- // Tell the block after the block we are coallescing that this block is
+ // Tell the block after the block we are coalescing that this block is
// allocated.
FollowingBlock->PrevAllocated = 1;
}
- assert(FollowingBlock->ThisAllocated && "Missed coallescing?");
+ assert(FollowingBlock->ThisAllocated && "Missed coalescing?");
if (FreeRangeHeader *PrevFreeBlock = getFreeBlockBefore()) {
PrevFreeBlock->GrowBlock(PrevFreeBlock->BlockSize + BlockSize);
@@ -369,7 +369,7 @@
Mem2->Prev = Mem2; // Mem2 *is* the free list for now.
Mem2->Next = Mem2;
- /// Add a tiny allocated region so that Mem2 is never coallesced away.
+ /// Add a tiny allocated region so that Mem2 is never coalesced away.
MemoryRangeHeader *Mem1 = (MemoryRangeHeader*)Mem2-1;
Mem1->ThisAllocated = 1;
Mem1->PrevAllocated = 0;
From ggreif at gmail.com Mon Jul 9 07:20:30 2007
From: ggreif at gmail.com (Gabor Greif)
Date: Mon, 09 Jul 2007 12:20:30 -0000
Subject: [llvm-commits] [llvm] r38454 -
/llvm/trunk/include/llvm/CodeGen/SimpleRegisterCoalescing.h
Message-ID: <200707091220.l69CKUhu001896@zion.cs.uiuc.edu>
Author: ggreif
Date: Mon Jul 9 07:20:30 2007
New Revision: 38454
URL: http://llvm.org/viewvc/llvm-project?rev=38454&view=rev
Log:
missed this one
Modified:
llvm/trunk/include/llvm/CodeGen/SimpleRegisterCoalescing.h
Modified: llvm/trunk/include/llvm/CodeGen/SimpleRegisterCoalescing.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SimpleRegisterCoalescing.h?rev=38454&r1=38453&r2=38454&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/SimpleRegisterCoalescing.h (original)
+++ llvm/trunk/include/llvm/CodeGen/SimpleRegisterCoalescing.h Mon Jul 9 07:20:30 2007
@@ -86,7 +86,7 @@
/// joinIntervals - join compatible live intervals
void joinIntervals();
- /// CopyCoalesceInMBB - Coallesce copies in the specified MBB, putting
+ /// CopyCoalesceInMBB - Coalesce copies in the specified MBB, putting
/// copies that cannot yet be coalesced into the "TryAgain" list.
void CopyCoalesceInMBB(MachineBasicBlock *MBB,
std::vector *TryAgain, bool PhysOnly = false);
From djg at cray.com Mon Jul 9 08:42:32 2007
From: djg at cray.com (Dan Gohman)
Date: Mon, 09 Jul 2007 13:42:32 -0000
Subject: [llvm-commits] [llvm] r38455 - in /llvm/trunk/test/CodeGen/ARM:
ifcvt6.ll ifcvt7.ll ifcvt8.ll
Message-ID: <200707091342.l69DgWeE004320@zion.cs.uiuc.edu>
Author: djg
Date: Mon Jul 9 08:42:32 2007
New Revision: 38455
URL: http://llvm.org/viewvc/llvm-project?rev=38455&view=rev
Log:
Add explicit triples to these tests so that llc behaves as expected on
non-Apple hosts.
Modified:
llvm/trunk/test/CodeGen/ARM/ifcvt6.ll
llvm/trunk/test/CodeGen/ARM/ifcvt7.ll
llvm/trunk/test/CodeGen/ARM/ifcvt8.ll
Modified: llvm/trunk/test/CodeGen/ARM/ifcvt6.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/ifcvt6.ll?rev=38455&r1=38454&r2=38455&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/ifcvt6.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/ifcvt6.ll Mon Jul 9 08:42:32 2007
@@ -1,6 +1,11 @@
-; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion
-; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion | grep cmpne | wc -l | grep 1
-; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion | grep ldmhi | wc -l | grep 1
+; RUN: llvm-as < %s | \
+; RUN: llc -march=arm -mtriple=arm-apple-darwin -enable-arm-if-conversion
+; RUN: llvm-as < %s | \
+; RUN: llc -march=arm -mtriple=arm-apple-darwin -enable-arm-if-conversion | \
+; RUN: grep cmpne | wc -l | grep 1
+; RUN: llvm-as < %s | \
+; RUN: llc -march=arm -mtriple=arm-apple-darwin -enable-arm-if-conversion | \
+; RUN: grep ldmhi | wc -l | grep 1
define void @foo(i32 %X, i32 %Y) {
entry:
Modified: llvm/trunk/test/CodeGen/ARM/ifcvt7.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/ifcvt7.ll?rev=38455&r1=38454&r2=38455&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/ifcvt7.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/ifcvt7.ll Mon Jul 9 08:42:32 2007
@@ -1,7 +1,14 @@
-; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion
-; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion | grep cmpeq | wc -l | grep 1
-; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion | grep moveq | wc -l | grep 1
-; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion | grep ldmeq | wc -l | grep 1
+; RUN: llvm-as < %s | \
+; RUN: llc -march=arm -mtriple=arm-apple-darwin -enable-arm-if-conversion
+; RUN: llvm-as < %s | \
+; RUN: llc -march=arm -mtriple=arm-apple-darwin -enable-arm-if-conversion | \
+; RUN: grep cmpeq | wc -l | grep 1
+; RUN: llvm-as < %s | \
+; RUN: llc -march=arm -mtriple=arm-apple-darwin -enable-arm-if-conversion | \
+; RUN: grep moveq | wc -l | grep 1
+; RUN: llvm-as < %s | \
+; RUN: llc -march=arm -mtriple=arm-apple-darwin -enable-arm-if-conversion | \
+; RUN: grep ldmeq | wc -l | grep 1
; FIXME: Need post-ifcvt branch folding to get rid of the extra br at end of BB1.
%struct.quad_struct = type { i32, i32, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct* }
Modified: llvm/trunk/test/CodeGen/ARM/ifcvt8.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/ifcvt8.ll?rev=38455&r1=38454&r2=38455&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/ifcvt8.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/ifcvt8.ll Mon Jul 9 08:42:32 2007
@@ -1,5 +1,8 @@
-; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion
-; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion | grep ldmne | wc -l | grep 1
+; RUN: llvm-as < %s | \
+; RUN: llc -march=arm -mtriple=arm-apple-darwin -enable-arm-if-conversion
+; RUN: llvm-as < %s | \
+; RUN: llc -march=arm -mtriple=arm-apple-darwin -enable-arm-if-conversion | \
+; RUN: grep ldmne | wc -l | grep 1
%struct.SString = type { i8*, i32, i32 }
From djg at cray.com Mon Jul 9 10:15:24 2007
From: djg at cray.com (Dan Gohman)
Date: Mon, 09 Jul 2007 15:15:24 -0000
Subject: [llvm-commits] [llvm] r38456 -
/llvm/trunk/include/llvm/Target/TargetInstrInfo.h
Message-ID: <200707091515.l69FFOqm007505@zion.cs.uiuc.edu>
Author: djg
Date: Mon Jul 9 10:15:24 2007
New Revision: 38456
URL: http://llvm.org/viewvc/llvm-project?rev=38456&view=rev
Log:
Fix a typo in a comment.
Modified:
llvm/trunk/include/llvm/Target/TargetInstrInfo.h
Modified: llvm/trunk/include/llvm/Target/TargetInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetInstrInfo.h?rev=38456&r1=38455&r2=38456&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Target/TargetInstrInfo.h (original)
+++ llvm/trunk/include/llvm/Target/TargetInstrInfo.h Mon Jul 9 10:15:24 2007
@@ -329,7 +329,7 @@
/// convertToThreeAddress - This method must be implemented by targets that
/// set the M_CONVERTIBLE_TO_3_ADDR flag. When this flag is set, the target
- /// may be able to convert a two-address instruction into one or moretrue
+ /// may be able to convert a two-address instruction into one or more true
/// three-address instructions on demand. This allows the X86 target (for
/// example) to convert ADD and SHL instructions into LEA instructions if they
/// would require register copies due to two-addressness.
From djg at cray.com Mon Jul 9 10:25:18 2007
From: djg at cray.com (Dan Gohman)
Date: Mon, 09 Jul 2007 15:25:18 -0000
Subject: [llvm-commits] [llvm] r38457 - in /llvm/trunk:
include/llvm/Analysis/ScalarEvolutionExpressions.h
lib/Analysis/ScalarEvolution.cpp
Message-ID: <200707091525.l69FPIg0007822@zion.cs.uiuc.edu>
Author: djg
Date: Mon Jul 9 10:25:17 2007
New Revision: 38457
URL: http://llvm.org/viewvc/llvm-project?rev=38457&view=rev
Log:
Move the APInt form of SCEVUnknown::getIntegerSCEV to SCEVConstant::get, and
use SCEVConstant::get instead of SCEVUnknown::get when constructing a SCEV
for a ConstantInt.
Modified:
llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpressions.h
llvm/trunk/lib/Analysis/ScalarEvolution.cpp
Modified: llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpressions.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpressions.h?rev=38457&r1=38456&r2=38457&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpressions.h (original)
+++ llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpressions.h Mon Jul 9 10:25:17 2007
@@ -33,13 +33,14 @@
///
class SCEVConstant : public SCEV {
ConstantInt *V;
- SCEVConstant(ConstantInt *v) : SCEV(scConstant), V(v) {}
+ explicit SCEVConstant(ConstantInt *v) : SCEV(scConstant), V(v) {}
virtual ~SCEVConstant();
public:
/// get method - This just gets and returns a new SCEVConstant object.
///
static SCEVHandle get(ConstantInt *V);
+ static SCEVHandle get(const APInt& Val);
ConstantInt *getValue() const { return V; }
@@ -511,7 +512,6 @@
/// getIntegerSCEV - Given an integer or FP type, create a constant for the
/// specified signed integer value and return a SCEV for the constant.
static SCEVHandle getIntegerSCEV(int Val, const Type *Ty);
- static SCEVHandle getIntegerSCEV(const APInt& Val);
Value *getValue() const { return V; }
Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolution.cpp?rev=38457&r1=38456&r2=38457&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/ScalarEvolution.cpp (original)
+++ llvm/trunk/lib/Analysis/ScalarEvolution.cpp Mon Jul 9 10:25:17 2007
@@ -183,6 +183,10 @@
return R;
}
+SCEVHandle SCEVConstant::get(const APInt& Val) {
+ return get(ConstantInt::get(Val));
+}
+
ConstantRange SCEVConstant::getValueRange() const {
return ConstantRange(V->getValue());
}
@@ -487,10 +491,6 @@
return SCEVUnknown::get(C);
}
-SCEVHandle SCEVUnknown::getIntegerSCEV(const APInt& Val) {
- return SCEVUnknown::get(ConstantInt::get(Val));
-}
-
/// getTruncateOrZeroExtend - Return a SCEV corresponding to a conversion of the
/// input value to the specified type. If the type must be extended, it is zero
/// extended.
@@ -531,7 +531,7 @@
APInt Result(Val.getBitWidth(), 1);
for (; NumSteps; --NumSteps)
Result *= Val-(NumSteps-1);
- return SCEVUnknown::get(ConstantInt::get(Result));
+ return SCEVConstant::get(Result);
}
const Type *Ty = V->getType();
@@ -1716,8 +1716,8 @@
}
static ConstantInt *
-EvaluateConstantChrecAtConstant(const SCEVAddRecExpr *AddRec, Constant *C) {
- SCEVHandle InVal = SCEVConstant::get(cast(C));
+EvaluateConstantChrecAtConstant(const SCEVAddRecExpr *AddRec, ConstantInt *C) {
+ SCEVHandle InVal = SCEVConstant::get(C);
SCEVHandle Val = AddRec->evaluateAtIteration(InVal);
assert(isa(Val) &&
"Evaluation of SCEV at constant didn't fold correctly?");
@@ -2199,8 +2199,8 @@
ConstantInt *Solution1 = ConstantInt::get((NegB + SqrtVal).sdiv(TwoA));
ConstantInt *Solution2 = ConstantInt::get((NegB - SqrtVal).sdiv(TwoA));
- return std::make_pair(SCEVUnknown::get(Solution1),
- SCEVUnknown::get(Solution2));
+ return std::make_pair(SCEVConstant::get(Solution1),
+ SCEVConstant::get(Solution2));
} // end APIntOps namespace
}
@@ -2468,15 +2468,14 @@
EvaluateConstantChrecAtConstant(this,
ConstantInt::get(ExitVal - One))->getValue()) &&
"Linear scev computation is off in a bad way!");
- return SCEVConstant::get(cast(ExitValue));
+ return SCEVConstant::get(ExitValue);
} else if (isQuadratic()) {
// If this is a quadratic (3-term) AddRec {L,+,M,+,N}, find the roots of the
// quadratic equation to solve it. To do this, we must frame our problem in
// terms of figuring out when zero is crossed, instead of when
// Range.getUpper() is crossed.
std::vector NewOps(op_begin(), op_end());
- NewOps[0] = SCEV::getNegativeSCEV(SCEVUnknown::get(
- ConstantInt::get(Range.getUpper())));
+ NewOps[0] = SCEV::getNegativeSCEV(SCEVConstant::get(Range.getUpper()));
SCEVHandle NewAddRec = SCEVAddRecExpr::get(NewOps, getLoop());
// Next, solve the constructed addrec
@@ -2499,17 +2498,17 @@
R1->getValue());
if (Range.contains(R1Val->getValue())) {
// The next iteration must be out of the range...
- Constant *NextVal = ConstantInt::get(R1->getValue()->getValue()+1);
+ ConstantInt *NextVal = ConstantInt::get(R1->getValue()->getValue()+1);
R1Val = EvaluateConstantChrecAtConstant(this, NextVal);
if (!Range.contains(R1Val->getValue()))
- return SCEVUnknown::get(NextVal);
+ return SCEVConstant::get(NextVal);
return new SCEVCouldNotCompute(); // Something strange happened
}
// If R1 was not in the range, then it is a good return value. Make
// sure that R1-1 WAS in the range though, just in case.
- Constant *NextVal = ConstantInt::get(R1->getValue()->getValue()-1);
+ ConstantInt *NextVal = ConstantInt::get(R1->getValue()->getValue()-1);
R1Val = EvaluateConstantChrecAtConstant(this, NextVal);
if (Range.contains(R1Val->getValue()))
return R1;
From espindola at google.com Mon Jul 9 10:37:25 2007
From: espindola at google.com (Rafael Espindola)
Date: Mon, 9 Jul 2007 16:37:25 +0100
Subject: [llvm-commits] [llvm] r37940 - in /llvm/trunk:
include/llvm/CodeGen/SelectionDAGNodes.h
include/llvm/ParameterAttributes.h lib/AsmParser/Lexer.l
lib/AsmParser/llvmAsmParser.y
lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
lib/Target/TargetCallingC
Message-ID: <38a0d8450707090837x2ba344b8m78de799c5a67d4a7@mail.gmail.com>
Sorry for the delay...
> first let me point out that much of what you say also applies to
> StructReturn, which probably can also be used for returning arrays,
> ints etc. And like StructReturn this is all about the ABI: my
> understanding is that on some platforms the ABI allows for passing
> (small) structs by value. We need to be able to support this, but
> how? The idea is to treat such parameters as passed by reference,
> and add an attribute to tell the code generators to in fact pass them
> in whatever way the ABI says they should be. See PR1521.
>
> Thus in the IR the function is declared to take a pointer to the
> struct as an argument, and the ByVal marker is placed for the
> benefit of the code generators. However it is not clear to me
> that this is semantically correct. Doesn't ByVal mean what it
> says: a copy of the struct is made, and if this copy is modified
> inside the called function then this does not change the original
> struct? But if in the IR we pass in a pointer to the struct, then
> any writes to the struct will modify the original, which is wrong.
The way it should work on the code generators is that when compiling a
call to a function with a "byval" argument, a copy of the struct is
created and placed on the stack. When compiling the function itself,
the code generator should use the stack pointer to create a pointer to
the *copy* of the structure that was placed on the stack.
> Also, I agree that there needs to be more clarity about what is
> allowed to be passed ByVal and returned by SRet.
I propose that we change the verifier so that it checks that "byval"
is only applied to arguments that are pointers to structures. When we
find a case were an array should be passed by value, we can easily
change the verifier.
I will try to write a patch (with a testcase) tomorrow.
> Finally, if StructReturn can also return arrays, then I don't mind
> to much if ByVal is called StructByVal or something like that.
>
> Ciao,
>
> Duncan.
Cheers,
Rafael
From djg at cray.com Mon Jul 9 10:48:14 2007
From: djg at cray.com (Dan Gohman)
Date: Mon, 9 Jul 2007 10:48:14 -0500
Subject: [llvm-commits] [llvm] r37843 -
/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
In-Reply-To: <239AACE9-F6F0-4C93-AF6B-CEF2125D030F@apple.com>
References:
<20070705144923.GK5693@village.us.cray.com>
<8C8471C2-C2F2-4F05-9448-C8BE48737B1C@apple.com>
<16e5fdf90707051633n37bdb9bdu2ef96002be91317d@mail.gmail.com>
<2E082165-6BB1-465A-AE4B-ED696ED37CFC@apple.com>
<15F625BF-09FB-4C24-9EF9-004C2643F370@apple.com>
<20070706131057.GO5693@village.us.cray.com>
<239AACE9-F6F0-4C93-AF6B-CEF2125D030F@apple.com>
Message-ID: <20070709154814.GY5693@village.us.cray.com>
I found a problem in an interaction between my patch and the
PPCISelLowering.cpp code for lowering call results. The PPC target code
effectively assigns registers for a call result in reverse order. My
patch was presenting it with registers already in target order. This is
more consistent with code for other constructs, so it seems best to fix
the PPCISelLowering.cpp code.
Attached is a new patch. It's the same change to SelectionDAGISel.cpp as
before, but it's now accompanied by the PPCISelLowering.cpp update and a
test case which demonstrates the failure with the previous patch and
passes with the new one.
Thanks for your help,
Dan
On Fri, Jul 06, 2007 at 01:40:33PM -0700, Evan Cheng wrote:
> This seems to have fixed llvm-test failures, but Mac OS X PPC
> bootstrapping is still unhappy. :-(
>
> Evan
>
--
Dan Gohman, Cray Inc.
-------------- next part --------------
Index: lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
===================================================================
--- lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (revision 38457)
+++ lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (working copy)
@@ -621,7 +621,6 @@
unsigned NumParts,
MVT::ValueType PartVT,
MVT::ValueType ValueVT,
- bool EndianOrder,
ISD::NodeType AssertOp = ISD::DELETED_NODE) {
if (!MVT::isVector(ValueVT) || NumParts == 1) {
SDOperand Val = Parts[0];
@@ -631,7 +630,7 @@
assert(NumParts == 2 &&
"Cannot expand to more than 2 elts yet!");
SDOperand Hi = Parts[1];
- if (EndianOrder && !DAG.getTargetLoweringInfo().isLittleEndian())
+ if (!DAG.getTargetLoweringInfo().isLittleEndian())
std::swap(Val, Hi);
return DAG.getNode(ISD::BUILD_PAIR, ValueVT, Val, Hi);
}
@@ -692,7 +691,7 @@
// as appropriate.
for (unsigned i = 0; i != NumParts; ++i)
Ops[i] = getCopyFromParts(DAG, &Parts[i], 1,
- PartVT, IntermediateVT, EndianOrder);
+ PartVT, IntermediateVT);
} else if (NumParts > 0) {
// If the intermediate type was expanded, build the intermediate operands
// from the parts.
@@ -701,7 +700,7 @@
unsigned Factor = NumIntermediates / NumParts;
for (unsigned i = 0; i != NumIntermediates; ++i)
Ops[i] = getCopyFromParts(DAG, &Parts[i * Factor], Factor,
- PartVT, IntermediateVT, EndianOrder);
+ PartVT, IntermediateVT);
}
// Build a vector with BUILD_VECTOR or CONCAT_VECTORS from the intermediate
@@ -718,8 +717,7 @@
SDOperand Val,
SDOperand *Parts,
unsigned NumParts,
- MVT::ValueType PartVT,
- bool EndianOrder) {
+ MVT::ValueType PartVT) {
MVT::ValueType ValueVT = Val.getValueType();
if (!MVT::isVector(ValueVT) || NumParts == 1) {
@@ -728,7 +726,7 @@
for (unsigned i = 0; i != NumParts; ++i)
Parts[i] = DAG.getNode(ISD::EXTRACT_ELEMENT, PartVT, Val,
DAG.getConstant(i, MVT::i32));
- if (EndianOrder && !DAG.getTargetLoweringInfo().isLittleEndian())
+ if (!DAG.getTargetLoweringInfo().isLittleEndian())
std::reverse(Parts, Parts + NumParts);
return;
}
@@ -789,7 +787,7 @@
// If the register was not expanded, promote or copy the value,
// as appropriate.
for (unsigned i = 0; i != NumParts; ++i)
- getCopyToParts(DAG, Ops[i], &Parts[i], 1, PartVT, EndianOrder);
+ getCopyToParts(DAG, Ops[i], &Parts[i], 1, PartVT);
} else if (NumParts > 0) {
// If the intermediate type was expanded, split each the value into
// legal parts.
@@ -797,7 +795,7 @@
"Must expand into a divisible number of parts!");
unsigned Factor = NumParts / NumIntermediates;
for (unsigned i = 0; i != NumIntermediates; ++i)
- getCopyToParts(DAG, Ops[i], &Parts[i * Factor], Factor, PartVT, EndianOrder);
+ getCopyToParts(DAG, Ops[i], &Parts[i * Factor], Factor, PartVT);
}
}
@@ -928,7 +926,7 @@
unsigned NumParts = TLI.getNumRegisters(VT);
MVT::ValueType PartVT = TLI.getRegisterType(VT);
SmallVector Parts(NumParts);
- getCopyToParts(DAG, RetOp, &Parts[0], NumParts, PartVT, true);
+ getCopyToParts(DAG, RetOp, &Parts[0], NumParts, PartVT);
for (unsigned i = 0; i < NumParts; ++i) {
NewValues.push_back(Parts[i]);
NewValues.push_back(DAG.getConstant(false, MVT::i32));
@@ -2952,11 +2950,6 @@
/// If the Flag pointer is NULL, no flag is used.
SDOperand RegsForValue::getCopyFromRegs(SelectionDAG &DAG,
SDOperand &Chain, SDOperand *Flag)const{
- // Get the list of registers, in the appropriate order.
- std::vector R(Regs);
- if (!DAG.getTargetLoweringInfo().isLittleEndian())
- std::reverse(R.begin(), R.end());
-
// Copy the legal parts from the registers.
unsigned NumParts = Regs.size();
SmallVector Parts(NumParts);
@@ -2971,7 +2964,7 @@
}
// Assemble the legal parts into the final value.
- return getCopyFromParts(DAG, &Parts[0], NumParts, RegVT, ValueVT, false);
+ return getCopyFromParts(DAG, &Parts[0], NumParts, RegVT, ValueVT);
}
/// getCopyToRegs - Emit a series of CopyToReg nodes that copies the
@@ -2980,21 +2973,16 @@
/// If the Flag pointer is NULL, no flag is used.
void RegsForValue::getCopyToRegs(SDOperand Val, SelectionDAG &DAG,
SDOperand &Chain, SDOperand *Flag) const {
- // Get the list of registers, in the appropriate order.
- std::vector R(Regs);
- if (!DAG.getTargetLoweringInfo().isLittleEndian())
- std::reverse(R.begin(), R.end());
-
// Get the list of the values's legal parts.
unsigned NumParts = Regs.size();
SmallVector Parts(NumParts);
- getCopyToParts(DAG, Val, &Parts[0], NumParts, RegVT, false);
+ getCopyToParts(DAG, Val, &Parts[0], NumParts, RegVT);
// Copy the parts into the registers.
for (unsigned i = 0; i != NumParts; ++i) {
SDOperand Part = Flag ?
- DAG.getCopyToReg(Chain, R[i], Parts[i], *Flag) :
- DAG.getCopyToReg(Chain, R[i], Parts[i]);
+ DAG.getCopyToReg(Chain, Regs[i], Parts[i], *Flag) :
+ DAG.getCopyToReg(Chain, Regs[i], Parts[i]);
Chain = Part.getValue(0);
if (Flag)
*Flag = Part.getValue(1);
@@ -3867,7 +3855,7 @@
SmallVector Parts(NumParts);
for (unsigned j = 0; j != NumParts; ++j)
Parts[j] = SDOperand(Result, i++);
- Ops.push_back(getCopyFromParts(DAG, &Parts[0], NumParts, PartVT, VT, true));
+ Ops.push_back(getCopyFromParts(DAG, &Parts[0], NumParts, PartVT, VT));
break;
}
}
@@ -3939,7 +3927,7 @@
MVT::ValueType PartVT = getRegisterType(VT);
unsigned NumParts = getNumRegisters(VT);
SmallVector Parts(NumParts);
- getCopyToParts(DAG, Op, &Parts[0], NumParts, PartVT, true);
+ getCopyToParts(DAG, Op, &Parts[0], NumParts, PartVT);
for (unsigned i = 0; i != NumParts; ++i) {
// if it isn't first piece, alignment must be 1
unsigned MyFlags = Flags;
@@ -3979,7 +3967,7 @@
SmallVector Results(NumRegs);
for (unsigned i = 0; i != NumRegs; ++i)
Results[i] = Res.getValue(i);
- Res = getCopyFromParts(DAG, &Results[0], NumRegs, RegisterVT, VT, false, AssertOp);
+ Res = getCopyFromParts(DAG, &Results[0], NumRegs, RegisterVT, VT, AssertOp);
}
return std::make_pair(Res, Chain);
@@ -4269,7 +4257,7 @@
SmallVector Chains(NumRegs);
// Copy the value by legal parts into sequential virtual registers.
- getCopyToParts(DAG, Op, &Regs[0], NumRegs, RegisterVT, false);
+ getCopyToParts(DAG, Op, &Regs[0], NumRegs, RegisterVT);
for (unsigned i = 0; i != NumRegs; ++i)
Chains[i] = DAG.getCopyToReg(getRoot(), Reg + i, Regs[i]);
return DAG.getNode(ISD::TokenFactor, MVT::Other, &Chains[0], NumRegs);
@@ -4406,8 +4394,8 @@
if (TI->getNumSuccessors())
SuccsHandled.resize(BB->getParent()->getNumBlockIDs());
- // Check successor nodes PHI nodes that expect a constant to be available from
- // this block.
+ // Check successor nodes' PHI nodes that expect a constant to be available
+ // from this block.
for (unsigned succ = 0, e = TI->getNumSuccessors(); succ != e; ++succ) {
BasicBlock *SuccBB = TI->getSuccessor(succ);
if (!isa(SuccBB->begin())) continue;
Index: lib/Target/PowerPC/PPCISelLowering.cpp
===================================================================
--- lib/Target/PowerPC/PPCISelLowering.cpp (revision 38457)
+++ lib/Target/PowerPC/PPCISelLowering.cpp (working copy)
@@ -1774,9 +1774,9 @@
case MVT::Other: break;
case MVT::i32:
if (Op.Val->getValueType(1) == MVT::i32) {
- Chain = DAG.getCopyFromReg(Chain, PPC::R4, MVT::i32, InFlag).getValue(1);
+ Chain = DAG.getCopyFromReg(Chain, PPC::R3, MVT::i32, InFlag).getValue(1);
ResultVals[0] = Chain.getValue(0);
- Chain = DAG.getCopyFromReg(Chain, PPC::R3, MVT::i32,
+ Chain = DAG.getCopyFromReg(Chain, PPC::R4, MVT::i32,
Chain.getValue(2)).getValue(1);
ResultVals[1] = Chain.getValue(0);
NumResults = 2;
Index: test/CodeGen/PowerPC/big-endian-call-result.ll
===================================================================
--- test/CodeGen/PowerPC/big-endian-call-result.ll (revision 0)
+++ test/CodeGen/PowerPC/big-endian-call-result.ll (revision 0)
@@ -0,0 +1,13 @@
+; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-unknown-linux-gnu | \
+; RUN: grep {addic 4, 4, 1}
+; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-unknown-linux-gnu | \
+; RUN: grep {addze 3, 3}
+
+declare i64 @foo();
+
+define i64 @bar()
+{
+ %t = call i64 @foo()
+ %s = add i64 %t, 1
+ ret i64 %s
+}
From baldrick at free.fr Mon Jul 9 10:52:50 2007
From: baldrick at free.fr (Duncan Sands)
Date: Mon, 9 Jul 2007 17:52:50 +0200
Subject: [llvm-commits] [llvm] r37940 - in /llvm/trunk:
include/llvm/CodeGen/SelectionDAGNodes.h
include/llvm/ParameterAttributes.h lib/AsmParser/Lexer.l
lib/AsmParser/llvmAsmParser.y
lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
lib/Target/TargetCallingC
In-Reply-To: <38a0d8450707090837x2ba344b8m78de799c5a67d4a7@mail.gmail.com>
References: <38a0d8450707090837x2ba344b8m78de799c5a67d4a7@mail.gmail.com>
Message-ID: <200707091752.50522.baldrick@free.fr>
Hi Rafael,
> > Thus in the IR the function is declared to take a pointer to the
> > struct as an argument, and the ByVal marker is placed for the
> > benefit of the code generators. However it is not clear to me
> > that this is semantically correct. Doesn't ByVal mean what it
> > says: a copy of the struct is made, and if this copy is modified
> > inside the called function then this does not change the original
> > struct? But if in the IR we pass in a pointer to the struct, then
> > any writes to the struct will modify the original, which is wrong.
>
> The way it should work on the code generators is that when compiling a
> call to a function with a "byval" argument, a copy of the struct is
> created and placed on the stack. When compiling the function itself,
> the code generator should use the stack pointer to create a pointer to
> the *copy* of the structure that was placed on the stack.
exactly, and thus alias analysis, inlining etc are all being mislead,
because they will think you are modifying the original. This is very
dual to StructReturn by the way: if you assign to the sret parameter
before calling the routine, and try to read those values inside the
routine, you get junk. Likewise here, if you write to the ByVal parameter
inside the routine, then try to read those values outside the routine you
get junk. This should be at least well documented.
Ciao,
Duncan.
From sabre at nondot.org Mon Jul 9 11:16:34 2007
From: sabre at nondot.org (Chris Lattner)
Date: Mon, 09 Jul 2007 16:16:34 -0000
Subject: [llvm-commits] [llvm] r38458 -
/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Message-ID: <200707091616.l69GGZRM010049@zion.cs.uiuc.edu>
Author: lattner
Date: Mon Jul 9 11:16:34 2007
New Revision: 38458
URL: http://llvm.org/viewvc/llvm-project?rev=38458&view=rev
Log:
Fix this warning:
DAGCombiner.cpp: In member function 'llvm::SDOperand::DAGCombiner::visitOR(llvm::SDNode*)':
DAGCombiner.cpp:1608: warning: passing negative value '-0x00000000000000001' for argument 1 to 'llvm::SDOperand llvm::SelectionDAG::getConstant(uint64_t, llvm::MVT::ValueType, bool)'
oiy.
Modified:
llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=38458&r1=38457&r2=38458&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Mon Jul 9 11:16:34 2007
@@ -1605,7 +1605,7 @@
// fold (or x, undef) -> -1
if (N1.getOpcode() == ISD::UNDEF)
- return DAG.getConstant(-1, VT);
+ return DAG.getConstant(~0ULL, VT);
// fold (or c1, c2) -> c1|c2
if (N0C && N1C)
return DAG.getNode(ISD::OR, VT, N0, N1);
From espindola at google.com Mon Jul 9 11:21:50 2007
From: espindola at google.com (Rafael Espindola)
Date: Mon, 9 Jul 2007 17:21:50 +0100
Subject: [llvm-commits] [llvm] r37940 - in /llvm/trunk:
include/llvm/CodeGen/SelectionDAGNodes.h
include/llvm/ParameterAttributes.h lib/AsmParser/Lexer.l
lib/AsmParser/llvmAsmParser.y
lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
lib/Target/TargetCallingC
In-Reply-To: <200707091752.50522.baldrick@free.fr>
References: <38a0d8450707090837x2ba344b8m78de799c5a67d4a7@mail.gmail.com>
<200707091752.50522.baldrick@free.fr>
Message-ID: <38a0d8450707090921k6e5684f4mf22c7a9d22626482@mail.gmail.com>
> exactly, and thus alias analysis, inlining etc are all being mislead,
> because they will think you are modifying the original. This is very
> dual to StructReturn by the way: if you assign to the sret parameter
> before calling the routine, and try to read those values inside the
> routine, you get junk. Likewise here, if you write to the ByVal parameter
> inside the routine, then try to read those values outside the routine you
> get junk. This should be at least well documented.
Yes, it is nice can of worms :-(
For the alias analysis, we would be assuming two pointer might alias
when they do not. Might generate worst code, but not incorrect code.
The inliner will have to be modified to create a copy of the structure
when inlining functions with byval arguments.
The only clean solution I can think of is making the stack
manipulation explicit in the IL. If I recall correctly, SMLNJ does
something similar.
With this approach, in order to pass something on the stack (be it a
structure or not), one would explicitly allocate the stack frame and
pass the stack pointer as explicit argument. I like this approach very
much, but it is a hell lot more work.
I will update the bug to note that the we have to change the inliner
and should change the alias analysis. Does someone knows another
module that has to be changed?
>
> Ciao,
>
> Duncan.
>
Cheers,
--
Rafael Avila de Espindola
Google Ireland Ltd.
Gordon House
Barrow Street
Dublin 4
Ireland
Registered in Dublin, Ireland
Registration Number: 368047
From resistor at mac.com Mon Jul 9 11:43:55 2007
From: resistor at mac.com (Owen Anderson)
Date: Mon, 09 Jul 2007 16:43:55 -0000
Subject: [llvm-commits] [llvm] r38459 -
/llvm/trunk/lib/Transforms/Scalar/GVNPRE.cpp
Message-ID: <200707091643.l69GhtRY011147@zion.cs.uiuc.edu>
Author: resistor
Date: Mon Jul 9 11:43:55 2007
New Revision: 38459
URL: http://llvm.org/viewvc/llvm-project?rev=38459&view=rev
Log:
Fix a comment.
Modified:
llvm/trunk/lib/Transforms/Scalar/GVNPRE.cpp
Modified: llvm/trunk/lib/Transforms/Scalar/GVNPRE.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/GVNPRE.cpp?rev=38459&r1=38458&r2=38459&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/GVNPRE.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/GVNPRE.cpp Mon Jul 9 11:43:55 2007
@@ -547,7 +547,7 @@
}
//===----------------------------------------------------------------------===//
-// ValueTable Class
+// ValueNumberedSet Class
//===----------------------------------------------------------------------===//
class ValueNumberedSet {
From sabre at nondot.org Mon Jul 9 11:54:04 2007
From: sabre at nondot.org (Chris Lattner)
Date: Mon, 09 Jul 2007 16:54:04 -0000
Subject: [llvm-commits] [llvm] r38460 - in /llvm/trunk:
include/llvm/ADT/SmallPtrSet.h lib/Support/SmallPtrSet.cpp
Message-ID: <200707091654.l69Gs4LG011661@zion.cs.uiuc.edu>
Author: lattner
Date: Mon Jul 9 11:54:03 2007
New Revision: 38460
URL: http://llvm.org/viewvc/llvm-project?rev=38460&view=rev
Log:
implement operator= for smallptrset
Modified:
llvm/trunk/include/llvm/ADT/SmallPtrSet.h
llvm/trunk/lib/Support/SmallPtrSet.cpp
Modified: llvm/trunk/include/llvm/ADT/SmallPtrSet.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/SmallPtrSet.h?rev=38460&r1=38459&r2=38460&view=diff
==============================================================================
--- llvm/trunk/include/llvm/ADT/SmallPtrSet.h (original)
+++ llvm/trunk/include/llvm/ADT/SmallPtrSet.h Mon Jul 9 11:54:03 2007
@@ -127,6 +127,10 @@
/// Grow - Allocate a larger backing store for the buckets and move it over.
void Grow();
+
+ void operator=(const SmallPtrSetImpl &RHS); // DO NOT IMPLEMENT.
+protected:
+ void CopyFrom(const SmallPtrSetImpl &RHS);
};
/// SmallPtrSetIteratorImpl - This is the common base class shared between all
@@ -233,6 +237,16 @@
inline iterator end() const {
return iterator(CurArray+CurArraySize);
}
+
+ // Allow assignment from any smallptrset with the same element type even if it
+ // doesn't have the same smallsize.
+ template
+ const SmallPtrSet
+ operator=(const SmallPtrSet &RHS) {
+ CopyFrom(RHS);
+ return *this;
+ }
+
};
}
Modified: llvm/trunk/lib/Support/SmallPtrSet.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/SmallPtrSet.cpp?rev=38460&r1=38459&r2=38460&view=diff
==============================================================================
--- llvm/trunk/lib/Support/SmallPtrSet.cpp (original)
+++ llvm/trunk/lib/Support/SmallPtrSet.cpp Mon Jul 9 11:54:03 2007
@@ -13,6 +13,7 @@
//===----------------------------------------------------------------------===//
#include "llvm/ADT/SmallPtrSet.h"
+#include "llvm/Support/MathExtras.h"
using namespace llvm;
bool SmallPtrSetImpl::insert(void *Ptr) {
@@ -172,3 +173,38 @@
}
}
}
+
+/// CopyFrom - implement operator= from a smallptrset that has the same pointer
+/// type, but may have a different small size.
+void SmallPtrSetImpl::CopyFrom(const SmallPtrSetImpl &RHS) {
+ // Allocate space if needed or clear the current elements out of the array.
+ if (CurArraySize < RHS.size()*2) {
+ if (!isSmall())
+ delete [] CurArray;
+
+ // Get a power of two larger than twice the RHS size.
+ CurArraySize = 1 << Log2_32(RHS.size()*4);
+
+ // Install the new array. Clear all the buckets to empty.
+ CurArray = new void*[CurArraySize+1];
+ memset(CurArray, -1, CurArraySize*sizeof(void*));
+
+ // The end pointer, always valid, is set to a valid element to help the
+ // iterator.
+ CurArray[CurArraySize] = 0;
+
+ } else if (!empty()) {
+ clear();
+ }
+
+ // Now that we know we have enough space, and that the current array is empty,
+ // copy over all the elements from the RHS.
+
+ for (void **BucketPtr = RHS.CurArray, **E = RHS.CurArray+RHS.CurArraySize;
+ BucketPtr != E; ++BucketPtr) {
+ // Copy over the element if it is valid.
+ void *Elt = *BucketPtr;
+ if (Elt != getTombstoneMarker() && Elt != getEmptyMarker())
+ *const_cast(FindBucketFor(Elt)) = Elt;
+ }
+}
From sabre at nondot.org Mon Jul 9 12:11:54 2007
From: sabre at nondot.org (Chris Lattner)
Date: Mon, 09 Jul 2007 17:11:54 -0000
Subject: [llvm-commits] [llvm] r38461 -
/llvm/trunk/include/llvm/ADT/SmallPtrSet.h
Message-ID: <200707091711.l69HBsZp012491@zion.cs.uiuc.edu>
Author: lattner
Date: Mon Jul 9 12:11:53 2007
New Revision: 38461
URL: http://llvm.org/viewvc/llvm-project?rev=38461&view=rev
Log:
work around an aparent gcc name resolution bug by
detemplatizing this.
Modified:
llvm/trunk/include/llvm/ADT/SmallPtrSet.h
Modified: llvm/trunk/include/llvm/ADT/SmallPtrSet.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/SmallPtrSet.h?rev=38461&r1=38460&r2=38461&view=diff
==============================================================================
--- llvm/trunk/include/llvm/ADT/SmallPtrSet.h (original)
+++ llvm/trunk/include/llvm/ADT/SmallPtrSet.h Mon Jul 9 12:11:53 2007
@@ -240,9 +240,8 @@
// Allow assignment from any smallptrset with the same element type even if it
// doesn't have the same smallsize.
- template
const SmallPtrSet
- operator=(const SmallPtrSet &RHS) {
+ operator=(const SmallPtrSet &RHS) {
CopyFrom(RHS);
return *this;
}
From sabre at nondot.org Mon Jul 9 12:14:58 2007
From: sabre at nondot.org (Chris Lattner)
Date: Mon, 09 Jul 2007 17:14:58 -0000
Subject: [llvm-commits] [llvm] r38462 -
/llvm/trunk/test/CodeGen/PowerPC/compare-duplicate.ll
Message-ID: <200707091714.l69HEw1w012716@zion.cs.uiuc.edu>
Author: lattner
Date: Mon Jul 9 12:14:58 2007
New Revision: 38462
URL: http://llvm.org/viewvc/llvm-project?rev=38462&view=rev
Log:
add target triple to fix PR1546
Modified:
llvm/trunk/test/CodeGen/PowerPC/compare-duplicate.ll
Modified: llvm/trunk/test/CodeGen/PowerPC/compare-duplicate.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/compare-duplicate.ll?rev=38462&r1=38461&r2=38462&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/compare-duplicate.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/compare-duplicate.ll Mon Jul 9 12:14:58 2007
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc | not grep slwi
+; RUN: llvm-as < %s | llc -mtriple=powerpc-apple-darwin8 | not grep slwi
define i32 @test(i32 %A, i32 %B) {
%C = sub i32 %B, %A
From sabre at nondot.org Mon Jul 9 12:25:30 2007
From: sabre at nondot.org (Chris Lattner)
Date: Mon, 09 Jul 2007 17:25:30 -0000
Subject: [llvm-commits] [llvm] r38463 - in /llvm/trunk/lib/Target:
ARM/ARMTargetMachine.cpp Alpha/AlphaTargetMachine.cpp
IA64/IA64TargetMachine.cpp Mips/MipsTargetMachine.cpp
PowerPC/PPCTargetMachine.cpp Sparc/SparcTargetMachine.cpp
X86/X86TargetMachine.cpp
Message-ID: <200707091725.l69HPUZM013566@zion.cs.uiuc.edu>
Author: lattner
Date: Mon Jul 9 12:25:29 2007
New Revision: 38463
URL: http://llvm.org/viewvc/llvm-project?rev=38463&view=rev
Log:
The various "getModuleMatchQuality" implementations should return
zero if they see a target triple they don't understand.
Modified:
llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp
llvm/trunk/lib/Target/Alpha/AlphaTargetMachine.cpp
llvm/trunk/lib/Target/IA64/IA64TargetMachine.cpp
llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp
llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp
llvm/trunk/lib/Target/Sparc/SparcTargetMachine.cpp
llvm/trunk/lib/Target/X86/X86TargetMachine.cpp
Modified: llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp?rev=38463&r1=38462&r2=38463&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp Mon Jul 9 12:25:29 2007
@@ -48,6 +48,9 @@
if (TT.size() >= 6 && std::string(TT.begin(), TT.begin()+6) == "thumb-")
return 20;
+ // If the target triple is something non-thumb, we don't match.
+ if (!TT.empty()) return 0;
+
if (M.getEndianness() == Module::LittleEndian &&
M.getPointerSize() == Module::Pointer32)
return 10; // Weak match
@@ -94,6 +97,8 @@
std::string TT = M.getTargetTriple();
if (TT.size() >= 4 && std::string(TT.begin(), TT.begin()+4) == "arm-")
return 20;
+ // If the target triple is something non-arm, we don't match.
+ if (!TT.empty()) return 0;
if (M.getEndianness() == Module::LittleEndian &&
M.getPointerSize() == Module::Pointer32)
Modified: llvm/trunk/lib/Target/Alpha/AlphaTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaTargetMachine.cpp?rev=38463&r1=38462&r2=38463&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Alpha/AlphaTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/Alpha/AlphaTargetMachine.cpp Mon Jul 9 12:25:29 2007
@@ -35,6 +35,8 @@
if (TT.size() >= 5 && TT[0] == 'a' && TT[1] == 'l' && TT[2] == 'p' &&
TT[3] == 'h' && TT[4] == 'a')
return 20;
+ // If the target triple is something non-alpha, we don't match.
+ if (!TT.empty()) return 0;
if (M.getEndianness() == Module::LittleEndian &&
M.getPointerSize() == Module::Pointer64)
Modified: llvm/trunk/lib/Target/IA64/IA64TargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/IA64/IA64TargetMachine.cpp?rev=38463&r1=38462&r2=38463&view=diff
==============================================================================
--- llvm/trunk/lib/Target/IA64/IA64TargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/IA64/IA64TargetMachine.cpp Mon Jul 9 12:25:29 2007
@@ -50,6 +50,8 @@
if (seenIA64)
return 20; // strong match
}
+ // If the target triple is something non-ia64, we don't match.
+ if (!TT.empty()) return 0;
#if defined(__ia64__) || defined(__IA64__)
return 5;
Modified: llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp?rev=38463&r1=38462&r2=38463&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp Mon Jul 9 12:25:29 2007
@@ -40,13 +40,14 @@
// return 0 and must specify -march to gen MIPS code.
unsigned MipsTargetMachine::
-getModuleMatchQuality(const Module &M)
-{
+getModuleMatchQuality(const Module &M) {
// We strongly match "mips-*".
std::string TT = M.getTargetTriple();
if (TT.size() >= 5 && std::string(TT.begin(), TT.begin()+5) == "mips-")
return 20;
-
+ // If the target triple is something non-mips, we don't match.
+ if (!TT.empty()) return 0;
+
return 0;
}
Modified: llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp?rev=38463&r1=38462&r2=38463&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp Mon Jul 9 12:25:29 2007
@@ -55,6 +55,9 @@
if (TT.size() >= 8 && std::string(TT.begin(), TT.begin()+8) == "powerpc-")
return 20;
+ // If the target triple is something non-powerpc, we don't match.
+ if (!TT.empty()) return 0;
+
if (M.getEndianness() == Module::BigEndian &&
M.getPointerSize() == Module::Pointer32)
return 10; // Weak match
Modified: llvm/trunk/lib/Target/Sparc/SparcTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcTargetMachine.cpp?rev=38463&r1=38462&r2=38463&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Sparc/SparcTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/Sparc/SparcTargetMachine.cpp Mon Jul 9 12:25:29 2007
@@ -39,6 +39,9 @@
std::string TT = M.getTargetTriple();
if (TT.size() >= 6 && std::string(TT.begin(), TT.begin()+6) == "sparc-")
return 20;
+
+ // If the target triple is something non-sparc, we don't match.
+ if (!TT.empty()) return 0;
if (M.getEndianness() == Module::BigEndian &&
M.getPointerSize() == Module::Pointer32)
Modified: llvm/trunk/lib/Target/X86/X86TargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetMachine.cpp?rev=38463&r1=38462&r2=38463&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86TargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86TargetMachine.cpp Mon Jul 9 12:25:29 2007
@@ -62,6 +62,8 @@
if (TT.size() >= 5 && TT[0] == 'i' && TT[2] == '8' && TT[3] == '6' &&
TT[4] == '-' && TT[1] - '3' < 6)
return 20;
+ // If the target triple is something non-X86, we don't match.
+ if (!TT.empty()) return 0;
if (M.getEndianness() == Module::LittleEndian &&
M.getPointerSize() == Module::Pointer32)
@@ -85,6 +87,9 @@
TT[3] == '6' && TT[4] == '4' && TT[5] == '-')
return 20;
+ // If the target triple is something non-X86-64, we don't match.
+ if (!TT.empty()) return 0;
+
if (M.getEndianness() == Module::LittleEndian &&
M.getPointerSize() == Module::Pointer64)
return 10; // Weak match
From sabre at nondot.org Mon Jul 9 12:31:07 2007
From: sabre at nondot.org (Chris Lattner)
Date: Mon, 09 Jul 2007 17:31:07 -0000
Subject: [llvm-commits] [llvm] r38464 -
/llvm/trunk/test/CodeGen/Generic/vector.ll
Message-ID: <200707091731.l69HV7S9014008@zion.cs.uiuc.edu>
Author: lattner
Date: Mon Jul 9 12:31:07 2007
New Revision: 38464
URL: http://llvm.org/viewvc/llvm-project?rev=38464&view=rev
Log:
remove this bogus t-t
Modified:
llvm/trunk/test/CodeGen/Generic/vector.ll
Modified: llvm/trunk/test/CodeGen/Generic/vector.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Generic/vector.ll?rev=38464&r1=38463&r2=38464&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Generic/vector.ll (original)
+++ llvm/trunk/test/CodeGen/Generic/vector.ll Mon Jul 9 12:31:07 2007
@@ -1,6 +1,5 @@
; Test that vectors are scalarized/lowered correctly.
; RUN: llvm-upgrade < %s | llvm-as | llc
-; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple a-b-c
%f1 = type <1 x float>
%f2 = type <2 x float>
From sabre at nondot.org Mon Jul 9 12:32:28 2007
From: sabre at nondot.org (Chris Lattner)
Date: Mon, 09 Jul 2007 17:32:28 -0000
Subject: [llvm-commits] [llvm] r38465 -
/llvm/trunk/test/CodeGen/X86/illegal-vector-args-return.ll
Message-ID: <200707091732.l69HWSbZ014088@zion.cs.uiuc.edu>
Author: lattner
Date: Mon Jul 9 12:32:28 2007
New Revision: 38465
URL: http://llvm.org/viewvc/llvm-project?rev=38465&view=rev
Log:
allow this to work on ppc-darwin
Modified:
llvm/trunk/test/CodeGen/X86/illegal-vector-args-return.ll
Modified: llvm/trunk/test/CodeGen/X86/illegal-vector-args-return.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/illegal-vector-args-return.ll?rev=38465&r1=38464&r2=38465&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/illegal-vector-args-return.ll (original)
+++ llvm/trunk/test/CodeGen/X86/illegal-vector-args-return.ll Mon Jul 9 12:32:28 2007
@@ -1,7 +1,7 @@
-; RUN: llvm-as < %s | llc -mattr=+sse2 | grep {mulpd %xmm3, %xmm1}
-; RUN: llvm-as < %s | llc -mattr=+sse2 | grep {mulpd %xmm2, %xmm0}
-; RUN: llvm-as < %s | llc -mattr=+sse2 | grep {addps %xmm3, %xmm1}
-; RUN: llvm-as < %s | llc -mattr=+sse2 | grep {addps %xmm2, %xmm0}
+; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep {mulpd %xmm3, %xmm1}
+; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep {mulpd %xmm2, %xmm0}
+; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep {addps %xmm3, %xmm1}
+; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep {addps %xmm2, %xmm0}
define <4 x double> @foo(<4 x double> %x, <4 x double> %z) {
%y = mul <4 x double> %x, %z
From sabre at nondot.org Mon Jul 9 12:35:18 2007
From: sabre at nondot.org (Chris Lattner)
Date: Mon, 09 Jul 2007 17:35:18 -0000
Subject: [llvm-commits] [llvm] r38466 -
/llvm/trunk/test/CodeGen/X86/fp_constant_op.llx
Message-ID: <200707091735.l69HZIHI014283@zion.cs.uiuc.edu>
Author: lattner
Date: Mon Jul 9 12:35:18 2007
New Revision: 38466
URL: http://llvm.org/viewvc/llvm-project?rev=38466&view=rev
Log:
force a cpu without SSE
Modified:
llvm/trunk/test/CodeGen/X86/fp_constant_op.llx
Modified: llvm/trunk/test/CodeGen/X86/fp_constant_op.llx
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fp_constant_op.llx?rev=38466&r1=38465&r2=38466&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fp_constant_op.llx (original)
+++ llvm/trunk/test/CodeGen/X86/fp_constant_op.llx Mon Jul 9 12:35:18 2007
@@ -1,4 +1,4 @@
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -x86-asm-syntax=intel | \
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -x86-asm-syntax=intel -mcpu=i486 | \
; RUN: grep -i ST | not grep {fadd\\|fsub\\|fdiv\\|fmul}
; Test that the load of the constant is folded into the operation.
From clattner at apple.com Mon Jul 9 12:40:58 2007
From: clattner at apple.com (Chris Lattner)
Date: Mon, 9 Jul 2007 10:40:58 -0700
Subject: [llvm-commits] [llvm] r38435 - /llvm/trunk/docs/index.html
In-Reply-To: <200707090631.l696Vpu1020332@zion.cs.uiuc.edu>
References: <200707090631.l696Vpu1020332@zion.cs.uiuc.edu>
Message-ID: <38ECA269-FE68-4887-843F-856EBFA968C2@apple.com>
On Jul 8, 2007, at 11:31 PM, Reid Spencer wrote:
> Author: reid
> Date: Mon Jul 9 01:31:51 2007
> New Revision: 38435
>
> URL: http://llvm.org/viewvc/llvm-project?rev=38435&view=rev
> Log:
> Links for commands are now generated into /cmds/ URL.
Nice!
-Chris
From clattner at apple.com Mon Jul 9 12:56:42 2007
From: clattner at apple.com (clattner at apple.com)
Date: Mon, 9 Jul 2007 10:56:42 -0700 (PDT)
Subject: [llvm-commits] [129252] Enable llvm-gcc to build when LLVM is
configured with --enable-expensive-checks .
Message-ID: <20070709175642.D6C2CD4EABA2@src>
Revision: 129252
Author: clattner
Date: 2007-07-09 10:56:42 -0700 (Mon, 09 Jul 2007)
Log Message:
-----------
Enable llvm-gcc to build when LLVM is configured with --enable-expensive-checks.
Patch by David Greene!
Modified Paths:
--------------
apple-local/branches/llvm/gcc/Makefile.in
apple-local/branches/llvm/gcc/configure
apple-local/branches/llvm/gcc/configure.ac
apple-local/branches/llvm/libcpp/configure
apple-local/branches/llvm/libcpp/configure.ac
Modified: apple-local/branches/llvm/gcc/Makefile.in
===================================================================
--- apple-local/branches/llvm/gcc/Makefile.in 2007-07-09 02:28:29 UTC (rev 129251)
+++ apple-local/branches/llvm/gcc/Makefile.in 2007-07-09 17:56:42 UTC (rev 129252)
@@ -217,26 +217,21 @@
# APPLE LOCAL begin LLVM
@checkingenabled_flag@
LLVMOBJDIR = @LLVMBASEPATH@
-ifeq ($(LLVMOBJDIR),)
-CPPFLAGS = @CPPFLAGS@
-else
-CPPFLAGS = @CPPFLAGS@ -DENABLE_LLVM -D__STDC_LIMIT_MACROS
ifdef LLVM_VERSION_INFO
CPPFLAGS += -DLLVM_VERSION_INFO='"$(LLVM_VERSION_INFO)"'
endif
-ifdef CHECKING_ENABLED
-BUILDMODE=Debug
-else
-ifdef DISABLE_LLVMASSERTIONS
-BUILDMODE=Release-Asserts
-else
-BUILDMODE=Release
-endif
-endif
+# Determine BUILDMODE from configure run (--enable-llvm)
+BUILDMODE := @LLVMBUILDMODE@
+
LLVMBINPATH = $(LLVMOBJDIR)/$(BUILDMODE)/bin
+ifeq ($(LLVMOBJDIR),)
+CPPFLAGS = @CPPFLAGS@
+else
+CPPFLAGS := @CPPFLAGS@ -DENABLE_LLVM -D__STDC_LIMIT_MACROS $(shell $(LLVMBINPATH)/llvm-config --cppflags)
+
# Use llvm-config to get the srcdir that LLVM was configured with, to support
# srcdir != objdir builds.
LLVMSRCDIR := $(shell $(LLVMBINPATH)/llvm-config --src-root)
Modified: apple-local/branches/llvm/gcc/configure
===================================================================
--- apple-local/branches/llvm/gcc/configure 2007-07-09 02:28:29 UTC (rev 129251)
+++ apple-local/branches/llvm/gcc/configure 2007-07-09 17:56:42 UTC (rev 129252)
@@ -309,7 +309,7 @@
# include
#endif"
-ac_subst_vars='SHELL PATH_SEPARATOR PACKAGE_NAME PACKAGE_TARNAME PACKAGE_VERSION PACKAGE_STRING PACKAGE_BUGREPORT exec_prefix prefix program_transform_name bindir sbindir libexecdir datadir sysconfdir sharedstatedir localstatedir libdir includedir oldincludedir infodir mandir build_alias host_alias target_alias DEFS ECHO_C ECHO_N ECHO_T LIBS build build_cpu build_vendor build_os host host_cpu host_vendor host_os target target_cpu target_vendor target_os target_noncanonical build_subdir host_subdir target_subdir gcc_version_trigger gcc_version_full gcc_version GENINSRC CC CFLAGS LDFLAGS CPPFLAGS ac_ct_CC EXEEXT OBJEXT NO_MINUS_C_MINUS_O OUTPUT_OPTION CPP EGREP strict1_warn warn_cflags WERROR checkingenabled_flag nocommon_flag TREEBROWSER valgrind_path valgrind_path_defines valgrind_command coverage_flags enable_multilib enable_shared TARGET_SYSTEM_ROOT TARGET_SYSTEM_ROOT_DEFINE CROSS_SYSTEM_HEADER_DIR onestep DSYMUTIL LLVMBASEPATH SET_MAKE AWK LN_S LN RANLIB ac_ct_RANLIB ranl
ib_flags INSTALL INSTALL_PROGRAM INSTALL_DATA make_compare_target have_mktemp_command MAKEINFO BUILD_INFO GENERATED_MANPAGES FLEX BISON NM AR stage1_cflags COLLECT2_LIBS GNAT_LIBEXC LDEXP_LIB TARGET_GETGROUPS_T LIBICONV LTLIBICONV LIBICONV_DEP manext objext gthread_flags extra_modes_file PACKAGE VERSION USE_NLS LIBINTL LIBINTL_DEP INCINTL XGETTEXT GMSGFMT POSUB CATALOGS cc_for_cross_gnattools CROSS ALL SYSTEM_HEADER_DIR inhibit_libc CC_FOR_BUILD BUILD_CFLAGS STMP_FIXINC STMP_FIXPROTO collect2 libgcc_visibility GGC zlibdir zlibinc MAINT gcc_tooldir dollar slibdir objdir subdirs srcdir all_boot_languages all_compilers all_gtfiles all_gtfiles_files_langs all_gtfiles_files_files all_lang_makefrags all_lang_makefiles all_languages all_stagestuff build_exeext build_install_headers_dir build_xm_file_list build_xm_include_list build_xm_defines check_languages cc_set_by_configure quoted_cc_set_by_configure cpp_install_dir xmake_file tmake_file extra_gcc_objs extra_headers_list extra_
objs extra_parts extra_passes extra_programs float_h_file gcc_config_arguments gcc_gxx_include_dir libstdcxx_incdir host_exeext host_xm_file_list host_xm_include_list host_xm_defines out_host_hook_obj install lang_opt_files lang_specs_files lang_tree_files local_prefix md_file objc_boehm_gc out_file out_cxx_file out_object_file out_cxx_object_file stage_prefix_set_by_configure quoted_stage_prefix_set_by_configure thread_file tm_file_list tm_include_list tm_defines tm_p_file_list tm_p_include_list xm_file_list xm_include_list xm_defines c_target_objs cxx_target_objs target_cpu_default set_gcc_lib_path GMPLIBS GMPINC LIBOBJS LTLIBOBJS'
+ac_subst_vars='SHELL PATH_SEPARATOR PACKAGE_NAME PACKAGE_TARNAME PACKAGE_VERSION PACKAGE_STRING PACKAGE_BUGREPORT exec_prefix prefix program_transform_name bindir sbindir libexecdir datadir sysconfdir sharedstatedir localstatedir libdir includedir oldincludedir infodir mandir build_alias host_alias target_alias DEFS ECHO_C ECHO_N ECHO_T LIBS build build_cpu build_vendor build_os host host_cpu host_vendor host_os target target_cpu target_vendor target_os target_noncanonical build_subdir host_subdir target_subdir gcc_version_trigger gcc_version_full gcc_version GENINSRC CC CFLAGS LDFLAGS CPPFLAGS ac_ct_CC EXEEXT OBJEXT NO_MINUS_C_MINUS_O OUTPUT_OPTION CPP EGREP strict1_warn warn_cflags WERROR checkingenabled_flag nocommon_flag TREEBROWSER valgrind_path valgrind_path_defines valgrind_command coverage_flags enable_multilib enable_shared TARGET_SYSTEM_ROOT TARGET_SYSTEM_ROOT_DEFINE CROSS_SYSTEM_HEADER_DIR onestep DSYMUTIL LLVMBASEPATH LLVMBUILDMODE SET_MAKE AWK LN_S LN RANLIB ac_
ct_RANLIB ranlib_flags INSTALL INSTALL_PROGRAM INSTALL_DATA make_compare_target have_mktemp_command MAKEINFO BUILD_INFO GENERATED_MANPAGES FLEX BISON NM AR stage1_cflags COLLECT2_LIBS GNAT_LIBEXC LDEXP_LIB TARGET_GETGROUPS_T LIBICONV LTLIBICONV LIBICONV_DEP manext objext gthread_flags extra_modes_file PACKAGE VERSION USE_NLS LIBINTL LIBINTL_DEP INCINTL XGETTEXT GMSGFMT POSUB CATALOGS cc_for_cross_gnattools CROSS ALL SYSTEM_HEADER_DIR inhibit_libc CC_FOR_BUILD BUILD_CFLAGS STMP_FIXINC STMP_FIXPROTO collect2 libgcc_visibility GGC zlibdir zlibinc MAINT gcc_tooldir dollar slibdir objdir subdirs srcdir all_boot_languages all_compilers all_gtfiles all_gtfiles_files_langs all_gtfiles_files_files all_lang_makefrags all_lang_makefiles all_languages all_stagestuff build_exeext build_install_headers_dir build_xm_file_list build_xm_include_list build_xm_defines check_languages cc_set_by_configure quoted_cc_set_by_configure cpp_install_dir xmake_file tmake_file extra_gcc_objs extra_heade
rs_list extra_objs extra_parts extra_passes extra_programs float_h_file gcc_config_arguments gcc_gxx_include_dir libstdcxx_incdir host_exeext host_xm_file_list host_xm_include_list host_xm_defines out_host_hook_obj install lang_opt_files lang_specs_files lang_tree_files local_prefix md_file objc_boehm_gc out_file out_cxx_file out_object_file out_cxx_object_file stage_prefix_set_by_configure quoted_stage_prefix_set_by_configure thread_file tm_file_list tm_include_list tm_defines tm_p_file_list tm_p_include_list xm_file_list xm_include_list xm_defines c_target_objs cxx_target_objs target_cpu_default set_gcc_lib_path GMPLIBS GMPINC LIBOBJS LTLIBOBJS'
ac_subst_files='language_hooks'
# Initialize some variables set by options.
@@ -7089,10 +7089,28 @@
if test -x "$LLVMBASEPATH/Release/bin/llc$EXEEXT"; then
echo Found Release LLVM Tree in $LLVMBASEPATH
+ LLVMBUILDMODE="Release"
elif test -x "$LLVMBASEPATH/Debug/bin/llc$EXEEXT"; then
echo Found Debug LLVM Tree in $LLVMBASEPATH
+ LLVMBUILDMODE="Debug"
elif test -x "$LLVMBASEPATH/Release-Asserts/bin/llc$EXEEXT"; then
echo Found Release-Asserts LLVM Tree in $LLVMBASEPATH
+ LLVMBUILDMODE="Release-Asserts"
+ elif test -x "$LLVMBASEPATH/Debug-Asserts/bin/llc$EXEEXT"; then
+ echo Found Debug-Asserts LLVM Tree in $LLVMBASEPATH
+ LLVMBUILDMODE="Debug-Asserts"
+ elif test -x "$LLVMBASEPATH/Release+Checks/bin/llc$EXEEXT"; then
+ echo Found Release+Checks LLVM Tree in $LLVMBASEPATH
+ LLVMBUILDMODE="Release+Checks"
+ elif test -x "$LLVMBASEPATH/Debug+Checks/bin/llc$EXEEXT"; then
+ echo Found Debug+Checks LLVM Tree in $LLVMBASEPATH
+ LLVMBUILDMODE="Debug+Checks"
+ elif test -x "$LLVMBASEPATH/Release-Asserts+Checks/bin/llc$EXEEXT"; then
+ echo Found Release-Asserts+Checks LLVM Tree in $LLVMBASEPATH
+ LLVMBUILDMODE="Release-Asserts+Checks"
+ elif test -x "$LLVMBASEPATH/Debug-Asserts+Checks/bin/llc$EXEEXT"; then
+ echo Found Debug-Asserts+Checks LLVM Tree in $LLVMBASEPATH
+ LLVMBUILDMODE="Debug-Asserts+Checks"
else
{ { echo "$as_me:$LINENO: error: You must specify valid path to your LLVM tree with --enable-llvm=DIR" >&5
echo "$as_me: error: You must specify valid path to your LLVM tree with --enable-llvm=DIR" >&2;}
@@ -7101,8 +7119,12 @@
else
LLVMBASEPATH=""
+ LLVMBUILDMODE=""
+
fi;
+# Send llvm build mode to gcc Makefiles
+
# APPLE LOCAL end LLVM
# Sanity check enable_languages in case someone does not run the toplevel
@@ -7732,7 +7754,7 @@
else
ac_prog_version=`$MAKEINFO --version 2>&1 |
sed -n 's/^.*GNU texinfo.* \([0-9][0-9.]*\).*$/\1/p'`
- echo "configure:7735: version of makeinfo is $ac_prog_version" >&5
+ echo "configure:7757: version of makeinfo is $ac_prog_version" >&5
case $ac_prog_version in
'') gcc_cv_prog_makeinfo_modern=no;;
4.[2-9]*)
@@ -16669,6 +16691,7 @@
s, at onestep@,$onestep,;t t
s, at DSYMUTIL@,$DSYMUTIL,;t t
s, at LLVMBASEPATH@,$LLVMBASEPATH,;t t
+s, at LLVMBUILDMODE@,$LLVMBUILDMODE,;t t
s, at SET_MAKE@,$SET_MAKE,;t t
s, at AWK@,$AWK,;t t
s, at LN_S@,$LN_S,;t t
Modified: apple-local/branches/llvm/gcc/configure.ac
===================================================================
--- apple-local/branches/llvm/gcc/configure.ac 2007-07-09 02:28:29 UTC (rev 129251)
+++ apple-local/branches/llvm/gcc/configure.ac 2007-07-09 17:56:42 UTC (rev 129252)
@@ -745,16 +745,38 @@
if test -x "$LLVMBASEPATH/Release/bin/llc$EXEEXT"; then
echo Found Release LLVM Tree in $LLVMBASEPATH
+ LLVMBUILDMODE="Release"
elif test -x "$LLVMBASEPATH/Debug/bin/llc$EXEEXT"; then
echo Found Debug LLVM Tree in $LLVMBASEPATH
+ LLVMBUILDMODE="Debug"
elif test -x "$LLVMBASEPATH/Release-Asserts/bin/llc$EXEEXT"; then
echo Found Release-Asserts LLVM Tree in $LLVMBASEPATH
+ LLVMBUILDMODE="Release-Asserts"
+ elif test -x "$LLVMBASEPATH/Debug-Asserts/bin/llc$EXEEXT"; then
+ echo Found Debug-Asserts LLVM Tree in $LLVMBASEPATH
+ LLVMBUILDMODE="Debug-Asserts"
+ elif test -x "$LLVMBASEPATH/Release+Checks/bin/llc$EXEEXT"; then
+ echo Found Release+Checks LLVM Tree in $LLVMBASEPATH
+ LLVMBUILDMODE="Release+Checks"
+ elif test -x "$LLVMBASEPATH/Debug+Checks/bin/llc$EXEEXT"; then
+ echo Found Debug+Checks LLVM Tree in $LLVMBASEPATH
+ LLVMBUILDMODE="Debug+Checks"
+ elif test -x "$LLVMBASEPATH/Release-Asserts+Checks/bin/llc$EXEEXT"; then
+ echo Found Release-Asserts+Checks LLVM Tree in $LLVMBASEPATH
+ LLVMBUILDMODE="Release-Asserts+Checks"
+ elif test -x "$LLVMBASEPATH/Debug-Asserts+Checks/bin/llc$EXEEXT"; then
+ echo Found Debug-Asserts+Checks LLVM Tree in $LLVMBASEPATH
+ LLVMBUILDMODE="Debug-Asserts+Checks"
else
AC_MSG_ERROR([You must specify valid path to your LLVM tree with --enable-llvm=DIR])
fi
],
-[LLVMBASEPATH=""])
+[LLVMBASEPATH=""
+ LLVMBUILDMODE=""
+])
AC_SUBST(LLVMBASEPATH)
+# Send llvm build mode to gcc Makefiles
+AC_SUBST(LLVMBUILDMODE)
# APPLE LOCAL end LLVM
# Sanity check enable_languages in case someone does not run the toplevel
Modified: apple-local/branches/llvm/libcpp/configure
===================================================================
--- apple-local/branches/llvm/libcpp/configure 2007-07-09 02:28:29 UTC (rev 129251)
+++ apple-local/branches/llvm/libcpp/configure 2007-07-09 17:56:42 UTC (rev 129252)
@@ -8023,10 +8023,28 @@
if test -x "$LLVMBASEPATH/Release/bin/llc$EXEEXT"; then
echo Found Release LLVM Tree in $LLVMBASEPATH
+ LLVMBUILDMODE="Release"
elif test -x "$LLVMBASEPATH/Debug/bin/llc$EXEEXT"; then
echo Found Debug LLVM Tree in $LLVMBASEPATH
+ LLVMBUILDMODE="Debug"
elif test -x "$LLVMBASEPATH/Release-Asserts/bin/llc$EXEEXT"; then
echo Found Release-Asserts LLVM Tree in $LLVMBASEPATH
+ LLVMBUILDMODE="Release-Asserts"
+ elif test -x "$LLVMBASEPATH/Debug-Asserts/bin/llc$EXEEXT"; then
+ echo Found Debug-Asserts LLVM Tree in $LLVMBASEPATH
+ LLVMBUILDMODE="Debug-Asserts"
+ elif test -x "$LLVMBASEPATH/Release+Checks/bin/llc$EXEEXT"; then
+ echo Found Release+Checks LLVM Tree in $LLVMBASEPATH
+ LLVMBUILDMODE="Release+Checks"
+ elif test -x "$LLVMBASEPATH/Debug+Checks/bin/llc$EXEEXT"; then
+ echo Found Debug+Checks LLVM Tree in $LLVMBASEPATH
+ LLVMBUILDMODE="Debug+Checks"
+ elif test -x "$LLVMBASEPATH/Release-Asserts+Checks/bin/llc$EXEEXT"; then
+ echo Found Release-Asserts+Checks LLVM Tree in $LLVMBASEPATH
+ LLVMBUILDMODE="Release-Asserts+Checks"
+ elif test -x "$LLVMBASEPATH/Debug-Asserts+Checks/bin/llc$EXEEXT"; then
+ echo Found Debug-Asserts+Checks LLVM Tree in $LLVMBASEPATH
+ LLVMBUILDMODE="Debug-Asserts+Checks"
else
{ { echo "$as_me:$LINENO: error: You must specify valid path to your LLVM tree with --enable-llvm=DIR" >&5
echo "$as_me: error: You must specify valid path to your LLVM tree with --enable-llvm=DIR" >&2;}
Modified: apple-local/branches/llvm/libcpp/configure.ac
===================================================================
--- apple-local/branches/llvm/libcpp/configure.ac 2007-07-09 02:28:29 UTC (rev 129251)
+++ apple-local/branches/llvm/libcpp/configure.ac 2007-07-09 17:56:42 UTC (rev 129252)
@@ -108,9 +108,7 @@
case $target in
# APPLE LOCAL begin 4126124
alpha*-*-* | \
- #APPLE LOCAL begin LLVM
arm*-*-*eabi* | \
- #APPLE LOCAL end LLVM
arm*-*-symbianelf* | \
x86_64-*-* | \
ia64-*-* | \
@@ -161,10 +159,28 @@
if test -x "$LLVMBASEPATH/Release/bin/llc$EXEEXT"; then
echo Found Release LLVM Tree in $LLVMBASEPATH
+ LLVMBUILDMODE="Release"
elif test -x "$LLVMBASEPATH/Debug/bin/llc$EXEEXT"; then
echo Found Debug LLVM Tree in $LLVMBASEPATH
+ LLVMBUILDMODE="Debug"
elif test -x "$LLVMBASEPATH/Release-Asserts/bin/llc$EXEEXT"; then
echo Found Release-Asserts LLVM Tree in $LLVMBASEPATH
+ LLVMBUILDMODE="Release-Asserts"
+ elif test -x "$LLVMBASEPATH/Debug-Asserts/bin/llc$EXEEXT"; then
+ echo Found Debug-Asserts LLVM Tree in $LLVMBASEPATH
+ LLVMBUILDMODE="Debug-Asserts"
+ elif test -x "$LLVMBASEPATH/Release+Checks/bin/llc$EXEEXT"; then
+ echo Found Release+Checks LLVM Tree in $LLVMBASEPATH
+ LLVMBUILDMODE="Release+Checks"
+ elif test -x "$LLVMBASEPATH/Debug+Checks/bin/llc$EXEEXT"; then
+ echo Found Debug+Checks LLVM Tree in $LLVMBASEPATH
+ LLVMBUILDMODE="Debug+Checks"
+ elif test -x "$LLVMBASEPATH/Release-Asserts+Checks/bin/llc$EXEEXT"; then
+ echo Found Release-Asserts+Checks LLVM Tree in $LLVMBASEPATH
+ LLVMBUILDMODE="Release-Asserts+Checks"
+ elif test -x "$LLVMBASEPATH/Debug-Asserts+Checks/bin/llc$EXEEXT"; then
+ echo Found Debug-Asserts+Checks LLVM Tree in $LLVMBASEPATH
+ LLVMBUILDMODE="Debug-Asserts+Checks"
else
AC_MSG_ERROR([You must specify valid path to your LLVM tree with --enable-llvm=DIR])
fi
From clattner at apple.com Mon Jul 9 13:04:06 2007
From: clattner at apple.com (Chris Lattner)
Date: Mon, 9 Jul 2007 11:04:06 -0700
Subject: [llvm-commits] REPOST: llvm-gcc expensive checks patch
In-Reply-To: <200707061151.33902.greened@obbligato.org>
References: <200707061151.33902.greened@obbligato.org>
Message-ID: <66817935-B9DA-432B-9A47-961FDE272D66@apple.com>
On Jul 6, 2007, at 9:51 AM, David A. Greene wrote:
> I posted this patch a while back but nothing happened with it.
> llvm users who
> configure with --enable-expensive-checks are currently unable to build
> llvm-gcc without this patch. autoconf must be re-run after
> applying it.
I applied it:
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-
Mon-20070709/051660.html
Thanks!
I think that "llvm-config --cppflags" should include "-
D__STDC_LIMIT_MACROS". What do you think?
Also, please don't put markers like "Cray [dag]" into the files.
Sorry for the delay!
-Chris
From evan.cheng at apple.com Mon Jul 9 13:22:21 2007
From: evan.cheng at apple.com (Evan Cheng)
Date: Mon, 9 Jul 2007 11:22:21 -0700
Subject: [llvm-commits] [llvm] r37843 -
/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
In-Reply-To: <20070709154814.GY5693@village.us.cray.com>
References:
<20070705144923.GK5693@village.us.cray.com>
<8C8471C2-C2F2-4F05-9448-C8BE48737B1C@apple.com>
<16e5fdf90707051633n37bdb9bdu2ef96002be91317d@mail.gmail.com>
<2E082165-6BB1-465A-AE4B-ED696ED37CFC@apple.com>
<15F625BF-09FB-4C24-9EF9-004C2643F370@apple.com>
<20070706131057.GO5693@village.us.cray.com>
<239AACE9-F6F0-4C93-AF6B-CEF2125D030F@apple.com>
<20070709154814.GY5693@village.us.cray.com>
Message-ID:
On Jul 9, 2007, at 8:48 AM, Dan Gohman wrote:
> I found a problem in an interaction between my patch and the
> PPCISelLowering.cpp code for lowering call results. The PPC target
> code
> effectively assigns registers for a call result in reverse order. My
> patch was presenting it with registers already in target order.
> This is
> more consistent with code for other constructs, so it seems best to
> fix
> the PPCISelLowering.cpp code.
Ah, thanks for looking into this. I'd suspected something like this
but didn't have time to dig in.
>
> Attached is a new patch. It's the same change to
> SelectionDAGISel.cpp as
> before, but it's now accompanied by the PPCISelLowering.cpp update
> and a
> test case which demonstrates the failure with the previous patch and
> passes with the new one.
I'll try it out asap.
>
> Thanks for your help,
You bet!
Evan
>
> Dan
>
> On Fri, Jul 06, 2007 at 01:40:33PM -0700, Evan Cheng wrote:
>> This seems to have fixed llvm-test failures, but Mac OS X PPC
>> bootstrapping is still unhappy. :-(
>>
>> Evan
>>
>
> --
> Dan Gohman, Cray Inc.
>
From resistor at mac.com Mon Jul 9 13:51:16 2007
From: resistor at mac.com (Owen Anderson)
Date: Mon, 09 Jul 2007 18:51:16 -0000
Subject: [llvm-commits] [llvm] r38467 -
/llvm/trunk/lib/Support/SmallPtrSet.cpp
Message-ID: <200707091851.l69IpGTo017943@zion.cs.uiuc.edu>
Author: resistor
Date: Mon Jul 9 13:51:15 2007
New Revision: 38467
URL: http://llvm.org/viewvc/llvm-project?rev=38467&view=rev
Log:
Fix an error in the assignment operator that was causing an infinite loop in GVNPRE.cpp.
Patch by Chis Lattner.
Modified:
llvm/trunk/lib/Support/SmallPtrSet.cpp
Modified: llvm/trunk/lib/Support/SmallPtrSet.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/SmallPtrSet.cpp?rev=38467&r1=38466&r2=38467&view=diff
==============================================================================
--- llvm/trunk/lib/Support/SmallPtrSet.cpp (original)
+++ llvm/trunk/lib/Support/SmallPtrSet.cpp Mon Jul 9 13:51:15 2007
@@ -182,6 +182,8 @@
if (!isSmall())
delete [] CurArray;
+ NumElements = NumTombstones = 0;
+
// Get a power of two larger than twice the RHS size.
CurArraySize = 1 << Log2_32(RHS.size()*4);
@@ -199,12 +201,18 @@
// Now that we know we have enough space, and that the current array is empty,
// copy over all the elements from the RHS.
-
for (void **BucketPtr = RHS.CurArray, **E = RHS.CurArray+RHS.CurArraySize;
BucketPtr != E; ++BucketPtr) {
// Copy over the element if it is valid.
void *Elt = *BucketPtr;
- if (Elt != getTombstoneMarker() && Elt != getEmptyMarker())
- *const_cast(FindBucketFor(Elt)) = Elt;
+ if (Elt != getTombstoneMarker() && Elt != getEmptyMarker()) {
+ if (isSmall())
+ SmallArray[NumElements++] = Elt;
+ else
+ *const_cast(FindBucketFor(Elt)) = Elt;
+ }
}
+
+ if (!isSmall())
+ NumElements = RHS.NumElements;
}
From evan.cheng at apple.com Mon Jul 9 15:48:16 2007
From: evan.cheng at apple.com (Evan Cheng)
Date: Mon, 9 Jul 2007 13:48:16 -0700
Subject: [llvm-commits] [llvm] r37843 -
/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
In-Reply-To: <20070709154814.GY5693@village.us.cray.com>
References:
<20070705144923.GK5693@village.us.cray.com>
<8C8471C2-C2F2-4F05-9448-C8BE48737B1C@apple.com>
<16e5fdf90707051633n37bdb9bdu2ef96002be91317d@mail.gmail.com>
<2E082165-6BB1-465A-AE4B-ED696ED37CFC@apple.com>
<15F625BF-09FB-4C24-9EF9-004C2643F370@apple.com>
<20070706131057.GO5693@village.us.cray.com>
<239AACE9-F6F0-4C93-AF6B-CEF2125D030F@apple.com>
<20070709154814.GY5693@village.us.cray.com>
Message-ID:
Hi Dan,
The patch works great! Please commit.
Thanks,
Evan
On Jul 9, 2007, at 8:48 AM, Dan Gohman wrote:
> I found a problem in an interaction between my patch and the
> PPCISelLowering.cpp code for lowering call results. The PPC target
> code
> effectively assigns registers for a call result in reverse order. My
> patch was presenting it with registers already in target order.
> This is
> more consistent with code for other constructs, so it seems best to
> fix
> the PPCISelLowering.cpp code.
>
> Attached is a new patch. It's the same change to
> SelectionDAGISel.cpp as
> before, but it's now accompanied by the PPCISelLowering.cpp update
> and a
> test case which demonstrates the failure with the previous patch and
> passes with the new one.
>
> Thanks for your help,
>
> Dan
>
> On Fri, Jul 06, 2007 at 01:40:33PM -0700, Evan Cheng wrote:
>> This seems to have fixed llvm-test failures, but Mac OS X PPC
>> bootstrapping is still unhappy. :-(
>>
>> Evan
>>
>
> --
> Dan Gohman, Cray Inc.
>
From djg at cray.com Mon Jul 9 15:49:45 2007
From: djg at cray.com (Dan Gohman)
Date: Mon, 09 Jul 2007 20:49:45 -0000
Subject: [llvm-commits] [llvm] r38468 -
/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
Message-ID: <200707092049.l69Knj4n023742@zion.cs.uiuc.edu>
Author: djg
Date: Mon Jul 9 15:49:44 2007
New Revision: 38468
URL: http://llvm.org/viewvc/llvm-project?rev=38468&view=rev
Log:
Initialize the IndexedModeActions array with memset before
updating it with calls to setIndexedLoadAction/setIndexedStoreAction,
which only update a few bits at a time. This avoids ostensible
undefined behavior of operationg on values which may be
trap-representations, and as a practical matter fixes errors from
valgrind, which doesn't track uninitialized memory with bit
granularity.
Modified:
llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=38468&r1=38467&r2=38468&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Mon Jul 9 15:49:44 2007
@@ -128,7 +128,9 @@
memset(OpActions, 0, sizeof(OpActions));
memset(LoadXActions, 0, sizeof(LoadXActions));
memset(&StoreXActions, 0, sizeof(StoreXActions));
- // Initialize all indexed load / store to expand.
+ memset(&IndexedModeActions, 0, sizeof(IndexedModeActions));
+
+ // Set all indexed load / store to expand.
for (unsigned VT = 0; VT != (unsigned)MVT::LAST_VALUETYPE; ++VT) {
for (unsigned IM = (unsigned)ISD::PRE_INC;
IM != (unsigned)ISD::LAST_INDEXED_MODE; ++IM) {
From dpatel at apple.com Mon Jul 9 15:52:39 2007
From: dpatel at apple.com (Devang Patel)
Date: Mon, 09 Jul 2007 20:52:39 -0000
Subject: [llvm-commits] [llvm] r38469 - in /llvm/trunk: include/llvm/Pass.h
lib/VMCore/PassManager.cpp
Message-ID: <200707092052.l69Kqdlo023844@zion.cs.uiuc.edu>
Author: dpatel
Date: Mon Jul 9 15:52:39 2007
New Revision: 38469
URL: http://llvm.org/viewvc/llvm-project?rev=38469&view=rev
Log:
Fix memory leak.
Modified:
llvm/trunk/include/llvm/Pass.h
llvm/trunk/lib/VMCore/PassManager.cpp
Modified: llvm/trunk/include/llvm/Pass.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Pass.h?rev=38469&r1=38468&r2=38469&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Pass.h (original)
+++ llvm/trunk/include/llvm/Pass.h Mon Jul 9 15:52:39 2007
@@ -130,8 +130,14 @@
}
// Access AnalysisResolver
- inline void setResolver(AnalysisResolver *AR) { Resolver = AR; }
- inline AnalysisResolver *getResolver() { return Resolver; }
+ inline void setResolver(AnalysisResolver *AR) {
+ assert (!Resolver && "Resolver is already set");
+ Resolver = AR;
+ }
+ inline AnalysisResolver *getResolver() {
+ assert (Resolver && "Resolver is not set");
+ return Resolver;
+ }
/// getAnalysisUsage - This function should be overriden by passes that need
/// analysis information to do their job. If a pass specifies that it uses a
Modified: llvm/trunk/lib/VMCore/PassManager.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/PassManager.cpp?rev=38469&r1=38468&r2=38469&view=diff
==============================================================================
--- llvm/trunk/lib/VMCore/PassManager.cpp (original)
+++ llvm/trunk/lib/VMCore/PassManager.cpp Mon Jul 9 15:52:39 2007
@@ -1380,9 +1380,6 @@
PM->setTopLevelManager(TPM);
}
- AnalysisResolver *AR = new AnalysisResolver(*Top);
- P->setResolver(AR);
-
S.push_back(PM);
}
From resistor at mac.com Mon Jul 9 15:59:01 2007
From: resistor at mac.com (Owen Anderson)
Date: Mon, 09 Jul 2007 20:59:01 -0000
Subject: [llvm-commits] [llvm] r38470 - in /llvm/trunk:
include/llvm/ADT/SmallPtrSet.h lib/Support/SmallPtrSet.cpp
Message-ID: <200707092059.l69Kx11Z024039@zion.cs.uiuc.edu>
Author: resistor
Date: Mon Jul 9 15:59:01 2007
New Revision: 38470
URL: http://llvm.org/viewvc/llvm-project?rev=38470&view=rev
Log:
Make the assignment operator for SmallPtrSet return a reference, and fix a long-standing bug in the copy
ctor while I'm at it.
Thanks to Chris Lattner for help with this patch.
Modified:
llvm/trunk/include/llvm/ADT/SmallPtrSet.h
llvm/trunk/lib/Support/SmallPtrSet.cpp
Modified: llvm/trunk/include/llvm/ADT/SmallPtrSet.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/SmallPtrSet.h?rev=38470&r1=38469&r2=38470&view=diff
==============================================================================
--- llvm/trunk/include/llvm/ADT/SmallPtrSet.h (original)
+++ llvm/trunk/include/llvm/ADT/SmallPtrSet.h Mon Jul 9 15:59:01 2007
@@ -240,7 +240,7 @@
// Allow assignment from any smallptrset with the same element type even if it
// doesn't have the same smallsize.
- const SmallPtrSet
+ const SmallPtrSet&
operator=(const SmallPtrSet &RHS) {
CopyFrom(RHS);
return *this;
Modified: llvm/trunk/lib/Support/SmallPtrSet.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/SmallPtrSet.cpp?rev=38470&r1=38469&r2=38470&view=diff
==============================================================================
--- llvm/trunk/lib/Support/SmallPtrSet.cpp (original)
+++ llvm/trunk/lib/Support/SmallPtrSet.cpp Mon Jul 9 15:59:01 2007
@@ -164,7 +164,7 @@
CurArray[CurArraySize] = 0;
// Copy over all valid entries.
- for (void **BucketPtr = that.CurArray, **E = that.CurArray+CurArraySize;
+ for (void **BucketPtr = that.CurArray, **E = that.CurArray+that.CurArraySize;
BucketPtr != E; ++BucketPtr) {
// Copy over the element if it is valid.
void *Elt = *BucketPtr;
From djg at cray.com Mon Jul 9 15:59:04 2007
From: djg at cray.com (Dan Gohman)
Date: Mon, 09 Jul 2007 20:59:04 -0000
Subject: [llvm-commits] [llvm] r38471 - in /llvm/trunk:
lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
lib/Target/PowerPC/PPCISelLowering.cpp
test/CodeGen/PowerPC/big-endian-call-result.ll
Message-ID: <200707092059.l69Kx4x2024053@zion.cs.uiuc.edu>
Author: djg
Date: Mon Jul 9 15:59:04 2007
New Revision: 38471
URL: http://llvm.org/viewvc/llvm-project?rev=38471&view=rev
Log:
Change getCopyToParts and getCopyFromParts to always use target-endian
register ordering, for both physical and virtual registers. Update the PPC
target lowering for calls to expect registers for the call result to
already be in target order.
Added:
llvm/trunk/test/CodeGen/PowerPC/big-endian-call-result.ll
Modified:
llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=38471&r1=38470&r2=38471&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Mon Jul 9 15:59:04 2007
@@ -621,7 +621,6 @@
unsigned NumParts,
MVT::ValueType PartVT,
MVT::ValueType ValueVT,
- bool EndianOrder,
ISD::NodeType AssertOp = ISD::DELETED_NODE) {
if (!MVT::isVector(ValueVT) || NumParts == 1) {
SDOperand Val = Parts[0];
@@ -631,7 +630,7 @@
assert(NumParts == 2 &&
"Cannot expand to more than 2 elts yet!");
SDOperand Hi = Parts[1];
- if (EndianOrder && !DAG.getTargetLoweringInfo().isLittleEndian())
+ if (!DAG.getTargetLoweringInfo().isLittleEndian())
std::swap(Val, Hi);
return DAG.getNode(ISD::BUILD_PAIR, ValueVT, Val, Hi);
}
@@ -692,7 +691,7 @@
// as appropriate.
for (unsigned i = 0; i != NumParts; ++i)
Ops[i] = getCopyFromParts(DAG, &Parts[i], 1,
- PartVT, IntermediateVT, EndianOrder);
+ PartVT, IntermediateVT);
} else if (NumParts > 0) {
// If the intermediate type was expanded, build the intermediate operands
// from the parts.
@@ -701,7 +700,7 @@
unsigned Factor = NumIntermediates / NumParts;
for (unsigned i = 0; i != NumIntermediates; ++i)
Ops[i] = getCopyFromParts(DAG, &Parts[i * Factor], Factor,
- PartVT, IntermediateVT, EndianOrder);
+ PartVT, IntermediateVT);
}
// Build a vector with BUILD_VECTOR or CONCAT_VECTORS from the intermediate
@@ -718,8 +717,7 @@
SDOperand Val,
SDOperand *Parts,
unsigned NumParts,
- MVT::ValueType PartVT,
- bool EndianOrder) {
+ MVT::ValueType PartVT) {
MVT::ValueType ValueVT = Val.getValueType();
if (!MVT::isVector(ValueVT) || NumParts == 1) {
@@ -728,7 +726,7 @@
for (unsigned i = 0; i != NumParts; ++i)
Parts[i] = DAG.getNode(ISD::EXTRACT_ELEMENT, PartVT, Val,
DAG.getConstant(i, MVT::i32));
- if (EndianOrder && !DAG.getTargetLoweringInfo().isLittleEndian())
+ if (!DAG.getTargetLoweringInfo().isLittleEndian())
std::reverse(Parts, Parts + NumParts);
return;
}
@@ -789,7 +787,7 @@
// If the register was not expanded, promote or copy the value,
// as appropriate.
for (unsigned i = 0; i != NumParts; ++i)
- getCopyToParts(DAG, Ops[i], &Parts[i], 1, PartVT, EndianOrder);
+ getCopyToParts(DAG, Ops[i], &Parts[i], 1, PartVT);
} else if (NumParts > 0) {
// If the intermediate type was expanded, split each the value into
// legal parts.
@@ -797,7 +795,7 @@
"Must expand into a divisible number of parts!");
unsigned Factor = NumParts / NumIntermediates;
for (unsigned i = 0; i != NumIntermediates; ++i)
- getCopyToParts(DAG, Ops[i], &Parts[i * Factor], Factor, PartVT, EndianOrder);
+ getCopyToParts(DAG, Ops[i], &Parts[i * Factor], Factor, PartVT);
}
}
@@ -928,7 +926,7 @@
unsigned NumParts = TLI.getNumRegisters(VT);
MVT::ValueType PartVT = TLI.getRegisterType(VT);
SmallVector Parts(NumParts);
- getCopyToParts(DAG, RetOp, &Parts[0], NumParts, PartVT, true);
+ getCopyToParts(DAG, RetOp, &Parts[0], NumParts, PartVT);
for (unsigned i = 0; i < NumParts; ++i) {
NewValues.push_back(Parts[i]);
NewValues.push_back(DAG.getConstant(false, MVT::i32));
@@ -2952,11 +2950,6 @@
/// If the Flag pointer is NULL, no flag is used.
SDOperand RegsForValue::getCopyFromRegs(SelectionDAG &DAG,
SDOperand &Chain, SDOperand *Flag)const{
- // Get the list of registers, in the appropriate order.
- std::vector R(Regs);
- if (!DAG.getTargetLoweringInfo().isLittleEndian())
- std::reverse(R.begin(), R.end());
-
// Copy the legal parts from the registers.
unsigned NumParts = Regs.size();
SmallVector Parts(NumParts);
@@ -2971,7 +2964,7 @@
}
// Assemble the legal parts into the final value.
- return getCopyFromParts(DAG, &Parts[0], NumParts, RegVT, ValueVT, false);
+ return getCopyFromParts(DAG, &Parts[0], NumParts, RegVT, ValueVT);
}
/// getCopyToRegs - Emit a series of CopyToReg nodes that copies the
@@ -2980,21 +2973,16 @@
/// If the Flag pointer is NULL, no flag is used.
void RegsForValue::getCopyToRegs(SDOperand Val, SelectionDAG &DAG,
SDOperand &Chain, SDOperand *Flag) const {
- // Get the list of registers, in the appropriate order.
- std::vector R(Regs);
- if (!DAG.getTargetLoweringInfo().isLittleEndian())
- std::reverse(R.begin(), R.end());
-
// Get the list of the values's legal parts.
unsigned NumParts = Regs.size();
SmallVector Parts(NumParts);
- getCopyToParts(DAG, Val, &Parts[0], NumParts, RegVT, false);
+ getCopyToParts(DAG, Val, &Parts[0], NumParts, RegVT);
// Copy the parts into the registers.
for (unsigned i = 0; i != NumParts; ++i) {
SDOperand Part = Flag ?
- DAG.getCopyToReg(Chain, R[i], Parts[i], *Flag) :
- DAG.getCopyToReg(Chain, R[i], Parts[i]);
+ DAG.getCopyToReg(Chain, Regs[i], Parts[i], *Flag) :
+ DAG.getCopyToReg(Chain, Regs[i], Parts[i]);
Chain = Part.getValue(0);
if (Flag)
*Flag = Part.getValue(1);
@@ -3867,7 +3855,7 @@
SmallVector Parts(NumParts);
for (unsigned j = 0; j != NumParts; ++j)
Parts[j] = SDOperand(Result, i++);
- Ops.push_back(getCopyFromParts(DAG, &Parts[0], NumParts, PartVT, VT, true));
+ Ops.push_back(getCopyFromParts(DAG, &Parts[0], NumParts, PartVT, VT));
break;
}
}
@@ -3939,7 +3927,7 @@
MVT::ValueType PartVT = getRegisterType(VT);
unsigned NumParts = getNumRegisters(VT);
SmallVector Parts(NumParts);
- getCopyToParts(DAG, Op, &Parts[0], NumParts, PartVT, true);
+ getCopyToParts(DAG, Op, &Parts[0], NumParts, PartVT);
for (unsigned i = 0; i != NumParts; ++i) {
// if it isn't first piece, alignment must be 1
unsigned MyFlags = Flags;
@@ -3979,7 +3967,7 @@
SmallVector Results(NumRegs);
for (unsigned i = 0; i != NumRegs; ++i)
Results[i] = Res.getValue(i);
- Res = getCopyFromParts(DAG, &Results[0], NumRegs, RegisterVT, VT, false, AssertOp);
+ Res = getCopyFromParts(DAG, &Results[0], NumRegs, RegisterVT, VT, AssertOp);
}
return std::make_pair(Res, Chain);
@@ -4269,7 +4257,7 @@
SmallVector Chains(NumRegs);
// Copy the value by legal parts into sequential virtual registers.
- getCopyToParts(DAG, Op, &Regs[0], NumRegs, RegisterVT, false);
+ getCopyToParts(DAG, Op, &Regs[0], NumRegs, RegisterVT);
for (unsigned i = 0; i != NumRegs; ++i)
Chains[i] = DAG.getCopyToReg(getRoot(), Reg + i, Regs[i]);
return DAG.getNode(ISD::TokenFactor, MVT::Other, &Chains[0], NumRegs);
@@ -4406,8 +4394,8 @@
if (TI->getNumSuccessors())
SuccsHandled.resize(BB->getParent()->getNumBlockIDs());
- // Check successor nodes PHI nodes that expect a constant to be available from
- // this block.
+ // Check successor nodes' PHI nodes that expect a constant to be available
+ // from this block.
for (unsigned succ = 0, e = TI->getNumSuccessors(); succ != e; ++succ) {
BasicBlock *SuccBB = TI->getSuccessor(succ);
if (!isa(SuccBB->begin())) continue;
Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp?rev=38471&r1=38470&r2=38471&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Mon Jul 9 15:59:04 2007
@@ -1774,9 +1774,9 @@
case MVT::Other: break;
case MVT::i32:
if (Op.Val->getValueType(1) == MVT::i32) {
- Chain = DAG.getCopyFromReg(Chain, PPC::R4, MVT::i32, InFlag).getValue(1);
+ Chain = DAG.getCopyFromReg(Chain, PPC::R3, MVT::i32, InFlag).getValue(1);
ResultVals[0] = Chain.getValue(0);
- Chain = DAG.getCopyFromReg(Chain, PPC::R3, MVT::i32,
+ Chain = DAG.getCopyFromReg(Chain, PPC::R4, MVT::i32,
Chain.getValue(2)).getValue(1);
ResultVals[1] = Chain.getValue(0);
NumResults = 2;
Added: llvm/trunk/test/CodeGen/PowerPC/big-endian-call-result.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/big-endian-call-result.ll?rev=38471&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/big-endian-call-result.ll (added)
+++ llvm/trunk/test/CodeGen/PowerPC/big-endian-call-result.ll Mon Jul 9 15:59:04 2007
@@ -0,0 +1,13 @@
+; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-unknown-linux-gnu | \
+; RUN: grep {addic 4, 4, 1}
+; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-unknown-linux-gnu | \
+; RUN: grep {addze 3, 3}
+
+declare i64 @foo();
+
+define i64 @bar()
+{
+ %t = call i64 @foo()
+ %s = add i64 %t, 1
+ ret i64 %s
+}
From dpatel at apple.com Mon Jul 9 16:19:24 2007
From: dpatel at apple.com (Devang Patel)
Date: Mon, 09 Jul 2007 21:19:24 -0000
Subject: [llvm-commits] [llvm] r38472 - in /llvm/trunk:
include/llvm/Transforms/Scalar.h
lib/Transforms/Scalar/ScalarReplAggregates.cpp
Message-ID: <200707092119.l69LJOu2025274@zion.cs.uiuc.edu>
Author: dpatel
Date: Mon Jul 9 16:19:23 2007
New Revision: 38472
URL: http://llvm.org/viewvc/llvm-project?rev=38472&view=rev
Log:
Expose struct size threhold to allow users to tweak their own setting.
Modified:
llvm/trunk/include/llvm/Transforms/Scalar.h
llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp
Modified: llvm/trunk/include/llvm/Transforms/Scalar.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Transforms/Scalar.h?rev=38472&r1=38471&r2=38472&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Transforms/Scalar.h (original)
+++ llvm/trunk/include/llvm/Transforms/Scalar.h Mon Jul 9 16:19:23 2007
@@ -76,7 +76,7 @@
// ScalarReplAggregates - Break up alloca's of aggregates into multiple allocas
// if possible.
//
-FunctionPass *createScalarReplAggregatesPass();
+FunctionPass *createScalarReplAggregatesPass(signed Threshold = -1);
//===----------------------------------------------------------------------===//
//
Modified: llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp?rev=38472&r1=38471&r2=38472&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp Mon Jul 9 16:19:23 2007
@@ -48,7 +48,12 @@
namespace {
struct VISIBILITY_HIDDEN SROA : public FunctionPass {
static char ID; // Pass identification, replacement for typeid
- SROA() : FunctionPass((intptr_t)&ID) {}
+ SROA(signed T = -1) : FunctionPass((intptr_t)&ID) {
+ if (T == -1)
+ SRThreshold = 128;
+ else
+ SRThreshold = T;
+ }
bool runOnFunction(Function &F);
@@ -87,6 +92,8 @@
isMemCpySrc(false), isMemCpyDst(false) {}
};
+ unsigned SRThreshold;
+
void MarkUnsafe(AllocaInfo &I) { I.isUnsafe = true; }
int isSafeAllocaToScalarRepl(AllocationInst *AI);
@@ -119,7 +126,9 @@
}
// Public interface to the ScalarReplAggregates pass
-FunctionPass *llvm::createScalarReplAggregatesPass() { return new SROA(); }
+FunctionPass *llvm::createScalarReplAggregatesPass(signed int Threshold) {
+ return new SROA(Threshold);
+}
bool SROA::runOnFunction(Function &F) {
@@ -211,7 +220,7 @@
(isa(AI->getAllocatedType()) ||
isa(AI->getAllocatedType())) &&
AI->getAllocatedType()->isSized() &&
- TD.getTypeSize(AI->getAllocatedType()) < 128) {
+ TD.getTypeSize(AI->getAllocatedType()) < SRThreshold) {
// Check that all of the users of the allocation are capable of being
// transformed.
switch (isSafeAllocaToScalarRepl(AI)) {
From djg at cray.com Mon Jul 9 17:18:39 2007
From: djg at cray.com (Dan Gohman)
Date: Mon, 09 Jul 2007 22:18:39 -0000
Subject: [llvm-commits] [llvm] r38473 - in
/llvm/trunk/lib/CodeGen/SelectionDAG: DAGCombiner.cpp LegalizeDAG.cpp
Message-ID: <200707092218.l69MIdcx027334@zion.cs.uiuc.edu>
Author: djg
Date: Mon Jul 9 17:18:38 2007
New Revision: 38473
URL: http://llvm.org/viewvc/llvm-project?rev=38473&view=rev
Log:
Preserve volatililty and alignment information when lowering or
simplifying loads and stores.
Modified:
llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=38473&r1=38472&r2=38473&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Mon Jul 9 17:18:38 2007
@@ -2394,7 +2394,8 @@
LN0->getBasePtr(), LN0->getSrcValue(),
LN0->getSrcValueOffset(),
N0.getValueType(),
- LN0->isVolatile());
+ LN0->isVolatile(),
+ LN0->getAlignment());
CombineTo(N, ExtLoad);
CombineTo(N0.Val, DAG.getNode(ISD::TRUNCATE, N0.getValueType(), ExtLoad),
ExtLoad.getValue(1));
@@ -2872,7 +2873,7 @@
if (Align <= OrigAlign) {
SDOperand Load = DAG.getLoad(VT, LN0->getChain(), LN0->getBasePtr(),
LN0->getSrcValue(), LN0->getSrcValueOffset(),
- LN0->isVolatile(), LN0->getAlignment());
+ LN0->isVolatile(), Align);
AddToWorkList(N);
CombineTo(N0.Val, DAG.getNode(ISD::BIT_CONVERT, N0.getValueType(), Load),
Load.getValue(1));
@@ -3739,7 +3740,7 @@
getABITypeAlignment(MVT::getTypeForValueType(SVT));
if (Align <= OrigAlign && TLI.isOperationLegal(ISD::STORE, SVT))
return DAG.getStore(Chain, Value.getOperand(0), Ptr, ST->getSrcValue(),
- ST->getSrcValueOffset());
+ ST->getSrcValueOffset(), ST->isVolatile(), Align);
}
// Turn 'store float 1.0, Ptr' -> 'store int 0x12345678, Ptr'
@@ -3752,14 +3753,16 @@
if (!AfterLegalize || TLI.isTypeLegal(MVT::i32)) {
Tmp = DAG.getConstant(FloatToBits(CFP->getValue()), MVT::i32);
return DAG.getStore(Chain, Tmp, Ptr, ST->getSrcValue(),
- ST->getSrcValueOffset());
+ ST->getSrcValueOffset(), ST->isVolatile(),
+ ST->getAlignment());
}
break;
case MVT::f64:
if (!AfterLegalize || TLI.isTypeLegal(MVT::i64)) {
Tmp = DAG.getConstant(DoubleToBits(CFP->getValue()), MVT::i64);
return DAG.getStore(Chain, Tmp, Ptr, ST->getSrcValue(),
- ST->getSrcValueOffset());
+ ST->getSrcValueOffset(), ST->isVolatile(),
+ ST->getAlignment());
} else if (TLI.isTypeLegal(MVT::i32)) {
// Many FP stores are not make apparent until after legalize, e.g. for
// argument passing. Since this is so common, custom legalize the
@@ -3769,12 +3772,20 @@
SDOperand Hi = DAG.getConstant(Val >> 32, MVT::i32);
if (!TLI.isLittleEndian()) std::swap(Lo, Hi);
+ int SVOffset = ST->getSrcValueOffset();
+ unsigned Alignment = ST->getAlignment();
+ bool isVolatile = ST->isVolatile();
+
SDOperand St0 = DAG.getStore(Chain, Lo, Ptr, ST->getSrcValue(),
- ST->getSrcValueOffset());
+ ST->getSrcValueOffset(),
+ isVolatile, ST->getAlignment());
Ptr = DAG.getNode(ISD::ADD, Ptr.getValueType(), Ptr,
DAG.getConstant(4, Ptr.getValueType()));
+ SVOffset += 4;
+ if (Alignment > 4)
+ Alignment = 4;
SDOperand St1 = DAG.getStore(Chain, Hi, Ptr, ST->getSrcValue(),
- ST->getSrcValueOffset()+4);
+ SVOffset, isVolatile, Alignment);
return DAG.getNode(ISD::TokenFactor, MVT::Other, St0, St1);
}
break;
@@ -3792,10 +3803,12 @@
SDOperand ReplStore;
if (ST->isTruncatingStore()) {
ReplStore = DAG.getTruncStore(BetterChain, Value, Ptr,
- ST->getSrcValue(),ST->getSrcValueOffset(), ST->getStoredVT());
+ ST->getSrcValue(), ST->getSrcValueOffset(), ST->getStoredVT(),
+ ST->isVolatile(), ST->getAlignment());
} else {
ReplStore = DAG.getStore(BetterChain, Value, Ptr,
- ST->getSrcValue(), ST->getSrcValueOffset());
+ ST->getSrcValue(), ST->getSrcValueOffset(),
+ ST->isVolatile(), ST->getAlignment());
}
// Create token to keep both nodes around.
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=38473&r1=38472&r2=38473&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Mon Jul 9 17:18:38 2007
@@ -1500,7 +1500,8 @@
MVT::ValueType NVT = TLI.getTypeToPromoteTo(Node->getOpcode(), VT);
Tmp1 = DAG.getLoad(NVT, Tmp1, Tmp2, LD->getSrcValue(),
- LD->getSrcValueOffset());
+ LD->getSrcValueOffset(),
+ LD->isVolatile(), LD->getAlignment());
Tmp3 = LegalizeOp(DAG.getNode(ISD::BIT_CONVERT, VT, Tmp1));
Tmp4 = LegalizeOp(Tmp1.getValue(1));
break;
@@ -1520,7 +1521,7 @@
"Can only promote extending LOAD from i1 -> i8!");
Result = DAG.getExtLoad(ExtType, Node->getValueType(0), Tmp1, Tmp2,
LD->getSrcValue(), LD->getSrcValueOffset(),
- MVT::i8);
+ MVT::i8, LD->isVolatile(), LD->getAlignment());
Tmp1 = Result.getValue(0);
Tmp2 = Result.getValue(1);
break;
@@ -1544,7 +1545,8 @@
// f64 = EXTLOAD f32 should expand to LOAD, FP_EXTEND
if (SrcVT == MVT::f32 && Node->getValueType(0) == MVT::f64) {
SDOperand Load = DAG.getLoad(SrcVT, Tmp1, Tmp2, LD->getSrcValue(),
- LD->getSrcValueOffset());
+ LD->getSrcValueOffset(),
+ LD->isVolatile(), LD->getAlignment());
Result = DAG.getNode(ISD::FP_EXTEND, Node->getValueType(0), Load);
Tmp1 = LegalizeOp(Result); // Relegalize new nodes.
Tmp2 = LegalizeOp(Load.getValue(1));
@@ -1555,7 +1557,8 @@
// zero/sign extend inreg.
Result = DAG.getExtLoad(ISD::EXTLOAD, Node->getValueType(0),
Tmp1, Tmp2, LD->getSrcValue(),
- LD->getSrcValueOffset(), SrcVT);
+ LD->getSrcValueOffset(), SrcVT,
+ LD->isVolatile(), LD->getAlignment());
SDOperand ValRes;
if (ExtType == ISD::SEXTLOAD)
ValRes = DAG.getNode(ISD::SIGN_EXTEND_INREG, Result.getValueType(),
@@ -1753,6 +1756,9 @@
StoreSDNode *ST = cast(Node);
Tmp1 = LegalizeOp(ST->getChain()); // Legalize the chain.
Tmp2 = LegalizeOp(ST->getBasePtr()); // Legalize the pointer.
+ int SVOffset = ST->getSrcValueOffset();
+ unsigned Alignment = ST->getAlignment();
+ bool isVolatile = ST->isVolatile();
if (!ST->isTruncatingStore()) {
// Turn 'store float 1.0, Ptr' -> 'store int 0x12345678, Ptr'
@@ -1769,7 +1775,7 @@
Tmp3 = DAG.getConstant(DoubleToBits(CFP->getValue()), MVT::i64);
}
Result = DAG.getStore(Tmp1, Tmp3, Tmp2, ST->getSrcValue(),
- ST->getSrcValueOffset());
+ SVOffset, isVolatile, Alignment);
break;
}
@@ -1792,7 +1798,8 @@
Tmp3 = DAG.getNode(ISD::BIT_CONVERT,
TLI.getTypeToPromoteTo(ISD::STORE, VT), Tmp3);
Result = DAG.getStore(Tmp1, Tmp3, Tmp2,
- ST->getSrcValue(), ST->getSrcValueOffset());
+ ST->getSrcValue(), SVOffset, isVolatile,
+ Alignment);
break;
}
break;
@@ -1801,7 +1808,8 @@
// Truncate the value and store the result.
Tmp3 = PromoteOp(ST->getValue());
Result = DAG.getTruncStore(Tmp1, Tmp3, Tmp2, ST->getSrcValue(),
- ST->getSrcValueOffset(), ST->getStoredVT());
+ SVOffset, ST->getStoredVT(),
+ isVolatile, Alignment);
break;
case Expand:
@@ -1823,18 +1831,14 @@
// Turn this into a normal store of the vector type.
Tmp3 = LegalizeOp(Node->getOperand(1));
Result = DAG.getStore(Tmp1, Tmp3, Tmp2, ST->getSrcValue(),
- ST->getSrcValueOffset(),
- ST->isVolatile(),
- ST->getAlignment());
+ SVOffset, isVolatile, Alignment);
Result = LegalizeOp(Result);
break;
} else if (NumElems == 1) {
// Turn this into a normal store of the scalar type.
Tmp3 = ScalarizeVectorOp(Node->getOperand(1));
Result = DAG.getStore(Tmp1, Tmp3, Tmp2, ST->getSrcValue(),
- ST->getSrcValueOffset(),
- ST->isVolatile(),
- ST->getAlignment());
+ SVOffset, isVolatile, Alignment);
// The scalarized value type may not be legal, e.g. it might require
// promotion or expansion. Relegalize the scalar store.
Result = LegalizeOp(Result);
@@ -1852,8 +1856,7 @@
}
Lo = DAG.getStore(Tmp1, Lo, Tmp2, ST->getSrcValue(),
- ST->getSrcValueOffset(), ST->isVolatile(),
- ST->getAlignment());
+ SVOffset, isVolatile, Alignment);
if (Hi.Val == NULL) {
// Must be int <-> float one-to-one expansion.
@@ -1865,11 +1868,11 @@
getIntPtrConstant(IncrementSize));
assert(isTypeLegal(Tmp2.getValueType()) &&
"Pointers must be legal!");
- // FIXME: This sets the srcvalue of both halves to be the same, which is
- // wrong.
+ SVOffset += IncrementSize;
+ if (Alignment > IncrementSize)
+ Alignment = IncrementSize;
Hi = DAG.getStore(Tmp1, Hi, Tmp2, ST->getSrcValue(),
- ST->getSrcValueOffset(), ST->isVolatile(),
- std::min(ST->getAlignment(), IncrementSize));
+ SVOffset, isVolatile, Alignment);
Result = DAG.getNode(ISD::TokenFactor, MVT::Other, Lo, Hi);
break;
}
@@ -1887,7 +1890,8 @@
Tmp3 = DAG.getNode(ISD::AND, Tmp3.getValueType(), Tmp3,
DAG.getConstant(1, Tmp3.getValueType()));
Result = DAG.getTruncStore(Tmp1, Tmp3, Tmp2, ST->getSrcValue(),
- ST->getSrcValueOffset(), MVT::i8);
+ SVOffset, MVT::i8,
+ isVolatile, Alignment);
} else if (Tmp1 != ST->getChain() || Tmp3 != ST->getValue() ||
Tmp2 != ST->getBasePtr()) {
Result = DAG.UpdateNodeOperands(Result, Tmp1, Tmp3, Tmp2,
@@ -3494,7 +3498,9 @@
Result = DAG.getExtLoad(ExtType, NVT,
LD->getChain(), LD->getBasePtr(),
LD->getSrcValue(), LD->getSrcValueOffset(),
- LD->getLoadedVT());
+ LD->getLoadedVT(),
+ LD->isVolatile(),
+ LD->getAlignment());
// Remember that we legalized the chain.
AddLegalizedOperand(Op.getValue(1), LegalizeOp(Result.getValue(1)));
break;
@@ -4848,10 +4854,13 @@
SDOperand Ch = LD->getChain(); // Legalize the chain.
SDOperand Ptr = LD->getBasePtr(); // Legalize the pointer.
ISD::LoadExtType ExtType = LD->getExtensionType();
- unsigned SVOffset = LD->getSrcValueOffset();
+ int SVOffset = LD->getSrcValueOffset();
+ unsigned Alignment = LD->getAlignment();
+ bool isVolatile = LD->isVolatile();
if (ExtType == ISD::NON_EXTLOAD) {
- Lo = DAG.getLoad(NVT, Ch, Ptr, LD->getSrcValue(), SVOffset);
+ Lo = DAG.getLoad(NVT, Ch, Ptr, LD->getSrcValue(), SVOffset,
+ isVolatile, Alignment);
if (VT == MVT::f32 || VT == MVT::f64) {
// f32->i32 or f64->i64 one to one expansion.
// Remember that we legalized the chain.
@@ -4867,7 +4876,10 @@
Ptr = DAG.getNode(ISD::ADD, Ptr.getValueType(), Ptr,
getIntPtrConstant(IncrementSize));
SVOffset += IncrementSize;
- Hi = DAG.getLoad(NVT, Ch, Ptr, LD->getSrcValue(), SVOffset);
+ if (Alignment > IncrementSize)
+ Alignment = IncrementSize;
+ Hi = DAG.getLoad(NVT, Ch, Ptr, LD->getSrcValue(), SVOffset,
+ isVolatile, Alignment);
// Build a factor node to remember that this load is independent of the
// other one.
@@ -4884,7 +4896,7 @@
if (VT == MVT::f64 && EVT == MVT::f32) {
// f64 = EXTLOAD f32 should expand to LOAD, FP_EXTEND
SDOperand Load = DAG.getLoad(EVT, Ch, Ptr, LD->getSrcValue(),
- SVOffset);
+ SVOffset, isVolatile, Alignment);
// Remember that we legalized the chain.
AddLegalizedOperand(SDOperand(Node, 1), LegalizeOp(Load.getValue(1)));
ExpandOp(DAG.getNode(ISD::FP_EXTEND, VT, Load), Lo, Hi);
@@ -4893,10 +4905,11 @@
if (EVT == NVT)
Lo = DAG.getLoad(NVT, Ch, Ptr, LD->getSrcValue(),
- SVOffset);
+ SVOffset, isVolatile, Alignment);
else
Lo = DAG.getExtLoad(ExtType, NVT, Ch, Ptr, LD->getSrcValue(),
- SVOffset, EVT);
+ SVOffset, EVT, isVolatile,
+ Alignment);
// Remember that we legalized the chain.
AddLegalizedOperand(SDOperand(Node, 1), LegalizeOp(Lo.getValue(1)));
From resistor at mac.com Mon Jul 9 17:27:20 2007
From: resistor at mac.com (Owen Anderson)
Date: Mon, 09 Jul 2007 22:27:20 -0000
Subject: [llvm-commits] [llvm] r38474 -
/llvm/trunk/lib/Support/SmallPtrSet.cpp
Message-ID: <200707092227.l69MRKml027603@zion.cs.uiuc.edu>
Author: resistor
Date: Mon Jul 9 17:27:20 2007
New Revision: 38474
URL: http://llvm.org/viewvc/llvm-project?rev=38474&view=rev
Log:
Make the assignment operator for SmallPtrSet much faster for normal cases.
Modified:
llvm/trunk/lib/Support/SmallPtrSet.cpp
Modified: llvm/trunk/lib/Support/SmallPtrSet.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/SmallPtrSet.cpp?rev=38474&r1=38473&r2=38474&view=diff
==============================================================================
--- llvm/trunk/lib/Support/SmallPtrSet.cpp (original)
+++ llvm/trunk/lib/Support/SmallPtrSet.cpp Mon Jul 9 17:27:20 2007
@@ -177,42 +177,27 @@
/// CopyFrom - implement operator= from a smallptrset that has the same pointer
/// type, but may have a different small size.
void SmallPtrSetImpl::CopyFrom(const SmallPtrSetImpl &RHS) {
- // Allocate space if needed or clear the current elements out of the array.
- if (CurArraySize < RHS.size()*2) {
- if (!isSmall())
- delete [] CurArray;
-
- NumElements = NumTombstones = 0;
-
- // Get a power of two larger than twice the RHS size.
- CurArraySize = 1 << Log2_32(RHS.size()*4);
-
- // Install the new array. Clear all the buckets to empty.
- CurArray = new void*[CurArraySize+1];
- memset(CurArray, -1, CurArraySize*sizeof(void*));
-
- // The end pointer, always valid, is set to a valid element to help the
- // iterator.
- CurArray[CurArraySize] = 0;
-
- } else if (!empty()) {
- clear();
- }
+ if (isSmall() && RHS.isSmall())
+ assert(CurArraySize == RHS.CurArraySize &&
+ "Cannot assign sets with different small sizes");
+ NumElements = RHS.NumElements;
+ NumTombstones = RHS.NumTombstones;
- // Now that we know we have enough space, and that the current array is empty,
- // copy over all the elements from the RHS.
- for (void **BucketPtr = RHS.CurArray, **E = RHS.CurArray+RHS.CurArraySize;
- BucketPtr != E; ++BucketPtr) {
- // Copy over the element if it is valid.
- void *Elt = *BucketPtr;
- if (Elt != getTombstoneMarker() && Elt != getEmptyMarker()) {
- if (isSmall())
- SmallArray[NumElements++] = Elt;
- else
- *const_cast(FindBucketFor(Elt)) = Elt;
- }
- }
+ // If we're not currently small, and we don't have the same heap size,
+ // free our heap allocated storage
+ if (!isSmall() && CurArraySize != RHS.CurArraySize)
+ delete [] CurArray;
- if (!isSmall())
- NumElements = RHS.NumElements;
+ // If we're becoming small, prepare to insert into our stack space
+ if (RHS.isSmall())
+ CurArray = &SmallArray[0];
+ // Otherwise, allocate new heap space (unless we were the same size)
+ else if (CurArraySize != RHS.CurArraySize)
+ CurArray = new void*[RHS.CurArraySize+1];
+
+ // Copy over the new array size
+ CurArraySize = RHS.CurArraySize;
+
+ // Copy over the contents from the other set
+ memcpy(CurArray, RHS.CurArray, sizeof(void*)*(CurArraySize+1));
}
From resistor at mac.com Mon Jul 9 17:29:51 2007
From: resistor at mac.com (Owen Anderson)
Date: Mon, 09 Jul 2007 22:29:51 -0000
Subject: [llvm-commits] [llvm] r38475 -
/llvm/trunk/lib/Transforms/Scalar/GVNPRE.cpp
Message-ID: <200707092229.l69MTpKJ027720@zion.cs.uiuc.edu>
Author: resistor
Date: Mon Jul 9 17:29:50 2007
New Revision: 38475
URL: http://llvm.org/viewvc/llvm-project?rev=38475&view=rev
Log:
Take advantage of the new fast SmallPtrSet assignment operator when propagating AVAIL_OUT sets.
This reduces the time to optimize Anton's testcase from 31.2s to 21.s!
Modified:
llvm/trunk/lib/Transforms/Scalar/GVNPRE.cpp
Modified: llvm/trunk/lib/Transforms/Scalar/GVNPRE.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/GVNPRE.cpp?rev=38475&r1=38474&r2=38475&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/GVNPRE.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/GVNPRE.cpp Mon Jul 9 17:29:50 2007
@@ -574,7 +574,8 @@
numbers.set(i);
}
- void copyNumbers(ValueNumberedSet& other) {
+ void operator=(const ValueNumberedSet& other) {
+ contents = other.contents;
numbers = other.numbers;
}
@@ -710,11 +711,10 @@
void GVNPRE::val_replace(ValueNumberedSet& s, Value* v) {
uint32_t num = VN.lookup(v);
Value* leader = find_leader(s, num);
- while (leader != 0) {
+ if (leader != 0)
s.erase(leader);
- leader = find_leader(s, num);
- }
s.insert(v);
+ s.set(num);
}
/// phi_translate - Given a value, its parent block, and a predecessor of its
@@ -1154,8 +1154,6 @@
/// elimination by walking the dominator tree and removing any instruction that
/// is dominated by another instruction with the same value number.
bool GVNPRE::elimination() {
- DOUT << "\n\nPhase 3: Elimination\n\n";
-
bool changed_function = false;
std::vector > replace;
@@ -1167,10 +1165,6 @@
E = df_end(DT.getRootNode()); DI != E; ++DI) {
BasicBlock* BB = DI->getBlock();
- //DOUT << "Block: " << BB->getName() << "\n";
- //dump(availableOut[BB]);
- //DOUT << "\n\n";
-
for (BasicBlock::iterator BI = BB->begin(), BE = BB->end();
BI != BE; ++BI) {
@@ -1354,7 +1348,6 @@
if (BB->getTerminator()->getNumSuccessors() == 1) {
if (BB->getTerminator()->getSuccessor(0) != BB &&
visited.count(BB->getTerminator()->getSuccessor(0)) == 0) {
- DOUT << "DEFER: " << BB->getName() << "\n";
return true;
}
else {
@@ -1459,12 +1452,8 @@
BasicBlock* BB = DI->getBlock();
// A block inherits AVAIL_OUT from its dominator
- if (DI->getIDom() != 0) {
- currAvail.insert(availableOut[DI->getIDom()->getBlock()].begin(),
- availableOut[DI->getIDom()->getBlock()].end());
-
- currAvail.copyNumbers(availableOut[DI->getIDom()->getBlock()]);
- }
+ if (DI->getIDom() != 0)
+ currAvail = availableOut[DI->getIDom()->getBlock()];
for (BasicBlock::iterator BI = BB->begin(), BE = BB->end();
BI != BE; ++BI)
@@ -1517,8 +1506,6 @@
iterations++;
}
-
- DOUT << "ITERATIONS: " << iterations << "\n";
}
/// insertion_pre - When a partial redundancy has been identified, eliminate it
@@ -1528,7 +1515,6 @@
std::map& avail,
std::map& new_sets) {
for (pred_iterator PI = pred_begin(BB), PE = pred_end(BB); PI != PE; ++PI) {
- DOUT << "PRED: " << (*PI)->getName() << "\n";
Value* e2 = avail[*PI];
if (!availableOut[*PI].test(VN.lookup(e2))) {
User* U = cast(e2);
From resistor at mac.com Mon Jul 9 18:39:40 2007
From: resistor at mac.com (Owen Anderson)
Date: Mon, 09 Jul 2007 23:39:40 -0000
Subject: [llvm-commits] [llvm] r38476 -
/llvm/trunk/include/llvm/ADT/BitVector.h
Message-ID: <200707092339.l69NdeBn029766@zion.cs.uiuc.edu>
Author: resistor
Date: Mon Jul 9 18:39:39 2007
New Revision: 38476
URL: http://llvm.org/viewvc/llvm-project?rev=38476&view=rev
Log:
When resizing a BitVector with size 0, be sure to clear the low word before using it.
Modified:
llvm/trunk/include/llvm/ADT/BitVector.h
Modified: llvm/trunk/include/llvm/ADT/BitVector.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/BitVector.h?rev=38476&r1=38475&r2=38476&view=diff
==============================================================================
--- llvm/trunk/include/llvm/ADT/BitVector.h (original)
+++ llvm/trunk/include/llvm/ADT/BitVector.h Mon Jul 9 18:39:39 2007
@@ -185,6 +185,11 @@
grow(N);
init_words(&Bits[OldCapacity], (Capacity-OldCapacity), t);
}
+
+ // If we previously had no size, initialize the low word
+ if (Size == 0)
+ Bits[0] = t;
+
Size = N;
clear_unused_bits();
}
From resistor at mac.com Mon Jul 9 18:57:18 2007
From: resistor at mac.com (Owen Anderson)
Date: Mon, 09 Jul 2007 23:57:18 -0000
Subject: [llvm-commits] [llvm] r38477 -
/llvm/trunk/lib/Transforms/Scalar/GVNPRE.cpp
Message-ID: <200707092357.l69NvIDW030235@zion.cs.uiuc.edu>
Author: resistor
Date: Mon Jul 9 18:57:18 2007
New Revision: 38477
URL: http://llvm.org/viewvc/llvm-project?rev=38477&view=rev
Log:
Add an assertion if find_leader fails.
Modified:
llvm/trunk/lib/Transforms/Scalar/GVNPRE.cpp
Modified: llvm/trunk/lib/Transforms/Scalar/GVNPRE.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/GVNPRE.cpp?rev=38477&r1=38476&r2=38477&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/GVNPRE.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/GVNPRE.cpp Mon Jul 9 18:57:18 2007
@@ -695,6 +695,7 @@
if (v == VN.lookup(*I))
return *I;
+ assert(0 && "No leader found, but present bit is set?");
return 0;
}
From djg at cray.com Mon Jul 9 19:05:58 2007
From: djg at cray.com (Dan Gohman)
Date: Tue, 10 Jul 2007 00:05:58 -0000
Subject: [llvm-commits] [llvm] r38478 - in /llvm/trunk/lib/Target/X86:
X86ISelLowering.cpp X86ISelLowering.h X86InstrSSE.td X86RegisterInfo.cpp
Message-ID: <200707100005.l6A05w1A030461@zion.cs.uiuc.edu>
Author: djg
Date: Mon Jul 9 19:05:58 2007
New Revision: 38478
URL: http://llvm.org/viewvc/llvm-project?rev=38478&view=rev
Log:
Define non-intrinsic instructions for vector min, max, sqrt, rsqrt, and rcp,
in addition to the intrinsic forms. Add spill-folding entries for these new
instructions, and for the scalar min and max instrinsic instructions which
were missing. And add some preliminary ISelLowering code for using the new
non-intrinsic vector sqrt instruction, and fneg and fabs.
Modified:
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
llvm/trunk/lib/Target/X86/X86ISelLowering.h
llvm/trunk/lib/Target/X86/X86InstrSSE.td
llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=38478&r1=38477&r2=38478&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Mon Jul 9 19:05:58 2007
@@ -331,6 +331,13 @@
setOperationAction(ISD::VECTOR_SHUFFLE, (MVT::ValueType)VT, Expand);
setOperationAction(ISD::EXTRACT_VECTOR_ELT, (MVT::ValueType)VT, Expand);
setOperationAction(ISD::INSERT_VECTOR_ELT, (MVT::ValueType)VT, Expand);
+ setOperationAction(ISD::FABS, (MVT::ValueType)VT, Expand);
+ setOperationAction(ISD::FSIN, (MVT::ValueType)VT, Expand);
+ setOperationAction(ISD::FCOS, (MVT::ValueType)VT, Expand);
+ setOperationAction(ISD::FREM, (MVT::ValueType)VT, Expand);
+ setOperationAction(ISD::FPOWI, (MVT::ValueType)VT, Expand);
+ setOperationAction(ISD::FSQRT, (MVT::ValueType)VT, Expand);
+ setOperationAction(ISD::FCOPYSIGN, (MVT::ValueType)VT, Expand);
}
if (Subtarget->hasMMX()) {
@@ -408,6 +415,9 @@
setOperationAction(ISD::FSUB, MVT::v4f32, Legal);
setOperationAction(ISD::FMUL, MVT::v4f32, Legal);
setOperationAction(ISD::FDIV, MVT::v4f32, Legal);
+ setOperationAction(ISD::FSQRT, MVT::v4f32, Legal);
+ setOperationAction(ISD::FNEG, MVT::v4f32, Custom);
+ setOperationAction(ISD::FABS, MVT::v4f32, Custom);
setOperationAction(ISD::LOAD, MVT::v4f32, Legal);
setOperationAction(ISD::BUILD_VECTOR, MVT::v4f32, Custom);
setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v4f32, Custom);
@@ -435,6 +445,9 @@
setOperationAction(ISD::FSUB, MVT::v2f64, Legal);
setOperationAction(ISD::FMUL, MVT::v2f64, Legal);
setOperationAction(ISD::FDIV, MVT::v2f64, Legal);
+ setOperationAction(ISD::FSQRT, MVT::v2f64, Legal);
+ setOperationAction(ISD::FNEG, MVT::v2f64, Custom);
+ setOperationAction(ISD::FABS, MVT::v2f64, Custom);
setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v16i8, Custom);
setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v8i16, Custom);
@@ -3326,16 +3339,21 @@
SDOperand X86TargetLowering::LowerFABS(SDOperand Op, SelectionDAG &DAG) {
MVT::ValueType VT = Op.getValueType();
- const Type *OpNTy = MVT::getTypeForValueType(VT);
+ MVT::ValueType EltVT = VT;
+ if (MVT::isVector(VT))
+ EltVT = MVT::getVectorElementType(VT);
+ const Type *OpNTy = MVT::getTypeForValueType(EltVT);
std::vector CV;
- if (VT == MVT::f64) {
- CV.push_back(ConstantFP::get(OpNTy, BitsToDouble(~(1ULL << 63))));
- CV.push_back(ConstantFP::get(OpNTy, 0.0));
+ if (EltVT == MVT::f64) {
+ Constant *C = ConstantFP::get(OpNTy, BitsToDouble(~(1ULL << 63)));
+ CV.push_back(C);
+ CV.push_back(C);
} else {
- CV.push_back(ConstantFP::get(OpNTy, BitsToFloat(~(1U << 31))));
- CV.push_back(ConstantFP::get(OpNTy, 0.0));
- CV.push_back(ConstantFP::get(OpNTy, 0.0));
- CV.push_back(ConstantFP::get(OpNTy, 0.0));
+ Constant *C = ConstantFP::get(OpNTy, BitsToFloat(~(1U << 31)));
+ CV.push_back(C);
+ CV.push_back(C);
+ CV.push_back(C);
+ CV.push_back(C);
}
Constant *CS = ConstantStruct::get(CV);
SDOperand CPIdx = DAG.getConstantPool(CS, getPointerTy(), 4);
@@ -3350,16 +3368,21 @@
SDOperand X86TargetLowering::LowerFNEG(SDOperand Op, SelectionDAG &DAG) {
MVT::ValueType VT = Op.getValueType();
- const Type *OpNTy = MVT::getTypeForValueType(VT);
+ MVT::ValueType EltVT = VT;
+ if (MVT::isVector(VT))
+ EltVT = MVT::getVectorElementType(VT);
+ const Type *OpNTy = MVT::getTypeForValueType(EltVT);
std::vector CV;
- if (VT == MVT::f64) {
- CV.push_back(ConstantFP::get(OpNTy, BitsToDouble(1ULL << 63)));
- CV.push_back(ConstantFP::get(OpNTy, 0.0));
+ if (EltVT == MVT::f64) {
+ Constant *C = ConstantFP::get(OpNTy, BitsToDouble(1ULL << 63));
+ CV.push_back(C);
+ CV.push_back(C);
} else {
- CV.push_back(ConstantFP::get(OpNTy, BitsToFloat(1U << 31)));
- CV.push_back(ConstantFP::get(OpNTy, 0.0));
- CV.push_back(ConstantFP::get(OpNTy, 0.0));
- CV.push_back(ConstantFP::get(OpNTy, 0.0));
+ Constant *C = ConstantFP::get(OpNTy, BitsToFloat(1U << 31));
+ CV.push_back(C);
+ CV.push_back(C);
+ CV.push_back(C);
+ CV.push_back(C);
}
Constant *CS = ConstantStruct::get(CV);
SDOperand CPIdx = DAG.getConstantPool(CS, getPointerTy(), 4);
@@ -4284,6 +4307,8 @@
case X86ISD::PINSRW: return "X86ISD::PINSRW";
case X86ISD::FMAX: return "X86ISD::FMAX";
case X86ISD::FMIN: return "X86ISD::FMIN";
+ case X86ISD::FRSQRT: return "X86ISD::FRSQRT";
+ case X86ISD::FRCP: return "X86ISD::FRCP";
case X86ISD::TLSADDR: return "X86ISD::TLSADDR";
case X86ISD::THREAD_POINTER: return "X86ISD::THREAD_POINTER";
}
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.h?rev=38478&r1=38477&r2=38478&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.h (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.h Mon Jul 9 19:05:58 2007
@@ -177,6 +177,12 @@
/// FMAX, FMIN - Floating point max and min.
///
FMAX, FMIN,
+
+ /// FRSQRT, FRCP - Floating point reciprocal-sqrt and reciprocal
+ /// approximation. Note that these typically require refinement
+ /// in order to obtain suitable precision.
+ FRSQRT, FRCP,
+
// Thread Local Storage
TLSADDR, THREAD_POINTER
};
Modified: llvm/trunk/lib/Target/X86/X86InstrSSE.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSSE.td?rev=38478&r1=38477&r2=38478&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrSSE.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrSSE.td Mon Jul 9 19:05:58 2007
@@ -31,6 +31,8 @@
[SDNPCommutative, SDNPAssociative]>;
def X86fxor : SDNode<"X86ISD::FXOR", SDTFPBinOp,
[SDNPCommutative, SDNPAssociative]>;
+def X86frsqrt : SDNode<"X86ISD::FRSQRT", SDTFPUnaryOp>;
+def X86frcp : SDNode<"X86ISD::FRCP", SDTFPUnaryOp>;
def X86fsrl : SDNode<"X86ISD::FSRL", SDTX86FPShiftOp>;
def X86comi : SDNode<"X86ISD::COMI", SDTX86CmpTest,
[SDNPHasChain, SDNPOutFlag]>;
@@ -247,16 +249,6 @@
class PSIi8 o, Format F, dag ops, string asm, list pattern>
: Ii8, TB, Requires<[HasSSE1]>;
-// Helpers for defining instructions that directly correspond to intrinsics.
-multiclass SS_IntUnary o, string OpcodeStr, Intrinsic IntId> {
- def r : SSI;
- def m : SSI;
-}
-
// Move Instructions
def MOVSSrr : SSI<0x10, MRMSrcReg, (ops FR32:$dst, FR32:$src),
"movss {$src, $dst|$dst, $src}", []>;
@@ -267,18 +259,6 @@
"movss {$src, $dst|$dst, $src}",
[(store FR32:$src, addr:$dst)]>;
-def SQRTSSr : SSI<0x51, MRMSrcReg, (ops FR32:$dst, FR32:$src),
- "sqrtss {$src, $dst|$dst, $src}",
- [(set FR32:$dst, (fsqrt FR32:$src))]>;
-def SQRTSSm : SSI<0x51, MRMSrcMem, (ops FR32:$dst, f32mem:$src),
- "sqrtss {$src, $dst|$dst, $src}",
- [(set FR32:$dst, (fsqrt (loadf32 addr:$src)))]>;
-
-// Aliases to match intrinsics which expect XMM operand(s).
-defm SQRTSS_Int : SS_IntUnary<0x51, "sqrtss" , int_x86_sse_sqrt_ss>;
-defm RSQRTSS_Int : SS_IntUnary<0x52, "rsqrtss", int_x86_sse_rsqrt_ss>;
-defm RCPSS_Int : SS_IntUnary<0x53, "rcpss" , int_x86_sse_rcp_ss>;
-
// Conversion instructions
def CVTTSS2SIrr : SSI<0x2C, MRMSrcReg, (ops GR32:$dst, FR32:$src),
"cvttss2si {$src, $dst|$dst, $src}",
@@ -425,20 +405,20 @@
"andnps {$src2, $dst|$dst, $src2}", []>;
}
-/// scalar_sse1_fp_binop_rm - Scalar SSE1 binops come in three basic forms:
-///
-/// 1. f32 - This comes in SSE1 form for floats.
-/// 2. rr vs rm - They include a reg+reg form and a reg+mem form.
-///
-/// In addition, scalar SSE ops have an intrinsic form. This form is unlike the
-/// normal form, in that they take an entire vector (instead of a scalar) and
-/// leave the top elements undefined. This adds another two variants of the
-/// above permutations, giving us 8 forms for 'instruction'.
+/// basic_sse1_fp_binop_rm - SSE1 binops come in both scalar and vector forms.
+///
+/// In addition, we also have a special variant of the scalar form here to
+/// represent the associated intrinsic operation. This form is unlike the
+/// plain scalar form, in that it takes an entire vector (instead of a scalar)
+/// and leaves the top elements undefined.
+///
+/// These three forms can each be reg+reg or reg+mem, so there are a total of
+/// six "instructions".
///
let isTwoAddress = 1 in {
-multiclass scalar_sse1_fp_binop_rm opc, string OpcodeStr,
- SDNode OpNode, Intrinsic F32Int,
- bit Commutable = 0> {
+multiclass basic_sse1_fp_binop_rm opc, string OpcodeStr,
+ SDNode OpNode, Intrinsic F32Int,
+ bit Commutable = 0> {
// Scalar operation, reg+reg.
def SSrr : SSI;
- // Vector intrinsic operation, reg+reg.
+ // Vector operation, reg+reg.
+ def PSrr : PSI {
+ let isCommutable = Commutable;
+ }
+
+ // Vector operation, reg+mem.
+ def PSrm : PSI;
+
+ // Intrinsic operation, reg+reg.
def SSrr_Int : SSI {
let isCommutable = Commutable;
}
- // Vector intrinsic operation, reg+mem.
+ // Intrinsic operation, reg+mem.
def SSrm_Int : SSI;
-defm MUL : scalar_sse1_fp_binop_rm<0x59, "mul", fmul, int_x86_sse_mul_ss, 1>;
-defm SUB : scalar_sse1_fp_binop_rm<0x5C, "sub", fsub, int_x86_sse_sub_ss>;
-defm DIV : scalar_sse1_fp_binop_rm<0x5E, "div", fdiv, int_x86_sse_div_ss>;
+defm ADD : basic_sse1_fp_binop_rm<0x58, "add", fadd, int_x86_sse_add_ss, 1>;
+defm MUL : basic_sse1_fp_binop_rm<0x59, "mul", fmul, int_x86_sse_mul_ss, 1>;
+defm SUB : basic_sse1_fp_binop_rm<0x5C, "sub", fsub, int_x86_sse_sub_ss>;
+defm DIV : basic_sse1_fp_binop_rm<0x5E, "div", fdiv, int_x86_sse_div_ss>;
-defm MAX : scalar_sse1_fp_binop_rm<0x5F, "max", X86fmax, int_x86_sse_max_ss>;
-defm MIN : scalar_sse1_fp_binop_rm<0x5D, "min", X86fmin, int_x86_sse_min_ss>;
+/// sse1_fp_binop_rm - Other SSE1 binops
+///
+/// This multiclass is like basic_sse1_fp_binop_rm, with the addition of
+/// instructions for a full-vector intrinsic form. Operations that map
+/// onto C operators don't use this form since they just use the plain
+/// vector form instead of having a separate vector intrinsic form.
+///
+/// This provides a total of eight "instructions".
+///
+let isTwoAddress = 1 in {
+multiclass sse1_fp_binop_rm opc, string OpcodeStr,
+ SDNode OpNode,
+ Intrinsic F32Int,
+ Intrinsic V4F32Int,
+ bit Commutable = 0> {
+
+ // Scalar operation, reg+reg.
+ def SSrr : SSI {
+ let isCommutable = Commutable;
+ }
+
+ // Scalar operation, reg+mem.
+ def SSrm : SSI;
+
+ // Vector operation, reg+reg.
+ def PSrr : PSI {
+ let isCommutable = Commutable;
+ }
+
+ // Vector operation, reg+mem.
+ def PSrm : PSI;
+
+ // Intrinsic operation, reg+reg.
+ def SSrr_Int : SSI {
+ let isCommutable = Commutable;
+ }
+
+ // Intrinsic operation, reg+mem.
+ def SSrm_Int : SSI;
+
+ // Vector intrinsic operation, reg+reg.
+ def PSrr_Int : PSI {
+ let isCommutable = Commutable;
+ }
+
+ // Vector intrinsic operation, reg+mem.
+ def PSrm_Int : PSI;
+}
+}
+
+defm MAX : sse1_fp_binop_rm<0x5F, "max", X86fmax,
+ int_x86_sse_max_ss, int_x86_sse_max_ps>;
+defm MIN : sse1_fp_binop_rm<0x5D, "min", X86fmin,
+ int_x86_sse_min_ss, int_x86_sse_min_ps>;
//===----------------------------------------------------------------------===//
// SSE packed FP Instructions
@@ -550,69 +611,84 @@
-/// packed_sse1_fp_binop_rm - Packed SSE binops come in three basic forms:
-/// 1. v4f32 - This comes in SSE1 form for float.
-/// 2. rr vs rm - They include a reg+reg form and a ref+mem form.
+// Arithmetic
+
+/// sse1_fp_unop_rm - SSE1 unops come in both scalar and vector forms.
///
-let isTwoAddress = 1 in {
-multiclass packed_sse1_fp_binop_rm opc, string OpcodeStr,
- SDNode OpNode, bit Commutable = 0> {
- // Packed operation, reg+reg.
- def PSrr : PSI {
+/// In addition, we also have a special variant of the scalar form here to
+/// represent the associated intrinsic operation. This form is unlike the
+/// plain scalar form, in that it takes an entire vector (instead of a
+/// scalar) and leaves the top elements undefined.
+///
+/// And, we have a special variant form for a full-vector intrinsic form.
+///
+/// These four forms can each have a reg or a mem operand, so there are a
+/// total of eight "instructions".
+///
+multiclass sse1_fp_unop_rm opc, string OpcodeStr,
+ SDNode OpNode,
+ Intrinsic F32Int,
+ Intrinsic V4F32Int,
+ bit Commutable = 0> {
+ // Scalar operation, reg.
+ def SSr : SSI {
let isCommutable = Commutable;
}
- // Packed operation, reg+mem.
- def PSrm : PSI;
-}
-}
-
-defm ADD : packed_sse1_fp_binop_rm<0x58, "add", fadd, 1>;
-defm MUL : packed_sse1_fp_binop_rm<0x59, "mul", fmul, 1>;
-defm DIV : packed_sse1_fp_binop_rm<0x5E, "div", fdiv>;
-defm SUB : packed_sse1_fp_binop_rm<0x5C, "sub", fsub>;
-
-// Arithmetic
-
-class PS_Intr o, string OpcodeStr, Intrinsic IntId>
- : PSI;
-class PS_Intm o, string OpcodeStr, Intrinsic IntId>
- : PSI;
-
-class PS_Intrr o, string OpcodeStr, Intrinsic IntId>
- : PSI;
-class PS_Intrm o, string OpcodeStr, Intrinsic IntId>
- : PSI