From evan.cheng at apple.com Mon Jul 30 00:20:40 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Sun, 29 Jul 2007 22:20:40 -0700 Subject: [llvm-commits] Patch for X86 to use subregs In-Reply-To: References: <922DEBE2-14C9-4A1C-9A3A-1C366DE18B4A@apple.com> <2C30DFBD-73FF-4CCB-BE4F-469146C7A91C@gmail.com> <9A826E2A-2B21-4FFF-A18B-E11D08B7CB93@apple.com> <1BB6419C-C448-4995-8A27-791D8D21244D@gmail.com> <30228125-8A4F-4336-8380-8525B2BF7DFB@apple.com> Message-ID: <446DD660-7847-4E8A-9715-B66AB0AC988A@apple.com> On Jul 29, 2007, at 9:37 PM, Christopher Lamb wrote: > > On Jul 29, 2007, at 6:20 PM, Evan Cheng wrote: > >> Sent from my iPhone >> >> On Jul 28, 2007, at 4:36 PM, Christopher Lamb >> wrote: >> >>> >>> On Jul 28, 2007, at 2:26 PM, Evan Cheng wrote: >>> >>>> On Jul 28, 2007, at 11:52 AM, Christopher Lamb >>>> wrote: >>>> >>>>> >>>>> On Jul 28, 2007, at 1:48 AM, Evan Cheng wrote: >>>>> >>>>>> Very cool! I need to read it more carefully. >>>>> >>>>>> But I see you are lowering zext to a single insert_subreg. Is >>>>>> that right? It won't zero out the top part, no? >>>>> >>>>> It's only lowering (zext i32 to i64) to an insert_subreg on >>>>> x86-64 where all writes to 32-bit registers implicitly zero- >>>>> extend into the upper 32-bits. >>>>> >>>> >>>> I know. But thy mismatch semantically. A insert_subreg to the >>>> lower part should not change the upper half. I think this is >>>> only legal for anyext. >>> >>> On x86-64 the semantics of a 2 operand i32 insert_subreg is that >>> the input super-value is implicitly zero. So in this sense the >>> insert isn't changing the upper half, it's just that the upper >>> half is being set to zero implicitly rather than explicitly. If >>> you'll notice the insert_subreg is a two operand (implicit super >>> value) not a three operand version. If the insert were the three >>> operand version, and the super value as coming from an implicit >>> def I'd agree with you, but it's not. >> >> Ok, let's step back for a second. There are a couple of issues >> that should be addressed. Plz help me understand. :) >> >> 1: Semantics of insert_subreg should be the same across all >> targets, right? > > I'm not certain that this should be so. x86-64 clearly has a target > specific semantics of a 32-bit into 64-bit insert. No, that won't do. insert_subreg and extract_subreg are by definition target independent. They must have the same semantics. You are forcing x86-64 32-bit zero-extending move to fit insert_subreg when they are really not the same thing. >> 2: two operant variant of insert_subreg should mean the superreg >> is undef. If you insert a value into a low part, the rest of the >> superreg is still undef. > > I think the meaning of insert_subreg instruction (both 2 and 3 > operand versions) must have semantics specific to the target. For > example, on x86-64 there is no valid 3 operand insert_subreg for a > 32-bit value into 64-bits, because the 32-bit result is always > going to be zero extended and overwrite the upper 32-bits. It just means there is no way to implement a insert_subreg with a single instruction under x86-64. But that is perfectly ok. Apart from anyext, x86-64 just isn't going to benefit from it. It's also impossible to read or modify the higher 32-bits. >> 3: why is there a two operant variant in the first place? Why not >> use undef for the superreg operant? > > To note, the two operand variant is of the MachineInstr. The DAG > form would be to represent the superregister as coming from an > undef node, but this gets isel'd to the two operand MachineInstr of > insert_subreg. > > The reason is that undef is typically selected to an implicit def > of a register. This causes an unnecessary move to be generated > later on. This move can be optimized away later with more > difficulty during subreg lowering by checking whether the input > register is defined by an implicit def pseudo instruction, but > instead I decided to perform the optimization during ISel on the > DAG form during instruction selection. > > With what you're suggesting > reg1024 = ... > reg1026 = insert_subreg undef, reg1024, 1 > reg1027 = insert_subreg reg1026, reg1025, 1 > use reg1027 > > would be isel'd to then subreg lowered to: > > R6 = ... > implicit def R01 <= this implicit def is unecessary That's a pseudo instruction, it doesn't cost anything. > R23 = R01 <= this copy is unnecessary It can be coalesced to: R23 = undef > R2 = R6 > R45 = R23 > R5 = R6 > use R45 Using undef explicit is the right way to go. There is a good reason it's there. Having the two operand version of insert_subreg that implicitly use an undef value doesn't fit into the overall llvm philosophy. >> 4: what's the benefit of isel a zext to insert_subreg and then >> xform it to a 32-bit move? > > The xform to a 32-bit move is only the conservative behavior. The > zext can be implicit if regalloc can coalesce subreg_inserts. > >> Why not just isel the zext to the move? It's not legal to coalesce >> it away anyway. > > Actually it is legal to coalesce it. On x86-64 any write to a 32- > bit register zero extends the value to 64-bits. For the > insert_subreg under discussion the inserted value is a 32-bit > result, that has in-fact already be zero extended implicitly. It's not legal to coalesce away the 32-bit zero extending move. Suppose RAX contains some value with top 32-bits non-zero. mov EAX, EAX (zero extend top bits) use RAX (expecting top bits to be zero) Coalesced away the move is a miscompilation. Evan >>> >>> Also the current behavior is to use a 32-bit mov instruction for >>> both zeroext and for anyext, I don't see how this is any different. >>> >>>>> -- >>>>> Chris >>>>> >>>>>> Sent from my iPhone >>>>>> >>>>>> On Jul 28, 2007, at 12:17 AM, Christopher Lamb >>>>>> wrote: >>>>>> >>>>>>> This patch changes the X86 back end to use the new subreg >>>>>>> operations for appropriate truncate and extend operations. >>>>>>> This should allow regression testing of the subreg feature >>>>>>> going forward, as it's now used in a public target. >>>>>>> >>>>>>> The patch passed DejaGnu and all of SingleSource on my x86 >>>>>>> machine, but there are changes for x86-64 as well which I >>>>>>> haven't been able to test. Output assembly for x86-64 appears >>>>>>> sane, but I'd appreciate someone giving the patch a try on >>>>>>> their x86-64 system. Other 32-bit x86 testing is also >>>>>>> appreciated. >>>>>>> >>>>>>> Thanks >>>>>>> -- >>>>>>> Christopher Lamb >>>>>>> >>>>>>> >>>>>>> >>>>>>> >>>>>>> _______________________________________________ >>>>>>> llvm-commits mailing list >>>>>>> llvm-commits at cs.uiuc.edu >>>>>>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits >>>>>> _______________________________________________ >>>>>> llvm-commits mailing list >>>>>> llvm-commits at cs.uiuc.edu >>>>>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits >>>>> >>>>> -- >>>>> Christopher Lamb >>>>> >>>>> >>>>> >>>>> _______________________________________________ >>>>> llvm-commits mailing list >>>>> llvm-commits at cs.uiuc.edu >>>>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits >>>> _______________________________________________ >>>> llvm-commits mailing list >>>> llvm-commits at cs.uiuc.edu >>>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits >>> >>> -- >>> Christopher Lamb >>> >>> >>> >>> _______________________________________________ >>> llvm-commits mailing list >>> llvm-commits at cs.uiuc.edu >>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits >> _______________________________________________ >> llvm-commits mailing list >> llvm-commits at cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > -- > Christopher Lamb > > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20070729/73920381/attachment.html From christopher.lamb at gmail.com Mon Jul 30 02:02:43 2007 From: christopher.lamb at gmail.com (Christopher Lamb) Date: Mon, 30 Jul 2007 00:02:43 -0700 Subject: [llvm-commits] Patch for X86 to use subregs In-Reply-To: <446DD660-7847-4E8A-9715-B66AB0AC988A@apple.com> References: <922DEBE2-14C9-4A1C-9A3A-1C366DE18B4A@apple.com> <2C30DFBD-73FF-4CCB-BE4F-469146C7A91C@gmail.com> <9A826E2A-2B21-4FFF-A18B-E11D08B7CB93@apple.com> <1BB6419C-C448-4995-8A27-791D8D21244D@gmail.com> <30228125-8A4F-4336-8380-8525B2BF7DFB@apple.com> <446DD660-7847-4E8A-9715-B66AB0AC988A@apple.com> Message-ID: <537BFA91-0E35-43FF-A45C-D0C9B543A102@gmail.com> On Jul 29, 2007, at 10:20 PM, Evan Cheng wrote: > > On Jul 29, 2007, at 9:37 PM, Christopher Lamb wrote: > >> >> On Jul 29, 2007, at 6:20 PM, Evan Cheng wrote: >> >>> Sent from my iPhone >>> >>> On Jul 28, 2007, at 4:36 PM, Christopher Lamb >>> wrote: >>> >>>> >>>> On Jul 28, 2007, at 2:26 PM, Evan Cheng wrote: >>>> >>>>> On Jul 28, 2007, at 11:52 AM, Christopher Lamb >>>>> wrote: >>>>> >>>>>> >>>>>> On Jul 28, 2007, at 1:48 AM, Evan Cheng wrote: >>>>>> >>>>>>> Very cool! I need to read it more carefully. >>>>>> >>>>>>> But I see you are lowering zext to a single insert_subreg. Is >>>>>>> that right? It won't zero out the top part, no? >>>>>> >>>>>> It's only lowering (zext i32 to i64) to an insert_subreg on >>>>>> x86-64 where all writes to 32-bit registers implicitly zero- >>>>>> extend into the upper 32-bits. >>>>>> >>>>> >>>>> I know. But thy mismatch semantically. A insert_subreg to the >>>>> lower part should not change the upper half. I think this is >>>>> only legal for anyext. >>>> >>>> On x86-64 the semantics of a 2 operand i32 insert_subreg is that >>>> the input super-value is implicitly zero. So in this sense the >>>> insert isn't changing the upper half, it's just that the upper >>>> half is being set to zero implicitly rather than explicitly. If >>>> you'll notice the insert_subreg is a two operand (implicit super >>>> value) not a three operand version. If the insert were the three >>>> operand version, and the super value as coming from an implicit >>>> def I'd agree with you, but it's not. >>> >>> Ok, let's step back for a second. There are a couple of issues >>> that should be addressed. Plz help me understand. :) >>> >>> 1: Semantics of insert_subreg should be the same across all >>> targets, right? >> >> I'm not certain that this should be so. x86-64 clearly has a >> target specific semantics of a 32-bit into 64-bit insert. > > No, that won't do. insert_subreg and extract_subreg are by > definition target independent. They must have the same semantics. > You are forcing x86-64 32-bit zero-extending move to fit > insert_subreg when they are really not the same thing. If target independence is a requirement, then I agree that using insert_subreg for x86-64 zero-ext isn't currently feasible. >>> 2: two operant variant of insert_subreg should mean the superreg >>> is undef. If you insert a value into a low part, the rest of the >>> superreg is still undef. >> >> I think the meaning of insert_subreg instruction (both 2 and 3 >> operand versions) must have semantics specific to the target. For >> example, on x86-64 there is no valid 3 operand insert_subreg for a >> 32-bit value into 64-bits, because the 32-bit result is always >> going to be zero extended and overwrite the upper 32-bits. > > It just means there is no way to implement a insert_subreg with a > single instruction under x86-64. But that is perfectly ok. Apart > from anyext, x86-64 just isn't going to benefit from it. It's also > impossible to read or modify the higher 32-bits. Currently the move that's generated isn't handled by coalescing because the source and destination belong to different register classes. The insert_subreg is meant to be a means to move values implicitly between register classes that have a subreg relationship. So if insert_subreg semantics must be target independent, then I think you isel the zero-extending move to be: (i64 (INSERT_SUBREG (i64 0), GR32:$src, 3)) The thing is that the general coalescing will be able to determine that the copy from undef is unneeded for (INSERT_SUBREG (i64 undef), GR32:$src, 3), but it would take a target specific hook to know that the constant zero is unneeded on x86-64. A target specific hook for this might be useful, but I think that this is in the realm of future work now. >>> 3: why is there a two operant variant in the first place? Why not >>> use undef for the superreg operant? >> >> To note, the two operand variant is of the MachineInstr. The DAG >> form would be to represent the superregister as coming from an >> undef node, but this gets isel'd to the two operand MachineInstr >> of insert_subreg. >> >> The reason is that undef is typically selected to an implicit def >> of a register. This causes an unnecessary move to be generated >> later on. This move can be optimized away later with more >> difficulty during subreg lowering by checking whether the input >> register is defined by an implicit def pseudo instruction, but >> instead I decided to perform the optimization during ISel on the >> DAG form during instruction selection. >> >> With what you're suggesting >> reg1024 = ... >> reg1026 = insert_subreg undef, reg1024, 1 >> reg1027 = insert_subreg reg1026, reg1025, 1 >> use reg1027 >> >> would be isel'd to then subreg lowered to: >> >> R6 = ... >> implicit def R01 <= this implicit def is unecessary > > That's a pseudo instruction, it doesn't cost anything. > >> R23 = R01 <= this copy is unnecessary > > It can be coalesced to: > R23 = undef > >> R2 = R6 >> R45 = R23 >> R5 = R6 >> use R45 > > Using undef explicit is the right way to go. There is a good reason > it's there. Having the two operand version of insert_subreg that > implicitly use an undef value doesn't fit into the overall llvm > philosophy. Right now the coalescing that you are describing is happening during isel. Are you simply saying that you'd rather have the coalescing happen during subreg lowering? I can accept that, but would you share your reasons? >>> 4: what's the benefit of isel a zext to insert_subreg and then >>> xform it to a 32-bit move? >> >> The xform to a 32-bit move is only the conservative behavior. The >> zext can be implicit if regalloc can coalesce subreg_inserts. >> >>> Why not just isel the zext to the move? It's not legal to >>> coalesce it away anyway. >> >> Actually it is legal to coalesce it. On x86-64 any write to a 32- >> bit register zero extends the value to 64-bits. For the >> insert_subreg under discussion the inserted value is a 32-bit >> result, that has in-fact already be zero extended implicitly. > > It's not legal to coalesce away the 32-bit zero extending move. > > Suppose RAX contains some value with top 32-bits non-zero. > mov EAX, EAX (zero extend top bits) > use RAX (expecting top bits to be zero) > > Coalesced away the move is a miscompilation. Indeed, but what you have described is not a valid insert_subreg either. Insert_subreg would take EAX as its input operand and would only be coalesced into an instruction that defines EAX explicitly (i.e. an instruction that defines RAX defines EAX implicitly, not explicitly so no coalescing). I think that this coalescing rule is generally required for correctness when coalescing insert_subreg under any architecture. >>>> >>>> Also the current behavior is to use a 32-bit mov instruction for >>>> both zeroext and for anyext, I don't see how this is any different. >>>> >>>>>>> On Jul 28, 2007, at 12:17 AM, Christopher Lamb >>>>>>> wrote: >>>>>>> >>>>>>>> This patch changes the X86 back end to use the new subreg >>>>>>>> operations for appropriate truncate and extend operations. >>>>>>>> This should allow regression testing of the subreg feature >>>>>>>> going forward, as it's now used in a public target. >>>>>>>> >>>>>>>> The patch passed DejaGnu and all of SingleSource on my x86 >>>>>>>> machine, but there are changes for x86-64 as well which I >>>>>>>> haven't been able to test. Output assembly for x86-64 >>>>>>>> appears sane, but I'd appreciate someone giving the patch a >>>>>>>> try on their x86-64 system. Other 32-bit x86 testing is also >>>>>>>> appreciated. >>>>>>>> >>>>>>>> Thanks >>>>>>>> -- >>>>>>>> Christopher Lamb >>>>>>>> >>>>>>>> >>>>>>>> >>>>>>>> >>>>>>>> _______________________________________________ >>>>>>>> llvm-commits mailing list >>>>>>>> llvm-commits at cs.uiuc.edu >>>>>>>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits >>>>>>> _______________________________________________ >>>>>>> llvm-commits mailing list >>>>>>> llvm-commits at cs.uiuc.edu >>>>>>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits >>>>>> >>>>>> -- >>>>>> Christopher Lamb >>>>>> >>>>>> >>>>>> >>>>>> _______________________________________________ >>>>>> llvm-commits mailing list >>>>>> llvm-commits at cs.uiuc.edu >>>>>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits >>>>> _______________________________________________ >>>>> llvm-commits mailing list >>>>> llvm-commits at cs.uiuc.edu >>>>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits >>>> >>>> -- >>>> Christopher Lamb >>>> >>>> >>>> >>>> _______________________________________________ >>>> llvm-commits mailing list >>>> llvm-commits at cs.uiuc.edu >>>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits >>> _______________________________________________ >>> llvm-commits mailing list >>> llvm-commits at cs.uiuc.edu >>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits >> >> -- >> Christopher Lamb >> >> >> >> _______________________________________________ >> llvm-commits mailing list >> llvm-commits at cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits -- Christopher Lamb -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20070730/480216b9/attachment.html From evan.cheng at apple.com Mon Jul 30 02:51:24 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 30 Jul 2007 07:51:24 -0000 Subject: [llvm-commits] [llvm] r40586 - in /llvm/trunk/lib/Target/PowerPC: PPCISelLowering.cpp PPCISelLowering.h PPCInstrAltivec.td Message-ID: <200707300751.l6U7pOUG013710@zion.cs.uiuc.edu> Author: evancheng Date: Mon Jul 30 02:51:22 2007 New Revision: 40586 URL: http://llvm.org/viewvc/llvm-project?rev=40586&view=rev Log: Vector fneg must be expanded into fsub -0.0, X. Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp llvm/trunk/lib/Target/PowerPC/PPCISelLowering.h llvm/trunk/lib/Target/PowerPC/PPCInstrAltivec.td Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp?rev=40586&r1=40585&r2=40586&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Mon Jul 30 02:51:22 2007 @@ -259,6 +259,7 @@ setOperationAction(ISD::UDIV, (MVT::ValueType)VT, Expand); setOperationAction(ISD::UREM, (MVT::ValueType)VT, Expand); setOperationAction(ISD::FDIV, (MVT::ValueType)VT, Expand); + setOperationAction(ISD::FNEG, (MVT::ValueType)VT, Expand); setOperationAction(ISD::EXTRACT_VECTOR_ELT, (MVT::ValueType)VT, Expand); setOperationAction(ISD::INSERT_VECTOR_ELT, (MVT::ValueType)VT, Expand); setOperationAction(ISD::BUILD_VECTOR, (MVT::ValueType)VT, Expand); @@ -523,6 +524,16 @@ return true; } +/// isAllNegativeZeroVector - Returns true if all elements of build_vector +/// are -0.0. +bool PPC::isAllNegativeZeroVector(SDNode *N) { + assert(N->getOpcode() == ISD::BUILD_VECTOR); + if (PPC::isSplatShuffleMask(N, N->getNumOperands())) + if (ConstantFPSDNode *CFP = dyn_cast(N)) + return CFP->isExactlyValue(-0.0); + return false; +} + /// getVSPLTImmediate - Return the appropriate VSPLT* immediate to splat the /// specified isSplatShuffleMask VECTOR_SHUFFLE mask. unsigned PPC::getVSPLTImmediate(SDNode *N, unsigned EltSize) { Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.h?rev=40586&r1=40585&r2=40586&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.h (original) +++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.h Mon Jul 30 02:51:22 2007 @@ -160,6 +160,10 @@ /// VSPLTB/VSPLTH/VSPLTW. bool isSplatShuffleMask(SDNode *N, unsigned EltSize); + /// isAllNegativeZeroVector - Returns true if all elements of build_vector + /// are -0.0. + bool isAllNegativeZeroVector(SDNode *N); + /// getVSPLTImmediate - Return the appropriate VSPLT* immediate to splat the /// specified isSplatShuffleMask VECTOR_SHUFFLE mask. unsigned getVSPLTImmediate(SDNode *N, unsigned EltSize); Modified: llvm/trunk/lib/Target/PowerPC/PPCInstrAltivec.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstrAltivec.td?rev=40586&r1=40585&r2=40586&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCInstrAltivec.td (original) +++ llvm/trunk/lib/Target/PowerPC/PPCInstrAltivec.td Mon Jul 30 02:51:22 2007 @@ -70,7 +70,6 @@ return PPC::isVMRGHShuffleMask(N, 4, true); }]>; - def VSLDOI_get_imm : SDNodeXForm; @@ -133,6 +132,10 @@ return PPC::get_VSPLTI_elt(N, 4, *CurDAG).Val != 0; }], VSPLTISW_get_imm>; +def V_immneg0 : PatLeaf<(build_vector), [{ + return PPC::isAllNegativeZeroVector(N); +}]>; + //===----------------------------------------------------------------------===// // Helpers for defining instructions that directly correspond to intrinsics. @@ -228,7 +231,8 @@ Requires<[FPContractions]>; def VNMSUBFP: VAForm_1<47, (outs VRRC:$vD), (ins VRRC:$vA, VRRC:$vC, VRRC:$vB), "vnmsubfp $vD, $vA, $vC, $vB", VecFP, - [(set VRRC:$vD, (fneg (fsub (fmul VRRC:$vA, VRRC:$vC), + [(set VRRC:$vD, (fsub V_immneg0, + (fsub (fmul VRRC:$vA, VRRC:$vC), VRRC:$vB)))]>, Requires<[FPContractions]>; From evan.cheng at apple.com Mon Jul 30 02:52:03 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 30 Jul 2007 07:52:03 -0000 Subject: [llvm-commits] [llvm] r40587 - /llvm/trunk/test/CodeGen/PowerPC/vec_fneg.ll Message-ID: <200707300752.l6U7q3Ol013737@zion.cs.uiuc.edu> Author: evancheng Date: Mon Jul 30 02:52:03 2007 New Revision: 40587 URL: http://llvm.org/viewvc/llvm-project?rev=40587&view=rev Log: New test case. Added: llvm/trunk/test/CodeGen/PowerPC/vec_fneg.ll Added: llvm/trunk/test/CodeGen/PowerPC/vec_fneg.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/vec_fneg.ll?rev=40587&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/PowerPC/vec_fneg.ll (added) +++ llvm/trunk/test/CodeGen/PowerPC/vec_fneg.ll Mon Jul 30 02:52:03 2007 @@ -0,0 +1,8 @@ +; RUN: llvm-as < %s | llc -march=ppc32 -mcpu=g5 | grep vsubfp + +define void @t(<4 x float>* %A) { + %tmp2 = load <4 x float>* %A + %tmp3 = sub <4 x float> < float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00 >, %tmp2 + store <4 x float> %tmp3, <4 x float>* %A + ret void +} From asl at math.spbu.ru Mon Jul 30 03:03:41 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Mon, 30 Jul 2007 12:03:41 +0400 Subject: [llvm-commits] [llvm-gcc-4.0] r40582 - /llvm-gcc-4.0/trunk/gcc/llvm-types.cpp In-Reply-To: <200707292325.l6TNPraG028132.SS1173SS@zion.cs.uiuc.edu> References: <200707292325.l6TNPraG028132.SS1173SS@zion.cs.uiuc.edu> Message-ID: <1185782621.9492.14.camel@asl.dorms.spbu.ru> Hello, Christopher. > URL: http://llvm.org/viewvc/llvm-project?rev=40582&view=rev > Log: > Add support to emit noalias attribute on function parameters when the __restrict qualifier is used. Please, don't forget, that we have two llvm-gcc versions now. -- With best regards, Anton Korobeynikov. Faculty of Mathematics & Mechanics, Saint Petersburg State University. From djg at cray.com Mon Jul 30 09:51:14 2007 From: djg at cray.com (Dan Gohman) Date: Mon, 30 Jul 2007 14:51:14 -0000 Subject: [llvm-commits] [llvm] r40588 - in /llvm/trunk: include/llvm/PassManager.h include/llvm/PassManagers.h lib/VMCore/PassManager.cpp Message-ID: <200707301451.l6UEpEoK032545@zion.cs.uiuc.edu> Author: djg Date: Mon Jul 30 09:51:13 2007 New Revision: 40588 URL: http://llvm.org/viewvc/llvm-project?rev=40588&view=rev Log: Fix pastos in comments for doFinalization functions. Modified: llvm/trunk/include/llvm/PassManager.h llvm/trunk/include/llvm/PassManagers.h llvm/trunk/lib/VMCore/PassManager.cpp Modified: llvm/trunk/include/llvm/PassManager.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/PassManager.h?rev=40588&r1=40587&r2=40588&view=diff ============================================================================== --- llvm/trunk/include/llvm/PassManager.h (original) +++ llvm/trunk/include/llvm/PassManager.h Mon Jul 30 09:51:13 2007 @@ -79,7 +79,7 @@ /// bool doInitialization(); - /// doFinalization - Run all of the initializers for the function passes. + /// doFinalization - Run all of the finalizers for the function passes. /// bool doFinalization(); private: Modified: llvm/trunk/include/llvm/PassManagers.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/PassManagers.h?rev=40588&r1=40587&r2=40588&view=diff ============================================================================== --- llvm/trunk/include/llvm/PassManagers.h (original) +++ llvm/trunk/include/llvm/PassManagers.h Mon Jul 30 09:51:13 2007 @@ -349,7 +349,7 @@ /// bool doInitialization(Module &M); - /// doFinalization - Run all of the initializers for the function passes. + /// doFinalization - Run all of the finalizers for the function passes. /// bool doFinalization(Module &M); Modified: llvm/trunk/lib/VMCore/PassManager.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/PassManager.cpp?rev=40588&r1=40587&r2=40588&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/PassManager.cpp (original) +++ llvm/trunk/lib/VMCore/PassManager.cpp Mon Jul 30 09:51:13 2007 @@ -140,7 +140,7 @@ /// bool doInitialization(Module &M); - /// doFinalization - Run all of the initializers for the function passes. + /// doFinalization - Run all of the finalizers for the function passes. /// bool doFinalization(Module &M); @@ -1078,7 +1078,7 @@ return FPM->doInitialization(*MP->getModule()); } -/// doFinalization - Run all of the initializers for the function passes. +/// doFinalization - Run all of the finalizers for the function passes. /// bool FunctionPassManager::doFinalization() { return FPM->doFinalization(*MP->getModule()); From djg at cray.com Mon Jul 30 09:51:59 2007 From: djg at cray.com (Dan Gohman) Date: Mon, 30 Jul 2007 14:51:59 -0000 Subject: [llvm-commits] [llvm] r40589 - in /llvm/trunk: include/llvm/Target/TargetData.h lib/ExecutionEngine/Interpreter/Interpreter.h lib/Target/ARM/ARMFrameInfo.h utils/TableGen/CallingConvEmitter.h Message-ID: <200707301451.l6UEpxDR032576@zion.cs.uiuc.edu> Author: djg Date: Mon Jul 30 09:51:59 2007 New Revision: 40589 URL: http://llvm.org/viewvc/llvm-project?rev=40589&view=rev Log: More explicit keywords. Modified: llvm/trunk/include/llvm/Target/TargetData.h llvm/trunk/lib/ExecutionEngine/Interpreter/Interpreter.h llvm/trunk/lib/Target/ARM/ARMFrameInfo.h llvm/trunk/utils/TableGen/CallingConvEmitter.h Modified: llvm/trunk/include/llvm/Target/TargetData.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetData.h?rev=40589&r1=40588&r2=40589&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/TargetData.h (original) +++ llvm/trunk/include/llvm/Target/TargetData.h Mon Jul 30 09:51:59 2007 @@ -115,13 +115,13 @@ } /// Constructs a TargetData from a specification string. See init(). - TargetData(const std::string &TargetDescription) + explicit TargetData(const std::string &TargetDescription) : ImmutablePass((intptr_t)&ID) { init(TargetDescription); } /// Initialize target data from properties stored in the module. - TargetData(const Module *M); + explicit TargetData(const Module *M); TargetData(const TargetData &TD) : ImmutablePass((intptr_t)&ID), Modified: llvm/trunk/lib/ExecutionEngine/Interpreter/Interpreter.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/Interpreter/Interpreter.h?rev=40589&r1=40588&r2=40589&view=diff ============================================================================== --- llvm/trunk/lib/ExecutionEngine/Interpreter/Interpreter.h (original) +++ llvm/trunk/lib/ExecutionEngine/Interpreter/Interpreter.h Mon Jul 30 09:51:59 2007 @@ -94,7 +94,7 @@ std::vector AtExitHandlers; public: - Interpreter(Module *M); + explicit Interpreter(Module *M); ~Interpreter(); /// runAtExitHandlers - Run any functions registered by the program's calls to Modified: llvm/trunk/lib/Target/ARM/ARMFrameInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMFrameInfo.h?rev=40589&r1=40588&r2=40589&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMFrameInfo.h (original) +++ llvm/trunk/lib/Target/ARM/ARMFrameInfo.h Mon Jul 30 09:51:59 2007 @@ -23,7 +23,7 @@ class ARMFrameInfo : public TargetFrameInfo { public: - ARMFrameInfo(const ARMSubtarget &ST) + explicit ARMFrameInfo(const ARMSubtarget &ST) : TargetFrameInfo(StackGrowsDown, ST.getStackAlignment(), 0) { } }; Modified: llvm/trunk/utils/TableGen/CallingConvEmitter.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CallingConvEmitter.h?rev=40589&r1=40588&r2=40589&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/CallingConvEmitter.h (original) +++ llvm/trunk/utils/TableGen/CallingConvEmitter.h Mon Jul 30 09:51:59 2007 @@ -24,7 +24,7 @@ class CallingConvEmitter : public TableGenBackend { RecordKeeper &Records; public: - CallingConvEmitter(RecordKeeper &R) : Records(R) {} + explicit CallingConvEmitter(RecordKeeper &R) : Records(R) {} // run - Output the asmwriter, returning true on failure. void run(std::ostream &o); From djg at cray.com Mon Jul 30 09:58:59 2007 From: djg at cray.com (Dan Gohman) Date: Mon, 30 Jul 2007 14:58:59 -0000 Subject: [llvm-commits] [llvm] r40590 - in /llvm/trunk: include/llvm/Target/TargetMachineRegistry.h lib/Target/TargetMachineRegistry.cpp Message-ID: <200707301458.l6UEwxGL000309@zion.cs.uiuc.edu> Author: djg Date: Mon Jul 30 09:58:59 2007 New Revision: 40590 URL: http://llvm.org/viewvc/llvm-project?rev=40590&view=rev Log: Fix the comment for getClosestTargetForJIT to reflect the fact that it does not have a Module parameter. Modified: llvm/trunk/include/llvm/Target/TargetMachineRegistry.h llvm/trunk/lib/Target/TargetMachineRegistry.cpp Modified: llvm/trunk/include/llvm/Target/TargetMachineRegistry.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetMachineRegistry.h?rev=40590&r1=40589&r2=40590&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/TargetMachineRegistry.h (original) +++ llvm/trunk/include/llvm/Target/TargetMachineRegistry.h Mon Jul 30 09:58:59 2007 @@ -36,10 +36,9 @@ static const Entry *getClosestStaticTargetForModule(const Module &M, std::string &Error); - /// getClosestTargetForJIT - Given an LLVM module, pick the best target that - /// is compatible with the current host and the specified module. If no - /// close target can be found, this returns null and sets the Error string - /// to a reason. + /// getClosestTargetForJIT - Pick the best target that is compatible with + /// the current host. If no close target can be found, this returns null + /// and sets the Error string to a reason. static const Entry *getClosestTargetForJIT(std::string &Error); Modified: llvm/trunk/lib/Target/TargetMachineRegistry.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/TargetMachineRegistry.cpp?rev=40590&r1=40589&r2=40590&view=diff ============================================================================== --- llvm/trunk/lib/Target/TargetMachineRegistry.cpp (original) +++ llvm/trunk/lib/Target/TargetMachineRegistry.cpp Mon Jul 30 09:58:59 2007 @@ -75,10 +75,9 @@ return UsableTargets.back().second; } -/// getClosestTargetForJIT - Given an LLVM module, pick the best target that -/// is compatible with the current host and the specified module. If no -/// close target can be found, this returns null and sets the Error string -/// to a reason. +/// getClosestTargetForJIT - Pick the best target that is compatible with +/// the current host. If no close target can be found, this returns null +/// and sets the Error string to a reason. const TargetMachineRegistry::Entry * TargetMachineRegistry::getClosestTargetForJIT(std::string &Error) { std::vector > UsableTargets; From djg at cray.com Mon Jul 30 10:01:10 2007 From: djg at cray.com (Dan Gohman) Date: Mon, 30 Jul 2007 15:01:10 -0000 Subject: [llvm-commits] [llvm] r40591 - /llvm/trunk/tools/opt/opt.cpp Message-ID: <200707301501.l6UF1A7Y000384@zion.cs.uiuc.edu> Author: djg Date: Mon Jul 30 10:01:09 2007 New Revision: 40591 URL: http://llvm.org/viewvc/llvm-project?rev=40591&view=rev Log: Remove a FIXME comment that wasn't removed when the code it accompanied was removed. Modified: llvm/trunk/tools/opt/opt.cpp Modified: llvm/trunk/tools/opt/opt.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/opt/opt.cpp?rev=40591&r1=40590&r2=40591&view=diff ============================================================================== --- llvm/trunk/tools/opt/opt.cpp (original) +++ llvm/trunk/tools/opt/opt.cpp Mon Jul 30 10:01:09 2007 @@ -267,7 +267,6 @@ addPass(PM, createTailDuplicationPass()); // Simplify cfg by copying code addPass(PM, createInstructionCombiningPass()); // Cleanup for scalarrepl. addPass(PM, createCFGSimplificationPass()); // Merge & remove BBs - // FIXME: Temporary! addPass(PM, createScalarReplAggregatesPass()); // Break up aggregate allocas addPass(PM, createInstructionCombiningPass()); // Combine silly seq's addPass(PM, createCondPropagationPass()); // Propagate conditionals From djg at cray.com Mon Jul 30 10:04:59 2007 From: djg at cray.com (Dan Gohman) Date: Mon, 30 Jul 2007 15:04:59 -0000 Subject: [llvm-commits] [llvm] r40592 - /llvm/trunk/include/llvm/Target/TargetMachine.h Message-ID: <200707301504.l6UF4xv2000505@zion.cs.uiuc.edu> Author: djg Date: Mon Jul 30 10:04:59 2007 New Revision: 40592 URL: http://llvm.org/viewvc/llvm-project?rev=40592&view=rev Log: Fix the comments for the 'fast' parameter in addPassesToEmitFile. Modified: llvm/trunk/include/llvm/Target/TargetMachine.h Modified: llvm/trunk/include/llvm/Target/TargetMachine.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetMachine.h?rev=40592&r1=40591&r2=40592&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/TargetMachine.h (original) +++ llvm/trunk/include/llvm/Target/TargetMachine.h Mon Jul 30 10:04:59 2007 @@ -192,8 +192,9 @@ /// addPassesToEmitFile - Add passes to the specified pass manager to get the /// specified file emitted. Typically this will involve several steps of code /// generation. If Fast is set to true, the code generator should emit code - /// as fast as possible, without regard for compile time. This method should - /// return FileModel::Error if emission of this file type is not supported. + /// as fast as possible, though the generated code may be less efficient. + /// This method should return FileModel::Error if emission of this file type + /// is not supported. /// virtual FileModel::Model addPassesToEmitFile(FunctionPassManager &PM, std::ostream &Out, @@ -243,8 +244,9 @@ /// addPassesToEmitFile - Add passes to the specified pass manager to get the /// specified file emitted. Typically this will involve several steps of code /// generation. If Fast is set to true, the code generator should emit code - /// as fast as possible, without regard for compile time. This method should - /// return FileModel::Error if emission of this file type is not supported. + /// as fast as possible, though the generated code may be less efficient. + /// This method should return FileModel::Error if emission of this file type + /// is not supported. /// /// The default implementation of this method adds components from the /// LLVM retargetable code generator, invoking the methods below to get From djg at cray.com Mon Jul 30 10:06:26 2007 From: djg at cray.com (Dan Gohman) Date: Mon, 30 Jul 2007 15:06:26 -0000 Subject: [llvm-commits] [llvm] r40593 - /llvm/trunk/lib/CodeGen/AsmPrinter.cpp Message-ID: <200707301506.l6UF6QXo000546@zion.cs.uiuc.edu> Author: djg Date: Mon Jul 30 10:06:25 2007 New Revision: 40593 URL: http://llvm.org/viewvc/llvm-project?rev=40593&view=rev Log: Print a space between the comment character and the basic block name, for prettiness. Modified: llvm/trunk/lib/CodeGen/AsmPrinter.cpp Modified: llvm/trunk/lib/CodeGen/AsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter.cpp?rev=40593&r1=40592&r2=40593&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/AsmPrinter.cpp (original) +++ llvm/trunk/lib/CodeGen/AsmPrinter.cpp Mon Jul 30 10:06:25 2007 @@ -1144,7 +1144,8 @@ if (printColon) O << ':'; if (printComment && MBB->getBasicBlock()) - O << '\t' << TAI->getCommentString() << MBB->getBasicBlock()->getName(); + O << '\t' << TAI->getCommentString() << ' ' + << MBB->getBasicBlock()->getName(); } /// printSetLabel - This method prints a set label for the specified From djg at cray.com Mon Jul 30 10:08:02 2007 From: djg at cray.com (Dan Gohman) Date: Mon, 30 Jul 2007 15:08:02 -0000 Subject: [llvm-commits] [llvm] r40594 - in /llvm/trunk/lib/Target/X86: X86ATTAsmPrinter.cpp X86AsmPrinter.cpp Message-ID: <200707301508.l6UF82Im000600@zion.cs.uiuc.edu> Author: djg Date: Mon Jul 30 10:08:02 2007 New Revision: 40594 URL: http://llvm.org/viewvc/llvm-project?rev=40594&view=rev Log: Use tabs more consistently in assembler pseudo-ops. Modified: llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp llvm/trunk/lib/Target/X86/X86AsmPrinter.cpp Modified: llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp?rev=40594&r1=40593&r2=40594&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp Mon Jul 30 10:08:02 2007 @@ -129,7 +129,7 @@ O << "\t.linkonce discard\n"; } else { EmitAlignment(4, F); // FIXME: This should be parameterized somewhere. - O << "\t.weak " << CurrentFnName << "\n"; + O << "\t.weak\t" << CurrentFnName << "\n"; } break; } @@ -142,7 +142,7 @@ } if (Subtarget->isTargetELF()) - O << "\t.type " << CurrentFnName << ", at function\n"; + O << "\t.type\t" << CurrentFnName << ", at function\n"; else if (Subtarget->isTargetCygMing()) { O << "\t.def\t " << CurrentFnName << ";\t.scl\t" << Modified: llvm/trunk/lib/Target/X86/X86AsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86AsmPrinter.cpp?rev=40594&r1=40593&r2=40594&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86AsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/X86/X86AsmPrinter.cpp Mon Jul 30 10:08:02 2007 @@ -168,7 +168,7 @@ } if (Subtarget->isTargetELF()) - O << "\t.type " << name << ", at object\n"; + O << "\t.type\t" << name << ", at object\n"; if (C->isNullValue()) { if (I->hasExternalLinkage()) { @@ -228,7 +228,7 @@ name + ",\"aw\", at progbits"); SwitchToDataSection(SectionName.c_str(), I); - O << "\t.weak " << name << "\n"; + O << "\t.weak\t" << name << "\n"; } break; case GlobalValue::AppendingLinkage: @@ -305,7 +305,7 @@ O << name << ":\t\t\t\t" << TAI->getCommentString() << " " << I->getName() << "\n"; if (TAI->hasDotTypeDotSizeDirective()) - O << "\t.size " << name << ", " << Size << "\n"; + O << "\t.size\t" << name << ", " << Size << "\n"; // If the initializer is a extern weak symbol, remember to emit the weak // reference! if (const GlobalValue *GV = dyn_cast(C)) From resistor at mac.com Mon Jul 30 11:57:08 2007 From: resistor at mac.com (Owen Anderson) Date: Mon, 30 Jul 2007 16:57:08 -0000 Subject: [llvm-commits] [llvm] r40595 - in /llvm/trunk: lib/Transforms/Scalar/GVN.cpp test/Transforms/GVN/2007-07-30-PredIDom.ll Message-ID: <200707301657.l6UGv9YB006375@zion.cs.uiuc.edu> Author: resistor Date: Mon Jul 30 11:57:08 2007 New Revision: 40595 URL: http://llvm.org/viewvc/llvm-project?rev=40595&view=rev Log: Fix a bug caused by indiscriminantly asking for the dominators of a predecessor. Added: llvm/trunk/test/Transforms/GVN/2007-07-30-PredIDom.ll Modified: llvm/trunk/lib/Transforms/Scalar/GVN.cpp Modified: llvm/trunk/lib/Transforms/Scalar/GVN.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/GVN.cpp?rev=40595&r1=40594&r2=40595&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/GVN.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/GVN.cpp Mon Jul 30 11:57:08 2007 @@ -723,7 +723,8 @@ return V = GetValueForBlock(IDom->getBlock(), orig, Phis); } - + if (std::distance(pred_begin(BB), pred_end(BB)) == 1) + return V = GetValueForBlock(IDom->getBlock(), orig, Phis); // Otherwise, the idom is the loop, so we need to insert a PHI node. Do so // now, then get values to fill in the incoming values for the PHI. @@ -731,10 +732,10 @@ BB->begin()); PN->reserveOperandSpace(std::distance(pred_begin(BB), pred_end(BB))); V = PN; - + // Fill in the incoming values for the block. for (pred_iterator PI = pred_begin(BB), E = pred_end(BB); PI != E; ++PI) - PN->addIncoming(GetValueForBlock(DT.getNode(*PI)->getBlock(), orig, Phis), *PI); + PN->addIncoming(GetValueForBlock(*PI, orig, Phis), *PI); return PN; } Added: llvm/trunk/test/Transforms/GVN/2007-07-30-PredIDom.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/2007-07-30-PredIDom.ll?rev=40595&view=auto ============================================================================== --- llvm/trunk/test/Transforms/GVN/2007-07-30-PredIDom.ll (added) +++ llvm/trunk/test/Transforms/GVN/2007-07-30-PredIDom.ll Mon Jul 30 11:57:08 2007 @@ -0,0 +1,274 @@ +; RUN: llvm-as < %s | opt -gvn | llvm-dis + + %"struct.Block::$_16" = type { i32 } + %struct.Exp = type { %struct.Exp_*, i32, i32, i32, %struct.Exp*, %struct.Exp*, %"struct.Exp::$_10", %"struct.Block::$_16", %"struct.Exp::$_12" } + %"struct.Exp::$_10" = type { %struct.Exp* } + %"struct.Exp::$_12" = type { %struct.Exp** } + %struct.Exp_ = type { i32, i32, i32, i32, %struct.Id* } + %struct.Id = type { i8*, i32, i32, i32, %"struct.Id::$_13" } + %"struct.Id::$_13" = type { double } + +define i8* @_ZN3Exp8toStringEj(%struct.Exp* %this, i32 %nextpc) { +entry: + switch i32 0, label %bb970 [ + i32 1, label %bb + i32 2, label %bb39 + i32 3, label %bb195 + i32 4, label %bb270 + i32 5, label %bb418 + i32 6, label %bb633 + i32 7, label %bb810 + i32 8, label %bb882 + i32 9, label %bb925 + ] + +bb: ; preds = %entry + store i8* null, i8** null + br label %return + +bb39: ; preds = %entry + br i1 false, label %cond_true, label %cond_false132 + +cond_true: ; preds = %bb39 + br i1 false, label %cond_true73, label %cond_false + +cond_true73: ; preds = %cond_true + br i1 false, label %cond_true108, label %cond_next + +cond_true108: ; preds = %cond_true73 + br label %cond_next + +cond_next: ; preds = %cond_true108, %cond_true73 + br label %cond_next131 + +cond_false: ; preds = %cond_true + br label %cond_next131 + +cond_next131: ; preds = %cond_false, %cond_next + br label %cond_next141 + +cond_false132: ; preds = %bb39 + br label %cond_next141 + +cond_next141: ; preds = %cond_false132, %cond_next131 + br i1 false, label %cond_true169, label %cond_false175 + +cond_true169: ; preds = %cond_next141 + br label %cond_next181 + +cond_false175: ; preds = %cond_next141 + br label %cond_next181 + +cond_next181: ; preds = %cond_false175, %cond_true169 + br i1 false, label %cond_true189, label %cond_next191 + +cond_true189: ; preds = %cond_next181 + br label %cond_next191 + +cond_next191: ; preds = %cond_true189, %cond_next181 + store i8* null, i8** null + br label %return + +bb195: ; preds = %entry + br i1 false, label %cond_true248, label %cond_false250 + +cond_true248: ; preds = %bb195 + br label %cond_next252 + +cond_false250: ; preds = %bb195 + br label %cond_next252 + +cond_next252: ; preds = %cond_false250, %cond_true248 + br i1 false, label %cond_true265, label %cond_next267 + +cond_true265: ; preds = %cond_next252 + br label %cond_next267 + +cond_next267: ; preds = %cond_true265, %cond_next252 + store i8* null, i8** null + br label %return + +bb270: ; preds = %entry + br i1 false, label %cond_true338, label %cond_false340 + +cond_true338: ; preds = %bb270 + br label %cond_next342 + +cond_false340: ; preds = %bb270 + br label %cond_next342 + +cond_next342: ; preds = %cond_false340, %cond_true338 + br i1 false, label %cond_true362, label %cond_false364 + +cond_true362: ; preds = %cond_next342 + br label %cond_next366 + +cond_false364: ; preds = %cond_next342 + br label %cond_next366 + +cond_next366: ; preds = %cond_false364, %cond_true362 + br i1 false, label %cond_true393, label %cond_next395 + +cond_true393: ; preds = %cond_next366 + br label %cond_next395 + +cond_next395: ; preds = %cond_true393, %cond_next366 + br i1 false, label %cond_true406, label %cond_next408 + +cond_true406: ; preds = %cond_next395 + br label %cond_next408 + +cond_next408: ; preds = %cond_true406, %cond_next395 + br i1 false, label %cond_true413, label %cond_next415 + +cond_true413: ; preds = %cond_next408 + br label %cond_next415 + +cond_next415: ; preds = %cond_true413, %cond_next408 + store i8* null, i8** null + br label %return + +bb418: ; preds = %entry + br i1 false, label %cond_true512, label %cond_false514 + +cond_true512: ; preds = %bb418 + br label %cond_next516 + +cond_false514: ; preds = %bb418 + br label %cond_next516 + +cond_next516: ; preds = %cond_false514, %cond_true512 + br i1 false, label %cond_true536, label %cond_false538 + +cond_true536: ; preds = %cond_next516 + br label %cond_next540 + +cond_false538: ; preds = %cond_next516 + br label %cond_next540 + +cond_next540: ; preds = %cond_false538, %cond_true536 + br i1 false, label %cond_true560, label %cond_false562 + +cond_true560: ; preds = %cond_next540 + br label %cond_next564 + +cond_false562: ; preds = %cond_next540 + br label %cond_next564 + +cond_next564: ; preds = %cond_false562, %cond_true560 + br i1 false, label %cond_true597, label %cond_next599 + +cond_true597: ; preds = %cond_next564 + br label %cond_next599 + +cond_next599: ; preds = %cond_true597, %cond_next564 + br i1 false, label %cond_true614, label %cond_next616 + +cond_true614: ; preds = %cond_next599 + br label %cond_next616 + +cond_next616: ; preds = %cond_true614, %cond_next599 + br i1 false, label %cond_true621, label %cond_next623 + +cond_true621: ; preds = %cond_next616 + br label %cond_next623 + +cond_next623: ; preds = %cond_true621, %cond_next616 + br i1 false, label %cond_true628, label %cond_next630 + +cond_true628: ; preds = %cond_next623 + br label %cond_next630 + +cond_next630: ; preds = %cond_true628, %cond_next623 + store i8* null, i8** null + br label %return + +bb633: ; preds = %entry + br i1 false, label %cond_true667, label %cond_next669 + +cond_true667: ; preds = %bb633 + br label %cond_next669 + +cond_next669: ; preds = %cond_true667, %bb633 + br i1 false, label %cond_true678, label %cond_next791 + +cond_true678: ; preds = %cond_next669 + br label %bb735 + +bb679: ; preds = %bb735 + br i1 false, label %cond_true729, label %cond_next731 + +cond_true729: ; preds = %bb679 + br label %cond_next731 + +cond_next731: ; preds = %cond_true729, %bb679 + br label %bb735 + +bb735: ; preds = %cond_next731, %cond_true678 + br i1 false, label %bb679, label %bb743 + +bb743: ; preds = %bb735 + br i1 false, label %cond_true788, label %cond_next790 + +cond_true788: ; preds = %bb743 + br label %cond_next790 + +cond_next790: ; preds = %cond_true788, %bb743 + br label %cond_next791 + +cond_next791: ; preds = %cond_next790, %cond_next669 + br i1 false, label %cond_true805, label %cond_next807 + +cond_true805: ; preds = %cond_next791 + br label %cond_next807 + +cond_next807: ; preds = %cond_true805, %cond_next791 + store i8* null, i8** null + br label %return + +bb810: ; preds = %entry + br i1 false, label %cond_true870, label %cond_next872 + +cond_true870: ; preds = %bb810 + br label %cond_next872 + +cond_next872: ; preds = %cond_true870, %bb810 + br i1 false, label %cond_true877, label %cond_next879 + +cond_true877: ; preds = %cond_next872 + br label %cond_next879 + +cond_next879: ; preds = %cond_true877, %cond_next872 + store i8* null, i8** null + br label %return + +bb882: ; preds = %entry + br i1 false, label %cond_true920, label %cond_next922 + +cond_true920: ; preds = %bb882 + br label %cond_next922 + +cond_next922: ; preds = %cond_true920, %bb882 + store i8* null, i8** null + br label %return + +bb925: ; preds = %entry + br i1 false, label %cond_true965, label %cond_next967 + +cond_true965: ; preds = %bb925 + br label %cond_next967 + +cond_next967: ; preds = %cond_true965, %bb925 + store i8* null, i8** null + br label %return + +bb970: ; preds = %entry + unreachable + ; No predecessors! + store i8* null, i8** null + br label %return + +return: ; preds = %0, %cond_next967, %cond_next922, %cond_next879, %cond_next807, %cond_next630, %cond_next415, %cond_next267, %cond_next191, %bb + %retval980 = load i8** null ; [#uses=1] + ret i8* %retval980 +} From resistor at mac.com Mon Jul 30 12:29:24 2007 From: resistor at mac.com (Owen Anderson) Date: Mon, 30 Jul 2007 17:29:24 -0000 Subject: [llvm-commits] [llvm] r40596 - in /llvm/trunk/lib: Analysis/MemoryDependenceAnalysis.cpp Transforms/Scalar/GVN.cpp Message-ID: <200707301729.l6UHTO8v010687@zion.cs.uiuc.edu> Author: resistor Date: Mon Jul 30 12:29:24 2007 New Revision: 40596 URL: http://llvm.org/viewvc/llvm-project?rev=40596&view=rev Log: Use more caching when computing non-local dependence. This makes bzip2 not use up the entire 32-bit address space. Modified: llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp llvm/trunk/lib/Transforms/Scalar/GVN.cpp Modified: llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp?rev=40596&r1=40595&r2=40596&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp (original) +++ llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp Mon Jul 30 12:29:24 2007 @@ -129,6 +129,8 @@ if (!inserted && !predOnStack) resp.insert(std::make_pair(block, None)); + else if (inserted && predOnStack) + resp.insert(std::make_pair(block, NonLocal)); return inserted; } Modified: llvm/trunk/lib/Transforms/Scalar/GVN.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/GVN.cpp?rev=40596&r1=40595&r2=40596&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/GVN.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/GVN.cpp Mon Jul 30 12:29:24 2007 @@ -752,7 +752,9 @@ I != E; ++I) if (I->second == MemoryDependenceAnalysis::None) { return false; - } else if (StoreInst* S = dyn_cast(I->second)) { + } else if (I->second == MemoryDependenceAnalysis::NonLocal) { + continue; + }else if (StoreInst* S = dyn_cast(I->second)) { if (S->getPointerOperand() == L->getPointerOperand()) repl.insert(std::make_pair(I->first, S->getOperand(0))); else From clattner at apple.com Mon Jul 30 12:45:58 2007 From: clattner at apple.com (Chris Lattner) Date: Mon, 30 Jul 2007 10:45:58 -0700 Subject: [llvm-commits] [llvm] r40069 - in /llvm/trunk: docs/ lib/AsmParser/ lib/VMCore/ test/ test/Assembler/ test/CFrontend/ test/CodeGen/ARM/ test/CodeGen/Alpha/ test/CodeGen/PowerPC/ test/CodeGen/X86/ test/Feature/ test/Integer/ test/Transforms/GVNPRE/ test/Transforms/GlobalOpt/ test/Transforms/IndVarsSimplify/ In-Reply-To: <1184903585.3144.552.camel@bashful.x10sys.com> References: <200707192313.l6JND5fm027072@zion.cs.uiuc.edu> <5004A1A0-7862-4C82-9E25-5F95B6288273@apple.com> <1184903585.3144.552.camel@bashful.x10sys.com> Message-ID: <1716607C-C7A1-4DA7-86FE-8F99B776D7DF@apple.com> On Jul 19, 2007, at 8:53 PM, Reid Spencer wrote: > On Thu, 2007-07-19 at 20:32 -0700, Chris Lattner wrote: >> On Jul 19, 2007, at 4:13 PM, Reid Spencer wrote: >> >>> Author: reid >>> Date: Thu Jul 19 18:13:04 2007 >>> New Revision: 40069 >>> >>> URL: http://llvm.org/viewvc/llvm-project?rev=40069&view=rev >>> Log: >>> For PR1553: >>> Change the keywords for the zext and sext parameter attributes to be >>> zeroext and signext so they don't conflict with the keywords for the >>> instructions of the same name. This gets around the ambiguity. >> >> Thanks Reid! >> >> Shouldn't the .ll parser autoupgrade llvm 2.0 .ll files? > > There isn't a good way to do it and still fix PR1553. That is, I'd > have > to reinstate the zext and sext keywords as parameter attributes so > that > the ambiguity between a function level zext/sext and a sext/zext > instruction would remain. It isn't acceptable to break backwards compatibility with old files. Can we just do a hack where we handle the common case by looking at the line that the token comes from? For example: call foo() zext would be treated different than: call foo() zext because the zext is not on the same line. This seems to be a good solution, thoughts? -Chris From raulherbster at gmail.com Mon Jul 30 12:51:26 2007 From: raulherbster at gmail.com (Raul Fernandes Herbster) Date: Mon, 30 Jul 2007 14:51:26 -0300 Subject: [llvm-commits] Patch: JIT support for ARM Message-ID: <6fbb4ff20707301051j5768997cn537a4660f0c649cb@mail.gmail.com> JIT support for ARM is now generating machine code (Thumb and VFP are not supported). Relocation has not been implemented yet. Next patch must provide such feature. Please, send me any feedback. Thanks in advance, Raul. -- Raul Fernandes Herbster Embedded and Pervasive Computing Laboratory - embedded.dee.ufcg.edu.br Electrical Engineering Department - DEE - www.dee.ufcg.edu.br Electrical Engineering and Informatics Center - CEEI Federal University of Campina Grande - UFCG - www.ufcg.edu.br Caixa Postal 10105 58109-970 Campina Grande - PB - Brasil -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20070730/c52b0c02/attachment.html -------------- next part -------------- A non-text attachment was scrubbed... Name: patch Type: application/octet-stream Size: 56677 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20070730/c52b0c02/attachment.obj From evan.cheng at apple.com Mon Jul 30 13:06:06 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 30 Jul 2007 11:06:06 -0700 Subject: [llvm-commits] Patch for X86 to use subregs In-Reply-To: <537BFA91-0E35-43FF-A45C-D0C9B543A102@gmail.com> References: <922DEBE2-14C9-4A1C-9A3A-1C366DE18B4A@apple.com> <2C30DFBD-73FF-4CCB-BE4F-469146C7A91C@gmail.com> <9A826E2A-2B21-4FFF-A18B-E11D08B7CB93@apple.com> <1BB6419C-C448-4995-8A27-791D8D21244D@gmail.com> <30228125-8A4F-4336-8380-8525B2BF7DFB@apple.com> <446DD660-7847-4E8A-9715-B66AB0AC988A@apple.com> <537BFA91-0E35-43FF-A45C-D0C9B543A102@gmail.com> Message-ID: <2EE0874C-1B82-47ED-AAE8-E4FBD5F2A92D@apple.com> On Jul 30, 2007, at 12:02 AM, Christopher Lamb wrote: > > On Jul 29, 2007, at 10:20 PM, Evan Cheng wrote: > >> >> On Jul 29, 2007, at 9:37 PM, Christopher Lamb wrote: >> >>> >>> On Jul 29, 2007, at 6:20 PM, Evan Cheng wrote: >>> >>>> Sent from my iPhone >>>> >>>> On Jul 28, 2007, at 4:36 PM, Christopher Lamb >>>> wrote: >>>> >>>>> >>>>> On Jul 28, 2007, at 2:26 PM, Evan Cheng wrote: >>>>> >>>>>> On Jul 28, 2007, at 11:52 AM, Christopher Lamb >>>>>> wrote: >>>>>> >>>>>>> >>>>>>> On Jul 28, 2007, at 1:48 AM, Evan Cheng wrote: >>>>>>> >>>>>>>> Very cool! I need to read it more carefully. >>>>>>> >>>>>>>> But I see you are lowering zext to a single insert_subreg. >>>>>>>> Is that right? It won't zero out the top part, no? >>>>>>> >>>>>>> It's only lowering (zext i32 to i64) to an insert_subreg on >>>>>>> x86-64 where all writes to 32-bit registers implicitly zero- >>>>>>> extend into the upper 32-bits. >>>>>>> >>>>>> >>>>>> I know. But thy mismatch semantically. A insert_subreg to the >>>>>> lower part should not change the upper half. I think this is >>>>>> only legal for anyext. >>>>> >>>>> On x86-64 the semantics of a 2 operand i32 insert_subreg is >>>>> that the input super-value is implicitly zero. So in this sense >>>>> the insert isn't changing the upper half, it's just that the >>>>> upper half is being set to zero implicitly rather than >>>>> explicitly. If you'll notice the insert_subreg is a two operand >>>>> (implicit super value) not a three operand version. If the >>>>> insert were the three operand version, and the super value as >>>>> coming from an implicit def I'd agree with you, but it's not. >>>> >>>> Ok, let's step back for a second. There are a couple of issues >>>> that should be addressed. Plz help me understand. :) >>>> >>>> 1: Semantics of insert_subreg should be the same across all >>>> targets, right? >>> >>> I'm not certain that this should be so. x86-64 clearly has a >>> target specific semantics of a 32-bit into 64-bit insert. >> >> No, that won't do. insert_subreg and extract_subreg are by >> definition target independent. They must have the same semantics. >> You are forcing x86-64 32-bit zero-extending move to fit >> insert_subreg when they are really not the same thing. > > If target independence is a requirement, then I agree that using > insert_subreg for x86-64 zero-ext isn't currently feasible. > Right. >>>> 2: two operant variant of insert_subreg should mean the superreg >>>> is undef. If you insert a value into a low part, the rest of the >>>> superreg is still undef. >>> >>> I think the meaning of insert_subreg instruction (both 2 and 3 >>> operand versions) must have semantics specific to the target. For >>> example, on x86-64 there is no valid 3 operand insert_subreg for >>> a 32-bit value into 64-bits, because the 32-bit result is always >>> going to be zero extended and overwrite the upper 32-bits. >> >> It just means there is no way to implement a insert_subreg with a >> single instruction under x86-64. But that is perfectly ok. Apart >> from anyext, x86-64 just isn't going to benefit from it. It's also >> impossible to read or modify the higher 32-bits. > > Currently the move that's generated isn't handled by coalescing > because the source and destination belong to different register > classes. The insert_subreg is meant to be a means to move values > implicitly between register classes that have a subreg > relationship. So if insert_subreg semantics must be target > independent, then I think you isel the zero-extending move to be: > > (i64 (INSERT_SUBREG (i64 0), GR32:$src, 3)) But that's wrong. Remember the superreg argument is an read / mod / write operand. That is, the first operand is a use, the def is the LHS but we are forcing the allocator to target the same physical register. v1 = some existing value v1 = insert_subreg v1, GR32:$src, 3 But zext is zeroing out the top part. i.e. zext is equal to mov v1, 0 v1 = insert_subreg v1, GR32:$src, 3 > > The thing is that the general coalescing will be able to determine > that the copy from undef is unneeded for (INSERT_SUBREG (i64 > undef), GR32:$src, 3), but it would take a target specific hook to > know that the constant zero is unneeded on x86-64. A target > specific hook for this might be useful, but I think that this is in > the realm of future work now. Sorry, I am not following. zext on x86-64, i.e. the 32-bit move, cannot be coalesced away. No need for target specific hook. >>>> 3: why is there a two operant variant in the first place? Why >>>> not use undef for the superreg operant? >>> >>> To note, the two operand variant is of the MachineInstr. The DAG >>> form would be to represent the superregister as coming from an >>> undef node, but this gets isel'd to the two operand MachineInstr >>> of insert_subreg. >>> >>> The reason is that undef is typically selected to an implicit def >>> of a register. This causes an unnecessary move to be generated >>> later on. This move can be optimized away later with more >>> difficulty during subreg lowering by checking whether the input >>> register is defined by an implicit def pseudo instruction, but >>> instead I decided to perform the optimization during ISel on the >>> DAG form during instruction selection. >>> >>> With what you're suggesting >>> reg1024 = ... >>> reg1026 = insert_subreg undef, reg1024, 1 >>> reg1027 = insert_subreg reg1026, reg1025, 1 >>> use reg1027 >>> >>> would be isel'd to then subreg lowered to: >>> >>> R6 = ... >>> implicit def R01 <= this implicit def is unecessary >> >> That's a pseudo instruction, it doesn't cost anything. >> >>> R23 = R01 <= this copy is unnecessary >> >> It can be coalesced to: >> R23 = undef >> >>> R2 = R6 >>> R45 = R23 >>> R5 = R6 >>> use R45 >> >> Using undef explicit is the right way to go. There is a good >> reason it's there. Having the two operand version of insert_subreg >> that implicitly use an undef value doesn't fit into the overall >> llvm philosophy. > > Right now the coalescing that you are describing is happening > during isel. Are you simply saying that you'd rather have the > coalescing happen during subreg lowering? I can accept that, but > would you share your reasons? There really isn't a very good argument for having the 2 different versions of insert_subreg. undef use must be explicitly modeled. I really don't see what you mean by coalescing during isel. isel doesn't have the concept of coalescing. Also don't forget everything must remain ssa until register allocation. >>>> 4: what's the benefit of isel a zext to insert_subreg and then >>>> xform it to a 32-bit move? >>> >>> The xform to a 32-bit move is only the conservative behavior. The >>> zext can be implicit if regalloc can coalesce subreg_inserts. >>> >>>> Why not just isel the zext to the move? It's not legal to >>>> coalesce it away anyway. >>> >>> Actually it is legal to coalesce it. On x86-64 any write to a 32- >>> bit register zero extends the value to 64-bits. For the >>> insert_subreg under discussion the inserted value is a 32-bit >>> result, that has in-fact already be zero extended implicitly. >> >> It's not legal to coalesce away the 32-bit zero extending move. >> >> Suppose RAX contains some value with top 32-bits non-zero. >> mov EAX, EAX (zero extend top bits) >> use RAX (expecting top bits to be zero) >> >> Coalesced away the move is a miscompilation. > > Indeed, but what you have described is not a valid insert_subreg > either. Insert_subreg would take EAX as its input operand and would > only be coalesced into an instruction that defines EAX explicitly > (i.e. an instruction that defines RAX defines EAX implicitly, not > explicitly so no coalescing). I think that this coalescing rule is > generally required for correctness when coalescing insert_subreg > under any architecture. What I've been saying all along. zero_extend on x86-64 isn't the same as a insert_sub, don't try to model it that way. Evan > > >>>>> >>>>> Also the current behavior is to use a 32-bit mov instruction >>>>> for both zeroext and for anyext, I don't see how this is any >>>>> different. >>>>> >>>>>>>> On Jul 28, 2007, at 12:17 AM, Christopher Lamb >>>>>>>> wrote: >>>>>>>> >>>>>>>>> This patch changes the X86 back end to use the new subreg >>>>>>>>> operations for appropriate truncate and extend operations. >>>>>>>>> This should allow regression testing of the subreg feature >>>>>>>>> going forward, as it's now used in a public target. >>>>>>>>> >>>>>>>>> The patch passed DejaGnu and all of SingleSource on my x86 >>>>>>>>> machine, but there are changes for x86-64 as well which I >>>>>>>>> haven't been able to test. Output assembly for x86-64 >>>>>>>>> appears sane, but I'd appreciate someone giving the patch a >>>>>>>>> try on their x86-64 system. Other 32-bit x86 testing is >>>>>>>>> also appreciated. >>>>>>>>> >>>>>>>>> Thanks >>>>>>>>> -- >>>>>>>>> Christopher Lamb >>>>>>>>> >>>>>>>>> >>>>>>>>> >>>>>>>>> >>>>>>>>> _______________________________________________ >>>>>>>>> llvm-commits mailing list >>>>>>>>> llvm-commits at cs.uiuc.edu >>>>>>>>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits >>>>>>>> _______________________________________________ >>>>>>>> llvm-commits mailing list >>>>>>>> llvm-commits at cs.uiuc.edu >>>>>>>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits >>>>>>> >>>>>>> -- >>>>>>> Christopher Lamb >>>>>>> >>>>>>> >>>>>>> >>>>>>> _______________________________________________ >>>>>>> llvm-commits mailing list >>>>>>> llvm-commits at cs.uiuc.edu >>>>>>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits >>>>>> _______________________________________________ >>>>>> llvm-commits mailing list >>>>>> llvm-commits at cs.uiuc.edu >>>>>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits >>>>> >>>>> -- >>>>> Christopher Lamb >>>>> >>>>> >>>>> >>>>> _______________________________________________ >>>>> llvm-commits mailing list >>>>> llvm-commits at cs.uiuc.edu >>>>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits >>>> _______________________________________________ >>>> llvm-commits mailing list >>>> llvm-commits at cs.uiuc.edu >>>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits >>> >>> -- >>> Christopher Lamb >>> >>> >>> >>> _______________________________________________ >>> llvm-commits mailing list >>> llvm-commits at cs.uiuc.edu >>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits >> >> _______________________________________________ >> llvm-commits mailing list >> llvm-commits at cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > -- > Christopher Lamb > > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20070730/e10de602/attachment.html From dpatel at apple.com Mon Jul 30 13:21:37 2007 From: dpatel at apple.com (Devang Patel) Date: Mon, 30 Jul 2007 11:21:37 -0700 Subject: [llvm-commits] [llvm-gcc-4.2] r40571 - in /llvm-gcc-4.2/trunk/gcc: llvm-backend.cpp toplev.c In-Reply-To: <200707281828.l6SISVJG011048@zion.cs.uiuc.edu> References: <200707281828.l6SISVJG011048@zion.cs.uiuc.edu> Message-ID: On Jul 28, 2007, at 11:28 AM, Anton Korobeynikov wrote: > -- llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp (original) > +++ llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp Sat Jul 28 13:28:30 2007 > @@ -234,7 +234,11 @@ > delete PerModulePasses; > delete CodeGenPasses; > > - createOptimizationPasses(); > + // Don't run codegen, when we should output PCH > + if (!flag_pch_file) > + createOptimizationPasses(); > + else > + llvm_pch_write_init(); > } Does this handle inline method definition in C++ and function bodies in C header well ? - Devang From djg at cray.com Mon Jul 30 14:09:17 2007 From: djg at cray.com (Dan Gohman) Date: Mon, 30 Jul 2007 19:09:17 -0000 Subject: [llvm-commits] [llvm] r40598 - in /llvm/trunk: lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp test/CodeGen/Alpha/illegal-element-type.ll test/CodeGen/PowerPC/illegal-element-type.ll Message-ID: <200707301909.l6UJ9IIT015023@zion.cs.uiuc.edu> Author: djg Date: Mon Jul 30 14:09:17 2007 New Revision: 40598 URL: http://llvm.org/viewvc/llvm-project?rev=40598&view=rev Log: Fix a bug in getCopyFromParts turned up in the testcase for PR1132. Added: llvm/trunk/test/CodeGen/Alpha/illegal-element-type.ll llvm/trunk/test/CodeGen/PowerPC/illegal-element-type.ll Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=40598&r1=40597&r2=40598&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Mon Jul 30 14:09:17 2007 @@ -695,9 +695,9 @@ } else if (NumParts > 0) { // If the intermediate type was expanded, build the intermediate operands // from the parts. - assert(NumIntermediates % NumParts == 0 && + assert(NumParts % NumIntermediates == 0 && "Must expand into a divisible number of parts!"); - unsigned Factor = NumIntermediates / NumParts; + unsigned Factor = NumParts / NumIntermediates; for (unsigned i = 0; i != NumIntermediates; ++i) Ops[i] = getCopyFromParts(DAG, &Parts[i * Factor], Factor, PartVT, IntermediateVT); @@ -708,7 +708,7 @@ return DAG.getNode(MVT::isVector(IntermediateVT) ? ISD::CONCAT_VECTORS : ISD::BUILD_VECTOR, - ValueVT, &Ops[0], NumParts); + ValueVT, &Ops[0], NumIntermediates); } /// getCopyToParts - Create a series of nodes that contain the Added: llvm/trunk/test/CodeGen/Alpha/illegal-element-type.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Alpha/illegal-element-type.ll?rev=40598&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/Alpha/illegal-element-type.ll (added) +++ llvm/trunk/test/CodeGen/Alpha/illegal-element-type.ll Mon Jul 30 14:09:17 2007 @@ -0,0 +1,23 @@ +; RUN: llvm-as < %s | llc -mtriple=alphaev6-unknown-linux-gnu + +define void @foo() { +entry: + br label %bb + +bb: ; preds = %bb, %entry + br i1 false, label %bb26, label %bb + +bb19: ; preds = %bb26 + ret void + +bb26: ; preds = %bb + br i1 false, label %bb30, label %bb19 + +bb30: ; preds = %bb26 + br label %bb45 + +bb45: ; preds = %bb45, %bb30 + %V.0 = phi <8 x i16> [ %tmp42, %bb45 ], [ zeroinitializer, %bb30 ] ; <<8 x i16>> [#uses=1] + %tmp42 = mul <8 x i16> zeroinitializer, %V.0 ; <<8 x i16>> [#uses=1] + br label %bb45 +} Added: llvm/trunk/test/CodeGen/PowerPC/illegal-element-type.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/illegal-element-type.ll?rev=40598&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/PowerPC/illegal-element-type.ll (added) +++ llvm/trunk/test/CodeGen/PowerPC/illegal-element-type.ll Mon Jul 30 14:09:17 2007 @@ -0,0 +1,23 @@ +; RUN: llvm-as < %s | llc -march=ppc32 -mcpu=g3 + +define void @foo() { +entry: + br label %bb + +bb: ; preds = %bb, %entry + br i1 false, label %bb26, label %bb + +bb19: ; preds = %bb26 + ret void + +bb26: ; preds = %bb + br i1 false, label %bb30, label %bb19 + +bb30: ; preds = %bb26 + br label %bb45 + +bb45: ; preds = %bb45, %bb30 + %V.0 = phi <8 x i16> [ %tmp42, %bb45 ], [ zeroinitializer, %bb30 ] ; <<8 x i16>> [#uses=1] + %tmp42 = mul <8 x i16> zeroinitializer, %V.0 ; <<8 x i16>> [#uses=1] + br label %bb45 +} From djg at cray.com Mon Jul 30 14:14:41 2007 From: djg at cray.com (Dan Gohman) Date: Mon, 30 Jul 2007 14:14:41 -0500 Subject: [llvm-commits] Using tabs to make assembly output slightly prettier Message-ID: <20070730191441.GK14991@village.us.cray.com> Attached is a patch that changes the x86 assembly output to use tab characters to separate the mnemonics from their operands instead of single spaces. This makes the assembly output a little more consistent with various other compilers (f.e. GCC), and slightly easier to read. Any objections? Dan -- Dan Gohman, Cray Inc. -------------- next part -------------- Index: lib/Target/X86/X86InstrSSE.td =================================================================== --- lib/Target/X86/X86InstrSSE.td (revision 40587) +++ lib/Target/X86/X86InstrSSE.td (working copy) @@ -293,56 +293,56 @@ // Move Instructions def MOVSSrr : SSI<0x10, MRMSrcReg, (outs FR32:$dst), (ins FR32:$src), - "movss {$src, $dst|$dst, $src}", []>; + "movss\t{$src, $dst|$dst, $src}", []>; def MOVSSrm : SSI<0x10, MRMSrcMem, (outs FR32:$dst), (ins f32mem:$src), - "movss {$src, $dst|$dst, $src}", + "movss\t{$src, $dst|$dst, $src}", [(set FR32:$dst, (loadf32 addr:$src))]>; def MOVSSmr : SSI<0x11, MRMDestMem, (outs), (ins f32mem:$dst, FR32:$src), - "movss {$src, $dst|$dst, $src}", + "movss\t{$src, $dst|$dst, $src}", [(store FR32:$src, addr:$dst)]>; // Conversion instructions def CVTTSS2SIrr : SSI<0x2C, MRMSrcReg, (outs GR32:$dst), (ins FR32:$src), - "cvttss2si {$src, $dst|$dst, $src}", + "cvttss2si\t{$src, $dst|$dst, $src}", [(set GR32:$dst, (fp_to_sint FR32:$src))]>; def CVTTSS2SIrm : SSI<0x2C, MRMSrcMem, (outs GR32:$dst), (ins f32mem:$src), - "cvttss2si {$src, $dst|$dst, $src}", + "cvttss2si\t{$src, $dst|$dst, $src}", [(set GR32:$dst, (fp_to_sint (loadf32 addr:$src)))]>; def CVTSI2SSrr : SSI<0x2A, MRMSrcReg, (outs FR32:$dst), (ins GR32:$src), - "cvtsi2ss {$src, $dst|$dst, $src}", + "cvtsi2ss\t{$src, $dst|$dst, $src}", [(set FR32:$dst, (sint_to_fp GR32:$src))]>; def CVTSI2SSrm : SSI<0x2A, MRMSrcMem, (outs FR32:$dst), (ins i32mem:$src), - "cvtsi2ss {$src, $dst|$dst, $src}", + "cvtsi2ss\t{$src, $dst|$dst, $src}", [(set FR32:$dst, (sint_to_fp (loadi32 addr:$src)))]>; // Match intrinsics which expect XMM operand(s). def Int_CVTSS2SIrr : SSI<0x2D, MRMSrcReg, (outs GR32:$dst), (ins VR128:$src), - "cvtss2si {$src, $dst|$dst, $src}", + "cvtss2si\t{$src, $dst|$dst, $src}", [(set GR32:$dst, (int_x86_sse_cvtss2si VR128:$src))]>; def Int_CVTSS2SIrm : SSI<0x2D, MRMSrcMem, (outs GR32:$dst), (ins f32mem:$src), - "cvtss2si {$src, $dst|$dst, $src}", + "cvtss2si\t{$src, $dst|$dst, $src}", [(set GR32:$dst, (int_x86_sse_cvtss2si (load addr:$src)))]>; // Aliases for intrinsics def Int_CVTTSS2SIrr : SSI<0x2C, MRMSrcReg, (outs GR32:$dst), (ins VR128:$src), - "cvttss2si {$src, $dst|$dst, $src}", + "cvttss2si\t{$src, $dst|$dst, $src}", [(set GR32:$dst, (int_x86_sse_cvttss2si VR128:$src))]>; def Int_CVTTSS2SIrm : SSI<0x2C, MRMSrcMem, (outs GR32:$dst), (ins f32mem:$src), - "cvttss2si {$src, $dst|$dst, $src}", + "cvttss2si\t{$src, $dst|$dst, $src}", [(set GR32:$dst, (int_x86_sse_cvttss2si(load addr:$src)))]>; let isTwoAddress = 1 in { def Int_CVTSI2SSrr : SSI<0x2A, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, GR32:$src2), - "cvtsi2ss {$src2, $dst|$dst, $src2}", + "cvtsi2ss\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (int_x86_sse_cvtsi2ss VR128:$src1, GR32:$src2))]>; def Int_CVTSI2SSrm : SSI<0x2A, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, i32mem:$src2), - "cvtsi2ss {$src2, $dst|$dst, $src2}", + "cvtsi2ss\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (int_x86_sse_cvtsi2ss VR128:$src1, (loadi32 addr:$src2)))]>; } @@ -351,45 +351,45 @@ let isTwoAddress = 1 in { def CMPSSrr : SSI<0xC2, MRMSrcReg, (outs FR32:$dst), (ins FR32:$src1, FR32:$src, SSECC:$cc), - "cmp${cc}ss {$src, $dst|$dst, $src}", []>; + "cmp${cc}ss\t{$src, $dst|$dst, $src}", []>; def CMPSSrm : SSI<0xC2, MRMSrcMem, (outs FR32:$dst), (ins FR32:$src1, f32mem:$src, SSECC:$cc), - "cmp${cc}ss {$src, $dst|$dst, $src}", []>; + "cmp${cc}ss\t{$src, $dst|$dst, $src}", []>; } def UCOMISSrr: PSI<0x2E, MRMSrcReg, (outs), (ins FR32:$src1, FR32:$src2), - "ucomiss {$src2, $src1|$src1, $src2}", + "ucomiss\t{$src2, $src1|$src1, $src2}", [(X86cmp FR32:$src1, FR32:$src2)]>; def UCOMISSrm: PSI<0x2E, MRMSrcMem, (outs), (ins FR32:$src1, f32mem:$src2), - "ucomiss {$src2, $src1|$src1, $src2}", + "ucomiss\t{$src2, $src1|$src1, $src2}", [(X86cmp FR32:$src1, (loadf32 addr:$src2))]>; // Aliases to match intrinsics which expect XMM operand(s). let isTwoAddress = 1 in { def Int_CMPSSrr : SSI<0xC2, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src, SSECC:$cc), - "cmp${cc}ss {$src, $dst|$dst, $src}", + "cmp${cc}ss\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse_cmp_ss VR128:$src1, VR128:$src, imm:$cc))]>; def Int_CMPSSrm : SSI<0xC2, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, f32mem:$src, SSECC:$cc), - "cmp${cc}ss {$src, $dst|$dst, $src}", + "cmp${cc}ss\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse_cmp_ss VR128:$src1, (load addr:$src), imm:$cc))]>; } def Int_UCOMISSrr: PSI<0x2E, MRMSrcReg, (outs), (ins VR128:$src1, VR128:$src2), - "ucomiss {$src2, $src1|$src1, $src2}", + "ucomiss\t{$src2, $src1|$src1, $src2}", [(X86ucomi (v4f32 VR128:$src1), VR128:$src2)]>; def Int_UCOMISSrm: PSI<0x2E, MRMSrcMem, (outs), (ins VR128:$src1, f128mem:$src2), - "ucomiss {$src2, $src1|$src1, $src2}", + "ucomiss\t{$src2, $src1|$src1, $src2}", [(X86ucomi (v4f32 VR128:$src1), (load addr:$src2))]>; def Int_COMISSrr: PSI<0x2F, MRMSrcReg, (outs), (ins VR128:$src1, VR128:$src2), - "comiss {$src2, $src1|$src1, $src2}", + "comiss\t{$src2, $src1|$src1, $src2}", [(X86comi (v4f32 VR128:$src1), VR128:$src2)]>; def Int_COMISSrm: PSI<0x2F, MRMSrcMem, (outs), (ins VR128:$src1, f128mem:$src2), - "comiss {$src2, $src1|$src1, $src2}", + "comiss\t{$src2, $src1|$src1, $src2}", [(X86comi (v4f32 VR128:$src1), (load addr:$src2))]>; // Aliases of packed SSE1 instructions for scalar use. These all have names that @@ -397,53 +397,53 @@ // Alias instructions that map fld0 to pxor for sse. def FsFLD0SS : I<0xEF, MRMInitReg, (outs FR32:$dst), (ins), - "pxor $dst, $dst", [(set FR32:$dst, fp32imm0)]>, + "pxor\t$dst, $dst", [(set FR32:$dst, fp32imm0)]>, Requires<[HasSSE1]>, TB, OpSize; // Alias instruction to do FR32 reg-to-reg copy using movaps. Upper bits are // disregarded. def FsMOVAPSrr : PSI<0x28, MRMSrcReg, (outs FR32:$dst), (ins FR32:$src), - "movaps {$src, $dst|$dst, $src}", []>; + "movaps\t{$src, $dst|$dst, $src}", []>; // Alias instruction to load FR32 from f128mem using movaps. Upper bits are // disregarded. def FsMOVAPSrm : PSI<0x28, MRMSrcMem, (outs FR32:$dst), (ins f128mem:$src), - "movaps {$src, $dst|$dst, $src}", + "movaps\t{$src, $dst|$dst, $src}", [(set FR32:$dst, (alignedloadfsf32 addr:$src))]>; // Alias bitwise logical operations using SSE logical ops on packed FP values. let isTwoAddress = 1 in { let isCommutable = 1 in { def FsANDPSrr : PSI<0x54, MRMSrcReg, (outs FR32:$dst), (ins FR32:$src1, FR32:$src2), - "andps {$src2, $dst|$dst, $src2}", + "andps\t{$src2, $dst|$dst, $src2}", [(set FR32:$dst, (X86fand FR32:$src1, FR32:$src2))]>; def FsORPSrr : PSI<0x56, MRMSrcReg, (outs FR32:$dst), (ins FR32:$src1, FR32:$src2), - "orps {$src2, $dst|$dst, $src2}", + "orps\t{$src2, $dst|$dst, $src2}", [(set FR32:$dst, (X86for FR32:$src1, FR32:$src2))]>; def FsXORPSrr : PSI<0x57, MRMSrcReg, (outs FR32:$dst), (ins FR32:$src1, FR32:$src2), - "xorps {$src2, $dst|$dst, $src2}", + "xorps\t{$src2, $dst|$dst, $src2}", [(set FR32:$dst, (X86fxor FR32:$src1, FR32:$src2))]>; } def FsANDPSrm : PSI<0x54, MRMSrcMem, (outs FR32:$dst), (ins FR32:$src1, f128mem:$src2), - "andps {$src2, $dst|$dst, $src2}", + "andps\t{$src2, $dst|$dst, $src2}", [(set FR32:$dst, (X86fand FR32:$src1, (memopfsf32 addr:$src2)))]>; def FsORPSrm : PSI<0x56, MRMSrcMem, (outs FR32:$dst), (ins FR32:$src1, f128mem:$src2), - "orps {$src2, $dst|$dst, $src2}", + "orps\t{$src2, $dst|$dst, $src2}", [(set FR32:$dst, (X86for FR32:$src1, (memopfsf32 addr:$src2)))]>; def FsXORPSrm : PSI<0x57, MRMSrcMem, (outs FR32:$dst), (ins FR32:$src1, f128mem:$src2), - "xorps {$src2, $dst|$dst, $src2}", + "xorps\t{$src2, $dst|$dst, $src2}", [(set FR32:$dst, (X86fxor FR32:$src1, (memopfsf32 addr:$src2)))]>; def FsANDNPSrr : PSI<0x55, MRMSrcReg, (outs FR32:$dst), (ins FR32:$src1, FR32:$src2), - "andnps {$src2, $dst|$dst, $src2}", []>; + "andnps\t{$src2, $dst|$dst, $src2}", []>; def FsANDNPSrm : PSI<0x55, MRMSrcMem, (outs FR32:$dst), (ins FR32:$src1, f128mem:$src2), - "andnps {$src2, $dst|$dst, $src2}", []>; + "andnps\t{$src2, $dst|$dst, $src2}", []>; } /// basic_sse1_fp_binop_rm - SSE1 binops come in both scalar and vector forms. @@ -462,38 +462,38 @@ bit Commutable = 0> { // Scalar operation, reg+reg. def SSrr : SSI { let isCommutable = Commutable; } // Scalar operation, reg+mem. def SSrm : SSI; // Vector operation, reg+reg. def PSrr : PSI { let isCommutable = Commutable; } // Vector operation, reg+mem. def PSrm : PSI; // Intrinsic operation, reg+reg. def SSrr_Int : SSI { let isCommutable = Commutable; } // Intrinsic operation, reg+mem. def SSrm_Int : SSI; } @@ -523,51 +523,51 @@ // Scalar operation, reg+reg. def SSrr : SSI { let isCommutable = Commutable; } // Scalar operation, reg+mem. def SSrm : SSI; // Vector operation, reg+reg. def PSrr : PSI { let isCommutable = Commutable; } // Vector operation, reg+mem. def PSrm : PSI; // Intrinsic operation, reg+reg. def SSrr_Int : SSI { let isCommutable = Commutable; } // Intrinsic operation, reg+mem. def SSrm_Int : SSI; // Vector intrinsic operation, reg+reg. def PSrr_Int : PSI { let isCommutable = Commutable; } // Vector intrinsic operation, reg+mem. def PSrm_Int : PSI; } } @@ -582,44 +582,44 @@ // Move Instructions def MOVAPSrr : PSI<0x28, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src), - "movaps {$src, $dst|$dst, $src}", []>; + "movaps\t{$src, $dst|$dst, $src}", []>; def MOVAPSrm : PSI<0x28, MRMSrcMem, (outs VR128:$dst), (ins f128mem:$src), - "movaps {$src, $dst|$dst, $src}", + "movaps\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (alignedloadv4f32 addr:$src))]>; def MOVAPSmr : PSI<0x29, MRMDestMem, (outs), (ins f128mem:$dst, VR128:$src), - "movaps {$src, $dst|$dst, $src}", + "movaps\t{$src, $dst|$dst, $src}", [(alignedstore (v4f32 VR128:$src), addr:$dst)]>; def MOVUPSrr : PSI<0x10, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src), - "movups {$src, $dst|$dst, $src}", []>; + "movups\t{$src, $dst|$dst, $src}", []>; def MOVUPSrm : PSI<0x10, MRMSrcMem, (outs VR128:$dst), (ins f128mem:$src), - "movups {$src, $dst|$dst, $src}", + "movups\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (loadv4f32 addr:$src))]>; def MOVUPSmr : PSI<0x11, MRMDestMem, (outs), (ins f128mem:$dst, VR128:$src), - "movups {$src, $dst|$dst, $src}", + "movups\t{$src, $dst|$dst, $src}", [(store (v4f32 VR128:$src), addr:$dst)]>; // Intrinsic forms of MOVUPS load and store def MOVUPSrm_Int : PSI<0x10, MRMSrcMem, (outs VR128:$dst), (ins f128mem:$src), - "movups {$src, $dst|$dst, $src}", + "movups\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse_loadu_ps addr:$src))]>; def MOVUPSmr_Int : PSI<0x11, MRMDestMem, (outs), (ins f128mem:$dst, VR128:$src), - "movups {$src, $dst|$dst, $src}", + "movups\t{$src, $dst|$dst, $src}", [(int_x86_sse_storeu_ps addr:$dst, VR128:$src)]>; let isTwoAddress = 1 in { let AddedComplexity = 20 in { def MOVLPSrm : PSI<0x12, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, f64mem:$src2), - "movlps {$src2, $dst|$dst, $src2}", + "movlps\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v4f32 (vector_shuffle VR128:$src1, (bc_v4f32 (v2f64 (scalar_to_vector (loadf64 addr:$src2)))), MOVLP_shuffle_mask)))]>; def MOVHPSrm : PSI<0x16, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, f64mem:$src2), - "movhps {$src2, $dst|$dst, $src2}", + "movhps\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v4f32 (vector_shuffle VR128:$src1, (bc_v4f32 (v2f64 (scalar_to_vector (loadf64 addr:$src2)))), @@ -628,14 +628,14 @@ } // isTwoAddress def MOVLPSmr : PSI<0x13, MRMDestMem, (outs), (ins f64mem:$dst, VR128:$src), - "movlps {$src, $dst|$dst, $src}", + "movlps\t{$src, $dst|$dst, $src}", [(store (f64 (vector_extract (bc_v2f64 (v4f32 VR128:$src)), (iPTR 0))), addr:$dst)]>; // v2f64 extract element 1 is always custom lowered to unpack high to low // and extract element 0 so the non-store version isn't too horrible. def MOVHPSmr : PSI<0x17, MRMDestMem, (outs), (ins f64mem:$dst, VR128:$src), - "movhps {$src, $dst|$dst, $src}", + "movhps\t{$src, $dst|$dst, $src}", [(store (f64 (vector_extract (v2f64 (vector_shuffle (bc_v2f64 (v4f32 VR128:$src)), (undef), @@ -645,13 +645,13 @@ let isTwoAddress = 1 in { let AddedComplexity = 15 in { def MOVLHPSrr : PSI<0x16, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), - "movlhps {$src2, $dst|$dst, $src2}", + "movlhps\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v4f32 (vector_shuffle VR128:$src1, VR128:$src2, MOVHP_shuffle_mask)))]>; def MOVHLPSrr : PSI<0x12, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), - "movhlps {$src2, $dst|$dst, $src2}", + "movhlps\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v4f32 (vector_shuffle VR128:$src1, VR128:$src2, MOVHLPS_shuffle_mask)))]>; @@ -681,50 +681,50 @@ bit Commutable = 0> { // Scalar operation, reg. def SSr : SSI { let isCommutable = Commutable; } // Scalar operation, mem. def SSm : SSI; // Vector operation, reg. def PSr : PSI { let isCommutable = Commutable; } // Vector operation, mem. def PSm : PSI; // Intrinsic operation, reg. def SSr_Int : SSI { let isCommutable = Commutable; } // Intrinsic operation, mem. def SSm_Int : SSI; // Vector intrinsic operation, reg def PSr_Int : PSI { let isCommutable = Commutable; } // Vector intrinsic operation, mem def PSm_Int : PSI; } @@ -744,46 +744,46 @@ let isCommutable = 1 in { def ANDPSrr : PSI<0x54, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), - "andps {$src2, $dst|$dst, $src2}", + "andps\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v2i64 (and VR128:$src1, VR128:$src2)))]>; def ORPSrr : PSI<0x56, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), - "orps {$src2, $dst|$dst, $src2}", + "orps\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v2i64 (or VR128:$src1, VR128:$src2)))]>; def XORPSrr : PSI<0x57, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), - "xorps {$src2, $dst|$dst, $src2}", + "xorps\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v2i64 (xor VR128:$src1, VR128:$src2)))]>; } def ANDPSrm : PSI<0x54, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, f128mem:$src2), - "andps {$src2, $dst|$dst, $src2}", + "andps\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (and (bc_v2i64 (v4f32 VR128:$src1)), (memopv2i64 addr:$src2)))]>; def ORPSrm : PSI<0x56, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, f128mem:$src2), - "orps {$src2, $dst|$dst, $src2}", + "orps\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (or (bc_v2i64 (v4f32 VR128:$src1)), (memopv2i64 addr:$src2)))]>; def XORPSrm : PSI<0x57, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, f128mem:$src2), - "xorps {$src2, $dst|$dst, $src2}", + "xorps\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (xor (bc_v2i64 (v4f32 VR128:$src1)), (memopv2i64 addr:$src2)))]>; def ANDNPSrr : PSI<0x55, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), - "andnps {$src2, $dst|$dst, $src2}", + "andnps\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v2i64 (and (xor VR128:$src1, (bc_v2i64 (v4i32 immAllOnesV))), VR128:$src2)))]>; def ANDNPSrm : PSI<0x55, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1,f128mem:$src2), - "andnps {$src2, $dst|$dst, $src2}", + "andnps\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v2i64 (and (xor (bc_v2i64 (v4f32 VR128:$src1)), (bc_v2i64 (v4i32 immAllOnesV))), @@ -793,12 +793,12 @@ let isTwoAddress = 1 in { def CMPPSrri : PSIi8<0xC2, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src, SSECC:$cc), - "cmp${cc}ps {$src, $dst|$dst, $src}", + "cmp${cc}ps\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse_cmp_ps VR128:$src1, VR128:$src, imm:$cc))]>; def CMPPSrmi : PSIi8<0xC2, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, f128mem:$src, SSECC:$cc), - "cmp${cc}ps {$src, $dst|$dst, $src}", + "cmp${cc}ps\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse_cmp_ps VR128:$src1, (load addr:$src), imm:$cc))]>; } @@ -809,7 +809,7 @@ def SHUFPSrri : PSIi8<0xC6, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2, i32i8imm:$src3), - "shufps {$src3, $src2, $dst|$dst, $src2, $src3}", + "shufps\t{$src3, $src2, $dst|$dst, $src2, $src3}", [(set VR128:$dst, (v4f32 (vector_shuffle VR128:$src1, VR128:$src2, @@ -817,7 +817,7 @@ def SHUFPSrmi : PSIi8<0xC6, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, f128mem:$src2, i32i8imm:$src3), - "shufps {$src3, $src2, $dst|$dst, $src2, $src3}", + "shufps\t{$src3, $src2, $dst|$dst, $src2, $src3}", [(set VR128:$dst, (v4f32 (vector_shuffle VR128:$src1, (load addr:$src2), @@ -826,14 +826,14 @@ let AddedComplexity = 10 in { def UNPCKHPSrr : PSI<0x15, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), - "unpckhps {$src2, $dst|$dst, $src2}", + "unpckhps\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v4f32 (vector_shuffle VR128:$src1, VR128:$src2, UNPCKH_shuffle_mask)))]>; def UNPCKHPSrm : PSI<0x15, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, f128mem:$src2), - "unpckhps {$src2, $dst|$dst, $src2}", + "unpckhps\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v4f32 (vector_shuffle VR128:$src1, (load addr:$src2), @@ -841,14 +841,14 @@ def UNPCKLPSrr : PSI<0x14, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), - "unpcklps {$src2, $dst|$dst, $src2}", + "unpcklps\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v4f32 (vector_shuffle VR128:$src1, VR128:$src2, UNPCKL_shuffle_mask)))]>; def UNPCKLPSrm : PSI<0x14, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, f128mem:$src2), - "unpcklps {$src2, $dst|$dst, $src2}", + "unpcklps\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v4f32 (vector_shuffle VR128:$src1, (load addr:$src2), @@ -858,22 +858,22 @@ // Mask creation def MOVMSKPSrr : PSI<0x50, MRMSrcReg, (outs GR32:$dst), (ins VR128:$src), - "movmskps {$src, $dst|$dst, $src}", + "movmskps\t{$src, $dst|$dst, $src}", [(set GR32:$dst, (int_x86_sse_movmsk_ps VR128:$src))]>; def MOVMSKPDrr : PSI<0x50, MRMSrcReg, (outs GR32:$dst), (ins VR128:$src), - "movmskpd {$src, $dst|$dst, $src}", + "movmskpd\t{$src, $dst|$dst, $src}", [(set GR32:$dst, (int_x86_sse2_movmsk_pd VR128:$src))]>; // Prefetching loads. // TODO: no intrinsics for these? -def PREFETCHT0 : PSI<0x18, MRM1m, (outs), (ins i8mem:$src), "prefetcht0 $src", []>; -def PREFETCHT1 : PSI<0x18, MRM2m, (outs), (ins i8mem:$src), "prefetcht1 $src", []>; -def PREFETCHT2 : PSI<0x18, MRM3m, (outs), (ins i8mem:$src), "prefetcht2 $src", []>; -def PREFETCHNTA : PSI<0x18, MRM0m, (outs), (ins i8mem:$src), "prefetchnta $src", []>; +def PREFETCHT0 : PSI<0x18, MRM1m, (outs), (ins i8mem:$src), "prefetcht0\t$src", []>; +def PREFETCHT1 : PSI<0x18, MRM2m, (outs), (ins i8mem:$src), "prefetcht1\t$src", []>; +def PREFETCHT2 : PSI<0x18, MRM3m, (outs), (ins i8mem:$src), "prefetcht2\t$src", []>; +def PREFETCHNTA : PSI<0x18, MRM0m, (outs), (ins i8mem:$src), "prefetchnta\t$src", []>; // Non-temporal stores def MOVNTPSmr : PSI<0x2B, MRMDestMem, (outs), (ins i128mem:$dst, VR128:$src), - "movntps {$src, $dst|$dst, $src}", + "movntps\t{$src, $dst|$dst, $src}", [(int_x86_sse_movnt_ps addr:$dst, VR128:$src)]>; // Load, store, and memory fence @@ -881,24 +881,24 @@ // MXCSR register def LDMXCSR : PSI<0xAE, MRM2m, (outs), (ins i32mem:$src), - "ldmxcsr $src", [(int_x86_sse_ldmxcsr addr:$src)]>; + "ldmxcsr\t$src", [(int_x86_sse_ldmxcsr addr:$src)]>; def STMXCSR : PSI<0xAE, MRM3m, (outs), (ins i32mem:$dst), - "stmxcsr $dst", [(int_x86_sse_stmxcsr addr:$dst)]>; + "stmxcsr\t$dst", [(int_x86_sse_stmxcsr addr:$dst)]>; // Alias instructions that map zero vector to pxor / xorp* for sse. // FIXME: remove when we can teach regalloc that xor reg, reg is ok. let isReMaterializable = 1 in def V_SET0 : PSI<0x57, MRMInitReg, (outs VR128:$dst), (ins), - "xorps $dst, $dst", + "xorps\t$dst, $dst", [(set VR128:$dst, (v4f32 immAllZerosV))]>; // FR32 to 128-bit vector conversion. def MOVSS2PSrr : SSI<0x10, MRMSrcReg, (outs VR128:$dst), (ins FR32:$src), - "movss {$src, $dst|$dst, $src}", + "movss\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (v4f32 (scalar_to_vector FR32:$src)))]>; def MOVSS2PSrm : SSI<0x10, MRMSrcMem, (outs VR128:$dst), (ins f32mem:$src), - "movss {$src, $dst|$dst, $src}", + "movss\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (v4f32 (scalar_to_vector (loadf32 addr:$src))))]>; @@ -908,11 +908,11 @@ // def : Pat<(f32 (vector_extract (v4f32 VR128:$src), (iPTR 0))), // (f32 FR32:$src)>; def MOVPS2SSrr : SSI<0x10, MRMSrcReg, (outs FR32:$dst), (ins VR128:$src), - "movss {$src, $dst|$dst, $src}", + "movss\t{$src, $dst|$dst, $src}", [(set FR32:$dst, (vector_extract (v4f32 VR128:$src), (iPTR 0)))]>; def MOVPS2SSmr : SSI<0x11, MRMDestMem, (outs), (ins f32mem:$dst, VR128:$src), - "movss {$src, $dst|$dst, $src}", + "movss\t{$src, $dst|$dst, $src}", [(store (f32 (vector_extract (v4f32 VR128:$src), (iPTR 0))), addr:$dst)]>; @@ -922,12 +922,12 @@ let isTwoAddress = 1 in { def MOVLSS2PSrr : SSI<0x10, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, FR32:$src2), - "movss {$src2, $dst|$dst, $src2}", []>; + "movss\t{$src2, $dst|$dst, $src2}", []>; let AddedComplexity = 15 in def MOVLPSrr : SSI<0x10, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), - "movss {$src2, $dst|$dst, $src2}", + "movss\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v4f32 (vector_shuffle VR128:$src1, VR128:$src2, MOVL_shuffle_mask)))]>; @@ -937,7 +937,7 @@ // Loading from memory automatically zeroing upper bits. let AddedComplexity = 20 in def MOVZSS2PSrm : SSI<0x10, MRMSrcMem, (outs VR128:$dst), (ins f32mem:$src), - "movss {$src, $dst|$dst, $src}", + "movss\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (v4f32 (vector_shuffle immAllZerosV, (v4f32 (scalar_to_vector (loadf32 addr:$src))), MOVL_shuffle_mask)))]>; @@ -963,60 +963,60 @@ // Move Instructions def MOVSDrr : SDI<0x10, MRMSrcReg, (outs FR64:$dst), (ins FR64:$src), - "movsd {$src, $dst|$dst, $src}", []>; + "movsd\t{$src, $dst|$dst, $src}", []>; def MOVSDrm : SDI<0x10, MRMSrcMem, (outs FR64:$dst), (ins f64mem:$src), - "movsd {$src, $dst|$dst, $src}", + "movsd\t{$src, $dst|$dst, $src}", [(set FR64:$dst, (loadf64 addr:$src))]>; def MOVSDmr : SDI<0x11, MRMDestMem, (outs), (ins f64mem:$dst, FR64:$src), - "movsd {$src, $dst|$dst, $src}", + "movsd\t{$src, $dst|$dst, $src}", [(store FR64:$src, addr:$dst)]>; // Conversion instructions def CVTTSD2SIrr : SDI<0x2C, MRMSrcReg, (outs GR32:$dst), (ins FR64:$src), - "cvttsd2si {$src, $dst|$dst, $src}", + "cvttsd2si\t{$src, $dst|$dst, $src}", [(set GR32:$dst, (fp_to_sint FR64:$src))]>; def CVTTSD2SIrm : SDI<0x2C, MRMSrcMem, (outs GR32:$dst), (ins f64mem:$src), - "cvttsd2si {$src, $dst|$dst, $src}", + "cvttsd2si\t{$src, $dst|$dst, $src}", [(set GR32:$dst, (fp_to_sint (loadf64 addr:$src)))]>; def CVTSD2SSrr : SDI<0x5A, MRMSrcReg, (outs FR32:$dst), (ins FR64:$src), - "cvtsd2ss {$src, $dst|$dst, $src}", + "cvtsd2ss\t{$src, $dst|$dst, $src}", [(set FR32:$dst, (fround FR64:$src))]>; def CVTSD2SSrm : SDI<0x5A, MRMSrcMem, (outs FR32:$dst), (ins f64mem:$src), - "cvtsd2ss {$src, $dst|$dst, $src}", + "cvtsd2ss\t{$src, $dst|$dst, $src}", [(set FR32:$dst, (fround (loadf64 addr:$src)))]>; def CVTSI2SDrr : SDI<0x2A, MRMSrcReg, (outs FR64:$dst), (ins GR32:$src), - "cvtsi2sd {$src, $dst|$dst, $src}", + "cvtsi2sd\t{$src, $dst|$dst, $src}", [(set FR64:$dst, (sint_to_fp GR32:$src))]>; def CVTSI2SDrm : SDI<0x2A, MRMSrcMem, (outs FR64:$dst), (ins i32mem:$src), - "cvtsi2sd {$src, $dst|$dst, $src}", + "cvtsi2sd\t{$src, $dst|$dst, $src}", [(set FR64:$dst, (sint_to_fp (loadi32 addr:$src)))]>; // SSE2 instructions with XS prefix def CVTSS2SDrr : I<0x5A, MRMSrcReg, (outs FR64:$dst), (ins FR32:$src), - "cvtss2sd {$src, $dst|$dst, $src}", + "cvtss2sd\t{$src, $dst|$dst, $src}", [(set FR64:$dst, (fextend FR32:$src))]>, XS, Requires<[HasSSE2]>; def CVTSS2SDrm : I<0x5A, MRMSrcMem, (outs FR64:$dst), (ins f32mem:$src), - "cvtss2sd {$src, $dst|$dst, $src}", + "cvtss2sd\t{$src, $dst|$dst, $src}", [(set FR64:$dst, (extloadf32 addr:$src))]>, XS, Requires<[HasSSE2]>; // Match intrinsics which expect XMM operand(s). def Int_CVTSD2SIrr : SDI<0x2D, MRMSrcReg, (outs GR32:$dst), (ins VR128:$src), - "cvtsd2si {$src, $dst|$dst, $src}", + "cvtsd2si\t{$src, $dst|$dst, $src}", [(set GR32:$dst, (int_x86_sse2_cvtsd2si VR128:$src))]>; def Int_CVTSD2SIrm : SDI<0x2D, MRMSrcMem, (outs GR32:$dst), (ins f128mem:$src), - "cvtsd2si {$src, $dst|$dst, $src}", + "cvtsd2si\t{$src, $dst|$dst, $src}", [(set GR32:$dst, (int_x86_sse2_cvtsd2si (load addr:$src)))]>; // Aliases for intrinsics def Int_CVTTSD2SIrr : SDI<0x2C, MRMSrcReg, (outs GR32:$dst), (ins VR128:$src), - "cvttsd2si {$src, $dst|$dst, $src}", + "cvttsd2si\t{$src, $dst|$dst, $src}", [(set GR32:$dst, (int_x86_sse2_cvttsd2si VR128:$src))]>; def Int_CVTTSD2SIrm : SDI<0x2C, MRMSrcMem, (outs GR32:$dst), (ins f128mem:$src), - "cvttsd2si {$src, $dst|$dst, $src}", + "cvttsd2si\t{$src, $dst|$dst, $src}", [(set GR32:$dst, (int_x86_sse2_cvttsd2si (load addr:$src)))]>; @@ -1024,45 +1024,45 @@ let isTwoAddress = 1 in { def CMPSDrr : SDI<0xC2, MRMSrcReg, (outs FR64:$dst), (ins FR64:$src1, FR64:$src, SSECC:$cc), - "cmp${cc}sd {$src, $dst|$dst, $src}", []>; + "cmp${cc}sd\t{$src, $dst|$dst, $src}", []>; def CMPSDrm : SDI<0xC2, MRMSrcMem, (outs FR64:$dst), (ins FR64:$src1, f64mem:$src, SSECC:$cc), - "cmp${cc}sd {$src, $dst|$dst, $src}", []>; + "cmp${cc}sd\t{$src, $dst|$dst, $src}", []>; } def UCOMISDrr: PDI<0x2E, MRMSrcReg, (outs), (ins FR64:$src1, FR64:$src2), - "ucomisd {$src2, $src1|$src1, $src2}", + "ucomisd\t{$src2, $src1|$src1, $src2}", [(X86cmp FR64:$src1, FR64:$src2)]>; def UCOMISDrm: PDI<0x2E, MRMSrcMem, (outs), (ins FR64:$src1, f64mem:$src2), - "ucomisd {$src2, $src1|$src1, $src2}", + "ucomisd\t{$src2, $src1|$src1, $src2}", [(X86cmp FR64:$src1, (loadf64 addr:$src2))]>; // Aliases to match intrinsics which expect XMM operand(s). let isTwoAddress = 1 in { def Int_CMPSDrr : SDI<0xC2, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src, SSECC:$cc), - "cmp${cc}sd {$src, $dst|$dst, $src}", + "cmp${cc}sd\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse2_cmp_sd VR128:$src1, VR128:$src, imm:$cc))]>; def Int_CMPSDrm : SDI<0xC2, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, f64mem:$src, SSECC:$cc), - "cmp${cc}sd {$src, $dst|$dst, $src}", + "cmp${cc}sd\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse2_cmp_sd VR128:$src1, (load addr:$src), imm:$cc))]>; } def Int_UCOMISDrr: PDI<0x2E, MRMSrcReg, (outs), (ins VR128:$src1, VR128:$src2), - "ucomisd {$src2, $src1|$src1, $src2}", + "ucomisd\t{$src2, $src1|$src1, $src2}", [(X86ucomi (v2f64 VR128:$src1), (v2f64 VR128:$src2))]>; def Int_UCOMISDrm: PDI<0x2E, MRMSrcMem, (outs), (ins VR128:$src1, f128mem:$src2), - "ucomisd {$src2, $src1|$src1, $src2}", + "ucomisd\t{$src2, $src1|$src1, $src2}", [(X86ucomi (v2f64 VR128:$src1), (load addr:$src2))]>; def Int_COMISDrr: PDI<0x2F, MRMSrcReg, (outs), (ins VR128:$src1, VR128:$src2), - "comisd {$src2, $src1|$src1, $src2}", + "comisd\t{$src2, $src1|$src1, $src2}", [(X86comi (v2f64 VR128:$src1), (v2f64 VR128:$src2))]>; def Int_COMISDrm: PDI<0x2F, MRMSrcMem, (outs), (ins VR128:$src1, f128mem:$src2), - "comisd {$src2, $src1|$src1, $src2}", + "comisd\t{$src2, $src1|$src1, $src2}", [(X86comi (v2f64 VR128:$src1), (load addr:$src2))]>; // Aliases of packed SSE2 instructions for scalar use. These all have names that @@ -1070,53 +1070,53 @@ // Alias instructions that map fld0 to pxor for sse. def FsFLD0SD : I<0xEF, MRMInitReg, (outs FR64:$dst), (ins), - "pxor $dst, $dst", [(set FR64:$dst, fpimm0)]>, + "pxor\t$dst, $dst", [(set FR64:$dst, fpimm0)]>, Requires<[HasSSE2]>, TB, OpSize; // Alias instruction to do FR64 reg-to-reg copy using movapd. Upper bits are // disregarded. def FsMOVAPDrr : PDI<0x28, MRMSrcReg, (outs FR64:$dst), (ins FR64:$src), - "movapd {$src, $dst|$dst, $src}", []>; + "movapd\t{$src, $dst|$dst, $src}", []>; // Alias instruction to load FR64 from f128mem using movapd. Upper bits are // disregarded. def FsMOVAPDrm : PDI<0x28, MRMSrcMem, (outs FR64:$dst), (ins f128mem:$src), - "movapd {$src, $dst|$dst, $src}", + "movapd\t{$src, $dst|$dst, $src}", [(set FR64:$dst, (alignedloadfsf64 addr:$src))]>; // Alias bitwise logical operations using SSE logical ops on packed FP values. let isTwoAddress = 1 in { let isCommutable = 1 in { def FsANDPDrr : PDI<0x54, MRMSrcReg, (outs FR64:$dst), (ins FR64:$src1, FR64:$src2), - "andpd {$src2, $dst|$dst, $src2}", + "andpd\t{$src2, $dst|$dst, $src2}", [(set FR64:$dst, (X86fand FR64:$src1, FR64:$src2))]>; def FsORPDrr : PDI<0x56, MRMSrcReg, (outs FR64:$dst), (ins FR64:$src1, FR64:$src2), - "orpd {$src2, $dst|$dst, $src2}", + "orpd\t{$src2, $dst|$dst, $src2}", [(set FR64:$dst, (X86for FR64:$src1, FR64:$src2))]>; def FsXORPDrr : PDI<0x57, MRMSrcReg, (outs FR64:$dst), (ins FR64:$src1, FR64:$src2), - "xorpd {$src2, $dst|$dst, $src2}", + "xorpd\t{$src2, $dst|$dst, $src2}", [(set FR64:$dst, (X86fxor FR64:$src1, FR64:$src2))]>; } def FsANDPDrm : PDI<0x54, MRMSrcMem, (outs FR64:$dst), (ins FR64:$src1, f128mem:$src2), - "andpd {$src2, $dst|$dst, $src2}", + "andpd\t{$src2, $dst|$dst, $src2}", [(set FR64:$dst, (X86fand FR64:$src1, (memopfsf64 addr:$src2)))]>; def FsORPDrm : PDI<0x56, MRMSrcMem, (outs FR64:$dst), (ins FR64:$src1, f128mem:$src2), - "orpd {$src2, $dst|$dst, $src2}", + "orpd\t{$src2, $dst|$dst, $src2}", [(set FR64:$dst, (X86for FR64:$src1, (memopfsf64 addr:$src2)))]>; def FsXORPDrm : PDI<0x57, MRMSrcMem, (outs FR64:$dst), (ins FR64:$src1, f128mem:$src2), - "xorpd {$src2, $dst|$dst, $src2}", + "xorpd\t{$src2, $dst|$dst, $src2}", [(set FR64:$dst, (X86fxor FR64:$src1, (memopfsf64 addr:$src2)))]>; def FsANDNPDrr : PDI<0x55, MRMSrcReg, (outs FR64:$dst), (ins FR64:$src1, FR64:$src2), - "andnpd {$src2, $dst|$dst, $src2}", []>; + "andnpd\t{$src2, $dst|$dst, $src2}", []>; def FsANDNPDrm : PDI<0x55, MRMSrcMem, (outs FR64:$dst), (ins FR64:$src1, f128mem:$src2), - "andnpd {$src2, $dst|$dst, $src2}", []>; + "andnpd\t{$src2, $dst|$dst, $src2}", []>; } /// basic_sse2_fp_binop_rm - SSE2 binops come in both scalar and vector forms. @@ -1135,38 +1135,38 @@ bit Commutable = 0> { // Scalar operation, reg+reg. def SDrr : SDI { let isCommutable = Commutable; } // Scalar operation, reg+mem. def SDrm : SDI; // Vector operation, reg+reg. def PDrr : PDI { let isCommutable = Commutable; } // Vector operation, reg+mem. def PDrm : PDI; // Intrinsic operation, reg+reg. def SDrr_Int : SDI { let isCommutable = Commutable; } // Intrinsic operation, reg+mem. def SDrm_Int : SDI; } @@ -1196,51 +1196,51 @@ // Scalar operation, reg+reg. def SDrr : SDI { let isCommutable = Commutable; } // Scalar operation, reg+mem. def SDrm : SDI; // Vector operation, reg+reg. def PDrr : PDI { let isCommutable = Commutable; } // Vector operation, reg+mem. def PDrm : PDI; // Intrinsic operation, reg+reg. def SDrr_Int : SDI { let isCommutable = Commutable; } // Intrinsic operation, reg+mem. def SDrm_Int : SDI; // Vector intrinsic operation, reg+reg. def PDrr_Int : PDI { let isCommutable = Commutable; } // Vector intrinsic operation, reg+mem. def PDrm_Int : PDI; } } @@ -1255,44 +1255,44 @@ // Move Instructions def MOVAPDrr : PDI<0x28, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src), - "movapd {$src, $dst|$dst, $src}", []>; + "movapd\t{$src, $dst|$dst, $src}", []>; def MOVAPDrm : PDI<0x28, MRMSrcMem, (outs VR128:$dst), (ins f128mem:$src), - "movapd {$src, $dst|$dst, $src}", + "movapd\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (alignedloadv2f64 addr:$src))]>; def MOVAPDmr : PDI<0x29, MRMDestMem, (outs), (ins f128mem:$dst, VR128:$src), - "movapd {$src, $dst|$dst, $src}", + "movapd\t{$src, $dst|$dst, $src}", [(alignedstore (v2f64 VR128:$src), addr:$dst)]>; def MOVUPDrr : PDI<0x10, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src), - "movupd {$src, $dst|$dst, $src}", []>; + "movupd\t{$src, $dst|$dst, $src}", []>; def MOVUPDrm : PDI<0x10, MRMSrcMem, (outs VR128:$dst), (ins f128mem:$src), - "movupd {$src, $dst|$dst, $src}", + "movupd\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (loadv2f64 addr:$src))]>; def MOVUPDmr : PDI<0x11, MRMDestMem, (outs), (ins f128mem:$dst, VR128:$src), - "movupd {$src, $dst|$dst, $src}", + "movupd\t{$src, $dst|$dst, $src}", [(store (v2f64 VR128:$src), addr:$dst)]>; // Intrinsic forms of MOVUPD load and store def MOVUPDrm_Int : PDI<0x10, MRMSrcMem, (outs VR128:$dst), (ins f128mem:$src), - "movupd {$src, $dst|$dst, $src}", + "movupd\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse2_loadu_pd addr:$src))]>; def MOVUPDmr_Int : PDI<0x11, MRMDestMem, (outs), (ins f128mem:$dst, VR128:$src), - "movupd {$src, $dst|$dst, $src}", + "movupd\t{$src, $dst|$dst, $src}", [(int_x86_sse2_storeu_pd addr:$dst, VR128:$src)]>; let isTwoAddress = 1 in { let AddedComplexity = 20 in { def MOVLPDrm : PDI<0x12, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, f64mem:$src2), - "movlpd {$src2, $dst|$dst, $src2}", + "movlpd\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v2f64 (vector_shuffle VR128:$src1, (scalar_to_vector (loadf64 addr:$src2)), MOVLP_shuffle_mask)))]>; def MOVHPDrm : PDI<0x16, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, f64mem:$src2), - "movhpd {$src2, $dst|$dst, $src2}", + "movhpd\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v2f64 (vector_shuffle VR128:$src1, (scalar_to_vector (loadf64 addr:$src2)), @@ -1301,14 +1301,14 @@ } // isTwoAddress def MOVLPDmr : PDI<0x13, MRMDestMem, (outs), (ins f64mem:$dst, VR128:$src), - "movlpd {$src, $dst|$dst, $src}", + "movlpd\t{$src, $dst|$dst, $src}", [(store (f64 (vector_extract (v2f64 VR128:$src), (iPTR 0))), addr:$dst)]>; // v2f64 extract element 1 is always custom lowered to unpack high to low // and extract element 0 so the non-store version isn't too horrible. def MOVHPDmr : PDI<0x17, MRMDestMem, (outs), (ins f64mem:$dst, VR128:$src), - "movhpd {$src, $dst|$dst, $src}", + "movhpd\t{$src, $dst|$dst, $src}", [(store (f64 (vector_extract (v2f64 (vector_shuffle VR128:$src, (undef), UNPCKH_shuffle_mask)), (iPTR 0))), @@ -1316,79 +1316,79 @@ // SSE2 instructions without OpSize prefix def Int_CVTDQ2PSrr : I<0x5B, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src), - "cvtdq2ps {$src, $dst|$dst, $src}", + "cvtdq2ps\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse2_cvtdq2ps VR128:$src))]>, TB, Requires<[HasSSE2]>; def Int_CVTDQ2PSrm : I<0x5B, MRMSrcMem, (outs VR128:$dst), (ins i128mem:$src), - "cvtdq2ps {$src, $dst|$dst, $src}", + "cvtdq2ps\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse2_cvtdq2ps (bitconvert (memopv2i64 addr:$src))))]>, TB, Requires<[HasSSE2]>; // SSE2 instructions with XS prefix def Int_CVTDQ2PDrr : I<0xE6, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src), - "cvtdq2pd {$src, $dst|$dst, $src}", + "cvtdq2pd\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse2_cvtdq2pd VR128:$src))]>, XS, Requires<[HasSSE2]>; def Int_CVTDQ2PDrm : I<0xE6, MRMSrcMem, (outs VR128:$dst), (ins i64mem:$src), - "cvtdq2pd {$src, $dst|$dst, $src}", + "cvtdq2pd\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse2_cvtdq2pd (bitconvert (memopv2i64 addr:$src))))]>, XS, Requires<[HasSSE2]>; def Int_CVTPS2DQrr : PDI<0x5B, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src), - "cvtps2dq {$src, $dst|$dst, $src}", + "cvtps2dq\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse2_cvtps2dq VR128:$src))]>; def Int_CVTPS2DQrm : PDI<0x5B, MRMSrcMem, (outs VR128:$dst), (ins f128mem:$src), - "cvtps2dq {$src, $dst|$dst, $src}", + "cvtps2dq\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse2_cvtps2dq (load addr:$src)))]>; // SSE2 packed instructions with XS prefix def Int_CVTTPS2DQrr : I<0x5B, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src), - "cvttps2dq {$src, $dst|$dst, $src}", + "cvttps2dq\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse2_cvttps2dq VR128:$src))]>, XS, Requires<[HasSSE2]>; def Int_CVTTPS2DQrm : I<0x5B, MRMSrcMem, (outs VR128:$dst), (ins f128mem:$src), - "cvttps2dq {$src, $dst|$dst, $src}", + "cvttps2dq\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse2_cvttps2dq (load addr:$src)))]>, XS, Requires<[HasSSE2]>; // SSE2 packed instructions with XD prefix def Int_CVTPD2DQrr : I<0xE6, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src), - "cvtpd2dq {$src, $dst|$dst, $src}", + "cvtpd2dq\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse2_cvtpd2dq VR128:$src))]>, XD, Requires<[HasSSE2]>; def Int_CVTPD2DQrm : I<0xE6, MRMSrcMem, (outs VR128:$dst), (ins f128mem:$src), - "cvtpd2dq {$src, $dst|$dst, $src}", + "cvtpd2dq\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse2_cvtpd2dq (load addr:$src)))]>, XD, Requires<[HasSSE2]>; def Int_CVTTPD2DQrr : PDI<0xE6, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src), - "cvttpd2dq {$src, $dst|$dst, $src}", + "cvttpd2dq\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse2_cvttpd2dq VR128:$src))]>; def Int_CVTTPD2DQrm : PDI<0xE6, MRMSrcMem, (outs VR128:$dst), (ins f128mem:$src), - "cvttpd2dq {$src, $dst|$dst, $src}", + "cvttpd2dq\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse2_cvttpd2dq (load addr:$src)))]>; // SSE2 instructions without OpSize prefix def Int_CVTPS2PDrr : I<0x5A, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src), - "cvtps2pd {$src, $dst|$dst, $src}", + "cvtps2pd\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse2_cvtps2pd VR128:$src))]>, TB, Requires<[HasSSE2]>; def Int_CVTPS2PDrm : I<0x5A, MRMSrcReg, (outs VR128:$dst), (ins f64mem:$src), - "cvtps2pd {$src, $dst|$dst, $src}", + "cvtps2pd\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse2_cvtps2pd (load addr:$src)))]>, TB, Requires<[HasSSE2]>; def Int_CVTPD2PSrr : PDI<0x5A, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src), - "cvtpd2ps {$src, $dst|$dst, $src}", + "cvtpd2ps\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse2_cvtpd2ps VR128:$src))]>; def Int_CVTPD2PSrm : PDI<0x5A, MRMSrcReg, (outs VR128:$dst), (ins f128mem:$src), - "cvtpd2ps {$src, $dst|$dst, $src}", + "cvtpd2ps\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse2_cvtpd2ps (load addr:$src)))]>; @@ -1397,33 +1397,33 @@ let isTwoAddress = 1 in { def Int_CVTSI2SDrr: SDI<0x2A, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, GR32:$src2), - "cvtsi2sd {$src2, $dst|$dst, $src2}", + "cvtsi2sd\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (int_x86_sse2_cvtsi2sd VR128:$src1, GR32:$src2))]>; def Int_CVTSI2SDrm: SDI<0x2A, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, i32mem:$src2), - "cvtsi2sd {$src2, $dst|$dst, $src2}", + "cvtsi2sd\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (int_x86_sse2_cvtsi2sd VR128:$src1, (loadi32 addr:$src2)))]>; def Int_CVTSD2SSrr: SDI<0x5A, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), - "cvtsd2ss {$src2, $dst|$dst, $src2}", + "cvtsd2ss\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (int_x86_sse2_cvtsd2ss VR128:$src1, VR128:$src2))]>; def Int_CVTSD2SSrm: SDI<0x5A, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, f64mem:$src2), - "cvtsd2ss {$src2, $dst|$dst, $src2}", + "cvtsd2ss\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (int_x86_sse2_cvtsd2ss VR128:$src1, (load addr:$src2)))]>; def Int_CVTSS2SDrr: I<0x5A, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), - "cvtss2sd {$src2, $dst|$dst, $src2}", + "cvtss2sd\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (int_x86_sse2_cvtss2sd VR128:$src1, VR128:$src2))]>, XS, Requires<[HasSSE2]>; def Int_CVTSS2SDrm: I<0x5A, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, f32mem:$src2), - "cvtss2sd {$src2, $dst|$dst, $src2}", + "cvtss2sd\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (int_x86_sse2_cvtss2sd VR128:$src1, (load addr:$src2)))]>, XS, Requires<[HasSSE2]>; @@ -1450,50 +1450,50 @@ bit Commutable = 0> { // Scalar operation, reg. def SDr : SDI { let isCommutable = Commutable; } // Scalar operation, mem. def SDm : SDI; // Vector operation, reg. def PDr : PDI { let isCommutable = Commutable; } // Vector operation, mem. def PDm : PDI; // Intrinsic operation, reg. def SDr_Int : SDI { let isCommutable = Commutable; } // Intrinsic operation, mem. def SDm_Int : SDI; // Vector intrinsic operation, reg def PDr_Int : PDI { let isCommutable = Commutable; } // Vector intrinsic operation, mem def PDm_Int : PDI; } @@ -1508,19 +1508,19 @@ let isCommutable = 1 in { def ANDPDrr : PDI<0x54, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), - "andpd {$src2, $dst|$dst, $src2}", + "andpd\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (and (bc_v2i64 (v2f64 VR128:$src1)), (bc_v2i64 (v2f64 VR128:$src2))))]>; def ORPDrr : PDI<0x56, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), - "orpd {$src2, $dst|$dst, $src2}", + "orpd\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (or (bc_v2i64 (v2f64 VR128:$src1)), (bc_v2i64 (v2f64 VR128:$src2))))]>; def XORPDrr : PDI<0x57, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), - "xorpd {$src2, $dst|$dst, $src2}", + "xorpd\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (xor (bc_v2i64 (v2f64 VR128:$src1)), (bc_v2i64 (v2f64 VR128:$src2))))]>; @@ -1528,31 +1528,31 @@ def ANDPDrm : PDI<0x54, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, f128mem:$src2), - "andpd {$src2, $dst|$dst, $src2}", + "andpd\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (and (bc_v2i64 (v2f64 VR128:$src1)), (memopv2i64 addr:$src2)))]>; def ORPDrm : PDI<0x56, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, f128mem:$src2), - "orpd {$src2, $dst|$dst, $src2}", + "orpd\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (or (bc_v2i64 (v2f64 VR128:$src1)), (memopv2i64 addr:$src2)))]>; def XORPDrm : PDI<0x57, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, f128mem:$src2), - "xorpd {$src2, $dst|$dst, $src2}", + "xorpd\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (xor (bc_v2i64 (v2f64 VR128:$src1)), (memopv2i64 addr:$src2)))]>; def ANDNPDrr : PDI<0x55, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), - "andnpd {$src2, $dst|$dst, $src2}", + "andnpd\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (and (vnot (bc_v2i64 (v2f64 VR128:$src1))), (bc_v2i64 (v2f64 VR128:$src2))))]>; def ANDNPDrm : PDI<0x55, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1,f128mem:$src2), - "andnpd {$src2, $dst|$dst, $src2}", + "andnpd\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (and (vnot (bc_v2i64 (v2f64 VR128:$src1))), (memopv2i64 addr:$src2)))]>; @@ -1561,12 +1561,12 @@ let isTwoAddress = 1 in { def CMPPDrri : PDIi8<0xC2, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src, SSECC:$cc), - "cmp${cc}pd {$src, $dst|$dst, $src}", + "cmp${cc}pd\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse2_cmp_pd VR128:$src1, VR128:$src, imm:$cc))]>; def CMPPDrmi : PDIi8<0xC2, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, f128mem:$src, SSECC:$cc), - "cmp${cc}pd {$src, $dst|$dst, $src}", + "cmp${cc}pd\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse2_cmp_pd VR128:$src1, (load addr:$src), imm:$cc))]>; } @@ -1575,14 +1575,14 @@ let isTwoAddress = 1 in { def SHUFPDrri : PDIi8<0xC6, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2, i8imm:$src3), - "shufpd {$src3, $src2, $dst|$dst, $src2, $src3}", + "shufpd\t{$src3, $src2, $dst|$dst, $src2, $src3}", [(set VR128:$dst, (v2f64 (vector_shuffle VR128:$src1, VR128:$src2, SHUFP_shuffle_mask:$src3)))]>; def SHUFPDrmi : PDIi8<0xC6, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, f128mem:$src2, i8imm:$src3), - "shufpd {$src3, $src2, $dst|$dst, $src2, $src3}", + "shufpd\t{$src3, $src2, $dst|$dst, $src2, $src3}", [(set VR128:$dst, (v2f64 (vector_shuffle VR128:$src1, (load addr:$src2), @@ -1591,14 +1591,14 @@ let AddedComplexity = 10 in { def UNPCKHPDrr : PDI<0x15, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), - "unpckhpd {$src2, $dst|$dst, $src2}", + "unpckhpd\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v2f64 (vector_shuffle VR128:$src1, VR128:$src2, UNPCKH_shuffle_mask)))]>; def UNPCKHPDrm : PDI<0x15, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, f128mem:$src2), - "unpckhpd {$src2, $dst|$dst, $src2}", + "unpckhpd\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v2f64 (vector_shuffle VR128:$src1, (load addr:$src2), @@ -1606,14 +1606,14 @@ def UNPCKLPDrr : PDI<0x14, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), - "unpcklpd {$src2, $dst|$dst, $src2}", + "unpcklpd\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v2f64 (vector_shuffle VR128:$src1, VR128:$src2, UNPCKL_shuffle_mask)))]>; def UNPCKLPDrm : PDI<0x14, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, f128mem:$src2), - "unpcklpd {$src2, $dst|$dst, $src2}", + "unpcklpd\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v2f64 (vector_shuffle VR128:$src1, (load addr:$src2), @@ -1627,29 +1627,29 @@ // Move Instructions def MOVDQArr : PDI<0x6F, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src), - "movdqa {$src, $dst|$dst, $src}", []>; + "movdqa\t{$src, $dst|$dst, $src}", []>; def MOVDQArm : PDI<0x6F, MRMSrcMem, (outs VR128:$dst), (ins i128mem:$src), - "movdqa {$src, $dst|$dst, $src}", + "movdqa\t{$src, $dst|$dst, $src}", [/*(set VR128:$dst, (alignedloadv2i64 addr:$src))*/]>; def MOVDQAmr : PDI<0x7F, MRMDestMem, (outs), (ins i128mem:$dst, VR128:$src), - "movdqa {$src, $dst|$dst, $src}", + "movdqa\t{$src, $dst|$dst, $src}", [/*(alignedstore (v2i64 VR128:$src), addr:$dst)*/]>; def MOVDQUrm : I<0x6F, MRMSrcMem, (outs VR128:$dst), (ins i128mem:$src), - "movdqu {$src, $dst|$dst, $src}", + "movdqu\t{$src, $dst|$dst, $src}", [/*(set VR128:$dst, (loadv2i64 addr:$src))*/]>, XS, Requires<[HasSSE2]>; def MOVDQUmr : I<0x7F, MRMDestMem, (outs), (ins i128mem:$dst, VR128:$src), - "movdqu {$src, $dst|$dst, $src}", + "movdqu\t{$src, $dst|$dst, $src}", [/*(store (v2i64 VR128:$src), addr:$dst)*/]>, XS, Requires<[HasSSE2]>; // Intrinsic forms of MOVDQU load and store def MOVDQUrm_Int : I<0x6F, MRMSrcMem, (outs VR128:$dst), (ins i128mem:$src), - "movdqu {$src, $dst|$dst, $src}", + "movdqu\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse2_loadu_dq addr:$src))]>, XS, Requires<[HasSSE2]>; def MOVDQUmr_Int : I<0x7F, MRMDestMem, (outs), (ins i128mem:$dst, VR128:$src), - "movdqu {$src, $dst|$dst, $src}", + "movdqu\t{$src, $dst|$dst, $src}", [(int_x86_sse2_storeu_dq addr:$dst, VR128:$src)]>, XS, Requires<[HasSSE2]>; @@ -1658,12 +1658,12 @@ multiclass PDI_binop_rm_int opc, string OpcodeStr, Intrinsic IntId, bit Commutable = 0> { def rr : PDI { let isCommutable = Commutable; } def rm : PDI; } @@ -1671,14 +1671,14 @@ multiclass PDI_binop_rmi_int opc, bits<8> opc2, Format ImmForm, string OpcodeStr, Intrinsic IntId> { def rr : PDI; def rm : PDI; def ri : PDIi8; } @@ -1688,12 +1688,12 @@ multiclass PDI_binop_rm opc, string OpcodeStr, SDNode OpNode, ValueType OpVT, bit Commutable = 0> { def rr : PDI { let isCommutable = Commutable; } def rm : PDI; } @@ -1706,12 +1706,12 @@ multiclass PDI_binop_rm_v2i64 opc, string OpcodeStr, SDNode OpNode, bit Commutable = 0> { def rr : PDI { let isCommutable = Commutable; } def rm : PDI; } @@ -1774,10 +1774,10 @@ let isTwoAddress = 1 in { def PSLLDQri : PDIi8<0x73, MRM7r, (outs VR128:$dst), (ins VR128:$src1, i32i8imm:$src2), - "pslldq {$src2, $dst|$dst, $src2}", []>; + "pslldq\t{$src2, $dst|$dst, $src2}", []>; def PSRLDQri : PDIi8<0x73, MRM3r, (outs VR128:$dst), (ins VR128:$src1, i32i8imm:$src2), - "psrldq {$src2, $dst|$dst, $src2}", []>; + "psrldq\t{$src2, $dst|$dst, $src2}", []>; // PSRADQri doesn't exist in SSE[1-3]. } @@ -1798,13 +1798,13 @@ let isTwoAddress = 1 in { def PANDNrr : PDI<0xDF, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), - "pandn {$src2, $dst|$dst, $src2}", + "pandn\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v2i64 (and (vnot VR128:$src1), VR128:$src2)))]>; def PANDNrm : PDI<0xDF, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, i128mem:$src2), - "pandn {$src2, $dst|$dst, $src2}", + "pandn\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v2i64 (and (vnot VR128:$src1), (load addr:$src2))))]>; } @@ -1825,13 +1825,13 @@ // Shuffle and unpack instructions def PSHUFDri : PDIi8<0x70, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, i8imm:$src2), - "pshufd {$src2, $src1, $dst|$dst, $src1, $src2}", + "pshufd\t{$src2, $src1, $dst|$dst, $src1, $src2}", [(set VR128:$dst, (v4i32 (vector_shuffle VR128:$src1, (undef), PSHUFD_shuffle_mask:$src2)))]>; def PSHUFDmi : PDIi8<0x70, MRMSrcMem, (outs VR128:$dst), (ins i128mem:$src1, i8imm:$src2), - "pshufd {$src2, $src1, $dst|$dst, $src1, $src2}", + "pshufd\t{$src2, $src1, $dst|$dst, $src1, $src2}", [(set VR128:$dst, (v4i32 (vector_shuffle (bc_v4i32(memopv2i64 addr:$src1)), (undef), @@ -1840,14 +1840,14 @@ // SSE2 with ImmT == Imm8 and XS prefix. def PSHUFHWri : Ii8<0x70, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, i8imm:$src2), - "pshufhw {$src2, $src1, $dst|$dst, $src1, $src2}", + "pshufhw\t{$src2, $src1, $dst|$dst, $src1, $src2}", [(set VR128:$dst, (v8i16 (vector_shuffle VR128:$src1, (undef), PSHUFHW_shuffle_mask:$src2)))]>, XS, Requires<[HasSSE2]>; def PSHUFHWmi : Ii8<0x70, MRMSrcMem, (outs VR128:$dst), (ins i128mem:$src1, i8imm:$src2), - "pshufhw {$src2, $src1, $dst|$dst, $src1, $src2}", + "pshufhw\t{$src2, $src1, $dst|$dst, $src1, $src2}", [(set VR128:$dst, (v8i16 (vector_shuffle (bc_v8i16 (memopv2i64 addr:$src1)), (undef), @@ -1857,14 +1857,14 @@ // SSE2 with ImmT == Imm8 and XD prefix. def PSHUFLWri : Ii8<0x70, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, i32i8imm:$src2), - "pshuflw {$src2, $src1, $dst|$dst, $src1, $src2}", + "pshuflw\t{$src2, $src1, $dst|$dst, $src1, $src2}", [(set VR128:$dst, (v8i16 (vector_shuffle VR128:$src1, (undef), PSHUFLW_shuffle_mask:$src2)))]>, XD, Requires<[HasSSE2]>; def PSHUFLWmi : Ii8<0x70, MRMSrcMem, (outs VR128:$dst), (ins i128mem:$src1, i32i8imm:$src2), - "pshuflw {$src2, $src1, $dst|$dst, $src1, $src2}", + "pshuflw\t{$src2, $src1, $dst|$dst, $src1, $src2}", [(set VR128:$dst, (v8i16 (vector_shuffle (bc_v8i16 (memopv2i64 addr:$src1)), (undef), @@ -1875,52 +1875,52 @@ let isTwoAddress = 1 in { def PUNPCKLBWrr : PDI<0x60, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), - "punpcklbw {$src2, $dst|$dst, $src2}", + "punpcklbw\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v16i8 (vector_shuffle VR128:$src1, VR128:$src2, UNPCKL_shuffle_mask)))]>; def PUNPCKLBWrm : PDI<0x60, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, i128mem:$src2), - "punpcklbw {$src2, $dst|$dst, $src2}", + "punpcklbw\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v16i8 (vector_shuffle VR128:$src1, (bc_v16i8 (memopv2i64 addr:$src2)), UNPCKL_shuffle_mask)))]>; def PUNPCKLWDrr : PDI<0x61, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), - "punpcklwd {$src2, $dst|$dst, $src2}", + "punpcklwd\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v8i16 (vector_shuffle VR128:$src1, VR128:$src2, UNPCKL_shuffle_mask)))]>; def PUNPCKLWDrm : PDI<0x61, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, i128mem:$src2), - "punpcklwd {$src2, $dst|$dst, $src2}", + "punpcklwd\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v8i16 (vector_shuffle VR128:$src1, (bc_v8i16 (memopv2i64 addr:$src2)), UNPCKL_shuffle_mask)))]>; def PUNPCKLDQrr : PDI<0x62, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), - "punpckldq {$src2, $dst|$dst, $src2}", + "punpckldq\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v4i32 (vector_shuffle VR128:$src1, VR128:$src2, UNPCKL_shuffle_mask)))]>; def PUNPCKLDQrm : PDI<0x62, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, i128mem:$src2), - "punpckldq {$src2, $dst|$dst, $src2}", + "punpckldq\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v4i32 (vector_shuffle VR128:$src1, (bc_v4i32 (memopv2i64 addr:$src2)), UNPCKL_shuffle_mask)))]>; def PUNPCKLQDQrr : PDI<0x6C, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), - "punpcklqdq {$src2, $dst|$dst, $src2}", + "punpcklqdq\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v2i64 (vector_shuffle VR128:$src1, VR128:$src2, UNPCKL_shuffle_mask)))]>; def PUNPCKLQDQrm : PDI<0x6C, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, i128mem:$src2), - "punpcklqdq {$src2, $dst|$dst, $src2}", + "punpcklqdq\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v2i64 (vector_shuffle VR128:$src1, (memopv2i64 addr:$src2), @@ -1928,52 +1928,52 @@ def PUNPCKHBWrr : PDI<0x68, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), - "punpckhbw {$src2, $dst|$dst, $src2}", + "punpckhbw\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v16i8 (vector_shuffle VR128:$src1, VR128:$src2, UNPCKH_shuffle_mask)))]>; def PUNPCKHBWrm : PDI<0x68, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, i128mem:$src2), - "punpckhbw {$src2, $dst|$dst, $src2}", + "punpckhbw\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v16i8 (vector_shuffle VR128:$src1, (bc_v16i8 (memopv2i64 addr:$src2)), UNPCKH_shuffle_mask)))]>; def PUNPCKHWDrr : PDI<0x69, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), - "punpckhwd {$src2, $dst|$dst, $src2}", + "punpckhwd\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v8i16 (vector_shuffle VR128:$src1, VR128:$src2, UNPCKH_shuffle_mask)))]>; def PUNPCKHWDrm : PDI<0x69, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, i128mem:$src2), - "punpckhwd {$src2, $dst|$dst, $src2}", + "punpckhwd\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v8i16 (vector_shuffle VR128:$src1, (bc_v8i16 (memopv2i64 addr:$src2)), UNPCKH_shuffle_mask)))]>; def PUNPCKHDQrr : PDI<0x6A, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), - "punpckhdq {$src2, $dst|$dst, $src2}", + "punpckhdq\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v4i32 (vector_shuffle VR128:$src1, VR128:$src2, UNPCKH_shuffle_mask)))]>; def PUNPCKHDQrm : PDI<0x6A, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, i128mem:$src2), - "punpckhdq {$src2, $dst|$dst, $src2}", + "punpckhdq\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v4i32 (vector_shuffle VR128:$src1, (bc_v4i32 (memopv2i64 addr:$src2)), UNPCKH_shuffle_mask)))]>; def PUNPCKHQDQrr : PDI<0x6D, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), - "punpckhqdq {$src2, $dst|$dst, $src2}", + "punpckhqdq\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v2i64 (vector_shuffle VR128:$src1, VR128:$src2, UNPCKH_shuffle_mask)))]>; def PUNPCKHQDQrm : PDI<0x6D, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, i128mem:$src2), - "punpckhqdq {$src2, $dst|$dst, $src2}", + "punpckhqdq\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v2i64 (vector_shuffle VR128:$src1, (memopv2i64 addr:$src2), @@ -1983,21 +1983,21 @@ // Extract / Insert def PEXTRWri : PDIi8<0xC5, MRMSrcReg, (outs GR32:$dst), (ins VR128:$src1, i32i8imm:$src2), - "pextrw {$src2, $src1, $dst|$dst, $src1, $src2}", + "pextrw\t{$src2, $src1, $dst|$dst, $src1, $src2}", [(set GR32:$dst, (X86pextrw (v8i16 VR128:$src1), (iPTR imm:$src2)))]>; let isTwoAddress = 1 in { def PINSRWrri : PDIi8<0xC4, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, GR32:$src2, i32i8imm:$src3), - "pinsrw {$src3, $src2, $dst|$dst, $src2, $src3}", + "pinsrw\t{$src3, $src2, $dst|$dst, $src2, $src3}", [(set VR128:$dst, (v8i16 (X86pinsrw (v8i16 VR128:$src1), GR32:$src2, (iPTR imm:$src3))))]>; def PINSRWrmi : PDIi8<0xC4, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, i16mem:$src2, i32i8imm:$src3), - "pinsrw {$src3, $src2, $dst|$dst, $src2, $src3}", + "pinsrw\t{$src3, $src2, $dst|$dst, $src2, $src3}", [(set VR128:$dst, (v8i16 (X86pinsrw (v8i16 VR128:$src1), (i32 (anyext (loadi16 addr:$src2))), @@ -2006,30 +2006,30 @@ // Mask creation def PMOVMSKBrr : PDI<0xD7, MRMSrcReg, (outs GR32:$dst), (ins VR128:$src), - "pmovmskb {$src, $dst|$dst, $src}", + "pmovmskb\t{$src, $dst|$dst, $src}", [(set GR32:$dst, (int_x86_sse2_pmovmskb_128 VR128:$src))]>; // Conditional store def MASKMOVDQU : PDI<0xF7, MRMSrcReg, (outs), (ins VR128:$src, VR128:$mask), - "maskmovdqu {$mask, $src|$src, $mask}", + "maskmovdqu\t{$mask, $src|$src, $mask}", [(int_x86_sse2_maskmov_dqu VR128:$src, VR128:$mask, EDI)]>, Imp<[EDI],[]>; // Non-temporal stores def MOVNTPDmr : PDI<0x2B, MRMDestMem, (outs), (ins i128mem:$dst, VR128:$src), - "movntpd {$src, $dst|$dst, $src}", + "movntpd\t{$src, $dst|$dst, $src}", [(int_x86_sse2_movnt_pd addr:$dst, VR128:$src)]>; def MOVNTDQmr : PDI<0xE7, MRMDestMem, (outs), (ins f128mem:$dst, VR128:$src), - "movntdq {$src, $dst|$dst, $src}", + "movntdq\t{$src, $dst|$dst, $src}", [(int_x86_sse2_movnt_dq addr:$dst, VR128:$src)]>; def MOVNTImr : I<0xC3, MRMDestMem, (outs), (ins i32mem:$dst, GR32:$src), - "movnti {$src, $dst|$dst, $src}", + "movnti\t{$src, $dst|$dst, $src}", [(int_x86_sse2_movnt_i addr:$dst, GR32:$src)]>, TB, Requires<[HasSSE2]>; // Flush cache def CLFLUSH : I<0xAE, MRM7m, (outs), (ins i8mem:$src), - "clflush $src", [(int_x86_sse2_clflush addr:$src)]>, + "clflush\t$src", [(int_x86_sse2_clflush addr:$src)]>, TB, Requires<[HasSSE2]>; // Load, store, and memory fence @@ -2043,44 +2043,44 @@ // FIXME: remove when we can teach regalloc that xor reg, reg is ok. let isReMaterializable = 1 in def V_SETALLONES : PDI<0x76, MRMInitReg, (outs VR128:$dst), (ins), - "pcmpeqd $dst, $dst", + "pcmpeqd\t$dst, $dst", [(set VR128:$dst, (v2f64 immAllOnesV))]>; // FR64 to 128-bit vector conversion. def MOVSD2PDrr : SDI<0x10, MRMSrcReg, (outs VR128:$dst), (ins FR64:$src), - "movsd {$src, $dst|$dst, $src}", + "movsd\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (v2f64 (scalar_to_vector FR64:$src)))]>; def MOVSD2PDrm : SDI<0x10, MRMSrcMem, (outs VR128:$dst), (ins f64mem:$src), - "movsd {$src, $dst|$dst, $src}", + "movsd\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (v2f64 (scalar_to_vector (loadf64 addr:$src))))]>; def MOVDI2PDIrr : PDI<0x6E, MRMSrcReg, (outs VR128:$dst), (ins GR32:$src), - "movd {$src, $dst|$dst, $src}", + "movd\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (v4i32 (scalar_to_vector GR32:$src)))]>; def MOVDI2PDIrm : PDI<0x6E, MRMSrcMem, (outs VR128:$dst), (ins i32mem:$src), - "movd {$src, $dst|$dst, $src}", + "movd\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (v4i32 (scalar_to_vector (loadi32 addr:$src))))]>; def MOVDI2SSrr : PDI<0x6E, MRMSrcReg, (outs FR32:$dst), (ins GR32:$src), - "movd {$src, $dst|$dst, $src}", + "movd\t{$src, $dst|$dst, $src}", [(set FR32:$dst, (bitconvert GR32:$src))]>; def MOVDI2SSrm : PDI<0x6E, MRMSrcMem, (outs FR32:$dst), (ins i32mem:$src), - "movd {$src, $dst|$dst, $src}", + "movd\t{$src, $dst|$dst, $src}", [(set FR32:$dst, (bitconvert (loadi32 addr:$src)))]>; // SSE2 instructions with XS prefix def MOVQI2PQIrm : I<0x7E, MRMSrcMem, (outs VR128:$dst), (ins i64mem:$src), - "movq {$src, $dst|$dst, $src}", + "movq\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (v2i64 (scalar_to_vector (loadi64 addr:$src))))]>, XS, Requires<[HasSSE2]>; def MOVPQI2QImr : PDI<0xD6, MRMDestMem, (outs), (ins i64mem:$dst, VR128:$src), - "movq {$src, $dst|$dst, $src}", + "movq\t{$src, $dst|$dst, $src}", [(store (i64 (vector_extract (v2i64 VR128:$src), (iPTR 0))), addr:$dst)]>; @@ -2090,27 +2090,27 @@ // def : Pat<(f32 (vector_extract (v4f32 VR128:$src), (iPTR 0))), // (f32 FR32:$src)>; def MOVPD2SDrr : SDI<0x10, MRMSrcReg, (outs FR64:$dst), (ins VR128:$src), - "movsd {$src, $dst|$dst, $src}", + "movsd\t{$src, $dst|$dst, $src}", [(set FR64:$dst, (vector_extract (v2f64 VR128:$src), (iPTR 0)))]>; def MOVPD2SDmr : SDI<0x11, MRMDestMem, (outs), (ins f64mem:$dst, VR128:$src), - "movsd {$src, $dst|$dst, $src}", + "movsd\t{$src, $dst|$dst, $src}", [(store (f64 (vector_extract (v2f64 VR128:$src), (iPTR 0))), addr:$dst)]>; def MOVPDI2DIrr : PDI<0x7E, MRMDestReg, (outs GR32:$dst), (ins VR128:$src), - "movd {$src, $dst|$dst, $src}", + "movd\t{$src, $dst|$dst, $src}", [(set GR32:$dst, (vector_extract (v4i32 VR128:$src), (iPTR 0)))]>; def MOVPDI2DImr : PDI<0x7E, MRMDestMem, (outs), (ins i32mem:$dst, VR128:$src), - "movd {$src, $dst|$dst, $src}", + "movd\t{$src, $dst|$dst, $src}", [(store (i32 (vector_extract (v4i32 VR128:$src), (iPTR 0))), addr:$dst)]>; def MOVSS2DIrr : PDI<0x7E, MRMDestReg, (outs GR32:$dst), (ins FR32:$src), - "movd {$src, $dst|$dst, $src}", + "movd\t{$src, $dst|$dst, $src}", [(set GR32:$dst, (bitconvert FR32:$src))]>; def MOVSS2DImr : PDI<0x7E, MRMDestMem, (outs), (ins i32mem:$dst, FR32:$src), - "movd {$src, $dst|$dst, $src}", + "movd\t{$src, $dst|$dst, $src}", [(store (i32 (bitconvert FR32:$src)), addr:$dst)]>; @@ -2119,12 +2119,12 @@ let isTwoAddress = 1 in { def MOVLSD2PDrr : SDI<0x10, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, FR64:$src2), - "movsd {$src2, $dst|$dst, $src2}", []>; + "movsd\t{$src2, $dst|$dst, $src2}", []>; let AddedComplexity = 15 in def MOVLPDrr : SDI<0x10, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), - "movsd {$src2, $dst|$dst, $src2}", + "movsd\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v2f64 (vector_shuffle VR128:$src1, VR128:$src2, MOVL_shuffle_mask)))]>; @@ -2132,14 +2132,14 @@ // Store / copy lower 64-bits of a XMM register. def MOVLQ128mr : PDI<0xD6, MRMDestMem, (outs), (ins i64mem:$dst, VR128:$src), - "movq {$src, $dst|$dst, $src}", + "movq\t{$src, $dst|$dst, $src}", [(int_x86_sse2_storel_dq addr:$dst, VR128:$src)]>; // Move to lower bits of a VR128 and zeroing upper bits. // Loading from memory automatically zeroing upper bits. let AddedComplexity = 20 in def MOVZSD2PDrm : SDI<0x10, MRMSrcMem, (outs VR128:$dst), (ins f64mem:$src), - "movsd {$src, $dst|$dst, $src}", + "movsd\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (v2f64 (vector_shuffle immAllZerosV, (v2f64 (scalar_to_vector @@ -2149,14 +2149,14 @@ let AddedComplexity = 15 in // movd / movq to XMM register zero-extends def MOVZDI2PDIrr : PDI<0x6E, MRMSrcReg, (outs VR128:$dst), (ins GR32:$src), - "movd {$src, $dst|$dst, $src}", + "movd\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (v4i32 (vector_shuffle immAllZerosV, (v4i32 (scalar_to_vector GR32:$src)), MOVL_shuffle_mask)))]>; let AddedComplexity = 20 in def MOVZDI2PDIrm : PDI<0x6E, MRMSrcMem, (outs VR128:$dst), (ins i32mem:$src), - "movd {$src, $dst|$dst, $src}", + "movd\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (v4i32 (vector_shuffle immAllZerosV, (v4i32 (scalar_to_vector (loadi32 addr:$src))), @@ -2165,12 +2165,12 @@ // Moving from XMM to XMM but still clear upper 64 bits. let AddedComplexity = 15 in def MOVZQI2PQIrr : I<0x7E, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src), - "movq {$src, $dst|$dst, $src}", + "movq\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse2_movl_dq VR128:$src))]>, XS, Requires<[HasSSE2]>; let AddedComplexity = 20 in def MOVZQI2PQIrm : I<0x7E, MRMSrcMem, (outs VR128:$dst), (ins i64mem:$src), - "movq {$src, $dst|$dst, $src}", + "movq\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse2_movl_dq (bitconvert (memopv2i64 addr:$src))))]>, XS, Requires<[HasSSE2]>; @@ -2195,34 +2195,34 @@ // Move Instructions def MOVSHDUPrr : S3SI<0x16, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src), - "movshdup {$src, $dst|$dst, $src}", + "movshdup\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (v4f32 (vector_shuffle VR128:$src, (undef), MOVSHDUP_shuffle_mask)))]>; def MOVSHDUPrm : S3SI<0x16, MRMSrcMem, (outs VR128:$dst), (ins f128mem:$src), - "movshdup {$src, $dst|$dst, $src}", + "movshdup\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (v4f32 (vector_shuffle (memopv4f32 addr:$src), (undef), MOVSHDUP_shuffle_mask)))]>; def MOVSLDUPrr : S3SI<0x12, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src), - "movsldup {$src, $dst|$dst, $src}", + "movsldup\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (v4f32 (vector_shuffle VR128:$src, (undef), MOVSLDUP_shuffle_mask)))]>; def MOVSLDUPrm : S3SI<0x12, MRMSrcMem, (outs VR128:$dst), (ins f128mem:$src), - "movsldup {$src, $dst|$dst, $src}", + "movsldup\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (v4f32 (vector_shuffle (memopv4f32 addr:$src), (undef), MOVSLDUP_shuffle_mask)))]>; def MOVDDUPrr : S3DI<0x12, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src), - "movddup {$src, $dst|$dst, $src}", + "movddup\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (v2f64 (vector_shuffle VR128:$src, (undef), SSE_splat_lo_mask)))]>; def MOVDDUPrm : S3DI<0x12, MRMSrcMem, (outs VR128:$dst), (ins f64mem:$src), - "movddup {$src, $dst|$dst, $src}", + "movddup\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (v2f64 (vector_shuffle (scalar_to_vector (loadf64 addr:$src)), @@ -2233,46 +2233,46 @@ let isTwoAddress = 1 in { def ADDSUBPSrr : S3DI<0xD0, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), - "addsubps {$src2, $dst|$dst, $src2}", + "addsubps\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (int_x86_sse3_addsub_ps VR128:$src1, VR128:$src2))]>; def ADDSUBPSrm : S3DI<0xD0, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, f128mem:$src2), - "addsubps {$src2, $dst|$dst, $src2}", + "addsubps\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (int_x86_sse3_addsub_ps VR128:$src1, (load addr:$src2)))]>; def ADDSUBPDrr : S3I<0xD0, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), - "addsubpd {$src2, $dst|$dst, $src2}", + "addsubpd\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (int_x86_sse3_addsub_pd VR128:$src1, VR128:$src2))]>; def ADDSUBPDrm : S3I<0xD0, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, f128mem:$src2), - "addsubpd {$src2, $dst|$dst, $src2}", + "addsubpd\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (int_x86_sse3_addsub_pd VR128:$src1, (load addr:$src2)))]>; } def LDDQUrm : S3DI<0xF0, MRMSrcMem, (outs VR128:$dst), (ins i128mem:$src), - "lddqu {$src, $dst|$dst, $src}", + "lddqu\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse3_ldu_dq addr:$src))]>; // Horizontal ops class S3D_Intrr o, string OpcodeStr, Intrinsic IntId> : S3DI; class S3D_Intrm o, string OpcodeStr, Intrinsic IntId> : S3DI; class S3_Intrr o, string OpcodeStr, Intrinsic IntId> : S3I; class S3_Intrm o, string OpcodeStr, Intrinsic IntId> : S3I; let isTwoAddress = 1 in { @@ -2333,12 +2333,12 @@ multiclass SS3I_binop_rm_int opc, string OpcodeStr, Intrinsic IntId, bit Commutable = 0> { def rr : SS38I { let isCommutable = Commutable; } def rm : SS38I; Index: lib/Target/X86/X86InstrInfo.td =================================================================== --- lib/Target/X86/X86InstrInfo.td (revision 40587) +++ lib/Target/X86/X86InstrInfo.td (working copy) @@ -388,7 +388,6 @@ // Nop def NOOP : I<0x90, RawFrm, (outs), (ins), "nop", []>; - //===----------------------------------------------------------------------===// // Control Flow Instructions... // @@ -397,7 +396,7 @@ let isTerminator = 1, isReturn = 1, isBarrier = 1, hasCtrlDep = 1 in { def RET : I<0xC3, RawFrm, (outs), (ins), "ret", [(X86retflag 0)]>; - def RETI : Ii16<0xC2, RawFrm, (outs), (ins i16imm:$amt), "ret $amt", + def RETI : Ii16<0xC2, RawFrm, (outs), (ins i16imm:$amt), "ret\t$amt", [(X86retflag imm:$amt)]>; } @@ -408,49 +407,49 @@ // Indirect branches let isBranch = 1, isBarrier = 1 in - def JMP : IBr<0xE9, (ins brtarget:$dst), "jmp $dst", [(br bb:$dst)]>; + def JMP : IBr<0xE9, (ins brtarget:$dst), "jmp\t$dst", [(br bb:$dst)]>; let isBranch = 1, isTerminator = 1, isBarrier = 1 in { - def JMP32r : I<0xFF, MRM4r, (outs), (ins GR32:$dst), "jmp{l} {*}$dst", + def JMP32r : I<0xFF, MRM4r, (outs), (ins GR32:$dst), "jmp{l}\t{*}$dst", [(brind GR32:$dst)]>; - def JMP32m : I<0xFF, MRM4m, (outs), (ins i32mem:$dst), "jmp{l} {*}$dst", + def JMP32m : I<0xFF, MRM4m, (outs), (ins i32mem:$dst), "jmp{l}\t{*}$dst", [(brind (loadi32 addr:$dst))]>; } // Conditional branches -def JE : IBr<0x84, (ins brtarget:$dst), "je $dst", +def JE : IBr<0x84, (ins brtarget:$dst), "je\t$dst", [(X86brcond bb:$dst, X86_COND_E)]>, TB; -def JNE : IBr<0x85, (ins brtarget:$dst), "jne $dst", +def JNE : IBr<0x85, (ins brtarget:$dst), "jne\t$dst", [(X86brcond bb:$dst, X86_COND_NE)]>, TB; -def JL : IBr<0x8C, (ins brtarget:$dst), "jl $dst", +def JL : IBr<0x8C, (ins brtarget:$dst), "jl\t$dst", [(X86brcond bb:$dst, X86_COND_L)]>, TB; -def JLE : IBr<0x8E, (ins brtarget:$dst), "jle $dst", +def JLE : IBr<0x8E, (ins brtarget:$dst), "jle\t$dst", [(X86brcond bb:$dst, X86_COND_LE)]>, TB; -def JG : IBr<0x8F, (ins brtarget:$dst), "jg $dst", +def JG : IBr<0x8F, (ins brtarget:$dst), "jg\t$dst", [(X86brcond bb:$dst, X86_COND_G)]>, TB; -def JGE : IBr<0x8D, (ins brtarget:$dst), "jge $dst", +def JGE : IBr<0x8D, (ins brtarget:$dst), "jge\t$dst", [(X86brcond bb:$dst, X86_COND_GE)]>, TB; -def JB : IBr<0x82, (ins brtarget:$dst), "jb $dst", +def JB : IBr<0x82, (ins brtarget:$dst), "jb\t$dst", [(X86brcond bb:$dst, X86_COND_B)]>, TB; -def JBE : IBr<0x86, (ins brtarget:$dst), "jbe $dst", +def JBE : IBr<0x86, (ins brtarget:$dst), "jbe\t$dst", [(X86brcond bb:$dst, X86_COND_BE)]>, TB; -def JA : IBr<0x87, (ins brtarget:$dst), "ja $dst", +def JA : IBr<0x87, (ins brtarget:$dst), "ja\t$dst", [(X86brcond bb:$dst, X86_COND_A)]>, TB; -def JAE : IBr<0x83, (ins brtarget:$dst), "jae $dst", +def JAE : IBr<0x83, (ins brtarget:$dst), "jae\t$dst", [(X86brcond bb:$dst, X86_COND_AE)]>, TB; -def JS : IBr<0x88, (ins brtarget:$dst), "js $dst", +def JS : IBr<0x88, (ins brtarget:$dst), "js\t$dst", [(X86brcond bb:$dst, X86_COND_S)]>, TB; -def JNS : IBr<0x89, (ins brtarget:$dst), "jns $dst", +def JNS : IBr<0x89, (ins brtarget:$dst), "jns\t$dst", [(X86brcond bb:$dst, X86_COND_NS)]>, TB; -def JP : IBr<0x8A, (ins brtarget:$dst), "jp $dst", +def JP : IBr<0x8A, (ins brtarget:$dst), "jp\t$dst", [(X86brcond bb:$dst, X86_COND_P)]>, TB; -def JNP : IBr<0x8B, (ins brtarget:$dst), "jnp $dst", +def JNP : IBr<0x8B, (ins brtarget:$dst), "jnp\t$dst", [(X86brcond bb:$dst, X86_COND_NP)]>, TB; -def JO : IBr<0x80, (ins brtarget:$dst), "jo $dst", +def JO : IBr<0x80, (ins brtarget:$dst), "jo\t$dst", [(X86brcond bb:$dst, X86_COND_O)]>, TB; -def JNO : IBr<0x81, (ins brtarget:$dst), "jno $dst", +def JNO : IBr<0x81, (ins brtarget:$dst), "jno\t$dst", [(X86brcond bb:$dst, X86_COND_NO)]>, TB; //===----------------------------------------------------------------------===// @@ -462,23 +461,23 @@ MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7, XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7] in { def CALLpcrel32 : I<0xE8, RawFrm, (outs), (ins i32imm:$dst, variable_ops), - "call ${dst:call}", []>; + "call\t${dst:call}", []>; def CALL32r : I<0xFF, MRM2r, (outs), (ins GR32:$dst, variable_ops), - "call {*}$dst", [(X86call GR32:$dst)]>; + "call\t{*}$dst", [(X86call GR32:$dst)]>; def CALL32m : I<0xFF, MRM2m, (outs), (ins i32mem:$dst, variable_ops), - "call {*}$dst", []>; + "call\t{*}$dst", []>; } // Tail call stuff. let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1 in - def TAILJMPd : IBr<0xE9, (ins i32imm:$dst), "jmp ${dst:call} # TAIL CALL", + def TAILJMPd : IBr<0xE9, (ins i32imm:$dst), "jmp\t${dst:call} # TAIL CALL", []>; let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1 in - def TAILJMPr : I<0xFF, MRM4r, (outs), (ins GR32:$dst), "jmp {*}$dst # TAIL CALL", + def TAILJMPr : I<0xFF, MRM4r, (outs), (ins GR32:$dst), "jmp\t{*}$dst # TAIL CALL", []>; let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1 in def TAILJMPm : I<0xFF, MRM4m, (outs), (ins i32mem:$dst), - "jmp {*}$dst # TAIL CALL", []>; + "jmp\t{*}$dst # TAIL CALL", []>; //===----------------------------------------------------------------------===// // Miscellaneous Instructions... @@ -486,56 +485,56 @@ def LEAVE : I<0xC9, RawFrm, (outs), (ins), "leave", []>, Imp<[EBP,ESP],[EBP,ESP]>; def POP32r : I<0x58, AddRegFrm, - (outs GR32:$reg), (ins), "pop{l} $reg", []>, Imp<[ESP],[ESP]>; + (outs GR32:$reg), (ins), "pop{l}\t$reg", []>, Imp<[ESP],[ESP]>; def PUSH32r : I<0x50, AddRegFrm, - (outs), (ins GR32:$reg), "push{l} $reg", []>, Imp<[ESP],[ESP]>; + (outs), (ins GR32:$reg), "push{l}\t$reg", []>, Imp<[ESP],[ESP]>; def MovePCtoStack : I<0, Pseudo, (outs), (ins piclabel:$label), - "call $label", []>; + "call\t$label", []>; let isTwoAddress = 1 in // GR32 = bswap GR32 def BSWAP32r : I<0xC8, AddRegFrm, (outs GR32:$dst), (ins GR32:$src), - "bswap{l} $dst", + "bswap{l}\t$dst", [(set GR32:$dst, (bswap GR32:$src))]>, TB; // FIXME: Model xchg* as two address instructions? def XCHG8rr : I<0x86, MRMDestReg, // xchg GR8, GR8 (outs), (ins GR8:$src1, GR8:$src2), - "xchg{b} {$src2|$src1}, {$src1|$src2}", []>; + "xchg{b}\t{$src2|$src1}, {$src1|$src2}", []>; def XCHG16rr : I<0x87, MRMDestReg, // xchg GR16, GR16 (outs), (ins GR16:$src1, GR16:$src2), - "xchg{w} {$src2|$src1}, {$src1|$src2}", []>, OpSize; + "xchg{w}\t{$src2|$src1}, {$src1|$src2}", []>, OpSize; def XCHG32rr : I<0x87, MRMDestReg, // xchg GR32, GR32 (outs), (ins GR32:$src1, GR32:$src2), - "xchg{l} {$src2|$src1}, {$src1|$src2}", []>; + "xchg{l}\t{$src2|$src1}, {$src1|$src2}", []>; def XCHG8mr : I<0x86, MRMDestMem, (outs), (ins i8mem:$src1, GR8:$src2), - "xchg{b} {$src2|$src1}, {$src1|$src2}", []>; + "xchg{b}\t{$src2|$src1}, {$src1|$src2}", []>; def XCHG16mr : I<0x87, MRMDestMem, (outs), (ins i16mem:$src1, GR16:$src2), - "xchg{w} {$src2|$src1}, {$src1|$src2}", []>, OpSize; + "xchg{w}\t{$src2|$src1}, {$src1|$src2}", []>, OpSize; def XCHG32mr : I<0x87, MRMDestMem, (outs), (ins i32mem:$src1, GR32:$src2), - "xchg{l} {$src2|$src1}, {$src1|$src2}", []>; + "xchg{l}\t{$src2|$src1}, {$src1|$src2}", []>; def XCHG8rm : I<0x86, MRMSrcMem, (outs), (ins GR8:$src1, i8mem:$src2), - "xchg{b} {$src2|$src1}, {$src1|$src2}", []>; + "xchg{b}\t{$src2|$src1}, {$src1|$src2}", []>; def XCHG16rm : I<0x87, MRMSrcMem, (outs), (ins GR16:$src1, i16mem:$src2), - "xchg{w} {$src2|$src1}, {$src1|$src2}", []>, OpSize; + "xchg{w}\t{$src2|$src1}, {$src1|$src2}", []>, OpSize; def XCHG32rm : I<0x87, MRMSrcMem, (outs), (ins GR32:$src1, i32mem:$src2), - "xchg{l} {$src2|$src1}, {$src1|$src2}", []>; + "xchg{l}\t{$src2|$src1}, {$src1|$src2}", []>; def LEA16r : I<0x8D, MRMSrcMem, (outs GR16:$dst), (ins i32mem:$src), - "lea{w} {$src|$dst}, {$dst|$src}", []>, OpSize; + "lea{w}\t{$src|$dst}, {$dst|$src}", []>, OpSize; def LEA32r : I<0x8D, MRMSrcMem, (outs GR32:$dst), (ins lea32mem:$src), - "lea{l} {$src|$dst}, {$dst|$src}", + "lea{l}\t{$src|$dst}, {$dst|$src}", [(set GR32:$dst, lea32addr:$src)]>, Requires<[In32BitMode]>; def REP_MOVSB : I<0xA4, RawFrm, (outs), (ins), "{rep;movsb|rep movsb}", @@ -565,48 +564,48 @@ // Input/Output Instructions... // def IN8rr : I<0xEC, RawFrm, (outs), (ins), - "in{b} {%dx, %al|%AL, %DX}", + "in{b}\t{%dx, %al|%AL, %DX}", []>, Imp<[DX], [AL]>; def IN16rr : I<0xED, RawFrm, (outs), (ins), - "in{w} {%dx, %ax|%AX, %DX}", + "in{w}\t{%dx, %ax|%AX, %DX}", []>, Imp<[DX], [AX]>, OpSize; def IN32rr : I<0xED, RawFrm, (outs), (ins), - "in{l} {%dx, %eax|%EAX, %DX}", + "in{l}\t{%dx, %eax|%EAX, %DX}", []>, Imp<[DX],[EAX]>; def IN8ri : Ii8<0xE4, RawFrm, (outs), (ins i16i8imm:$port), - "in{b} {$port, %al|%AL, $port}", + "in{b}\t{$port, %al|%AL, $port}", []>, Imp<[], [AL]>; def IN16ri : Ii8<0xE5, RawFrm, (outs), (ins i16i8imm:$port), - "in{w} {$port, %ax|%AX, $port}", + "in{w}\t{$port, %ax|%AX, $port}", []>, Imp<[], [AX]>, OpSize; def IN32ri : Ii8<0xE5, RawFrm, (outs), (ins i16i8imm:$port), - "in{l} {$port, %eax|%EAX, $port}", + "in{l}\t{$port, %eax|%EAX, $port}", []>, Imp<[],[EAX]>; def OUT8rr : I<0xEE, RawFrm, (outs), (ins), - "out{b} {%al, %dx|%DX, %AL}", + "out{b}\t{%al, %dx|%DX, %AL}", []>, Imp<[DX, AL], []>; def OUT16rr : I<0xEF, RawFrm, (outs), (ins), - "out{w} {%ax, %dx|%DX, %AX}", + "out{w}\t{%ax, %dx|%DX, %AX}", []>, Imp<[DX, AX], []>, OpSize; def OUT32rr : I<0xEF, RawFrm, (outs), (ins), - "out{l} {%eax, %dx|%DX, %EAX}", + "out{l}\t{%eax, %dx|%DX, %EAX}", []>, Imp<[DX, EAX], []>; def OUT8ir : Ii8<0xE6, RawFrm, (outs), (ins i16i8imm:$port), - "out{b} {%al, $port|$port, %AL}", + "out{b}\t{%al, $port|$port, %AL}", []>, Imp<[AL], []>; def OUT16ir : Ii8<0xE7, RawFrm, (outs), (ins i16i8imm:$port), - "out{w} {%ax, $port|$port, %AX}", + "out{w}\t{%ax, $port|$port, %AX}", []>, Imp<[AX], []>, OpSize; def OUT32ir : Ii8<0xE7, RawFrm, (outs), (ins i16i8imm:$port), - "out{l} {%eax, $port|$port, %EAX}", + "out{l}\t{%eax, $port|$port, %EAX}", []>, Imp<[EAX], []>; @@ -614,50 +613,50 @@ // Move Instructions... // def MOV8rr : I<0x88, MRMDestReg, (outs GR8 :$dst), (ins GR8 :$src), - "mov{b} {$src, $dst|$dst, $src}", []>; + "mov{b}\t{$src, $dst|$dst, $src}", []>; def MOV16rr : I<0x89, MRMDestReg, (outs GR16:$dst), (ins GR16:$src), - "mov{w} {$src, $dst|$dst, $src}", []>, OpSize; + "mov{w}\t{$src, $dst|$dst, $src}", []>, OpSize; def MOV32rr : I<0x89, MRMDestReg, (outs GR32:$dst), (ins GR32:$src), - "mov{l} {$src, $dst|$dst, $src}", []>; + "mov{l}\t{$src, $dst|$dst, $src}", []>; let isReMaterializable = 1 in { def MOV8ri : Ii8 <0xB0, AddRegFrm, (outs GR8 :$dst), (ins i8imm :$src), - "mov{b} {$src, $dst|$dst, $src}", + "mov{b}\t{$src, $dst|$dst, $src}", [(set GR8:$dst, imm:$src)]>; def MOV16ri : Ii16<0xB8, AddRegFrm, (outs GR16:$dst), (ins i16imm:$src), - "mov{w} {$src, $dst|$dst, $src}", + "mov{w}\t{$src, $dst|$dst, $src}", [(set GR16:$dst, imm:$src)]>, OpSize; def MOV32ri : Ii32<0xB8, AddRegFrm, (outs GR32:$dst), (ins i32imm:$src), - "mov{l} {$src, $dst|$dst, $src}", + "mov{l}\t{$src, $dst|$dst, $src}", [(set GR32:$dst, imm:$src)]>; } def MOV8mi : Ii8 <0xC6, MRM0m, (outs), (ins i8mem :$dst, i8imm :$src), - "mov{b} {$src, $dst|$dst, $src}", + "mov{b}\t{$src, $dst|$dst, $src}", [(store (i8 imm:$src), addr:$dst)]>; def MOV16mi : Ii16<0xC7, MRM0m, (outs), (ins i16mem:$dst, i16imm:$src), - "mov{w} {$src, $dst|$dst, $src}", + "mov{w}\t{$src, $dst|$dst, $src}", [(store (i16 imm:$src), addr:$dst)]>, OpSize; def MOV32mi : Ii32<0xC7, MRM0m, (outs), (ins i32mem:$dst, i32imm:$src), - "mov{l} {$src, $dst|$dst, $src}", + "mov{l}\t{$src, $dst|$dst, $src}", [(store (i32 imm:$src), addr:$dst)]>; def MOV8rm : I<0x8A, MRMSrcMem, (outs GR8 :$dst), (ins i8mem :$src), - "mov{b} {$src, $dst|$dst, $src}", + "mov{b}\t{$src, $dst|$dst, $src}", [(set GR8:$dst, (load addr:$src))]>; def MOV16rm : I<0x8B, MRMSrcMem, (outs GR16:$dst), (ins i16mem:$src), - "mov{w} {$src, $dst|$dst, $src}", + "mov{w}\t{$src, $dst|$dst, $src}", [(set GR16:$dst, (load addr:$src))]>, OpSize; def MOV32rm : I<0x8B, MRMSrcMem, (outs GR32:$dst), (ins i32mem:$src), - "mov{l} {$src, $dst|$dst, $src}", + "mov{l}\t{$src, $dst|$dst, $src}", [(set GR32:$dst, (load addr:$src))]>; def MOV8mr : I<0x88, MRMDestMem, (outs), (ins i8mem :$dst, GR8 :$src), - "mov{b} {$src, $dst|$dst, $src}", + "mov{b}\t{$src, $dst|$dst, $src}", [(store GR8:$src, addr:$dst)]>; def MOV16mr : I<0x89, MRMDestMem, (outs), (ins i16mem:$dst, GR16:$src), - "mov{w} {$src, $dst|$dst, $src}", + "mov{w}\t{$src, $dst|$dst, $src}", [(store GR16:$src, addr:$dst)]>, OpSize; def MOV32mr : I<0x89, MRMDestMem, (outs), (ins i32mem:$dst, GR32:$src), - "mov{l} {$src, $dst|$dst, $src}", + "mov{l}\t{$src, $dst|$dst, $src}", [(store GR32:$src, addr:$dst)]>; //===----------------------------------------------------------------------===// @@ -665,71 +664,71 @@ // // Extra precision multiplication -def MUL8r : I<0xF6, MRM4r, (outs), (ins GR8:$src), "mul{b} $src", +def MUL8r : I<0xF6, MRM4r, (outs), (ins GR8:$src), "mul{b}\t$src", // FIXME: Used for 8-bit mul, ignore result upper 8 bits. // This probably ought to be moved to a def : Pat<> if the // syntax can be accepted. [(set AL, (mul AL, GR8:$src))]>, Imp<[AL],[AX]>; // AL,AH = AL*GR8 -def MUL16r : I<0xF7, MRM4r, (outs), (ins GR16:$src), "mul{w} $src", []>, +def MUL16r : I<0xF7, MRM4r, (outs), (ins GR16:$src), "mul{w}\t$src", []>, Imp<[AX],[AX,DX]>, OpSize; // AX,DX = AX*GR16 -def MUL32r : I<0xF7, MRM4r, (outs), (ins GR32:$src), "mul{l} $src", []>, +def MUL32r : I<0xF7, MRM4r, (outs), (ins GR32:$src), "mul{l}\t$src", []>, Imp<[EAX],[EAX,EDX]>; // EAX,EDX = EAX*GR32 def MUL8m : I<0xF6, MRM4m, (outs), (ins i8mem :$src), - "mul{b} $src", + "mul{b}\t$src", // FIXME: Used for 8-bit mul, ignore result upper 8 bits. // This probably ought to be moved to a def : Pat<> if the // syntax can be accepted. [(set AL, (mul AL, (loadi8 addr:$src)))]>, Imp<[AL],[AX]>; // AL,AH = AL*[mem8] def MUL16m : I<0xF7, MRM4m, (outs), (ins i16mem:$src), - "mul{w} $src", []>, Imp<[AX],[AX,DX]>, + "mul{w}\t$src", []>, Imp<[AX],[AX,DX]>, OpSize; // AX,DX = AX*[mem16] def MUL32m : I<0xF7, MRM4m, (outs), (ins i32mem:$src), - "mul{l} $src", []>, Imp<[EAX],[EAX,EDX]>;// EAX,EDX = EAX*[mem32] + "mul{l}\t$src", []>, Imp<[EAX],[EAX,EDX]>;// EAX,EDX = EAX*[mem32] -def IMUL8r : I<0xF6, MRM5r, (outs), (ins GR8:$src), "imul{b} $src", []>, +def IMUL8r : I<0xF6, MRM5r, (outs), (ins GR8:$src), "imul{b}\t$src", []>, Imp<[AL],[AX]>; // AL,AH = AL*GR8 -def IMUL16r : I<0xF7, MRM5r, (outs), (ins GR16:$src), "imul{w} $src", []>, +def IMUL16r : I<0xF7, MRM5r, (outs), (ins GR16:$src), "imul{w}\t$src", []>, Imp<[AX],[AX,DX]>, OpSize; // AX,DX = AX*GR16 -def IMUL32r : I<0xF7, MRM5r, (outs), (ins GR32:$src), "imul{l} $src", []>, +def IMUL32r : I<0xF7, MRM5r, (outs), (ins GR32:$src), "imul{l}\t$src", []>, Imp<[EAX],[EAX,EDX]>; // EAX,EDX = EAX*GR32 def IMUL8m : I<0xF6, MRM5m, (outs), (ins i8mem :$src), - "imul{b} $src", []>, Imp<[AL],[AX]>; // AL,AH = AL*[mem8] + "imul{b}\t$src", []>, Imp<[AL],[AX]>; // AL,AH = AL*[mem8] def IMUL16m : I<0xF7, MRM5m, (outs), (ins i16mem:$src), - "imul{w} $src", []>, Imp<[AX],[AX,DX]>, + "imul{w}\t$src", []>, Imp<[AX],[AX,DX]>, OpSize; // AX,DX = AX*[mem16] def IMUL32m : I<0xF7, MRM5m, (outs), (ins i32mem:$src), - "imul{l} $src", []>, + "imul{l}\t$src", []>, Imp<[EAX],[EAX,EDX]>; // EAX,EDX = EAX*[mem32] // unsigned division/remainder def DIV8r : I<0xF6, MRM6r, (outs), (ins GR8:$src), // AX/r8 = AL,AH - "div{b} $src", []>, Imp<[AX],[AX]>; + "div{b}\t$src", []>, Imp<[AX],[AX]>; def DIV16r : I<0xF7, MRM6r, (outs), (ins GR16:$src), // DX:AX/r16 = AX,DX - "div{w} $src", []>, Imp<[AX,DX],[AX,DX]>, OpSize; + "div{w}\t$src", []>, Imp<[AX,DX],[AX,DX]>, OpSize; def DIV32r : I<0xF7, MRM6r, (outs), (ins GR32:$src), // EDX:EAX/r32 = EAX,EDX - "div{l} $src", []>, Imp<[EAX,EDX],[EAX,EDX]>; + "div{l}\t$src", []>, Imp<[EAX,EDX],[EAX,EDX]>; def DIV8m : I<0xF6, MRM6m, (outs), (ins i8mem:$src), // AX/[mem8] = AL,AH - "div{b} $src", []>, Imp<[AX],[AX]>; + "div{b}\t$src", []>, Imp<[AX],[AX]>; def DIV16m : I<0xF7, MRM6m, (outs), (ins i16mem:$src), // DX:AX/[mem16] = AX,DX - "div{w} $src", []>, Imp<[AX,DX],[AX,DX]>, OpSize; + "div{w}\t$src", []>, Imp<[AX,DX],[AX,DX]>, OpSize; def DIV32m : I<0xF7, MRM6m, (outs), (ins i32mem:$src), // EDX:EAX/[mem32] = EAX,EDX - "div{l} $src", []>, Imp<[EAX,EDX],[EAX,EDX]>; + "div{l}\t$src", []>, Imp<[EAX,EDX],[EAX,EDX]>; // Signed division/remainder. def IDIV8r : I<0xF6, MRM7r, (outs), (ins GR8:$src), // AX/r8 = AL,AH - "idiv{b} $src", []>, Imp<[AX],[AX]>; + "idiv{b}\t$src", []>, Imp<[AX],[AX]>; def IDIV16r: I<0xF7, MRM7r, (outs), (ins GR16:$src), // DX:AX/r16 = AX,DX - "idiv{w} $src", []>, Imp<[AX,DX],[AX,DX]>, OpSize; + "idiv{w}\t$src", []>, Imp<[AX,DX],[AX,DX]>, OpSize; def IDIV32r: I<0xF7, MRM7r, (outs), (ins GR32:$src), // EDX:EAX/r32 = EAX,EDX - "idiv{l} $src", []>, Imp<[EAX,EDX],[EAX,EDX]>; + "idiv{l}\t$src", []>, Imp<[EAX,EDX],[EAX,EDX]>; def IDIV8m : I<0xF6, MRM7m, (outs), (ins i8mem:$src), // AX/[mem8] = AL,AH - "idiv{b} $src", []>, Imp<[AX],[AX]>; + "idiv{b}\t$src", []>, Imp<[AX],[AX]>; def IDIV16m: I<0xF7, MRM7m, (outs), (ins i16mem:$src), // DX:AX/[mem16] = AX,DX - "idiv{w} $src", []>, Imp<[AX,DX],[AX,DX]>, OpSize; + "idiv{w}\t$src", []>, Imp<[AX,DX],[AX,DX]>, OpSize; def IDIV32m: I<0xF7, MRM7m, (outs), (ins i32mem:$src), // EDX:EAX/[mem32] = EAX,EDX - "idiv{l} $src", []>, Imp<[EAX,EDX],[EAX,EDX]>; + "idiv{l}\t$src", []>, Imp<[EAX,EDX],[EAX,EDX]>; //===----------------------------------------------------------------------===// @@ -740,350 +739,350 @@ // Conditional moves def CMOVB16rr : I<0x42, MRMSrcReg, // if , TB, OpSize; def CMOVB16rm : I<0x42, MRMSrcMem, // if , TB, OpSize; def CMOVB32rr : I<0x42, MRMSrcReg, // if , TB; def CMOVB32rm : I<0x42, MRMSrcMem, // if , TB; def CMOVAE16rr: I<0x43, MRMSrcReg, // if >=u, GR16 = GR16 (outs GR16:$dst), (ins GR16:$src1, GR16:$src2), - "cmovae {$src2, $dst|$dst, $src2}", + "cmovae\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (X86cmov GR16:$src1, GR16:$src2, X86_COND_AE))]>, TB, OpSize; def CMOVAE16rm: I<0x43, MRMSrcMem, // if >=u, GR16 = [mem16] (outs GR16:$dst), (ins GR16:$src1, i16mem:$src2), - "cmovae {$src2, $dst|$dst, $src2}", + "cmovae\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (X86cmov GR16:$src1, (loadi16 addr:$src2), X86_COND_AE))]>, TB, OpSize; def CMOVAE32rr: I<0x43, MRMSrcReg, // if >=u, GR32 = GR32 (outs GR32:$dst), (ins GR32:$src1, GR32:$src2), - "cmovae {$src2, $dst|$dst, $src2}", + "cmovae\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (X86cmov GR32:$src1, GR32:$src2, X86_COND_AE))]>, TB; def CMOVAE32rm: I<0x43, MRMSrcMem, // if >=u, GR32 = [mem32] (outs GR32:$dst), (ins GR32:$src1, i32mem:$src2), - "cmovae {$src2, $dst|$dst, $src2}", + "cmovae\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (X86cmov GR32:$src1, (loadi32 addr:$src2), X86_COND_AE))]>, TB; def CMOVE16rr : I<0x44, MRMSrcReg, // if ==, GR16 = GR16 (outs GR16:$dst), (ins GR16:$src1, GR16:$src2), - "cmove {$src2, $dst|$dst, $src2}", + "cmove\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (X86cmov GR16:$src1, GR16:$src2, X86_COND_E))]>, TB, OpSize; def CMOVE16rm : I<0x44, MRMSrcMem, // if ==, GR16 = [mem16] (outs GR16:$dst), (ins GR16:$src1, i16mem:$src2), - "cmove {$src2, $dst|$dst, $src2}", + "cmove\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (X86cmov GR16:$src1, (loadi16 addr:$src2), X86_COND_E))]>, TB, OpSize; def CMOVE32rr : I<0x44, MRMSrcReg, // if ==, GR32 = GR32 (outs GR32:$dst), (ins GR32:$src1, GR32:$src2), - "cmove {$src2, $dst|$dst, $src2}", + "cmove\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (X86cmov GR32:$src1, GR32:$src2, X86_COND_E))]>, TB; def CMOVE32rm : I<0x44, MRMSrcMem, // if ==, GR32 = [mem32] (outs GR32:$dst), (ins GR32:$src1, i32mem:$src2), - "cmove {$src2, $dst|$dst, $src2}", + "cmove\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (X86cmov GR32:$src1, (loadi32 addr:$src2), X86_COND_E))]>, TB; def CMOVNE16rr: I<0x45, MRMSrcReg, // if !=, GR16 = GR16 (outs GR16:$dst), (ins GR16:$src1, GR16:$src2), - "cmovne {$src2, $dst|$dst, $src2}", + "cmovne\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (X86cmov GR16:$src1, GR16:$src2, X86_COND_NE))]>, TB, OpSize; def CMOVNE16rm: I<0x45, MRMSrcMem, // if !=, GR16 = [mem16] (outs GR16:$dst), (ins GR16:$src1, i16mem:$src2), - "cmovne {$src2, $dst|$dst, $src2}", + "cmovne\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (X86cmov GR16:$src1, (loadi16 addr:$src2), X86_COND_NE))]>, TB, OpSize; def CMOVNE32rr: I<0x45, MRMSrcReg, // if !=, GR32 = GR32 (outs GR32:$dst), (ins GR32:$src1, GR32:$src2), - "cmovne {$src2, $dst|$dst, $src2}", + "cmovne\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (X86cmov GR32:$src1, GR32:$src2, X86_COND_NE))]>, TB; def CMOVNE32rm: I<0x45, MRMSrcMem, // if !=, GR32 = [mem32] (outs GR32:$dst), (ins GR32:$src1, i32mem:$src2), - "cmovne {$src2, $dst|$dst, $src2}", + "cmovne\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (X86cmov GR32:$src1, (loadi32 addr:$src2), X86_COND_NE))]>, TB; def CMOVBE16rr: I<0x46, MRMSrcReg, // if <=u, GR16 = GR16 (outs GR16:$dst), (ins GR16:$src1, GR16:$src2), - "cmovbe {$src2, $dst|$dst, $src2}", + "cmovbe\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (X86cmov GR16:$src1, GR16:$src2, X86_COND_BE))]>, TB, OpSize; def CMOVBE16rm: I<0x46, MRMSrcMem, // if <=u, GR16 = [mem16] (outs GR16:$dst), (ins GR16:$src1, i16mem:$src2), - "cmovbe {$src2, $dst|$dst, $src2}", + "cmovbe\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (X86cmov GR16:$src1, (loadi16 addr:$src2), X86_COND_BE))]>, TB, OpSize; def CMOVBE32rr: I<0x46, MRMSrcReg, // if <=u, GR32 = GR32 (outs GR32:$dst), (ins GR32:$src1, GR32:$src2), - "cmovbe {$src2, $dst|$dst, $src2}", + "cmovbe\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (X86cmov GR32:$src1, GR32:$src2, X86_COND_BE))]>, TB; def CMOVBE32rm: I<0x46, MRMSrcMem, // if <=u, GR32 = [mem32] (outs GR32:$dst), (ins GR32:$src1, i32mem:$src2), - "cmovbe {$src2, $dst|$dst, $src2}", + "cmovbe\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (X86cmov GR32:$src1, (loadi32 addr:$src2), X86_COND_BE))]>, TB; def CMOVA16rr : I<0x47, MRMSrcReg, // if >u, GR16 = GR16 (outs GR16:$dst), (ins GR16:$src1, GR16:$src2), - "cmova {$src2, $dst|$dst, $src2}", + "cmova\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (X86cmov GR16:$src1, GR16:$src2, X86_COND_A))]>, TB, OpSize; def CMOVA16rm : I<0x47, MRMSrcMem, // if >u, GR16 = [mem16] (outs GR16:$dst), (ins GR16:$src1, i16mem:$src2), - "cmova {$src2, $dst|$dst, $src2}", + "cmova\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (X86cmov GR16:$src1, (loadi16 addr:$src2), X86_COND_A))]>, TB, OpSize; def CMOVA32rr : I<0x47, MRMSrcReg, // if >u, GR32 = GR32 (outs GR32:$dst), (ins GR32:$src1, GR32:$src2), - "cmova {$src2, $dst|$dst, $src2}", + "cmova\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (X86cmov GR32:$src1, GR32:$src2, X86_COND_A))]>, TB; def CMOVA32rm : I<0x47, MRMSrcMem, // if >u, GR32 = [mem32] (outs GR32:$dst), (ins GR32:$src1, i32mem:$src2), - "cmova {$src2, $dst|$dst, $src2}", + "cmova\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (X86cmov GR32:$src1, (loadi32 addr:$src2), X86_COND_A))]>, TB; def CMOVL16rr : I<0x4C, MRMSrcReg, // if , TB, OpSize; def CMOVL16rm : I<0x4C, MRMSrcMem, // if , TB, OpSize; def CMOVL32rr : I<0x4C, MRMSrcReg, // if , TB; def CMOVL32rm : I<0x4C, MRMSrcMem, // if , TB; def CMOVGE16rr: I<0x4D, MRMSrcReg, // if >=s, GR16 = GR16 (outs GR16:$dst), (ins GR16:$src1, GR16:$src2), - "cmovge {$src2, $dst|$dst, $src2}", + "cmovge\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (X86cmov GR16:$src1, GR16:$src2, X86_COND_GE))]>, TB, OpSize; def CMOVGE16rm: I<0x4D, MRMSrcMem, // if >=s, GR16 = [mem16] (outs GR16:$dst), (ins GR16:$src1, i16mem:$src2), - "cmovge {$src2, $dst|$dst, $src2}", + "cmovge\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (X86cmov GR16:$src1, (loadi16 addr:$src2), X86_COND_GE))]>, TB, OpSize; def CMOVGE32rr: I<0x4D, MRMSrcReg, // if >=s, GR32 = GR32 (outs GR32:$dst), (ins GR32:$src1, GR32:$src2), - "cmovge {$src2, $dst|$dst, $src2}", + "cmovge\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (X86cmov GR32:$src1, GR32:$src2, X86_COND_GE))]>, TB; def CMOVGE32rm: I<0x4D, MRMSrcMem, // if >=s, GR32 = [mem32] (outs GR32:$dst), (ins GR32:$src1, i32mem:$src2), - "cmovge {$src2, $dst|$dst, $src2}", + "cmovge\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (X86cmov GR32:$src1, (loadi32 addr:$src2), X86_COND_GE))]>, TB; def CMOVLE16rr: I<0x4E, MRMSrcReg, // if <=s, GR16 = GR16 (outs GR16:$dst), (ins GR16:$src1, GR16:$src2), - "cmovle {$src2, $dst|$dst, $src2}", + "cmovle\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (X86cmov GR16:$src1, GR16:$src2, X86_COND_LE))]>, TB, OpSize; def CMOVLE16rm: I<0x4E, MRMSrcMem, // if <=s, GR16 = [mem16] (outs GR16:$dst), (ins GR16:$src1, i16mem:$src2), - "cmovle {$src2, $dst|$dst, $src2}", + "cmovle\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (X86cmov GR16:$src1, (loadi16 addr:$src2), X86_COND_LE))]>, TB, OpSize; def CMOVLE32rr: I<0x4E, MRMSrcReg, // if <=s, GR32 = GR32 (outs GR32:$dst), (ins GR32:$src1, GR32:$src2), - "cmovle {$src2, $dst|$dst, $src2}", + "cmovle\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (X86cmov GR32:$src1, GR32:$src2, X86_COND_LE))]>, TB; def CMOVLE32rm: I<0x4E, MRMSrcMem, // if <=s, GR32 = [mem32] (outs GR32:$dst), (ins GR32:$src1, i32mem:$src2), - "cmovle {$src2, $dst|$dst, $src2}", + "cmovle\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (X86cmov GR32:$src1, (loadi32 addr:$src2), X86_COND_LE))]>, TB; def CMOVG16rr : I<0x4F, MRMSrcReg, // if >s, GR16 = GR16 (outs GR16:$dst), (ins GR16:$src1, GR16:$src2), - "cmovg {$src2, $dst|$dst, $src2}", + "cmovg\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (X86cmov GR16:$src1, GR16:$src2, X86_COND_G))]>, TB, OpSize; def CMOVG16rm : I<0x4F, MRMSrcMem, // if >s, GR16 = [mem16] (outs GR16:$dst), (ins GR16:$src1, i16mem:$src2), - "cmovg {$src2, $dst|$dst, $src2}", + "cmovg\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (X86cmov GR16:$src1, (loadi16 addr:$src2), X86_COND_G))]>, TB, OpSize; def CMOVG32rr : I<0x4F, MRMSrcReg, // if >s, GR32 = GR32 (outs GR32:$dst), (ins GR32:$src1, GR32:$src2), - "cmovg {$src2, $dst|$dst, $src2}", + "cmovg\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (X86cmov GR32:$src1, GR32:$src2, X86_COND_G))]>, TB; def CMOVG32rm : I<0x4F, MRMSrcMem, // if >s, GR32 = [mem32] (outs GR32:$dst), (ins GR32:$src1, i32mem:$src2), - "cmovg {$src2, $dst|$dst, $src2}", + "cmovg\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (X86cmov GR32:$src1, (loadi32 addr:$src2), X86_COND_G))]>, TB; def CMOVS16rr : I<0x48, MRMSrcReg, // if signed, GR16 = GR16 (outs GR16:$dst), (ins GR16:$src1, GR16:$src2), - "cmovs {$src2, $dst|$dst, $src2}", + "cmovs\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (X86cmov GR16:$src1, GR16:$src2, X86_COND_S))]>, TB, OpSize; def CMOVS16rm : I<0x48, MRMSrcMem, // if signed, GR16 = [mem16] (outs GR16:$dst), (ins GR16:$src1, i16mem:$src2), - "cmovs {$src2, $dst|$dst, $src2}", + "cmovs\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (X86cmov GR16:$src1, (loadi16 addr:$src2), X86_COND_S))]>, TB, OpSize; def CMOVS32rr : I<0x48, MRMSrcReg, // if signed, GR32 = GR32 (outs GR32:$dst), (ins GR32:$src1, GR32:$src2), - "cmovs {$src2, $dst|$dst, $src2}", + "cmovs\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (X86cmov GR32:$src1, GR32:$src2, X86_COND_S))]>, TB; def CMOVS32rm : I<0x48, MRMSrcMem, // if signed, GR32 = [mem32] (outs GR32:$dst), (ins GR32:$src1, i32mem:$src2), - "cmovs {$src2, $dst|$dst, $src2}", + "cmovs\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (X86cmov GR32:$src1, (loadi32 addr:$src2), X86_COND_S))]>, TB; def CMOVNS16rr: I<0x49, MRMSrcReg, // if !signed, GR16 = GR16 (outs GR16:$dst), (ins GR16:$src1, GR16:$src2), - "cmovns {$src2, $dst|$dst, $src2}", + "cmovns\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (X86cmov GR16:$src1, GR16:$src2, X86_COND_NS))]>, TB, OpSize; def CMOVNS16rm: I<0x49, MRMSrcMem, // if !signed, GR16 = [mem16] (outs GR16:$dst), (ins GR16:$src1, i16mem:$src2), - "cmovns {$src2, $dst|$dst, $src2}", + "cmovns\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (X86cmov GR16:$src1, (loadi16 addr:$src2), X86_COND_NS))]>, TB, OpSize; def CMOVNS32rr: I<0x49, MRMSrcReg, // if !signed, GR32 = GR32 (outs GR32:$dst), (ins GR32:$src1, GR32:$src2), - "cmovns {$src2, $dst|$dst, $src2}", + "cmovns\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (X86cmov GR32:$src1, GR32:$src2, X86_COND_NS))]>, TB; def CMOVNS32rm: I<0x49, MRMSrcMem, // if !signed, GR32 = [mem32] (outs GR32:$dst), (ins GR32:$src1, i32mem:$src2), - "cmovns {$src2, $dst|$dst, $src2}", + "cmovns\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (X86cmov GR32:$src1, (loadi32 addr:$src2), X86_COND_NS))]>, TB; def CMOVP16rr : I<0x4A, MRMSrcReg, // if parity, GR16 = GR16 (outs GR16:$dst), (ins GR16:$src1, GR16:$src2), - "cmovp {$src2, $dst|$dst, $src2}", + "cmovp\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (X86cmov GR16:$src1, GR16:$src2, X86_COND_P))]>, TB, OpSize; def CMOVP16rm : I<0x4A, MRMSrcMem, // if parity, GR16 = [mem16] (outs GR16:$dst), (ins GR16:$src1, i16mem:$src2), - "cmovp {$src2, $dst|$dst, $src2}", + "cmovp\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (X86cmov GR16:$src1, (loadi16 addr:$src2), X86_COND_P))]>, TB, OpSize; def CMOVP32rr : I<0x4A, MRMSrcReg, // if parity, GR32 = GR32 (outs GR32:$dst), (ins GR32:$src1, GR32:$src2), - "cmovp {$src2, $dst|$dst, $src2}", + "cmovp\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (X86cmov GR32:$src1, GR32:$src2, X86_COND_P))]>, TB; def CMOVP32rm : I<0x4A, MRMSrcMem, // if parity, GR32 = [mem32] (outs GR32:$dst), (ins GR32:$src1, i32mem:$src2), - "cmovp {$src2, $dst|$dst, $src2}", + "cmovp\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (X86cmov GR32:$src1, (loadi32 addr:$src2), X86_COND_P))]>, TB; def CMOVNP16rr : I<0x4B, MRMSrcReg, // if !parity, GR16 = GR16 (outs GR16:$dst), (ins GR16:$src1, GR16:$src2), - "cmovnp {$src2, $dst|$dst, $src2}", + "cmovnp\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (X86cmov GR16:$src1, GR16:$src2, X86_COND_NP))]>, TB, OpSize; def CMOVNP16rm : I<0x4B, MRMSrcMem, // if !parity, GR16 = [mem16] (outs GR16:$dst), (ins GR16:$src1, i16mem:$src2), - "cmovnp {$src2, $dst|$dst, $src2}", + "cmovnp\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (X86cmov GR16:$src1, (loadi16 addr:$src2), X86_COND_NP))]>, TB, OpSize; def CMOVNP32rr : I<0x4B, MRMSrcReg, // if !parity, GR32 = GR32 (outs GR32:$dst), (ins GR32:$src1, GR32:$src2), - "cmovnp {$src2, $dst|$dst, $src2}", + "cmovnp\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (X86cmov GR32:$src1, GR32:$src2, X86_COND_NP))]>, TB; def CMOVNP32rm : I<0x4B, MRMSrcMem, // if !parity, GR32 = [mem32] (outs GR32:$dst), (ins GR32:$src1, i32mem:$src2), - "cmovnp {$src2, $dst|$dst, $src2}", + "cmovnp\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (X86cmov GR32:$src1, (loadi32 addr:$src2), X86_COND_NP))]>, TB; @@ -1091,75 +1090,75 @@ // unary instructions let CodeSize = 2 in { -def NEG8r : I<0xF6, MRM3r, (outs GR8 :$dst), (ins GR8 :$src), "neg{b} $dst", +def NEG8r : I<0xF6, MRM3r, (outs GR8 :$dst), (ins GR8 :$src), "neg{b}\t$dst", [(set GR8:$dst, (ineg GR8:$src))]>; -def NEG16r : I<0xF7, MRM3r, (outs GR16:$dst), (ins GR16:$src), "neg{w} $dst", +def NEG16r : I<0xF7, MRM3r, (outs GR16:$dst), (ins GR16:$src), "neg{w}\t$dst", [(set GR16:$dst, (ineg GR16:$src))]>, OpSize; -def NEG32r : I<0xF7, MRM3r, (outs GR32:$dst), (ins GR32:$src), "neg{l} $dst", +def NEG32r : I<0xF7, MRM3r, (outs GR32:$dst), (ins GR32:$src), "neg{l}\t$dst", [(set GR32:$dst, (ineg GR32:$src))]>; let isTwoAddress = 0 in { - def NEG8m : I<0xF6, MRM3m, (outs), (ins i8mem :$dst), "neg{b} $dst", + def NEG8m : I<0xF6, MRM3m, (outs), (ins i8mem :$dst), "neg{b}\t$dst", [(store (ineg (loadi8 addr:$dst)), addr:$dst)]>; - def NEG16m : I<0xF7, MRM3m, (outs), (ins i16mem:$dst), "neg{w} $dst", + def NEG16m : I<0xF7, MRM3m, (outs), (ins i16mem:$dst), "neg{w}\t$dst", [(store (ineg (loadi16 addr:$dst)), addr:$dst)]>, OpSize; - def NEG32m : I<0xF7, MRM3m, (outs), (ins i32mem:$dst), "neg{l} $dst", + def NEG32m : I<0xF7, MRM3m, (outs), (ins i32mem:$dst), "neg{l}\t$dst", [(store (ineg (loadi32 addr:$dst)), addr:$dst)]>; } -def NOT8r : I<0xF6, MRM2r, (outs GR8 :$dst), (ins GR8 :$src), "not{b} $dst", +def NOT8r : I<0xF6, MRM2r, (outs GR8 :$dst), (ins GR8 :$src), "not{b}\t$dst", [(set GR8:$dst, (not GR8:$src))]>; -def NOT16r : I<0xF7, MRM2r, (outs GR16:$dst), (ins GR16:$src), "not{w} $dst", +def NOT16r : I<0xF7, MRM2r, (outs GR16:$dst), (ins GR16:$src), "not{w}\t$dst", [(set GR16:$dst, (not GR16:$src))]>, OpSize; -def NOT32r : I<0xF7, MRM2r, (outs GR32:$dst), (ins GR32:$src), "not{l} $dst", +def NOT32r : I<0xF7, MRM2r, (outs GR32:$dst), (ins GR32:$src), "not{l}\t$dst", [(set GR32:$dst, (not GR32:$src))]>; let isTwoAddress = 0 in { - def NOT8m : I<0xF6, MRM2m, (outs), (ins i8mem :$dst), "not{b} $dst", + def NOT8m : I<0xF6, MRM2m, (outs), (ins i8mem :$dst), "not{b}\t$dst", [(store (not (loadi8 addr:$dst)), addr:$dst)]>; - def NOT16m : I<0xF7, MRM2m, (outs), (ins i16mem:$dst), "not{w} $dst", + def NOT16m : I<0xF7, MRM2m, (outs), (ins i16mem:$dst), "not{w}\t$dst", [(store (not (loadi16 addr:$dst)), addr:$dst)]>, OpSize; - def NOT32m : I<0xF7, MRM2m, (outs), (ins i32mem:$dst), "not{l} $dst", + def NOT32m : I<0xF7, MRM2m, (outs), (ins i32mem:$dst), "not{l}\t$dst", [(store (not (loadi32 addr:$dst)), addr:$dst)]>; } } // CodeSize // TODO: inc/dec is slow for P4, but fast for Pentium-M. let CodeSize = 2 in -def INC8r : I<0xFE, MRM0r, (outs GR8 :$dst), (ins GR8 :$src), "inc{b} $dst", +def INC8r : I<0xFE, MRM0r, (outs GR8 :$dst), (ins GR8 :$src), "inc{b}\t$dst", [(set GR8:$dst, (add GR8:$src, 1))]>; let isConvertibleToThreeAddress = 1, CodeSize = 1 in { // Can xform into LEA. -def INC16r : I<0x40, AddRegFrm, (outs GR16:$dst), (ins GR16:$src), "inc{w} $dst", +def INC16r : I<0x40, AddRegFrm, (outs GR16:$dst), (ins GR16:$src), "inc{w}\t$dst", [(set GR16:$dst, (add GR16:$src, 1))]>, OpSize, Requires<[In32BitMode]>; -def INC32r : I<0x40, AddRegFrm, (outs GR32:$dst), (ins GR32:$src), "inc{l} $dst", +def INC32r : I<0x40, AddRegFrm, (outs GR32:$dst), (ins GR32:$src), "inc{l}\t$dst", [(set GR32:$dst, (add GR32:$src, 1))]>, Requires<[In32BitMode]>; } let isTwoAddress = 0, CodeSize = 2 in { - def INC8m : I<0xFE, MRM0m, (outs), (ins i8mem :$dst), "inc{b} $dst", + def INC8m : I<0xFE, MRM0m, (outs), (ins i8mem :$dst), "inc{b}\t$dst", [(store (add (loadi8 addr:$dst), 1), addr:$dst)]>; - def INC16m : I<0xFF, MRM0m, (outs), (ins i16mem:$dst), "inc{w} $dst", + def INC16m : I<0xFF, MRM0m, (outs), (ins i16mem:$dst), "inc{w}\t$dst", [(store (add (loadi16 addr:$dst), 1), addr:$dst)]>, OpSize; - def INC32m : I<0xFF, MRM0m, (outs), (ins i32mem:$dst), "inc{l} $dst", + def INC32m : I<0xFF, MRM0m, (outs), (ins i32mem:$dst), "inc{l}\t$dst", [(store (add (loadi32 addr:$dst), 1), addr:$dst)]>; } let CodeSize = 2 in -def DEC8r : I<0xFE, MRM1r, (outs GR8 :$dst), (ins GR8 :$src), "dec{b} $dst", +def DEC8r : I<0xFE, MRM1r, (outs GR8 :$dst), (ins GR8 :$src), "dec{b}\t$dst", [(set GR8:$dst, (add GR8:$src, -1))]>; let isConvertibleToThreeAddress = 1, CodeSize = 1 in { // Can xform into LEA. -def DEC16r : I<0x48, AddRegFrm, (outs GR16:$dst), (ins GR16:$src), "dec{w} $dst", +def DEC16r : I<0x48, AddRegFrm, (outs GR16:$dst), (ins GR16:$src), "dec{w}\t$dst", [(set GR16:$dst, (add GR16:$src, -1))]>, OpSize, Requires<[In32BitMode]>; -def DEC32r : I<0x48, AddRegFrm, (outs GR32:$dst), (ins GR32:$src), "dec{l} $dst", +def DEC32r : I<0x48, AddRegFrm, (outs GR32:$dst), (ins GR32:$src), "dec{l}\t$dst", [(set GR32:$dst, (add GR32:$src, -1))]>, Requires<[In32BitMode]>; } let isTwoAddress = 0, CodeSize = 2 in { - def DEC8m : I<0xFE, MRM1m, (outs), (ins i8mem :$dst), "dec{b} $dst", + def DEC8m : I<0xFE, MRM1m, (outs), (ins i8mem :$dst), "dec{b}\t$dst", [(store (add (loadi8 addr:$dst), -1), addr:$dst)]>; - def DEC16m : I<0xFF, MRM1m, (outs), (ins i16mem:$dst), "dec{w} $dst", + def DEC16m : I<0xFF, MRM1m, (outs), (ins i16mem:$dst), "dec{w}\t$dst", [(store (add (loadi16 addr:$dst), -1), addr:$dst)]>, OpSize; - def DEC32m : I<0xFF, MRM1m, (outs), (ins i32mem:$dst), "dec{l} $dst", + def DEC32m : I<0xFF, MRM1m, (outs), (ins i32mem:$dst), "dec{l}\t$dst", [(store (add (loadi32 addr:$dst), -1), addr:$dst)]>; } @@ -1167,155 +1166,155 @@ let isCommutable = 1 in { // X = AND Y, Z --> X = AND Z, Y def AND8rr : I<0x20, MRMDestReg, (outs GR8 :$dst), (ins GR8 :$src1, GR8 :$src2), - "and{b} {$src2, $dst|$dst, $src2}", + "and{b}\t{$src2, $dst|$dst, $src2}", [(set GR8:$dst, (and GR8:$src1, GR8:$src2))]>; def AND16rr : I<0x21, MRMDestReg, (outs GR16:$dst), (ins GR16:$src1, GR16:$src2), - "and{w} {$src2, $dst|$dst, $src2}", + "and{w}\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (and GR16:$src1, GR16:$src2))]>, OpSize; def AND32rr : I<0x21, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2), - "and{l} {$src2, $dst|$dst, $src2}", + "and{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (and GR32:$src1, GR32:$src2))]>; } def AND8rm : I<0x22, MRMSrcMem, (outs GR8 :$dst), (ins GR8 :$src1, i8mem :$src2), - "and{b} {$src2, $dst|$dst, $src2}", + "and{b}\t{$src2, $dst|$dst, $src2}", [(set GR8:$dst, (and GR8:$src1, (load addr:$src2)))]>; def AND16rm : I<0x23, MRMSrcMem, (outs GR16:$dst), (ins GR16:$src1, i16mem:$src2), - "and{w} {$src2, $dst|$dst, $src2}", + "and{w}\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (and GR16:$src1, (load addr:$src2)))]>, OpSize; def AND32rm : I<0x23, MRMSrcMem, (outs GR32:$dst), (ins GR32:$src1, i32mem:$src2), - "and{l} {$src2, $dst|$dst, $src2}", + "and{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (and GR32:$src1, (load addr:$src2)))]>; def AND8ri : Ii8<0x80, MRM4r, (outs GR8 :$dst), (ins GR8 :$src1, i8imm :$src2), - "and{b} {$src2, $dst|$dst, $src2}", + "and{b}\t{$src2, $dst|$dst, $src2}", [(set GR8:$dst, (and GR8:$src1, imm:$src2))]>; def AND16ri : Ii16<0x81, MRM4r, (outs GR16:$dst), (ins GR16:$src1, i16imm:$src2), - "and{w} {$src2, $dst|$dst, $src2}", + "and{w}\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (and GR16:$src1, imm:$src2))]>, OpSize; def AND32ri : Ii32<0x81, MRM4r, (outs GR32:$dst), (ins GR32:$src1, i32imm:$src2), - "and{l} {$src2, $dst|$dst, $src2}", + "and{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (and GR32:$src1, imm:$src2))]>; def AND16ri8 : Ii8<0x83, MRM4r, (outs GR16:$dst), (ins GR16:$src1, i16i8imm:$src2), - "and{w} {$src2, $dst|$dst, $src2}", + "and{w}\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (and GR16:$src1, i16immSExt8:$src2))]>, OpSize; def AND32ri8 : Ii8<0x83, MRM4r, (outs GR32:$dst), (ins GR32:$src1, i32i8imm:$src2), - "and{l} {$src2, $dst|$dst, $src2}", + "and{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (and GR32:$src1, i32immSExt8:$src2))]>; let isTwoAddress = 0 in { def AND8mr : I<0x20, MRMDestMem, (outs), (ins i8mem :$dst, GR8 :$src), - "and{b} {$src, $dst|$dst, $src}", + "and{b}\t{$src, $dst|$dst, $src}", [(store (and (load addr:$dst), GR8:$src), addr:$dst)]>; def AND16mr : I<0x21, MRMDestMem, (outs), (ins i16mem:$dst, GR16:$src), - "and{w} {$src, $dst|$dst, $src}", + "and{w}\t{$src, $dst|$dst, $src}", [(store (and (load addr:$dst), GR16:$src), addr:$dst)]>, OpSize; def AND32mr : I<0x21, MRMDestMem, (outs), (ins i32mem:$dst, GR32:$src), - "and{l} {$src, $dst|$dst, $src}", + "and{l}\t{$src, $dst|$dst, $src}", [(store (and (load addr:$dst), GR32:$src), addr:$dst)]>; def AND8mi : Ii8<0x80, MRM4m, (outs), (ins i8mem :$dst, i8imm :$src), - "and{b} {$src, $dst|$dst, $src}", + "and{b}\t{$src, $dst|$dst, $src}", [(store (and (loadi8 addr:$dst), imm:$src), addr:$dst)]>; def AND16mi : Ii16<0x81, MRM4m, (outs), (ins i16mem:$dst, i16imm:$src), - "and{w} {$src, $dst|$dst, $src}", + "and{w}\t{$src, $dst|$dst, $src}", [(store (and (loadi16 addr:$dst), imm:$src), addr:$dst)]>, OpSize; def AND32mi : Ii32<0x81, MRM4m, (outs), (ins i32mem:$dst, i32imm:$src), - "and{l} {$src, $dst|$dst, $src}", + "and{l}\t{$src, $dst|$dst, $src}", [(store (and (loadi32 addr:$dst), imm:$src), addr:$dst)]>; def AND16mi8 : Ii8<0x83, MRM4m, (outs), (ins i16mem:$dst, i16i8imm :$src), - "and{w} {$src, $dst|$dst, $src}", + "and{w}\t{$src, $dst|$dst, $src}", [(store (and (load addr:$dst), i16immSExt8:$src), addr:$dst)]>, OpSize; def AND32mi8 : Ii8<0x83, MRM4m, (outs), (ins i32mem:$dst, i32i8imm :$src), - "and{l} {$src, $dst|$dst, $src}", + "and{l}\t{$src, $dst|$dst, $src}", [(store (and (load addr:$dst), i32immSExt8:$src), addr:$dst)]>; } let isCommutable = 1 in { // X = OR Y, Z --> X = OR Z, Y def OR8rr : I<0x08, MRMDestReg, (outs GR8 :$dst), (ins GR8 :$src1, GR8 :$src2), - "or{b} {$src2, $dst|$dst, $src2}", + "or{b}\t{$src2, $dst|$dst, $src2}", [(set GR8:$dst, (or GR8:$src1, GR8:$src2))]>; def OR16rr : I<0x09, MRMDestReg, (outs GR16:$dst), (ins GR16:$src1, GR16:$src2), - "or{w} {$src2, $dst|$dst, $src2}", + "or{w}\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (or GR16:$src1, GR16:$src2))]>, OpSize; def OR32rr : I<0x09, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2), - "or{l} {$src2, $dst|$dst, $src2}", + "or{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (or GR32:$src1, GR32:$src2))]>; } def OR8rm : I<0x0A, MRMSrcMem , (outs GR8 :$dst), (ins GR8 :$src1, i8mem :$src2), - "or{b} {$src2, $dst|$dst, $src2}", + "or{b}\t{$src2, $dst|$dst, $src2}", [(set GR8:$dst, (or GR8:$src1, (load addr:$src2)))]>; def OR16rm : I<0x0B, MRMSrcMem , (outs GR16:$dst), (ins GR16:$src1, i16mem:$src2), - "or{w} {$src2, $dst|$dst, $src2}", + "or{w}\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (or GR16:$src1, (load addr:$src2)))]>, OpSize; def OR32rm : I<0x0B, MRMSrcMem , (outs GR32:$dst), (ins GR32:$src1, i32mem:$src2), - "or{l} {$src2, $dst|$dst, $src2}", + "or{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (or GR32:$src1, (load addr:$src2)))]>; def OR8ri : Ii8 <0x80, MRM1r, (outs GR8 :$dst), (ins GR8 :$src1, i8imm:$src2), - "or{b} {$src2, $dst|$dst, $src2}", + "or{b}\t{$src2, $dst|$dst, $src2}", [(set GR8:$dst, (or GR8:$src1, imm:$src2))]>; def OR16ri : Ii16<0x81, MRM1r, (outs GR16:$dst), (ins GR16:$src1, i16imm:$src2), - "or{w} {$src2, $dst|$dst, $src2}", + "or{w}\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (or GR16:$src1, imm:$src2))]>, OpSize; def OR32ri : Ii32<0x81, MRM1r, (outs GR32:$dst), (ins GR32:$src1, i32imm:$src2), - "or{l} {$src2, $dst|$dst, $src2}", + "or{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (or GR32:$src1, imm:$src2))]>; def OR16ri8 : Ii8<0x83, MRM1r, (outs GR16:$dst), (ins GR16:$src1, i16i8imm:$src2), - "or{w} {$src2, $dst|$dst, $src2}", + "or{w}\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (or GR16:$src1, i16immSExt8:$src2))]>, OpSize; def OR32ri8 : Ii8<0x83, MRM1r, (outs GR32:$dst), (ins GR32:$src1, i32i8imm:$src2), - "or{l} {$src2, $dst|$dst, $src2}", + "or{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (or GR32:$src1, i32immSExt8:$src2))]>; let isTwoAddress = 0 in { def OR8mr : I<0x08, MRMDestMem, (outs), (ins i8mem:$dst, GR8:$src), - "or{b} {$src, $dst|$dst, $src}", + "or{b}\t{$src, $dst|$dst, $src}", [(store (or (load addr:$dst), GR8:$src), addr:$dst)]>; def OR16mr : I<0x09, MRMDestMem, (outs), (ins i16mem:$dst, GR16:$src), - "or{w} {$src, $dst|$dst, $src}", + "or{w}\t{$src, $dst|$dst, $src}", [(store (or (load addr:$dst), GR16:$src), addr:$dst)]>, OpSize; def OR32mr : I<0x09, MRMDestMem, (outs), (ins i32mem:$dst, GR32:$src), - "or{l} {$src, $dst|$dst, $src}", + "or{l}\t{$src, $dst|$dst, $src}", [(store (or (load addr:$dst), GR32:$src), addr:$dst)]>; def OR8mi : Ii8<0x80, MRM1m, (outs), (ins i8mem :$dst, i8imm:$src), - "or{b} {$src, $dst|$dst, $src}", + "or{b}\t{$src, $dst|$dst, $src}", [(store (or (loadi8 addr:$dst), imm:$src), addr:$dst)]>; def OR16mi : Ii16<0x81, MRM1m, (outs), (ins i16mem:$dst, i16imm:$src), - "or{w} {$src, $dst|$dst, $src}", + "or{w}\t{$src, $dst|$dst, $src}", [(store (or (loadi16 addr:$dst), imm:$src), addr:$dst)]>, OpSize; def OR32mi : Ii32<0x81, MRM1m, (outs), (ins i32mem:$dst, i32imm:$src), - "or{l} {$src, $dst|$dst, $src}", + "or{l}\t{$src, $dst|$dst, $src}", [(store (or (loadi32 addr:$dst), imm:$src), addr:$dst)]>; def OR16mi8 : Ii8<0x83, MRM1m, (outs), (ins i16mem:$dst, i16i8imm:$src), - "or{w} {$src, $dst|$dst, $src}", + "or{w}\t{$src, $dst|$dst, $src}", [(store (or (load addr:$dst), i16immSExt8:$src), addr:$dst)]>, OpSize; def OR32mi8 : Ii8<0x83, MRM1m, (outs), (ins i32mem:$dst, i32i8imm:$src), - "or{l} {$src, $dst|$dst, $src}", + "or{l}\t{$src, $dst|$dst, $src}", [(store (or (load addr:$dst), i32immSExt8:$src), addr:$dst)]>; } @@ -1323,429 +1322,429 @@ let isCommutable = 1 in { // X = XOR Y, Z --> X = XOR Z, Y def XOR8rr : I<0x30, MRMDestReg, (outs GR8 :$dst), (ins GR8 :$src1, GR8 :$src2), - "xor{b} {$src2, $dst|$dst, $src2}", + "xor{b}\t{$src2, $dst|$dst, $src2}", [(set GR8:$dst, (xor GR8:$src1, GR8:$src2))]>; def XOR16rr : I<0x31, MRMDestReg, (outs GR16:$dst), (ins GR16:$src1, GR16:$src2), - "xor{w} {$src2, $dst|$dst, $src2}", + "xor{w}\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (xor GR16:$src1, GR16:$src2))]>, OpSize; def XOR32rr : I<0x31, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2), - "xor{l} {$src2, $dst|$dst, $src2}", + "xor{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (xor GR32:$src1, GR32:$src2))]>; } def XOR8rm : I<0x32, MRMSrcMem , (outs GR8 :$dst), (ins GR8:$src1, i8mem :$src2), - "xor{b} {$src2, $dst|$dst, $src2}", + "xor{b}\t{$src2, $dst|$dst, $src2}", [(set GR8:$dst, (xor GR8:$src1, (load addr:$src2)))]>; def XOR16rm : I<0x33, MRMSrcMem , (outs GR16:$dst), (ins GR16:$src1, i16mem:$src2), - "xor{w} {$src2, $dst|$dst, $src2}", + "xor{w}\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (xor GR16:$src1, (load addr:$src2)))]>, OpSize; def XOR32rm : I<0x33, MRMSrcMem , (outs GR32:$dst), (ins GR32:$src1, i32mem:$src2), - "xor{l} {$src2, $dst|$dst, $src2}", + "xor{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (xor GR32:$src1, (load addr:$src2)))]>; def XOR8ri : Ii8<0x80, MRM6r, (outs GR8:$dst), (ins GR8:$src1, i8imm:$src2), - "xor{b} {$src2, $dst|$dst, $src2}", + "xor{b}\t{$src2, $dst|$dst, $src2}", [(set GR8:$dst, (xor GR8:$src1, imm:$src2))]>; def XOR16ri : Ii16<0x81, MRM6r, (outs GR16:$dst), (ins GR16:$src1, i16imm:$src2), - "xor{w} {$src2, $dst|$dst, $src2}", + "xor{w}\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (xor GR16:$src1, imm:$src2))]>, OpSize; def XOR32ri : Ii32<0x81, MRM6r, (outs GR32:$dst), (ins GR32:$src1, i32imm:$src2), - "xor{l} {$src2, $dst|$dst, $src2}", + "xor{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (xor GR32:$src1, imm:$src2))]>; def XOR16ri8 : Ii8<0x83, MRM6r, (outs GR16:$dst), (ins GR16:$src1, i16i8imm:$src2), - "xor{w} {$src2, $dst|$dst, $src2}", + "xor{w}\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (xor GR16:$src1, i16immSExt8:$src2))]>, OpSize; def XOR32ri8 : Ii8<0x83, MRM6r, (outs GR32:$dst), (ins GR32:$src1, i32i8imm:$src2), - "xor{l} {$src2, $dst|$dst, $src2}", + "xor{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (xor GR32:$src1, i32immSExt8:$src2))]>; let isTwoAddress = 0 in { def XOR8mr : I<0x30, MRMDestMem, (outs), (ins i8mem :$dst, GR8 :$src), - "xor{b} {$src, $dst|$dst, $src}", + "xor{b}\t{$src, $dst|$dst, $src}", [(store (xor (load addr:$dst), GR8:$src), addr:$dst)]>; def XOR16mr : I<0x31, MRMDestMem, (outs), (ins i16mem:$dst, GR16:$src), - "xor{w} {$src, $dst|$dst, $src}", + "xor{w}\t{$src, $dst|$dst, $src}", [(store (xor (load addr:$dst), GR16:$src), addr:$dst)]>, OpSize; def XOR32mr : I<0x31, MRMDestMem, (outs), (ins i32mem:$dst, GR32:$src), - "xor{l} {$src, $dst|$dst, $src}", + "xor{l}\t{$src, $dst|$dst, $src}", [(store (xor (load addr:$dst), GR32:$src), addr:$dst)]>; def XOR8mi : Ii8<0x80, MRM6m, (outs), (ins i8mem :$dst, i8imm :$src), - "xor{b} {$src, $dst|$dst, $src}", + "xor{b}\t{$src, $dst|$dst, $src}", [(store (xor (loadi8 addr:$dst), imm:$src), addr:$dst)]>; def XOR16mi : Ii16<0x81, MRM6m, (outs), (ins i16mem:$dst, i16imm:$src), - "xor{w} {$src, $dst|$dst, $src}", + "xor{w}\t{$src, $dst|$dst, $src}", [(store (xor (loadi16 addr:$dst), imm:$src), addr:$dst)]>, OpSize; def XOR32mi : Ii32<0x81, MRM6m, (outs), (ins i32mem:$dst, i32imm:$src), - "xor{l} {$src, $dst|$dst, $src}", + "xor{l}\t{$src, $dst|$dst, $src}", [(store (xor (loadi32 addr:$dst), imm:$src), addr:$dst)]>; def XOR16mi8 : Ii8<0x83, MRM6m, (outs), (ins i16mem:$dst, i16i8imm :$src), - "xor{w} {$src, $dst|$dst, $src}", + "xor{w}\t{$src, $dst|$dst, $src}", [(store (xor (load addr:$dst), i16immSExt8:$src), addr:$dst)]>, OpSize; def XOR32mi8 : Ii8<0x83, MRM6m, (outs), (ins i32mem:$dst, i32i8imm :$src), - "xor{l} {$src, $dst|$dst, $src}", + "xor{l}\t{$src, $dst|$dst, $src}", [(store (xor (load addr:$dst), i32immSExt8:$src), addr:$dst)]>; } // Shift instructions def SHL8rCL : I<0xD2, MRM4r, (outs GR8 :$dst), (ins GR8 :$src), - "shl{b} {%cl, $dst|$dst, %CL}", + "shl{b}\t{%cl, $dst|$dst, %CL}", [(set GR8:$dst, (shl GR8:$src, CL))]>, Imp<[CL],[]>; def SHL16rCL : I<0xD3, MRM4r, (outs GR16:$dst), (ins GR16:$src), - "shl{w} {%cl, $dst|$dst, %CL}", + "shl{w}\t{%cl, $dst|$dst, %CL}", [(set GR16:$dst, (shl GR16:$src, CL))]>, Imp<[CL],[]>, OpSize; def SHL32rCL : I<0xD3, MRM4r, (outs GR32:$dst), (ins GR32:$src), - "shl{l} {%cl, $dst|$dst, %CL}", + "shl{l}\t{%cl, $dst|$dst, %CL}", [(set GR32:$dst, (shl GR32:$src, CL))]>, Imp<[CL],[]>; def SHL8ri : Ii8<0xC0, MRM4r, (outs GR8 :$dst), (ins GR8 :$src1, i8imm:$src2), - "shl{b} {$src2, $dst|$dst, $src2}", + "shl{b}\t{$src2, $dst|$dst, $src2}", [(set GR8:$dst, (shl GR8:$src1, (i8 imm:$src2)))]>; let isConvertibleToThreeAddress = 1 in { // Can transform into LEA. def SHL16ri : Ii8<0xC1, MRM4r, (outs GR16:$dst), (ins GR16:$src1, i8imm:$src2), - "shl{w} {$src2, $dst|$dst, $src2}", + "shl{w}\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (shl GR16:$src1, (i8 imm:$src2)))]>, OpSize; def SHL32ri : Ii8<0xC1, MRM4r, (outs GR32:$dst), (ins GR32:$src1, i8imm:$src2), - "shl{l} {$src2, $dst|$dst, $src2}", + "shl{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (shl GR32:$src1, (i8 imm:$src2)))]>; } // Shift left by one. Not used because (add x, x) is slightly cheaper. def SHL8r1 : I<0xD0, MRM4r, (outs GR8 :$dst), (ins GR8 :$src1), - "shl{b} $dst", []>; + "shl{b}\t$dst", []>; def SHL16r1 : I<0xD1, MRM4r, (outs GR16:$dst), (ins GR16:$src1), - "shl{w} $dst", []>, OpSize; + "shl{w}\t$dst", []>, OpSize; def SHL32r1 : I<0xD1, MRM4r, (outs GR32:$dst), (ins GR32:$src1), - "shl{l} $dst", []>; + "shl{l}\t$dst", []>; let isTwoAddress = 0 in { def SHL8mCL : I<0xD2, MRM4m, (outs), (ins i8mem :$dst), - "shl{b} {%cl, $dst|$dst, %CL}", + "shl{b}\t{%cl, $dst|$dst, %CL}", [(store (shl (loadi8 addr:$dst), CL), addr:$dst)]>, Imp<[CL],[]>; def SHL16mCL : I<0xD3, MRM4m, (outs), (ins i16mem:$dst), - "shl{w} {%cl, $dst|$dst, %CL}", + "shl{w}\t{%cl, $dst|$dst, %CL}", [(store (shl (loadi16 addr:$dst), CL), addr:$dst)]>, Imp<[CL],[]>, OpSize; def SHL32mCL : I<0xD3, MRM4m, (outs), (ins i32mem:$dst), - "shl{l} {%cl, $dst|$dst, %CL}", + "shl{l}\t{%cl, $dst|$dst, %CL}", [(store (shl (loadi32 addr:$dst), CL), addr:$dst)]>, Imp<[CL],[]>; def SHL8mi : Ii8<0xC0, MRM4m, (outs), (ins i8mem :$dst, i8imm:$src), - "shl{b} {$src, $dst|$dst, $src}", + "shl{b}\t{$src, $dst|$dst, $src}", [(store (shl (loadi8 addr:$dst), (i8 imm:$src)), addr:$dst)]>; def SHL16mi : Ii8<0xC1, MRM4m, (outs), (ins i16mem:$dst, i8imm:$src), - "shl{w} {$src, $dst|$dst, $src}", + "shl{w}\t{$src, $dst|$dst, $src}", [(store (shl (loadi16 addr:$dst), (i8 imm:$src)), addr:$dst)]>, OpSize; def SHL32mi : Ii8<0xC1, MRM4m, (outs), (ins i32mem:$dst, i8imm:$src), - "shl{l} {$src, $dst|$dst, $src}", + "shl{l}\t{$src, $dst|$dst, $src}", [(store (shl (loadi32 addr:$dst), (i8 imm:$src)), addr:$dst)]>; // Shift by 1 def SHL8m1 : I<0xD0, MRM4m, (outs), (ins i8mem :$dst), - "shl{b} $dst", + "shl{b}\t$dst", [(store (shl (loadi8 addr:$dst), (i8 1)), addr:$dst)]>; def SHL16m1 : I<0xD1, MRM4m, (outs), (ins i16mem:$dst), - "shl{w} $dst", + "shl{w}\t$dst", [(store (shl (loadi16 addr:$dst), (i8 1)), addr:$dst)]>, OpSize; def SHL32m1 : I<0xD1, MRM4m, (outs), (ins i32mem:$dst), - "shl{l} $dst", + "shl{l}\t$dst", [(store (shl (loadi32 addr:$dst), (i8 1)), addr:$dst)]>; } def SHR8rCL : I<0xD2, MRM5r, (outs GR8 :$dst), (ins GR8 :$src), - "shr{b} {%cl, $dst|$dst, %CL}", + "shr{b}\t{%cl, $dst|$dst, %CL}", [(set GR8:$dst, (srl GR8:$src, CL))]>, Imp<[CL],[]>; def SHR16rCL : I<0xD3, MRM5r, (outs GR16:$dst), (ins GR16:$src), - "shr{w} {%cl, $dst|$dst, %CL}", + "shr{w}\t{%cl, $dst|$dst, %CL}", [(set GR16:$dst, (srl GR16:$src, CL))]>, Imp<[CL],[]>, OpSize; def SHR32rCL : I<0xD3, MRM5r, (outs GR32:$dst), (ins GR32:$src), - "shr{l} {%cl, $dst|$dst, %CL}", + "shr{l}\t{%cl, $dst|$dst, %CL}", [(set GR32:$dst, (srl GR32:$src, CL))]>, Imp<[CL],[]>; def SHR8ri : Ii8<0xC0, MRM5r, (outs GR8:$dst), (ins GR8:$src1, i8imm:$src2), - "shr{b} {$src2, $dst|$dst, $src2}", + "shr{b}\t{$src2, $dst|$dst, $src2}", [(set GR8:$dst, (srl GR8:$src1, (i8 imm:$src2)))]>; def SHR16ri : Ii8<0xC1, MRM5r, (outs GR16:$dst), (ins GR16:$src1, i8imm:$src2), - "shr{w} {$src2, $dst|$dst, $src2}", + "shr{w}\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (srl GR16:$src1, (i8 imm:$src2)))]>, OpSize; def SHR32ri : Ii8<0xC1, MRM5r, (outs GR32:$dst), (ins GR32:$src1, i8imm:$src2), - "shr{l} {$src2, $dst|$dst, $src2}", + "shr{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (srl GR32:$src1, (i8 imm:$src2)))]>; // Shift by 1 def SHR8r1 : I<0xD0, MRM5r, (outs GR8:$dst), (ins GR8:$src1), - "shr{b} $dst", + "shr{b}\t$dst", [(set GR8:$dst, (srl GR8:$src1, (i8 1)))]>; def SHR16r1 : I<0xD1, MRM5r, (outs GR16:$dst), (ins GR16:$src1), - "shr{w} $dst", + "shr{w}\t$dst", [(set GR16:$dst, (srl GR16:$src1, (i8 1)))]>, OpSize; def SHR32r1 : I<0xD1, MRM5r, (outs GR32:$dst), (ins GR32:$src1), - "shr{l} $dst", + "shr{l}\t$dst", [(set GR32:$dst, (srl GR32:$src1, (i8 1)))]>; let isTwoAddress = 0 in { def SHR8mCL : I<0xD2, MRM5m, (outs), (ins i8mem :$dst), - "shr{b} {%cl, $dst|$dst, %CL}", + "shr{b}\t{%cl, $dst|$dst, %CL}", [(store (srl (loadi8 addr:$dst), CL), addr:$dst)]>, Imp<[CL],[]>; def SHR16mCL : I<0xD3, MRM5m, (outs), (ins i16mem:$dst), - "shr{w} {%cl, $dst|$dst, %CL}", + "shr{w}\t{%cl, $dst|$dst, %CL}", [(store (srl (loadi16 addr:$dst), CL), addr:$dst)]>, Imp<[CL],[]>, OpSize; def SHR32mCL : I<0xD3, MRM5m, (outs), (ins i32mem:$dst), - "shr{l} {%cl, $dst|$dst, %CL}", + "shr{l}\t{%cl, $dst|$dst, %CL}", [(store (srl (loadi32 addr:$dst), CL), addr:$dst)]>, Imp<[CL],[]>; def SHR8mi : Ii8<0xC0, MRM5m, (outs), (ins i8mem :$dst, i8imm:$src), - "shr{b} {$src, $dst|$dst, $src}", + "shr{b}\t{$src, $dst|$dst, $src}", [(store (srl (loadi8 addr:$dst), (i8 imm:$src)), addr:$dst)]>; def SHR16mi : Ii8<0xC1, MRM5m, (outs), (ins i16mem:$dst, i8imm:$src), - "shr{w} {$src, $dst|$dst, $src}", + "shr{w}\t{$src, $dst|$dst, $src}", [(store (srl (loadi16 addr:$dst), (i8 imm:$src)), addr:$dst)]>, OpSize; def SHR32mi : Ii8<0xC1, MRM5m, (outs), (ins i32mem:$dst, i8imm:$src), - "shr{l} {$src, $dst|$dst, $src}", + "shr{l}\t{$src, $dst|$dst, $src}", [(store (srl (loadi32 addr:$dst), (i8 imm:$src)), addr:$dst)]>; // Shift by 1 def SHR8m1 : I<0xD0, MRM5m, (outs), (ins i8mem :$dst), - "shr{b} $dst", + "shr{b}\t$dst", [(store (srl (loadi8 addr:$dst), (i8 1)), addr:$dst)]>; def SHR16m1 : I<0xD1, MRM5m, (outs), (ins i16mem:$dst), - "shr{w} $dst", + "shr{w}\t$dst", [(store (srl (loadi16 addr:$dst), (i8 1)), addr:$dst)]>,OpSize; def SHR32m1 : I<0xD1, MRM5m, (outs), (ins i32mem:$dst), - "shr{l} $dst", + "shr{l}\t$dst", [(store (srl (loadi32 addr:$dst), (i8 1)), addr:$dst)]>; } def SAR8rCL : I<0xD2, MRM7r, (outs GR8 :$dst), (ins GR8 :$src), - "sar{b} {%cl, $dst|$dst, %CL}", + "sar{b}\t{%cl, $dst|$dst, %CL}", [(set GR8:$dst, (sra GR8:$src, CL))]>, Imp<[CL],[]>; def SAR16rCL : I<0xD3, MRM7r, (outs GR16:$dst), (ins GR16:$src), - "sar{w} {%cl, $dst|$dst, %CL}", + "sar{w}\t{%cl, $dst|$dst, %CL}", [(set GR16:$dst, (sra GR16:$src, CL))]>, Imp<[CL],[]>, OpSize; def SAR32rCL : I<0xD3, MRM7r, (outs GR32:$dst), (ins GR32:$src), - "sar{l} {%cl, $dst|$dst, %CL}", + "sar{l}\t{%cl, $dst|$dst, %CL}", [(set GR32:$dst, (sra GR32:$src, CL))]>, Imp<[CL],[]>; def SAR8ri : Ii8<0xC0, MRM7r, (outs GR8 :$dst), (ins GR8 :$src1, i8imm:$src2), - "sar{b} {$src2, $dst|$dst, $src2}", + "sar{b}\t{$src2, $dst|$dst, $src2}", [(set GR8:$dst, (sra GR8:$src1, (i8 imm:$src2)))]>; def SAR16ri : Ii8<0xC1, MRM7r, (outs GR16:$dst), (ins GR16:$src1, i8imm:$src2), - "sar{w} {$src2, $dst|$dst, $src2}", + "sar{w}\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (sra GR16:$src1, (i8 imm:$src2)))]>, OpSize; def SAR32ri : Ii8<0xC1, MRM7r, (outs GR32:$dst), (ins GR32:$src1, i8imm:$src2), - "sar{l} {$src2, $dst|$dst, $src2}", + "sar{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (sra GR32:$src1, (i8 imm:$src2)))]>; // Shift by 1 def SAR8r1 : I<0xD0, MRM7r, (outs GR8 :$dst), (ins GR8 :$src1), - "sar{b} $dst", + "sar{b}\t$dst", [(set GR8:$dst, (sra GR8:$src1, (i8 1)))]>; def SAR16r1 : I<0xD1, MRM7r, (outs GR16:$dst), (ins GR16:$src1), - "sar{w} $dst", + "sar{w}\t$dst", [(set GR16:$dst, (sra GR16:$src1, (i8 1)))]>, OpSize; def SAR32r1 : I<0xD1, MRM7r, (outs GR32:$dst), (ins GR32:$src1), - "sar{l} $dst", + "sar{l}\t$dst", [(set GR32:$dst, (sra GR32:$src1, (i8 1)))]>; let isTwoAddress = 0 in { def SAR8mCL : I<0xD2, MRM7m, (outs), (ins i8mem :$dst), - "sar{b} {%cl, $dst|$dst, %CL}", + "sar{b}\t{%cl, $dst|$dst, %CL}", [(store (sra (loadi8 addr:$dst), CL), addr:$dst)]>, Imp<[CL],[]>; def SAR16mCL : I<0xD3, MRM7m, (outs), (ins i16mem:$dst), - "sar{w} {%cl, $dst|$dst, %CL}", + "sar{w}\t{%cl, $dst|$dst, %CL}", [(store (sra (loadi16 addr:$dst), CL), addr:$dst)]>, Imp<[CL],[]>, OpSize; def SAR32mCL : I<0xD3, MRM7m, (outs), (ins i32mem:$dst), - "sar{l} {%cl, $dst|$dst, %CL}", + "sar{l}\t{%cl, $dst|$dst, %CL}", [(store (sra (loadi32 addr:$dst), CL), addr:$dst)]>, Imp<[CL],[]>; def SAR8mi : Ii8<0xC0, MRM7m, (outs), (ins i8mem :$dst, i8imm:$src), - "sar{b} {$src, $dst|$dst, $src}", + "sar{b}\t{$src, $dst|$dst, $src}", [(store (sra (loadi8 addr:$dst), (i8 imm:$src)), addr:$dst)]>; def SAR16mi : Ii8<0xC1, MRM7m, (outs), (ins i16mem:$dst, i8imm:$src), - "sar{w} {$src, $dst|$dst, $src}", + "sar{w}\t{$src, $dst|$dst, $src}", [(store (sra (loadi16 addr:$dst), (i8 imm:$src)), addr:$dst)]>, OpSize; def SAR32mi : Ii8<0xC1, MRM7m, (outs), (ins i32mem:$dst, i8imm:$src), - "sar{l} {$src, $dst|$dst, $src}", + "sar{l}\t{$src, $dst|$dst, $src}", [(store (sra (loadi32 addr:$dst), (i8 imm:$src)), addr:$dst)]>; // Shift by 1 def SAR8m1 : I<0xD0, MRM7m, (outs), (ins i8mem :$dst), - "sar{b} $dst", + "sar{b}\t$dst", [(store (sra (loadi8 addr:$dst), (i8 1)), addr:$dst)]>; def SAR16m1 : I<0xD1, MRM7m, (outs), (ins i16mem:$dst), - "sar{w} $dst", + "sar{w}\t$dst", [(store (sra (loadi16 addr:$dst), (i8 1)), addr:$dst)]>, OpSize; def SAR32m1 : I<0xD1, MRM7m, (outs), (ins i32mem:$dst), - "sar{l} $dst", + "sar{l}\t$dst", [(store (sra (loadi32 addr:$dst), (i8 1)), addr:$dst)]>; } // Rotate instructions // FIXME: provide shorter instructions when imm8 == 1 def ROL8rCL : I<0xD2, MRM0r, (outs GR8 :$dst), (ins GR8 :$src), - "rol{b} {%cl, $dst|$dst, %CL}", + "rol{b}\t{%cl, $dst|$dst, %CL}", [(set GR8:$dst, (rotl GR8:$src, CL))]>, Imp<[CL],[]>; def ROL16rCL : I<0xD3, MRM0r, (outs GR16:$dst), (ins GR16:$src), - "rol{w} {%cl, $dst|$dst, %CL}", + "rol{w}\t{%cl, $dst|$dst, %CL}", [(set GR16:$dst, (rotl GR16:$src, CL))]>, Imp<[CL],[]>, OpSize; def ROL32rCL : I<0xD3, MRM0r, (outs GR32:$dst), (ins GR32:$src), - "rol{l} {%cl, $dst|$dst, %CL}", + "rol{l}\t{%cl, $dst|$dst, %CL}", [(set GR32:$dst, (rotl GR32:$src, CL))]>, Imp<[CL],[]>; def ROL8ri : Ii8<0xC0, MRM0r, (outs GR8 :$dst), (ins GR8 :$src1, i8imm:$src2), - "rol{b} {$src2, $dst|$dst, $src2}", + "rol{b}\t{$src2, $dst|$dst, $src2}", [(set GR8:$dst, (rotl GR8:$src1, (i8 imm:$src2)))]>; def ROL16ri : Ii8<0xC1, MRM0r, (outs GR16:$dst), (ins GR16:$src1, i8imm:$src2), - "rol{w} {$src2, $dst|$dst, $src2}", + "rol{w}\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (rotl GR16:$src1, (i8 imm:$src2)))]>, OpSize; def ROL32ri : Ii8<0xC1, MRM0r, (outs GR32:$dst), (ins GR32:$src1, i8imm:$src2), - "rol{l} {$src2, $dst|$dst, $src2}", + "rol{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (rotl GR32:$src1, (i8 imm:$src2)))]>; // Rotate by 1 def ROL8r1 : I<0xD0, MRM0r, (outs GR8 :$dst), (ins GR8 :$src1), - "rol{b} $dst", + "rol{b}\t$dst", [(set GR8:$dst, (rotl GR8:$src1, (i8 1)))]>; def ROL16r1 : I<0xD1, MRM0r, (outs GR16:$dst), (ins GR16:$src1), - "rol{w} $dst", + "rol{w}\t$dst", [(set GR16:$dst, (rotl GR16:$src1, (i8 1)))]>, OpSize; def ROL32r1 : I<0xD1, MRM0r, (outs GR32:$dst), (ins GR32:$src1), - "rol{l} $dst", + "rol{l}\t$dst", [(set GR32:$dst, (rotl GR32:$src1, (i8 1)))]>; let isTwoAddress = 0 in { def ROL8mCL : I<0xD2, MRM0m, (outs), (ins i8mem :$dst), - "rol{b} {%cl, $dst|$dst, %CL}", + "rol{b}\t{%cl, $dst|$dst, %CL}", [(store (rotl (loadi8 addr:$dst), CL), addr:$dst)]>, Imp<[CL],[]>; def ROL16mCL : I<0xD3, MRM0m, (outs), (ins i16mem:$dst), - "rol{w} {%cl, $dst|$dst, %CL}", + "rol{w}\t{%cl, $dst|$dst, %CL}", [(store (rotl (loadi16 addr:$dst), CL), addr:$dst)]>, Imp<[CL],[]>, OpSize; def ROL32mCL : I<0xD3, MRM0m, (outs), (ins i32mem:$dst), - "rol{l} {%cl, $dst|$dst, %CL}", + "rol{l}\t{%cl, $dst|$dst, %CL}", [(store (rotl (loadi32 addr:$dst), CL), addr:$dst)]>, Imp<[CL],[]>; def ROL8mi : Ii8<0xC0, MRM0m, (outs), (ins i8mem :$dst, i8imm:$src), - "rol{b} {$src, $dst|$dst, $src}", + "rol{b}\t{$src, $dst|$dst, $src}", [(store (rotl (loadi8 addr:$dst), (i8 imm:$src)), addr:$dst)]>; def ROL16mi : Ii8<0xC1, MRM0m, (outs), (ins i16mem:$dst, i8imm:$src), - "rol{w} {$src, $dst|$dst, $src}", + "rol{w}\t{$src, $dst|$dst, $src}", [(store (rotl (loadi16 addr:$dst), (i8 imm:$src)), addr:$dst)]>, OpSize; def ROL32mi : Ii8<0xC1, MRM0m, (outs), (ins i32mem:$dst, i8imm:$src), - "rol{l} {$src, $dst|$dst, $src}", + "rol{l}\t{$src, $dst|$dst, $src}", [(store (rotl (loadi32 addr:$dst), (i8 imm:$src)), addr:$dst)]>; // Rotate by 1 def ROL8m1 : I<0xD0, MRM0m, (outs), (ins i8mem :$dst), - "rol{b} $dst", + "rol{b}\t$dst", [(store (rotl (loadi8 addr:$dst), (i8 1)), addr:$dst)]>; def ROL16m1 : I<0xD1, MRM0m, (outs), (ins i16mem:$dst), - "rol{w} $dst", + "rol{w}\t$dst", [(store (rotl (loadi16 addr:$dst), (i8 1)), addr:$dst)]>, OpSize; def ROL32m1 : I<0xD1, MRM0m, (outs), (ins i32mem:$dst), - "rol{l} $dst", + "rol{l}\t$dst", [(store (rotl (loadi32 addr:$dst), (i8 1)), addr:$dst)]>; } def ROR8rCL : I<0xD2, MRM1r, (outs GR8 :$dst), (ins GR8 :$src), - "ror{b} {%cl, $dst|$dst, %CL}", + "ror{b}\t{%cl, $dst|$dst, %CL}", [(set GR8:$dst, (rotr GR8:$src, CL))]>, Imp<[CL],[]>; def ROR16rCL : I<0xD3, MRM1r, (outs GR16:$dst), (ins GR16:$src), - "ror{w} {%cl, $dst|$dst, %CL}", + "ror{w}\t{%cl, $dst|$dst, %CL}", [(set GR16:$dst, (rotr GR16:$src, CL))]>, Imp<[CL],[]>, OpSize; def ROR32rCL : I<0xD3, MRM1r, (outs GR32:$dst), (ins GR32:$src), - "ror{l} {%cl, $dst|$dst, %CL}", + "ror{l}\t{%cl, $dst|$dst, %CL}", [(set GR32:$dst, (rotr GR32:$src, CL))]>, Imp<[CL],[]>; def ROR8ri : Ii8<0xC0, MRM1r, (outs GR8 :$dst), (ins GR8 :$src1, i8imm:$src2), - "ror{b} {$src2, $dst|$dst, $src2}", + "ror{b}\t{$src2, $dst|$dst, $src2}", [(set GR8:$dst, (rotr GR8:$src1, (i8 imm:$src2)))]>; def ROR16ri : Ii8<0xC1, MRM1r, (outs GR16:$dst), (ins GR16:$src1, i8imm:$src2), - "ror{w} {$src2, $dst|$dst, $src2}", + "ror{w}\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (rotr GR16:$src1, (i8 imm:$src2)))]>, OpSize; def ROR32ri : Ii8<0xC1, MRM1r, (outs GR32:$dst), (ins GR32:$src1, i8imm:$src2), - "ror{l} {$src2, $dst|$dst, $src2}", + "ror{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (rotr GR32:$src1, (i8 imm:$src2)))]>; // Rotate by 1 def ROR8r1 : I<0xD0, MRM1r, (outs GR8 :$dst), (ins GR8 :$src1), - "ror{b} $dst", + "ror{b}\t$dst", [(set GR8:$dst, (rotr GR8:$src1, (i8 1)))]>; def ROR16r1 : I<0xD1, MRM1r, (outs GR16:$dst), (ins GR16:$src1), - "ror{w} $dst", + "ror{w}\t$dst", [(set GR16:$dst, (rotr GR16:$src1, (i8 1)))]>, OpSize; def ROR32r1 : I<0xD1, MRM1r, (outs GR32:$dst), (ins GR32:$src1), - "ror{l} $dst", + "ror{l}\t$dst", [(set GR32:$dst, (rotr GR32:$src1, (i8 1)))]>; let isTwoAddress = 0 in { def ROR8mCL : I<0xD2, MRM1m, (outs), (ins i8mem :$dst), - "ror{b} {%cl, $dst|$dst, %CL}", + "ror{b}\t{%cl, $dst|$dst, %CL}", [(store (rotr (loadi8 addr:$dst), CL), addr:$dst)]>, Imp<[CL],[]>; def ROR16mCL : I<0xD3, MRM1m, (outs), (ins i16mem:$dst), - "ror{w} {%cl, $dst|$dst, %CL}", + "ror{w}\t{%cl, $dst|$dst, %CL}", [(store (rotr (loadi16 addr:$dst), CL), addr:$dst)]>, Imp<[CL],[]>, OpSize; def ROR32mCL : I<0xD3, MRM1m, (outs), (ins i32mem:$dst), - "ror{l} {%cl, $dst|$dst, %CL}", + "ror{l}\t{%cl, $dst|$dst, %CL}", [(store (rotr (loadi32 addr:$dst), CL), addr:$dst)]>, Imp<[CL],[]>; def ROR8mi : Ii8<0xC0, MRM1m, (outs), (ins i8mem :$dst, i8imm:$src), - "ror{b} {$src, $dst|$dst, $src}", + "ror{b}\t{$src, $dst|$dst, $src}", [(store (rotr (loadi8 addr:$dst), (i8 imm:$src)), addr:$dst)]>; def ROR16mi : Ii8<0xC1, MRM1m, (outs), (ins i16mem:$dst, i8imm:$src), - "ror{w} {$src, $dst|$dst, $src}", + "ror{w}\t{$src, $dst|$dst, $src}", [(store (rotr (loadi16 addr:$dst), (i8 imm:$src)), addr:$dst)]>, OpSize; def ROR32mi : Ii8<0xC1, MRM1m, (outs), (ins i32mem:$dst, i8imm:$src), - "ror{l} {$src, $dst|$dst, $src}", + "ror{l}\t{$src, $dst|$dst, $src}", [(store (rotr (loadi32 addr:$dst), (i8 imm:$src)), addr:$dst)]>; // Rotate by 1 def ROR8m1 : I<0xD0, MRM1m, (outs), (ins i8mem :$dst), - "ror{b} $dst", + "ror{b}\t$dst", [(store (rotr (loadi8 addr:$dst), (i8 1)), addr:$dst)]>; def ROR16m1 : I<0xD1, MRM1m, (outs), (ins i16mem:$dst), - "ror{w} $dst", + "ror{w}\t$dst", [(store (rotr (loadi16 addr:$dst), (i8 1)), addr:$dst)]>, OpSize; def ROR32m1 : I<0xD1, MRM1m, (outs), (ins i32mem:$dst), - "ror{l} $dst", + "ror{l}\t$dst", [(store (rotr (loadi32 addr:$dst), (i8 1)), addr:$dst)]>; } @@ -1753,44 +1752,44 @@ // Double shift instructions (generalizations of rotate) def SHLD32rrCL : I<0xA5, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2), - "shld{l} {%cl, $src2, $dst|$dst, $src2, %CL}", + "shld{l}\t{%cl, $src2, $dst|$dst, $src2, %CL}", [(set GR32:$dst, (X86shld GR32:$src1, GR32:$src2, CL))]>, Imp<[CL],[]>, TB; def SHRD32rrCL : I<0xAD, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2), - "shrd{l} {%cl, $src2, $dst|$dst, $src2, %CL}", + "shrd{l}\t{%cl, $src2, $dst|$dst, $src2, %CL}", [(set GR32:$dst, (X86shrd GR32:$src1, GR32:$src2, CL))]>, Imp<[CL],[]>, TB; def SHLD16rrCL : I<0xA5, MRMDestReg, (outs GR16:$dst), (ins GR16:$src1, GR16:$src2), - "shld{w} {%cl, $src2, $dst|$dst, $src2, %CL}", + "shld{w}\t{%cl, $src2, $dst|$dst, $src2, %CL}", [(set GR16:$dst, (X86shld GR16:$src1, GR16:$src2, CL))]>, Imp<[CL],[]>, TB, OpSize; def SHRD16rrCL : I<0xAD, MRMDestReg, (outs GR16:$dst), (ins GR16:$src1, GR16:$src2), - "shrd{w} {%cl, $src2, $dst|$dst, $src2, %CL}", + "shrd{w}\t{%cl, $src2, $dst|$dst, $src2, %CL}", [(set GR16:$dst, (X86shrd GR16:$src1, GR16:$src2, CL))]>, Imp<[CL],[]>, TB, OpSize; let isCommutable = 1 in { // These instructions commute to each other. def SHLD32rri8 : Ii8<0xA4, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2, i8imm:$src3), - "shld{l} {$src3, $src2, $dst|$dst, $src2, $src3}", + "shld{l}\t{$src3, $src2, $dst|$dst, $src2, $src3}", [(set GR32:$dst, (X86shld GR32:$src1, GR32:$src2, (i8 imm:$src3)))]>, TB; def SHRD32rri8 : Ii8<0xAC, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2, i8imm:$src3), - "shrd{l} {$src3, $src2, $dst|$dst, $src2, $src3}", + "shrd{l}\t{$src3, $src2, $dst|$dst, $src2, $src3}", [(set GR32:$dst, (X86shrd GR32:$src1, GR32:$src2, (i8 imm:$src3)))]>, TB; def SHLD16rri8 : Ii8<0xA4, MRMDestReg, (outs GR16:$dst), (ins GR16:$src1, GR16:$src2, i8imm:$src3), - "shld{w} {$src3, $src2, $dst|$dst, $src2, $src3}", + "shld{w}\t{$src3, $src2, $dst|$dst, $src2, $src3}", [(set GR16:$dst, (X86shld GR16:$src1, GR16:$src2, (i8 imm:$src3)))]>, TB, OpSize; def SHRD16rri8 : Ii8<0xAC, MRMDestReg, (outs GR16:$dst), (ins GR16:$src1, GR16:$src2, i8imm:$src3), - "shrd{w} {$src3, $src2, $dst|$dst, $src2, $src3}", + "shrd{w}\t{$src3, $src2, $dst|$dst, $src2, $src3}", [(set GR16:$dst, (X86shrd GR16:$src1, GR16:$src2, (i8 imm:$src3)))]>, TB, OpSize; @@ -1798,47 +1797,47 @@ let isTwoAddress = 0 in { def SHLD32mrCL : I<0xA5, MRMDestMem, (outs), (ins i32mem:$dst, GR32:$src2), - "shld{l} {%cl, $src2, $dst|$dst, $src2, %CL}", + "shld{l}\t{%cl, $src2, $dst|$dst, $src2, %CL}", [(store (X86shld (loadi32 addr:$dst), GR32:$src2, CL), addr:$dst)]>, Imp<[CL],[]>, TB; def SHRD32mrCL : I<0xAD, MRMDestMem, (outs), (ins i32mem:$dst, GR32:$src2), - "shrd{l} {%cl, $src2, $dst|$dst, $src2, %CL}", + "shrd{l}\t{%cl, $src2, $dst|$dst, $src2, %CL}", [(store (X86shrd (loadi32 addr:$dst), GR32:$src2, CL), addr:$dst)]>, Imp<[CL],[]>, TB; def SHLD32mri8 : Ii8<0xA4, MRMDestMem, (outs), (ins i32mem:$dst, GR32:$src2, i8imm:$src3), - "shld{l} {$src3, $src2, $dst|$dst, $src2, $src3}", + "shld{l}\t{$src3, $src2, $dst|$dst, $src2, $src3}", [(store (X86shld (loadi32 addr:$dst), GR32:$src2, (i8 imm:$src3)), addr:$dst)]>, TB; def SHRD32mri8 : Ii8<0xAC, MRMDestMem, (outs), (ins i32mem:$dst, GR32:$src2, i8imm:$src3), - "shrd{l} {$src3, $src2, $dst|$dst, $src2, $src3}", + "shrd{l}\t{$src3, $src2, $dst|$dst, $src2, $src3}", [(store (X86shrd (loadi32 addr:$dst), GR32:$src2, (i8 imm:$src3)), addr:$dst)]>, TB; def SHLD16mrCL : I<0xA5, MRMDestMem, (outs), (ins i16mem:$dst, GR16:$src2), - "shld{w} {%cl, $src2, $dst|$dst, $src2, %CL}", + "shld{w}\t{%cl, $src2, $dst|$dst, $src2, %CL}", [(store (X86shld (loadi16 addr:$dst), GR16:$src2, CL), addr:$dst)]>, Imp<[CL],[]>, TB, OpSize; def SHRD16mrCL : I<0xAD, MRMDestMem, (outs), (ins i16mem:$dst, GR16:$src2), - "shrd{w} {%cl, $src2, $dst|$dst, $src2, %CL}", + "shrd{w}\t{%cl, $src2, $dst|$dst, $src2, %CL}", [(store (X86shrd (loadi16 addr:$dst), GR16:$src2, CL), addr:$dst)]>, Imp<[CL],[]>, TB, OpSize; def SHLD16mri8 : Ii8<0xA4, MRMDestMem, (outs), (ins i16mem:$dst, GR16:$src2, i8imm:$src3), - "shld{w} {$src3, $src2, $dst|$dst, $src2, $src3}", + "shld{w}\t{$src3, $src2, $dst|$dst, $src2, $src3}", [(store (X86shld (loadi16 addr:$dst), GR16:$src2, (i8 imm:$src3)), addr:$dst)]>, TB, OpSize; def SHRD16mri8 : Ii8<0xAC, MRMDestMem, (outs), (ins i16mem:$dst, GR16:$src2, i8imm:$src3), - "shrd{w} {$src3, $src2, $dst|$dst, $src2, $src3}", + "shrd{w}\t{$src3, $src2, $dst|$dst, $src2, $src3}", [(store (X86shrd (loadi16 addr:$dst), GR16:$src2, (i8 imm:$src3)), addr:$dst)]>, TB, OpSize; @@ -1848,211 +1847,211 @@ // Arithmetic. let isCommutable = 1 in { // X = ADD Y, Z --> X = ADD Z, Y def ADD8rr : I<0x00, MRMDestReg, (outs GR8 :$dst), (ins GR8 :$src1, GR8 :$src2), - "add{b} {$src2, $dst|$dst, $src2}", + "add{b}\t{$src2, $dst|$dst, $src2}", [(set GR8:$dst, (add GR8:$src1, GR8:$src2))]>; let isConvertibleToThreeAddress = 1 in { // Can transform into LEA. def ADD16rr : I<0x01, MRMDestReg, (outs GR16:$dst), (ins GR16:$src1, GR16:$src2), - "add{w} {$src2, $dst|$dst, $src2}", + "add{w}\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (add GR16:$src1, GR16:$src2))]>, OpSize; def ADD32rr : I<0x01, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2), - "add{l} {$src2, $dst|$dst, $src2}", + "add{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>; } // end isConvertibleToThreeAddress } // end isCommutable def ADD8rm : I<0x02, MRMSrcMem, (outs GR8 :$dst), (ins GR8 :$src1, i8mem :$src2), - "add{b} {$src2, $dst|$dst, $src2}", + "add{b}\t{$src2, $dst|$dst, $src2}", [(set GR8:$dst, (add GR8:$src1, (load addr:$src2)))]>; def ADD16rm : I<0x03, MRMSrcMem, (outs GR16:$dst), (ins GR16:$src1, i16mem:$src2), - "add{w} {$src2, $dst|$dst, $src2}", + "add{w}\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (add GR16:$src1, (load addr:$src2)))]>, OpSize; def ADD32rm : I<0x03, MRMSrcMem, (outs GR32:$dst), (ins GR32:$src1, i32mem:$src2), - "add{l} {$src2, $dst|$dst, $src2}", + "add{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (add GR32:$src1, (load addr:$src2)))]>; def ADD8ri : Ii8<0x80, MRM0r, (outs GR8:$dst), (ins GR8:$src1, i8imm:$src2), - "add{b} {$src2, $dst|$dst, $src2}", + "add{b}\t{$src2, $dst|$dst, $src2}", [(set GR8:$dst, (add GR8:$src1, imm:$src2))]>; let isConvertibleToThreeAddress = 1 in { // Can transform into LEA. def ADD16ri : Ii16<0x81, MRM0r, (outs GR16:$dst), (ins GR16:$src1, i16imm:$src2), - "add{w} {$src2, $dst|$dst, $src2}", + "add{w}\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (add GR16:$src1, imm:$src2))]>, OpSize; def ADD32ri : Ii32<0x81, MRM0r, (outs GR32:$dst), (ins GR32:$src1, i32imm:$src2), - "add{l} {$src2, $dst|$dst, $src2}", + "add{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (add GR32:$src1, imm:$src2))]>; def ADD16ri8 : Ii8<0x83, MRM0r, (outs GR16:$dst), (ins GR16:$src1, i16i8imm:$src2), - "add{w} {$src2, $dst|$dst, $src2}", + "add{w}\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (add GR16:$src1, i16immSExt8:$src2))]>, OpSize; def ADD32ri8 : Ii8<0x83, MRM0r, (outs GR32:$dst), (ins GR32:$src1, i32i8imm:$src2), - "add{l} {$src2, $dst|$dst, $src2}", + "add{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (add GR32:$src1, i32immSExt8:$src2))]>; } let isTwoAddress = 0 in { def ADD8mr : I<0x00, MRMDestMem, (outs), (ins i8mem :$dst, GR8 :$src2), - "add{b} {$src2, $dst|$dst, $src2}", + "add{b}\t{$src2, $dst|$dst, $src2}", [(store (add (load addr:$dst), GR8:$src2), addr:$dst)]>; def ADD16mr : I<0x01, MRMDestMem, (outs), (ins i16mem:$dst, GR16:$src2), - "add{w} {$src2, $dst|$dst, $src2}", + "add{w}\t{$src2, $dst|$dst, $src2}", [(store (add (load addr:$dst), GR16:$src2), addr:$dst)]>, OpSize; def ADD32mr : I<0x01, MRMDestMem, (outs), (ins i32mem:$dst, GR32:$src2), - "add{l} {$src2, $dst|$dst, $src2}", + "add{l}\t{$src2, $dst|$dst, $src2}", [(store (add (load addr:$dst), GR32:$src2), addr:$dst)]>; def ADD8mi : Ii8<0x80, MRM0m, (outs), (ins i8mem :$dst, i8imm :$src2), - "add{b} {$src2, $dst|$dst, $src2}", + "add{b}\t{$src2, $dst|$dst, $src2}", [(store (add (loadi8 addr:$dst), imm:$src2), addr:$dst)]>; def ADD16mi : Ii16<0x81, MRM0m, (outs), (ins i16mem:$dst, i16imm:$src2), - "add{w} {$src2, $dst|$dst, $src2}", + "add{w}\t{$src2, $dst|$dst, $src2}", [(store (add (loadi16 addr:$dst), imm:$src2), addr:$dst)]>, OpSize; def ADD32mi : Ii32<0x81, MRM0m, (outs), (ins i32mem:$dst, i32imm:$src2), - "add{l} {$src2, $dst|$dst, $src2}", + "add{l}\t{$src2, $dst|$dst, $src2}", [(store (add (loadi32 addr:$dst), imm:$src2), addr:$dst)]>; def ADD16mi8 : Ii8<0x83, MRM0m, (outs), (ins i16mem:$dst, i16i8imm :$src2), - "add{w} {$src2, $dst|$dst, $src2}", + "add{w}\t{$src2, $dst|$dst, $src2}", [(store (add (load addr:$dst), i16immSExt8:$src2), addr:$dst)]>, OpSize; def ADD32mi8 : Ii8<0x83, MRM0m, (outs), (ins i32mem:$dst, i32i8imm :$src2), - "add{l} {$src2, $dst|$dst, $src2}", + "add{l}\t{$src2, $dst|$dst, $src2}", [(store (add (load addr:$dst), i32immSExt8:$src2), addr:$dst)]>; } let isCommutable = 1 in { // X = ADC Y, Z --> X = ADC Z, Y def ADC32rr : I<0x11, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2), - "adc{l} {$src2, $dst|$dst, $src2}", + "adc{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (adde GR32:$src1, GR32:$src2))]>; } def ADC32rm : I<0x13, MRMSrcMem , (outs GR32:$dst), (ins GR32:$src1, i32mem:$src2), - "adc{l} {$src2, $dst|$dst, $src2}", + "adc{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (adde GR32:$src1, (load addr:$src2)))]>; def ADC32ri : Ii32<0x81, MRM2r, (outs GR32:$dst), (ins GR32:$src1, i32imm:$src2), - "adc{l} {$src2, $dst|$dst, $src2}", + "adc{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (adde GR32:$src1, imm:$src2))]>; def ADC32ri8 : Ii8<0x83, MRM2r, (outs GR32:$dst), (ins GR32:$src1, i32i8imm:$src2), - "adc{l} {$src2, $dst|$dst, $src2}", + "adc{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (adde GR32:$src1, i32immSExt8:$src2))]>; let isTwoAddress = 0 in { def ADC32mr : I<0x11, MRMDestMem, (outs), (ins i32mem:$dst, GR32:$src2), - "adc{l} {$src2, $dst|$dst, $src2}", + "adc{l}\t{$src2, $dst|$dst, $src2}", [(store (adde (load addr:$dst), GR32:$src2), addr:$dst)]>; def ADC32mi : Ii32<0x81, MRM2m, (outs), (ins i32mem:$dst, i32imm:$src2), - "adc{l} {$src2, $dst|$dst, $src2}", + "adc{l}\t{$src2, $dst|$dst, $src2}", [(store (adde (loadi32 addr:$dst), imm:$src2), addr:$dst)]>; def ADC32mi8 : Ii8<0x83, MRM2m, (outs), (ins i32mem:$dst, i32i8imm :$src2), - "adc{l} {$src2, $dst|$dst, $src2}", + "adc{l}\t{$src2, $dst|$dst, $src2}", [(store (adde (load addr:$dst), i32immSExt8:$src2), addr:$dst)]>; } def SUB8rr : I<0x28, MRMDestReg, (outs GR8 :$dst), (ins GR8 :$src1, GR8 :$src2), - "sub{b} {$src2, $dst|$dst, $src2}", + "sub{b}\t{$src2, $dst|$dst, $src2}", [(set GR8:$dst, (sub GR8:$src1, GR8:$src2))]>; def SUB16rr : I<0x29, MRMDestReg, (outs GR16:$dst), (ins GR16:$src1, GR16:$src2), - "sub{w} {$src2, $dst|$dst, $src2}", + "sub{w}\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (sub GR16:$src1, GR16:$src2))]>, OpSize; def SUB32rr : I<0x29, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2), - "sub{l} {$src2, $dst|$dst, $src2}", + "sub{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (sub GR32:$src1, GR32:$src2))]>; def SUB8rm : I<0x2A, MRMSrcMem, (outs GR8 :$dst), (ins GR8 :$src1, i8mem :$src2), - "sub{b} {$src2, $dst|$dst, $src2}", + "sub{b}\t{$src2, $dst|$dst, $src2}", [(set GR8:$dst, (sub GR8:$src1, (load addr:$src2)))]>; def SUB16rm : I<0x2B, MRMSrcMem, (outs GR16:$dst), (ins GR16:$src1, i16mem:$src2), - "sub{w} {$src2, $dst|$dst, $src2}", + "sub{w}\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (sub GR16:$src1, (load addr:$src2)))]>, OpSize; def SUB32rm : I<0x2B, MRMSrcMem, (outs GR32:$dst), (ins GR32:$src1, i32mem:$src2), - "sub{l} {$src2, $dst|$dst, $src2}", + "sub{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (sub GR32:$src1, (load addr:$src2)))]>; def SUB8ri : Ii8 <0x80, MRM5r, (outs GR8:$dst), (ins GR8:$src1, i8imm:$src2), - "sub{b} {$src2, $dst|$dst, $src2}", + "sub{b}\t{$src2, $dst|$dst, $src2}", [(set GR8:$dst, (sub GR8:$src1, imm:$src2))]>; def SUB16ri : Ii16<0x81, MRM5r, (outs GR16:$dst), (ins GR16:$src1, i16imm:$src2), - "sub{w} {$src2, $dst|$dst, $src2}", + "sub{w}\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (sub GR16:$src1, imm:$src2))]>, OpSize; def SUB32ri : Ii32<0x81, MRM5r, (outs GR32:$dst), (ins GR32:$src1, i32imm:$src2), - "sub{l} {$src2, $dst|$dst, $src2}", + "sub{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (sub GR32:$src1, imm:$src2))]>; def SUB16ri8 : Ii8<0x83, MRM5r, (outs GR16:$dst), (ins GR16:$src1, i16i8imm:$src2), - "sub{w} {$src2, $dst|$dst, $src2}", + "sub{w}\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (sub GR16:$src1, i16immSExt8:$src2))]>, OpSize; def SUB32ri8 : Ii8<0x83, MRM5r, (outs GR32:$dst), (ins GR32:$src1, i32i8imm:$src2), - "sub{l} {$src2, $dst|$dst, $src2}", + "sub{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (sub GR32:$src1, i32immSExt8:$src2))]>; let isTwoAddress = 0 in { def SUB8mr : I<0x28, MRMDestMem, (outs), (ins i8mem :$dst, GR8 :$src2), - "sub{b} {$src2, $dst|$dst, $src2}", + "sub{b}\t{$src2, $dst|$dst, $src2}", [(store (sub (load addr:$dst), GR8:$src2), addr:$dst)]>; def SUB16mr : I<0x29, MRMDestMem, (outs), (ins i16mem:$dst, GR16:$src2), - "sub{w} {$src2, $dst|$dst, $src2}", + "sub{w}\t{$src2, $dst|$dst, $src2}", [(store (sub (load addr:$dst), GR16:$src2), addr:$dst)]>, OpSize; def SUB32mr : I<0x29, MRMDestMem, (outs), (ins i32mem:$dst, GR32:$src2), - "sub{l} {$src2, $dst|$dst, $src2}", + "sub{l}\t{$src2, $dst|$dst, $src2}", [(store (sub (load addr:$dst), GR32:$src2), addr:$dst)]>; def SUB8mi : Ii8<0x80, MRM5m, (outs), (ins i8mem :$dst, i8imm:$src2), - "sub{b} {$src2, $dst|$dst, $src2}", + "sub{b}\t{$src2, $dst|$dst, $src2}", [(store (sub (loadi8 addr:$dst), imm:$src2), addr:$dst)]>; def SUB16mi : Ii16<0x81, MRM5m, (outs), (ins i16mem:$dst, i16imm:$src2), - "sub{w} {$src2, $dst|$dst, $src2}", + "sub{w}\t{$src2, $dst|$dst, $src2}", [(store (sub (loadi16 addr:$dst), imm:$src2), addr:$dst)]>, OpSize; def SUB32mi : Ii32<0x81, MRM5m, (outs), (ins i32mem:$dst, i32imm:$src2), - "sub{l} {$src2, $dst|$dst, $src2}", + "sub{l}\t{$src2, $dst|$dst, $src2}", [(store (sub (loadi32 addr:$dst), imm:$src2), addr:$dst)]>; def SUB16mi8 : Ii8<0x83, MRM5m, (outs), (ins i16mem:$dst, i16i8imm :$src2), - "sub{w} {$src2, $dst|$dst, $src2}", + "sub{w}\t{$src2, $dst|$dst, $src2}", [(store (sub (load addr:$dst), i16immSExt8:$src2), addr:$dst)]>, OpSize; def SUB32mi8 : Ii8<0x83, MRM5m, (outs), (ins i32mem:$dst, i32i8imm :$src2), - "sub{l} {$src2, $dst|$dst, $src2}", + "sub{l}\t{$src2, $dst|$dst, $src2}", [(store (sub (load addr:$dst), i32immSExt8:$src2), addr:$dst)]>; } def SBB32rr : I<0x19, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2), - "sbb{l} {$src2, $dst|$dst, $src2}", + "sbb{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (sube GR32:$src1, GR32:$src2))]>; let isTwoAddress = 0 in { def SBB32mr : I<0x19, MRMDestMem, (outs), (ins i32mem:$dst, GR32:$src2), - "sbb{l} {$src2, $dst|$dst, $src2}", + "sbb{l}\t{$src2, $dst|$dst, $src2}", [(store (sube (load addr:$dst), GR32:$src2), addr:$dst)]>; def SBB8mi : Ii32<0x80, MRM3m, (outs), (ins i8mem:$dst, i8imm:$src2), - "sbb{b} {$src2, $dst|$dst, $src2}", + "sbb{b}\t{$src2, $dst|$dst, $src2}", [(store (sube (loadi8 addr:$dst), imm:$src2), addr:$dst)]>; def SBB32mi : Ii32<0x81, MRM3m, (outs), (ins i32mem:$dst, i32imm:$src2), - "sbb{l} {$src2, $dst|$dst, $src2}", + "sbb{l}\t{$src2, $dst|$dst, $src2}", [(store (sube (loadi32 addr:$dst), imm:$src2), addr:$dst)]>; def SBB32mi8 : Ii8<0x83, MRM3m, (outs), (ins i32mem:$dst, i32i8imm :$src2), - "sbb{l} {$src2, $dst|$dst, $src2}", + "sbb{l}\t{$src2, $dst|$dst, $src2}", [(store (sube (load addr:$dst), i32immSExt8:$src2), addr:$dst)]>; } def SBB32rm : I<0x1B, MRMSrcMem, (outs GR32:$dst), (ins GR32:$src1, i32mem:$src2), - "sbb{l} {$src2, $dst|$dst, $src2}", + "sbb{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (sube GR32:$src1, (load addr:$src2)))]>; def SBB32ri : Ii32<0x81, MRM3r, (outs GR32:$dst), (ins GR32:$src1, i32imm:$src2), - "sbb{l} {$src2, $dst|$dst, $src2}", + "sbb{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (sube GR32:$src1, imm:$src2))]>; def SBB32ri8 : Ii8<0x83, MRM3r, (outs GR32:$dst), (ins GR32:$src1, i32i8imm:$src2), - "sbb{l} {$src2, $dst|$dst, $src2}", + "sbb{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (sube GR32:$src1, i32immSExt8:$src2))]>; let isCommutable = 1 in { // X = IMUL Y, Z --> X = IMUL Z, Y def IMUL16rr : I<0xAF, MRMSrcReg, (outs GR16:$dst), (ins GR16:$src1, GR16:$src2), - "imul{w} {$src2, $dst|$dst, $src2}", + "imul{w}\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (mul GR16:$src1, GR16:$src2))]>, TB, OpSize; def IMUL32rr : I<0xAF, MRMSrcReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2), - "imul{l} {$src2, $dst|$dst, $src2}", + "imul{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (mul GR32:$src1, GR32:$src2))]>, TB; } def IMUL16rm : I<0xAF, MRMSrcMem, (outs GR16:$dst), (ins GR16:$src1, i16mem:$src2), - "imul{w} {$src2, $dst|$dst, $src2}", + "imul{w}\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (mul GR16:$src1, (load addr:$src2)))]>, TB, OpSize; def IMUL32rm : I<0xAF, MRMSrcMem, (outs GR32:$dst), (ins GR32:$src1, i32mem:$src2), - "imul{l} {$src2, $dst|$dst, $src2}", + "imul{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (mul GR32:$src1, (load addr:$src2)))]>, TB; } // end Two Address instructions @@ -2060,39 +2059,39 @@ // Suprisingly enough, these are not two address instructions! def IMUL16rri : Ii16<0x69, MRMSrcReg, // GR16 = GR16*I16 (outs GR16:$dst), (ins GR16:$src1, i16imm:$src2), - "imul{w} {$src2, $src1, $dst|$dst, $src1, $src2}", + "imul{w}\t{$src2, $src1, $dst|$dst, $src1, $src2}", [(set GR16:$dst, (mul GR16:$src1, imm:$src2))]>, OpSize; def IMUL32rri : Ii32<0x69, MRMSrcReg, // GR32 = GR32*I32 (outs GR32:$dst), (ins GR32:$src1, i32imm:$src2), - "imul{l} {$src2, $src1, $dst|$dst, $src1, $src2}", + "imul{l}\t{$src2, $src1, $dst|$dst, $src1, $src2}", [(set GR32:$dst, (mul GR32:$src1, imm:$src2))]>; def IMUL16rri8 : Ii8<0x6B, MRMSrcReg, // GR16 = GR16*I8 (outs GR16:$dst), (ins GR16:$src1, i16i8imm:$src2), - "imul{w} {$src2, $src1, $dst|$dst, $src1, $src2}", + "imul{w}\t{$src2, $src1, $dst|$dst, $src1, $src2}", [(set GR16:$dst, (mul GR16:$src1, i16immSExt8:$src2))]>, OpSize; def IMUL32rri8 : Ii8<0x6B, MRMSrcReg, // GR32 = GR32*I8 (outs GR32:$dst), (ins GR32:$src1, i32i8imm:$src2), - "imul{l} {$src2, $src1, $dst|$dst, $src1, $src2}", + "imul{l}\t{$src2, $src1, $dst|$dst, $src1, $src2}", [(set GR32:$dst, (mul GR32:$src1, i32immSExt8:$src2))]>; def IMUL16rmi : Ii16<0x69, MRMSrcMem, // GR16 = [mem16]*I16 (outs GR16:$dst), (ins i16mem:$src1, i16imm:$src2), - "imul{w} {$src2, $src1, $dst|$dst, $src1, $src2}", + "imul{w}\t{$src2, $src1, $dst|$dst, $src1, $src2}", [(set GR16:$dst, (mul (load addr:$src1), imm:$src2))]>, OpSize; def IMUL32rmi : Ii32<0x69, MRMSrcMem, // GR32 = [mem32]*I32 (outs GR32:$dst), (ins i32mem:$src1, i32imm:$src2), - "imul{l} {$src2, $src1, $dst|$dst, $src1, $src2}", + "imul{l}\t{$src2, $src1, $dst|$dst, $src1, $src2}", [(set GR32:$dst, (mul (load addr:$src1), imm:$src2))]>; def IMUL16rmi8 : Ii8<0x6B, MRMSrcMem, // GR16 = [mem16]*I8 (outs GR16:$dst), (ins i16mem:$src1, i16i8imm :$src2), - "imul{w} {$src2, $src1, $dst|$dst, $src1, $src2}", + "imul{w}\t{$src2, $src1, $dst|$dst, $src1, $src2}", [(set GR16:$dst, (mul (load addr:$src1), i16immSExt8:$src2))]>, OpSize; def IMUL32rmi8 : Ii8<0x6B, MRMSrcMem, // GR32 = [mem32]*I8 (outs GR32:$dst), (ins i32mem:$src1, i32i8imm: $src2), - "imul{l} {$src2, $src1, $dst|$dst, $src1, $src2}", + "imul{l}\t{$src2, $src1, $dst|$dst, $src1, $src2}", [(set GR32:$dst, (mul (load addr:$src1), i32immSExt8:$src2))]>; //===----------------------------------------------------------------------===// @@ -2100,52 +2099,52 @@ // let isCommutable = 1 in { // TEST X, Y --> TEST Y, X def TEST8rr : I<0x84, MRMDestReg, (outs), (ins GR8:$src1, GR8:$src2), - "test{b} {$src2, $src1|$src1, $src2}", + "test{b}\t{$src2, $src1|$src1, $src2}", [(X86cmp (and GR8:$src1, GR8:$src2), 0)]>; def TEST16rr : I<0x85, MRMDestReg, (outs), (ins GR16:$src1, GR16:$src2), - "test{w} {$src2, $src1|$src1, $src2}", + "test{w}\t{$src2, $src1|$src1, $src2}", [(X86cmp (and GR16:$src1, GR16:$src2), 0)]>, OpSize; def TEST32rr : I<0x85, MRMDestReg, (outs), (ins GR32:$src1, GR32:$src2), - "test{l} {$src2, $src1|$src1, $src2}", + "test{l}\t{$src2, $src1|$src1, $src2}", [(X86cmp (and GR32:$src1, GR32:$src2), 0)]>; } def TEST8rm : I<0x84, MRMSrcMem, (outs), (ins GR8 :$src1, i8mem :$src2), - "test{b} {$src2, $src1|$src1, $src2}", + "test{b}\t{$src2, $src1|$src1, $src2}", [(X86cmp (and GR8:$src1, (loadi8 addr:$src2)), 0)]>; def TEST16rm : I<0x85, MRMSrcMem, (outs), (ins GR16:$src1, i16mem:$src2), - "test{w} {$src2, $src1|$src1, $src2}", + "test{w}\t{$src2, $src1|$src1, $src2}", [(X86cmp (and GR16:$src1, (loadi16 addr:$src2)), 0)]>, OpSize; def TEST32rm : I<0x85, MRMSrcMem, (outs), (ins GR32:$src1, i32mem:$src2), - "test{l} {$src2, $src1|$src1, $src2}", + "test{l}\t{$src2, $src1|$src1, $src2}", [(X86cmp (and GR32:$src1, (loadi32 addr:$src2)), 0)]>; def TEST8ri : Ii8 <0xF6, MRM0r, // flags = GR8 & imm8 (outs), (ins GR8:$src1, i8imm:$src2), - "test{b} {$src2, $src1|$src1, $src2}", + "test{b}\t{$src2, $src1|$src1, $src2}", [(X86cmp (and GR8:$src1, imm:$src2), 0)]>; def TEST16ri : Ii16<0xF7, MRM0r, // flags = GR16 & imm16 (outs), (ins GR16:$src1, i16imm:$src2), - "test{w} {$src2, $src1|$src1, $src2}", + "test{w}\t{$src2, $src1|$src1, $src2}", [(X86cmp (and GR16:$src1, imm:$src2), 0)]>, OpSize; def TEST32ri : Ii32<0xF7, MRM0r, // flags = GR32 & imm32 (outs), (ins GR32:$src1, i32imm:$src2), - "test{l} {$src2, $src1|$src1, $src2}", + "test{l}\t{$src2, $src1|$src1, $src2}", [(X86cmp (and GR32:$src1, imm:$src2), 0)]>; def TEST8mi : Ii8 <0xF6, MRM0m, // flags = [mem8] & imm8 (outs), (ins i8mem:$src1, i8imm:$src2), - "test{b} {$src2, $src1|$src1, $src2}", + "test{b}\t{$src2, $src1|$src1, $src2}", [(X86cmp (and (loadi8 addr:$src1), imm:$src2), 0)]>; def TEST16mi : Ii16<0xF7, MRM0m, // flags = [mem16] & imm16 (outs), (ins i16mem:$src1, i16imm:$src2), - "test{w} {$src2, $src1|$src1, $src2}", + "test{w}\t{$src2, $src1|$src1, $src2}", [(X86cmp (and (loadi16 addr:$src1), imm:$src2), 0)]>, OpSize; def TEST32mi : Ii32<0xF7, MRM0m, // flags = [mem32] & imm32 (outs), (ins i32mem:$src1, i32imm:$src2), - "test{l} {$src2, $src1|$src1, $src2}", + "test{l}\t{$src2, $src1|$src1, $src2}", [(X86cmp (and (loadi32 addr:$src1), imm:$src2), 0)]>; @@ -2155,262 +2154,262 @@ def SETEr : I<0x94, MRM0r, (outs GR8 :$dst), (ins), - "sete $dst", + "sete\t$dst", [(set GR8:$dst, (X86setcc X86_COND_E))]>, TB; // GR8 = == def SETEm : I<0x94, MRM0m, (outs), (ins i8mem:$dst), - "sete $dst", + "sete\t$dst", [(store (X86setcc X86_COND_E), addr:$dst)]>, TB; // [mem8] = == def SETNEr : I<0x95, MRM0r, (outs GR8 :$dst), (ins), - "setne $dst", + "setne\t$dst", [(set GR8:$dst, (X86setcc X86_COND_NE))]>, TB; // GR8 = != def SETNEm : I<0x95, MRM0m, (outs), (ins i8mem:$dst), - "setne $dst", + "setne\t$dst", [(store (X86setcc X86_COND_NE), addr:$dst)]>, TB; // [mem8] = != def SETLr : I<0x9C, MRM0r, (outs GR8 :$dst), (ins), - "setl $dst", + "setl\t$dst", [(set GR8:$dst, (X86setcc X86_COND_L))]>, TB; // GR8 = < signed def SETLm : I<0x9C, MRM0m, (outs), (ins i8mem:$dst), - "setl $dst", + "setl\t$dst", [(store (X86setcc X86_COND_L), addr:$dst)]>, TB; // [mem8] = < signed def SETGEr : I<0x9D, MRM0r, (outs GR8 :$dst), (ins), - "setge $dst", + "setge\t$dst", [(set GR8:$dst, (X86setcc X86_COND_GE))]>, TB; // GR8 = >= signed def SETGEm : I<0x9D, MRM0m, (outs), (ins i8mem:$dst), - "setge $dst", + "setge\t$dst", [(store (X86setcc X86_COND_GE), addr:$dst)]>, TB; // [mem8] = >= signed def SETLEr : I<0x9E, MRM0r, (outs GR8 :$dst), (ins), - "setle $dst", + "setle\t$dst", [(set GR8:$dst, (X86setcc X86_COND_LE))]>, TB; // GR8 = <= signed def SETLEm : I<0x9E, MRM0m, (outs), (ins i8mem:$dst), - "setle $dst", + "setle\t$dst", [(store (X86setcc X86_COND_LE), addr:$dst)]>, TB; // [mem8] = <= signed def SETGr : I<0x9F, MRM0r, (outs GR8 :$dst), (ins), - "setg $dst", + "setg\t$dst", [(set GR8:$dst, (X86setcc X86_COND_G))]>, TB; // GR8 = > signed def SETGm : I<0x9F, MRM0m, (outs), (ins i8mem:$dst), - "setg $dst", + "setg\t$dst", [(store (X86setcc X86_COND_G), addr:$dst)]>, TB; // [mem8] = > signed def SETBr : I<0x92, MRM0r, (outs GR8 :$dst), (ins), - "setb $dst", + "setb\t$dst", [(set GR8:$dst, (X86setcc X86_COND_B))]>, TB; // GR8 = < unsign def SETBm : I<0x92, MRM0m, (outs), (ins i8mem:$dst), - "setb $dst", + "setb\t$dst", [(store (X86setcc X86_COND_B), addr:$dst)]>, TB; // [mem8] = < unsign def SETAEr : I<0x93, MRM0r, (outs GR8 :$dst), (ins), - "setae $dst", + "setae\t$dst", [(set GR8:$dst, (X86setcc X86_COND_AE))]>, TB; // GR8 = >= unsign def SETAEm : I<0x93, MRM0m, (outs), (ins i8mem:$dst), - "setae $dst", + "setae\t$dst", [(store (X86setcc X86_COND_AE), addr:$dst)]>, TB; // [mem8] = >= unsign def SETBEr : I<0x96, MRM0r, (outs GR8 :$dst), (ins), - "setbe $dst", + "setbe\t$dst", [(set GR8:$dst, (X86setcc X86_COND_BE))]>, TB; // GR8 = <= unsign def SETBEm : I<0x96, MRM0m, (outs), (ins i8mem:$dst), - "setbe $dst", + "setbe\t$dst", [(store (X86setcc X86_COND_BE), addr:$dst)]>, TB; // [mem8] = <= unsign def SETAr : I<0x97, MRM0r, (outs GR8 :$dst), (ins), - "seta $dst", + "seta\t$dst", [(set GR8:$dst, (X86setcc X86_COND_A))]>, TB; // GR8 = > signed def SETAm : I<0x97, MRM0m, (outs), (ins i8mem:$dst), - "seta $dst", + "seta\t$dst", [(store (X86setcc X86_COND_A), addr:$dst)]>, TB; // [mem8] = > signed def SETSr : I<0x98, MRM0r, (outs GR8 :$dst), (ins), - "sets $dst", + "sets\t$dst", [(set GR8:$dst, (X86setcc X86_COND_S))]>, TB; // GR8 = def SETSm : I<0x98, MRM0m, (outs), (ins i8mem:$dst), - "sets $dst", + "sets\t$dst", [(store (X86setcc X86_COND_S), addr:$dst)]>, TB; // [mem8] = def SETNSr : I<0x99, MRM0r, (outs GR8 :$dst), (ins), - "setns $dst", + "setns\t$dst", [(set GR8:$dst, (X86setcc X86_COND_NS))]>, TB; // GR8 = ! def SETNSm : I<0x99, MRM0m, (outs), (ins i8mem:$dst), - "setns $dst", + "setns\t$dst", [(store (X86setcc X86_COND_NS), addr:$dst)]>, TB; // [mem8] = ! def SETPr : I<0x9A, MRM0r, (outs GR8 :$dst), (ins), - "setp $dst", + "setp\t$dst", [(set GR8:$dst, (X86setcc X86_COND_P))]>, TB; // GR8 = parity def SETPm : I<0x9A, MRM0m, (outs), (ins i8mem:$dst), - "setp $dst", + "setp\t$dst", [(store (X86setcc X86_COND_P), addr:$dst)]>, TB; // [mem8] = parity def SETNPr : I<0x9B, MRM0r, (outs GR8 :$dst), (ins), - "setnp $dst", + "setnp\t$dst", [(set GR8:$dst, (X86setcc X86_COND_NP))]>, TB; // GR8 = not parity def SETNPm : I<0x9B, MRM0m, (outs), (ins i8mem:$dst), - "setnp $dst", + "setnp\t$dst", [(store (X86setcc X86_COND_NP), addr:$dst)]>, TB; // [mem8] = not parity // Integer comparisons def CMP8rr : I<0x38, MRMDestReg, (outs), (ins GR8 :$src1, GR8 :$src2), - "cmp{b} {$src2, $src1|$src1, $src2}", + "cmp{b}\t{$src2, $src1|$src1, $src2}", [(X86cmp GR8:$src1, GR8:$src2)]>; def CMP16rr : I<0x39, MRMDestReg, (outs), (ins GR16:$src1, GR16:$src2), - "cmp{w} {$src2, $src1|$src1, $src2}", + "cmp{w}\t{$src2, $src1|$src1, $src2}", [(X86cmp GR16:$src1, GR16:$src2)]>, OpSize; def CMP32rr : I<0x39, MRMDestReg, (outs), (ins GR32:$src1, GR32:$src2), - "cmp{l} {$src2, $src1|$src1, $src2}", + "cmp{l}\t{$src2, $src1|$src1, $src2}", [(X86cmp GR32:$src1, GR32:$src2)]>; def CMP8mr : I<0x38, MRMDestMem, (outs), (ins i8mem :$src1, GR8 :$src2), - "cmp{b} {$src2, $src1|$src1, $src2}", + "cmp{b}\t{$src2, $src1|$src1, $src2}", [(X86cmp (loadi8 addr:$src1), GR8:$src2)]>; def CMP16mr : I<0x39, MRMDestMem, (outs), (ins i16mem:$src1, GR16:$src2), - "cmp{w} {$src2, $src1|$src1, $src2}", + "cmp{w}\t{$src2, $src1|$src1, $src2}", [(X86cmp (loadi16 addr:$src1), GR16:$src2)]>, OpSize; def CMP32mr : I<0x39, MRMDestMem, (outs), (ins i32mem:$src1, GR32:$src2), - "cmp{l} {$src2, $src1|$src1, $src2}", + "cmp{l}\t{$src2, $src1|$src1, $src2}", [(X86cmp (loadi32 addr:$src1), GR32:$src2)]>; def CMP8rm : I<0x3A, MRMSrcMem, (outs), (ins GR8 :$src1, i8mem :$src2), - "cmp{b} {$src2, $src1|$src1, $src2}", + "cmp{b}\t{$src2, $src1|$src1, $src2}", [(X86cmp GR8:$src1, (loadi8 addr:$src2))]>; def CMP16rm : I<0x3B, MRMSrcMem, (outs), (ins GR16:$src1, i16mem:$src2), - "cmp{w} {$src2, $src1|$src1, $src2}", + "cmp{w}\t{$src2, $src1|$src1, $src2}", [(X86cmp GR16:$src1, (loadi16 addr:$src2))]>, OpSize; def CMP32rm : I<0x3B, MRMSrcMem, (outs), (ins GR32:$src1, i32mem:$src2), - "cmp{l} {$src2, $src1|$src1, $src2}", + "cmp{l}\t{$src2, $src1|$src1, $src2}", [(X86cmp GR32:$src1, (loadi32 addr:$src2))]>; def CMP8ri : Ii8<0x80, MRM7r, (outs), (ins GR8:$src1, i8imm:$src2), - "cmp{b} {$src2, $src1|$src1, $src2}", + "cmp{b}\t{$src2, $src1|$src1, $src2}", [(X86cmp GR8:$src1, imm:$src2)]>; def CMP16ri : Ii16<0x81, MRM7r, (outs), (ins GR16:$src1, i16imm:$src2), - "cmp{w} {$src2, $src1|$src1, $src2}", + "cmp{w}\t{$src2, $src1|$src1, $src2}", [(X86cmp GR16:$src1, imm:$src2)]>, OpSize; def CMP32ri : Ii32<0x81, MRM7r, (outs), (ins GR32:$src1, i32imm:$src2), - "cmp{l} {$src2, $src1|$src1, $src2}", + "cmp{l}\t{$src2, $src1|$src1, $src2}", [(X86cmp GR32:$src1, imm:$src2)]>; def CMP8mi : Ii8 <0x80, MRM7m, (outs), (ins i8mem :$src1, i8imm :$src2), - "cmp{b} {$src2, $src1|$src1, $src2}", + "cmp{b}\t{$src2, $src1|$src1, $src2}", [(X86cmp (loadi8 addr:$src1), imm:$src2)]>; def CMP16mi : Ii16<0x81, MRM7m, (outs), (ins i16mem:$src1, i16imm:$src2), - "cmp{w} {$src2, $src1|$src1, $src2}", + "cmp{w}\t{$src2, $src1|$src1, $src2}", [(X86cmp (loadi16 addr:$src1), imm:$src2)]>, OpSize; def CMP32mi : Ii32<0x81, MRM7m, (outs), (ins i32mem:$src1, i32imm:$src2), - "cmp{l} {$src2, $src1|$src1, $src2}", + "cmp{l}\t{$src2, $src1|$src1, $src2}", [(X86cmp (loadi32 addr:$src1), imm:$src2)]>; def CMP16ri8 : Ii8<0x83, MRM7r, (outs), (ins GR16:$src1, i16i8imm:$src2), - "cmp{w} {$src2, $src1|$src1, $src2}", + "cmp{w}\t{$src2, $src1|$src1, $src2}", [(X86cmp GR16:$src1, i16immSExt8:$src2)]>, OpSize; def CMP16mi8 : Ii8<0x83, MRM7m, (outs), (ins i16mem:$src1, i16i8imm:$src2), - "cmp{w} {$src2, $src1|$src1, $src2}", + "cmp{w}\t{$src2, $src1|$src1, $src2}", [(X86cmp (loadi16 addr:$src1), i16immSExt8:$src2)]>, OpSize; def CMP32mi8 : Ii8<0x83, MRM7m, (outs), (ins i32mem:$src1, i32i8imm:$src2), - "cmp{l} {$src2, $src1|$src1, $src2}", + "cmp{l}\t{$src2, $src1|$src1, $src2}", [(X86cmp (loadi32 addr:$src1), i32immSExt8:$src2)]>; def CMP32ri8 : Ii8<0x83, MRM7r, (outs), (ins GR32:$src1, i32i8imm:$src2), - "cmp{l} {$src2, $src1|$src1, $src2}", + "cmp{l}\t{$src2, $src1|$src1, $src2}", [(X86cmp GR32:$src1, i32immSExt8:$src2)]>; // Sign/Zero extenders def MOVSX16rr8 : I<0xBE, MRMSrcReg, (outs GR16:$dst), (ins GR8 :$src), - "movs{bw|x} {$src, $dst|$dst, $src}", + "movs{bw|x}\t{$src, $dst|$dst, $src}", [(set GR16:$dst, (sext GR8:$src))]>, TB, OpSize; def MOVSX16rm8 : I<0xBE, MRMSrcMem, (outs GR16:$dst), (ins i8mem :$src), - "movs{bw|x} {$src, $dst|$dst, $src}", + "movs{bw|x}\t{$src, $dst|$dst, $src}", [(set GR16:$dst, (sextloadi16i8 addr:$src))]>, TB, OpSize; def MOVSX32rr8 : I<0xBE, MRMSrcReg, (outs GR32:$dst), (ins GR8 :$src), - "movs{bl|x} {$src, $dst|$dst, $src}", + "movs{bl|x}\t{$src, $dst|$dst, $src}", [(set GR32:$dst, (sext GR8:$src))]>, TB; def MOVSX32rm8 : I<0xBE, MRMSrcMem, (outs GR32:$dst), (ins i8mem :$src), - "movs{bl|x} {$src, $dst|$dst, $src}", + "movs{bl|x}\t{$src, $dst|$dst, $src}", [(set GR32:$dst, (sextloadi32i8 addr:$src))]>, TB; def MOVSX32rr16: I<0xBF, MRMSrcReg, (outs GR32:$dst), (ins GR16:$src), - "movs{wl|x} {$src, $dst|$dst, $src}", + "movs{wl|x}\t{$src, $dst|$dst, $src}", [(set GR32:$dst, (sext GR16:$src))]>, TB; def MOVSX32rm16: I<0xBF, MRMSrcMem, (outs GR32:$dst), (ins i16mem:$src), - "movs{wl|x} {$src, $dst|$dst, $src}", + "movs{wl|x}\t{$src, $dst|$dst, $src}", [(set GR32:$dst, (sextloadi32i16 addr:$src))]>, TB; def MOVZX16rr8 : I<0xB6, MRMSrcReg, (outs GR16:$dst), (ins GR8 :$src), - "movz{bw|x} {$src, $dst|$dst, $src}", + "movz{bw|x}\t{$src, $dst|$dst, $src}", [(set GR16:$dst, (zext GR8:$src))]>, TB, OpSize; def MOVZX16rm8 : I<0xB6, MRMSrcMem, (outs GR16:$dst), (ins i8mem :$src), - "movz{bw|x} {$src, $dst|$dst, $src}", + "movz{bw|x}\t{$src, $dst|$dst, $src}", [(set GR16:$dst, (zextloadi16i8 addr:$src))]>, TB, OpSize; def MOVZX32rr8 : I<0xB6, MRMSrcReg, (outs GR32:$dst), (ins GR8 :$src), - "movz{bl|x} {$src, $dst|$dst, $src}", + "movz{bl|x}\t{$src, $dst|$dst, $src}", [(set GR32:$dst, (zext GR8:$src))]>, TB; def MOVZX32rm8 : I<0xB6, MRMSrcMem, (outs GR32:$dst), (ins i8mem :$src), - "movz{bl|x} {$src, $dst|$dst, $src}", + "movz{bl|x}\t{$src, $dst|$dst, $src}", [(set GR32:$dst, (zextloadi32i8 addr:$src))]>, TB; def MOVZX32rr16: I<0xB7, MRMSrcReg, (outs GR32:$dst), (ins GR16:$src), - "movz{wl|x} {$src, $dst|$dst, $src}", + "movz{wl|x}\t{$src, $dst|$dst, $src}", [(set GR32:$dst, (zext GR16:$src))]>, TB; def MOVZX32rm16: I<0xB7, MRMSrcMem, (outs GR32:$dst), (ins i16mem:$src), - "movz{wl|x} {$src, $dst|$dst, $src}", + "movz{wl|x}\t{$src, $dst|$dst, $src}", [(set GR32:$dst, (zextloadi32i16 addr:$src))]>, TB; def CBW : I<0x98, RawFrm, (outs), (ins), @@ -2431,57 +2430,57 @@ // Alias instructions that map movr0 to xor. // FIXME: remove when we can teach regalloc that xor reg, reg is ok. def MOV8r0 : I<0x30, MRMInitReg, (outs GR8 :$dst), (ins), - "xor{b} $dst, $dst", + "xor{b}\t$dst, $dst", [(set GR8:$dst, 0)]>; def MOV16r0 : I<0x31, MRMInitReg, (outs GR16:$dst), (ins), - "xor{w} $dst, $dst", + "xor{w}\t$dst, $dst", [(set GR16:$dst, 0)]>, OpSize; def MOV32r0 : I<0x31, MRMInitReg, (outs GR32:$dst), (ins), - "xor{l} $dst, $dst", + "xor{l}\t$dst, $dst", [(set GR32:$dst, 0)]>; // Basic operations on GR16 / GR32 subclasses GR16_ and GR32_ which contains only // those registers that have GR8 sub-registers (i.e. AX - DX, EAX - EDX). def MOV16to16_ : I<0x89, MRMDestReg, (outs GR16_:$dst), (ins GR16:$src), - "mov{w} {$src, $dst|$dst, $src}", []>, OpSize; + "mov{w}\t{$src, $dst|$dst, $src}", []>, OpSize; def MOV32to32_ : I<0x89, MRMDestReg, (outs GR32_:$dst), (ins GR32:$src), - "mov{l} {$src, $dst|$dst, $src}", []>; + "mov{l}\t{$src, $dst|$dst, $src}", []>; def MOV16_rr : I<0x89, MRMDestReg, (outs GR16_:$dst), (ins GR16_:$src), - "mov{w} {$src, $dst|$dst, $src}", []>, OpSize; + "mov{w}\t{$src, $dst|$dst, $src}", []>, OpSize; def MOV32_rr : I<0x89, MRMDestReg, (outs GR32_:$dst), (ins GR32_:$src), - "mov{l} {$src, $dst|$dst, $src}", []>; + "mov{l}\t{$src, $dst|$dst, $src}", []>; def MOV16_rm : I<0x8B, MRMSrcMem, (outs GR16_:$dst), (ins i16mem:$src), - "mov{w} {$src, $dst|$dst, $src}", []>, OpSize; + "mov{w}\t{$src, $dst|$dst, $src}", []>, OpSize; def MOV32_rm : I<0x8B, MRMSrcMem, (outs GR32_:$dst), (ins i32mem:$src), - "mov{l} {$src, $dst|$dst, $src}", []>; + "mov{l}\t{$src, $dst|$dst, $src}", []>; def MOV16_mr : I<0x89, MRMDestMem, (outs), (ins i16mem:$dst, GR16_:$src), - "mov{w} {$src, $dst|$dst, $src}", []>, OpSize; + "mov{w}\t{$src, $dst|$dst, $src}", []>, OpSize; def MOV32_mr : I<0x89, MRMDestMem, (outs), (ins i32mem:$dst, GR32_:$src), - "mov{l} {$src, $dst|$dst, $src}", []>; + "mov{l}\t{$src, $dst|$dst, $src}", []>; //===----------------------------------------------------------------------===// // Thread Local Storage Instructions // def TLS_addr : I<0, Pseudo, (outs GR32:$dst), (ins i32imm:$sym), - "leal ${sym:mem}(,%ebx,1), $dst", + "leal\t${sym:mem}(,%ebx,1), $dst", [(set GR32:$dst, (X86tlsaddr tglobaltlsaddr:$sym))]>, Imp<[EBX],[]>; let AddedComplexity = 10 in def TLS_gs_rr : I<0, Pseudo, (outs GR32:$dst), (ins GR32:$src), - "movl %gs:($src), $dst", + "movl\t%gs:($src), $dst", [(set GR32:$dst, (load (add X86TLStp, GR32:$src)))]>; let AddedComplexity = 15 in def TLS_gs_ri : I<0, Pseudo, (outs GR32:$dst), (ins i32imm:$src), - "movl %gs:${src:mem}, $dst", + "movl\t%gs:${src:mem}, $dst", [(set GR32:$dst, (load (add X86TLStp, (X86Wrapper tglobaltlsaddr:$src))))]>; def TLS_tp : I<0, Pseudo, (outs GR32:$dst), (ins), - "movl %gs:0, $dst", + "movl\t%gs:0, $dst", [(set GR32:$dst, X86TLStp)]>; //===----------------------------------------------------------------------===// @@ -2500,7 +2499,7 @@ let isTerminator = 1, isReturn = 1, isBarrier = 1, hasCtrlDep = 1 in { def EH_RETURN : I<0xC3, RawFrm, (outs), (ins GR32:$addr), - "ret #eh_return, addr: $addr", + "ret\t#eh_return, addr: $addr", [(X86ehret GR32:$addr)]>; } Index: lib/Target/X86/X86InstrFPStack.td =================================================================== --- lib/Target/X86/X86InstrFPStack.td (revision 40587) +++ lib/Target/X86/X86InstrFPStack.td (working copy) @@ -176,9 +176,9 @@ [(set RFP64:$dst, (OpNode RFP64:$src1, (extloadf32 addr:$src2)))]>; def _F32m : FPI<0xD8, fp, (outs), (ins f32mem:$src), - !strconcat("f", !strconcat(asmstring, "{s} $src"))>; + !strconcat("f", !strconcat(asmstring, "{s}\t$src"))>; def _F64m : FPI<0xDC, fp, (outs), (ins f64mem:$src), - !strconcat("f", !strconcat(asmstring, "{l} $src"))>; + !strconcat("f", !strconcat(asmstring, "{l}\t$src"))>; // ST(0) = ST(0) + [memint] def _FpI16m32 : FpI<(outs RFP32:$dst), (ins RFP32:$src1, i16mem:$src2), OneArgFPRW, [(set RFP32:$dst, (OpNode RFP32:$src1, @@ -193,9 +193,9 @@ [(set RFP64:$dst, (OpNode RFP64:$src1, (X86fild addr:$src2, i32)))]>; def _FI16m : FPI<0xDE, fp, (outs), (ins i16mem:$src), - !strconcat("fi", !strconcat(asmstring, "{s} $src"))>; + !strconcat("fi", !strconcat(asmstring, "{s}\t$src"))>; def _FI32m : FPI<0xDA, fp, (outs), (ins i32mem:$src), - !strconcat("fi", !strconcat(asmstring, "{l} $src"))>; + !strconcat("fi", !strconcat(asmstring, "{l}\t$src"))>; } defm ADD : FPBinary_rr; @@ -219,24 +219,24 @@ // NOTE: GAS and apparently all other AT&T style assemblers have a broken notion // of some of the 'reverse' forms of the fsub and fdiv instructions. As such, // we have to put some 'r's in and take them out of weird places. -def ADD_FST0r : FPST0rInst <0xC0, "fadd $op">; -def ADD_FrST0 : FPrST0Inst <0xC0, "fadd {%st(0), $op|$op, %ST(0)}">; -def ADD_FPrST0 : FPrST0PInst<0xC0, "faddp $op">; -def SUBR_FST0r : FPST0rInst <0xE8, "fsubr $op">; -def SUB_FrST0 : FPrST0Inst <0xE8, "fsub{r} {%st(0), $op|$op, %ST(0)}">; -def SUB_FPrST0 : FPrST0PInst<0xE8, "fsub{r}p $op">; -def SUB_FST0r : FPST0rInst <0xE0, "fsub $op">; -def SUBR_FrST0 : FPrST0Inst <0xE0, "fsub{|r} {%st(0), $op|$op, %ST(0)}">; -def SUBR_FPrST0 : FPrST0PInst<0xE0, "fsub{|r}p $op">; -def MUL_FST0r : FPST0rInst <0xC8, "fmul $op">; -def MUL_FrST0 : FPrST0Inst <0xC8, "fmul {%st(0), $op|$op, %ST(0)}">; -def MUL_FPrST0 : FPrST0PInst<0xC8, "fmulp $op">; -def DIVR_FST0r : FPST0rInst <0xF8, "fdivr $op">; -def DIV_FrST0 : FPrST0Inst <0xF8, "fdiv{r} {%st(0), $op|$op, %ST(0)}">; -def DIV_FPrST0 : FPrST0PInst<0xF8, "fdiv{r}p $op">; -def DIV_FST0r : FPST0rInst <0xF0, "fdiv $op">; -def DIVR_FrST0 : FPrST0Inst <0xF0, "fdiv{|r} {%st(0), $op|$op, %ST(0)}">; -def DIVR_FPrST0 : FPrST0PInst<0xF0, "fdiv{|r}p $op">; +def ADD_FST0r : FPST0rInst <0xC0, "fadd\t$op">; +def ADD_FrST0 : FPrST0Inst <0xC0, "fadd\t{%st(0), $op|$op, %ST(0)}">; +def ADD_FPrST0 : FPrST0PInst<0xC0, "faddp\t$op">; +def SUBR_FST0r : FPST0rInst <0xE8, "fsubr\t$op">; +def SUB_FrST0 : FPrST0Inst <0xE8, "fsub{r}\t{%st(0), $op|$op, %ST(0)}">; +def SUB_FPrST0 : FPrST0PInst<0xE8, "fsub{r}p\t$op">; +def SUB_FST0r : FPST0rInst <0xE0, "fsub\t$op">; +def SUBR_FrST0 : FPrST0Inst <0xE0, "fsub{|r}\t{%st(0), $op|$op, %ST(0)}">; +def SUBR_FPrST0 : FPrST0PInst<0xE0, "fsub{|r}p\t$op">; +def MUL_FST0r : FPST0rInst <0xC8, "fmul\t$op">; +def MUL_FrST0 : FPrST0Inst <0xC8, "fmul\t{%st(0), $op|$op, %ST(0)}">; +def MUL_FPrST0 : FPrST0PInst<0xC8, "fmulp\t$op">; +def DIVR_FST0r : FPST0rInst <0xF8, "fdivr\t$op">; +def DIV_FrST0 : FPrST0Inst <0xF8, "fdiv{r}\t{%st(0), $op|$op, %ST(0)}">; +def DIV_FPrST0 : FPrST0PInst<0xF8, "fdiv{r}p\t$op">; +def DIV_FST0r : FPST0rInst <0xF0, "fdiv\t$op">; +def DIVR_FrST0 : FPrST0Inst <0xF0, "fdiv{|r}\t{%st(0), $op|$op, %ST(0)}">; +def DIVR_FPrST0 : FPrST0PInst<0xF0, "fdiv{|r}p\t$op">; // Unary operations. multiclass FPUnary opcode, string asmstring> { @@ -281,21 +281,21 @@ // These are not factored because there's no clean way to pass DA/DB. def CMOVB_F : FPI<0xC0, AddRegFrm, (outs RST:$op), (ins), - "fcmovb {$op, %st(0)|%ST(0), $op}">, DA; + "fcmovb\t{$op, %st(0)|%ST(0), $op}">, DA; def CMOVBE_F : FPI<0xD0, AddRegFrm, (outs RST:$op), (ins), - "fcmovbe {$op, %st(0)|%ST(0), $op}">, DA; + "fcmovbe\t{$op, %st(0)|%ST(0), $op}">, DA; def CMOVE_F : FPI<0xC8, AddRegFrm, (outs RST:$op), (ins), - "fcmove {$op, %st(0)|%ST(0), $op}">, DA; + "fcmove\t{$op, %st(0)|%ST(0), $op}">, DA; def CMOVP_F : FPI<0xD8, AddRegFrm, (outs RST:$op), (ins), - "fcmovu {$op, %st(0)|%ST(0), $op}">, DA; + "fcmovu\t {$op, %st(0)|%ST(0), $op}">, DA; def CMOVNB_F : FPI<0xC0, AddRegFrm, (outs RST:$op), (ins), - "fcmovnb {$op, %st(0)|%ST(0), $op}">, DB; + "fcmovnb\t{$op, %st(0)|%ST(0), $op}">, DB; def CMOVNBE_F: FPI<0xD0, AddRegFrm, (outs RST:$op), (ins), - "fcmovnbe {$op, %st(0)|%ST(0), $op}">, DB; + "fcmovnbe\t{$op, %st(0)|%ST(0), $op}">, DB; def CMOVNE_F : FPI<0xC8, AddRegFrm, (outs RST:$op), (ins), - "fcmovne {$op, %st(0)|%ST(0), $op}">, DB; + "fcmovne\t{$op, %st(0)|%ST(0), $op}">, DB; def CMOVNP_F : FPI<0xD8, AddRegFrm, (outs RST:$op), (ins), - "fcmovnu {$op, %st(0)|%ST(0), $op}">, DB; + "fcmovnu\t{$op, %st(0)|%ST(0), $op}">, DB; // Floating point loads & stores. def LD_Fp32m : FpI<(outs RFP32:$dst), (ins f32mem:$src), ZeroArgFP, @@ -332,20 +332,20 @@ def IST_Fp32m64 : FpI<(outs), (ins i32mem:$op, RFP64:$src), OneArgFP, []>; def IST_Fp64m64 : FpI<(outs), (ins i64mem:$op, RFP64:$src), OneArgFP, []>; -def LD_F32m : FPI<0xD9, MRM0m, (outs), (ins f32mem:$src), "fld{s} $src">; -def LD_F64m : FPI<0xDD, MRM0m, (outs), (ins f64mem:$src), "fld{l} $src">; -def ILD_F16m : FPI<0xDF, MRM0m, (outs), (ins i16mem:$src), "fild{s} $src">; -def ILD_F32m : FPI<0xDB, MRM0m, (outs), (ins i32mem:$src), "fild{l} $src">; -def ILD_F64m : FPI<0xDF, MRM5m, (outs), (ins i64mem:$src), "fild{ll} $src">; -def ST_F32m : FPI<0xD9, MRM2m, (outs), (ins f32mem:$dst), "fst{s} $dst">; -def ST_F64m : FPI<0xDD, MRM2m, (outs), (ins f64mem:$dst), "fst{l} $dst">; -def ST_FP32m : FPI<0xD9, MRM3m, (outs), (ins f32mem:$dst), "fstp{s} $dst">; -def ST_FP64m : FPI<0xDD, MRM3m, (outs), (ins f64mem:$dst), "fstp{l} $dst">; -def IST_F16m : FPI<0xDF, MRM2m, (outs), (ins i16mem:$dst), "fist{s} $dst">; -def IST_F32m : FPI<0xDB, MRM2m, (outs), (ins i32mem:$dst), "fist{l} $dst">; -def IST_FP16m : FPI<0xDF, MRM3m, (outs), (ins i16mem:$dst), "fistp{s} $dst">; -def IST_FP32m : FPI<0xDB, MRM3m, (outs), (ins i32mem:$dst), "fistp{l} $dst">; -def IST_FP64m : FPI<0xDF, MRM7m, (outs), (ins i64mem:$dst), "fistp{ll} $dst">; +def LD_F32m : FPI<0xD9, MRM0m, (outs), (ins f32mem:$src), "fld{s}\t$src">; +def LD_F64m : FPI<0xDD, MRM0m, (outs), (ins f64mem:$src), "fld{l}\t$src">; +def ILD_F16m : FPI<0xDF, MRM0m, (outs), (ins i16mem:$src), "fild{s}\t$src">; +def ILD_F32m : FPI<0xDB, MRM0m, (outs), (ins i32mem:$src), "fild{l}\t$src">; +def ILD_F64m : FPI<0xDF, MRM5m, (outs), (ins i64mem:$src), "fild{ll}\t$src">; +def ST_F32m : FPI<0xD9, MRM2m, (outs), (ins f32mem:$dst), "fst{s}\t$dst">; +def ST_F64m : FPI<0xDD, MRM2m, (outs), (ins f64mem:$dst), "fst{l}\t$dst">; +def ST_FP32m : FPI<0xD9, MRM3m, (outs), (ins f32mem:$dst), "fstp{s}\t$dst">; +def ST_FP64m : FPI<0xDD, MRM3m, (outs), (ins f64mem:$dst), "fstp{l}\t$dst">; +def IST_F16m : FPI<0xDF, MRM2m, (outs), (ins i16mem:$dst), "fist{s}\t$dst">; +def IST_F32m : FPI<0xDB, MRM2m, (outs), (ins i32mem:$dst), "fist{l}\t$dst">; +def IST_FP16m : FPI<0xDF, MRM3m, (outs), (ins i16mem:$dst), "fistp{s}\t$dst">; +def IST_FP32m : FPI<0xDB, MRM3m, (outs), (ins i32mem:$dst), "fistp{l}\t$dst">; +def IST_FP64m : FPI<0xDF, MRM7m, (outs), (ins i64mem:$dst), "fistp{ll}\t$dst">; // FISTTP requires SSE3 even though it's a FPStack op. def ISTT_Fp16m32 : FpI_<(outs), (ins i16mem:$op, RFP32:$src), OneArgFP, @@ -367,15 +367,15 @@ [(X86fp_to_i64mem RFP64:$src, addr:$op)]>, Requires<[HasSSE3]>; -def ISTT_FP16m : FPI<0xDF, MRM1m, (outs), (ins i16mem:$dst), "fisttp{s} $dst">; -def ISTT_FP32m : FPI<0xDB, MRM1m, (outs), (ins i32mem:$dst), "fisttp{l} $dst">; -def ISTT_FP64m : FPI<0xDD, MRM1m, (outs), (ins i64mem:$dst), "fisttp{ll} $dst">; +def ISTT_FP16m : FPI<0xDF, MRM1m, (outs), (ins i16mem:$dst), "fisttp{s}\t$dst">; +def ISTT_FP32m : FPI<0xDB, MRM1m, (outs), (ins i32mem:$dst), "fisttp{l}\t$dst">; +def ISTT_FP64m : FPI<0xDD, MRM1m, (outs), (ins i64mem:$dst), "fisttp{ll}\t$dst">; // FP Stack manipulation instructions. -def LD_Frr : FPI<0xC0, AddRegFrm, (outs), (ins RST:$op), "fld $op">, D9; -def ST_Frr : FPI<0xD0, AddRegFrm, (outs), (ins RST:$op), "fst $op">, DD; -def ST_FPrr : FPI<0xD8, AddRegFrm, (outs), (ins RST:$op), "fstp $op">, DD; -def XCH_F : FPI<0xC8, AddRegFrm, (outs), (ins RST:$op), "fxch $op">, D9; +def LD_Frr : FPI<0xC0, AddRegFrm, (outs), (ins RST:$op), "fld\t$op">, D9; +def ST_Frr : FPI<0xD0, AddRegFrm, (outs), (ins RST:$op), "fst\t$op">, DD; +def ST_FPrr : FPI<0xD8, AddRegFrm, (outs), (ins RST:$op), "fstp\t$op">, DD; +def XCH_F : FPI<0xC8, AddRegFrm, (outs), (ins RST:$op), "fxch\t$op">, D9; // Floating point constant loads. let isReMaterializable = 1 in { @@ -405,29 +405,29 @@ def UCOM_Fr : FPI<0xE0, AddRegFrm, // FPSW = cmp ST(0) with ST(i) (outs), (ins RST:$reg), - "fucom $reg">, DD, Imp<[ST0],[]>; + "fucom\t$reg">, DD, Imp<[ST0],[]>; def UCOM_FPr : FPI<0xE8, AddRegFrm, // FPSW = cmp ST(0) with ST(i), pop (outs), (ins RST:$reg), - "fucomp $reg">, DD, Imp<[ST0],[]>; + "fucomp\t$reg">, DD, Imp<[ST0],[]>; def UCOM_FPPr : FPI<0xE9, RawFrm, // cmp ST(0) with ST(1), pop, pop (outs), (ins), "fucompp">, DA, Imp<[ST0],[]>; def UCOM_FIr : FPI<0xE8, AddRegFrm, // CC = cmp ST(0) with ST(i) (outs), (ins RST:$reg), - "fucomi {$reg, %st(0)|%ST(0), $reg}">, DB, Imp<[ST0],[]>; + "fucomi\t{$reg, %st(0)|%ST(0), $reg}">, DB, Imp<[ST0],[]>; def UCOM_FIPr : FPI<0xE8, AddRegFrm, // CC = cmp ST(0) with ST(i), pop (outs), (ins RST:$reg), - "fucomip {$reg, %st(0)|%ST(0), $reg}">, DF, Imp<[ST0],[]>; + "fucomip\t{$reg, %st(0)|%ST(0), $reg}">, DF, Imp<[ST0],[]>; // Floating point flag ops. def FNSTSW8r : I<0xE0, RawFrm, // AX = fp flags (outs), (ins), "fnstsw", []>, DF, Imp<[],[AX]>; def FNSTCW16m : I<0xD9, MRM7m, // [mem16] = X87 control world - (outs), (ins i16mem:$dst), "fnstcw $dst", []>; + (outs), (ins i16mem:$dst), "fnstcw\t$dst", []>; def FLDCW16m : I<0xD9, MRM5m, // X87 control world = [mem16] - (outs), (ins i16mem:$dst), "fldcw $dst", []>; + (outs), (ins i16mem:$dst), "fldcw\t$dst", []>; //===----------------------------------------------------------------------===// // Non-Instruction Patterns Index: lib/Target/X86/X86InstrX86-64.td =================================================================== --- lib/Target/X86/X86InstrX86-64.td (revision 40587) +++ lib/Target/X86/X86InstrX86-64.td (working copy) @@ -125,18 +125,18 @@ XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7, XMM8, XMM9, XMM10, XMM11, XMM12, XMM13, XMM14, XMM15] in { def CALL64pcrel32 : I<0xE8, RawFrm, (outs), (ins i64imm:$dst, variable_ops), - "call ${dst:call}", []>; + "call\t${dst:call}", []>; def CALL64r : I<0xFF, MRM2r, (outs), (ins GR64:$dst, variable_ops), - "call {*}$dst", [(X86call GR64:$dst)]>; + "call\t{*}$dst", [(X86call GR64:$dst)]>; def CALL64m : I<0xFF, MRM2m, (outs), (ins i64mem:$dst, variable_ops), - "call {*}$dst", []>; + "call\t{*}$dst", []>; } // Branches let isBranch = 1, isTerminator = 1, isBarrier = 1 in { - def JMP64r : I<0xFF, MRM4r, (outs), (ins GR64:$dst), "jmp{q} {*}$dst", + def JMP64r : I<0xFF, MRM4r, (outs), (ins GR64:$dst), "jmp{q}\t{*}$dst", [(brind GR64:$dst)]>; - def JMP64m : I<0xFF, MRM4m, (outs), (ins i64mem:$dst), "jmp{q} {*}$dst", + def JMP64m : I<0xFF, MRM4m, (outs), (ins i64mem:$dst), "jmp{q}\t{*}$dst", [(brind (loadi64 addr:$dst))]>; } @@ -146,30 +146,30 @@ def LEAVE64 : I<0xC9, RawFrm, (outs), (ins), "leave", []>, Imp<[RBP,RSP],[RBP,RSP]>; def POP64r : I<0x58, AddRegFrm, - (outs GR64:$reg), (ins), "pop{q} $reg", []>, Imp<[RSP],[RSP]>; + (outs GR64:$reg), (ins), "pop{q}\t$reg", []>, Imp<[RSP],[RSP]>; def PUSH64r : I<0x50, AddRegFrm, - (outs), (ins GR64:$reg), "push{q} $reg", []>, Imp<[RSP],[RSP]>; + (outs), (ins GR64:$reg), "push{q}\t$reg", []>, Imp<[RSP],[RSP]>; def LEA64_32r : I<0x8D, MRMSrcMem, (outs GR32:$dst), (ins lea64_32mem:$src), - "lea{l} {$src|$dst}, {$dst|$src}", + "lea{l}\t{$src|$dst}, {$dst|$src}", [(set GR32:$dst, lea32addr:$src)]>, Requires<[In64BitMode]>; def LEA64r : RI<0x8D, MRMSrcMem, (outs GR64:$dst), (ins lea64mem:$src), - "lea{q} {$src|$dst}, {$dst|$src}", + "lea{q}\t{$src|$dst}, {$dst|$src}", [(set GR64:$dst, lea64addr:$src)]>; let isTwoAddress = 1 in def BSWAP64r : RI<0xC8, AddRegFrm, (outs GR64:$dst), (ins GR64:$src), - "bswap{q} $dst", + "bswap{q}\t$dst", [(set GR64:$dst, (bswap GR64:$src))]>, TB; // Exchange def XCHG64rr : RI<0x87, MRMDestReg, (outs), (ins GR64:$src1, GR64:$src2), - "xchg{q} {$src2|$src1}, {$src1|$src2}", []>; + "xchg{q}\t{$src2|$src1}, {$src1|$src2}", []>; def XCHG64mr : RI<0x87, MRMDestMem, (outs), (ins i64mem:$src1, GR64:$src2), - "xchg{q} {$src2|$src1}, {$src1|$src2}", []>; + "xchg{q}\t{$src2|$src1}, {$src1|$src2}", []>; def XCHG64rm : RI<0x87, MRMSrcMem, (outs), (ins GR64:$src1, i64mem:$src2), - "xchg{q} {$src2|$src1}, {$src1|$src2}", []>; + "xchg{q}\t{$src2|$src1}, {$src1|$src2}", []>; // Repeat string ops def REP_MOVSQ : RI<0xA5, RawFrm, (outs), (ins), "{rep;movsq|rep movsq}", @@ -184,58 +184,58 @@ // def MOV64rr : RI<0x89, MRMDestReg, (outs GR64:$dst), (ins GR64:$src), - "mov{q} {$src, $dst|$dst, $src}", []>; + "mov{q}\t{$src, $dst|$dst, $src}", []>; def MOV64ri : RIi64<0xB8, AddRegFrm, (outs GR64:$dst), (ins i64imm:$src), - "movabs{q} {$src, $dst|$dst, $src}", + "movabs{q}\t{$src, $dst|$dst, $src}", [(set GR64:$dst, imm:$src)]>; def MOV64ri32 : RIi32<0xC7, MRM0r, (outs GR64:$dst), (ins i64i32imm:$src), - "mov{q} {$src, $dst|$dst, $src}", + "mov{q}\t{$src, $dst|$dst, $src}", [(set GR64:$dst, i64immSExt32:$src)]>; def MOV64rm : RI<0x8B, MRMSrcMem, (outs GR64:$dst), (ins i64mem:$src), - "mov{q} {$src, $dst|$dst, $src}", + "mov{q}\t{$src, $dst|$dst, $src}", [(set GR64:$dst, (load addr:$src))]>; def MOV64mr : RI<0x89, MRMDestMem, (outs), (ins i64mem:$dst, GR64:$src), - "mov{q} {$src, $dst|$dst, $src}", + "mov{q}\t{$src, $dst|$dst, $src}", [(store GR64:$src, addr:$dst)]>; def MOV64mi32 : RIi32<0xC7, MRM0m, (outs), (ins i64mem:$dst, i64i32imm:$src), - "mov{q} {$src, $dst|$dst, $src}", + "mov{q}\t{$src, $dst|$dst, $src}", [(store i64immSExt32:$src, addr:$dst)]>; // Sign/Zero extenders def MOVSX64rr8 : RI<0xBE, MRMSrcReg, (outs GR64:$dst), (ins GR8 :$src), - "movs{bq|x} {$src, $dst|$dst, $src}", + "movs{bq|x}\t{$src, $dst|$dst, $src}", [(set GR64:$dst, (sext GR8:$src))]>, TB; def MOVSX64rm8 : RI<0xBE, MRMSrcMem, (outs GR64:$dst), (ins i8mem :$src), - "movs{bq|x} {$src, $dst|$dst, $src}", + "movs{bq|x}\t{$src, $dst|$dst, $src}", [(set GR64:$dst, (sextloadi64i8 addr:$src))]>, TB; def MOVSX64rr16: RI<0xBF, MRMSrcReg, (outs GR64:$dst), (ins GR16:$src), - "movs{wq|x} {$src, $dst|$dst, $src}", + "movs{wq|x}\t{$src, $dst|$dst, $src}", [(set GR64:$dst, (sext GR16:$src))]>, TB; def MOVSX64rm16: RI<0xBF, MRMSrcMem, (outs GR64:$dst), (ins i16mem:$src), - "movs{wq|x} {$src, $dst|$dst, $src}", + "movs{wq|x}\t{$src, $dst|$dst, $src}", [(set GR64:$dst, (sextloadi64i16 addr:$src))]>, TB; def MOVSX64rr32: RI<0x63, MRMSrcReg, (outs GR64:$dst), (ins GR32:$src), - "movs{lq|xd} {$src, $dst|$dst, $src}", + "movs{lq|xd}\t{$src, $dst|$dst, $src}", [(set GR64:$dst, (sext GR32:$src))]>; def MOVSX64rm32: RI<0x63, MRMSrcMem, (outs GR64:$dst), (ins i32mem:$src), - "movs{lq|xd} {$src, $dst|$dst, $src}", + "movs{lq|xd}\t{$src, $dst|$dst, $src}", [(set GR64:$dst, (sextloadi64i32 addr:$src))]>; def MOVZX64rr8 : RI<0xB6, MRMSrcReg, (outs GR64:$dst), (ins GR8 :$src), - "movz{bq|x} {$src, $dst|$dst, $src}", + "movz{bq|x}\t{$src, $dst|$dst, $src}", [(set GR64:$dst, (zext GR8:$src))]>, TB; def MOVZX64rm8 : RI<0xB6, MRMSrcMem, (outs GR64:$dst), (ins i8mem :$src), - "movz{bq|x} {$src, $dst|$dst, $src}", + "movz{bq|x}\t{$src, $dst|$dst, $src}", [(set GR64:$dst, (zextloadi64i8 addr:$src))]>, TB; def MOVZX64rr16: RI<0xB7, MRMSrcReg, (outs GR64:$dst), (ins GR16:$src), - "movz{wq|x} {$src, $dst|$dst, $src}", + "movz{wq|x}\t{$src, $dst|$dst, $src}", [(set GR64:$dst, (zext GR16:$src))]>, TB; def MOVZX64rm16: RI<0xB7, MRMSrcMem, (outs GR64:$dst), (ins i16mem:$src), - "movz{wq|x} {$src, $dst|$dst, $src}", + "movz{wq|x}\t{$src, $dst|$dst, $src}", [(set GR64:$dst, (zextloadi64i16 addr:$src))]>, TB; def CDQE : RI<0x98, RawFrm, (outs), (ins), @@ -252,204 +252,204 @@ let isConvertibleToThreeAddress = 1 in { let isCommutable = 1 in def ADD64rr : RI<0x01, MRMDestReg, (outs GR64:$dst), (ins GR64:$src1, GR64:$src2), - "add{q} {$src2, $dst|$dst, $src2}", + "add{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (add GR64:$src1, GR64:$src2))]>; def ADD64ri32 : RIi32<0x81, MRM0r, (outs GR64:$dst), (ins GR64:$src1, i64i32imm:$src2), - "add{q} {$src2, $dst|$dst, $src2}", + "add{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (add GR64:$src1, i64immSExt32:$src2))]>; def ADD64ri8 : RIi8<0x83, MRM0r, (outs GR64:$dst), (ins GR64:$src1, i64i8imm:$src2), - "add{q} {$src2, $dst|$dst, $src2}", + "add{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (add GR64:$src1, i64immSExt8:$src2))]>; } // isConvertibleToThreeAddress def ADD64rm : RI<0x03, MRMSrcMem, (outs GR64:$dst), (ins GR64:$src1, i64mem:$src2), - "add{q} {$src2, $dst|$dst, $src2}", + "add{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (add GR64:$src1, (load addr:$src2)))]>; } // isTwoAddress def ADD64mr : RI<0x01, MRMDestMem, (outs), (ins i64mem:$dst, GR64:$src2), - "add{q} {$src2, $dst|$dst, $src2}", + "add{q}\t{$src2, $dst|$dst, $src2}", [(store (add (load addr:$dst), GR64:$src2), addr:$dst)]>; def ADD64mi32 : RIi32<0x81, MRM0m, (outs), (ins i64mem:$dst, i64i32imm :$src2), - "add{q} {$src2, $dst|$dst, $src2}", + "add{q}\t{$src2, $dst|$dst, $src2}", [(store (add (load addr:$dst), i64immSExt32:$src2), addr:$dst)]>; def ADD64mi8 : RIi8<0x83, MRM0m, (outs), (ins i64mem:$dst, i64i8imm :$src2), - "add{q} {$src2, $dst|$dst, $src2}", + "add{q}\t{$src2, $dst|$dst, $src2}", [(store (add (load addr:$dst), i64immSExt8:$src2), addr:$dst)]>; let isTwoAddress = 1 in { let isCommutable = 1 in def ADC64rr : RI<0x11, MRMDestReg, (outs GR64:$dst), (ins GR64:$src1, GR64:$src2), - "adc{q} {$src2, $dst|$dst, $src2}", + "adc{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (adde GR64:$src1, GR64:$src2))]>; def ADC64rm : RI<0x13, MRMSrcMem , (outs GR64:$dst), (ins GR64:$src1, i64mem:$src2), - "adc{q} {$src2, $dst|$dst, $src2}", + "adc{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (adde GR64:$src1, (load addr:$src2)))]>; def ADC64ri32 : RIi32<0x81, MRM2r, (outs GR64:$dst), (ins GR64:$src1, i64i32imm:$src2), - "adc{q} {$src2, $dst|$dst, $src2}", + "adc{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (adde GR64:$src1, i64immSExt32:$src2))]>; def ADC64ri8 : RIi8<0x83, MRM2r, (outs GR64:$dst), (ins GR64:$src1, i64i8imm:$src2), - "adc{q} {$src2, $dst|$dst, $src2}", + "adc{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (adde GR64:$src1, i64immSExt8:$src2))]>; } // isTwoAddress def ADC64mr : RI<0x11, MRMDestMem, (outs), (ins i64mem:$dst, GR64:$src2), - "adc{q} {$src2, $dst|$dst, $src2}", + "adc{q}\t{$src2, $dst|$dst, $src2}", [(store (adde (load addr:$dst), GR64:$src2), addr:$dst)]>; def ADC64mi32 : RIi32<0x81, MRM2m, (outs), (ins i64mem:$dst, i64i32imm:$src2), - "adc{q} {$src2, $dst|$dst, $src2}", + "adc{q}\t{$src2, $dst|$dst, $src2}", [(store (adde (load addr:$dst), i64immSExt8:$src2), addr:$dst)]>; def ADC64mi8 : RIi8<0x83, MRM2m, (outs), (ins i64mem:$dst, i64i8imm :$src2), - "adc{q} {$src2, $dst|$dst, $src2}", + "adc{q}\t{$src2, $dst|$dst, $src2}", [(store (adde (load addr:$dst), i64immSExt8:$src2), addr:$dst)]>; let isTwoAddress = 1 in { def SUB64rr : RI<0x29, MRMDestReg, (outs GR64:$dst), (ins GR64:$src1, GR64:$src2), - "sub{q} {$src2, $dst|$dst, $src2}", + "sub{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (sub GR64:$src1, GR64:$src2))]>; def SUB64rm : RI<0x2B, MRMSrcMem, (outs GR64:$dst), (ins GR64:$src1, i64mem:$src2), - "sub{q} {$src2, $dst|$dst, $src2}", + "sub{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (sub GR64:$src1, (load addr:$src2)))]>; def SUB64ri32 : RIi32<0x81, MRM5r, (outs GR64:$dst), (ins GR64:$src1, i64i32imm:$src2), - "sub{q} {$src2, $dst|$dst, $src2}", + "sub{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (sub GR64:$src1, i64immSExt32:$src2))]>; def SUB64ri8 : RIi8<0x83, MRM5r, (outs GR64:$dst), (ins GR64:$src1, i64i8imm:$src2), - "sub{q} {$src2, $dst|$dst, $src2}", + "sub{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (sub GR64:$src1, i64immSExt8:$src2))]>; } // isTwoAddress def SUB64mr : RI<0x29, MRMDestMem, (outs), (ins i64mem:$dst, GR64:$src2), - "sub{q} {$src2, $dst|$dst, $src2}", + "sub{q}\t{$src2, $dst|$dst, $src2}", [(store (sub (load addr:$dst), GR64:$src2), addr:$dst)]>; def SUB64mi32 : RIi32<0x81, MRM5m, (outs), (ins i64mem:$dst, i64i32imm:$src2), - "sub{q} {$src2, $dst|$dst, $src2}", + "sub{q}\t{$src2, $dst|$dst, $src2}", [(store (sub (load addr:$dst), i64immSExt32:$src2), addr:$dst)]>; def SUB64mi8 : RIi8<0x83, MRM5m, (outs), (ins i64mem:$dst, i64i8imm :$src2), - "sub{q} {$src2, $dst|$dst, $src2}", + "sub{q}\t{$src2, $dst|$dst, $src2}", [(store (sub (load addr:$dst), i64immSExt8:$src2), addr:$dst)]>; let isTwoAddress = 1 in { def SBB64rr : RI<0x19, MRMDestReg, (outs GR64:$dst), (ins GR64:$src1, GR64:$src2), - "sbb{q} {$src2, $dst|$dst, $src2}", + "sbb{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (sube GR64:$src1, GR64:$src2))]>; def SBB64rm : RI<0x1B, MRMSrcMem, (outs GR64:$dst), (ins GR64:$src1, i64mem:$src2), - "sbb{q} {$src2, $dst|$dst, $src2}", + "sbb{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (sube GR64:$src1, (load addr:$src2)))]>; def SBB64ri32 : RIi32<0x81, MRM3r, (outs GR64:$dst), (ins GR64:$src1, i64i32imm:$src2), - "sbb{q} {$src2, $dst|$dst, $src2}", + "sbb{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (sube GR64:$src1, i64immSExt32:$src2))]>; def SBB64ri8 : RIi8<0x83, MRM3r, (outs GR64:$dst), (ins GR64:$src1, i64i8imm:$src2), - "sbb{q} {$src2, $dst|$dst, $src2}", + "sbb{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (sube GR64:$src1, i64immSExt8:$src2))]>; } // isTwoAddress def SBB64mr : RI<0x19, MRMDestMem, (outs), (ins i64mem:$dst, GR64:$src2), - "sbb{q} {$src2, $dst|$dst, $src2}", + "sbb{q}\t{$src2, $dst|$dst, $src2}", [(store (sube (load addr:$dst), GR64:$src2), addr:$dst)]>; def SBB64mi32 : RIi32<0x81, MRM3m, (outs), (ins i64mem:$dst, i64i32imm:$src2), - "sbb{q} {$src2, $dst|$dst, $src2}", + "sbb{q}\t{$src2, $dst|$dst, $src2}", [(store (sube (load addr:$dst), i64immSExt32:$src2), addr:$dst)]>; def SBB64mi8 : RIi8<0x83, MRM3m, (outs), (ins i64mem:$dst, i64i8imm :$src2), - "sbb{q} {$src2, $dst|$dst, $src2}", + "sbb{q}\t{$src2, $dst|$dst, $src2}", [(store (sube (load addr:$dst), i64immSExt8:$src2), addr:$dst)]>; // Unsigned multiplication def MUL64r : RI<0xF7, MRM4r, (outs), (ins GR64:$src), - "mul{q} $src", []>, + "mul{q}\t$src", []>, Imp<[RAX],[RAX,RDX]>; // RAX,RDX = RAX*GR64 def MUL64m : RI<0xF7, MRM4m, (outs), (ins i64mem:$src), - "mul{q} $src", []>, + "mul{q}\t$src", []>, Imp<[RAX],[RAX,RDX]>; // RAX,RDX = RAX*[mem64] // Signed multiplication def IMUL64r : RI<0xF7, MRM5r, (outs), (ins GR64:$src), - "imul{q} $src", []>, + "imul{q}\t$src", []>, Imp<[RAX],[RAX,RDX]>; // RAX,RDX = RAX*GR64 def IMUL64m : RI<0xF7, MRM5m, (outs), (ins i64mem:$src), - "imul{q} $src", []>, + "imul{q}\t$src", []>, Imp<[RAX],[RAX,RDX]>; // RAX,RDX = RAX*[mem64] let isTwoAddress = 1 in { let isCommutable = 1 in def IMUL64rr : RI<0xAF, MRMSrcReg, (outs GR64:$dst), (ins GR64:$src1, GR64:$src2), - "imul{q} {$src2, $dst|$dst, $src2}", + "imul{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (mul GR64:$src1, GR64:$src2))]>, TB; def IMUL64rm : RI<0xAF, MRMSrcMem, (outs GR64:$dst), (ins GR64:$src1, i64mem:$src2), - "imul{q} {$src2, $dst|$dst, $src2}", + "imul{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (mul GR64:$src1, (load addr:$src2)))]>, TB; } // isTwoAddress // Suprisingly enough, these are not two address instructions! def IMUL64rri32 : RIi32<0x69, MRMSrcReg, // GR64 = GR64*I32 (outs GR64:$dst), (ins GR64:$src1, i64i32imm:$src2), - "imul{q} {$src2, $src1, $dst|$dst, $src1, $src2}", + "imul{q}\t{$src2, $src1, $dst|$dst, $src1, $src2}", [(set GR64:$dst, (mul GR64:$src1, i64immSExt32:$src2))]>; def IMUL64rri8 : RIi8<0x6B, MRMSrcReg, // GR64 = GR64*I8 (outs GR64:$dst), (ins GR64:$src1, i64i8imm:$src2), - "imul{q} {$src2, $src1, $dst|$dst, $src1, $src2}", + "imul{q}\t{$src2, $src1, $dst|$dst, $src1, $src2}", [(set GR64:$dst, (mul GR64:$src1, i64immSExt8:$src2))]>; def IMUL64rmi32 : RIi32<0x69, MRMSrcMem, // GR64 = [mem64]*I32 (outs GR64:$dst), (ins i64mem:$src1, i64i32imm:$src2), - "imul{q} {$src2, $src1, $dst|$dst, $src1, $src2}", + "imul{q}\t{$src2, $src1, $dst|$dst, $src1, $src2}", [(set GR64:$dst, (mul (load addr:$src1), i64immSExt32:$src2))]>; def IMUL64rmi8 : RIi8<0x6B, MRMSrcMem, // GR64 = [mem64]*I8 (outs GR64:$dst), (ins i64mem:$src1, i64i8imm: $src2), - "imul{q} {$src2, $src1, $dst|$dst, $src1, $src2}", + "imul{q}\t{$src2, $src1, $dst|$dst, $src1, $src2}", [(set GR64:$dst, (mul (load addr:$src1), i64immSExt8:$src2))]>; // Unsigned division / remainder def DIV64r : RI<0xF7, MRM6r, (outs), (ins GR64:$src), // RDX:RAX/r64 = RAX,RDX - "div{q} $src", []>, Imp<[RAX,RDX],[RAX,RDX]>; + "div{q}\t$src", []>, Imp<[RAX,RDX],[RAX,RDX]>; def DIV64m : RI<0xF7, MRM6m, (outs), (ins i64mem:$src), // RDX:RAX/[mem64] = RAX,RDX - "div{q} $src", []>, Imp<[RAX,RDX],[RAX,RDX]>; + "div{q}\t$src", []>, Imp<[RAX,RDX],[RAX,RDX]>; // Signed division / remainder def IDIV64r: RI<0xF7, MRM7r, (outs), (ins GR64:$src), // RDX:RAX/r64 = RAX,RDX - "idiv{q} $src", []>, Imp<[RAX,RDX],[RAX,RDX]>; + "idiv{q}\t$src", []>, Imp<[RAX,RDX],[RAX,RDX]>; def IDIV64m: RI<0xF7, MRM7m, (outs), (ins i64mem:$src), // RDX:RAX/[mem64] = RAX,RDX - "idiv{q} $src", []>, Imp<[RAX,RDX],[RAX,RDX]>; + "idiv{q}\t$src", []>, Imp<[RAX,RDX],[RAX,RDX]>; // Unary instructions let CodeSize = 2 in { let isTwoAddress = 1 in -def NEG64r : RI<0xF7, MRM3r, (outs GR64:$dst), (ins GR64:$src), "neg{q} $dst", +def NEG64r : RI<0xF7, MRM3r, (outs GR64:$dst), (ins GR64:$src), "neg{q}\t$dst", [(set GR64:$dst, (ineg GR64:$src))]>; -def NEG64m : RI<0xF7, MRM3m, (outs), (ins i64mem:$dst), "neg{q} $dst", +def NEG64m : RI<0xF7, MRM3m, (outs), (ins i64mem:$dst), "neg{q}\t$dst", [(store (ineg (loadi64 addr:$dst)), addr:$dst)]>; let isTwoAddress = 1, isConvertibleToThreeAddress = 1 in -def INC64r : RI<0xFF, MRM0r, (outs GR64:$dst), (ins GR64:$src), "inc{q} $dst", +def INC64r : RI<0xFF, MRM0r, (outs GR64:$dst), (ins GR64:$src), "inc{q}\t$dst", [(set GR64:$dst, (add GR64:$src, 1))]>; -def INC64m : RI<0xFF, MRM0m, (outs), (ins i64mem:$dst), "inc{q} $dst", +def INC64m : RI<0xFF, MRM0m, (outs), (ins i64mem:$dst), "inc{q}\t$dst", [(store (add (loadi64 addr:$dst), 1), addr:$dst)]>; let isTwoAddress = 1, isConvertibleToThreeAddress = 1 in -def DEC64r : RI<0xFF, MRM1r, (outs GR64:$dst), (ins GR64:$src), "dec{q} $dst", +def DEC64r : RI<0xFF, MRM1r, (outs GR64:$dst), (ins GR64:$src), "dec{q}\t$dst", [(set GR64:$dst, (add GR64:$src, -1))]>; -def DEC64m : RI<0xFF, MRM1m, (outs), (ins i64mem:$dst), "dec{q} $dst", +def DEC64m : RI<0xFF, MRM1m, (outs), (ins i64mem:$dst), "dec{q}\t$dst", [(store (add (loadi64 addr:$dst), -1), addr:$dst)]>; // In 64-bit mode, single byte INC and DEC cannot be encoded. let isTwoAddress = 1, isConvertibleToThreeAddress = 1 in { // Can transform into LEA. -def INC64_16r : I<0xFF, MRM0r, (outs GR16:$dst), (ins GR16:$src), "inc{w} $dst", +def INC64_16r : I<0xFF, MRM0r, (outs GR16:$dst), (ins GR16:$src), "inc{w}\t$dst", [(set GR16:$dst, (add GR16:$src, 1))]>, OpSize, Requires<[In64BitMode]>; -def INC64_32r : I<0xFF, MRM0r, (outs GR32:$dst), (ins GR32:$src), "inc{l} $dst", +def INC64_32r : I<0xFF, MRM0r, (outs GR32:$dst), (ins GR32:$src), "inc{l}\t$dst", [(set GR32:$dst, (add GR32:$src, 1))]>, Requires<[In64BitMode]>; -def DEC64_16r : I<0xFF, MRM1r, (outs GR16:$dst), (ins GR16:$src), "dec{w} $dst", +def DEC64_16r : I<0xFF, MRM1r, (outs GR16:$dst), (ins GR16:$src), "dec{w}\t$dst", [(set GR16:$dst, (add GR16:$src, -1))]>, OpSize, Requires<[In64BitMode]>; -def DEC64_32r : I<0xFF, MRM1r, (outs GR32:$dst), (ins GR32:$src), "dec{l} $dst", +def DEC64_32r : I<0xFF, MRM1r, (outs GR32:$dst), (ins GR32:$src), "dec{l}\t$dst", [(set GR32:$dst, (add GR32:$src, -1))]>, Requires<[In64BitMode]>; } // isConvertibleToThreeAddress @@ -459,138 +459,138 @@ // Shift instructions let isTwoAddress = 1 in { def SHL64rCL : RI<0xD3, MRM4r, (outs GR64:$dst), (ins GR64:$src), - "shl{q} {%cl, $dst|$dst, %CL}", + "shl{q}\t{%cl, $dst|$dst, %CL}", [(set GR64:$dst, (shl GR64:$src, CL))]>, Imp<[CL],[]>; def SHL64ri : RIi8<0xC1, MRM4r, (outs GR64:$dst), (ins GR64:$src1, i8imm:$src2), - "shl{q} {$src2, $dst|$dst, $src2}", + "shl{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (shl GR64:$src1, (i8 imm:$src2)))]>; def SHL64r1 : RI<0xD1, MRM4r, (outs GR64:$dst), (ins GR64:$src1), - "shl{q} $dst", []>; + "shl{q}\t$dst", []>; } // isTwoAddress def SHL64mCL : RI<0xD3, MRM4m, (outs), (ins i64mem:$dst), - "shl{q} {%cl, $dst|$dst, %CL}", + "shl{q}\t{%cl, $dst|$dst, %CL}", [(store (shl (loadi64 addr:$dst), CL), addr:$dst)]>, Imp<[CL],[]>; def SHL64mi : RIi8<0xC1, MRM4m, (outs), (ins i64mem:$dst, i8imm:$src), - "shl{q} {$src, $dst|$dst, $src}", + "shl{q}\t{$src, $dst|$dst, $src}", [(store (shl (loadi64 addr:$dst), (i8 imm:$src)), addr:$dst)]>; def SHL64m1 : RI<0xD1, MRM4m, (outs), (ins i64mem:$dst), - "shl{q} $dst", + "shl{q}\t$dst", [(store (shl (loadi64 addr:$dst), (i8 1)), addr:$dst)]>; let isTwoAddress = 1 in { def SHR64rCL : RI<0xD3, MRM5r, (outs GR64:$dst), (ins GR64:$src), - "shr{q} {%cl, $dst|$dst, %CL}", + "shr{q}\t{%cl, $dst|$dst, %CL}", [(set GR64:$dst, (srl GR64:$src, CL))]>, Imp<[CL],[]>; def SHR64ri : RIi8<0xC1, MRM5r, (outs GR64:$dst), (ins GR64:$src1, i8imm:$src2), - "shr{q} {$src2, $dst|$dst, $src2}", + "shr{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (srl GR64:$src1, (i8 imm:$src2)))]>; def SHR64r1 : RI<0xD1, MRM5r, (outs GR64:$dst), (ins GR64:$src1), - "shr{q} $dst", + "shr{q}\t$dst", [(set GR64:$dst, (srl GR64:$src1, (i8 1)))]>; } // isTwoAddress def SHR64mCL : RI<0xD3, MRM5m, (outs), (ins i64mem:$dst), - "shr{q} {%cl, $dst|$dst, %CL}", + "shr{q}\t{%cl, $dst|$dst, %CL}", [(store (srl (loadi64 addr:$dst), CL), addr:$dst)]>, Imp<[CL],[]>; def SHR64mi : RIi8<0xC1, MRM5m, (outs), (ins i64mem:$dst, i8imm:$src), - "shr{q} {$src, $dst|$dst, $src}", + "shr{q}\t{$src, $dst|$dst, $src}", [(store (srl (loadi64 addr:$dst), (i8 imm:$src)), addr:$dst)]>; def SHR64m1 : RI<0xD1, MRM5m, (outs), (ins i64mem:$dst), - "shr{q} $dst", + "shr{q}\t$dst", [(store (srl (loadi64 addr:$dst), (i8 1)), addr:$dst)]>; let isTwoAddress = 1 in { def SAR64rCL : RI<0xD3, MRM7r, (outs GR64:$dst), (ins GR64:$src), - "sar{q} {%cl, $dst|$dst, %CL}", + "sar{q}\t{%cl, $dst|$dst, %CL}", [(set GR64:$dst, (sra GR64:$src, CL))]>, Imp<[CL],[]>; def SAR64ri : RIi8<0xC1, MRM7r, (outs GR64:$dst), (ins GR64:$src1, i8imm:$src2), - "sar{q} {$src2, $dst|$dst, $src2}", + "sar{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (sra GR64:$src1, (i8 imm:$src2)))]>; def SAR64r1 : RI<0xD1, MRM7r, (outs GR64:$dst), (ins GR64:$src1), - "sar{q} $dst", + "sar{q}\t$dst", [(set GR64:$dst, (sra GR64:$src1, (i8 1)))]>; } // isTwoAddress def SAR64mCL : RI<0xD3, MRM7m, (outs), (ins i64mem:$dst), - "sar{q} {%cl, $dst|$dst, %CL}", + "sar{q}\t{%cl, $dst|$dst, %CL}", [(store (sra (loadi64 addr:$dst), CL), addr:$dst)]>, Imp<[CL],[]>; def SAR64mi : RIi8<0xC1, MRM7m, (outs), (ins i64mem:$dst, i8imm:$src), - "sar{q} {$src, $dst|$dst, $src}", + "sar{q}\t{$src, $dst|$dst, $src}", [(store (sra (loadi64 addr:$dst), (i8 imm:$src)), addr:$dst)]>; def SAR64m1 : RI<0xD1, MRM7m, (outs), (ins i64mem:$dst), - "sar{q} $dst", + "sar{q}\t$dst", [(store (sra (loadi64 addr:$dst), (i8 1)), addr:$dst)]>; // Rotate instructions let isTwoAddress = 1 in { def ROL64rCL : RI<0xD3, MRM0r, (outs GR64:$dst), (ins GR64:$src), - "rol{q} {%cl, $dst|$dst, %CL}", + "rol{q}\t{%cl, $dst|$dst, %CL}", [(set GR64:$dst, (rotl GR64:$src, CL))]>, Imp<[CL],[]>; def ROL64ri : RIi8<0xC1, MRM0r, (outs GR64:$dst), (ins GR64:$src1, i8imm:$src2), - "rol{q} {$src2, $dst|$dst, $src2}", + "rol{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (rotl GR64:$src1, (i8 imm:$src2)))]>; def ROL64r1 : RI<0xD1, MRM0r, (outs GR64:$dst), (ins GR64:$src1), - "rol{q} $dst", + "rol{q}\t$dst", [(set GR64:$dst, (rotl GR64:$src1, (i8 1)))]>; } // isTwoAddress def ROL64mCL : I<0xD3, MRM0m, (outs), (ins i64mem:$dst), - "rol{q} {%cl, $dst|$dst, %CL}", + "rol{q}\t{%cl, $dst|$dst, %CL}", [(store (rotl (loadi64 addr:$dst), CL), addr:$dst)]>, Imp<[CL],[]>; def ROL64mi : RIi8<0xC1, MRM0m, (outs), (ins i64mem:$dst, i8imm:$src), - "rol{q} {$src, $dst|$dst, $src}", + "rol{q}\t{$src, $dst|$dst, $src}", [(store (rotl (loadi64 addr:$dst), (i8 imm:$src)), addr:$dst)]>; def ROL64m1 : RI<0xD1, MRM0m, (outs), (ins i64mem:$dst), - "rol{q} $dst", + "rol{q}\t$dst", [(store (rotl (loadi64 addr:$dst), (i8 1)), addr:$dst)]>; let isTwoAddress = 1 in { def ROR64rCL : RI<0xD3, MRM1r, (outs GR64:$dst), (ins GR64:$src), - "ror{q} {%cl, $dst|$dst, %CL}", + "ror{q}\t{%cl, $dst|$dst, %CL}", [(set GR64:$dst, (rotr GR64:$src, CL))]>, Imp<[CL],[]>; def ROR64ri : RIi8<0xC1, MRM1r, (outs GR64:$dst), (ins GR64:$src1, i8imm:$src2), - "ror{q} {$src2, $dst|$dst, $src2}", + "ror{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (rotr GR64:$src1, (i8 imm:$src2)))]>; def ROR64r1 : RI<0xD1, MRM1r, (outs GR64:$dst), (ins GR64:$src1), - "ror{q} $dst", + "ror{q}\t$dst", [(set GR64:$dst, (rotr GR64:$src1, (i8 1)))]>; } // isTwoAddress def ROR64mCL : RI<0xD3, MRM1m, (outs), (ins i64mem:$dst), - "ror{q} {%cl, $dst|$dst, %CL}", + "ror{q}\t{%cl, $dst|$dst, %CL}", [(store (rotr (loadi64 addr:$dst), CL), addr:$dst)]>, Imp<[CL],[]>; def ROR64mi : RIi8<0xC1, MRM1m, (outs), (ins i64mem:$dst, i8imm:$src), - "ror{q} {$src, $dst|$dst, $src}", + "ror{q}\t{$src, $dst|$dst, $src}", [(store (rotr (loadi64 addr:$dst), (i8 imm:$src)), addr:$dst)]>; def ROR64m1 : RI<0xD1, MRM1m, (outs), (ins i64mem:$dst), - "ror{q} $dst", + "ror{q}\t$dst", [(store (rotr (loadi64 addr:$dst), (i8 1)), addr:$dst)]>; // Double shift instructions (generalizations of rotate) let isTwoAddress = 1 in { def SHLD64rrCL : RI<0xA5, MRMDestReg, (outs GR64:$dst), (ins GR64:$src1, GR64:$src2), - "shld{q} {%cl, $src2, $dst|$dst, $src2, %CL}", []>, + "shld{q}\t{%cl, $src2, $dst|$dst, $src2, %CL}", []>, Imp<[CL],[]>, TB; def SHRD64rrCL : RI<0xAD, MRMDestReg, (outs GR64:$dst), (ins GR64:$src1, GR64:$src2), - "shrd{q} {%cl, $src2, $dst|$dst, $src2, %CL}", []>, + "shrd{q}\t{%cl, $src2, $dst|$dst, $src2, %CL}", []>, Imp<[CL],[]>, TB; let isCommutable = 1 in { // FIXME: Update X86InstrInfo::commuteInstruction def SHLD64rri8 : RIi8<0xA4, MRMDestReg, (outs GR64:$dst), (ins GR64:$src1, GR64:$src2, i8imm:$src3), - "shld{q} {$src3, $src2, $dst|$dst, $src2, $src3}", []>, + "shld{q}\t{$src3, $src2, $dst|$dst, $src2, $src3}", []>, TB; def SHRD64rri8 : RIi8<0xAC, MRMDestReg, (outs GR64:$dst), (ins GR64:$src1, GR64:$src2, i8imm:$src3), - "shrd{q} {$src3, $src2, $dst|$dst, $src2, $src3}", []>, + "shrd{q}\t{$src3, $src2, $dst|$dst, $src2, $src3}", []>, TB; } // isCommutable } // isTwoAddress @@ -598,18 +598,18 @@ // Temporary hack: there is no patterns associated with these instructions // so we have to tell tblgen that these do not produce results. def SHLD64mrCL : RI<0xA5, MRMDestMem, (outs), (ins i64mem:$dst, GR64:$src2), - "shld{q} {%cl, $src2, $dst|$dst, $src2, %CL}", []>, + "shld{q}\t{%cl, $src2, $dst|$dst, $src2, %CL}", []>, Imp<[CL],[]>, TB; def SHRD64mrCL : RI<0xAD, MRMDestMem, (outs), (ins i64mem:$dst, GR64:$src2), - "shrd{q} {%cl, $src2, $dst|$dst, $src2, %CL}", []>, + "shrd{q}\t{%cl, $src2, $dst|$dst, $src2, %CL}", []>, Imp<[CL],[]>, TB; def SHLD64mri8 : RIi8<0xA4, MRMDestMem, (outs), (ins i64mem:$dst, GR64:$src2, i8imm:$src3), - "shld{q} {$src3, $src2, $dst|$dst, $src2, $src3}", []>, + "shld{q}\t{$src3, $src2, $dst|$dst, $src2, $src3}", []>, TB; def SHRD64mri8 : RIi8<0xAC, MRMDestMem, (outs), (ins i64mem:$dst, GR64:$src2, i8imm:$src3), - "shrd{q} {$src3, $src2, $dst|$dst, $src2, $src3}", []>, + "shrd{q}\t{$src3, $src2, $dst|$dst, $src2, $src3}", []>, TB; //===----------------------------------------------------------------------===// @@ -617,95 +617,95 @@ // let isTwoAddress = 1 in -def NOT64r : RI<0xF7, MRM2r, (outs GR64:$dst), (ins GR64:$src), "not{q} $dst", +def NOT64r : RI<0xF7, MRM2r, (outs GR64:$dst), (ins GR64:$src), "not{q}\t$dst", [(set GR64:$dst, (not GR64:$src))]>; -def NOT64m : RI<0xF7, MRM2m, (outs), (ins i64mem:$dst), "not{q} $dst", +def NOT64m : RI<0xF7, MRM2m, (outs), (ins i64mem:$dst), "not{q}\t$dst", [(store (not (loadi64 addr:$dst)), addr:$dst)]>; let isTwoAddress = 1 in { let isCommutable = 1 in def AND64rr : RI<0x21, MRMDestReg, (outs GR64:$dst), (ins GR64:$src1, GR64:$src2), - "and{q} {$src2, $dst|$dst, $src2}", + "and{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (and GR64:$src1, GR64:$src2))]>; def AND64rm : RI<0x23, MRMSrcMem, (outs GR64:$dst), (ins GR64:$src1, i64mem:$src2), - "and{q} {$src2, $dst|$dst, $src2}", + "and{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (and GR64:$src1, (load addr:$src2)))]>; def AND64ri32 : RIi32<0x81, MRM4r, (outs GR64:$dst), (ins GR64:$src1, i64i32imm:$src2), - "and{q} {$src2, $dst|$dst, $src2}", + "and{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (and GR64:$src1, i64immSExt32:$src2))]>; def AND64ri8 : RIi8<0x83, MRM4r, (outs GR64:$dst), (ins GR64:$src1, i64i8imm:$src2), - "and{q} {$src2, $dst|$dst, $src2}", + "and{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (and GR64:$src1, i64immSExt8:$src2))]>; } // isTwoAddress def AND64mr : RI<0x21, MRMDestMem, (outs), (ins i64mem:$dst, GR64:$src), - "and{q} {$src, $dst|$dst, $src}", + "and{q}\t{$src, $dst|$dst, $src}", [(store (and (load addr:$dst), GR64:$src), addr:$dst)]>; def AND64mi32 : RIi32<0x81, MRM4m, (outs), (ins i64mem:$dst, i64i32imm:$src), - "and{q} {$src, $dst|$dst, $src}", + "and{q}\t{$src, $dst|$dst, $src}", [(store (and (loadi64 addr:$dst), i64immSExt32:$src), addr:$dst)]>; def AND64mi8 : RIi8<0x83, MRM4m, (outs), (ins i64mem:$dst, i64i8imm :$src), - "and{q} {$src, $dst|$dst, $src}", + "and{q}\t{$src, $dst|$dst, $src}", [(store (and (load addr:$dst), i64immSExt8:$src), addr:$dst)]>; let isTwoAddress = 1 in { let isCommutable = 1 in def OR64rr : RI<0x09, MRMDestReg, (outs GR64:$dst), (ins GR64:$src1, GR64:$src2), - "or{q} {$src2, $dst|$dst, $src2}", + "or{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (or GR64:$src1, GR64:$src2))]>; def OR64rm : RI<0x0B, MRMSrcMem , (outs GR64:$dst), (ins GR64:$src1, i64mem:$src2), - "or{q} {$src2, $dst|$dst, $src2}", + "or{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (or GR64:$src1, (load addr:$src2)))]>; def OR64ri32 : RIi32<0x81, MRM1r, (outs GR64:$dst), (ins GR64:$src1, i64i32imm:$src2), - "or{q} {$src2, $dst|$dst, $src2}", + "or{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (or GR64:$src1, i64immSExt32:$src2))]>; def OR64ri8 : RIi8<0x83, MRM1r, (outs GR64:$dst), (ins GR64:$src1, i64i8imm:$src2), - "or{q} {$src2, $dst|$dst, $src2}", + "or{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (or GR64:$src1, i64immSExt8:$src2))]>; } // isTwoAddress def OR64mr : RI<0x09, MRMDestMem, (outs), (ins i64mem:$dst, GR64:$src), - "or{q} {$src, $dst|$dst, $src}", + "or{q}\t{$src, $dst|$dst, $src}", [(store (or (load addr:$dst), GR64:$src), addr:$dst)]>; def OR64mi32 : RIi32<0x81, MRM1m, (outs), (ins i64mem:$dst, i64i32imm:$src), - "or{q} {$src, $dst|$dst, $src}", + "or{q}\t{$src, $dst|$dst, $src}", [(store (or (loadi64 addr:$dst), i64immSExt32:$src), addr:$dst)]>; def OR64mi8 : RIi8<0x83, MRM1m, (outs), (ins i64mem:$dst, i64i8imm:$src), - "or{q} {$src, $dst|$dst, $src}", + "or{q}\t{$src, $dst|$dst, $src}", [(store (or (load addr:$dst), i64immSExt8:$src), addr:$dst)]>; let isTwoAddress = 1 in { let isCommutable = 1 in def XOR64rr : RI<0x31, MRMDestReg, (outs GR64:$dst), (ins GR64:$src1, GR64:$src2), - "xor{q} {$src2, $dst|$dst, $src2}", + "xor{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (xor GR64:$src1, GR64:$src2))]>; def XOR64rm : RI<0x33, MRMSrcMem, (outs GR64:$dst), (ins GR64:$src1, i64mem:$src2), - "xor{q} {$src2, $dst|$dst, $src2}", + "xor{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (xor GR64:$src1, (load addr:$src2)))]>; def XOR64ri32 : RIi32<0x81, MRM6r, (outs GR64:$dst), (ins GR64:$src1, i64i32imm:$src2), - "xor{q} {$src2, $dst|$dst, $src2}", + "xor{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (xor GR64:$src1, i64immSExt32:$src2))]>; def XOR64ri8 : RIi8<0x83, MRM6r, (outs GR64:$dst), (ins GR64:$src1, i64i8imm:$src2), - "xor{q} {$src2, $dst|$dst, $src2}", + "xor{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (xor GR64:$src1, i64immSExt8:$src2))]>; } // isTwoAddress def XOR64mr : RI<0x31, MRMDestMem, (outs), (ins i64mem:$dst, GR64:$src), - "xor{q} {$src, $dst|$dst, $src}", + "xor{q}\t{$src, $dst|$dst, $src}", [(store (xor (load addr:$dst), GR64:$src), addr:$dst)]>; def XOR64mi32 : RIi32<0x81, MRM6m, (outs), (ins i64mem:$dst, i64i32imm:$src), - "xor{q} {$src, $dst|$dst, $src}", + "xor{q}\t{$src, $dst|$dst, $src}", [(store (xor (loadi64 addr:$dst), i64immSExt32:$src), addr:$dst)]>; def XOR64mi8 : RIi8<0x83, MRM6m, (outs), (ins i64mem:$dst, i64i8imm :$src), - "xor{q} {$src, $dst|$dst, $src}", + "xor{q}\t{$src, $dst|$dst, $src}", [(store (xor (load addr:$dst), i64immSExt8:$src), addr:$dst)]>; //===----------------------------------------------------------------------===// @@ -715,180 +715,180 @@ // Integer comparison let isCommutable = 1 in def TEST64rr : RI<0x85, MRMDestReg, (outs), (ins GR64:$src1, GR64:$src2), - "test{q} {$src2, $src1|$src1, $src2}", + "test{q}\t{$src2, $src1|$src1, $src2}", [(X86cmp (and GR64:$src1, GR64:$src2), 0)]>; def TEST64rm : RI<0x85, MRMSrcMem, (outs), (ins GR64:$src1, i64mem:$src2), - "test{q} {$src2, $src1|$src1, $src2}", + "test{q}\t{$src2, $src1|$src1, $src2}", [(X86cmp (and GR64:$src1, (loadi64 addr:$src2)), 0)]>; def TEST64ri32 : RIi32<0xF7, MRM0r, (outs), (ins GR64:$src1, i64i32imm:$src2), - "test{q} {$src2, $src1|$src1, $src2}", + "test{q}\t{$src2, $src1|$src1, $src2}", [(X86cmp (and GR64:$src1, i64immSExt32:$src2), 0)]>; def TEST64mi32 : RIi32<0xF7, MRM0m, (outs), (ins i64mem:$src1, i64i32imm:$src2), - "test{q} {$src2, $src1|$src1, $src2}", + "test{q}\t{$src2, $src1|$src1, $src2}", [(X86cmp (and (loadi64 addr:$src1), i64immSExt32:$src2), 0)]>; def CMP64rr : RI<0x39, MRMDestReg, (outs), (ins GR64:$src1, GR64:$src2), - "cmp{q} {$src2, $src1|$src1, $src2}", + "cmp{q}\t{$src2, $src1|$src1, $src2}", [(X86cmp GR64:$src1, GR64:$src2)]>; def CMP64mr : RI<0x39, MRMDestMem, (outs), (ins i64mem:$src1, GR64:$src2), - "cmp{q} {$src2, $src1|$src1, $src2}", + "cmp{q}\t{$src2, $src1|$src1, $src2}", [(X86cmp (loadi64 addr:$src1), GR64:$src2)]>; def CMP64rm : RI<0x3B, MRMSrcMem, (outs), (ins GR64:$src1, i64mem:$src2), - "cmp{q} {$src2, $src1|$src1, $src2}", + "cmp{q}\t{$src2, $src1|$src1, $src2}", [(X86cmp GR64:$src1, (loadi64 addr:$src2))]>; def CMP64ri32 : RIi32<0x81, MRM7r, (outs), (ins GR64:$src1, i64i32imm:$src2), - "cmp{q} {$src2, $src1|$src1, $src2}", + "cmp{q}\t{$src2, $src1|$src1, $src2}", [(X86cmp GR64:$src1, i64immSExt32:$src2)]>; def CMP64mi32 : RIi32<0x81, MRM7m, (outs), (ins i64mem:$src1, i64i32imm:$src2), - "cmp{q} {$src2, $src1|$src1, $src2}", + "cmp{q}\t{$src2, $src1|$src1, $src2}", [(X86cmp (loadi64 addr:$src1), i64immSExt32:$src2)]>; def CMP64mi8 : RIi8<0x83, MRM7m, (outs), (ins i64mem:$src1, i64i8imm:$src2), - "cmp{q} {$src2, $src1|$src1, $src2}", + "cmp{q}\t{$src2, $src1|$src1, $src2}", [(X86cmp (loadi64 addr:$src1), i64immSExt8:$src2)]>; def CMP64ri8 : RIi8<0x83, MRM7r, (outs), (ins GR64:$src1, i64i8imm:$src2), - "cmp{q} {$src2, $src1|$src1, $src2}", + "cmp{q}\t{$src2, $src1|$src1, $src2}", [(X86cmp GR64:$src1, i64immSExt8:$src2)]>; // Conditional moves let isTwoAddress = 1 in { def CMOVB64rr : RI<0x42, MRMSrcReg, // if , TB; def CMOVB64rm : RI<0x42, MRMSrcMem, // if , TB; def CMOVAE64rr: RI<0x43, MRMSrcReg, // if >=u, GR64 = GR64 (outs GR64:$dst), (ins GR64:$src1, GR64:$src2), - "cmovae {$src2, $dst|$dst, $src2}", + "cmovae\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (X86cmov GR64:$src1, GR64:$src2, X86_COND_AE))]>, TB; def CMOVAE64rm: RI<0x43, MRMSrcMem, // if >=u, GR64 = [mem64] (outs GR64:$dst), (ins GR64:$src1, i64mem:$src2), - "cmovae {$src2, $dst|$dst, $src2}", + "cmovae\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (X86cmov GR64:$src1, (loadi64 addr:$src2), X86_COND_AE))]>, TB; def CMOVE64rr : RI<0x44, MRMSrcReg, // if ==, GR64 = GR64 (outs GR64:$dst), (ins GR64:$src1, GR64:$src2), - "cmove {$src2, $dst|$dst, $src2}", + "cmove\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (X86cmov GR64:$src1, GR64:$src2, X86_COND_E))]>, TB; def CMOVE64rm : RI<0x44, MRMSrcMem, // if ==, GR64 = [mem64] (outs GR64:$dst), (ins GR64:$src1, i64mem:$src2), - "cmove {$src2, $dst|$dst, $src2}", + "cmove\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (X86cmov GR64:$src1, (loadi64 addr:$src2), X86_COND_E))]>, TB; def CMOVNE64rr: RI<0x45, MRMSrcReg, // if !=, GR64 = GR64 (outs GR64:$dst), (ins GR64:$src1, GR64:$src2), - "cmovne {$src2, $dst|$dst, $src2}", + "cmovne\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (X86cmov GR64:$src1, GR64:$src2, X86_COND_NE))]>, TB; def CMOVNE64rm: RI<0x45, MRMSrcMem, // if !=, GR64 = [mem64] (outs GR64:$dst), (ins GR64:$src1, i64mem:$src2), - "cmovne {$src2, $dst|$dst, $src2}", + "cmovne\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (X86cmov GR64:$src1, (loadi64 addr:$src2), X86_COND_NE))]>, TB; def CMOVBE64rr: RI<0x46, MRMSrcReg, // if <=u, GR64 = GR64 (outs GR64:$dst), (ins GR64:$src1, GR64:$src2), - "cmovbe {$src2, $dst|$dst, $src2}", + "cmovbe\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (X86cmov GR64:$src1, GR64:$src2, X86_COND_BE))]>, TB; def CMOVBE64rm: RI<0x46, MRMSrcMem, // if <=u, GR64 = [mem64] (outs GR64:$dst), (ins GR64:$src1, i64mem:$src2), - "cmovbe {$src2, $dst|$dst, $src2}", + "cmovbe\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (X86cmov GR64:$src1, (loadi64 addr:$src2), X86_COND_BE))]>, TB; def CMOVA64rr : RI<0x47, MRMSrcReg, // if >u, GR64 = GR64 (outs GR64:$dst), (ins GR64:$src1, GR64:$src2), - "cmova {$src2, $dst|$dst, $src2}", + "cmova\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (X86cmov GR64:$src1, GR64:$src2, X86_COND_A))]>, TB; def CMOVA64rm : RI<0x47, MRMSrcMem, // if >u, GR64 = [mem64] (outs GR64:$dst), (ins GR64:$src1, i64mem:$src2), - "cmova {$src2, $dst|$dst, $src2}", + "cmova\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (X86cmov GR64:$src1, (loadi64 addr:$src2), X86_COND_A))]>, TB; def CMOVL64rr : RI<0x4C, MRMSrcReg, // if , TB; def CMOVL64rm : RI<0x4C, MRMSrcMem, // if , TB; def CMOVGE64rr: RI<0x4D, MRMSrcReg, // if >=s, GR64 = GR64 (outs GR64:$dst), (ins GR64:$src1, GR64:$src2), - "cmovge {$src2, $dst|$dst, $src2}", + "cmovge\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (X86cmov GR64:$src1, GR64:$src2, X86_COND_GE))]>, TB; def CMOVGE64rm: RI<0x4D, MRMSrcMem, // if >=s, GR64 = [mem64] (outs GR64:$dst), (ins GR64:$src1, i64mem:$src2), - "cmovge {$src2, $dst|$dst, $src2}", + "cmovge\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (X86cmov GR64:$src1, (loadi64 addr:$src2), X86_COND_GE))]>, TB; def CMOVLE64rr: RI<0x4E, MRMSrcReg, // if <=s, GR64 = GR64 (outs GR64:$dst), (ins GR64:$src1, GR64:$src2), - "cmovle {$src2, $dst|$dst, $src2}", + "cmovle\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (X86cmov GR64:$src1, GR64:$src2, X86_COND_LE))]>, TB; def CMOVLE64rm: RI<0x4E, MRMSrcMem, // if <=s, GR64 = [mem64] (outs GR64:$dst), (ins GR64:$src1, i64mem:$src2), - "cmovle {$src2, $dst|$dst, $src2}", + "cmovle\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (X86cmov GR64:$src1, (loadi64 addr:$src2), X86_COND_LE))]>, TB; def CMOVG64rr : RI<0x4F, MRMSrcReg, // if >s, GR64 = GR64 (outs GR64:$dst), (ins GR64:$src1, GR64:$src2), - "cmovg {$src2, $dst|$dst, $src2}", + "cmovg\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (X86cmov GR64:$src1, GR64:$src2, X86_COND_G))]>, TB; def CMOVG64rm : RI<0x4F, MRMSrcMem, // if >s, GR64 = [mem64] (outs GR64:$dst), (ins GR64:$src1, i64mem:$src2), - "cmovg {$src2, $dst|$dst, $src2}", + "cmovg\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (X86cmov GR64:$src1, (loadi64 addr:$src2), X86_COND_G))]>, TB; def CMOVS64rr : RI<0x48, MRMSrcReg, // if signed, GR64 = GR64 (outs GR64:$dst), (ins GR64:$src1, GR64:$src2), - "cmovs {$src2, $dst|$dst, $src2}", + "cmovs\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (X86cmov GR64:$src1, GR64:$src2, X86_COND_S))]>, TB; def CMOVS64rm : RI<0x48, MRMSrcMem, // if signed, GR64 = [mem64] (outs GR64:$dst), (ins GR64:$src1, i64mem:$src2), - "cmovs {$src2, $dst|$dst, $src2}", + "cmovs\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (X86cmov GR64:$src1, (loadi64 addr:$src2), X86_COND_S))]>, TB; def CMOVNS64rr: RI<0x49, MRMSrcReg, // if !signed, GR64 = GR64 (outs GR64:$dst), (ins GR64:$src1, GR64:$src2), - "cmovns {$src2, $dst|$dst, $src2}", + "cmovns\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (X86cmov GR64:$src1, GR64:$src2, X86_COND_NS))]>, TB; def CMOVNS64rm: RI<0x49, MRMSrcMem, // if !signed, GR64 = [mem64] (outs GR64:$dst), (ins GR64:$src1, i64mem:$src2), - "cmovns {$src2, $dst|$dst, $src2}", + "cmovns\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (X86cmov GR64:$src1, (loadi64 addr:$src2), X86_COND_NS))]>, TB; def CMOVP64rr : RI<0x4A, MRMSrcReg, // if parity, GR64 = GR64 (outs GR64:$dst), (ins GR64:$src1, GR64:$src2), - "cmovp {$src2, $dst|$dst, $src2}", + "cmovp\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (X86cmov GR64:$src1, GR64:$src2, X86_COND_P))]>, TB; def CMOVP64rm : RI<0x4A, MRMSrcMem, // if parity, GR64 = [mem64] (outs GR64:$dst), (ins GR64:$src1, i64mem:$src2), - "cmovp {$src2, $dst|$dst, $src2}", + "cmovp\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (X86cmov GR64:$src1, (loadi64 addr:$src2), X86_COND_P))]>, TB; def CMOVNP64rr : RI<0x4B, MRMSrcReg, // if !parity, GR64 = GR64 (outs GR64:$dst), (ins GR64:$src1, GR64:$src2), - "cmovnp {$src2, $dst|$dst, $src2}", + "cmovnp\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (X86cmov GR64:$src1, GR64:$src2, X86_COND_NP))]>, TB; def CMOVNP64rm : RI<0x4B, MRMSrcMem, // if !parity, GR64 = [mem64] (outs GR64:$dst), (ins GR64:$src1, i64mem:$src2), - "cmovnp {$src2, $dst|$dst, $src2}", + "cmovnp\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (X86cmov GR64:$src1, (loadi64 addr:$src2), X86_COND_NP))]>, TB; } // isTwoAddress @@ -899,46 +899,46 @@ // f64 -> signed i64 def Int_CVTSD2SI64rr: RSDI<0x2D, MRMSrcReg, (outs GR64:$dst), (ins VR128:$src), - "cvtsd2si{q} {$src, $dst|$dst, $src}", + "cvtsd2si{q}\t{$src, $dst|$dst, $src}", [(set GR64:$dst, (int_x86_sse2_cvtsd2si64 VR128:$src))]>; def Int_CVTSD2SI64rm: RSDI<0x2D, MRMSrcMem, (outs GR64:$dst), (ins f128mem:$src), - "cvtsd2si{q} {$src, $dst|$dst, $src}", + "cvtsd2si{q}\t{$src, $dst|$dst, $src}", [(set GR64:$dst, (int_x86_sse2_cvtsd2si64 (load addr:$src)))]>; def CVTTSD2SI64rr: RSDI<0x2C, MRMSrcReg, (outs GR64:$dst), (ins FR64:$src), - "cvttsd2si{q} {$src, $dst|$dst, $src}", + "cvttsd2si{q}\t{$src, $dst|$dst, $src}", [(set GR64:$dst, (fp_to_sint FR64:$src))]>; def CVTTSD2SI64rm: RSDI<0x2C, MRMSrcMem, (outs GR64:$dst), (ins f64mem:$src), - "cvttsd2si{q} {$src, $dst|$dst, $src}", + "cvttsd2si{q}\t{$src, $dst|$dst, $src}", [(set GR64:$dst, (fp_to_sint (loadf64 addr:$src)))]>; def Int_CVTTSD2SI64rr: RSDI<0x2C, MRMSrcReg, (outs GR64:$dst), (ins VR128:$src), - "cvttsd2si{q} {$src, $dst|$dst, $src}", + "cvttsd2si{q}\t{$src, $dst|$dst, $src}", [(set GR64:$dst, (int_x86_sse2_cvttsd2si64 VR128:$src))]>; def Int_CVTTSD2SI64rm: RSDI<0x2C, MRMSrcMem, (outs GR64:$dst), (ins f128mem:$src), - "cvttsd2si{q} {$src, $dst|$dst, $src}", + "cvttsd2si{q}\t{$src, $dst|$dst, $src}", [(set GR64:$dst, (int_x86_sse2_cvttsd2si64 (load addr:$src)))]>; // Signed i64 -> f64 def CVTSI2SD64rr: RSDI<0x2A, MRMSrcReg, (outs FR64:$dst), (ins GR64:$src), - "cvtsi2sd{q} {$src, $dst|$dst, $src}", + "cvtsi2sd{q}\t{$src, $dst|$dst, $src}", [(set FR64:$dst, (sint_to_fp GR64:$src))]>; def CVTSI2SD64rm: RSDI<0x2A, MRMSrcMem, (outs FR64:$dst), (ins i64mem:$src), - "cvtsi2sd{q} {$src, $dst|$dst, $src}", + "cvtsi2sd{q}\t{$src, $dst|$dst, $src}", [(set FR64:$dst, (sint_to_fp (loadi64 addr:$src)))]>; let isTwoAddress = 1 in { def Int_CVTSI2SD64rr: RSDI<0x2A, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, GR64:$src2), - "cvtsi2sd{q} {$src2, $dst|$dst, $src2}", + "cvtsi2sd{q}\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (int_x86_sse2_cvtsi642sd VR128:$src1, GR64:$src2))]>; def Int_CVTSI2SD64rm: RSDI<0x2A, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, i64mem:$src2), - "cvtsi2sd{q} {$src2, $dst|$dst, $src2}", + "cvtsi2sd{q}\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (int_x86_sse2_cvtsi642sd VR128:$src1, (loadi64 addr:$src2)))]>; @@ -946,56 +946,56 @@ // Signed i64 -> f32 def CVTSI2SS64rr: RSSI<0x2A, MRMSrcReg, (outs FR32:$dst), (ins GR64:$src), - "cvtsi2ss{q} {$src, $dst|$dst, $src}", + "cvtsi2ss{q}\t{$src, $dst|$dst, $src}", [(set FR32:$dst, (sint_to_fp GR64:$src))]>; def CVTSI2SS64rm: RSSI<0x2A, MRMSrcMem, (outs FR32:$dst), (ins i64mem:$src), - "cvtsi2ss{q} {$src, $dst|$dst, $src}", + "cvtsi2ss{q}\t{$src, $dst|$dst, $src}", [(set FR32:$dst, (sint_to_fp (loadi64 addr:$src)))]>; let isTwoAddress = 1 in { def Int_CVTSI2SS64rr: RSSI<0x2A, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, GR64:$src2), - "cvtsi2ss{q} {$src2, $dst|$dst, $src2}", + "cvtsi2ss{q}\t{$src2, $dst|$dst, $src2}", []>; // TODO: add intrinsic def Int_CVTSI2SS64rm: RSSI<0x2A, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, i64mem:$src2), - "cvtsi2ss{q} {$src2, $dst|$dst, $src2}", + "cvtsi2ss{q}\t{$src2, $dst|$dst, $src2}", []>; // TODO: add intrinsic } // isTwoAddress // f32 -> signed i64 def Int_CVTSS2SI64rr: RSSI<0x2D, MRMSrcReg, (outs GR64:$dst), (ins VR128:$src), - "cvtss2si{q} {$src, $dst|$dst, $src}", + "cvtss2si{q}\t{$src, $dst|$dst, $src}", [(set GR64:$dst, (int_x86_sse_cvtss2si64 VR128:$src))]>; def Int_CVTSS2SI64rm: RSSI<0x2D, MRMSrcMem, (outs GR64:$dst), (ins f32mem:$src), - "cvtss2si{q} {$src, $dst|$dst, $src}", + "cvtss2si{q}\t{$src, $dst|$dst, $src}", [(set GR64:$dst, (int_x86_sse_cvtss2si64 (load addr:$src)))]>; def CVTTSS2SI64rr: RSSI<0x2C, MRMSrcReg, (outs GR64:$dst), (ins FR32:$src), - "cvttss2si{q} {$src, $dst|$dst, $src}", + "cvttss2si{q}\t{$src, $dst|$dst, $src}", [(set GR64:$dst, (fp_to_sint FR32:$src))]>; def CVTTSS2SI64rm: RSSI<0x2C, MRMSrcMem, (outs GR64:$dst), (ins f32mem:$src), - "cvttss2si{q} {$src, $dst|$dst, $src}", + "cvttss2si{q}\t{$src, $dst|$dst, $src}", [(set GR64:$dst, (fp_to_sint (loadf32 addr:$src)))]>; def Int_CVTTSS2SI64rr: RSSI<0x2C, MRMSrcReg, (outs GR64:$dst), (ins VR128:$src), - "cvttss2si{q} {$src, $dst|$dst, $src}", + "cvttss2si{q}\t{$src, $dst|$dst, $src}", [(set GR64:$dst, (int_x86_sse_cvttss2si64 VR128:$src))]>; def Int_CVTTSS2SI64rm: RSSI<0x2C, MRMSrcMem, (outs GR64:$dst), (ins f32mem:$src), - "cvttss2si{q} {$src, $dst|$dst, $src}", + "cvttss2si{q}\t{$src, $dst|$dst, $src}", [(set GR64:$dst, (int_x86_sse_cvttss2si64 (load addr:$src)))]>; let isTwoAddress = 1 in { def Int_CVTSI642SSrr : RSSI<0x2A, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, GR64:$src2), - "cvtsi2ss{q} {$src2, $dst|$dst, $src2}", + "cvtsi2ss{q}\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (int_x86_sse_cvtsi642ss VR128:$src1, GR64:$src2))]>; def Int_CVTSI642SSrm : RSSI<0x2A, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, i64mem:$src2), - "cvtsi2ss{q} {$src2, $dst|$dst, $src2}", + "cvtsi2ss{q}\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (int_x86_sse_cvtsi642ss VR128:$src1, (loadi64 addr:$src2)))]>; @@ -1008,10 +1008,10 @@ // Zero-extension // TODO: Remove this after proper i32 -> i64 zext support. def PsMOVZX64rr32: I<0x89, MRMDestReg, (outs GR64:$dst), (ins GR32:$src), - "mov{l} {$src, ${dst:subreg32}|${dst:subreg32}, $src}", + "mov{l}\t{$src, ${dst:subreg32}|${dst:subreg32}, $src}", [(set GR64:$dst, (zext GR32:$src))]>; def PsMOVZX64rm32: I<0x8B, MRMSrcMem, (outs GR64:$dst), (ins i32mem:$src), - "mov{l} {$src, ${dst:subreg32}|${dst:subreg32}, $src}", + "mov{l}\t{$src, ${dst:subreg32}|${dst:subreg32}, $src}", [(set GR64:$dst, (zextloadi64i32 addr:$src))]>; @@ -1021,13 +1021,13 @@ // when we have a better way to specify isel priority. let AddedComplexity = 1 in def MOV64r0 : RI<0x31, MRMInitReg, (outs GR64:$dst), (ins), - "xor{q} $dst, $dst", + "xor{q}\t$dst, $dst", [(set GR64:$dst, 0)]>; // Materialize i64 constant where top 32-bits are zero. let AddedComplexity = 1 in def MOV64ri64i32 : Ii32<0xB8, AddRegFrm, (outs GR64:$dst), (ins i64i32imm:$src), - "mov{l} {$src, ${dst:subreg32}|${dst:subreg32}, $src}", + "mov{l}\t{$src, ${dst:subreg32}|${dst:subreg32}, $src}", [(set GR64:$dst, i64immZExt32:$src)]>; //===----------------------------------------------------------------------===// @@ -1143,33 +1143,33 @@ // Move instructions... def MOV64toPQIrr : RPDI<0x6E, MRMSrcReg, (outs VR128:$dst), (ins GR64:$src), - "mov{d|q} {$src, $dst|$dst, $src}", + "mov{d|q}\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (v2i64 (scalar_to_vector GR64:$src)))]>; def MOV64toPQIrm : RPDI<0x6E, MRMSrcMem, (outs VR128:$dst), (ins i64mem:$src), - "mov{d|q} {$src, $dst|$dst, $src}", + "mov{d|q}\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (v2i64 (scalar_to_vector (loadi64 addr:$src))))]>; def MOVPQIto64rr : RPDI<0x7E, MRMDestReg, (outs GR64:$dst), (ins VR128:$src), - "mov{d|q} {$src, $dst|$dst, $src}", + "mov{d|q}\t{$src, $dst|$dst, $src}", [(set GR64:$dst, (vector_extract (v2i64 VR128:$src), (iPTR 0)))]>; def MOVPQIto64mr : RPDI<0x7E, MRMDestMem, (outs), (ins i64mem:$dst, VR128:$src), - "mov{d|q} {$src, $dst|$dst, $src}", + "mov{d|q}\t{$src, $dst|$dst, $src}", [(store (i64 (vector_extract (v2i64 VR128:$src), (iPTR 0))), addr:$dst)]>; def MOV64toSDrr : RPDI<0x6E, MRMSrcReg, (outs FR64:$dst), (ins GR64:$src), - "mov{d|q} {$src, $dst|$dst, $src}", + "mov{d|q}\t{$src, $dst|$dst, $src}", [(set FR64:$dst, (bitconvert GR64:$src))]>; def MOV64toSDrm : RPDI<0x6E, MRMSrcMem, (outs FR64:$dst), (ins i64mem:$src), - "mov{d|q} {$src, $dst|$dst, $src}", + "mov{d|q}\t{$src, $dst|$dst, $src}", [(set FR64:$dst, (bitconvert (loadi64 addr:$src)))]>; def MOVSDto64rr : RPDI<0x7E, MRMDestReg, (outs GR64:$dst), (ins FR64:$src), - "mov{d|q} {$src, $dst|$dst, $src}", + "mov{d|q}\t{$src, $dst|$dst, $src}", [(set GR64:$dst, (bitconvert FR64:$src))]>; def MOVSDto64mr : RPDI<0x7E, MRMDestMem, (outs), (ins i64mem:$dst, FR64:$src), - "mov{d|q} {$src, $dst|$dst, $src}", + "mov{d|q}\t{$src, $dst|$dst, $src}", [(store (i64 (bitconvert FR64:$src)), addr:$dst)]>; Index: lib/Target/X86/X86InstrMMX.td =================================================================== --- lib/Target/X86/X86InstrMMX.td (revision 40587) +++ lib/Target/X86/X86InstrMMX.td (working copy) @@ -108,12 +108,12 @@ multiclass MMXI_binop_rm opc, string OpcodeStr, SDNode OpNode, ValueType OpVT, bit Commutable = 0> { def rr : MMXI { let isCommutable = Commutable; } def rm : MMXI; @@ -122,12 +122,12 @@ multiclass MMXI_binop_rm_int opc, string OpcodeStr, Intrinsic IntId, bit Commutable = 0> { def rr : MMXI { let isCommutable = Commutable; } def rm : MMXI; } @@ -140,12 +140,12 @@ multiclass MMXI_binop_rm_v1i64 opc, string OpcodeStr, SDNode OpNode, bit Commutable = 0> { def rr : MMXI { let isCommutable = Commutable; } def rm : MMXI; } @@ -153,14 +153,14 @@ multiclass MMXI_binop_rmi_int opc, bits<8> opc2, Format ImmForm, string OpcodeStr, Intrinsic IntId> { def rr : MMXI; def rm : MMXI; def ri : MMXIi8; } @@ -179,50 +179,50 @@ // Data Transfer Instructions def MMX_MOVD64rr : MMXI<0x6E, MRMSrcReg, (outs VR64:$dst), (ins GR32:$src), - "movd {$src, $dst|$dst, $src}", []>; + "movd\t{$src, $dst|$dst, $src}", []>; def MMX_MOVD64rm : MMXI<0x6E, MRMSrcMem, (outs VR64:$dst), (ins i32mem:$src), - "movd {$src, $dst|$dst, $src}", []>; + "movd\t{$src, $dst|$dst, $src}", []>; def MMX_MOVD64mr : MMXI<0x7E, MRMDestMem, (outs), (ins i32mem:$dst, VR64:$src), - "movd {$src, $dst|$dst, $src}", []>; + "movd\t{$src, $dst|$dst, $src}", []>; def MMX_MOVD64to64rr : MMXRI<0x6E, MRMSrcReg, (outs VR64:$dst), (ins GR64:$src), - "movd {$src, $dst|$dst, $src}", []>; + "movd\t{$src, $dst|$dst, $src}", []>; def MMX_MOVQ64rr : MMXI<0x6F, MRMSrcReg, (outs VR64:$dst), (ins VR64:$src), - "movq {$src, $dst|$dst, $src}", []>; + "movq\t{$src, $dst|$dst, $src}", []>; def MMX_MOVQ64rm : MMXI<0x6F, MRMSrcMem, (outs VR64:$dst), (ins i64mem:$src), - "movq {$src, $dst|$dst, $src}", + "movq\t{$src, $dst|$dst, $src}", [(set VR64:$dst, (load_mmx addr:$src))]>; def MMX_MOVQ64mr : MMXI<0x7F, MRMDestMem, (outs), (ins i64mem:$dst, VR64:$src), - "movq {$src, $dst|$dst, $src}", + "movq\t{$src, $dst|$dst, $src}", [(store (v1i64 VR64:$src), addr:$dst)]>; def MMX_MOVDQ2Qrr : MMXID<0xD6, MRMDestMem, (outs VR64:$dst), (ins VR128:$src), - "movdq2q {$src, $dst|$dst, $src}", + "movdq2q\t{$src, $dst|$dst, $src}", [(set VR64:$dst, (v1i64 (vector_extract (v2i64 VR128:$src), (iPTR 0))))]>; def MMX_MOVQ2DQrr : MMXIS<0xD6, MRMDestMem, (outs VR128:$dst), (ins VR64:$src), - "movq2dq {$src, $dst|$dst, $src}", + "movq2dq\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (bitconvert (v1i64 VR64:$src)))]>; def MMX_MOVNTQmr : MMXI<0xE7, MRMDestMem, (outs), (ins i64mem:$dst, VR64:$src), - "movntq {$src, $dst|$dst, $src}", + "movntq\t{$src, $dst|$dst, $src}", [(int_x86_mmx_movnt_dq addr:$dst, VR64:$src)]>; let AddedComplexity = 15 in // movd to MMX register zero-extends def MMX_MOVZDI2PDIrr : MMX2I<0x6E, MRMSrcReg, (outs VR64:$dst), (ins GR32:$src), - "movd {$src, $dst|$dst, $src}", + "movd\t{$src, $dst|$dst, $src}", [(set VR64:$dst, (v2i32 (vector_shuffle immAllZerosV, (v2i32 (scalar_to_vector GR32:$src)), MMX_MOVL_shuffle_mask)))]>; let AddedComplexity = 20 in def MMX_MOVZDI2PDIrm : MMX2I<0x6E, MRMSrcMem, (outs VR64:$dst), (ins i32mem:$src), - "movd {$src, $dst|$dst, $src}", + "movd\t{$src, $dst|$dst, $src}", [(set VR64:$dst, (v2i32 (vector_shuffle immAllZerosV, (v2i32 (scalar_to_vector @@ -284,12 +284,12 @@ let isTwoAddress = 1 in { def MMX_PANDNrr : MMXI<0xDF, MRMSrcReg, (outs VR64:$dst), (ins VR64:$src1, VR64:$src2), - "pandn {$src2, $dst|$dst, $src2}", + "pandn\t{$src2, $dst|$dst, $src2}", [(set VR64:$dst, (v1i64 (and (vnot VR64:$src1), VR64:$src2)))]>; def MMX_PANDNrm : MMXI<0xDF, MRMSrcMem, (outs VR64:$dst), (ins VR64:$src1, i64mem:$src2), - "pandn {$src2, $dst|$dst, $src2}", + "pandn\t{$src2, $dst|$dst, $src2}", [(set VR64:$dst, (v1i64 (and (vnot VR64:$src1), (load addr:$src2))))]>; } @@ -330,13 +330,13 @@ // Unpack High Packed Data Instructions def MMX_PUNPCKHBWrr : MMXI<0x68, MRMSrcReg, (outs VR64:$dst), (ins VR64:$src1, VR64:$src2), - "punpckhbw {$src2, $dst|$dst, $src2}", + "punpckhbw\t{$src2, $dst|$dst, $src2}", [(set VR64:$dst, (v8i8 (vector_shuffle VR64:$src1, VR64:$src2, MMX_UNPCKH_shuffle_mask)))]>; def MMX_PUNPCKHBWrm : MMXI<0x68, MRMSrcMem, (outs VR64:$dst), (ins VR64:$src1, i64mem:$src2), - "punpckhbw {$src2, $dst|$dst, $src2}", + "punpckhbw\t{$src2, $dst|$dst, $src2}", [(set VR64:$dst, (v8i8 (vector_shuffle VR64:$src1, (bc_v8i8 (load_mmx addr:$src2)), @@ -344,13 +344,13 @@ def MMX_PUNPCKHWDrr : MMXI<0x69, MRMSrcReg, (outs VR64:$dst), (ins VR64:$src1, VR64:$src2), - "punpckhwd {$src2, $dst|$dst, $src2}", + "punpckhwd\t{$src2, $dst|$dst, $src2}", [(set VR64:$dst, (v4i16 (vector_shuffle VR64:$src1, VR64:$src2, MMX_UNPCKH_shuffle_mask)))]>; def MMX_PUNPCKHWDrm : MMXI<0x69, MRMSrcMem, (outs VR64:$dst), (ins VR64:$src1, i64mem:$src2), - "punpckhwd {$src2, $dst|$dst, $src2}", + "punpckhwd\t{$src2, $dst|$dst, $src2}", [(set VR64:$dst, (v4i16 (vector_shuffle VR64:$src1, (bc_v4i16 (load_mmx addr:$src2)), @@ -358,13 +358,13 @@ def MMX_PUNPCKHDQrr : MMXI<0x6A, MRMSrcReg, (outs VR64:$dst), (ins VR64:$src1, VR64:$src2), - "punpckhdq {$src2, $dst|$dst, $src2}", + "punpckhdq\t{$src2, $dst|$dst, $src2}", [(set VR64:$dst, (v2i32 (vector_shuffle VR64:$src1, VR64:$src2, MMX_UNPCKH_shuffle_mask)))]>; def MMX_PUNPCKHDQrm : MMXI<0x6A, MRMSrcMem, (outs VR64:$dst), (ins VR64:$src1, i64mem:$src2), - "punpckhdq {$src2, $dst|$dst, $src2}", + "punpckhdq\t{$src2, $dst|$dst, $src2}", [(set VR64:$dst, (v2i32 (vector_shuffle VR64:$src1, (bc_v2i32 (load_mmx addr:$src2)), @@ -373,13 +373,13 @@ // Unpack Low Packed Data Instructions def MMX_PUNPCKLBWrr : MMXI<0x60, MRMSrcReg, (outs VR64:$dst), (ins VR64:$src1, VR64:$src2), - "punpcklbw {$src2, $dst|$dst, $src2}", + "punpcklbw\t{$src2, $dst|$dst, $src2}", [(set VR64:$dst, (v8i8 (vector_shuffle VR64:$src1, VR64:$src2, MMX_UNPCKL_shuffle_mask)))]>; def MMX_PUNPCKLBWrm : MMXI<0x60, MRMSrcMem, (outs VR64:$dst), (ins VR64:$src1, i64mem:$src2), - "punpcklbw {$src2, $dst|$dst, $src2}", + "punpcklbw\t{$src2, $dst|$dst, $src2}", [(set VR64:$dst, (v8i8 (vector_shuffle VR64:$src1, (bc_v8i8 (load_mmx addr:$src2)), @@ -387,13 +387,13 @@ def MMX_PUNPCKLWDrr : MMXI<0x61, MRMSrcReg, (outs VR64:$dst), (ins VR64:$src1, VR64:$src2), - "punpcklwd {$src2, $dst|$dst, $src2}", + "punpcklwd\t{$src2, $dst|$dst, $src2}", [(set VR64:$dst, (v4i16 (vector_shuffle VR64:$src1, VR64:$src2, MMX_UNPCKL_shuffle_mask)))]>; def MMX_PUNPCKLWDrm : MMXI<0x61, MRMSrcMem, (outs VR64:$dst), (ins VR64:$src1, i64mem:$src2), - "punpcklwd {$src2, $dst|$dst, $src2}", + "punpcklwd\t{$src2, $dst|$dst, $src2}", [(set VR64:$dst, (v4i16 (vector_shuffle VR64:$src1, (bc_v4i16 (load_mmx addr:$src2)), @@ -401,13 +401,13 @@ def MMX_PUNPCKLDQrr : MMXI<0x62, MRMSrcReg, (outs VR64:$dst), (ins VR64:$src1, VR64:$src2), - "punpckldq {$src2, $dst|$dst, $src2}", + "punpckldq\t{$src2, $dst|$dst, $src2}", [(set VR64:$dst, (v2i32 (vector_shuffle VR64:$src1, VR64:$src2, MMX_UNPCKL_shuffle_mask)))]>; def MMX_PUNPCKLDQrm : MMXI<0x62, MRMSrcMem, (outs VR64:$dst), (ins VR64:$src1, i64mem:$src2), - "punpckldq {$src2, $dst|$dst, $src2}", + "punpckldq\t{$src2, $dst|$dst, $src2}", [(set VR64:$dst, (v2i32 (vector_shuffle VR64:$src1, (bc_v2i32 (load_mmx addr:$src2)), @@ -422,14 +422,14 @@ // -- Shuffle Instructions def MMX_PSHUFWri : MMXIi8<0x70, MRMSrcReg, (outs VR64:$dst), (ins VR64:$src1, i8imm:$src2), - "pshufw {$src2, $src1, $dst|$dst, $src1, $src2}", + "pshufw\t{$src2, $src1, $dst|$dst, $src1, $src2}", [(set VR64:$dst, (v4i16 (vector_shuffle VR64:$src1, (undef), MMX_PSHUFW_shuffle_mask:$src2)))]>; def MMX_PSHUFWmi : MMXIi8<0x70, MRMSrcMem, (outs VR64:$dst), (ins i64mem:$src1, i8imm:$src2), - "pshufw {$src2, $src1, $dst|$dst, $src1, $src2}", + "pshufw\t{$src2, $src1, $dst|$dst, $src1, $src2}", [(set VR64:$dst, (v4i16 (vector_shuffle (bc_v4i16 (load_mmx addr:$src1)), @@ -438,34 +438,34 @@ // -- Conversion Instructions def MMX_CVTPD2PIrr : MMX2I<0x2D, MRMSrcReg, (outs VR64:$dst), (ins VR128:$src), - "cvtpd2pi {$src, $dst|$dst, $src}", []>; + "cvtpd2pi\t{$src, $dst|$dst, $src}", []>; def MMX_CVTPD2PIrm : MMX2I<0x2D, MRMSrcMem, (outs VR64:$dst), (ins f128mem:$src), - "cvtpd2pi {$src, $dst|$dst, $src}", []>; + "cvtpd2pi\t{$src, $dst|$dst, $src}", []>; def MMX_CVTPI2PDrr : MMX2I<0x2A, MRMSrcReg, (outs VR128:$dst), (ins VR64:$src), - "cvtpi2pd {$src, $dst|$dst, $src}", []>; + "cvtpi2pd\t{$src, $dst|$dst, $src}", []>; def MMX_CVTPI2PDrm : MMX2I<0x2A, MRMSrcMem, (outs VR128:$dst), (ins i64mem:$src), - "cvtpi2pd {$src, $dst|$dst, $src}", []>; + "cvtpi2pd\t{$src, $dst|$dst, $src}", []>; def MMX_CVTPI2PSrr : MMXI<0x2A, MRMSrcReg, (outs VR128:$dst), (ins VR64:$src), - "cvtpi2ps {$src, $dst|$dst, $src}", []>; + "cvtpi2ps\t{$src, $dst|$dst, $src}", []>; def MMX_CVTPI2PSrm : MMXI<0x2A, MRMSrcMem, (outs VR128:$dst), (ins i64mem:$src), - "cvtpi2ps {$src, $dst|$dst, $src}", []>; + "cvtpi2ps\t{$src, $dst|$dst, $src}", []>; def MMX_CVTPS2PIrr : MMXI<0x2D, MRMSrcReg, (outs VR64:$dst), (ins VR128:$src), - "cvtps2pi {$src, $dst|$dst, $src}", []>; + "cvtps2pi\t{$src, $dst|$dst, $src}", []>; def MMX_CVTPS2PIrm : MMXI<0x2D, MRMSrcMem, (outs VR64:$dst), (ins f64mem:$src), - "cvtps2pi {$src, $dst|$dst, $src}", []>; + "cvtps2pi\t{$src, $dst|$dst, $src}", []>; def MMX_CVTTPD2PIrr : MMX2I<0x2C, MRMSrcReg, (outs VR64:$dst), (ins VR128:$src), - "cvttpd2pi {$src, $dst|$dst, $src}", []>; + "cvttpd2pi\t{$src, $dst|$dst, $src}", []>; def MMX_CVTTPD2PIrm : MMX2I<0x2C, MRMSrcMem, (outs VR64:$dst), (ins f128mem:$src), - "cvttpd2pi {$src, $dst|$dst, $src}", []>; + "cvttpd2pi\t{$src, $dst|$dst, $src}", []>; def MMX_CVTTPS2PIrr : MMXI<0x2C, MRMSrcReg, (outs VR64:$dst), (ins VR128:$src), - "cvttps2pi {$src, $dst|$dst, $src}", []>; + "cvttps2pi\t{$src, $dst|$dst, $src}", []>; def MMX_CVTTPS2PIrm : MMXI<0x2C, MRMSrcMem, (outs VR64:$dst), (ins f64mem:$src), - "cvttps2pi {$src, $dst|$dst, $src}", []>; + "cvttps2pi\t{$src, $dst|$dst, $src}", []>; // Extract / Insert def MMX_X86pextrw : SDNode<"X86ISD::PEXTRW", SDTypeProfile<1, 2, []>, []>; @@ -473,18 +473,18 @@ def MMX_PEXTRWri : MMXIi8<0xC5, MRMSrcReg, (outs GR32:$dst), (ins VR64:$src1, i16i8imm:$src2), - "pextrw {$src2, $src1, $dst|$dst, $src1, $src2}", + "pextrw\t{$src2, $src1, $dst|$dst, $src1, $src2}", [(set GR32:$dst, (MMX_X86pextrw (v4i16 VR64:$src1), (iPTR imm:$src2)))]>; let isTwoAddress = 1 in { def MMX_PINSRWrri : MMXIi8<0xC4, MRMSrcReg, (outs VR64:$dst), (ins VR64:$src1, GR32:$src2, i16i8imm:$src3), - "pinsrw {$src3, $src2, $dst|$dst, $src2, $src3}", + "pinsrw\t{$src3, $src2, $dst|$dst, $src2, $src3}", [(set VR64:$dst, (v4i16 (MMX_X86pinsrw (v4i16 VR64:$src1), GR32:$src2, (iPTR imm:$src3))))]>; def MMX_PINSRWrmi : MMXIi8<0xC4, MRMSrcMem, (outs VR64:$dst), (ins VR64:$src1, i16mem:$src2, i16i8imm:$src3), - "pinsrw {$src3, $src2, $dst|$dst, $src2, $src3}", + "pinsrw\t{$src3, $src2, $dst|$dst, $src2, $src3}", [(set VR64:$dst, (v4i16 (MMX_X86pinsrw (v4i16 VR64:$src1), (i32 (anyext (loadi16 addr:$src2))), @@ -493,12 +493,12 @@ // Mask creation def MMX_PMOVMSKBrr : MMXI<0xD7, MRMSrcReg, (outs GR32:$dst), (ins VR64:$src), - "pmovmskb {$src, $dst|$dst, $src}", + "pmovmskb\t{$src, $dst|$dst, $src}", [(set GR32:$dst, (int_x86_mmx_pmovmskb VR64:$src))]>; // Misc. def MMX_MASKMOVQ : MMXI<0xF7, MRMDestMem, (outs), (ins VR64:$src, VR64:$mask), - "maskmovq {$mask, $src|$src, $mask}", + "maskmovq\t{$mask, $src|$src, $mask}", [(int_x86_mmx_maskmovq VR64:$src, VR64:$mask, EDI)]>, Imp<[EDI],[]>; @@ -510,10 +510,10 @@ // FIXME: remove when we can teach regalloc that xor reg, reg is ok. let isReMaterializable = 1 in { def MMX_V_SET0 : MMXI<0xEF, MRMInitReg, (outs VR64:$dst), (ins), - "pxor $dst, $dst", + "pxor\t$dst, $dst", [(set VR64:$dst, (v1i64 immAllZerosV))]>; def MMX_V_SETALLONES : MMXI<0x76, MRMInitReg, (outs VR64:$dst), (ins), - "pcmpeqd $dst, $dst", + "pcmpeqd\t$dst, $dst", [(set VR64:$dst, (v1i64 immAllOnesV))]>; } From evan.cheng at apple.com Mon Jul 30 14:15:37 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 30 Jul 2007 12:15:37 -0700 Subject: [llvm-commits] Patch: JIT support for ARM In-Reply-To: <6fbb4ff20707301051j5768997cn537a4660f0c649cb@mail.gmail.com> References: <6fbb4ff20707301051j5768997cn537a4660f0c649cb@mail.gmail.com> Message-ID: <93B3DA4F-4266-4AD1-AE54-1DC3B60C7DD4@apple.com> Very nice! +def NoneFormat : Format<0>; def Pseudo : Format<1>; +def Multiply : Format<2>; def Branch : Format<3>; Some naming suggestions. NoneFormat -> Pseudo, Multiply -> MultiplyFrm (or MulFrm). +class AI pattern> + : I; Please watch out for "80 col violations" (tm)! :-) +static const unsigned InstBits[] = { + 0, + 0, + 0, + 0, + 0, + 0XE2B00000, + 0XE0B00000, + 0XE0B00000, + 0XE2900000, This is impossible to maintain. Please move opcode bits into .td files. That is, please add it to each instruction definition: // FIXME: Set all opcodes to 0 for now. : InstARM<0, am, sz, im, cstr> { Thanks, Evan On Jul 30, 2007, at 10:51 AM, Raul Fernandes Herbster wrote: > JIT support for ARM is now generating machine code (Thumb and VFP > are not supported). Relocation has not been implemented yet. Next > patch must provide such feature. Please, send me any feedback. > > Thanks in advance, Raul. > > -- > Raul Fernandes Herbster > Embedded and Pervasive Computing Laboratory - embedded.dee.ufcg.edu.br > Electrical Engineering Department - DEE - www.dee.ufcg.edu.br > Electrical Engineering and Informatics Center - CEEI > Federal University of Campina Grande - UFCG - www.ufcg.edu.br > Caixa Postal 10105 > 58109-970 Campina Grande - PB - Brasil > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20070730/e84f3a4d/attachment.html From christopher.lamb at gmail.com Mon Jul 30 14:42:50 2007 From: christopher.lamb at gmail.com (Christopher Lamb) Date: Mon, 30 Jul 2007 12:42:50 -0700 Subject: [llvm-commits] Patch for X86 to use subregs In-Reply-To: <2EE0874C-1B82-47ED-AAE8-E4FBD5F2A92D@apple.com> References: <922DEBE2-14C9-4A1C-9A3A-1C366DE18B4A@apple.com> <2C30DFBD-73FF-4CCB-BE4F-469146C7A91C@gmail.com> <9A826E2A-2B21-4FFF-A18B-E11D08B7CB93@apple.com> <1BB6419C-C448-4995-8A27-791D8D21244D@gmail.com> <30228125-8A4F-4336-8380-8525B2BF7DFB@apple.com> <446DD660-7847-4E8A-9715-B66AB0AC988A@apple.com> <537BFA91-0E35-43FF-A45C-D0C9B543A102@gmail.com> <2EE0874C-1B82-47ED-AAE8-E4FBD5F2A92D@apple.com> Message-ID: On Jul 30, 2007, at 11:06 AM, Evan Cheng wrote: > > On Jul 30, 2007, at 12:02 AM, Christopher Lamb wrote: > >> >> On Jul 29, 2007, at 10:20 PM, Evan Cheng wrote: >> >>> >>> On Jul 29, 2007, at 9:37 PM, Christopher Lamb wrote: >>> >>>> >>>> On Jul 29, 2007, at 6:20 PM, Evan Cheng wrote: >>>> >>>>> Sent from my iPhone >>>>> >>>>> On Jul 28, 2007, at 4:36 PM, Christopher Lamb >>>>> wrote: >>>>> >>>>>> >>>>>> On Jul 28, 2007, at 2:26 PM, Evan Cheng wrote: >>>>>> >>>>>>> On Jul 28, 2007, at 11:52 AM, Christopher Lamb >>>>>>> wrote: >>>>>>> >>>>>>>> >>>>>>>> On Jul 28, 2007, at 1:48 AM, Evan Cheng wrote: >>>>>>>> >>>>>>>>> Very cool! I need to read it more carefully. >>>>>>>> >>>>>>>>> But I see you are lowering zext to a single insert_subreg. >>>>>>>>> Is that right? It won't zero out the top part, no? >>>>>>>> >>>>>>>> It's only lowering (zext i32 to i64) to an insert_subreg on >>>>>>>> x86-64 where all writes to 32-bit registers implicitly zero- >>>>>>>> extend into the upper 32-bits. >>>>>>>> >>>>>>> >>>>>>> I know. But thy mismatch semantically. A insert_subreg to the >>>>>>> lower part should not change the upper half. I think this is >>>>>>> only legal for anyext. >>>>>> >>>>>> On x86-64 the semantics of a 2 operand i32 insert_subreg is >>>>>> that the input super-value is implicitly zero. So in this >>>>>> sense the insert isn't changing the upper half, it's just that >>>>>> the upper half is being set to zero implicitly rather than >>>>>> explicitly. If you'll notice the insert_subreg is a two >>>>>> operand (implicit super value) not a three operand version. If >>>>>> the insert were the three operand version, and the super value >>>>>> as coming from an implicit def I'd agree with you, but it's not. >>>>> >>>>> Ok, let's step back for a second. There are a couple of issues >>>>> that should be addressed. Plz help me understand. :) >>>>> >>>>> 1: Semantics of insert_subreg should be the same across all >>>>> targets, right? >>>> >>>> I'm not certain that this should be so. x86-64 clearly has a >>>> target specific semantics of a 32-bit into 64-bit insert. >>> >>> No, that won't do. insert_subreg and extract_subreg are by >>> definition target independent. They must have the same semantics. >>> You are forcing x86-64 32-bit zero-extending move to fit >>> insert_subreg when they are really not the same thing. >> >> If target independence is a requirement, then I agree that using >> insert_subreg for x86-64 zero-ext isn't currently feasible. >> I contend that insert_subreg is target specific already. It currently requires a target specific subreg index, which is a kind of target specific hook, that tells coalescing how to deal with it. A two operand insert_subreg (or an insert_subreg from undef) is a move between target register classes that have subreg relationship. insert_subreg defines the entire superreg value, and I don't see why it's so bad to allow targets to specify their own semantics for what happens to the register being inserted into? This is essentially what the subreg index is already, we could even put semantics in the SubRegSet in the RegisterInfo.td allowing the semantics to be checked by the compiler. A parameter of the set that indicates that an insert into the subreg i either leaves the rest of the superreg value untouched (insert_subreg reg, reg, i), or it implicitly sets the rest of the register to a known value (insert_subreg constant_value, reg, i), or to undef (insert_subreg undef, reg, i). Only the specified semantics for that SubRegSet of the register class of the result of the insert_subreg would be valid, and could be ensured so. This seems to me to allow insert_subreg to capture may useful cases, and it captures the register set semantics in the RegisterInfo.td file, where I think it belongs. >>>>> 2: two operant variant of insert_subreg should mean the >>>>> superreg is undef. If you insert a value into a low part, the >>>>> rest of the superreg is still undef. >>>> >>>> I think the meaning of insert_subreg instruction (both 2 and 3 >>>> operand versions) must have semantics specific to the target. >>>> For example, on x86-64 there is no valid 3 operand insert_subreg >>>> for a 32-bit value into 64-bits, because the 32-bit result is >>>> always going to be zero extended and overwrite the upper 32-bits. >>> >>> It just means there is no way to implement a insert_subreg with a >>> single instruction under x86-64. But that is perfectly ok. Apart >>> from anyext, x86-64 just isn't going to benefit from it. It's >>> also impossible to read or modify the higher 32-bits. >> >> Currently the move that's generated isn't handled by coalescing >> because the source and destination belong to different register >> classes. The insert_subreg is meant to be a means to move values >> implicitly between register classes that have a subreg >> relationship. So if insert_subreg semantics must be target >> independent, then I think you isel the zero-extending move to be: >> >> (i64 (INSERT_SUBREG (i64 0), GR32:$src, 3)) > > But that's wrong. Remember the superreg argument is an read / mod / > write operand. That is, the first operand is a use, the def is the > LHS but we are forcing the allocator to target the same physical > register. > > v1 = some existing value > v1 = insert_subreg v1, GR32:$src, 3 > > But zext is zeroing out the top part. i.e. zext is equal to > > mov v1, 0 > v1 = insert_subreg v1, GR32:$src, 3 I'm suggesting to expand the semantics of insert_subreg as described above. >> The thing is that the general coalescing will be able to determine >> that the copy from undef is unneeded for (INSERT_SUBREG (i64 >> undef), GR32:$src, 3), but it would take a target specific hook to >> know that the constant zero is unneeded on x86-64. A target >> specific hook for this might be useful, but I think that this is >> in the realm of future work now. > > Sorry, I am not following. zext on x86-64, i.e. the 32-bit move, > cannot be coalesced away. No need for target specific hook. I simply disagree here: http://www.x86-64.org/documentation/assembly.html see the section 'Implicit Zero Extend' EAX = op RAX = mov EAX <= this may be removed ... = use RAX >>>>> 3: why is there a two operant variant in the first place? Why >>>>> not use undef for the superreg operant? >>>> >>>> To note, the two operand variant is of the MachineInstr. The DAG >>>> form would be to represent the superregister as coming from an >>>> undef node, but this gets isel'd to the two operand MachineInstr >>>> of insert_subreg. >>>> >>>> The reason is that undef is typically selected to an implicit >>>> def of a register. This causes an unnecessary move to be >>>> generated later on. This move can be optimized away later with >>>> more difficulty during subreg lowering by checking whether the >>>> input register is defined by an implicit def pseudo instruction, >>>> but instead I decided to perform the optimization during ISel on >>>> the DAG form during instruction selection. >>>> >>>> With what you're suggesting >>>> reg1024 = ... >>>> reg1026 = insert_subreg undef, reg1024, 1 >>>> reg1027 = insert_subreg reg1026, reg1025, 1 >>>> use reg1027 >>>> >>>> would be isel'd to then subreg lowered to: >>>> >>>> R6 = ... >>>> implicit def R01 <= this implicit def is unecessary >>> >>> That's a pseudo instruction, it doesn't cost anything. >>> >>>> R23 = R01 <= this copy is unnecessary >>> >>> It can be coalesced to: >>> R23 = undef >>> >>>> R2 = R6 >>>> R45 = R23 >>>> R5 = R6 >>>> use R45 >>> >>> Using undef explicit is the right way to go. There is a good >>> reason it's there. Having the two operand version of >>> insert_subreg that implicitly use an undef value doesn't fit into >>> the overall llvm philosophy. >> >> Right now the coalescing that you are describing is happening >> during isel. Are you simply saying that you'd rather have the >> coalescing happen during subreg lowering? I can accept that, but >> would you share your reasons? > > There really isn't a very good argument for having the 2 different > versions of insert_subreg. undef use must be explicitly modeled. I > really don't see what you mean by coalescing during isel. isel > doesn't have the concept of coalescing. Also don't forget > everything must remain ssa until register allocation. It depends on what you intend the semantics of insert_subreg to be. Under my proposal above, there would only be the 3 operand version. However, there would be a variant where where the input superreg operand is an immediate, but the immediate value would then be explicit. >>>>> 4: what's the benefit of isel a zext to insert_subreg and then >>>>> xform it to a 32-bit move? >>>> >>>> The xform to a 32-bit move is only the conservative behavior. >>>> The zext can be implicit if regalloc can coalesce subreg_inserts. >>>> >>>>> Why not just isel the zext to the move? It's not legal to >>>>> coalesce it away anyway. >>>> >>>> Actually it is legal to coalesce it. On x86-64 any write to a 32- >>>> bit register zero extends the value to 64-bits. For the >>>> insert_subreg under discussion the inserted value is a 32-bit >>>> result, that has in-fact already be zero extended implicitly. >>> >>> It's not legal to coalesce away the 32-bit zero extending move. >>> >>> Suppose RAX contains some value with top 32-bits non-zero. >>> mov EAX, EAX (zero extend top bits) >>> use RAX (expecting top bits to be zero) >>> >>> Coalesced away the move is a miscompilation. >> >> Indeed, but what you have described is not a valid insert_subreg >> either. Insert_subreg would take EAX as its input operand and >> would only be coalesced into an instruction that defines EAX >> explicitly (i.e. an instruction that defines RAX defines EAX >> implicitly, not explicitly so no coalescing). I think that this >> coalescing rule is generally required for correctness when >> coalescing insert_subreg under any architecture. > > What I've been saying all along. zero_extend on x86-64 isn't the > same as a insert_sub, don't try to model it that way. Your example is (use (zext (i32 (trunc RAX)))), which cannot be done without an explicit mov instruction. What I was contending is that (use (zext EAX)) can be done without an explicit mov instruction. -- Christopher Lamb -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20070730/9381ad7d/attachment.html From rspencer at reidspencer.com Mon Jul 30 14:53:57 2007 From: rspencer at reidspencer.com (Reid Spencer) Date: Mon, 30 Jul 2007 19:53:57 -0000 Subject: [llvm-commits] [llvm] r40599 - /llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Message-ID: <200707301953.l6UJrvkf018386@zion.cs.uiuc.edu> Author: reid Date: Mon Jul 30 14:53:57 2007 New Revision: 40599 URL: http://llvm.org/viewvc/llvm-project?rev=40599&view=rev Log: Fix a typo/thinko. Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp?rev=40599&r1=40598&r2=40599&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Mon Jul 30 14:53:57 2007 @@ -7974,7 +7974,7 @@ if (InvokeInst *II = dyn_cast(Caller)) { NC = new InvokeInst(Callee, II->getNormalDest(), II->getUnwindDest(), &Args[0], Args.size(), Caller->getName(), Caller); - cast(II)->setCallingConv(II->getCallingConv()); + cast(NC)->setCallingConv(II->getCallingConv()); } else { NC = new CallInst(Callee, &Args[0], Args.size(), Caller->getName(), Caller); if (cast(Caller)->isTailCall()) From asl at math.spbu.ru Mon Jul 30 15:02:03 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Mon, 30 Jul 2007 20:02:03 -0000 Subject: [llvm-commits] [llvm] r40600 - in /llvm/trunk: autoconf/configure.ac include/llvm/Config/config.h.in lib/ExecutionEngine/JIT/JIT.cpp Message-ID: <200707302002.l6UK23J2018694@zion.cs.uiuc.edu> Author: asl Date: Mon Jul 30 15:02:02 2007 New Revision: 40600 URL: http://llvm.org/viewvc/llvm-project?rev=40600&view=rev Log: Add detection of __dso_handle presence during configure. Use this information in the JITer (short path is added for darwin). This is needed to properly JIT llvm-gcc-4.2-built binaries, since cxa_atexit is enabled by default on much more targets. Modified: llvm/trunk/autoconf/configure.ac llvm/trunk/include/llvm/Config/config.h.in llvm/trunk/lib/ExecutionEngine/JIT/JIT.cpp Modified: llvm/trunk/autoconf/configure.ac URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/autoconf/configure.ac?rev=40600&r1=40599&r2=40600&view=diff ============================================================================== --- llvm/trunk/autoconf/configure.ac (original) +++ llvm/trunk/autoconf/configure.ac Mon Jul 30 15:02:02 2007 @@ -766,6 +766,9 @@ dnl=== dnl===-----------------------------------------------------------------------=== +dnl Check, whether __dso_handle is present +AC_CHECK_FUNCS([__dso_handle]) + dnl See if the llvm-gcc executable can compile to LLVM assembly AC_CACHE_CHECK([whether llvm-gcc is sane],[llvm_cv_llvmgcc_sanity], [llvm_cv_llvmgcc_sanity="no" Modified: llvm/trunk/include/llvm/Config/config.h.in URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Config/config.h.in?rev=40600&r1=40599&r2=40600&view=diff ============================================================================== --- llvm/trunk/include/llvm/Config/config.h.in (original) +++ llvm/trunk/include/llvm/Config/config.h.in Mon Jul 30 15:02:02 2007 @@ -437,6 +437,9 @@ /* Define to 1 if you have the header file. */ #undef HAVE_WINDOWS_H +/* Define to 1 if you have the `__dso_handle' function. */ +#undef HAVE___DSO_HANDLE + /* Installation directory for binary executables */ #undef LLVM_BINDIR Modified: llvm/trunk/lib/ExecutionEngine/JIT/JIT.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/JIT/JIT.cpp?rev=40600&r1=40599&r2=40600&view=diff ============================================================================== --- llvm/trunk/lib/ExecutionEngine/JIT/JIT.cpp (original) +++ llvm/trunk/lib/ExecutionEngine/JIT/JIT.cpp Mon Jul 30 15:02:02 2007 @@ -27,17 +27,29 @@ #include "llvm/Target/TargetData.h" #include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetJITInfo.h" + +#include "llvm/Config/config.h" + using namespace llvm; #ifdef __APPLE__ -#include -#if defined(MAC_OS_X_VERSION_10_4) && \ - ((MAC_OS_X_VERSION_MIN_REQUIRED > MAC_OS_X_VERSION_10_4) || \ - (MAC_OS_X_VERSION_MIN_REQUIRED == MAC_OS_X_VERSION_10_4 && \ - __APPLE_CC__ >= 5330)) -// __dso_handle is resolved by Mac OS X dynamic linker. -extern void *__dso_handle __attribute__ ((__visibility__ ("hidden"))); +// Apple gcc defaults to -fuse-cxa-atexit (i.e. calls __cxa_atexit instead +// of atexit). It passes the address of linker generated symbol __dso_handle +// to the function. +// This configuration change happened at version 5330. +# include +# if defined(MAC_OS_X_VERSION_10_4) && \ + ((MAC_OS_X_VERSION_MIN_REQUIRED > MAC_OS_X_VERSION_10_4) || \ + (MAC_OS_X_VERSION_MIN_REQUIRED == MAC_OS_X_VERSION_10_4 && \ + __APPLE_CC__ >= 5330)) +# ifndef HAVE___DSO_HANDLE +# define HAVE___DSO_HANDLE 1 +# endif +# endif #endif + +#if HAVE___DSO_HANDLE +extern void *__dso_handle __attribute__ ((__visibility__ ("hidden"))); #endif static struct RegisterJIT { @@ -302,14 +314,7 @@ // If the global is external, just remember the address. if (GV->isDeclaration()) { -#if defined(__APPLE__) && defined(MAC_OS_X_VERSION_10_4) && \ - ((MAC_OS_X_VERSION_MIN_REQUIRED > MAC_OS_X_VERSION_10_4) || \ - (MAC_OS_X_VERSION_MIN_REQUIRED == MAC_OS_X_VERSION_10_4 && \ - __APPLE_CC__ >= 5330)) - // Apple gcc defaults to -fuse-cxa-atexit (i.e. calls __cxa_atexit instead - // of atexit). It passes the address of linker generated symbol __dso_handle - // to the function. - // This configuration change happened at version 5330. +#if HAVE___DSO_HANDLE if (GV->getName() == "__dso_handle") return (void*)&__dso_handle; #endif From rspencer at reidspencer.com Mon Jul 30 15:13:25 2007 From: rspencer at reidspencer.com (Reid Spencer) Date: Mon, 30 Jul 2007 20:13:25 -0000 Subject: [llvm-commits] [llvm] r40601 - /llvm/trunk/configure Message-ID: <200707302013.l6UKDPrZ019003@zion.cs.uiuc.edu> Author: reid Date: Mon Jul 30 15:13:24 2007 New Revision: 40601 URL: http://llvm.org/viewvc/llvm-project?rev=40601&view=rev Log: Regenerate for __dso_handle, per Anton's request. Modified: llvm/trunk/configure Modified: llvm/trunk/configure URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/configure?rev=40601&r1=40600&r2=40601&view=diff ============================================================================== --- llvm/trunk/configure (original) +++ llvm/trunk/configure Mon Jul 30 15:13:24 2007 @@ -2087,7 +2087,7 @@ ;; llvm-poolalloc) subdirs="$subdirs projects/llvm-poolalloc" ;; - poolalloc) subdirs="$subdirs projects/poolalloc" + poolalloc) subdirs="$subdirs projects/poolalloc" ;; llvm-kernel) subdirs="$subdirs projects/llvm-kernel" ;; @@ -10369,7 +10369,7 @@ lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 lt_status=$lt_dlunknown cat > conftest.$ac_ext < conftest.$ac_ext + echo '#line 12516 "configure"' > conftest.$ac_ext if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 (eval $ac_compile) 2>&5 ac_status=$? @@ -14231,11 +14231,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:14231: $lt_compile\"" >&5) + (eval echo "\"\$as_me:14234: $lt_compile\"" >&5) (eval "$lt_compile" 2>conftest.err) ac_status=$? cat conftest.err >&5 - echo "$as_me:14235: \$? = $ac_status" >&5 + echo "$as_me:14238: \$? = $ac_status" >&5 if (exit $ac_status) && test -s "$ac_outfile"; then # The compiler can only warn and ignore the option if not recognized # So say no if there are warnings other than the usual output. @@ -14499,11 +14499,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:14499: $lt_compile\"" >&5) + (eval echo "\"\$as_me:14502: $lt_compile\"" >&5) (eval "$lt_compile" 2>conftest.err) ac_status=$? cat conftest.err >&5 - echo "$as_me:14503: \$? = $ac_status" >&5 + echo "$as_me:14506: \$? = $ac_status" >&5 if (exit $ac_status) && test -s "$ac_outfile"; then # The compiler can only warn and ignore the option if not recognized # So say no if there are warnings other than the usual output. @@ -14603,11 +14603,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:14603: $lt_compile\"" >&5) + (eval echo "\"\$as_me:14606: $lt_compile\"" >&5) (eval "$lt_compile" 2>out/conftest.err) ac_status=$? cat out/conftest.err >&5 - echo "$as_me:14607: \$? = $ac_status" >&5 + echo "$as_me:14610: \$? = $ac_status" >&5 if (exit $ac_status) && test -s out/conftest2.$ac_objext then # The compiler can only warn and ignore the option if not recognized @@ -17055,7 +17055,7 @@ lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 lt_status=$lt_dlunknown cat > conftest.$ac_ext < conftest.$ac_ext <&5) + (eval echo "\"\$as_me:19526: $lt_compile\"" >&5) (eval "$lt_compile" 2>conftest.err) ac_status=$? cat conftest.err >&5 - echo "$as_me:19527: \$? = $ac_status" >&5 + echo "$as_me:19530: \$? = $ac_status" >&5 if (exit $ac_status) && test -s "$ac_outfile"; then # The compiler can only warn and ignore the option if not recognized # So say no if there are warnings other than the usual output. @@ -19627,11 +19627,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:19627: $lt_compile\"" >&5) + (eval echo "\"\$as_me:19630: $lt_compile\"" >&5) (eval "$lt_compile" 2>out/conftest.err) ac_status=$? cat out/conftest.err >&5 - echo "$as_me:19631: \$? = $ac_status" >&5 + echo "$as_me:19634: \$? = $ac_status" >&5 if (exit $ac_status) && test -s out/conftest2.$ac_objext then # The compiler can only warn and ignore the option if not recognized @@ -21197,11 +21197,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:21197: $lt_compile\"" >&5) + (eval echo "\"\$as_me:21200: $lt_compile\"" >&5) (eval "$lt_compile" 2>conftest.err) ac_status=$? cat conftest.err >&5 - echo "$as_me:21201: \$? = $ac_status" >&5 + echo "$as_me:21204: \$? = $ac_status" >&5 if (exit $ac_status) && test -s "$ac_outfile"; then # The compiler can only warn and ignore the option if not recognized # So say no if there are warnings other than the usual output. @@ -21301,11 +21301,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:21301: $lt_compile\"" >&5) + (eval echo "\"\$as_me:21304: $lt_compile\"" >&5) (eval "$lt_compile" 2>out/conftest.err) ac_status=$? cat out/conftest.err >&5 - echo "$as_me:21305: \$? = $ac_status" >&5 + echo "$as_me:21308: \$? = $ac_status" >&5 if (exit $ac_status) && test -s out/conftest2.$ac_objext then # The compiler can only warn and ignore the option if not recognized @@ -23536,11 +23536,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:23536: $lt_compile\"" >&5) + (eval echo "\"\$as_me:23539: $lt_compile\"" >&5) (eval "$lt_compile" 2>conftest.err) ac_status=$? cat conftest.err >&5 - echo "$as_me:23540: \$? = $ac_status" >&5 + echo "$as_me:23543: \$? = $ac_status" >&5 if (exit $ac_status) && test -s "$ac_outfile"; then # The compiler can only warn and ignore the option if not recognized # So say no if there are warnings other than the usual output. @@ -23804,11 +23804,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:23804: $lt_compile\"" >&5) + (eval echo "\"\$as_me:23807: $lt_compile\"" >&5) (eval "$lt_compile" 2>conftest.err) ac_status=$? cat conftest.err >&5 - echo "$as_me:23808: \$? = $ac_status" >&5 + echo "$as_me:23811: \$? = $ac_status" >&5 if (exit $ac_status) && test -s "$ac_outfile"; then # The compiler can only warn and ignore the option if not recognized # So say no if there are warnings other than the usual output. @@ -23908,11 +23908,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:23908: $lt_compile\"" >&5) + (eval echo "\"\$as_me:23911: $lt_compile\"" >&5) (eval "$lt_compile" 2>out/conftest.err) ac_status=$? cat out/conftest.err >&5 - echo "$as_me:23912: \$? = $ac_status" >&5 + echo "$as_me:23915: \$? = $ac_status" >&5 if (exit $ac_status) && test -s out/conftest2.$ac_objext then # The compiler can only warn and ignore the option if not recognized @@ -33575,6 +33575,117 @@ fi + +for ac_func in __dso_handle +do +as_ac_var=`echo "ac_cv_func_$ac_func" | $as_tr_sh` +{ echo "$as_me:$LINENO: checking for $ac_func" >&5 +echo $ECHO_N "checking for $ac_func... $ECHO_C" >&6; } +if { as_var=$as_ac_var; eval "test \"\${$as_var+set}\" = set"; }; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +/* Define $ac_func to an innocuous variant, in case declares $ac_func. + For example, HP-UX 11i declares gettimeofday. */ +#define $ac_func innocuous_$ac_func + +/* System header to define __stub macros and hopefully few prototypes, + which can conflict with char $ac_func (); below. + Prefer to if __STDC__ is defined, since + exists even on freestanding compilers. */ + +#ifdef __STDC__ +# include +#else +# include +#endif + +#undef $ac_func + +/* Override any GCC internal prototype to avoid an error. + Use char because int might match the return type of a GCC + builtin and then its argument prototype would still apply. */ +#ifdef __cplusplus +extern "C" +#endif +char $ac_func (); +/* The GNU C library defines this for functions which it implements + to always fail with ENOSYS. Some functions are actually named + something starting with __ and the normal name is an alias. */ +#if defined __stub_$ac_func || defined __stub___$ac_func +choke me +#endif + +int +main () +{ +return $ac_func (); + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest$ac_exeext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + eval "$as_ac_var=yes" +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + eval "$as_ac_var=no" +fi + +rm -f core conftest.err conftest.$ac_objext \ + conftest$ac_exeext conftest.$ac_ext +fi +ac_res=`eval echo '${'$as_ac_var'}'` + { echo "$as_me:$LINENO: result: $ac_res" >&5 +echo "${ECHO_T}$ac_res" >&6; } +if test `eval echo '${'$as_ac_var'}'` = yes; then + cat >>confdefs.h <<_ACEOF +#define `echo "HAVE_$ac_func" | $as_tr_cpp` 1 +_ACEOF + +fi +done + + { echo "$as_me:$LINENO: checking whether llvm-gcc is sane" >&5 echo $ECHO_N "checking whether llvm-gcc is sane... $ECHO_C" >&6; } if test "${llvm_cv_llvmgcc_sanity+set}" = set; then From dpatel at apple.com Mon Jul 30 15:20:02 2007 From: dpatel at apple.com (Devang Patel) Date: Mon, 30 Jul 2007 20:20:02 -0000 Subject: [llvm-commits] [llvm] r40602 - /llvm/trunk/lib/Transforms/Scalar/LICM.cpp Message-ID: <200707302020.l6UKK2nj019182@zion.cs.uiuc.edu> Author: dpatel Date: Mon Jul 30 15:19:59 2007 New Revision: 40602 URL: http://llvm.org/viewvc/llvm-project?rev=40602&view=rev Log: LICM preserves scalar evolution and dom frontier. Modified: llvm/trunk/lib/Transforms/Scalar/LICM.cpp Modified: llvm/trunk/lib/Transforms/Scalar/LICM.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LICM.cpp?rev=40602&r1=40601&r2=40602&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/LICM.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/LICM.cpp Mon Jul 30 15:19:59 2007 @@ -42,6 +42,7 @@ #include "llvm/Analysis/AliasAnalysis.h" #include "llvm/Analysis/AliasSetTracker.h" #include "llvm/Analysis/Dominators.h" +#include "llvm/Analysis/ScalarEvolution.h" #include "llvm/Transforms/Utils/PromoteMemToReg.h" #include "llvm/Support/CFG.h" #include "llvm/Support/Compiler.h" @@ -78,6 +79,8 @@ AU.addRequired(); AU.addRequired(); // For scalar promotion (mem2reg) AU.addRequired(); + AU.addPreserved(); + AU.addPreserved(); } bool doFinalization() { From dpatel at apple.com Mon Jul 30 15:22:53 2007 From: dpatel at apple.com (Devang Patel) Date: Mon, 30 Jul 2007 20:22:53 -0000 Subject: [llvm-commits] [llvm] r40603 - /llvm/trunk/lib/Transforms/Scalar/LoopRotation.cpp Message-ID: <200707302022.l6UKMrax019300@zion.cs.uiuc.edu> Author: dpatel Date: Mon Jul 30 15:22:53 2007 New Revision: 40603 URL: http://llvm.org/viewvc/llvm-project?rev=40603&view=rev Log: Loop Rotation pass preserves dominator tree and frontier. Modified: llvm/trunk/lib/Transforms/Scalar/LoopRotation.cpp Modified: llvm/trunk/lib/Transforms/Scalar/LoopRotation.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopRotation.cpp?rev=40603&r1=40602&r2=40603&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/LoopRotation.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/LoopRotation.cpp Mon Jul 30 15:22:53 2007 @@ -62,6 +62,8 @@ AU.addPreserved(); AU.addRequiredID(LoopSimplifyID); AU.addPreservedID(LoopSimplifyID); + AU.addPreserved(); + AU.addPreserved(); } // Helper functions From dpatel at apple.com Mon Jul 30 15:23:47 2007 From: dpatel at apple.com (Devang Patel) Date: Mon, 30 Jul 2007 20:23:47 -0000 Subject: [llvm-commits] [llvm] r40604 - /llvm/trunk/lib/Transforms/Utils/LCSSA.cpp Message-ID: <200707302023.l6UKNlPk019331@zion.cs.uiuc.edu> Author: dpatel Date: Mon Jul 30 15:23:45 2007 New Revision: 40604 URL: http://llvm.org/viewvc/llvm-project?rev=40604&view=rev Log: LCSSA preserves dom info. Modified: llvm/trunk/lib/Transforms/Utils/LCSSA.cpp Modified: llvm/trunk/lib/Transforms/Utils/LCSSA.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/LCSSA.cpp?rev=40604&r1=40603&r2=40604&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/LCSSA.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/LCSSA.cpp Mon Jul 30 15:23:45 2007 @@ -73,6 +73,14 @@ AU.addPreserved(); AU.addRequired(); AU.addPreserved(); + AU.addPreserved(); + + // Request DominanceFrontier now, even though LCSSA does + // not use it. This allows Pass Manager to schedule Dominance + // Frontier early enough such that one LPPassManager can handle + // multiple loop transformation passes. + AU.addRequired(); + AU.addPreserved(); } private: void getLoopValuesUsedOutsideLoop(Loop *L, From scottm at aero.org Mon Jul 30 16:00:31 2007 From: scottm at aero.org (Scott Michel) Date: Mon, 30 Jul 2007 21:00:31 -0000 Subject: [llvm-commits] [llvm] r40605 - /llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Message-ID: <200707302100.l6UL0WPX020402@zion.cs.uiuc.edu> Author: pingbak Date: Mon Jul 30 16:00:31 2007 New Revision: 40605 URL: http://llvm.org/viewvc/llvm-project?rev=40605&view=rev Log: - Allow custom lowering for CTPOP, CTTZ, CTLZ. - Fixed an existing unexpanded tab. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=40605&r1=40604&r2=40605&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Mon Jul 30 16:00:31 2007 @@ -2738,9 +2738,16 @@ case ISD::CTLZ: Tmp1 = LegalizeOp(Node->getOperand(0)); // Op switch (TLI.getOperationAction(Node->getOpcode(), Node->getValueType(0))) { - case TargetLowering::Custom: assert(0 && "Cannot custom handle this yet!"); + case TargetLowering::Custom: case TargetLowering::Legal: Result = DAG.UpdateNodeOperands(Result, Tmp1); + if (TLI.getOperationAction(Node->getOpcode(), Node->getValueType(0)) == + TargetLowering::Custom) { + Tmp1 = TLI.LowerOperation(Result, DAG); + if (Tmp1.Val) { + Result = Tmp1; + } + } break; case TargetLowering::Promote: { MVT::ValueType OVT = Tmp1.getValueType(); @@ -2760,7 +2767,7 @@ DAG.getConstant(MVT::getSizeInBits(NVT), NVT), ISD::SETEQ); Result = DAG.getNode(ISD::SELECT, NVT, Tmp2, - DAG.getConstant(MVT::getSizeInBits(OVT),NVT), Tmp1); + DAG.getConstant(MVT::getSizeInBits(OVT),NVT), Tmp1); break; case ISD::CTLZ: // Tmp1 = Tmp1 - (sizeinbits(NVT) - sizeinbits(Old VT)) From dpatel at apple.com Mon Jul 30 16:10:45 2007 From: dpatel at apple.com (Devang Patel) Date: Mon, 30 Jul 2007 21:10:45 -0000 Subject: [llvm-commits] [llvm] r40606 - /llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp Message-ID: <200707302110.l6ULAj3P020785@zion.cs.uiuc.edu> Author: dpatel Date: Mon Jul 30 16:10:44 2007 New Revision: 40606 URL: http://llvm.org/viewvc/llvm-project?rev=40606&view=rev Log: Remove dead code. Modified: llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp Modified: llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp?rev=40606&r1=40605&r2=40606&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp Mon Jul 30 16:10:44 2007 @@ -452,28 +452,22 @@ else OrigIDom = OrigIDomNode->getBlock(); - // Initially use Orig's immediate dominator as NewBB's immediate dominator. - BasicBlock *NewIDom = OrigIDom; - DenseMap::iterator I = VM.find(OrigIDom); - if (I != VM.end()) { - // if (!DT->getNode(OrigIDom)) - // CloneDomInfo(NewIDom, OrigIDom, NewPreheader, OrigPreheader, - // OrigHeader, DT, DF, VM); - - NewIDom = cast(I->second); - - // If NewIDom does not have corresponding dominatore tree node then - // get one. - if (!DT->getNode(NewIDom)) + // Initially use Orig's immediate dominator as NewBB's immediate dominator. + BasicBlock *NewIDom = OrigIDom; + DenseMap::iterator I = VM.find(OrigIDom); + if (I != VM.end()) { + NewIDom = cast(I->second); + + // If NewIDom does not have corresponding dominatore tree node then + // get one. + if (!DT->getNode(NewIDom)) CloneDomInfo(NewIDom, OrigIDom, NewPreheader, OrigPreheader, OrigHeader, DT, DF, VM); } - // if (NewBB == NewIDom) { - // DT->addNewBlock(NewBB, OrigIDom); - // DT->changeImmediateDominator(NewBB, NewIDom); - //} else - DT->addNewBlock(NewBB, NewIDom); - + + DT->addNewBlock(NewBB, NewIDom); + + // Copy cloned dominance frontiner set DominanceFrontier::DomSetType NewDFSet; if (DF) { DominanceFrontier::iterator DFI = DF->find(Orig); From resistor at mac.com Mon Jul 30 16:26:39 2007 From: resistor at mac.com (Owen Anderson) Date: Mon, 30 Jul 2007 21:26:39 -0000 Subject: [llvm-commits] [llvm] r40607 - /llvm/trunk/lib/Transforms/Scalar/GVN.cpp Message-ID: <200707302126.l6ULQdbk021328@zion.cs.uiuc.edu> Author: resistor Date: Mon Jul 30 16:26:39 2007 New Revision: 40607 URL: http://llvm.org/viewvc/llvm-project?rev=40607&view=rev Log: Avoid potential iterator invalidation problems. Modified: llvm/trunk/lib/Transforms/Scalar/GVN.cpp Modified: llvm/trunk/lib/Transforms/Scalar/GVN.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/GVN.cpp?rev=40607&r1=40606&r2=40607&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/GVN.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/GVN.cpp Mon Jul 30 16:26:39 2007 @@ -895,11 +895,14 @@ currAvail = availableOut[DI->getIDom()->getBlock()]; for (BasicBlock::iterator BI = BB->begin(), BE = BB->end(); - BI != BE; ++BI) { + BI != BE; ) { changed_function |= processInstruction(BI, currAvail, lastSeenLoad, toErase); NumGVNInstr += toErase.size(); + // Avoid iterator invalidation + ++BI; + for (SmallVector::iterator I = toErase.begin(), E = toErase.end(); I != E; ++I) (*I)->eraseFromParent(); From evan.cheng at apple.com Mon Jul 30 16:40:04 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 30 Jul 2007 14:40:04 -0700 Subject: [llvm-commits] Patch for X86 to use subregs In-Reply-To: References: <922DEBE2-14C9-4A1C-9A3A-1C366DE18B4A@apple.com> <2C30DFBD-73FF-4CCB-BE4F-469146C7A91C@gmail.com> <9A826E2A-2B21-4FFF-A18B-E11D08B7CB93@apple.com> <1BB6419C-C448-4995-8A27-791D8D21244D@gmail.com> <30228125-8A4F-4336-8380-8525B2BF7DFB@apple.com> <446DD660-7847-4E8A-9715-B66AB0AC988A@apple.com> <537BFA91-0E35-43FF-A45C-D0C9B543A102@gmail.com> <2EE0874C-1B82-47ED-AAE8-E4FBD5F2A92D@apple.com> Message-ID: On Jul 30, 2007, at 12:42 PM, Christopher Lamb wrote: > > I contend that insert_subreg is target specific already. It > currently requires a target specific subreg index, which is a kind > of target specific hook, that tells coalescing how to deal with it. > A two operand insert_subreg (or an insert_subreg from undef) is a > move between target register classes that have subreg relationship. > insert_subreg defines the entire superreg value, and I don't see > why it's so bad to allow targets to specify their own semantics for > what happens to the register being inserted into? This is > essentially what the subreg index is already, we could even put > semantics in the SubRegSet in the RegisterInfo.td allowing the > semantics to be checked by the compiler. > > A parameter of the set that indicates that an insert into the > subreg i either leaves the rest of the superreg value untouched > (insert_subreg reg, reg, i), or it implicitly sets the rest of the > register to a known value (insert_subreg constant_value, reg, i), > or to undef (insert_subreg undef, reg, i). Only the specified > semantics for that SubRegSet of the register class of the result of > the insert_subreg would be valid, and could be ensured so. > > This seems to me to allow insert_subreg to capture may useful > cases, and it captures the register set semantics in the > RegisterInfo.td file, where I think it belongs. > No. I am sorry, that cannot be allowed. insert_subreg must mean the same for all targets. We cannot allow x86-64 insert_subreg (and only the 32-bit variant of this, not 16-bit or 8-bit ones) to mean insert the lower 32-bit while zero-ing the upper 32-bit. The deviates from llvm philosophy. >>>>>> 2: two operant variant of insert_subreg should mean the >>>>>> superreg is undef. If you insert a value into a low part, the >>>>>> rest of the superreg is still undef. >>>>> >>>>> I think the meaning of insert_subreg instruction (both 2 and 3 >>>>> operand versions) must have semantics specific to the target. >>>>> For example, on x86-64 there is no valid 3 operand >>>>> insert_subreg for a 32-bit value into 64-bits, because the 32- >>>>> bit result is always going to be zero extended and overwrite >>>>> the upper 32-bits. >>>> >>>> It just means there is no way to implement a insert_subreg with >>>> a single instruction under x86-64. But that is perfectly ok. >>>> Apart from anyext, x86-64 just isn't going to benefit from it. >>>> It's also impossible to read or modify the higher 32-bits. >>> >>> Currently the move that's generated isn't handled by coalescing >>> because the source and destination belong to different register >>> classes. The insert_subreg is meant to be a means to move values >>> implicitly between register classes that have a subreg >>> relationship. So if insert_subreg semantics must be target >>> independent, then I think you isel the zero-extending move to be: >>> >>> (i64 (INSERT_SUBREG (i64 0), GR32:$src, 3)) >> >> But that's wrong. Remember the superreg argument is an read / >> mod / write operand. That is, the first operand is a use, the def >> is the LHS but we are forcing the allocator to target the same >> physical register. >> >> v1 = some existing value >> v1 = insert_subreg v1, GR32:$src, 3 >> >> But zext is zeroing out the top part. i.e. zext is equal to >> >> mov v1, 0 >> v1 = insert_subreg v1, GR32:$src, 3 > > I'm suggesting to expand the semantics of insert_subreg as > described above. > >>> The thing is that the general coalescing will be able to >>> determine that the copy from undef is unneeded for (INSERT_SUBREG >>> (i64 undef), GR32:$src, 3), but it would take a target specific >>> hook to know that the constant zero is unneeded on x86-64. A >>> target specific hook for this might be useful, but I think that >>> this is in the realm of future work now. >> >> Sorry, I am not following. zext on x86-64, i.e. the 32-bit move, >> cannot be coalesced away. No need for target specific hook. > > I simply disagree here: > > http://www.x86-64.org/documentation/assembly.html see the section > 'Implicit Zero Extend' > > EAX = op > RAX = mov EAX <= this may be removed > ... = use RAX The mov can only be removed some of the time. It's different from moves (which can always be removed if both lhs and rhs match), nor is it the same for the moves generated from lowering insert_subreg (which can be removed if rhs is a sub-register of rhs). It's a different problem that should be handled differently, it's not a register coalescing problem. > > >>>>>> 3: why is there a two operant variant in the first place? Why >>>>>> not use undef for the superreg operant? >>>>> >>>>> To note, the two operand variant is of the MachineInstr. The >>>>> DAG form would be to represent the superregister as coming from >>>>> an undef node, but this gets isel'd to the two operand >>>>> MachineInstr of insert_subreg. >>>>> >>>>> The reason is that undef is typically selected to an implicit >>>>> def of a register. This causes an unnecessary move to be >>>>> generated later on. This move can be optimized away later with >>>>> more difficulty during subreg lowering by checking whether the >>>>> input register is defined by an implicit def pseudo >>>>> instruction, but instead I decided to perform the optimization >>>>> during ISel on the DAG form during instruction selection. >>>>> >>>>> With what you're suggesting >>>>> reg1024 = ... >>>>> reg1026 = insert_subreg undef, reg1024, 1 >>>>> reg1027 = insert_subreg reg1026, reg1025, 1 >>>>> use reg1027 >>>>> >>>>> would be isel'd to then subreg lowered to: >>>>> >>>>> R6 = ... >>>>> implicit def R01 <= this implicit def is unecessary >>>> >>>> That's a pseudo instruction, it doesn't cost anything. >>>> >>>>> R23 = R01 <= this copy is unnecessary >>>> >>>> It can be coalesced to: >>>> R23 = undef >>>> >>>>> R2 = R6 >>>>> R45 = R23 >>>>> R5 = R6 >>>>> use R45 >>>> >>>> Using undef explicit is the right way to go. There is a good >>>> reason it's there. Having the two operand version of >>>> insert_subreg that implicitly use an undef value doesn't fit >>>> into the overall llvm philosophy. >>> >>> Right now the coalescing that you are describing is happening >>> during isel. Are you simply saying that you'd rather have the >>> coalescing happen during subreg lowering? I can accept that, but >>> would you share your reasons? >> >> There really isn't a very good argument for having the 2 different >> versions of insert_subreg. undef use must be explicitly modeled. I >> really don't see what you mean by coalescing during isel. isel >> doesn't have the concept of coalescing. Also don't forget >> everything must remain ssa until register allocation. > > It depends on what you intend the semantics of insert_subreg to be. > Under my proposal above, there would only be the 3 operand version. > However, there would be a variant where where the input superreg > operand is an immediate, but the immediate value would then be > explicit. > That doesn't work. Remember insert_subreg is modeled as a read / mod / write instruction. If the superreg is a immediatate, what does that mean? Then it's no longer a insert_subreg. Please keep it simple, don't attempt to overload unnecessarily. >>>>>> 4: what's the benefit of isel a zext to insert_subreg and then >>>>>> xform it to a 32-bit move? >>>>> >>>>> The xform to a 32-bit move is only the conservative behavior. >>>>> The zext can be implicit if regalloc can coalesce subreg_inserts. >>>>> >>>>>> Why not just isel the zext to the move? It's not legal to >>>>>> coalesce it away anyway. >>>>> >>>>> Actually it is legal to coalesce it. On x86-64 any write to a >>>>> 32-bit register zero extends the value to 64-bits. For the >>>>> insert_subreg under discussion the inserted value is a 32-bit >>>>> result, that has in-fact already be zero extended implicitly. >>>> >>>> It's not legal to coalesce away the 32-bit zero extending move. >>>> >>>> Suppose RAX contains some value with top 32-bits non-zero. >>>> mov EAX, EAX (zero extend top bits) >>>> use RAX (expecting top bits to be zero) >>>> >>>> Coalesced away the move is a miscompilation. >>> >>> Indeed, but what you have described is not a valid insert_subreg >>> either. Insert_subreg would take EAX as its input operand and >>> would only be coalesced into an instruction that defines EAX >>> explicitly (i.e. an instruction that defines RAX defines EAX >>> implicitly, not explicitly so no coalescing). I think that this >>> coalescing rule is generally required for correctness when >>> coalescing insert_subreg under any architecture. >> >> What I've been saying all along. zero_extend on x86-64 isn't the >> same as a insert_sub, don't try to model it that way. > > Your example is (use (zext (i32 (trunc RAX)))), which cannot be > done without an explicit mov instruction. What I was contending is > that (use (zext EAX)) can be done without an explicit mov > instruction. > I appreciate you're trying to think of ways to expand the use of subreg work. But x86-64 implicit zero-extension is not the same problem. Trying to solve the x86-64 optimization issue this way is a unacceptable hack. Your subreg pass is a general pass. Please keep it that way. Thanks, Evan > -- > Christopher Lamb > > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20070730/70ff3935/attachment.html From christopher.lamb at gmail.com Mon Jul 30 17:10:19 2007 From: christopher.lamb at gmail.com (Christopher Lamb) Date: Mon, 30 Jul 2007 15:10:19 -0700 Subject: [llvm-commits] Patch for X86 to use subregs In-Reply-To: References: <922DEBE2-14C9-4A1C-9A3A-1C366DE18B4A@apple.com> <2C30DFBD-73FF-4CCB-BE4F-469146C7A91C@gmail.com> <9A826E2A-2B21-4FFF-A18B-E11D08B7CB93@apple.com> <1BB6419C-C448-4995-8A27-791D8D21244D@gmail.com> <30228125-8A4F-4336-8380-8525B2BF7DFB@apple.com> <446DD660-7847-4E8A-9715-B66AB0AC988A@apple.com> <537BFA91-0E35-43FF-A45C-D0C9B543A102@gmail.com> <2EE0874C-1B82-47ED-AAE8-E4FBD5F2A92D@apple.com> Message-ID: <0FE79DC5-25BC-4E1A-824D-0A6A9FEA0E24@gmail.com> On Jul 30, 2007, at 2:40 PM, Evan Cheng wrote: > > I appreciate you're trying to think of ways to expand the use of > subreg work. But x86-64 implicit zero-extension is not the same > problem. Trying to solve the x86-64 optimization issue this way is > a unacceptable hack. Your subreg pass is a general pass. Please > keep it that way. Settled. There are other cases where I think it would be interesting to model implicit operations or more complex register constrains in a way that the register allocator an coalescing has a way to deal with them. For instance, the kind of constraints that cause MOV16to16_ to be necessary. Here I'd think that coalescing could be taught how to coalesce moves between register classes and sub classes of that class. Currently the following MOV16to16_ wouldn't be coalesced, though it could be, because CX is in class GR32_ and AX is in class GR32. CX = mov AX Coalescing would see this as GR32_:reg1025 = mov GR32:reg1024 So it isn't as simple as it may seem at first because you'd potentially have to tighten the register class constraint on the def of reg1024, but I think it's doable... There is an internal architecture here that it would be interesting to target with LLVM, but it happens to have a highly constrained register file, requiring many of these currently un-coalesced moves between register sub classes and their parent. Do you think I should open a PR on that? -- Christopher Lamb From asl at math.spbu.ru Mon Jul 30 18:03:25 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Mon, 30 Jul 2007 23:03:25 -0000 Subject: [llvm-commits] [llvm] r40608 - /llvm/trunk/lib/ExecutionEngine/Interpreter/ExternalFunctions.cpp Message-ID: <200707302303.l6UN3QEp024476@zion.cs.uiuc.edu> Author: asl Date: Mon Jul 30 18:03:25 2007 New Revision: 40608 URL: http://llvm.org/viewvc/llvm-project?rev=40608&view=rev Log: Add a comment: don't expect from external function resolver in interpreter things, it wasn't designed to handle. Modified: llvm/trunk/lib/ExecutionEngine/Interpreter/ExternalFunctions.cpp Modified: llvm/trunk/lib/ExecutionEngine/Interpreter/ExternalFunctions.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/Interpreter/ExternalFunctions.cpp?rev=40608&r1=40607&r2=40608&view=diff ============================================================================== --- llvm/trunk/lib/ExecutionEngine/Interpreter/ExternalFunctions.cpp (original) +++ llvm/trunk/lib/ExecutionEngine/Interpreter/ExternalFunctions.cpp Mon Jul 30 18:03:25 2007 @@ -62,6 +62,11 @@ } } +// Try to find address of external function given a Function object. +// Please note, that interpreter doesn't know how to assemble a +// real call in general case (this is JIT job), that's why it assumes, +// that all external functions has the same (and pretty "general") signature. +// The typical example of such functions are "lle_X_" ones. static ExFunc lookupFunction(const Function *F) { // Function not found, look it up... start by figuring out what the // composite function name should be. From dpatel at apple.com Mon Jul 30 18:07:10 2007 From: dpatel at apple.com (Devang Patel) Date: Mon, 30 Jul 2007 23:07:10 -0000 Subject: [llvm-commits] [llvm] r40609 - /llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp Message-ID: <200707302307.l6UN7BiO024594@zion.cs.uiuc.edu> Author: dpatel Date: Mon Jul 30 18:07:10 2007 New Revision: 40609 URL: http://llvm.org/viewvc/llvm-project?rev=40609&view=rev Log: If loop can be unswitched again, then do it yourself. Modified: llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp Modified: llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp?rev=40609&r1=40608&r2=40609&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp Mon Jul 30 18:07:10 2007 @@ -70,12 +70,14 @@ SmallPtrSet UnswitchedVals; bool OptimizeForSize; + bool redoLoop; public: static char ID; // Pass ID, replacement for typeid LoopUnswitch(bool Os = false) : - LoopPass((intptr_t)&ID), OptimizeForSize(Os) {} + LoopPass((intptr_t)&ID), OptimizeForSize(Os), redoLoop(false) {} bool runOnLoop(Loop *L, LPPassManager &LPM); + bool processLoop(Loop *L); /// This transformation requires natural loop information & requires that /// loop preheaders be inserted into the CFG... @@ -152,11 +154,23 @@ } bool LoopUnswitch::runOnLoop(Loop *L, LPPassManager &LPM_Ref) { - assert(L->isLCSSAForm()); LI = &getAnalysis(); LPM = &LPM_Ref; bool Changed = false; - + + do { + redoLoop = false; + Changed |= processLoop(L); + } while(redoLoop); + + return Changed; +} + +/// processLoop - Do actual work and unswitch loop if possible and profitable. +bool LoopUnswitch::processLoop(Loop *L) { + assert(L->isLCSSAForm()); + bool Changed = false; + // Loop over all of the basic blocks in the loop. If we find an interior // block that is branching on a loop-invariant condition, we can unswitch this // loop. @@ -576,7 +590,7 @@ OrigPH->getTerminator()->eraseFromParent(); // We need to reprocess this loop, it could be unswitched again. - LPM->redoLoop(L); + redoLoop = true; // Now that we know that the loop is never entered when this condition is a // particular value, rewrite the loop with this info. We know that this will @@ -740,7 +754,7 @@ OldBR->eraseFromParent(); LoopProcessWorklist.push_back(NewLoop); - LPM->redoLoop(L); + redoLoop = true; // Now we rewrite the original code to know that the condition is true and the // new code to know that the condition is false. From rspencer at reidspencer.com Mon Jul 30 21:57:38 2007 From: rspencer at reidspencer.com (Reid Spencer) Date: Tue, 31 Jul 2007 02:57:38 -0000 Subject: [llvm-commits] [llvm] r40610 - in /llvm/trunk: lib/AsmParser/Lexer.l lib/AsmParser/llvmAsmParser.y test/Assembler/2007-07-30-AutoUpgradeZextSext.ll Message-ID: <200707310257.l6V2vcE7030337@zion.cs.uiuc.edu> Author: reid Date: Mon Jul 30 21:57:37 2007 New Revision: 40610 URL: http://llvm.org/viewvc/llvm-project?rev=40610&view=rev Log: For PR1553: Make the AsmParser auto-upgrade the old zext and sext keywords for parameter attributes and handle the end-of-line ambiguity. Added: llvm/trunk/test/Assembler/2007-07-30-AutoUpgradeZextSext.ll Modified: llvm/trunk/lib/AsmParser/Lexer.l llvm/trunk/lib/AsmParser/llvmAsmParser.y Modified: llvm/trunk/lib/AsmParser/Lexer.l URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/Lexer.l?rev=40610&r1=40609&r2=40610&view=diff ============================================================================== --- llvm/trunk/lib/AsmParser/Lexer.l (original) +++ llvm/trunk/lib/AsmParser/Lexer.l Mon Jul 30 21:57:37 2007 @@ -177,6 +177,8 @@ */ HexIntConstant [us]0x[0-9A-Fa-f]+ +/* WSNL - shorthand for newline followed by whitespace */ +WSNL [ \r\t\n]*$ %% {Comment} { /* Ignore comments for now */ } @@ -234,6 +236,10 @@ noalias { return NOALIAS; } byval { return BYVAL; } nest { return NEST; } +sext{WSNL} { // For auto-upgrade only, drop in LLVM 3.0 + return SIGNEXT; } +zext{WSNL} { // For auto-upgrade only, drop in LLVM 3.0 + return ZEROEXT; } void { RET_TY(Type::VoidTy, VOID); } float { RET_TY(Type::FloatTy, FLOAT); } Modified: llvm/trunk/lib/AsmParser/llvmAsmParser.y URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/llvmAsmParser.y?rev=40610&r1=40609&r2=40610&view=diff ============================================================================== --- llvm/trunk/lib/AsmParser/llvmAsmParser.y (original) +++ llvm/trunk/lib/AsmParser/llvmAsmParser.y Mon Jul 30 21:57:37 2007 @@ -1225,7 +1225,9 @@ }; ParamAttr : ZEROEXT { $$ = ParamAttr::ZExt; } + | ZEXT { $$ = ParamAttr::ZExt; } | SIGNEXT { $$ = ParamAttr::SExt; } + | SEXT { $$ = ParamAttr::SExt; } | INREG { $$ = ParamAttr::InReg; } | SRET { $$ = ParamAttr::StructRet; } | NOALIAS { $$ = ParamAttr::NoAlias; } Added: llvm/trunk/test/Assembler/2007-07-30-AutoUpgradeZextSext.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Assembler/2007-07-30-AutoUpgradeZextSext.ll?rev=40610&view=auto ============================================================================== --- llvm/trunk/test/Assembler/2007-07-30-AutoUpgradeZextSext.ll (added) +++ llvm/trunk/test/Assembler/2007-07-30-AutoUpgradeZextSext.ll Mon Jul 30 21:57:37 2007 @@ -0,0 +1,12 @@ +; Test that upgrading zext/sext attributes to zeroext and signext +; works correctly. +; PR1553 +; RUN: llvm-as < %s > /dev/null + +define i32 @bar() { + %t = call i8 @foo( i8 10 sext ) zext + %x = zext i8 %t to i32 + ret i32 %x +} + +declare i8 @foo(i8 signext ) zeroext From rspencer at reidspencer.com Mon Jul 30 22:50:36 2007 From: rspencer at reidspencer.com (Reid Spencer) Date: Tue, 31 Jul 2007 03:50:36 -0000 Subject: [llvm-commits] [llvm] r40611 - in /llvm/trunk/lib/AsmParser: Lexer.cpp.cvs Lexer.l.cvs llvmAsmParser.cpp.cvs llvmAsmParser.h.cvs llvmAsmParser.y.cvs Message-ID: <200707310350.l6V3obdx031411@zion.cs.uiuc.edu> Author: reid Date: Mon Jul 30 22:50:36 2007 New Revision: 40611 URL: http://llvm.org/viewvc/llvm-project?rev=40611&view=rev Log: Regenerate. Modified: llvm/trunk/lib/AsmParser/Lexer.cpp.cvs llvm/trunk/lib/AsmParser/Lexer.l.cvs llvm/trunk/lib/AsmParser/llvmAsmParser.cpp.cvs llvm/trunk/lib/AsmParser/llvmAsmParser.h.cvs llvm/trunk/lib/AsmParser/llvmAsmParser.y.cvs Modified: llvm/trunk/lib/AsmParser/Lexer.cpp.cvs URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/Lexer.cpp.cvs?rev=40611&r1=40610&r2=40611&view=diff ============================================================================== --- llvm/trunk/lib/AsmParser/Lexer.cpp.cvs (original) +++ llvm/trunk/lib/AsmParser/Lexer.cpp.cvs Mon Jul 30 22:50:36 2007 @@ -17,10 +17,10 @@ #define yylineno llvmAsmlineno #line 20 "Lexer.cpp" -/* A lexical scanner generated by flex */ +/* A lexical scanner generated by flex*/ /* Scanner skeleton version: - * $Header: /cvs/root/flex/flex/skel.c,v 1.2 2004/05/07 00:28:17 jkh Exp $ + * $Header: /home/daffy/u0/vern/flex/RCS/flex.skl,v 2.91 96/09/10 16:58:48 vern Exp $ */ #define FLEX_SCANNER @@ -28,6 +28,7 @@ #define YY_FLEX_MINOR_VERSION 5 #include +#include /* cfront 1.2 defines "c_plusplus" instead of "__cplusplus" */ @@ -41,7 +42,6 @@ #ifdef __cplusplus #include -#include /* Use prototypes in function declarations. */ #define YY_USE_PROTOS @@ -153,6 +153,15 @@ #define unput(c) yyunput( c, yytext_ptr ) +/* Some routines like yy_flex_realloc() are emitted as static but are + not called by all lexers. This generates warnings in some compilers, + notably GCC. Arrange to suppress these. */ +#ifdef __GNUC__ +#define YY_MAY_BE_UNUSED __attribute__((unused)) +#else +#define YY_MAY_BE_UNUSED +#endif + /* The following is because we cannot portably get our hands on size_t * (without autoconf's help, which isn't available because we want * flex-generated scanners to compile on their own). @@ -259,7 +268,7 @@ YY_BUFFER_STATE yy_scan_bytes YY_PROTO(( yyconst char *bytes, int len )); static void *yy_flex_alloc YY_PROTO(( yy_size_t )); -static inline void *yy_flex_realloc YY_PROTO(( void *, yy_size_t )); +static inline void *yy_flex_realloc YY_PROTO(( void *, yy_size_t )) YY_MAY_BE_UNUSED; static void yy_flex_free YY_PROTO(( void * )); #define yy_new_buffer yy_create_buffer @@ -308,37 +317,38 @@ *yy_cp = '\0'; \ yy_c_buf_p = yy_cp; -#define YY_NUM_RULES 140 -#define YY_END_OF_BUFFER 141 -static yyconst short int yy_acclist[221] = +#define YY_NUM_RULES 146 +#define YY_END_OF_BUFFER 147 +static yyconst short int yy_acclist[227] = { 0, - 141, 139, 140, 138, 139, 140, 138, 140, 139, 140, - 139, 140, 139, 140, 139, 140, 139, 140, 139, 140, - 131, 139, 140, 131, 139, 140, 1, 139, 140, 139, - 140, 139, 140, 139, 140, 139, 140, 139, 140, 139, - 140, 139, 140, 139, 140, 139, 140, 139, 140, 139, - 140, 139, 140, 139, 140, 139, 140, 139, 140, 139, - 140, 139, 140, 139, 140, 139, 140, 139, 140, 139, - 140, 139, 140, 139, 140, 128, 126, 124, 134, 132, - 136, 131, 1, 125, 135, 110, 38, 73, 55, 74, - 69, 25, 128, 130, 124, 136, 22, 136, 137, 129, - - 125, 56, 68, 36, 39, 3, 58, 83, 88, 86, - 87, 85, 84, 89, 93, 109, 78, 76, 65, 77, - 75, 57, 91, 82, 80, 81, 79, 92, 90, 70, - 127, 136, 136, 67, 94, 72, 61, 117, 64, 71, - 118, 66, 24, 133, 60, 97, 63, 45, 26, 4, - 53, 59, 62, 49, 12, 96, 136, 34, 32, 2, - 5, 50, 99, 44, 52, 119, 95, 23, 116, 41, - 7, 51, 40, 103, 102, 8, 16, 112, 115, 35, - 54, 107, 101, 111, 27, 28, 100, 113, 108, 106, - 6, 29, 98, 48, 33, 9, 19, 10, 104, 11, - - 47, 46, 105, 31, 13, 15, 14, 17, 30, 37, - 18, 114, 20, 120, 122, 123, 42, 121, 43, 21 + 147, 145, 146, 144, 145, 146, 144, 146, 145, 146, + 145, 146, 145, 146, 145, 146, 145, 146, 145, 146, + 137, 145, 146, 137, 145, 146, 1, 145, 146, 145, + 146, 145, 146, 145, 146, 145, 146, 145, 146, 145, + 146, 145, 146, 145, 146, 145, 146, 145, 146, 145, + 146, 145, 146, 145, 146, 145, 146, 145, 146, 145, + 146, 145, 146, 145, 146, 145, 146, 145, 146, 145, + 146, 145, 146, 145, 146, 134, 132, 130, 140, 138, + 142, 137, 1, 131, 141, 116, 38, 79, 61, 80, + 75, 25, 134, 136, 130, 142, 22, 142, 143, 135, + + 131, 62, 74, 36, 39, 3, 64, 89, 94, 92, + 93, 91, 90, 95, 99, 115, 84, 82, 71, 83, + 81, 63, 97, 88, 86, 87, 85, 98, 96, 76, + 133, 142, 142, 73, 100, 78, 67, 123, 70, 77, + 124, 72, 52, 24, 139, 66, 103, 69, 47, 26, + 4, 59, 65, 68, 55, 12, 102, 142, 34, 32, + 2, 51, 5, 56, 105, 46, 58, 53, 125, 101, + 23, 54, 122, 41, 7, 57, 40, 109, 108, 8, + 16, 118, 121, 35, 60, 113, 107, 117, 27, 28, + 106, 119, 114, 112, 6, 29, 104, 50, 33, 44, + + 45, 9, 19, 10, 110, 11, 49, 48, 111, 31, + 13, 15, 14, 17, 30, 37, 18, 120, 20, 126, + 128, 129, 42, 127, 43, 21 } ; -static yyconst short int yy_accept[569] = +static yyconst short int yy_accept[587] = { 0, 1, 1, 1, 2, 4, 7, 9, 11, 13, 15, 17, 19, 21, 24, 27, 30, 32, 34, 36, 38, @@ -346,62 +356,64 @@ 60, 62, 64, 66, 68, 70, 72, 74, 76, 76, 77, 77, 78, 78, 79, 80, 80, 81, 81, 82, 83, 83, 84, 84, 85, 86, 86, 86, 86, 86, - 86, 86, 86, 87, 87, 88, 88, 88, 88, 88, - 88, 88, 89, 89, 89, 89, 89, 89, 89, 89, - 89, 89, 89, 90, 90, 90, 90, 90, 90, 90, - 90, 90, 90, 91, 91, 91, 91, 91, 91, 91, + 86, 86, 86, 87, 87, 87, 88, 88, 88, 88, + 88, 88, 88, 89, 89, 89, 89, 89, 89, 89, + 89, 89, 89, 89, 90, 90, 90, 90, 90, 90, + 90, 90, 90, 90, 91, 91, 91, 91, 91, 91, - 91, 92, 92, 92, 92, 92, 92, 92, 92, 92, - 92, 92, 92, 92, 92, 92, 92, 92, 92, 93, + 91, 91, 92, 92, 92, 92, 92, 92, 92, 92, + 92, 92, 92, 92, 92, 92, 92, 92, 92, 92, 93, 93, 93, 93, 93, 93, 93, 93, 93, 93, - 93, 93, 93, 93, 93, 94, 94, 95, 96, 97, - 98, 99, 99, 100, 100, 101, 102, 103, 103, 103, - 104, 104, 104, 105, 105, 105, 105, 106, 106, 106, - 106, 106, 106, 106, 106, 106, 107, 107, 107, 107, + 93, 93, 93, 93, 93, 93, 94, 94, 95, 96, + 97, 98, 99, 99, 100, 100, 101, 102, 103, 103, + 103, 104, 104, 104, 105, 105, 105, 105, 105, 106, + 106, 106, 106, 106, 106, 106, 106, 106, 107, 107, 107, 107, 107, 107, 107, 107, 107, 107, 107, 107, 107, 107, 107, 107, 107, 107, 107, 107, 107, 107, - 108, 108, 108, 108, 108, 109, 110, 111, 112, 113, + 107, 107, 108, 108, 108, 108, 108, 108, 109, 110, - 114, 114, 115, 116, 116, 116, 117, 117, 117, 117, - 117, 117, 118, 119, 120, 120, 120, 120, 121, 122, - 122, 122, 123, 123, 123, 123, 123, 123, 123, 123, - 123, 124, 125, 126, 126, 127, 128, 128, 129, 130, - 130, 130, 130, 130, 130, 130, 130, 130, 131, 131, - 131, 132, 133, 133, 133, 133, 134, 134, 134, 134, - 134, 135, 135, 135, 136, 136, 136, 136, 136, 136, - 136, 136, 136, 136, 136, 136, 136, 136, 137, 138, - 138, 138, 138, 138, 139, 140, 140, 140, 140, 141, - 141, 141, 141, 141, 141, 141, 141, 142, 143, 143, - - 143, 143, 143, 143, 144, 144, 144, 144, 145, 146, - 146, 146, 147, 147, 147, 147, 148, 149, 149, 149, - 150, 150, 150, 150, 151, 151, 152, 153, 153, 153, - 153, 153, 154, 154, 155, 155, 156, 156, 156, 157, - 158, 159, 160, 160, 160, 161, 161, 161, 161, 161, - 161, 161, 161, 161, 161, 161, 161, 161, 162, 162, - 163, 164, 164, 164, 164, 164, 164, 164, 165, 165, - 165, 165, 165, 166, 166, 166, 166, 166, 166, 166, - 166, 166, 166, 166, 166, 166, 166, 166, 167, 167, - 167, 167, 167, 168, 168, 169, 169, 169, 169, 169, - - 169, 169, 169, 170, 170, 170, 171, 171, 171, 171, - 172, 172, 172, 172, 173, 173, 173, 174, 175, 176, - 176, 176, 177, 178, 178, 178, 178, 179, 179, 180, - 181, 181, 181, 181, 182, 182, 182, 182, 183, 183, - 183, 184, 185, 186, 186, 187, 188, 188, 189, 190, - 190, 190, 190, 190, 190, 191, 191, 191, 192, 193, - 193, 193, 193, 193, 193, 194, 194, 194, 194, 194, - 194, 195, 195, 195, 195, 195, 196, 196, 196, 196, - 196, 196, 196, 196, 196, 196, 197, 197, 197, 197, - 197, 198, 198, 198, 198, 199, 200, 201, 202, 203, - - 203, 204, 204, 204, 204, 204, 205, 205, 205, 205, - 206, 206, 207, 208, 208, 208, 208, 208, 209, 209, - 209, 209, 209, 209, 209, 209, 210, 210, 210, 210, - 210, 210, 211, 211, 211, 211, 211, 211, 212, 212, - 212, 212, 212, 212, 213, 213, 213, 213, 213, 213, - 213, 213, 214, 214, 214, 214, 214, 215, 216, 217, - 217, 218, 218, 219, 220, 220, 221, 221 + 111, 112, 113, 114, 114, 115, 116, 116, 116, 117, + 117, 117, 117, 117, 117, 118, 119, 120, 120, 120, + 120, 120, 121, 122, 122, 122, 123, 123, 123, 123, + 123, 123, 123, 123, 123, 124, 125, 126, 126, 127, + 128, 128, 129, 130, 130, 130, 130, 130, 130, 130, + 130, 130, 131, 131, 131, 132, 133, 133, 133, 133, + 134, 134, 134, 134, 134, 135, 135, 135, 135, 136, + 136, 136, 136, 136, 136, 136, 136, 136, 136, 136, + 136, 136, 136, 137, 138, 138, 138, 138, 138, 139, + 140, 140, 140, 140, 141, 141, 141, 141, 141, 141, + + 141, 141, 142, 143, 143, 143, 144, 144, 144, 144, + 145, 145, 145, 145, 146, 147, 147, 147, 148, 148, + 148, 148, 148, 149, 150, 150, 150, 151, 151, 151, + 151, 152, 152, 153, 154, 154, 154, 154, 154, 155, + 155, 156, 156, 157, 157, 157, 158, 159, 160, 161, + 161, 161, 162, 162, 163, 163, 163, 163, 163, 163, + 163, 163, 163, 163, 163, 163, 164, 164, 165, 166, + 166, 166, 166, 166, 166, 166, 167, 167, 167, 167, + 167, 168, 168, 168, 168, 168, 168, 168, 168, 168, + 168, 168, 168, 168, 169, 169, 169, 169, 169, 170, + + 170, 170, 170, 170, 171, 171, 172, 172, 172, 172, + 172, 172, 172, 172, 172, 172, 173, 174, 174, 174, + 175, 175, 175, 175, 176, 176, 176, 176, 177, 177, + 177, 178, 179, 180, 180, 180, 181, 182, 182, 182, + 182, 183, 183, 184, 185, 185, 185, 185, 186, 186, + 186, 186, 187, 187, 187, 187, 188, 189, 190, 190, + 191, 192, 192, 193, 194, 194, 194, 194, 194, 194, + 194, 195, 195, 195, 196, 197, 197, 197, 197, 197, + 197, 198, 198, 198, 198, 198, 198, 199, 199, 199, + 199, 199, 200, 200, 200, 201, 201, 201, 201, 201, + + 201, 202, 202, 202, 203, 203, 203, 203, 203, 204, + 204, 204, 204, 205, 206, 207, 208, 209, 209, 210, + 210, 210, 210, 210, 211, 211, 211, 211, 212, 212, + 213, 214, 214, 214, 214, 214, 215, 215, 215, 215, + 215, 215, 215, 215, 216, 216, 216, 216, 216, 216, + 217, 217, 217, 217, 217, 217, 218, 218, 218, 218, + 218, 218, 219, 219, 219, 219, 219, 219, 219, 219, + 220, 220, 220, 220, 220, 221, 222, 223, 223, 224, + 224, 225, 226, 226, 227, 227 } ; static yyconst int yy_ec[256] = @@ -445,141 +457,147 @@ 4, 4, 4, 4 } ; -static yyconst short int yy_base[577] = +static yyconst short int yy_base[595] = { 0, - 0, 0, 1236, 1237, 1237, 1237, 1231, 1220, 41, 36, - 45, 51, 57, 63, 0, 74, 66, 69, 68, 88, - 78, 108, 93, 36, 135, 123, 119, 101, 154, 127, - 67, 181, 139, 213, 141, 80, 156, 92, 1229, 1237, - 1218, 1237, 1227, 0, 186, 203, 219, 100, 240, 256, - 261, 0, 1226, 0, 190, 112, 157, 113, 159, 150, - 136, 81, 1215, 49, 110, 162, 196, 266, 210, 207, - 212, 1214, 204, 262, 224, 233, 192, 263, 279, 275, - 230, 234, 284, 276, 288, 290, 97, 242, 291, 292, - 294, 300, 1213, 295, 302, 298, 305, 313, 296, 321, - - 322, 324, 307, 325, 309, 328, 330, 332, 335, 336, - 334, 339, 341, 346, 350, 353, 354, 342, 1212, 355, - 362, 370, 366, 371, 372, 373, 379, 375, 386, 378, - 393, 402, 390, 403, 1211, 1220, 1237, 0, 411, 1209, - 436, 454, 0, 1218, 1237, 0, 1207, 405, 404, 1206, - 414, 416, 1205, 413, 418, 428, 1204, 420, 419, 437, - 439, 445, 441, 456, 458, 1203, 461, 449, 460, 462, - 463, 467, 464, 468, 469, 475, 474, 488, 476, 491, - 493, 494, 480, 495, 498, 500, 502, 506, 507, 1202, - 510, 511, 512, 515, 1201, 1200, 1199, 1198, 1197, 1196, - - 508, 1195, 1194, 514, 516, 1193, 545, 519, 523, 517, - 533, 1192, 1191, 1190, 525, 550, 520, 1189, 1188, 546, - 537, 1187, 534, 561, 562, 565, 564, 568, 566, 567, - 1186, 1185, 1184, 569, 1183, 1182, 571, 1181, 1180, 572, - 573, 579, 583, 585, 591, 580, 598, 1179, 590, 592, - 1237, 603, 621, 625, 629, 634, 612, 636, 422, 637, - 1178, 638, 604, 1177, 639, 640, 641, 605, 642, 644, - 643, 645, 649, 646, 653, 651, 666, 1176, 1175, 648, - 652, 650, 663, 1174, 1173, 667, 678, 669, 1172, 670, - 677, 680, 681, 686, 687, 685, 1171, 1170, 689, 690, - - 691, 692, 693, 1169, 694, 697, 695, 0, 1168, 696, - 709, 1167, 711, 713, 715, 1166, 1165, 718, 721, 1164, - 724, 725, 727, 1163, 730, 1162, 1161, 733, 735, 736, - 732, 1160, 737, 1159, 739, 1158, 741, 698, 1157, 757, - 1156, 1155, 745, 740, 1154, 747, 757, 760, 761, 758, - 762, 528, 748, 769, 771, 773, 774, 1153, 775, 1152, - 1151, 776, 778, 777, 784, 785, 779, 1150, 786, 787, - 788, 793, 1149, 796, 798, 799, 807, 800, 802, 811, - 804, 815, 817, 818, 819, 820, 823, 1148, 824, 822, - 830, 828, 1147, 827, 1146, 826, 832, 833, 840, 844, - - 848, 849, 1145, 851, 852, 1144, 853, 855, 856, 1143, - 857, 858, 859, 1142, 863, 861, 1141, 1140, 1139, 862, - 864, 1138, 1137, 873, 882, 874, 1136, 879, 1135, 1134, - 886, 875, 889, 1133, 890, 892, 893, 1132, 891, 894, - 1131, 1130, 1129, 895, 1128, 1127, 899, 1126, 1125, 902, - 896, 904, 903, 906, 1124, 908, 915, 1123, 1122, 916, - 920, 921, 923, 925, 1106, 926, 927, 928, 929, 930, - 1094, 931, 937, 945, 933, 1093, 941, 950, 947, 952, - 954, 953, 961, 956, 959, 1092, 962, 965, 966, 968, - 1089, 970, 973, 972, 1088, 1087, 1086, 1085, 1084, 974, - - 1083, 975, 976, 979, 981, 1082, 992, 993, 994, 1081, - 995, 1075, 1074, 996, 997, 1001, 1003, 1073, 1004, 1005, - 1006, 1010, 1009, 1011, 1016, 922, 1013, 1017, 1018, 1021, - 1023, 860, 1024, 1032, 1033, 1035, 1036, 608, 1040, 1037, - 1039, 1041, 1043, 606, 1046, 1045, 1044, 1048, 1054, 1055, - 1056, 478, 1063, 1064, 1065, 1067, 477, 377, 374, 1069, - 246, 1070, 245, 169, 1068, 165, 1237, 1109, 1111, 1114, - 1118, 1121, 1125, 58, 1130, 57 + 0, 0, 1276, 1277, 1277, 1277, 1271, 1260, 41, 36, + 45, 51, 57, 63, 0, 74, 66, 69, 68, 90, + 92, 121, 78, 36, 148, 93, 117, 114, 167, 138, + 67, 194, 152, 226, 134, 95, 103, 101, 1269, 1277, + 1258, 1277, 1267, 0, 199, 216, 232, 131, 253, 269, + 274, 0, 1266, 0, 203, 119, 154, 150, 115, 163, + 149, 80, 1255, 191, 49, 164, 157, 108, 279, 81, + 184, 169, 1254, 223, 239, 188, 220, 224, 276, 182, + 237, 241, 245, 295, 258, 288, 118, 289, 296, 233, + 297, 306, 301, 298, 303, 304, 305, 308, 319, 323, + + 316, 327, 324, 330, 331, 334, 335, 337, 339, 340, + 341, 356, 352, 344, 342, 186, 345, 360, 348, 1253, + 369, 371, 372, 375, 377, 373, 378, 389, 385, 379, + 390, 403, 407, 392, 393, 1252, 1261, 1277, 0, 421, + 1250, 436, 454, 0, 1259, 1277, 0, 1248, 437, 381, + 1247, 412, 423, 1246, 410, 430, 455, 413, 1245, 456, + 439, 457, 426, 427, 428, 458, 459, 1244, 460, 464, + 467, 469, 471, 473, 474, 476, 475, 478, 477, 481, + 480, 483, 486, 494, 501, 499, 506, 503, 505, 507, + 508, 1243, 510, 513, 514, 517, 515, 1242, 1241, 1240, + + 1239, 1238, 1237, 511, 1236, 1235, 516, 519, 1234, 548, + 522, 525, 526, 537, 1233, 1232, 1231, 528, 550, 553, + 562, 1230, 1229, 563, 542, 1228, 541, 566, 567, 568, + 569, 573, 574, 570, 1227, 1226, 1225, 575, 1224, 1223, + 576, 1222, 1221, 585, 588, 590, 592, 597, 593, 600, + 572, 1220, 601, 603, 1277, 612, 632, 636, 640, 645, + 623, 647, 530, 648, 1219, 649, 612, 605, 1218, 650, + 651, 652, 613, 653, 655, 654, 656, 660, 657, 664, + 604, 672, 1217, 1216, 659, 661, 663, 662, 1215, 1214, + 674, 678, 681, 1213, 677, 692, 693, 694, 695, 696, + + 697, 1212, 1211, 698, 702, 1210, 705, 699, 700, 1209, + 701, 711, 703, 0, 1208, 706, 724, 740, 725, 731, + 733, 734, 1207, 1206, 737, 730, 1205, 739, 742, 735, + 1204, 744, 1203, 1202, 746, 750, 753, 754, 1201, 755, + 1200, 756, 1199, 758, 760, 775, 769, 1198, 1197, 773, + 762, 1196, 776, 1195, 778, 782, 783, 784, 785, 617, + 787, 790, 791, 793, 792, 1194, 794, 1193, 1192, 798, + 803, 796, 805, 797, 804, 1191, 808, 809, 816, 818, + 1190, 819, 821, 820, 825, 823, 824, 833, 826, 835, + 839, 840, 59, 719, 841, 842, 844, 845, 1189, 846, + + 847, 851, 852, 1188, 850, 1187, 855, 866, 856, 867, + 873, 854, 861, 869, 888, 894, 1186, 874, 880, 1185, + 884, 885, 886, 1184, 890, 891, 892, 1183, 893, 894, + 1182, 1181, 1180, 895, 900, 1179, 1178, 897, 906, 901, + 1177, 908, 1176, 1175, 905, 909, 915, 1174, 919, 920, + 921, 1173, 922, 923, 924, 1172, 1171, 1170, 704, 1169, + 1168, 927, 1167, 1166, 926, 929, 935, 930, 936, 937, + 1165, 941, 945, 1164, 1163, 946, 947, 949, 951, 953, + 1162, 956, 957, 958, 959, 960, 1161, 961, 962, 972, + 975, 1160, 977, 978, 1159, 980, 983, 984, 985, 987, + + 1158, 986, 990, 1157, 991, 993, 997, 998, 1156, 1004, + 1000, 1001, 1155, 1154, 1153, 1137, 1125, 1005, 1124, 1012, + 1007, 1006, 1019, 1122, 1023, 1024, 1013, 1121, 1028, 1120, + 1119, 1029, 1032, 1033, 1034, 1117, 1036, 1037, 1038, 1039, + 1041, 1040, 1043, 1116, 1045, 1048, 1050, 1053, 1054, 1115, + 1058, 1059, 1066, 1067, 1068, 1114, 1062, 1071, 1073, 1074, + 1076, 1113, 1080, 1077, 1075, 1079, 1081, 1086, 1087, 1112, + 1090, 1094, 1088, 1099, 1107, 1106, 1105, 1100, 992, 1101, + 346, 259, 1104, 256, 1277, 1140, 1142, 1145, 1149, 1152, + 1156, 235, 1161, 165 + } ; -static yyconst short int yy_def[577] = +static yyconst short int yy_def[595] = { 0, - 567, 1, 567, 567, 567, 567, 568, 569, 570, 567, - 569, 569, 569, 569, 571, 572, 569, 569, 569, 569, - 569, 569, 569, 569, 569, 569, 569, 569, 569, 569, - 569, 569, 569, 569, 569, 569, 569, 569, 568, 567, - 569, 567, 573, 574, 567, 567, 569, 569, 569, 569, - 569, 571, 575, 576, 567, 569, 569, 569, 569, 569, - 569, 569, 569, 569, 569, 569, 569, 569, 569, 569, - 569, 569, 569, 569, 569, 569, 569, 569, 569, 569, - 569, 569, 569, 569, 569, 569, 569, 569, 569, 569, - 569, 569, 569, 569, 569, 569, 569, 569, 569, 569, - - 569, 569, 569, 569, 569, 569, 569, 569, 569, 569, - 569, 569, 569, 569, 569, 569, 569, 569, 569, 569, - 569, 569, 569, 569, 569, 569, 569, 569, 569, 569, - 569, 569, 569, 569, 567, 573, 567, 574, 567, 569, - 569, 569, 51, 575, 567, 576, 569, 569, 569, 569, - 569, 569, 569, 569, 569, 569, 569, 569, 569, 569, - 569, 569, 569, 569, 569, 569, 569, 569, 569, 569, - 569, 569, 569, 569, 569, 569, 569, 569, 569, 569, - 569, 569, 569, 569, 569, 569, 569, 569, 569, 569, - 569, 569, 569, 569, 569, 569, 569, 569, 569, 569, - - 569, 569, 569, 569, 569, 569, 51, 569, 569, 569, - 569, 569, 569, 569, 569, 569, 569, 569, 569, 569, - 569, 569, 569, 569, 569, 569, 569, 569, 569, 569, - 569, 569, 569, 569, 569, 569, 569, 569, 569, 569, - 569, 569, 569, 569, 569, 569, 569, 569, 569, 569, - 567, 567, 567, 567, 569, 569, 569, 569, 569, 569, - 569, 569, 569, 569, 569, 569, 569, 569, 569, 569, - 569, 569, 569, 569, 569, 569, 569, 569, 569, 569, - 569, 569, 569, 569, 569, 569, 569, 569, 569, 569, - 569, 569, 569, 569, 569, 569, 569, 569, 569, 569, - - 569, 569, 569, 569, 569, 569, 569, 207, 569, 569, - 569, 569, 569, 569, 569, 569, 569, 569, 569, 569, - 569, 569, 569, 569, 569, 569, 569, 569, 569, 569, - 569, 569, 569, 569, 569, 569, 569, 569, 569, 567, - 569, 569, 569, 569, 569, 569, 569, 569, 569, 569, - 569, 569, 569, 569, 569, 569, 569, 569, 569, 569, - 569, 569, 569, 569, 569, 569, 569, 569, 569, 569, - 569, 569, 569, 569, 569, 569, 569, 569, 569, 569, - 569, 569, 569, 569, 569, 569, 569, 569, 569, 569, - 569, 569, 569, 569, 569, 569, 569, 569, 569, 569, - - 569, 569, 569, 569, 569, 569, 569, 569, 569, 569, - 569, 569, 569, 569, 569, 569, 569, 569, 569, 569, - 569, 569, 569, 569, 569, 569, 569, 569, 569, 569, - 569, 569, 569, 569, 569, 569, 569, 569, 569, 569, - 569, 569, 569, 569, 569, 569, 569, 569, 569, 569, - 569, 569, 569, 569, 569, 569, 569, 569, 569, 569, - 569, 569, 569, 569, 569, 569, 569, 569, 569, 569, - 569, 569, 569, 569, 569, 569, 569, 569, 569, 569, - 569, 569, 569, 569, 569, 569, 569, 569, 569, 569, - 569, 569, 569, 569, 569, 569, 569, 569, 569, 569, - - 569, 569, 569, 569, 569, 569, 569, 569, 569, 569, - 569, 569, 569, 569, 569, 569, 569, 569, 569, 569, - 569, 569, 569, 569, 569, 569, 569, 569, 569, 569, - 569, 569, 569, 569, 569, 569, 569, 569, 569, 569, - 569, 569, 569, 569, 569, 569, 569, 569, 569, 569, - 569, 569, 569, 569, 569, 569, 569, 569, 569, 569, - 569, 569, 569, 569, 569, 569, 0, 567, 567, 567, - 567, 567, 567, 567, 567, 567 + 585, 1, 585, 585, 585, 585, 586, 587, 588, 585, + 587, 587, 587, 587, 589, 590, 587, 587, 587, 587, + 587, 587, 587, 587, 587, 587, 587, 587, 587, 587, + 587, 587, 587, 587, 587, 587, 587, 587, 586, 585, + 587, 585, 591, 592, 585, 585, 587, 587, 587, 587, + 587, 589, 593, 594, 585, 587, 587, 587, 587, 587, + 587, 587, 587, 587, 587, 587, 587, 587, 587, 587, + 587, 587, 587, 587, 587, 587, 587, 587, 587, 587, + 587, 587, 587, 587, 587, 587, 587, 587, 587, 587, + 587, 587, 587, 587, 587, 587, 587, 587, 587, 587, + + 587, 587, 587, 587, 587, 587, 587, 587, 587, 587, + 587, 587, 587, 587, 587, 587, 587, 587, 587, 587, + 587, 587, 587, 587, 587, 587, 587, 587, 587, 587, + 587, 587, 587, 587, 587, 585, 591, 585, 592, 585, + 587, 587, 587, 51, 593, 585, 594, 587, 587, 587, + 587, 587, 587, 587, 587, 587, 587, 587, 587, 587, + 587, 587, 587, 587, 587, 587, 587, 587, 587, 587, + 587, 587, 587, 587, 587, 587, 587, 587, 587, 587, + 587, 587, 587, 587, 587, 587, 587, 587, 587, 587, + 587, 587, 587, 587, 587, 587, 587, 587, 587, 587, + + 587, 587, 587, 587, 587, 587, 587, 587, 587, 51, + 587, 587, 587, 587, 587, 587, 587, 587, 587, 587, + 587, 587, 587, 587, 587, 587, 587, 587, 587, 587, + 587, 587, 587, 587, 587, 587, 587, 587, 587, 587, + 587, 587, 587, 587, 587, 587, 587, 587, 587, 587, + 587, 587, 587, 587, 585, 585, 585, 585, 587, 587, + 587, 587, 587, 587, 587, 587, 587, 587, 587, 587, + 587, 587, 587, 587, 587, 587, 587, 587, 587, 587, + 587, 587, 587, 587, 587, 587, 587, 587, 587, 587, + 587, 587, 587, 587, 587, 587, 587, 587, 587, 587, + + 587, 587, 587, 587, 587, 587, 587, 587, 587, 587, + 587, 587, 587, 210, 587, 587, 587, 587, 587, 587, + 587, 587, 587, 587, 587, 587, 587, 587, 587, 587, + 587, 587, 587, 587, 587, 587, 587, 587, 587, 587, + 587, 587, 587, 587, 587, 587, 585, 587, 587, 587, + 587, 587, 587, 587, 587, 587, 587, 587, 587, 587, + 587, 587, 587, 587, 587, 587, 587, 587, 587, 587, + 587, 587, 587, 587, 587, 587, 587, 587, 587, 587, + 587, 587, 587, 587, 587, 587, 587, 587, 587, 587, + 587, 587, 585, 585, 587, 587, 587, 587, 587, 587, + + 587, 587, 587, 587, 587, 587, 587, 587, 587, 587, + 587, 587, 587, 587, 585, 585, 587, 587, 587, 587, + 587, 587, 587, 587, 587, 587, 587, 587, 587, 587, + 587, 587, 587, 587, 587, 587, 587, 587, 587, 587, + 587, 587, 587, 587, 587, 587, 587, 587, 587, 587, + 587, 587, 587, 587, 587, 587, 587, 587, 587, 587, + 587, 587, 587, 587, 587, 587, 587, 587, 587, 587, + 587, 587, 587, 587, 587, 587, 587, 587, 587, 587, + 587, 587, 587, 587, 587, 587, 587, 587, 587, 587, + 587, 587, 587, 587, 587, 587, 587, 587, 587, 587, + + 587, 587, 587, 587, 587, 587, 587, 587, 587, 587, + 587, 587, 587, 587, 587, 587, 587, 587, 587, 587, + 587, 587, 587, 587, 587, 587, 587, 587, 587, 587, + 587, 587, 587, 587, 587, 587, 587, 587, 587, 587, + 587, 587, 587, 587, 587, 587, 587, 587, 587, 587, + 587, 587, 587, 587, 587, 587, 587, 587, 587, 587, + 587, 587, 587, 587, 587, 587, 587, 587, 587, 587, + 587, 587, 587, 587, 587, 587, 587, 587, 587, 587, + 587, 587, 587, 587, 0, 585, 585, 585, 585, 585, + 585, 585, 585, 585 + } ; -static yyconst short int yy_nxt[1282] = +static yyconst short int yy_nxt[1322] = { 0, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 14, 14, 4, 15, 16, 8, 8, 8, 17, @@ -587,144 +605,149 @@ 27, 28, 29, 30, 8, 31, 32, 33, 34, 35, 36, 37, 8, 38, 43, 46, 46, 46, 46, 42, 45, 45, 45, 45, 47, 47, 47, 47, 42, 48, - 146, 138, 42, 82, 42, 49, 50, 50, 50, 50, - 42, 49, 50, 50, 50, 50, 42, 53, 156, 42, - 42, 42, 42, 55, 55, 55, 55, 64, 56, 65, - 105, 42, 61, 42, 42, 57, 62, 58, 51, 59, - - 66, 42, 60, 131, 63, 42, 42, 67, 140, 71, - 42, 68, 72, 42, 42, 134, 80, 69, 155, 73, - 70, 42, 81, 42, 93, 42, 42, 74, 185, 75, - 76, 157, 42, 94, 147, 150, 42, 77, 90, 95, - 42, 78, 86, 79, 83, 83, 83, 83, 42, 42, - 87, 91, 42, 102, 42, 88, 84, 92, 117, 89, - 129, 154, 103, 42, 104, 118, 85, 42, 132, 42, - 42, 119, 42, 130, 120, 42, 152, 96, 42, 97, - 153, 121, 42, 98, 148, 99, 149, 100, 133, 101, - 106, 158, 151, 159, 42, 45, 45, 45, 45, 55, - - 55, 55, 55, 107, 108, 42, 109, 110, 111, 42, - 112, 139, 46, 46, 46, 46, 113, 42, 114, 115, - 42, 116, 106, 42, 172, 42, 42, 49, 47, 47, - 47, 47, 42, 160, 166, 122, 123, 42, 124, 164, - 125, 167, 126, 42, 127, 165, 42, 42, 128, 141, - 141, 141, 141, 42, 170, 42, 178, 142, 42, 42, - 171, 186, 177, 142, 49, 50, 50, 50, 50, 42, - 143, 143, 143, 143, 42, 42, 42, 143, 143, 42, - 143, 143, 143, 143, 143, 143, 173, 161, 42, 42, - 162, 168, 42, 83, 83, 83, 83, 42, 169, 163, - - 174, 42, 175, 42, 42, 42, 179, 42, 42, 42, - 184, 42, 176, 42, 191, 42, 189, 187, 42, 200, - 42, 188, 42, 180, 181, 182, 42, 183, 196, 190, - 192, 194, 195, 193, 42, 42, 198, 42, 42, 204, - 201, 42, 197, 42, 202, 42, 206, 42, 42, 42, - 199, 203, 42, 209, 42, 42, 216, 208, 212, 42, - 205, 210, 218, 42, 220, 214, 42, 42, 42, 207, - 222, 217, 213, 211, 215, 42, 219, 226, 221, 42, - 223, 224, 227, 42, 42, 42, 42, 42, 42, 225, - 42, 42, 42, 228, 232, 229, 235, 230, 242, 42, - - 231, 237, 238, 42, 243, 244, 42, 245, 233, 234, - 236, 239, 246, 247, 240, 42, 42, 42, 42, 241, - 252, 252, 252, 252, 257, 248, 42, 42, 253, 42, - 258, 42, 42, 42, 253, 42, 259, 260, 249, 263, - 262, 42, 265, 343, 250, 141, 141, 141, 141, 42, - 42, 261, 42, 142, 42, 266, 267, 264, 42, 142, - 254, 255, 42, 256, 256, 256, 256, 42, 268, 42, - 270, 42, 269, 42, 42, 42, 42, 42, 273, 271, - 42, 42, 42, 272, 274, 276, 280, 42, 42, 42, - 42, 42, 284, 42, 287, 278, 275, 277, 286, 285, - - 282, 42, 279, 283, 42, 281, 42, 42, 42, 289, - 288, 42, 294, 42, 290, 42, 291, 292, 295, 42, - 42, 42, 297, 42, 42, 42, 296, 42, 42, 42, - 42, 293, 42, 42, 302, 299, 42, 298, 42, 301, - 311, 42, 305, 303, 304, 300, 42, 42, 411, 313, - 42, 306, 315, 307, 308, 308, 308, 308, 309, 42, - 310, 308, 308, 42, 308, 308, 308, 308, 308, 308, - 312, 319, 318, 314, 42, 42, 316, 42, 42, 42, - 42, 42, 42, 317, 42, 42, 42, 321, 322, 326, - 320, 324, 42, 42, 329, 330, 42, 323, 42, 325, - - 331, 328, 333, 42, 42, 42, 327, 334, 336, 332, - 335, 42, 252, 252, 252, 252, 337, 42, 42, 42, - 253, 42, 338, 346, 350, 42, 253, 254, 254, 339, - 340, 340, 340, 340, 340, 340, 340, 340, 256, 256, - 256, 256, 42, 256, 256, 256, 256, 42, 341, 42, + 393, 394, 42, 83, 42, 49, 50, 50, 50, 50, + 42, 49, 50, 50, 50, 50, 42, 53, 158, 42, + 42, 42, 42, 55, 55, 55, 55, 65, 56, 66, + 106, 42, 61, 42, 42, 57, 62, 58, 51, 59, + + 67, 81, 60, 42, 63, 42, 42, 82, 42, 68, + 166, 64, 87, 69, 42, 133, 42, 156, 132, 70, + 88, 42, 71, 72, 135, 89, 73, 42, 42, 90, + 42, 42, 42, 74, 42, 134, 91, 94, 186, 141, + 75, 148, 76, 77, 42, 162, 95, 42, 152, 92, + 78, 42, 96, 130, 79, 93, 80, 84, 84, 84, + 84, 42, 42, 42, 103, 42, 131, 42, 147, 85, + 42, 118, 151, 104, 155, 105, 42, 42, 119, 86, + 42, 149, 42, 150, 120, 159, 160, 121, 161, 153, + 97, 168, 98, 154, 122, 42, 99, 42, 100, 42, + + 101, 42, 102, 107, 42, 177, 226, 42, 45, 45, + 45, 45, 55, 55, 55, 55, 108, 109, 172, 110, + 111, 112, 167, 113, 140, 46, 46, 46, 46, 114, + 157, 115, 116, 42, 117, 107, 42, 42, 139, 42, + 49, 47, 47, 47, 47, 42, 42, 173, 123, 124, + 42, 125, 42, 126, 42, 127, 174, 128, 42, 189, + 169, 129, 142, 142, 142, 142, 42, 180, 170, 42, + 143, 42, 42, 179, 178, 171, 143, 49, 50, 50, + 50, 50, 42, 144, 144, 144, 144, 42, 181, 42, + 144, 144, 42, 144, 144, 144, 144, 144, 144, 175, + + 163, 42, 42, 164, 84, 84, 84, 84, 42, 42, + 42, 42, 165, 176, 42, 188, 42, 42, 42, 42, + 187, 42, 194, 182, 183, 184, 190, 185, 191, 42, + 192, 199, 42, 197, 193, 204, 42, 42, 195, 198, + 42, 196, 201, 42, 42, 200, 203, 42, 42, 205, + 42, 206, 42, 42, 42, 42, 202, 42, 42, 42, + 212, 42, 207, 215, 211, 42, 208, 224, 213, 42, + 217, 209, 227, 42, 225, 222, 210, 216, 219, 218, + 214, 220, 42, 230, 42, 42, 42, 228, 42, 223, + 42, 42, 42, 221, 42, 229, 231, 247, 42, 234, + + 236, 239, 42, 42, 233, 42, 42, 232, 246, 235, + 238, 241, 242, 263, 237, 240, 42, 248, 251, 249, + 42, 243, 250, 42, 244, 42, 42, 252, 253, 245, + 256, 256, 256, 256, 254, 264, 42, 266, 257, 42, + 42, 42, 269, 42, 257, 142, 142, 142, 142, 42, + 42, 267, 42, 143, 274, 273, 261, 275, 265, 143, + 258, 259, 262, 260, 260, 260, 260, 42, 42, 42, + 42, 42, 42, 42, 268, 271, 272, 42, 270, 278, + 42, 276, 42, 279, 42, 277, 42, 42, 42, 42, + 42, 42, 285, 42, 42, 280, 42, 292, 289, 42, + + 281, 291, 283, 293, 282, 290, 295, 42, 287, 296, + 284, 288, 42, 294, 42, 286, 42, 297, 42, 42, + 42, 42, 300, 42, 42, 302, 42, 42, 42, 42, + 42, 298, 42, 299, 301, 42, 304, 308, 42, 42, + 303, 42, 307, 42, 310, 311, 305, 306, 309, 317, + 42, 350, 319, 312, 42, 42, 313, 314, 314, 314, + 314, 315, 316, 42, 314, 314, 42, 314, 314, 314, + 314, 314, 314, 320, 318, 42, 42, 325, 326, 42, + 42, 42, 42, 42, 321, 42, 42, 42, 42, 42, + 344, 329, 328, 323, 322, 327, 331, 333, 42, 336, + + 324, 42, 330, 42, 332, 42, 42, 335, 337, 334, + 42, 340, 342, 42, 42, 338, 42, 42, 42, 341, + 339, 256, 256, 256, 256, 42, 42, 366, 343, 257, + 42, 353, 358, 345, 354, 257, 42, 425, 258, 258, + 346, 347, 347, 347, 347, 347, 347, 347, 347, 260, + 260, 260, 260, 42, 260, 260, 260, 260, 42, 348, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, - 347, 42, 42, 42, 42, 42, 42, 342, 344, 345, - 349, 352, 357, 351, 358, 354, 42, 348, 355, 42, - 42, 356, 42, 42, 353, 360, 362, 359, 363, 361, - 42, 42, 367, 42, 42, 368, 365, 366, 42, 42, - - 42, 364, 42, 42, 42, 42, 42, 42, 42, 42, - 42, 42, 369, 371, 372, 370, 373, 374, 377, 376, - 381, 375, 42, 383, 42, 402, 42, 382, 42, 378, - 384, 42, 380, 379, 42, 385, 386, 42, 42, 387, - 42, 388, 389, 42, 391, 42, 42, 390, 42, 42, - 42, 393, 42, 42, 42, 396, 392, 394, 42, 395, - 42, 42, 404, 397, 403, 400, 340, 340, 340, 340, - 42, 42, 398, 42, 42, 42, 399, 401, 406, 407, - 408, 412, 42, 405, 42, 410, 42, 42, 42, 42, - 42, 42, 42, 409, 414, 416, 417, 42, 42, 42, - - 42, 42, 413, 418, 415, 419, 42, 421, 420, 42, - 423, 42, 42, 42, 422, 42, 427, 42, 425, 429, - 42, 426, 430, 424, 42, 435, 431, 428, 42, 433, - 42, 42, 42, 42, 434, 42, 42, 42, 432, 42, - 42, 42, 436, 42, 440, 42, 42, 447, 439, 437, - 442, 445, 444, 42, 448, 438, 441, 42, 449, 443, - 446, 42, 42, 451, 42, 42, 42, 450, 42, 42, - 42, 42, 42, 42, 42, 42, 42, 42, 454, 458, - 453, 462, 463, 465, 456, 452, 42, 42, 42, 455, - 460, 461, 42, 459, 466, 42, 467, 457, 464, 42, - - 470, 468, 42, 42, 42, 42, 42, 42, 42, 42, - 472, 469, 42, 479, 477, 42, 42, 42, 478, 42, - 473, 42, 471, 475, 476, 480, 483, 474, 42, 42, - 484, 481, 482, 42, 42, 42, 42, 485, 42, 42, - 42, 42, 42, 42, 42, 486, 42, 487, 492, 493, - 42, 488, 491, 497, 42, 489, 494, 495, 42, 499, - 42, 490, 498, 42, 496, 42, 42, 42, 500, 42, - 501, 505, 42, 503, 42, 42, 504, 506, 42, 42, - 502, 42, 508, 42, 510, 42, 42, 42, 42, 42, - 507, 514, 42, 509, 42, 517, 518, 520, 519, 515, - - 511, 522, 512, 513, 516, 42, 42, 42, 42, 42, - 42, 521, 524, 523, 42, 527, 42, 42, 42, 42, - 528, 525, 42, 42, 42, 531, 42, 533, 535, 42, - 42, 42, 526, 530, 42, 537, 42, 42, 529, 534, - 536, 538, 532, 543, 541, 42, 42, 539, 42, 42, - 42, 540, 42, 42, 42, 544, 42, 42, 42, 42, - 542, 42, 545, 548, 546, 547, 554, 42, 42, 42, - 550, 555, 552, 551, 549, 553, 42, 42, 42, 556, - 42, 42, 42, 42, 560, 561, 42, 42, 42, 557, - 564, 559, 558, 565, 42, 42, 42, 42, 42, 42, - - 42, 42, 42, 566, 563, 42, 42, 42, 562, 39, - 39, 39, 39, 39, 41, 41, 44, 44, 52, 42, - 52, 52, 52, 54, 54, 136, 136, 136, 136, 136, - 144, 144, 144, 144, 144, 42, 42, 42, 42, 42, + 42, 355, 42, 42, 42, 42, 42, 42, 349, 351, + 352, 357, 360, 365, 359, 42, 362, 42, 356, 363, + 42, 42, 364, 367, 42, 361, 368, 374, 369, 370, + + 372, 371, 376, 373, 375, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, + 393, 394, 496, 380, 42, 381, 379, 377, 378, 382, + 383, 384, 385, 391, 389, 390, 386, 42, 42, 388, + 387, 393, 394, 42, 42, 392, 42, 42, 42, 395, + 42, 400, 42, 42, 396, 42, 397, 42, 398, 42, + 399, 402, 401, 42, 403, 404, 42, 42, 42, 42, + 405, 42, 407, 42, 406, 42, 415, 416, 347, 347, + 347, 347, 411, 413, 418, 408, 42, 414, 42, 42, + 409, 42, 417, 410, 412, 42, 42, 42, 42, 420, + + 42, 421, 422, 42, 42, 42, 42, 42, 424, 42, + 42, 42, 419, 430, 428, 431, 42, 42, 42, 423, + 426, 42, 42, 427, 429, 432, 436, 434, 435, 42, + 433, 42, 42, 42, 42, 437, 42, 42, 42, 42, + 439, 441, 443, 444, 445, 438, 42, 449, 42, 440, + 442, 447, 42, 42, 42, 42, 448, 42, 42, 42, + 42, 446, 450, 42, 42, 42, 454, 42, 42, 42, + 453, 451, 457, 459, 42, 460, 462, 452, 456, 42, + 42, 464, 42, 461, 458, 455, 42, 42, 463, 415, + 416, 467, 466, 42, 465, 415, 416, 42, 42, 42, + + 469, 470, 468, 42, 42, 42, 42, 42, 42, 474, + 42, 478, 479, 42, 42, 472, 481, 471, 42, 42, + 483, 42, 42, 476, 477, 484, 475, 473, 42, 486, + 482, 480, 42, 42, 42, 42, 42, 42, 485, 42, + 42, 487, 42, 42, 488, 493, 489, 494, 42, 42, + 42, 491, 492, 497, 42, 498, 490, 500, 42, 42, + 42, 495, 42, 502, 42, 499, 42, 501, 503, 42, + 42, 42, 42, 42, 42, 42, 510, 505, 504, 511, + 509, 506, 507, 515, 517, 42, 512, 513, 42, 508, + 42, 42, 516, 42, 514, 518, 42, 42, 42, 42, + + 42, 521, 523, 42, 42, 42, 42, 524, 526, 522, + 42, 42, 519, 42, 42, 528, 520, 42, 42, 42, + 42, 532, 525, 527, 535, 42, 42, 536, 538, 529, + 530, 534, 42, 533, 531, 537, 42, 42, 539, 540, + 543, 42, 42, 542, 541, 42, 42, 42, 545, 42, + 42, 42, 42, 42, 42, 546, 42, 549, 42, 551, + 553, 42, 555, 42, 548, 544, 42, 42, 552, 554, + 547, 42, 42, 556, 550, 42, 559, 561, 557, 42, + 42, 42, 562, 558, 42, 566, 42, 42, 42, 42, + 42, 560, 42, 42, 42, 563, 564, 565, 572, 42, + + 42, 42, 573, 42, 568, 570, 569, 42, 567, 571, + 574, 578, 42, 42, 42, 579, 575, 42, 42, 42, + 42, 582, 577, 576, 583, 42, 42, 42, 42, 42, + 42, 580, 42, 42, 42, 42, 581, 42, 42, 584, + 39, 39, 39, 39, 39, 41, 41, 44, 44, 52, + 42, 52, 52, 52, 54, 54, 137, 137, 137, 137, + 137, 145, 145, 145, 145, 145, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, + 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, - 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, - 42, 145, 42, 137, 251, 42, 42, 42, 42, 145, - 137, 42, 135, 42, 40, 567, 3, 567, 567, 567, - 567, 567, 567, 567, 567, 567, 567, 567, 567, 567, - 567, 567, 567, 567, 567, 567, 567, 567, 567, 567, - 567, 567, 567, 567, 567, 567, 567, 567, 567, 567, - 567, 567, 567, 567, 567, 567, 567, 567, 567, 567, - 567 + 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, + 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, + 42, 42, 146, 42, 138, 255, 42, 42, 42, 146, + 138, 42, 136, 42, 40, 585, 3, 585, 585, 585, + 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, + 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, + + 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, + 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, + 585 } ; -static yyconst short int yy_chk[1282] = +static yyconst short int yy_chk[1322] = { 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, @@ -732,141 +755,146 @@ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 9, 10, 10, 10, 10, 24, 9, 9, 9, 9, 11, 11, 11, 11, 11, 12, - 576, 574, 64, 24, 12, 13, 13, 13, 13, 13, - 13, 14, 14, 14, 14, 14, 14, 16, 64, 17, + 393, 393, 65, 24, 12, 13, 13, 13, 13, 13, + 13, 14, 14, 14, 14, 14, 14, 16, 65, 17, 31, 19, 18, 16, 16, 16, 16, 19, 17, 19, - 31, 21, 18, 36, 62, 17, 18, 17, 13, 17, + 31, 23, 18, 62, 70, 17, 18, 17, 13, 17, - 19, 20, 17, 36, 18, 38, 23, 20, 48, 21, - 87, 20, 21, 48, 28, 38, 23, 20, 62, 21, - 20, 22, 23, 65, 28, 56, 58, 22, 87, 22, - 22, 65, 27, 28, 56, 58, 26, 22, 27, 28, - 30, 22, 26, 22, 25, 25, 25, 25, 25, 61, - 26, 27, 33, 30, 35, 26, 25, 27, 33, 26, - 35, 61, 30, 60, 30, 33, 25, 29, 37, 37, - 57, 33, 59, 35, 33, 66, 60, 29, 566, 29, - 60, 33, 564, 29, 57, 29, 57, 29, 37, 29, - 32, 66, 59, 66, 32, 45, 45, 45, 45, 55, - - 55, 55, 55, 32, 32, 77, 32, 32, 32, 67, - 32, 46, 46, 46, 46, 46, 32, 73, 32, 32, - 70, 32, 34, 69, 77, 71, 34, 47, 47, 47, - 47, 47, 47, 67, 71, 34, 34, 75, 34, 69, - 34, 73, 34, 81, 34, 70, 76, 82, 34, 49, - 49, 49, 49, 49, 75, 88, 82, 49, 563, 561, - 76, 88, 81, 49, 50, 50, 50, 50, 50, 50, - 51, 51, 51, 51, 51, 74, 78, 51, 51, 68, - 51, 51, 51, 51, 51, 51, 78, 68, 80, 84, - 68, 74, 79, 83, 83, 83, 83, 83, 74, 68, - - 78, 85, 79, 86, 89, 90, 84, 91, 94, 99, - 86, 96, 80, 92, 94, 95, 91, 89, 97, 99, - 103, 90, 105, 85, 85, 85, 98, 85, 97, 92, - 94, 95, 96, 94, 100, 101, 98, 102, 104, 103, - 100, 106, 97, 107, 101, 108, 105, 111, 109, 110, - 98, 102, 112, 108, 113, 118, 111, 107, 109, 114, - 104, 108, 112, 115, 113, 110, 116, 117, 120, 106, - 115, 111, 109, 108, 110, 121, 112, 118, 114, 123, - 116, 117, 120, 122, 124, 125, 126, 559, 128, 117, - 558, 130, 127, 120, 124, 121, 126, 122, 128, 129, - - 123, 127, 127, 133, 129, 130, 131, 130, 124, 125, - 126, 127, 131, 132, 127, 132, 134, 149, 148, 127, - 139, 139, 139, 139, 148, 133, 154, 151, 139, 152, - 148, 155, 159, 158, 139, 259, 149, 151, 134, 155, - 154, 156, 158, 259, 134, 141, 141, 141, 141, 141, - 160, 152, 161, 141, 163, 159, 160, 156, 162, 141, - 142, 142, 168, 142, 142, 142, 142, 142, 161, 164, - 163, 165, 162, 169, 167, 170, 171, 173, 165, 164, - 172, 174, 175, 164, 167, 168, 172, 177, 176, 179, - 557, 552, 175, 183, 177, 170, 167, 169, 176, 175, - - 174, 178, 171, 174, 180, 173, 181, 182, 184, 179, - 178, 185, 183, 186, 180, 187, 181, 182, 184, 188, - 189, 201, 186, 191, 192, 193, 185, 204, 194, 205, - 210, 182, 208, 217, 192, 188, 209, 187, 215, 191, - 210, 352, 201, 193, 194, 189, 211, 223, 352, 215, - 221, 204, 217, 205, 207, 207, 207, 207, 208, 220, - 209, 207, 207, 216, 207, 207, 207, 207, 207, 207, - 211, 223, 221, 216, 224, 225, 220, 227, 226, 229, - 230, 228, 234, 220, 237, 240, 241, 225, 226, 229, - 224, 228, 242, 246, 237, 240, 243, 227, 244, 228, - - 241, 234, 243, 249, 245, 250, 230, 244, 246, 242, - 245, 247, 252, 252, 252, 252, 247, 263, 268, 544, - 252, 538, 249, 263, 268, 257, 252, 253, 253, 250, - 253, 253, 253, 253, 254, 254, 254, 254, 255, 255, - 255, 255, 255, 256, 256, 256, 256, 256, 257, 258, - 260, 262, 265, 266, 267, 269, 271, 270, 272, 274, - 265, 280, 273, 282, 276, 281, 275, 258, 260, 262, - 267, 270, 275, 269, 276, 272, 283, 266, 273, 277, - 286, 274, 288, 290, 271, 280, 282, 277, 282, 281, - 291, 287, 288, 292, 293, 290, 286, 287, 296, 294, - - 295, 283, 299, 300, 301, 302, 303, 305, 307, 310, - 306, 338, 291, 293, 294, 292, 295, 296, 301, 300, - 306, 299, 311, 310, 313, 338, 314, 307, 315, 302, - 311, 318, 305, 303, 319, 313, 314, 321, 322, 315, - 323, 318, 319, 325, 322, 331, 328, 321, 329, 330, - 333, 325, 335, 344, 337, 330, 323, 328, 343, 329, - 346, 353, 344, 331, 343, 337, 340, 340, 340, 340, - 347, 350, 333, 348, 349, 351, 335, 337, 347, 348, - 349, 353, 354, 346, 355, 351, 356, 357, 359, 362, - 364, 363, 367, 350, 355, 357, 359, 365, 366, 369, - - 370, 371, 354, 362, 356, 363, 372, 365, 364, 374, - 367, 375, 376, 378, 366, 379, 372, 381, 370, 375, - 377, 371, 376, 369, 380, 381, 377, 374, 382, 379, - 383, 384, 385, 386, 380, 390, 387, 389, 378, 396, - 394, 392, 382, 391, 386, 397, 398, 396, 385, 383, - 389, 392, 391, 399, 397, 384, 387, 400, 398, 390, - 394, 401, 402, 400, 404, 405, 407, 399, 408, 409, - 411, 412, 413, 532, 416, 420, 415, 421, 404, 409, - 402, 415, 415, 420, 407, 401, 424, 426, 432, 405, - 412, 413, 428, 411, 421, 425, 424, 408, 416, 431, - - 428, 425, 433, 435, 439, 436, 437, 440, 444, 451, - 432, 426, 447, 444, 439, 450, 453, 452, 440, 454, - 433, 456, 431, 436, 437, 447, 452, 435, 457, 460, - 453, 450, 451, 461, 462, 526, 463, 454, 464, 466, - 467, 468, 469, 470, 472, 456, 475, 457, 464, 466, - 473, 460, 463, 470, 477, 461, 467, 468, 474, 473, - 479, 462, 472, 478, 469, 480, 482, 481, 474, 484, - 475, 480, 485, 478, 483, 487, 479, 481, 488, 489, - 477, 490, 483, 492, 485, 494, 493, 500, 502, 503, - 482, 490, 504, 484, 505, 494, 500, 503, 502, 492, - - 487, 505, 488, 489, 493, 507, 508, 509, 511, 514, - 515, 504, 508, 507, 516, 514, 517, 519, 520, 521, - 515, 509, 523, 522, 524, 519, 527, 521, 523, 525, - 528, 529, 511, 517, 530, 525, 531, 533, 516, 522, - 524, 527, 520, 533, 530, 534, 535, 528, 536, 537, - 540, 529, 541, 539, 542, 534, 543, 547, 546, 545, - 531, 548, 535, 539, 536, 537, 546, 549, 550, 551, - 541, 547, 543, 542, 540, 545, 553, 554, 555, 548, - 556, 565, 560, 562, 553, 554, 518, 513, 512, 549, - 560, 551, 550, 562, 510, 506, 501, 499, 498, 497, - - 496, 495, 491, 565, 556, 486, 476, 471, 555, 568, - 568, 568, 568, 568, 569, 569, 570, 570, 571, 465, - 571, 571, 571, 572, 572, 573, 573, 573, 573, 573, - 575, 575, 575, 575, 575, 459, 458, 455, 449, 448, - 446, 445, 443, 442, 441, 438, 434, 430, 429, 427, - 423, 422, 419, 418, 417, 414, 410, 406, 403, 395, - 393, 388, 373, 368, 361, 360, 358, 345, 342, 341, - 339, 336, 334, 332, 327, 326, 324, 320, 317, 316, - 312, 309, 304, 298, 297, 289, 285, 284, 279, 278, - 264, 261, 248, 239, 238, 236, 235, 233, 232, 231, - - 222, 219, 218, 214, 213, 212, 206, 203, 202, 200, - 199, 198, 197, 196, 195, 190, 166, 157, 153, 150, - 147, 144, 140, 136, 135, 119, 93, 72, 63, 53, - 43, 41, 39, 8, 7, 3, 567, 567, 567, 567, - 567, 567, 567, 567, 567, 567, 567, 567, 567, 567, - 567, 567, 567, 567, 567, 567, 567, 567, 567, 567, - 567, 567, 567, 567, 567, 567, 567, 567, 567, 567, - 567, 567, 567, 567, 567, 567, 567, 567, 567, 567, - 567 + 19, 23, 17, 20, 18, 21, 26, 23, 36, 20, + 70, 18, 26, 20, 38, 37, 37, 62, 36, 20, + 26, 68, 20, 21, 38, 26, 21, 28, 59, 26, + 27, 87, 56, 21, 22, 37, 27, 28, 87, 48, + 22, 56, 22, 22, 48, 68, 28, 35, 59, 27, + 22, 30, 28, 35, 22, 27, 22, 25, 25, 25, + 25, 25, 61, 58, 30, 33, 35, 57, 594, 25, + 67, 33, 58, 30, 61, 30, 60, 66, 33, 25, + 29, 57, 72, 57, 33, 66, 67, 33, 67, 60, + 29, 72, 29, 60, 33, 80, 29, 71, 29, 116, + + 29, 76, 29, 32, 64, 80, 116, 32, 45, 45, + 45, 45, 55, 55, 55, 55, 32, 32, 76, 32, + 32, 32, 71, 32, 46, 46, 46, 46, 46, 32, + 64, 32, 32, 77, 32, 34, 74, 78, 592, 34, + 47, 47, 47, 47, 47, 47, 90, 77, 34, 34, + 81, 34, 75, 34, 82, 34, 78, 34, 83, 90, + 74, 34, 49, 49, 49, 49, 49, 83, 75, 584, + 49, 85, 582, 82, 81, 75, 49, 50, 50, 50, + 50, 50, 50, 51, 51, 51, 51, 51, 85, 79, + 51, 51, 69, 51, 51, 51, 51, 51, 51, 79, + + 69, 86, 88, 69, 84, 84, 84, 84, 84, 89, + 91, 94, 69, 79, 93, 89, 95, 96, 97, 92, + 88, 98, 95, 86, 86, 86, 91, 86, 92, 101, + 93, 98, 99, 96, 94, 101, 100, 103, 95, 97, + 102, 95, 99, 104, 105, 98, 100, 106, 107, 102, + 108, 103, 109, 110, 111, 115, 99, 114, 117, 581, + 109, 119, 104, 110, 108, 113, 105, 114, 109, 112, + 111, 106, 117, 118, 115, 113, 107, 110, 112, 111, + 109, 112, 121, 119, 122, 123, 126, 118, 124, 113, + 125, 127, 130, 112, 150, 118, 121, 130, 129, 123, + + 125, 127, 128, 131, 122, 134, 135, 121, 129, 124, + 126, 128, 128, 150, 125, 127, 132, 131, 133, 131, + 133, 128, 132, 155, 128, 152, 158, 134, 135, 128, + 140, 140, 140, 140, 135, 152, 153, 155, 140, 163, + 164, 165, 158, 156, 140, 142, 142, 142, 142, 142, + 149, 156, 161, 142, 164, 163, 149, 165, 153, 142, + 143, 143, 149, 143, 143, 143, 143, 143, 157, 160, + 162, 166, 167, 169, 157, 161, 162, 170, 160, 167, + 171, 166, 172, 169, 173, 166, 174, 175, 177, 176, + 179, 178, 174, 181, 180, 169, 182, 179, 177, 183, + + 170, 178, 172, 180, 171, 177, 182, 184, 176, 183, + 173, 176, 186, 181, 185, 175, 188, 184, 189, 187, + 190, 191, 186, 193, 204, 188, 194, 195, 197, 207, + 196, 184, 208, 185, 187, 211, 190, 195, 212, 213, + 189, 218, 194, 263, 197, 204, 191, 193, 196, 213, + 214, 263, 218, 207, 227, 225, 208, 210, 210, 210, + 210, 211, 212, 219, 210, 210, 220, 210, 210, 210, + 210, 210, 210, 219, 214, 221, 224, 225, 227, 228, + 229, 230, 231, 234, 220, 251, 232, 233, 238, 241, + 251, 230, 229, 224, 221, 228, 232, 233, 244, 241, + + 224, 245, 231, 246, 232, 247, 249, 238, 244, 234, + 248, 247, 249, 250, 253, 245, 254, 281, 268, 248, + 246, 256, 256, 256, 256, 267, 273, 281, 250, 256, + 360, 267, 273, 253, 268, 256, 261, 360, 257, 257, + 254, 257, 257, 257, 257, 258, 258, 258, 258, 259, + 259, 259, 259, 259, 260, 260, 260, 260, 260, 261, + 262, 264, 266, 270, 271, 272, 274, 276, 275, 277, + 279, 270, 285, 278, 286, 288, 287, 280, 262, 264, + 266, 272, 275, 280, 274, 282, 277, 291, 271, 278, + 295, 292, 279, 282, 293, 276, 285, 292, 286, 287, + + 288, 287, 295, 291, 293, 296, 297, 298, 299, 300, + 301, 304, 308, 309, 311, 305, 313, 459, 307, 316, + 394, 394, 459, 299, 312, 300, 298, 296, 297, 301, + 304, 305, 307, 316, 312, 313, 308, 317, 319, 311, + 309, 318, 318, 326, 320, 317, 321, 322, 330, 319, + 325, 326, 328, 318, 320, 329, 321, 332, 322, 335, + 325, 329, 328, 336, 330, 332, 337, 338, 340, 342, + 335, 344, 337, 345, 336, 351, 346, 346, 347, 347, + 347, 347, 344, 345, 351, 338, 350, 345, 346, 353, + 340, 355, 350, 342, 344, 356, 357, 358, 359, 355, + + 361, 356, 357, 362, 363, 365, 364, 367, 359, 372, + 374, 370, 353, 365, 363, 367, 371, 375, 373, 358, + 361, 377, 378, 362, 364, 370, 374, 372, 373, 379, + 371, 380, 382, 384, 383, 375, 386, 387, 385, 389, + 378, 380, 383, 384, 385, 377, 388, 389, 390, 379, + 382, 387, 391, 392, 395, 396, 388, 397, 398, 400, + 401, 386, 390, 405, 402, 403, 396, 412, 407, 409, + 395, 391, 400, 402, 413, 403, 407, 392, 398, 408, + 410, 409, 414, 405, 401, 397, 411, 418, 408, 415, + 415, 412, 411, 419, 410, 416, 416, 421, 422, 423, + + 414, 418, 413, 425, 426, 427, 429, 430, 434, 423, + 438, 429, 429, 435, 440, 421, 434, 419, 445, 439, + 438, 442, 446, 426, 427, 439, 425, 422, 447, 442, + 435, 430, 449, 450, 451, 453, 454, 455, 440, 465, + 462, 445, 466, 468, 446, 453, 447, 454, 467, 469, + 470, 450, 451, 462, 472, 465, 449, 467, 473, 476, + 477, 455, 478, 469, 479, 466, 480, 468, 470, 482, + 483, 484, 485, 486, 488, 489, 480, 473, 472, 482, + 479, 476, 477, 486, 489, 490, 483, 484, 491, 478, + 493, 494, 488, 496, 485, 490, 497, 498, 499, 502, + + 500, 494, 497, 503, 505, 579, 506, 498, 500, 496, + 507, 508, 491, 511, 512, 503, 493, 510, 518, 522, + 521, 508, 499, 502, 512, 520, 527, 518, 521, 505, + 506, 511, 523, 510, 507, 520, 525, 526, 522, 523, + 527, 529, 532, 526, 525, 533, 534, 535, 532, 537, + 538, 539, 540, 542, 541, 533, 543, 537, 545, 539, + 541, 546, 543, 547, 535, 529, 548, 549, 540, 542, + 534, 551, 552, 545, 538, 557, 548, 551, 546, 553, + 554, 555, 552, 547, 558, 557, 559, 560, 565, 561, + 564, 549, 566, 563, 567, 553, 554, 555, 564, 568, + + 569, 573, 565, 571, 559, 561, 560, 572, 558, 563, + 566, 571, 574, 578, 580, 572, 567, 583, 577, 576, + 575, 578, 569, 568, 580, 570, 562, 556, 550, 544, + 536, 573, 531, 530, 528, 524, 574, 519, 517, 583, + 586, 586, 586, 586, 586, 587, 587, 588, 588, 589, + 516, 589, 589, 589, 590, 590, 591, 591, 591, 591, + 591, 593, 593, 593, 593, 593, 515, 514, 513, 509, + 504, 501, 495, 492, 487, 481, 475, 474, 471, 464, + 463, 461, 460, 458, 457, 456, 452, 448, 444, 443, + 441, 437, 436, 433, 432, 431, 428, 424, 420, 417, + + 406, 404, 399, 381, 376, 369, 368, 366, 354, 352, + 349, 348, 343, 341, 339, 334, 333, 331, 327, 324, + 323, 315, 310, 306, 303, 302, 294, 290, 289, 284, + 283, 269, 265, 252, 243, 242, 240, 239, 237, 236, + 235, 226, 223, 222, 217, 216, 215, 209, 206, 205, + 203, 202, 201, 200, 199, 198, 192, 168, 159, 154, + 151, 148, 145, 141, 137, 136, 120, 73, 63, 53, + 43, 41, 39, 8, 7, 3, 585, 585, 585, 585, + 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, + 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, + + 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, + 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, + 585 } ; static yy_state_type yy_state_buf[YY_BUF_SIZE + 2], *yy_state_ptr; @@ -883,7 +911,7 @@ #define YY_MORE_ADJ 0 #define YY_RESTORE_YY_MORE_OFFSET char *yytext; -#line 1 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 1 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" #define INITIAL 0 /*===-- Lexer.l - Scanner for llvm assembly files --------------*- C++ -*--===// // @@ -898,7 +926,7 @@ // //===----------------------------------------------------------------------===*/ #define YY_NEVER_INTERACTIVE 1 -#line 28 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 28 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" #include "ParserInternals.h" #include "llvm/Module.h" #include "llvm/Support/MathExtras.h" @@ -1020,7 +1048,8 @@ /* HexIntConstant - Hexadecimal constant generated by the CFE to avoid forcing * it to deal with 64 bit numbers. */ -#line 1024 "Lexer.cpp" +/* WSNL - shorthand for newline followed by whitespace */ +#line 1053 "Lexer.cpp" /* Macros after this point can all be overridden by user definitions in * section 1. @@ -1168,13 +1197,13 @@ YY_DECL { register yy_state_type yy_current_state; - register char *yy_cp, *yy_bp; + register char *yy_cp = NULL, *yy_bp = NULL; register int yy_act; -#line 180 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 182 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" -#line 1178 "Lexer.cpp" +#line 1207 "Lexer.cpp" if ( yy_init ) { @@ -1222,14 +1251,14 @@ while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) { yy_current_state = (int) yy_def[yy_current_state]; - if ( yy_current_state >= 568 ) + if ( yy_current_state >= 586 ) yy_c = yy_meta[(unsigned int) yy_c]; } yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c]; *yy_state_ptr++ = yy_current_state; ++yy_cp; } - while ( yy_current_state != 567 ); + while ( yy_current_state != 585 ); yy_find_action: yy_current_state = *--yy_state_ptr; @@ -1267,277 +1296,315 @@ { /* beginning of action switch */ case 1: YY_RULE_SETUP -#line 182 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 184 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { /* Ignore comments for now */ } YY_BREAK case 2: YY_RULE_SETUP -#line 184 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 186 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return BEGINTOK; } YY_BREAK case 3: YY_RULE_SETUP -#line 185 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 187 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return ENDTOK; } YY_BREAK case 4: YY_RULE_SETUP -#line 186 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 188 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return TRUETOK; } YY_BREAK case 5: YY_RULE_SETUP -#line 187 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 189 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return FALSETOK; } YY_BREAK case 6: YY_RULE_SETUP -#line 188 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 190 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return DECLARE; } YY_BREAK case 7: YY_RULE_SETUP -#line 189 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 191 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return DEFINE; } YY_BREAK case 8: YY_RULE_SETUP -#line 190 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 192 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return GLOBAL; } YY_BREAK case 9: YY_RULE_SETUP -#line 191 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 193 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return CONSTANT; } YY_BREAK case 10: YY_RULE_SETUP -#line 192 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 194 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return INTERNAL; } YY_BREAK case 11: YY_RULE_SETUP -#line 193 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 195 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return LINKONCE; } YY_BREAK case 12: YY_RULE_SETUP -#line 194 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 196 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return WEAK; } YY_BREAK case 13: YY_RULE_SETUP -#line 195 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 197 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return APPENDING; } YY_BREAK case 14: YY_RULE_SETUP -#line 196 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 198 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return DLLIMPORT; } YY_BREAK case 15: YY_RULE_SETUP -#line 197 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 199 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return DLLEXPORT; } YY_BREAK case 16: YY_RULE_SETUP -#line 198 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 200 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return HIDDEN; } YY_BREAK case 17: YY_RULE_SETUP -#line 199 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 201 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return PROTECTED; } YY_BREAK case 18: YY_RULE_SETUP -#line 200 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 202 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return EXTERN_WEAK; } YY_BREAK case 19: YY_RULE_SETUP -#line 201 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 203 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return EXTERNAL; } YY_BREAK case 20: YY_RULE_SETUP -#line 202 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 204 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return THREAD_LOCAL; } YY_BREAK case 21: YY_RULE_SETUP -#line 203 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 205 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return ZEROINITIALIZER; } YY_BREAK case 22: YY_RULE_SETUP -#line 204 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 206 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return DOTDOTDOT; } YY_BREAK case 23: YY_RULE_SETUP -#line 205 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 207 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return UNDEF; } YY_BREAK case 24: YY_RULE_SETUP -#line 206 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 208 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return NULL_TOK; } YY_BREAK case 25: YY_RULE_SETUP -#line 207 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 209 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return TO; } YY_BREAK case 26: YY_RULE_SETUP -#line 208 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 210 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return TAIL; } YY_BREAK case 27: YY_RULE_SETUP -#line 209 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 211 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return TARGET; } YY_BREAK case 28: YY_RULE_SETUP -#line 210 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 212 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return TRIPLE; } YY_BREAK case 29: YY_RULE_SETUP -#line 211 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 213 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return DEPLIBS; } YY_BREAK case 30: YY_RULE_SETUP -#line 212 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 214 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return DATALAYOUT; } YY_BREAK case 31: YY_RULE_SETUP -#line 213 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 215 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return VOLATILE; } YY_BREAK case 32: YY_RULE_SETUP -#line 214 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 216 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return ALIGN; } YY_BREAK case 33: YY_RULE_SETUP -#line 215 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 217 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return SECTION; } YY_BREAK case 34: YY_RULE_SETUP -#line 216 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 218 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return ALIAS; } YY_BREAK case 35: YY_RULE_SETUP -#line 217 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 219 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return MODULE; } YY_BREAK case 36: YY_RULE_SETUP -#line 218 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 220 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return ASM_TOK; } YY_BREAK case 37: YY_RULE_SETUP -#line 219 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 221 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return SIDEEFFECT; } YY_BREAK case 38: YY_RULE_SETUP -#line 221 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 223 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return CC_TOK; } YY_BREAK case 39: YY_RULE_SETUP -#line 222 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 224 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return CCC_TOK; } YY_BREAK case 40: YY_RULE_SETUP -#line 223 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 225 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return FASTCC_TOK; } YY_BREAK case 41: YY_RULE_SETUP -#line 224 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 226 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return COLDCC_TOK; } YY_BREAK case 42: YY_RULE_SETUP -#line 225 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 227 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return X86_STDCALLCC_TOK; } YY_BREAK case 43: YY_RULE_SETUP -#line 226 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 228 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return X86_FASTCALLCC_TOK; } YY_BREAK case 44: YY_RULE_SETUP -#line 228 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" -{ return INREG; } +#line 230 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +{ return SIGNEXT; } YY_BREAK case 45: YY_RULE_SETUP -#line 229 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" -{ return SRET; } +#line 231 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +{ return ZEROEXT; } YY_BREAK case 46: YY_RULE_SETUP -#line 230 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" -{ return NOUNWIND; } +#line 232 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +{ return INREG; } YY_BREAK case 47: YY_RULE_SETUP -#line 231 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" -{ return NORETURN; } +#line 233 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +{ return SRET; } YY_BREAK case 48: YY_RULE_SETUP -#line 232 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" -{ return NOALIAS; } +#line 234 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +{ return NOUNWIND; } YY_BREAK case 49: YY_RULE_SETUP -#line 234 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TY(Type::VoidTy, VOID); } +#line 235 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +{ return NORETURN; } YY_BREAK case 50: YY_RULE_SETUP -#line 235 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TY(Type::FloatTy, FLOAT); } +#line 236 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +{ return NOALIAS; } YY_BREAK case 51: YY_RULE_SETUP -#line 236 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TY(Type::DoubleTy,DOUBLE);} +#line 237 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +{ return BYVAL; } YY_BREAK case 52: YY_RULE_SETUP -#line 237 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" -{ RET_TY(Type::LabelTy, LABEL); } +#line 238 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +{ return NEST; } YY_BREAK case 53: +*yy_cp = yy_hold_char; /* undo effects of setting up yytext */ +yy_c_buf_p = yy_cp -= 1; +YY_DO_BEFORE_ACTION; /* set up yytext again */ +YY_RULE_SETUP +#line 239 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +{ // For auto-upgrade only, drop in LLVM 3.0 + return SIGNEXT; } + YY_BREAK +case 54: +*yy_cp = yy_hold_char; /* undo effects of setting up yytext */ +yy_c_buf_p = yy_cp -= 1; +YY_DO_BEFORE_ACTION; /* set up yytext again */ +YY_RULE_SETUP +#line 241 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +{ // For auto-upgrade only, drop in LLVM 3.0 + return ZEROEXT; } + YY_BREAK +case 55: +YY_RULE_SETUP +#line 244 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +{ RET_TY(Type::VoidTy, VOID); } + YY_BREAK +case 56: YY_RULE_SETUP -#line 238 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 245 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +{ RET_TY(Type::FloatTy, FLOAT); } + YY_BREAK +case 57: +YY_RULE_SETUP +#line 246 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +{ RET_TY(Type::DoubleTy,DOUBLE);} + YY_BREAK +case 58: +YY_RULE_SETUP +#line 247 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +{ RET_TY(Type::LabelTy, LABEL); } + YY_BREAK +case 59: +YY_RULE_SETUP +#line 248 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return TYPE; } YY_BREAK -case 54: +case 60: YY_RULE_SETUP -#line 239 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 249 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return OPAQUE; } YY_BREAK -case 55: +case 61: YY_RULE_SETUP -#line 240 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 250 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { uint64_t NumBits = atoull(yytext+1); if (NumBits < IntegerType::MIN_INT_BITS || NumBits > IntegerType::MAX_INT_BITS) @@ -1546,374 +1613,374 @@ RET_TY(Ty, INTTYPE); } YY_BREAK -case 56: +case 62: YY_RULE_SETUP -#line 248 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 258 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { RET_TOK(BinaryOpVal, Add, ADD); } YY_BREAK -case 57: +case 63: YY_RULE_SETUP -#line 249 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 259 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { RET_TOK(BinaryOpVal, Sub, SUB); } YY_BREAK -case 58: +case 64: YY_RULE_SETUP -#line 250 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 260 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { RET_TOK(BinaryOpVal, Mul, MUL); } YY_BREAK -case 59: +case 65: YY_RULE_SETUP -#line 251 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 261 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { RET_TOK(BinaryOpVal, UDiv, UDIV); } YY_BREAK -case 60: +case 66: YY_RULE_SETUP -#line 252 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 262 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { RET_TOK(BinaryOpVal, SDiv, SDIV); } YY_BREAK -case 61: +case 67: YY_RULE_SETUP -#line 253 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 263 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { RET_TOK(BinaryOpVal, FDiv, FDIV); } YY_BREAK -case 62: +case 68: YY_RULE_SETUP -#line 254 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 264 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { RET_TOK(BinaryOpVal, URem, UREM); } YY_BREAK -case 63: +case 69: YY_RULE_SETUP -#line 255 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 265 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { RET_TOK(BinaryOpVal, SRem, SREM); } YY_BREAK -case 64: +case 70: YY_RULE_SETUP -#line 256 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 266 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { RET_TOK(BinaryOpVal, FRem, FREM); } YY_BREAK -case 65: +case 71: YY_RULE_SETUP -#line 257 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 267 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { RET_TOK(BinaryOpVal, Shl, SHL); } YY_BREAK -case 66: +case 72: YY_RULE_SETUP -#line 258 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 268 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { RET_TOK(BinaryOpVal, LShr, LSHR); } YY_BREAK -case 67: +case 73: YY_RULE_SETUP -#line 259 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 269 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { RET_TOK(BinaryOpVal, AShr, ASHR); } YY_BREAK -case 68: +case 74: YY_RULE_SETUP -#line 260 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 270 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { RET_TOK(BinaryOpVal, And, AND); } YY_BREAK -case 69: +case 75: YY_RULE_SETUP -#line 261 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 271 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { RET_TOK(BinaryOpVal, Or , OR ); } YY_BREAK -case 70: +case 76: YY_RULE_SETUP -#line 262 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 272 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { RET_TOK(BinaryOpVal, Xor, XOR); } YY_BREAK -case 71: +case 77: YY_RULE_SETUP -#line 263 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 273 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { RET_TOK(OtherOpVal, ICmp, ICMP); } YY_BREAK -case 72: +case 78: YY_RULE_SETUP -#line 264 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 274 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { RET_TOK(OtherOpVal, FCmp, FCMP); } YY_BREAK -case 73: +case 79: YY_RULE_SETUP -#line 266 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 276 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return EQ; } YY_BREAK -case 74: +case 80: YY_RULE_SETUP -#line 267 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 277 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return NE; } YY_BREAK -case 75: +case 81: YY_RULE_SETUP -#line 268 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 278 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return SLT; } YY_BREAK -case 76: +case 82: YY_RULE_SETUP -#line 269 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 279 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return SGT; } YY_BREAK -case 77: +case 83: YY_RULE_SETUP -#line 270 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 280 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return SLE; } YY_BREAK -case 78: +case 84: YY_RULE_SETUP -#line 271 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 281 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return SGE; } YY_BREAK -case 79: +case 85: YY_RULE_SETUP -#line 272 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 282 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return ULT; } YY_BREAK -case 80: +case 86: YY_RULE_SETUP -#line 273 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 283 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return UGT; } YY_BREAK -case 81: +case 87: YY_RULE_SETUP -#line 274 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 284 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return ULE; } YY_BREAK -case 82: +case 88: YY_RULE_SETUP -#line 275 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 285 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return UGE; } YY_BREAK -case 83: +case 89: YY_RULE_SETUP -#line 276 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 286 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return OEQ; } YY_BREAK -case 84: +case 90: YY_RULE_SETUP -#line 277 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 287 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return ONE; } YY_BREAK -case 85: +case 91: YY_RULE_SETUP -#line 278 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 288 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return OLT; } YY_BREAK -case 86: +case 92: YY_RULE_SETUP -#line 279 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 289 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return OGT; } YY_BREAK -case 87: +case 93: YY_RULE_SETUP -#line 280 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 290 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return OLE; } YY_BREAK -case 88: +case 94: YY_RULE_SETUP -#line 281 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 291 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return OGE; } YY_BREAK -case 89: +case 95: YY_RULE_SETUP -#line 282 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 292 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return ORD; } YY_BREAK -case 90: +case 96: YY_RULE_SETUP -#line 283 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 293 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return UNO; } YY_BREAK -case 91: +case 97: YY_RULE_SETUP -#line 284 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 294 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return UEQ; } YY_BREAK -case 92: +case 98: YY_RULE_SETUP -#line 285 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 295 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return UNE; } YY_BREAK -case 93: +case 99: YY_RULE_SETUP -#line 287 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 297 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { RET_TOK(OtherOpVal, PHI, PHI_TOK); } YY_BREAK -case 94: +case 100: YY_RULE_SETUP -#line 288 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 298 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { RET_TOK(OtherOpVal, Call, CALL); } YY_BREAK -case 95: +case 101: YY_RULE_SETUP -#line 289 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 299 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { RET_TOK(CastOpVal, Trunc, TRUNC); } YY_BREAK -case 96: +case 102: YY_RULE_SETUP -#line 290 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 300 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { RET_TOK(CastOpVal, ZExt, ZEXT); } YY_BREAK -case 97: +case 103: YY_RULE_SETUP -#line 291 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 301 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { RET_TOK(CastOpVal, SExt, SEXT); } YY_BREAK -case 98: +case 104: YY_RULE_SETUP -#line 292 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 302 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { RET_TOK(CastOpVal, FPTrunc, FPTRUNC); } YY_BREAK -case 99: +case 105: YY_RULE_SETUP -#line 293 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 303 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { RET_TOK(CastOpVal, FPExt, FPEXT); } YY_BREAK -case 100: +case 106: YY_RULE_SETUP -#line 294 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 304 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { RET_TOK(CastOpVal, UIToFP, UITOFP); } YY_BREAK -case 101: +case 107: YY_RULE_SETUP -#line 295 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 305 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { RET_TOK(CastOpVal, SIToFP, SITOFP); } YY_BREAK -case 102: +case 108: YY_RULE_SETUP -#line 296 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 306 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { RET_TOK(CastOpVal, FPToUI, FPTOUI); } YY_BREAK -case 103: +case 109: YY_RULE_SETUP -#line 297 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 307 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { RET_TOK(CastOpVal, FPToSI, FPTOSI); } YY_BREAK -case 104: +case 110: YY_RULE_SETUP -#line 298 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 308 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { RET_TOK(CastOpVal, IntToPtr, INTTOPTR); } YY_BREAK -case 105: +case 111: YY_RULE_SETUP -#line 299 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 309 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { RET_TOK(CastOpVal, PtrToInt, PTRTOINT); } YY_BREAK -case 106: +case 112: YY_RULE_SETUP -#line 300 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 310 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { RET_TOK(CastOpVal, BitCast, BITCAST); } YY_BREAK -case 107: +case 113: YY_RULE_SETUP -#line 301 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 311 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { RET_TOK(OtherOpVal, Select, SELECT); } YY_BREAK -case 108: +case 114: YY_RULE_SETUP -#line 302 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 312 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { RET_TOK(OtherOpVal, VAArg , VAARG); } YY_BREAK -case 109: +case 115: YY_RULE_SETUP -#line 303 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 313 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { RET_TOK(TermOpVal, Ret, RET); } YY_BREAK -case 110: +case 116: YY_RULE_SETUP -#line 304 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 314 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { RET_TOK(TermOpVal, Br, BR); } YY_BREAK -case 111: +case 117: YY_RULE_SETUP -#line 305 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 315 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { RET_TOK(TermOpVal, Switch, SWITCH); } YY_BREAK -case 112: +case 118: YY_RULE_SETUP -#line 306 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 316 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { RET_TOK(TermOpVal, Invoke, INVOKE); } YY_BREAK -case 113: +case 119: YY_RULE_SETUP -#line 307 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 317 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { RET_TOK(TermOpVal, Unwind, UNWIND); } YY_BREAK -case 114: +case 120: YY_RULE_SETUP -#line 308 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 318 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { RET_TOK(TermOpVal, Unreachable, UNREACHABLE); } YY_BREAK -case 115: +case 121: YY_RULE_SETUP -#line 310 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 320 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { RET_TOK(MemOpVal, Malloc, MALLOC); } YY_BREAK -case 116: +case 122: YY_RULE_SETUP -#line 311 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 321 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { RET_TOK(MemOpVal, Alloca, ALLOCA); } YY_BREAK -case 117: +case 123: YY_RULE_SETUP -#line 312 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 322 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { RET_TOK(MemOpVal, Free, FREE); } YY_BREAK -case 118: +case 124: YY_RULE_SETUP -#line 313 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 323 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { RET_TOK(MemOpVal, Load, LOAD); } YY_BREAK -case 119: +case 125: YY_RULE_SETUP -#line 314 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 324 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { RET_TOK(MemOpVal, Store, STORE); } YY_BREAK -case 120: +case 126: YY_RULE_SETUP -#line 315 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 325 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { RET_TOK(MemOpVal, GetElementPtr, GETELEMENTPTR); } YY_BREAK -case 121: +case 127: YY_RULE_SETUP -#line 317 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 327 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { RET_TOK(OtherOpVal, ExtractElement, EXTRACTELEMENT); } YY_BREAK -case 122: +case 128: YY_RULE_SETUP -#line 318 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 328 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { RET_TOK(OtherOpVal, InsertElement, INSERTELEMENT); } YY_BREAK -case 123: +case 129: YY_RULE_SETUP -#line 319 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 329 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { RET_TOK(OtherOpVal, ShuffleVector, SHUFFLEVECTOR); } YY_BREAK -case 124: +case 130: YY_RULE_SETUP -#line 322 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 332 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { llvmAsmlval.StrVal = new std::string(yytext+1); // Skip % return LOCALVAR; } YY_BREAK -case 125: +case 131: YY_RULE_SETUP -#line 326 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 336 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { llvmAsmlval.StrVal = new std::string(yytext+1); // Skip @ return GLOBALVAR; } YY_BREAK -case 126: +case 132: YY_RULE_SETUP -#line 330 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 340 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { yytext[yyleng-1] = 0; // nuke colon llvmAsmlval.StrVal = new std::string(yytext); return LABELSTR; } YY_BREAK -case 127: +case 133: YY_RULE_SETUP -#line 335 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 345 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { yytext[yyleng-2] = 0; // nuke colon, end quote const char* EndChar = UnEscapeLexed(yytext+1, yytext+yyleng); @@ -1922,9 +1989,9 @@ return LABELSTR; } YY_BREAK -case 128: +case 134: YY_RULE_SETUP -#line 343 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 353 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { yytext[yyleng-1] = 0; // nuke end quote const char* EndChar = UnEscapeLexed(yytext+1, yytext+yyleng); llvmAsmlval.StrVal = @@ -1932,9 +1999,9 @@ return STRINGCONSTANT; } YY_BREAK -case 129: +case 135: YY_RULE_SETUP -#line 349 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 359 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { yytext[yyleng-1] = 0; // nuke end quote const char* EndChar = @@ -1944,9 +2011,9 @@ return ATSTRINGCONSTANT; } YY_BREAK -case 130: +case 136: YY_RULE_SETUP -#line 357 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 367 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { yytext[yyleng-1] = 0; // nuke end quote const char* EndChar = @@ -1956,9 +2023,9 @@ return PCTSTRINGCONSTANT; } YY_BREAK -case 131: +case 137: YY_RULE_SETUP -#line 365 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 375 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { uint32_t numBits = ((yyleng * 64) / 19) + 1; APInt Tmp(numBits, yytext, yyleng, 10); @@ -1974,9 +2041,9 @@ } } YY_BREAK -case 132: +case 138: YY_RULE_SETUP -#line 379 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 389 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { uint32_t numBits = (((yyleng-1) * 64) / 19) + 2; APInt Tmp(numBits, yytext, yyleng, 10); @@ -1992,9 +2059,9 @@ } } YY_BREAK -case 133: +case 139: YY_RULE_SETUP -#line 394 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 404 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { int len = yyleng - 3; uint32_t bits = len * 4; APInt Tmp(bits, yytext+3, len, 16); @@ -2013,9 +2080,9 @@ } } YY_BREAK -case 134: +case 140: YY_RULE_SETUP -#line 412 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 422 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { uint64_t Val = atoull(yytext+1); if ((unsigned)Val != Val) @@ -2024,9 +2091,9 @@ return LOCALVAL_ID; } YY_BREAK -case 135: +case 141: YY_RULE_SETUP -#line 419 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 429 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { uint64_t Val = atoull(yytext+1); if ((unsigned)Val != Val) @@ -2035,18 +2102,18 @@ return GLOBALVAL_ID; } YY_BREAK -case 136: +case 142: YY_RULE_SETUP -#line 427 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 437 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { llvmAsmlval.FPVal = atof(yytext); return FPVAL; } YY_BREAK -case 137: +case 143: YY_RULE_SETUP -#line 428 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 438 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { llvmAsmlval.FPVal = HexToFP(yytext); return FPVAL; } YY_BREAK case YY_STATE_EOF(INITIAL): -#line 430 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 440 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { /* Make sure to free the internal buffers for flex when we are * done reading our input! @@ -2055,22 +2122,22 @@ return EOF; } YY_BREAK -case 138: +case 144: YY_RULE_SETUP -#line 438 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 448 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { /* Ignore whitespace */ } YY_BREAK -case 139: +case 145: YY_RULE_SETUP -#line 439 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 449 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" { return yytext[0]; } YY_BREAK -case 140: +case 146: YY_RULE_SETUP -#line 441 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 451 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" YY_FATAL_ERROR( "flex scanner jammed" ); YY_BREAK -#line 2074 "Lexer.cpp" +#line 2141 "Lexer.cpp" case YY_END_OF_BUFFER: { @@ -2357,7 +2424,7 @@ while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) { yy_current_state = (int) yy_def[yy_current_state]; - if ( yy_current_state >= 568 ) + if ( yy_current_state >= 586 ) yy_c = yy_meta[(unsigned int) yy_c]; } yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c]; @@ -2387,11 +2454,11 @@ while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) { yy_current_state = (int) yy_def[yy_current_state]; - if ( yy_current_state >= 568 ) + if ( yy_current_state >= 586 ) yy_c = yy_meta[(unsigned int) yy_c]; } yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c]; - yy_is_jam = (yy_current_state == 567); + yy_is_jam = (yy_current_state == 585); if ( ! yy_is_jam ) *yy_state_ptr++ = yy_current_state; @@ -2446,6 +2513,7 @@ #endif /* ifndef YY_NO_UNPUT */ +#ifndef YY_NO_INPUT #ifdef __cplusplus static int yyinput() #else @@ -2519,7 +2587,7 @@ return c; } - +#endif /* YY_NO_INPUT */ #ifdef YY_USE_PROTOS void yyrestart( FILE *input_file ) @@ -2630,11 +2698,6 @@ } -#ifndef YY_ALWAYS_INTERACTIVE -#ifndef YY_NEVER_INTERACTIVE -extern int isatty YY_PROTO(( int )); -#endif -#endif #ifdef YY_USE_PROTOS void yy_init_buffer( YY_BUFFER_STATE b, FILE *file ) @@ -2952,5 +3015,5 @@ return 0; } #endif -#line 441 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/Lexer.l" +#line 451 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" Modified: llvm/trunk/lib/AsmParser/Lexer.l.cvs URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/Lexer.l.cvs?rev=40611&r1=40610&r2=40611&view=diff ============================================================================== --- llvm/trunk/lib/AsmParser/Lexer.l.cvs (original) +++ llvm/trunk/lib/AsmParser/Lexer.l.cvs Mon Jul 30 22:50:36 2007 @@ -177,6 +177,8 @@ */ HexIntConstant [us]0x[0-9A-Fa-f]+ +/* WSNL - shorthand for newline followed by whitespace */ +WSNL [ \r\t\n]*$ %% {Comment} { /* Ignore comments for now */ } @@ -225,11 +227,19 @@ x86_stdcallcc { return X86_STDCALLCC_TOK; } x86_fastcallcc { return X86_FASTCALLCC_TOK; } +signext { return SIGNEXT; } +zeroext { return ZEROEXT; } inreg { return INREG; } sret { return SRET; } nounwind { return NOUNWIND; } noreturn { return NORETURN; } noalias { return NOALIAS; } +byval { return BYVAL; } +nest { return NEST; } +sext{WSNL} { // For auto-upgrade only, drop in LLVM 3.0 + return SIGNEXT; } +zext{WSNL} { // For auto-upgrade only, drop in LLVM 3.0 + return ZEROEXT; } void { RET_TY(Type::VoidTy, VOID); } float { RET_TY(Type::FloatTy, FLOAT); } Modified: llvm/trunk/lib/AsmParser/llvmAsmParser.cpp.cvs URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/llvmAsmParser.cpp.cvs?rev=40611&r1=40610&r2=40611&view=diff ============================================================================== --- llvm/trunk/lib/AsmParser/llvmAsmParser.cpp.cvs (original) +++ llvm/trunk/lib/AsmParser/llvmAsmParser.cpp.cvs Mon Jul 30 22:50:36 2007 @@ -1,154 +1,358 @@ +/* A Bison parser, made by GNU Bison 2.1. */ -/* A Bison parser, made from /Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y - by GNU Bison version 1.28 */ +/* Skeleton parser for Yacc-like parsing with Bison, + Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc. -#define YYBISON 1 /* Identify Bison output. */ + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2, or (at your option) + any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street, Fifth Floor, + Boston, MA 02110-1301, USA. */ + +/* As a special exception, when this file is copied by Bison into a + Bison output file, you may use that output file without restriction. + This special exception was added by the Free Software Foundation + in version 1.24 of Bison. */ + +/* Written by Richard Stallman by simplifying the original so called + ``semantic'' parser. */ + +/* All symbols defined below should begin with yy or YY, to avoid + infringing on user name space. This should be done even for local + variables, as they might otherwise be expanded by user macros. + There are some unavoidable exceptions within include files to + define necessary library symbols; they are noted "INFRINGES ON + USER NAME SPACE" below. */ + +/* Identify Bison output. */ +#define YYBISON 1 + +/* Bison version. */ +#define YYBISON_VERSION "2.1" + +/* Skeleton name. */ +#define YYSKELETON_NAME "yacc.c" + +/* Pure parsers. */ +#define YYPURE 0 + +/* Using locations. */ +#define YYLSP_NEEDED 0 +/* Substitute the variable and function names. */ #define yyparse llvmAsmparse -#define yylex llvmAsmlex +#define yylex llvmAsmlex #define yyerror llvmAsmerror -#define yylval llvmAsmlval -#define yychar llvmAsmchar +#define yylval llvmAsmlval +#define yychar llvmAsmchar #define yydebug llvmAsmdebug #define yynerrs llvmAsmnerrs -#define ESINT64VAL 257 -#define EUINT64VAL 258 -#define ESAPINTVAL 259 -#define EUAPINTVAL 260 -#define LOCALVAL_ID 261 -#define GLOBALVAL_ID 262 -#define FPVAL 263 -#define VOID 264 -#define INTTYPE 265 -#define FLOAT 266 -#define DOUBLE 267 -#define LABEL 268 -#define TYPE 269 -#define LOCALVAR 270 -#define GLOBALVAR 271 -#define LABELSTR 272 -#define STRINGCONSTANT 273 -#define ATSTRINGCONSTANT 274 -#define PCTSTRINGCONSTANT 275 -#define ZEROINITIALIZER 276 -#define TRUETOK 277 -#define FALSETOK 278 -#define BEGINTOK 279 -#define ENDTOK 280 -#define DECLARE 281 -#define DEFINE 282 -#define GLOBAL 283 -#define CONSTANT 284 -#define SECTION 285 -#define ALIAS 286 -#define VOLATILE 287 -#define THREAD_LOCAL 288 -#define TO 289 -#define DOTDOTDOT 290 -#define NULL_TOK 291 -#define UNDEF 292 -#define INTERNAL 293 -#define LINKONCE 294 -#define WEAK 295 -#define APPENDING 296 -#define DLLIMPORT 297 -#define DLLEXPORT 298 -#define EXTERN_WEAK 299 -#define OPAQUE 300 -#define EXTERNAL 301 -#define TARGET 302 -#define TRIPLE 303 -#define ALIGN 304 -#define DEPLIBS 305 -#define CALL 306 -#define TAIL 307 -#define ASM_TOK 308 -#define MODULE 309 -#define SIDEEFFECT 310 -#define CC_TOK 311 -#define CCC_TOK 312 -#define FASTCC_TOK 313 -#define COLDCC_TOK 314 -#define X86_STDCALLCC_TOK 315 -#define X86_FASTCALLCC_TOK 316 -#define DATALAYOUT 317 -#define RET 318 -#define BR 319 -#define SWITCH 320 -#define INVOKE 321 -#define UNWIND 322 -#define UNREACHABLE 323 -#define ADD 324 -#define SUB 325 -#define MUL 326 -#define UDIV 327 -#define SDIV 328 -#define FDIV 329 -#define UREM 330 -#define SREM 331 -#define FREM 332 -#define AND 333 -#define OR 334 -#define XOR 335 -#define SHL 336 -#define LSHR 337 -#define ASHR 338 -#define ICMP 339 -#define FCMP 340 -#define EQ 341 -#define NE 342 -#define SLT 343 -#define SGT 344 -#define SLE 345 -#define SGE 346 -#define ULT 347 -#define UGT 348 -#define ULE 349 -#define UGE 350 -#define OEQ 351 -#define ONE 352 -#define OLT 353 -#define OGT 354 -#define OLE 355 -#define OGE 356 -#define ORD 357 -#define UNO 358 -#define UEQ 359 -#define UNE 360 -#define MALLOC 361 -#define ALLOCA 362 -#define FREE 363 -#define LOAD 364 -#define STORE 365 -#define GETELEMENTPTR 366 -#define TRUNC 367 -#define ZEXT 368 -#define SEXT 369 -#define FPTRUNC 370 -#define FPEXT 371 -#define BITCAST 372 -#define UITOFP 373 -#define SITOFP 374 -#define FPTOUI 375 -#define FPTOSI 376 -#define INTTOPTR 377 -#define PTRTOINT 378 -#define PHI_TOK 379 -#define SELECT 380 -#define VAARG 381 -#define EXTRACTELEMENT 382 -#define INSERTELEMENT 383 -#define SHUFFLEVECTOR 384 -#define NORETURN 385 -#define INREG 386 -#define SRET 387 -#define NOUNWIND 388 -#define NOALIAS 389 -#define DEFAULT 390 -#define HIDDEN 391 -#define PROTECTED 392 -#line 14 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" + +/* Tokens. */ +#ifndef YYTOKENTYPE +# define YYTOKENTYPE + /* Put the tokens into the symbol table, so that GDB and other debuggers + know about them. */ + enum yytokentype { + ESINT64VAL = 258, + EUINT64VAL = 259, + ESAPINTVAL = 260, + EUAPINTVAL = 261, + LOCALVAL_ID = 262, + GLOBALVAL_ID = 263, + FPVAL = 264, + VOID = 265, + INTTYPE = 266, + FLOAT = 267, + DOUBLE = 268, + LABEL = 269, + TYPE = 270, + LOCALVAR = 271, + GLOBALVAR = 272, + LABELSTR = 273, + STRINGCONSTANT = 274, + ATSTRINGCONSTANT = 275, + PCTSTRINGCONSTANT = 276, + ZEROINITIALIZER = 277, + TRUETOK = 278, + FALSETOK = 279, + BEGINTOK = 280, + ENDTOK = 281, + DECLARE = 282, + DEFINE = 283, + GLOBAL = 284, + CONSTANT = 285, + SECTION = 286, + ALIAS = 287, + VOLATILE = 288, + THREAD_LOCAL = 289, + TO = 290, + DOTDOTDOT = 291, + NULL_TOK = 292, + UNDEF = 293, + INTERNAL = 294, + LINKONCE = 295, + WEAK = 296, + APPENDING = 297, + DLLIMPORT = 298, + DLLEXPORT = 299, + EXTERN_WEAK = 300, + OPAQUE = 301, + EXTERNAL = 302, + TARGET = 303, + TRIPLE = 304, + ALIGN = 305, + DEPLIBS = 306, + CALL = 307, + TAIL = 308, + ASM_TOK = 309, + MODULE = 310, + SIDEEFFECT = 311, + CC_TOK = 312, + CCC_TOK = 313, + FASTCC_TOK = 314, + COLDCC_TOK = 315, + X86_STDCALLCC_TOK = 316, + X86_FASTCALLCC_TOK = 317, + DATALAYOUT = 318, + RET = 319, + BR = 320, + SWITCH = 321, + INVOKE = 322, + UNWIND = 323, + UNREACHABLE = 324, + ADD = 325, + SUB = 326, + MUL = 327, + UDIV = 328, + SDIV = 329, + FDIV = 330, + UREM = 331, + SREM = 332, + FREM = 333, + AND = 334, + OR = 335, + XOR = 336, + SHL = 337, + LSHR = 338, + ASHR = 339, + ICMP = 340, + FCMP = 341, + EQ = 342, + NE = 343, + SLT = 344, + SGT = 345, + SLE = 346, + SGE = 347, + ULT = 348, + UGT = 349, + ULE = 350, + UGE = 351, + OEQ = 352, + ONE = 353, + OLT = 354, + OGT = 355, + OLE = 356, + OGE = 357, + ORD = 358, + UNO = 359, + UEQ = 360, + UNE = 361, + MALLOC = 362, + ALLOCA = 363, + FREE = 364, + LOAD = 365, + STORE = 366, + GETELEMENTPTR = 367, + TRUNC = 368, + ZEXT = 369, + SEXT = 370, + FPTRUNC = 371, + FPEXT = 372, + BITCAST = 373, + UITOFP = 374, + SITOFP = 375, + FPTOUI = 376, + FPTOSI = 377, + INTTOPTR = 378, + PTRTOINT = 379, + PHI_TOK = 380, + SELECT = 381, + VAARG = 382, + EXTRACTELEMENT = 383, + INSERTELEMENT = 384, + SHUFFLEVECTOR = 385, + SIGNEXT = 386, + ZEROEXT = 387, + NORETURN = 388, + INREG = 389, + SRET = 390, + NOUNWIND = 391, + NOALIAS = 392, + BYVAL = 393, + NEST = 394, + DEFAULT = 395, + HIDDEN = 396, + PROTECTED = 397 + }; +#endif +/* Tokens. */ +#define ESINT64VAL 258 +#define EUINT64VAL 259 +#define ESAPINTVAL 260 +#define EUAPINTVAL 261 +#define LOCALVAL_ID 262 +#define GLOBALVAL_ID 263 +#define FPVAL 264 +#define VOID 265 +#define INTTYPE 266 +#define FLOAT 267 +#define DOUBLE 268 +#define LABEL 269 +#define TYPE 270 +#define LOCALVAR 271 +#define GLOBALVAR 272 +#define LABELSTR 273 +#define STRINGCONSTANT 274 +#define ATSTRINGCONSTANT 275 +#define PCTSTRINGCONSTANT 276 +#define ZEROINITIALIZER 277 +#define TRUETOK 278 +#define FALSETOK 279 +#define BEGINTOK 280 +#define ENDTOK 281 +#define DECLARE 282 +#define DEFINE 283 +#define GLOBAL 284 +#define CONSTANT 285 +#define SECTION 286 +#define ALIAS 287 +#define VOLATILE 288 +#define THREAD_LOCAL 289 +#define TO 290 +#define DOTDOTDOT 291 +#define NULL_TOK 292 +#define UNDEF 293 +#define INTERNAL 294 +#define LINKONCE 295 +#define WEAK 296 +#define APPENDING 297 +#define DLLIMPORT 298 +#define DLLEXPORT 299 +#define EXTERN_WEAK 300 +#define OPAQUE 301 +#define EXTERNAL 302 +#define TARGET 303 +#define TRIPLE 304 +#define ALIGN 305 +#define DEPLIBS 306 +#define CALL 307 +#define TAIL 308 +#define ASM_TOK 309 +#define MODULE 310 +#define SIDEEFFECT 311 +#define CC_TOK 312 +#define CCC_TOK 313 +#define FASTCC_TOK 314 +#define COLDCC_TOK 315 +#define X86_STDCALLCC_TOK 316 +#define X86_FASTCALLCC_TOK 317 +#define DATALAYOUT 318 +#define RET 319 +#define BR 320 +#define SWITCH 321 +#define INVOKE 322 +#define UNWIND 323 +#define UNREACHABLE 324 +#define ADD 325 +#define SUB 326 +#define MUL 327 +#define UDIV 328 +#define SDIV 329 +#define FDIV 330 +#define UREM 331 +#define SREM 332 +#define FREM 333 +#define AND 334 +#define OR 335 +#define XOR 336 +#define SHL 337 +#define LSHR 338 +#define ASHR 339 +#define ICMP 340 +#define FCMP 341 +#define EQ 342 +#define NE 343 +#define SLT 344 +#define SGT 345 +#define SLE 346 +#define SGE 347 +#define ULT 348 +#define UGT 349 +#define ULE 350 +#define UGE 351 +#define OEQ 352 +#define ONE 353 +#define OLT 354 +#define OGT 355 +#define OLE 356 +#define OGE 357 +#define ORD 358 +#define UNO 359 +#define UEQ 360 +#define UNE 361 +#define MALLOC 362 +#define ALLOCA 363 +#define FREE 364 +#define LOAD 365 +#define STORE 366 +#define GETELEMENTPTR 367 +#define TRUNC 368 +#define ZEXT 369 +#define SEXT 370 +#define FPTRUNC 371 +#define FPEXT 372 +#define BITCAST 373 +#define UITOFP 374 +#define SITOFP 375 +#define FPTOUI 376 +#define FPTOSI 377 +#define INTTOPTR 378 +#define PTRTOINT 379 +#define PHI_TOK 380 +#define SELECT 381 +#define VAARG 382 +#define EXTRACTELEMENT 383 +#define INSERTELEMENT 384 +#define SHUFFLEVECTOR 385 +#define SIGNEXT 386 +#define ZEROEXT 387 +#define NORETURN 388 +#define INREG 389 +#define SRET 390 +#define NOUNWIND 391 +#define NOALIAS 392 +#define BYVAL 393 +#define NEST 394 +#define DEFAULT 395 +#define HIDDEN 396 +#define PROTECTED 397 + + + + +/* Copy the first part of user declarations. */ +#line 14 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" #include "ParserInternals.h" #include "llvm/CallingConv.h" @@ -1091,8 +1295,28 @@ } -#line 957 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -typedef union { + +/* Enabling traces. */ +#ifndef YYDEBUG +# define YYDEBUG 0 +#endif + +/* Enabling verbose error messages. */ +#ifdef YYERROR_VERBOSE +# undef YYERROR_VERBOSE +# define YYERROR_VERBOSE 1 +#else +# define YYERROR_VERBOSE 0 +#endif + +/* Enabling the token table. */ +#ifndef YYTOKEN_TABLE +# define YYTOKEN_TABLE 0 +#endif + +#if ! defined (YYSTYPE) && ! defined (YYSTYPE_IS_DECLARED) +#line 957 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +typedef union YYSTYPE { llvm::Module *ModuleVal; llvm::Function *FunctionVal; llvm::BasicBlock *BasicBlockVal; @@ -1138,1097 +1362,1572 @@ llvm::ICmpInst::Predicate IPredicate; llvm::FCmpInst::Predicate FPredicate; } YYSTYPE; -#include +/* Line 196 of yacc.c. */ +#line 1367 "llvmAsmParser.tab.c" +# define yystype YYSTYPE /* obsolescent; will be withdrawn */ +# define YYSTYPE_IS_DECLARED 1 +# define YYSTYPE_IS_TRIVIAL 1 +#endif + + + +/* Copy the second part of user declarations. */ + + +/* Line 219 of yacc.c. */ +#line 1379 "llvmAsmParser.tab.c" + +#if ! defined (YYSIZE_T) && defined (__SIZE_TYPE__) +# define YYSIZE_T __SIZE_TYPE__ +#endif +#if ! defined (YYSIZE_T) && defined (size_t) +# define YYSIZE_T size_t +#endif +#if ! defined (YYSIZE_T) && (defined (__STDC__) || defined (__cplusplus)) +# include /* INFRINGES ON USER NAME SPACE */ +# define YYSIZE_T size_t +#endif +#if ! defined (YYSIZE_T) +# define YYSIZE_T unsigned int +#endif + +#ifndef YY_ +# if YYENABLE_NLS +# if ENABLE_NLS +# include /* INFRINGES ON USER NAME SPACE */ +# define YY_(msgid) dgettext ("bison-runtime", msgid) +# endif +# endif +# ifndef YY_ +# define YY_(msgid) msgid +# endif +#endif + +#if ! defined (yyoverflow) || YYERROR_VERBOSE + +/* The parser invokes alloca or malloc; define the necessary symbols. */ + +# ifdef YYSTACK_USE_ALLOCA +# if YYSTACK_USE_ALLOCA +# ifdef __GNUC__ +# define YYSTACK_ALLOC __builtin_alloca +# else +# define YYSTACK_ALLOC alloca +# if defined (__STDC__) || defined (__cplusplus) +# include /* INFRINGES ON USER NAME SPACE */ +# define YYINCLUDED_STDLIB_H +# endif +# endif +# endif +# endif + +# ifdef YYSTACK_ALLOC + /* Pacify GCC's `empty if-body' warning. */ +# define YYSTACK_FREE(Ptr) do { /* empty */; } while (0) +# ifndef YYSTACK_ALLOC_MAXIMUM + /* The OS might guarantee only one guard page at the bottom of the stack, + and a page size can be as small as 4096 bytes. So we cannot safely + invoke alloca (N) if N exceeds 4096. Use a slightly smaller number + to allow for a few compiler-allocated temporary stack slots. */ +# define YYSTACK_ALLOC_MAXIMUM 4032 /* reasonable circa 2005 */ +# endif +# else +# define YYSTACK_ALLOC YYMALLOC +# define YYSTACK_FREE YYFREE +# ifndef YYSTACK_ALLOC_MAXIMUM +# define YYSTACK_ALLOC_MAXIMUM ((YYSIZE_T) -1) +# endif +# ifdef __cplusplus +extern "C" { +# endif +# ifndef YYMALLOC +# define YYMALLOC malloc +# if (! defined (malloc) && ! defined (YYINCLUDED_STDLIB_H) \ + && (defined (__STDC__) || defined (__cplusplus))) +void *malloc (YYSIZE_T); /* INFRINGES ON USER NAME SPACE */ +# endif +# endif +# ifndef YYFREE +# define YYFREE free +# if (! defined (free) && ! defined (YYINCLUDED_STDLIB_H) \ + && (defined (__STDC__) || defined (__cplusplus))) +void free (void *); /* INFRINGES ON USER NAME SPACE */ +# endif +# endif +# ifdef __cplusplus +} +# endif +# endif +#endif /* ! defined (yyoverflow) || YYERROR_VERBOSE */ -#ifndef __cplusplus -#ifndef __STDC__ -#define const -#endif -#endif +#if (! defined (yyoverflow) \ + && (! defined (__cplusplus) \ + || (defined (YYSTYPE_IS_TRIVIAL) && YYSTYPE_IS_TRIVIAL))) +/* A type that is properly aligned for any stack member. */ +union yyalloc +{ + short int yyss; + YYSTYPE yyvs; + }; -#define YYFINAL 583 -#define YYFLAG -32768 -#define YYNTBASE 153 - -#define YYTRANSLATE(x) ((unsigned)(x) <= 392 ? yytranslate[x] : 234) - -static const short yytranslate[] = { 0, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 143, - 144, 141, 2, 140, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 148, - 139, 149, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 145, 142, 147, 2, 2, 2, 2, 2, 152, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 146, - 2, 2, 150, 2, 151, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 1, 3, 4, 5, 6, - 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, - 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, - 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, - 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, - 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, - 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, - 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, - 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, - 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, - 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, - 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, - 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, - 127, 128, 129, 130, 131, 132, 133, 134, 135, 136, - 137, 138 -}; +/* The size of the maximum gap between one aligned stack and the next. */ +# define YYSTACK_GAP_MAXIMUM (sizeof (union yyalloc) - 1) -#if YYDEBUG != 0 -static const short yyprhs[] = { 0, - 0, 2, 4, 6, 8, 10, 12, 14, 16, 18, - 20, 22, 24, 26, 28, 30, 32, 34, 36, 38, - 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, - 60, 62, 64, 66, 68, 70, 72, 74, 76, 78, - 80, 82, 84, 86, 88, 90, 92, 94, 96, 98, - 100, 102, 104, 106, 108, 110, 112, 114, 116, 118, - 120, 121, 124, 125, 127, 129, 131, 132, 135, 137, - 139, 141, 143, 145, 147, 149, 151, 152, 154, 156, - 158, 159, 161, 163, 164, 166, 168, 170, 172, 173, - 175, 177, 178, 180, 182, 184, 186, 188, 191, 193, - 195, 197, 199, 201, 202, 205, 207, 209, 211, 212, - 215, 216, 219, 220, 224, 227, 228, 230, 231, 235, - 237, 240, 242, 244, 246, 248, 250, 252, 255, 257, - 260, 266, 272, 278, 284, 288, 291, 297, 302, 305, - 307, 309, 311, 315, 317, 321, 323, 324, 326, 330, - 335, 339, 343, 348, 353, 357, 364, 370, 373, 376, - 379, 382, 385, 388, 391, 394, 397, 400, 403, 406, - 413, 419, 428, 435, 442, 450, 458, 465, 474, 483, - 487, 489, 491, 493, 495, 496, 499, 506, 508, 509, - 511, 514, 515, 519, 520, 524, 528, 532, 536, 537, - 545, 546, 555, 556, 565, 571, 574, 578, 580, 584, - 588, 592, 596, 598, 599, 605, 609, 611, 615, 617, - 618, 628, 630, 632, 637, 639, 641, 644, 648, 649, - 651, 653, 655, 657, 659, 661, 663, 665, 667, 671, - 673, 679, 681, 683, 685, 687, 689, 691, 694, 697, - 700, 704, 707, 708, 710, 713, 716, 720, 730, 740, - 749, 764, 766, 768, 775, 781, 784, 791, 799, 803, - 809, 810, 811, 815, 818, 820, 826, 832, 839, 846, - 851, 858, 863, 868, 875, 882, 885, 894, 896, 898, - 899, 903, 910, 914, 921, 924, 930, 938 -}; +/* The size of an array large to enough to hold all stacks, each with + N elements. */ +# define YYSTACK_BYTES(N) \ + ((N) * (sizeof (short int) + sizeof (YYSTYPE)) \ + + YYSTACK_GAP_MAXIMUM) + +/* Copy COUNT objects from FROM to TO. The source and destination do + not overlap. */ +# ifndef YYCOPY +# if defined (__GNUC__) && 1 < __GNUC__ +# define YYCOPY(To, From, Count) \ + __builtin_memcpy (To, From, (Count) * sizeof (*(From))) +# else +# define YYCOPY(To, From, Count) \ + do \ + { \ + YYSIZE_T yyi; \ + for (yyi = 0; yyi < (Count); yyi++) \ + (To)[yyi] = (From)[yyi]; \ + } \ + while (0) +# endif +# endif + +/* Relocate STACK from its old location to the new one. The + local variables YYSIZE and YYSTACKSIZE give the old and new number of + elements in the stack, and YYPTR gives the new location of the + stack. Advance YYPTR to a properly aligned location for the next + stack. */ +# define YYSTACK_RELOCATE(Stack) \ + do \ + { \ + YYSIZE_T yynewbytes; \ + YYCOPY (&yyptr->Stack, Stack, yysize); \ + Stack = &yyptr->Stack; \ + yynewbytes = yystacksize * sizeof (*Stack) + YYSTACK_GAP_MAXIMUM; \ + yyptr += yynewbytes / sizeof (*yyptr); \ + } \ + while (0) -static const short yyrhs[] = { 70, - 0, 71, 0, 72, 0, 73, 0, 74, 0, 75, - 0, 76, 0, 77, 0, 78, 0, 82, 0, 83, - 0, 84, 0, 79, 0, 80, 0, 81, 0, 113, - 0, 114, 0, 115, 0, 116, 0, 117, 0, 118, - 0, 119, 0, 120, 0, 121, 0, 122, 0, 123, - 0, 124, 0, 87, 0, 88, 0, 89, 0, 90, - 0, 91, 0, 92, 0, 93, 0, 94, 0, 95, - 0, 96, 0, 97, 0, 98, 0, 99, 0, 100, - 0, 101, 0, 102, 0, 103, 0, 104, 0, 105, - 0, 106, 0, 93, 0, 94, 0, 95, 0, 96, - 0, 23, 0, 24, 0, 11, 0, 12, 0, 13, - 0, 16, 0, 19, 0, 21, 0, 160, 0, 0, - 160, 139, 0, 0, 17, 0, 20, 0, 165, 0, - 0, 163, 139, 0, 39, 0, 41, 0, 40, 0, - 42, 0, 44, 0, 43, 0, 45, 0, 47, 0, - 0, 136, 0, 137, 0, 138, 0, 0, 43, 0, - 45, 0, 0, 39, 0, 40, 0, 41, 0, 44, - 0, 0, 41, 0, 39, 0, 0, 58, 0, 59, - 0, 60, 0, 61, 0, 62, 0, 57, 4, 0, - 114, 0, 115, 0, 132, 0, 133, 0, 135, 0, - 0, 174, 173, 0, 131, 0, 134, 0, 173, 0, - 0, 176, 175, 0, 0, 50, 4, 0, 0, 140, - 50, 4, 0, 31, 19, 0, 0, 179, 0, 0, - 140, 182, 181, 0, 179, 0, 50, 4, 0, 11, - 0, 12, 0, 13, 0, 14, 0, 46, 0, 183, - 0, 184, 141, 0, 218, 0, 142, 4, 0, 184, - 143, 188, 144, 176, 0, 10, 143, 188, 144, 176, - 0, 145, 4, 146, 184, 147, 0, 148, 4, 146, - 184, 149, 0, 150, 189, 151, 0, 150, 151, 0, - 148, 150, 189, 151, 149, 0, 148, 150, 151, 149, - 0, 184, 174, 0, 184, 0, 10, 0, 185, 0, - 187, 140, 185, 0, 187, 0, 187, 140, 36, 0, - 36, 0, 0, 184, 0, 189, 140, 184, 0, 184, - 145, 192, 147, 0, 184, 145, 147, 0, 184, 152, - 19, 0, 184, 148, 192, 149, 0, 184, 150, 192, - 151, 0, 184, 150, 151, 0, 184, 148, 150, 192, - 151, 149, 0, 184, 148, 150, 151, 149, 0, 184, - 37, 0, 184, 38, 0, 184, 218, 0, 184, 191, - 0, 184, 22, 0, 158, 3, 0, 158, 5, 0, - 158, 4, 0, 158, 6, 0, 11, 23, 0, 11, - 24, 0, 159, 9, 0, 155, 143, 190, 35, 184, - 144, 0, 112, 143, 190, 229, 144, 0, 126, 143, - 190, 140, 190, 140, 190, 144, 0, 153, 143, 190, - 140, 190, 144, 0, 154, 143, 190, 140, 190, 144, - 0, 85, 156, 143, 190, 140, 190, 144, 0, 86, - 157, 143, 190, 140, 190, 144, 0, 128, 143, 190, - 140, 190, 144, 0, 129, 143, 190, 140, 190, 140, - 190, 144, 0, 130, 143, 190, 140, 190, 140, 190, - 144, 0, 192, 140, 190, 0, 190, 0, 29, 0, - 30, 0, 34, 0, 0, 186, 218, 0, 118, 143, - 195, 35, 184, 144, 0, 197, 0, 0, 198, 0, - 197, 198, 0, 0, 28, 199, 214, 0, 0, 27, - 200, 215, 0, 55, 54, 204, 0, 162, 15, 184, - 0, 162, 15, 10, 0, 0, 164, 168, 194, 193, - 190, 201, 181, 0, 0, 164, 166, 168, 194, 193, - 190, 202, 181, 0, 0, 164, 167, 168, 194, 193, - 184, 203, 181, 0, 164, 168, 32, 171, 195, 0, - 48, 205, 0, 51, 139, 206, 0, 19, 0, 49, - 139, 19, 0, 63, 139, 19, 0, 145, 207, 147, - 0, 207, 140, 19, 0, 19, 0, 0, 208, 140, - 184, 174, 161, 0, 184, 174, 161, 0, 208, 0, - 208, 140, 36, 0, 36, 0, 0, 172, 186, 163, - 143, 209, 144, 176, 180, 177, 0, 25, 0, 150, - 0, 170, 168, 210, 211, 0, 26, 0, 151, 0, - 221, 213, 0, 169, 168, 210, 0, 0, 56, 0, - 3, 0, 4, 0, 9, 0, 23, 0, 24, 0, - 37, 0, 38, 0, 22, 0, 148, 192, 149, 0, - 191, 0, 54, 216, 19, 140, 19, 0, 7, 0, - 8, 0, 160, 0, 163, 0, 218, 0, 217, 0, - 184, 219, 0, 221, 222, 0, 212, 222, 0, 223, - 162, 224, 0, 223, 226, 0, 0, 18, 0, 64, - 220, 0, 64, 10, 0, 65, 14, 219, 0, 65, - 11, 219, 140, 14, 219, 140, 14, 219, 0, 66, - 158, 219, 140, 14, 219, 145, 225, 147, 0, 66, - 158, 219, 140, 14, 219, 145, 147, 0, 67, 172, - 186, 219, 143, 228, 144, 176, 35, 14, 219, 68, - 14, 219, 0, 68, 0, 69, 0, 225, 158, 217, - 140, 14, 219, 0, 158, 217, 140, 14, 219, 0, - 162, 231, 0, 184, 145, 219, 140, 219, 147, 0, - 227, 140, 145, 219, 140, 219, 147, 0, 184, 219, - 174, 0, 228, 140, 184, 219, 174, 0, 0, 0, - 229, 140, 220, 0, 53, 52, 0, 52, 0, 153, - 184, 219, 140, 219, 0, 154, 184, 219, 140, 219, - 0, 85, 156, 184, 219, 140, 219, 0, 86, 157, - 184, 219, 140, 219, 0, 155, 220, 35, 184, 0, - 126, 220, 140, 220, 140, 220, 0, 127, 220, 140, - 184, 0, 128, 220, 140, 220, 0, 129, 220, 140, - 220, 140, 220, 0, 130, 220, 140, 220, 140, 220, - 0, 125, 227, 0, 230, 172, 186, 219, 143, 228, - 144, 176, 0, 233, 0, 33, 0, 0, 107, 184, - 178, 0, 107, 184, 140, 11, 219, 178, 0, 108, - 184, 178, 0, 108, 184, 140, 11, 219, 178, 0, - 109, 220, 0, 232, 110, 184, 219, 178, 0, 232, - 111, 220, 140, 184, 219, 178, 0, 112, 184, 219, - 229, 0 -}; +#endif +#if defined (__STDC__) || defined (__cplusplus) + typedef signed char yysigned_char; +#else + typedef short int yysigned_char; #endif -#if YYDEBUG != 0 -static const short yyrline[] = { 0, - 1116, 1116, 1116, 1116, 1116, 1116, 1116, 1116, 1116, 1117, - 1117, 1117, 1117, 1117, 1117, 1118, 1118, 1118, 1118, 1118, - 1118, 1118, 1119, 1119, 1119, 1119, 1119, 1122, 1122, 1123, - 1123, 1124, 1124, 1125, 1125, 1126, 1126, 1130, 1130, 1131, - 1131, 1132, 1132, 1133, 1133, 1134, 1134, 1135, 1135, 1136, - 1136, 1137, 1138, 1143, 1144, 1144, 1146, 1146, 1146, 1147, - 1147, 1151, 1155, 1160, 1160, 1162, 1163, 1168, 1174, 1175, - 1176, 1177, 1178, 1182, 1183, 1184, 1188, 1189, 1190, 1191, - 1195, 1196, 1197, 1201, 1202, 1203, 1204, 1205, 1209, 1210, - 1211, 1214, 1214, 1215, 1216, 1217, 1218, 1219, 1227, 1228, - 1229, 1230, 1231, 1234, 1235, 1240, 1241, 1242, 1245, 1246, - 1253, 1253, 1260, 1260, 1269, 1277, 1277, 1283, 1283, 1285, - 1290, 1303, 1303, 1303, 1303, 1306, 1310, 1314, 1321, 1326, - 1334, 1364, 1395, 1400, 1412, 1422, 1426, 1436, 1443, 1450, - 1457, 1462, 1467, 1474, 1475, 1482, 1489, 1497, 1503, 1515, - 1543, 1559, 1586, 1614, 1640, 1660, 1686, 1706, 1718, 1725, - 1791, 1801, 1811, 1817, 1827, 1833, 1843, 1848, 1853, 1861, - 1873, 1895, 1903, 1909, 1920, 1925, 1930, 1936, 1942, 1951, - 1955, 1963, 1963, 1966, 1966, 1969, 1980, 2001, 2006, 2014, - 2015, 2019, 2019, 2023, 2023, 2026, 2029, 2053, 2064, 2071, - 2074, 2080, 2083, 2090, 2094, 2113, 2116, 2122, 2132, 2136, - 2141, 2143, 2148, 2153, 2162, 2172, 2183, 2187, 2196, 2205, - 2210, 2331, 2331, 2333, 2342, 2342, 2344, 2349, 2361, 2365, - 2370, 2374, 2378, 2382, 2386, 2390, 2394, 2398, 2402, 2427, - 2431, 2441, 2445, 2449, 2454, 2461, 2461, 2467, 2476, 2480, - 2489, 2498, 2507, 2511, 2518, 2522, 2526, 2531, 2541, 2560, - 2569, 2649, 2653, 2660, 2671, 2684, 2694, 2705, 2715, 2724, - 2733, 2736, 2737, 2744, 2748, 2753, 2774, 2791, 2805, 2819, - 2831, 2839, 2846, 2852, 2858, 2864, 2879, 2964, 2969, 2973, - 2980, 2987, 2995, 3002, 3010, 3018, 3032, 3049 +/* YYFINAL -- State number of the termination state. */ +#define YYFINAL 43 +/* YYLAST -- Last index in YYTABLE. */ +#define YYLAST 1553 + +/* YYNTOKENS -- Number of terminals. */ +#define YYNTOKENS 157 +/* YYNNTS -- Number of nonterminals. */ +#define YYNNTS 82 +/* YYNRULES -- Number of rules. */ +#define YYNRULES 304 +/* YYNRULES -- Number of states. */ +#define YYNSTATES 588 + +/* YYTRANSLATE(YYLEX) -- Bison symbol number corresponding to YYLEX. */ +#define YYUNDEFTOK 2 +#define YYMAXUTOK 397 + +#define YYTRANSLATE(YYX) \ + ((unsigned int) (YYX) <= YYMAXUTOK ? yytranslate[YYX] : YYUNDEFTOK) + +/* YYTRANSLATE[YYLEX] -- Bison symbol number corresponding to YYLEX. */ +static const unsigned char yytranslate[] = +{ + 0, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 147, 148, 145, 2, 144, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 152, 143, 153, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 149, 146, 151, 2, 2, 2, 2, 2, 156, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 150, 2, 2, 154, 2, 155, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 1, 2, 3, 4, + 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, + 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, + 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, + 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, + 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, + 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, + 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, + 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, + 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, + 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, + 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, + 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, + 125, 126, 127, 128, 129, 130, 131, 132, 133, 134, + 135, 136, 137, 138, 139, 140, 141, 142 }; -#endif +#if YYDEBUG +/* YYPRHS[YYN] -- Index of the first RHS symbol of rule number YYN in + YYRHS. */ +static const unsigned short int yyprhs[] = +{ + 0, 0, 3, 5, 7, 9, 11, 13, 15, 17, + 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, + 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, + 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, + 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, + 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, + 119, 121, 123, 124, 127, 128, 130, 132, 134, 135, + 138, 140, 142, 144, 146, 148, 150, 152, 154, 155, + 157, 159, 161, 162, 164, 166, 167, 169, 171, 173, + 175, 176, 178, 180, 181, 183, 185, 187, 189, 191, + 194, 196, 198, 200, 202, 204, 206, 208, 210, 212, + 213, 216, 218, 220, 222, 224, 225, 228, 229, 232, + 233, 237, 240, 241, 243, 244, 248, 250, 253, 255, + 257, 259, 261, 263, 265, 268, 270, 273, 279, 285, + 291, 297, 301, 304, 310, 315, 318, 320, 322, 324, + 328, 330, 334, 336, 337, 339, 343, 348, 352, 356, + 361, 366, 370, 377, 383, 386, 389, 392, 395, 398, + 401, 404, 407, 410, 413, 416, 419, 426, 432, 441, + 448, 455, 463, 471, 478, 487, 496, 500, 502, 504, + 506, 508, 509, 512, 519, 521, 522, 524, 527, 528, + 532, 533, 537, 541, 545, 549, 550, 558, 559, 568, + 569, 578, 584, 587, 591, 593, 597, 601, 605, 609, + 611, 612, 618, 622, 624, 628, 630, 631, 641, 643, + 645, 650, 652, 654, 657, 661, 662, 664, 666, 668, + 670, 672, 674, 676, 678, 680, 684, 686, 692, 694, + 696, 698, 700, 702, 704, 707, 710, 713, 717, 720, + 721, 723, 726, 729, 733, 743, 753, 762, 777, 779, + 781, 788, 794, 797, 804, 812, 816, 822, 823, 824, + 828, 831, 833, 839, 845, 852, 859, 864, 871, 876, + 881, 888, 895, 898, 907, 909, 911, 912, 916, 923, + 927, 934, 937, 943, 951 +}; -#if YYDEBUG != 0 || defined (YYERROR_VERBOSE) +/* YYRHS -- A `-1'-separated list of the rules' RHS. */ +static const short int yyrhs[] = +{ + 201, 0, -1, 70, -1, 71, -1, 72, -1, 73, + -1, 74, -1, 75, -1, 76, -1, 77, -1, 78, + -1, 82, -1, 83, -1, 84, -1, 79, -1, 80, + -1, 81, -1, 113, -1, 114, -1, 115, -1, 116, + -1, 117, -1, 118, -1, 119, -1, 120, -1, 121, + -1, 122, -1, 123, -1, 124, -1, 87, -1, 88, + -1, 89, -1, 90, -1, 91, -1, 92, -1, 93, + -1, 94, -1, 95, -1, 96, -1, 97, -1, 98, + -1, 99, -1, 100, -1, 101, -1, 102, -1, 103, + -1, 104, -1, 105, -1, 106, -1, 93, -1, 94, + -1, 95, -1, 96, -1, 23, -1, 24, -1, 11, + -1, 12, -1, 13, -1, 16, -1, 19, -1, 21, + -1, 165, -1, -1, 165, 143, -1, -1, 17, -1, + 20, -1, 170, -1, -1, 168, 143, -1, 39, -1, + 41, -1, 40, -1, 42, -1, 44, -1, 43, -1, + 45, -1, 47, -1, -1, 140, -1, 141, -1, 142, + -1, -1, 43, -1, 45, -1, -1, 39, -1, 40, + -1, 41, -1, 44, -1, -1, 41, -1, 39, -1, + -1, 58, -1, 59, -1, 60, -1, 61, -1, 62, + -1, 57, 4, -1, 132, -1, 114, -1, 131, -1, + 115, -1, 134, -1, 135, -1, 137, -1, 138, -1, + 139, -1, -1, 179, 178, -1, 133, -1, 136, -1, + 132, -1, 131, -1, -1, 181, 180, -1, -1, 50, + 4, -1, -1, 144, 50, 4, -1, 31, 19, -1, + -1, 184, -1, -1, 144, 187, 186, -1, 184, -1, + 50, 4, -1, 11, -1, 12, -1, 13, -1, 14, + -1, 46, -1, 188, -1, 189, 145, -1, 223, -1, + 146, 4, -1, 189, 147, 193, 148, 181, -1, 10, + 147, 193, 148, 181, -1, 149, 4, 150, 189, 151, + -1, 152, 4, 150, 189, 153, -1, 154, 194, 155, + -1, 154, 155, -1, 152, 154, 194, 155, 153, -1, + 152, 154, 155, 153, -1, 189, 179, -1, 189, -1, + 10, -1, 190, -1, 192, 144, 190, -1, 192, -1, + 192, 144, 36, -1, 36, -1, -1, 189, -1, 194, + 144, 189, -1, 189, 149, 197, 151, -1, 189, 149, + 151, -1, 189, 156, 19, -1, 189, 152, 197, 153, + -1, 189, 154, 197, 155, -1, 189, 154, 155, -1, + 189, 152, 154, 197, 155, 153, -1, 189, 152, 154, + 155, 153, -1, 189, 37, -1, 189, 38, -1, 189, + 223, -1, 189, 196, -1, 189, 22, -1, 163, 3, + -1, 163, 5, -1, 163, 4, -1, 163, 6, -1, + 11, 23, -1, 11, 24, -1, 164, 9, -1, 160, + 147, 195, 35, 189, 148, -1, 112, 147, 195, 234, + 148, -1, 126, 147, 195, 144, 195, 144, 195, 148, + -1, 158, 147, 195, 144, 195, 148, -1, 159, 147, + 195, 144, 195, 148, -1, 85, 161, 147, 195, 144, + 195, 148, -1, 86, 162, 147, 195, 144, 195, 148, + -1, 128, 147, 195, 144, 195, 148, -1, 129, 147, + 195, 144, 195, 144, 195, 148, -1, 130, 147, 195, + 144, 195, 144, 195, 148, -1, 197, 144, 195, -1, + 195, -1, 29, -1, 30, -1, 34, -1, -1, 191, + 223, -1, 118, 147, 200, 35, 189, 148, -1, 202, + -1, -1, 203, -1, 202, 203, -1, -1, 28, 204, + 219, -1, -1, 27, 205, 220, -1, 55, 54, 209, + -1, 167, 15, 189, -1, 167, 15, 10, -1, -1, + 169, 173, 199, 198, 195, 206, 186, -1, -1, 169, + 171, 173, 199, 198, 195, 207, 186, -1, -1, 169, + 172, 173, 199, 198, 189, 208, 186, -1, 169, 173, + 32, 176, 200, -1, 48, 210, -1, 51, 143, 211, + -1, 19, -1, 49, 143, 19, -1, 63, 143, 19, + -1, 149, 212, 151, -1, 212, 144, 19, -1, 19, + -1, -1, 213, 144, 189, 179, 166, -1, 189, 179, + 166, -1, 213, -1, 213, 144, 36, -1, 36, -1, + -1, 177, 191, 168, 147, 214, 148, 181, 185, 182, + -1, 25, -1, 154, -1, 175, 173, 215, 216, -1, + 26, -1, 155, -1, 226, 218, -1, 174, 173, 215, + -1, -1, 56, -1, 3, -1, 4, -1, 9, -1, + 23, -1, 24, -1, 37, -1, 38, -1, 22, -1, + 152, 197, 153, -1, 196, -1, 54, 221, 19, 144, + 19, -1, 7, -1, 8, -1, 165, -1, 168, -1, + 223, -1, 222, -1, 189, 224, -1, 226, 227, -1, + 217, 227, -1, 228, 167, 229, -1, 228, 231, -1, + -1, 18, -1, 64, 225, -1, 64, 10, -1, 65, + 14, 224, -1, 65, 11, 224, 144, 14, 224, 144, + 14, 224, -1, 66, 163, 224, 144, 14, 224, 149, + 230, 151, -1, 66, 163, 224, 144, 14, 224, 149, + 151, -1, 67, 177, 191, 224, 147, 233, 148, 181, + 35, 14, 224, 68, 14, 224, -1, 68, -1, 69, + -1, 230, 163, 222, 144, 14, 224, -1, 163, 222, + 144, 14, 224, -1, 167, 236, -1, 189, 149, 224, + 144, 224, 151, -1, 232, 144, 149, 224, 144, 224, + 151, -1, 189, 224, 179, -1, 233, 144, 189, 224, + 179, -1, -1, -1, 234, 144, 225, -1, 53, 52, + -1, 52, -1, 158, 189, 224, 144, 224, -1, 159, + 189, 224, 144, 224, -1, 85, 161, 189, 224, 144, + 224, -1, 86, 162, 189, 224, 144, 224, -1, 160, + 225, 35, 189, -1, 126, 225, 144, 225, 144, 225, + -1, 127, 225, 144, 189, -1, 128, 225, 144, 225, + -1, 129, 225, 144, 225, 144, 225, -1, 130, 225, + 144, 225, 144, 225, -1, 125, 232, -1, 235, 177, + 191, 224, 147, 233, 148, 181, -1, 238, -1, 33, + -1, -1, 107, 189, 183, -1, 107, 189, 144, 11, + 224, 183, -1, 108, 189, 183, -1, 108, 189, 144, + 11, 224, 183, -1, 109, 225, -1, 237, 110, 189, + 224, 183, -1, 237, 111, 225, 144, 189, 224, 183, + -1, 112, 189, 224, 234, -1 +}; -static const char * const yytname[] = { "$","error","$undefined.","ESINT64VAL", -"EUINT64VAL","ESAPINTVAL","EUAPINTVAL","LOCALVAL_ID","GLOBALVAL_ID","FPVAL", -"VOID","INTTYPE","FLOAT","DOUBLE","LABEL","TYPE","LOCALVAR","GLOBALVAR","LABELSTR", -"STRINGCONSTANT","ATSTRINGCONSTANT","PCTSTRINGCONSTANT","ZEROINITIALIZER","TRUETOK", -"FALSETOK","BEGINTOK","ENDTOK","DECLARE","DEFINE","GLOBAL","CONSTANT","SECTION", -"ALIAS","VOLATILE","THREAD_LOCAL","TO","DOTDOTDOT","NULL_TOK","UNDEF","INTERNAL", -"LINKONCE","WEAK","APPENDING","DLLIMPORT","DLLEXPORT","EXTERN_WEAK","OPAQUE", -"EXTERNAL","TARGET","TRIPLE","ALIGN","DEPLIBS","CALL","TAIL","ASM_TOK","MODULE", -"SIDEEFFECT","CC_TOK","CCC_TOK","FASTCC_TOK","COLDCC_TOK","X86_STDCALLCC_TOK", -"X86_FASTCALLCC_TOK","DATALAYOUT","RET","BR","SWITCH","INVOKE","UNWIND","UNREACHABLE", -"ADD","SUB","MUL","UDIV","SDIV","FDIV","UREM","SREM","FREM","AND","OR","XOR", -"SHL","LSHR","ASHR","ICMP","FCMP","EQ","NE","SLT","SGT","SLE","SGE","ULT","UGT", -"ULE","UGE","OEQ","ONE","OLT","OGT","OLE","OGE","ORD","UNO","UEQ","UNE","MALLOC", -"ALLOCA","FREE","LOAD","STORE","GETELEMENTPTR","TRUNC","ZEXT","SEXT","FPTRUNC", -"FPEXT","BITCAST","UITOFP","SITOFP","FPTOUI","FPTOSI","INTTOPTR","PTRTOINT", -"PHI_TOK","SELECT","VAARG","EXTRACTELEMENT","INSERTELEMENT","SHUFFLEVECTOR", -"NORETURN","INREG","SRET","NOUNWIND","NOALIAS","DEFAULT","HIDDEN","PROTECTED", -"'='","','","'*'","'\\\\'","'('","')'","'['","'x'","']'","'<'","'>'","'{'","'}'", -"'c'","ArithmeticOps","LogicalOps","CastOps","IPredicates","FPredicates","IntType", -"FPType","LocalName","OptLocalName","OptLocalAssign","GlobalName","OptGlobalAssign", -"GlobalAssign","GVInternalLinkage","GVExternalLinkage","GVVisibilityStyle","FunctionDeclareLinkage", -"FunctionDefineLinkage","AliasLinkage","OptCallingConv","ParamAttr","OptParamAttrs", -"FuncAttr","OptFuncAttrs","OptAlign","OptCAlign","SectionString","OptSection", -"GlobalVarAttributes","GlobalVarAttribute","PrimType","Types","ArgType","ResultTypes", -"ArgTypeList","ArgTypeListI","TypeListI","ConstVal","ConstExpr","ConstVector", -"GlobalType","ThreadLocal","AliaseeRef","Module","DefinitionList","Definition", -"@1","@2","@3","@4","@5","AsmBlock","TargetDefinition","LibrariesDefinition", -"LibList","ArgListH","ArgList","FunctionHeaderH","BEGIN","FunctionHeader","END", -"Function","FunctionProto","OptSideEffect","ConstValueRef","SymbolicValueRef", -"ValueRef","ResolvedVal","BasicBlockList","BasicBlock","InstructionList","BBTerminatorInst", -"JumpTable","Inst","PHIList","ValueRefList","IndexList","OptTailCall","InstVal", -"OptVolatile","MemoryInst", NULL +/* YYRLINE[YYN] -- source line where rule number YYN was defined. */ +static const unsigned short int yyrline[] = +{ + 0, 1116, 1116, 1116, 1116, 1116, 1116, 1116, 1116, 1116, + 1116, 1117, 1117, 1117, 1117, 1117, 1117, 1118, 1118, 1118, + 1118, 1118, 1118, 1119, 1119, 1119, 1119, 1119, 1119, 1122, + 1122, 1123, 1123, 1124, 1124, 1125, 1125, 1126, 1126, 1130, + 1130, 1131, 1131, 1132, 1132, 1133, 1133, 1134, 1134, 1135, + 1135, 1136, 1136, 1137, 1138, 1143, 1144, 1144, 1146, 1146, + 1146, 1147, 1147, 1151, 1155, 1160, 1160, 1162, 1163, 1168, + 1174, 1175, 1176, 1177, 1178, 1182, 1183, 1184, 1188, 1189, + 1190, 1191, 1195, 1196, 1197, 1201, 1202, 1203, 1204, 1205, + 1209, 1210, 1211, 1214, 1215, 1216, 1217, 1218, 1219, 1220, + 1227, 1228, 1229, 1230, 1231, 1232, 1233, 1234, 1235, 1238, + 1239, 1244, 1245, 1246, 1247, 1250, 1251, 1258, 1259, 1265, + 1266, 1274, 1282, 1283, 1288, 1289, 1290, 1295, 1308, 1308, + 1308, 1308, 1311, 1315, 1319, 1326, 1331, 1339, 1369, 1400, + 1405, 1417, 1427, 1431, 1441, 1448, 1455, 1462, 1467, 1472, + 1479, 1480, 1487, 1494, 1502, 1508, 1520, 1548, 1564, 1591, + 1619, 1645, 1665, 1691, 1711, 1723, 1730, 1796, 1806, 1816, + 1822, 1832, 1838, 1848, 1853, 1858, 1866, 1878, 1900, 1908, + 1914, 1925, 1930, 1935, 1941, 1947, 1956, 1960, 1968, 1968, + 1971, 1971, 1974, 1985, 2006, 2011, 2019, 2020, 2024, 2024, + 2028, 2028, 2031, 2034, 2058, 2069, 2069, 2080, 2079, 2089, + 2088, 2099, 2118, 2121, 2127, 2137, 2141, 2146, 2148, 2153, + 2158, 2167, 2177, 2188, 2192, 2201, 2210, 2215, 2336, 2336, + 2338, 2347, 2347, 2349, 2354, 2366, 2370, 2375, 2379, 2383, + 2387, 2391, 2395, 2399, 2403, 2407, 2432, 2436, 2446, 2450, + 2454, 2459, 2466, 2466, 2472, 2481, 2485, 2494, 2503, 2512, + 2516, 2523, 2527, 2531, 2536, 2546, 2565, 2574, 2654, 2658, + 2665, 2676, 2689, 2699, 2710, 2720, 2729, 2738, 2741, 2742, + 2749, 2753, 2758, 2779, 2796, 2810, 2824, 2836, 2844, 2851, + 2857, 2863, 2869, 2884, 2969, 2974, 2978, 2985, 2992, 3000, + 3007, 3015, 3023, 3037, 3054 }; #endif -static const short yyr1[] = { 0, - 153, 153, 153, 153, 153, 153, 153, 153, 153, 154, - 154, 154, 154, 154, 154, 155, 155, 155, 155, 155, - 155, 155, 155, 155, 155, 155, 155, 156, 156, 156, - 156, 156, 156, 156, 156, 156, 156, 157, 157, 157, - 157, 157, 157, 157, 157, 157, 157, 157, 157, 157, - 157, 157, 157, 158, 159, 159, 160, 160, 160, 161, - 161, 162, 162, 163, 163, 164, 164, 165, 166, 166, - 166, 166, 166, 167, 167, 167, 168, 168, 168, 168, - 169, 169, 169, 170, 170, 170, 170, 170, 171, 171, - 171, 172, 172, 172, 172, 172, 172, 172, 173, 173, - 173, 173, 173, 174, 174, 175, 175, 175, 176, 176, - 177, 177, 178, 178, 179, 180, 180, 181, 181, 182, - 182, 183, 183, 183, 183, 184, 184, 184, 184, 184, - 184, 184, 184, 184, 184, 184, 184, 184, 185, 186, - 186, 187, 187, 188, 188, 188, 188, 189, 189, 190, - 190, 190, 190, 190, 190, 190, 190, 190, 190, 190, - 190, 190, 190, 190, 190, 190, 190, 190, 190, 191, - 191, 191, 191, 191, 191, 191, 191, 191, 191, 192, - 192, 193, 193, 194, 194, 195, 195, 196, 196, 197, - 197, 199, 198, 200, 198, 198, 198, 198, 201, 198, - 202, 198, 203, 198, 198, 198, 198, 204, 205, 205, - 206, 207, 207, 207, 208, 208, 209, 209, 209, 209, - 210, 211, 211, 212, 213, 213, 214, 215, 216, 216, - 217, 217, 217, 217, 217, 217, 217, 217, 217, 217, - 217, 218, 218, 218, 218, 219, 219, 220, 221, 221, - 222, 223, 223, 223, 224, 224, 224, 224, 224, 224, - 224, 224, 224, 225, 225, 226, 227, 227, 228, 228, - 228, 229, 229, 230, 230, 231, 231, 231, 231, 231, - 231, 231, 231, 231, 231, 231, 231, 231, 232, 232, - 233, 233, 233, 233, 233, 233, 233, 233 +#if YYDEBUG || YYERROR_VERBOSE || YYTOKEN_TABLE +/* YYTNAME[SYMBOL-NUM] -- String name of the symbol SYMBOL-NUM. + First, the terminals, then, starting at YYNTOKENS, nonterminals. */ +static const char *const yytname[] = +{ + "$end", "error", "$undefined", "ESINT64VAL", "EUINT64VAL", "ESAPINTVAL", + "EUAPINTVAL", "LOCALVAL_ID", "GLOBALVAL_ID", "FPVAL", "VOID", "INTTYPE", + "FLOAT", "DOUBLE", "LABEL", "TYPE", "LOCALVAR", "GLOBALVAR", "LABELSTR", + "STRINGCONSTANT", "ATSTRINGCONSTANT", "PCTSTRINGCONSTANT", + "ZEROINITIALIZER", "TRUETOK", "FALSETOK", "BEGINTOK", "ENDTOK", + "DECLARE", "DEFINE", "GLOBAL", "CONSTANT", "SECTION", "ALIAS", + "VOLATILE", "THREAD_LOCAL", "TO", "DOTDOTDOT", "NULL_TOK", "UNDEF", + "INTERNAL", "LINKONCE", "WEAK", "APPENDING", "DLLIMPORT", "DLLEXPORT", + "EXTERN_WEAK", "OPAQUE", "EXTERNAL", "TARGET", "TRIPLE", "ALIGN", + "DEPLIBS", "CALL", "TAIL", "ASM_TOK", "MODULE", "SIDEEFFECT", "CC_TOK", + "CCC_TOK", "FASTCC_TOK", "COLDCC_TOK", "X86_STDCALLCC_TOK", + "X86_FASTCALLCC_TOK", "DATALAYOUT", "RET", "BR", "SWITCH", "INVOKE", + "UNWIND", "UNREACHABLE", "ADD", "SUB", "MUL", "UDIV", "SDIV", "FDIV", + "UREM", "SREM", "FREM", "AND", "OR", "XOR", "SHL", "LSHR", "ASHR", + "ICMP", "FCMP", "EQ", "NE", "SLT", "SGT", "SLE", "SGE", "ULT", "UGT", + "ULE", "UGE", "OEQ", "ONE", "OLT", "OGT", "OLE", "OGE", "ORD", "UNO", + "UEQ", "UNE", "MALLOC", "ALLOCA", "FREE", "LOAD", "STORE", + "GETELEMENTPTR", "TRUNC", "ZEXT", "SEXT", "FPTRUNC", "FPEXT", "BITCAST", + "UITOFP", "SITOFP", "FPTOUI", "FPTOSI", "INTTOPTR", "PTRTOINT", + "PHI_TOK", "SELECT", "VAARG", "EXTRACTELEMENT", "INSERTELEMENT", + "SHUFFLEVECTOR", "SIGNEXT", "ZEROEXT", "NORETURN", "INREG", "SRET", + "NOUNWIND", "NOALIAS", "BYVAL", "NEST", "DEFAULT", "HIDDEN", "PROTECTED", + "'='", "','", "'*'", "'\\\\'", "'('", "')'", "'['", "'x'", "']'", "'<'", + "'>'", "'{'", "'}'", "'c'", "$accept", "ArithmeticOps", "LogicalOps", + "CastOps", "IPredicates", "FPredicates", "IntType", "FPType", + "LocalName", "OptLocalName", "OptLocalAssign", "GlobalName", + "OptGlobalAssign", "GlobalAssign", "GVInternalLinkage", + "GVExternalLinkage", "GVVisibilityStyle", "FunctionDeclareLinkage", + "FunctionDefineLinkage", "AliasLinkage", "OptCallingConv", "ParamAttr", + "OptParamAttrs", "FuncAttr", "OptFuncAttrs", "OptAlign", "OptCAlign", + "SectionString", "OptSection", "GlobalVarAttributes", + "GlobalVarAttribute", "PrimType", "Types", "ArgType", "ResultTypes", + "ArgTypeList", "ArgTypeListI", "TypeListI", "ConstVal", "ConstExpr", + "ConstVector", "GlobalType", "ThreadLocal", "AliaseeRef", "Module", + "DefinitionList", "Definition", "@1", "@2", "@3", "@4", "@5", "AsmBlock", + "TargetDefinition", "LibrariesDefinition", "LibList", "ArgListH", + "ArgList", "FunctionHeaderH", "BEGIN", "FunctionHeader", "END", + "Function", "FunctionProto", "OptSideEffect", "ConstValueRef", + "SymbolicValueRef", "ValueRef", "ResolvedVal", "BasicBlockList", + "BasicBlock", "InstructionList", "BBTerminatorInst", "JumpTable", "Inst", + "PHIList", "ValueRefList", "IndexList", "OptTailCall", "InstVal", + "OptVolatile", "MemoryInst", 0 }; +#endif -static const short yyr2[] = { 0, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 0, 2, 0, 1, 1, 1, 0, 2, 1, 1, - 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, - 0, 1, 1, 0, 1, 1, 1, 1, 0, 1, - 1, 0, 1, 1, 1, 1, 1, 2, 1, 1, - 1, 1, 1, 0, 2, 1, 1, 1, 0, 2, - 0, 2, 0, 3, 2, 0, 1, 0, 3, 1, - 2, 1, 1, 1, 1, 1, 1, 2, 1, 2, - 5, 5, 5, 5, 3, 2, 5, 4, 2, 1, - 1, 1, 3, 1, 3, 1, 0, 1, 3, 4, - 3, 3, 4, 4, 3, 6, 5, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 6, - 5, 8, 6, 6, 7, 7, 6, 8, 8, 3, - 1, 1, 1, 1, 0, 2, 6, 1, 0, 1, - 2, 0, 3, 0, 3, 3, 3, 3, 0, 7, - 0, 8, 0, 8, 5, 2, 3, 1, 3, 3, - 3, 3, 1, 0, 5, 3, 1, 3, 1, 0, - 9, 1, 1, 4, 1, 1, 2, 3, 0, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 3, 1, - 5, 1, 1, 1, 1, 1, 1, 2, 2, 2, - 3, 2, 0, 1, 2, 2, 3, 9, 9, 8, - 14, 1, 1, 6, 5, 2, 6, 7, 3, 5, - 0, 0, 3, 2, 1, 5, 5, 6, 6, 4, - 6, 4, 4, 6, 6, 2, 8, 1, 1, 0, - 3, 6, 3, 6, 2, 5, 7, 4 +# ifdef YYPRINT +/* YYTOKNUM[YYLEX-NUM] -- Internal token number corresponding to + token YYLEX-NUM. */ +static const unsigned short int yytoknum[] = +{ + 0, 256, 257, 258, 259, 260, 261, 262, 263, 264, + 265, 266, 267, 268, 269, 270, 271, 272, 273, 274, + 275, 276, 277, 278, 279, 280, 281, 282, 283, 284, + 285, 286, 287, 288, 289, 290, 291, 292, 293, 294, + 295, 296, 297, 298, 299, 300, 301, 302, 303, 304, + 305, 306, 307, 308, 309, 310, 311, 312, 313, 314, + 315, 316, 317, 318, 319, 320, 321, 322, 323, 324, + 325, 326, 327, 328, 329, 330, 331, 332, 333, 334, + 335, 336, 337, 338, 339, 340, 341, 342, 343, 344, + 345, 346, 347, 348, 349, 350, 351, 352, 353, 354, + 355, 356, 357, 358, 359, 360, 361, 362, 363, 364, + 365, 366, 367, 368, 369, 370, 371, 372, 373, 374, + 375, 376, 377, 378, 379, 380, 381, 382, 383, 384, + 385, 386, 387, 388, 389, 390, 391, 392, 393, 394, + 395, 396, 397, 61, 44, 42, 92, 40, 41, 91, + 120, 93, 60, 62, 123, 125, 99 }; +# endif -static const short yydefact[] = { 67, - 57, 64, 58, 65, 59, 194, 192, 0, 0, 0, - 0, 0, 0, 77, 66, 67, 190, 81, 84, 0, - 0, 206, 0, 0, 62, 0, 68, 69, 71, 70, - 72, 74, 73, 75, 76, 78, 79, 80, 77, 77, - 185, 191, 82, 83, 77, 195, 85, 86, 87, 88, - 77, 253, 193, 253, 0, 0, 214, 207, 208, 196, - 242, 243, 198, 122, 123, 124, 125, 126, 0, 0, - 0, 0, 244, 245, 127, 197, 129, 185, 185, 89, - 184, 0, 92, 92, 254, 250, 63, 225, 226, 227, - 249, 209, 210, 213, 0, 147, 130, 0, 0, 0, - 0, 136, 148, 0, 128, 147, 0, 0, 91, 90, - 0, 182, 183, 0, 0, 93, 94, 95, 96, 97, - 0, 228, 0, 290, 252, 0, 211, 146, 104, 142, - 144, 0, 0, 0, 0, 0, 0, 135, 0, 0, - 0, 141, 0, 140, 0, 205, 122, 123, 124, 0, - 0, 0, 199, 98, 0, 222, 223, 224, 289, 275, - 0, 0, 0, 0, 92, 262, 263, 1, 2, 3, - 4, 5, 6, 7, 8, 9, 13, 14, 15, 10, - 11, 12, 0, 0, 0, 0, 0, 0, 16, 17, - 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 251, - 92, 266, 0, 288, 212, 139, 0, 109, 0, 0, - 138, 0, 149, 109, 201, 203, 0, 186, 167, 168, - 163, 165, 164, 166, 169, 162, 158, 159, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 161, 160, 118, 0, 274, 256, 0, 255, - 0, 0, 54, 0, 0, 28, 29, 30, 31, 32, - 33, 34, 35, 36, 37, 0, 52, 53, 48, 49, - 50, 51, 38, 39, 40, 41, 42, 43, 44, 45, - 46, 47, 0, 113, 113, 295, 0, 0, 286, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 99, 100, 101, 102, 103, 105, 145, 143, 132, 133, - 134, 137, 131, 118, 118, 0, 0, 0, 0, 0, - 0, 0, 0, 151, 181, 0, 0, 0, 155, 0, - 152, 0, 0, 0, 0, 200, 220, 231, 232, 233, - 238, 234, 235, 236, 237, 229, 0, 240, 247, 246, - 248, 0, 257, 0, 0, 0, 0, 0, 291, 0, - 293, 272, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 106, 107, 108, 110, 202, - 204, 0, 0, 0, 272, 0, 0, 0, 0, 0, - 150, 136, 148, 0, 153, 154, 0, 0, 0, 0, - 0, 120, 118, 219, 104, 217, 0, 230, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 298, 0, - 0, 0, 282, 283, 0, 0, 0, 0, 280, 0, - 113, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 180, 157, 0, 0, 0, 0, 115, 121, 119, 61, - 0, 109, 0, 239, 0, 0, 271, 0, 0, 113, - 114, 113, 0, 0, 0, 0, 0, 0, 276, 277, - 271, 0, 296, 0, 187, 0, 0, 171, 0, 0, - 0, 0, 156, 0, 0, 0, 60, 216, 218, 104, - 116, 0, 0, 0, 0, 0, 278, 279, 292, 294, - 273, 0, 0, 281, 284, 285, 0, 113, 0, 0, - 0, 177, 0, 0, 173, 174, 170, 61, 117, 111, - 241, 0, 0, 104, 0, 109, 267, 0, 109, 297, - 175, 176, 0, 0, 0, 215, 0, 221, 0, 260, - 0, 0, 269, 0, 0, 268, 287, 172, 178, 179, - 112, 258, 0, 259, 0, 104, 0, 0, 0, 270, - 0, 0, 0, 0, 265, 0, 0, 264, 0, 261, - 0, 0, 0 +/* YYR1[YYN] -- Symbol number of symbol that rule YYN derives. */ +static const unsigned char yyr1[] = +{ + 0, 157, 158, 158, 158, 158, 158, 158, 158, 158, + 158, 159, 159, 159, 159, 159, 159, 160, 160, 160, + 160, 160, 160, 160, 160, 160, 160, 160, 160, 161, + 161, 161, 161, 161, 161, 161, 161, 161, 161, 162, + 162, 162, 162, 162, 162, 162, 162, 162, 162, 162, + 162, 162, 162, 162, 162, 163, 164, 164, 165, 165, + 165, 166, 166, 167, 167, 168, 168, 169, 169, 170, + 171, 171, 171, 171, 171, 172, 172, 172, 173, 173, + 173, 173, 174, 174, 174, 175, 175, 175, 175, 175, + 176, 176, 176, 177, 177, 177, 177, 177, 177, 177, + 178, 178, 178, 178, 178, 178, 178, 178, 178, 179, + 179, 180, 180, 180, 180, 181, 181, 182, 182, 183, + 183, 184, 185, 185, 186, 186, 187, 187, 188, 188, + 188, 188, 189, 189, 189, 189, 189, 189, 189, 189, + 189, 189, 189, 189, 189, 190, 191, 191, 192, 192, + 193, 193, 193, 193, 194, 194, 195, 195, 195, 195, + 195, 195, 195, 195, 195, 195, 195, 195, 195, 195, + 195, 195, 195, 195, 195, 195, 196, 196, 196, 196, + 196, 196, 196, 196, 196, 196, 197, 197, 198, 198, + 199, 199, 200, 200, 201, 201, 202, 202, 204, 203, + 205, 203, 203, 203, 203, 206, 203, 207, 203, 208, + 203, 203, 203, 203, 209, 210, 210, 211, 212, 212, + 212, 213, 213, 214, 214, 214, 214, 215, 216, 216, + 217, 218, 218, 219, 220, 221, 221, 222, 222, 222, + 222, 222, 222, 222, 222, 222, 222, 222, 223, 223, + 223, 223, 224, 224, 225, 226, 226, 227, 228, 228, + 228, 229, 229, 229, 229, 229, 229, 229, 229, 229, + 230, 230, 231, 232, 232, 233, 233, 233, 234, 234, + 235, 235, 236, 236, 236, 236, 236, 236, 236, 236, + 236, 236, 236, 236, 236, 237, 237, 238, 238, 238, + 238, 238, 238, 238, 238 }; -static const short yydefgoto[] = { 250, - 251, 252, 276, 293, 150, 151, 73, 498, 12, 74, - 14, 15, 39, 40, 41, 45, 51, 111, 121, 316, - 216, 389, 319, 548, 369, 412, 530, 346, 413, 75, - 152, 130, 145, 131, 132, 104, 335, 358, 336, 114, - 82, 146, 581, 16, 17, 19, 18, 255, 324, 325, - 60, 22, 58, 95, 416, 417, 122, 158, 52, 90, - 53, 46, 419, 359, 77, 361, 260, 54, 86, 87, - 210, 552, 125, 299, 506, 429, 211, 212, 213, 214 +/* YYR2[YYN] -- Number of symbols composing right hand side of rule YYN. */ +static const unsigned char yyr2[] = +{ + 0, 2, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 0, 2, 0, 1, 1, 1, 0, 2, + 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, + 1, 1, 0, 1, 1, 0, 1, 1, 1, 1, + 0, 1, 1, 0, 1, 1, 1, 1, 1, 2, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, + 2, 1, 1, 1, 1, 0, 2, 0, 2, 0, + 3, 2, 0, 1, 0, 3, 1, 2, 1, 1, + 1, 1, 1, 1, 2, 1, 2, 5, 5, 5, + 5, 3, 2, 5, 4, 2, 1, 1, 1, 3, + 1, 3, 1, 0, 1, 3, 4, 3, 3, 4, + 4, 3, 6, 5, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 6, 5, 8, 6, + 6, 7, 7, 6, 8, 8, 3, 1, 1, 1, + 1, 0, 2, 6, 1, 0, 1, 2, 0, 3, + 0, 3, 3, 3, 3, 0, 7, 0, 8, 0, + 8, 5, 2, 3, 1, 3, 3, 3, 3, 1, + 0, 5, 3, 1, 3, 1, 0, 9, 1, 1, + 4, 1, 1, 2, 3, 0, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 3, 1, 5, 1, 1, + 1, 1, 1, 1, 2, 2, 2, 3, 2, 0, + 1, 2, 2, 3, 9, 9, 8, 14, 1, 1, + 6, 5, 2, 6, 7, 3, 5, 0, 0, 3, + 2, 1, 5, 5, 6, 6, 4, 6, 4, 4, + 6, 6, 2, 8, 1, 1, 0, 3, 6, 3, + 6, 2, 5, 7, 4 }; -static const short yypact[] = { 1026, --32768,-32768,-32768,-32768,-32768,-32768,-32768, -3, -63, 44, - -10, 142, 62, 336,-32768, 1490,-32768, 107, 131, 74, - 127,-32768, -27, 149,-32768, 1195,-32768,-32768,-32768,-32768, --32768,-32768,-32768,-32768,-32768,-32768,-32768,-32768, 93, 93, - 214,-32768,-32768,-32768, 93,-32768,-32768,-32768,-32768,-32768, - 93, 155,-32768, 13, 239, 253, 258,-32768,-32768,-32768, --32768,-32768, 139,-32768,-32768,-32768,-32768,-32768, 282, 284, - 5, 128,-32768,-32768,-32768, 124,-32768, 256, 256, 230, --32768, 34, 163, 163,-32768,-32768, 184,-32768,-32768,-32768, --32768,-32768,-32768,-32768, -30, 956,-32768, 147, 151, 910, - 139,-32768, 124, -74,-32768, 956, 34, 34,-32768,-32768, - 987,-32768,-32768, 1210, 302,-32768,-32768,-32768,-32768,-32768, - 1247,-32768, 15, 1353,-32768, 290,-32768,-32768, 124,-32768, - 170, 173, 1262, 1262, 162, -68, 1262,-32768, 174, 1210, - 1262, 139, 177, 124, 83,-32768, 38, 312, 314, 251, - 315, 764,-32768,-32768, 126,-32768,-32768,-32768,-32768,-32768, - 273, 1308, 227, 317, 163,-32768,-32768,-32768,-32768,-32768, --32768,-32768,-32768,-32768,-32768,-32768,-32768,-32768,-32768,-32768, --32768,-32768, 566, 613, 1262, 1262, 1262, 1262,-32768,-32768, --32768,-32768,-32768,-32768,-32768,-32768,-32768,-32768,-32768,-32768, - 1262, 1262, 1262, 1262, 1262, 1262, 1262, 1262, 1262,-32768, - 163,-32768, -4,-32768,-32768, -77, 1002,-32768, -59, 63, --32768, 182, 124,-32768,-32768, 124, 987,-32768,-32768,-32768, --32768,-32768,-32768,-32768,-32768,-32768,-32768,-32768, 566, 613, - 189, 190, 191, 193, 194, 1100, 1354, 925, 319, 196, - 197, 198,-32768,-32768, 203, 199,-32768, 139, 611,-32768, - 741, 741,-32768, 741, 1247,-32768,-32768,-32768,-32768,-32768, --32768,-32768,-32768,-32768,-32768, 1262,-32768,-32768,-32768,-32768, --32768,-32768,-32768,-32768,-32768,-32768,-32768,-32768,-32768,-32768, --32768,-32768, 1262, 109, 119,-32768, 611, 94, 204, 206, - 207, 208, 209, 215, 611, 611, 321, 1247, 1262, 1262, --32768,-32768,-32768,-32768,-32768,-32768,-32768,-32768, -82,-32768, --32768,-32768, -82, 203, 203, 323, 218, 220, 1210, 1210, - 1210, 1210, 1210,-32768,-32768, -21, 941, -92,-32768, -62, --32768, 1210, 1210, 1210, -5,-32768, 1146,-32768,-32768,-32768, --32768,-32768,-32768,-32768,-32768, 313, 1210,-32768,-32768,-32768, --32768, 228,-32768, 233, 741, 611, 611, 4,-32768, 17, --32768,-32768, 741, 225, 1262, 1262, 1262, 1262, 1262, 242, - 244, 1262, 741, 611, 245,-32768,-32768,-32768,-32768,-32768, --32768, 1262, 1210, 1210,-32768, 246, 247, 248, 249, 1210, --32768, 241, 764, -46,-32768,-32768, 252, 254, 358, 377, - 393,-32768, 203,-32768, 124, 259, 257,-32768, 379, -70, - 386, 388, 262, 266, 267, 741, 404, 741, 269, 271, - 741, 272, 124,-32768, 274, 276, 741, 741, 124, 270, - 283, 1262, 45, 287, 288, 70, 1210, 1210, 1210, 1210, --32768,-32768, 275, 1210, 1210, 1262,-32768,-32768,-32768, 76, - 1164,-32768, 289,-32768, 741, 741, 1262, 741, 741, 283, --32768, 283, 1262, 741, 294, 1262, 1262, 1262,-32768,-32768, - 1262, 372,-32768, 611,-32768, 1210, 1210,-32768, 295, 286, - 298, 299,-32768, 297, 300, 164,-32768,-32768,-32768, 124, - 84, 424, 305, 301, 611, 92,-32768,-32768,-32768,-32768, --32768, 303, 741,-32768,-32768,-32768, 103, 283, 310, 311, - 1210,-32768, 1210, 1210,-32768,-32768,-32768, 76,-32768, 397, --32768, 435, 6,-32768, 1262,-32768,-32768, 320,-32768,-32768, --32768,-32768, 318, 322, 324,-32768, 455,-32768, 741,-32768, - 476, 7, -77, 611, -1,-32768, -82,-32768,-32768,-32768, --32768,-32768, 329,-32768, 476,-32768, 447, 456, 335, -77, - 741, 741, 462, 409,-32768, 741, 464,-32768, 741,-32768, - 483, 484,-32768 +/* YYDEFACT[STATE-NAME] -- Default rule to reduce with in state + STATE-NUM when YYTABLE doesn't specify something else to do. Zero + means the default is an error. */ +static const unsigned short int yydefact[] = +{ + 68, 58, 65, 59, 66, 60, 200, 198, 0, 0, + 0, 0, 0, 0, 78, 67, 0, 68, 196, 82, + 85, 0, 0, 212, 0, 0, 63, 0, 69, 70, + 72, 71, 73, 75, 74, 76, 77, 79, 80, 81, + 78, 78, 191, 1, 197, 83, 84, 78, 201, 86, + 87, 88, 89, 78, 259, 199, 259, 0, 0, 220, + 213, 214, 202, 248, 249, 204, 128, 129, 130, 131, + 132, 0, 0, 0, 0, 250, 251, 133, 203, 135, + 191, 191, 90, 190, 0, 93, 93, 260, 256, 64, + 231, 232, 233, 255, 215, 216, 219, 0, 153, 136, + 0, 0, 0, 0, 142, 154, 0, 134, 153, 0, + 0, 92, 91, 0, 188, 189, 0, 0, 94, 95, + 96, 97, 98, 0, 234, 0, 296, 258, 0, 217, + 152, 109, 148, 150, 0, 0, 0, 0, 0, 0, + 141, 0, 0, 0, 147, 0, 146, 0, 211, 128, + 129, 130, 0, 0, 0, 205, 99, 0, 228, 229, + 230, 295, 281, 0, 0, 0, 0, 93, 268, 269, + 2, 3, 4, 5, 6, 7, 8, 9, 10, 14, + 15, 16, 11, 12, 13, 0, 0, 0, 0, 0, + 0, 17, 18, 19, 20, 21, 22, 23, 24, 25, + 26, 27, 28, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 257, 93, 272, 0, 294, 218, 145, 0, + 115, 0, 0, 144, 0, 155, 115, 207, 209, 0, + 192, 173, 174, 169, 171, 170, 172, 175, 168, 164, + 165, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 167, 166, 124, 0, 280, + 262, 0, 261, 0, 0, 55, 0, 0, 29, 30, + 31, 32, 33, 34, 35, 36, 37, 38, 0, 53, + 54, 49, 50, 51, 52, 39, 40, 41, 42, 43, + 44, 45, 46, 47, 48, 0, 119, 119, 301, 0, + 0, 292, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 101, 103, 102, 100, 104, 105, 106, + 107, 108, 110, 151, 149, 138, 139, 140, 143, 137, + 124, 124, 0, 0, 0, 0, 0, 0, 0, 0, + 157, 187, 0, 0, 0, 161, 0, 158, 0, 0, + 0, 0, 206, 226, 237, 238, 239, 244, 240, 241, + 242, 243, 235, 0, 246, 253, 252, 254, 0, 263, + 0, 0, 0, 0, 0, 297, 0, 299, 278, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 114, 113, 111, 112, 116, 208, 210, 0, + 0, 0, 278, 0, 0, 0, 0, 0, 156, 142, + 154, 0, 159, 160, 0, 0, 0, 0, 0, 126, + 124, 225, 109, 223, 0, 236, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 304, 0, 0, 0, + 288, 289, 0, 0, 0, 0, 286, 0, 119, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 186, 163, + 0, 0, 0, 0, 121, 127, 125, 62, 0, 115, + 0, 245, 0, 0, 277, 0, 0, 119, 120, 119, + 0, 0, 0, 0, 0, 0, 282, 283, 277, 0, + 302, 0, 193, 0, 0, 177, 0, 0, 0, 0, + 162, 0, 0, 0, 61, 222, 224, 109, 122, 0, + 0, 0, 0, 0, 284, 285, 298, 300, 279, 0, + 0, 287, 290, 291, 0, 119, 0, 0, 0, 183, + 0, 0, 179, 180, 176, 62, 123, 117, 247, 0, + 0, 109, 0, 115, 273, 0, 115, 303, 181, 182, + 0, 0, 0, 221, 0, 227, 0, 266, 0, 0, + 275, 0, 0, 274, 293, 178, 184, 185, 118, 264, + 0, 265, 0, 109, 0, 0, 0, 276, 0, 0, + 0, 0, 271, 0, 0, 270, 0, 267 }; -static const short yypgoto[] = { 362, - 363, 364, 250, 261, -161,-32768, 0, -38, 406, 14, --32768,-32768,-32768,-32768, 29,-32768,-32768,-32768, -146, -294, - -407,-32768, -220,-32768, -285, 1,-32768, -289,-32768,-32768, - -25, 279, -114,-32768, 385, 403, -29, -150, -236, 167, - 202, 277,-32768,-32768, 481,-32768,-32768,-32768,-32768,-32768, --32768,-32768,-32768,-32768,-32768,-32768, 421,-32768,-32768,-32768, --32768,-32768,-32768, -492, -139, 98, -182,-32768, 452,-32768, --32768,-32768,-32768,-32768, 26, 113,-32768,-32768,-32768,-32768 +/* YYDEFGOTO[NTERM-NUM]. */ +static const short int yydefgoto[] = +{ + -1, 252, 253, 254, 278, 295, 152, 153, 75, 505, + 12, 76, 14, 15, 40, 41, 42, 47, 53, 113, + 123, 322, 218, 396, 325, 555, 375, 419, 537, 352, + 420, 77, 154, 132, 147, 133, 134, 106, 341, 364, + 342, 116, 84, 148, 16, 17, 18, 20, 19, 257, + 330, 331, 62, 23, 60, 97, 423, 424, 124, 160, + 54, 92, 55, 48, 426, 365, 79, 367, 262, 56, + 88, 89, 212, 559, 127, 301, 513, 436, 213, 214, + 215, 216 }; - -#define YYLAST 1545 - - -static const short yytable[] = { 11, - 76, 253, 264, 323, 296, 228, 155, 460, 99, 371, - 338, 340, 254, 13, 426, 11, 263, 263, 265, 300, - 301, 302, 303, 304, 388, 410, 307, 428, 388, 13, - 85, 311, 312, 567, 390, 391, 311, 312, 88, 156, - -54, -54, -54, -54, 411, 20, 103, 400, 386, 313, - 314, 387, 315, 427, 313, 314, 405, 315, 563, 21, - 229, 230, 112, 113, 308, 137, 427, 78, 79, 400, - 129, 137, 569, 83, 103, 23, 138, 400, 464, 84, - 129, 105, 222, 106, 153, 144, 11, 320, 406, 61, - 62, 1, 528, 400, 3, 144, 5, 24, 1, 2, - 404, 3, 4, 5, 453, 309, 310, 219, 220, 126, - 225, 223, 311, 312, 410, 226, 127, 57, 400, 360, - 420, 360, 360, 459, 360, 401, 553, 385, 25, 386, - 313, 314, 387, 315, 61, 62, 259, 101, 64, 65, - 66, 67, 2, 1, 2, 4, 3, 4, 5, 43, - 365, 44, 550, 564, 100, 483, 26, 360, 570, 294, - 295, 259, 297, 89, 157, 360, 360, 59, 256, 47, - 48, 49, 85, 68, 50, 298, 259, 259, 259, 259, - 259, 305, 306, 259, 509, 105, 510, 106, 485, 311, - 312, 129, 432, 383, 434, 435, 436, 311, 312, 1, - 27, 144, 3, 105, 5, 106, 388, 313, 314, 473, - 315, 321, 55, 488, 386, 313, 314, 387, 315, 115, - 116, 117, 118, 119, 120, 360, 360, 360, 36, 37, - 38, 535, 540, 360, 105, 536, 106, 261, 373, 144, - 262, 501, 535, 360, 360, 80, 539, 81, 368, 105, - 366, 106, 253, 231, 232, 233, 234, 92, 370, 105, - 388, 106, 388, 254, 105, 56, 106, 367, 109, 69, - 110, 93, 70, 140, 141, 71, 94, 72, 102, 107, - 108, 96, 144, 384, 259, 97, 360, 98, 360, 81, - 511, 360, 133, 514, 515, 516, 134, 360, 360, 395, - 396, 397, 398, 399, 105, 154, 106, 527, 215, 217, - 221, 403, 407, 408, 409, 555, 218, 224, 557, 227, - -55, 415, -56, 235, 257, 360, 360, 263, 360, 360, - 322, 329, 330, 331, 360, 332, 333, 341, 342, 343, - 344, 347, 345, 374, 360, 375, 376, 377, 378, 259, - 433, 259, 259, 259, 379, 382, 439, 392, 362, 363, - 393, 364, 394, 444, 445, 360, 443, 421, 418, 431, - 451, 551, 422, 360, 28, 29, 30, 31, 32, 33, - 34, 437, 35, 438, 442, 447, 448, 449, 450, 452, - 565, 454, 456, 455, 372, 457, 458, 463, 461, 465, - 462, 466, 380, 381, 467, 468, 469, 471, 473, 360, - 474, 476, 481, 477, 360, 478, 484, 489, 490, 491, - 492, 427, 482, 493, 494, 495, 486, 487, 502, 522, - 496, 360, 360, 513, 521, 500, 360, 523, 524, 360, - 525, 505, 531, 526, 532, 533, 547, 259, 549, 537, - 259, 259, 259, 541, 542, 505, 519, 520, 561, 497, - 571, 558, 423, 424, 425, 559, 556, 560, 568, 572, - 430, 36, 37, 38, 573, 576, 577, 579, 348, 349, - 440, 441, 582, 583, 350, 207, 208, 209, 327, 546, - 139, 543, 124, 544, 545, 318, 42, 351, 352, 353, - 328, 529, 136, 326, 123, 91, 517, 446, 0, 554, - 0, 0, 354, 355, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 470, 0, 472, 0, 497, 475, 356, - 0, 0, 0, 0, 479, 480, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 168, 169, 170, 171, 172, - 173, 174, 175, 176, 177, 178, 179, 180, 181, 182, - 239, 240, 503, 504, 0, 507, 508, 0, 0, 0, - 0, 512, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 518, 0, 0, 0, 0, 0, 241, 189, 190, - 191, 192, 193, 194, 195, 196, 197, 198, 199, 200, - 0, 242, 534, 243, 244, 245, 0, 0, 0, 0, - 538, 0, 0, 348, 349, 0, 0, 61, 62, 350, - 0, 0, 0, 357, 0, 0, 1, 2, 0, 3, - 4, 5, 351, 352, 353, 277, 278, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 562, 354, 355, 0, - 0, 566, 266, 267, 268, 269, 270, 271, 272, 273, - 274, 275, 0, 0, 356, 0, 0, 0, 574, 575, - 0, 0, 0, 578, 0, 0, 580, 0, 0, 0, - 168, 169, 170, 171, 172, 173, 174, 175, 176, 177, - 178, 179, 180, 181, 182, 239, 240, 0, 0, 0, - 0, 0, 0, 0, 0, 279, 280, 281, 282, 283, - 284, 285, 286, 287, 288, 289, 290, 291, 292, 0, - 0, 0, 241, 189, 190, 191, 192, 193, 194, 195, - 196, 197, 198, 199, 200, 0, 242, 0, 243, 244, - 245, 0, 0, 348, 349, 0, 0, 61, 62, 350, - 0, 105, 0, 106, 0, 0, 1, 2, 357, 3, - 4, 5, 351, 352, 353, 0, 0, 0, 0, 0, - 61, 62, 0, 0, 0, 0, 0, 354, 355, 1, - 2, 0, 3, 4, 5, 236, 0, 0, 0, 0, - 0, 0, 0, 0, 356, 0, 0, 0, 0, 0, - 237, 238, 0, 0, 0, 0, 0, 0, 0, 0, - 168, 169, 170, 171, 172, 173, 174, 175, 176, 177, - 178, 179, 180, 181, 182, 239, 240, 0, 0, 0, - 0, 0, 0, 168, 169, 170, 171, 172, 173, 174, - 175, 176, 177, 178, 179, 180, 181, 182, 239, 240, - 0, 0, 241, 189, 190, 191, 192, 193, 194, 195, - 196, 197, 198, 199, 200, 0, 242, 0, 243, 244, - 245, 0, 0, 0, 0, 241, 189, 190, 191, 192, - 193, 194, 195, 196, 197, 198, 199, 200, 357, 242, - 0, 243, 244, 245, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 105, 0, 106, 0, 246, 0, - 0, 247, 0, 248, 0, 249, 61, 62, 0, 101, - 64, 65, 66, 67, 0, 1, 2, 0, 3, 4, - 5, 61, 62, 0, 101, 147, 148, 149, 67, 0, - 1, 2, 0, 3, 4, 5, 0, 61, 62, 0, - 101, 147, 148, 149, 67, 68, 1, 2, 0, 3, - 4, 5, 61, 62, 0, 101, 64, 65, 66, 67, - 68, 1, 2, 0, 3, 4, 5, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 68, 0, 0, 0, - 0, 128, 0, 61, 62, 0, 142, 64, 65, 66, - 67, 68, 1, 2, 0, 3, 4, 5, 61, 62, - 0, 101, 64, 65, 66, 67, 0, 1, 2, 0, - 3, 4, 5, 0, 0, -189, 0, 0, 0, 0, - 0, 0, 68, 0, 0, 0, 0, 317, 0, 0, - -63, 1, 2, 0, 3, 4, 5, 68, 0, 0, - 0, 69, 6, 7, 70, 0, 0, 71, 0, 72, - 135, 0, 0, 0, 0, 0, 69, 0, 0, 70, - 0, 0, 71, 8, 72, 339, 9, 0, 0, 0, - 10, 0, 69, 0, 0, 70, 0, 0, 71, 0, - 72, 402, 0, 0, 0, 0, 0, 69, 0, 0, - 70, 0, 0, 71, 143, 72, 61, 62, 0, 101, - 147, 148, 149, 67, 0, 1, 2, 0, 3, 4, - 5, 0, 0, 0, 0, 0, 0, 0, 69, 0, - 0, 70, 0, 0, 71, 0, 72, 0, 0, 0, - 0, 0, 0, 69, 0, 68, 70, 0, 0, 71, - 0, 72, 61, 62, 0, 101, 64, 65, 66, 67, - 0, 1, 2, 0, 3, 4, 5, 0, 0, 0, - 61, 62, 0, 101, 64, 65, 66, 67, 0, 1, - 2, 414, 3, 4, 5, 0, 0, 0, 0, 0, - 0, 68, 0, 0, 0, 0, 0, 0, 0, 499, - 0, 61, 62, 0, 63, 64, 65, 66, 67, 68, - 1, 2, 0, 3, 4, 5, 61, 62, 0, 101, - 147, 148, 149, 67, 0, 1, 2, 0, 3, 4, - 5, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 68, 69, 0, 0, 70, 0, 334, 71, 0, 72, - 0, 0, 0, 61, 62, 68, 142, 64, 65, 66, - 67, 0, 1, 2, 0, 3, 4, 5, 61, 62, - 0, 101, 64, 65, 66, 67, 0, 1, 2, 0, - 3, 4, 5, 0, 0, 0, 0, 69, 0, 0, - 70, 0, 68, 71, 0, 72, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 69, 0, 68, 70, 0, - 0, 71, 0, 72, 61, 62, 0, 258, 64, 65, - 66, 67, 0, 1, 2, 0, 3, 4, 5, 0, - 0, 0, 0, 0, 0, 0, 69, 0, 0, 70, - 0, 0, 71, 0, 72, 0, 0, 0, 0, 0, - 0, 69, 0, 68, 70, 0, 0, 71, 0, 72, - 61, 62, 0, 101, 147, 148, 149, 67, 0, 1, - 2, 0, 3, 4, 5, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 159, 0, 0, 69, 0, - 0, 70, 0, 0, 71, 0, 72, 0, 0, 68, - 0, 0, 0, 69, 160, 161, 70, 0, 0, 71, - 0, 72, 0, 0, 0, 0, 162, 163, 164, 165, - 166, 167, 168, 169, 170, 171, 172, 173, 174, 175, - 176, 177, 178, 179, 180, 181, 182, 183, 184, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 69, - 0, 0, 70, 0, 0, 71, 0, 72, 0, 185, - 186, 187, 0, 0, 188, 189, 190, 191, 192, 193, - 194, 195, 196, 197, 198, 199, 200, 201, 202, 203, - 204, 205, 206, 0, 0, 0, 0, 0, 0, -188, - 0, 0, 0, 0, 0, 69, 0, 0, 70, 0, - 0, 71, 0, 337, -63, 1, 2, 0, 3, 4, - 5, 0, 0, 0, 0, 0, 6, 7, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, - 9, 0, 0, 0, 10 +/* YYPACT[STATE-NUM] -- Index in YYTABLE of the portion describing + STATE-NUM. */ +#define YYPACT_NINF -522 +static const short int yypact[] = +{ + 40, -522, -522, -522, -522, -522, -522, -522, -24, -105, + -4, -80, 60, -32, 461, -522, 134, 1386, -522, 153, + 150, 1, 15, -522, 16, 130, -522, 1208, -522, -522, + -522, -522, -522, -522, -522, -522, -522, -522, -522, -522, + 126, 126, 239, -522, -522, -522, -522, 126, -522, -522, + -522, -522, -522, 126, 158, -522, -7, 168, 183, 194, + -522, -522, -522, -522, -522, 45, -522, -522, -522, -522, + -522, 212, 226, 6, 198, -522, -522, -522, 127, -522, + 204, 204, 248, -522, 218, 113, 113, -522, -522, 135, + -522, -522, -522, -522, -522, -522, -522, -44, 1006, -522, + 101, 107, 371, 45, -522, 127, -103, -522, 1006, 218, + 218, -522, -522, 1043, -522, -522, 1223, 259, -522, -522, + -522, -522, -522, 1274, -522, -13, 1423, -522, 269, -522, + -522, 127, -522, 162, 146, 1305, 1305, 144, -101, 1305, + -522, 159, 1223, 1305, 45, 161, 127, 85, -522, 41, + 301, 302, 250, 304, 782, -522, -522, 79, -522, -522, + -522, -522, -522, 263, 1320, 193, 305, 113, -522, -522, + -522, -522, -522, -522, -522, -522, -522, -522, -522, -522, + -522, -522, -522, -522, -522, 133, 456, 1305, 1305, 1305, + 1305, -522, -522, -522, -522, -522, -522, -522, -522, -522, + -522, -522, -522, 1305, 1305, 1305, 1305, 1305, 1305, 1305, + 1305, 1305, -522, 113, -522, 165, -522, -522, 519, 1060, + -522, -18, -33, -522, 166, 127, -522, -522, 127, 1043, + -522, -522, -522, -522, -522, -522, -522, -522, -522, -522, + -522, 133, 456, 171, 174, 175, 177, 178, 1111, 1371, + 579, 307, 181, 182, 184, -522, -522, 186, 187, -522, + 45, 623, -522, 757, 757, -522, 757, 1274, -522, -522, + -522, -522, -522, -522, -522, -522, -522, -522, 1305, -522, + -522, -522, -522, -522, -522, -522, -522, -522, -522, -522, + -522, -522, -522, -522, -522, 1305, 98, 114, -522, 623, + -64, 195, 196, 201, 202, 210, 216, 623, 623, 303, + 1274, 1305, 1305, -522, -522, -522, -522, -522, -522, -522, + -522, -522, -522, -522, -522, 104, -522, -522, -522, 104, + 186, 186, 313, 190, 214, 1223, 1223, 1223, 1223, 1223, + -522, -522, -36, 962, -111, -522, -78, -522, 1223, 1223, + 1223, 3, -522, 1126, -522, -522, -522, -522, -522, -522, + -522, -522, 308, 1223, -522, -522, -522, -522, 219, -522, + 221, 757, 623, 623, 20, -522, 21, -522, -522, 757, + 225, 1305, 1305, 1305, 1305, 1305, 224, 227, 1305, 757, + 623, 231, -522, -522, -522, -522, -522, -522, -522, 1305, + 1223, 1223, -522, 233, 242, 245, 249, 1223, -522, 217, + 782, -65, -522, -522, 256, 257, 359, 386, 402, -522, + 186, -522, 127, 265, 264, -522, 394, -75, 400, 401, + 271, 275, 276, 757, 418, 757, 282, 285, 757, 289, + 127, -522, 290, 296, 757, 757, 127, 294, 300, 1305, + -29, 306, 309, -50, 1223, 1223, 1223, 1223, -522, -522, + 292, 1223, 1223, 1305, -522, -522, -522, 293, 1157, -522, + 311, -522, 757, 757, 1305, 757, 757, 300, -522, 300, + 1305, 757, 312, 1305, 1305, 1305, -522, -522, 1305, 397, + -522, 623, -522, 1223, 1223, -522, 316, 315, 317, 320, + -522, 318, 321, 117, -522, -522, -522, 127, -1, 430, + 324, 322, 623, -8, -522, -522, -522, -522, -522, 314, + 757, -522, -522, -522, -5, 300, 329, 330, 1223, -522, + 1223, 1223, -522, -522, -522, 293, -522, 431, -522, 437, + 2, -522, 1305, -522, -522, 332, -522, -522, -522, -522, + 336, 337, 338, -522, 448, -522, 757, -522, 917, 4, + 519, 623, 14, -522, 104, -522, -522, -522, -522, -522, + 343, -522, 917, -522, 474, 475, 346, 519, 757, 757, + 477, 426, -522, 757, 481, -522, 757, -522 }; -static const short yycheck[] = { 0, - 26, 152, 164, 224, 187, 145, 121, 415, 4, 295, - 247, 248, 152, 0, 11, 16, 11, 11, 165, 202, - 203, 204, 205, 206, 319, 31, 209, 11, 323, 16, - 18, 114, 115, 35, 324, 325, 114, 115, 26, 25, - 3, 4, 5, 6, 50, 49, 72, 140, 131, 132, - 133, 134, 135, 50, 132, 133, 149, 135, 551, 63, - 23, 24, 29, 30, 211, 140, 50, 39, 40, 140, - 96, 140, 565, 45, 100, 139, 151, 140, 149, 51, - 106, 141, 151, 143, 114, 111, 87, 147, 151, 7, - 8, 16, 500, 140, 19, 121, 21, 54, 16, 17, - 337, 19, 20, 21, 151, 110, 111, 133, 134, 140, - 140, 137, 114, 115, 31, 141, 147, 145, 140, 259, - 357, 261, 262, 413, 264, 147, 534, 310, 139, 131, - 132, 133, 134, 135, 7, 8, 162, 10, 11, 12, - 13, 14, 17, 16, 17, 20, 19, 20, 21, 43, - 265, 45, 147, 147, 150, 441, 15, 297, 566, 185, - 186, 187, 188, 151, 150, 305, 306, 19, 155, 39, - 40, 41, 18, 46, 44, 201, 202, 203, 204, 205, - 206, 207, 208, 209, 470, 141, 472, 143, 144, 114, - 115, 217, 375, 308, 377, 378, 379, 114, 115, 16, - 139, 227, 19, 141, 21, 143, 501, 132, 133, 140, - 135, 149, 139, 144, 131, 132, 133, 134, 135, 57, - 58, 59, 60, 61, 62, 365, 366, 367, 136, 137, - 138, 140, 518, 373, 141, 144, 143, 11, 145, 265, - 14, 462, 140, 383, 384, 32, 144, 34, 140, 141, - 276, 143, 403, 3, 4, 5, 6, 19, 140, 141, - 555, 143, 557, 403, 141, 139, 143, 293, 39, 142, - 41, 19, 145, 107, 108, 148, 19, 150, 151, 78, - 79, 143, 308, 309, 310, 4, 426, 4, 428, 34, - 473, 431, 146, 476, 477, 478, 146, 437, 438, 329, - 330, 331, 332, 333, 141, 4, 143, 144, 19, 140, - 149, 337, 342, 343, 344, 536, 144, 144, 539, 143, - 9, 347, 9, 9, 52, 465, 466, 11, 468, 469, - 149, 143, 143, 143, 474, 143, 143, 19, 143, 143, - 143, 143, 140, 140, 484, 140, 140, 140, 140, 375, - 376, 377, 378, 379, 140, 35, 382, 35, 261, 262, - 143, 264, 143, 393, 394, 505, 392, 140, 56, 145, - 400, 533, 140, 513, 39, 40, 41, 42, 43, 44, - 45, 140, 47, 140, 140, 140, 140, 140, 140, 149, - 552, 140, 35, 140, 297, 19, 4, 19, 140, 14, - 144, 14, 305, 306, 143, 140, 140, 4, 140, 549, - 140, 140, 143, 140, 554, 140, 442, 447, 448, 449, - 450, 50, 140, 149, 454, 455, 140, 140, 140, 144, - 456, 571, 572, 140, 140, 461, 576, 140, 140, 579, - 144, 467, 19, 144, 140, 145, 50, 473, 14, 147, - 476, 477, 478, 144, 144, 481, 486, 487, 4, 460, - 14, 144, 365, 366, 367, 144, 147, 144, 140, 14, - 373, 136, 137, 138, 140, 14, 68, 14, 3, 4, - 383, 384, 0, 0, 9, 124, 124, 124, 239, 528, - 106, 521, 87, 523, 524, 217, 16, 22, 23, 24, - 240, 501, 100, 227, 84, 54, 481, 395, -1, 535, - -1, -1, 37, 38, -1, -1, -1, -1, -1, -1, - -1, -1, -1, 426, -1, 428, -1, 528, 431, 54, - -1, -1, -1, -1, 437, 438, -1, -1, -1, -1, - -1, -1, -1, -1, -1, 70, 71, 72, 73, 74, - 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, - 85, 86, 465, 466, -1, 468, 469, -1, -1, -1, - -1, 474, -1, -1, -1, -1, -1, -1, -1, -1, - -1, 484, -1, -1, -1, -1, -1, 112, 113, 114, - 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, - -1, 126, 505, 128, 129, 130, -1, -1, -1, -1, - 513, -1, -1, 3, 4, -1, -1, 7, 8, 9, - -1, -1, -1, 148, -1, -1, 16, 17, -1, 19, - 20, 21, 22, 23, 24, 23, 24, -1, -1, -1, - -1, -1, -1, -1, -1, -1, 549, 37, 38, -1, - -1, 554, 87, 88, 89, 90, 91, 92, 93, 94, - 95, 96, -1, -1, 54, -1, -1, -1, 571, 572, - -1, -1, -1, 576, -1, -1, 579, -1, -1, -1, - 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, - 80, 81, 82, 83, 84, 85, 86, -1, -1, -1, - -1, -1, -1, -1, -1, 93, 94, 95, 96, 97, - 98, 99, 100, 101, 102, 103, 104, 105, 106, -1, - -1, -1, 112, 113, 114, 115, 116, 117, 118, 119, - 120, 121, 122, 123, 124, -1, 126, -1, 128, 129, - 130, -1, -1, 3, 4, -1, -1, 7, 8, 9, - -1, 141, -1, 143, -1, -1, 16, 17, 148, 19, - 20, 21, 22, 23, 24, -1, -1, -1, -1, -1, - 7, 8, -1, -1, -1, -1, -1, 37, 38, 16, - 17, -1, 19, 20, 21, 22, -1, -1, -1, -1, - -1, -1, -1, -1, 54, -1, -1, -1, -1, -1, - 37, 38, -1, -1, -1, -1, -1, -1, -1, -1, - 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, - 80, 81, 82, 83, 84, 85, 86, -1, -1, -1, - -1, -1, -1, 70, 71, 72, 73, 74, 75, 76, - 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, - -1, -1, 112, 113, 114, 115, 116, 117, 118, 119, - 120, 121, 122, 123, 124, -1, 126, -1, 128, 129, - 130, -1, -1, -1, -1, 112, 113, 114, 115, 116, - 117, 118, 119, 120, 121, 122, 123, 124, 148, 126, - -1, 128, 129, 130, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, 141, -1, 143, -1, 145, -1, - -1, 148, -1, 150, -1, 152, 7, 8, -1, 10, - 11, 12, 13, 14, -1, 16, 17, -1, 19, 20, - 21, 7, 8, -1, 10, 11, 12, 13, 14, -1, - 16, 17, -1, 19, 20, 21, -1, 7, 8, -1, - 10, 11, 12, 13, 14, 46, 16, 17, -1, 19, - 20, 21, 7, 8, -1, 10, 11, 12, 13, 14, - 46, 16, 17, -1, 19, 20, 21, -1, -1, -1, - -1, -1, -1, -1, -1, -1, 46, -1, -1, -1, - -1, 36, -1, 7, 8, -1, 10, 11, 12, 13, - 14, 46, 16, 17, -1, 19, 20, 21, 7, 8, - -1, 10, 11, 12, 13, 14, -1, 16, 17, -1, - 19, 20, 21, -1, -1, 0, -1, -1, -1, -1, - -1, -1, 46, -1, -1, -1, -1, 36, -1, -1, - 15, 16, 17, -1, 19, 20, 21, 46, -1, -1, - -1, 142, 27, 28, 145, -1, -1, 148, -1, 150, - 151, -1, -1, -1, -1, -1, 142, -1, -1, 145, - -1, -1, 148, 48, 150, 151, 51, -1, -1, -1, - 55, -1, 142, -1, -1, 145, -1, -1, 148, -1, - 150, 151, -1, -1, -1, -1, -1, 142, -1, -1, - 145, -1, -1, 148, 118, 150, 7, 8, -1, 10, - 11, 12, 13, 14, -1, 16, 17, -1, 19, 20, - 21, -1, -1, -1, -1, -1, -1, -1, 142, -1, - -1, 145, -1, -1, 148, -1, 150, -1, -1, -1, - -1, -1, -1, 142, -1, 46, 145, -1, -1, 148, - -1, 150, 7, 8, -1, 10, 11, 12, 13, 14, - -1, 16, 17, -1, 19, 20, 21, -1, -1, -1, - 7, 8, -1, 10, 11, 12, 13, 14, -1, 16, - 17, 36, 19, 20, 21, -1, -1, -1, -1, -1, - -1, 46, -1, -1, -1, -1, -1, -1, -1, 36, - -1, 7, 8, -1, 10, 11, 12, 13, 14, 46, - 16, 17, -1, 19, 20, 21, 7, 8, -1, 10, - 11, 12, 13, 14, -1, 16, 17, -1, 19, 20, - 21, -1, -1, -1, -1, -1, -1, -1, -1, -1, - 46, 142, -1, -1, 145, -1, 147, 148, -1, 150, - -1, -1, -1, 7, 8, 46, 10, 11, 12, 13, - 14, -1, 16, 17, -1, 19, 20, 21, 7, 8, - -1, 10, 11, 12, 13, 14, -1, 16, 17, -1, - 19, 20, 21, -1, -1, -1, -1, 142, -1, -1, - 145, -1, 46, 148, -1, 150, -1, -1, -1, -1, - -1, -1, -1, -1, -1, 142, -1, 46, 145, -1, - -1, 148, -1, 150, 7, 8, -1, 10, 11, 12, - 13, 14, -1, 16, 17, -1, 19, 20, 21, -1, - -1, -1, -1, -1, -1, -1, 142, -1, -1, 145, - -1, -1, 148, -1, 150, -1, -1, -1, -1, -1, - -1, 142, -1, 46, 145, -1, -1, 148, -1, 150, - 7, 8, -1, 10, 11, 12, 13, 14, -1, 16, - 17, -1, 19, 20, 21, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, 33, -1, -1, 142, -1, - -1, 145, -1, -1, 148, -1, 150, -1, -1, 46, - -1, -1, -1, 142, 52, 53, 145, -1, -1, 148, - -1, 150, -1, -1, -1, -1, 64, 65, 66, 67, - 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, - 78, 79, 80, 81, 82, 83, 84, 85, 86, -1, - -1, -1, -1, -1, -1, -1, -1, -1, -1, 142, - -1, -1, 145, -1, -1, 148, -1, 150, -1, 107, - 108, 109, -1, -1, 112, 113, 114, 115, 116, 117, - 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, - 128, 129, 130, -1, -1, -1, -1, -1, -1, 0, - -1, -1, -1, -1, -1, 142, -1, -1, 145, -1, - -1, 148, -1, 150, 15, 16, 17, -1, 19, 20, - 21, -1, -1, -1, -1, -1, 27, 28, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, 48, -1, -1, - 51, -1, -1, -1, 55 +/* YYPGOTO[NTERM-NUM]. */ +static const short int yypgoto[] = +{ + -522, 370, 372, 373, 266, 255, -164, -522, 0, -25, + 420, 9, -522, -522, -522, -522, 33, -522, -522, -522, + -151, -522, -404, -522, -223, -522, -291, 5, -522, -295, + -522, -522, -26, 295, -115, -522, 403, 410, -58, -150, + -221, 173, 222, 286, -522, -522, 501, -522, -522, -522, + -522, -522, -522, -522, -522, -522, -522, -522, 433, -522, + -522, -522, -522, -522, -522, -521, -140, 103, -184, -522, + 465, -522, -522, -522, -522, -522, 34, 122, -522, -522, + -522, -522 }; -/* -*-C-*- Note some compilers choke on comments on `#line' lines. */ -#line 3 "/usr/share/bison.simple" -/* This file comes from bison-1.28. */ - -/* Skeleton output parser for bison, - Copyright (C) 1984, 1989, 1990 Free Software Foundation, Inc. - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2, or (at your option) - any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 59 Temple Place - Suite 330, - Boston, MA 02111-1307, USA. */ - -/* As a special exception, when this file is copied by Bison into a - Bison output file, you may use that output file without restriction. - This special exception was added by the Free Software Foundation - in version 1.24 of Bison. */ -/* This is the parser code that is written into each bison parser - when the %semantic_parser declaration is not specified in the grammar. - It was written by Richard Stallman by simplifying the hairy parser - used when %semantic_parser is specified. */ - -#ifndef YYSTACK_USE_ALLOCA -#ifdef alloca -#define YYSTACK_USE_ALLOCA -#else /* alloca not defined */ -#ifdef __GNUC__ -#define YYSTACK_USE_ALLOCA -#define alloca __builtin_alloca -#else /* not GNU C. */ -#if (!defined (__STDC__) && defined (sparc)) || defined (__sparc__) || defined (__sparc) || defined (__sgi) || (defined (__sun) && defined (__i386)) -#define YYSTACK_USE_ALLOCA -#include -#else /* not sparc */ -/* We think this test detects Watcom and Microsoft C. */ -/* This used to test MSDOS, but that is a bad idea - since that symbol is in the user namespace. */ -#if (defined (_MSDOS) || defined (_MSDOS_)) && !defined (__TURBOC__) -#if 0 /* No need for malloc.h, which pollutes the namespace; - instead, just don't use alloca. */ -#include -#endif -#else /* not MSDOS, or __TURBOC__ */ -#if defined(_AIX) -/* I don't know what this was needed for, but it pollutes the namespace. - So I turned it off. rms, 2 May 1997. */ -/* #include */ - #pragma alloca -#define YYSTACK_USE_ALLOCA -#else /* not MSDOS, or __TURBOC__, or _AIX */ -#if 0 -#ifdef __hpux /* haible at ilog.fr says this works for HPUX 9.05 and up, - and on HPUX 10. Eventually we can turn this on. */ -#define YYSTACK_USE_ALLOCA -#define alloca __builtin_alloca -#endif /* __hpux */ -#endif -#endif /* not _AIX */ -#endif /* not MSDOS, or __TURBOC__ */ -#endif /* not sparc */ -#endif /* not GNU C */ -#endif /* alloca not defined */ -#endif /* YYSTACK_USE_ALLOCA not defined */ +/* YYTABLE[YYPACT[STATE-NUM]]. What to do in state STATE-NUM. If + positive, shift that token. If negative, reduce the rule which + number is the opposite. If zero, do what YYDEFACT says. + If YYTABLE_NINF, syntax error. */ +#define YYTABLE_NINF -196 +static const short int yytable[] = +{ + 11, 78, 266, 329, 255, 298, 377, 230, 157, 13, + 101, 87, 158, 265, 256, 265, 267, 11, 467, 90, + 302, 303, 304, 305, 306, 21, 13, 309, 344, 346, + 417, 433, 435, 407, 417, 397, 398, 570, 24, 22, + -195, 139, 412, 139, -55, -55, -55, -55, 105, 574, + 25, 576, 140, 418, 224, -64, 1, 2, 155, 3, + 4, 5, 310, 26, 231, 232, 407, 6, 7, 407, + 434, 434, 131, 80, 81, 27, 105, 413, 471, 407, + 85, 107, 131, 108, 227, 379, 86, 146, 8, 11, + 460, 9, 63, 64, 480, 10, 2, 146, 495, 4, + 128, 1, 2, 535, 3, 4, 5, 129, 407, 221, + 222, 28, 107, 225, 108, 408, 107, 228, 108, 492, + 327, 366, 411, 366, 366, 466, 366, 107, 391, 108, + 392, 393, 394, 326, 43, 395, 542, 560, 261, 542, + 543, 159, 427, 546, 57, 392, 393, 394, 91, 61, + 395, 1, 371, 557, 3, 571, 5, 490, 58, 366, + 102, 296, 297, 261, 299, 59, 258, 366, 366, 577, + 117, 118, 119, 120, 121, 122, 87, 300, 261, 261, + 261, 261, 261, 307, 308, 261, 516, 94, 517, 49, + 50, 51, 98, 131, 52, 389, 45, 439, 46, 441, + 442, 443, 95, 146, 263, 63, 64, 264, 103, 66, + 67, 68, 69, 96, 1, 2, 99, 3, 4, 5, + 268, 269, 270, 271, 272, 273, 274, 275, 276, 277, + 100, 366, 366, 366, 547, 392, 393, 394, 83, 366, + 395, 146, 374, 107, 70, 108, 508, 114, 115, 366, + 366, 135, 372, 233, 234, 235, 236, 136, 376, 107, + 255, 108, 107, 156, 108, 534, 37, 38, 39, 373, + 256, 82, 107, 83, 108, 311, 312, 402, 403, 404, + 405, 406, 142, 143, 146, 390, 261, 111, 217, 112, + 414, 415, 416, 366, 220, 366, 518, 223, 366, 521, + 522, 523, 109, 110, 366, 366, 219, 226, 229, 1, + -56, -57, 3, 237, 5, 259, 265, 410, 335, 328, + 562, 336, 337, 564, 338, 339, 347, 422, 348, 349, + 351, 350, 366, 366, 353, 366, 366, 400, 388, 380, + 381, 366, 451, 452, 71, 382, 383, 72, 399, 458, + 73, 366, 74, 104, 384, 261, 440, 261, 261, 261, + 385, 401, 446, 428, 425, 429, 368, 369, 444, 370, + 459, 445, 366, 450, 438, 449, 558, 454, 63, 64, + 366, 103, 66, 67, 68, 69, 455, 1, 2, 456, + 3, 4, 5, 457, 463, 572, 496, 497, 498, 499, + 461, 462, 378, 501, 502, 464, 465, 313, 314, 468, + 386, 387, 469, 470, 472, 473, 366, 70, 474, 475, + 476, 366, 478, 491, 315, 316, 480, 317, 318, 481, + 319, 320, 321, 483, 484, 526, 527, 503, 366, 366, + 485, 488, 507, 366, 489, 500, 366, 434, 512, 538, + 493, 556, 568, 494, 261, 509, 520, 261, 261, 261, + 528, 530, 512, 529, 531, 544, 532, 504, 539, 533, + 550, 540, 551, 552, 430, 431, 432, 548, 549, 279, + 280, 554, 437, 563, 565, 566, 567, 575, 578, 579, + 580, 583, 447, 448, 584, 586, 209, 334, 210, 211, + 29, 30, 31, 32, 33, 34, 35, 333, 36, 126, + 553, 141, 138, 536, 324, 332, 561, 71, 44, 125, + 72, 93, 524, 73, 453, 74, 137, 0, 0, 0, + 0, 0, 0, 0, 0, 504, 477, 0, 479, 0, + 0, 482, 0, 0, 0, 0, 0, 486, 487, 281, + 282, 283, 284, 285, 286, 287, 288, 289, 290, 291, + 292, 293, 294, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 510, 511, 0, 514, 515, + 0, 0, 0, 0, 519, 0, 63, 64, 0, 103, + 149, 150, 151, 69, 525, 1, 2, 0, 3, 4, + 5, 37, 38, 39, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 541, 0, 0, 0, 0, + 0, 0, 0, 545, 0, 70, 354, 355, 0, 0, + 63, 64, 356, 313, 314, 0, 0, 0, 0, 1, + 2, 0, 3, 4, 5, 357, 358, 359, 0, 0, + 315, 316, 0, 317, 318, 0, 319, 320, 321, 569, + 360, 361, 0, 0, 573, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 362, 0, 0, + 0, 581, 582, 0, 0, 0, 585, 0, 0, 587, + 0, 0, 0, 170, 171, 172, 173, 174, 175, 176, + 177, 178, 179, 180, 181, 182, 183, 184, 241, 242, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 71, 0, 0, 72, 0, + 0, 73, 0, 74, 345, 243, 191, 192, 193, 194, + 195, 196, 197, 198, 199, 200, 201, 202, 0, 244, + 0, 245, 246, 247, 0, 0, 0, 0, 0, 0, + 354, 355, 0, 0, 63, 64, 356, 0, 107, 0, + 108, 0, 0, 1, 2, 363, 3, 4, 5, 357, + 358, 359, 0, 0, 0, 0, 0, 0, 0, 63, + 64, 0, 0, 0, 360, 361, 0, 0, 1, 2, + 0, 3, 4, 5, 238, 0, 0, 0, 0, 0, + 0, 362, 0, 0, 0, 0, 0, 0, 0, 239, + 240, 0, 0, 0, 0, 0, 0, 170, 171, 172, + 173, 174, 175, 176, 177, 178, 179, 180, 181, 182, + 183, 184, 241, 242, 0, 0, 0, 0, 0, 0, + 0, 0, 170, 171, 172, 173, 174, 175, 176, 177, + 178, 179, 180, 181, 182, 183, 184, 241, 242, 243, + 191, 192, 193, 194, 195, 196, 197, 198, 199, 200, + 201, 202, 0, 244, 0, 245, 246, 247, 0, 0, + 0, 0, 0, 0, 243, 191, 192, 193, 194, 195, + 196, 197, 198, 199, 200, 201, 202, 0, 244, 363, + 245, 246, 247, 0, 0, 0, 0, 0, 0, 0, + 354, 355, 0, 0, 0, 0, 356, 107, 0, 108, + 0, 248, 0, 0, 249, 0, 250, 0, 251, 357, + 358, 359, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 360, 361, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 63, + 64, 362, 103, 149, 150, 151, 69, 0, 1, 2, + 0, 3, 4, 5, 0, 0, 0, 170, 171, 172, + 173, 174, 175, 176, 177, 178, 179, 180, 181, 182, + 183, 184, 241, 242, 0, 0, 0, 0, 70, 0, + 0, 0, 0, 63, 64, 0, 103, 66, 67, 68, + 69, 0, 1, 2, 0, 3, 4, 5, 0, 243, + 191, 192, 193, 194, 195, 196, 197, 198, 199, 200, + 201, 202, 130, 244, 0, 245, 246, 247, 0, 0, + 63, 64, 70, 144, 66, 67, 68, 69, 0, 1, + 2, 0, 3, 4, 5, 0, 0, 63, 64, 363, + 103, 66, 67, 68, 69, 0, 1, 2, 0, 3, + 4, 5, 0, 0, 0, 0, 0, 0, 0, 70, + 0, 0, 0, 0, 0, 0, 323, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 70, 0, 71, 0, + 0, 72, 0, 0, 73, 0, 74, 409, 63, 64, + 0, 103, 149, 150, 151, 69, 0, 1, 2, 0, + 3, 4, 5, 63, 64, 0, 103, 66, 67, 68, + 69, 0, 1, 2, 0, 3, 4, 5, 0, 0, + 0, 0, 71, 0, 0, 72, 0, 70, 73, 0, + 74, 145, 421, 0, 63, 64, 0, 103, 66, 67, + 68, 69, 70, 1, 2, 0, 3, 4, 5, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 71, + 0, 0, 72, 506, 0, 73, 0, 74, 0, 0, + 0, 0, 0, 70, 0, 0, 71, 0, 0, 72, + 0, 0, 73, 0, 74, 63, 64, 0, 65, 66, + 67, 68, 69, 0, 1, 2, 0, 3, 4, 5, + 63, 64, 0, 103, 149, 150, 151, 69, 0, 1, + 2, 0, 3, 4, 5, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 70, 0, 0, 71, 0, 0, + 72, 0, 340, 73, 0, 74, 0, 0, 0, 70, + 0, 0, 71, 0, 0, 72, 0, 0, 73, 0, + 74, 63, 64, 0, 144, 66, 67, 68, 69, 0, + 1, 2, 0, 3, 4, 5, 0, 0, 0, 0, + 0, 0, 0, 71, 0, 0, 72, 0, 0, 73, + 0, 74, 63, 64, 0, 103, 66, 67, 68, 69, + 70, 1, 2, 0, 3, 4, 5, 63, 64, 0, + 260, 66, 67, 68, 69, 0, 1, 2, 0, 3, + 4, 5, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 70, 0, 0, 71, 0, 0, 72, 0, 0, + 73, 0, 74, 0, 0, 0, 70, 0, 0, 71, + 0, 0, 72, 0, 0, 73, 0, 74, 63, 64, + 0, 103, 149, 150, 151, 69, -194, 1, 2, 0, + 3, 4, 5, 0, 0, 0, 0, 0, 0, 0, + 0, -64, 1, 2, 0, 3, 4, 5, 0, 0, + 0, 0, 0, 6, 7, 0, 0, 70, 0, 0, + 71, 0, 0, 72, 0, 0, 73, 0, 74, 0, + 0, 0, 0, 0, 8, 0, 0, 9, 0, 0, + 0, 10, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 71, 0, 0, 72, 0, 161, 73, 0, 74, + 0, 0, 0, 0, 0, 0, 71, 0, 0, 72, + 0, 0, 73, 0, 74, 162, 163, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 164, 165, 166, + 167, 168, 169, 170, 171, 172, 173, 174, 175, 176, + 177, 178, 179, 180, 181, 182, 183, 184, 185, 186, + 0, 0, 0, 0, 0, 0, 0, 71, 0, 0, + 72, 0, 0, 73, 0, 343, 0, 0, 0, 0, + 187, 188, 189, 0, 0, 190, 191, 192, 193, 194, + 195, 196, 197, 198, 199, 200, 201, 202, 203, 204, + 205, 206, 207, 208 +}; -#ifdef YYSTACK_USE_ALLOCA -#define YYSTACK_ALLOC alloca -#else -#define YYSTACK_ALLOC malloc -#endif +static const short int yycheck[] = +{ + 0, 27, 166, 226, 154, 189, 297, 147, 123, 0, + 4, 18, 25, 11, 154, 11, 167, 17, 422, 26, + 204, 205, 206, 207, 208, 49, 17, 211, 249, 250, + 31, 11, 11, 144, 31, 330, 331, 558, 143, 63, + 0, 144, 153, 144, 3, 4, 5, 6, 74, 35, + 54, 572, 155, 50, 155, 15, 16, 17, 116, 19, + 20, 21, 213, 143, 23, 24, 144, 27, 28, 144, + 50, 50, 98, 40, 41, 15, 102, 155, 153, 144, + 47, 145, 108, 147, 142, 149, 53, 113, 48, 89, + 155, 51, 7, 8, 144, 55, 17, 123, 148, 20, + 144, 16, 17, 507, 19, 20, 21, 151, 144, 135, + 136, 143, 145, 139, 147, 151, 145, 143, 147, 148, + 153, 261, 343, 263, 264, 420, 266, 145, 312, 147, + 131, 132, 133, 151, 0, 136, 144, 541, 164, 144, + 148, 154, 363, 148, 143, 131, 132, 133, 155, 19, + 136, 16, 267, 151, 19, 151, 21, 448, 143, 299, + 154, 187, 188, 189, 190, 149, 157, 307, 308, 573, + 57, 58, 59, 60, 61, 62, 18, 203, 204, 205, + 206, 207, 208, 209, 210, 211, 477, 19, 479, 39, + 40, 41, 147, 219, 44, 310, 43, 381, 45, 383, + 384, 385, 19, 229, 11, 7, 8, 14, 10, 11, + 12, 13, 14, 19, 16, 17, 4, 19, 20, 21, + 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, + 4, 371, 372, 373, 525, 131, 132, 133, 34, 379, + 136, 267, 144, 145, 46, 147, 469, 29, 30, 389, + 390, 150, 278, 3, 4, 5, 6, 150, 144, 145, + 410, 147, 145, 4, 147, 148, 140, 141, 142, 295, + 410, 32, 145, 34, 147, 110, 111, 335, 336, 337, + 338, 339, 109, 110, 310, 311, 312, 39, 19, 41, + 348, 349, 350, 433, 148, 435, 480, 153, 438, 483, + 484, 485, 80, 81, 444, 445, 144, 148, 147, 16, + 9, 9, 19, 9, 21, 52, 11, 343, 147, 153, + 543, 147, 147, 546, 147, 147, 19, 353, 147, 147, + 144, 147, 472, 473, 147, 475, 476, 147, 35, 144, + 144, 481, 400, 401, 146, 144, 144, 149, 35, 407, + 152, 491, 154, 155, 144, 381, 382, 383, 384, 385, + 144, 147, 388, 144, 56, 144, 263, 264, 144, 266, + 153, 144, 512, 399, 149, 144, 540, 144, 7, 8, + 520, 10, 11, 12, 13, 14, 144, 16, 17, 144, + 19, 20, 21, 144, 35, 559, 454, 455, 456, 457, + 144, 144, 299, 461, 462, 19, 4, 114, 115, 144, + 307, 308, 148, 19, 14, 14, 556, 46, 147, 144, + 144, 561, 4, 449, 131, 132, 144, 134, 135, 144, + 137, 138, 139, 144, 144, 493, 494, 463, 578, 579, + 144, 147, 468, 583, 144, 153, 586, 50, 474, 19, + 144, 14, 4, 144, 480, 144, 144, 483, 484, 485, + 144, 144, 488, 148, 144, 151, 148, 467, 144, 148, + 528, 149, 530, 531, 371, 372, 373, 148, 148, 23, + 24, 50, 379, 151, 148, 148, 148, 144, 14, 14, + 144, 14, 389, 390, 68, 14, 126, 242, 126, 126, + 39, 40, 41, 42, 43, 44, 45, 241, 47, 89, + 535, 108, 102, 508, 219, 229, 542, 146, 17, 86, + 149, 56, 488, 152, 402, 154, 155, -1, -1, -1, + -1, -1, -1, -1, -1, 535, 433, -1, 435, -1, + -1, 438, -1, -1, -1, -1, -1, 444, 445, 93, + 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, + 104, 105, 106, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, 472, 473, -1, 475, 476, + -1, -1, -1, -1, 481, -1, 7, 8, -1, 10, + 11, 12, 13, 14, 491, 16, 17, -1, 19, 20, + 21, 140, 141, 142, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, 512, -1, -1, -1, -1, + -1, -1, -1, 520, -1, 46, 3, 4, -1, -1, + 7, 8, 9, 114, 115, -1, -1, -1, -1, 16, + 17, -1, 19, 20, 21, 22, 23, 24, -1, -1, + 131, 132, -1, 134, 135, -1, 137, 138, 139, 556, + 37, 38, -1, -1, 561, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, 54, -1, -1, + -1, 578, 579, -1, -1, -1, 583, -1, -1, 586, + -1, -1, -1, 70, 71, 72, 73, 74, 75, 76, + 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, + -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, 146, -1, -1, 149, -1, + -1, 152, -1, 154, 155, 112, 113, 114, 115, 116, + 117, 118, 119, 120, 121, 122, 123, 124, -1, 126, + -1, 128, 129, 130, -1, -1, -1, -1, -1, -1, + 3, 4, -1, -1, 7, 8, 9, -1, 145, -1, + 147, -1, -1, 16, 17, 152, 19, 20, 21, 22, + 23, 24, -1, -1, -1, -1, -1, -1, -1, 7, + 8, -1, -1, -1, 37, 38, -1, -1, 16, 17, + -1, 19, 20, 21, 22, -1, -1, -1, -1, -1, + -1, 54, -1, -1, -1, -1, -1, -1, -1, 37, + 38, -1, -1, -1, -1, -1, -1, 70, 71, 72, + 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, + 83, 84, 85, 86, -1, -1, -1, -1, -1, -1, + -1, -1, 70, 71, 72, 73, 74, 75, 76, 77, + 78, 79, 80, 81, 82, 83, 84, 85, 86, 112, + 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, + 123, 124, -1, 126, -1, 128, 129, 130, -1, -1, + -1, -1, -1, -1, 112, 113, 114, 115, 116, 117, + 118, 119, 120, 121, 122, 123, 124, -1, 126, 152, + 128, 129, 130, -1, -1, -1, -1, -1, -1, -1, + 3, 4, -1, -1, -1, -1, 9, 145, -1, 147, + -1, 149, -1, -1, 152, -1, 154, -1, 156, 22, + 23, 24, -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, 37, 38, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, -1, 7, + 8, 54, 10, 11, 12, 13, 14, -1, 16, 17, + -1, 19, 20, 21, -1, -1, -1, 70, 71, 72, + 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, + 83, 84, 85, 86, -1, -1, -1, -1, 46, -1, + -1, -1, -1, 7, 8, -1, 10, 11, 12, 13, + 14, -1, 16, 17, -1, 19, 20, 21, -1, 112, + 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, + 123, 124, 36, 126, -1, 128, 129, 130, -1, -1, + 7, 8, 46, 10, 11, 12, 13, 14, -1, 16, + 17, -1, 19, 20, 21, -1, -1, 7, 8, 152, + 10, 11, 12, 13, 14, -1, 16, 17, -1, 19, + 20, 21, -1, -1, -1, -1, -1, -1, -1, 46, + -1, -1, -1, -1, -1, -1, 36, -1, -1, -1, + -1, -1, -1, -1, -1, -1, 46, -1, 146, -1, + -1, 149, -1, -1, 152, -1, 154, 155, 7, 8, + -1, 10, 11, 12, 13, 14, -1, 16, 17, -1, + 19, 20, 21, 7, 8, -1, 10, 11, 12, 13, + 14, -1, 16, 17, -1, 19, 20, 21, -1, -1, + -1, -1, 146, -1, -1, 149, -1, 46, 152, -1, + 154, 118, 36, -1, 7, 8, -1, 10, 11, 12, + 13, 14, 46, 16, 17, -1, 19, 20, 21, -1, + -1, -1, -1, -1, -1, -1, -1, -1, -1, 146, + -1, -1, 149, 36, -1, 152, -1, 154, -1, -1, + -1, -1, -1, 46, -1, -1, 146, -1, -1, 149, + -1, -1, 152, -1, 154, 7, 8, -1, 10, 11, + 12, 13, 14, -1, 16, 17, -1, 19, 20, 21, + 7, 8, -1, 10, 11, 12, 13, 14, -1, 16, + 17, -1, 19, 20, 21, -1, -1, -1, -1, -1, + -1, -1, -1, -1, 46, -1, -1, 146, -1, -1, + 149, -1, 151, 152, -1, 154, -1, -1, -1, 46, + -1, -1, 146, -1, -1, 149, -1, -1, 152, -1, + 154, 7, 8, -1, 10, 11, 12, 13, 14, -1, + 16, 17, -1, 19, 20, 21, -1, -1, -1, -1, + -1, -1, -1, 146, -1, -1, 149, -1, -1, 152, + -1, 154, 7, 8, -1, 10, 11, 12, 13, 14, + 46, 16, 17, -1, 19, 20, 21, 7, 8, -1, + 10, 11, 12, 13, 14, -1, 16, 17, -1, 19, + 20, 21, -1, -1, -1, -1, -1, -1, -1, -1, + -1, 46, -1, -1, 146, -1, -1, 149, -1, -1, + 152, -1, 154, -1, -1, -1, 46, -1, -1, 146, + -1, -1, 149, -1, -1, 152, -1, 154, 7, 8, + -1, 10, 11, 12, 13, 14, 0, 16, 17, -1, + 19, 20, 21, -1, -1, -1, -1, -1, -1, -1, + -1, 15, 16, 17, -1, 19, 20, 21, -1, -1, + -1, -1, -1, 27, 28, -1, -1, 46, -1, -1, + 146, -1, -1, 149, -1, -1, 152, -1, 154, -1, + -1, -1, -1, -1, 48, -1, -1, 51, -1, -1, + -1, 55, -1, -1, -1, -1, -1, -1, -1, -1, + -1, 146, -1, -1, 149, -1, 33, 152, -1, 154, + -1, -1, -1, -1, -1, -1, 146, -1, -1, 149, + -1, -1, 152, -1, 154, 52, 53, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, 64, 65, 66, + 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, + 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, + -1, -1, -1, -1, -1, -1, -1, 146, -1, -1, + 149, -1, -1, 152, -1, 154, -1, -1, -1, -1, + 107, 108, 109, -1, -1, 112, 113, 114, 115, 116, + 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, + 127, 128, 129, 130 +}; -/* Note: there must be only one dollar sign in this file. - It is replaced by the list of actions, each action - as one case of the switch. */ +/* YYSTOS[STATE-NUM] -- The (internal number of the) accessing + symbol of state STATE-NUM. */ +static const unsigned char yystos[] = +{ + 0, 16, 17, 19, 20, 21, 27, 28, 48, 51, + 55, 165, 167, 168, 169, 170, 201, 202, 203, 205, + 204, 49, 63, 210, 143, 54, 143, 15, 143, 39, + 40, 41, 42, 43, 44, 45, 47, 140, 141, 142, + 171, 172, 173, 0, 203, 43, 45, 174, 220, 39, + 40, 41, 44, 175, 217, 219, 226, 143, 143, 149, + 211, 19, 209, 7, 8, 10, 11, 12, 13, 14, + 46, 146, 149, 152, 154, 165, 168, 188, 189, 223, + 173, 173, 32, 34, 199, 173, 173, 18, 227, 228, + 26, 155, 218, 227, 19, 19, 19, 212, 147, 4, + 4, 4, 154, 10, 155, 189, 194, 145, 147, 199, + 199, 39, 41, 176, 29, 30, 198, 57, 58, 59, + 60, 61, 62, 177, 215, 215, 167, 231, 144, 151, + 36, 189, 190, 192, 193, 150, 150, 155, 194, 144, + 155, 193, 198, 198, 10, 118, 189, 191, 200, 11, + 12, 13, 163, 164, 189, 195, 4, 191, 25, 154, + 216, 33, 52, 53, 64, 65, 66, 67, 68, 69, + 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, + 80, 81, 82, 83, 84, 85, 86, 107, 108, 109, + 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, + 122, 123, 124, 125, 126, 127, 128, 129, 130, 158, + 159, 160, 229, 235, 236, 237, 238, 19, 179, 144, + 148, 189, 189, 153, 155, 189, 148, 195, 189, 147, + 223, 23, 24, 3, 4, 5, 6, 9, 22, 37, + 38, 85, 86, 112, 126, 128, 129, 130, 149, 152, + 154, 156, 158, 159, 160, 196, 223, 206, 168, 52, + 10, 189, 225, 11, 14, 11, 163, 177, 87, 88, + 89, 90, 91, 92, 93, 94, 95, 96, 161, 23, + 24, 93, 94, 95, 96, 97, 98, 99, 100, 101, + 102, 103, 104, 105, 106, 162, 189, 189, 225, 189, + 189, 232, 225, 225, 225, 225, 225, 189, 189, 225, + 177, 110, 111, 114, 115, 131, 132, 134, 135, 137, + 138, 139, 178, 36, 190, 181, 151, 153, 153, 181, + 207, 208, 200, 161, 162, 147, 147, 147, 147, 147, + 151, 195, 197, 154, 197, 155, 197, 19, 147, 147, + 147, 144, 186, 147, 3, 4, 9, 22, 23, 24, + 37, 38, 54, 152, 196, 222, 223, 224, 224, 224, + 224, 191, 189, 189, 144, 183, 144, 183, 224, 149, + 144, 144, 144, 144, 144, 144, 224, 224, 35, 191, + 189, 225, 131, 132, 133, 136, 180, 186, 186, 35, + 147, 147, 195, 195, 195, 195, 195, 144, 151, 155, + 189, 197, 153, 155, 195, 195, 195, 31, 50, 184, + 187, 36, 189, 213, 214, 56, 221, 197, 144, 144, + 224, 224, 224, 11, 50, 11, 234, 224, 149, 225, + 189, 225, 225, 225, 144, 144, 189, 224, 224, 144, + 189, 195, 195, 234, 144, 144, 144, 144, 195, 153, + 155, 144, 144, 35, 19, 4, 186, 179, 144, 148, + 19, 153, 14, 14, 147, 144, 144, 224, 4, 224, + 144, 144, 224, 144, 144, 144, 224, 224, 147, 144, + 183, 189, 148, 144, 144, 148, 195, 195, 195, 195, + 153, 195, 195, 189, 165, 166, 36, 189, 181, 144, + 224, 224, 189, 233, 224, 224, 183, 183, 225, 224, + 144, 225, 225, 225, 233, 224, 195, 195, 144, 148, + 144, 144, 148, 148, 148, 179, 184, 185, 19, 144, + 149, 224, 144, 148, 151, 224, 148, 183, 148, 148, + 195, 195, 195, 166, 50, 182, 14, 151, 163, 230, + 179, 189, 181, 151, 181, 148, 148, 148, 4, 224, + 222, 151, 163, 224, 35, 144, 222, 179, 14, 14, + 144, 224, 224, 14, 68, 224, 14, 224 +}; #define yyerrok (yyerrstatus = 0) #define yyclearin (yychar = YYEMPTY) -#define YYEMPTY -2 +#define YYEMPTY (-2) #define YYEOF 0 + #define YYACCEPT goto yyacceptlab -#define YYABORT goto yyabortlab -#define YYERROR goto yyerrlab1 -/* Like YYERROR except do call yyerror. - This remains here temporarily to ease the - transition to the new meaning of YYERROR, for GCC. +#define YYABORT goto yyabortlab +#define YYERROR goto yyerrorlab + + +/* Like YYERROR except do call yyerror. This remains here temporarily + to ease the transition to the new meaning of YYERROR, for GCC. Once GCC version 2 has supplanted version 1, this can go. */ + #define YYFAIL goto yyerrlab + #define YYRECOVERING() (!!yyerrstatus) -#define YYBACKUP(token, value) \ + +#define YYBACKUP(Token, Value) \ do \ if (yychar == YYEMPTY && yylen == 1) \ - { yychar = (token), yylval = (value); \ - yychar1 = YYTRANSLATE (yychar); \ + { \ + yychar = (Token); \ + yylval = (Value); \ + yytoken = YYTRANSLATE (yychar); \ YYPOPSTACK; \ goto yybackup; \ } \ else \ - { yyerror ("syntax error: cannot back up"); YYERROR; } \ + { \ + yyerror (YY_("syntax error: cannot back up")); \ + YYERROR; \ + } \ while (0) + #define YYTERROR 1 #define YYERRCODE 256 -#ifndef YYPURE -#define YYLEX yylex() + +/* YYLLOC_DEFAULT -- Set CURRENT to span from RHS[1] to RHS[N]. + If N is 0, then set CURRENT to the empty location which ends + the previous symbol: RHS[0] (always defined). */ + +#define YYRHSLOC(Rhs, K) ((Rhs)[K]) +#ifndef YYLLOC_DEFAULT +# define YYLLOC_DEFAULT(Current, Rhs, N) \ + do \ + if (N) \ + { \ + (Current).first_line = YYRHSLOC (Rhs, 1).first_line; \ + (Current).first_column = YYRHSLOC (Rhs, 1).first_column; \ + (Current).last_line = YYRHSLOC (Rhs, N).last_line; \ + (Current).last_column = YYRHSLOC (Rhs, N).last_column; \ + } \ + else \ + { \ + (Current).first_line = (Current).last_line = \ + YYRHSLOC (Rhs, 0).last_line; \ + (Current).first_column = (Current).last_column = \ + YYRHSLOC (Rhs, 0).last_column; \ + } \ + while (0) #endif -#ifdef YYPURE -#ifdef YYLSP_NEEDED -#ifdef YYLEX_PARAM -#define YYLEX yylex(&yylval, &yylloc, YYLEX_PARAM) -#else -#define YYLEX yylex(&yylval, &yylloc) + +/* YY_LOCATION_PRINT -- Print the location on the stream. + This macro was not mandated originally: define only if we know + we won't break user code: when these are the locations we know. */ + +#ifndef YY_LOCATION_PRINT +# if YYLTYPE_IS_TRIVIAL +# define YY_LOCATION_PRINT(File, Loc) \ + fprintf (File, "%d.%d-%d.%d", \ + (Loc).first_line, (Loc).first_column, \ + (Loc).last_line, (Loc).last_column) +# else +# define YY_LOCATION_PRINT(File, Loc) ((void) 0) +# endif #endif -#else /* not YYLSP_NEEDED */ + + +/* YYLEX -- calling `yylex' with the right arguments. */ + #ifdef YYLEX_PARAM -#define YYLEX yylex(&yylval, YYLEX_PARAM) +# define YYLEX yylex (YYLEX_PARAM) #else -#define YYLEX yylex(&yylval) -#endif -#endif /* not YYLSP_NEEDED */ +# define YYLEX yylex () #endif -/* If nonreentrant, generate the variables here */ +/* Enable debugging if requested. */ +#if YYDEBUG -#ifndef YYPURE +# ifndef YYFPRINTF +# include /* INFRINGES ON USER NAME SPACE */ +# define YYFPRINTF fprintf +# endif + +# define YYDPRINTF(Args) \ +do { \ + if (yydebug) \ + YYFPRINTF Args; \ +} while (0) + +# define YY_SYMBOL_PRINT(Title, Type, Value, Location) \ +do { \ + if (yydebug) \ + { \ + YYFPRINTF (stderr, "%s ", Title); \ + yysymprint (stderr, \ + Type, Value); \ + YYFPRINTF (stderr, "\n"); \ + } \ +} while (0) -int yychar; /* the lookahead symbol */ -YYSTYPE yylval; /* the semantic value of the */ - /* lookahead symbol */ +/*------------------------------------------------------------------. +| yy_stack_print -- Print the state stack from its BOTTOM up to its | +| TOP (included). | +`------------------------------------------------------------------*/ -#ifdef YYLSP_NEEDED -YYLTYPE yylloc; /* location data for the lookahead */ - /* symbol */ +#if defined (__STDC__) || defined (__cplusplus) +static void +yy_stack_print (short int *bottom, short int *top) +#else +static void +yy_stack_print (bottom, top) + short int *bottom; + short int *top; #endif +{ + YYFPRINTF (stderr, "Stack now"); + for (/* Nothing. */; bottom <= top; ++bottom) + YYFPRINTF (stderr, " %d", *bottom); + YYFPRINTF (stderr, "\n"); +} + +# define YY_STACK_PRINT(Bottom, Top) \ +do { \ + if (yydebug) \ + yy_stack_print ((Bottom), (Top)); \ +} while (0) -int yynerrs; /* number of parse errors so far */ -#endif /* not YYPURE */ -#if YYDEBUG != 0 -int yydebug; /* nonzero means print parse trace */ -/* Since this is uninitialized, it does not stop multiple parsers - from coexisting. */ +/*------------------------------------------------. +| Report that the YYRULE is going to be reduced. | +`------------------------------------------------*/ + +#if defined (__STDC__) || defined (__cplusplus) +static void +yy_reduce_print (int yyrule) +#else +static void +yy_reduce_print (yyrule) + int yyrule; #endif +{ + int yyi; + unsigned long int yylno = yyrline[yyrule]; + YYFPRINTF (stderr, "Reducing stack by rule %d (line %lu), ", + yyrule - 1, yylno); + /* Print the symbols being reduced, and their result. */ + for (yyi = yyprhs[yyrule]; 0 <= yyrhs[yyi]; yyi++) + YYFPRINTF (stderr, "%s ", yytname[yyrhs[yyi]]); + YYFPRINTF (stderr, "-> %s\n", yytname[yyr1[yyrule]]); +} -/* YYINITDEPTH indicates the initial size of the parser's stacks */ +# define YY_REDUCE_PRINT(Rule) \ +do { \ + if (yydebug) \ + yy_reduce_print (Rule); \ +} while (0) + +/* Nonzero means print parse trace. It is left uninitialized so that + multiple parsers can coexist. */ +int yydebug; +#else /* !YYDEBUG */ +# define YYDPRINTF(Args) +# define YY_SYMBOL_PRINT(Title, Type, Value, Location) +# define YY_STACK_PRINT(Bottom, Top) +# define YY_REDUCE_PRINT(Rule) +#endif /* !YYDEBUG */ + +/* YYINITDEPTH -- initial size of the parser's stacks. */ #ifndef YYINITDEPTH -#define YYINITDEPTH 200 +# define YYINITDEPTH 200 #endif -/* YYMAXDEPTH is the maximum size the stacks can grow to - (effective only if the built-in stack extension method is used). */ +/* YYMAXDEPTH -- maximum size the stacks can grow to (effective only + if the built-in stack extension method is used). -#if YYMAXDEPTH == 0 -#undef YYMAXDEPTH -#endif + Do not make this value too large; the results are undefined if + YYSTACK_ALLOC_MAXIMUM < YYSTACK_BYTES (YYMAXDEPTH) + evaluated with infinite-precision integer arithmetic. */ #ifndef YYMAXDEPTH -#define YYMAXDEPTH 10000 +# define YYMAXDEPTH 10000 #endif + -/* Define __yy_memcpy. Note that the size argument - should be passed with type unsigned int, because that is what the non-GCC - definitions require. With GCC, __builtin_memcpy takes an arg - of type size_t, but it can handle unsigned int. */ - -#if __GNUC__ > 1 /* GNU C and GNU C++ define this. */ -#define __yy_memcpy(TO,FROM,COUNT) __builtin_memcpy(TO,FROM,COUNT) -#else /* not GNU C or C++ */ -#ifndef __cplusplus -/* This is the most reliable way to avoid incompatibilities - in available built-in functions on various systems. */ -static void -__yy_memcpy (to, from, count) - char *to; - char *from; - unsigned int count; +#if YYERROR_VERBOSE + +# ifndef yystrlen +# if defined (__GLIBC__) && defined (_STRING_H) +# define yystrlen strlen +# else +/* Return the length of YYSTR. */ +static YYSIZE_T +# if defined (__STDC__) || defined (__cplusplus) +yystrlen (const char *yystr) +# else +yystrlen (yystr) + const char *yystr; +# endif { - register char *f = from; - register char *t = to; - register int i = count; + const char *yys = yystr; + + while (*yys++ != '\0') + continue; - while (i-- > 0) - *t++ = *f++; + return yys - yystr - 1; } +# endif +# endif -#else /* __cplusplus */ +# ifndef yystpcpy +# if defined (__GLIBC__) && defined (_STRING_H) && defined (_GNU_SOURCE) +# define yystpcpy stpcpy +# else +/* Copy YYSRC to YYDEST, returning the address of the terminating '\0' in + YYDEST. */ +static char * +# if defined (__STDC__) || defined (__cplusplus) +yystpcpy (char *yydest, const char *yysrc) +# else +yystpcpy (yydest, yysrc) + char *yydest; + const char *yysrc; +# endif +{ + char *yyd = yydest; + const char *yys = yysrc; -/* This is the most reliable way to avoid incompatibilities - in available built-in functions on various systems. */ -static void -__yy_memcpy (char *to, char *from, unsigned int count) + while ((*yyd++ = *yys++) != '\0') + continue; + + return yyd - 1; +} +# endif +# endif + +# ifndef yytnamerr +/* Copy to YYRES the contents of YYSTR after stripping away unnecessary + quotes and backslashes, so that it's suitable for yyerror. The + heuristic is that double-quoting is unnecessary unless the string + contains an apostrophe, a comma, or backslash (other than + backslash-backslash). YYSTR is taken from yytname. If YYRES is + null, do not copy; instead, return the length of what the result + would have been. */ +static YYSIZE_T +yytnamerr (char *yyres, const char *yystr) { - register char *t = to; - register char *f = from; - register int i = count; + if (*yystr == '"') + { + size_t yyn = 0; + char const *yyp = yystr; - while (i-- > 0) - *t++ = *f++; + for (;;) + switch (*++yyp) + { + case '\'': + case ',': + goto do_not_strip_quotes; + + case '\\': + if (*++yyp != '\\') + goto do_not_strip_quotes; + /* Fall through. */ + default: + if (yyres) + yyres[yyn] = *yyp; + yyn++; + break; + + case '"': + if (yyres) + yyres[yyn] = '\0'; + return yyn; + } + do_not_strip_quotes: ; + } + + if (! yyres) + return yystrlen (yystr); + + return yystpcpy (yyres, yystr) - yyres; } +# endif + +#endif /* YYERROR_VERBOSE */ + + + +#if YYDEBUG +/*--------------------------------. +| Print this symbol on YYOUTPUT. | +`--------------------------------*/ +#if defined (__STDC__) || defined (__cplusplus) +static void +yysymprint (FILE *yyoutput, int yytype, YYSTYPE *yyvaluep) +#else +static void +yysymprint (yyoutput, yytype, yyvaluep) + FILE *yyoutput; + int yytype; + YYSTYPE *yyvaluep; #endif +{ + /* Pacify ``unused variable'' warnings. */ + (void) yyvaluep; + + if (yytype < YYNTOKENS) + YYFPRINTF (yyoutput, "token %s (", yytname[yytype]); + else + YYFPRINTF (yyoutput, "nterm %s (", yytname[yytype]); + + +# ifdef YYPRINT + if (yytype < YYNTOKENS) + YYPRINT (yyoutput, yytoknum[yytype], *yyvaluep); +# endif + switch (yytype) + { + default: + break; + } + YYFPRINTF (yyoutput, ")"); +} + +#endif /* ! YYDEBUG */ +/*-----------------------------------------------. +| Release the memory associated to this symbol. | +`-----------------------------------------------*/ + +#if defined (__STDC__) || defined (__cplusplus) +static void +yydestruct (const char *yymsg, int yytype, YYSTYPE *yyvaluep) +#else +static void +yydestruct (yymsg, yytype, yyvaluep) + const char *yymsg; + int yytype; + YYSTYPE *yyvaluep; #endif +{ + /* Pacify ``unused variable'' warnings. */ + (void) yyvaluep; + + if (!yymsg) + yymsg = "Deleting"; + YY_SYMBOL_PRINT (yymsg, yytype, yyvaluep, yylocationp); + + switch (yytype) + { + + default: + break; + } +} -#line 217 "/usr/share/bison.simple" -/* The user can define YYPARSE_PARAM as the name of an argument to be passed - into yyparse. The argument should have type void *. - It should actually point to an object. - Grammar actions can access the variable by casting it - to the proper pointer type. */ +/* Prevent warnings from -Wmissing-prototypes. */ #ifdef YYPARSE_PARAM -#ifdef __cplusplus -#define YYPARSE_PARAM_ARG void *YYPARSE_PARAM -#define YYPARSE_PARAM_DECL -#else /* not __cplusplus */ -#define YYPARSE_PARAM_ARG YYPARSE_PARAM -#define YYPARSE_PARAM_DECL void *YYPARSE_PARAM; -#endif /* not __cplusplus */ -#else /* not YYPARSE_PARAM */ -#define YYPARSE_PARAM_ARG -#define YYPARSE_PARAM_DECL -#endif /* not YYPARSE_PARAM */ +# if defined (__STDC__) || defined (__cplusplus) +int yyparse (void *YYPARSE_PARAM); +# else +int yyparse (); +# endif +#else /* ! YYPARSE_PARAM */ +#if defined (__STDC__) || defined (__cplusplus) +int yyparse (void); +#else +int yyparse (); +#endif +#endif /* ! YYPARSE_PARAM */ + + + +/* The look-ahead symbol. */ +int yychar; + +/* The semantic value of the look-ahead symbol. */ +YYSTYPE yylval; + +/* Number of syntax errors so far. */ +int yynerrs; + + + +/*----------. +| yyparse. | +`----------*/ -/* Prevent warning if -Wstrict-prototypes. */ -#ifdef __GNUC__ #ifdef YYPARSE_PARAM -int yyparse (void *); +# if defined (__STDC__) || defined (__cplusplus) +int yyparse (void *YYPARSE_PARAM) +# else +int yyparse (YYPARSE_PARAM) + void *YYPARSE_PARAM; +# endif +#else /* ! YYPARSE_PARAM */ +#if defined (__STDC__) || defined (__cplusplus) +int +yyparse (void) #else -int yyparse (void); +int +yyparse () + #endif #endif - -int -yyparse(YYPARSE_PARAM_ARG) - YYPARSE_PARAM_DECL { - register int yystate; - register int yyn; - register short *yyssp; - register YYSTYPE *yyvsp; - int yyerrstatus; /* number of tokens to shift before error messages enabled */ - int yychar1 = 0; /* lookahead token as an internal (translated) token number */ - - short yyssa[YYINITDEPTH]; /* the state stack */ - YYSTYPE yyvsa[YYINITDEPTH]; /* the semantic value stack */ - - short *yyss = yyssa; /* refer to the stacks thru separate pointers */ - YYSTYPE *yyvs = yyvsa; /* to allow yyoverflow to reallocate them elsewhere */ - -#ifdef YYLSP_NEEDED - YYLTYPE yylsa[YYINITDEPTH]; /* the location stack */ - YYLTYPE *yyls = yylsa; - YYLTYPE *yylsp; + + int yystate; + int yyn; + int yyresult; + /* Number of tokens to shift before error messages enabled. */ + int yyerrstatus; + /* Look-ahead token as an internal (translated) token number. */ + int yytoken = 0; + + /* Three stacks and their tools: + `yyss': related to states, + `yyvs': related to semantic values, + `yyls': related to locations. + + Refer to the stacks thru separate pointers, to allow yyoverflow + to reallocate them elsewhere. */ + + /* The state stack. */ + short int yyssa[YYINITDEPTH]; + short int *yyss = yyssa; + short int *yyssp; + + /* The semantic value stack. */ + YYSTYPE yyvsa[YYINITDEPTH]; + YYSTYPE *yyvs = yyvsa; + YYSTYPE *yyvsp; + + -#define YYPOPSTACK (yyvsp--, yyssp--, yylsp--) -#else #define YYPOPSTACK (yyvsp--, yyssp--) -#endif - int yystacksize = YYINITDEPTH; - int yyfree_stacks = 0; + YYSIZE_T yystacksize = YYINITDEPTH; -#ifdef YYPURE - int yychar; - YYSTYPE yylval; - int yynerrs; -#ifdef YYLSP_NEEDED - YYLTYPE yylloc; -#endif -#endif + /* The variables used to return semantic value and location from the + action routines. */ + YYSTYPE yyval; - YYSTYPE yyval; /* the variable used to return */ - /* semantic values from the action */ - /* routines */ + /* When reducing, the number of symbols on the RHS of the reduced + rule. */ int yylen; -#if YYDEBUG != 0 - if (yydebug) - fprintf(stderr, "Starting parse\n"); -#endif + YYDPRINTF ((stderr, "Starting parse\n")); yystate = 0; yyerrstatus = 0; @@ -2240,676 +2939,744 @@ so that they stay on the same level as the state stack. The wasted elements are never initialized. */ - yyssp = yyss - 1; + yyssp = yyss; yyvsp = yyvs; -#ifdef YYLSP_NEEDED - yylsp = yyls; -#endif -/* Push a new state, which is found in yystate . */ -/* In all cases, when you get here, the value and location stacks - have just been pushed. so pushing a state here evens the stacks. */ -yynewstate: - - *++yyssp = yystate; - - if (yyssp >= yyss + yystacksize - 1) - { - /* Give user a chance to reallocate the stack */ - /* Use copies of these so that the &'s don't force the real ones into memory. */ - YYSTYPE *yyvs1 = yyvs; - short *yyss1 = yyss; -#ifdef YYLSP_NEEDED - YYLTYPE *yyls1 = yyls; -#endif + goto yysetstate; + +/*------------------------------------------------------------. +| yynewstate -- Push a new state, which is found in yystate. | +`------------------------------------------------------------*/ + yynewstate: + /* In all cases, when you get here, the value and location stacks + have just been pushed. so pushing a state here evens the stacks. + */ + yyssp++; + yysetstate: + *yyssp = yystate; + + if (yyss + yystacksize - 1 <= yyssp) + { /* Get the current used size of the three stacks, in elements. */ - int size = yyssp - yyss + 1; + YYSIZE_T yysize = yyssp - yyss + 1; #ifdef yyoverflow - /* Each stack pointer address is followed by the size of - the data in use in that stack, in bytes. */ -#ifdef YYLSP_NEEDED - /* This used to be a conditional around just the two extra args, - but that might be undefined if yyoverflow is a macro. */ - yyoverflow("parser stack overflow", - &yyss1, size * sizeof (*yyssp), - &yyvs1, size * sizeof (*yyvsp), - &yyls1, size * sizeof (*yylsp), - &yystacksize); -#else - yyoverflow("parser stack overflow", - &yyss1, size * sizeof (*yyssp), - &yyvs1, size * sizeof (*yyvsp), - &yystacksize); -#endif + { + /* Give user a chance to reallocate the stack. Use copies of + these so that the &'s don't force the real ones into + memory. */ + YYSTYPE *yyvs1 = yyvs; + short int *yyss1 = yyss; + + + /* Each stack pointer address is followed by the size of the + data in use in that stack, in bytes. This used to be a + conditional around just the two extra args, but that might + be undefined if yyoverflow is a macro. */ + yyoverflow (YY_("memory exhausted"), + &yyss1, yysize * sizeof (*yyssp), + &yyvs1, yysize * sizeof (*yyvsp), - yyss = yyss1; yyvs = yyvs1; -#ifdef YYLSP_NEEDED - yyls = yyls1; -#endif + &yystacksize); + + yyss = yyss1; + yyvs = yyvs1; + } #else /* no yyoverflow */ +# ifndef YYSTACK_RELOCATE + goto yyexhaustedlab; +# else /* Extend the stack our own way. */ - if (yystacksize >= YYMAXDEPTH) - { - yyerror("parser stack overflow"); - if (yyfree_stacks) - { - free (yyss); - free (yyvs); -#ifdef YYLSP_NEEDED - free (yyls); -#endif - } - return 2; - } + if (YYMAXDEPTH <= yystacksize) + goto yyexhaustedlab; yystacksize *= 2; - if (yystacksize > YYMAXDEPTH) + if (YYMAXDEPTH < yystacksize) yystacksize = YYMAXDEPTH; -#ifndef YYSTACK_USE_ALLOCA - yyfree_stacks = 1; -#endif - yyss = (short *) YYSTACK_ALLOC (yystacksize * sizeof (*yyssp)); - __yy_memcpy ((char *)yyss, (char *)yyss1, - size * (unsigned int) sizeof (*yyssp)); - yyvs = (YYSTYPE *) YYSTACK_ALLOC (yystacksize * sizeof (*yyvsp)); - __yy_memcpy ((char *)yyvs, (char *)yyvs1, - size * (unsigned int) sizeof (*yyvsp)); -#ifdef YYLSP_NEEDED - yyls = (YYLTYPE *) YYSTACK_ALLOC (yystacksize * sizeof (*yylsp)); - __yy_memcpy ((char *)yyls, (char *)yyls1, - size * (unsigned int) sizeof (*yylsp)); -#endif + + { + short int *yyss1 = yyss; + union yyalloc *yyptr = + (union yyalloc *) YYSTACK_ALLOC (YYSTACK_BYTES (yystacksize)); + if (! yyptr) + goto yyexhaustedlab; + YYSTACK_RELOCATE (yyss); + YYSTACK_RELOCATE (yyvs); + +# undef YYSTACK_RELOCATE + if (yyss1 != yyssa) + YYSTACK_FREE (yyss1); + } +# endif #endif /* no yyoverflow */ - yyssp = yyss + size - 1; - yyvsp = yyvs + size - 1; -#ifdef YYLSP_NEEDED - yylsp = yyls + size - 1; -#endif + yyssp = yyss + yysize - 1; + yyvsp = yyvs + yysize - 1; -#if YYDEBUG != 0 - if (yydebug) - fprintf(stderr, "Stack size increased to %d\n", yystacksize); -#endif - if (yyssp >= yyss + yystacksize - 1) + YYDPRINTF ((stderr, "Stack size increased to %lu\n", + (unsigned long int) yystacksize)); + + if (yyss + yystacksize - 1 <= yyssp) YYABORT; } -#if YYDEBUG != 0 - if (yydebug) - fprintf(stderr, "Entering state %d\n", yystate); -#endif + YYDPRINTF ((stderr, "Entering state %d\n", yystate)); goto yybackup; - yybackup: + +/*-----------. +| yybackup. | +`-----------*/ +yybackup: /* Do appropriate processing given the current state. */ -/* Read a lookahead token if we need one and don't already have one. */ +/* Read a look-ahead token if we need one and don't already have one. */ /* yyresume: */ - /* First try to decide what to do without reference to lookahead token. */ + /* First try to decide what to do without reference to look-ahead token. */ yyn = yypact[yystate]; - if (yyn == YYFLAG) + if (yyn == YYPACT_NINF) goto yydefault; - /* Not known => get a lookahead token if don't already have one. */ - - /* yychar is either YYEMPTY or YYEOF - or a valid token in external form. */ + /* Not known => get a look-ahead token if don't already have one. */ + /* YYCHAR is either YYEMPTY or YYEOF or a valid look-ahead symbol. */ if (yychar == YYEMPTY) { -#if YYDEBUG != 0 - if (yydebug) - fprintf(stderr, "Reading a token: "); -#endif + YYDPRINTF ((stderr, "Reading a token: ")); yychar = YYLEX; } - /* Convert token to internal form (in yychar1) for indexing tables with */ - - if (yychar <= 0) /* This means end of input. */ + if (yychar <= YYEOF) { - yychar1 = 0; - yychar = YYEOF; /* Don't call YYLEX any more */ - -#if YYDEBUG != 0 - if (yydebug) - fprintf(stderr, "Now at end of input.\n"); -#endif + yychar = yytoken = YYEOF; + YYDPRINTF ((stderr, "Now at end of input.\n")); } else { - yychar1 = YYTRANSLATE(yychar); - -#if YYDEBUG != 0 - if (yydebug) - { - fprintf (stderr, "Next token is %d (%s", yychar, yytname[yychar1]); - /* Give the individual parser a way to print the precise meaning - of a token, for further debugging info. */ -#ifdef YYPRINT - YYPRINT (stderr, yychar, yylval); -#endif - fprintf (stderr, ")\n"); - } -#endif + yytoken = YYTRANSLATE (yychar); + YY_SYMBOL_PRINT ("Next token is", yytoken, &yylval, &yylloc); } - yyn += yychar1; - if (yyn < 0 || yyn > YYLAST || yycheck[yyn] != yychar1) + /* If the proper action on seeing token YYTOKEN is to reduce or to + detect an error, take that action. */ + yyn += yytoken; + if (yyn < 0 || YYLAST < yyn || yycheck[yyn] != yytoken) goto yydefault; - yyn = yytable[yyn]; - - /* yyn is what to do for this token type in this state. - Negative => reduce, -yyn is rule number. - Positive => shift, yyn is new state. - New state is final state => don't bother to shift, - just return success. - 0, or most negative number => error. */ - - if (yyn < 0) + if (yyn <= 0) { - if (yyn == YYFLAG) + if (yyn == 0 || yyn == YYTABLE_NINF) goto yyerrlab; yyn = -yyn; goto yyreduce; } - else if (yyn == 0) - goto yyerrlab; if (yyn == YYFINAL) YYACCEPT; - /* Shift the lookahead token. */ - -#if YYDEBUG != 0 - if (yydebug) - fprintf(stderr, "Shifting token %d (%s), ", yychar, yytname[yychar1]); -#endif + /* Shift the look-ahead token. */ + YY_SYMBOL_PRINT ("Shifting", yytoken, &yylval, &yylloc); /* Discard the token being shifted unless it is eof. */ if (yychar != YYEOF) yychar = YYEMPTY; *++yyvsp = yylval; -#ifdef YYLSP_NEEDED - *++yylsp = yylloc; -#endif - /* count tokens shifted since error; after three, turn off error status. */ - if (yyerrstatus) yyerrstatus--; + + /* Count tokens shifted since error; after three, turn off error + status. */ + if (yyerrstatus) + yyerrstatus--; yystate = yyn; goto yynewstate; -/* Do the default action for the current state. */ -yydefault: +/*-----------------------------------------------------------. +| yydefault -- do the default action for the current state. | +`-----------------------------------------------------------*/ +yydefault: yyn = yydefact[yystate]; if (yyn == 0) goto yyerrlab; + goto yyreduce; + -/* Do a reduction. yyn is the number of a rule to reduce with. */ +/*-----------------------------. +| yyreduce -- Do a reduction. | +`-----------------------------*/ yyreduce: + /* yyn is the number of a rule to reduce with. */ yylen = yyr2[yyn]; - if (yylen > 0) - yyval = yyvsp[1-yylen]; /* implement default value of the action */ -#if YYDEBUG != 0 - if (yydebug) + /* If YYLEN is nonzero, implement the default value of the action: + `$$ = $1'. + + Otherwise, the following line sets YYVAL to garbage. + This behavior is undocumented and Bison + users should not rely upon it. Assigning to YYVAL + unconditionally makes the parser a bit smaller, and it avoids a + GCC warning that YYVAL may be used uninitialized. */ + yyval = yyvsp[1-yylen]; + + + YY_REDUCE_PRINT (yyn); + switch (yyn) { - int i; + case 29: +#line 1122 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.IPredicate) = ICmpInst::ICMP_EQ; ;} + break; - fprintf (stderr, "Reducing via rule %d (line %d), ", - yyn, yyrline[yyn]); + case 30: +#line 1122 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.IPredicate) = ICmpInst::ICMP_NE; ;} + break; - /* Print the symbols being reduced, and their result. */ - for (i = yyprhs[yyn]; yyrhs[i] > 0; i++) - fprintf (stderr, "%s ", yytname[yyrhs[i]]); - fprintf (stderr, " -> %s\n", yytname[yyr1[yyn]]); - } -#endif + case 31: +#line 1123 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.IPredicate) = ICmpInst::ICMP_SLT; ;} + break; + case 32: +#line 1123 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.IPredicate) = ICmpInst::ICMP_SGT; ;} + break; - switch (yyn) { + case 33: +#line 1124 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.IPredicate) = ICmpInst::ICMP_SLE; ;} + break; -case 28: -#line 1122 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.IPredicate = ICmpInst::ICMP_EQ; ; - break;} -case 29: -#line 1122 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.IPredicate = ICmpInst::ICMP_NE; ; - break;} -case 30: -#line 1123 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.IPredicate = ICmpInst::ICMP_SLT; ; - break;} -case 31: -#line 1123 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.IPredicate = ICmpInst::ICMP_SGT; ; - break;} -case 32: -#line 1124 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.IPredicate = ICmpInst::ICMP_SLE; ; - break;} -case 33: -#line 1124 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.IPredicate = ICmpInst::ICMP_SGE; ; - break;} -case 34: -#line 1125 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.IPredicate = ICmpInst::ICMP_ULT; ; - break;} -case 35: -#line 1125 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.IPredicate = ICmpInst::ICMP_UGT; ; - break;} -case 36: -#line 1126 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.IPredicate = ICmpInst::ICMP_ULE; ; - break;} -case 37: -#line 1126 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.IPredicate = ICmpInst::ICMP_UGE; ; - break;} -case 38: -#line 1130 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.FPredicate = FCmpInst::FCMP_OEQ; ; - break;} -case 39: -#line 1130 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.FPredicate = FCmpInst::FCMP_ONE; ; - break;} -case 40: -#line 1131 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.FPredicate = FCmpInst::FCMP_OLT; ; - break;} -case 41: -#line 1131 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.FPredicate = FCmpInst::FCMP_OGT; ; - break;} -case 42: -#line 1132 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.FPredicate = FCmpInst::FCMP_OLE; ; - break;} -case 43: -#line 1132 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.FPredicate = FCmpInst::FCMP_OGE; ; - break;} -case 44: -#line 1133 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.FPredicate = FCmpInst::FCMP_ORD; ; - break;} -case 45: -#line 1133 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.FPredicate = FCmpInst::FCMP_UNO; ; - break;} -case 46: -#line 1134 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.FPredicate = FCmpInst::FCMP_UEQ; ; - break;} -case 47: -#line 1134 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.FPredicate = FCmpInst::FCMP_UNE; ; - break;} -case 48: -#line 1135 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.FPredicate = FCmpInst::FCMP_ULT; ; - break;} -case 49: -#line 1135 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.FPredicate = FCmpInst::FCMP_UGT; ; - break;} -case 50: -#line 1136 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.FPredicate = FCmpInst::FCMP_ULE; ; - break;} -case 51: -#line 1136 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.FPredicate = FCmpInst::FCMP_UGE; ; - break;} -case 52: -#line 1137 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.FPredicate = FCmpInst::FCMP_TRUE; ; - break;} -case 53: -#line 1138 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.FPredicate = FCmpInst::FCMP_FALSE; ; - break;} -case 61: -#line 1147 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.StrVal = 0; ; - break;} -case 62: -#line 1151 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - yyval.StrVal = yyvsp[-1].StrVal; - CHECK_FOR_ERROR - ; - break;} -case 63: -#line 1155 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - yyval.StrVal = 0; - CHECK_FOR_ERROR - ; - break;} -case 67: -#line 1163 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - yyval.StrVal = 0; - CHECK_FOR_ERROR - ; - break;} -case 68: -#line 1168 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - yyval.StrVal = yyvsp[-1].StrVal; - CHECK_FOR_ERROR - ; - break;} -case 69: -#line 1174 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.Linkage = GlobalValue::InternalLinkage; ; - break;} -case 70: -#line 1175 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.Linkage = GlobalValue::WeakLinkage; ; - break;} -case 71: -#line 1176 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.Linkage = GlobalValue::LinkOnceLinkage; ; - break;} -case 72: -#line 1177 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.Linkage = GlobalValue::AppendingLinkage; ; - break;} -case 73: -#line 1178 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.Linkage = GlobalValue::DLLExportLinkage; ; - break;} -case 74: -#line 1182 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.Linkage = GlobalValue::DLLImportLinkage; ; - break;} -case 75: -#line 1183 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.Linkage = GlobalValue::ExternalWeakLinkage; ; - break;} -case 76: -#line 1184 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.Linkage = GlobalValue::ExternalLinkage; ; - break;} -case 77: -#line 1188 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.Visibility = GlobalValue::DefaultVisibility; ; - break;} -case 78: -#line 1189 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.Visibility = GlobalValue::DefaultVisibility; ; - break;} -case 79: -#line 1190 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.Visibility = GlobalValue::HiddenVisibility; ; - break;} -case 80: -#line 1191 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.Visibility = GlobalValue::ProtectedVisibility; ; - break;} -case 81: -#line 1195 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.Linkage = GlobalValue::ExternalLinkage; ; - break;} -case 82: -#line 1196 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.Linkage = GlobalValue::DLLImportLinkage; ; - break;} -case 83: -#line 1197 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.Linkage = GlobalValue::ExternalWeakLinkage; ; - break;} -case 84: -#line 1201 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.Linkage = GlobalValue::ExternalLinkage; ; - break;} -case 85: -#line 1202 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.Linkage = GlobalValue::InternalLinkage; ; - break;} -case 86: -#line 1203 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.Linkage = GlobalValue::LinkOnceLinkage; ; - break;} -case 87: -#line 1204 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.Linkage = GlobalValue::WeakLinkage; ; - break;} -case 88: -#line 1205 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.Linkage = GlobalValue::DLLExportLinkage; ; - break;} -case 89: -#line 1209 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.Linkage = GlobalValue::ExternalLinkage; ; - break;} -case 90: -#line 1210 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.Linkage = GlobalValue::WeakLinkage; ; - break;} -case 91: -#line 1211 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.Linkage = GlobalValue::InternalLinkage; ; - break;} -case 92: -#line 1214 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.UIntVal = CallingConv::C; ; - break;} -case 93: -#line 1215 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.UIntVal = CallingConv::C; ; - break;} -case 94: -#line 1216 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.UIntVal = CallingConv::Fast; ; - break;} -case 95: -#line 1217 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.UIntVal = CallingConv::Cold; ; - break;} -case 96: -#line 1218 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.UIntVal = CallingConv::X86_StdCall; ; - break;} -case 97: -#line 1219 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.UIntVal = CallingConv::X86_FastCall; ; - break;} -case 98: -#line 1220 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - if ((unsigned)yyvsp[0].UInt64Val != yyvsp[0].UInt64Val) - GEN_ERROR("Calling conv too large"); - yyval.UIntVal = yyvsp[0].UInt64Val; - CHECK_FOR_ERROR - ; - break;} -case 99: -#line 1227 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.ParamAttrs = ParamAttr::ZExt; ; - break;} -case 100: -#line 1228 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.ParamAttrs = ParamAttr::SExt; ; - break;} -case 101: -#line 1229 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.ParamAttrs = ParamAttr::InReg; ; - break;} -case 102: -#line 1230 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.ParamAttrs = ParamAttr::StructRet; ; - break;} -case 103: -#line 1231 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.ParamAttrs = ParamAttr::NoAlias; ; - break;} -case 104: -#line 1234 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.ParamAttrs = ParamAttr::None; ; - break;} -case 105: -#line 1235 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - yyval.ParamAttrs = yyvsp[-1].ParamAttrs | yyvsp[0].ParamAttrs; - ; - break;} -case 106: -#line 1240 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.ParamAttrs = ParamAttr::NoReturn; ; - break;} -case 107: -#line 1241 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.ParamAttrs = ParamAttr::NoUnwind; ; - break;} -case 109: -#line 1245 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.ParamAttrs = ParamAttr::None; ; - break;} -case 110: -#line 1246 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - yyval.ParamAttrs = yyvsp[-1].ParamAttrs | yyvsp[0].ParamAttrs; - ; - break;} -case 111: -#line 1253 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.UIntVal = 0; ; - break;} -case 112: -#line 1254 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - yyval.UIntVal = yyvsp[0].UInt64Val; - if (yyval.UIntVal != 0 && !isPowerOf2_32(yyval.UIntVal)) + case 34: +#line 1124 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.IPredicate) = ICmpInst::ICMP_SGE; ;} + break; + + case 35: +#line 1125 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.IPredicate) = ICmpInst::ICMP_ULT; ;} + break; + + case 36: +#line 1125 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.IPredicate) = ICmpInst::ICMP_UGT; ;} + break; + + case 37: +#line 1126 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.IPredicate) = ICmpInst::ICMP_ULE; ;} + break; + + case 38: +#line 1126 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.IPredicate) = ICmpInst::ICMP_UGE; ;} + break; + + case 39: +#line 1130 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.FPredicate) = FCmpInst::FCMP_OEQ; ;} + break; + + case 40: +#line 1130 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.FPredicate) = FCmpInst::FCMP_ONE; ;} + break; + + case 41: +#line 1131 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.FPredicate) = FCmpInst::FCMP_OLT; ;} + break; + + case 42: +#line 1131 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.FPredicate) = FCmpInst::FCMP_OGT; ;} + break; + + case 43: +#line 1132 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.FPredicate) = FCmpInst::FCMP_OLE; ;} + break; + + case 44: +#line 1132 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.FPredicate) = FCmpInst::FCMP_OGE; ;} + break; + + case 45: +#line 1133 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.FPredicate) = FCmpInst::FCMP_ORD; ;} + break; + + case 46: +#line 1133 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.FPredicate) = FCmpInst::FCMP_UNO; ;} + break; + + case 47: +#line 1134 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.FPredicate) = FCmpInst::FCMP_UEQ; ;} + break; + + case 48: +#line 1134 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.FPredicate) = FCmpInst::FCMP_UNE; ;} + break; + + case 49: +#line 1135 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.FPredicate) = FCmpInst::FCMP_ULT; ;} + break; + + case 50: +#line 1135 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.FPredicate) = FCmpInst::FCMP_UGT; ;} + break; + + case 51: +#line 1136 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.FPredicate) = FCmpInst::FCMP_ULE; ;} + break; + + case 52: +#line 1136 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.FPredicate) = FCmpInst::FCMP_UGE; ;} + break; + + case 53: +#line 1137 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.FPredicate) = FCmpInst::FCMP_TRUE; ;} + break; + + case 54: +#line 1138 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.FPredicate) = FCmpInst::FCMP_FALSE; ;} + break; + + case 62: +#line 1147 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.StrVal) = 0; ;} + break; + + case 63: +#line 1151 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + (yyval.StrVal) = (yyvsp[-1].StrVal); + CHECK_FOR_ERROR + ;} + break; + + case 64: +#line 1155 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + (yyval.StrVal) = 0; + CHECK_FOR_ERROR + ;} + break; + + case 68: +#line 1163 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + (yyval.StrVal) = 0; + CHECK_FOR_ERROR + ;} + break; + + case 69: +#line 1168 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + (yyval.StrVal) = (yyvsp[-1].StrVal); + CHECK_FOR_ERROR + ;} + break; + + case 70: +#line 1174 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.Linkage) = GlobalValue::InternalLinkage; ;} + break; + + case 71: +#line 1175 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.Linkage) = GlobalValue::WeakLinkage; ;} + break; + + case 72: +#line 1176 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.Linkage) = GlobalValue::LinkOnceLinkage; ;} + break; + + case 73: +#line 1177 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.Linkage) = GlobalValue::AppendingLinkage; ;} + break; + + case 74: +#line 1178 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.Linkage) = GlobalValue::DLLExportLinkage; ;} + break; + + case 75: +#line 1182 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.Linkage) = GlobalValue::DLLImportLinkage; ;} + break; + + case 76: +#line 1183 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.Linkage) = GlobalValue::ExternalWeakLinkage; ;} + break; + + case 77: +#line 1184 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.Linkage) = GlobalValue::ExternalLinkage; ;} + break; + + case 78: +#line 1188 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.Visibility) = GlobalValue::DefaultVisibility; ;} + break; + + case 79: +#line 1189 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.Visibility) = GlobalValue::DefaultVisibility; ;} + break; + + case 80: +#line 1190 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.Visibility) = GlobalValue::HiddenVisibility; ;} + break; + + case 81: +#line 1191 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.Visibility) = GlobalValue::ProtectedVisibility; ;} + break; + + case 82: +#line 1195 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.Linkage) = GlobalValue::ExternalLinkage; ;} + break; + + case 83: +#line 1196 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.Linkage) = GlobalValue::DLLImportLinkage; ;} + break; + + case 84: +#line 1197 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.Linkage) = GlobalValue::ExternalWeakLinkage; ;} + break; + + case 85: +#line 1201 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.Linkage) = GlobalValue::ExternalLinkage; ;} + break; + + case 86: +#line 1202 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.Linkage) = GlobalValue::InternalLinkage; ;} + break; + + case 87: +#line 1203 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.Linkage) = GlobalValue::LinkOnceLinkage; ;} + break; + + case 88: +#line 1204 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.Linkage) = GlobalValue::WeakLinkage; ;} + break; + + case 89: +#line 1205 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.Linkage) = GlobalValue::DLLExportLinkage; ;} + break; + + case 90: +#line 1209 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.Linkage) = GlobalValue::ExternalLinkage; ;} + break; + + case 91: +#line 1210 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.Linkage) = GlobalValue::WeakLinkage; ;} + break; + + case 92: +#line 1211 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.Linkage) = GlobalValue::InternalLinkage; ;} + break; + + case 93: +#line 1214 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.UIntVal) = CallingConv::C; ;} + break; + + case 94: +#line 1215 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.UIntVal) = CallingConv::C; ;} + break; + + case 95: +#line 1216 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.UIntVal) = CallingConv::Fast; ;} + break; + + case 96: +#line 1217 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.UIntVal) = CallingConv::Cold; ;} + break; + + case 97: +#line 1218 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.UIntVal) = CallingConv::X86_StdCall; ;} + break; + + case 98: +#line 1219 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.UIntVal) = CallingConv::X86_FastCall; ;} + break; + + case 99: +#line 1220 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + if ((unsigned)(yyvsp[0].UInt64Val) != (yyvsp[0].UInt64Val)) + GEN_ERROR("Calling conv too large"); + (yyval.UIntVal) = (yyvsp[0].UInt64Val); + CHECK_FOR_ERROR + ;} + break; + + case 100: +#line 1227 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.ParamAttrs) = ParamAttr::ZExt; ;} + break; + + case 101: +#line 1228 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.ParamAttrs) = ParamAttr::ZExt; ;} + break; + + case 102: +#line 1229 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.ParamAttrs) = ParamAttr::SExt; ;} + break; + + case 103: +#line 1230 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.ParamAttrs) = ParamAttr::SExt; ;} + break; + + case 104: +#line 1231 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.ParamAttrs) = ParamAttr::InReg; ;} + break; + + case 105: +#line 1232 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.ParamAttrs) = ParamAttr::StructRet; ;} + break; + + case 106: +#line 1233 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.ParamAttrs) = ParamAttr::NoAlias; ;} + break; + + case 107: +#line 1234 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.ParamAttrs) = ParamAttr::ByVal; ;} + break; + + case 108: +#line 1235 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.ParamAttrs) = ParamAttr::Nest; ;} + break; + + case 109: +#line 1238 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.ParamAttrs) = ParamAttr::None; ;} + break; + + case 110: +#line 1239 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + (yyval.ParamAttrs) = (yyvsp[-1].ParamAttrs) | (yyvsp[0].ParamAttrs); + ;} + break; + + case 111: +#line 1244 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.ParamAttrs) = ParamAttr::NoReturn; ;} + break; + + case 112: +#line 1245 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.ParamAttrs) = ParamAttr::NoUnwind; ;} + break; + + case 113: +#line 1246 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.ParamAttrs) = ParamAttr::ZExt; ;} + break; + + case 114: +#line 1247 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.ParamAttrs) = ParamAttr::SExt; ;} + break; + + case 115: +#line 1250 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.ParamAttrs) = ParamAttr::None; ;} + break; + + case 116: +#line 1251 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + (yyval.ParamAttrs) = (yyvsp[-1].ParamAttrs) | (yyvsp[0].ParamAttrs); + ;} + break; + + case 117: +#line 1258 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.UIntVal) = 0; ;} + break; + + case 118: +#line 1259 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + (yyval.UIntVal) = (yyvsp[0].UInt64Val); + if ((yyval.UIntVal) != 0 && !isPowerOf2_32((yyval.UIntVal))) GEN_ERROR("Alignment must be a power of two"); CHECK_FOR_ERROR -; - break;} -case 113: -#line 1260 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.UIntVal = 0; ; - break;} -case 114: -#line 1261 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - yyval.UIntVal = yyvsp[0].UInt64Val; - if (yyval.UIntVal != 0 && !isPowerOf2_32(yyval.UIntVal)) +;} + break; + + case 119: +#line 1265 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.UIntVal) = 0; ;} + break; + + case 120: +#line 1266 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + (yyval.UIntVal) = (yyvsp[0].UInt64Val); + if ((yyval.UIntVal) != 0 && !isPowerOf2_32((yyval.UIntVal))) GEN_ERROR("Alignment must be a power of two"); CHECK_FOR_ERROR -; - break;} -case 115: -#line 1269 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - for (unsigned i = 0, e = yyvsp[0].StrVal->length(); i != e; ++i) - if ((*yyvsp[0].StrVal)[i] == '"' || (*yyvsp[0].StrVal)[i] == '\\') +;} + break; + + case 121: +#line 1274 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + for (unsigned i = 0, e = (yyvsp[0].StrVal)->length(); i != e; ++i) + if ((*(yyvsp[0].StrVal))[i] == '"' || (*(yyvsp[0].StrVal))[i] == '\\') GEN_ERROR("Invalid character in section name"); - yyval.StrVal = yyvsp[0].StrVal; + (yyval.StrVal) = (yyvsp[0].StrVal); CHECK_FOR_ERROR -; - break;} -case 116: -#line 1277 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.StrVal = 0; ; - break;} -case 117: -#line 1278 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.StrVal = yyvsp[0].StrVal; ; - break;} -case 118: -#line 1283 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{; - break;} -case 119: -#line 1284 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{; - break;} -case 120: -#line 1285 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - CurGV->setSection(*yyvsp[0].StrVal); - delete yyvsp[0].StrVal; +;} + break; + + case 122: +#line 1282 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.StrVal) = 0; ;} + break; + + case 123: +#line 1283 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.StrVal) = (yyvsp[0].StrVal); ;} + break; + + case 124: +#line 1288 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + {;} + break; + + case 125: +#line 1289 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + {;} + break; + + case 126: +#line 1290 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + CurGV->setSection(*(yyvsp[0].StrVal)); + delete (yyvsp[0].StrVal); CHECK_FOR_ERROR - ; - break;} -case 121: -#line 1290 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - if (yyvsp[0].UInt64Val != 0 && !isPowerOf2_32(yyvsp[0].UInt64Val)) + ;} + break; + + case 127: +#line 1295 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + if ((yyvsp[0].UInt64Val) != 0 && !isPowerOf2_32((yyvsp[0].UInt64Val))) GEN_ERROR("Alignment must be a power of two"); - CurGV->setAlignment(yyvsp[0].UInt64Val); + CurGV->setAlignment((yyvsp[0].UInt64Val)); CHECK_FOR_ERROR - ; - break;} -case 126: -#line 1306 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - yyval.TypeVal = new PATypeHolder(OpaqueType::get()); + ;} + break; + + case 132: +#line 1311 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + (yyval.TypeVal) = new PATypeHolder(OpaqueType::get()); CHECK_FOR_ERROR - ; - break;} -case 127: -#line 1310 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - yyval.TypeVal = new PATypeHolder(yyvsp[0].PrimType); + ;} + break; + + case 133: +#line 1315 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + (yyval.TypeVal) = new PATypeHolder((yyvsp[0].PrimType)); CHECK_FOR_ERROR - ; - break;} -case 128: -#line 1314 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ // Pointer type? - if (*yyvsp[-1].TypeVal == Type::LabelTy) + ;} + break; + + case 134: +#line 1319 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { // Pointer type? + if (*(yyvsp[-1].TypeVal) == Type::LabelTy) GEN_ERROR("Cannot form a pointer to a basic block"); - yyval.TypeVal = new PATypeHolder(HandleUpRefs(PointerType::get(*yyvsp[-1].TypeVal))); - delete yyvsp[-1].TypeVal; + (yyval.TypeVal) = new PATypeHolder(HandleUpRefs(PointerType::get(*(yyvsp[-1].TypeVal)))); + delete (yyvsp[-1].TypeVal); CHECK_FOR_ERROR - ; - break;} -case 129: -#line 1321 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ // Named types are also simple types... - const Type* tmp = getTypeVal(yyvsp[0].ValIDVal); - CHECK_FOR_ERROR - yyval.TypeVal = new PATypeHolder(tmp); - ; - break;} -case 130: -#line 1326 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ // Type UpReference - if (yyvsp[0].UInt64Val > (uint64_t)~0U) GEN_ERROR("Value out of range"); + ;} + break; + + case 135: +#line 1326 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { // Named types are also simple types... + const Type* tmp = getTypeVal((yyvsp[0].ValIDVal)); + CHECK_FOR_ERROR + (yyval.TypeVal) = new PATypeHolder(tmp); + ;} + break; + + case 136: +#line 1331 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { // Type UpReference + if ((yyvsp[0].UInt64Val) > (uint64_t)~0U) GEN_ERROR("Value out of range"); OpaqueType *OT = OpaqueType::get(); // Use temporary placeholder - UpRefs.push_back(UpRefRecord((unsigned)yyvsp[0].UInt64Val, OT)); // Add to vector... - yyval.TypeVal = new PATypeHolder(OT); + UpRefs.push_back(UpRefRecord((unsigned)(yyvsp[0].UInt64Val), OT)); // Add to vector... + (yyval.TypeVal) = new PATypeHolder(OT); UR_OUT("New Upreference!\n"); CHECK_FOR_ERROR - ; - break;} -case 131: -#line 1334 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ + ;} + break; + + case 137: +#line 1339 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { std::vector Params; ParamAttrsVector Attrs; - if (yyvsp[0].ParamAttrs != ParamAttr::None) { - ParamAttrsWithIndex X; X.index = 0; X.attrs = yyvsp[0].ParamAttrs; + if ((yyvsp[0].ParamAttrs) != ParamAttr::None) { + ParamAttrsWithIndex X; X.index = 0; X.attrs = (yyvsp[0].ParamAttrs); Attrs.push_back(X); } unsigned index = 1; - TypeWithAttrsList::iterator I = yyvsp[-2].TypeWithAttrsList->begin(), E = yyvsp[-2].TypeWithAttrsList->end(); + TypeWithAttrsList::iterator I = (yyvsp[-2].TypeWithAttrsList)->begin(), E = (yyvsp[-2].TypeWithAttrsList)->end(); for (; I != E; ++I, ++index) { const Type *Ty = I->Ty->get(); Params.push_back(Ty); @@ -2925,23 +3692,24 @@ ParamAttrsList *ActualAttrs = 0; if (!Attrs.empty()) ActualAttrs = ParamAttrsList::get(Attrs); - FunctionType *FT = FunctionType::get(*yyvsp[-4].TypeVal, Params, isVarArg, ActualAttrs); - delete yyvsp[-2].TypeWithAttrsList; // Delete the argument list - delete yyvsp[-4].TypeVal; // Delete the return type handle - yyval.TypeVal = new PATypeHolder(HandleUpRefs(FT)); - CHECK_FOR_ERROR - ; - break;} -case 132: -#line 1364 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ + FunctionType *FT = FunctionType::get(*(yyvsp[-4].TypeVal), Params, isVarArg, ActualAttrs); + delete (yyvsp[-2].TypeWithAttrsList); // Delete the argument list + delete (yyvsp[-4].TypeVal); // Delete the return type handle + (yyval.TypeVal) = new PATypeHolder(HandleUpRefs(FT)); + CHECK_FOR_ERROR + ;} + break; + + case 138: +#line 1369 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { std::vector Params; ParamAttrsVector Attrs; - if (yyvsp[0].ParamAttrs != ParamAttr::None) { - ParamAttrsWithIndex X; X.index = 0; X.attrs = yyvsp[0].ParamAttrs; + if ((yyvsp[0].ParamAttrs) != ParamAttr::None) { + ParamAttrsWithIndex X; X.index = 0; X.attrs = (yyvsp[0].ParamAttrs); Attrs.push_back(X); } - TypeWithAttrsList::iterator I = yyvsp[-2].TypeWithAttrsList->begin(), E = yyvsp[-2].TypeWithAttrsList->end(); + TypeWithAttrsList::iterator I = (yyvsp[-2].TypeWithAttrsList)->begin(), E = (yyvsp[-2].TypeWithAttrsList)->end(); unsigned index = 1; for ( ; I != E; ++I, ++index) { const Type* Ty = I->Ty->get(); @@ -2959,282 +3727,303 @@ if (!Attrs.empty()) ActualAttrs = ParamAttrsList::get(Attrs); - FunctionType *FT = FunctionType::get(yyvsp[-4].PrimType, Params, isVarArg, ActualAttrs); - delete yyvsp[-2].TypeWithAttrsList; // Delete the argument list - yyval.TypeVal = new PATypeHolder(HandleUpRefs(FT)); - CHECK_FOR_ERROR - ; - break;} -case 133: -#line 1395 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ // Sized array type? - yyval.TypeVal = new PATypeHolder(HandleUpRefs(ArrayType::get(*yyvsp[-1].TypeVal, (unsigned)yyvsp[-3].UInt64Val))); - delete yyvsp[-1].TypeVal; - CHECK_FOR_ERROR - ; - break;} -case 134: -#line 1400 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ // Vector type? - const llvm::Type* ElemTy = yyvsp[-1].TypeVal->get(); - if ((unsigned)yyvsp[-3].UInt64Val != yyvsp[-3].UInt64Val) + FunctionType *FT = FunctionType::get((yyvsp[-4].PrimType), Params, isVarArg, ActualAttrs); + delete (yyvsp[-2].TypeWithAttrsList); // Delete the argument list + (yyval.TypeVal) = new PATypeHolder(HandleUpRefs(FT)); + CHECK_FOR_ERROR + ;} + break; + + case 139: +#line 1400 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { // Sized array type? + (yyval.TypeVal) = new PATypeHolder(HandleUpRefs(ArrayType::get(*(yyvsp[-1].TypeVal), (unsigned)(yyvsp[-3].UInt64Val)))); + delete (yyvsp[-1].TypeVal); + CHECK_FOR_ERROR + ;} + break; + + case 140: +#line 1405 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { // Vector type? + const llvm::Type* ElemTy = (yyvsp[-1].TypeVal)->get(); + if ((unsigned)(yyvsp[-3].UInt64Val) != (yyvsp[-3].UInt64Val)) GEN_ERROR("Unsigned result not equal to signed result"); if (!ElemTy->isFloatingPoint() && !ElemTy->isInteger()) GEN_ERROR("Element type of a VectorType must be primitive"); - if (!isPowerOf2_32(yyvsp[-3].UInt64Val)) + if (!isPowerOf2_32((yyvsp[-3].UInt64Val))) GEN_ERROR("Vector length should be a power of 2"); - yyval.TypeVal = new PATypeHolder(HandleUpRefs(VectorType::get(*yyvsp[-1].TypeVal, (unsigned)yyvsp[-3].UInt64Val))); - delete yyvsp[-1].TypeVal; + (yyval.TypeVal) = new PATypeHolder(HandleUpRefs(VectorType::get(*(yyvsp[-1].TypeVal), (unsigned)(yyvsp[-3].UInt64Val)))); + delete (yyvsp[-1].TypeVal); CHECK_FOR_ERROR - ; - break;} -case 135: -#line 1412 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ // Structure type? + ;} + break; + + case 141: +#line 1417 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { // Structure type? std::vector Elements; - for (std::list::iterator I = yyvsp[-1].TypeList->begin(), - E = yyvsp[-1].TypeList->end(); I != E; ++I) + for (std::list::iterator I = (yyvsp[-1].TypeList)->begin(), + E = (yyvsp[-1].TypeList)->end(); I != E; ++I) Elements.push_back(*I); - yyval.TypeVal = new PATypeHolder(HandleUpRefs(StructType::get(Elements))); - delete yyvsp[-1].TypeList; + (yyval.TypeVal) = new PATypeHolder(HandleUpRefs(StructType::get(Elements))); + delete (yyvsp[-1].TypeList); CHECK_FOR_ERROR - ; - break;} -case 136: -#line 1422 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ // Empty structure type? - yyval.TypeVal = new PATypeHolder(StructType::get(std::vector())); - CHECK_FOR_ERROR - ; - break;} -case 137: -#line 1426 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ + ;} + break; + + case 142: +#line 1427 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { // Empty structure type? + (yyval.TypeVal) = new PATypeHolder(StructType::get(std::vector())); + CHECK_FOR_ERROR + ;} + break; + + case 143: +#line 1431 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { std::vector Elements; - for (std::list::iterator I = yyvsp[-2].TypeList->begin(), - E = yyvsp[-2].TypeList->end(); I != E; ++I) + for (std::list::iterator I = (yyvsp[-2].TypeList)->begin(), + E = (yyvsp[-2].TypeList)->end(); I != E; ++I) Elements.push_back(*I); - yyval.TypeVal = new PATypeHolder(HandleUpRefs(StructType::get(Elements, true))); - delete yyvsp[-2].TypeList; + (yyval.TypeVal) = new PATypeHolder(HandleUpRefs(StructType::get(Elements, true))); + delete (yyvsp[-2].TypeList); CHECK_FOR_ERROR - ; - break;} -case 138: -#line 1436 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ // Empty structure type? - yyval.TypeVal = new PATypeHolder(StructType::get(std::vector(), true)); - CHECK_FOR_ERROR - ; - break;} -case 139: -#line 1443 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - yyval.TypeWithAttrs.Ty = yyvsp[-1].TypeVal; - yyval.TypeWithAttrs.Attrs = yyvsp[0].ParamAttrs; - ; - break;} -case 140: -#line 1450 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ + ;} + break; + + case 144: +#line 1441 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { // Empty structure type? + (yyval.TypeVal) = new PATypeHolder(StructType::get(std::vector(), true)); + CHECK_FOR_ERROR + ;} + break; + + case 145: +#line 1448 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + (yyval.TypeWithAttrs).Ty = (yyvsp[-1].TypeVal); + (yyval.TypeWithAttrs).Attrs = (yyvsp[0].ParamAttrs); + ;} + break; + + case 146: +#line 1455 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*yyvsp[0].TypeVal)->getDescription()); - if (!(*yyvsp[0].TypeVal)->isFirstClassType()) + GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[0].TypeVal))->getDescription()); + if (!(*(yyvsp[0].TypeVal))->isFirstClassType()) GEN_ERROR("LLVM functions cannot return aggregate types"); - yyval.TypeVal = yyvsp[0].TypeVal; - ; - break;} -case 141: -#line 1457 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - yyval.TypeVal = new PATypeHolder(Type::VoidTy); - ; - break;} -case 142: -#line 1462 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - yyval.TypeWithAttrsList = new TypeWithAttrsList(); - yyval.TypeWithAttrsList->push_back(yyvsp[0].TypeWithAttrs); + (yyval.TypeVal) = (yyvsp[0].TypeVal); + ;} + break; + + case 147: +#line 1462 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + (yyval.TypeVal) = new PATypeHolder(Type::VoidTy); + ;} + break; + + case 148: +#line 1467 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + (yyval.TypeWithAttrsList) = new TypeWithAttrsList(); + (yyval.TypeWithAttrsList)->push_back((yyvsp[0].TypeWithAttrs)); CHECK_FOR_ERROR - ; - break;} -case 143: -#line 1467 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - (yyval.TypeWithAttrsList=yyvsp[-2].TypeWithAttrsList)->push_back(yyvsp[0].TypeWithAttrs); + ;} + break; + + case 149: +#line 1472 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + ((yyval.TypeWithAttrsList)=(yyvsp[-2].TypeWithAttrsList))->push_back((yyvsp[0].TypeWithAttrs)); CHECK_FOR_ERROR - ; - break;} -case 145: -#line 1475 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - yyval.TypeWithAttrsList=yyvsp[-2].TypeWithAttrsList; + ;} + break; + + case 151: +#line 1480 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + (yyval.TypeWithAttrsList)=(yyvsp[-2].TypeWithAttrsList); TypeWithAttrs TWA; TWA.Attrs = ParamAttr::None; TWA.Ty = new PATypeHolder(Type::VoidTy); - yyval.TypeWithAttrsList->push_back(TWA); + (yyval.TypeWithAttrsList)->push_back(TWA); CHECK_FOR_ERROR - ; - break;} -case 146: -#line 1482 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - yyval.TypeWithAttrsList = new TypeWithAttrsList; + ;} + break; + + case 152: +#line 1487 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + (yyval.TypeWithAttrsList) = new TypeWithAttrsList; TypeWithAttrs TWA; TWA.Attrs = ParamAttr::None; TWA.Ty = new PATypeHolder(Type::VoidTy); - yyval.TypeWithAttrsList->push_back(TWA); + (yyval.TypeWithAttrsList)->push_back(TWA); CHECK_FOR_ERROR - ; - break;} -case 147: -#line 1489 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - yyval.TypeWithAttrsList = new TypeWithAttrsList(); + ;} + break; + + case 153: +#line 1494 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + (yyval.TypeWithAttrsList) = new TypeWithAttrsList(); CHECK_FOR_ERROR - ; - break;} -case 148: -#line 1497 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - yyval.TypeList = new std::list(); - yyval.TypeList->push_back(*yyvsp[0].TypeVal); - delete yyvsp[0].TypeVal; - CHECK_FOR_ERROR - ; - break;} -case 149: -#line 1503 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - (yyval.TypeList=yyvsp[-2].TypeList)->push_back(*yyvsp[0].TypeVal); - delete yyvsp[0].TypeVal; + ;} + break; + + case 154: +#line 1502 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + (yyval.TypeList) = new std::list(); + (yyval.TypeList)->push_back(*(yyvsp[0].TypeVal)); + delete (yyvsp[0].TypeVal); + CHECK_FOR_ERROR + ;} + break; + + case 155: +#line 1508 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + ((yyval.TypeList)=(yyvsp[-2].TypeList))->push_back(*(yyvsp[0].TypeVal)); + delete (yyvsp[0].TypeVal); CHECK_FOR_ERROR - ; - break;} -case 150: -#line 1515 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ // Nonempty unsized arr + ;} + break; + + case 156: +#line 1520 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { // Nonempty unsized arr if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*yyvsp[-3].TypeVal)->getDescription()); - const ArrayType *ATy = dyn_cast(yyvsp[-3].TypeVal->get()); + GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-3].TypeVal))->getDescription()); + const ArrayType *ATy = dyn_cast((yyvsp[-3].TypeVal)->get()); if (ATy == 0) GEN_ERROR("Cannot make array constant with type: '" + - (*yyvsp[-3].TypeVal)->getDescription() + "'"); + (*(yyvsp[-3].TypeVal))->getDescription() + "'"); const Type *ETy = ATy->getElementType(); int NumElements = ATy->getNumElements(); // Verify that we have the correct size... - if (NumElements != -1 && NumElements != (int)yyvsp[-1].ConstVector->size()) + if (NumElements != -1 && NumElements != (int)(yyvsp[-1].ConstVector)->size()) GEN_ERROR("Type mismatch: constant sized array initialized with " + - utostr(yyvsp[-1].ConstVector->size()) + " arguments, but has size of " + + utostr((yyvsp[-1].ConstVector)->size()) + " arguments, but has size of " + itostr(NumElements) + ""); // Verify all elements are correct type! - for (unsigned i = 0; i < yyvsp[-1].ConstVector->size(); i++) { - if (ETy != (*yyvsp[-1].ConstVector)[i]->getType()) + for (unsigned i = 0; i < (yyvsp[-1].ConstVector)->size(); i++) { + if (ETy != (*(yyvsp[-1].ConstVector))[i]->getType()) GEN_ERROR("Element #" + utostr(i) + " is not of type '" + ETy->getDescription() +"' as required!\nIt is of type '"+ - (*yyvsp[-1].ConstVector)[i]->getType()->getDescription() + "'."); + (*(yyvsp[-1].ConstVector))[i]->getType()->getDescription() + "'."); } - yyval.ConstVal = ConstantArray::get(ATy, *yyvsp[-1].ConstVector); - delete yyvsp[-3].TypeVal; delete yyvsp[-1].ConstVector; + (yyval.ConstVal) = ConstantArray::get(ATy, *(yyvsp[-1].ConstVector)); + delete (yyvsp[-3].TypeVal); delete (yyvsp[-1].ConstVector); CHECK_FOR_ERROR - ; - break;} -case 151: -#line 1543 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ + ;} + break; + + case 157: +#line 1548 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*yyvsp[-2].TypeVal)->getDescription()); - const ArrayType *ATy = dyn_cast(yyvsp[-2].TypeVal->get()); + GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-2].TypeVal))->getDescription()); + const ArrayType *ATy = dyn_cast((yyvsp[-2].TypeVal)->get()); if (ATy == 0) GEN_ERROR("Cannot make array constant with type: '" + - (*yyvsp[-2].TypeVal)->getDescription() + "'"); + (*(yyvsp[-2].TypeVal))->getDescription() + "'"); int NumElements = ATy->getNumElements(); if (NumElements != -1 && NumElements != 0) GEN_ERROR("Type mismatch: constant sized array initialized with 0" " arguments, but has size of " + itostr(NumElements) +""); - yyval.ConstVal = ConstantArray::get(ATy, std::vector()); - delete yyvsp[-2].TypeVal; + (yyval.ConstVal) = ConstantArray::get(ATy, std::vector()); + delete (yyvsp[-2].TypeVal); CHECK_FOR_ERROR - ; - break;} -case 152: -#line 1559 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ + ;} + break; + + case 158: +#line 1564 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*yyvsp[-2].TypeVal)->getDescription()); - const ArrayType *ATy = dyn_cast(yyvsp[-2].TypeVal->get()); + GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-2].TypeVal))->getDescription()); + const ArrayType *ATy = dyn_cast((yyvsp[-2].TypeVal)->get()); if (ATy == 0) GEN_ERROR("Cannot make array constant with type: '" + - (*yyvsp[-2].TypeVal)->getDescription() + "'"); + (*(yyvsp[-2].TypeVal))->getDescription() + "'"); int NumElements = ATy->getNumElements(); const Type *ETy = ATy->getElementType(); - if (NumElements != -1 && NumElements != int(yyvsp[0].StrVal->length())) + if (NumElements != -1 && NumElements != int((yyvsp[0].StrVal)->length())) GEN_ERROR("Can't build string constant of size " + - itostr((int)(yyvsp[0].StrVal->length())) + + itostr((int)((yyvsp[0].StrVal)->length())) + " when array has size " + itostr(NumElements) + ""); std::vector Vals; if (ETy == Type::Int8Ty) { - for (unsigned i = 0; i < yyvsp[0].StrVal->length(); ++i) - Vals.push_back(ConstantInt::get(ETy, (*yyvsp[0].StrVal)[i])); + for (unsigned i = 0; i < (yyvsp[0].StrVal)->length(); ++i) + Vals.push_back(ConstantInt::get(ETy, (*(yyvsp[0].StrVal))[i])); } else { - delete yyvsp[0].StrVal; + delete (yyvsp[0].StrVal); GEN_ERROR("Cannot build string arrays of non byte sized elements"); } - delete yyvsp[0].StrVal; - yyval.ConstVal = ConstantArray::get(ATy, Vals); - delete yyvsp[-2].TypeVal; - CHECK_FOR_ERROR - ; - break;} -case 153: -#line 1586 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ // Nonempty unsized arr + delete (yyvsp[0].StrVal); + (yyval.ConstVal) = ConstantArray::get(ATy, Vals); + delete (yyvsp[-2].TypeVal); + CHECK_FOR_ERROR + ;} + break; + + case 159: +#line 1591 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { // Nonempty unsized arr if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*yyvsp[-3].TypeVal)->getDescription()); - const VectorType *PTy = dyn_cast(yyvsp[-3].TypeVal->get()); + GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-3].TypeVal))->getDescription()); + const VectorType *PTy = dyn_cast((yyvsp[-3].TypeVal)->get()); if (PTy == 0) GEN_ERROR("Cannot make packed constant with type: '" + - (*yyvsp[-3].TypeVal)->getDescription() + "'"); + (*(yyvsp[-3].TypeVal))->getDescription() + "'"); const Type *ETy = PTy->getElementType(); int NumElements = PTy->getNumElements(); // Verify that we have the correct size... - if (NumElements != -1 && NumElements != (int)yyvsp[-1].ConstVector->size()) + if (NumElements != -1 && NumElements != (int)(yyvsp[-1].ConstVector)->size()) GEN_ERROR("Type mismatch: constant sized packed initialized with " + - utostr(yyvsp[-1].ConstVector->size()) + " arguments, but has size of " + + utostr((yyvsp[-1].ConstVector)->size()) + " arguments, but has size of " + itostr(NumElements) + ""); // Verify all elements are correct type! - for (unsigned i = 0; i < yyvsp[-1].ConstVector->size(); i++) { - if (ETy != (*yyvsp[-1].ConstVector)[i]->getType()) + for (unsigned i = 0; i < (yyvsp[-1].ConstVector)->size(); i++) { + if (ETy != (*(yyvsp[-1].ConstVector))[i]->getType()) GEN_ERROR("Element #" + utostr(i) + " is not of type '" + ETy->getDescription() +"' as required!\nIt is of type '"+ - (*yyvsp[-1].ConstVector)[i]->getType()->getDescription() + "'."); + (*(yyvsp[-1].ConstVector))[i]->getType()->getDescription() + "'."); } - yyval.ConstVal = ConstantVector::get(PTy, *yyvsp[-1].ConstVector); - delete yyvsp[-3].TypeVal; delete yyvsp[-1].ConstVector; + (yyval.ConstVal) = ConstantVector::get(PTy, *(yyvsp[-1].ConstVector)); + delete (yyvsp[-3].TypeVal); delete (yyvsp[-1].ConstVector); CHECK_FOR_ERROR - ; - break;} -case 154: -#line 1614 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - const StructType *STy = dyn_cast(yyvsp[-3].TypeVal->get()); + ;} + break; + + case 160: +#line 1619 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + const StructType *STy = dyn_cast((yyvsp[-3].TypeVal)->get()); if (STy == 0) GEN_ERROR("Cannot make struct constant with type: '" + - (*yyvsp[-3].TypeVal)->getDescription() + "'"); + (*(yyvsp[-3].TypeVal))->getDescription() + "'"); - if (yyvsp[-1].ConstVector->size() != STy->getNumContainedTypes()) + if ((yyvsp[-1].ConstVector)->size() != STy->getNumContainedTypes()) GEN_ERROR("Illegal number of initializers for structure type"); // Check to ensure that constants are compatible with the type initializer! - for (unsigned i = 0, e = yyvsp[-1].ConstVector->size(); i != e; ++i) - if ((*yyvsp[-1].ConstVector)[i]->getType() != STy->getElementType(i)) + for (unsigned i = 0, e = (yyvsp[-1].ConstVector)->size(); i != e; ++i) + if ((*(yyvsp[-1].ConstVector))[i]->getType() != STy->getElementType(i)) GEN_ERROR("Expected type '" + STy->getElementType(i)->getDescription() + "' for element #" + utostr(i) + @@ -3245,20 +4034,21 @@ GEN_ERROR("Unpacked Initializer to vector type '" + STy->getDescription() + "'"); - yyval.ConstVal = ConstantStruct::get(STy, *yyvsp[-1].ConstVector); - delete yyvsp[-3].TypeVal; delete yyvsp[-1].ConstVector; + (yyval.ConstVal) = ConstantStruct::get(STy, *(yyvsp[-1].ConstVector)); + delete (yyvsp[-3].TypeVal); delete (yyvsp[-1].ConstVector); CHECK_FOR_ERROR - ; - break;} -case 155: -#line 1640 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ + ;} + break; + + case 161: +#line 1645 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*yyvsp[-2].TypeVal)->getDescription()); - const StructType *STy = dyn_cast(yyvsp[-2].TypeVal->get()); + GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-2].TypeVal))->getDescription()); + const StructType *STy = dyn_cast((yyvsp[-2].TypeVal)->get()); if (STy == 0) GEN_ERROR("Cannot make struct constant with type: '" + - (*yyvsp[-2].TypeVal)->getDescription() + "'"); + (*(yyvsp[-2].TypeVal))->getDescription() + "'"); if (STy->getNumContainedTypes() != 0) GEN_ERROR("Illegal number of initializers for structure type"); @@ -3268,25 +4058,26 @@ GEN_ERROR("Unpacked Initializer to vector type '" + STy->getDescription() + "'"); - yyval.ConstVal = ConstantStruct::get(STy, std::vector()); - delete yyvsp[-2].TypeVal; + (yyval.ConstVal) = ConstantStruct::get(STy, std::vector()); + delete (yyvsp[-2].TypeVal); CHECK_FOR_ERROR - ; - break;} -case 156: -#line 1660 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - const StructType *STy = dyn_cast(yyvsp[-5].TypeVal->get()); + ;} + break; + + case 162: +#line 1665 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + const StructType *STy = dyn_cast((yyvsp[-5].TypeVal)->get()); if (STy == 0) GEN_ERROR("Cannot make struct constant with type: '" + - (*yyvsp[-5].TypeVal)->getDescription() + "'"); + (*(yyvsp[-5].TypeVal))->getDescription() + "'"); - if (yyvsp[-2].ConstVector->size() != STy->getNumContainedTypes()) + if ((yyvsp[-2].ConstVector)->size() != STy->getNumContainedTypes()) GEN_ERROR("Illegal number of initializers for structure type"); // Check to ensure that constants are compatible with the type initializer! - for (unsigned i = 0, e = yyvsp[-2].ConstVector->size(); i != e; ++i) - if ((*yyvsp[-2].ConstVector)[i]->getType() != STy->getElementType(i)) + for (unsigned i = 0, e = (yyvsp[-2].ConstVector)->size(); i != e; ++i) + if ((*(yyvsp[-2].ConstVector))[i]->getType() != STy->getElementType(i)) GEN_ERROR("Expected type '" + STy->getElementType(i)->getDescription() + "' for element #" + utostr(i) + @@ -3297,20 +4088,21 @@ GEN_ERROR("Vector initializer to non-vector type '" + STy->getDescription() + "'"); - yyval.ConstVal = ConstantStruct::get(STy, *yyvsp[-2].ConstVector); - delete yyvsp[-5].TypeVal; delete yyvsp[-2].ConstVector; + (yyval.ConstVal) = ConstantStruct::get(STy, *(yyvsp[-2].ConstVector)); + delete (yyvsp[-5].TypeVal); delete (yyvsp[-2].ConstVector); CHECK_FOR_ERROR - ; - break;} -case 157: -#line 1686 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ + ;} + break; + + case 163: +#line 1691 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*yyvsp[-4].TypeVal)->getDescription()); - const StructType *STy = dyn_cast(yyvsp[-4].TypeVal->get()); + GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-4].TypeVal))->getDescription()); + const StructType *STy = dyn_cast((yyvsp[-4].TypeVal)->get()); if (STy == 0) GEN_ERROR("Cannot make struct constant with type: '" + - (*yyvsp[-4].TypeVal)->getDescription() + "'"); + (*(yyvsp[-4].TypeVal))->getDescription() + "'"); if (STy->getNumContainedTypes() != 0) GEN_ERROR("Illegal number of initializers for structure type"); @@ -3320,42 +4112,45 @@ GEN_ERROR("Vector initializer to non-vector type '" + STy->getDescription() + "'"); - yyval.ConstVal = ConstantStruct::get(STy, std::vector()); - delete yyvsp[-4].TypeVal; + (yyval.ConstVal) = ConstantStruct::get(STy, std::vector()); + delete (yyvsp[-4].TypeVal); CHECK_FOR_ERROR - ; - break;} -case 158: -#line 1706 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ + ;} + break; + + case 164: +#line 1711 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*yyvsp[-1].TypeVal)->getDescription()); - const PointerType *PTy = dyn_cast(yyvsp[-1].TypeVal->get()); + GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-1].TypeVal))->getDescription()); + const PointerType *PTy = dyn_cast((yyvsp[-1].TypeVal)->get()); if (PTy == 0) GEN_ERROR("Cannot make null pointer constant with type: '" + - (*yyvsp[-1].TypeVal)->getDescription() + "'"); + (*(yyvsp[-1].TypeVal))->getDescription() + "'"); - yyval.ConstVal = ConstantPointerNull::get(PTy); - delete yyvsp[-1].TypeVal; + (yyval.ConstVal) = ConstantPointerNull::get(PTy); + delete (yyvsp[-1].TypeVal); CHECK_FOR_ERROR - ; - break;} -case 159: -#line 1718 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ + ;} + break; + + case 165: +#line 1723 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*yyvsp[-1].TypeVal)->getDescription()); - yyval.ConstVal = UndefValue::get(yyvsp[-1].TypeVal->get()); - delete yyvsp[-1].TypeVal; - CHECK_FOR_ERROR - ; - break;} -case 160: -#line 1725 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ + GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-1].TypeVal))->getDescription()); + (yyval.ConstVal) = UndefValue::get((yyvsp[-1].TypeVal)->get()); + delete (yyvsp[-1].TypeVal); + CHECK_FOR_ERROR + ;} + break; + + case 166: +#line 1730 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*yyvsp[-1].TypeVal)->getDescription()); - const PointerType *Ty = dyn_cast(yyvsp[-1].TypeVal->get()); + GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-1].TypeVal))->getDescription()); + const PointerType *Ty = dyn_cast((yyvsp[-1].TypeVal)->get()); if (Ty == 0) GEN_ERROR("Global const reference must be a pointer type"); @@ -3369,7 +4164,7 @@ Function *SavedCurFn = CurFun.CurrentFunction; CurFun.CurrentFunction = 0; - Value *V = getExistingVal(Ty, yyvsp[0].ValIDVal); + Value *V = getExistingVal(Ty, (yyvsp[0].ValIDVal)); CHECK_FOR_ERROR CurFun.CurrentFunction = SavedCurFn; @@ -3384,16 +4179,16 @@ // First check to see if the forward references value is already created! PerModuleInfo::GlobalRefsType::iterator I = - CurModule.GlobalRefs.find(std::make_pair(PT, yyvsp[0].ValIDVal)); + CurModule.GlobalRefs.find(std::make_pair(PT, (yyvsp[0].ValIDVal))); if (I != CurModule.GlobalRefs.end()) { V = I->second; // Placeholder already exists, use it... - yyvsp[0].ValIDVal.destroy(); + (yyvsp[0].ValIDVal).destroy(); } else { std::string Name; - if (yyvsp[0].ValIDVal.Type == ValID::GlobalName) - Name = yyvsp[0].ValIDVal.getName(); - else if (yyvsp[0].ValIDVal.Type != ValID::GlobalID) + if ((yyvsp[0].ValIDVal).Type == ValID::GlobalName) + Name = (yyvsp[0].ValIDVal).getName(); + else if ((yyvsp[0].ValIDVal).Type != ValID::GlobalID) GEN_ERROR("Invalid reference to global"); // Create the forward referenced global. @@ -3409,336 +4204,371 @@ } // Keep track of the fact that we have a forward ref to recycle it - CurModule.GlobalRefs.insert(std::make_pair(std::make_pair(PT, yyvsp[0].ValIDVal), GV)); + CurModule.GlobalRefs.insert(std::make_pair(std::make_pair(PT, (yyvsp[0].ValIDVal)), GV)); V = GV; } } - yyval.ConstVal = cast(V); - delete yyvsp[-1].TypeVal; // Free the type handle + (yyval.ConstVal) = cast(V); + delete (yyvsp[-1].TypeVal); // Free the type handle CHECK_FOR_ERROR - ; - break;} -case 161: -#line 1791 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ + ;} + break; + + case 167: +#line 1796 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*yyvsp[-1].TypeVal)->getDescription()); - if (yyvsp[-1].TypeVal->get() != yyvsp[0].ConstVal->getType()) + GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-1].TypeVal))->getDescription()); + if ((yyvsp[-1].TypeVal)->get() != (yyvsp[0].ConstVal)->getType()) GEN_ERROR("Mismatched types for constant expression: " + - (*yyvsp[-1].TypeVal)->getDescription() + " and " + yyvsp[0].ConstVal->getType()->getDescription()); - yyval.ConstVal = yyvsp[0].ConstVal; - delete yyvsp[-1].TypeVal; - CHECK_FOR_ERROR - ; - break;} -case 162: -#line 1801 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ + (*(yyvsp[-1].TypeVal))->getDescription() + " and " + (yyvsp[0].ConstVal)->getType()->getDescription()); + (yyval.ConstVal) = (yyvsp[0].ConstVal); + delete (yyvsp[-1].TypeVal); + CHECK_FOR_ERROR + ;} + break; + + case 168: +#line 1806 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*yyvsp[-1].TypeVal)->getDescription()); - const Type *Ty = yyvsp[-1].TypeVal->get(); + GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-1].TypeVal))->getDescription()); + const Type *Ty = (yyvsp[-1].TypeVal)->get(); if (isa(Ty) || Ty == Type::LabelTy || isa(Ty)) GEN_ERROR("Cannot create a null initialized value of this type"); - yyval.ConstVal = Constant::getNullValue(Ty); - delete yyvsp[-1].TypeVal; + (yyval.ConstVal) = Constant::getNullValue(Ty); + delete (yyvsp[-1].TypeVal); CHECK_FOR_ERROR - ; - break;} -case 163: -#line 1811 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ // integral constants - if (!ConstantInt::isValueValidForType(yyvsp[-1].PrimType, yyvsp[0].SInt64Val)) + ;} + break; + + case 169: +#line 1816 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { // integral constants + if (!ConstantInt::isValueValidForType((yyvsp[-1].PrimType), (yyvsp[0].SInt64Val))) GEN_ERROR("Constant value doesn't fit in type"); - yyval.ConstVal = ConstantInt::get(yyvsp[-1].PrimType, yyvsp[0].SInt64Val, true); + (yyval.ConstVal) = ConstantInt::get((yyvsp[-1].PrimType), (yyvsp[0].SInt64Val), true); CHECK_FOR_ERROR - ; - break;} -case 164: -#line 1817 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ // arbitrary precision integer constants - uint32_t BitWidth = cast(yyvsp[-1].PrimType)->getBitWidth(); - if (yyvsp[0].APIntVal->getBitWidth() > BitWidth) { + ;} + break; + + case 170: +#line 1822 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { // arbitrary precision integer constants + uint32_t BitWidth = cast((yyvsp[-1].PrimType))->getBitWidth(); + if ((yyvsp[0].APIntVal)->getBitWidth() > BitWidth) { GEN_ERROR("Constant value does not fit in type"); } - yyvsp[0].APIntVal->sextOrTrunc(BitWidth); - yyval.ConstVal = ConstantInt::get(*yyvsp[0].APIntVal); - delete yyvsp[0].APIntVal; - CHECK_FOR_ERROR - ; - break;} -case 165: -#line 1827 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ // integral constants - if (!ConstantInt::isValueValidForType(yyvsp[-1].PrimType, yyvsp[0].UInt64Val)) + (yyvsp[0].APIntVal)->sextOrTrunc(BitWidth); + (yyval.ConstVal) = ConstantInt::get(*(yyvsp[0].APIntVal)); + delete (yyvsp[0].APIntVal); + CHECK_FOR_ERROR + ;} + break; + + case 171: +#line 1832 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { // integral constants + if (!ConstantInt::isValueValidForType((yyvsp[-1].PrimType), (yyvsp[0].UInt64Val))) GEN_ERROR("Constant value doesn't fit in type"); - yyval.ConstVal = ConstantInt::get(yyvsp[-1].PrimType, yyvsp[0].UInt64Val, false); + (yyval.ConstVal) = ConstantInt::get((yyvsp[-1].PrimType), (yyvsp[0].UInt64Val), false); CHECK_FOR_ERROR - ; - break;} -case 166: -#line 1833 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ // arbitrary precision integer constants - uint32_t BitWidth = cast(yyvsp[-1].PrimType)->getBitWidth(); - if (yyvsp[0].APIntVal->getBitWidth() > BitWidth) { + ;} + break; + + case 172: +#line 1838 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { // arbitrary precision integer constants + uint32_t BitWidth = cast((yyvsp[-1].PrimType))->getBitWidth(); + if ((yyvsp[0].APIntVal)->getBitWidth() > BitWidth) { GEN_ERROR("Constant value does not fit in type"); } - yyvsp[0].APIntVal->zextOrTrunc(BitWidth); - yyval.ConstVal = ConstantInt::get(*yyvsp[0].APIntVal); - delete yyvsp[0].APIntVal; - CHECK_FOR_ERROR - ; - break;} -case 167: -#line 1843 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ // Boolean constants - assert(cast(yyvsp[-1].PrimType)->getBitWidth() == 1 && "Not Bool?"); - yyval.ConstVal = ConstantInt::getTrue(); - CHECK_FOR_ERROR - ; - break;} -case 168: -#line 1848 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ // Boolean constants - assert(cast(yyvsp[-1].PrimType)->getBitWidth() == 1 && "Not Bool?"); - yyval.ConstVal = ConstantInt::getFalse(); - CHECK_FOR_ERROR - ; - break;} -case 169: -#line 1853 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ // Float & Double constants - if (!ConstantFP::isValueValidForType(yyvsp[-1].PrimType, yyvsp[0].FPVal)) + (yyvsp[0].APIntVal)->zextOrTrunc(BitWidth); + (yyval.ConstVal) = ConstantInt::get(*(yyvsp[0].APIntVal)); + delete (yyvsp[0].APIntVal); + CHECK_FOR_ERROR + ;} + break; + + case 173: +#line 1848 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { // Boolean constants + assert(cast((yyvsp[-1].PrimType))->getBitWidth() == 1 && "Not Bool?"); + (yyval.ConstVal) = ConstantInt::getTrue(); + CHECK_FOR_ERROR + ;} + break; + + case 174: +#line 1853 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { // Boolean constants + assert(cast((yyvsp[-1].PrimType))->getBitWidth() == 1 && "Not Bool?"); + (yyval.ConstVal) = ConstantInt::getFalse(); + CHECK_FOR_ERROR + ;} + break; + + case 175: +#line 1858 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { // Float & Double constants + if (!ConstantFP::isValueValidForType((yyvsp[-1].PrimType), (yyvsp[0].FPVal))) GEN_ERROR("Floating point constant invalid for type"); - yyval.ConstVal = ConstantFP::get(yyvsp[-1].PrimType, yyvsp[0].FPVal); + (yyval.ConstVal) = ConstantFP::get((yyvsp[-1].PrimType), (yyvsp[0].FPVal)); CHECK_FOR_ERROR - ; - break;} -case 170: -#line 1861 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ + ;} + break; + + case 176: +#line 1866 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*yyvsp[-1].TypeVal)->getDescription()); - Constant *Val = yyvsp[-3].ConstVal; - const Type *DestTy = yyvsp[-1].TypeVal->get(); - if (!CastInst::castIsValid(yyvsp[-5].CastOpVal, yyvsp[-3].ConstVal, DestTy)) + GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-1].TypeVal))->getDescription()); + Constant *Val = (yyvsp[-3].ConstVal); + const Type *DestTy = (yyvsp[-1].TypeVal)->get(); + if (!CastInst::castIsValid((yyvsp[-5].CastOpVal), (yyvsp[-3].ConstVal), DestTy)) GEN_ERROR("invalid cast opcode for cast from '" + Val->getType()->getDescription() + "' to '" + DestTy->getDescription() + "'"); - yyval.ConstVal = ConstantExpr::getCast(yyvsp[-5].CastOpVal, yyvsp[-3].ConstVal, DestTy); - delete yyvsp[-1].TypeVal; - ; - break;} -case 171: -#line 1873 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - if (!isa(yyvsp[-2].ConstVal->getType())) + (yyval.ConstVal) = ConstantExpr::getCast((yyvsp[-5].CastOpVal), (yyvsp[-3].ConstVal), DestTy); + delete (yyvsp[-1].TypeVal); + ;} + break; + + case 177: +#line 1878 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + if (!isa((yyvsp[-2].ConstVal)->getType())) GEN_ERROR("GetElementPtr requires a pointer operand"); const Type *IdxTy = - GetElementPtrInst::getIndexedType(yyvsp[-2].ConstVal->getType(), &(*yyvsp[-1].ValueList)[0], yyvsp[-1].ValueList->size(), + GetElementPtrInst::getIndexedType((yyvsp[-2].ConstVal)->getType(), &(*(yyvsp[-1].ValueList))[0], (yyvsp[-1].ValueList)->size(), true); if (!IdxTy) GEN_ERROR("Index list invalid for constant getelementptr"); SmallVector IdxVec; - for (unsigned i = 0, e = yyvsp[-1].ValueList->size(); i != e; ++i) - if (Constant *C = dyn_cast((*yyvsp[-1].ValueList)[i])) + for (unsigned i = 0, e = (yyvsp[-1].ValueList)->size(); i != e; ++i) + if (Constant *C = dyn_cast((*(yyvsp[-1].ValueList))[i])) IdxVec.push_back(C); else GEN_ERROR("Indices to constant getelementptr must be constants"); - delete yyvsp[-1].ValueList; + delete (yyvsp[-1].ValueList); - yyval.ConstVal = ConstantExpr::getGetElementPtr(yyvsp[-2].ConstVal, &IdxVec[0], IdxVec.size()); + (yyval.ConstVal) = ConstantExpr::getGetElementPtr((yyvsp[-2].ConstVal), &IdxVec[0], IdxVec.size()); CHECK_FOR_ERROR - ; - break;} -case 172: -#line 1895 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - if (yyvsp[-5].ConstVal->getType() != Type::Int1Ty) + ;} + break; + + case 178: +#line 1900 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + if ((yyvsp[-5].ConstVal)->getType() != Type::Int1Ty) GEN_ERROR("Select condition must be of boolean type"); - if (yyvsp[-3].ConstVal->getType() != yyvsp[-1].ConstVal->getType()) + if ((yyvsp[-3].ConstVal)->getType() != (yyvsp[-1].ConstVal)->getType()) GEN_ERROR("Select operand types must match"); - yyval.ConstVal = ConstantExpr::getSelect(yyvsp[-5].ConstVal, yyvsp[-3].ConstVal, yyvsp[-1].ConstVal); + (yyval.ConstVal) = ConstantExpr::getSelect((yyvsp[-5].ConstVal), (yyvsp[-3].ConstVal), (yyvsp[-1].ConstVal)); CHECK_FOR_ERROR - ; - break;} -case 173: -#line 1903 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - if (yyvsp[-3].ConstVal->getType() != yyvsp[-1].ConstVal->getType()) + ;} + break; + + case 179: +#line 1908 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + if ((yyvsp[-3].ConstVal)->getType() != (yyvsp[-1].ConstVal)->getType()) GEN_ERROR("Binary operator types must match"); CHECK_FOR_ERROR; - yyval.ConstVal = ConstantExpr::get(yyvsp[-5].BinaryOpVal, yyvsp[-3].ConstVal, yyvsp[-1].ConstVal); - ; - break;} -case 174: -#line 1909 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - if (yyvsp[-3].ConstVal->getType() != yyvsp[-1].ConstVal->getType()) + (yyval.ConstVal) = ConstantExpr::get((yyvsp[-5].BinaryOpVal), (yyvsp[-3].ConstVal), (yyvsp[-1].ConstVal)); + ;} + break; + + case 180: +#line 1914 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + if ((yyvsp[-3].ConstVal)->getType() != (yyvsp[-1].ConstVal)->getType()) GEN_ERROR("Logical operator types must match"); - if (!yyvsp[-3].ConstVal->getType()->isInteger()) { - if (Instruction::isShift(yyvsp[-5].BinaryOpVal) || !isa(yyvsp[-3].ConstVal->getType()) || - !cast(yyvsp[-3].ConstVal->getType())->getElementType()->isInteger()) + if (!(yyvsp[-3].ConstVal)->getType()->isInteger()) { + if (Instruction::isShift((yyvsp[-5].BinaryOpVal)) || !isa((yyvsp[-3].ConstVal)->getType()) || + !cast((yyvsp[-3].ConstVal)->getType())->getElementType()->isInteger()) GEN_ERROR("Logical operator requires integral operands"); } - yyval.ConstVal = ConstantExpr::get(yyvsp[-5].BinaryOpVal, yyvsp[-3].ConstVal, yyvsp[-1].ConstVal); + (yyval.ConstVal) = ConstantExpr::get((yyvsp[-5].BinaryOpVal), (yyvsp[-3].ConstVal), (yyvsp[-1].ConstVal)); CHECK_FOR_ERROR - ; - break;} -case 175: -#line 1920 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - if (yyvsp[-3].ConstVal->getType() != yyvsp[-1].ConstVal->getType()) + ;} + break; + + case 181: +#line 1925 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + if ((yyvsp[-3].ConstVal)->getType() != (yyvsp[-1].ConstVal)->getType()) GEN_ERROR("icmp operand types must match"); - yyval.ConstVal = ConstantExpr::getICmp(yyvsp[-5].IPredicate, yyvsp[-3].ConstVal, yyvsp[-1].ConstVal); - ; - break;} -case 176: -#line 1925 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - if (yyvsp[-3].ConstVal->getType() != yyvsp[-1].ConstVal->getType()) + (yyval.ConstVal) = ConstantExpr::getICmp((yyvsp[-5].IPredicate), (yyvsp[-3].ConstVal), (yyvsp[-1].ConstVal)); + ;} + break; + + case 182: +#line 1930 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + if ((yyvsp[-3].ConstVal)->getType() != (yyvsp[-1].ConstVal)->getType()) GEN_ERROR("fcmp operand types must match"); - yyval.ConstVal = ConstantExpr::getFCmp(yyvsp[-5].FPredicate, yyvsp[-3].ConstVal, yyvsp[-1].ConstVal); - ; - break;} -case 177: -#line 1930 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - if (!ExtractElementInst::isValidOperands(yyvsp[-3].ConstVal, yyvsp[-1].ConstVal)) + (yyval.ConstVal) = ConstantExpr::getFCmp((yyvsp[-5].FPredicate), (yyvsp[-3].ConstVal), (yyvsp[-1].ConstVal)); + ;} + break; + + case 183: +#line 1935 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + if (!ExtractElementInst::isValidOperands((yyvsp[-3].ConstVal), (yyvsp[-1].ConstVal))) GEN_ERROR("Invalid extractelement operands"); - yyval.ConstVal = ConstantExpr::getExtractElement(yyvsp[-3].ConstVal, yyvsp[-1].ConstVal); + (yyval.ConstVal) = ConstantExpr::getExtractElement((yyvsp[-3].ConstVal), (yyvsp[-1].ConstVal)); CHECK_FOR_ERROR - ; - break;} -case 178: -#line 1936 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - if (!InsertElementInst::isValidOperands(yyvsp[-5].ConstVal, yyvsp[-3].ConstVal, yyvsp[-1].ConstVal)) + ;} + break; + + case 184: +#line 1941 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + if (!InsertElementInst::isValidOperands((yyvsp[-5].ConstVal), (yyvsp[-3].ConstVal), (yyvsp[-1].ConstVal))) GEN_ERROR("Invalid insertelement operands"); - yyval.ConstVal = ConstantExpr::getInsertElement(yyvsp[-5].ConstVal, yyvsp[-3].ConstVal, yyvsp[-1].ConstVal); + (yyval.ConstVal) = ConstantExpr::getInsertElement((yyvsp[-5].ConstVal), (yyvsp[-3].ConstVal), (yyvsp[-1].ConstVal)); CHECK_FOR_ERROR - ; - break;} -case 179: -#line 1942 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - if (!ShuffleVectorInst::isValidOperands(yyvsp[-5].ConstVal, yyvsp[-3].ConstVal, yyvsp[-1].ConstVal)) + ;} + break; + + case 185: +#line 1947 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + if (!ShuffleVectorInst::isValidOperands((yyvsp[-5].ConstVal), (yyvsp[-3].ConstVal), (yyvsp[-1].ConstVal))) GEN_ERROR("Invalid shufflevector operands"); - yyval.ConstVal = ConstantExpr::getShuffleVector(yyvsp[-5].ConstVal, yyvsp[-3].ConstVal, yyvsp[-1].ConstVal); + (yyval.ConstVal) = ConstantExpr::getShuffleVector((yyvsp[-5].ConstVal), (yyvsp[-3].ConstVal), (yyvsp[-1].ConstVal)); CHECK_FOR_ERROR - ; - break;} -case 180: -#line 1951 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - (yyval.ConstVector = yyvsp[-2].ConstVector)->push_back(yyvsp[0].ConstVal); + ;} + break; + + case 186: +#line 1956 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + ((yyval.ConstVector) = (yyvsp[-2].ConstVector))->push_back((yyvsp[0].ConstVal)); CHECK_FOR_ERROR - ; - break;} -case 181: -#line 1955 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - yyval.ConstVector = new std::vector(); - yyval.ConstVector->push_back(yyvsp[0].ConstVal); + ;} + break; + + case 187: +#line 1960 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + (yyval.ConstVector) = new std::vector(); + (yyval.ConstVector)->push_back((yyvsp[0].ConstVal)); CHECK_FOR_ERROR - ; - break;} -case 182: -#line 1963 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.BoolVal = false; ; - break;} -case 183: -#line 1963 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.BoolVal = true; ; - break;} -case 184: -#line 1966 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.BoolVal = true; ; - break;} -case 185: -#line 1966 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.BoolVal = false; ; - break;} -case 186: -#line 1969 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - const Type* VTy = yyvsp[-1].TypeVal->get(); - Value *V = getVal(VTy, yyvsp[0].ValIDVal); + ;} + break; + + case 188: +#line 1968 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.BoolVal) = false; ;} + break; + + case 189: +#line 1968 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.BoolVal) = true; ;} + break; + + case 190: +#line 1971 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.BoolVal) = true; ;} + break; + + case 191: +#line 1971 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.BoolVal) = false; ;} + break; + + case 192: +#line 1974 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + const Type* VTy = (yyvsp[-1].TypeVal)->get(); + Value *V = getVal(VTy, (yyvsp[0].ValIDVal)); GlobalValue* Aliasee = dyn_cast(V); if (!Aliasee) GEN_ERROR("Aliases can be created only to global values"); - yyval.ConstVal = Aliasee; + (yyval.ConstVal) = Aliasee; CHECK_FOR_ERROR - delete yyvsp[-1].TypeVal; - ; - break;} -case 187: -#line 1980 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - Constant *Val = yyvsp[-3].ConstVal; - const Type *DestTy = yyvsp[-1].TypeVal->get(); - if (!CastInst::castIsValid(yyvsp[-5].CastOpVal, yyvsp[-3].ConstVal, DestTy)) + delete (yyvsp[-1].TypeVal); + ;} + break; + + case 193: +#line 1985 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + Constant *Val = (yyvsp[-3].ConstVal); + const Type *DestTy = (yyvsp[-1].TypeVal)->get(); + if (!CastInst::castIsValid((yyvsp[-5].CastOpVal), (yyvsp[-3].ConstVal), DestTy)) GEN_ERROR("invalid cast opcode for cast from '" + Val->getType()->getDescription() + "' to '" + DestTy->getDescription() + "'"); - yyval.ConstVal = ConstantExpr::getCast(yyvsp[-5].CastOpVal, yyvsp[-3].ConstVal, DestTy); + (yyval.ConstVal) = ConstantExpr::getCast((yyvsp[-5].CastOpVal), (yyvsp[-3].ConstVal), DestTy); CHECK_FOR_ERROR - delete yyvsp[-1].TypeVal; - ; - break;} -case 188: -#line 2001 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - yyval.ModuleVal = ParserResult = CurModule.CurrentModule; + delete (yyvsp[-1].TypeVal); + ;} + break; + + case 194: +#line 2006 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + (yyval.ModuleVal) = ParserResult = CurModule.CurrentModule; CurModule.ModuleDone(); CHECK_FOR_ERROR; - ; - break;} -case 189: -#line 2006 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - yyval.ModuleVal = ParserResult = CurModule.CurrentModule; + ;} + break; + + case 195: +#line 2011 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + (yyval.ModuleVal) = ParserResult = CurModule.CurrentModule; CurModule.ModuleDone(); CHECK_FOR_ERROR; - ; - break;} -case 192: -#line 2019 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ CurFun.isDeclare = false; ; - break;} -case 193: -#line 2019 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ + ;} + break; + + case 198: +#line 2024 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { CurFun.isDeclare = false; ;} + break; + + case 199: +#line 2024 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { CurFun.FunctionDone(); CHECK_FOR_ERROR - ; - break;} -case 194: -#line 2023 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ CurFun.isDeclare = true; ; - break;} -case 195: -#line 2023 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ + ;} + break; + + case 200: +#line 2028 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { CurFun.isDeclare = true; ;} + break; + + case 201: +#line 2028 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { CHECK_FOR_ERROR - ; - break;} -case 196: -#line 2026 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ + ;} + break; + + case 202: +#line 2031 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { CHECK_FOR_ERROR - ; - break;} -case 197: -#line 2029 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ + ;} + break; + + case 203: +#line 2034 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*yyvsp[0].TypeVal)->getDescription()); + GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[0].TypeVal))->getDescription()); // Eagerly resolve types. This is not an optimization, this is a // requirement that is due to the fact that we could have this: // @@ -3748,248 +4578,271 @@ // If types are not resolved eagerly, then the two types will not be // determined to be the same type! // - ResolveTypeTo(yyvsp[-2].StrVal, *yyvsp[0].TypeVal); + ResolveTypeTo((yyvsp[-2].StrVal), *(yyvsp[0].TypeVal)); - if (!setTypeName(*yyvsp[0].TypeVal, yyvsp[-2].StrVal) && !yyvsp[-2].StrVal) { + if (!setTypeName(*(yyvsp[0].TypeVal), (yyvsp[-2].StrVal)) && !(yyvsp[-2].StrVal)) { CHECK_FOR_ERROR // If this is a named type that is not a redefinition, add it to the slot // table. - CurModule.Types.push_back(*yyvsp[0].TypeVal); + CurModule.Types.push_back(*(yyvsp[0].TypeVal)); } - delete yyvsp[0].TypeVal; + delete (yyvsp[0].TypeVal); CHECK_FOR_ERROR - ; - break;} -case 198: -#line 2053 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - ResolveTypeTo(yyvsp[-2].StrVal, yyvsp[0].PrimType); + ;} + break; - if (!setTypeName(yyvsp[0].PrimType, yyvsp[-2].StrVal) && !yyvsp[-2].StrVal) { + case 204: +#line 2058 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + ResolveTypeTo((yyvsp[-2].StrVal), (yyvsp[0].PrimType)); + + if (!setTypeName((yyvsp[0].PrimType), (yyvsp[-2].StrVal)) && !(yyvsp[-2].StrVal)) { CHECK_FOR_ERROR // If this is a named type that is not a redefinition, add it to the slot // table. - CurModule.Types.push_back(yyvsp[0].PrimType); + CurModule.Types.push_back((yyvsp[0].PrimType)); } CHECK_FOR_ERROR - ; - break;} -case 199: -#line 2064 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ + ;} + break; + + case 205: +#line 2069 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { /* "Externally Visible" Linkage */ - if (yyvsp[0].ConstVal == 0) + if ((yyvsp[0].ConstVal) == 0) GEN_ERROR("Global value initializer is not a constant"); - CurGV = ParseGlobalVariable(yyvsp[-4].StrVal, GlobalValue::ExternalLinkage, - yyvsp[-3].Visibility, yyvsp[-1].BoolVal, yyvsp[0].ConstVal->getType(), yyvsp[0].ConstVal, yyvsp[-2].BoolVal); + CurGV = ParseGlobalVariable((yyvsp[-4].StrVal), GlobalValue::ExternalLinkage, + (yyvsp[-3].Visibility), (yyvsp[-1].BoolVal), (yyvsp[0].ConstVal)->getType(), (yyvsp[0].ConstVal), (yyvsp[-2].BoolVal)); CHECK_FOR_ERROR - ; - break;} -case 200: -#line 2071 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ + ;} + break; + + case 206: +#line 2076 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { CurGV = 0; - ; - break;} -case 201: -#line 2075 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - if (yyvsp[0].ConstVal == 0) + ;} + break; + + case 207: +#line 2080 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + if ((yyvsp[0].ConstVal) == 0) GEN_ERROR("Global value initializer is not a constant"); - CurGV = ParseGlobalVariable(yyvsp[-5].StrVal, yyvsp[-4].Linkage, yyvsp[-3].Visibility, yyvsp[-1].BoolVal, yyvsp[0].ConstVal->getType(), yyvsp[0].ConstVal, yyvsp[-2].BoolVal); + CurGV = ParseGlobalVariable((yyvsp[-5].StrVal), (yyvsp[-4].Linkage), (yyvsp[-3].Visibility), (yyvsp[-1].BoolVal), (yyvsp[0].ConstVal)->getType(), (yyvsp[0].ConstVal), (yyvsp[-2].BoolVal)); CHECK_FOR_ERROR - ; - break;} -case 202: -#line 2080 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ + ;} + break; + + case 208: +#line 2085 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { CurGV = 0; - ; - break;} -case 203: -#line 2084 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ + ;} + break; + + case 209: +#line 2089 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*yyvsp[0].TypeVal)->getDescription()); - CurGV = ParseGlobalVariable(yyvsp[-5].StrVal, yyvsp[-4].Linkage, yyvsp[-3].Visibility, yyvsp[-1].BoolVal, *yyvsp[0].TypeVal, 0, yyvsp[-2].BoolVal); + GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[0].TypeVal))->getDescription()); + CurGV = ParseGlobalVariable((yyvsp[-5].StrVal), (yyvsp[-4].Linkage), (yyvsp[-3].Visibility), (yyvsp[-1].BoolVal), *(yyvsp[0].TypeVal), 0, (yyvsp[-2].BoolVal)); CHECK_FOR_ERROR - delete yyvsp[0].TypeVal; - ; - break;} -case 204: -#line 2090 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ + delete (yyvsp[0].TypeVal); + ;} + break; + + case 210: +#line 2095 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { CurGV = 0; CHECK_FOR_ERROR - ; - break;} -case 205: -#line 2094 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ + ;} + break; + + case 211: +#line 2099 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { std::string Name; - if (yyvsp[-4].StrVal) { - Name = *yyvsp[-4].StrVal; - delete yyvsp[-4].StrVal; + if ((yyvsp[-4].StrVal)) { + Name = *(yyvsp[-4].StrVal); + delete (yyvsp[-4].StrVal); } if (Name.empty()) GEN_ERROR("Alias name cannot be empty"); - Constant* Aliasee = yyvsp[0].ConstVal; + Constant* Aliasee = (yyvsp[0].ConstVal); if (Aliasee == 0) GEN_ERROR(std::string("Invalid aliasee for alias: ") + Name); - GlobalAlias* GA = new GlobalAlias(Aliasee->getType(), yyvsp[-1].Linkage, Name, Aliasee, + GlobalAlias* GA = new GlobalAlias(Aliasee->getType(), (yyvsp[-1].Linkage), Name, Aliasee, CurModule.CurrentModule); - GA->setVisibility(yyvsp[-3].Visibility); + GA->setVisibility((yyvsp[-3].Visibility)); InsertValue(GA, CurModule.Values); CHECK_FOR_ERROR - ; - break;} -case 206: -#line 2113 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - CHECK_FOR_ERROR - ; - break;} -case 207: -#line 2116 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ + ;} + break; + + case 212: +#line 2118 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { CHECK_FOR_ERROR - ; - break;} -case 208: -#line 2122 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ + ;} + break; + + case 213: +#line 2121 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + CHECK_FOR_ERROR + ;} + break; + + case 214: +#line 2127 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { const std::string &AsmSoFar = CurModule.CurrentModule->getModuleInlineAsm(); if (AsmSoFar.empty()) - CurModule.CurrentModule->setModuleInlineAsm(*yyvsp[0].StrVal); + CurModule.CurrentModule->setModuleInlineAsm(*(yyvsp[0].StrVal)); else - CurModule.CurrentModule->setModuleInlineAsm(AsmSoFar+"\n"+*yyvsp[0].StrVal); - delete yyvsp[0].StrVal; + CurModule.CurrentModule->setModuleInlineAsm(AsmSoFar+"\n"+*(yyvsp[0].StrVal)); + delete (yyvsp[0].StrVal); CHECK_FOR_ERROR -; - break;} -case 209: -#line 2132 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - CurModule.CurrentModule->setTargetTriple(*yyvsp[0].StrVal); - delete yyvsp[0].StrVal; - ; - break;} -case 210: -#line 2136 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - CurModule.CurrentModule->setDataLayout(*yyvsp[0].StrVal); - delete yyvsp[0].StrVal; - ; - break;} -case 212: -#line 2143 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - CurModule.CurrentModule->addLibrary(*yyvsp[0].StrVal); - delete yyvsp[0].StrVal; +;} + break; + + case 215: +#line 2137 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + CurModule.CurrentModule->setTargetTriple(*(yyvsp[0].StrVal)); + delete (yyvsp[0].StrVal); + ;} + break; + + case 216: +#line 2141 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + CurModule.CurrentModule->setDataLayout(*(yyvsp[0].StrVal)); + delete (yyvsp[0].StrVal); + ;} + break; + + case 218: +#line 2148 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + CurModule.CurrentModule->addLibrary(*(yyvsp[0].StrVal)); + delete (yyvsp[0].StrVal); CHECK_FOR_ERROR - ; - break;} -case 213: -#line 2148 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - CurModule.CurrentModule->addLibrary(*yyvsp[0].StrVal); - delete yyvsp[0].StrVal; + ;} + break; + + case 219: +#line 2153 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + CurModule.CurrentModule->addLibrary(*(yyvsp[0].StrVal)); + delete (yyvsp[0].StrVal); CHECK_FOR_ERROR - ; - break;} -case 214: -#line 2153 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ + ;} + break; + + case 220: +#line 2158 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { CHECK_FOR_ERROR - ; - break;} -case 215: -#line 2162 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ + ;} + break; + + case 221: +#line 2167 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*yyvsp[-2].TypeVal)->getDescription()); - if (*yyvsp[-2].TypeVal == Type::VoidTy) + GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-2].TypeVal))->getDescription()); + if (*(yyvsp[-2].TypeVal) == Type::VoidTy) GEN_ERROR("void typed arguments are invalid"); - ArgListEntry E; E.Attrs = yyvsp[-1].ParamAttrs; E.Ty = yyvsp[-2].TypeVal; E.Name = yyvsp[0].StrVal; - yyval.ArgList = yyvsp[-4].ArgList; - yyvsp[-4].ArgList->push_back(E); - CHECK_FOR_ERROR - ; - break;} -case 216: -#line 2172 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ + ArgListEntry E; E.Attrs = (yyvsp[-1].ParamAttrs); E.Ty = (yyvsp[-2].TypeVal); E.Name = (yyvsp[0].StrVal); + (yyval.ArgList) = (yyvsp[-4].ArgList); + (yyvsp[-4].ArgList)->push_back(E); + CHECK_FOR_ERROR + ;} + break; + + case 222: +#line 2177 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*yyvsp[-2].TypeVal)->getDescription()); - if (*yyvsp[-2].TypeVal == Type::VoidTy) + GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-2].TypeVal))->getDescription()); + if (*(yyvsp[-2].TypeVal) == Type::VoidTy) GEN_ERROR("void typed arguments are invalid"); - ArgListEntry E; E.Attrs = yyvsp[-1].ParamAttrs; E.Ty = yyvsp[-2].TypeVal; E.Name = yyvsp[0].StrVal; - yyval.ArgList = new ArgListType; - yyval.ArgList->push_back(E); - CHECK_FOR_ERROR - ; - break;} -case 217: -#line 2183 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - yyval.ArgList = yyvsp[0].ArgList; + ArgListEntry E; E.Attrs = (yyvsp[-1].ParamAttrs); E.Ty = (yyvsp[-2].TypeVal); E.Name = (yyvsp[0].StrVal); + (yyval.ArgList) = new ArgListType; + (yyval.ArgList)->push_back(E); CHECK_FOR_ERROR - ; - break;} -case 218: -#line 2187 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - yyval.ArgList = yyvsp[-2].ArgList; + ;} + break; + + case 223: +#line 2188 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + (yyval.ArgList) = (yyvsp[0].ArgList); + CHECK_FOR_ERROR + ;} + break; + + case 224: +#line 2192 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + (yyval.ArgList) = (yyvsp[-2].ArgList); struct ArgListEntry E; E.Ty = new PATypeHolder(Type::VoidTy); E.Name = 0; E.Attrs = ParamAttr::None; - yyval.ArgList->push_back(E); + (yyval.ArgList)->push_back(E); CHECK_FOR_ERROR - ; - break;} -case 219: -#line 2196 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - yyval.ArgList = new ArgListType; + ;} + break; + + case 225: +#line 2201 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + (yyval.ArgList) = new ArgListType; struct ArgListEntry E; E.Ty = new PATypeHolder(Type::VoidTy); E.Name = 0; E.Attrs = ParamAttr::None; - yyval.ArgList->push_back(E); + (yyval.ArgList)->push_back(E); CHECK_FOR_ERROR - ; - break;} -case 220: -#line 2205 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - yyval.ArgList = 0; + ;} + break; + + case 226: +#line 2210 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + (yyval.ArgList) = 0; CHECK_FOR_ERROR - ; - break;} -case 221: -#line 2211 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - std::string FunctionName(*yyvsp[-6].StrVal); - delete yyvsp[-6].StrVal; // Free strdup'd memory! + ;} + break; + + case 227: +#line 2216 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + std::string FunctionName(*(yyvsp[-6].StrVal)); + delete (yyvsp[-6].StrVal); // Free strdup'd memory! // Check the function result for abstractness if this is a define. We should // have no abstract types at this point - if (!CurFun.isDeclare && CurModule.TypeIsUnresolved(yyvsp[-7].TypeVal)) - GEN_ERROR("Reference to abstract result: "+ yyvsp[-7].TypeVal->get()->getDescription()); + if (!CurFun.isDeclare && CurModule.TypeIsUnresolved((yyvsp[-7].TypeVal))) + GEN_ERROR("Reference to abstract result: "+ (yyvsp[-7].TypeVal)->get()->getDescription()); std::vector ParamTypeList; ParamAttrsVector Attrs; - if (yyvsp[-2].ParamAttrs != ParamAttr::None) { - ParamAttrsWithIndex PAWI; PAWI.index = 0; PAWI.attrs = yyvsp[-2].ParamAttrs; + if ((yyvsp[-2].ParamAttrs) != ParamAttr::None) { + ParamAttrsWithIndex PAWI; PAWI.index = 0; PAWI.attrs = (yyvsp[-2].ParamAttrs); Attrs.push_back(PAWI); } - if (yyvsp[-4].ArgList) { // If there are arguments... + if ((yyvsp[-4].ArgList)) { // If there are arguments... unsigned index = 1; - for (ArgListType::iterator I = yyvsp[-4].ArgList->begin(); I != yyvsp[-4].ArgList->end(); ++I, ++index) { + for (ArgListType::iterator I = (yyvsp[-4].ArgList)->begin(); I != (yyvsp[-4].ArgList)->end(); ++I, ++index) { const Type* Ty = I->Ty->get(); if (!CurFun.isDeclare && CurModule.TypeIsUnresolved(I->Ty)) GEN_ERROR("Reference to abstract argument: " + Ty->getDescription()); @@ -4009,9 +4862,9 @@ if (!Attrs.empty()) PAL = ParamAttrsList::get(Attrs); - FunctionType *FT = FunctionType::get(*yyvsp[-7].TypeVal, ParamTypeList, isVarArg, PAL); + FunctionType *FT = FunctionType::get(*(yyvsp[-7].TypeVal), ParamTypeList, isVarArg, PAL); const PointerType *PFT = PointerType::get(FT); - delete yyvsp[-7].TypeVal; + delete (yyvsp[-7].TypeVal); ValID ID; if (!FunctionName.empty()) { @@ -4060,26 +4913,26 @@ Fn->setLinkage(CurFun.Linkage); Fn->setVisibility(CurFun.Visibility); } - Fn->setCallingConv(yyvsp[-8].UIntVal); - Fn->setAlignment(yyvsp[0].UIntVal); - if (yyvsp[-1].StrVal) { - Fn->setSection(*yyvsp[-1].StrVal); - delete yyvsp[-1].StrVal; + Fn->setCallingConv((yyvsp[-8].UIntVal)); + Fn->setAlignment((yyvsp[0].UIntVal)); + if ((yyvsp[-1].StrVal)) { + Fn->setSection(*(yyvsp[-1].StrVal)); + delete (yyvsp[-1].StrVal); } // Add all of the arguments we parsed to the function... - if (yyvsp[-4].ArgList) { // Is null if empty... + if ((yyvsp[-4].ArgList)) { // Is null if empty... if (isVarArg) { // Nuke the last entry - assert(yyvsp[-4].ArgList->back().Ty->get() == Type::VoidTy && yyvsp[-4].ArgList->back().Name == 0 && + assert((yyvsp[-4].ArgList)->back().Ty->get() == Type::VoidTy && (yyvsp[-4].ArgList)->back().Name == 0 && "Not a varargs marker!"); - delete yyvsp[-4].ArgList->back().Ty; - yyvsp[-4].ArgList->pop_back(); // Delete the last entry + delete (yyvsp[-4].ArgList)->back().Ty; + (yyvsp[-4].ArgList)->pop_back(); // Delete the last entry } Function::arg_iterator ArgIt = Fn->arg_begin(); Function::arg_iterator ArgEnd = Fn->arg_end(); unsigned Idx = 1; - for (ArgListType::iterator I = yyvsp[-4].ArgList->begin(); - I != yyvsp[-4].ArgList->end() && ArgIt != ArgEnd; ++I, ++ArgIt) { + for (ArgListType::iterator I = (yyvsp[-4].ArgList)->begin(); + I != (yyvsp[-4].ArgList)->end() && ArgIt != ArgEnd; ++I, ++ArgIt) { delete I->Ty; // Delete the typeholder... setValueName(ArgIt, I->Name); // Insert arg into symtab... CHECK_FOR_ERROR @@ -4087,332 +4940,366 @@ Idx++; } - delete yyvsp[-4].ArgList; // We're now done with the argument list + delete (yyvsp[-4].ArgList); // We're now done with the argument list } CHECK_FOR_ERROR -; - break;} -case 224: -#line 2333 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - yyval.FunctionVal = CurFun.CurrentFunction; +;} + break; + + case 230: +#line 2338 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + (yyval.FunctionVal) = CurFun.CurrentFunction; // Make sure that we keep track of the linkage type even if there was a // previous "declare". - yyval.FunctionVal->setLinkage(yyvsp[-3].Linkage); - yyval.FunctionVal->setVisibility(yyvsp[-2].Visibility); -; - break;} -case 227: -#line 2344 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - yyval.FunctionVal = yyvsp[-1].FunctionVal; + (yyval.FunctionVal)->setLinkage((yyvsp[-3].Linkage)); + (yyval.FunctionVal)->setVisibility((yyvsp[-2].Visibility)); +;} + break; + + case 233: +#line 2349 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + (yyval.FunctionVal) = (yyvsp[-1].FunctionVal); CHECK_FOR_ERROR -; - break;} -case 228: -#line 2349 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - CurFun.CurrentFunction->setLinkage(yyvsp[-2].Linkage); - CurFun.CurrentFunction->setVisibility(yyvsp[-1].Visibility); - yyval.FunctionVal = CurFun.CurrentFunction; +;} + break; + + case 234: +#line 2354 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + CurFun.CurrentFunction->setLinkage((yyvsp[-2].Linkage)); + CurFun.CurrentFunction->setVisibility((yyvsp[-1].Visibility)); + (yyval.FunctionVal) = CurFun.CurrentFunction; CurFun.FunctionDone(); CHECK_FOR_ERROR - ; - break;} -case 229: -#line 2361 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - yyval.BoolVal = false; + ;} + break; + + case 235: +#line 2366 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + (yyval.BoolVal) = false; CHECK_FOR_ERROR - ; - break;} -case 230: -#line 2365 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - yyval.BoolVal = true; + ;} + break; + + case 236: +#line 2370 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + (yyval.BoolVal) = true; CHECK_FOR_ERROR - ; - break;} -case 231: -#line 2370 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ // A reference to a direct constant - yyval.ValIDVal = ValID::create(yyvsp[0].SInt64Val); - CHECK_FOR_ERROR - ; - break;} -case 232: -#line 2374 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - yyval.ValIDVal = ValID::create(yyvsp[0].UInt64Val); + ;} + break; + + case 237: +#line 2375 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { // A reference to a direct constant + (yyval.ValIDVal) = ValID::create((yyvsp[0].SInt64Val)); CHECK_FOR_ERROR - ; - break;} -case 233: -#line 2378 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ // Perhaps it's an FP constant? - yyval.ValIDVal = ValID::create(yyvsp[0].FPVal); - CHECK_FOR_ERROR - ; - break;} -case 234: -#line 2382 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - yyval.ValIDVal = ValID::create(ConstantInt::getTrue()); + ;} + break; + + case 238: +#line 2379 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + (yyval.ValIDVal) = ValID::create((yyvsp[0].UInt64Val)); CHECK_FOR_ERROR - ; - break;} -case 235: -#line 2386 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - yyval.ValIDVal = ValID::create(ConstantInt::getFalse()); + ;} + break; + + case 239: +#line 2383 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { // Perhaps it's an FP constant? + (yyval.ValIDVal) = ValID::create((yyvsp[0].FPVal)); CHECK_FOR_ERROR - ; - break;} -case 236: -#line 2390 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - yyval.ValIDVal = ValID::createNull(); + ;} + break; + + case 240: +#line 2387 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + (yyval.ValIDVal) = ValID::create(ConstantInt::getTrue()); CHECK_FOR_ERROR - ; - break;} -case 237: -#line 2394 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - yyval.ValIDVal = ValID::createUndef(); + ;} + break; + + case 241: +#line 2391 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + (yyval.ValIDVal) = ValID::create(ConstantInt::getFalse()); + CHECK_FOR_ERROR + ;} + break; + + case 242: +#line 2395 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + (yyval.ValIDVal) = ValID::createNull(); + CHECK_FOR_ERROR + ;} + break; + + case 243: +#line 2399 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + (yyval.ValIDVal) = ValID::createUndef(); + CHECK_FOR_ERROR + ;} + break; + + case 244: +#line 2403 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { // A vector zero constant. + (yyval.ValIDVal) = ValID::createZeroInit(); + CHECK_FOR_ERROR + ;} + break; + + case 245: +#line 2407 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { // Nonempty unsized packed vector + const Type *ETy = (*(yyvsp[-1].ConstVector))[0]->getType(); + int NumElements = (yyvsp[-1].ConstVector)->size(); + + VectorType* pt = VectorType::get(ETy, NumElements); + PATypeHolder* PTy = new PATypeHolder( + HandleUpRefs( + VectorType::get( + ETy, + NumElements) + ) + ); + + // Verify all elements are correct type! + for (unsigned i = 0; i < (yyvsp[-1].ConstVector)->size(); i++) { + if (ETy != (*(yyvsp[-1].ConstVector))[i]->getType()) + GEN_ERROR("Element #" + utostr(i) + " is not of type '" + + ETy->getDescription() +"' as required!\nIt is of type '" + + (*(yyvsp[-1].ConstVector))[i]->getType()->getDescription() + "'."); + } + + (yyval.ValIDVal) = ValID::create(ConstantVector::get(pt, *(yyvsp[-1].ConstVector))); + delete PTy; delete (yyvsp[-1].ConstVector); + CHECK_FOR_ERROR + ;} + break; + + case 246: +#line 2432 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + (yyval.ValIDVal) = ValID::create((yyvsp[0].ConstVal)); + CHECK_FOR_ERROR + ;} + break; + + case 247: +#line 2436 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + (yyval.ValIDVal) = ValID::createInlineAsm(*(yyvsp[-2].StrVal), *(yyvsp[0].StrVal), (yyvsp[-3].BoolVal)); + delete (yyvsp[-2].StrVal); + delete (yyvsp[0].StrVal); + CHECK_FOR_ERROR + ;} + break; + + case 248: +#line 2446 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { // Is it an integer reference...? + (yyval.ValIDVal) = ValID::createLocalID((yyvsp[0].UIntVal)); + CHECK_FOR_ERROR + ;} + break; + + case 249: +#line 2450 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + (yyval.ValIDVal) = ValID::createGlobalID((yyvsp[0].UIntVal)); + CHECK_FOR_ERROR + ;} + break; + + case 250: +#line 2454 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { // Is it a named reference...? + (yyval.ValIDVal) = ValID::createLocalName(*(yyvsp[0].StrVal)); + delete (yyvsp[0].StrVal); + CHECK_FOR_ERROR + ;} + break; + + case 251: +#line 2459 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { // Is it a named reference...? + (yyval.ValIDVal) = ValID::createGlobalName(*(yyvsp[0].StrVal)); + delete (yyvsp[0].StrVal); + CHECK_FOR_ERROR + ;} + break; + + case 254: +#line 2472 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + if (!UpRefs.empty()) + GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-1].TypeVal))->getDescription()); + (yyval.ValueVal) = getVal(*(yyvsp[-1].TypeVal), (yyvsp[0].ValIDVal)); + delete (yyvsp[-1].TypeVal); + CHECK_FOR_ERROR + ;} + break; + + case 255: +#line 2481 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + (yyval.FunctionVal) = (yyvsp[-1].FunctionVal); + CHECK_FOR_ERROR + ;} + break; + + case 256: +#line 2485 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { // Do not allow functions with 0 basic blocks + (yyval.FunctionVal) = (yyvsp[-1].FunctionVal); + CHECK_FOR_ERROR + ;} + break; + + case 257: +#line 2494 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + setValueName((yyvsp[0].TermInstVal), (yyvsp[-1].StrVal)); + CHECK_FOR_ERROR + InsertValue((yyvsp[0].TermInstVal)); + (yyvsp[-2].BasicBlockVal)->getInstList().push_back((yyvsp[0].TermInstVal)); + (yyval.BasicBlockVal) = (yyvsp[-2].BasicBlockVal); + CHECK_FOR_ERROR + ;} + break; + + case 258: +#line 2503 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + if (CastInst *CI1 = dyn_cast((yyvsp[0].InstVal))) + if (CastInst *CI2 = dyn_cast(CI1->getOperand(0))) + if (CI2->getParent() == 0) + (yyvsp[-1].BasicBlockVal)->getInstList().push_back(CI2); + (yyvsp[-1].BasicBlockVal)->getInstList().push_back((yyvsp[0].InstVal)); + (yyval.BasicBlockVal) = (yyvsp[-1].BasicBlockVal); + CHECK_FOR_ERROR + ;} + break; + + case 259: +#line 2512 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { // Empty space between instruction lists + (yyval.BasicBlockVal) = defineBBVal(ValID::createLocalID(CurFun.NextValNum)); + CHECK_FOR_ERROR + ;} + break; + + case 260: +#line 2516 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { // Labelled (named) basic block + (yyval.BasicBlockVal) = defineBBVal(ValID::createLocalName(*(yyvsp[0].StrVal))); + delete (yyvsp[0].StrVal); + CHECK_FOR_ERROR + + ;} + break; + + case 261: +#line 2523 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { // Return with a result... + (yyval.TermInstVal) = new ReturnInst((yyvsp[0].ValueVal)); CHECK_FOR_ERROR - ; - break;} -case 238: -#line 2398 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ // A vector zero constant. - yyval.ValIDVal = ValID::createZeroInit(); - CHECK_FOR_ERROR - ; - break;} -case 239: -#line 2402 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ // Nonempty unsized packed vector - const Type *ETy = (*yyvsp[-1].ConstVector)[0]->getType(); - int NumElements = yyvsp[-1].ConstVector->size(); - - VectorType* pt = VectorType::get(ETy, NumElements); - PATypeHolder* PTy = new PATypeHolder( - HandleUpRefs( - VectorType::get( - ETy, - NumElements) - ) - ); - - // Verify all elements are correct type! - for (unsigned i = 0; i < yyvsp[-1].ConstVector->size(); i++) { - if (ETy != (*yyvsp[-1].ConstVector)[i]->getType()) - GEN_ERROR("Element #" + utostr(i) + " is not of type '" + - ETy->getDescription() +"' as required!\nIt is of type '" + - (*yyvsp[-1].ConstVector)[i]->getType()->getDescription() + "'."); - } + ;} + break; - yyval.ValIDVal = ValID::create(ConstantVector::get(pt, *yyvsp[-1].ConstVector)); - delete PTy; delete yyvsp[-1].ConstVector; + case 262: +#line 2527 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { // Return with no result... + (yyval.TermInstVal) = new ReturnInst(); CHECK_FOR_ERROR - ; - break;} -case 240: -#line 2427 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - yyval.ValIDVal = ValID::create(yyvsp[0].ConstVal); + ;} + break; + + case 263: +#line 2531 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { // Unconditional Branch... + BasicBlock* tmpBB = getBBVal((yyvsp[0].ValIDVal)); CHECK_FOR_ERROR - ; - break;} -case 241: -#line 2431 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - yyval.ValIDVal = ValID::createInlineAsm(*yyvsp[-2].StrVal, *yyvsp[0].StrVal, yyvsp[-3].BoolVal); - delete yyvsp[-2].StrVal; - delete yyvsp[0].StrVal; - CHECK_FOR_ERROR - ; - break;} -case 242: -#line 2441 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ // Is it an integer reference...? - yyval.ValIDVal = ValID::createLocalID(yyvsp[0].UIntVal); - CHECK_FOR_ERROR - ; - break;} -case 243: -#line 2445 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - yyval.ValIDVal = ValID::createGlobalID(yyvsp[0].UIntVal); + (yyval.TermInstVal) = new BranchInst(tmpBB); + ;} + break; + + case 264: +#line 2536 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + assert(cast((yyvsp[-7].PrimType))->getBitWidth() == 1 && "Not Bool?"); + BasicBlock* tmpBBA = getBBVal((yyvsp[-3].ValIDVal)); CHECK_FOR_ERROR - ; - break;} -case 244: -#line 2449 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ // Is it a named reference...? - yyval.ValIDVal = ValID::createLocalName(*yyvsp[0].StrVal); - delete yyvsp[0].StrVal; - CHECK_FOR_ERROR - ; - break;} -case 245: -#line 2454 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ // Is it a named reference...? - yyval.ValIDVal = ValID::createGlobalName(*yyvsp[0].StrVal); - delete yyvsp[0].StrVal; - CHECK_FOR_ERROR - ; - break;} -case 248: -#line 2467 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*yyvsp[-1].TypeVal)->getDescription()); - yyval.ValueVal = getVal(*yyvsp[-1].TypeVal, yyvsp[0].ValIDVal); - delete yyvsp[-1].TypeVal; - CHECK_FOR_ERROR - ; - break;} -case 249: -#line 2476 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - yyval.FunctionVal = yyvsp[-1].FunctionVal; + BasicBlock* tmpBBB = getBBVal((yyvsp[0].ValIDVal)); CHECK_FOR_ERROR - ; - break;} -case 250: -#line 2480 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ // Do not allow functions with 0 basic blocks - yyval.FunctionVal = yyvsp[-1].FunctionVal; - CHECK_FOR_ERROR - ; - break;} -case 251: -#line 2489 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - setValueName(yyvsp[0].TermInstVal, yyvsp[-1].StrVal); + Value* tmpVal = getVal(Type::Int1Ty, (yyvsp[-6].ValIDVal)); CHECK_FOR_ERROR - InsertValue(yyvsp[0].TermInstVal); - yyvsp[-2].BasicBlockVal->getInstList().push_back(yyvsp[0].TermInstVal); - yyval.BasicBlockVal = yyvsp[-2].BasicBlockVal; - CHECK_FOR_ERROR - ; - break;} -case 252: -#line 2498 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - if (CastInst *CI1 = dyn_cast(yyvsp[0].InstVal)) - if (CastInst *CI2 = dyn_cast(CI1->getOperand(0))) - if (CI2->getParent() == 0) - yyvsp[-1].BasicBlockVal->getInstList().push_back(CI2); - yyvsp[-1].BasicBlockVal->getInstList().push_back(yyvsp[0].InstVal); - yyval.BasicBlockVal = yyvsp[-1].BasicBlockVal; - CHECK_FOR_ERROR - ; - break;} -case 253: -#line 2507 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ // Empty space between instruction lists - yyval.BasicBlockVal = defineBBVal(ValID::createLocalID(CurFun.NextValNum)); - CHECK_FOR_ERROR - ; - break;} -case 254: -#line 2511 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ // Labelled (named) basic block - yyval.BasicBlockVal = defineBBVal(ValID::createLocalName(*yyvsp[0].StrVal)); - delete yyvsp[0].StrVal; - CHECK_FOR_ERROR - - ; - break;} -case 255: -#line 2518 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ // Return with a result... - yyval.TermInstVal = new ReturnInst(yyvsp[0].ValueVal); - CHECK_FOR_ERROR - ; - break;} -case 256: -#line 2522 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ // Return with no result... - yyval.TermInstVal = new ReturnInst(); - CHECK_FOR_ERROR - ; - break;} -case 257: -#line 2526 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ // Unconditional Branch... - BasicBlock* tmpBB = getBBVal(yyvsp[0].ValIDVal); - CHECK_FOR_ERROR - yyval.TermInstVal = new BranchInst(tmpBB); - ; - break;} -case 258: -#line 2531 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - assert(cast(yyvsp[-7].PrimType)->getBitWidth() == 1 && "Not Bool?"); - BasicBlock* tmpBBA = getBBVal(yyvsp[-3].ValIDVal); - CHECK_FOR_ERROR - BasicBlock* tmpBBB = getBBVal(yyvsp[0].ValIDVal); - CHECK_FOR_ERROR - Value* tmpVal = getVal(Type::Int1Ty, yyvsp[-6].ValIDVal); - CHECK_FOR_ERROR - yyval.TermInstVal = new BranchInst(tmpBBA, tmpBBB, tmpVal); - ; - break;} -case 259: -#line 2541 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - Value* tmpVal = getVal(yyvsp[-7].PrimType, yyvsp[-6].ValIDVal); + (yyval.TermInstVal) = new BranchInst(tmpBBA, tmpBBB, tmpVal); + ;} + break; + + case 265: +#line 2546 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + Value* tmpVal = getVal((yyvsp[-7].PrimType), (yyvsp[-6].ValIDVal)); CHECK_FOR_ERROR - BasicBlock* tmpBB = getBBVal(yyvsp[-3].ValIDVal); + BasicBlock* tmpBB = getBBVal((yyvsp[-3].ValIDVal)); CHECK_FOR_ERROR - SwitchInst *S = new SwitchInst(tmpVal, tmpBB, yyvsp[-1].JumpTable->size()); - yyval.TermInstVal = S; + SwitchInst *S = new SwitchInst(tmpVal, tmpBB, (yyvsp[-1].JumpTable)->size()); + (yyval.TermInstVal) = S; - std::vector >::iterator I = yyvsp[-1].JumpTable->begin(), - E = yyvsp[-1].JumpTable->end(); + std::vector >::iterator I = (yyvsp[-1].JumpTable)->begin(), + E = (yyvsp[-1].JumpTable)->end(); for (; I != E; ++I) { if (ConstantInt *CI = dyn_cast(I->first)) S->addCase(CI, I->second); else GEN_ERROR("Switch case is constant, but not a simple integer"); } - delete yyvsp[-1].JumpTable; + delete (yyvsp[-1].JumpTable); CHECK_FOR_ERROR - ; - break;} -case 260: -#line 2560 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - Value* tmpVal = getVal(yyvsp[-6].PrimType, yyvsp[-5].ValIDVal); + ;} + break; + + case 266: +#line 2565 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + Value* tmpVal = getVal((yyvsp[-6].PrimType), (yyvsp[-5].ValIDVal)); CHECK_FOR_ERROR - BasicBlock* tmpBB = getBBVal(yyvsp[-2].ValIDVal); + BasicBlock* tmpBB = getBBVal((yyvsp[-2].ValIDVal)); CHECK_FOR_ERROR SwitchInst *S = new SwitchInst(tmpVal, tmpBB, 0); - yyval.TermInstVal = S; + (yyval.TermInstVal) = S; CHECK_FOR_ERROR - ; - break;} -case 261: -#line 2570 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ + ;} + break; + + case 267: +#line 2575 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { // Handle the short syntax const PointerType *PFTy = 0; const FunctionType *Ty = 0; - if (!(PFTy = dyn_cast(yyvsp[-11].TypeVal->get())) || + if (!(PFTy = dyn_cast((yyvsp[-11].TypeVal)->get())) || !(Ty = dyn_cast(PFTy->getElementType()))) { // Pull out the types of all of the arguments... std::vector ParamTypes; ParamAttrsVector Attrs; - if (yyvsp[-6].ParamAttrs != ParamAttr::None) { - ParamAttrsWithIndex PAWI; PAWI.index = 0; PAWI.attrs = yyvsp[-6].ParamAttrs; + if ((yyvsp[-6].ParamAttrs) != ParamAttr::None) { + ParamAttrsWithIndex PAWI; PAWI.index = 0; PAWI.attrs = (yyvsp[-6].ParamAttrs); Attrs.push_back(PAWI); } - ValueRefList::iterator I = yyvsp[-8].ValueRefList->begin(), E = yyvsp[-8].ValueRefList->end(); + ValueRefList::iterator I = (yyvsp[-8].ValueRefList)->begin(), E = (yyvsp[-8].ValueRefList)->end(); unsigned index = 1; for (; I != E; ++I, ++index) { const Type *Ty = I->Val->getType(); @@ -4428,22 +5315,22 @@ ParamAttrsList *PAL = 0; if (!Attrs.empty()) PAL = ParamAttrsList::get(Attrs); - Ty = FunctionType::get(yyvsp[-11].TypeVal->get(), ParamTypes, false, PAL); + Ty = FunctionType::get((yyvsp[-11].TypeVal)->get(), ParamTypes, false, PAL); PFTy = PointerType::get(Ty); } - delete yyvsp[-11].TypeVal; + delete (yyvsp[-11].TypeVal); - Value *V = getVal(PFTy, yyvsp[-10].ValIDVal); // Get the function we're calling... + Value *V = getVal(PFTy, (yyvsp[-10].ValIDVal)); // Get the function we're calling... CHECK_FOR_ERROR - BasicBlock *Normal = getBBVal(yyvsp[-3].ValIDVal); + BasicBlock *Normal = getBBVal((yyvsp[-3].ValIDVal)); CHECK_FOR_ERROR - BasicBlock *Except = getBBVal(yyvsp[0].ValIDVal); + BasicBlock *Except = getBBVal((yyvsp[0].ValIDVal)); CHECK_FOR_ERROR // Check the arguments ValueList Args; - if (yyvsp[-8].ValueRefList->empty()) { // Has no arguments? + if ((yyvsp[-8].ValueRefList)->empty()) { // Has no arguments? // Make sure no arguments is a good thing! if (Ty->getNumParams() != 0) GEN_ERROR("No arguments passed to a function that " @@ -4453,7 +5340,7 @@ // correctly! FunctionType::param_iterator I = Ty->param_begin(); FunctionType::param_iterator E = Ty->param_end(); - ValueRefList::iterator ArgI = yyvsp[-8].ValueRefList->begin(), ArgE = yyvsp[-8].ValueRefList->end(); + ValueRefList::iterator ArgI = (yyvsp[-8].ValueRefList)->begin(), ArgE = (yyvsp[-8].ValueRefList)->end(); for (; ArgI != ArgE && I != E; ++ArgI, ++I) { if (ArgI->Val->getType() != *I) @@ -4472,322 +5359,348 @@ // Create the InvokeInst InvokeInst *II = new InvokeInst(V, Normal, Except, &Args[0], Args.size()); - II->setCallingConv(yyvsp[-12].UIntVal); - yyval.TermInstVal = II; - delete yyvsp[-8].ValueRefList; - CHECK_FOR_ERROR - ; - break;} -case 262: -#line 2649 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - yyval.TermInstVal = new UnwindInst(); + II->setCallingConv((yyvsp[-12].UIntVal)); + (yyval.TermInstVal) = II; + delete (yyvsp[-8].ValueRefList); CHECK_FOR_ERROR - ; - break;} -case 263: -#line 2653 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - yyval.TermInstVal = new UnreachableInst(); + ;} + break; + + case 268: +#line 2654 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + (yyval.TermInstVal) = new UnwindInst(); CHECK_FOR_ERROR - ; - break;} -case 264: -#line 2660 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - yyval.JumpTable = yyvsp[-5].JumpTable; - Constant *V = cast(getExistingVal(yyvsp[-4].PrimType, yyvsp[-3].ValIDVal)); + ;} + break; + + case 269: +#line 2658 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + (yyval.TermInstVal) = new UnreachableInst(); + CHECK_FOR_ERROR + ;} + break; + + case 270: +#line 2665 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + (yyval.JumpTable) = (yyvsp[-5].JumpTable); + Constant *V = cast(getExistingVal((yyvsp[-4].PrimType), (yyvsp[-3].ValIDVal))); CHECK_FOR_ERROR if (V == 0) GEN_ERROR("May only switch on a constant pool value"); - BasicBlock* tmpBB = getBBVal(yyvsp[0].ValIDVal); + BasicBlock* tmpBB = getBBVal((yyvsp[0].ValIDVal)); CHECK_FOR_ERROR - yyval.JumpTable->push_back(std::make_pair(V, tmpBB)); - ; - break;} -case 265: -#line 2671 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - yyval.JumpTable = new std::vector >(); - Constant *V = cast(getExistingVal(yyvsp[-4].PrimType, yyvsp[-3].ValIDVal)); + (yyval.JumpTable)->push_back(std::make_pair(V, tmpBB)); + ;} + break; + + case 271: +#line 2676 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + (yyval.JumpTable) = new std::vector >(); + Constant *V = cast(getExistingVal((yyvsp[-4].PrimType), (yyvsp[-3].ValIDVal))); CHECK_FOR_ERROR if (V == 0) GEN_ERROR("May only switch on a constant pool value"); - BasicBlock* tmpBB = getBBVal(yyvsp[0].ValIDVal); + BasicBlock* tmpBB = getBBVal((yyvsp[0].ValIDVal)); CHECK_FOR_ERROR - yyval.JumpTable->push_back(std::make_pair(V, tmpBB)); - ; - break;} -case 266: -#line 2684 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ + (yyval.JumpTable)->push_back(std::make_pair(V, tmpBB)); + ;} + break; + + case 272: +#line 2689 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { // Is this definition named?? if so, assign the name... - setValueName(yyvsp[0].InstVal, yyvsp[-1].StrVal); + setValueName((yyvsp[0].InstVal), (yyvsp[-1].StrVal)); CHECK_FOR_ERROR - InsertValue(yyvsp[0].InstVal); - yyval.InstVal = yyvsp[0].InstVal; + InsertValue((yyvsp[0].InstVal)); + (yyval.InstVal) = (yyvsp[0].InstVal); CHECK_FOR_ERROR - ; - break;} -case 267: -#line 2694 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ // Used for PHI nodes + ;} + break; + + case 273: +#line 2699 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { // Used for PHI nodes if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*yyvsp[-5].TypeVal)->getDescription()); - yyval.PHIList = new std::list >(); - Value* tmpVal = getVal(*yyvsp[-5].TypeVal, yyvsp[-3].ValIDVal); - CHECK_FOR_ERROR - BasicBlock* tmpBB = getBBVal(yyvsp[-1].ValIDVal); - CHECK_FOR_ERROR - yyval.PHIList->push_back(std::make_pair(tmpVal, tmpBB)); - delete yyvsp[-5].TypeVal; - ; - break;} -case 268: -#line 2705 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - yyval.PHIList = yyvsp[-6].PHIList; - Value* tmpVal = getVal(yyvsp[-6].PHIList->front().first->getType(), yyvsp[-3].ValIDVal); + GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-5].TypeVal))->getDescription()); + (yyval.PHIList) = new std::list >(); + Value* tmpVal = getVal(*(yyvsp[-5].TypeVal), (yyvsp[-3].ValIDVal)); + CHECK_FOR_ERROR + BasicBlock* tmpBB = getBBVal((yyvsp[-1].ValIDVal)); + CHECK_FOR_ERROR + (yyval.PHIList)->push_back(std::make_pair(tmpVal, tmpBB)); + delete (yyvsp[-5].TypeVal); + ;} + break; + + case 274: +#line 2710 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + (yyval.PHIList) = (yyvsp[-6].PHIList); + Value* tmpVal = getVal((yyvsp[-6].PHIList)->front().first->getType(), (yyvsp[-3].ValIDVal)); CHECK_FOR_ERROR - BasicBlock* tmpBB = getBBVal(yyvsp[-1].ValIDVal); + BasicBlock* tmpBB = getBBVal((yyvsp[-1].ValIDVal)); CHECK_FOR_ERROR - yyvsp[-6].PHIList->push_back(std::make_pair(tmpVal, tmpBB)); - ; - break;} -case 269: -#line 2715 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ + (yyvsp[-6].PHIList)->push_back(std::make_pair(tmpVal, tmpBB)); + ;} + break; + + case 275: +#line 2720 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*yyvsp[-2].TypeVal)->getDescription()); + GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-2].TypeVal))->getDescription()); // Used for call and invoke instructions - yyval.ValueRefList = new ValueRefList(); - ValueRefListEntry E; E.Attrs = yyvsp[0].ParamAttrs; E.Val = getVal(yyvsp[-2].TypeVal->get(), yyvsp[-1].ValIDVal); - yyval.ValueRefList->push_back(E); - delete yyvsp[-2].TypeVal; - ; - break;} -case 270: -#line 2724 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ + (yyval.ValueRefList) = new ValueRefList(); + ValueRefListEntry E; E.Attrs = (yyvsp[0].ParamAttrs); E.Val = getVal((yyvsp[-2].TypeVal)->get(), (yyvsp[-1].ValIDVal)); + (yyval.ValueRefList)->push_back(E); + delete (yyvsp[-2].TypeVal); + ;} + break; + + case 276: +#line 2729 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*yyvsp[-2].TypeVal)->getDescription()); - yyval.ValueRefList = yyvsp[-4].ValueRefList; - ValueRefListEntry E; E.Attrs = yyvsp[0].ParamAttrs; E.Val = getVal(yyvsp[-2].TypeVal->get(), yyvsp[-1].ValIDVal); - yyval.ValueRefList->push_back(E); - delete yyvsp[-2].TypeVal; - CHECK_FOR_ERROR - ; - break;} -case 271: -#line 2733 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.ValueRefList = new ValueRefList(); ; - break;} -case 272: -#line 2736 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ yyval.ValueList = new std::vector(); ; - break;} -case 273: -#line 2737 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - yyval.ValueList = yyvsp[-2].ValueList; - yyval.ValueList->push_back(yyvsp[0].ValueVal); + GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-2].TypeVal))->getDescription()); + (yyval.ValueRefList) = (yyvsp[-4].ValueRefList); + ValueRefListEntry E; E.Attrs = (yyvsp[0].ParamAttrs); E.Val = getVal((yyvsp[-2].TypeVal)->get(), (yyvsp[-1].ValIDVal)); + (yyval.ValueRefList)->push_back(E); + delete (yyvsp[-2].TypeVal); CHECK_FOR_ERROR - ; - break;} -case 274: -#line 2744 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - yyval.BoolVal = true; + ;} + break; + + case 277: +#line 2738 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.ValueRefList) = new ValueRefList(); ;} + break; + + case 278: +#line 2741 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.ValueList) = new std::vector(); ;} + break; + + case 279: +#line 2742 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + (yyval.ValueList) = (yyvsp[-2].ValueList); + (yyval.ValueList)->push_back((yyvsp[0].ValueVal)); CHECK_FOR_ERROR - ; - break;} -case 275: -#line 2748 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - yyval.BoolVal = false; + ;} + break; + + case 280: +#line 2749 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + (yyval.BoolVal) = true; CHECK_FOR_ERROR - ; - break;} -case 276: -#line 2753 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ + ;} + break; + + case 281: +#line 2753 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + (yyval.BoolVal) = false; + CHECK_FOR_ERROR + ;} + break; + + case 282: +#line 2758 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*yyvsp[-3].TypeVal)->getDescription()); - if (!(*yyvsp[-3].TypeVal)->isInteger() && !(*yyvsp[-3].TypeVal)->isFloatingPoint() && - !isa((*yyvsp[-3].TypeVal).get())) + GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-3].TypeVal))->getDescription()); + if (!(*(yyvsp[-3].TypeVal))->isInteger() && !(*(yyvsp[-3].TypeVal))->isFloatingPoint() && + !isa((*(yyvsp[-3].TypeVal)).get())) GEN_ERROR( "Arithmetic operator requires integer, FP, or packed operands"); - if (isa((*yyvsp[-3].TypeVal).get()) && - (yyvsp[-4].BinaryOpVal == Instruction::URem || - yyvsp[-4].BinaryOpVal == Instruction::SRem || - yyvsp[-4].BinaryOpVal == Instruction::FRem)) + if (isa((*(yyvsp[-3].TypeVal)).get()) && + ((yyvsp[-4].BinaryOpVal) == Instruction::URem || + (yyvsp[-4].BinaryOpVal) == Instruction::SRem || + (yyvsp[-4].BinaryOpVal) == Instruction::FRem)) GEN_ERROR("Remainder not supported on vector types"); - Value* val1 = getVal(*yyvsp[-3].TypeVal, yyvsp[-2].ValIDVal); + Value* val1 = getVal(*(yyvsp[-3].TypeVal), (yyvsp[-2].ValIDVal)); CHECK_FOR_ERROR - Value* val2 = getVal(*yyvsp[-3].TypeVal, yyvsp[0].ValIDVal); + Value* val2 = getVal(*(yyvsp[-3].TypeVal), (yyvsp[0].ValIDVal)); CHECK_FOR_ERROR - yyval.InstVal = BinaryOperator::create(yyvsp[-4].BinaryOpVal, val1, val2); - if (yyval.InstVal == 0) + (yyval.InstVal) = BinaryOperator::create((yyvsp[-4].BinaryOpVal), val1, val2); + if ((yyval.InstVal) == 0) GEN_ERROR("binary operator returned null"); - delete yyvsp[-3].TypeVal; - ; - break;} -case 277: -#line 2774 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ + delete (yyvsp[-3].TypeVal); + ;} + break; + + case 283: +#line 2779 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*yyvsp[-3].TypeVal)->getDescription()); - if (!(*yyvsp[-3].TypeVal)->isInteger()) { - if (Instruction::isShift(yyvsp[-4].BinaryOpVal) || !isa(yyvsp[-3].TypeVal->get()) || - !cast(yyvsp[-3].TypeVal->get())->getElementType()->isInteger()) + GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-3].TypeVal))->getDescription()); + if (!(*(yyvsp[-3].TypeVal))->isInteger()) { + if (Instruction::isShift((yyvsp[-4].BinaryOpVal)) || !isa((yyvsp[-3].TypeVal)->get()) || + !cast((yyvsp[-3].TypeVal)->get())->getElementType()->isInteger()) GEN_ERROR("Logical operator requires integral operands"); } - Value* tmpVal1 = getVal(*yyvsp[-3].TypeVal, yyvsp[-2].ValIDVal); + Value* tmpVal1 = getVal(*(yyvsp[-3].TypeVal), (yyvsp[-2].ValIDVal)); CHECK_FOR_ERROR - Value* tmpVal2 = getVal(*yyvsp[-3].TypeVal, yyvsp[0].ValIDVal); + Value* tmpVal2 = getVal(*(yyvsp[-3].TypeVal), (yyvsp[0].ValIDVal)); CHECK_FOR_ERROR - yyval.InstVal = BinaryOperator::create(yyvsp[-4].BinaryOpVal, tmpVal1, tmpVal2); - if (yyval.InstVal == 0) + (yyval.InstVal) = BinaryOperator::create((yyvsp[-4].BinaryOpVal), tmpVal1, tmpVal2); + if ((yyval.InstVal) == 0) GEN_ERROR("binary operator returned null"); - delete yyvsp[-3].TypeVal; - ; - break;} -case 278: -#line 2791 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ + delete (yyvsp[-3].TypeVal); + ;} + break; + + case 284: +#line 2796 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*yyvsp[-3].TypeVal)->getDescription()); - if (isa((*yyvsp[-3].TypeVal).get())) + GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-3].TypeVal))->getDescription()); + if (isa((*(yyvsp[-3].TypeVal)).get())) GEN_ERROR("Vector types not supported by icmp instruction"); - Value* tmpVal1 = getVal(*yyvsp[-3].TypeVal, yyvsp[-2].ValIDVal); + Value* tmpVal1 = getVal(*(yyvsp[-3].TypeVal), (yyvsp[-2].ValIDVal)); CHECK_FOR_ERROR - Value* tmpVal2 = getVal(*yyvsp[-3].TypeVal, yyvsp[0].ValIDVal); + Value* tmpVal2 = getVal(*(yyvsp[-3].TypeVal), (yyvsp[0].ValIDVal)); CHECK_FOR_ERROR - yyval.InstVal = CmpInst::create(yyvsp[-5].OtherOpVal, yyvsp[-4].IPredicate, tmpVal1, tmpVal2); - if (yyval.InstVal == 0) + (yyval.InstVal) = CmpInst::create((yyvsp[-5].OtherOpVal), (yyvsp[-4].IPredicate), tmpVal1, tmpVal2); + if ((yyval.InstVal) == 0) GEN_ERROR("icmp operator returned null"); - delete yyvsp[-3].TypeVal; - ; - break;} -case 279: -#line 2805 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ + delete (yyvsp[-3].TypeVal); + ;} + break; + + case 285: +#line 2810 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*yyvsp[-3].TypeVal)->getDescription()); - if (isa((*yyvsp[-3].TypeVal).get())) + GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-3].TypeVal))->getDescription()); + if (isa((*(yyvsp[-3].TypeVal)).get())) GEN_ERROR("Vector types not supported by fcmp instruction"); - Value* tmpVal1 = getVal(*yyvsp[-3].TypeVal, yyvsp[-2].ValIDVal); + Value* tmpVal1 = getVal(*(yyvsp[-3].TypeVal), (yyvsp[-2].ValIDVal)); CHECK_FOR_ERROR - Value* tmpVal2 = getVal(*yyvsp[-3].TypeVal, yyvsp[0].ValIDVal); + Value* tmpVal2 = getVal(*(yyvsp[-3].TypeVal), (yyvsp[0].ValIDVal)); CHECK_FOR_ERROR - yyval.InstVal = CmpInst::create(yyvsp[-5].OtherOpVal, yyvsp[-4].FPredicate, tmpVal1, tmpVal2); - if (yyval.InstVal == 0) + (yyval.InstVal) = CmpInst::create((yyvsp[-5].OtherOpVal), (yyvsp[-4].FPredicate), tmpVal1, tmpVal2); + if ((yyval.InstVal) == 0) GEN_ERROR("fcmp operator returned null"); - delete yyvsp[-3].TypeVal; - ; - break;} -case 280: -#line 2819 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ + delete (yyvsp[-3].TypeVal); + ;} + break; + + case 286: +#line 2824 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*yyvsp[0].TypeVal)->getDescription()); - Value* Val = yyvsp[-2].ValueVal; - const Type* DestTy = yyvsp[0].TypeVal->get(); - if (!CastInst::castIsValid(yyvsp[-3].CastOpVal, Val, DestTy)) + GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[0].TypeVal))->getDescription()); + Value* Val = (yyvsp[-2].ValueVal); + const Type* DestTy = (yyvsp[0].TypeVal)->get(); + if (!CastInst::castIsValid((yyvsp[-3].CastOpVal), Val, DestTy)) GEN_ERROR("invalid cast opcode for cast from '" + Val->getType()->getDescription() + "' to '" + DestTy->getDescription() + "'"); - yyval.InstVal = CastInst::create(yyvsp[-3].CastOpVal, Val, DestTy); - delete yyvsp[0].TypeVal; - ; - break;} -case 281: -#line 2831 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - if (yyvsp[-4].ValueVal->getType() != Type::Int1Ty) + (yyval.InstVal) = CastInst::create((yyvsp[-3].CastOpVal), Val, DestTy); + delete (yyvsp[0].TypeVal); + ;} + break; + + case 287: +#line 2836 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + if ((yyvsp[-4].ValueVal)->getType() != Type::Int1Ty) GEN_ERROR("select condition must be boolean"); - if (yyvsp[-2].ValueVal->getType() != yyvsp[0].ValueVal->getType()) + if ((yyvsp[-2].ValueVal)->getType() != (yyvsp[0].ValueVal)->getType()) GEN_ERROR("select value types should match"); - yyval.InstVal = new SelectInst(yyvsp[-4].ValueVal, yyvsp[-2].ValueVal, yyvsp[0].ValueVal); + (yyval.InstVal) = new SelectInst((yyvsp[-4].ValueVal), (yyvsp[-2].ValueVal), (yyvsp[0].ValueVal)); CHECK_FOR_ERROR - ; - break;} -case 282: -#line 2839 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ + ;} + break; + + case 288: +#line 2844 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*yyvsp[0].TypeVal)->getDescription()); - yyval.InstVal = new VAArgInst(yyvsp[-2].ValueVal, *yyvsp[0].TypeVal); - delete yyvsp[0].TypeVal; - CHECK_FOR_ERROR - ; - break;} -case 283: -#line 2846 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - if (!ExtractElementInst::isValidOperands(yyvsp[-2].ValueVal, yyvsp[0].ValueVal)) + GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[0].TypeVal))->getDescription()); + (yyval.InstVal) = new VAArgInst((yyvsp[-2].ValueVal), *(yyvsp[0].TypeVal)); + delete (yyvsp[0].TypeVal); + CHECK_FOR_ERROR + ;} + break; + + case 289: +#line 2851 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + if (!ExtractElementInst::isValidOperands((yyvsp[-2].ValueVal), (yyvsp[0].ValueVal))) GEN_ERROR("Invalid extractelement operands"); - yyval.InstVal = new ExtractElementInst(yyvsp[-2].ValueVal, yyvsp[0].ValueVal); + (yyval.InstVal) = new ExtractElementInst((yyvsp[-2].ValueVal), (yyvsp[0].ValueVal)); CHECK_FOR_ERROR - ; - break;} -case 284: -#line 2852 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - if (!InsertElementInst::isValidOperands(yyvsp[-4].ValueVal, yyvsp[-2].ValueVal, yyvsp[0].ValueVal)) + ;} + break; + + case 290: +#line 2857 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + if (!InsertElementInst::isValidOperands((yyvsp[-4].ValueVal), (yyvsp[-2].ValueVal), (yyvsp[0].ValueVal))) GEN_ERROR("Invalid insertelement operands"); - yyval.InstVal = new InsertElementInst(yyvsp[-4].ValueVal, yyvsp[-2].ValueVal, yyvsp[0].ValueVal); + (yyval.InstVal) = new InsertElementInst((yyvsp[-4].ValueVal), (yyvsp[-2].ValueVal), (yyvsp[0].ValueVal)); CHECK_FOR_ERROR - ; - break;} -case 285: -#line 2858 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - if (!ShuffleVectorInst::isValidOperands(yyvsp[-4].ValueVal, yyvsp[-2].ValueVal, yyvsp[0].ValueVal)) + ;} + break; + + case 291: +#line 2863 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + if (!ShuffleVectorInst::isValidOperands((yyvsp[-4].ValueVal), (yyvsp[-2].ValueVal), (yyvsp[0].ValueVal))) GEN_ERROR("Invalid shufflevector operands"); - yyval.InstVal = new ShuffleVectorInst(yyvsp[-4].ValueVal, yyvsp[-2].ValueVal, yyvsp[0].ValueVal); + (yyval.InstVal) = new ShuffleVectorInst((yyvsp[-4].ValueVal), (yyvsp[-2].ValueVal), (yyvsp[0].ValueVal)); CHECK_FOR_ERROR - ; - break;} -case 286: -#line 2864 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - const Type *Ty = yyvsp[0].PHIList->front().first->getType(); + ;} + break; + + case 292: +#line 2869 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + const Type *Ty = (yyvsp[0].PHIList)->front().first->getType(); if (!Ty->isFirstClassType()) GEN_ERROR("PHI node operands must be of first class type"); - yyval.InstVal = new PHINode(Ty); - ((PHINode*)yyval.InstVal)->reserveOperandSpace(yyvsp[0].PHIList->size()); - while (yyvsp[0].PHIList->begin() != yyvsp[0].PHIList->end()) { - if (yyvsp[0].PHIList->front().first->getType() != Ty) + (yyval.InstVal) = new PHINode(Ty); + ((PHINode*)(yyval.InstVal))->reserveOperandSpace((yyvsp[0].PHIList)->size()); + while ((yyvsp[0].PHIList)->begin() != (yyvsp[0].PHIList)->end()) { + if ((yyvsp[0].PHIList)->front().first->getType() != Ty) GEN_ERROR("All elements of a PHI node must be of the same type"); - cast(yyval.InstVal)->addIncoming(yyvsp[0].PHIList->front().first, yyvsp[0].PHIList->front().second); - yyvsp[0].PHIList->pop_front(); + cast((yyval.InstVal))->addIncoming((yyvsp[0].PHIList)->front().first, (yyvsp[0].PHIList)->front().second); + (yyvsp[0].PHIList)->pop_front(); } - delete yyvsp[0].PHIList; // Free the list... + delete (yyvsp[0].PHIList); // Free the list... CHECK_FOR_ERROR - ; - break;} -case 287: -#line 2880 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ + ;} + break; + + case 293: +#line 2885 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { // Handle the short syntax const PointerType *PFTy = 0; const FunctionType *Ty = 0; - if (!(PFTy = dyn_cast(yyvsp[-5].TypeVal->get())) || + if (!(PFTy = dyn_cast((yyvsp[-5].TypeVal)->get())) || !(Ty = dyn_cast(PFTy->getElementType()))) { // Pull out the types of all of the arguments... std::vector ParamTypes; ParamAttrsVector Attrs; - if (yyvsp[0].ParamAttrs != ParamAttr::None) { - ParamAttrsWithIndex PAWI; PAWI.index = 0; PAWI.attrs = yyvsp[0].ParamAttrs; + if ((yyvsp[0].ParamAttrs) != ParamAttr::None) { + ParamAttrsWithIndex PAWI; PAWI.index = 0; PAWI.attrs = (yyvsp[0].ParamAttrs); Attrs.push_back(PAWI); } unsigned index = 1; - ValueRefList::iterator I = yyvsp[-2].ValueRefList->begin(), E = yyvsp[-2].ValueRefList->end(); + ValueRefList::iterator I = (yyvsp[-2].ValueRefList)->begin(), E = (yyvsp[-2].ValueRefList)->end(); for (; I != E; ++I, ++index) { const Type *Ty = I->Val->getType(); if (Ty == Type::VoidTy) @@ -4803,11 +5716,11 @@ if (!Attrs.empty()) PAL = ParamAttrsList::get(Attrs); - Ty = FunctionType::get(yyvsp[-5].TypeVal->get(), ParamTypes, false, PAL); + Ty = FunctionType::get((yyvsp[-5].TypeVal)->get(), ParamTypes, false, PAL); PFTy = PointerType::get(Ty); } - Value *V = getVal(PFTy, yyvsp[-4].ValIDVal); // Get the function we're calling... + Value *V = getVal(PFTy, (yyvsp[-4].ValIDVal)); // Get the function we're calling... CHECK_FOR_ERROR // Check for call to invalid intrinsic to avoid crashing later. @@ -4821,7 +5734,7 @@ // Check the arguments ValueList Args; - if (yyvsp[-2].ValueRefList->empty()) { // Has no arguments? + if ((yyvsp[-2].ValueRefList)->empty()) { // Has no arguments? // Make sure no arguments is a good thing! if (Ty->getNumParams() != 0) GEN_ERROR("No arguments passed to a function that " @@ -4832,7 +5745,7 @@ // FunctionType::param_iterator I = Ty->param_begin(); FunctionType::param_iterator E = Ty->param_end(); - ValueRefList::iterator ArgI = yyvsp[-2].ValueRefList->begin(), ArgE = yyvsp[-2].ValueRefList->end(); + ValueRefList::iterator ArgI = (yyvsp[-2].ValueRefList)->begin(), ArgE = (yyvsp[-2].ValueRefList)->end(); for (; ArgI != ArgE && I != E; ++ArgI, ++I) { if (ArgI->Val->getType() != *I) @@ -4849,365 +5762,428 @@ } // Create the call node CallInst *CI = new CallInst(V, &Args[0], Args.size()); - CI->setTailCall(yyvsp[-7].BoolVal); - CI->setCallingConv(yyvsp[-6].UIntVal); - yyval.InstVal = CI; - delete yyvsp[-2].ValueRefList; - delete yyvsp[-5].TypeVal; - CHECK_FOR_ERROR - ; - break;} -case 288: -#line 2964 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - yyval.InstVal = yyvsp[0].InstVal; + CI->setTailCall((yyvsp[-7].BoolVal)); + CI->setCallingConv((yyvsp[-6].UIntVal)); + (yyval.InstVal) = CI; + delete (yyvsp[-2].ValueRefList); + delete (yyvsp[-5].TypeVal); CHECK_FOR_ERROR - ; - break;} -case 289: -#line 2969 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - yyval.BoolVal = true; + ;} + break; + + case 294: +#line 2969 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + (yyval.InstVal) = (yyvsp[0].InstVal); CHECK_FOR_ERROR - ; - break;} -case 290: -#line 2973 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - yyval.BoolVal = false; + ;} + break; + + case 295: +#line 2974 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + (yyval.BoolVal) = true; CHECK_FOR_ERROR - ; - break;} -case 291: -#line 2980 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ + ;} + break; + + case 296: +#line 2978 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + (yyval.BoolVal) = false; + CHECK_FOR_ERROR + ;} + break; + + case 297: +#line 2985 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*yyvsp[-1].TypeVal)->getDescription()); - yyval.InstVal = new MallocInst(*yyvsp[-1].TypeVal, 0, yyvsp[0].UIntVal); - delete yyvsp[-1].TypeVal; - CHECK_FOR_ERROR - ; - break;} -case 292: -#line 2987 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ + GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-1].TypeVal))->getDescription()); + (yyval.InstVal) = new MallocInst(*(yyvsp[-1].TypeVal), 0, (yyvsp[0].UIntVal)); + delete (yyvsp[-1].TypeVal); + CHECK_FOR_ERROR + ;} + break; + + case 298: +#line 2992 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*yyvsp[-4].TypeVal)->getDescription()); - Value* tmpVal = getVal(yyvsp[-2].PrimType, yyvsp[-1].ValIDVal); + GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-4].TypeVal))->getDescription()); + Value* tmpVal = getVal((yyvsp[-2].PrimType), (yyvsp[-1].ValIDVal)); CHECK_FOR_ERROR - yyval.InstVal = new MallocInst(*yyvsp[-4].TypeVal, tmpVal, yyvsp[0].UIntVal); - delete yyvsp[-4].TypeVal; - ; - break;} -case 293: -#line 2995 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ + (yyval.InstVal) = new MallocInst(*(yyvsp[-4].TypeVal), tmpVal, (yyvsp[0].UIntVal)); + delete (yyvsp[-4].TypeVal); + ;} + break; + + case 299: +#line 3000 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*yyvsp[-1].TypeVal)->getDescription()); - yyval.InstVal = new AllocaInst(*yyvsp[-1].TypeVal, 0, yyvsp[0].UIntVal); - delete yyvsp[-1].TypeVal; - CHECK_FOR_ERROR - ; - break;} -case 294: -#line 3002 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ + GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-1].TypeVal))->getDescription()); + (yyval.InstVal) = new AllocaInst(*(yyvsp[-1].TypeVal), 0, (yyvsp[0].UIntVal)); + delete (yyvsp[-1].TypeVal); + CHECK_FOR_ERROR + ;} + break; + + case 300: +#line 3007 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*yyvsp[-4].TypeVal)->getDescription()); - Value* tmpVal = getVal(yyvsp[-2].PrimType, yyvsp[-1].ValIDVal); + GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-4].TypeVal))->getDescription()); + Value* tmpVal = getVal((yyvsp[-2].PrimType), (yyvsp[-1].ValIDVal)); CHECK_FOR_ERROR - yyval.InstVal = new AllocaInst(*yyvsp[-4].TypeVal, tmpVal, yyvsp[0].UIntVal); - delete yyvsp[-4].TypeVal; - ; - break;} -case 295: -#line 3010 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ - if (!isa(yyvsp[0].ValueVal->getType())) + (yyval.InstVal) = new AllocaInst(*(yyvsp[-4].TypeVal), tmpVal, (yyvsp[0].UIntVal)); + delete (yyvsp[-4].TypeVal); + ;} + break; + + case 301: +#line 3015 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { + if (!isa((yyvsp[0].ValueVal)->getType())) GEN_ERROR("Trying to free nonpointer type " + - yyvsp[0].ValueVal->getType()->getDescription() + ""); - yyval.InstVal = new FreeInst(yyvsp[0].ValueVal); + (yyvsp[0].ValueVal)->getType()->getDescription() + ""); + (yyval.InstVal) = new FreeInst((yyvsp[0].ValueVal)); CHECK_FOR_ERROR - ; - break;} -case 296: -#line 3018 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ + ;} + break; + + case 302: +#line 3023 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*yyvsp[-2].TypeVal)->getDescription()); - if (!isa(yyvsp[-2].TypeVal->get())) + GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-2].TypeVal))->getDescription()); + if (!isa((yyvsp[-2].TypeVal)->get())) GEN_ERROR("Can't load from nonpointer type: " + - (*yyvsp[-2].TypeVal)->getDescription()); - if (!cast(yyvsp[-2].TypeVal->get())->getElementType()->isFirstClassType()) + (*(yyvsp[-2].TypeVal))->getDescription()); + if (!cast((yyvsp[-2].TypeVal)->get())->getElementType()->isFirstClassType()) GEN_ERROR("Can't load from pointer of non-first-class type: " + - (*yyvsp[-2].TypeVal)->getDescription()); - Value* tmpVal = getVal(*yyvsp[-2].TypeVal, yyvsp[-1].ValIDVal); + (*(yyvsp[-2].TypeVal))->getDescription()); + Value* tmpVal = getVal(*(yyvsp[-2].TypeVal), (yyvsp[-1].ValIDVal)); CHECK_FOR_ERROR - yyval.InstVal = new LoadInst(tmpVal, "", yyvsp[-4].BoolVal, yyvsp[0].UIntVal); - delete yyvsp[-2].TypeVal; - ; - break;} -case 297: -#line 3032 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ + (yyval.InstVal) = new LoadInst(tmpVal, "", (yyvsp[-4].BoolVal), (yyvsp[0].UIntVal)); + delete (yyvsp[-2].TypeVal); + ;} + break; + + case 303: +#line 3037 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*yyvsp[-2].TypeVal)->getDescription()); - const PointerType *PT = dyn_cast(yyvsp[-2].TypeVal->get()); + GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-2].TypeVal))->getDescription()); + const PointerType *PT = dyn_cast((yyvsp[-2].TypeVal)->get()); if (!PT) GEN_ERROR("Can't store to a nonpointer type: " + - (*yyvsp[-2].TypeVal)->getDescription()); + (*(yyvsp[-2].TypeVal))->getDescription()); const Type *ElTy = PT->getElementType(); - if (ElTy != yyvsp[-4].ValueVal->getType()) - GEN_ERROR("Can't store '" + yyvsp[-4].ValueVal->getType()->getDescription() + + if (ElTy != (yyvsp[-4].ValueVal)->getType()) + GEN_ERROR("Can't store '" + (yyvsp[-4].ValueVal)->getType()->getDescription() + "' into space of type '" + ElTy->getDescription() + "'"); - Value* tmpVal = getVal(*yyvsp[-2].TypeVal, yyvsp[-1].ValIDVal); + Value* tmpVal = getVal(*(yyvsp[-2].TypeVal), (yyvsp[-1].ValIDVal)); CHECK_FOR_ERROR - yyval.InstVal = new StoreInst(yyvsp[-4].ValueVal, tmpVal, yyvsp[-6].BoolVal, yyvsp[0].UIntVal); - delete yyvsp[-2].TypeVal; - ; - break;} -case 298: -#line 3049 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" -{ + (yyval.InstVal) = new StoreInst((yyvsp[-4].ValueVal), tmpVal, (yyvsp[-6].BoolVal), (yyvsp[0].UIntVal)); + delete (yyvsp[-2].TypeVal); + ;} + break; + + case 304: +#line 3054 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*yyvsp[-2].TypeVal)->getDescription()); - if (!isa(yyvsp[-2].TypeVal->get())) + GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-2].TypeVal))->getDescription()); + if (!isa((yyvsp[-2].TypeVal)->get())) GEN_ERROR("getelementptr insn requires pointer operand"); - if (!GetElementPtrInst::getIndexedType(*yyvsp[-2].TypeVal, &(*yyvsp[0].ValueList)[0], yyvsp[0].ValueList->size(), true)) + if (!GetElementPtrInst::getIndexedType(*(yyvsp[-2].TypeVal), &(*(yyvsp[0].ValueList))[0], (yyvsp[0].ValueList)->size(), true)) GEN_ERROR("Invalid getelementptr indices for type '" + - (*yyvsp[-2].TypeVal)->getDescription()+ "'"); - Value* tmpVal = getVal(*yyvsp[-2].TypeVal, yyvsp[-1].ValIDVal); + (*(yyvsp[-2].TypeVal))->getDescription()+ "'"); + Value* tmpVal = getVal(*(yyvsp[-2].TypeVal), (yyvsp[-1].ValIDVal)); CHECK_FOR_ERROR - yyval.InstVal = new GetElementPtrInst(tmpVal, &(*yyvsp[0].ValueList)[0], yyvsp[0].ValueList->size()); - delete yyvsp[-2].TypeVal; - delete yyvsp[0].ValueList; - ; - break;} -} - /* the action file gets copied in in place of this dollarsign */ -#line 543 "/usr/share/bison.simple" + (yyval.InstVal) = new GetElementPtrInst(tmpVal, &(*(yyvsp[0].ValueList))[0], (yyvsp[0].ValueList)->size()); + delete (yyvsp[-2].TypeVal); + delete (yyvsp[0].ValueList); + ;} + break; + + + default: break; + } + +/* Line 1126 of yacc.c. */ +#line 5919 "llvmAsmParser.tab.c" yyvsp -= yylen; yyssp -= yylen; -#ifdef YYLSP_NEEDED - yylsp -= yylen; -#endif -#if YYDEBUG != 0 - if (yydebug) - { - short *ssp1 = yyss - 1; - fprintf (stderr, "state stack now"); - while (ssp1 != yyssp) - fprintf (stderr, " %d", *++ssp1); - fprintf (stderr, "\n"); - } -#endif + + YY_STACK_PRINT (yyss, yyssp); *++yyvsp = yyval; -#ifdef YYLSP_NEEDED - yylsp++; - if (yylen == 0) - { - yylsp->first_line = yylloc.first_line; - yylsp->first_column = yylloc.first_column; - yylsp->last_line = (yylsp-1)->last_line; - yylsp->last_column = (yylsp-1)->last_column; - yylsp->text = 0; - } - else - { - yylsp->last_line = (yylsp+yylen-1)->last_line; - yylsp->last_column = (yylsp+yylen-1)->last_column; - } -#endif - /* Now "shift" the result of the reduction. - Determine what state that goes to, - based on the state we popped back to - and the rule number reduced by. */ + /* Now `shift' the result of the reduction. Determine what state + that goes to, based on the state we popped back to and the rule + number reduced by. */ yyn = yyr1[yyn]; - yystate = yypgoto[yyn - YYNTBASE] + *yyssp; - if (yystate >= 0 && yystate <= YYLAST && yycheck[yystate] == *yyssp) + yystate = yypgoto[yyn - YYNTOKENS] + *yyssp; + if (0 <= yystate && yystate <= YYLAST && yycheck[yystate] == *yyssp) yystate = yytable[yystate]; else - yystate = yydefgoto[yyn - YYNTBASE]; + yystate = yydefgoto[yyn - YYNTOKENS]; goto yynewstate; -yyerrlab: /* here on detecting error */ - if (! yyerrstatus) - /* If not already recovering from an error, report this error. */ +/*------------------------------------. +| yyerrlab -- here on detecting error | +`------------------------------------*/ +yyerrlab: + /* If not already recovering from an error, report this error. */ + if (!yyerrstatus) { ++yynerrs; - -#ifdef YYERROR_VERBOSE +#if YYERROR_VERBOSE yyn = yypact[yystate]; - if (yyn > YYFLAG && yyn < YYLAST) + if (YYPACT_NINF < yyn && yyn < YYLAST) { - int size = 0; - char *msg; - int x, count; - - count = 0; - /* Start X at -yyn if nec to avoid negative indexes in yycheck. */ - for (x = (yyn < 0 ? -yyn : 0); - x < (sizeof(yytname) / sizeof(char *)); x++) - if (yycheck[x + yyn] == x) - size += strlen(yytname[x]) + 15, count++; - msg = (char *) malloc(size + 15); - if (msg != 0) - { - strcpy(msg, "parse error"); + int yytype = YYTRANSLATE (yychar); + YYSIZE_T yysize0 = yytnamerr (0, yytname[yytype]); + YYSIZE_T yysize = yysize0; + YYSIZE_T yysize1; + int yysize_overflow = 0; + char *yymsg = 0; +# define YYERROR_VERBOSE_ARGS_MAXIMUM 5 + char const *yyarg[YYERROR_VERBOSE_ARGS_MAXIMUM]; + int yyx; - if (count < 5) +#if 0 + /* This is so xgettext sees the translatable formats that are + constructed on the fly. */ + YY_("syntax error, unexpected %s"); + YY_("syntax error, unexpected %s, expecting %s"); + YY_("syntax error, unexpected %s, expecting %s or %s"); + YY_("syntax error, unexpected %s, expecting %s or %s or %s"); + YY_("syntax error, unexpected %s, expecting %s or %s or %s or %s"); +#endif + char *yyfmt; + char const *yyf; + static char const yyunexpected[] = "syntax error, unexpected %s"; + static char const yyexpecting[] = ", expecting %s"; + static char const yyor[] = " or %s"; + char yyformat[sizeof yyunexpected + + sizeof yyexpecting - 1 + + ((YYERROR_VERBOSE_ARGS_MAXIMUM - 2) + * (sizeof yyor - 1))]; + char const *yyprefix = yyexpecting; + + /* Start YYX at -YYN if negative to avoid negative indexes in + YYCHECK. */ + int yyxbegin = yyn < 0 ? -yyn : 0; + + /* Stay within bounds of both yycheck and yytname. */ + int yychecklim = YYLAST - yyn; + int yyxend = yychecklim < YYNTOKENS ? yychecklim : YYNTOKENS; + int yycount = 1; + + yyarg[0] = yytname[yytype]; + yyfmt = yystpcpy (yyformat, yyunexpected); + + for (yyx = yyxbegin; yyx < yyxend; ++yyx) + if (yycheck[yyx + yyn] == yyx && yyx != YYTERROR) + { + if (yycount == YYERROR_VERBOSE_ARGS_MAXIMUM) + { + yycount = 1; + yysize = yysize0; + yyformat[sizeof yyunexpected - 1] = '\0'; + break; + } + yyarg[yycount++] = yytname[yyx]; + yysize1 = yysize + yytnamerr (0, yytname[yyx]); + yysize_overflow |= yysize1 < yysize; + yysize = yysize1; + yyfmt = yystpcpy (yyfmt, yyprefix); + yyprefix = yyor; + } + + yyf = YY_(yyformat); + yysize1 = yysize + yystrlen (yyf); + yysize_overflow |= yysize1 < yysize; + yysize = yysize1; + + if (!yysize_overflow && yysize <= YYSTACK_ALLOC_MAXIMUM) + yymsg = (char *) YYSTACK_ALLOC (yysize); + if (yymsg) + { + /* Avoid sprintf, as that infringes on the user's name space. + Don't have undefined behavior even if the translation + produced a string with the wrong number of "%s"s. */ + char *yyp = yymsg; + int yyi = 0; + while ((*yyp = *yyf)) { - count = 0; - for (x = (yyn < 0 ? -yyn : 0); - x < (sizeof(yytname) / sizeof(char *)); x++) - if (yycheck[x + yyn] == x) - { - strcat(msg, count == 0 ? ", expecting `" : " or `"); - strcat(msg, yytname[x]); - strcat(msg, "'"); - count++; - } + if (*yyp == '%' && yyf[1] == 's' && yyi < yycount) + { + yyp += yytnamerr (yyp, yyarg[yyi++]); + yyf += 2; + } + else + { + yyp++; + yyf++; + } } - yyerror(msg); - free(msg); + yyerror (yymsg); + YYSTACK_FREE (yymsg); } else - yyerror ("parse error; also virtual memory exceeded"); + { + yyerror (YY_("syntax error")); + goto yyexhaustedlab; + } } else #endif /* YYERROR_VERBOSE */ - yyerror("parse error"); + yyerror (YY_("syntax error")); } - goto yyerrlab1; -yyerrlab1: /* here on error raised explicitly by an action */ + if (yyerrstatus == 3) { - /* if just tried and failed to reuse lookahead token after an error, discard it. */ - - /* return failure if at end of input */ - if (yychar == YYEOF) - YYABORT; + /* If just tried and failed to reuse look-ahead token after an + error, discard it. */ -#if YYDEBUG != 0 - if (yydebug) - fprintf(stderr, "Discarding token %d (%s).\n", yychar, yytname[yychar1]); -#endif - - yychar = YYEMPTY; + if (yychar <= YYEOF) + { + /* Return failure if at end of input. */ + if (yychar == YYEOF) + YYABORT; + } + else + { + yydestruct ("Error: discarding", yytoken, &yylval); + yychar = YYEMPTY; + } } - /* Else will try to reuse lookahead token - after shifting the error token. */ - - yyerrstatus = 3; /* Each real token shifted decrements this */ + /* Else will try to reuse look-ahead token after shifting the error + token. */ + goto yyerrlab1; - goto yyerrhandle; -yyerrdefault: /* current state does not do anything special for the error token. */ +/*---------------------------------------------------. +| yyerrorlab -- error raised explicitly by YYERROR. | +`---------------------------------------------------*/ +yyerrorlab: + + /* Pacify compilers like GCC when the user code never invokes + YYERROR and the label yyerrorlab therefore never appears in user + code. */ + if (0) + goto yyerrorlab; -#if 0 - /* This is wrong; only states that explicitly want error tokens - should shift them. */ - yyn = yydefact[yystate]; /* If its default is to accept any token, ok. Otherwise pop it.*/ - if (yyn) goto yydefault; -#endif +yyvsp -= yylen; + yyssp -= yylen; + yystate = *yyssp; + goto yyerrlab1; -yyerrpop: /* pop the current state because it cannot handle the error token */ - if (yyssp == yyss) YYABORT; - yyvsp--; - yystate = *--yyssp; -#ifdef YYLSP_NEEDED - yylsp--; -#endif +/*-------------------------------------------------------------. +| yyerrlab1 -- common code for both syntax error and YYERROR. | +`-------------------------------------------------------------*/ +yyerrlab1: + yyerrstatus = 3; /* Each real token shifted decrements this. */ -#if YYDEBUG != 0 - if (yydebug) + for (;;) { - short *ssp1 = yyss - 1; - fprintf (stderr, "Error: state stack now"); - while (ssp1 != yyssp) - fprintf (stderr, " %d", *++ssp1); - fprintf (stderr, "\n"); - } -#endif - -yyerrhandle: + yyn = yypact[yystate]; + if (yyn != YYPACT_NINF) + { + yyn += YYTERROR; + if (0 <= yyn && yyn <= YYLAST && yycheck[yyn] == YYTERROR) + { + yyn = yytable[yyn]; + if (0 < yyn) + break; + } + } - yyn = yypact[yystate]; - if (yyn == YYFLAG) - goto yyerrdefault; + /* Pop the current state because it cannot handle the error token. */ + if (yyssp == yyss) + YYABORT; - yyn += YYTERROR; - if (yyn < 0 || yyn > YYLAST || yycheck[yyn] != YYTERROR) - goto yyerrdefault; - yyn = yytable[yyn]; - if (yyn < 0) - { - if (yyn == YYFLAG) - goto yyerrpop; - yyn = -yyn; - goto yyreduce; + yydestruct ("Error: popping", yystos[yystate], yyvsp); + YYPOPSTACK; + yystate = *yyssp; + YY_STACK_PRINT (yyss, yyssp); } - else if (yyn == 0) - goto yyerrpop; if (yyn == YYFINAL) YYACCEPT; -#if YYDEBUG != 0 - if (yydebug) - fprintf(stderr, "Shifting error token, "); -#endif - *++yyvsp = yylval; -#ifdef YYLSP_NEEDED - *++yylsp = yylloc; -#endif + + + /* Shift the error token. */ + YY_SYMBOL_PRINT ("Shifting", yystos[yyn], yyvsp, yylsp); yystate = yyn; goto yynewstate; - yyacceptlab: - /* YYACCEPT comes here. */ - if (yyfree_stacks) - { - free (yyss); - free (yyvs); -#ifdef YYLSP_NEEDED - free (yyls); -#endif - } - return 0; - yyabortlab: - /* YYABORT comes here. */ - if (yyfree_stacks) - { - free (yyss); - free (yyvs); -#ifdef YYLSP_NEEDED - free (yyls); +/*-------------------------------------. +| yyacceptlab -- YYACCEPT comes here. | +`-------------------------------------*/ +yyacceptlab: + yyresult = 0; + goto yyreturn; + +/*-----------------------------------. +| yyabortlab -- YYABORT comes here. | +`-----------------------------------*/ +yyabortlab: + yyresult = 1; + goto yyreturn; + +#ifndef yyoverflow +/*-------------------------------------------------. +| yyexhaustedlab -- memory exhaustion comes here. | +`-------------------------------------------------*/ +yyexhaustedlab: + yyerror (YY_("memory exhausted")); + yyresult = 2; + /* Fall through. */ +#endif + +yyreturn: + if (yychar != YYEOF && yychar != YYEMPTY) + yydestruct ("Cleanup: discarding lookahead", + yytoken, &yylval); + while (yyssp != yyss) + { + yydestruct ("Cleanup: popping", + yystos[*yyssp], yyvsp); + YYPOPSTACK; + } +#ifndef yyoverflow + if (yyss != yyssa) + YYSTACK_FREE (yyss); #endif - } - return 1; + return yyresult; } -#line 3066 "/Volumes/ProjectsDisk/cvs/llvm/lib/AsmParser/llvmAsmParser.y" + + +#line 3071 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" // common code from the two 'RunVMAsmParser' functions @@ -5288,3 +6264,4 @@ GenerateError(errMsg); return 0; } + Modified: llvm/trunk/lib/AsmParser/llvmAsmParser.h.cvs URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/llvmAsmParser.h.cvs?rev=40611&r1=40610&r2=40611&view=diff ============================================================================== --- llvm/trunk/lib/AsmParser/llvmAsmParser.h.cvs (original) +++ llvm/trunk/lib/AsmParser/llvmAsmParser.h.cvs Mon Jul 30 22:50:36 2007 @@ -1,4 +1,324 @@ -typedef union { +/* A Bison parser, made by GNU Bison 2.1. */ + +/* Skeleton parser for Yacc-like parsing with Bison, + Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2, or (at your option) + any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street, Fifth Floor, + Boston, MA 02110-1301, USA. */ + +/* As a special exception, when this file is copied by Bison into a + Bison output file, you may use that output file without restriction. + This special exception was added by the Free Software Foundation + in version 1.24 of Bison. */ + +/* Tokens. */ +#ifndef YYTOKENTYPE +# define YYTOKENTYPE + /* Put the tokens into the symbol table, so that GDB and other debuggers + know about them. */ + enum yytokentype { + ESINT64VAL = 258, + EUINT64VAL = 259, + ESAPINTVAL = 260, + EUAPINTVAL = 261, + LOCALVAL_ID = 262, + GLOBALVAL_ID = 263, + FPVAL = 264, + VOID = 265, + INTTYPE = 266, + FLOAT = 267, + DOUBLE = 268, + LABEL = 269, + TYPE = 270, + LOCALVAR = 271, + GLOBALVAR = 272, + LABELSTR = 273, + STRINGCONSTANT = 274, + ATSTRINGCONSTANT = 275, + PCTSTRINGCONSTANT = 276, + ZEROINITIALIZER = 277, + TRUETOK = 278, + FALSETOK = 279, + BEGINTOK = 280, + ENDTOK = 281, + DECLARE = 282, + DEFINE = 283, + GLOBAL = 284, + CONSTANT = 285, + SECTION = 286, + ALIAS = 287, + VOLATILE = 288, + THREAD_LOCAL = 289, + TO = 290, + DOTDOTDOT = 291, + NULL_TOK = 292, + UNDEF = 293, + INTERNAL = 294, + LINKONCE = 295, + WEAK = 296, + APPENDING = 297, + DLLIMPORT = 298, + DLLEXPORT = 299, + EXTERN_WEAK = 300, + OPAQUE = 301, + EXTERNAL = 302, + TARGET = 303, + TRIPLE = 304, + ALIGN = 305, + DEPLIBS = 306, + CALL = 307, + TAIL = 308, + ASM_TOK = 309, + MODULE = 310, + SIDEEFFECT = 311, + CC_TOK = 312, + CCC_TOK = 313, + FASTCC_TOK = 314, + COLDCC_TOK = 315, + X86_STDCALLCC_TOK = 316, + X86_FASTCALLCC_TOK = 317, + DATALAYOUT = 318, + RET = 319, + BR = 320, + SWITCH = 321, + INVOKE = 322, + UNWIND = 323, + UNREACHABLE = 324, + ADD = 325, + SUB = 326, + MUL = 327, + UDIV = 328, + SDIV = 329, + FDIV = 330, + UREM = 331, + SREM = 332, + FREM = 333, + AND = 334, + OR = 335, + XOR = 336, + SHL = 337, + LSHR = 338, + ASHR = 339, + ICMP = 340, + FCMP = 341, + EQ = 342, + NE = 343, + SLT = 344, + SGT = 345, + SLE = 346, + SGE = 347, + ULT = 348, + UGT = 349, + ULE = 350, + UGE = 351, + OEQ = 352, + ONE = 353, + OLT = 354, + OGT = 355, + OLE = 356, + OGE = 357, + ORD = 358, + UNO = 359, + UEQ = 360, + UNE = 361, + MALLOC = 362, + ALLOCA = 363, + FREE = 364, + LOAD = 365, + STORE = 366, + GETELEMENTPTR = 367, + TRUNC = 368, + ZEXT = 369, + SEXT = 370, + FPTRUNC = 371, + FPEXT = 372, + BITCAST = 373, + UITOFP = 374, + SITOFP = 375, + FPTOUI = 376, + FPTOSI = 377, + INTTOPTR = 378, + PTRTOINT = 379, + PHI_TOK = 380, + SELECT = 381, + VAARG = 382, + EXTRACTELEMENT = 383, + INSERTELEMENT = 384, + SHUFFLEVECTOR = 385, + SIGNEXT = 386, + ZEROEXT = 387, + NORETURN = 388, + INREG = 389, + SRET = 390, + NOUNWIND = 391, + NOALIAS = 392, + BYVAL = 393, + NEST = 394, + DEFAULT = 395, + HIDDEN = 396, + PROTECTED = 397 + }; +#endif +/* Tokens. */ +#define ESINT64VAL 258 +#define EUINT64VAL 259 +#define ESAPINTVAL 260 +#define EUAPINTVAL 261 +#define LOCALVAL_ID 262 +#define GLOBALVAL_ID 263 +#define FPVAL 264 +#define VOID 265 +#define INTTYPE 266 +#define FLOAT 267 +#define DOUBLE 268 +#define LABEL 269 +#define TYPE 270 +#define LOCALVAR 271 +#define GLOBALVAR 272 +#define LABELSTR 273 +#define STRINGCONSTANT 274 +#define ATSTRINGCONSTANT 275 +#define PCTSTRINGCONSTANT 276 +#define ZEROINITIALIZER 277 +#define TRUETOK 278 +#define FALSETOK 279 +#define BEGINTOK 280 +#define ENDTOK 281 +#define DECLARE 282 +#define DEFINE 283 +#define GLOBAL 284 +#define CONSTANT 285 +#define SECTION 286 +#define ALIAS 287 +#define VOLATILE 288 +#define THREAD_LOCAL 289 +#define TO 290 +#define DOTDOTDOT 291 +#define NULL_TOK 292 +#define UNDEF 293 +#define INTERNAL 294 +#define LINKONCE 295 +#define WEAK 296 +#define APPENDING 297 +#define DLLIMPORT 298 +#define DLLEXPORT 299 +#define EXTERN_WEAK 300 +#define OPAQUE 301 +#define EXTERNAL 302 +#define TARGET 303 +#define TRIPLE 304 +#define ALIGN 305 +#define DEPLIBS 306 +#define CALL 307 +#define TAIL 308 +#define ASM_TOK 309 +#define MODULE 310 +#define SIDEEFFECT 311 +#define CC_TOK 312 +#define CCC_TOK 313 +#define FASTCC_TOK 314 +#define COLDCC_TOK 315 +#define X86_STDCALLCC_TOK 316 +#define X86_FASTCALLCC_TOK 317 +#define DATALAYOUT 318 +#define RET 319 +#define BR 320 +#define SWITCH 321 +#define INVOKE 322 +#define UNWIND 323 +#define UNREACHABLE 324 +#define ADD 325 +#define SUB 326 +#define MUL 327 +#define UDIV 328 +#define SDIV 329 +#define FDIV 330 +#define UREM 331 +#define SREM 332 +#define FREM 333 +#define AND 334 +#define OR 335 +#define XOR 336 +#define SHL 337 +#define LSHR 338 +#define ASHR 339 +#define ICMP 340 +#define FCMP 341 +#define EQ 342 +#define NE 343 +#define SLT 344 +#define SGT 345 +#define SLE 346 +#define SGE 347 +#define ULT 348 +#define UGT 349 +#define ULE 350 +#define UGE 351 +#define OEQ 352 +#define ONE 353 +#define OLT 354 +#define OGT 355 +#define OLE 356 +#define OGE 357 +#define ORD 358 +#define UNO 359 +#define UEQ 360 +#define UNE 361 +#define MALLOC 362 +#define ALLOCA 363 +#define FREE 364 +#define LOAD 365 +#define STORE 366 +#define GETELEMENTPTR 367 +#define TRUNC 368 +#define ZEXT 369 +#define SEXT 370 +#define FPTRUNC 371 +#define FPEXT 372 +#define BITCAST 373 +#define UITOFP 374 +#define SITOFP 375 +#define FPTOUI 376 +#define FPTOSI 377 +#define INTTOPTR 378 +#define PTRTOINT 379 +#define PHI_TOK 380 +#define SELECT 381 +#define VAARG 382 +#define EXTRACTELEMENT 383 +#define INSERTELEMENT 384 +#define SHUFFLEVECTOR 385 +#define SIGNEXT 386 +#define ZEROEXT 387 +#define NORETURN 388 +#define INREG 389 +#define SRET 390 +#define NOUNWIND 391 +#define NOALIAS 392 +#define BYVAL 393 +#define NEST 394 +#define DEFAULT 395 +#define HIDDEN 396 +#define PROTECTED 397 + + + + +#if ! defined (YYSTYPE) && ! defined (YYSTYPE_IS_DECLARED) +#line 957 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +typedef union YYSTYPE { llvm::Module *ModuleVal; llvm::Function *FunctionVal; llvm::BasicBlock *BasicBlockVal; @@ -44,142 +364,14 @@ llvm::ICmpInst::Predicate IPredicate; llvm::FCmpInst::Predicate FPredicate; } YYSTYPE; -#define ESINT64VAL 257 -#define EUINT64VAL 258 -#define ESAPINTVAL 259 -#define EUAPINTVAL 260 -#define LOCALVAL_ID 261 -#define GLOBALVAL_ID 262 -#define FPVAL 263 -#define VOID 264 -#define INTTYPE 265 -#define FLOAT 266 -#define DOUBLE 267 -#define LABEL 268 -#define TYPE 269 -#define LOCALVAR 270 -#define GLOBALVAR 271 -#define LABELSTR 272 -#define STRINGCONSTANT 273 -#define ATSTRINGCONSTANT 274 -#define PCTSTRINGCONSTANT 275 -#define ZEROINITIALIZER 276 -#define TRUETOK 277 -#define FALSETOK 278 -#define BEGINTOK 279 -#define ENDTOK 280 -#define DECLARE 281 -#define DEFINE 282 -#define GLOBAL 283 -#define CONSTANT 284 -#define SECTION 285 -#define ALIAS 286 -#define VOLATILE 287 -#define THREAD_LOCAL 288 -#define TO 289 -#define DOTDOTDOT 290 -#define NULL_TOK 291 -#define UNDEF 292 -#define INTERNAL 293 -#define LINKONCE 294 -#define WEAK 295 -#define APPENDING 296 -#define DLLIMPORT 297 -#define DLLEXPORT 298 -#define EXTERN_WEAK 299 -#define OPAQUE 300 -#define EXTERNAL 301 -#define TARGET 302 -#define TRIPLE 303 -#define ALIGN 304 -#define DEPLIBS 305 -#define CALL 306 -#define TAIL 307 -#define ASM_TOK 308 -#define MODULE 309 -#define SIDEEFFECT 310 -#define CC_TOK 311 -#define CCC_TOK 312 -#define FASTCC_TOK 313 -#define COLDCC_TOK 314 -#define X86_STDCALLCC_TOK 315 -#define X86_FASTCALLCC_TOK 316 -#define DATALAYOUT 317 -#define RET 318 -#define BR 319 -#define SWITCH 320 -#define INVOKE 321 -#define UNWIND 322 -#define UNREACHABLE 323 -#define ADD 324 -#define SUB 325 -#define MUL 326 -#define UDIV 327 -#define SDIV 328 -#define FDIV 329 -#define UREM 330 -#define SREM 331 -#define FREM 332 -#define AND 333 -#define OR 334 -#define XOR 335 -#define SHL 336 -#define LSHR 337 -#define ASHR 338 -#define ICMP 339 -#define FCMP 340 -#define EQ 341 -#define NE 342 -#define SLT 343 -#define SGT 344 -#define SLE 345 -#define SGE 346 -#define ULT 347 -#define UGT 348 -#define ULE 349 -#define UGE 350 -#define OEQ 351 -#define ONE 352 -#define OLT 353 -#define OGT 354 -#define OLE 355 -#define OGE 356 -#define ORD 357 -#define UNO 358 -#define UEQ 359 -#define UNE 360 -#define MALLOC 361 -#define ALLOCA 362 -#define FREE 363 -#define LOAD 364 -#define STORE 365 -#define GETELEMENTPTR 366 -#define TRUNC 367 -#define ZEXT 368 -#define SEXT 369 -#define FPTRUNC 370 -#define FPEXT 371 -#define BITCAST 372 -#define UITOFP 373 -#define SITOFP 374 -#define FPTOUI 375 -#define FPTOSI 376 -#define INTTOPTR 377 -#define PTRTOINT 378 -#define PHI_TOK 379 -#define SELECT 380 -#define VAARG 381 -#define EXTRACTELEMENT 382 -#define INSERTELEMENT 383 -#define SHUFFLEVECTOR 384 -#define NORETURN 385 -#define INREG 386 -#define SRET 387 -#define NOUNWIND 388 -#define NOALIAS 389 -#define DEFAULT 390 -#define HIDDEN 391 -#define PROTECTED 392 - +/* Line 1447 of yacc.c. */ +#line 369 "llvmAsmParser.tab.h" +# define yystype YYSTYPE /* obsolescent; will be withdrawn */ +# define YYSTYPE_IS_DECLARED 1 +# define YYSTYPE_IS_TRIVIAL 1 +#endif extern YYSTYPE llvmAsmlval; + + + Modified: llvm/trunk/lib/AsmParser/llvmAsmParser.y.cvs URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/llvmAsmParser.y.cvs?rev=40611&r1=40610&r2=40611&view=diff ============================================================================== --- llvm/trunk/lib/AsmParser/llvmAsmParser.y.cvs (original) +++ llvm/trunk/lib/AsmParser/llvmAsmParser.y.cvs Mon Jul 30 22:50:36 2007 @@ -1101,7 +1101,7 @@ %token EXTRACTELEMENT INSERTELEMENT SHUFFLEVECTOR // Function Attributes -%token NORETURN INREG SRET NOUNWIND NOALIAS +%token SIGNEXT ZEROEXT NORETURN INREG SRET NOUNWIND NOALIAS BYVAL NEST // Visibility Styles %token DEFAULT HIDDEN PROTECTED @@ -1224,11 +1224,15 @@ CHECK_FOR_ERROR }; -ParamAttr : ZEXT { $$ = ParamAttr::ZExt; } +ParamAttr : ZEROEXT { $$ = ParamAttr::ZExt; } + | ZEXT { $$ = ParamAttr::ZExt; } + | SIGNEXT { $$ = ParamAttr::SExt; } | SEXT { $$ = ParamAttr::SExt; } | INREG { $$ = ParamAttr::InReg; } | SRET { $$ = ParamAttr::StructRet; } | NOALIAS { $$ = ParamAttr::NoAlias; } + | BYVAL { $$ = ParamAttr::ByVal; } + | NEST { $$ = ParamAttr::Nest; } ; OptParamAttrs : /* empty */ { $$ = ParamAttr::None; } @@ -1239,7 +1243,8 @@ FuncAttr : NORETURN { $$ = ParamAttr::NoReturn; } | NOUNWIND { $$ = ParamAttr::NoUnwind; } - | ParamAttr + | ZEROEXT { $$ = ParamAttr::ZExt; } + | SIGNEXT { $$ = ParamAttr::SExt; } ; OptFuncAttrs : /* empty */ { $$ = ParamAttr::None; } From rspencer at reidspencer.com Mon Jul 30 22:55:44 2007 From: rspencer at reidspencer.com (Reid Spencer) Date: Tue, 31 Jul 2007 03:55:44 -0000 Subject: [llvm-commits] [llvm] r40612 - /llvm/trunk/lib/AsmParser/Lexer.l Message-ID: <200707310355.l6V3ti0f031519@zion.cs.uiuc.edu> Author: reid Date: Mon Jul 30 22:55:43 2007 New Revision: 40612 URL: http://llvm.org/viewvc/llvm-project?rev=40612&view=rev Log: Don't include newlines in the whitespace before newline (WSNL) rule. Fix the comment for WSNL to describe its actual function. Modified: llvm/trunk/lib/AsmParser/Lexer.l Modified: llvm/trunk/lib/AsmParser/Lexer.l URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/Lexer.l?rev=40612&r1=40611&r2=40612&view=diff ============================================================================== --- llvm/trunk/lib/AsmParser/Lexer.l (original) +++ llvm/trunk/lib/AsmParser/Lexer.l Mon Jul 30 22:55:43 2007 @@ -177,8 +177,8 @@ */ HexIntConstant [us]0x[0-9A-Fa-f]+ -/* WSNL - shorthand for newline followed by whitespace */ -WSNL [ \r\t\n]*$ +/* WSNL - shorthand for whitespace followed by newline */ +WSNL [ \r\t]*$ %% {Comment} { /* Ignore comments for now */ } From rspencer at reidspencer.com Mon Jul 30 22:55:56 2007 From: rspencer at reidspencer.com (Reid Spencer) Date: Tue, 31 Jul 2007 03:55:56 -0000 Subject: [llvm-commits] [llvm] r40613 - in /llvm/trunk/lib/AsmParser: Lexer.cpp.cvs Lexer.l.cvs Message-ID: <200707310355.l6V3turN031535@zion.cs.uiuc.edu> Author: reid Date: Mon Jul 30 22:55:56 2007 New Revision: 40613 URL: http://llvm.org/viewvc/llvm-project?rev=40613&view=rev Log: Regenerate (again). Modified: llvm/trunk/lib/AsmParser/Lexer.cpp.cvs llvm/trunk/lib/AsmParser/Lexer.l.cvs Modified: llvm/trunk/lib/AsmParser/Lexer.cpp.cvs URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/Lexer.cpp.cvs?rev=40613&r1=40612&r2=40613&view=diff ============================================================================== --- llvm/trunk/lib/AsmParser/Lexer.cpp.cvs (original) +++ llvm/trunk/lib/AsmParser/Lexer.cpp.cvs Mon Jul 30 22:55:56 2007 @@ -459,71 +459,71 @@ static yyconst short int yy_base[595] = { 0, - 0, 0, 1276, 1277, 1277, 1277, 1271, 1260, 41, 36, + 0, 0, 1272, 1273, 1273, 1273, 1267, 1256, 41, 36, 45, 51, 57, 63, 0, 74, 66, 69, 68, 90, 92, 121, 78, 36, 148, 93, 117, 114, 167, 138, - 67, 194, 152, 226, 134, 95, 103, 101, 1269, 1277, - 1258, 1277, 1267, 0, 199, 216, 232, 131, 253, 269, - 274, 0, 1266, 0, 203, 119, 154, 150, 115, 163, - 149, 80, 1255, 191, 49, 164, 157, 108, 279, 81, - 184, 169, 1254, 223, 239, 188, 220, 224, 276, 182, + 67, 194, 152, 226, 134, 95, 103, 101, 1265, 1273, + 1254, 1273, 1263, 0, 199, 216, 232, 131, 253, 269, + 274, 0, 1262, 0, 203, 119, 154, 150, 115, 163, + 149, 80, 1251, 191, 49, 164, 157, 108, 279, 81, + 184, 169, 1250, 223, 239, 188, 220, 224, 276, 182, 237, 241, 245, 295, 258, 288, 118, 289, 296, 233, 297, 306, 301, 298, 303, 304, 305, 308, 319, 323, 316, 327, 324, 330, 331, 334, 335, 337, 339, 340, - 341, 356, 352, 344, 342, 186, 345, 360, 348, 1253, + 341, 356, 352, 344, 342, 186, 345, 360, 348, 1249, 369, 371, 372, 375, 377, 373, 378, 389, 385, 379, - 390, 403, 407, 392, 393, 1252, 1261, 1277, 0, 421, - 1250, 436, 454, 0, 1259, 1277, 0, 1248, 437, 381, - 1247, 412, 423, 1246, 410, 430, 455, 413, 1245, 456, - 439, 457, 426, 427, 428, 458, 459, 1244, 460, 464, + 390, 403, 407, 392, 393, 1248, 1257, 1273, 0, 421, + 1246, 436, 454, 0, 1255, 1273, 0, 1244, 437, 381, + 1243, 412, 423, 1242, 410, 430, 455, 413, 1241, 456, + 439, 457, 426, 427, 428, 458, 459, 1240, 460, 464, 467, 469, 471, 473, 474, 476, 475, 478, 477, 481, 480, 483, 486, 494, 501, 499, 506, 503, 505, 507, - 508, 1243, 510, 513, 514, 517, 515, 1242, 1241, 1240, + 508, 1239, 510, 513, 514, 517, 515, 1238, 1237, 1236, - 1239, 1238, 1237, 511, 1236, 1235, 516, 519, 1234, 548, - 522, 525, 526, 537, 1233, 1232, 1231, 528, 550, 553, - 562, 1230, 1229, 563, 542, 1228, 541, 566, 567, 568, - 569, 573, 574, 570, 1227, 1226, 1225, 575, 1224, 1223, - 576, 1222, 1221, 585, 588, 590, 592, 597, 593, 600, - 572, 1220, 601, 603, 1277, 612, 632, 636, 640, 645, - 623, 647, 530, 648, 1219, 649, 612, 605, 1218, 650, + 1235, 1234, 1233, 511, 1232, 1231, 516, 519, 1230, 548, + 522, 525, 526, 537, 1229, 1228, 1227, 528, 550, 553, + 562, 1226, 1225, 563, 542, 1224, 541, 566, 567, 568, + 569, 573, 574, 570, 1223, 1222, 1221, 575, 1220, 1219, + 576, 1218, 1217, 585, 588, 590, 592, 597, 593, 600, + 572, 1216, 601, 603, 1273, 612, 632, 636, 640, 645, + 623, 647, 530, 648, 1215, 649, 612, 605, 1214, 650, 651, 652, 613, 653, 655, 654, 656, 660, 657, 664, - 604, 672, 1217, 1216, 659, 661, 663, 662, 1215, 1214, - 674, 678, 681, 1213, 677, 692, 693, 694, 695, 696, + 604, 672, 1213, 1212, 659, 661, 663, 662, 1211, 1210, + 674, 678, 681, 1209, 677, 692, 693, 694, 695, 696, - 697, 1212, 1211, 698, 702, 1210, 705, 699, 700, 1209, - 701, 711, 703, 0, 1208, 706, 724, 740, 725, 731, - 733, 734, 1207, 1206, 737, 730, 1205, 739, 742, 735, - 1204, 744, 1203, 1202, 746, 750, 753, 754, 1201, 755, - 1200, 756, 1199, 758, 760, 775, 769, 1198, 1197, 773, - 762, 1196, 776, 1195, 778, 782, 783, 784, 785, 617, - 787, 790, 791, 793, 792, 1194, 794, 1193, 1192, 798, - 803, 796, 805, 797, 804, 1191, 808, 809, 816, 818, - 1190, 819, 821, 820, 825, 823, 824, 833, 826, 835, - 839, 840, 59, 719, 841, 842, 844, 845, 1189, 846, - - 847, 851, 852, 1188, 850, 1187, 855, 866, 856, 867, - 873, 854, 861, 869, 888, 894, 1186, 874, 880, 1185, - 884, 885, 886, 1184, 890, 891, 892, 1183, 893, 894, - 1182, 1181, 1180, 895, 900, 1179, 1178, 897, 906, 901, - 1177, 908, 1176, 1175, 905, 909, 915, 1174, 919, 920, - 921, 1173, 922, 923, 924, 1172, 1171, 1170, 704, 1169, - 1168, 927, 1167, 1166, 926, 929, 935, 930, 936, 937, - 1165, 941, 945, 1164, 1163, 946, 947, 949, 951, 953, - 1162, 956, 957, 958, 959, 960, 1161, 961, 962, 972, - 975, 1160, 977, 978, 1159, 980, 983, 984, 985, 987, - - 1158, 986, 990, 1157, 991, 993, 997, 998, 1156, 1004, - 1000, 1001, 1155, 1154, 1153, 1137, 1125, 1005, 1124, 1012, - 1007, 1006, 1019, 1122, 1023, 1024, 1013, 1121, 1028, 1120, - 1119, 1029, 1032, 1033, 1034, 1117, 1036, 1037, 1038, 1039, - 1041, 1040, 1043, 1116, 1045, 1048, 1050, 1053, 1054, 1115, - 1058, 1059, 1066, 1067, 1068, 1114, 1062, 1071, 1073, 1074, - 1076, 1113, 1080, 1077, 1075, 1079, 1081, 1086, 1087, 1112, - 1090, 1094, 1088, 1099, 1107, 1106, 1105, 1100, 992, 1101, - 346, 259, 1104, 256, 1277, 1140, 1142, 1145, 1149, 1152, - 1156, 235, 1161, 165 + 697, 1208, 1207, 698, 702, 1206, 705, 699, 700, 1205, + 701, 711, 703, 0, 1204, 706, 724, 740, 725, 731, + 733, 734, 1203, 1202, 737, 730, 1201, 739, 742, 735, + 1200, 744, 1199, 1198, 746, 750, 753, 754, 1197, 755, + 1196, 756, 1195, 758, 760, 775, 769, 1194, 1193, 773, + 762, 1192, 776, 1191, 778, 782, 783, 784, 785, 617, + 787, 790, 791, 793, 792, 1190, 794, 1189, 1188, 798, + 803, 796, 805, 797, 804, 1187, 808, 809, 816, 818, + 1186, 819, 821, 820, 825, 823, 824, 833, 826, 835, + 839, 840, 59, 1273, 841, 842, 844, 845, 1185, 846, + + 847, 851, 852, 1184, 850, 1183, 855, 866, 856, 867, + 873, 854, 861, 869, 719, 1273, 1182, 874, 876, 1181, + 877, 880, 882, 1180, 883, 884, 885, 1179, 891, 886, + 1178, 1177, 1176, 890, 894, 1175, 1174, 902, 893, 901, + 1173, 905, 1172, 1171, 907, 914, 908, 1170, 915, 916, + 917, 1169, 918, 920, 919, 1168, 1167, 1166, 704, 1165, + 1164, 924, 1163, 1162, 922, 921, 923, 927, 933, 940, + 1161, 929, 941, 1160, 1159, 942, 945, 946, 949, 952, + 1158, 956, 954, 955, 950, 959, 1157, 957, 968, 974, + 961, 1156, 963, 976, 1155, 978, 981, 980, 979, 983, + + 1154, 982, 988, 1153, 992, 995, 996, 997, 1152, 993, + 998, 1001, 1151, 1150, 1149, 1133, 1121, 999, 1120, 1002, + 1005, 1004, 1014, 1119, 1010, 1022, 1015, 1118, 1024, 1115, + 1114, 1025, 1026, 1027, 1030, 1113, 1032, 1033, 1034, 1037, + 1035, 1038, 1039, 1112, 1043, 1044, 1046, 1049, 1050, 1111, + 1056, 1055, 1052, 1060, 1063, 1110, 1067, 1064, 1069, 1070, + 1075, 1109, 1078, 1072, 1071, 1081, 1073, 1082, 1083, 1108, + 1084, 1090, 1086, 1093, 1103, 1102, 1101, 1096, 948, 1097, + 346, 259, 1100, 256, 1273, 1136, 1138, 1141, 1145, 1148, + 1152, 235, 1157, 165 } ; @@ -597,7 +597,7 @@ } ; -static yyconst short int yy_nxt[1322] = +static yyconst short int yy_nxt[1318] = { 0, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 14, 14, 4, 15, 16, 8, 8, 8, 17, @@ -678,7 +678,7 @@ 372, 371, 376, 373, 375, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, - 393, 394, 496, 380, 42, 381, 379, 377, 378, 382, + 415, 416, 496, 380, 42, 381, 379, 377, 378, 382, 383, 384, 385, 391, 389, 390, 386, 42, 42, 388, 387, 393, 394, 42, 42, 392, 42, 42, 42, 395, 42, 400, 42, 42, 396, 42, 397, 42, 398, 42, @@ -695,38 +695,38 @@ 442, 447, 42, 42, 42, 42, 448, 42, 42, 42, 42, 446, 450, 42, 42, 42, 454, 42, 42, 42, 453, 451, 457, 459, 42, 460, 462, 452, 456, 42, - 42, 464, 42, 461, 458, 455, 42, 42, 463, 415, - 416, 467, 466, 42, 465, 415, 416, 42, 42, 42, + 42, 464, 42, 461, 458, 455, 42, 42, 463, 42, + 42, 467, 466, 42, 465, 42, 42, 42, 42, 42, - 469, 470, 468, 42, 42, 42, 42, 42, 42, 474, - 42, 478, 479, 42, 42, 472, 481, 471, 42, 42, - 483, 42, 42, 476, 477, 484, 475, 473, 42, 486, - 482, 480, 42, 42, 42, 42, 42, 42, 485, 42, - 42, 487, 42, 42, 488, 493, 489, 494, 42, 42, - 42, 491, 492, 497, 42, 498, 490, 500, 42, 42, - 42, 495, 42, 502, 42, 499, 42, 501, 503, 42, - 42, 42, 42, 42, 42, 42, 510, 505, 504, 511, - 509, 506, 507, 515, 517, 42, 512, 513, 42, 508, - 42, 42, 516, 42, 514, 518, 42, 42, 42, 42, - - 42, 521, 523, 42, 42, 42, 42, 524, 526, 522, - 42, 42, 519, 42, 42, 528, 520, 42, 42, 42, - 42, 532, 525, 527, 535, 42, 42, 536, 538, 529, - 530, 534, 42, 533, 531, 537, 42, 42, 539, 540, - 543, 42, 42, 542, 541, 42, 42, 42, 545, 42, - 42, 42, 42, 42, 42, 546, 42, 549, 42, 551, - 553, 42, 555, 42, 548, 544, 42, 42, 552, 554, - 547, 42, 42, 556, 550, 42, 559, 561, 557, 42, - 42, 42, 562, 558, 42, 566, 42, 42, 42, 42, - 42, 560, 42, 42, 42, 563, 564, 565, 572, 42, - - 42, 42, 573, 42, 568, 570, 569, 42, 567, 571, - 574, 578, 42, 42, 42, 579, 575, 42, 42, 42, - 42, 582, 577, 576, 583, 42, 42, 42, 42, 42, - 42, 580, 42, 42, 42, 42, 581, 42, 42, 584, - 39, 39, 39, 39, 39, 41, 41, 44, 44, 52, - 42, 52, 52, 52, 54, 54, 137, 137, 137, 137, - 137, 145, 145, 145, 145, 145, 42, 42, 42, 42, + 469, 470, 468, 42, 42, 474, 42, 42, 472, 478, + 479, 481, 484, 471, 42, 42, 476, 477, 42, 475, + 42, 42, 473, 480, 482, 483, 486, 42, 42, 42, + 42, 42, 42, 42, 42, 42, 42, 42, 485, 489, + 42, 493, 42, 487, 494, 500, 42, 491, 492, 488, + 497, 498, 490, 42, 42, 42, 495, 499, 42, 42, + 502, 42, 42, 42, 501, 42, 504, 42, 42, 42, + 42, 503, 42, 505, 42, 510, 42, 506, 509, 511, + 507, 42, 515, 512, 513, 514, 508, 42, 516, 42, + 517, 42, 42, 42, 42, 42, 42, 518, 519, 521, + + 523, 42, 520, 524, 526, 42, 42, 522, 42, 42, + 42, 42, 42, 528, 42, 42, 525, 42, 42, 527, + 532, 536, 533, 42, 535, 537, 538, 42, 42, 534, + 529, 541, 530, 531, 540, 42, 539, 42, 42, 42, + 42, 542, 543, 42, 545, 42, 42, 42, 42, 546, + 42, 42, 42, 549, 553, 551, 42, 42, 555, 42, + 548, 544, 42, 42, 547, 42, 552, 554, 42, 42, + 550, 556, 559, 42, 557, 561, 42, 42, 562, 558, + 42, 563, 42, 42, 42, 42, 42, 560, 42, 564, + 566, 42, 565, 572, 42, 42, 42, 42, 573, 42, + + 568, 567, 569, 42, 570, 578, 42, 571, 575, 42, + 42, 579, 574, 42, 42, 42, 42, 582, 577, 576, + 583, 42, 42, 42, 42, 42, 42, 42, 42, 580, + 581, 42, 42, 42, 42, 584, 39, 39, 39, 39, + 39, 41, 41, 44, 44, 52, 42, 52, 52, 52, + 54, 54, 137, 137, 137, 137, 137, 145, 145, 145, + 145, 145, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, @@ -736,18 +736,17 @@ 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, - 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, - 42, 42, 146, 42, 138, 255, 42, 42, 42, 146, - 138, 42, 136, 42, 40, 585, 3, 585, 585, 585, + 42, 42, 42, 42, 42, 42, 42, 42, 146, 42, + 138, 255, 42, 42, 42, 146, 138, 42, 136, 42, + 40, 585, 3, 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, - 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, - 585 + 585, 585, 585, 585, 585, 585, 585 } ; -static yyconst short int yy_chk[1322] = +static yyconst short int yy_chk[1318] = { 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, @@ -828,7 +827,7 @@ 288, 287, 295, 291, 293, 296, 297, 298, 299, 300, 301, 304, 308, 309, 311, 305, 313, 459, 307, 316, - 394, 394, 459, 299, 312, 300, 298, 296, 297, 301, + 415, 415, 459, 299, 312, 300, 298, 296, 297, 301, 304, 305, 307, 316, 312, 313, 308, 317, 319, 311, 309, 318, 318, 326, 320, 317, 321, 322, 330, 319, 325, 326, 328, 318, 320, 329, 321, 332, 322, 335, @@ -845,56 +844,55 @@ 382, 387, 391, 392, 395, 396, 388, 397, 398, 400, 401, 386, 390, 405, 402, 403, 396, 412, 407, 409, 395, 391, 400, 402, 413, 403, 407, 392, 398, 408, - 410, 409, 414, 405, 401, 397, 411, 418, 408, 415, - 415, 412, 411, 419, 410, 416, 416, 421, 422, 423, + 410, 409, 414, 405, 401, 397, 411, 418, 408, 419, + 421, 412, 411, 422, 410, 423, 425, 426, 427, 430, - 414, 418, 413, 425, 426, 427, 429, 430, 434, 423, - 438, 429, 429, 435, 440, 421, 434, 419, 445, 439, - 438, 442, 446, 426, 427, 439, 425, 422, 447, 442, - 435, 430, 449, 450, 451, 453, 454, 455, 440, 465, - 462, 445, 466, 468, 446, 453, 447, 454, 467, 469, - 470, 450, 451, 462, 472, 465, 449, 467, 473, 476, - 477, 455, 478, 469, 479, 466, 480, 468, 470, 482, - 483, 484, 485, 486, 488, 489, 480, 473, 472, 482, - 479, 476, 477, 486, 489, 490, 483, 484, 491, 478, - 493, 494, 488, 496, 485, 490, 497, 498, 499, 502, - - 500, 494, 497, 503, 505, 579, 506, 498, 500, 496, - 507, 508, 491, 511, 512, 503, 493, 510, 518, 522, - 521, 508, 499, 502, 512, 520, 527, 518, 521, 505, - 506, 511, 523, 510, 507, 520, 525, 526, 522, 523, - 527, 529, 532, 526, 525, 533, 534, 535, 532, 537, - 538, 539, 540, 542, 541, 533, 543, 537, 545, 539, - 541, 546, 543, 547, 535, 529, 548, 549, 540, 542, - 534, 551, 552, 545, 538, 557, 548, 551, 546, 553, - 554, 555, 552, 547, 558, 557, 559, 560, 565, 561, - 564, 549, 566, 563, 567, 553, 554, 555, 564, 568, - - 569, 573, 565, 571, 559, 561, 560, 572, 558, 563, - 566, 571, 574, 578, 580, 572, 567, 583, 577, 576, - 575, 578, 569, 568, 580, 570, 562, 556, 550, 544, - 536, 573, 531, 530, 528, 524, 574, 519, 517, 583, - 586, 586, 586, 586, 586, 587, 587, 588, 588, 589, - 516, 589, 589, 589, 590, 590, 591, 591, 591, 591, - 591, 593, 593, 593, 593, 593, 515, 514, 513, 509, - 504, 501, 495, 492, 487, 481, 475, 474, 471, 464, - 463, 461, 460, 458, 457, 456, 452, 448, 444, 443, - 441, 437, 436, 433, 432, 431, 428, 424, 420, 417, - - 406, 404, 399, 381, 376, 369, 368, 366, 354, 352, - 349, 348, 343, 341, 339, 334, 333, 331, 327, 324, - 323, 315, 310, 306, 303, 302, 294, 290, 289, 284, - 283, 269, 265, 252, 243, 242, 240, 239, 237, 236, - 235, 226, 223, 222, 217, 216, 215, 209, 206, 205, - 203, 202, 201, 200, 199, 198, 192, 168, 159, 154, - 151, 148, 145, 141, 137, 136, 120, 73, 63, 53, - 43, 41, 39, 8, 7, 3, 585, 585, 585, 585, + 414, 418, 413, 434, 429, 423, 439, 435, 421, 429, + 429, 434, 439, 419, 440, 438, 426, 427, 442, 425, + 445, 447, 422, 430, 435, 438, 442, 446, 449, 450, + 451, 453, 455, 454, 466, 465, 467, 462, 440, 447, + 468, 453, 472, 445, 454, 467, 469, 450, 451, 446, + 462, 465, 449, 470, 473, 476, 455, 466, 477, 478, + 469, 579, 479, 485, 468, 480, 472, 483, 484, 482, + 488, 470, 486, 473, 491, 480, 493, 476, 479, 482, + 477, 489, 486, 483, 484, 485, 478, 490, 488, 494, + 489, 496, 499, 498, 497, 502, 500, 490, 491, 494, + + 497, 503, 493, 498, 500, 505, 510, 496, 506, 507, + 508, 511, 518, 503, 512, 520, 499, 522, 521, 502, + 508, 518, 510, 525, 512, 520, 521, 523, 527, 511, + 505, 525, 506, 507, 523, 526, 522, 529, 532, 533, + 534, 526, 527, 535, 532, 537, 538, 539, 541, 533, + 540, 542, 543, 537, 541, 539, 545, 546, 543, 547, + 535, 529, 548, 549, 534, 553, 540, 542, 552, 551, + 538, 545, 548, 554, 546, 551, 555, 558, 552, 547, + 557, 553, 559, 560, 565, 564, 567, 549, 561, 554, + 557, 563, 555, 564, 566, 568, 569, 571, 565, 573, + + 559, 558, 560, 572, 561, 571, 574, 563, 567, 578, + 580, 572, 566, 583, 577, 576, 575, 578, 569, 568, + 580, 570, 562, 556, 550, 544, 536, 531, 530, 573, + 574, 528, 524, 519, 517, 583, 586, 586, 586, 586, + 586, 587, 587, 588, 588, 589, 516, 589, 589, 589, + 590, 590, 591, 591, 591, 591, 591, 593, 593, 593, + 593, 593, 515, 514, 513, 509, 504, 501, 495, 492, + 487, 481, 475, 474, 471, 464, 463, 461, 460, 458, + 457, 456, 452, 448, 444, 443, 441, 437, 436, 433, + 432, 431, 428, 424, 420, 417, 406, 404, 399, 381, + + 376, 369, 368, 366, 354, 352, 349, 348, 343, 341, + 339, 334, 333, 331, 327, 324, 323, 315, 310, 306, + 303, 302, 294, 290, 289, 284, 283, 269, 265, 252, + 243, 242, 240, 239, 237, 236, 235, 226, 223, 222, + 217, 216, 215, 209, 206, 205, 203, 202, 201, 200, + 199, 198, 192, 168, 159, 154, 151, 148, 145, 141, + 137, 136, 120, 73, 63, 53, 43, 41, 39, 8, + 7, 3, 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, - 585, 585, 585, 585, 585, 585, 585, 585, 585, 585, - 585 + 585, 585, 585, 585, 585, 585, 585 } ; static yy_state_type yy_state_buf[YY_BUF_SIZE + 2], *yy_state_ptr; @@ -1048,8 +1046,8 @@ /* HexIntConstant - Hexadecimal constant generated by the CFE to avoid forcing * it to deal with 64 bit numbers. */ -/* WSNL - shorthand for newline followed by whitespace */ -#line 1053 "Lexer.cpp" +/* WSNL - shorthand for whitespace followed by newline */ +#line 1051 "Lexer.cpp" /* Macros after this point can all be overridden by user definitions in * section 1. @@ -1203,7 +1201,7 @@ #line 182 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" -#line 1207 "Lexer.cpp" +#line 1205 "Lexer.cpp" if ( yy_init ) { @@ -2137,7 +2135,7 @@ #line 451 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" YY_FATAL_ERROR( "flex scanner jammed" ); YY_BREAK -#line 2141 "Lexer.cpp" +#line 2139 "Lexer.cpp" case YY_END_OF_BUFFER: { Modified: llvm/trunk/lib/AsmParser/Lexer.l.cvs URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/Lexer.l.cvs?rev=40613&r1=40612&r2=40613&view=diff ============================================================================== --- llvm/trunk/lib/AsmParser/Lexer.l.cvs (original) +++ llvm/trunk/lib/AsmParser/Lexer.l.cvs Mon Jul 30 22:55:56 2007 @@ -177,8 +177,8 @@ */ HexIntConstant [us]0x[0-9A-Fa-f]+ -/* WSNL - shorthand for newline followed by whitespace */ -WSNL [ \r\t\n]*$ +/* WSNL - shorthand for whitespace followed by newline */ +WSNL [ \r\t]*$ %% {Comment} { /* Ignore comments for now */ } From sabre at nondot.org Tue Jul 31 01:00:52 2007 From: sabre at nondot.org (Chris Lattner) Date: Tue, 31 Jul 2007 06:00:52 -0000 Subject: [llvm-commits] [llvm] r40616 - /llvm/trunk/lib/System/DynamicLibrary.cpp Message-ID: <200707310600.l6V60q4M002201@zion.cs.uiuc.edu> Author: lattner Date: Tue Jul 31 01:00:51 2007 New Revision: 40616 URL: http://llvm.org/viewvc/llvm-project?rev=40616&view=rev Log: Fix PR1581, patch by Timo Savola Modified: llvm/trunk/lib/System/DynamicLibrary.cpp Modified: llvm/trunk/lib/System/DynamicLibrary.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/System/DynamicLibrary.cpp?rev=40616&r1=40615&r2=40616&view=diff ============================================================================== --- llvm/trunk/lib/System/DynamicLibrary.cpp (original) +++ llvm/trunk/lib/System/DynamicLibrary.cpp Tue Jul 31 01:00:51 2007 @@ -62,7 +62,7 @@ lt_dlhandle a_handle = lt_dlopen(0); - assert(a_handle == 0 || "Can't open program as dynamic library"); + assert(a_handle == 0 && "Can't open program as dynamic library"); handle = a_handle; OpenedHandles.push_back(a_handle); From evan.cheng at apple.com Tue Jul 31 01:21:44 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 31 Jul 2007 06:21:44 -0000 Subject: [llvm-commits] [llvm] r40617 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Message-ID: <200707310621.l6V6LiEe002789@zion.cs.uiuc.edu> Author: evancheng Date: Tue Jul 31 01:21:44 2007 New Revision: 40617 URL: http://llvm.org/viewvc/llvm-project?rev=40617&view=rev Log: This isn't safe when there are uses of load's chain result. Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=40617&r1=40616&r2=40617&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Tue Jul 31 01:21:44 2007 @@ -3010,17 +3010,10 @@ // Use two pinsrw instructions to insert a 32 bit value. Idx <<= 1; if (MVT::isFloatingPoint(N1.getValueType())) { - if (ISD::isNON_EXTLoad(N1.Val)) { - // Just load directly from f32mem to GR32. - LoadSDNode *LD = cast(N1); - N1 = DAG.getLoad(MVT::i32, LD->getChain(), LD->getBasePtr(), - LD->getSrcValue(), LD->getSrcValueOffset()); - } else { - N1 = DAG.getNode(ISD::SCALAR_TO_VECTOR, MVT::v4f32, N1); - N1 = DAG.getNode(ISD::BIT_CONVERT, MVT::v4i32, N1); - N1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, MVT::i32, N1, - DAG.getConstant(0, getPointerTy())); - } + N1 = DAG.getNode(ISD::SCALAR_TO_VECTOR, MVT::v4f32, N1); + N1 = DAG.getNode(ISD::BIT_CONVERT, MVT::v4i32, N1); + N1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, MVT::i32, N1, + DAG.getConstant(0, getPointerTy())); } N0 = DAG.getNode(ISD::BIT_CONVERT, MVT::v8i16, N0); N0 = DAG.getNode(X86ISD::PINSRW, MVT::v8i16, N0, N1, From rspencer at reidspencer.com Tue Jul 31 01:33:38 2007 From: rspencer at reidspencer.com (Reid Spencer) Date: Tue, 31 Jul 2007 06:33:38 -0000 Subject: [llvm-commits] [llvm] r40618 - /llvm/trunk/lib/VMCore/Verifier.cpp Message-ID: <200707310633.l6V6XcaR003205@zion.cs.uiuc.edu> Author: reid Date: Tue Jul 31 01:33:37 2007 New Revision: 40618 URL: http://llvm.org/viewvc/llvm-project?rev=40618&view=rev Log: The InReg parameter attribute is valid on function results. The llvm-gcc-4.0 front end converts regparm attribute on the gcc function into InReg attribute on the llvm function. This fixes test/CFrontend/2002-07-30-SubrefSetAssertion.c Modified: llvm/trunk/lib/VMCore/Verifier.cpp Modified: llvm/trunk/lib/VMCore/Verifier.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Verifier.cpp?rev=40618&r1=40617&r2=40618&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Verifier.cpp (original) +++ llvm/trunk/lib/VMCore/Verifier.cpp Tue Jul 31 01:33:37 2007 @@ -358,8 +358,7 @@ "Invalid struct-return function!", &F); const uint16_t ReturnIncompatible = - ParamAttr::ByVal | ParamAttr::InReg | - ParamAttr::Nest | ParamAttr::StructRet; + ParamAttr::ByVal | ParamAttr::Nest | ParamAttr::StructRet; const uint16_t ParameterIncompatible = ParamAttr::NoReturn | ParamAttr::NoUnwind; From rspencer at reidspencer.com Tue Jul 31 01:37:27 2007 From: rspencer at reidspencer.com (Reid Spencer) Date: Tue, 31 Jul 2007 06:37:27 -0000 Subject: [llvm-commits] [llvm] r40619 - /llvm/trunk/lib/AsmParser/llvmAsmParser.y Message-ID: <200707310637.l6V6bRXJ003382@zion.cs.uiuc.edu> Author: reid Date: Tue Jul 31 01:37:27 2007 New Revision: 40619 URL: http://llvm.org/viewvc/llvm-project?rev=40619&view=rev Log: Allow the INREG parameter attribute to be added to functions. This permits the function result to be passed in a register. This implements the GCC regparm function attribute for llvm by translation to the InReg parameter attribute and fixes test/CFrontend/2002-07-30-SubregSetAssertion.c Modified: llvm/trunk/lib/AsmParser/llvmAsmParser.y Modified: llvm/trunk/lib/AsmParser/llvmAsmParser.y URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/llvmAsmParser.y?rev=40619&r1=40618&r2=40619&view=diff ============================================================================== --- llvm/trunk/lib/AsmParser/llvmAsmParser.y (original) +++ llvm/trunk/lib/AsmParser/llvmAsmParser.y Tue Jul 31 01:37:27 2007 @@ -1245,6 +1245,7 @@ | NOUNWIND { $$ = ParamAttr::NoUnwind; } | ZEROEXT { $$ = ParamAttr::ZExt; } | SIGNEXT { $$ = ParamAttr::SExt; } + | INREG { $$ = ParamAttr::InReg; } ; OptFuncAttrs : /* empty */ { $$ = ParamAttr::None; } From rspencer at reidspencer.com Tue Jul 31 01:37:43 2007 From: rspencer at reidspencer.com (Reid Spencer) Date: Tue, 31 Jul 2007 06:37:43 -0000 Subject: [llvm-commits] [llvm] r40621 - in /llvm/trunk/lib/AsmParser: llvmAsmParser.cpp.cvs llvmAsmParser.y.cvs Message-ID: <200707310637.l6V6bhPm003417@zion.cs.uiuc.edu> Author: reid Date: Tue Jul 31 01:37:43 2007 New Revision: 40621 URL: http://llvm.org/viewvc/llvm-project?rev=40621&view=rev Log: Regenerate. Modified: llvm/trunk/lib/AsmParser/llvmAsmParser.cpp.cvs llvm/trunk/lib/AsmParser/llvmAsmParser.y.cvs Modified: llvm/trunk/lib/AsmParser/llvmAsmParser.cpp.cvs URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/llvmAsmParser.cpp.cvs?rev=40621&r1=40620&r2=40621&view=diff ============================================================================== --- llvm/trunk/lib/AsmParser/llvmAsmParser.cpp.cvs (original) +++ llvm/trunk/lib/AsmParser/llvmAsmParser.cpp.cvs Tue Jul 31 01:37:43 2007 @@ -1526,16 +1526,16 @@ /* YYFINAL -- State number of the termination state. */ #define YYFINAL 43 /* YYLAST -- Last index in YYTABLE. */ -#define YYLAST 1553 +#define YYLAST 1527 /* YYNTOKENS -- Number of terminals. */ #define YYNTOKENS 157 /* YYNNTS -- Number of nonterminals. */ #define YYNNTS 82 /* YYNRULES -- Number of rules. */ -#define YYNRULES 304 +#define YYNRULES 305 /* YYNRULES -- Number of states. */ -#define YYNSTATES 588 +#define YYNSTATES 589 /* YYTRANSLATE(YYLEX) -- Bison symbol number corresponding to YYLEX. */ #define YYUNDEFTOK 2 @@ -1605,26 +1605,26 @@ 157, 159, 161, 162, 164, 166, 167, 169, 171, 173, 175, 176, 178, 180, 181, 183, 185, 187, 189, 191, 194, 196, 198, 200, 202, 204, 206, 208, 210, 212, - 213, 216, 218, 220, 222, 224, 225, 228, 229, 232, - 233, 237, 240, 241, 243, 244, 248, 250, 253, 255, - 257, 259, 261, 263, 265, 268, 270, 273, 279, 285, - 291, 297, 301, 304, 310, 315, 318, 320, 322, 324, - 328, 330, 334, 336, 337, 339, 343, 348, 352, 356, - 361, 366, 370, 377, 383, 386, 389, 392, 395, 398, - 401, 404, 407, 410, 413, 416, 419, 426, 432, 441, - 448, 455, 463, 471, 478, 487, 496, 500, 502, 504, - 506, 508, 509, 512, 519, 521, 522, 524, 527, 528, - 532, 533, 537, 541, 545, 549, 550, 558, 559, 568, - 569, 578, 584, 587, 591, 593, 597, 601, 605, 609, - 611, 612, 618, 622, 624, 628, 630, 631, 641, 643, - 645, 650, 652, 654, 657, 661, 662, 664, 666, 668, - 670, 672, 674, 676, 678, 680, 684, 686, 692, 694, - 696, 698, 700, 702, 704, 707, 710, 713, 717, 720, - 721, 723, 726, 729, 733, 743, 753, 762, 777, 779, - 781, 788, 794, 797, 804, 812, 816, 822, 823, 824, - 828, 831, 833, 839, 845, 852, 859, 864, 871, 876, - 881, 888, 895, 898, 907, 909, 911, 912, 916, 923, - 927, 934, 937, 943, 951 + 213, 216, 218, 220, 222, 224, 226, 227, 230, 231, + 234, 235, 239, 242, 243, 245, 246, 250, 252, 255, + 257, 259, 261, 263, 265, 267, 270, 272, 275, 281, + 287, 293, 299, 303, 306, 312, 317, 320, 322, 324, + 326, 330, 332, 336, 338, 339, 341, 345, 350, 354, + 358, 363, 368, 372, 379, 385, 388, 391, 394, 397, + 400, 403, 406, 409, 412, 415, 418, 421, 428, 434, + 443, 450, 457, 465, 473, 480, 489, 498, 502, 504, + 506, 508, 510, 511, 514, 521, 523, 524, 526, 529, + 530, 534, 535, 539, 543, 547, 551, 552, 560, 561, + 570, 571, 580, 586, 589, 593, 595, 599, 603, 607, + 611, 613, 614, 620, 624, 626, 630, 632, 633, 643, + 645, 647, 652, 654, 656, 659, 663, 664, 666, 668, + 670, 672, 674, 676, 678, 680, 682, 686, 688, 694, + 696, 698, 700, 702, 704, 706, 709, 712, 715, 719, + 722, 723, 725, 728, 731, 735, 745, 755, 764, 779, + 781, 783, 790, 796, 799, 806, 814, 818, 824, 825, + 826, 830, 833, 835, 841, 847, 854, 861, 866, 873, + 878, 883, 890, 897, 900, 909, 911, 913, 914, 918, + 925, 929, 936, 939, 945, 953 }; /* YYRHS -- A `-1'-separated list of the rules' RHS. */ @@ -1652,80 +1652,80 @@ -1, 57, 4, -1, 132, -1, 114, -1, 131, -1, 115, -1, 134, -1, 135, -1, 137, -1, 138, -1, 139, -1, -1, 179, 178, -1, 133, -1, 136, -1, - 132, -1, 131, -1, -1, 181, 180, -1, -1, 50, - 4, -1, -1, 144, 50, 4, -1, 31, 19, -1, - -1, 184, -1, -1, 144, 187, 186, -1, 184, -1, - 50, 4, -1, 11, -1, 12, -1, 13, -1, 14, - -1, 46, -1, 188, -1, 189, 145, -1, 223, -1, - 146, 4, -1, 189, 147, 193, 148, 181, -1, 10, - 147, 193, 148, 181, -1, 149, 4, 150, 189, 151, - -1, 152, 4, 150, 189, 153, -1, 154, 194, 155, - -1, 154, 155, -1, 152, 154, 194, 155, 153, -1, - 152, 154, 155, 153, -1, 189, 179, -1, 189, -1, - 10, -1, 190, -1, 192, 144, 190, -1, 192, -1, - 192, 144, 36, -1, 36, -1, -1, 189, -1, 194, - 144, 189, -1, 189, 149, 197, 151, -1, 189, 149, - 151, -1, 189, 156, 19, -1, 189, 152, 197, 153, - -1, 189, 154, 197, 155, -1, 189, 154, 155, -1, - 189, 152, 154, 197, 155, 153, -1, 189, 152, 154, - 155, 153, -1, 189, 37, -1, 189, 38, -1, 189, - 223, -1, 189, 196, -1, 189, 22, -1, 163, 3, - -1, 163, 5, -1, 163, 4, -1, 163, 6, -1, - 11, 23, -1, 11, 24, -1, 164, 9, -1, 160, - 147, 195, 35, 189, 148, -1, 112, 147, 195, 234, - 148, -1, 126, 147, 195, 144, 195, 144, 195, 148, - -1, 158, 147, 195, 144, 195, 148, -1, 159, 147, - 195, 144, 195, 148, -1, 85, 161, 147, 195, 144, - 195, 148, -1, 86, 162, 147, 195, 144, 195, 148, - -1, 128, 147, 195, 144, 195, 148, -1, 129, 147, - 195, 144, 195, 144, 195, 148, -1, 130, 147, 195, - 144, 195, 144, 195, 148, -1, 197, 144, 195, -1, - 195, -1, 29, -1, 30, -1, 34, -1, -1, 191, - 223, -1, 118, 147, 200, 35, 189, 148, -1, 202, - -1, -1, 203, -1, 202, 203, -1, -1, 28, 204, - 219, -1, -1, 27, 205, 220, -1, 55, 54, 209, - -1, 167, 15, 189, -1, 167, 15, 10, -1, -1, - 169, 173, 199, 198, 195, 206, 186, -1, -1, 169, - 171, 173, 199, 198, 195, 207, 186, -1, -1, 169, - 172, 173, 199, 198, 189, 208, 186, -1, 169, 173, - 32, 176, 200, -1, 48, 210, -1, 51, 143, 211, - -1, 19, -1, 49, 143, 19, -1, 63, 143, 19, - -1, 149, 212, 151, -1, 212, 144, 19, -1, 19, - -1, -1, 213, 144, 189, 179, 166, -1, 189, 179, - 166, -1, 213, -1, 213, 144, 36, -1, 36, -1, - -1, 177, 191, 168, 147, 214, 148, 181, 185, 182, - -1, 25, -1, 154, -1, 175, 173, 215, 216, -1, - 26, -1, 155, -1, 226, 218, -1, 174, 173, 215, - -1, -1, 56, -1, 3, -1, 4, -1, 9, -1, - 23, -1, 24, -1, 37, -1, 38, -1, 22, -1, - 152, 197, 153, -1, 196, -1, 54, 221, 19, 144, - 19, -1, 7, -1, 8, -1, 165, -1, 168, -1, - 223, -1, 222, -1, 189, 224, -1, 226, 227, -1, - 217, 227, -1, 228, 167, 229, -1, 228, 231, -1, - -1, 18, -1, 64, 225, -1, 64, 10, -1, 65, - 14, 224, -1, 65, 11, 224, 144, 14, 224, 144, - 14, 224, -1, 66, 163, 224, 144, 14, 224, 149, - 230, 151, -1, 66, 163, 224, 144, 14, 224, 149, - 151, -1, 67, 177, 191, 224, 147, 233, 148, 181, - 35, 14, 224, 68, 14, 224, -1, 68, -1, 69, - -1, 230, 163, 222, 144, 14, 224, -1, 163, 222, - 144, 14, 224, -1, 167, 236, -1, 189, 149, 224, - 144, 224, 151, -1, 232, 144, 149, 224, 144, 224, - 151, -1, 189, 224, 179, -1, 233, 144, 189, 224, - 179, -1, -1, -1, 234, 144, 225, -1, 53, 52, - -1, 52, -1, 158, 189, 224, 144, 224, -1, 159, - 189, 224, 144, 224, -1, 85, 161, 189, 224, 144, - 224, -1, 86, 162, 189, 224, 144, 224, -1, 160, - 225, 35, 189, -1, 126, 225, 144, 225, 144, 225, - -1, 127, 225, 144, 189, -1, 128, 225, 144, 225, - -1, 129, 225, 144, 225, 144, 225, -1, 130, 225, - 144, 225, 144, 225, -1, 125, 232, -1, 235, 177, - 191, 224, 147, 233, 148, 181, -1, 238, -1, 33, - -1, -1, 107, 189, 183, -1, 107, 189, 144, 11, - 224, 183, -1, 108, 189, 183, -1, 108, 189, 144, - 11, 224, 183, -1, 109, 225, -1, 237, 110, 189, - 224, 183, -1, 237, 111, 225, 144, 189, 224, 183, - -1, 112, 189, 224, 234, -1 + 132, -1, 131, -1, 134, -1, -1, 181, 180, -1, + -1, 50, 4, -1, -1, 144, 50, 4, -1, 31, + 19, -1, -1, 184, -1, -1, 144, 187, 186, -1, + 184, -1, 50, 4, -1, 11, -1, 12, -1, 13, + -1, 14, -1, 46, -1, 188, -1, 189, 145, -1, + 223, -1, 146, 4, -1, 189, 147, 193, 148, 181, + -1, 10, 147, 193, 148, 181, -1, 149, 4, 150, + 189, 151, -1, 152, 4, 150, 189, 153, -1, 154, + 194, 155, -1, 154, 155, -1, 152, 154, 194, 155, + 153, -1, 152, 154, 155, 153, -1, 189, 179, -1, + 189, -1, 10, -1, 190, -1, 192, 144, 190, -1, + 192, -1, 192, 144, 36, -1, 36, -1, -1, 189, + -1, 194, 144, 189, -1, 189, 149, 197, 151, -1, + 189, 149, 151, -1, 189, 156, 19, -1, 189, 152, + 197, 153, -1, 189, 154, 197, 155, -1, 189, 154, + 155, -1, 189, 152, 154, 197, 155, 153, -1, 189, + 152, 154, 155, 153, -1, 189, 37, -1, 189, 38, + -1, 189, 223, -1, 189, 196, -1, 189, 22, -1, + 163, 3, -1, 163, 5, -1, 163, 4, -1, 163, + 6, -1, 11, 23, -1, 11, 24, -1, 164, 9, + -1, 160, 147, 195, 35, 189, 148, -1, 112, 147, + 195, 234, 148, -1, 126, 147, 195, 144, 195, 144, + 195, 148, -1, 158, 147, 195, 144, 195, 148, -1, + 159, 147, 195, 144, 195, 148, -1, 85, 161, 147, + 195, 144, 195, 148, -1, 86, 162, 147, 195, 144, + 195, 148, -1, 128, 147, 195, 144, 195, 148, -1, + 129, 147, 195, 144, 195, 144, 195, 148, -1, 130, + 147, 195, 144, 195, 144, 195, 148, -1, 197, 144, + 195, -1, 195, -1, 29, -1, 30, -1, 34, -1, + -1, 191, 223, -1, 118, 147, 200, 35, 189, 148, + -1, 202, -1, -1, 203, -1, 202, 203, -1, -1, + 28, 204, 219, -1, -1, 27, 205, 220, -1, 55, + 54, 209, -1, 167, 15, 189, -1, 167, 15, 10, + -1, -1, 169, 173, 199, 198, 195, 206, 186, -1, + -1, 169, 171, 173, 199, 198, 195, 207, 186, -1, + -1, 169, 172, 173, 199, 198, 189, 208, 186, -1, + 169, 173, 32, 176, 200, -1, 48, 210, -1, 51, + 143, 211, -1, 19, -1, 49, 143, 19, -1, 63, + 143, 19, -1, 149, 212, 151, -1, 212, 144, 19, + -1, 19, -1, -1, 213, 144, 189, 179, 166, -1, + 189, 179, 166, -1, 213, -1, 213, 144, 36, -1, + 36, -1, -1, 177, 191, 168, 147, 214, 148, 181, + 185, 182, -1, 25, -1, 154, -1, 175, 173, 215, + 216, -1, 26, -1, 155, -1, 226, 218, -1, 174, + 173, 215, -1, -1, 56, -1, 3, -1, 4, -1, + 9, -1, 23, -1, 24, -1, 37, -1, 38, -1, + 22, -1, 152, 197, 153, -1, 196, -1, 54, 221, + 19, 144, 19, -1, 7, -1, 8, -1, 165, -1, + 168, -1, 223, -1, 222, -1, 189, 224, -1, 226, + 227, -1, 217, 227, -1, 228, 167, 229, -1, 228, + 231, -1, -1, 18, -1, 64, 225, -1, 64, 10, + -1, 65, 14, 224, -1, 65, 11, 224, 144, 14, + 224, 144, 14, 224, -1, 66, 163, 224, 144, 14, + 224, 149, 230, 151, -1, 66, 163, 224, 144, 14, + 224, 149, 151, -1, 67, 177, 191, 224, 147, 233, + 148, 181, 35, 14, 224, 68, 14, 224, -1, 68, + -1, 69, -1, 230, 163, 222, 144, 14, 224, -1, + 163, 222, 144, 14, 224, -1, 167, 236, -1, 189, + 149, 224, 144, 224, 151, -1, 232, 144, 149, 224, + 144, 224, 151, -1, 189, 224, 179, -1, 233, 144, + 189, 224, 179, -1, -1, -1, 234, 144, 225, -1, + 53, 52, -1, 52, -1, 158, 189, 224, 144, 224, + -1, 159, 189, 224, 144, 224, -1, 85, 161, 189, + 224, 144, 224, -1, 86, 162, 189, 224, 144, 224, + -1, 160, 225, 35, 189, -1, 126, 225, 144, 225, + 144, 225, -1, 127, 225, 144, 189, -1, 128, 225, + 144, 225, -1, 129, 225, 144, 225, 144, 225, -1, + 130, 225, 144, 225, 144, 225, -1, 125, 232, -1, + 235, 177, 191, 224, 147, 233, 148, 181, -1, 238, + -1, 33, -1, -1, 107, 189, 183, -1, 107, 189, + 144, 11, 224, 183, -1, 108, 189, 183, -1, 108, + 189, 144, 11, 224, 183, -1, 109, 225, -1, 237, + 110, 189, 224, 183, -1, 237, 111, 225, 144, 189, + 224, 183, -1, 112, 189, 224, 234, -1 }; /* YYRLINE[YYN] -- source line where rule number YYN was defined. */ @@ -1742,26 +1742,26 @@ 1190, 1191, 1195, 1196, 1197, 1201, 1202, 1203, 1204, 1205, 1209, 1210, 1211, 1214, 1215, 1216, 1217, 1218, 1219, 1220, 1227, 1228, 1229, 1230, 1231, 1232, 1233, 1234, 1235, 1238, - 1239, 1244, 1245, 1246, 1247, 1250, 1251, 1258, 1259, 1265, - 1266, 1274, 1282, 1283, 1288, 1289, 1290, 1295, 1308, 1308, - 1308, 1308, 1311, 1315, 1319, 1326, 1331, 1339, 1369, 1400, - 1405, 1417, 1427, 1431, 1441, 1448, 1455, 1462, 1467, 1472, - 1479, 1480, 1487, 1494, 1502, 1508, 1520, 1548, 1564, 1591, - 1619, 1645, 1665, 1691, 1711, 1723, 1730, 1796, 1806, 1816, - 1822, 1832, 1838, 1848, 1853, 1858, 1866, 1878, 1900, 1908, - 1914, 1925, 1930, 1935, 1941, 1947, 1956, 1960, 1968, 1968, - 1971, 1971, 1974, 1985, 2006, 2011, 2019, 2020, 2024, 2024, - 2028, 2028, 2031, 2034, 2058, 2069, 2069, 2080, 2079, 2089, - 2088, 2099, 2118, 2121, 2127, 2137, 2141, 2146, 2148, 2153, - 2158, 2167, 2177, 2188, 2192, 2201, 2210, 2215, 2336, 2336, - 2338, 2347, 2347, 2349, 2354, 2366, 2370, 2375, 2379, 2383, - 2387, 2391, 2395, 2399, 2403, 2407, 2432, 2436, 2446, 2450, - 2454, 2459, 2466, 2466, 2472, 2481, 2485, 2494, 2503, 2512, - 2516, 2523, 2527, 2531, 2536, 2546, 2565, 2574, 2654, 2658, - 2665, 2676, 2689, 2699, 2710, 2720, 2729, 2738, 2741, 2742, - 2749, 2753, 2758, 2779, 2796, 2810, 2824, 2836, 2844, 2851, - 2857, 2863, 2869, 2884, 2969, 2974, 2978, 2985, 2992, 3000, - 3007, 3015, 3023, 3037, 3054 + 1239, 1244, 1245, 1246, 1247, 1248, 1251, 1252, 1259, 1260, + 1266, 1267, 1275, 1283, 1284, 1289, 1290, 1291, 1296, 1309, + 1309, 1309, 1309, 1312, 1316, 1320, 1327, 1332, 1340, 1370, + 1401, 1406, 1418, 1428, 1432, 1442, 1449, 1456, 1463, 1468, + 1473, 1480, 1481, 1488, 1495, 1503, 1509, 1521, 1549, 1565, + 1592, 1620, 1646, 1666, 1692, 1712, 1724, 1731, 1797, 1807, + 1817, 1823, 1833, 1839, 1849, 1854, 1859, 1867, 1879, 1901, + 1909, 1915, 1926, 1931, 1936, 1942, 1948, 1957, 1961, 1969, + 1969, 1972, 1972, 1975, 1986, 2007, 2012, 2020, 2021, 2025, + 2025, 2029, 2029, 2032, 2035, 2059, 2070, 2070, 2081, 2080, + 2090, 2089, 2100, 2119, 2122, 2128, 2138, 2142, 2147, 2149, + 2154, 2159, 2168, 2178, 2189, 2193, 2202, 2211, 2216, 2337, + 2337, 2339, 2348, 2348, 2350, 2355, 2367, 2371, 2376, 2380, + 2384, 2388, 2392, 2396, 2400, 2404, 2408, 2433, 2437, 2447, + 2451, 2455, 2460, 2467, 2467, 2473, 2482, 2486, 2495, 2504, + 2513, 2517, 2524, 2528, 2532, 2537, 2547, 2566, 2575, 2655, + 2659, 2666, 2677, 2690, 2700, 2711, 2721, 2730, 2739, 2742, + 2743, 2750, 2754, 2759, 2780, 2797, 2811, 2825, 2837, 2845, + 2852, 2858, 2864, 2870, 2885, 2970, 2975, 2979, 2986, 2993, + 3001, 3008, 3016, 3024, 3038, 3055 }; #endif @@ -1853,26 +1853,26 @@ 173, 173, 174, 174, 174, 175, 175, 175, 175, 175, 176, 176, 176, 177, 177, 177, 177, 177, 177, 177, 178, 178, 178, 178, 178, 178, 178, 178, 178, 179, - 179, 180, 180, 180, 180, 181, 181, 182, 182, 183, - 183, 184, 185, 185, 186, 186, 187, 187, 188, 188, - 188, 188, 189, 189, 189, 189, 189, 189, 189, 189, - 189, 189, 189, 189, 189, 190, 191, 191, 192, 192, - 193, 193, 193, 193, 194, 194, 195, 195, 195, 195, + 179, 180, 180, 180, 180, 180, 181, 181, 182, 182, + 183, 183, 184, 185, 185, 186, 186, 187, 187, 188, + 188, 188, 188, 189, 189, 189, 189, 189, 189, 189, + 189, 189, 189, 189, 189, 189, 190, 191, 191, 192, + 192, 193, 193, 193, 193, 194, 194, 195, 195, 195, 195, 195, 195, 195, 195, 195, 195, 195, 195, 195, - 195, 195, 195, 195, 195, 195, 196, 196, 196, 196, - 196, 196, 196, 196, 196, 196, 197, 197, 198, 198, - 199, 199, 200, 200, 201, 201, 202, 202, 204, 203, - 205, 203, 203, 203, 203, 206, 203, 207, 203, 208, - 203, 203, 203, 203, 209, 210, 210, 211, 212, 212, - 212, 213, 213, 214, 214, 214, 214, 215, 216, 216, - 217, 218, 218, 219, 220, 221, 221, 222, 222, 222, - 222, 222, 222, 222, 222, 222, 222, 222, 223, 223, - 223, 223, 224, 224, 225, 226, 226, 227, 228, 228, - 228, 229, 229, 229, 229, 229, 229, 229, 229, 229, - 230, 230, 231, 232, 232, 233, 233, 233, 234, 234, - 235, 235, 236, 236, 236, 236, 236, 236, 236, 236, - 236, 236, 236, 236, 236, 237, 237, 238, 238, 238, - 238, 238, 238, 238, 238 + 195, 195, 195, 195, 195, 195, 195, 196, 196, 196, + 196, 196, 196, 196, 196, 196, 196, 197, 197, 198, + 198, 199, 199, 200, 200, 201, 201, 202, 202, 204, + 203, 205, 203, 203, 203, 203, 206, 203, 207, 203, + 208, 203, 203, 203, 203, 209, 210, 210, 211, 212, + 212, 212, 213, 213, 214, 214, 214, 214, 215, 216, + 216, 217, 218, 218, 219, 220, 221, 221, 222, 222, + 222, 222, 222, 222, 222, 222, 222, 222, 222, 223, + 223, 223, 223, 224, 224, 225, 226, 226, 227, 228, + 228, 228, 229, 229, 229, 229, 229, 229, 229, 229, + 229, 230, 230, 231, 232, 232, 233, 233, 233, 234, + 234, 235, 235, 236, 236, 236, 236, 236, 236, 236, + 236, 236, 236, 236, 236, 236, 237, 237, 238, 238, + 238, 238, 238, 238, 238, 238 }; /* YYR2[YYN] -- Number of symbols composing right hand side of rule YYN. */ @@ -1889,26 +1889,26 @@ 1, 1, 0, 1, 1, 0, 1, 1, 1, 1, 0, 1, 1, 0, 1, 1, 1, 1, 1, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, - 2, 1, 1, 1, 1, 0, 2, 0, 2, 0, - 3, 2, 0, 1, 0, 3, 1, 2, 1, 1, - 1, 1, 1, 1, 2, 1, 2, 5, 5, 5, - 5, 3, 2, 5, 4, 2, 1, 1, 1, 3, - 1, 3, 1, 0, 1, 3, 4, 3, 3, 4, - 4, 3, 6, 5, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 6, 5, 8, 6, - 6, 7, 7, 6, 8, 8, 3, 1, 1, 1, - 1, 0, 2, 6, 1, 0, 1, 2, 0, 3, - 0, 3, 3, 3, 3, 0, 7, 0, 8, 0, - 8, 5, 2, 3, 1, 3, 3, 3, 3, 1, - 0, 5, 3, 1, 3, 1, 0, 9, 1, 1, - 4, 1, 1, 2, 3, 0, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 3, 1, 5, 1, 1, - 1, 1, 1, 1, 2, 2, 2, 3, 2, 0, - 1, 2, 2, 3, 9, 9, 8, 14, 1, 1, - 6, 5, 2, 6, 7, 3, 5, 0, 0, 3, - 2, 1, 5, 5, 6, 6, 4, 6, 4, 4, - 6, 6, 2, 8, 1, 1, 0, 3, 6, 3, - 6, 2, 5, 7, 4 + 2, 1, 1, 1, 1, 1, 0, 2, 0, 2, + 0, 3, 2, 0, 1, 0, 3, 1, 2, 1, + 1, 1, 1, 1, 1, 2, 1, 2, 5, 5, + 5, 5, 3, 2, 5, 4, 2, 1, 1, 1, + 3, 1, 3, 1, 0, 1, 3, 4, 3, 3, + 4, 4, 3, 6, 5, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 6, 5, 8, + 6, 6, 7, 7, 6, 8, 8, 3, 1, 1, + 1, 1, 0, 2, 6, 1, 0, 1, 2, 0, + 3, 0, 3, 3, 3, 3, 0, 7, 0, 8, + 0, 8, 5, 2, 3, 1, 3, 3, 3, 3, + 1, 0, 5, 3, 1, 3, 1, 0, 9, 1, + 1, 4, 1, 1, 2, 3, 0, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 3, 1, 5, 1, + 1, 1, 1, 1, 1, 2, 2, 2, 3, 2, + 0, 1, 2, 2, 3, 9, 9, 8, 14, 1, + 1, 6, 5, 2, 6, 7, 3, 5, 0, 0, + 3, 2, 1, 5, 5, 6, 6, 4, 6, 4, + 4, 6, 6, 2, 8, 1, 1, 0, 3, 6, + 3, 6, 2, 5, 7, 4 }; /* YYDEFACT[STATE-NAME] -- Default rule to reduce with in state @@ -1916,484 +1916,478 @@ means the default is an error. */ static const unsigned short int yydefact[] = { - 68, 58, 65, 59, 66, 60, 200, 198, 0, 0, - 0, 0, 0, 0, 78, 67, 0, 68, 196, 82, - 85, 0, 0, 212, 0, 0, 63, 0, 69, 70, + 68, 58, 65, 59, 66, 60, 201, 199, 0, 0, + 0, 0, 0, 0, 78, 67, 0, 68, 197, 82, + 85, 0, 0, 213, 0, 0, 63, 0, 69, 70, 72, 71, 73, 75, 74, 76, 77, 79, 80, 81, - 78, 78, 191, 1, 197, 83, 84, 78, 201, 86, - 87, 88, 89, 78, 259, 199, 259, 0, 0, 220, - 213, 214, 202, 248, 249, 204, 128, 129, 130, 131, - 132, 0, 0, 0, 0, 250, 251, 133, 203, 135, - 191, 191, 90, 190, 0, 93, 93, 260, 256, 64, - 231, 232, 233, 255, 215, 216, 219, 0, 153, 136, - 0, 0, 0, 0, 142, 154, 0, 134, 153, 0, - 0, 92, 91, 0, 188, 189, 0, 0, 94, 95, - 96, 97, 98, 0, 234, 0, 296, 258, 0, 217, - 152, 109, 148, 150, 0, 0, 0, 0, 0, 0, - 141, 0, 0, 0, 147, 0, 146, 0, 211, 128, - 129, 130, 0, 0, 0, 205, 99, 0, 228, 229, - 230, 295, 281, 0, 0, 0, 0, 93, 268, 269, + 78, 78, 192, 1, 198, 83, 84, 78, 202, 86, + 87, 88, 89, 78, 260, 200, 260, 0, 0, 221, + 214, 215, 203, 249, 250, 205, 129, 130, 131, 132, + 133, 0, 0, 0, 0, 251, 252, 134, 204, 136, + 192, 192, 90, 191, 0, 93, 93, 261, 257, 64, + 232, 233, 234, 256, 216, 217, 220, 0, 154, 137, + 0, 0, 0, 0, 143, 155, 0, 135, 154, 0, + 0, 92, 91, 0, 189, 190, 0, 0, 94, 95, + 96, 97, 98, 0, 235, 0, 297, 259, 0, 218, + 153, 109, 149, 151, 0, 0, 0, 0, 0, 0, + 142, 0, 0, 0, 148, 0, 147, 0, 212, 129, + 130, 131, 0, 0, 0, 206, 99, 0, 229, 230, + 231, 296, 282, 0, 0, 0, 0, 93, 269, 270, 2, 3, 4, 5, 6, 7, 8, 9, 10, 14, 15, 16, 11, 12, 13, 0, 0, 0, 0, 0, 0, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 257, 93, 272, 0, 294, 218, 145, 0, - 115, 0, 0, 144, 0, 155, 115, 207, 209, 0, - 192, 173, 174, 169, 171, 170, 172, 175, 168, 164, - 165, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 167, 166, 124, 0, 280, - 262, 0, 261, 0, 0, 55, 0, 0, 29, 30, + 0, 0, 258, 93, 273, 0, 295, 219, 146, 0, + 116, 0, 0, 145, 0, 156, 116, 208, 210, 0, + 193, 174, 175, 170, 172, 171, 173, 176, 169, 165, + 166, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 168, 167, 125, 0, 281, + 263, 0, 262, 0, 0, 55, 0, 0, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 0, 53, 54, 49, 50, 51, 52, 39, 40, 41, 42, 43, - 44, 45, 46, 47, 48, 0, 119, 119, 301, 0, - 0, 292, 0, 0, 0, 0, 0, 0, 0, 0, + 44, 45, 46, 47, 48, 0, 120, 120, 302, 0, + 0, 293, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 101, 103, 102, 100, 104, 105, 106, - 107, 108, 110, 151, 149, 138, 139, 140, 143, 137, - 124, 124, 0, 0, 0, 0, 0, 0, 0, 0, - 157, 187, 0, 0, 0, 161, 0, 158, 0, 0, - 0, 0, 206, 226, 237, 238, 239, 244, 240, 241, - 242, 243, 235, 0, 246, 253, 252, 254, 0, 263, - 0, 0, 0, 0, 0, 297, 0, 299, 278, 0, + 107, 108, 110, 152, 150, 139, 140, 141, 144, 138, + 125, 125, 0, 0, 0, 0, 0, 0, 0, 0, + 158, 188, 0, 0, 0, 162, 0, 159, 0, 0, + 0, 0, 207, 227, 238, 239, 240, 245, 241, 242, + 243, 244, 236, 0, 247, 254, 253, 255, 0, 264, + 0, 0, 0, 0, 0, 298, 0, 300, 279, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 114, 113, 111, 112, 116, 208, 210, 0, - 0, 0, 278, 0, 0, 0, 0, 0, 156, 142, - 154, 0, 159, 160, 0, 0, 0, 0, 0, 126, - 124, 225, 109, 223, 0, 236, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 304, 0, 0, 0, - 288, 289, 0, 0, 0, 0, 286, 0, 119, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 186, 163, - 0, 0, 0, 0, 121, 127, 125, 62, 0, 115, - 0, 245, 0, 0, 277, 0, 0, 119, 120, 119, - 0, 0, 0, 0, 0, 0, 282, 283, 277, 0, - 302, 0, 193, 0, 0, 177, 0, 0, 0, 0, - 162, 0, 0, 0, 61, 222, 224, 109, 122, 0, - 0, 0, 0, 0, 284, 285, 298, 300, 279, 0, - 0, 287, 290, 291, 0, 119, 0, 0, 0, 183, - 0, 0, 179, 180, 176, 62, 123, 117, 247, 0, - 0, 109, 0, 115, 273, 0, 115, 303, 181, 182, - 0, 0, 0, 221, 0, 227, 0, 266, 0, 0, - 275, 0, 0, 274, 293, 178, 184, 185, 118, 264, - 0, 265, 0, 109, 0, 0, 0, 276, 0, 0, - 0, 0, 271, 0, 0, 270, 0, 267 + 0, 0, 114, 113, 111, 115, 112, 117, 209, 211, + 0, 0, 0, 279, 0, 0, 0, 0, 0, 157, + 143, 155, 0, 160, 161, 0, 0, 0, 0, 0, + 127, 125, 226, 109, 224, 0, 237, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 305, 0, 0, + 0, 289, 290, 0, 0, 0, 0, 287, 0, 120, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 187, + 164, 0, 0, 0, 0, 122, 128, 126, 62, 0, + 116, 0, 246, 0, 0, 278, 0, 0, 120, 121, + 120, 0, 0, 0, 0, 0, 0, 283, 284, 278, + 0, 303, 0, 194, 0, 0, 178, 0, 0, 0, + 0, 163, 0, 0, 0, 61, 223, 225, 109, 123, + 0, 0, 0, 0, 0, 285, 286, 299, 301, 280, + 0, 0, 288, 291, 292, 0, 120, 0, 0, 0, + 184, 0, 0, 180, 181, 177, 62, 124, 118, 248, + 0, 0, 109, 0, 116, 274, 0, 116, 304, 182, + 183, 0, 0, 0, 222, 0, 228, 0, 267, 0, + 0, 276, 0, 0, 275, 294, 179, 185, 186, 119, + 265, 0, 266, 0, 109, 0, 0, 0, 277, 0, + 0, 0, 0, 272, 0, 0, 271, 0, 268 }; /* YYDEFGOTO[NTERM-NUM]. */ static const short int yydefgoto[] = { - -1, 252, 253, 254, 278, 295, 152, 153, 75, 505, + -1, 252, 253, 254, 278, 295, 152, 153, 75, 506, 12, 76, 14, 15, 40, 41, 42, 47, 53, 113, - 123, 322, 218, 396, 325, 555, 375, 419, 537, 352, - 420, 77, 154, 132, 147, 133, 134, 106, 341, 364, + 123, 322, 218, 397, 325, 556, 375, 420, 538, 352, + 421, 77, 154, 132, 147, 133, 134, 106, 341, 364, 342, 116, 84, 148, 16, 17, 18, 20, 19, 257, - 330, 331, 62, 23, 60, 97, 423, 424, 124, 160, - 54, 92, 55, 48, 426, 365, 79, 367, 262, 56, - 88, 89, 212, 559, 127, 301, 513, 436, 213, 214, + 330, 331, 62, 23, 60, 97, 424, 425, 124, 160, + 54, 92, 55, 48, 427, 365, 79, 367, 262, 56, + 88, 89, 212, 560, 127, 301, 514, 437, 213, 214, 215, 216 }; /* YYPACT[STATE-NUM] -- Index in YYTABLE of the portion describing STATE-NUM. */ -#define YYPACT_NINF -522 +#define YYPACT_NINF -513 static const short int yypact[] = { - 40, -522, -522, -522, -522, -522, -522, -522, -24, -105, - -4, -80, 60, -32, 461, -522, 134, 1386, -522, 153, - 150, 1, 15, -522, 16, 130, -522, 1208, -522, -522, - -522, -522, -522, -522, -522, -522, -522, -522, -522, -522, - 126, 126, 239, -522, -522, -522, -522, 126, -522, -522, - -522, -522, -522, 126, 158, -522, -7, 168, 183, 194, - -522, -522, -522, -522, -522, 45, -522, -522, -522, -522, - -522, 212, 226, 6, 198, -522, -522, -522, 127, -522, - 204, 204, 248, -522, 218, 113, 113, -522, -522, 135, - -522, -522, -522, -522, -522, -522, -522, -44, 1006, -522, - 101, 107, 371, 45, -522, 127, -103, -522, 1006, 218, - 218, -522, -522, 1043, -522, -522, 1223, 259, -522, -522, - -522, -522, -522, 1274, -522, -13, 1423, -522, 269, -522, - -522, 127, -522, 162, 146, 1305, 1305, 144, -101, 1305, - -522, 159, 1223, 1305, 45, 161, 127, 85, -522, 41, - 301, 302, 250, 304, 782, -522, -522, 79, -522, -522, - -522, -522, -522, 263, 1320, 193, 305, 113, -522, -522, - -522, -522, -522, -522, -522, -522, -522, -522, -522, -522, - -522, -522, -522, -522, -522, 133, 456, 1305, 1305, 1305, - 1305, -522, -522, -522, -522, -522, -522, -522, -522, -522, - -522, -522, -522, 1305, 1305, 1305, 1305, 1305, 1305, 1305, - 1305, 1305, -522, 113, -522, 165, -522, -522, 519, 1060, - -522, -18, -33, -522, 166, 127, -522, -522, 127, 1043, - -522, -522, -522, -522, -522, -522, -522, -522, -522, -522, - -522, 133, 456, 171, 174, 175, 177, 178, 1111, 1371, - 579, 307, 181, 182, 184, -522, -522, 186, 187, -522, - 45, 623, -522, 757, 757, -522, 757, 1274, -522, -522, - -522, -522, -522, -522, -522, -522, -522, -522, 1305, -522, - -522, -522, -522, -522, -522, -522, -522, -522, -522, -522, - -522, -522, -522, -522, -522, 1305, 98, 114, -522, 623, - -64, 195, 196, 201, 202, 210, 216, 623, 623, 303, - 1274, 1305, 1305, -522, -522, -522, -522, -522, -522, -522, - -522, -522, -522, -522, -522, 104, -522, -522, -522, 104, - 186, 186, 313, 190, 214, 1223, 1223, 1223, 1223, 1223, - -522, -522, -36, 962, -111, -522, -78, -522, 1223, 1223, - 1223, 3, -522, 1126, -522, -522, -522, -522, -522, -522, - -522, -522, 308, 1223, -522, -522, -522, -522, 219, -522, - 221, 757, 623, 623, 20, -522, 21, -522, -522, 757, - 225, 1305, 1305, 1305, 1305, 1305, 224, 227, 1305, 757, - 623, 231, -522, -522, -522, -522, -522, -522, -522, 1305, - 1223, 1223, -522, 233, 242, 245, 249, 1223, -522, 217, - 782, -65, -522, -522, 256, 257, 359, 386, 402, -522, - 186, -522, 127, 265, 264, -522, 394, -75, 400, 401, - 271, 275, 276, 757, 418, 757, 282, 285, 757, 289, - 127, -522, 290, 296, 757, 757, 127, 294, 300, 1305, - -29, 306, 309, -50, 1223, 1223, 1223, 1223, -522, -522, - 292, 1223, 1223, 1305, -522, -522, -522, 293, 1157, -522, - 311, -522, 757, 757, 1305, 757, 757, 300, -522, 300, - 1305, 757, 312, 1305, 1305, 1305, -522, -522, 1305, 397, - -522, 623, -522, 1223, 1223, -522, 316, 315, 317, 320, - -522, 318, 321, 117, -522, -522, -522, 127, -1, 430, - 324, 322, 623, -8, -522, -522, -522, -522, -522, 314, - 757, -522, -522, -522, -5, 300, 329, 330, 1223, -522, - 1223, 1223, -522, -522, -522, 293, -522, 431, -522, 437, - 2, -522, 1305, -522, -522, 332, -522, -522, -522, -522, - 336, 337, 338, -522, 448, -522, 757, -522, 917, 4, - 519, 623, 14, -522, 104, -522, -522, -522, -522, -522, - 343, -522, 917, -522, 474, 475, 346, 519, 757, 757, - 477, 426, -522, 757, 481, -522, 757, -522 + 414, -513, -513, -513, -513, -513, -513, -513, -7, -92, + 5, -42, 130, 11, 223, -513, 148, 484, -513, 131, + 102, 47, 62, -513, 60, 141, -513, 1169, -513, -513, + -513, -513, -513, -513, -513, -513, -513, -513, -513, -513, + 147, 147, 226, -513, -513, -513, -513, 147, -513, -513, + -513, -513, -513, 147, 199, -513, -8, 201, 211, 217, + -513, -513, -513, -513, -513, 93, -513, -513, -513, -513, + -513, 241, 247, 4, 811, -513, -513, -513, 162, -513, + 242, 242, 275, -513, 49, 167, 167, -513, -513, 279, + -513, -513, -513, -513, -513, -513, -513, -49, 928, -513, + 133, 143, 851, 93, -513, 162, -125, -513, 928, 49, + 49, -513, -513, 965, -513, -513, 1188, 293, -513, -513, + -513, -513, -513, 1225, -513, -10, 1384, -513, 283, -513, + -513, 162, -513, 166, 174, 1262, 1262, 172, -89, 1262, + -513, 178, 1188, 1262, 93, 168, 162, 33, -513, 40, + 319, 320, 125, 321, 631, -513, -513, 76, -513, -513, + -513, -513, -513, 280, 1336, 108, 324, 167, -513, -513, + -513, -513, -513, -513, -513, -513, -513, -513, -513, -513, + -513, -513, -513, -513, -513, 704, 474, 1262, 1262, 1262, + 1262, -513, -513, -513, -513, -513, -513, -513, -513, -513, + -513, -513, -513, 1262, 1262, 1262, 1262, 1262, 1262, 1262, + 1262, 1262, -513, 167, -513, 26, -513, -513, 252, 1002, + -513, -33, -72, -513, 185, 162, -513, -513, 162, 965, + -513, -513, -513, -513, -513, -513, -513, -513, -513, -513, + -513, 704, 474, 184, 192, 200, 202, 204, 1077, 1373, + 891, 327, 206, 207, 213, -513, -513, 224, 214, -513, + 93, 472, -513, 606, 606, -513, 606, 1225, -513, -513, + -513, -513, -513, -513, -513, -513, -513, -513, 1262, -513, + -513, -513, -513, -513, -513, -513, -513, -513, -513, -513, + -513, -513, -513, -513, -513, 1262, 57, 128, -513, 472, + 99, 225, 227, 228, 231, 232, 234, 472, 472, 335, + 1225, 1262, 1262, -513, -513, -513, -513, -513, -513, -513, + -513, -513, -513, -513, -513, 123, -513, -513, -513, 123, + 224, 224, 344, 233, 235, 1188, 1188, 1188, 1188, 1188, + -513, -513, -45, 909, -79, -513, -67, -513, 1188, 1188, + 1188, -11, -513, 1114, -513, -513, -513, -513, -513, -513, + -513, -513, 329, 1188, -513, -513, -513, -513, 244, -513, + 248, 606, 472, 472, 12, -513, 17, -513, -513, 606, + 245, 1262, 1262, 1262, 1262, 1262, 249, 251, 1262, 606, + 472, 257, -513, -513, -513, -513, -513, -513, -513, -513, + 1262, 1188, 1188, -513, 258, 259, 262, 263, 1188, -513, + 255, 631, -61, -513, -513, 265, 266, 376, 393, 409, + -513, 224, -513, 162, 271, 268, -513, 399, -73, 405, + 406, 274, 281, 282, 606, 419, 606, 284, 288, 606, + 301, 162, -513, 302, 304, 606, 606, 162, 303, 307, + 1262, 8, 308, 309, -40, 1188, 1188, 1188, 1188, -513, + -513, 311, 1188, 1188, 1262, -513, -513, -513, 84, 1151, + -513, 310, -513, 606, 606, 1262, 606, 606, 307, -513, + 307, 1262, 606, 312, 1262, 1262, 1262, -513, -513, 1262, + 377, -513, 472, -513, 1188, 1188, -513, 313, 318, 317, + 323, -513, 322, 330, 156, -513, -513, -513, 162, 39, + 453, 333, 334, 472, -37, -513, -513, -513, -513, -513, + 331, 606, -513, -513, -513, -28, 307, 337, 338, 1188, + -513, 1188, 1188, -513, -513, -513, 84, -513, 437, -513, + 476, 1, -513, 1262, -513, -513, 351, -513, -513, -513, + -513, 358, 359, 360, -513, 509, -513, 606, -513, 766, + 18, 252, 472, 55, -513, 123, -513, -513, -513, -513, + -513, 370, -513, 766, -513, 501, 502, 374, 252, 606, + 606, 505, 452, -513, 606, 507, -513, 606, -513 }; /* YYPGOTO[NTERM-NUM]. */ static const short int yypgoto[] = { - -522, 370, 372, 373, 266, 255, -164, -522, 0, -25, - 420, 9, -522, -522, -522, -522, 33, -522, -522, -522, - -151, -522, -404, -522, -223, -522, -291, 5, -522, -295, - -522, -522, -26, 295, -115, -522, 403, 410, -58, -150, - -221, 173, 222, 286, -522, -522, 501, -522, -522, -522, - -522, -522, -522, -522, -522, -522, -522, -522, 433, -522, - -522, -522, -522, -522, -522, -521, -140, 103, -184, -522, - 465, -522, -522, -522, -522, -522, 34, 122, -522, -522, - -522, -522 + -513, 396, 397, 398, 286, 287, -164, -513, 0, -6, + 436, 9, -513, -513, -513, -513, 45, -513, -513, -513, + -156, -513, -417, -513, -223, -513, -284, 19, -513, -294, + -513, -513, -26, 314, -118, -513, 423, 432, -58, -150, + -228, 104, 239, 332, -513, -513, 520, -513, -513, -513, + -513, -513, -513, -513, -513, -513, -513, -513, 454, -513, + -513, -513, -513, -513, -513, -512, -140, -239, -173, -513, + 482, -513, -513, -513, -513, -513, 52, 157, -513, -513, + -513, -513 }; /* YYTABLE[YYPACT[STATE-NUM]]. What to do in state STATE-NUM. If positive, shift that token. If negative, reduce the rule which number is the opposite. If zero, do what YYDEFACT says. If YYTABLE_NINF, syntax error. */ -#define YYTABLE_NINF -196 +#define YYTABLE_NINF -197 static const short int yytable[] = { - 11, 78, 266, 329, 255, 298, 377, 230, 157, 13, - 101, 87, 158, 265, 256, 265, 267, 11, 467, 90, - 302, 303, 304, 305, 306, 21, 13, 309, 344, 346, - 417, 433, 435, 407, 417, 397, 398, 570, 24, 22, - -195, 139, 412, 139, -55, -55, -55, -55, 105, 574, - 25, 576, 140, 418, 224, -64, 1, 2, 155, 3, - 4, 5, 310, 26, 231, 232, 407, 6, 7, 407, - 434, 434, 131, 80, 81, 27, 105, 413, 471, 407, - 85, 107, 131, 108, 227, 379, 86, 146, 8, 11, - 460, 9, 63, 64, 480, 10, 2, 146, 495, 4, - 128, 1, 2, 535, 3, 4, 5, 129, 407, 221, - 222, 28, 107, 225, 108, 408, 107, 228, 108, 492, - 327, 366, 411, 366, 366, 466, 366, 107, 391, 108, - 392, 393, 394, 326, 43, 395, 542, 560, 261, 542, - 543, 159, 427, 546, 57, 392, 393, 394, 91, 61, - 395, 1, 371, 557, 3, 571, 5, 490, 58, 366, - 102, 296, 297, 261, 299, 59, 258, 366, 366, 577, - 117, 118, 119, 120, 121, 122, 87, 300, 261, 261, - 261, 261, 261, 307, 308, 261, 516, 94, 517, 49, - 50, 51, 98, 131, 52, 389, 45, 439, 46, 441, - 442, 443, 95, 146, 263, 63, 64, 264, 103, 66, - 67, 68, 69, 96, 1, 2, 99, 3, 4, 5, - 268, 269, 270, 271, 272, 273, 274, 275, 276, 277, - 100, 366, 366, 366, 547, 392, 393, 394, 83, 366, - 395, 146, 374, 107, 70, 108, 508, 114, 115, 366, - 366, 135, 372, 233, 234, 235, 236, 136, 376, 107, - 255, 108, 107, 156, 108, 534, 37, 38, 39, 373, - 256, 82, 107, 83, 108, 311, 312, 402, 403, 404, - 405, 406, 142, 143, 146, 390, 261, 111, 217, 112, - 414, 415, 416, 366, 220, 366, 518, 223, 366, 521, - 522, 523, 109, 110, 366, 366, 219, 226, 229, 1, - -56, -57, 3, 237, 5, 259, 265, 410, 335, 328, - 562, 336, 337, 564, 338, 339, 347, 422, 348, 349, - 351, 350, 366, 366, 353, 366, 366, 400, 388, 380, - 381, 366, 451, 452, 71, 382, 383, 72, 399, 458, - 73, 366, 74, 104, 384, 261, 440, 261, 261, 261, - 385, 401, 446, 428, 425, 429, 368, 369, 444, 370, - 459, 445, 366, 450, 438, 449, 558, 454, 63, 64, - 366, 103, 66, 67, 68, 69, 455, 1, 2, 456, - 3, 4, 5, 457, 463, 572, 496, 497, 498, 499, - 461, 462, 378, 501, 502, 464, 465, 313, 314, 468, - 386, 387, 469, 470, 472, 473, 366, 70, 474, 475, - 476, 366, 478, 491, 315, 316, 480, 317, 318, 481, - 319, 320, 321, 483, 484, 526, 527, 503, 366, 366, - 485, 488, 507, 366, 489, 500, 366, 434, 512, 538, - 493, 556, 568, 494, 261, 509, 520, 261, 261, 261, - 528, 530, 512, 529, 531, 544, 532, 504, 539, 533, - 550, 540, 551, 552, 430, 431, 432, 548, 549, 279, - 280, 554, 437, 563, 565, 566, 567, 575, 578, 579, - 580, 583, 447, 448, 584, 586, 209, 334, 210, 211, - 29, 30, 31, 32, 33, 34, 35, 333, 36, 126, - 553, 141, 138, 536, 324, 332, 561, 71, 44, 125, - 72, 93, 524, 73, 453, 74, 137, 0, 0, 0, - 0, 0, 0, 0, 0, 504, 477, 0, 479, 0, - 0, 482, 0, 0, 0, 0, 0, 486, 487, 281, - 282, 283, 284, 285, 286, 287, 288, 289, 290, 291, - 292, 293, 294, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 510, 511, 0, 514, 515, - 0, 0, 0, 0, 519, 0, 63, 64, 0, 103, - 149, 150, 151, 69, 525, 1, 2, 0, 3, 4, - 5, 37, 38, 39, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 541, 0, 0, 0, 0, - 0, 0, 0, 545, 0, 70, 354, 355, 0, 0, - 63, 64, 356, 313, 314, 0, 0, 0, 0, 1, - 2, 0, 3, 4, 5, 357, 358, 359, 0, 0, - 315, 316, 0, 317, 318, 0, 319, 320, 321, 569, - 360, 361, 0, 0, 573, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 362, 0, 0, - 0, 581, 582, 0, 0, 0, 585, 0, 0, 587, - 0, 0, 0, 170, 171, 172, 173, 174, 175, 176, - 177, 178, 179, 180, 181, 182, 183, 184, 241, 242, + 11, 78, 266, 329, 255, 157, 468, 230, 101, 13, + 87, 267, 265, 377, 256, 158, 298, 11, 90, 139, + 418, 344, 346, 434, 368, 369, 13, 370, 436, 265, + 140, 302, 303, 304, 305, 306, 398, 399, 309, 419, + 63, 64, 21, -55, -55, -55, -55, 571, 105, 1, + 2, 24, 3, 4, 5, 139, 22, 310, 155, 25, + 378, 577, 435, 231, 232, 408, 224, 435, 386, 387, + 418, 408, 131, 107, 413, 108, 105, 408, 114, 115, + 472, 327, 131, 408, 227, 80, 81, 146, 414, 11, + 575, 536, 85, 2, 461, 128, 4, 146, 86, 408, + 1, 26, 129, 3, 481, 5, 409, 543, 496, 221, + 222, 544, 107, 225, 108, 412, 543, 228, 326, 263, + 547, 366, 264, 366, 366, 561, 366, 467, 233, 234, + 235, 236, 431, 432, 433, 428, 311, 312, 261, 391, + 438, 49, 50, 51, 159, 27, 52, 91, 43, 371, + 448, 449, 558, 107, 28, 108, 493, 578, 102, 366, + 61, 296, 297, 261, 299, 491, 258, 366, 366, 572, + 392, 393, 394, 395, 45, 396, 46, 300, 261, 261, + 261, 261, 261, 307, 308, 261, 392, 393, 394, 395, + 57, 396, 389, 131, 517, 478, 518, 480, 313, 314, + 483, 374, 107, 146, 108, 58, 487, 488, 440, 59, + 442, 443, 444, 142, 143, 315, 316, 87, 317, 318, + 94, 319, 320, 321, 117, 118, 119, 120, 121, 122, + 95, 366, 366, 366, 511, 512, 96, 515, 516, 366, + 98, 146, 548, 520, 107, 99, 108, 509, 379, 366, + 366, 100, 372, 526, 392, 393, 394, 395, 82, 396, + 83, 255, 29, 30, 31, 32, 33, 34, 35, 373, + 36, 256, 376, 107, 542, 108, 83, 403, 404, 405, + 406, 407, 546, 135, 146, 390, 261, 37, 38, 39, + 415, 416, 417, 136, 366, 1, 366, 156, 3, 366, + 5, 107, 217, 108, 535, 366, 366, 107, 519, 108, + 219, 522, 523, 524, 111, 229, 112, 411, 570, 109, + 110, 563, 220, 574, 565, 223, 226, 423, -56, -57, + 237, 335, 259, 366, 366, 265, 366, 366, 328, 336, + 582, 583, 366, 452, 453, 586, 347, 337, 588, 338, + 459, 339, 366, 348, 349, 261, 441, 261, 261, 261, + 350, 353, 447, 37, 38, 39, 313, 314, 351, 380, + 388, 381, 382, 366, 451, 383, 384, 559, 385, 400, + 401, 366, 402, 315, 316, 426, 317, 318, 429, 319, + 320, 321, 430, 445, 439, 446, 573, 497, 498, 499, + 500, 450, 455, 456, 502, 503, 457, 458, 460, 462, + 463, 464, 465, 466, -196, 469, 470, 366, 471, 473, + 474, 475, 366, 479, 492, 476, 477, 435, 481, -64, + 1, 2, 482, 3, 4, 5, 527, 528, 504, 366, + 366, 6, 7, 508, 366, 484, 485, 366, 486, 513, + 489, 490, 494, 495, 510, 261, 521, 529, 261, 261, + 261, 531, 8, 513, 501, 9, 530, 532, 505, 10, + 533, 551, 539, 552, 553, 354, 355, 540, 534, 63, + 64, 356, 545, 541, -195, 549, 550, 555, 1, 2, + 557, 3, 4, 5, 357, 358, 359, 279, 280, -64, + 1, 2, 564, 3, 4, 5, 566, 567, 568, 360, + 361, 6, 7, 569, 576, 579, 580, 562, 581, 584, + 585, 587, 209, 210, 211, 126, 362, 333, 537, 334, + 554, 141, 8, 324, 138, 9, 505, 44, 93, 10, + 125, 525, 170, 171, 172, 173, 174, 175, 176, 177, + 178, 179, 180, 181, 182, 183, 184, 241, 242, 0, + 454, 332, 0, 0, 0, 0, 0, 281, 282, 283, + 284, 285, 286, 287, 288, 289, 290, 291, 292, 293, + 294, 0, 0, 0, 243, 191, 192, 193, 194, 195, + 196, 197, 198, 199, 200, 201, 202, 0, 244, 0, + 245, 246, 247, 0, 0, 0, 0, 0, 0, 354, + 355, 0, 0, 63, 64, 356, 0, 107, 0, 108, + 0, 0, 1, 2, 363, 3, 4, 5, 357, 358, + 359, 0, 0, 0, 0, 0, 0, 0, 63, 64, + 0, 0, 0, 360, 361, 0, 0, 1, 2, 0, + 3, 4, 5, 238, 0, 0, 0, 0, 0, 0, + 362, 0, 0, 0, 0, 0, 0, 0, 239, 240, + 0, 0, 0, 0, 0, 0, 170, 171, 172, 173, + 174, 175, 176, 177, 178, 179, 180, 181, 182, 183, + 184, 241, 242, 0, 0, 0, 0, 0, 0, 0, + 0, 170, 171, 172, 173, 174, 175, 176, 177, 178, + 179, 180, 181, 182, 183, 184, 241, 242, 243, 191, + 192, 193, 194, 195, 196, 197, 198, 199, 200, 201, + 202, 0, 244, 0, 245, 246, 247, 0, 0, 0, + 0, 0, 0, 243, 191, 192, 193, 194, 195, 196, + 197, 198, 199, 200, 201, 202, 0, 244, 363, 245, + 246, 247, 0, 0, 0, 0, 0, 0, 0, 354, + 355, 0, 0, 0, 0, 356, 107, 0, 108, 0, + 248, 0, 0, 249, 0, 250, 0, 251, 357, 358, + 359, 268, 269, 270, 271, 272, 273, 274, 275, 276, + 277, 0, 0, 360, 361, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 63, 64, + 362, 103, 66, 67, 68, 69, 0, 1, 2, 0, + 3, 4, 5, 0, 0, 0, 170, 171, 172, 173, + 174, 175, 176, 177, 178, 179, 180, 181, 182, 183, + 184, 241, 242, 0, 0, 0, 0, 70, 63, 64, + 0, 103, 66, 67, 68, 69, 0, 1, 2, 0, + 3, 4, 5, 0, 0, 0, 0, 0, 243, 191, + 192, 193, 194, 195, 196, 197, 198, 199, 200, 201, + 202, 0, 244, 0, 245, 246, 247, 70, 63, 64, + 0, 103, 149, 150, 151, 69, 0, 1, 2, 0, + 3, 4, 5, 0, 0, 0, 63, 64, 363, 103, + 149, 150, 151, 69, 0, 1, 2, 0, 3, 4, + 5, 0, 0, 0, 0, 63, 64, 70, 103, 66, + 67, 68, 69, 0, 1, 2, 0, 3, 4, 5, + 0, 0, 0, 0, 0, 70, 0, 71, 0, 0, + 72, 0, 0, 73, 130, 74, 104, 0, 0, 0, + 0, 0, 63, 64, 70, 144, 66, 67, 68, 69, + 0, 1, 2, 0, 3, 4, 5, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 71, 0, 0, + 72, 0, 0, 73, 0, 74, 137, 0, 0, 63, + 64, 70, 103, 66, 67, 68, 69, 0, 1, 2, + 0, 3, 4, 5, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 71, 323, 0, + 72, 0, 0, 73, 0, 74, 345, 0, 70, 0, + 0, 0, 0, 0, 0, 71, 0, 0, 72, 0, + 0, 73, 0, 74, 410, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 71, 0, 0, 72, 0, 0, + 73, 0, 74, 145, 63, 64, 0, 103, 149, 150, + 151, 69, 0, 1, 2, 0, 3, 4, 5, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 71, 0, 0, 72, 0, 0, 73, 0, 74, + 0, 63, 64, 70, 103, 66, 67, 68, 69, 0, + 1, 2, 0, 3, 4, 5, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 71, 0, + 422, 72, 0, 0, 73, 0, 74, 0, 63, 64, + 70, 103, 66, 67, 68, 69, 0, 1, 2, 0, + 3, 4, 5, 0, 0, 0, 63, 64, 0, 65, + 66, 67, 68, 69, 0, 1, 2, 507, 3, 4, + 5, 0, 0, 0, 0, 63, 64, 70, 103, 149, + 150, 151, 69, 0, 1, 2, 0, 3, 4, 5, + 0, 0, 0, 0, 0, 70, 0, 0, 0, 0, + 0, 0, 0, 71, 0, 0, 72, 0, 340, 73, + 0, 74, 63, 64, 70, 144, 66, 67, 68, 69, + 0, 1, 2, 0, 3, 4, 5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 71, 0, 0, 72, 0, 0, 73, 0, 74, 63, + 64, 70, 103, 66, 67, 68, 69, 0, 1, 2, + 0, 3, 4, 5, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 71, 0, 0, + 72, 0, 0, 73, 0, 74, 0, 0, 70, 0, 0, 0, 0, 0, 0, 71, 0, 0, 72, 0, - 0, 73, 0, 74, 345, 243, 191, 192, 193, 194, - 195, 196, 197, 198, 199, 200, 201, 202, 0, 244, - 0, 245, 246, 247, 0, 0, 0, 0, 0, 0, - 354, 355, 0, 0, 63, 64, 356, 0, 107, 0, - 108, 0, 0, 1, 2, 363, 3, 4, 5, 357, - 358, 359, 0, 0, 0, 0, 0, 0, 0, 63, - 64, 0, 0, 0, 360, 361, 0, 0, 1, 2, - 0, 3, 4, 5, 238, 0, 0, 0, 0, 0, - 0, 362, 0, 0, 0, 0, 0, 0, 0, 239, - 240, 0, 0, 0, 0, 0, 0, 170, 171, 172, - 173, 174, 175, 176, 177, 178, 179, 180, 181, 182, - 183, 184, 241, 242, 0, 0, 0, 0, 0, 0, - 0, 0, 170, 171, 172, 173, 174, 175, 176, 177, - 178, 179, 180, 181, 182, 183, 184, 241, 242, 243, - 191, 192, 193, 194, 195, 196, 197, 198, 199, 200, - 201, 202, 0, 244, 0, 245, 246, 247, 0, 0, - 0, 0, 0, 0, 243, 191, 192, 193, 194, 195, - 196, 197, 198, 199, 200, 201, 202, 0, 244, 363, - 245, 246, 247, 0, 0, 0, 0, 0, 0, 0, - 354, 355, 0, 0, 0, 0, 356, 107, 0, 108, - 0, 248, 0, 0, 249, 0, 250, 0, 251, 357, - 358, 359, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 360, 361, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 63, - 64, 362, 103, 149, 150, 151, 69, 0, 1, 2, - 0, 3, 4, 5, 0, 0, 0, 170, 171, 172, - 173, 174, 175, 176, 177, 178, 179, 180, 181, 182, - 183, 184, 241, 242, 0, 0, 0, 0, 70, 0, - 0, 0, 0, 63, 64, 0, 103, 66, 67, 68, - 69, 0, 1, 2, 0, 3, 4, 5, 0, 243, - 191, 192, 193, 194, 195, 196, 197, 198, 199, 200, - 201, 202, 130, 244, 0, 245, 246, 247, 0, 0, - 63, 64, 70, 144, 66, 67, 68, 69, 0, 1, - 2, 0, 3, 4, 5, 0, 0, 63, 64, 363, - 103, 66, 67, 68, 69, 0, 1, 2, 0, 3, - 4, 5, 0, 0, 0, 0, 0, 0, 0, 70, - 0, 0, 0, 0, 0, 0, 323, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 70, 0, 71, 0, - 0, 72, 0, 0, 73, 0, 74, 409, 63, 64, - 0, 103, 149, 150, 151, 69, 0, 1, 2, 0, - 3, 4, 5, 63, 64, 0, 103, 66, 67, 68, + 0, 73, 0, 74, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 71, 0, 0, 72, 0, 0, + 73, 0, 74, 63, 64, 0, 260, 66, 67, 68, 69, 0, 1, 2, 0, 3, 4, 5, 0, 0, - 0, 0, 71, 0, 0, 72, 0, 70, 73, 0, - 74, 145, 421, 0, 63, 64, 0, 103, 66, 67, - 68, 69, 70, 1, 2, 0, 3, 4, 5, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 71, - 0, 0, 72, 506, 0, 73, 0, 74, 0, 0, - 0, 0, 0, 70, 0, 0, 71, 0, 0, 72, - 0, 0, 73, 0, 74, 63, 64, 0, 65, 66, - 67, 68, 69, 0, 1, 2, 0, 3, 4, 5, - 63, 64, 0, 103, 149, 150, 151, 69, 0, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 71, 0, 0, 72, 0, 0, 73, 0, 74, + 63, 64, 70, 103, 149, 150, 151, 69, 0, 1, 2, 0, 3, 4, 5, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 70, 0, 0, 71, 0, 0, - 72, 0, 340, 73, 0, 74, 0, 0, 0, 70, + 0, 0, 0, 0, 0, 0, 0, 0, 71, 0, + 0, 72, 0, 0, 73, 0, 74, 161, 0, 70, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 162, 163, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 164, 165, + 166, 167, 168, 169, 170, 171, 172, 173, 174, 175, + 176, 177, 178, 179, 180, 181, 182, 183, 184, 185, + 186, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 71, 0, 0, 72, 0, 0, 73, 0, - 74, 63, 64, 0, 144, 66, 67, 68, 69, 0, - 1, 2, 0, 3, 4, 5, 0, 0, 0, 0, - 0, 0, 0, 71, 0, 0, 72, 0, 0, 73, - 0, 74, 63, 64, 0, 103, 66, 67, 68, 69, - 70, 1, 2, 0, 3, 4, 5, 63, 64, 0, - 260, 66, 67, 68, 69, 0, 1, 2, 0, 3, - 4, 5, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 70, 0, 0, 71, 0, 0, 72, 0, 0, - 73, 0, 74, 0, 0, 0, 70, 0, 0, 71, - 0, 0, 72, 0, 0, 73, 0, 74, 63, 64, - 0, 103, 149, 150, 151, 69, -194, 1, 2, 0, - 3, 4, 5, 0, 0, 0, 0, 0, 0, 0, - 0, -64, 1, 2, 0, 3, 4, 5, 0, 0, - 0, 0, 0, 6, 7, 0, 0, 70, 0, 0, - 71, 0, 0, 72, 0, 0, 73, 0, 74, 0, - 0, 0, 0, 0, 8, 0, 0, 9, 0, 0, - 0, 10, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 71, 0, 0, 72, 0, 161, 73, 0, 74, - 0, 0, 0, 0, 0, 0, 71, 0, 0, 72, - 0, 0, 73, 0, 74, 162, 163, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 164, 165, 166, - 167, 168, 169, 170, 171, 172, 173, 174, 175, 176, - 177, 178, 179, 180, 181, 182, 183, 184, 185, 186, - 0, 0, 0, 0, 0, 0, 0, 71, 0, 0, - 72, 0, 0, 73, 0, 343, 0, 0, 0, 0, - 187, 188, 189, 0, 0, 190, 191, 192, 193, 194, - 195, 196, 197, 198, 199, 200, 201, 202, 203, 204, - 205, 206, 207, 208 + 74, 187, 188, 189, 0, 0, 190, 191, 192, 193, + 194, 195, 196, 197, 198, 199, 200, 201, 202, 203, + 204, 205, 206, 207, 208, 0, 0, 0, 0, 71, + 0, 0, 72, 0, 0, 73, 0, 343 }; static const short int yycheck[] = { - 0, 27, 166, 226, 154, 189, 297, 147, 123, 0, - 4, 18, 25, 11, 154, 11, 167, 17, 422, 26, - 204, 205, 206, 207, 208, 49, 17, 211, 249, 250, - 31, 11, 11, 144, 31, 330, 331, 558, 143, 63, - 0, 144, 153, 144, 3, 4, 5, 6, 74, 35, - 54, 572, 155, 50, 155, 15, 16, 17, 116, 19, - 20, 21, 213, 143, 23, 24, 144, 27, 28, 144, - 50, 50, 98, 40, 41, 15, 102, 155, 153, 144, - 47, 145, 108, 147, 142, 149, 53, 113, 48, 89, - 155, 51, 7, 8, 144, 55, 17, 123, 148, 20, - 144, 16, 17, 507, 19, 20, 21, 151, 144, 135, - 136, 143, 145, 139, 147, 151, 145, 143, 147, 148, - 153, 261, 343, 263, 264, 420, 266, 145, 312, 147, - 131, 132, 133, 151, 0, 136, 144, 541, 164, 144, - 148, 154, 363, 148, 143, 131, 132, 133, 155, 19, - 136, 16, 267, 151, 19, 151, 21, 448, 143, 299, - 154, 187, 188, 189, 190, 149, 157, 307, 308, 573, - 57, 58, 59, 60, 61, 62, 18, 203, 204, 205, - 206, 207, 208, 209, 210, 211, 477, 19, 479, 39, - 40, 41, 147, 219, 44, 310, 43, 381, 45, 383, - 384, 385, 19, 229, 11, 7, 8, 14, 10, 11, - 12, 13, 14, 19, 16, 17, 4, 19, 20, 21, - 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, - 4, 371, 372, 373, 525, 131, 132, 133, 34, 379, - 136, 267, 144, 145, 46, 147, 469, 29, 30, 389, - 390, 150, 278, 3, 4, 5, 6, 150, 144, 145, - 410, 147, 145, 4, 147, 148, 140, 141, 142, 295, - 410, 32, 145, 34, 147, 110, 111, 335, 336, 337, - 338, 339, 109, 110, 310, 311, 312, 39, 19, 41, - 348, 349, 350, 433, 148, 435, 480, 153, 438, 483, - 484, 485, 80, 81, 444, 445, 144, 148, 147, 16, - 9, 9, 19, 9, 21, 52, 11, 343, 147, 153, - 543, 147, 147, 546, 147, 147, 19, 353, 147, 147, - 144, 147, 472, 473, 147, 475, 476, 147, 35, 144, - 144, 481, 400, 401, 146, 144, 144, 149, 35, 407, - 152, 491, 154, 155, 144, 381, 382, 383, 384, 385, - 144, 147, 388, 144, 56, 144, 263, 264, 144, 266, - 153, 144, 512, 399, 149, 144, 540, 144, 7, 8, - 520, 10, 11, 12, 13, 14, 144, 16, 17, 144, - 19, 20, 21, 144, 35, 559, 454, 455, 456, 457, - 144, 144, 299, 461, 462, 19, 4, 114, 115, 144, - 307, 308, 148, 19, 14, 14, 556, 46, 147, 144, - 144, 561, 4, 449, 131, 132, 144, 134, 135, 144, - 137, 138, 139, 144, 144, 493, 494, 463, 578, 579, - 144, 147, 468, 583, 144, 153, 586, 50, 474, 19, - 144, 14, 4, 144, 480, 144, 144, 483, 484, 485, - 144, 144, 488, 148, 144, 151, 148, 467, 144, 148, - 528, 149, 530, 531, 371, 372, 373, 148, 148, 23, - 24, 50, 379, 151, 148, 148, 148, 144, 14, 14, - 144, 14, 389, 390, 68, 14, 126, 242, 126, 126, - 39, 40, 41, 42, 43, 44, 45, 241, 47, 89, - 535, 108, 102, 508, 219, 229, 542, 146, 17, 86, - 149, 56, 488, 152, 402, 154, 155, -1, -1, -1, - -1, -1, -1, -1, -1, 535, 433, -1, 435, -1, - -1, 438, -1, -1, -1, -1, -1, 444, 445, 93, - 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, - 104, 105, 106, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, 472, 473, -1, 475, 476, - -1, -1, -1, -1, 481, -1, 7, 8, -1, 10, - 11, 12, 13, 14, 491, 16, 17, -1, 19, 20, - 21, 140, 141, 142, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, 512, -1, -1, -1, -1, - -1, -1, -1, 520, -1, 46, 3, 4, -1, -1, - 7, 8, 9, 114, 115, -1, -1, -1, -1, 16, - 17, -1, 19, 20, 21, 22, 23, 24, -1, -1, - 131, 132, -1, 134, 135, -1, 137, 138, 139, 556, - 37, 38, -1, -1, 561, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, 54, -1, -1, - -1, 578, 579, -1, -1, -1, 583, -1, -1, 586, - -1, -1, -1, 70, 71, 72, 73, 74, 75, 76, - 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, + 0, 27, 166, 226, 154, 123, 423, 147, 4, 0, + 18, 167, 11, 297, 154, 25, 189, 17, 26, 144, + 31, 249, 250, 11, 263, 264, 17, 266, 11, 11, + 155, 204, 205, 206, 207, 208, 330, 331, 211, 50, + 7, 8, 49, 3, 4, 5, 6, 559, 74, 16, + 17, 143, 19, 20, 21, 144, 63, 213, 116, 54, + 299, 573, 50, 23, 24, 144, 155, 50, 307, 308, + 31, 144, 98, 145, 153, 147, 102, 144, 29, 30, + 153, 153, 108, 144, 142, 40, 41, 113, 155, 89, + 35, 508, 47, 17, 155, 144, 20, 123, 53, 144, + 16, 143, 151, 19, 144, 21, 151, 144, 148, 135, + 136, 148, 145, 139, 147, 343, 144, 143, 151, 11, + 148, 261, 14, 263, 264, 542, 266, 421, 3, 4, + 5, 6, 371, 372, 373, 363, 110, 111, 164, 312, + 379, 39, 40, 41, 154, 15, 44, 155, 0, 267, + 389, 390, 151, 145, 143, 147, 148, 574, 154, 299, + 19, 187, 188, 189, 190, 449, 157, 307, 308, 151, + 131, 132, 133, 134, 43, 136, 45, 203, 204, 205, + 206, 207, 208, 209, 210, 211, 131, 132, 133, 134, + 143, 136, 310, 219, 478, 434, 480, 436, 114, 115, + 439, 144, 145, 229, 147, 143, 445, 446, 381, 149, + 383, 384, 385, 109, 110, 131, 132, 18, 134, 135, + 19, 137, 138, 139, 57, 58, 59, 60, 61, 62, + 19, 371, 372, 373, 473, 474, 19, 476, 477, 379, + 147, 267, 526, 482, 145, 4, 147, 470, 149, 389, + 390, 4, 278, 492, 131, 132, 133, 134, 32, 136, + 34, 411, 39, 40, 41, 42, 43, 44, 45, 295, + 47, 411, 144, 145, 513, 147, 34, 335, 336, 337, + 338, 339, 521, 150, 310, 311, 312, 140, 141, 142, + 348, 349, 350, 150, 434, 16, 436, 4, 19, 439, + 21, 145, 19, 147, 148, 445, 446, 145, 481, 147, + 144, 484, 485, 486, 39, 147, 41, 343, 557, 80, + 81, 544, 148, 562, 547, 153, 148, 353, 9, 9, + 9, 147, 52, 473, 474, 11, 476, 477, 153, 147, + 579, 580, 482, 401, 402, 584, 19, 147, 587, 147, + 408, 147, 492, 147, 147, 381, 382, 383, 384, 385, + 147, 147, 388, 140, 141, 142, 114, 115, 144, 144, + 35, 144, 144, 513, 400, 144, 144, 541, 144, 35, + 147, 521, 147, 131, 132, 56, 134, 135, 144, 137, + 138, 139, 144, 144, 149, 144, 560, 455, 456, 457, + 458, 144, 144, 144, 462, 463, 144, 144, 153, 144, + 144, 35, 19, 4, 0, 144, 148, 557, 19, 14, + 14, 147, 562, 4, 450, 144, 144, 50, 144, 15, + 16, 17, 144, 19, 20, 21, 494, 495, 464, 579, + 580, 27, 28, 469, 584, 144, 144, 587, 144, 475, + 147, 144, 144, 144, 144, 481, 144, 144, 484, 485, + 486, 144, 48, 489, 153, 51, 148, 144, 468, 55, + 148, 529, 19, 531, 532, 3, 4, 144, 148, 7, + 8, 9, 151, 149, 0, 148, 148, 50, 16, 17, + 14, 19, 20, 21, 22, 23, 24, 23, 24, 15, + 16, 17, 151, 19, 20, 21, 148, 148, 148, 37, + 38, 27, 28, 4, 144, 14, 14, 543, 144, 14, + 68, 14, 126, 126, 126, 89, 54, 241, 509, 242, + 536, 108, 48, 219, 102, 51, 536, 17, 56, 55, + 86, 489, 70, 71, 72, 73, 74, 75, 76, 77, + 78, 79, 80, 81, 82, 83, 84, 85, 86, -1, + 403, 229, -1, -1, -1, -1, -1, 93, 94, 95, + 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, + 106, -1, -1, -1, 112, 113, 114, 115, 116, 117, + 118, 119, 120, 121, 122, 123, 124, -1, 126, -1, + 128, 129, 130, -1, -1, -1, -1, -1, -1, 3, + 4, -1, -1, 7, 8, 9, -1, 145, -1, 147, + -1, -1, 16, 17, 152, 19, 20, 21, 22, 23, + 24, -1, -1, -1, -1, -1, -1, -1, 7, 8, + -1, -1, -1, 37, 38, -1, -1, 16, 17, -1, + 19, 20, 21, 22, -1, -1, -1, -1, -1, -1, + 54, -1, -1, -1, -1, -1, -1, -1, 37, 38, + -1, -1, -1, -1, -1, -1, 70, 71, 72, 73, + 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, + 84, 85, 86, -1, -1, -1, -1, -1, -1, -1, + -1, 70, 71, 72, 73, 74, 75, 76, 77, 78, + 79, 80, 81, 82, 83, 84, 85, 86, 112, 113, + 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, + 124, -1, 126, -1, 128, 129, 130, -1, -1, -1, + -1, -1, -1, 112, 113, 114, 115, 116, 117, 118, + 119, 120, 121, 122, 123, 124, -1, 126, 152, 128, + 129, 130, -1, -1, -1, -1, -1, -1, -1, 3, + 4, -1, -1, -1, -1, 9, 145, -1, 147, -1, + 149, -1, -1, 152, -1, 154, -1, 156, 22, 23, + 24, 87, 88, 89, 90, 91, 92, 93, 94, 95, + 96, -1, -1, 37, 38, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, 7, 8, + 54, 10, 11, 12, 13, 14, -1, 16, 17, -1, + 19, 20, 21, -1, -1, -1, 70, 71, 72, 73, + 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, + 84, 85, 86, -1, -1, -1, -1, 46, 7, 8, + -1, 10, 11, 12, 13, 14, -1, 16, 17, -1, + 19, 20, 21, -1, -1, -1, -1, -1, 112, 113, + 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, + 124, -1, 126, -1, 128, 129, 130, 46, 7, 8, + -1, 10, 11, 12, 13, 14, -1, 16, 17, -1, + 19, 20, 21, -1, -1, -1, 7, 8, 152, 10, + 11, 12, 13, 14, -1, 16, 17, -1, 19, 20, + 21, -1, -1, -1, -1, 7, 8, 46, 10, 11, + 12, 13, 14, -1, 16, 17, -1, 19, 20, 21, + -1, -1, -1, -1, -1, 46, -1, 146, -1, -1, + 149, -1, -1, 152, 36, 154, 155, -1, -1, -1, + -1, -1, 7, 8, 46, 10, 11, 12, 13, 14, + -1, 16, 17, -1, 19, 20, 21, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, 146, -1, -1, + 149, -1, -1, 152, -1, 154, 155, -1, -1, 7, + 8, 46, 10, 11, 12, 13, 14, -1, 16, 17, + -1, 19, 20, 21, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, 146, 36, -1, + 149, -1, -1, 152, -1, 154, 155, -1, 46, -1, + -1, -1, -1, -1, -1, 146, -1, -1, 149, -1, + -1, 152, -1, 154, 155, -1, -1, -1, -1, -1, + -1, -1, -1, -1, 146, -1, -1, 149, -1, -1, + 152, -1, 154, 118, 7, 8, -1, 10, 11, 12, + 13, 14, -1, 16, 17, -1, 19, 20, 21, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, + -1, 146, -1, -1, 149, -1, -1, 152, -1, 154, + -1, 7, 8, 46, 10, 11, 12, 13, 14, -1, + 16, 17, -1, 19, 20, 21, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, 146, -1, + 36, 149, -1, -1, 152, -1, 154, -1, 7, 8, + 46, 10, 11, 12, 13, 14, -1, 16, 17, -1, + 19, 20, 21, -1, -1, -1, 7, 8, -1, 10, + 11, 12, 13, 14, -1, 16, 17, 36, 19, 20, + 21, -1, -1, -1, -1, 7, 8, 46, 10, 11, + 12, 13, 14, -1, 16, 17, -1, 19, 20, 21, + -1, -1, -1, -1, -1, 46, -1, -1, -1, -1, + -1, -1, -1, 146, -1, -1, 149, -1, 151, 152, + -1, 154, 7, 8, 46, 10, 11, 12, 13, 14, + -1, 16, 17, -1, 19, 20, 21, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, + 146, -1, -1, 149, -1, -1, 152, -1, 154, 7, + 8, 46, 10, 11, 12, 13, 14, -1, 16, 17, + -1, 19, 20, 21, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, 146, -1, -1, + 149, -1, -1, 152, -1, 154, -1, -1, 46, -1, -1, -1, -1, -1, -1, 146, -1, -1, 149, -1, - -1, 152, -1, 154, 155, 112, 113, 114, 115, 116, - 117, 118, 119, 120, 121, 122, 123, 124, -1, 126, - -1, 128, 129, 130, -1, -1, -1, -1, -1, -1, - 3, 4, -1, -1, 7, 8, 9, -1, 145, -1, - 147, -1, -1, 16, 17, 152, 19, 20, 21, 22, - 23, 24, -1, -1, -1, -1, -1, -1, -1, 7, - 8, -1, -1, -1, 37, 38, -1, -1, 16, 17, - -1, 19, 20, 21, 22, -1, -1, -1, -1, -1, - -1, 54, -1, -1, -1, -1, -1, -1, -1, 37, - 38, -1, -1, -1, -1, -1, -1, 70, 71, 72, - 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, - 83, 84, 85, 86, -1, -1, -1, -1, -1, -1, - -1, -1, 70, 71, 72, 73, 74, 75, 76, 77, - 78, 79, 80, 81, 82, 83, 84, 85, 86, 112, - 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, - 123, 124, -1, 126, -1, 128, 129, 130, -1, -1, - -1, -1, -1, -1, 112, 113, 114, 115, 116, 117, - 118, 119, 120, 121, 122, 123, 124, -1, 126, 152, - 128, 129, 130, -1, -1, -1, -1, -1, -1, -1, - 3, 4, -1, -1, -1, -1, 9, 145, -1, 147, - -1, 149, -1, -1, 152, -1, 154, -1, 156, 22, - 23, 24, -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, 37, 38, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, -1, 7, - 8, 54, 10, 11, 12, 13, 14, -1, 16, 17, - -1, 19, 20, 21, -1, -1, -1, 70, 71, 72, - 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, - 83, 84, 85, 86, -1, -1, -1, -1, 46, -1, - -1, -1, -1, 7, 8, -1, 10, 11, 12, 13, - 14, -1, 16, 17, -1, 19, 20, 21, -1, 112, - 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, - 123, 124, 36, 126, -1, 128, 129, 130, -1, -1, - 7, 8, 46, 10, 11, 12, 13, 14, -1, 16, - 17, -1, 19, 20, 21, -1, -1, 7, 8, 152, - 10, 11, 12, 13, 14, -1, 16, 17, -1, 19, - 20, 21, -1, -1, -1, -1, -1, -1, -1, 46, - -1, -1, -1, -1, -1, -1, 36, -1, -1, -1, - -1, -1, -1, -1, -1, -1, 46, -1, 146, -1, - -1, 149, -1, -1, 152, -1, 154, 155, 7, 8, - -1, 10, 11, 12, 13, 14, -1, 16, 17, -1, - 19, 20, 21, 7, 8, -1, 10, 11, 12, 13, + -1, 152, -1, 154, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, 146, -1, -1, 149, -1, -1, + 152, -1, 154, 7, 8, -1, 10, 11, 12, 13, 14, -1, 16, 17, -1, 19, 20, 21, -1, -1, - -1, -1, 146, -1, -1, 149, -1, 46, 152, -1, - 154, 118, 36, -1, 7, 8, -1, 10, 11, 12, - 13, 14, 46, 16, 17, -1, 19, 20, 21, -1, - -1, -1, -1, -1, -1, -1, -1, -1, -1, 146, - -1, -1, 149, 36, -1, 152, -1, 154, -1, -1, - -1, -1, -1, 46, -1, -1, 146, -1, -1, 149, - -1, -1, 152, -1, 154, 7, 8, -1, 10, 11, - 12, 13, 14, -1, 16, 17, -1, 19, 20, 21, - 7, 8, -1, 10, 11, 12, 13, 14, -1, 16, + -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, + -1, 146, -1, -1, 149, -1, -1, 152, -1, 154, + 7, 8, 46, 10, 11, 12, 13, 14, -1, 16, 17, -1, 19, 20, 21, -1, -1, -1, -1, -1, - -1, -1, -1, -1, 46, -1, -1, 146, -1, -1, - 149, -1, 151, 152, -1, 154, -1, -1, -1, 46, + -1, -1, -1, -1, -1, -1, -1, -1, 146, -1, + -1, 149, -1, -1, 152, -1, 154, 33, -1, 46, + -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, 52, 53, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, 64, 65, + 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, + 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, + 86, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, 146, -1, -1, 149, -1, -1, 152, -1, - 154, 7, 8, -1, 10, 11, 12, 13, 14, -1, - 16, 17, -1, 19, 20, 21, -1, -1, -1, -1, - -1, -1, -1, 146, -1, -1, 149, -1, -1, 152, - -1, 154, 7, 8, -1, 10, 11, 12, 13, 14, - 46, 16, 17, -1, 19, 20, 21, 7, 8, -1, - 10, 11, 12, 13, 14, -1, 16, 17, -1, 19, - 20, 21, -1, -1, -1, -1, -1, -1, -1, -1, - -1, 46, -1, -1, 146, -1, -1, 149, -1, -1, - 152, -1, 154, -1, -1, -1, 46, -1, -1, 146, - -1, -1, 149, -1, -1, 152, -1, 154, 7, 8, - -1, 10, 11, 12, 13, 14, 0, 16, 17, -1, - 19, 20, 21, -1, -1, -1, -1, -1, -1, -1, - -1, 15, 16, 17, -1, 19, 20, 21, -1, -1, - -1, -1, -1, 27, 28, -1, -1, 46, -1, -1, - 146, -1, -1, 149, -1, -1, 152, -1, 154, -1, - -1, -1, -1, -1, 48, -1, -1, 51, -1, -1, - -1, 55, -1, -1, -1, -1, -1, -1, -1, -1, - -1, 146, -1, -1, 149, -1, 33, 152, -1, 154, - -1, -1, -1, -1, -1, -1, 146, -1, -1, 149, - -1, -1, 152, -1, 154, 52, 53, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, 64, 65, 66, - 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, - 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, - -1, -1, -1, -1, -1, -1, -1, 146, -1, -1, - 149, -1, -1, 152, -1, 154, -1, -1, -1, -1, - 107, 108, 109, -1, -1, 112, 113, 114, 115, 116, - 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, - 127, 128, 129, 130 + 154, 107, 108, 109, -1, -1, 112, 113, 114, 115, + 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, + 126, 127, 128, 129, 130, -1, -1, -1, -1, 146, + -1, -1, 149, -1, -1, 152, -1, 154 }; /* YYSTOS[STATE-NUM] -- The (internal number of the) accessing @@ -2439,26 +2433,26 @@ 37, 38, 54, 152, 196, 222, 223, 224, 224, 224, 224, 191, 189, 189, 144, 183, 144, 183, 224, 149, 144, 144, 144, 144, 144, 144, 224, 224, 35, 191, - 189, 225, 131, 132, 133, 136, 180, 186, 186, 35, - 147, 147, 195, 195, 195, 195, 195, 144, 151, 155, - 189, 197, 153, 155, 195, 195, 195, 31, 50, 184, - 187, 36, 189, 213, 214, 56, 221, 197, 144, 144, - 224, 224, 224, 11, 50, 11, 234, 224, 149, 225, - 189, 225, 225, 225, 144, 144, 189, 224, 224, 144, - 189, 195, 195, 234, 144, 144, 144, 144, 195, 153, - 155, 144, 144, 35, 19, 4, 186, 179, 144, 148, - 19, 153, 14, 14, 147, 144, 144, 224, 4, 224, - 144, 144, 224, 144, 144, 144, 224, 224, 147, 144, - 183, 189, 148, 144, 144, 148, 195, 195, 195, 195, - 153, 195, 195, 189, 165, 166, 36, 189, 181, 144, - 224, 224, 189, 233, 224, 224, 183, 183, 225, 224, - 144, 225, 225, 225, 233, 224, 195, 195, 144, 148, - 144, 144, 148, 148, 148, 179, 184, 185, 19, 144, - 149, 224, 144, 148, 151, 224, 148, 183, 148, 148, - 195, 195, 195, 166, 50, 182, 14, 151, 163, 230, - 179, 189, 181, 151, 181, 148, 148, 148, 4, 224, - 222, 151, 163, 224, 35, 144, 222, 179, 14, 14, - 144, 224, 224, 14, 68, 224, 14, 224 + 189, 225, 131, 132, 133, 134, 136, 180, 186, 186, + 35, 147, 147, 195, 195, 195, 195, 195, 144, 151, + 155, 189, 197, 153, 155, 195, 195, 195, 31, 50, + 184, 187, 36, 189, 213, 214, 56, 221, 197, 144, + 144, 224, 224, 224, 11, 50, 11, 234, 224, 149, + 225, 189, 225, 225, 225, 144, 144, 189, 224, 224, + 144, 189, 195, 195, 234, 144, 144, 144, 144, 195, + 153, 155, 144, 144, 35, 19, 4, 186, 179, 144, + 148, 19, 153, 14, 14, 147, 144, 144, 224, 4, + 224, 144, 144, 224, 144, 144, 144, 224, 224, 147, + 144, 183, 189, 148, 144, 144, 148, 195, 195, 195, + 195, 153, 195, 195, 189, 165, 166, 36, 189, 181, + 144, 224, 224, 189, 233, 224, 224, 183, 183, 225, + 224, 144, 225, 225, 225, 233, 224, 195, 195, 144, + 148, 144, 144, 148, 148, 148, 179, 184, 185, 19, + 144, 149, 224, 144, 148, 151, 224, 148, 183, 148, + 148, 195, 195, 195, 166, 50, 182, 14, 151, 163, + 230, 179, 189, 181, 151, 181, 148, 148, 148, 4, + 224, 222, 151, 163, 224, 35, 144, 222, 179, 14, + 14, 144, 224, 224, 14, 68, 224, 14, 224 }; #define yyerrok (yyerrstatus = 0) @@ -3527,24 +3521,29 @@ break; case 115: -#line 1250 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.ParamAttrs) = ParamAttr::None; ;} +#line 1248 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.ParamAttrs) = ParamAttr::InReg; ;} break; case 116: #line 1251 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.ParamAttrs) = ParamAttr::None; ;} + break; + + case 117: +#line 1252 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamAttrs) = (yyvsp[-1].ParamAttrs) | (yyvsp[0].ParamAttrs); ;} break; - case 117: -#line 1258 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 118: +#line 1259 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.UIntVal) = 0; ;} break; - case 118: -#line 1259 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 119: +#line 1260 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.UIntVal) = (yyvsp[0].UInt64Val); if ((yyval.UIntVal) != 0 && !isPowerOf2_32((yyval.UIntVal))) @@ -3553,13 +3552,13 @@ ;} break; - case 119: -#line 1265 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 120: +#line 1266 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.UIntVal) = 0; ;} break; - case 120: -#line 1266 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 121: +#line 1267 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.UIntVal) = (yyvsp[0].UInt64Val); if ((yyval.UIntVal) != 0 && !isPowerOf2_32((yyval.UIntVal))) @@ -3568,8 +3567,8 @@ ;} break; - case 121: -#line 1274 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 122: +#line 1275 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { for (unsigned i = 0, e = (yyvsp[0].StrVal)->length(); i != e; ++i) if ((*(yyvsp[0].StrVal))[i] == '"' || (*(yyvsp[0].StrVal))[i] == '\\') @@ -3579,19 +3578,14 @@ ;} break; - case 122: -#line 1282 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.StrVal) = 0; ;} - break; - case 123: #line 1283 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.StrVal) = (yyvsp[0].StrVal); ;} + { (yyval.StrVal) = 0; ;} break; case 124: -#line 1288 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - {;} +#line 1284 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.StrVal) = (yyvsp[0].StrVal); ;} break; case 125: @@ -3601,6 +3595,11 @@ case 126: #line 1290 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + {;} + break; + + case 127: +#line 1291 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { CurGV->setSection(*(yyvsp[0].StrVal)); delete (yyvsp[0].StrVal); @@ -3608,8 +3607,8 @@ ;} break; - case 127: -#line 1295 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 128: +#line 1296 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if ((yyvsp[0].UInt64Val) != 0 && !isPowerOf2_32((yyvsp[0].UInt64Val))) GEN_ERROR("Alignment must be a power of two"); @@ -3618,24 +3617,24 @@ ;} break; - case 132: -#line 1311 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 133: +#line 1312 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.TypeVal) = new PATypeHolder(OpaqueType::get()); CHECK_FOR_ERROR ;} break; - case 133: -#line 1315 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 134: +#line 1316 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.TypeVal) = new PATypeHolder((yyvsp[0].PrimType)); CHECK_FOR_ERROR ;} break; - case 134: -#line 1319 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 135: +#line 1320 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // Pointer type? if (*(yyvsp[-1].TypeVal) == Type::LabelTy) GEN_ERROR("Cannot form a pointer to a basic block"); @@ -3645,8 +3644,8 @@ ;} break; - case 135: -#line 1326 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 136: +#line 1327 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // Named types are also simple types... const Type* tmp = getTypeVal((yyvsp[0].ValIDVal)); CHECK_FOR_ERROR @@ -3654,8 +3653,8 @@ ;} break; - case 136: -#line 1331 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 137: +#line 1332 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // Type UpReference if ((yyvsp[0].UInt64Val) > (uint64_t)~0U) GEN_ERROR("Value out of range"); OpaqueType *OT = OpaqueType::get(); // Use temporary placeholder @@ -3666,8 +3665,8 @@ ;} break; - case 137: -#line 1339 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 138: +#line 1340 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { std::vector Params; ParamAttrsVector Attrs; @@ -3700,8 +3699,8 @@ ;} break; - case 138: -#line 1369 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 139: +#line 1370 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { std::vector Params; ParamAttrsVector Attrs; @@ -3734,8 +3733,8 @@ ;} break; - case 139: -#line 1400 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 140: +#line 1401 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // Sized array type? (yyval.TypeVal) = new PATypeHolder(HandleUpRefs(ArrayType::get(*(yyvsp[-1].TypeVal), (unsigned)(yyvsp[-3].UInt64Val)))); delete (yyvsp[-1].TypeVal); @@ -3743,8 +3742,8 @@ ;} break; - case 140: -#line 1405 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 141: +#line 1406 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // Vector type? const llvm::Type* ElemTy = (yyvsp[-1].TypeVal)->get(); if ((unsigned)(yyvsp[-3].UInt64Val) != (yyvsp[-3].UInt64Val)) @@ -3759,8 +3758,8 @@ ;} break; - case 141: -#line 1417 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 142: +#line 1418 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // Structure type? std::vector Elements; for (std::list::iterator I = (yyvsp[-1].TypeList)->begin(), @@ -3773,16 +3772,16 @@ ;} break; - case 142: -#line 1427 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 143: +#line 1428 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // Empty structure type? (yyval.TypeVal) = new PATypeHolder(StructType::get(std::vector())); CHECK_FOR_ERROR ;} break; - case 143: -#line 1431 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 144: +#line 1432 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { std::vector Elements; for (std::list::iterator I = (yyvsp[-2].TypeList)->begin(), @@ -3795,24 +3794,24 @@ ;} break; - case 144: -#line 1441 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 145: +#line 1442 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // Empty structure type? (yyval.TypeVal) = new PATypeHolder(StructType::get(std::vector(), true)); CHECK_FOR_ERROR ;} break; - case 145: -#line 1448 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 146: +#line 1449 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.TypeWithAttrs).Ty = (yyvsp[-1].TypeVal); (yyval.TypeWithAttrs).Attrs = (yyvsp[0].ParamAttrs); ;} break; - case 146: -#line 1455 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 147: +#line 1456 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[0].TypeVal))->getDescription()); @@ -3822,15 +3821,15 @@ ;} break; - case 147: -#line 1462 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 148: +#line 1463 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.TypeVal) = new PATypeHolder(Type::VoidTy); ;} break; - case 148: -#line 1467 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 149: +#line 1468 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.TypeWithAttrsList) = new TypeWithAttrsList(); (yyval.TypeWithAttrsList)->push_back((yyvsp[0].TypeWithAttrs)); @@ -3838,16 +3837,16 @@ ;} break; - case 149: -#line 1472 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 150: +#line 1473 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { ((yyval.TypeWithAttrsList)=(yyvsp[-2].TypeWithAttrsList))->push_back((yyvsp[0].TypeWithAttrs)); CHECK_FOR_ERROR ;} break; - case 151: -#line 1480 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 152: +#line 1481 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.TypeWithAttrsList)=(yyvsp[-2].TypeWithAttrsList); TypeWithAttrs TWA; TWA.Attrs = ParamAttr::None; @@ -3857,8 +3856,8 @@ ;} break; - case 152: -#line 1487 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 153: +#line 1488 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.TypeWithAttrsList) = new TypeWithAttrsList; TypeWithAttrs TWA; TWA.Attrs = ParamAttr::None; @@ -3868,16 +3867,16 @@ ;} break; - case 153: -#line 1494 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 154: +#line 1495 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.TypeWithAttrsList) = new TypeWithAttrsList(); CHECK_FOR_ERROR ;} break; - case 154: -#line 1502 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 155: +#line 1503 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.TypeList) = new std::list(); (yyval.TypeList)->push_back(*(yyvsp[0].TypeVal)); @@ -3886,8 +3885,8 @@ ;} break; - case 155: -#line 1508 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 156: +#line 1509 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { ((yyval.TypeList)=(yyvsp[-2].TypeList))->push_back(*(yyvsp[0].TypeVal)); delete (yyvsp[0].TypeVal); @@ -3895,8 +3894,8 @@ ;} break; - case 156: -#line 1520 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 157: +#line 1521 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // Nonempty unsized arr if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-3].TypeVal))->getDescription()); @@ -3927,8 +3926,8 @@ ;} break; - case 157: -#line 1548 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 158: +#line 1549 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-2].TypeVal))->getDescription()); @@ -3947,8 +3946,8 @@ ;} break; - case 158: -#line 1564 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 159: +#line 1565 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-2].TypeVal))->getDescription()); @@ -3978,8 +3977,8 @@ ;} break; - case 159: -#line 1591 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 160: +#line 1592 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // Nonempty unsized arr if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-3].TypeVal))->getDescription()); @@ -4010,8 +4009,8 @@ ;} break; - case 160: -#line 1619 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 161: +#line 1620 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { const StructType *STy = dyn_cast((yyvsp[-3].TypeVal)->get()); if (STy == 0) @@ -4040,8 +4039,8 @@ ;} break; - case 161: -#line 1645 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 162: +#line 1646 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-2].TypeVal))->getDescription()); @@ -4064,8 +4063,8 @@ ;} break; - case 162: -#line 1665 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 163: +#line 1666 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { const StructType *STy = dyn_cast((yyvsp[-5].TypeVal)->get()); if (STy == 0) @@ -4094,8 +4093,8 @@ ;} break; - case 163: -#line 1691 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 164: +#line 1692 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-4].TypeVal))->getDescription()); @@ -4118,8 +4117,8 @@ ;} break; - case 164: -#line 1711 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 165: +#line 1712 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-1].TypeVal))->getDescription()); @@ -4134,8 +4133,8 @@ ;} break; - case 165: -#line 1723 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 166: +#line 1724 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-1].TypeVal))->getDescription()); @@ -4145,8 +4144,8 @@ ;} break; - case 166: -#line 1730 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 167: +#line 1731 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-1].TypeVal))->getDescription()); @@ -4215,8 +4214,8 @@ ;} break; - case 167: -#line 1796 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 168: +#line 1797 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-1].TypeVal))->getDescription()); @@ -4229,8 +4228,8 @@ ;} break; - case 168: -#line 1806 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 169: +#line 1807 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-1].TypeVal))->getDescription()); @@ -4243,8 +4242,8 @@ ;} break; - case 169: -#line 1816 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 170: +#line 1817 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // integral constants if (!ConstantInt::isValueValidForType((yyvsp[-1].PrimType), (yyvsp[0].SInt64Val))) GEN_ERROR("Constant value doesn't fit in type"); @@ -4253,8 +4252,8 @@ ;} break; - case 170: -#line 1822 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 171: +#line 1823 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // arbitrary precision integer constants uint32_t BitWidth = cast((yyvsp[-1].PrimType))->getBitWidth(); if ((yyvsp[0].APIntVal)->getBitWidth() > BitWidth) { @@ -4267,8 +4266,8 @@ ;} break; - case 171: -#line 1832 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 172: +#line 1833 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // integral constants if (!ConstantInt::isValueValidForType((yyvsp[-1].PrimType), (yyvsp[0].UInt64Val))) GEN_ERROR("Constant value doesn't fit in type"); @@ -4277,8 +4276,8 @@ ;} break; - case 172: -#line 1838 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 173: +#line 1839 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // arbitrary precision integer constants uint32_t BitWidth = cast((yyvsp[-1].PrimType))->getBitWidth(); if ((yyvsp[0].APIntVal)->getBitWidth() > BitWidth) { @@ -4291,8 +4290,8 @@ ;} break; - case 173: -#line 1848 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 174: +#line 1849 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // Boolean constants assert(cast((yyvsp[-1].PrimType))->getBitWidth() == 1 && "Not Bool?"); (yyval.ConstVal) = ConstantInt::getTrue(); @@ -4300,8 +4299,8 @@ ;} break; - case 174: -#line 1853 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 175: +#line 1854 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // Boolean constants assert(cast((yyvsp[-1].PrimType))->getBitWidth() == 1 && "Not Bool?"); (yyval.ConstVal) = ConstantInt::getFalse(); @@ -4309,8 +4308,8 @@ ;} break; - case 175: -#line 1858 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 176: +#line 1859 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // Float & Double constants if (!ConstantFP::isValueValidForType((yyvsp[-1].PrimType), (yyvsp[0].FPVal))) GEN_ERROR("Floating point constant invalid for type"); @@ -4319,8 +4318,8 @@ ;} break; - case 176: -#line 1866 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 177: +#line 1867 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-1].TypeVal))->getDescription()); @@ -4335,8 +4334,8 @@ ;} break; - case 177: -#line 1878 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 178: +#line 1879 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!isa((yyvsp[-2].ConstVal)->getType())) GEN_ERROR("GetElementPtr requires a pointer operand"); @@ -4361,8 +4360,8 @@ ;} break; - case 178: -#line 1900 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 179: +#line 1901 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if ((yyvsp[-5].ConstVal)->getType() != Type::Int1Ty) GEN_ERROR("Select condition must be of boolean type"); @@ -4373,8 +4372,8 @@ ;} break; - case 179: -#line 1908 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 180: +#line 1909 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if ((yyvsp[-3].ConstVal)->getType() != (yyvsp[-1].ConstVal)->getType()) GEN_ERROR("Binary operator types must match"); @@ -4383,8 +4382,8 @@ ;} break; - case 180: -#line 1914 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 181: +#line 1915 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if ((yyvsp[-3].ConstVal)->getType() != (yyvsp[-1].ConstVal)->getType()) GEN_ERROR("Logical operator types must match"); @@ -4398,8 +4397,8 @@ ;} break; - case 181: -#line 1925 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 182: +#line 1926 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if ((yyvsp[-3].ConstVal)->getType() != (yyvsp[-1].ConstVal)->getType()) GEN_ERROR("icmp operand types must match"); @@ -4407,8 +4406,8 @@ ;} break; - case 182: -#line 1930 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 183: +#line 1931 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if ((yyvsp[-3].ConstVal)->getType() != (yyvsp[-1].ConstVal)->getType()) GEN_ERROR("fcmp operand types must match"); @@ -4416,8 +4415,8 @@ ;} break; - case 183: -#line 1935 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 184: +#line 1936 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!ExtractElementInst::isValidOperands((yyvsp[-3].ConstVal), (yyvsp[-1].ConstVal))) GEN_ERROR("Invalid extractelement operands"); @@ -4426,8 +4425,8 @@ ;} break; - case 184: -#line 1941 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 185: +#line 1942 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!InsertElementInst::isValidOperands((yyvsp[-5].ConstVal), (yyvsp[-3].ConstVal), (yyvsp[-1].ConstVal))) GEN_ERROR("Invalid insertelement operands"); @@ -4436,8 +4435,8 @@ ;} break; - case 185: -#line 1947 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 186: +#line 1948 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!ShuffleVectorInst::isValidOperands((yyvsp[-5].ConstVal), (yyvsp[-3].ConstVal), (yyvsp[-1].ConstVal))) GEN_ERROR("Invalid shufflevector operands"); @@ -4446,16 +4445,16 @@ ;} break; - case 186: -#line 1956 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 187: +#line 1957 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { ((yyval.ConstVector) = (yyvsp[-2].ConstVector))->push_back((yyvsp[0].ConstVal)); CHECK_FOR_ERROR ;} break; - case 187: -#line 1960 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 188: +#line 1961 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ConstVector) = new std::vector(); (yyval.ConstVector)->push_back((yyvsp[0].ConstVal)); @@ -4463,28 +4462,28 @@ ;} break; - case 188: -#line 1968 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 189: +#line 1969 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.BoolVal) = false; ;} break; - case 189: -#line 1968 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 190: +#line 1969 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.BoolVal) = true; ;} break; - case 190: -#line 1971 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 191: +#line 1972 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.BoolVal) = true; ;} break; - case 191: -#line 1971 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 192: +#line 1972 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.BoolVal) = false; ;} break; - case 192: -#line 1974 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 193: +#line 1975 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { const Type* VTy = (yyvsp[-1].TypeVal)->get(); Value *V = getVal(VTy, (yyvsp[0].ValIDVal)); @@ -4498,8 +4497,8 @@ ;} break; - case 193: -#line 1985 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 194: +#line 1986 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { Constant *Val = (yyvsp[-3].ConstVal); const Type *DestTy = (yyvsp[-1].TypeVal)->get(); @@ -4514,8 +4513,8 @@ ;} break; - case 194: -#line 2006 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 195: +#line 2007 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ModuleVal) = ParserResult = CurModule.CurrentModule; CurModule.ModuleDone(); @@ -4523,8 +4522,8 @@ ;} break; - case 195: -#line 2011 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 196: +#line 2012 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ModuleVal) = ParserResult = CurModule.CurrentModule; CurModule.ModuleDone(); @@ -4532,40 +4531,40 @@ ;} break; - case 198: -#line 2024 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 199: +#line 2025 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { CurFun.isDeclare = false; ;} break; - case 199: -#line 2024 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 200: +#line 2025 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { CurFun.FunctionDone(); CHECK_FOR_ERROR ;} break; - case 200: -#line 2028 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 201: +#line 2029 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { CurFun.isDeclare = true; ;} break; - case 201: -#line 2028 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 202: +#line 2029 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { CHECK_FOR_ERROR ;} break; - case 202: -#line 2031 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 203: +#line 2032 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { CHECK_FOR_ERROR ;} break; - case 203: -#line 2034 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 204: +#line 2035 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[0].TypeVal))->getDescription()); @@ -4592,8 +4591,8 @@ ;} break; - case 204: -#line 2058 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 205: +#line 2059 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { ResolveTypeTo((yyvsp[-2].StrVal), (yyvsp[0].PrimType)); @@ -4607,8 +4606,8 @@ ;} break; - case 205: -#line 2069 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 206: +#line 2070 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { /* "Externally Visible" Linkage */ if ((yyvsp[0].ConstVal) == 0) @@ -4619,15 +4618,15 @@ ;} break; - case 206: -#line 2076 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 207: +#line 2077 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { CurGV = 0; ;} break; - case 207: -#line 2080 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 208: +#line 2081 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if ((yyvsp[0].ConstVal) == 0) GEN_ERROR("Global value initializer is not a constant"); @@ -4636,15 +4635,15 @@ ;} break; - case 208: -#line 2085 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 209: +#line 2086 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { CurGV = 0; ;} break; - case 209: -#line 2089 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 210: +#line 2090 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[0].TypeVal))->getDescription()); @@ -4654,16 +4653,16 @@ ;} break; - case 210: -#line 2095 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 211: +#line 2096 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { CurGV = 0; CHECK_FOR_ERROR ;} break; - case 211: -#line 2099 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 212: +#line 2100 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { std::string Name; if ((yyvsp[-4].StrVal)) { @@ -4685,22 +4684,22 @@ ;} break; - case 212: -#line 2118 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 213: +#line 2119 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { CHECK_FOR_ERROR ;} break; - case 213: -#line 2121 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 214: +#line 2122 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { CHECK_FOR_ERROR ;} break; - case 214: -#line 2127 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 215: +#line 2128 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { const std::string &AsmSoFar = CurModule.CurrentModule->getModuleInlineAsm(); if (AsmSoFar.empty()) @@ -4712,24 +4711,24 @@ ;} break; - case 215: -#line 2137 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 216: +#line 2138 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { CurModule.CurrentModule->setTargetTriple(*(yyvsp[0].StrVal)); delete (yyvsp[0].StrVal); ;} break; - case 216: -#line 2141 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 217: +#line 2142 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { CurModule.CurrentModule->setDataLayout(*(yyvsp[0].StrVal)); delete (yyvsp[0].StrVal); ;} break; - case 218: -#line 2148 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 219: +#line 2149 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { CurModule.CurrentModule->addLibrary(*(yyvsp[0].StrVal)); delete (yyvsp[0].StrVal); @@ -4737,8 +4736,8 @@ ;} break; - case 219: -#line 2153 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 220: +#line 2154 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { CurModule.CurrentModule->addLibrary(*(yyvsp[0].StrVal)); delete (yyvsp[0].StrVal); @@ -4746,15 +4745,15 @@ ;} break; - case 220: -#line 2158 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 221: +#line 2159 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { CHECK_FOR_ERROR ;} break; - case 221: -#line 2167 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 222: +#line 2168 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-2].TypeVal))->getDescription()); @@ -4767,8 +4766,8 @@ ;} break; - case 222: -#line 2177 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 223: +#line 2178 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-2].TypeVal))->getDescription()); @@ -4781,16 +4780,16 @@ ;} break; - case 223: -#line 2188 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 224: +#line 2189 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ArgList) = (yyvsp[0].ArgList); CHECK_FOR_ERROR ;} break; - case 224: -#line 2192 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 225: +#line 2193 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ArgList) = (yyvsp[-2].ArgList); struct ArgListEntry E; @@ -4802,8 +4801,8 @@ ;} break; - case 225: -#line 2201 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 226: +#line 2202 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ArgList) = new ArgListType; struct ArgListEntry E; @@ -4815,16 +4814,16 @@ ;} break; - case 226: -#line 2210 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 227: +#line 2211 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ArgList) = 0; CHECK_FOR_ERROR ;} break; - case 227: -#line 2216 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 228: +#line 2217 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { std::string FunctionName(*(yyvsp[-6].StrVal)); delete (yyvsp[-6].StrVal); // Free strdup'd memory! @@ -4946,8 +4945,8 @@ ;} break; - case 230: -#line 2338 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 231: +#line 2339 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FunctionVal) = CurFun.CurrentFunction; @@ -4958,16 +4957,16 @@ ;} break; - case 233: -#line 2349 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 234: +#line 2350 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FunctionVal) = (yyvsp[-1].FunctionVal); CHECK_FOR_ERROR ;} break; - case 234: -#line 2354 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 235: +#line 2355 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { CurFun.CurrentFunction->setLinkage((yyvsp[-2].Linkage)); CurFun.CurrentFunction->setVisibility((yyvsp[-1].Visibility)); @@ -4977,88 +4976,88 @@ ;} break; - case 235: -#line 2366 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 236: +#line 2367 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.BoolVal) = false; CHECK_FOR_ERROR ;} break; - case 236: -#line 2370 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 237: +#line 2371 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.BoolVal) = true; CHECK_FOR_ERROR ;} break; - case 237: -#line 2375 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 238: +#line 2376 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // A reference to a direct constant (yyval.ValIDVal) = ValID::create((yyvsp[0].SInt64Val)); CHECK_FOR_ERROR ;} break; - case 238: -#line 2379 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 239: +#line 2380 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ValIDVal) = ValID::create((yyvsp[0].UInt64Val)); CHECK_FOR_ERROR ;} break; - case 239: -#line 2383 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 240: +#line 2384 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // Perhaps it's an FP constant? (yyval.ValIDVal) = ValID::create((yyvsp[0].FPVal)); CHECK_FOR_ERROR ;} break; - case 240: -#line 2387 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 241: +#line 2388 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ValIDVal) = ValID::create(ConstantInt::getTrue()); CHECK_FOR_ERROR ;} break; - case 241: -#line 2391 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 242: +#line 2392 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ValIDVal) = ValID::create(ConstantInt::getFalse()); CHECK_FOR_ERROR ;} break; - case 242: -#line 2395 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 243: +#line 2396 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ValIDVal) = ValID::createNull(); CHECK_FOR_ERROR ;} break; - case 243: -#line 2399 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 244: +#line 2400 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ValIDVal) = ValID::createUndef(); CHECK_FOR_ERROR ;} break; - case 244: -#line 2403 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 245: +#line 2404 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // A vector zero constant. (yyval.ValIDVal) = ValID::createZeroInit(); CHECK_FOR_ERROR ;} break; - case 245: -#line 2407 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 246: +#line 2408 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // Nonempty unsized packed vector const Type *ETy = (*(yyvsp[-1].ConstVector))[0]->getType(); int NumElements = (yyvsp[-1].ConstVector)->size(); @@ -5086,16 +5085,16 @@ ;} break; - case 246: -#line 2432 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 247: +#line 2433 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ValIDVal) = ValID::create((yyvsp[0].ConstVal)); CHECK_FOR_ERROR ;} break; - case 247: -#line 2436 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 248: +#line 2437 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ValIDVal) = ValID::createInlineAsm(*(yyvsp[-2].StrVal), *(yyvsp[0].StrVal), (yyvsp[-3].BoolVal)); delete (yyvsp[-2].StrVal); @@ -5104,24 +5103,24 @@ ;} break; - case 248: -#line 2446 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 249: +#line 2447 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // Is it an integer reference...? (yyval.ValIDVal) = ValID::createLocalID((yyvsp[0].UIntVal)); CHECK_FOR_ERROR ;} break; - case 249: -#line 2450 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 250: +#line 2451 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ValIDVal) = ValID::createGlobalID((yyvsp[0].UIntVal)); CHECK_FOR_ERROR ;} break; - case 250: -#line 2454 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 251: +#line 2455 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // Is it a named reference...? (yyval.ValIDVal) = ValID::createLocalName(*(yyvsp[0].StrVal)); delete (yyvsp[0].StrVal); @@ -5129,8 +5128,8 @@ ;} break; - case 251: -#line 2459 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 252: +#line 2460 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // Is it a named reference...? (yyval.ValIDVal) = ValID::createGlobalName(*(yyvsp[0].StrVal)); delete (yyvsp[0].StrVal); @@ -5138,8 +5137,8 @@ ;} break; - case 254: -#line 2472 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 255: +#line 2473 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-1].TypeVal))->getDescription()); @@ -5149,24 +5148,24 @@ ;} break; - case 255: -#line 2481 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 256: +#line 2482 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FunctionVal) = (yyvsp[-1].FunctionVal); CHECK_FOR_ERROR ;} break; - case 256: -#line 2485 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 257: +#line 2486 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // Do not allow functions with 0 basic blocks (yyval.FunctionVal) = (yyvsp[-1].FunctionVal); CHECK_FOR_ERROR ;} break; - case 257: -#line 2494 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 258: +#line 2495 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { setValueName((yyvsp[0].TermInstVal), (yyvsp[-1].StrVal)); CHECK_FOR_ERROR @@ -5177,8 +5176,8 @@ ;} break; - case 258: -#line 2503 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 259: +#line 2504 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (CastInst *CI1 = dyn_cast((yyvsp[0].InstVal))) if (CastInst *CI2 = dyn_cast(CI1->getOperand(0))) @@ -5190,16 +5189,16 @@ ;} break; - case 259: -#line 2512 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 260: +#line 2513 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // Empty space between instruction lists (yyval.BasicBlockVal) = defineBBVal(ValID::createLocalID(CurFun.NextValNum)); CHECK_FOR_ERROR ;} break; - case 260: -#line 2516 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 261: +#line 2517 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // Labelled (named) basic block (yyval.BasicBlockVal) = defineBBVal(ValID::createLocalName(*(yyvsp[0].StrVal))); delete (yyvsp[0].StrVal); @@ -5208,24 +5207,24 @@ ;} break; - case 261: -#line 2523 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 262: +#line 2524 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // Return with a result... (yyval.TermInstVal) = new ReturnInst((yyvsp[0].ValueVal)); CHECK_FOR_ERROR ;} break; - case 262: -#line 2527 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 263: +#line 2528 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // Return with no result... (yyval.TermInstVal) = new ReturnInst(); CHECK_FOR_ERROR ;} break; - case 263: -#line 2531 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 264: +#line 2532 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // Unconditional Branch... BasicBlock* tmpBB = getBBVal((yyvsp[0].ValIDVal)); CHECK_FOR_ERROR @@ -5233,8 +5232,8 @@ ;} break; - case 264: -#line 2536 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 265: +#line 2537 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { assert(cast((yyvsp[-7].PrimType))->getBitWidth() == 1 && "Not Bool?"); BasicBlock* tmpBBA = getBBVal((yyvsp[-3].ValIDVal)); @@ -5247,8 +5246,8 @@ ;} break; - case 265: -#line 2546 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 266: +#line 2547 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { Value* tmpVal = getVal((yyvsp[-7].PrimType), (yyvsp[-6].ValIDVal)); CHECK_FOR_ERROR @@ -5270,8 +5269,8 @@ ;} break; - case 266: -#line 2565 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 267: +#line 2566 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { Value* tmpVal = getVal((yyvsp[-6].PrimType), (yyvsp[-5].ValIDVal)); CHECK_FOR_ERROR @@ -5283,8 +5282,8 @@ ;} break; - case 267: -#line 2575 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 268: +#line 2576 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // Handle the short syntax @@ -5366,24 +5365,24 @@ ;} break; - case 268: -#line 2654 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 269: +#line 2655 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.TermInstVal) = new UnwindInst(); CHECK_FOR_ERROR ;} break; - case 269: -#line 2658 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 270: +#line 2659 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.TermInstVal) = new UnreachableInst(); CHECK_FOR_ERROR ;} break; - case 270: -#line 2665 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 271: +#line 2666 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.JumpTable) = (yyvsp[-5].JumpTable); Constant *V = cast(getExistingVal((yyvsp[-4].PrimType), (yyvsp[-3].ValIDVal))); @@ -5397,8 +5396,8 @@ ;} break; - case 271: -#line 2676 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 272: +#line 2677 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.JumpTable) = new std::vector >(); Constant *V = cast(getExistingVal((yyvsp[-4].PrimType), (yyvsp[-3].ValIDVal))); @@ -5413,8 +5412,8 @@ ;} break; - case 272: -#line 2689 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 273: +#line 2690 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // Is this definition named?? if so, assign the name... setValueName((yyvsp[0].InstVal), (yyvsp[-1].StrVal)); @@ -5425,8 +5424,8 @@ ;} break; - case 273: -#line 2699 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 274: +#line 2700 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // Used for PHI nodes if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-5].TypeVal))->getDescription()); @@ -5440,8 +5439,8 @@ ;} break; - case 274: -#line 2710 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 275: +#line 2711 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.PHIList) = (yyvsp[-6].PHIList); Value* tmpVal = getVal((yyvsp[-6].PHIList)->front().first->getType(), (yyvsp[-3].ValIDVal)); @@ -5452,8 +5451,8 @@ ;} break; - case 275: -#line 2720 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 276: +#line 2721 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-2].TypeVal))->getDescription()); @@ -5465,8 +5464,8 @@ ;} break; - case 276: -#line 2729 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 277: +#line 2730 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-2].TypeVal))->getDescription()); @@ -5478,18 +5477,18 @@ ;} break; - case 277: -#line 2738 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 278: +#line 2739 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ValueRefList) = new ValueRefList(); ;} break; - case 278: -#line 2741 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 279: +#line 2742 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ValueList) = new std::vector(); ;} break; - case 279: -#line 2742 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 280: +#line 2743 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ValueList) = (yyvsp[-2].ValueList); (yyval.ValueList)->push_back((yyvsp[0].ValueVal)); @@ -5497,24 +5496,24 @@ ;} break; - case 280: -#line 2749 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 281: +#line 2750 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.BoolVal) = true; CHECK_FOR_ERROR ;} break; - case 281: -#line 2753 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 282: +#line 2754 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.BoolVal) = false; CHECK_FOR_ERROR ;} break; - case 282: -#line 2758 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 283: +#line 2759 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-3].TypeVal))->getDescription()); @@ -5538,8 +5537,8 @@ ;} break; - case 283: -#line 2779 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 284: +#line 2780 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-3].TypeVal))->getDescription()); @@ -5559,8 +5558,8 @@ ;} break; - case 284: -#line 2796 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 285: +#line 2797 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-3].TypeVal))->getDescription()); @@ -5577,8 +5576,8 @@ ;} break; - case 285: -#line 2810 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 286: +#line 2811 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-3].TypeVal))->getDescription()); @@ -5595,8 +5594,8 @@ ;} break; - case 286: -#line 2824 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 287: +#line 2825 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[0].TypeVal))->getDescription()); @@ -5611,8 +5610,8 @@ ;} break; - case 287: -#line 2836 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 288: +#line 2837 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if ((yyvsp[-4].ValueVal)->getType() != Type::Int1Ty) GEN_ERROR("select condition must be boolean"); @@ -5623,8 +5622,8 @@ ;} break; - case 288: -#line 2844 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 289: +#line 2845 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[0].TypeVal))->getDescription()); @@ -5634,8 +5633,8 @@ ;} break; - case 289: -#line 2851 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 290: +#line 2852 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!ExtractElementInst::isValidOperands((yyvsp[-2].ValueVal), (yyvsp[0].ValueVal))) GEN_ERROR("Invalid extractelement operands"); @@ -5644,8 +5643,8 @@ ;} break; - case 290: -#line 2857 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 291: +#line 2858 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!InsertElementInst::isValidOperands((yyvsp[-4].ValueVal), (yyvsp[-2].ValueVal), (yyvsp[0].ValueVal))) GEN_ERROR("Invalid insertelement operands"); @@ -5654,8 +5653,8 @@ ;} break; - case 291: -#line 2863 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 292: +#line 2864 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!ShuffleVectorInst::isValidOperands((yyvsp[-4].ValueVal), (yyvsp[-2].ValueVal), (yyvsp[0].ValueVal))) GEN_ERROR("Invalid shufflevector operands"); @@ -5664,8 +5663,8 @@ ;} break; - case 292: -#line 2869 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 293: +#line 2870 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { const Type *Ty = (yyvsp[0].PHIList)->front().first->getType(); if (!Ty->isFirstClassType()) @@ -5683,8 +5682,8 @@ ;} break; - case 293: -#line 2885 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 294: +#line 2886 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // Handle the short syntax @@ -5771,32 +5770,32 @@ ;} break; - case 294: -#line 2969 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 295: +#line 2970 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.InstVal) = (yyvsp[0].InstVal); CHECK_FOR_ERROR ;} break; - case 295: -#line 2974 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 296: +#line 2975 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.BoolVal) = true; CHECK_FOR_ERROR ;} break; - case 296: -#line 2978 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 297: +#line 2979 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.BoolVal) = false; CHECK_FOR_ERROR ;} break; - case 297: -#line 2985 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 298: +#line 2986 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-1].TypeVal))->getDescription()); @@ -5806,8 +5805,8 @@ ;} break; - case 298: -#line 2992 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 299: +#line 2993 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-4].TypeVal))->getDescription()); @@ -5818,8 +5817,8 @@ ;} break; - case 299: -#line 3000 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 300: +#line 3001 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-1].TypeVal))->getDescription()); @@ -5829,8 +5828,8 @@ ;} break; - case 300: -#line 3007 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 301: +#line 3008 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-4].TypeVal))->getDescription()); @@ -5841,8 +5840,8 @@ ;} break; - case 301: -#line 3015 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 302: +#line 3016 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!isa((yyvsp[0].ValueVal)->getType())) GEN_ERROR("Trying to free nonpointer type " + @@ -5852,8 +5851,8 @@ ;} break; - case 302: -#line 3023 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 303: +#line 3024 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-2].TypeVal))->getDescription()); @@ -5870,8 +5869,8 @@ ;} break; - case 303: -#line 3037 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 304: +#line 3038 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-2].TypeVal))->getDescription()); @@ -5891,8 +5890,8 @@ ;} break; - case 304: -#line 3054 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 305: +#line 3055 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-2].TypeVal))->getDescription()); @@ -5915,7 +5914,7 @@ } /* Line 1126 of yacc.c. */ -#line 5919 "llvmAsmParser.tab.c" +#line 5918 "llvmAsmParser.tab.c" yyvsp -= yylen; yyssp -= yylen; @@ -6183,7 +6182,7 @@ } -#line 3071 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 3072 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" // common code from the two 'RunVMAsmParser' functions Modified: llvm/trunk/lib/AsmParser/llvmAsmParser.y.cvs URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/llvmAsmParser.y.cvs?rev=40621&r1=40620&r2=40621&view=diff ============================================================================== --- llvm/trunk/lib/AsmParser/llvmAsmParser.y.cvs (original) +++ llvm/trunk/lib/AsmParser/llvmAsmParser.y.cvs Tue Jul 31 01:37:43 2007 @@ -1245,6 +1245,7 @@ | NOUNWIND { $$ = ParamAttr::NoUnwind; } | ZEROEXT { $$ = ParamAttr::ZExt; } | SIGNEXT { $$ = ParamAttr::SExt; } + | INREG { $$ = ParamAttr::InReg; } ; OptFuncAttrs : /* empty */ { $$ = ParamAttr::None; } From christopher.lamb at gmail.com Tue Jul 31 01:50:25 2007 From: christopher.lamb at gmail.com (Christopher Lamb) Date: Tue, 31 Jul 2007 06:50:25 -0000 Subject: [llvm-commits] [llvm-gcc-4.0] r40622 - in /llvm-gcc-4.0/trunk/gcc: llvm-backend.cpp llvm-convert.cpp llvm-internal.h llvm-types.cpp Message-ID: <200707310650.l6V6oPCJ003921@zion.cs.uiuc.edu> Author: clamb Date: Tue Jul 31 01:50:25 2007 New Revision: 40622 URL: http://llvm.org/viewvc/llvm-project?rev=40622&view=rev Log: Add support for scraping the function decl for restrict qualifiers to handle restrict function parameters for both C/C++. Thanks to Sheng Zhou for pointing the way... Modified: llvm-gcc-4.0/trunk/gcc/llvm-backend.cpp llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp llvm-gcc-4.0/trunk/gcc/llvm-internal.h llvm-gcc-4.0/trunk/gcc/llvm-types.cpp Modified: llvm-gcc-4.0/trunk/gcc/llvm-backend.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.0/trunk/gcc/llvm-backend.cpp?rev=40622&r1=40621&r2=40622&view=diff ============================================================================== --- llvm-gcc-4.0/trunk/gcc/llvm-backend.cpp (original) +++ llvm-gcc-4.0/trunk/gcc/llvm-backend.cpp Tue Jul 31 01:50:25 2007 @@ -988,7 +988,7 @@ if (FnEntry == 0) { unsigned CC; const FunctionType *Ty = - TheTypeConverter->ConvertFunctionType(TREE_TYPE(decl), NULL, CC); + TheTypeConverter->ConvertFunctionType(TREE_TYPE(decl), decl, NULL, CC); FnEntry = new Function(Ty, Function::ExternalLinkage, Name, TheModule); FnEntry->setCallingConv(CC); Modified: llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp?rev=40622&r1=40621&r2=40622&view=diff ============================================================================== --- llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp (original) +++ llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp Tue Jul 31 01:50:25 2007 @@ -514,8 +514,9 @@ } else { // Otherwise, just get the type from the function itself. FTy = TheTypeConverter->ConvertFunctionType(TREE_TYPE(FnDecl), - static_chain, - CallingConv); + FnDecl, + static_chain, + CallingConv); } // If we've already seen this function and created a prototype, and if the @@ -2546,6 +2547,7 @@ unsigned CallingConv; const Type *Ty = TheTypeConverter->ConvertFunctionType(function_type, + fndecl, static_chain, CallingConv); Callee = CastToType(Instruction::BitCast, Callee, PointerType::get(Ty)); Modified: llvm-gcc-4.0/trunk/gcc/llvm-internal.h URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.0/trunk/gcc/llvm-internal.h?rev=40622&r1=40621&r2=40622&view=diff ============================================================================== --- llvm-gcc-4.0/trunk/gcc/llvm-internal.h (original) +++ llvm-gcc-4.0/trunk/gcc/llvm-internal.h Tue Jul 31 01:50:25 2007 @@ -139,6 +139,7 @@ /// tree to an LLVM type. This does the same thing that ConvertType does, but /// it also returns the function's LLVM calling convention. const FunctionType *ConvertFunctionType(tree_node *type, + tree_node *decl, tree_node *static_chain, unsigned &CallingConv); Modified: llvm-gcc-4.0/trunk/gcc/llvm-types.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.0/trunk/gcc/llvm-types.cpp?rev=40622&r1=40621&r2=40622&view=diff ============================================================================== --- llvm-gcc-4.0/trunk/gcc/llvm-types.cpp (original) +++ llvm-gcc-4.0/trunk/gcc/llvm-types.cpp Tue Jul 31 01:50:25 2007 @@ -785,7 +785,7 @@ return Ty; unsigned CallingConv; - return TypeDB.setType(type, ConvertFunctionType(type, NULL, CallingConv)); + return TypeDB.setType(type, ConvertFunctionType(type, orig_type, NULL, CallingConv)); } case ARRAY_TYPE: { if (const Type *Ty = GET_TYPE_LLVM(type)) @@ -927,6 +927,7 @@ } const FunctionType *TypeConverter::ConvertFunctionType(tree type, + tree decl, tree static_chain, unsigned &CallingConv) { const Type *RetTy = 0; @@ -979,6 +980,7 @@ // Loop over all of the arguments, adding them as we go. tree Args = TYPE_ARG_TYPES(type); + tree DeclArgs = DECL_ARGUMENTS(decl); for (; Args && TREE_VALUE(Args) != void_type_node; Args = TREE_CHAIN(Args)){ tree ArgTy = TREE_VALUE(Args); if (!isPassedByInvisibleReference(ArgTy) && @@ -1012,8 +1014,11 @@ } // Compute noalias attributes. - if (TREE_CODE(ArgTy) == POINTER_TYPE || TREE_CODE(ArgTy) == REFERENCE_TYPE) - if (TYPE_RESTRICT(ArgTy)) + tree RestrictArgTy = (DeclArgs) ? DeclArgs->type.common.type : ArgTy; + RestrictArgTy = (RestrictArgTy) ? RestrictArgTy : ArgTy; + if (TREE_CODE(RestrictArgTy) == POINTER_TYPE || + TREE_CODE(RestrictArgTy) == REFERENCE_TYPE) + if (TYPE_RESTRICT(RestrictArgTy)) Attributes |= ParamAttr::NoAlias; #ifdef LLVM_TARGET_ENABLE_REGPARM @@ -1026,6 +1031,9 @@ if (Attributes != ParamAttr::None) Attrs.push_back(ParamAttrsWithIndex::get(ArgTypes.size(), Attributes)); + + if (DeclArgs) + DeclArgs = TREE_CHAIN(DeclArgs); } // If the argument list ends with a void type node, it isn't vararg. From christopher.lamb at gmail.com Tue Jul 31 02:03:25 2007 From: christopher.lamb at gmail.com (Christopher Lamb) Date: Tue, 31 Jul 2007 07:03:25 -0000 Subject: [llvm-commits] [llvm] r40623 - in /llvm/trunk/test/C++Frontend: 2007-07-29-RestrictPtrArg.cpp 2007-07-29-RestrictRefArg.cpp Message-ID: <200707310703.l6V73PBp004946@zion.cs.uiuc.edu> Author: clamb Date: Tue Jul 31 02:03:24 2007 New Revision: 40623 URL: http://llvm.org/viewvc/llvm-project?rev=40623&view=rev Log: Un-XFAIL these tests after r40622 fixed them. Modified: llvm/trunk/test/C++Frontend/2007-07-29-RestrictPtrArg.cpp llvm/trunk/test/C++Frontend/2007-07-29-RestrictRefArg.cpp Modified: llvm/trunk/test/C++Frontend/2007-07-29-RestrictPtrArg.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/C%2B%2BFrontend/2007-07-29-RestrictPtrArg.cpp?rev=40623&r1=40622&r2=40623&view=diff ============================================================================== --- llvm/trunk/test/C++Frontend/2007-07-29-RestrictPtrArg.cpp (original) +++ llvm/trunk/test/C++Frontend/2007-07-29-RestrictPtrArg.cpp Tue Jul 31 02:03:24 2007 @@ -1,5 +1,4 @@ // RUN: %llvmgxx -c -emit-llvm %s -o - | llvm-dis | grep noalias -// XFAIL: i[1-9]86|alpha|ia64|arm|x86_64|amd64 // NOTE: This should be un-XFAILed when the C++ type qualifiers are fixed void foo(int * __restrict myptr1, int * myptr2) { Modified: llvm/trunk/test/C++Frontend/2007-07-29-RestrictRefArg.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/C%2B%2BFrontend/2007-07-29-RestrictRefArg.cpp?rev=40623&r1=40622&r2=40623&view=diff ============================================================================== --- llvm/trunk/test/C++Frontend/2007-07-29-RestrictRefArg.cpp (original) +++ llvm/trunk/test/C++Frontend/2007-07-29-RestrictRefArg.cpp Tue Jul 31 02:03:24 2007 @@ -1,5 +1,4 @@ // RUN: %llvmgxx -c -emit-llvm %s -o - | llvm-dis | grep noalias -// XFAIL: i[1-9]86|alpha|ia64|arm|x86_64|amd64 // NOTE: This should be un-XFAILed when the C++ type qualifiers are fixed void foo(int & __restrict myptr1, int & myptr2) { From christopher.lamb at gmail.com Tue Jul 31 02:04:51 2007 From: christopher.lamb at gmail.com (Christopher Lamb) Date: Tue, 31 Jul 2007 07:04:51 -0000 Subject: [llvm-commits] [llvm] r40624 - in /llvm/trunk: lib/Analysis/BasicAliasAnalysis.cpp test/Analysis/BasicAA/2007-07-31-NoAliasTest.ll Message-ID: <200707310704.l6V74p8Z004985@zion.cs.uiuc.edu> Author: clamb Date: Tue Jul 31 02:04:51 2007 New Revision: 40624 URL: http://llvm.org/viewvc/llvm-project?rev=40624&view=rev Log: Teach BasicAA about noalias function parameters. Passes all of DejaGNU and test-suite. Added: llvm/trunk/test/Analysis/BasicAA/2007-07-31-NoAliasTest.ll Modified: llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp Modified: llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp?rev=40624&r1=40623&r2=40624&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp (original) +++ llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp Tue Jul 31 02:04:51 2007 @@ -18,6 +18,7 @@ #include "llvm/Constants.h" #include "llvm/DerivedTypes.h" #include "llvm/Function.h" +#include "llvm/ParameterAttributes.h" #include "llvm/GlobalVariable.h" #include "llvm/Instructions.h" #include "llvm/Pass.h" @@ -294,6 +295,21 @@ // Pointing at a discernible object? if (O1) { + // Check for noalias attribute + if (isa(O1)) { + const Argument *Arg = cast(O1); + const Function *Func = Arg->getParent(); + const ParamAttrsList *Attr = Func->getFunctionType()->getParamAttrs(); + if (Attr) { + unsigned Idx = 1; + for (Function::const_arg_iterator I = Func->arg_begin(), + E = Func->arg_end(); I != E; ++I, ++Idx) { + if (&(*I) == Arg && + Attr->paramHasAttr(Idx, ParamAttr::NoAlias)) + return NoAlias; + } + } + } if (O2) { if (isa(O1)) { // Incoming argument cannot alias locally allocated object! @@ -307,7 +323,22 @@ // If they are two different objects, we know that we have no alias... return NoAlias; } - + + // Check for noalias atrribute independently from above logic + if (isa(O2)) { + const Argument *Arg = cast(O2); + const Function *Func = Arg->getParent(); + const ParamAttrsList *Attr = Func->getFunctionType()->getParamAttrs(); + if (Attr) { + unsigned Idx = 1; + for (Function::const_arg_iterator I = Func->arg_begin(), + E = Func->arg_end(); I != E; ++I, ++Idx) { + if (&(*I) == Arg && + Attr->paramHasAttr(Idx, ParamAttr::NoAlias)) + return NoAlias; + } + } + } // If they are the same object, they we can look at the indexes. If they // index off of the object is the same for both pointers, they must alias. // If they are provably different, they must not alias. Otherwise, we Added: llvm/trunk/test/Analysis/BasicAA/2007-07-31-NoAliasTest.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/BasicAA/2007-07-31-NoAliasTest.ll?rev=40624&view=auto ============================================================================== --- llvm/trunk/test/Analysis/BasicAA/2007-07-31-NoAliasTest.ll (added) +++ llvm/trunk/test/Analysis/BasicAA/2007-07-31-NoAliasTest.ll Tue Jul 31 02:04:51 2007 @@ -0,0 +1,12 @@ +; RUN: llvm-as %s -o - | opt -aa-eval -print-may-aliases -disable-output |& grep '1 may alias' +; RUN: llvm-as %s -o - | opt -aa-eval -print-may-aliases -disable-output |& grep '5 no alias' +; RUN: llvm-as %s -o - | opt -aa-eval -print-may-aliases -disable-output |& grep 'MayAlias: i32* %ptr4, i32* %ptr2' + +define void @_Z3fooPiS_RiS_(i32* noalias %ptr1, i32* %ptr2, i32* noalias %ptr3, i32* %ptr4) { +entry: + store i32 0, i32* %ptr1 + store i32 0, i32* %ptr2 + store i32 0, i32* %ptr3 + store i32 0, i32* %ptr4 + ret void +} \ No newline at end of file From dpatel at apple.com Tue Jul 31 03:00:58 2007 From: dpatel at apple.com (Devang Patel) Date: Tue, 31 Jul 2007 08:00:58 -0000 Subject: [llvm-commits] [llvm] r40625 - in /llvm/trunk: include/llvm/Analysis/LoopPass.h lib/Analysis/LoopPass.cpp Message-ID: <200707310800.l6V80wFZ007353@zion.cs.uiuc.edu> Author: dpatel Date: Tue Jul 31 03:00:57 2007 New Revision: 40625 URL: http://llvm.org/viewvc/llvm-project?rev=40625&view=rev Log: Introduce Simple Analysis interface for loop passes. Right now, this interface provides hooks for only to operations, 1) clone basic block 2) delete value. Modified: llvm/trunk/include/llvm/Analysis/LoopPass.h llvm/trunk/lib/Analysis/LoopPass.cpp Modified: llvm/trunk/include/llvm/Analysis/LoopPass.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/LoopPass.h?rev=40625&r1=40624&r2=40625&view=diff ============================================================================== --- llvm/trunk/include/llvm/Analysis/LoopPass.h (original) +++ llvm/trunk/include/llvm/Analysis/LoopPass.h Tue Jul 31 03:00:57 2007 @@ -63,6 +63,21 @@ virtual PassManagerType getPotentialPassManagerType() const { return PMT_LoopPassManager; } + + //===--------------------------------------------------------------------===// + /// SimpleAnalysis - Provides simple interface to update analysis info + /// maintained by various passes. Note, if required this interface can + /// be extracted into a separate abstract class but it would require + /// additional use of multiple inheritance in Pass class hierarcy, someting + /// we are trying to avoid. + + /// Each loop pass can override these simple analysis hookss to update + /// desired analysis information. + /// cloneBasicBlockAnalysis - Clone analysis info associated with basic block. + virtual void cloneBasicBlockAnalysis(BasicBlock *F, BasicBlock *T, Loop *L) {} + + /// deletekAnalysisValue - Delete analysis info associated with value V. + virtual void deleteAnalysisValue(Value *V, Loop *L) {} }; class LPPassManager : public FunctionPass, public PMDataManager { @@ -115,6 +130,20 @@ // utility may send LPPassManager into infinite loops so use caution. void redoLoop(Loop *L); + //===--------------------------------------------------------------------===// + /// SimpleAnalysis - Provides simple interface to update analysis info + /// maintained by various passes. Note, if required this interface can + /// be extracted into a separate abstract class but it would require + /// additional use of multiple inheritance in Pass class hierarcy, someting + /// we are trying to avoid. + + /// cloneBasicBlockSimpleAnalysis - Invoke cloneBasicBlockAnalysis hook for + /// all passes that implement simple analysis interface. + void cloneBasicBlockSimpleAnalysis(BasicBlock *From, BasicBlock *To, Loop *L); + + /// deleteSimpleAnalysisValue - Invoke deleteAnalysisValue hook for all passes + /// that implement simple analysis interface. + void deleteSimpleAnalysisValue(Value *V, Loop *L); private: std::deque LQ; bool skipThisLoop; Modified: llvm/trunk/lib/Analysis/LoopPass.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/LoopPass.cpp?rev=40625&r1=40624&r2=40625&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/LoopPass.cpp (original) +++ llvm/trunk/lib/Analysis/LoopPass.cpp Tue Jul 31 03:00:57 2007 @@ -140,6 +140,27 @@ redoThisLoop = true; } +/// cloneBasicBlockSimpleAnalysis - Invoke cloneBasicBlockAnalysis hook for +/// all loop passes. +void LPPassManager::cloneBasicBlockSimpleAnalysis(BasicBlock *From, + BasicBlock *To, Loop *L) { + for (unsigned Index = 0; Index < getNumContainedPasses(); ++Index) { + Pass *P = getContainedPass(Index); + LoopPass *LP = dynamic_cast(P); + LP->cloneBasicBlockAnalysis(From, To, L); + } +} + +/// deleteSimpleAnalysisValue - Invoke deleteAnalysisValue hook for all passes. +void LPPassManager::deleteSimpleAnalysisValue(Value *V, Loop *L) { + for (unsigned Index = 0; Index < getNumContainedPasses(); ++Index) { + Pass *P = getContainedPass(Index); + LoopPass *LP = dynamic_cast(P); + LP->deleteAnalysisValue(V, L); + } +} + + // Recurse through all subloops and all loops into LQ. static void addLoopIntoQueue(Loop *L, std::deque &LQ) { LQ.push_back(L); From dpatel at apple.com Tue Jul 31 03:01:41 2007 From: dpatel at apple.com (Devang Patel) Date: Tue, 31 Jul 2007 08:01:41 -0000 Subject: [llvm-commits] [llvm] r40626 - /llvm/trunk/lib/Transforms/Scalar/LICM.cpp Message-ID: <200707310801.l6V81fkT007401@zion.cs.uiuc.edu> Author: dpatel Date: Tue Jul 31 03:01:41 2007 New Revision: 40626 URL: http://llvm.org/viewvc/llvm-project?rev=40626&view=rev Log: Implement Simple Analysis interfaces - cloneBasicBlockAnalysis and deleteAnalysisValue. Modified: llvm/trunk/lib/Transforms/Scalar/LICM.cpp Modified: llvm/trunk/lib/Transforms/Scalar/LICM.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LICM.cpp?rev=40626&r1=40625&r2=40626&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/LICM.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/LICM.cpp Tue Jul 31 03:01:41 2007 @@ -102,6 +102,13 @@ AliasSetTracker *CurAST; // AliasSet information for the current loop... std::map LoopToAliasMap; + /// cloneBasicBlockAnalysis - Simple Analysis hook. Clone alias set info. + void cloneBasicBlockAnalysis(BasicBlock *From, BasicBlock *To, Loop *L); + + /// deleteAnalysisValue - Simple Analysis hook. Delete value V from alias + /// set. + void deleteAnalysisValue(Value *V, Loop *L); + /// SinkRegion - Walk the specified region of the CFG (defined by all blocks /// dominated by the specified block, and that are in the current loop) in /// reverse depth first order w.r.t the DominatorTree. This allows us to @@ -798,3 +805,22 @@ } } } + +/// cloneBasicBlockAnalysis - Simple Analysis hook. Clone alias set info. +void LICM::cloneBasicBlockAnalysis(BasicBlock *From, BasicBlock *To, Loop *L) { + AliasSetTracker *AST = LoopToAliasMap[L]; + if (!AST) + return; + + AST->copyValue(From, To); +} + +/// deleteAnalysisValue - Simple Analysis hook. Delete value V from alias +/// set. +void LICM::deleteAnalysisValue(Value *V, Loop *L) { + AliasSetTracker *AST = LoopToAliasMap[L]; + if (!AST) + return; + + AST->deleteValue(V); +} From dpatel at apple.com Tue Jul 31 03:03:27 2007 From: dpatel at apple.com (Devang Patel) Date: Tue, 31 Jul 2007 08:03:27 -0000 Subject: [llvm-commits] [llvm] r40627 - /llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp Message-ID: <200707310803.l6V83Rim007494@zion.cs.uiuc.edu> Author: dpatel Date: Tue Jul 31 03:03:26 2007 New Revision: 40627 URL: http://llvm.org/viewvc/llvm-project?rev=40627&view=rev Log: Loop unswitch preserves dom info. Use simple analysis interface to preserve analysis info maintained by other loop passes. Modified: llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp Modified: llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp?rev=40627&r1=40626&r2=40627&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp Tue Jul 31 03:03:26 2007 @@ -88,9 +88,13 @@ AU.addRequired(); AU.addPreserved(); AU.addRequiredID(LCSSAID); + AU.addPreservedID(LCSSAID); + AU.addPreserved(); + AU.addPreserved(); } private: + /// RemoveLoopFromWorklist - If the specified loop is on the loop worklist, /// remove it. void RemoveLoopFromWorklist(Loop *L) { @@ -114,9 +118,9 @@ BasicBlock *FalseDest, Instruction *InsertPt); - void SimplifyCode(std::vector &Worklist); + void SimplifyCode(std::vector &Worklist, Loop *L); void RemoveBlockIfDead(BasicBlock *BB, - std::vector &Worklist); + std::vector &Worklist, Loop *l); void RemoveLoopFromHierarchy(Loop *L); }; char LoopUnswitch::ID = 0; @@ -588,6 +592,7 @@ EmitPreheaderBranchOnCondition(Cond, Val, NewExit, NewPH, OrigPH->getTerminator()); OrigPH->getTerminator()->eraseFromParent(); + LPM->deleteSimpleAnalysisValue(OrigPH->getTerminator(), L); // We need to reprocess this loop, it could be unswitched again. redoLoop = true; @@ -690,6 +695,7 @@ BasicBlock *New = CloneBasicBlock(LoopBlocks[i], ValueMap, ".us", F); NewBlocks.push_back(New); ValueMap[LoopBlocks[i]] = New; // Keep the BB mapping. + LPM->cloneBasicBlockSimpleAnalysis(LoopBlocks[i], New, L); } // Update dominator info @@ -752,6 +758,7 @@ // Emit the new branch that selects between the two versions of this loop. EmitPreheaderBranchOnCondition(LIC, Val, NewBlocks[0], LoopBlocks[0], OldBR); OldBR->eraseFromParent(); + LPM->deleteSimpleAnalysisValue(OldBR, L); LoopProcessWorklist.push_back(NewLoop); redoLoop = true; @@ -782,7 +789,8 @@ /// ReplaceUsesOfWith - When we find that I really equals V, remove I from the /// program, replacing all uses with V and update the worklist. static void ReplaceUsesOfWith(Instruction *I, Value *V, - std::vector &Worklist) { + std::vector &Worklist, + Loop *L, LPPassManager *LPM) { DOUT << "Replace with '" << *V << "': " << *I; // Add uses to the worklist, which may be dead now. @@ -796,6 +804,7 @@ Worklist.push_back(cast(*UI)); I->replaceAllUsesWith(V); I->eraseFromParent(); + LPM->deleteSimpleAnalysisValue(I, L); RemoveFromWorklist(I, Worklist); ++NumSimplify; } @@ -804,7 +813,8 @@ /// information, and remove any dead successors it has. /// void LoopUnswitch::RemoveBlockIfDead(BasicBlock *BB, - std::vector &Worklist) { + std::vector &Worklist, + Loop *L) { if (pred_begin(BB) != pred_end(BB)) { // This block isn't dead, since an edge to BB was just removed, see if there // are any easy simplifications we can do now. @@ -813,7 +823,7 @@ while (isa(BB->begin())) ReplaceUsesOfWith(BB->begin(), cast(BB->begin())->getIncomingValue(0), - Worklist); + Worklist, L, LPM); // If this is the header of a loop and the only pred is the latch, we now // have an unreachable loop. @@ -823,13 +833,14 @@ // the header dead, which will make the latch dead (because the header // dominates the latch). Pred->getTerminator()->eraseFromParent(); + LPM->deleteSimpleAnalysisValue(Pred->getTerminator(), L); new UnreachableInst(Pred); // The loop is now broken, remove it from LI. RemoveLoopFromHierarchy(L); // Reprocess the header, which now IS dead. - RemoveBlockIfDead(BB, Worklist); + RemoveBlockIfDead(BB, Worklist, L); return; } @@ -880,7 +891,7 @@ // Remove the basic block, including all of the instructions contained in it. BB->eraseFromParent(); - + LPM->deleteSimpleAnalysisValue(BB, L); // Remove successor blocks here that are not dead, so that we know we only // have dead blocks in this list. Nondead blocks have a way of becoming dead, // then getting removed before we revisit them, which is badness. @@ -899,7 +910,7 @@ } for (unsigned i = 0, e = Succs.size(); i != e; ++i) - RemoveBlockIfDead(Succs[i], Worklist); + RemoveBlockIfDead(Succs[i], Worklist, L); } /// RemoveLoopFromHierarchy - We have discovered that the specified loop has @@ -1004,7 +1015,7 @@ } } - SimplifyCode(Worklist); + SimplifyCode(Worklist, L); } /// SimplifyCode - Okay, now that we have simplified some instructions in the @@ -1016,14 +1027,14 @@ /// FIXME: When the loop optimizer is more mature, separate this out to a new /// pass. /// -void LoopUnswitch::SimplifyCode(std::vector &Worklist) { +void LoopUnswitch::SimplifyCode(std::vector &Worklist, Loop *L) { while (!Worklist.empty()) { Instruction *I = Worklist.back(); Worklist.pop_back(); // Simple constant folding. if (Constant *C = ConstantFoldInstruction(I)) { - ReplaceUsesOfWith(I, C, Worklist); + ReplaceUsesOfWith(I, C, Worklist, L, LPM); continue; } @@ -1036,6 +1047,7 @@ if (Instruction *Use = dyn_cast(I->getOperand(i))) Worklist.push_back(Use); I->eraseFromParent(); + LPM->deleteSimpleAnalysisValue(I, L); RemoveFromWorklist(I, Worklist); ++NumSimplify; continue; @@ -1045,7 +1057,7 @@ switch (I->getOpcode()) { case Instruction::Select: if (ConstantInt *CB = dyn_cast(I->getOperand(0))) { - ReplaceUsesOfWith(I, I->getOperand(!CB->getZExtValue()+1), Worklist); + ReplaceUsesOfWith(I, I->getOperand(!CB->getZExtValue()+1), Worklist, L, LPM); continue; } break; @@ -1056,9 +1068,9 @@ if (ConstantInt *CB = dyn_cast(I->getOperand(1))) if (CB->getType() == Type::Int1Ty) { if (CB->isOne()) // X & 1 -> X - ReplaceUsesOfWith(I, I->getOperand(0), Worklist); + ReplaceUsesOfWith(I, I->getOperand(0), Worklist, L, LPM); else // X & 0 -> 0 - ReplaceUsesOfWith(I, I->getOperand(1), Worklist); + ReplaceUsesOfWith(I, I->getOperand(1), Worklist, L, LPM); continue; } break; @@ -1069,9 +1081,9 @@ if (ConstantInt *CB = dyn_cast(I->getOperand(1))) if (CB->getType() == Type::Int1Ty) { if (CB->isOne()) // X | 1 -> 1 - ReplaceUsesOfWith(I, I->getOperand(1), Worklist); + ReplaceUsesOfWith(I, I->getOperand(1), Worklist, L, LPM); else // X | 0 -> X - ReplaceUsesOfWith(I, I->getOperand(0), Worklist); + ReplaceUsesOfWith(I, I->getOperand(0), Worklist, L, LPM); continue; } break; @@ -1091,12 +1103,13 @@ // Resolve any single entry PHI nodes in Succ. while (PHINode *PN = dyn_cast(Succ->begin())) - ReplaceUsesOfWith(PN, PN->getIncomingValue(0), Worklist); + ReplaceUsesOfWith(PN, PN->getIncomingValue(0), Worklist, L, LPM); // Move all of the successor contents from Succ to Pred. Pred->getInstList().splice(BI, Succ->getInstList(), Succ->begin(), Succ->end()); BI->eraseFromParent(); + LPM->deleteSimpleAnalysisValue(BI, L); RemoveFromWorklist(BI, Worklist); // If Succ has any successors with PHI nodes, update them to have @@ -1106,6 +1119,7 @@ // Remove Succ from the loop tree. LI->removeBlock(Succ); Succ->eraseFromParent(); + LPM->deleteSimpleAnalysisValue(Succ, L); ++NumSimplify; } else if (ConstantInt *CB = dyn_cast(BI->getCondition())){ // Conditional branch. Turn it into an unconditional branch, then @@ -1118,10 +1132,11 @@ DeadSucc->removePredecessor(BI->getParent(), true); Worklist.push_back(new BranchInst(LiveSucc, BI)); BI->eraseFromParent(); + LPM->deleteSimpleAnalysisValue(BI, L); RemoveFromWorklist(BI, Worklist); ++NumSimplify; - RemoveBlockIfDead(DeadSucc, Worklist); + RemoveBlockIfDead(DeadSucc, Worklist, L); } break; } From evan.cheng at apple.com Tue Jul 31 03:04:04 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 31 Jul 2007 08:04:04 -0000 Subject: [llvm-commits] [llvm] r40628 - in /llvm/trunk: lib/Target/X86/X86InstrFPStack.td lib/Target/X86/X86InstrFormats.td lib/Target/X86/X86InstrInfo.td lib/Target/X86/X86InstrMMX.td lib/Target/X86/X86InstrSSE.td lib/Target/X86/X86InstrX86-64.td test/CodeGen/X86/2007-07-31-VInsertBug.ll Message-ID: <200707310804.l6V844EB007549@zion.cs.uiuc.edu> Author: evancheng Date: Tue Jul 31 03:04:03 2007 New Revision: 40628 URL: http://llvm.org/viewvc/llvm-project?rev=40628&view=rev Log: Redo and generalize previously removed opt for pinsrw: (vextract (v4i32 bc (v4f32 s2v (f32 load ))), 0) -> (i32 load ) Added: llvm/trunk/lib/Target/X86/X86InstrFormats.td llvm/trunk/test/CodeGen/X86/2007-07-31-VInsertBug.ll Modified: llvm/trunk/lib/Target/X86/X86InstrFPStack.td llvm/trunk/lib/Target/X86/X86InstrInfo.td llvm/trunk/lib/Target/X86/X86InstrMMX.td llvm/trunk/lib/Target/X86/X86InstrSSE.td llvm/trunk/lib/Target/X86/X86InstrX86-64.td Modified: llvm/trunk/lib/Target/X86/X86InstrFPStack.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrFPStack.td?rev=40628&r1=40627&r2=40628&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrFPStack.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrFPStack.td Tue Jul 31 03:04:03 2007 @@ -119,17 +119,6 @@ // a pattern) and the FPI instruction should have emission info (e.g. opcode // encoding and asm printing info). -// FPI - Floating Point Instruction template. -class FPI o, Format F, dag outs, dag ins, string asm> - : I {} - -// FpI_ - Floating Point Psuedo Instruction template. Not Predicated. -class FpI_ pattern> - : X86Inst<0, Pseudo, NoImm, outs, ins, ""> { - let FPForm = fp; let FPFormBits = FPForm.Value; - let Pattern = pattern; -} - // Random Pseudo Instructions. def FpGETRESULT32 : FpI_<(outs RFP32:$dst), (ins), SpecialFP, [(set RFP32:$dst, X86fpget)]>; // FPR = ST(0) Added: llvm/trunk/lib/Target/X86/X86InstrFormats.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrFormats.td?rev=40628&view=auto ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrFormats.td (added) +++ llvm/trunk/lib/Target/X86/X86InstrFormats.td Tue Jul 31 03:04:03 2007 @@ -0,0 +1,232 @@ +//===- X86InstrFormats.td - X86 Instruction Formats --------*- tablegen -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file was developed by the LLVM research group and is distributed under +// the University of Illinois Open Source License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +//===----------------------------------------------------------------------===// +// X86 Instruction Format Definitions. +// + +// Format specifies the encoding used by the instruction. This is part of the +// ad-hoc solution used to emit machine instruction encodings by our machine +// code emitter. +class Format val> { + bits<6> Value = val; +} + +def Pseudo : Format<0>; def RawFrm : Format<1>; +def AddRegFrm : Format<2>; def MRMDestReg : Format<3>; +def MRMDestMem : Format<4>; def MRMSrcReg : Format<5>; +def MRMSrcMem : Format<6>; +def MRM0r : Format<16>; def MRM1r : Format<17>; def MRM2r : Format<18>; +def MRM3r : Format<19>; def MRM4r : Format<20>; def MRM5r : Format<21>; +def MRM6r : Format<22>; def MRM7r : Format<23>; +def MRM0m : Format<24>; def MRM1m : Format<25>; def MRM2m : Format<26>; +def MRM3m : Format<27>; def MRM4m : Format<28>; def MRM5m : Format<29>; +def MRM6m : Format<30>; def MRM7m : Format<31>; +def MRMInitReg : Format<32>; + + +// ImmType - This specifies the immediate type used by an instruction. This is +// part of the ad-hoc solution used to emit machine instruction encodings by our +// machine code emitter. +class ImmType val> { + bits<3> Value = val; +} +def NoImm : ImmType<0>; +def Imm8 : ImmType<1>; +def Imm16 : ImmType<2>; +def Imm32 : ImmType<3>; +def Imm64 : ImmType<4>; + +// FPFormat - This specifies what form this FP instruction has. This is used by +// the Floating-Point stackifier pass. +class FPFormat val> { + bits<3> Value = val; +} +def NotFP : FPFormat<0>; +def ZeroArgFP : FPFormat<1>; +def OneArgFP : FPFormat<2>; +def OneArgFPRW : FPFormat<3>; +def TwoArgFP : FPFormat<4>; +def CompareFP : FPFormat<5>; +def CondMovFP : FPFormat<6>; +def SpecialFP : FPFormat<7>; + +// Prefix byte classes which are used to indicate to the ad-hoc machine code +// emitter that various prefix bytes are required. +class OpSize { bit hasOpSizePrefix = 1; } +class AdSize { bit hasAdSizePrefix = 1; } +class REX_W { bit hasREX_WPrefix = 1; } +class TB { bits<4> Prefix = 1; } +class REP { bits<4> Prefix = 2; } +class D8 { bits<4> Prefix = 3; } +class D9 { bits<4> Prefix = 4; } +class DA { bits<4> Prefix = 5; } +class DB { bits<4> Prefix = 6; } +class DC { bits<4> Prefix = 7; } +class DD { bits<4> Prefix = 8; } +class DE { bits<4> Prefix = 9; } +class DF { bits<4> Prefix = 10; } +class XD { bits<4> Prefix = 11; } +class XS { bits<4> Prefix = 12; } +class T8 { bits<4> Prefix = 13; } +class TA { bits<4> Prefix = 14; } + +class X86Inst opcod, Format f, ImmType i, dag outs, dag ins, + string AsmStr> + : Instruction { + let Namespace = "X86"; + + bits<8> Opcode = opcod; + Format Form = f; + bits<6> FormBits = Form.Value; + ImmType ImmT = i; + bits<3> ImmTypeBits = ImmT.Value; + + dag OutOperandList = outs; + dag InOperandList = ins; + string AsmString = AsmStr; + + // + // Attributes specific to X86 instructions... + // + bit hasOpSizePrefix = 0; // Does this inst have a 0x66 prefix? + bit hasAdSizePrefix = 0; // Does this inst have a 0x67 prefix? + + bits<4> Prefix = 0; // Which prefix byte does this inst have? + bit hasREX_WPrefix = 0; // Does this inst requires the REX.W prefix? + FPFormat FPForm; // What flavor of FP instruction is this? + bits<3> FPFormBits = 0; +} + +class I o, Format f, dag outs, dag ins, string asm, list pattern> + : X86Inst { + let Pattern = pattern; + let CodeSize = 3; +} +class Ii8 o, Format f, dag outs, dag ins, string asm, list pattern> + : X86Inst { + let Pattern = pattern; + let CodeSize = 3; +} +class Ii16 o, Format f, dag outs, dag ins, string asm, list pattern> + : X86Inst { + let Pattern = pattern; + let CodeSize = 3; +} +class Ii32 o, Format f, dag outs, dag ins, string asm, list pattern> + : X86Inst { + let Pattern = pattern; + let CodeSize = 3; +} + +// FPStack Instruction Templates: +// FPI - Floating Point Instruction template. +class FPI o, Format F, dag outs, dag ins, string asm> + : I {} + +// FpI_ - Floating Point Psuedo Instruction template. Not Predicated. +class FpI_ pattern> + : X86Inst<0, Pseudo, NoImm, outs, ins, ""> { + let FPForm = fp; let FPFormBits = FPForm.Value; + let Pattern = pattern; +} + +// SSE1 Instruction Templates: +// +// SSI - SSE1 instructions with XS prefix. +// PSI - SSE1 instructions with TB prefix. +// PSIi8 - SSE1 instructions with ImmT == Imm8 and TB prefix. + +class SSI o, Format F, dag outs, dag ins, string asm, list pattern> + : I, XS, Requires<[HasSSE1]>; +class PSI o, Format F, dag outs, dag ins, string asm, list pattern> + : I, TB, Requires<[HasSSE1]>; +class PSIi8 o, Format F, dag outs, dag ins, string asm, + list pattern> + : Ii8, TB, Requires<[HasSSE1]>; + +// SSE2 Instruction Templates: +// +// SDI - SSE2 instructions with XD prefix. +// PDI - SSE2 instructions with TB and OpSize prefixes. +// PDIi8 - SSE2 instructions with ImmT == Imm8 and TB and OpSize prefixes. + +class SDI o, Format F, dag outs, dag ins, string asm, list pattern> + : I, XD, Requires<[HasSSE2]>; +class PDI o, Format F, dag outs, dag ins, string asm, list pattern> + : I, TB, OpSize, Requires<[HasSSE2]>; +class PDIi8 o, Format F, dag outs, dag ins, string asm, + list pattern> + : Ii8, TB, OpSize, Requires<[HasSSE2]>; + +// SSE3 Instruction Templates: +// +// S3I - SSE3 instructions with TB and OpSize prefixes. +// S3SI - SSE3 instructions with XS prefix. +// S3DI - SSE3 instructions with XD prefix. + +class S3SI o, Format F, dag outs, dag ins, string asm, list pattern> + : I, XS, Requires<[HasSSE3]>; +class S3DI o, Format F, dag outs, dag ins, string asm, list pattern> + : I, XD, Requires<[HasSSE3]>; +class S3I o, Format F, dag outs, dag ins, string asm, list pattern> + : I, TB, OpSize, Requires<[HasSSE3]>; + + +// X86-64 Instruction templates... +// + +class RI o, Format F, dag outs, dag ins, string asm, list pattern> + : I, REX_W; +class RIi8 o, Format F, dag outs, dag ins, string asm, + list pattern> + : Ii8, REX_W; +class RIi32 o, Format F, dag outs, dag ins, string asm, + list pattern> + : Ii32, REX_W; + +class RIi64 o, Format f, dag outs, dag ins, string asm, + list pattern> + : X86Inst, REX_W { + let Pattern = pattern; + let CodeSize = 3; +} + +class RSSI o, Format F, dag outs, dag ins, string asm, + list pattern> + : SSI, REX_W; +class RSDI o, Format F, dag outs, dag ins, string asm, + list pattern> + : SDI, REX_W; +class RPDI o, Format F, dag outs, dag ins, string asm, + list pattern> + : PDI, REX_W; + +// MMX Instruction templates +// + +// MMXI - MMX instructions with TB prefix. +// MMX2I - MMX / SSE2 instructions with TB and OpSize prefixes. +// MMXIi8 - MMX instructions with ImmT == Imm8 and TB prefix. +// MMXIi8 - MMX instructions with ImmT == Imm8 and TB prefix. +// MMXID - MMX instructions with XD prefix. +// MMXIS - MMX instructions with XS prefix. +class MMXI o, Format F, dag outs, dag ins, string asm, list pattern> + : I, TB, Requires<[HasMMX]>; +class MMXRI o, Format F, dag outs, dag ins, string asm, list pattern> + : I, TB, REX_W, Requires<[HasMMX]>; +class MMX2I o, Format F, dag outs, dag ins, string asm, list pattern> + : I, TB, OpSize, Requires<[HasMMX]>; +class MMXIi8 o, Format F, dag outs, dag ins, string asm, list pattern> + : Ii8, TB, Requires<[HasMMX]>; +class MMXID o, Format F, dag outs, dag ins, string asm, list pattern> + : Ii8, XD, Requires<[HasMMX]>; +class MMXIS o, Format F, dag outs, dag ins, string asm, list pattern> + : Ii8, XS, Requires<[HasMMX]>; + Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=40628&r1=40627&r2=40628&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Tue Jul 31 03:04:03 2007 @@ -153,29 +153,6 @@ [add, mul, shl, or, frameindex], []>; //===----------------------------------------------------------------------===// -// X86 Instruction Format Definitions. -// - -// Format specifies the encoding used by the instruction. This is part of the -// ad-hoc solution used to emit machine instruction encodings by our machine -// code emitter. -class Format val> { - bits<6> Value = val; -} - -def Pseudo : Format<0>; def RawFrm : Format<1>; -def AddRegFrm : Format<2>; def MRMDestReg : Format<3>; -def MRMDestMem : Format<4>; def MRMSrcReg : Format<5>; -def MRMSrcMem : Format<6>; -def MRM0r : Format<16>; def MRM1r : Format<17>; def MRM2r : Format<18>; -def MRM3r : Format<19>; def MRM4r : Format<20>; def MRM5r : Format<21>; -def MRM6r : Format<22>; def MRM7r : Format<23>; -def MRM0m : Format<24>; def MRM1m : Format<25>; def MRM2m : Format<26>; -def MRM3m : Format<27>; def MRM4m : Format<28>; def MRM5m : Format<29>; -def MRM6m : Format<30>; def MRM7m : Format<31>; -def MRMInitReg : Format<32>; - -//===----------------------------------------------------------------------===// // X86 Instruction Predicate Definitions. def HasMMX : Predicate<"Subtarget->hasMMX()">; def HasSSE1 : Predicate<"Subtarget->hasSSE1()">; @@ -190,84 +167,10 @@ def IsStatic : Predicate<"TM.getRelocationModel() == Reloc::Static">; //===----------------------------------------------------------------------===// -// X86 specific pattern fragments. +// X86 Instruction Format Definitions. // -// ImmType - This specifies the immediate type used by an instruction. This is -// part of the ad-hoc solution used to emit machine instruction encodings by our -// machine code emitter. -class ImmType val> { - bits<3> Value = val; -} -def NoImm : ImmType<0>; -def Imm8 : ImmType<1>; -def Imm16 : ImmType<2>; -def Imm32 : ImmType<3>; -def Imm64 : ImmType<4>; - -// FPFormat - This specifies what form this FP instruction has. This is used by -// the Floating-Point stackifier pass. -class FPFormat val> { - bits<3> Value = val; -} -def NotFP : FPFormat<0>; -def ZeroArgFP : FPFormat<1>; -def OneArgFP : FPFormat<2>; -def OneArgFPRW : FPFormat<3>; -def TwoArgFP : FPFormat<4>; -def CompareFP : FPFormat<5>; -def CondMovFP : FPFormat<6>; -def SpecialFP : FPFormat<7>; - - -class X86Inst opcod, Format f, ImmType i, dag outs, dag ins, - string AsmStr> - : Instruction { - let Namespace = "X86"; - - bits<8> Opcode = opcod; - Format Form = f; - bits<6> FormBits = Form.Value; - ImmType ImmT = i; - bits<3> ImmTypeBits = ImmT.Value; - - dag OutOperandList = outs; - dag InOperandList = ins; - string AsmString = AsmStr; - - // - // Attributes specific to X86 instructions... - // - bit hasOpSizePrefix = 0; // Does this inst have a 0x66 prefix? - bit hasAdSizePrefix = 0; // Does this inst have a 0x67 prefix? - - bits<4> Prefix = 0; // Which prefix byte does this inst have? - bit hasREX_WPrefix = 0; // Does this inst requires the REX.W prefix? - FPFormat FPForm; // What flavor of FP instruction is this? - bits<3> FPFormBits = 0; -} - - -// Prefix byte classes which are used to indicate to the ad-hoc machine code -// emitter that various prefix bytes are required. -class OpSize { bit hasOpSizePrefix = 1; } -class AdSize { bit hasAdSizePrefix = 1; } -class REX_W { bit hasREX_WPrefix = 1; } -class TB { bits<4> Prefix = 1; } -class REP { bits<4> Prefix = 2; } -class D8 { bits<4> Prefix = 3; } -class D9 { bits<4> Prefix = 4; } -class DA { bits<4> Prefix = 5; } -class DB { bits<4> Prefix = 6; } -class DC { bits<4> Prefix = 7; } -class DD { bits<4> Prefix = 8; } -class DE { bits<4> Prefix = 9; } -class DF { bits<4> Prefix = 10; } -class XD { bits<4> Prefix = 11; } -class XS { bits<4> Prefix = 12; } -class T8 { bits<4> Prefix = 13; } -class TA { bits<4> Prefix = 14; } - +include "X86InstrFormats.td" //===----------------------------------------------------------------------===// // Pattern fragments... @@ -334,31 +237,6 @@ def extloadi32i16 : PatFrag<(ops node:$ptr), (i32 (extloadi16 node:$ptr))>; //===----------------------------------------------------------------------===// -// Instruction templates... -// - -class I o, Format f, dag outs, dag ins, string asm, list pattern> - : X86Inst { - let Pattern = pattern; - let CodeSize = 3; -} -class Ii8 o, Format f, dag outs, dag ins, string asm, list pattern> - : X86Inst { - let Pattern = pattern; - let CodeSize = 3; -} -class Ii16 o, Format f, dag outs, dag ins, string asm, list pattern> - : X86Inst { - let Pattern = pattern; - let CodeSize = 3; -} -class Ii32 o, Format f, dag outs, dag ins, string asm, list pattern> - : X86Inst { - let Pattern = pattern; - let CodeSize = 3; -} - -//===----------------------------------------------------------------------===// // Instruction list... // @@ -2654,19 +2532,19 @@ include "X86InstrFPStack.td" //===----------------------------------------------------------------------===// -// MMX and XMM Packed Integer support (requires MMX, SSE, and SSE2) +// X86-64 Support //===----------------------------------------------------------------------===// -include "X86InstrMMX.td" +include "X86InstrX86-64.td" //===----------------------------------------------------------------------===// -// XMM Floating point support (requires SSE / SSE2) +// MMX and XMM Packed Integer support (requires MMX, SSE, and SSE2) //===----------------------------------------------------------------------===// -include "X86InstrSSE.td" +include "X86InstrMMX.td" //===----------------------------------------------------------------------===// -// X86-64 Support +// XMM Floating point support (requires SSE / SSE2) //===----------------------------------------------------------------------===// -include "X86InstrX86-64.td" +include "X86InstrSSE.td" Modified: llvm/trunk/lib/Target/X86/X86InstrMMX.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrMMX.td?rev=40628&r1=40627&r2=40628&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrMMX.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrMMX.td Tue Jul 31 03:04:03 2007 @@ -13,29 +13,6 @@ // //===----------------------------------------------------------------------===// -//===----------------------------------------------------------------------===// -// Instruction templates -//===----------------------------------------------------------------------===// - -// MMXI - MMX instructions with TB prefix. -// MMX2I - MMX / SSE2 instructions with TB and OpSize prefixes. -// MMXIi8 - MMX instructions with ImmT == Imm8 and TB prefix. -// MMXIi8 - MMX instructions with ImmT == Imm8 and TB prefix. -// MMXID - MMX instructions with XD prefix. -// MMXIS - MMX instructions with XS prefix. -class MMXI o, Format F, dag outs, dag ins, string asm, list pattern> - : I, TB, Requires<[HasMMX]>; -class MMXRI o, Format F, dag outs, dag ins, string asm, list pattern> - : I, TB, REX_W, Requires<[HasMMX]>; -class MMX2I o, Format F, dag outs, dag ins, string asm, list pattern> - : I, TB, OpSize, Requires<[HasMMX]>; -class MMXIi8 o, Format F, dag outs, dag ins, string asm, list pattern> - : Ii8, TB, Requires<[HasMMX]>; -class MMXID o, Format F, dag outs, dag ins, string asm, list pattern> - : Ii8, XD, Requires<[HasMMX]>; -class MMXIS o, Format F, dag outs, dag ins, string asm, list pattern> - : Ii8, XS, Requires<[HasMMX]>; - // Some 'special' instructions def IMPLICIT_DEF_VR64 : I<0, Pseudo, (outs VR64:$dst), (ins), "#IMPLICIT_DEF $dst", Modified: llvm/trunk/lib/Target/X86/X86InstrSSE.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSSE.td?rev=40628&r1=40627&r2=40628&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrSSE.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrSSE.td Tue Jul 31 03:04:03 2007 @@ -277,20 +277,6 @@ // SSE1 Instructions //===----------------------------------------------------------------------===// -// SSE1 Instruction Templates: -// -// SSI - SSE1 instructions with XS prefix. -// PSI - SSE1 instructions with TB prefix. -// PSIi8 - SSE1 instructions with ImmT == Imm8 and TB prefix. - -class SSI o, Format F, dag outs, dag ins, string asm, list pattern> - : I, XS, Requires<[HasSSE1]>; -class PSI o, Format F, dag outs, dag ins, string asm, list pattern> - : I, TB, Requires<[HasSSE1]>; -class PSIi8 o, Format F, dag outs, dag ins, string asm, - list pattern> - : Ii8, TB, Requires<[HasSSE1]>; - // Move Instructions def MOVSSrr : SSI<0x10, MRMSrcReg, (outs FR32:$dst), (ins FR32:$src), "movss {$src, $dst|$dst, $src}", []>; @@ -947,20 +933,6 @@ // SSE2 Instructions //===----------------------------------------------------------------------===// -// SSE2 Instruction Templates: -// -// SDI - SSE2 instructions with XD prefix. -// PDI - SSE2 instructions with TB and OpSize prefixes. -// PDIi8 - SSE2 instructions with ImmT == Imm8 and TB and OpSize prefixes. - -class SDI o, Format F, dag outs, dag ins, string asm, list pattern> - : I, XD, Requires<[HasSSE2]>; -class PDI o, Format F, dag outs, dag ins, string asm, list pattern> - : I, TB, OpSize, Requires<[HasSSE2]>; -class PDIi8 o, Format F, dag outs, dag ins, string asm, - list pattern> - : Ii8, TB, OpSize, Requires<[HasSSE2]>; - // Move Instructions def MOVSDrr : SDI<0x10, MRMSrcReg, (outs FR64:$dst), (ins FR64:$src), "movsd {$src, $dst|$dst, $src}", []>; @@ -2180,19 +2152,6 @@ // SSE3 Instructions //===----------------------------------------------------------------------===// -// SSE3 Instruction Templates: -// -// S3I - SSE3 instructions with TB and OpSize prefixes. -// S3SI - SSE3 instructions with XS prefix. -// S3DI - SSE3 instructions with XD prefix. - -class S3SI o, Format F, dag outs, dag ins, string asm, list pattern> - : I, XS, Requires<[HasSSE3]>; -class S3DI o, Format F, dag outs, dag ins, string asm, list pattern> - : I, XD, Requires<[HasSSE3]>; -class S3I o, Format F, dag outs, dag ins, string asm, list pattern> - : I, TB, OpSize, Requires<[HasSSE3]>; - // Move Instructions def MOVSHDUPrr : S3SI<0x16, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src), "movshdup {$src, $dst|$dst, $src}", @@ -2655,3 +2614,11 @@ (MOVUPSmr addr:$dst, VR128:$src)>, Requires<[HasSSE2]>; def : Pat<(store (v16i8 VR128:$src), addr:$dst), (MOVUPSmr addr:$dst, VR128:$src)>, Requires<[HasSSE2]>; + +// (vextract (v4i32 bc (v4f32 s2v (f32 load $addr))), 0) -> (i32 load $addr) +def : Pat<(vector_extract + (bc_v4i32 (v4f32 (scalar_to_vector (loadf32 addr:$src)))), (iPTR 0)), + (MOV32rm addr:$src)>; +def : Pat<(vector_extract + (bc_v2i64 (v2f64 (scalar_to_vector (loadf64 addr:$src)))), (iPTR 0)), + (MOV64rm addr:$src)>; Modified: llvm/trunk/lib/Target/X86/X86InstrX86-64.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrX86-64.td?rev=40628&r1=40627&r2=40628&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrX86-64.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrX86-64.td Tue Jul 31 03:04:03 2007 @@ -40,36 +40,6 @@ []>; //===----------------------------------------------------------------------===// -// Instruction templates... -// - -class RI o, Format F, dag outs, dag ins, string asm, list pattern> - : I, REX_W; -class RIi8 o, Format F, dag outs, dag ins, string asm, - list pattern> - : Ii8, REX_W; -class RIi32 o, Format F, dag outs, dag ins, string asm, - list pattern> - : Ii32, REX_W; - -class RIi64 o, Format f, dag outs, dag ins, string asm, - list pattern> - : X86Inst, REX_W { - let Pattern = pattern; - let CodeSize = 3; -} - -class RSSI o, Format F, dag outs, dag ins, string asm, - list pattern> - : SSI, REX_W; -class RSDI o, Format F, dag outs, dag ins, string asm, - list pattern> - : SDI, REX_W; -class RPDI o, Format F, dag outs, dag ins, string asm, - list pattern> - : PDI, REX_W; - -//===----------------------------------------------------------------------===// // Pattern fragments... // Added: llvm/trunk/test/CodeGen/X86/2007-07-31-VInsertBug.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-07-31-VInsertBug.ll?rev=40628&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/X86/2007-07-31-VInsertBug.ll (added) +++ llvm/trunk/test/CodeGen/X86/2007-07-31-VInsertBug.ll Tue Jul 31 03:04:03 2007 @@ -0,0 +1,16 @@ +; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin | %prcontext {pinsrw \$2} 1 | grep "movl \$1" +; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin | not grep movss + + at G = global <4 x float> zeroinitializer + +define void @test(i32 *%P1, i32* %P2, float *%FP) { + %T = load float* %FP + store i32 0, i32* %P1 + + %U = load <4 x float>* @G + store i32 1, i32* %P1 + %V = insertelement <4 x float> %U, float %T, i32 1 + store <4 x float> %V, <4 x float>* @G + + ret void +} From dpatel at apple.com Tue Jul 31 03:04:18 2007 From: dpatel at apple.com (Devang Patel) Date: Tue, 31 Jul 2007 08:04:18 -0000 Subject: [llvm-commits] [llvm] r40629 - in /llvm/trunk/test: Analysis/Dominators/2007-07-11-SplitBlock.ll Analysis/Dominators/2007-07-12-SplitBlock.ll Transforms/LCSSA/2007-07-12-LICM-2.ll Transforms/LCSSA/2007-07-12-LICM-3.ll Transforms/LCSSA/2007-07-12-LICM.ll Transforms/LICM/2007-07-30-AliasSet.ll Transforms/LICM/Preserve-LCSSA.ll Transforms/LoopRotate/LRAnalysis.ll Transforms/LoopUnswitch/2007-07-12-ExitDomInfo.ll Transforms/LoopUnswitch/2007-07-13-DomInfo.ll Message-ID: <200707310804.l6V84IrC007579@zion.cs.uiuc.edu> Author: dpatel Date: Tue Jul 31 03:04:17 2007 New Revision: 40629 URL: http://llvm.org/viewvc/llvm-project?rev=40629&view=rev Log: Bunch of tests to check loop passes. Added: llvm/trunk/test/Analysis/Dominators/2007-07-11-SplitBlock.ll llvm/trunk/test/Analysis/Dominators/2007-07-12-SplitBlock.ll llvm/trunk/test/Transforms/LCSSA/2007-07-12-LICM-2.ll llvm/trunk/test/Transforms/LCSSA/2007-07-12-LICM-3.ll llvm/trunk/test/Transforms/LCSSA/2007-07-12-LICM.ll llvm/trunk/test/Transforms/LICM/2007-07-30-AliasSet.ll llvm/trunk/test/Transforms/LICM/Preserve-LCSSA.ll llvm/trunk/test/Transforms/LoopUnswitch/2007-07-12-ExitDomInfo.ll llvm/trunk/test/Transforms/LoopUnswitch/2007-07-13-DomInfo.ll Removed: llvm/trunk/test/Transforms/LoopRotate/LRAnalysis.ll Added: llvm/trunk/test/Analysis/Dominators/2007-07-11-SplitBlock.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/Dominators/2007-07-11-SplitBlock.ll?rev=40629&view=auto ============================================================================== --- llvm/trunk/test/Analysis/Dominators/2007-07-11-SplitBlock.ll (added) +++ llvm/trunk/test/Analysis/Dominators/2007-07-11-SplitBlock.ll Tue Jul 31 03:04:17 2007 @@ -0,0 +1,21 @@ +; RUN: llvm-as < %s | opt -loop-rotate -loop-unswitch -disable-output + +define i32 @stringSearch_Clib(i32 %count) { +entry: + br i1 false, label %bb36, label %bb44 + +cond_true20: ; preds = %bb36 + %tmp33 = add i32 0, 0 ; [#uses=1] + br label %bb36 + +bb36: ; preds = %cond_true20, %entry + %c.2 = phi i32 [ %tmp33, %cond_true20 ], [ 0, %entry ] ; [#uses=1] + br i1 false, label %cond_true20, label %bb41 + +bb41: ; preds = %bb36 + %c.2.lcssa = phi i32 [ %c.2, %bb36 ] ; [#uses=0] + ret i32 0 + +bb44: ; preds = %entry + ret i32 0 +} Added: llvm/trunk/test/Analysis/Dominators/2007-07-12-SplitBlock.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/Dominators/2007-07-12-SplitBlock.ll?rev=40629&view=auto ============================================================================== --- llvm/trunk/test/Analysis/Dominators/2007-07-12-SplitBlock.ll (added) +++ llvm/trunk/test/Analysis/Dominators/2007-07-12-SplitBlock.ll Tue Jul 31 03:04:17 2007 @@ -0,0 +1,13 @@ +; RUN: llvm-as < %s | opt -loop-rotate -licm -loop-unswitch -disable-output + +define i32 @main(i32 %argc, i8** %argv) { +entry: + br label %bb7 + +bb7: ; preds = %bb7, %entry + %tmp54 = icmp slt i32 0, 2000000 ; [#uses=1] + br i1 %tmp54, label %bb7, label %bb56 + +bb56: ; preds = %bb7 + ret i32 0 +} Added: llvm/trunk/test/Transforms/LCSSA/2007-07-12-LICM-2.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LCSSA/2007-07-12-LICM-2.ll?rev=40629&view=auto ============================================================================== --- llvm/trunk/test/Transforms/LCSSA/2007-07-12-LICM-2.ll (added) +++ llvm/trunk/test/Transforms/LCSSA/2007-07-12-LICM-2.ll Tue Jul 31 03:04:17 2007 @@ -0,0 +1,17 @@ +; RUN: llvm-as < %s | opt -loop-rotate -licm -loop-unswitch -disable-output +define i32 @main(i32 %argc, i8** %argv) { +entry: + br label %bb7 + +bb7: ; preds = %bb7, %entry + %tmp39 = load <4 x float>* null ; <<4 x float>> [#uses=1] + %tmp40 = add <4 x float> %tmp39, < float 2.000000e+00, float 3.000000e+00, float 1.000000e+00, float 0.000000e+00 > ; <<4 x float>> [#uses=1] + %tmp43 = add <4 x float> %tmp40, < float 1.000000e+00, float 1.000000e+00, float 0.000000e+00, float 2.000000e+00 > ; <<4 x float>> [#uses=1] + %tmp46 = add <4 x float> %tmp43, < float 3.000000e+00, float 0.000000e+00, float 2.000000e+00, float 4.000000e+00 > ; <<4 x float>> [#uses=1] + %tmp49 = add <4 x float> %tmp46, < float 0.000000e+00, float 4.000000e+00, float 6.000000e+00, float 1.000000e+00 > ; <<4 x float>> [#uses=1] + store <4 x float> %tmp49, <4 x float>* null + br i1 false, label %bb7, label %bb56 + +bb56: ; preds = %bb7 + ret i32 0 +} Added: llvm/trunk/test/Transforms/LCSSA/2007-07-12-LICM-3.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LCSSA/2007-07-12-LICM-3.ll?rev=40629&view=auto ============================================================================== --- llvm/trunk/test/Transforms/LCSSA/2007-07-12-LICM-3.ll (added) +++ llvm/trunk/test/Transforms/LCSSA/2007-07-12-LICM-3.ll Tue Jul 31 03:04:17 2007 @@ -0,0 +1,24 @@ +; RUN: llvm-as < %s | opt -loop-rotate -licm -loop-unswitch -disable-output + +define i32 @main(i32 %argc, i8** %argv) { +entry: + br label %bb + +bb: ; preds = %bb56, %entry + br label %bb7 + +bb7: ; preds = %bb7, %bb + %tmp39 = load <4 x float>* null ; <<4 x float>> [#uses=1] + %tmp40 = add <4 x float> %tmp39, < float 2.000000e+00, float 3.000000e+00, float 1.000000e+00, float 0.000000e+00 > ; <<4 x float>> [#uses=1] + %tmp43 = add <4 x float> %tmp40, < float 1.000000e+00, float 1.000000e+00, float 0.000000e+00, float 2.000000e+00 > ; <<4 x float>> [#uses=1] + %tmp46 = add <4 x float> %tmp43, < float 3.000000e+00, float 0.000000e+00, float 2.000000e+00, float 4.000000e+00 > ; <<4 x float>> [#uses=1] + %tmp49 = add <4 x float> %tmp46, < float 0.000000e+00, float 4.000000e+00, float 6.000000e+00, float 1.000000e+00 > ; <<4 x float>> [#uses=1] + store <4 x float> %tmp49, <4 x float>* null + br i1 false, label %bb7, label %bb56 + +bb56: ; preds = %bb7 + br i1 false, label %bb, label %bb64 + +bb64: ; preds = %bb56 + ret i32 0 +} Added: llvm/trunk/test/Transforms/LCSSA/2007-07-12-LICM.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LCSSA/2007-07-12-LICM.ll?rev=40629&view=auto ============================================================================== --- llvm/trunk/test/Transforms/LCSSA/2007-07-12-LICM.ll (added) +++ llvm/trunk/test/Transforms/LCSSA/2007-07-12-LICM.ll Tue Jul 31 03:04:17 2007 @@ -0,0 +1,14 @@ +; RUN: llvm-as < %s | opt -loop-rotate -licm -loop-unswitch -disable-output +define i32 @main(i32 %argc, i8** %argv) { +entry: + br label %bb7 + +bb7: ; preds = %bb7, %entry + %tmp39 = load <4 x float>* null ; <<4 x float>> [#uses=1] + %tmp40 = add <4 x float> %tmp39, < float 2.000000e+00, float 3.000000e+00, float 1.000000e+00, float 0.000000e+00 > ; <<4 x float>> [#uses=0] + store <4 x float> zeroinitializer, <4 x float>* null + br i1 false, label %bb7, label %bb56 + +bb56: ; preds = %bb7 + ret i32 0 +} Added: llvm/trunk/test/Transforms/LICM/2007-07-30-AliasSet.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LICM/2007-07-30-AliasSet.ll?rev=40629&view=auto ============================================================================== --- llvm/trunk/test/Transforms/LICM/2007-07-30-AliasSet.ll (added) +++ llvm/trunk/test/Transforms/LICM/2007-07-30-AliasSet.ll Tue Jul 31 03:04:17 2007 @@ -0,0 +1,39 @@ +; RUN: llvm-as < %s | opt -licm -loop-unswitch -disable-output + %struct.III_scalefac_t = type { [22 x i32], [13 x [3 x i32]] } + %struct.gr_info = type { i32, i32, i32, i32, i32, i32, i32, i32, [3 x i32], [3 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32*, [4 x i32] } + +define i32 @scale_bitcount_lsf(%struct.III_scalefac_t* %scalefac, %struct.gr_info* %cod_info) { +entry: + br i1 false, label %bb28, label %bb133.preheader + +bb133.preheader: ; preds = %entry + ret i32 0 + +bb28: ; preds = %entry + br i1 false, label %bb63.outer, label %bb79 + +bb63.outer: ; preds = %bb73, %bb28 + br i1 false, label %bb35, label %bb73 + +bb35: ; preds = %cond_next60, %bb63.outer + %window.34 = phi i32 [ %tmp62, %cond_next60 ], [ 0, %bb63.outer ] ; [#uses=1] + %tmp44 = getelementptr [4 x i32]* null, i32 0, i32 0 ; [#uses=1] + %tmp46 = load i32* %tmp44, align 4 ; [#uses=0] + br i1 false, label %cond_true50, label %cond_next60 + +cond_true50: ; preds = %bb35 + %tmp59 = getelementptr [4 x i32]* null, i32 0, i32 0 ; [#uses=1] + store i32 0, i32* %tmp59, align 4 + br label %cond_next60 + +cond_next60: ; preds = %cond_true50, %bb35 + %tmp62 = add i32 %window.34, 1 ; [#uses=1] + br i1 false, label %bb35, label %bb73 + +bb73: ; preds = %cond_next60, %bb63.outer + %tmp76 = icmp slt i32 0, 0 ; [#uses=1] + br i1 %tmp76, label %bb63.outer, label %bb79 + +bb79: ; preds = %bb73, %bb28 + ret i32 0 +} Added: llvm/trunk/test/Transforms/LICM/Preserve-LCSSA.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LICM/Preserve-LCSSA.ll?rev=40629&view=auto ============================================================================== --- llvm/trunk/test/Transforms/LICM/Preserve-LCSSA.ll (added) +++ llvm/trunk/test/Transforms/LICM/Preserve-LCSSA.ll Tue Jul 31 03:04:17 2007 @@ -0,0 +1,25 @@ +; RUN: llvm-as < %s | opt -loop-rotate -licm -loop-unswitch -disable-output + +define i32 @stringSearch_Clib(i32 %count) { +entry: + br i1 false, label %bb36, label %bb44 + +bb4: ; preds = %bb36 + br i1 false, label %cond_next, label %cond_true + +cond_true: ; preds = %bb4 + ret i32 0 + +cond_next: ; preds = %bb4 + ret i32 0 + +bb36: ; preds = %bb41, %entry + br i1 false, label %bb4, label %bb41 + +bb41: ; preds = %bb36 + %ttmp2 = icmp slt i32 0, %count ; [#uses=1] + br i1 %ttmp2, label %bb36, label %bb44 + +bb44: ; preds = %bb41, %entry + ret i32 0 +} Removed: llvm/trunk/test/Transforms/LoopRotate/LRAnalysis.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopRotate/LRAnalysis.ll?rev=40628&view=auto ============================================================================== --- llvm/trunk/test/Transforms/LoopRotate/LRAnalysis.ll (original) +++ llvm/trunk/test/Transforms/LoopRotate/LRAnalysis.ll (removed) @@ -1,21 +0,0 @@ -; RUN: llvm-as < %s | opt -loop-rotate -loop-unswitch -disable-output - -define i32 @stringSearch_Clib(i32 %count) { -entry: - br i1 false, label %bb36, label %bb44 - -cond_true20: ; preds = %bb36 - %tmp33 = add i32 0, 0 ; [#uses=1] - br label %bb36 - -bb36: ; preds = %cond_true20, %entry - %c.2 = phi i32 [ %tmp33, %cond_true20 ], [ 0, %entry ] ; [#uses=1] - br i1 false, label %cond_true20, label %bb41 - -bb41: ; preds = %bb36 - %c.2.lcssa = phi i32 [ %c.2, %bb36 ] ; [#uses=0] - ret i32 0 - -bb44: ; preds = %entry - ret i32 0 -} Added: llvm/trunk/test/Transforms/LoopUnswitch/2007-07-12-ExitDomInfo.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopUnswitch/2007-07-12-ExitDomInfo.ll?rev=40629&view=auto ============================================================================== --- llvm/trunk/test/Transforms/LoopUnswitch/2007-07-12-ExitDomInfo.ll (added) +++ llvm/trunk/test/Transforms/LoopUnswitch/2007-07-12-ExitDomInfo.ll Tue Jul 31 03:04:17 2007 @@ -0,0 +1,45 @@ +; RUN: llvm-as < %s | opt -loop-unswitch -instcombine -disable-output + + at str3 = external constant [3 x i8] ; <[3 x i8]*> [#uses=1] + +define i32 @stringSearch_Clib(i32 %count) { +entry: + %ttmp25 = icmp sgt i32 %count, 0 ; [#uses=1] + br i1 %ttmp25, label %bb36.preheader, label %bb44 + +bb36.preheader: ; preds = %entry + %ttmp33 = icmp slt i32 0, 250 ; [#uses=1] + br label %bb36.outer + +bb36.outer: ; preds = %bb41, %bb36.preheader + br i1 %ttmp33, label %bb.nph, label %bb41 + +bb.nph: ; preds = %bb36.outer + %ttmp8 = icmp eq i8* null, null ; [#uses=1] + %ttmp6 = icmp eq i8* null, null ; [#uses=1] + %tmp31 = call i32 @strcspn( i8* null, i8* getelementptr ([3 x i8]* @str3, i64 0, i64 0) ) ; [#uses=1] + br i1 %ttmp8, label %cond_next, label %cond_true + +cond_true: ; preds = %bb.nph + ret i32 0 + +cond_next: ; preds = %bb.nph + br i1 %ttmp6, label %cond_next28, label %cond_true20 + +cond_true20: ; preds = %cond_next + ret i32 0 + +cond_next28: ; preds = %cond_next + %tmp33 = add i32 %tmp31, 0 ; [#uses=1] + br label %bb41 + +bb41: ; preds = %cond_next28, %bb36.outer + %c.2.lcssa = phi i32 [ 0, %bb36.outer ], [ %tmp33, %cond_next28 ] ; [#uses=1] + br i1 false, label %bb36.outer, label %bb44 + +bb44: ; preds = %bb41, %entry + %c.01.1 = phi i32 [ 0, %entry ], [ %c.2.lcssa, %bb41 ] ; [#uses=1] + ret i32 %c.01.1 +} + +declare i32 @strcspn(i8*, i8*) Added: llvm/trunk/test/Transforms/LoopUnswitch/2007-07-13-DomInfo.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopUnswitch/2007-07-13-DomInfo.ll?rev=40629&view=auto ============================================================================== --- llvm/trunk/test/Transforms/LoopUnswitch/2007-07-13-DomInfo.ll (added) +++ llvm/trunk/test/Transforms/LoopUnswitch/2007-07-13-DomInfo.ll Tue Jul 31 03:04:17 2007 @@ -0,0 +1,27 @@ +; RUN: llvm-as < %s | opt -loop-unswitch -disable-output + +define i32 @main(i32 %argc, i8** %argv) { +entry: + %tmp1785365 = icmp ult i32 0, 100 ; [#uses=1] + br label %bb + +bb: ; preds = %cond_true, %entry + br i1 false, label %cond_true, label %cond_next + +cond_true: ; preds = %bb + br i1 %tmp1785365, label %bb, label %bb1788 + +cond_next: ; preds = %bb + %iftmp.1.0 = select i1 false, i32 0, i32 0 ; [#uses=1] + br i1 false, label %cond_true47, label %cond_next74 + +cond_true47: ; preds = %cond_next + %tmp53 = urem i32 %iftmp.1.0, 0 ; [#uses=0] + ret i32 0 + +cond_next74: ; preds = %cond_next + ret i32 0 + +bb1788: ; preds = %cond_true + ret i32 0 +} From asl at math.spbu.ru Tue Jul 31 03:12:35 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Tue, 31 Jul 2007 08:12:35 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r40630 - /llvm-gcc-4.2/trunk/gcc/llvm-types.cpp Message-ID: <200707310812.l6V8CZm1008030@zion.cs.uiuc.edu> Author: asl Date: Tue Jul 31 03:12:35 2007 New Revision: 40630 URL: http://llvm.org/viewvc/llvm-project?rev=40630&view=rev Log: Propagate r40582 from llvm-gcc-4.0: Add support to emit noalias attribute on function parameters when the __restrict qualifier is used. Modified: llvm-gcc-4.2/trunk/gcc/llvm-types.cpp Modified: llvm-gcc-4.2/trunk/gcc/llvm-types.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-types.cpp?rev=40630&r1=40629&r2=40630&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-types.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-types.cpp Tue Jul 31 03:12:35 2007 @@ -1031,6 +1031,11 @@ else Attributes |= ParamAttr::SExt; } + + // Compute noalias attributes. + if (TREE_CODE(ArgTy) == POINTER_TYPE || TREE_CODE(ArgTy) == REFERENCE_TYPE) + if (TYPE_RESTRICT(ArgTy)) + Attributes |= ParamAttr::NoAlias; #ifdef LLVM_TARGET_ENABLE_REGPARM // Allow the target to mark this as inreg. From asl at math.spbu.ru Tue Jul 31 03:30:59 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Tue, 31 Jul 2007 12:30:59 +0400 Subject: [llvm-commits] [llvm-gcc-4.0] r40622 - in /llvm-gcc-4.0/trunk/gcc: llvm-backend.cpp llvm-convert.cpp llvm-internal.h llvm-types.cpp In-Reply-To: <200707310650.l6V6oPCJ003921.SS5642SS@zion.cs.uiuc.edu> References: <200707310650.l6V6oPCJ003921.SS5642SS@zion.cs.uiuc.edu> Message-ID: <1185870659.9492.19.camel@asl.dorms.spbu.ru> Hello, Christopher. > + tree RestrictArgTy = (DeclArgs) ? DeclArgs->type.common.type : ArgTy; This looks very dangerous. Why can't standard TREE_ macro be used here? Also, please add a comment describing what's going here (why you need such thing) :) -- With best regards, Anton Korobeynikov. Faculty of Mathematics & Mechanics, Saint Petersburg State University. From christopher.lamb at gmail.com Tue Jul 31 09:31:15 2007 From: christopher.lamb at gmail.com (Christopher Lamb) Date: Tue, 31 Jul 2007 07:31:15 -0700 Subject: [llvm-commits] [llvm-gcc-4.0] r40622 - in /llvm-gcc-4.0/trunk/gcc: llvm-backend.cpp llvm-convert.cpp llvm-internal.h llvm-types.cpp In-Reply-To: <1185870659.9492.19.camel@asl.dorms.spbu.ru> References: <200707310650.l6V6oPCJ003921.SS5642SS@zion.cs.uiuc.edu> <1185870659.9492.19.camel@asl.dorms.spbu.ru> Message-ID: On Jul 31, 2007, at 1:30 AM, Anton Korobeynikov wrote: > Hello, Christopher. > >> + tree RestrictArgTy = (DeclArgs) ? DeclArgs- >> >type.common.type : ArgTy; > This looks very dangerous. Why can't standard TREE_ macro be used > here? > Also, please add a comment describing what's going here (why you need > such thing) :) What specifically is dangerous about this? I'm no GCC expert, but the DECL_ARGUMENTS() seems to be the only place where the restrict qualifier is preserved under C++. While debugging I could inspect the data structure to see that the information I needed was there, but looking in tree.h I found no TREE_... macro that got me there. The ?: came about because while bootstrapping GCC there were cases when DelArgs was NULL. It seems a bit of a hack, I know, but it's the best I could figure and it seems to work properly in my tests. If you have a suggestion on a more proper way to consistently get the restrict qualifier I'm all ears. =) -- Christopher Lamb -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20070731/13e6b154/attachment.html From djg at cray.com Tue Jul 31 09:31:45 2007 From: djg at cray.com (Dan Gohman) Date: Tue, 31 Jul 2007 09:31:45 -0500 Subject: [llvm-commits] [llvm] r40624 - in /llvm/trunk: lib/Analysis/BasicAliasAnalysis.cpp test/Analysis/BasicAA/2007-07-31-NoAliasTest.ll Message-ID: <20070731143145.GL14991@village.us.cray.com> > Log: > Teach BasicAA about noalias function parameters. Passes all of DejaGNU and test-suite. I just grepped through LLVM's test-suite and didn't find any uses of the restrict keyword though... > // Pointing at a discernible object? > if (O1) { > + // Check for noalias attribute > + if (isa(O1)) { > + const Argument *Arg = cast(O1); > + const Function *Func = Arg->getParent(); > + const ParamAttrsList *Attr = Func->getFunctionType()->getParamAttrs(); > + if (Attr) { > + unsigned Idx = 1; > + for (Function::const_arg_iterator I = Func->arg_begin(), > + E = Func->arg_end(); I != E; ++I, ++Idx) { > + if (&(*I) == Arg && > + Attr->paramHasAttr(Idx, ParamAttr::NoAlias)) > + return NoAlias; > + } > + } > + } This logic is more aggressive than what C's restrict qualifier allows in two ways. For this testcase: define void @foo(i32* noalias %p, i32* noalias %q, i32 %i, i32 %j) { %pi = getelementptr i32* %p, i32 %i %qi = getelementptr i32* %q, i32 %i %pj = getelementptr i32* %p, i32 %j %qj = getelementptr i32* %q, i32 %j store i32 0, i32* %p store i32 0, i32* %pi store i32 0, i32* %pj store i32 0, i32* %q store i32 0, i32* %qi store i32 0, i32* %qj ret void } basicaa is now saying this: 15 no alias responses (100.0%) 0 may alias responses (0.0%) 0 must alias responses (0.0%) The noalias logic should consider that a noalias pointer still aliases itself. In this example, %p, %pi, and %pj should all MayAlias each other, and %q, %qi, and %qj should all MayAlias each other. Second, since you're mapping C's restrict qualifier on parameters to this noalias attribute, it's necessary to consider cases like this: declare i32* @unclear(i32* %a) define void @foo(i32* noalias %x) { %y = call i32* @unclear(i32* %x) store i32 0, i32* %x store i32 0, i32* %y ret void } Right now basicaa is saying NoAlias for %x and %y. The answer should be MayAlias, because %y may legally be "based on" %x. There's nothing in the definition of restrict that says that "based on" relationships must be obvious to a compiler. So for an alias query where one of the two pointers is noalias and the other is not, and the non-noalias one doesn't have a base object that basicaa can find, the answer should be MayAlias. A more advanced pass could try to prove that the non-noalias pointer couldn't possibly be "based on" the noalias one by examining all its uses, though the specific example here would defy such analysis. > + // Check for noalias atrribute independently from above logic > + if (isa(O2)) { > + const Argument *Arg = cast(O2); > + const Function *Func = Arg->getParent(); > + const ParamAttrsList *Attr = Func->getFunctionType()->getParamAttrs(); > + if (Attr) { > + unsigned Idx = 1; > + for (Function::const_arg_iterator I = Func->arg_begin(), > + E = Func->arg_end(); I != E; ++I, ++Idx) { > + if (&(*I) == Arg && > + Attr->paramHasAttr(Idx, ParamAttr::NoAlias)) > + return NoAlias; > + } > + } > + } Same as above. Dan -- Dan Gohman, Cray Inc. From rspencer at reidspencer.com Tue Jul 31 09:39:10 2007 From: rspencer at reidspencer.com (Reid Spencer) Date: Tue, 31 Jul 2007 14:39:10 -0000 Subject: [llvm-commits] [llvm] r40632 - in /llvm/trunk/lib: AsmParser/llvmAsmParser.y VMCore/Verifier.cpp Message-ID: <200707311439.l6VEdBWK021705@zion.cs.uiuc.edu> Author: reid Date: Tue Jul 31 09:39:10 2007 New Revision: 40632 URL: http://llvm.org/viewvc/llvm-project?rev=40632&view=rev Log: After a discussion with Anton, it turns out that the InReg attribute is not permitted on function results. So, revert the last patch to make it illegal. Modified: llvm/trunk/lib/AsmParser/llvmAsmParser.y llvm/trunk/lib/VMCore/Verifier.cpp Modified: llvm/trunk/lib/AsmParser/llvmAsmParser.y URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/llvmAsmParser.y?rev=40632&r1=40631&r2=40632&view=diff ============================================================================== --- llvm/trunk/lib/AsmParser/llvmAsmParser.y (original) +++ llvm/trunk/lib/AsmParser/llvmAsmParser.y Tue Jul 31 09:39:10 2007 @@ -1245,7 +1245,6 @@ | NOUNWIND { $$ = ParamAttr::NoUnwind; } | ZEROEXT { $$ = ParamAttr::ZExt; } | SIGNEXT { $$ = ParamAttr::SExt; } - | INREG { $$ = ParamAttr::InReg; } ; OptFuncAttrs : /* empty */ { $$ = ParamAttr::None; } Modified: llvm/trunk/lib/VMCore/Verifier.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Verifier.cpp?rev=40632&r1=40631&r2=40632&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Verifier.cpp (original) +++ llvm/trunk/lib/VMCore/Verifier.cpp Tue Jul 31 09:39:10 2007 @@ -358,7 +358,8 @@ "Invalid struct-return function!", &F); const uint16_t ReturnIncompatible = - ParamAttr::ByVal | ParamAttr::Nest | ParamAttr::StructRet; + ParamAttr::ByVal | ParamAttr::InReg | + ParamAttr::Nest | ParamAttr::StructRet; const uint16_t ParameterIncompatible = ParamAttr::NoReturn | ParamAttr::NoUnwind; From rspencer at reidspencer.com Tue Jul 31 09:40:14 2007 From: rspencer at reidspencer.com (Reid Spencer) Date: Tue, 31 Jul 2007 14:40:14 -0000 Subject: [llvm-commits] [llvm] r40633 - /llvm/trunk/docs/LangRef.html Message-ID: <200707311440.l6VEeE65021762@zion.cs.uiuc.edu> Author: reid Date: Tue Jul 31 09:40:14 2007 New Revision: 40633 URL: http://llvm.org/viewvc/llvm-project?rev=40633&view=rev Log: fp2uint -> fptoui Modified: llvm/trunk/docs/LangRef.html Modified: llvm/trunk/docs/LangRef.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/LangRef.html?rev=40633&r1=40632&r2=40633&view=diff ============================================================================== --- llvm/trunk/docs/LangRef.html (original) +++ llvm/trunk/docs/LangRef.html Tue Jul 31 09:40:14 2007 @@ -1501,7 +1501,7 @@
Floating point extend a constant to another type. The size of CST must be smaller or equal to the size of TYPE. Both types must be floating point.
-
fp2uint ( CST to TYPE )
+
fptoui ( CST to TYPE )
Convert a floating point constant to the corresponding unsigned integer constant. TYPE must be an integer type. CST must be floating point. If the value won't fit in the integer type, the results are undefined.
@@ -3098,21 +3098,21 @@
Syntax:
-  <result> = fp2uint <ty> <value> to <ty2>             ; yields ty2
+  <result> = fptoui <ty> <value> to <ty2>             ; yields ty2
Overview:
-

The 'fp2uint' converts a floating point value to its +

The 'fptoui' converts a floating point value to its unsigned integer equivalent of type ty2.

Arguments:
-

The 'fp2uint' instruction takes a value to cast, which must be a +

The 'fptoui' instruction takes a value to cast, which must be a floating point value, and a type to cast it to, which must be an integer type.

Semantics:
-

The 'fp2uint' instruction converts its +

The 'fptoui' instruction converts its floating point operand into the nearest (rounding towards zero) unsigned integer value. If the value cannot fit in ty2, the results are undefined.

@@ -3123,9 +3123,9 @@
Example:
-  %X = fp2uint double 123.0 to i32      ; yields i32:123
-  %Y = fp2uint float 1.0E+300 to i1     ; yields i1:true
-  %X = fp2uint float 1.04E+17 to i8     ; yields undefined:1
+  %X = fptoui double 123.0 to i32      ; yields i32:123
+  %Y = fptoui float 1.0E+300 to i1     ; yields i1:true
+  %X = fptoui float 1.04E+17 to i8     ; yields undefined:1
From rspencer at reidspencer.com Tue Jul 31 09:41:17 2007 From: rspencer at reidspencer.com (Reid Spencer) Date: Tue, 31 Jul 2007 14:41:17 -0000 Subject: [llvm-commits] [llvm] r40634 - in /llvm/trunk/lib/AsmParser: llvmAsmParser.cpp.cvs llvmAsmParser.y.cvs Message-ID: <200707311441.l6VEfHbb021808@zion.cs.uiuc.edu> Author: reid Date: Tue Jul 31 09:41:17 2007 New Revision: 40634 URL: http://llvm.org/viewvc/llvm-project?rev=40634&view=rev Log: Regenerate. Modified: llvm/trunk/lib/AsmParser/llvmAsmParser.cpp.cvs llvm/trunk/lib/AsmParser/llvmAsmParser.y.cvs Modified: llvm/trunk/lib/AsmParser/llvmAsmParser.cpp.cvs URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/llvmAsmParser.cpp.cvs?rev=40634&r1=40633&r2=40634&view=diff ============================================================================== --- llvm/trunk/lib/AsmParser/llvmAsmParser.cpp.cvs (original) +++ llvm/trunk/lib/AsmParser/llvmAsmParser.cpp.cvs Tue Jul 31 09:41:17 2007 @@ -1526,16 +1526,16 @@ /* YYFINAL -- State number of the termination state. */ #define YYFINAL 43 /* YYLAST -- Last index in YYTABLE. */ -#define YYLAST 1527 +#define YYLAST 1553 /* YYNTOKENS -- Number of terminals. */ #define YYNTOKENS 157 /* YYNNTS -- Number of nonterminals. */ #define YYNNTS 82 /* YYNRULES -- Number of rules. */ -#define YYNRULES 305 +#define YYNRULES 304 /* YYNRULES -- Number of states. */ -#define YYNSTATES 589 +#define YYNSTATES 588 /* YYTRANSLATE(YYLEX) -- Bison symbol number corresponding to YYLEX. */ #define YYUNDEFTOK 2 @@ -1605,26 +1605,26 @@ 157, 159, 161, 162, 164, 166, 167, 169, 171, 173, 175, 176, 178, 180, 181, 183, 185, 187, 189, 191, 194, 196, 198, 200, 202, 204, 206, 208, 210, 212, - 213, 216, 218, 220, 222, 224, 226, 227, 230, 231, - 234, 235, 239, 242, 243, 245, 246, 250, 252, 255, - 257, 259, 261, 263, 265, 267, 270, 272, 275, 281, - 287, 293, 299, 303, 306, 312, 317, 320, 322, 324, - 326, 330, 332, 336, 338, 339, 341, 345, 350, 354, - 358, 363, 368, 372, 379, 385, 388, 391, 394, 397, - 400, 403, 406, 409, 412, 415, 418, 421, 428, 434, - 443, 450, 457, 465, 473, 480, 489, 498, 502, 504, - 506, 508, 510, 511, 514, 521, 523, 524, 526, 529, - 530, 534, 535, 539, 543, 547, 551, 552, 560, 561, - 570, 571, 580, 586, 589, 593, 595, 599, 603, 607, - 611, 613, 614, 620, 624, 626, 630, 632, 633, 643, - 645, 647, 652, 654, 656, 659, 663, 664, 666, 668, - 670, 672, 674, 676, 678, 680, 682, 686, 688, 694, - 696, 698, 700, 702, 704, 706, 709, 712, 715, 719, - 722, 723, 725, 728, 731, 735, 745, 755, 764, 779, - 781, 783, 790, 796, 799, 806, 814, 818, 824, 825, - 826, 830, 833, 835, 841, 847, 854, 861, 866, 873, - 878, 883, 890, 897, 900, 909, 911, 913, 914, 918, - 925, 929, 936, 939, 945, 953 + 213, 216, 218, 220, 222, 224, 225, 228, 229, 232, + 233, 237, 240, 241, 243, 244, 248, 250, 253, 255, + 257, 259, 261, 263, 265, 268, 270, 273, 279, 285, + 291, 297, 301, 304, 310, 315, 318, 320, 322, 324, + 328, 330, 334, 336, 337, 339, 343, 348, 352, 356, + 361, 366, 370, 377, 383, 386, 389, 392, 395, 398, + 401, 404, 407, 410, 413, 416, 419, 426, 432, 441, + 448, 455, 463, 471, 478, 487, 496, 500, 502, 504, + 506, 508, 509, 512, 519, 521, 522, 524, 527, 528, + 532, 533, 537, 541, 545, 549, 550, 558, 559, 568, + 569, 578, 584, 587, 591, 593, 597, 601, 605, 609, + 611, 612, 618, 622, 624, 628, 630, 631, 641, 643, + 645, 650, 652, 654, 657, 661, 662, 664, 666, 668, + 670, 672, 674, 676, 678, 680, 684, 686, 692, 694, + 696, 698, 700, 702, 704, 707, 710, 713, 717, 720, + 721, 723, 726, 729, 733, 743, 753, 762, 777, 779, + 781, 788, 794, 797, 804, 812, 816, 822, 823, 824, + 828, 831, 833, 839, 845, 852, 859, 864, 871, 876, + 881, 888, 895, 898, 907, 909, 911, 912, 916, 923, + 927, 934, 937, 943, 951 }; /* YYRHS -- A `-1'-separated list of the rules' RHS. */ @@ -1652,80 +1652,80 @@ -1, 57, 4, -1, 132, -1, 114, -1, 131, -1, 115, -1, 134, -1, 135, -1, 137, -1, 138, -1, 139, -1, -1, 179, 178, -1, 133, -1, 136, -1, - 132, -1, 131, -1, 134, -1, -1, 181, 180, -1, - -1, 50, 4, -1, -1, 144, 50, 4, -1, 31, - 19, -1, -1, 184, -1, -1, 144, 187, 186, -1, - 184, -1, 50, 4, -1, 11, -1, 12, -1, 13, - -1, 14, -1, 46, -1, 188, -1, 189, 145, -1, - 223, -1, 146, 4, -1, 189, 147, 193, 148, 181, - -1, 10, 147, 193, 148, 181, -1, 149, 4, 150, - 189, 151, -1, 152, 4, 150, 189, 153, -1, 154, - 194, 155, -1, 154, 155, -1, 152, 154, 194, 155, - 153, -1, 152, 154, 155, 153, -1, 189, 179, -1, - 189, -1, 10, -1, 190, -1, 192, 144, 190, -1, - 192, -1, 192, 144, 36, -1, 36, -1, -1, 189, - -1, 194, 144, 189, -1, 189, 149, 197, 151, -1, - 189, 149, 151, -1, 189, 156, 19, -1, 189, 152, - 197, 153, -1, 189, 154, 197, 155, -1, 189, 154, - 155, -1, 189, 152, 154, 197, 155, 153, -1, 189, - 152, 154, 155, 153, -1, 189, 37, -1, 189, 38, - -1, 189, 223, -1, 189, 196, -1, 189, 22, -1, - 163, 3, -1, 163, 5, -1, 163, 4, -1, 163, - 6, -1, 11, 23, -1, 11, 24, -1, 164, 9, - -1, 160, 147, 195, 35, 189, 148, -1, 112, 147, - 195, 234, 148, -1, 126, 147, 195, 144, 195, 144, - 195, 148, -1, 158, 147, 195, 144, 195, 148, -1, - 159, 147, 195, 144, 195, 148, -1, 85, 161, 147, - 195, 144, 195, 148, -1, 86, 162, 147, 195, 144, - 195, 148, -1, 128, 147, 195, 144, 195, 148, -1, - 129, 147, 195, 144, 195, 144, 195, 148, -1, 130, - 147, 195, 144, 195, 144, 195, 148, -1, 197, 144, - 195, -1, 195, -1, 29, -1, 30, -1, 34, -1, - -1, 191, 223, -1, 118, 147, 200, 35, 189, 148, - -1, 202, -1, -1, 203, -1, 202, 203, -1, -1, - 28, 204, 219, -1, -1, 27, 205, 220, -1, 55, - 54, 209, -1, 167, 15, 189, -1, 167, 15, 10, - -1, -1, 169, 173, 199, 198, 195, 206, 186, -1, - -1, 169, 171, 173, 199, 198, 195, 207, 186, -1, - -1, 169, 172, 173, 199, 198, 189, 208, 186, -1, - 169, 173, 32, 176, 200, -1, 48, 210, -1, 51, - 143, 211, -1, 19, -1, 49, 143, 19, -1, 63, - 143, 19, -1, 149, 212, 151, -1, 212, 144, 19, - -1, 19, -1, -1, 213, 144, 189, 179, 166, -1, - 189, 179, 166, -1, 213, -1, 213, 144, 36, -1, - 36, -1, -1, 177, 191, 168, 147, 214, 148, 181, - 185, 182, -1, 25, -1, 154, -1, 175, 173, 215, - 216, -1, 26, -1, 155, -1, 226, 218, -1, 174, - 173, 215, -1, -1, 56, -1, 3, -1, 4, -1, - 9, -1, 23, -1, 24, -1, 37, -1, 38, -1, - 22, -1, 152, 197, 153, -1, 196, -1, 54, 221, - 19, 144, 19, -1, 7, -1, 8, -1, 165, -1, - 168, -1, 223, -1, 222, -1, 189, 224, -1, 226, - 227, -1, 217, 227, -1, 228, 167, 229, -1, 228, - 231, -1, -1, 18, -1, 64, 225, -1, 64, 10, - -1, 65, 14, 224, -1, 65, 11, 224, 144, 14, - 224, 144, 14, 224, -1, 66, 163, 224, 144, 14, - 224, 149, 230, 151, -1, 66, 163, 224, 144, 14, - 224, 149, 151, -1, 67, 177, 191, 224, 147, 233, - 148, 181, 35, 14, 224, 68, 14, 224, -1, 68, - -1, 69, -1, 230, 163, 222, 144, 14, 224, -1, - 163, 222, 144, 14, 224, -1, 167, 236, -1, 189, - 149, 224, 144, 224, 151, -1, 232, 144, 149, 224, - 144, 224, 151, -1, 189, 224, 179, -1, 233, 144, - 189, 224, 179, -1, -1, -1, 234, 144, 225, -1, - 53, 52, -1, 52, -1, 158, 189, 224, 144, 224, - -1, 159, 189, 224, 144, 224, -1, 85, 161, 189, - 224, 144, 224, -1, 86, 162, 189, 224, 144, 224, - -1, 160, 225, 35, 189, -1, 126, 225, 144, 225, - 144, 225, -1, 127, 225, 144, 189, -1, 128, 225, - 144, 225, -1, 129, 225, 144, 225, 144, 225, -1, - 130, 225, 144, 225, 144, 225, -1, 125, 232, -1, - 235, 177, 191, 224, 147, 233, 148, 181, -1, 238, - -1, 33, -1, -1, 107, 189, 183, -1, 107, 189, - 144, 11, 224, 183, -1, 108, 189, 183, -1, 108, - 189, 144, 11, 224, 183, -1, 109, 225, -1, 237, - 110, 189, 224, 183, -1, 237, 111, 225, 144, 189, - 224, 183, -1, 112, 189, 224, 234, -1 + 132, -1, 131, -1, -1, 181, 180, -1, -1, 50, + 4, -1, -1, 144, 50, 4, -1, 31, 19, -1, + -1, 184, -1, -1, 144, 187, 186, -1, 184, -1, + 50, 4, -1, 11, -1, 12, -1, 13, -1, 14, + -1, 46, -1, 188, -1, 189, 145, -1, 223, -1, + 146, 4, -1, 189, 147, 193, 148, 181, -1, 10, + 147, 193, 148, 181, -1, 149, 4, 150, 189, 151, + -1, 152, 4, 150, 189, 153, -1, 154, 194, 155, + -1, 154, 155, -1, 152, 154, 194, 155, 153, -1, + 152, 154, 155, 153, -1, 189, 179, -1, 189, -1, + 10, -1, 190, -1, 192, 144, 190, -1, 192, -1, + 192, 144, 36, -1, 36, -1, -1, 189, -1, 194, + 144, 189, -1, 189, 149, 197, 151, -1, 189, 149, + 151, -1, 189, 156, 19, -1, 189, 152, 197, 153, + -1, 189, 154, 197, 155, -1, 189, 154, 155, -1, + 189, 152, 154, 197, 155, 153, -1, 189, 152, 154, + 155, 153, -1, 189, 37, -1, 189, 38, -1, 189, + 223, -1, 189, 196, -1, 189, 22, -1, 163, 3, + -1, 163, 5, -1, 163, 4, -1, 163, 6, -1, + 11, 23, -1, 11, 24, -1, 164, 9, -1, 160, + 147, 195, 35, 189, 148, -1, 112, 147, 195, 234, + 148, -1, 126, 147, 195, 144, 195, 144, 195, 148, + -1, 158, 147, 195, 144, 195, 148, -1, 159, 147, + 195, 144, 195, 148, -1, 85, 161, 147, 195, 144, + 195, 148, -1, 86, 162, 147, 195, 144, 195, 148, + -1, 128, 147, 195, 144, 195, 148, -1, 129, 147, + 195, 144, 195, 144, 195, 148, -1, 130, 147, 195, + 144, 195, 144, 195, 148, -1, 197, 144, 195, -1, + 195, -1, 29, -1, 30, -1, 34, -1, -1, 191, + 223, -1, 118, 147, 200, 35, 189, 148, -1, 202, + -1, -1, 203, -1, 202, 203, -1, -1, 28, 204, + 219, -1, -1, 27, 205, 220, -1, 55, 54, 209, + -1, 167, 15, 189, -1, 167, 15, 10, -1, -1, + 169, 173, 199, 198, 195, 206, 186, -1, -1, 169, + 171, 173, 199, 198, 195, 207, 186, -1, -1, 169, + 172, 173, 199, 198, 189, 208, 186, -1, 169, 173, + 32, 176, 200, -1, 48, 210, -1, 51, 143, 211, + -1, 19, -1, 49, 143, 19, -1, 63, 143, 19, + -1, 149, 212, 151, -1, 212, 144, 19, -1, 19, + -1, -1, 213, 144, 189, 179, 166, -1, 189, 179, + 166, -1, 213, -1, 213, 144, 36, -1, 36, -1, + -1, 177, 191, 168, 147, 214, 148, 181, 185, 182, + -1, 25, -1, 154, -1, 175, 173, 215, 216, -1, + 26, -1, 155, -1, 226, 218, -1, 174, 173, 215, + -1, -1, 56, -1, 3, -1, 4, -1, 9, -1, + 23, -1, 24, -1, 37, -1, 38, -1, 22, -1, + 152, 197, 153, -1, 196, -1, 54, 221, 19, 144, + 19, -1, 7, -1, 8, -1, 165, -1, 168, -1, + 223, -1, 222, -1, 189, 224, -1, 226, 227, -1, + 217, 227, -1, 228, 167, 229, -1, 228, 231, -1, + -1, 18, -1, 64, 225, -1, 64, 10, -1, 65, + 14, 224, -1, 65, 11, 224, 144, 14, 224, 144, + 14, 224, -1, 66, 163, 224, 144, 14, 224, 149, + 230, 151, -1, 66, 163, 224, 144, 14, 224, 149, + 151, -1, 67, 177, 191, 224, 147, 233, 148, 181, + 35, 14, 224, 68, 14, 224, -1, 68, -1, 69, + -1, 230, 163, 222, 144, 14, 224, -1, 163, 222, + 144, 14, 224, -1, 167, 236, -1, 189, 149, 224, + 144, 224, 151, -1, 232, 144, 149, 224, 144, 224, + 151, -1, 189, 224, 179, -1, 233, 144, 189, 224, + 179, -1, -1, -1, 234, 144, 225, -1, 53, 52, + -1, 52, -1, 158, 189, 224, 144, 224, -1, 159, + 189, 224, 144, 224, -1, 85, 161, 189, 224, 144, + 224, -1, 86, 162, 189, 224, 144, 224, -1, 160, + 225, 35, 189, -1, 126, 225, 144, 225, 144, 225, + -1, 127, 225, 144, 189, -1, 128, 225, 144, 225, + -1, 129, 225, 144, 225, 144, 225, -1, 130, 225, + 144, 225, 144, 225, -1, 125, 232, -1, 235, 177, + 191, 224, 147, 233, 148, 181, -1, 238, -1, 33, + -1, -1, 107, 189, 183, -1, 107, 189, 144, 11, + 224, 183, -1, 108, 189, 183, -1, 108, 189, 144, + 11, 224, 183, -1, 109, 225, -1, 237, 110, 189, + 224, 183, -1, 237, 111, 225, 144, 189, 224, 183, + -1, 112, 189, 224, 234, -1 }; /* YYRLINE[YYN] -- source line where rule number YYN was defined. */ @@ -1742,26 +1742,26 @@ 1190, 1191, 1195, 1196, 1197, 1201, 1202, 1203, 1204, 1205, 1209, 1210, 1211, 1214, 1215, 1216, 1217, 1218, 1219, 1220, 1227, 1228, 1229, 1230, 1231, 1232, 1233, 1234, 1235, 1238, - 1239, 1244, 1245, 1246, 1247, 1248, 1251, 1252, 1259, 1260, - 1266, 1267, 1275, 1283, 1284, 1289, 1290, 1291, 1296, 1309, - 1309, 1309, 1309, 1312, 1316, 1320, 1327, 1332, 1340, 1370, - 1401, 1406, 1418, 1428, 1432, 1442, 1449, 1456, 1463, 1468, - 1473, 1480, 1481, 1488, 1495, 1503, 1509, 1521, 1549, 1565, - 1592, 1620, 1646, 1666, 1692, 1712, 1724, 1731, 1797, 1807, - 1817, 1823, 1833, 1839, 1849, 1854, 1859, 1867, 1879, 1901, - 1909, 1915, 1926, 1931, 1936, 1942, 1948, 1957, 1961, 1969, - 1969, 1972, 1972, 1975, 1986, 2007, 2012, 2020, 2021, 2025, - 2025, 2029, 2029, 2032, 2035, 2059, 2070, 2070, 2081, 2080, - 2090, 2089, 2100, 2119, 2122, 2128, 2138, 2142, 2147, 2149, - 2154, 2159, 2168, 2178, 2189, 2193, 2202, 2211, 2216, 2337, - 2337, 2339, 2348, 2348, 2350, 2355, 2367, 2371, 2376, 2380, - 2384, 2388, 2392, 2396, 2400, 2404, 2408, 2433, 2437, 2447, - 2451, 2455, 2460, 2467, 2467, 2473, 2482, 2486, 2495, 2504, - 2513, 2517, 2524, 2528, 2532, 2537, 2547, 2566, 2575, 2655, - 2659, 2666, 2677, 2690, 2700, 2711, 2721, 2730, 2739, 2742, - 2743, 2750, 2754, 2759, 2780, 2797, 2811, 2825, 2837, 2845, - 2852, 2858, 2864, 2870, 2885, 2970, 2975, 2979, 2986, 2993, - 3001, 3008, 3016, 3024, 3038, 3055 + 1239, 1244, 1245, 1246, 1247, 1250, 1251, 1258, 1259, 1265, + 1266, 1274, 1282, 1283, 1288, 1289, 1290, 1295, 1308, 1308, + 1308, 1308, 1311, 1315, 1319, 1326, 1331, 1339, 1369, 1400, + 1405, 1417, 1427, 1431, 1441, 1448, 1455, 1462, 1467, 1472, + 1479, 1480, 1487, 1494, 1502, 1508, 1520, 1548, 1564, 1591, + 1619, 1645, 1665, 1691, 1711, 1723, 1730, 1796, 1806, 1816, + 1822, 1832, 1838, 1848, 1853, 1858, 1866, 1878, 1900, 1908, + 1914, 1925, 1930, 1935, 1941, 1947, 1956, 1960, 1968, 1968, + 1971, 1971, 1974, 1985, 2006, 2011, 2019, 2020, 2024, 2024, + 2028, 2028, 2031, 2034, 2058, 2069, 2069, 2080, 2079, 2089, + 2088, 2099, 2118, 2121, 2127, 2137, 2141, 2146, 2148, 2153, + 2158, 2167, 2177, 2188, 2192, 2201, 2210, 2215, 2336, 2336, + 2338, 2347, 2347, 2349, 2354, 2366, 2370, 2375, 2379, 2383, + 2387, 2391, 2395, 2399, 2403, 2407, 2432, 2436, 2446, 2450, + 2454, 2459, 2466, 2466, 2472, 2481, 2485, 2494, 2503, 2512, + 2516, 2523, 2527, 2531, 2536, 2546, 2565, 2574, 2654, 2658, + 2665, 2676, 2689, 2699, 2710, 2720, 2729, 2738, 2741, 2742, + 2749, 2753, 2758, 2779, 2796, 2810, 2824, 2836, 2844, 2851, + 2857, 2863, 2869, 2884, 2969, 2974, 2978, 2985, 2992, 3000, + 3007, 3015, 3023, 3037, 3054 }; #endif @@ -1853,26 +1853,26 @@ 173, 173, 174, 174, 174, 175, 175, 175, 175, 175, 176, 176, 176, 177, 177, 177, 177, 177, 177, 177, 178, 178, 178, 178, 178, 178, 178, 178, 178, 179, - 179, 180, 180, 180, 180, 180, 181, 181, 182, 182, - 183, 183, 184, 185, 185, 186, 186, 187, 187, 188, - 188, 188, 188, 189, 189, 189, 189, 189, 189, 189, - 189, 189, 189, 189, 189, 189, 190, 191, 191, 192, - 192, 193, 193, 193, 193, 194, 194, 195, 195, 195, + 179, 180, 180, 180, 180, 181, 181, 182, 182, 183, + 183, 184, 185, 185, 186, 186, 187, 187, 188, 188, + 188, 188, 189, 189, 189, 189, 189, 189, 189, 189, + 189, 189, 189, 189, 189, 190, 191, 191, 192, 192, + 193, 193, 193, 193, 194, 194, 195, 195, 195, 195, 195, 195, 195, 195, 195, 195, 195, 195, 195, 195, - 195, 195, 195, 195, 195, 195, 195, 196, 196, 196, - 196, 196, 196, 196, 196, 196, 196, 197, 197, 198, - 198, 199, 199, 200, 200, 201, 201, 202, 202, 204, - 203, 205, 203, 203, 203, 203, 206, 203, 207, 203, - 208, 203, 203, 203, 203, 209, 210, 210, 211, 212, - 212, 212, 213, 213, 214, 214, 214, 214, 215, 216, - 216, 217, 218, 218, 219, 220, 221, 221, 222, 222, - 222, 222, 222, 222, 222, 222, 222, 222, 222, 223, - 223, 223, 223, 224, 224, 225, 226, 226, 227, 228, - 228, 228, 229, 229, 229, 229, 229, 229, 229, 229, - 229, 230, 230, 231, 232, 232, 233, 233, 233, 234, - 234, 235, 235, 236, 236, 236, 236, 236, 236, 236, - 236, 236, 236, 236, 236, 236, 237, 237, 238, 238, - 238, 238, 238, 238, 238, 238 + 195, 195, 195, 195, 195, 195, 196, 196, 196, 196, + 196, 196, 196, 196, 196, 196, 197, 197, 198, 198, + 199, 199, 200, 200, 201, 201, 202, 202, 204, 203, + 205, 203, 203, 203, 203, 206, 203, 207, 203, 208, + 203, 203, 203, 203, 209, 210, 210, 211, 212, 212, + 212, 213, 213, 214, 214, 214, 214, 215, 216, 216, + 217, 218, 218, 219, 220, 221, 221, 222, 222, 222, + 222, 222, 222, 222, 222, 222, 222, 222, 223, 223, + 223, 223, 224, 224, 225, 226, 226, 227, 228, 228, + 228, 229, 229, 229, 229, 229, 229, 229, 229, 229, + 230, 230, 231, 232, 232, 233, 233, 233, 234, 234, + 235, 235, 236, 236, 236, 236, 236, 236, 236, 236, + 236, 236, 236, 236, 236, 237, 237, 238, 238, 238, + 238, 238, 238, 238, 238 }; /* YYR2[YYN] -- Number of symbols composing right hand side of rule YYN. */ @@ -1889,26 +1889,26 @@ 1, 1, 0, 1, 1, 0, 1, 1, 1, 1, 0, 1, 1, 0, 1, 1, 1, 1, 1, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, - 2, 1, 1, 1, 1, 1, 0, 2, 0, 2, - 0, 3, 2, 0, 1, 0, 3, 1, 2, 1, - 1, 1, 1, 1, 1, 2, 1, 2, 5, 5, - 5, 5, 3, 2, 5, 4, 2, 1, 1, 1, - 3, 1, 3, 1, 0, 1, 3, 4, 3, 3, - 4, 4, 3, 6, 5, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 6, 5, 8, - 6, 6, 7, 7, 6, 8, 8, 3, 1, 1, - 1, 1, 0, 2, 6, 1, 0, 1, 2, 0, - 3, 0, 3, 3, 3, 3, 0, 7, 0, 8, - 0, 8, 5, 2, 3, 1, 3, 3, 3, 3, - 1, 0, 5, 3, 1, 3, 1, 0, 9, 1, - 1, 4, 1, 1, 2, 3, 0, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 3, 1, 5, 1, - 1, 1, 1, 1, 1, 2, 2, 2, 3, 2, - 0, 1, 2, 2, 3, 9, 9, 8, 14, 1, - 1, 6, 5, 2, 6, 7, 3, 5, 0, 0, - 3, 2, 1, 5, 5, 6, 6, 4, 6, 4, - 4, 6, 6, 2, 8, 1, 1, 0, 3, 6, - 3, 6, 2, 5, 7, 4 + 2, 1, 1, 1, 1, 0, 2, 0, 2, 0, + 3, 2, 0, 1, 0, 3, 1, 2, 1, 1, + 1, 1, 1, 1, 2, 1, 2, 5, 5, 5, + 5, 3, 2, 5, 4, 2, 1, 1, 1, 3, + 1, 3, 1, 0, 1, 3, 4, 3, 3, 4, + 4, 3, 6, 5, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 6, 5, 8, 6, + 6, 7, 7, 6, 8, 8, 3, 1, 1, 1, + 1, 0, 2, 6, 1, 0, 1, 2, 0, 3, + 0, 3, 3, 3, 3, 0, 7, 0, 8, 0, + 8, 5, 2, 3, 1, 3, 3, 3, 3, 1, + 0, 5, 3, 1, 3, 1, 0, 9, 1, 1, + 4, 1, 1, 2, 3, 0, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 3, 1, 5, 1, 1, + 1, 1, 1, 1, 2, 2, 2, 3, 2, 0, + 1, 2, 2, 3, 9, 9, 8, 14, 1, 1, + 6, 5, 2, 6, 7, 3, 5, 0, 0, 3, + 2, 1, 5, 5, 6, 6, 4, 6, 4, 4, + 6, 6, 2, 8, 1, 1, 0, 3, 6, 3, + 6, 2, 5, 7, 4 }; /* YYDEFACT[STATE-NAME] -- Default rule to reduce with in state @@ -1916,478 +1916,484 @@ means the default is an error. */ static const unsigned short int yydefact[] = { - 68, 58, 65, 59, 66, 60, 201, 199, 0, 0, - 0, 0, 0, 0, 78, 67, 0, 68, 197, 82, - 85, 0, 0, 213, 0, 0, 63, 0, 69, 70, + 68, 58, 65, 59, 66, 60, 200, 198, 0, 0, + 0, 0, 0, 0, 78, 67, 0, 68, 196, 82, + 85, 0, 0, 212, 0, 0, 63, 0, 69, 70, 72, 71, 73, 75, 74, 76, 77, 79, 80, 81, - 78, 78, 192, 1, 198, 83, 84, 78, 202, 86, - 87, 88, 89, 78, 260, 200, 260, 0, 0, 221, - 214, 215, 203, 249, 250, 205, 129, 130, 131, 132, - 133, 0, 0, 0, 0, 251, 252, 134, 204, 136, - 192, 192, 90, 191, 0, 93, 93, 261, 257, 64, - 232, 233, 234, 256, 216, 217, 220, 0, 154, 137, - 0, 0, 0, 0, 143, 155, 0, 135, 154, 0, - 0, 92, 91, 0, 189, 190, 0, 0, 94, 95, - 96, 97, 98, 0, 235, 0, 297, 259, 0, 218, - 153, 109, 149, 151, 0, 0, 0, 0, 0, 0, - 142, 0, 0, 0, 148, 0, 147, 0, 212, 129, - 130, 131, 0, 0, 0, 206, 99, 0, 229, 230, - 231, 296, 282, 0, 0, 0, 0, 93, 269, 270, + 78, 78, 191, 1, 197, 83, 84, 78, 201, 86, + 87, 88, 89, 78, 259, 199, 259, 0, 0, 220, + 213, 214, 202, 248, 249, 204, 128, 129, 130, 131, + 132, 0, 0, 0, 0, 250, 251, 133, 203, 135, + 191, 191, 90, 190, 0, 93, 93, 260, 256, 64, + 231, 232, 233, 255, 215, 216, 219, 0, 153, 136, + 0, 0, 0, 0, 142, 154, 0, 134, 153, 0, + 0, 92, 91, 0, 188, 189, 0, 0, 94, 95, + 96, 97, 98, 0, 234, 0, 296, 258, 0, 217, + 152, 109, 148, 150, 0, 0, 0, 0, 0, 0, + 141, 0, 0, 0, 147, 0, 146, 0, 211, 128, + 129, 130, 0, 0, 0, 205, 99, 0, 228, 229, + 230, 295, 281, 0, 0, 0, 0, 93, 268, 269, 2, 3, 4, 5, 6, 7, 8, 9, 10, 14, 15, 16, 11, 12, 13, 0, 0, 0, 0, 0, 0, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 258, 93, 273, 0, 295, 219, 146, 0, - 116, 0, 0, 145, 0, 156, 116, 208, 210, 0, - 193, 174, 175, 170, 172, 171, 173, 176, 169, 165, - 166, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 168, 167, 125, 0, 281, - 263, 0, 262, 0, 0, 55, 0, 0, 29, 30, + 0, 0, 257, 93, 272, 0, 294, 218, 145, 0, + 115, 0, 0, 144, 0, 155, 115, 207, 209, 0, + 192, 173, 174, 169, 171, 170, 172, 175, 168, 164, + 165, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 167, 166, 124, 0, 280, + 262, 0, 261, 0, 0, 55, 0, 0, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 0, 53, 54, 49, 50, 51, 52, 39, 40, 41, 42, 43, - 44, 45, 46, 47, 48, 0, 120, 120, 302, 0, - 0, 293, 0, 0, 0, 0, 0, 0, 0, 0, + 44, 45, 46, 47, 48, 0, 119, 119, 301, 0, + 0, 292, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 101, 103, 102, 100, 104, 105, 106, - 107, 108, 110, 152, 150, 139, 140, 141, 144, 138, - 125, 125, 0, 0, 0, 0, 0, 0, 0, 0, - 158, 188, 0, 0, 0, 162, 0, 159, 0, 0, - 0, 0, 207, 227, 238, 239, 240, 245, 241, 242, - 243, 244, 236, 0, 247, 254, 253, 255, 0, 264, - 0, 0, 0, 0, 0, 298, 0, 300, 279, 0, + 107, 108, 110, 151, 149, 138, 139, 140, 143, 137, + 124, 124, 0, 0, 0, 0, 0, 0, 0, 0, + 157, 187, 0, 0, 0, 161, 0, 158, 0, 0, + 0, 0, 206, 226, 237, 238, 239, 244, 240, 241, + 242, 243, 235, 0, 246, 253, 252, 254, 0, 263, + 0, 0, 0, 0, 0, 297, 0, 299, 278, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 114, 113, 111, 115, 112, 117, 209, 211, - 0, 0, 0, 279, 0, 0, 0, 0, 0, 157, - 143, 155, 0, 160, 161, 0, 0, 0, 0, 0, - 127, 125, 226, 109, 224, 0, 237, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 305, 0, 0, - 0, 289, 290, 0, 0, 0, 0, 287, 0, 120, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 187, - 164, 0, 0, 0, 0, 122, 128, 126, 62, 0, - 116, 0, 246, 0, 0, 278, 0, 0, 120, 121, - 120, 0, 0, 0, 0, 0, 0, 283, 284, 278, - 0, 303, 0, 194, 0, 0, 178, 0, 0, 0, - 0, 163, 0, 0, 0, 61, 223, 225, 109, 123, - 0, 0, 0, 0, 0, 285, 286, 299, 301, 280, - 0, 0, 288, 291, 292, 0, 120, 0, 0, 0, - 184, 0, 0, 180, 181, 177, 62, 124, 118, 248, - 0, 0, 109, 0, 116, 274, 0, 116, 304, 182, - 183, 0, 0, 0, 222, 0, 228, 0, 267, 0, - 0, 276, 0, 0, 275, 294, 179, 185, 186, 119, - 265, 0, 266, 0, 109, 0, 0, 0, 277, 0, - 0, 0, 0, 272, 0, 0, 271, 0, 268 + 0, 0, 114, 113, 111, 112, 116, 208, 210, 0, + 0, 0, 278, 0, 0, 0, 0, 0, 156, 142, + 154, 0, 159, 160, 0, 0, 0, 0, 0, 126, + 124, 225, 109, 223, 0, 236, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 304, 0, 0, 0, + 288, 289, 0, 0, 0, 0, 286, 0, 119, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 186, 163, + 0, 0, 0, 0, 121, 127, 125, 62, 0, 115, + 0, 245, 0, 0, 277, 0, 0, 119, 120, 119, + 0, 0, 0, 0, 0, 0, 282, 283, 277, 0, + 302, 0, 193, 0, 0, 177, 0, 0, 0, 0, + 162, 0, 0, 0, 61, 222, 224, 109, 122, 0, + 0, 0, 0, 0, 284, 285, 298, 300, 279, 0, + 0, 287, 290, 291, 0, 119, 0, 0, 0, 183, + 0, 0, 179, 180, 176, 62, 123, 117, 247, 0, + 0, 109, 0, 115, 273, 0, 115, 303, 181, 182, + 0, 0, 0, 221, 0, 227, 0, 266, 0, 0, + 275, 0, 0, 274, 293, 178, 184, 185, 118, 264, + 0, 265, 0, 109, 0, 0, 0, 276, 0, 0, + 0, 0, 271, 0, 0, 270, 0, 267 }; /* YYDEFGOTO[NTERM-NUM]. */ static const short int yydefgoto[] = { - -1, 252, 253, 254, 278, 295, 152, 153, 75, 506, + -1, 252, 253, 254, 278, 295, 152, 153, 75, 505, 12, 76, 14, 15, 40, 41, 42, 47, 53, 113, - 123, 322, 218, 397, 325, 556, 375, 420, 538, 352, - 421, 77, 154, 132, 147, 133, 134, 106, 341, 364, + 123, 322, 218, 396, 325, 555, 375, 419, 537, 352, + 420, 77, 154, 132, 147, 133, 134, 106, 341, 364, 342, 116, 84, 148, 16, 17, 18, 20, 19, 257, - 330, 331, 62, 23, 60, 97, 424, 425, 124, 160, - 54, 92, 55, 48, 427, 365, 79, 367, 262, 56, - 88, 89, 212, 560, 127, 301, 514, 437, 213, 214, + 330, 331, 62, 23, 60, 97, 423, 424, 124, 160, + 54, 92, 55, 48, 426, 365, 79, 367, 262, 56, + 88, 89, 212, 559, 127, 301, 513, 436, 213, 214, 215, 216 }; /* YYPACT[STATE-NUM] -- Index in YYTABLE of the portion describing STATE-NUM. */ -#define YYPACT_NINF -513 +#define YYPACT_NINF -522 static const short int yypact[] = { - 414, -513, -513, -513, -513, -513, -513, -513, -7, -92, - 5, -42, 130, 11, 223, -513, 148, 484, -513, 131, - 102, 47, 62, -513, 60, 141, -513, 1169, -513, -513, - -513, -513, -513, -513, -513, -513, -513, -513, -513, -513, - 147, 147, 226, -513, -513, -513, -513, 147, -513, -513, - -513, -513, -513, 147, 199, -513, -8, 201, 211, 217, - -513, -513, -513, -513, -513, 93, -513, -513, -513, -513, - -513, 241, 247, 4, 811, -513, -513, -513, 162, -513, - 242, 242, 275, -513, 49, 167, 167, -513, -513, 279, - -513, -513, -513, -513, -513, -513, -513, -49, 928, -513, - 133, 143, 851, 93, -513, 162, -125, -513, 928, 49, - 49, -513, -513, 965, -513, -513, 1188, 293, -513, -513, - -513, -513, -513, 1225, -513, -10, 1384, -513, 283, -513, - -513, 162, -513, 166, 174, 1262, 1262, 172, -89, 1262, - -513, 178, 1188, 1262, 93, 168, 162, 33, -513, 40, - 319, 320, 125, 321, 631, -513, -513, 76, -513, -513, - -513, -513, -513, 280, 1336, 108, 324, 167, -513, -513, - -513, -513, -513, -513, -513, -513, -513, -513, -513, -513, - -513, -513, -513, -513, -513, 704, 474, 1262, 1262, 1262, - 1262, -513, -513, -513, -513, -513, -513, -513, -513, -513, - -513, -513, -513, 1262, 1262, 1262, 1262, 1262, 1262, 1262, - 1262, 1262, -513, 167, -513, 26, -513, -513, 252, 1002, - -513, -33, -72, -513, 185, 162, -513, -513, 162, 965, - -513, -513, -513, -513, -513, -513, -513, -513, -513, -513, - -513, 704, 474, 184, 192, 200, 202, 204, 1077, 1373, - 891, 327, 206, 207, 213, -513, -513, 224, 214, -513, - 93, 472, -513, 606, 606, -513, 606, 1225, -513, -513, - -513, -513, -513, -513, -513, -513, -513, -513, 1262, -513, - -513, -513, -513, -513, -513, -513, -513, -513, -513, -513, - -513, -513, -513, -513, -513, 1262, 57, 128, -513, 472, - 99, 225, 227, 228, 231, 232, 234, 472, 472, 335, - 1225, 1262, 1262, -513, -513, -513, -513, -513, -513, -513, - -513, -513, -513, -513, -513, 123, -513, -513, -513, 123, - 224, 224, 344, 233, 235, 1188, 1188, 1188, 1188, 1188, - -513, -513, -45, 909, -79, -513, -67, -513, 1188, 1188, - 1188, -11, -513, 1114, -513, -513, -513, -513, -513, -513, - -513, -513, 329, 1188, -513, -513, -513, -513, 244, -513, - 248, 606, 472, 472, 12, -513, 17, -513, -513, 606, - 245, 1262, 1262, 1262, 1262, 1262, 249, 251, 1262, 606, - 472, 257, -513, -513, -513, -513, -513, -513, -513, -513, - 1262, 1188, 1188, -513, 258, 259, 262, 263, 1188, -513, - 255, 631, -61, -513, -513, 265, 266, 376, 393, 409, - -513, 224, -513, 162, 271, 268, -513, 399, -73, 405, - 406, 274, 281, 282, 606, 419, 606, 284, 288, 606, - 301, 162, -513, 302, 304, 606, 606, 162, 303, 307, - 1262, 8, 308, 309, -40, 1188, 1188, 1188, 1188, -513, - -513, 311, 1188, 1188, 1262, -513, -513, -513, 84, 1151, - -513, 310, -513, 606, 606, 1262, 606, 606, 307, -513, - 307, 1262, 606, 312, 1262, 1262, 1262, -513, -513, 1262, - 377, -513, 472, -513, 1188, 1188, -513, 313, 318, 317, - 323, -513, 322, 330, 156, -513, -513, -513, 162, 39, - 453, 333, 334, 472, -37, -513, -513, -513, -513, -513, - 331, 606, -513, -513, -513, -28, 307, 337, 338, 1188, - -513, 1188, 1188, -513, -513, -513, 84, -513, 437, -513, - 476, 1, -513, 1262, -513, -513, 351, -513, -513, -513, - -513, 358, 359, 360, -513, 509, -513, 606, -513, 766, - 18, 252, 472, 55, -513, 123, -513, -513, -513, -513, - -513, 370, -513, 766, -513, 501, 502, 374, 252, 606, - 606, 505, 452, -513, 606, 507, -513, 606, -513 + 40, -522, -522, -522, -522, -522, -522, -522, -24, -105, + -4, -80, 60, -32, 461, -522, 134, 1386, -522, 153, + 150, 1, 15, -522, 16, 130, -522, 1208, -522, -522, + -522, -522, -522, -522, -522, -522, -522, -522, -522, -522, + 126, 126, 239, -522, -522, -522, -522, 126, -522, -522, + -522, -522, -522, 126, 158, -522, -7, 168, 183, 194, + -522, -522, -522, -522, -522, 45, -522, -522, -522, -522, + -522, 212, 226, 6, 198, -522, -522, -522, 127, -522, + 204, 204, 248, -522, 218, 113, 113, -522, -522, 135, + -522, -522, -522, -522, -522, -522, -522, -44, 1006, -522, + 101, 107, 371, 45, -522, 127, -103, -522, 1006, 218, + 218, -522, -522, 1043, -522, -522, 1223, 259, -522, -522, + -522, -522, -522, 1274, -522, -13, 1423, -522, 269, -522, + -522, 127, -522, 162, 146, 1305, 1305, 144, -101, 1305, + -522, 159, 1223, 1305, 45, 161, 127, 85, -522, 41, + 301, 302, 250, 304, 782, -522, -522, 79, -522, -522, + -522, -522, -522, 263, 1320, 193, 305, 113, -522, -522, + -522, -522, -522, -522, -522, -522, -522, -522, -522, -522, + -522, -522, -522, -522, -522, 133, 456, 1305, 1305, 1305, + 1305, -522, -522, -522, -522, -522, -522, -522, -522, -522, + -522, -522, -522, 1305, 1305, 1305, 1305, 1305, 1305, 1305, + 1305, 1305, -522, 113, -522, 165, -522, -522, 519, 1060, + -522, -18, -33, -522, 166, 127, -522, -522, 127, 1043, + -522, -522, -522, -522, -522, -522, -522, -522, -522, -522, + -522, 133, 456, 171, 174, 175, 177, 178, 1111, 1371, + 579, 307, 181, 182, 184, -522, -522, 186, 187, -522, + 45, 623, -522, 757, 757, -522, 757, 1274, -522, -522, + -522, -522, -522, -522, -522, -522, -522, -522, 1305, -522, + -522, -522, -522, -522, -522, -522, -522, -522, -522, -522, + -522, -522, -522, -522, -522, 1305, 98, 114, -522, 623, + -64, 195, 196, 201, 202, 210, 216, 623, 623, 303, + 1274, 1305, 1305, -522, -522, -522, -522, -522, -522, -522, + -522, -522, -522, -522, -522, 104, -522, -522, -522, 104, + 186, 186, 313, 190, 214, 1223, 1223, 1223, 1223, 1223, + -522, -522, -36, 962, -111, -522, -78, -522, 1223, 1223, + 1223, 3, -522, 1126, -522, -522, -522, -522, -522, -522, + -522, -522, 308, 1223, -522, -522, -522, -522, 219, -522, + 221, 757, 623, 623, 20, -522, 21, -522, -522, 757, + 225, 1305, 1305, 1305, 1305, 1305, 224, 227, 1305, 757, + 623, 231, -522, -522, -522, -522, -522, -522, -522, 1305, + 1223, 1223, -522, 233, 242, 245, 249, 1223, -522, 217, + 782, -65, -522, -522, 256, 257, 359, 386, 402, -522, + 186, -522, 127, 265, 264, -522, 394, -75, 400, 401, + 271, 275, 276, 757, 418, 757, 282, 285, 757, 289, + 127, -522, 290, 296, 757, 757, 127, 294, 300, 1305, + -29, 306, 309, -50, 1223, 1223, 1223, 1223, -522, -522, + 292, 1223, 1223, 1305, -522, -522, -522, 293, 1157, -522, + 311, -522, 757, 757, 1305, 757, 757, 300, -522, 300, + 1305, 757, 312, 1305, 1305, 1305, -522, -522, 1305, 397, + -522, 623, -522, 1223, 1223, -522, 316, 315, 317, 320, + -522, 318, 321, 117, -522, -522, -522, 127, -1, 430, + 324, 322, 623, -8, -522, -522, -522, -522, -522, 314, + 757, -522, -522, -522, -5, 300, 329, 330, 1223, -522, + 1223, 1223, -522, -522, -522, 293, -522, 431, -522, 437, + 2, -522, 1305, -522, -522, 332, -522, -522, -522, -522, + 336, 337, 338, -522, 448, -522, 757, -522, 917, 4, + 519, 623, 14, -522, 104, -522, -522, -522, -522, -522, + 343, -522, 917, -522, 474, 475, 346, 519, 757, 757, + 477, 426, -522, 757, 481, -522, 757, -522 }; /* YYPGOTO[NTERM-NUM]. */ static const short int yypgoto[] = { - -513, 396, 397, 398, 286, 287, -164, -513, 0, -6, - 436, 9, -513, -513, -513, -513, 45, -513, -513, -513, - -156, -513, -417, -513, -223, -513, -284, 19, -513, -294, - -513, -513, -26, 314, -118, -513, 423, 432, -58, -150, - -228, 104, 239, 332, -513, -513, 520, -513, -513, -513, - -513, -513, -513, -513, -513, -513, -513, -513, 454, -513, - -513, -513, -513, -513, -513, -512, -140, -239, -173, -513, - 482, -513, -513, -513, -513, -513, 52, 157, -513, -513, - -513, -513 + -522, 370, 372, 373, 266, 255, -164, -522, 0, -25, + 420, 9, -522, -522, -522, -522, 33, -522, -522, -522, + -151, -522, -404, -522, -223, -522, -291, 5, -522, -295, + -522, -522, -26, 295, -115, -522, 403, 410, -58, -150, + -221, 173, 222, 286, -522, -522, 501, -522, -522, -522, + -522, -522, -522, -522, -522, -522, -522, -522, 433, -522, + -522, -522, -522, -522, -522, -521, -140, 103, -184, -522, + 465, -522, -522, -522, -522, -522, 34, 122, -522, -522, + -522, -522 }; /* YYTABLE[YYPACT[STATE-NUM]]. What to do in state STATE-NUM. If positive, shift that token. If negative, reduce the rule which number is the opposite. If zero, do what YYDEFACT says. If YYTABLE_NINF, syntax error. */ -#define YYTABLE_NINF -197 +#define YYTABLE_NINF -196 static const short int yytable[] = { - 11, 78, 266, 329, 255, 157, 468, 230, 101, 13, - 87, 267, 265, 377, 256, 158, 298, 11, 90, 139, - 418, 344, 346, 434, 368, 369, 13, 370, 436, 265, - 140, 302, 303, 304, 305, 306, 398, 399, 309, 419, - 63, 64, 21, -55, -55, -55, -55, 571, 105, 1, - 2, 24, 3, 4, 5, 139, 22, 310, 155, 25, - 378, 577, 435, 231, 232, 408, 224, 435, 386, 387, - 418, 408, 131, 107, 413, 108, 105, 408, 114, 115, - 472, 327, 131, 408, 227, 80, 81, 146, 414, 11, - 575, 536, 85, 2, 461, 128, 4, 146, 86, 408, - 1, 26, 129, 3, 481, 5, 409, 543, 496, 221, - 222, 544, 107, 225, 108, 412, 543, 228, 326, 263, - 547, 366, 264, 366, 366, 561, 366, 467, 233, 234, - 235, 236, 431, 432, 433, 428, 311, 312, 261, 391, - 438, 49, 50, 51, 159, 27, 52, 91, 43, 371, - 448, 449, 558, 107, 28, 108, 493, 578, 102, 366, - 61, 296, 297, 261, 299, 491, 258, 366, 366, 572, - 392, 393, 394, 395, 45, 396, 46, 300, 261, 261, - 261, 261, 261, 307, 308, 261, 392, 393, 394, 395, - 57, 396, 389, 131, 517, 478, 518, 480, 313, 314, - 483, 374, 107, 146, 108, 58, 487, 488, 440, 59, - 442, 443, 444, 142, 143, 315, 316, 87, 317, 318, - 94, 319, 320, 321, 117, 118, 119, 120, 121, 122, - 95, 366, 366, 366, 511, 512, 96, 515, 516, 366, - 98, 146, 548, 520, 107, 99, 108, 509, 379, 366, - 366, 100, 372, 526, 392, 393, 394, 395, 82, 396, - 83, 255, 29, 30, 31, 32, 33, 34, 35, 373, - 36, 256, 376, 107, 542, 108, 83, 403, 404, 405, - 406, 407, 546, 135, 146, 390, 261, 37, 38, 39, - 415, 416, 417, 136, 366, 1, 366, 156, 3, 366, - 5, 107, 217, 108, 535, 366, 366, 107, 519, 108, - 219, 522, 523, 524, 111, 229, 112, 411, 570, 109, - 110, 563, 220, 574, 565, 223, 226, 423, -56, -57, - 237, 335, 259, 366, 366, 265, 366, 366, 328, 336, - 582, 583, 366, 452, 453, 586, 347, 337, 588, 338, - 459, 339, 366, 348, 349, 261, 441, 261, 261, 261, - 350, 353, 447, 37, 38, 39, 313, 314, 351, 380, - 388, 381, 382, 366, 451, 383, 384, 559, 385, 400, - 401, 366, 402, 315, 316, 426, 317, 318, 429, 319, - 320, 321, 430, 445, 439, 446, 573, 497, 498, 499, - 500, 450, 455, 456, 502, 503, 457, 458, 460, 462, - 463, 464, 465, 466, -196, 469, 470, 366, 471, 473, - 474, 475, 366, 479, 492, 476, 477, 435, 481, -64, - 1, 2, 482, 3, 4, 5, 527, 528, 504, 366, - 366, 6, 7, 508, 366, 484, 485, 366, 486, 513, - 489, 490, 494, 495, 510, 261, 521, 529, 261, 261, - 261, 531, 8, 513, 501, 9, 530, 532, 505, 10, - 533, 551, 539, 552, 553, 354, 355, 540, 534, 63, - 64, 356, 545, 541, -195, 549, 550, 555, 1, 2, - 557, 3, 4, 5, 357, 358, 359, 279, 280, -64, - 1, 2, 564, 3, 4, 5, 566, 567, 568, 360, - 361, 6, 7, 569, 576, 579, 580, 562, 581, 584, - 585, 587, 209, 210, 211, 126, 362, 333, 537, 334, - 554, 141, 8, 324, 138, 9, 505, 44, 93, 10, - 125, 525, 170, 171, 172, 173, 174, 175, 176, 177, - 178, 179, 180, 181, 182, 183, 184, 241, 242, 0, - 454, 332, 0, 0, 0, 0, 0, 281, 282, 283, - 284, 285, 286, 287, 288, 289, 290, 291, 292, 293, - 294, 0, 0, 0, 243, 191, 192, 193, 194, 195, - 196, 197, 198, 199, 200, 201, 202, 0, 244, 0, - 245, 246, 247, 0, 0, 0, 0, 0, 0, 354, - 355, 0, 0, 63, 64, 356, 0, 107, 0, 108, - 0, 0, 1, 2, 363, 3, 4, 5, 357, 358, - 359, 0, 0, 0, 0, 0, 0, 0, 63, 64, - 0, 0, 0, 360, 361, 0, 0, 1, 2, 0, - 3, 4, 5, 238, 0, 0, 0, 0, 0, 0, - 362, 0, 0, 0, 0, 0, 0, 0, 239, 240, - 0, 0, 0, 0, 0, 0, 170, 171, 172, 173, - 174, 175, 176, 177, 178, 179, 180, 181, 182, 183, - 184, 241, 242, 0, 0, 0, 0, 0, 0, 0, - 0, 170, 171, 172, 173, 174, 175, 176, 177, 178, - 179, 180, 181, 182, 183, 184, 241, 242, 243, 191, - 192, 193, 194, 195, 196, 197, 198, 199, 200, 201, - 202, 0, 244, 0, 245, 246, 247, 0, 0, 0, - 0, 0, 0, 243, 191, 192, 193, 194, 195, 196, - 197, 198, 199, 200, 201, 202, 0, 244, 363, 245, - 246, 247, 0, 0, 0, 0, 0, 0, 0, 354, - 355, 0, 0, 0, 0, 356, 107, 0, 108, 0, - 248, 0, 0, 249, 0, 250, 0, 251, 357, 358, - 359, 268, 269, 270, 271, 272, 273, 274, 275, 276, - 277, 0, 0, 360, 361, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 63, 64, - 362, 103, 66, 67, 68, 69, 0, 1, 2, 0, - 3, 4, 5, 0, 0, 0, 170, 171, 172, 173, - 174, 175, 176, 177, 178, 179, 180, 181, 182, 183, - 184, 241, 242, 0, 0, 0, 0, 70, 63, 64, - 0, 103, 66, 67, 68, 69, 0, 1, 2, 0, - 3, 4, 5, 0, 0, 0, 0, 0, 243, 191, - 192, 193, 194, 195, 196, 197, 198, 199, 200, 201, - 202, 0, 244, 0, 245, 246, 247, 70, 63, 64, - 0, 103, 149, 150, 151, 69, 0, 1, 2, 0, - 3, 4, 5, 0, 0, 0, 63, 64, 363, 103, - 149, 150, 151, 69, 0, 1, 2, 0, 3, 4, - 5, 0, 0, 0, 0, 63, 64, 70, 103, 66, - 67, 68, 69, 0, 1, 2, 0, 3, 4, 5, - 0, 0, 0, 0, 0, 70, 0, 71, 0, 0, - 72, 0, 0, 73, 130, 74, 104, 0, 0, 0, - 0, 0, 63, 64, 70, 144, 66, 67, 68, 69, - 0, 1, 2, 0, 3, 4, 5, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 71, 0, 0, - 72, 0, 0, 73, 0, 74, 137, 0, 0, 63, - 64, 70, 103, 66, 67, 68, 69, 0, 1, 2, - 0, 3, 4, 5, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 71, 323, 0, - 72, 0, 0, 73, 0, 74, 345, 0, 70, 0, - 0, 0, 0, 0, 0, 71, 0, 0, 72, 0, - 0, 73, 0, 74, 410, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 71, 0, 0, 72, 0, 0, - 73, 0, 74, 145, 63, 64, 0, 103, 149, 150, - 151, 69, 0, 1, 2, 0, 3, 4, 5, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 71, 0, 0, 72, 0, 0, 73, 0, 74, - 0, 63, 64, 70, 103, 66, 67, 68, 69, 0, - 1, 2, 0, 3, 4, 5, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 71, 0, - 422, 72, 0, 0, 73, 0, 74, 0, 63, 64, - 70, 103, 66, 67, 68, 69, 0, 1, 2, 0, - 3, 4, 5, 0, 0, 0, 63, 64, 0, 65, - 66, 67, 68, 69, 0, 1, 2, 507, 3, 4, - 5, 0, 0, 0, 0, 63, 64, 70, 103, 149, - 150, 151, 69, 0, 1, 2, 0, 3, 4, 5, - 0, 0, 0, 0, 0, 70, 0, 0, 0, 0, - 0, 0, 0, 71, 0, 0, 72, 0, 340, 73, - 0, 74, 63, 64, 70, 144, 66, 67, 68, 69, - 0, 1, 2, 0, 3, 4, 5, 0, 0, 0, + 11, 78, 266, 329, 255, 298, 377, 230, 157, 13, + 101, 87, 158, 265, 256, 265, 267, 11, 467, 90, + 302, 303, 304, 305, 306, 21, 13, 309, 344, 346, + 417, 433, 435, 407, 417, 397, 398, 570, 24, 22, + -195, 139, 412, 139, -55, -55, -55, -55, 105, 574, + 25, 576, 140, 418, 224, -64, 1, 2, 155, 3, + 4, 5, 310, 26, 231, 232, 407, 6, 7, 407, + 434, 434, 131, 80, 81, 27, 105, 413, 471, 407, + 85, 107, 131, 108, 227, 379, 86, 146, 8, 11, + 460, 9, 63, 64, 480, 10, 2, 146, 495, 4, + 128, 1, 2, 535, 3, 4, 5, 129, 407, 221, + 222, 28, 107, 225, 108, 408, 107, 228, 108, 492, + 327, 366, 411, 366, 366, 466, 366, 107, 391, 108, + 392, 393, 394, 326, 43, 395, 542, 560, 261, 542, + 543, 159, 427, 546, 57, 392, 393, 394, 91, 61, + 395, 1, 371, 557, 3, 571, 5, 490, 58, 366, + 102, 296, 297, 261, 299, 59, 258, 366, 366, 577, + 117, 118, 119, 120, 121, 122, 87, 300, 261, 261, + 261, 261, 261, 307, 308, 261, 516, 94, 517, 49, + 50, 51, 98, 131, 52, 389, 45, 439, 46, 441, + 442, 443, 95, 146, 263, 63, 64, 264, 103, 66, + 67, 68, 69, 96, 1, 2, 99, 3, 4, 5, + 268, 269, 270, 271, 272, 273, 274, 275, 276, 277, + 100, 366, 366, 366, 547, 392, 393, 394, 83, 366, + 395, 146, 374, 107, 70, 108, 508, 114, 115, 366, + 366, 135, 372, 233, 234, 235, 236, 136, 376, 107, + 255, 108, 107, 156, 108, 534, 37, 38, 39, 373, + 256, 82, 107, 83, 108, 311, 312, 402, 403, 404, + 405, 406, 142, 143, 146, 390, 261, 111, 217, 112, + 414, 415, 416, 366, 220, 366, 518, 223, 366, 521, + 522, 523, 109, 110, 366, 366, 219, 226, 229, 1, + -56, -57, 3, 237, 5, 259, 265, 410, 335, 328, + 562, 336, 337, 564, 338, 339, 347, 422, 348, 349, + 351, 350, 366, 366, 353, 366, 366, 400, 388, 380, + 381, 366, 451, 452, 71, 382, 383, 72, 399, 458, + 73, 366, 74, 104, 384, 261, 440, 261, 261, 261, + 385, 401, 446, 428, 425, 429, 368, 369, 444, 370, + 459, 445, 366, 450, 438, 449, 558, 454, 63, 64, + 366, 103, 66, 67, 68, 69, 455, 1, 2, 456, + 3, 4, 5, 457, 463, 572, 496, 497, 498, 499, + 461, 462, 378, 501, 502, 464, 465, 313, 314, 468, + 386, 387, 469, 470, 472, 473, 366, 70, 474, 475, + 476, 366, 478, 491, 315, 316, 480, 317, 318, 481, + 319, 320, 321, 483, 484, 526, 527, 503, 366, 366, + 485, 488, 507, 366, 489, 500, 366, 434, 512, 538, + 493, 556, 568, 494, 261, 509, 520, 261, 261, 261, + 528, 530, 512, 529, 531, 544, 532, 504, 539, 533, + 550, 540, 551, 552, 430, 431, 432, 548, 549, 279, + 280, 554, 437, 563, 565, 566, 567, 575, 578, 579, + 580, 583, 447, 448, 584, 586, 209, 334, 210, 211, + 29, 30, 31, 32, 33, 34, 35, 333, 36, 126, + 553, 141, 138, 536, 324, 332, 561, 71, 44, 125, + 72, 93, 524, 73, 453, 74, 137, 0, 0, 0, + 0, 0, 0, 0, 0, 504, 477, 0, 479, 0, + 0, 482, 0, 0, 0, 0, 0, 486, 487, 281, + 282, 283, 284, 285, 286, 287, 288, 289, 290, 291, + 292, 293, 294, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 510, 511, 0, 514, 515, + 0, 0, 0, 0, 519, 0, 63, 64, 0, 103, + 149, 150, 151, 69, 525, 1, 2, 0, 3, 4, + 5, 37, 38, 39, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 541, 0, 0, 0, 0, + 0, 0, 0, 545, 0, 70, 354, 355, 0, 0, + 63, 64, 356, 313, 314, 0, 0, 0, 0, 1, + 2, 0, 3, 4, 5, 357, 358, 359, 0, 0, + 315, 316, 0, 317, 318, 0, 319, 320, 321, 569, + 360, 361, 0, 0, 573, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 362, 0, 0, + 0, 581, 582, 0, 0, 0, 585, 0, 0, 587, + 0, 0, 0, 170, 171, 172, 173, 174, 175, 176, + 177, 178, 179, 180, 181, 182, 183, 184, 241, 242, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 71, 0, 0, 72, 0, 0, 73, 0, 74, 63, - 64, 70, 103, 66, 67, 68, 69, 0, 1, 2, - 0, 3, 4, 5, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 71, 0, 0, - 72, 0, 0, 73, 0, 74, 0, 0, 70, 0, 0, 0, 0, 0, 0, 71, 0, 0, 72, 0, - 0, 73, 0, 74, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 71, 0, 0, 72, 0, 0, - 73, 0, 74, 63, 64, 0, 260, 66, 67, 68, + 0, 73, 0, 74, 345, 243, 191, 192, 193, 194, + 195, 196, 197, 198, 199, 200, 201, 202, 0, 244, + 0, 245, 246, 247, 0, 0, 0, 0, 0, 0, + 354, 355, 0, 0, 63, 64, 356, 0, 107, 0, + 108, 0, 0, 1, 2, 363, 3, 4, 5, 357, + 358, 359, 0, 0, 0, 0, 0, 0, 0, 63, + 64, 0, 0, 0, 360, 361, 0, 0, 1, 2, + 0, 3, 4, 5, 238, 0, 0, 0, 0, 0, + 0, 362, 0, 0, 0, 0, 0, 0, 0, 239, + 240, 0, 0, 0, 0, 0, 0, 170, 171, 172, + 173, 174, 175, 176, 177, 178, 179, 180, 181, 182, + 183, 184, 241, 242, 0, 0, 0, 0, 0, 0, + 0, 0, 170, 171, 172, 173, 174, 175, 176, 177, + 178, 179, 180, 181, 182, 183, 184, 241, 242, 243, + 191, 192, 193, 194, 195, 196, 197, 198, 199, 200, + 201, 202, 0, 244, 0, 245, 246, 247, 0, 0, + 0, 0, 0, 0, 243, 191, 192, 193, 194, 195, + 196, 197, 198, 199, 200, 201, 202, 0, 244, 363, + 245, 246, 247, 0, 0, 0, 0, 0, 0, 0, + 354, 355, 0, 0, 0, 0, 356, 107, 0, 108, + 0, 248, 0, 0, 249, 0, 250, 0, 251, 357, + 358, 359, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 360, 361, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 63, + 64, 362, 103, 149, 150, 151, 69, 0, 1, 2, + 0, 3, 4, 5, 0, 0, 0, 170, 171, 172, + 173, 174, 175, 176, 177, 178, 179, 180, 181, 182, + 183, 184, 241, 242, 0, 0, 0, 0, 70, 0, + 0, 0, 0, 63, 64, 0, 103, 66, 67, 68, + 69, 0, 1, 2, 0, 3, 4, 5, 0, 243, + 191, 192, 193, 194, 195, 196, 197, 198, 199, 200, + 201, 202, 130, 244, 0, 245, 246, 247, 0, 0, + 63, 64, 70, 144, 66, 67, 68, 69, 0, 1, + 2, 0, 3, 4, 5, 0, 0, 63, 64, 363, + 103, 66, 67, 68, 69, 0, 1, 2, 0, 3, + 4, 5, 0, 0, 0, 0, 0, 0, 0, 70, + 0, 0, 0, 0, 0, 0, 323, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 70, 0, 71, 0, + 0, 72, 0, 0, 73, 0, 74, 409, 63, 64, + 0, 103, 149, 150, 151, 69, 0, 1, 2, 0, + 3, 4, 5, 63, 64, 0, 103, 66, 67, 68, 69, 0, 1, 2, 0, 3, 4, 5, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 71, 0, 0, 72, 0, 0, 73, 0, 74, - 63, 64, 70, 103, 149, 150, 151, 69, 0, 1, + 0, 0, 71, 0, 0, 72, 0, 70, 73, 0, + 74, 145, 421, 0, 63, 64, 0, 103, 66, 67, + 68, 69, 70, 1, 2, 0, 3, 4, 5, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 71, + 0, 0, 72, 506, 0, 73, 0, 74, 0, 0, + 0, 0, 0, 70, 0, 0, 71, 0, 0, 72, + 0, 0, 73, 0, 74, 63, 64, 0, 65, 66, + 67, 68, 69, 0, 1, 2, 0, 3, 4, 5, + 63, 64, 0, 103, 149, 150, 151, 69, 0, 1, 2, 0, 3, 4, 5, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 71, 0, - 0, 72, 0, 0, 73, 0, 74, 161, 0, 70, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 162, 163, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 164, 165, - 166, 167, 168, 169, 170, 171, 172, 173, 174, 175, - 176, 177, 178, 179, 180, 181, 182, 183, 184, 185, - 186, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 70, 0, 0, 71, 0, 0, + 72, 0, 340, 73, 0, 74, 0, 0, 0, 70, 0, 0, 71, 0, 0, 72, 0, 0, 73, 0, - 74, 187, 188, 189, 0, 0, 190, 191, 192, 193, - 194, 195, 196, 197, 198, 199, 200, 201, 202, 203, - 204, 205, 206, 207, 208, 0, 0, 0, 0, 71, - 0, 0, 72, 0, 0, 73, 0, 343 + 74, 63, 64, 0, 144, 66, 67, 68, 69, 0, + 1, 2, 0, 3, 4, 5, 0, 0, 0, 0, + 0, 0, 0, 71, 0, 0, 72, 0, 0, 73, + 0, 74, 63, 64, 0, 103, 66, 67, 68, 69, + 70, 1, 2, 0, 3, 4, 5, 63, 64, 0, + 260, 66, 67, 68, 69, 0, 1, 2, 0, 3, + 4, 5, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 70, 0, 0, 71, 0, 0, 72, 0, 0, + 73, 0, 74, 0, 0, 0, 70, 0, 0, 71, + 0, 0, 72, 0, 0, 73, 0, 74, 63, 64, + 0, 103, 149, 150, 151, 69, -194, 1, 2, 0, + 3, 4, 5, 0, 0, 0, 0, 0, 0, 0, + 0, -64, 1, 2, 0, 3, 4, 5, 0, 0, + 0, 0, 0, 6, 7, 0, 0, 70, 0, 0, + 71, 0, 0, 72, 0, 0, 73, 0, 74, 0, + 0, 0, 0, 0, 8, 0, 0, 9, 0, 0, + 0, 10, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 71, 0, 0, 72, 0, 161, 73, 0, 74, + 0, 0, 0, 0, 0, 0, 71, 0, 0, 72, + 0, 0, 73, 0, 74, 162, 163, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 164, 165, 166, + 167, 168, 169, 170, 171, 172, 173, 174, 175, 176, + 177, 178, 179, 180, 181, 182, 183, 184, 185, 186, + 0, 0, 0, 0, 0, 0, 0, 71, 0, 0, + 72, 0, 0, 73, 0, 343, 0, 0, 0, 0, + 187, 188, 189, 0, 0, 190, 191, 192, 193, 194, + 195, 196, 197, 198, 199, 200, 201, 202, 203, 204, + 205, 206, 207, 208 }; static const short int yycheck[] = { - 0, 27, 166, 226, 154, 123, 423, 147, 4, 0, - 18, 167, 11, 297, 154, 25, 189, 17, 26, 144, - 31, 249, 250, 11, 263, 264, 17, 266, 11, 11, - 155, 204, 205, 206, 207, 208, 330, 331, 211, 50, - 7, 8, 49, 3, 4, 5, 6, 559, 74, 16, - 17, 143, 19, 20, 21, 144, 63, 213, 116, 54, - 299, 573, 50, 23, 24, 144, 155, 50, 307, 308, - 31, 144, 98, 145, 153, 147, 102, 144, 29, 30, - 153, 153, 108, 144, 142, 40, 41, 113, 155, 89, - 35, 508, 47, 17, 155, 144, 20, 123, 53, 144, - 16, 143, 151, 19, 144, 21, 151, 144, 148, 135, - 136, 148, 145, 139, 147, 343, 144, 143, 151, 11, - 148, 261, 14, 263, 264, 542, 266, 421, 3, 4, - 5, 6, 371, 372, 373, 363, 110, 111, 164, 312, - 379, 39, 40, 41, 154, 15, 44, 155, 0, 267, - 389, 390, 151, 145, 143, 147, 148, 574, 154, 299, - 19, 187, 188, 189, 190, 449, 157, 307, 308, 151, - 131, 132, 133, 134, 43, 136, 45, 203, 204, 205, - 206, 207, 208, 209, 210, 211, 131, 132, 133, 134, - 143, 136, 310, 219, 478, 434, 480, 436, 114, 115, - 439, 144, 145, 229, 147, 143, 445, 446, 381, 149, - 383, 384, 385, 109, 110, 131, 132, 18, 134, 135, - 19, 137, 138, 139, 57, 58, 59, 60, 61, 62, - 19, 371, 372, 373, 473, 474, 19, 476, 477, 379, - 147, 267, 526, 482, 145, 4, 147, 470, 149, 389, - 390, 4, 278, 492, 131, 132, 133, 134, 32, 136, - 34, 411, 39, 40, 41, 42, 43, 44, 45, 295, - 47, 411, 144, 145, 513, 147, 34, 335, 336, 337, - 338, 339, 521, 150, 310, 311, 312, 140, 141, 142, - 348, 349, 350, 150, 434, 16, 436, 4, 19, 439, - 21, 145, 19, 147, 148, 445, 446, 145, 481, 147, - 144, 484, 485, 486, 39, 147, 41, 343, 557, 80, - 81, 544, 148, 562, 547, 153, 148, 353, 9, 9, - 9, 147, 52, 473, 474, 11, 476, 477, 153, 147, - 579, 580, 482, 401, 402, 584, 19, 147, 587, 147, - 408, 147, 492, 147, 147, 381, 382, 383, 384, 385, - 147, 147, 388, 140, 141, 142, 114, 115, 144, 144, - 35, 144, 144, 513, 400, 144, 144, 541, 144, 35, - 147, 521, 147, 131, 132, 56, 134, 135, 144, 137, - 138, 139, 144, 144, 149, 144, 560, 455, 456, 457, - 458, 144, 144, 144, 462, 463, 144, 144, 153, 144, - 144, 35, 19, 4, 0, 144, 148, 557, 19, 14, - 14, 147, 562, 4, 450, 144, 144, 50, 144, 15, - 16, 17, 144, 19, 20, 21, 494, 495, 464, 579, - 580, 27, 28, 469, 584, 144, 144, 587, 144, 475, - 147, 144, 144, 144, 144, 481, 144, 144, 484, 485, - 486, 144, 48, 489, 153, 51, 148, 144, 468, 55, - 148, 529, 19, 531, 532, 3, 4, 144, 148, 7, - 8, 9, 151, 149, 0, 148, 148, 50, 16, 17, - 14, 19, 20, 21, 22, 23, 24, 23, 24, 15, - 16, 17, 151, 19, 20, 21, 148, 148, 148, 37, - 38, 27, 28, 4, 144, 14, 14, 543, 144, 14, - 68, 14, 126, 126, 126, 89, 54, 241, 509, 242, - 536, 108, 48, 219, 102, 51, 536, 17, 56, 55, - 86, 489, 70, 71, 72, 73, 74, 75, 76, 77, - 78, 79, 80, 81, 82, 83, 84, 85, 86, -1, - 403, 229, -1, -1, -1, -1, -1, 93, 94, 95, - 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, - 106, -1, -1, -1, 112, 113, 114, 115, 116, 117, - 118, 119, 120, 121, 122, 123, 124, -1, 126, -1, - 128, 129, 130, -1, -1, -1, -1, -1, -1, 3, - 4, -1, -1, 7, 8, 9, -1, 145, -1, 147, - -1, -1, 16, 17, 152, 19, 20, 21, 22, 23, - 24, -1, -1, -1, -1, -1, -1, -1, 7, 8, - -1, -1, -1, 37, 38, -1, -1, 16, 17, -1, - 19, 20, 21, 22, -1, -1, -1, -1, -1, -1, - 54, -1, -1, -1, -1, -1, -1, -1, 37, 38, - -1, -1, -1, -1, -1, -1, 70, 71, 72, 73, - 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, - 84, 85, 86, -1, -1, -1, -1, -1, -1, -1, - -1, 70, 71, 72, 73, 74, 75, 76, 77, 78, - 79, 80, 81, 82, 83, 84, 85, 86, 112, 113, - 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, - 124, -1, 126, -1, 128, 129, 130, -1, -1, -1, - -1, -1, -1, 112, 113, 114, 115, 116, 117, 118, - 119, 120, 121, 122, 123, 124, -1, 126, 152, 128, - 129, 130, -1, -1, -1, -1, -1, -1, -1, 3, - 4, -1, -1, -1, -1, 9, 145, -1, 147, -1, - 149, -1, -1, 152, -1, 154, -1, 156, 22, 23, - 24, 87, 88, 89, 90, 91, 92, 93, 94, 95, - 96, -1, -1, 37, 38, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, 7, 8, - 54, 10, 11, 12, 13, 14, -1, 16, 17, -1, - 19, 20, 21, -1, -1, -1, 70, 71, 72, 73, - 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, - 84, 85, 86, -1, -1, -1, -1, 46, 7, 8, - -1, 10, 11, 12, 13, 14, -1, 16, 17, -1, - 19, 20, 21, -1, -1, -1, -1, -1, 112, 113, - 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, - 124, -1, 126, -1, 128, 129, 130, 46, 7, 8, - -1, 10, 11, 12, 13, 14, -1, 16, 17, -1, - 19, 20, 21, -1, -1, -1, 7, 8, 152, 10, - 11, 12, 13, 14, -1, 16, 17, -1, 19, 20, - 21, -1, -1, -1, -1, 7, 8, 46, 10, 11, - 12, 13, 14, -1, 16, 17, -1, 19, 20, 21, - -1, -1, -1, -1, -1, 46, -1, 146, -1, -1, - 149, -1, -1, 152, 36, 154, 155, -1, -1, -1, - -1, -1, 7, 8, 46, 10, 11, 12, 13, 14, - -1, 16, 17, -1, 19, 20, 21, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, 146, -1, -1, - 149, -1, -1, 152, -1, 154, 155, -1, -1, 7, - 8, 46, 10, 11, 12, 13, 14, -1, 16, 17, - -1, 19, 20, 21, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, 146, 36, -1, - 149, -1, -1, 152, -1, 154, 155, -1, 46, -1, - -1, -1, -1, -1, -1, 146, -1, -1, 149, -1, - -1, 152, -1, 154, 155, -1, -1, -1, -1, -1, - -1, -1, -1, -1, 146, -1, -1, 149, -1, -1, - 152, -1, 154, 118, 7, 8, -1, 10, 11, 12, - 13, 14, -1, 16, 17, -1, 19, 20, 21, -1, + 0, 27, 166, 226, 154, 189, 297, 147, 123, 0, + 4, 18, 25, 11, 154, 11, 167, 17, 422, 26, + 204, 205, 206, 207, 208, 49, 17, 211, 249, 250, + 31, 11, 11, 144, 31, 330, 331, 558, 143, 63, + 0, 144, 153, 144, 3, 4, 5, 6, 74, 35, + 54, 572, 155, 50, 155, 15, 16, 17, 116, 19, + 20, 21, 213, 143, 23, 24, 144, 27, 28, 144, + 50, 50, 98, 40, 41, 15, 102, 155, 153, 144, + 47, 145, 108, 147, 142, 149, 53, 113, 48, 89, + 155, 51, 7, 8, 144, 55, 17, 123, 148, 20, + 144, 16, 17, 507, 19, 20, 21, 151, 144, 135, + 136, 143, 145, 139, 147, 151, 145, 143, 147, 148, + 153, 261, 343, 263, 264, 420, 266, 145, 312, 147, + 131, 132, 133, 151, 0, 136, 144, 541, 164, 144, + 148, 154, 363, 148, 143, 131, 132, 133, 155, 19, + 136, 16, 267, 151, 19, 151, 21, 448, 143, 299, + 154, 187, 188, 189, 190, 149, 157, 307, 308, 573, + 57, 58, 59, 60, 61, 62, 18, 203, 204, 205, + 206, 207, 208, 209, 210, 211, 477, 19, 479, 39, + 40, 41, 147, 219, 44, 310, 43, 381, 45, 383, + 384, 385, 19, 229, 11, 7, 8, 14, 10, 11, + 12, 13, 14, 19, 16, 17, 4, 19, 20, 21, + 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, + 4, 371, 372, 373, 525, 131, 132, 133, 34, 379, + 136, 267, 144, 145, 46, 147, 469, 29, 30, 389, + 390, 150, 278, 3, 4, 5, 6, 150, 144, 145, + 410, 147, 145, 4, 147, 148, 140, 141, 142, 295, + 410, 32, 145, 34, 147, 110, 111, 335, 336, 337, + 338, 339, 109, 110, 310, 311, 312, 39, 19, 41, + 348, 349, 350, 433, 148, 435, 480, 153, 438, 483, + 484, 485, 80, 81, 444, 445, 144, 148, 147, 16, + 9, 9, 19, 9, 21, 52, 11, 343, 147, 153, + 543, 147, 147, 546, 147, 147, 19, 353, 147, 147, + 144, 147, 472, 473, 147, 475, 476, 147, 35, 144, + 144, 481, 400, 401, 146, 144, 144, 149, 35, 407, + 152, 491, 154, 155, 144, 381, 382, 383, 384, 385, + 144, 147, 388, 144, 56, 144, 263, 264, 144, 266, + 153, 144, 512, 399, 149, 144, 540, 144, 7, 8, + 520, 10, 11, 12, 13, 14, 144, 16, 17, 144, + 19, 20, 21, 144, 35, 559, 454, 455, 456, 457, + 144, 144, 299, 461, 462, 19, 4, 114, 115, 144, + 307, 308, 148, 19, 14, 14, 556, 46, 147, 144, + 144, 561, 4, 449, 131, 132, 144, 134, 135, 144, + 137, 138, 139, 144, 144, 493, 494, 463, 578, 579, + 144, 147, 468, 583, 144, 153, 586, 50, 474, 19, + 144, 14, 4, 144, 480, 144, 144, 483, 484, 485, + 144, 144, 488, 148, 144, 151, 148, 467, 144, 148, + 528, 149, 530, 531, 371, 372, 373, 148, 148, 23, + 24, 50, 379, 151, 148, 148, 148, 144, 14, 14, + 144, 14, 389, 390, 68, 14, 126, 242, 126, 126, + 39, 40, 41, 42, 43, 44, 45, 241, 47, 89, + 535, 108, 102, 508, 219, 229, 542, 146, 17, 86, + 149, 56, 488, 152, 402, 154, 155, -1, -1, -1, + -1, -1, -1, -1, -1, 535, 433, -1, 435, -1, + -1, 438, -1, -1, -1, -1, -1, 444, 445, 93, + 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, + 104, 105, 106, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, 472, 473, -1, 475, 476, + -1, -1, -1, -1, 481, -1, 7, 8, -1, 10, + 11, 12, 13, 14, 491, 16, 17, -1, 19, 20, + 21, 140, 141, 142, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, 512, -1, -1, -1, -1, + -1, -1, -1, 520, -1, 46, 3, 4, -1, -1, + 7, 8, 9, 114, 115, -1, -1, -1, -1, 16, + 17, -1, 19, 20, 21, 22, 23, 24, -1, -1, + 131, 132, -1, 134, 135, -1, 137, 138, 139, 556, + 37, 38, -1, -1, 561, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, 54, -1, -1, + -1, 578, 579, -1, -1, -1, 583, -1, -1, 586, + -1, -1, -1, 70, 71, 72, 73, 74, 75, 76, + 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, - -1, 146, -1, -1, 149, -1, -1, 152, -1, 154, - -1, 7, 8, 46, 10, 11, 12, 13, 14, -1, - 16, 17, -1, 19, 20, 21, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, 146, -1, - 36, 149, -1, -1, 152, -1, 154, -1, 7, 8, - 46, 10, 11, 12, 13, 14, -1, 16, 17, -1, - 19, 20, 21, -1, -1, -1, 7, 8, -1, 10, - 11, 12, 13, 14, -1, 16, 17, 36, 19, 20, - 21, -1, -1, -1, -1, 7, 8, 46, 10, 11, - 12, 13, 14, -1, 16, 17, -1, 19, 20, 21, - -1, -1, -1, -1, -1, 46, -1, -1, -1, -1, - -1, -1, -1, 146, -1, -1, 149, -1, 151, 152, - -1, 154, 7, 8, 46, 10, 11, 12, 13, 14, - -1, 16, 17, -1, 19, 20, 21, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, - 146, -1, -1, 149, -1, -1, 152, -1, 154, 7, - 8, 46, 10, 11, 12, 13, 14, -1, 16, 17, - -1, 19, 20, 21, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, 146, -1, -1, - 149, -1, -1, 152, -1, 154, -1, -1, 46, -1, -1, -1, -1, -1, -1, 146, -1, -1, 149, -1, - -1, 152, -1, 154, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, 146, -1, -1, 149, -1, -1, - 152, -1, 154, 7, 8, -1, 10, 11, 12, 13, - 14, -1, 16, 17, -1, 19, 20, 21, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, - -1, 146, -1, -1, 149, -1, -1, 152, -1, 154, + -1, 152, -1, 154, 155, 112, 113, 114, 115, 116, + 117, 118, 119, 120, 121, 122, 123, 124, -1, 126, + -1, 128, 129, 130, -1, -1, -1, -1, -1, -1, + 3, 4, -1, -1, 7, 8, 9, -1, 145, -1, + 147, -1, -1, 16, 17, 152, 19, 20, 21, 22, + 23, 24, -1, -1, -1, -1, -1, -1, -1, 7, + 8, -1, -1, -1, 37, 38, -1, -1, 16, 17, + -1, 19, 20, 21, 22, -1, -1, -1, -1, -1, + -1, 54, -1, -1, -1, -1, -1, -1, -1, 37, + 38, -1, -1, -1, -1, -1, -1, 70, 71, 72, + 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, + 83, 84, 85, 86, -1, -1, -1, -1, -1, -1, + -1, -1, 70, 71, 72, 73, 74, 75, 76, 77, + 78, 79, 80, 81, 82, 83, 84, 85, 86, 112, + 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, + 123, 124, -1, 126, -1, 128, 129, 130, -1, -1, + -1, -1, -1, -1, 112, 113, 114, 115, 116, 117, + 118, 119, 120, 121, 122, 123, 124, -1, 126, 152, + 128, 129, 130, -1, -1, -1, -1, -1, -1, -1, + 3, 4, -1, -1, -1, -1, 9, 145, -1, 147, + -1, 149, -1, -1, 152, -1, 154, -1, 156, 22, + 23, 24, -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, 37, 38, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, -1, 7, + 8, 54, 10, 11, 12, 13, 14, -1, 16, 17, + -1, 19, 20, 21, -1, -1, -1, 70, 71, 72, + 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, + 83, 84, 85, 86, -1, -1, -1, -1, 46, -1, + -1, -1, -1, 7, 8, -1, 10, 11, 12, 13, + 14, -1, 16, 17, -1, 19, 20, 21, -1, 112, + 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, + 123, 124, 36, 126, -1, 128, 129, 130, -1, -1, 7, 8, 46, 10, 11, 12, 13, 14, -1, 16, + 17, -1, 19, 20, 21, -1, -1, 7, 8, 152, + 10, 11, 12, 13, 14, -1, 16, 17, -1, 19, + 20, 21, -1, -1, -1, -1, -1, -1, -1, 46, + -1, -1, -1, -1, -1, -1, 36, -1, -1, -1, + -1, -1, -1, -1, -1, -1, 46, -1, 146, -1, + -1, 149, -1, -1, 152, -1, 154, 155, 7, 8, + -1, 10, 11, 12, 13, 14, -1, 16, 17, -1, + 19, 20, 21, 7, 8, -1, 10, 11, 12, 13, + 14, -1, 16, 17, -1, 19, 20, 21, -1, -1, + -1, -1, 146, -1, -1, 149, -1, 46, 152, -1, + 154, 118, 36, -1, 7, 8, -1, 10, 11, 12, + 13, 14, 46, 16, 17, -1, 19, 20, 21, -1, + -1, -1, -1, -1, -1, -1, -1, -1, -1, 146, + -1, -1, 149, 36, -1, 152, -1, 154, -1, -1, + -1, -1, -1, 46, -1, -1, 146, -1, -1, 149, + -1, -1, 152, -1, 154, 7, 8, -1, 10, 11, + 12, 13, 14, -1, 16, 17, -1, 19, 20, 21, + 7, 8, -1, 10, 11, 12, 13, 14, -1, 16, 17, -1, 19, 20, 21, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, 146, -1, - -1, 149, -1, -1, 152, -1, 154, 33, -1, 46, - -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, 52, 53, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, 64, 65, - 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, - 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, - 86, -1, -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, 46, -1, -1, 146, -1, -1, + 149, -1, 151, 152, -1, 154, -1, -1, -1, 46, -1, -1, 146, -1, -1, 149, -1, -1, 152, -1, - 154, 107, 108, 109, -1, -1, 112, 113, 114, 115, - 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, - 126, 127, 128, 129, 130, -1, -1, -1, -1, 146, - -1, -1, 149, -1, -1, 152, -1, 154 + 154, 7, 8, -1, 10, 11, 12, 13, 14, -1, + 16, 17, -1, 19, 20, 21, -1, -1, -1, -1, + -1, -1, -1, 146, -1, -1, 149, -1, -1, 152, + -1, 154, 7, 8, -1, 10, 11, 12, 13, 14, + 46, 16, 17, -1, 19, 20, 21, 7, 8, -1, + 10, 11, 12, 13, 14, -1, 16, 17, -1, 19, + 20, 21, -1, -1, -1, -1, -1, -1, -1, -1, + -1, 46, -1, -1, 146, -1, -1, 149, -1, -1, + 152, -1, 154, -1, -1, -1, 46, -1, -1, 146, + -1, -1, 149, -1, -1, 152, -1, 154, 7, 8, + -1, 10, 11, 12, 13, 14, 0, 16, 17, -1, + 19, 20, 21, -1, -1, -1, -1, -1, -1, -1, + -1, 15, 16, 17, -1, 19, 20, 21, -1, -1, + -1, -1, -1, 27, 28, -1, -1, 46, -1, -1, + 146, -1, -1, 149, -1, -1, 152, -1, 154, -1, + -1, -1, -1, -1, 48, -1, -1, 51, -1, -1, + -1, 55, -1, -1, -1, -1, -1, -1, -1, -1, + -1, 146, -1, -1, 149, -1, 33, 152, -1, 154, + -1, -1, -1, -1, -1, -1, 146, -1, -1, 149, + -1, -1, 152, -1, 154, 52, 53, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, 64, 65, 66, + 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, + 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, + -1, -1, -1, -1, -1, -1, -1, 146, -1, -1, + 149, -1, -1, 152, -1, 154, -1, -1, -1, -1, + 107, 108, 109, -1, -1, 112, 113, 114, 115, 116, + 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, + 127, 128, 129, 130 }; /* YYSTOS[STATE-NUM] -- The (internal number of the) accessing @@ -2433,26 +2439,26 @@ 37, 38, 54, 152, 196, 222, 223, 224, 224, 224, 224, 191, 189, 189, 144, 183, 144, 183, 224, 149, 144, 144, 144, 144, 144, 144, 224, 224, 35, 191, - 189, 225, 131, 132, 133, 134, 136, 180, 186, 186, - 35, 147, 147, 195, 195, 195, 195, 195, 144, 151, - 155, 189, 197, 153, 155, 195, 195, 195, 31, 50, - 184, 187, 36, 189, 213, 214, 56, 221, 197, 144, - 144, 224, 224, 224, 11, 50, 11, 234, 224, 149, - 225, 189, 225, 225, 225, 144, 144, 189, 224, 224, - 144, 189, 195, 195, 234, 144, 144, 144, 144, 195, - 153, 155, 144, 144, 35, 19, 4, 186, 179, 144, - 148, 19, 153, 14, 14, 147, 144, 144, 224, 4, - 224, 144, 144, 224, 144, 144, 144, 224, 224, 147, - 144, 183, 189, 148, 144, 144, 148, 195, 195, 195, - 195, 153, 195, 195, 189, 165, 166, 36, 189, 181, - 144, 224, 224, 189, 233, 224, 224, 183, 183, 225, - 224, 144, 225, 225, 225, 233, 224, 195, 195, 144, - 148, 144, 144, 148, 148, 148, 179, 184, 185, 19, - 144, 149, 224, 144, 148, 151, 224, 148, 183, 148, - 148, 195, 195, 195, 166, 50, 182, 14, 151, 163, - 230, 179, 189, 181, 151, 181, 148, 148, 148, 4, - 224, 222, 151, 163, 224, 35, 144, 222, 179, 14, - 14, 144, 224, 224, 14, 68, 224, 14, 224 + 189, 225, 131, 132, 133, 136, 180, 186, 186, 35, + 147, 147, 195, 195, 195, 195, 195, 144, 151, 155, + 189, 197, 153, 155, 195, 195, 195, 31, 50, 184, + 187, 36, 189, 213, 214, 56, 221, 197, 144, 144, + 224, 224, 224, 11, 50, 11, 234, 224, 149, 225, + 189, 225, 225, 225, 144, 144, 189, 224, 224, 144, + 189, 195, 195, 234, 144, 144, 144, 144, 195, 153, + 155, 144, 144, 35, 19, 4, 186, 179, 144, 148, + 19, 153, 14, 14, 147, 144, 144, 224, 4, 224, + 144, 144, 224, 144, 144, 144, 224, 224, 147, 144, + 183, 189, 148, 144, 144, 148, 195, 195, 195, 195, + 153, 195, 195, 189, 165, 166, 36, 189, 181, 144, + 224, 224, 189, 233, 224, 224, 183, 183, 225, 224, + 144, 225, 225, 225, 233, 224, 195, 195, 144, 148, + 144, 144, 148, 148, 148, 179, 184, 185, 19, 144, + 149, 224, 144, 148, 151, 224, 148, 183, 148, 148, + 195, 195, 195, 166, 50, 182, 14, 151, 163, 230, + 179, 189, 181, 151, 181, 148, 148, 148, 4, 224, + 222, 151, 163, 224, 35, 144, 222, 179, 14, 14, + 144, 224, 224, 14, 68, 224, 14, 224 }; #define yyerrok (yyerrstatus = 0) @@ -3521,29 +3527,24 @@ break; case 115: -#line 1248 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.ParamAttrs) = ParamAttr::InReg; ;} +#line 1250 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.ParamAttrs) = ParamAttr::None; ;} break; case 116: #line 1251 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.ParamAttrs) = ParamAttr::None; ;} - break; - - case 117: -#line 1252 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamAttrs) = (yyvsp[-1].ParamAttrs) | (yyvsp[0].ParamAttrs); ;} break; - case 118: -#line 1259 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 117: +#line 1258 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.UIntVal) = 0; ;} break; - case 119: -#line 1260 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 118: +#line 1259 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.UIntVal) = (yyvsp[0].UInt64Val); if ((yyval.UIntVal) != 0 && !isPowerOf2_32((yyval.UIntVal))) @@ -3552,13 +3553,13 @@ ;} break; - case 120: -#line 1266 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 119: +#line 1265 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.UIntVal) = 0; ;} break; - case 121: -#line 1267 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 120: +#line 1266 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.UIntVal) = (yyvsp[0].UInt64Val); if ((yyval.UIntVal) != 0 && !isPowerOf2_32((yyval.UIntVal))) @@ -3567,8 +3568,8 @@ ;} break; - case 122: -#line 1275 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 121: +#line 1274 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { for (unsigned i = 0, e = (yyvsp[0].StrVal)->length(); i != e; ++i) if ((*(yyvsp[0].StrVal))[i] == '"' || (*(yyvsp[0].StrVal))[i] == '\\') @@ -3578,14 +3579,19 @@ ;} break; + case 122: +#line 1282 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + { (yyval.StrVal) = 0; ;} + break; + case 123: #line 1283 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.StrVal) = 0; ;} + { (yyval.StrVal) = (yyvsp[0].StrVal); ;} break; case 124: -#line 1284 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.StrVal) = (yyvsp[0].StrVal); ;} +#line 1288 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + {;} break; case 125: @@ -3595,11 +3601,6 @@ case 126: #line 1290 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - {;} - break; - - case 127: -#line 1291 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { CurGV->setSection(*(yyvsp[0].StrVal)); delete (yyvsp[0].StrVal); @@ -3607,8 +3608,8 @@ ;} break; - case 128: -#line 1296 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 127: +#line 1295 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if ((yyvsp[0].UInt64Val) != 0 && !isPowerOf2_32((yyvsp[0].UInt64Val))) GEN_ERROR("Alignment must be a power of two"); @@ -3617,24 +3618,24 @@ ;} break; - case 133: -#line 1312 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 132: +#line 1311 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.TypeVal) = new PATypeHolder(OpaqueType::get()); CHECK_FOR_ERROR ;} break; - case 134: -#line 1316 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 133: +#line 1315 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.TypeVal) = new PATypeHolder((yyvsp[0].PrimType)); CHECK_FOR_ERROR ;} break; - case 135: -#line 1320 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 134: +#line 1319 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // Pointer type? if (*(yyvsp[-1].TypeVal) == Type::LabelTy) GEN_ERROR("Cannot form a pointer to a basic block"); @@ -3644,8 +3645,8 @@ ;} break; - case 136: -#line 1327 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 135: +#line 1326 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // Named types are also simple types... const Type* tmp = getTypeVal((yyvsp[0].ValIDVal)); CHECK_FOR_ERROR @@ -3653,8 +3654,8 @@ ;} break; - case 137: -#line 1332 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 136: +#line 1331 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // Type UpReference if ((yyvsp[0].UInt64Val) > (uint64_t)~0U) GEN_ERROR("Value out of range"); OpaqueType *OT = OpaqueType::get(); // Use temporary placeholder @@ -3665,8 +3666,8 @@ ;} break; - case 138: -#line 1340 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 137: +#line 1339 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { std::vector Params; ParamAttrsVector Attrs; @@ -3699,8 +3700,8 @@ ;} break; - case 139: -#line 1370 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 138: +#line 1369 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { std::vector Params; ParamAttrsVector Attrs; @@ -3733,8 +3734,8 @@ ;} break; - case 140: -#line 1401 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 139: +#line 1400 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // Sized array type? (yyval.TypeVal) = new PATypeHolder(HandleUpRefs(ArrayType::get(*(yyvsp[-1].TypeVal), (unsigned)(yyvsp[-3].UInt64Val)))); delete (yyvsp[-1].TypeVal); @@ -3742,8 +3743,8 @@ ;} break; - case 141: -#line 1406 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 140: +#line 1405 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // Vector type? const llvm::Type* ElemTy = (yyvsp[-1].TypeVal)->get(); if ((unsigned)(yyvsp[-3].UInt64Val) != (yyvsp[-3].UInt64Val)) @@ -3758,8 +3759,8 @@ ;} break; - case 142: -#line 1418 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 141: +#line 1417 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // Structure type? std::vector Elements; for (std::list::iterator I = (yyvsp[-1].TypeList)->begin(), @@ -3772,16 +3773,16 @@ ;} break; - case 143: -#line 1428 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 142: +#line 1427 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // Empty structure type? (yyval.TypeVal) = new PATypeHolder(StructType::get(std::vector())); CHECK_FOR_ERROR ;} break; - case 144: -#line 1432 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 143: +#line 1431 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { std::vector Elements; for (std::list::iterator I = (yyvsp[-2].TypeList)->begin(), @@ -3794,24 +3795,24 @@ ;} break; - case 145: -#line 1442 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 144: +#line 1441 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // Empty structure type? (yyval.TypeVal) = new PATypeHolder(StructType::get(std::vector(), true)); CHECK_FOR_ERROR ;} break; - case 146: -#line 1449 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 145: +#line 1448 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.TypeWithAttrs).Ty = (yyvsp[-1].TypeVal); (yyval.TypeWithAttrs).Attrs = (yyvsp[0].ParamAttrs); ;} break; - case 147: -#line 1456 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 146: +#line 1455 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[0].TypeVal))->getDescription()); @@ -3821,15 +3822,15 @@ ;} break; - case 148: -#line 1463 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 147: +#line 1462 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.TypeVal) = new PATypeHolder(Type::VoidTy); ;} break; - case 149: -#line 1468 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 148: +#line 1467 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.TypeWithAttrsList) = new TypeWithAttrsList(); (yyval.TypeWithAttrsList)->push_back((yyvsp[0].TypeWithAttrs)); @@ -3837,16 +3838,16 @@ ;} break; - case 150: -#line 1473 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 149: +#line 1472 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { ((yyval.TypeWithAttrsList)=(yyvsp[-2].TypeWithAttrsList))->push_back((yyvsp[0].TypeWithAttrs)); CHECK_FOR_ERROR ;} break; - case 152: -#line 1481 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 151: +#line 1480 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.TypeWithAttrsList)=(yyvsp[-2].TypeWithAttrsList); TypeWithAttrs TWA; TWA.Attrs = ParamAttr::None; @@ -3856,8 +3857,8 @@ ;} break; - case 153: -#line 1488 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 152: +#line 1487 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.TypeWithAttrsList) = new TypeWithAttrsList; TypeWithAttrs TWA; TWA.Attrs = ParamAttr::None; @@ -3867,16 +3868,16 @@ ;} break; - case 154: -#line 1495 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 153: +#line 1494 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.TypeWithAttrsList) = new TypeWithAttrsList(); CHECK_FOR_ERROR ;} break; - case 155: -#line 1503 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 154: +#line 1502 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.TypeList) = new std::list(); (yyval.TypeList)->push_back(*(yyvsp[0].TypeVal)); @@ -3885,8 +3886,8 @@ ;} break; - case 156: -#line 1509 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 155: +#line 1508 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { ((yyval.TypeList)=(yyvsp[-2].TypeList))->push_back(*(yyvsp[0].TypeVal)); delete (yyvsp[0].TypeVal); @@ -3894,8 +3895,8 @@ ;} break; - case 157: -#line 1521 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 156: +#line 1520 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // Nonempty unsized arr if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-3].TypeVal))->getDescription()); @@ -3926,8 +3927,8 @@ ;} break; - case 158: -#line 1549 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 157: +#line 1548 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-2].TypeVal))->getDescription()); @@ -3946,8 +3947,8 @@ ;} break; - case 159: -#line 1565 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 158: +#line 1564 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-2].TypeVal))->getDescription()); @@ -3977,8 +3978,8 @@ ;} break; - case 160: -#line 1592 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 159: +#line 1591 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // Nonempty unsized arr if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-3].TypeVal))->getDescription()); @@ -4009,8 +4010,8 @@ ;} break; - case 161: -#line 1620 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 160: +#line 1619 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { const StructType *STy = dyn_cast((yyvsp[-3].TypeVal)->get()); if (STy == 0) @@ -4039,8 +4040,8 @@ ;} break; - case 162: -#line 1646 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 161: +#line 1645 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-2].TypeVal))->getDescription()); @@ -4063,8 +4064,8 @@ ;} break; - case 163: -#line 1666 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 162: +#line 1665 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { const StructType *STy = dyn_cast((yyvsp[-5].TypeVal)->get()); if (STy == 0) @@ -4093,8 +4094,8 @@ ;} break; - case 164: -#line 1692 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 163: +#line 1691 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-4].TypeVal))->getDescription()); @@ -4117,8 +4118,8 @@ ;} break; - case 165: -#line 1712 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 164: +#line 1711 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-1].TypeVal))->getDescription()); @@ -4133,8 +4134,8 @@ ;} break; - case 166: -#line 1724 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 165: +#line 1723 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-1].TypeVal))->getDescription()); @@ -4144,8 +4145,8 @@ ;} break; - case 167: -#line 1731 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 166: +#line 1730 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-1].TypeVal))->getDescription()); @@ -4214,8 +4215,8 @@ ;} break; - case 168: -#line 1797 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 167: +#line 1796 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-1].TypeVal))->getDescription()); @@ -4228,8 +4229,8 @@ ;} break; - case 169: -#line 1807 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 168: +#line 1806 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-1].TypeVal))->getDescription()); @@ -4242,8 +4243,8 @@ ;} break; - case 170: -#line 1817 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 169: +#line 1816 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // integral constants if (!ConstantInt::isValueValidForType((yyvsp[-1].PrimType), (yyvsp[0].SInt64Val))) GEN_ERROR("Constant value doesn't fit in type"); @@ -4252,8 +4253,8 @@ ;} break; - case 171: -#line 1823 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 170: +#line 1822 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // arbitrary precision integer constants uint32_t BitWidth = cast((yyvsp[-1].PrimType))->getBitWidth(); if ((yyvsp[0].APIntVal)->getBitWidth() > BitWidth) { @@ -4266,8 +4267,8 @@ ;} break; - case 172: -#line 1833 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 171: +#line 1832 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // integral constants if (!ConstantInt::isValueValidForType((yyvsp[-1].PrimType), (yyvsp[0].UInt64Val))) GEN_ERROR("Constant value doesn't fit in type"); @@ -4276,8 +4277,8 @@ ;} break; - case 173: -#line 1839 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 172: +#line 1838 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // arbitrary precision integer constants uint32_t BitWidth = cast((yyvsp[-1].PrimType))->getBitWidth(); if ((yyvsp[0].APIntVal)->getBitWidth() > BitWidth) { @@ -4290,8 +4291,8 @@ ;} break; - case 174: -#line 1849 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 173: +#line 1848 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // Boolean constants assert(cast((yyvsp[-1].PrimType))->getBitWidth() == 1 && "Not Bool?"); (yyval.ConstVal) = ConstantInt::getTrue(); @@ -4299,8 +4300,8 @@ ;} break; - case 175: -#line 1854 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 174: +#line 1853 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // Boolean constants assert(cast((yyvsp[-1].PrimType))->getBitWidth() == 1 && "Not Bool?"); (yyval.ConstVal) = ConstantInt::getFalse(); @@ -4308,8 +4309,8 @@ ;} break; - case 176: -#line 1859 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 175: +#line 1858 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // Float & Double constants if (!ConstantFP::isValueValidForType((yyvsp[-1].PrimType), (yyvsp[0].FPVal))) GEN_ERROR("Floating point constant invalid for type"); @@ -4318,8 +4319,8 @@ ;} break; - case 177: -#line 1867 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 176: +#line 1866 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-1].TypeVal))->getDescription()); @@ -4334,8 +4335,8 @@ ;} break; - case 178: -#line 1879 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 177: +#line 1878 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!isa((yyvsp[-2].ConstVal)->getType())) GEN_ERROR("GetElementPtr requires a pointer operand"); @@ -4360,8 +4361,8 @@ ;} break; - case 179: -#line 1901 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 178: +#line 1900 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if ((yyvsp[-5].ConstVal)->getType() != Type::Int1Ty) GEN_ERROR("Select condition must be of boolean type"); @@ -4372,8 +4373,8 @@ ;} break; - case 180: -#line 1909 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 179: +#line 1908 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if ((yyvsp[-3].ConstVal)->getType() != (yyvsp[-1].ConstVal)->getType()) GEN_ERROR("Binary operator types must match"); @@ -4382,8 +4383,8 @@ ;} break; - case 181: -#line 1915 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 180: +#line 1914 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if ((yyvsp[-3].ConstVal)->getType() != (yyvsp[-1].ConstVal)->getType()) GEN_ERROR("Logical operator types must match"); @@ -4397,8 +4398,8 @@ ;} break; - case 182: -#line 1926 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 181: +#line 1925 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if ((yyvsp[-3].ConstVal)->getType() != (yyvsp[-1].ConstVal)->getType()) GEN_ERROR("icmp operand types must match"); @@ -4406,8 +4407,8 @@ ;} break; - case 183: -#line 1931 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 182: +#line 1930 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if ((yyvsp[-3].ConstVal)->getType() != (yyvsp[-1].ConstVal)->getType()) GEN_ERROR("fcmp operand types must match"); @@ -4415,8 +4416,8 @@ ;} break; - case 184: -#line 1936 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 183: +#line 1935 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!ExtractElementInst::isValidOperands((yyvsp[-3].ConstVal), (yyvsp[-1].ConstVal))) GEN_ERROR("Invalid extractelement operands"); @@ -4425,8 +4426,8 @@ ;} break; - case 185: -#line 1942 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 184: +#line 1941 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!InsertElementInst::isValidOperands((yyvsp[-5].ConstVal), (yyvsp[-3].ConstVal), (yyvsp[-1].ConstVal))) GEN_ERROR("Invalid insertelement operands"); @@ -4435,8 +4436,8 @@ ;} break; - case 186: -#line 1948 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 185: +#line 1947 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!ShuffleVectorInst::isValidOperands((yyvsp[-5].ConstVal), (yyvsp[-3].ConstVal), (yyvsp[-1].ConstVal))) GEN_ERROR("Invalid shufflevector operands"); @@ -4445,16 +4446,16 @@ ;} break; - case 187: -#line 1957 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 186: +#line 1956 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { ((yyval.ConstVector) = (yyvsp[-2].ConstVector))->push_back((yyvsp[0].ConstVal)); CHECK_FOR_ERROR ;} break; - case 188: -#line 1961 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 187: +#line 1960 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ConstVector) = new std::vector(); (yyval.ConstVector)->push_back((yyvsp[0].ConstVal)); @@ -4462,28 +4463,28 @@ ;} break; - case 189: -#line 1969 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 188: +#line 1968 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.BoolVal) = false; ;} break; - case 190: -#line 1969 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 189: +#line 1968 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.BoolVal) = true; ;} break; - case 191: -#line 1972 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 190: +#line 1971 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.BoolVal) = true; ;} break; - case 192: -#line 1972 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 191: +#line 1971 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.BoolVal) = false; ;} break; - case 193: -#line 1975 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 192: +#line 1974 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { const Type* VTy = (yyvsp[-1].TypeVal)->get(); Value *V = getVal(VTy, (yyvsp[0].ValIDVal)); @@ -4497,8 +4498,8 @@ ;} break; - case 194: -#line 1986 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 193: +#line 1985 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { Constant *Val = (yyvsp[-3].ConstVal); const Type *DestTy = (yyvsp[-1].TypeVal)->get(); @@ -4513,8 +4514,8 @@ ;} break; - case 195: -#line 2007 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 194: +#line 2006 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ModuleVal) = ParserResult = CurModule.CurrentModule; CurModule.ModuleDone(); @@ -4522,8 +4523,8 @@ ;} break; - case 196: -#line 2012 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 195: +#line 2011 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ModuleVal) = ParserResult = CurModule.CurrentModule; CurModule.ModuleDone(); @@ -4531,40 +4532,40 @@ ;} break; - case 199: -#line 2025 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 198: +#line 2024 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { CurFun.isDeclare = false; ;} break; - case 200: -#line 2025 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 199: +#line 2024 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { CurFun.FunctionDone(); CHECK_FOR_ERROR ;} break; - case 201: -#line 2029 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 200: +#line 2028 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { CurFun.isDeclare = true; ;} break; - case 202: -#line 2029 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 201: +#line 2028 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { CHECK_FOR_ERROR ;} break; - case 203: -#line 2032 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 202: +#line 2031 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { CHECK_FOR_ERROR ;} break; - case 204: -#line 2035 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 203: +#line 2034 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[0].TypeVal))->getDescription()); @@ -4591,8 +4592,8 @@ ;} break; - case 205: -#line 2059 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 204: +#line 2058 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { ResolveTypeTo((yyvsp[-2].StrVal), (yyvsp[0].PrimType)); @@ -4606,8 +4607,8 @@ ;} break; - case 206: -#line 2070 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 205: +#line 2069 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { /* "Externally Visible" Linkage */ if ((yyvsp[0].ConstVal) == 0) @@ -4618,15 +4619,15 @@ ;} break; - case 207: -#line 2077 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 206: +#line 2076 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { CurGV = 0; ;} break; - case 208: -#line 2081 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 207: +#line 2080 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if ((yyvsp[0].ConstVal) == 0) GEN_ERROR("Global value initializer is not a constant"); @@ -4635,15 +4636,15 @@ ;} break; - case 209: -#line 2086 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 208: +#line 2085 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { CurGV = 0; ;} break; - case 210: -#line 2090 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 209: +#line 2089 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[0].TypeVal))->getDescription()); @@ -4653,16 +4654,16 @@ ;} break; - case 211: -#line 2096 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 210: +#line 2095 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { CurGV = 0; CHECK_FOR_ERROR ;} break; - case 212: -#line 2100 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 211: +#line 2099 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { std::string Name; if ((yyvsp[-4].StrVal)) { @@ -4684,22 +4685,22 @@ ;} break; - case 213: -#line 2119 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 212: +#line 2118 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { CHECK_FOR_ERROR ;} break; - case 214: -#line 2122 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 213: +#line 2121 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { CHECK_FOR_ERROR ;} break; - case 215: -#line 2128 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 214: +#line 2127 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { const std::string &AsmSoFar = CurModule.CurrentModule->getModuleInlineAsm(); if (AsmSoFar.empty()) @@ -4711,24 +4712,24 @@ ;} break; - case 216: -#line 2138 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 215: +#line 2137 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { CurModule.CurrentModule->setTargetTriple(*(yyvsp[0].StrVal)); delete (yyvsp[0].StrVal); ;} break; - case 217: -#line 2142 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 216: +#line 2141 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { CurModule.CurrentModule->setDataLayout(*(yyvsp[0].StrVal)); delete (yyvsp[0].StrVal); ;} break; - case 219: -#line 2149 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 218: +#line 2148 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { CurModule.CurrentModule->addLibrary(*(yyvsp[0].StrVal)); delete (yyvsp[0].StrVal); @@ -4736,8 +4737,8 @@ ;} break; - case 220: -#line 2154 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 219: +#line 2153 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { CurModule.CurrentModule->addLibrary(*(yyvsp[0].StrVal)); delete (yyvsp[0].StrVal); @@ -4745,15 +4746,15 @@ ;} break; - case 221: -#line 2159 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 220: +#line 2158 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { CHECK_FOR_ERROR ;} break; - case 222: -#line 2168 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 221: +#line 2167 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-2].TypeVal))->getDescription()); @@ -4766,8 +4767,8 @@ ;} break; - case 223: -#line 2178 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 222: +#line 2177 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-2].TypeVal))->getDescription()); @@ -4780,16 +4781,16 @@ ;} break; - case 224: -#line 2189 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 223: +#line 2188 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ArgList) = (yyvsp[0].ArgList); CHECK_FOR_ERROR ;} break; - case 225: -#line 2193 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 224: +#line 2192 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ArgList) = (yyvsp[-2].ArgList); struct ArgListEntry E; @@ -4801,8 +4802,8 @@ ;} break; - case 226: -#line 2202 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 225: +#line 2201 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ArgList) = new ArgListType; struct ArgListEntry E; @@ -4814,16 +4815,16 @@ ;} break; - case 227: -#line 2211 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 226: +#line 2210 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ArgList) = 0; CHECK_FOR_ERROR ;} break; - case 228: -#line 2217 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 227: +#line 2216 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { std::string FunctionName(*(yyvsp[-6].StrVal)); delete (yyvsp[-6].StrVal); // Free strdup'd memory! @@ -4945,8 +4946,8 @@ ;} break; - case 231: -#line 2339 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 230: +#line 2338 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FunctionVal) = CurFun.CurrentFunction; @@ -4957,16 +4958,16 @@ ;} break; - case 234: -#line 2350 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 233: +#line 2349 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FunctionVal) = (yyvsp[-1].FunctionVal); CHECK_FOR_ERROR ;} break; - case 235: -#line 2355 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 234: +#line 2354 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { CurFun.CurrentFunction->setLinkage((yyvsp[-2].Linkage)); CurFun.CurrentFunction->setVisibility((yyvsp[-1].Visibility)); @@ -4976,88 +4977,88 @@ ;} break; - case 236: -#line 2367 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 235: +#line 2366 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.BoolVal) = false; CHECK_FOR_ERROR ;} break; - case 237: -#line 2371 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 236: +#line 2370 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.BoolVal) = true; CHECK_FOR_ERROR ;} break; - case 238: -#line 2376 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 237: +#line 2375 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // A reference to a direct constant (yyval.ValIDVal) = ValID::create((yyvsp[0].SInt64Val)); CHECK_FOR_ERROR ;} break; - case 239: -#line 2380 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 238: +#line 2379 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ValIDVal) = ValID::create((yyvsp[0].UInt64Val)); CHECK_FOR_ERROR ;} break; - case 240: -#line 2384 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 239: +#line 2383 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // Perhaps it's an FP constant? (yyval.ValIDVal) = ValID::create((yyvsp[0].FPVal)); CHECK_FOR_ERROR ;} break; - case 241: -#line 2388 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 240: +#line 2387 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ValIDVal) = ValID::create(ConstantInt::getTrue()); CHECK_FOR_ERROR ;} break; - case 242: -#line 2392 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 241: +#line 2391 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ValIDVal) = ValID::create(ConstantInt::getFalse()); CHECK_FOR_ERROR ;} break; - case 243: -#line 2396 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 242: +#line 2395 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ValIDVal) = ValID::createNull(); CHECK_FOR_ERROR ;} break; - case 244: -#line 2400 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 243: +#line 2399 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ValIDVal) = ValID::createUndef(); CHECK_FOR_ERROR ;} break; - case 245: -#line 2404 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 244: +#line 2403 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // A vector zero constant. (yyval.ValIDVal) = ValID::createZeroInit(); CHECK_FOR_ERROR ;} break; - case 246: -#line 2408 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 245: +#line 2407 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // Nonempty unsized packed vector const Type *ETy = (*(yyvsp[-1].ConstVector))[0]->getType(); int NumElements = (yyvsp[-1].ConstVector)->size(); @@ -5085,16 +5086,16 @@ ;} break; - case 247: -#line 2433 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 246: +#line 2432 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ValIDVal) = ValID::create((yyvsp[0].ConstVal)); CHECK_FOR_ERROR ;} break; - case 248: -#line 2437 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 247: +#line 2436 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ValIDVal) = ValID::createInlineAsm(*(yyvsp[-2].StrVal), *(yyvsp[0].StrVal), (yyvsp[-3].BoolVal)); delete (yyvsp[-2].StrVal); @@ -5103,24 +5104,24 @@ ;} break; - case 249: -#line 2447 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 248: +#line 2446 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // Is it an integer reference...? (yyval.ValIDVal) = ValID::createLocalID((yyvsp[0].UIntVal)); CHECK_FOR_ERROR ;} break; - case 250: -#line 2451 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 249: +#line 2450 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ValIDVal) = ValID::createGlobalID((yyvsp[0].UIntVal)); CHECK_FOR_ERROR ;} break; - case 251: -#line 2455 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 250: +#line 2454 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // Is it a named reference...? (yyval.ValIDVal) = ValID::createLocalName(*(yyvsp[0].StrVal)); delete (yyvsp[0].StrVal); @@ -5128,8 +5129,8 @@ ;} break; - case 252: -#line 2460 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 251: +#line 2459 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // Is it a named reference...? (yyval.ValIDVal) = ValID::createGlobalName(*(yyvsp[0].StrVal)); delete (yyvsp[0].StrVal); @@ -5137,8 +5138,8 @@ ;} break; - case 255: -#line 2473 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 254: +#line 2472 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-1].TypeVal))->getDescription()); @@ -5148,24 +5149,24 @@ ;} break; - case 256: -#line 2482 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 255: +#line 2481 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FunctionVal) = (yyvsp[-1].FunctionVal); CHECK_FOR_ERROR ;} break; - case 257: -#line 2486 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 256: +#line 2485 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // Do not allow functions with 0 basic blocks (yyval.FunctionVal) = (yyvsp[-1].FunctionVal); CHECK_FOR_ERROR ;} break; - case 258: -#line 2495 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 257: +#line 2494 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { setValueName((yyvsp[0].TermInstVal), (yyvsp[-1].StrVal)); CHECK_FOR_ERROR @@ -5176,8 +5177,8 @@ ;} break; - case 259: -#line 2504 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 258: +#line 2503 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (CastInst *CI1 = dyn_cast((yyvsp[0].InstVal))) if (CastInst *CI2 = dyn_cast(CI1->getOperand(0))) @@ -5189,16 +5190,16 @@ ;} break; - case 260: -#line 2513 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 259: +#line 2512 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // Empty space between instruction lists (yyval.BasicBlockVal) = defineBBVal(ValID::createLocalID(CurFun.NextValNum)); CHECK_FOR_ERROR ;} break; - case 261: -#line 2517 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 260: +#line 2516 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // Labelled (named) basic block (yyval.BasicBlockVal) = defineBBVal(ValID::createLocalName(*(yyvsp[0].StrVal))); delete (yyvsp[0].StrVal); @@ -5207,24 +5208,24 @@ ;} break; - case 262: -#line 2524 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 261: +#line 2523 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // Return with a result... (yyval.TermInstVal) = new ReturnInst((yyvsp[0].ValueVal)); CHECK_FOR_ERROR ;} break; - case 263: -#line 2528 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 262: +#line 2527 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // Return with no result... (yyval.TermInstVal) = new ReturnInst(); CHECK_FOR_ERROR ;} break; - case 264: -#line 2532 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 263: +#line 2531 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // Unconditional Branch... BasicBlock* tmpBB = getBBVal((yyvsp[0].ValIDVal)); CHECK_FOR_ERROR @@ -5232,8 +5233,8 @@ ;} break; - case 265: -#line 2537 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 264: +#line 2536 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { assert(cast((yyvsp[-7].PrimType))->getBitWidth() == 1 && "Not Bool?"); BasicBlock* tmpBBA = getBBVal((yyvsp[-3].ValIDVal)); @@ -5246,8 +5247,8 @@ ;} break; - case 266: -#line 2547 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 265: +#line 2546 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { Value* tmpVal = getVal((yyvsp[-7].PrimType), (yyvsp[-6].ValIDVal)); CHECK_FOR_ERROR @@ -5269,8 +5270,8 @@ ;} break; - case 267: -#line 2566 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 266: +#line 2565 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { Value* tmpVal = getVal((yyvsp[-6].PrimType), (yyvsp[-5].ValIDVal)); CHECK_FOR_ERROR @@ -5282,8 +5283,8 @@ ;} break; - case 268: -#line 2576 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 267: +#line 2575 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // Handle the short syntax @@ -5365,24 +5366,24 @@ ;} break; - case 269: -#line 2655 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 268: +#line 2654 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.TermInstVal) = new UnwindInst(); CHECK_FOR_ERROR ;} break; - case 270: -#line 2659 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 269: +#line 2658 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.TermInstVal) = new UnreachableInst(); CHECK_FOR_ERROR ;} break; - case 271: -#line 2666 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 270: +#line 2665 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.JumpTable) = (yyvsp[-5].JumpTable); Constant *V = cast(getExistingVal((yyvsp[-4].PrimType), (yyvsp[-3].ValIDVal))); @@ -5396,8 +5397,8 @@ ;} break; - case 272: -#line 2677 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 271: +#line 2676 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.JumpTable) = new std::vector >(); Constant *V = cast(getExistingVal((yyvsp[-4].PrimType), (yyvsp[-3].ValIDVal))); @@ -5412,8 +5413,8 @@ ;} break; - case 273: -#line 2690 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 272: +#line 2689 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // Is this definition named?? if so, assign the name... setValueName((yyvsp[0].InstVal), (yyvsp[-1].StrVal)); @@ -5424,8 +5425,8 @@ ;} break; - case 274: -#line 2700 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 273: +#line 2699 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // Used for PHI nodes if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-5].TypeVal))->getDescription()); @@ -5439,8 +5440,8 @@ ;} break; - case 275: -#line 2711 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 274: +#line 2710 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.PHIList) = (yyvsp[-6].PHIList); Value* tmpVal = getVal((yyvsp[-6].PHIList)->front().first->getType(), (yyvsp[-3].ValIDVal)); @@ -5451,8 +5452,8 @@ ;} break; - case 276: -#line 2721 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 275: +#line 2720 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-2].TypeVal))->getDescription()); @@ -5464,8 +5465,8 @@ ;} break; - case 277: -#line 2730 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 276: +#line 2729 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-2].TypeVal))->getDescription()); @@ -5477,18 +5478,18 @@ ;} break; - case 278: -#line 2739 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 277: +#line 2738 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ValueRefList) = new ValueRefList(); ;} break; - case 279: -#line 2742 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 278: +#line 2741 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ValueList) = new std::vector(); ;} break; - case 280: -#line 2743 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 279: +#line 2742 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ValueList) = (yyvsp[-2].ValueList); (yyval.ValueList)->push_back((yyvsp[0].ValueVal)); @@ -5496,24 +5497,24 @@ ;} break; - case 281: -#line 2750 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 280: +#line 2749 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.BoolVal) = true; CHECK_FOR_ERROR ;} break; - case 282: -#line 2754 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 281: +#line 2753 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.BoolVal) = false; CHECK_FOR_ERROR ;} break; - case 283: -#line 2759 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 282: +#line 2758 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-3].TypeVal))->getDescription()); @@ -5537,8 +5538,8 @@ ;} break; - case 284: -#line 2780 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 283: +#line 2779 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-3].TypeVal))->getDescription()); @@ -5558,8 +5559,8 @@ ;} break; - case 285: -#line 2797 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 284: +#line 2796 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-3].TypeVal))->getDescription()); @@ -5576,8 +5577,8 @@ ;} break; - case 286: -#line 2811 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 285: +#line 2810 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-3].TypeVal))->getDescription()); @@ -5594,8 +5595,8 @@ ;} break; - case 287: -#line 2825 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 286: +#line 2824 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[0].TypeVal))->getDescription()); @@ -5610,8 +5611,8 @@ ;} break; - case 288: -#line 2837 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 287: +#line 2836 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if ((yyvsp[-4].ValueVal)->getType() != Type::Int1Ty) GEN_ERROR("select condition must be boolean"); @@ -5622,8 +5623,8 @@ ;} break; - case 289: -#line 2845 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 288: +#line 2844 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[0].TypeVal))->getDescription()); @@ -5633,8 +5634,8 @@ ;} break; - case 290: -#line 2852 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 289: +#line 2851 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!ExtractElementInst::isValidOperands((yyvsp[-2].ValueVal), (yyvsp[0].ValueVal))) GEN_ERROR("Invalid extractelement operands"); @@ -5643,8 +5644,8 @@ ;} break; - case 291: -#line 2858 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 290: +#line 2857 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!InsertElementInst::isValidOperands((yyvsp[-4].ValueVal), (yyvsp[-2].ValueVal), (yyvsp[0].ValueVal))) GEN_ERROR("Invalid insertelement operands"); @@ -5653,8 +5654,8 @@ ;} break; - case 292: -#line 2864 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 291: +#line 2863 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!ShuffleVectorInst::isValidOperands((yyvsp[-4].ValueVal), (yyvsp[-2].ValueVal), (yyvsp[0].ValueVal))) GEN_ERROR("Invalid shufflevector operands"); @@ -5663,8 +5664,8 @@ ;} break; - case 293: -#line 2870 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 292: +#line 2869 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { const Type *Ty = (yyvsp[0].PHIList)->front().first->getType(); if (!Ty->isFirstClassType()) @@ -5682,8 +5683,8 @@ ;} break; - case 294: -#line 2886 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 293: +#line 2885 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { // Handle the short syntax @@ -5770,32 +5771,32 @@ ;} break; - case 295: -#line 2970 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 294: +#line 2969 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.InstVal) = (yyvsp[0].InstVal); CHECK_FOR_ERROR ;} break; - case 296: -#line 2975 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 295: +#line 2974 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.BoolVal) = true; CHECK_FOR_ERROR ;} break; - case 297: -#line 2979 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 296: +#line 2978 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.BoolVal) = false; CHECK_FOR_ERROR ;} break; - case 298: -#line 2986 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 297: +#line 2985 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-1].TypeVal))->getDescription()); @@ -5805,8 +5806,8 @@ ;} break; - case 299: -#line 2993 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 298: +#line 2992 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-4].TypeVal))->getDescription()); @@ -5817,8 +5818,8 @@ ;} break; - case 300: -#line 3001 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 299: +#line 3000 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-1].TypeVal))->getDescription()); @@ -5828,8 +5829,8 @@ ;} break; - case 301: -#line 3008 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 300: +#line 3007 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-4].TypeVal))->getDescription()); @@ -5840,8 +5841,8 @@ ;} break; - case 302: -#line 3016 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 301: +#line 3015 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!isa((yyvsp[0].ValueVal)->getType())) GEN_ERROR("Trying to free nonpointer type " + @@ -5851,8 +5852,8 @@ ;} break; - case 303: -#line 3024 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 302: +#line 3023 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-2].TypeVal))->getDescription()); @@ -5869,8 +5870,8 @@ ;} break; - case 304: -#line 3038 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 303: +#line 3037 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-2].TypeVal))->getDescription()); @@ -5890,8 +5891,8 @@ ;} break; - case 305: -#line 3055 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" + case 304: +#line 3054 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-2].TypeVal))->getDescription()); @@ -5914,7 +5915,7 @@ } /* Line 1126 of yacc.c. */ -#line 5918 "llvmAsmParser.tab.c" +#line 5919 "llvmAsmParser.tab.c" yyvsp -= yylen; yyssp -= yylen; @@ -6182,7 +6183,7 @@ } -#line 3072 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 3071 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" // common code from the two 'RunVMAsmParser' functions Modified: llvm/trunk/lib/AsmParser/llvmAsmParser.y.cvs URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/llvmAsmParser.y.cvs?rev=40634&r1=40633&r2=40634&view=diff ============================================================================== --- llvm/trunk/lib/AsmParser/llvmAsmParser.y.cvs (original) +++ llvm/trunk/lib/AsmParser/llvmAsmParser.y.cvs Tue Jul 31 09:41:17 2007 @@ -1245,7 +1245,6 @@ | NOUNWIND { $$ = ParamAttr::NoUnwind; } | ZEROEXT { $$ = ParamAttr::ZExt; } | SIGNEXT { $$ = ParamAttr::SExt; } - | INREG { $$ = ParamAttr::InReg; } ; OptFuncAttrs : /* empty */ { $$ = ParamAttr::None; } From dberlin at dberlin.org Tue Jul 31 10:27:54 2007 From: dberlin at dberlin.org (Daniel Berlin) Date: Tue, 31 Jul 2007 11:27:54 -0400 Subject: [llvm-commits] [llvm] r40624 - in /llvm/trunk: lib/Analysis/BasicAliasAnalysis.cpp test/Analysis/BasicAA/2007-07-31-NoAliasTest.ll In-Reply-To: <20070731143145.GL14991@village.us.cray.com> References: <20070731143145.GL14991@village.us.cray.com> Message-ID: <4aca3dc20707310827q64694e30le353cdecd89f7faa@mail.gmail.com> On 7/31/07, Dan Gohman wrote: > > Log: > > Teach BasicAA about noalias function parameters. Passes all of DejaGNU and test-suite. > > I just grepped through LLVM's test-suite and didn't find any uses of the > restrict keyword though... > There are a few you could snag from GCC's testsuite, because we started with an implementation that had the exact same problems you've noted below. > So for an alias query where one of the two pointers is noalias and the > other is not, and the non-noalias one doesn't have a base object that > basicaa can find, the answer should be MayAlias. A more advanced pass > could try to prove that the non-noalias pointer couldn't possibly be > "based on" the noalias one by examining all its uses, though the specific > example here would defy such analysis. This is also what we eventually did with GCC. Note that your function call example is not just "not disallowed", it is explicitly allowed. It is the one case you are allowed to carry restricted pointers outside the block they are in. See C99 6.7.3.1 #12 There is a weird issue in restrict where gcc doesn't "check for correctness of input code", and i doubt LLVM can either (at least, not easily). This is that block nesting can introduce valid restricted pointers in the nested block that would have otherwise been invalid. IIRC, anyway :) We of course, eliminate lexical scoping. For safety sake, we just assume that if they have come up with assignments between restricted pointers, that they are legal. From christopher.lamb at gmail.com Tue Jul 31 11:18:07 2007 From: christopher.lamb at gmail.com (Christopher Lamb) Date: Tue, 31 Jul 2007 16:18:07 -0000 Subject: [llvm-commits] [llvm] r40635 - in /llvm/trunk: lib/Analysis/BasicAliasAnalysis.cpp test/Analysis/BasicAA/2007-07-31-NoAliasTest.ll Message-ID: <200707311618.l6VGI72x025262@zion.cs.uiuc.edu> Author: clamb Date: Tue Jul 31 11:18:07 2007 New Revision: 40635 URL: http://llvm.org/viewvc/llvm-project?rev=40635&view=rev Log: Revert overly aggressive interpretation of noalias Removed: llvm/trunk/test/Analysis/BasicAA/2007-07-31-NoAliasTest.ll Modified: llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp Modified: llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp?rev=40635&r1=40634&r2=40635&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp (original) +++ llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp Tue Jul 31 11:18:07 2007 @@ -18,7 +18,6 @@ #include "llvm/Constants.h" #include "llvm/DerivedTypes.h" #include "llvm/Function.h" -#include "llvm/ParameterAttributes.h" #include "llvm/GlobalVariable.h" #include "llvm/Instructions.h" #include "llvm/Pass.h" @@ -295,21 +294,6 @@ // Pointing at a discernible object? if (O1) { - // Check for noalias attribute - if (isa(O1)) { - const Argument *Arg = cast(O1); - const Function *Func = Arg->getParent(); - const ParamAttrsList *Attr = Func->getFunctionType()->getParamAttrs(); - if (Attr) { - unsigned Idx = 1; - for (Function::const_arg_iterator I = Func->arg_begin(), - E = Func->arg_end(); I != E; ++I, ++Idx) { - if (&(*I) == Arg && - Attr->paramHasAttr(Idx, ParamAttr::NoAlias)) - return NoAlias; - } - } - } if (O2) { if (isa(O1)) { // Incoming argument cannot alias locally allocated object! @@ -323,22 +307,7 @@ // If they are two different objects, we know that we have no alias... return NoAlias; } - - // Check for noalias atrribute independently from above logic - if (isa(O2)) { - const Argument *Arg = cast(O2); - const Function *Func = Arg->getParent(); - const ParamAttrsList *Attr = Func->getFunctionType()->getParamAttrs(); - if (Attr) { - unsigned Idx = 1; - for (Function::const_arg_iterator I = Func->arg_begin(), - E = Func->arg_end(); I != E; ++I, ++Idx) { - if (&(*I) == Arg && - Attr->paramHasAttr(Idx, ParamAttr::NoAlias)) - return NoAlias; - } - } - } + // If they are the same object, they we can look at the indexes. If they // index off of the object is the same for both pointers, they must alias. // If they are provably different, they must not alias. Otherwise, we Removed: llvm/trunk/test/Analysis/BasicAA/2007-07-31-NoAliasTest.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/BasicAA/2007-07-31-NoAliasTest.ll?rev=40634&view=auto ============================================================================== --- llvm/trunk/test/Analysis/BasicAA/2007-07-31-NoAliasTest.ll (original) +++ llvm/trunk/test/Analysis/BasicAA/2007-07-31-NoAliasTest.ll (removed) @@ -1,12 +0,0 @@ -; RUN: llvm-as %s -o - | opt -aa-eval -print-may-aliases -disable-output |& grep '1 may alias' -; RUN: llvm-as %s -o - | opt -aa-eval -print-may-aliases -disable-output |& grep '5 no alias' -; RUN: llvm-as %s -o - | opt -aa-eval -print-may-aliases -disable-output |& grep 'MayAlias: i32* %ptr4, i32* %ptr2' - -define void @_Z3fooPiS_RiS_(i32* noalias %ptr1, i32* %ptr2, i32* noalias %ptr3, i32* %ptr4) { -entry: - store i32 0, i32* %ptr1 - store i32 0, i32* %ptr2 - store i32 0, i32* %ptr3 - store i32 0, i32* %ptr4 - ret void -} \ No newline at end of file From sabre at nondot.org Tue Jul 31 11:18:26 2007 From: sabre at nondot.org (Chris Lattner) Date: Tue, 31 Jul 2007 16:18:26 -0000 Subject: [llvm-commits] [llvm] r40636 - /llvm/trunk/test/CodeGen/PowerPC/no-dead-strip.ll Message-ID: <200707311618.l6VGIQbS025281@zion.cs.uiuc.edu> Author: lattner Date: Tue Jul 31 11:18:25 2007 New Revision: 40636 URL: http://llvm.org/viewvc/llvm-project?rev=40636&view=rev Log: new testcase Added: llvm/trunk/test/CodeGen/PowerPC/no-dead-strip.ll Added: llvm/trunk/test/CodeGen/PowerPC/no-dead-strip.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/no-dead-strip.ll?rev=40636&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/PowerPC/no-dead-strip.ll (added) +++ llvm/trunk/test/CodeGen/PowerPC/no-dead-strip.ll Tue Jul 31 11:18:25 2007 @@ -0,0 +1,8 @@ +; RUN: llvm-as < %s | llc | grep {no_dead_strip.*_X} + +target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" +target triple = "powerpc-apple-darwin8.8.0" + at X = weak global i32 0 ; [#uses=1] + at .str = internal constant [4 x i8] c"t.c\00", section "llvm.metadata" ; <[4 x i8]*> [#uses=1] + at llvm.used = appending global [1 x i8*] [ i8* bitcast (i32* @X to i8*) ] ; <[1 x i8*]*> [#uses=0] + From dpatel at apple.com Tue Jul 31 11:52:25 2007 From: dpatel at apple.com (Devang Patel) Date: Tue, 31 Jul 2007 16:52:25 -0000 Subject: [llvm-commits] [llvm] r40638 - /llvm/trunk/lib/Transforms/Scalar/LICM.cpp Message-ID: <200707311652.l6VGqP6b026148@zion.cs.uiuc.edu> Author: dpatel Date: Tue Jul 31 11:52:25 2007 New Revision: 40638 URL: http://llvm.org/viewvc/llvm-project?rev=40638&view=rev Log: Add note. Modified: llvm/trunk/lib/Transforms/Scalar/LICM.cpp Modified: llvm/trunk/lib/Transforms/Scalar/LICM.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LICM.cpp?rev=40638&r1=40637&r2=40638&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/LICM.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/LICM.cpp Tue Jul 31 11:52:25 2007 @@ -218,7 +218,9 @@ LoopPass *llvm::createLICMPass() { return new LICM(); } -/// Hoist expressions out of the specified loop... +/// Hoist expressions out of the specified loop. Note, alias info for inner +/// loop is not preserved so it is not a good idea to run LICM multiple +/// times on one loop. /// bool LICM::runOnLoop(Loop *L, LPPassManager &LPM) { Changed = false; From djg at cray.com Tue Jul 31 12:22:27 2007 From: djg at cray.com (Dan Gohman) Date: Tue, 31 Jul 2007 17:22:27 -0000 Subject: [llvm-commits] [llvm] r40641 - /llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp Message-ID: <200707311722.l6VHMRuT027079@zion.cs.uiuc.edu> Author: djg Date: Tue Jul 31 12:22:27 2007 New Revision: 40641 URL: http://llvm.org/viewvc/llvm-project?rev=40641&view=rev Log: Use SCEVExpander::InsertCastOfTo instead of calling new IntToPtrInst directly, because the insert point used by the SCEVExpander may vary from what LSR originally computes. Modified: llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp Modified: llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp?rev=40641&r1=40640&r2=40641&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp Tue Jul 31 12:22:27 2007 @@ -596,10 +596,13 @@ } } Value *NewVal = InsertCodeForBaseAtPosition(NewBase, Rewriter, InsertPt, L); - // Adjust the type back to match the Inst. + // Adjust the type back to match the Inst. Note that we can't use InsertPt + // here because the SCEVExpander may have inserted the instructions after + // that point, in its efforts to avoid inserting redundant expressions. if (isa(OperandValToReplace->getType())) { - NewVal = new IntToPtrInst(NewVal, OperandValToReplace->getType(), "cast", - InsertPt); + NewVal = SCEVExpander::InsertCastOfTo(Instruction::IntToPtr, + NewVal, + OperandValToReplace->getType()); } // Replace the use of the operand Value with the new Phi we just created. Inst->replaceUsesOfWith(OperandValToReplace, NewVal); @@ -648,9 +651,13 @@ Instruction *InsertPt = PN->getIncomingBlock(i)->getTerminator(); Code = InsertCodeForBaseAtPosition(NewBase, Rewriter, InsertPt, L); - // Adjust the type back to match the PHI. + // Adjust the type back to match the PHI. Note that we can't use InsertPt + // here because the SCEVExpander may have inserted its instructions after + // that point, in its efforts to avoid inserting redundant expressions. if (isa(PN->getType())) { - Code = new IntToPtrInst(Code, PN->getType(), "cast", InsertPt); + Code = SCEVExpander::InsertCastOfTo(Instruction::IntToPtr, + Code, + PN->getType()); } } From asl at math.spbu.ru Tue Jul 31 12:36:34 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Tue, 31 Jul 2007 21:36:34 +0400 Subject: [llvm-commits] [llvm-gcc-4.0] r40622 - in /llvm-gcc-4.0/trunk/gcc: llvm-backend.cpp llvm-convert.cpp llvm-internal.h llvm-types.cpp In-Reply-To: References: <200707310650.l6V6oPCJ003921.SS5642SS@zion.cs.uiuc.edu> <1185870659.9492.19.camel@asl.dorms.spbu.ru> Message-ID: <1185903394.9492.30.camel@asl.dorms.spbu.ru> Hello, Christopher. > What specifically is dangerous about this? Well, because you're accessing internals of tree_node structure directly. Please use macroses. > I'm no GCC expert, but the DECL_ARGUMENTS() seems to be the only place > where the restrict qualifier is preserved under C++. While debugging I > could inspect the data structure to see that the information I needed > was there, but looking in tree.h I found no TREE_... macro that got me > there. This sometimes mean, that such data shouldn't be used at all ;) What's wrong with TREE_TYPE(decl) ? > The ?: came about because while bootstrapping GCC there were cases > when DelArgs was NULL. It seems a bit of a hack, I know, but it's the > best I could figure and it seems to work properly in my tests. If you > have a suggestion on a more proper way to consistently get the > restrict qualifier I'm all ears. =) What was the function decl in that case? -- With best regards, Anton Korobeynikov. Faculty of Mathematics & Mechanics, Saint Petersburg State University. From resistor at mac.com Tue Jul 31 12:43:15 2007 From: resistor at mac.com (Owen Anderson) Date: Tue, 31 Jul 2007 17:43:15 -0000 Subject: [llvm-commits] [llvm] r40642 - in /llvm/trunk: lib/Transforms/Scalar/GVN.cpp test/Transforms/GVN/2007-07-31-NoDomInherit.ll Message-ID: <200707311743.l6VHhFPK027768@zion.cs.uiuc.edu> Author: resistor Date: Tue Jul 31 12:43:14 2007 New Revision: 40642 URL: http://llvm.org/viewvc/llvm-project?rev=40642&view=rev Log: Fix a misoptimization in aha. Added: llvm/trunk/test/Transforms/GVN/2007-07-31-NoDomInherit.ll Modified: llvm/trunk/lib/Transforms/Scalar/GVN.cpp Modified: llvm/trunk/lib/Transforms/Scalar/GVN.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/GVN.cpp?rev=40642&r1=40641&r2=40642&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/GVN.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/GVN.cpp Tue Jul 31 12:43:14 2007 @@ -710,21 +710,14 @@ /// GetValueForBlock - Get the value to use within the specified basic block. /// available values are in Phis. Value *GVN::GetValueForBlock(BasicBlock *BB, LoadInst* orig, - DenseMap &Phis) { - DominatorTree &DT = getAnalysis(); + DenseMap &Phis) { // If we have already computed this value, return the previously computed val. Value *&V = Phis[BB]; if (V) return V; - - DomTreeNode *IDom = DT.getNode(BB)->getIDom(); - - if (IDom && Phis.count(IDom->getBlock())) { - return V = GetValueForBlock(IDom->getBlock(), orig, Phis); - } if (std::distance(pred_begin(BB), pred_end(BB)) == 1) - return V = GetValueForBlock(IDom->getBlock(), orig, Phis); + return V = GetValueForBlock(*pred_begin(BB), orig, Phis); // Otherwise, the idom is the loop, so we need to insert a PHI node. Do so // now, then get values to fill in the incoming values for the PHI. @@ -733,9 +726,30 @@ PN->reserveOperandSpace(std::distance(pred_begin(BB), pred_end(BB))); V = PN; + bool all_same = true; + Value* first = 0; + // Fill in the incoming values for the block. - for (pred_iterator PI = pred_begin(BB), E = pred_end(BB); PI != E; ++PI) - PN->addIncoming(GetValueForBlock(*PI, orig, Phis), *PI); + for (pred_iterator PI = pred_begin(BB), E = pred_end(BB); PI != E; ++PI) { + Value* val = GetValueForBlock(*PI, orig, Phis); + if (first == 0) + first = val; + else if (all_same && first != val) + all_same = false; + + PN->addIncoming(val, *PI); + } + + if (all_same) { + MemoryDependenceAnalysis& MD = getAnalysis(); + + MD.removeInstruction(PN); + PN->replaceAllUsesWith(first); + PN->eraseFromParent(); + + return first; + } + return PN; } Added: llvm/trunk/test/Transforms/GVN/2007-07-31-NoDomInherit.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/2007-07-31-NoDomInherit.ll?rev=40642&view=auto ============================================================================== --- llvm/trunk/test/Transforms/GVN/2007-07-31-NoDomInherit.ll (added) +++ llvm/trunk/test/Transforms/GVN/2007-07-31-NoDomInherit.ll Tue Jul 31 12:43:14 2007 @@ -0,0 +1,313 @@ +; RUN: llvm-as < %s | opt -gvn | llvm-dis | grep tmp51.rle + + %struct.anon = type { i32 (i32, i32, i32)*, i32, i32, [3 x i32], i8*, i8*, i8* } + at debug = external constant i32 ; [#uses=0] + at counters = external constant i32 ; [#uses=1] + at trialx = external global [17 x i32] ; <[17 x i32]*> [#uses=1] + at dummy1 = external global [7 x i32] ; <[7 x i32]*> [#uses=0] + at dummy2 = external global [4 x i32] ; <[4 x i32]*> [#uses=0] + at unacceptable = external global i32 ; [#uses=0] + at isa = external global [13 x %struct.anon] ; <[13 x %struct.anon]*> [#uses=3] + at .str = external constant [4 x i8] ; <[4 x i8]*> [#uses=0] + at .str1 = external constant [3 x i8] ; <[3 x i8]*> [#uses=0] + at .str2 = external constant [1 x i8] ; <[1 x i8]*> [#uses=0] + at .str3 = external constant [4 x i8] ; <[4 x i8]*> [#uses=0] + at .str4 = external constant [3 x i8] ; <[3 x i8]*> [#uses=0] + at .str5 = external constant [4 x i8] ; <[4 x i8]*> [#uses=0] + at .str6 = external constant [2 x i8] ; <[2 x i8]*> [#uses=0] + at .str7 = external constant [4 x i8] ; <[4 x i8]*> [#uses=0] + at .str8 = external constant [4 x i8] ; <[4 x i8]*> [#uses=0] + at .str9 = external constant [4 x i8] ; <[4 x i8]*> [#uses=0] + at .str10 = external constant [4 x i8] ; <[4 x i8]*> [#uses=0] + at .str11 = external constant [2 x i8] ; <[2 x i8]*> [#uses=0] + at .str12 = external constant [4 x i8] ; <[4 x i8]*> [#uses=0] + at .str13 = external constant [2 x i8] ; <[2 x i8]*> [#uses=0] + at .str14 = external constant [5 x i8] ; <[5 x i8]*> [#uses=0] + at .str15 = external constant [5 x i8] ; <[5 x i8]*> [#uses=0] + at .str16 = external constant [4 x i8] ; <[4 x i8]*> [#uses=0] + at .str17 = external constant [4 x i8] ; <[4 x i8]*> [#uses=0] + at .str18 = external constant [3 x i8] ; <[3 x i8]*> [#uses=0] + at .str19 = external constant [4 x i8] ; <[4 x i8]*> [#uses=0] + at .str20 = external constant [4 x i8] ; <[4 x i8]*> [#uses=0] + at .str21 = external constant [4 x i8] ; <[4 x i8]*> [#uses=0] + at .str22 = external constant [4 x i8] ; <[4 x i8]*> [#uses=0] + at .str23 = external constant [5 x i8] ; <[5 x i8]*> [#uses=0] + at .str24 = external constant [4 x i8] ; <[4 x i8]*> [#uses=0] + at .str25 = external constant [6 x i8] ; <[6 x i8]*> [#uses=0] + at .str26 = external constant [5 x i8] ; <[5 x i8]*> [#uses=0] + at .str27 = external constant [6 x i8] ; <[6 x i8]*> [#uses=0] + at r = external global [17 x i32] ; <[17 x i32]*> [#uses=0] + at .str28 = external constant [3 x i8] ; <[3 x i8]*> [#uses=0] + at .str29 = external constant [5 x i8] ; <[5 x i8]*> [#uses=0] + at pgm = external global [5 x { i32, [3 x i32] }] ; <[5 x { i32, [3 x i32] }]*> [#uses=4] + at .str30 = external constant [3 x i8] ; <[3 x i8]*> [#uses=0] + at .str31 = external constant [13 x i8] ; <[13 x i8]*> [#uses=0] + at .str32 = external constant [3 x i8] ; <[3 x i8]*> [#uses=0] + at .str33 = external constant [4 x i8] ; <[4 x i8]*> [#uses=0] + at .str34 = external constant [20 x i8] ; <[20 x i8]*> [#uses=0] + at numi = external global i32 ; [#uses=7] + at .str35 = external constant [10 x i8] ; <[10 x i8]*> [#uses=0] + at counter = external global [5 x i32] ; <[5 x i32]*> [#uses=2] + at itrialx.2510 = external global i32 ; [#uses=0] + at .str36 = external constant [43 x i8] ; <[43 x i8]*> [#uses=0] + at .str37 = external constant [42 x i8] ; <[42 x i8]*> [#uses=0] + at corr_result = external global i32 ; [#uses=0] + at .str38 = external constant [3 x i8] ; <[3 x i8]*> [#uses=0] + at .str39 = external constant [5 x i8] ; <[5 x i8]*> [#uses=0] + at .str40 = external constant [47 x i8] ; <[47 x i8]*> [#uses=0] + at correct_result = external global [17 x i32] ; <[17 x i32]*> [#uses=1] + at .str41 = external constant [46 x i8] ; <[46 x i8]*> [#uses=0] + at .str42 = external constant [32 x i8] ; <[32 x i8]*> [#uses=0] + at .str43 = external constant [44 x i8] ; <[44 x i8]*> [#uses=1] + at .str44 = external constant [21 x i8] ; <[21 x i8]*> [#uses=1] + at .str45 = external constant [12 x i8] ; <[12 x i8]*> [#uses=1] + at .str46 = external constant [5 x i8] ; <[5 x i8]*> [#uses=1] + at .str47 = external constant [12 x i8] ; <[12 x i8]*> [#uses=1] + +declare i32 @neg(i32, i32, i32) + +declare i32 @Not(i32, i32, i32) + +declare i32 @pop(i32, i32, i32) + +declare i32 @nlz(i32, i32, i32) + +declare i32 @rev(i32, i32, i32) + +declare i32 @add(i32, i32, i32) + +declare i32 @sub(i32, i32, i32) + +declare i32 @mul(i32, i32, i32) + +declare i32 @divide(i32, i32, i32) + +declare i32 @divu(i32, i32, i32) + +declare i32 @And(i32, i32, i32) + +declare i32 @Or(i32, i32, i32) + +declare i32 @Xor(i32, i32, i32) + +declare i32 @rotl(i32, i32, i32) + +declare i32 @shl(i32, i32, i32) + +declare i32 @shr(i32, i32, i32) + +declare i32 @shrs(i32, i32, i32) + +declare i32 @cmpeq(i32, i32, i32) + +declare i32 @cmplt(i32, i32, i32) + +declare i32 @cmpltu(i32, i32, i32) + +declare i32 @seleq(i32, i32, i32) + +declare i32 @sellt(i32, i32, i32) + +declare i32 @selle(i32, i32, i32) + +declare void @print_expr(i32) + +declare i32 @printf(i8*, ...) + +declare i32 @putchar(i32) + +declare void @print_pgm() + +declare void @simulate_one_instruction(i32) + +declare i32 @check(i32) + +declare i32 @puts(i8*) + +declare void @fix_operands(i32) + +declare void @abort() + +declare i32 @increment() + +declare i32 @search() + +define i32 @main(i32 %argc, i8** %argv) { +entry: + %argc_addr = alloca i32 ; [#uses=1] + %argv_addr = alloca i8** ; [#uses=1] + %retval = alloca i32, align 4 ; [#uses=2] + %tmp = alloca i32, align 4 ; [#uses=2] + %i = alloca i32, align 4 ; [#uses=21] + %num_sol = alloca i32, align 4 ; [#uses=4] + %total = alloca i32, align 4 ; [#uses=4] + %"alloca point" = bitcast i32 0 to i32 ; [#uses=0] + store i32 %argc, i32* %argc_addr + store i8** %argv, i8*** %argv_addr + store i32 0, i32* %num_sol + store i32 1, i32* @numi + br label %bb91 + +bb: ; preds = %cond_next97 + %tmp1 = load i32* @numi ; [#uses=1] + %tmp2 = getelementptr [44 x i8]* @.str43, i32 0, i32 0 ; [#uses=1] + %tmp3 = call i32 (i8*, ...)* @printf( i8* %tmp2, i32 %tmp1 ) ; [#uses=0] + store i32 0, i32* %i + br label %bb13 + +bb4: ; preds = %bb13 + %tmp5 = load i32* %i ; [#uses=1] + %tmp6 = load i32* %i ; [#uses=1] + %tmp7 = getelementptr [17 x i32]* @trialx, i32 0, i32 %tmp6 ; [#uses=1] + %tmp8 = load i32* %tmp7 ; [#uses=1] + %tmp9 = call i32 @userfun( i32 %tmp8 ) ; [#uses=1] + %tmp10 = getelementptr [17 x i32]* @correct_result, i32 0, i32 %tmp5 ; [#uses=1] + store i32 %tmp9, i32* %tmp10 + %tmp11 = load i32* %i ; [#uses=1] + %tmp12 = add i32 %tmp11, 1 ; [#uses=1] + store i32 %tmp12, i32* %i + br label %bb13 + +bb13: ; preds = %bb4, %bb + %tmp14 = load i32* %i ; [#uses=1] + %tmp15 = icmp sle i32 %tmp14, 16 ; [#uses=1] + %tmp1516 = zext i1 %tmp15 to i32 ; [#uses=1] + %toBool = icmp ne i32 %tmp1516, 0 ; [#uses=1] + br i1 %toBool, label %bb4, label %bb17 + +bb17: ; preds = %bb13 + store i32 0, i32* %i + br label %bb49 + +bb18: ; preds = %bb49 + %tmp19 = load i32* %i ; [#uses=1] + %tmp20 = getelementptr [5 x { i32, [3 x i32] }]* @pgm, i32 0, i32 %tmp19 ; <{ i32, [3 x i32] }*> [#uses=1] + %tmp21 = getelementptr { i32, [3 x i32] }* %tmp20, i32 0, i32 0 ; [#uses=1] + store i32 0, i32* %tmp21 + %tmp22 = load i32* %i ; [#uses=1] + %tmp23 = getelementptr [13 x %struct.anon]* @isa, i32 0, i32 0 ; <%struct.anon*> [#uses=1] + %tmp24 = getelementptr %struct.anon* %tmp23, i32 0, i32 3 ; <[3 x i32]*> [#uses=1] + %tmp25 = getelementptr [3 x i32]* %tmp24, i32 0, i32 0 ; [#uses=1] + %tmp26 = load i32* %tmp25 ; [#uses=1] + %tmp27 = getelementptr [5 x { i32, [3 x i32] }]* @pgm, i32 0, i32 %tmp22 ; <{ i32, [3 x i32] }*> [#uses=1] + %tmp28 = getelementptr { i32, [3 x i32] }* %tmp27, i32 0, i32 1 ; <[3 x i32]*> [#uses=1] + %tmp29 = getelementptr [3 x i32]* %tmp28, i32 0, i32 0 ; [#uses=1] + store i32 %tmp26, i32* %tmp29 + %tmp30 = load i32* %i ; [#uses=1] + %tmp31 = getelementptr [13 x %struct.anon]* @isa, i32 0, i32 0 ; <%struct.anon*> [#uses=1] + %tmp32 = getelementptr %struct.anon* %tmp31, i32 0, i32 3 ; <[3 x i32]*> [#uses=1] + %tmp33 = getelementptr [3 x i32]* %tmp32, i32 0, i32 1 ; [#uses=1] + %tmp34 = load i32* %tmp33 ; [#uses=1] + %tmp35 = getelementptr [5 x { i32, [3 x i32] }]* @pgm, i32 0, i32 %tmp30 ; <{ i32, [3 x i32] }*> [#uses=1] + %tmp36 = getelementptr { i32, [3 x i32] }* %tmp35, i32 0, i32 1 ; <[3 x i32]*> [#uses=1] + %tmp37 = getelementptr [3 x i32]* %tmp36, i32 0, i32 1 ; [#uses=1] + store i32 %tmp34, i32* %tmp37 + %tmp38 = load i32* %i ; [#uses=1] + %tmp39 = getelementptr [13 x %struct.anon]* @isa, i32 0, i32 0 ; <%struct.anon*> [#uses=1] + %tmp40 = getelementptr %struct.anon* %tmp39, i32 0, i32 3 ; <[3 x i32]*> [#uses=1] + %tmp41 = getelementptr [3 x i32]* %tmp40, i32 0, i32 2 ; [#uses=1] + %tmp42 = load i32* %tmp41 ; [#uses=1] + %tmp43 = getelementptr [5 x { i32, [3 x i32] }]* @pgm, i32 0, i32 %tmp38 ; <{ i32, [3 x i32] }*> [#uses=1] + %tmp44 = getelementptr { i32, [3 x i32] }* %tmp43, i32 0, i32 1 ; <[3 x i32]*> [#uses=1] + %tmp45 = getelementptr [3 x i32]* %tmp44, i32 0, i32 2 ; [#uses=1] + store i32 %tmp42, i32* %tmp45 + %tmp46 = load i32* %i ; [#uses=1] + call void @fix_operands( i32 %tmp46 ) + %tmp47 = load i32* %i ; [#uses=1] + %tmp48 = add i32 %tmp47, 1 ; [#uses=1] + store i32 %tmp48, i32* %i + br label %bb49 + +bb49: ; preds = %bb18, %bb17 + %tmp50 = load i32* @numi ; [#uses=1] + %tmp51 = load i32* %i ; [#uses=1] + %tmp52 = icmp slt i32 %tmp51, %tmp50 ; [#uses=1] + %tmp5253 = zext i1 %tmp52 to i32 ; [#uses=1] + %toBool54 = icmp ne i32 %tmp5253, 0 ; [#uses=1] + br i1 %toBool54, label %bb18, label %bb55 + +bb55: ; preds = %bb49 + %tmp56 = call i32 @search( ) ; [#uses=1] + store i32 %tmp56, i32* %num_sol + %tmp57 = getelementptr [21 x i8]* @.str44, i32 0, i32 0 ; [#uses=1] + %tmp58 = load i32* %num_sol ; [#uses=1] + %tmp59 = call i32 (i8*, ...)* @printf( i8* %tmp57, i32 %tmp58 ) ; [#uses=0] + %tmp60 = load i32* @counters ; [#uses=1] + %tmp61 = icmp ne i32 %tmp60, 0 ; [#uses=1] + %tmp6162 = zext i1 %tmp61 to i32 ; [#uses=1] + %toBool63 = icmp ne i32 %tmp6162, 0 ; [#uses=1] + br i1 %toBool63, label %cond_true, label %cond_next + +cond_true: ; preds = %bb55 + store i32 0, i32* %total + %tmp64 = getelementptr [12 x i8]* @.str45, i32 0, i32 0 ; [#uses=1] + %tmp65 = call i32 (i8*, ...)* @printf( i8* %tmp64 ) ; [#uses=0] + store i32 0, i32* %i + br label %bb79 + +bb66: ; preds = %bb79 + %tmp67 = load i32* %i ; [#uses=1] + %tmp68 = getelementptr [5 x i32]* @counter, i32 0, i32 %tmp67 ; [#uses=1] + %tmp69 = load i32* %tmp68 ; [#uses=1] + %tmp70 = getelementptr [5 x i8]* @.str46, i32 0, i32 0 ; [#uses=1] + %tmp71 = call i32 (i8*, ...)* @printf( i8* %tmp70, i32 %tmp69 ) ; [#uses=0] + %tmp72 = load i32* %i ; [#uses=1] + %tmp73 = getelementptr [5 x i32]* @counter, i32 0, i32 %tmp72 ; [#uses=1] + %tmp74 = load i32* %tmp73 ; [#uses=1] + %tmp75 = load i32* %total ; [#uses=1] + %tmp76 = add i32 %tmp74, %tmp75 ; [#uses=1] + store i32 %tmp76, i32* %total + %tmp77 = load i32* %i ; [#uses=1] + %tmp78 = add i32 %tmp77, 1 ; [#uses=1] + store i32 %tmp78, i32* %i + br label %bb79 + +bb79: ; preds = %bb66, %cond_true + %tmp80 = load i32* @numi ; [#uses=1] + %tmp81 = load i32* %i ; [#uses=1] + %tmp82 = icmp slt i32 %tmp81, %tmp80 ; [#uses=1] + %tmp8283 = zext i1 %tmp82 to i32 ; [#uses=1] + %toBool84 = icmp ne i32 %tmp8283, 0 ; [#uses=1] + br i1 %toBool84, label %bb66, label %bb85 + +bb85: ; preds = %bb79 + %tmp86 = getelementptr [12 x i8]* @.str47, i32 0, i32 0 ; [#uses=1] + %tmp87 = load i32* %total ; [#uses=1] + %tmp88 = call i32 (i8*, ...)* @printf( i8* %tmp86, i32 %tmp87 ) ; [#uses=0] + br label %cond_next + +cond_next: ; preds = %bb85, %bb55 + %tmp89 = load i32* @numi ; [#uses=1] + %tmp90 = add i32 %tmp89, 1 ; [#uses=1] + store i32 %tmp90, i32* @numi + br label %bb91 + +bb91: ; preds = %cond_next, %entry + %tmp92 = load i32* @numi ; [#uses=1] + %tmp93 = icmp sgt i32 %tmp92, 5 ; [#uses=1] + %tmp9394 = zext i1 %tmp93 to i32 ; [#uses=1] + %toBool95 = icmp ne i32 %tmp9394, 0 ; [#uses=1] + br i1 %toBool95, label %cond_true96, label %cond_next97 + +cond_true96: ; preds = %bb91 + br label %bb102 + +cond_next97: ; preds = %bb91 + %tmp98 = load i32* %num_sol ; [#uses=1] + %tmp99 = icmp eq i32 %tmp98, 0 ; [#uses=1] + %tmp99100 = zext i1 %tmp99 to i32 ; [#uses=1] + %toBool101 = icmp ne i32 %tmp99100, 0 ; [#uses=1] + br i1 %toBool101, label %bb, label %bb102 + +bb102: ; preds = %cond_next97, %cond_true96 + store i32 0, i32* %tmp + %tmp103 = load i32* %tmp ; [#uses=1] + store i32 %tmp103, i32* %retval + br label %return + +return: ; preds = %bb102 + %retval104 = load i32* %retval ; [#uses=1] + ret i32 %retval104 +} + +declare i32 @userfun(i32) From tonic at nondot.org Tue Jul 31 12:47:46 2007 From: tonic at nondot.org (Tanya Lattner) Date: Tue, 31 Jul 2007 12:47:46 -0500 Subject: [llvm-commits] CVS: llvm-www/www-index.html Message-ID: <200707311747.l6VHlkpw027907@zion.cs.uiuc.edu> Changes in directory llvm-www: www-index.html updated: 1.144 -> 1.145 --- Log message: Adding release schedule. --- Diffs of the changes: (+10 -5) www-index.html | 15 ++++++++++----- 1 files changed, 10 insertions(+), 5 deletions(-) Index: llvm-www/www-index.html diff -u llvm-www/www-index.html:1.144 llvm-www/www-index.html:1.145 --- llvm-www/www-index.html:1.144 Fri Jun 29 18:07:24 2007 +++ llvm-www/www-index.html Tue Jul 31 12:47:12 2007 @@ -113,13 +113,18 @@
-
Developers Meeting
May 25, 2007
+
Upcoming Releases
-

The - May 2007 Developer Meeting meeting was - a great success. Videos and slides are now - available.

+

LLVM 2.1 will be released on September 27, 2007. Here is the release schedule:

+
    +
  • 9/12/2007 - Code freeze and branch creation.
    • +
  • 9/14/2007 - Prerelease-1 out for testing.
    • +
  • 9/19/2007 - Prerelease-1 testing complete.
    • +
  • 9/20/2007 - Prerelease-2 out for testing.
    • +
  • 9/25/2007 - Prerelease-2 testing complete.
    • +
  • 9/27/2007 - Release.
    • +

From christopher.lamb at gmail.com Tue Jul 31 12:49:46 2007 From: christopher.lamb at gmail.com (Christopher Lamb) Date: Tue, 31 Jul 2007 10:49:46 -0700 Subject: [llvm-commits] [llvm-gcc-4.0] r40622 - in /llvm-gcc-4.0/trunk/gcc: llvm-backend.cpp llvm-convert.cpp llvm-internal.h llvm-types.cpp In-Reply-To: <1185903394.9492.30.camel@asl.dorms.spbu.ru> References: <200707310650.l6V6oPCJ003921.SS5642SS@zion.cs.uiuc.edu> <1185870659.9492.19.camel@asl.dorms.spbu.ru> <1185903394.9492.30.camel@asl.dorms.spbu.ru> Message-ID: <007CA5D0-1F71-4580-8C9C-CBC955DBD4F0@gmail.com> On Jul 31, 2007, at 10:36 AM, Anton Korobeynikov wrote: > Hello, Christopher. > >> What specifically is dangerous about this? > Well, because you're accessing internals of tree_node structure > directly. Please use macroses. It may be language specific to C++, but there doesn't appear to be a macro there... >> I'm no GCC expert, but the DECL_ARGUMENTS() seems to be the only >> place >> where the restrict qualifier is preserved under C++. While >> debugging I >> could inspect the data structure to see that the information I needed >> was there, but looking in tree.h I found no TREE_... macro that >> got me >> there. > This sometimes mean, that such data shouldn't be used at all ;) > What's wrong with TREE_TYPE(decl) ? See PR1582. Using TREE_TYPE(decl) as was the case before, the tree doesn't contain restrict qualifiers on C++ arguments (but it does on C) arguments. The qualifiers are there in the DECL_ARGUMENTS(decl), but not in the TREE_TYPE(decl). >> The ?: came about because while bootstrapping GCC there were cases >> when DelArgs was NULL. It seems a bit of a hack, I know, but it's the >> best I could figure and it seems to work properly in my tests. If you >> have a suggestion on a more proper way to consistently get the >> restrict qualifier I'm all ears. =) > What was the function decl in that case? How can I find/dump that? My GCC fu is weak. -- Christopher Lamb -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20070731/fd63532f/attachment.html From chandlerc at gmail.com Tue Jul 31 13:18:21 2007 From: chandlerc at gmail.com (Chandler Carruth) Date: Tue, 31 Jul 2007 11:18:21 -0700 Subject: [llvm-commits] Proposed patch for intrinsic parameter type matching Message-ID: <46AF7CED.9000102@gmail.com> Hello, This is a patch that I have reworked based on Dan Gohman's original patch to be more incremental and address several issues that were raised on the -commits list. This does change the Intrinsics.td format and the mechanisms for defining new intrinsic functions, and so I would like to get some feedback on it before committing it. -Chandler -------------- next part -------------- An embedded and charset-unspecified text was scrubbed... Name: intrinsic_matching.patch Url: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20070731/60d46b5b/attachment.pl From greened at obbligato.org Tue Jul 31 15:01:28 2007 From: greened at obbligato.org (David Greene) Date: Tue, 31 Jul 2007 20:01:28 -0000 Subject: [llvm-commits] [llvm] r40647 - in /llvm/trunk: include/llvm/Analysis/MemoryDependenceAnalysis.h lib/Analysis/MemoryDependenceAnalysis.cpp Message-ID: <200707312001.l6VK1Soo032167@zion.cs.uiuc.edu> Author: greened Date: Tue Jul 31 15:01:27 2007 New Revision: 40647 URL: http://llvm.org/viewvc/llvm-project?rev=40647&view=rev Log: Fix GLIBCXX_DEBUG error owing to dereference of end iterator. There's no guarantee that an instruction returned by getDependency exists in the maps. Modified: llvm/trunk/include/llvm/Analysis/MemoryDependenceAnalysis.h llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp Modified: llvm/trunk/include/llvm/Analysis/MemoryDependenceAnalysis.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/MemoryDependenceAnalysis.h?rev=40647&r1=40646&r2=40647&view=diff ============================================================================== --- llvm/trunk/include/llvm/Analysis/MemoryDependenceAnalysis.h (original) +++ llvm/trunk/include/llvm/Analysis/MemoryDependenceAnalysis.h Tue Jul 31 15:01:27 2007 @@ -32,9 +32,14 @@ class MemoryDependenceAnalysis : public FunctionPass { private: - - DenseMap > depGraphLocal; - std::multimap reverseDep; + + typedef DenseMap > + depMapType; + + depMapType depGraphLocal; + + typedef std::multimap reverseDepMapType; + reverseDepMapType reverseDep; Instruction* getCallSiteDependency(CallSite C, Instruction* start, bool local = true); Modified: llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp?rev=40647&r1=40646&r2=40647&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp (original) +++ llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp Tue Jul 31 15:01:27 2007 @@ -308,33 +308,40 @@ void MemoryDependenceAnalysis::removeInstruction(Instruction* rem) { // Figure out the new dep for things that currently depend on rem Instruction* newDep = NonLocal; - if (depGraphLocal[rem].first != NonLocal && - depGraphLocal[rem].second) { - // If we have dep info for rem, set them to it - BasicBlock::iterator RI = depGraphLocal[rem].first; - RI++; - newDep = RI; - } else if (depGraphLocal[rem].first == NonLocal && - depGraphLocal[rem].second ) { - // If we have a confirmed non-local flag, use it - newDep = NonLocal; - } else { - // Otherwise, use the immediate successor of rem - // NOTE: This is because, when getDependence is called, it will first check - // the immediate predecessor of what is in the cache. - BasicBlock::iterator RI = rem; - RI++; - newDep = RI; - } - std::multimap::iterator I = reverseDep.find(rem); - while (I->first == rem) { - // Insert the new dependencies - // Mark it as unconfirmed as long as it is not the non-local flag - depGraphLocal[I->second] = std::make_pair(newDep, !newDep); - reverseDep.erase(I); - I = reverseDep.find(rem); + depMapType::iterator depGraphEntry = depGraphLocal.find(rem); + // We assume here that it's not in the reverse map if it's not in + // the dep map. Checking it could be expensive, so don't do it. + + if (depGraphEntry != depGraphLocal.end()) { + if (depGraphEntry->second.first != NonLocal && + depGraphEntry->second.second) { + // If we have dep info for rem, set them to it + BasicBlock::iterator RI = depGraphEntry->second.first; + RI++; + newDep = RI; + } else if (depGraphEntry->second.first == NonLocal && + depGraphEntry->second.second ) { + // If we have a confirmed non-local flag, use it + newDep = NonLocal; + } else { + // Otherwise, use the immediate successor of rem + // NOTE: This is because, when getDependence is called, it will first check + // the immediate predecessor of what is in the cache. + BasicBlock::iterator RI = rem; + RI++; + newDep = RI; + } + + std::multimap::iterator I = reverseDep.find(rem); + while (I != reverseDep.end() && I->first == rem) { + // Insert the new dependencies + // Mark it as unconfirmed as long as it is not the non-local flag + depGraphLocal[I->second] = std::make_pair(newDep, !newDep); + reverseDep.erase(I); + I = reverseDep.find(rem); + } } - + getAnalysis().deleteValue(rem); } From djg at cray.com Tue Jul 31 15:11:57 2007 From: djg at cray.com (Dan Gohman) Date: Tue, 31 Jul 2007 20:11:57 -0000 Subject: [llvm-commits] [llvm] r40648 - in /llvm/trunk: lib/Target/X86/ test/CodeGen/Generic/ test/CodeGen/X86/ test/Transforms/TailDup/ Message-ID: <200707312011.l6VKBwo9032470@zion.cs.uiuc.edu> Author: djg Date: Tue Jul 31 15:11:57 2007 New Revision: 40648 URL: http://llvm.org/viewvc/llvm-project?rev=40648&view=rev Log: Change the x86 assembly output to use tab characters to separate the mnemonics from their operands instead of single spaces. This makes the assembly output a little more consistent with various other compilers (f.e. GCC), and slightly easier to read. Also, update the regression tests accordingly. Modified: llvm/trunk/lib/Target/X86/X86InstrFPStack.td llvm/trunk/lib/Target/X86/X86InstrInfo.td llvm/trunk/lib/Target/X86/X86InstrMMX.td llvm/trunk/lib/Target/X86/X86InstrSSE.td llvm/trunk/lib/Target/X86/X86InstrX86-64.td llvm/trunk/test/CodeGen/Generic/2007-02-23-DAGCombine-Miscompile.ll llvm/trunk/test/CodeGen/Generic/phi-immediate-factoring.ll llvm/trunk/test/CodeGen/X86/2006-04-27-ISelFoldingBug.ll llvm/trunk/test/CodeGen/X86/2006-11-12-CSRetCC.ll llvm/trunk/test/CodeGen/X86/2006-11-17-IllegalMove.ll llvm/trunk/test/CodeGen/X86/2006-11-28-Memcpy.ll llvm/trunk/test/CodeGen/X86/2007-01-08-InstrSched.ll llvm/trunk/test/CodeGen/X86/2007-02-04-OrAddrMode.ll llvm/trunk/test/CodeGen/X86/2007-07-03-GR64ToVR64.ll llvm/trunk/test/CodeGen/X86/2007-07-18-Vector-Extract.ll llvm/trunk/test/CodeGen/X86/commute-two-addr.ll llvm/trunk/test/CodeGen/X86/epilogue.ll llvm/trunk/test/CodeGen/X86/fast-cc-callee-pops.ll llvm/trunk/test/CodeGen/X86/fast-cc-merge-stack-adj.ll llvm/trunk/test/CodeGen/X86/fast-cc-pass-in-regs.ll llvm/trunk/test/CodeGen/X86/i128-ret.ll llvm/trunk/test/CodeGen/X86/illegal-vector-args-return.ll llvm/trunk/test/CodeGen/X86/isel-sink.ll llvm/trunk/test/CodeGen/X86/lea-2.ll llvm/trunk/test/CodeGen/X86/lea-3.ll llvm/trunk/test/CodeGen/X86/mingw-alloca.ll llvm/trunk/test/CodeGen/X86/peep-vector-extract-concat.ll llvm/trunk/test/CodeGen/X86/peep-vector-extract-insert.ll llvm/trunk/test/CodeGen/X86/shift-codegen.ll llvm/trunk/test/CodeGen/X86/shl_elim.ll llvm/trunk/test/CodeGen/X86/store_op_load_fold2.ll llvm/trunk/test/CodeGen/X86/tls1.ll llvm/trunk/test/CodeGen/X86/tls2.ll llvm/trunk/test/CodeGen/X86/x86-64-arg.ll llvm/trunk/test/Transforms/TailDup/if-tail-dup.ll Modified: llvm/trunk/lib/Target/X86/X86InstrFPStack.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrFPStack.td?rev=40648&r1=40647&r2=40648&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrFPStack.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrFPStack.td Tue Jul 31 15:11:57 2007 @@ -165,9 +165,9 @@ [(set RFP64:$dst, (OpNode RFP64:$src1, (extloadf32 addr:$src2)))]>; def _F32m : FPI<0xD8, fp, (outs), (ins f32mem:$src), - !strconcat("f", !strconcat(asmstring, "{s} $src"))>; + !strconcat("f", !strconcat(asmstring, "{s}\t$src"))>; def _F64m : FPI<0xDC, fp, (outs), (ins f64mem:$src), - !strconcat("f", !strconcat(asmstring, "{l} $src"))>; + !strconcat("f", !strconcat(asmstring, "{l}\t$src"))>; // ST(0) = ST(0) + [memint] def _FpI16m32 : FpI<(outs RFP32:$dst), (ins RFP32:$src1, i16mem:$src2), OneArgFPRW, [(set RFP32:$dst, (OpNode RFP32:$src1, @@ -182,9 +182,9 @@ [(set RFP64:$dst, (OpNode RFP64:$src1, (X86fild addr:$src2, i32)))]>; def _FI16m : FPI<0xDE, fp, (outs), (ins i16mem:$src), - !strconcat("fi", !strconcat(asmstring, "{s} $src"))>; + !strconcat("fi", !strconcat(asmstring, "{s}\t$src"))>; def _FI32m : FPI<0xDA, fp, (outs), (ins i32mem:$src), - !strconcat("fi", !strconcat(asmstring, "{l} $src"))>; + !strconcat("fi", !strconcat(asmstring, "{l}\t$src"))>; } defm ADD : FPBinary_rr; @@ -208,24 +208,24 @@ // NOTE: GAS and apparently all other AT&T style assemblers have a broken notion // of some of the 'reverse' forms of the fsub and fdiv instructions. As such, // we have to put some 'r's in and take them out of weird places. -def ADD_FST0r : FPST0rInst <0xC0, "fadd $op">; -def ADD_FrST0 : FPrST0Inst <0xC0, "fadd {%st(0), $op|$op, %ST(0)}">; -def ADD_FPrST0 : FPrST0PInst<0xC0, "faddp $op">; -def SUBR_FST0r : FPST0rInst <0xE8, "fsubr $op">; -def SUB_FrST0 : FPrST0Inst <0xE8, "fsub{r} {%st(0), $op|$op, %ST(0)}">; -def SUB_FPrST0 : FPrST0PInst<0xE8, "fsub{r}p $op">; -def SUB_FST0r : FPST0rInst <0xE0, "fsub $op">; -def SUBR_FrST0 : FPrST0Inst <0xE0, "fsub{|r} {%st(0), $op|$op, %ST(0)}">; -def SUBR_FPrST0 : FPrST0PInst<0xE0, "fsub{|r}p $op">; -def MUL_FST0r : FPST0rInst <0xC8, "fmul $op">; -def MUL_FrST0 : FPrST0Inst <0xC8, "fmul {%st(0), $op|$op, %ST(0)}">; -def MUL_FPrST0 : FPrST0PInst<0xC8, "fmulp $op">; -def DIVR_FST0r : FPST0rInst <0xF8, "fdivr $op">; -def DIV_FrST0 : FPrST0Inst <0xF8, "fdiv{r} {%st(0), $op|$op, %ST(0)}">; -def DIV_FPrST0 : FPrST0PInst<0xF8, "fdiv{r}p $op">; -def DIV_FST0r : FPST0rInst <0xF0, "fdiv $op">; -def DIVR_FrST0 : FPrST0Inst <0xF0, "fdiv{|r} {%st(0), $op|$op, %ST(0)}">; -def DIVR_FPrST0 : FPrST0PInst<0xF0, "fdiv{|r}p $op">; +def ADD_FST0r : FPST0rInst <0xC0, "fadd\t$op">; +def ADD_FrST0 : FPrST0Inst <0xC0, "fadd\t{%st(0), $op|$op, %ST(0)}">; +def ADD_FPrST0 : FPrST0PInst<0xC0, "faddp\t$op">; +def SUBR_FST0r : FPST0rInst <0xE8, "fsubr\t$op">; +def SUB_FrST0 : FPrST0Inst <0xE8, "fsub{r}\t{%st(0), $op|$op, %ST(0)}">; +def SUB_FPrST0 : FPrST0PInst<0xE8, "fsub{r}p\t$op">; +def SUB_FST0r : FPST0rInst <0xE0, "fsub\t$op">; +def SUBR_FrST0 : FPrST0Inst <0xE0, "fsub{|r}\t{%st(0), $op|$op, %ST(0)}">; +def SUBR_FPrST0 : FPrST0PInst<0xE0, "fsub{|r}p\t$op">; +def MUL_FST0r : FPST0rInst <0xC8, "fmul\t$op">; +def MUL_FrST0 : FPrST0Inst <0xC8, "fmul\t{%st(0), $op|$op, %ST(0)}">; +def MUL_FPrST0 : FPrST0PInst<0xC8, "fmulp\t$op">; +def DIVR_FST0r : FPST0rInst <0xF8, "fdivr\t$op">; +def DIV_FrST0 : FPrST0Inst <0xF8, "fdiv{r}\t{%st(0), $op|$op, %ST(0)}">; +def DIV_FPrST0 : FPrST0PInst<0xF8, "fdiv{r}p\t$op">; +def DIV_FST0r : FPST0rInst <0xF0, "fdiv\t$op">; +def DIVR_FrST0 : FPrST0Inst <0xF0, "fdiv{|r}\t{%st(0), $op|$op, %ST(0)}">; +def DIVR_FPrST0 : FPrST0PInst<0xF0, "fdiv{|r}p\t$op">; // Unary operations. multiclass FPUnary opcode, string asmstring> { @@ -270,21 +270,21 @@ // These are not factored because there's no clean way to pass DA/DB. def CMOVB_F : FPI<0xC0, AddRegFrm, (outs RST:$op), (ins), - "fcmovb {$op, %st(0)|%ST(0), $op}">, DA; + "fcmovb\t{$op, %st(0)|%ST(0), $op}">, DA; def CMOVBE_F : FPI<0xD0, AddRegFrm, (outs RST:$op), (ins), - "fcmovbe {$op, %st(0)|%ST(0), $op}">, DA; + "fcmovbe\t{$op, %st(0)|%ST(0), $op}">, DA; def CMOVE_F : FPI<0xC8, AddRegFrm, (outs RST:$op), (ins), - "fcmove {$op, %st(0)|%ST(0), $op}">, DA; + "fcmove\t{$op, %st(0)|%ST(0), $op}">, DA; def CMOVP_F : FPI<0xD8, AddRegFrm, (outs RST:$op), (ins), - "fcmovu {$op, %st(0)|%ST(0), $op}">, DA; + "fcmovu\t {$op, %st(0)|%ST(0), $op}">, DA; def CMOVNB_F : FPI<0xC0, AddRegFrm, (outs RST:$op), (ins), - "fcmovnb {$op, %st(0)|%ST(0), $op}">, DB; + "fcmovnb\t{$op, %st(0)|%ST(0), $op}">, DB; def CMOVNBE_F: FPI<0xD0, AddRegFrm, (outs RST:$op), (ins), - "fcmovnbe {$op, %st(0)|%ST(0), $op}">, DB; + "fcmovnbe\t{$op, %st(0)|%ST(0), $op}">, DB; def CMOVNE_F : FPI<0xC8, AddRegFrm, (outs RST:$op), (ins), - "fcmovne {$op, %st(0)|%ST(0), $op}">, DB; + "fcmovne\t{$op, %st(0)|%ST(0), $op}">, DB; def CMOVNP_F : FPI<0xD8, AddRegFrm, (outs RST:$op), (ins), - "fcmovnu {$op, %st(0)|%ST(0), $op}">, DB; + "fcmovnu\t{$op, %st(0)|%ST(0), $op}">, DB; // Floating point loads & stores. def LD_Fp32m : FpI<(outs RFP32:$dst), (ins f32mem:$src), ZeroArgFP, @@ -321,20 +321,20 @@ def IST_Fp32m64 : FpI<(outs), (ins i32mem:$op, RFP64:$src), OneArgFP, []>; def IST_Fp64m64 : FpI<(outs), (ins i64mem:$op, RFP64:$src), OneArgFP, []>; -def LD_F32m : FPI<0xD9, MRM0m, (outs), (ins f32mem:$src), "fld{s} $src">; -def LD_F64m : FPI<0xDD, MRM0m, (outs), (ins f64mem:$src), "fld{l} $src">; -def ILD_F16m : FPI<0xDF, MRM0m, (outs), (ins i16mem:$src), "fild{s} $src">; -def ILD_F32m : FPI<0xDB, MRM0m, (outs), (ins i32mem:$src), "fild{l} $src">; -def ILD_F64m : FPI<0xDF, MRM5m, (outs), (ins i64mem:$src), "fild{ll} $src">; -def ST_F32m : FPI<0xD9, MRM2m, (outs), (ins f32mem:$dst), "fst{s} $dst">; -def ST_F64m : FPI<0xDD, MRM2m, (outs), (ins f64mem:$dst), "fst{l} $dst">; -def ST_FP32m : FPI<0xD9, MRM3m, (outs), (ins f32mem:$dst), "fstp{s} $dst">; -def ST_FP64m : FPI<0xDD, MRM3m, (outs), (ins f64mem:$dst), "fstp{l} $dst">; -def IST_F16m : FPI<0xDF, MRM2m, (outs), (ins i16mem:$dst), "fist{s} $dst">; -def IST_F32m : FPI<0xDB, MRM2m, (outs), (ins i32mem:$dst), "fist{l} $dst">; -def IST_FP16m : FPI<0xDF, MRM3m, (outs), (ins i16mem:$dst), "fistp{s} $dst">; -def IST_FP32m : FPI<0xDB, MRM3m, (outs), (ins i32mem:$dst), "fistp{l} $dst">; -def IST_FP64m : FPI<0xDF, MRM7m, (outs), (ins i64mem:$dst), "fistp{ll} $dst">; +def LD_F32m : FPI<0xD9, MRM0m, (outs), (ins f32mem:$src), "fld{s}\t$src">; +def LD_F64m : FPI<0xDD, MRM0m, (outs), (ins f64mem:$src), "fld{l}\t$src">; +def ILD_F16m : FPI<0xDF, MRM0m, (outs), (ins i16mem:$src), "fild{s}\t$src">; +def ILD_F32m : FPI<0xDB, MRM0m, (outs), (ins i32mem:$src), "fild{l}\t$src">; +def ILD_F64m : FPI<0xDF, MRM5m, (outs), (ins i64mem:$src), "fild{ll}\t$src">; +def ST_F32m : FPI<0xD9, MRM2m, (outs), (ins f32mem:$dst), "fst{s}\t$dst">; +def ST_F64m : FPI<0xDD, MRM2m, (outs), (ins f64mem:$dst), "fst{l}\t$dst">; +def ST_FP32m : FPI<0xD9, MRM3m, (outs), (ins f32mem:$dst), "fstp{s}\t$dst">; +def ST_FP64m : FPI<0xDD, MRM3m, (outs), (ins f64mem:$dst), "fstp{l}\t$dst">; +def IST_F16m : FPI<0xDF, MRM2m, (outs), (ins i16mem:$dst), "fist{s}\t$dst">; +def IST_F32m : FPI<0xDB, MRM2m, (outs), (ins i32mem:$dst), "fist{l}\t$dst">; +def IST_FP16m : FPI<0xDF, MRM3m, (outs), (ins i16mem:$dst), "fistp{s}\t$dst">; +def IST_FP32m : FPI<0xDB, MRM3m, (outs), (ins i32mem:$dst), "fistp{l}\t$dst">; +def IST_FP64m : FPI<0xDF, MRM7m, (outs), (ins i64mem:$dst), "fistp{ll}\t$dst">; // FISTTP requires SSE3 even though it's a FPStack op. def ISTT_Fp16m32 : FpI_<(outs), (ins i16mem:$op, RFP32:$src), OneArgFP, @@ -356,15 +356,15 @@ [(X86fp_to_i64mem RFP64:$src, addr:$op)]>, Requires<[HasSSE3]>; -def ISTT_FP16m : FPI<0xDF, MRM1m, (outs), (ins i16mem:$dst), "fisttp{s} $dst">; -def ISTT_FP32m : FPI<0xDB, MRM1m, (outs), (ins i32mem:$dst), "fisttp{l} $dst">; -def ISTT_FP64m : FPI<0xDD, MRM1m, (outs), (ins i64mem:$dst), "fisttp{ll} $dst">; +def ISTT_FP16m : FPI<0xDF, MRM1m, (outs), (ins i16mem:$dst), "fisttp{s}\t$dst">; +def ISTT_FP32m : FPI<0xDB, MRM1m, (outs), (ins i32mem:$dst), "fisttp{l}\t$dst">; +def ISTT_FP64m : FPI<0xDD, MRM1m, (outs), (ins i64mem:$dst), "fisttp{ll}\t$dst">; // FP Stack manipulation instructions. -def LD_Frr : FPI<0xC0, AddRegFrm, (outs), (ins RST:$op), "fld $op">, D9; -def ST_Frr : FPI<0xD0, AddRegFrm, (outs), (ins RST:$op), "fst $op">, DD; -def ST_FPrr : FPI<0xD8, AddRegFrm, (outs), (ins RST:$op), "fstp $op">, DD; -def XCH_F : FPI<0xC8, AddRegFrm, (outs), (ins RST:$op), "fxch $op">, D9; +def LD_Frr : FPI<0xC0, AddRegFrm, (outs), (ins RST:$op), "fld\t$op">, D9; +def ST_Frr : FPI<0xD0, AddRegFrm, (outs), (ins RST:$op), "fst\t$op">, DD; +def ST_FPrr : FPI<0xD8, AddRegFrm, (outs), (ins RST:$op), "fstp\t$op">, DD; +def XCH_F : FPI<0xC8, AddRegFrm, (outs), (ins RST:$op), "fxch\t$op">, D9; // Floating point constant loads. let isReMaterializable = 1 in { @@ -394,29 +394,29 @@ def UCOM_Fr : FPI<0xE0, AddRegFrm, // FPSW = cmp ST(0) with ST(i) (outs), (ins RST:$reg), - "fucom $reg">, DD, Imp<[ST0],[]>; + "fucom\t$reg">, DD, Imp<[ST0],[]>; def UCOM_FPr : FPI<0xE8, AddRegFrm, // FPSW = cmp ST(0) with ST(i), pop (outs), (ins RST:$reg), - "fucomp $reg">, DD, Imp<[ST0],[]>; + "fucomp\t$reg">, DD, Imp<[ST0],[]>; def UCOM_FPPr : FPI<0xE9, RawFrm, // cmp ST(0) with ST(1), pop, pop (outs), (ins), "fucompp">, DA, Imp<[ST0],[]>; def UCOM_FIr : FPI<0xE8, AddRegFrm, // CC = cmp ST(0) with ST(i) (outs), (ins RST:$reg), - "fucomi {$reg, %st(0)|%ST(0), $reg}">, DB, Imp<[ST0],[]>; + "fucomi\t{$reg, %st(0)|%ST(0), $reg}">, DB, Imp<[ST0],[]>; def UCOM_FIPr : FPI<0xE8, AddRegFrm, // CC = cmp ST(0) with ST(i), pop (outs), (ins RST:$reg), - "fucomip {$reg, %st(0)|%ST(0), $reg}">, DF, Imp<[ST0],[]>; + "fucomip\t{$reg, %st(0)|%ST(0), $reg}">, DF, Imp<[ST0],[]>; // Floating point flag ops. def FNSTSW8r : I<0xE0, RawFrm, // AX = fp flags (outs), (ins), "fnstsw", []>, DF, Imp<[],[AX]>; def FNSTCW16m : I<0xD9, MRM7m, // [mem16] = X87 control world - (outs), (ins i16mem:$dst), "fnstcw $dst", []>; + (outs), (ins i16mem:$dst), "fnstcw\t$dst", []>; def FLDCW16m : I<0xD9, MRM5m, // X87 control world = [mem16] - (outs), (ins i16mem:$dst), "fldcw $dst", []>; + (outs), (ins i16mem:$dst), "fldcw\t$dst", []>; //===----------------------------------------------------------------------===// // Non-Instruction Patterns Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=40648&r1=40647&r2=40648&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Tue Jul 31 15:11:57 2007 @@ -275,7 +275,7 @@ let isTerminator = 1, isReturn = 1, isBarrier = 1, hasCtrlDep = 1 in { def RET : I<0xC3, RawFrm, (outs), (ins), "ret", [(X86retflag 0)]>; - def RETI : Ii16<0xC2, RawFrm, (outs), (ins i16imm:$amt), "ret $amt", + def RETI : Ii16<0xC2, RawFrm, (outs), (ins i16imm:$amt), "ret\t$amt", [(X86retflag imm:$amt)]>; } @@ -286,49 +286,49 @@ // Indirect branches let isBranch = 1, isBarrier = 1 in - def JMP : IBr<0xE9, (ins brtarget:$dst), "jmp $dst", [(br bb:$dst)]>; + def JMP : IBr<0xE9, (ins brtarget:$dst), "jmp\t$dst", [(br bb:$dst)]>; let isBranch = 1, isTerminator = 1, isBarrier = 1 in { - def JMP32r : I<0xFF, MRM4r, (outs), (ins GR32:$dst), "jmp{l} {*}$dst", + def JMP32r : I<0xFF, MRM4r, (outs), (ins GR32:$dst), "jmp{l}\t{*}$dst", [(brind GR32:$dst)]>; - def JMP32m : I<0xFF, MRM4m, (outs), (ins i32mem:$dst), "jmp{l} {*}$dst", + def JMP32m : I<0xFF, MRM4m, (outs), (ins i32mem:$dst), "jmp{l}\t{*}$dst", [(brind (loadi32 addr:$dst))]>; } // Conditional branches -def JE : IBr<0x84, (ins brtarget:$dst), "je $dst", +def JE : IBr<0x84, (ins brtarget:$dst), "je\t$dst", [(X86brcond bb:$dst, X86_COND_E)]>, TB; -def JNE : IBr<0x85, (ins brtarget:$dst), "jne $dst", +def JNE : IBr<0x85, (ins brtarget:$dst), "jne\t$dst", [(X86brcond bb:$dst, X86_COND_NE)]>, TB; -def JL : IBr<0x8C, (ins brtarget:$dst), "jl $dst", +def JL : IBr<0x8C, (ins brtarget:$dst), "jl\t$dst", [(X86brcond bb:$dst, X86_COND_L)]>, TB; -def JLE : IBr<0x8E, (ins brtarget:$dst), "jle $dst", +def JLE : IBr<0x8E, (ins brtarget:$dst), "jle\t$dst", [(X86brcond bb:$dst, X86_COND_LE)]>, TB; -def JG : IBr<0x8F, (ins brtarget:$dst), "jg $dst", +def JG : IBr<0x8F, (ins brtarget:$dst), "jg\t$dst", [(X86brcond bb:$dst, X86_COND_G)]>, TB; -def JGE : IBr<0x8D, (ins brtarget:$dst), "jge $dst", +def JGE : IBr<0x8D, (ins brtarget:$dst), "jge\t$dst", [(X86brcond bb:$dst, X86_COND_GE)]>, TB; -def JB : IBr<0x82, (ins brtarget:$dst), "jb $dst", +def JB : IBr<0x82, (ins brtarget:$dst), "jb\t$dst", [(X86brcond bb:$dst, X86_COND_B)]>, TB; -def JBE : IBr<0x86, (ins brtarget:$dst), "jbe $dst", +def JBE : IBr<0x86, (ins brtarget:$dst), "jbe\t$dst", [(X86brcond bb:$dst, X86_COND_BE)]>, TB; -def JA : IBr<0x87, (ins brtarget:$dst), "ja $dst", +def JA : IBr<0x87, (ins brtarget:$dst), "ja\t$dst", [(X86brcond bb:$dst, X86_COND_A)]>, TB; -def JAE : IBr<0x83, (ins brtarget:$dst), "jae $dst", +def JAE : IBr<0x83, (ins brtarget:$dst), "jae\t$dst", [(X86brcond bb:$dst, X86_COND_AE)]>, TB; -def JS : IBr<0x88, (ins brtarget:$dst), "js $dst", +def JS : IBr<0x88, (ins brtarget:$dst), "js\t$dst", [(X86brcond bb:$dst, X86_COND_S)]>, TB; -def JNS : IBr<0x89, (ins brtarget:$dst), "jns $dst", +def JNS : IBr<0x89, (ins brtarget:$dst), "jns\t$dst", [(X86brcond bb:$dst, X86_COND_NS)]>, TB; -def JP : IBr<0x8A, (ins brtarget:$dst), "jp $dst", +def JP : IBr<0x8A, (ins brtarget:$dst), "jp\t$dst", [(X86brcond bb:$dst, X86_COND_P)]>, TB; -def JNP : IBr<0x8B, (ins brtarget:$dst), "jnp $dst", +def JNP : IBr<0x8B, (ins brtarget:$dst), "jnp\t$dst", [(X86brcond bb:$dst, X86_COND_NP)]>, TB; -def JO : IBr<0x80, (ins brtarget:$dst), "jo $dst", +def JO : IBr<0x80, (ins brtarget:$dst), "jo\t$dst", [(X86brcond bb:$dst, X86_COND_O)]>, TB; -def JNO : IBr<0x81, (ins brtarget:$dst), "jno $dst", +def JNO : IBr<0x81, (ins brtarget:$dst), "jno\t$dst", [(X86brcond bb:$dst, X86_COND_NO)]>, TB; //===----------------------------------------------------------------------===// @@ -340,23 +340,23 @@ MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7, XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7] in { def CALLpcrel32 : I<0xE8, RawFrm, (outs), (ins i32imm:$dst, variable_ops), - "call ${dst:call}", []>; + "call\t${dst:call}", []>; def CALL32r : I<0xFF, MRM2r, (outs), (ins GR32:$dst, variable_ops), - "call {*}$dst", [(X86call GR32:$dst)]>; + "call\t{*}$dst", [(X86call GR32:$dst)]>; def CALL32m : I<0xFF, MRM2m, (outs), (ins i32mem:$dst, variable_ops), - "call {*}$dst", []>; + "call\t{*}$dst", []>; } // Tail call stuff. let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1 in - def TAILJMPd : IBr<0xE9, (ins i32imm:$dst), "jmp ${dst:call} # TAIL CALL", + def TAILJMPd : IBr<0xE9, (ins i32imm:$dst), "jmp\t${dst:call} # TAIL CALL", []>; let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1 in - def TAILJMPr : I<0xFF, MRM4r, (outs), (ins GR32:$dst), "jmp {*}$dst # TAIL CALL", + def TAILJMPr : I<0xFF, MRM4r, (outs), (ins GR32:$dst), "jmp\t{*}$dst # TAIL CALL", []>; let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1 in def TAILJMPm : I<0xFF, MRM4m, (outs), (ins i32mem:$dst), - "jmp {*}$dst # TAIL CALL", []>; + "jmp\t{*}$dst # TAIL CALL", []>; //===----------------------------------------------------------------------===// // Miscellaneous Instructions... @@ -364,56 +364,56 @@ def LEAVE : I<0xC9, RawFrm, (outs), (ins), "leave", []>, Imp<[EBP,ESP],[EBP,ESP]>; def POP32r : I<0x58, AddRegFrm, - (outs GR32:$reg), (ins), "pop{l} $reg", []>, Imp<[ESP],[ESP]>; + (outs GR32:$reg), (ins), "pop{l}\t$reg", []>, Imp<[ESP],[ESP]>; def PUSH32r : I<0x50, AddRegFrm, - (outs), (ins GR32:$reg), "push{l} $reg", []>, Imp<[ESP],[ESP]>; + (outs), (ins GR32:$reg), "push{l}\t$reg", []>, Imp<[ESP],[ESP]>; def MovePCtoStack : I<0, Pseudo, (outs), (ins piclabel:$label), - "call $label", []>; + "call\t$label", []>; let isTwoAddress = 1 in // GR32 = bswap GR32 def BSWAP32r : I<0xC8, AddRegFrm, (outs GR32:$dst), (ins GR32:$src), - "bswap{l} $dst", + "bswap{l}\t$dst", [(set GR32:$dst, (bswap GR32:$src))]>, TB; // FIXME: Model xchg* as two address instructions? def XCHG8rr : I<0x86, MRMDestReg, // xchg GR8, GR8 (outs), (ins GR8:$src1, GR8:$src2), - "xchg{b} {$src2|$src1}, {$src1|$src2}", []>; + "xchg{b}\t{$src2|$src1}, {$src1|$src2}", []>; def XCHG16rr : I<0x87, MRMDestReg, // xchg GR16, GR16 (outs), (ins GR16:$src1, GR16:$src2), - "xchg{w} {$src2|$src1}, {$src1|$src2}", []>, OpSize; + "xchg{w}\t{$src2|$src1}, {$src1|$src2}", []>, OpSize; def XCHG32rr : I<0x87, MRMDestReg, // xchg GR32, GR32 (outs), (ins GR32:$src1, GR32:$src2), - "xchg{l} {$src2|$src1}, {$src1|$src2}", []>; + "xchg{l}\t{$src2|$src1}, {$src1|$src2}", []>; def XCHG8mr : I<0x86, MRMDestMem, (outs), (ins i8mem:$src1, GR8:$src2), - "xchg{b} {$src2|$src1}, {$src1|$src2}", []>; + "xchg{b}\t{$src2|$src1}, {$src1|$src2}", []>; def XCHG16mr : I<0x87, MRMDestMem, (outs), (ins i16mem:$src1, GR16:$src2), - "xchg{w} {$src2|$src1}, {$src1|$src2}", []>, OpSize; + "xchg{w}\t{$src2|$src1}, {$src1|$src2}", []>, OpSize; def XCHG32mr : I<0x87, MRMDestMem, (outs), (ins i32mem:$src1, GR32:$src2), - "xchg{l} {$src2|$src1}, {$src1|$src2}", []>; + "xchg{l}\t{$src2|$src1}, {$src1|$src2}", []>; def XCHG8rm : I<0x86, MRMSrcMem, (outs), (ins GR8:$src1, i8mem:$src2), - "xchg{b} {$src2|$src1}, {$src1|$src2}", []>; + "xchg{b}\t{$src2|$src1}, {$src1|$src2}", []>; def XCHG16rm : I<0x87, MRMSrcMem, (outs), (ins GR16:$src1, i16mem:$src2), - "xchg{w} {$src2|$src1}, {$src1|$src2}", []>, OpSize; + "xchg{w}\t{$src2|$src1}, {$src1|$src2}", []>, OpSize; def XCHG32rm : I<0x87, MRMSrcMem, (outs), (ins GR32:$src1, i32mem:$src2), - "xchg{l} {$src2|$src1}, {$src1|$src2}", []>; + "xchg{l}\t{$src2|$src1}, {$src1|$src2}", []>; def LEA16r : I<0x8D, MRMSrcMem, (outs GR16:$dst), (ins i32mem:$src), - "lea{w} {$src|$dst}, {$dst|$src}", []>, OpSize; + "lea{w}\t{$src|$dst}, {$dst|$src}", []>, OpSize; def LEA32r : I<0x8D, MRMSrcMem, (outs GR32:$dst), (ins lea32mem:$src), - "lea{l} {$src|$dst}, {$dst|$src}", + "lea{l}\t{$src|$dst}, {$dst|$src}", [(set GR32:$dst, lea32addr:$src)]>, Requires<[In32BitMode]>; def REP_MOVSB : I<0xA4, RawFrm, (outs), (ins), "{rep;movsb|rep movsb}", @@ -443,48 +443,48 @@ // Input/Output Instructions... // def IN8rr : I<0xEC, RawFrm, (outs), (ins), - "in{b} {%dx, %al|%AL, %DX}", + "in{b}\t{%dx, %al|%AL, %DX}", []>, Imp<[DX], [AL]>; def IN16rr : I<0xED, RawFrm, (outs), (ins), - "in{w} {%dx, %ax|%AX, %DX}", + "in{w}\t{%dx, %ax|%AX, %DX}", []>, Imp<[DX], [AX]>, OpSize; def IN32rr : I<0xED, RawFrm, (outs), (ins), - "in{l} {%dx, %eax|%EAX, %DX}", + "in{l}\t{%dx, %eax|%EAX, %DX}", []>, Imp<[DX],[EAX]>; def IN8ri : Ii8<0xE4, RawFrm, (outs), (ins i16i8imm:$port), - "in{b} {$port, %al|%AL, $port}", + "in{b}\t{$port, %al|%AL, $port}", []>, Imp<[], [AL]>; def IN16ri : Ii8<0xE5, RawFrm, (outs), (ins i16i8imm:$port), - "in{w} {$port, %ax|%AX, $port}", + "in{w}\t{$port, %ax|%AX, $port}", []>, Imp<[], [AX]>, OpSize; def IN32ri : Ii8<0xE5, RawFrm, (outs), (ins i16i8imm:$port), - "in{l} {$port, %eax|%EAX, $port}", + "in{l}\t{$port, %eax|%EAX, $port}", []>, Imp<[],[EAX]>; def OUT8rr : I<0xEE, RawFrm, (outs), (ins), - "out{b} {%al, %dx|%DX, %AL}", + "out{b}\t{%al, %dx|%DX, %AL}", []>, Imp<[DX, AL], []>; def OUT16rr : I<0xEF, RawFrm, (outs), (ins), - "out{w} {%ax, %dx|%DX, %AX}", + "out{w}\t{%ax, %dx|%DX, %AX}", []>, Imp<[DX, AX], []>, OpSize; def OUT32rr : I<0xEF, RawFrm, (outs), (ins), - "out{l} {%eax, %dx|%DX, %EAX}", + "out{l}\t{%eax, %dx|%DX, %EAX}", []>, Imp<[DX, EAX], []>; def OUT8ir : Ii8<0xE6, RawFrm, (outs), (ins i16i8imm:$port), - "out{b} {%al, $port|$port, %AL}", + "out{b}\t{%al, $port|$port, %AL}", []>, Imp<[AL], []>; def OUT16ir : Ii8<0xE7, RawFrm, (outs), (ins i16i8imm:$port), - "out{w} {%ax, $port|$port, %AX}", + "out{w}\t{%ax, $port|$port, %AX}", []>, Imp<[AX], []>, OpSize; def OUT32ir : Ii8<0xE7, RawFrm, (outs), (ins i16i8imm:$port), - "out{l} {%eax, $port|$port, %EAX}", + "out{l}\t{%eax, $port|$port, %EAX}", []>, Imp<[EAX], []>; @@ -492,50 +492,50 @@ // Move Instructions... // def MOV8rr : I<0x88, MRMDestReg, (outs GR8 :$dst), (ins GR8 :$src), - "mov{b} {$src, $dst|$dst, $src}", []>; + "mov{b}\t{$src, $dst|$dst, $src}", []>; def MOV16rr : I<0x89, MRMDestReg, (outs GR16:$dst), (ins GR16:$src), - "mov{w} {$src, $dst|$dst, $src}", []>, OpSize; + "mov{w}\t{$src, $dst|$dst, $src}", []>, OpSize; def MOV32rr : I<0x89, MRMDestReg, (outs GR32:$dst), (ins GR32:$src), - "mov{l} {$src, $dst|$dst, $src}", []>; + "mov{l}\t{$src, $dst|$dst, $src}", []>; let isReMaterializable = 1 in { def MOV8ri : Ii8 <0xB0, AddRegFrm, (outs GR8 :$dst), (ins i8imm :$src), - "mov{b} {$src, $dst|$dst, $src}", + "mov{b}\t{$src, $dst|$dst, $src}", [(set GR8:$dst, imm:$src)]>; def MOV16ri : Ii16<0xB8, AddRegFrm, (outs GR16:$dst), (ins i16imm:$src), - "mov{w} {$src, $dst|$dst, $src}", + "mov{w}\t{$src, $dst|$dst, $src}", [(set GR16:$dst, imm:$src)]>, OpSize; def MOV32ri : Ii32<0xB8, AddRegFrm, (outs GR32:$dst), (ins i32imm:$src), - "mov{l} {$src, $dst|$dst, $src}", + "mov{l}\t{$src, $dst|$dst, $src}", [(set GR32:$dst, imm:$src)]>; } def MOV8mi : Ii8 <0xC6, MRM0m, (outs), (ins i8mem :$dst, i8imm :$src), - "mov{b} {$src, $dst|$dst, $src}", + "mov{b}\t{$src, $dst|$dst, $src}", [(store (i8 imm:$src), addr:$dst)]>; def MOV16mi : Ii16<0xC7, MRM0m, (outs), (ins i16mem:$dst, i16imm:$src), - "mov{w} {$src, $dst|$dst, $src}", + "mov{w}\t{$src, $dst|$dst, $src}", [(store (i16 imm:$src), addr:$dst)]>, OpSize; def MOV32mi : Ii32<0xC7, MRM0m, (outs), (ins i32mem:$dst, i32imm:$src), - "mov{l} {$src, $dst|$dst, $src}", + "mov{l}\t{$src, $dst|$dst, $src}", [(store (i32 imm:$src), addr:$dst)]>; def MOV8rm : I<0x8A, MRMSrcMem, (outs GR8 :$dst), (ins i8mem :$src), - "mov{b} {$src, $dst|$dst, $src}", + "mov{b}\t{$src, $dst|$dst, $src}", [(set GR8:$dst, (load addr:$src))]>; def MOV16rm : I<0x8B, MRMSrcMem, (outs GR16:$dst), (ins i16mem:$src), - "mov{w} {$src, $dst|$dst, $src}", + "mov{w}\t{$src, $dst|$dst, $src}", [(set GR16:$dst, (load addr:$src))]>, OpSize; def MOV32rm : I<0x8B, MRMSrcMem, (outs GR32:$dst), (ins i32mem:$src), - "mov{l} {$src, $dst|$dst, $src}", + "mov{l}\t{$src, $dst|$dst, $src}", [(set GR32:$dst, (load addr:$src))]>; def MOV8mr : I<0x88, MRMDestMem, (outs), (ins i8mem :$dst, GR8 :$src), - "mov{b} {$src, $dst|$dst, $src}", + "mov{b}\t{$src, $dst|$dst, $src}", [(store GR8:$src, addr:$dst)]>; def MOV16mr : I<0x89, MRMDestMem, (outs), (ins i16mem:$dst, GR16:$src), - "mov{w} {$src, $dst|$dst, $src}", + "mov{w}\t{$src, $dst|$dst, $src}", [(store GR16:$src, addr:$dst)]>, OpSize; def MOV32mr : I<0x89, MRMDestMem, (outs), (ins i32mem:$dst, GR32:$src), - "mov{l} {$src, $dst|$dst, $src}", + "mov{l}\t{$src, $dst|$dst, $src}", [(store GR32:$src, addr:$dst)]>; //===----------------------------------------------------------------------===// @@ -543,71 +543,71 @@ // // Extra precision multiplication -def MUL8r : I<0xF6, MRM4r, (outs), (ins GR8:$src), "mul{b} $src", +def MUL8r : I<0xF6, MRM4r, (outs), (ins GR8:$src), "mul{b}\t$src", // FIXME: Used for 8-bit mul, ignore result upper 8 bits. // This probably ought to be moved to a def : Pat<> if the // syntax can be accepted. [(set AL, (mul AL, GR8:$src))]>, Imp<[AL],[AX]>; // AL,AH = AL*GR8 -def MUL16r : I<0xF7, MRM4r, (outs), (ins GR16:$src), "mul{w} $src", []>, +def MUL16r : I<0xF7, MRM4r, (outs), (ins GR16:$src), "mul{w}\t$src", []>, Imp<[AX],[AX,DX]>, OpSize; // AX,DX = AX*GR16 -def MUL32r : I<0xF7, MRM4r, (outs), (ins GR32:$src), "mul{l} $src", []>, +def MUL32r : I<0xF7, MRM4r, (outs), (ins GR32:$src), "mul{l}\t$src", []>, Imp<[EAX],[EAX,EDX]>; // EAX,EDX = EAX*GR32 def MUL8m : I<0xF6, MRM4m, (outs), (ins i8mem :$src), - "mul{b} $src", + "mul{b}\t$src", // FIXME: Used for 8-bit mul, ignore result upper 8 bits. // This probably ought to be moved to a def : Pat<> if the // syntax can be accepted. [(set AL, (mul AL, (loadi8 addr:$src)))]>, Imp<[AL],[AX]>; // AL,AH = AL*[mem8] def MUL16m : I<0xF7, MRM4m, (outs), (ins i16mem:$src), - "mul{w} $src", []>, Imp<[AX],[AX,DX]>, + "mul{w}\t$src", []>, Imp<[AX],[AX,DX]>, OpSize; // AX,DX = AX*[mem16] def MUL32m : I<0xF7, MRM4m, (outs), (ins i32mem:$src), - "mul{l} $src", []>, Imp<[EAX],[EAX,EDX]>;// EAX,EDX = EAX*[mem32] + "mul{l}\t$src", []>, Imp<[EAX],[EAX,EDX]>;// EAX,EDX = EAX*[mem32] -def IMUL8r : I<0xF6, MRM5r, (outs), (ins GR8:$src), "imul{b} $src", []>, +def IMUL8r : I<0xF6, MRM5r, (outs), (ins GR8:$src), "imul{b}\t$src", []>, Imp<[AL],[AX]>; // AL,AH = AL*GR8 -def IMUL16r : I<0xF7, MRM5r, (outs), (ins GR16:$src), "imul{w} $src", []>, +def IMUL16r : I<0xF7, MRM5r, (outs), (ins GR16:$src), "imul{w}\t$src", []>, Imp<[AX],[AX,DX]>, OpSize; // AX,DX = AX*GR16 -def IMUL32r : I<0xF7, MRM5r, (outs), (ins GR32:$src), "imul{l} $src", []>, +def IMUL32r : I<0xF7, MRM5r, (outs), (ins GR32:$src), "imul{l}\t$src", []>, Imp<[EAX],[EAX,EDX]>; // EAX,EDX = EAX*GR32 def IMUL8m : I<0xF6, MRM5m, (outs), (ins i8mem :$src), - "imul{b} $src", []>, Imp<[AL],[AX]>; // AL,AH = AL*[mem8] + "imul{b}\t$src", []>, Imp<[AL],[AX]>; // AL,AH = AL*[mem8] def IMUL16m : I<0xF7, MRM5m, (outs), (ins i16mem:$src), - "imul{w} $src", []>, Imp<[AX],[AX,DX]>, + "imul{w}\t$src", []>, Imp<[AX],[AX,DX]>, OpSize; // AX,DX = AX*[mem16] def IMUL32m : I<0xF7, MRM5m, (outs), (ins i32mem:$src), - "imul{l} $src", []>, + "imul{l}\t$src", []>, Imp<[EAX],[EAX,EDX]>; // EAX,EDX = EAX*[mem32] // unsigned division/remainder def DIV8r : I<0xF6, MRM6r, (outs), (ins GR8:$src), // AX/r8 = AL,AH - "div{b} $src", []>, Imp<[AX],[AX]>; + "div{b}\t$src", []>, Imp<[AX],[AX]>; def DIV16r : I<0xF7, MRM6r, (outs), (ins GR16:$src), // DX:AX/r16 = AX,DX - "div{w} $src", []>, Imp<[AX,DX],[AX,DX]>, OpSize; + "div{w}\t$src", []>, Imp<[AX,DX],[AX,DX]>, OpSize; def DIV32r : I<0xF7, MRM6r, (outs), (ins GR32:$src), // EDX:EAX/r32 = EAX,EDX - "div{l} $src", []>, Imp<[EAX,EDX],[EAX,EDX]>; + "div{l}\t$src", []>, Imp<[EAX,EDX],[EAX,EDX]>; def DIV8m : I<0xF6, MRM6m, (outs), (ins i8mem:$src), // AX/[mem8] = AL,AH - "div{b} $src", []>, Imp<[AX],[AX]>; + "div{b}\t$src", []>, Imp<[AX],[AX]>; def DIV16m : I<0xF7, MRM6m, (outs), (ins i16mem:$src), // DX:AX/[mem16] = AX,DX - "div{w} $src", []>, Imp<[AX,DX],[AX,DX]>, OpSize; + "div{w}\t$src", []>, Imp<[AX,DX],[AX,DX]>, OpSize; def DIV32m : I<0xF7, MRM6m, (outs), (ins i32mem:$src), // EDX:EAX/[mem32] = EAX,EDX - "div{l} $src", []>, Imp<[EAX,EDX],[EAX,EDX]>; + "div{l}\t$src", []>, Imp<[EAX,EDX],[EAX,EDX]>; // Signed division/remainder. def IDIV8r : I<0xF6, MRM7r, (outs), (ins GR8:$src), // AX/r8 = AL,AH - "idiv{b} $src", []>, Imp<[AX],[AX]>; + "idiv{b}\t$src", []>, Imp<[AX],[AX]>; def IDIV16r: I<0xF7, MRM7r, (outs), (ins GR16:$src), // DX:AX/r16 = AX,DX - "idiv{w} $src", []>, Imp<[AX,DX],[AX,DX]>, OpSize; + "idiv{w}\t$src", []>, Imp<[AX,DX],[AX,DX]>, OpSize; def IDIV32r: I<0xF7, MRM7r, (outs), (ins GR32:$src), // EDX:EAX/r32 = EAX,EDX - "idiv{l} $src", []>, Imp<[EAX,EDX],[EAX,EDX]>; + "idiv{l}\t$src", []>, Imp<[EAX,EDX],[EAX,EDX]>; def IDIV8m : I<0xF6, MRM7m, (outs), (ins i8mem:$src), // AX/[mem8] = AL,AH - "idiv{b} $src", []>, Imp<[AX],[AX]>; + "idiv{b}\t$src", []>, Imp<[AX],[AX]>; def IDIV16m: I<0xF7, MRM7m, (outs), (ins i16mem:$src), // DX:AX/[mem16] = AX,DX - "idiv{w} $src", []>, Imp<[AX,DX],[AX,DX]>, OpSize; + "idiv{w}\t$src", []>, Imp<[AX,DX],[AX,DX]>, OpSize; def IDIV32m: I<0xF7, MRM7m, (outs), (ins i32mem:$src), // EDX:EAX/[mem32] = EAX,EDX - "idiv{l} $src", []>, Imp<[EAX,EDX],[EAX,EDX]>; + "idiv{l}\t$src", []>, Imp<[EAX,EDX],[EAX,EDX]>; //===----------------------------------------------------------------------===// @@ -618,350 +618,350 @@ // Conditional moves def CMOVB16rr : I<0x42, MRMSrcReg, // if , TB, OpSize; def CMOVB16rm : I<0x42, MRMSrcMem, // if , TB, OpSize; def CMOVB32rr : I<0x42, MRMSrcReg, // if , TB; def CMOVB32rm : I<0x42, MRMSrcMem, // if , TB; def CMOVAE16rr: I<0x43, MRMSrcReg, // if >=u, GR16 = GR16 (outs GR16:$dst), (ins GR16:$src1, GR16:$src2), - "cmovae {$src2, $dst|$dst, $src2}", + "cmovae\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (X86cmov GR16:$src1, GR16:$src2, X86_COND_AE))]>, TB, OpSize; def CMOVAE16rm: I<0x43, MRMSrcMem, // if >=u, GR16 = [mem16] (outs GR16:$dst), (ins GR16:$src1, i16mem:$src2), - "cmovae {$src2, $dst|$dst, $src2}", + "cmovae\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (X86cmov GR16:$src1, (loadi16 addr:$src2), X86_COND_AE))]>, TB, OpSize; def CMOVAE32rr: I<0x43, MRMSrcReg, // if >=u, GR32 = GR32 (outs GR32:$dst), (ins GR32:$src1, GR32:$src2), - "cmovae {$src2, $dst|$dst, $src2}", + "cmovae\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (X86cmov GR32:$src1, GR32:$src2, X86_COND_AE))]>, TB; def CMOVAE32rm: I<0x43, MRMSrcMem, // if >=u, GR32 = [mem32] (outs GR32:$dst), (ins GR32:$src1, i32mem:$src2), - "cmovae {$src2, $dst|$dst, $src2}", + "cmovae\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (X86cmov GR32:$src1, (loadi32 addr:$src2), X86_COND_AE))]>, TB; def CMOVE16rr : I<0x44, MRMSrcReg, // if ==, GR16 = GR16 (outs GR16:$dst), (ins GR16:$src1, GR16:$src2), - "cmove {$src2, $dst|$dst, $src2}", + "cmove\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (X86cmov GR16:$src1, GR16:$src2, X86_COND_E))]>, TB, OpSize; def CMOVE16rm : I<0x44, MRMSrcMem, // if ==, GR16 = [mem16] (outs GR16:$dst), (ins GR16:$src1, i16mem:$src2), - "cmove {$src2, $dst|$dst, $src2}", + "cmove\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (X86cmov GR16:$src1, (loadi16 addr:$src2), X86_COND_E))]>, TB, OpSize; def CMOVE32rr : I<0x44, MRMSrcReg, // if ==, GR32 = GR32 (outs GR32:$dst), (ins GR32:$src1, GR32:$src2), - "cmove {$src2, $dst|$dst, $src2}", + "cmove\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (X86cmov GR32:$src1, GR32:$src2, X86_COND_E))]>, TB; def CMOVE32rm : I<0x44, MRMSrcMem, // if ==, GR32 = [mem32] (outs GR32:$dst), (ins GR32:$src1, i32mem:$src2), - "cmove {$src2, $dst|$dst, $src2}", + "cmove\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (X86cmov GR32:$src1, (loadi32 addr:$src2), X86_COND_E))]>, TB; def CMOVNE16rr: I<0x45, MRMSrcReg, // if !=, GR16 = GR16 (outs GR16:$dst), (ins GR16:$src1, GR16:$src2), - "cmovne {$src2, $dst|$dst, $src2}", + "cmovne\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (X86cmov GR16:$src1, GR16:$src2, X86_COND_NE))]>, TB, OpSize; def CMOVNE16rm: I<0x45, MRMSrcMem, // if !=, GR16 = [mem16] (outs GR16:$dst), (ins GR16:$src1, i16mem:$src2), - "cmovne {$src2, $dst|$dst, $src2}", + "cmovne\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (X86cmov GR16:$src1, (loadi16 addr:$src2), X86_COND_NE))]>, TB, OpSize; def CMOVNE32rr: I<0x45, MRMSrcReg, // if !=, GR32 = GR32 (outs GR32:$dst), (ins GR32:$src1, GR32:$src2), - "cmovne {$src2, $dst|$dst, $src2}", + "cmovne\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (X86cmov GR32:$src1, GR32:$src2, X86_COND_NE))]>, TB; def CMOVNE32rm: I<0x45, MRMSrcMem, // if !=, GR32 = [mem32] (outs GR32:$dst), (ins GR32:$src1, i32mem:$src2), - "cmovne {$src2, $dst|$dst, $src2}", + "cmovne\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (X86cmov GR32:$src1, (loadi32 addr:$src2), X86_COND_NE))]>, TB; def CMOVBE16rr: I<0x46, MRMSrcReg, // if <=u, GR16 = GR16 (outs GR16:$dst), (ins GR16:$src1, GR16:$src2), - "cmovbe {$src2, $dst|$dst, $src2}", + "cmovbe\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (X86cmov GR16:$src1, GR16:$src2, X86_COND_BE))]>, TB, OpSize; def CMOVBE16rm: I<0x46, MRMSrcMem, // if <=u, GR16 = [mem16] (outs GR16:$dst), (ins GR16:$src1, i16mem:$src2), - "cmovbe {$src2, $dst|$dst, $src2}", + "cmovbe\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (X86cmov GR16:$src1, (loadi16 addr:$src2), X86_COND_BE))]>, TB, OpSize; def CMOVBE32rr: I<0x46, MRMSrcReg, // if <=u, GR32 = GR32 (outs GR32:$dst), (ins GR32:$src1, GR32:$src2), - "cmovbe {$src2, $dst|$dst, $src2}", + "cmovbe\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (X86cmov GR32:$src1, GR32:$src2, X86_COND_BE))]>, TB; def CMOVBE32rm: I<0x46, MRMSrcMem, // if <=u, GR32 = [mem32] (outs GR32:$dst), (ins GR32:$src1, i32mem:$src2), - "cmovbe {$src2, $dst|$dst, $src2}", + "cmovbe\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (X86cmov GR32:$src1, (loadi32 addr:$src2), X86_COND_BE))]>, TB; def CMOVA16rr : I<0x47, MRMSrcReg, // if >u, GR16 = GR16 (outs GR16:$dst), (ins GR16:$src1, GR16:$src2), - "cmova {$src2, $dst|$dst, $src2}", + "cmova\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (X86cmov GR16:$src1, GR16:$src2, X86_COND_A))]>, TB, OpSize; def CMOVA16rm : I<0x47, MRMSrcMem, // if >u, GR16 = [mem16] (outs GR16:$dst), (ins GR16:$src1, i16mem:$src2), - "cmova {$src2, $dst|$dst, $src2}", + "cmova\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (X86cmov GR16:$src1, (loadi16 addr:$src2), X86_COND_A))]>, TB, OpSize; def CMOVA32rr : I<0x47, MRMSrcReg, // if >u, GR32 = GR32 (outs GR32:$dst), (ins GR32:$src1, GR32:$src2), - "cmova {$src2, $dst|$dst, $src2}", + "cmova\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (X86cmov GR32:$src1, GR32:$src2, X86_COND_A))]>, TB; def CMOVA32rm : I<0x47, MRMSrcMem, // if >u, GR32 = [mem32] (outs GR32:$dst), (ins GR32:$src1, i32mem:$src2), - "cmova {$src2, $dst|$dst, $src2}", + "cmova\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (X86cmov GR32:$src1, (loadi32 addr:$src2), X86_COND_A))]>, TB; def CMOVL16rr : I<0x4C, MRMSrcReg, // if , TB, OpSize; def CMOVL16rm : I<0x4C, MRMSrcMem, // if , TB, OpSize; def CMOVL32rr : I<0x4C, MRMSrcReg, // if , TB; def CMOVL32rm : I<0x4C, MRMSrcMem, // if , TB; def CMOVGE16rr: I<0x4D, MRMSrcReg, // if >=s, GR16 = GR16 (outs GR16:$dst), (ins GR16:$src1, GR16:$src2), - "cmovge {$src2, $dst|$dst, $src2}", + "cmovge\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (X86cmov GR16:$src1, GR16:$src2, X86_COND_GE))]>, TB, OpSize; def CMOVGE16rm: I<0x4D, MRMSrcMem, // if >=s, GR16 = [mem16] (outs GR16:$dst), (ins GR16:$src1, i16mem:$src2), - "cmovge {$src2, $dst|$dst, $src2}", + "cmovge\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (X86cmov GR16:$src1, (loadi16 addr:$src2), X86_COND_GE))]>, TB, OpSize; def CMOVGE32rr: I<0x4D, MRMSrcReg, // if >=s, GR32 = GR32 (outs GR32:$dst), (ins GR32:$src1, GR32:$src2), - "cmovge {$src2, $dst|$dst, $src2}", + "cmovge\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (X86cmov GR32:$src1, GR32:$src2, X86_COND_GE))]>, TB; def CMOVGE32rm: I<0x4D, MRMSrcMem, // if >=s, GR32 = [mem32] (outs GR32:$dst), (ins GR32:$src1, i32mem:$src2), - "cmovge {$src2, $dst|$dst, $src2}", + "cmovge\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (X86cmov GR32:$src1, (loadi32 addr:$src2), X86_COND_GE))]>, TB; def CMOVLE16rr: I<0x4E, MRMSrcReg, // if <=s, GR16 = GR16 (outs GR16:$dst), (ins GR16:$src1, GR16:$src2), - "cmovle {$src2, $dst|$dst, $src2}", + "cmovle\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (X86cmov GR16:$src1, GR16:$src2, X86_COND_LE))]>, TB, OpSize; def CMOVLE16rm: I<0x4E, MRMSrcMem, // if <=s, GR16 = [mem16] (outs GR16:$dst), (ins GR16:$src1, i16mem:$src2), - "cmovle {$src2, $dst|$dst, $src2}", + "cmovle\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (X86cmov GR16:$src1, (loadi16 addr:$src2), X86_COND_LE))]>, TB, OpSize; def CMOVLE32rr: I<0x4E, MRMSrcReg, // if <=s, GR32 = GR32 (outs GR32:$dst), (ins GR32:$src1, GR32:$src2), - "cmovle {$src2, $dst|$dst, $src2}", + "cmovle\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (X86cmov GR32:$src1, GR32:$src2, X86_COND_LE))]>, TB; def CMOVLE32rm: I<0x4E, MRMSrcMem, // if <=s, GR32 = [mem32] (outs GR32:$dst), (ins GR32:$src1, i32mem:$src2), - "cmovle {$src2, $dst|$dst, $src2}", + "cmovle\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (X86cmov GR32:$src1, (loadi32 addr:$src2), X86_COND_LE))]>, TB; def CMOVG16rr : I<0x4F, MRMSrcReg, // if >s, GR16 = GR16 (outs GR16:$dst), (ins GR16:$src1, GR16:$src2), - "cmovg {$src2, $dst|$dst, $src2}", + "cmovg\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (X86cmov GR16:$src1, GR16:$src2, X86_COND_G))]>, TB, OpSize; def CMOVG16rm : I<0x4F, MRMSrcMem, // if >s, GR16 = [mem16] (outs GR16:$dst), (ins GR16:$src1, i16mem:$src2), - "cmovg {$src2, $dst|$dst, $src2}", + "cmovg\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (X86cmov GR16:$src1, (loadi16 addr:$src2), X86_COND_G))]>, TB, OpSize; def CMOVG32rr : I<0x4F, MRMSrcReg, // if >s, GR32 = GR32 (outs GR32:$dst), (ins GR32:$src1, GR32:$src2), - "cmovg {$src2, $dst|$dst, $src2}", + "cmovg\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (X86cmov GR32:$src1, GR32:$src2, X86_COND_G))]>, TB; def CMOVG32rm : I<0x4F, MRMSrcMem, // if >s, GR32 = [mem32] (outs GR32:$dst), (ins GR32:$src1, i32mem:$src2), - "cmovg {$src2, $dst|$dst, $src2}", + "cmovg\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (X86cmov GR32:$src1, (loadi32 addr:$src2), X86_COND_G))]>, TB; def CMOVS16rr : I<0x48, MRMSrcReg, // if signed, GR16 = GR16 (outs GR16:$dst), (ins GR16:$src1, GR16:$src2), - "cmovs {$src2, $dst|$dst, $src2}", + "cmovs\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (X86cmov GR16:$src1, GR16:$src2, X86_COND_S))]>, TB, OpSize; def CMOVS16rm : I<0x48, MRMSrcMem, // if signed, GR16 = [mem16] (outs GR16:$dst), (ins GR16:$src1, i16mem:$src2), - "cmovs {$src2, $dst|$dst, $src2}", + "cmovs\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (X86cmov GR16:$src1, (loadi16 addr:$src2), X86_COND_S))]>, TB, OpSize; def CMOVS32rr : I<0x48, MRMSrcReg, // if signed, GR32 = GR32 (outs GR32:$dst), (ins GR32:$src1, GR32:$src2), - "cmovs {$src2, $dst|$dst, $src2}", + "cmovs\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (X86cmov GR32:$src1, GR32:$src2, X86_COND_S))]>, TB; def CMOVS32rm : I<0x48, MRMSrcMem, // if signed, GR32 = [mem32] (outs GR32:$dst), (ins GR32:$src1, i32mem:$src2), - "cmovs {$src2, $dst|$dst, $src2}", + "cmovs\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (X86cmov GR32:$src1, (loadi32 addr:$src2), X86_COND_S))]>, TB; def CMOVNS16rr: I<0x49, MRMSrcReg, // if !signed, GR16 = GR16 (outs GR16:$dst), (ins GR16:$src1, GR16:$src2), - "cmovns {$src2, $dst|$dst, $src2}", + "cmovns\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (X86cmov GR16:$src1, GR16:$src2, X86_COND_NS))]>, TB, OpSize; def CMOVNS16rm: I<0x49, MRMSrcMem, // if !signed, GR16 = [mem16] (outs GR16:$dst), (ins GR16:$src1, i16mem:$src2), - "cmovns {$src2, $dst|$dst, $src2}", + "cmovns\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (X86cmov GR16:$src1, (loadi16 addr:$src2), X86_COND_NS))]>, TB, OpSize; def CMOVNS32rr: I<0x49, MRMSrcReg, // if !signed, GR32 = GR32 (outs GR32:$dst), (ins GR32:$src1, GR32:$src2), - "cmovns {$src2, $dst|$dst, $src2}", + "cmovns\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (X86cmov GR32:$src1, GR32:$src2, X86_COND_NS))]>, TB; def CMOVNS32rm: I<0x49, MRMSrcMem, // if !signed, GR32 = [mem32] (outs GR32:$dst), (ins GR32:$src1, i32mem:$src2), - "cmovns {$src2, $dst|$dst, $src2}", + "cmovns\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (X86cmov GR32:$src1, (loadi32 addr:$src2), X86_COND_NS))]>, TB; def CMOVP16rr : I<0x4A, MRMSrcReg, // if parity, GR16 = GR16 (outs GR16:$dst), (ins GR16:$src1, GR16:$src2), - "cmovp {$src2, $dst|$dst, $src2}", + "cmovp\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (X86cmov GR16:$src1, GR16:$src2, X86_COND_P))]>, TB, OpSize; def CMOVP16rm : I<0x4A, MRMSrcMem, // if parity, GR16 = [mem16] (outs GR16:$dst), (ins GR16:$src1, i16mem:$src2), - "cmovp {$src2, $dst|$dst, $src2}", + "cmovp\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (X86cmov GR16:$src1, (loadi16 addr:$src2), X86_COND_P))]>, TB, OpSize; def CMOVP32rr : I<0x4A, MRMSrcReg, // if parity, GR32 = GR32 (outs GR32:$dst), (ins GR32:$src1, GR32:$src2), - "cmovp {$src2, $dst|$dst, $src2}", + "cmovp\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (X86cmov GR32:$src1, GR32:$src2, X86_COND_P))]>, TB; def CMOVP32rm : I<0x4A, MRMSrcMem, // if parity, GR32 = [mem32] (outs GR32:$dst), (ins GR32:$src1, i32mem:$src2), - "cmovp {$src2, $dst|$dst, $src2}", + "cmovp\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (X86cmov GR32:$src1, (loadi32 addr:$src2), X86_COND_P))]>, TB; def CMOVNP16rr : I<0x4B, MRMSrcReg, // if !parity, GR16 = GR16 (outs GR16:$dst), (ins GR16:$src1, GR16:$src2), - "cmovnp {$src2, $dst|$dst, $src2}", + "cmovnp\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (X86cmov GR16:$src1, GR16:$src2, X86_COND_NP))]>, TB, OpSize; def CMOVNP16rm : I<0x4B, MRMSrcMem, // if !parity, GR16 = [mem16] (outs GR16:$dst), (ins GR16:$src1, i16mem:$src2), - "cmovnp {$src2, $dst|$dst, $src2}", + "cmovnp\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (X86cmov GR16:$src1, (loadi16 addr:$src2), X86_COND_NP))]>, TB, OpSize; def CMOVNP32rr : I<0x4B, MRMSrcReg, // if !parity, GR32 = GR32 (outs GR32:$dst), (ins GR32:$src1, GR32:$src2), - "cmovnp {$src2, $dst|$dst, $src2}", + "cmovnp\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (X86cmov GR32:$src1, GR32:$src2, X86_COND_NP))]>, TB; def CMOVNP32rm : I<0x4B, MRMSrcMem, // if !parity, GR32 = [mem32] (outs GR32:$dst), (ins GR32:$src1, i32mem:$src2), - "cmovnp {$src2, $dst|$dst, $src2}", + "cmovnp\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (X86cmov GR32:$src1, (loadi32 addr:$src2), X86_COND_NP))]>, TB; @@ -969,75 +969,75 @@ // unary instructions let CodeSize = 2 in { -def NEG8r : I<0xF6, MRM3r, (outs GR8 :$dst), (ins GR8 :$src), "neg{b} $dst", +def NEG8r : I<0xF6, MRM3r, (outs GR8 :$dst), (ins GR8 :$src), "neg{b}\t$dst", [(set GR8:$dst, (ineg GR8:$src))]>; -def NEG16r : I<0xF7, MRM3r, (outs GR16:$dst), (ins GR16:$src), "neg{w} $dst", +def NEG16r : I<0xF7, MRM3r, (outs GR16:$dst), (ins GR16:$src), "neg{w}\t$dst", [(set GR16:$dst, (ineg GR16:$src))]>, OpSize; -def NEG32r : I<0xF7, MRM3r, (outs GR32:$dst), (ins GR32:$src), "neg{l} $dst", +def NEG32r : I<0xF7, MRM3r, (outs GR32:$dst), (ins GR32:$src), "neg{l}\t$dst", [(set GR32:$dst, (ineg GR32:$src))]>; let isTwoAddress = 0 in { - def NEG8m : I<0xF6, MRM3m, (outs), (ins i8mem :$dst), "neg{b} $dst", + def NEG8m : I<0xF6, MRM3m, (outs), (ins i8mem :$dst), "neg{b}\t$dst", [(store (ineg (loadi8 addr:$dst)), addr:$dst)]>; - def NEG16m : I<0xF7, MRM3m, (outs), (ins i16mem:$dst), "neg{w} $dst", + def NEG16m : I<0xF7, MRM3m, (outs), (ins i16mem:$dst), "neg{w}\t$dst", [(store (ineg (loadi16 addr:$dst)), addr:$dst)]>, OpSize; - def NEG32m : I<0xF7, MRM3m, (outs), (ins i32mem:$dst), "neg{l} $dst", + def NEG32m : I<0xF7, MRM3m, (outs), (ins i32mem:$dst), "neg{l}\t$dst", [(store (ineg (loadi32 addr:$dst)), addr:$dst)]>; } -def NOT8r : I<0xF6, MRM2r, (outs GR8 :$dst), (ins GR8 :$src), "not{b} $dst", +def NOT8r : I<0xF6, MRM2r, (outs GR8 :$dst), (ins GR8 :$src), "not{b}\t$dst", [(set GR8:$dst, (not GR8:$src))]>; -def NOT16r : I<0xF7, MRM2r, (outs GR16:$dst), (ins GR16:$src), "not{w} $dst", +def NOT16r : I<0xF7, MRM2r, (outs GR16:$dst), (ins GR16:$src), "not{w}\t$dst", [(set GR16:$dst, (not GR16:$src))]>, OpSize; -def NOT32r : I<0xF7, MRM2r, (outs GR32:$dst), (ins GR32:$src), "not{l} $dst", +def NOT32r : I<0xF7, MRM2r, (outs GR32:$dst), (ins GR32:$src), "not{l}\t$dst", [(set GR32:$dst, (not GR32:$src))]>; let isTwoAddress = 0 in { - def NOT8m : I<0xF6, MRM2m, (outs), (ins i8mem :$dst), "not{b} $dst", + def NOT8m : I<0xF6, MRM2m, (outs), (ins i8mem :$dst), "not{b}\t$dst", [(store (not (loadi8 addr:$dst)), addr:$dst)]>; - def NOT16m : I<0xF7, MRM2m, (outs), (ins i16mem:$dst), "not{w} $dst", + def NOT16m : I<0xF7, MRM2m, (outs), (ins i16mem:$dst), "not{w}\t$dst", [(store (not (loadi16 addr:$dst)), addr:$dst)]>, OpSize; - def NOT32m : I<0xF7, MRM2m, (outs), (ins i32mem:$dst), "not{l} $dst", + def NOT32m : I<0xF7, MRM2m, (outs), (ins i32mem:$dst), "not{l}\t$dst", [(store (not (loadi32 addr:$dst)), addr:$dst)]>; } } // CodeSize // TODO: inc/dec is slow for P4, but fast for Pentium-M. let CodeSize = 2 in -def INC8r : I<0xFE, MRM0r, (outs GR8 :$dst), (ins GR8 :$src), "inc{b} $dst", +def INC8r : I<0xFE, MRM0r, (outs GR8 :$dst), (ins GR8 :$src), "inc{b}\t$dst", [(set GR8:$dst, (add GR8:$src, 1))]>; let isConvertibleToThreeAddress = 1, CodeSize = 1 in { // Can xform into LEA. -def INC16r : I<0x40, AddRegFrm, (outs GR16:$dst), (ins GR16:$src), "inc{w} $dst", +def INC16r : I<0x40, AddRegFrm, (outs GR16:$dst), (ins GR16:$src), "inc{w}\t$dst", [(set GR16:$dst, (add GR16:$src, 1))]>, OpSize, Requires<[In32BitMode]>; -def INC32r : I<0x40, AddRegFrm, (outs GR32:$dst), (ins GR32:$src), "inc{l} $dst", +def INC32r : I<0x40, AddRegFrm, (outs GR32:$dst), (ins GR32:$src), "inc{l}\t$dst", [(set GR32:$dst, (add GR32:$src, 1))]>, Requires<[In32BitMode]>; } let isTwoAddress = 0, CodeSize = 2 in { - def INC8m : I<0xFE, MRM0m, (outs), (ins i8mem :$dst), "inc{b} $dst", + def INC8m : I<0xFE, MRM0m, (outs), (ins i8mem :$dst), "inc{b}\t$dst", [(store (add (loadi8 addr:$dst), 1), addr:$dst)]>; - def INC16m : I<0xFF, MRM0m, (outs), (ins i16mem:$dst), "inc{w} $dst", + def INC16m : I<0xFF, MRM0m, (outs), (ins i16mem:$dst), "inc{w}\t$dst", [(store (add (loadi16 addr:$dst), 1), addr:$dst)]>, OpSize; - def INC32m : I<0xFF, MRM0m, (outs), (ins i32mem:$dst), "inc{l} $dst", + def INC32m : I<0xFF, MRM0m, (outs), (ins i32mem:$dst), "inc{l}\t$dst", [(store (add (loadi32 addr:$dst), 1), addr:$dst)]>; } let CodeSize = 2 in -def DEC8r : I<0xFE, MRM1r, (outs GR8 :$dst), (ins GR8 :$src), "dec{b} $dst", +def DEC8r : I<0xFE, MRM1r, (outs GR8 :$dst), (ins GR8 :$src), "dec{b}\t$dst", [(set GR8:$dst, (add GR8:$src, -1))]>; let isConvertibleToThreeAddress = 1, CodeSize = 1 in { // Can xform into LEA. -def DEC16r : I<0x48, AddRegFrm, (outs GR16:$dst), (ins GR16:$src), "dec{w} $dst", +def DEC16r : I<0x48, AddRegFrm, (outs GR16:$dst), (ins GR16:$src), "dec{w}\t$dst", [(set GR16:$dst, (add GR16:$src, -1))]>, OpSize, Requires<[In32BitMode]>; -def DEC32r : I<0x48, AddRegFrm, (outs GR32:$dst), (ins GR32:$src), "dec{l} $dst", +def DEC32r : I<0x48, AddRegFrm, (outs GR32:$dst), (ins GR32:$src), "dec{l}\t$dst", [(set GR32:$dst, (add GR32:$src, -1))]>, Requires<[In32BitMode]>; } let isTwoAddress = 0, CodeSize = 2 in { - def DEC8m : I<0xFE, MRM1m, (outs), (ins i8mem :$dst), "dec{b} $dst", + def DEC8m : I<0xFE, MRM1m, (outs), (ins i8mem :$dst), "dec{b}\t$dst", [(store (add (loadi8 addr:$dst), -1), addr:$dst)]>; - def DEC16m : I<0xFF, MRM1m, (outs), (ins i16mem:$dst), "dec{w} $dst", + def DEC16m : I<0xFF, MRM1m, (outs), (ins i16mem:$dst), "dec{w}\t$dst", [(store (add (loadi16 addr:$dst), -1), addr:$dst)]>, OpSize; - def DEC32m : I<0xFF, MRM1m, (outs), (ins i32mem:$dst), "dec{l} $dst", + def DEC32m : I<0xFF, MRM1m, (outs), (ins i32mem:$dst), "dec{l}\t$dst", [(store (add (loadi32 addr:$dst), -1), addr:$dst)]>; } @@ -1045,155 +1045,155 @@ let isCommutable = 1 in { // X = AND Y, Z --> X = AND Z, Y def AND8rr : I<0x20, MRMDestReg, (outs GR8 :$dst), (ins GR8 :$src1, GR8 :$src2), - "and{b} {$src2, $dst|$dst, $src2}", + "and{b}\t{$src2, $dst|$dst, $src2}", [(set GR8:$dst, (and GR8:$src1, GR8:$src2))]>; def AND16rr : I<0x21, MRMDestReg, (outs GR16:$dst), (ins GR16:$src1, GR16:$src2), - "and{w} {$src2, $dst|$dst, $src2}", + "and{w}\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (and GR16:$src1, GR16:$src2))]>, OpSize; def AND32rr : I<0x21, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2), - "and{l} {$src2, $dst|$dst, $src2}", + "and{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (and GR32:$src1, GR32:$src2))]>; } def AND8rm : I<0x22, MRMSrcMem, (outs GR8 :$dst), (ins GR8 :$src1, i8mem :$src2), - "and{b} {$src2, $dst|$dst, $src2}", + "and{b}\t{$src2, $dst|$dst, $src2}", [(set GR8:$dst, (and GR8:$src1, (load addr:$src2)))]>; def AND16rm : I<0x23, MRMSrcMem, (outs GR16:$dst), (ins GR16:$src1, i16mem:$src2), - "and{w} {$src2, $dst|$dst, $src2}", + "and{w}\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (and GR16:$src1, (load addr:$src2)))]>, OpSize; def AND32rm : I<0x23, MRMSrcMem, (outs GR32:$dst), (ins GR32:$src1, i32mem:$src2), - "and{l} {$src2, $dst|$dst, $src2}", + "and{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (and GR32:$src1, (load addr:$src2)))]>; def AND8ri : Ii8<0x80, MRM4r, (outs GR8 :$dst), (ins GR8 :$src1, i8imm :$src2), - "and{b} {$src2, $dst|$dst, $src2}", + "and{b}\t{$src2, $dst|$dst, $src2}", [(set GR8:$dst, (and GR8:$src1, imm:$src2))]>; def AND16ri : Ii16<0x81, MRM4r, (outs GR16:$dst), (ins GR16:$src1, i16imm:$src2), - "and{w} {$src2, $dst|$dst, $src2}", + "and{w}\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (and GR16:$src1, imm:$src2))]>, OpSize; def AND32ri : Ii32<0x81, MRM4r, (outs GR32:$dst), (ins GR32:$src1, i32imm:$src2), - "and{l} {$src2, $dst|$dst, $src2}", + "and{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (and GR32:$src1, imm:$src2))]>; def AND16ri8 : Ii8<0x83, MRM4r, (outs GR16:$dst), (ins GR16:$src1, i16i8imm:$src2), - "and{w} {$src2, $dst|$dst, $src2}", + "and{w}\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (and GR16:$src1, i16immSExt8:$src2))]>, OpSize; def AND32ri8 : Ii8<0x83, MRM4r, (outs GR32:$dst), (ins GR32:$src1, i32i8imm:$src2), - "and{l} {$src2, $dst|$dst, $src2}", + "and{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (and GR32:$src1, i32immSExt8:$src2))]>; let isTwoAddress = 0 in { def AND8mr : I<0x20, MRMDestMem, (outs), (ins i8mem :$dst, GR8 :$src), - "and{b} {$src, $dst|$dst, $src}", + "and{b}\t{$src, $dst|$dst, $src}", [(store (and (load addr:$dst), GR8:$src), addr:$dst)]>; def AND16mr : I<0x21, MRMDestMem, (outs), (ins i16mem:$dst, GR16:$src), - "and{w} {$src, $dst|$dst, $src}", + "and{w}\t{$src, $dst|$dst, $src}", [(store (and (load addr:$dst), GR16:$src), addr:$dst)]>, OpSize; def AND32mr : I<0x21, MRMDestMem, (outs), (ins i32mem:$dst, GR32:$src), - "and{l} {$src, $dst|$dst, $src}", + "and{l}\t{$src, $dst|$dst, $src}", [(store (and (load addr:$dst), GR32:$src), addr:$dst)]>; def AND8mi : Ii8<0x80, MRM4m, (outs), (ins i8mem :$dst, i8imm :$src), - "and{b} {$src, $dst|$dst, $src}", + "and{b}\t{$src, $dst|$dst, $src}", [(store (and (loadi8 addr:$dst), imm:$src), addr:$dst)]>; def AND16mi : Ii16<0x81, MRM4m, (outs), (ins i16mem:$dst, i16imm:$src), - "and{w} {$src, $dst|$dst, $src}", + "and{w}\t{$src, $dst|$dst, $src}", [(store (and (loadi16 addr:$dst), imm:$src), addr:$dst)]>, OpSize; def AND32mi : Ii32<0x81, MRM4m, (outs), (ins i32mem:$dst, i32imm:$src), - "and{l} {$src, $dst|$dst, $src}", + "and{l}\t{$src, $dst|$dst, $src}", [(store (and (loadi32 addr:$dst), imm:$src), addr:$dst)]>; def AND16mi8 : Ii8<0x83, MRM4m, (outs), (ins i16mem:$dst, i16i8imm :$src), - "and{w} {$src, $dst|$dst, $src}", + "and{w}\t{$src, $dst|$dst, $src}", [(store (and (load addr:$dst), i16immSExt8:$src), addr:$dst)]>, OpSize; def AND32mi8 : Ii8<0x83, MRM4m, (outs), (ins i32mem:$dst, i32i8imm :$src), - "and{l} {$src, $dst|$dst, $src}", + "and{l}\t{$src, $dst|$dst, $src}", [(store (and (load addr:$dst), i32immSExt8:$src), addr:$dst)]>; } let isCommutable = 1 in { // X = OR Y, Z --> X = OR Z, Y def OR8rr : I<0x08, MRMDestReg, (outs GR8 :$dst), (ins GR8 :$src1, GR8 :$src2), - "or{b} {$src2, $dst|$dst, $src2}", + "or{b}\t{$src2, $dst|$dst, $src2}", [(set GR8:$dst, (or GR8:$src1, GR8:$src2))]>; def OR16rr : I<0x09, MRMDestReg, (outs GR16:$dst), (ins GR16:$src1, GR16:$src2), - "or{w} {$src2, $dst|$dst, $src2}", + "or{w}\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (or GR16:$src1, GR16:$src2))]>, OpSize; def OR32rr : I<0x09, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2), - "or{l} {$src2, $dst|$dst, $src2}", + "or{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (or GR32:$src1, GR32:$src2))]>; } def OR8rm : I<0x0A, MRMSrcMem , (outs GR8 :$dst), (ins GR8 :$src1, i8mem :$src2), - "or{b} {$src2, $dst|$dst, $src2}", + "or{b}\t{$src2, $dst|$dst, $src2}", [(set GR8:$dst, (or GR8:$src1, (load addr:$src2)))]>; def OR16rm : I<0x0B, MRMSrcMem , (outs GR16:$dst), (ins GR16:$src1, i16mem:$src2), - "or{w} {$src2, $dst|$dst, $src2}", + "or{w}\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (or GR16:$src1, (load addr:$src2)))]>, OpSize; def OR32rm : I<0x0B, MRMSrcMem , (outs GR32:$dst), (ins GR32:$src1, i32mem:$src2), - "or{l} {$src2, $dst|$dst, $src2}", + "or{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (or GR32:$src1, (load addr:$src2)))]>; def OR8ri : Ii8 <0x80, MRM1r, (outs GR8 :$dst), (ins GR8 :$src1, i8imm:$src2), - "or{b} {$src2, $dst|$dst, $src2}", + "or{b}\t{$src2, $dst|$dst, $src2}", [(set GR8:$dst, (or GR8:$src1, imm:$src2))]>; def OR16ri : Ii16<0x81, MRM1r, (outs GR16:$dst), (ins GR16:$src1, i16imm:$src2), - "or{w} {$src2, $dst|$dst, $src2}", + "or{w}\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (or GR16:$src1, imm:$src2))]>, OpSize; def OR32ri : Ii32<0x81, MRM1r, (outs GR32:$dst), (ins GR32:$src1, i32imm:$src2), - "or{l} {$src2, $dst|$dst, $src2}", + "or{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (or GR32:$src1, imm:$src2))]>; def OR16ri8 : Ii8<0x83, MRM1r, (outs GR16:$dst), (ins GR16:$src1, i16i8imm:$src2), - "or{w} {$src2, $dst|$dst, $src2}", + "or{w}\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (or GR16:$src1, i16immSExt8:$src2))]>, OpSize; def OR32ri8 : Ii8<0x83, MRM1r, (outs GR32:$dst), (ins GR32:$src1, i32i8imm:$src2), - "or{l} {$src2, $dst|$dst, $src2}", + "or{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (or GR32:$src1, i32immSExt8:$src2))]>; let isTwoAddress = 0 in { def OR8mr : I<0x08, MRMDestMem, (outs), (ins i8mem:$dst, GR8:$src), - "or{b} {$src, $dst|$dst, $src}", + "or{b}\t{$src, $dst|$dst, $src}", [(store (or (load addr:$dst), GR8:$src), addr:$dst)]>; def OR16mr : I<0x09, MRMDestMem, (outs), (ins i16mem:$dst, GR16:$src), - "or{w} {$src, $dst|$dst, $src}", + "or{w}\t{$src, $dst|$dst, $src}", [(store (or (load addr:$dst), GR16:$src), addr:$dst)]>, OpSize; def OR32mr : I<0x09, MRMDestMem, (outs), (ins i32mem:$dst, GR32:$src), - "or{l} {$src, $dst|$dst, $src}", + "or{l}\t{$src, $dst|$dst, $src}", [(store (or (load addr:$dst), GR32:$src), addr:$dst)]>; def OR8mi : Ii8<0x80, MRM1m, (outs), (ins i8mem :$dst, i8imm:$src), - "or{b} {$src, $dst|$dst, $src}", + "or{b}\t{$src, $dst|$dst, $src}", [(store (or (loadi8 addr:$dst), imm:$src), addr:$dst)]>; def OR16mi : Ii16<0x81, MRM1m, (outs), (ins i16mem:$dst, i16imm:$src), - "or{w} {$src, $dst|$dst, $src}", + "or{w}\t{$src, $dst|$dst, $src}", [(store (or (loadi16 addr:$dst), imm:$src), addr:$dst)]>, OpSize; def OR32mi : Ii32<0x81, MRM1m, (outs), (ins i32mem:$dst, i32imm:$src), - "or{l} {$src, $dst|$dst, $src}", + "or{l}\t{$src, $dst|$dst, $src}", [(store (or (loadi32 addr:$dst), imm:$src), addr:$dst)]>; def OR16mi8 : Ii8<0x83, MRM1m, (outs), (ins i16mem:$dst, i16i8imm:$src), - "or{w} {$src, $dst|$dst, $src}", + "or{w}\t{$src, $dst|$dst, $src}", [(store (or (load addr:$dst), i16immSExt8:$src), addr:$dst)]>, OpSize; def OR32mi8 : Ii8<0x83, MRM1m, (outs), (ins i32mem:$dst, i32i8imm:$src), - "or{l} {$src, $dst|$dst, $src}", + "or{l}\t{$src, $dst|$dst, $src}", [(store (or (load addr:$dst), i32immSExt8:$src), addr:$dst)]>; } @@ -1201,429 +1201,429 @@ let isCommutable = 1 in { // X = XOR Y, Z --> X = XOR Z, Y def XOR8rr : I<0x30, MRMDestReg, (outs GR8 :$dst), (ins GR8 :$src1, GR8 :$src2), - "xor{b} {$src2, $dst|$dst, $src2}", + "xor{b}\t{$src2, $dst|$dst, $src2}", [(set GR8:$dst, (xor GR8:$src1, GR8:$src2))]>; def XOR16rr : I<0x31, MRMDestReg, (outs GR16:$dst), (ins GR16:$src1, GR16:$src2), - "xor{w} {$src2, $dst|$dst, $src2}", + "xor{w}\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (xor GR16:$src1, GR16:$src2))]>, OpSize; def XOR32rr : I<0x31, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2), - "xor{l} {$src2, $dst|$dst, $src2}", + "xor{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (xor GR32:$src1, GR32:$src2))]>; } def XOR8rm : I<0x32, MRMSrcMem , (outs GR8 :$dst), (ins GR8:$src1, i8mem :$src2), - "xor{b} {$src2, $dst|$dst, $src2}", + "xor{b}\t{$src2, $dst|$dst, $src2}", [(set GR8:$dst, (xor GR8:$src1, (load addr:$src2)))]>; def XOR16rm : I<0x33, MRMSrcMem , (outs GR16:$dst), (ins GR16:$src1, i16mem:$src2), - "xor{w} {$src2, $dst|$dst, $src2}", + "xor{w}\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (xor GR16:$src1, (load addr:$src2)))]>, OpSize; def XOR32rm : I<0x33, MRMSrcMem , (outs GR32:$dst), (ins GR32:$src1, i32mem:$src2), - "xor{l} {$src2, $dst|$dst, $src2}", + "xor{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (xor GR32:$src1, (load addr:$src2)))]>; def XOR8ri : Ii8<0x80, MRM6r, (outs GR8:$dst), (ins GR8:$src1, i8imm:$src2), - "xor{b} {$src2, $dst|$dst, $src2}", + "xor{b}\t{$src2, $dst|$dst, $src2}", [(set GR8:$dst, (xor GR8:$src1, imm:$src2))]>; def XOR16ri : Ii16<0x81, MRM6r, (outs GR16:$dst), (ins GR16:$src1, i16imm:$src2), - "xor{w} {$src2, $dst|$dst, $src2}", + "xor{w}\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (xor GR16:$src1, imm:$src2))]>, OpSize; def XOR32ri : Ii32<0x81, MRM6r, (outs GR32:$dst), (ins GR32:$src1, i32imm:$src2), - "xor{l} {$src2, $dst|$dst, $src2}", + "xor{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (xor GR32:$src1, imm:$src2))]>; def XOR16ri8 : Ii8<0x83, MRM6r, (outs GR16:$dst), (ins GR16:$src1, i16i8imm:$src2), - "xor{w} {$src2, $dst|$dst, $src2}", + "xor{w}\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (xor GR16:$src1, i16immSExt8:$src2))]>, OpSize; def XOR32ri8 : Ii8<0x83, MRM6r, (outs GR32:$dst), (ins GR32:$src1, i32i8imm:$src2), - "xor{l} {$src2, $dst|$dst, $src2}", + "xor{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (xor GR32:$src1, i32immSExt8:$src2))]>; let isTwoAddress = 0 in { def XOR8mr : I<0x30, MRMDestMem, (outs), (ins i8mem :$dst, GR8 :$src), - "xor{b} {$src, $dst|$dst, $src}", + "xor{b}\t{$src, $dst|$dst, $src}", [(store (xor (load addr:$dst), GR8:$src), addr:$dst)]>; def XOR16mr : I<0x31, MRMDestMem, (outs), (ins i16mem:$dst, GR16:$src), - "xor{w} {$src, $dst|$dst, $src}", + "xor{w}\t{$src, $dst|$dst, $src}", [(store (xor (load addr:$dst), GR16:$src), addr:$dst)]>, OpSize; def XOR32mr : I<0x31, MRMDestMem, (outs), (ins i32mem:$dst, GR32:$src), - "xor{l} {$src, $dst|$dst, $src}", + "xor{l}\t{$src, $dst|$dst, $src}", [(store (xor (load addr:$dst), GR32:$src), addr:$dst)]>; def XOR8mi : Ii8<0x80, MRM6m, (outs), (ins i8mem :$dst, i8imm :$src), - "xor{b} {$src, $dst|$dst, $src}", + "xor{b}\t{$src, $dst|$dst, $src}", [(store (xor (loadi8 addr:$dst), imm:$src), addr:$dst)]>; def XOR16mi : Ii16<0x81, MRM6m, (outs), (ins i16mem:$dst, i16imm:$src), - "xor{w} {$src, $dst|$dst, $src}", + "xor{w}\t{$src, $dst|$dst, $src}", [(store (xor (loadi16 addr:$dst), imm:$src), addr:$dst)]>, OpSize; def XOR32mi : Ii32<0x81, MRM6m, (outs), (ins i32mem:$dst, i32imm:$src), - "xor{l} {$src, $dst|$dst, $src}", + "xor{l}\t{$src, $dst|$dst, $src}", [(store (xor (loadi32 addr:$dst), imm:$src), addr:$dst)]>; def XOR16mi8 : Ii8<0x83, MRM6m, (outs), (ins i16mem:$dst, i16i8imm :$src), - "xor{w} {$src, $dst|$dst, $src}", + "xor{w}\t{$src, $dst|$dst, $src}", [(store (xor (load addr:$dst), i16immSExt8:$src), addr:$dst)]>, OpSize; def XOR32mi8 : Ii8<0x83, MRM6m, (outs), (ins i32mem:$dst, i32i8imm :$src), - "xor{l} {$src, $dst|$dst, $src}", + "xor{l}\t{$src, $dst|$dst, $src}", [(store (xor (load addr:$dst), i32immSExt8:$src), addr:$dst)]>; } // Shift instructions def SHL8rCL : I<0xD2, MRM4r, (outs GR8 :$dst), (ins GR8 :$src), - "shl{b} {%cl, $dst|$dst, %CL}", + "shl{b}\t{%cl, $dst|$dst, %CL}", [(set GR8:$dst, (shl GR8:$src, CL))]>, Imp<[CL],[]>; def SHL16rCL : I<0xD3, MRM4r, (outs GR16:$dst), (ins GR16:$src), - "shl{w} {%cl, $dst|$dst, %CL}", + "shl{w}\t{%cl, $dst|$dst, %CL}", [(set GR16:$dst, (shl GR16:$src, CL))]>, Imp<[CL],[]>, OpSize; def SHL32rCL : I<0xD3, MRM4r, (outs GR32:$dst), (ins GR32:$src), - "shl{l} {%cl, $dst|$dst, %CL}", + "shl{l}\t{%cl, $dst|$dst, %CL}", [(set GR32:$dst, (shl GR32:$src, CL))]>, Imp<[CL],[]>; def SHL8ri : Ii8<0xC0, MRM4r, (outs GR8 :$dst), (ins GR8 :$src1, i8imm:$src2), - "shl{b} {$src2, $dst|$dst, $src2}", + "shl{b}\t{$src2, $dst|$dst, $src2}", [(set GR8:$dst, (shl GR8:$src1, (i8 imm:$src2)))]>; let isConvertibleToThreeAddress = 1 in { // Can transform into LEA. def SHL16ri : Ii8<0xC1, MRM4r, (outs GR16:$dst), (ins GR16:$src1, i8imm:$src2), - "shl{w} {$src2, $dst|$dst, $src2}", + "shl{w}\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (shl GR16:$src1, (i8 imm:$src2)))]>, OpSize; def SHL32ri : Ii8<0xC1, MRM4r, (outs GR32:$dst), (ins GR32:$src1, i8imm:$src2), - "shl{l} {$src2, $dst|$dst, $src2}", + "shl{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (shl GR32:$src1, (i8 imm:$src2)))]>; } // Shift left by one. Not used because (add x, x) is slightly cheaper. def SHL8r1 : I<0xD0, MRM4r, (outs GR8 :$dst), (ins GR8 :$src1), - "shl{b} $dst", []>; + "shl{b}\t$dst", []>; def SHL16r1 : I<0xD1, MRM4r, (outs GR16:$dst), (ins GR16:$src1), - "shl{w} $dst", []>, OpSize; + "shl{w}\t$dst", []>, OpSize; def SHL32r1 : I<0xD1, MRM4r, (outs GR32:$dst), (ins GR32:$src1), - "shl{l} $dst", []>; + "shl{l}\t$dst", []>; let isTwoAddress = 0 in { def SHL8mCL : I<0xD2, MRM4m, (outs), (ins i8mem :$dst), - "shl{b} {%cl, $dst|$dst, %CL}", + "shl{b}\t{%cl, $dst|$dst, %CL}", [(store (shl (loadi8 addr:$dst), CL), addr:$dst)]>, Imp<[CL],[]>; def SHL16mCL : I<0xD3, MRM4m, (outs), (ins i16mem:$dst), - "shl{w} {%cl, $dst|$dst, %CL}", + "shl{w}\t{%cl, $dst|$dst, %CL}", [(store (shl (loadi16 addr:$dst), CL), addr:$dst)]>, Imp<[CL],[]>, OpSize; def SHL32mCL : I<0xD3, MRM4m, (outs), (ins i32mem:$dst), - "shl{l} {%cl, $dst|$dst, %CL}", + "shl{l}\t{%cl, $dst|$dst, %CL}", [(store (shl (loadi32 addr:$dst), CL), addr:$dst)]>, Imp<[CL],[]>; def SHL8mi : Ii8<0xC0, MRM4m, (outs), (ins i8mem :$dst, i8imm:$src), - "shl{b} {$src, $dst|$dst, $src}", + "shl{b}\t{$src, $dst|$dst, $src}", [(store (shl (loadi8 addr:$dst), (i8 imm:$src)), addr:$dst)]>; def SHL16mi : Ii8<0xC1, MRM4m, (outs), (ins i16mem:$dst, i8imm:$src), - "shl{w} {$src, $dst|$dst, $src}", + "shl{w}\t{$src, $dst|$dst, $src}", [(store (shl (loadi16 addr:$dst), (i8 imm:$src)), addr:$dst)]>, OpSize; def SHL32mi : Ii8<0xC1, MRM4m, (outs), (ins i32mem:$dst, i8imm:$src), - "shl{l} {$src, $dst|$dst, $src}", + "shl{l}\t{$src, $dst|$dst, $src}", [(store (shl (loadi32 addr:$dst), (i8 imm:$src)), addr:$dst)]>; // Shift by 1 def SHL8m1 : I<0xD0, MRM4m, (outs), (ins i8mem :$dst), - "shl{b} $dst", + "shl{b}\t$dst", [(store (shl (loadi8 addr:$dst), (i8 1)), addr:$dst)]>; def SHL16m1 : I<0xD1, MRM4m, (outs), (ins i16mem:$dst), - "shl{w} $dst", + "shl{w}\t$dst", [(store (shl (loadi16 addr:$dst), (i8 1)), addr:$dst)]>, OpSize; def SHL32m1 : I<0xD1, MRM4m, (outs), (ins i32mem:$dst), - "shl{l} $dst", + "shl{l}\t$dst", [(store (shl (loadi32 addr:$dst), (i8 1)), addr:$dst)]>; } def SHR8rCL : I<0xD2, MRM5r, (outs GR8 :$dst), (ins GR8 :$src), - "shr{b} {%cl, $dst|$dst, %CL}", + "shr{b}\t{%cl, $dst|$dst, %CL}", [(set GR8:$dst, (srl GR8:$src, CL))]>, Imp<[CL],[]>; def SHR16rCL : I<0xD3, MRM5r, (outs GR16:$dst), (ins GR16:$src), - "shr{w} {%cl, $dst|$dst, %CL}", + "shr{w}\t{%cl, $dst|$dst, %CL}", [(set GR16:$dst, (srl GR16:$src, CL))]>, Imp<[CL],[]>, OpSize; def SHR32rCL : I<0xD3, MRM5r, (outs GR32:$dst), (ins GR32:$src), - "shr{l} {%cl, $dst|$dst, %CL}", + "shr{l}\t{%cl, $dst|$dst, %CL}", [(set GR32:$dst, (srl GR32:$src, CL))]>, Imp<[CL],[]>; def SHR8ri : Ii8<0xC0, MRM5r, (outs GR8:$dst), (ins GR8:$src1, i8imm:$src2), - "shr{b} {$src2, $dst|$dst, $src2}", + "shr{b}\t{$src2, $dst|$dst, $src2}", [(set GR8:$dst, (srl GR8:$src1, (i8 imm:$src2)))]>; def SHR16ri : Ii8<0xC1, MRM5r, (outs GR16:$dst), (ins GR16:$src1, i8imm:$src2), - "shr{w} {$src2, $dst|$dst, $src2}", + "shr{w}\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (srl GR16:$src1, (i8 imm:$src2)))]>, OpSize; def SHR32ri : Ii8<0xC1, MRM5r, (outs GR32:$dst), (ins GR32:$src1, i8imm:$src2), - "shr{l} {$src2, $dst|$dst, $src2}", + "shr{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (srl GR32:$src1, (i8 imm:$src2)))]>; // Shift by 1 def SHR8r1 : I<0xD0, MRM5r, (outs GR8:$dst), (ins GR8:$src1), - "shr{b} $dst", + "shr{b}\t$dst", [(set GR8:$dst, (srl GR8:$src1, (i8 1)))]>; def SHR16r1 : I<0xD1, MRM5r, (outs GR16:$dst), (ins GR16:$src1), - "shr{w} $dst", + "shr{w}\t$dst", [(set GR16:$dst, (srl GR16:$src1, (i8 1)))]>, OpSize; def SHR32r1 : I<0xD1, MRM5r, (outs GR32:$dst), (ins GR32:$src1), - "shr{l} $dst", + "shr{l}\t$dst", [(set GR32:$dst, (srl GR32:$src1, (i8 1)))]>; let isTwoAddress = 0 in { def SHR8mCL : I<0xD2, MRM5m, (outs), (ins i8mem :$dst), - "shr{b} {%cl, $dst|$dst, %CL}", + "shr{b}\t{%cl, $dst|$dst, %CL}", [(store (srl (loadi8 addr:$dst), CL), addr:$dst)]>, Imp<[CL],[]>; def SHR16mCL : I<0xD3, MRM5m, (outs), (ins i16mem:$dst), - "shr{w} {%cl, $dst|$dst, %CL}", + "shr{w}\t{%cl, $dst|$dst, %CL}", [(store (srl (loadi16 addr:$dst), CL), addr:$dst)]>, Imp<[CL],[]>, OpSize; def SHR32mCL : I<0xD3, MRM5m, (outs), (ins i32mem:$dst), - "shr{l} {%cl, $dst|$dst, %CL}", + "shr{l}\t{%cl, $dst|$dst, %CL}", [(store (srl (loadi32 addr:$dst), CL), addr:$dst)]>, Imp<[CL],[]>; def SHR8mi : Ii8<0xC0, MRM5m, (outs), (ins i8mem :$dst, i8imm:$src), - "shr{b} {$src, $dst|$dst, $src}", + "shr{b}\t{$src, $dst|$dst, $src}", [(store (srl (loadi8 addr:$dst), (i8 imm:$src)), addr:$dst)]>; def SHR16mi : Ii8<0xC1, MRM5m, (outs), (ins i16mem:$dst, i8imm:$src), - "shr{w} {$src, $dst|$dst, $src}", + "shr{w}\t{$src, $dst|$dst, $src}", [(store (srl (loadi16 addr:$dst), (i8 imm:$src)), addr:$dst)]>, OpSize; def SHR32mi : Ii8<0xC1, MRM5m, (outs), (ins i32mem:$dst, i8imm:$src), - "shr{l} {$src, $dst|$dst, $src}", + "shr{l}\t{$src, $dst|$dst, $src}", [(store (srl (loadi32 addr:$dst), (i8 imm:$src)), addr:$dst)]>; // Shift by 1 def SHR8m1 : I<0xD0, MRM5m, (outs), (ins i8mem :$dst), - "shr{b} $dst", + "shr{b}\t$dst", [(store (srl (loadi8 addr:$dst), (i8 1)), addr:$dst)]>; def SHR16m1 : I<0xD1, MRM5m, (outs), (ins i16mem:$dst), - "shr{w} $dst", + "shr{w}\t$dst", [(store (srl (loadi16 addr:$dst), (i8 1)), addr:$dst)]>,OpSize; def SHR32m1 : I<0xD1, MRM5m, (outs), (ins i32mem:$dst), - "shr{l} $dst", + "shr{l}\t$dst", [(store (srl (loadi32 addr:$dst), (i8 1)), addr:$dst)]>; } def SAR8rCL : I<0xD2, MRM7r, (outs GR8 :$dst), (ins GR8 :$src), - "sar{b} {%cl, $dst|$dst, %CL}", + "sar{b}\t{%cl, $dst|$dst, %CL}", [(set GR8:$dst, (sra GR8:$src, CL))]>, Imp<[CL],[]>; def SAR16rCL : I<0xD3, MRM7r, (outs GR16:$dst), (ins GR16:$src), - "sar{w} {%cl, $dst|$dst, %CL}", + "sar{w}\t{%cl, $dst|$dst, %CL}", [(set GR16:$dst, (sra GR16:$src, CL))]>, Imp<[CL],[]>, OpSize; def SAR32rCL : I<0xD3, MRM7r, (outs GR32:$dst), (ins GR32:$src), - "sar{l} {%cl, $dst|$dst, %CL}", + "sar{l}\t{%cl, $dst|$dst, %CL}", [(set GR32:$dst, (sra GR32:$src, CL))]>, Imp<[CL],[]>; def SAR8ri : Ii8<0xC0, MRM7r, (outs GR8 :$dst), (ins GR8 :$src1, i8imm:$src2), - "sar{b} {$src2, $dst|$dst, $src2}", + "sar{b}\t{$src2, $dst|$dst, $src2}", [(set GR8:$dst, (sra GR8:$src1, (i8 imm:$src2)))]>; def SAR16ri : Ii8<0xC1, MRM7r, (outs GR16:$dst), (ins GR16:$src1, i8imm:$src2), - "sar{w} {$src2, $dst|$dst, $src2}", + "sar{w}\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (sra GR16:$src1, (i8 imm:$src2)))]>, OpSize; def SAR32ri : Ii8<0xC1, MRM7r, (outs GR32:$dst), (ins GR32:$src1, i8imm:$src2), - "sar{l} {$src2, $dst|$dst, $src2}", + "sar{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (sra GR32:$src1, (i8 imm:$src2)))]>; // Shift by 1 def SAR8r1 : I<0xD0, MRM7r, (outs GR8 :$dst), (ins GR8 :$src1), - "sar{b} $dst", + "sar{b}\t$dst", [(set GR8:$dst, (sra GR8:$src1, (i8 1)))]>; def SAR16r1 : I<0xD1, MRM7r, (outs GR16:$dst), (ins GR16:$src1), - "sar{w} $dst", + "sar{w}\t$dst", [(set GR16:$dst, (sra GR16:$src1, (i8 1)))]>, OpSize; def SAR32r1 : I<0xD1, MRM7r, (outs GR32:$dst), (ins GR32:$src1), - "sar{l} $dst", + "sar{l}\t$dst", [(set GR32:$dst, (sra GR32:$src1, (i8 1)))]>; let isTwoAddress = 0 in { def SAR8mCL : I<0xD2, MRM7m, (outs), (ins i8mem :$dst), - "sar{b} {%cl, $dst|$dst, %CL}", + "sar{b}\t{%cl, $dst|$dst, %CL}", [(store (sra (loadi8 addr:$dst), CL), addr:$dst)]>, Imp<[CL],[]>; def SAR16mCL : I<0xD3, MRM7m, (outs), (ins i16mem:$dst), - "sar{w} {%cl, $dst|$dst, %CL}", + "sar{w}\t{%cl, $dst|$dst, %CL}", [(store (sra (loadi16 addr:$dst), CL), addr:$dst)]>, Imp<[CL],[]>, OpSize; def SAR32mCL : I<0xD3, MRM7m, (outs), (ins i32mem:$dst), - "sar{l} {%cl, $dst|$dst, %CL}", + "sar{l}\t{%cl, $dst|$dst, %CL}", [(store (sra (loadi32 addr:$dst), CL), addr:$dst)]>, Imp<[CL],[]>; def SAR8mi : Ii8<0xC0, MRM7m, (outs), (ins i8mem :$dst, i8imm:$src), - "sar{b} {$src, $dst|$dst, $src}", + "sar{b}\t{$src, $dst|$dst, $src}", [(store (sra (loadi8 addr:$dst), (i8 imm:$src)), addr:$dst)]>; def SAR16mi : Ii8<0xC1, MRM7m, (outs), (ins i16mem:$dst, i8imm:$src), - "sar{w} {$src, $dst|$dst, $src}", + "sar{w}\t{$src, $dst|$dst, $src}", [(store (sra (loadi16 addr:$dst), (i8 imm:$src)), addr:$dst)]>, OpSize; def SAR32mi : Ii8<0xC1, MRM7m, (outs), (ins i32mem:$dst, i8imm:$src), - "sar{l} {$src, $dst|$dst, $src}", + "sar{l}\t{$src, $dst|$dst, $src}", [(store (sra (loadi32 addr:$dst), (i8 imm:$src)), addr:$dst)]>; // Shift by 1 def SAR8m1 : I<0xD0, MRM7m, (outs), (ins i8mem :$dst), - "sar{b} $dst", + "sar{b}\t$dst", [(store (sra (loadi8 addr:$dst), (i8 1)), addr:$dst)]>; def SAR16m1 : I<0xD1, MRM7m, (outs), (ins i16mem:$dst), - "sar{w} $dst", + "sar{w}\t$dst", [(store (sra (loadi16 addr:$dst), (i8 1)), addr:$dst)]>, OpSize; def SAR32m1 : I<0xD1, MRM7m, (outs), (ins i32mem:$dst), - "sar{l} $dst", + "sar{l}\t$dst", [(store (sra (loadi32 addr:$dst), (i8 1)), addr:$dst)]>; } // Rotate instructions // FIXME: provide shorter instructions when imm8 == 1 def ROL8rCL : I<0xD2, MRM0r, (outs GR8 :$dst), (ins GR8 :$src), - "rol{b} {%cl, $dst|$dst, %CL}", + "rol{b}\t{%cl, $dst|$dst, %CL}", [(set GR8:$dst, (rotl GR8:$src, CL))]>, Imp<[CL],[]>; def ROL16rCL : I<0xD3, MRM0r, (outs GR16:$dst), (ins GR16:$src), - "rol{w} {%cl, $dst|$dst, %CL}", + "rol{w}\t{%cl, $dst|$dst, %CL}", [(set GR16:$dst, (rotl GR16:$src, CL))]>, Imp<[CL],[]>, OpSize; def ROL32rCL : I<0xD3, MRM0r, (outs GR32:$dst), (ins GR32:$src), - "rol{l} {%cl, $dst|$dst, %CL}", + "rol{l}\t{%cl, $dst|$dst, %CL}", [(set GR32:$dst, (rotl GR32:$src, CL))]>, Imp<[CL],[]>; def ROL8ri : Ii8<0xC0, MRM0r, (outs GR8 :$dst), (ins GR8 :$src1, i8imm:$src2), - "rol{b} {$src2, $dst|$dst, $src2}", + "rol{b}\t{$src2, $dst|$dst, $src2}", [(set GR8:$dst, (rotl GR8:$src1, (i8 imm:$src2)))]>; def ROL16ri : Ii8<0xC1, MRM0r, (outs GR16:$dst), (ins GR16:$src1, i8imm:$src2), - "rol{w} {$src2, $dst|$dst, $src2}", + "rol{w}\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (rotl GR16:$src1, (i8 imm:$src2)))]>, OpSize; def ROL32ri : Ii8<0xC1, MRM0r, (outs GR32:$dst), (ins GR32:$src1, i8imm:$src2), - "rol{l} {$src2, $dst|$dst, $src2}", + "rol{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (rotl GR32:$src1, (i8 imm:$src2)))]>; // Rotate by 1 def ROL8r1 : I<0xD0, MRM0r, (outs GR8 :$dst), (ins GR8 :$src1), - "rol{b} $dst", + "rol{b}\t$dst", [(set GR8:$dst, (rotl GR8:$src1, (i8 1)))]>; def ROL16r1 : I<0xD1, MRM0r, (outs GR16:$dst), (ins GR16:$src1), - "rol{w} $dst", + "rol{w}\t$dst", [(set GR16:$dst, (rotl GR16:$src1, (i8 1)))]>, OpSize; def ROL32r1 : I<0xD1, MRM0r, (outs GR32:$dst), (ins GR32:$src1), - "rol{l} $dst", + "rol{l}\t$dst", [(set GR32:$dst, (rotl GR32:$src1, (i8 1)))]>; let isTwoAddress = 0 in { def ROL8mCL : I<0xD2, MRM0m, (outs), (ins i8mem :$dst), - "rol{b} {%cl, $dst|$dst, %CL}", + "rol{b}\t{%cl, $dst|$dst, %CL}", [(store (rotl (loadi8 addr:$dst), CL), addr:$dst)]>, Imp<[CL],[]>; def ROL16mCL : I<0xD3, MRM0m, (outs), (ins i16mem:$dst), - "rol{w} {%cl, $dst|$dst, %CL}", + "rol{w}\t{%cl, $dst|$dst, %CL}", [(store (rotl (loadi16 addr:$dst), CL), addr:$dst)]>, Imp<[CL],[]>, OpSize; def ROL32mCL : I<0xD3, MRM0m, (outs), (ins i32mem:$dst), - "rol{l} {%cl, $dst|$dst, %CL}", + "rol{l}\t{%cl, $dst|$dst, %CL}", [(store (rotl (loadi32 addr:$dst), CL), addr:$dst)]>, Imp<[CL],[]>; def ROL8mi : Ii8<0xC0, MRM0m, (outs), (ins i8mem :$dst, i8imm:$src), - "rol{b} {$src, $dst|$dst, $src}", + "rol{b}\t{$src, $dst|$dst, $src}", [(store (rotl (loadi8 addr:$dst), (i8 imm:$src)), addr:$dst)]>; def ROL16mi : Ii8<0xC1, MRM0m, (outs), (ins i16mem:$dst, i8imm:$src), - "rol{w} {$src, $dst|$dst, $src}", + "rol{w}\t{$src, $dst|$dst, $src}", [(store (rotl (loadi16 addr:$dst), (i8 imm:$src)), addr:$dst)]>, OpSize; def ROL32mi : Ii8<0xC1, MRM0m, (outs), (ins i32mem:$dst, i8imm:$src), - "rol{l} {$src, $dst|$dst, $src}", + "rol{l}\t{$src, $dst|$dst, $src}", [(store (rotl (loadi32 addr:$dst), (i8 imm:$src)), addr:$dst)]>; // Rotate by 1 def ROL8m1 : I<0xD0, MRM0m, (outs), (ins i8mem :$dst), - "rol{b} $dst", + "rol{b}\t$dst", [(store (rotl (loadi8 addr:$dst), (i8 1)), addr:$dst)]>; def ROL16m1 : I<0xD1, MRM0m, (outs), (ins i16mem:$dst), - "rol{w} $dst", + "rol{w}\t$dst", [(store (rotl (loadi16 addr:$dst), (i8 1)), addr:$dst)]>, OpSize; def ROL32m1 : I<0xD1, MRM0m, (outs), (ins i32mem:$dst), - "rol{l} $dst", + "rol{l}\t$dst", [(store (rotl (loadi32 addr:$dst), (i8 1)), addr:$dst)]>; } def ROR8rCL : I<0xD2, MRM1r, (outs GR8 :$dst), (ins GR8 :$src), - "ror{b} {%cl, $dst|$dst, %CL}", + "ror{b}\t{%cl, $dst|$dst, %CL}", [(set GR8:$dst, (rotr GR8:$src, CL))]>, Imp<[CL],[]>; def ROR16rCL : I<0xD3, MRM1r, (outs GR16:$dst), (ins GR16:$src), - "ror{w} {%cl, $dst|$dst, %CL}", + "ror{w}\t{%cl, $dst|$dst, %CL}", [(set GR16:$dst, (rotr GR16:$src, CL))]>, Imp<[CL],[]>, OpSize; def ROR32rCL : I<0xD3, MRM1r, (outs GR32:$dst), (ins GR32:$src), - "ror{l} {%cl, $dst|$dst, %CL}", + "ror{l}\t{%cl, $dst|$dst, %CL}", [(set GR32:$dst, (rotr GR32:$src, CL))]>, Imp<[CL],[]>; def ROR8ri : Ii8<0xC0, MRM1r, (outs GR8 :$dst), (ins GR8 :$src1, i8imm:$src2), - "ror{b} {$src2, $dst|$dst, $src2}", + "ror{b}\t{$src2, $dst|$dst, $src2}", [(set GR8:$dst, (rotr GR8:$src1, (i8 imm:$src2)))]>; def ROR16ri : Ii8<0xC1, MRM1r, (outs GR16:$dst), (ins GR16:$src1, i8imm:$src2), - "ror{w} {$src2, $dst|$dst, $src2}", + "ror{w}\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (rotr GR16:$src1, (i8 imm:$src2)))]>, OpSize; def ROR32ri : Ii8<0xC1, MRM1r, (outs GR32:$dst), (ins GR32:$src1, i8imm:$src2), - "ror{l} {$src2, $dst|$dst, $src2}", + "ror{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (rotr GR32:$src1, (i8 imm:$src2)))]>; // Rotate by 1 def ROR8r1 : I<0xD0, MRM1r, (outs GR8 :$dst), (ins GR8 :$src1), - "ror{b} $dst", + "ror{b}\t$dst", [(set GR8:$dst, (rotr GR8:$src1, (i8 1)))]>; def ROR16r1 : I<0xD1, MRM1r, (outs GR16:$dst), (ins GR16:$src1), - "ror{w} $dst", + "ror{w}\t$dst", [(set GR16:$dst, (rotr GR16:$src1, (i8 1)))]>, OpSize; def ROR32r1 : I<0xD1, MRM1r, (outs GR32:$dst), (ins GR32:$src1), - "ror{l} $dst", + "ror{l}\t$dst", [(set GR32:$dst, (rotr GR32:$src1, (i8 1)))]>; let isTwoAddress = 0 in { def ROR8mCL : I<0xD2, MRM1m, (outs), (ins i8mem :$dst), - "ror{b} {%cl, $dst|$dst, %CL}", + "ror{b}\t{%cl, $dst|$dst, %CL}", [(store (rotr (loadi8 addr:$dst), CL), addr:$dst)]>, Imp<[CL],[]>; def ROR16mCL : I<0xD3, MRM1m, (outs), (ins i16mem:$dst), - "ror{w} {%cl, $dst|$dst, %CL}", + "ror{w}\t{%cl, $dst|$dst, %CL}", [(store (rotr (loadi16 addr:$dst), CL), addr:$dst)]>, Imp<[CL],[]>, OpSize; def ROR32mCL : I<0xD3, MRM1m, (outs), (ins i32mem:$dst), - "ror{l} {%cl, $dst|$dst, %CL}", + "ror{l}\t{%cl, $dst|$dst, %CL}", [(store (rotr (loadi32 addr:$dst), CL), addr:$dst)]>, Imp<[CL],[]>; def ROR8mi : Ii8<0xC0, MRM1m, (outs), (ins i8mem :$dst, i8imm:$src), - "ror{b} {$src, $dst|$dst, $src}", + "ror{b}\t{$src, $dst|$dst, $src}", [(store (rotr (loadi8 addr:$dst), (i8 imm:$src)), addr:$dst)]>; def ROR16mi : Ii8<0xC1, MRM1m, (outs), (ins i16mem:$dst, i8imm:$src), - "ror{w} {$src, $dst|$dst, $src}", + "ror{w}\t{$src, $dst|$dst, $src}", [(store (rotr (loadi16 addr:$dst), (i8 imm:$src)), addr:$dst)]>, OpSize; def ROR32mi : Ii8<0xC1, MRM1m, (outs), (ins i32mem:$dst, i8imm:$src), - "ror{l} {$src, $dst|$dst, $src}", + "ror{l}\t{$src, $dst|$dst, $src}", [(store (rotr (loadi32 addr:$dst), (i8 imm:$src)), addr:$dst)]>; // Rotate by 1 def ROR8m1 : I<0xD0, MRM1m, (outs), (ins i8mem :$dst), - "ror{b} $dst", + "ror{b}\t$dst", [(store (rotr (loadi8 addr:$dst), (i8 1)), addr:$dst)]>; def ROR16m1 : I<0xD1, MRM1m, (outs), (ins i16mem:$dst), - "ror{w} $dst", + "ror{w}\t$dst", [(store (rotr (loadi16 addr:$dst), (i8 1)), addr:$dst)]>, OpSize; def ROR32m1 : I<0xD1, MRM1m, (outs), (ins i32mem:$dst), - "ror{l} $dst", + "ror{l}\t$dst", [(store (rotr (loadi32 addr:$dst), (i8 1)), addr:$dst)]>; } @@ -1631,44 +1631,44 @@ // Double shift instructions (generalizations of rotate) def SHLD32rrCL : I<0xA5, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2), - "shld{l} {%cl, $src2, $dst|$dst, $src2, %CL}", + "shld{l}\t{%cl, $src2, $dst|$dst, $src2, %CL}", [(set GR32:$dst, (X86shld GR32:$src1, GR32:$src2, CL))]>, Imp<[CL],[]>, TB; def SHRD32rrCL : I<0xAD, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2), - "shrd{l} {%cl, $src2, $dst|$dst, $src2, %CL}", + "shrd{l}\t{%cl, $src2, $dst|$dst, $src2, %CL}", [(set GR32:$dst, (X86shrd GR32:$src1, GR32:$src2, CL))]>, Imp<[CL],[]>, TB; def SHLD16rrCL : I<0xA5, MRMDestReg, (outs GR16:$dst), (ins GR16:$src1, GR16:$src2), - "shld{w} {%cl, $src2, $dst|$dst, $src2, %CL}", + "shld{w}\t{%cl, $src2, $dst|$dst, $src2, %CL}", [(set GR16:$dst, (X86shld GR16:$src1, GR16:$src2, CL))]>, Imp<[CL],[]>, TB, OpSize; def SHRD16rrCL : I<0xAD, MRMDestReg, (outs GR16:$dst), (ins GR16:$src1, GR16:$src2), - "shrd{w} {%cl, $src2, $dst|$dst, $src2, %CL}", + "shrd{w}\t{%cl, $src2, $dst|$dst, $src2, %CL}", [(set GR16:$dst, (X86shrd GR16:$src1, GR16:$src2, CL))]>, Imp<[CL],[]>, TB, OpSize; let isCommutable = 1 in { // These instructions commute to each other. def SHLD32rri8 : Ii8<0xA4, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2, i8imm:$src3), - "shld{l} {$src3, $src2, $dst|$dst, $src2, $src3}", + "shld{l}\t{$src3, $src2, $dst|$dst, $src2, $src3}", [(set GR32:$dst, (X86shld GR32:$src1, GR32:$src2, (i8 imm:$src3)))]>, TB; def SHRD32rri8 : Ii8<0xAC, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2, i8imm:$src3), - "shrd{l} {$src3, $src2, $dst|$dst, $src2, $src3}", + "shrd{l}\t{$src3, $src2, $dst|$dst, $src2, $src3}", [(set GR32:$dst, (X86shrd GR32:$src1, GR32:$src2, (i8 imm:$src3)))]>, TB; def SHLD16rri8 : Ii8<0xA4, MRMDestReg, (outs GR16:$dst), (ins GR16:$src1, GR16:$src2, i8imm:$src3), - "shld{w} {$src3, $src2, $dst|$dst, $src2, $src3}", + "shld{w}\t{$src3, $src2, $dst|$dst, $src2, $src3}", [(set GR16:$dst, (X86shld GR16:$src1, GR16:$src2, (i8 imm:$src3)))]>, TB, OpSize; def SHRD16rri8 : Ii8<0xAC, MRMDestReg, (outs GR16:$dst), (ins GR16:$src1, GR16:$src2, i8imm:$src3), - "shrd{w} {$src3, $src2, $dst|$dst, $src2, $src3}", + "shrd{w}\t{$src3, $src2, $dst|$dst, $src2, $src3}", [(set GR16:$dst, (X86shrd GR16:$src1, GR16:$src2, (i8 imm:$src3)))]>, TB, OpSize; @@ -1676,47 +1676,47 @@ let isTwoAddress = 0 in { def SHLD32mrCL : I<0xA5, MRMDestMem, (outs), (ins i32mem:$dst, GR32:$src2), - "shld{l} {%cl, $src2, $dst|$dst, $src2, %CL}", + "shld{l}\t{%cl, $src2, $dst|$dst, $src2, %CL}", [(store (X86shld (loadi32 addr:$dst), GR32:$src2, CL), addr:$dst)]>, Imp<[CL],[]>, TB; def SHRD32mrCL : I<0xAD, MRMDestMem, (outs), (ins i32mem:$dst, GR32:$src2), - "shrd{l} {%cl, $src2, $dst|$dst, $src2, %CL}", + "shrd{l}\t{%cl, $src2, $dst|$dst, $src2, %CL}", [(store (X86shrd (loadi32 addr:$dst), GR32:$src2, CL), addr:$dst)]>, Imp<[CL],[]>, TB; def SHLD32mri8 : Ii8<0xA4, MRMDestMem, (outs), (ins i32mem:$dst, GR32:$src2, i8imm:$src3), - "shld{l} {$src3, $src2, $dst|$dst, $src2, $src3}", + "shld{l}\t{$src3, $src2, $dst|$dst, $src2, $src3}", [(store (X86shld (loadi32 addr:$dst), GR32:$src2, (i8 imm:$src3)), addr:$dst)]>, TB; def SHRD32mri8 : Ii8<0xAC, MRMDestMem, (outs), (ins i32mem:$dst, GR32:$src2, i8imm:$src3), - "shrd{l} {$src3, $src2, $dst|$dst, $src2, $src3}", + "shrd{l}\t{$src3, $src2, $dst|$dst, $src2, $src3}", [(store (X86shrd (loadi32 addr:$dst), GR32:$src2, (i8 imm:$src3)), addr:$dst)]>, TB; def SHLD16mrCL : I<0xA5, MRMDestMem, (outs), (ins i16mem:$dst, GR16:$src2), - "shld{w} {%cl, $src2, $dst|$dst, $src2, %CL}", + "shld{w}\t{%cl, $src2, $dst|$dst, $src2, %CL}", [(store (X86shld (loadi16 addr:$dst), GR16:$src2, CL), addr:$dst)]>, Imp<[CL],[]>, TB, OpSize; def SHRD16mrCL : I<0xAD, MRMDestMem, (outs), (ins i16mem:$dst, GR16:$src2), - "shrd{w} {%cl, $src2, $dst|$dst, $src2, %CL}", + "shrd{w}\t{%cl, $src2, $dst|$dst, $src2, %CL}", [(store (X86shrd (loadi16 addr:$dst), GR16:$src2, CL), addr:$dst)]>, Imp<[CL],[]>, TB, OpSize; def SHLD16mri8 : Ii8<0xA4, MRMDestMem, (outs), (ins i16mem:$dst, GR16:$src2, i8imm:$src3), - "shld{w} {$src3, $src2, $dst|$dst, $src2, $src3}", + "shld{w}\t{$src3, $src2, $dst|$dst, $src2, $src3}", [(store (X86shld (loadi16 addr:$dst), GR16:$src2, (i8 imm:$src3)), addr:$dst)]>, TB, OpSize; def SHRD16mri8 : Ii8<0xAC, MRMDestMem, (outs), (ins i16mem:$dst, GR16:$src2, i8imm:$src3), - "shrd{w} {$src3, $src2, $dst|$dst, $src2, $src3}", + "shrd{w}\t{$src3, $src2, $dst|$dst, $src2, $src3}", [(store (X86shrd (loadi16 addr:$dst), GR16:$src2, (i8 imm:$src3)), addr:$dst)]>, TB, OpSize; @@ -1726,211 +1726,211 @@ // Arithmetic. let isCommutable = 1 in { // X = ADD Y, Z --> X = ADD Z, Y def ADD8rr : I<0x00, MRMDestReg, (outs GR8 :$dst), (ins GR8 :$src1, GR8 :$src2), - "add{b} {$src2, $dst|$dst, $src2}", + "add{b}\t{$src2, $dst|$dst, $src2}", [(set GR8:$dst, (add GR8:$src1, GR8:$src2))]>; let isConvertibleToThreeAddress = 1 in { // Can transform into LEA. def ADD16rr : I<0x01, MRMDestReg, (outs GR16:$dst), (ins GR16:$src1, GR16:$src2), - "add{w} {$src2, $dst|$dst, $src2}", + "add{w}\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (add GR16:$src1, GR16:$src2))]>, OpSize; def ADD32rr : I<0x01, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2), - "add{l} {$src2, $dst|$dst, $src2}", + "add{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>; } // end isConvertibleToThreeAddress } // end isCommutable def ADD8rm : I<0x02, MRMSrcMem, (outs GR8 :$dst), (ins GR8 :$src1, i8mem :$src2), - "add{b} {$src2, $dst|$dst, $src2}", + "add{b}\t{$src2, $dst|$dst, $src2}", [(set GR8:$dst, (add GR8:$src1, (load addr:$src2)))]>; def ADD16rm : I<0x03, MRMSrcMem, (outs GR16:$dst), (ins GR16:$src1, i16mem:$src2), - "add{w} {$src2, $dst|$dst, $src2}", + "add{w}\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (add GR16:$src1, (load addr:$src2)))]>, OpSize; def ADD32rm : I<0x03, MRMSrcMem, (outs GR32:$dst), (ins GR32:$src1, i32mem:$src2), - "add{l} {$src2, $dst|$dst, $src2}", + "add{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (add GR32:$src1, (load addr:$src2)))]>; def ADD8ri : Ii8<0x80, MRM0r, (outs GR8:$dst), (ins GR8:$src1, i8imm:$src2), - "add{b} {$src2, $dst|$dst, $src2}", + "add{b}\t{$src2, $dst|$dst, $src2}", [(set GR8:$dst, (add GR8:$src1, imm:$src2))]>; let isConvertibleToThreeAddress = 1 in { // Can transform into LEA. def ADD16ri : Ii16<0x81, MRM0r, (outs GR16:$dst), (ins GR16:$src1, i16imm:$src2), - "add{w} {$src2, $dst|$dst, $src2}", + "add{w}\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (add GR16:$src1, imm:$src2))]>, OpSize; def ADD32ri : Ii32<0x81, MRM0r, (outs GR32:$dst), (ins GR32:$src1, i32imm:$src2), - "add{l} {$src2, $dst|$dst, $src2}", + "add{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (add GR32:$src1, imm:$src2))]>; def ADD16ri8 : Ii8<0x83, MRM0r, (outs GR16:$dst), (ins GR16:$src1, i16i8imm:$src2), - "add{w} {$src2, $dst|$dst, $src2}", + "add{w}\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (add GR16:$src1, i16immSExt8:$src2))]>, OpSize; def ADD32ri8 : Ii8<0x83, MRM0r, (outs GR32:$dst), (ins GR32:$src1, i32i8imm:$src2), - "add{l} {$src2, $dst|$dst, $src2}", + "add{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (add GR32:$src1, i32immSExt8:$src2))]>; } let isTwoAddress = 0 in { def ADD8mr : I<0x00, MRMDestMem, (outs), (ins i8mem :$dst, GR8 :$src2), - "add{b} {$src2, $dst|$dst, $src2}", + "add{b}\t{$src2, $dst|$dst, $src2}", [(store (add (load addr:$dst), GR8:$src2), addr:$dst)]>; def ADD16mr : I<0x01, MRMDestMem, (outs), (ins i16mem:$dst, GR16:$src2), - "add{w} {$src2, $dst|$dst, $src2}", + "add{w}\t{$src2, $dst|$dst, $src2}", [(store (add (load addr:$dst), GR16:$src2), addr:$dst)]>, OpSize; def ADD32mr : I<0x01, MRMDestMem, (outs), (ins i32mem:$dst, GR32:$src2), - "add{l} {$src2, $dst|$dst, $src2}", + "add{l}\t{$src2, $dst|$dst, $src2}", [(store (add (load addr:$dst), GR32:$src2), addr:$dst)]>; def ADD8mi : Ii8<0x80, MRM0m, (outs), (ins i8mem :$dst, i8imm :$src2), - "add{b} {$src2, $dst|$dst, $src2}", + "add{b}\t{$src2, $dst|$dst, $src2}", [(store (add (loadi8 addr:$dst), imm:$src2), addr:$dst)]>; def ADD16mi : Ii16<0x81, MRM0m, (outs), (ins i16mem:$dst, i16imm:$src2), - "add{w} {$src2, $dst|$dst, $src2}", + "add{w}\t{$src2, $dst|$dst, $src2}", [(store (add (loadi16 addr:$dst), imm:$src2), addr:$dst)]>, OpSize; def ADD32mi : Ii32<0x81, MRM0m, (outs), (ins i32mem:$dst, i32imm:$src2), - "add{l} {$src2, $dst|$dst, $src2}", + "add{l}\t{$src2, $dst|$dst, $src2}", [(store (add (loadi32 addr:$dst), imm:$src2), addr:$dst)]>; def ADD16mi8 : Ii8<0x83, MRM0m, (outs), (ins i16mem:$dst, i16i8imm :$src2), - "add{w} {$src2, $dst|$dst, $src2}", + "add{w}\t{$src2, $dst|$dst, $src2}", [(store (add (load addr:$dst), i16immSExt8:$src2), addr:$dst)]>, OpSize; def ADD32mi8 : Ii8<0x83, MRM0m, (outs), (ins i32mem:$dst, i32i8imm :$src2), - "add{l} {$src2, $dst|$dst, $src2}", + "add{l}\t{$src2, $dst|$dst, $src2}", [(store (add (load addr:$dst), i32immSExt8:$src2), addr:$dst)]>; } let isCommutable = 1 in { // X = ADC Y, Z --> X = ADC Z, Y def ADC32rr : I<0x11, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2), - "adc{l} {$src2, $dst|$dst, $src2}", + "adc{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (adde GR32:$src1, GR32:$src2))]>; } def ADC32rm : I<0x13, MRMSrcMem , (outs GR32:$dst), (ins GR32:$src1, i32mem:$src2), - "adc{l} {$src2, $dst|$dst, $src2}", + "adc{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (adde GR32:$src1, (load addr:$src2)))]>; def ADC32ri : Ii32<0x81, MRM2r, (outs GR32:$dst), (ins GR32:$src1, i32imm:$src2), - "adc{l} {$src2, $dst|$dst, $src2}", + "adc{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (adde GR32:$src1, imm:$src2))]>; def ADC32ri8 : Ii8<0x83, MRM2r, (outs GR32:$dst), (ins GR32:$src1, i32i8imm:$src2), - "adc{l} {$src2, $dst|$dst, $src2}", + "adc{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (adde GR32:$src1, i32immSExt8:$src2))]>; let isTwoAddress = 0 in { def ADC32mr : I<0x11, MRMDestMem, (outs), (ins i32mem:$dst, GR32:$src2), - "adc{l} {$src2, $dst|$dst, $src2}", + "adc{l}\t{$src2, $dst|$dst, $src2}", [(store (adde (load addr:$dst), GR32:$src2), addr:$dst)]>; def ADC32mi : Ii32<0x81, MRM2m, (outs), (ins i32mem:$dst, i32imm:$src2), - "adc{l} {$src2, $dst|$dst, $src2}", + "adc{l}\t{$src2, $dst|$dst, $src2}", [(store (adde (loadi32 addr:$dst), imm:$src2), addr:$dst)]>; def ADC32mi8 : Ii8<0x83, MRM2m, (outs), (ins i32mem:$dst, i32i8imm :$src2), - "adc{l} {$src2, $dst|$dst, $src2}", + "adc{l}\t{$src2, $dst|$dst, $src2}", [(store (adde (load addr:$dst), i32immSExt8:$src2), addr:$dst)]>; } def SUB8rr : I<0x28, MRMDestReg, (outs GR8 :$dst), (ins GR8 :$src1, GR8 :$src2), - "sub{b} {$src2, $dst|$dst, $src2}", + "sub{b}\t{$src2, $dst|$dst, $src2}", [(set GR8:$dst, (sub GR8:$src1, GR8:$src2))]>; def SUB16rr : I<0x29, MRMDestReg, (outs GR16:$dst), (ins GR16:$src1, GR16:$src2), - "sub{w} {$src2, $dst|$dst, $src2}", + "sub{w}\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (sub GR16:$src1, GR16:$src2))]>, OpSize; def SUB32rr : I<0x29, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2), - "sub{l} {$src2, $dst|$dst, $src2}", + "sub{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (sub GR32:$src1, GR32:$src2))]>; def SUB8rm : I<0x2A, MRMSrcMem, (outs GR8 :$dst), (ins GR8 :$src1, i8mem :$src2), - "sub{b} {$src2, $dst|$dst, $src2}", + "sub{b}\t{$src2, $dst|$dst, $src2}", [(set GR8:$dst, (sub GR8:$src1, (load addr:$src2)))]>; def SUB16rm : I<0x2B, MRMSrcMem, (outs GR16:$dst), (ins GR16:$src1, i16mem:$src2), - "sub{w} {$src2, $dst|$dst, $src2}", + "sub{w}\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (sub GR16:$src1, (load addr:$src2)))]>, OpSize; def SUB32rm : I<0x2B, MRMSrcMem, (outs GR32:$dst), (ins GR32:$src1, i32mem:$src2), - "sub{l} {$src2, $dst|$dst, $src2}", + "sub{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (sub GR32:$src1, (load addr:$src2)))]>; def SUB8ri : Ii8 <0x80, MRM5r, (outs GR8:$dst), (ins GR8:$src1, i8imm:$src2), - "sub{b} {$src2, $dst|$dst, $src2}", + "sub{b}\t{$src2, $dst|$dst, $src2}", [(set GR8:$dst, (sub GR8:$src1, imm:$src2))]>; def SUB16ri : Ii16<0x81, MRM5r, (outs GR16:$dst), (ins GR16:$src1, i16imm:$src2), - "sub{w} {$src2, $dst|$dst, $src2}", + "sub{w}\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (sub GR16:$src1, imm:$src2))]>, OpSize; def SUB32ri : Ii32<0x81, MRM5r, (outs GR32:$dst), (ins GR32:$src1, i32imm:$src2), - "sub{l} {$src2, $dst|$dst, $src2}", + "sub{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (sub GR32:$src1, imm:$src2))]>; def SUB16ri8 : Ii8<0x83, MRM5r, (outs GR16:$dst), (ins GR16:$src1, i16i8imm:$src2), - "sub{w} {$src2, $dst|$dst, $src2}", + "sub{w}\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (sub GR16:$src1, i16immSExt8:$src2))]>, OpSize; def SUB32ri8 : Ii8<0x83, MRM5r, (outs GR32:$dst), (ins GR32:$src1, i32i8imm:$src2), - "sub{l} {$src2, $dst|$dst, $src2}", + "sub{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (sub GR32:$src1, i32immSExt8:$src2))]>; let isTwoAddress = 0 in { def SUB8mr : I<0x28, MRMDestMem, (outs), (ins i8mem :$dst, GR8 :$src2), - "sub{b} {$src2, $dst|$dst, $src2}", + "sub{b}\t{$src2, $dst|$dst, $src2}", [(store (sub (load addr:$dst), GR8:$src2), addr:$dst)]>; def SUB16mr : I<0x29, MRMDestMem, (outs), (ins i16mem:$dst, GR16:$src2), - "sub{w} {$src2, $dst|$dst, $src2}", + "sub{w}\t{$src2, $dst|$dst, $src2}", [(store (sub (load addr:$dst), GR16:$src2), addr:$dst)]>, OpSize; def SUB32mr : I<0x29, MRMDestMem, (outs), (ins i32mem:$dst, GR32:$src2), - "sub{l} {$src2, $dst|$dst, $src2}", + "sub{l}\t{$src2, $dst|$dst, $src2}", [(store (sub (load addr:$dst), GR32:$src2), addr:$dst)]>; def SUB8mi : Ii8<0x80, MRM5m, (outs), (ins i8mem :$dst, i8imm:$src2), - "sub{b} {$src2, $dst|$dst, $src2}", + "sub{b}\t{$src2, $dst|$dst, $src2}", [(store (sub (loadi8 addr:$dst), imm:$src2), addr:$dst)]>; def SUB16mi : Ii16<0x81, MRM5m, (outs), (ins i16mem:$dst, i16imm:$src2), - "sub{w} {$src2, $dst|$dst, $src2}", + "sub{w}\t{$src2, $dst|$dst, $src2}", [(store (sub (loadi16 addr:$dst), imm:$src2), addr:$dst)]>, OpSize; def SUB32mi : Ii32<0x81, MRM5m, (outs), (ins i32mem:$dst, i32imm:$src2), - "sub{l} {$src2, $dst|$dst, $src2}", + "sub{l}\t{$src2, $dst|$dst, $src2}", [(store (sub (loadi32 addr:$dst), imm:$src2), addr:$dst)]>; def SUB16mi8 : Ii8<0x83, MRM5m, (outs), (ins i16mem:$dst, i16i8imm :$src2), - "sub{w} {$src2, $dst|$dst, $src2}", + "sub{w}\t{$src2, $dst|$dst, $src2}", [(store (sub (load addr:$dst), i16immSExt8:$src2), addr:$dst)]>, OpSize; def SUB32mi8 : Ii8<0x83, MRM5m, (outs), (ins i32mem:$dst, i32i8imm :$src2), - "sub{l} {$src2, $dst|$dst, $src2}", + "sub{l}\t{$src2, $dst|$dst, $src2}", [(store (sub (load addr:$dst), i32immSExt8:$src2), addr:$dst)]>; } def SBB32rr : I<0x19, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2), - "sbb{l} {$src2, $dst|$dst, $src2}", + "sbb{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (sube GR32:$src1, GR32:$src2))]>; let isTwoAddress = 0 in { def SBB32mr : I<0x19, MRMDestMem, (outs), (ins i32mem:$dst, GR32:$src2), - "sbb{l} {$src2, $dst|$dst, $src2}", + "sbb{l}\t{$src2, $dst|$dst, $src2}", [(store (sube (load addr:$dst), GR32:$src2), addr:$dst)]>; def SBB8mi : Ii32<0x80, MRM3m, (outs), (ins i8mem:$dst, i8imm:$src2), - "sbb{b} {$src2, $dst|$dst, $src2}", + "sbb{b}\t{$src2, $dst|$dst, $src2}", [(store (sube (loadi8 addr:$dst), imm:$src2), addr:$dst)]>; def SBB32mi : Ii32<0x81, MRM3m, (outs), (ins i32mem:$dst, i32imm:$src2), - "sbb{l} {$src2, $dst|$dst, $src2}", + "sbb{l}\t{$src2, $dst|$dst, $src2}", [(store (sube (loadi32 addr:$dst), imm:$src2), addr:$dst)]>; def SBB32mi8 : Ii8<0x83, MRM3m, (outs), (ins i32mem:$dst, i32i8imm :$src2), - "sbb{l} {$src2, $dst|$dst, $src2}", + "sbb{l}\t{$src2, $dst|$dst, $src2}", [(store (sube (load addr:$dst), i32immSExt8:$src2), addr:$dst)]>; } def SBB32rm : I<0x1B, MRMSrcMem, (outs GR32:$dst), (ins GR32:$src1, i32mem:$src2), - "sbb{l} {$src2, $dst|$dst, $src2}", + "sbb{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (sube GR32:$src1, (load addr:$src2)))]>; def SBB32ri : Ii32<0x81, MRM3r, (outs GR32:$dst), (ins GR32:$src1, i32imm:$src2), - "sbb{l} {$src2, $dst|$dst, $src2}", + "sbb{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (sube GR32:$src1, imm:$src2))]>; def SBB32ri8 : Ii8<0x83, MRM3r, (outs GR32:$dst), (ins GR32:$src1, i32i8imm:$src2), - "sbb{l} {$src2, $dst|$dst, $src2}", + "sbb{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (sube GR32:$src1, i32immSExt8:$src2))]>; let isCommutable = 1 in { // X = IMUL Y, Z --> X = IMUL Z, Y def IMUL16rr : I<0xAF, MRMSrcReg, (outs GR16:$dst), (ins GR16:$src1, GR16:$src2), - "imul{w} {$src2, $dst|$dst, $src2}", + "imul{w}\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (mul GR16:$src1, GR16:$src2))]>, TB, OpSize; def IMUL32rr : I<0xAF, MRMSrcReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2), - "imul{l} {$src2, $dst|$dst, $src2}", + "imul{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (mul GR32:$src1, GR32:$src2))]>, TB; } def IMUL16rm : I<0xAF, MRMSrcMem, (outs GR16:$dst), (ins GR16:$src1, i16mem:$src2), - "imul{w} {$src2, $dst|$dst, $src2}", + "imul{w}\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (mul GR16:$src1, (load addr:$src2)))]>, TB, OpSize; def IMUL32rm : I<0xAF, MRMSrcMem, (outs GR32:$dst), (ins GR32:$src1, i32mem:$src2), - "imul{l} {$src2, $dst|$dst, $src2}", + "imul{l}\t{$src2, $dst|$dst, $src2}", [(set GR32:$dst, (mul GR32:$src1, (load addr:$src2)))]>, TB; } // end Two Address instructions @@ -1938,39 +1938,39 @@ // Suprisingly enough, these are not two address instructions! def IMUL16rri : Ii16<0x69, MRMSrcReg, // GR16 = GR16*I16 (outs GR16:$dst), (ins GR16:$src1, i16imm:$src2), - "imul{w} {$src2, $src1, $dst|$dst, $src1, $src2}", + "imul{w}\t{$src2, $src1, $dst|$dst, $src1, $src2}", [(set GR16:$dst, (mul GR16:$src1, imm:$src2))]>, OpSize; def IMUL32rri : Ii32<0x69, MRMSrcReg, // GR32 = GR32*I32 (outs GR32:$dst), (ins GR32:$src1, i32imm:$src2), - "imul{l} {$src2, $src1, $dst|$dst, $src1, $src2}", + "imul{l}\t{$src2, $src1, $dst|$dst, $src1, $src2}", [(set GR32:$dst, (mul GR32:$src1, imm:$src2))]>; def IMUL16rri8 : Ii8<0x6B, MRMSrcReg, // GR16 = GR16*I8 (outs GR16:$dst), (ins GR16:$src1, i16i8imm:$src2), - "imul{w} {$src2, $src1, $dst|$dst, $src1, $src2}", + "imul{w}\t{$src2, $src1, $dst|$dst, $src1, $src2}", [(set GR16:$dst, (mul GR16:$src1, i16immSExt8:$src2))]>, OpSize; def IMUL32rri8 : Ii8<0x6B, MRMSrcReg, // GR32 = GR32*I8 (outs GR32:$dst), (ins GR32:$src1, i32i8imm:$src2), - "imul{l} {$src2, $src1, $dst|$dst, $src1, $src2}", + "imul{l}\t{$src2, $src1, $dst|$dst, $src1, $src2}", [(set GR32:$dst, (mul GR32:$src1, i32immSExt8:$src2))]>; def IMUL16rmi : Ii16<0x69, MRMSrcMem, // GR16 = [mem16]*I16 (outs GR16:$dst), (ins i16mem:$src1, i16imm:$src2), - "imul{w} {$src2, $src1, $dst|$dst, $src1, $src2}", + "imul{w}\t{$src2, $src1, $dst|$dst, $src1, $src2}", [(set GR16:$dst, (mul (load addr:$src1), imm:$src2))]>, OpSize; def IMUL32rmi : Ii32<0x69, MRMSrcMem, // GR32 = [mem32]*I32 (outs GR32:$dst), (ins i32mem:$src1, i32imm:$src2), - "imul{l} {$src2, $src1, $dst|$dst, $src1, $src2}", + "imul{l}\t{$src2, $src1, $dst|$dst, $src1, $src2}", [(set GR32:$dst, (mul (load addr:$src1), imm:$src2))]>; def IMUL16rmi8 : Ii8<0x6B, MRMSrcMem, // GR16 = [mem16]*I8 (outs GR16:$dst), (ins i16mem:$src1, i16i8imm :$src2), - "imul{w} {$src2, $src1, $dst|$dst, $src1, $src2}", + "imul{w}\t{$src2, $src1, $dst|$dst, $src1, $src2}", [(set GR16:$dst, (mul (load addr:$src1), i16immSExt8:$src2))]>, OpSize; def IMUL32rmi8 : Ii8<0x6B, MRMSrcMem, // GR32 = [mem32]*I8 (outs GR32:$dst), (ins i32mem:$src1, i32i8imm: $src2), - "imul{l} {$src2, $src1, $dst|$dst, $src1, $src2}", + "imul{l}\t{$src2, $src1, $dst|$dst, $src1, $src2}", [(set GR32:$dst, (mul (load addr:$src1), i32immSExt8:$src2))]>; //===----------------------------------------------------------------------===// @@ -1978,52 +1978,52 @@ // let isCommutable = 1 in { // TEST X, Y --> TEST Y, X def TEST8rr : I<0x84, MRMDestReg, (outs), (ins GR8:$src1, GR8:$src2), - "test{b} {$src2, $src1|$src1, $src2}", + "test{b}\t{$src2, $src1|$src1, $src2}", [(X86cmp (and GR8:$src1, GR8:$src2), 0)]>; def TEST16rr : I<0x85, MRMDestReg, (outs), (ins GR16:$src1, GR16:$src2), - "test{w} {$src2, $src1|$src1, $src2}", + "test{w}\t{$src2, $src1|$src1, $src2}", [(X86cmp (and GR16:$src1, GR16:$src2), 0)]>, OpSize; def TEST32rr : I<0x85, MRMDestReg, (outs), (ins GR32:$src1, GR32:$src2), - "test{l} {$src2, $src1|$src1, $src2}", + "test{l}\t{$src2, $src1|$src1, $src2}", [(X86cmp (and GR32:$src1, GR32:$src2), 0)]>; } def TEST8rm : I<0x84, MRMSrcMem, (outs), (ins GR8 :$src1, i8mem :$src2), - "test{b} {$src2, $src1|$src1, $src2}", + "test{b}\t{$src2, $src1|$src1, $src2}", [(X86cmp (and GR8:$src1, (loadi8 addr:$src2)), 0)]>; def TEST16rm : I<0x85, MRMSrcMem, (outs), (ins GR16:$src1, i16mem:$src2), - "test{w} {$src2, $src1|$src1, $src2}", + "test{w}\t{$src2, $src1|$src1, $src2}", [(X86cmp (and GR16:$src1, (loadi16 addr:$src2)), 0)]>, OpSize; def TEST32rm : I<0x85, MRMSrcMem, (outs), (ins GR32:$src1, i32mem:$src2), - "test{l} {$src2, $src1|$src1, $src2}", + "test{l}\t{$src2, $src1|$src1, $src2}", [(X86cmp (and GR32:$src1, (loadi32 addr:$src2)), 0)]>; def TEST8ri : Ii8 <0xF6, MRM0r, // flags = GR8 & imm8 (outs), (ins GR8:$src1, i8imm:$src2), - "test{b} {$src2, $src1|$src1, $src2}", + "test{b}\t{$src2, $src1|$src1, $src2}", [(X86cmp (and GR8:$src1, imm:$src2), 0)]>; def TEST16ri : Ii16<0xF7, MRM0r, // flags = GR16 & imm16 (outs), (ins GR16:$src1, i16imm:$src2), - "test{w} {$src2, $src1|$src1, $src2}", + "test{w}\t{$src2, $src1|$src1, $src2}", [(X86cmp (and GR16:$src1, imm:$src2), 0)]>, OpSize; def TEST32ri : Ii32<0xF7, MRM0r, // flags = GR32 & imm32 (outs), (ins GR32:$src1, i32imm:$src2), - "test{l} {$src2, $src1|$src1, $src2}", + "test{l}\t{$src2, $src1|$src1, $src2}", [(X86cmp (and GR32:$src1, imm:$src2), 0)]>; def TEST8mi : Ii8 <0xF6, MRM0m, // flags = [mem8] & imm8 (outs), (ins i8mem:$src1, i8imm:$src2), - "test{b} {$src2, $src1|$src1, $src2}", + "test{b}\t{$src2, $src1|$src1, $src2}", [(X86cmp (and (loadi8 addr:$src1), imm:$src2), 0)]>; def TEST16mi : Ii16<0xF7, MRM0m, // flags = [mem16] & imm16 (outs), (ins i16mem:$src1, i16imm:$src2), - "test{w} {$src2, $src1|$src1, $src2}", + "test{w}\t{$src2, $src1|$src1, $src2}", [(X86cmp (and (loadi16 addr:$src1), imm:$src2), 0)]>, OpSize; def TEST32mi : Ii32<0xF7, MRM0m, // flags = [mem32] & imm32 (outs), (ins i32mem:$src1, i32imm:$src2), - "test{l} {$src2, $src1|$src1, $src2}", + "test{l}\t{$src2, $src1|$src1, $src2}", [(X86cmp (and (loadi32 addr:$src1), imm:$src2), 0)]>; @@ -2033,262 +2033,262 @@ def SETEr : I<0x94, MRM0r, (outs GR8 :$dst), (ins), - "sete $dst", + "sete\t$dst", [(set GR8:$dst, (X86setcc X86_COND_E))]>, TB; // GR8 = == def SETEm : I<0x94, MRM0m, (outs), (ins i8mem:$dst), - "sete $dst", + "sete\t$dst", [(store (X86setcc X86_COND_E), addr:$dst)]>, TB; // [mem8] = == def SETNEr : I<0x95, MRM0r, (outs GR8 :$dst), (ins), - "setne $dst", + "setne\t$dst", [(set GR8:$dst, (X86setcc X86_COND_NE))]>, TB; // GR8 = != def SETNEm : I<0x95, MRM0m, (outs), (ins i8mem:$dst), - "setne $dst", + "setne\t$dst", [(store (X86setcc X86_COND_NE), addr:$dst)]>, TB; // [mem8] = != def SETLr : I<0x9C, MRM0r, (outs GR8 :$dst), (ins), - "setl $dst", + "setl\t$dst", [(set GR8:$dst, (X86setcc X86_COND_L))]>, TB; // GR8 = < signed def SETLm : I<0x9C, MRM0m, (outs), (ins i8mem:$dst), - "setl $dst", + "setl\t$dst", [(store (X86setcc X86_COND_L), addr:$dst)]>, TB; // [mem8] = < signed def SETGEr : I<0x9D, MRM0r, (outs GR8 :$dst), (ins), - "setge $dst", + "setge\t$dst", [(set GR8:$dst, (X86setcc X86_COND_GE))]>, TB; // GR8 = >= signed def SETGEm : I<0x9D, MRM0m, (outs), (ins i8mem:$dst), - "setge $dst", + "setge\t$dst", [(store (X86setcc X86_COND_GE), addr:$dst)]>, TB; // [mem8] = >= signed def SETLEr : I<0x9E, MRM0r, (outs GR8 :$dst), (ins), - "setle $dst", + "setle\t$dst", [(set GR8:$dst, (X86setcc X86_COND_LE))]>, TB; // GR8 = <= signed def SETLEm : I<0x9E, MRM0m, (outs), (ins i8mem:$dst), - "setle $dst", + "setle\t$dst", [(store (X86setcc X86_COND_LE), addr:$dst)]>, TB; // [mem8] = <= signed def SETGr : I<0x9F, MRM0r, (outs GR8 :$dst), (ins), - "setg $dst", + "setg\t$dst", [(set GR8:$dst, (X86setcc X86_COND_G))]>, TB; // GR8 = > signed def SETGm : I<0x9F, MRM0m, (outs), (ins i8mem:$dst), - "setg $dst", + "setg\t$dst", [(store (X86setcc X86_COND_G), addr:$dst)]>, TB; // [mem8] = > signed def SETBr : I<0x92, MRM0r, (outs GR8 :$dst), (ins), - "setb $dst", + "setb\t$dst", [(set GR8:$dst, (X86setcc X86_COND_B))]>, TB; // GR8 = < unsign def SETBm : I<0x92, MRM0m, (outs), (ins i8mem:$dst), - "setb $dst", + "setb\t$dst", [(store (X86setcc X86_COND_B), addr:$dst)]>, TB; // [mem8] = < unsign def SETAEr : I<0x93, MRM0r, (outs GR8 :$dst), (ins), - "setae $dst", + "setae\t$dst", [(set GR8:$dst, (X86setcc X86_COND_AE))]>, TB; // GR8 = >= unsign def SETAEm : I<0x93, MRM0m, (outs), (ins i8mem:$dst), - "setae $dst", + "setae\t$dst", [(store (X86setcc X86_COND_AE), addr:$dst)]>, TB; // [mem8] = >= unsign def SETBEr : I<0x96, MRM0r, (outs GR8 :$dst), (ins), - "setbe $dst", + "setbe\t$dst", [(set GR8:$dst, (X86setcc X86_COND_BE))]>, TB; // GR8 = <= unsign def SETBEm : I<0x96, MRM0m, (outs), (ins i8mem:$dst), - "setbe $dst", + "setbe\t$dst", [(store (X86setcc X86_COND_BE), addr:$dst)]>, TB; // [mem8] = <= unsign def SETAr : I<0x97, MRM0r, (outs GR8 :$dst), (ins), - "seta $dst", + "seta\t$dst", [(set GR8:$dst, (X86setcc X86_COND_A))]>, TB; // GR8 = > signed def SETAm : I<0x97, MRM0m, (outs), (ins i8mem:$dst), - "seta $dst", + "seta\t$dst", [(store (X86setcc X86_COND_A), addr:$dst)]>, TB; // [mem8] = > signed def SETSr : I<0x98, MRM0r, (outs GR8 :$dst), (ins), - "sets $dst", + "sets\t$dst", [(set GR8:$dst, (X86setcc X86_COND_S))]>, TB; // GR8 = def SETSm : I<0x98, MRM0m, (outs), (ins i8mem:$dst), - "sets $dst", + "sets\t$dst", [(store (X86setcc X86_COND_S), addr:$dst)]>, TB; // [mem8] = def SETNSr : I<0x99, MRM0r, (outs GR8 :$dst), (ins), - "setns $dst", + "setns\t$dst", [(set GR8:$dst, (X86setcc X86_COND_NS))]>, TB; // GR8 = ! def SETNSm : I<0x99, MRM0m, (outs), (ins i8mem:$dst), - "setns $dst", + "setns\t$dst", [(store (X86setcc X86_COND_NS), addr:$dst)]>, TB; // [mem8] = ! def SETPr : I<0x9A, MRM0r, (outs GR8 :$dst), (ins), - "setp $dst", + "setp\t$dst", [(set GR8:$dst, (X86setcc X86_COND_P))]>, TB; // GR8 = parity def SETPm : I<0x9A, MRM0m, (outs), (ins i8mem:$dst), - "setp $dst", + "setp\t$dst", [(store (X86setcc X86_COND_P), addr:$dst)]>, TB; // [mem8] = parity def SETNPr : I<0x9B, MRM0r, (outs GR8 :$dst), (ins), - "setnp $dst", + "setnp\t$dst", [(set GR8:$dst, (X86setcc X86_COND_NP))]>, TB; // GR8 = not parity def SETNPm : I<0x9B, MRM0m, (outs), (ins i8mem:$dst), - "setnp $dst", + "setnp\t$dst", [(store (X86setcc X86_COND_NP), addr:$dst)]>, TB; // [mem8] = not parity // Integer comparisons def CMP8rr : I<0x38, MRMDestReg, (outs), (ins GR8 :$src1, GR8 :$src2), - "cmp{b} {$src2, $src1|$src1, $src2}", + "cmp{b}\t{$src2, $src1|$src1, $src2}", [(X86cmp GR8:$src1, GR8:$src2)]>; def CMP16rr : I<0x39, MRMDestReg, (outs), (ins GR16:$src1, GR16:$src2), - "cmp{w} {$src2, $src1|$src1, $src2}", + "cmp{w}\t{$src2, $src1|$src1, $src2}", [(X86cmp GR16:$src1, GR16:$src2)]>, OpSize; def CMP32rr : I<0x39, MRMDestReg, (outs), (ins GR32:$src1, GR32:$src2), - "cmp{l} {$src2, $src1|$src1, $src2}", + "cmp{l}\t{$src2, $src1|$src1, $src2}", [(X86cmp GR32:$src1, GR32:$src2)]>; def CMP8mr : I<0x38, MRMDestMem, (outs), (ins i8mem :$src1, GR8 :$src2), - "cmp{b} {$src2, $src1|$src1, $src2}", + "cmp{b}\t{$src2, $src1|$src1, $src2}", [(X86cmp (loadi8 addr:$src1), GR8:$src2)]>; def CMP16mr : I<0x39, MRMDestMem, (outs), (ins i16mem:$src1, GR16:$src2), - "cmp{w} {$src2, $src1|$src1, $src2}", + "cmp{w}\t{$src2, $src1|$src1, $src2}", [(X86cmp (loadi16 addr:$src1), GR16:$src2)]>, OpSize; def CMP32mr : I<0x39, MRMDestMem, (outs), (ins i32mem:$src1, GR32:$src2), - "cmp{l} {$src2, $src1|$src1, $src2}", + "cmp{l}\t{$src2, $src1|$src1, $src2}", [(X86cmp (loadi32 addr:$src1), GR32:$src2)]>; def CMP8rm : I<0x3A, MRMSrcMem, (outs), (ins GR8 :$src1, i8mem :$src2), - "cmp{b} {$src2, $src1|$src1, $src2}", + "cmp{b}\t{$src2, $src1|$src1, $src2}", [(X86cmp GR8:$src1, (loadi8 addr:$src2))]>; def CMP16rm : I<0x3B, MRMSrcMem, (outs), (ins GR16:$src1, i16mem:$src2), - "cmp{w} {$src2, $src1|$src1, $src2}", + "cmp{w}\t{$src2, $src1|$src1, $src2}", [(X86cmp GR16:$src1, (loadi16 addr:$src2))]>, OpSize; def CMP32rm : I<0x3B, MRMSrcMem, (outs), (ins GR32:$src1, i32mem:$src2), - "cmp{l} {$src2, $src1|$src1, $src2}", + "cmp{l}\t{$src2, $src1|$src1, $src2}", [(X86cmp GR32:$src1, (loadi32 addr:$src2))]>; def CMP8ri : Ii8<0x80, MRM7r, (outs), (ins GR8:$src1, i8imm:$src2), - "cmp{b} {$src2, $src1|$src1, $src2}", + "cmp{b}\t{$src2, $src1|$src1, $src2}", [(X86cmp GR8:$src1, imm:$src2)]>; def CMP16ri : Ii16<0x81, MRM7r, (outs), (ins GR16:$src1, i16imm:$src2), - "cmp{w} {$src2, $src1|$src1, $src2}", + "cmp{w}\t{$src2, $src1|$src1, $src2}", [(X86cmp GR16:$src1, imm:$src2)]>, OpSize; def CMP32ri : Ii32<0x81, MRM7r, (outs), (ins GR32:$src1, i32imm:$src2), - "cmp{l} {$src2, $src1|$src1, $src2}", + "cmp{l}\t{$src2, $src1|$src1, $src2}", [(X86cmp GR32:$src1, imm:$src2)]>; def CMP8mi : Ii8 <0x80, MRM7m, (outs), (ins i8mem :$src1, i8imm :$src2), - "cmp{b} {$src2, $src1|$src1, $src2}", + "cmp{b}\t{$src2, $src1|$src1, $src2}", [(X86cmp (loadi8 addr:$src1), imm:$src2)]>; def CMP16mi : Ii16<0x81, MRM7m, (outs), (ins i16mem:$src1, i16imm:$src2), - "cmp{w} {$src2, $src1|$src1, $src2}", + "cmp{w}\t{$src2, $src1|$src1, $src2}", [(X86cmp (loadi16 addr:$src1), imm:$src2)]>, OpSize; def CMP32mi : Ii32<0x81, MRM7m, (outs), (ins i32mem:$src1, i32imm:$src2), - "cmp{l} {$src2, $src1|$src1, $src2}", + "cmp{l}\t{$src2, $src1|$src1, $src2}", [(X86cmp (loadi32 addr:$src1), imm:$src2)]>; def CMP16ri8 : Ii8<0x83, MRM7r, (outs), (ins GR16:$src1, i16i8imm:$src2), - "cmp{w} {$src2, $src1|$src1, $src2}", + "cmp{w}\t{$src2, $src1|$src1, $src2}", [(X86cmp GR16:$src1, i16immSExt8:$src2)]>, OpSize; def CMP16mi8 : Ii8<0x83, MRM7m, (outs), (ins i16mem:$src1, i16i8imm:$src2), - "cmp{w} {$src2, $src1|$src1, $src2}", + "cmp{w}\t{$src2, $src1|$src1, $src2}", [(X86cmp (loadi16 addr:$src1), i16immSExt8:$src2)]>, OpSize; def CMP32mi8 : Ii8<0x83, MRM7m, (outs), (ins i32mem:$src1, i32i8imm:$src2), - "cmp{l} {$src2, $src1|$src1, $src2}", + "cmp{l}\t{$src2, $src1|$src1, $src2}", [(X86cmp (loadi32 addr:$src1), i32immSExt8:$src2)]>; def CMP32ri8 : Ii8<0x83, MRM7r, (outs), (ins GR32:$src1, i32i8imm:$src2), - "cmp{l} {$src2, $src1|$src1, $src2}", + "cmp{l}\t{$src2, $src1|$src1, $src2}", [(X86cmp GR32:$src1, i32immSExt8:$src2)]>; // Sign/Zero extenders def MOVSX16rr8 : I<0xBE, MRMSrcReg, (outs GR16:$dst), (ins GR8 :$src), - "movs{bw|x} {$src, $dst|$dst, $src}", + "movs{bw|x}\t{$src, $dst|$dst, $src}", [(set GR16:$dst, (sext GR8:$src))]>, TB, OpSize; def MOVSX16rm8 : I<0xBE, MRMSrcMem, (outs GR16:$dst), (ins i8mem :$src), - "movs{bw|x} {$src, $dst|$dst, $src}", + "movs{bw|x}\t{$src, $dst|$dst, $src}", [(set GR16:$dst, (sextloadi16i8 addr:$src))]>, TB, OpSize; def MOVSX32rr8 : I<0xBE, MRMSrcReg, (outs GR32:$dst), (ins GR8 :$src), - "movs{bl|x} {$src, $dst|$dst, $src}", + "movs{bl|x}\t{$src, $dst|$dst, $src}", [(set GR32:$dst, (sext GR8:$src))]>, TB; def MOVSX32rm8 : I<0xBE, MRMSrcMem, (outs GR32:$dst), (ins i8mem :$src), - "movs{bl|x} {$src, $dst|$dst, $src}", + "movs{bl|x}\t{$src, $dst|$dst, $src}", [(set GR32:$dst, (sextloadi32i8 addr:$src))]>, TB; def MOVSX32rr16: I<0xBF, MRMSrcReg, (outs GR32:$dst), (ins GR16:$src), - "movs{wl|x} {$src, $dst|$dst, $src}", + "movs{wl|x}\t{$src, $dst|$dst, $src}", [(set GR32:$dst, (sext GR16:$src))]>, TB; def MOVSX32rm16: I<0xBF, MRMSrcMem, (outs GR32:$dst), (ins i16mem:$src), - "movs{wl|x} {$src, $dst|$dst, $src}", + "movs{wl|x}\t{$src, $dst|$dst, $src}", [(set GR32:$dst, (sextloadi32i16 addr:$src))]>, TB; def MOVZX16rr8 : I<0xB6, MRMSrcReg, (outs GR16:$dst), (ins GR8 :$src), - "movz{bw|x} {$src, $dst|$dst, $src}", + "movz{bw|x}\t{$src, $dst|$dst, $src}", [(set GR16:$dst, (zext GR8:$src))]>, TB, OpSize; def MOVZX16rm8 : I<0xB6, MRMSrcMem, (outs GR16:$dst), (ins i8mem :$src), - "movz{bw|x} {$src, $dst|$dst, $src}", + "movz{bw|x}\t{$src, $dst|$dst, $src}", [(set GR16:$dst, (zextloadi16i8 addr:$src))]>, TB, OpSize; def MOVZX32rr8 : I<0xB6, MRMSrcReg, (outs GR32:$dst), (ins GR8 :$src), - "movz{bl|x} {$src, $dst|$dst, $src}", + "movz{bl|x}\t{$src, $dst|$dst, $src}", [(set GR32:$dst, (zext GR8:$src))]>, TB; def MOVZX32rm8 : I<0xB6, MRMSrcMem, (outs GR32:$dst), (ins i8mem :$src), - "movz{bl|x} {$src, $dst|$dst, $src}", + "movz{bl|x}\t{$src, $dst|$dst, $src}", [(set GR32:$dst, (zextloadi32i8 addr:$src))]>, TB; def MOVZX32rr16: I<0xB7, MRMSrcReg, (outs GR32:$dst), (ins GR16:$src), - "movz{wl|x} {$src, $dst|$dst, $src}", + "movz{wl|x}\t{$src, $dst|$dst, $src}", [(set GR32:$dst, (zext GR16:$src))]>, TB; def MOVZX32rm16: I<0xB7, MRMSrcMem, (outs GR32:$dst), (ins i16mem:$src), - "movz{wl|x} {$src, $dst|$dst, $src}", + "movz{wl|x}\t{$src, $dst|$dst, $src}", [(set GR32:$dst, (zextloadi32i16 addr:$src))]>, TB; def CBW : I<0x98, RawFrm, (outs), (ins), @@ -2309,57 +2309,57 @@ // Alias instructions that map movr0 to xor. // FIXME: remove when we can teach regalloc that xor reg, reg is ok. def MOV8r0 : I<0x30, MRMInitReg, (outs GR8 :$dst), (ins), - "xor{b} $dst, $dst", + "xor{b}\t$dst, $dst", [(set GR8:$dst, 0)]>; def MOV16r0 : I<0x31, MRMInitReg, (outs GR16:$dst), (ins), - "xor{w} $dst, $dst", + "xor{w}\t$dst, $dst", [(set GR16:$dst, 0)]>, OpSize; def MOV32r0 : I<0x31, MRMInitReg, (outs GR32:$dst), (ins), - "xor{l} $dst, $dst", + "xor{l}\t$dst, $dst", [(set GR32:$dst, 0)]>; // Basic operations on GR16 / GR32 subclasses GR16_ and GR32_ which contains only // those registers that have GR8 sub-registers (i.e. AX - DX, EAX - EDX). def MOV16to16_ : I<0x89, MRMDestReg, (outs GR16_:$dst), (ins GR16:$src), - "mov{w} {$src, $dst|$dst, $src}", []>, OpSize; + "mov{w}\t{$src, $dst|$dst, $src}", []>, OpSize; def MOV32to32_ : I<0x89, MRMDestReg, (outs GR32_:$dst), (ins GR32:$src), - "mov{l} {$src, $dst|$dst, $src}", []>; + "mov{l}\t{$src, $dst|$dst, $src}", []>; def MOV16_rr : I<0x89, MRMDestReg, (outs GR16_:$dst), (ins GR16_:$src), - "mov{w} {$src, $dst|$dst, $src}", []>, OpSize; + "mov{w}\t{$src, $dst|$dst, $src}", []>, OpSize; def MOV32_rr : I<0x89, MRMDestReg, (outs GR32_:$dst), (ins GR32_:$src), - "mov{l} {$src, $dst|$dst, $src}", []>; + "mov{l}\t{$src, $dst|$dst, $src}", []>; def MOV16_rm : I<0x8B, MRMSrcMem, (outs GR16_:$dst), (ins i16mem:$src), - "mov{w} {$src, $dst|$dst, $src}", []>, OpSize; + "mov{w}\t{$src, $dst|$dst, $src}", []>, OpSize; def MOV32_rm : I<0x8B, MRMSrcMem, (outs GR32_:$dst), (ins i32mem:$src), - "mov{l} {$src, $dst|$dst, $src}", []>; + "mov{l}\t{$src, $dst|$dst, $src}", []>; def MOV16_mr : I<0x89, MRMDestMem, (outs), (ins i16mem:$dst, GR16_:$src), - "mov{w} {$src, $dst|$dst, $src}", []>, OpSize; + "mov{w}\t{$src, $dst|$dst, $src}", []>, OpSize; def MOV32_mr : I<0x89, MRMDestMem, (outs), (ins i32mem:$dst, GR32_:$src), - "mov{l} {$src, $dst|$dst, $src}", []>; + "mov{l}\t{$src, $dst|$dst, $src}", []>; //===----------------------------------------------------------------------===// // Thread Local Storage Instructions // def TLS_addr : I<0, Pseudo, (outs GR32:$dst), (ins i32imm:$sym), - "leal ${sym:mem}(,%ebx,1), $dst", + "leal\t${sym:mem}(,%ebx,1), $dst", [(set GR32:$dst, (X86tlsaddr tglobaltlsaddr:$sym))]>, Imp<[EBX],[]>; let AddedComplexity = 10 in def TLS_gs_rr : I<0, Pseudo, (outs GR32:$dst), (ins GR32:$src), - "movl %gs:($src), $dst", + "movl\t%gs:($src), $dst", [(set GR32:$dst, (load (add X86TLStp, GR32:$src)))]>; let AddedComplexity = 15 in def TLS_gs_ri : I<0, Pseudo, (outs GR32:$dst), (ins i32imm:$src), - "movl %gs:${src:mem}, $dst", + "movl\t%gs:${src:mem}, $dst", [(set GR32:$dst, (load (add X86TLStp, (X86Wrapper tglobaltlsaddr:$src))))]>; def TLS_tp : I<0, Pseudo, (outs GR32:$dst), (ins), - "movl %gs:0, $dst", + "movl\t%gs:0, $dst", [(set GR32:$dst, X86TLStp)]>; //===----------------------------------------------------------------------===// @@ -2378,7 +2378,7 @@ let isTerminator = 1, isReturn = 1, isBarrier = 1, hasCtrlDep = 1 in { def EH_RETURN : I<0xC3, RawFrm, (outs), (ins GR32:$addr), - "ret #eh_return, addr: $addr", + "ret\t#eh_return, addr: $addr", [(X86ehret GR32:$addr)]>; } Modified: llvm/trunk/lib/Target/X86/X86InstrMMX.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrMMX.td?rev=40648&r1=40647&r2=40648&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrMMX.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrMMX.td Tue Jul 31 15:11:57 2007 @@ -85,12 +85,12 @@ multiclass MMXI_binop_rm opc, string OpcodeStr, SDNode OpNode, ValueType OpVT, bit Commutable = 0> { def rr : MMXI { let isCommutable = Commutable; } def rm : MMXI; @@ -99,12 +99,12 @@ multiclass MMXI_binop_rm_int opc, string OpcodeStr, Intrinsic IntId, bit Commutable = 0> { def rr : MMXI { let isCommutable = Commutable; } def rm : MMXI; } @@ -117,12 +117,12 @@ multiclass MMXI_binop_rm_v1i64 opc, string OpcodeStr, SDNode OpNode, bit Commutable = 0> { def rr : MMXI { let isCommutable = Commutable; } def rm : MMXI; } @@ -130,14 +130,14 @@ multiclass MMXI_binop_rmi_int opc, bits<8> opc2, Format ImmForm, string OpcodeStr, Intrinsic IntId> { def rr : MMXI; def rm : MMXI; def ri : MMXIi8; } @@ -156,50 +156,50 @@ // Data Transfer Instructions def MMX_MOVD64rr : MMXI<0x6E, MRMSrcReg, (outs VR64:$dst), (ins GR32:$src), - "movd {$src, $dst|$dst, $src}", []>; + "movd\t{$src, $dst|$dst, $src}", []>; def MMX_MOVD64rm : MMXI<0x6E, MRMSrcMem, (outs VR64:$dst), (ins i32mem:$src), - "movd {$src, $dst|$dst, $src}", []>; + "movd\t{$src, $dst|$dst, $src}", []>; def MMX_MOVD64mr : MMXI<0x7E, MRMDestMem, (outs), (ins i32mem:$dst, VR64:$src), - "movd {$src, $dst|$dst, $src}", []>; + "movd\t{$src, $dst|$dst, $src}", []>; def MMX_MOVD64to64rr : MMXRI<0x6E, MRMSrcReg, (outs VR64:$dst), (ins GR64:$src), - "movd {$src, $dst|$dst, $src}", []>; + "movd\t{$src, $dst|$dst, $src}", []>; def MMX_MOVQ64rr : MMXI<0x6F, MRMSrcReg, (outs VR64:$dst), (ins VR64:$src), - "movq {$src, $dst|$dst, $src}", []>; + "movq\t{$src, $dst|$dst, $src}", []>; def MMX_MOVQ64rm : MMXI<0x6F, MRMSrcMem, (outs VR64:$dst), (ins i64mem:$src), - "movq {$src, $dst|$dst, $src}", + "movq\t{$src, $dst|$dst, $src}", [(set VR64:$dst, (load_mmx addr:$src))]>; def MMX_MOVQ64mr : MMXI<0x7F, MRMDestMem, (outs), (ins i64mem:$dst, VR64:$src), - "movq {$src, $dst|$dst, $src}", + "movq\t{$src, $dst|$dst, $src}", [(store (v1i64 VR64:$src), addr:$dst)]>; def MMX_MOVDQ2Qrr : MMXID<0xD6, MRMDestMem, (outs VR64:$dst), (ins VR128:$src), - "movdq2q {$src, $dst|$dst, $src}", + "movdq2q\t{$src, $dst|$dst, $src}", [(set VR64:$dst, (v1i64 (vector_extract (v2i64 VR128:$src), (iPTR 0))))]>; def MMX_MOVQ2DQrr : MMXIS<0xD6, MRMDestMem, (outs VR128:$dst), (ins VR64:$src), - "movq2dq {$src, $dst|$dst, $src}", + "movq2dq\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (bitconvert (v1i64 VR64:$src)))]>; def MMX_MOVNTQmr : MMXI<0xE7, MRMDestMem, (outs), (ins i64mem:$dst, VR64:$src), - "movntq {$src, $dst|$dst, $src}", + "movntq\t{$src, $dst|$dst, $src}", [(int_x86_mmx_movnt_dq addr:$dst, VR64:$src)]>; let AddedComplexity = 15 in // movd to MMX register zero-extends def MMX_MOVZDI2PDIrr : MMX2I<0x6E, MRMSrcReg, (outs VR64:$dst), (ins GR32:$src), - "movd {$src, $dst|$dst, $src}", + "movd\t{$src, $dst|$dst, $src}", [(set VR64:$dst, (v2i32 (vector_shuffle immAllZerosV, (v2i32 (scalar_to_vector GR32:$src)), MMX_MOVL_shuffle_mask)))]>; let AddedComplexity = 20 in def MMX_MOVZDI2PDIrm : MMX2I<0x6E, MRMSrcMem, (outs VR64:$dst), (ins i32mem:$src), - "movd {$src, $dst|$dst, $src}", + "movd\t{$src, $dst|$dst, $src}", [(set VR64:$dst, (v2i32 (vector_shuffle immAllZerosV, (v2i32 (scalar_to_vector @@ -261,12 +261,12 @@ let isTwoAddress = 1 in { def MMX_PANDNrr : MMXI<0xDF, MRMSrcReg, (outs VR64:$dst), (ins VR64:$src1, VR64:$src2), - "pandn {$src2, $dst|$dst, $src2}", + "pandn\t{$src2, $dst|$dst, $src2}", [(set VR64:$dst, (v1i64 (and (vnot VR64:$src1), VR64:$src2)))]>; def MMX_PANDNrm : MMXI<0xDF, MRMSrcMem, (outs VR64:$dst), (ins VR64:$src1, i64mem:$src2), - "pandn {$src2, $dst|$dst, $src2}", + "pandn\t{$src2, $dst|$dst, $src2}", [(set VR64:$dst, (v1i64 (and (vnot VR64:$src1), (load addr:$src2))))]>; } @@ -307,13 +307,13 @@ // Unpack High Packed Data Instructions def MMX_PUNPCKHBWrr : MMXI<0x68, MRMSrcReg, (outs VR64:$dst), (ins VR64:$src1, VR64:$src2), - "punpckhbw {$src2, $dst|$dst, $src2}", + "punpckhbw\t{$src2, $dst|$dst, $src2}", [(set VR64:$dst, (v8i8 (vector_shuffle VR64:$src1, VR64:$src2, MMX_UNPCKH_shuffle_mask)))]>; def MMX_PUNPCKHBWrm : MMXI<0x68, MRMSrcMem, (outs VR64:$dst), (ins VR64:$src1, i64mem:$src2), - "punpckhbw {$src2, $dst|$dst, $src2}", + "punpckhbw\t{$src2, $dst|$dst, $src2}", [(set VR64:$dst, (v8i8 (vector_shuffle VR64:$src1, (bc_v8i8 (load_mmx addr:$src2)), @@ -321,13 +321,13 @@ def MMX_PUNPCKHWDrr : MMXI<0x69, MRMSrcReg, (outs VR64:$dst), (ins VR64:$src1, VR64:$src2), - "punpckhwd {$src2, $dst|$dst, $src2}", + "punpckhwd\t{$src2, $dst|$dst, $src2}", [(set VR64:$dst, (v4i16 (vector_shuffle VR64:$src1, VR64:$src2, MMX_UNPCKH_shuffle_mask)))]>; def MMX_PUNPCKHWDrm : MMXI<0x69, MRMSrcMem, (outs VR64:$dst), (ins VR64:$src1, i64mem:$src2), - "punpckhwd {$src2, $dst|$dst, $src2}", + "punpckhwd\t{$src2, $dst|$dst, $src2}", [(set VR64:$dst, (v4i16 (vector_shuffle VR64:$src1, (bc_v4i16 (load_mmx addr:$src2)), @@ -335,13 +335,13 @@ def MMX_PUNPCKHDQrr : MMXI<0x6A, MRMSrcReg, (outs VR64:$dst), (ins VR64:$src1, VR64:$src2), - "punpckhdq {$src2, $dst|$dst, $src2}", + "punpckhdq\t{$src2, $dst|$dst, $src2}", [(set VR64:$dst, (v2i32 (vector_shuffle VR64:$src1, VR64:$src2, MMX_UNPCKH_shuffle_mask)))]>; def MMX_PUNPCKHDQrm : MMXI<0x6A, MRMSrcMem, (outs VR64:$dst), (ins VR64:$src1, i64mem:$src2), - "punpckhdq {$src2, $dst|$dst, $src2}", + "punpckhdq\t{$src2, $dst|$dst, $src2}", [(set VR64:$dst, (v2i32 (vector_shuffle VR64:$src1, (bc_v2i32 (load_mmx addr:$src2)), @@ -350,13 +350,13 @@ // Unpack Low Packed Data Instructions def MMX_PUNPCKLBWrr : MMXI<0x60, MRMSrcReg, (outs VR64:$dst), (ins VR64:$src1, VR64:$src2), - "punpcklbw {$src2, $dst|$dst, $src2}", + "punpcklbw\t{$src2, $dst|$dst, $src2}", [(set VR64:$dst, (v8i8 (vector_shuffle VR64:$src1, VR64:$src2, MMX_UNPCKL_shuffle_mask)))]>; def MMX_PUNPCKLBWrm : MMXI<0x60, MRMSrcMem, (outs VR64:$dst), (ins VR64:$src1, i64mem:$src2), - "punpcklbw {$src2, $dst|$dst, $src2}", + "punpcklbw\t{$src2, $dst|$dst, $src2}", [(set VR64:$dst, (v8i8 (vector_shuffle VR64:$src1, (bc_v8i8 (load_mmx addr:$src2)), @@ -364,13 +364,13 @@ def MMX_PUNPCKLWDrr : MMXI<0x61, MRMSrcReg, (outs VR64:$dst), (ins VR64:$src1, VR64:$src2), - "punpcklwd {$src2, $dst|$dst, $src2}", + "punpcklwd\t{$src2, $dst|$dst, $src2}", [(set VR64:$dst, (v4i16 (vector_shuffle VR64:$src1, VR64:$src2, MMX_UNPCKL_shuffle_mask)))]>; def MMX_PUNPCKLWDrm : MMXI<0x61, MRMSrcMem, (outs VR64:$dst), (ins VR64:$src1, i64mem:$src2), - "punpcklwd {$src2, $dst|$dst, $src2}", + "punpcklwd\t{$src2, $dst|$dst, $src2}", [(set VR64:$dst, (v4i16 (vector_shuffle VR64:$src1, (bc_v4i16 (load_mmx addr:$src2)), @@ -378,13 +378,13 @@ def MMX_PUNPCKLDQrr : MMXI<0x62, MRMSrcReg, (outs VR64:$dst), (ins VR64:$src1, VR64:$src2), - "punpckldq {$src2, $dst|$dst, $src2}", + "punpckldq\t{$src2, $dst|$dst, $src2}", [(set VR64:$dst, (v2i32 (vector_shuffle VR64:$src1, VR64:$src2, MMX_UNPCKL_shuffle_mask)))]>; def MMX_PUNPCKLDQrm : MMXI<0x62, MRMSrcMem, (outs VR64:$dst), (ins VR64:$src1, i64mem:$src2), - "punpckldq {$src2, $dst|$dst, $src2}", + "punpckldq\t{$src2, $dst|$dst, $src2}", [(set VR64:$dst, (v2i32 (vector_shuffle VR64:$src1, (bc_v2i32 (load_mmx addr:$src2)), @@ -399,14 +399,14 @@ // -- Shuffle Instructions def MMX_PSHUFWri : MMXIi8<0x70, MRMSrcReg, (outs VR64:$dst), (ins VR64:$src1, i8imm:$src2), - "pshufw {$src2, $src1, $dst|$dst, $src1, $src2}", + "pshufw\t{$src2, $src1, $dst|$dst, $src1, $src2}", [(set VR64:$dst, (v4i16 (vector_shuffle VR64:$src1, (undef), MMX_PSHUFW_shuffle_mask:$src2)))]>; def MMX_PSHUFWmi : MMXIi8<0x70, MRMSrcMem, (outs VR64:$dst), (ins i64mem:$src1, i8imm:$src2), - "pshufw {$src2, $src1, $dst|$dst, $src1, $src2}", + "pshufw\t{$src2, $src1, $dst|$dst, $src1, $src2}", [(set VR64:$dst, (v4i16 (vector_shuffle (bc_v4i16 (load_mmx addr:$src1)), @@ -415,34 +415,34 @@ // -- Conversion Instructions def MMX_CVTPD2PIrr : MMX2I<0x2D, MRMSrcReg, (outs VR64:$dst), (ins VR128:$src), - "cvtpd2pi {$src, $dst|$dst, $src}", []>; + "cvtpd2pi\t{$src, $dst|$dst, $src}", []>; def MMX_CVTPD2PIrm : MMX2I<0x2D, MRMSrcMem, (outs VR64:$dst), (ins f128mem:$src), - "cvtpd2pi {$src, $dst|$dst, $src}", []>; + "cvtpd2pi\t{$src, $dst|$dst, $src}", []>; def MMX_CVTPI2PDrr : MMX2I<0x2A, MRMSrcReg, (outs VR128:$dst), (ins VR64:$src), - "cvtpi2pd {$src, $dst|$dst, $src}", []>; + "cvtpi2pd\t{$src, $dst|$dst, $src}", []>; def MMX_CVTPI2PDrm : MMX2I<0x2A, MRMSrcMem, (outs VR128:$dst), (ins i64mem:$src), - "cvtpi2pd {$src, $dst|$dst, $src}", []>; + "cvtpi2pd\t{$src, $dst|$dst, $src}", []>; def MMX_CVTPI2PSrr : MMXI<0x2A, MRMSrcReg, (outs VR128:$dst), (ins VR64:$src), - "cvtpi2ps {$src, $dst|$dst, $src}", []>; + "cvtpi2ps\t{$src, $dst|$dst, $src}", []>; def MMX_CVTPI2PSrm : MMXI<0x2A, MRMSrcMem, (outs VR128:$dst), (ins i64mem:$src), - "cvtpi2ps {$src, $dst|$dst, $src}", []>; + "cvtpi2ps\t{$src, $dst|$dst, $src}", []>; def MMX_CVTPS2PIrr : MMXI<0x2D, MRMSrcReg, (outs VR64:$dst), (ins VR128:$src), - "cvtps2pi {$src, $dst|$dst, $src}", []>; + "cvtps2pi\t{$src, $dst|$dst, $src}", []>; def MMX_CVTPS2PIrm : MMXI<0x2D, MRMSrcMem, (outs VR64:$dst), (ins f64mem:$src), - "cvtps2pi {$src, $dst|$dst, $src}", []>; + "cvtps2pi\t{$src, $dst|$dst, $src}", []>; def MMX_CVTTPD2PIrr : MMX2I<0x2C, MRMSrcReg, (outs VR64:$dst), (ins VR128:$src), - "cvttpd2pi {$src, $dst|$dst, $src}", []>; + "cvttpd2pi\t{$src, $dst|$dst, $src}", []>; def MMX_CVTTPD2PIrm : MMX2I<0x2C, MRMSrcMem, (outs VR64:$dst), (ins f128mem:$src), - "cvttpd2pi {$src, $dst|$dst, $src}", []>; + "cvttpd2pi\t{$src, $dst|$dst, $src}", []>; def MMX_CVTTPS2PIrr : MMXI<0x2C, MRMSrcReg, (outs VR64:$dst), (ins VR128:$src), - "cvttps2pi {$src, $dst|$dst, $src}", []>; + "cvttps2pi\t{$src, $dst|$dst, $src}", []>; def MMX_CVTTPS2PIrm : MMXI<0x2C, MRMSrcMem, (outs VR64:$dst), (ins f64mem:$src), - "cvttps2pi {$src, $dst|$dst, $src}", []>; + "cvttps2pi\t{$src, $dst|$dst, $src}", []>; // Extract / Insert def MMX_X86pextrw : SDNode<"X86ISD::PEXTRW", SDTypeProfile<1, 2, []>, []>; @@ -450,18 +450,18 @@ def MMX_PEXTRWri : MMXIi8<0xC5, MRMSrcReg, (outs GR32:$dst), (ins VR64:$src1, i16i8imm:$src2), - "pextrw {$src2, $src1, $dst|$dst, $src1, $src2}", + "pextrw\t{$src2, $src1, $dst|$dst, $src1, $src2}", [(set GR32:$dst, (MMX_X86pextrw (v4i16 VR64:$src1), (iPTR imm:$src2)))]>; let isTwoAddress = 1 in { def MMX_PINSRWrri : MMXIi8<0xC4, MRMSrcReg, (outs VR64:$dst), (ins VR64:$src1, GR32:$src2, i16i8imm:$src3), - "pinsrw {$src3, $src2, $dst|$dst, $src2, $src3}", + "pinsrw\t{$src3, $src2, $dst|$dst, $src2, $src3}", [(set VR64:$dst, (v4i16 (MMX_X86pinsrw (v4i16 VR64:$src1), GR32:$src2, (iPTR imm:$src3))))]>; def MMX_PINSRWrmi : MMXIi8<0xC4, MRMSrcMem, (outs VR64:$dst), (ins VR64:$src1, i16mem:$src2, i16i8imm:$src3), - "pinsrw {$src3, $src2, $dst|$dst, $src2, $src3}", + "pinsrw\t{$src3, $src2, $dst|$dst, $src2, $src3}", [(set VR64:$dst, (v4i16 (MMX_X86pinsrw (v4i16 VR64:$src1), (i32 (anyext (loadi16 addr:$src2))), @@ -470,12 +470,12 @@ // Mask creation def MMX_PMOVMSKBrr : MMXI<0xD7, MRMSrcReg, (outs GR32:$dst), (ins VR64:$src), - "pmovmskb {$src, $dst|$dst, $src}", + "pmovmskb\t{$src, $dst|$dst, $src}", [(set GR32:$dst, (int_x86_mmx_pmovmskb VR64:$src))]>; // Misc. def MMX_MASKMOVQ : MMXI<0xF7, MRMDestMem, (outs), (ins VR64:$src, VR64:$mask), - "maskmovq {$mask, $src|$src, $mask}", + "maskmovq\t{$mask, $src|$src, $mask}", [(int_x86_mmx_maskmovq VR64:$src, VR64:$mask, EDI)]>, Imp<[EDI],[]>; @@ -487,10 +487,10 @@ // FIXME: remove when we can teach regalloc that xor reg, reg is ok. let isReMaterializable = 1 in { def MMX_V_SET0 : MMXI<0xEF, MRMInitReg, (outs VR64:$dst), (ins), - "pxor $dst, $dst", + "pxor\t$dst, $dst", [(set VR64:$dst, (v1i64 immAllZerosV))]>; def MMX_V_SETALLONES : MMXI<0x76, MRMInitReg, (outs VR64:$dst), (ins), - "pcmpeqd $dst, $dst", + "pcmpeqd\t$dst, $dst", [(set VR64:$dst, (v1i64 immAllOnesV))]>; } Modified: llvm/trunk/lib/Target/X86/X86InstrSSE.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSSE.td?rev=40648&r1=40647&r2=40648&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrSSE.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrSSE.td Tue Jul 31 15:11:57 2007 @@ -279,56 +279,56 @@ // Move Instructions def MOVSSrr : SSI<0x10, MRMSrcReg, (outs FR32:$dst), (ins FR32:$src), - "movss {$src, $dst|$dst, $src}", []>; + "movss\t{$src, $dst|$dst, $src}", []>; def MOVSSrm : SSI<0x10, MRMSrcMem, (outs FR32:$dst), (ins f32mem:$src), - "movss {$src, $dst|$dst, $src}", + "movss\t{$src, $dst|$dst, $src}", [(set FR32:$dst, (loadf32 addr:$src))]>; def MOVSSmr : SSI<0x11, MRMDestMem, (outs), (ins f32mem:$dst, FR32:$src), - "movss {$src, $dst|$dst, $src}", + "movss\t{$src, $dst|$dst, $src}", [(store FR32:$src, addr:$dst)]>; // Conversion instructions def CVTTSS2SIrr : SSI<0x2C, MRMSrcReg, (outs GR32:$dst), (ins FR32:$src), - "cvttss2si {$src, $dst|$dst, $src}", + "cvttss2si\t{$src, $dst|$dst, $src}", [(set GR32:$dst, (fp_to_sint FR32:$src))]>; def CVTTSS2SIrm : SSI<0x2C, MRMSrcMem, (outs GR32:$dst), (ins f32mem:$src), - "cvttss2si {$src, $dst|$dst, $src}", + "cvttss2si\t{$src, $dst|$dst, $src}", [(set GR32:$dst, (fp_to_sint (loadf32 addr:$src)))]>; def CVTSI2SSrr : SSI<0x2A, MRMSrcReg, (outs FR32:$dst), (ins GR32:$src), - "cvtsi2ss {$src, $dst|$dst, $src}", + "cvtsi2ss\t{$src, $dst|$dst, $src}", [(set FR32:$dst, (sint_to_fp GR32:$src))]>; def CVTSI2SSrm : SSI<0x2A, MRMSrcMem, (outs FR32:$dst), (ins i32mem:$src), - "cvtsi2ss {$src, $dst|$dst, $src}", + "cvtsi2ss\t{$src, $dst|$dst, $src}", [(set FR32:$dst, (sint_to_fp (loadi32 addr:$src)))]>; // Match intrinsics which expect XMM operand(s). def Int_CVTSS2SIrr : SSI<0x2D, MRMSrcReg, (outs GR32:$dst), (ins VR128:$src), - "cvtss2si {$src, $dst|$dst, $src}", + "cvtss2si\t{$src, $dst|$dst, $src}", [(set GR32:$dst, (int_x86_sse_cvtss2si VR128:$src))]>; def Int_CVTSS2SIrm : SSI<0x2D, MRMSrcMem, (outs GR32:$dst), (ins f32mem:$src), - "cvtss2si {$src, $dst|$dst, $src}", + "cvtss2si\t{$src, $dst|$dst, $src}", [(set GR32:$dst, (int_x86_sse_cvtss2si (load addr:$src)))]>; // Aliases for intrinsics def Int_CVTTSS2SIrr : SSI<0x2C, MRMSrcReg, (outs GR32:$dst), (ins VR128:$src), - "cvttss2si {$src, $dst|$dst, $src}", + "cvttss2si\t{$src, $dst|$dst, $src}", [(set GR32:$dst, (int_x86_sse_cvttss2si VR128:$src))]>; def Int_CVTTSS2SIrm : SSI<0x2C, MRMSrcMem, (outs GR32:$dst), (ins f32mem:$src), - "cvttss2si {$src, $dst|$dst, $src}", + "cvttss2si\t{$src, $dst|$dst, $src}", [(set GR32:$dst, (int_x86_sse_cvttss2si(load addr:$src)))]>; let isTwoAddress = 1 in { def Int_CVTSI2SSrr : SSI<0x2A, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, GR32:$src2), - "cvtsi2ss {$src2, $dst|$dst, $src2}", + "cvtsi2ss\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (int_x86_sse_cvtsi2ss VR128:$src1, GR32:$src2))]>; def Int_CVTSI2SSrm : SSI<0x2A, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, i32mem:$src2), - "cvtsi2ss {$src2, $dst|$dst, $src2}", + "cvtsi2ss\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (int_x86_sse_cvtsi2ss VR128:$src1, (loadi32 addr:$src2)))]>; } @@ -337,45 +337,45 @@ let isTwoAddress = 1 in { def CMPSSrr : SSI<0xC2, MRMSrcReg, (outs FR32:$dst), (ins FR32:$src1, FR32:$src, SSECC:$cc), - "cmp${cc}ss {$src, $dst|$dst, $src}", []>; + "cmp${cc}ss\t{$src, $dst|$dst, $src}", []>; def CMPSSrm : SSI<0xC2, MRMSrcMem, (outs FR32:$dst), (ins FR32:$src1, f32mem:$src, SSECC:$cc), - "cmp${cc}ss {$src, $dst|$dst, $src}", []>; + "cmp${cc}ss\t{$src, $dst|$dst, $src}", []>; } def UCOMISSrr: PSI<0x2E, MRMSrcReg, (outs), (ins FR32:$src1, FR32:$src2), - "ucomiss {$src2, $src1|$src1, $src2}", + "ucomiss\t{$src2, $src1|$src1, $src2}", [(X86cmp FR32:$src1, FR32:$src2)]>; def UCOMISSrm: PSI<0x2E, MRMSrcMem, (outs), (ins FR32:$src1, f32mem:$src2), - "ucomiss {$src2, $src1|$src1, $src2}", + "ucomiss\t{$src2, $src1|$src1, $src2}", [(X86cmp FR32:$src1, (loadf32 addr:$src2))]>; // Aliases to match intrinsics which expect XMM operand(s). let isTwoAddress = 1 in { def Int_CMPSSrr : SSI<0xC2, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src, SSECC:$cc), - "cmp${cc}ss {$src, $dst|$dst, $src}", + "cmp${cc}ss\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse_cmp_ss VR128:$src1, VR128:$src, imm:$cc))]>; def Int_CMPSSrm : SSI<0xC2, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, f32mem:$src, SSECC:$cc), - "cmp${cc}ss {$src, $dst|$dst, $src}", + "cmp${cc}ss\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse_cmp_ss VR128:$src1, (load addr:$src), imm:$cc))]>; } def Int_UCOMISSrr: PSI<0x2E, MRMSrcReg, (outs), (ins VR128:$src1, VR128:$src2), - "ucomiss {$src2, $src1|$src1, $src2}", + "ucomiss\t{$src2, $src1|$src1, $src2}", [(X86ucomi (v4f32 VR128:$src1), VR128:$src2)]>; def Int_UCOMISSrm: PSI<0x2E, MRMSrcMem, (outs), (ins VR128:$src1, f128mem:$src2), - "ucomiss {$src2, $src1|$src1, $src2}", + "ucomiss\t{$src2, $src1|$src1, $src2}", [(X86ucomi (v4f32 VR128:$src1), (load addr:$src2))]>; def Int_COMISSrr: PSI<0x2F, MRMSrcReg, (outs), (ins VR128:$src1, VR128:$src2), - "comiss {$src2, $src1|$src1, $src2}", + "comiss\t{$src2, $src1|$src1, $src2}", [(X86comi (v4f32 VR128:$src1), VR128:$src2)]>; def Int_COMISSrm: PSI<0x2F, MRMSrcMem, (outs), (ins VR128:$src1, f128mem:$src2), - "comiss {$src2, $src1|$src1, $src2}", + "comiss\t{$src2, $src1|$src1, $src2}", [(X86comi (v4f32 VR128:$src1), (load addr:$src2))]>; // Aliases of packed SSE1 instructions for scalar use. These all have names that @@ -383,53 +383,53 @@ // Alias instructions that map fld0 to pxor for sse. def FsFLD0SS : I<0xEF, MRMInitReg, (outs FR32:$dst), (ins), - "pxor $dst, $dst", [(set FR32:$dst, fp32imm0)]>, + "pxor\t$dst, $dst", [(set FR32:$dst, fp32imm0)]>, Requires<[HasSSE1]>, TB, OpSize; // Alias instruction to do FR32 reg-to-reg copy using movaps. Upper bits are // disregarded. def FsMOVAPSrr : PSI<0x28, MRMSrcReg, (outs FR32:$dst), (ins FR32:$src), - "movaps {$src, $dst|$dst, $src}", []>; + "movaps\t{$src, $dst|$dst, $src}", []>; // Alias instruction to load FR32 from f128mem using movaps. Upper bits are // disregarded. def FsMOVAPSrm : PSI<0x28, MRMSrcMem, (outs FR32:$dst), (ins f128mem:$src), - "movaps {$src, $dst|$dst, $src}", + "movaps\t{$src, $dst|$dst, $src}", [(set FR32:$dst, (alignedloadfsf32 addr:$src))]>; // Alias bitwise logical operations using SSE logical ops on packed FP values. let isTwoAddress = 1 in { let isCommutable = 1 in { def FsANDPSrr : PSI<0x54, MRMSrcReg, (outs FR32:$dst), (ins FR32:$src1, FR32:$src2), - "andps {$src2, $dst|$dst, $src2}", + "andps\t{$src2, $dst|$dst, $src2}", [(set FR32:$dst, (X86fand FR32:$src1, FR32:$src2))]>; def FsORPSrr : PSI<0x56, MRMSrcReg, (outs FR32:$dst), (ins FR32:$src1, FR32:$src2), - "orps {$src2, $dst|$dst, $src2}", + "orps\t{$src2, $dst|$dst, $src2}", [(set FR32:$dst, (X86for FR32:$src1, FR32:$src2))]>; def FsXORPSrr : PSI<0x57, MRMSrcReg, (outs FR32:$dst), (ins FR32:$src1, FR32:$src2), - "xorps {$src2, $dst|$dst, $src2}", + "xorps\t{$src2, $dst|$dst, $src2}", [(set FR32:$dst, (X86fxor FR32:$src1, FR32:$src2))]>; } def FsANDPSrm : PSI<0x54, MRMSrcMem, (outs FR32:$dst), (ins FR32:$src1, f128mem:$src2), - "andps {$src2, $dst|$dst, $src2}", + "andps\t{$src2, $dst|$dst, $src2}", [(set FR32:$dst, (X86fand FR32:$src1, (memopfsf32 addr:$src2)))]>; def FsORPSrm : PSI<0x56, MRMSrcMem, (outs FR32:$dst), (ins FR32:$src1, f128mem:$src2), - "orps {$src2, $dst|$dst, $src2}", + "orps\t{$src2, $dst|$dst, $src2}", [(set FR32:$dst, (X86for FR32:$src1, (memopfsf32 addr:$src2)))]>; def FsXORPSrm : PSI<0x57, MRMSrcMem, (outs FR32:$dst), (ins FR32:$src1, f128mem:$src2), - "xorps {$src2, $dst|$dst, $src2}", + "xorps\t{$src2, $dst|$dst, $src2}", [(set FR32:$dst, (X86fxor FR32:$src1, (memopfsf32 addr:$src2)))]>; def FsANDNPSrr : PSI<0x55, MRMSrcReg, (outs FR32:$dst), (ins FR32:$src1, FR32:$src2), - "andnps {$src2, $dst|$dst, $src2}", []>; + "andnps\t{$src2, $dst|$dst, $src2}", []>; def FsANDNPSrm : PSI<0x55, MRMSrcMem, (outs FR32:$dst), (ins FR32:$src1, f128mem:$src2), - "andnps {$src2, $dst|$dst, $src2}", []>; + "andnps\t{$src2, $dst|$dst, $src2}", []>; } /// basic_sse1_fp_binop_rm - SSE1 binops come in both scalar and vector forms. @@ -448,38 +448,38 @@ bit Commutable = 0> { // Scalar operation, reg+reg. def SSrr : SSI { let isCommutable = Commutable; } // Scalar operation, reg+mem. def SSrm : SSI; // Vector operation, reg+reg. def PSrr : PSI { let isCommutable = Commutable; } // Vector operation, reg+mem. def PSrm : PSI; // Intrinsic operation, reg+reg. def SSrr_Int : SSI { let isCommutable = Commutable; } // Intrinsic operation, reg+mem. def SSrm_Int : SSI; } @@ -509,51 +509,51 @@ // Scalar operation, reg+reg. def SSrr : SSI { let isCommutable = Commutable; } // Scalar operation, reg+mem. def SSrm : SSI; // Vector operation, reg+reg. def PSrr : PSI { let isCommutable = Commutable; } // Vector operation, reg+mem. def PSrm : PSI; // Intrinsic operation, reg+reg. def SSrr_Int : SSI { let isCommutable = Commutable; } // Intrinsic operation, reg+mem. def SSrm_Int : SSI; // Vector intrinsic operation, reg+reg. def PSrr_Int : PSI { let isCommutable = Commutable; } // Vector intrinsic operation, reg+mem. def PSrm_Int : PSI; } } @@ -568,44 +568,44 @@ // Move Instructions def MOVAPSrr : PSI<0x28, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src), - "movaps {$src, $dst|$dst, $src}", []>; + "movaps\t{$src, $dst|$dst, $src}", []>; def MOVAPSrm : PSI<0x28, MRMSrcMem, (outs VR128:$dst), (ins f128mem:$src), - "movaps {$src, $dst|$dst, $src}", + "movaps\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (alignedloadv4f32 addr:$src))]>; def MOVAPSmr : PSI<0x29, MRMDestMem, (outs), (ins f128mem:$dst, VR128:$src), - "movaps {$src, $dst|$dst, $src}", + "movaps\t{$src, $dst|$dst, $src}", [(alignedstore (v4f32 VR128:$src), addr:$dst)]>; def MOVUPSrr : PSI<0x10, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src), - "movups {$src, $dst|$dst, $src}", []>; + "movups\t{$src, $dst|$dst, $src}", []>; def MOVUPSrm : PSI<0x10, MRMSrcMem, (outs VR128:$dst), (ins f128mem:$src), - "movups {$src, $dst|$dst, $src}", + "movups\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (loadv4f32 addr:$src))]>; def MOVUPSmr : PSI<0x11, MRMDestMem, (outs), (ins f128mem:$dst, VR128:$src), - "movups {$src, $dst|$dst, $src}", + "movups\t{$src, $dst|$dst, $src}", [(store (v4f32 VR128:$src), addr:$dst)]>; // Intrinsic forms of MOVUPS load and store def MOVUPSrm_Int : PSI<0x10, MRMSrcMem, (outs VR128:$dst), (ins f128mem:$src), - "movups {$src, $dst|$dst, $src}", + "movups\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse_loadu_ps addr:$src))]>; def MOVUPSmr_Int : PSI<0x11, MRMDestMem, (outs), (ins f128mem:$dst, VR128:$src), - "movups {$src, $dst|$dst, $src}", + "movups\t{$src, $dst|$dst, $src}", [(int_x86_sse_storeu_ps addr:$dst, VR128:$src)]>; let isTwoAddress = 1 in { let AddedComplexity = 20 in { def MOVLPSrm : PSI<0x12, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, f64mem:$src2), - "movlps {$src2, $dst|$dst, $src2}", + "movlps\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v4f32 (vector_shuffle VR128:$src1, (bc_v4f32 (v2f64 (scalar_to_vector (loadf64 addr:$src2)))), MOVLP_shuffle_mask)))]>; def MOVHPSrm : PSI<0x16, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, f64mem:$src2), - "movhps {$src2, $dst|$dst, $src2}", + "movhps\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v4f32 (vector_shuffle VR128:$src1, (bc_v4f32 (v2f64 (scalar_to_vector (loadf64 addr:$src2)))), @@ -614,14 +614,14 @@ } // isTwoAddress def MOVLPSmr : PSI<0x13, MRMDestMem, (outs), (ins f64mem:$dst, VR128:$src), - "movlps {$src, $dst|$dst, $src}", + "movlps\t{$src, $dst|$dst, $src}", [(store (f64 (vector_extract (bc_v2f64 (v4f32 VR128:$src)), (iPTR 0))), addr:$dst)]>; // v2f64 extract element 1 is always custom lowered to unpack high to low // and extract element 0 so the non-store version isn't too horrible. def MOVHPSmr : PSI<0x17, MRMDestMem, (outs), (ins f64mem:$dst, VR128:$src), - "movhps {$src, $dst|$dst, $src}", + "movhps\t{$src, $dst|$dst, $src}", [(store (f64 (vector_extract (v2f64 (vector_shuffle (bc_v2f64 (v4f32 VR128:$src)), (undef), @@ -631,13 +631,13 @@ let isTwoAddress = 1 in { let AddedComplexity = 15 in { def MOVLHPSrr : PSI<0x16, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), - "movlhps {$src2, $dst|$dst, $src2}", + "movlhps\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v4f32 (vector_shuffle VR128:$src1, VR128:$src2, MOVHP_shuffle_mask)))]>; def MOVHLPSrr : PSI<0x12, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), - "movhlps {$src2, $dst|$dst, $src2}", + "movhlps\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v4f32 (vector_shuffle VR128:$src1, VR128:$src2, MOVHLPS_shuffle_mask)))]>; @@ -667,50 +667,50 @@ bit Commutable = 0> { // Scalar operation, reg. def SSr : SSI { let isCommutable = Commutable; } // Scalar operation, mem. def SSm : SSI; // Vector operation, reg. def PSr : PSI { let isCommutable = Commutable; } // Vector operation, mem. def PSm : PSI; // Intrinsic operation, reg. def SSr_Int : SSI { let isCommutable = Commutable; } // Intrinsic operation, mem. def SSm_Int : SSI; // Vector intrinsic operation, reg def PSr_Int : PSI { let isCommutable = Commutable; } // Vector intrinsic operation, mem def PSm_Int : PSI; } @@ -730,46 +730,46 @@ let isCommutable = 1 in { def ANDPSrr : PSI<0x54, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), - "andps {$src2, $dst|$dst, $src2}", + "andps\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v2i64 (and VR128:$src1, VR128:$src2)))]>; def ORPSrr : PSI<0x56, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), - "orps {$src2, $dst|$dst, $src2}", + "orps\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v2i64 (or VR128:$src1, VR128:$src2)))]>; def XORPSrr : PSI<0x57, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), - "xorps {$src2, $dst|$dst, $src2}", + "xorps\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v2i64 (xor VR128:$src1, VR128:$src2)))]>; } def ANDPSrm : PSI<0x54, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, f128mem:$src2), - "andps {$src2, $dst|$dst, $src2}", + "andps\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (and (bc_v2i64 (v4f32 VR128:$src1)), (memopv2i64 addr:$src2)))]>; def ORPSrm : PSI<0x56, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, f128mem:$src2), - "orps {$src2, $dst|$dst, $src2}", + "orps\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (or (bc_v2i64 (v4f32 VR128:$src1)), (memopv2i64 addr:$src2)))]>; def XORPSrm : PSI<0x57, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, f128mem:$src2), - "xorps {$src2, $dst|$dst, $src2}", + "xorps\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (xor (bc_v2i64 (v4f32 VR128:$src1)), (memopv2i64 addr:$src2)))]>; def ANDNPSrr : PSI<0x55, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), - "andnps {$src2, $dst|$dst, $src2}", + "andnps\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v2i64 (and (xor VR128:$src1, (bc_v2i64 (v4i32 immAllOnesV))), VR128:$src2)))]>; def ANDNPSrm : PSI<0x55, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1,f128mem:$src2), - "andnps {$src2, $dst|$dst, $src2}", + "andnps\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v2i64 (and (xor (bc_v2i64 (v4f32 VR128:$src1)), (bc_v2i64 (v4i32 immAllOnesV))), @@ -779,12 +779,12 @@ let isTwoAddress = 1 in { def CMPPSrri : PSIi8<0xC2, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src, SSECC:$cc), - "cmp${cc}ps {$src, $dst|$dst, $src}", + "cmp${cc}ps\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse_cmp_ps VR128:$src1, VR128:$src, imm:$cc))]>; def CMPPSrmi : PSIi8<0xC2, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, f128mem:$src, SSECC:$cc), - "cmp${cc}ps {$src, $dst|$dst, $src}", + "cmp${cc}ps\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse_cmp_ps VR128:$src1, (load addr:$src), imm:$cc))]>; } @@ -795,7 +795,7 @@ def SHUFPSrri : PSIi8<0xC6, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2, i32i8imm:$src3), - "shufps {$src3, $src2, $dst|$dst, $src2, $src3}", + "shufps\t{$src3, $src2, $dst|$dst, $src2, $src3}", [(set VR128:$dst, (v4f32 (vector_shuffle VR128:$src1, VR128:$src2, @@ -803,7 +803,7 @@ def SHUFPSrmi : PSIi8<0xC6, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, f128mem:$src2, i32i8imm:$src3), - "shufps {$src3, $src2, $dst|$dst, $src2, $src3}", + "shufps\t{$src3, $src2, $dst|$dst, $src2, $src3}", [(set VR128:$dst, (v4f32 (vector_shuffle VR128:$src1, (load addr:$src2), @@ -812,14 +812,14 @@ let AddedComplexity = 10 in { def UNPCKHPSrr : PSI<0x15, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), - "unpckhps {$src2, $dst|$dst, $src2}", + "unpckhps\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v4f32 (vector_shuffle VR128:$src1, VR128:$src2, UNPCKH_shuffle_mask)))]>; def UNPCKHPSrm : PSI<0x15, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, f128mem:$src2), - "unpckhps {$src2, $dst|$dst, $src2}", + "unpckhps\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v4f32 (vector_shuffle VR128:$src1, (load addr:$src2), @@ -827,14 +827,14 @@ def UNPCKLPSrr : PSI<0x14, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), - "unpcklps {$src2, $dst|$dst, $src2}", + "unpcklps\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v4f32 (vector_shuffle VR128:$src1, VR128:$src2, UNPCKL_shuffle_mask)))]>; def UNPCKLPSrm : PSI<0x14, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, f128mem:$src2), - "unpcklps {$src2, $dst|$dst, $src2}", + "unpcklps\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v4f32 (vector_shuffle VR128:$src1, (load addr:$src2), @@ -844,22 +844,22 @@ // Mask creation def MOVMSKPSrr : PSI<0x50, MRMSrcReg, (outs GR32:$dst), (ins VR128:$src), - "movmskps {$src, $dst|$dst, $src}", + "movmskps\t{$src, $dst|$dst, $src}", [(set GR32:$dst, (int_x86_sse_movmsk_ps VR128:$src))]>; def MOVMSKPDrr : PSI<0x50, MRMSrcReg, (outs GR32:$dst), (ins VR128:$src), - "movmskpd {$src, $dst|$dst, $src}", + "movmskpd\t{$src, $dst|$dst, $src}", [(set GR32:$dst, (int_x86_sse2_movmsk_pd VR128:$src))]>; // Prefetching loads. // TODO: no intrinsics for these? -def PREFETCHT0 : PSI<0x18, MRM1m, (outs), (ins i8mem:$src), "prefetcht0 $src", []>; -def PREFETCHT1 : PSI<0x18, MRM2m, (outs), (ins i8mem:$src), "prefetcht1 $src", []>; -def PREFETCHT2 : PSI<0x18, MRM3m, (outs), (ins i8mem:$src), "prefetcht2 $src", []>; -def PREFETCHNTA : PSI<0x18, MRM0m, (outs), (ins i8mem:$src), "prefetchnta $src", []>; +def PREFETCHT0 : PSI<0x18, MRM1m, (outs), (ins i8mem:$src), "prefetcht0\t$src", []>; +def PREFETCHT1 : PSI<0x18, MRM2m, (outs), (ins i8mem:$src), "prefetcht1\t$src", []>; +def PREFETCHT2 : PSI<0x18, MRM3m, (outs), (ins i8mem:$src), "prefetcht2\t$src", []>; +def PREFETCHNTA : PSI<0x18, MRM0m, (outs), (ins i8mem:$src), "prefetchnta\t$src", []>; // Non-temporal stores def MOVNTPSmr : PSI<0x2B, MRMDestMem, (outs), (ins i128mem:$dst, VR128:$src), - "movntps {$src, $dst|$dst, $src}", + "movntps\t{$src, $dst|$dst, $src}", [(int_x86_sse_movnt_ps addr:$dst, VR128:$src)]>; // Load, store, and memory fence @@ -867,24 +867,24 @@ // MXCSR register def LDMXCSR : PSI<0xAE, MRM2m, (outs), (ins i32mem:$src), - "ldmxcsr $src", [(int_x86_sse_ldmxcsr addr:$src)]>; + "ldmxcsr\t$src", [(int_x86_sse_ldmxcsr addr:$src)]>; def STMXCSR : PSI<0xAE, MRM3m, (outs), (ins i32mem:$dst), - "stmxcsr $dst", [(int_x86_sse_stmxcsr addr:$dst)]>; + "stmxcsr\t$dst", [(int_x86_sse_stmxcsr addr:$dst)]>; // Alias instructions that map zero vector to pxor / xorp* for sse. // FIXME: remove when we can teach regalloc that xor reg, reg is ok. let isReMaterializable = 1 in def V_SET0 : PSI<0x57, MRMInitReg, (outs VR128:$dst), (ins), - "xorps $dst, $dst", + "xorps\t$dst, $dst", [(set VR128:$dst, (v4f32 immAllZerosV))]>; // FR32 to 128-bit vector conversion. def MOVSS2PSrr : SSI<0x10, MRMSrcReg, (outs VR128:$dst), (ins FR32:$src), - "movss {$src, $dst|$dst, $src}", + "movss\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (v4f32 (scalar_to_vector FR32:$src)))]>; def MOVSS2PSrm : SSI<0x10, MRMSrcMem, (outs VR128:$dst), (ins f32mem:$src), - "movss {$src, $dst|$dst, $src}", + "movss\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (v4f32 (scalar_to_vector (loadf32 addr:$src))))]>; @@ -894,11 +894,11 @@ // def : Pat<(f32 (vector_extract (v4f32 VR128:$src), (iPTR 0))), // (f32 FR32:$src)>; def MOVPS2SSrr : SSI<0x10, MRMSrcReg, (outs FR32:$dst), (ins VR128:$src), - "movss {$src, $dst|$dst, $src}", + "movss\t{$src, $dst|$dst, $src}", [(set FR32:$dst, (vector_extract (v4f32 VR128:$src), (iPTR 0)))]>; def MOVPS2SSmr : SSI<0x11, MRMDestMem, (outs), (ins f32mem:$dst, VR128:$src), - "movss {$src, $dst|$dst, $src}", + "movss\t{$src, $dst|$dst, $src}", [(store (f32 (vector_extract (v4f32 VR128:$src), (iPTR 0))), addr:$dst)]>; @@ -908,12 +908,12 @@ let isTwoAddress = 1 in { def MOVLSS2PSrr : SSI<0x10, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, FR32:$src2), - "movss {$src2, $dst|$dst, $src2}", []>; + "movss\t{$src2, $dst|$dst, $src2}", []>; let AddedComplexity = 15 in def MOVLPSrr : SSI<0x10, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), - "movss {$src2, $dst|$dst, $src2}", + "movss\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v4f32 (vector_shuffle VR128:$src1, VR128:$src2, MOVL_shuffle_mask)))]>; @@ -923,7 +923,7 @@ // Loading from memory automatically zeroing upper bits. let AddedComplexity = 20 in def MOVZSS2PSrm : SSI<0x10, MRMSrcMem, (outs VR128:$dst), (ins f32mem:$src), - "movss {$src, $dst|$dst, $src}", + "movss\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (v4f32 (vector_shuffle immAllZerosV, (v4f32 (scalar_to_vector (loadf32 addr:$src))), MOVL_shuffle_mask)))]>; @@ -935,60 +935,60 @@ // Move Instructions def MOVSDrr : SDI<0x10, MRMSrcReg, (outs FR64:$dst), (ins FR64:$src), - "movsd {$src, $dst|$dst, $src}", []>; + "movsd\t{$src, $dst|$dst, $src}", []>; def MOVSDrm : SDI<0x10, MRMSrcMem, (outs FR64:$dst), (ins f64mem:$src), - "movsd {$src, $dst|$dst, $src}", + "movsd\t{$src, $dst|$dst, $src}", [(set FR64:$dst, (loadf64 addr:$src))]>; def MOVSDmr : SDI<0x11, MRMDestMem, (outs), (ins f64mem:$dst, FR64:$src), - "movsd {$src, $dst|$dst, $src}", + "movsd\t{$src, $dst|$dst, $src}", [(store FR64:$src, addr:$dst)]>; // Conversion instructions def CVTTSD2SIrr : SDI<0x2C, MRMSrcReg, (outs GR32:$dst), (ins FR64:$src), - "cvttsd2si {$src, $dst|$dst, $src}", + "cvttsd2si\t{$src, $dst|$dst, $src}", [(set GR32:$dst, (fp_to_sint FR64:$src))]>; def CVTTSD2SIrm : SDI<0x2C, MRMSrcMem, (outs GR32:$dst), (ins f64mem:$src), - "cvttsd2si {$src, $dst|$dst, $src}", + "cvttsd2si\t{$src, $dst|$dst, $src}", [(set GR32:$dst, (fp_to_sint (loadf64 addr:$src)))]>; def CVTSD2SSrr : SDI<0x5A, MRMSrcReg, (outs FR32:$dst), (ins FR64:$src), - "cvtsd2ss {$src, $dst|$dst, $src}", + "cvtsd2ss\t{$src, $dst|$dst, $src}", [(set FR32:$dst, (fround FR64:$src))]>; def CVTSD2SSrm : SDI<0x5A, MRMSrcMem, (outs FR32:$dst), (ins f64mem:$src), - "cvtsd2ss {$src, $dst|$dst, $src}", + "cvtsd2ss\t{$src, $dst|$dst, $src}", [(set FR32:$dst, (fround (loadf64 addr:$src)))]>; def CVTSI2SDrr : SDI<0x2A, MRMSrcReg, (outs FR64:$dst), (ins GR32:$src), - "cvtsi2sd {$src, $dst|$dst, $src}", + "cvtsi2sd\t{$src, $dst|$dst, $src}", [(set FR64:$dst, (sint_to_fp GR32:$src))]>; def CVTSI2SDrm : SDI<0x2A, MRMSrcMem, (outs FR64:$dst), (ins i32mem:$src), - "cvtsi2sd {$src, $dst|$dst, $src}", + "cvtsi2sd\t{$src, $dst|$dst, $src}", [(set FR64:$dst, (sint_to_fp (loadi32 addr:$src)))]>; // SSE2 instructions with XS prefix def CVTSS2SDrr : I<0x5A, MRMSrcReg, (outs FR64:$dst), (ins FR32:$src), - "cvtss2sd {$src, $dst|$dst, $src}", + "cvtss2sd\t{$src, $dst|$dst, $src}", [(set FR64:$dst, (fextend FR32:$src))]>, XS, Requires<[HasSSE2]>; def CVTSS2SDrm : I<0x5A, MRMSrcMem, (outs FR64:$dst), (ins f32mem:$src), - "cvtss2sd {$src, $dst|$dst, $src}", + "cvtss2sd\t{$src, $dst|$dst, $src}", [(set FR64:$dst, (extloadf32 addr:$src))]>, XS, Requires<[HasSSE2]>; // Match intrinsics which expect XMM operand(s). def Int_CVTSD2SIrr : SDI<0x2D, MRMSrcReg, (outs GR32:$dst), (ins VR128:$src), - "cvtsd2si {$src, $dst|$dst, $src}", + "cvtsd2si\t{$src, $dst|$dst, $src}", [(set GR32:$dst, (int_x86_sse2_cvtsd2si VR128:$src))]>; def Int_CVTSD2SIrm : SDI<0x2D, MRMSrcMem, (outs GR32:$dst), (ins f128mem:$src), - "cvtsd2si {$src, $dst|$dst, $src}", + "cvtsd2si\t{$src, $dst|$dst, $src}", [(set GR32:$dst, (int_x86_sse2_cvtsd2si (load addr:$src)))]>; // Aliases for intrinsics def Int_CVTTSD2SIrr : SDI<0x2C, MRMSrcReg, (outs GR32:$dst), (ins VR128:$src), - "cvttsd2si {$src, $dst|$dst, $src}", + "cvttsd2si\t{$src, $dst|$dst, $src}", [(set GR32:$dst, (int_x86_sse2_cvttsd2si VR128:$src))]>; def Int_CVTTSD2SIrm : SDI<0x2C, MRMSrcMem, (outs GR32:$dst), (ins f128mem:$src), - "cvttsd2si {$src, $dst|$dst, $src}", + "cvttsd2si\t{$src, $dst|$dst, $src}", [(set GR32:$dst, (int_x86_sse2_cvttsd2si (load addr:$src)))]>; @@ -996,45 +996,45 @@ let isTwoAddress = 1 in { def CMPSDrr : SDI<0xC2, MRMSrcReg, (outs FR64:$dst), (ins FR64:$src1, FR64:$src, SSECC:$cc), - "cmp${cc}sd {$src, $dst|$dst, $src}", []>; + "cmp${cc}sd\t{$src, $dst|$dst, $src}", []>; def CMPSDrm : SDI<0xC2, MRMSrcMem, (outs FR64:$dst), (ins FR64:$src1, f64mem:$src, SSECC:$cc), - "cmp${cc}sd {$src, $dst|$dst, $src}", []>; + "cmp${cc}sd\t{$src, $dst|$dst, $src}", []>; } def UCOMISDrr: PDI<0x2E, MRMSrcReg, (outs), (ins FR64:$src1, FR64:$src2), - "ucomisd {$src2, $src1|$src1, $src2}", + "ucomisd\t{$src2, $src1|$src1, $src2}", [(X86cmp FR64:$src1, FR64:$src2)]>; def UCOMISDrm: PDI<0x2E, MRMSrcMem, (outs), (ins FR64:$src1, f64mem:$src2), - "ucomisd {$src2, $src1|$src1, $src2}", + "ucomisd\t{$src2, $src1|$src1, $src2}", [(X86cmp FR64:$src1, (loadf64 addr:$src2))]>; // Aliases to match intrinsics which expect XMM operand(s). let isTwoAddress = 1 in { def Int_CMPSDrr : SDI<0xC2, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src, SSECC:$cc), - "cmp${cc}sd {$src, $dst|$dst, $src}", + "cmp${cc}sd\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse2_cmp_sd VR128:$src1, VR128:$src, imm:$cc))]>; def Int_CMPSDrm : SDI<0xC2, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, f64mem:$src, SSECC:$cc), - "cmp${cc}sd {$src, $dst|$dst, $src}", + "cmp${cc}sd\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse2_cmp_sd VR128:$src1, (load addr:$src), imm:$cc))]>; } def Int_UCOMISDrr: PDI<0x2E, MRMSrcReg, (outs), (ins VR128:$src1, VR128:$src2), - "ucomisd {$src2, $src1|$src1, $src2}", + "ucomisd\t{$src2, $src1|$src1, $src2}", [(X86ucomi (v2f64 VR128:$src1), (v2f64 VR128:$src2))]>; def Int_UCOMISDrm: PDI<0x2E, MRMSrcMem, (outs), (ins VR128:$src1, f128mem:$src2), - "ucomisd {$src2, $src1|$src1, $src2}", + "ucomisd\t{$src2, $src1|$src1, $src2}", [(X86ucomi (v2f64 VR128:$src1), (load addr:$src2))]>; def Int_COMISDrr: PDI<0x2F, MRMSrcReg, (outs), (ins VR128:$src1, VR128:$src2), - "comisd {$src2, $src1|$src1, $src2}", + "comisd\t{$src2, $src1|$src1, $src2}", [(X86comi (v2f64 VR128:$src1), (v2f64 VR128:$src2))]>; def Int_COMISDrm: PDI<0x2F, MRMSrcMem, (outs), (ins VR128:$src1, f128mem:$src2), - "comisd {$src2, $src1|$src1, $src2}", + "comisd\t{$src2, $src1|$src1, $src2}", [(X86comi (v2f64 VR128:$src1), (load addr:$src2))]>; // Aliases of packed SSE2 instructions for scalar use. These all have names that @@ -1042,53 +1042,53 @@ // Alias instructions that map fld0 to pxor for sse. def FsFLD0SD : I<0xEF, MRMInitReg, (outs FR64:$dst), (ins), - "pxor $dst, $dst", [(set FR64:$dst, fpimm0)]>, + "pxor\t$dst, $dst", [(set FR64:$dst, fpimm0)]>, Requires<[HasSSE2]>, TB, OpSize; // Alias instruction to do FR64 reg-to-reg copy using movapd. Upper bits are // disregarded. def FsMOVAPDrr : PDI<0x28, MRMSrcReg, (outs FR64:$dst), (ins FR64:$src), - "movapd {$src, $dst|$dst, $src}", []>; + "movapd\t{$src, $dst|$dst, $src}", []>; // Alias instruction to load FR64 from f128mem using movapd. Upper bits are // disregarded. def FsMOVAPDrm : PDI<0x28, MRMSrcMem, (outs FR64:$dst), (ins f128mem:$src), - "movapd {$src, $dst|$dst, $src}", + "movapd\t{$src, $dst|$dst, $src}", [(set FR64:$dst, (alignedloadfsf64 addr:$src))]>; // Alias bitwise logical operations using SSE logical ops on packed FP values. let isTwoAddress = 1 in { let isCommutable = 1 in { def FsANDPDrr : PDI<0x54, MRMSrcReg, (outs FR64:$dst), (ins FR64:$src1, FR64:$src2), - "andpd {$src2, $dst|$dst, $src2}", + "andpd\t{$src2, $dst|$dst, $src2}", [(set FR64:$dst, (X86fand FR64:$src1, FR64:$src2))]>; def FsORPDrr : PDI<0x56, MRMSrcReg, (outs FR64:$dst), (ins FR64:$src1, FR64:$src2), - "orpd {$src2, $dst|$dst, $src2}", + "orpd\t{$src2, $dst|$dst, $src2}", [(set FR64:$dst, (X86for FR64:$src1, FR64:$src2))]>; def FsXORPDrr : PDI<0x57, MRMSrcReg, (outs FR64:$dst), (ins FR64:$src1, FR64:$src2), - "xorpd {$src2, $dst|$dst, $src2}", + "xorpd\t{$src2, $dst|$dst, $src2}", [(set FR64:$dst, (X86fxor FR64:$src1, FR64:$src2))]>; } def FsANDPDrm : PDI<0x54, MRMSrcMem, (outs FR64:$dst), (ins FR64:$src1, f128mem:$src2), - "andpd {$src2, $dst|$dst, $src2}", + "andpd\t{$src2, $dst|$dst, $src2}", [(set FR64:$dst, (X86fand FR64:$src1, (memopfsf64 addr:$src2)))]>; def FsORPDrm : PDI<0x56, MRMSrcMem, (outs FR64:$dst), (ins FR64:$src1, f128mem:$src2), - "orpd {$src2, $dst|$dst, $src2}", + "orpd\t{$src2, $dst|$dst, $src2}", [(set FR64:$dst, (X86for FR64:$src1, (memopfsf64 addr:$src2)))]>; def FsXORPDrm : PDI<0x57, MRMSrcMem, (outs FR64:$dst), (ins FR64:$src1, f128mem:$src2), - "xorpd {$src2, $dst|$dst, $src2}", + "xorpd\t{$src2, $dst|$dst, $src2}", [(set FR64:$dst, (X86fxor FR64:$src1, (memopfsf64 addr:$src2)))]>; def FsANDNPDrr : PDI<0x55, MRMSrcReg, (outs FR64:$dst), (ins FR64:$src1, FR64:$src2), - "andnpd {$src2, $dst|$dst, $src2}", []>; + "andnpd\t{$src2, $dst|$dst, $src2}", []>; def FsANDNPDrm : PDI<0x55, MRMSrcMem, (outs FR64:$dst), (ins FR64:$src1, f128mem:$src2), - "andnpd {$src2, $dst|$dst, $src2}", []>; + "andnpd\t{$src2, $dst|$dst, $src2}", []>; } /// basic_sse2_fp_binop_rm - SSE2 binops come in both scalar and vector forms. @@ -1107,38 +1107,38 @@ bit Commutable = 0> { // Scalar operation, reg+reg. def SDrr : SDI { let isCommutable = Commutable; } // Scalar operation, reg+mem. def SDrm : SDI; // Vector operation, reg+reg. def PDrr : PDI { let isCommutable = Commutable; } // Vector operation, reg+mem. def PDrm : PDI; // Intrinsic operation, reg+reg. def SDrr_Int : SDI { let isCommutable = Commutable; } // Intrinsic operation, reg+mem. def SDrm_Int : SDI; } @@ -1168,51 +1168,51 @@ // Scalar operation, reg+reg. def SDrr : SDI { let isCommutable = Commutable; } // Scalar operation, reg+mem. def SDrm : SDI; // Vector operation, reg+reg. def PDrr : PDI { let isCommutable = Commutable; } // Vector operation, reg+mem. def PDrm : PDI; // Intrinsic operation, reg+reg. def SDrr_Int : SDI { let isCommutable = Commutable; } // Intrinsic operation, reg+mem. def SDrm_Int : SDI; // Vector intrinsic operation, reg+reg. def PDrr_Int : PDI { let isCommutable = Commutable; } // Vector intrinsic operation, reg+mem. def PDrm_Int : PDI; } } @@ -1227,44 +1227,44 @@ // Move Instructions def MOVAPDrr : PDI<0x28, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src), - "movapd {$src, $dst|$dst, $src}", []>; + "movapd\t{$src, $dst|$dst, $src}", []>; def MOVAPDrm : PDI<0x28, MRMSrcMem, (outs VR128:$dst), (ins f128mem:$src), - "movapd {$src, $dst|$dst, $src}", + "movapd\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (alignedloadv2f64 addr:$src))]>; def MOVAPDmr : PDI<0x29, MRMDestMem, (outs), (ins f128mem:$dst, VR128:$src), - "movapd {$src, $dst|$dst, $src}", + "movapd\t{$src, $dst|$dst, $src}", [(alignedstore (v2f64 VR128:$src), addr:$dst)]>; def MOVUPDrr : PDI<0x10, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src), - "movupd {$src, $dst|$dst, $src}", []>; + "movupd\t{$src, $dst|$dst, $src}", []>; def MOVUPDrm : PDI<0x10, MRMSrcMem, (outs VR128:$dst), (ins f128mem:$src), - "movupd {$src, $dst|$dst, $src}", + "movupd\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (loadv2f64 addr:$src))]>; def MOVUPDmr : PDI<0x11, MRMDestMem, (outs), (ins f128mem:$dst, VR128:$src), - "movupd {$src, $dst|$dst, $src}", + "movupd\t{$src, $dst|$dst, $src}", [(store (v2f64 VR128:$src), addr:$dst)]>; // Intrinsic forms of MOVUPD load and store def MOVUPDrm_Int : PDI<0x10, MRMSrcMem, (outs VR128:$dst), (ins f128mem:$src), - "movupd {$src, $dst|$dst, $src}", + "movupd\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse2_loadu_pd addr:$src))]>; def MOVUPDmr_Int : PDI<0x11, MRMDestMem, (outs), (ins f128mem:$dst, VR128:$src), - "movupd {$src, $dst|$dst, $src}", + "movupd\t{$src, $dst|$dst, $src}", [(int_x86_sse2_storeu_pd addr:$dst, VR128:$src)]>; let isTwoAddress = 1 in { let AddedComplexity = 20 in { def MOVLPDrm : PDI<0x12, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, f64mem:$src2), - "movlpd {$src2, $dst|$dst, $src2}", + "movlpd\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v2f64 (vector_shuffle VR128:$src1, (scalar_to_vector (loadf64 addr:$src2)), MOVLP_shuffle_mask)))]>; def MOVHPDrm : PDI<0x16, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, f64mem:$src2), - "movhpd {$src2, $dst|$dst, $src2}", + "movhpd\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v2f64 (vector_shuffle VR128:$src1, (scalar_to_vector (loadf64 addr:$src2)), @@ -1273,14 +1273,14 @@ } // isTwoAddress def MOVLPDmr : PDI<0x13, MRMDestMem, (outs), (ins f64mem:$dst, VR128:$src), - "movlpd {$src, $dst|$dst, $src}", + "movlpd\t{$src, $dst|$dst, $src}", [(store (f64 (vector_extract (v2f64 VR128:$src), (iPTR 0))), addr:$dst)]>; // v2f64 extract element 1 is always custom lowered to unpack high to low // and extract element 0 so the non-store version isn't too horrible. def MOVHPDmr : PDI<0x17, MRMDestMem, (outs), (ins f64mem:$dst, VR128:$src), - "movhpd {$src, $dst|$dst, $src}", + "movhpd\t{$src, $dst|$dst, $src}", [(store (f64 (vector_extract (v2f64 (vector_shuffle VR128:$src, (undef), UNPCKH_shuffle_mask)), (iPTR 0))), @@ -1288,79 +1288,79 @@ // SSE2 instructions without OpSize prefix def Int_CVTDQ2PSrr : I<0x5B, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src), - "cvtdq2ps {$src, $dst|$dst, $src}", + "cvtdq2ps\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse2_cvtdq2ps VR128:$src))]>, TB, Requires<[HasSSE2]>; def Int_CVTDQ2PSrm : I<0x5B, MRMSrcMem, (outs VR128:$dst), (ins i128mem:$src), - "cvtdq2ps {$src, $dst|$dst, $src}", + "cvtdq2ps\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse2_cvtdq2ps (bitconvert (memopv2i64 addr:$src))))]>, TB, Requires<[HasSSE2]>; // SSE2 instructions with XS prefix def Int_CVTDQ2PDrr : I<0xE6, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src), - "cvtdq2pd {$src, $dst|$dst, $src}", + "cvtdq2pd\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse2_cvtdq2pd VR128:$src))]>, XS, Requires<[HasSSE2]>; def Int_CVTDQ2PDrm : I<0xE6, MRMSrcMem, (outs VR128:$dst), (ins i64mem:$src), - "cvtdq2pd {$src, $dst|$dst, $src}", + "cvtdq2pd\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse2_cvtdq2pd (bitconvert (memopv2i64 addr:$src))))]>, XS, Requires<[HasSSE2]>; def Int_CVTPS2DQrr : PDI<0x5B, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src), - "cvtps2dq {$src, $dst|$dst, $src}", + "cvtps2dq\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse2_cvtps2dq VR128:$src))]>; def Int_CVTPS2DQrm : PDI<0x5B, MRMSrcMem, (outs VR128:$dst), (ins f128mem:$src), - "cvtps2dq {$src, $dst|$dst, $src}", + "cvtps2dq\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse2_cvtps2dq (load addr:$src)))]>; // SSE2 packed instructions with XS prefix def Int_CVTTPS2DQrr : I<0x5B, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src), - "cvttps2dq {$src, $dst|$dst, $src}", + "cvttps2dq\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse2_cvttps2dq VR128:$src))]>, XS, Requires<[HasSSE2]>; def Int_CVTTPS2DQrm : I<0x5B, MRMSrcMem, (outs VR128:$dst), (ins f128mem:$src), - "cvttps2dq {$src, $dst|$dst, $src}", + "cvttps2dq\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse2_cvttps2dq (load addr:$src)))]>, XS, Requires<[HasSSE2]>; // SSE2 packed instructions with XD prefix def Int_CVTPD2DQrr : I<0xE6, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src), - "cvtpd2dq {$src, $dst|$dst, $src}", + "cvtpd2dq\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse2_cvtpd2dq VR128:$src))]>, XD, Requires<[HasSSE2]>; def Int_CVTPD2DQrm : I<0xE6, MRMSrcMem, (outs VR128:$dst), (ins f128mem:$src), - "cvtpd2dq {$src, $dst|$dst, $src}", + "cvtpd2dq\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse2_cvtpd2dq (load addr:$src)))]>, XD, Requires<[HasSSE2]>; def Int_CVTTPD2DQrr : PDI<0xE6, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src), - "cvttpd2dq {$src, $dst|$dst, $src}", + "cvttpd2dq\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse2_cvttpd2dq VR128:$src))]>; def Int_CVTTPD2DQrm : PDI<0xE6, MRMSrcMem, (outs VR128:$dst), (ins f128mem:$src), - "cvttpd2dq {$src, $dst|$dst, $src}", + "cvttpd2dq\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse2_cvttpd2dq (load addr:$src)))]>; // SSE2 instructions without OpSize prefix def Int_CVTPS2PDrr : I<0x5A, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src), - "cvtps2pd {$src, $dst|$dst, $src}", + "cvtps2pd\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse2_cvtps2pd VR128:$src))]>, TB, Requires<[HasSSE2]>; def Int_CVTPS2PDrm : I<0x5A, MRMSrcReg, (outs VR128:$dst), (ins f64mem:$src), - "cvtps2pd {$src, $dst|$dst, $src}", + "cvtps2pd\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse2_cvtps2pd (load addr:$src)))]>, TB, Requires<[HasSSE2]>; def Int_CVTPD2PSrr : PDI<0x5A, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src), - "cvtpd2ps {$src, $dst|$dst, $src}", + "cvtpd2ps\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse2_cvtpd2ps VR128:$src))]>; def Int_CVTPD2PSrm : PDI<0x5A, MRMSrcReg, (outs VR128:$dst), (ins f128mem:$src), - "cvtpd2ps {$src, $dst|$dst, $src}", + "cvtpd2ps\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse2_cvtpd2ps (load addr:$src)))]>; @@ -1369,33 +1369,33 @@ let isTwoAddress = 1 in { def Int_CVTSI2SDrr: SDI<0x2A, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, GR32:$src2), - "cvtsi2sd {$src2, $dst|$dst, $src2}", + "cvtsi2sd\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (int_x86_sse2_cvtsi2sd VR128:$src1, GR32:$src2))]>; def Int_CVTSI2SDrm: SDI<0x2A, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, i32mem:$src2), - "cvtsi2sd {$src2, $dst|$dst, $src2}", + "cvtsi2sd\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (int_x86_sse2_cvtsi2sd VR128:$src1, (loadi32 addr:$src2)))]>; def Int_CVTSD2SSrr: SDI<0x5A, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), - "cvtsd2ss {$src2, $dst|$dst, $src2}", + "cvtsd2ss\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (int_x86_sse2_cvtsd2ss VR128:$src1, VR128:$src2))]>; def Int_CVTSD2SSrm: SDI<0x5A, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, f64mem:$src2), - "cvtsd2ss {$src2, $dst|$dst, $src2}", + "cvtsd2ss\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (int_x86_sse2_cvtsd2ss VR128:$src1, (load addr:$src2)))]>; def Int_CVTSS2SDrr: I<0x5A, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), - "cvtss2sd {$src2, $dst|$dst, $src2}", + "cvtss2sd\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (int_x86_sse2_cvtss2sd VR128:$src1, VR128:$src2))]>, XS, Requires<[HasSSE2]>; def Int_CVTSS2SDrm: I<0x5A, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, f32mem:$src2), - "cvtss2sd {$src2, $dst|$dst, $src2}", + "cvtss2sd\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (int_x86_sse2_cvtss2sd VR128:$src1, (load addr:$src2)))]>, XS, Requires<[HasSSE2]>; @@ -1422,50 +1422,50 @@ bit Commutable = 0> { // Scalar operation, reg. def SDr : SDI { let isCommutable = Commutable; } // Scalar operation, mem. def SDm : SDI; // Vector operation, reg. def PDr : PDI { let isCommutable = Commutable; } // Vector operation, mem. def PDm : PDI; // Intrinsic operation, reg. def SDr_Int : SDI { let isCommutable = Commutable; } // Intrinsic operation, mem. def SDm_Int : SDI; // Vector intrinsic operation, reg def PDr_Int : PDI { let isCommutable = Commutable; } // Vector intrinsic operation, mem def PDm_Int : PDI; } @@ -1480,19 +1480,19 @@ let isCommutable = 1 in { def ANDPDrr : PDI<0x54, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), - "andpd {$src2, $dst|$dst, $src2}", + "andpd\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (and (bc_v2i64 (v2f64 VR128:$src1)), (bc_v2i64 (v2f64 VR128:$src2))))]>; def ORPDrr : PDI<0x56, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), - "orpd {$src2, $dst|$dst, $src2}", + "orpd\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (or (bc_v2i64 (v2f64 VR128:$src1)), (bc_v2i64 (v2f64 VR128:$src2))))]>; def XORPDrr : PDI<0x57, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), - "xorpd {$src2, $dst|$dst, $src2}", + "xorpd\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (xor (bc_v2i64 (v2f64 VR128:$src1)), (bc_v2i64 (v2f64 VR128:$src2))))]>; @@ -1500,31 +1500,31 @@ def ANDPDrm : PDI<0x54, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, f128mem:$src2), - "andpd {$src2, $dst|$dst, $src2}", + "andpd\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (and (bc_v2i64 (v2f64 VR128:$src1)), (memopv2i64 addr:$src2)))]>; def ORPDrm : PDI<0x56, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, f128mem:$src2), - "orpd {$src2, $dst|$dst, $src2}", + "orpd\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (or (bc_v2i64 (v2f64 VR128:$src1)), (memopv2i64 addr:$src2)))]>; def XORPDrm : PDI<0x57, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, f128mem:$src2), - "xorpd {$src2, $dst|$dst, $src2}", + "xorpd\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (xor (bc_v2i64 (v2f64 VR128:$src1)), (memopv2i64 addr:$src2)))]>; def ANDNPDrr : PDI<0x55, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), - "andnpd {$src2, $dst|$dst, $src2}", + "andnpd\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (and (vnot (bc_v2i64 (v2f64 VR128:$src1))), (bc_v2i64 (v2f64 VR128:$src2))))]>; def ANDNPDrm : PDI<0x55, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1,f128mem:$src2), - "andnpd {$src2, $dst|$dst, $src2}", + "andnpd\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (and (vnot (bc_v2i64 (v2f64 VR128:$src1))), (memopv2i64 addr:$src2)))]>; @@ -1533,12 +1533,12 @@ let isTwoAddress = 1 in { def CMPPDrri : PDIi8<0xC2, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src, SSECC:$cc), - "cmp${cc}pd {$src, $dst|$dst, $src}", + "cmp${cc}pd\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse2_cmp_pd VR128:$src1, VR128:$src, imm:$cc))]>; def CMPPDrmi : PDIi8<0xC2, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, f128mem:$src, SSECC:$cc), - "cmp${cc}pd {$src, $dst|$dst, $src}", + "cmp${cc}pd\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse2_cmp_pd VR128:$src1, (load addr:$src), imm:$cc))]>; } @@ -1547,14 +1547,14 @@ let isTwoAddress = 1 in { def SHUFPDrri : PDIi8<0xC6, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2, i8imm:$src3), - "shufpd {$src3, $src2, $dst|$dst, $src2, $src3}", + "shufpd\t{$src3, $src2, $dst|$dst, $src2, $src3}", [(set VR128:$dst, (v2f64 (vector_shuffle VR128:$src1, VR128:$src2, SHUFP_shuffle_mask:$src3)))]>; def SHUFPDrmi : PDIi8<0xC6, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, f128mem:$src2, i8imm:$src3), - "shufpd {$src3, $src2, $dst|$dst, $src2, $src3}", + "shufpd\t{$src3, $src2, $dst|$dst, $src2, $src3}", [(set VR128:$dst, (v2f64 (vector_shuffle VR128:$src1, (load addr:$src2), @@ -1563,14 +1563,14 @@ let AddedComplexity = 10 in { def UNPCKHPDrr : PDI<0x15, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), - "unpckhpd {$src2, $dst|$dst, $src2}", + "unpckhpd\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v2f64 (vector_shuffle VR128:$src1, VR128:$src2, UNPCKH_shuffle_mask)))]>; def UNPCKHPDrm : PDI<0x15, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, f128mem:$src2), - "unpckhpd {$src2, $dst|$dst, $src2}", + "unpckhpd\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v2f64 (vector_shuffle VR128:$src1, (load addr:$src2), @@ -1578,14 +1578,14 @@ def UNPCKLPDrr : PDI<0x14, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), - "unpcklpd {$src2, $dst|$dst, $src2}", + "unpcklpd\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v2f64 (vector_shuffle VR128:$src1, VR128:$src2, UNPCKL_shuffle_mask)))]>; def UNPCKLPDrm : PDI<0x14, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, f128mem:$src2), - "unpcklpd {$src2, $dst|$dst, $src2}", + "unpcklpd\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v2f64 (vector_shuffle VR128:$src1, (load addr:$src2), @@ -1599,29 +1599,29 @@ // Move Instructions def MOVDQArr : PDI<0x6F, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src), - "movdqa {$src, $dst|$dst, $src}", []>; + "movdqa\t{$src, $dst|$dst, $src}", []>; def MOVDQArm : PDI<0x6F, MRMSrcMem, (outs VR128:$dst), (ins i128mem:$src), - "movdqa {$src, $dst|$dst, $src}", + "movdqa\t{$src, $dst|$dst, $src}", [/*(set VR128:$dst, (alignedloadv2i64 addr:$src))*/]>; def MOVDQAmr : PDI<0x7F, MRMDestMem, (outs), (ins i128mem:$dst, VR128:$src), - "movdqa {$src, $dst|$dst, $src}", + "movdqa\t{$src, $dst|$dst, $src}", [/*(alignedstore (v2i64 VR128:$src), addr:$dst)*/]>; def MOVDQUrm : I<0x6F, MRMSrcMem, (outs VR128:$dst), (ins i128mem:$src), - "movdqu {$src, $dst|$dst, $src}", + "movdqu\t{$src, $dst|$dst, $src}", [/*(set VR128:$dst, (loadv2i64 addr:$src))*/]>, XS, Requires<[HasSSE2]>; def MOVDQUmr : I<0x7F, MRMDestMem, (outs), (ins i128mem:$dst, VR128:$src), - "movdqu {$src, $dst|$dst, $src}", + "movdqu\t{$src, $dst|$dst, $src}", [/*(store (v2i64 VR128:$src), addr:$dst)*/]>, XS, Requires<[HasSSE2]>; // Intrinsic forms of MOVDQU load and store def MOVDQUrm_Int : I<0x6F, MRMSrcMem, (outs VR128:$dst), (ins i128mem:$src), - "movdqu {$src, $dst|$dst, $src}", + "movdqu\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse2_loadu_dq addr:$src))]>, XS, Requires<[HasSSE2]>; def MOVDQUmr_Int : I<0x7F, MRMDestMem, (outs), (ins i128mem:$dst, VR128:$src), - "movdqu {$src, $dst|$dst, $src}", + "movdqu\t{$src, $dst|$dst, $src}", [(int_x86_sse2_storeu_dq addr:$dst, VR128:$src)]>, XS, Requires<[HasSSE2]>; @@ -1630,12 +1630,12 @@ multiclass PDI_binop_rm_int opc, string OpcodeStr, Intrinsic IntId, bit Commutable = 0> { def rr : PDI { let isCommutable = Commutable; } def rm : PDI; } @@ -1643,14 +1643,14 @@ multiclass PDI_binop_rmi_int opc, bits<8> opc2, Format ImmForm, string OpcodeStr, Intrinsic IntId> { def rr : PDI; def rm : PDI; def ri : PDIi8; } @@ -1660,12 +1660,12 @@ multiclass PDI_binop_rm opc, string OpcodeStr, SDNode OpNode, ValueType OpVT, bit Commutable = 0> { def rr : PDI { let isCommutable = Commutable; } def rm : PDI; } @@ -1678,12 +1678,12 @@ multiclass PDI_binop_rm_v2i64 opc, string OpcodeStr, SDNode OpNode, bit Commutable = 0> { def rr : PDI { let isCommutable = Commutable; } def rm : PDI; } @@ -1746,10 +1746,10 @@ let isTwoAddress = 1 in { def PSLLDQri : PDIi8<0x73, MRM7r, (outs VR128:$dst), (ins VR128:$src1, i32i8imm:$src2), - "pslldq {$src2, $dst|$dst, $src2}", []>; + "pslldq\t{$src2, $dst|$dst, $src2}", []>; def PSRLDQri : PDIi8<0x73, MRM3r, (outs VR128:$dst), (ins VR128:$src1, i32i8imm:$src2), - "psrldq {$src2, $dst|$dst, $src2}", []>; + "psrldq\t{$src2, $dst|$dst, $src2}", []>; // PSRADQri doesn't exist in SSE[1-3]. } @@ -1770,13 +1770,13 @@ let isTwoAddress = 1 in { def PANDNrr : PDI<0xDF, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), - "pandn {$src2, $dst|$dst, $src2}", + "pandn\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v2i64 (and (vnot VR128:$src1), VR128:$src2)))]>; def PANDNrm : PDI<0xDF, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, i128mem:$src2), - "pandn {$src2, $dst|$dst, $src2}", + "pandn\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v2i64 (and (vnot VR128:$src1), (load addr:$src2))))]>; } @@ -1797,13 +1797,13 @@ // Shuffle and unpack instructions def PSHUFDri : PDIi8<0x70, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, i8imm:$src2), - "pshufd {$src2, $src1, $dst|$dst, $src1, $src2}", + "pshufd\t{$src2, $src1, $dst|$dst, $src1, $src2}", [(set VR128:$dst, (v4i32 (vector_shuffle VR128:$src1, (undef), PSHUFD_shuffle_mask:$src2)))]>; def PSHUFDmi : PDIi8<0x70, MRMSrcMem, (outs VR128:$dst), (ins i128mem:$src1, i8imm:$src2), - "pshufd {$src2, $src1, $dst|$dst, $src1, $src2}", + "pshufd\t{$src2, $src1, $dst|$dst, $src1, $src2}", [(set VR128:$dst, (v4i32 (vector_shuffle (bc_v4i32(memopv2i64 addr:$src1)), (undef), @@ -1812,14 +1812,14 @@ // SSE2 with ImmT == Imm8 and XS prefix. def PSHUFHWri : Ii8<0x70, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, i8imm:$src2), - "pshufhw {$src2, $src1, $dst|$dst, $src1, $src2}", + "pshufhw\t{$src2, $src1, $dst|$dst, $src1, $src2}", [(set VR128:$dst, (v8i16 (vector_shuffle VR128:$src1, (undef), PSHUFHW_shuffle_mask:$src2)))]>, XS, Requires<[HasSSE2]>; def PSHUFHWmi : Ii8<0x70, MRMSrcMem, (outs VR128:$dst), (ins i128mem:$src1, i8imm:$src2), - "pshufhw {$src2, $src1, $dst|$dst, $src1, $src2}", + "pshufhw\t{$src2, $src1, $dst|$dst, $src1, $src2}", [(set VR128:$dst, (v8i16 (vector_shuffle (bc_v8i16 (memopv2i64 addr:$src1)), (undef), @@ -1829,14 +1829,14 @@ // SSE2 with ImmT == Imm8 and XD prefix. def PSHUFLWri : Ii8<0x70, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, i32i8imm:$src2), - "pshuflw {$src2, $src1, $dst|$dst, $src1, $src2}", + "pshuflw\t{$src2, $src1, $dst|$dst, $src1, $src2}", [(set VR128:$dst, (v8i16 (vector_shuffle VR128:$src1, (undef), PSHUFLW_shuffle_mask:$src2)))]>, XD, Requires<[HasSSE2]>; def PSHUFLWmi : Ii8<0x70, MRMSrcMem, (outs VR128:$dst), (ins i128mem:$src1, i32i8imm:$src2), - "pshuflw {$src2, $src1, $dst|$dst, $src1, $src2}", + "pshuflw\t{$src2, $src1, $dst|$dst, $src1, $src2}", [(set VR128:$dst, (v8i16 (vector_shuffle (bc_v8i16 (memopv2i64 addr:$src1)), (undef), @@ -1847,52 +1847,52 @@ let isTwoAddress = 1 in { def PUNPCKLBWrr : PDI<0x60, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), - "punpcklbw {$src2, $dst|$dst, $src2}", + "punpcklbw\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v16i8 (vector_shuffle VR128:$src1, VR128:$src2, UNPCKL_shuffle_mask)))]>; def PUNPCKLBWrm : PDI<0x60, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, i128mem:$src2), - "punpcklbw {$src2, $dst|$dst, $src2}", + "punpcklbw\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v16i8 (vector_shuffle VR128:$src1, (bc_v16i8 (memopv2i64 addr:$src2)), UNPCKL_shuffle_mask)))]>; def PUNPCKLWDrr : PDI<0x61, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), - "punpcklwd {$src2, $dst|$dst, $src2}", + "punpcklwd\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v8i16 (vector_shuffle VR128:$src1, VR128:$src2, UNPCKL_shuffle_mask)))]>; def PUNPCKLWDrm : PDI<0x61, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, i128mem:$src2), - "punpcklwd {$src2, $dst|$dst, $src2}", + "punpcklwd\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v8i16 (vector_shuffle VR128:$src1, (bc_v8i16 (memopv2i64 addr:$src2)), UNPCKL_shuffle_mask)))]>; def PUNPCKLDQrr : PDI<0x62, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), - "punpckldq {$src2, $dst|$dst, $src2}", + "punpckldq\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v4i32 (vector_shuffle VR128:$src1, VR128:$src2, UNPCKL_shuffle_mask)))]>; def PUNPCKLDQrm : PDI<0x62, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, i128mem:$src2), - "punpckldq {$src2, $dst|$dst, $src2}", + "punpckldq\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v4i32 (vector_shuffle VR128:$src1, (bc_v4i32 (memopv2i64 addr:$src2)), UNPCKL_shuffle_mask)))]>; def PUNPCKLQDQrr : PDI<0x6C, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), - "punpcklqdq {$src2, $dst|$dst, $src2}", + "punpcklqdq\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v2i64 (vector_shuffle VR128:$src1, VR128:$src2, UNPCKL_shuffle_mask)))]>; def PUNPCKLQDQrm : PDI<0x6C, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, i128mem:$src2), - "punpcklqdq {$src2, $dst|$dst, $src2}", + "punpcklqdq\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v2i64 (vector_shuffle VR128:$src1, (memopv2i64 addr:$src2), @@ -1900,52 +1900,52 @@ def PUNPCKHBWrr : PDI<0x68, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), - "punpckhbw {$src2, $dst|$dst, $src2}", + "punpckhbw\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v16i8 (vector_shuffle VR128:$src1, VR128:$src2, UNPCKH_shuffle_mask)))]>; def PUNPCKHBWrm : PDI<0x68, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, i128mem:$src2), - "punpckhbw {$src2, $dst|$dst, $src2}", + "punpckhbw\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v16i8 (vector_shuffle VR128:$src1, (bc_v16i8 (memopv2i64 addr:$src2)), UNPCKH_shuffle_mask)))]>; def PUNPCKHWDrr : PDI<0x69, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), - "punpckhwd {$src2, $dst|$dst, $src2}", + "punpckhwd\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v8i16 (vector_shuffle VR128:$src1, VR128:$src2, UNPCKH_shuffle_mask)))]>; def PUNPCKHWDrm : PDI<0x69, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, i128mem:$src2), - "punpckhwd {$src2, $dst|$dst, $src2}", + "punpckhwd\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v8i16 (vector_shuffle VR128:$src1, (bc_v8i16 (memopv2i64 addr:$src2)), UNPCKH_shuffle_mask)))]>; def PUNPCKHDQrr : PDI<0x6A, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), - "punpckhdq {$src2, $dst|$dst, $src2}", + "punpckhdq\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v4i32 (vector_shuffle VR128:$src1, VR128:$src2, UNPCKH_shuffle_mask)))]>; def PUNPCKHDQrm : PDI<0x6A, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, i128mem:$src2), - "punpckhdq {$src2, $dst|$dst, $src2}", + "punpckhdq\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v4i32 (vector_shuffle VR128:$src1, (bc_v4i32 (memopv2i64 addr:$src2)), UNPCKH_shuffle_mask)))]>; def PUNPCKHQDQrr : PDI<0x6D, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), - "punpckhqdq {$src2, $dst|$dst, $src2}", + "punpckhqdq\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v2i64 (vector_shuffle VR128:$src1, VR128:$src2, UNPCKH_shuffle_mask)))]>; def PUNPCKHQDQrm : PDI<0x6D, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, i128mem:$src2), - "punpckhqdq {$src2, $dst|$dst, $src2}", + "punpckhqdq\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v2i64 (vector_shuffle VR128:$src1, (memopv2i64 addr:$src2), @@ -1955,21 +1955,21 @@ // Extract / Insert def PEXTRWri : PDIi8<0xC5, MRMSrcReg, (outs GR32:$dst), (ins VR128:$src1, i32i8imm:$src2), - "pextrw {$src2, $src1, $dst|$dst, $src1, $src2}", + "pextrw\t{$src2, $src1, $dst|$dst, $src1, $src2}", [(set GR32:$dst, (X86pextrw (v8i16 VR128:$src1), (iPTR imm:$src2)))]>; let isTwoAddress = 1 in { def PINSRWrri : PDIi8<0xC4, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, GR32:$src2, i32i8imm:$src3), - "pinsrw {$src3, $src2, $dst|$dst, $src2, $src3}", + "pinsrw\t{$src3, $src2, $dst|$dst, $src2, $src3}", [(set VR128:$dst, (v8i16 (X86pinsrw (v8i16 VR128:$src1), GR32:$src2, (iPTR imm:$src3))))]>; def PINSRWrmi : PDIi8<0xC4, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, i16mem:$src2, i32i8imm:$src3), - "pinsrw {$src3, $src2, $dst|$dst, $src2, $src3}", + "pinsrw\t{$src3, $src2, $dst|$dst, $src2, $src3}", [(set VR128:$dst, (v8i16 (X86pinsrw (v8i16 VR128:$src1), (i32 (anyext (loadi16 addr:$src2))), @@ -1978,30 +1978,30 @@ // Mask creation def PMOVMSKBrr : PDI<0xD7, MRMSrcReg, (outs GR32:$dst), (ins VR128:$src), - "pmovmskb {$src, $dst|$dst, $src}", + "pmovmskb\t{$src, $dst|$dst, $src}", [(set GR32:$dst, (int_x86_sse2_pmovmskb_128 VR128:$src))]>; // Conditional store def MASKMOVDQU : PDI<0xF7, MRMSrcReg, (outs), (ins VR128:$src, VR128:$mask), - "maskmovdqu {$mask, $src|$src, $mask}", + "maskmovdqu\t{$mask, $src|$src, $mask}", [(int_x86_sse2_maskmov_dqu VR128:$src, VR128:$mask, EDI)]>, Imp<[EDI],[]>; // Non-temporal stores def MOVNTPDmr : PDI<0x2B, MRMDestMem, (outs), (ins i128mem:$dst, VR128:$src), - "movntpd {$src, $dst|$dst, $src}", + "movntpd\t{$src, $dst|$dst, $src}", [(int_x86_sse2_movnt_pd addr:$dst, VR128:$src)]>; def MOVNTDQmr : PDI<0xE7, MRMDestMem, (outs), (ins f128mem:$dst, VR128:$src), - "movntdq {$src, $dst|$dst, $src}", + "movntdq\t{$src, $dst|$dst, $src}", [(int_x86_sse2_movnt_dq addr:$dst, VR128:$src)]>; def MOVNTImr : I<0xC3, MRMDestMem, (outs), (ins i32mem:$dst, GR32:$src), - "movnti {$src, $dst|$dst, $src}", + "movnti\t{$src, $dst|$dst, $src}", [(int_x86_sse2_movnt_i addr:$dst, GR32:$src)]>, TB, Requires<[HasSSE2]>; // Flush cache def CLFLUSH : I<0xAE, MRM7m, (outs), (ins i8mem:$src), - "clflush $src", [(int_x86_sse2_clflush addr:$src)]>, + "clflush\t$src", [(int_x86_sse2_clflush addr:$src)]>, TB, Requires<[HasSSE2]>; // Load, store, and memory fence @@ -2015,44 +2015,44 @@ // FIXME: remove when we can teach regalloc that xor reg, reg is ok. let isReMaterializable = 1 in def V_SETALLONES : PDI<0x76, MRMInitReg, (outs VR128:$dst), (ins), - "pcmpeqd $dst, $dst", + "pcmpeqd\t$dst, $dst", [(set VR128:$dst, (v2f64 immAllOnesV))]>; // FR64 to 128-bit vector conversion. def MOVSD2PDrr : SDI<0x10, MRMSrcReg, (outs VR128:$dst), (ins FR64:$src), - "movsd {$src, $dst|$dst, $src}", + "movsd\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (v2f64 (scalar_to_vector FR64:$src)))]>; def MOVSD2PDrm : SDI<0x10, MRMSrcMem, (outs VR128:$dst), (ins f64mem:$src), - "movsd {$src, $dst|$dst, $src}", + "movsd\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (v2f64 (scalar_to_vector (loadf64 addr:$src))))]>; def MOVDI2PDIrr : PDI<0x6E, MRMSrcReg, (outs VR128:$dst), (ins GR32:$src), - "movd {$src, $dst|$dst, $src}", + "movd\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (v4i32 (scalar_to_vector GR32:$src)))]>; def MOVDI2PDIrm : PDI<0x6E, MRMSrcMem, (outs VR128:$dst), (ins i32mem:$src), - "movd {$src, $dst|$dst, $src}", + "movd\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (v4i32 (scalar_to_vector (loadi32 addr:$src))))]>; def MOVDI2SSrr : PDI<0x6E, MRMSrcReg, (outs FR32:$dst), (ins GR32:$src), - "movd {$src, $dst|$dst, $src}", + "movd\t{$src, $dst|$dst, $src}", [(set FR32:$dst, (bitconvert GR32:$src))]>; def MOVDI2SSrm : PDI<0x6E, MRMSrcMem, (outs FR32:$dst), (ins i32mem:$src), - "movd {$src, $dst|$dst, $src}", + "movd\t{$src, $dst|$dst, $src}", [(set FR32:$dst, (bitconvert (loadi32 addr:$src)))]>; // SSE2 instructions with XS prefix def MOVQI2PQIrm : I<0x7E, MRMSrcMem, (outs VR128:$dst), (ins i64mem:$src), - "movq {$src, $dst|$dst, $src}", + "movq\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (v2i64 (scalar_to_vector (loadi64 addr:$src))))]>, XS, Requires<[HasSSE2]>; def MOVPQI2QImr : PDI<0xD6, MRMDestMem, (outs), (ins i64mem:$dst, VR128:$src), - "movq {$src, $dst|$dst, $src}", + "movq\t{$src, $dst|$dst, $src}", [(store (i64 (vector_extract (v2i64 VR128:$src), (iPTR 0))), addr:$dst)]>; @@ -2062,27 +2062,27 @@ // def : Pat<(f32 (vector_extract (v4f32 VR128:$src), (iPTR 0))), // (f32 FR32:$src)>; def MOVPD2SDrr : SDI<0x10, MRMSrcReg, (outs FR64:$dst), (ins VR128:$src), - "movsd {$src, $dst|$dst, $src}", + "movsd\t{$src, $dst|$dst, $src}", [(set FR64:$dst, (vector_extract (v2f64 VR128:$src), (iPTR 0)))]>; def MOVPD2SDmr : SDI<0x11, MRMDestMem, (outs), (ins f64mem:$dst, VR128:$src), - "movsd {$src, $dst|$dst, $src}", + "movsd\t{$src, $dst|$dst, $src}", [(store (f64 (vector_extract (v2f64 VR128:$src), (iPTR 0))), addr:$dst)]>; def MOVPDI2DIrr : PDI<0x7E, MRMDestReg, (outs GR32:$dst), (ins VR128:$src), - "movd {$src, $dst|$dst, $src}", + "movd\t{$src, $dst|$dst, $src}", [(set GR32:$dst, (vector_extract (v4i32 VR128:$src), (iPTR 0)))]>; def MOVPDI2DImr : PDI<0x7E, MRMDestMem, (outs), (ins i32mem:$dst, VR128:$src), - "movd {$src, $dst|$dst, $src}", + "movd\t{$src, $dst|$dst, $src}", [(store (i32 (vector_extract (v4i32 VR128:$src), (iPTR 0))), addr:$dst)]>; def MOVSS2DIrr : PDI<0x7E, MRMDestReg, (outs GR32:$dst), (ins FR32:$src), - "movd {$src, $dst|$dst, $src}", + "movd\t{$src, $dst|$dst, $src}", [(set GR32:$dst, (bitconvert FR32:$src))]>; def MOVSS2DImr : PDI<0x7E, MRMDestMem, (outs), (ins i32mem:$dst, FR32:$src), - "movd {$src, $dst|$dst, $src}", + "movd\t{$src, $dst|$dst, $src}", [(store (i32 (bitconvert FR32:$src)), addr:$dst)]>; @@ -2091,12 +2091,12 @@ let isTwoAddress = 1 in { def MOVLSD2PDrr : SDI<0x10, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, FR64:$src2), - "movsd {$src2, $dst|$dst, $src2}", []>; + "movsd\t{$src2, $dst|$dst, $src2}", []>; let AddedComplexity = 15 in def MOVLPDrr : SDI<0x10, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), - "movsd {$src2, $dst|$dst, $src2}", + "movsd\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v2f64 (vector_shuffle VR128:$src1, VR128:$src2, MOVL_shuffle_mask)))]>; @@ -2104,14 +2104,14 @@ // Store / copy lower 64-bits of a XMM register. def MOVLQ128mr : PDI<0xD6, MRMDestMem, (outs), (ins i64mem:$dst, VR128:$src), - "movq {$src, $dst|$dst, $src}", + "movq\t{$src, $dst|$dst, $src}", [(int_x86_sse2_storel_dq addr:$dst, VR128:$src)]>; // Move to lower bits of a VR128 and zeroing upper bits. // Loading from memory automatically zeroing upper bits. let AddedComplexity = 20 in def MOVZSD2PDrm : SDI<0x10, MRMSrcMem, (outs VR128:$dst), (ins f64mem:$src), - "movsd {$src, $dst|$dst, $src}", + "movsd\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (v2f64 (vector_shuffle immAllZerosV, (v2f64 (scalar_to_vector @@ -2121,14 +2121,14 @@ let AddedComplexity = 15 in // movd / movq to XMM register zero-extends def MOVZDI2PDIrr : PDI<0x6E, MRMSrcReg, (outs VR128:$dst), (ins GR32:$src), - "movd {$src, $dst|$dst, $src}", + "movd\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (v4i32 (vector_shuffle immAllZerosV, (v4i32 (scalar_to_vector GR32:$src)), MOVL_shuffle_mask)))]>; let AddedComplexity = 20 in def MOVZDI2PDIrm : PDI<0x6E, MRMSrcMem, (outs VR128:$dst), (ins i32mem:$src), - "movd {$src, $dst|$dst, $src}", + "movd\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (v4i32 (vector_shuffle immAllZerosV, (v4i32 (scalar_to_vector (loadi32 addr:$src))), @@ -2137,12 +2137,12 @@ // Moving from XMM to XMM but still clear upper 64 bits. let AddedComplexity = 15 in def MOVZQI2PQIrr : I<0x7E, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src), - "movq {$src, $dst|$dst, $src}", + "movq\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse2_movl_dq VR128:$src))]>, XS, Requires<[HasSSE2]>; let AddedComplexity = 20 in def MOVZQI2PQIrm : I<0x7E, MRMSrcMem, (outs VR128:$dst), (ins i64mem:$src), - "movq {$src, $dst|$dst, $src}", + "movq\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse2_movl_dq (bitconvert (memopv2i64 addr:$src))))]>, XS, Requires<[HasSSE2]>; @@ -2154,34 +2154,34 @@ // Move Instructions def MOVSHDUPrr : S3SI<0x16, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src), - "movshdup {$src, $dst|$dst, $src}", + "movshdup\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (v4f32 (vector_shuffle VR128:$src, (undef), MOVSHDUP_shuffle_mask)))]>; def MOVSHDUPrm : S3SI<0x16, MRMSrcMem, (outs VR128:$dst), (ins f128mem:$src), - "movshdup {$src, $dst|$dst, $src}", + "movshdup\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (v4f32 (vector_shuffle (memopv4f32 addr:$src), (undef), MOVSHDUP_shuffle_mask)))]>; def MOVSLDUPrr : S3SI<0x12, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src), - "movsldup {$src, $dst|$dst, $src}", + "movsldup\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (v4f32 (vector_shuffle VR128:$src, (undef), MOVSLDUP_shuffle_mask)))]>; def MOVSLDUPrm : S3SI<0x12, MRMSrcMem, (outs VR128:$dst), (ins f128mem:$src), - "movsldup {$src, $dst|$dst, $src}", + "movsldup\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (v4f32 (vector_shuffle (memopv4f32 addr:$src), (undef), MOVSLDUP_shuffle_mask)))]>; def MOVDDUPrr : S3DI<0x12, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src), - "movddup {$src, $dst|$dst, $src}", + "movddup\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (v2f64 (vector_shuffle VR128:$src, (undef), SSE_splat_lo_mask)))]>; def MOVDDUPrm : S3DI<0x12, MRMSrcMem, (outs VR128:$dst), (ins f64mem:$src), - "movddup {$src, $dst|$dst, $src}", + "movddup\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (v2f64 (vector_shuffle (scalar_to_vector (loadf64 addr:$src)), @@ -2192,46 +2192,46 @@ let isTwoAddress = 1 in { def ADDSUBPSrr : S3DI<0xD0, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), - "addsubps {$src2, $dst|$dst, $src2}", + "addsubps\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (int_x86_sse3_addsub_ps VR128:$src1, VR128:$src2))]>; def ADDSUBPSrm : S3DI<0xD0, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, f128mem:$src2), - "addsubps {$src2, $dst|$dst, $src2}", + "addsubps\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (int_x86_sse3_addsub_ps VR128:$src1, (load addr:$src2)))]>; def ADDSUBPDrr : S3I<0xD0, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), - "addsubpd {$src2, $dst|$dst, $src2}", + "addsubpd\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (int_x86_sse3_addsub_pd VR128:$src1, VR128:$src2))]>; def ADDSUBPDrm : S3I<0xD0, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, f128mem:$src2), - "addsubpd {$src2, $dst|$dst, $src2}", + "addsubpd\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (int_x86_sse3_addsub_pd VR128:$src1, (load addr:$src2)))]>; } def LDDQUrm : S3DI<0xF0, MRMSrcMem, (outs VR128:$dst), (ins i128mem:$src), - "lddqu {$src, $dst|$dst, $src}", + "lddqu\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse3_ldu_dq addr:$src))]>; // Horizontal ops class S3D_Intrr o, string OpcodeStr, Intrinsic IntId> : S3DI; class S3D_Intrm o, string OpcodeStr, Intrinsic IntId> : S3DI; class S3_Intrr o, string OpcodeStr, Intrinsic IntId> : S3I; class S3_Intrm o, string OpcodeStr, Intrinsic IntId> : S3I; let isTwoAddress = 1 in { @@ -2292,12 +2292,12 @@ multiclass SS3I_binop_rm_int opc, string OpcodeStr, Intrinsic IntId, bit Commutable = 0> { def rr : SS38I { let isCommutable = Commutable; } def rm : SS38I; Modified: llvm/trunk/lib/Target/X86/X86InstrX86-64.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrX86-64.td?rev=40648&r1=40647&r2=40648&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrX86-64.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrX86-64.td Tue Jul 31 15:11:57 2007 @@ -95,18 +95,18 @@ XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7, XMM8, XMM9, XMM10, XMM11, XMM12, XMM13, XMM14, XMM15] in { def CALL64pcrel32 : I<0xE8, RawFrm, (outs), (ins i64imm:$dst, variable_ops), - "call ${dst:call}", []>; + "call\t${dst:call}", []>; def CALL64r : I<0xFF, MRM2r, (outs), (ins GR64:$dst, variable_ops), - "call {*}$dst", [(X86call GR64:$dst)]>; + "call\t{*}$dst", [(X86call GR64:$dst)]>; def CALL64m : I<0xFF, MRM2m, (outs), (ins i64mem:$dst, variable_ops), - "call {*}$dst", []>; + "call\t{*}$dst", []>; } // Branches let isBranch = 1, isTerminator = 1, isBarrier = 1 in { - def JMP64r : I<0xFF, MRM4r, (outs), (ins GR64:$dst), "jmp{q} {*}$dst", + def JMP64r : I<0xFF, MRM4r, (outs), (ins GR64:$dst), "jmp{q}\t{*}$dst", [(brind GR64:$dst)]>; - def JMP64m : I<0xFF, MRM4m, (outs), (ins i64mem:$dst), "jmp{q} {*}$dst", + def JMP64m : I<0xFF, MRM4m, (outs), (ins i64mem:$dst), "jmp{q}\t{*}$dst", [(brind (loadi64 addr:$dst))]>; } @@ -116,30 +116,30 @@ def LEAVE64 : I<0xC9, RawFrm, (outs), (ins), "leave", []>, Imp<[RBP,RSP],[RBP,RSP]>; def POP64r : I<0x58, AddRegFrm, - (outs GR64:$reg), (ins), "pop{q} $reg", []>, Imp<[RSP],[RSP]>; + (outs GR64:$reg), (ins), "pop{q}\t$reg", []>, Imp<[RSP],[RSP]>; def PUSH64r : I<0x50, AddRegFrm, - (outs), (ins GR64:$reg), "push{q} $reg", []>, Imp<[RSP],[RSP]>; + (outs), (ins GR64:$reg), "push{q}\t$reg", []>, Imp<[RSP],[RSP]>; def LEA64_32r : I<0x8D, MRMSrcMem, (outs GR32:$dst), (ins lea64_32mem:$src), - "lea{l} {$src|$dst}, {$dst|$src}", + "lea{l}\t{$src|$dst}, {$dst|$src}", [(set GR32:$dst, lea32addr:$src)]>, Requires<[In64BitMode]>; def LEA64r : RI<0x8D, MRMSrcMem, (outs GR64:$dst), (ins lea64mem:$src), - "lea{q} {$src|$dst}, {$dst|$src}", + "lea{q}\t{$src|$dst}, {$dst|$src}", [(set GR64:$dst, lea64addr:$src)]>; let isTwoAddress = 1 in def BSWAP64r : RI<0xC8, AddRegFrm, (outs GR64:$dst), (ins GR64:$src), - "bswap{q} $dst", + "bswap{q}\t$dst", [(set GR64:$dst, (bswap GR64:$src))]>, TB; // Exchange def XCHG64rr : RI<0x87, MRMDestReg, (outs), (ins GR64:$src1, GR64:$src2), - "xchg{q} {$src2|$src1}, {$src1|$src2}", []>; + "xchg{q}\t{$src2|$src1}, {$src1|$src2}", []>; def XCHG64mr : RI<0x87, MRMDestMem, (outs), (ins i64mem:$src1, GR64:$src2), - "xchg{q} {$src2|$src1}, {$src1|$src2}", []>; + "xchg{q}\t{$src2|$src1}, {$src1|$src2}", []>; def XCHG64rm : RI<0x87, MRMSrcMem, (outs), (ins GR64:$src1, i64mem:$src2), - "xchg{q} {$src2|$src1}, {$src1|$src2}", []>; + "xchg{q}\t{$src2|$src1}, {$src1|$src2}", []>; // Repeat string ops def REP_MOVSQ : RI<0xA5, RawFrm, (outs), (ins), "{rep;movsq|rep movsq}", @@ -154,58 +154,58 @@ // def MOV64rr : RI<0x89, MRMDestReg, (outs GR64:$dst), (ins GR64:$src), - "mov{q} {$src, $dst|$dst, $src}", []>; + "mov{q}\t{$src, $dst|$dst, $src}", []>; def MOV64ri : RIi64<0xB8, AddRegFrm, (outs GR64:$dst), (ins i64imm:$src), - "movabs{q} {$src, $dst|$dst, $src}", + "movabs{q}\t{$src, $dst|$dst, $src}", [(set GR64:$dst, imm:$src)]>; def MOV64ri32 : RIi32<0xC7, MRM0r, (outs GR64:$dst), (ins i64i32imm:$src), - "mov{q} {$src, $dst|$dst, $src}", + "mov{q}\t{$src, $dst|$dst, $src}", [(set GR64:$dst, i64immSExt32:$src)]>; def MOV64rm : RI<0x8B, MRMSrcMem, (outs GR64:$dst), (ins i64mem:$src), - "mov{q} {$src, $dst|$dst, $src}", + "mov{q}\t{$src, $dst|$dst, $src}", [(set GR64:$dst, (load addr:$src))]>; def MOV64mr : RI<0x89, MRMDestMem, (outs), (ins i64mem:$dst, GR64:$src), - "mov{q} {$src, $dst|$dst, $src}", + "mov{q}\t{$src, $dst|$dst, $src}", [(store GR64:$src, addr:$dst)]>; def MOV64mi32 : RIi32<0xC7, MRM0m, (outs), (ins i64mem:$dst, i64i32imm:$src), - "mov{q} {$src, $dst|$dst, $src}", + "mov{q}\t{$src, $dst|$dst, $src}", [(store i64immSExt32:$src, addr:$dst)]>; // Sign/Zero extenders def MOVSX64rr8 : RI<0xBE, MRMSrcReg, (outs GR64:$dst), (ins GR8 :$src), - "movs{bq|x} {$src, $dst|$dst, $src}", + "movs{bq|x}\t{$src, $dst|$dst, $src}", [(set GR64:$dst, (sext GR8:$src))]>, TB; def MOVSX64rm8 : RI<0xBE, MRMSrcMem, (outs GR64:$dst), (ins i8mem :$src), - "movs{bq|x} {$src, $dst|$dst, $src}", + "movs{bq|x}\t{$src, $dst|$dst, $src}", [(set GR64:$dst, (sextloadi64i8 addr:$src))]>, TB; def MOVSX64rr16: RI<0xBF, MRMSrcReg, (outs GR64:$dst), (ins GR16:$src), - "movs{wq|x} {$src, $dst|$dst, $src}", + "movs{wq|x}\t{$src, $dst|$dst, $src}", [(set GR64:$dst, (sext GR16:$src))]>, TB; def MOVSX64rm16: RI<0xBF, MRMSrcMem, (outs GR64:$dst), (ins i16mem:$src), - "movs{wq|x} {$src, $dst|$dst, $src}", + "movs{wq|x}\t{$src, $dst|$dst, $src}", [(set GR64:$dst, (sextloadi64i16 addr:$src))]>, TB; def MOVSX64rr32: RI<0x63, MRMSrcReg, (outs GR64:$dst), (ins GR32:$src), - "movs{lq|xd} {$src, $dst|$dst, $src}", + "movs{lq|xd}\t{$src, $dst|$dst, $src}", [(set GR64:$dst, (sext GR32:$src))]>; def MOVSX64rm32: RI<0x63, MRMSrcMem, (outs GR64:$dst), (ins i32mem:$src), - "movs{lq|xd} {$src, $dst|$dst, $src}", + "movs{lq|xd}\t{$src, $dst|$dst, $src}", [(set GR64:$dst, (sextloadi64i32 addr:$src))]>; def MOVZX64rr8 : RI<0xB6, MRMSrcReg, (outs GR64:$dst), (ins GR8 :$src), - "movz{bq|x} {$src, $dst|$dst, $src}", + "movz{bq|x}\t{$src, $dst|$dst, $src}", [(set GR64:$dst, (zext GR8:$src))]>, TB; def MOVZX64rm8 : RI<0xB6, MRMSrcMem, (outs GR64:$dst), (ins i8mem :$src), - "movz{bq|x} {$src, $dst|$dst, $src}", + "movz{bq|x}\t{$src, $dst|$dst, $src}", [(set GR64:$dst, (zextloadi64i8 addr:$src))]>, TB; def MOVZX64rr16: RI<0xB7, MRMSrcReg, (outs GR64:$dst), (ins GR16:$src), - "movz{wq|x} {$src, $dst|$dst, $src}", + "movz{wq|x}\t{$src, $dst|$dst, $src}", [(set GR64:$dst, (zext GR16:$src))]>, TB; def MOVZX64rm16: RI<0xB7, MRMSrcMem, (outs GR64:$dst), (ins i16mem:$src), - "movz{wq|x} {$src, $dst|$dst, $src}", + "movz{wq|x}\t{$src, $dst|$dst, $src}", [(set GR64:$dst, (zextloadi64i16 addr:$src))]>, TB; def CDQE : RI<0x98, RawFrm, (outs), (ins), @@ -222,204 +222,204 @@ let isConvertibleToThreeAddress = 1 in { let isCommutable = 1 in def ADD64rr : RI<0x01, MRMDestReg, (outs GR64:$dst), (ins GR64:$src1, GR64:$src2), - "add{q} {$src2, $dst|$dst, $src2}", + "add{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (add GR64:$src1, GR64:$src2))]>; def ADD64ri32 : RIi32<0x81, MRM0r, (outs GR64:$dst), (ins GR64:$src1, i64i32imm:$src2), - "add{q} {$src2, $dst|$dst, $src2}", + "add{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (add GR64:$src1, i64immSExt32:$src2))]>; def ADD64ri8 : RIi8<0x83, MRM0r, (outs GR64:$dst), (ins GR64:$src1, i64i8imm:$src2), - "add{q} {$src2, $dst|$dst, $src2}", + "add{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (add GR64:$src1, i64immSExt8:$src2))]>; } // isConvertibleToThreeAddress def ADD64rm : RI<0x03, MRMSrcMem, (outs GR64:$dst), (ins GR64:$src1, i64mem:$src2), - "add{q} {$src2, $dst|$dst, $src2}", + "add{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (add GR64:$src1, (load addr:$src2)))]>; } // isTwoAddress def ADD64mr : RI<0x01, MRMDestMem, (outs), (ins i64mem:$dst, GR64:$src2), - "add{q} {$src2, $dst|$dst, $src2}", + "add{q}\t{$src2, $dst|$dst, $src2}", [(store (add (load addr:$dst), GR64:$src2), addr:$dst)]>; def ADD64mi32 : RIi32<0x81, MRM0m, (outs), (ins i64mem:$dst, i64i32imm :$src2), - "add{q} {$src2, $dst|$dst, $src2}", + "add{q}\t{$src2, $dst|$dst, $src2}", [(store (add (load addr:$dst), i64immSExt32:$src2), addr:$dst)]>; def ADD64mi8 : RIi8<0x83, MRM0m, (outs), (ins i64mem:$dst, i64i8imm :$src2), - "add{q} {$src2, $dst|$dst, $src2}", + "add{q}\t{$src2, $dst|$dst, $src2}", [(store (add (load addr:$dst), i64immSExt8:$src2), addr:$dst)]>; let isTwoAddress = 1 in { let isCommutable = 1 in def ADC64rr : RI<0x11, MRMDestReg, (outs GR64:$dst), (ins GR64:$src1, GR64:$src2), - "adc{q} {$src2, $dst|$dst, $src2}", + "adc{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (adde GR64:$src1, GR64:$src2))]>; def ADC64rm : RI<0x13, MRMSrcMem , (outs GR64:$dst), (ins GR64:$src1, i64mem:$src2), - "adc{q} {$src2, $dst|$dst, $src2}", + "adc{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (adde GR64:$src1, (load addr:$src2)))]>; def ADC64ri32 : RIi32<0x81, MRM2r, (outs GR64:$dst), (ins GR64:$src1, i64i32imm:$src2), - "adc{q} {$src2, $dst|$dst, $src2}", + "adc{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (adde GR64:$src1, i64immSExt32:$src2))]>; def ADC64ri8 : RIi8<0x83, MRM2r, (outs GR64:$dst), (ins GR64:$src1, i64i8imm:$src2), - "adc{q} {$src2, $dst|$dst, $src2}", + "adc{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (adde GR64:$src1, i64immSExt8:$src2))]>; } // isTwoAddress def ADC64mr : RI<0x11, MRMDestMem, (outs), (ins i64mem:$dst, GR64:$src2), - "adc{q} {$src2, $dst|$dst, $src2}", + "adc{q}\t{$src2, $dst|$dst, $src2}", [(store (adde (load addr:$dst), GR64:$src2), addr:$dst)]>; def ADC64mi32 : RIi32<0x81, MRM2m, (outs), (ins i64mem:$dst, i64i32imm:$src2), - "adc{q} {$src2, $dst|$dst, $src2}", + "adc{q}\t{$src2, $dst|$dst, $src2}", [(store (adde (load addr:$dst), i64immSExt8:$src2), addr:$dst)]>; def ADC64mi8 : RIi8<0x83, MRM2m, (outs), (ins i64mem:$dst, i64i8imm :$src2), - "adc{q} {$src2, $dst|$dst, $src2}", + "adc{q}\t{$src2, $dst|$dst, $src2}", [(store (adde (load addr:$dst), i64immSExt8:$src2), addr:$dst)]>; let isTwoAddress = 1 in { def SUB64rr : RI<0x29, MRMDestReg, (outs GR64:$dst), (ins GR64:$src1, GR64:$src2), - "sub{q} {$src2, $dst|$dst, $src2}", + "sub{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (sub GR64:$src1, GR64:$src2))]>; def SUB64rm : RI<0x2B, MRMSrcMem, (outs GR64:$dst), (ins GR64:$src1, i64mem:$src2), - "sub{q} {$src2, $dst|$dst, $src2}", + "sub{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (sub GR64:$src1, (load addr:$src2)))]>; def SUB64ri32 : RIi32<0x81, MRM5r, (outs GR64:$dst), (ins GR64:$src1, i64i32imm:$src2), - "sub{q} {$src2, $dst|$dst, $src2}", + "sub{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (sub GR64:$src1, i64immSExt32:$src2))]>; def SUB64ri8 : RIi8<0x83, MRM5r, (outs GR64:$dst), (ins GR64:$src1, i64i8imm:$src2), - "sub{q} {$src2, $dst|$dst, $src2}", + "sub{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (sub GR64:$src1, i64immSExt8:$src2))]>; } // isTwoAddress def SUB64mr : RI<0x29, MRMDestMem, (outs), (ins i64mem:$dst, GR64:$src2), - "sub{q} {$src2, $dst|$dst, $src2}", + "sub{q}\t{$src2, $dst|$dst, $src2}", [(store (sub (load addr:$dst), GR64:$src2), addr:$dst)]>; def SUB64mi32 : RIi32<0x81, MRM5m, (outs), (ins i64mem:$dst, i64i32imm:$src2), - "sub{q} {$src2, $dst|$dst, $src2}", + "sub{q}\t{$src2, $dst|$dst, $src2}", [(store (sub (load addr:$dst), i64immSExt32:$src2), addr:$dst)]>; def SUB64mi8 : RIi8<0x83, MRM5m, (outs), (ins i64mem:$dst, i64i8imm :$src2), - "sub{q} {$src2, $dst|$dst, $src2}", + "sub{q}\t{$src2, $dst|$dst, $src2}", [(store (sub (load addr:$dst), i64immSExt8:$src2), addr:$dst)]>; let isTwoAddress = 1 in { def SBB64rr : RI<0x19, MRMDestReg, (outs GR64:$dst), (ins GR64:$src1, GR64:$src2), - "sbb{q} {$src2, $dst|$dst, $src2}", + "sbb{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (sube GR64:$src1, GR64:$src2))]>; def SBB64rm : RI<0x1B, MRMSrcMem, (outs GR64:$dst), (ins GR64:$src1, i64mem:$src2), - "sbb{q} {$src2, $dst|$dst, $src2}", + "sbb{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (sube GR64:$src1, (load addr:$src2)))]>; def SBB64ri32 : RIi32<0x81, MRM3r, (outs GR64:$dst), (ins GR64:$src1, i64i32imm:$src2), - "sbb{q} {$src2, $dst|$dst, $src2}", + "sbb{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (sube GR64:$src1, i64immSExt32:$src2))]>; def SBB64ri8 : RIi8<0x83, MRM3r, (outs GR64:$dst), (ins GR64:$src1, i64i8imm:$src2), - "sbb{q} {$src2, $dst|$dst, $src2}", + "sbb{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (sube GR64:$src1, i64immSExt8:$src2))]>; } // isTwoAddress def SBB64mr : RI<0x19, MRMDestMem, (outs), (ins i64mem:$dst, GR64:$src2), - "sbb{q} {$src2, $dst|$dst, $src2}", + "sbb{q}\t{$src2, $dst|$dst, $src2}", [(store (sube (load addr:$dst), GR64:$src2), addr:$dst)]>; def SBB64mi32 : RIi32<0x81, MRM3m, (outs), (ins i64mem:$dst, i64i32imm:$src2), - "sbb{q} {$src2, $dst|$dst, $src2}", + "sbb{q}\t{$src2, $dst|$dst, $src2}", [(store (sube (load addr:$dst), i64immSExt32:$src2), addr:$dst)]>; def SBB64mi8 : RIi8<0x83, MRM3m, (outs), (ins i64mem:$dst, i64i8imm :$src2), - "sbb{q} {$src2, $dst|$dst, $src2}", + "sbb{q}\t{$src2, $dst|$dst, $src2}", [(store (sube (load addr:$dst), i64immSExt8:$src2), addr:$dst)]>; // Unsigned multiplication def MUL64r : RI<0xF7, MRM4r, (outs), (ins GR64:$src), - "mul{q} $src", []>, + "mul{q}\t$src", []>, Imp<[RAX],[RAX,RDX]>; // RAX,RDX = RAX*GR64 def MUL64m : RI<0xF7, MRM4m, (outs), (ins i64mem:$src), - "mul{q} $src", []>, + "mul{q}\t$src", []>, Imp<[RAX],[RAX,RDX]>; // RAX,RDX = RAX*[mem64] // Signed multiplication def IMUL64r : RI<0xF7, MRM5r, (outs), (ins GR64:$src), - "imul{q} $src", []>, + "imul{q}\t$src", []>, Imp<[RAX],[RAX,RDX]>; // RAX,RDX = RAX*GR64 def IMUL64m : RI<0xF7, MRM5m, (outs), (ins i64mem:$src), - "imul{q} $src", []>, + "imul{q}\t$src", []>, Imp<[RAX],[RAX,RDX]>; // RAX,RDX = RAX*[mem64] let isTwoAddress = 1 in { let isCommutable = 1 in def IMUL64rr : RI<0xAF, MRMSrcReg, (outs GR64:$dst), (ins GR64:$src1, GR64:$src2), - "imul{q} {$src2, $dst|$dst, $src2}", + "imul{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (mul GR64:$src1, GR64:$src2))]>, TB; def IMUL64rm : RI<0xAF, MRMSrcMem, (outs GR64:$dst), (ins GR64:$src1, i64mem:$src2), - "imul{q} {$src2, $dst|$dst, $src2}", + "imul{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (mul GR64:$src1, (load addr:$src2)))]>, TB; } // isTwoAddress // Suprisingly enough, these are not two address instructions! def IMUL64rri32 : RIi32<0x69, MRMSrcReg, // GR64 = GR64*I32 (outs GR64:$dst), (ins GR64:$src1, i64i32imm:$src2), - "imul{q} {$src2, $src1, $dst|$dst, $src1, $src2}", + "imul{q}\t{$src2, $src1, $dst|$dst, $src1, $src2}", [(set GR64:$dst, (mul GR64:$src1, i64immSExt32:$src2))]>; def IMUL64rri8 : RIi8<0x6B, MRMSrcReg, // GR64 = GR64*I8 (outs GR64:$dst), (ins GR64:$src1, i64i8imm:$src2), - "imul{q} {$src2, $src1, $dst|$dst, $src1, $src2}", + "imul{q}\t{$src2, $src1, $dst|$dst, $src1, $src2}", [(set GR64:$dst, (mul GR64:$src1, i64immSExt8:$src2))]>; def IMUL64rmi32 : RIi32<0x69, MRMSrcMem, // GR64 = [mem64]*I32 (outs GR64:$dst), (ins i64mem:$src1, i64i32imm:$src2), - "imul{q} {$src2, $src1, $dst|$dst, $src1, $src2}", + "imul{q}\t{$src2, $src1, $dst|$dst, $src1, $src2}", [(set GR64:$dst, (mul (load addr:$src1), i64immSExt32:$src2))]>; def IMUL64rmi8 : RIi8<0x6B, MRMSrcMem, // GR64 = [mem64]*I8 (outs GR64:$dst), (ins i64mem:$src1, i64i8imm: $src2), - "imul{q} {$src2, $src1, $dst|$dst, $src1, $src2}", + "imul{q}\t{$src2, $src1, $dst|$dst, $src1, $src2}", [(set GR64:$dst, (mul (load addr:$src1), i64immSExt8:$src2))]>; // Unsigned division / remainder def DIV64r : RI<0xF7, MRM6r, (outs), (ins GR64:$src), // RDX:RAX/r64 = RAX,RDX - "div{q} $src", []>, Imp<[RAX,RDX],[RAX,RDX]>; + "div{q}\t$src", []>, Imp<[RAX,RDX],[RAX,RDX]>; def DIV64m : RI<0xF7, MRM6m, (outs), (ins i64mem:$src), // RDX:RAX/[mem64] = RAX,RDX - "div{q} $src", []>, Imp<[RAX,RDX],[RAX,RDX]>; + "div{q}\t$src", []>, Imp<[RAX,RDX],[RAX,RDX]>; // Signed division / remainder def IDIV64r: RI<0xF7, MRM7r, (outs), (ins GR64:$src), // RDX:RAX/r64 = RAX,RDX - "idiv{q} $src", []>, Imp<[RAX,RDX],[RAX,RDX]>; + "idiv{q}\t$src", []>, Imp<[RAX,RDX],[RAX,RDX]>; def IDIV64m: RI<0xF7, MRM7m, (outs), (ins i64mem:$src), // RDX:RAX/[mem64] = RAX,RDX - "idiv{q} $src", []>, Imp<[RAX,RDX],[RAX,RDX]>; + "idiv{q}\t$src", []>, Imp<[RAX,RDX],[RAX,RDX]>; // Unary instructions let CodeSize = 2 in { let isTwoAddress = 1 in -def NEG64r : RI<0xF7, MRM3r, (outs GR64:$dst), (ins GR64:$src), "neg{q} $dst", +def NEG64r : RI<0xF7, MRM3r, (outs GR64:$dst), (ins GR64:$src), "neg{q}\t$dst", [(set GR64:$dst, (ineg GR64:$src))]>; -def NEG64m : RI<0xF7, MRM3m, (outs), (ins i64mem:$dst), "neg{q} $dst", +def NEG64m : RI<0xF7, MRM3m, (outs), (ins i64mem:$dst), "neg{q}\t$dst", [(store (ineg (loadi64 addr:$dst)), addr:$dst)]>; let isTwoAddress = 1, isConvertibleToThreeAddress = 1 in -def INC64r : RI<0xFF, MRM0r, (outs GR64:$dst), (ins GR64:$src), "inc{q} $dst", +def INC64r : RI<0xFF, MRM0r, (outs GR64:$dst), (ins GR64:$src), "inc{q}\t$dst", [(set GR64:$dst, (add GR64:$src, 1))]>; -def INC64m : RI<0xFF, MRM0m, (outs), (ins i64mem:$dst), "inc{q} $dst", +def INC64m : RI<0xFF, MRM0m, (outs), (ins i64mem:$dst), "inc{q}\t$dst", [(store (add (loadi64 addr:$dst), 1), addr:$dst)]>; let isTwoAddress = 1, isConvertibleToThreeAddress = 1 in -def DEC64r : RI<0xFF, MRM1r, (outs GR64:$dst), (ins GR64:$src), "dec{q} $dst", +def DEC64r : RI<0xFF, MRM1r, (outs GR64:$dst), (ins GR64:$src), "dec{q}\t$dst", [(set GR64:$dst, (add GR64:$src, -1))]>; -def DEC64m : RI<0xFF, MRM1m, (outs), (ins i64mem:$dst), "dec{q} $dst", +def DEC64m : RI<0xFF, MRM1m, (outs), (ins i64mem:$dst), "dec{q}\t$dst", [(store (add (loadi64 addr:$dst), -1), addr:$dst)]>; // In 64-bit mode, single byte INC and DEC cannot be encoded. let isTwoAddress = 1, isConvertibleToThreeAddress = 1 in { // Can transform into LEA. -def INC64_16r : I<0xFF, MRM0r, (outs GR16:$dst), (ins GR16:$src), "inc{w} $dst", +def INC64_16r : I<0xFF, MRM0r, (outs GR16:$dst), (ins GR16:$src), "inc{w}\t$dst", [(set GR16:$dst, (add GR16:$src, 1))]>, OpSize, Requires<[In64BitMode]>; -def INC64_32r : I<0xFF, MRM0r, (outs GR32:$dst), (ins GR32:$src), "inc{l} $dst", +def INC64_32r : I<0xFF, MRM0r, (outs GR32:$dst), (ins GR32:$src), "inc{l}\t$dst", [(set GR32:$dst, (add GR32:$src, 1))]>, Requires<[In64BitMode]>; -def DEC64_16r : I<0xFF, MRM1r, (outs GR16:$dst), (ins GR16:$src), "dec{w} $dst", +def DEC64_16r : I<0xFF, MRM1r, (outs GR16:$dst), (ins GR16:$src), "dec{w}\t$dst", [(set GR16:$dst, (add GR16:$src, -1))]>, OpSize, Requires<[In64BitMode]>; -def DEC64_32r : I<0xFF, MRM1r, (outs GR32:$dst), (ins GR32:$src), "dec{l} $dst", +def DEC64_32r : I<0xFF, MRM1r, (outs GR32:$dst), (ins GR32:$src), "dec{l}\t$dst", [(set GR32:$dst, (add GR32:$src, -1))]>, Requires<[In64BitMode]>; } // isConvertibleToThreeAddress @@ -429,138 +429,138 @@ // Shift instructions let isTwoAddress = 1 in { def SHL64rCL : RI<0xD3, MRM4r, (outs GR64:$dst), (ins GR64:$src), - "shl{q} {%cl, $dst|$dst, %CL}", + "shl{q}\t{%cl, $dst|$dst, %CL}", [(set GR64:$dst, (shl GR64:$src, CL))]>, Imp<[CL],[]>; def SHL64ri : RIi8<0xC1, MRM4r, (outs GR64:$dst), (ins GR64:$src1, i8imm:$src2), - "shl{q} {$src2, $dst|$dst, $src2}", + "shl{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (shl GR64:$src1, (i8 imm:$src2)))]>; def SHL64r1 : RI<0xD1, MRM4r, (outs GR64:$dst), (ins GR64:$src1), - "shl{q} $dst", []>; + "shl{q}\t$dst", []>; } // isTwoAddress def SHL64mCL : RI<0xD3, MRM4m, (outs), (ins i64mem:$dst), - "shl{q} {%cl, $dst|$dst, %CL}", + "shl{q}\t{%cl, $dst|$dst, %CL}", [(store (shl (loadi64 addr:$dst), CL), addr:$dst)]>, Imp<[CL],[]>; def SHL64mi : RIi8<0xC1, MRM4m, (outs), (ins i64mem:$dst, i8imm:$src), - "shl{q} {$src, $dst|$dst, $src}", + "shl{q}\t{$src, $dst|$dst, $src}", [(store (shl (loadi64 addr:$dst), (i8 imm:$src)), addr:$dst)]>; def SHL64m1 : RI<0xD1, MRM4m, (outs), (ins i64mem:$dst), - "shl{q} $dst", + "shl{q}\t$dst", [(store (shl (loadi64 addr:$dst), (i8 1)), addr:$dst)]>; let isTwoAddress = 1 in { def SHR64rCL : RI<0xD3, MRM5r, (outs GR64:$dst), (ins GR64:$src), - "shr{q} {%cl, $dst|$dst, %CL}", + "shr{q}\t{%cl, $dst|$dst, %CL}", [(set GR64:$dst, (srl GR64:$src, CL))]>, Imp<[CL],[]>; def SHR64ri : RIi8<0xC1, MRM5r, (outs GR64:$dst), (ins GR64:$src1, i8imm:$src2), - "shr{q} {$src2, $dst|$dst, $src2}", + "shr{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (srl GR64:$src1, (i8 imm:$src2)))]>; def SHR64r1 : RI<0xD1, MRM5r, (outs GR64:$dst), (ins GR64:$src1), - "shr{q} $dst", + "shr{q}\t$dst", [(set GR64:$dst, (srl GR64:$src1, (i8 1)))]>; } // isTwoAddress def SHR64mCL : RI<0xD3, MRM5m, (outs), (ins i64mem:$dst), - "shr{q} {%cl, $dst|$dst, %CL}", + "shr{q}\t{%cl, $dst|$dst, %CL}", [(store (srl (loadi64 addr:$dst), CL), addr:$dst)]>, Imp<[CL],[]>; def SHR64mi : RIi8<0xC1, MRM5m, (outs), (ins i64mem:$dst, i8imm:$src), - "shr{q} {$src, $dst|$dst, $src}", + "shr{q}\t{$src, $dst|$dst, $src}", [(store (srl (loadi64 addr:$dst), (i8 imm:$src)), addr:$dst)]>; def SHR64m1 : RI<0xD1, MRM5m, (outs), (ins i64mem:$dst), - "shr{q} $dst", + "shr{q}\t$dst", [(store (srl (loadi64 addr:$dst), (i8 1)), addr:$dst)]>; let isTwoAddress = 1 in { def SAR64rCL : RI<0xD3, MRM7r, (outs GR64:$dst), (ins GR64:$src), - "sar{q} {%cl, $dst|$dst, %CL}", + "sar{q}\t{%cl, $dst|$dst, %CL}", [(set GR64:$dst, (sra GR64:$src, CL))]>, Imp<[CL],[]>; def SAR64ri : RIi8<0xC1, MRM7r, (outs GR64:$dst), (ins GR64:$src1, i8imm:$src2), - "sar{q} {$src2, $dst|$dst, $src2}", + "sar{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (sra GR64:$src1, (i8 imm:$src2)))]>; def SAR64r1 : RI<0xD1, MRM7r, (outs GR64:$dst), (ins GR64:$src1), - "sar{q} $dst", + "sar{q}\t$dst", [(set GR64:$dst, (sra GR64:$src1, (i8 1)))]>; } // isTwoAddress def SAR64mCL : RI<0xD3, MRM7m, (outs), (ins i64mem:$dst), - "sar{q} {%cl, $dst|$dst, %CL}", + "sar{q}\t{%cl, $dst|$dst, %CL}", [(store (sra (loadi64 addr:$dst), CL), addr:$dst)]>, Imp<[CL],[]>; def SAR64mi : RIi8<0xC1, MRM7m, (outs), (ins i64mem:$dst, i8imm:$src), - "sar{q} {$src, $dst|$dst, $src}", + "sar{q}\t{$src, $dst|$dst, $src}", [(store (sra (loadi64 addr:$dst), (i8 imm:$src)), addr:$dst)]>; def SAR64m1 : RI<0xD1, MRM7m, (outs), (ins i64mem:$dst), - "sar{q} $dst", + "sar{q}\t$dst", [(store (sra (loadi64 addr:$dst), (i8 1)), addr:$dst)]>; // Rotate instructions let isTwoAddress = 1 in { def ROL64rCL : RI<0xD3, MRM0r, (outs GR64:$dst), (ins GR64:$src), - "rol{q} {%cl, $dst|$dst, %CL}", + "rol{q}\t{%cl, $dst|$dst, %CL}", [(set GR64:$dst, (rotl GR64:$src, CL))]>, Imp<[CL],[]>; def ROL64ri : RIi8<0xC1, MRM0r, (outs GR64:$dst), (ins GR64:$src1, i8imm:$src2), - "rol{q} {$src2, $dst|$dst, $src2}", + "rol{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (rotl GR64:$src1, (i8 imm:$src2)))]>; def ROL64r1 : RI<0xD1, MRM0r, (outs GR64:$dst), (ins GR64:$src1), - "rol{q} $dst", + "rol{q}\t$dst", [(set GR64:$dst, (rotl GR64:$src1, (i8 1)))]>; } // isTwoAddress def ROL64mCL : I<0xD3, MRM0m, (outs), (ins i64mem:$dst), - "rol{q} {%cl, $dst|$dst, %CL}", + "rol{q}\t{%cl, $dst|$dst, %CL}", [(store (rotl (loadi64 addr:$dst), CL), addr:$dst)]>, Imp<[CL],[]>; def ROL64mi : RIi8<0xC1, MRM0m, (outs), (ins i64mem:$dst, i8imm:$src), - "rol{q} {$src, $dst|$dst, $src}", + "rol{q}\t{$src, $dst|$dst, $src}", [(store (rotl (loadi64 addr:$dst), (i8 imm:$src)), addr:$dst)]>; def ROL64m1 : RI<0xD1, MRM0m, (outs), (ins i64mem:$dst), - "rol{q} $dst", + "rol{q}\t$dst", [(store (rotl (loadi64 addr:$dst), (i8 1)), addr:$dst)]>; let isTwoAddress = 1 in { def ROR64rCL : RI<0xD3, MRM1r, (outs GR64:$dst), (ins GR64:$src), - "ror{q} {%cl, $dst|$dst, %CL}", + "ror{q}\t{%cl, $dst|$dst, %CL}", [(set GR64:$dst, (rotr GR64:$src, CL))]>, Imp<[CL],[]>; def ROR64ri : RIi8<0xC1, MRM1r, (outs GR64:$dst), (ins GR64:$src1, i8imm:$src2), - "ror{q} {$src2, $dst|$dst, $src2}", + "ror{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (rotr GR64:$src1, (i8 imm:$src2)))]>; def ROR64r1 : RI<0xD1, MRM1r, (outs GR64:$dst), (ins GR64:$src1), - "ror{q} $dst", + "ror{q}\t$dst", [(set GR64:$dst, (rotr GR64:$src1, (i8 1)))]>; } // isTwoAddress def ROR64mCL : RI<0xD3, MRM1m, (outs), (ins i64mem:$dst), - "ror{q} {%cl, $dst|$dst, %CL}", + "ror{q}\t{%cl, $dst|$dst, %CL}", [(store (rotr (loadi64 addr:$dst), CL), addr:$dst)]>, Imp<[CL],[]>; def ROR64mi : RIi8<0xC1, MRM1m, (outs), (ins i64mem:$dst, i8imm:$src), - "ror{q} {$src, $dst|$dst, $src}", + "ror{q}\t{$src, $dst|$dst, $src}", [(store (rotr (loadi64 addr:$dst), (i8 imm:$src)), addr:$dst)]>; def ROR64m1 : RI<0xD1, MRM1m, (outs), (ins i64mem:$dst), - "ror{q} $dst", + "ror{q}\t$dst", [(store (rotr (loadi64 addr:$dst), (i8 1)), addr:$dst)]>; // Double shift instructions (generalizations of rotate) let isTwoAddress = 1 in { def SHLD64rrCL : RI<0xA5, MRMDestReg, (outs GR64:$dst), (ins GR64:$src1, GR64:$src2), - "shld{q} {%cl, $src2, $dst|$dst, $src2, %CL}", []>, + "shld{q}\t{%cl, $src2, $dst|$dst, $src2, %CL}", []>, Imp<[CL],[]>, TB; def SHRD64rrCL : RI<0xAD, MRMDestReg, (outs GR64:$dst), (ins GR64:$src1, GR64:$src2), - "shrd{q} {%cl, $src2, $dst|$dst, $src2, %CL}", []>, + "shrd{q}\t{%cl, $src2, $dst|$dst, $src2, %CL}", []>, Imp<[CL],[]>, TB; let isCommutable = 1 in { // FIXME: Update X86InstrInfo::commuteInstruction def SHLD64rri8 : RIi8<0xA4, MRMDestReg, (outs GR64:$dst), (ins GR64:$src1, GR64:$src2, i8imm:$src3), - "shld{q} {$src3, $src2, $dst|$dst, $src2, $src3}", []>, + "shld{q}\t{$src3, $src2, $dst|$dst, $src2, $src3}", []>, TB; def SHRD64rri8 : RIi8<0xAC, MRMDestReg, (outs GR64:$dst), (ins GR64:$src1, GR64:$src2, i8imm:$src3), - "shrd{q} {$src3, $src2, $dst|$dst, $src2, $src3}", []>, + "shrd{q}\t{$src3, $src2, $dst|$dst, $src2, $src3}", []>, TB; } // isCommutable } // isTwoAddress @@ -568,18 +568,18 @@ // Temporary hack: there is no patterns associated with these instructions // so we have to tell tblgen that these do not produce results. def SHLD64mrCL : RI<0xA5, MRMDestMem, (outs), (ins i64mem:$dst, GR64:$src2), - "shld{q} {%cl, $src2, $dst|$dst, $src2, %CL}", []>, + "shld{q}\t{%cl, $src2, $dst|$dst, $src2, %CL}", []>, Imp<[CL],[]>, TB; def SHRD64mrCL : RI<0xAD, MRMDestMem, (outs), (ins i64mem:$dst, GR64:$src2), - "shrd{q} {%cl, $src2, $dst|$dst, $src2, %CL}", []>, + "shrd{q}\t{%cl, $src2, $dst|$dst, $src2, %CL}", []>, Imp<[CL],[]>, TB; def SHLD64mri8 : RIi8<0xA4, MRMDestMem, (outs), (ins i64mem:$dst, GR64:$src2, i8imm:$src3), - "shld{q} {$src3, $src2, $dst|$dst, $src2, $src3}", []>, + "shld{q}\t{$src3, $src2, $dst|$dst, $src2, $src3}", []>, TB; def SHRD64mri8 : RIi8<0xAC, MRMDestMem, (outs), (ins i64mem:$dst, GR64:$src2, i8imm:$src3), - "shrd{q} {$src3, $src2, $dst|$dst, $src2, $src3}", []>, + "shrd{q}\t{$src3, $src2, $dst|$dst, $src2, $src3}", []>, TB; //===----------------------------------------------------------------------===// @@ -587,95 +587,95 @@ // let isTwoAddress = 1 in -def NOT64r : RI<0xF7, MRM2r, (outs GR64:$dst), (ins GR64:$src), "not{q} $dst", +def NOT64r : RI<0xF7, MRM2r, (outs GR64:$dst), (ins GR64:$src), "not{q}\t$dst", [(set GR64:$dst, (not GR64:$src))]>; -def NOT64m : RI<0xF7, MRM2m, (outs), (ins i64mem:$dst), "not{q} $dst", +def NOT64m : RI<0xF7, MRM2m, (outs), (ins i64mem:$dst), "not{q}\t$dst", [(store (not (loadi64 addr:$dst)), addr:$dst)]>; let isTwoAddress = 1 in { let isCommutable = 1 in def AND64rr : RI<0x21, MRMDestReg, (outs GR64:$dst), (ins GR64:$src1, GR64:$src2), - "and{q} {$src2, $dst|$dst, $src2}", + "and{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (and GR64:$src1, GR64:$src2))]>; def AND64rm : RI<0x23, MRMSrcMem, (outs GR64:$dst), (ins GR64:$src1, i64mem:$src2), - "and{q} {$src2, $dst|$dst, $src2}", + "and{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (and GR64:$src1, (load addr:$src2)))]>; def AND64ri32 : RIi32<0x81, MRM4r, (outs GR64:$dst), (ins GR64:$src1, i64i32imm:$src2), - "and{q} {$src2, $dst|$dst, $src2}", + "and{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (and GR64:$src1, i64immSExt32:$src2))]>; def AND64ri8 : RIi8<0x83, MRM4r, (outs GR64:$dst), (ins GR64:$src1, i64i8imm:$src2), - "and{q} {$src2, $dst|$dst, $src2}", + "and{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (and GR64:$src1, i64immSExt8:$src2))]>; } // isTwoAddress def AND64mr : RI<0x21, MRMDestMem, (outs), (ins i64mem:$dst, GR64:$src), - "and{q} {$src, $dst|$dst, $src}", + "and{q}\t{$src, $dst|$dst, $src}", [(store (and (load addr:$dst), GR64:$src), addr:$dst)]>; def AND64mi32 : RIi32<0x81, MRM4m, (outs), (ins i64mem:$dst, i64i32imm:$src), - "and{q} {$src, $dst|$dst, $src}", + "and{q}\t{$src, $dst|$dst, $src}", [(store (and (loadi64 addr:$dst), i64immSExt32:$src), addr:$dst)]>; def AND64mi8 : RIi8<0x83, MRM4m, (outs), (ins i64mem:$dst, i64i8imm :$src), - "and{q} {$src, $dst|$dst, $src}", + "and{q}\t{$src, $dst|$dst, $src}", [(store (and (load addr:$dst), i64immSExt8:$src), addr:$dst)]>; let isTwoAddress = 1 in { let isCommutable = 1 in def OR64rr : RI<0x09, MRMDestReg, (outs GR64:$dst), (ins GR64:$src1, GR64:$src2), - "or{q} {$src2, $dst|$dst, $src2}", + "or{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (or GR64:$src1, GR64:$src2))]>; def OR64rm : RI<0x0B, MRMSrcMem , (outs GR64:$dst), (ins GR64:$src1, i64mem:$src2), - "or{q} {$src2, $dst|$dst, $src2}", + "or{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (or GR64:$src1, (load addr:$src2)))]>; def OR64ri32 : RIi32<0x81, MRM1r, (outs GR64:$dst), (ins GR64:$src1, i64i32imm:$src2), - "or{q} {$src2, $dst|$dst, $src2}", + "or{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (or GR64:$src1, i64immSExt32:$src2))]>; def OR64ri8 : RIi8<0x83, MRM1r, (outs GR64:$dst), (ins GR64:$src1, i64i8imm:$src2), - "or{q} {$src2, $dst|$dst, $src2}", + "or{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (or GR64:$src1, i64immSExt8:$src2))]>; } // isTwoAddress def OR64mr : RI<0x09, MRMDestMem, (outs), (ins i64mem:$dst, GR64:$src), - "or{q} {$src, $dst|$dst, $src}", + "or{q}\t{$src, $dst|$dst, $src}", [(store (or (load addr:$dst), GR64:$src), addr:$dst)]>; def OR64mi32 : RIi32<0x81, MRM1m, (outs), (ins i64mem:$dst, i64i32imm:$src), - "or{q} {$src, $dst|$dst, $src}", + "or{q}\t{$src, $dst|$dst, $src}", [(store (or (loadi64 addr:$dst), i64immSExt32:$src), addr:$dst)]>; def OR64mi8 : RIi8<0x83, MRM1m, (outs), (ins i64mem:$dst, i64i8imm:$src), - "or{q} {$src, $dst|$dst, $src}", + "or{q}\t{$src, $dst|$dst, $src}", [(store (or (load addr:$dst), i64immSExt8:$src), addr:$dst)]>; let isTwoAddress = 1 in { let isCommutable = 1 in def XOR64rr : RI<0x31, MRMDestReg, (outs GR64:$dst), (ins GR64:$src1, GR64:$src2), - "xor{q} {$src2, $dst|$dst, $src2}", + "xor{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (xor GR64:$src1, GR64:$src2))]>; def XOR64rm : RI<0x33, MRMSrcMem, (outs GR64:$dst), (ins GR64:$src1, i64mem:$src2), - "xor{q} {$src2, $dst|$dst, $src2}", + "xor{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (xor GR64:$src1, (load addr:$src2)))]>; def XOR64ri32 : RIi32<0x81, MRM6r, (outs GR64:$dst), (ins GR64:$src1, i64i32imm:$src2), - "xor{q} {$src2, $dst|$dst, $src2}", + "xor{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (xor GR64:$src1, i64immSExt32:$src2))]>; def XOR64ri8 : RIi8<0x83, MRM6r, (outs GR64:$dst), (ins GR64:$src1, i64i8imm:$src2), - "xor{q} {$src2, $dst|$dst, $src2}", + "xor{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (xor GR64:$src1, i64immSExt8:$src2))]>; } // isTwoAddress def XOR64mr : RI<0x31, MRMDestMem, (outs), (ins i64mem:$dst, GR64:$src), - "xor{q} {$src, $dst|$dst, $src}", + "xor{q}\t{$src, $dst|$dst, $src}", [(store (xor (load addr:$dst), GR64:$src), addr:$dst)]>; def XOR64mi32 : RIi32<0x81, MRM6m, (outs), (ins i64mem:$dst, i64i32imm:$src), - "xor{q} {$src, $dst|$dst, $src}", + "xor{q}\t{$src, $dst|$dst, $src}", [(store (xor (loadi64 addr:$dst), i64immSExt32:$src), addr:$dst)]>; def XOR64mi8 : RIi8<0x83, MRM6m, (outs), (ins i64mem:$dst, i64i8imm :$src), - "xor{q} {$src, $dst|$dst, $src}", + "xor{q}\t{$src, $dst|$dst, $src}", [(store (xor (load addr:$dst), i64immSExt8:$src), addr:$dst)]>; //===----------------------------------------------------------------------===// @@ -685,180 +685,180 @@ // Integer comparison let isCommutable = 1 in def TEST64rr : RI<0x85, MRMDestReg, (outs), (ins GR64:$src1, GR64:$src2), - "test{q} {$src2, $src1|$src1, $src2}", + "test{q}\t{$src2, $src1|$src1, $src2}", [(X86cmp (and GR64:$src1, GR64:$src2), 0)]>; def TEST64rm : RI<0x85, MRMSrcMem, (outs), (ins GR64:$src1, i64mem:$src2), - "test{q} {$src2, $src1|$src1, $src2}", + "test{q}\t{$src2, $src1|$src1, $src2}", [(X86cmp (and GR64:$src1, (loadi64 addr:$src2)), 0)]>; def TEST64ri32 : RIi32<0xF7, MRM0r, (outs), (ins GR64:$src1, i64i32imm:$src2), - "test{q} {$src2, $src1|$src1, $src2}", + "test{q}\t{$src2, $src1|$src1, $src2}", [(X86cmp (and GR64:$src1, i64immSExt32:$src2), 0)]>; def TEST64mi32 : RIi32<0xF7, MRM0m, (outs), (ins i64mem:$src1, i64i32imm:$src2), - "test{q} {$src2, $src1|$src1, $src2}", + "test{q}\t{$src2, $src1|$src1, $src2}", [(X86cmp (and (loadi64 addr:$src1), i64immSExt32:$src2), 0)]>; def CMP64rr : RI<0x39, MRMDestReg, (outs), (ins GR64:$src1, GR64:$src2), - "cmp{q} {$src2, $src1|$src1, $src2}", + "cmp{q}\t{$src2, $src1|$src1, $src2}", [(X86cmp GR64:$src1, GR64:$src2)]>; def CMP64mr : RI<0x39, MRMDestMem, (outs), (ins i64mem:$src1, GR64:$src2), - "cmp{q} {$src2, $src1|$src1, $src2}", + "cmp{q}\t{$src2, $src1|$src1, $src2}", [(X86cmp (loadi64 addr:$src1), GR64:$src2)]>; def CMP64rm : RI<0x3B, MRMSrcMem, (outs), (ins GR64:$src1, i64mem:$src2), - "cmp{q} {$src2, $src1|$src1, $src2}", + "cmp{q}\t{$src2, $src1|$src1, $src2}", [(X86cmp GR64:$src1, (loadi64 addr:$src2))]>; def CMP64ri32 : RIi32<0x81, MRM7r, (outs), (ins GR64:$src1, i64i32imm:$src2), - "cmp{q} {$src2, $src1|$src1, $src2}", + "cmp{q}\t{$src2, $src1|$src1, $src2}", [(X86cmp GR64:$src1, i64immSExt32:$src2)]>; def CMP64mi32 : RIi32<0x81, MRM7m, (outs), (ins i64mem:$src1, i64i32imm:$src2), - "cmp{q} {$src2, $src1|$src1, $src2}", + "cmp{q}\t{$src2, $src1|$src1, $src2}", [(X86cmp (loadi64 addr:$src1), i64immSExt32:$src2)]>; def CMP64mi8 : RIi8<0x83, MRM7m, (outs), (ins i64mem:$src1, i64i8imm:$src2), - "cmp{q} {$src2, $src1|$src1, $src2}", + "cmp{q}\t{$src2, $src1|$src1, $src2}", [(X86cmp (loadi64 addr:$src1), i64immSExt8:$src2)]>; def CMP64ri8 : RIi8<0x83, MRM7r, (outs), (ins GR64:$src1, i64i8imm:$src2), - "cmp{q} {$src2, $src1|$src1, $src2}", + "cmp{q}\t{$src2, $src1|$src1, $src2}", [(X86cmp GR64:$src1, i64immSExt8:$src2)]>; // Conditional moves let isTwoAddress = 1 in { def CMOVB64rr : RI<0x42, MRMSrcReg, // if , TB; def CMOVB64rm : RI<0x42, MRMSrcMem, // if , TB; def CMOVAE64rr: RI<0x43, MRMSrcReg, // if >=u, GR64 = GR64 (outs GR64:$dst), (ins GR64:$src1, GR64:$src2), - "cmovae {$src2, $dst|$dst, $src2}", + "cmovae\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (X86cmov GR64:$src1, GR64:$src2, X86_COND_AE))]>, TB; def CMOVAE64rm: RI<0x43, MRMSrcMem, // if >=u, GR64 = [mem64] (outs GR64:$dst), (ins GR64:$src1, i64mem:$src2), - "cmovae {$src2, $dst|$dst, $src2}", + "cmovae\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (X86cmov GR64:$src1, (loadi64 addr:$src2), X86_COND_AE))]>, TB; def CMOVE64rr : RI<0x44, MRMSrcReg, // if ==, GR64 = GR64 (outs GR64:$dst), (ins GR64:$src1, GR64:$src2), - "cmove {$src2, $dst|$dst, $src2}", + "cmove\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (X86cmov GR64:$src1, GR64:$src2, X86_COND_E))]>, TB; def CMOVE64rm : RI<0x44, MRMSrcMem, // if ==, GR64 = [mem64] (outs GR64:$dst), (ins GR64:$src1, i64mem:$src2), - "cmove {$src2, $dst|$dst, $src2}", + "cmove\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (X86cmov GR64:$src1, (loadi64 addr:$src2), X86_COND_E))]>, TB; def CMOVNE64rr: RI<0x45, MRMSrcReg, // if !=, GR64 = GR64 (outs GR64:$dst), (ins GR64:$src1, GR64:$src2), - "cmovne {$src2, $dst|$dst, $src2}", + "cmovne\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (X86cmov GR64:$src1, GR64:$src2, X86_COND_NE))]>, TB; def CMOVNE64rm: RI<0x45, MRMSrcMem, // if !=, GR64 = [mem64] (outs GR64:$dst), (ins GR64:$src1, i64mem:$src2), - "cmovne {$src2, $dst|$dst, $src2}", + "cmovne\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (X86cmov GR64:$src1, (loadi64 addr:$src2), X86_COND_NE))]>, TB; def CMOVBE64rr: RI<0x46, MRMSrcReg, // if <=u, GR64 = GR64 (outs GR64:$dst), (ins GR64:$src1, GR64:$src2), - "cmovbe {$src2, $dst|$dst, $src2}", + "cmovbe\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (X86cmov GR64:$src1, GR64:$src2, X86_COND_BE))]>, TB; def CMOVBE64rm: RI<0x46, MRMSrcMem, // if <=u, GR64 = [mem64] (outs GR64:$dst), (ins GR64:$src1, i64mem:$src2), - "cmovbe {$src2, $dst|$dst, $src2}", + "cmovbe\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (X86cmov GR64:$src1, (loadi64 addr:$src2), X86_COND_BE))]>, TB; def CMOVA64rr : RI<0x47, MRMSrcReg, // if >u, GR64 = GR64 (outs GR64:$dst), (ins GR64:$src1, GR64:$src2), - "cmova {$src2, $dst|$dst, $src2}", + "cmova\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (X86cmov GR64:$src1, GR64:$src2, X86_COND_A))]>, TB; def CMOVA64rm : RI<0x47, MRMSrcMem, // if >u, GR64 = [mem64] (outs GR64:$dst), (ins GR64:$src1, i64mem:$src2), - "cmova {$src2, $dst|$dst, $src2}", + "cmova\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (X86cmov GR64:$src1, (loadi64 addr:$src2), X86_COND_A))]>, TB; def CMOVL64rr : RI<0x4C, MRMSrcReg, // if , TB; def CMOVL64rm : RI<0x4C, MRMSrcMem, // if , TB; def CMOVGE64rr: RI<0x4D, MRMSrcReg, // if >=s, GR64 = GR64 (outs GR64:$dst), (ins GR64:$src1, GR64:$src2), - "cmovge {$src2, $dst|$dst, $src2}", + "cmovge\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (X86cmov GR64:$src1, GR64:$src2, X86_COND_GE))]>, TB; def CMOVGE64rm: RI<0x4D, MRMSrcMem, // if >=s, GR64 = [mem64] (outs GR64:$dst), (ins GR64:$src1, i64mem:$src2), - "cmovge {$src2, $dst|$dst, $src2}", + "cmovge\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (X86cmov GR64:$src1, (loadi64 addr:$src2), X86_COND_GE))]>, TB; def CMOVLE64rr: RI<0x4E, MRMSrcReg, // if <=s, GR64 = GR64 (outs GR64:$dst), (ins GR64:$src1, GR64:$src2), - "cmovle {$src2, $dst|$dst, $src2}", + "cmovle\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (X86cmov GR64:$src1, GR64:$src2, X86_COND_LE))]>, TB; def CMOVLE64rm: RI<0x4E, MRMSrcMem, // if <=s, GR64 = [mem64] (outs GR64:$dst), (ins GR64:$src1, i64mem:$src2), - "cmovle {$src2, $dst|$dst, $src2}", + "cmovle\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (X86cmov GR64:$src1, (loadi64 addr:$src2), X86_COND_LE))]>, TB; def CMOVG64rr : RI<0x4F, MRMSrcReg, // if >s, GR64 = GR64 (outs GR64:$dst), (ins GR64:$src1, GR64:$src2), - "cmovg {$src2, $dst|$dst, $src2}", + "cmovg\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (X86cmov GR64:$src1, GR64:$src2, X86_COND_G))]>, TB; def CMOVG64rm : RI<0x4F, MRMSrcMem, // if >s, GR64 = [mem64] (outs GR64:$dst), (ins GR64:$src1, i64mem:$src2), - "cmovg {$src2, $dst|$dst, $src2}", + "cmovg\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (X86cmov GR64:$src1, (loadi64 addr:$src2), X86_COND_G))]>, TB; def CMOVS64rr : RI<0x48, MRMSrcReg, // if signed, GR64 = GR64 (outs GR64:$dst), (ins GR64:$src1, GR64:$src2), - "cmovs {$src2, $dst|$dst, $src2}", + "cmovs\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (X86cmov GR64:$src1, GR64:$src2, X86_COND_S))]>, TB; def CMOVS64rm : RI<0x48, MRMSrcMem, // if signed, GR64 = [mem64] (outs GR64:$dst), (ins GR64:$src1, i64mem:$src2), - "cmovs {$src2, $dst|$dst, $src2}", + "cmovs\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (X86cmov GR64:$src1, (loadi64 addr:$src2), X86_COND_S))]>, TB; def CMOVNS64rr: RI<0x49, MRMSrcReg, // if !signed, GR64 = GR64 (outs GR64:$dst), (ins GR64:$src1, GR64:$src2), - "cmovns {$src2, $dst|$dst, $src2}", + "cmovns\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (X86cmov GR64:$src1, GR64:$src2, X86_COND_NS))]>, TB; def CMOVNS64rm: RI<0x49, MRMSrcMem, // if !signed, GR64 = [mem64] (outs GR64:$dst), (ins GR64:$src1, i64mem:$src2), - "cmovns {$src2, $dst|$dst, $src2}", + "cmovns\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (X86cmov GR64:$src1, (loadi64 addr:$src2), X86_COND_NS))]>, TB; def CMOVP64rr : RI<0x4A, MRMSrcReg, // if parity, GR64 = GR64 (outs GR64:$dst), (ins GR64:$src1, GR64:$src2), - "cmovp {$src2, $dst|$dst, $src2}", + "cmovp\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (X86cmov GR64:$src1, GR64:$src2, X86_COND_P))]>, TB; def CMOVP64rm : RI<0x4A, MRMSrcMem, // if parity, GR64 = [mem64] (outs GR64:$dst), (ins GR64:$src1, i64mem:$src2), - "cmovp {$src2, $dst|$dst, $src2}", + "cmovp\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (X86cmov GR64:$src1, (loadi64 addr:$src2), X86_COND_P))]>, TB; def CMOVNP64rr : RI<0x4B, MRMSrcReg, // if !parity, GR64 = GR64 (outs GR64:$dst), (ins GR64:$src1, GR64:$src2), - "cmovnp {$src2, $dst|$dst, $src2}", + "cmovnp\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (X86cmov GR64:$src1, GR64:$src2, X86_COND_NP))]>, TB; def CMOVNP64rm : RI<0x4B, MRMSrcMem, // if !parity, GR64 = [mem64] (outs GR64:$dst), (ins GR64:$src1, i64mem:$src2), - "cmovnp {$src2, $dst|$dst, $src2}", + "cmovnp\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (X86cmov GR64:$src1, (loadi64 addr:$src2), X86_COND_NP))]>, TB; } // isTwoAddress @@ -869,46 +869,46 @@ // f64 -> signed i64 def Int_CVTSD2SI64rr: RSDI<0x2D, MRMSrcReg, (outs GR64:$dst), (ins VR128:$src), - "cvtsd2si{q} {$src, $dst|$dst, $src}", + "cvtsd2si{q}\t{$src, $dst|$dst, $src}", [(set GR64:$dst, (int_x86_sse2_cvtsd2si64 VR128:$src))]>; def Int_CVTSD2SI64rm: RSDI<0x2D, MRMSrcMem, (outs GR64:$dst), (ins f128mem:$src), - "cvtsd2si{q} {$src, $dst|$dst, $src}", + "cvtsd2si{q}\t{$src, $dst|$dst, $src}", [(set GR64:$dst, (int_x86_sse2_cvtsd2si64 (load addr:$src)))]>; def CVTTSD2SI64rr: RSDI<0x2C, MRMSrcReg, (outs GR64:$dst), (ins FR64:$src), - "cvttsd2si{q} {$src, $dst|$dst, $src}", + "cvttsd2si{q}\t{$src, $dst|$dst, $src}", [(set GR64:$dst, (fp_to_sint FR64:$src))]>; def CVTTSD2SI64rm: RSDI<0x2C, MRMSrcMem, (outs GR64:$dst), (ins f64mem:$src), - "cvttsd2si{q} {$src, $dst|$dst, $src}", + "cvttsd2si{q}\t{$src, $dst|$dst, $src}", [(set GR64:$dst, (fp_to_sint (loadf64 addr:$src)))]>; def Int_CVTTSD2SI64rr: RSDI<0x2C, MRMSrcReg, (outs GR64:$dst), (ins VR128:$src), - "cvttsd2si{q} {$src, $dst|$dst, $src}", + "cvttsd2si{q}\t{$src, $dst|$dst, $src}", [(set GR64:$dst, (int_x86_sse2_cvttsd2si64 VR128:$src))]>; def Int_CVTTSD2SI64rm: RSDI<0x2C, MRMSrcMem, (outs GR64:$dst), (ins f128mem:$src), - "cvttsd2si{q} {$src, $dst|$dst, $src}", + "cvttsd2si{q}\t{$src, $dst|$dst, $src}", [(set GR64:$dst, (int_x86_sse2_cvttsd2si64 (load addr:$src)))]>; // Signed i64 -> f64 def CVTSI2SD64rr: RSDI<0x2A, MRMSrcReg, (outs FR64:$dst), (ins GR64:$src), - "cvtsi2sd{q} {$src, $dst|$dst, $src}", + "cvtsi2sd{q}\t{$src, $dst|$dst, $src}", [(set FR64:$dst, (sint_to_fp GR64:$src))]>; def CVTSI2SD64rm: RSDI<0x2A, MRMSrcMem, (outs FR64:$dst), (ins i64mem:$src), - "cvtsi2sd{q} {$src, $dst|$dst, $src}", + "cvtsi2sd{q}\t{$src, $dst|$dst, $src}", [(set FR64:$dst, (sint_to_fp (loadi64 addr:$src)))]>; let isTwoAddress = 1 in { def Int_CVTSI2SD64rr: RSDI<0x2A, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, GR64:$src2), - "cvtsi2sd{q} {$src2, $dst|$dst, $src2}", + "cvtsi2sd{q}\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (int_x86_sse2_cvtsi642sd VR128:$src1, GR64:$src2))]>; def Int_CVTSI2SD64rm: RSDI<0x2A, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, i64mem:$src2), - "cvtsi2sd{q} {$src2, $dst|$dst, $src2}", + "cvtsi2sd{q}\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (int_x86_sse2_cvtsi642sd VR128:$src1, (loadi64 addr:$src2)))]>; @@ -916,56 +916,56 @@ // Signed i64 -> f32 def CVTSI2SS64rr: RSSI<0x2A, MRMSrcReg, (outs FR32:$dst), (ins GR64:$src), - "cvtsi2ss{q} {$src, $dst|$dst, $src}", + "cvtsi2ss{q}\t{$src, $dst|$dst, $src}", [(set FR32:$dst, (sint_to_fp GR64:$src))]>; def CVTSI2SS64rm: RSSI<0x2A, MRMSrcMem, (outs FR32:$dst), (ins i64mem:$src), - "cvtsi2ss{q} {$src, $dst|$dst, $src}", + "cvtsi2ss{q}\t{$src, $dst|$dst, $src}", [(set FR32:$dst, (sint_to_fp (loadi64 addr:$src)))]>; let isTwoAddress = 1 in { def Int_CVTSI2SS64rr: RSSI<0x2A, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, GR64:$src2), - "cvtsi2ss{q} {$src2, $dst|$dst, $src2}", + "cvtsi2ss{q}\t{$src2, $dst|$dst, $src2}", []>; // TODO: add intrinsic def Int_CVTSI2SS64rm: RSSI<0x2A, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, i64mem:$src2), - "cvtsi2ss{q} {$src2, $dst|$dst, $src2}", + "cvtsi2ss{q}\t{$src2, $dst|$dst, $src2}", []>; // TODO: add intrinsic } // isTwoAddress // f32 -> signed i64 def Int_CVTSS2SI64rr: RSSI<0x2D, MRMSrcReg, (outs GR64:$dst), (ins VR128:$src), - "cvtss2si{q} {$src, $dst|$dst, $src}", + "cvtss2si{q}\t{$src, $dst|$dst, $src}", [(set GR64:$dst, (int_x86_sse_cvtss2si64 VR128:$src))]>; def Int_CVTSS2SI64rm: RSSI<0x2D, MRMSrcMem, (outs GR64:$dst), (ins f32mem:$src), - "cvtss2si{q} {$src, $dst|$dst, $src}", + "cvtss2si{q}\t{$src, $dst|$dst, $src}", [(set GR64:$dst, (int_x86_sse_cvtss2si64 (load addr:$src)))]>; def CVTTSS2SI64rr: RSSI<0x2C, MRMSrcReg, (outs GR64:$dst), (ins FR32:$src), - "cvttss2si{q} {$src, $dst|$dst, $src}", + "cvttss2si{q}\t{$src, $dst|$dst, $src}", [(set GR64:$dst, (fp_to_sint FR32:$src))]>; def CVTTSS2SI64rm: RSSI<0x2C, MRMSrcMem, (outs GR64:$dst), (ins f32mem:$src), - "cvttss2si{q} {$src, $dst|$dst, $src}", + "cvttss2si{q}\t{$src, $dst|$dst, $src}", [(set GR64:$dst, (fp_to_sint (loadf32 addr:$src)))]>; def Int_CVTTSS2SI64rr: RSSI<0x2C, MRMSrcReg, (outs GR64:$dst), (ins VR128:$src), - "cvttss2si{q} {$src, $dst|$dst, $src}", + "cvttss2si{q}\t{$src, $dst|$dst, $src}", [(set GR64:$dst, (int_x86_sse_cvttss2si64 VR128:$src))]>; def Int_CVTTSS2SI64rm: RSSI<0x2C, MRMSrcMem, (outs GR64:$dst), (ins f32mem:$src), - "cvttss2si{q} {$src, $dst|$dst, $src}", + "cvttss2si{q}\t{$src, $dst|$dst, $src}", [(set GR64:$dst, (int_x86_sse_cvttss2si64 (load addr:$src)))]>; let isTwoAddress = 1 in { def Int_CVTSI642SSrr : RSSI<0x2A, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, GR64:$src2), - "cvtsi2ss{q} {$src2, $dst|$dst, $src2}", + "cvtsi2ss{q}\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (int_x86_sse_cvtsi642ss VR128:$src1, GR64:$src2))]>; def Int_CVTSI642SSrm : RSSI<0x2A, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, i64mem:$src2), - "cvtsi2ss{q} {$src2, $dst|$dst, $src2}", + "cvtsi2ss{q}\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (int_x86_sse_cvtsi642ss VR128:$src1, (loadi64 addr:$src2)))]>; @@ -978,10 +978,10 @@ // Zero-extension // TODO: Remove this after proper i32 -> i64 zext support. def PsMOVZX64rr32: I<0x89, MRMDestReg, (outs GR64:$dst), (ins GR32:$src), - "mov{l} {$src, ${dst:subreg32}|${dst:subreg32}, $src}", + "mov{l}\t{$src, ${dst:subreg32}|${dst:subreg32}, $src}", [(set GR64:$dst, (zext GR32:$src))]>; def PsMOVZX64rm32: I<0x8B, MRMSrcMem, (outs GR64:$dst), (ins i32mem:$src), - "mov{l} {$src, ${dst:subreg32}|${dst:subreg32}, $src}", + "mov{l}\t{$src, ${dst:subreg32}|${dst:subreg32}, $src}", [(set GR64:$dst, (zextloadi64i32 addr:$src))]>; @@ -991,13 +991,13 @@ // when we have a better way to specify isel priority. let AddedComplexity = 1 in def MOV64r0 : RI<0x31, MRMInitReg, (outs GR64:$dst), (ins), - "xor{q} $dst, $dst", + "xor{q}\t$dst, $dst", [(set GR64:$dst, 0)]>; // Materialize i64 constant where top 32-bits are zero. let AddedComplexity = 1 in def MOV64ri64i32 : Ii32<0xB8, AddRegFrm, (outs GR64:$dst), (ins i64i32imm:$src), - "mov{l} {$src, ${dst:subreg32}|${dst:subreg32}, $src}", + "mov{l}\t{$src, ${dst:subreg32}|${dst:subreg32}, $src}", [(set GR64:$dst, i64immZExt32:$src)]>; //===----------------------------------------------------------------------===// @@ -1113,33 +1113,33 @@ // Move instructions... def MOV64toPQIrr : RPDI<0x6E, MRMSrcReg, (outs VR128:$dst), (ins GR64:$src), - "mov{d|q} {$src, $dst|$dst, $src}", + "mov{d|q}\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (v2i64 (scalar_to_vector GR64:$src)))]>; def MOV64toPQIrm : RPDI<0x6E, MRMSrcMem, (outs VR128:$dst), (ins i64mem:$src), - "mov{d|q} {$src, $dst|$dst, $src}", + "mov{d|q}\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (v2i64 (scalar_to_vector (loadi64 addr:$src))))]>; def MOVPQIto64rr : RPDI<0x7E, MRMDestReg, (outs GR64:$dst), (ins VR128:$src), - "mov{d|q} {$src, $dst|$dst, $src}", + "mov{d|q}\t{$src, $dst|$dst, $src}", [(set GR64:$dst, (vector_extract (v2i64 VR128:$src), (iPTR 0)))]>; def MOVPQIto64mr : RPDI<0x7E, MRMDestMem, (outs), (ins i64mem:$dst, VR128:$src), - "mov{d|q} {$src, $dst|$dst, $src}", + "mov{d|q}\t{$src, $dst|$dst, $src}", [(store (i64 (vector_extract (v2i64 VR128:$src), (iPTR 0))), addr:$dst)]>; def MOV64toSDrr : RPDI<0x6E, MRMSrcReg, (outs FR64:$dst), (ins GR64:$src), - "mov{d|q} {$src, $dst|$dst, $src}", + "mov{d|q}\t{$src, $dst|$dst, $src}", [(set FR64:$dst, (bitconvert GR64:$src))]>; def MOV64toSDrm : RPDI<0x6E, MRMSrcMem, (outs FR64:$dst), (ins i64mem:$src), - "mov{d|q} {$src, $dst|$dst, $src}", + "mov{d|q}\t{$src, $dst|$dst, $src}", [(set FR64:$dst, (bitconvert (loadi64 addr:$src)))]>; def MOVSDto64rr : RPDI<0x7E, MRMDestReg, (outs GR64:$dst), (ins FR64:$src), - "mov{d|q} {$src, $dst|$dst, $src}", + "mov{d|q}\t{$src, $dst|$dst, $src}", [(set GR64:$dst, (bitconvert FR64:$src))]>; def MOVSDto64mr : RPDI<0x7E, MRMDestMem, (outs), (ins i64mem:$dst, FR64:$src), - "mov{d|q} {$src, $dst|$dst, $src}", + "mov{d|q}\t{$src, $dst|$dst, $src}", [(store (i64 (bitconvert FR64:$src)), addr:$dst)]>; Modified: llvm/trunk/test/CodeGen/Generic/2007-02-23-DAGCombine-Miscompile.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Generic/2007-02-23-DAGCombine-Miscompile.ll?rev=40648&r1=40647&r2=40648&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/Generic/2007-02-23-DAGCombine-Miscompile.ll (original) +++ llvm/trunk/test/CodeGen/Generic/2007-02-23-DAGCombine-Miscompile.ll Tue Jul 31 15:11:57 2007 @@ -1,5 +1,5 @@ ; PR1219 -; RUN: llvm-as < %s | llc -march=x86 | grep {movl \$1, %eax} +; RUN: llvm-as < %s | llc -march=x86 | grep {movl \$1, %eax} define i32 @test(i1 %X) { old_entry1: Modified: llvm/trunk/test/CodeGen/Generic/phi-immediate-factoring.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Generic/phi-immediate-factoring.ll?rev=40648&r1=40647&r2=40648&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/Generic/phi-immediate-factoring.ll (original) +++ llvm/trunk/test/CodeGen/Generic/phi-immediate-factoring.ll Tue Jul 31 15:11:57 2007 @@ -1,5 +1,5 @@ ; PR1296 -; RUN: llvm-as < %s | llc -march=x86 | grep {movl \$1} | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=x86 | grep {movl \$1} | wc -l | grep 1 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" target triple = "i686-apple-darwin8" Modified: llvm/trunk/test/CodeGen/X86/2006-04-27-ISelFoldingBug.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2006-04-27-ISelFoldingBug.ll?rev=40648&r1=40647&r2=40648&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/2006-04-27-ISelFoldingBug.ll (original) +++ llvm/trunk/test/CodeGen/X86/2006-04-27-ISelFoldingBug.ll Tue Jul 31 15:11:57 2007 @@ -1,6 +1,6 @@ ; RUN: llvm-upgrade < %s | llvm-as | \ ; RUN: llc -march=x86 -mtriple=i686-apple-darwin8 -relocation-model=static | \ -; RUN: grep {movl _last} | wc -l | grep 1 +; RUN: grep {movl _last} | wc -l | grep 1 ; RUN: llvm-upgrade < %s | llvm-as | \ ; RUN: llc -march=x86 -mtriple=i686-apple-darwin8 -relocation-model=static | \ ; RUN: grep {cmpl.*_last} | wc -l | grep 1 Modified: llvm/trunk/test/CodeGen/X86/2006-11-12-CSRetCC.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2006-11-12-CSRetCC.ll?rev=40648&r1=40647&r2=40648&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/2006-11-12-CSRetCC.ll (original) +++ llvm/trunk/test/CodeGen/X86/2006-11-12-CSRetCC.ll Tue Jul 31 15:11:57 2007 @@ -1,4 +1,4 @@ -; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep {subl \$4, %esp} +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep {subl \$4, %esp} target triple = "i686-pc-linux-gnu" Modified: llvm/trunk/test/CodeGen/X86/2006-11-17-IllegalMove.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2006-11-17-IllegalMove.ll?rev=40648&r1=40647&r2=40648&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/2006-11-17-IllegalMove.ll (original) +++ llvm/trunk/test/CodeGen/X86/2006-11-17-IllegalMove.ll Tue Jul 31 15:11:57 2007 @@ -1,7 +1,7 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86-64 | \ -; RUN: not grep {movb %sil, %ah} +; RUN: not grep {movb %sil, %ah} ; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86-64 | \ -; RUN: grep {movzbw %al, %ax} +; RUN: grep {movzbw %al, %ax} void %handle_vector_size_attribute() { entry: Modified: llvm/trunk/test/CodeGen/X86/2006-11-28-Memcpy.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2006-11-28-Memcpy.ll?rev=40648&r1=40647&r2=40648&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/2006-11-28-Memcpy.ll (original) +++ llvm/trunk/test/CodeGen/X86/2006-11-28-Memcpy.ll Tue Jul 31 15:11:57 2007 @@ -2,7 +2,7 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | \ ; RUN: grep 3721182122 | wc -l | grep 2 ; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | \ -; RUN: grep -E {movl _?bytes2} | wc -l | grep 1 +; RUN: grep -E {movl _?bytes2} | wc -l | grep 1 %fmt = constant [4 x sbyte] c"%x\0A\00" %bytes = constant [4 x sbyte] c"\AA\BB\CC\DD" Modified: llvm/trunk/test/CodeGen/X86/2007-01-08-InstrSched.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-01-08-InstrSched.ll?rev=40648&r1=40647&r2=40648&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/2007-01-08-InstrSched.ll (original) +++ llvm/trunk/test/CodeGen/X86/2007-01-08-InstrSched.ll Tue Jul 31 15:11:57 2007 @@ -1,6 +1,6 @@ ; PR1075 ; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin | \ -; RUN: %prcontext {mulss LCPI1_3} 1 | grep mulss | wc -l | grep 1 +; RUN: %prcontext {mulss LCPI1_3} 1 | grep mulss | wc -l | grep 1 define float @foo(float %x) { %tmp1 = mul float %x, 3.000000e+00 Modified: llvm/trunk/test/CodeGen/X86/2007-02-04-OrAddrMode.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-02-04-OrAddrMode.ll?rev=40648&r1=40647&r2=40648&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/2007-02-04-OrAddrMode.ll (original) +++ llvm/trunk/test/CodeGen/X86/2007-02-04-OrAddrMode.ll Tue Jul 31 15:11:57 2007 @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep {orl \$1, %eax} -; RUN: llvm-as < %s | llc -march=x86 | grep {leal 3(,%eax,8)} +; RUN: llvm-as < %s | llc -march=x86 | grep {orl \$1, %eax} +; RUN: llvm-as < %s | llc -march=x86 | grep {leal 3(,%eax,8)} ;; This example can't fold the or into an LEA. define i32 @test(float ** %tmp2, i32 %tmp12) { Modified: llvm/trunk/test/CodeGen/X86/2007-07-03-GR64ToVR64.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-07-03-GR64ToVR64.ll?rev=40648&r1=40647&r2=40648&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/2007-07-03-GR64ToVR64.ll (original) +++ llvm/trunk/test/CodeGen/X86/2007-07-03-GR64ToVR64.ll Tue Jul 31 15:11:57 2007 @@ -1,6 +1,6 @@ -; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+mmx | grep {movd %rsi, %mm0} && -; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+mmx | grep {movd %rdi, %mm1} && -; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+mmx | grep {paddusw %mm0, %mm1} +; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+mmx | grep {movd %rsi, %mm0} && +; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+mmx | grep {movd %rdi, %mm1} && +; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+mmx | grep {paddusw %mm0, %mm1} @R = external global <1 x i64> ; <<1 x i64>*> [#uses=1] Modified: llvm/trunk/test/CodeGen/X86/2007-07-18-Vector-Extract.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-07-18-Vector-Extract.ll?rev=40648&r1=40647&r2=40648&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/2007-07-18-Vector-Extract.ll (original) +++ llvm/trunk/test/CodeGen/X86/2007-07-18-Vector-Extract.ll Tue Jul 31 15:11:57 2007 @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+sse | grep {movq (%rdi), %rax} -; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+sse | grep {movq 8(%rdi), %rax} +; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+sse | grep {movq (%rdi), %rax} +; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+sse | grep {movq 8(%rdi), %rax} define i64 @foo_0(<2 x i64>* %val) { entry: %val12 = getelementptr <2 x i64>* %val, i32 0, i32 0 ; [#uses=1] Modified: llvm/trunk/test/CodeGen/X86/commute-two-addr.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/commute-two-addr.ll?rev=40648&r1=40647&r2=40648&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/commute-two-addr.ll (original) +++ llvm/trunk/test/CodeGen/X86/commute-two-addr.ll Tue Jul 31 15:11:57 2007 @@ -3,7 +3,7 @@ ; Make sure there are only 3 mov's for each testcase ; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -x86-asm-syntax=intel | \ -; RUN: grep {mov } | wc -l | grep 6 +; RUN: grep {\\\} | wc -l | grep 6 target triple = "i686-pc-linux-gnu" Modified: llvm/trunk/test/CodeGen/X86/epilogue.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/epilogue.ll?rev=40648&r1=40647&r2=40648&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/epilogue.ll (original) +++ llvm/trunk/test/CodeGen/X86/epilogue.ll Tue Jul 31 15:11:57 2007 @@ -1,5 +1,5 @@ ; RUN: llvm-as < %s | llc -march=x86 | not grep lea -; RUN: llvm-as < %s | llc -march=x86 | grep {movl %ebp} +; RUN: llvm-as < %s | llc -march=x86 | grep {movl %ebp} declare void @bar(<2 x i64>* %n) Modified: llvm/trunk/test/CodeGen/X86/fast-cc-callee-pops.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fast-cc-callee-pops.ll?rev=40648&r1=40647&r2=40648&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/fast-cc-callee-pops.ll (original) +++ llvm/trunk/test/CodeGen/X86/fast-cc-callee-pops.ll Tue Jul 31 15:11:57 2007 @@ -1,5 +1,5 @@ ; RUN: llvm-upgrade < %s | llvm-as | \ -; RUN: llc -march=x86 -x86-asm-syntax=intel -mcpu=yonah | grep {ret 20} +; RUN: llc -march=x86 -x86-asm-syntax=intel -mcpu=yonah | grep {ret 20} ; Check that a fastcc function pops its stack variables before returning. Modified: llvm/trunk/test/CodeGen/X86/fast-cc-merge-stack-adj.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fast-cc-merge-stack-adj.ll?rev=40648&r1=40647&r2=40648&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/fast-cc-merge-stack-adj.ll (original) +++ llvm/trunk/test/CodeGen/X86/fast-cc-merge-stack-adj.ll Tue Jul 31 15:11:57 2007 @@ -1,5 +1,5 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -x86-asm-syntax=intel | \ -; RUN: grep {add ESP, 8} +; RUN: grep {add ESP, 8} target triple = "i686-pc-linux-gnu" Modified: llvm/trunk/test/CodeGen/X86/fast-cc-pass-in-regs.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fast-cc-pass-in-regs.ll?rev=40648&r1=40647&r2=40648&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/fast-cc-pass-in-regs.ll (original) +++ llvm/trunk/test/CodeGen/X86/fast-cc-pass-in-regs.ll Tue Jul 31 15:11:57 2007 @@ -1,5 +1,5 @@ ; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | \ -; RUN: grep {mov EDX, 1} +; RUN: grep {mov EDX, 1} ; check that fastcc is passing stuff in regs. declare x86_fastcallcc i64 @callee(i64) Modified: llvm/trunk/test/CodeGen/X86/i128-ret.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/i128-ret.ll?rev=40648&r1=40647&r2=40648&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/i128-ret.ll (original) +++ llvm/trunk/test/CodeGen/X86/i128-ret.ll Tue Jul 31 15:11:57 2007 @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep {movq 8(%rdi), %rdx} -; RUN: llvm-as < %s | llc -march=x86-64 | grep {movq (%rdi), %rax} +; RUN: llvm-as < %s | llc -march=x86-64 | grep {movq 8(%rdi), %rdx} +; RUN: llvm-as < %s | llc -march=x86-64 | grep {movq (%rdi), %rax} define i128 @test(i128 *%P) { %A = load i128* %P Modified: llvm/trunk/test/CodeGen/X86/illegal-vector-args-return.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/illegal-vector-args-return.ll?rev=40648&r1=40647&r2=40648&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/illegal-vector-args-return.ll (original) +++ llvm/trunk/test/CodeGen/X86/illegal-vector-args-return.ll Tue Jul 31 15:11:57 2007 @@ -1,7 +1,7 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep {mulpd %xmm3, %xmm1} -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep {mulpd %xmm2, %xmm0} -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep {addps %xmm3, %xmm1} -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep {addps %xmm2, %xmm0} +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep {mulpd %xmm3, %xmm1} +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep {mulpd %xmm2, %xmm0} +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep {addps %xmm3, %xmm1} +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep {addps %xmm2, %xmm0} define <4 x double> @foo(<4 x double> %x, <4 x double> %z) { %y = mul <4 x double> %x, %z Modified: llvm/trunk/test/CodeGen/X86/isel-sink.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/isel-sink.ll?rev=40648&r1=40647&r2=40648&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/isel-sink.ll (original) +++ llvm/trunk/test/CodeGen/X86/isel-sink.ll Tue Jul 31 15:11:57 2007 @@ -1,6 +1,6 @@ ; RUN: llvm-as < %s | llc -march=x86 | not grep lea ; RUN: llvm-as < %s | llc -march=x86 -mtriple=i686-apple-darwin8 | \ -; RUN: grep {movl \$4, (.*,.*,4)} +; RUN: grep {movl \$4, (.*,.*,4)} define i32 @test(i32* %X, i32 %B) { ; This gep should be sunk out of this block into the load/store users. Modified: llvm/trunk/test/CodeGen/X86/lea-2.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/lea-2.ll?rev=40648&r1=40647&r2=40648&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/lea-2.ll (original) +++ llvm/trunk/test/CodeGen/X86/lea-2.ll Tue Jul 31 15:11:57 2007 @@ -1,5 +1,5 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -x86-asm-syntax=intel | \ -; RUN: grep {lea EAX, DWORD PTR \\\[... + 4\\*... - 5\\\]} +; RUN: grep {lea EAX, DWORD PTR \\\[... + 4\\*... - 5\\\]} ; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -x86-asm-syntax=intel | \ ; RUN: not grep add Modified: llvm/trunk/test/CodeGen/X86/lea-3.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/lea-3.ll?rev=40648&r1=40647&r2=40648&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/lea-3.ll (original) +++ llvm/trunk/test/CodeGen/X86/lea-3.ll Tue Jul 31 15:11:57 2007 @@ -1,11 +1,11 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep {leal (%rdi,%rdi,2), %eax} +; RUN: llvm-as < %s | llc -march=x86-64 | grep {leal (%rdi,%rdi,2), %eax} define i32 @test(i32 %a) { %tmp2 = mul i32 %a, 3 ; [#uses=1] ret i32 %tmp2 } -; RUN: llvm-as < %s | llc -march=x86-64 | grep {leaq (,%rdi,4), %rax} +; RUN: llvm-as < %s | llc -march=x86-64 | grep {leaq (,%rdi,4), %rax} define i64 @test2(i64 %a) { %tmp2 = shl i64 %a, 2 %tmp3 = or i64 %tmp2, %a Modified: llvm/trunk/test/CodeGen/X86/mingw-alloca.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mingw-alloca.ll?rev=40648&r1=40647&r2=40648&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/mingw-alloca.ll (original) +++ llvm/trunk/test/CodeGen/X86/mingw-alloca.ll Tue Jul 31 15:11:57 2007 @@ -1,7 +1,7 @@ ; RUN: llvm-as < %s | llc -o %t -f ; RUN: grep __alloca %t | wc -l | grep 2 ; RUN: grep 8028 %t -; RUN: grep {pushl %eax} %t +; RUN: grep {pushl %eax} %t ; RUN: grep 8024 %t | wc -l | grep 2 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" Modified: llvm/trunk/test/CodeGen/X86/peep-vector-extract-concat.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/peep-vector-extract-concat.ll?rev=40648&r1=40647&r2=40648&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/peep-vector-extract-concat.ll (original) +++ llvm/trunk/test/CodeGen/X86/peep-vector-extract-concat.ll Tue Jul 31 15:11:57 2007 @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep {shufps \$3, %xmm0, %xmm0} +; RUN: llvm-as < %s | llc -march=x86-64 | grep {shufps \$3, %xmm0, %xmm0} define float @foo(<8 x float> %a) { %c = extractelement <8 x float> %a, i32 3 Modified: llvm/trunk/test/CodeGen/X86/peep-vector-extract-insert.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/peep-vector-extract-insert.ll?rev=40648&r1=40647&r2=40648&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/peep-vector-extract-insert.ll (original) +++ llvm/trunk/test/CodeGen/X86/peep-vector-extract-insert.ll Tue Jul 31 15:11:57 2007 @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep {pxor %xmm0, %xmm0} | wc -l | grep 2 +; RUN: llvm-as < %s | llc -march=x86-64 | grep {pxor %xmm0, %xmm0} | wc -l | grep 2 define float @foo(<4 x float> %a) { %b = insertelement <4 x float> %a, float 0.0, i32 3 Modified: llvm/trunk/test/CodeGen/X86/shift-codegen.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/shift-codegen.ll?rev=40648&r1=40647&r2=40648&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/shift-codegen.ll (original) +++ llvm/trunk/test/CodeGen/X86/shift-codegen.ll Tue Jul 31 15:11:57 2007 @@ -1,5 +1,5 @@ ; RUN: llvm-as < %s | llc -relocation-model=static -march=x86 | \ -; RUN: grep {shll \$3} | wc -l | grep 2 +; RUN: grep {shll \$3} | wc -l | grep 2 ; This should produce two shll instructions, not any lea's. Modified: llvm/trunk/test/CodeGen/X86/shl_elim.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/shl_elim.ll?rev=40648&r1=40647&r2=40648&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/shl_elim.ll (original) +++ llvm/trunk/test/CodeGen/X86/shl_elim.ll Tue Jul 31 15:11:57 2007 @@ -1,6 +1,6 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep {movl 8(.esp), %eax} -; RUN: llvm-as < %s | llc -march=x86 | grep {shll .15, .eax} -; RUN: llvm-as < %s | llc -march=x86 | grep {sarl .16, .eax} +; RUN: llvm-as < %s | llc -march=x86 | grep {movl 8(.esp), %eax} +; RUN: llvm-as < %s | llc -march=x86 | grep {shll .15, .eax} +; RUN: llvm-as < %s | llc -march=x86 | grep {sarl .16, .eax} define i32 @test1(i64 %a) { %tmp29 = lshr i64 %a, 24 ; [#uses=1] Modified: llvm/trunk/test/CodeGen/X86/store_op_load_fold2.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/store_op_load_fold2.ll?rev=40648&r1=40647&r2=40648&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/store_op_load_fold2.ll (original) +++ llvm/trunk/test/CodeGen/X86/store_op_load_fold2.ll Tue Jul 31 15:11:57 2007 @@ -1,5 +1,5 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -x86-asm-syntax=intel | \ -; RUN: grep {and DWORD PTR} | wc -l | grep 2 +; RUN: grep {and DWORD PTR} | wc -l | grep 2 target endian = little target pointersize = 32 Modified: llvm/trunk/test/CodeGen/X86/tls1.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/tls1.ll?rev=40648&r1=40647&r2=40648&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/tls1.ll (original) +++ llvm/trunk/test/CodeGen/X86/tls1.ll Tue Jul 31 15:11:57 2007 @@ -1,9 +1,9 @@ ; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu | \ -; RUN: grep {movl %gs:i at NTPOFF, %eax} +; RUN: grep {movl %gs:i at NTPOFF, %eax} ; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu | \ -; RUN: grep {leal i at NTPOFF(%eax), %eax} +; RUN: grep {leal i at NTPOFF(%eax), %eax} ; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu -relocation-model=pic | \ -; RUN: grep {leal i at TLSGD(,%ebx,1), %eax} +; RUN: grep {leal i at TLSGD(,%ebx,1), %eax} @i = thread_local global i32 15 ; [#uses=2] Modified: llvm/trunk/test/CodeGen/X86/tls2.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/tls2.ll?rev=40648&r1=40647&r2=40648&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/tls2.ll (original) +++ llvm/trunk/test/CodeGen/X86/tls2.ll Tue Jul 31 15:11:57 2007 @@ -1,9 +1,9 @@ ; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu | \ -; RUN: grep {movl %gs:(%eax), %eax} +; RUN: grep {movl %gs:(%eax), %eax} ; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu | \ -; RUN: grep {addl i at INDNTPOFF, %eax} +; RUN: grep {addl i at INDNTPOFF, %eax} ; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu -relocation-model=pic | \ -; RUN: grep {leal i at TLSGD(,%ebx,1), %eax} +; RUN: grep {leal i at TLSGD(,%ebx,1), %eax} @i = external thread_local global i32 ; [#uses=2] Modified: llvm/trunk/test/CodeGen/X86/x86-64-arg.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/x86-64-arg.ll?rev=40648&r1=40647&r2=40648&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/x86-64-arg.ll (original) +++ llvm/trunk/test/CodeGen/X86/x86-64-arg.ll Tue Jul 31 15:11:57 2007 @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc | grep {movl %edi, %eax} +; RUN: llvm-as < %s | llc | grep {movl %edi, %eax} ; The input value is already sign extended, don't re-extend it. ; This testcase corresponds to: ; int test(short X) { return (int)X; } Modified: llvm/trunk/test/Transforms/TailDup/if-tail-dup.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/TailDup/if-tail-dup.ll?rev=40648&r1=40647&r2=40648&view=diff ============================================================================== --- llvm/trunk/test/Transforms/TailDup/if-tail-dup.ll (original) +++ llvm/trunk/test/Transforms/TailDup/if-tail-dup.ll Tue Jul 31 15:11:57 2007 @@ -1,6 +1,6 @@ ; RUN: llvm-upgrade < %s | llvm-as | opt -tailduplicate | \ ; RUN: llc -march=x86 -o %t -f -; RUN: grep {je } %t +; RUN: grep {\\\} %t ; RUN: not grep jmp %t ; END. ; This should have no unconditional jumps in it. The C source is: From lauro.venancio at gmail.com Tue Jul 31 15:13:21 2007 From: lauro.venancio at gmail.com (Lauro Ramos Venancio) Date: Tue, 31 Jul 2007 20:13:21 -0000 Subject: [llvm-commits] [llvm] r40649 - in /llvm/trunk: lib/Transforms/Scalar/InstructionCombining.cpp test/Transforms/InstCombine/known_align.ll Message-ID: <200707312013.l6VKDMK1032526@zion.cs.uiuc.edu> Author: laurov Date: Tue Jul 31 15:13:21 2007 New Revision: 40649 URL: http://llvm.org/viewvc/llvm-project?rev=40649&view=rev Log: Fix a bug in GetKnownAlignment of packed structs. Added: llvm/trunk/test/Transforms/InstCombine/known_align.ll Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp?rev=40649&r1=40648&r2=40649&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Tue Jul 31 15:13:21 2007 @@ -7533,11 +7533,13 @@ const Type *BasePtrTy = GEPI->getOperand(0)->getType(); const PointerType *PtrTy = cast(BasePtrTy); - if (TD->getABITypeAlignment(PtrTy->getElementType()) - <= BaseAlignment) { + unsigned Align = TD->getABITypeAlignment(PtrTy->getElementType()); + if (Align <= BaseAlignment) { const Type *GEPTy = GEPI->getType(); const PointerType *GEPPtrTy = cast(GEPTy); - return TD->getABITypeAlignment(GEPPtrTy->getElementType()); + Align = std::min(Align, (unsigned) + TD->getABITypeAlignment(GEPPtrTy->getElementType())); + return Align; } return 0; } Added: llvm/trunk/test/Transforms/InstCombine/known_align.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/known_align.ll?rev=40649&view=auto ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/known_align.ll (added) +++ llvm/trunk/test/Transforms/InstCombine/known_align.ll Tue Jul 31 15:13:21 2007 @@ -0,0 +1,27 @@ +; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep {align 1} +; END. + + %struct.p = type <{ i8, i32 }> + at t = global %struct.p <{ i8 1, i32 10 }> ; <%struct.p*> [#uses=1] + at u = weak global %struct.p zeroinitializer ; <%struct.p*> [#uses=1] + +define i32 @main() { +entry: + %retval = alloca i32, align 4 ; [#uses=2] + %tmp = alloca i32, align 4 ; [#uses=2] + %tmp1 = alloca i32, align 4 ; [#uses=3] + %"alloca point" = bitcast i32 0 to i32 ; [#uses=0] + %tmp3 = load i32* getelementptr (%struct.p* @t, i32 0, i32 1), align 1 ; [#uses=1] + store i32 %tmp3, i32* %tmp1, align 4 + %tmp5 = load i32* %tmp1, align 4 ; [#uses=1] + store i32 %tmp5, i32* getelementptr (%struct.p* @u, i32 0, i32 1), align 1 + %tmp6 = load i32* %tmp1, align 4 ; [#uses=1] + store i32 %tmp6, i32* %tmp, align 4 + %tmp7 = load i32* %tmp, align 4 ; [#uses=1] + store i32 %tmp7, i32* %retval, align 4 + br label %return + +return: ; preds = %entry + %retval8 = load i32* %retval ; [#uses=1] + ret i32 %retval8 +} From resistor at mac.com Tue Jul 31 15:18:28 2007 From: resistor at mac.com (Owen Anderson) Date: Tue, 31 Jul 2007 20:18:28 -0000 Subject: [llvm-commits] [llvm] r40650 - in /llvm/trunk: lib/Transforms/Scalar/GVN.cpp test/Transforms/GVN/2007-07-31-RedundantPhi.ll Message-ID: <200707312018.l6VKISLc032642@zion.cs.uiuc.edu> Author: resistor Date: Tue Jul 31 15:18:28 2007 New Revision: 40650 URL: http://llvm.org/viewvc/llvm-project?rev=40650&view=rev Log: Fix a failure I accidentally caused in my last commit by mishandling the removal of redundant phis. Added: llvm/trunk/test/Transforms/GVN/2007-07-31-RedundantPhi.ll Modified: llvm/trunk/lib/Transforms/Scalar/GVN.cpp Modified: llvm/trunk/lib/Transforms/Scalar/GVN.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/GVN.cpp?rev=40650&r1=40649&r2=40650&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/GVN.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/GVN.cpp Tue Jul 31 15:18:28 2007 @@ -747,6 +747,8 @@ PN->replaceAllUsesWith(first); PN->eraseFromParent(); + Phis[BB] = first; + return first; } Added: llvm/trunk/test/Transforms/GVN/2007-07-31-RedundantPhi.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/2007-07-31-RedundantPhi.ll?rev=40650&view=auto ============================================================================== --- llvm/trunk/test/Transforms/GVN/2007-07-31-RedundantPhi.ll (added) +++ llvm/trunk/test/Transforms/GVN/2007-07-31-RedundantPhi.ll Tue Jul 31 15:18:28 2007 @@ -0,0 +1,22 @@ +; RUN: llvm-as < %s | opt -gvn | llvm-dis | not grep {tmp701 =} + + at img_width = external global i16 ; [#uses=2] + +define i32 @smpUMHEXBipredIntegerPelBlockMotionSearch(i16* %cur_pic, i16 signext %ref, i32 %list, i32 %pic_pix_x, i32 %pic_pix_y, i32 %blocktype, i16 signext %pred_mv_x1, i16 signext %pred_mv_y1, i16 signext %pred_mv_x2, i16 signext %pred_mv_y2, i16* %mv_x, i16* %mv_y, i16* %s_mv_x, i16* %s_mv_y, i32 %search_range, i32 %min_mcost, i32 %lambda_factor) { +cond_next143: ; preds = %entry + store i16 0, i16* @img_width, align 2 + br i1 false, label %cond_next449, label %cond_false434 + +cond_false434: ; preds = %cond_true415 + br label %cond_next449 + +cond_next449: ; preds = %cond_false434, %cond_true415 + br i1 false, label %cond_next698, label %cond_false470 + +cond_false470: ; preds = %cond_next449 + br label %cond_next698 + +cond_next698: ; preds = %cond_true492 + %tmp701 = load i16* @img_width, align 2 ; [#uses=0] + ret i32 0 +} From asl at math.spbu.ru Tue Jul 31 15:59:06 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Wed, 01 Aug 2007 00:59:06 +0400 Subject: [llvm-commits] [llvm-gcc-4.0] r40622 - in /llvm-gcc-4.0/trunk/gcc: llvm-backend.cpp llvm-convert.cpp llvm-internal.h llvm-types.cpp In-Reply-To: <200707310650.l6V6oPCJ003921.SS5642SS@zion.cs.uiuc.edu> References: <200707310650.l6V6oPCJ003921.SS5642SS@zion.cs.uiuc.edu> Message-ID: <1185915546.9492.45.camel@asl.dorms.spbu.ru> Hello, Christopher. > - return TypeDB.setType(type, ConvertFunctionType(type, NULL, CallingConv)); > + return TypeDB.setType(type, ConvertFunctionType(type, orig_type, NULL, CallingConv)); and another one: second argument should be "declaration" tree, not "type" tree. This was caused build error on darwin (reported by Tanya): ./../src/gcc/config/darwin-crt3.c: In function 'cxa_atexit_check_2': ../../src/gcc/config/darwin-crt3.c:160: internal compiler error: tree check: expected class 'declaration', have 'type' (function_type) in ConvertFunctionType, at llvm-types.cpp:983 -- With best regards, Anton Korobeynikov. Faculty of Mathematics & Mechanics, Saint Petersburg State University. From dpatel at apple.com Tue Jul 31 16:16:20 2007 From: dpatel at apple.com (Devang Patel) Date: Tue, 31 Jul 2007 14:16:20 -0700 Subject: [llvm-commits] [llvm-gcc-4.0] r40622 - in /llvm-gcc-4.0/trunk/gcc: llvm-backend.cpp llvm-convert.cpp llvm-internal.h llvm-types.cpp In-Reply-To: <007CA5D0-1F71-4580-8C9C-CBC955DBD4F0@gmail.com> References: <200707310650.l6V6oPCJ003921.SS5642SS@zion.cs.uiuc.edu> <1185870659.9492.19.camel@asl.dorms.spbu.ru> <1185903394.9492.30.camel@asl.dorms.spbu.ru> <007CA5D0-1F71-4580-8C9C-CBC955DBD4F0@gmail.com> Message-ID: On Jul 31, 2007, at 10:49 AM, Christopher Lamb wrote: >> What was the function decl in that case? > > How can I find/dump that? My GCC fu is weak. > On gdb prompt, debug_tree(t) or debug_generic_expr(t) etc.. There are gdb macros in gdbinit.in in source tree that provides short hands for these routines. - Devang -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20070731/45891598/attachment.html From christopher.lamb at gmail.com Tue Jul 31 17:02:59 2007 From: christopher.lamb at gmail.com (Christopher Lamb) Date: Tue, 31 Jul 2007 15:02:59 -0700 Subject: [llvm-commits] [llvm-gcc-4.0] r40622 - in /llvm-gcc-4.0/trunk/gcc: llvm-backend.cpp llvm-convert.cpp llvm-internal.h llvm-types.cpp In-Reply-To: <1185915546.9492.45.camel@asl.dorms.spbu.ru> References: <200707310650.l6V6oPCJ003921.SS5642SS@zion.cs.uiuc.edu> <1185915546.9492.45.camel@asl.dorms.spbu.ru> Message-ID: <1AEA8E26-B503-498D-B8E3-1FFA5677717C@gmail.com> On Jul 31, 2007, at 1:59 PM, Anton Korobeynikov wrote: > Hello, Christopher. > >> - return TypeDB.setType(type, ConvertFunctionType(type, NULL, >> CallingConv)); >> + return TypeDB.setType(type, ConvertFunctionType(type, >> orig_type, NULL, CallingConv)); > and another one: second argument should be "declaration" tree, not > "type" tree. This was caused build error on darwin (reported by > Tanya): Right. It seems that getting the declaration tree at that point is rather difficult. Any suggestions? -- Christopher Lamb -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20070731/fa0f0d05/attachment.html From evan.cheng at apple.com Tue Jul 31 17:08:00 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 31 Jul 2007 15:08:00 -0700 Subject: [llvm-commits] Trampoline support (pointers nested funtions) In-Reply-To: <200707271238.09287.baldrick@free.fr> References: <200707261656.20050.baldrick@free.fr> <9F8C3A52-1E0F-439E-B1F0-46A6E4191833@apple.com> <200707271238.09287.baldrick@free.fr> Message-ID: <58FA8553-7B71-44ED-B78A-730170AF6DC7@apple.com> On Jul 27, 2007, at 3:38 AM, Duncan Sands wrote: > Hi Evan, > >> Some nit picks. >> >> 1. Please don't use "Chain" for stand for function static chain. It >> confuses backend guys like me. :-) "Chain" stands for control flow >> dependency in the backend. > > I've replaced Chain with Nest everywhere, eg the attribute is now > 'nest'. Thanks. > > >> 2. Purely a stylistic thing: >> >> +SDOperand X86TargetLowering::LowerTRAMPOLINE(SDOperand Op, >> + SelectionDAG &DAG) { >> + SDOperand Root = Op.getOperand(0); >> + SDOperand Trmp = Op.getOperand(1); // trampoline >> + SDOperand FPtr = Op.getOperand(2); // nested function >> + SDOperand SChn = Op.getOperand(3); // static chain >> + >> + SrcValueSDNode *TrmpSV = cast(Op.getOperand(4)); >> + >> + if (Subtarget->is64Bit()) { >> + return SDOperand(); // not yet supported >> + } else { >> >> If you move the check is64Bit() to the beginning of function, there >> is no need to nest the part that actually do the work in the "else" >> clause. > > I'd prefer to leave it as it is: this is where the code for 64 bit > support will go, once added. And since right now codegen will abort > on trampoline lowering on x86-64, I don't think it matters if a few > cycles are wasted before the abort :) By the way, I think aborting > is the right thing to do: if someone is creating a trampoline, most > likely they are going to use it, i.e. jump to the code it contains. > If we lower trampoline initialization to nothing on architectures that > don't yet support it, then the code will appear to compile fine but > will > die very horribly at runtime, by jumping to a bunch of random bytes... > Ok. It's just a nit pick. >> 3. In X86TargetLowering::LowerTRAMPOLINE(): >> + case CallingConv::X86_StdCall: { >> + Move = 0xb9; // Pass chain in ECX >> >> I assume this is the ModR/M byte? > > Well, it's MOV32ri. Then it should be 0xb8? > > >> Can you refactor ModRMByte() from X86CodeEmitter.cpp (probably also >> getX86RegNum) >> and use that to calculate this instead? > > For the reasons explained in the next paragraph, I've taken a > minimal approach. > (1) I've introduced X86CodeEmitter.h, which contains native X86 > Register numbers > factored out of X86CodeEmitter.cpp. Please factor out getX86RegNum() as well. Perhaps put them in X86RegisterInfo.cpp (since lowering really shouldn't depend on codeemitter...) Do getX86RegNum(X86::EAX) rather than make use N86::EAX directly. > > (2) In LowerTRAMPOLINE, names like N86::ECX are used to name the > register used. > (3) Rather than using 0xb8 and 0xE9, I've introduced symbolic names > MOV32ri > and JMP. I could also get these by doing something like this: > const X86InstrInfo *TII = > ((X86TargetMachine&)getTargetMachine()).getInstrInfo(); > unsigned char MOV32ri = TII->getBaseOpcodeFor(&TII- > >get(X86::MOV32ri)); > But it didn't seem worth it (is there a way to extract the machine > opcode > statically?). Please go through X86InstrInfo to get the opcode numbers instead of hard coding it. > > >> Also, isn't the static chain register described in X86CallingConv.td? > > It is, but it's hard to use here. The problem is that when lowering > the > init.trampoline intrinsic you only have a pointer to the target > function. > From this pointer you would like to find out which register a certain > parameter will be passed in for that function. Not so easy! It's > like > having a call instruction without having the arguments. In order to > exploit X86CallingConv.td, you have to use all the lowering machinery, > which isn't adapted to this case. For example, you could try to > synthesize > a fake call. Or you could pretend to be lowering the target > function. I > tried it, and it can be done with a lot of horrible hacking. But > it's not > worth it. It's much simpler to simply grab the calling convention > and use > that, which unfortunately means keeping LowerTRAMPOLINE and > X86CallingConv.td in sync. Personally I can live with that, > especially since > I've seen the alternative and it still wakes me up screaming at > night :) > But maybe you can see a reasonable way of doing it? Seems like a deficiency in CCState class. Chris, your thoughts? Evan > > > Since I need to map the calling convention to a native X86 register > number, > I chose to bypass X86::ECX etc and directly use N86::ECX. This > would be > different if the register number was being extracted from lowering + > CCInfo. > >> Magic number is confusing. :-) > > Hopefully it's more readable now. The amount of code factorization is > minimal which is a pity but seems the best choice. > >> Looks great otherwise. Thanks! > > Thanks for reviewing! > > Duncan. > From evan.cheng at apple.com Tue Jul 31 17:37:45 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 31 Jul 2007 22:37:45 -0000 Subject: [llvm-commits] [llvm] r40654 - /llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Message-ID: <200707312237.l6VMbjnZ007012@zion.cs.uiuc.edu> Author: evancheng Date: Tue Jul 31 17:37:44 2007 New Revision: 40654 URL: http://llvm.org/viewvc/llvm-project?rev=40654&view=rev Log: simpleregistercoalescing -> regcoalescing. It's too long for me to handle. Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp?rev=40654&r1=40653&r2=40654&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp (original) +++ llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Tue Jul 31 17:37:44 2007 @@ -12,7 +12,7 @@ // //===----------------------------------------------------------------------===// -#define DEBUG_TYPE "simpleregistercoalescing" +#define DEBUG_TYPE "regcoalescing" #include "llvm/CodeGen/SimpleRegisterCoalescing.h" #include "llvm/CodeGen/LiveIntervalAnalysis.h" #include "VirtRegMap.h" From christopher.lamb at gmail.com Tue Jul 31 18:14:32 2007 From: christopher.lamb at gmail.com (Christopher Lamb) Date: Tue, 31 Jul 2007 16:14:32 -0700 Subject: [llvm-commits] [llvm-gcc-4.0] r40622 - in /llvm-gcc-4.0/trunk/gcc: llvm-backend.cpp llvm-convert.cpp llvm-internal.h llvm-types.cpp In-Reply-To: <1AEA8E26-B503-498D-B8E3-1FFA5677717C@gmail.com> References: <200707310650.l6V6oPCJ003921.SS5642SS@zion.cs.uiuc.edu> <1185915546.9492.45.camel@asl.dorms.spbu.ru> <1AEA8E26-B503-498D-B8E3-1FFA5677717C@gmail.com> Message-ID: <787CCCF3-7753-473B-9837-EDB93261D486@gmail.com> On Jul 31, 2007, at 3:02 PM, Christopher Lamb wrote: > > > On Jul 31, 2007, at 1:59 PM, Anton Korobeynikov wrote: > >> Hello, Christopher. >> >>> - return TypeDB.setType(type, ConvertFunctionType(type, NULL, >>> CallingConv)); >>> + return TypeDB.setType(type, ConvertFunctionType(type, >>> orig_type, NULL, CallingConv)); >> and another one: second argument should be "declaration" tree, not >> "type" tree. This was caused build error on darwin (reported by >> Tanya): > > Right. It seems that getting the declaration tree at that point is > rather difficult. Any suggestions? Turns out that this type conversion is being requested on a struct which contains a function pointer, and the conversion is happening on that function pointer. Am I correct in assuming that if we've followed this code path to ConvertFunctionType then we have no declaration to pass through? from darwin-crt3.c: typedef int (*cxa_atexit_p)(void (*func) (void*), void* arg, const void* dso); struct atexit_data { int result; cxa_atexit_p cxa_atexit; }; static void cxa_atexit_check_2 (void *arg) { ((struct atexit_data *)arg)->result = 1; } -- Christopher Lamb From christopher.lamb at gmail.com Tue Jul 31 18:26:21 2007 From: christopher.lamb at gmail.com (Christopher Lamb) Date: Tue, 31 Jul 2007 16:26:21 -0700 Subject: [llvm-commits] [llvm] r40624 - in /llvm/trunk: lib/Analysis/BasicAliasAnalysis.cpp test/Analysis/BasicAA/2007-07-31-NoAliasTest.ll In-Reply-To: <4aca3dc20707310827q64694e30le353cdecd89f7faa@mail.gmail.com> References: <20070731143145.GL14991@village.us.cray.com> <4aca3dc20707310827q64694e30le353cdecd89f7faa@mail.gmail.com> Message-ID: <3B9F28C3-0210-4D03-B0DE-9348DC7AC0CE@gmail.com> Daniel, I'm not a GCC guru, so I had some problems picking up the restrict qualifiers for argument types in llvm-gcc's type conversion routines. It seems that for C the qualifier is kept with the argument type, but in C++ it's only available in the declaration and is not kept with the types. Is there a better/proper way to get access to these qualifiers? -- Chris On Jul 31, 2007, at 8:27 AM, Daniel Berlin wrote: > On 7/31/07, Dan Gohman wrote: >>> Log: >>> Teach BasicAA about noalias function parameters. Passes all of >>> DejaGNU and test-suite. >> >> I just grepped through LLVM's test-suite and didn't find any uses >> of the >> restrict keyword though... >> > > There are a few you could snag from GCC's testsuite, because we > started with an implementation that had the exact same problems you've > noted below. > > >> So for an alias query where one of the two pointers is noalias and >> the >> other is not, and the non-noalias one doesn't have a base object that >> basicaa can find, the answer should be MayAlias. A more advanced pass >> could try to prove that the non-noalias pointer couldn't possibly be >> "based on" the noalias one by examining all its uses, though the >> specific >> example here would defy such analysis. > > This is also what we eventually did with GCC. > > Note that your function call example is not just "not disallowed", it > is explicitly allowed. It is the one case you are allowed to carry > restricted pointers outside the block they are in. > > See C99 6.7.3.1 #12 > > There is a weird issue in restrict where gcc doesn't "check for > correctness of input code", and i doubt LLVM can either (at least, not > easily). This is that block nesting can introduce valid restricted > pointers in the nested block that would have otherwise been invalid. > IIRC, anyway :) > > We of course, eliminate lexical scoping. For safety sake, we just > assume that if they have come up with assignments between restricted > pointers, that they are legal. > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits -- Christopher Lamb -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20070731/7f23004e/attachment.html From resistor at mac.com Tue Jul 31 18:27:13 2007 From: resistor at mac.com (Owen Anderson) Date: Tue, 31 Jul 2007 23:27:13 -0000 Subject: [llvm-commits] [llvm] r40655 - /llvm/trunk/lib/Transforms/Scalar/GVN.cpp Message-ID: <200707312327.l6VNRDvl008229@zion.cs.uiuc.edu> Author: resistor Date: Tue Jul 31 18:27:13 2007 New Revision: 40655 URL: http://llvm.org/viewvc/llvm-project?rev=40655&view=rev Log: Don't let the memory allocator outsmart GVN. ;-) Modified: llvm/trunk/lib/Transforms/Scalar/GVN.cpp Modified: llvm/trunk/lib/Transforms/Scalar/GVN.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/GVN.cpp?rev=40655&r1=40654&r2=40655&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/GVN.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/GVN.cpp Tue Jul 31 18:27:13 2007 @@ -558,6 +558,11 @@ nextValueNumber = 1; } +/// erase - Remove a value from the value numbering +void ValueTable::erase(Value* V) { + valueNumbering.erase(V); +} + //===----------------------------------------------------------------------===// // ValueNumberedSet Class //===----------------------------------------------------------------------===// @@ -871,6 +876,7 @@ if (currAvail.test(num)) { Value* repl = find_leader(currAvail, num); + VN.erase(I); I->replaceAllUsesWith(repl); toErase.push_back(I); return true; From sabre at nondot.org Tue Jul 31 18:29:57 2007 From: sabre at nondot.org (Chris Lattner) Date: Tue, 31 Jul 2007 18:29:57 -0500 Subject: [llvm-commits] CVS: llvm-www/pubs/2007-07-25-LLVM-2.0-and-Beyond.html Message-ID: <200707312329.l6VNTv0L008316@zion.cs.uiuc.edu> Changes in directory llvm-www/pubs: 2007-07-25-LLVM-2.0-and-Beyond.html updated: 1.1 -> 1.2 --- Log message: add link to google video --- Diffs of the changes: (+1 -0) 2007-07-25-LLVM-2.0-and-Beyond.html | 1 + 1 files changed, 1 insertion(+) Index: llvm-www/pubs/2007-07-25-LLVM-2.0-and-Beyond.html diff -u llvm-www/pubs/2007-07-25-LLVM-2.0-and-Beyond.html:1.1 llvm-www/pubs/2007-07-25-LLVM-2.0-and-Beyond.html:1.2 --- llvm-www/pubs/2007-07-25-LLVM-2.0-and-Beyond.html:1.1 Thu Jul 26 01:07:48 2007 +++ llvm-www/pubs/2007-07-25-LLVM-2.0-and-Beyond.html Tue Jul 31 18:29:24 2007 @@ -35,6 +35,7 @@

Download Presentation:

From tonic at nondot.org Tue Jul 31 18:53:32 2007 From: tonic at nondot.org (Tanya Lattner) Date: Tue, 31 Jul 2007 18:53:32 -0500 Subject: [llvm-commits] CVS: llvm-www/releases/download.html Message-ID: <200707312353.l6VNrW51009001@zion.cs.uiuc.edu> Changes in directory llvm-www/releases: download.html updated: 1.41 -> 1.42 --- Log message: Change text to reference SVN and not CVS. --- Diffs of the changes: (+3 -3) download.html | 6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-) Index: llvm-www/releases/download.html diff -u llvm-www/releases/download.html:1.41 llvm-www/releases/download.html:1.42 --- llvm-www/releases/download.html:1.41 Wed May 23 13:29:22 2007 +++ llvm-www/releases/download.html Tue Jul 31 18:53:04 2007 @@ -12,14 +12,14 @@
- +
CVS Access
SVN Access

If you'd like access to the "latest and greatest" in LLVM development, please see the instructions for accessing the LLVM CVS Repository. The major -changes and improvements that CVS contains relative to the previous release are +href="/docs/GettingStarted.html#checkout ">LLVM SVN Repository. The major +changes and improvements that SVN contains relative to the previous release are listed in the Release Notes for the next release.

From tonic at nondot.org Tue Jul 31 18:54:00 2007 From: tonic at nondot.org (Tanya Lattner) Date: Tue, 31 Jul 2007 18:54:00 -0500 Subject: [llvm-commits] CVS: llvm-www/releases/index.html Message-ID: <200707312354.l6VNs0Mu009044@zion.cs.uiuc.edu> Changes in directory llvm-www/releases: index.html updated: 1.37 -> 1.38 --- Log message: Change to SVN not CVS. --- Diffs of the changes: (+1 -1) index.html | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm-www/releases/index.html diff -u llvm-www/releases/index.html:1.37 llvm-www/releases/index.html:1.38 --- llvm-www/releases/index.html:1.37 Mon Jul 23 09:53:24 2007 +++ llvm-www/releases/index.html Tue Jul 31 18:53:42 2007 @@ -37,7 +37,7 @@
    -
  • Always - Anonymous CVS access; Always - Anonymous SVN access; release notes.
  • 23 May 2007 - 2.0 release download; release notes.
    • From tonic at nondot.org Tue Jul 31 18:59:26 2007 From: tonic at nondot.org (Tanya Lattner) Date: Tue, 31 Jul 2007 18:59:26 -0500 Subject: [llvm-commits] CVS: llvm-www/OpenProjects.html Oversight.html www-index.html Message-ID: <200707312359.l6VNxQiQ009260@zion.cs.uiuc.edu> Changes in directory llvm-www: OpenProjects.html updated: 1.26 -> 1.27 Oversight.html updated: 1.5 -> 1.6 www-index.html updated: 1.145 -> 1.146 --- Log message: Remove CVS and now reference SVN. --- Diffs of the changes: (+7 -7) OpenProjects.html | 4 ++-- Oversight.html | 6 +++--- www-index.html | 4 ++-- 3 files changed, 7 insertions(+), 7 deletions(-) Index: llvm-www/OpenProjects.html diff -u llvm-www/OpenProjects.html:1.26 llvm-www/OpenProjects.html:1.27 --- llvm-www/OpenProjects.html:1.26 Tue Apr 10 16:16:08 2007 +++ llvm-www/OpenProjects.html Tue Jul 31 18:59:07 2007 @@ -136,7 +136,7 @@ href="http://lists.cs.uiuc.edu/pipermail/llvmbugs/">llvm-bugs list. If you get the program to compile, it would be extremely useful to convert the build system to be compatible with the LLVM Programs testsuite so that we can check it -into CVS and the automated tester can use it to track progress of the +into SVN and the automated tester can use it to track progress of the compiler.

    When testing a code, try running it with a variety of optimizations, and with @@ -411,7 +411,7 @@ src="http://www.w3.org/Icons/valid-html401" alt="Valid HTML 4.01!"> LLVM Compiler Infrastructure
    - Last modified: $Date: 2007/04/10 21:16:08 $ + Last modified: $Date: 2007/07/31 23:59:07 $ Index: llvm-www/Oversight.html diff -u llvm-www/Oversight.html:1.5 llvm-www/Oversight.html:1.6 --- llvm-www/Oversight.html:1.5 Thu Mar 16 13:02:22 2006 +++ llvm-www/Oversight.html Tue Jul 31 18:59:07 2007 @@ -43,10 +43,10 @@

  • Identify and prioritize improvements to the core.
-
  • Guidelines for who gets write-access to CVS: +
  • Guidelines for who gets write-access to SVN:
    • The goal here is to encourage the most active contributors by - giving them direct CVS write access.
      • + giving them direct SVN write access.
    • Our primary guiding principle here is that write access should be limited to persons who have a track record of responsible contributions, and are likely to remain active contributors @@ -104,6 +104,6 @@ src="http://www.w3.org/Icons/valid-html401" alt="Valid HTML 4.01!">
      LLVM Oversight Group
      - Last modified: $Date: 2006/03/16 19:02:22 $ + Last modified: $Date: 2007/07/31 23:59:07 $ Index: llvm-www/www-index.html diff -u llvm-www/www-index.html:1.145 llvm-www/www-index.html:1.146 --- llvm-www/www-index.html:1.145 Tue Jul 31 12:47:12 2007 +++ llvm-www/www-index.html Tue Jul 31 18:59:07 2007 @@ -106,9 +106,9 @@ for download! LLVM is publicly available under an open source License. Also, you might want to check out the new - features in CVS that will appear in the next LLVM release. If + features in SVN that will appear in the next LLVM release. If you want them early, download LLVM through - anonymous CVS.

      + anonymous SVN.


    • From tonic at nondot.org Tue Jul 31 19:03:52 2007 From: tonic at nondot.org (Tanya Lattner) Date: Tue, 31 Jul 2007 19:03:52 -0500 Subject: [llvm-commits] CVS: llvm-www/ProjectsWithLLVM/index.html Message-ID: <200708010003.l7103qPq009422@zion.cs.uiuc.edu> Changes in directory llvm-www/ProjectsWithLLVM: index.html updated: 1.38 -> 1.39 --- Log message: Reference SVN. --- Diffs of the changes: (+1 -1) index.html | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm-www/ProjectsWithLLVM/index.html diff -u llvm-www/ProjectsWithLLVM/index.html:1.38 llvm-www/ProjectsWithLLVM/index.html:1.39 --- llvm-www/ProjectsWithLLVM/index.html:1.38 Thu Jul 5 11:00:58 2007 +++ llvm-www/ProjectsWithLLVM/index.html Tue Jul 31 19:03:33 2007 @@ -410,7 +410,7 @@

    Wiki page with overview; design doc, and user manual. You can download -llvm-tv from LLVM CVS (the llvm-tv module).

    +llvm-tv from LLVM SVN (http://llvm.org/svn/llvm-project/television/trunk).

    From evan.cheng at apple.com Tue Jul 31 19:10:12 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 01 Aug 2007 00:10:12 -0000 Subject: [llvm-commits] [llvm] r40657 - /llvm/trunk/test/CodeGen/X86/2007-07-31-VInsertBug.ll Message-ID: <200708010010.l710ACQ5009634@zion.cs.uiuc.edu> Author: evancheng Date: Tue Jul 31 19:10:12 2007 New Revision: 40657 URL: http://llvm.org/viewvc/llvm-project?rev=40657&view=rev Log: Requires SSE2. Modified: llvm/trunk/test/CodeGen/X86/2007-07-31-VInsertBug.ll Modified: llvm/trunk/test/CodeGen/X86/2007-07-31-VInsertBug.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-07-31-VInsertBug.ll?rev=40657&r1=40656&r2=40657&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/2007-07-31-VInsertBug.ll (original) +++ llvm/trunk/test/CodeGen/X86/2007-07-31-VInsertBug.ll Tue Jul 31 19:10:12 2007 @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin | %prcontext {pinsrw \$2} 1 | grep "movl \$1" -; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin | not grep movss +; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin -mattr=+sse2 | %prcontext {pinsrw \$2} 1 | grep "movl \$1" +; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin -mattr=+sse2 | not grep movss @G = global <4 x float> zeroinitializer From evan.cheng at apple.com Tue Jul 31 19:12:08 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 01 Aug 2007 00:12:08 -0000 Subject: [llvm-commits] [llvm] r40658 - /llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Message-ID: <200708010012.l710C8H0009748@zion.cs.uiuc.edu> Author: evancheng Date: Tue Jul 31 19:12:08 2007 New Revision: 40658 URL: http://llvm.org/viewvc/llvm-project?rev=40658&view=rev Log: Indexed loads each has 2 outputs. Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=40658&r1=40657&r2=40658&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Tue Jul 31 19:12:08 2007 @@ -745,34 +745,34 @@ []>, Requires<[IsARM, HasV5T]>; // Indexed loads -def LDR_PRE : AI2pr<(outs GPR:$dst), (ins GPR:$base_wb, addrmode2:$addr), +def LDR_PRE : AI2pr<(outs GPR:$dst, GPR:$base_wb), (ins addrmode2:$addr), "ldr", " $dst, $addr!", "$addr.base = $base_wb", []>; -def LDR_POST : AI2po<(outs GPR:$dst), (ins GPR:$base_wb, GPR:$base, am2offset:$offset), +def LDR_POST : AI2po<(outs GPR:$dst, GPR:$base_wb), (ins GPR:$base, am2offset:$offset), "ldr", " $dst, [$base], $offset", "$base = $base_wb", []>; -def LDRH_PRE : AI3pr<(outs GPR:$dst), (ins GPR:$base_wb, addrmode3:$addr), +def LDRH_PRE : AI3pr<(outs GPR:$dst, GPR:$base_wb), (ins addrmode3:$addr), "ldr", "h $dst, $addr!", "$addr.base = $base_wb", []>; -def LDRH_POST : AI3po<(outs GPR:$dst), (ins GPR:$base_wb, GPR:$base,am3offset:$offset), +def LDRH_POST : AI3po<(outs GPR:$dst, GPR:$base_wb), (ins GPR:$base,am3offset:$offset), "ldr", "h $dst, [$base], $offset", "$base = $base_wb", []>; -def LDRB_PRE : AI2pr<(outs GPR:$dst), (ins GPR:$base_wb, addrmode2:$addr), +def LDRB_PRE : AI2pr<(outs GPR:$dst, GPR:$base_wb), (ins addrmode2:$addr), "ldr", "b $dst, $addr!", "$addr.base = $base_wb", []>; -def LDRB_POST : AI2po<(outs GPR:$dst), (ins GPR:$base_wb, GPR:$base,am2offset:$offset), +def LDRB_POST : AI2po<(outs GPR:$dst, GPR:$base_wb), (ins GPR:$base,am2offset:$offset), "ldr", "b $dst, [$base], $offset", "$base = $base_wb", []>; -def LDRSH_PRE : AI3pr<(outs GPR:$dst), (ins GPR:$base_wb, addrmode3:$addr), +def LDRSH_PRE : AI3pr<(outs GPR:$dst, GPR:$base_wb), (ins addrmode3:$addr), "ldr", "sh $dst, $addr!", "$addr.base = $base_wb", []>; -def LDRSH_POST: AI3po<(outs GPR:$dst), (ins GPR:$base_wb, GPR:$base,am3offset:$offset), +def LDRSH_POST: AI3po<(outs GPR:$dst, GPR:$base_wb), (ins GPR:$base,am3offset:$offset), "ldr", "sh $dst, [$base], $offset", "$base = $base_wb", []>; -def LDRSB_PRE : AI3pr<(outs GPR:$dst), (ins GPR:$base_wb, addrmode3:$addr), +def LDRSB_PRE : AI3pr<(outs GPR:$dst, GPR:$base_wb), (ins addrmode3:$addr), "ldr", "sb $dst, $addr!", "$addr.base = $base_wb", []>; -def LDRSB_POST: AI3po<(outs GPR:$dst), (ins GPR:$base_wb, GPR:$base,am3offset:$offset), +def LDRSB_POST: AI3po<(outs GPR:$dst, GPR:$base_wb), (ins GPR:$base,am3offset:$offset), "ldr", "sb $dst, [$base], $offset", "$base = $base_wb", []>; } // isLoad From greened at obbligato.org Tue Jul 31 22:43:45 2007 From: greened at obbligato.org (David Greene) Date: Wed, 01 Aug 2007 03:43:45 -0000 Subject: [llvm-commits] [llvm] r40660 - in /llvm/trunk: include/llvm/ include/llvm/Support/ lib/AsmParser/ lib/Bitcode/Reader/ lib/CodeGen/ lib/ExecutionEngine/JIT/ lib/Transforms/IPO/ lib/Transforms/Instrumentation/ lib/Transforms/Scalar/ lib/Transforms/Utils/ lib/VMCore/ tools/bugpoint/ tools/llvm-upgrade/ Message-ID: <200708010343.l713hkKV020015@zion.cs.uiuc.edu> Author: greened Date: Tue Jul 31 22:43:44 2007 New Revision: 40660 URL: http://llvm.org/viewvc/llvm-project?rev=40660&view=rev Log: New CallInst interface to address GLIBCXX_DEBUG errors caused by indexing an empty std::vector. Updates to all clients. Modified: llvm/trunk/include/llvm/Instructions.h llvm/trunk/include/llvm/Support/LLVMBuilder.h llvm/trunk/lib/AsmParser/llvmAsmParser.y llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp llvm/trunk/lib/CodeGen/IntrinsicLowering.cpp llvm/trunk/lib/ExecutionEngine/JIT/JIT.cpp llvm/trunk/lib/Transforms/IPO/ArgumentPromotion.cpp llvm/trunk/lib/Transforms/IPO/DeadArgumentElimination.cpp llvm/trunk/lib/Transforms/IPO/LowerSetJmp.cpp llvm/trunk/lib/Transforms/IPO/PruneEH.cpp llvm/trunk/lib/Transforms/IPO/SimplifyLibCalls.cpp llvm/trunk/lib/Transforms/Instrumentation/ProfilingUtils.cpp llvm/trunk/lib/Transforms/Scalar/ADCE.cpp llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp llvm/trunk/lib/Transforms/Scalar/LowerGC.cpp llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp llvm/trunk/lib/Transforms/Utils/LowerInvoke.cpp llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp llvm/trunk/lib/VMCore/Instructions.cpp llvm/trunk/tools/bugpoint/Miscompilation.cpp llvm/trunk/tools/llvm-upgrade/UpgradeParser.y Modified: llvm/trunk/include/llvm/Instructions.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Instructions.h?rev=40660&r1=40659&r2=40660&view=diff ============================================================================== --- llvm/trunk/include/llvm/Instructions.h (original) +++ llvm/trunk/include/llvm/Instructions.h Tue Jul 31 22:43:44 2007 @@ -16,7 +16,10 @@ #ifndef LLVM_INSTRUCTIONS_H #define LLVM_INSTRUCTIONS_H +#include + #include "llvm/InstrTypes.h" +#include "llvm/DerivedTypes.h" namespace llvm { @@ -735,12 +738,12 @@ //===----------------------------------------------------------------------===// // CallInst Class //===----------------------------------------------------------------------===// - /// CallInst - This class represents a function call, abstracting a target /// machine's calling convention. This class uses low bit of the SubClassData /// field to indicate whether or not this is a tail call. The rest of the bits /// hold the calling convention of the call. /// + class CallInst : public Instruction { ParamAttrsList *ParamAttrs; ///< parameter attributes for call CallInst(const CallInst &CI); @@ -749,18 +752,73 @@ void init(Value *Func, Value *Actual); void init(Value *Func); + template + void init(Value *Func, InputIterator ArgBegin, InputIterator ArgEnd, + const std::string &Name, + // This argument ensures that we have an iterator we can + // do arithmetic on in constant time + std::random_access_iterator_tag) { + typename std::iterator_traits::difference_type NumArgs = + std::distance(ArgBegin, ArgEnd); + + if (NumArgs > 0) { + // This requires that the iterator points to contiguous memory. + init(Func, &*ArgBegin, NumArgs); + } + else { + init(Func, 0, NumArgs); + } + + setName(Name); + } + public: + /// Construct a CallInst given a range of arguments. InputIterator + /// must be a random-access iterator pointing to contiguous storage + /// (e.g. a std::vector<>::iterator). Checks are made for + /// random-accessness but not for contiguous storage as that would + /// incur runtime overhead. + /// @brief Construct a CallInst from a range of arguments + template + CallInst(Value *Func, InputIterator ArgBegin, InputIterator ArgEnd, + const std::string &Name = "", Instruction *InsertBefore = 0) + : Instruction(cast(cast(Func->getType()) + ->getElementType())->getReturnType(), + Instruction::Call, 0, 0, InsertBefore) { + init(Func, ArgBegin, ArgEnd, Name, + typename std::iterator_traits::iterator_category()); + } + + /// Construct a CallInst given a range of arguments. InputIterator + /// must be a random-access iterator pointing to contiguous storage + /// (e.g. a std::vector<>::iterator). Checks are made for + /// random-accessness but not for contiguous storage as that would + /// incur runtime overhead. + /// @brief Construct a CallInst from a range of arguments + template + CallInst(Value *Func, InputIterator ArgBegin, InputIterator ArgEnd, + const std::string &Name, BasicBlock *InsertAtEnd) + : Instruction(cast(cast(Func->getType()) + ->getElementType())->getReturnType(), + Instruction::Call, 0, 0, InsertAtEnd) { + init(Func, ArgBegin, ArgEnd, Name, + typename std::iterator_traits::iterator_category()); + } + +#if 0 + // Leave these here for llvm-gcc CallInst(Value *F, Value* const *Args, unsigned NumArgs, const std::string &Name = "", Instruction *InsertBefore = 0); CallInst(Value *F, Value *const *Args, unsigned NumArgs, const std::string &Name, BasicBlock *InsertAtEnd); - + // Alternate CallInst ctors w/ two actuals, w/ one actual and no // actuals, respectively. CallInst(Value *F, Value *Actual1, Value *Actual2, const std::string& Name = "", Instruction *InsertBefore = 0); CallInst(Value *F, Value *Actual1, Value *Actual2, const std::string& Name, BasicBlock *InsertAtEnd); +#endif CallInst(Value *F, Value *Actual, const std::string& Name = "", Instruction *InsertBefore = 0); CallInst(Value *F, Value *Actual, const std::string& Name, Modified: llvm/trunk/include/llvm/Support/LLVMBuilder.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/LLVMBuilder.h?rev=40660&r1=40659&r2=40660&view=diff ============================================================================== --- llvm/trunk/include/llvm/Support/LLVMBuilder.h (original) +++ llvm/trunk/include/llvm/Support/LLVMBuilder.h Tue Jul 31 22:43:44 2007 @@ -380,22 +380,31 @@ } CallInst *CreateCall(Value *Callee, const char *Name = "") { - return Insert(new CallInst(Callee, (Value**)0, 0, Name)); + return Insert(new CallInst(Callee, Name)); } CallInst *CreateCall(Value *Callee, Value *Arg, const char *Name = "") { - return Insert(new CallInst(Callee, &Arg, 1, Name)); + return Insert(new CallInst(Callee, Arg, Name)); } - CallInst *CreateCall(Value *Callee, Value *Arg0, Value *Arg1, + + template + CallInst *CreateCall(Value *Callee, InputIterator ArgBegin, InputIterator ArgEnd, const char *Name = "") { - Value *Args[] = { Arg0, Arg1 }; - return Insert(new CallInst(Callee, Args, 2, Name)); + return(Insert(new CallInst(Callee, ArgBegin, ArgEnd, Name))); } - +#if 0 + CallInst *CreateCall(Value *Callee, Value *Arg0, Value *Arg1, + const char *Name = "") { + Value *Args[] = { Arg0, Arg1 }; + return Insert(new CallInst(Callee, Args, Args+2, Name)); + } + + // Leave this here for llvm-gcc CallInst *CreateCall(Value *Callee, Value* const *Args, unsigned NumArgs, const char *Name = "") { - return Insert(new CallInst(Callee, Args, NumArgs, Name)); + return Insert(new CallInst(Callee, Args, Args+NumArgs, Name)); } +#endif SelectInst *CreateSelect(Value *C, Value *True, Value *False, const char *Name = "") { Modified: llvm/trunk/lib/AsmParser/llvmAsmParser.y URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/llvmAsmParser.y?rev=40660&r1=40659&r2=40660&view=diff ============================================================================== --- llvm/trunk/lib/AsmParser/llvmAsmParser.y (original) +++ llvm/trunk/lib/AsmParser/llvmAsmParser.y Tue Jul 31 22:43:44 2007 @@ -2958,7 +2958,7 @@ GEN_ERROR("Invalid number of parameters detected"); } // Create the call node - CallInst *CI = new CallInst(V, &Args[0], Args.size()); + CallInst *CI = new CallInst(V, Args.begin(), Args.end()); CI->setTailCall($1); CI->setCallingConv($2); $$ = CI; Modified: llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp?rev=40660&r1=40659&r2=40660&view=diff ============================================================================== --- llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp (original) +++ llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp Tue Jul 31 22:43:44 2007 @@ -1499,7 +1499,7 @@ } } - I = new CallInst(Callee, &Args[0], Args.size()); + I = new CallInst(Callee, Args.begin(), Args.end()); cast(I)->setCallingConv(CCInfo>>1); cast(I)->setTailCall(CCInfo & 1); break; Modified: llvm/trunk/lib/CodeGen/IntrinsicLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/IntrinsicLowering.cpp?rev=40660&r1=40659&r2=40660&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/IntrinsicLowering.cpp (original) +++ llvm/trunk/lib/CodeGen/IntrinsicLowering.cpp Tue Jul 31 22:43:44 2007 @@ -53,8 +53,8 @@ FunctionType::get(RetTy, ParamTys, false)); } - SmallVector Operands(ArgBegin, ArgEnd); - CallInst *NewCI = new CallInst(FCache, &Operands[0], Operands.size(), + SmallVector Args(ArgBegin, ArgEnd); + CallInst *NewCI = new CallInst(FCache, Args.begin(), Args.end(), CI->getName(), CI); if (!CI->use_empty()) CI->replaceAllUsesWith(NewCI); @@ -421,7 +421,7 @@ CI->getOperand(2), CI->getOperand(3) }; - return new CallInst(F, Args, sizeof(Args)/sizeof(Args[0]), CI->getName(), CI); + return new CallInst(F, Args, Args+sizeof(Args)/sizeof(Args[0]), CI->getName(), CI); } /// Convert the llvm.part.set.iX.iY.iZ intrinsic. This intrinsic takes @@ -587,7 +587,7 @@ CI->getOperand(3), CI->getOperand(4) }; - return new CallInst(F, Args, sizeof(Args)/sizeof(Args[0]), CI->getName(), CI); + return new CallInst(F, Args, Args+sizeof(Args)/sizeof(Args[0]), CI->getName(), CI); } Modified: llvm/trunk/lib/ExecutionEngine/JIT/JIT.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/JIT/JIT.cpp?rev=40660&r1=40659&r2=40660&view=diff ============================================================================== --- llvm/trunk/lib/ExecutionEngine/JIT/JIT.cpp (original) +++ llvm/trunk/lib/ExecutionEngine/JIT/JIT.cpp Tue Jul 31 22:43:44 2007 @@ -224,7 +224,7 @@ Args.push_back(C); } - CallInst *TheCall = new CallInst(F, &Args[0], Args.size(), "", StubBB); + CallInst *TheCall = new CallInst(F, Args.begin(), Args.end(), "", StubBB); TheCall->setTailCall(); if (TheCall->getType() != Type::VoidTy) new ReturnInst(TheCall, StubBB); // Return result of the call. Modified: llvm/trunk/lib/Transforms/IPO/ArgumentPromotion.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/ArgumentPromotion.cpp?rev=40660&r1=40659&r2=40660&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/IPO/ArgumentPromotion.cpp (original) +++ llvm/trunk/lib/Transforms/IPO/ArgumentPromotion.cpp Tue Jul 31 22:43:44 2007 @@ -450,7 +450,7 @@ &Args[0], Args.size(), "", Call); cast(New)->setCallingConv(CS.getCallingConv()); } else { - New = new CallInst(NF, &Args[0], Args.size(), "", Call); + New = new CallInst(NF, Args.begin(), Args.end(), "", Call); cast(New)->setCallingConv(CS.getCallingConv()); if (cast(Call)->isTailCall()) cast(New)->setTailCall(); Modified: llvm/trunk/lib/Transforms/IPO/DeadArgumentElimination.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/DeadArgumentElimination.cpp?rev=40660&r1=40659&r2=40660&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/IPO/DeadArgumentElimination.cpp (original) +++ llvm/trunk/lib/Transforms/IPO/DeadArgumentElimination.cpp Tue Jul 31 22:43:44 2007 @@ -177,7 +177,7 @@ &Args[0], Args.size(), "", Call); cast(New)->setCallingConv(CS.getCallingConv()); } else { - New = new CallInst(NF, &Args[0], Args.size(), "", Call); + New = new CallInst(NF, Args.begin(), Args.end(), "", Call); cast(New)->setCallingConv(CS.getCallingConv()); if (cast(Call)->isTailCall()) cast(New)->setTailCall(); @@ -543,7 +543,7 @@ &Args[0], Args.size(), "", Call); cast(New)->setCallingConv(CS.getCallingConv()); } else { - New = new CallInst(NF, &Args[0], Args.size(), "", Call); + New = new CallInst(NF, Args.begin(), Args.end(), "", Call); cast(New)->setCallingConv(CS.getCallingConv()); if (cast(Call)->isTailCall()) cast(New)->setTailCall(); Modified: llvm/trunk/lib/Transforms/IPO/LowerSetJmp.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/LowerSetJmp.cpp?rev=40660&r1=40659&r2=40660&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/IPO/LowerSetJmp.cpp (original) +++ llvm/trunk/lib/Transforms/IPO/LowerSetJmp.cpp Tue Jul 31 22:43:44 2007 @@ -49,6 +49,7 @@ #include "llvm/ADT/Statistic.h" #include "llvm/ADT/StringExtras.h" #include "llvm/ADT/VectorExtras.h" +#include "llvm/ADT/SmallVector.h" using namespace llvm; STATISTIC(LongJmpsTransformed, "Number of longjmps transformed"); @@ -263,7 +264,10 @@ // Inst's uses and doesn't get a name. CastInst* CI = new BitCastInst(Inst->getOperand(1), SBPTy, "LJBuf", Inst); - new CallInst(ThrowLongJmp, CI, Inst->getOperand(2), "", Inst); + SmallVector Args; + Args.push_back(CI); + Args.push_back(Inst->getOperand(2)); + new CallInst(ThrowLongJmp, Args.begin(), Args.end(), "", Inst); SwitchValuePair& SVP = SwitchValMap[Inst->getParent()->getParent()]; @@ -381,7 +385,7 @@ make_vector(GetSetJmpMap(Func), BufPtr, ConstantInt::get(Type::Int32Ty, SetJmpIDMap[Func]++), 0); - new CallInst(AddSJToMap, &Args[0], Args.size(), "", Inst); + new CallInst(AddSJToMap, Args.begin(), Args.end(), "", Inst); // We are guaranteed that there are no values live across basic blocks // (because we are "not in SSA form" yet), but there can still be values live Modified: llvm/trunk/lib/Transforms/IPO/PruneEH.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/PruneEH.cpp?rev=40660&r1=40659&r2=40660&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/IPO/PruneEH.cpp (original) +++ llvm/trunk/lib/Transforms/IPO/PruneEH.cpp Tue Jul 31 22:43:44 2007 @@ -153,7 +153,7 @@ SmallVector Args(II->op_begin()+3, II->op_end()); // Insert a call instruction before the invoke. CallInst *Call = new CallInst(II->getCalledValue(), - &Args[0], Args.size(), "", II); + Args.begin(), Args.end(), "", II); Call->takeName(II); Call->setCallingConv(II->getCallingConv()); Modified: llvm/trunk/lib/Transforms/IPO/SimplifyLibCalls.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/SimplifyLibCalls.cpp?rev=40660&r1=40659&r2=40660&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/IPO/SimplifyLibCalls.cpp (original) +++ llvm/trunk/lib/Transforms/IPO/SimplifyLibCalls.cpp Tue Jul 31 22:43:44 2007 @@ -509,7 +509,7 @@ ConstantInt::get(SLC.getIntPtrType(), SrcStr.size()+1), // copy nul byte. ConstantInt::get(Type::Int32Ty, 1) // alignment }; - new CallInst(SLC.get_memcpy(), Vals, 4, "", CI); + new CallInst(SLC.get_memcpy(), Vals, Vals + 4, "", CI); return ReplaceCallWith(CI, Dst); } @@ -549,7 +549,7 @@ CI->getOperand(2), ConstantInt::get(SLC.getIntPtrType(), Str.size()+1) }; - return ReplaceCallWith(CI, new CallInst(SLC.get_memchr(), Args, 3, + return ReplaceCallWith(CI, new CallInst(SLC.get_memchr(), Args, Args + 3, CI->getName(), CI)); } @@ -752,7 +752,7 @@ ConstantInt::get(SLC.getIntPtrType(), SrcStr.size()+1), ConstantInt::get(Type::Int32Ty, 1) // alignment }; - new CallInst(SLC.get_memcpy(), MemcpyOps, 4, "", CI); + new CallInst(SLC.get_memcpy(), MemcpyOps, MemcpyOps + 4, "", CI); return ReplaceCallWith(CI, Dst); } @@ -1294,7 +1294,7 @@ ConstantInt::get(SLC.getIntPtrType(), 1), CI->getOperand(1) }; - new CallInst(SLC.get_fwrite(FILEty), FWriteArgs, 4, CI->getName(), CI); + new CallInst(SLC.get_fwrite(FILEty), FWriteArgs, FWriteArgs + 4, CI->getName(), CI); return ReplaceCallWith(CI, ConstantInt::get(CI->getType(), FormatStr.size())); } @@ -1311,7 +1311,10 @@ const Type *FILETy = CI->getOperand(1)->getType(); Value *C = CastInst::createZExtOrBitCast(CI->getOperand(3), Type::Int32Ty, CI->getName()+".int", CI); - new CallInst(SLC.get_fputc(FILETy), C, CI->getOperand(1), "", CI); + SmallVector Args; + Args.push_back(C); + Args.push_back(CI->getOperand(1)); + new CallInst(SLC.get_fputc(FILETy), Args.begin(), Args.end(), "", CI); return ReplaceCallWith(CI, ConstantInt::get(CI->getType(), 1)); } case 's': { @@ -1323,8 +1326,11 @@ return false; // fprintf(file,"%s",str) -> fputs(str,file) - new CallInst(SLC.get_fputs(FILETy), CastToCStr(CI->getOperand(3), CI), - CI->getOperand(1), CI->getName(), CI); + SmallVector Args; + Args.push_back(CastToCStr(CI->getOperand(3), CI)); + Args.push_back(CI->getOperand(1)); + new CallInst(SLC.get_fputs(FILETy), Args.begin(), + Args.end(), CI->getName(), CI); return ReplaceCallWith(CI, 0); } default: @@ -1375,7 +1381,7 @@ FormatStr.size()+1), // Copy the nul byte. ConstantInt::get(Type::Int32Ty, 1) }; - new CallInst(SLC.get_memcpy(), MemCpyArgs, 4, "", CI); + new CallInst(SLC.get_memcpy(), MemCpyArgs, MemCpyArgs + 4, "", CI); return ReplaceCallWith(CI, ConstantInt::get(CI->getType(), FormatStr.size())); } @@ -1412,7 +1418,7 @@ Len, ConstantInt::get(Type::Int32Ty, 1) }; - new CallInst(SLC.get_memcpy(), MemcpyArgs, 4, "", CI); + new CallInst(SLC.get_memcpy(), MemcpyArgs, MemcpyArgs + 4, "", CI); // The strlen result is the unincremented number of bytes in the string. if (!CI->use_empty()) { @@ -1464,7 +1470,7 @@ ConstantInt::get(SLC.getIntPtrType(), 1), CI->getOperand(2) }; - new CallInst(SLC.get_fwrite(FILETy), FWriteParms, 4, "", CI); + new CallInst(SLC.get_fwrite(FILETy), FWriteParms, FWriteParms + 4, "", CI); return ReplaceCallWith(CI, 0); // Known to have no uses (see above). } } FPutsOptimizer; @@ -1505,12 +1511,14 @@ // If this is writing one byte, turn it into fputc. if (EltSize == 1 && EltCount == 1) { + SmallVector Args; // fwrite(s,1,1,F) -> fputc(s[0],F) Value *Ptr = CI->getOperand(1); Value *Val = new LoadInst(Ptr, Ptr->getName()+".byte", CI); - Val = new ZExtInst(Val, Type::Int32Ty, Val->getName()+".int", CI); + Args.push_back(new ZExtInst(Val, Type::Int32Ty, Val->getName()+".int", CI)); + Args.push_back(CI->getOperand(4)); const Type *FILETy = CI->getOperand(4)->getType(); - new CallInst(SLC.get_fputc(FILETy), Val, CI->getOperand(4), "", CI); + new CallInst(SLC.get_fputc(FILETy), Args.begin(), Args.end(), "", CI); return ReplaceCallWith(CI, ConstantInt::get(CI->getType(), 1)); } return false; Modified: llvm/trunk/lib/Transforms/Instrumentation/ProfilingUtils.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Instrumentation/ProfilingUtils.cpp?rev=40660&r1=40659&r2=40660&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Instrumentation/ProfilingUtils.cpp (original) +++ llvm/trunk/lib/Transforms/Instrumentation/ProfilingUtils.cpp Tue Jul 31 22:43:44 2007 @@ -54,7 +54,7 @@ } Args[3] = ConstantInt::get(Type::Int32Ty, NumElements); - Instruction *InitCall = new CallInst(InitFn, &Args[0], Args.size(), + Instruction *InitCall = new CallInst(InitFn, Args.begin(), Args.end(), "newargc", InsertPos); // If argc or argv are not available in main, just pass null values in. Modified: llvm/trunk/lib/Transforms/Scalar/ADCE.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/ADCE.cpp?rev=40660&r1=40659&r2=40660&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/ADCE.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/ADCE.cpp Tue Jul 31 22:43:44 2007 @@ -194,7 +194,7 @@ // The function cannot unwind. Convert it to a call with a branch // after it to the normal destination. SmallVector Args(II->op_begin()+3, II->op_end()); - CallInst *NewCall = new CallInst(F, &Args[0], Args.size(), "", II); + CallInst *NewCall = new CallInst(F, Args.begin(), Args.end(), "", II); NewCall->takeName(II); NewCall->setCallingConv(II->getCallingConv()); II->replaceAllUsesWith(NewCall); Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp?rev=40660&r1=40659&r2=40660&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Tue Jul 31 22:43:44 2007 @@ -7978,7 +7978,7 @@ &Args[0], Args.size(), Caller->getName(), Caller); cast(NC)->setCallingConv(II->getCallingConv()); } else { - NC = new CallInst(Callee, &Args[0], Args.size(), Caller->getName(), Caller); + NC = new CallInst(Callee, Args.begin(), Args.end(), Caller->getName(), Caller); if (cast(Caller)->isTailCall()) cast(NC)->setTailCall(); cast(NC)->setCallingConv(cast(Caller)->getCallingConv()); Modified: llvm/trunk/lib/Transforms/Scalar/LowerGC.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LowerGC.cpp?rev=40660&r1=40659&r2=40660&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/LowerGC.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/LowerGC.cpp Tue Jul 31 22:43:44 2007 @@ -27,6 +27,7 @@ #include "llvm/Module.h" #include "llvm/Pass.h" #include "llvm/Support/Compiler.h" +#include "llvm/ADT/SmallVector.h" using namespace llvm; namespace { @@ -197,8 +198,18 @@ CI->setOperand(0, GCRead); } else { // Create a whole new call to replace the old one. - CallInst *NC = new CallInst(GCRead, CI->getOperand(1), - CI->getOperand(2), + + // It sure would be nice to pass op_begin()+1, + // op_begin()+2 but it runs into trouble with + // CallInst::init's &*ierator, which requires a + // conversion from Use* to Value*. The conversion + // from Use to Value * is not useful because the + // memory for Value * won't be contiguous. + SmallVector Args; + Args.push_back(CI->getOperand(1)); + Args.push_back(CI->getOperand(2)); + CallInst *NC = new CallInst(GCRead, Args.begin(), + Args.end(), CI->getName(), CI); // These functions only deal with ptr type results so BitCast // is the correct kind of cast (no-op cast). Modified: llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp?rev=40660&r1=40659&r2=40660&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp Tue Jul 31 22:43:44 2007 @@ -709,7 +709,7 @@ ConstantInt::get(MI->getOperand(3)->getType(), EltSize), // Size Zero // Align }; - new CallInst(TheFn, Ops, 4, "", MI); + new CallInst(TheFn, Ops, Ops + 4, "", MI); } else { assert(isa(MI)); Value *Ops[] = { @@ -717,7 +717,7 @@ ConstantInt::get(MI->getOperand(3)->getType(), EltSize), // Size Zero // Align }; - new CallInst(TheFn, Ops, 4, "", MI); + new CallInst(TheFn, Ops, Ops + 4, "", MI); } } Modified: llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp?rev=40660&r1=40659&r2=40660&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp Tue Jul 31 22:43:44 2007 @@ -393,7 +393,7 @@ } // Emit the call to the function - CallInst *call = new CallInst(newFunction, ¶ms[0], params.size(), + CallInst *call = new CallInst(newFunction, params.begin(), params.end(), NumExitBlocks > 1 ? "targetBlock" : ""); codeReplacer->getInstList().push_back(call); Modified: llvm/trunk/lib/Transforms/Utils/LowerInvoke.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/LowerInvoke.cpp?rev=40660&r1=40659&r2=40660&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/LowerInvoke.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/LowerInvoke.cpp Tue Jul 31 22:43:44 2007 @@ -212,7 +212,7 @@ std::vector CallArgs(II->op_begin()+3, II->op_end()); // Insert a normal call instruction... CallInst *NewCall = new CallInst(II->getCalledValue(), - &CallArgs[0], CallArgs.size(), "", II); + CallArgs.begin(), CallArgs.end(), "", II); NewCall->takeName(II); NewCall->setCallingConv(II->getCallingConv()); II->replaceAllUsesWith(NewCall); @@ -269,7 +269,7 @@ // Insert a normal call instruction. std::vector CallArgs(II->op_begin()+3, II->op_end()); CallInst *NewCall = new CallInst(II->getCalledValue(), - &CallArgs[0], CallArgs.size(), "", + CallArgs.begin(), CallArgs.end(), "", II); NewCall->takeName(II); NewCall->setCallingConv(II->getCallingConv()); @@ -542,7 +542,7 @@ Idx.push_back(ConstantInt::get(Type::Int32Ty, 0)); Idx[0] = new GetElementPtrInst(BufPtr, &Idx[0], 2, "JmpBuf", UnwindBlock); Idx[1] = ConstantInt::get(Type::Int32Ty, 1); - new CallInst(LongJmpFn, &Idx[0], Idx.size(), "", UnwindBlock); + new CallInst(LongJmpFn, Idx.begin(), Idx.end(), "", UnwindBlock); new UnreachableInst(UnwindBlock); // Set up the term block ("throw without a catch"). Modified: llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp?rev=40660&r1=40659&r2=40660&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp Tue Jul 31 22:43:44 2007 @@ -1374,7 +1374,7 @@ // Insert the call now... SmallVector Args(II->op_begin()+3, II->op_end()); CallInst *CI = new CallInst(II->getCalledValue(), - &Args[0], Args.size(), II->getName(), BI); + Args.begin(), Args.end(), II->getName(), BI); CI->setCallingConv(II->getCallingConv()); // If the invoke produced a value, the Call now does instead II->replaceAllUsesWith(CI); @@ -1748,7 +1748,7 @@ // Insert the call now... SmallVector Args(II->op_begin()+3, II->op_end()); CallInst *CI = new CallInst(II->getCalledValue(), - &Args[0], Args.size(), + Args.begin(), Args.end(), II->getName(), BI); CI->setCallingConv(II->getCallingConv()); // If the invoke produced a value, the Call does now instead. Modified: llvm/trunk/lib/VMCore/Instructions.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Instructions.cpp?rev=40660&r1=40659&r2=40660&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Instructions.cpp (original) +++ llvm/trunk/lib/VMCore/Instructions.cpp Tue Jul 31 22:43:44 2007 @@ -267,19 +267,21 @@ assert(FTy->getNumParams() == 0 && "Calling a function with bad signature"); } +#if 0 +// Leave for llvm-gcc CallInst::CallInst(Value *Func, Value* const *Args, unsigned NumArgs, const std::string &Name, BasicBlock *InsertAtEnd) : Instruction(cast(cast(Func->getType()) - ->getElementType())->getReturnType(), + ->getElementType())->getReturnType(), Instruction::Call, 0, 0, InsertAtEnd) { init(Func, Args, NumArgs); setName(Name); } CallInst::CallInst(Value *Func, Value* const *Args, unsigned NumArgs, const std::string &Name, Instruction *InsertBefore) -: Instruction(cast(cast(Func->getType()) - ->getElementType())->getReturnType(), - Instruction::Call, 0, 0, InsertBefore) { + : Instruction(cast(cast(Func->getType()) + ->getElementType())->getReturnType(), + Instruction::Call, 0, 0, InsertBefore) { init(Func, Args, NumArgs); setName(Name); } @@ -301,7 +303,7 @@ init(Func, Actual1, Actual2); setName(Name); } - +#endif CallInst::CallInst(Value *Func, Value* Actual, const std::string &Name, Instruction *InsertBefore) : Instruction(cast(cast(Func->getType()) @@ -319,7 +321,6 @@ init(Func, Actual); setName(Name); } - CallInst::CallInst(Value *Func, const std::string &Name, Instruction *InsertBefore) : Instruction(cast(cast(Func->getType()) Modified: llvm/trunk/tools/bugpoint/Miscompilation.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/bugpoint/Miscompilation.cpp?rev=40660&r1=40659&r2=40660&view=diff ============================================================================== --- llvm/trunk/tools/bugpoint/Miscompilation.cpp (original) +++ llvm/trunk/tools/bugpoint/Miscompilation.cpp Tue Jul 31 22:43:44 2007 @@ -663,7 +663,7 @@ // Call the old main function and return its result BasicBlock *BB = new BasicBlock("entry", newMain); - CallInst *call = new CallInst(oldMainProto, &args[0], args.size(), + CallInst *call = new CallInst(oldMainProto, args.begin(), args.end(), "", BB); // If the type of old function wasn't void, return value of call @@ -734,8 +734,8 @@ // Resolve the call to function F via the JIT API: // // call resolver(GetElementPtr...) - CallInst *Resolver = new CallInst(resolverFunc, &ResolverArgs[0], - ResolverArgs.size(), + CallInst *Resolver = new CallInst(resolverFunc, ResolverArgs.begin(), + ResolverArgs.end(), "resolver", LookupBB); // cast the result from the resolver to correctly-typed function CastInst *CastedResolver = new BitCastInst(Resolver, @@ -757,10 +757,10 @@ // Pass on the arguments to the real function, return its result if (F->getReturnType() == Type::VoidTy) { - new CallInst(FuncPtr, &Args[0], Args.size(), "", DoCallBB); + new CallInst(FuncPtr, Args.begin(), Args.end(), "", DoCallBB); new ReturnInst(DoCallBB); } else { - CallInst *Call = new CallInst(FuncPtr, &Args[0], Args.size(), + CallInst *Call = new CallInst(FuncPtr, Args.begin(), Args.end(), "retval", DoCallBB); new ReturnInst(Call, DoCallBB); } Modified: llvm/trunk/tools/llvm-upgrade/UpgradeParser.y URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-upgrade/UpgradeParser.y?rev=40660&r1=40659&r2=40660&view=diff ============================================================================== --- llvm/trunk/tools/llvm-upgrade/UpgradeParser.y (original) +++ llvm/trunk/tools/llvm-upgrade/UpgradeParser.y Tue Jul 31 22:43:44 2007 @@ -1513,7 +1513,7 @@ const PointerType *PFTy = PointerType::get(FTy); Value* Func = getVal(PFTy, ID); Args[0] = new BitCastInst(Args[0], PtrTy, makeNameUnique("va"), CurBB); - return new CallInst(Func, &Args[0], Args.size()); + return new CallInst(Func, Args.begin(), Args.end()); } else if (Name == "llvm.va_copy") { if (Args.size() != 2) error("Invalid prototype for " + Name + " prototype"); @@ -1527,7 +1527,7 @@ std::string InstName1(makeNameUnique("va1")); Args[0] = new BitCastInst(Args[0], PtrTy, InstName0, CurBB); Args[1] = new BitCastInst(Args[1], PtrTy, InstName1, CurBB); - return new CallInst(Func, &Args[0], Args.size()); + return new CallInst(Func, Args.begin(), Args.end()); } } } @@ -1751,11 +1751,12 @@ while (!F->use_empty()) { CallInst* CI = cast(F->use_back()); - AllocaInst* a = new AllocaInst(ArgTy, 0, "vacopy.fix.1", CI); - AllocaInst* b = new AllocaInst(ArgTy, 0, "vacopy.fix.2", CI); - new StoreInst(CI->getOperand(1), b, CI); - new CallInst(NF, a, b, "", CI); - Value* foo = new LoadInst(a, "vacopy.fix.3", CI); + SmallVector Args; + Args.push_back(new AllocaInst(ArgTy, 0, "vacopy.fix.1", CI)); + Args.push_back(new AllocaInst(ArgTy, 0, "vacopy.fix.2", CI)); + new StoreInst(CI->getOperand(1), Args[1], CI); + new CallInst(NF, Args.begin(), Args.end(), "", CI); + Value* foo = new LoadInst(Args[0], "vacopy.fix.3", CI); CI->replaceAllUsesWith(foo); CI->getParent()->getInstList().erase(CI); } @@ -3806,7 +3807,7 @@ } // Create the call instruction - CallInst *CI = new CallInst(V, &Args[0], Args.size()); + CallInst *CI = new CallInst(V, Args.begin(), Args.end()); CI->setTailCall($1); CI->setCallingConv(upgradeCallingConv($2)); $$.I = CI; From greened at obbligato.org Tue Jul 31 22:44:25 2007 From: greened at obbligato.org (David Greene) Date: Wed, 01 Aug 2007 03:44:25 -0000 Subject: [llvm-commits] [llvm-gcc-4.0] r40661 - in /llvm-gcc-4.0/trunk/gcc: config/i386/llvm-i386.cpp llvm-convert.cpp llvm-debug.cpp Message-ID: <200708010344.l713iPY0020056@zion.cs.uiuc.edu> Author: greened Date: Tue Jul 31 22:44:20 2007 New Revision: 40661 URL: http://llvm.org/viewvc/llvm-project?rev=40661&view=rev Log: Updates to CallInst constructor clients to address GLIBCXX_DEBUG errors. Modified: llvm-gcc-4.0/trunk/gcc/config/i386/llvm-i386.cpp llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp llvm-gcc-4.0/trunk/gcc/llvm-debug.cpp Modified: llvm-gcc-4.0/trunk/gcc/config/i386/llvm-i386.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.0/trunk/gcc/config/i386/llvm-i386.cpp?rev=40661&r1=40660&r2=40661&view=diff ============================================================================== --- llvm-gcc-4.0/trunk/gcc/config/i386/llvm-i386.cpp (original) +++ llvm-gcc-4.0/trunk/gcc/config/i386/llvm-i386.cpp Tue Jul 31 22:44:20 2007 @@ -79,7 +79,7 @@ Function *psllw = Intrinsic::getDeclaration(TheModule, Intrinsic::x86_mmx_psll_w); Ops[1] = BuildVector(Ops[1], UndefValue::get(Type::Int32Ty), NULL); - Result = Builder.CreateCall(psllw, Ops[0], Ops[1], "tmp"); + Result = Builder.CreateCall(psllw, Ops.begin(), Ops.begin()+2, "tmp"); Result = Builder.CreateBitCast(Result, ResultType, "tmp"); return true; } @@ -88,7 +88,7 @@ Intrinsic::getDeclaration(TheModule, Intrinsic::x86_sse2_psll_w); Value *Undef = UndefValue::get(Type::Int32Ty); Ops[1] = BuildVector(Ops[1], Undef, Undef, Undef, NULL); - Result = Builder.CreateCall(psllw, Ops[0], Ops[1], "tmp"); + Result = Builder.CreateCall(psllw, Ops.begin(), Ops.begin()+2, "tmp"); Result = Builder.CreateBitCast(Result, ResultType, "tmp"); return true; } @@ -96,7 +96,7 @@ Function *pslld = Intrinsic::getDeclaration(TheModule, Intrinsic::x86_mmx_psll_d); Ops[1] = BuildVector(Ops[1], UndefValue::get(Type::Int32Ty), NULL); - Result = Builder.CreateCall(pslld, Ops[0], Ops[1], "tmp"); + Result = Builder.CreateCall(pslld, Ops.begin(), Ops.begin()+2, "tmp"); Result = Builder.CreateBitCast(Result, ResultType, "tmp"); return true; } @@ -105,7 +105,7 @@ = Intrinsic::getDeclaration(TheModule, Intrinsic::x86_sse2_psll_d); Value *Undef = UndefValue::get(Type::Int32Ty); Ops[1] = BuildVector(Ops[1], Undef, Undef, Undef, NULL); - Result = Builder.CreateCall(pslld, Ops[0], Ops[1], "tmp"); + Result = Builder.CreateCall(pslld, Ops.begin(), Ops.begin()+2, "tmp"); Result = Builder.CreateBitCast(Result, ResultType, "tmp"); return true; } @@ -113,7 +113,7 @@ Function *psllq = Intrinsic::getDeclaration(TheModule, Intrinsic::x86_mmx_psll_q); Ops[1] = BuildVector(Ops[1], UndefValue::get(Type::Int32Ty), NULL); - Result = Builder.CreateCall(psllq, Ops[0], Ops[1], "tmp"); + Result = Builder.CreateCall(psllq, Ops.begin(), Ops.begin()+2, "tmp"); Result = Builder.CreateBitCast(Result, ResultType, "tmp"); return true; } @@ -122,7 +122,7 @@ Intrinsic::getDeclaration(TheModule, Intrinsic::x86_sse2_psll_q); Value *Undef = UndefValue::get(Type::Int32Ty); Ops[1] = BuildVector(Ops[1], Undef, Undef, Undef, NULL); - Result = Builder.CreateCall(psllq, Ops[0], Ops[1], "tmp"); + Result = Builder.CreateCall(psllq, Ops.begin(), Ops.begin()+2, "tmp"); Result = Builder.CreateBitCast(Result, ResultType, "tmp"); return true; } @@ -130,7 +130,7 @@ Function *psrlw = Intrinsic::getDeclaration(TheModule, Intrinsic::x86_mmx_psrl_w); Ops[1] = BuildVector(Ops[1], UndefValue::get(Type::Int32Ty), NULL); - Result = Builder.CreateCall(psrlw, Ops[0], Ops[1], "tmp"); + Result = Builder.CreateCall(psrlw, Ops.begin(), Ops.begin()+2, "tmp"); Result = Builder.CreateBitCast(Result, ResultType, "tmp"); return true; } @@ -139,7 +139,7 @@ Intrinsic::getDeclaration(TheModule, Intrinsic::x86_sse2_psrl_w); Value *Undef = UndefValue::get(Type::Int32Ty); Ops[1] = BuildVector(Ops[1], Undef, Undef, Undef, NULL); - Result = Builder.CreateCall(psrlw, Ops[0], Ops[1], "tmp"); + Result = Builder.CreateCall(psrlw, Ops.begin(), Ops.begin()+2, "tmp"); Result = Builder.CreateBitCast(Result, ResultType, "tmp"); return true; } @@ -147,7 +147,7 @@ Function *psrld = Intrinsic::getDeclaration(TheModule, Intrinsic::x86_mmx_psrl_d); Ops[1] = BuildVector(Ops[1], UndefValue::get(Type::Int32Ty), NULL); - Result = Builder.CreateCall(psrld, Ops[0], Ops[1], "tmp"); + Result = Builder.CreateCall(psrld, Ops.begin(), Ops.begin()+2, "tmp"); Result = Builder.CreateBitCast(Result, ResultType, "tmp"); return true; } @@ -156,7 +156,7 @@ Intrinsic::getDeclaration(TheModule, Intrinsic::x86_sse2_psrl_d); Value *Undef = UndefValue::get(Type::Int32Ty); Ops[1] = BuildVector(Ops[1], Undef, Undef, Undef, NULL); - Result = Builder.CreateCall(psrld, Ops[0], Ops[1], "tmp"); + Result = Builder.CreateCall(psrld, Ops.begin(), Ops.begin()+2, "tmp"); Result = Builder.CreateBitCast(Result, ResultType, "tmp"); return true; } @@ -164,7 +164,7 @@ Function *psrlq = Intrinsic::getDeclaration(TheModule, Intrinsic::x86_mmx_psrl_q); Ops[1] = BuildVector(Ops[1], UndefValue::get(Type::Int32Ty), NULL); - Result = Builder.CreateCall(psrlq, Ops[0], Ops[1], "tmp"); + Result = Builder.CreateCall(psrlq, Ops.begin(), Ops.begin()+2, "tmp"); Result = Builder.CreateBitCast(Result, ResultType, "tmp"); return true; } @@ -173,7 +173,7 @@ Intrinsic::getDeclaration(TheModule, Intrinsic::x86_sse2_psrl_q); Value *Undef = UndefValue::get(Type::Int32Ty); Ops[1] = BuildVector(Ops[1], Undef, Undef, Undef, NULL); - Result = Builder.CreateCall(psrlq, Ops[0], Ops[1], "tmp"); + Result = Builder.CreateCall(psrlq, Ops.begin(), Ops.begin()+2, "tmp"); Result = Builder.CreateBitCast(Result, ResultType, "tmp"); return true; } @@ -181,7 +181,7 @@ Function *psraw = Intrinsic::getDeclaration(TheModule, Intrinsic::x86_mmx_psra_w); Ops[1] = BuildVector(Ops[1], UndefValue::get(Type::Int32Ty), NULL); - Result = Builder.CreateCall(psraw, Ops[0], Ops[1], "tmp"); + Result = Builder.CreateCall(psraw, Ops.begin(), Ops.begin()+2, "tmp"); Result = Builder.CreateBitCast(Result, ResultType, "tmp"); return true; } @@ -190,7 +190,7 @@ Intrinsic::getDeclaration(TheModule, Intrinsic::x86_sse2_psra_w); Value *Undef = UndefValue::get(Type::Int32Ty); Ops[1] = BuildVector(Ops[1], Undef, Undef, Undef, NULL); - Result = Builder.CreateCall(psraw, Ops[0], Ops[1], "tmp"); + Result = Builder.CreateCall(psraw, Ops.begin(), Ops.begin()+2, "tmp"); Result = Builder.CreateBitCast(Result, ResultType, "tmp"); return true; } @@ -198,7 +198,7 @@ Function *psrad = Intrinsic::getDeclaration(TheModule, Intrinsic::x86_mmx_psra_d); Ops[1] = BuildVector(Ops[1], UndefValue::get(Type::Int32Ty), NULL); - Result = Builder.CreateCall(psrad, Ops[0], Ops[1], "tmp"); + Result = Builder.CreateCall(psrad, Ops.begin(), Ops.begin()+2, "tmp"); Result = Builder.CreateBitCast(Result, ResultType, "tmp"); return true; } @@ -207,7 +207,7 @@ Intrinsic::getDeclaration(TheModule, Intrinsic::x86_sse2_psra_d); Value *Undef = UndefValue::get(Type::Int32Ty); Ops[1] = BuildVector(Ops[1], Undef, Undef, Undef, NULL); - Result = Builder.CreateCall(psrad, Ops[0], Ops[1], "tmp"); + Result = Builder.CreateCall(psrad, Ops.begin(), Ops.begin()+2, "tmp"); Result = Builder.CreateBitCast(Result, ResultType, "tmp"); return true; } @@ -489,7 +489,7 @@ Value *Arg1 = Ops[1]; if (flip) std::swap(Arg0, Arg1); Value *CallOps[3] = { Arg0, Arg1, Pred }; - Result = Builder.CreateCall(cmpps, CallOps, 3, "tmp"); + Result = Builder.CreateCall(cmpps, CallOps, CallOps+3, "tmp"); Result = Builder.CreateBitCast(Result, ResultType, "tmp"); return true; } @@ -519,7 +519,7 @@ } Value *Pred = ConstantInt::get(Type::Int8Ty, PredCode); Value *CallOps[3] = { Ops[0], Ops[1], Pred }; - Result = Builder.CreateCall(cmpss, CallOps, 3, "tmp"); + Result = Builder.CreateCall(cmpss, CallOps, CallOps+3, "tmp"); Result = Builder.CreateBitCast(Result, ResultType, "tmp"); return true; } @@ -560,7 +560,7 @@ if (flip) std::swap(Arg0, Arg1); Value *CallOps[3] = { Arg0, Arg1, Pred }; - Result = Builder.CreateCall(cmppd, CallOps, 3, "tmp"); + Result = Builder.CreateCall(cmppd, CallOps, CallOps+3, "tmp"); Result = Builder.CreateBitCast(Result, ResultType, "tmp"); return true; } @@ -588,7 +588,7 @@ } Value *Pred = ConstantInt::get(Type::Int8Ty, PredCode); Value *CallOps[3] = { Ops[0], Ops[1], Pred }; - Result = Builder.CreateCall(cmpsd, CallOps, 3, "tmp"); + Result = Builder.CreateCall(cmpsd, CallOps, CallOps+3, "tmp"); Result = Builder.CreateBitCast(Result, ResultType, "tmp"); return true; } Modified: llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp?rev=40661&r1=40660&r2=40661&view=diff ============================================================================== --- llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp (original) +++ llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp Tue Jul 31 22:44:20 2007 @@ -724,7 +724,7 @@ if (ExceptionValue) { // Fetch and store exception handler. Value *Arg = Builder.CreateLoad(ExceptionValue, "eh_ptr"); - Builder.CreateCall(FuncUnwindResume, &Arg, 1); + Builder.CreateCall(FuncUnwindResume, Arg); Builder.CreateUnreachable(); } else { new UnwindInst(UnwindBB); @@ -1273,7 +1273,7 @@ Intrinsic::ID IID = (IntPtr == Type::Int32Ty) ? Intrinsic::memcpy_i32 : Intrinsic::memcpy_i64; - Builder.CreateCall(Intrinsic::getDeclaration(TheModule, IID), Ops, 4); + Builder.CreateCall(Intrinsic::getDeclaration(TheModule, IID), Ops, Ops+4); } void TreeToLLVM::EmitMemMove(Value *DestPtr, Value *SrcPtr, Value *Size, @@ -1289,7 +1289,7 @@ Intrinsic::ID IID = (IntPtr == Type::Int32Ty) ? Intrinsic::memmove_i32 : Intrinsic::memmove_i64; - Builder.CreateCall(Intrinsic::getDeclaration(TheModule, IID), Ops, 4); + Builder.CreateCall(Intrinsic::getDeclaration(TheModule, IID), Ops, Ops+4); } void TreeToLLVM::EmitMemSet(Value *DestPtr, Value *SrcVal, Value *Size, @@ -1306,7 +1306,7 @@ Intrinsic::ID IID = (IntPtr == Type::Int32Ty) ? Intrinsic::memset_i32 : Intrinsic::memset_i64; - Builder.CreateCall(Intrinsic::getDeclaration(TheModule, IID), Ops, 4); + Builder.CreateCall(Intrinsic::getDeclaration(TheModule, IID), Ops, Ops+4); } @@ -1440,7 +1440,7 @@ lineNo }; - Builder.CreateCall(annotateFun, Ops, 4); + Builder.CreateCall(annotateFun, Ops, Ops+4); } // Get next annotate attribute. @@ -2041,7 +2041,7 @@ } } - Value *Select = Builder.CreateCall(FuncEHSelector, &Args[0], Args.size(), + Value *Select = Builder.CreateCall(FuncEHSelector, Args.begin(), Args.end(), "eh_select"); Builder.CreateStore(Select, ExceptionSelectorValue); } @@ -2321,7 +2321,7 @@ TypeInfo = BitCastToType(TypeInfo, PointerType::get(Type::Int8Ty)); // Call get eh type id. - Value *TypeID = Builder.CreateCall(FuncEHGetTypeID, &TypeInfo, 1, + Value *TypeID = Builder.CreateCall(FuncEHGetTypeID, TypeInfo, "eh_typeid"); Value *Select = Builder.CreateLoad(ExceptionSelectorValue, "tmp"); @@ -2346,7 +2346,7 @@ TypeInfo = BitCastToType(TypeInfo, PointerType::get(Type::Int8Ty)); // Call get eh type id. - Value *TypeID = Builder.CreateCall(FuncEHGetTypeID, &TypeInfo, 1, + Value *TypeID = Builder.CreateCall(FuncEHGetTypeID, TypeInfo, "eh_typeid"); Value *Select = Builder.CreateLoad(ExceptionSelectorValue, "tmp"); @@ -2766,7 +2766,7 @@ Value *Call; if (!UnwindBlock) { - Call = Builder.CreateCall(Callee, &CallOperands[0], CallOperands.size()); + Call = Builder.CreateCall(Callee, CallOperands.begin(), CallOperands.end()); cast(Call)->setCallingConv(CallingConvention); } else { BasicBlock *NextBlock = new BasicBlock("invcont"); @@ -3608,7 +3608,7 @@ const char *Name = IDENTIFIER_POINTER(DECL_ASSEMBLER_NAME(decl)); InlineAsm *IA = InlineAsm::get(FTy, "", "{"+std::string(Name)+"}", true); - Builder.CreateCall(IA, &RHS, 1); + Builder.CreateCall(IA, RHS); } /// ConvertInlineAsmStr - Convert the specified inline asm string to an LLVM @@ -4013,7 +4013,7 @@ Value *Asm = InlineAsm::get(FTy, NewAsmStr, ConstraintStr, ASM_VOLATILE_P(exp) || !ASM_OUTPUTS(exp)); - CallInst *CV = Builder.CreateCall(Asm, &CallOps[0], CallOps.size(), + CallInst *CV = Builder.CreateCall(Asm, CallOps.begin(), CallOps.end(), StoreCallResultAddr ? "tmp" : ""); // If the call produces a value, store it into the destination. @@ -4334,7 +4334,7 @@ InVal->getType() }; Result = Builder.CreateCall(Intrinsic::getDeclaration(TheModule, Id, Tys, - sizeof(Tys)/sizeof(Tys[0])), + sizeof(Tys)/sizeof(Tys[0])), InVal, "tmp"); return true; @@ -4387,8 +4387,11 @@ case Type::DoubleTyID: Id = Intrinsic::powi_f64; break; } + SmallVector Args; + Args.push_back(Val); + Args.push_back(Pow); return Builder.CreateCall(Intrinsic::getDeclaration(TheModule, Id), - Val, Pow, "tmp"); + Args.begin(), Args.end(), "tmp"); } @@ -4521,7 +4524,7 @@ Value *Ops[3] = { Ptr, ReadWrite, Locality }; Builder.CreateCall(Intrinsic::getDeclaration(TheModule, Intrinsic::prefetch), - Ops, 3); + Ops, Ops+3); return true; } @@ -4681,9 +4684,12 @@ Handler = CastToType(Instruction::BitCast, Handler, PointerType::get(Type::Int8Ty)); + SmallVector Args; + Args.push_back(Offset); + Args.push_back(Handler); Builder.CreateCall(Intrinsic::getDeclaration(TheModule, Intrinsic::eh_return), - Offset, Handler); + Args.begin(), Args.end()); Result = Builder.CreateUnreachable(); EmitBlock(new BasicBlock("")); @@ -4855,11 +4861,12 @@ static const Type *VPTy = PointerType::get(Type::Int8Ty); - Arg1 = CastToType(Instruction::BitCast, Arg1, VPTy); - Arg2 = CastToType(Instruction::BitCast, Arg2, VPTy); + SmallVector Args; + Args.push_back(CastToType(Instruction::BitCast, Arg1, VPTy)); + Args.push_back(CastToType(Instruction::BitCast, Arg2, VPTy)); Builder.CreateCall(Intrinsic::getDeclaration(TheModule, Intrinsic::vacopy), - Arg1, Arg2); + Args.begin(), Args.end()); return true; } @@ -4884,7 +4891,7 @@ Function *Intr = Intrinsic::getDeclaration(TheModule, Intrinsic::init_trampoline); - Builder.CreateCall(Intr, Ops, 3); + Builder.CreateCall(Intr, Ops, Ops+3); return true; } Modified: llvm-gcc-4.0/trunk/gcc/llvm-debug.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.0/trunk/gcc/llvm-debug.cpp?rev=40661&r1=40660&r2=40661&view=diff ============================================================================== --- llvm-gcc-4.0/trunk/gcc/llvm-debug.cpp (original) +++ llvm-gcc-4.0/trunk/gcc/llvm-debug.cpp Tue Jul 31 22:44:20 2007 @@ -36,6 +36,7 @@ #include "llvm/Support/Dwarf.h" #include "llvm/Target/TargetMachine.h" #include "llvm/ADT/StringExtras.h" +#include "llvm/ADT/SmallVector.h" #include "llvm/CodeGen/MachineModuleInfo.h" #include @@ -346,7 +347,10 @@ Value *AllocACast = new BitCastInst(AI, EmpPtr, Name, CurBB); // Call llvm.dbg.declare. - new CallInst(DeclareFn, AllocACast, getCastValueFor(Variable), "", CurBB); + SmallVector Args; + Args.push_back(AllocACast); + Args.push_back(getCastValueFor(Variable)); + new CallInst(DeclareFn, Args.begin(), Args.end(), "", CurBB); } /// EmitStopPoint - Emit a call to llvm.dbg.stoppoint to indicate a change of @@ -377,7 +381,7 @@ ConstantInt::get(Type::Int32Ty, 0), getCastValueFor(Unit) }; - new CallInst(StopPointFn, Args, 3, "", CurBB); + new CallInst(StopPointFn, Args, Args+3, "", CurBB); } /// EmitGlobalVariable - Emit information about a global variable. From greened at obbligato.org Tue Jul 31 22:46:49 2007 From: greened at obbligato.org (David Greene) Date: Wed, 01 Aug 2007 03:46:49 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r40662 - in /llvm-gcc-4.2/trunk/gcc: config/i386/llvm-i386.cpp llvm-convert.cpp llvm-debug.cpp Message-ID: <200708010346.l713koxP020122@zion.cs.uiuc.edu> Author: greened Date: Tue Jul 31 22:46:49 2007 New Revision: 40662 URL: http://llvm.org/viewvc/llvm-project?rev=40662&view=rev Log: Update CallInst constructor clients to address GLIBCXX_DEBUG errors. Modified: llvm-gcc-4.2/trunk/gcc/config/i386/llvm-i386.cpp llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp llvm-gcc-4.2/trunk/gcc/llvm-debug.cpp Modified: llvm-gcc-4.2/trunk/gcc/config/i386/llvm-i386.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/i386/llvm-i386.cpp?rev=40662&r1=40661&r2=40662&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/config/i386/llvm-i386.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/config/i386/llvm-i386.cpp Tue Jul 31 22:46:49 2007 @@ -79,7 +79,7 @@ Function *psllw = Intrinsic::getDeclaration(TheModule, Intrinsic::x86_mmx_psll_w); Ops[1] = BuildVector(Ops[1], UndefValue::get(Type::Int32Ty), NULL); - Result = Builder.CreateCall(psllw, Ops[0], Ops[1], "tmp"); + Result = Builder.CreateCall(psllw, Ops.begin(), Ops.begin()+2, "tmp"); Result = Builder.CreateBitCast(Result, ResultType, "tmp"); return true; } @@ -88,7 +88,7 @@ Intrinsic::getDeclaration(TheModule, Intrinsic::x86_sse2_psll_w); Value *Undef = UndefValue::get(Type::Int32Ty); Ops[1] = BuildVector(Ops[1], Undef, Undef, Undef, NULL); - Result = Builder.CreateCall(psllw, Ops[0], Ops[1], "tmp"); + Result = Builder.CreateCall(psllw, Ops.begin(), Ops.begin()+2, "tmp"); Result = Builder.CreateBitCast(Result, ResultType, "tmp"); return true; } @@ -96,7 +96,7 @@ Function *pslld = Intrinsic::getDeclaration(TheModule, Intrinsic::x86_mmx_psll_d); Ops[1] = BuildVector(Ops[1], UndefValue::get(Type::Int32Ty), NULL); - Result = Builder.CreateCall(pslld, Ops[0], Ops[1], "tmp"); + Result = Builder.CreateCall(pslld, Ops.begin(), Ops.begin()+2, "tmp"); Result = Builder.CreateBitCast(Result, ResultType, "tmp"); return true; } @@ -105,7 +105,7 @@ = Intrinsic::getDeclaration(TheModule, Intrinsic::x86_sse2_psll_d); Value *Undef = UndefValue::get(Type::Int32Ty); Ops[1] = BuildVector(Ops[1], Undef, Undef, Undef, NULL); - Result = Builder.CreateCall(pslld, Ops[0], Ops[1], "tmp"); + Result = Builder.CreateCall(pslld, Ops.begin(), Ops.begin()+2, "tmp"); Result = Builder.CreateBitCast(Result, ResultType, "tmp"); return true; } @@ -113,7 +113,7 @@ Function *psllq = Intrinsic::getDeclaration(TheModule, Intrinsic::x86_mmx_psll_q); Ops[1] = BuildVector(Ops[1], UndefValue::get(Type::Int32Ty), NULL); - Result = Builder.CreateCall(psllq, Ops[0], Ops[1], "tmp"); + Result = Builder.CreateCall(psllq, Ops.begin(), Ops.begin()+2, "tmp"); Result = Builder.CreateBitCast(Result, ResultType, "tmp"); return true; } @@ -122,7 +122,7 @@ Intrinsic::getDeclaration(TheModule, Intrinsic::x86_sse2_psll_q); Value *Undef = UndefValue::get(Type::Int32Ty); Ops[1] = BuildVector(Ops[1], Undef, Undef, Undef, NULL); - Result = Builder.CreateCall(psllq, Ops[0], Ops[1], "tmp"); + Result = Builder.CreateCall(psllq, Ops.begin(), Ops.begin()+2, "tmp"); Result = Builder.CreateBitCast(Result, ResultType, "tmp"); return true; } @@ -130,7 +130,7 @@ Function *psrlw = Intrinsic::getDeclaration(TheModule, Intrinsic::x86_mmx_psrl_w); Ops[1] = BuildVector(Ops[1], UndefValue::get(Type::Int32Ty), NULL); - Result = Builder.CreateCall(psrlw, Ops[0], Ops[1], "tmp"); + Result = Builder.CreateCall(psrlw, Ops.begin(), Ops.begin()+2, "tmp"); Result = Builder.CreateBitCast(Result, ResultType, "tmp"); return true; } @@ -139,7 +139,7 @@ Intrinsic::getDeclaration(TheModule, Intrinsic::x86_sse2_psrl_w); Value *Undef = UndefValue::get(Type::Int32Ty); Ops[1] = BuildVector(Ops[1], Undef, Undef, Undef, NULL); - Result = Builder.CreateCall(psrlw, Ops[0], Ops[1], "tmp"); + Result = Builder.CreateCall(psrlw, Ops.begin(), Ops.begin()+2, "tmp"); Result = Builder.CreateBitCast(Result, ResultType, "tmp"); return true; } @@ -147,7 +147,7 @@ Function *psrld = Intrinsic::getDeclaration(TheModule, Intrinsic::x86_mmx_psrl_d); Ops[1] = BuildVector(Ops[1], UndefValue::get(Type::Int32Ty), NULL); - Result = Builder.CreateCall(psrld, Ops[0], Ops[1], "tmp"); + Result = Builder.CreateCall(psrld, Ops.begin(), Ops.begin()+2, "tmp"); Result = Builder.CreateBitCast(Result, ResultType, "tmp"); return true; } @@ -156,7 +156,7 @@ Intrinsic::getDeclaration(TheModule, Intrinsic::x86_sse2_psrl_d); Value *Undef = UndefValue::get(Type::Int32Ty); Ops[1] = BuildVector(Ops[1], Undef, Undef, Undef, NULL); - Result = Builder.CreateCall(psrld, Ops[0], Ops[1], "tmp"); + Result = Builder.CreateCall(psrld, Ops.begin(), Ops.begin()+2, "tmp"); Result = Builder.CreateBitCast(Result, ResultType, "tmp"); return true; } @@ -164,7 +164,7 @@ Function *psrlq = Intrinsic::getDeclaration(TheModule, Intrinsic::x86_mmx_psrl_q); Ops[1] = BuildVector(Ops[1], UndefValue::get(Type::Int32Ty), NULL); - Result = Builder.CreateCall(psrlq, Ops[0], Ops[1], "tmp"); + Result = Builder.CreateCall(psrlq, Ops.begin(), Ops.begin()+2, "tmp"); Result = Builder.CreateBitCast(Result, ResultType, "tmp"); return true; } @@ -173,7 +173,7 @@ Intrinsic::getDeclaration(TheModule, Intrinsic::x86_sse2_psrl_q); Value *Undef = UndefValue::get(Type::Int32Ty); Ops[1] = BuildVector(Ops[1], Undef, Undef, Undef, NULL); - Result = Builder.CreateCall(psrlq, Ops[0], Ops[1], "tmp"); + Result = Builder.CreateCall(psrlq, Ops.begin(), Ops.begin()+2, "tmp"); Result = Builder.CreateBitCast(Result, ResultType, "tmp"); return true; } @@ -181,7 +181,7 @@ Function *psraw = Intrinsic::getDeclaration(TheModule, Intrinsic::x86_mmx_psra_w); Ops[1] = BuildVector(Ops[1], UndefValue::get(Type::Int32Ty), NULL); - Result = Builder.CreateCall(psraw, Ops[0], Ops[1], "tmp"); + Result = Builder.CreateCall(psraw, Ops.begin(), Ops.begin()+2, "tmp"); Result = Builder.CreateBitCast(Result, ResultType, "tmp"); return true; } @@ -190,7 +190,7 @@ Intrinsic::getDeclaration(TheModule, Intrinsic::x86_sse2_psra_w); Value *Undef = UndefValue::get(Type::Int32Ty); Ops[1] = BuildVector(Ops[1], Undef, Undef, Undef, NULL); - Result = Builder.CreateCall(psraw, Ops[0], Ops[1], "tmp"); + Result = Builder.CreateCall(psraw, Ops.begin(), Ops.begin()+2, "tmp"); Result = Builder.CreateBitCast(Result, ResultType, "tmp"); return true; } @@ -198,7 +198,7 @@ Function *psrad = Intrinsic::getDeclaration(TheModule, Intrinsic::x86_mmx_psra_d); Ops[1] = BuildVector(Ops[1], UndefValue::get(Type::Int32Ty), NULL); - Result = Builder.CreateCall(psrad, Ops[0], Ops[1], "tmp"); + Result = Builder.CreateCall(psrad, Ops.begin(), Ops.begin()+2, "tmp"); Result = Builder.CreateBitCast(Result, ResultType, "tmp"); return true; } @@ -207,7 +207,7 @@ Intrinsic::getDeclaration(TheModule, Intrinsic::x86_sse2_psra_d); Value *Undef = UndefValue::get(Type::Int32Ty); Ops[1] = BuildVector(Ops[1], Undef, Undef, Undef, NULL); - Result = Builder.CreateCall(psrad, Ops[0], Ops[1], "tmp"); + Result = Builder.CreateCall(psrad, Ops.begin(), Ops.begin()+2, "tmp"); Result = Builder.CreateBitCast(Result, ResultType, "tmp"); return true; } @@ -489,7 +489,7 @@ Value *Arg1 = Ops[1]; if (flip) std::swap(Arg0, Arg1); Value *CallOps[3] = { Arg0, Arg1, Pred }; - Result = Builder.CreateCall(cmpps, CallOps, 3, "tmp"); + Result = Builder.CreateCall(cmpps, CallOps, CallOps+3, "tmp"); Result = Builder.CreateBitCast(Result, ResultType, "tmp"); return true; } @@ -519,7 +519,7 @@ } Value *Pred = ConstantInt::get(Type::Int8Ty, PredCode); Value *CallOps[3] = { Ops[0], Ops[1], Pred }; - Result = Builder.CreateCall(cmpss, CallOps, 3, "tmp"); + Result = Builder.CreateCall(cmpss, CallOps, CallOps+3, "tmp"); Result = Builder.CreateBitCast(Result, ResultType, "tmp"); return true; } @@ -560,7 +560,7 @@ if (flip) std::swap(Arg0, Arg1); Value *CallOps[3] = { Arg0, Arg1, Pred }; - Result = Builder.CreateCall(cmppd, CallOps, 3, "tmp"); + Result = Builder.CreateCall(cmppd, CallOps, CallOps+3, "tmp"); Result = Builder.CreateBitCast(Result, ResultType, "tmp"); return true; } @@ -588,7 +588,7 @@ } Value *Pred = ConstantInt::get(Type::Int8Ty, PredCode); Value *CallOps[3] = { Ops[0], Ops[1], Pred }; - Result = Builder.CreateCall(cmpsd, CallOps, 3, "tmp"); + Result = Builder.CreateCall(cmpsd, CallOps, CallOps+3, "tmp"); Result = Builder.CreateBitCast(Result, ResultType, "tmp"); return true; } Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=40662&r1=40661&r2=40662&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Tue Jul 31 22:46:49 2007 @@ -739,7 +739,7 @@ if (ExceptionValue) { // Fetch and store exception handler. Value *Arg = Builder.CreateLoad(ExceptionValue, "eh_ptr"); - Builder.CreateCall(FuncUnwindResume, &Arg, 1); + Builder.CreateCall(FuncUnwindResume, Arg); Builder.CreateUnreachable(); } else { new UnwindInst(UnwindBB); @@ -1320,7 +1320,7 @@ Intrinsic::ID IID = (IntPtr == Type::Int32Ty) ? Intrinsic::memcpy_i32 : Intrinsic::memcpy_i64; - Builder.CreateCall(Intrinsic::getDeclaration(TheModule, IID), Ops, 4); + Builder.CreateCall(Intrinsic::getDeclaration(TheModule, IID), Ops, Ops+4); } void TreeToLLVM::EmitMemMove(Value *DestPtr, Value *SrcPtr, Value *Size, @@ -1336,7 +1336,7 @@ Intrinsic::ID IID = (IntPtr == Type::Int32Ty) ? Intrinsic::memmove_i32 : Intrinsic::memmove_i64; - Builder.CreateCall(Intrinsic::getDeclaration(TheModule, IID), Ops, 4); + Builder.CreateCall(Intrinsic::getDeclaration(TheModule, IID), Ops, Ops+4); } void TreeToLLVM::EmitMemSet(Value *DestPtr, Value *SrcVal, Value *Size, @@ -1353,7 +1353,7 @@ Intrinsic::ID IID = (IntPtr == Type::Int32Ty) ? Intrinsic::memset_i32 : Intrinsic::memset_i64; - Builder.CreateCall(Intrinsic::getDeclaration(TheModule, IID), Ops, 4); + Builder.CreateCall(Intrinsic::getDeclaration(TheModule, IID), Ops, Ops+4); } @@ -1487,7 +1487,7 @@ lineNo }; - Builder.CreateCall(annotateFun, Ops, 4); + Builder.CreateCall(annotateFun, Ops, Ops+4); } // Get next annotate attribute. @@ -2091,7 +2091,7 @@ } } - Value *Select = Builder.CreateCall(FuncEHSelector, &Args[0], Args.size(), + Value *Select = Builder.CreateCall(FuncEHSelector, Args.begin(), Args.end(), "eh_select"); Builder.CreateStore(Select, ExceptionSelectorValue); } @@ -2371,7 +2371,7 @@ TypeInfo = BitCastToType(TypeInfo, PointerType::get(Type::Int8Ty)); // Call get eh type id. - Value *TypeID = Builder.CreateCall(FuncEHGetTypeID, &TypeInfo, 1, + Value *TypeID = Builder.CreateCall(FuncEHGetTypeID, TypeInfo, "eh_typeid"); Value *Select = Builder.CreateLoad(ExceptionSelectorValue, "tmp"); @@ -2396,7 +2396,7 @@ TypeInfo = BitCastToType(TypeInfo, PointerType::get(Type::Int8Ty)); // Call get eh type id. - Value *TypeID = Builder.CreateCall(FuncEHGetTypeID, &TypeInfo, 1, + Value *TypeID = Builder.CreateCall(FuncEHGetTypeID, TypeInfo, "eh_typeid"); Value *Select = Builder.CreateLoad(ExceptionSelectorValue, "tmp"); @@ -2810,7 +2810,7 @@ Value *Call; if (!UnwindBlock) { - Call = Builder.CreateCall(Callee, &CallOperands[0], CallOperands.size()); + Call = Builder.CreateCall(Callee, CallOperands.begin(), CallOperands.end()); cast(Call)->setCallingConv(CallingConvention); } else { BasicBlock *NextBlock = new BasicBlock("invcont"); @@ -3652,7 +3652,7 @@ const char *Name = IDENTIFIER_POINTER(DECL_ASSEMBLER_NAME(decl)); InlineAsm *IA = InlineAsm::get(FTy, "", "{"+std::string(Name)+"}", true); - Builder.CreateCall(IA, &RHS, 1); + Builder.CreateCall(IA, RHS); } /// ConvertInlineAsmStr - Convert the specified inline asm string to an LLVM @@ -4058,7 +4058,7 @@ Value *Asm = InlineAsm::get(FTy, NewAsmStr, ConstraintStr, ASM_VOLATILE_P(exp) || !ASM_OUTPUTS(exp)); - CallInst *CV = Builder.CreateCall(Asm, &CallOps[0], CallOps.size(), + CallInst *CV = Builder.CreateCall(Asm, CallOps.begin(), CallOps.end(), StoreCallResultAddr ? "tmp" : ""); // If the call produces a value, store it into the destination. @@ -4381,7 +4381,7 @@ InVal->getType() }; Result = Builder.CreateCall(Intrinsic::getDeclaration(TheModule, Id, Tys, - sizeof(Tys)/sizeof(Tys[0])), + sizeof(Tys)/sizeof(Tys[0])), InVal, "tmp"); return true; @@ -4434,8 +4434,11 @@ case Type::DoubleTyID: Id = Intrinsic::powi_f64; break; } + SmallVector Args; + Args.push_back(Val); + Args.push_back(Pow); return Builder.CreateCall(Intrinsic::getDeclaration(TheModule, Id), - Val, Pow, "tmp"); + Args.begin(), Args.end(), "tmp"); } @@ -4558,7 +4561,7 @@ Value *Ops[3] = { Ptr, ReadWrite, Locality }; Builder.CreateCall(Intrinsic::getDeclaration(TheModule, Intrinsic::prefetch), - Ops, 3); + Ops, Ops+3); return true; } @@ -4720,9 +4723,12 @@ Handler = CastToType(Instruction::BitCast, Handler, PointerType::get(Type::Int8Ty)); + SmallVector Args; + Args.push_back(Offset); + Args.push_back(Handler); Builder.CreateCall(Intrinsic::getDeclaration(TheModule, Intrinsic::eh_return), - Offset, Handler); + Args.begin(), Args.end()); Result = Builder.CreateUnreachable(); EmitBlock(new BasicBlock("")); @@ -4897,11 +4903,12 @@ static const Type *VPTy = PointerType::get(Type::Int8Ty); - Arg1 = CastToType(Instruction::BitCast, Arg1, VPTy); - Arg2 = CastToType(Instruction::BitCast, Arg2, VPTy); + SmallVector Args; + Args.push_back(CastToType(Instruction::BitCast, Arg1, VPTy)); + Args.push_back(CastToType(Instruction::BitCast, Arg2, VPTy)); Builder.CreateCall(Intrinsic::getDeclaration(TheModule, Intrinsic::vacopy), - Arg1, Arg2); + Args.begin(), Args.end()); return true; } Modified: llvm-gcc-4.2/trunk/gcc/llvm-debug.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-debug.cpp?rev=40662&r1=40661&r2=40662&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-debug.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-debug.cpp Tue Jul 31 22:46:49 2007 @@ -36,6 +36,7 @@ #include "llvm/Support/Dwarf.h" #include "llvm/Target/TargetMachine.h" #include "llvm/ADT/StringExtras.h" +#include "llvm/ADT/SmallVector.h" #include "llvm/CodeGen/MachineModuleInfo.h" #include @@ -346,7 +347,10 @@ Value *AllocACast = new BitCastInst(AI, EmpPtr, Name, CurBB); // Call llvm.dbg.declare. - new CallInst(DeclareFn, AllocACast, getCastValueFor(Variable), "", CurBB); + SmallVector Args; + Args.push_back(AllocACast); + Args.push_back(getCastValueFor(Variable)); + new CallInst(DeclareFn, Args.begin(), Args.end(), "", CurBB); } /// EmitStopPoint - Emit a call to llvm.dbg.stoppoint to indicate a change of @@ -377,7 +381,7 @@ ConstantInt::get(Type::Int32Ty, 0), getCastValueFor(Unit) }; - new CallInst(StopPointFn, Args, 3, "", CurBB); + new CallInst(StopPointFn, Args, Args+3, "", CurBB); } /// EmitGlobalVariable - Emit information about a global variable. From greened at obbligato.org Tue Jul 31 22:59:32 2007 From: greened at obbligato.org (David Greene) Date: Wed, 01 Aug 2007 03:59:32 -0000 Subject: [llvm-commits] [llvm] r40663 - in /llvm/trunk: lib/AsmParser/Lexer.cpp.cvs lib/AsmParser/llvmAsmParser.cpp.cvs lib/AsmParser/llvmAsmParser.h.cvs lib/AsmParser/llvmAsmParser.y.cvs tools/llvm-upgrade/UpgradeParser.cpp.cvs tools/llvm-upgrade/UpgradeParser.h.cvs tools/llvm-upgrade/UpgradeParser.y.cvs Message-ID: <200708010359.l713xXXX020565@zion.cs.uiuc.edu> Author: greened Date: Tue Jul 31 22:59:32 2007 New Revision: 40663 URL: http://llvm.org/viewvc/llvm-project?rev=40663&view=rev Log: Update generated files. Modified: llvm/trunk/lib/AsmParser/Lexer.cpp.cvs llvm/trunk/lib/AsmParser/llvmAsmParser.cpp.cvs llvm/trunk/lib/AsmParser/llvmAsmParser.h.cvs llvm/trunk/lib/AsmParser/llvmAsmParser.y.cvs llvm/trunk/tools/llvm-upgrade/UpgradeParser.cpp.cvs llvm/trunk/tools/llvm-upgrade/UpgradeParser.h.cvs llvm/trunk/tools/llvm-upgrade/UpgradeParser.y.cvs Modified: llvm/trunk/lib/AsmParser/Lexer.cpp.cvs URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/Lexer.cpp.cvs?rev=40663&r1=40662&r2=40663&view=diff ============================================================================== --- llvm/trunk/lib/AsmParser/Lexer.cpp.cvs (original) +++ llvm/trunk/lib/AsmParser/Lexer.cpp.cvs Tue Jul 31 22:59:32 2007 @@ -17,7 +17,7 @@ #define yylineno llvmAsmlineno #line 20 "Lexer.cpp" -/* A lexical scanner generated by flex*/ +/* A lexical scanner generated by flex */ /* Scanner skeleton version: * $Header: /home/daffy/u0/vern/flex/RCS/flex.skl,v 2.91 96/09/10 16:58:48 vern Exp $ @@ -153,15 +153,6 @@ #define unput(c) yyunput( c, yytext_ptr ) -/* Some routines like yy_flex_realloc() are emitted as static but are - not called by all lexers. This generates warnings in some compilers, - notably GCC. Arrange to suppress these. */ -#ifdef __GNUC__ -#define YY_MAY_BE_UNUSED __attribute__((unused)) -#else -#define YY_MAY_BE_UNUSED -#endif - /* The following is because we cannot portably get our hands on size_t * (without autoconf's help, which isn't available because we want * flex-generated scanners to compile on their own). @@ -268,7 +259,7 @@ YY_BUFFER_STATE yy_scan_bytes YY_PROTO(( yyconst char *bytes, int len )); static void *yy_flex_alloc YY_PROTO(( yy_size_t )); -static inline void *yy_flex_realloc YY_PROTO(( void *, yy_size_t )) YY_MAY_BE_UNUSED; +static inline void *yy_flex_realloc YY_PROTO(( void *, yy_size_t )); static void yy_flex_free YY_PROTO(( void * )); #define yy_new_buffer yy_create_buffer @@ -909,7 +900,7 @@ #define YY_MORE_ADJ 0 #define YY_RESTORE_YY_MORE_OFFSET char *yytext; -#line 1 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 1 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" #define INITIAL 0 /*===-- Lexer.l - Scanner for llvm assembly files --------------*- C++ -*--===// // @@ -924,7 +915,7 @@ // //===----------------------------------------------------------------------===*/ #define YY_NEVER_INTERACTIVE 1 -#line 28 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 28 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" #include "ParserInternals.h" #include "llvm/Module.h" #include "llvm/Support/MathExtras.h" @@ -1047,7 +1038,7 @@ * it to deal with 64 bit numbers. */ /* WSNL - shorthand for whitespace followed by newline */ -#line 1051 "Lexer.cpp" +#line 1042 "Lexer.cpp" /* Macros after this point can all be overridden by user definitions in * section 1. @@ -1198,10 +1189,10 @@ register char *yy_cp = NULL, *yy_bp = NULL; register int yy_act; -#line 182 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 182 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" -#line 1205 "Lexer.cpp" +#line 1196 "Lexer.cpp" if ( yy_init ) { @@ -1294,262 +1285,262 @@ { /* beginning of action switch */ case 1: YY_RULE_SETUP -#line 184 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 184 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { /* Ignore comments for now */ } YY_BREAK case 2: YY_RULE_SETUP -#line 186 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 186 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return BEGINTOK; } YY_BREAK case 3: YY_RULE_SETUP -#line 187 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 187 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return ENDTOK; } YY_BREAK case 4: YY_RULE_SETUP -#line 188 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 188 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return TRUETOK; } YY_BREAK case 5: YY_RULE_SETUP -#line 189 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 189 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return FALSETOK; } YY_BREAK case 6: YY_RULE_SETUP -#line 190 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 190 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return DECLARE; } YY_BREAK case 7: YY_RULE_SETUP -#line 191 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 191 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return DEFINE; } YY_BREAK case 8: YY_RULE_SETUP -#line 192 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 192 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return GLOBAL; } YY_BREAK case 9: YY_RULE_SETUP -#line 193 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 193 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return CONSTANT; } YY_BREAK case 10: YY_RULE_SETUP -#line 194 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 194 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return INTERNAL; } YY_BREAK case 11: YY_RULE_SETUP -#line 195 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 195 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return LINKONCE; } YY_BREAK case 12: YY_RULE_SETUP -#line 196 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 196 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return WEAK; } YY_BREAK case 13: YY_RULE_SETUP -#line 197 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 197 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return APPENDING; } YY_BREAK case 14: YY_RULE_SETUP -#line 198 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 198 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return DLLIMPORT; } YY_BREAK case 15: YY_RULE_SETUP -#line 199 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 199 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return DLLEXPORT; } YY_BREAK case 16: YY_RULE_SETUP -#line 200 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 200 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return HIDDEN; } YY_BREAK case 17: YY_RULE_SETUP -#line 201 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 201 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return PROTECTED; } YY_BREAK case 18: YY_RULE_SETUP -#line 202 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 202 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return EXTERN_WEAK; } YY_BREAK case 19: YY_RULE_SETUP -#line 203 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 203 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return EXTERNAL; } YY_BREAK case 20: YY_RULE_SETUP -#line 204 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 204 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return THREAD_LOCAL; } YY_BREAK case 21: YY_RULE_SETUP -#line 205 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 205 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return ZEROINITIALIZER; } YY_BREAK case 22: YY_RULE_SETUP -#line 206 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 206 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return DOTDOTDOT; } YY_BREAK case 23: YY_RULE_SETUP -#line 207 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 207 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return UNDEF; } YY_BREAK case 24: YY_RULE_SETUP -#line 208 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 208 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return NULL_TOK; } YY_BREAK case 25: YY_RULE_SETUP -#line 209 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 209 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return TO; } YY_BREAK case 26: YY_RULE_SETUP -#line 210 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 210 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return TAIL; } YY_BREAK case 27: YY_RULE_SETUP -#line 211 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 211 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return TARGET; } YY_BREAK case 28: YY_RULE_SETUP -#line 212 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 212 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return TRIPLE; } YY_BREAK case 29: YY_RULE_SETUP -#line 213 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 213 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return DEPLIBS; } YY_BREAK case 30: YY_RULE_SETUP -#line 214 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 214 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return DATALAYOUT; } YY_BREAK case 31: YY_RULE_SETUP -#line 215 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 215 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return VOLATILE; } YY_BREAK case 32: YY_RULE_SETUP -#line 216 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 216 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return ALIGN; } YY_BREAK case 33: YY_RULE_SETUP -#line 217 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 217 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return SECTION; } YY_BREAK case 34: YY_RULE_SETUP -#line 218 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 218 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return ALIAS; } YY_BREAK case 35: YY_RULE_SETUP -#line 219 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 219 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return MODULE; } YY_BREAK case 36: YY_RULE_SETUP -#line 220 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 220 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return ASM_TOK; } YY_BREAK case 37: YY_RULE_SETUP -#line 221 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 221 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return SIDEEFFECT; } YY_BREAK case 38: YY_RULE_SETUP -#line 223 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 223 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return CC_TOK; } YY_BREAK case 39: YY_RULE_SETUP -#line 224 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 224 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return CCC_TOK; } YY_BREAK case 40: YY_RULE_SETUP -#line 225 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 225 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return FASTCC_TOK; } YY_BREAK case 41: YY_RULE_SETUP -#line 226 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 226 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return COLDCC_TOK; } YY_BREAK case 42: YY_RULE_SETUP -#line 227 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 227 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return X86_STDCALLCC_TOK; } YY_BREAK case 43: YY_RULE_SETUP -#line 228 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 228 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return X86_FASTCALLCC_TOK; } YY_BREAK case 44: YY_RULE_SETUP -#line 230 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 230 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return SIGNEXT; } YY_BREAK case 45: YY_RULE_SETUP -#line 231 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 231 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return ZEROEXT; } YY_BREAK case 46: YY_RULE_SETUP -#line 232 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 232 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return INREG; } YY_BREAK case 47: YY_RULE_SETUP -#line 233 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 233 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return SRET; } YY_BREAK case 48: YY_RULE_SETUP -#line 234 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 234 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return NOUNWIND; } YY_BREAK case 49: YY_RULE_SETUP -#line 235 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 235 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return NORETURN; } YY_BREAK case 50: YY_RULE_SETUP -#line 236 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 236 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return NOALIAS; } YY_BREAK case 51: YY_RULE_SETUP -#line 237 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 237 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return BYVAL; } YY_BREAK case 52: YY_RULE_SETUP -#line 238 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 238 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return NEST; } YY_BREAK case 53: @@ -1557,7 +1548,7 @@ yy_c_buf_p = yy_cp -= 1; YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP -#line 239 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 239 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { // For auto-upgrade only, drop in LLVM 3.0 return SIGNEXT; } YY_BREAK @@ -1566,43 +1557,43 @@ yy_c_buf_p = yy_cp -= 1; YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP -#line 241 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 241 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { // For auto-upgrade only, drop in LLVM 3.0 return ZEROEXT; } YY_BREAK case 55: YY_RULE_SETUP -#line 244 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 244 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { RET_TY(Type::VoidTy, VOID); } YY_BREAK case 56: YY_RULE_SETUP -#line 245 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 245 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { RET_TY(Type::FloatTy, FLOAT); } YY_BREAK case 57: YY_RULE_SETUP -#line 246 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 246 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { RET_TY(Type::DoubleTy,DOUBLE);} YY_BREAK case 58: YY_RULE_SETUP -#line 247 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 247 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { RET_TY(Type::LabelTy, LABEL); } YY_BREAK case 59: YY_RULE_SETUP -#line 248 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 248 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return TYPE; } YY_BREAK case 60: YY_RULE_SETUP -#line 249 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 249 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return OPAQUE; } YY_BREAK case 61: YY_RULE_SETUP -#line 250 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 250 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { uint64_t NumBits = atoull(yytext+1); if (NumBits < IntegerType::MIN_INT_BITS || NumBits > IntegerType::MAX_INT_BITS) @@ -1613,347 +1604,347 @@ YY_BREAK case 62: YY_RULE_SETUP -#line 258 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 258 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { RET_TOK(BinaryOpVal, Add, ADD); } YY_BREAK case 63: YY_RULE_SETUP -#line 259 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 259 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { RET_TOK(BinaryOpVal, Sub, SUB); } YY_BREAK case 64: YY_RULE_SETUP -#line 260 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 260 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { RET_TOK(BinaryOpVal, Mul, MUL); } YY_BREAK case 65: YY_RULE_SETUP -#line 261 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 261 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { RET_TOK(BinaryOpVal, UDiv, UDIV); } YY_BREAK case 66: YY_RULE_SETUP -#line 262 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 262 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { RET_TOK(BinaryOpVal, SDiv, SDIV); } YY_BREAK case 67: YY_RULE_SETUP -#line 263 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 263 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { RET_TOK(BinaryOpVal, FDiv, FDIV); } YY_BREAK case 68: YY_RULE_SETUP -#line 264 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 264 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { RET_TOK(BinaryOpVal, URem, UREM); } YY_BREAK case 69: YY_RULE_SETUP -#line 265 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 265 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { RET_TOK(BinaryOpVal, SRem, SREM); } YY_BREAK case 70: YY_RULE_SETUP -#line 266 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 266 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { RET_TOK(BinaryOpVal, FRem, FREM); } YY_BREAK case 71: YY_RULE_SETUP -#line 267 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 267 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { RET_TOK(BinaryOpVal, Shl, SHL); } YY_BREAK case 72: YY_RULE_SETUP -#line 268 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 268 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { RET_TOK(BinaryOpVal, LShr, LSHR); } YY_BREAK case 73: YY_RULE_SETUP -#line 269 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 269 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { RET_TOK(BinaryOpVal, AShr, ASHR); } YY_BREAK case 74: YY_RULE_SETUP -#line 270 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 270 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { RET_TOK(BinaryOpVal, And, AND); } YY_BREAK case 75: YY_RULE_SETUP -#line 271 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 271 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { RET_TOK(BinaryOpVal, Or , OR ); } YY_BREAK case 76: YY_RULE_SETUP -#line 272 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 272 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { RET_TOK(BinaryOpVal, Xor, XOR); } YY_BREAK case 77: YY_RULE_SETUP -#line 273 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 273 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { RET_TOK(OtherOpVal, ICmp, ICMP); } YY_BREAK case 78: YY_RULE_SETUP -#line 274 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 274 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { RET_TOK(OtherOpVal, FCmp, FCMP); } YY_BREAK case 79: YY_RULE_SETUP -#line 276 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 276 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return EQ; } YY_BREAK case 80: YY_RULE_SETUP -#line 277 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 277 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return NE; } YY_BREAK case 81: YY_RULE_SETUP -#line 278 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 278 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return SLT; } YY_BREAK case 82: YY_RULE_SETUP -#line 279 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 279 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return SGT; } YY_BREAK case 83: YY_RULE_SETUP -#line 280 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 280 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return SLE; } YY_BREAK case 84: YY_RULE_SETUP -#line 281 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 281 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return SGE; } YY_BREAK case 85: YY_RULE_SETUP -#line 282 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 282 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return ULT; } YY_BREAK case 86: YY_RULE_SETUP -#line 283 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 283 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return UGT; } YY_BREAK case 87: YY_RULE_SETUP -#line 284 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 284 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return ULE; } YY_BREAK case 88: YY_RULE_SETUP -#line 285 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 285 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return UGE; } YY_BREAK case 89: YY_RULE_SETUP -#line 286 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 286 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return OEQ; } YY_BREAK case 90: YY_RULE_SETUP -#line 287 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 287 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return ONE; } YY_BREAK case 91: YY_RULE_SETUP -#line 288 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 288 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return OLT; } YY_BREAK case 92: YY_RULE_SETUP -#line 289 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 289 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return OGT; } YY_BREAK case 93: YY_RULE_SETUP -#line 290 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 290 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return OLE; } YY_BREAK case 94: YY_RULE_SETUP -#line 291 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 291 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return OGE; } YY_BREAK case 95: YY_RULE_SETUP -#line 292 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 292 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return ORD; } YY_BREAK case 96: YY_RULE_SETUP -#line 293 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 293 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return UNO; } YY_BREAK case 97: YY_RULE_SETUP -#line 294 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 294 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return UEQ; } YY_BREAK case 98: YY_RULE_SETUP -#line 295 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 295 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return UNE; } YY_BREAK case 99: YY_RULE_SETUP -#line 297 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 297 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { RET_TOK(OtherOpVal, PHI, PHI_TOK); } YY_BREAK case 100: YY_RULE_SETUP -#line 298 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 298 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { RET_TOK(OtherOpVal, Call, CALL); } YY_BREAK case 101: YY_RULE_SETUP -#line 299 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 299 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { RET_TOK(CastOpVal, Trunc, TRUNC); } YY_BREAK case 102: YY_RULE_SETUP -#line 300 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 300 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { RET_TOK(CastOpVal, ZExt, ZEXT); } YY_BREAK case 103: YY_RULE_SETUP -#line 301 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 301 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { RET_TOK(CastOpVal, SExt, SEXT); } YY_BREAK case 104: YY_RULE_SETUP -#line 302 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 302 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { RET_TOK(CastOpVal, FPTrunc, FPTRUNC); } YY_BREAK case 105: YY_RULE_SETUP -#line 303 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 303 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { RET_TOK(CastOpVal, FPExt, FPEXT); } YY_BREAK case 106: YY_RULE_SETUP -#line 304 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 304 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { RET_TOK(CastOpVal, UIToFP, UITOFP); } YY_BREAK case 107: YY_RULE_SETUP -#line 305 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 305 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { RET_TOK(CastOpVal, SIToFP, SITOFP); } YY_BREAK case 108: YY_RULE_SETUP -#line 306 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 306 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { RET_TOK(CastOpVal, FPToUI, FPTOUI); } YY_BREAK case 109: YY_RULE_SETUP -#line 307 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 307 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { RET_TOK(CastOpVal, FPToSI, FPTOSI); } YY_BREAK case 110: YY_RULE_SETUP -#line 308 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 308 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { RET_TOK(CastOpVal, IntToPtr, INTTOPTR); } YY_BREAK case 111: YY_RULE_SETUP -#line 309 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 309 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { RET_TOK(CastOpVal, PtrToInt, PTRTOINT); } YY_BREAK case 112: YY_RULE_SETUP -#line 310 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 310 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { RET_TOK(CastOpVal, BitCast, BITCAST); } YY_BREAK case 113: YY_RULE_SETUP -#line 311 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 311 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { RET_TOK(OtherOpVal, Select, SELECT); } YY_BREAK case 114: YY_RULE_SETUP -#line 312 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 312 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { RET_TOK(OtherOpVal, VAArg , VAARG); } YY_BREAK case 115: YY_RULE_SETUP -#line 313 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 313 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { RET_TOK(TermOpVal, Ret, RET); } YY_BREAK case 116: YY_RULE_SETUP -#line 314 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 314 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { RET_TOK(TermOpVal, Br, BR); } YY_BREAK case 117: YY_RULE_SETUP -#line 315 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 315 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { RET_TOK(TermOpVal, Switch, SWITCH); } YY_BREAK case 118: YY_RULE_SETUP -#line 316 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 316 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { RET_TOK(TermOpVal, Invoke, INVOKE); } YY_BREAK case 119: YY_RULE_SETUP -#line 317 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 317 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { RET_TOK(TermOpVal, Unwind, UNWIND); } YY_BREAK case 120: YY_RULE_SETUP -#line 318 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 318 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { RET_TOK(TermOpVal, Unreachable, UNREACHABLE); } YY_BREAK case 121: YY_RULE_SETUP -#line 320 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 320 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { RET_TOK(MemOpVal, Malloc, MALLOC); } YY_BREAK case 122: YY_RULE_SETUP -#line 321 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 321 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { RET_TOK(MemOpVal, Alloca, ALLOCA); } YY_BREAK case 123: YY_RULE_SETUP -#line 322 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 322 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { RET_TOK(MemOpVal, Free, FREE); } YY_BREAK case 124: YY_RULE_SETUP -#line 323 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 323 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { RET_TOK(MemOpVal, Load, LOAD); } YY_BREAK case 125: YY_RULE_SETUP -#line 324 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 324 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { RET_TOK(MemOpVal, Store, STORE); } YY_BREAK case 126: YY_RULE_SETUP -#line 325 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 325 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { RET_TOK(MemOpVal, GetElementPtr, GETELEMENTPTR); } YY_BREAK case 127: YY_RULE_SETUP -#line 327 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 327 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { RET_TOK(OtherOpVal, ExtractElement, EXTRACTELEMENT); } YY_BREAK case 128: YY_RULE_SETUP -#line 328 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 328 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { RET_TOK(OtherOpVal, InsertElement, INSERTELEMENT); } YY_BREAK case 129: YY_RULE_SETUP -#line 329 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 329 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { RET_TOK(OtherOpVal, ShuffleVector, SHUFFLEVECTOR); } YY_BREAK case 130: YY_RULE_SETUP -#line 332 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 332 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { llvmAsmlval.StrVal = new std::string(yytext+1); // Skip % return LOCALVAR; @@ -1961,7 +1952,7 @@ YY_BREAK case 131: YY_RULE_SETUP -#line 336 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 336 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { llvmAsmlval.StrVal = new std::string(yytext+1); // Skip @ return GLOBALVAR; @@ -1969,7 +1960,7 @@ YY_BREAK case 132: YY_RULE_SETUP -#line 340 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 340 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { yytext[yyleng-1] = 0; // nuke colon llvmAsmlval.StrVal = new std::string(yytext); @@ -1978,7 +1969,7 @@ YY_BREAK case 133: YY_RULE_SETUP -#line 345 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 345 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { yytext[yyleng-2] = 0; // nuke colon, end quote const char* EndChar = UnEscapeLexed(yytext+1, yytext+yyleng); @@ -1989,7 +1980,7 @@ YY_BREAK case 134: YY_RULE_SETUP -#line 353 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 353 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { yytext[yyleng-1] = 0; // nuke end quote const char* EndChar = UnEscapeLexed(yytext+1, yytext+yyleng); llvmAsmlval.StrVal = @@ -1999,7 +1990,7 @@ YY_BREAK case 135: YY_RULE_SETUP -#line 359 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 359 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { yytext[yyleng-1] = 0; // nuke end quote const char* EndChar = @@ -2011,7 +2002,7 @@ YY_BREAK case 136: YY_RULE_SETUP -#line 367 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 367 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { yytext[yyleng-1] = 0; // nuke end quote const char* EndChar = @@ -2023,7 +2014,7 @@ YY_BREAK case 137: YY_RULE_SETUP -#line 375 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 375 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { uint32_t numBits = ((yyleng * 64) / 19) + 1; APInt Tmp(numBits, yytext, yyleng, 10); @@ -2041,7 +2032,7 @@ YY_BREAK case 138: YY_RULE_SETUP -#line 389 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 389 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { uint32_t numBits = (((yyleng-1) * 64) / 19) + 2; APInt Tmp(numBits, yytext, yyleng, 10); @@ -2059,7 +2050,7 @@ YY_BREAK case 139: YY_RULE_SETUP -#line 404 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 404 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { int len = yyleng - 3; uint32_t bits = len * 4; APInt Tmp(bits, yytext+3, len, 16); @@ -2080,7 +2071,7 @@ YY_BREAK case 140: YY_RULE_SETUP -#line 422 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 422 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { uint64_t Val = atoull(yytext+1); if ((unsigned)Val != Val) @@ -2091,7 +2082,7 @@ YY_BREAK case 141: YY_RULE_SETUP -#line 429 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 429 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { uint64_t Val = atoull(yytext+1); if ((unsigned)Val != Val) @@ -2102,16 +2093,16 @@ YY_BREAK case 142: YY_RULE_SETUP -#line 437 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 437 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { llvmAsmlval.FPVal = atof(yytext); return FPVAL; } YY_BREAK case 143: YY_RULE_SETUP -#line 438 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 438 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { llvmAsmlval.FPVal = HexToFP(yytext); return FPVAL; } YY_BREAK case YY_STATE_EOF(INITIAL): -#line 440 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 440 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { /* Make sure to free the internal buffers for flex when we are * done reading our input! @@ -2122,20 +2113,20 @@ YY_BREAK case 144: YY_RULE_SETUP -#line 448 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 448 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { /* Ignore whitespace */ } YY_BREAK case 145: YY_RULE_SETUP -#line 449 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 449 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" { return yytext[0]; } YY_BREAK case 146: YY_RULE_SETUP -#line 451 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 451 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" YY_FATAL_ERROR( "flex scanner jammed" ); YY_BREAK -#line 2139 "Lexer.cpp" +#line 2130 "Lexer.cpp" case YY_END_OF_BUFFER: { @@ -3013,5 +3004,5 @@ return 0; } #endif -#line 451 "/proj/llvm/head/llvm/lib/AsmParser/Lexer.l" +#line 451 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/Lexer.l" Modified: llvm/trunk/lib/AsmParser/llvmAsmParser.cpp.cvs URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/llvmAsmParser.cpp.cvs?rev=40663&r1=40662&r2=40663&view=diff ============================================================================== --- llvm/trunk/lib/AsmParser/llvmAsmParser.cpp.cvs (original) +++ llvm/trunk/lib/AsmParser/llvmAsmParser.cpp.cvs Tue Jul 31 22:59:32 2007 @@ -1,7 +1,7 @@ -/* A Bison parser, made by GNU Bison 2.1. */ +/* A Bison parser, made by GNU Bison 1.875c. */ /* Skeleton parser for Yacc-like parsing with Bison, - Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc. + Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003 Free Software Foundation, Inc. This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by @@ -15,8 +15,8 @@ You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, - Boston, MA 02110-1301, USA. */ + Foundation, Inc., 59 Temple Place - Suite 330, + Boston, MA 02111-1307, USA. */ /* As a special exception, when this file is copied by Bison into a Bison output file, you may use that output file without restriction. @@ -36,9 +36,6 @@ /* Identify Bison output. */ #define YYBISON 1 -/* Bison version. */ -#define YYBISON_VERSION "2.1" - /* Skeleton name. */ #define YYSKELETON_NAME "yacc.c" @@ -48,7 +45,8 @@ /* Using locations. */ #define YYLSP_NEEDED 0 -/* Substitute the variable and function names. */ +/* If NAME_PREFIX is specified substitute the variables and functions + names. */ #define yyparse llvmAsmparse #define yylex llvmAsmlex #define yyerror llvmAsmerror @@ -206,7 +204,6 @@ PROTECTED = 397 }; #endif -/* Tokens. */ #define ESINT64VAL 258 #define EUINT64VAL 259 #define ESAPINTVAL 260 @@ -352,7 +349,7 @@ /* Copy the first part of user declarations. */ -#line 14 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 14 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" #include "ParserInternals.h" #include "llvm/CallingConv.h" @@ -1309,13 +1306,8 @@ # define YYERROR_VERBOSE 0 #endif -/* Enabling the token table. */ -#ifndef YYTOKEN_TABLE -# define YYTOKEN_TABLE 0 -#endif - #if ! defined (YYSTYPE) && ! defined (YYSTYPE_IS_DECLARED) -#line 957 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 957 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" typedef union YYSTYPE { llvm::Module *ModuleVal; llvm::Function *FunctionVal; @@ -1362,8 +1354,8 @@ llvm::ICmpInst::Predicate IPredicate; llvm::FCmpInst::Predicate FPredicate; } YYSTYPE; -/* Line 196 of yacc.c. */ -#line 1367 "llvmAsmParser.tab.c" +/* Line 191 of yacc.c. */ +#line 1359 "llvmAsmParser.tab.c" # define yystype YYSTYPE /* obsolescent; will be withdrawn */ # define YYSTYPE_IS_DECLARED 1 # define YYSTYPE_IS_TRIVIAL 1 @@ -1374,34 +1366,8 @@ /* Copy the second part of user declarations. */ -/* Line 219 of yacc.c. */ -#line 1379 "llvmAsmParser.tab.c" - -#if ! defined (YYSIZE_T) && defined (__SIZE_TYPE__) -# define YYSIZE_T __SIZE_TYPE__ -#endif -#if ! defined (YYSIZE_T) && defined (size_t) -# define YYSIZE_T size_t -#endif -#if ! defined (YYSIZE_T) && (defined (__STDC__) || defined (__cplusplus)) -# include /* INFRINGES ON USER NAME SPACE */ -# define YYSIZE_T size_t -#endif -#if ! defined (YYSIZE_T) -# define YYSIZE_T unsigned int -#endif - -#ifndef YY_ -# if YYENABLE_NLS -# if ENABLE_NLS -# include /* INFRINGES ON USER NAME SPACE */ -# define YY_(msgid) dgettext ("bison-runtime", msgid) -# endif -# endif -# ifndef YY_ -# define YY_(msgid) msgid -# endif -#endif +/* Line 214 of yacc.c. */ +#line 1371 "llvmAsmParser.tab.c" #if ! defined (yyoverflow) || YYERROR_VERBOSE @@ -1409,14 +1375,14 @@ # ifdef YYSTACK_USE_ALLOCA # if YYSTACK_USE_ALLOCA +# define YYSTACK_ALLOC alloca +# endif +# else +# if defined (alloca) || defined (_ALLOCA_H) +# define YYSTACK_ALLOC alloca +# else # ifdef __GNUC__ # define YYSTACK_ALLOC __builtin_alloca -# else -# define YYSTACK_ALLOC alloca -# if defined (__STDC__) || defined (__cplusplus) -# include /* INFRINGES ON USER NAME SPACE */ -# define YYINCLUDED_STDLIB_H -# endif # endif # endif # endif @@ -1424,39 +1390,13 @@ # ifdef YYSTACK_ALLOC /* Pacify GCC's `empty if-body' warning. */ # define YYSTACK_FREE(Ptr) do { /* empty */; } while (0) -# ifndef YYSTACK_ALLOC_MAXIMUM - /* The OS might guarantee only one guard page at the bottom of the stack, - and a page size can be as small as 4096 bytes. So we cannot safely - invoke alloca (N) if N exceeds 4096. Use a slightly smaller number - to allow for a few compiler-allocated temporary stack slots. */ -# define YYSTACK_ALLOC_MAXIMUM 4032 /* reasonable circa 2005 */ -# endif # else -# define YYSTACK_ALLOC YYMALLOC -# define YYSTACK_FREE YYFREE -# ifndef YYSTACK_ALLOC_MAXIMUM -# define YYSTACK_ALLOC_MAXIMUM ((YYSIZE_T) -1) -# endif -# ifdef __cplusplus -extern "C" { -# endif -# ifndef YYMALLOC -# define YYMALLOC malloc -# if (! defined (malloc) && ! defined (YYINCLUDED_STDLIB_H) \ - && (defined (__STDC__) || defined (__cplusplus))) -void *malloc (YYSIZE_T); /* INFRINGES ON USER NAME SPACE */ -# endif -# endif -# ifndef YYFREE -# define YYFREE free -# if (! defined (free) && ! defined (YYINCLUDED_STDLIB_H) \ - && (defined (__STDC__) || defined (__cplusplus))) -void free (void *); /* INFRINGES ON USER NAME SPACE */ -# endif -# endif -# ifdef __cplusplus -} +# if defined (__STDC__) || defined (__cplusplus) +# include /* INFRINGES ON USER NAME SPACE */ +# define YYSIZE_T size_t # endif +# define YYSTACK_ALLOC malloc +# define YYSTACK_FREE free # endif #endif /* ! defined (yyoverflow) || YYERROR_VERBOSE */ @@ -1468,7 +1408,7 @@ /* A type that is properly aligned for any stack member. */ union yyalloc { - short int yyss; + short yyss; YYSTYPE yyvs; }; @@ -1478,7 +1418,7 @@ /* The size of an array large to enough to hold all stacks, each with N elements. */ # define YYSTACK_BYTES(N) \ - ((N) * (sizeof (short int) + sizeof (YYSTYPE)) \ + ((N) * (sizeof (short) + sizeof (YYSTYPE)) \ + YYSTACK_GAP_MAXIMUM) /* Copy COUNT objects from FROM to TO. The source and destination do @@ -1491,7 +1431,7 @@ # define YYCOPY(To, From, Count) \ do \ { \ - YYSIZE_T yyi; \ + register YYSIZE_T yyi; \ for (yyi = 0; yyi < (Count); yyi++) \ (To)[yyi] = (From)[yyi]; \ } \ @@ -1520,7 +1460,7 @@ #if defined (__STDC__) || defined (__cplusplus) typedef signed char yysigned_char; #else - typedef short int yysigned_char; + typedef short yysigned_char; #endif /* YYFINAL -- State number of the termination state. */ @@ -1541,7 +1481,7 @@ #define YYUNDEFTOK 2 #define YYMAXUTOK 397 -#define YYTRANSLATE(YYX) \ +#define YYTRANSLATE(YYX) \ ((unsigned int) (YYX) <= YYMAXUTOK ? yytranslate[YYX] : YYUNDEFTOK) /* YYTRANSLATE[YYLEX] -- Bison symbol number corresponding to YYLEX. */ @@ -1592,7 +1532,7 @@ #if YYDEBUG /* YYPRHS[YYN] -- Index of the first RHS symbol of rule number YYN in YYRHS. */ -static const unsigned short int yyprhs[] = +static const unsigned short yyprhs[] = { 0, 0, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, @@ -1628,7 +1568,7 @@ }; /* YYRHS -- A `-1'-separated list of the rules' RHS. */ -static const short int yyrhs[] = +static const short yyrhs[] = { 201, 0, -1, 70, -1, 71, -1, 72, -1, 73, -1, 74, -1, 75, -1, 76, -1, 77, -1, 78, @@ -1729,7 +1669,7 @@ }; /* YYRLINE[YYN] -- source line where rule number YYN was defined. */ -static const unsigned short int yyrline[] = +static const unsigned short yyrline[] = { 0, 1116, 1116, 1116, 1116, 1116, 1116, 1116, 1116, 1116, 1116, 1117, 1117, 1117, 1117, 1117, 1117, 1118, 1118, 1118, @@ -1765,8 +1705,8 @@ }; #endif -#if YYDEBUG || YYERROR_VERBOSE || YYTOKEN_TABLE -/* YYTNAME[SYMBOL-NUM] -- String name of the symbol SYMBOL-NUM. +#if YYDEBUG || YYERROR_VERBOSE +/* YYTNME[SYMBOL-NUM] -- String name of the symbol SYMBOL-NUM. First, the terminals, then, starting at YYNTOKENS, nonterminals. */ static const char *const yytname[] = { @@ -1818,7 +1758,7 @@ # ifdef YYPRINT /* YYTOKNUM[YYLEX-NUM] -- Internal token number corresponding to token YYLEX-NUM. */ -static const unsigned short int yytoknum[] = +static const unsigned short yytoknum[] = { 0, 256, 257, 258, 259, 260, 261, 262, 263, 264, 265, 266, 267, 268, 269, 270, 271, 272, 273, 274, @@ -1914,7 +1854,7 @@ /* YYDEFACT[STATE-NAME] -- Default rule to reduce with in state STATE-NUM when YYTABLE doesn't specify something else to do. Zero means the default is an error. */ -static const unsigned short int yydefact[] = +static const unsigned short yydefact[] = { 68, 58, 65, 59, 66, 60, 200, 198, 0, 0, 0, 0, 0, 0, 78, 67, 0, 68, 196, 82, @@ -1978,7 +1918,7 @@ }; /* YYDEFGOTO[NTERM-NUM]. */ -static const short int yydefgoto[] = +static const short yydefgoto[] = { -1, 252, 253, 254, 278, 295, 152, 153, 75, 505, 12, 76, 14, 15, 40, 41, 42, 47, 53, 113, @@ -1994,7 +1934,7 @@ /* YYPACT[STATE-NUM] -- Index in YYTABLE of the portion describing STATE-NUM. */ #define YYPACT_NINF -522 -static const short int yypact[] = +static const short yypact[] = { 40, -522, -522, -522, -522, -522, -522, -522, -24, -105, -4, -80, 60, -32, 461, -522, 134, 1386, -522, 153, @@ -2058,7 +1998,7 @@ }; /* YYPGOTO[NTERM-NUM]. */ -static const short int yypgoto[] = +static const short yypgoto[] = { -522, 370, 372, 373, 266, 255, -164, -522, 0, -25, 420, 9, -522, -522, -522, -522, 33, -522, -522, -522, @@ -2076,7 +2016,7 @@ number is the opposite. If zero, do what YYDEFACT says. If YYTABLE_NINF, syntax error. */ #define YYTABLE_NINF -196 -static const short int yytable[] = +static const short yytable[] = { 11, 78, 266, 329, 255, 298, 377, 230, 157, 13, 101, 87, 158, 265, 256, 265, 267, 11, 467, 90, @@ -2236,7 +2176,7 @@ 205, 206, 207, 208 }; -static const short int yycheck[] = +static const short yycheck[] = { 0, 27, 166, 226, 154, 189, 297, 147, 123, 0, 4, 18, 25, 11, 154, 11, 167, 17, 422, 26, @@ -2461,6 +2401,22 @@ 144, 224, 224, 14, 68, 224, 14, 224 }; +#if ! defined (YYSIZE_T) && defined (__SIZE_TYPE__) +# define YYSIZE_T __SIZE_TYPE__ +#endif +#if ! defined (YYSIZE_T) && defined (size_t) +# define YYSIZE_T size_t +#endif +#if ! defined (YYSIZE_T) +# if defined (__STDC__) || defined (__cplusplus) +# include /* INFRINGES ON USER NAME SPACE */ +# define YYSIZE_T size_t +# endif +#endif +#if ! defined (YYSIZE_T) +# define YYSIZE_T unsigned int +#endif + #define yyerrok (yyerrstatus = 0) #define yyclearin (yychar = YYEMPTY) #define YYEMPTY (-2) @@ -2490,59 +2446,26 @@ goto yybackup; \ } \ else \ - { \ - yyerror (YY_("syntax error: cannot back up")); \ + { \ + yyerror ("syntax error: cannot back up");\ YYERROR; \ } \ while (0) - #define YYTERROR 1 #define YYERRCODE 256 +/* YYLLOC_DEFAULT -- Compute the default location (before the actions + are run). */ -/* YYLLOC_DEFAULT -- Set CURRENT to span from RHS[1] to RHS[N]. - If N is 0, then set CURRENT to the empty location which ends - the previous symbol: RHS[0] (always defined). */ - -#define YYRHSLOC(Rhs, K) ((Rhs)[K]) #ifndef YYLLOC_DEFAULT -# define YYLLOC_DEFAULT(Current, Rhs, N) \ - do \ - if (N) \ - { \ - (Current).first_line = YYRHSLOC (Rhs, 1).first_line; \ - (Current).first_column = YYRHSLOC (Rhs, 1).first_column; \ - (Current).last_line = YYRHSLOC (Rhs, N).last_line; \ - (Current).last_column = YYRHSLOC (Rhs, N).last_column; \ - } \ - else \ - { \ - (Current).first_line = (Current).last_line = \ - YYRHSLOC (Rhs, 0).last_line; \ - (Current).first_column = (Current).last_column = \ - YYRHSLOC (Rhs, 0).last_column; \ - } \ - while (0) -#endif - - -/* YY_LOCATION_PRINT -- Print the location on the stream. - This macro was not mandated originally: define only if we know - we won't break user code: when these are the locations we know. */ - -#ifndef YY_LOCATION_PRINT -# if YYLTYPE_IS_TRIVIAL -# define YY_LOCATION_PRINT(File, Loc) \ - fprintf (File, "%d.%d-%d.%d", \ - (Loc).first_line, (Loc).first_column, \ - (Loc).last_line, (Loc).last_column) -# else -# define YY_LOCATION_PRINT(File, Loc) ((void) 0) -# endif +# define YYLLOC_DEFAULT(Current, Rhs, N) \ + ((Current).first_line = (Rhs)[1].first_line, \ + (Current).first_column = (Rhs)[1].first_column, \ + (Current).last_line = (Rhs)[N].last_line, \ + (Current).last_column = (Rhs)[N].last_column) #endif - /* YYLEX -- calling `yylex' with the right arguments. */ #ifdef YYLEX_PARAM @@ -2565,13 +2488,19 @@ YYFPRINTF Args; \ } while (0) -# define YY_SYMBOL_PRINT(Title, Type, Value, Location) \ +# define YYDSYMPRINT(Args) \ +do { \ + if (yydebug) \ + yysymprint Args; \ +} while (0) + +# define YYDSYMPRINTF(Title, Token, Value, Location) \ do { \ if (yydebug) \ { \ YYFPRINTF (stderr, "%s ", Title); \ - yysymprint (stderr, \ - Type, Value); \ + yysymprint (stderr, \ + Token, Value); \ YYFPRINTF (stderr, "\n"); \ } \ } while (0) @@ -2583,12 +2512,12 @@ #if defined (__STDC__) || defined (__cplusplus) static void -yy_stack_print (short int *bottom, short int *top) +yy_stack_print (short *bottom, short *top) #else static void yy_stack_print (bottom, top) - short int *bottom; - short int *top; + short *bottom; + short *top; #endif { YYFPRINTF (stderr, "Stack now"); @@ -2618,13 +2547,13 @@ #endif { int yyi; - unsigned long int yylno = yyrline[yyrule]; - YYFPRINTF (stderr, "Reducing stack by rule %d (line %lu), ", + unsigned int yylno = yyrline[yyrule]; + YYFPRINTF (stderr, "Reducing stack by rule %d (line %u), ", yyrule - 1, yylno); /* Print the symbols being reduced, and their result. */ for (yyi = yyprhs[yyrule]; 0 <= yyrhs[yyi]; yyi++) - YYFPRINTF (stderr, "%s ", yytname[yyrhs[yyi]]); - YYFPRINTF (stderr, "-> %s\n", yytname[yyr1[yyrule]]); + YYFPRINTF (stderr, "%s ", yytname [yyrhs[yyi]]); + YYFPRINTF (stderr, "-> %s\n", yytname [yyr1[yyrule]]); } # define YY_REDUCE_PRINT(Rule) \ @@ -2638,7 +2567,8 @@ int yydebug; #else /* !YYDEBUG */ # define YYDPRINTF(Args) -# define YY_SYMBOL_PRINT(Title, Type, Value, Location) +# define YYDSYMPRINT(Args) +# define YYDSYMPRINTF(Title, Token, Value, Location) # define YY_STACK_PRINT(Bottom, Top) # define YY_REDUCE_PRINT(Rule) #endif /* !YYDEBUG */ @@ -2653,9 +2583,13 @@ if the built-in stack extension method is used). Do not make this value too large; the results are undefined if - YYSTACK_ALLOC_MAXIMUM < YYSTACK_BYTES (YYMAXDEPTH) + SIZE_MAX < YYSTACK_BYTES (YYMAXDEPTH) evaluated with infinite-precision integer arithmetic. */ +#if defined (YYMAXDEPTH) && YYMAXDEPTH == 0 +# undef YYMAXDEPTH +#endif + #ifndef YYMAXDEPTH # define YYMAXDEPTH 10000 #endif @@ -2677,7 +2611,7 @@ const char *yystr; # endif { - const char *yys = yystr; + register const char *yys = yystr; while (*yys++ != '\0') continue; @@ -2702,8 +2636,8 @@ const char *yysrc; # endif { - char *yyd = yydest; - const char *yys = yysrc; + register char *yyd = yydest; + register const char *yys = yysrc; while ((*yyd++ = *yys++) != '\0') continue; @@ -2713,55 +2647,7 @@ # endif # endif -# ifndef yytnamerr -/* Copy to YYRES the contents of YYSTR after stripping away unnecessary - quotes and backslashes, so that it's suitable for yyerror. The - heuristic is that double-quoting is unnecessary unless the string - contains an apostrophe, a comma, or backslash (other than - backslash-backslash). YYSTR is taken from yytname. If YYRES is - null, do not copy; instead, return the length of what the result - would have been. */ -static YYSIZE_T -yytnamerr (char *yyres, const char *yystr) -{ - if (*yystr == '"') - { - size_t yyn = 0; - char const *yyp = yystr; - - for (;;) - switch (*++yyp) - { - case '\'': - case ',': - goto do_not_strip_quotes; - - case '\\': - if (*++yyp != '\\') - goto do_not_strip_quotes; - /* Fall through. */ - default: - if (yyres) - yyres[yyn] = *yyp; - yyn++; - break; - - case '"': - if (yyres) - yyres[yyn] = '\0'; - return yyn; - } - do_not_strip_quotes: ; - } - - if (! yyres) - return yystrlen (yystr); - - return yystpcpy (yyres, yystr) - yyres; -} -# endif - -#endif /* YYERROR_VERBOSE */ +#endif /* !YYERROR_VERBOSE */ @@ -2785,15 +2671,15 @@ (void) yyvaluep; if (yytype < YYNTOKENS) - YYFPRINTF (yyoutput, "token %s (", yytname[yytype]); + { + YYFPRINTF (yyoutput, "token %s (", yytname[yytype]); +# ifdef YYPRINT + YYPRINT (yyoutput, yytoknum[yytype], *yyvaluep); +# endif + } else YYFPRINTF (yyoutput, "nterm %s (", yytname[yytype]); - -# ifdef YYPRINT - if (yytype < YYNTOKENS) - YYPRINT (yyoutput, yytoknum[yytype], *yyvaluep); -# endif switch (yytype) { default: @@ -2809,11 +2695,10 @@ #if defined (__STDC__) || defined (__cplusplus) static void -yydestruct (const char *yymsg, int yytype, YYSTYPE *yyvaluep) +yydestruct (int yytype, YYSTYPE *yyvaluep) #else static void -yydestruct (yymsg, yytype, yyvaluep) - const char *yymsg; +yydestruct (yytype, yyvaluep) int yytype; YYSTYPE *yyvaluep; #endif @@ -2821,10 +2706,6 @@ /* Pacify ``unused variable'' warnings. */ (void) yyvaluep; - if (!yymsg) - yymsg = "Deleting"; - YY_SYMBOL_PRINT (yymsg, yytype, yyvaluep, yylocationp); - switch (yytype) { @@ -2852,10 +2733,10 @@ -/* The look-ahead symbol. */ +/* The lookahead symbol. */ int yychar; -/* The semantic value of the look-ahead symbol. */ +/* The semantic value of the lookahead symbol. */ YYSTYPE yylval; /* Number of syntax errors so far. */ @@ -2886,12 +2767,12 @@ #endif { - int yystate; - int yyn; + register int yystate; + register int yyn; int yyresult; /* Number of tokens to shift before error messages enabled. */ int yyerrstatus; - /* Look-ahead token as an internal (translated) token number. */ + /* Lookahead token as an internal (translated) token number. */ int yytoken = 0; /* Three stacks and their tools: @@ -2903,14 +2784,14 @@ to reallocate them elsewhere. */ /* The state stack. */ - short int yyssa[YYINITDEPTH]; - short int *yyss = yyssa; - short int *yyssp; + short yyssa[YYINITDEPTH]; + short *yyss = yyssa; + register short *yyssp; /* The semantic value stack. */ YYSTYPE yyvsa[YYINITDEPTH]; YYSTYPE *yyvs = yyvsa; - YYSTYPE *yyvsp; + register YYSTYPE *yyvsp; @@ -2967,14 +2848,14 @@ these so that the &'s don't force the real ones into memory. */ YYSTYPE *yyvs1 = yyvs; - short int *yyss1 = yyss; + short *yyss1 = yyss; /* Each stack pointer address is followed by the size of the data in use in that stack, in bytes. This used to be a conditional around just the two extra args, but that might be undefined if yyoverflow is a macro. */ - yyoverflow (YY_("memory exhausted"), + yyoverflow ("parser stack overflow", &yyss1, yysize * sizeof (*yyssp), &yyvs1, yysize * sizeof (*yyvsp), @@ -2985,21 +2866,21 @@ } #else /* no yyoverflow */ # ifndef YYSTACK_RELOCATE - goto yyexhaustedlab; + goto yyoverflowlab; # else /* Extend the stack our own way. */ if (YYMAXDEPTH <= yystacksize) - goto yyexhaustedlab; + goto yyoverflowlab; yystacksize *= 2; if (YYMAXDEPTH < yystacksize) yystacksize = YYMAXDEPTH; { - short int *yyss1 = yyss; + short *yyss1 = yyss; union yyalloc *yyptr = (union yyalloc *) YYSTACK_ALLOC (YYSTACK_BYTES (yystacksize)); if (! yyptr) - goto yyexhaustedlab; + goto yyoverflowlab; YYSTACK_RELOCATE (yyss); YYSTACK_RELOCATE (yyvs); @@ -3031,18 +2912,18 @@ yybackup: /* Do appropriate processing given the current state. */ -/* Read a look-ahead token if we need one and don't already have one. */ +/* Read a lookahead token if we need one and don't already have one. */ /* yyresume: */ - /* First try to decide what to do without reference to look-ahead token. */ + /* First try to decide what to do without reference to lookahead token. */ yyn = yypact[yystate]; if (yyn == YYPACT_NINF) goto yydefault; - /* Not known => get a look-ahead token if don't already have one. */ + /* Not known => get a lookahead token if don't already have one. */ - /* YYCHAR is either YYEMPTY or YYEOF or a valid look-ahead symbol. */ + /* YYCHAR is either YYEMPTY or YYEOF or a valid lookahead symbol. */ if (yychar == YYEMPTY) { YYDPRINTF ((stderr, "Reading a token: ")); @@ -3057,7 +2938,7 @@ else { yytoken = YYTRANSLATE (yychar); - YY_SYMBOL_PRINT ("Next token is", yytoken, &yylval, &yylloc); + YYDSYMPRINTF ("Next token is", yytoken, &yylval, &yylloc); } /* If the proper action on seeing token YYTOKEN is to reduce or to @@ -3077,8 +2958,8 @@ if (yyn == YYFINAL) YYACCEPT; - /* Shift the look-ahead token. */ - YY_SYMBOL_PRINT ("Shifting", yytoken, &yylval, &yylloc); + /* Shift the lookahead token. */ + YYDPRINTF ((stderr, "Shifting token %s, ", yytname[yytoken])); /* Discard the token being shifted unless it is eof. */ if (yychar != YYEOF) @@ -3128,555 +3009,555 @@ switch (yyn) { case 29: -#line 1122 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.IPredicate) = ICmpInst::ICMP_EQ; ;} +#line 1122 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.IPredicate = ICmpInst::ICMP_EQ; ;} break; case 30: -#line 1122 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.IPredicate) = ICmpInst::ICMP_NE; ;} +#line 1122 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.IPredicate = ICmpInst::ICMP_NE; ;} break; case 31: -#line 1123 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.IPredicate) = ICmpInst::ICMP_SLT; ;} +#line 1123 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.IPredicate = ICmpInst::ICMP_SLT; ;} break; case 32: -#line 1123 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.IPredicate) = ICmpInst::ICMP_SGT; ;} +#line 1123 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.IPredicate = ICmpInst::ICMP_SGT; ;} break; case 33: -#line 1124 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.IPredicate) = ICmpInst::ICMP_SLE; ;} +#line 1124 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.IPredicate = ICmpInst::ICMP_SLE; ;} break; case 34: -#line 1124 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.IPredicate) = ICmpInst::ICMP_SGE; ;} +#line 1124 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.IPredicate = ICmpInst::ICMP_SGE; ;} break; case 35: -#line 1125 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.IPredicate) = ICmpInst::ICMP_ULT; ;} +#line 1125 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.IPredicate = ICmpInst::ICMP_ULT; ;} break; case 36: -#line 1125 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.IPredicate) = ICmpInst::ICMP_UGT; ;} +#line 1125 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.IPredicate = ICmpInst::ICMP_UGT; ;} break; case 37: -#line 1126 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.IPredicate) = ICmpInst::ICMP_ULE; ;} +#line 1126 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.IPredicate = ICmpInst::ICMP_ULE; ;} break; case 38: -#line 1126 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.IPredicate) = ICmpInst::ICMP_UGE; ;} +#line 1126 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.IPredicate = ICmpInst::ICMP_UGE; ;} break; case 39: -#line 1130 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.FPredicate) = FCmpInst::FCMP_OEQ; ;} +#line 1130 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.FPredicate = FCmpInst::FCMP_OEQ; ;} break; case 40: -#line 1130 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.FPredicate) = FCmpInst::FCMP_ONE; ;} +#line 1130 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.FPredicate = FCmpInst::FCMP_ONE; ;} break; case 41: -#line 1131 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.FPredicate) = FCmpInst::FCMP_OLT; ;} +#line 1131 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.FPredicate = FCmpInst::FCMP_OLT; ;} break; case 42: -#line 1131 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.FPredicate) = FCmpInst::FCMP_OGT; ;} +#line 1131 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.FPredicate = FCmpInst::FCMP_OGT; ;} break; case 43: -#line 1132 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.FPredicate) = FCmpInst::FCMP_OLE; ;} +#line 1132 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.FPredicate = FCmpInst::FCMP_OLE; ;} break; case 44: -#line 1132 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.FPredicate) = FCmpInst::FCMP_OGE; ;} +#line 1132 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.FPredicate = FCmpInst::FCMP_OGE; ;} break; case 45: -#line 1133 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.FPredicate) = FCmpInst::FCMP_ORD; ;} +#line 1133 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.FPredicate = FCmpInst::FCMP_ORD; ;} break; case 46: -#line 1133 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.FPredicate) = FCmpInst::FCMP_UNO; ;} +#line 1133 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.FPredicate = FCmpInst::FCMP_UNO; ;} break; case 47: -#line 1134 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.FPredicate) = FCmpInst::FCMP_UEQ; ;} +#line 1134 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.FPredicate = FCmpInst::FCMP_UEQ; ;} break; case 48: -#line 1134 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.FPredicate) = FCmpInst::FCMP_UNE; ;} +#line 1134 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.FPredicate = FCmpInst::FCMP_UNE; ;} break; case 49: -#line 1135 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.FPredicate) = FCmpInst::FCMP_ULT; ;} +#line 1135 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.FPredicate = FCmpInst::FCMP_ULT; ;} break; case 50: -#line 1135 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.FPredicate) = FCmpInst::FCMP_UGT; ;} +#line 1135 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.FPredicate = FCmpInst::FCMP_UGT; ;} break; case 51: -#line 1136 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.FPredicate) = FCmpInst::FCMP_ULE; ;} +#line 1136 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.FPredicate = FCmpInst::FCMP_ULE; ;} break; case 52: -#line 1136 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.FPredicate) = FCmpInst::FCMP_UGE; ;} +#line 1136 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.FPredicate = FCmpInst::FCMP_UGE; ;} break; case 53: -#line 1137 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.FPredicate) = FCmpInst::FCMP_TRUE; ;} +#line 1137 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.FPredicate = FCmpInst::FCMP_TRUE; ;} break; case 54: -#line 1138 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.FPredicate) = FCmpInst::FCMP_FALSE; ;} +#line 1138 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.FPredicate = FCmpInst::FCMP_FALSE; ;} break; case 62: -#line 1147 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.StrVal) = 0; ;} +#line 1147 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.StrVal = 0; ;} break; case 63: -#line 1151 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1151 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - (yyval.StrVal) = (yyvsp[-1].StrVal); + yyval.StrVal = yyvsp[-1].StrVal; CHECK_FOR_ERROR ;} break; case 64: -#line 1155 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1155 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - (yyval.StrVal) = 0; + yyval.StrVal = 0; CHECK_FOR_ERROR ;} break; case 68: -#line 1163 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1163 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - (yyval.StrVal) = 0; + yyval.StrVal = 0; CHECK_FOR_ERROR ;} break; case 69: -#line 1168 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1168 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - (yyval.StrVal) = (yyvsp[-1].StrVal); + yyval.StrVal = yyvsp[-1].StrVal; CHECK_FOR_ERROR ;} break; case 70: -#line 1174 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.Linkage) = GlobalValue::InternalLinkage; ;} +#line 1174 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.Linkage = GlobalValue::InternalLinkage; ;} break; case 71: -#line 1175 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.Linkage) = GlobalValue::WeakLinkage; ;} +#line 1175 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.Linkage = GlobalValue::WeakLinkage; ;} break; case 72: -#line 1176 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.Linkage) = GlobalValue::LinkOnceLinkage; ;} +#line 1176 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.Linkage = GlobalValue::LinkOnceLinkage; ;} break; case 73: -#line 1177 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.Linkage) = GlobalValue::AppendingLinkage; ;} +#line 1177 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.Linkage = GlobalValue::AppendingLinkage; ;} break; case 74: -#line 1178 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.Linkage) = GlobalValue::DLLExportLinkage; ;} +#line 1178 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.Linkage = GlobalValue::DLLExportLinkage; ;} break; case 75: -#line 1182 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.Linkage) = GlobalValue::DLLImportLinkage; ;} +#line 1182 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.Linkage = GlobalValue::DLLImportLinkage; ;} break; case 76: -#line 1183 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.Linkage) = GlobalValue::ExternalWeakLinkage; ;} +#line 1183 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.Linkage = GlobalValue::ExternalWeakLinkage; ;} break; case 77: -#line 1184 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.Linkage) = GlobalValue::ExternalLinkage; ;} +#line 1184 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.Linkage = GlobalValue::ExternalLinkage; ;} break; case 78: -#line 1188 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.Visibility) = GlobalValue::DefaultVisibility; ;} +#line 1188 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.Visibility = GlobalValue::DefaultVisibility; ;} break; case 79: -#line 1189 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.Visibility) = GlobalValue::DefaultVisibility; ;} +#line 1189 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.Visibility = GlobalValue::DefaultVisibility; ;} break; case 80: -#line 1190 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.Visibility) = GlobalValue::HiddenVisibility; ;} +#line 1190 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.Visibility = GlobalValue::HiddenVisibility; ;} break; case 81: -#line 1191 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.Visibility) = GlobalValue::ProtectedVisibility; ;} +#line 1191 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.Visibility = GlobalValue::ProtectedVisibility; ;} break; case 82: -#line 1195 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.Linkage) = GlobalValue::ExternalLinkage; ;} +#line 1195 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.Linkage = GlobalValue::ExternalLinkage; ;} break; case 83: -#line 1196 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.Linkage) = GlobalValue::DLLImportLinkage; ;} +#line 1196 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.Linkage = GlobalValue::DLLImportLinkage; ;} break; case 84: -#line 1197 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.Linkage) = GlobalValue::ExternalWeakLinkage; ;} +#line 1197 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.Linkage = GlobalValue::ExternalWeakLinkage; ;} break; case 85: -#line 1201 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.Linkage) = GlobalValue::ExternalLinkage; ;} +#line 1201 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.Linkage = GlobalValue::ExternalLinkage; ;} break; case 86: -#line 1202 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.Linkage) = GlobalValue::InternalLinkage; ;} +#line 1202 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.Linkage = GlobalValue::InternalLinkage; ;} break; case 87: -#line 1203 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.Linkage) = GlobalValue::LinkOnceLinkage; ;} +#line 1203 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.Linkage = GlobalValue::LinkOnceLinkage; ;} break; case 88: -#line 1204 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.Linkage) = GlobalValue::WeakLinkage; ;} +#line 1204 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.Linkage = GlobalValue::WeakLinkage; ;} break; case 89: -#line 1205 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.Linkage) = GlobalValue::DLLExportLinkage; ;} +#line 1205 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.Linkage = GlobalValue::DLLExportLinkage; ;} break; case 90: -#line 1209 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.Linkage) = GlobalValue::ExternalLinkage; ;} +#line 1209 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.Linkage = GlobalValue::ExternalLinkage; ;} break; case 91: -#line 1210 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.Linkage) = GlobalValue::WeakLinkage; ;} +#line 1210 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.Linkage = GlobalValue::WeakLinkage; ;} break; case 92: -#line 1211 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.Linkage) = GlobalValue::InternalLinkage; ;} +#line 1211 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.Linkage = GlobalValue::InternalLinkage; ;} break; case 93: -#line 1214 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.UIntVal) = CallingConv::C; ;} +#line 1214 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.UIntVal = CallingConv::C; ;} break; case 94: -#line 1215 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.UIntVal) = CallingConv::C; ;} +#line 1215 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.UIntVal = CallingConv::C; ;} break; case 95: -#line 1216 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.UIntVal) = CallingConv::Fast; ;} +#line 1216 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.UIntVal = CallingConv::Fast; ;} break; case 96: -#line 1217 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.UIntVal) = CallingConv::Cold; ;} +#line 1217 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.UIntVal = CallingConv::Cold; ;} break; case 97: -#line 1218 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.UIntVal) = CallingConv::X86_StdCall; ;} +#line 1218 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.UIntVal = CallingConv::X86_StdCall; ;} break; case 98: -#line 1219 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.UIntVal) = CallingConv::X86_FastCall; ;} +#line 1219 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.UIntVal = CallingConv::X86_FastCall; ;} break; case 99: -#line 1220 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1220 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - if ((unsigned)(yyvsp[0].UInt64Val) != (yyvsp[0].UInt64Val)) + if ((unsigned)yyvsp[0].UInt64Val != yyvsp[0].UInt64Val) GEN_ERROR("Calling conv too large"); - (yyval.UIntVal) = (yyvsp[0].UInt64Val); + yyval.UIntVal = yyvsp[0].UInt64Val; CHECK_FOR_ERROR ;} break; case 100: -#line 1227 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.ParamAttrs) = ParamAttr::ZExt; ;} +#line 1227 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.ParamAttrs = ParamAttr::ZExt; ;} break; case 101: -#line 1228 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.ParamAttrs) = ParamAttr::ZExt; ;} +#line 1228 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.ParamAttrs = ParamAttr::ZExt; ;} break; case 102: -#line 1229 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.ParamAttrs) = ParamAttr::SExt; ;} +#line 1229 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.ParamAttrs = ParamAttr::SExt; ;} break; case 103: -#line 1230 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.ParamAttrs) = ParamAttr::SExt; ;} +#line 1230 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.ParamAttrs = ParamAttr::SExt; ;} break; case 104: -#line 1231 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.ParamAttrs) = ParamAttr::InReg; ;} +#line 1231 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.ParamAttrs = ParamAttr::InReg; ;} break; case 105: -#line 1232 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.ParamAttrs) = ParamAttr::StructRet; ;} +#line 1232 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.ParamAttrs = ParamAttr::StructRet; ;} break; case 106: -#line 1233 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.ParamAttrs) = ParamAttr::NoAlias; ;} +#line 1233 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.ParamAttrs = ParamAttr::NoAlias; ;} break; case 107: -#line 1234 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.ParamAttrs) = ParamAttr::ByVal; ;} +#line 1234 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.ParamAttrs = ParamAttr::ByVal; ;} break; case 108: -#line 1235 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.ParamAttrs) = ParamAttr::Nest; ;} +#line 1235 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.ParamAttrs = ParamAttr::Nest; ;} break; case 109: -#line 1238 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.ParamAttrs) = ParamAttr::None; ;} +#line 1238 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.ParamAttrs = ParamAttr::None; ;} break; case 110: -#line 1239 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1239 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - (yyval.ParamAttrs) = (yyvsp[-1].ParamAttrs) | (yyvsp[0].ParamAttrs); + yyval.ParamAttrs = yyvsp[-1].ParamAttrs | yyvsp[0].ParamAttrs; ;} break; case 111: -#line 1244 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.ParamAttrs) = ParamAttr::NoReturn; ;} +#line 1244 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.ParamAttrs = ParamAttr::NoReturn; ;} break; case 112: -#line 1245 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.ParamAttrs) = ParamAttr::NoUnwind; ;} +#line 1245 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.ParamAttrs = ParamAttr::NoUnwind; ;} break; case 113: -#line 1246 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.ParamAttrs) = ParamAttr::ZExt; ;} +#line 1246 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.ParamAttrs = ParamAttr::ZExt; ;} break; case 114: -#line 1247 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.ParamAttrs) = ParamAttr::SExt; ;} +#line 1247 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.ParamAttrs = ParamAttr::SExt; ;} break; case 115: -#line 1250 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.ParamAttrs) = ParamAttr::None; ;} +#line 1250 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.ParamAttrs = ParamAttr::None; ;} break; case 116: -#line 1251 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1251 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - (yyval.ParamAttrs) = (yyvsp[-1].ParamAttrs) | (yyvsp[0].ParamAttrs); + yyval.ParamAttrs = yyvsp[-1].ParamAttrs | yyvsp[0].ParamAttrs; ;} break; case 117: -#line 1258 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.UIntVal) = 0; ;} +#line 1258 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.UIntVal = 0; ;} break; case 118: -#line 1259 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1259 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - (yyval.UIntVal) = (yyvsp[0].UInt64Val); - if ((yyval.UIntVal) != 0 && !isPowerOf2_32((yyval.UIntVal))) + yyval.UIntVal = yyvsp[0].UInt64Val; + if (yyval.UIntVal != 0 && !isPowerOf2_32(yyval.UIntVal)) GEN_ERROR("Alignment must be a power of two"); CHECK_FOR_ERROR ;} break; case 119: -#line 1265 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.UIntVal) = 0; ;} +#line 1265 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.UIntVal = 0; ;} break; case 120: -#line 1266 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1266 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - (yyval.UIntVal) = (yyvsp[0].UInt64Val); - if ((yyval.UIntVal) != 0 && !isPowerOf2_32((yyval.UIntVal))) + yyval.UIntVal = yyvsp[0].UInt64Val; + if (yyval.UIntVal != 0 && !isPowerOf2_32(yyval.UIntVal)) GEN_ERROR("Alignment must be a power of two"); CHECK_FOR_ERROR ;} break; case 121: -#line 1274 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1274 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - for (unsigned i = 0, e = (yyvsp[0].StrVal)->length(); i != e; ++i) - if ((*(yyvsp[0].StrVal))[i] == '"' || (*(yyvsp[0].StrVal))[i] == '\\') + for (unsigned i = 0, e = yyvsp[0].StrVal->length(); i != e; ++i) + if ((*yyvsp[0].StrVal)[i] == '"' || (*yyvsp[0].StrVal)[i] == '\\') GEN_ERROR("Invalid character in section name"); - (yyval.StrVal) = (yyvsp[0].StrVal); + yyval.StrVal = yyvsp[0].StrVal; CHECK_FOR_ERROR ;} break; case 122: -#line 1282 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.StrVal) = 0; ;} +#line 1282 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.StrVal = 0; ;} break; case 123: -#line 1283 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.StrVal) = (yyvsp[0].StrVal); ;} +#line 1283 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.StrVal = yyvsp[0].StrVal; ;} break; case 124: -#line 1288 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1288 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" {;} break; case 125: -#line 1289 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1289 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" {;} break; case 126: -#line 1290 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1290 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - CurGV->setSection(*(yyvsp[0].StrVal)); - delete (yyvsp[0].StrVal); + CurGV->setSection(*yyvsp[0].StrVal); + delete yyvsp[0].StrVal; CHECK_FOR_ERROR ;} break; case 127: -#line 1295 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1295 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - if ((yyvsp[0].UInt64Val) != 0 && !isPowerOf2_32((yyvsp[0].UInt64Val))) + if (yyvsp[0].UInt64Val != 0 && !isPowerOf2_32(yyvsp[0].UInt64Val)) GEN_ERROR("Alignment must be a power of two"); - CurGV->setAlignment((yyvsp[0].UInt64Val)); + CurGV->setAlignment(yyvsp[0].UInt64Val); CHECK_FOR_ERROR ;} break; case 132: -#line 1311 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1311 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - (yyval.TypeVal) = new PATypeHolder(OpaqueType::get()); + yyval.TypeVal = new PATypeHolder(OpaqueType::get()); CHECK_FOR_ERROR ;} break; case 133: -#line 1315 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1315 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - (yyval.TypeVal) = new PATypeHolder((yyvsp[0].PrimType)); + yyval.TypeVal = new PATypeHolder(yyvsp[0].PrimType); CHECK_FOR_ERROR ;} break; case 134: -#line 1319 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1319 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { // Pointer type? - if (*(yyvsp[-1].TypeVal) == Type::LabelTy) + if (*yyvsp[-1].TypeVal == Type::LabelTy) GEN_ERROR("Cannot form a pointer to a basic block"); - (yyval.TypeVal) = new PATypeHolder(HandleUpRefs(PointerType::get(*(yyvsp[-1].TypeVal)))); - delete (yyvsp[-1].TypeVal); + yyval.TypeVal = new PATypeHolder(HandleUpRefs(PointerType::get(*yyvsp[-1].TypeVal))); + delete yyvsp[-1].TypeVal; CHECK_FOR_ERROR ;} break; case 135: -#line 1326 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1326 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { // Named types are also simple types... - const Type* tmp = getTypeVal((yyvsp[0].ValIDVal)); + const Type* tmp = getTypeVal(yyvsp[0].ValIDVal); CHECK_FOR_ERROR - (yyval.TypeVal) = new PATypeHolder(tmp); + yyval.TypeVal = new PATypeHolder(tmp); ;} break; case 136: -#line 1331 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1331 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { // Type UpReference - if ((yyvsp[0].UInt64Val) > (uint64_t)~0U) GEN_ERROR("Value out of range"); + if (yyvsp[0].UInt64Val > (uint64_t)~0U) GEN_ERROR("Value out of range"); OpaqueType *OT = OpaqueType::get(); // Use temporary placeholder - UpRefs.push_back(UpRefRecord((unsigned)(yyvsp[0].UInt64Val), OT)); // Add to vector... - (yyval.TypeVal) = new PATypeHolder(OT); + UpRefs.push_back(UpRefRecord((unsigned)yyvsp[0].UInt64Val, OT)); // Add to vector... + yyval.TypeVal = new PATypeHolder(OT); UR_OUT("New Upreference!\n"); CHECK_FOR_ERROR ;} break; case 137: -#line 1339 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1339 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { std::vector Params; ParamAttrsVector Attrs; - if ((yyvsp[0].ParamAttrs) != ParamAttr::None) { - ParamAttrsWithIndex X; X.index = 0; X.attrs = (yyvsp[0].ParamAttrs); + if (yyvsp[0].ParamAttrs != ParamAttr::None) { + ParamAttrsWithIndex X; X.index = 0; X.attrs = yyvsp[0].ParamAttrs; Attrs.push_back(X); } unsigned index = 1; - TypeWithAttrsList::iterator I = (yyvsp[-2].TypeWithAttrsList)->begin(), E = (yyvsp[-2].TypeWithAttrsList)->end(); + TypeWithAttrsList::iterator I = yyvsp[-2].TypeWithAttrsList->begin(), E = yyvsp[-2].TypeWithAttrsList->end(); for (; I != E; ++I, ++index) { const Type *Ty = I->Ty->get(); Params.push_back(Ty); @@ -3692,24 +3573,24 @@ ParamAttrsList *ActualAttrs = 0; if (!Attrs.empty()) ActualAttrs = ParamAttrsList::get(Attrs); - FunctionType *FT = FunctionType::get(*(yyvsp[-4].TypeVal), Params, isVarArg, ActualAttrs); - delete (yyvsp[-2].TypeWithAttrsList); // Delete the argument list - delete (yyvsp[-4].TypeVal); // Delete the return type handle - (yyval.TypeVal) = new PATypeHolder(HandleUpRefs(FT)); + FunctionType *FT = FunctionType::get(*yyvsp[-4].TypeVal, Params, isVarArg, ActualAttrs); + delete yyvsp[-2].TypeWithAttrsList; // Delete the argument list + delete yyvsp[-4].TypeVal; // Delete the return type handle + yyval.TypeVal = new PATypeHolder(HandleUpRefs(FT)); CHECK_FOR_ERROR ;} break; case 138: -#line 1369 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1369 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { std::vector Params; ParamAttrsVector Attrs; - if ((yyvsp[0].ParamAttrs) != ParamAttr::None) { - ParamAttrsWithIndex X; X.index = 0; X.attrs = (yyvsp[0].ParamAttrs); + if (yyvsp[0].ParamAttrs != ParamAttr::None) { + ParamAttrsWithIndex X; X.index = 0; X.attrs = yyvsp[0].ParamAttrs; Attrs.push_back(X); } - TypeWithAttrsList::iterator I = (yyvsp[-2].TypeWithAttrsList)->begin(), E = (yyvsp[-2].TypeWithAttrsList)->end(); + TypeWithAttrsList::iterator I = yyvsp[-2].TypeWithAttrsList->begin(), E = yyvsp[-2].TypeWithAttrsList->end(); unsigned index = 1; for ( ; I != E; ++I, ++index) { const Type* Ty = I->Ty->get(); @@ -3727,303 +3608,303 @@ if (!Attrs.empty()) ActualAttrs = ParamAttrsList::get(Attrs); - FunctionType *FT = FunctionType::get((yyvsp[-4].PrimType), Params, isVarArg, ActualAttrs); - delete (yyvsp[-2].TypeWithAttrsList); // Delete the argument list - (yyval.TypeVal) = new PATypeHolder(HandleUpRefs(FT)); + FunctionType *FT = FunctionType::get(yyvsp[-4].PrimType, Params, isVarArg, ActualAttrs); + delete yyvsp[-2].TypeWithAttrsList; // Delete the argument list + yyval.TypeVal = new PATypeHolder(HandleUpRefs(FT)); CHECK_FOR_ERROR ;} break; case 139: -#line 1400 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1400 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { // Sized array type? - (yyval.TypeVal) = new PATypeHolder(HandleUpRefs(ArrayType::get(*(yyvsp[-1].TypeVal), (unsigned)(yyvsp[-3].UInt64Val)))); - delete (yyvsp[-1].TypeVal); + yyval.TypeVal = new PATypeHolder(HandleUpRefs(ArrayType::get(*yyvsp[-1].TypeVal, (unsigned)yyvsp[-3].UInt64Val))); + delete yyvsp[-1].TypeVal; CHECK_FOR_ERROR ;} break; case 140: -#line 1405 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1405 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { // Vector type? - const llvm::Type* ElemTy = (yyvsp[-1].TypeVal)->get(); - if ((unsigned)(yyvsp[-3].UInt64Val) != (yyvsp[-3].UInt64Val)) + const llvm::Type* ElemTy = yyvsp[-1].TypeVal->get(); + if ((unsigned)yyvsp[-3].UInt64Val != yyvsp[-3].UInt64Val) GEN_ERROR("Unsigned result not equal to signed result"); if (!ElemTy->isFloatingPoint() && !ElemTy->isInteger()) GEN_ERROR("Element type of a VectorType must be primitive"); - if (!isPowerOf2_32((yyvsp[-3].UInt64Val))) + if (!isPowerOf2_32(yyvsp[-3].UInt64Val)) GEN_ERROR("Vector length should be a power of 2"); - (yyval.TypeVal) = new PATypeHolder(HandleUpRefs(VectorType::get(*(yyvsp[-1].TypeVal), (unsigned)(yyvsp[-3].UInt64Val)))); - delete (yyvsp[-1].TypeVal); + yyval.TypeVal = new PATypeHolder(HandleUpRefs(VectorType::get(*yyvsp[-1].TypeVal, (unsigned)yyvsp[-3].UInt64Val))); + delete yyvsp[-1].TypeVal; CHECK_FOR_ERROR ;} break; case 141: -#line 1417 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1417 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { // Structure type? std::vector Elements; - for (std::list::iterator I = (yyvsp[-1].TypeList)->begin(), - E = (yyvsp[-1].TypeList)->end(); I != E; ++I) + for (std::list::iterator I = yyvsp[-1].TypeList->begin(), + E = yyvsp[-1].TypeList->end(); I != E; ++I) Elements.push_back(*I); - (yyval.TypeVal) = new PATypeHolder(HandleUpRefs(StructType::get(Elements))); - delete (yyvsp[-1].TypeList); + yyval.TypeVal = new PATypeHolder(HandleUpRefs(StructType::get(Elements))); + delete yyvsp[-1].TypeList; CHECK_FOR_ERROR ;} break; case 142: -#line 1427 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1427 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { // Empty structure type? - (yyval.TypeVal) = new PATypeHolder(StructType::get(std::vector())); + yyval.TypeVal = new PATypeHolder(StructType::get(std::vector())); CHECK_FOR_ERROR ;} break; case 143: -#line 1431 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1431 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { std::vector Elements; - for (std::list::iterator I = (yyvsp[-2].TypeList)->begin(), - E = (yyvsp[-2].TypeList)->end(); I != E; ++I) + for (std::list::iterator I = yyvsp[-2].TypeList->begin(), + E = yyvsp[-2].TypeList->end(); I != E; ++I) Elements.push_back(*I); - (yyval.TypeVal) = new PATypeHolder(HandleUpRefs(StructType::get(Elements, true))); - delete (yyvsp[-2].TypeList); + yyval.TypeVal = new PATypeHolder(HandleUpRefs(StructType::get(Elements, true))); + delete yyvsp[-2].TypeList; CHECK_FOR_ERROR ;} break; case 144: -#line 1441 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1441 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { // Empty structure type? - (yyval.TypeVal) = new PATypeHolder(StructType::get(std::vector(), true)); + yyval.TypeVal = new PATypeHolder(StructType::get(std::vector(), true)); CHECK_FOR_ERROR ;} break; case 145: -#line 1448 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1448 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - (yyval.TypeWithAttrs).Ty = (yyvsp[-1].TypeVal); - (yyval.TypeWithAttrs).Attrs = (yyvsp[0].ParamAttrs); + yyval.TypeWithAttrs.Ty = yyvsp[-1].TypeVal; + yyval.TypeWithAttrs.Attrs = yyvsp[0].ParamAttrs; ;} break; case 146: -#line 1455 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1455 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[0].TypeVal))->getDescription()); - if (!(*(yyvsp[0].TypeVal))->isFirstClassType()) + GEN_ERROR("Invalid upreference in type: " + (*yyvsp[0].TypeVal)->getDescription()); + if (!(*yyvsp[0].TypeVal)->isFirstClassType()) GEN_ERROR("LLVM functions cannot return aggregate types"); - (yyval.TypeVal) = (yyvsp[0].TypeVal); + yyval.TypeVal = yyvsp[0].TypeVal; ;} break; case 147: -#line 1462 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1462 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - (yyval.TypeVal) = new PATypeHolder(Type::VoidTy); + yyval.TypeVal = new PATypeHolder(Type::VoidTy); ;} break; case 148: -#line 1467 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1467 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - (yyval.TypeWithAttrsList) = new TypeWithAttrsList(); - (yyval.TypeWithAttrsList)->push_back((yyvsp[0].TypeWithAttrs)); + yyval.TypeWithAttrsList = new TypeWithAttrsList(); + yyval.TypeWithAttrsList->push_back(yyvsp[0].TypeWithAttrs); CHECK_FOR_ERROR ;} break; case 149: -#line 1472 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1472 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - ((yyval.TypeWithAttrsList)=(yyvsp[-2].TypeWithAttrsList))->push_back((yyvsp[0].TypeWithAttrs)); + (yyval.TypeWithAttrsList=yyvsp[-2].TypeWithAttrsList)->push_back(yyvsp[0].TypeWithAttrs); CHECK_FOR_ERROR ;} break; case 151: -#line 1480 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1480 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - (yyval.TypeWithAttrsList)=(yyvsp[-2].TypeWithAttrsList); + yyval.TypeWithAttrsList=yyvsp[-2].TypeWithAttrsList; TypeWithAttrs TWA; TWA.Attrs = ParamAttr::None; TWA.Ty = new PATypeHolder(Type::VoidTy); - (yyval.TypeWithAttrsList)->push_back(TWA); + yyval.TypeWithAttrsList->push_back(TWA); CHECK_FOR_ERROR ;} break; case 152: -#line 1487 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1487 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - (yyval.TypeWithAttrsList) = new TypeWithAttrsList; + yyval.TypeWithAttrsList = new TypeWithAttrsList; TypeWithAttrs TWA; TWA.Attrs = ParamAttr::None; TWA.Ty = new PATypeHolder(Type::VoidTy); - (yyval.TypeWithAttrsList)->push_back(TWA); + yyval.TypeWithAttrsList->push_back(TWA); CHECK_FOR_ERROR ;} break; case 153: -#line 1494 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1494 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - (yyval.TypeWithAttrsList) = new TypeWithAttrsList(); + yyval.TypeWithAttrsList = new TypeWithAttrsList(); CHECK_FOR_ERROR ;} break; case 154: -#line 1502 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1502 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - (yyval.TypeList) = new std::list(); - (yyval.TypeList)->push_back(*(yyvsp[0].TypeVal)); - delete (yyvsp[0].TypeVal); + yyval.TypeList = new std::list(); + yyval.TypeList->push_back(*yyvsp[0].TypeVal); + delete yyvsp[0].TypeVal; CHECK_FOR_ERROR ;} break; case 155: -#line 1508 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1508 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - ((yyval.TypeList)=(yyvsp[-2].TypeList))->push_back(*(yyvsp[0].TypeVal)); - delete (yyvsp[0].TypeVal); + (yyval.TypeList=yyvsp[-2].TypeList)->push_back(*yyvsp[0].TypeVal); + delete yyvsp[0].TypeVal; CHECK_FOR_ERROR ;} break; case 156: -#line 1520 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1520 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { // Nonempty unsized arr if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-3].TypeVal))->getDescription()); - const ArrayType *ATy = dyn_cast((yyvsp[-3].TypeVal)->get()); + GEN_ERROR("Invalid upreference in type: " + (*yyvsp[-3].TypeVal)->getDescription()); + const ArrayType *ATy = dyn_cast(yyvsp[-3].TypeVal->get()); if (ATy == 0) GEN_ERROR("Cannot make array constant with type: '" + - (*(yyvsp[-3].TypeVal))->getDescription() + "'"); + (*yyvsp[-3].TypeVal)->getDescription() + "'"); const Type *ETy = ATy->getElementType(); int NumElements = ATy->getNumElements(); // Verify that we have the correct size... - if (NumElements != -1 && NumElements != (int)(yyvsp[-1].ConstVector)->size()) + if (NumElements != -1 && NumElements != (int)yyvsp[-1].ConstVector->size()) GEN_ERROR("Type mismatch: constant sized array initialized with " + - utostr((yyvsp[-1].ConstVector)->size()) + " arguments, but has size of " + + utostr(yyvsp[-1].ConstVector->size()) + " arguments, but has size of " + itostr(NumElements) + ""); // Verify all elements are correct type! - for (unsigned i = 0; i < (yyvsp[-1].ConstVector)->size(); i++) { - if (ETy != (*(yyvsp[-1].ConstVector))[i]->getType()) + for (unsigned i = 0; i < yyvsp[-1].ConstVector->size(); i++) { + if (ETy != (*yyvsp[-1].ConstVector)[i]->getType()) GEN_ERROR("Element #" + utostr(i) + " is not of type '" + ETy->getDescription() +"' as required!\nIt is of type '"+ - (*(yyvsp[-1].ConstVector))[i]->getType()->getDescription() + "'."); + (*yyvsp[-1].ConstVector)[i]->getType()->getDescription() + "'."); } - (yyval.ConstVal) = ConstantArray::get(ATy, *(yyvsp[-1].ConstVector)); - delete (yyvsp[-3].TypeVal); delete (yyvsp[-1].ConstVector); + yyval.ConstVal = ConstantArray::get(ATy, *yyvsp[-1].ConstVector); + delete yyvsp[-3].TypeVal; delete yyvsp[-1].ConstVector; CHECK_FOR_ERROR ;} break; case 157: -#line 1548 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1548 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-2].TypeVal))->getDescription()); - const ArrayType *ATy = dyn_cast((yyvsp[-2].TypeVal)->get()); + GEN_ERROR("Invalid upreference in type: " + (*yyvsp[-2].TypeVal)->getDescription()); + const ArrayType *ATy = dyn_cast(yyvsp[-2].TypeVal->get()); if (ATy == 0) GEN_ERROR("Cannot make array constant with type: '" + - (*(yyvsp[-2].TypeVal))->getDescription() + "'"); + (*yyvsp[-2].TypeVal)->getDescription() + "'"); int NumElements = ATy->getNumElements(); if (NumElements != -1 && NumElements != 0) GEN_ERROR("Type mismatch: constant sized array initialized with 0" " arguments, but has size of " + itostr(NumElements) +""); - (yyval.ConstVal) = ConstantArray::get(ATy, std::vector()); - delete (yyvsp[-2].TypeVal); + yyval.ConstVal = ConstantArray::get(ATy, std::vector()); + delete yyvsp[-2].TypeVal; CHECK_FOR_ERROR ;} break; case 158: -#line 1564 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1564 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-2].TypeVal))->getDescription()); - const ArrayType *ATy = dyn_cast((yyvsp[-2].TypeVal)->get()); + GEN_ERROR("Invalid upreference in type: " + (*yyvsp[-2].TypeVal)->getDescription()); + const ArrayType *ATy = dyn_cast(yyvsp[-2].TypeVal->get()); if (ATy == 0) GEN_ERROR("Cannot make array constant with type: '" + - (*(yyvsp[-2].TypeVal))->getDescription() + "'"); + (*yyvsp[-2].TypeVal)->getDescription() + "'"); int NumElements = ATy->getNumElements(); const Type *ETy = ATy->getElementType(); - if (NumElements != -1 && NumElements != int((yyvsp[0].StrVal)->length())) + if (NumElements != -1 && NumElements != int(yyvsp[0].StrVal->length())) GEN_ERROR("Can't build string constant of size " + - itostr((int)((yyvsp[0].StrVal)->length())) + + itostr((int)(yyvsp[0].StrVal->length())) + " when array has size " + itostr(NumElements) + ""); std::vector Vals; if (ETy == Type::Int8Ty) { - for (unsigned i = 0; i < (yyvsp[0].StrVal)->length(); ++i) - Vals.push_back(ConstantInt::get(ETy, (*(yyvsp[0].StrVal))[i])); + for (unsigned i = 0; i < yyvsp[0].StrVal->length(); ++i) + Vals.push_back(ConstantInt::get(ETy, (*yyvsp[0].StrVal)[i])); } else { - delete (yyvsp[0].StrVal); + delete yyvsp[0].StrVal; GEN_ERROR("Cannot build string arrays of non byte sized elements"); } - delete (yyvsp[0].StrVal); - (yyval.ConstVal) = ConstantArray::get(ATy, Vals); - delete (yyvsp[-2].TypeVal); + delete yyvsp[0].StrVal; + yyval.ConstVal = ConstantArray::get(ATy, Vals); + delete yyvsp[-2].TypeVal; CHECK_FOR_ERROR ;} break; case 159: -#line 1591 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1591 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { // Nonempty unsized arr if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-3].TypeVal))->getDescription()); - const VectorType *PTy = dyn_cast((yyvsp[-3].TypeVal)->get()); + GEN_ERROR("Invalid upreference in type: " + (*yyvsp[-3].TypeVal)->getDescription()); + const VectorType *PTy = dyn_cast(yyvsp[-3].TypeVal->get()); if (PTy == 0) GEN_ERROR("Cannot make packed constant with type: '" + - (*(yyvsp[-3].TypeVal))->getDescription() + "'"); + (*yyvsp[-3].TypeVal)->getDescription() + "'"); const Type *ETy = PTy->getElementType(); int NumElements = PTy->getNumElements(); // Verify that we have the correct size... - if (NumElements != -1 && NumElements != (int)(yyvsp[-1].ConstVector)->size()) + if (NumElements != -1 && NumElements != (int)yyvsp[-1].ConstVector->size()) GEN_ERROR("Type mismatch: constant sized packed initialized with " + - utostr((yyvsp[-1].ConstVector)->size()) + " arguments, but has size of " + + utostr(yyvsp[-1].ConstVector->size()) + " arguments, but has size of " + itostr(NumElements) + ""); // Verify all elements are correct type! - for (unsigned i = 0; i < (yyvsp[-1].ConstVector)->size(); i++) { - if (ETy != (*(yyvsp[-1].ConstVector))[i]->getType()) + for (unsigned i = 0; i < yyvsp[-1].ConstVector->size(); i++) { + if (ETy != (*yyvsp[-1].ConstVector)[i]->getType()) GEN_ERROR("Element #" + utostr(i) + " is not of type '" + ETy->getDescription() +"' as required!\nIt is of type '"+ - (*(yyvsp[-1].ConstVector))[i]->getType()->getDescription() + "'."); + (*yyvsp[-1].ConstVector)[i]->getType()->getDescription() + "'."); } - (yyval.ConstVal) = ConstantVector::get(PTy, *(yyvsp[-1].ConstVector)); - delete (yyvsp[-3].TypeVal); delete (yyvsp[-1].ConstVector); + yyval.ConstVal = ConstantVector::get(PTy, *yyvsp[-1].ConstVector); + delete yyvsp[-3].TypeVal; delete yyvsp[-1].ConstVector; CHECK_FOR_ERROR ;} break; case 160: -#line 1619 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1619 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - const StructType *STy = dyn_cast((yyvsp[-3].TypeVal)->get()); + const StructType *STy = dyn_cast(yyvsp[-3].TypeVal->get()); if (STy == 0) GEN_ERROR("Cannot make struct constant with type: '" + - (*(yyvsp[-3].TypeVal))->getDescription() + "'"); + (*yyvsp[-3].TypeVal)->getDescription() + "'"); - if ((yyvsp[-1].ConstVector)->size() != STy->getNumContainedTypes()) + if (yyvsp[-1].ConstVector->size() != STy->getNumContainedTypes()) GEN_ERROR("Illegal number of initializers for structure type"); // Check to ensure that constants are compatible with the type initializer! - for (unsigned i = 0, e = (yyvsp[-1].ConstVector)->size(); i != e; ++i) - if ((*(yyvsp[-1].ConstVector))[i]->getType() != STy->getElementType(i)) + for (unsigned i = 0, e = yyvsp[-1].ConstVector->size(); i != e; ++i) + if ((*yyvsp[-1].ConstVector)[i]->getType() != STy->getElementType(i)) GEN_ERROR("Expected type '" + STy->getElementType(i)->getDescription() + "' for element #" + utostr(i) + @@ -4034,21 +3915,21 @@ GEN_ERROR("Unpacked Initializer to vector type '" + STy->getDescription() + "'"); - (yyval.ConstVal) = ConstantStruct::get(STy, *(yyvsp[-1].ConstVector)); - delete (yyvsp[-3].TypeVal); delete (yyvsp[-1].ConstVector); + yyval.ConstVal = ConstantStruct::get(STy, *yyvsp[-1].ConstVector); + delete yyvsp[-3].TypeVal; delete yyvsp[-1].ConstVector; CHECK_FOR_ERROR ;} break; case 161: -#line 1645 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1645 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-2].TypeVal))->getDescription()); - const StructType *STy = dyn_cast((yyvsp[-2].TypeVal)->get()); + GEN_ERROR("Invalid upreference in type: " + (*yyvsp[-2].TypeVal)->getDescription()); + const StructType *STy = dyn_cast(yyvsp[-2].TypeVal->get()); if (STy == 0) GEN_ERROR("Cannot make struct constant with type: '" + - (*(yyvsp[-2].TypeVal))->getDescription() + "'"); + (*yyvsp[-2].TypeVal)->getDescription() + "'"); if (STy->getNumContainedTypes() != 0) GEN_ERROR("Illegal number of initializers for structure type"); @@ -4058,26 +3939,26 @@ GEN_ERROR("Unpacked Initializer to vector type '" + STy->getDescription() + "'"); - (yyval.ConstVal) = ConstantStruct::get(STy, std::vector()); - delete (yyvsp[-2].TypeVal); + yyval.ConstVal = ConstantStruct::get(STy, std::vector()); + delete yyvsp[-2].TypeVal; CHECK_FOR_ERROR ;} break; case 162: -#line 1665 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1665 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - const StructType *STy = dyn_cast((yyvsp[-5].TypeVal)->get()); + const StructType *STy = dyn_cast(yyvsp[-5].TypeVal->get()); if (STy == 0) GEN_ERROR("Cannot make struct constant with type: '" + - (*(yyvsp[-5].TypeVal))->getDescription() + "'"); + (*yyvsp[-5].TypeVal)->getDescription() + "'"); - if ((yyvsp[-2].ConstVector)->size() != STy->getNumContainedTypes()) + if (yyvsp[-2].ConstVector->size() != STy->getNumContainedTypes()) GEN_ERROR("Illegal number of initializers for structure type"); // Check to ensure that constants are compatible with the type initializer! - for (unsigned i = 0, e = (yyvsp[-2].ConstVector)->size(); i != e; ++i) - if ((*(yyvsp[-2].ConstVector))[i]->getType() != STy->getElementType(i)) + for (unsigned i = 0, e = yyvsp[-2].ConstVector->size(); i != e; ++i) + if ((*yyvsp[-2].ConstVector)[i]->getType() != STy->getElementType(i)) GEN_ERROR("Expected type '" + STy->getElementType(i)->getDescription() + "' for element #" + utostr(i) + @@ -4088,21 +3969,21 @@ GEN_ERROR("Vector initializer to non-vector type '" + STy->getDescription() + "'"); - (yyval.ConstVal) = ConstantStruct::get(STy, *(yyvsp[-2].ConstVector)); - delete (yyvsp[-5].TypeVal); delete (yyvsp[-2].ConstVector); + yyval.ConstVal = ConstantStruct::get(STy, *yyvsp[-2].ConstVector); + delete yyvsp[-5].TypeVal; delete yyvsp[-2].ConstVector; CHECK_FOR_ERROR ;} break; case 163: -#line 1691 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1691 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-4].TypeVal))->getDescription()); - const StructType *STy = dyn_cast((yyvsp[-4].TypeVal)->get()); + GEN_ERROR("Invalid upreference in type: " + (*yyvsp[-4].TypeVal)->getDescription()); + const StructType *STy = dyn_cast(yyvsp[-4].TypeVal->get()); if (STy == 0) GEN_ERROR("Cannot make struct constant with type: '" + - (*(yyvsp[-4].TypeVal))->getDescription() + "'"); + (*yyvsp[-4].TypeVal)->getDescription() + "'"); if (STy->getNumContainedTypes() != 0) GEN_ERROR("Illegal number of initializers for structure type"); @@ -4112,45 +3993,45 @@ GEN_ERROR("Vector initializer to non-vector type '" + STy->getDescription() + "'"); - (yyval.ConstVal) = ConstantStruct::get(STy, std::vector()); - delete (yyvsp[-4].TypeVal); + yyval.ConstVal = ConstantStruct::get(STy, std::vector()); + delete yyvsp[-4].TypeVal; CHECK_FOR_ERROR ;} break; case 164: -#line 1711 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1711 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-1].TypeVal))->getDescription()); - const PointerType *PTy = dyn_cast((yyvsp[-1].TypeVal)->get()); + GEN_ERROR("Invalid upreference in type: " + (*yyvsp[-1].TypeVal)->getDescription()); + const PointerType *PTy = dyn_cast(yyvsp[-1].TypeVal->get()); if (PTy == 0) GEN_ERROR("Cannot make null pointer constant with type: '" + - (*(yyvsp[-1].TypeVal))->getDescription() + "'"); + (*yyvsp[-1].TypeVal)->getDescription() + "'"); - (yyval.ConstVal) = ConstantPointerNull::get(PTy); - delete (yyvsp[-1].TypeVal); + yyval.ConstVal = ConstantPointerNull::get(PTy); + delete yyvsp[-1].TypeVal; CHECK_FOR_ERROR ;} break; case 165: -#line 1723 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1723 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-1].TypeVal))->getDescription()); - (yyval.ConstVal) = UndefValue::get((yyvsp[-1].TypeVal)->get()); - delete (yyvsp[-1].TypeVal); + GEN_ERROR("Invalid upreference in type: " + (*yyvsp[-1].TypeVal)->getDescription()); + yyval.ConstVal = UndefValue::get(yyvsp[-1].TypeVal->get()); + delete yyvsp[-1].TypeVal; CHECK_FOR_ERROR ;} break; case 166: -#line 1730 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1730 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-1].TypeVal))->getDescription()); - const PointerType *Ty = dyn_cast((yyvsp[-1].TypeVal)->get()); + GEN_ERROR("Invalid upreference in type: " + (*yyvsp[-1].TypeVal)->getDescription()); + const PointerType *Ty = dyn_cast(yyvsp[-1].TypeVal->get()); if (Ty == 0) GEN_ERROR("Global const reference must be a pointer type"); @@ -4164,7 +4045,7 @@ Function *SavedCurFn = CurFun.CurrentFunction; CurFun.CurrentFunction = 0; - Value *V = getExistingVal(Ty, (yyvsp[0].ValIDVal)); + Value *V = getExistingVal(Ty, yyvsp[0].ValIDVal); CHECK_FOR_ERROR CurFun.CurrentFunction = SavedCurFn; @@ -4179,16 +4060,16 @@ // First check to see if the forward references value is already created! PerModuleInfo::GlobalRefsType::iterator I = - CurModule.GlobalRefs.find(std::make_pair(PT, (yyvsp[0].ValIDVal))); + CurModule.GlobalRefs.find(std::make_pair(PT, yyvsp[0].ValIDVal)); if (I != CurModule.GlobalRefs.end()) { V = I->second; // Placeholder already exists, use it... - (yyvsp[0].ValIDVal).destroy(); + yyvsp[0].ValIDVal.destroy(); } else { std::string Name; - if ((yyvsp[0].ValIDVal).Type == ValID::GlobalName) - Name = (yyvsp[0].ValIDVal).getName(); - else if ((yyvsp[0].ValIDVal).Type != ValID::GlobalID) + if (yyvsp[0].ValIDVal.Type == ValID::GlobalName) + Name = yyvsp[0].ValIDVal.getName(); + else if (yyvsp[0].ValIDVal.Type != ValID::GlobalID) GEN_ERROR("Invalid reference to global"); // Create the forward referenced global. @@ -4204,341 +4085,341 @@ } // Keep track of the fact that we have a forward ref to recycle it - CurModule.GlobalRefs.insert(std::make_pair(std::make_pair(PT, (yyvsp[0].ValIDVal)), GV)); + CurModule.GlobalRefs.insert(std::make_pair(std::make_pair(PT, yyvsp[0].ValIDVal), GV)); V = GV; } } - (yyval.ConstVal) = cast(V); - delete (yyvsp[-1].TypeVal); // Free the type handle + yyval.ConstVal = cast(V); + delete yyvsp[-1].TypeVal; // Free the type handle CHECK_FOR_ERROR ;} break; case 167: -#line 1796 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1796 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-1].TypeVal))->getDescription()); - if ((yyvsp[-1].TypeVal)->get() != (yyvsp[0].ConstVal)->getType()) + GEN_ERROR("Invalid upreference in type: " + (*yyvsp[-1].TypeVal)->getDescription()); + if (yyvsp[-1].TypeVal->get() != yyvsp[0].ConstVal->getType()) GEN_ERROR("Mismatched types for constant expression: " + - (*(yyvsp[-1].TypeVal))->getDescription() + " and " + (yyvsp[0].ConstVal)->getType()->getDescription()); - (yyval.ConstVal) = (yyvsp[0].ConstVal); - delete (yyvsp[-1].TypeVal); + (*yyvsp[-1].TypeVal)->getDescription() + " and " + yyvsp[0].ConstVal->getType()->getDescription()); + yyval.ConstVal = yyvsp[0].ConstVal; + delete yyvsp[-1].TypeVal; CHECK_FOR_ERROR ;} break; case 168: -#line 1806 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1806 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-1].TypeVal))->getDescription()); - const Type *Ty = (yyvsp[-1].TypeVal)->get(); + GEN_ERROR("Invalid upreference in type: " + (*yyvsp[-1].TypeVal)->getDescription()); + const Type *Ty = yyvsp[-1].TypeVal->get(); if (isa(Ty) || Ty == Type::LabelTy || isa(Ty)) GEN_ERROR("Cannot create a null initialized value of this type"); - (yyval.ConstVal) = Constant::getNullValue(Ty); - delete (yyvsp[-1].TypeVal); + yyval.ConstVal = Constant::getNullValue(Ty); + delete yyvsp[-1].TypeVal; CHECK_FOR_ERROR ;} break; case 169: -#line 1816 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1816 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { // integral constants - if (!ConstantInt::isValueValidForType((yyvsp[-1].PrimType), (yyvsp[0].SInt64Val))) + if (!ConstantInt::isValueValidForType(yyvsp[-1].PrimType, yyvsp[0].SInt64Val)) GEN_ERROR("Constant value doesn't fit in type"); - (yyval.ConstVal) = ConstantInt::get((yyvsp[-1].PrimType), (yyvsp[0].SInt64Val), true); + yyval.ConstVal = ConstantInt::get(yyvsp[-1].PrimType, yyvsp[0].SInt64Val, true); CHECK_FOR_ERROR ;} break; case 170: -#line 1822 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1822 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { // arbitrary precision integer constants - uint32_t BitWidth = cast((yyvsp[-1].PrimType))->getBitWidth(); - if ((yyvsp[0].APIntVal)->getBitWidth() > BitWidth) { + uint32_t BitWidth = cast(yyvsp[-1].PrimType)->getBitWidth(); + if (yyvsp[0].APIntVal->getBitWidth() > BitWidth) { GEN_ERROR("Constant value does not fit in type"); } - (yyvsp[0].APIntVal)->sextOrTrunc(BitWidth); - (yyval.ConstVal) = ConstantInt::get(*(yyvsp[0].APIntVal)); - delete (yyvsp[0].APIntVal); + yyvsp[0].APIntVal->sextOrTrunc(BitWidth); + yyval.ConstVal = ConstantInt::get(*yyvsp[0].APIntVal); + delete yyvsp[0].APIntVal; CHECK_FOR_ERROR ;} break; case 171: -#line 1832 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1832 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { // integral constants - if (!ConstantInt::isValueValidForType((yyvsp[-1].PrimType), (yyvsp[0].UInt64Val))) + if (!ConstantInt::isValueValidForType(yyvsp[-1].PrimType, yyvsp[0].UInt64Val)) GEN_ERROR("Constant value doesn't fit in type"); - (yyval.ConstVal) = ConstantInt::get((yyvsp[-1].PrimType), (yyvsp[0].UInt64Val), false); + yyval.ConstVal = ConstantInt::get(yyvsp[-1].PrimType, yyvsp[0].UInt64Val, false); CHECK_FOR_ERROR ;} break; case 172: -#line 1838 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1838 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { // arbitrary precision integer constants - uint32_t BitWidth = cast((yyvsp[-1].PrimType))->getBitWidth(); - if ((yyvsp[0].APIntVal)->getBitWidth() > BitWidth) { + uint32_t BitWidth = cast(yyvsp[-1].PrimType)->getBitWidth(); + if (yyvsp[0].APIntVal->getBitWidth() > BitWidth) { GEN_ERROR("Constant value does not fit in type"); } - (yyvsp[0].APIntVal)->zextOrTrunc(BitWidth); - (yyval.ConstVal) = ConstantInt::get(*(yyvsp[0].APIntVal)); - delete (yyvsp[0].APIntVal); + yyvsp[0].APIntVal->zextOrTrunc(BitWidth); + yyval.ConstVal = ConstantInt::get(*yyvsp[0].APIntVal); + delete yyvsp[0].APIntVal; CHECK_FOR_ERROR ;} break; case 173: -#line 1848 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1848 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { // Boolean constants - assert(cast((yyvsp[-1].PrimType))->getBitWidth() == 1 && "Not Bool?"); - (yyval.ConstVal) = ConstantInt::getTrue(); + assert(cast(yyvsp[-1].PrimType)->getBitWidth() == 1 && "Not Bool?"); + yyval.ConstVal = ConstantInt::getTrue(); CHECK_FOR_ERROR ;} break; case 174: -#line 1853 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1853 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { // Boolean constants - assert(cast((yyvsp[-1].PrimType))->getBitWidth() == 1 && "Not Bool?"); - (yyval.ConstVal) = ConstantInt::getFalse(); + assert(cast(yyvsp[-1].PrimType)->getBitWidth() == 1 && "Not Bool?"); + yyval.ConstVal = ConstantInt::getFalse(); CHECK_FOR_ERROR ;} break; case 175: -#line 1858 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1858 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { // Float & Double constants - if (!ConstantFP::isValueValidForType((yyvsp[-1].PrimType), (yyvsp[0].FPVal))) + if (!ConstantFP::isValueValidForType(yyvsp[-1].PrimType, yyvsp[0].FPVal)) GEN_ERROR("Floating point constant invalid for type"); - (yyval.ConstVal) = ConstantFP::get((yyvsp[-1].PrimType), (yyvsp[0].FPVal)); + yyval.ConstVal = ConstantFP::get(yyvsp[-1].PrimType, yyvsp[0].FPVal); CHECK_FOR_ERROR ;} break; case 176: -#line 1866 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1866 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-1].TypeVal))->getDescription()); - Constant *Val = (yyvsp[-3].ConstVal); - const Type *DestTy = (yyvsp[-1].TypeVal)->get(); - if (!CastInst::castIsValid((yyvsp[-5].CastOpVal), (yyvsp[-3].ConstVal), DestTy)) + GEN_ERROR("Invalid upreference in type: " + (*yyvsp[-1].TypeVal)->getDescription()); + Constant *Val = yyvsp[-3].ConstVal; + const Type *DestTy = yyvsp[-1].TypeVal->get(); + if (!CastInst::castIsValid(yyvsp[-5].CastOpVal, yyvsp[-3].ConstVal, DestTy)) GEN_ERROR("invalid cast opcode for cast from '" + Val->getType()->getDescription() + "' to '" + DestTy->getDescription() + "'"); - (yyval.ConstVal) = ConstantExpr::getCast((yyvsp[-5].CastOpVal), (yyvsp[-3].ConstVal), DestTy); - delete (yyvsp[-1].TypeVal); + yyval.ConstVal = ConstantExpr::getCast(yyvsp[-5].CastOpVal, yyvsp[-3].ConstVal, DestTy); + delete yyvsp[-1].TypeVal; ;} break; case 177: -#line 1878 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1878 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - if (!isa((yyvsp[-2].ConstVal)->getType())) + if (!isa(yyvsp[-2].ConstVal->getType())) GEN_ERROR("GetElementPtr requires a pointer operand"); const Type *IdxTy = - GetElementPtrInst::getIndexedType((yyvsp[-2].ConstVal)->getType(), &(*(yyvsp[-1].ValueList))[0], (yyvsp[-1].ValueList)->size(), + GetElementPtrInst::getIndexedType(yyvsp[-2].ConstVal->getType(), &(*yyvsp[-1].ValueList)[0], yyvsp[-1].ValueList->size(), true); if (!IdxTy) GEN_ERROR("Index list invalid for constant getelementptr"); SmallVector IdxVec; - for (unsigned i = 0, e = (yyvsp[-1].ValueList)->size(); i != e; ++i) - if (Constant *C = dyn_cast((*(yyvsp[-1].ValueList))[i])) + for (unsigned i = 0, e = yyvsp[-1].ValueList->size(); i != e; ++i) + if (Constant *C = dyn_cast((*yyvsp[-1].ValueList)[i])) IdxVec.push_back(C); else GEN_ERROR("Indices to constant getelementptr must be constants"); - delete (yyvsp[-1].ValueList); + delete yyvsp[-1].ValueList; - (yyval.ConstVal) = ConstantExpr::getGetElementPtr((yyvsp[-2].ConstVal), &IdxVec[0], IdxVec.size()); + yyval.ConstVal = ConstantExpr::getGetElementPtr(yyvsp[-2].ConstVal, &IdxVec[0], IdxVec.size()); CHECK_FOR_ERROR ;} break; case 178: -#line 1900 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1900 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - if ((yyvsp[-5].ConstVal)->getType() != Type::Int1Ty) + if (yyvsp[-5].ConstVal->getType() != Type::Int1Ty) GEN_ERROR("Select condition must be of boolean type"); - if ((yyvsp[-3].ConstVal)->getType() != (yyvsp[-1].ConstVal)->getType()) + if (yyvsp[-3].ConstVal->getType() != yyvsp[-1].ConstVal->getType()) GEN_ERROR("Select operand types must match"); - (yyval.ConstVal) = ConstantExpr::getSelect((yyvsp[-5].ConstVal), (yyvsp[-3].ConstVal), (yyvsp[-1].ConstVal)); + yyval.ConstVal = ConstantExpr::getSelect(yyvsp[-5].ConstVal, yyvsp[-3].ConstVal, yyvsp[-1].ConstVal); CHECK_FOR_ERROR ;} break; case 179: -#line 1908 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1908 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - if ((yyvsp[-3].ConstVal)->getType() != (yyvsp[-1].ConstVal)->getType()) + if (yyvsp[-3].ConstVal->getType() != yyvsp[-1].ConstVal->getType()) GEN_ERROR("Binary operator types must match"); CHECK_FOR_ERROR; - (yyval.ConstVal) = ConstantExpr::get((yyvsp[-5].BinaryOpVal), (yyvsp[-3].ConstVal), (yyvsp[-1].ConstVal)); + yyval.ConstVal = ConstantExpr::get(yyvsp[-5].BinaryOpVal, yyvsp[-3].ConstVal, yyvsp[-1].ConstVal); ;} break; case 180: -#line 1914 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1914 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - if ((yyvsp[-3].ConstVal)->getType() != (yyvsp[-1].ConstVal)->getType()) + if (yyvsp[-3].ConstVal->getType() != yyvsp[-1].ConstVal->getType()) GEN_ERROR("Logical operator types must match"); - if (!(yyvsp[-3].ConstVal)->getType()->isInteger()) { - if (Instruction::isShift((yyvsp[-5].BinaryOpVal)) || !isa((yyvsp[-3].ConstVal)->getType()) || - !cast((yyvsp[-3].ConstVal)->getType())->getElementType()->isInteger()) + if (!yyvsp[-3].ConstVal->getType()->isInteger()) { + if (Instruction::isShift(yyvsp[-5].BinaryOpVal) || !isa(yyvsp[-3].ConstVal->getType()) || + !cast(yyvsp[-3].ConstVal->getType())->getElementType()->isInteger()) GEN_ERROR("Logical operator requires integral operands"); } - (yyval.ConstVal) = ConstantExpr::get((yyvsp[-5].BinaryOpVal), (yyvsp[-3].ConstVal), (yyvsp[-1].ConstVal)); + yyval.ConstVal = ConstantExpr::get(yyvsp[-5].BinaryOpVal, yyvsp[-3].ConstVal, yyvsp[-1].ConstVal); CHECK_FOR_ERROR ;} break; case 181: -#line 1925 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1925 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - if ((yyvsp[-3].ConstVal)->getType() != (yyvsp[-1].ConstVal)->getType()) + if (yyvsp[-3].ConstVal->getType() != yyvsp[-1].ConstVal->getType()) GEN_ERROR("icmp operand types must match"); - (yyval.ConstVal) = ConstantExpr::getICmp((yyvsp[-5].IPredicate), (yyvsp[-3].ConstVal), (yyvsp[-1].ConstVal)); + yyval.ConstVal = ConstantExpr::getICmp(yyvsp[-5].IPredicate, yyvsp[-3].ConstVal, yyvsp[-1].ConstVal); ;} break; case 182: -#line 1930 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1930 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - if ((yyvsp[-3].ConstVal)->getType() != (yyvsp[-1].ConstVal)->getType()) + if (yyvsp[-3].ConstVal->getType() != yyvsp[-1].ConstVal->getType()) GEN_ERROR("fcmp operand types must match"); - (yyval.ConstVal) = ConstantExpr::getFCmp((yyvsp[-5].FPredicate), (yyvsp[-3].ConstVal), (yyvsp[-1].ConstVal)); + yyval.ConstVal = ConstantExpr::getFCmp(yyvsp[-5].FPredicate, yyvsp[-3].ConstVal, yyvsp[-1].ConstVal); ;} break; case 183: -#line 1935 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1935 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - if (!ExtractElementInst::isValidOperands((yyvsp[-3].ConstVal), (yyvsp[-1].ConstVal))) + if (!ExtractElementInst::isValidOperands(yyvsp[-3].ConstVal, yyvsp[-1].ConstVal)) GEN_ERROR("Invalid extractelement operands"); - (yyval.ConstVal) = ConstantExpr::getExtractElement((yyvsp[-3].ConstVal), (yyvsp[-1].ConstVal)); + yyval.ConstVal = ConstantExpr::getExtractElement(yyvsp[-3].ConstVal, yyvsp[-1].ConstVal); CHECK_FOR_ERROR ;} break; case 184: -#line 1941 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1941 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - if (!InsertElementInst::isValidOperands((yyvsp[-5].ConstVal), (yyvsp[-3].ConstVal), (yyvsp[-1].ConstVal))) + if (!InsertElementInst::isValidOperands(yyvsp[-5].ConstVal, yyvsp[-3].ConstVal, yyvsp[-1].ConstVal)) GEN_ERROR("Invalid insertelement operands"); - (yyval.ConstVal) = ConstantExpr::getInsertElement((yyvsp[-5].ConstVal), (yyvsp[-3].ConstVal), (yyvsp[-1].ConstVal)); + yyval.ConstVal = ConstantExpr::getInsertElement(yyvsp[-5].ConstVal, yyvsp[-3].ConstVal, yyvsp[-1].ConstVal); CHECK_FOR_ERROR ;} break; case 185: -#line 1947 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1947 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - if (!ShuffleVectorInst::isValidOperands((yyvsp[-5].ConstVal), (yyvsp[-3].ConstVal), (yyvsp[-1].ConstVal))) + if (!ShuffleVectorInst::isValidOperands(yyvsp[-5].ConstVal, yyvsp[-3].ConstVal, yyvsp[-1].ConstVal)) GEN_ERROR("Invalid shufflevector operands"); - (yyval.ConstVal) = ConstantExpr::getShuffleVector((yyvsp[-5].ConstVal), (yyvsp[-3].ConstVal), (yyvsp[-1].ConstVal)); + yyval.ConstVal = ConstantExpr::getShuffleVector(yyvsp[-5].ConstVal, yyvsp[-3].ConstVal, yyvsp[-1].ConstVal); CHECK_FOR_ERROR ;} break; case 186: -#line 1956 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1956 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - ((yyval.ConstVector) = (yyvsp[-2].ConstVector))->push_back((yyvsp[0].ConstVal)); + (yyval.ConstVector = yyvsp[-2].ConstVector)->push_back(yyvsp[0].ConstVal); CHECK_FOR_ERROR ;} break; case 187: -#line 1960 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1960 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - (yyval.ConstVector) = new std::vector(); - (yyval.ConstVector)->push_back((yyvsp[0].ConstVal)); + yyval.ConstVector = new std::vector(); + yyval.ConstVector->push_back(yyvsp[0].ConstVal); CHECK_FOR_ERROR ;} break; case 188: -#line 1968 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.BoolVal) = false; ;} +#line 1968 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.BoolVal = false; ;} break; case 189: -#line 1968 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.BoolVal) = true; ;} +#line 1968 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.BoolVal = true; ;} break; case 190: -#line 1971 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.BoolVal) = true; ;} +#line 1971 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.BoolVal = true; ;} break; case 191: -#line 1971 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.BoolVal) = false; ;} +#line 1971 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.BoolVal = false; ;} break; case 192: -#line 1974 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1974 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - const Type* VTy = (yyvsp[-1].TypeVal)->get(); - Value *V = getVal(VTy, (yyvsp[0].ValIDVal)); + const Type* VTy = yyvsp[-1].TypeVal->get(); + Value *V = getVal(VTy, yyvsp[0].ValIDVal); GlobalValue* Aliasee = dyn_cast(V); if (!Aliasee) GEN_ERROR("Aliases can be created only to global values"); - (yyval.ConstVal) = Aliasee; + yyval.ConstVal = Aliasee; CHECK_FOR_ERROR - delete (yyvsp[-1].TypeVal); + delete yyvsp[-1].TypeVal; ;} break; case 193: -#line 1985 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1985 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - Constant *Val = (yyvsp[-3].ConstVal); - const Type *DestTy = (yyvsp[-1].TypeVal)->get(); - if (!CastInst::castIsValid((yyvsp[-5].CastOpVal), (yyvsp[-3].ConstVal), DestTy)) + Constant *Val = yyvsp[-3].ConstVal; + const Type *DestTy = yyvsp[-1].TypeVal->get(); + if (!CastInst::castIsValid(yyvsp[-5].CastOpVal, yyvsp[-3].ConstVal, DestTy)) GEN_ERROR("invalid cast opcode for cast from '" + Val->getType()->getDescription() + "' to '" + DestTy->getDescription() + "'"); - (yyval.ConstVal) = ConstantExpr::getCast((yyvsp[-5].CastOpVal), (yyvsp[-3].ConstVal), DestTy); + yyval.ConstVal = ConstantExpr::getCast(yyvsp[-5].CastOpVal, yyvsp[-3].ConstVal, DestTy); CHECK_FOR_ERROR - delete (yyvsp[-1].TypeVal); + delete yyvsp[-1].TypeVal; ;} break; case 194: -#line 2006 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2006 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - (yyval.ModuleVal) = ParserResult = CurModule.CurrentModule; + yyval.ModuleVal = ParserResult = CurModule.CurrentModule; CurModule.ModuleDone(); CHECK_FOR_ERROR; ;} break; case 195: -#line 2011 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2011 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - (yyval.ModuleVal) = ParserResult = CurModule.CurrentModule; + yyval.ModuleVal = ParserResult = CurModule.CurrentModule; CurModule.ModuleDone(); CHECK_FOR_ERROR; ;} break; case 198: -#line 2024 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2024 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { CurFun.isDeclare = false; ;} break; case 199: -#line 2024 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2024 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { CurFun.FunctionDone(); CHECK_FOR_ERROR @@ -4546,29 +4427,29 @@ break; case 200: -#line 2028 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2028 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { CurFun.isDeclare = true; ;} break; case 201: -#line 2028 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2028 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { CHECK_FOR_ERROR ;} break; case 202: -#line 2031 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2031 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { CHECK_FOR_ERROR ;} break; case 203: -#line 2034 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2034 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[0].TypeVal))->getDescription()); + GEN_ERROR("Invalid upreference in type: " + (*yyvsp[0].TypeVal)->getDescription()); // Eagerly resolve types. This is not an optimization, this is a // requirement that is due to the fact that we could have this: // @@ -4578,84 +4459,84 @@ // If types are not resolved eagerly, then the two types will not be // determined to be the same type! // - ResolveTypeTo((yyvsp[-2].StrVal), *(yyvsp[0].TypeVal)); + ResolveTypeTo(yyvsp[-2].StrVal, *yyvsp[0].TypeVal); - if (!setTypeName(*(yyvsp[0].TypeVal), (yyvsp[-2].StrVal)) && !(yyvsp[-2].StrVal)) { + if (!setTypeName(*yyvsp[0].TypeVal, yyvsp[-2].StrVal) && !yyvsp[-2].StrVal) { CHECK_FOR_ERROR // If this is a named type that is not a redefinition, add it to the slot // table. - CurModule.Types.push_back(*(yyvsp[0].TypeVal)); + CurModule.Types.push_back(*yyvsp[0].TypeVal); } - delete (yyvsp[0].TypeVal); + delete yyvsp[0].TypeVal; CHECK_FOR_ERROR ;} break; case 204: -#line 2058 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2058 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - ResolveTypeTo((yyvsp[-2].StrVal), (yyvsp[0].PrimType)); + ResolveTypeTo(yyvsp[-2].StrVal, yyvsp[0].PrimType); - if (!setTypeName((yyvsp[0].PrimType), (yyvsp[-2].StrVal)) && !(yyvsp[-2].StrVal)) { + if (!setTypeName(yyvsp[0].PrimType, yyvsp[-2].StrVal) && !yyvsp[-2].StrVal) { CHECK_FOR_ERROR // If this is a named type that is not a redefinition, add it to the slot // table. - CurModule.Types.push_back((yyvsp[0].PrimType)); + CurModule.Types.push_back(yyvsp[0].PrimType); } CHECK_FOR_ERROR ;} break; case 205: -#line 2069 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2069 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { /* "Externally Visible" Linkage */ - if ((yyvsp[0].ConstVal) == 0) + if (yyvsp[0].ConstVal == 0) GEN_ERROR("Global value initializer is not a constant"); - CurGV = ParseGlobalVariable((yyvsp[-4].StrVal), GlobalValue::ExternalLinkage, - (yyvsp[-3].Visibility), (yyvsp[-1].BoolVal), (yyvsp[0].ConstVal)->getType(), (yyvsp[0].ConstVal), (yyvsp[-2].BoolVal)); + CurGV = ParseGlobalVariable(yyvsp[-4].StrVal, GlobalValue::ExternalLinkage, + yyvsp[-3].Visibility, yyvsp[-1].BoolVal, yyvsp[0].ConstVal->getType(), yyvsp[0].ConstVal, yyvsp[-2].BoolVal); CHECK_FOR_ERROR ;} break; case 206: -#line 2076 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2076 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { CurGV = 0; ;} break; case 207: -#line 2080 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2080 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - if ((yyvsp[0].ConstVal) == 0) + if (yyvsp[0].ConstVal == 0) GEN_ERROR("Global value initializer is not a constant"); - CurGV = ParseGlobalVariable((yyvsp[-5].StrVal), (yyvsp[-4].Linkage), (yyvsp[-3].Visibility), (yyvsp[-1].BoolVal), (yyvsp[0].ConstVal)->getType(), (yyvsp[0].ConstVal), (yyvsp[-2].BoolVal)); + CurGV = ParseGlobalVariable(yyvsp[-5].StrVal, yyvsp[-4].Linkage, yyvsp[-3].Visibility, yyvsp[-1].BoolVal, yyvsp[0].ConstVal->getType(), yyvsp[0].ConstVal, yyvsp[-2].BoolVal); CHECK_FOR_ERROR ;} break; case 208: -#line 2085 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2085 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { CurGV = 0; ;} break; case 209: -#line 2089 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2089 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[0].TypeVal))->getDescription()); - CurGV = ParseGlobalVariable((yyvsp[-5].StrVal), (yyvsp[-4].Linkage), (yyvsp[-3].Visibility), (yyvsp[-1].BoolVal), *(yyvsp[0].TypeVal), 0, (yyvsp[-2].BoolVal)); + GEN_ERROR("Invalid upreference in type: " + (*yyvsp[0].TypeVal)->getDescription()); + CurGV = ParseGlobalVariable(yyvsp[-5].StrVal, yyvsp[-4].Linkage, yyvsp[-3].Visibility, yyvsp[-1].BoolVal, *yyvsp[0].TypeVal, 0, yyvsp[-2].BoolVal); CHECK_FOR_ERROR - delete (yyvsp[0].TypeVal); + delete yyvsp[0].TypeVal; ;} break; case 210: -#line 2095 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2095 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { CurGV = 0; CHECK_FOR_ERROR @@ -4663,186 +4544,186 @@ break; case 211: -#line 2099 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2099 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { std::string Name; - if ((yyvsp[-4].StrVal)) { - Name = *(yyvsp[-4].StrVal); - delete (yyvsp[-4].StrVal); + if (yyvsp[-4].StrVal) { + Name = *yyvsp[-4].StrVal; + delete yyvsp[-4].StrVal; } if (Name.empty()) GEN_ERROR("Alias name cannot be empty"); - Constant* Aliasee = (yyvsp[0].ConstVal); + Constant* Aliasee = yyvsp[0].ConstVal; if (Aliasee == 0) GEN_ERROR(std::string("Invalid aliasee for alias: ") + Name); - GlobalAlias* GA = new GlobalAlias(Aliasee->getType(), (yyvsp[-1].Linkage), Name, Aliasee, + GlobalAlias* GA = new GlobalAlias(Aliasee->getType(), yyvsp[-1].Linkage, Name, Aliasee, CurModule.CurrentModule); - GA->setVisibility((yyvsp[-3].Visibility)); + GA->setVisibility(yyvsp[-3].Visibility); InsertValue(GA, CurModule.Values); CHECK_FOR_ERROR ;} break; case 212: -#line 2118 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2118 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { CHECK_FOR_ERROR ;} break; case 213: -#line 2121 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2121 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { CHECK_FOR_ERROR ;} break; case 214: -#line 2127 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2127 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { const std::string &AsmSoFar = CurModule.CurrentModule->getModuleInlineAsm(); if (AsmSoFar.empty()) - CurModule.CurrentModule->setModuleInlineAsm(*(yyvsp[0].StrVal)); + CurModule.CurrentModule->setModuleInlineAsm(*yyvsp[0].StrVal); else - CurModule.CurrentModule->setModuleInlineAsm(AsmSoFar+"\n"+*(yyvsp[0].StrVal)); - delete (yyvsp[0].StrVal); + CurModule.CurrentModule->setModuleInlineAsm(AsmSoFar+"\n"+*yyvsp[0].StrVal); + delete yyvsp[0].StrVal; CHECK_FOR_ERROR ;} break; case 215: -#line 2137 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2137 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - CurModule.CurrentModule->setTargetTriple(*(yyvsp[0].StrVal)); - delete (yyvsp[0].StrVal); + CurModule.CurrentModule->setTargetTriple(*yyvsp[0].StrVal); + delete yyvsp[0].StrVal; ;} break; case 216: -#line 2141 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2141 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - CurModule.CurrentModule->setDataLayout(*(yyvsp[0].StrVal)); - delete (yyvsp[0].StrVal); + CurModule.CurrentModule->setDataLayout(*yyvsp[0].StrVal); + delete yyvsp[0].StrVal; ;} break; case 218: -#line 2148 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2148 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - CurModule.CurrentModule->addLibrary(*(yyvsp[0].StrVal)); - delete (yyvsp[0].StrVal); + CurModule.CurrentModule->addLibrary(*yyvsp[0].StrVal); + delete yyvsp[0].StrVal; CHECK_FOR_ERROR ;} break; case 219: -#line 2153 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2153 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - CurModule.CurrentModule->addLibrary(*(yyvsp[0].StrVal)); - delete (yyvsp[0].StrVal); + CurModule.CurrentModule->addLibrary(*yyvsp[0].StrVal); + delete yyvsp[0].StrVal; CHECK_FOR_ERROR ;} break; case 220: -#line 2158 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2158 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { CHECK_FOR_ERROR ;} break; case 221: -#line 2167 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2167 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-2].TypeVal))->getDescription()); - if (*(yyvsp[-2].TypeVal) == Type::VoidTy) + GEN_ERROR("Invalid upreference in type: " + (*yyvsp[-2].TypeVal)->getDescription()); + if (*yyvsp[-2].TypeVal == Type::VoidTy) GEN_ERROR("void typed arguments are invalid"); - ArgListEntry E; E.Attrs = (yyvsp[-1].ParamAttrs); E.Ty = (yyvsp[-2].TypeVal); E.Name = (yyvsp[0].StrVal); - (yyval.ArgList) = (yyvsp[-4].ArgList); - (yyvsp[-4].ArgList)->push_back(E); + ArgListEntry E; E.Attrs = yyvsp[-1].ParamAttrs; E.Ty = yyvsp[-2].TypeVal; E.Name = yyvsp[0].StrVal; + yyval.ArgList = yyvsp[-4].ArgList; + yyvsp[-4].ArgList->push_back(E); CHECK_FOR_ERROR ;} break; case 222: -#line 2177 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2177 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-2].TypeVal))->getDescription()); - if (*(yyvsp[-2].TypeVal) == Type::VoidTy) + GEN_ERROR("Invalid upreference in type: " + (*yyvsp[-2].TypeVal)->getDescription()); + if (*yyvsp[-2].TypeVal == Type::VoidTy) GEN_ERROR("void typed arguments are invalid"); - ArgListEntry E; E.Attrs = (yyvsp[-1].ParamAttrs); E.Ty = (yyvsp[-2].TypeVal); E.Name = (yyvsp[0].StrVal); - (yyval.ArgList) = new ArgListType; - (yyval.ArgList)->push_back(E); + ArgListEntry E; E.Attrs = yyvsp[-1].ParamAttrs; E.Ty = yyvsp[-2].TypeVal; E.Name = yyvsp[0].StrVal; + yyval.ArgList = new ArgListType; + yyval.ArgList->push_back(E); CHECK_FOR_ERROR ;} break; case 223: -#line 2188 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2188 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - (yyval.ArgList) = (yyvsp[0].ArgList); + yyval.ArgList = yyvsp[0].ArgList; CHECK_FOR_ERROR ;} break; case 224: -#line 2192 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2192 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - (yyval.ArgList) = (yyvsp[-2].ArgList); + yyval.ArgList = yyvsp[-2].ArgList; struct ArgListEntry E; E.Ty = new PATypeHolder(Type::VoidTy); E.Name = 0; E.Attrs = ParamAttr::None; - (yyval.ArgList)->push_back(E); + yyval.ArgList->push_back(E); CHECK_FOR_ERROR ;} break; case 225: -#line 2201 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2201 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - (yyval.ArgList) = new ArgListType; + yyval.ArgList = new ArgListType; struct ArgListEntry E; E.Ty = new PATypeHolder(Type::VoidTy); E.Name = 0; E.Attrs = ParamAttr::None; - (yyval.ArgList)->push_back(E); + yyval.ArgList->push_back(E); CHECK_FOR_ERROR ;} break; case 226: -#line 2210 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2210 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - (yyval.ArgList) = 0; + yyval.ArgList = 0; CHECK_FOR_ERROR ;} break; case 227: -#line 2216 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2216 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - std::string FunctionName(*(yyvsp[-6].StrVal)); - delete (yyvsp[-6].StrVal); // Free strdup'd memory! + std::string FunctionName(*yyvsp[-6].StrVal); + delete yyvsp[-6].StrVal; // Free strdup'd memory! // Check the function result for abstractness if this is a define. We should // have no abstract types at this point - if (!CurFun.isDeclare && CurModule.TypeIsUnresolved((yyvsp[-7].TypeVal))) - GEN_ERROR("Reference to abstract result: "+ (yyvsp[-7].TypeVal)->get()->getDescription()); + if (!CurFun.isDeclare && CurModule.TypeIsUnresolved(yyvsp[-7].TypeVal)) + GEN_ERROR("Reference to abstract result: "+ yyvsp[-7].TypeVal->get()->getDescription()); std::vector ParamTypeList; ParamAttrsVector Attrs; - if ((yyvsp[-2].ParamAttrs) != ParamAttr::None) { - ParamAttrsWithIndex PAWI; PAWI.index = 0; PAWI.attrs = (yyvsp[-2].ParamAttrs); + if (yyvsp[-2].ParamAttrs != ParamAttr::None) { + ParamAttrsWithIndex PAWI; PAWI.index = 0; PAWI.attrs = yyvsp[-2].ParamAttrs; Attrs.push_back(PAWI); } - if ((yyvsp[-4].ArgList)) { // If there are arguments... + if (yyvsp[-4].ArgList) { // If there are arguments... unsigned index = 1; - for (ArgListType::iterator I = (yyvsp[-4].ArgList)->begin(); I != (yyvsp[-4].ArgList)->end(); ++I, ++index) { + for (ArgListType::iterator I = yyvsp[-4].ArgList->begin(); I != yyvsp[-4].ArgList->end(); ++I, ++index) { const Type* Ty = I->Ty->get(); if (!CurFun.isDeclare && CurModule.TypeIsUnresolved(I->Ty)) GEN_ERROR("Reference to abstract argument: " + Ty->getDescription()); @@ -4862,9 +4743,9 @@ if (!Attrs.empty()) PAL = ParamAttrsList::get(Attrs); - FunctionType *FT = FunctionType::get(*(yyvsp[-7].TypeVal), ParamTypeList, isVarArg, PAL); + FunctionType *FT = FunctionType::get(*yyvsp[-7].TypeVal, ParamTypeList, isVarArg, PAL); const PointerType *PFT = PointerType::get(FT); - delete (yyvsp[-7].TypeVal); + delete yyvsp[-7].TypeVal; ValID ID; if (!FunctionName.empty()) { @@ -4913,26 +4794,26 @@ Fn->setLinkage(CurFun.Linkage); Fn->setVisibility(CurFun.Visibility); } - Fn->setCallingConv((yyvsp[-8].UIntVal)); - Fn->setAlignment((yyvsp[0].UIntVal)); - if ((yyvsp[-1].StrVal)) { - Fn->setSection(*(yyvsp[-1].StrVal)); - delete (yyvsp[-1].StrVal); + Fn->setCallingConv(yyvsp[-8].UIntVal); + Fn->setAlignment(yyvsp[0].UIntVal); + if (yyvsp[-1].StrVal) { + Fn->setSection(*yyvsp[-1].StrVal); + delete yyvsp[-1].StrVal; } // Add all of the arguments we parsed to the function... - if ((yyvsp[-4].ArgList)) { // Is null if empty... + if (yyvsp[-4].ArgList) { // Is null if empty... if (isVarArg) { // Nuke the last entry - assert((yyvsp[-4].ArgList)->back().Ty->get() == Type::VoidTy && (yyvsp[-4].ArgList)->back().Name == 0 && + assert(yyvsp[-4].ArgList->back().Ty->get() == Type::VoidTy && yyvsp[-4].ArgList->back().Name == 0 && "Not a varargs marker!"); - delete (yyvsp[-4].ArgList)->back().Ty; - (yyvsp[-4].ArgList)->pop_back(); // Delete the last entry + delete yyvsp[-4].ArgList->back().Ty; + yyvsp[-4].ArgList->pop_back(); // Delete the last entry } Function::arg_iterator ArgIt = Fn->arg_begin(); Function::arg_iterator ArgEnd = Fn->arg_end(); unsigned Idx = 1; - for (ArgListType::iterator I = (yyvsp[-4].ArgList)->begin(); - I != (yyvsp[-4].ArgList)->end() && ArgIt != ArgEnd; ++I, ++ArgIt) { + for (ArgListType::iterator I = yyvsp[-4].ArgList->begin(); + I != yyvsp[-4].ArgList->end() && ArgIt != ArgEnd; ++I, ++ArgIt) { delete I->Ty; // Delete the typeholder... setValueName(ArgIt, I->Name); // Insert arg into symtab... CHECK_FOR_ERROR @@ -4940,128 +4821,128 @@ Idx++; } - delete (yyvsp[-4].ArgList); // We're now done with the argument list + delete yyvsp[-4].ArgList; // We're now done with the argument list } CHECK_FOR_ERROR ;} break; case 230: -#line 2338 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2338 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - (yyval.FunctionVal) = CurFun.CurrentFunction; + yyval.FunctionVal = CurFun.CurrentFunction; // Make sure that we keep track of the linkage type even if there was a // previous "declare". - (yyval.FunctionVal)->setLinkage((yyvsp[-3].Linkage)); - (yyval.FunctionVal)->setVisibility((yyvsp[-2].Visibility)); + yyval.FunctionVal->setLinkage(yyvsp[-3].Linkage); + yyval.FunctionVal->setVisibility(yyvsp[-2].Visibility); ;} break; case 233: -#line 2349 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2349 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - (yyval.FunctionVal) = (yyvsp[-1].FunctionVal); + yyval.FunctionVal = yyvsp[-1].FunctionVal; CHECK_FOR_ERROR ;} break; case 234: -#line 2354 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2354 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - CurFun.CurrentFunction->setLinkage((yyvsp[-2].Linkage)); - CurFun.CurrentFunction->setVisibility((yyvsp[-1].Visibility)); - (yyval.FunctionVal) = CurFun.CurrentFunction; + CurFun.CurrentFunction->setLinkage(yyvsp[-2].Linkage); + CurFun.CurrentFunction->setVisibility(yyvsp[-1].Visibility); + yyval.FunctionVal = CurFun.CurrentFunction; CurFun.FunctionDone(); CHECK_FOR_ERROR ;} break; case 235: -#line 2366 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2366 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - (yyval.BoolVal) = false; + yyval.BoolVal = false; CHECK_FOR_ERROR ;} break; case 236: -#line 2370 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2370 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - (yyval.BoolVal) = true; + yyval.BoolVal = true; CHECK_FOR_ERROR ;} break; case 237: -#line 2375 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2375 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { // A reference to a direct constant - (yyval.ValIDVal) = ValID::create((yyvsp[0].SInt64Val)); + yyval.ValIDVal = ValID::create(yyvsp[0].SInt64Val); CHECK_FOR_ERROR ;} break; case 238: -#line 2379 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2379 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - (yyval.ValIDVal) = ValID::create((yyvsp[0].UInt64Val)); + yyval.ValIDVal = ValID::create(yyvsp[0].UInt64Val); CHECK_FOR_ERROR ;} break; case 239: -#line 2383 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2383 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { // Perhaps it's an FP constant? - (yyval.ValIDVal) = ValID::create((yyvsp[0].FPVal)); + yyval.ValIDVal = ValID::create(yyvsp[0].FPVal); CHECK_FOR_ERROR ;} break; case 240: -#line 2387 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2387 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - (yyval.ValIDVal) = ValID::create(ConstantInt::getTrue()); + yyval.ValIDVal = ValID::create(ConstantInt::getTrue()); CHECK_FOR_ERROR ;} break; case 241: -#line 2391 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2391 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - (yyval.ValIDVal) = ValID::create(ConstantInt::getFalse()); + yyval.ValIDVal = ValID::create(ConstantInt::getFalse()); CHECK_FOR_ERROR ;} break; case 242: -#line 2395 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2395 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - (yyval.ValIDVal) = ValID::createNull(); + yyval.ValIDVal = ValID::createNull(); CHECK_FOR_ERROR ;} break; case 243: -#line 2399 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2399 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - (yyval.ValIDVal) = ValID::createUndef(); + yyval.ValIDVal = ValID::createUndef(); CHECK_FOR_ERROR ;} break; case 244: -#line 2403 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2403 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { // A vector zero constant. - (yyval.ValIDVal) = ValID::createZeroInit(); + yyval.ValIDVal = ValID::createZeroInit(); CHECK_FOR_ERROR ;} break; case 245: -#line 2407 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2407 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { // Nonempty unsized packed vector - const Type *ETy = (*(yyvsp[-1].ConstVector))[0]->getType(); - int NumElements = (yyvsp[-1].ConstVector)->size(); + const Type *ETy = (*yyvsp[-1].ConstVector)[0]->getType(); + int NumElements = yyvsp[-1].ConstVector->size(); VectorType* pt = VectorType::get(ETy, NumElements); PATypeHolder* PTy = new PATypeHolder( @@ -5073,233 +4954,233 @@ ); // Verify all elements are correct type! - for (unsigned i = 0; i < (yyvsp[-1].ConstVector)->size(); i++) { - if (ETy != (*(yyvsp[-1].ConstVector))[i]->getType()) + for (unsigned i = 0; i < yyvsp[-1].ConstVector->size(); i++) { + if (ETy != (*yyvsp[-1].ConstVector)[i]->getType()) GEN_ERROR("Element #" + utostr(i) + " is not of type '" + ETy->getDescription() +"' as required!\nIt is of type '" + - (*(yyvsp[-1].ConstVector))[i]->getType()->getDescription() + "'."); + (*yyvsp[-1].ConstVector)[i]->getType()->getDescription() + "'."); } - (yyval.ValIDVal) = ValID::create(ConstantVector::get(pt, *(yyvsp[-1].ConstVector))); - delete PTy; delete (yyvsp[-1].ConstVector); + yyval.ValIDVal = ValID::create(ConstantVector::get(pt, *yyvsp[-1].ConstVector)); + delete PTy; delete yyvsp[-1].ConstVector; CHECK_FOR_ERROR ;} break; case 246: -#line 2432 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2432 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - (yyval.ValIDVal) = ValID::create((yyvsp[0].ConstVal)); + yyval.ValIDVal = ValID::create(yyvsp[0].ConstVal); CHECK_FOR_ERROR ;} break; case 247: -#line 2436 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2436 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - (yyval.ValIDVal) = ValID::createInlineAsm(*(yyvsp[-2].StrVal), *(yyvsp[0].StrVal), (yyvsp[-3].BoolVal)); - delete (yyvsp[-2].StrVal); - delete (yyvsp[0].StrVal); + yyval.ValIDVal = ValID::createInlineAsm(*yyvsp[-2].StrVal, *yyvsp[0].StrVal, yyvsp[-3].BoolVal); + delete yyvsp[-2].StrVal; + delete yyvsp[0].StrVal; CHECK_FOR_ERROR ;} break; case 248: -#line 2446 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2446 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { // Is it an integer reference...? - (yyval.ValIDVal) = ValID::createLocalID((yyvsp[0].UIntVal)); + yyval.ValIDVal = ValID::createLocalID(yyvsp[0].UIntVal); CHECK_FOR_ERROR ;} break; case 249: -#line 2450 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2450 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - (yyval.ValIDVal) = ValID::createGlobalID((yyvsp[0].UIntVal)); + yyval.ValIDVal = ValID::createGlobalID(yyvsp[0].UIntVal); CHECK_FOR_ERROR ;} break; case 250: -#line 2454 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2454 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { // Is it a named reference...? - (yyval.ValIDVal) = ValID::createLocalName(*(yyvsp[0].StrVal)); - delete (yyvsp[0].StrVal); + yyval.ValIDVal = ValID::createLocalName(*yyvsp[0].StrVal); + delete yyvsp[0].StrVal; CHECK_FOR_ERROR ;} break; case 251: -#line 2459 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2459 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { // Is it a named reference...? - (yyval.ValIDVal) = ValID::createGlobalName(*(yyvsp[0].StrVal)); - delete (yyvsp[0].StrVal); + yyval.ValIDVal = ValID::createGlobalName(*yyvsp[0].StrVal); + delete yyvsp[0].StrVal; CHECK_FOR_ERROR ;} break; case 254: -#line 2472 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2472 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-1].TypeVal))->getDescription()); - (yyval.ValueVal) = getVal(*(yyvsp[-1].TypeVal), (yyvsp[0].ValIDVal)); - delete (yyvsp[-1].TypeVal); + GEN_ERROR("Invalid upreference in type: " + (*yyvsp[-1].TypeVal)->getDescription()); + yyval.ValueVal = getVal(*yyvsp[-1].TypeVal, yyvsp[0].ValIDVal); + delete yyvsp[-1].TypeVal; CHECK_FOR_ERROR ;} break; case 255: -#line 2481 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2481 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - (yyval.FunctionVal) = (yyvsp[-1].FunctionVal); + yyval.FunctionVal = yyvsp[-1].FunctionVal; CHECK_FOR_ERROR ;} break; case 256: -#line 2485 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2485 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { // Do not allow functions with 0 basic blocks - (yyval.FunctionVal) = (yyvsp[-1].FunctionVal); + yyval.FunctionVal = yyvsp[-1].FunctionVal; CHECK_FOR_ERROR ;} break; case 257: -#line 2494 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2494 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - setValueName((yyvsp[0].TermInstVal), (yyvsp[-1].StrVal)); + setValueName(yyvsp[0].TermInstVal, yyvsp[-1].StrVal); CHECK_FOR_ERROR - InsertValue((yyvsp[0].TermInstVal)); - (yyvsp[-2].BasicBlockVal)->getInstList().push_back((yyvsp[0].TermInstVal)); - (yyval.BasicBlockVal) = (yyvsp[-2].BasicBlockVal); + InsertValue(yyvsp[0].TermInstVal); + yyvsp[-2].BasicBlockVal->getInstList().push_back(yyvsp[0].TermInstVal); + yyval.BasicBlockVal = yyvsp[-2].BasicBlockVal; CHECK_FOR_ERROR ;} break; case 258: -#line 2503 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2503 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - if (CastInst *CI1 = dyn_cast((yyvsp[0].InstVal))) + if (CastInst *CI1 = dyn_cast(yyvsp[0].InstVal)) if (CastInst *CI2 = dyn_cast(CI1->getOperand(0))) if (CI2->getParent() == 0) - (yyvsp[-1].BasicBlockVal)->getInstList().push_back(CI2); - (yyvsp[-1].BasicBlockVal)->getInstList().push_back((yyvsp[0].InstVal)); - (yyval.BasicBlockVal) = (yyvsp[-1].BasicBlockVal); + yyvsp[-1].BasicBlockVal->getInstList().push_back(CI2); + yyvsp[-1].BasicBlockVal->getInstList().push_back(yyvsp[0].InstVal); + yyval.BasicBlockVal = yyvsp[-1].BasicBlockVal; CHECK_FOR_ERROR ;} break; case 259: -#line 2512 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2512 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { // Empty space between instruction lists - (yyval.BasicBlockVal) = defineBBVal(ValID::createLocalID(CurFun.NextValNum)); + yyval.BasicBlockVal = defineBBVal(ValID::createLocalID(CurFun.NextValNum)); CHECK_FOR_ERROR ;} break; case 260: -#line 2516 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2516 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { // Labelled (named) basic block - (yyval.BasicBlockVal) = defineBBVal(ValID::createLocalName(*(yyvsp[0].StrVal))); - delete (yyvsp[0].StrVal); + yyval.BasicBlockVal = defineBBVal(ValID::createLocalName(*yyvsp[0].StrVal)); + delete yyvsp[0].StrVal; CHECK_FOR_ERROR ;} break; case 261: -#line 2523 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2523 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { // Return with a result... - (yyval.TermInstVal) = new ReturnInst((yyvsp[0].ValueVal)); + yyval.TermInstVal = new ReturnInst(yyvsp[0].ValueVal); CHECK_FOR_ERROR ;} break; case 262: -#line 2527 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2527 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { // Return with no result... - (yyval.TermInstVal) = new ReturnInst(); + yyval.TermInstVal = new ReturnInst(); CHECK_FOR_ERROR ;} break; case 263: -#line 2531 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2531 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { // Unconditional Branch... - BasicBlock* tmpBB = getBBVal((yyvsp[0].ValIDVal)); + BasicBlock* tmpBB = getBBVal(yyvsp[0].ValIDVal); CHECK_FOR_ERROR - (yyval.TermInstVal) = new BranchInst(tmpBB); + yyval.TermInstVal = new BranchInst(tmpBB); ;} break; case 264: -#line 2536 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2536 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - assert(cast((yyvsp[-7].PrimType))->getBitWidth() == 1 && "Not Bool?"); - BasicBlock* tmpBBA = getBBVal((yyvsp[-3].ValIDVal)); + assert(cast(yyvsp[-7].PrimType)->getBitWidth() == 1 && "Not Bool?"); + BasicBlock* tmpBBA = getBBVal(yyvsp[-3].ValIDVal); CHECK_FOR_ERROR - BasicBlock* tmpBBB = getBBVal((yyvsp[0].ValIDVal)); + BasicBlock* tmpBBB = getBBVal(yyvsp[0].ValIDVal); CHECK_FOR_ERROR - Value* tmpVal = getVal(Type::Int1Ty, (yyvsp[-6].ValIDVal)); + Value* tmpVal = getVal(Type::Int1Ty, yyvsp[-6].ValIDVal); CHECK_FOR_ERROR - (yyval.TermInstVal) = new BranchInst(tmpBBA, tmpBBB, tmpVal); + yyval.TermInstVal = new BranchInst(tmpBBA, tmpBBB, tmpVal); ;} break; case 265: -#line 2546 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2546 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - Value* tmpVal = getVal((yyvsp[-7].PrimType), (yyvsp[-6].ValIDVal)); + Value* tmpVal = getVal(yyvsp[-7].PrimType, yyvsp[-6].ValIDVal); CHECK_FOR_ERROR - BasicBlock* tmpBB = getBBVal((yyvsp[-3].ValIDVal)); + BasicBlock* tmpBB = getBBVal(yyvsp[-3].ValIDVal); CHECK_FOR_ERROR - SwitchInst *S = new SwitchInst(tmpVal, tmpBB, (yyvsp[-1].JumpTable)->size()); - (yyval.TermInstVal) = S; + SwitchInst *S = new SwitchInst(tmpVal, tmpBB, yyvsp[-1].JumpTable->size()); + yyval.TermInstVal = S; - std::vector >::iterator I = (yyvsp[-1].JumpTable)->begin(), - E = (yyvsp[-1].JumpTable)->end(); + std::vector >::iterator I = yyvsp[-1].JumpTable->begin(), + E = yyvsp[-1].JumpTable->end(); for (; I != E; ++I) { if (ConstantInt *CI = dyn_cast(I->first)) S->addCase(CI, I->second); else GEN_ERROR("Switch case is constant, but not a simple integer"); } - delete (yyvsp[-1].JumpTable); + delete yyvsp[-1].JumpTable; CHECK_FOR_ERROR ;} break; case 266: -#line 2565 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2565 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - Value* tmpVal = getVal((yyvsp[-6].PrimType), (yyvsp[-5].ValIDVal)); + Value* tmpVal = getVal(yyvsp[-6].PrimType, yyvsp[-5].ValIDVal); CHECK_FOR_ERROR - BasicBlock* tmpBB = getBBVal((yyvsp[-2].ValIDVal)); + BasicBlock* tmpBB = getBBVal(yyvsp[-2].ValIDVal); CHECK_FOR_ERROR SwitchInst *S = new SwitchInst(tmpVal, tmpBB, 0); - (yyval.TermInstVal) = S; + yyval.TermInstVal = S; CHECK_FOR_ERROR ;} break; case 267: -#line 2575 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2575 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { // Handle the short syntax const PointerType *PFTy = 0; const FunctionType *Ty = 0; - if (!(PFTy = dyn_cast((yyvsp[-11].TypeVal)->get())) || + if (!(PFTy = dyn_cast(yyvsp[-11].TypeVal->get())) || !(Ty = dyn_cast(PFTy->getElementType()))) { // Pull out the types of all of the arguments... std::vector ParamTypes; ParamAttrsVector Attrs; - if ((yyvsp[-6].ParamAttrs) != ParamAttr::None) { - ParamAttrsWithIndex PAWI; PAWI.index = 0; PAWI.attrs = (yyvsp[-6].ParamAttrs); + if (yyvsp[-6].ParamAttrs != ParamAttr::None) { + ParamAttrsWithIndex PAWI; PAWI.index = 0; PAWI.attrs = yyvsp[-6].ParamAttrs; Attrs.push_back(PAWI); } - ValueRefList::iterator I = (yyvsp[-8].ValueRefList)->begin(), E = (yyvsp[-8].ValueRefList)->end(); + ValueRefList::iterator I = yyvsp[-8].ValueRefList->begin(), E = yyvsp[-8].ValueRefList->end(); unsigned index = 1; for (; I != E; ++I, ++index) { const Type *Ty = I->Val->getType(); @@ -5315,22 +5196,22 @@ ParamAttrsList *PAL = 0; if (!Attrs.empty()) PAL = ParamAttrsList::get(Attrs); - Ty = FunctionType::get((yyvsp[-11].TypeVal)->get(), ParamTypes, false, PAL); + Ty = FunctionType::get(yyvsp[-11].TypeVal->get(), ParamTypes, false, PAL); PFTy = PointerType::get(Ty); } - delete (yyvsp[-11].TypeVal); + delete yyvsp[-11].TypeVal; - Value *V = getVal(PFTy, (yyvsp[-10].ValIDVal)); // Get the function we're calling... + Value *V = getVal(PFTy, yyvsp[-10].ValIDVal); // Get the function we're calling... CHECK_FOR_ERROR - BasicBlock *Normal = getBBVal((yyvsp[-3].ValIDVal)); + BasicBlock *Normal = getBBVal(yyvsp[-3].ValIDVal); CHECK_FOR_ERROR - BasicBlock *Except = getBBVal((yyvsp[0].ValIDVal)); + BasicBlock *Except = getBBVal(yyvsp[0].ValIDVal); CHECK_FOR_ERROR // Check the arguments ValueList Args; - if ((yyvsp[-8].ValueRefList)->empty()) { // Has no arguments? + if (yyvsp[-8].ValueRefList->empty()) { // Has no arguments? // Make sure no arguments is a good thing! if (Ty->getNumParams() != 0) GEN_ERROR("No arguments passed to a function that " @@ -5340,7 +5221,7 @@ // correctly! FunctionType::param_iterator I = Ty->param_begin(); FunctionType::param_iterator E = Ty->param_end(); - ValueRefList::iterator ArgI = (yyvsp[-8].ValueRefList)->begin(), ArgE = (yyvsp[-8].ValueRefList)->end(); + ValueRefList::iterator ArgI = yyvsp[-8].ValueRefList->begin(), ArgE = yyvsp[-8].ValueRefList->end(); for (; ArgI != ArgE && I != E; ++ArgI, ++I) { if (ArgI->Val->getType() != *I) @@ -5359,348 +5240,348 @@ // Create the InvokeInst InvokeInst *II = new InvokeInst(V, Normal, Except, &Args[0], Args.size()); - II->setCallingConv((yyvsp[-12].UIntVal)); - (yyval.TermInstVal) = II; - delete (yyvsp[-8].ValueRefList); + II->setCallingConv(yyvsp[-12].UIntVal); + yyval.TermInstVal = II; + delete yyvsp[-8].ValueRefList; CHECK_FOR_ERROR ;} break; case 268: -#line 2654 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2654 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - (yyval.TermInstVal) = new UnwindInst(); + yyval.TermInstVal = new UnwindInst(); CHECK_FOR_ERROR ;} break; case 269: -#line 2658 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2658 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - (yyval.TermInstVal) = new UnreachableInst(); + yyval.TermInstVal = new UnreachableInst(); CHECK_FOR_ERROR ;} break; case 270: -#line 2665 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2665 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - (yyval.JumpTable) = (yyvsp[-5].JumpTable); - Constant *V = cast(getExistingVal((yyvsp[-4].PrimType), (yyvsp[-3].ValIDVal))); + yyval.JumpTable = yyvsp[-5].JumpTable; + Constant *V = cast(getExistingVal(yyvsp[-4].PrimType, yyvsp[-3].ValIDVal)); CHECK_FOR_ERROR if (V == 0) GEN_ERROR("May only switch on a constant pool value"); - BasicBlock* tmpBB = getBBVal((yyvsp[0].ValIDVal)); + BasicBlock* tmpBB = getBBVal(yyvsp[0].ValIDVal); CHECK_FOR_ERROR - (yyval.JumpTable)->push_back(std::make_pair(V, tmpBB)); + yyval.JumpTable->push_back(std::make_pair(V, tmpBB)); ;} break; case 271: -#line 2676 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2676 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - (yyval.JumpTable) = new std::vector >(); - Constant *V = cast(getExistingVal((yyvsp[-4].PrimType), (yyvsp[-3].ValIDVal))); + yyval.JumpTable = new std::vector >(); + Constant *V = cast(getExistingVal(yyvsp[-4].PrimType, yyvsp[-3].ValIDVal)); CHECK_FOR_ERROR if (V == 0) GEN_ERROR("May only switch on a constant pool value"); - BasicBlock* tmpBB = getBBVal((yyvsp[0].ValIDVal)); + BasicBlock* tmpBB = getBBVal(yyvsp[0].ValIDVal); CHECK_FOR_ERROR - (yyval.JumpTable)->push_back(std::make_pair(V, tmpBB)); + yyval.JumpTable->push_back(std::make_pair(V, tmpBB)); ;} break; case 272: -#line 2689 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2689 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { // Is this definition named?? if so, assign the name... - setValueName((yyvsp[0].InstVal), (yyvsp[-1].StrVal)); + setValueName(yyvsp[0].InstVal, yyvsp[-1].StrVal); CHECK_FOR_ERROR - InsertValue((yyvsp[0].InstVal)); - (yyval.InstVal) = (yyvsp[0].InstVal); + InsertValue(yyvsp[0].InstVal); + yyval.InstVal = yyvsp[0].InstVal; CHECK_FOR_ERROR ;} break; case 273: -#line 2699 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2699 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { // Used for PHI nodes if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-5].TypeVal))->getDescription()); - (yyval.PHIList) = new std::list >(); - Value* tmpVal = getVal(*(yyvsp[-5].TypeVal), (yyvsp[-3].ValIDVal)); + GEN_ERROR("Invalid upreference in type: " + (*yyvsp[-5].TypeVal)->getDescription()); + yyval.PHIList = new std::list >(); + Value* tmpVal = getVal(*yyvsp[-5].TypeVal, yyvsp[-3].ValIDVal); CHECK_FOR_ERROR - BasicBlock* tmpBB = getBBVal((yyvsp[-1].ValIDVal)); + BasicBlock* tmpBB = getBBVal(yyvsp[-1].ValIDVal); CHECK_FOR_ERROR - (yyval.PHIList)->push_back(std::make_pair(tmpVal, tmpBB)); - delete (yyvsp[-5].TypeVal); + yyval.PHIList->push_back(std::make_pair(tmpVal, tmpBB)); + delete yyvsp[-5].TypeVal; ;} break; case 274: -#line 2710 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2710 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - (yyval.PHIList) = (yyvsp[-6].PHIList); - Value* tmpVal = getVal((yyvsp[-6].PHIList)->front().first->getType(), (yyvsp[-3].ValIDVal)); + yyval.PHIList = yyvsp[-6].PHIList; + Value* tmpVal = getVal(yyvsp[-6].PHIList->front().first->getType(), yyvsp[-3].ValIDVal); CHECK_FOR_ERROR - BasicBlock* tmpBB = getBBVal((yyvsp[-1].ValIDVal)); + BasicBlock* tmpBB = getBBVal(yyvsp[-1].ValIDVal); CHECK_FOR_ERROR - (yyvsp[-6].PHIList)->push_back(std::make_pair(tmpVal, tmpBB)); + yyvsp[-6].PHIList->push_back(std::make_pair(tmpVal, tmpBB)); ;} break; case 275: -#line 2720 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2720 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-2].TypeVal))->getDescription()); + GEN_ERROR("Invalid upreference in type: " + (*yyvsp[-2].TypeVal)->getDescription()); // Used for call and invoke instructions - (yyval.ValueRefList) = new ValueRefList(); - ValueRefListEntry E; E.Attrs = (yyvsp[0].ParamAttrs); E.Val = getVal((yyvsp[-2].TypeVal)->get(), (yyvsp[-1].ValIDVal)); - (yyval.ValueRefList)->push_back(E); - delete (yyvsp[-2].TypeVal); + yyval.ValueRefList = new ValueRefList(); + ValueRefListEntry E; E.Attrs = yyvsp[0].ParamAttrs; E.Val = getVal(yyvsp[-2].TypeVal->get(), yyvsp[-1].ValIDVal); + yyval.ValueRefList->push_back(E); + delete yyvsp[-2].TypeVal; ;} break; case 276: -#line 2729 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2729 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-2].TypeVal))->getDescription()); - (yyval.ValueRefList) = (yyvsp[-4].ValueRefList); - ValueRefListEntry E; E.Attrs = (yyvsp[0].ParamAttrs); E.Val = getVal((yyvsp[-2].TypeVal)->get(), (yyvsp[-1].ValIDVal)); - (yyval.ValueRefList)->push_back(E); - delete (yyvsp[-2].TypeVal); + GEN_ERROR("Invalid upreference in type: " + (*yyvsp[-2].TypeVal)->getDescription()); + yyval.ValueRefList = yyvsp[-4].ValueRefList; + ValueRefListEntry E; E.Attrs = yyvsp[0].ParamAttrs; E.Val = getVal(yyvsp[-2].TypeVal->get(), yyvsp[-1].ValIDVal); + yyval.ValueRefList->push_back(E); + delete yyvsp[-2].TypeVal; CHECK_FOR_ERROR ;} break; case 277: -#line 2738 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.ValueRefList) = new ValueRefList(); ;} +#line 2738 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.ValueRefList = new ValueRefList(); ;} break; case 278: -#line 2741 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" - { (yyval.ValueList) = new std::vector(); ;} +#line 2741 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" + { yyval.ValueList = new std::vector(); ;} break; case 279: -#line 2742 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2742 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - (yyval.ValueList) = (yyvsp[-2].ValueList); - (yyval.ValueList)->push_back((yyvsp[0].ValueVal)); + yyval.ValueList = yyvsp[-2].ValueList; + yyval.ValueList->push_back(yyvsp[0].ValueVal); CHECK_FOR_ERROR ;} break; case 280: -#line 2749 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2749 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - (yyval.BoolVal) = true; + yyval.BoolVal = true; CHECK_FOR_ERROR ;} break; case 281: -#line 2753 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2753 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - (yyval.BoolVal) = false; + yyval.BoolVal = false; CHECK_FOR_ERROR ;} break; case 282: -#line 2758 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2758 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-3].TypeVal))->getDescription()); - if (!(*(yyvsp[-3].TypeVal))->isInteger() && !(*(yyvsp[-3].TypeVal))->isFloatingPoint() && - !isa((*(yyvsp[-3].TypeVal)).get())) + GEN_ERROR("Invalid upreference in type: " + (*yyvsp[-3].TypeVal)->getDescription()); + if (!(*yyvsp[-3].TypeVal)->isInteger() && !(*yyvsp[-3].TypeVal)->isFloatingPoint() && + !isa((*yyvsp[-3].TypeVal).get())) GEN_ERROR( "Arithmetic operator requires integer, FP, or packed operands"); - if (isa((*(yyvsp[-3].TypeVal)).get()) && - ((yyvsp[-4].BinaryOpVal) == Instruction::URem || - (yyvsp[-4].BinaryOpVal) == Instruction::SRem || - (yyvsp[-4].BinaryOpVal) == Instruction::FRem)) + if (isa((*yyvsp[-3].TypeVal).get()) && + (yyvsp[-4].BinaryOpVal == Instruction::URem || + yyvsp[-4].BinaryOpVal == Instruction::SRem || + yyvsp[-4].BinaryOpVal == Instruction::FRem)) GEN_ERROR("Remainder not supported on vector types"); - Value* val1 = getVal(*(yyvsp[-3].TypeVal), (yyvsp[-2].ValIDVal)); + Value* val1 = getVal(*yyvsp[-3].TypeVal, yyvsp[-2].ValIDVal); CHECK_FOR_ERROR - Value* val2 = getVal(*(yyvsp[-3].TypeVal), (yyvsp[0].ValIDVal)); + Value* val2 = getVal(*yyvsp[-3].TypeVal, yyvsp[0].ValIDVal); CHECK_FOR_ERROR - (yyval.InstVal) = BinaryOperator::create((yyvsp[-4].BinaryOpVal), val1, val2); - if ((yyval.InstVal) == 0) + yyval.InstVal = BinaryOperator::create(yyvsp[-4].BinaryOpVal, val1, val2); + if (yyval.InstVal == 0) GEN_ERROR("binary operator returned null"); - delete (yyvsp[-3].TypeVal); + delete yyvsp[-3].TypeVal; ;} break; case 283: -#line 2779 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2779 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-3].TypeVal))->getDescription()); - if (!(*(yyvsp[-3].TypeVal))->isInteger()) { - if (Instruction::isShift((yyvsp[-4].BinaryOpVal)) || !isa((yyvsp[-3].TypeVal)->get()) || - !cast((yyvsp[-3].TypeVal)->get())->getElementType()->isInteger()) + GEN_ERROR("Invalid upreference in type: " + (*yyvsp[-3].TypeVal)->getDescription()); + if (!(*yyvsp[-3].TypeVal)->isInteger()) { + if (Instruction::isShift(yyvsp[-4].BinaryOpVal) || !isa(yyvsp[-3].TypeVal->get()) || + !cast(yyvsp[-3].TypeVal->get())->getElementType()->isInteger()) GEN_ERROR("Logical operator requires integral operands"); } - Value* tmpVal1 = getVal(*(yyvsp[-3].TypeVal), (yyvsp[-2].ValIDVal)); + Value* tmpVal1 = getVal(*yyvsp[-3].TypeVal, yyvsp[-2].ValIDVal); CHECK_FOR_ERROR - Value* tmpVal2 = getVal(*(yyvsp[-3].TypeVal), (yyvsp[0].ValIDVal)); + Value* tmpVal2 = getVal(*yyvsp[-3].TypeVal, yyvsp[0].ValIDVal); CHECK_FOR_ERROR - (yyval.InstVal) = BinaryOperator::create((yyvsp[-4].BinaryOpVal), tmpVal1, tmpVal2); - if ((yyval.InstVal) == 0) + yyval.InstVal = BinaryOperator::create(yyvsp[-4].BinaryOpVal, tmpVal1, tmpVal2); + if (yyval.InstVal == 0) GEN_ERROR("binary operator returned null"); - delete (yyvsp[-3].TypeVal); + delete yyvsp[-3].TypeVal; ;} break; case 284: -#line 2796 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2796 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-3].TypeVal))->getDescription()); - if (isa((*(yyvsp[-3].TypeVal)).get())) + GEN_ERROR("Invalid upreference in type: " + (*yyvsp[-3].TypeVal)->getDescription()); + if (isa((*yyvsp[-3].TypeVal).get())) GEN_ERROR("Vector types not supported by icmp instruction"); - Value* tmpVal1 = getVal(*(yyvsp[-3].TypeVal), (yyvsp[-2].ValIDVal)); + Value* tmpVal1 = getVal(*yyvsp[-3].TypeVal, yyvsp[-2].ValIDVal); CHECK_FOR_ERROR - Value* tmpVal2 = getVal(*(yyvsp[-3].TypeVal), (yyvsp[0].ValIDVal)); + Value* tmpVal2 = getVal(*yyvsp[-3].TypeVal, yyvsp[0].ValIDVal); CHECK_FOR_ERROR - (yyval.InstVal) = CmpInst::create((yyvsp[-5].OtherOpVal), (yyvsp[-4].IPredicate), tmpVal1, tmpVal2); - if ((yyval.InstVal) == 0) + yyval.InstVal = CmpInst::create(yyvsp[-5].OtherOpVal, yyvsp[-4].IPredicate, tmpVal1, tmpVal2); + if (yyval.InstVal == 0) GEN_ERROR("icmp operator returned null"); - delete (yyvsp[-3].TypeVal); + delete yyvsp[-3].TypeVal; ;} break; case 285: -#line 2810 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2810 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-3].TypeVal))->getDescription()); - if (isa((*(yyvsp[-3].TypeVal)).get())) + GEN_ERROR("Invalid upreference in type: " + (*yyvsp[-3].TypeVal)->getDescription()); + if (isa((*yyvsp[-3].TypeVal).get())) GEN_ERROR("Vector types not supported by fcmp instruction"); - Value* tmpVal1 = getVal(*(yyvsp[-3].TypeVal), (yyvsp[-2].ValIDVal)); + Value* tmpVal1 = getVal(*yyvsp[-3].TypeVal, yyvsp[-2].ValIDVal); CHECK_FOR_ERROR - Value* tmpVal2 = getVal(*(yyvsp[-3].TypeVal), (yyvsp[0].ValIDVal)); + Value* tmpVal2 = getVal(*yyvsp[-3].TypeVal, yyvsp[0].ValIDVal); CHECK_FOR_ERROR - (yyval.InstVal) = CmpInst::create((yyvsp[-5].OtherOpVal), (yyvsp[-4].FPredicate), tmpVal1, tmpVal2); - if ((yyval.InstVal) == 0) + yyval.InstVal = CmpInst::create(yyvsp[-5].OtherOpVal, yyvsp[-4].FPredicate, tmpVal1, tmpVal2); + if (yyval.InstVal == 0) GEN_ERROR("fcmp operator returned null"); - delete (yyvsp[-3].TypeVal); + delete yyvsp[-3].TypeVal; ;} break; case 286: -#line 2824 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2824 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[0].TypeVal))->getDescription()); - Value* Val = (yyvsp[-2].ValueVal); - const Type* DestTy = (yyvsp[0].TypeVal)->get(); - if (!CastInst::castIsValid((yyvsp[-3].CastOpVal), Val, DestTy)) + GEN_ERROR("Invalid upreference in type: " + (*yyvsp[0].TypeVal)->getDescription()); + Value* Val = yyvsp[-2].ValueVal; + const Type* DestTy = yyvsp[0].TypeVal->get(); + if (!CastInst::castIsValid(yyvsp[-3].CastOpVal, Val, DestTy)) GEN_ERROR("invalid cast opcode for cast from '" + Val->getType()->getDescription() + "' to '" + DestTy->getDescription() + "'"); - (yyval.InstVal) = CastInst::create((yyvsp[-3].CastOpVal), Val, DestTy); - delete (yyvsp[0].TypeVal); + yyval.InstVal = CastInst::create(yyvsp[-3].CastOpVal, Val, DestTy); + delete yyvsp[0].TypeVal; ;} break; case 287: -#line 2836 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2836 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - if ((yyvsp[-4].ValueVal)->getType() != Type::Int1Ty) + if (yyvsp[-4].ValueVal->getType() != Type::Int1Ty) GEN_ERROR("select condition must be boolean"); - if ((yyvsp[-2].ValueVal)->getType() != (yyvsp[0].ValueVal)->getType()) + if (yyvsp[-2].ValueVal->getType() != yyvsp[0].ValueVal->getType()) GEN_ERROR("select value types should match"); - (yyval.InstVal) = new SelectInst((yyvsp[-4].ValueVal), (yyvsp[-2].ValueVal), (yyvsp[0].ValueVal)); + yyval.InstVal = new SelectInst(yyvsp[-4].ValueVal, yyvsp[-2].ValueVal, yyvsp[0].ValueVal); CHECK_FOR_ERROR ;} break; case 288: -#line 2844 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2844 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[0].TypeVal))->getDescription()); - (yyval.InstVal) = new VAArgInst((yyvsp[-2].ValueVal), *(yyvsp[0].TypeVal)); - delete (yyvsp[0].TypeVal); + GEN_ERROR("Invalid upreference in type: " + (*yyvsp[0].TypeVal)->getDescription()); + yyval.InstVal = new VAArgInst(yyvsp[-2].ValueVal, *yyvsp[0].TypeVal); + delete yyvsp[0].TypeVal; CHECK_FOR_ERROR ;} break; case 289: -#line 2851 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2851 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - if (!ExtractElementInst::isValidOperands((yyvsp[-2].ValueVal), (yyvsp[0].ValueVal))) + if (!ExtractElementInst::isValidOperands(yyvsp[-2].ValueVal, yyvsp[0].ValueVal)) GEN_ERROR("Invalid extractelement operands"); - (yyval.InstVal) = new ExtractElementInst((yyvsp[-2].ValueVal), (yyvsp[0].ValueVal)); + yyval.InstVal = new ExtractElementInst(yyvsp[-2].ValueVal, yyvsp[0].ValueVal); CHECK_FOR_ERROR ;} break; case 290: -#line 2857 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2857 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - if (!InsertElementInst::isValidOperands((yyvsp[-4].ValueVal), (yyvsp[-2].ValueVal), (yyvsp[0].ValueVal))) + if (!InsertElementInst::isValidOperands(yyvsp[-4].ValueVal, yyvsp[-2].ValueVal, yyvsp[0].ValueVal)) GEN_ERROR("Invalid insertelement operands"); - (yyval.InstVal) = new InsertElementInst((yyvsp[-4].ValueVal), (yyvsp[-2].ValueVal), (yyvsp[0].ValueVal)); + yyval.InstVal = new InsertElementInst(yyvsp[-4].ValueVal, yyvsp[-2].ValueVal, yyvsp[0].ValueVal); CHECK_FOR_ERROR ;} break; case 291: -#line 2863 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2863 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - if (!ShuffleVectorInst::isValidOperands((yyvsp[-4].ValueVal), (yyvsp[-2].ValueVal), (yyvsp[0].ValueVal))) + if (!ShuffleVectorInst::isValidOperands(yyvsp[-4].ValueVal, yyvsp[-2].ValueVal, yyvsp[0].ValueVal)) GEN_ERROR("Invalid shufflevector operands"); - (yyval.InstVal) = new ShuffleVectorInst((yyvsp[-4].ValueVal), (yyvsp[-2].ValueVal), (yyvsp[0].ValueVal)); + yyval.InstVal = new ShuffleVectorInst(yyvsp[-4].ValueVal, yyvsp[-2].ValueVal, yyvsp[0].ValueVal); CHECK_FOR_ERROR ;} break; case 292: -#line 2869 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2869 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - const Type *Ty = (yyvsp[0].PHIList)->front().first->getType(); + const Type *Ty = yyvsp[0].PHIList->front().first->getType(); if (!Ty->isFirstClassType()) GEN_ERROR("PHI node operands must be of first class type"); - (yyval.InstVal) = new PHINode(Ty); - ((PHINode*)(yyval.InstVal))->reserveOperandSpace((yyvsp[0].PHIList)->size()); - while ((yyvsp[0].PHIList)->begin() != (yyvsp[0].PHIList)->end()) { - if ((yyvsp[0].PHIList)->front().first->getType() != Ty) + yyval.InstVal = new PHINode(Ty); + ((PHINode*)yyval.InstVal)->reserveOperandSpace(yyvsp[0].PHIList->size()); + while (yyvsp[0].PHIList->begin() != yyvsp[0].PHIList->end()) { + if (yyvsp[0].PHIList->front().first->getType() != Ty) GEN_ERROR("All elements of a PHI node must be of the same type"); - cast((yyval.InstVal))->addIncoming((yyvsp[0].PHIList)->front().first, (yyvsp[0].PHIList)->front().second); - (yyvsp[0].PHIList)->pop_front(); + cast(yyval.InstVal)->addIncoming(yyvsp[0].PHIList->front().first, yyvsp[0].PHIList->front().second); + yyvsp[0].PHIList->pop_front(); } - delete (yyvsp[0].PHIList); // Free the list... + delete yyvsp[0].PHIList; // Free the list... CHECK_FOR_ERROR ;} break; case 293: -#line 2885 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2885 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { // Handle the short syntax const PointerType *PFTy = 0; const FunctionType *Ty = 0; - if (!(PFTy = dyn_cast((yyvsp[-5].TypeVal)->get())) || + if (!(PFTy = dyn_cast(yyvsp[-5].TypeVal->get())) || !(Ty = dyn_cast(PFTy->getElementType()))) { // Pull out the types of all of the arguments... std::vector ParamTypes; ParamAttrsVector Attrs; - if ((yyvsp[0].ParamAttrs) != ParamAttr::None) { - ParamAttrsWithIndex PAWI; PAWI.index = 0; PAWI.attrs = (yyvsp[0].ParamAttrs); + if (yyvsp[0].ParamAttrs != ParamAttr::None) { + ParamAttrsWithIndex PAWI; PAWI.index = 0; PAWI.attrs = yyvsp[0].ParamAttrs; Attrs.push_back(PAWI); } unsigned index = 1; - ValueRefList::iterator I = (yyvsp[-2].ValueRefList)->begin(), E = (yyvsp[-2].ValueRefList)->end(); + ValueRefList::iterator I = yyvsp[-2].ValueRefList->begin(), E = yyvsp[-2].ValueRefList->end(); for (; I != E; ++I, ++index) { const Type *Ty = I->Val->getType(); if (Ty == Type::VoidTy) @@ -5716,11 +5597,11 @@ if (!Attrs.empty()) PAL = ParamAttrsList::get(Attrs); - Ty = FunctionType::get((yyvsp[-5].TypeVal)->get(), ParamTypes, false, PAL); + Ty = FunctionType::get(yyvsp[-5].TypeVal->get(), ParamTypes, false, PAL); PFTy = PointerType::get(Ty); } - Value *V = getVal(PFTy, (yyvsp[-4].ValIDVal)); // Get the function we're calling... + Value *V = getVal(PFTy, yyvsp[-4].ValIDVal); // Get the function we're calling... CHECK_FOR_ERROR // Check for call to invalid intrinsic to avoid crashing later. @@ -5734,7 +5615,7 @@ // Check the arguments ValueList Args; - if ((yyvsp[-2].ValueRefList)->empty()) { // Has no arguments? + if (yyvsp[-2].ValueRefList->empty()) { // Has no arguments? // Make sure no arguments is a good thing! if (Ty->getNumParams() != 0) GEN_ERROR("No arguments passed to a function that " @@ -5745,7 +5626,7 @@ // FunctionType::param_iterator I = Ty->param_begin(); FunctionType::param_iterator E = Ty->param_end(); - ValueRefList::iterator ArgI = (yyvsp[-2].ValueRefList)->begin(), ArgE = (yyvsp[-2].ValueRefList)->end(); + ValueRefList::iterator ArgI = yyvsp[-2].ValueRefList->begin(), ArgE = yyvsp[-2].ValueRefList->end(); for (; ArgI != ArgE && I != E; ++ArgI, ++I) { if (ArgI->Val->getType() != *I) @@ -5761,161 +5642,160 @@ GEN_ERROR("Invalid number of parameters detected"); } // Create the call node - CallInst *CI = new CallInst(V, &Args[0], Args.size()); - CI->setTailCall((yyvsp[-7].BoolVal)); - CI->setCallingConv((yyvsp[-6].UIntVal)); - (yyval.InstVal) = CI; - delete (yyvsp[-2].ValueRefList); - delete (yyvsp[-5].TypeVal); + CallInst *CI = new CallInst(V, Args.begin(), Args.end()); + CI->setTailCall(yyvsp[-7].BoolVal); + CI->setCallingConv(yyvsp[-6].UIntVal); + yyval.InstVal = CI; + delete yyvsp[-2].ValueRefList; + delete yyvsp[-5].TypeVal; CHECK_FOR_ERROR ;} break; case 294: -#line 2969 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2969 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - (yyval.InstVal) = (yyvsp[0].InstVal); + yyval.InstVal = yyvsp[0].InstVal; CHECK_FOR_ERROR ;} break; case 295: -#line 2974 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2974 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - (yyval.BoolVal) = true; + yyval.BoolVal = true; CHECK_FOR_ERROR ;} break; case 296: -#line 2978 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2978 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - (yyval.BoolVal) = false; + yyval.BoolVal = false; CHECK_FOR_ERROR ;} break; case 297: -#line 2985 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2985 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-1].TypeVal))->getDescription()); - (yyval.InstVal) = new MallocInst(*(yyvsp[-1].TypeVal), 0, (yyvsp[0].UIntVal)); - delete (yyvsp[-1].TypeVal); + GEN_ERROR("Invalid upreference in type: " + (*yyvsp[-1].TypeVal)->getDescription()); + yyval.InstVal = new MallocInst(*yyvsp[-1].TypeVal, 0, yyvsp[0].UIntVal); + delete yyvsp[-1].TypeVal; CHECK_FOR_ERROR ;} break; case 298: -#line 2992 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2992 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-4].TypeVal))->getDescription()); - Value* tmpVal = getVal((yyvsp[-2].PrimType), (yyvsp[-1].ValIDVal)); + GEN_ERROR("Invalid upreference in type: " + (*yyvsp[-4].TypeVal)->getDescription()); + Value* tmpVal = getVal(yyvsp[-2].PrimType, yyvsp[-1].ValIDVal); CHECK_FOR_ERROR - (yyval.InstVal) = new MallocInst(*(yyvsp[-4].TypeVal), tmpVal, (yyvsp[0].UIntVal)); - delete (yyvsp[-4].TypeVal); + yyval.InstVal = new MallocInst(*yyvsp[-4].TypeVal, tmpVal, yyvsp[0].UIntVal); + delete yyvsp[-4].TypeVal; ;} break; case 299: -#line 3000 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 3000 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-1].TypeVal))->getDescription()); - (yyval.InstVal) = new AllocaInst(*(yyvsp[-1].TypeVal), 0, (yyvsp[0].UIntVal)); - delete (yyvsp[-1].TypeVal); + GEN_ERROR("Invalid upreference in type: " + (*yyvsp[-1].TypeVal)->getDescription()); + yyval.InstVal = new AllocaInst(*yyvsp[-1].TypeVal, 0, yyvsp[0].UIntVal); + delete yyvsp[-1].TypeVal; CHECK_FOR_ERROR ;} break; case 300: -#line 3007 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 3007 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-4].TypeVal))->getDescription()); - Value* tmpVal = getVal((yyvsp[-2].PrimType), (yyvsp[-1].ValIDVal)); + GEN_ERROR("Invalid upreference in type: " + (*yyvsp[-4].TypeVal)->getDescription()); + Value* tmpVal = getVal(yyvsp[-2].PrimType, yyvsp[-1].ValIDVal); CHECK_FOR_ERROR - (yyval.InstVal) = new AllocaInst(*(yyvsp[-4].TypeVal), tmpVal, (yyvsp[0].UIntVal)); - delete (yyvsp[-4].TypeVal); + yyval.InstVal = new AllocaInst(*yyvsp[-4].TypeVal, tmpVal, yyvsp[0].UIntVal); + delete yyvsp[-4].TypeVal; ;} break; case 301: -#line 3015 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 3015 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { - if (!isa((yyvsp[0].ValueVal)->getType())) + if (!isa(yyvsp[0].ValueVal->getType())) GEN_ERROR("Trying to free nonpointer type " + - (yyvsp[0].ValueVal)->getType()->getDescription() + ""); - (yyval.InstVal) = new FreeInst((yyvsp[0].ValueVal)); + yyvsp[0].ValueVal->getType()->getDescription() + ""); + yyval.InstVal = new FreeInst(yyvsp[0].ValueVal); CHECK_FOR_ERROR ;} break; case 302: -#line 3023 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 3023 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-2].TypeVal))->getDescription()); - if (!isa((yyvsp[-2].TypeVal)->get())) + GEN_ERROR("Invalid upreference in type: " + (*yyvsp[-2].TypeVal)->getDescription()); + if (!isa(yyvsp[-2].TypeVal->get())) GEN_ERROR("Can't load from nonpointer type: " + - (*(yyvsp[-2].TypeVal))->getDescription()); - if (!cast((yyvsp[-2].TypeVal)->get())->getElementType()->isFirstClassType()) + (*yyvsp[-2].TypeVal)->getDescription()); + if (!cast(yyvsp[-2].TypeVal->get())->getElementType()->isFirstClassType()) GEN_ERROR("Can't load from pointer of non-first-class type: " + - (*(yyvsp[-2].TypeVal))->getDescription()); - Value* tmpVal = getVal(*(yyvsp[-2].TypeVal), (yyvsp[-1].ValIDVal)); + (*yyvsp[-2].TypeVal)->getDescription()); + Value* tmpVal = getVal(*yyvsp[-2].TypeVal, yyvsp[-1].ValIDVal); CHECK_FOR_ERROR - (yyval.InstVal) = new LoadInst(tmpVal, "", (yyvsp[-4].BoolVal), (yyvsp[0].UIntVal)); - delete (yyvsp[-2].TypeVal); + yyval.InstVal = new LoadInst(tmpVal, "", yyvsp[-4].BoolVal, yyvsp[0].UIntVal); + delete yyvsp[-2].TypeVal; ;} break; case 303: -#line 3037 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 3037 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-2].TypeVal))->getDescription()); - const PointerType *PT = dyn_cast((yyvsp[-2].TypeVal)->get()); + GEN_ERROR("Invalid upreference in type: " + (*yyvsp[-2].TypeVal)->getDescription()); + const PointerType *PT = dyn_cast(yyvsp[-2].TypeVal->get()); if (!PT) GEN_ERROR("Can't store to a nonpointer type: " + - (*(yyvsp[-2].TypeVal))->getDescription()); + (*yyvsp[-2].TypeVal)->getDescription()); const Type *ElTy = PT->getElementType(); - if (ElTy != (yyvsp[-4].ValueVal)->getType()) - GEN_ERROR("Can't store '" + (yyvsp[-4].ValueVal)->getType()->getDescription() + + if (ElTy != yyvsp[-4].ValueVal->getType()) + GEN_ERROR("Can't store '" + yyvsp[-4].ValueVal->getType()->getDescription() + "' into space of type '" + ElTy->getDescription() + "'"); - Value* tmpVal = getVal(*(yyvsp[-2].TypeVal), (yyvsp[-1].ValIDVal)); + Value* tmpVal = getVal(*yyvsp[-2].TypeVal, yyvsp[-1].ValIDVal); CHECK_FOR_ERROR - (yyval.InstVal) = new StoreInst((yyvsp[-4].ValueVal), tmpVal, (yyvsp[-6].BoolVal), (yyvsp[0].UIntVal)); - delete (yyvsp[-2].TypeVal); + yyval.InstVal = new StoreInst(yyvsp[-4].ValueVal, tmpVal, yyvsp[-6].BoolVal, yyvsp[0].UIntVal); + delete yyvsp[-2].TypeVal; ;} break; case 304: -#line 3054 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 3054 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) - GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[-2].TypeVal))->getDescription()); - if (!isa((yyvsp[-2].TypeVal)->get())) + GEN_ERROR("Invalid upreference in type: " + (*yyvsp[-2].TypeVal)->getDescription()); + if (!isa(yyvsp[-2].TypeVal->get())) GEN_ERROR("getelementptr insn requires pointer operand"); - if (!GetElementPtrInst::getIndexedType(*(yyvsp[-2].TypeVal), &(*(yyvsp[0].ValueList))[0], (yyvsp[0].ValueList)->size(), true)) + if (!GetElementPtrInst::getIndexedType(*yyvsp[-2].TypeVal, &(*yyvsp[0].ValueList)[0], yyvsp[0].ValueList->size(), true)) GEN_ERROR("Invalid getelementptr indices for type '" + - (*(yyvsp[-2].TypeVal))->getDescription()+ "'"); - Value* tmpVal = getVal(*(yyvsp[-2].TypeVal), (yyvsp[-1].ValIDVal)); + (*yyvsp[-2].TypeVal)->getDescription()+ "'"); + Value* tmpVal = getVal(*yyvsp[-2].TypeVal, yyvsp[-1].ValIDVal); CHECK_FOR_ERROR - (yyval.InstVal) = new GetElementPtrInst(tmpVal, &(*(yyvsp[0].ValueList))[0], (yyvsp[0].ValueList)->size()); - delete (yyvsp[-2].TypeVal); - delete (yyvsp[0].ValueList); + yyval.InstVal = new GetElementPtrInst(tmpVal, &(*yyvsp[0].ValueList)[0], yyvsp[0].ValueList->size()); + delete yyvsp[-2].TypeVal; + delete yyvsp[0].ValueList; ;} break; - default: break; } -/* Line 1126 of yacc.c. */ -#line 5919 "llvmAsmParser.tab.c" +/* Line 993 of yacc.c. */ +#line 5799 "llvmAsmParser.tab.c" yyvsp -= yylen; yyssp -= yylen; @@ -5954,36 +5834,12 @@ if (YYPACT_NINF < yyn && yyn < YYLAST) { + YYSIZE_T yysize = 0; int yytype = YYTRANSLATE (yychar); - YYSIZE_T yysize0 = yytnamerr (0, yytname[yytype]); - YYSIZE_T yysize = yysize0; - YYSIZE_T yysize1; - int yysize_overflow = 0; - char *yymsg = 0; -# define YYERROR_VERBOSE_ARGS_MAXIMUM 5 - char const *yyarg[YYERROR_VERBOSE_ARGS_MAXIMUM]; + const char* yyprefix; + char *yymsg; int yyx; -#if 0 - /* This is so xgettext sees the translatable formats that are - constructed on the fly. */ - YY_("syntax error, unexpected %s"); - YY_("syntax error, unexpected %s, expecting %s"); - YY_("syntax error, unexpected %s, expecting %s or %s"); - YY_("syntax error, unexpected %s, expecting %s or %s or %s"); - YY_("syntax error, unexpected %s, expecting %s or %s or %s or %s"); -#endif - char *yyfmt; - char const *yyf; - static char const yyunexpected[] = "syntax error, unexpected %s"; - static char const yyexpecting[] = ", expecting %s"; - static char const yyor[] = " or %s"; - char yyformat[sizeof yyunexpected - + sizeof yyexpecting - 1 - + ((YYERROR_VERBOSE_ARGS_MAXIMUM - 2) - * (sizeof yyor - 1))]; - char const *yyprefix = yyexpecting; - /* Start YYX at -YYN if negative to avoid negative indexes in YYCHECK. */ int yyxbegin = yyn < 0 ? -yyn : 0; @@ -5991,91 +5847,81 @@ /* Stay within bounds of both yycheck and yytname. */ int yychecklim = YYLAST - yyn; int yyxend = yychecklim < YYNTOKENS ? yychecklim : YYNTOKENS; - int yycount = 1; - - yyarg[0] = yytname[yytype]; - yyfmt = yystpcpy (yyformat, yyunexpected); + int yycount = 0; + yyprefix = ", expecting "; for (yyx = yyxbegin; yyx < yyxend; ++yyx) if (yycheck[yyx + yyn] == yyx && yyx != YYTERROR) { - if (yycount == YYERROR_VERBOSE_ARGS_MAXIMUM) + yysize += yystrlen (yyprefix) + yystrlen (yytname [yyx]); + yycount += 1; + if (yycount == 5) { - yycount = 1; - yysize = yysize0; - yyformat[sizeof yyunexpected - 1] = '\0'; + yysize = 0; break; } - yyarg[yycount++] = yytname[yyx]; - yysize1 = yysize + yytnamerr (0, yytname[yyx]); - yysize_overflow |= yysize1 < yysize; - yysize = yysize1; - yyfmt = yystpcpy (yyfmt, yyprefix); - yyprefix = yyor; } - - yyf = YY_(yyformat); - yysize1 = yysize + yystrlen (yyf); - yysize_overflow |= yysize1 < yysize; - yysize = yysize1; - - if (!yysize_overflow && yysize <= YYSTACK_ALLOC_MAXIMUM) - yymsg = (char *) YYSTACK_ALLOC (yysize); - if (yymsg) + yysize += (sizeof ("syntax error, unexpected ") + + yystrlen (yytname[yytype])); + yymsg = (char *) YYSTACK_ALLOC (yysize); + if (yymsg != 0) { - /* Avoid sprintf, as that infringes on the user's name space. - Don't have undefined behavior even if the translation - produced a string with the wrong number of "%s"s. */ - char *yyp = yymsg; - int yyi = 0; - while ((*yyp = *yyf)) + char *yyp = yystpcpy (yymsg, "syntax error, unexpected "); + yyp = yystpcpy (yyp, yytname[yytype]); + + if (yycount < 5) { - if (*yyp == '%' && yyf[1] == 's' && yyi < yycount) - { - yyp += yytnamerr (yyp, yyarg[yyi++]); - yyf += 2; - } - else - { - yyp++; - yyf++; - } + yyprefix = ", expecting "; + for (yyx = yyxbegin; yyx < yyxend; ++yyx) + if (yycheck[yyx + yyn] == yyx && yyx != YYTERROR) + { + yyp = yystpcpy (yyp, yyprefix); + yyp = yystpcpy (yyp, yytname[yyx]); + yyprefix = " or "; + } } yyerror (yymsg); YYSTACK_FREE (yymsg); } else - { - yyerror (YY_("syntax error")); - goto yyexhaustedlab; - } + yyerror ("syntax error; also virtual memory exhausted"); } else #endif /* YYERROR_VERBOSE */ - yyerror (YY_("syntax error")); + yyerror ("syntax error"); } if (yyerrstatus == 3) { - /* If just tried and failed to reuse look-ahead token after an + /* If just tried and failed to reuse lookahead token after an error, discard it. */ if (yychar <= YYEOF) { - /* Return failure if at end of input. */ + /* If at end of input, pop the error token, + then the rest of the stack, then return failure. */ if (yychar == YYEOF) - YYABORT; + for (;;) + { + YYPOPSTACK; + if (yyssp == yyss) + YYABORT; + YYDSYMPRINTF ("Error: popping", yystos[*yyssp], yyvsp, yylsp); + yydestruct (yystos[*yyssp], yyvsp); + } } else { - yydestruct ("Error: discarding", yytoken, &yylval); + YYDSYMPRINTF ("Error: discarding", yytoken, &yylval, &yylloc); + yydestruct (yytoken, &yylval); yychar = YYEMPTY; + } } - /* Else will try to reuse look-ahead token after shifting the error + /* Else will try to reuse lookahead token after shifting the error token. */ goto yyerrlab1; @@ -6085,13 +5931,14 @@ `---------------------------------------------------*/ yyerrorlab: - /* Pacify compilers like GCC when the user code never invokes - YYERROR and the label yyerrorlab therefore never appears in user - code. */ +#ifdef __GNUC__ + /* Pacify GCC when the user code never invokes YYERROR and the label + yyerrorlab therefore never appears in user code. */ if (0) goto yyerrorlab; +#endif -yyvsp -= yylen; + yyvsp -= yylen; yyssp -= yylen; yystate = *yyssp; goto yyerrlab1; @@ -6121,8 +5968,8 @@ if (yyssp == yyss) YYABORT; - - yydestruct ("Error: popping", yystos[yystate], yyvsp); + YYDSYMPRINTF ("Error: popping", yystos[*yyssp], yyvsp, yylsp); + yydestruct (yystos[yystate], yyvsp); YYPOPSTACK; yystate = *yyssp; YY_STACK_PRINT (yyss, yyssp); @@ -6131,11 +5978,10 @@ if (yyn == YYFINAL) YYACCEPT; - *++yyvsp = yylval; + YYDPRINTF ((stderr, "Shifting error token, ")); + *++yyvsp = yylval; - /* Shift the error token. */ - YY_SYMBOL_PRINT ("Shifting", yystos[yyn], yyvsp, yylsp); yystate = yyn; goto yynewstate; @@ -6156,25 +6002,16 @@ goto yyreturn; #ifndef yyoverflow -/*-------------------------------------------------. -| yyexhaustedlab -- memory exhaustion comes here. | -`-------------------------------------------------*/ -yyexhaustedlab: - yyerror (YY_("memory exhausted")); +/*----------------------------------------------. +| yyoverflowlab -- parser overflow comes here. | +`----------------------------------------------*/ +yyoverflowlab: + yyerror ("parser stack overflow"); yyresult = 2; /* Fall through. */ #endif yyreturn: - if (yychar != YYEOF && yychar != YYEMPTY) - yydestruct ("Cleanup: discarding lookahead", - yytoken, &yylval); - while (yyssp != yyss) - { - yydestruct ("Cleanup: popping", - yystos[*yyssp], yyvsp); - YYPOPSTACK; - } #ifndef yyoverflow if (yyss != yyssa) YYSTACK_FREE (yyss); @@ -6183,7 +6020,7 @@ } -#line 3071 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 3071 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" // common code from the two 'RunVMAsmParser' functions Modified: llvm/trunk/lib/AsmParser/llvmAsmParser.h.cvs URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/llvmAsmParser.h.cvs?rev=40663&r1=40662&r2=40663&view=diff ============================================================================== --- llvm/trunk/lib/AsmParser/llvmAsmParser.h.cvs (original) +++ llvm/trunk/lib/AsmParser/llvmAsmParser.h.cvs Tue Jul 31 22:59:32 2007 @@ -1,7 +1,7 @@ -/* A Bison parser, made by GNU Bison 2.1. */ +/* A Bison parser, made by GNU Bison 1.875c. */ /* Skeleton parser for Yacc-like parsing with Bison, - Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc. + Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003 Free Software Foundation, Inc. This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by @@ -15,8 +15,8 @@ You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, - Boston, MA 02110-1301, USA. */ + Foundation, Inc., 59 Temple Place - Suite 330, + Boston, MA 02111-1307, USA. */ /* As a special exception, when this file is copied by Bison into a Bison output file, you may use that output file without restriction. @@ -171,7 +171,6 @@ PROTECTED = 397 }; #endif -/* Tokens. */ #define ESINT64VAL 258 #define EUINT64VAL 259 #define ESAPINTVAL 260 @@ -317,7 +316,7 @@ #if ! defined (YYSTYPE) && ! defined (YYSTYPE_IS_DECLARED) -#line 957 "/proj/llvm/head/llvm/lib/AsmParser/llvmAsmParser.y" +#line 957 "/users/dag/projects/cascade/llvm.modified/lib/AsmParser/llvmAsmParser.y" typedef union YYSTYPE { llvm::Module *ModuleVal; llvm::Function *FunctionVal; @@ -364,8 +363,8 @@ llvm::ICmpInst::Predicate IPredicate; llvm::FCmpInst::Predicate FPredicate; } YYSTYPE; -/* Line 1447 of yacc.c. */ -#line 369 "llvmAsmParser.tab.h" +/* Line 1268 of yacc.c. */ +#line 368 "llvmAsmParser.tab.h" # define yystype YYSTYPE /* obsolescent; will be withdrawn */ # define YYSTYPE_IS_DECLARED 1 # define YYSTYPE_IS_TRIVIAL 1 Modified: llvm/trunk/lib/AsmParser/llvmAsmParser.y.cvs URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/llvmAsmParser.y.cvs?rev=40663&r1=40662&r2=40663&view=diff ============================================================================== --- llvm/trunk/lib/AsmParser/llvmAsmParser.y.cvs (original) +++ llvm/trunk/lib/AsmParser/llvmAsmParser.y.cvs Tue Jul 31 22:59:32 2007 @@ -2958,7 +2958,7 @@ GEN_ERROR("Invalid number of parameters detected"); } // Create the call node - CallInst *CI = new CallInst(V, &Args[0], Args.size()); + CallInst *CI = new CallInst(V, Args.begin(), Args.end()); CI->setTailCall($1); CI->setCallingConv($2); $$ = CI; Modified: llvm/trunk/tools/llvm-upgrade/UpgradeParser.cpp.cvs URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-upgrade/UpgradeParser.cpp.cvs?rev=40663&r1=40662&r2=40663&view=diff ============================================================================== --- llvm/trunk/tools/llvm-upgrade/UpgradeParser.cpp.cvs (original) +++ llvm/trunk/tools/llvm-upgrade/UpgradeParser.cpp.cvs Tue Jul 31 22:59:32 2007 @@ -1,7 +1,7 @@ -/* A Bison parser, made by GNU Bison 2.1. */ +/* A Bison parser, made by GNU Bison 1.875c. */ /* Skeleton parser for Yacc-like parsing with Bison, - Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc. + Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003 Free Software Foundation, Inc. This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by @@ -15,8 +15,8 @@ You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, - Boston, MA 02110-1301, USA. */ + Foundation, Inc., 59 Temple Place - Suite 330, + Boston, MA 02111-1307, USA. */ /* As a special exception, when this file is copied by Bison into a Bison output file, you may use that output file without restriction. @@ -36,9 +36,6 @@ /* Identify Bison output. */ #define YYBISON 1 -/* Bison version. */ -#define YYBISON_VERSION "2.1" - /* Skeleton name. */ #define YYSKELETON_NAME "yacc.c" @@ -48,7 +45,8 @@ /* Using locations. */ #define YYLSP_NEEDED 0 -/* Substitute the variable and function names. */ +/* If NAME_PREFIX is specified substitute the variables and functions + names. */ #define yyparse Upgradeparse #define yylex Upgradelex #define yyerror Upgradeerror @@ -215,7 +213,6 @@ BITCAST = 406 }; #endif -/* Tokens. */ #define ESINT64VAL 258 #define EUINT64VAL 259 #define SINTVAL 260 @@ -370,7 +367,7 @@ /* Copy the first part of user declarations. */ -#line 14 "/proj/llvm/llvm-4/tools/llvm-upgrade/UpgradeParser.y" +#line 14 "/users/dag/projects/cascade/llvm.modified/tools/llvm-upgrade/UpgradeParser.y" #include "UpgradeInternals.h" #include "llvm/CallingConv.h" @@ -1873,7 +1870,7 @@ const PointerType *PFTy = PointerType::get(FTy); Value* Func = getVal(PFTy, ID); Args[0] = new BitCastInst(Args[0], PtrTy, makeNameUnique("va"), CurBB); - return new CallInst(Func, &Args[0], Args.size()); + return new CallInst(Func, Args.begin(), Args.end()); } else if (Name == "llvm.va_copy") { if (Args.size() != 2) error("Invalid prototype for " + Name + " prototype"); @@ -1887,7 +1884,7 @@ std::string InstName1(makeNameUnique("va1")); Args[0] = new BitCastInst(Args[0], PtrTy, InstName0, CurBB); Args[1] = new BitCastInst(Args[1], PtrTy, InstName1, CurBB); - return new CallInst(Func, &Args[0], Args.size()); + return new CallInst(Func, Args.begin(), Args.end()); } } } @@ -2111,11 +2108,12 @@ while (!F->use_empty()) { CallInst* CI = cast(F->use_back()); - AllocaInst* a = new AllocaInst(ArgTy, 0, "vacopy.fix.1", CI); - AllocaInst* b = new AllocaInst(ArgTy, 0, "vacopy.fix.2", CI); - new StoreInst(CI->getOperand(1), b, CI); - new CallInst(NF, a, b, "", CI); - Value* foo = new LoadInst(a, "vacopy.fix.3", CI); + SmallVector Args; + Args.push_back(new AllocaInst(ArgTy, 0, "vacopy.fix.1", CI)); + Args.push_back(new AllocaInst(ArgTy, 0, "vacopy.fix.2", CI)); + new StoreInst(CI->getOperand(1), Args[1], CI); + new CallInst(NF, Args.begin(), Args.end(), "", CI); + Value* foo = new LoadInst(Args[0], "vacopy.fix.3", CI); CI->replaceAllUsesWith(foo); CI->getParent()->getInstList().erase(CI); } @@ -2145,13 +2143,8 @@ # define YYERROR_VERBOSE 0 #endif -/* Enabling the token table. */ -#ifndef YYTOKEN_TABLE -# define YYTOKEN_TABLE 0 -#endif - #if ! defined (YYSTYPE) && ! defined (YYSTYPE_IS_DECLARED) -#line 1775 "/proj/llvm/llvm-4/tools/llvm-upgrade/UpgradeParser.y" +#line 1776 "/users/dag/projects/cascade/llvm.modified/tools/llvm-upgrade/UpgradeParser.y" typedef union YYSTYPE { llvm::Module *ModuleVal; llvm::Function *FunctionVal; @@ -2193,8 +2186,8 @@ llvm::FCmpInst::Predicate FPred; llvm::Module::Endianness Endianness; } YYSTYPE; -/* Line 196 of yacc.c. */ -#line 2198 "UpgradeParser.tab.c" +/* Line 191 of yacc.c. */ +#line 2191 "UpgradeParser.tab.c" # define yystype YYSTYPE /* obsolescent; will be withdrawn */ # define YYSTYPE_IS_DECLARED 1 # define YYSTYPE_IS_TRIVIAL 1 @@ -2205,34 +2198,8 @@ /* Copy the second part of user declarations. */ -/* Line 219 of yacc.c. */ -#line 2210 "UpgradeParser.tab.c" - -#if ! defined (YYSIZE_T) && defined (__SIZE_TYPE__) -# define YYSIZE_T __SIZE_TYPE__ -#endif -#if ! defined (YYSIZE_T) && defined (size_t) -# define YYSIZE_T size_t -#endif -#if ! defined (YYSIZE_T) && (defined (__STDC__) || defined (__cplusplus)) -# include /* INFRINGES ON USER NAME SPACE */ -# define YYSIZE_T size_t -#endif -#if ! defined (YYSIZE_T) -# define YYSIZE_T unsigned int -#endif - -#ifndef YY_ -# if YYENABLE_NLS -# if ENABLE_NLS -# include /* INFRINGES ON USER NAME SPACE */ -# define YY_(msgid) dgettext ("bison-runtime", msgid) -# endif -# endif -# ifndef YY_ -# define YY_(msgid) msgid -# endif -#endif +/* Line 214 of yacc.c. */ +#line 2203 "UpgradeParser.tab.c" #if ! defined (yyoverflow) || YYERROR_VERBOSE @@ -2240,14 +2207,14 @@ # ifdef YYSTACK_USE_ALLOCA # if YYSTACK_USE_ALLOCA +# define YYSTACK_ALLOC alloca +# endif +# else +# if defined (alloca) || defined (_ALLOCA_H) +# define YYSTACK_ALLOC alloca +# else # ifdef __GNUC__ # define YYSTACK_ALLOC __builtin_alloca -# else -# define YYSTACK_ALLOC alloca -# if defined (__STDC__) || defined (__cplusplus) -# include /* INFRINGES ON USER NAME SPACE */ -# define YYINCLUDED_STDLIB_H -# endif # endif # endif # endif @@ -2255,39 +2222,13 @@ # ifdef YYSTACK_ALLOC /* Pacify GCC's `empty if-body' warning. */ # define YYSTACK_FREE(Ptr) do { /* empty */; } while (0) -# ifndef YYSTACK_ALLOC_MAXIMUM - /* The OS might guarantee only one guard page at the bottom of the stack, - and a page size can be as small as 4096 bytes. So we cannot safely - invoke alloca (N) if N exceeds 4096. Use a slightly smaller number - to allow for a few compiler-allocated temporary stack slots. */ -# define YYSTACK_ALLOC_MAXIMUM 4032 /* reasonable circa 2005 */ -# endif # else -# define YYSTACK_ALLOC YYMALLOC -# define YYSTACK_FREE YYFREE -# ifndef YYSTACK_ALLOC_MAXIMUM -# define YYSTACK_ALLOC_MAXIMUM ((YYSIZE_T) -1) -# endif -# ifdef __cplusplus -extern "C" { -# endif -# ifndef YYMALLOC -# define YYMALLOC malloc -# if (! defined (malloc) && ! defined (YYINCLUDED_STDLIB_H) \ - && (defined (__STDC__) || defined (__cplusplus))) -void *malloc (YYSIZE_T); /* INFRINGES ON USER NAME SPACE */ -# endif -# endif -# ifndef YYFREE -# define YYFREE free -# if (! defined (free) && ! defined (YYINCLUDED_STDLIB_H) \ - && (defined (__STDC__) || defined (__cplusplus))) -void free (void *); /* INFRINGES ON USER NAME SPACE */ -# endif -# endif -# ifdef __cplusplus -} +# if defined (__STDC__) || defined (__cplusplus) +# include /* INFRINGES ON USER NAME SPACE */ +# define YYSIZE_T size_t # endif +# define YYSTACK_ALLOC malloc +# define YYSTACK_FREE free # endif #endif /* ! defined (yyoverflow) || YYERROR_VERBOSE */ @@ -2299,7 +2240,7 @@ /* A type that is properly aligned for any stack member. */ union yyalloc { - short int yyss; + short yyss; YYSTYPE yyvs; }; @@ -2309,7 +2250,7 @@ /* The size of an array large to enough to hold all stacks, each with N elements. */ # define YYSTACK_BYTES(N) \ - ((N) * (sizeof (short int) + sizeof (YYSTYPE)) \ + ((N) * (sizeof (short) + sizeof (YYSTYPE)) \ + YYSTACK_GAP_MAXIMUM) /* Copy COUNT objects from FROM to TO. The source and destination do @@ -2322,7 +2263,7 @@ # define YYCOPY(To, From, Count) \ do \ { \ - YYSIZE_T yyi; \ + register YYSIZE_T yyi; \ for (yyi = 0; yyi < (Count); yyi++) \ (To)[yyi] = (From)[yyi]; \ } \ @@ -2351,7 +2292,7 @@ #if defined (__STDC__) || defined (__cplusplus) typedef signed char yysigned_char; #else - typedef short int yysigned_char; + typedef short yysigned_char; #endif /* YYFINAL -- State number of the termination state. */ @@ -2372,7 +2313,7 @@ #define YYUNDEFTOK 2 #define YYMAXUTOK 406 -#define YYTRANSLATE(YYX) \ +#define YYTRANSLATE(YYX) \ ((unsigned int) (YYX) <= YYMAXUTOK ? yytranslate[YYX] : YYUNDEFTOK) /* YYTRANSLATE[YYLEX] -- Bison symbol number corresponding to YYLEX. */ @@ -2424,7 +2365,7 @@ #if YYDEBUG /* YYPRHS[YYN] -- Index of the first RHS symbol of rule number YYN in YYRHS. */ -static const unsigned short int yyprhs[] = +static const unsigned short yyprhs[] = { 0, 0, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, @@ -2461,7 +2402,7 @@ }; /* YYRHS -- A `-1'-separated list of the rules' RHS. */ -static const short int yyrhs[] = +static const short yyrhs[] = { 200, 0, -1, 5, -1, 6, -1, 3, -1, 4, -1, 79, -1, 80, -1, 81, -1, 82, -1, 83, @@ -2564,45 +2505,45 @@ }; /* YYRLINE[YYN] -- source line where rule number YYN was defined. */ -static const unsigned short int yyrline[] = +static const unsigned short yyrline[] = { - 0, 1915, 1915, 1916, 1924, 1925, 1935, 1935, 1935, 1935, - 1935, 1935, 1935, 1935, 1935, 1935, 1935, 1939, 1939, 1939, - 1943, 1943, 1943, 1943, 1943, 1943, 1947, 1947, 1948, 1948, - 1949, 1949, 1950, 1950, 1951, 1951, 1955, 1955, 1956, 1956, - 1957, 1957, 1958, 1958, 1959, 1959, 1960, 1960, 1961, 1961, - 1962, 1963, 1966, 1966, 1966, 1966, 1970, 1970, 1970, 1970, - 1970, 1970, 1970, 1971, 1971, 1971, 1971, 1971, 1971, 1977, - 1977, 1977, 1977, 1981, 1981, 1981, 1981, 1985, 1985, 1989, - 1989, 1994, 1997, 2002, 2003, 2004, 2005, 2006, 2007, 2008, - 2009, 2013, 2014, 2015, 2016, 2017, 2018, 2019, 2020, 2030, - 2031, 2039, 2040, 2048, 2057, 2058, 2065, 2066, 2070, 2074, - 2090, 2091, 2098, 2099, 2106, 2114, 2114, 2114, 2114, 2114, - 2114, 2114, 2115, 2115, 2115, 2115, 2115, 2120, 2124, 2128, - 2133, 2142, 2169, 2175, 2188, 2199, 2203, 2216, 2220, 2234, - 2238, 2245, 2246, 2252, 2259, 2271, 2301, 2314, 2337, 2365, - 2387, 2398, 2420, 2431, 2440, 2445, 2504, 2511, 2519, 2526, - 2533, 2537, 2541, 2550, 2565, 2577, 2586, 2614, 2627, 2636, - 2642, 2648, 2659, 2665, 2671, 2682, 2683, 2692, 2693, 2705, - 2714, 2715, 2716, 2717, 2718, 2734, 2754, 2756, 2758, 2758, - 2765, 2765, 2773, 2773, 2781, 2781, 2790, 2792, 2794, 2799, - 2813, 2814, 2818, 2821, 2829, 2833, 2840, 2844, 2848, 2852, - 2860, 2860, 2864, 2865, 2869, 2877, 2882, 2890, 2891, 2898, - 2905, 2909, 3099, 3099, 3103, 3103, 3113, 3113, 3117, 3122, - 3123, 3124, 3128, 3129, 3128, 3141, 3142, 3147, 3148, 3149, - 3150, 3154, 3158, 3159, 3160, 3161, 3182, 3186, 3200, 3201, - 3206, 3206, 3214, 3224, 3227, 3236, 3247, 3252, 3261, 3272, - 3272, 3275, 3279, 3283, 3288, 3298, 3316, 3325, 3398, 3402, - 3409, 3421, 3436, 3466, 3476, 3486, 3490, 3497, 3498, 3502, - 3505, 3511, 3530, 3548, 3564, 3578, 3592, 3603, 3621, 3630, - 3639, 3646, 3667, 3691, 3697, 3703, 3709, 3725, 3818, 3826, - 3827, 3831, 3832, 3836, 3842, 3849, 3855, 3862, 3869, 3882, - 3908 + 0, 1916, 1916, 1917, 1925, 1926, 1936, 1936, 1936, 1936, + 1936, 1936, 1936, 1936, 1936, 1936, 1936, 1940, 1940, 1940, + 1944, 1944, 1944, 1944, 1944, 1944, 1948, 1948, 1949, 1949, + 1950, 1950, 1951, 1951, 1952, 1952, 1956, 1956, 1957, 1957, + 1958, 1958, 1959, 1959, 1960, 1960, 1961, 1961, 1962, 1962, + 1963, 1964, 1967, 1967, 1967, 1967, 1971, 1971, 1971, 1971, + 1971, 1971, 1971, 1972, 1972, 1972, 1972, 1972, 1972, 1978, + 1978, 1978, 1978, 1982, 1982, 1982, 1982, 1986, 1986, 1990, + 1990, 1995, 1998, 2003, 2004, 2005, 2006, 2007, 2008, 2009, + 2010, 2014, 2015, 2016, 2017, 2018, 2019, 2020, 2021, 2031, + 2032, 2040, 2041, 2049, 2058, 2059, 2066, 2067, 2071, 2075, + 2091, 2092, 2099, 2100, 2107, 2115, 2115, 2115, 2115, 2115, + 2115, 2115, 2116, 2116, 2116, 2116, 2116, 2121, 2125, 2129, + 2134, 2143, 2170, 2176, 2189, 2200, 2204, 2217, 2221, 2235, + 2239, 2246, 2247, 2253, 2260, 2272, 2302, 2315, 2338, 2366, + 2388, 2399, 2421, 2432, 2441, 2446, 2505, 2512, 2520, 2527, + 2534, 2538, 2542, 2551, 2566, 2578, 2587, 2615, 2628, 2637, + 2643, 2649, 2660, 2666, 2672, 2683, 2684, 2693, 2694, 2706, + 2715, 2716, 2717, 2718, 2719, 2735, 2755, 2757, 2759, 2759, + 2766, 2766, 2774, 2774, 2782, 2782, 2791, 2793, 2795, 2800, + 2814, 2815, 2819, 2822, 2830, 2834, 2841, 2845, 2849, 2853, + 2861, 2861, 2865, 2866, 2870, 2878, 2883, 2891, 2892, 2899, + 2906, 2910, 3100, 3100, 3104, 3104, 3114, 3114, 3118, 3123, + 3124, 3125, 3129, 3130, 3129, 3142, 3143, 3148, 3149, 3150, + 3151, 3155, 3159, 3160, 3161, 3162, 3183, 3187, 3201, 3202, + 3207, 3207, 3215, 3225, 3228, 3237, 3248, 3253, 3262, 3273, + 3273, 3276, 3280, 3284, 3289, 3299, 3317, 3326, 3399, 3403, + 3410, 3422, 3437, 3467, 3477, 3487, 3491, 3498, 3499, 3503, + 3506, 3512, 3531, 3549, 3565, 3579, 3593, 3604, 3622, 3631, + 3640, 3647, 3668, 3692, 3698, 3704, 3710, 3726, 3819, 3827, + 3828, 3832, 3833, 3837, 3843, 3850, 3856, 3863, 3870, 3883, + 3909 }; #endif -#if YYDEBUG || YYERROR_VERBOSE || YYTOKEN_TABLE -/* YYTNAME[SYMBOL-NUM] -- String name of the symbol SYMBOL-NUM. +#if YYDEBUG || YYERROR_VERBOSE +/* YYTNME[SYMBOL-NUM] -- String name of the symbol SYMBOL-NUM. First, the terminals, then, starting at YYNTOKENS, nonterminals. */ static const char *const yytname[] = { @@ -2652,7 +2593,7 @@ # ifdef YYPRINT /* YYTOKNUM[YYLEX-NUM] -- Internal token number corresponding to token YYLEX-NUM. */ -static const unsigned short int yytoknum[] = +static const unsigned short yytoknum[] = { 0, 256, 257, 258, 259, 260, 261, 262, 263, 264, 265, 266, 267, 268, 269, 270, 271, 272, 273, 274, @@ -2751,7 +2692,7 @@ /* YYDEFACT[STATE-NAME] -- Default rule to reduce with in state STATE-NUM when YYTABLE doesn't specify something else to do. Zero means the default is an error. */ -static const unsigned short int yydefact[] = +static const unsigned short yydefact[] = { 198, 0, 90, 184, 1, 183, 232, 83, 84, 85, 86, 87, 88, 89, 0, 224, 257, 180, 181, 257, @@ -2817,7 +2758,7 @@ }; /* YYDEFGOTO[NTERM-NUM]. */ -static const short int yydefgoto[] = +static const short yydefgoto[] = { -1, 94, 312, 329, 330, 331, 255, 272, 332, 333, 219, 220, 243, 221, 25, 15, 63, 555, 359, 454, @@ -2833,7 +2774,7 @@ /* YYPACT[STATE-NUM] -- Index in YYTABLE of the portion describing STATE-NUM. */ #define YYPACT_NINF -542 -static const short int yypact[] = +static const short yypact[] = { -542, 13, 162, 567, -542, -542, -542, -542, -542, -542, -542, -542, -542, -542, 83, -542, 19, -542, -542, -14, @@ -2899,7 +2840,7 @@ }; /* YYPGOTO[NTERM-NUM]. */ -static const short int yypgoto[] = +static const short yypgoto[] = { -542, -542, -542, 435, 439, 441, 191, 197, 442, 445, -119, -116, -541, -542, 478, 489, -107, -542, -267, 37, @@ -2917,7 +2858,7 @@ number is the opposite. If zero, do what YYDEFACT says. If YYTABLE_NINF, syntax error. */ #define YYTABLE_NINF -180 -static const short int yytable[] = +static const short yytable[] = { 97, 241, 227, 110, 242, 230, 223, 361, 197, 31, 111, 26, 449, 4, 244, 204, 34, 578, 97, 201, @@ -3085,7 +3026,7 @@ 175 }; -static const short int yycheck[] = +static const short yycheck[] = { 45, 120, 115, 63, 120, 118, 107, 274, 4, 23, 29, 3, 161, 0, 121, 164, 30, 558, 63, 93, @@ -3320,6 +3261,22 @@ 235, 230, 21, 21, 230, 230 }; +#if ! defined (YYSIZE_T) && defined (__SIZE_TYPE__) +# define YYSIZE_T __SIZE_TYPE__ +#endif +#if ! defined (YYSIZE_T) && defined (size_t) +# define YYSIZE_T size_t +#endif +#if ! defined (YYSIZE_T) +# if defined (__STDC__) || defined (__cplusplus) +# include /* INFRINGES ON USER NAME SPACE */ +# define YYSIZE_T size_t +# endif +#endif +#if ! defined (YYSIZE_T) +# define YYSIZE_T unsigned int +#endif + #define yyerrok (yyerrstatus = 0) #define yyclearin (yychar = YYEMPTY) #define YYEMPTY (-2) @@ -3349,59 +3306,26 @@ goto yybackup; \ } \ else \ - { \ - yyerror (YY_("syntax error: cannot back up")); \ + { \ + yyerror ("syntax error: cannot back up");\ YYERROR; \ } \ while (0) - #define YYTERROR 1 #define YYERRCODE 256 +/* YYLLOC_DEFAULT -- Compute the default location (before the actions + are run). */ -/* YYLLOC_DEFAULT -- Set CURRENT to span from RHS[1] to RHS[N]. - If N is 0, then set CURRENT to the empty location which ends - the previous symbol: RHS[0] (always defined). */ - -#define YYRHSLOC(Rhs, K) ((Rhs)[K]) #ifndef YYLLOC_DEFAULT -# define YYLLOC_DEFAULT(Current, Rhs, N) \ - do \ - if (N) \ - { \ - (Current).first_line = YYRHSLOC (Rhs, 1).first_line; \ - (Current).first_column = YYRHSLOC (Rhs, 1).first_column; \ - (Current).last_line = YYRHSLOC (Rhs, N).last_line; \ - (Current).last_column = YYRHSLOC (Rhs, N).last_column; \ - } \ - else \ - { \ - (Current).first_line = (Current).last_line = \ - YYRHSLOC (Rhs, 0).last_line; \ - (Current).first_column = (Current).last_column = \ - YYRHSLOC (Rhs, 0).last_column; \ - } \ - while (0) -#endif - - -/* YY_LOCATION_PRINT -- Print the location on the stream. - This macro was not mandated originally: define only if we know - we won't break user code: when these are the locations we know. */ - -#ifndef YY_LOCATION_PRINT -# if YYLTYPE_IS_TRIVIAL -# define YY_LOCATION_PRINT(File, Loc) \ - fprintf (File, "%d.%d-%d.%d", \ - (Loc).first_line, (Loc).first_column, \ - (Loc).last_line, (Loc).last_column) -# else -# define YY_LOCATION_PRINT(File, Loc) ((void) 0) -# endif +# define YYLLOC_DEFAULT(Current, Rhs, N) \ + ((Current).first_line = (Rhs)[1].first_line, \ + (Current).first_column = (Rhs)[1].first_column, \ + (Current).last_line = (Rhs)[N].last_line, \ + (Current).last_column = (Rhs)[N].last_column) #endif - /* YYLEX -- calling `yylex' with the right arguments. */ #ifdef YYLEX_PARAM @@ -3424,13 +3348,19 @@ YYFPRINTF Args; \ } while (0) -# define YY_SYMBOL_PRINT(Title, Type, Value, Location) \ +# define YYDSYMPRINT(Args) \ +do { \ + if (yydebug) \ + yysymprint Args; \ +} while (0) + +# define YYDSYMPRINTF(Title, Token, Value, Location) \ do { \ if (yydebug) \ { \ YYFPRINTF (stderr, "%s ", Title); \ - yysymprint (stderr, \ - Type, Value); \ + yysymprint (stderr, \ + Token, Value); \ YYFPRINTF (stderr, "\n"); \ } \ } while (0) @@ -3442,12 +3372,12 @@ #if defined (__STDC__) || defined (__cplusplus) static void -yy_stack_print (short int *bottom, short int *top) +yy_stack_print (short *bottom, short *top) #else static void yy_stack_print (bottom, top) - short int *bottom; - short int *top; + short *bottom; + short *top; #endif { YYFPRINTF (stderr, "Stack now"); @@ -3477,13 +3407,13 @@ #endif { int yyi; - unsigned long int yylno = yyrline[yyrule]; - YYFPRINTF (stderr, "Reducing stack by rule %d (line %lu), ", + unsigned int yylno = yyrline[yyrule]; + YYFPRINTF (stderr, "Reducing stack by rule %d (line %u), ", yyrule - 1, yylno); /* Print the symbols being reduced, and their result. */ for (yyi = yyprhs[yyrule]; 0 <= yyrhs[yyi]; yyi++) - YYFPRINTF (stderr, "%s ", yytname[yyrhs[yyi]]); - YYFPRINTF (stderr, "-> %s\n", yytname[yyr1[yyrule]]); + YYFPRINTF (stderr, "%s ", yytname [yyrhs[yyi]]); + YYFPRINTF (stderr, "-> %s\n", yytname [yyr1[yyrule]]); } # define YY_REDUCE_PRINT(Rule) \ @@ -3497,7 +3427,8 @@ int yydebug; #else /* !YYDEBUG */ # define YYDPRINTF(Args) -# define YY_SYMBOL_PRINT(Title, Type, Value, Location) +# define YYDSYMPRINT(Args) +# define YYDSYMPRINTF(Title, Token, Value, Location) # define YY_STACK_PRINT(Bottom, Top) # define YY_REDUCE_PRINT(Rule) #endif /* !YYDEBUG */ @@ -3512,9 +3443,13 @@ if the built-in stack extension method is used). Do not make this value too large; the results are undefined if - YYSTACK_ALLOC_MAXIMUM < YYSTACK_BYTES (YYMAXDEPTH) + SIZE_MAX < YYSTACK_BYTES (YYMAXDEPTH) evaluated with infinite-precision integer arithmetic. */ +#if defined (YYMAXDEPTH) && YYMAXDEPTH == 0 +# undef YYMAXDEPTH +#endif + #ifndef YYMAXDEPTH # define YYMAXDEPTH 10000 #endif @@ -3536,7 +3471,7 @@ const char *yystr; # endif { - const char *yys = yystr; + register const char *yys = yystr; while (*yys++ != '\0') continue; @@ -3561,8 +3496,8 @@ const char *yysrc; # endif { - char *yyd = yydest; - const char *yys = yysrc; + register char *yyd = yydest; + register const char *yys = yysrc; while ((*yyd++ = *yys++) != '\0') continue; @@ -3572,55 +3507,7 @@ # endif # endif -# ifndef yytnamerr -/* Copy to YYRES the contents of YYSTR after stripping away unnecessary - quotes and backslashes, so that it's suitable for yyerror. The - heuristic is that double-quoting is unnecessary unless the string - contains an apostrophe, a comma, or backslash (other than - backslash-backslash). YYSTR is taken from yytname. If YYRES is - null, do not copy; instead, return the length of what the result - would have been. */ -static YYSIZE_T -yytnamerr (char *yyres, const char *yystr) -{ - if (*yystr == '"') - { - size_t yyn = 0; - char const *yyp = yystr; - - for (;;) - switch (*++yyp) - { - case '\'': - case ',': - goto do_not_strip_quotes; - - case '\\': - if (*++yyp != '\\') - goto do_not_strip_quotes; - /* Fall through. */ - default: - if (yyres) - yyres[yyn] = *yyp; - yyn++; - break; - - case '"': - if (yyres) - yyres[yyn] = '\0'; - return yyn; - } - do_not_strip_quotes: ; - } - - if (! yyres) - return yystrlen (yystr); - - return yystpcpy (yyres, yystr) - yyres; -} -# endif - -#endif /* YYERROR_VERBOSE */ +#endif /* !YYERROR_VERBOSE */ @@ -3644,15 +3531,15 @@ (void) yyvaluep; if (yytype < YYNTOKENS) - YYFPRINTF (yyoutput, "token %s (", yytname[yytype]); + { + YYFPRINTF (yyoutput, "token %s (", yytname[yytype]); +# ifdef YYPRINT + YYPRINT (yyoutput, yytoknum[yytype], *yyvaluep); +# endif + } else YYFPRINTF (yyoutput, "nterm %s (", yytname[yytype]); - -# ifdef YYPRINT - if (yytype < YYNTOKENS) - YYPRINT (yyoutput, yytoknum[yytype], *yyvaluep); -# endif switch (yytype) { default: @@ -3668,11 +3555,10 @@ #if defined (__STDC__) || defined (__cplusplus) static void -yydestruct (const char *yymsg, int yytype, YYSTYPE *yyvaluep) +yydestruct (int yytype, YYSTYPE *yyvaluep) #else static void -yydestruct (yymsg, yytype, yyvaluep) - const char *yymsg; +yydestruct (yytype, yyvaluep) int yytype; YYSTYPE *yyvaluep; #endif @@ -3680,10 +3566,6 @@ /* Pacify ``unused variable'' warnings. */ (void) yyvaluep; - if (!yymsg) - yymsg = "Deleting"; - YY_SYMBOL_PRINT (yymsg, yytype, yyvaluep, yylocationp); - switch (yytype) { @@ -3711,10 +3593,10 @@ -/* The look-ahead symbol. */ +/* The lookahead symbol. */ int yychar; -/* The semantic value of the look-ahead symbol. */ +/* The semantic value of the lookahead symbol. */ YYSTYPE yylval; /* Number of syntax errors so far. */ @@ -3745,12 +3627,12 @@ #endif { - int yystate; - int yyn; + register int yystate; + register int yyn; int yyresult; /* Number of tokens to shift before error messages enabled. */ int yyerrstatus; - /* Look-ahead token as an internal (translated) token number. */ + /* Lookahead token as an internal (translated) token number. */ int yytoken = 0; /* Three stacks and their tools: @@ -3762,14 +3644,14 @@ to reallocate them elsewhere. */ /* The state stack. */ - short int yyssa[YYINITDEPTH]; - short int *yyss = yyssa; - short int *yyssp; + short yyssa[YYINITDEPTH]; + short *yyss = yyssa; + register short *yyssp; /* The semantic value stack. */ YYSTYPE yyvsa[YYINITDEPTH]; YYSTYPE *yyvs = yyvsa; - YYSTYPE *yyvsp; + register YYSTYPE *yyvsp; @@ -3826,14 +3708,14 @@ these so that the &'s don't force the real ones into memory. */ YYSTYPE *yyvs1 = yyvs; - short int *yyss1 = yyss; + short *yyss1 = yyss; /* Each stack pointer address is followed by the size of the data in use in that stack, in bytes. This used to be a conditional around just the two extra args, but that might be undefined if yyoverflow is a macro. */ - yyoverflow (YY_("memory exhausted"), + yyoverflow ("parser stack overflow", &yyss1, yysize * sizeof (*yyssp), &yyvs1, yysize * sizeof (*yyvsp), @@ -3844,21 +3726,21 @@ } #else /* no yyoverflow */ # ifndef YYSTACK_RELOCATE - goto yyexhaustedlab; + goto yyoverflowlab; # else /* Extend the stack our own way. */ if (YYMAXDEPTH <= yystacksize) - goto yyexhaustedlab; + goto yyoverflowlab; yystacksize *= 2; if (YYMAXDEPTH < yystacksize) yystacksize = YYMAXDEPTH; { - short int *yyss1 = yyss; + short *yyss1 = yyss; union yyalloc *yyptr = (union yyalloc *) YYSTACK_ALLOC (YYSTACK_BYTES (yystacksize)); if (! yyptr) - goto yyexhaustedlab; + goto yyoverflowlab; YYSTACK_RELOCATE (yyss); YYSTACK_RELOCATE (yyvs); @@ -3890,18 +3772,18 @@ yybackup: /* Do appropriate processing given the current state. */ -/* Read a look-ahead token if we need one and don't already have one. */ +/* Read a lookahead token if we need one and don't already have one. */ /* yyresume: */ - /* First try to decide what to do without reference to look-ahead token. */ + /* First try to decide what to do without reference to lookahead token. */ yyn = yypact[yystate]; if (yyn == YYPACT_NINF) goto yydefault; - /* Not known => get a look-ahead token if don't already have one. */ + /* Not known => get a lookahead token if don't already have one. */ - /* YYCHAR is either YYEMPTY or YYEOF or a valid look-ahead symbol. */ + /* YYCHAR is either YYEMPTY or YYEOF or a valid lookahead symbol. */ if (yychar == YYEMPTY) { YYDPRINTF ((stderr, "Reading a token: ")); @@ -3916,7 +3798,7 @@ else { yytoken = YYTRANSLATE (yychar); - YY_SYMBOL_PRINT ("Next token is", yytoken, &yylval, &yylloc); + YYDSYMPRINTF ("Next token is", yytoken, &yylval, &yylloc); } /* If the proper action on seeing token YYTOKEN is to reduce or to @@ -3936,8 +3818,8 @@ if (yyn == YYFINAL) YYACCEPT; - /* Shift the look-ahead token. */ - YY_SYMBOL_PRINT ("Shifting", yytoken, &yylval, &yylloc); + /* Shift the lookahead token. */ + YYDPRINTF ((stderr, "Shifting token %s, ", yytname[yytoken])); /* Discard the token being shifted unless it is eof. */ if (yychar != YYEOF) @@ -3987,399 +3869,399 @@ switch (yyn) { case 3: -#line 1916 "/proj/llvm/llvm-4/tools/llvm-upgrade/UpgradeParser.y" +#line 1917 "/users/dag/projects/cascade/llvm.modified/tools/llvm-upgrade/UpgradeParser.y" { - if ((yyvsp[0].UIntVal) > (uint32_t)INT32_MAX) // Outside of my range! + if (yyvsp[0].UIntVal > (uint32_t)INT32_MAX) // Outside of my range! error("Value too large for type"); - (yyval.SIntVal) = (int32_t)(yyvsp[0].UIntVal); + yyval.SIntVal = (int32_t)yyvsp[0].UIntVal; ;} break; case 5: -#line 1925 "/proj/llvm/llvm-4/tools/llvm-upgrade/UpgradeParser.y" +#line 1926 "/users/dag/projects/cascade/llvm.modified/tools/llvm-upgrade/UpgradeParser.y" { - if ((yyvsp[0].UInt64Val) > (uint64_t)INT64_MAX) // Outside of my range! + if (yyvsp[0].UInt64Val > (uint64_t)INT64_MAX) // Outside of my range! error("Value too large for type"); - (yyval.SInt64Val) = (int64_t)(yyvsp[0].UInt64Val); + yyval.SInt64Val = (int64_t)yyvsp[0].UInt64Val; ;} break; case 26: -#line 1947 "/proj/llvm/llvm-4/tools/llvm-upgrade/UpgradeParser.y" - { (yyval.IPred) = ICmpInst::ICMP_EQ; ;} +#line 1948 "/users/dag/projects/cascade/llvm.modified/tools/llvm-upgrade/UpgradeParser.y" + { yyval.IPred = ICmpInst::ICMP_EQ; ;} break; case