From rspencer at reidspencer.com Mon Aug 13 01:19:52 2007 From: rspencer at reidspencer.com (Reid Spencer) Date: Mon, 13 Aug 2007 06:19:52 -0000 Subject: [llvm-commits] [llvm] r41040 - /llvm/trunk/utils/findmisopt Message-ID: <200708130619.l7D6Jq5b019685@zion.cs.uiuc.edu> Author: reid Date: Mon Aug 13 01:19:51 2007 New Revision: 41040 URL: http://llvm.org/viewvc/llvm-project?rev=41040&view=rev Log: Make use of the llvm-ld tool's new ability to read input from stdin to extract the list of link time passes to be run, just as for opt, with the -debug-pass=Arguments option. Modified: llvm/trunk/utils/findmisopt Modified: llvm/trunk/utils/findmisopt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/findmisopt?rev=41040&r1=41039&r2=41040&view=diff ============================================================================== --- llvm/trunk/utils/findmisopt (original) +++ llvm/trunk/utils/findmisopt Mon Aug 13 01:19:51 2007 @@ -73,6 +73,13 @@ echo "Unoptimized program: $prog" echo " Optimized program: $optprog" +# Define the list of optimizations to run. This comprises the same set of +# optimizations that opt -std-compile-opts and gccld run, in the same order. +opt_switches=`llvm-as < /dev/null -o - | opt -std-compile-opts -disable-output -debug-pass=Arguments 2>&1 | sed 's/Pass Arguments: //'` +ld_switches=`llvm-as < /dev/null -o - | llvm-ld - -debug-pass=Arguments 2>&1 | sed 's/Pass Arguments: //'` +all_switches="$opt_switches $ld_switches" +echo "Passes : $all_switches" + # Create output directory if it doesn't exist if [ -f "$outdir" ] ; then echo "$outdir is not a directory" @@ -92,13 +99,6 @@ "$prog" $args > "$out" 2>&1 <$input ex1=$? -# Define the list of optimizations to run. This comprises the same set of -# optimizations that opt -std-compile-opts and gccld run, in the same order. -opt_switches=`llvm-as < /dev/null -o - | opt -std-compile-opts -disable-output -debug-pass=Arguments 2>&1 | sed 's/Pass Arguments: //'` -ld_switches=`llvm-as < /dev/null -o - | llvm-ld - -std-link-opts -disable-output -debug-pass=Arguments 2>&1 | sed 's/Pass Arguments: //'` -all_switches="$opt_switches $ld_switches" -echo "Passes : $all_switches" - # Current set of switches is empty function tryit { switches_to_use="$1" From rspencer at reidspencer.com Mon Aug 13 01:35:23 2007 From: rspencer at reidspencer.com (Reid Spencer) Date: Mon, 13 Aug 2007 06:35:23 -0000 Subject: [llvm-commits] [llvm-gcc-4.0] r41041 - /llvm-gcc-4.0/trunk/ModuleInfo.txt Message-ID: <200708130635.l7D6ZNoM020108@zion.cs.uiuc.edu> Author: reid Date: Mon Aug 13 01:35:23 2007 New Revision: 41041 URL: http://llvm.org/viewvc/llvm-project?rev=41041&view=rev Log: Using a pipeline with these commands doesn't work. Fortunately, there's a workaround with the make -C option. Modified: llvm-gcc-4.0/trunk/ModuleInfo.txt Modified: llvm-gcc-4.0/trunk/ModuleInfo.txt URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.0/trunk/ModuleInfo.txt?rev=41041&r1=41040&r2=41041&view=diff ============================================================================== --- llvm-gcc-4.0/trunk/ModuleInfo.txt (original) +++ llvm-gcc-4.0/trunk/ModuleInfo.txt Mon Aug 13 01:35:23 2007 @@ -1,4 +1,4 @@ DepModule: llvm BuildCmd: ./build-for-llvm-top.sh -CleanCmd: cd ../build.llvm-gcc-4.0 ; make clean -InstallCmd: cd ../build.llvm-gcc-4.0 ; make install +CleanCmd: make clean -C ../build.llvm-gcc-4.0 +InstallCmd: make install -C ../build.llvm-gcc-4.0 From rspencer at reidspencer.com Mon Aug 13 01:37:41 2007 From: rspencer at reidspencer.com (Reid Spencer) Date: Mon, 13 Aug 2007 06:37:41 -0000 Subject: [llvm-commits] [llvm-top] r41042 - in /llvm-top/trunk: install library.sh Message-ID: <200708130637.l7D6bg2f020175@zion.cs.uiuc.edu> Author: reid Date: Mon Aug 13 01:37:41 2007 New Revision: 41042 URL: http://llvm.org/viewvc/llvm-project?rev=41042&view=rev Log: Fix problems with the install script checking out dependencies into a subdirectory, caused by not returning to $LLVM_TOP on each iteration. Also, add more debugging output. Modified: llvm-top/trunk/install llvm-top/trunk/library.sh Modified: llvm-top/trunk/install URL: http://llvm.org/viewvc/llvm-project/llvm-top/trunk/install?rev=41042&r1=41041&r2=41042&view=diff ============================================================================== --- llvm-top/trunk/install (original) +++ llvm-top/trunk/install Mon Aug 13 01:37:41 2007 @@ -38,13 +38,16 @@ # sorted in dependence order by get_module_dependencies for mod in $MODULE_DEPENDENCIES ; do get_module_info $mod InstallCmd - if test ! -z "$MODULE_INFO_VALUE" ; then + TheCommand="$MODULE_INFO_VALUE" + if test ! -z "$TheCommand" ; then msg 1 Installing module $mod cd $LLVM_TOP/$mod - $MODULE_INFO_VALUE || die $? "Install of module $mod failed." + msg 2 Install command for "$mod" is "$TheCommand" + $TheCommand || die $? "Install of module $mod failed." else msg 2 Module $mod has no InstallCmd in the ModuleInfo.txt fi + cd $LLVM_TOP done # Report what happened. Modified: llvm-top/trunk/library.sh URL: http://llvm.org/viewvc/llvm-project/llvm-top/trunk/library.sh?rev=41042&r1=41041&r2=41042&view=diff ============================================================================== --- llvm-top/trunk/library.sh (original) +++ llvm-top/trunk/library.sh Mon Aug 13 01:37:41 2007 @@ -127,13 +127,15 @@ get_module_info() { local module="$1" local item_name="$2" + local item_value="" msg 2 "Getting '$item_name' module info for '$module'" if test ! -d "$module" ; then checkout_a_module "$module" || die $? "Checkout failed." fi + msg 2 "Getting module info from $module/ModuleInfo.txt" local module_info="$module/ModuleInfo.txt" if test -f "$module_info" ; then - local item_value=`grep -i "$item_name:" $module_info | \ + item_value=`grep -i "$item_name:" $module_info | \ sed -e "s/$item_name: *//g"` if test "$?" -ne 0 ; then die $? "Searching file '$module_info for $item_name' failed." @@ -213,12 +215,13 @@ msg 1 "Building module '$module'" get_module_info $module BuildCmd if test -z "$MODULE_INFO_VALUE" ; then - msg 2 "Module $module has no BuildCmd entry so it will not be built." + msg 1 "Module $module has no BuildCmd entry so it will not be built." return 0 fi local build_cmd="$MODULE_INFO_VALUE MODULE=$module $build_args" msg 2 "Build Command: $build_cmd" - cd $LLVM_TOP/$module + cd "$LLVM_TOP/$module" $build_cmd || die $? "Build of module '$module' failed." + cd "$LLVM_TOP" } From evan.cheng at apple.com Mon Aug 13 02:12:24 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 13 Aug 2007 07:12:24 -0000 Subject: [llvm-commits] [llvm] r41043 - /llvm/trunk/lib/CodeGen/LiveInterval.cpp Message-ID: <200708130712.l7D7CQEw021095@zion.cs.uiuc.edu> Author: evancheng Date: Mon Aug 13 02:12:23 2007 New Revision: 41043 URL: http://llvm.org/viewvc/llvm-project?rev=41043&view=rev Log: Kill info update bugs. Modified: llvm/trunk/lib/CodeGen/LiveInterval.cpp Modified: llvm/trunk/lib/CodeGen/LiveInterval.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveInterval.cpp?rev=41043&r1=41042&r2=41043&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/LiveInterval.cpp (original) +++ llvm/trunk/lib/CodeGen/LiveInterval.cpp Mon Aug 13 02:12:23 2007 @@ -232,7 +232,7 @@ // If the span we are removing is at the start of the LiveRange, adjust it. if (I->start == Start) { if (I->end == End) { - removeKillForValNum(I->ValId, End); + removeKillForValNum(I->ValId, Start, End); ranges.erase(I); // Removed the whole LiveRange. } else I->start = End; @@ -242,7 +242,7 @@ // Otherwise if the span we are removing is at the end of the LiveRange, // adjust the other way. if (I->end == End) { - replaceKillForValNum(I->ValId, End, Start); + removeKillForValNum(I->ValId, Start, End); I->end = Start; return; } @@ -438,8 +438,6 @@ if (LR != begin()) { iterator Prev = LR-1; if (Prev->ValId == V2 && Prev->end == LR->start) { - bool Replaced = replaceKillForValNum(V2, Prev->end, LR->end); - assert(Replaced); Prev->end = LR->end; // Erase this live-range. @@ -458,7 +456,6 @@ // of the loop. if (I != end()) { if (I->start == LR->end && I->ValId == V2) { - removeKillForValNum(V2, LR->end); LR->end = I->end; ranges.erase(I); I = LR+1; From sabre at nondot.org Mon Aug 13 11:48:28 2007 From: sabre at nondot.org (Chris Lattner) Date: Mon, 13 Aug 2007 16:48:28 -0000 Subject: [llvm-commits] [llvm-gcc-4.0] r41045 - /llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp Message-ID: <200708131648.l7DGmSXq026304@zion.cs.uiuc.edu> Author: lattner Date: Mon Aug 13 11:48:27 2007 New Revision: 41045 URL: http://llvm.org/viewvc/llvm-project?rev=41045&view=rev Log: When building casts, constant fold with ConstantFoldInstruction instead of ConstantExpr::getCast. This allows target-data driven constant folding to happen. In the testcase from PR1602, for example, this results in: %tmp26 = sub i32 %tmp232425, 1 instead of: %tmp26 = sub i32 %tmp232425, ptrtoint (i32 (...)** inttoptr (i64 1 to i32 (...)**) to i32) Modified: llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp Modified: llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp?rev=41045&r1=41044&r2=41045&view=diff ============================================================================== --- llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp (original) +++ llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp Mon Aug 13 11:48:27 2007 @@ -34,6 +34,7 @@ #include "llvm/InlineAsm.h" #include "llvm/Instructions.h" #include "llvm/Module.h" +#include "llvm/Analysis/ConstantFolding.h" #include "llvm/Target/TargetAsmInfo.h" #include "llvm/Target/TargetData.h" #include "llvm/Target/TargetMachine.h" @@ -997,16 +998,26 @@ if (V->getType() == Ty) return V; + // If this is a simple constant operand, fold it now. If it is a constant + // expr operand, fold it below. if (Constant *C = dyn_cast(V)) - return ConstantExpr::getCast(Instruction::CastOps(opcode), C, Ty); + if (!isa(C)) + return ConstantExpr::getCast(Instruction::CastOps(opcode), C, Ty); // Handle 'trunc (zext i1 X to T2) to i1' as X, because this occurs all over // the place. if (ZExtInst *CI = dyn_cast(V)) if (Ty == Type::Int1Ty && CI->getOperand(0)->getType() == Type::Int1Ty) return CI->getOperand(0); - return Builder.CreateCast(Instruction::CastOps(opcode), V, Ty, - V->getName().c_str()); + Value *Result = Builder.CreateCast(Instruction::CastOps(opcode), V, Ty, + V->getNameStart()); + + // If this is a constantexpr, fold the instruction with + // ConstantFoldInstruction to allow TargetData-driven folding to occur. + if (isa(V)) + Result = ConstantFoldInstruction(cast(Result), &TD); + + return Result; } /// CastToAnyType - Cast the specified value to the specified type making no From sabre at nondot.org Mon Aug 13 12:09:08 2007 From: sabre at nondot.org (Chris Lattner) Date: Mon, 13 Aug 2007 17:09:08 -0000 Subject: [llvm-commits] [llvm] r41046 - /llvm/trunk/lib/VMCore/ConstantFold.cpp Message-ID: <200708131709.l7DH98IZ027284@zion.cs.uiuc.edu> Author: lattner Date: Mon Aug 13 12:09:08 2007 New Revision: 41046 URL: http://llvm.org/viewvc/llvm-project?rev=41046&view=rev Log: Constant fold: getelementptr (i8* inttoptr (i64 1 to i8*), i32 -1) Into: inttoptr (i64 0 to i8*) -> null This occurs in the example in PR1602. With this fixed, we now compile the example in PR1602 into fully "devirtualized" code: define void @_Z1g1S(%struct.S* noalias %s) { entry: %tmp131415 = getelementptr %struct.S* %s, i32 0, i32 0 ; [#uses=1] %tmp16 = load i32 (...)*** %tmp131415, align 4 ; [#uses=1] %tmp26277 = load i32 (...)** %tmp16 ; [#uses=1] %tmp2829 = bitcast i32 (...)* %tmp26277 to void (%struct.S*)* ; [#uses=1] tail call void %tmp2829( %struct.S* %s ) ret void } This still has the vtable dispatch (as required) but does not have any pointer to method cruft left. Modified: llvm/trunk/lib/VMCore/ConstantFold.cpp Modified: llvm/trunk/lib/VMCore/ConstantFold.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/ConstantFold.cpp?rev=41046&r1=41045&r2=41046&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/ConstantFold.cpp (original) +++ llvm/trunk/lib/VMCore/ConstantFold.cpp Mon Aug 13 12:09:08 2007 @@ -1427,7 +1427,7 @@ // long 0, long 0) // To: int* getelementptr ([3 x int]* %X, long 0, long 0) // - if (CE->isCast() && NumIdx > 1 && Idx0->isNullValue()) + if (CE->isCast() && NumIdx > 1 && Idx0->isNullValue()) { if (const PointerType *SPT = dyn_cast(CE->getOperand(0)->getType())) if (const ArrayType *SAT = dyn_cast(SPT->getElementType())) @@ -1436,6 +1436,28 @@ if (CAT->getElementType() == SAT->getElementType()) return ConstantExpr::getGetElementPtr( (Constant*)CE->getOperand(0), Idxs, NumIdx); + } + + // Fold: getelementptr (i8* inttoptr (i64 1 to i8*), i32 -1) + // Into: inttoptr (i64 0 to i8*) + // This happens with pointers to member functions in C++. + if (CE->getOpcode() == Instruction::IntToPtr && NumIdx == 1 && + isa(CE->getOperand(0)) && isa(Idxs[0]) && + cast(CE->getType())->getElementType() == Type::Int8Ty) { + Constant *Base = CE->getOperand(0); + Constant *Offset = Idxs[0]; + + // Convert the smaller integer to the larger type. + if (Offset->getType()->getPrimitiveSizeInBits() < + Base->getType()->getPrimitiveSizeInBits()) + Offset = ConstantExpr::getSExt(Offset, Base->getType()); + else if (Base->getType()->getPrimitiveSizeInBits() < + Offset->getType()->getPrimitiveSizeInBits()) + Base = ConstantExpr::getZExt(Base, Base->getType()); + + Base = ConstantExpr::getAdd(Base, Offset); + return ConstantExpr::getIntToPtr(Base, CE->getType()); + } } return 0; } From sabre at nondot.org Mon Aug 13 12:17:03 2007 From: sabre at nondot.org (Chris Lattner) Date: Mon, 13 Aug 2007 17:17:03 -0000 Subject: [llvm-commits] [llvm] r41047 - /llvm/trunk/test/C++Frontend/ptr-to-method-devirt.cpp Message-ID: <200708131717.l7DHH3KB027859@zion.cs.uiuc.edu> Author: lattner Date: Mon Aug 13 12:17:03 2007 New Revision: 41047 URL: http://llvm.org/viewvc/llvm-project?rev=41047&view=rev Log: test that the ptr-to-method is succefully eliminated, leaving just the vtable dispatch. Added: llvm/trunk/test/C++Frontend/ptr-to-method-devirt.cpp Added: llvm/trunk/test/C++Frontend/ptr-to-method-devirt.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/C%2B%2BFrontend/ptr-to-method-devirt.cpp?rev=41047&view=auto ============================================================================== --- llvm/trunk/test/C++Frontend/ptr-to-method-devirt.cpp (added) +++ llvm/trunk/test/C++Frontend/ptr-to-method-devirt.cpp Mon Aug 13 12:17:03 2007 @@ -0,0 +1,14 @@ +// PR1602 +// RUN: %llvmgxx -c -emit-llvm %s -o - -O3 | llvm-dis | not grep ptrtoint +// RUN: %llvmgxx -c -emit-llvm %s -o - -O3 | llvm-dis | grep getelementptr | count 1 + + +struct S { virtual void f(); }; + +typedef void (S::*P)(void); + +const P p = &S::f; + +void g(S s) { + (s.*p)(); + } From sabre at nondot.org Mon Aug 13 13:42:38 2007 From: sabre at nondot.org (Chris Lattner) Date: Mon, 13 Aug 2007 18:42:38 -0000 Subject: [llvm-commits] [llvm] r41048 - in /llvm/trunk: lib/Target/X86/X86AsmPrinter.cpp test/CodeGen/X86/2007-08-13-AppendingLinkage.ll Message-ID: <200708131842.l7DIgcff031198@zion.cs.uiuc.edu> Author: lattner Date: Mon Aug 13 13:42:37 2007 New Revision: 41048 URL: http://llvm.org/viewvc/llvm-project?rev=41048&view=rev Log: Fix PR1607 Added: llvm/trunk/test/CodeGen/X86/2007-08-13-AppendingLinkage.ll Modified: llvm/trunk/lib/Target/X86/X86AsmPrinter.cpp Modified: llvm/trunk/lib/Target/X86/X86AsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86AsmPrinter.cpp?rev=41048&r1=41047&r2=41048&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86AsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/X86/X86AsmPrinter.cpp Mon Aug 13 13:42:37 2007 @@ -231,12 +231,12 @@ O << "\t.weak\t" << name << "\n"; } break; - case GlobalValue::AppendingLinkage: - // FIXME: appending linkage variables should go into a section of - // their name or something. For now, just emit them as external. case GlobalValue::DLLExportLinkage: DLLExportedGVs.insert(Mang->makeNameProper(I->getName(),"")); // FALL THROUGH + case GlobalValue::AppendingLinkage: + // FIXME: appending linkage variables should go into a section of + // their name or something. For now, just emit them as external. case GlobalValue::ExternalLinkage: // If external or appending, declare as a global symbol O << "\t.globl " << name << "\n"; Added: llvm/trunk/test/CodeGen/X86/2007-08-13-AppendingLinkage.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-08-13-AppendingLinkage.ll?rev=41048&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/X86/2007-08-13-AppendingLinkage.ll (added) +++ llvm/trunk/test/CodeGen/X86/2007-08-13-AppendingLinkage.ll Mon Aug 13 13:42:37 2007 @@ -0,0 +1,12 @@ +; RUN: llvm-as < %s | llc -march=x86 | not grep drectve +; PR1607 + +%hlvm_programs_element = type { i8*, i32 (i32, i8**)* } + at hlvm_programs = appending constant [1 x %hlvm_programs_element] +zeroinitializer + +define %hlvm_programs_element* @hlvm_get_programs() { +entry: + ret %hlvm_programs_element* getelementptr([1 x %hlvm_programs_element]* + @hlvm_programs, i32 0, i32 0) +} From djg at cray.com Mon Aug 13 15:03:06 2007 From: djg at cray.com (Dan Gohman) Date: Mon, 13 Aug 2007 20:03:06 -0000 Subject: [llvm-commits] [llvm] r41049 - in /llvm/trunk: lib/Target/X86/X86ISelDAGToDAG.cpp test/CodeGen/X86/lea-recursion.ll Message-ID: <200708132003.l7DK36eF001116@zion.cs.uiuc.edu> Author: djg Date: Mon Aug 13 15:03:06 2007 New Revision: 41049 URL: http://llvm.org/viewvc/llvm-project?rev=41049&view=rev Log: When x86 addresses matching exceeds its recursion limit, check to see if the base register is already occupied before assuming it can be used. This fixes bogus code generation in the accompanying testcase. Added: llvm/trunk/test/CodeGen/X86/lea-recursion.ll Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp?rev=41049&r1=41048&r2=41049&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Mon Aug 13 15:03:06 2007 @@ -142,6 +142,8 @@ bool MatchAddress(SDOperand N, X86ISelAddressMode &AM, bool isRoot = true, unsigned Depth = 0); + bool MatchAddressBase(SDOperand N, X86ISelAddressMode &AM, + bool isRoot, unsigned Depth); bool SelectAddr(SDOperand Op, SDOperand N, SDOperand &Base, SDOperand &Scale, SDOperand &Index, SDOperand &Disp); bool SelectLEAAddr(SDOperand Op, SDOperand N, SDOperand &Base, @@ -572,12 +574,9 @@ /// addressing mode bool X86DAGToDAGISel::MatchAddress(SDOperand N, X86ISelAddressMode &AM, bool isRoot, unsigned Depth) { - if (Depth > 5) { - // Default, generate it as a register. - AM.BaseType = X86ISelAddressMode::RegBase; - AM.Base.Reg = N; - return false; - } + // Limit recursion. + if (Depth > 5) + return MatchAddressBase(N, AM, isRoot, Depth); // RIP relative addressing: %rip + 32-bit displacement! if (AM.isRIPRel) { @@ -763,6 +762,13 @@ break; } + return MatchAddressBase(N, AM, isRoot, Depth); +} + +/// MatchAddressBase - Helper for MatchAddress. Add the specified node to the +/// specified addressing mode without any further recursion. +bool X86DAGToDAGISel::MatchAddressBase(SDOperand N, X86ISelAddressMode &AM, + bool isRoot, unsigned Depth) { // Is the base register already occupied? if (AM.BaseType != X86ISelAddressMode::RegBase || AM.Base.Reg.Val) { // If so, check to see if the scale index register is set. Added: llvm/trunk/test/CodeGen/X86/lea-recursion.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/lea-recursion.ll?rev=41049&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/X86/lea-recursion.ll (added) +++ llvm/trunk/test/CodeGen/X86/lea-recursion.ll Mon Aug 13 15:03:06 2007 @@ -0,0 +1,47 @@ +; RUN: llvm-as < %s | llc -march=x86-64 | grep lea | wc -l | grep 12 + +; This testcase was written to demonstrate an instruction-selection problem, +; however it also happens to expose a limitation in the DAGCombiner's +; expression reassociation which causes it to miss opportunities for +; constant folding due to the intermediate adds having multiple uses. +; The Reassociate pass has similar limitations. If these limitations are +; fixed, the test commands above will need to be updated to expect fewer +; lea instructions. + + at g0 = weak global [1000 x i32] zeroinitializer, align 32 ; <[1000 x i32]*> [#uses=8] + at g1 = weak global [1000 x i32] zeroinitializer, align 32 ; <[1000 x i32]*> [#uses=7] + +define void @foo() { +entry: + %tmp4 = load i32* getelementptr ([1000 x i32]* @g0, i32 0, i32 0) ; [#uses=1] + %tmp8 = load i32* getelementptr ([1000 x i32]* @g1, i32 0, i32 0) ; [#uses=1] + %tmp9 = add i32 %tmp4, 1 ; [#uses=1] + %tmp10 = add i32 %tmp9, %tmp8 ; [#uses=2] + store i32 %tmp10, i32* getelementptr ([1000 x i32]* @g0, i32 0, i32 1) + %tmp8.1 = load i32* getelementptr ([1000 x i32]* @g1, i32 0, i32 1) ; [#uses=1] + %tmp9.1 = add i32 %tmp10, 1 ; [#uses=1] + %tmp10.1 = add i32 %tmp9.1, %tmp8.1 ; [#uses=2] + store i32 %tmp10.1, i32* getelementptr ([1000 x i32]* @g0, i32 0, i32 2) + %tmp8.2 = load i32* getelementptr ([1000 x i32]* @g1, i32 0, i32 2) ; [#uses=1] + %tmp9.2 = add i32 %tmp10.1, 1 ; [#uses=1] + %tmp10.2 = add i32 %tmp9.2, %tmp8.2 ; [#uses=2] + store i32 %tmp10.2, i32* getelementptr ([1000 x i32]* @g0, i32 0, i32 3) + %tmp8.3 = load i32* getelementptr ([1000 x i32]* @g1, i32 0, i32 3) ; [#uses=1] + %tmp9.3 = add i32 %tmp10.2, 1 ; [#uses=1] + %tmp10.3 = add i32 %tmp9.3, %tmp8.3 ; [#uses=2] + store i32 %tmp10.3, i32* getelementptr ([1000 x i32]* @g0, i32 0, i32 4) + %tmp8.4 = load i32* getelementptr ([1000 x i32]* @g1, i32 0, i32 4) ; [#uses=1] + %tmp9.4 = add i32 %tmp10.3, 1 ; [#uses=1] + %tmp10.4 = add i32 %tmp9.4, %tmp8.4 ; [#uses=2] + store i32 %tmp10.4, i32* getelementptr ([1000 x i32]* @g0, i32 0, i32 5) + %tmp8.5 = load i32* getelementptr ([1000 x i32]* @g1, i32 0, i32 5) ; [#uses=1] + %tmp9.5 = add i32 %tmp10.4, 1 ; [#uses=1] + %tmp10.5 = add i32 %tmp9.5, %tmp8.5 ; [#uses=2] + store i32 %tmp10.5, i32* getelementptr ([1000 x i32]* @g0, i32 0, i32 6) + %tmp8.6 = load i32* getelementptr ([1000 x i32]* @g1, i32 0, i32 6) ; [#uses=1] + %tmp9.6 = add i32 %tmp10.5, 1 ; [#uses=1] + %tmp10.6 = add i32 %tmp9.6, %tmp8.6 ; [#uses=1] + store i32 %tmp10.6, i32* getelementptr ([1000 x i32]* @g0, i32 0, i32 7) + ret void +} + From djg at cray.com Mon Aug 13 15:06:12 2007 From: djg at cray.com (Dan Gohman) Date: Mon, 13 Aug 2007 15:06:12 -0500 Subject: [llvm-commits] [llvm] r40988 - /llvm/trunk/test/Scripts/count Message-ID: <20070813200612.GZ14991@village.us.cray.com> > Why not make the script do the grep too? Something like: > > countgrep foo 2 *shrug*, that's more than I needed to solve a specific problem :-). And it's nice to be able to support grep options like -v, -F, -i, etc. in a simple way. Dan -- Dan Gohman, Cray Inc. From sabre at nondot.org Mon Aug 13 15:08:17 2007 From: sabre at nondot.org (Chris Lattner) Date: Mon, 13 Aug 2007 20:08:17 -0000 Subject: [llvm-commits] [llvm] r41050 - /llvm/trunk/lib/ExecutionEngine/JIT/JIT.cpp Message-ID: <200708132008.l7DK8HbV001235@zion.cs.uiuc.edu> Author: lattner Date: Mon Aug 13 15:08:16 2007 New Revision: 41050 URL: http://llvm.org/viewvc/llvm-project?rev=41050&view=rev Log: move assertion into mutex guard, a partial fix for PR1606. Modified: llvm/trunk/lib/ExecutionEngine/JIT/JIT.cpp Modified: llvm/trunk/lib/ExecutionEngine/JIT/JIT.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/JIT/JIT.cpp?rev=41050&r1=41049&r2=41050&view=diff ============================================================================== --- llvm/trunk/lib/ExecutionEngine/JIT/JIT.cpp (original) +++ llvm/trunk/lib/ExecutionEngine/JIT/JIT.cpp Mon Aug 13 15:08:16 2007 @@ -238,9 +238,9 @@ /// void JIT::runJITOnFunction(Function *F) { static bool isAlreadyCodeGenerating = false; - assert(!isAlreadyCodeGenerating && "Error: Recursive compilation detected!"); MutexGuard locked(lock); + assert(!isAlreadyCodeGenerating && "Error: Recursive compilation detected!"); // JIT the function isAlreadyCodeGenerating = true; From dpatel at apple.com Mon Aug 13 16:59:19 2007 From: dpatel at apple.com (Devang Patel) Date: Mon, 13 Aug 2007 21:59:19 -0000 Subject: [llvm-commits] [llvm] r41051 - /llvm/trunk/lib/Transforms/Utils/BreakCriticalEdges.cpp Message-ID: <200708132159.l7DLxKok005616@zion.cs.uiuc.edu> Author: dpatel Date: Mon Aug 13 16:59:17 2007 New Revision: 41051 URL: http://llvm.org/viewvc/llvm-project?rev=41051&view=rev Log: If NewBB dominates DestBB then DestBB is not part of NewBB's dominance frontier. Modified: llvm/trunk/lib/Transforms/Utils/BreakCriticalEdges.cpp Modified: llvm/trunk/lib/Transforms/Utils/BreakCriticalEdges.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/BreakCriticalEdges.cpp?rev=41051&r1=41050&r2=41051&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/BreakCriticalEdges.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/BreakCriticalEdges.cpp Mon Aug 13 16:59:17 2007 @@ -227,8 +227,12 @@ DominanceFrontier::DomSetType NewDFSet; if (NewBBDominatesDestBB) { DominanceFrontier::iterator I = DF->find(DestBB); - if (I != DF->end()) + if (I != DF->end()) { DF->addBasicBlock(NewBB, I->second); + // However NewBB's frontier does not include DestBB. + DominanceFrontier::iterator NF = DF->find(NewBB); + DF->removeFromFrontier(NF, DestBB); + } else DF->addBasicBlock(NewBB, DominanceFrontier::DomSetType()); } else { From dpatel at apple.com Mon Aug 13 17:10:29 2007 From: dpatel at apple.com (Devang Patel) Date: Mon, 13 Aug 2007 22:10:29 -0000 Subject: [llvm-commits] [llvm] r41052 - in /llvm/trunk: include/llvm/Analysis/Dominators.h lib/VMCore/Dominators.cpp Message-ID: <200708132210.l7DMAThw006038@zion.cs.uiuc.edu> Author: dpatel Date: Mon Aug 13 17:10:29 2007 New Revision: 41052 URL: http://llvm.org/viewvc/llvm-project?rev=41052&view=rev Log: Add methods to erase basic block entry. Modified: llvm/trunk/include/llvm/Analysis/Dominators.h llvm/trunk/lib/VMCore/Dominators.cpp Modified: llvm/trunk/include/llvm/Analysis/Dominators.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/Dominators.h?rev=41052&r1=41051&r2=41052&view=diff ============================================================================== --- llvm/trunk/include/llvm/Analysis/Dominators.h (original) +++ llvm/trunk/include/llvm/Analysis/Dominators.h Mon Aug 13 17:10:29 2007 @@ -253,6 +253,11 @@ changeImmediateDominator(getNode(BB), getNode(NewBB)); } + /// eraseNode - Removes a node from the domiantor tree. Block must not + /// domiante any other blocks. Removes node from its immediate dominator's + /// children list. Deletes dominator node associated with basic block BB. + void eraseNode(BasicBlock *BB); + /// removeNode - Removes a node from the dominator tree. Block must not /// dominate any other blocks. Invalidates any node pointing to removed /// block. @@ -370,6 +375,13 @@ Frontiers.insert(std::make_pair(BB, frontier)); } + /// removeBlock - Remove basic block BB's frontier. + void removeBlock(BasicBlock *BB) { + assert(find(BB) != end() && "Block is not in DominanceFrontier!"); + iterator BBDF = Frontiers.find(BB); + Frontiers.erase(BBDF); + } + void addToFrontier(iterator I, BasicBlock *Node) { assert(I != end() && "BB is not in DominanceFrontier!"); I->second.insert(Node); Modified: llvm/trunk/lib/VMCore/Dominators.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Dominators.cpp?rev=41052&r1=41051&r2=41052&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Dominators.cpp (original) +++ llvm/trunk/lib/VMCore/Dominators.cpp Mon Aug 13 17:10:29 2007 @@ -559,6 +559,30 @@ PrintDomTree(*I, o, Lev+1); } +/// eraseNode - Removes a node from the domiantor tree. Block must not +/// domiante any other blocks. Removes node from its immediate dominator's +/// children list. Deletes dominator node associated with basic block BB. +void DominatorTreeBase::eraseNode(BasicBlock *BB) { + DomTreeNode *Node = getNode(BB); + assert (Node && "Removing node that isn't in dominator tree."); + + // Remove node from immediate dominator's children list. + DomTreeNode *IDom = Node->getIDom(); + if (IDom) { + std::vector::iterator I = + std::find(IDom->Children.begin(), IDom->Children.end(), Node); + assert(I != IDom->Children.end() && + "Not in immediate dominator children set!"); + // I am no longer your child... + IDom->Children.erase(I); + } + + assert (Node->getChildren().empty() && "Children list is not empty"); + + DomTreeNodes.erase(BB); + delete Node; +} + void DominatorTreeBase::print(std::ostream &o, const Module* ) const { o << "=============================--------------------------------\n"; o << "Inorder Dominator Tree: "; From dpatel at apple.com Mon Aug 13 17:13:24 2007 From: dpatel at apple.com (Devang Patel) Date: Mon, 13 Aug 2007 22:13:24 -0000 Subject: [llvm-commits] [llvm] r41053 - /llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp Message-ID: <200708132213.l7DMDO5h006126@zion.cs.uiuc.edu> Author: dpatel Date: Mon Aug 13 17:13:24 2007 New Revision: 41053 URL: http://llvm.org/viewvc/llvm-project?rev=41053&view=rev Log: Preserve dominator info. Modified: llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp Modified: llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp?rev=41053&r1=41052&r2=41053&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp Mon Aug 13 17:13:24 2007 @@ -121,6 +121,7 @@ LoopInfo *LI; ScalarEvolution *SE; DominatorTree *DT; + DominanceFrontier *DF; SmallVector SplitData; // Induction variable whose range is being split by this transformation. @@ -154,6 +155,7 @@ SE = &getAnalysis(); DT = &getAnalysis(); LI = &getAnalysis(); + DF = getAnalysisToUpdate(); initialize(); @@ -463,7 +465,7 @@ // Only CFG change done is to remove Latch to Header edge. This // does not change dominator tree because Latch did not dominate // Header. - if (DominanceFrontier *DF = getAnalysisToUpdate()) { + if (DF) { DominanceFrontier::iterator HeaderDF = DF->find(Header); if (HeaderDF != DF->end()) DF->removeFromFrontier(HeaderDF, Header); @@ -589,39 +591,49 @@ /// removeBlocks - Remove basic block BB and all blocks dominated by BB. void LoopIndexSplit::removeBlocks(BasicBlock *InBB) { - SmallVector WorkList; - WorkList.push_back(InBB); + SmallVector, 8> WorkList; + WorkList.push_back(std::make_pair(InBB, succ_begin(InBB))); while (!WorkList.empty()) { - BasicBlock *BB = WorkList.back(); WorkList.pop_back(); - - // First process all successor - for (succ_iterator SI = succ_begin(BB), E = succ_end(BB); SI != E; ++SI) { - BasicBlock *SuccBB = *SI; - if (DT->dominates(BB, SuccBB)) { - WorkList.push_back(SuccBB); - continue; + BasicBlock *BB = WorkList.back(). first; + succ_iterator SIter =WorkList.back().second; + + // If all successor's are processed then remove this block. + if (SIter == succ_end(BB)) { + WorkList.pop_back(); + for(BasicBlock::iterator BBI = BB->begin(), BBE = BB->end(); + BBI != BBE; ++BBI) { + Instruction *I = BBI; + I->replaceAllUsesWith(UndefValue::get(I->getType())); + I->eraseFromParent(); } + DT->eraseNode(BB); + DF->removeBlock(BB); + LI->removeBlock(BB); + BB->eraseFromParent(); + } else { + BasicBlock *SuccBB = *SIter; + ++WorkList.back().second; - // If SuccBB is not dominated by BB then it is not removed, however remove - // any PHI incoming edge from BB. - for(BasicBlock::iterator SBI = SuccBB->begin(), SBE = SuccBB->end(); - SBI != SBE; ++SBI) { - if (PHINode *PN = dyn_cast(SBI)) - PN->removeIncomingValue(BB); - else - break; + if (DT->dominates(BB, SuccBB)) { + WorkList.push_back(std::make_pair(SuccBB, succ_begin(SuccBB))); + continue; + } else { + // If SuccBB is not dominated by BB then it is not removed, however remove + // any PHI incoming edge from BB. + for(BasicBlock::iterator SBI = SuccBB->begin(), SBE = SuccBB->end(); + SBI != SBE; ++SBI) { + if (PHINode *PN = dyn_cast(SBI)) + PN->removeIncomingValue(BB); + else + break; + } + + // If BB is not dominating SuccBB then SuccBB is in BB's dominance + // frontiner. + DominanceFrontier::iterator BBDF = DF->find(BB); + DF->removeFromFrontier(BBDF, SuccBB); } } - - // Now delete BB; - for(BasicBlock::iterator BBI = BB->begin(), BBE = BB->end(); - BBI != BBE; ++BBI) { - Instruction *I = BBI; - I->replaceAllUsesWith(UndefValue::get(I->getType())); - I->eraseFromParent(); - } - LI->removeBlock(BB); - BB->eraseFromParent(); } } @@ -692,13 +704,17 @@ } else ExitInsn->setSuccessor(1, FalseHeader); + if (DT) { + DT->changeImmediateDominator(FalseHeader, ExitBlock); + DT->changeImmediateDominator(ExitDest, cast(ValueMap[ExitBlock])); + } + assert (!L->contains(ExitDest) && " Unable to find exit edge destination"); //[*] Split Exit Edge. SplitEdge(ExitBlock, FalseHeader, this); //[*] Eliminate split condition's false branch from True loop. - // Update true loop dom info (FIXME). BasicBlock *SplitBlock = SD.SplitCondition->getParent(); BranchInst *BR = cast(SplitBlock->getTerminator()); BasicBlock *FBB = BR->getSuccessor(1); @@ -709,14 +725,12 @@ ExitCondition->setOperand(ExitValueNum, TLExitValue); //[*] Eliminate split condition's true branch in False loop CFG. - // Update false loop dom info (FXME). BasicBlock *FSplitBlock = cast(ValueMap[SplitBlock]); BranchInst *FBR = cast(FSplitBlock->getTerminator()); BasicBlock *TBB = FBR->getSuccessor(0); FBR->setUnconditionalDest(FBR->getSuccessor(1)); removeBlocks(TBB); - //[*] Update dom info in general (FIXME). return true; } From dpatel at apple.com Mon Aug 13 17:22:13 2007 From: dpatel at apple.com (Devang Patel) Date: Mon, 13 Aug 2007 22:22:13 -0000 Subject: [llvm-commits] [llvm] r41054 - /llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp Message-ID: <200708132222.l7DMMDR4006491@zion.cs.uiuc.edu> Author: dpatel Date: Mon Aug 13 17:22:13 2007 New Revision: 41054 URL: http://llvm.org/viewvc/llvm-project?rev=41054&view=rev Log: Preserve simple analysis. Modified: llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp Modified: llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp?rev=41054&r1=41053&r2=41054&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp Mon Aug 13 17:22:13 2007 @@ -98,7 +98,7 @@ bool safeExitBlock(SplitInfo &SD, BasicBlock *BB); /// removeBlocks - Remove basic block BB and all blocks dominated by BB. - void removeBlocks(BasicBlock *InBB); + void removeBlocks(BasicBlock *InBB, Loop *LP); /// Find cost of spliting loop L. unsigned findSplitCost(Loop *L, SplitInfo &SD); @@ -589,7 +589,7 @@ } /// removeBlocks - Remove basic block BB and all blocks dominated by BB. -void LoopIndexSplit::removeBlocks(BasicBlock *InBB) { +void LoopIndexSplit::removeBlocks(BasicBlock *InBB, Loop *LP) { SmallVector, 8> WorkList; WorkList.push_back(std::make_pair(InBB, succ_begin(InBB))); @@ -606,6 +606,7 @@ I->replaceAllUsesWith(UndefValue::get(I->getType())); I->eraseFromParent(); } + LPM->deleteSimpleAnalysisValue(BB, LP); DT->eraseNode(BB); DF->removeBlock(BB); LI->removeBlock(BB); @@ -719,7 +720,7 @@ BranchInst *BR = cast(SplitBlock->getTerminator()); BasicBlock *FBB = BR->getSuccessor(1); BR->setUnconditionalDest(BR->getSuccessor(0)); - removeBlocks(FBB); + removeBlocks(FBB, L); //[*] Update True loop's exit value using new exit value. ExitCondition->setOperand(ExitValueNum, TLExitValue); @@ -729,7 +730,7 @@ BranchInst *FBR = cast(FSplitBlock->getTerminator()); BasicBlock *TBB = FBR->getSuccessor(0); FBR->setUnconditionalDest(FBR->getSuccessor(1)); - removeBlocks(TBB); + removeBlocks(TBB, FalseLoop); return true; } From lauro.venancio at gmail.com Mon Aug 13 17:56:05 2007 From: lauro.venancio at gmail.com (Lauro Ramos Venancio) Date: Mon, 13 Aug 2007 22:56:05 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r41056 - in /llvm-gcc-4.2/trunk/gcc: llvm-convert.cpp llvm-types.cpp Message-ID: <200708132256.l7DMu5qF007829@zion.cs.uiuc.edu> Author: laurov Date: Mon Aug 13 17:56:05 2007 New Revision: 41056 URL: http://llvm.org/viewvc/llvm-project?rev=41056&view=rev Log: - Handle the load/store alignment of bitfields. - Fix a bug in TypeConverter::ConvertRECORD. It fixes the consumer-typeset test on ARM. Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp llvm-gcc-4.2/trunk/gcc/llvm-types.cpp Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=41056&r1=41055&r2=41056&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Mon Aug 13 17:56:05 2007 @@ -2518,9 +2518,9 @@ LValue LV = EmitLV(exp); bool isVolatile = TREE_THIS_VOLATILE(exp); const Type *Ty = ConvertType(TREE_TYPE(exp)); + unsigned Alignment = expr_align(exp) / 8; if (!LV.isBitfield()) { - unsigned Alignment = expr_align(exp) / 8; if (!DestLoc) { // Scalar value: emit a load. Value *Ptr = CastToType(Instruction::BitCast, LV.Ptr, @@ -2535,7 +2535,10 @@ } } else { // This is a bitfield reference. - Value *Val = Builder.CreateLoad(LV.Ptr, isVolatile, "tmp"); + LoadInst *LI = Builder.CreateLoad(LV.Ptr, isVolatile, "tmp"); + LI->setAlignment(Alignment); + + Value *Val = LI; unsigned ValSizeInBits = Val->getType()->getPrimitiveSizeInBits(); assert(Val->getType()->isInteger() && "Invalid bitfield lvalue!"); @@ -3003,7 +3006,9 @@ // Last case, this is a store to a bitfield, so we have to emit a // read/modify/write sequence. - Value *OldVal = Builder.CreateLoad(LV.Ptr, isVolatile, "tmp"); + LoadInst *LI = Builder.CreateLoad(LV.Ptr, isVolatile, "tmp"); + LI->setAlignment(Alignment); + Value *OldVal = LI; // If the target is big-endian, invert the bit in the word. unsigned ValSizeInBits = TD.getTypeSize(OldVal->getType())*8; @@ -3032,7 +3037,8 @@ // Finally, merge the two together and store it. Value *Val = Builder.CreateOr(OldVal, RHS, "tmp"); - Builder.CreateStore(Val, LV.Ptr, isVolatile); + StoreInst *SI = Builder.CreateStore(Val, LV.Ptr, isVolatile); + SI->setAlignment(Alignment); return RetVal; } Modified: llvm-gcc-4.2/trunk/gcc/llvm-types.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-types.cpp?rev=41056&r1=41055&r2=41056&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-types.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-types.cpp Mon Aug 13 17:56:05 2007 @@ -1721,6 +1721,10 @@ unsigned DeclBitAlignment = Info->getTypeAlignment(DeclFieldTy)*8; FieldOffsetInBits &= ~(DeclBitAlignment-1ULL); + // When we fix the field alignment, we must restart the FieldNo search + // because the FieldOffsetInBits can be lower than it was in the + // previous iteration. + CurFieldNo = 0; } // Figure out if this field is zero bits wide, e.g. {} or [0 x int]. Do From lauro.venancio at gmail.com Mon Aug 13 18:14:29 2007 From: lauro.venancio at gmail.com (Lauro Ramos Venancio) Date: Mon, 13 Aug 2007 23:14:29 -0000 Subject: [llvm-commits] [llvm-gcc-4.0] r41057 - in /llvm-gcc-4.0/trunk/gcc: llvm-convert.cpp llvm-types.cpp Message-ID: <200708132314.l7DNETwC008751@zion.cs.uiuc.edu> Author: laurov Date: Mon Aug 13 18:14:28 2007 New Revision: 41057 URL: http://llvm.org/viewvc/llvm-project?rev=41057&view=rev Log: - Handle the load/store alignment of bitfields. - Fix a bug in TypeConverter::ConvertRECORD. It fixes the consumer-typeset test on ARM. Modified: llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp llvm-gcc-4.0/trunk/gcc/llvm-types.cpp Modified: llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp?rev=41057&r1=41056&r2=41057&view=diff ============================================================================== --- llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp (original) +++ llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp Mon Aug 13 18:14:28 2007 @@ -2478,9 +2478,9 @@ LValue LV = EmitLV(exp); bool isVolatile = TREE_THIS_VOLATILE(exp); const Type *Ty = ConvertType(TREE_TYPE(exp)); + unsigned Alignment = expr_align(exp) / 8; if (!LV.isBitfield()) { - unsigned Alignment = expr_align(exp) / 8; if (!DestLoc) { // Scalar value: emit a load. Value *Ptr = CastToType(Instruction::BitCast, LV.Ptr, @@ -2495,7 +2495,10 @@ } } else { // This is a bitfield reference. - Value *Val = Builder.CreateLoad(LV.Ptr, isVolatile, "tmp"); + LoadInst *LI = Builder.CreateLoad(LV.Ptr, isVolatile, "tmp"); + LI->setAlignment(Alignment); + + Value *Val = LI; unsigned ValSizeInBits = Val->getType()->getPrimitiveSizeInBits(); assert(Val->getType()->isInteger() && "Invalid bitfield lvalue!"); @@ -2968,7 +2971,9 @@ // Last case, this is a store to a bitfield, so we have to emit a // read/modify/write sequence. - Value *OldVal = Builder.CreateLoad(LV.Ptr, isVolatile, "tmp"); + LoadInst *LI = Builder.CreateLoad(LV.Ptr, isVolatile, "tmp"); + LI->setAlignment(Alignment); + Value *OldVal = LI; // If the target is big-endian, invert the bit in the word. unsigned ValSizeInBits = TD.getTypeSize(OldVal->getType())*8; @@ -2997,7 +3002,8 @@ // Finally, merge the two together and store it. Value *Val = Builder.CreateOr(OldVal, RHS, "tmp"); - Builder.CreateStore(Val, LV.Ptr, isVolatile); + StoreInst *SI = Builder.CreateStore(Val, LV.Ptr, isVolatile); + SI->setAlignment(Alignment); return RetVal; } Modified: llvm-gcc-4.0/trunk/gcc/llvm-types.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.0/trunk/gcc/llvm-types.cpp?rev=41057&r1=41056&r2=41057&view=diff ============================================================================== --- llvm-gcc-4.0/trunk/gcc/llvm-types.cpp (original) +++ llvm-gcc-4.0/trunk/gcc/llvm-types.cpp Mon Aug 13 18:14:28 2007 @@ -1700,6 +1700,10 @@ unsigned DeclBitAlignment = Info->getTypeAlignment(DeclFieldTy)*8; FieldOffsetInBits &= ~(DeclBitAlignment-1ULL); + // When we fix the field alignment, we must restart the FieldNo search + // because the FieldOffsetInBits can be lower than it was in the + // previous iteration. + CurFieldNo = 0; } // Figure out if this field is zero bits wide, e.g. {} or [0 x int]. Do From lauro.venancio at gmail.com Mon Aug 13 18:25:13 2007 From: lauro.venancio at gmail.com (Lauro Ramos Venancio) Date: Mon, 13 Aug 2007 23:25:13 -0000 Subject: [llvm-commits] [test-suite] r41058 - /test-suite/trunk/MultiSource/Applications/spiff/spiff.c Message-ID: <200708132325.l7DNPD3x009109@zion.cs.uiuc.edu> Author: laurov Date: Mon Aug 13 18:25:13 2007 New Revision: 41058 URL: http://llvm.org/viewvc/llvm-project?rev=41058&view=rev Log: This test has a lot of mallocs and no free. Reduce the number of iteration to reduce the memory usage. Modified: test-suite/trunk/MultiSource/Applications/spiff/spiff.c Modified: test-suite/trunk/MultiSource/Applications/spiff/spiff.c URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/MultiSource/Applications/spiff/spiff.c?rev=41058&r1=41057&r2=41058&view=diff ============================================================================== --- test-suite/trunk/MultiSource/Applications/spiff/spiff.c (original) +++ test-suite/trunk/MultiSource/Applications/spiff/spiff.c Mon Aug 13 18:25:13 2007 @@ -39,7 +39,7 @@ static int _Y_flags; #ifdef SMALL_PROBLEM_SIZE -#define SPIFF_ITER 1000 +#define SPIFF_ITER 700 #else #define SPIFF_ITER 30000 #endif @@ -49,7 +49,7 @@ int argc; char *argv[]; { - E_edit edit_end = E_NULL; + E_edit edit_end; char *filename[2]; int max_d; /* max number of differences allowed */ @@ -115,9 +115,6 @@ for(i=0;i<=SPIFF_ITER;i++) { - if (edit_end != E_NULL) - free(edit_end); - if (_Y_eflag) { edit_end = Q_do_exact(K_gettmax(0),K_gettmax(1), From evan.cheng at apple.com Mon Aug 13 18:27:11 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 13 Aug 2007 23:27:11 -0000 Subject: [llvm-commits] [llvm] r41059 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Message-ID: <200708132327.l7DNRBq6009256@zion.cs.uiuc.edu> Author: evancheng Date: Mon Aug 13 18:27:11 2007 New Revision: 41059 URL: http://llvm.org/viewvc/llvm-project?rev=41059&view=rev Log: Fix a typo pointd out by Maarten ter Huurne. Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=41059&r1=41058&r2=41059&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Mon Aug 13 18:27:11 2007 @@ -5061,7 +5061,7 @@ else if (VT == MVT::i16) return make_vector(X86::AX, X86::DX, X86::CX, X86::BX, 0); else if (VT == MVT::i8) - return make_vector(X86::AL, X86::DL, X86::CL, X86::DL, 0); + return make_vector(X86::AL, X86::DL, X86::CL, X86::BL, 0); break; } } From evan.cheng at apple.com Mon Aug 13 18:45:18 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 13 Aug 2007 23:45:18 -0000 Subject: [llvm-commits] [llvm] r41060 - in /llvm/trunk: include/llvm/CodeGen/LiveInterval.h include/llvm/CodeGen/LiveIntervalAnalysis.h lib/CodeGen/LiveIntervalAnalysis.cpp lib/CodeGen/RegAllocLinearScan.cpp lib/CodeGen/SimpleRegisterCoalescing.cpp lib/CodeGen/VirtRegMap.cpp lib/CodeGen/VirtRegMap.h Message-ID: <200708132345.l7DNjI1u010085@zion.cs.uiuc.edu> Author: evancheng Date: Mon Aug 13 18:45:17 2007 New Revision: 41060 URL: http://llvm.org/viewvc/llvm-project?rev=41060&view=rev Log: Re-implement trivial rematerialization. This allows def MIs whose live intervals that are coalesced to be rematerialized. Modified: llvm/trunk/include/llvm/CodeGen/LiveInterval.h llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp llvm/trunk/lib/CodeGen/VirtRegMap.cpp llvm/trunk/lib/CodeGen/VirtRegMap.h Modified: llvm/trunk/include/llvm/CodeGen/LiveInterval.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/LiveInterval.h?rev=41060&r1=41059&r2=41060&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/LiveInterval.h (original) +++ llvm/trunk/include/llvm/CodeGen/LiveInterval.h Mon Aug 13 18:45:17 2007 @@ -83,7 +83,6 @@ unsigned reg; // the register of this interval unsigned preference; // preferred register to allocate for this interval float weight; // weight of this interval - MachineInstr* remat; // definition if the definition rematerializable Ranges ranges; // the ranges in which this register is live /// ValueNumberInfo - If the value number definition is undefined (e.g. phi @@ -101,7 +100,7 @@ public: LiveInterval(unsigned Reg, float Weight) - : reg(Reg), preference(0), weight(Weight), remat(NULL) { + : reg(Reg), preference(0), weight(Weight) { } typedef Ranges::iterator iterator; @@ -128,7 +127,6 @@ void swap(LiveInterval& other) { std::swap(reg, other.reg); std::swap(weight, other.weight); - std::swap(remat, other.remat); std::swap(ranges, other.ranges); std::swap(ValueNumberInfo, other.ValueNumberInfo); } Modified: llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h?rev=41060&r1=41059&r2=41060&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h (original) +++ llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h Mon Aug 13 18:45:17 2007 @@ -25,6 +25,8 @@ #include "llvm/ADT/BitVector.h" #include "llvm/ADT/DenseMap.h" #include "llvm/ADT/IndexedMap.h" +#include "llvm/ADT/SmallPtrSet.h" +#include "llvm/ADT/SmallVector.h" namespace llvm { @@ -41,9 +43,9 @@ const TargetInstrInfo* tii_; LiveVariables* lv_; - /// MBB2IdxMap - The index of the first instruction in the specified basic - /// block. - std::vector MBB2IdxMap; + /// MBB2IdxMap - The indexes of the first and last instructions in the + /// specified basic block. + std::vector > MBB2IdxMap; typedef std::map Mi2IndexMap; Mi2IndexMap mi2iMap_; @@ -56,6 +58,8 @@ BitVector allocatableRegs_; + std::vector ClonedMIs; + public: static char ID; // Pass identification, replacement for typeid LiveIntervals() : MachineFunctionPass((intptr_t)&ID) {} @@ -118,10 +122,19 @@ unsigned getMBBStartIdx(MachineBasicBlock *MBB) const { return getMBBStartIdx(MBB->getNumber()); } - unsigned getMBBStartIdx(unsigned MBBNo) const { assert(MBBNo < MBB2IdxMap.size() && "Invalid MBB number!"); - return MBB2IdxMap[MBBNo]; + return MBB2IdxMap[MBBNo].first; + } + + /// getMBBEndIdx - Return the store index of the last instruction in the + /// specified MachineBasicBlock. + unsigned getMBBEndIdx(MachineBasicBlock *MBB) const { + return getMBBEndIdx(MBB->getNumber()); + } + unsigned getMBBEndIdx(unsigned MBBNo) const { + assert(MBBNo < MBB2IdxMap.size() && "Invalid MBB number!"); + return MBB2IdxMap[MBBNo].second; } /// getInstructionIndex - returns the base index of instr @@ -155,8 +168,7 @@ const std::vector &LRs); std::vector addIntervalsForSpills(const LiveInterval& i, - VirtRegMap& vrm, - int slot); + VirtRegMap& vrm, unsigned reg); // Interval removal @@ -225,6 +237,17 @@ unsigned MIIdx, LiveInterval &interval, bool isAlias = false); + /// isReMaterializable - Returns true if the definition MI of the specified + /// val# of the specified interval is re-materializable. + bool isReMaterializable(const LiveInterval &li, unsigned ValNum, + MachineInstr *MI); + + /// tryFoldMemoryOperand - Attempts to fold a spill / restore from slot + /// to reg into ith operand of specified MI. If it is successul, MI is + /// updated with the newly created MI and returns true. + bool tryFoldMemoryOperand(MachineInstr* &MI, VirtRegMap &vrm, unsigned index, + unsigned i, int slot, unsigned reg); + static LiveInterval createInterval(unsigned Reg); void printRegName(unsigned reg) const; Modified: llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp?rev=41060&r1=41059&r2=41060&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp (original) +++ llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp Mon Aug 13 18:45:17 2007 @@ -30,7 +30,6 @@ #include "llvm/Target/TargetMachine.h" #include "llvm/Support/CommandLine.h" #include "llvm/Support/Debug.h" -#include "llvm/ADT/SmallSet.h" #include "llvm/ADT/Statistic.h" #include "llvm/ADT/STLExtras.h" #include @@ -60,6 +59,8 @@ mi2iMap_.clear(); i2miMap_.clear(); r2iMap_.clear(); + for (unsigned i = 0, e = ClonedMIs.size(); i != e; ++i) + delete ClonedMIs[i]; } /// runOnMachineFunction - Register allocate the whole function @@ -74,13 +75,12 @@ // Number MachineInstrs and MachineBasicBlocks. // Initialize MBB indexes to a sentinal. - MBB2IdxMap.resize(mf_->getNumBlockIDs(), ~0U); + MBB2IdxMap.resize(mf_->getNumBlockIDs(), std::make_pair(~0U,~0U)); unsigned MIIndex = 0; for (MachineFunction::iterator MBB = mf_->begin(), E = mf_->end(); MBB != E; ++MBB) { - // Set the MBB2IdxMap entry for this MBB. - MBB2IdxMap[MBB->getNumber()] = MIIndex; + unsigned StartIdx = MIIndex; for (MachineBasicBlock::iterator I = MBB->begin(), E = MBB->end(); I != E; ++I) { @@ -89,6 +89,9 @@ i2miMap_.push_back(I); MIIndex += InstrSlots::NUM; } + + // Set the MBB2IdxMap entry for this MBB. + MBB2IdxMap[MBB->getNumber()] = std::make_pair(StartIdx, MIIndex - 1); } computeIntervals(); @@ -175,8 +178,76 @@ return NewLI; } +/// isReDefinedByTwoAddr - Returns true if the Reg re-definition is due to +/// two addr elimination. +static bool isReDefinedByTwoAddr(MachineInstr *MI, unsigned Reg, + const TargetInstrInfo *TII) { + for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { + MachineOperand &MO1 = MI->getOperand(i); + if (MO1.isRegister() && MO1.isDef() && MO1.getReg() == Reg) { + for (unsigned j = i+1; j < e; ++j) { + MachineOperand &MO2 = MI->getOperand(j); + if (MO2.isRegister() && MO2.isUse() && MO2.getReg() == Reg && + MI->getInstrDescriptor()-> + getOperandConstraint(j, TOI::TIED_TO) == (int)i) + return true; + } + } + } + return false; +} + +/// isReMaterializable - Returns true if the definition MI of the specified +/// val# of the specified interval is re-materializable. +bool LiveIntervals::isReMaterializable(const LiveInterval &li, unsigned ValNum, + MachineInstr *MI) { + if (tii_->isTriviallyReMaterializable(MI)) + return true; + + int FrameIdx = 0; + if (!tii_->isLoadFromStackSlot(MI, FrameIdx) || + !mf_->getFrameInfo()->isFixedObjectIndex(FrameIdx)) + return false; + + // This is a load from fixed stack slot. It can be rematerialized unless it's + // re-defined by a two-address instruction. + for (unsigned i = 0, e = li.getNumValNums(); i != e; ++i) { + if (i == ValNum) + continue; + unsigned DefIdx = li.getDefForValNum(i); + if (DefIdx == ~1U) + continue; // Dead val#. + MachineInstr *DefMI = (DefIdx == ~0u) + ? NULL : getInstructionFromIndex(DefIdx); + if (DefMI && isReDefinedByTwoAddr(DefMI, li.reg, tii_)) + return false; + } + return true; +} + +bool LiveIntervals::tryFoldMemoryOperand(MachineInstr* &MI, VirtRegMap &vrm, + unsigned index, unsigned i, + int slot, unsigned reg) { + MachineInstr *fmi = mri_->foldMemoryOperand(MI, i, slot); + if (fmi) { + // Attempt to fold the memory reference into the instruction. If + // we can do this, we don't need to insert spill code. + if (lv_) + lv_->instructionChanged(MI, fmi); + MachineBasicBlock &MBB = *MI->getParent(); + vrm.virtFolded(reg, MI, i, fmi); + mi2iMap_.erase(MI); + i2miMap_[index/InstrSlots::NUM] = fmi; + mi2iMap_[fmi] = index; + MI = MBB.insert(MBB.erase(MI), fmi); + ++numFolded; + return true; + } + return false; +} + std::vector LiveIntervals:: -addIntervalsForSpills(const LiveInterval &li, VirtRegMap &vrm, int slot) { +addIntervalsForSpills(const LiveInterval &li, VirtRegMap &vrm, unsigned reg) { // since this is called after the analysis is done we don't know if // LiveVariables is available lv_ = getAnalysisToUpdate(); @@ -192,10 +263,72 @@ const TargetRegisterClass* rc = mf_->getSSARegMap()->getRegClass(li.reg); + unsigned NumValNums = li.getNumValNums(); + SmallVector ReMatDefs; + ReMatDefs.resize(NumValNums, NULL); + SmallVector ReMatOrigDefs; + ReMatOrigDefs.resize(NumValNums, NULL); + SmallVector ReMatIds; + ReMatIds.resize(NumValNums, VirtRegMap::MAX_STACK_SLOT); + BitVector ReMatDelete(NumValNums); + unsigned slot = VirtRegMap::MAX_STACK_SLOT; + + bool NeedStackSlot = false; + for (unsigned i = 0; i != NumValNums; ++i) { + unsigned DefIdx = li.getDefForValNum(i); + if (DefIdx == ~1U) + continue; // Dead val#. + // Is the def for the val# rematerializable? + MachineInstr *DefMI = (DefIdx == ~0u) + ? NULL : getInstructionFromIndex(DefIdx); + if (DefMI && isReMaterializable(li, i, DefMI)) { + // Remember how to remat the def of this val#. + ReMatOrigDefs[i] = DefMI; + // Original def may be modified so we have to make a copy here. vrm must + // delete these! + ReMatDefs[i] = DefMI = DefMI->clone(); + vrm.setVirtIsReMaterialized(reg, DefMI); + + bool CanDelete = true; + const SmallVector &kills = li.getKillsForValNum(i); + for (unsigned j = 0, ee = kills.size(); j != ee; ++j) { + unsigned KillIdx = kills[j]; + MachineInstr *KillMI = (KillIdx & 1) + ? NULL : getInstructionFromIndex(KillIdx); + // Kill is a phi node, not all of its uses can be rematerialized. + // It must not be deleted. + if (!KillMI) { + CanDelete = false; + // Need a stack slot if there is any live range where uses cannot be + // rematerialized. + NeedStackSlot = true; + break; + } + } + + if (CanDelete) + ReMatDelete.set(i); + } else { + // Need a stack slot if there is any live range where uses cannot be + // rematerialized. + NeedStackSlot = true; + } + } + + // One stack slot per live interval. + if (NeedStackSlot) + slot = vrm.assignVirt2StackSlot(reg); + for (LiveInterval::Ranges::const_iterator - i = li.ranges.begin(), e = li.ranges.end(); i != e; ++i) { - unsigned index = getBaseIndex(i->start); - unsigned end = getBaseIndex(i->end-1) + InstrSlots::NUM; + I = li.ranges.begin(), E = li.ranges.end(); I != E; ++I) { + MachineInstr *DefMI = ReMatDefs[I->ValId]; + MachineInstr *OrigDefMI = ReMatOrigDefs[I->ValId]; + bool DefIsReMat = DefMI != NULL; + bool CanDelete = ReMatDelete[I->ValId]; + int LdSlot = 0; + bool isLoadSS = DefIsReMat && tii_->isLoadFromStackSlot(DefMI, LdSlot); + unsigned index = getBaseIndex(I->start); + unsigned end = getBaseIndex(I->end-1) + InstrSlots::NUM; for (; index != end; index += InstrSlots::NUM) { // skip deleted instructions while (index != end && !getInstructionFromIndex(index)) @@ -208,87 +341,109 @@ for (unsigned i = 0; i != MI->getNumOperands(); ++i) { MachineOperand& mop = MI->getOperand(i); if (mop.isRegister() && mop.getReg() == li.reg) { - MachineInstr *fmi = li.remat ? NULL - : mri_->foldMemoryOperand(MI, i, slot); - if (fmi) { - // Attempt to fold the memory reference into the instruction. If we - // can do this, we don't need to insert spill code. - if (lv_) - lv_->instructionChanged(MI, fmi); - MachineBasicBlock &MBB = *MI->getParent(); - vrm.virtFolded(li.reg, MI, i, fmi); - mi2iMap_.erase(MI); - i2miMap_[index/InstrSlots::NUM] = fmi; - mi2iMap_[fmi] = index; - MI = MBB.insert(MBB.erase(MI), fmi); - ++numFolded; - // Folding the load/store can completely change the instruction in - // unpredictable ways, rescan it from the beginning. - goto RestartInstruction; + if (DefIsReMat) { + // If this is the rematerializable definition MI itself and + // all of its uses are rematerialized, simply delete it. + if (MI == OrigDefMI) { + if (CanDelete) { + RemoveMachineInstrFromMaps(MI); + MI->eraseFromParent(); + break; + } else if (tryFoldMemoryOperand(MI, vrm, index, i, slot, li.reg)) + // Folding the load/store can completely change the instruction + // in unpredictable ways, rescan it from the beginning. + goto RestartInstruction; + } else if (isLoadSS && + tryFoldMemoryOperand(MI, vrm, index, i, LdSlot, li.reg)){ + // FIXME: Other rematerializable loads can be folded as well. + // Folding the load/store can completely change the + // instruction in unpredictable ways, rescan it from + // the beginning. + goto RestartInstruction; + } } else { - // Create a new virtual register for the spill interval. - unsigned NewVReg = mf_->getSSARegMap()->createVirtualRegister(rc); + if (tryFoldMemoryOperand(MI, vrm, index, i, slot, li.reg)) + // Folding the load/store can completely change the instruction in + // unpredictable ways, rescan it from the beginning. + goto RestartInstruction; + } + + // Create a new virtual register for the spill interval. + unsigned NewVReg = mf_->getSSARegMap()->createVirtualRegister(rc); - // Scan all of the operands of this instruction rewriting operands - // to use NewVReg instead of li.reg as appropriate. We do this for - // two reasons: - // - // 1. If the instr reads the same spilled vreg multiple times, we - // want to reuse the NewVReg. - // 2. If the instr is a two-addr instruction, we are required to - // keep the src/dst regs pinned. - // - // Keep track of whether we replace a use and/or def so that we can - // create the spill interval with the appropriate range. - mop.setReg(NewVReg); + // Scan all of the operands of this instruction rewriting operands + // to use NewVReg instead of li.reg as appropriate. We do this for + // two reasons: + // + // 1. If the instr reads the same spilled vreg multiple times, we + // want to reuse the NewVReg. + // 2. If the instr is a two-addr instruction, we are required to + // keep the src/dst regs pinned. + // + // Keep track of whether we replace a use and/or def so that we can + // create the spill interval with the appropriate range. + mop.setReg(NewVReg); - bool HasUse = mop.isUse(); - bool HasDef = mop.isDef(); - for (unsigned j = i+1, e = MI->getNumOperands(); j != e; ++j) { - if (MI->getOperand(j).isReg() && - MI->getOperand(j).getReg() == li.reg) { - MI->getOperand(j).setReg(NewVReg); - HasUse |= MI->getOperand(j).isUse(); - HasDef |= MI->getOperand(j).isDef(); - } + bool HasUse = mop.isUse(); + bool HasDef = mop.isDef(); + for (unsigned j = i+1, e = MI->getNumOperands(); j != e; ++j) { + if (MI->getOperand(j).isReg() && + MI->getOperand(j).getReg() == li.reg) { + MI->getOperand(j).setReg(NewVReg); + HasUse |= MI->getOperand(j).isUse(); + HasDef |= MI->getOperand(j).isDef(); } + } - // create a new register for this spill - vrm.grow(); - if (li.remat) - vrm.setVirtIsReMaterialized(NewVReg, li.remat); - vrm.assignVirt2StackSlot(NewVReg, slot); - LiveInterval &nI = getOrCreateInterval(NewVReg); - nI.remat = li.remat; - assert(nI.empty()); - - // the spill weight is now infinity as it - // cannot be spilled again - nI.weight = HUGE_VALF; - - if (HasUse) { - LiveRange LR(getLoadIndex(index), getUseIndex(index), - nI.getNextValue(~0U, 0)); - DOUT << " +" << LR; - nI.addRange(LR); + vrm.grow(); + if (DefIsReMat) { + vrm.setVirtIsReMaterialized(NewVReg, DefMI/*, CanDelete*/); + if (ReMatIds[I->ValId] == VirtRegMap::MAX_STACK_SLOT) { + // Each valnum may have its own remat id. + ReMatIds[I->ValId] = vrm.assignVirtReMatId(NewVReg); + } else { + vrm.assignVirtReMatId(NewVReg, ReMatIds[I->ValId]); } - if (HasDef) { - LiveRange LR(getDefIndex(index), getStoreIndex(index), - nI.getNextValue(~0U, 0)); - DOUT << " +" << LR; - nI.addRange(LR); + if (!CanDelete || (HasUse && HasDef)) { + // If this is a two-addr instruction then its use operands are + // rematerializable but its def is not. It should be assigned a + // stack slot. + vrm.assignVirt2StackSlot(NewVReg, slot); } + } else { + vrm.assignVirt2StackSlot(NewVReg, slot); + } + + // create a new register interval for this spill / remat. + LiveInterval &nI = getOrCreateInterval(NewVReg); + assert(nI.empty()); + + // the spill weight is now infinity as it + // cannot be spilled again + nI.weight = HUGE_VALF; + + if (HasUse) { + LiveRange LR(getLoadIndex(index), getUseIndex(index), + nI.getNextValue(~0U, 0)); + DOUT << " +" << LR; + nI.addRange(LR); + } + if (HasDef) { + LiveRange LR(getDefIndex(index), getStoreIndex(index), + nI.getNextValue(~0U, 0)); + DOUT << " +" << LR; + nI.addRange(LR); + } - added.push_back(&nI); + added.push_back(&nI); - // update live variables if it is available - if (lv_) - lv_->addVirtualRegisterKilled(NewVReg, MI); + // update live variables if it is available + if (lv_) + lv_->addVirtualRegisterKilled(NewVReg, MI); - DOUT << "\t\t\t\tadded new interval: "; - nI.print(DOUT, mri_); - DOUT << '\n'; - } + DOUT << "\t\t\t\tadded new interval: "; + nI.print(DOUT, mri_); + DOUT << '\n'; } } } @@ -304,25 +459,6 @@ cerr << "%reg" << reg; } -/// isReDefinedByTwoAddr - Returns true if the Reg re-definition is due to -/// two addr elimination. -static bool isReDefinedByTwoAddr(MachineInstr *MI, unsigned Reg, - const TargetInstrInfo *TII) { - for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { - MachineOperand &MO1 = MI->getOperand(i); - if (MO1.isRegister() && MO1.isDef() && MO1.getReg() == Reg) { - for (unsigned j = i+1; j < e; ++j) { - MachineOperand &MO2 = MI->getOperand(j); - if (MO2.isRegister() && MO2.isUse() && MO2.getReg() == Reg && - MI->getInstrDescriptor()-> - getOperandConstraint(j, TOI::TIED_TO) == (int)i) - return true; - } - } - } - return false; -} - void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb, MachineBasicBlock::iterator mi, unsigned MIIdx, @@ -335,16 +471,6 @@ // done once for the vreg. We use an empty interval to detect the first // time we see a vreg. if (interval.empty()) { - // Remember if the definition can be rematerialized. All load's from fixed - // stack slots are re-materializable. The target may permit other - // instructions to be re-materialized as well. - int FrameIdx = 0; - if (vi.DefInst && - (tii_->isTriviallyReMaterializable(vi.DefInst) || - (tii_->isLoadFromStackSlot(vi.DefInst, FrameIdx) && - mf_->getFrameInfo()->isFixedObjectIndex(FrameIdx)))) - interval.remat = vi.DefInst; - // Get the Idx of the defining instructions. unsigned defIndex = getDefIndex(MIIdx); unsigned ValNum; @@ -421,9 +547,6 @@ } } else { - // Can no longer safely assume definition is rematerializable. - interval.remat = NULL; - // If this is the second time we see a virtual register definition, it // must be due to phi elimination or two addr elimination. If this is // the result of two address elimination, then the vreg is one of the @@ -487,7 +610,7 @@ DOUT << " Removing [" << Start << "," << End << "] from: "; interval.print(DOUT, mri_); DOUT << "\n"; interval.removeRange(Start, End); - interval.addKillForValNum(0, Start); + interval.addKillForValNum(0, Start-1); // odd # means phi node DOUT << " RESULT: "; interval.print(DOUT, mri_); // Replace the interval with one of a NEW value number. Note that this @@ -514,7 +637,7 @@ unsigned killIndex = getInstructionIndex(&mbb->back()) + InstrSlots::NUM; LiveRange LR(defIndex, killIndex, ValNum); interval.addRange(LR); - interval.addKillForValNum(ValNum, killIndex); + interval.addKillForValNum(ValNum, killIndex-1); // odd # means phi node DOUT << " +" << LR; } } Modified: llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp?rev=41060&r1=41059&r2=41060&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp (original) +++ llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp Mon Aug 13 18:45:17 2007 @@ -305,7 +305,7 @@ for (unsigned i = 0, e = handled_.size(); i != e; ++i) { LiveInterval *HI = handled_[i]; unsigned Reg = HI->reg; - if (!vrm_->hasStackSlot(Reg) && HI->liveAt(StartIdx)) { + if (vrm_->isAssignedReg(Reg) && HI->liveAt(StartIdx)) { assert(MRegisterInfo::isVirtualRegister(Reg)); Reg = vrm_->getPhys(Reg); MBB->addLiveIn(Reg); @@ -605,14 +605,8 @@ // linearscan. if (cur->weight != HUGE_VALF && cur->weight <= minWeight) { DOUT << "\t\t\tspilling(c): " << *cur << '\n'; - // if the current interval is re-materializable, remember so and don't - // assign it a spill slot. - if (cur->remat) - vrm_->setVirtIsReMaterialized(cur->reg, cur->remat); - int slot = cur->remat ? vrm_->assignVirtReMatId(cur->reg) - : vrm_->assignVirt2StackSlot(cur->reg); std::vector added = - li_->addIntervalsForSpills(*cur, *vrm_, slot); + li_->addIntervalsForSpills(*cur, *vrm_, cur->reg); if (added.empty()) return; // Early exit if all spills were folded. @@ -663,12 +657,8 @@ cur->overlapsFrom(*i->first, i->second)) { DOUT << "\t\t\tspilling(a): " << *i->first << '\n'; earliestStart = std::min(earliestStart, i->first->beginNumber()); - if (i->first->remat) - vrm_->setVirtIsReMaterialized(reg, i->first->remat); - int slot = i->first->remat ? vrm_->assignVirtReMatId(reg) - : vrm_->assignVirt2StackSlot(reg); std::vector newIs = - li_->addIntervalsForSpills(*i->first, *vrm_, slot); + li_->addIntervalsForSpills(*i->first, *vrm_, reg); std::copy(newIs.begin(), newIs.end(), std::back_inserter(added)); spilled.insert(reg); } @@ -680,12 +670,8 @@ cur->overlapsFrom(*i->first, i->second-1)) { DOUT << "\t\t\tspilling(i): " << *i->first << '\n'; earliestStart = std::min(earliestStart, i->first->beginNumber()); - if (i->first->remat) - vrm_->setVirtIsReMaterialized(reg, i->first->remat); - int slot = i->first->remat ? vrm_->assignVirtReMatId(reg) - : vrm_->assignVirt2StackSlot(reg); std::vector newIs = - li_->addIntervalsForSpills(*i->first, *vrm_, slot); + li_->addIntervalsForSpills(*i->first, *vrm_, reg); std::copy(newIs.begin(), newIs.end(), std::back_inserter(added)); spilled.insert(reg); } Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp?rev=41060&r1=41059&r2=41060&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp (original) +++ llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Mon Aug 13 18:45:17 2007 @@ -1123,12 +1123,6 @@ continue; LiveInterval &RegInt = li_->getInterval(reg); float w = (mop.isUse()+mop.isDef()) * powf(10.0F, (float)loopDepth); - // If the definition instruction is re-materializable, its spill - // weight is half of what it would have been normally unless it's - // a load from fixed stack slot. - int Dummy; - if (RegInt.remat && !tii_->isLoadFromStackSlot(RegInt.remat, Dummy)) - w /= 2; RegInt.weight += w; UniqueUses.insert(reg); } Modified: llvm/trunk/lib/CodeGen/VirtRegMap.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/VirtRegMap.cpp?rev=41060&r1=41059&r2=41060&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/VirtRegMap.cpp (original) +++ llvm/trunk/lib/CodeGen/VirtRegMap.cpp Mon Aug 13 18:45:17 2007 @@ -62,13 +62,17 @@ VirtRegMap::VirtRegMap(MachineFunction &mf) : TII(*mf.getTarget().getInstrInfo()), MF(mf), Virt2PhysMap(NO_PHYS_REG), Virt2StackSlotMap(NO_STACK_SLOT), + Virt2ReMatIdMap(NO_STACK_SLOT), ReMatMap(NULL), ReMatId(MAX_STACK_SLOT+1) { grow(); } void VirtRegMap::grow() { - Virt2PhysMap.grow(MF.getSSARegMap()->getLastVirtReg()); - Virt2StackSlotMap.grow(MF.getSSARegMap()->getLastVirtReg()); + unsigned LastVirtReg = MF.getSSARegMap()->getLastVirtReg(); + Virt2PhysMap.grow(LastVirtReg); + Virt2StackSlotMap.grow(LastVirtReg); + Virt2ReMatIdMap.grow(LastVirtReg); + ReMatMap.grow(LastVirtReg); } int VirtRegMap::assignVirt2StackSlot(unsigned virtReg) { @@ -95,19 +99,19 @@ int VirtRegMap::assignVirtReMatId(unsigned virtReg) { assert(MRegisterInfo::isVirtualRegister(virtReg)); - assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT && + assert(Virt2ReMatIdMap[virtReg] == NO_STACK_SLOT && "attempt to assign re-mat id to already spilled register"); - const MachineInstr *DefMI = getReMaterializedMI(virtReg); - int FrameIdx; - if (TII.isLoadFromStackSlot((MachineInstr*)DefMI, FrameIdx)) { - // Load from stack slot is re-materialize as reload from the stack slot! - Virt2StackSlotMap[virtReg] = FrameIdx; - return FrameIdx; - } - Virt2StackSlotMap[virtReg] = ReMatId; + Virt2ReMatIdMap[virtReg] = ReMatId; return ReMatId++; } +void VirtRegMap::assignVirtReMatId(unsigned virtReg, int id) { + assert(MRegisterInfo::isVirtualRegister(virtReg)); + assert(Virt2ReMatIdMap[virtReg] == NO_STACK_SLOT && + "attempt to assign re-mat id to already spilled register"); + Virt2ReMatIdMap[virtReg] = id; +} + void VirtRegMap::virtFolded(unsigned VirtReg, MachineInstr *OldMI, unsigned OpNo, MachineInstr *NewMI) { // Move previous memory references folded to new instruction. @@ -194,7 +198,7 @@ if (MRegisterInfo::isVirtualRegister(MO.getReg())) { unsigned VirtReg = MO.getReg(); unsigned PhysReg = VRM.getPhys(VirtReg); - if (VRM.hasStackSlot(VirtReg)) { + if (!VRM.isAssignedReg(VirtReg)) { int StackSlot = VRM.getStackSlot(VirtReg); const TargetRegisterClass* RC = MF.getSSARegMap()->getRegClass(VirtReg); @@ -246,43 +250,41 @@ DOUT << "\n**** Local spiller rewriting function '" << MF.getFunction()->getName() << "':\n"; - std::vector ReMatedMIs; for (MachineFunction::iterator MBB = MF.begin(), E = MF.end(); MBB != E; ++MBB) - RewriteMBB(*MBB, VRM, ReMatedMIs); - for (unsigned i = 0, e = ReMatedMIs.size(); i != e; ++i) - delete ReMatedMIs[i]; + RewriteMBB(*MBB, VRM); return true; } private: - void RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM, - std::vector &ReMatedMIs); + void RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM); }; } /// AvailableSpills - As the local spiller is scanning and rewriting an MBB from -/// top down, keep track of which spills slots are available in each register. +/// top down, keep track of which spills slots or remat are available in each +/// register. /// /// Note that not all physregs are created equal here. In particular, some /// physregs are reloads that we are allowed to clobber or ignore at any time. /// Other physregs are values that the register allocated program is using that /// we cannot CHANGE, but we can read if we like. We keep track of this on a -/// per-stack-slot basis as the low bit in the value of the SpillSlotsAvailable -/// entries. The predicate 'canClobberPhysReg()' checks this bit and -/// addAvailable sets it if. +/// per-stack-slot / remat id basis as the low bit in the value of the +/// SpillSlotsAvailable entries. The predicate 'canClobberPhysReg()' checks +/// this bit and addAvailable sets it if. namespace { class VISIBILITY_HIDDEN AvailableSpills { const MRegisterInfo *MRI; const TargetInstrInfo *TII; - // SpillSlotsAvailable - This map keeps track of all of the spilled virtual - // register values that are still available, due to being loaded or stored to, - // but not invalidated yet. - std::map SpillSlotsAvailable; + // SpillSlotsOrReMatsAvailable - This map keeps track of all of the spilled + // or remat'ed virtual register values that are still available, due to being + // loaded or stored to, but not invalidated yet. + std::map SpillSlotsOrReMatsAvailable; - // PhysRegsAvailable - This is the inverse of SpillSlotsAvailable, indicating - // which stack slot values are currently held by a physreg. This is used to - // invalidate entries in SpillSlotsAvailable when a physreg is modified. + // PhysRegsAvailable - This is the inverse of SpillSlotsOrReMatsAvailable, + // indicating which stack slot values are currently held by a physreg. This + // is used to invalidate entries in SpillSlotsOrReMatsAvailable when a + // physreg is modified. std::multimap PhysRegsAvailable; void disallowClobberPhysRegOnly(unsigned PhysReg); @@ -295,41 +297,43 @@ const MRegisterInfo *getRegInfo() const { return MRI; } - /// getSpillSlotPhysReg - If the specified stack slot is available in a - /// physical register, return that PhysReg, otherwise return 0. - unsigned getSpillSlotPhysReg(int Slot) const { - std::map::const_iterator I = SpillSlotsAvailable.find(Slot); - if (I != SpillSlotsAvailable.end()) { + /// getSpillSlotOrReMatPhysReg - If the specified stack slot or remat is + /// available in a physical register, return that PhysReg, otherwise + /// return 0. + unsigned getSpillSlotOrReMatPhysReg(int Slot) const { + std::map::const_iterator I = + SpillSlotsOrReMatsAvailable.find(Slot); + if (I != SpillSlotsOrReMatsAvailable.end()) { return I->second >> 1; // Remove the CanClobber bit. } return 0; } - /// addAvailable - Mark that the specified stack slot is available in the - /// specified physreg. If CanClobber is true, the physreg can be modified at - /// any time without changing the semantics of the program. - void addAvailable(int Slot, MachineInstr *MI, unsigned Reg, + /// addAvailable - Mark that the specified stack slot / remat is available in + /// the specified physreg. If CanClobber is true, the physreg can be modified + /// at any time without changing the semantics of the program. + void addAvailable(int SlotOrReMat, MachineInstr *MI, unsigned Reg, bool CanClobber = true) { // If this stack slot is thought to be available in some other physreg, // remove its record. - ModifyStackSlot(Slot); + ModifyStackSlotOrReMat(SlotOrReMat); - PhysRegsAvailable.insert(std::make_pair(Reg, Slot)); - SpillSlotsAvailable[Slot] = (Reg << 1) | (unsigned)CanClobber; + PhysRegsAvailable.insert(std::make_pair(Reg, SlotOrReMat)); + SpillSlotsOrReMatsAvailable[SlotOrReMat] = (Reg << 1) | (unsigned)CanClobber; - if (Slot > VirtRegMap::MAX_STACK_SLOT) - DOUT << "Remembering RM#" << Slot-VirtRegMap::MAX_STACK_SLOT-1; + if (SlotOrReMat > VirtRegMap::MAX_STACK_SLOT) + DOUT << "Remembering RM#" << SlotOrReMat-VirtRegMap::MAX_STACK_SLOT-1; else - DOUT << "Remembering SS#" << Slot; + DOUT << "Remembering SS#" << SlotOrReMat; DOUT << " in physreg " << MRI->getName(Reg) << "\n"; } /// canClobberPhysReg - Return true if the spiller is allowed to change the /// value of the specified stackslot register if it desires. The specified /// stack slot must be available in a physreg for this query to make sense. - bool canClobberPhysReg(int Slot) const { - assert(SpillSlotsAvailable.count(Slot) && "Slot not available!"); - return SpillSlotsAvailable.find(Slot)->second & 1; + bool canClobberPhysReg(int SlotOrReMat) const { + assert(SpillSlotsOrReMatsAvailable.count(SlotOrReMat) && "Value not available!"); + return SpillSlotsOrReMatsAvailable.find(SlotOrReMat)->second & 1; } /// disallowClobberPhysReg - Unset the CanClobber bit of the specified @@ -342,10 +346,10 @@ /// it and any of its aliases. void ClobberPhysReg(unsigned PhysReg); - /// ModifyStackSlot - This method is called when the value in a stack slot + /// ModifyStackSlotOrReMat - This method is called when the value in a stack slot /// changes. This removes information about which register the previous value /// for this slot lives in (as the previous value is dead now). - void ModifyStackSlot(int Slot); + void ModifyStackSlotOrReMat(int SlotOrReMat); }; } @@ -356,11 +360,11 @@ std::multimap::iterator I = PhysRegsAvailable.lower_bound(PhysReg); while (I != PhysRegsAvailable.end() && I->first == PhysReg) { - int Slot = I->second; + int SlotOrReMat = I->second; I++; - assert((SpillSlotsAvailable[Slot] >> 1) == PhysReg && + assert((SpillSlotsOrReMatsAvailable[SlotOrReMat] >> 1) == PhysReg && "Bidirectional map mismatch!"); - SpillSlotsAvailable[Slot] &= ~1; + SpillSlotsOrReMatsAvailable[SlotOrReMat] &= ~1; DOUT << "PhysReg " << MRI->getName(PhysReg) << " copied, it is available for use but can no longer be modified\n"; } @@ -381,17 +385,17 @@ std::multimap::iterator I = PhysRegsAvailable.lower_bound(PhysReg); while (I != PhysRegsAvailable.end() && I->first == PhysReg) { - int Slot = I->second; + int SlotOrReMat = I->second; PhysRegsAvailable.erase(I++); - assert((SpillSlotsAvailable[Slot] >> 1) == PhysReg && + assert((SpillSlotsOrReMatsAvailable[SlotOrReMat] >> 1) == PhysReg && "Bidirectional map mismatch!"); - SpillSlotsAvailable.erase(Slot); + SpillSlotsOrReMatsAvailable.erase(SlotOrReMat); DOUT << "PhysReg " << MRI->getName(PhysReg) << " clobbered, invalidating "; - if (Slot > VirtRegMap::MAX_STACK_SLOT) - DOUT << "RM#" << Slot-VirtRegMap::MAX_STACK_SLOT-1 << "\n"; + if (SlotOrReMat > VirtRegMap::MAX_STACK_SLOT) + DOUT << "RM#" << SlotOrReMat-VirtRegMap::MAX_STACK_SLOT-1 << "\n"; else - DOUT << "SS#" << Slot << "\n"; + DOUT << "SS#" << SlotOrReMat << "\n"; } } @@ -404,14 +408,14 @@ ClobberPhysRegOnly(PhysReg); } -/// ModifyStackSlot - This method is called when the value in a stack slot +/// ModifyStackSlotOrReMat - This method is called when the value in a stack slot /// changes. This removes information about which register the previous value /// for this slot lives in (as the previous value is dead now). -void AvailableSpills::ModifyStackSlot(int Slot) { - std::map::iterator It = SpillSlotsAvailable.find(Slot); - if (It == SpillSlotsAvailable.end()) return; +void AvailableSpills::ModifyStackSlotOrReMat(int SlotOrReMat) { + std::map::iterator It = SpillSlotsOrReMatsAvailable.find(SlotOrReMat); + if (It == SpillSlotsOrReMatsAvailable.end()) return; unsigned Reg = It->second >> 1; - SpillSlotsAvailable.erase(It); + SpillSlotsOrReMatsAvailable.erase(It); // This register may hold the value of multiple stack slots, only remove this // stack slot from the set of values the register contains. @@ -419,7 +423,7 @@ for (; ; ++I) { assert(I != PhysRegsAvailable.end() && I->first == Reg && "Map inverse broken!"); - if (I->second == Slot) break; + if (I->second == SlotOrReMat) break; } PhysRegsAvailable.erase(I); } @@ -490,8 +494,8 @@ // The MachineInstr operand that reused an available value. unsigned Operand; - // StackSlot - The spill slot of the value being reused. - unsigned StackSlot; + // StackSlotOrReMat - The spill slot or remat id of the value being reused. + unsigned StackSlotOrReMat; // PhysRegReused - The physical register the value was available in. unsigned PhysRegReused; @@ -504,7 +508,7 @@ ReusedOp(unsigned o, unsigned ss, unsigned prr, unsigned apr, unsigned vreg) - : Operand(o), StackSlot(ss), PhysRegReused(prr), AssignedPhysReg(apr), + : Operand(o), StackSlotOrReMat(ss), PhysRegReused(prr), AssignedPhysReg(apr), VirtReg(vreg) {} }; @@ -525,7 +529,7 @@ /// addReuse - If we choose to reuse a virtual register that is already /// available instead of reloading it, remember that we did so. - void addReuse(unsigned OpNo, unsigned StackSlot, + void addReuse(unsigned OpNo, unsigned StackSlotOrReMat, unsigned PhysRegReused, unsigned AssignedPhysReg, unsigned VirtReg) { // If the reload is to the assigned register anyway, no undo will be @@ -533,7 +537,7 @@ if (PhysRegReused == AssignedPhysReg) return; // Otherwise, remember this. - Reuses.push_back(ReusedOp(OpNo, StackSlot, PhysRegReused, + Reuses.push_back(ReusedOp(OpNo, StackSlotOrReMat, PhysRegReused, AssignedPhysReg, VirtReg)); } @@ -553,7 +557,8 @@ std::map &MaybeDeadStores, SmallSet &Rejected, BitVector &RegKills, - std::vector &KillOps) { + std::vector &KillOps, + VirtRegMap &VRM) { if (Reuses.empty()) return PhysReg; // This is most often empty. for (unsigned ro = 0, e = Reuses.size(); ro != e; ++ro) { @@ -569,7 +574,7 @@ unsigned NewReg = Op.AssignedPhysReg; Rejected.insert(PhysReg); return GetRegForReload(NewReg, MI, Spills, MaybeDeadStores, Rejected, - RegKills, KillOps); + RegKills, KillOps, VRM); } else { // Otherwise, we might also have a problem if a previously reused // value aliases the new register. If so, codegen the previous reload @@ -595,20 +600,26 @@ // would prefer us to use a different register. unsigned NewPhysReg = GetRegForReload(NewOp.AssignedPhysReg, MI, Spills, MaybeDeadStores, - Rejected, RegKills, KillOps); + Rejected, RegKills, KillOps, VRM); - MRI->loadRegFromStackSlot(*MBB, MI, NewPhysReg, - NewOp.StackSlot, AliasRC); + if (NewOp.StackSlotOrReMat > VirtRegMap::MAX_STACK_SLOT) { + MRI->reMaterialize(*MBB, MI, NewPhysReg, + VRM.getReMaterializedMI(NewOp.VirtReg)); + ++NumReMats; + } else { + MRI->loadRegFromStackSlot(*MBB, MI, NewPhysReg, + NewOp.StackSlotOrReMat, AliasRC); + ++NumLoads; + } Spills.ClobberPhysReg(NewPhysReg); Spills.ClobberPhysReg(NewOp.PhysRegReused); // Any stores to this stack slot are not dead anymore. - MaybeDeadStores.erase(NewOp.StackSlot); + MaybeDeadStores.erase(NewOp.StackSlotOrReMat); MI->getOperand(NewOp.Operand).setReg(NewPhysReg); - Spills.addAvailable(NewOp.StackSlot, MI, NewPhysReg); - ++NumLoads; + Spills.addAvailable(NewOp.StackSlotOrReMat, MI, NewPhysReg); MachineBasicBlock::iterator MII = MI; --MII; UpdateKills(*MII, RegKills, KillOps); @@ -640,10 +651,11 @@ AvailableSpills &Spills, std::map &MaybeDeadStores, BitVector &RegKills, - std::vector &KillOps) { + std::vector &KillOps, + VirtRegMap &VRM) { SmallSet Rejected; return GetRegForReload(PhysReg, MI, Spills, MaybeDeadStores, Rejected, - RegKills, KillOps); + RegKills, KillOps, VRM); } }; } @@ -651,8 +663,7 @@ /// rewriteMBB - Keep track of which spills are available even after the /// register allocator is done with them. If possible, avoid reloading vregs. -void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM, - std::vector &ReMatedMIs) { +void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM) { DOUT << MBB.getBasicBlock()->getName() << ":\n"; // Spills - Keep track of which spilled values are available in physregs so @@ -689,28 +700,6 @@ // Loop over all of the implicit defs, clearing them from our available // sets. const TargetInstrDescriptor *TID = MI.getInstrDescriptor(); - - // If this instruction is being rematerialized, just remove it! - int FrameIdx; - if (TII->isTriviallyReMaterializable(&MI) || - TII->isLoadFromStackSlot(&MI, FrameIdx)) { - Erased = true; - for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) { - MachineOperand &MO = MI.getOperand(i); - if (!MO.isRegister() || MO.getReg() == 0) - continue; // Ignore non-register operands. - if (MO.isDef() && !VRM.isReMaterialized(MO.getReg())) { - Erased = false; - break; - } - } - if (Erased) { - VRM.RemoveFromFoldedVirtMap(&MI); - ReMatedMIs.push_back(MI.removeFromParent()); - goto ProcessNextInst; - } - } - if (TID->ImplicitDefs) { const unsigned *ImpDef = TID->ImplicitDefs; for ( ; *ImpDef; ++ImpDef) { @@ -738,7 +727,7 @@ "Not a virtual or a physical register?"); unsigned VirtReg = MO.getReg(); - if (!VRM.hasStackSlot(VirtReg)) { + if (VRM.isAssignedReg(VirtReg)) { // This virtual register was assigned a physreg! unsigned Phys = VRM.getPhys(VirtReg); MF.setPhysRegUsed(Phys); @@ -752,12 +741,13 @@ if (!MO.isUse()) continue; // Handle defs in the loop below (handle use&def here though) - bool doReMat = VRM.isReMaterialized(VirtReg); - int StackSlot = VRM.getStackSlot(VirtReg); + bool DoReMat = VRM.isReMaterialized(VirtReg); + int SSorRMId = DoReMat + ? VRM.getReMatId(VirtReg) : VRM.getStackSlot(VirtReg); unsigned PhysReg; // Check to see if this stack slot is available. - if ((PhysReg = Spills.getSpillSlotPhysReg(StackSlot))) { + if ((PhysReg = Spills.getSpillSlotOrReMatPhysReg(SSorRMId))) { // This spilled operand might be part of a two-address operand. If this // is the case, then changing it will necessarily require changing the // def part of the instruction as well. However, in some cases, we @@ -771,16 +761,16 @@ // Okay, we have a two address operand. We can reuse this physreg as // long as we are allowed to clobber the value and there isn't an // earlier def that has already clobbered the physreg. - CanReuse = Spills.canClobberPhysReg(StackSlot) && + CanReuse = Spills.canClobberPhysReg(SSorRMId) && !ReusedOperands.isClobbered(PhysReg); } if (CanReuse) { // If this stack slot value is already available, reuse it! - if (StackSlot > VirtRegMap::MAX_STACK_SLOT) - DOUT << "Reusing RM#" << StackSlot-VirtRegMap::MAX_STACK_SLOT-1; + if (SSorRMId > VirtRegMap::MAX_STACK_SLOT) + DOUT << "Reusing RM#" << SSorRMId-VirtRegMap::MAX_STACK_SLOT-1; else - DOUT << "Reusing SS#" << StackSlot; + DOUT << "Reusing SS#" << SSorRMId; DOUT << " from physreg " << MRI->getName(PhysReg) << " for vreg" << VirtReg <<" instead of reloading into physreg " @@ -801,7 +791,7 @@ // or R0 and R1 might not be compatible with each other. In this // case, we actually insert a reload for V1 in R1, ensuring that // we can get at R0 or its alias. - ReusedOperands.addReuse(i, StackSlot, PhysReg, + ReusedOperands.addReuse(i, SSorRMId, PhysReg, VRM.getPhys(VirtReg), VirtReg); if (ti != -1) // Only mark it clobbered if this is a use&def operand. @@ -829,16 +819,16 @@ // reuser. if (ReusedOperands.hasReuses()) DesignatedReg = ReusedOperands.GetRegForReload(DesignatedReg, &MI, - Spills, MaybeDeadStores, RegKills, KillOps); + Spills, MaybeDeadStores, RegKills, KillOps, VRM); // If the mapped designated register is actually the physreg we have // incoming, we don't need to inserted a dead copy. if (DesignatedReg == PhysReg) { // If this stack slot value is already available, reuse it! - if (StackSlot > VirtRegMap::MAX_STACK_SLOT) - DOUT << "Reusing RM#" << StackSlot-VirtRegMap::MAX_STACK_SLOT-1; + if (SSorRMId > VirtRegMap::MAX_STACK_SLOT) + DOUT << "Reusing RM#" << SSorRMId-VirtRegMap::MAX_STACK_SLOT-1; else - DOUT << "Reusing SS#" << StackSlot; + DOUT << "Reusing SS#" << SSorRMId; DOUT << " from physreg " << MRI->getName(PhysReg) << " for vreg" << VirtReg << " instead of reloading into same physreg.\n"; @@ -859,7 +849,7 @@ // This invalidates DesignatedReg. Spills.ClobberPhysReg(DesignatedReg); - Spills.addAvailable(StackSlot, &MI, DesignatedReg); + Spills.addAvailable(SSorRMId, &MI, DesignatedReg); MI.getOperand(i).setReg(DesignatedReg); DOUT << '\t' << *prior(MII); ++NumReused; @@ -877,24 +867,24 @@ // reuser. if (ReusedOperands.hasReuses()) PhysReg = ReusedOperands.GetRegForReload(PhysReg, &MI, - Spills, MaybeDeadStores, RegKills, KillOps); + Spills, MaybeDeadStores, RegKills, KillOps, VRM); MF.setPhysRegUsed(PhysReg); ReusedOperands.markClobbered(PhysReg); - if (doReMat) { + if (DoReMat) { MRI->reMaterialize(MBB, &MI, PhysReg, VRM.getReMaterializedMI(VirtReg)); ++NumReMats; } else { - MRI->loadRegFromStackSlot(MBB, &MI, PhysReg, StackSlot, RC); + MRI->loadRegFromStackSlot(MBB, &MI, PhysReg, SSorRMId, RC); ++NumLoads; } // This invalidates PhysReg. Spills.ClobberPhysReg(PhysReg); // Any stores to this stack slot are not dead anymore. - if (!doReMat) - MaybeDeadStores.erase(StackSlot); - Spills.addAvailable(StackSlot, &MI, PhysReg); + if (!DoReMat) + MaybeDeadStores.erase(SSorRMId); + Spills.addAvailable(SSorRMId, &MI, PhysReg); // Assumes this is the last use. IsKill will be unset if reg is reused // unless it's a two-address operand. if (TID->getOperandConstraint(i, TOI::TIED_TO) == -1) @@ -914,7 +904,7 @@ << I->second.second; unsigned VirtReg = I->second.first; VirtRegMap::ModRef MR = I->second.second; - if (!VRM.hasStackSlot(VirtReg)) { + if (VRM.isAssignedReg(VirtReg)) { DOUT << ": No stack slot!\n"; continue; } @@ -929,7 +919,7 @@ if (FrameIdx == SS) { // If this spill slot is available, turn it into a copy (or nothing) // instead of leaving it as a load! - if (unsigned InReg = Spills.getSpillSlotPhysReg(SS)) { + if (unsigned InReg = Spills.getSpillSlotOrReMatPhysReg(SS)) { DOUT << "Promoted Load To Copy: " << MI; if (DestReg != InReg) { MRI->copyRegToReg(MBB, &MI, DestReg, InReg, @@ -974,7 +964,7 @@ // the value, the value is not available anymore. if (MR & VirtRegMap::isMod) { // Notice that the value in this stack slot has been modified. - Spills.ModifyStackSlot(SS); + Spills.ModifyStackSlotOrReMat(SS); // If this is *just* a mod of the value, check to see if this is just a // store to the spill slot (i.e. the spill got merged into the copy). If @@ -1053,7 +1043,7 @@ // Another def has taken the assigned physreg. It must have been a // use&def which got it due to reuse. Undo the reuse! PhysReg = ReusedOperands.GetRegForReload(PhysReg, &MI, - Spills, MaybeDeadStores, RegKills, KillOps); + Spills, MaybeDeadStores, RegKills, KillOps, VRM); } } @@ -1077,7 +1067,7 @@ // If the stack slot value was previously available in some other // register, change it now. Otherwise, make the register available, // in PhysReg. - Spills.ModifyStackSlot(StackSlot); + Spills.ModifyStackSlotOrReMat(StackSlot); Spills.ClobberPhysReg(PhysReg); Spills.addAvailable(StackSlot, LastStore, PhysReg); ++NumStores; Modified: llvm/trunk/lib/CodeGen/VirtRegMap.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/VirtRegMap.h?rev=41060&r1=41059&r2=41060&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/VirtRegMap.h (original) +++ llvm/trunk/lib/CodeGen/VirtRegMap.h Mon Aug 13 18:45:17 2007 @@ -55,6 +55,7 @@ /// which corresponds to the stack slot this register is spilled /// at. IndexedMap Virt2StackSlotMap; + IndexedMap Virt2ReMatIdMap; /// MI2VirtMap - This is MachineInstr to virtual register /// mapping. In the case of memory spill code being folded into /// instructions, we need to know which virtual register was @@ -64,7 +65,7 @@ /// ReMatMap - This is virtual register to re-materialized instruction /// mapping. Each virtual register whose definition is going to be /// re-materialized has an entry in it. - std::map ReMatMap; + IndexedMap ReMatMap; /// ReMatId - Instead of assigning a stack slot to a to be rematerialized /// virtual register, an unique id is being assigned. This keeps track of @@ -119,10 +120,11 @@ grow(); } - /// @brief returns true is the specified virtual register is - /// mapped to a stack slot - bool hasStackSlot(unsigned virtReg) const { - return getStackSlot(virtReg) != NO_STACK_SLOT; + /// @brief returns true is the specified virtual register is not + /// mapped to a stack slot or rematerialized. + bool isAssignedReg(unsigned virtReg) const { + return getStackSlot(virtReg) == NO_STACK_SLOT && + getReMatId(virtReg) == NO_STACK_SLOT; } /// @brief returns the stack slot mapped to the specified virtual @@ -132,6 +134,13 @@ return Virt2StackSlotMap[virtReg]; } + /// @brief returns the rematerialization id mapped to the specified virtual + /// register + int getReMatId(unsigned virtReg) const { + assert(MRegisterInfo::isVirtualRegister(virtReg)); + return Virt2ReMatIdMap[virtReg]; + } + /// @brief create a mapping for the specifed virtual register to /// the next available stack slot int assignVirt2StackSlot(unsigned virtReg); @@ -142,22 +151,26 @@ /// @brief assign an unique re-materialization id to the specified /// virtual register. int assignVirtReMatId(unsigned virtReg); + /// @brief assign an unique re-materialization id to the specified + /// virtual register. + void assignVirtReMatId(unsigned virtReg, int id); /// @brief returns true if the specified virtual register is being /// re-materialized. bool isReMaterialized(unsigned virtReg) const { - return ReMatMap.count(virtReg) != 0; + return ReMatMap[virtReg] != NULL; } /// @brief returns the original machine instruction being re-issued /// to re-materialize the specified virtual register. - const MachineInstr *getReMaterializedMI(unsigned virtReg) { + MachineInstr *getReMaterializedMI(unsigned virtReg) const { return ReMatMap[virtReg]; } /// @brief records the specified virtual register will be /// re-materialized and the original instruction which will be re-issed - /// for this purpose. + /// for this purpose. If parameter all is true, then all uses of the + /// registers are rematerialized and it's safe to delete the definition. void setVirtIsReMaterialized(unsigned virtReg, MachineInstr *def) { ReMatMap[virtReg] = def; } From evan.cheng at apple.com Mon Aug 13 18:54:16 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 13 Aug 2007 23:54:16 -0000 Subject: [llvm-commits] [llvm] r41061 - in /llvm/trunk/test/CodeGen/X86: 2007-08-09-IllegalX86-64Asm.ll constant-pool-remat-0.ll Message-ID: <200708132354.l7DNsGVE010530@zion.cs.uiuc.edu> Author: evancheng Date: Mon Aug 13 18:54:16 2007 New Revision: 41061 URL: http://llvm.org/viewvc/llvm-project?rev=41061&view=rev Log: Now capable of rematerializing coalesced live intervals. Added: llvm/trunk/test/CodeGen/X86/2007-08-09-IllegalX86-64Asm.ll Modified: llvm/trunk/test/CodeGen/X86/constant-pool-remat-0.ll Added: llvm/trunk/test/CodeGen/X86/2007-08-09-IllegalX86-64Asm.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-08-09-IllegalX86-64Asm.ll?rev=41061&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/X86/2007-08-09-IllegalX86-64Asm.ll (added) +++ llvm/trunk/test/CodeGen/X86/2007-08-09-IllegalX86-64Asm.ll Mon Aug 13 18:54:16 2007 @@ -0,0 +1,235 @@ +; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin | not grep "movb %ah, %r" + + %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, [4 x i8], i64 } + %struct.PyBoolScalarObject = type { i64, %struct._typeobject*, i8 } + %struct.PyBufferProcs = type { i64 (%struct.PyObject*, i64, i8**)*, i64 (%struct.PyObject*, i64, i8**)*, i64 (%struct.PyObject*, i64*)*, i64 (%struct.PyObject*, i64, i8**)* } + %struct.PyGetSetDef = type { i8*, %struct.PyObject* (%struct.PyObject*, i8*)*, i32 (%struct.PyObject*, %struct.PyObject*, i8*)*, i8*, i8* } + %struct.PyMappingMethods = type { i64 (%struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, i32 (%struct.PyObject*, %struct.PyObject*, %struct.PyObject*)* } + %struct.PyMemberDef = type opaque + %struct.PyMethodDef = type { i8*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, i32, i8* } + %struct.PyNumberMethods = type { %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*)*, i32 (%struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, i32 (%struct.PyObject**, %struct.PyObject! **)*, %struct.PyObject* (%struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*! )*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*,! %struct .PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*)* } + %struct.PyObject = type { i64, %struct._typeobject* } + %struct.PySequenceMethods = type { i64 (%struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, i64)*, %struct.PyObject* (%struct.PyObject*, i64)*, %struct.PyObject* (%struct.PyObject*, i64, i64)*, i32 (%struct.PyObject*, i64, %struct.PyObject*)*, i32 (%struct.PyObject*, i64, i64, %struct.PyObject*)*, i32 (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, i64)* } + %struct.PyTupleObject = type { i64, %struct._typeobject*, i64, [1 x %struct.PyObject*] } + %struct.__sFILEX = type opaque + %struct.__sbuf = type { i8*, i32 } + %struct._typeobject = type { i64, %struct._typeobject*, i64, i8*, i64, i64, void (%struct.PyObject*)*, i32 (%struct.PyObject*, %struct.FILE*, i32)*, %struct.PyObject* (%struct.PyObject*, i8*)*, i32 (%struct.PyObject*, i8*, %struct.PyObject*)*, i32 (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*)*, %struct.PyNumberMethods*, %struct.PySequenceMethods*, %struct.PyMappingMethods*, i64 (%struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, i32 (%struct.PyObject*, %struct.PyObject*, %struct.PyObject*)*, %struct.PyBufferProcs*, i64, i8*, i32 (%struct.PyObject*, i32 (%struct.PyObject*, i8*)*, i8*)*, i32 (%struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*, i32)*, i64, %struct.PyObject* (%struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*)*, %struct.PyMethodDef*, %struct.PyMemberD! ef*, %struct.PyGetSetDef*, %struct._typeobject*, %struct.PyObject*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*, %struct.PyObject*)*, i32 (%struct.PyObject*, %struct.PyObject*, %struct.PyObject*)*, i64, i32 (%struct.PyObject*, %struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct._typeobject*, i64)*, %struct.PyObject* (%struct._typeobject*, %struct.PyObject*, %struct.PyObject*)*, void (i8*)*, i32 (%struct.PyObject*)*, %struct.PyObject*, %struct.PyObject*, %struct.PyObject*, %struct.PyObject*, %struct.PyObject*, void (%struct.PyObject*)* } + at PyArray_API = external global i8** ; [#uses=4] + at PyUFunc_API = external global i8** ; [#uses=4] + at .str5 = external constant [14 x i8] ; <[14 x i8]*> [#uses=1] + +define %struct.PyObject* @ubyte_divmod(%struct.PyObject* %a, %struct.PyObject* %b) { +entry: + %arg1 = alloca i8, align 1 ; [#uses=3] + %arg2 = alloca i8, align 1 ; [#uses=3] + %first = alloca i32, align 4 ; [#uses=2] + %bufsize = alloca i32, align 4 ; [#uses=1] + %errmask = alloca i32, align 4 ; [#uses=2] + %errobj = alloca %struct.PyObject*, align 8 ; <%struct.PyObject**> [#uses=2] + %tmp3.i = call fastcc i32 @_ubyte_convert_to_ctype( %struct.PyObject* %a, i8* %arg1 ) ; [#uses=2] + %tmp5.i = icmp slt i32 %tmp3.i, 0 ; [#uses=1] + br i1 %tmp5.i, label %_ubyte_convert2_to_ctypes.exit, label %cond_next.i + +cond_next.i: ; preds = %entry + %tmp11.i = call fastcc i32 @_ubyte_convert_to_ctype( %struct.PyObject* %b, i8* %arg2 ) ; [#uses=2] + %tmp13.i = icmp slt i32 %tmp11.i, 0 ; [#uses=1] + %retval.i = select i1 %tmp13.i, i32 %tmp11.i, i32 0 ; [#uses=1] + switch i32 %retval.i, label %bb35 [ + i32 -2, label %bb17 + i32 -1, label %bb4 + ] + +_ubyte_convert2_to_ctypes.exit: ; preds = %entry + switch i32 %tmp3.i, label %bb35 [ + i32 -2, label %bb17 + i32 -1, label %bb4 + ] + +bb4: ; preds = %_ubyte_convert2_to_ctypes.exit, %cond_next.i + %tmp5 = load i8*** @PyArray_API, align 8 ; [#uses=1] + %tmp6 = getelementptr i8** %tmp5, i64 2 ; [#uses=1] + %tmp7 = load i8** %tmp6 ; [#uses=1] + %tmp78 = bitcast i8* %tmp7 to %struct._typeobject* ; <%struct._typeobject*> [#uses=1] + %tmp9 = getelementptr %struct._typeobject* %tmp78, i32 0, i32 12 ; <%struct.PyNumberMethods**> [#uses=1] + %tmp10 = load %struct.PyNumberMethods** %tmp9 ; <%struct.PyNumberMethods*> [#uses=1] + %tmp11 = getelementptr %struct.PyNumberMethods* %tmp10, i32 0, i32 5 ; <%struct.PyObject* (%struct.PyObject*, %struct.PyObject*)**> [#uses=1] + %tmp12 = load %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)** %tmp11 ; <%struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*> [#uses=1] + %tmp15 = call %struct.PyObject* %tmp12( %struct.PyObject* %a, %struct.PyObject* %b ) ; <%struct.PyObject*> [#uses=1] + ret %struct.PyObject* %tmp15 + +bb17: ; preds = %_ubyte_convert2_to_ctypes.exit, %cond_next.i + %tmp18 = call %struct.PyObject* @PyErr_Occurred( ) ; <%struct.PyObject*> [#uses=1] + %tmp19 = icmp eq %struct.PyObject* %tmp18, null ; [#uses=1] + br i1 %tmp19, label %cond_next, label %UnifiedReturnBlock + +cond_next: ; preds = %bb17 + %tmp22 = load i8*** @PyArray_API, align 8 ; [#uses=1] + %tmp23 = getelementptr i8** %tmp22, i64 10 ; [#uses=1] + %tmp24 = load i8** %tmp23 ; [#uses=1] + %tmp2425 = bitcast i8* %tmp24 to %struct._typeobject* ; <%struct._typeobject*> [#uses=1] + %tmp26 = getelementptr %struct._typeobject* %tmp2425, i32 0, i32 12 ; <%struct.PyNumberMethods**> [#uses=1] + %tmp27 = load %struct.PyNumberMethods** %tmp26 ; <%struct.PyNumberMethods*> [#uses=1] + %tmp28 = getelementptr %struct.PyNumberMethods* %tmp27, i32 0, i32 5 ; <%struct.PyObject* (%struct.PyObject*, %struct.PyObject*)**> [#uses=1] + %tmp29 = load %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)** %tmp28 ; <%struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*> [#uses=1] + %tmp32 = call %struct.PyObject* %tmp29( %struct.PyObject* %a, %struct.PyObject* %b ) ; <%struct.PyObject*> [#uses=1] + ret %struct.PyObject* %tmp32 + +bb35: ; preds = %_ubyte_convert2_to_ctypes.exit, %cond_next.i + %tmp36 = load i8*** @PyUFunc_API, align 8 ; [#uses=1] + %tmp37 = getelementptr i8** %tmp36, i64 27 ; [#uses=1] + %tmp38 = load i8** %tmp37 ; [#uses=1] + %tmp3839 = bitcast i8* %tmp38 to void ()* ; [#uses=1] + call void %tmp3839( ) + %tmp40 = load i8* %arg2, align 1 ; [#uses=4] + %tmp1.i = icmp eq i8 %tmp40, 0 ; [#uses=2] + br i1 %tmp1.i, label %cond_true.i, label %cond_false.i + +cond_true.i: ; preds = %bb35 + %tmp3.i196 = call i32 @feraiseexcept( i32 4 ) ; [#uses=0] + %tmp46207 = load i8* %arg2, align 1 ; [#uses=3] + %tmp48208 = load i8* %arg1, align 1 ; [#uses=2] + %tmp1.i197210 = icmp eq i8 %tmp48208, 0 ; [#uses=1] + %tmp4.i212 = icmp eq i8 %tmp46207, 0 ; [#uses=1] + %tmp7.i198213 = or i1 %tmp1.i197210, %tmp4.i212 ; [#uses=1] + br i1 %tmp7.i198213, label %cond_true.i200, label %cond_next17.i + +cond_false.i: ; preds = %bb35 + %tmp42 = load i8* %arg1, align 1 ; [#uses=3] + %tmp7.i = udiv i8 %tmp42, %tmp40 ; [#uses=2] + %tmp1.i197 = icmp eq i8 %tmp42, 0 ; [#uses=1] + %tmp7.i198 = or i1 %tmp1.i197, %tmp1.i ; [#uses=1] + br i1 %tmp7.i198, label %cond_true.i200, label %cond_next17.i + +cond_true.i200: ; preds = %cond_false.i, %cond_true.i + %out.0 = phi i8 [ 0, %cond_true.i ], [ %tmp7.i, %cond_false.i ] ; [#uses=2] + %tmp46202.0 = phi i8 [ %tmp46207, %cond_true.i ], [ %tmp40, %cond_false.i ] ; [#uses=1] + %tmp11.i199 = icmp eq i8 %tmp46202.0, 0 ; [#uses=1] + br i1 %tmp11.i199, label %cond_true14.i, label %ubyte_ctype_remainder.exit + +cond_true14.i: ; preds = %cond_true.i200 + %tmp15.i = call i32 @feraiseexcept( i32 4 ) ; [#uses=0] + br label %ubyte_ctype_remainder.exit + +cond_next17.i: ; preds = %cond_false.i, %cond_true.i + %out.1 = phi i8 [ 0, %cond_true.i ], [ %tmp7.i, %cond_false.i ] ; [#uses=1] + %tmp46202.1 = phi i8 [ %tmp46207, %cond_true.i ], [ %tmp40, %cond_false.i ] ; [#uses=1] + %tmp48205.1 = phi i8 [ %tmp48208, %cond_true.i ], [ %tmp42, %cond_false.i ] ; [#uses=1] + %tmp20.i = urem i8 %tmp48205.1, %tmp46202.1 ; [#uses=1] + br label %ubyte_ctype_remainder.exit + +ubyte_ctype_remainder.exit: ; preds = %cond_next17.i, %cond_true14.i, %cond_true.i200 + %out2.0 = phi i8 [ %tmp20.i, %cond_next17.i ], [ 0, %cond_true14.i ], [ 0, %cond_true.i200 ] ; [#uses=1] + %out.2 = phi i8 [ %out.1, %cond_next17.i ], [ %out.0, %cond_true14.i ], [ %out.0, %cond_true.i200 ] ; [#uses=1] + %tmp52 = load i8*** @PyUFunc_API, align 8 ; [#uses=1] + %tmp53 = getelementptr i8** %tmp52, i64 28 ; [#uses=1] + %tmp54 = load i8** %tmp53 ; [#uses=1] + %tmp5455 = bitcast i8* %tmp54 to i32 ()* ; [#uses=1] + %tmp56 = call i32 %tmp5455( ) ; [#uses=2] + %tmp58 = icmp eq i32 %tmp56, 0 ; [#uses=1] + br i1 %tmp58, label %cond_next89, label %cond_true61 + +cond_true61: ; preds = %ubyte_ctype_remainder.exit + %tmp62 = load i8*** @PyUFunc_API, align 8 ; [#uses=1] + %tmp63 = getelementptr i8** %tmp62, i64 25 ; [#uses=1] + %tmp64 = load i8** %tmp63 ; [#uses=1] + %tmp6465 = bitcast i8* %tmp64 to i32 (i8*, i32*, i32*, %struct.PyObject**)* ; [#uses=1] + %tmp67 = call i32 %tmp6465( i8* getelementptr ([14 x i8]* @.str5, i32 0, i64 0), i32* %bufsize, i32* %errmask, %struct.PyObject** %errobj ) ; [#uses=1] + %tmp68 = icmp slt i32 %tmp67, 0 ; [#uses=1] + br i1 %tmp68, label %UnifiedReturnBlock, label %cond_next73 + +cond_next73: ; preds = %cond_true61 + store i32 1, i32* %first, align 4 + %tmp74 = load i8*** @PyUFunc_API, align 8 ; [#uses=1] + %tmp75 = getelementptr i8** %tmp74, i64 29 ; [#uses=1] + %tmp76 = load i8** %tmp75 ; [#uses=1] + %tmp7677 = bitcast i8* %tmp76 to i32 (i32, %struct.PyObject*, i32, i32*)* ; [#uses=1] + %tmp79 = load %struct.PyObject** %errobj, align 8 ; <%struct.PyObject*> [#uses=1] + %tmp80 = load i32* %errmask, align 4 ; [#uses=1] + %tmp82 = call i32 %tmp7677( i32 %tmp80, %struct.PyObject* %tmp79, i32 %tmp56, i32* %first ) ; [#uses=1] + %tmp83 = icmp eq i32 %tmp82, 0 ; [#uses=1] + br i1 %tmp83, label %cond_next89, label %UnifiedReturnBlock + +cond_next89: ; preds = %cond_next73, %ubyte_ctype_remainder.exit + %tmp90 = call %struct.PyObject* @PyTuple_New( i64 2 ) ; <%struct.PyObject*> [#uses=9] + %tmp92 = icmp eq %struct.PyObject* %tmp90, null ; [#uses=1] + br i1 %tmp92, label %UnifiedReturnBlock, label %cond_next97 + +cond_next97: ; preds = %cond_next89 + %tmp98 = load i8*** @PyArray_API, align 8 ; [#uses=1] + %tmp99 = getelementptr i8** %tmp98, i64 25 ; [#uses=1] + %tmp100 = load i8** %tmp99 ; [#uses=1] + %tmp100101 = bitcast i8* %tmp100 to %struct._typeobject* ; <%struct._typeobject*> [#uses=2] + %tmp102 = getelementptr %struct._typeobject* %tmp100101, i32 0, i32 38 ; <%struct.PyObject* (%struct._typeobject*, i64)**> [#uses=1] + %tmp103 = load %struct.PyObject* (%struct._typeobject*, i64)** %tmp102 ; <%struct.PyObject* (%struct._typeobject*, i64)*> [#uses=1] + %tmp108 = call %struct.PyObject* %tmp103( %struct._typeobject* %tmp100101, i64 0 ) ; <%struct.PyObject*> [#uses=3] + %tmp110 = icmp eq %struct.PyObject* %tmp108, null ; [#uses=1] + br i1 %tmp110, label %cond_true113, label %cond_next135 + +cond_true113: ; preds = %cond_next97 + %tmp115 = getelementptr %struct.PyObject* %tmp90, i32 0, i32 0 ; [#uses=2] + %tmp116 = load i64* %tmp115 ; [#uses=1] + %tmp117 = add i64 %tmp116, -1 ; [#uses=2] + store i64 %tmp117, i64* %tmp115 + %tmp123 = icmp eq i64 %tmp117, 0 ; [#uses=1] + br i1 %tmp123, label %cond_true126, label %UnifiedReturnBlock + +cond_true126: ; preds = %cond_true113 + %tmp128 = getelementptr %struct.PyObject* %tmp90, i32 0, i32 1 ; <%struct._typeobject**> [#uses=1] + %tmp129 = load %struct._typeobject** %tmp128 ; <%struct._typeobject*> [#uses=1] + %tmp130 = getelementptr %struct._typeobject* %tmp129, i32 0, i32 6 ; [#uses=1] + %tmp131 = load void (%struct.PyObject*)** %tmp130 ; [#uses=1] + call void %tmp131( %struct.PyObject* %tmp90 ) + ret %struct.PyObject* null + +cond_next135: ; preds = %cond_next97 + %tmp136137 = bitcast %struct.PyObject* %tmp108 to %struct.PyBoolScalarObject* ; <%struct.PyBoolScalarObject*> [#uses=1] + %tmp139 = getelementptr %struct.PyBoolScalarObject* %tmp136137, i32 0, i32 2 ; [#uses=1] + store i8 %out.2, i8* %tmp139 + %tmp140141 = bitcast %struct.PyObject* %tmp90 to %struct.PyTupleObject* ; <%struct.PyTupleObject*> [#uses=2] + %tmp143 = getelementptr %struct.PyTupleObject* %tmp140141, i32 0, i32 3, i64 0 ; <%struct.PyObject**> [#uses=1] + store %struct.PyObject* %tmp108, %struct.PyObject** %tmp143 + %tmp145 = load i8*** @PyArray_API, align 8 ; [#uses=1] + %tmp146 = getelementptr i8** %tmp145, i64 25 ; [#uses=1] + %tmp147 = load i8** %tmp146 ; [#uses=1] + %tmp147148 = bitcast i8* %tmp147 to %struct._typeobject* ; <%struct._typeobject*> [#uses=2] + %tmp149 = getelementptr %struct._typeobject* %tmp147148, i32 0, i32 38 ; <%struct.PyObject* (%struct._typeobject*, i64)**> [#uses=1] + %tmp150 = load %struct.PyObject* (%struct._typeobject*, i64)** %tmp149 ; <%struct.PyObject* (%struct._typeobject*, i64)*> [#uses=1] + %tmp155 = call %struct.PyObject* %tmp150( %struct._typeobject* %tmp147148, i64 0 ) ; <%struct.PyObject*> [#uses=3] + %tmp157 = icmp eq %struct.PyObject* %tmp155, null ; [#uses=1] + br i1 %tmp157, label %cond_true160, label %cond_next182 + +cond_true160: ; preds = %cond_next135 + %tmp162 = getelementptr %struct.PyObject* %tmp90, i32 0, i32 0 ; [#uses=2] + %tmp163 = load i64* %tmp162 ; [#uses=1] + %tmp164 = add i64 %tmp163, -1 ; [#uses=2] + store i64 %tmp164, i64* %tmp162 + %tmp170 = icmp eq i64 %tmp164, 0 ; [#uses=1] + br i1 %tmp170, label %cond_true173, label %UnifiedReturnBlock + +cond_true173: ; preds = %cond_true160 + %tmp175 = getelementptr %struct.PyObject* %tmp90, i32 0, i32 1 ; <%struct._typeobject**> [#uses=1] + %tmp176 = load %struct._typeobject** %tmp175 ; <%struct._typeobject*> [#uses=1] + %tmp177 = getelementptr %struct._typeobject* %tmp176, i32 0, i32 6 ; [#uses=1] + %tmp178 = load void (%struct.PyObject*)** %tmp177 ; [#uses=1] + call void %tmp178( %struct.PyObject* %tmp90 ) + ret %struct.PyObject* null + +cond_next182: ; preds = %cond_next135 + %tmp183184 = bitcast %struct.PyObject* %tmp155 to %struct.PyBoolScalarObject* ; <%struct.PyBoolScalarObject*> [#uses=1] + %tmp186 = getelementptr %struct.PyBoolScalarObject* %tmp183184, i32 0, i32 2 ; [#uses=1] + store i8 %out2.0, i8* %tmp186 + %tmp190 = getelementptr %struct.PyTupleObject* %tmp140141, i32 0, i32 3, i64 1 ; <%struct.PyObject**> [#uses=1] + store %struct.PyObject* %tmp155, %struct.PyObject** %tmp190 + ret %struct.PyObject* %tmp90 + +UnifiedReturnBlock: ; preds = %cond_true160, %cond_true113, %cond_next89, %cond_next73, %cond_true61, %bb17 + ret %struct.PyObject* null +} + +declare i32 @feraiseexcept(i32) + +declare fastcc i32 @_ubyte_convert_to_ctype(%struct.PyObject*, i8*) + +declare %struct.PyObject* @PyErr_Occurred() + +declare %struct.PyObject* @PyTuple_New(i64) Modified: llvm/trunk/test/CodeGen/X86/constant-pool-remat-0.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/constant-pool-remat-0.ll?rev=41061&r1=41060&r2=41061&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/constant-pool-remat-0.ll (original) +++ llvm/trunk/test/CodeGen/X86/constant-pool-remat-0.ll Mon Aug 13 18:54:16 2007 @@ -1,4 +1,5 @@ ; RUN: llvm-as < %s | llc -march=x86-64 | grep LCPI | wc -l | grep 3 +; RUN: llvm-as < %s | llc -march=x86 | grep LCPI | wc -l | grep 3 declare float @qux(float %y) From dpatel at apple.com Mon Aug 13 19:15:45 2007 From: dpatel at apple.com (Devang Patel) Date: Tue, 14 Aug 2007 00:15:45 -0000 Subject: [llvm-commits] [llvm] r41062 - /llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp Message-ID: <200708140015.l7E0FjL5011451@zion.cs.uiuc.edu> Author: dpatel Date: Mon Aug 13 19:15:45 2007 New Revision: 41062 URL: http://llvm.org/viewvc/llvm-project?rev=41062&view=rev Log: StartValue is already calculated. Modified: llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp Modified: llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp?rev=41062&r1=41061&r2=41062&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp Mon Aug 13 19:15:45 2007 @@ -421,7 +421,6 @@ BasicBlock *Preheader = L->getLoopPreheader(); Instruction *Terminator = Header->getTerminator(); - StartValue = IndVar->getIncomingValueForBlock(Preheader); // Replace split condition in header. // Transform From dpatel at apple.com Mon Aug 13 20:30:58 2007 From: dpatel at apple.com (Devang Patel) Date: Tue, 14 Aug 2007 01:30:58 -0000 Subject: [llvm-commits] [llvm] r41063 - /llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp Message-ID: <200708140130.l7E1Uwh4013777@zion.cs.uiuc.edu> Author: dpatel Date: Mon Aug 13 20:30:57 2007 New Revision: 41063 URL: http://llvm.org/viewvc/llvm-project?rev=41063&view=rev Log: Handle last value assignments. Modified: llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp Modified: llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp?rev=41063&r1=41062&r2=41063&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp Mon Aug 13 20:30:57 2007 @@ -419,8 +419,8 @@ } BR->setUnconditionalDest(LatchSucc); - BasicBlock *Preheader = L->getLoopPreheader(); Instruction *Terminator = Header->getTerminator(); + Value *ExitValue = ExitCondition->getOperand(ExitValueNum); // Replace split condition in header. // Transform @@ -436,8 +436,7 @@ Terminator); Instruction *C2 = new ICmpInst(SignedPredicate ? ICmpInst::ICMP_SLT : ICmpInst::ICMP_ULT, - SD.SplitValue, - ExitCondition->getOperand(ExitValueNum), "lisplit", + SD.SplitValue, ExitValue, "lisplit", Terminator); Instruction *NSplitCond = BinaryOperator::createAnd(C1, C2, "lisplit", Terminator); @@ -454,7 +453,10 @@ if (isa(I) || I == LTerminator) continue; - I->replaceAllUsesWith(UndefValue::get(I->getType())); + if (I == IndVarIncrement) + I->replaceAllUsesWith(ExitValue); + else + I->replaceAllUsesWith(UndefValue::get(I->getType())); I->eraseFromParent(); } @@ -485,7 +487,7 @@ BI != BE; ++BI) { Instruction *I = BI; - // PHI Nodes are OK. FIXME : Handle last value assignments. + // PHI Nodes are OK. if (isa(I)) continue; @@ -520,7 +522,7 @@ BI != BE; ++BI) { Instruction *I = BI; - // PHI Nodes are OK. FIXME : Handle last value assignments. + // PHI Nodes are OK. if (isa(I)) continue; @@ -686,23 +688,49 @@ assert (ExitInsn && "Unable to find suitable loop exit branch"); BasicBlock *ExitDest = ExitInsn->getSuccessor(1); + if (L->contains(ExitDest)) { + ExitDest = ExitInsn->getSuccessor(0); + ExitInsn->setSuccessor(0, FalseHeader); + } else + ExitInsn->setSuccessor(1, FalseHeader); + + // Collect inverse map of Header PHINodes. + DenseMap InverseMap; + for (BasicBlock::iterator BI = L->getHeader()->begin(), + BE = L->getHeader()->end(); BI != BE; ++BI) { + if (PHINode *PN = dyn_cast(BI)) { + PHINode *PNClone = cast(ValueMap[PN]); + InverseMap[PNClone] = PN; + } else + break; + } + + // Update False loop's header for (BasicBlock::iterator BI = FalseHeader->begin(), BE = FalseHeader->end(); BI != BE; ++BI) { if (PHINode *PN = dyn_cast(BI)) { PN->removeIncomingValue(Preheader); if (PN == IndVarClone) PN->addIncoming(FLStartValue, ExitBlock); - // else { FIXME : Handl last value assignments.} - } - else + else { + PHINode *OrigPN = cast(InverseMap[PN]); + Value *V2 = OrigPN->getIncomingValueForBlock(ExitBlock); + PN->addIncoming(V2, ExitBlock); + } + } else break; } - if (L->contains(ExitDest)) { - ExitDest = ExitInsn->getSuccessor(0); - ExitInsn->setSuccessor(0, FalseHeader); - } else - ExitInsn->setSuccessor(1, FalseHeader); + // Update ExitDest. Now it's predecessor is False loop's exit block. + BasicBlock *ExitBlockClone = cast(ValueMap[ExitBlock]); + for (BasicBlock::iterator BI = ExitDest->begin(), BE = ExitDest->end(); + BI != BE; ++BI) { + if (PHINode *PN = dyn_cast(BI)) { + PN->addIncoming(ValueMap[PN->getIncomingValueForBlock(ExitBlock)], ExitBlockClone); + PN->removeIncomingValue(ExitBlock); + } else + break; + } if (DT) { DT->changeImmediateDominator(FalseHeader, ExitBlock); From evan.cheng at apple.com Mon Aug 13 20:56:58 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 14 Aug 2007 01:56:58 -0000 Subject: [llvm-commits] [llvm] r41064 - in /llvm/trunk/lib/CodeGen: LiveInterval.cpp SimpleRegisterCoalescing.cpp Message-ID: <200708140156.l7E1uwHe014264@zion.cs.uiuc.edu> Author: evancheng Date: Mon Aug 13 20:56:58 2007 New Revision: 41064 URL: http://llvm.org/viewvc/llvm-project?rev=41064&view=rev Log: Kill info update bugs. Modified: llvm/trunk/lib/CodeGen/LiveInterval.cpp llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Modified: llvm/trunk/lib/CodeGen/LiveInterval.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveInterval.cpp?rev=41064&r1=41063&r2=41064&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/LiveInterval.cpp (original) +++ llvm/trunk/lib/CodeGen/LiveInterval.cpp Mon Aug 13 20:56:58 2007 @@ -109,6 +109,7 @@ void LiveInterval::extendIntervalEndTo(Ranges::iterator I, unsigned NewEnd) { assert(I != ranges.end() && "Not a valid interval!"); unsigned ValId = I->ValId; + unsigned OldEnd = I->end; // Search for the first interval that we can't merge with. Ranges::iterator MergeTo = next(I); @@ -123,7 +124,7 @@ ranges.erase(next(I), MergeTo); // Update kill info. - removeKillForValNum(ValId, I->start, I->end-1); + removeKillForValNum(ValId, OldEnd, I->end-1); // If the newly formed range now touches the range after it and if they have // the same value number, merge the two ranges into one range. Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp?rev=41064&r1=41063&r2=41064&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp (original) +++ llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Mon Aug 13 20:56:58 2007 @@ -559,8 +559,8 @@ // Okay, the final step is to loop over the RHS live intervals, adding them to // the LHS. - LHS.MergeRangesInAsValue(RHS, LHSValNo); LHS.addKillsForValNum(LHSValNo, VNI.kills); + LHS.MergeRangesInAsValue(RHS, LHSValNo); LHS.weight += RHS.weight; if (RHS.preference && !LHS.preference) LHS.preference = RHS.preference; From isanbard at gmail.com Tue Aug 14 00:29:27 2007 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 14 Aug 2007 05:29:27 -0000 Subject: [llvm-commits] [llvm-gcc-4.0] r41065 - /llvm-gcc-4.0/tags/llvm-gcc-1200-07/ Message-ID: <200708140529.l7E5TRhp023129@zion.cs.uiuc.edu> Author: void Date: Tue Aug 14 00:29:26 2007 New Revision: 41065 URL: http://llvm.org/viewvc/llvm-project?rev=41065&view=rev Log: Creating llvm-gcc-1200-07 branch Added: llvm-gcc-4.0/tags/llvm-gcc-1200-07/ - copied from r41064, llvm-gcc-4.0/trunk/ From isanbard at gmail.com Tue Aug 14 00:29:33 2007 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 14 Aug 2007 05:29:33 -0000 Subject: [llvm-commits] [llvm] r41066 - /llvm/tags/Apple/llvm-1200-07/ Message-ID: <200708140529.l7E5TXvJ023143@zion.cs.uiuc.edu> Author: void Date: Tue Aug 14 00:29:33 2007 New Revision: 41066 URL: http://llvm.org/viewvc/llvm-project?rev=41066&view=rev Log: Creating llvm-1200-07 branch Added: llvm/tags/Apple/llvm-1200-07/ - copied from r41065, llvm/trunk/ From evan.cheng at apple.com Tue Aug 14 00:42:54 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 14 Aug 2007 05:42:54 -0000 Subject: [llvm-commits] [llvm] r41067 - /llvm/trunk/lib/CodeGen/VirtRegMap.cpp Message-ID: <200708140542.l7E5gs0e023966@zion.cs.uiuc.edu> Author: evancheng Date: Tue Aug 14 00:42:54 2007 New Revision: 41067 URL: http://llvm.org/viewvc/llvm-project?rev=41067&view=rev Log: If a rematerializable def is not deleted, i.e. it is also spilled, check if the spilled value is available for reuse. Modified: llvm/trunk/lib/CodeGen/VirtRegMap.cpp Modified: llvm/trunk/lib/CodeGen/VirtRegMap.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/VirtRegMap.cpp?rev=41067&r1=41066&r2=41067&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/VirtRegMap.cpp (original) +++ llvm/trunk/lib/CodeGen/VirtRegMap.cpp Tue Aug 14 00:42:54 2007 @@ -744,10 +744,19 @@ bool DoReMat = VRM.isReMaterialized(VirtReg); int SSorRMId = DoReMat ? VRM.getReMatId(VirtReg) : VRM.getStackSlot(VirtReg); - unsigned PhysReg; + int ReuseSlot = SSorRMId; // Check to see if this stack slot is available. - if ((PhysReg = Spills.getSpillSlotOrReMatPhysReg(SSorRMId))) { + unsigned PhysReg = Spills.getSpillSlotOrReMatPhysReg(SSorRMId); + if (!PhysReg && DoReMat) { + // This use is rematerializable. But perhaps the value is available in + // stack if the definition is not deleted. If so, check if we can + // reuse the value. + ReuseSlot = VRM.getStackSlot(VirtReg); + if (ReuseSlot != VirtRegMap::NO_STACK_SLOT) + PhysReg = Spills.getSpillSlotOrReMatPhysReg(ReuseSlot); + } + if (PhysReg) { // This spilled operand might be part of a two-address operand. If this // is the case, then changing it will necessarily require changing the // def part of the instruction as well. However, in some cases, we @@ -761,16 +770,16 @@ // Okay, we have a two address operand. We can reuse this physreg as // long as we are allowed to clobber the value and there isn't an // earlier def that has already clobbered the physreg. - CanReuse = Spills.canClobberPhysReg(SSorRMId) && + CanReuse = Spills.canClobberPhysReg(ReuseSlot) && !ReusedOperands.isClobbered(PhysReg); } if (CanReuse) { // If this stack slot value is already available, reuse it! - if (SSorRMId > VirtRegMap::MAX_STACK_SLOT) - DOUT << "Reusing RM#" << SSorRMId-VirtRegMap::MAX_STACK_SLOT-1; + if (ReuseSlot > VirtRegMap::MAX_STACK_SLOT) + DOUT << "Reusing RM#" << ReuseSlot-VirtRegMap::MAX_STACK_SLOT-1; else - DOUT << "Reusing SS#" << SSorRMId; + DOUT << "Reusing SS#" << ReuseSlot; DOUT << " from physreg " << MRI->getName(PhysReg) << " for vreg" << VirtReg <<" instead of reloading into physreg " @@ -791,7 +800,7 @@ // or R0 and R1 might not be compatible with each other. In this // case, we actually insert a reload for V1 in R1, ensuring that // we can get at R0 or its alias. - ReusedOperands.addReuse(i, SSorRMId, PhysReg, + ReusedOperands.addReuse(i, ReuseSlot, PhysReg, VRM.getPhys(VirtReg), VirtReg); if (ti != -1) // Only mark it clobbered if this is a use&def operand. @@ -825,10 +834,10 @@ // incoming, we don't need to inserted a dead copy. if (DesignatedReg == PhysReg) { // If this stack slot value is already available, reuse it! - if (SSorRMId > VirtRegMap::MAX_STACK_SLOT) - DOUT << "Reusing RM#" << SSorRMId-VirtRegMap::MAX_STACK_SLOT-1; + if (ReuseSlot > VirtRegMap::MAX_STACK_SLOT) + DOUT << "Reusing RM#" << ReuseSlot-VirtRegMap::MAX_STACK_SLOT-1; else - DOUT << "Reusing SS#" << SSorRMId; + DOUT << "Reusing SS#" << ReuseSlot; DOUT << " from physreg " << MRI->getName(PhysReg) << " for vreg" << VirtReg << " instead of reloading into same physreg.\n"; @@ -849,7 +858,7 @@ // This invalidates DesignatedReg. Spills.ClobberPhysReg(DesignatedReg); - Spills.addAvailable(SSorRMId, &MI, DesignatedReg); + Spills.addAvailable(ReuseSlot, &MI, DesignatedReg); MI.getOperand(i).setReg(DesignatedReg); DOUT << '\t' << *prior(MII); ++NumReused; From evan.cheng at apple.com Tue Aug 14 00:51:03 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 14 Aug 2007 05:51:03 -0000 Subject: [llvm-commits] [llvm] r41068 - /llvm/trunk/test/CodeGen/X86/2007-08-13-SpillerReuse.ll Message-ID: <200708140551.l7E5p38a024547@zion.cs.uiuc.edu> Author: evancheng Date: Tue Aug 14 00:51:03 2007 New Revision: 41068 URL: http://llvm.org/viewvc/llvm-project?rev=41068&view=rev Log: Spiller reuse test case. Added: llvm/trunk/test/CodeGen/X86/2007-08-13-SpillerReuse.ll Added: llvm/trunk/test/CodeGen/X86/2007-08-13-SpillerReuse.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-08-13-SpillerReuse.ll?rev=41068&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/X86/2007-08-13-SpillerReuse.ll (added) +++ llvm/trunk/test/CodeGen/X86/2007-08-13-SpillerReuse.ll Tue Aug 14 00:51:03 2007 @@ -0,0 +1,102 @@ +; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin | grep "48(%esp)" | wc -l | grep 5 + + %struct..0anon = type { i32 } + %struct.rtvec_def = type { i32, [1 x %struct..0anon] } + %struct.rtx_def = type { i16, i8, i8, [1 x %struct..0anon] } + at rtx_format = external global [116 x i8*] ; <[116 x i8*]*> [#uses=1] + at rtx_length = external global [117 x i32] ; <[117 x i32]*> [#uses=1] + +declare fastcc %struct.rtx_def* @fixup_memory_subreg(%struct.rtx_def*, %struct.rtx_def*, i32) + +define fastcc %struct.rtx_def* @walk_fixup_memory_subreg(%struct.rtx_def* %x, %struct.rtx_def* %insn) { +entry: + %tmp2 = icmp eq %struct.rtx_def* %x, null ; [#uses=1] + br i1 %tmp2, label %UnifiedReturnBlock, label %cond_next + +cond_next: ; preds = %entry + %tmp6 = getelementptr %struct.rtx_def* %x, i32 0, i32 0 ; [#uses=1] + %tmp7 = load i16* %tmp6 ; [#uses=2] + %tmp78 = zext i16 %tmp7 to i32 ; [#uses=2] + %tmp10 = icmp eq i16 %tmp7, 54 ; [#uses=1] + br i1 %tmp10, label %cond_true13, label %cond_next32 + +cond_true13: ; preds = %cond_next + %tmp15 = getelementptr %struct.rtx_def* %x, i32 0, i32 3 ; <[1 x %struct..0anon]*> [#uses=1] + %tmp1718 = bitcast [1 x %struct..0anon]* %tmp15 to %struct.rtx_def** ; <%struct.rtx_def**> [#uses=1] + %tmp19 = load %struct.rtx_def** %tmp1718 ; <%struct.rtx_def*> [#uses=1] + %tmp20 = getelementptr %struct.rtx_def* %tmp19, i32 0, i32 0 ; [#uses=1] + %tmp21 = load i16* %tmp20 ; [#uses=1] + %tmp22 = icmp eq i16 %tmp21, 57 ; [#uses=1] + br i1 %tmp22, label %cond_true25, label %cond_next32 + +cond_true25: ; preds = %cond_true13 + %tmp29 = tail call fastcc %struct.rtx_def* @fixup_memory_subreg( %struct.rtx_def* %x, %struct.rtx_def* %insn, i32 1 ) ; <%struct.rtx_def*> [#uses=1] + ret %struct.rtx_def* %tmp29 + +cond_next32: ; preds = %cond_true13, %cond_next + %tmp34 = getelementptr [116 x i8*]* @rtx_format, i32 0, i32 %tmp78 ; [#uses=1] + %tmp35 = load i8** %tmp34, align 4 ; [#uses=1] + %tmp37 = getelementptr [117 x i32]* @rtx_length, i32 0, i32 %tmp78 ; [#uses=1] + %tmp38 = load i32* %tmp37, align 4 ; [#uses=1] + %i.011 = add i32 %tmp38, -1 ; [#uses=2] + %tmp12513 = icmp sgt i32 %i.011, -1 ; [#uses=1] + br i1 %tmp12513, label %bb, label %UnifiedReturnBlock + +bb: ; preds = %bb123, %cond_next32 + %indvar = phi i32 [ %indvar.next26, %bb123 ], [ 0, %cond_next32 ] ; [#uses=2] + %i.01.0 = sub i32 %i.011, %indvar ; [#uses=5] + %tmp42 = getelementptr i8* %tmp35, i32 %i.01.0 ; [#uses=2] + %tmp43 = load i8* %tmp42 ; [#uses=1] + switch i8 %tmp43, label %bb123 [ + i8 101, label %cond_true47 + i8 69, label %bb105.preheader + ] + +cond_true47: ; preds = %bb + %tmp52 = getelementptr %struct.rtx_def* %x, i32 0, i32 3, i32 %i.01.0 ; <%struct..0anon*> [#uses=1] + %tmp5354 = bitcast %struct..0anon* %tmp52 to %struct.rtx_def** ; <%struct.rtx_def**> [#uses=1] + %tmp55 = load %struct.rtx_def** %tmp5354 ; <%struct.rtx_def*> [#uses=1] + %tmp58 = tail call fastcc %struct.rtx_def* @walk_fixup_memory_subreg( %struct.rtx_def* %tmp55, %struct.rtx_def* %insn ) ; <%struct.rtx_def*> [#uses=1] + %tmp62 = getelementptr %struct.rtx_def* %x, i32 0, i32 3, i32 %i.01.0, i32 0 ; [#uses=1] + %tmp58.c = ptrtoint %struct.rtx_def* %tmp58 to i32 ; [#uses=1] + store i32 %tmp58.c, i32* %tmp62 + %tmp6816 = load i8* %tmp42 ; [#uses=1] + %tmp6917 = icmp eq i8 %tmp6816, 69 ; [#uses=1] + br i1 %tmp6917, label %bb105.preheader, label %bb123 + +bb105.preheader: ; preds = %cond_true47, %bb + %tmp11020 = getelementptr %struct.rtx_def* %x, i32 0, i32 3, i32 %i.01.0 ; <%struct..0anon*> [#uses=1] + %tmp11111221 = bitcast %struct..0anon* %tmp11020 to %struct.rtvec_def** ; <%struct.rtvec_def**> [#uses=3] + %tmp11322 = load %struct.rtvec_def** %tmp11111221 ; <%struct.rtvec_def*> [#uses=1] + %tmp11423 = getelementptr %struct.rtvec_def* %tmp11322, i32 0, i32 0 ; [#uses=1] + %tmp11524 = load i32* %tmp11423 ; [#uses=1] + %tmp11625 = icmp eq i32 %tmp11524, 0 ; [#uses=1] + br i1 %tmp11625, label %bb123, label %bb73 + +bb73: ; preds = %bb73, %bb105.preheader + %j.019 = phi i32 [ %tmp104, %bb73 ], [ 0, %bb105.preheader ] ; [#uses=3] + %tmp81 = load %struct.rtvec_def** %tmp11111221 ; <%struct.rtvec_def*> [#uses=2] + %tmp92 = getelementptr %struct.rtvec_def* %tmp81, i32 0, i32 1, i32 %j.019 ; <%struct..0anon*> [#uses=1] + %tmp9394 = bitcast %struct..0anon* %tmp92 to %struct.rtx_def** ; <%struct.rtx_def**> [#uses=1] + %tmp95 = load %struct.rtx_def** %tmp9394 ; <%struct.rtx_def*> [#uses=1] + %tmp98 = tail call fastcc %struct.rtx_def* @walk_fixup_memory_subreg( %struct.rtx_def* %tmp95, %struct.rtx_def* %insn ) ; <%struct.rtx_def*> [#uses=1] + %tmp101 = getelementptr %struct.rtvec_def* %tmp81, i32 0, i32 1, i32 %j.019, i32 0 ; [#uses=1] + %tmp98.c = ptrtoint %struct.rtx_def* %tmp98 to i32 ; [#uses=1] + store i32 %tmp98.c, i32* %tmp101 + %tmp104 = add i32 %j.019, 1 ; [#uses=2] + %tmp113 = load %struct.rtvec_def** %tmp11111221 ; <%struct.rtvec_def*> [#uses=1] + %tmp114 = getelementptr %struct.rtvec_def* %tmp113, i32 0, i32 0 ; [#uses=1] + %tmp115 = load i32* %tmp114 ; [#uses=1] + %tmp116 = icmp ult i32 %tmp104, %tmp115 ; [#uses=1] + br i1 %tmp116, label %bb73, label %bb123 + +bb123: ; preds = %bb73, %bb105.preheader, %cond_true47, %bb + %i.0 = add i32 %i.01.0, -1 ; [#uses=1] + %tmp125 = icmp sgt i32 %i.0, -1 ; [#uses=1] + %indvar.next26 = add i32 %indvar, 1 ; [#uses=1] + br i1 %tmp125, label %bb, label %UnifiedReturnBlock + +UnifiedReturnBlock: ; preds = %bb123, %cond_next32, %entry + %UnifiedRetVal = phi %struct.rtx_def* [ null, %entry ], [ %x, %cond_next32 ], [ %x, %bb123 ] ; <%struct.rtx_def*> [#uses=1] + ret %struct.rtx_def* %UnifiedRetVal +} From fbrandne at mail.tuwien.ac.at Tue Aug 14 01:56:21 2007 From: fbrandne at mail.tuwien.ac.at (Florian Brandner) Date: Tue, 14 Aug 2007 08:56:21 +0200 Subject: [llvm-commits] inline assembly operand type MEMUSE Message-ID: <46C15215.2030408@mail.tuwien.ac.at> hi, i've added a new type of inline assembly operands called MEMUSE, for 'm' constraints that only read from memory. in addition, i created an enum - InlineAsmFlags - of all possible operand types (REGUSE, REGDEF, IMMUSE. MEMUSE, MEMDEF) and two global constants InlineAsmMask and InlineAsmShift to extract these flags and the machine operand count. i've tested it on a llvm 2.0 based private backend and a test application with lots of inline assembly. i did not test llvm-trunk very carefully because of lacking applications that use inline assembly - my handcrafted test cases work though. florian -------------- next part -------------- A non-text attachment was scrubbed... Name: inlineasm_memuse.patch Type: text/x-patch Size: 12288 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20070814/662a8f71/attachment.bin From evan.cheng at apple.com Tue Aug 14 04:16:01 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 14 Aug 2007 09:16:01 -0000 Subject: [llvm-commits] [llvm] r41070 - /llvm/trunk/test/CodeGen/X86/constant-pool-remat-0.ll Message-ID: <200708140916.l7E9G1G6008590@zion.cs.uiuc.edu> Author: evancheng Date: Tue Aug 14 04:16:00 2007 New Revision: 41070 URL: http://llvm.org/viewvc/llvm-project?rev=41070&view=rev Log: Update test case. A spill should now be deleted. Modified: llvm/trunk/test/CodeGen/X86/constant-pool-remat-0.ll Modified: llvm/trunk/test/CodeGen/X86/constant-pool-remat-0.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/constant-pool-remat-0.ll?rev=41070&r1=41069&r2=41070&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/constant-pool-remat-0.ll (original) +++ llvm/trunk/test/CodeGen/X86/constant-pool-remat-0.ll Tue Aug 14 04:16:00 2007 @@ -1,5 +1,6 @@ ; RUN: llvm-as < %s | llc -march=x86-64 | grep LCPI | wc -l | grep 3 -; RUN: llvm-as < %s | llc -march=x86 | grep LCPI | wc -l | grep 3 +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep LCPI | wc -l | grep 3 +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -stats |& | grep asm-printer | grep 13 declare float @qux(float %y) From evan.cheng at apple.com Tue Aug 14 04:11:19 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 14 Aug 2007 09:11:19 -0000 Subject: [llvm-commits] [llvm] r41069 - /llvm/trunk/lib/CodeGen/VirtRegMap.cpp Message-ID: <200708140911.l7E9BJte008456@zion.cs.uiuc.edu> Author: evancheng Date: Tue Aug 14 04:11:18 2007 New Revision: 41069 URL: http://llvm.org/viewvc/llvm-project?rev=41069&view=rev Log: If a spilled value is being reused and the use is a kill, that means there are no more uses within the MBB and the spilled value isn't live out of the MBB. Then it's safe to delete the spill store. Modified: llvm/trunk/lib/CodeGen/VirtRegMap.cpp Modified: llvm/trunk/lib/CodeGen/VirtRegMap.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/VirtRegMap.cpp?rev=41069&r1=41068&r2=41069&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/VirtRegMap.cpp (original) +++ llvm/trunk/lib/CodeGen/VirtRegMap.cpp Tue Aug 14 04:11:18 2007 @@ -554,7 +554,7 @@ /// a new register to use, or evict the previous reload and use this reg. unsigned GetRegForReload(unsigned PhysReg, MachineInstr *MI, AvailableSpills &Spills, - std::map &MaybeDeadStores, + std::vector &MaybeDeadStores, SmallSet &Rejected, BitVector &RegKills, std::vector &KillOps, @@ -609,14 +609,13 @@ } else { MRI->loadRegFromStackSlot(*MBB, MI, NewPhysReg, NewOp.StackSlotOrReMat, AliasRC); + // Any stores to this stack slot are not dead anymore. + MaybeDeadStores[NewOp.StackSlotOrReMat] = NULL; ++NumLoads; } Spills.ClobberPhysReg(NewPhysReg); Spills.ClobberPhysReg(NewOp.PhysRegReused); - // Any stores to this stack slot are not dead anymore. - MaybeDeadStores.erase(NewOp.StackSlotOrReMat); - MI->getOperand(NewOp.Operand).setReg(NewPhysReg); Spills.addAvailable(NewOp.StackSlotOrReMat, MI, NewPhysReg); @@ -649,7 +648,7 @@ /// sees r1 is taken by t2, tries t2's reload register r0 ... unsigned GetRegForReload(unsigned PhysReg, MachineInstr *MI, AvailableSpills &Spills, - std::map &MaybeDeadStores, + std::vector &MaybeDeadStores, BitVector &RegKills, std::vector &KillOps, VirtRegMap &VRM) { @@ -666,6 +665,8 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM) { DOUT << MBB.getBasicBlock()->getName() << ":\n"; + MachineFunction &MF = *MBB.getParent(); + // Spills - Keep track of which spilled values are available in physregs so // that we can choose to reuse the physregs instead of emitting reloads. AvailableSpills Spills(MRI, TII); @@ -676,14 +677,14 @@ // subsequently stored to, the original store is dead. This map keeps track // of inserted stores that are not used. If we see a subsequent store to the // same stack slot, the original store is deleted. - std::map MaybeDeadStores; + std::vector MaybeDeadStores; + MaybeDeadStores.resize(MF.getFrameInfo()->getObjectIndexEnd(), NULL); // Keep track of kill information. BitVector RegKills(MRI->getNumRegs()); std::vector KillOps; KillOps.resize(MRI->getNumRegs(), NULL); - MachineFunction &MF = *MBB.getParent(); for (MachineBasicBlock::iterator MII = MBB.begin(), E = MBB.end(); MII != E; ) { MachineInstr &MI = *MII; @@ -806,6 +807,21 @@ // Only mark it clobbered if this is a use&def operand. ReusedOperands.markClobbered(PhysReg); ++NumReused; + + if (MI.getOperand(i).isKill() && + ReuseSlot <= VirtRegMap::MAX_STACK_SLOT) { + // This was the last use and the spilled value is still available + // for reuse. That means the spill was unnecessary! + MachineInstr* DeadStore = MaybeDeadStores[ReuseSlot]; + if (DeadStore) { + DOUT << "Removed dead store:\t" << *DeadStore; + InvalidateKills(*DeadStore, RegKills, KillOps); + MBB.erase(DeadStore); + VRM.RemoveFromFoldedVirtMap(DeadStore); + MaybeDeadStores[ReuseSlot] = NULL; + ++NumDSE; + } + } continue; } @@ -892,7 +908,7 @@ // Any stores to this stack slot are not dead anymore. if (!DoReMat) - MaybeDeadStores.erase(SSorRMId); + MaybeDeadStores[SSorRMId] = NULL; Spills.addAvailable(SSorRMId, &MI, PhysReg); // Assumes this is the last use. IsKill will be unset if reg is reused // unless it's a two-address operand. @@ -953,20 +969,18 @@ // If this reference is not a use, any previous store is now dead. // Otherwise, the store to this stack slot is not dead anymore. - std::map::iterator MDSI = MaybeDeadStores.find(SS); - if (MDSI != MaybeDeadStores.end()) { - if (MR & VirtRegMap::isRef) // Previous store is not dead. - MaybeDeadStores.erase(MDSI); - else { + MachineInstr* DeadStore = MaybeDeadStores[SS]; + if (DeadStore) { + if (!(MR & VirtRegMap::isRef)) { // Previous store is dead. // If we get here, the store is dead, nuke it now. assert(VirtRegMap::isMod && "Can't be modref!"); - DOUT << "Removed dead store:\t" << *MDSI->second; - InvalidateKills(*MDSI->second, RegKills, KillOps); - MBB.erase(MDSI->second); - VRM.RemoveFromFoldedVirtMap(MDSI->second); - MaybeDeadStores.erase(MDSI); + DOUT << "Removed dead store:\t" << *DeadStore; + InvalidateKills(*DeadStore, RegKills, KillOps); + MBB.erase(DeadStore); + VRM.RemoveFromFoldedVirtMap(DeadStore); ++NumDSE; } + MaybeDeadStores[SS] = NULL; } // If the spill slot value is available, and this is a new definition of From sabre at nondot.org Tue Aug 14 10:45:40 2007 From: sabre at nondot.org (Chris Lattner) Date: Tue, 14 Aug 2007 15:45:40 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r41071 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Message-ID: <200708141545.l7EFjexP023670@zion.cs.uiuc.edu> Author: lattner Date: Tue Aug 14 10:45:39 2007 New Revision: 41071 URL: http://llvm.org/viewvc/llvm-project?rev=41071&view=rev Log: When building casts, constant fold with ConstantFoldInstruction instead of ConstantExpr::getCast. This allows target-data driven constant folding to happen. In the testcase from PR1602, for example, this results in: %tmp26 = sub i32 %tmp232425, 1 instead of: %tmp26 = sub i32 %tmp232425, ptrtoint (i32 (...)** inttoptr (i64 1 to i32 (...)**) to i32) Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=41071&r1=41070&r2=41071&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Tue Aug 14 10:45:39 2007 @@ -34,6 +34,7 @@ #include "llvm/InlineAsm.h" #include "llvm/Instructions.h" #include "llvm/Module.h" +#include "llvm/Analysis/ConstantFolding.h" #include "llvm/Target/TargetAsmInfo.h" #include "llvm/Target/TargetData.h" #include "llvm/Target/TargetMachine.h" @@ -1045,16 +1046,26 @@ if (V->getType() == Ty) return V; + // If this is a simple constant operand, fold it now. If it is a constant + // expr operand, fold it below. if (Constant *C = dyn_cast(V)) - return ConstantExpr::getCast(Instruction::CastOps(opcode), C, Ty); + if (!isa(C)) + return ConstantExpr::getCast(Instruction::CastOps(opcode), C, Ty); // Handle 'trunc (zext i1 X to T2) to i1' as X, because this occurs all over // the place. if (ZExtInst *CI = dyn_cast(V)) if (Ty == Type::Int1Ty && CI->getOperand(0)->getType() == Type::Int1Ty) return CI->getOperand(0); - return Builder.CreateCast(Instruction::CastOps(opcode), V, Ty, - V->getName().c_str()); + Value *Result = Builder.CreateCast(Instruction::CastOps(opcode), V, Ty, + V->getNameStart()); + + // If this is a constantexpr, fold the instruction with + // ConstantFoldInstruction to allow TargetData-driven folding to occur. + if (isa(V)) + Result = ConstantFoldInstruction(cast(Result), &TD); + + return Result; } /// CastToAnyType - Cast the specified value to the specified type making no From clattner at apple.com Tue Aug 14 10:49:32 2007 From: clattner at apple.com (Chris Lattner) Date: Tue, 14 Aug 2007 08:49:32 -0700 Subject: [llvm-commits] [llvm] r41052 - in /llvm/trunk: include/llvm/Analysis/Dominators.h lib/VMCore/Dominators.cpp In-Reply-To: <200708132210.l7DMAThw006038@zion.cs.uiuc.edu> References: <200708132210.l7DMAThw006038@zion.cs.uiuc.edu> Message-ID: > URL: http://llvm.org/viewvc/llvm-project?rev=41052&view=rev > Log: > Add methods to erase basic block entry. > > + /// removeBlock - Remove basic block BB's frontier. > + void removeBlock(BasicBlock *BB) { > + assert(find(BB) != end() && "Block is not in > DominanceFrontier!"); > + iterator BBDF = Frontiers.find(BB); > + Frontiers.erase(BBDF); This can just do: Frontiers.erase(BB); > > +/// eraseNode - Removes a node from the domiantor tree. Block > must not domiantor -> dominator > +/// domiante any other blocks. Removes node from its immediate > dominator's domiante -> dominate > +/// children list. Deletes dominator node associated with basic > block BB. > +void DominatorTreeBase::eraseNode(BasicBlock *BB) { Since this can only remove leaf nodes (no children in the domtree) would it make sense to name this eraseLeafNode? > + DomTreeNode *Node = getNode(BB); > + assert (Node && "Removing node that isn't in dominator tree."); > + > + // Remove node from immediate dominator's children list. > + DomTreeNode *IDom = Node->getIDom(); > + if (IDom) { > + std::vector::iterator I = > + std::find(IDom->Children.begin(), IDom->Children.end(), Node); > + assert(I != IDom->Children.end() && > + "Not in immediate dominator children set!"); > + // I am no longer your child... > + IDom->Children.erase(I); > + } > + > + assert (Node->getChildren().empty() && "Children list is not > empty"); Please move this assertion up to the top, say "Node is not a leaf" or something. Thanks Devang, -Chris From sabre at nondot.org Tue Aug 14 11:14:12 2007 From: sabre at nondot.org (Chris Lattner) Date: Tue, 14 Aug 2007 16:14:12 -0000 Subject: [llvm-commits] [llvm] r41072 - /llvm/trunk/test/CodeGen/X86/constant-pool-remat-0.ll Message-ID: <200708141614.l7EGEDTD024873@zion.cs.uiuc.edu> Author: lattner Date: Tue Aug 14 11:14:10 2007 New Revision: 41072 URL: http://llvm.org/viewvc/llvm-project?rev=41072&view=rev Log: switch this to use fastcc to avoid fpstack traffic on x86-32. Switch to using the count script instead of wc -l Modified: llvm/trunk/test/CodeGen/X86/constant-pool-remat-0.ll Modified: llvm/trunk/test/CodeGen/X86/constant-pool-remat-0.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/constant-pool-remat-0.ll?rev=41072&r1=41071&r2=41072&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/constant-pool-remat-0.ll (original) +++ llvm/trunk/test/CodeGen/X86/constant-pool-remat-0.ll Tue Aug 14 11:14:10 2007 @@ -1,12 +1,12 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep LCPI | wc -l | grep 3 -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep LCPI | wc -l | grep 3 +; RUN: llvm-as < %s | llc -march=x86-64 | grep LCPI | count 3 +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep LCPI | count 3 ; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -stats |& | grep asm-printer | grep 13 -declare float @qux(float %y) +declare fastcc float @qux(float %y) -define float @array(float %a) { +define fastcc float @array(float %a) { %n = mul float %a, 9.0 - %m = call float @qux(float %n) + %m = call fastcc float @qux(float %n) %o = mul float %m, 9.0 ret float %o } From sabre at nondot.org Tue Aug 14 11:19:36 2007 From: sabre at nondot.org (Chris Lattner) Date: Tue, 14 Aug 2007 16:19:36 -0000 Subject: [llvm-commits] [llvm] r41073 - /llvm/trunk/test/CodeGen/X86/constant-pool-remat-0.ll Message-ID: <200708141619.l7EGJaA9025176@zion.cs.uiuc.edu> Author: lattner Date: Tue Aug 14 11:19:35 2007 New Revision: 41073 URL: http://llvm.org/viewvc/llvm-project?rev=41073&view=rev Log: tcl seems to hate |& for some reason. Modified: llvm/trunk/test/CodeGen/X86/constant-pool-remat-0.ll Modified: llvm/trunk/test/CodeGen/X86/constant-pool-remat-0.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/constant-pool-remat-0.ll?rev=41073&r1=41072&r2=41073&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/constant-pool-remat-0.ll (original) +++ llvm/trunk/test/CodeGen/X86/constant-pool-remat-0.ll Tue Aug 14 11:19:35 2007 @@ -1,6 +1,6 @@ ; RUN: llvm-as < %s | llc -march=x86-64 | grep LCPI | count 3 ; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep LCPI | count 3 -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -stats |& | grep asm-printer | grep 13 +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -stats -info-output-file - | grep asm-printer | grep 9 declare fastcc float @qux(float %y) From clattner at apple.com Tue Aug 14 11:22:34 2007 From: clattner at apple.com (Chris Lattner) Date: Tue, 14 Aug 2007 09:22:34 -0700 Subject: [llvm-commits] [llvm] r41070 - /llvm/trunk/test/CodeGen/X86/constant-pool-remat-0.ll In-Reply-To: <200708140916.l7E9G1G6008590@zion.cs.uiuc.edu> References: <200708140916.l7E9G1G6008590@zion.cs.uiuc.edu> Message-ID: <0B1978D5-28E1-4AE8-B7F6-CDB40E6A3601@apple.com> On Aug 14, 2007, at 2:16 AM, Evan Cheng wrote: > Author: evancheng > Date: Tue Aug 14 04:16:00 2007 > New Revision: 41070 > > URL: http://llvm.org/viewvc/llvm-project?rev=41070&view=rev > Log: > Update test case. A spill should now be deleted. > > Modified: > llvm/trunk/test/CodeGen/X86/constant-pool-remat-0.ll Nice. I tweaked it to avoid the fpstack stuff on x86-32. I'm now getting: x86-32: _array: subl $12, %esp movss LCPI1_0, %xmm0 mulss 16(%esp), %xmm0 movss %xmm0, (%esp) call L_qux$stub movss LCPI1_0, %xmm1 mulss %xmm1, %xmm0 addl $12, %esp ret x86-64: _array: subq $8, %rsp movss LCPI1_0(%rip), %xmm1 mulss %xmm1, %xmm0 call _qux movss LCPI1_0(%rip), %xmm1 mulss %xmm1, %xmm0 addq $8, %rsp ret Both look great, but we should still fold the remat load into the muls :) -Chris From clattner at apple.com Tue Aug 14 11:37:00 2007 From: clattner at apple.com (Chris Lattner) Date: Tue, 14 Aug 2007 09:37:00 -0700 Subject: [llvm-commits] [llvm] r41070 - /llvm/trunk/test/CodeGen/X86/constant-pool-remat-0.ll In-Reply-To: <0B1978D5-28E1-4AE8-B7F6-CDB40E6A3601@apple.com> References: <200708140916.l7E9G1G6008590@zion.cs.uiuc.edu> <0B1978D5-28E1-4AE8-B7F6-CDB40E6A3601@apple.com> Message-ID: <60496E76-5979-4ADA-B080-5CED816CEF39@apple.com> On Aug 14, 2007, at 9:22 AM, Chris Lattner wrote: > > On Aug 14, 2007, at 2:16 AM, Evan Cheng wrote: > >> Author: evancheng >> Date: Tue Aug 14 04:16:00 2007 >> New Revision: 41070 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=41070&view=rev >> Log: >> Update test case. A spill should now be deleted. >> >> Modified: >> llvm/trunk/test/CodeGen/X86/constant-pool-remat-0.ll > > Nice. I tweaked it to avoid the fpstack stuff on x86-32. I'm now > getting: More food for thought :). I tried this out on PPC and got the following code: _array: mflr r0 stw r0, 8(r1) stwu r1, -64(r1) AAA stfd f14, 56(r1) lis r2, ha16(LCPI1_0) BBB lfs f14, lo16(LCPI1_0)(r2) fmuls f1, f1, f14 bl L_qux$stub fmuls f1, f1, f14 AAA lfd f14, 56(r1) addi r1, r1, 64 lwz r0, 8(r1) mtlr r0 blr On PPC, this isn't a simple remat case, because the lfs instruction uses r2 (BBB) (the same occurs on ARM, and it is a simple remat case there). However, the thing I find interesting about this is that remat'ing the load from the constant pool would avoid having to save/ restore the callee save register f14 (BBB). I don't know how common this is, but I expect the same could happen on x86 with callee-save GPRs as well. It seems tricky to handle well though. -Chris From dpatel at apple.com Tue Aug 14 11:53:25 2007 From: dpatel at apple.com (Devang Patel) Date: Tue, 14 Aug 2007 16:53:25 -0000 Subject: [llvm-commits] [llvm] r41074 - /llvm/trunk/include/llvm/Analysis/Dominators.h Message-ID: <200708141653.l7EGrPUo026726@zion.cs.uiuc.edu> Author: dpatel Date: Tue Aug 14 11:53:24 2007 New Revision: 41074 URL: http://llvm.org/viewvc/llvm-project?rev=41074&view=rev Log: No need to use iterator to erase basic block. Modified: llvm/trunk/include/llvm/Analysis/Dominators.h Modified: llvm/trunk/include/llvm/Analysis/Dominators.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/Dominators.h?rev=41074&r1=41073&r2=41074&view=diff ============================================================================== --- llvm/trunk/include/llvm/Analysis/Dominators.h (original) +++ llvm/trunk/include/llvm/Analysis/Dominators.h Tue Aug 14 11:53:24 2007 @@ -253,7 +253,7 @@ changeImmediateDominator(getNode(BB), getNode(NewBB)); } - /// eraseNode - Removes a node from the domiantor tree. Block must not + /// eraseNode - Removes a node from the dominator tree. Block must not /// domiante any other blocks. Removes node from its immediate dominator's /// children list. Deletes dominator node associated with basic block BB. void eraseNode(BasicBlock *BB); @@ -378,8 +378,10 @@ /// removeBlock - Remove basic block BB's frontier. void removeBlock(BasicBlock *BB) { assert(find(BB) != end() && "Block is not in DominanceFrontier!"); - iterator BBDF = Frontiers.find(BB); - Frontiers.erase(BBDF); + for (iterator I = begin(), E = end(); I != E; ++I) + if (I->second.count(BB)) + I->second.erase(BB); + Frontiers.erase(BB); } void addToFrontier(iterator I, BasicBlock *Node) { From dpatel at apple.com Tue Aug 14 11:53:52 2007 From: dpatel at apple.com (Devang Patel) Date: Tue, 14 Aug 2007 16:53:52 -0000 Subject: [llvm-commits] [llvm] r41075 - /llvm/trunk/lib/VMCore/Dominators.cpp Message-ID: <200708141653.l7EGrrw2026775@zion.cs.uiuc.edu> Author: dpatel Date: Tue Aug 14 11:53:52 2007 New Revision: 41075 URL: http://llvm.org/viewvc/llvm-project?rev=41075&view=rev Log: Assert sooner. Fix wordings. Modified: llvm/trunk/lib/VMCore/Dominators.cpp Modified: llvm/trunk/lib/VMCore/Dominators.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Dominators.cpp?rev=41075&r1=41074&r2=41075&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Dominators.cpp (original) +++ llvm/trunk/lib/VMCore/Dominators.cpp Tue Aug 14 11:53:52 2007 @@ -565,7 +565,8 @@ void DominatorTreeBase::eraseNode(BasicBlock *BB) { DomTreeNode *Node = getNode(BB); assert (Node && "Removing node that isn't in dominator tree."); - + assert (Node->getChildren().empty() && "Node is not a leaf node."); + // Remove node from immediate dominator's children list. DomTreeNode *IDom = Node->getIDom(); if (IDom) { @@ -577,8 +578,6 @@ IDom->Children.erase(I); } - assert (Node->getChildren().empty() && "Children list is not empty"); - DomTreeNodes.erase(BB); delete Node; } From resistor at mac.com Tue Aug 14 12:59:48 2007 From: resistor at mac.com (Owen Anderson) Date: Tue, 14 Aug 2007 17:59:48 -0000 Subject: [llvm-commits] [llvm] r41077 - /llvm/trunk/lib/Transforms/Scalar/GVN.cpp Message-ID: <200708141759.l7EHxndR029152@zion.cs.uiuc.edu> Author: resistor Date: Tue Aug 14 12:59:48 2007 New Revision: 41077 URL: http://llvm.org/viewvc/llvm-project?rev=41077&view=rev Log: Fix a case where GVN was failing to return true when it had, in fact, modified the function. Modified: llvm/trunk/lib/Transforms/Scalar/GVN.cpp Modified: llvm/trunk/lib/Transforms/Scalar/GVN.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/GVN.cpp?rev=41077&r1=41076&r2=41077&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/GVN.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/GVN.cpp Tue Aug 14 12:59:48 2007 @@ -856,10 +856,19 @@ // ... to a pointer that has been loaded from before... MemoryDependenceAnalysis& MD = getAnalysis(); + bool removedNonLocal = false; Instruction* dep = MD.getDependency(L); if (dep == MemoryDependenceAnalysis::NonLocal && - L->getParent() != &L->getParent()->getParent()->getEntryBlock()) - processNonLocalLoad(L, toErase); + L->getParent() != &L->getParent()->getParent()->getEntryBlock()) { + removedNonLocal = processNonLocalLoad(L, toErase); + + if (!removedNonLocal) + last = L; + + return removedNonLocal; + } + + bool deletedLoad = false; while (dep != MemoryDependenceAnalysis::None && From resistor at mac.com Tue Aug 14 13:04:12 2007 From: resistor at mac.com (Owen Anderson) Date: Tue, 14 Aug 2007 18:04:12 -0000 Subject: [llvm-commits] [llvm] r41078 - /llvm/trunk/lib/Transforms/Scalar/GVN.cpp Message-ID: <200708141804.l7EI4CZs029288@zion.cs.uiuc.edu> Author: resistor Date: Tue Aug 14 13:04:11 2007 New Revision: 41078 URL: http://llvm.org/viewvc/llvm-project?rev=41078&view=rev Log: Make GVN iterative. Modified: llvm/trunk/lib/Transforms/Scalar/GVN.cpp Modified: llvm/trunk/lib/Transforms/Scalar/GVN.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/GVN.cpp?rev=41078&r1=41077&r2=41078&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/GVN.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/GVN.cpp Tue Aug 14 13:04:11 2007 @@ -671,6 +671,7 @@ DenseMap &Phis, bool top_level = false); void dump(DenseMap& d); + bool iterateOnFunction(Function &F); }; char GVN::ID = 0; @@ -944,7 +945,21 @@ // GVN::runOnFunction - This is the main transformation entry point for a // function. // -bool GVN::runOnFunction(Function &F) { +bool GVN::runOnFunction(Function& F) { + bool changed = false; + bool shouldContinue = true; + + while (shouldContinue) { + shouldContinue = iterateOnFunction(F); + changed |= shouldContinue; + } + + return changed; +} + + +// GVN::iterateOnFunction - Executes one iteration of GVN +bool GVN::iterateOnFunction(Function &F) { // Clean out global sets from any previous functions VN.clear(); availableOut.clear(); From resistor at mac.com Tue Aug 14 13:16:30 2007 From: resistor at mac.com (Owen Anderson) Date: Tue, 14 Aug 2007 18:16:30 -0000 Subject: [llvm-commits] [llvm] r41080 - /llvm/trunk/lib/Transforms/Scalar/GVN.cpp Message-ID: <200708141816.l7EIGULv029705@zion.cs.uiuc.edu> Author: resistor Date: Tue Aug 14 13:16:29 2007 New Revision: 41080 URL: http://llvm.org/viewvc/llvm-project?rev=41080&view=rev Log: Be more aggressive in pruning unnecessary PHI nodes when doing PHI construction. Modified: llvm/trunk/lib/Transforms/Scalar/GVN.cpp Modified: llvm/trunk/lib/Transforms/Scalar/GVN.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/GVN.cpp?rev=41080&r1=41079&r2=41080&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/GVN.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/GVN.cpp Tue Aug 14 13:16:29 2007 @@ -749,40 +749,59 @@ if (Phis.count(BB) == 0) Phis.insert(std::make_pair(BB, PN)); - bool all_same = true; - Value* first = 0; - // Fill in the incoming values for the block. for (pred_iterator PI = pred_begin(BB), E = pred_end(BB); PI != E; ++PI) { Value* val = GetValueForBlock(*PI, orig, Phis); - if (first == 0) - first = val; - else if (all_same && first != val) - all_same = false; PN->addIncoming(val, *PI); } - if (all_same) { - MemoryDependenceAnalysis& MD = getAnalysis(); - - MD.removeInstruction(PN); - PN->replaceAllUsesWith(first); - - SmallVector toRemove; - for (DenseMap::iterator I = Phis.begin(), - E = Phis.end(); I != E; ++I) - if (I->second == PN) - toRemove.push_back(I->first); - for (SmallVector::iterator I = toRemove.begin(), - E= toRemove.end(); I != E; ++I) - Phis[*I] = first; - - PN->eraseFromParent(); - - Phis[BB] = first; - - return first; + Value* v = PN->hasConstantValue(); + if (v) { + if (Instruction* inst = dyn_cast(v)) { + DominatorTree &DT = getAnalysis(); + if (DT.dominates(inst, PN)) { + MemoryDependenceAnalysis& MD = getAnalysis(); + + MD.removeInstruction(PN); + PN->replaceAllUsesWith(inst); + + SmallVector toRemove; + for (DenseMap::iterator I = Phis.begin(), + E = Phis.end(); I != E; ++I) + if (I->second == PN) + toRemove.push_back(I->first); + for (SmallVector::iterator I = toRemove.begin(), + E= toRemove.end(); I != E; ++I) + Phis[*I] = inst; + + PN->eraseFromParent(); + + Phis[BB] = inst; + + return inst; + } + } else { + MemoryDependenceAnalysis& MD = getAnalysis(); + + MD.removeInstruction(PN); + PN->replaceAllUsesWith(v); + + SmallVector toRemove; + for (DenseMap::iterator I = Phis.begin(), + E = Phis.end(); I != E; ++I) + if (I->second == PN) + toRemove.push_back(I->first); + for (SmallVector::iterator I = toRemove.begin(), + E= toRemove.end(); I != E; ++I) + Phis[*I] = v; + + PN->eraseFromParent(); + + Phis[BB] = v; + + return v; + } } phiMap[orig->getPointerOperand()].insert(PN); @@ -915,7 +934,7 @@ return deletedLoad; } -/// buildsets_availout - When calculating availability, handle an instruction +/// processInstruction - When calculating availability, handle an instruction /// by inserting it into the appropriate sets bool GVN::processInstruction(Instruction* I, ValueNumberedSet& currAvail, From lauro.venancio at gmail.com Tue Aug 14 13:23:49 2007 From: lauro.venancio at gmail.com (Lauro Ramos Venancio) Date: Tue, 14 Aug 2007 15:23:49 -0300 Subject: [llvm-commits] [llvm] r41060 - in /llvm/trunk: include/llvm/CodeGen/LiveInterval.h include/llvm/CodeGen/LiveIntervalAnalysis.h lib/CodeGen/LiveIntervalAnalysis.cpp lib/CodeGen/RegAllocLinearScan.cpp lib/CodeGen/SimpleRegisterCoalescing.cpp lib/Co Message-ID: <9c10c9f0708141123w214fdd81u97b84c06e5416e61@mail.gmail.com> Hi Evan, This revision caused some regressions (see http://llvm.org/nightlytest/test.php?machine=142&night=3420). A testcase is attached. laurov at laurov-desktop:/test_1710/llvm-test/MultiSource/Benchmarks/MiBench/consumer-typeset$ ~/llvm/llvm/build/Debug/bin/llc < bugpoint-reduced-simplified.bc llc: /home/laurov/llvm/llvm/lib/CodeGen/RegisterScavenging.cpp:142: void llvm::RegScavenger::forward(): Assertion `(isUnused(Reg) || isReserved(Reg)) && "Re-defining a live register!"' failed. Lauro 2007/8/13, Evan Cheng : > Author: evancheng > Date: Mon Aug 13 18:45:17 2007 > New Revision: 41060 > > URL: http://llvm.org/viewvc/llvm-project?rev=41060&view=rev > Log: > Re-implement trivial rematerialization. This allows def MIs whose live intervals that are coalesced to be rematerialized. > > Modified: > llvm/trunk/include/llvm/CodeGen/LiveInterval.h > llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h > llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp > llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp > llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp > llvm/trunk/lib/CodeGen/VirtRegMap.cpp > llvm/trunk/lib/CodeGen/VirtRegMap.h > > Modified: llvm/trunk/include/llvm/CodeGen/LiveInterval.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/LiveInterval.h?rev=41060&r1=41059&r2=41060&view=diff > > ============================================================================== > --- llvm/trunk/include/llvm/CodeGen/LiveInterval.h (original) > +++ llvm/trunk/include/llvm/CodeGen/LiveInterval.h Mon Aug 13 18:45:17 2007 > @@ -83,7 +83,6 @@ > unsigned reg; // the register of this interval > unsigned preference; // preferred register to allocate for this interval > float weight; // weight of this interval > - MachineInstr* remat; // definition if the definition rematerializable > Ranges ranges; // the ranges in which this register is live > > /// ValueNumberInfo - If the value number definition is undefined (e.g. phi > @@ -101,7 +100,7 @@ > public: > > LiveInterval(unsigned Reg, float Weight) > - : reg(Reg), preference(0), weight(Weight), remat(NULL) { > + : reg(Reg), preference(0), weight(Weight) { > } > > typedef Ranges::iterator iterator; > @@ -128,7 +127,6 @@ > void swap(LiveInterval& other) { > std::swap(reg, other.reg); > std::swap(weight, other.weight); > - std::swap(remat, other.remat); > std::swap(ranges, other.ranges); > std::swap(ValueNumberInfo, other.ValueNumberInfo); > } > > Modified: llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h?rev=41060&r1=41059&r2=41060&view=diff > > ============================================================================== > --- llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h (original) > +++ llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h Mon Aug 13 18:45:17 2007 > @@ -25,6 +25,8 @@ > #include "llvm/ADT/BitVector.h" > #include "llvm/ADT/DenseMap.h" > #include "llvm/ADT/IndexedMap.h" > +#include "llvm/ADT/SmallPtrSet.h" > +#include "llvm/ADT/SmallVector.h" > > namespace llvm { > > @@ -41,9 +43,9 @@ > const TargetInstrInfo* tii_; > LiveVariables* lv_; > > - /// MBB2IdxMap - The index of the first instruction in the specified basic > - /// block. > - std::vector MBB2IdxMap; > + /// MBB2IdxMap - The indexes of the first and last instructions in the > + /// specified basic block. > + std::vector > MBB2IdxMap; > > typedef std::map Mi2IndexMap; > Mi2IndexMap mi2iMap_; > @@ -56,6 +58,8 @@ > > BitVector allocatableRegs_; > > + std::vector ClonedMIs; > + > public: > static char ID; // Pass identification, replacement for typeid > LiveIntervals() : MachineFunctionPass((intptr_t)&ID) {} > @@ -118,10 +122,19 @@ > unsigned getMBBStartIdx(MachineBasicBlock *MBB) const { > return getMBBStartIdx(MBB->getNumber()); > } > - > unsigned getMBBStartIdx(unsigned MBBNo) const { > assert(MBBNo < MBB2IdxMap.size() && "Invalid MBB number!"); > - return MBB2IdxMap[MBBNo]; > + return MBB2IdxMap[MBBNo].first; > + } > + > + /// getMBBEndIdx - Return the store index of the last instruction in the > + /// specified MachineBasicBlock. > + unsigned getMBBEndIdx(MachineBasicBlock *MBB) const { > + return getMBBEndIdx(MBB->getNumber()); > + } > + unsigned getMBBEndIdx(unsigned MBBNo) const { > + assert(MBBNo < MBB2IdxMap.size() && "Invalid MBB number!"); > + return MBB2IdxMap[MBBNo].second; > } > > /// getInstructionIndex - returns the base index of instr > @@ -155,8 +168,7 @@ > const std::vector &LRs); > > std::vector addIntervalsForSpills(const LiveInterval& i, > - VirtRegMap& vrm, > - int slot); > + VirtRegMap& vrm, unsigned reg); > > // Interval removal > > @@ -225,6 +237,17 @@ > unsigned MIIdx, > LiveInterval &interval, bool isAlias = false); > > + /// isReMaterializable - Returns true if the definition MI of the specified > + /// val# of the specified interval is re-materializable. > + bool isReMaterializable(const LiveInterval &li, unsigned ValNum, > + MachineInstr *MI); > + > + /// tryFoldMemoryOperand - Attempts to fold a spill / restore from slot > + /// to reg into ith operand of specified MI. If it is successul, MI is > + /// updated with the newly created MI and returns true. > + bool tryFoldMemoryOperand(MachineInstr* &MI, VirtRegMap &vrm, unsigned index, > + unsigned i, int slot, unsigned reg); > + > static LiveInterval createInterval(unsigned Reg); > > void printRegName(unsigned reg) const; > > Modified: llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp?rev=41060&r1=41059&r2=41060&view=diff > > ============================================================================== > --- llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp (original) > +++ llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp Mon Aug 13 18:45:17 2007 > @@ -30,7 +30,6 @@ > #include "llvm/Target/TargetMachine.h" > #include "llvm/Support/CommandLine.h" > #include "llvm/Support/Debug.h" > -#include "llvm/ADT/SmallSet.h" > #include "llvm/ADT/Statistic.h" > #include "llvm/ADT/STLExtras.h" > #include > @@ -60,6 +59,8 @@ > mi2iMap_.clear(); > i2miMap_.clear(); > r2iMap_.clear(); > + for (unsigned i = 0, e = ClonedMIs.size(); i != e; ++i) > + delete ClonedMIs[i]; > } > > /// runOnMachineFunction - Register allocate the whole function > @@ -74,13 +75,12 @@ > > // Number MachineInstrs and MachineBasicBlocks. > // Initialize MBB indexes to a sentinal. > - MBB2IdxMap.resize(mf_->getNumBlockIDs(), ~0U); > + MBB2IdxMap.resize(mf_->getNumBlockIDs(), std::make_pair(~0U,~0U)); > > unsigned MIIndex = 0; > for (MachineFunction::iterator MBB = mf_->begin(), E = mf_->end(); > MBB != E; ++MBB) { > - // Set the MBB2IdxMap entry for this MBB. > - MBB2IdxMap[MBB->getNumber()] = MIIndex; > + unsigned StartIdx = MIIndex; > > for (MachineBasicBlock::iterator I = MBB->begin(), E = MBB->end(); > I != E; ++I) { > @@ -89,6 +89,9 @@ > i2miMap_.push_back(I); > MIIndex += InstrSlots::NUM; > } > + > + // Set the MBB2IdxMap entry for this MBB. > + MBB2IdxMap[MBB->getNumber()] = std::make_pair(StartIdx, MIIndex - 1); > } > > computeIntervals(); > @@ -175,8 +178,76 @@ > return NewLI; > } > > +/// isReDefinedByTwoAddr - Returns true if the Reg re-definition is due to > +/// two addr elimination. > +static bool isReDefinedByTwoAddr(MachineInstr *MI, unsigned Reg, > + const TargetInstrInfo *TII) { > + for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { > + MachineOperand &MO1 = MI->getOperand(i); > + if (MO1.isRegister() && MO1.isDef() && MO1.getReg() == Reg) { > + for (unsigned j = i+1; j < e; ++j) { > + MachineOperand &MO2 = MI->getOperand(j); > + if (MO2.isRegister() && MO2.isUse() && MO2.getReg() == Reg && > + MI->getInstrDescriptor()-> > + getOperandConstraint(j, TOI::TIED_TO) == (int)i) > + return true; > + } > + } > + } > + return false; > +} > + > +/// isReMaterializable - Returns true if the definition MI of the specified > +/// val# of the specified interval is re-materializable. > +bool LiveIntervals::isReMaterializable(const LiveInterval &li, unsigned ValNum, > + MachineInstr *MI) { > + if (tii_->isTriviallyReMaterializable(MI)) > + return true; > + > + int FrameIdx = 0; > + if (!tii_->isLoadFromStackSlot(MI, FrameIdx) || > + !mf_->getFrameInfo()->isFixedObjectIndex(FrameIdx)) > + return false; > + > + // This is a load from fixed stack slot. It can be rematerialized unless it's > + // re-defined by a two-address instruction. > + for (unsigned i = 0, e = li.getNumValNums(); i != e; ++i) { > + if (i == ValNum) > + continue; > + unsigned DefIdx = li.getDefForValNum(i); > + if (DefIdx == ~1U) > + continue; // Dead val#. > + MachineInstr *DefMI = (DefIdx == ~0u) > + ? NULL : getInstructionFromIndex(DefIdx); > + if (DefMI && isReDefinedByTwoAddr(DefMI, li.reg, tii_)) > + return false; > + } > + return true; > +} > + > +bool LiveIntervals::tryFoldMemoryOperand(MachineInstr* &MI, VirtRegMap &vrm, > + unsigned index, unsigned i, > + int slot, unsigned reg) { > + MachineInstr *fmi = mri_->foldMemoryOperand(MI, i, slot); > + if (fmi) { > + // Attempt to fold the memory reference into the instruction. If > + // we can do this, we don't need to insert spill code. > + if (lv_) > + lv_->instructionChanged(MI, fmi); > + MachineBasicBlock &MBB = *MI->getParent(); > + vrm.virtFolded(reg, MI, i, fmi); > + mi2iMap_.erase(MI); > + i2miMap_[index/InstrSlots::NUM] = fmi; > + mi2iMap_[fmi] = index; > + MI = MBB.insert(MBB.erase(MI), fmi); > + ++numFolded; > + return true; > + } > + return false; > +} > + > std::vector LiveIntervals:: > -addIntervalsForSpills(const LiveInterval &li, VirtRegMap &vrm, int slot) { > +addIntervalsForSpills(const LiveInterval &li, VirtRegMap &vrm, unsigned reg) { > // since this is called after the analysis is done we don't know if > // LiveVariables is available > lv_ = getAnalysisToUpdate(); > @@ -192,10 +263,72 @@ > > const TargetRegisterClass* rc = mf_->getSSARegMap()->getRegClass(li.reg); > > + unsigned NumValNums = li.getNumValNums(); > + SmallVector ReMatDefs; > + ReMatDefs.resize(NumValNums, NULL); > + SmallVector ReMatOrigDefs; > + ReMatOrigDefs.resize(NumValNums, NULL); > + SmallVector ReMatIds; > + ReMatIds.resize(NumValNums, VirtRegMap::MAX_STACK_SLOT); > + BitVector ReMatDelete(NumValNums); > + unsigned slot = VirtRegMap::MAX_STACK_SLOT; > + > + bool NeedStackSlot = false; > + for (unsigned i = 0; i != NumValNums; ++i) { > + unsigned DefIdx = li.getDefForValNum(i); > + if (DefIdx == ~1U) > + continue; // Dead val#. > + // Is the def for the val# rematerializable? > + MachineInstr *DefMI = (DefIdx == ~0u) > + ? NULL : getInstructionFromIndex(DefIdx); > + if (DefMI && isReMaterializable(li, i, DefMI)) { > + // Remember how to remat the def of this val#. > + ReMatOrigDefs[i] = DefMI; > + // Original def may be modified so we have to make a copy here. vrm must > + // delete these! > + ReMatDefs[i] = DefMI = DefMI->clone(); > + vrm.setVirtIsReMaterialized(reg, DefMI); > + > + bool CanDelete = true; > + const SmallVector &kills = li.getKillsForValNum(i); > + for (unsigned j = 0, ee = kills.size(); j != ee; ++j) { > + unsigned KillIdx = kills[j]; > + MachineInstr *KillMI = (KillIdx & 1) > + ? NULL : getInstructionFromIndex(KillIdx); > + // Kill is a phi node, not all of its uses can be rematerialized. > + // It must not be deleted. > + if (!KillMI) { > + CanDelete = false; > + // Need a stack slot if there is any live range where uses cannot be > + // rematerialized. > + NeedStackSlot = true; > + break; > + } > + } > + > + if (CanDelete) > + ReMatDelete.set(i); > + } else { > + // Need a stack slot if there is any live range where uses cannot be > + // rematerialized. > + NeedStackSlot = true; > + } > + } > + > + // One stack slot per live interval. > + if (NeedStackSlot) > + slot = vrm.assignVirt2StackSlot(reg); > + > for (LiveInterval::Ranges::const_iterator > - i = li.ranges.begin(), e = li.ranges.end(); i != e; ++i) { > - unsigned index = getBaseIndex(i->start); > - unsigned end = getBaseIndex(i->end-1) + InstrSlots::NUM; > + I = li.ranges.begin(), E = li.ranges.end(); I != E; ++I) { > + MachineInstr *DefMI = ReMatDefs[I->ValId]; > + MachineInstr *OrigDefMI = ReMatOrigDefs[I->ValId]; > + bool DefIsReMat = DefMI != NULL; > + bool CanDelete = ReMatDelete[I->ValId]; > + int LdSlot = 0; > + bool isLoadSS = DefIsReMat && tii_->isLoadFromStackSlot(DefMI, LdSlot); > + unsigned index = getBaseIndex(I->start); > + unsigned end = getBaseIndex(I->end-1) + InstrSlots::NUM; > for (; index != end; index += InstrSlots::NUM) { > // skip deleted instructions > while (index != end && !getInstructionFromIndex(index)) > @@ -208,87 +341,109 @@ > for (unsigned i = 0; i != MI->getNumOperands(); ++i) { > MachineOperand& mop = MI->getOperand(i); > if (mop.isRegister() && mop.getReg() == li.reg) { > - MachineInstr *fmi = li.remat ? NULL > - : mri_->foldMemoryOperand(MI, i, slot); > - if (fmi) { > - // Attempt to fold the memory reference into the instruction. If we > - // can do this, we don't need to insert spill code. > - if (lv_) > - lv_->instructionChanged(MI, fmi); > - MachineBasicBlock &MBB = *MI->getParent(); > - vrm.virtFolded(li.reg, MI, i, fmi); > - mi2iMap_.erase(MI); > - i2miMap_[index/InstrSlots::NUM] = fmi; > - mi2iMap_[fmi] = index; > - MI = MBB.insert(MBB.erase(MI), fmi); > - ++numFolded; > - // Folding the load/store can completely change the instruction in > - // unpredictable ways, rescan it from the beginning. > - goto RestartInstruction; > + if (DefIsReMat) { > + // If this is the rematerializable definition MI itself and > + // all of its uses are rematerialized, simply delete it. > + if (MI == OrigDefMI) { > + if (CanDelete) { > + RemoveMachineInstrFromMaps(MI); > + MI->eraseFromParent(); > + break; > + } else if (tryFoldMemoryOperand(MI, vrm, index, i, slot, li.reg)) > + // Folding the load/store can completely change the instruction > + // in unpredictable ways, rescan it from the beginning. > + goto RestartInstruction; > + } else if (isLoadSS && > + tryFoldMemoryOperand(MI, vrm, index, i, LdSlot, li.reg)){ > + // FIXME: Other rematerializable loads can be folded as well. > + // Folding the load/store can completely change the > + // instruction in unpredictable ways, rescan it from > + // the beginning. > + goto RestartInstruction; > + } > } else { > - // Create a new virtual register for the spill interval. > - unsigned NewVReg = mf_->getSSARegMap()->createVirtualRegister(rc); > + if (tryFoldMemoryOperand(MI, vrm, index, i, slot, li.reg)) > + // Folding the load/store can completely change the instruction in > + // unpredictable ways, rescan it from the beginning. > + goto RestartInstruction; > + } > + > + // Create a new virtual register for the spill interval. > + unsigned NewVReg = mf_->getSSARegMap()->createVirtualRegister(rc); > > - // Scan all of the operands of this instruction rewriting operands > - // to use NewVReg instead of li.reg as appropriate. We do this for > - // two reasons: > - // > - // 1. If the instr reads the same spilled vreg multiple times, we > - // want to reuse the NewVReg. > - // 2. If the instr is a two-addr instruction, we are required to > - // keep the src/dst regs pinned. > - // > - // Keep track of whether we replace a use and/or def so that we can > - // create the spill interval with the appropriate range. > - mop.setReg(NewVReg); > + // Scan all of the operands of this instruction rewriting operands > + // to use NewVReg instead of li.reg as appropriate. We do this for > + // two reasons: > + // > + // 1. If the instr reads the same spilled vreg multiple times, we > + // want to reuse the NewVReg. > + // 2. If the instr is a two-addr instruction, we are required to > + // keep the src/dst regs pinned. > + // > + // Keep track of whether we replace a use and/or def so that we can > + // create the spill interval with the appropriate range. > + mop.setReg(NewVReg); > > - bool HasUse = mop.isUse(); > - bool HasDef = mop.isDef(); > - for (unsigned j = i+1, e = MI->getNumOperands(); j != e; ++j) { > - if (MI->getOperand(j).isReg() && > - MI->getOperand(j).getReg() == li.reg) { > - MI->getOperand(j).setReg(NewVReg); > - HasUse |= MI->getOperand(j).isUse(); > - HasDef |= MI->getOperand(j).isDef(); > - } > + bool HasUse = mop.isUse(); > + bool HasDef = mop.isDef(); > + for (unsigned j = i+1, e = MI->getNumOperands(); j != e; ++j) { > + if (MI->getOperand(j).isReg() && > + MI->getOperand(j).getReg() == li.reg) { > + MI->getOperand(j).setReg(NewVReg); > + HasUse |= MI->getOperand(j).isUse(); > + HasDef |= MI->getOperand(j).isDef(); > } > + } > > - // create a new register for this spill > - vrm.grow(); > - if (li.remat) > - vrm.setVirtIsReMaterialized(NewVReg, li.remat); > - vrm.assignVirt2StackSlot(NewVReg, slot); > - LiveInterval &nI = getOrCreateInterval(NewVReg); > - nI.remat = li.remat; > - assert(nI.empty()); > - > - // the spill weight is now infinity as it > - // cannot be spilled again > - nI.weight = HUGE_VALF; > - > - if (HasUse) { > - LiveRange LR(getLoadIndex(index), getUseIndex(index), > - nI.getNextValue(~0U, 0)); > - DOUT << " +" << LR; > - nI.addRange(LR); > + vrm.grow(); > + if (DefIsReMat) { > + vrm.setVirtIsReMaterialized(NewVReg, DefMI/*, CanDelete*/); > + if (ReMatIds[I->ValId] == VirtRegMap::MAX_STACK_SLOT) { > + // Each valnum may have its own remat id. > + ReMatIds[I->ValId] = vrm.assignVirtReMatId(NewVReg); > + } else { > + vrm.assignVirtReMatId(NewVReg, ReMatIds[I->ValId]); > } > - if (HasDef) { > - LiveRange LR(getDefIndex(index), getStoreIndex(index), > - nI.getNextValue(~0U, 0)); > - DOUT << " +" << LR; > - nI.addRange(LR); > + if (!CanDelete || (HasUse && HasDef)) { > + // If this is a two-addr instruction then its use operands are > + // rematerializable but its def is not. It should be assigned a > + // stack slot. > + vrm.assignVirt2StackSlot(NewVReg, slot); > } > + } else { > + vrm.assignVirt2StackSlot(NewVReg, slot); > + } > + > + // create a new register interval for this spill / remat. > + LiveInterval &nI = getOrCreateInterval(NewVReg); > + assert(nI.empty()); > + > + // the spill weight is now infinity as it > + // cannot be spilled again > + nI.weight = HUGE_VALF; > + > + if (HasUse) { > + LiveRange LR(getLoadIndex(index), getUseIndex(index), > + nI.getNextValue(~0U, 0)); > + DOUT << " +" << LR; > + nI.addRange(LR); > + } > + if (HasDef) { > + LiveRange LR(getDefIndex(index), getStoreIndex(index), > + nI.getNextValue(~0U, 0)); > + DOUT << " +" << LR; > + nI.addRange(LR); > + } > > - added.push_back(&nI); > + added.push_back(&nI); > > - // update live variables if it is available > - if (lv_) > - lv_->addVirtualRegisterKilled(NewVReg, MI); > + // update live variables if it is available > + if (lv_) > + lv_->addVirtualRegisterKilled(NewVReg, MI); > > - DOUT << "\t\t\t\tadded new interval: "; > - nI.print(DOUT, mri_); > - DOUT << '\n'; > - } > + DOUT << "\t\t\t\tadded new interval: "; > + nI.print(DOUT, mri_); > + DOUT << '\n'; > } > } > } > @@ -304,25 +459,6 @@ > cerr << "%reg" << reg; > } > > -/// isReDefinedByTwoAddr - Returns true if the Reg re-definition is due to > -/// two addr elimination. > -static bool isReDefinedByTwoAddr(MachineInstr *MI, unsigned Reg, > - const TargetInstrInfo *TII) { > - for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { > - MachineOperand &MO1 = MI->getOperand(i); > - if (MO1.isRegister() && MO1.isDef() && MO1.getReg() == Reg) { > - for (unsigned j = i+1; j < e; ++j) { > - MachineOperand &MO2 = MI->getOperand(j); > - if (MO2.isRegister() && MO2.isUse() && MO2.getReg() == Reg && > - MI->getInstrDescriptor()-> > - getOperandConstraint(j, TOI::TIED_TO) == (int)i) > - return true; > - } > - } > - } > - return false; > -} > - > void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb, > MachineBasicBlock::iterator mi, > unsigned MIIdx, > @@ -335,16 +471,6 @@ > // done once for the vreg. We use an empty interval to detect the first > // time we see a vreg. > if (interval.empty()) { > - // Remember if the definition can be rematerialized. All load's from fixed > - // stack slots are re-materializable. The target may permit other > - // instructions to be re-materialized as well. > - int FrameIdx = 0; > - if (vi.DefInst && > - (tii_->isTriviallyReMaterializable(vi.DefInst) || > - (tii_->isLoadFromStackSlot(vi.DefInst, FrameIdx) && > - mf_->getFrameInfo()->isFixedObjectIndex(FrameIdx)))) > - interval.remat = vi.DefInst; > - > // Get the Idx of the defining instructions. > unsigned defIndex = getDefIndex(MIIdx); > unsigned ValNum; > @@ -421,9 +547,6 @@ > } > > } else { > - // Can no longer safely assume definition is rematerializable. > - interval.remat = NULL; > - > // If this is the second time we see a virtual register definition, it > // must be due to phi elimination or two addr elimination. If this is > // the result of two address elimination, then the vreg is one of the > @@ -487,7 +610,7 @@ > DOUT << " Removing [" << Start << "," << End << "] from: "; > interval.print(DOUT, mri_); DOUT << "\n"; > interval.removeRange(Start, End); > - interval.addKillForValNum(0, Start); > + interval.addKillForValNum(0, Start-1); // odd # means phi node > DOUT << " RESULT: "; interval.print(DOUT, mri_); > > // Replace the interval with one of a NEW value number. Note that this > @@ -514,7 +637,7 @@ > unsigned killIndex = getInstructionIndex(&mbb->back()) + InstrSlots::NUM; > LiveRange LR(defIndex, killIndex, ValNum); > interval.addRange(LR); > - interval.addKillForValNum(ValNum, killIndex); > + interval.addKillForValNum(ValNum, killIndex-1); // odd # means phi node > DOUT << " +" << LR; > } > } > > Modified: llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp?rev=41060&r1=41059&r2=41060&view=diff > > ============================================================================== > --- llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp (original) > +++ llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp Mon Aug 13 18:45:17 2007 > @@ -305,7 +305,7 @@ > for (unsigned i = 0, e = handled_.size(); i != e; ++i) { > LiveInterval *HI = handled_[i]; > unsigned Reg = HI->reg; > - if (!vrm_->hasStackSlot(Reg) && HI->liveAt(StartIdx)) { > + if (vrm_->isAssignedReg(Reg) && HI->liveAt(StartIdx)) { > assert(MRegisterInfo::isVirtualRegister(Reg)); > Reg = vrm_->getPhys(Reg); > MBB->addLiveIn(Reg); > @@ -605,14 +605,8 @@ > // linearscan. > if (cur->weight != HUGE_VALF && cur->weight <= minWeight) { > DOUT << "\t\t\tspilling(c): " << *cur << '\n'; > - // if the current interval is re-materializable, remember so and don't > - // assign it a spill slot. > - if (cur->remat) > - vrm_->setVirtIsReMaterialized(cur->reg, cur->remat); > - int slot = cur->remat ? vrm_->assignVirtReMatId(cur->reg) > - : vrm_->assignVirt2StackSlot(cur->reg); > std::vector added = > - li_->addIntervalsForSpills(*cur, *vrm_, slot); > + li_->addIntervalsForSpills(*cur, *vrm_, cur->reg); > if (added.empty()) > return; // Early exit if all spills were folded. > > @@ -663,12 +657,8 @@ > cur->overlapsFrom(*i->first, i->second)) { > DOUT << "\t\t\tspilling(a): " << *i->first << '\n'; > earliestStart = std::min(earliestStart, i->first->beginNumber()); > - if (i->first->remat) > - vrm_->setVirtIsReMaterialized(reg, i->first->remat); > - int slot = i->first->remat ? vrm_->assignVirtReMatId(reg) > - : vrm_->assignVirt2StackSlot(reg); > std::vector newIs = > - li_->addIntervalsForSpills(*i->first, *vrm_, slot); > + li_->addIntervalsForSpills(*i->first, *vrm_, reg); > std::copy(newIs.begin(), newIs.end(), std::back_inserter(added)); > spilled.insert(reg); > } > @@ -680,12 +670,8 @@ > cur->overlapsFrom(*i->first, i->second-1)) { > DOUT << "\t\t\tspilling(i): " << *i->first << '\n'; > earliestStart = std::min(earliestStart, i->first->beginNumber()); > - if (i->first->remat) > - vrm_->setVirtIsReMaterialized(reg, i->first->remat); > - int slot = i->first->remat ? vrm_->assignVirtReMatId(reg) > - : vrm_->assignVirt2StackSlot(reg); > std::vector newIs = > - li_->addIntervalsForSpills(*i->first, *vrm_, slot); > + li_->addIntervalsForSpills(*i->first, *vrm_, reg); > std::copy(newIs.begin(), newIs.end(), std::back_inserter(added)); > spilled.insert(reg); > } > > Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp?rev=41060&r1=41059&r2=41060&view=diff > > ============================================================================== > --- llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp (original) > +++ llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Mon Aug 13 18:45:17 2007 > @@ -1123,12 +1123,6 @@ > continue; > LiveInterval &RegInt = li_->getInterval(reg); > float w = (mop.isUse()+mop.isDef()) * powf(10.0F, (float)loopDepth); > - // If the definition instruction is re-materializable, its spill > - // weight is half of what it would have been normally unless it's > - // a load from fixed stack slot. > - int Dummy; > - if (RegInt.remat && !tii_->isLoadFromStackSlot(RegInt.remat, Dummy)) > - w /= 2; > RegInt.weight += w; > UniqueUses.insert(reg); > } > > Modified: llvm/trunk/lib/CodeGen/VirtRegMap.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/VirtRegMap.cpp?rev=41060&r1=41059&r2=41060&view=diff > > ============================================================================== > --- llvm/trunk/lib/CodeGen/VirtRegMap.cpp (original) > +++ llvm/trunk/lib/CodeGen/VirtRegMap.cpp Mon Aug 13 18:45:17 2007 > @@ -62,13 +62,17 @@ > VirtRegMap::VirtRegMap(MachineFunction &mf) > : TII(*mf.getTarget().getInstrInfo()), MF(mf), > Virt2PhysMap(NO_PHYS_REG), Virt2StackSlotMap(NO_STACK_SLOT), > + Virt2ReMatIdMap(NO_STACK_SLOT), ReMatMap(NULL), > ReMatId(MAX_STACK_SLOT+1) { > grow(); > } > > void VirtRegMap::grow() { > - Virt2PhysMap.grow(MF.getSSARegMap()->getLastVirtReg()); > - Virt2StackSlotMap.grow(MF.getSSARegMap()->getLastVirtReg()); > + unsigned LastVirtReg = MF.getSSARegMap()->getLastVirtReg(); > + Virt2PhysMap.grow(LastVirtReg); > + Virt2StackSlotMap.grow(LastVirtReg); > + Virt2ReMatIdMap.grow(LastVirtReg); > + ReMatMap.grow(LastVirtReg); > } > > int VirtRegMap::assignVirt2StackSlot(unsigned virtReg) { > @@ -95,19 +99,19 @@ > > int VirtRegMap::assignVirtReMatId(unsigned virtReg) { > assert(MRegisterInfo::isVirtualRegister(virtReg)); > - assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT && > + assert(Virt2ReMatIdMap[virtReg] == NO_STACK_SLOT && > "attempt to assign re-mat id to already spilled register"); > - const MachineInstr *DefMI = getReMaterializedMI(virtReg); > - int FrameIdx; > - if (TII.isLoadFromStackSlot((MachineInstr*)DefMI, FrameIdx)) { > - // Load from stack slot is re-materialize as reload from the stack slot! > - Virt2StackSlotMap[virtReg] = FrameIdx; > - return FrameIdx; > - } > - Virt2StackSlotMap[virtReg] = ReMatId; > + Virt2ReMatIdMap[virtReg] = ReMatId; > return ReMatId++; > } > > +void VirtRegMap::assignVirtReMatId(unsigned virtReg, int id) { > + assert(MRegisterInfo::isVirtualRegister(virtReg)); > + assert(Virt2ReMatIdMap[virtReg] == NO_STACK_SLOT && > + "attempt to assign re-mat id to already spilled register"); > + Virt2ReMatIdMap[virtReg] = id; > +} > + > void VirtRegMap::virtFolded(unsigned VirtReg, MachineInstr *OldMI, > unsigned OpNo, MachineInstr *NewMI) { > // Move previous memory references folded to new instruction. > @@ -194,7 +198,7 @@ > if (MRegisterInfo::isVirtualRegister(MO.getReg())) { > unsigned VirtReg = MO.getReg(); > unsigned PhysReg = VRM.getPhys(VirtReg); > - if (VRM.hasStackSlot(VirtReg)) { > + if (!VRM.isAssignedReg(VirtReg)) { > int StackSlot = VRM.getStackSlot(VirtReg); > const TargetRegisterClass* RC = > MF.getSSARegMap()->getRegClass(VirtReg); > @@ -246,43 +250,41 @@ > DOUT << "\n**** Local spiller rewriting function '" > << MF.getFunction()->getName() << "':\n"; > > - std::vector ReMatedMIs; > for (MachineFunction::iterator MBB = MF.begin(), E = MF.end(); > MBB != E; ++MBB) > - RewriteMBB(*MBB, VRM, ReMatedMIs); > - for (unsigned i = 0, e = ReMatedMIs.size(); i != e; ++i) > - delete ReMatedMIs[i]; > + RewriteMBB(*MBB, VRM); > return true; > } > private: > - void RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM, > - std::vector &ReMatedMIs); > + void RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM); > }; > } > > /// AvailableSpills - As the local spiller is scanning and rewriting an MBB from > -/// top down, keep track of which spills slots are available in each register. > +/// top down, keep track of which spills slots or remat are available in each > +/// register. > /// > /// Note that not all physregs are created equal here. In particular, some > /// physregs are reloads that we are allowed to clobber or ignore at any time. > /// Other physregs are values that the register allocated program is using that > /// we cannot CHANGE, but we can read if we like. We keep track of this on a > -/// per-stack-slot basis as the low bit in the value of the SpillSlotsAvailable > -/// entries. The predicate 'canClobberPhysReg()' checks this bit and > -/// addAvailable sets it if. > +/// per-stack-slot / remat id basis as the low bit in the value of the > +/// SpillSlotsAvailable entries. The predicate 'canClobberPhysReg()' checks > +/// this bit and addAvailable sets it if. > namespace { > class VISIBILITY_HIDDEN AvailableSpills { > const MRegisterInfo *MRI; > const TargetInstrInfo *TII; > > - // SpillSlotsAvailable - This map keeps track of all of the spilled virtual > - // register values that are still available, due to being loaded or stored to, > - // but not invalidated yet. > - std::map SpillSlotsAvailable; > + // SpillSlotsOrReMatsAvailable - This map keeps track of all of the spilled > + // or remat'ed virtual register values that are still available, due to being > + // loaded or stored to, but not invalidated yet. > + std::map SpillSlotsOrReMatsAvailable; > > - // PhysRegsAvailable - This is the inverse of SpillSlotsAvailable, indicating > - // which stack slot values are currently held by a physreg. This is used to > - // invalidate entries in SpillSlotsAvailable when a physreg is modified. > + // PhysRegsAvailable - This is the inverse of SpillSlotsOrReMatsAvailable, > + // indicating which stack slot values are currently held by a physreg. This > + // is used to invalidate entries in SpillSlotsOrReMatsAvailable when a > + // physreg is modified. > std::multimap PhysRegsAvailable; > > void disallowClobberPhysRegOnly(unsigned PhysReg); > @@ -295,41 +297,43 @@ > > const MRegisterInfo *getRegInfo() const { return MRI; } > > - /// getSpillSlotPhysReg - If the specified stack slot is available in a > - /// physical register, return that PhysReg, otherwise return 0. > - unsigned getSpillSlotPhysReg(int Slot) const { > - std::map::const_iterator I = SpillSlotsAvailable.find(Slot); > - if (I != SpillSlotsAvailable.end()) { > + /// getSpillSlotOrReMatPhysReg - If the specified stack slot or remat is > + /// available in a physical register, return that PhysReg, otherwise > + /// return 0. > + unsigned getSpillSlotOrReMatPhysReg(int Slot) const { > + std::map::const_iterator I = > + SpillSlotsOrReMatsAvailable.find(Slot); > + if (I != SpillSlotsOrReMatsAvailable.end()) { > return I->second >> 1; // Remove the CanClobber bit. > } > return 0; > } > > - /// addAvailable - Mark that the specified stack slot is available in the > - /// specified physreg. If CanClobber is true, the physreg can be modified at > - /// any time without changing the semantics of the program. > - void addAvailable(int Slot, MachineInstr *MI, unsigned Reg, > + /// addAvailable - Mark that the specified stack slot / remat is available in > + /// the specified physreg. If CanClobber is true, the physreg can be modified > + /// at any time without changing the semantics of the program. > + void addAvailable(int SlotOrReMat, MachineInstr *MI, unsigned Reg, > bool CanClobber = true) { > // If this stack slot is thought to be available in some other physreg, > // remove its record. > - ModifyStackSlot(Slot); > + ModifyStackSlotOrReMat(SlotOrReMat); > > - PhysRegsAvailable.insert(std::make_pair(Reg, Slot)); > - SpillSlotsAvailable[Slot] = (Reg << 1) | (unsigned)CanClobber; > + PhysRegsAvailable.insert(std::make_pair(Reg, SlotOrReMat)); > + SpillSlotsOrReMatsAvailable[SlotOrReMat] = (Reg << 1) | (unsigned)CanClobber; > > - if (Slot > VirtRegMap::MAX_STACK_SLOT) > - DOUT << "Remembering RM#" << Slot-VirtRegMap::MAX_STACK_SLOT-1; > + if (SlotOrReMat > VirtRegMap::MAX_STACK_SLOT) > + DOUT << "Remembering RM#" << SlotOrReMat-VirtRegMap::MAX_STACK_SLOT-1; > else > - DOUT << "Remembering SS#" << Slot; > + DOUT << "Remembering SS#" << SlotOrReMat; > DOUT << " in physreg " << MRI->getName(Reg) << "\n"; > } > > /// canClobberPhysReg - Return true if the spiller is allowed to change the > /// value of the specified stackslot register if it desires. The specified > /// stack slot must be available in a physreg for this query to make sense. > - bool canClobberPhysReg(int Slot) const { > - assert(SpillSlotsAvailable.count(Slot) && "Slot not available!"); > - return SpillSlotsAvailable.find(Slot)->second & 1; > + bool canClobberPhysReg(int SlotOrReMat) const { > + assert(SpillSlotsOrReMatsAvailable.count(SlotOrReMat) && "Value not available!"); > + return SpillSlotsOrReMatsAvailable.find(SlotOrReMat)->second & 1; > } > > /// disallowClobberPhysReg - Unset the CanClobber bit of the specified > @@ -342,10 +346,10 @@ > /// it and any of its aliases. > void ClobberPhysReg(unsigned PhysReg); > > - /// ModifyStackSlot - This method is called when the value in a stack slot > + /// ModifyStackSlotOrReMat - This method is called when the value in a stack slot > /// changes. This removes information about which register the previous value > /// for this slot lives in (as the previous value is dead now). > - void ModifyStackSlot(int Slot); > + void ModifyStackSlotOrReMat(int SlotOrReMat); > }; > } > > @@ -356,11 +360,11 @@ > std::multimap::iterator I = > PhysRegsAvailable.lower_bound(PhysReg); > while (I != PhysRegsAvailable.end() && I->first == PhysReg) { > - int Slot = I->second; > + int SlotOrReMat = I->second; > I++; > - assert((SpillSlotsAvailable[Slot] >> 1) == PhysReg && > + assert((SpillSlotsOrReMatsAvailable[SlotOrReMat] >> 1) == PhysReg && > "Bidirectional map mismatch!"); > - SpillSlotsAvailable[Slot] &= ~1; > + SpillSlotsOrReMatsAvailable[SlotOrReMat] &= ~1; > DOUT << "PhysReg " << MRI->getName(PhysReg) > << " copied, it is available for use but can no longer be modified\n"; > } > @@ -381,17 +385,17 @@ > std::multimap::iterator I = > PhysRegsAvailable.lower_bound(PhysReg); > while (I != PhysRegsAvailable.end() && I->first == PhysReg) { > - int Slot = I->second; > + int SlotOrReMat = I->second; > PhysRegsAvailable.erase(I++); > - assert((SpillSlotsAvailable[Slot] >> 1) == PhysReg && > + assert((SpillSlotsOrReMatsAvailable[SlotOrReMat] >> 1) == PhysReg && > "Bidirectional map mismatch!"); > - SpillSlotsAvailable.erase(Slot); > + SpillSlotsOrReMatsAvailable.erase(SlotOrReMat); > DOUT << "PhysReg " << MRI->getName(PhysReg) > << " clobbered, invalidating "; > - if (Slot > VirtRegMap::MAX_STACK_SLOT) > - DOUT << "RM#" << Slot-VirtRegMap::MAX_STACK_SLOT-1 << "\n"; > + if (SlotOrReMat > VirtRegMap::MAX_STACK_SLOT) > + DOUT << "RM#" << SlotOrReMat-VirtRegMap::MAX_STACK_SLOT-1 << "\n"; > else > - DOUT << "SS#" << Slot << "\n"; > + DOUT << "SS#" << SlotOrReMat << "\n"; > } > } > > @@ -404,14 +408,14 @@ > ClobberPhysRegOnly(PhysReg); > } > > -/// ModifyStackSlot - This method is called when the value in a stack slot > +/// ModifyStackSlotOrReMat - This method is called when the value in a stack slot > /// changes. This removes information about which register the previous value > /// for this slot lives in (as the previous value is dead now). > -void AvailableSpills::ModifyStackSlot(int Slot) { > - std::map::iterator It = SpillSlotsAvailable.find(Slot); > - if (It == SpillSlotsAvailable.end()) return; > +void AvailableSpills::ModifyStackSlotOrReMat(int SlotOrReMat) { > + std::map::iterator It = SpillSlotsOrReMatsAvailable.find(SlotOrReMat); > + if (It == SpillSlotsOrReMatsAvailable.end()) return; > unsigned Reg = It->second >> 1; > - SpillSlotsAvailable.erase(It); > + SpillSlotsOrReMatsAvailable.erase(It); > > // This register may hold the value of multiple stack slots, only remove this > // stack slot from the set of values the register contains. > @@ -419,7 +423,7 @@ > for (; ; ++I) { > assert(I != PhysRegsAvailable.end() && I->first == Reg && > "Map inverse broken!"); > - if (I->second == Slot) break; > + if (I->second == SlotOrReMat) break; > } > PhysRegsAvailable.erase(I); > } > @@ -490,8 +494,8 @@ > // The MachineInstr operand that reused an available value. > unsigned Operand; > > - // StackSlot - The spill slot of the value being reused. > - unsigned StackSlot; > + // StackSlotOrReMat - The spill slot or remat id of the value being reused. > + unsigned StackSlotOrReMat; > > // PhysRegReused - The physical register the value was available in. > unsigned PhysRegReused; > @@ -504,7 +508,7 @@ > > ReusedOp(unsigned o, unsigned ss, unsigned prr, unsigned apr, > unsigned vreg) > - : Operand(o), StackSlot(ss), PhysRegReused(prr), AssignedPhysReg(apr), > + : Operand(o), StackSlotOrReMat(ss), PhysRegReused(prr), AssignedPhysReg(apr), > VirtReg(vreg) {} > }; > > @@ -525,7 +529,7 @@ > > /// addReuse - If we choose to reuse a virtual register that is already > /// available instead of reloading it, remember that we did so. > - void addReuse(unsigned OpNo, unsigned StackSlot, > + void addReuse(unsigned OpNo, unsigned StackSlotOrReMat, > unsigned PhysRegReused, unsigned AssignedPhysReg, > unsigned VirtReg) { > // If the reload is to the assigned register anyway, no undo will be > @@ -533,7 +537,7 @@ > if (PhysRegReused == AssignedPhysReg) return; > > // Otherwise, remember this. > - Reuses.push_back(ReusedOp(OpNo, StackSlot, PhysRegReused, > + Reuses.push_back(ReusedOp(OpNo, StackSlotOrReMat, PhysRegReused, > AssignedPhysReg, VirtReg)); > } > > @@ -553,7 +557,8 @@ > std::map &MaybeDeadStores, > SmallSet &Rejected, > BitVector &RegKills, > - std::vector &KillOps) { > + std::vector &KillOps, > + VirtRegMap &VRM) { > if (Reuses.empty()) return PhysReg; // This is most often empty. > > for (unsigned ro = 0, e = Reuses.size(); ro != e; ++ro) { > @@ -569,7 +574,7 @@ > unsigned NewReg = Op.AssignedPhysReg; > Rejected.insert(PhysReg); > return GetRegForReload(NewReg, MI, Spills, MaybeDeadStores, Rejected, > - RegKills, KillOps); > + RegKills, KillOps, VRM); > } else { > // Otherwise, we might also have a problem if a previously reused > // value aliases the new register. If so, codegen the previous reload > @@ -595,20 +600,26 @@ > // would prefer us to use a different register. > unsigned NewPhysReg = GetRegForReload(NewOp.AssignedPhysReg, > MI, Spills, MaybeDeadStores, > - Rejected, RegKills, KillOps); > + Rejected, RegKills, KillOps, VRM); > > - MRI->loadRegFromStackSlot(*MBB, MI, NewPhysReg, > - NewOp.StackSlot, AliasRC); > + if (NewOp.StackSlotOrReMat > VirtRegMap::MAX_STACK_SLOT) { > + MRI->reMaterialize(*MBB, MI, NewPhysReg, > + VRM.getReMaterializedMI(NewOp.VirtReg)); > + ++NumReMats; > + } else { > + MRI->loadRegFromStackSlot(*MBB, MI, NewPhysReg, > + NewOp.StackSlotOrReMat, AliasRC); > + ++NumLoads; > + } > Spills.ClobberPhysReg(NewPhysReg); > Spills.ClobberPhysReg(NewOp.PhysRegReused); > > // Any stores to this stack slot are not dead anymore. > - MaybeDeadStores.erase(NewOp.StackSlot); > + MaybeDeadStores.erase(NewOp.StackSlotOrReMat); > > MI->getOperand(NewOp.Operand).setReg(NewPhysReg); > > - Spills.addAvailable(NewOp.StackSlot, MI, NewPhysReg); > - ++NumLoads; > + Spills.addAvailable(NewOp.StackSlotOrReMat, MI, NewPhysReg); > MachineBasicBlock::iterator MII = MI; > --MII; > UpdateKills(*MII, RegKills, KillOps); > @@ -640,10 +651,11 @@ > AvailableSpills &Spills, > std::map &MaybeDeadStores, > BitVector &RegKills, > - std::vector &KillOps) { > + std::vector &KillOps, > + VirtRegMap &VRM) { > SmallSet Rejected; > return GetRegForReload(PhysReg, MI, Spills, MaybeDeadStores, Rejected, > - RegKills, KillOps); > + RegKills, KillOps, VRM); > } > }; > } > @@ -651,8 +663,7 @@ > > /// rewriteMBB - Keep track of which spills are available even after the > /// register allocator is done with them. If possible, avoid reloading vregs. > -void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM, > - std::vector &ReMatedMIs) { > +void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM) { > DOUT << MBB.getBasicBlock()->getName() << ":\n"; > > // Spills - Keep track of which spilled values are available in physregs so > @@ -689,28 +700,6 @@ > // Loop over all of the implicit defs, clearing them from our available > // sets. > const TargetInstrDescriptor *TID = MI.getInstrDescriptor(); > - > - // If this instruction is being rematerialized, just remove it! > - int FrameIdx; > - if (TII->isTriviallyReMaterializable(&MI) || > - TII->isLoadFromStackSlot(&MI, FrameIdx)) { > - Erased = true; > - for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) { > - MachineOperand &MO = MI.getOperand(i); > - if (!MO.isRegister() || MO.getReg() == 0) > - continue; // Ignore non-register operands. > - if (MO.isDef() && !VRM.isReMaterialized(MO.getReg())) { > - Erased = false; > - break; > - } > - } > - if (Erased) { > - VRM.RemoveFromFoldedVirtMap(&MI); > - ReMatedMIs.push_back(MI.removeFromParent()); > - goto ProcessNextInst; > - } > - } > - > if (TID->ImplicitDefs) { > const unsigned *ImpDef = TID->ImplicitDefs; > for ( ; *ImpDef; ++ImpDef) { > @@ -738,7 +727,7 @@ > "Not a virtual or a physical register?"); > > unsigned VirtReg = MO.getReg(); > - if (!VRM.hasStackSlot(VirtReg)) { > + if (VRM.isAssignedReg(VirtReg)) { > // This virtual register was assigned a physreg! > unsigned Phys = VRM.getPhys(VirtReg); > MF.setPhysRegUsed(Phys); > @@ -752,12 +741,13 @@ > if (!MO.isUse()) > continue; // Handle defs in the loop below (handle use&def here though) > > - bool doReMat = VRM.isReMaterialized(VirtReg); > - int StackSlot = VRM.getStackSlot(VirtReg); > + bool DoReMat = VRM.isReMaterialized(VirtReg); > + int SSorRMId = DoReMat > + ? VRM.getReMatId(VirtReg) : VRM.getStackSlot(VirtReg); > unsigned PhysReg; > > // Check to see if this stack slot is available. > - if ((PhysReg = Spills.getSpillSlotPhysReg(StackSlot))) { > + if ((PhysReg = Spills.getSpillSlotOrReMatPhysReg(SSorRMId))) { > // This spilled operand might be part of a two-address operand. If this > // is the case, then changing it will necessarily require changing the > // def part of the instruction as well. However, in some cases, we > @@ -771,16 +761,16 @@ > // Okay, we have a two address operand. We can reuse this physreg as > // long as we are allowed to clobber the value and there isn't an > // earlier def that has already clobbered the physreg. > - CanReuse = Spills.canClobberPhysReg(StackSlot) && > + CanReuse = Spills.canClobberPhysReg(SSorRMId) && > !ReusedOperands.isClobbered(PhysReg); > } > > if (CanReuse) { > // If this stack slot value is already available, reuse it! > - if (StackSlot > VirtRegMap::MAX_STACK_SLOT) > - DOUT << "Reusing RM#" << StackSlot-VirtRegMap::MAX_STACK_SLOT-1; > + if (SSorRMId > VirtRegMap::MAX_STACK_SLOT) > + DOUT << "Reusing RM#" << SSorRMId-VirtRegMap::MAX_STACK_SLOT-1; > else > - DOUT << "Reusing SS#" << StackSlot; > + DOUT << "Reusing SS#" << SSorRMId; > DOUT << " from physreg " > << MRI->getName(PhysReg) << " for vreg" > << VirtReg <<" instead of reloading into physreg " > @@ -801,7 +791,7 @@ > // or R0 and R1 might not be compatible with each other. In this > // case, we actually insert a reload for V1 in R1, ensuring that > // we can get at R0 or its alias. > - ReusedOperands.addReuse(i, StackSlot, PhysReg, > + ReusedOperands.addReuse(i, SSorRMId, PhysReg, > VRM.getPhys(VirtReg), VirtReg); > if (ti != -1) > // Only mark it clobbered if this is a use&def operand. > @@ -829,16 +819,16 @@ > // reuser. > if (ReusedOperands.hasReuses()) > DesignatedReg = ReusedOperands.GetRegForReload(DesignatedReg, &MI, > - Spills, MaybeDeadStores, RegKills, KillOps); > + Spills, MaybeDeadStores, RegKills, KillOps, VRM); > > // If the mapped designated register is actually the physreg we have > // incoming, we don't need to inserted a dead copy. > if (DesignatedReg == PhysReg) { > // If this stack slot value is already available, reuse it! > - if (StackSlot > VirtRegMap::MAX_STACK_SLOT) > - DOUT << "Reusing RM#" << StackSlot-VirtRegMap::MAX_STACK_SLOT-1; > + if (SSorRMId > VirtRegMap::MAX_STACK_SLOT) > + DOUT << "Reusing RM#" << SSorRMId-VirtRegMap::MAX_STACK_SLOT-1; > else > - DOUT << "Reusing SS#" << StackSlot; > + DOUT << "Reusing SS#" << SSorRMId; > DOUT << " from physreg " << MRI->getName(PhysReg) << " for vreg" > << VirtReg > << " instead of reloading into same physreg.\n"; > @@ -859,7 +849,7 @@ > // This invalidates DesignatedReg. > Spills.ClobberPhysReg(DesignatedReg); > > - Spills.addAvailable(StackSlot, &MI, DesignatedReg); > + Spills.addAvailable(SSorRMId, &MI, DesignatedReg); > MI.getOperand(i).setReg(DesignatedReg); > DOUT << '\t' << *prior(MII); > ++NumReused; > @@ -877,24 +867,24 @@ > // reuser. > if (ReusedOperands.hasReuses()) > PhysReg = ReusedOperands.GetRegForReload(PhysReg, &MI, > - Spills, MaybeDeadStores, RegKills, KillOps); > + Spills, MaybeDeadStores, RegKills, KillOps, VRM); > > MF.setPhysRegUsed(PhysReg); > ReusedOperands.markClobbered(PhysReg); > - if (doReMat) { > + if (DoReMat) { > MRI->reMaterialize(MBB, &MI, PhysReg, VRM.getReMaterializedMI(VirtReg)); > ++NumReMats; > } else { > - MRI->loadRegFromStackSlot(MBB, &MI, PhysReg, StackSlot, RC); > + MRI->loadRegFromStackSlot(MBB, &MI, PhysReg, SSorRMId, RC); > ++NumLoads; > } > // This invalidates PhysReg. > Spills.ClobberPhysReg(PhysReg); > > // Any stores to this stack slot are not dead anymore. > - if (!doReMat) > - MaybeDeadStores.erase(StackSlot); > - Spills.addAvailable(StackSlot, &MI, PhysReg); > + if (!DoReMat) > + MaybeDeadStores.erase(SSorRMId); > + Spills.addAvailable(SSorRMId, &MI, PhysReg); > // Assumes this is the last use. IsKill will be unset if reg is reused > // unless it's a two-address operand. > if (TID->getOperandConstraint(i, TOI::TIED_TO) == -1) > @@ -914,7 +904,7 @@ > << I->second.second; > unsigned VirtReg = I->second.first; > VirtRegMap::ModRef MR = I->second.second; > - if (!VRM.hasStackSlot(VirtReg)) { > + if (VRM.isAssignedReg(VirtReg)) { > DOUT << ": No stack slot!\n"; > continue; > } > @@ -929,7 +919,7 @@ > if (FrameIdx == SS) { > // If this spill slot is available, turn it into a copy (or nothing) > // instead of leaving it as a load! > - if (unsigned InReg = Spills.getSpillSlotPhysReg(SS)) { > + if (unsigned InReg = Spills.getSpillSlotOrReMatPhysReg(SS)) { > DOUT << "Promoted Load To Copy: " << MI; > if (DestReg != InReg) { > MRI->copyRegToReg(MBB, &MI, DestReg, InReg, > @@ -974,7 +964,7 @@ > // the value, the value is not available anymore. > if (MR & VirtRegMap::isMod) { > // Notice that the value in this stack slot has been modified. > - Spills.ModifyStackSlot(SS); > + Spills.ModifyStackSlotOrReMat(SS); > > // If this is *just* a mod of the value, check to see if this is just a > // store to the spill slot (i.e. the spill got merged into the copy). If > @@ -1053,7 +1043,7 @@ > // Another def has taken the assigned physreg. It must have been a > // use&def which got it due to reuse. Undo the reuse! > PhysReg = ReusedOperands.GetRegForReload(PhysReg, &MI, > - Spills, MaybeDeadStores, RegKills, KillOps); > + Spills, MaybeDeadStores, RegKills, KillOps, VRM); > } > } > > @@ -1077,7 +1067,7 @@ > // If the stack slot value was previously available in some other > // register, change it now. Otherwise, make the register available, > // in PhysReg. > - Spills.ModifyStackSlot(StackSlot); > + Spills.ModifyStackSlotOrReMat(StackSlot); > Spills.ClobberPhysReg(PhysReg); > Spills.addAvailable(StackSlot, LastStore, PhysReg); > ++NumStores; > > Modified: llvm/trunk/lib/CodeGen/VirtRegMap.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/VirtRegMap.h?rev=41060&r1=41059&r2=41060&view=diff > > ============================================================================== > --- llvm/trunk/lib/CodeGen/VirtRegMap.h (original) > +++ llvm/trunk/lib/CodeGen/VirtRegMap.h Mon Aug 13 18:45:17 2007 > @@ -55,6 +55,7 @@ > /// which corresponds to the stack slot this register is spilled > /// at. > IndexedMap Virt2StackSlotMap; > + IndexedMap Virt2ReMatIdMap; > /// MI2VirtMap - This is MachineInstr to virtual register > /// mapping. In the case of memory spill code being folded into > /// instructions, we need to know which virtual register was > @@ -64,7 +65,7 @@ > /// ReMatMap - This is virtual register to re-materialized instruction > /// mapping. Each virtual register whose definition is going to be > /// re-materialized has an entry in it. > - std::map ReMatMap; > + IndexedMap ReMatMap; > > /// ReMatId - Instead of assigning a stack slot to a to be rematerialized > /// virtual register, an unique id is being assigned. This keeps track of > @@ -119,10 +120,11 @@ > grow(); > } > > - /// @brief returns true is the specified virtual register is > - /// mapped to a stack slot > - bool hasStackSlot(unsigned virtReg) const { > - return getStackSlot(virtReg) != NO_STACK_SLOT; > + /// @brief returns true is the specified virtual register is not > + /// mapped to a stack slot or rematerialized. > + bool isAssignedReg(unsigned virtReg) const { > + return getStackSlot(virtReg) == NO_STACK_SLOT && > + getReMatId(virtReg) == NO_STACK_SLOT; > } > > /// @brief returns the stack slot mapped to the specified virtual > @@ -132,6 +134,13 @@ > return Virt2StackSlotMap[virtReg]; > } > > + /// @brief returns the rematerialization id mapped to the specified virtual > + /// register > + int getReMatId(unsigned virtReg) const { > + assert(MRegisterInfo::isVirtualRegister(virtReg)); > + return Virt2ReMatIdMap[virtReg]; > + } > + > /// @brief create a mapping for the specifed virtual register to > /// the next available stack slot > int assignVirt2StackSlot(unsigned virtReg); > @@ -142,22 +151,26 @@ > /// @brief assign an unique re-materialization id to the specified > /// virtual register. > int assignVirtReMatId(unsigned virtReg); > + /// @brief assign an unique re-materialization id to the specified > + /// virtual register. > + void assignVirtReMatId(unsigned virtReg, int id); > > /// @brief returns true if the specified virtual register is being > /// re-materialized. > bool isReMaterialized(unsigned virtReg) const { > - return ReMatMap.count(virtReg) != 0; > + return ReMatMap[virtReg] != NULL; > } > > /// @brief returns the original machine instruction being re-issued > /// to re-materialize the specified virtual register. > - const MachineInstr *getReMaterializedMI(unsigned virtReg) { > + MachineInstr *getReMaterializedMI(unsigned virtReg) const { > return ReMatMap[virtReg]; > } > > /// @brief records the specified virtual register will be > /// re-materialized and the original instruction which will be re-issed > - /// for this purpose. > + /// for this purpose. If parameter all is true, then all uses of the > + /// registers are rematerialized and it's safe to delete the definition. > void setVirtIsReMaterialized(unsigned virtReg, MachineInstr *def) { > ReMatMap[virtReg] = def; > } > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > -------------- next part -------------- A non-text attachment was scrubbed... Name: bugpoint-reduced-simplified.bc Type: application/octet-stream Size: 2400 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20070814/e73edf73/attachment.obj From resistor at mac.com Tue Aug 14 13:33:27 2007 From: resistor at mac.com (Owen Anderson) Date: Tue, 14 Aug 2007 18:33:27 -0000 Subject: [llvm-commits] [llvm] r41081 - /llvm/trunk/lib/Transforms/Scalar/GVN.cpp Message-ID: <200708141833.l7EIXRIj030330@zion.cs.uiuc.edu> Author: resistor Date: Tue Aug 14 13:33:27 2007 New Revision: 41081 URL: http://llvm.org/viewvc/llvm-project?rev=41081&view=rev Log: Eliminate PHI nodes with constant values during normal GVN processing, even when they're not related to eliminating a load. Modified: llvm/trunk/lib/Transforms/Scalar/GVN.cpp Modified: llvm/trunk/lib/Transforms/Scalar/GVN.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/GVN.cpp?rev=41081&r1=41080&r2=41081&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/GVN.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/GVN.cpp Tue Aug 14 13:33:27 2007 @@ -946,7 +946,27 @@ unsigned num = VN.lookup_or_add(I); - if (currAvail.test(num)) { + if (PHINode* p = dyn_cast(I)) { + Value* constVal = p->hasConstantValue(); + + if (constVal) { + if (Instruction* inst = dyn_cast(constVal)) { + DominatorTree &DT = getAnalysis(); + if (DT.dominates(inst, p)) { + for (PhiMapType::iterator PI = phiMap.begin(), PE = phiMap.end(); + PI != PE; ++PI) + if (PI->second.count(p)) + PI->second.erase(p); + + p->replaceAllUsesWith(inst); + toErase.push_back(p); + } + } else { + p->replaceAllUsesWith(constVal); + toErase.push_back(p); + } + } + } else if (currAvail.test(num)) { Value* repl = find_leader(currAvail, num); VN.erase(I); From dpatel at apple.com Tue Aug 14 13:35:57 2007 From: dpatel at apple.com (Devang Patel) Date: Tue, 14 Aug 2007 18:35:57 -0000 Subject: [llvm-commits] [llvm] r41082 - /llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp Message-ID: <200708141835.l7EIZvms030394@zion.cs.uiuc.edu> Author: dpatel Date: Tue Aug 14 13:35:57 2007 New Revision: 41082 URL: http://llvm.org/viewvc/llvm-project?rev=41082&view=rev Log: Fix dominance frontier update while removing blocks. Modified: llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp Modified: llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp?rev=41082&r1=41081&r2=41082&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp Tue Aug 14 13:35:57 2007 @@ -97,8 +97,10 @@ /// loop may not be eliminated. bool safeExitBlock(SplitInfo &SD, BasicBlock *BB); - /// removeBlocks - Remove basic block BB and all blocks dominated by BB. - void removeBlocks(BasicBlock *InBB, Loop *LP); + /// removeBlocks - Remove basic block DeadBB and all blocks dominated by DeadBB. + /// This routine is used to remove split condition's dead branch, dominated by + /// DeadBB. LiveBB dominates split conidition's other branch. + void removeBlocks(BasicBlock *DeadBB, Loop *LP, BasicBlock *LiveBB); /// Find cost of spliting loop L. unsigned findSplitCost(Loop *L, SplitInfo &SD); @@ -589,11 +591,14 @@ return Cost; } -/// removeBlocks - Remove basic block BB and all blocks dominated by BB. -void LoopIndexSplit::removeBlocks(BasicBlock *InBB, Loop *LP) { +/// removeBlocks - Remove basic block DeadBB and all blocks dominated by DeadBB. +/// This routine is used to remove split condition's dead branch, dominated by +/// DeadBB. LiveBB dominates split conidition's other branch. +void LoopIndexSplit::removeBlocks(BasicBlock *DeadBB, Loop *LP, + BasicBlock *LiveBB) { SmallVector, 8> WorkList; - WorkList.push_back(std::make_pair(InBB, succ_begin(InBB))); + WorkList.push_back(std::make_pair(DeadBB, succ_begin(DeadBB))); while (!WorkList.empty()) { BasicBlock *BB = WorkList.back(). first; succ_iterator SIter =WorkList.back().second; @@ -630,10 +635,28 @@ break; } + DT->changeImmediateDominator(SuccBB, LiveBB); + // If BB is not dominating SuccBB then SuccBB is in BB's dominance // frontiner. DominanceFrontier::iterator BBDF = DF->find(BB); DF->removeFromFrontier(BBDF, SuccBB); + + // LiveBB is now dominating SuccBB. Which means SuccBB's dominance + // frontier is member of LiveBB's dominance frontier. However, SuccBB + // itself is not member of LiveBB's dominance frontier. + DominanceFrontier::iterator LiveDF = DF->find(LiveBB); + DominanceFrontier::iterator SuccDF = DF->find(SuccBB); + DominanceFrontier::DomSetType SuccBBSet = SuccDF->second; + for (DominanceFrontier::DomSetType::iterator SuccBBSetI = SuccBBSet.begin(), + SuccBBSetE = SuccBBSet.end(); SuccBBSetI != SuccBBSetE; ++SuccBBSetI) { + BasicBlock *DFMember = *SuccBBSetI; + // Insert only if LiveBB dominates DFMember. + if (!DT->dominates(LiveBB, DFMember)) + LiveDF->second.insert(DFMember); + } + DF->removeFromFrontier(LiveDF, SuccBB); + } } } @@ -747,7 +770,7 @@ BranchInst *BR = cast(SplitBlock->getTerminator()); BasicBlock *FBB = BR->getSuccessor(1); BR->setUnconditionalDest(BR->getSuccessor(0)); - removeBlocks(FBB, L); + removeBlocks(FBB, L, BR->getSuccessor(0)); //[*] Update True loop's exit value using new exit value. ExitCondition->setOperand(ExitValueNum, TLExitValue); @@ -757,7 +780,7 @@ BranchInst *FBR = cast(FSplitBlock->getTerminator()); BasicBlock *TBB = FBR->getSuccessor(0); FBR->setUnconditionalDest(FBR->getSuccessor(1)); - removeBlocks(TBB, FalseLoop); + removeBlocks(TBB, FalseLoop, cast(FBR->getSuccessor(0))); return true; } From rspencer at reidspencer.com Tue Aug 14 14:25:08 2007 From: rspencer at reidspencer.com (Reid Spencer) Date: Tue, 14 Aug 2007 12:25:08 -0700 Subject: [llvm-commits] [llvm] r41073 - /llvm/trunk/test/CodeGen/X86/constant-pool-remat-0.ll In-Reply-To: <200708141619.l7EGJaA9025176@zion.cs.uiuc.edu> References: <200708141619.l7EGJaA9025176@zion.cs.uiuc.edu> Message-ID: <1187119508.8995.226.camel@bashful.x10sys.com> Chris On Tue, 2007-08-14 at 16:19 +0000, Chris Lattner wrote: > Author: lattner > Date: Tue Aug 14 11:19:35 2007 > New Revision: 41073 > > URL: http://llvm.org/viewvc/llvm-project?rev=41073&view=rev > Log: > tcl seems to hate |& for some reason. > > Modified: > llvm/trunk/test/CodeGen/X86/constant-pool-remat-0.ll > > Modified: llvm/trunk/test/CodeGen/X86/constant-pool-remat-0.ll > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/constant-pool-remat-0.ll?rev=41073&r1=41072&r2=41073&view=diff > > ============================================================================== > --- llvm/trunk/test/CodeGen/X86/constant-pool-remat-0.ll (original) > +++ llvm/trunk/test/CodeGen/X86/constant-pool-remat-0.ll Tue Aug 14 11:19:35 2007 > @@ -1,6 +1,6 @@ > ; RUN: llvm-as < %s | llc -march=x86-64 | grep LCPI | count 3 > ; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep LCPI | count 3 > -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -stats |& | grep asm-printer | grep 13 |& works fine (see test/Feature/load_module.ll). The problem is the double pipe. |& | is not legal (no command in the pipeline). |& means send both stdin and stderr through the pipe, not just stderr. Reid. > +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -stats -info-output-file - | grep asm-printer | grep 9 > > declare fastcc float @qux(float %y) > > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From clattner at apple.com Tue Aug 14 14:51:12 2007 From: clattner at apple.com (Chris Lattner) Date: Tue, 14 Aug 2007 12:51:12 -0700 Subject: [llvm-commits] [llvm] r41073 - /llvm/trunk/test/CodeGen/X86/constant-pool-remat-0.ll In-Reply-To: <1187119508.8995.226.camel@bashful.x10sys.com> References: <200708141619.l7EGJaA9025176@zion.cs.uiuc.edu> <1187119508.8995.226.camel@bashful.x10sys.com> Message-ID: <502FE61A-7397-46F5-8796-5EA62D6BBDC0@apple.com> On Aug 14, 2007, at 12:25 PM, Reid Spencer wrote: > Chris > > On Tue, 2007-08-14 at 16:19 +0000, Chris Lattner wrote: >> Author: lattner >> Date: Tue Aug 14 11:19:35 2007 >> New Revision: 41073 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=41073&view=rev >> Log: >> tcl seems to hate |& for some reason. >> >> Modified: >> llvm/trunk/test/CodeGen/X86/constant-pool-remat-0.ll >> >> Modified: llvm/trunk/test/CodeGen/X86/constant-pool-remat-0.ll >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ >> X86/constant-pool-remat-0.ll?rev=41073&r1=41072&r2=41073&view=diff >> >> ===================================================================== >> ========= >> --- llvm/trunk/test/CodeGen/X86/constant-pool-remat-0.ll (original) >> +++ llvm/trunk/test/CodeGen/X86/constant-pool-remat-0.ll Tue Aug >> 14 11:19:35 2007 >> @@ -1,6 +1,6 @@ >> ; RUN: llvm-as < %s | llc -march=x86-64 | grep LCPI | count 3 >> ; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep LCPI | >> count 3 >> -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -stats |& | >> grep asm-printer | grep 13 > > |& works fine (see test/Feature/load_module.ll). The problem is the > double pipe. |& | is not legal (no command in the pipeline). |& means > send both stdin and stderr through the pipe, not just stderr. Actually no it doesn't. I tried just |& and it didn't detect the failure. -Chris From evan.cheng at apple.com Tue Aug 14 15:23:15 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 14 Aug 2007 20:23:15 -0000 Subject: [llvm-commits] [llvm] r41083 - /llvm/trunk/lib/CodeGen/VirtRegMap.cpp Message-ID: <200708142023.l7EKNGFi001951@zion.cs.uiuc.edu> Author: evancheng Date: Tue Aug 14 15:23:13 2007 New Revision: 41083 URL: http://llvm.org/viewvc/llvm-project?rev=41083&view=rev Log: If a MI's def is remat as well as spilled, and the store is later deemed dead, mark the def operand as isDead. Modified: llvm/trunk/lib/CodeGen/VirtRegMap.cpp Modified: llvm/trunk/lib/CodeGen/VirtRegMap.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/VirtRegMap.cpp?rev=41083&r1=41082&r2=41083&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/VirtRegMap.cpp (original) +++ llvm/trunk/lib/CodeGen/VirtRegMap.cpp Tue Aug 14 15:23:13 2007 @@ -433,12 +433,39 @@ /// InvalidateKills - MI is going to be deleted. If any of its operands are /// marked kill, then invalidate the information. static void InvalidateKills(MachineInstr &MI, BitVector &RegKills, - std::vector &KillOps) { + std::vector &KillOps, + MachineInstr *NewDef = NULL) { for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) { MachineOperand &MO = MI.getOperand(i); if (!MO.isReg() || !MO.isUse() || !MO.isKill()) continue; unsigned Reg = MO.getReg(); + if (NewDef) { + // Due to remat, it's possible this reg isn't being reused. That is, + // the def of this reg (by prev MI) is now dead. + bool FoundUse = false, Done = false; + MachineBasicBlock::iterator I = MI, E = NewDef; + ++I; ++E; + for (; !Done && I != E; ++I) { + MachineInstr *NMI = I; + for (unsigned j = 0, ee = NMI->getNumOperands(); j != ee; ++j) { + MachineOperand &MO = NMI->getOperand(j); + if (!MO.isReg() || MO.getReg() != Reg) + continue; + if (MO.isUse()) + FoundUse = true; + Done = true; // Stop after scanning all the operands of this MI. + } + } + if (!FoundUse) { + // Def is dead! + MachineBasicBlock::iterator MII = MI; + MachineInstr *DefMI = prior(MII); + MachineOperand *DefOp = DefMI->findRegisterDefOperand(Reg); + assert(DefOp && "Missing def?"); + DefOp->setIsDead(); + } + } if (KillOps[Reg] == &MO) { RegKills.reset(Reg); KillOps[Reg] = NULL; @@ -1081,7 +1108,7 @@ if (LastStore) { DOUT << "Removed dead store:\t" << *LastStore; ++NumDSE; - InvalidateKills(*LastStore, RegKills, KillOps); + InvalidateKills(*LastStore, RegKills, KillOps, &MI); MBB.erase(LastStore); VRM.RemoveFromFoldedVirtMap(LastStore); } From evan.cheng at apple.com Tue Aug 14 16:07:44 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 14 Aug 2007 14:07:44 -0700 Subject: [llvm-commits] [llvm] r41060 - in /llvm/trunk: include/llvm/CodeGen/LiveInterval.h include/llvm/CodeGen/LiveIntervalAnalysis.h lib/CodeGen/LiveIntervalAnalysis.cpp lib/CodeGen/RegAllocLinearScan.cpp lib/CodeGen/SimpleRegisterCoalescing.cpp lib/Co In-Reply-To: <9c10c9f0708141123w214fdd81u97b84c06e5416e61@mail.gmail.com> References: <9c10c9f0708141123w214fdd81u97b84c06e5416e61@mail.gmail.com> Message-ID: Being fixed. Evan On Aug 14, 2007, at 11:23 AM, Lauro Ramos Venancio wrote: > Hi Evan, > > This revision caused some regressions (see > http://llvm.org/nightlytest/test.php?machine=142&night=3420). A > testcase is attached. > > > laurov at laurov-desktop:/test_1710/llvm-test/MultiSource/Benchmarks/ > MiBench/consumer-typeset$ > ~/llvm/llvm/build/Debug/bin/llc < bugpoint-reduced-simplified.bc > llc: /home/laurov/llvm/llvm/lib/CodeGen/RegisterScavenging.cpp:142: > void llvm::RegScavenger::forward(): Assertion `(isUnused(Reg) || > isReserved(Reg)) && "Re-defining a live register!"' failed. > > Lauro > > 2007/8/13, Evan Cheng : >> Author: evancheng >> Date: Mon Aug 13 18:45:17 2007 >> New Revision: 41060 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=41060&view=rev >> Log: >> Re-implement trivial rematerialization. This allows def MIs whose >> live intervals that are coalesced to be rematerialized. >> >> Modified: >> llvm/trunk/include/llvm/CodeGen/LiveInterval.h >> llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h >> llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp >> llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp >> llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp >> llvm/trunk/lib/CodeGen/VirtRegMap.cpp >> llvm/trunk/lib/CodeGen/VirtRegMap.h >> >> Modified: llvm/trunk/include/llvm/CodeGen/LiveInterval.h >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ >> CodeGen/LiveInterval.h?rev=41060&r1=41059&r2=41060&view=diff >> >> ===================================================================== >> ========= >> --- llvm/trunk/include/llvm/CodeGen/LiveInterval.h (original) >> +++ llvm/trunk/include/llvm/CodeGen/LiveInterval.h Mon Aug 13 >> 18:45:17 2007 >> @@ -83,7 +83,6 @@ >> unsigned reg; // the register of this interval >> unsigned preference; // preferred register to allocate for >> this interval >> float weight; // weight of this interval >> - MachineInstr* remat; // definition if the definition >> rematerializable >> Ranges ranges; // the ranges in which this register is >> live >> >> /// ValueNumberInfo - If the value number definition is >> undefined (e.g. phi >> @@ -101,7 +100,7 @@ >> public: >> >> LiveInterval(unsigned Reg, float Weight) >> - : reg(Reg), preference(0), weight(Weight), remat(NULL) { >> + : reg(Reg), preference(0), weight(Weight) { >> } >> >> typedef Ranges::iterator iterator; >> @@ -128,7 +127,6 @@ >> void swap(LiveInterval& other) { >> std::swap(reg, other.reg); >> std::swap(weight, other.weight); >> - std::swap(remat, other.remat); >> std::swap(ranges, other.ranges); >> std::swap(ValueNumberInfo, other.ValueNumberInfo); >> } >> >> Modified: llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ >> CodeGen/LiveIntervalAnalysis.h?rev=41060&r1=41059&r2=41060&view=diff >> >> ===================================================================== >> ========= >> --- llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h (original) >> +++ llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h Mon Aug >> 13 18:45:17 2007 >> @@ -25,6 +25,8 @@ >> #include "llvm/ADT/BitVector.h" >> #include "llvm/ADT/DenseMap.h" >> #include "llvm/ADT/IndexedMap.h" >> +#include "llvm/ADT/SmallPtrSet.h" >> +#include "llvm/ADT/SmallVector.h" >> >> namespace llvm { >> >> @@ -41,9 +43,9 @@ >> const TargetInstrInfo* tii_; >> LiveVariables* lv_; >> >> - /// MBB2IdxMap - The index of the first instruction in the >> specified basic >> - /// block. >> - std::vector MBB2IdxMap; >> + /// MBB2IdxMap - The indexes of the first and last >> instructions in the >> + /// specified basic block. >> + std::vector > MBB2IdxMap; >> >> typedef std::map Mi2IndexMap; >> Mi2IndexMap mi2iMap_; >> @@ -56,6 +58,8 @@ >> >> BitVector allocatableRegs_; >> >> + std::vector ClonedMIs; >> + >> public: >> static char ID; // Pass identification, replacement for typeid >> LiveIntervals() : MachineFunctionPass((intptr_t)&ID) {} >> @@ -118,10 +122,19 @@ >> unsigned getMBBStartIdx(MachineBasicBlock *MBB) const { >> return getMBBStartIdx(MBB->getNumber()); >> } >> - >> unsigned getMBBStartIdx(unsigned MBBNo) const { >> assert(MBBNo < MBB2IdxMap.size() && "Invalid MBB number!"); >> - return MBB2IdxMap[MBBNo]; >> + return MBB2IdxMap[MBBNo].first; >> + } >> + >> + /// getMBBEndIdx - Return the store index of the last >> instruction in the >> + /// specified MachineBasicBlock. >> + unsigned getMBBEndIdx(MachineBasicBlock *MBB) const { >> + return getMBBEndIdx(MBB->getNumber()); >> + } >> + unsigned getMBBEndIdx(unsigned MBBNo) const { >> + assert(MBBNo < MBB2IdxMap.size() && "Invalid MBB number!"); >> + return MBB2IdxMap[MBBNo].second; >> } >> >> /// getInstructionIndex - returns the base index of instr >> @@ -155,8 +168,7 @@ >> const >> std::vector &LRs); >> >> std::vector addIntervalsForSpills(const >> LiveInterval& i, >> - VirtRegMap& >> vrm, >> - int slot); >> + VirtRegMap& vrm, >> unsigned reg); >> >> // Interval removal >> >> @@ -225,6 +237,17 @@ >> unsigned MIIdx, >> LiveInterval &interval, bool >> isAlias = false); >> >> + /// isReMaterializable - Returns true if the definition MI of >> the specified >> + /// val# of the specified interval is re-materializable. >> + bool isReMaterializable(const LiveInterval &li, unsigned ValNum, >> + MachineInstr *MI); >> + >> + /// tryFoldMemoryOperand - Attempts to fold a spill / restore >> from slot >> + /// to reg into ith operand of specified MI. If it is >> successul, MI is >> + /// updated with the newly created MI and returns true. >> + bool tryFoldMemoryOperand(MachineInstr* &MI, VirtRegMap &vrm, >> unsigned index, >> + unsigned i, int slot, unsigned reg); >> + >> static LiveInterval createInterval(unsigned Reg); >> >> void printRegName(unsigned reg) const; >> >> Modified: llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/ >> LiveIntervalAnalysis.cpp?rev=41060&r1=41059&r2=41060&view=diff >> >> ===================================================================== >> ========= >> --- llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp (original) >> +++ llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp Mon Aug 13 >> 18:45:17 2007 >> @@ -30,7 +30,6 @@ >> #include "llvm/Target/TargetMachine.h" >> #include "llvm/Support/CommandLine.h" >> #include "llvm/Support/Debug.h" >> -#include "llvm/ADT/SmallSet.h" >> #include "llvm/ADT/Statistic.h" >> #include "llvm/ADT/STLExtras.h" >> #include >> @@ -60,6 +59,8 @@ >> mi2iMap_.clear(); >> i2miMap_.clear(); >> r2iMap_.clear(); >> + for (unsigned i = 0, e = ClonedMIs.size(); i != e; ++i) >> + delete ClonedMIs[i]; >> } >> >> /// runOnMachineFunction - Register allocate the whole function >> @@ -74,13 +75,12 @@ >> >> // Number MachineInstrs and MachineBasicBlocks. >> // Initialize MBB indexes to a sentinal. >> - MBB2IdxMap.resize(mf_->getNumBlockIDs(), ~0U); >> + MBB2IdxMap.resize(mf_->getNumBlockIDs(), std::make_pair(~0U,~0U)); >> >> unsigned MIIndex = 0; >> for (MachineFunction::iterator MBB = mf_->begin(), E = mf_->end(); >> MBB != E; ++MBB) { >> - // Set the MBB2IdxMap entry for this MBB. >> - MBB2IdxMap[MBB->getNumber()] = MIIndex; >> + unsigned StartIdx = MIIndex; >> >> for (MachineBasicBlock::iterator I = MBB->begin(), E = MBB- >> >end(); >> I != E; ++I) { >> @@ -89,6 +89,9 @@ >> i2miMap_.push_back(I); >> MIIndex += InstrSlots::NUM; >> } >> + >> + // Set the MBB2IdxMap entry for this MBB. >> + MBB2IdxMap[MBB->getNumber()] = std::make_pair(StartIdx, >> MIIndex - 1); >> } >> >> computeIntervals(); >> @@ -175,8 +178,76 @@ >> return NewLI; >> } >> >> +/// isReDefinedByTwoAddr - Returns true if the Reg re-definition >> is due to >> +/// two addr elimination. >> +static bool isReDefinedByTwoAddr(MachineInstr *MI, unsigned Reg, >> + const TargetInstrInfo *TII) { >> + for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { >> + MachineOperand &MO1 = MI->getOperand(i); >> + if (MO1.isRegister() && MO1.isDef() && MO1.getReg() == Reg) { >> + for (unsigned j = i+1; j < e; ++j) { >> + MachineOperand &MO2 = MI->getOperand(j); >> + if (MO2.isRegister() && MO2.isUse() && MO2.getReg() == >> Reg && >> + MI->getInstrDescriptor()-> >> + getOperandConstraint(j, TOI::TIED_TO) == (int)i) >> + return true; >> + } >> + } >> + } >> + return false; >> +} >> + >> +/// isReMaterializable - Returns true if the definition MI of the >> specified >> +/// val# of the specified interval is re-materializable. >> +bool LiveIntervals::isReMaterializable(const LiveInterval &li, >> unsigned ValNum, >> + MachineInstr *MI) { >> + if (tii_->isTriviallyReMaterializable(MI)) >> + return true; >> + >> + int FrameIdx = 0; >> + if (!tii_->isLoadFromStackSlot(MI, FrameIdx) || >> + !mf_->getFrameInfo()->isFixedObjectIndex(FrameIdx)) >> + return false; >> + >> + // This is a load from fixed stack slot. It can be >> rematerialized unless it's >> + // re-defined by a two-address instruction. >> + for (unsigned i = 0, e = li.getNumValNums(); i != e; ++i) { >> + if (i == ValNum) >> + continue; >> + unsigned DefIdx = li.getDefForValNum(i); >> + if (DefIdx == ~1U) >> + continue; // Dead val#. >> + MachineInstr *DefMI = (DefIdx == ~0u) >> + ? NULL : getInstructionFromIndex(DefIdx); >> + if (DefMI && isReDefinedByTwoAddr(DefMI, li.reg, tii_)) >> + return false; >> + } >> + return true; >> +} >> + >> +bool LiveIntervals::tryFoldMemoryOperand(MachineInstr* &MI, >> VirtRegMap &vrm, >> + unsigned index, unsigned i, >> + int slot, unsigned reg) { >> + MachineInstr *fmi = mri_->foldMemoryOperand(MI, i, slot); >> + if (fmi) { >> + // Attempt to fold the memory reference into the instruction. If >> + // we can do this, we don't need to insert spill code. >> + if (lv_) >> + lv_->instructionChanged(MI, fmi); >> + MachineBasicBlock &MBB = *MI->getParent(); >> + vrm.virtFolded(reg, MI, i, fmi); >> + mi2iMap_.erase(MI); >> + i2miMap_[index/InstrSlots::NUM] = fmi; >> + mi2iMap_[fmi] = index; >> + MI = MBB.insert(MBB.erase(MI), fmi); >> + ++numFolded; >> + return true; >> + } >> + return false; >> +} >> + >> std::vector LiveIntervals:: >> -addIntervalsForSpills(const LiveInterval &li, VirtRegMap &vrm, >> int slot) { >> +addIntervalsForSpills(const LiveInterval &li, VirtRegMap &vrm, >> unsigned reg) { >> // since this is called after the analysis is done we don't >> know if >> // LiveVariables is available >> lv_ = getAnalysisToUpdate(); >> @@ -192,10 +263,72 @@ >> >> const TargetRegisterClass* rc = mf_->getSSARegMap()->getRegClass >> (li.reg); >> >> + unsigned NumValNums = li.getNumValNums(); >> + SmallVector ReMatDefs; >> + ReMatDefs.resize(NumValNums, NULL); >> + SmallVector ReMatOrigDefs; >> + ReMatOrigDefs.resize(NumValNums, NULL); >> + SmallVector ReMatIds; >> + ReMatIds.resize(NumValNums, VirtRegMap::MAX_STACK_SLOT); >> + BitVector ReMatDelete(NumValNums); >> + unsigned slot = VirtRegMap::MAX_STACK_SLOT; >> + >> + bool NeedStackSlot = false; >> + for (unsigned i = 0; i != NumValNums; ++i) { >> + unsigned DefIdx = li.getDefForValNum(i); >> + if (DefIdx == ~1U) >> + continue; // Dead val#. >> + // Is the def for the val# rematerializable? >> + MachineInstr *DefMI = (DefIdx == ~0u) >> + ? NULL : getInstructionFromIndex(DefIdx); >> + if (DefMI && isReMaterializable(li, i, DefMI)) { >> + // Remember how to remat the def of this val#. >> + ReMatOrigDefs[i] = DefMI; >> + // Original def may be modified so we have to make a copy >> here. vrm must >> + // delete these! >> + ReMatDefs[i] = DefMI = DefMI->clone(); >> + vrm.setVirtIsReMaterialized(reg, DefMI); >> + >> + bool CanDelete = true; >> + const SmallVector &kills = li.getKillsForValNum >> (i); >> + for (unsigned j = 0, ee = kills.size(); j != ee; ++j) { >> + unsigned KillIdx = kills[j]; >> + MachineInstr *KillMI = (KillIdx & 1) >> + ? NULL : getInstructionFromIndex(KillIdx); >> + // Kill is a phi node, not all of its uses can be >> rematerialized. >> + // It must not be deleted. >> + if (!KillMI) { >> + CanDelete = false; >> + // Need a stack slot if there is any live range where >> uses cannot be >> + // rematerialized. >> + NeedStackSlot = true; >> + break; >> + } >> + } >> + >> + if (CanDelete) >> + ReMatDelete.set(i); >> + } else { >> + // Need a stack slot if there is any live range where uses >> cannot be >> + // rematerialized. >> + NeedStackSlot = true; >> + } >> + } >> + >> + // One stack slot per live interval. >> + if (NeedStackSlot) >> + slot = vrm.assignVirt2StackSlot(reg); >> + >> for (LiveInterval::Ranges::const_iterator >> - i = li.ranges.begin(), e = li.ranges.end(); i != e; ++i) { >> - unsigned index = getBaseIndex(i->start); >> - unsigned end = getBaseIndex(i->end-1) + InstrSlots::NUM; >> + I = li.ranges.begin(), E = li.ranges.end(); I != E; ++I) { >> + MachineInstr *DefMI = ReMatDefs[I->ValId]; >> + MachineInstr *OrigDefMI = ReMatOrigDefs[I->ValId]; >> + bool DefIsReMat = DefMI != NULL; >> + bool CanDelete = ReMatDelete[I->ValId]; >> + int LdSlot = 0; >> + bool isLoadSS = DefIsReMat && tii_->isLoadFromStackSlot >> (DefMI, LdSlot); >> + unsigned index = getBaseIndex(I->start); >> + unsigned end = getBaseIndex(I->end-1) + InstrSlots::NUM; >> for (; index != end; index += InstrSlots::NUM) { >> // skip deleted instructions >> while (index != end && !getInstructionFromIndex(index)) >> @@ -208,87 +341,109 @@ >> for (unsigned i = 0; i != MI->getNumOperands(); ++i) { >> MachineOperand& mop = MI->getOperand(i); >> if (mop.isRegister() && mop.getReg() == li.reg) { >> - MachineInstr *fmi = li.remat ? NULL >> - : mri_->foldMemoryOperand(MI, i, slot); >> - if (fmi) { >> - // Attempt to fold the memory reference into the >> instruction. If we >> - // can do this, we don't need to insert spill code. >> - if (lv_) >> - lv_->instructionChanged(MI, fmi); >> - MachineBasicBlock &MBB = *MI->getParent(); >> - vrm.virtFolded(li.reg, MI, i, fmi); >> - mi2iMap_.erase(MI); >> - i2miMap_[index/InstrSlots::NUM] = fmi; >> - mi2iMap_[fmi] = index; >> - MI = MBB.insert(MBB.erase(MI), fmi); >> - ++numFolded; >> - // Folding the load/store can completely change the >> instruction in >> - // unpredictable ways, rescan it from the beginning. >> - goto RestartInstruction; >> + if (DefIsReMat) { >> + // If this is the rematerializable definition MI >> itself and >> + // all of its uses are rematerialized, simply delete it. >> + if (MI == OrigDefMI) { >> + if (CanDelete) { >> + RemoveMachineInstrFromMaps(MI); >> + MI->eraseFromParent(); >> + break; >> + } else if (tryFoldMemoryOperand(MI, vrm, index, i, >> slot, li.reg)) >> + // Folding the load/store can completely change >> the instruction >> + // in unpredictable ways, rescan it from the >> beginning. >> + goto RestartInstruction; >> + } else if (isLoadSS && >> + tryFoldMemoryOperand(MI, vrm, index, i, >> LdSlot, li.reg)){ >> + // FIXME: Other rematerializable loads can be >> folded as well. >> + // Folding the load/store can completely change the >> + // instruction in unpredictable ways, rescan it from >> + // the beginning. >> + goto RestartInstruction; >> + } >> } else { >> - // Create a new virtual register for the spill interval. >> - unsigned NewVReg = mf_->getSSARegMap()- >> >createVirtualRegister(rc); >> + if (tryFoldMemoryOperand(MI, vrm, index, i, slot, >> li.reg)) >> + // Folding the load/store can completely change the >> instruction in >> + // unpredictable ways, rescan it from the beginning. >> + goto RestartInstruction; >> + } >> + >> + // Create a new virtual register for the spill interval. >> + unsigned NewVReg = mf_->getSSARegMap()- >> >createVirtualRegister(rc); >> >> - // Scan all of the operands of this instruction >> rewriting operands >> - // to use NewVReg instead of li.reg as appropriate. >> We do this for >> - // two reasons: >> - // >> - // 1. If the instr reads the same spilled vreg >> multiple times, we >> - // want to reuse the NewVReg. >> - // 2. If the instr is a two-addr instruction, we >> are required to >> - // keep the src/dst regs pinned. >> - // >> - // Keep track of whether we replace a use and/or def >> so that we can >> - // create the spill interval with the appropriate range. >> - mop.setReg(NewVReg); >> + // Scan all of the operands of this instruction >> rewriting operands >> + // to use NewVReg instead of li.reg as appropriate. We >> do this for >> + // two reasons: >> + // >> + // 1. If the instr reads the same spilled vreg >> multiple times, we >> + // want to reuse the NewVReg. >> + // 2. If the instr is a two-addr instruction, we are >> required to >> + // keep the src/dst regs pinned. >> + // >> + // Keep track of whether we replace a use and/or def so >> that we can >> + // create the spill interval with the appropriate range. >> + mop.setReg(NewVReg); >> >> - bool HasUse = mop.isUse(); >> - bool HasDef = mop.isDef(); >> - for (unsigned j = i+1, e = MI->getNumOperands(); j != >> e; ++j) { >> - if (MI->getOperand(j).isReg() && >> - MI->getOperand(j).getReg() == li.reg) { >> - MI->getOperand(j).setReg(NewVReg); >> - HasUse |= MI->getOperand(j).isUse(); >> - HasDef |= MI->getOperand(j).isDef(); >> - } >> + bool HasUse = mop.isUse(); >> + bool HasDef = mop.isDef(); >> + for (unsigned j = i+1, e = MI->getNumOperands(); j != >> e; ++j) { >> + if (MI->getOperand(j).isReg() && >> + MI->getOperand(j).getReg() == li.reg) { >> + MI->getOperand(j).setReg(NewVReg); >> + HasUse |= MI->getOperand(j).isUse(); >> + HasDef |= MI->getOperand(j).isDef(); >> } >> + } >> >> - // create a new register for this spill >> - vrm.grow(); >> - if (li.remat) >> - vrm.setVirtIsReMaterialized(NewVReg, li.remat); >> - vrm.assignVirt2StackSlot(NewVReg, slot); >> - LiveInterval &nI = getOrCreateInterval(NewVReg); >> - nI.remat = li.remat; >> - assert(nI.empty()); >> - >> - // the spill weight is now infinity as it >> - // cannot be spilled again >> - nI.weight = HUGE_VALF; >> - >> - if (HasUse) { >> - LiveRange LR(getLoadIndex(index), getUseIndex(index), >> - nI.getNextValue(~0U, 0)); >> - DOUT << " +" << LR; >> - nI.addRange(LR); >> + vrm.grow(); >> + if (DefIsReMat) { >> + vrm.setVirtIsReMaterialized(NewVReg, DefMI/*, >> CanDelete*/); >> + if (ReMatIds[I->ValId] == VirtRegMap::MAX_STACK_SLOT) { >> + // Each valnum may have its own remat id. >> + ReMatIds[I->ValId] = vrm.assignVirtReMatId(NewVReg); >> + } else { >> + vrm.assignVirtReMatId(NewVReg, ReMatIds[I->ValId]); >> } >> - if (HasDef) { >> - LiveRange LR(getDefIndex(index), getStoreIndex(index), >> - nI.getNextValue(~0U, 0)); >> - DOUT << " +" << LR; >> - nI.addRange(LR); >> + if (!CanDelete || (HasUse && HasDef)) { >> + // If this is a two-addr instruction then its use >> operands are >> + // rematerializable but its def is not. It should >> be assigned a >> + // stack slot. >> + vrm.assignVirt2StackSlot(NewVReg, slot); >> } >> + } else { >> + vrm.assignVirt2StackSlot(NewVReg, slot); >> + } >> + >> + // create a new register interval for this spill / remat. >> + LiveInterval &nI = getOrCreateInterval(NewVReg); >> + assert(nI.empty()); >> + >> + // the spill weight is now infinity as it >> + // cannot be spilled again >> + nI.weight = HUGE_VALF; >> + >> + if (HasUse) { >> + LiveRange LR(getLoadIndex(index), getUseIndex(index), >> + nI.getNextValue(~0U, 0)); >> + DOUT << " +" << LR; >> + nI.addRange(LR); >> + } >> + if (HasDef) { >> + LiveRange LR(getDefIndex(index), getStoreIndex(index), >> + nI.getNextValue(~0U, 0)); >> + DOUT << " +" << LR; >> + nI.addRange(LR); >> + } >> >> - added.push_back(&nI); >> + added.push_back(&nI); >> >> - // update live variables if it is available >> - if (lv_) >> - lv_->addVirtualRegisterKilled(NewVReg, MI); >> + // update live variables if it is available >> + if (lv_) >> + lv_->addVirtualRegisterKilled(NewVReg, MI); >> >> - DOUT << "\t\t\t\tadded new interval: "; >> - nI.print(DOUT, mri_); >> - DOUT << '\n'; >> - } >> + DOUT << "\t\t\t\tadded new interval: "; >> + nI.print(DOUT, mri_); >> + DOUT << '\n'; >> } >> } >> } >> @@ -304,25 +459,6 @@ >> cerr << "%reg" << reg; >> } >> >> -/// isReDefinedByTwoAddr - Returns true if the Reg re-definition >> is due to >> -/// two addr elimination. >> -static bool isReDefinedByTwoAddr(MachineInstr *MI, unsigned Reg, >> - const TargetInstrInfo *TII) { >> - for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { >> - MachineOperand &MO1 = MI->getOperand(i); >> - if (MO1.isRegister() && MO1.isDef() && MO1.getReg() == Reg) { >> - for (unsigned j = i+1; j < e; ++j) { >> - MachineOperand &MO2 = MI->getOperand(j); >> - if (MO2.isRegister() && MO2.isUse() && MO2.getReg() == >> Reg && >> - MI->getInstrDescriptor()-> >> - getOperandConstraint(j, TOI::TIED_TO) == (int)i) >> - return true; >> - } >> - } >> - } >> - return false; >> -} >> - >> void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb, >> >> MachineBasicBlock::iterator mi, >> unsigned MIIdx, >> @@ -335,16 +471,6 @@ >> // done once for the vreg. We use an empty interval to detect >> the first >> // time we see a vreg. >> if (interval.empty()) { >> - // Remember if the definition can be rematerialized. All >> load's from fixed >> - // stack slots are re-materializable. The target may permit >> other >> - // instructions to be re-materialized as well. >> - int FrameIdx = 0; >> - if (vi.DefInst && >> - (tii_->isTriviallyReMaterializable(vi.DefInst) || >> - (tii_->isLoadFromStackSlot(vi.DefInst, FrameIdx) && >> - mf_->getFrameInfo()->isFixedObjectIndex(FrameIdx)))) >> - interval.remat = vi.DefInst; >> - >> // Get the Idx of the defining instructions. >> unsigned defIndex = getDefIndex(MIIdx); >> unsigned ValNum; >> @@ -421,9 +547,6 @@ >> } >> >> } else { >> - // Can no longer safely assume definition is rematerializable. >> - interval.remat = NULL; >> - >> // If this is the second time we see a virtual register >> definition, it >> // must be due to phi elimination or two addr elimination. >> If this is >> // the result of two address elimination, then the vreg is >> one of the >> @@ -487,7 +610,7 @@ >> DOUT << " Removing [" << Start << "," << End << "] from: "; >> interval.print(DOUT, mri_); DOUT << "\n"; >> interval.removeRange(Start, End); >> - interval.addKillForValNum(0, Start); >> + interval.addKillForValNum(0, Start-1); // odd # means phi >> node >> DOUT << " RESULT: "; interval.print(DOUT, mri_); >> >> // Replace the interval with one of a NEW value number. >> Note that this >> @@ -514,7 +637,7 @@ >> unsigned killIndex = getInstructionIndex(&mbb->back()) + >> InstrSlots::NUM; >> LiveRange LR(defIndex, killIndex, ValNum); >> interval.addRange(LR); >> - interval.addKillForValNum(ValNum, killIndex); >> + interval.addKillForValNum(ValNum, killIndex-1); // odd # >> means phi node >> DOUT << " +" << LR; >> } >> } >> >> Modified: llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/ >> RegAllocLinearScan.cpp?rev=41060&r1=41059&r2=41060&view=diff >> >> ===================================================================== >> ========= >> --- llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp (original) >> +++ llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp Mon Aug 13 >> 18:45:17 2007 >> @@ -305,7 +305,7 @@ >> for (unsigned i = 0, e = handled_.size(); i != e; ++i) { >> LiveInterval *HI = handled_[i]; >> unsigned Reg = HI->reg; >> - if (!vrm_->hasStackSlot(Reg) && HI->liveAt(StartIdx)) { >> + if (vrm_->isAssignedReg(Reg) && HI->liveAt(StartIdx)) { >> assert(MRegisterInfo::isVirtualRegister(Reg)); >> Reg = vrm_->getPhys(Reg); >> MBB->addLiveIn(Reg); >> @@ -605,14 +605,8 @@ >> // linearscan. >> if (cur->weight != HUGE_VALF && cur->weight <= minWeight) { >> DOUT << "\t\t\tspilling(c): " << *cur << '\n'; >> - // if the current interval is re-materializable, remember so >> and don't >> - // assign it a spill slot. >> - if (cur->remat) >> - vrm_->setVirtIsReMaterialized(cur->reg, cur->remat); >> - int slot = cur->remat ? vrm_->assignVirtReMatId(cur->reg) >> - : vrm_->assignVirt2StackSlot(cur->reg); >> std::vector added = >> - li_->addIntervalsForSpills(*cur, *vrm_, slot); >> + li_->addIntervalsForSpills(*cur, *vrm_, cur->reg); >> if (added.empty()) >> return; // Early exit if all spills were folded. >> >> @@ -663,12 +657,8 @@ >> cur->overlapsFrom(*i->first, i->second)) { >> DOUT << "\t\t\tspilling(a): " << *i->first << '\n'; >> earliestStart = std::min(earliestStart, i->first- >> >beginNumber()); >> - if (i->first->remat) >> - vrm_->setVirtIsReMaterialized(reg, i->first->remat); >> - int slot = i->first->remat ? vrm_->assignVirtReMatId(reg) >> - : vrm_->assignVirt2StackSlot(reg); >> std::vector newIs = >> - li_->addIntervalsForSpills(*i->first, *vrm_, slot); >> + li_->addIntervalsForSpills(*i->first, *vrm_, reg); >> std::copy(newIs.begin(), newIs.end(), std::back_inserter >> (added)); >> spilled.insert(reg); >> } >> @@ -680,12 +670,8 @@ >> cur->overlapsFrom(*i->first, i->second-1)) { >> DOUT << "\t\t\tspilling(i): " << *i->first << '\n'; >> earliestStart = std::min(earliestStart, i->first- >> >beginNumber()); >> - if (i->first->remat) >> - vrm_->setVirtIsReMaterialized(reg, i->first->remat); >> - int slot = i->first->remat ? vrm_->assignVirtReMatId(reg) >> - : vrm_->assignVirt2StackSlot(reg); >> std::vector newIs = >> - li_->addIntervalsForSpills(*i->first, *vrm_, slot); >> + li_->addIntervalsForSpills(*i->first, *vrm_, reg); >> std::copy(newIs.begin(), newIs.end(), std::back_inserter >> (added)); >> spilled.insert(reg); >> } >> >> Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/ >> SimpleRegisterCoalescing.cpp?rev=41060&r1=41059&r2=41060&view=diff >> >> ===================================================================== >> ========= >> --- llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp (original) >> +++ llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Mon Aug 13 >> 18:45:17 2007 >> @@ -1123,12 +1123,6 @@ >> continue; >> LiveInterval &RegInt = li_->getInterval(reg); >> float w = (mop.isUse()+mop.isDef()) * powf(10.0F, >> (float)loopDepth); >> - // If the definition instruction is re- >> materializable, its spill >> - // weight is half of what it would have been normally >> unless it's >> - // a load from fixed stack slot. >> - int Dummy; >> - if (RegInt.remat && !tii_->isLoadFromStackSlot >> (RegInt.remat, Dummy)) >> - w /= 2; >> RegInt.weight += w; >> UniqueUses.insert(reg); >> } >> >> Modified: llvm/trunk/lib/CodeGen/VirtRegMap.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/ >> VirtRegMap.cpp?rev=41060&r1=41059&r2=41060&view=diff >> >> ===================================================================== >> ========= >> --- llvm/trunk/lib/CodeGen/VirtRegMap.cpp (original) >> +++ llvm/trunk/lib/CodeGen/VirtRegMap.cpp Mon Aug 13 18:45:17 2007 >> @@ -62,13 +62,17 @@ >> VirtRegMap::VirtRegMap(MachineFunction &mf) >> : TII(*mf.getTarget().getInstrInfo()), MF(mf), >> Virt2PhysMap(NO_PHYS_REG), Virt2StackSlotMap(NO_STACK_SLOT), >> + Virt2ReMatIdMap(NO_STACK_SLOT), ReMatMap(NULL), >> ReMatId(MAX_STACK_SLOT+1) { >> grow(); >> } >> >> void VirtRegMap::grow() { >> - Virt2PhysMap.grow(MF.getSSARegMap()->getLastVirtReg()); >> - Virt2StackSlotMap.grow(MF.getSSARegMap()->getLastVirtReg()); >> + unsigned LastVirtReg = MF.getSSARegMap()->getLastVirtReg(); >> + Virt2PhysMap.grow(LastVirtReg); >> + Virt2StackSlotMap.grow(LastVirtReg); >> + Virt2ReMatIdMap.grow(LastVirtReg); >> + ReMatMap.grow(LastVirtReg); >> } >> >> int VirtRegMap::assignVirt2StackSlot(unsigned virtReg) { >> @@ -95,19 +99,19 @@ >> >> int VirtRegMap::assignVirtReMatId(unsigned virtReg) { >> assert(MRegisterInfo::isVirtualRegister(virtReg)); >> - assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT && >> + assert(Virt2ReMatIdMap[virtReg] == NO_STACK_SLOT && >> "attempt to assign re-mat id to already spilled register"); >> - const MachineInstr *DefMI = getReMaterializedMI(virtReg); >> - int FrameIdx; >> - if (TII.isLoadFromStackSlot((MachineInstr*)DefMI, FrameIdx)) { >> - // Load from stack slot is re-materialize as reload from the >> stack slot! >> - Virt2StackSlotMap[virtReg] = FrameIdx; >> - return FrameIdx; >> - } >> - Virt2StackSlotMap[virtReg] = ReMatId; >> + Virt2ReMatIdMap[virtReg] = ReMatId; >> return ReMatId++; >> } >> >> +void VirtRegMap::assignVirtReMatId(unsigned virtReg, int id) { >> + assert(MRegisterInfo::isVirtualRegister(virtReg)); >> + assert(Virt2ReMatIdMap[virtReg] == NO_STACK_SLOT && >> + "attempt to assign re-mat id to already spilled register"); >> + Virt2ReMatIdMap[virtReg] = id; >> +} >> + >> void VirtRegMap::virtFolded(unsigned VirtReg, MachineInstr *OldMI, >> unsigned OpNo, MachineInstr *NewMI) { >> // Move previous memory references folded to new instruction. >> @@ -194,7 +198,7 @@ >> if (MRegisterInfo::isVirtualRegister(MO.getReg())) { >> unsigned VirtReg = MO.getReg(); >> unsigned PhysReg = VRM.getPhys(VirtReg); >> - if (VRM.hasStackSlot(VirtReg)) { >> + if (!VRM.isAssignedReg(VirtReg)) { >> int StackSlot = VRM.getStackSlot(VirtReg); >> const TargetRegisterClass* RC = >> MF.getSSARegMap()->getRegClass(VirtReg); >> @@ -246,43 +250,41 @@ >> DOUT << "\n**** Local spiller rewriting function '" >> << MF.getFunction()->getName() << "':\n"; >> >> - std::vector ReMatedMIs; >> for (MachineFunction::iterator MBB = MF.begin(), E = MF.end(); >> MBB != E; ++MBB) >> - RewriteMBB(*MBB, VRM, ReMatedMIs); >> - for (unsigned i = 0, e = ReMatedMIs.size(); i != e; ++i) >> - delete ReMatedMIs[i]; >> + RewriteMBB(*MBB, VRM); >> return true; >> } >> private: >> - void RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM, >> - std::vector &ReMatedMIs); >> + void RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM); >> }; >> } >> >> /// AvailableSpills - As the local spiller is scanning and >> rewriting an MBB from >> -/// top down, keep track of which spills slots are available in >> each register. >> +/// top down, keep track of which spills slots or remat are >> available in each >> +/// register. >> /// >> /// Note that not all physregs are created equal here. In >> particular, some >> /// physregs are reloads that we are allowed to clobber or ignore >> at any time. >> /// Other physregs are values that the register allocated program >> is using that >> /// we cannot CHANGE, but we can read if we like. We keep track >> of this on a >> -/// per-stack-slot basis as the low bit in the value of the >> SpillSlotsAvailable >> -/// entries. The predicate 'canClobberPhysReg()' checks this bit >> and >> -/// addAvailable sets it if. >> +/// per-stack-slot / remat id basis as the low bit in the value >> of the >> +/// SpillSlotsAvailable entries. The predicate 'canClobberPhysReg >> ()' checks >> +/// this bit and addAvailable sets it if. >> namespace { >> class VISIBILITY_HIDDEN AvailableSpills { >> const MRegisterInfo *MRI; >> const TargetInstrInfo *TII; >> >> - // SpillSlotsAvailable - This map keeps track of all of the >> spilled virtual >> - // register values that are still available, due to being >> loaded or stored to, >> - // but not invalidated yet. >> - std::map SpillSlotsAvailable; >> + // SpillSlotsOrReMatsAvailable - This map keeps track of all of >> the spilled >> + // or remat'ed virtual register values that are still >> available, due to being >> + // loaded or stored to, but not invalidated yet. >> + std::map SpillSlotsOrReMatsAvailable; >> >> - // PhysRegsAvailable - This is the inverse of >> SpillSlotsAvailable, indicating >> - // which stack slot values are currently held by a physreg. >> This is used to >> - // invalidate entries in SpillSlotsAvailable when a physreg is >> modified. >> + // PhysRegsAvailable - This is the inverse of >> SpillSlotsOrReMatsAvailable, >> + // indicating which stack slot values are currently held by a >> physreg. This >> + // is used to invalidate entries in SpillSlotsOrReMatsAvailable >> when a >> + // physreg is modified. >> std::multimap PhysRegsAvailable; >> >> void disallowClobberPhysRegOnly(unsigned PhysReg); >> @@ -295,41 +297,43 @@ >> >> const MRegisterInfo *getRegInfo() const { return MRI; } >> >> - /// getSpillSlotPhysReg - If the specified stack slot is >> available in a >> - /// physical register, return that PhysReg, otherwise return 0. >> - unsigned getSpillSlotPhysReg(int Slot) const { >> - std::map::const_iterator I = >> SpillSlotsAvailable.find(Slot); >> - if (I != SpillSlotsAvailable.end()) { >> + /// getSpillSlotOrReMatPhysReg - If the specified stack slot or >> remat is >> + /// available in a physical register, return that PhysReg, >> otherwise >> + /// return 0. >> + unsigned getSpillSlotOrReMatPhysReg(int Slot) const { >> + std::map::const_iterator I = >> + SpillSlotsOrReMatsAvailable.find(Slot); >> + if (I != SpillSlotsOrReMatsAvailable.end()) { >> return I->second >> 1; // Remove the CanClobber bit. >> } >> return 0; >> } >> >> - /// addAvailable - Mark that the specified stack slot is >> available in the >> - /// specified physreg. If CanClobber is true, the physreg can >> be modified at >> - /// any time without changing the semantics of the program. >> - void addAvailable(int Slot, MachineInstr *MI, unsigned Reg, >> + /// addAvailable - Mark that the specified stack slot / remat >> is available in >> + /// the specified physreg. If CanClobber is true, the physreg >> can be modified >> + /// at any time without changing the semantics of the program. >> + void addAvailable(int SlotOrReMat, MachineInstr *MI, unsigned Reg, >> bool CanClobber = true) { >> // If this stack slot is thought to be available in some >> other physreg, >> // remove its record. >> - ModifyStackSlot(Slot); >> + ModifyStackSlotOrReMat(SlotOrReMat); >> >> - PhysRegsAvailable.insert(std::make_pair(Reg, Slot)); >> - SpillSlotsAvailable[Slot] = (Reg << 1) | (unsigned)CanClobber; >> + PhysRegsAvailable.insert(std::make_pair(Reg, SlotOrReMat)); >> + SpillSlotsOrReMatsAvailable[SlotOrReMat] = (Reg << 1) | >> (unsigned)CanClobber; >> >> - if (Slot > VirtRegMap::MAX_STACK_SLOT) >> - DOUT << "Remembering RM#" << Slot- >> VirtRegMap::MAX_STACK_SLOT-1; >> + if (SlotOrReMat > VirtRegMap::MAX_STACK_SLOT) >> + DOUT << "Remembering RM#" << SlotOrReMat- >> VirtRegMap::MAX_STACK_SLOT-1; >> else >> - DOUT << "Remembering SS#" << Slot; >> + DOUT << "Remembering SS#" << SlotOrReMat; >> DOUT << " in physreg " << MRI->getName(Reg) << "\n"; >> } >> >> /// canClobberPhysReg - Return true if the spiller is allowed >> to change the >> /// value of the specified stackslot register if it desires. >> The specified >> /// stack slot must be available in a physreg for this query to >> make sense. >> - bool canClobberPhysReg(int Slot) const { >> - assert(SpillSlotsAvailable.count(Slot) && "Slot not >> available!"); >> - return SpillSlotsAvailable.find(Slot)->second & 1; >> + bool canClobberPhysReg(int SlotOrReMat) const { >> + assert(SpillSlotsOrReMatsAvailable.count(SlotOrReMat) && >> "Value not available!"); >> + return SpillSlotsOrReMatsAvailable.find(SlotOrReMat)->second >> & 1; >> } >> >> /// disallowClobberPhysReg - Unset the CanClobber bit of the >> specified >> @@ -342,10 +346,10 @@ >> /// it and any of its aliases. >> void ClobberPhysReg(unsigned PhysReg); >> >> - /// ModifyStackSlot - This method is called when the value in a >> stack slot >> + /// ModifyStackSlotOrReMat - This method is called when the >> value in a stack slot >> /// changes. This removes information about which register the >> previous value >> /// for this slot lives in (as the previous value is dead now). >> - void ModifyStackSlot(int Slot); >> + void ModifyStackSlotOrReMat(int SlotOrReMat); >> }; >> } >> >> @@ -356,11 +360,11 @@ >> std::multimap::iterator I = >> PhysRegsAvailable.lower_bound(PhysReg); >> while (I != PhysRegsAvailable.end() && I->first == PhysReg) { >> - int Slot = I->second; >> + int SlotOrReMat = I->second; >> I++; >> - assert((SpillSlotsAvailable[Slot] >> 1) == PhysReg && >> + assert((SpillSlotsOrReMatsAvailable[SlotOrReMat] >> 1) == >> PhysReg && >> "Bidirectional map mismatch!"); >> - SpillSlotsAvailable[Slot] &= ~1; >> + SpillSlotsOrReMatsAvailable[SlotOrReMat] &= ~1; >> DOUT << "PhysReg " << MRI->getName(PhysReg) >> << " copied, it is available for use but can no longer >> be modified\n"; >> } >> @@ -381,17 +385,17 @@ >> std::multimap::iterator I = >> PhysRegsAvailable.lower_bound(PhysReg); >> while (I != PhysRegsAvailable.end() && I->first == PhysReg) { >> - int Slot = I->second; >> + int SlotOrReMat = I->second; >> PhysRegsAvailable.erase(I++); >> - assert((SpillSlotsAvailable[Slot] >> 1) == PhysReg && >> + assert((SpillSlotsOrReMatsAvailable[SlotOrReMat] >> 1) == >> PhysReg && >> "Bidirectional map mismatch!"); >> - SpillSlotsAvailable.erase(Slot); >> + SpillSlotsOrReMatsAvailable.erase(SlotOrReMat); >> DOUT << "PhysReg " << MRI->getName(PhysReg) >> << " clobbered, invalidating "; >> - if (Slot > VirtRegMap::MAX_STACK_SLOT) >> - DOUT << "RM#" << Slot-VirtRegMap::MAX_STACK_SLOT-1 << "\n"; >> + if (SlotOrReMat > VirtRegMap::MAX_STACK_SLOT) >> + DOUT << "RM#" << SlotOrReMat-VirtRegMap::MAX_STACK_SLOT-1 >> << "\n"; >> else >> - DOUT << "SS#" << Slot << "\n"; >> + DOUT << "SS#" << SlotOrReMat << "\n"; >> } >> } >> >> @@ -404,14 +408,14 @@ >> ClobberPhysRegOnly(PhysReg); >> } >> >> -/// ModifyStackSlot - This method is called when the value in a >> stack slot >> +/// ModifyStackSlotOrReMat - This method is called when the value >> in a stack slot >> /// changes. This removes information about which register the >> previous value >> /// for this slot lives in (as the previous value is dead now). >> -void AvailableSpills::ModifyStackSlot(int Slot) { >> - std::map::iterator It = SpillSlotsAvailable.find >> (Slot); >> - if (It == SpillSlotsAvailable.end()) return; >> +void AvailableSpills::ModifyStackSlotOrReMat(int SlotOrReMat) { >> + std::map::iterator It = >> SpillSlotsOrReMatsAvailable.find(SlotOrReMat); >> + if (It == SpillSlotsOrReMatsAvailable.end()) return; >> unsigned Reg = It->second >> 1; >> - SpillSlotsAvailable.erase(It); >> + SpillSlotsOrReMatsAvailable.erase(It); >> >> // This register may hold the value of multiple stack slots, >> only remove this >> // stack slot from the set of values the register contains. >> @@ -419,7 +423,7 @@ >> for (; ; ++I) { >> assert(I != PhysRegsAvailable.end() && I->first == Reg && >> "Map inverse broken!"); >> - if (I->second == Slot) break; >> + if (I->second == SlotOrReMat) break; >> } >> PhysRegsAvailable.erase(I); >> } >> @@ -490,8 +494,8 @@ >> // The MachineInstr operand that reused an available value. >> unsigned Operand; >> >> - // StackSlot - The spill slot of the value being reused. >> - unsigned StackSlot; >> + // StackSlotOrReMat - The spill slot or remat id of the value >> being reused. >> + unsigned StackSlotOrReMat; >> >> // PhysRegReused - The physical register the value was >> available in. >> unsigned PhysRegReused; >> @@ -504,7 +508,7 @@ >> >> ReusedOp(unsigned o, unsigned ss, unsigned prr, unsigned apr, >> unsigned vreg) >> - : Operand(o), StackSlot(ss), PhysRegReused(prr), >> AssignedPhysReg(apr), >> + : Operand(o), StackSlotOrReMat(ss), PhysRegReused(prr), >> AssignedPhysReg(apr), >> VirtReg(vreg) {} >> }; >> >> @@ -525,7 +529,7 @@ >> >> /// addReuse - If we choose to reuse a virtual register that >> is already >> /// available instead of reloading it, remember that we did so. >> - void addReuse(unsigned OpNo, unsigned StackSlot, >> + void addReuse(unsigned OpNo, unsigned StackSlotOrReMat, >> unsigned PhysRegReused, unsigned AssignedPhysReg, >> unsigned VirtReg) { >> // If the reload is to the assigned register anyway, no >> undo will be >> @@ -533,7 +537,7 @@ >> if (PhysRegReused == AssignedPhysReg) return; >> >> // Otherwise, remember this. >> - Reuses.push_back(ReusedOp(OpNo, StackSlot, PhysRegReused, >> + Reuses.push_back(ReusedOp(OpNo, StackSlotOrReMat, >> PhysRegReused, >> AssignedPhysReg, VirtReg)); >> } >> >> @@ -553,7 +557,8 @@ >> std::map >> &MaybeDeadStores, >> SmallSet &Rejected, >> BitVector &RegKills, >> - std::vector >> &KillOps) { >> + std::vector &KillOps, >> + VirtRegMap &VRM) { >> if (Reuses.empty()) return PhysReg; // This is most often >> empty. >> >> for (unsigned ro = 0, e = Reuses.size(); ro != e; ++ro) { >> @@ -569,7 +574,7 @@ >> unsigned NewReg = Op.AssignedPhysReg; >> Rejected.insert(PhysReg); >> return GetRegForReload(NewReg, MI, Spills, >> MaybeDeadStores, Rejected, >> - RegKills, KillOps); >> + RegKills, KillOps, VRM); >> } else { >> // Otherwise, we might also have a problem if a >> previously reused >> // value aliases the new register. If so, codegen the >> previous reload >> @@ -595,20 +600,26 @@ >> // would prefer us to use a different register. >> unsigned NewPhysReg = GetRegForReload >> (NewOp.AssignedPhysReg, >> MI, Spills, >> MaybeDeadStores, >> - Rejected, >> RegKills, KillOps); >> + Rejected, RegKills, >> KillOps, VRM); >> >> - MRI->loadRegFromStackSlot(*MBB, MI, NewPhysReg, >> - NewOp.StackSlot, AliasRC); >> + if (NewOp.StackSlotOrReMat > >> VirtRegMap::MAX_STACK_SLOT) { >> + MRI->reMaterialize(*MBB, MI, NewPhysReg, >> + VRM.getReMaterializedMI >> (NewOp.VirtReg)); >> + ++NumReMats; >> + } else { >> + MRI->loadRegFromStackSlot(*MBB, MI, NewPhysReg, >> + NewOp.StackSlotOrReMat, >> AliasRC); >> + ++NumLoads; >> + } >> Spills.ClobberPhysReg(NewPhysReg); >> Spills.ClobberPhysReg(NewOp.PhysRegReused); >> >> // Any stores to this stack slot are not dead anymore. >> - MaybeDeadStores.erase(NewOp.StackSlot); >> + MaybeDeadStores.erase(NewOp.StackSlotOrReMat); >> >> MI->getOperand(NewOp.Operand).setReg(NewPhysReg); >> >> - Spills.addAvailable(NewOp.StackSlot, MI, NewPhysReg); >> - ++NumLoads; >> + Spills.addAvailable(NewOp.StackSlotOrReMat, MI, >> NewPhysReg); >> MachineBasicBlock::iterator MII = MI; >> --MII; >> UpdateKills(*MII, RegKills, KillOps); >> @@ -640,10 +651,11 @@ >> AvailableSpills &Spills, >> std::map >> &MaybeDeadStores, >> BitVector &RegKills, >> - std::vector >> &KillOps) { >> + std::vector &KillOps, >> + VirtRegMap &VRM) { >> SmallSet Rejected; >> return GetRegForReload(PhysReg, MI, Spills, >> MaybeDeadStores, Rejected, >> - RegKills, KillOps); >> + RegKills, KillOps, VRM); >> } >> }; >> } >> @@ -651,8 +663,7 @@ >> >> /// rewriteMBB - Keep track of which spills are available even >> after the >> /// register allocator is done with them. If possible, avoid >> reloading vregs. >> -void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap >> &VRM, >> - std::vector >> &ReMatedMIs) { >> +void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap >> &VRM) { >> DOUT << MBB.getBasicBlock()->getName() << ":\n"; >> >> // Spills - Keep track of which spilled values are available in >> physregs so >> @@ -689,28 +700,6 @@ >> // Loop over all of the implicit defs, clearing them from our >> available >> // sets. >> const TargetInstrDescriptor *TID = MI.getInstrDescriptor(); >> - >> - // If this instruction is being rematerialized, just remove it! >> - int FrameIdx; >> - if (TII->isTriviallyReMaterializable(&MI) || >> - TII->isLoadFromStackSlot(&MI, FrameIdx)) { >> - Erased = true; >> - for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) { >> - MachineOperand &MO = MI.getOperand(i); >> - if (!MO.isRegister() || MO.getReg() == 0) >> - continue; // Ignore non-register operands. >> - if (MO.isDef() && !VRM.isReMaterialized(MO.getReg())) { >> - Erased = false; >> - break; >> - } >> - } >> - if (Erased) { >> - VRM.RemoveFromFoldedVirtMap(&MI); >> - ReMatedMIs.push_back(MI.removeFromParent()); >> - goto ProcessNextInst; >> - } >> - } >> - >> if (TID->ImplicitDefs) { >> const unsigned *ImpDef = TID->ImplicitDefs; >> for ( ; *ImpDef; ++ImpDef) { >> @@ -738,7 +727,7 @@ >> "Not a virtual or a physical register?"); >> >> unsigned VirtReg = MO.getReg(); >> - if (!VRM.hasStackSlot(VirtReg)) { >> + if (VRM.isAssignedReg(VirtReg)) { >> // This virtual register was assigned a physreg! >> unsigned Phys = VRM.getPhys(VirtReg); >> MF.setPhysRegUsed(Phys); >> @@ -752,12 +741,13 @@ >> if (!MO.isUse()) >> continue; // Handle defs in the loop below (handle >> use&def here though) >> >> - bool doReMat = VRM.isReMaterialized(VirtReg); >> - int StackSlot = VRM.getStackSlot(VirtReg); >> + bool DoReMat = VRM.isReMaterialized(VirtReg); >> + int SSorRMId = DoReMat >> + ? VRM.getReMatId(VirtReg) : VRM.getStackSlot(VirtReg); >> unsigned PhysReg; >> >> // Check to see if this stack slot is available. >> - if ((PhysReg = Spills.getSpillSlotPhysReg(StackSlot))) { >> + if ((PhysReg = Spills.getSpillSlotOrReMatPhysReg(SSorRMId))) { >> // This spilled operand might be part of a two-address >> operand. If this >> // is the case, then changing it will necessarily require >> changing the >> // def part of the instruction as well. However, in some >> cases, we >> @@ -771,16 +761,16 @@ >> // Okay, we have a two address operand. We can reuse >> this physreg as >> // long as we are allowed to clobber the value and >> there isn't an >> // earlier def that has already clobbered the physreg. >> - CanReuse = Spills.canClobberPhysReg(StackSlot) && >> + CanReuse = Spills.canClobberPhysReg(SSorRMId) && >> !ReusedOperands.isClobbered(PhysReg); >> } >> >> if (CanReuse) { >> // If this stack slot value is already available, reuse >> it! >> - if (StackSlot > VirtRegMap::MAX_STACK_SLOT) >> - DOUT << "Reusing RM#" << StackSlot- >> VirtRegMap::MAX_STACK_SLOT-1; >> + if (SSorRMId > VirtRegMap::MAX_STACK_SLOT) >> + DOUT << "Reusing RM#" << SSorRMId- >> VirtRegMap::MAX_STACK_SLOT-1; >> else >> - DOUT << "Reusing SS#" << StackSlot; >> + DOUT << "Reusing SS#" << SSorRMId; >> DOUT << " from physreg " >> << MRI->getName(PhysReg) << " for vreg" >> << VirtReg <<" instead of reloading into physreg " >> @@ -801,7 +791,7 @@ >> // or R0 and R1 might not be compatible with each >> other. In this >> // case, we actually insert a reload for V1 in R1, >> ensuring that >> // we can get at R0 or its alias. >> - ReusedOperands.addReuse(i, StackSlot, PhysReg, >> + ReusedOperands.addReuse(i, SSorRMId, PhysReg, >> VRM.getPhys(VirtReg), VirtReg); >> if (ti != -1) >> // Only mark it clobbered if this is a use&def operand. >> @@ -829,16 +819,16 @@ >> // reuser. >> if (ReusedOperands.hasReuses()) >> DesignatedReg = ReusedOperands.GetRegForReload >> (DesignatedReg, &MI, >> - Spills, MaybeDeadStores, >> RegKills, KillOps); >> + Spills, MaybeDeadStores, RegKills, >> KillOps, VRM); >> >> // If the mapped designated register is actually the >> physreg we have >> // incoming, we don't need to inserted a dead copy. >> if (DesignatedReg == PhysReg) { >> // If this stack slot value is already available, reuse >> it! >> - if (StackSlot > VirtRegMap::MAX_STACK_SLOT) >> - DOUT << "Reusing RM#" << StackSlot- >> VirtRegMap::MAX_STACK_SLOT-1; >> + if (SSorRMId > VirtRegMap::MAX_STACK_SLOT) >> + DOUT << "Reusing RM#" << SSorRMId- >> VirtRegMap::MAX_STACK_SLOT-1; >> else >> - DOUT << "Reusing SS#" << StackSlot; >> + DOUT << "Reusing SS#" << SSorRMId; >> DOUT << " from physreg " << MRI->getName(PhysReg) << " >> for vreg" >> << VirtReg >> << " instead of reloading into same physreg.\n"; >> @@ -859,7 +849,7 @@ >> // This invalidates DesignatedReg. >> Spills.ClobberPhysReg(DesignatedReg); >> >> - Spills.addAvailable(StackSlot, &MI, DesignatedReg); >> + Spills.addAvailable(SSorRMId, &MI, DesignatedReg); >> MI.getOperand(i).setReg(DesignatedReg); >> DOUT << '\t' << *prior(MII); >> ++NumReused; >> @@ -877,24 +867,24 @@ >> // reuser. >> if (ReusedOperands.hasReuses()) >> PhysReg = ReusedOperands.GetRegForReload(PhysReg, &MI, >> - Spills, MaybeDeadStores, >> RegKills, KillOps); >> + Spills, MaybeDeadStores, RegKills, >> KillOps, VRM); >> >> MF.setPhysRegUsed(PhysReg); >> ReusedOperands.markClobbered(PhysReg); >> - if (doReMat) { >> + if (DoReMat) { >> MRI->reMaterialize(MBB, &MI, PhysReg, >> VRM.getReMaterializedMI(VirtReg)); >> ++NumReMats; >> } else { >> - MRI->loadRegFromStackSlot(MBB, &MI, PhysReg, StackSlot, RC); >> + MRI->loadRegFromStackSlot(MBB, &MI, PhysReg, SSorRMId, RC); >> ++NumLoads; >> } >> // This invalidates PhysReg. >> Spills.ClobberPhysReg(PhysReg); >> >> // Any stores to this stack slot are not dead anymore. >> - if (!doReMat) >> - MaybeDeadStores.erase(StackSlot); >> - Spills.addAvailable(StackSlot, &MI, PhysReg); >> + if (!DoReMat) >> + MaybeDeadStores.erase(SSorRMId); >> + Spills.addAvailable(SSorRMId, &MI, PhysReg); >> // Assumes this is the last use. IsKill will be unset if >> reg is reused >> // unless it's a two-address operand. >> if (TID->getOperandConstraint(i, TOI::TIED_TO) == -1) >> @@ -914,7 +904,7 @@ >> << I->second.second; >> unsigned VirtReg = I->second.first; >> VirtRegMap::ModRef MR = I->second.second; >> - if (!VRM.hasStackSlot(VirtReg)) { >> + if (VRM.isAssignedReg(VirtReg)) { >> DOUT << ": No stack slot!\n"; >> continue; >> } >> @@ -929,7 +919,7 @@ >> if (FrameIdx == SS) { >> // If this spill slot is available, turn it into a >> copy (or nothing) >> // instead of leaving it as a load! >> - if (unsigned InReg = Spills.getSpillSlotPhysReg(SS)) { >> + if (unsigned InReg = Spills.getSpillSlotOrReMatPhysReg >> (SS)) { >> DOUT << "Promoted Load To Copy: " << MI; >> if (DestReg != InReg) { >> MRI->copyRegToReg(MBB, &MI, DestReg, InReg, >> @@ -974,7 +964,7 @@ >> // the value, the value is not available anymore. >> if (MR & VirtRegMap::isMod) { >> // Notice that the value in this stack slot has been >> modified. >> - Spills.ModifyStackSlot(SS); >> + Spills.ModifyStackSlotOrReMat(SS); >> >> // If this is *just* a mod of the value, check to see if >> this is just a >> // store to the spill slot (i.e. the spill got merged >> into the copy). If >> @@ -1053,7 +1043,7 @@ >> // Another def has taken the assigned physreg. It >> must have been a >> // use&def which got it due to reuse. Undo the reuse! >> PhysReg = ReusedOperands.GetRegForReload(PhysReg, &MI, >> - Spills, MaybeDeadStores, >> RegKills, KillOps); >> + Spills, MaybeDeadStores, RegKills, >> KillOps, VRM); >> } >> } >> >> @@ -1077,7 +1067,7 @@ >> // If the stack slot value was previously available in >> some other >> // register, change it now. Otherwise, make the register >> available, >> // in PhysReg. >> - Spills.ModifyStackSlot(StackSlot); >> + Spills.ModifyStackSlotOrReMat(StackSlot); >> Spills.ClobberPhysReg(PhysReg); >> Spills.addAvailable(StackSlot, LastStore, PhysReg); >> ++NumStores; >> >> Modified: llvm/trunk/lib/CodeGen/VirtRegMap.h >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/ >> VirtRegMap.h?rev=41060&r1=41059&r2=41060&view=diff >> >> ===================================================================== >> ========= >> --- llvm/trunk/lib/CodeGen/VirtRegMap.h (original) >> +++ llvm/trunk/lib/CodeGen/VirtRegMap.h Mon Aug 13 18:45:17 2007 >> @@ -55,6 +55,7 @@ >> /// which corresponds to the stack slot this register is spilled >> /// at. >> IndexedMap Virt2StackSlotMap; >> + IndexedMap Virt2ReMatIdMap; >> /// MI2VirtMap - This is MachineInstr to virtual register >> /// mapping. In the case of memory spill code being folded into >> /// instructions, we need to know which virtual register was >> @@ -64,7 +65,7 @@ >> /// ReMatMap - This is virtual register to re-materialized >> instruction >> /// mapping. Each virtual register whose definition is going >> to be >> /// re-materialized has an entry in it. >> - std::map ReMatMap; >> + IndexedMap ReMatMap; >> >> /// ReMatId - Instead of assigning a stack slot to a to be >> rematerialized >> /// virtual register, an unique id is being assigned. This >> keeps track of >> @@ -119,10 +120,11 @@ >> grow(); >> } >> >> - /// @brief returns true is the specified virtual register is >> - /// mapped to a stack slot >> - bool hasStackSlot(unsigned virtReg) const { >> - return getStackSlot(virtReg) != NO_STACK_SLOT; >> + /// @brief returns true is the specified virtual register is not >> + /// mapped to a stack slot or rematerialized. >> + bool isAssignedReg(unsigned virtReg) const { >> + return getStackSlot(virtReg) == NO_STACK_SLOT && >> + getReMatId(virtReg) == NO_STACK_SLOT; >> } >> >> /// @brief returns the stack slot mapped to the specified >> virtual >> @@ -132,6 +134,13 @@ >> return Virt2StackSlotMap[virtReg]; >> } >> >> + /// @brief returns the rematerialization id mapped to the >> specified virtual >> + /// register >> + int getReMatId(unsigned virtReg) const { >> + assert(MRegisterInfo::isVirtualRegister(virtReg)); >> + return Virt2ReMatIdMap[virtReg]; >> + } >> + >> /// @brief create a mapping for the specifed virtual register to >> /// the next available stack slot >> int assignVirt2StackSlot(unsigned virtReg); >> @@ -142,22 +151,26 @@ >> /// @brief assign an unique re-materialization id to the >> specified >> /// virtual register. >> int assignVirtReMatId(unsigned virtReg); >> + /// @brief assign an unique re-materialization id to the >> specified >> + /// virtual register. >> + void assignVirtReMatId(unsigned virtReg, int id); >> >> /// @brief returns true if the specified virtual register is >> being >> /// re-materialized. >> bool isReMaterialized(unsigned virtReg) const { >> - return ReMatMap.count(virtReg) != 0; >> + return ReMatMap[virtReg] != NULL; >> } >> >> /// @brief returns the original machine instruction being re- >> issued >> /// to re-materialize the specified virtual register. >> - const MachineInstr *getReMaterializedMI(unsigned virtReg) { >> + MachineInstr *getReMaterializedMI(unsigned virtReg) const { >> return ReMatMap[virtReg]; >> } >> >> /// @brief records the specified virtual register will be >> /// re-materialized and the original instruction which will >> be re-issed >> - /// for this purpose. >> + /// for this purpose. If parameter all is true, then all >> uses of the >> + /// registers are rematerialized and it's safe to delete the >> definition. >> void setVirtIsReMaterialized(unsigned virtReg, MachineInstr >> *def) { >> ReMatMap[virtReg] = def; >> } >> >> >> _______________________________________________ >> llvm-commits mailing list >> llvm-commits at cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits >> >> > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From evan.cheng at apple.com Tue Aug 14 18:19:29 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 14 Aug 2007 23:19:29 -0000 Subject: [llvm-commits] [llvm] r41084 - /llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Message-ID: <200708142319.l7ENJTPl011321@zion.cs.uiuc.edu> Author: evancheng Date: Tue Aug 14 18:19:28 2007 New Revision: 41084 URL: http://llvm.org/viewvc/llvm-project?rev=41084&view=rev Log: Fix for PR1596: AdjustCopiesBackFrom() should conservatively check if any of its sub-registers may overlap with the interval of the copy that's being coalesced. Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp?rev=41084&r1=41083&r2=41084&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp (original) +++ llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Tue Aug 14 18:19:28 2007 @@ -125,6 +125,19 @@ // live-range starts. If there are no intervening live ranges between them in // IntB, we can merge them. if (ValLR+1 != BLR) return false; + + // If a live interval is a physical register, conservatively check if any + // of its sub-registers is overlapping the live interval of the virtual + // register. If so, do not coalesce. + if (MRegisterInfo::isPhysicalRegister(IntB.reg) && + *mri_->getSubRegisters(IntB.reg)) { + for (const unsigned* SR = mri_->getSubRegisters(IntB.reg); *SR; ++SR) + if (li_->hasInterval(*SR) && IntA.overlaps(li_->getInterval(*SR))) { + DOUT << "Interfere with sub-register "; + DEBUG(li_->getInterval(*SR).print(DOUT, mri_)); + return false; + } + } DOUT << "\nExtending: "; IntB.print(DOUT, mri_); From evan.cheng at apple.com Tue Aug 14 18:21:10 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 14 Aug 2007 23:21:10 -0000 Subject: [llvm-commits] [llvm] r41085 - /llvm/trunk/test/CodeGen/PowerPC/2007-08-04-CoalescerAssert.ll Message-ID: <200708142321.l7ENLA5m011565@zion.cs.uiuc.edu> Author: evancheng Date: Tue Aug 14 18:21:10 2007 New Revision: 41085 URL: http://llvm.org/viewvc/llvm-project?rev=41085&view=rev Log: Test case for PR1596. Added: llvm/trunk/test/CodeGen/PowerPC/2007-08-04-CoalescerAssert.ll Added: llvm/trunk/test/CodeGen/PowerPC/2007-08-04-CoalescerAssert.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/2007-08-04-CoalescerAssert.ll?rev=41085&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/PowerPC/2007-08-04-CoalescerAssert.ll (added) +++ llvm/trunk/test/CodeGen/PowerPC/2007-08-04-CoalescerAssert.ll Tue Aug 14 18:21:10 2007 @@ -0,0 +1,28 @@ +; RUN: llvm-as < %s | llc -march=ppc64 +; PR1596 + + %struct._obstack_chunk = type { i8* } + %struct.obstack = type { i8*, %struct._obstack_chunk* (i8*, i64)*, i8*, i8 } + +define i32 @_obstack_newchunk(%struct.obstack* %h, i32 %length) { +entry: + br i1 false, label %cond_false, label %cond_true + +cond_true: ; preds = %entry + br i1 false, label %cond_true28, label %cond_next30 + +cond_false: ; preds = %entry + %tmp22 = tail call %struct._obstack_chunk* null( i64 undef ) ; <%struct._obstack_chunk*> [#uses=2] + br i1 false, label %cond_true28, label %cond_next30 + +cond_true28: ; preds = %cond_false, %cond_true + %iftmp.0.043.0 = phi %struct._obstack_chunk* [ null, %cond_true ], [ %tmp22, %cond_false ] ; <%struct._obstack_chunk*> [#uses=1] + tail call void null( ) + br label %cond_next30 + +cond_next30: ; preds = %cond_true28, %cond_false, %cond_true + %iftmp.0.043.1 = phi %struct._obstack_chunk* [ %iftmp.0.043.0, %cond_true28 ], [ null, %cond_true ], [ %tmp22, %cond_false ] ; <%struct._obstack_chunk*> [#uses=1] + %tmp41 = getelementptr %struct._obstack_chunk* %iftmp.0.043.1, i32 0, i32 0 ; [#uses=1] + store i8* null, i8** %tmp41, align 8 + ret i32 undef +} From evan.cheng at apple.com Tue Aug 14 18:25:37 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 14 Aug 2007 23:25:37 -0000 Subject: [llvm-commits] [llvm] r41086 - /llvm/trunk/lib/CodeGen/VirtRegMap.cpp Message-ID: <200708142325.l7ENPbip012011@zion.cs.uiuc.edu> Author: evancheng Date: Tue Aug 14 18:25:37 2007 New Revision: 41086 URL: http://llvm.org/viewvc/llvm-project?rev=41086&view=rev Log: - If a def is dead, do not spill it. - If the defs of a spilled rematerializable MI are dead after the spill store is deleted, delete the def MI as well. Modified: llvm/trunk/lib/CodeGen/VirtRegMap.cpp Modified: llvm/trunk/lib/CodeGen/VirtRegMap.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/VirtRegMap.cpp?rev=41086&r1=41085&r2=41086&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/VirtRegMap.cpp (original) +++ llvm/trunk/lib/CodeGen/VirtRegMap.cpp Tue Aug 14 18:25:37 2007 @@ -36,6 +36,7 @@ STATISTIC(NumSpills, "Number of register spills"); STATISTIC(NumReMats, "Number of re-materialization"); +STATISTIC(NumDRM , "Number of re-materializable defs elided"); STATISTIC(NumStores, "Number of stores added"); STATISTIC(NumLoads , "Number of loads added"); STATISTIC(NumReused, "Number of values reused"); @@ -434,38 +435,14 @@ /// marked kill, then invalidate the information. static void InvalidateKills(MachineInstr &MI, BitVector &RegKills, std::vector &KillOps, - MachineInstr *NewDef = NULL) { + SmallVector *KillRegs = NULL) { for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) { MachineOperand &MO = MI.getOperand(i); if (!MO.isReg() || !MO.isUse() || !MO.isKill()) continue; unsigned Reg = MO.getReg(); - if (NewDef) { - // Due to remat, it's possible this reg isn't being reused. That is, - // the def of this reg (by prev MI) is now dead. - bool FoundUse = false, Done = false; - MachineBasicBlock::iterator I = MI, E = NewDef; - ++I; ++E; - for (; !Done && I != E; ++I) { - MachineInstr *NMI = I; - for (unsigned j = 0, ee = NMI->getNumOperands(); j != ee; ++j) { - MachineOperand &MO = NMI->getOperand(j); - if (!MO.isReg() || MO.getReg() != Reg) - continue; - if (MO.isUse()) - FoundUse = true; - Done = true; // Stop after scanning all the operands of this MI. - } - } - if (!FoundUse) { - // Def is dead! - MachineBasicBlock::iterator MII = MI; - MachineInstr *DefMI = prior(MII); - MachineOperand *DefOp = DefMI->findRegisterDefOperand(Reg); - assert(DefOp && "Missing def?"); - DefOp->setIsDead(); - } - } + if (KillRegs) + KillRegs->push_back(Reg); if (KillOps[Reg] == &MO) { RegKills.reset(Reg); KillOps[Reg] = NULL; @@ -473,6 +450,51 @@ } } +/// InvalidateRegDef - If the def operand of the specified def MI is now dead +/// (since it's spill instruction is removed), mark it isDead. Also checks if +/// the def MI has other definition operands that are not dead. Returns it by +/// reference. +static bool InvalidateRegDef(MachineBasicBlock::iterator I, + MachineInstr &NewDef, unsigned Reg, + bool &HasLiveDef) { + // Due to remat, it's possible this reg isn't being reused. That is, + // the def of this reg (by prev MI) is now dead. + MachineInstr *DefMI = I; + MachineOperand *DefOp = NULL; + for (unsigned i = 0, e = DefMI->getNumOperands(); i != e; ++i) { + MachineOperand &MO = DefMI->getOperand(i); + if (MO.isReg() && MO.isDef()) { + if (MO.getReg() == Reg) + DefOp = &MO; + else if (!MO.isDead()) + HasLiveDef = true; + } + } + if (!DefOp) + return false; + + bool FoundUse = false, Done = false; + MachineBasicBlock::iterator E = NewDef; + ++I; ++E; + for (; !Done && I != E; ++I) { + MachineInstr *NMI = I; + for (unsigned j = 0, ee = NMI->getNumOperands(); j != ee; ++j) { + MachineOperand &MO = NMI->getOperand(j); + if (!MO.isReg() || MO.getReg() != Reg) + continue; + if (MO.isUse()) + FoundUse = true; + Done = true; // Stop after scanning all the operands of this MI. + } + } + if (!FoundUse) { + // Def is dead! + DefOp->setIsDead(); + return true; + } + return false; +} + /// UpdateKills - Track and update kill info. If a MI reads a register that is /// marked kill, then it must be due to register reuse. Transfer the kill info /// over. @@ -707,6 +729,9 @@ std::vector MaybeDeadStores; MaybeDeadStores.resize(MF.getFrameInfo()->getObjectIndexEnd(), NULL); + // ReMatDefs - These are rematerializable def MIs which are not deleted. + SmallSet ReMatDefs; + // Keep track of kill information. BitVector RegKills(MRI->getNumRegs()); std::vector KillOps; @@ -1077,6 +1102,10 @@ continue; } + bool DoReMat = VRM.isReMaterialized(VirtReg); + if (DoReMat) + ReMatDefs.insert(&MI); + // The only vregs left are stack slot definitions. int StackSlot = VRM.getStackSlot(VirtReg); const TargetRegisterClass *RC = MF.getSSARegMap()->getRegClass(VirtReg); @@ -1099,43 +1128,68 @@ MF.setPhysRegUsed(PhysReg); ReusedOperands.markClobbered(PhysReg); - MRI->storeRegToStackSlot(MBB, next(MII), PhysReg, StackSlot, RC); - DOUT << "Store:\t" << *next(MII); MI.getOperand(i).setReg(PhysReg); + if (!MO.isDead()) { + MRI->storeRegToStackSlot(MBB, next(MII), PhysReg, StackSlot, RC); + DOUT << "Store:\t" << *next(MII); + + // If there is a dead store to this stack slot, nuke it now. + MachineInstr *&LastStore = MaybeDeadStores[StackSlot]; + if (LastStore) { + DOUT << "Removed dead store:\t" << *LastStore; + ++NumDSE; + SmallVector KillRegs; + InvalidateKills(*LastStore, RegKills, KillOps, &KillRegs); + MachineBasicBlock::iterator PrevMII = LastStore; + bool CheckDef = PrevMII != MBB.begin(); + if (CheckDef) + --PrevMII; + MBB.erase(LastStore); + VRM.RemoveFromFoldedVirtMap(LastStore); + if (CheckDef) { + // Look at defs of killed registers on the store. Mark the defs + // as dead since the store has been deleted and they aren't + // being reused. + for (unsigned j = 0, ee = KillRegs.size(); j != ee; ++j) { + bool HasOtherDef = false; + if (InvalidateRegDef(PrevMII, MI, KillRegs[j], HasOtherDef)) { + MachineInstr *DeadDef = PrevMII; + if (ReMatDefs.count(DeadDef) && !HasOtherDef) { + // FIXME: This assumes a remat def does not have side + // effects. + MBB.erase(DeadDef); + VRM.RemoveFromFoldedVirtMap(DeadDef); + ++NumDRM; + } + } + } + } + } + LastStore = next(MII); - // If there is a dead store to this stack slot, nuke it now. - MachineInstr *&LastStore = MaybeDeadStores[StackSlot]; - if (LastStore) { - DOUT << "Removed dead store:\t" << *LastStore; - ++NumDSE; - InvalidateKills(*LastStore, RegKills, KillOps, &MI); - MBB.erase(LastStore); - VRM.RemoveFromFoldedVirtMap(LastStore); - } - LastStore = next(MII); + // If the stack slot value was previously available in some other + // register, change it now. Otherwise, make the register available, + // in PhysReg. + Spills.ModifyStackSlotOrReMat(StackSlot); + Spills.ClobberPhysReg(PhysReg); + Spills.addAvailable(StackSlot, LastStore, PhysReg); + ++NumStores; - // If the stack slot value was previously available in some other - // register, change it now. Otherwise, make the register available, - // in PhysReg. - Spills.ModifyStackSlotOrReMat(StackSlot); - Spills.ClobberPhysReg(PhysReg); - Spills.addAvailable(StackSlot, LastStore, PhysReg); - ++NumStores; - - // Check to see if this is a noop copy. If so, eliminate the - // instruction before considering the dest reg to be changed. - { - unsigned Src, Dst; - if (TII->isMoveInstr(MI, Src, Dst) && Src == Dst) { - ++NumDCE; - DOUT << "Removing now-noop copy: " << MI; - MBB.erase(&MI); - Erased = true; - VRM.RemoveFromFoldedVirtMap(&MI); - UpdateKills(*LastStore, RegKills, KillOps); - goto ProcessNextInst; + // Check to see if this is a noop copy. If so, eliminate the + // instruction before considering the dest reg to be changed. + { + unsigned Src, Dst; + if (TII->isMoveInstr(MI, Src, Dst) && Src == Dst) { + ++NumDCE; + DOUT << "Removing now-noop copy: " << MI; + MBB.erase(&MI); + Erased = true; + VRM.RemoveFromFoldedVirtMap(&MI); + UpdateKills(*LastStore, RegKills, KillOps); + goto ProcessNextInst; + } } - } + } } } ProcessNextInst: From evan.cheng at apple.com Tue Aug 14 18:34:50 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 14 Aug 2007 23:34:50 -0000 Subject: [llvm-commits] [llvm] r41087 - /llvm/trunk/test/CodeGen/ARM/2007-08-14-SpillDeadDef.ll Message-ID: <200708142334.l7ENYpUQ012347@zion.cs.uiuc.edu> Author: evancheng Date: Tue Aug 14 18:34:50 2007 New Revision: 41087 URL: http://llvm.org/viewvc/llvm-project?rev=41087&view=rev Log: New test. Added: llvm/trunk/test/CodeGen/ARM/2007-08-14-SpillDeadDef.ll Added: llvm/trunk/test/CodeGen/ARM/2007-08-14-SpillDeadDef.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/2007-08-14-SpillDeadDef.ll?rev=41087&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/ARM/2007-08-14-SpillDeadDef.ll (added) +++ llvm/trunk/test/CodeGen/ARM/2007-08-14-SpillDeadDef.ll Tue Aug 14 18:34:50 2007 @@ -0,0 +1,116 @@ +; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin +; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin -stats -info-output-file - | grep "re-materializable defs elided" + + %struct.CONTENTBOX = type { i32, i32, i32, i32, i32 } + %struct.LOCBOX = type { i32, i32, i32, i32 } + %struct.SIDEBOX = type { i32, i32 } + %struct.UNCOMBOX = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } + %struct.cellbox = type { i8*, i32, i32, i32, [9 x i32], i32, i32, i32, i32, i32, i32, i32, double, double, double, double, double, i32, i32, %struct.CONTENTBOX*, %struct.UNCOMBOX*, [8 x %struct.tilebox*], %struct.SIDEBOX* } + %struct.termbox = type { %struct.termbox*, i32, i32, i32, i32, i32 } + %struct.tilebox = type { %struct.tilebox*, double, double, double, double, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.termbox*, %struct.LOCBOX* } + at numcells = external global i32 ; [#uses=1] + at cellarray = external global %struct.cellbox** ; <%struct.cellbox***> [#uses=1] + at numBinsY = external global i32 ; [#uses=1] + +define fastcc void @fixpenal() { +entry: + %tmp491 = load i32* @numcells, align 4 ; [#uses=1] + %tmp9 = load %struct.cellbox*** @cellarray, align 4 ; <%struct.cellbox**> [#uses=1] + %tmp77.i = load i32* @numBinsY, align 4 ; [#uses=2] + br label %bb490 + +bb8: ; preds = %bb490, %cond_false428 + br i1 false, label %cond_false58.i, label %cond_false.i + +cond_false.i: ; preds = %bb8 + ret void + +cond_false58.i: ; preds = %bb8 + %highBinX.0.i = select i1 false, i32 1, i32 0 ; [#uses=2] + br i1 false, label %cond_next85.i, label %cond_false76.i + +cond_false76.i: ; preds = %cond_false58.i + ret void + +cond_next85.i: ; preds = %cond_false58.i + br i1 false, label %cond_next105.i, label %cond_false98.i + +cond_false98.i: ; preds = %cond_next85.i + ret void + +cond_next105.i: ; preds = %cond_next85.i + %tmp108.i = icmp eq i32 1, %highBinX.0.i ; [#uses=1] + %tmp115.i = icmp eq i32 1, %tmp77.i ; [#uses=1] + %bothcond.i = and i1 %tmp115.i, %tmp108.i ; [#uses=1] + %storemerge.i = select i1 %bothcond.i, i32 1, i32 0 ; [#uses=2] + br i1 false, label %whoOverlaps.exit, label %bb503.preheader.i + +bb503.preheader.i: ; preds = %bb513.i, %cond_next105.i + %i.022.0.i = phi i32 [ %tmp512.i, %bb513.i ], [ 0, %cond_next105.i ] ; [#uses=2] + %tmp165.i = getelementptr i32*** null, i32 %i.022.0.i ; [#uses=0] + br label %bb503.i + +bb137.i: ; preds = %bb503.i + br i1 false, label %bb162.i, label %bb148.i + +bb148.i: ; preds = %bb137.i + ret void + +bb162.i: ; preds = %bb137.i + %tmp49435.i = load i32* null ; [#uses=1] + br label %bb170.i + +bb170.i: ; preds = %bb491.i, %bb162.i + %indvar.i = phi i32 [ %k.032.0.i, %bb491.i ], [ 0, %bb162.i ] ; [#uses=2] + %k.032.0.i = add i32 %indvar.i, 1 ; [#uses=2] + %tmp173.i = getelementptr i32* null, i32 %k.032.0.i ; [#uses=1] + %tmp174.i = load i32* %tmp173.i ; [#uses=4] + %tmp177.i = icmp eq i32 %tmp174.i, %cell.1 ; [#uses=1] + %tmp184.i = icmp sgt i32 %tmp174.i, %tmp491 ; [#uses=1] + %bothcond = or i1 %tmp177.i, %tmp184.i ; [#uses=1] + br i1 %bothcond, label %bb491.i, label %cond_next188.i + +cond_next188.i: ; preds = %bb170.i + %tmp191.i = getelementptr %struct.cellbox** %tmp9, i32 %tmp174.i ; <%struct.cellbox**> [#uses=1] + %tmp192.i = load %struct.cellbox** %tmp191.i ; <%struct.cellbox*> [#uses=1] + %tmp195.i = icmp eq i32 %tmp174.i, 0 ; [#uses=1] + br i1 %tmp195.i, label %bb491.i, label %cond_true198.i + +cond_true198.i: ; preds = %cond_next188.i + %tmp210.i = getelementptr %struct.cellbox* %tmp192.i, i32 0, i32 3 ; [#uses=0] + ret void + +bb491.i: ; preds = %cond_next188.i, %bb170.i + %tmp490.i = add i32 %indvar.i, 2 ; [#uses=1] + %tmp496.i = icmp slt i32 %tmp49435.i, %tmp490.i ; [#uses=1] + br i1 %tmp496.i, label %bb500.i, label %bb170.i + +bb500.i: ; preds = %bb491.i + %indvar.next82.i = add i32 %j.0.i, 1 ; [#uses=1] + br label %bb503.i + +bb503.i: ; preds = %bb500.i, %bb503.preheader.i + %j.0.i = phi i32 [ 0, %bb503.preheader.i ], [ %indvar.next82.i, %bb500.i ] ; [#uses=2] + %tmp506.i = icmp sgt i32 %j.0.i, %tmp77.i ; [#uses=1] + br i1 %tmp506.i, label %bb513.i, label %bb137.i + +bb513.i: ; preds = %bb503.i + %tmp512.i = add i32 %i.022.0.i, 1 ; [#uses=2] + %tmp516.i = icmp sgt i32 %tmp512.i, %highBinX.0.i ; [#uses=1] + br i1 %tmp516.i, label %whoOverlaps.exit, label %bb503.preheader.i + +whoOverlaps.exit: ; preds = %bb513.i, %cond_next105.i + br i1 false, label %cond_false428, label %bb490 + +cond_false428: ; preds = %whoOverlaps.exit + br i1 false, label %bb497, label %bb8 + +bb490: ; preds = %whoOverlaps.exit, %entry + %binY.tmp.2 = phi i32 [ 0, %entry ], [ %storemerge.i, %whoOverlaps.exit ] ; [#uses=1] + %cell.1 = phi i32 [ 1, %entry ], [ 0, %whoOverlaps.exit ] ; [#uses=1] + br i1 false, label %bb497, label %bb8 + +bb497: ; preds = %bb490, %cond_false428 + %binY.tmp.3 = phi i32 [ %binY.tmp.2, %bb490 ], [ %storemerge.i, %cond_false428 ] ; [#uses=0] + ret void +} From isanbard at gmail.com Tue Aug 14 18:53:04 2007 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 14 Aug 2007 23:53:04 -0000 Subject: [llvm-commits] [llvm-gcc-4.0] r41088 - /llvm-gcc-4.0/tags/llvm-gcc-1200-08/ Message-ID: <200708142353.l7ENr4oS012921@zion.cs.uiuc.edu> Author: void Date: Tue Aug 14 18:53:04 2007 New Revision: 41088 URL: http://llvm.org/viewvc/llvm-project?rev=41088&view=rev Log: Creating llvm-gcc-1200-08 branch Added: llvm-gcc-4.0/tags/llvm-gcc-1200-08/ - copied from r41087, llvm-gcc-4.0/trunk/ From isanbard at gmail.com Tue Aug 14 18:53:10 2007 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 14 Aug 2007 23:53:10 -0000 Subject: [llvm-commits] [llvm] r41089 - /llvm/tags/Apple/llvm-1200-08/ Message-ID: <200708142353.l7ENrAkn012935@zion.cs.uiuc.edu> Author: void Date: Tue Aug 14 18:53:10 2007 New Revision: 41089 URL: http://llvm.org/viewvc/llvm-project?rev=41089&view=rev Log: Creating llvm-1200-08 branch Added: llvm/tags/Apple/llvm-1200-08/ - copied from r41088, llvm/trunk/ From dpatel at apple.com Tue Aug 14 18:53:57 2007 From: dpatel at apple.com (Devang Patel) Date: Tue, 14 Aug 2007 23:53:57 -0000 Subject: [llvm-commits] [llvm] r41090 - /llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp Message-ID: <200708142353.l7ENrwEk012971@zion.cs.uiuc.edu> Author: dpatel Date: Tue Aug 14 18:53:57 2007 New Revision: 41090 URL: http://llvm.org/viewvc/llvm-project?rev=41090&view=rev Log: Avoid nested loops at the moment. Modified: llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp Modified: llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp?rev=41090&r1=41089&r2=41090&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp Tue Aug 14 18:53:57 2007 @@ -154,6 +154,10 @@ L = IncomingLoop; LPM = &LPM_Ref; + // FIXME - Nested loops makes dominator info updates tricky. + if (!L->getSubLoops().empty()) + return false; + SE = &getAnalysis(); DT = &getAnalysis(); LI = &getAnalysis(); From dpatel at apple.com Tue Aug 14 18:59:17 2007 From: dpatel at apple.com (Devang Patel) Date: Tue, 14 Aug 2007 23:59:17 -0000 Subject: [llvm-commits] [llvm] r41091 - /llvm/trunk/lib/Transforms/Utils/CloneLoop.cpp Message-ID: <200708142359.l7ENxHeO013096@zion.cs.uiuc.edu> Author: dpatel Date: Tue Aug 14 18:59:17 2007 New Revision: 41091 URL: http://llvm.org/viewvc/llvm-project?rev=41091&view=rev Log: Break infinite loop. Modified: llvm/trunk/lib/Transforms/Utils/CloneLoop.cpp Modified: llvm/trunk/lib/Transforms/Utils/CloneLoop.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/CloneLoop.cpp?rev=41091&r1=41090&r2=41091&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/CloneLoop.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/CloneLoop.cpp Tue Aug 14 18:59:17 2007 @@ -84,22 +84,21 @@ } SmallVector NewBlocks; - SmallVector, 8> LoopNest; - LoopNest.push_back(std::make_pair(OrigL, OrigL->begin())); - - Loop *NewLoop = NULL; - while (!LoopNest.empty()) { - Loop *L = LoopNest.back().first; - Loop::iterator SubLoop = LoopNest.back().second; - - // Handle sub loops. - if (SubLoop != L->end()) { - Loop *SL = *SubLoop; - LoopNest.push_back(std::make_pair(SL, SL->begin())); - } + // Populate loop nest. + SmallVector LoopNest; + LoopNest.push_back(OrigL); + + + Loop *NewParentLoop = NULL; + while (!LoopNest.empty()) { + Loop *L = LoopNest.back(); LoopNest.pop_back(); - NewLoop = new Loop(); + Loop *NewLoop = new Loop(); + + if (!NewParentLoop) + NewParentLoop = NewLoop; + LPM->insertLoop(NewLoop, L->getParentLoop()); // Clone Basic Blocks. @@ -122,6 +121,9 @@ CloneDominatorInfo(BB, ValueMap, DT, DF); } + // Process sub loops + for (Loop::iterator I = L->begin(), E = L->end(); I != E; ++I) + LoopNest.push_back(*I); } // Remap instructions to reference operands from ValueMap. @@ -145,5 +147,5 @@ Function *F = Latch->getParent(); F->getBasicBlockList().insert(Latch, NewBlocks.begin(), NewBlocks.end()); - return NewLoop; + return NewParentLoop; } From nicholas at mxc.ca Tue Aug 14 20:27:39 2007 From: nicholas at mxc.ca (Nick Lewycky) Date: Tue, 14 Aug 2007 21:27:39 -0400 Subject: [llvm-commits] [llvm] r41074 - /llvm/trunk/include/llvm/Analysis/Dominators.h In-Reply-To: <200708141653.l7EGrPUo026726@zion.cs.uiuc.edu> References: <200708141653.l7EGrPUo026726@zion.cs.uiuc.edu> Message-ID: <1187141259.3403.10.camel@tracer> On Tue, 2007-08-14 at 16:53 +0000, Devang Patel wrote: > + for (iterator I = begin(), E = end(); I != E; ++I) > + if (I->second.count(BB)) > + I->second.erase(BB); > + Frontiers.erase(BB); > } Why test I->second.count()? The worst erase() will do if BB doesn't exist is nothing. Just call erase() and it will cut the number of lookups in half. Nick From dpatel at apple.com Tue Aug 14 21:14:56 2007 From: dpatel at apple.com (Devang Patel) Date: Wed, 15 Aug 2007 02:14:56 -0000 Subject: [llvm-commits] [llvm] r41093 - /llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp Message-ID: <200708150214.l7F2EuhP019433@zion.cs.uiuc.edu> Author: dpatel Date: Tue Aug 14 21:14:55 2007 New Revision: 41093 URL: http://llvm.org/viewvc/llvm-project?rev=41093&view=rev Log: Avoid triangle loops. Modified: llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp Modified: llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp?rev=41093&r1=41092&r2=41093&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp Tue Aug 14 21:14:55 2007 @@ -154,7 +154,7 @@ L = IncomingLoop; LPM = &LPM_Ref; - // FIXME - Nested loops makes dominator info updates tricky. + // FIXME - Nested loops make dominator info updates tricky. if (!L->getSubLoops().empty()) return false; @@ -605,7 +605,7 @@ WorkList.push_back(std::make_pair(DeadBB, succ_begin(DeadBB))); while (!WorkList.empty()) { BasicBlock *BB = WorkList.back(). first; - succ_iterator SIter =WorkList.back().second; + succ_iterator SIter = WorkList.back().second; // If all successor's are processed then remove this block. if (SIter == succ_end(BB)) { @@ -659,8 +659,8 @@ if (!DT->dominates(LiveBB, DFMember)) LiveDF->second.insert(DFMember); } - DF->removeFromFrontier(LiveDF, SuccBB); + DF->removeFromFrontier(LiveDF, SuccBB); } } } @@ -669,6 +669,19 @@ bool LoopIndexSplit::splitLoop(SplitInfo &SD) { BasicBlock *Preheader = L->getLoopPreheader(); + BasicBlock *SplitBlock = SD.SplitCondition->getParent(); + BasicBlock *Latch = L->getLoopLatch(); + BasicBlock *Header = L->getHeader(); + BranchInst *SplitTerminator = cast(SplitBlock->getTerminator()); + + // FIXME - Unable to handle triange loops at the moment. + // In triangle loop, split condition is in header and one of the + // the split destination is loop latch. If split condition is EQ + // then such loops are already handle in processOneIterationLoop(). + if (Header == SplitBlock + && (Latch == SplitTerminator->getSuccessor(0) + || Latch == SplitTerminator->getSuccessor(1))) + return false; // True loop is original loop. False loop is cloned loop. @@ -770,7 +783,6 @@ SplitEdge(ExitBlock, FalseHeader, this); //[*] Eliminate split condition's false branch from True loop. - BasicBlock *SplitBlock = SD.SplitCondition->getParent(); BranchInst *BR = cast(SplitBlock->getTerminator()); BasicBlock *FBB = BR->getSuccessor(1); BR->setUnconditionalDest(BR->getSuccessor(0)); From rspencer at reidspencer.com Tue Aug 14 22:01:08 2007 From: rspencer at reidspencer.com (Reid Spencer) Date: Wed, 15 Aug 2007 03:01:08 -0000 Subject: [llvm-commits] [llvm] r41094 - /llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp Message-ID: <200708150301.l7F318le021422@zion.cs.uiuc.edu> Author: reid Date: Tue Aug 14 22:01:04 2007 New Revision: 41094 URL: http://llvm.org/viewvc/llvm-project?rev=41094&view=rev Log: Remove unneeded header file. Modified: llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp Modified: llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp?rev=41094&r1=41093&r2=41094&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp Tue Aug 14 22:01:04 2007 @@ -14,7 +14,6 @@ #define DEBUG_TYPE "loop-index-split" #include "llvm/Transforms/Scalar.h" -#include "llvm/Function.h" #include "llvm/Analysis/LoopPass.h" #include "llvm/Analysis/ScalarEvolutionExpander.h" #include "llvm/Analysis/Dominators.h" From dpatel at apple.com Tue Aug 14 22:31:47 2007 From: dpatel at apple.com (Devang Patel) Date: Wed, 15 Aug 2007 03:31:47 -0000 Subject: [llvm-commits] [llvm] r41095 - /llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp Message-ID: <200708150331.l7F3VlWE022248@zion.cs.uiuc.edu> Author: dpatel Date: Tue Aug 14 22:31:47 2007 New Revision: 41095 URL: http://llvm.org/viewvc/llvm-project?rev=41095&view=rev Log: Cleanup removeBlocks. Use dominance frontier to fixup incoming edges of successor blocks not domianted by DeadBB. Use df_iterator to walk and delete basic blocks dominated by DeadBB. Modified: llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp Modified: llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp?rev=41095&r1=41094&r2=41095&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp Tue Aug 14 22:31:47 2007 @@ -20,6 +20,7 @@ #include "llvm/Transforms/Utils/BasicBlockUtils.h" #include "llvm/Transforms/Utils/Cloning.h" #include "llvm/Support/Compiler.h" +#include "llvm/ADT/DepthFirstIterator.h" #include "llvm/ADT/Statistic.h" using namespace llvm; @@ -47,6 +48,7 @@ AU.addRequiredID(LoopSimplifyID); AU.addPreservedID(LoopSimplifyID); AU.addRequired(); + AU.addRequired(); AU.addPreserved(); AU.addPreserved(); } @@ -600,68 +602,80 @@ void LoopIndexSplit::removeBlocks(BasicBlock *DeadBB, Loop *LP, BasicBlock *LiveBB) { - SmallVector, 8> WorkList; - WorkList.push_back(std::make_pair(DeadBB, succ_begin(DeadBB))); - while (!WorkList.empty()) { - BasicBlock *BB = WorkList.back(). first; - succ_iterator SIter = WorkList.back().second; - - // If all successor's are processed then remove this block. - if (SIter == succ_end(BB)) { - WorkList.pop_back(); - for(BasicBlock::iterator BBI = BB->begin(), BBE = BB->end(); - BBI != BBE; ++BBI) { - Instruction *I = BBI; - I->replaceAllUsesWith(UndefValue::get(I->getType())); - I->eraseFromParent(); - } - LPM->deleteSimpleAnalysisValue(BB, LP); - DT->eraseNode(BB); - DF->removeBlock(BB); - LI->removeBlock(BB); - BB->eraseFromParent(); - } else { - BasicBlock *SuccBB = *SIter; - ++WorkList.back().second; + // First update DeadBB's dominance frontier. + DominanceFrontier::iterator DeadBBDF = DF->find(DeadBB); + if (DeadBBDF != DF->end()) { + SmallVector PredBlocks; + + DominanceFrontier::DomSetType DeadBBSet = DeadBBDF->second; + for (DominanceFrontier::DomSetType::iterator DeadBBSetI = DeadBBSet.begin(), + DeadBBSetE = DeadBBSet.end(); DeadBBSetI != DeadBBSetE; ++DeadBBSetI) { + BasicBlock *FrontierBB = *DeadBBSetI; - if (DT->dominates(BB, SuccBB)) { - WorkList.push_back(std::make_pair(SuccBB, succ_begin(SuccBB))); - continue; - } else { - // If SuccBB is not dominated by BB then it is not removed, however remove - // any PHI incoming edge from BB. - for(BasicBlock::iterator SBI = SuccBB->begin(), SBE = SuccBB->end(); - SBI != SBE; ++SBI) { - if (PHINode *PN = dyn_cast(SBI)) - PN->removeIncomingValue(BB); - else - break; + // Rremove any PHI incoming edge from blocks dominated by DeadBB. + PredBlocks.clear(); + for(pred_iterator PI = pred_begin(FrontierBB), PE = pred_end(FrontierBB); + PI != PE; ++PI) { + BasicBlock *P = *PI; + if (P == DeadBB || DT->dominates(DeadBB, P)) + PredBlocks.push_back(P); + } + + for(BasicBlock::iterator FBI = FrontierBB->begin(), FBE = FrontierBB->end(); + FBI != FBE; ++FBI) { + if (PHINode *PN = dyn_cast(FBI)) { + for(SmallVector::iterator PI = PredBlocks.begin(), + PE = PredBlocks.end(); PI != PE; ++PI) { + BasicBlock *P = *PI; + PN->removeIncomingValue(P); + } } + else + break; + } - DT->changeImmediateDominator(SuccBB, LiveBB); - - // If BB is not dominating SuccBB then SuccBB is in BB's dominance - // frontiner. - DominanceFrontier::iterator BBDF = DF->find(BB); - DF->removeFromFrontier(BBDF, SuccBB); - - // LiveBB is now dominating SuccBB. Which means SuccBB's dominance - // frontier is member of LiveBB's dominance frontier. However, SuccBB - // itself is not member of LiveBB's dominance frontier. - DominanceFrontier::iterator LiveDF = DF->find(LiveBB); - DominanceFrontier::iterator SuccDF = DF->find(SuccBB); - DominanceFrontier::DomSetType SuccBBSet = SuccDF->second; - for (DominanceFrontier::DomSetType::iterator SuccBBSetI = SuccBBSet.begin(), - SuccBBSetE = SuccBBSet.end(); SuccBBSetI != SuccBBSetE; ++SuccBBSetI) { - BasicBlock *DFMember = *SuccBBSetI; - // Insert only if LiveBB dominates DFMember. - if (!DT->dominates(LiveBB, DFMember)) - LiveDF->second.insert(DFMember); - } + DT->changeImmediateDominator(FrontierBB, LiveBB); - DF->removeFromFrontier(LiveDF, SuccBB); + // LiveBB is now dominating FrontierBB. Which means FrontierBB's dominance + // frontier is member of LiveBB's dominance frontier. However, FrontierBB + // itself is not member of LiveBB's dominance frontier. + DominanceFrontier::iterator LiveDF = DF->find(LiveBB); + DominanceFrontier::iterator FrontierDF = DF->find(FrontierBB); + DominanceFrontier::DomSetType FrontierBBSet = FrontierDF->second; + for (DominanceFrontier::DomSetType::iterator FrontierBBSetI = FrontierBBSet.begin(), + FrontierBBSetE = FrontierBBSet.end(); FrontierBBSetI != FrontierBBSetE; ++FrontierBBSetI) { + BasicBlock *DFMember = *FrontierBBSetI; + // Insert only if LiveBB dominates DFMember. + if (!DT->dominates(LiveBB, DFMember)) + LiveDF->second.insert(DFMember); } + LiveDF->second.erase(FrontierBB); + } + } + + // Now remove DeadBB and all nodes dominated by DeadBB in df order. + SmallVector WorkList; + DomTreeNode *DN = DT->getNode(DeadBB); + for (df_iterator DI = df_begin(DN), + E = df_end(DN); DI != E; ++DI) { + BasicBlock *BB = DI->getBlock(); + WorkList.push_back(BB); + BB->getTerminator()->eraseFromParent(); + } + + while (!WorkList.empty()) { + BasicBlock *BB = WorkList.back(); WorkList.pop_back(); + for(BasicBlock::iterator BBI = BB->begin(), BBE = BB->end(); + BBI != BBE; ++BBI) { + Instruction *I = BBI; + I->replaceAllUsesWith(UndefValue::get(I->getType())); + I->eraseFromParent(); } + LPM->deleteSimpleAnalysisValue(BB, LP); + DT->eraseNode(BB); + DF->removeBlock(BB); + LI->removeBlock(BB); + BB->eraseFromParent(); } } From dpatel at apple.com Tue Aug 14 22:34:54 2007 From: dpatel at apple.com (Devang Patel) Date: Wed, 15 Aug 2007 03:34:54 -0000 Subject: [llvm-commits] [llvm] r41096 - /llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp Message-ID: <200708150334.l7F3Ys3L022321@zion.cs.uiuc.edu> Author: dpatel Date: Tue Aug 14 22:34:53 2007 New Revision: 41096 URL: http://llvm.org/viewvc/llvm-project?rev=41096&view=rev Log: Dominance frontier is now required. Modified: llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp Modified: llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp?rev=41096&r1=41095&r2=41096&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp Tue Aug 14 22:34:53 2007 @@ -162,7 +162,7 @@ SE = &getAnalysis(); DT = &getAnalysis(); LI = &getAnalysis(); - DF = getAnalysisToUpdate(); + DF = &getAnalysis(); initialize(); From djg at cray.com Wed Aug 15 08:36:30 2007 From: djg at cray.com (Dan Gohman) Date: Wed, 15 Aug 2007 13:36:30 -0000 Subject: [llvm-commits] [llvm] r41097 - in /llvm/trunk/test: Analysis/LoadVN/ Assembler/ C++Frontend/ CFrontend/ CodeGen/ARM/ CodeGen/Alpha/ CodeGen/CBackend/ CodeGen/Generic/ CodeGen/PowerPC/ CodeGen/SPARC/ CodeGen/X86/ Other/ TableGen/ Transforms/ConstProp/ Transforms/GVN/ Transforms/IndVarsSimplify/ Transforms/InstCombine/ Transforms/LoopSimplify/ Transforms/LoopStrengthReduce/ Transforms/LoopUnswitch/ Transforms/LowerSwitch/ Transforms/Reassociate/ Transforms/SimplifyCFG/ Message-ID: <200708151336.l7FDaZ6R019275@zion.cs.uiuc.edu> Author: djg Date: Wed Aug 15 08:36:28 2007 New Revision: 41097 URL: http://llvm.org/viewvc/llvm-project?rev=41097&view=rev Log: Convert tests using "| wc -l | grep ..." to use the count script. Modified: llvm/trunk/test/Analysis/LoadVN/casts.ll llvm/trunk/test/Assembler/2007-01-12-Varargs-Upgrade.ll llvm/trunk/test/Assembler/2007-01-27-UpgradePointers.ll llvm/trunk/test/C++Frontend/2007-04-11-InlineStorageClassC++.cpp llvm/trunk/test/CFrontend/2004-02-13-BuiltinFrameReturnAddress.c.tr llvm/trunk/test/CFrontend/2004-02-13-Memset.c llvm/trunk/test/CFrontend/2006-01-16-BitCountIntrinsicsUnsigned.c llvm/trunk/test/CFrontend/2006-01-23-FileScopeAsm.c llvm/trunk/test/CFrontend/2007-04-11-InlineStorageClassC89.c llvm/trunk/test/CFrontend/2007-04-11-InlineStorageClassC99.c llvm/trunk/test/CFrontend/2007-07-29-RestrictPtrArg.c llvm/trunk/test/CFrontend/sret.c llvm/trunk/test/CodeGen/ARM/2007-05-07-tailmerge-1.ll llvm/trunk/test/CodeGen/ARM/2007-05-09-tailmerge-2.ll llvm/trunk/test/CodeGen/ARM/2007-05-22-tailmerge-3.ll llvm/trunk/test/CodeGen/ARM/arguments.ll llvm/trunk/test/CodeGen/ARM/bits.ll llvm/trunk/test/CodeGen/ARM/constants.ll llvm/trunk/test/CodeGen/ARM/fcopysign.ll llvm/trunk/test/CodeGen/ARM/fp.ll llvm/trunk/test/CodeGen/ARM/fpcmp.ll llvm/trunk/test/CodeGen/ARM/fpmem.ll llvm/trunk/test/CodeGen/ARM/fptoint.ll llvm/trunk/test/CodeGen/ARM/hello.ll llvm/trunk/test/CodeGen/ARM/ifcvt1.ll llvm/trunk/test/CodeGen/ARM/ifcvt2.ll llvm/trunk/test/CodeGen/ARM/ifcvt3.ll llvm/trunk/test/CodeGen/ARM/ifcvt4.ll llvm/trunk/test/CodeGen/ARM/ifcvt5.ll llvm/trunk/test/CodeGen/ARM/ifcvt6.ll llvm/trunk/test/CodeGen/ARM/ifcvt7.ll llvm/trunk/test/CodeGen/ARM/ifcvt8.ll llvm/trunk/test/CodeGen/ARM/insn-sched1.ll llvm/trunk/test/CodeGen/ARM/large-stack.ll llvm/trunk/test/CodeGen/ARM/ldm.ll llvm/trunk/test/CodeGen/ARM/ldr.ll llvm/trunk/test/CodeGen/ARM/ldr_ext.ll llvm/trunk/test/CodeGen/ARM/ldr_frame.ll llvm/trunk/test/CodeGen/ARM/ldr_post.ll llvm/trunk/test/CodeGen/ARM/ldr_pre.ll llvm/trunk/test/CodeGen/ARM/load-global.ll llvm/trunk/test/CodeGen/ARM/long-setcc.ll llvm/trunk/test/CodeGen/ARM/long.ll llvm/trunk/test/CodeGen/ARM/long_shift.ll llvm/trunk/test/CodeGen/ARM/mul.ll llvm/trunk/test/CodeGen/ARM/mulhi.ll llvm/trunk/test/CodeGen/ARM/mvn.ll llvm/trunk/test/CodeGen/ARM/pack.ll llvm/trunk/test/CodeGen/ARM/select.ll llvm/trunk/test/CodeGen/ARM/select_xform.ll llvm/trunk/test/CodeGen/ARM/smul.ll llvm/trunk/test/CodeGen/ARM/stack-frame.ll llvm/trunk/test/CodeGen/ARM/str_post.ll llvm/trunk/test/CodeGen/ARM/str_pre.ll llvm/trunk/test/CodeGen/ARM/str_trunc.ll llvm/trunk/test/CodeGen/ARM/sxt_rot.ll llvm/trunk/test/CodeGen/ARM/trunc_ldr.ll llvm/trunk/test/CodeGen/ARM/unord.ll llvm/trunk/test/CodeGen/ARM/uxt_rot.ll llvm/trunk/test/CodeGen/ARM/uxtb.ll llvm/trunk/test/CodeGen/ARM/vargs2.ll llvm/trunk/test/CodeGen/ARM/vargs_align.ll llvm/trunk/test/CodeGen/ARM/vfp.ll llvm/trunk/test/CodeGen/Alpha/2005-07-12-TwoMallocCalls.ll llvm/trunk/test/CodeGen/Alpha/add.ll llvm/trunk/test/CodeGen/Alpha/cmpbge.ll llvm/trunk/test/CodeGen/CBackend/2006-12-11-Float-Bitcast.ll llvm/trunk/test/CodeGen/Generic/SwitchLowering.ll llvm/trunk/test/CodeGen/Generic/phi-immediate-factoring.ll llvm/trunk/test/CodeGen/Generic/switch-crit-edge-constant.ll llvm/trunk/test/CodeGen/Generic/switch-lower-feature-2.ll llvm/trunk/test/CodeGen/Generic/switch-lower-feature.ll llvm/trunk/test/CodeGen/PowerPC/2005-09-02-LegalizeDuplicatesCalls.ll llvm/trunk/test/CodeGen/PowerPC/2006-07-07-ComputeMaskedBits.ll llvm/trunk/test/CodeGen/PowerPC/2007-02-23-lr-saved-twice.ll llvm/trunk/test/CodeGen/PowerPC/2007-05-22-tailmerge-3.ll llvm/trunk/test/CodeGen/PowerPC/addc.ll llvm/trunk/test/CodeGen/PowerPC/align.ll llvm/trunk/test/CodeGen/PowerPC/branch-opt.ll llvm/trunk/test/CodeGen/PowerPC/bswap-load-store.ll llvm/trunk/test/CodeGen/PowerPC/buildvec_canonicalize.ll llvm/trunk/test/CodeGen/PowerPC/calls.ll llvm/trunk/test/CodeGen/PowerPC/constants.ll llvm/trunk/test/CodeGen/PowerPC/eqv-andc-orc-nor.ll llvm/trunk/test/CodeGen/PowerPC/extsh.ll llvm/trunk/test/CodeGen/PowerPC/fma.ll llvm/trunk/test/CodeGen/PowerPC/fp-branch.ll llvm/trunk/test/CodeGen/PowerPC/fp_to_uint.ll llvm/trunk/test/CodeGen/PowerPC/mulhs.ll llvm/trunk/test/CodeGen/PowerPC/rlwimi.ll llvm/trunk/test/CodeGen/PowerPC/rlwimi2.ll llvm/trunk/test/CodeGen/PowerPC/rlwinm.ll llvm/trunk/test/CodeGen/PowerPC/rlwinm2.ll llvm/trunk/test/CodeGen/PowerPC/rotl-2.ll llvm/trunk/test/CodeGen/PowerPC/rotl.ll llvm/trunk/test/CodeGen/PowerPC/subc.ll llvm/trunk/test/CodeGen/PowerPC/unsafe-math.ll llvm/trunk/test/CodeGen/PowerPC/vcmp-fold.ll llvm/trunk/test/CodeGen/PowerPC/vec_shuffle.ll llvm/trunk/test/CodeGen/PowerPC/vec_spat.ll llvm/trunk/test/CodeGen/SPARC/xnor.ll llvm/trunk/test/CodeGen/X86/2006-01-19-ISelFoldingBug.ll llvm/trunk/test/CodeGen/X86/2006-04-27-ISelFoldingBug.ll llvm/trunk/test/CodeGen/X86/2006-11-28-Memcpy.ll llvm/trunk/test/CodeGen/X86/2007-01-08-InstrSched.ll llvm/trunk/test/CodeGen/X86/2007-03-15-GEP-Idx-Sink.ll llvm/trunk/test/CodeGen/X86/2007-04-25-MMX-PADDQ.ll llvm/trunk/test/CodeGen/X86/2007-06-14-branchfold.ll llvm/trunk/test/CodeGen/X86/2007-08-10-LEA16Use32.ll llvm/trunk/test/CodeGen/X86/2007-08-10-SignExtSubreg.ll llvm/trunk/test/CodeGen/X86/2007-08-13-SpillerReuse.ll llvm/trunk/test/CodeGen/X86/and-or-fold.ll llvm/trunk/test/CodeGen/X86/bitcast2.ll llvm/trunk/test/CodeGen/X86/bswap.ll llvm/trunk/test/CodeGen/X86/call-push.ll llvm/trunk/test/CodeGen/X86/cmp-test.ll llvm/trunk/test/CodeGen/X86/commute-two-addr.ll llvm/trunk/test/CodeGen/X86/compare_folding.llx llvm/trunk/test/CodeGen/X86/dollar-name.ll llvm/trunk/test/CodeGen/X86/extend.ll llvm/trunk/test/CodeGen/X86/extern_weak.ll llvm/trunk/test/CodeGen/X86/fabs.ll llvm/trunk/test/CodeGen/X86/fildll.ll llvm/trunk/test/CodeGen/X86/fp-stack-ret.ll llvm/trunk/test/CodeGen/X86/fsxor-alignment.ll llvm/trunk/test/CodeGen/X86/lea-recursion.ll llvm/trunk/test/CodeGen/X86/long-setcc.ll llvm/trunk/test/CodeGen/X86/loop-strength-reduce.ll llvm/trunk/test/CodeGen/X86/mingw-alloca.ll llvm/trunk/test/CodeGen/X86/mmx-insert-element.ll llvm/trunk/test/CodeGen/X86/mmx-punpckhdq.ll llvm/trunk/test/CodeGen/X86/peep-vector-extract-insert.ll llvm/trunk/test/CodeGen/X86/pr1489.ll llvm/trunk/test/CodeGen/X86/pr1505b.ll llvm/trunk/test/CodeGen/X86/rotate.ll llvm/trunk/test/CodeGen/X86/scalar-min-max-fill-operand.ll llvm/trunk/test/CodeGen/X86/scalar_sse_minmax.ll llvm/trunk/test/CodeGen/X86/shift-codegen.ll llvm/trunk/test/CodeGen/X86/shift-double.llx llvm/trunk/test/CodeGen/X86/shift-folding.ll llvm/trunk/test/CodeGen/X86/sse-align-1.ll llvm/trunk/test/CodeGen/X86/sse-align-10.ll llvm/trunk/test/CodeGen/X86/sse-align-12.ll llvm/trunk/test/CodeGen/X86/sse-align-2.ll llvm/trunk/test/CodeGen/X86/sse-align-3.ll llvm/trunk/test/CodeGen/X86/sse-align-4.ll llvm/trunk/test/CodeGen/X86/sse-align-5.ll llvm/trunk/test/CodeGen/X86/sse-align-6.ll llvm/trunk/test/CodeGen/X86/sse-align-7.ll llvm/trunk/test/CodeGen/X86/sse-align-8.ll llvm/trunk/test/CodeGen/X86/sse-align-9.ll llvm/trunk/test/CodeGen/X86/store-global-address.ll llvm/trunk/test/CodeGen/X86/store_op_load_fold2.ll llvm/trunk/test/CodeGen/X86/test-hidden.ll llvm/trunk/test/CodeGen/X86/test-pic-1.ll llvm/trunk/test/CodeGen/X86/test-pic-2.ll llvm/trunk/test/CodeGen/X86/test-pic-3.ll llvm/trunk/test/CodeGen/X86/test-pic-4.ll llvm/trunk/test/CodeGen/X86/test-pic-5.ll llvm/trunk/test/CodeGen/X86/test-pic-6.ll llvm/trunk/test/CodeGen/X86/test-pic-cpool.ll llvm/trunk/test/CodeGen/X86/test-pic-jtbl.ll llvm/trunk/test/CodeGen/X86/vec_extract.ll llvm/trunk/test/CodeGen/X86/vec_insert.ll llvm/trunk/test/CodeGen/X86/vec_logical.ll llvm/trunk/test/CodeGen/X86/vec_set-2.ll llvm/trunk/test/CodeGen/X86/vec_set-3.ll llvm/trunk/test/CodeGen/X86/vec_set-4.ll llvm/trunk/test/CodeGen/X86/vec_set-5.ll llvm/trunk/test/CodeGen/X86/vec_set-6.ll llvm/trunk/test/CodeGen/X86/vec_set-7.ll llvm/trunk/test/CodeGen/X86/vec_set.ll llvm/trunk/test/CodeGen/X86/vec_shuffle-10.ll llvm/trunk/test/CodeGen/X86/vec_shuffle-2.ll llvm/trunk/test/CodeGen/X86/vec_shuffle-3.ll llvm/trunk/test/CodeGen/X86/vec_shuffle-4.ll llvm/trunk/test/CodeGen/X86/vec_shuffle-5.ll llvm/trunk/test/CodeGen/X86/vec_shuffle-6.ll llvm/trunk/test/CodeGen/X86/vec_shuffle-7.ll llvm/trunk/test/CodeGen/X86/vec_shuffle-9.ll llvm/trunk/test/CodeGen/X86/vec_shuffle.ll llvm/trunk/test/CodeGen/X86/vec_splat-2.ll llvm/trunk/test/CodeGen/X86/vec_ss_load_fold.ll llvm/trunk/test/CodeGen/X86/vec_zero.ll llvm/trunk/test/CodeGen/X86/x86-64-mem.ll llvm/trunk/test/Other/2004-08-16-LowerPacked.ll llvm/trunk/test/Other/2004-08-16-PackedGlobalConstant.ll llvm/trunk/test/Other/2004-08-16-PackedSelect.ll llvm/trunk/test/Other/2004-08-16-PackedSimple.ll llvm/trunk/test/TableGen/MultiClass.td llvm/trunk/test/Transforms/ConstProp/float-to-ptr-cast.ll llvm/trunk/test/Transforms/GVN/basic.ll llvm/trunk/test/Transforms/GVN/dominated.ll llvm/trunk/test/Transforms/GVN/mixed.ll llvm/trunk/test/Transforms/GVN/nonlocal.ll llvm/trunk/test/Transforms/GVN/semidominated.ll llvm/trunk/test/Transforms/IndVarsSimplify/complex-scev.ll llvm/trunk/test/Transforms/InstCombine/2006-10-26-VectorReassoc.ll llvm/trunk/test/Transforms/InstCombine/2006-12-15-Range-Test.ll llvm/trunk/test/Transforms/InstCombine/and-compare.ll llvm/trunk/test/Transforms/InstCombine/and-or-not.ll llvm/trunk/test/Transforms/InstCombine/and-xor-merge.ll llvm/trunk/test/Transforms/InstCombine/apint-and-compare.ll llvm/trunk/test/Transforms/InstCombine/apint-and-xor-merge.ll llvm/trunk/test/Transforms/InstCombine/apint-shift-simplify.ll llvm/trunk/test/Transforms/InstCombine/bswap-fold.ll llvm/trunk/test/Transforms/InstCombine/bswap.ll llvm/trunk/test/Transforms/InstCombine/loadstore-alignment.ll llvm/trunk/test/Transforms/InstCombine/shift-simplify.ll llvm/trunk/test/Transforms/InstCombine/shift-sra.ll llvm/trunk/test/Transforms/InstCombine/store-merge.ll llvm/trunk/test/Transforms/InstCombine/udiv_select_to_select_shift.ll llvm/trunk/test/Transforms/InstCombine/vec_insert_to_shuffle.ll llvm/trunk/test/Transforms/InstCombine/zext-fold.ll llvm/trunk/test/Transforms/LoopSimplify/phi-node-simplify.ll llvm/trunk/test/Transforms/LoopStrengthReduce/dont_insert_redundant_ops.ll llvm/trunk/test/Transforms/LoopStrengthReduce/related_indvars.ll llvm/trunk/test/Transforms/LoopStrengthReduce/share_code_in_preheader.ll llvm/trunk/test/Transforms/LoopStrengthReduce/share_ivs.ll llvm/trunk/test/Transforms/LoopUnswitch/2007-07-18-DomInfo.ll llvm/trunk/test/Transforms/LowerSwitch/feature.ll llvm/trunk/test/Transforms/Reassociate/basictest3.ll llvm/trunk/test/Transforms/Reassociate/mul-factor3.ll llvm/trunk/test/Transforms/Reassociate/mulfactor.ll llvm/trunk/test/Transforms/Reassociate/mulfactor2.ll llvm/trunk/test/Transforms/Reassociate/shift-factor.ll llvm/trunk/test/Transforms/SimplifyCFG/branch-fold.ll llvm/trunk/test/Transforms/SimplifyCFG/switch_switch_fold.ll Modified: llvm/trunk/test/Analysis/LoadVN/casts.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/LoadVN/casts.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/Analysis/LoadVN/casts.ll (original) +++ llvm/trunk/test/Analysis/LoadVN/casts.ll Wed Aug 15 08:36:28 2007 @@ -1,7 +1,7 @@ ; Check to make sure that Value Numbering doesn't merge casts of different ; flavors. ; RUN: llvm-upgrade < %s | llvm-as | opt -load-vn -gcse | llvm-dis | \ -; RUN: grep {\[sz\]ext} | wc -l | grep 2 +; RUN: grep {\[sz\]ext} | count 2 declare void %external(int) Modified: llvm/trunk/test/Assembler/2007-01-12-Varargs-Upgrade.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Assembler/2007-01-12-Varargs-Upgrade.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/Assembler/2007-01-12-Varargs-Upgrade.ll (original) +++ llvm/trunk/test/Assembler/2007-01-12-Varargs-Upgrade.ll Wed Aug 15 08:36:28 2007 @@ -1,7 +1,7 @@ ; For PR1093: This test checks that llvm-upgrade correctly translates ; the llvm.va_* intrinsics to their cannonical argument form (i8*). ; RUN: llvm-upgrade < %s | llvm-as | llvm-dis | \ -; RUN: grep { bitcast} | wc -l | grep 5 +; RUN: grep { bitcast} | count 5 %str = internal constant [7 x ubyte] c"%d %d\0A\00" ; <[7 x ubyte]*> [#uses=1] Modified: llvm/trunk/test/Assembler/2007-01-27-UpgradePointers.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Assembler/2007-01-27-UpgradePointers.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/Assembler/2007-01-27-UpgradePointers.ll (original) +++ llvm/trunk/test/Assembler/2007-01-27-UpgradePointers.ll Wed Aug 15 08:36:28 2007 @@ -1,6 +1,6 @@ ; PR1137 ; RUN: llvm-upgrade < %s | llvm-as -o /dev/null -f -; RUN: llvm-upgrade < %s | grep {tmp = alloca} | wc -l | grep 1 +; RUN: llvm-upgrade < %s | grep {tmp = alloca} | count 1 ; target datalayout = "e-p:32:32" target endian = little Modified: llvm/trunk/test/C++Frontend/2007-04-11-InlineStorageClassC++.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/C%2B%2BFrontend/2007-04-11-InlineStorageClassC%2B%2B.cpp?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/C++Frontend/2007-04-11-InlineStorageClassC++.cpp (original) +++ llvm/trunk/test/C++Frontend/2007-04-11-InlineStorageClassC++.cpp Wed Aug 15 08:36:28 2007 @@ -1,17 +1,17 @@ // RUN: %llvmgxx %s -S -emit-llvm -O0 -o - | grep define | \ -// RUN: grep xglobWeak | grep linkonce | wc -l | grep 1 +// RUN: grep xglobWeak | grep linkonce | count 1 // RUN: %llvmgxx %s -S -emit-llvm -O0 -o - | grep define | \ -// RUN: grep xextWeak | grep linkonce | wc -l | grep 1 +// RUN: grep xextWeak | grep linkonce | count 1 // RUN: %llvmgxx %s -S -emit-llvm -O0 -o - | grep define | \ -// RUN: grep xWeaknoinline | grep weak | wc -l | grep 1 +// RUN: grep xWeaknoinline | grep weak | count 1 // RUN: %llvmgxx %s -S -emit-llvm -O0 -o - | grep define | \ -// RUN: grep xWeakextnoinline | grep weak | wc -l | grep 1 +// RUN: grep xWeakextnoinline | grep weak | count 1 // RUN: %llvmgxx %s -S -emit-llvm -O0 -o - | grep define | \ -// RUN: grep xglobnoWeak | grep linkonce | wc -l | grep 1 +// RUN: grep xglobnoWeak | grep linkonce | count 1 // RUN: %llvmgxx %s -S -emit-llvm -O0 -o - | grep define | \ -// RUN: grep xstatnoWeak | grep internal | wc -l | grep 1 +// RUN: grep xstatnoWeak | grep internal | count 1 // RUN: %llvmgxx %s -S -emit-llvm -O0 -o - | grep define | \ -// RUN: grep xextnoWeak | grep linkonce | wc -l | grep 1 +// RUN: grep xextnoWeak | grep linkonce | count 1 inline int xglobWeak(int) __attribute__((weak)); inline int xglobWeak (int i) { return i*2; Modified: llvm/trunk/test/CFrontend/2004-02-13-BuiltinFrameReturnAddress.c.tr URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CFrontend/2004-02-13-BuiltinFrameReturnAddress.c.tr?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== Binary files - no diff available. Modified: llvm/trunk/test/CFrontend/2004-02-13-Memset.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CFrontend/2004-02-13-Memset.c?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CFrontend/2004-02-13-Memset.c (original) +++ llvm/trunk/test/CFrontend/2004-02-13-Memset.c Wed Aug 15 08:36:28 2007 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -xc %s -c -o - | llvm-dis | grep llvm.memset | wc -l | grep 3 +// RUN: %llvmgcc -xc %s -c -o - | llvm-dis | grep llvm.memset | count 3 void test(int* X, char *Y) { memset(X, 4, 1000); Modified: llvm/trunk/test/CFrontend/2006-01-16-BitCountIntrinsicsUnsigned.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CFrontend/2006-01-16-BitCountIntrinsicsUnsigned.c?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CFrontend/2006-01-16-BitCountIntrinsicsUnsigned.c (original) +++ llvm/trunk/test/CFrontend/2006-01-16-BitCountIntrinsicsUnsigned.c Wed Aug 15 08:36:28 2007 @@ -1,5 +1,5 @@ -// RUN: %llvmgcc -S %s -o - | grep {llvm.ctlz.i32( i32} | wc -l | grep 2 -// RUN: %llvmgcc -S %s -o - | grep {llvm.ctlz.i32(i32} | wc -l | grep 1 +// RUN: %llvmgcc -S %s -o - | grep {llvm.ctlz.i32( i32} | count 2 +// RUN: %llvmgcc -S %s -o - | grep {llvm.ctlz.i32(i32} | count 1 unsigned t2(unsigned X) { return __builtin_clz(X); Modified: llvm/trunk/test/CFrontend/2006-01-23-FileScopeAsm.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CFrontend/2006-01-23-FileScopeAsm.c?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CFrontend/2006-01-23-FileScopeAsm.c (original) +++ llvm/trunk/test/CFrontend/2006-01-23-FileScopeAsm.c Wed Aug 15 08:36:28 2007 @@ -1,5 +1,5 @@ // RUN: %llvmgcc %s -S -o - | llvm-as | opt -std-compile-opts | \ -// RUN: llvm-dis | grep {foo\[12345\]} | wc -l | grep 5 +// RUN: llvm-dis | grep {foo\[12345\]} | count 5 __asm__ ("foo1"); __asm__ ("foo2"); Modified: llvm/trunk/test/CFrontend/2007-04-11-InlineStorageClassC89.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CFrontend/2007-04-11-InlineStorageClassC89.c?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CFrontend/2007-04-11-InlineStorageClassC89.c (original) +++ llvm/trunk/test/CFrontend/2007-04-11-InlineStorageClassC89.c Wed Aug 15 08:36:28 2007 @@ -1,19 +1,19 @@ // RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | grep define | grep xglobWeak | \ -// RUN: grep weak | wc -l | grep 1 +// RUN: grep weak | count 1 // RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | grep define | grep xextWeak | \ -// RUN: grep weak | wc -l | grep 1 +// RUN: grep weak | count 1 // RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | grep define | \ -// RUN: grep xWeaknoinline | grep weak | wc -l | grep 1 +// RUN: grep xWeaknoinline | grep weak | count 1 // RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | grep define | \ -// RUN: grep xWeakextnoinline | grep weak | wc -l | grep 1 +// RUN: grep xWeakextnoinline | grep weak | count 1 // RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | grep define | \ // RUN: grep xglobnoWeak | grep -v internal | grep -v weak | \ -// RUN: grep -v linkonce | wc -l | grep 1 +// RUN: grep -v linkonce | count 1 // RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | grep define | \ -// RUN: grep xstatnoWeak | grep internal | wc -l | grep 1 +// RUN: grep xstatnoWeak | grep internal | count 1 // RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | grep declare | \ // RUN: grep xextnoWeak | grep -v internal | grep -v weak | \ -// RUN: grep -v linkonce | wc -l | grep 1 +// RUN: grep -v linkonce | count 1 inline int xglobWeak(int) __attribute__((weak)); inline int xglobWeak (int i) { return i*2; Modified: llvm/trunk/test/CFrontend/2007-04-11-InlineStorageClassC99.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CFrontend/2007-04-11-InlineStorageClassC99.c?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CFrontend/2007-04-11-InlineStorageClassC99.c (original) +++ llvm/trunk/test/CFrontend/2007-04-11-InlineStorageClassC99.c Wed Aug 15 08:36:28 2007 @@ -1,19 +1,19 @@ // RUN: %llvmgcc -std=c99 %s -S -emit-llvm -O0 -o - | grep declare | \ -// RUN: grep xglobWeak | grep extern_weak | wc -l | grep 1 +// RUN: grep xglobWeak | grep extern_weak | count 1 // RUN: %llvmgcc -std=c99 %s -S -emit-llvm -O0 -o - | grep define | \ -// RUN: grep xextWeak | grep weak | wc -l | grep 1 +// RUN: grep xextWeak | grep weak | count 1 // RUN: %llvmgcc -std=c99 %s -S -emit-llvm -O0 -o - | grep define | \ -// RUN: grep xWeaknoinline | grep weak | wc -l | grep 1 +// RUN: grep xWeaknoinline | grep weak | count 1 // RUN: %llvmgcc -std=c99 %s -S -emit-llvm -O0 -o - | grep define | \ -// RUN: grep xWeakextnoinline | grep weak | wc -l | grep 1 +// RUN: grep xWeakextnoinline | grep weak | count 1 // RUN: %llvmgcc -std=c99 %s -S -emit-llvm -O0 -o - | grep declare | \ // RUN: grep xglobnoWeak | grep -v internal | grep -v weak | \ -// RUN: grep -v linkonce | wc -l | grep 1 +// RUN: grep -v linkonce | count 1 // RUN: %llvmgcc -std=c99 %s -S -emit-llvm -O0 -o - | grep define | \ -// RUN: grep xstatnoWeak | grep internal | wc -l | grep 1 +// RUN: grep xstatnoWeak | grep internal | count 1 // RUN: %llvmgcc -std=c99 %s -S -emit-llvm -O0 -o - | grep define | \ // RUN: grep xextnoWeak | grep -v internal | grep -v weak | \ -// RUN: grep -v linkonce | wc -l | grep 1 +// RUN: grep -v linkonce | count 1 inline int xglobWeak(int) __attribute__((weak)); inline int xglobWeak (int i) { return i*2; Modified: llvm/trunk/test/CFrontend/2007-07-29-RestrictPtrArg.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CFrontend/2007-07-29-RestrictPtrArg.c?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CFrontend/2007-07-29-RestrictPtrArg.c (original) +++ llvm/trunk/test/CFrontend/2007-07-29-RestrictPtrArg.c Wed Aug 15 08:36:28 2007 @@ -3,4 +3,4 @@ void foo(int * __restrict myptr1, int * myptr2) { myptr1[0] = 0; myptr2[0] = 0; -} \ No newline at end of file +} Modified: llvm/trunk/test/CFrontend/sret.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CFrontend/sret.c?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CFrontend/sret.c (original) +++ llvm/trunk/test/CFrontend/sret.c Wed Aug 15 08:36:28 2007 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | grep sret | wc -l | grep 5 +// RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | grep sret | count 5 struct abc { int a; Modified: llvm/trunk/test/CodeGen/ARM/2007-05-07-tailmerge-1.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/2007-05-07-tailmerge-1.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/2007-05-07-tailmerge-1.ll (original) +++ llvm/trunk/test/CodeGen/ARM/2007-05-07-tailmerge-1.ll Wed Aug 15 08:36:28 2007 @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=arm -enable-tail-merge | grep bl.*baz | wc -l | grep 1 -; RUN: llvm-as < %s | llc -march=arm -enable-tail-merge | grep bl.*quux | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=arm -enable-tail-merge | grep bl.*baz | count 1 +; RUN: llvm-as < %s | llc -march=arm -enable-tail-merge | grep bl.*quux | count 1 ; Check that calls to baz and quux are tail-merged. ; ModuleID = 'tail.c' Modified: llvm/trunk/test/CodeGen/ARM/2007-05-09-tailmerge-2.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/2007-05-09-tailmerge-2.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/2007-05-09-tailmerge-2.ll (original) +++ llvm/trunk/test/CodeGen/ARM/2007-05-09-tailmerge-2.ll Wed Aug 15 08:36:28 2007 @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=arm -enable-tail-merge | grep bl.*baz | wc -l | grep 1 -; RUN: llvm-as < %s | llc -march=arm -enable-tail-merge | grep bl.*quux | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=arm -enable-tail-merge | grep bl.*baz | count 1 +; RUN: llvm-as < %s | llc -march=arm -enable-tail-merge | grep bl.*quux | count 1 ; Check that calls to baz and quux are tail-merged. ; ModuleID = 'tail.c' Modified: llvm/trunk/test/CodeGen/ARM/2007-05-22-tailmerge-3.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/2007-05-22-tailmerge-3.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/2007-05-22-tailmerge-3.ll (original) +++ llvm/trunk/test/CodeGen/ARM/2007-05-22-tailmerge-3.ll Wed Aug 15 08:36:28 2007 @@ -1,7 +1,7 @@ -; RUN: llvm-as < %s | llc -march=arm | grep bl.*baz | wc -l | grep 1 -; RUN: llvm-as < %s | llc -march=arm | grep bl.*quux | wc -l | grep 1 -; RUN: llvm-as < %s | llc -march=arm -enable-tail-merge=0 | grep bl.*baz | wc -l | grep 2 -; RUN: llvm-as < %s | llc -march=arm -enable-tail-merge=0 | grep bl.*quux | wc -l | grep 2 +; RUN: llvm-as < %s | llc -march=arm | grep bl.*baz | count 1 +; RUN: llvm-as < %s | llc -march=arm | grep bl.*quux | count 1 +; RUN: llvm-as < %s | llc -march=arm -enable-tail-merge=0 | grep bl.*baz | count 2 +; RUN: llvm-as < %s | llc -march=arm -enable-tail-merge=0 | grep bl.*quux | count 2 ; Check that tail merging is the default on ARM, and that -enable-tail-merge=0 works. ; ModuleID = 'tail.c' Modified: llvm/trunk/test/CodeGen/ARM/arguments.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/arguments.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/arguments.ll (original) +++ llvm/trunk/test/CodeGen/ARM/arguments.ll Wed Aug 15 08:36:28 2007 @@ -1,7 +1,7 @@ ; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi | \ -; RUN: grep {mov r0, r2} | wc -l | grep 1 +; RUN: grep {mov r0, r2} | count 1 ; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin | \ -; RUN: grep {mov r0, r1} | wc -l | grep 1 +; RUN: grep {mov r0, r1} | count 1 define i32 @f(i32 %a, i64 %b) { %tmp = call i32 @g(i64 %b) Modified: llvm/trunk/test/CodeGen/ARM/bits.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/bits.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/bits.ll (original) +++ llvm/trunk/test/CodeGen/ARM/bits.ll Wed Aug 15 08:36:28 2007 @@ -1,9 +1,9 @@ ; RUN: llvm-as < %s | llc -march=arm > %t -; RUN: grep and %t | wc -l | grep 1 -; RUN: grep orr %t | wc -l | grep 1 -; RUN: grep eor %t | wc -l | grep 1 -; RUN: grep mov.*lsl %t | wc -l | grep 1 -; RUN: grep mov.*asr %t | wc -l | grep 1 +; RUN: grep and %t | count 1 +; RUN: grep orr %t | count 1 +; RUN: grep eor %t | count 1 +; RUN: grep mov.*lsl %t | count 1 +; RUN: grep mov.*asr %t | count 1 define i32 @f1(i32 %a, i32 %b) { entry: Modified: llvm/trunk/test/CodeGen/ARM/constants.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/constants.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/constants.ll (original) +++ llvm/trunk/test/CodeGen/ARM/constants.ll Wed Aug 15 08:36:28 2007 @@ -1,17 +1,17 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \ -; RUN: grep {mov r0, #0} | wc -l | grep 1 +; RUN: grep {mov r0, #0} | count 1 ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \ -; RUN: grep {mov r0, #255$} | wc -l | grep 1 +; RUN: grep {mov r0, #255$} | count 1 ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \ -; RUN: grep {mov r0.*256} | wc -l | grep 1 +; RUN: grep {mov r0.*256} | count 1 ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \ -; RUN: grep {orr.*256} | wc -l | grep 1 +; RUN: grep {orr.*256} | count 1 ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \ -; RUN: grep {mov r0, .*-1073741761} | wc -l | grep 1 +; RUN: grep {mov r0, .*-1073741761} | count 1 ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \ -; RUN: grep {mov r0, .*1008} | wc -l | grep 1 +; RUN: grep {mov r0, .*1008} | count 1 ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \ -; RUN: grep {cmp r0, #1, 16} | wc -l | grep 1 +; RUN: grep {cmp r0, #1, 16} | count 1 uint %f1() { ret uint 0 Modified: llvm/trunk/test/CodeGen/ARM/fcopysign.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/fcopysign.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/fcopysign.ll (original) +++ llvm/trunk/test/CodeGen/ARM/fcopysign.ll Wed Aug 15 08:36:28 2007 @@ -1,6 +1,6 @@ -; RUN: llvm-as < %s | llc -march=arm | grep bic | wc -l | grep 2 +; RUN: llvm-as < %s | llc -march=arm | grep bic | count 2 ; RUN: llvm-as < %s | llc -march=arm -mattr=+v6,+vfp2 | \ -; RUN: grep fneg | wc -l | grep 2 +; RUN: grep fneg | count 2 define float @test1(float %x, double %y) { %tmp = fpext float %x to double Modified: llvm/trunk/test/CodeGen/ARM/fp.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/fp.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/fp.ll (original) +++ llvm/trunk/test/CodeGen/ARM/fp.ll Wed Aug 15 08:36:28 2007 @@ -1,10 +1,10 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+vfp2 > %t -; RUN: grep fmsr %t | wc -l | grep 4 +; RUN: grep fmsr %t | count 4 ; RUN: grep fsitos %t -; RUN: grep fmrs %t | wc -l | grep 2 +; RUN: grep fmrs %t | count 2 ; RUN: grep fsitod %t -; RUN: grep fmrrd %t | wc -l | grep 5 -; RUN: grep fmdrr %t | wc -l | grep 2 +; RUN: grep fmrrd %t | count 5 +; RUN: grep fmdrr %t | count 2 ; RUN: grep fldd %t ; RUN: grep fuitod %t ; RUN: grep fuitos %t Modified: llvm/trunk/test/CodeGen/ARM/fpcmp.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/fpcmp.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/fpcmp.ll (original) +++ llvm/trunk/test/CodeGen/ARM/fpcmp.ll Wed Aug 15 08:36:28 2007 @@ -4,8 +4,8 @@ ; RUN: grep movgt %t ; RUN: grep movge %t ; RUN: grep movne %t -; RUN: grep fcmped %t | wc -l | grep 1 -; RUN: grep fcmpes %t | wc -l | grep 6 +; RUN: grep fcmped %t | count 1 +; RUN: grep fcmpes %t | count 6 int %f1(float %a) { entry: Modified: llvm/trunk/test/CodeGen/ARM/fpmem.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/fpmem.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/fpmem.ll (original) +++ llvm/trunk/test/CodeGen/ARM/fpmem.ll Wed Aug 15 08:36:28 2007 @@ -1,9 +1,9 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \ -; RUN: grep {mov r0, #0} | wc -l | grep 1 +; RUN: grep {mov r0, #0} | count 1 ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+vfp2 | \ -; RUN: grep {flds.*\\\[} | wc -l | grep 1 +; RUN: grep {flds.*\\\[} | count 1 ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+vfp2 | \ -; RUN: grep {fsts.*\\\[} | wc -l | grep 1 +; RUN: grep {fsts.*\\\[} | count 1 float %f1(float %a) { ret float 0.000000e+00 Modified: llvm/trunk/test/CodeGen/ARM/fptoint.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/fptoint.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/fptoint.ll (original) +++ llvm/trunk/test/CodeGen/ARM/fptoint.ll Wed Aug 15 08:36:28 2007 @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=arm -mattr=+v6,+vfp2 | grep fmrs | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=arm -mattr=+v6,+vfp2 | grep fmrs | count 1 ; RUN: llvm-as < %s | llc -march=arm -mattr=+v6,+vfp2 | not grep fmrrd @i = weak global i32 0 ; [#uses=2] Modified: llvm/trunk/test/CodeGen/ARM/hello.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/hello.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/hello.ll (original) +++ llvm/trunk/test/CodeGen/ARM/hello.ll Wed Aug 15 08:36:28 2007 @@ -1,8 +1,8 @@ ; RUN: llvm-as < %s | llc -march=arm -; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi | grep mov | wc -l | grep 1 +; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi | grep mov | count 1 ; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnu --disable-fp-elim | \ -; RUN: grep mov | wc -l | grep 3 -; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin | grep mov | wc -l | grep 2 +; RUN: grep mov | count 3 +; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin | grep mov | count 2 @str = internal constant [12 x i8] c"Hello World\00" Modified: llvm/trunk/test/CodeGen/ARM/ifcvt1.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/ifcvt1.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/ifcvt1.ll (original) +++ llvm/trunk/test/CodeGen/ARM/ifcvt1.ll Wed Aug 15 08:36:28 2007 @@ -1,5 +1,5 @@ ; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion -; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion | grep bx | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion | grep bx | count 1 define i32 @t1(i32 %a, i32 %b) { %tmp2 = icmp eq i32 %a, 0 Modified: llvm/trunk/test/CodeGen/ARM/ifcvt2.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/ifcvt2.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/ifcvt2.ll (original) +++ llvm/trunk/test/CodeGen/ARM/ifcvt2.ll Wed Aug 15 08:36:28 2007 @@ -1,7 +1,7 @@ ; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion -; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion | grep bxlt | wc -l | grep 1 -; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion | grep bxgt | wc -l | grep 1 -; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion | grep bxge | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion | grep bxlt | count 1 +; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion | grep bxgt | count 1 +; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion | grep bxge | count 1 define i32 @t1(i32 %a, i32 %b, i32 %c, i32 %d) { %tmp2 = icmp sgt i32 %c, 10 Modified: llvm/trunk/test/CodeGen/ARM/ifcvt3.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/ifcvt3.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/ifcvt3.ll (original) +++ llvm/trunk/test/CodeGen/ARM/ifcvt3.ll Wed Aug 15 08:36:28 2007 @@ -1,6 +1,6 @@ ; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion -; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion | grep cmpne | wc -l | grep 1 -; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion | grep bx | wc -l | grep 2 +; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion | grep cmpne | count 1 +; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion | grep bx | count 2 define i32 @t1(i32 %a, i32 %b, i32 %c, i32 %d) { switch i32 %c, label %cond_next [ Modified: llvm/trunk/test/CodeGen/ARM/ifcvt4.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/ifcvt4.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/ifcvt4.ll (original) +++ llvm/trunk/test/CodeGen/ARM/ifcvt4.ll Wed Aug 15 08:36:28 2007 @@ -1,6 +1,6 @@ ; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion -; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion | grep subgt | wc -l | grep 1 -; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion | grep suble | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion | grep subgt | count 1 +; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion | grep suble | count 1 ; FIXME: Check for # of unconditional branch after adding branch folding post ifcvt. define i32 @t(i32 %a, i32 %b) { Modified: llvm/trunk/test/CodeGen/ARM/ifcvt5.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/ifcvt5.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/ifcvt5.ll (original) +++ llvm/trunk/test/CodeGen/ARM/ifcvt5.ll Wed Aug 15 08:36:28 2007 @@ -1,5 +1,5 @@ ; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion -; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion | grep blge | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion | grep blge | count 1 @x = external global i32* ; [#uses=1] Modified: llvm/trunk/test/CodeGen/ARM/ifcvt6.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/ifcvt6.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/ifcvt6.ll (original) +++ llvm/trunk/test/CodeGen/ARM/ifcvt6.ll Wed Aug 15 08:36:28 2007 @@ -2,10 +2,10 @@ ; RUN: llc -march=arm -mtriple=arm-apple-darwin -enable-arm-if-conversion ; RUN: llvm-as < %s | \ ; RUN: llc -march=arm -mtriple=arm-apple-darwin -enable-arm-if-conversion | \ -; RUN: grep cmpne | wc -l | grep 1 +; RUN: grep cmpne | count 1 ; RUN: llvm-as < %s | \ ; RUN: llc -march=arm -mtriple=arm-apple-darwin -enable-arm-if-conversion | \ -; RUN: grep ldmhi | wc -l | grep 1 +; RUN: grep ldmhi | count 1 define void @foo(i32 %X, i32 %Y) { entry: Modified: llvm/trunk/test/CodeGen/ARM/ifcvt7.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/ifcvt7.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/ifcvt7.ll (original) +++ llvm/trunk/test/CodeGen/ARM/ifcvt7.ll Wed Aug 15 08:36:28 2007 @@ -2,13 +2,13 @@ ; RUN: llc -march=arm -mtriple=arm-apple-darwin -enable-arm-if-conversion ; RUN: llvm-as < %s | \ ; RUN: llc -march=arm -mtriple=arm-apple-darwin -enable-arm-if-conversion | \ -; RUN: grep cmpeq | wc -l | grep 1 +; RUN: grep cmpeq | count 1 ; RUN: llvm-as < %s | \ ; RUN: llc -march=arm -mtriple=arm-apple-darwin -enable-arm-if-conversion | \ -; RUN: grep moveq | wc -l | grep 1 +; RUN: grep moveq | count 1 ; RUN: llvm-as < %s | \ ; RUN: llc -march=arm -mtriple=arm-apple-darwin -enable-arm-if-conversion | \ -; RUN: grep ldmeq | wc -l | grep 1 +; RUN: grep ldmeq | count 1 ; FIXME: Need post-ifcvt branch folding to get rid of the extra br at end of BB1. %struct.quad_struct = type { i32, i32, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct* } Modified: llvm/trunk/test/CodeGen/ARM/ifcvt8.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/ifcvt8.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/ifcvt8.ll (original) +++ llvm/trunk/test/CodeGen/ARM/ifcvt8.ll Wed Aug 15 08:36:28 2007 @@ -2,7 +2,7 @@ ; RUN: llc -march=arm -mtriple=arm-apple-darwin -enable-arm-if-conversion ; RUN: llvm-as < %s | \ ; RUN: llc -march=arm -mtriple=arm-apple-darwin -enable-arm-if-conversion | \ -; RUN: grep ldmne | wc -l | grep 1 +; RUN: grep ldmne | count 1 %struct.SString = type { i8*, i32, i32 } Modified: llvm/trunk/test/CodeGen/ARM/insn-sched1.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/insn-sched1.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/insn-sched1.ll (original) +++ llvm/trunk/test/CodeGen/ARM/insn-sched1.ll Wed Aug 15 08:36:28 2007 @@ -1,6 +1,6 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+v6 ; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-apple-darwin -mattr=+v6 |\ -; RUN: grep mov | wc -l | grep 3 +; RUN: grep mov | count 3 int %test(int %x) { %tmp = cast int %x to short Modified: llvm/trunk/test/CodeGen/ARM/large-stack.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/large-stack.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/large-stack.ll (original) +++ llvm/trunk/test/CodeGen/ARM/large-stack.ll Wed Aug 15 08:36:28 2007 @@ -1,5 +1,5 @@ ; RUN: llvm-as < %s | llc -march=arm -; RUN: llvm-as < %s | llc -march=thumb | grep {ldr.*LCP} | wc -l | grep 5 +; RUN: llvm-as < %s | llc -march=thumb | grep {ldr.*LCP} | count 5 define void @test1() { %tmp = alloca [ 64 x i32 ] , align 4 Modified: llvm/trunk/test/CodeGen/ARM/ldm.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/ldm.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/ldm.ll (original) +++ llvm/trunk/test/CodeGen/ARM/ldm.ll Wed Aug 15 08:36:28 2007 @@ -1,9 +1,9 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \ -; RUN: grep ldmia | wc -l | grep 2 +; RUN: grep ldmia | count 2 ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \ -; RUN: grep ldmib | wc -l | grep 1 +; RUN: grep ldmib | count 1 ; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-apple-darwin | \ -; RUN: grep {ldmfd sp\!} | wc -l | grep 3 +; RUN: grep {ldmfd sp\!} | count 3 %X = external global [0 x int] Modified: llvm/trunk/test/CodeGen/ARM/ldr.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/ldr.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/ldr.ll (original) +++ llvm/trunk/test/CodeGen/ARM/ldr.ll Wed Aug 15 08:36:28 2007 @@ -1,5 +1,5 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \ -; RUN: grep {ldr r0} | wc -l | grep 3 +; RUN: grep {ldr r0} | count 3 int %f1(int* %v) { entry: Modified: llvm/trunk/test/CodeGen/ARM/ldr_ext.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/ldr_ext.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/ldr_ext.ll (original) +++ llvm/trunk/test/CodeGen/ARM/ldr_ext.ll Wed Aug 15 08:36:28 2007 @@ -1,11 +1,11 @@ -; RUN: llvm-as < %s | llc -march=arm | grep ldrb | wc -l | grep 1 -; RUN: llvm-as < %s | llc -march=arm | grep ldrh | wc -l | grep 1 -; RUN: llvm-as < %s | llc -march=arm | grep ldrsb | wc -l | grep 1 -; RUN: llvm-as < %s | llc -march=arm | grep ldrsh | wc -l | grep 1 -; RUN: llvm-as < %s | llc -march=thumb | grep ldrb | wc -l | grep 1 -; RUN: llvm-as < %s | llc -march=thumb | grep ldrh | wc -l | grep 1 -; RUN: llvm-as < %s | llc -march=thumb | grep ldrsb | wc -l | grep 1 -; RUN: llvm-as < %s | llc -march=thumb | grep ldrsh | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=arm | grep ldrb | count 1 +; RUN: llvm-as < %s | llc -march=arm | grep ldrh | count 1 +; RUN: llvm-as < %s | llc -march=arm | grep ldrsb | count 1 +; RUN: llvm-as < %s | llc -march=arm | grep ldrsh | count 1 +; RUN: llvm-as < %s | llc -march=thumb | grep ldrb | count 1 +; RUN: llvm-as < %s | llc -march=thumb | grep ldrh | count 1 +; RUN: llvm-as < %s | llc -march=thumb | grep ldrsb | count 1 +; RUN: llvm-as < %s | llc -march=thumb | grep ldrsh | count 1 define i32 @test1(i8* %v.pntr.s0.u1) { %tmp.u = load i8* %v.pntr.s0.u1 Modified: llvm/trunk/test/CodeGen/ARM/ldr_frame.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/ldr_frame.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/ldr_frame.ll (original) +++ llvm/trunk/test/CodeGen/ARM/ldr_frame.ll Wed Aug 15 08:36:28 2007 @@ -1,5 +1,5 @@ ; RUN: llvm-as < %s | llc -march=arm | not grep mov -; RUN: llvm-as < %s | llc -march=thumb | grep cpy | wc -l | grep 2 +; RUN: llvm-as < %s | llc -march=thumb | grep cpy | count 2 define i32 @f1() { %buf = alloca [32 x i32], align 4 Modified: llvm/trunk/test/CodeGen/ARM/ldr_post.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/ldr_post.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/ldr_post.ll (original) +++ llvm/trunk/test/CodeGen/ARM/ldr_post.ll Wed Aug 15 08:36:28 2007 @@ -1,5 +1,5 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \ -; RUN: grep {ldr.*\\\[.*\],} | wc -l | grep 1 +; RUN: grep {ldr.*\\\[.*\],} | count 1 int %test(int %a, int %b, int %c) { %tmp1 = mul int %a, %b Modified: llvm/trunk/test/CodeGen/ARM/ldr_pre.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/ldr_pre.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/ldr_pre.ll (original) +++ llvm/trunk/test/CodeGen/ARM/ldr_pre.ll Wed Aug 15 08:36:28 2007 @@ -1,5 +1,5 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \ -; RUN: grep {ldr.*\\!} | wc -l | grep 2 +; RUN: grep {ldr.*\\!} | count 2 int *%test1(int *%X, int *%dest) { %Y = getelementptr int* %X, int 4 Modified: llvm/trunk/test/CodeGen/ARM/load-global.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/load-global.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/load-global.ll (original) +++ llvm/trunk/test/CodeGen/ARM/load-global.ll Wed Aug 15 08:36:28 2007 @@ -3,13 +3,13 @@ ; RUN: not grep {L_G\$non_lazy_ptr} ; RUN: llvm-as < %s | \ ; RUN: llc -mtriple=arm-apple-darwin -relocation-model=dynamic-no-pic | \ -; RUN: grep {L_G\$non_lazy_ptr} | wc -l | grep 2 +; RUN: grep {L_G\$non_lazy_ptr} | count 2 ; RUN: llvm-as < %s | \ ; RUN: llc -mtriple=arm-apple-darwin -relocation-model=pic | \ -; RUN: grep {ldr.*pc} | wc -l | grep 1 +; RUN: grep {ldr.*pc} | count 1 ; RUN: llvm-as < %s | \ ; RUN: llc -mtriple=arm-linux-gnueabi -relocation-model=pic | \ -; RUN: grep {GOT} | wc -l | grep 1 +; RUN: grep {GOT} | count 1 @G = external global i32 Modified: llvm/trunk/test/CodeGen/ARM/long-setcc.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/long-setcc.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/long-setcc.ll (original) +++ llvm/trunk/test/CodeGen/ARM/long-setcc.ll Wed Aug 15 08:36:28 2007 @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=arm | grep cmp | wc -l | grep 1 -; RUN: llvm-as < %s | llc -march=thumb | grep cmp | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=arm | grep cmp | count 1 +; RUN: llvm-as < %s | llc -march=thumb | grep cmp | count 1 define i1 @t1(i64 %x) { Modified: llvm/trunk/test/CodeGen/ARM/long.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/long.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/long.ll (original) +++ llvm/trunk/test/CodeGen/ARM/long.ll Wed Aug 15 08:36:28 2007 @@ -1,20 +1,20 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \ -; RUN: grep -- {-2147483648} | wc -l | grep 3 -; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep mvn | wc -l | grep 3 -; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep adds | wc -l | grep 1 -; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep adc | wc -l | grep 1 -; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep {subs } | wc -l | grep 1 -; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep sbc | wc -l | grep 1 +; RUN: grep -- {-2147483648} | count 3 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep mvn | count 3 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep adds | count 1 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep adc | count 1 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep {subs } | count 1 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep sbc | count 1 ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \ -; RUN: grep smull | wc -l | grep 1 +; RUN: grep smull | count 1 ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \ -; RUN: grep umull | wc -l | grep 1 +; RUN: grep umull | count 1 ; RUN: llvm-upgrade < %s | llvm-as | llc -march=thumb | \ -; RUN: grep mvn | wc -l | grep 1 +; RUN: grep mvn | count 1 ; RUN: llvm-upgrade < %s | llvm-as | llc -march=thumb | \ -; RUN: grep adc | wc -l | grep 1 +; RUN: grep adc | count 1 ; RUN: llvm-upgrade < %s | llvm-as | llc -march=thumb | \ -; RUN: grep sbc | wc -l | grep 1 +; RUN: grep sbc | count 1 ; RUN: llvm-upgrade < %s | llvm-as | llc -march=thumb | grep __muldi3 ; END. Modified: llvm/trunk/test/CodeGen/ARM/long_shift.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/long_shift.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/long_shift.ll (original) +++ llvm/trunk/test/CodeGen/ARM/long_shift.ll Wed Aug 15 08:36:28 2007 @@ -1,6 +1,6 @@ ; RUN: llvm-as < %s | llc -march=thumb ; RUN: llvm-as < %s | llc -march=arm > %t -; RUN: grep rrx %t | wc -l | grep 1 +; RUN: grep rrx %t | count 1 ; RUN: grep __ashldi3 %t ; RUN: grep __ashrdi3 %t ; RUN: grep __lshrdi3 %t Modified: llvm/trunk/test/CodeGen/ARM/mul.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/mul.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/mul.ll (original) +++ llvm/trunk/test/CodeGen/ARM/mul.ll Wed Aug 15 08:36:28 2007 @@ -1,7 +1,7 @@ -; RUN: llvm-as < %s | llc -march=arm | grep mul | wc -l | grep 2 -; RUN: llvm-as < %s | llc -march=arm | grep lsl | wc -l | grep 2 -; RUN: llvm-as < %s | llc -march=thumb | grep mul | wc -l | grep 3 -; RUN: llvm-as < %s | llc -march=thumb | grep lsl | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=arm | grep mul | count 2 +; RUN: llvm-as < %s | llc -march=arm | grep lsl | count 2 +; RUN: llvm-as < %s | llc -march=thumb | grep mul | count 3 +; RUN: llvm-as < %s | llc -march=thumb | grep lsl | count 1 define i32 @f1(i32 %u) { %tmp = mul i32 %u, %u Modified: llvm/trunk/test/CodeGen/ARM/mulhi.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/mulhi.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/mulhi.ll (original) +++ llvm/trunk/test/CodeGen/ARM/mulhi.ll Wed Aug 15 08:36:28 2007 @@ -1,7 +1,7 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+v6 ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+v6 | \ -; RUN: grep smmul | wc -l | grep 1 -; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep umull | wc -l | grep 1 +; RUN: grep smmul | count 1 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep umull | count 1 int %smulhi(int %x, int %y) { %tmp = cast int %x to ulong ; [#uses=1] Modified: llvm/trunk/test/CodeGen/ARM/mvn.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/mvn.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/mvn.ll (original) +++ llvm/trunk/test/CodeGen/ARM/mvn.ll Wed Aug 15 08:36:28 2007 @@ -1,4 +1,4 @@ -; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep mvn | wc -l | grep 8 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep mvn | count 8 ; END. int %f1() { Modified: llvm/trunk/test/CodeGen/ARM/pack.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/pack.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/pack.ll (original) +++ llvm/trunk/test/CodeGen/ARM/pack.ll Wed Aug 15 08:36:28 2007 @@ -1,7 +1,7 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+v6 | \ -; RUN: grep pkhbt | wc -l | grep 5 +; RUN: grep pkhbt | count 5 ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+v6 | \ -; RUN: grep pkhtb | wc -l | grep 4 +; RUN: grep pkhtb | count 4 ; END. implementation ; Functions: Modified: llvm/trunk/test/CodeGen/ARM/select.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/select.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/select.ll (original) +++ llvm/trunk/test/CodeGen/ARM/select.ll Wed Aug 15 08:36:28 2007 @@ -1,17 +1,17 @@ -; RUN: llvm-as < %s | llc -march=arm | grep moveq | wc -l | grep 1 -; RUN: llvm-as < %s | llc -march=arm | grep movgt | wc -l | grep 1 -; RUN: llvm-as < %s | llc -march=arm | grep movlt | wc -l | grep 3 -; RUN: llvm-as < %s | llc -march=arm | grep movle | wc -l | grep 1 -; RUN: llvm-as < %s | llc -march=arm | grep movls | wc -l | grep 1 -; RUN: llvm-as < %s | llc -march=arm | grep movhi | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=arm | grep moveq | count 1 +; RUN: llvm-as < %s | llc -march=arm | grep movgt | count 1 +; RUN: llvm-as < %s | llc -march=arm | grep movlt | count 3 +; RUN: llvm-as < %s | llc -march=arm | grep movle | count 1 +; RUN: llvm-as < %s | llc -march=arm | grep movls | count 1 +; RUN: llvm-as < %s | llc -march=arm | grep movhi | count 1 ; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | \ -; RUN: grep fcpydmi | wc -l | grep 1 -; RUN: llvm-as < %s | llc -march=thumb | grep beq | wc -l | grep 1 -; RUN: llvm-as < %s | llc -march=thumb | grep bgt | wc -l | grep 1 -; RUN: llvm-as < %s | llc -march=thumb | grep blt | wc -l | grep 3 -; RUN: llvm-as < %s | llc -march=thumb | grep ble | wc -l | grep 1 -; RUN: llvm-as < %s | llc -march=thumb | grep bls | wc -l | grep 1 -; RUN: llvm-as < %s | llc -march=thumb | grep bhi | wc -l | grep 1 +; RUN: grep fcpydmi | count 1 +; RUN: llvm-as < %s | llc -march=thumb | grep beq | count 1 +; RUN: llvm-as < %s | llc -march=thumb | grep bgt | count 1 +; RUN: llvm-as < %s | llc -march=thumb | grep blt | count 3 +; RUN: llvm-as < %s | llc -march=thumb | grep ble | count 1 +; RUN: llvm-as < %s | llc -march=thumb | grep bls | count 1 +; RUN: llvm-as < %s | llc -march=thumb | grep bhi | count 1 ; RUN: llvm-as < %s | llc -march=thumb | grep __ltdf2 define i32 @f1(i32 %a.s) { Modified: llvm/trunk/test/CodeGen/ARM/select_xform.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/select_xform.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/select_xform.ll (original) +++ llvm/trunk/test/CodeGen/ARM/select_xform.ll Wed Aug 15 08:36:28 2007 @@ -1,5 +1,5 @@ ; RUN: llvm-as < %s | llc -march=arm -; RUN: llvm-as < %s | llc -march=arm | grep mov | wc -l | grep 2 +; RUN: llvm-as < %s | llc -march=arm | grep mov | count 2 define i32 @t1(i32 %a, i32 %b, i32 %c) { %tmp1 = icmp sgt i32 %c, 10 Modified: llvm/trunk/test/CodeGen/ARM/smul.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/smul.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/smul.ll (original) +++ llvm/trunk/test/CodeGen/ARM/smul.ll Wed Aug 15 08:36:28 2007 @@ -1,11 +1,11 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+v5TE ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+v5TE | \ -; RUN: grep smulbt | wc -l | grep 1 +; RUN: grep smulbt | count 1 ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+v5TE | \ -; RUN: grep smultt | wc -l | grep 1 +; RUN: grep smultt | count 1 ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+v5TE | \ -; RUN: grep smlabt | wc -l | grep 1 +; RUN: grep smlabt | count 1 %x = weak global short 0 %y = weak global short 0 Modified: llvm/trunk/test/CodeGen/ARM/stack-frame.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/stack-frame.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/stack-frame.ll (original) +++ llvm/trunk/test/CodeGen/ARM/stack-frame.ll Wed Aug 15 08:36:28 2007 @@ -1,7 +1,7 @@ ; RUN: llvm-as < %s | llc -march=arm -; RUN: llvm-as < %s | llc -march=arm | grep add | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=arm | grep add | count 1 ; RUN: llvm-as < %s | llc -march=thumb -; RUN: llvm-as < %s | llc -march=thumb | grep add | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=thumb | grep add | count 1 define void @f1() { %c = alloca i8, align 1 Modified: llvm/trunk/test/CodeGen/ARM/str_post.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/str_post.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/str_post.ll (original) +++ llvm/trunk/test/CodeGen/ARM/str_post.ll Wed Aug 15 08:36:28 2007 @@ -1,7 +1,7 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \ -; RUN: grep {strh .*\\\[.*\], #-4} | wc -l | grep 1 +; RUN: grep {strh .*\\\[.*\], #-4} | count 1 ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \ -; RUN: grep {str .*\\\[.*\],} | wc -l | grep 1 +; RUN: grep {str .*\\\[.*\],} | count 1 short %test1(int *%X, short *%A) { %Y = load int* %X Modified: llvm/trunk/test/CodeGen/ARM/str_pre.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/str_pre.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/str_pre.ll (original) +++ llvm/trunk/test/CodeGen/ARM/str_pre.ll Wed Aug 15 08:36:28 2007 @@ -1,5 +1,5 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \ -; RUN: grep {str.*\\!} | wc -l | grep 2 +; RUN: grep {str.*\\!} | count 2 void %test1(int *%X, int *%A, int **%dest) { %B = load int* %A Modified: llvm/trunk/test/CodeGen/ARM/str_trunc.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/str_trunc.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/str_trunc.ll (original) +++ llvm/trunk/test/CodeGen/ARM/str_trunc.ll Wed Aug 15 08:36:28 2007 @@ -1,7 +1,7 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \ -; RUN: grep strb | wc -l | grep 1 +; RUN: grep strb | count 1 ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \ -; RUN: grep strh | wc -l | grep 1 +; RUN: grep strh | count 1 void %test1(int %v, short* %ptr) { %tmp = cast int %v to short Modified: llvm/trunk/test/CodeGen/ARM/sxt_rot.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/sxt_rot.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/sxt_rot.ll (original) +++ llvm/trunk/test/CodeGen/ARM/sxt_rot.ll Wed Aug 15 08:36:28 2007 @@ -1,7 +1,7 @@ ; RUN: llvm-as < %s | llc -march=arm -mattr=+v6 | \ -; RUN: grep sxtb | wc -l | grep 1 +; RUN: grep sxtb | count 1 ; RUN: llvm-as < %s | llc -march=arm -mattr=+v6 | \ -; RUN: grep sxtab | wc -l | grep 1 +; RUN: grep sxtab | count 1 define i8 @test1(i32 %A) signext { %B = lshr i32 %A, 8 Modified: llvm/trunk/test/CodeGen/ARM/trunc_ldr.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/trunc_ldr.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/trunc_ldr.ll (original) +++ llvm/trunk/test/CodeGen/ARM/trunc_ldr.ll Wed Aug 15 08:36:28 2007 @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=arm | grep ldrb.*7 | wc -l | grep 1 -; RUN: llvm-as < %s | llc -march=arm | grep ldrsb.*7 | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=arm | grep ldrb.*7 | count 1 +; RUN: llvm-as < %s | llc -march=arm | grep ldrsb.*7 | count 1 %struct.A = type { i8, i8, i8, i8, i16, i8, i8, %struct.B** } %struct.B = type { float, float, i32, i32, i32, [0 x i8] } Modified: llvm/trunk/test/CodeGen/ARM/unord.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/unord.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/unord.ll (original) +++ llvm/trunk/test/CodeGen/ARM/unord.ll Wed Aug 15 08:36:28 2007 @@ -1,7 +1,7 @@ -; RUN: llvm-as < %s | llc -march=arm | grep movne | wc -l | grep 1 -; RUN: llvm-as < %s | llc -march=arm | grep moveq | wc -l | grep 1 -; RUN: llvm-as < %s | llc -march=thumb | grep bne | wc -l | grep 1 -; RUN: llvm-as < %s | llc -march=thumb | grep beq | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=arm | grep movne | count 1 +; RUN: llvm-as < %s | llc -march=arm | grep moveq | count 1 +; RUN: llvm-as < %s | llc -march=thumb | grep bne | count 1 +; RUN: llvm-as < %s | llc -march=thumb | grep beq | count 1 define i32 @f1(float %X, float %Y) { %tmp = fcmp uno float %X, %Y Modified: llvm/trunk/test/CodeGen/ARM/uxt_rot.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/uxt_rot.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/uxt_rot.ll (original) +++ llvm/trunk/test/CodeGen/ARM/uxt_rot.ll Wed Aug 15 08:36:28 2007 @@ -1,6 +1,6 @@ -; RUN: llvm-as < %s | llc -march=arm -mattr=+v6 | grep uxtb | wc -l | grep 1 -; RUN: llvm-as < %s | llc -march=arm -mattr=+v6 | grep uxtab | wc -l | grep 1 -; RUN: llvm-as < %s | llc -march=arm -mattr=+v6 | grep uxth | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=arm -mattr=+v6 | grep uxtb | count 1 +; RUN: llvm-as < %s | llc -march=arm -mattr=+v6 | grep uxtab | count 1 +; RUN: llvm-as < %s | llc -march=arm -mattr=+v6 | grep uxth | count 1 define i8 @test1(i32 %A.u) zeroext { %B.u = trunc i32 %A.u to i8 Modified: llvm/trunk/test/CodeGen/ARM/uxtb.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/uxtb.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/uxtb.ll (original) +++ llvm/trunk/test/CodeGen/ARM/uxtb.ll Wed Aug 15 08:36:28 2007 @@ -1,5 +1,5 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+v6 | \ -; RUN: grep uxt | wc -l | grep 10 +; RUN: grep uxt | count 10 ; END. uint %test1(uint %x) { Modified: llvm/trunk/test/CodeGen/ARM/vargs2.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/vargs2.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/vargs2.ll (original) +++ llvm/trunk/test/CodeGen/ARM/vargs2.ll Wed Aug 15 08:36:28 2007 @@ -1,6 +1,6 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=thumb ; RUN: llvm-upgrade < %s | llvm-as | llc -march=thumb | \ -; RUN: grep pop | wc -l | grep 2 +; RUN: grep pop | count 2 %str = internal constant [4 x sbyte] c"%d\0A\00" ; <[4 x sbyte]*> [#uses=1] Modified: llvm/trunk/test/CodeGen/ARM/vargs_align.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/vargs_align.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/vargs_align.ll (original) +++ llvm/trunk/test/CodeGen/ARM/vargs_align.ll Wed Aug 15 08:36:28 2007 @@ -1,7 +1,7 @@ ; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnueabi | \ -; RUN: grep {add sp, sp, #16} | wc -l | grep 1 +; RUN: grep {add sp, sp, #16} | count 1 ; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnu | \ -; RUN: grep {add sp, sp, #12} | wc -l | grep 2 +; RUN: grep {add sp, sp, #12} | count 2 define i32 @f(i32 %a, ...) { entry: Modified: llvm/trunk/test/CodeGen/ARM/vfp.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/vfp.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/vfp.ll (original) +++ llvm/trunk/test/CodeGen/ARM/vfp.ll Wed Aug 15 08:36:28 2007 @@ -1,19 +1,19 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+vfp2 | \ -; RUN: grep fabs | wc -l | grep 2 +; RUN: grep fabs | count 2 ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+vfp2 | \ -; RUN: grep fmscs | wc -l | grep 1 +; RUN: grep fmscs | count 1 ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+vfp2 | \ -; RUN: grep fcvt | wc -l | grep 2 +; RUN: grep fcvt | count 2 ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+vfp2 | \ -; RUN: grep fuito | wc -l | grep 2 +; RUN: grep fuito | count 2 ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+vfp2 | \ -; RUN: grep fto.i | wc -l | grep 4 +; RUN: grep fto.i | count 4 ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+vfp2 | \ -; RUN: grep bmi | wc -l | grep 1 +; RUN: grep bmi | count 1 ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+vfp2 | \ -; RUN: grep bgt | wc -l | grep 1 +; RUN: grep bgt | count 1 ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+vfp2 | \ -; RUN: grep fcmpezs | wc -l | grep 1 +; RUN: grep fcmpezs | count 1 void %test(float *%P, double* %D) { %A = load float* %P Modified: llvm/trunk/test/CodeGen/Alpha/2005-07-12-TwoMallocCalls.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Alpha/2005-07-12-TwoMallocCalls.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/Alpha/2005-07-12-TwoMallocCalls.ll (original) +++ llvm/trunk/test/CodeGen/Alpha/2005-07-12-TwoMallocCalls.ll Wed Aug 15 08:36:28 2007 @@ -1,5 +1,5 @@ ; There should be exactly two calls here (memset and malloc), no more. -; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha | grep jsr | wc -l | grep 2 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha | grep jsr | count 2 %typedef.bc_struct = type opaque Modified: llvm/trunk/test/CodeGen/Alpha/add.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Alpha/add.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/Alpha/add.ll (original) +++ llvm/trunk/test/CodeGen/Alpha/add.ll Wed Aug 15 08:36:28 2007 @@ -1,21 +1,21 @@ ;test all the shifted and signextending adds and subs with and without consts ; ; RUN: llvm-as < %s | llc -march=alpha -o %t.s -f -; RUN: grep { addl} %t.s | wc -l | grep 2 -; RUN: grep { addq} %t.s | wc -l | grep 2 -; RUN: grep { subl} %t.s | wc -l | grep 2 -; RUN: grep { subq} %t.s | wc -l | grep 1 +; RUN: grep { addl} %t.s | count 2 +; RUN: grep { addq} %t.s | count 2 +; RUN: grep { subl} %t.s | count 2 +; RUN: grep { subq} %t.s | count 1 ; -; RUN: grep {lda \$0,-100(\$16)} %t.s | wc -l | grep 1 -; RUN: grep {s4addl} %t.s | wc -l | grep 2 -; RUN: grep {s8addl} %t.s | wc -l | grep 2 -; RUN: grep {s4addq} %t.s | wc -l | grep 2 -; RUN: grep {s8addq} %t.s | wc -l | grep 2 +; RUN: grep {lda \$0,-100(\$16)} %t.s | count 1 +; RUN: grep {s4addl} %t.s | count 2 +; RUN: grep {s8addl} %t.s | count 2 +; RUN: grep {s4addq} %t.s | count 2 +; RUN: grep {s8addq} %t.s | count 2 ; -; RUN: grep {s4subl} %t.s | wc -l | grep 2 -; RUN: grep {s8subl} %t.s | wc -l | grep 2 -; RUN: grep {s4subq} %t.s | wc -l | grep 2 -; RUN: grep {s8subq} %t.s | wc -l | grep 2 +; RUN: grep {s4subl} %t.s | count 2 +; RUN: grep {s8subl} %t.s | count 2 +; RUN: grep {s4subq} %t.s | count 2 +; RUN: grep {s8subq} %t.s | count 2 define i32 @al(i32 signext %x.s, i32 signext %y.s) signext { Modified: llvm/trunk/test/CodeGen/Alpha/cmpbge.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Alpha/cmpbge.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/Alpha/cmpbge.ll (original) +++ llvm/trunk/test/CodeGen/Alpha/cmpbge.ll Wed Aug 15 08:36:28 2007 @@ -1,4 +1,4 @@ -; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha | grep cmpbge | wc -l | grep 2 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha | grep cmpbge | count 2 bool %test1(ulong %A, ulong %B) { %C = and ulong %A, 255 Modified: llvm/trunk/test/CodeGen/CBackend/2006-12-11-Float-Bitcast.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CBackend/2006-12-11-Float-Bitcast.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/CBackend/2006-12-11-Float-Bitcast.ll (original) +++ llvm/trunk/test/CodeGen/CBackend/2006-12-11-Float-Bitcast.ll Wed Aug 15 08:36:28 2007 @@ -1,5 +1,5 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=c | \ -; RUN: grep __BITCAST | wc -l | grep 14 +; RUN: grep __BITCAST | count 14 int %test1(float %F) { %X = bitcast float %F to int Modified: llvm/trunk/test/CodeGen/Generic/SwitchLowering.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Generic/SwitchLowering.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/Generic/SwitchLowering.ll (original) +++ llvm/trunk/test/CodeGen/Generic/SwitchLowering.ll Wed Aug 15 08:36:28 2007 @@ -1,4 +1,4 @@ -; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep cmp | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep cmp | count 1 ; PR964 sbyte* %FindChar(sbyte* %CurPtr) { Modified: llvm/trunk/test/CodeGen/Generic/phi-immediate-factoring.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Generic/phi-immediate-factoring.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/Generic/phi-immediate-factoring.ll (original) +++ llvm/trunk/test/CodeGen/Generic/phi-immediate-factoring.ll Wed Aug 15 08:36:28 2007 @@ -1,5 +1,5 @@ ; PR1296 -; RUN: llvm-as < %s | llc -march=x86 | grep {movl \$1} | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=x86 | grep {movl \$1} | count 1 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" target triple = "i686-apple-darwin8" Modified: llvm/trunk/test/CodeGen/Generic/switch-crit-edge-constant.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Generic/switch-crit-edge-constant.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/Generic/switch-crit-edge-constant.ll (original) +++ llvm/trunk/test/CodeGen/Generic/switch-crit-edge-constant.ll Wed Aug 15 08:36:28 2007 @@ -1,6 +1,6 @@ ; PR925 ; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | \ -; RUN: grep mov.*str1 | wc -l | grep 1 +; RUN: grep mov.*str1 | count 1 target endian = little target pointersize = 32 Modified: llvm/trunk/test/CodeGen/Generic/switch-lower-feature-2.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Generic/switch-lower-feature-2.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/Generic/switch-lower-feature-2.ll (original) +++ llvm/trunk/test/CodeGen/Generic/switch-lower-feature-2.ll Wed Aug 15 08:36:28 2007 @@ -1,13 +1,13 @@ ; RUN: llvm-as < %s | llc -march=x86 -o %t -f -; RUN: grep jb %t | wc -l | grep 1 -; RUN: grep \\\$6 %t | wc -l | grep 2 -; RUN: grep 1024 %t | wc -l | grep 1 -; RUN: grep 1023 %t | wc -l | grep 1 -; RUN: grep 119 %t | wc -l | grep 1 -; RUN: grep JTI %t | wc -l | grep 2 -; RUN: grep jg %t | wc -l | grep 1 -; RUN: grep ja %t | wc -l | grep 1 -; RUN: grep js %t | wc -l | grep 1 +; RUN: grep jb %t | count 1 +; RUN: grep \\\$6 %t | count 2 +; RUN: grep 1024 %t | count 1 +; RUN: grep 1023 %t | count 1 +; RUN: grep 119 %t | count 1 +; RUN: grep JTI %t | count 2 +; RUN: grep jg %t | count 1 +; RUN: grep ja %t | count 1 +; RUN: grep js %t | count 1 target triple = "i686-pc-linux-gnu" Modified: llvm/trunk/test/CodeGen/Generic/switch-lower-feature.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Generic/switch-lower-feature.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/Generic/switch-lower-feature.ll (original) +++ llvm/trunk/test/CodeGen/Generic/switch-lower-feature.ll Wed Aug 15 08:36:28 2007 @@ -1,8 +1,8 @@ -; RUN: llvm-as < %s | llc -march=x86 -o - | grep \$7 | wc -l | grep 1 -; RUN: llvm-as < %s | llc -march=x86 -o - | grep \$6 | wc -l | grep 1 -; RUN: llvm-as < %s | llc -march=x86 -o - | grep 1024 | wc -l | grep 1 -; RUN: llvm-as < %s | llc -march=x86 -o - | grep jb | wc -l | grep 2 -; RUN: llvm-as < %s | llc -march=x86 -o - | grep je | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=x86 -o - | grep \$7 | count 1 +; RUN: llvm-as < %s | llc -march=x86 -o - | grep \$6 | count 1 +; RUN: llvm-as < %s | llc -march=x86 -o - | grep 1024 | count 1 +; RUN: llvm-as < %s | llc -march=x86 -o - | grep jb | count 2 +; RUN: llvm-as < %s | llc -march=x86 -o - | grep je | count 1 define i32 @main(i32 %tmp158) { entry: Modified: llvm/trunk/test/CodeGen/PowerPC/2005-09-02-LegalizeDuplicatesCalls.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/2005-09-02-LegalizeDuplicatesCalls.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/PowerPC/2005-09-02-LegalizeDuplicatesCalls.ll (original) +++ llvm/trunk/test/CodeGen/PowerPC/2005-09-02-LegalizeDuplicatesCalls.ll Wed Aug 15 08:36:28 2007 @@ -1,7 +1,7 @@ ; This function should have exactly one call to fixdfdi, no more! ; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mattr=-64bit | \ -; RUN: grep {bl .*fixdfdi} | wc -l | grep 1 +; RUN: grep {bl .*fixdfdi} | count 1 double %test2(double %tmp.7705) { %mem_tmp.2.0.in = cast double %tmp.7705 to long ; [#uses=1] Modified: llvm/trunk/test/CodeGen/PowerPC/2006-07-07-ComputeMaskedBits.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/2006-07-07-ComputeMaskedBits.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/PowerPC/2006-07-07-ComputeMaskedBits.ll (original) +++ llvm/trunk/test/CodeGen/PowerPC/2006-07-07-ComputeMaskedBits.ll Wed Aug 15 08:36:28 2007 @@ -1,4 +1,4 @@ -; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=powerpc64-apple-darwin | grep extsw | wc -l | grep 2 +; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=powerpc64-apple-darwin | grep extsw | count 2 %lens = external global ubyte* %vals = external global int* Modified: llvm/trunk/test/CodeGen/PowerPC/2007-02-23-lr-saved-twice.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/2007-02-23-lr-saved-twice.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/PowerPC/2007-02-23-lr-saved-twice.ll (original) +++ llvm/trunk/test/CodeGen/PowerPC/2007-02-23-lr-saved-twice.ll Wed Aug 15 08:36:28 2007 @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc | grep mflr | wc -l | grep 1 +; RUN: llvm-as < %s | llc | grep mflr | count 1 target datalayout = "e-p:32:32" target triple = "powerpc-apple-darwin8" Modified: llvm/trunk/test/CodeGen/PowerPC/2007-05-22-tailmerge-3.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/2007-05-22-tailmerge-3.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/PowerPC/2007-05-22-tailmerge-3.ll (original) +++ llvm/trunk/test/CodeGen/PowerPC/2007-05-22-tailmerge-3.ll Wed Aug 15 08:36:28 2007 @@ -1,7 +1,7 @@ -; RUN: llvm-as < %s | llc -march=ppc32 | grep bl.*baz | wc -l | grep 2 -; RUN: llvm-as < %s | llc -march=ppc32 | grep bl.*quux | wc -l | grep 2 -; RUN: llvm-as < %s | llc -march=ppc32 -enable-tail-merge | grep bl.*baz | wc -l | grep 1 -; RUN: llvm-as < %s | llc -march=ppc32 -enable-tail-merge=1 | grep bl.*quux | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=ppc32 | grep bl.*baz | count 2 +; RUN: llvm-as < %s | llc -march=ppc32 | grep bl.*quux | count 2 +; RUN: llvm-as < %s | llc -march=ppc32 -enable-tail-merge | grep bl.*baz | count 1 +; RUN: llvm-as < %s | llc -march=ppc32 -enable-tail-merge=1 | grep bl.*quux | count 1 ; Check that tail merging is not the default on ppc, and that -enable-tail-merge works. ; ModuleID = 'tail.c' Modified: llvm/trunk/test/CodeGen/PowerPC/addc.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/addc.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/PowerPC/addc.ll (original) +++ llvm/trunk/test/CodeGen/PowerPC/addc.ll Wed Aug 15 08:36:28 2007 @@ -1,10 +1,10 @@ ; All of these should be codegen'd without loading immediates ; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -o %t -f -; RUN: grep addc %t | wc -l | grep 1 -; RUN: grep adde %t | wc -l | grep 1 -; RUN: grep addze %t | wc -l | grep 1 -; RUN: grep addme %t | wc -l | grep 1 -; RUN: grep addic %t | wc -l | grep 2 +; RUN: grep addc %t | count 1 +; RUN: grep adde %t | count 1 +; RUN: grep addze %t | count 1 +; RUN: grep addme %t | count 1 +; RUN: grep addic %t | count 2 implementation ; Functions: Modified: llvm/trunk/test/CodeGen/PowerPC/align.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/align.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/PowerPC/align.ll (original) +++ llvm/trunk/test/CodeGen/PowerPC/align.ll Wed Aug 15 08:36:28 2007 @@ -1,9 +1,9 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | \ -; RUN: grep align.4 | wc -l | grep 1 +; RUN: grep align.4 | count 1 ; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | \ -; RUN: grep align.2 | wc -l | grep 1 +; RUN: grep align.2 | count 1 ; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | \ -; RUN: grep align.3 | wc -l | grep 1 +; RUN: grep align.3 | count 1 %A = global <4 x uint> < uint 10, uint 20, uint 30, uint 40 > Modified: llvm/trunk/test/CodeGen/PowerPC/branch-opt.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/branch-opt.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/PowerPC/branch-opt.ll (original) +++ llvm/trunk/test/CodeGen/PowerPC/branch-opt.ll Wed Aug 15 08:36:28 2007 @@ -1,5 +1,5 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | \ -; RUN: grep {b LBB.*} | wc -l | grep 4 +; RUN: grep {b LBB.*} | count 4 target endian = big target pointersize = 32 Modified: llvm/trunk/test/CodeGen/PowerPC/bswap-load-store.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/bswap-load-store.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/PowerPC/bswap-load-store.ll (original) +++ llvm/trunk/test/CodeGen/PowerPC/bswap-load-store.ll Wed Aug 15 08:36:28 2007 @@ -1,9 +1,9 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | \ -; RUN: grep {stwbrx\\|lwbrx\\|sthbrx\\|lhbrx} | wc -l | grep 4 +; RUN: grep {stwbrx\\|lwbrx\\|sthbrx\\|lhbrx} | count 4 ; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | not grep rlwinm ; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | not grep rlwimi ; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc64 | \ -; RUN: grep {stwbrx\\|lwbrx\\|sthbrx\\|lhbrx} | wc -l | grep 4 +; RUN: grep {stwbrx\\|lwbrx\\|sthbrx\\|lhbrx} | count 4 ; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc64 | not grep rlwinm ; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc64 | not grep rlwimi Modified: llvm/trunk/test/CodeGen/PowerPC/buildvec_canonicalize.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/buildvec_canonicalize.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/PowerPC/buildvec_canonicalize.ll (original) +++ llvm/trunk/test/CodeGen/PowerPC/buildvec_canonicalize.ll Wed Aug 15 08:36:28 2007 @@ -1,12 +1,12 @@ ; There should be exactly one vxor here. ; RUN: llvm-upgrade < %s | llvm-as | \ ; RUN: llc -march=ppc32 -mcpu=g5 --enable-unsafe-fp-math | \ -; RUN: grep vxor | wc -l | grep 1 +; RUN: grep vxor | count 1 ; There should be exactly one vsplti here. ; RUN: llvm-upgrade < %s | llvm-as | \ ; RUN: llc -march=ppc32 -mcpu=g5 --enable-unsafe-fp-math | \ -; RUN: grep vsplti | wc -l | grep 1 +; RUN: grep vsplti | count 1 void %VXOR(<4 x float>* %P1, <4 x int>* %P2, <4 x float>* %P3) { Modified: llvm/trunk/test/CodeGen/PowerPC/calls.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/calls.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/PowerPC/calls.ll (original) +++ llvm/trunk/test/CodeGen/PowerPC/calls.ll Wed Aug 15 08:36:28 2007 @@ -1,11 +1,11 @@ ; Test various forms of calls. ; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | \ -; RUN: grep {bl } | wc -l | grep 2 +; RUN: grep {bl } | count 2 ; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | \ -; RUN: grep {bctrl} | wc -l | grep 1 +; RUN: grep {bctrl} | count 1 ; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | \ -; RUN: grep {bla } | wc -l | grep 1 +; RUN: grep {bla } | count 1 declare void %foo() Modified: llvm/trunk/test/CodeGen/PowerPC/constants.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/constants.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/PowerPC/constants.ll (original) +++ llvm/trunk/test/CodeGen/PowerPC/constants.ll Wed Aug 15 08:36:28 2007 @@ -1,10 +1,10 @@ ; All of these routines should be perform optimal load of constants. ; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | \ -; RUN: grep lis | wc -l | grep 5 +; RUN: grep lis | count 5 ; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | \ -; RUN: grep ori | wc -l | grep 3 +; RUN: grep ori | count 3 ; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | \ -; RUN: grep {li } | wc -l | grep 4 +; RUN: grep {li } | count 4 implementation ; Functions: Modified: llvm/trunk/test/CodeGen/PowerPC/eqv-andc-orc-nor.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/eqv-andc-orc-nor.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/PowerPC/eqv-andc-orc-nor.ll (original) +++ llvm/trunk/test/CodeGen/PowerPC/eqv-andc-orc-nor.ll Wed Aug 15 08:36:28 2007 @@ -1,13 +1,13 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | \ -; RUN: grep eqv | wc -l | grep 3 +; RUN: grep eqv | count 3 ; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5 | \ -; RUN: grep andc | wc -l | grep 3 +; RUN: grep andc | count 3 ; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | \ -; RUN: grep orc | wc -l | grep 2 +; RUN: grep orc | count 2 ; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5 | \ -; RUN: grep nor | wc -l | grep 3 +; RUN: grep nor | count 3 ; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | \ -; RUN: grep nand | wc -l | grep 1 +; RUN: grep nand | count 1 int %EQV1(int %X, int %Y) { %A = xor int %X, %Y Modified: llvm/trunk/test/CodeGen/PowerPC/extsh.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/extsh.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/PowerPC/extsh.ll (original) +++ llvm/trunk/test/CodeGen/PowerPC/extsh.ll Wed Aug 15 08:36:28 2007 @@ -1,5 +1,5 @@ ; This should turn into a single extsh -; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | grep extsh | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | grep extsh | count 1 int %test(int %X) { %tmp.81 = shl int %X, ubyte 16 ; [#uses=1] %tmp.82 = shr int %tmp.81, ubyte 16 ; [#uses=1] Modified: llvm/trunk/test/CodeGen/PowerPC/fma.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/fma.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/PowerPC/fma.ll (original) +++ llvm/trunk/test/CodeGen/PowerPC/fma.ll Wed Aug 15 08:36:28 2007 @@ -1,5 +1,5 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | \ -; RUN: egrep {fn?madd|fn?msub} | wc -l | grep 8 +; RUN: egrep {fn?madd|fn?msub} | count 8 double %test_FMADD1(double %A, double %B, double %C) { %D = mul double %A, %B Modified: llvm/trunk/test/CodeGen/PowerPC/fp-branch.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/fp-branch.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/PowerPC/fp-branch.ll (original) +++ llvm/trunk/test/CodeGen/PowerPC/fp-branch.ll Wed Aug 15 08:36:28 2007 @@ -1,4 +1,4 @@ -; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | grep fcmp | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | grep fcmp | count 1 declare bool %llvm.isunordered.f64(double, double) Modified: llvm/trunk/test/CodeGen/PowerPC/fp_to_uint.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/fp_to_uint.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/PowerPC/fp_to_uint.ll (original) +++ llvm/trunk/test/CodeGen/PowerPC/fp_to_uint.ll Wed Aug 15 08:36:28 2007 @@ -1,4 +1,4 @@ -; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | grep fctiwz | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | grep fctiwz | count 1 implementation Modified: llvm/trunk/test/CodeGen/PowerPC/mulhs.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/mulhs.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/PowerPC/mulhs.ll (original) +++ llvm/trunk/test/CodeGen/PowerPC/mulhs.ll Wed Aug 15 08:36:28 2007 @@ -3,7 +3,7 @@ ; RUN: not grep mulhwu %t ; RUN: not grep srawi %t ; RUN: not grep add %t -; RUN: grep mulhw %t | wc -l | grep 1 +; RUN: grep mulhw %t | count 1 implementation ; Functions: Modified: llvm/trunk/test/CodeGen/PowerPC/rlwimi.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/rlwimi.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/PowerPC/rlwimi.ll (original) +++ llvm/trunk/test/CodeGen/PowerPC/rlwimi.ll Wed Aug 15 08:36:28 2007 @@ -1,6 +1,6 @@ ; All of these ands and shifts should be folded into rlwimi's ; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | not grep and -; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | grep rlwimi | wc -l | grep 8 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | grep rlwimi | count 8 implementation ; Functions: Modified: llvm/trunk/test/CodeGen/PowerPC/rlwimi2.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/rlwimi2.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/PowerPC/rlwimi2.ll (original) +++ llvm/trunk/test/CodeGen/PowerPC/rlwimi2.ll Wed Aug 15 08:36:28 2007 @@ -1,7 +1,7 @@ ; All of these ands and shifts should be folded into rlwimi's ; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -o %t -f -; RUN: grep rlwimi %t | wc -l | grep 3 -; RUN: grep srwi %t | wc -l | grep 1 +; RUN: grep rlwimi %t | count 3 +; RUN: grep srwi %t | count 1 ; RUN: not grep slwi %t implementation ; Functions: Modified: llvm/trunk/test/CodeGen/PowerPC/rlwinm.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/rlwinm.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/PowerPC/rlwinm.ll (original) +++ llvm/trunk/test/CodeGen/PowerPC/rlwinm.ll Wed Aug 15 08:36:28 2007 @@ -4,7 +4,7 @@ ; RUN: not grep srawi %t ; RUN: not grep srwi %t ; RUN: not grep slwi %t -; RUN: grep rlwinm %t | wc -l | grep 8 +; RUN: grep rlwinm %t | count 8 implementation ; Functions: Modified: llvm/trunk/test/CodeGen/PowerPC/rlwinm2.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/rlwinm2.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/PowerPC/rlwinm2.ll (original) +++ llvm/trunk/test/CodeGen/PowerPC/rlwinm2.ll Wed Aug 15 08:36:28 2007 @@ -4,8 +4,8 @@ ; RUN: not grep srawi %t ; RUN: not grep srwi %t ; RUN: not grep slwi %t -; RUN: grep rlwnm %t | wc -l | grep 1 -; RUN: grep rlwinm %t | wc -l | grep 1 +; RUN: grep rlwnm %t | count 1 +; RUN: grep rlwinm %t | count 1 define i32 @test1(i32 %X, i32 %Y) { entry: Modified: llvm/trunk/test/CodeGen/PowerPC/rotl-2.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/rotl-2.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/PowerPC/rotl-2.ll (original) +++ llvm/trunk/test/CodeGen/PowerPC/rotl-2.ll Wed Aug 15 08:36:28 2007 @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=ppc32 | grep rlwinm | wc -l | grep 4 -; RUN: llvm-as < %s | llc -march=ppc32 | grep rlwnm | wc -l | grep 2 +; RUN: llvm-as < %s | llc -march=ppc32 | grep rlwinm | count 4 +; RUN: llvm-as < %s | llc -march=ppc32 | grep rlwnm | count 2 ; RUN: llvm-as < %s | llc -march=ppc32 | not grep or define i32 @rotl32(i32 %A, i8 %Amt) { Modified: llvm/trunk/test/CodeGen/PowerPC/rotl.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/rotl.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/PowerPC/rotl.ll (original) +++ llvm/trunk/test/CodeGen/PowerPC/rotl.ll Wed Aug 15 08:36:28 2007 @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=ppc32 | grep rlwnm | wc -l | grep 2 -; RUN: llvm-as < %s | llc -march=ppc32 | grep rlwinm | wc -l | grep 2 +; RUN: llvm-as < %s | llc -march=ppc32 | grep rlwnm | count 2 +; RUN: llvm-as < %s | llc -march=ppc32 | grep rlwinm | count 2 define i32 @rotlw(i32 %x, i32 %sh) { entry: Modified: llvm/trunk/test/CodeGen/PowerPC/subc.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/subc.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/PowerPC/subc.ll (original) +++ llvm/trunk/test/CodeGen/PowerPC/subc.ll Wed Aug 15 08:36:28 2007 @@ -1,10 +1,10 @@ ; All of these should be codegen'd without loading immediates ; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -o %t -f -; RUN: grep subfc %t | wc -l | grep 1 -; RUN: grep subfe %t | wc -l | grep 1 -; RUN: grep subfze %t | wc -l | grep 1 -; RUN: grep subfme %t | wc -l | grep 1 -; RUN: grep subfic %t | wc -l | grep 2 +; RUN: grep subfc %t | count 1 +; RUN: grep subfe %t | count 1 +; RUN: grep subfze %t | count 1 +; RUN: grep subfme %t | count 1 +; RUN: grep subfic %t | count 2 implementation ; Functions: long %sub_ll(long %a, long %b) { Modified: llvm/trunk/test/CodeGen/PowerPC/unsafe-math.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/unsafe-math.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/PowerPC/unsafe-math.ll (original) +++ llvm/trunk/test/CodeGen/PowerPC/unsafe-math.ll Wed Aug 15 08:36:28 2007 @@ -1,6 +1,6 @@ -; RUN: llvm-as < %s | llc -march=ppc32 | grep fmul | wc -l | grep 2 +; RUN: llvm-as < %s | llc -march=ppc32 | grep fmul | count 2 ; RUN: llvm-as < %s | llc -march=ppc32 -enable-unsafe-fp-math | \ -; RUN: grep fmul | wc -l | grep 1 +; RUN: grep fmul | count 1 define double @foo(double %X) { %tmp1 = mul double %X, 1.23 Modified: llvm/trunk/test/CodeGen/PowerPC/vcmp-fold.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/vcmp-fold.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/PowerPC/vcmp-fold.ll (original) +++ llvm/trunk/test/CodeGen/PowerPC/vcmp-fold.ll Wed Aug 15 08:36:28 2007 @@ -1,6 +1,6 @@ ; This should fold the "vcmpbfp." and "vcmpbfp" instructions into a single ; "vcmpbfp.". -; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5 | grep vcmpbfp | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5 | grep vcmpbfp | count 1 void %test(<4 x float>* %x, <4 x float>* %y, int* %P) { entry: Modified: llvm/trunk/test/CodeGen/PowerPC/vec_shuffle.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/vec_shuffle.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/PowerPC/vec_shuffle.ll (original) +++ llvm/trunk/test/CodeGen/PowerPC/vec_shuffle.ll Wed Aug 15 08:36:28 2007 @@ -1,11 +1,11 @@ ; RUN: llvm-upgrade < %s | llvm-as | opt -instcombine | \ ; RUN: llc -march=ppc32 -mcpu=g5 | not grep vperm ; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5 > %t -; RUN: grep vsldoi %t | wc -l | grep 2 -; RUN: grep vmrgh %t | wc -l | grep 7 -; RUN: grep vmrgl %t | wc -l | grep 6 -; RUN: grep vpkuhum %t | wc -l | grep 1 -; RUN: grep vpkuwum %t | wc -l | grep 1 +; RUN: grep vsldoi %t | count 2 +; RUN: grep vmrgh %t | count 7 +; RUN: grep vmrgl %t | count 6 +; RUN: grep vpkuhum %t | count 1 +; RUN: grep vpkuwum %t | count 1 void %VSLDOI_xy(<8 x short>* %A, <8 x short>* %B) { entry: Modified: llvm/trunk/test/CodeGen/PowerPC/vec_spat.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/vec_spat.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/PowerPC/vec_spat.ll (original) +++ llvm/trunk/test/CodeGen/PowerPC/vec_spat.ll Wed Aug 15 08:36:28 2007 @@ -1,10 +1,10 @@ ; Test that vectors are scalarized/lowered correctly. ; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g3 | \ -; RUN: grep stfs | wc -l | grep 4 +; RUN: grep stfs | count 4 ; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5 -o %t -f -; RUN: grep vspltw %t | wc -l | grep 2 -; RUN: grep vsplti %t | wc -l | grep 3 -; RUN: grep vsplth %t | wc -l | grep 1 +; RUN: grep vspltw %t | count 2 +; RUN: grep vsplti %t | count 3 +; RUN: grep vsplth %t | count 1 %f4 = type <4 x float> %i4 = type <4 x int> Modified: llvm/trunk/test/CodeGen/SPARC/xnor.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/SPARC/xnor.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/SPARC/xnor.ll (original) +++ llvm/trunk/test/CodeGen/SPARC/xnor.ll Wed Aug 15 08:36:28 2007 @@ -1,5 +1,5 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=sparc | \ -; RUN: grep xnor | wc -l | grep 2 +; RUN: grep xnor | count 2 int %test1(int %X, int %Y) { %A = xor int %X, %Y Modified: llvm/trunk/test/CodeGen/X86/2006-01-19-ISelFoldingBug.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2006-01-19-ISelFoldingBug.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/2006-01-19-ISelFoldingBug.ll (original) +++ llvm/trunk/test/CodeGen/X86/2006-01-19-ISelFoldingBug.ll Wed Aug 15 08:36:28 2007 @@ -1,5 +1,5 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | \ -; RUN: grep shld | wc -l | grep 1 +; RUN: grep shld | count 1 ; ; Check that the isel does not fold the shld, which already folds a load ; and has two uses, into a store. Modified: llvm/trunk/test/CodeGen/X86/2006-04-27-ISelFoldingBug.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2006-04-27-ISelFoldingBug.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/2006-04-27-ISelFoldingBug.ll (original) +++ llvm/trunk/test/CodeGen/X86/2006-04-27-ISelFoldingBug.ll Wed Aug 15 08:36:28 2007 @@ -1,9 +1,9 @@ ; RUN: llvm-upgrade < %s | llvm-as | \ ; RUN: llc -march=x86 -mtriple=i686-apple-darwin8 -relocation-model=static | \ -; RUN: grep {movl _last} | wc -l | grep 1 +; RUN: grep {movl _last} | count 1 ; RUN: llvm-upgrade < %s | llvm-as | \ ; RUN: llc -march=x86 -mtriple=i686-apple-darwin8 -relocation-model=static | \ -; RUN: grep {cmpl.*_last} | wc -l | grep 1 +; RUN: grep {cmpl.*_last} | count 1 %block = external global ubyte* ; [#uses=1] %last = external global int ; [#uses=3] Modified: llvm/trunk/test/CodeGen/X86/2006-11-28-Memcpy.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2006-11-28-Memcpy.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/2006-11-28-Memcpy.ll (original) +++ llvm/trunk/test/CodeGen/X86/2006-11-28-Memcpy.ll Wed Aug 15 08:36:28 2007 @@ -1,8 +1,8 @@ ; PR1022, PR1023 ; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | \ -; RUN: grep 3721182122 | wc -l | grep 2 +; RUN: grep 3721182122 | count 2 ; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | \ -; RUN: grep -E {movl _?bytes2} | wc -l | grep 1 +; RUN: grep -E {movl _?bytes2} | count 1 %fmt = constant [4 x sbyte] c"%x\0A\00" %bytes = constant [4 x sbyte] c"\AA\BB\CC\DD" Modified: llvm/trunk/test/CodeGen/X86/2007-01-08-InstrSched.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-01-08-InstrSched.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/2007-01-08-InstrSched.ll (original) +++ llvm/trunk/test/CodeGen/X86/2007-01-08-InstrSched.ll Wed Aug 15 08:36:28 2007 @@ -1,6 +1,6 @@ ; PR1075 ; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin | \ -; RUN: %prcontext {mulss LCPI1_3} 1 | grep mulss | wc -l | grep 1 +; RUN: %prcontext {mulss LCPI1_3} 1 | grep mulss | count 1 define float @foo(float %x) { %tmp1 = mul float %x, 3.000000e+00 Modified: llvm/trunk/test/CodeGen/X86/2007-03-15-GEP-Idx-Sink.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-03-15-GEP-Idx-Sink.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/2007-03-15-GEP-Idx-Sink.ll (original) +++ llvm/trunk/test/CodeGen/X86/2007-03-15-GEP-Idx-Sink.ll Wed Aug 15 08:36:28 2007 @@ -1,5 +1,5 @@ ; RUN: llvm-as < %s | llc -march=x86 -mtriple=i686-darwin | \ -; RUN: grep push | wc -l | grep 3 +; RUN: grep push | count 3 define void @foo(i8** %buf, i32 %size, i32 %col, i8* %p) { entry: Modified: llvm/trunk/test/CodeGen/X86/2007-04-25-MMX-PADDQ.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-04-25-MMX-PADDQ.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/2007-04-25-MMX-PADDQ.ll (original) +++ llvm/trunk/test/CodeGen/X86/2007-04-25-MMX-PADDQ.ll Wed Aug 15 08:36:28 2007 @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -o - -march=x86 -mattr=+mmx | grep paddq | wc -l | grep 2 -; RUN: llvm-as < %s | llc -o - -march=x86 -mattr=+mmx | grep movq | wc -l | grep 3 +; RUN: llvm-as < %s | llc -o - -march=x86 -mattr=+mmx | grep paddq | count 2 +; RUN: llvm-as < %s | llc -o - -march=x86 -mattr=+mmx | grep movq | count 3 define <1 x i64> @unsigned_add3(<1 x i64>* %a, <1 x i64>* %b, i32 %count) { entry: Modified: llvm/trunk/test/CodeGen/X86/2007-06-14-branchfold.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-06-14-branchfold.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/2007-06-14-branchfold.ll (original) +++ llvm/trunk/test/CodeGen/X86/2007-06-14-branchfold.ll Wed Aug 15 08:36:28 2007 @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mcpu=i686 | grep jmp | wc -l | grep 1 +; RUN: llvm-as < %s | llc -mcpu=i686 | grep jmp | count 1 ; check that branch folding understands FP_REG_KILL is not a branch ; the remaining jmp can be removed if we take advantage of knowing ; abort does not return Modified: llvm/trunk/test/CodeGen/X86/2007-08-10-LEA16Use32.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-08-10-LEA16Use32.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/2007-08-10-LEA16Use32.ll (original) +++ llvm/trunk/test/CodeGen/X86/2007-08-10-LEA16Use32.ll Wed Aug 15 08:36:28 2007 @@ -20,4 +20,4 @@ return: ; preds = %bb, %entry ret void -} \ No newline at end of file +} Modified: llvm/trunk/test/CodeGen/X86/2007-08-10-SignExtSubreg.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-08-10-SignExtSubreg.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/2007-08-10-SignExtSubreg.ll (original) +++ llvm/trunk/test/CodeGen/X86/2007-08-10-SignExtSubreg.ll Wed Aug 15 08:36:28 2007 @@ -7,4 +7,4 @@ store i32 %x, i32* @X, align 4 %retval67 = trunc i32 %x to i8 ; [#uses=1] ret i8 %retval67 -} \ No newline at end of file +} Modified: llvm/trunk/test/CodeGen/X86/2007-08-13-SpillerReuse.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-08-13-SpillerReuse.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/2007-08-13-SpillerReuse.ll (original) +++ llvm/trunk/test/CodeGen/X86/2007-08-13-SpillerReuse.ll Wed Aug 15 08:36:28 2007 @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin | grep "48(%esp)" | wc -l | grep 5 +; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin | grep "48(%esp)" | count 5 %struct..0anon = type { i32 } %struct.rtvec_def = type { i32, [1 x %struct..0anon] } Modified: llvm/trunk/test/CodeGen/X86/and-or-fold.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/and-or-fold.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/and-or-fold.ll (original) +++ llvm/trunk/test/CodeGen/X86/and-or-fold.ll Wed Aug 15 08:36:28 2007 @@ -1,4 +1,4 @@ -; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep and | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep and | count 1 ; The dag combiner should fold together (x&127)|(y&16711680) -> (x|y)&c1 ; in this case. Modified: llvm/trunk/test/CodeGen/X86/bitcast2.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bitcast2.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/bitcast2.ll (original) +++ llvm/trunk/test/CodeGen/X86/bitcast2.ll Wed Aug 15 08:36:28 2007 @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep movd | wc -l | grep 2 +; RUN: llvm-as < %s | llc -march=x86-64 | grep movd | count 2 ; RUN: llvm-as < %s | llc -march=x86-64 | not grep rsp define i64 @test1(double %A) { Modified: llvm/trunk/test/CodeGen/X86/bswap.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bswap.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/bswap.ll (original) +++ llvm/trunk/test/CodeGen/X86/bswap.ll Wed Aug 15 08:36:28 2007 @@ -1,8 +1,8 @@ ; bswap should be constant folded when it is passed a constant argument ; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | \ -; RUN: grep bswapl | wc -l | grep 3 -; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep rolw | wc -l | grep 1 +; RUN: grep bswapl | count 3 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep rolw | count 1 declare ushort %llvm.bswap.i16(ushort) declare uint %llvm.bswap.i32(uint) Modified: llvm/trunk/test/CodeGen/X86/call-push.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/call-push.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/call-push.ll (original) +++ llvm/trunk/test/CodeGen/X86/call-push.ll Wed Aug 15 08:36:28 2007 @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -disable-fp-elim | grep subl | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=x86 -disable-fp-elim | grep subl | count 1 %struct.decode_t = type { i8, i8, i8, i8, i16, i8, i8, %struct.range_t** } %struct.range_t = type { float, float, i32, i32, i32, [0 x i8] } Modified: llvm/trunk/test/CodeGen/X86/cmp-test.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/cmp-test.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/cmp-test.ll (original) +++ llvm/trunk/test/CodeGen/X86/cmp-test.ll Wed Aug 15 08:36:28 2007 @@ -1,5 +1,5 @@ -; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep cmp | wc -l | grep 1 -; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep test | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep cmp | count 1 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep test | count 1 int %f1(int %X, int* %y) { %tmp = load int* %y Modified: llvm/trunk/test/CodeGen/X86/commute-two-addr.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/commute-two-addr.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/commute-two-addr.ll (original) +++ llvm/trunk/test/CodeGen/X86/commute-two-addr.ll Wed Aug 15 08:36:28 2007 @@ -3,7 +3,7 @@ ; Make sure there are only 3 mov's for each testcase ; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -x86-asm-syntax=intel | \ -; RUN: grep {\\\} | wc -l | grep 6 +; RUN: grep {\\\} | count 6 target triple = "i686-pc-linux-gnu" Modified: llvm/trunk/test/CodeGen/X86/compare_folding.llx URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/compare_folding.llx?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/compare_folding.llx (original) +++ llvm/trunk/test/CodeGen/X86/compare_folding.llx Wed Aug 15 08:36:28 2007 @@ -1,5 +1,5 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mcpu=yonah | \ -; RUN: grep movsd | wc -l | grep 1 +; RUN: grep movsd | count 1 ; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mcpu=yonah | \ ; RUN: grep ucomisd declare bool %llvm.isunordered.f64(double,double) Modified: llvm/trunk/test/CodeGen/X86/dollar-name.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/dollar-name.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/dollar-name.ll (original) +++ llvm/trunk/test/CodeGen/X86/dollar-name.ll Wed Aug 15 08:36:28 2007 @@ -1,6 +1,6 @@ -; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=att | grep (\$bar) | wc -l | grep 1 -; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=att | grep (\$qux) | wc -l | grep 1 -; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=att | grep (\$hen) | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=att | grep (\$bar) | count 1 +; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=att | grep (\$qux) | count 1 +; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=att | grep (\$hen) | count 1 ; PR1339 @"$bar" = global i32 zeroinitializer Modified: llvm/trunk/test/CodeGen/X86/extend.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/extend.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/extend.ll (original) +++ llvm/trunk/test/CodeGen/X86/extend.ll Wed Aug 15 08:36:28 2007 @@ -1,5 +1,5 @@ -; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -x86-asm-syntax=intel | grep movzx | wc -l | grep 1 -; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -x86-asm-syntax=intel | grep movsx | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -x86-asm-syntax=intel | grep movzx | count 1 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -x86-asm-syntax=intel | grep movsx | count 1 %G1 = internal global ubyte 0 ; [#uses=1] %G2 = internal global sbyte 0 ; [#uses=1] Modified: llvm/trunk/test/CodeGen/X86/extern_weak.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/extern_weak.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/extern_weak.ll (original) +++ llvm/trunk/test/CodeGen/X86/extern_weak.ll Wed Aug 15 08:36:28 2007 @@ -1,4 +1,4 @@ -; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=i686-apple-darwin | grep weak_reference | wc -l | grep 2 +; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=i686-apple-darwin | grep weak_reference | count 2 %Y = global int (sbyte*)* %X declare extern_weak int %X(sbyte*) Modified: llvm/trunk/test/CodeGen/X86/fabs.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fabs.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/fabs.ll (original) +++ llvm/trunk/test/CodeGen/X86/fabs.ll Wed Aug 15 08:36:28 2007 @@ -1,9 +1,9 @@ ; Make sure this testcase codegens to the fabs instruction, not a call to fabsf ; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=-sse2,-sse3 | \ -; RUN: grep fabs\$ | wc -l | grep 1 +; RUN: grep fabs\$ | count 1 ; RUN: llvm-upgrade < %s | llvm-as | \ ; RUN: llc -march=x86 -mattr=-sse2,-sse3 -enable-unsafe-fp-math | \ -; RUN: grep fabs\$ | wc -l | grep 2 +; RUN: grep fabs\$ | count 2 target endian = little target pointersize = 32 Modified: llvm/trunk/test/CodeGen/X86/fildll.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fildll.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/fildll.ll (original) +++ llvm/trunk/test/CodeGen/X86/fildll.ll Wed Aug 15 08:36:28 2007 @@ -1,4 +1,4 @@ -; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -x86-asm-syntax=att -mattr=-sse2 | grep fildll | wc -l | grep 2 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -x86-asm-syntax=att -mattr=-sse2 | grep fildll | count 2 fastcc double %sint64_to_fp(long %X) { %R = cast long %X to double Modified: llvm/trunk/test/CodeGen/X86/fp-stack-ret.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fp-stack-ret.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/fp-stack-ret.ll (original) +++ llvm/trunk/test/CodeGen/X86/fp-stack-ret.ll Wed Aug 15 08:36:28 2007 @@ -1,8 +1,8 @@ ; RUN: llvm-as < %s | \ ; RUN: llc -mtriple=i686-apple-darwin8 -mcpu=yonah -march=x86 > %t -; RUN: grep fldl %t | wc -l | grep 1 +; RUN: grep fldl %t | count 1 ; RUN: not grep xmm %t -; RUN: grep {sub.*esp} %t | wc -l | grep 1 +; RUN: grep {sub.*esp} %t | count 1 ; These testcases shouldn't require loading into an XMM register then storing ; to memory, then reloading into an FPStack reg. Modified: llvm/trunk/test/CodeGen/X86/fsxor-alignment.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fsxor-alignment.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/fsxor-alignment.ll (original) +++ llvm/trunk/test/CodeGen/X86/fsxor-alignment.ll Wed Aug 15 08:36:28 2007 @@ -1,5 +1,5 @@ ; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -enable-unsafe-fp-math | \ -; RUN: grep -v sp | grep xorps | wc -l | grep 2 +; RUN: grep -v sp | grep xorps | count 2 ; Don't fold the incoming stack arguments into the xorps instructions used ; to do floating-point negations, because the arguments aren't vectors Modified: llvm/trunk/test/CodeGen/X86/lea-recursion.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/lea-recursion.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/lea-recursion.ll (original) +++ llvm/trunk/test/CodeGen/X86/lea-recursion.ll Wed Aug 15 08:36:28 2007 @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep lea | wc -l | grep 12 +; RUN: llvm-as < %s | llc -march=x86-64 | grep lea | count 12 ; This testcase was written to demonstrate an instruction-selection problem, ; however it also happens to expose a limitation in the DAGCombiner's Modified: llvm/trunk/test/CodeGen/X86/long-setcc.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/long-setcc.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/long-setcc.ll (original) +++ llvm/trunk/test/CodeGen/X86/long-setcc.ll Wed Aug 15 08:36:28 2007 @@ -1,6 +1,6 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep cmp | wc -l | grep 1 -; RUN: llvm-as < %s | llc -march=x86 | grep shr | wc -l | grep 1 -; RUN: llvm-as < %s | llc -march=x86 | grep xor | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=x86 | grep cmp | count 1 +; RUN: llvm-as < %s | llc -march=x86 | grep shr | count 1 +; RUN: llvm-as < %s | llc -march=x86 | grep xor | count 1 define i1 @t1(i64 %x) { %B = icmp slt i64 %x, 0 Modified: llvm/trunk/test/CodeGen/X86/loop-strength-reduce.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/loop-strength-reduce.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/loop-strength-reduce.ll (original) +++ llvm/trunk/test/CodeGen/X86/loop-strength-reduce.ll Wed Aug 15 08:36:28 2007 @@ -1,5 +1,5 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | \ -; RUN: grep {A(} | wc -l | grep 1 +; RUN: grep {A(} | count 1 ; ; Make sure the common loop invariant _A(reg) is hoisted up to preheader. Modified: llvm/trunk/test/CodeGen/X86/mingw-alloca.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mingw-alloca.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/mingw-alloca.ll (original) +++ llvm/trunk/test/CodeGen/X86/mingw-alloca.ll Wed Aug 15 08:36:28 2007 @@ -1,8 +1,8 @@ ; RUN: llvm-as < %s | llc -o %t -f -; RUN: grep __alloca %t | wc -l | grep 2 +; RUN: grep __alloca %t | count 2 ; RUN: grep 8028 %t ; RUN: grep {pushl %eax} %t -; RUN: grep 8024 %t | wc -l | grep 2 +; RUN: grep 8024 %t | count 2 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" target triple = "i386-mingw32" Modified: llvm/trunk/test/CodeGen/X86/mmx-insert-element.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mmx-insert-element.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/mmx-insert-element.ll (original) +++ llvm/trunk/test/CodeGen/X86/mmx-insert-element.ll Wed Aug 15 08:36:28 2007 @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+mmx | grep movq | wc -l | grep 3 +; RUN: llvm-as < %s | llc -march=x86 -mattr=+mmx | grep movq | count 3 ; FIXME: This code outputs: ; Modified: llvm/trunk/test/CodeGen/X86/mmx-punpckhdq.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mmx-punpckhdq.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/mmx-punpckhdq.ll (original) +++ llvm/trunk/test/CodeGen/X86/mmx-punpckhdq.ll Wed Aug 15 08:36:28 2007 @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+mmx | grep punpckhdq | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=x86 -mattr=+mmx | grep punpckhdq | count 1 define void @bork(<1 x i64>* %x) { entry: Modified: llvm/trunk/test/CodeGen/X86/peep-vector-extract-insert.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/peep-vector-extract-insert.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/peep-vector-extract-insert.ll (original) +++ llvm/trunk/test/CodeGen/X86/peep-vector-extract-insert.ll Wed Aug 15 08:36:28 2007 @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep {pxor %xmm0, %xmm0} | wc -l | grep 2 +; RUN: llvm-as < %s | llc -march=x86-64 | grep {pxor %xmm0, %xmm0} | count 2 define float @foo(<4 x float> %a) { %b = insertelement <4 x float> %a, float 0.0, i32 3 Modified: llvm/trunk/test/CodeGen/X86/pr1489.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr1489.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/pr1489.ll (original) +++ llvm/trunk/test/CodeGen/X86/pr1489.ll Wed Aug 15 08:36:28 2007 @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -disable-fp-elim -fast -mcpu=i486 | grep 1082126238 | wc -l | grep 3 -; RUN: llvm-as < %s | llc -disable-fp-elim -fast -mcpu=i486 | grep 3058016715 | wc -l | grep 1 +; RUN: llvm-as < %s | llc -disable-fp-elim -fast -mcpu=i486 | grep 1082126238 | count 3 +; RUN: llvm-as < %s | llc -disable-fp-elim -fast -mcpu=i486 | grep 3058016715 | count 1 ;; magic constants are 3.999f and half of 3.999 ; ModuleID = '1489.c' target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" Modified: llvm/trunk/test/CodeGen/X86/pr1505b.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr1505b.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/pr1505b.ll (original) +++ llvm/trunk/test/CodeGen/X86/pr1505b.ll Wed Aug 15 08:36:28 2007 @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -mcpu=i486 | grep fstpl | wc -l | grep 4 -; RUN: llvm-as < %s | llc -mcpu=i486 | grep fstps | wc -l | grep 3 +; RUN: llvm-as < %s | llc -mcpu=i486 | grep fstpl | count 4 +; RUN: llvm-as < %s | llc -mcpu=i486 | grep fstps | count 3 ; ModuleID = '' target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" Modified: llvm/trunk/test/CodeGen/X86/rotate.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/rotate.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/rotate.ll (original) +++ llvm/trunk/test/CodeGen/X86/rotate.ll Wed Aug 15 08:36:28 2007 @@ -1,5 +1,5 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -x86-asm-syntax=intel | \ -; RUN: grep {ro\[rl\]} | wc -l | grep 12 +; RUN: grep {ro\[rl\]} | count 12 uint %rotl32(uint %A, ubyte %Amt) { %B = shl uint %A, ubyte %Amt Modified: llvm/trunk/test/CodeGen/X86/scalar-min-max-fill-operand.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/scalar-min-max-fill-operand.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/scalar-min-max-fill-operand.ll (original) +++ llvm/trunk/test/CodeGen/X86/scalar-min-max-fill-operand.ll Wed Aug 15 08:36:28 2007 @@ -1,6 +1,6 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep min | wc -l | grep 1 -; RUN: llvm-as < %s | llc -march=x86-64 | grep max | wc -l | grep 1 -; RUN: llvm-as < %s | llc -march=x86-64 | grep mov | wc -l | grep 2 +; RUN: llvm-as < %s | llc -march=x86-64 | grep min | count 1 +; RUN: llvm-as < %s | llc -march=x86-64 | grep max | count 1 +; RUN: llvm-as < %s | llc -march=x86-64 | grep mov | count 2 declare float @bar() Modified: llvm/trunk/test/CodeGen/X86/scalar_sse_minmax.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/scalar_sse_minmax.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/scalar_sse_minmax.ll (original) +++ llvm/trunk/test/CodeGen/X86/scalar_sse_minmax.ll Wed Aug 15 08:36:28 2007 @@ -1,7 +1,7 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse1,+sse2 | \ -; RUN: grep mins | wc -l | grep 3 +; RUN: grep mins | count 3 ; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse1,+sse2 | \ -; RUN: grep maxs | wc -l | grep 2 +; RUN: grep maxs | count 2 declare bool %llvm.isunordered.f64( double %x, double %y ) declare bool %llvm.isunordered.f32( float %x, float %y ) Modified: llvm/trunk/test/CodeGen/X86/shift-codegen.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/shift-codegen.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/shift-codegen.ll (original) +++ llvm/trunk/test/CodeGen/X86/shift-codegen.ll Wed Aug 15 08:36:28 2007 @@ -1,5 +1,5 @@ ; RUN: llvm-as < %s | llc -relocation-model=static -march=x86 | \ -; RUN: grep {shll \$3} | wc -l | grep 2 +; RUN: grep {shll \$3} | count 2 ; This should produce two shll instructions, not any lea's. Modified: llvm/trunk/test/CodeGen/X86/shift-double.llx URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/shift-double.llx?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/shift-double.llx (original) +++ llvm/trunk/test/CodeGen/X86/shift-double.llx Wed Aug 15 08:36:28 2007 @@ -1,5 +1,5 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -x86-asm-syntax=intel | \ -; RUN: grep {sh\[lr\]d} | wc -l | grep 5 +; RUN: grep {sh\[lr\]d} | count 5 long %test1(long %X, ubyte %C) { %Y = shl long %X, ubyte %C Modified: llvm/trunk/test/CodeGen/X86/shift-folding.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/shift-folding.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/shift-folding.ll (original) +++ llvm/trunk/test/CodeGen/X86/shift-folding.ll Wed Aug 15 08:36:28 2007 @@ -1,5 +1,5 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | \ -; RUN: grep {s\[ah\]\[rl\]l} | wc -l | grep 1 +; RUN: grep {s\[ah\]\[rl\]l} | count 1 int* %test1(int *%P, uint %X) { %Y = shr uint %X, ubyte 2 Modified: llvm/trunk/test/CodeGen/X86/sse-align-1.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse-align-1.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/sse-align-1.ll (original) +++ llvm/trunk/test/CodeGen/X86/sse-align-1.ll Wed Aug 15 08:36:28 2007 @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep movap | wc -l | grep 2 +; RUN: llvm-as < %s | llc -march=x86-64 | grep movap | count 2 define <4 x float> @foo(<4 x float>* %p) { Modified: llvm/trunk/test/CodeGen/X86/sse-align-10.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse-align-10.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/sse-align-10.ll (original) +++ llvm/trunk/test/CodeGen/X86/sse-align-10.ll Wed Aug 15 08:36:28 2007 @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep movups | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=x86-64 | grep movups | count 1 define <2 x i64> @bar(<2 x i64>* %p) { Modified: llvm/trunk/test/CodeGen/X86/sse-align-12.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse-align-12.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/sse-align-12.ll (original) +++ llvm/trunk/test/CodeGen/X86/sse-align-12.ll Wed Aug 15 08:36:28 2007 @@ -1,8 +1,8 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep unpck | wc -l | grep 2 -; RUN: llvm-as < %s | llc -march=x86-64 | grep shuf | wc -l | grep 2 -; RUN: llvm-as < %s | llc -march=x86-64 | grep ps | wc -l | grep 4 -; RUN: llvm-as < %s | llc -march=x86-64 | grep pd | wc -l | grep 4 -; RUN: llvm-as < %s | llc -march=x86-64 | grep movup | wc -l | grep 4 +; RUN: llvm-as < %s | llc -march=x86-64 | grep unpck | count 2 +; RUN: llvm-as < %s | llc -march=x86-64 | grep shuf | count 2 +; RUN: llvm-as < %s | llc -march=x86-64 | grep ps | count 4 +; RUN: llvm-as < %s | llc -march=x86-64 | grep pd | count 4 +; RUN: llvm-as < %s | llc -march=x86-64 | grep movup | count 4 define <4 x float> @a(<4 x float>* %y) { Modified: llvm/trunk/test/CodeGen/X86/sse-align-2.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse-align-2.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/sse-align-2.ll (original) +++ llvm/trunk/test/CodeGen/X86/sse-align-2.ll Wed Aug 15 08:36:28 2007 @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep movup | wc -l | grep 2 +; RUN: llvm-as < %s | llc -march=x86-64 | grep movup | count 2 define <4 x float> @foo(<4 x float>* %p, <4 x float> %x) { Modified: llvm/trunk/test/CodeGen/X86/sse-align-3.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse-align-3.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/sse-align-3.ll (original) +++ llvm/trunk/test/CodeGen/X86/sse-align-3.ll Wed Aug 15 08:36:28 2007 @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep movap | wc -l | grep 2 +; RUN: llvm-as < %s | llc -march=x86-64 | grep movap | count 2 define void @foo(<4 x float>* %p, <4 x float> %x) { Modified: llvm/trunk/test/CodeGen/X86/sse-align-4.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse-align-4.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/sse-align-4.ll (original) +++ llvm/trunk/test/CodeGen/X86/sse-align-4.ll Wed Aug 15 08:36:28 2007 @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep movup | wc -l | grep 2 +; RUN: llvm-as < %s | llc -march=x86-64 | grep movup | count 2 define void @foo(<4 x float>* %p, <4 x float> %x) { Modified: llvm/trunk/test/CodeGen/X86/sse-align-5.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse-align-5.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/sse-align-5.ll (original) +++ llvm/trunk/test/CodeGen/X86/sse-align-5.ll Wed Aug 15 08:36:28 2007 @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep movaps | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=x86-64 | grep movaps | count 1 define <2 x i64> @bar(<2 x i64>* %p) { Modified: llvm/trunk/test/CodeGen/X86/sse-align-6.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse-align-6.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/sse-align-6.ll (original) +++ llvm/trunk/test/CodeGen/X86/sse-align-6.ll Wed Aug 15 08:36:28 2007 @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep movups | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=x86-64 | grep movups | count 1 define <2 x i64> @bar(<2 x i64>* %p, <2 x i64> %x) { Modified: llvm/trunk/test/CodeGen/X86/sse-align-7.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse-align-7.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/sse-align-7.ll (original) +++ llvm/trunk/test/CodeGen/X86/sse-align-7.ll Wed Aug 15 08:36:28 2007 @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep movaps | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=x86-64 | grep movaps | count 1 define void @bar(<2 x i64>* %p, <2 x i64> %x) { Modified: llvm/trunk/test/CodeGen/X86/sse-align-8.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse-align-8.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/sse-align-8.ll (original) +++ llvm/trunk/test/CodeGen/X86/sse-align-8.ll Wed Aug 15 08:36:28 2007 @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep movups | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=x86-64 | grep movups | count 1 define void @bar(<2 x i64>* %p, <2 x i64> %x) { Modified: llvm/trunk/test/CodeGen/X86/sse-align-9.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse-align-9.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/sse-align-9.ll (original) +++ llvm/trunk/test/CodeGen/X86/sse-align-9.ll Wed Aug 15 08:36:28 2007 @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep movup | wc -l | grep 2 +; RUN: llvm-as < %s | llc -march=x86-64 | grep movup | count 2 define <4 x float> @foo(<4 x float>* %p) { Modified: llvm/trunk/test/CodeGen/X86/store-global-address.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/store-global-address.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/store-global-address.ll (original) +++ llvm/trunk/test/CodeGen/X86/store-global-address.ll Wed Aug 15 08:36:28 2007 @@ -1,4 +1,4 @@ -; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep movl | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep movl | count 1 %dst = global int 0 %ptr = global int* null Modified: llvm/trunk/test/CodeGen/X86/store_op_load_fold2.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/store_op_load_fold2.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/store_op_load_fold2.ll (original) +++ llvm/trunk/test/CodeGen/X86/store_op_load_fold2.ll Wed Aug 15 08:36:28 2007 @@ -1,5 +1,5 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -x86-asm-syntax=intel | \ -; RUN: grep {and DWORD PTR} | wc -l | grep 2 +; RUN: grep {and DWORD PTR} | count 2 target endian = little target pointersize = 32 Modified: llvm/trunk/test/CodeGen/X86/test-hidden.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/test-hidden.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/test-hidden.ll (original) +++ llvm/trunk/test/CodeGen/X86/test-hidden.ll Wed Aug 15 08:36:28 2007 @@ -1,7 +1,7 @@ ; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux-gnu | \ -; RUN: grep .hidden | wc -l | grep 2 +; RUN: grep .hidden | count 2 ; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin8.8.0 | \ -; RUN: grep .private_extern | wc -l | grep 2 +; RUN: grep .private_extern | count 2 %struct.Person = type { i32 } @a = hidden global i32 0 Modified: llvm/trunk/test/CodeGen/X86/test-pic-1.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/test-pic-1.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/test-pic-1.ll (original) +++ llvm/trunk/test/CodeGen/X86/test-pic-1.ll Wed Aug 15 08:36:28 2007 @@ -1,8 +1,8 @@ ; RUN: llvm-as < %s | \ ; RUN: llc -mtriple=i686-pc-linux-gnu -relocation-model=pic -o %t -f ; RUN: grep _GLOBAL_OFFSET_TABLE_ %t -; RUN: grep piclabel %t | wc -l | grep 3 -; RUN: grep GOT %t | wc -l | grep 3 +; RUN: grep piclabel %t | count 3 +; RUN: grep GOT %t | count 3 ; RUN: not grep GOTOFF %t | wc -l @ptr = external global i32* Modified: llvm/trunk/test/CodeGen/X86/test-pic-2.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/test-pic-2.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/test-pic-2.ll (original) +++ llvm/trunk/test/CodeGen/X86/test-pic-2.ll Wed Aug 15 08:36:28 2007 @@ -1,8 +1,8 @@ ; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux-gnu -relocation-model=pic \ ; RUN: -o %t -f ; RUN: grep _GLOBAL_OFFSET_TABLE_ %t -; RUN: grep piclabel %t | wc -l | grep 3 -; RUN: grep GOTOFF %t | wc -l | grep 4 +; RUN: grep piclabel %t | count 3 +; RUN: grep GOTOFF %t | count 4 @ptr = internal global i32* null @dst = internal global i32 0 Modified: llvm/trunk/test/CodeGen/X86/test-pic-3.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/test-pic-3.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/test-pic-3.ll (original) +++ llvm/trunk/test/CodeGen/X86/test-pic-3.ll Wed Aug 15 08:36:28 2007 @@ -1,8 +1,8 @@ ; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux-gnu -relocation-model=pic \ ; RUN: -o %t -f ; RUN: grep _GLOBAL_OFFSET_TABLE_ %t -; RUN: grep piclabel %t | wc -l | grep 3 -; RUN: grep PLT %t | wc -l | grep 1 +; RUN: grep piclabel %t | count 3 +; RUN: grep PLT %t | count 1 define void @bar() { entry: Modified: llvm/trunk/test/CodeGen/X86/test-pic-4.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/test-pic-4.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/test-pic-4.ll (original) +++ llvm/trunk/test/CodeGen/X86/test-pic-4.ll Wed Aug 15 08:36:28 2007 @@ -1,9 +1,9 @@ ; RUN: llvm-as < %s | \ ; RUN: llc -mtriple=i686-pc-linux-gnu -relocation-model=pic -o %t -f ; RUN: grep _GLOBAL_OFFSET_TABLE_ %t -; RUN: grep piclabel %t | wc -l | grep 3 -; RUN: grep PLT %t | wc -l | grep 1 -; RUN: grep GOT %t | wc -l | grep 1 +; RUN: grep piclabel %t | count 3 +; RUN: grep PLT %t | count 1 +; RUN: grep GOT %t | count 1 ; RUN: not grep GOTOFF %t @pfoo = external global void(...)* Modified: llvm/trunk/test/CodeGen/X86/test-pic-5.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/test-pic-5.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/test-pic-5.ll (original) +++ llvm/trunk/test/CodeGen/X86/test-pic-5.ll Wed Aug 15 08:36:28 2007 @@ -1,8 +1,8 @@ ; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux-gnu -relocation-model=pic \ ; RUN: -o %t -f ; RUN: grep _GLOBAL_OFFSET_TABLE_ %t -; RUN: grep piclabel %t | wc -l | grep 3 -; RUN: grep PLT %t | wc -l | grep 1 +; RUN: grep piclabel %t | count 3 +; RUN: grep PLT %t | count 1 @ptr = external global i32* Modified: llvm/trunk/test/CodeGen/X86/test-pic-6.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/test-pic-6.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/test-pic-6.ll (original) +++ llvm/trunk/test/CodeGen/X86/test-pic-6.ll Wed Aug 15 08:36:28 2007 @@ -1,8 +1,8 @@ ; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux-gnu -relocation-model=pic \ ; RUN: -o %t -f ; RUN: grep _GLOBAL_OFFSET_TABLE_ %t -; RUN: grep piclabel %t | wc -l | grep 3 -; RUN: grep GOT %t | wc -l | grep 3 +; RUN: grep piclabel %t | count 3 +; RUN: grep GOT %t | count 3 @ptr = global i32* null @dst = global i32 0 Modified: llvm/trunk/test/CodeGen/X86/test-pic-cpool.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/test-pic-cpool.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/test-pic-cpool.ll (original) +++ llvm/trunk/test/CodeGen/X86/test-pic-cpool.ll Wed Aug 15 08:36:28 2007 @@ -1,9 +1,9 @@ ; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux-gnu -relocation-model=pic \ ; RUN: -o %t -f ; RUN: grep _GLOBAL_OFFSET_TABLE_ %t -; RUN: grep piclabel %t | wc -l | grep 3 -; RUN: grep GOTOFF %t | wc -l | grep 2 -; RUN: grep CPI %t | wc -l | grep 4 +; RUN: grep piclabel %t | count 3 +; RUN: grep GOTOFF %t | count 2 +; RUN: grep CPI %t | count 4 define double @foo(i32 %a.u) { entry: Modified: llvm/trunk/test/CodeGen/X86/test-pic-jtbl.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/test-pic-jtbl.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/test-pic-jtbl.ll (original) +++ llvm/trunk/test/CodeGen/X86/test-pic-jtbl.ll Wed Aug 15 08:36:28 2007 @@ -1,10 +1,10 @@ ; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux-gnu -relocation-model=pic \ ; RUN: -o %t -f ; RUN: grep _GLOBAL_OFFSET_TABLE_ %t -; RUN: grep piclabel %t | wc -l | grep 3 -; RUN: grep PLT %t | wc -l | grep 6 -; RUN: grep GOTOFF %t | wc -l | grep 2 -; RUN: grep JTI %t | wc -l | grep 9 +; RUN: grep piclabel %t | count 3 +; RUN: grep PLT %t | count 6 +; RUN: grep GOTOFF %t | count 2 +; RUN: grep JTI %t | count 9 define void @bar(i32 %n.u) { entry: Modified: llvm/trunk/test/CodeGen/X86/vec_extract.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_extract.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/vec_extract.ll (original) +++ llvm/trunk/test/CodeGen/X86/vec_extract.ll Wed Aug 15 08:36:28 2007 @@ -1,8 +1,8 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 -o %t -f -; RUN: grep movss %t | wc -l | grep 3 -; RUN: grep movhlps %t | wc -l | grep 1 -; RUN: grep pshufd %t | wc -l | grep 1 -; RUN: grep unpckhpd %t | wc -l | grep 1 +; RUN: grep movss %t | count 3 +; RUN: grep movhlps %t | count 1 +; RUN: grep pshufd %t | count 1 +; RUN: grep unpckhpd %t | count 1 void %test1(<4 x float>* %F, float* %f) { %tmp = load <4 x float>* %F Modified: llvm/trunk/test/CodeGen/X86/vec_insert.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_insert.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/vec_insert.ll (original) +++ llvm/trunk/test/CodeGen/X86/vec_insert.ll Wed Aug 15 08:36:28 2007 @@ -1,6 +1,6 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 -o %t -f -; RUN: grep movss %t | wc -l | grep 1 -; RUN: grep pinsrw %t | wc -l | grep 2 +; RUN: grep movss %t | count 1 +; RUN: grep pinsrw %t | count 2 void %test(<4 x float>* %F, int %I) { %tmp = load <4 x float>* %F Modified: llvm/trunk/test/CodeGen/X86/vec_logical.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_logical.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/vec_logical.ll (original) +++ llvm/trunk/test/CodeGen/X86/vec_logical.ll Wed Aug 15 08:36:28 2007 @@ -1,7 +1,7 @@ ; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep xorps | wc -l | grep 2 +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep xorps | count 2 ; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep andnps -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movaps | wc -l | grep 2 +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movaps | count 2 define void @t(<4 x float> %A) { %tmp1277 = sub <4 x float> < float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00 >, %A Modified: llvm/trunk/test/CodeGen/X86/vec_set-2.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_set-2.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/vec_set-2.ll (original) +++ llvm/trunk/test/CodeGen/X86/vec_set-2.ll Wed Aug 15 08:36:28 2007 @@ -1,5 +1,5 @@ -; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 | grep movss | wc -l | grep 1 -; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 | grep movd | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 | grep movss | count 1 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 | grep movd | count 1 <4 x float> %test1(float %a) { %tmp = insertelement <4 x float> zeroinitializer, float %a, uint 0 Modified: llvm/trunk/test/CodeGen/X86/vec_set-3.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_set-3.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/vec_set-3.ll (original) +++ llvm/trunk/test/CodeGen/X86/vec_set-3.ll Wed Aug 15 08:36:28 2007 @@ -1,6 +1,6 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 -o %t -f -; RUN: grep shufps %t | wc -l | grep 1 -; RUN: grep pshufd %t | wc -l | grep 1 +; RUN: grep shufps %t | count 1 +; RUN: grep pshufd %t | count 1 <4 x float> %test(float %a) { %tmp = insertelement <4 x float> zeroinitializer, float %a, uint 1 Modified: llvm/trunk/test/CodeGen/X86/vec_set-4.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_set-4.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/vec_set-4.ll (original) +++ llvm/trunk/test/CodeGen/X86/vec_set-4.ll Wed Aug 15 08:36:28 2007 @@ -1,4 +1,4 @@ -; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 | grep pinsrw | wc -l | grep 2 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 | grep pinsrw | count 2 <2 x long> %test(short %a) { entry: Modified: llvm/trunk/test/CodeGen/X86/vec_set-5.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_set-5.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/vec_set-5.ll (original) +++ llvm/trunk/test/CodeGen/X86/vec_set-5.ll Wed Aug 15 08:36:28 2007 @@ -1,7 +1,7 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 -o %t -f -; RUN: grep movlhps %t | wc -l | grep 2 -; RUN: grep unpcklps %t | wc -l | grep 1 -; RUN: grep punpckldq %t | wc -l | grep 1 +; RUN: grep movlhps %t | count 2 +; RUN: grep unpcklps %t | count 1 +; RUN: grep punpckldq %t | count 1 <4 x float> %test1(float %a, float %b) { %tmp = insertelement <4 x float> zeroinitializer, float %a, uint 0 Modified: llvm/trunk/test/CodeGen/X86/vec_set-6.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_set-6.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/vec_set-6.ll (original) +++ llvm/trunk/test/CodeGen/X86/vec_set-6.ll Wed Aug 15 08:36:28 2007 @@ -1,6 +1,6 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 -o %t -f -; RUN: grep unpcklps %t | wc -l | grep 1 -; RUN: grep shufps %t | wc -l | grep 1 +; RUN: grep unpcklps %t | count 1 +; RUN: grep shufps %t | count 1 <4 x float> %test(float %a, float %b, float %c) { %tmp = insertelement <4 x float> zeroinitializer, float %a, uint 1 Modified: llvm/trunk/test/CodeGen/X86/vec_set-7.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_set-7.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/vec_set-7.ll (original) +++ llvm/trunk/test/CodeGen/X86/vec_set-7.ll Wed Aug 15 08:36:28 2007 @@ -1,4 +1,4 @@ -; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 | grep movq | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 | grep movq | count 1 <2 x long> %test(<2 x long>* %p) { %tmp = cast <2 x long>* %p to double* Modified: llvm/trunk/test/CodeGen/X86/vec_set.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_set.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/vec_set.ll (original) +++ llvm/trunk/test/CodeGen/X86/vec_set.ll Wed Aug 15 08:36:28 2007 @@ -1,4 +1,4 @@ -; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 | grep punpckl | wc -l | grep 7 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 | grep punpckl | count 7 void %test(<8 x short>* %b, short %a0, short %a1, short %a2, short %a3, short %a4, short %a5, short %a6, short %a7) { %tmp = insertelement <8 x short> zeroinitializer, short %a0, uint 0 Modified: llvm/trunk/test/CodeGen/X86/vec_shuffle-10.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_shuffle-10.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/vec_shuffle-10.ll (original) +++ llvm/trunk/test/CodeGen/X86/vec_shuffle-10.ll Wed Aug 15 08:36:28 2007 @@ -1,7 +1,7 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 | \ -; RUN: grep unpcklps | wc -l | grep 1 +; RUN: grep unpcklps | count 1 ; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 | \ -; RUN: grep unpckhps | wc -l | grep 1 +; RUN: grep unpckhps | count 1 ; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 | \ ; RUN: not grep {sub.*esp} Modified: llvm/trunk/test/CodeGen/X86/vec_shuffle-2.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_shuffle-2.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/vec_shuffle-2.ll (original) +++ llvm/trunk/test/CodeGen/X86/vec_shuffle-2.ll Wed Aug 15 08:36:28 2007 @@ -1,7 +1,7 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 -o %t -f -; RUN: grep pshufhw %t | wc -l | grep 1 -; RUN: grep pshuflw %t | wc -l | grep 1 -; RUN: grep movhps %t | wc -l | grep 1 +; RUN: grep pshufhw %t | count 1 +; RUN: grep pshuflw %t | count 1 +; RUN: grep movhps %t | count 1 void %test1(<2 x long>* %res, <2 x long>* %A) { %tmp = load <2 x long>* %A Modified: llvm/trunk/test/CodeGen/X86/vec_shuffle-3.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_shuffle-3.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/vec_shuffle-3.ll (original) +++ llvm/trunk/test/CodeGen/X86/vec_shuffle-3.ll Wed Aug 15 08:36:28 2007 @@ -1,6 +1,6 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 -o %t -f -; RUN: grep movlhps %t | wc -l | grep 1 -; RUN: grep movhlps %t | wc -l | grep 1 +; RUN: grep movlhps %t | count 1 +; RUN: grep movhlps %t | count 1 <4 x float> %test1(<4 x float>* %x, <4 x float>* %y) { %tmp = load <4 x float>* %y Modified: llvm/trunk/test/CodeGen/X86/vec_shuffle-4.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_shuffle-4.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/vec_shuffle-4.ll (original) +++ llvm/trunk/test/CodeGen/X86/vec_shuffle-4.ll Wed Aug 15 08:36:28 2007 @@ -1,5 +1,5 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 > %t -; RUN: grep shuf %t | wc -l | grep 2 +; RUN: grep shuf %t | count 2 ; RUN: not grep unpck %t void %test(<4 x float>* %res, <4 x float>* %A, <4 x float>* %B, <4 x float>* %C) { %tmp3 = load <4 x float>* %B Modified: llvm/trunk/test/CodeGen/X86/vec_shuffle-5.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_shuffle-5.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/vec_shuffle-5.ll (original) +++ llvm/trunk/test/CodeGen/X86/vec_shuffle-5.ll Wed Aug 15 08:36:28 2007 @@ -1,6 +1,6 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 -o %t -f -; RUN: grep movhlps %t | wc -l | grep 1 -; RUN: grep shufps %t | wc -l | grep 1 +; RUN: grep movhlps %t | count 1 +; RUN: grep shufps %t | count 1 void %test() { %tmp1 = load <4 x float>* null Modified: llvm/trunk/test/CodeGen/X86/vec_shuffle-6.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_shuffle-6.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/vec_shuffle-6.ll (original) +++ llvm/trunk/test/CodeGen/X86/vec_shuffle-6.ll Wed Aug 15 08:36:28 2007 @@ -1,7 +1,7 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 -o %t -f -; RUN: grep movapd %t | wc -l | grep 1 -; RUN: grep movaps %t | wc -l | grep 1 -; RUN: grep movups %t | wc -l | grep 2 +; RUN: grep movapd %t | count 1 +; RUN: grep movaps %t | count 1 +; RUN: grep movups %t | count 2 target triple = "i686-apple-darwin" Modified: llvm/trunk/test/CodeGen/X86/vec_shuffle-7.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_shuffle-7.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/vec_shuffle-7.ll (original) +++ llvm/trunk/test/CodeGen/X86/vec_shuffle-7.ll Wed Aug 15 08:36:28 2007 @@ -1,5 +1,5 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 -o %t -f -; RUN: grep xorps %t | wc -l | grep 1 +; RUN: grep xorps %t | count 1 ; RUN: not grep shufps %t void %test() { Modified: llvm/trunk/test/CodeGen/X86/vec_shuffle-9.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_shuffle-9.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/vec_shuffle-9.ll (original) +++ llvm/trunk/test/CodeGen/X86/vec_shuffle-9.ll Wed Aug 15 08:36:28 2007 @@ -1,5 +1,5 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 -o %t -f -; RUN: grep punpck %t | wc -l | grep 2 +; RUN: grep punpck %t | count 2 ; RUN: not grep pextrw %t <4 x int> %test(sbyte** %ptr) { Modified: llvm/trunk/test/CodeGen/X86/vec_shuffle.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_shuffle.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/vec_shuffle.ll (original) +++ llvm/trunk/test/CodeGen/X86/vec_shuffle.ll Wed Aug 15 08:36:28 2007 @@ -1,7 +1,7 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 -o %t -f -; RUN: grep shufp %t | wc -l | grep 1 -; RUN: grep movupd %t | wc -l | grep 1 -; RUN: grep pshufhw %t | wc -l | grep 1 +; RUN: grep shufp %t | count 1 +; RUN: grep movupd %t | count 1 +; RUN: grep pshufhw %t | count 1 void %test_v4sf(<4 x float>* %P, float %X, float %Y) { %tmp = insertelement <4 x float> zeroinitializer, float %X, uint 0 Modified: llvm/trunk/test/CodeGen/X86/vec_splat-2.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_splat-2.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/vec_splat-2.ll (original) +++ llvm/trunk/test/CodeGen/X86/vec_splat-2.ll Wed Aug 15 08:36:28 2007 @@ -1,4 +1,4 @@ -; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 | grep pshufd | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 | grep pshufd | count 1 void %test(<2 x long>* %P, sbyte %x) { %tmp = insertelement <16 x sbyte> zeroinitializer, sbyte %x, uint 0 ; <<16 x sbyte>> [#uses=1] Modified: llvm/trunk/test/CodeGen/X86/vec_ss_load_fold.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_ss_load_fold.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/vec_ss_load_fold.ll (original) +++ llvm/trunk/test/CodeGen/X86/vec_ss_load_fold.ll Wed Aug 15 08:36:28 2007 @@ -1,5 +1,5 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse,+sse2 -o %t -f -; RUN: grep minss %t | grep CPI | wc -l | grep 2 +; RUN: grep minss %t | grep CPI | count 2 ; RUN: grep CPI %t | not grep movss target endian = little Modified: llvm/trunk/test/CodeGen/X86/vec_zero.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_zero.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/vec_zero.ll (original) +++ llvm/trunk/test/CodeGen/X86/vec_zero.ll Wed Aug 15 08:36:28 2007 @@ -1,4 +1,4 @@ -; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 | grep xorps | wc -l | grep 2 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 | grep xorps | count 2 void %foo(<4 x float> *%P) { %T = load <4 x float> * %P Modified: llvm/trunk/test/CodeGen/X86/x86-64-mem.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/x86-64-mem.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/x86-64-mem.ll (original) +++ llvm/trunk/test/CodeGen/X86/x86-64-mem.ll Wed Aug 15 08:36:28 2007 @@ -1,13 +1,13 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=x86_64-apple-darwin -o %t1 -f -; RUN: grep GOTPCREL %t1 | wc -l | grep 4 -; RUN: grep rip %t1 | wc -l | grep 6 -; RUN: grep movq %t1 | wc -l | grep 6 -; RUN: grep leaq %t1 | wc -l | grep 1 +; RUN: grep GOTPCREL %t1 | count 4 +; RUN: grep rip %t1 | count 6 +; RUN: grep movq %t1 | count 6 +; RUN: grep leaq %t1 | count 1 ; RUN: llvm-upgrade < %s | llvm-as | \ ; RUN: llc -mtriple=x86_64-pc-linux -relocation-model=static -o %t2 -f -; RUN: grep rip %t2 | wc -l | grep 4 -; RUN: grep movl %t2 | wc -l | grep 2 -; RUN: grep movq %t2 | wc -l | grep 2 +; RUN: grep rip %t2 | count 4 +; RUN: grep movl %t2 | count 2 +; RUN: grep movq %t2 | count 2 %ptr = external global int* %src = external global [0 x int] Modified: llvm/trunk/test/Other/2004-08-16-LowerPacked.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Other/2004-08-16-LowerPacked.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/Other/2004-08-16-LowerPacked.ll (original) +++ llvm/trunk/test/Other/2004-08-16-LowerPacked.ll Wed Aug 15 08:36:28 2007 @@ -17,4 +17,4 @@ %c2 = select bool true, <2 x int> , <2 x int> %t0 store <2 x int> , <2 x int>* %foo ret void -} \ No newline at end of file +} Modified: llvm/trunk/test/Other/2004-08-16-PackedGlobalConstant.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Other/2004-08-16-PackedGlobalConstant.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/Other/2004-08-16-PackedGlobalConstant.ll (original) +++ llvm/trunk/test/Other/2004-08-16-PackedGlobalConstant.ll Wed Aug 15 08:36:28 2007 @@ -10,4 +10,4 @@ %t0 = load <2 x int>* %foo; store <2 x int> %t0, <2 x int>* %bar ret void -} \ No newline at end of file +} Modified: llvm/trunk/test/Other/2004-08-16-PackedSelect.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Other/2004-08-16-PackedSelect.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/Other/2004-08-16-PackedSelect.ll (original) +++ llvm/trunk/test/Other/2004-08-16-PackedSelect.ll Wed Aug 15 08:36:28 2007 @@ -12,4 +12,4 @@ %t2 = select bool true, <4 x float> %t0, <4 x float> %t1 store <4 x float> %t2, <4 x float>* %bar ret void -} \ No newline at end of file +} Modified: llvm/trunk/test/Other/2004-08-16-PackedSimple.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Other/2004-08-16-PackedSimple.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/Other/2004-08-16-PackedSimple.ll (original) +++ llvm/trunk/test/Other/2004-08-16-PackedSimple.ll Wed Aug 15 08:36:28 2007 @@ -12,4 +12,4 @@ %t3 = select bool false, <4 x float> %t0, <4 x float> %t2 store <4 x float> %t3, <4 x float>* %bar ret void -} \ No newline at end of file +} Modified: llvm/trunk/test/TableGen/MultiClass.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/TableGen/MultiClass.td?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/TableGen/MultiClass.td (original) +++ llvm/trunk/test/TableGen/MultiClass.td Wed Aug 15 08:36:28 2007 @@ -1,4 +1,4 @@ -// RUN: tblgen %s | grep {zing = 4} | wc -l | grep 2 +// RUN: tblgen %s | grep {zing = 4} | count 2 class C1 { int bar = A; Modified: llvm/trunk/test/Transforms/ConstProp/float-to-ptr-cast.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/ConstProp/float-to-ptr-cast.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/Transforms/ConstProp/float-to-ptr-cast.ll (original) +++ llvm/trunk/test/Transforms/ConstProp/float-to-ptr-cast.ll Wed Aug 15 08:36:28 2007 @@ -1,5 +1,5 @@ ; RUN: llvm-upgrade < %s | llvm-as | opt -constprop | llvm-dis | \ -; RUN: grep -F {ret i32* null} | wc -l | grep 2 +; RUN: grep -F {ret i32* null} | count 2 int* %test1() { %X = cast float 0.0 to int* Modified: llvm/trunk/test/Transforms/GVN/basic.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/basic.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/Transforms/GVN/basic.ll (original) +++ llvm/trunk/test/Transforms/GVN/basic.ll Wed Aug 15 08:36:28 2007 @@ -7,4 +7,4 @@ block2: %z2 = bitcast i32 0 to i32 ret i32 %z2 -} \ No newline at end of file +} Modified: llvm/trunk/test/Transforms/GVN/dominated.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/dominated.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/Transforms/GVN/dominated.ll (original) +++ llvm/trunk/test/Transforms/GVN/dominated.ll Wed Aug 15 08:36:28 2007 @@ -17,4 +17,4 @@ %DEAD = load i32** %p %c = load i32* %DEAD ret i32 %c -} \ No newline at end of file +} Modified: llvm/trunk/test/Transforms/GVN/mixed.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/mixed.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/Transforms/GVN/mixed.ll (original) +++ llvm/trunk/test/Transforms/GVN/mixed.ll Wed Aug 15 08:36:28 2007 @@ -10,4 +10,4 @@ %DEADGEP = getelementptr i32* %DEADLOAD, i32 0 %DEADLOAD2 = load i32* %DEADGEP ret i32 %DEADLOAD2 -} \ No newline at end of file +} Modified: llvm/trunk/test/Transforms/GVN/nonlocal.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/nonlocal.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/Transforms/GVN/nonlocal.ll (original) +++ llvm/trunk/test/Transforms/GVN/nonlocal.ll Wed Aug 15 08:36:28 2007 @@ -16,4 +16,4 @@ %DEAD = load i32** %p %c = load i32* %DEAD ret i32 %c -} \ No newline at end of file +} Modified: llvm/trunk/test/Transforms/GVN/semidominated.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/semidominated.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/Transforms/GVN/semidominated.ll (original) +++ llvm/trunk/test/Transforms/GVN/semidominated.ll Wed Aug 15 08:36:28 2007 @@ -16,4 +16,4 @@ block4: %DEAD = load i32* %p ret i32 %DEAD -} \ No newline at end of file +} Modified: llvm/trunk/test/Transforms/IndVarsSimplify/complex-scev.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/IndVarsSimplify/complex-scev.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/Transforms/IndVarsSimplify/complex-scev.ll (original) +++ llvm/trunk/test/Transforms/IndVarsSimplify/complex-scev.ll Wed Aug 15 08:36:28 2007 @@ -1,7 +1,7 @@ ; The i induction variable looks like a wrap-around, but it really is just ; a simple affine IV. Make sure that indvars eliminates it. -; RUN: llvm-upgrade < %s | llvm-as | opt -indvars | llvm-dis | grep phi | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | opt -indvars | llvm-dis | grep phi | count 1 void %foo() { entry: Modified: llvm/trunk/test/Transforms/InstCombine/2006-10-26-VectorReassoc.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/2006-10-26-VectorReassoc.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/2006-10-26-VectorReassoc.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/2006-10-26-VectorReassoc.ll Wed Aug 15 08:36:28 2007 @@ -1,5 +1,5 @@ ; RUN: llvm-upgrade < %s | llvm-as | opt -instcombine | llvm-dis | \ -; RUN: grep mul | wc -l | grep 2 +; RUN: grep mul | count 2 <4 x float> %test(<4 x float> %V) { Modified: llvm/trunk/test/Transforms/InstCombine/2006-12-15-Range-Test.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/2006-12-15-Range-Test.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/2006-12-15-Range-Test.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/2006-12-15-Range-Test.ll Wed Aug 15 08:36:28 2007 @@ -1,7 +1,7 @@ ; RUN: llvm-upgrade < %s | llvm-as | opt -instcombine | llvm-dis | \ -; RUN: grep icmp | wc -l | grep 1 +; RUN: grep icmp | count 1 ; RUN: llvm-upgrade < %s | llvm-as | opt -instcombine | llvm-dis | \ -; RUN: grep {icmp ugt} | wc -l | grep 1 +; RUN: grep {icmp ugt} | count 1 ; END. ; ModuleID = 'bugpoint-tooptimize.bc' Modified: llvm/trunk/test/Transforms/InstCombine/and-compare.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/and-compare.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/and-compare.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/and-compare.ll Wed Aug 15 08:36:28 2007 @@ -1,5 +1,5 @@ ; RUN: llvm-upgrade < %s | llvm-as | opt -instcombine | llvm-dis | \ -; RUN: grep and | wc -l | grep 1 +; RUN: grep and | count 1 ; Should be optimized to one and. bool %test1(uint %a, uint %b) { Modified: llvm/trunk/test/Transforms/InstCombine/and-or-not.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/and-or-not.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/and-or-not.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/and-or-not.ll Wed Aug 15 08:36:28 2007 @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep xor | wc -l | grep 4 +; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep xor | count 4 ; RUN: llvm-as < %s | opt -instcombine | llvm-dis | not grep and ; RUN: llvm-as < %s | opt -instcombine | llvm-dis | not grep { or} Modified: llvm/trunk/test/Transforms/InstCombine/and-xor-merge.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/and-xor-merge.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/and-xor-merge.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/and-xor-merge.ll Wed Aug 15 08:36:28 2007 @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep and | wc -l | grep 1 -; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep xor | wc -l | grep 2 +; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep and | count 1 +; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep xor | count 2 ; (x&z) ^ (y&z) -> (x^y)&z define i32 @test1(i32 %x, i32 %y, i32 %z) { Modified: llvm/trunk/test/Transforms/InstCombine/apint-and-compare.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/apint-and-compare.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/apint-and-compare.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/apint-and-compare.ll Wed Aug 15 08:36:28 2007 @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep and | wc -l | grep 2 +; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep and | count 2 ; Should be optimized to one and. define i1 @test1(i33 %a, i33 %b) { Modified: llvm/trunk/test/Transforms/InstCombine/apint-and-xor-merge.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/apint-and-xor-merge.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/apint-and-xor-merge.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/apint-and-xor-merge.ll Wed Aug 15 08:36:28 2007 @@ -1,8 +1,8 @@ ; This test case checks that the merge of and/xor can work on arbitrary ; precision integers. -; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep and | wc -l | grep 1 -; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep xor | wc -l | grep 2 +; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep and | count 1 +; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep xor | count 2 ; (x &z ) ^ (y & z) -> (x ^ y) & z define i57 @test1(i57 %x, i57 %y, i57 %z) { Modified: llvm/trunk/test/Transforms/InstCombine/apint-shift-simplify.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/apint-shift-simplify.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/apint-shift-simplify.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/apint-shift-simplify.ll Wed Aug 15 08:36:28 2007 @@ -1,5 +1,5 @@ ; RUN: llvm-as < %s | opt -instcombine | llvm-dis | \ -; RUN: egrep {shl|lshr|ashr} | wc -l | grep 3 +; RUN: egrep {shl|lshr|ashr} | count 3 define i41 @test0(i41 %A, i41 %B, i41 %C) { %X = shl i41 %A, %C Modified: llvm/trunk/test/Transforms/InstCombine/bswap-fold.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/bswap-fold.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/bswap-fold.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/bswap-fold.ll Wed Aug 15 08:36:28 2007 @@ -1,5 +1,5 @@ ; RUN: llvm-upgrade < %s | llvm-as | opt -instcombine | llvm-dis | \ -; RUN: grep ret | wc -l | grep 3 +; RUN: grep ret | count 3 ; RUN: llvm-upgrade < %s | llvm-as | opt -instcombine | llvm-dis | \ ; RUN: not grep call.*bswap Modified: llvm/trunk/test/Transforms/InstCombine/bswap.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/bswap.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/bswap.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/bswap.ll Wed Aug 15 08:36:28 2007 @@ -1,5 +1,5 @@ ; RUN: llvm-upgrade < %s | llvm-as | opt -instcombine | llvm-dis | \ -; RUN: grep {call.*llvm.bswap} | wc -l | grep 5 +; RUN: grep {call.*llvm.bswap} | count 5 ; END. uint %test1(uint %i) { Modified: llvm/trunk/test/Transforms/InstCombine/loadstore-alignment.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/loadstore-alignment.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/loadstore-alignment.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/loadstore-alignment.ll Wed Aug 15 08:36:28 2007 @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep {, align 16} | wc -l | grep 12 +; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep {, align 16} | count 12 @x = external global <2 x i64>, align 16 @xx = external global [13 x <2 x i64>], align 16 Modified: llvm/trunk/test/Transforms/InstCombine/shift-simplify.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/shift-simplify.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/shift-simplify.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/shift-simplify.ll Wed Aug 15 08:36:28 2007 @@ -1,5 +1,5 @@ ; RUN: llvm-as < %s | opt -instcombine | llvm-dis | \ -; RUN: egrep {shl|lshr|ashr} | wc -l | grep 3 +; RUN: egrep {shl|lshr|ashr} | count 3 define i32 @test0(i32 %A, i32 %B, i32 %C) { %X = shl i32 %A, %C Modified: llvm/trunk/test/Transforms/InstCombine/shift-sra.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/shift-sra.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/shift-sra.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/shift-sra.ll Wed Aug 15 08:36:28 2007 @@ -1,5 +1,5 @@ ; RUN: llvm-upgrade < %s | llvm-as | opt -instcombine | llvm-dis | \ -; RUN: grep {lshr i32} | wc -l | grep 2 +; RUN: grep {lshr i32} | count 2 ; RUN: llvm-upgrade < %s | llvm-as | opt -instcombine | llvm-dis | not grep ashr int %test1(int %X, ubyte %A) { Modified: llvm/trunk/test/Transforms/InstCombine/store-merge.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/store-merge.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/store-merge.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/store-merge.ll Wed Aug 15 08:36:28 2007 @@ -1,5 +1,5 @@ ; RUN: llvm-as < %s | opt -instcombine | llvm-dis | \ -; RUN: grep {ret i32 %.toremerge} | wc -l | grep 2 +; RUN: grep {ret i32 %.toremerge} | count 2 ;; Simple sinking tests ; "if then else" Modified: llvm/trunk/test/Transforms/InstCombine/udiv_select_to_select_shift.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/udiv_select_to_select_shift.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/udiv_select_to_select_shift.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/udiv_select_to_select_shift.ll Wed Aug 15 08:36:28 2007 @@ -2,9 +2,9 @@ ; udiv X, (Select Cond, C1, C2) --> Select Cond, (shr X, C1), (shr X, C2) ; ; RUN: llvm-as < %s | opt -instcombine | llvm-dis -f -o %t -; RUN: grep select %t | wc -l | grep 1 -; RUN: grep lshr %t | wc -l | grep 2 -; RUN: ignore grep udiv %t | wc -l | grep 0 +; RUN: grep select %t | count 1 +; RUN: grep lshr %t | count 2 +; RUN: ignore grep udiv %t | count 0 define i64 @test(i64 %X, i1 %Cond ) { entry: Modified: llvm/trunk/test/Transforms/InstCombine/vec_insert_to_shuffle.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/vec_insert_to_shuffle.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/vec_insert_to_shuffle.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/vec_insert_to_shuffle.ll Wed Aug 15 08:36:28 2007 @@ -1,5 +1,5 @@ ; RUN: llvm-upgrade < %s | llvm-as | opt -instcombine | llvm-dis | \ -; RUN: grep shufflevec | wc -l | grep 1 +; RUN: grep shufflevec | count 1 ; RUN: llvm-upgrade < %s | llvm-as | opt -instcombine | llvm-dis | \ ; RUN: not grep insertelement ; RUN: llvm-upgrade < %s | llvm-as | opt -instcombine | llvm-dis | \ Modified: llvm/trunk/test/Transforms/InstCombine/zext-fold.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/zext-fold.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/zext-fold.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/zext-fold.ll Wed Aug 15 08:36:28 2007 @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep {zext } | wc -l | grep 1 +; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep {zext } | count 1 ; PR1570 ; XFAIL: * Modified: llvm/trunk/test/Transforms/LoopSimplify/phi-node-simplify.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopSimplify/phi-node-simplify.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/Transforms/LoopSimplify/phi-node-simplify.ll (original) +++ llvm/trunk/test/Transforms/LoopSimplify/phi-node-simplify.ll Wed Aug 15 08:36:28 2007 @@ -1,5 +1,5 @@ ; Loop Simplify should turn phi nodes like X = phi [X, Y] into just Y, eliminating them. -; RUN: llvm-upgrade < %s | llvm-as | opt -loopsimplify | llvm-dis | grep phi | wc -l | grep 6 +; RUN: llvm-upgrade < %s | llvm-as | opt -loopsimplify | llvm-dis | grep phi | count 6 %A = weak global [3000000 x int] zeroinitializer ; <[3000000 x int]*> [#uses=1] %B = weak global [20000 x int] zeroinitializer ; <[20000 x int]*> [#uses=1] Modified: llvm/trunk/test/Transforms/LoopStrengthReduce/dont_insert_redundant_ops.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/dont_insert_redundant_ops.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/Transforms/LoopStrengthReduce/dont_insert_redundant_ops.ll (original) +++ llvm/trunk/test/Transforms/LoopStrengthReduce/dont_insert_redundant_ops.ll Wed Aug 15 08:36:28 2007 @@ -1,5 +1,5 @@ ; Check that this test makes INDVAR and related stuff dead. -; RUN: llvm-upgrade < %s | llvm-as | opt -loop-reduce | llvm-dis | grep phi | wc -l | grep 2 +; RUN: llvm-upgrade < %s | llvm-as | opt -loop-reduce | llvm-dis | grep phi | count 2 declare bool %pred() Modified: llvm/trunk/test/Transforms/LoopStrengthReduce/related_indvars.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/related_indvars.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/Transforms/LoopStrengthReduce/related_indvars.ll (original) +++ llvm/trunk/test/Transforms/LoopStrengthReduce/related_indvars.ll Wed Aug 15 08:36:28 2007 @@ -1,4 +1,4 @@ -; RUN: llvm-upgrade < %s | llvm-as | opt -loop-reduce | llvm-dis | grep phi | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | opt -loop-reduce | llvm-dis | grep phi | count 1 ; This should only result in one PHI node! Modified: llvm/trunk/test/Transforms/LoopStrengthReduce/share_code_in_preheader.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/share_code_in_preheader.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/Transforms/LoopStrengthReduce/share_code_in_preheader.ll (original) +++ llvm/trunk/test/Transforms/LoopStrengthReduce/share_code_in_preheader.ll Wed Aug 15 08:36:28 2007 @@ -1,4 +1,4 @@ -; RUN: llvm-upgrade < %s | llvm-as | opt -loop-reduce | llvm-dis | grep mul | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | opt -loop-reduce | llvm-dis | grep mul | count 1 ; LSR should not make two copies of the Q*L expression in the preheader! sbyte %test(sbyte* %A, sbyte* %B, int %L, int %Q, int %N.s) { Modified: llvm/trunk/test/Transforms/LoopStrengthReduce/share_ivs.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/share_ivs.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/Transforms/LoopStrengthReduce/share_ivs.ll (original) +++ llvm/trunk/test/Transforms/LoopStrengthReduce/share_ivs.ll Wed Aug 15 08:36:28 2007 @@ -1,4 +1,4 @@ -; RUN: llvm-upgrade < %s | llvm-as | opt -loop-reduce | llvm-dis | grep phi | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | opt -loop-reduce | llvm-dis | grep phi | count 1 ; This testcase should have ONE stride 18 indvar, the other use should have a ; loop invariant value (B) added to it inside of the loop, instead of having Modified: llvm/trunk/test/Transforms/LoopUnswitch/2007-07-18-DomInfo.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopUnswitch/2007-07-18-DomInfo.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/Transforms/LoopUnswitch/2007-07-18-DomInfo.ll (original) +++ llvm/trunk/test/Transforms/LoopUnswitch/2007-07-18-DomInfo.ll Wed Aug 15 08:36:28 2007 @@ -63,4 +63,4 @@ normal_char: ; preds = %bb147 ret i32 0 -} \ No newline at end of file +} Modified: llvm/trunk/test/Transforms/LowerSwitch/feature.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LowerSwitch/feature.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/Transforms/LowerSwitch/feature.ll (original) +++ llvm/trunk/test/Transforms/LowerSwitch/feature.ll Wed Aug 15 08:36:28 2007 @@ -1,7 +1,7 @@ ; RUN: llvm-as %s -o - | opt -lowerswitch | llvm-dis > %t -; RUN: grep slt %t | wc -l | grep 10 -; RUN: grep ule %t | wc -l | grep 3 -; RUN: grep eq %t | wc -l | grep 9 +; RUN: grep slt %t | count 10 +; RUN: grep ule %t | count 3 +; RUN: grep eq %t | count 9 define i32 @main(i32 %tmp158) { entry: Modified: llvm/trunk/test/Transforms/Reassociate/basictest3.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/Reassociate/basictest3.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/Transforms/Reassociate/basictest3.ll (original) +++ llvm/trunk/test/Transforms/Reassociate/basictest3.ll Wed Aug 15 08:36:28 2007 @@ -1,4 +1,4 @@ -; RUN: llvm-upgrade < %s | llvm-as | opt -reassociate -gcse | llvm-dis | grep add | wc -l | grep 6 +; RUN: llvm-upgrade < %s | llvm-as | opt -reassociate -gcse | llvm-dis | grep add | count 6 ; Each of these functions should turn into two adds each. %e = external global int Modified: llvm/trunk/test/Transforms/Reassociate/mul-factor3.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/Reassociate/mul-factor3.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/Transforms/Reassociate/mul-factor3.ll (original) +++ llvm/trunk/test/Transforms/Reassociate/mul-factor3.ll Wed Aug 15 08:36:28 2007 @@ -2,8 +2,8 @@ ; RUN: llvm-upgrade < %s | llvm-as | \ ; RUN: opt -reassociate -instcombine | llvm-dis > %t -; RUN: grep mul %t | wc -l | grep 2 -; RUN: grep add %t | wc -l | grep 1 +; RUN: grep mul %t | count 2 +; RUN: grep add %t | count 1 int %test(int %A, int %B, int %C) { %aa = mul int %A, %A Modified: llvm/trunk/test/Transforms/Reassociate/mulfactor.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/Reassociate/mulfactor.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/Transforms/Reassociate/mulfactor.ll (original) +++ llvm/trunk/test/Transforms/Reassociate/mulfactor.ll Wed Aug 15 08:36:28 2007 @@ -1,4 +1,4 @@ -; RUN: llvm-upgrade < %s | llvm-as | opt -reassociate -instcombine | llvm-dis | grep mul | wc -l | grep 2 +; RUN: llvm-upgrade < %s | llvm-as | opt -reassociate -instcombine | llvm-dis | grep mul | count 2 ; This should have exactly 2 multiplies when we're done. Modified: llvm/trunk/test/Transforms/Reassociate/mulfactor2.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/Reassociate/mulfactor2.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/Transforms/Reassociate/mulfactor2.ll (original) +++ llvm/trunk/test/Transforms/Reassociate/mulfactor2.ll Wed Aug 15 08:36:28 2007 @@ -2,8 +2,8 @@ ; RUN: llvm-upgrade < %s | llvm-as | \ ; RUN: opt -instcombine -reassociate -instcombine | llvm-dis -o %t -; RUN: grep mul %t | wc -l | grep 1 -; RUN: grep add %t | wc -l | grep 1 +; RUN: grep mul %t | count 1 +; RUN: grep add %t | count 1 int %main(int %t) { %tmp.3 = mul int %t, 12 ; [#uses=1] Modified: llvm/trunk/test/Transforms/Reassociate/shift-factor.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/Reassociate/shift-factor.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/Transforms/Reassociate/shift-factor.ll (original) +++ llvm/trunk/test/Transforms/Reassociate/shift-factor.ll Wed Aug 15 08:36:28 2007 @@ -1,8 +1,8 @@ ; There should be exactly one shift and one add left. ; RUN: llvm-upgrade < %s | llvm-as | \ ; RUN: opt -reassociate -instcombine | llvm-dis > %t -; RUN: grep shl %t | wc -l | grep 1 -; RUN: grep add %t | wc -l | grep 1 +; RUN: grep shl %t | count 1 +; RUN: grep add %t | count 1 int %test(int %X, int %Y) { %tmp.2 = shl int %X, ubyte 1 ; [#uses=1] Modified: llvm/trunk/test/Transforms/SimplifyCFG/branch-fold.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/SimplifyCFG/branch-fold.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/Transforms/SimplifyCFG/branch-fold.ll (original) +++ llvm/trunk/test/Transforms/SimplifyCFG/branch-fold.ll Wed Aug 15 08:36:28 2007 @@ -1,4 +1,4 @@ -; RUN: llvm-upgrade < %s | llvm-as | opt -simplifycfg | llvm-dis | grep {br i1} | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | opt -simplifycfg | llvm-dis | grep {br i1} | count 1 void %test(int* %P, int* %Q, bool %A, bool %B) { br bool %A, label %a, label %b ;; fold the two branches into one Modified: llvm/trunk/test/Transforms/SimplifyCFG/switch_switch_fold.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/SimplifyCFG/switch_switch_fold.ll?rev=41097&r1=41096&r2=41097&view=diff ============================================================================== --- llvm/trunk/test/Transforms/SimplifyCFG/switch_switch_fold.ll (original) +++ llvm/trunk/test/Transforms/SimplifyCFG/switch_switch_fold.ll Wed Aug 15 08:36:28 2007 @@ -1,5 +1,5 @@ ; RUN: llvm-upgrade < %s | llvm-as | opt -simplifycfg | llvm-dis | \ -; RUN: grep switch | wc -l | grep 1 +; RUN: grep switch | count 1 ; Test that a switch going to a switch on the same value can be merged. All ; three switches in this example can be merged into one big one. From djg at cray.com Wed Aug 15 08:42:36 2007 From: djg at cray.com (Dan Gohman) Date: Wed, 15 Aug 2007 13:42:36 -0000 Subject: [llvm-commits] [llvm] r41098 - /llvm/trunk/test/CodeGen/X86/trunc-to-bool.ll Message-ID: <200708151342.l7FDga0w019423@zion.cs.uiuc.edu> Author: djg Date: Wed Aug 15 08:42:36 2007 New Revision: 41098 URL: http://llvm.org/viewvc/llvm-project?rev=41098&view=rev Log: Convert another test to use the count script. This one didn't fit the regex used to convert all the others because the first '|' was on a separate line. Modified: llvm/trunk/test/CodeGen/X86/trunc-to-bool.ll Modified: llvm/trunk/test/CodeGen/X86/trunc-to-bool.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/trunc-to-bool.ll?rev=41098&r1=41097&r2=41098&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/trunc-to-bool.ll (original) +++ llvm/trunk/test/CodeGen/X86/trunc-to-bool.ll Wed Aug 15 08:42:36 2007 @@ -2,7 +2,7 @@ ; sure only the LSBit survives. Test that this is the case both for a returned ; value and as the operand of a branch. ; RUN: llvm-as < %s | llc -march=x86 | grep {\\(and\\)\\|\\(test.*\\\$1\\)} | \ -; RUN: wc -l | grep 6 +; RUN: count 6 define i1 @test1(i32 %X) zeroext { %Y = trunc i32 %X to i1 From djg at cray.com Wed Aug 15 08:45:35 2007 From: djg at cray.com (Dan Gohman) Date: Wed, 15 Aug 2007 13:45:35 -0000 Subject: [llvm-commits] [llvm] r41099 - in /llvm/trunk/test/CodeGen/X86: 2006-05-08-CoalesceSubRegClass.ll test-pic-1.ll Message-ID: <200708151345.l7FDjZYb019525@zion.cs.uiuc.edu> Author: djg Date: Wed Aug 15 08:45:35 2007 New Revision: 41099 URL: http://llvm.org/viewvc/llvm-project?rev=41099&view=rev Log: Delete extraneous uses of wc -l. Modified: llvm/trunk/test/CodeGen/X86/2006-05-08-CoalesceSubRegClass.ll llvm/trunk/test/CodeGen/X86/test-pic-1.ll Modified: llvm/trunk/test/CodeGen/X86/2006-05-08-CoalesceSubRegClass.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2006-05-08-CoalesceSubRegClass.ll?rev=41099&r1=41098&r2=41099&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/2006-05-08-CoalesceSubRegClass.ll (original) +++ llvm/trunk/test/CodeGen/X86/2006-05-08-CoalesceSubRegClass.ll Wed Aug 15 08:45:35 2007 @@ -2,7 +2,7 @@ ; fixed, the movb should go away as well. ; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -relocation-model=static | \ -; RUN: grep movl | wc -l +; RUN: grep movl %B = external global uint %C = external global ushort* Modified: llvm/trunk/test/CodeGen/X86/test-pic-1.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/test-pic-1.ll?rev=41099&r1=41098&r2=41099&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/test-pic-1.ll (original) +++ llvm/trunk/test/CodeGen/X86/test-pic-1.ll Wed Aug 15 08:45:35 2007 @@ -3,7 +3,7 @@ ; RUN: grep _GLOBAL_OFFSET_TABLE_ %t ; RUN: grep piclabel %t | count 3 ; RUN: grep GOT %t | count 3 -; RUN: not grep GOTOFF %t | wc -l +; RUN: not grep GOTOFF %t @ptr = external global i32* @dst = external global i32 From djg at cray.com Wed Aug 15 08:49:33 2007 From: djg at cray.com (Dan Gohman) Date: Wed, 15 Aug 2007 13:49:33 -0000 Subject: [llvm-commits] [llvm] r41100 - in /llvm/trunk/test: CFrontend/2007-06-15-AnnotateAttribute.c CFrontend/2007-08-01-LoadStoreAlign.c CodeGen/ARM/aliases.ll CodeGen/ARM/unaligned_load_store.ll CodeGen/Generic/2007-04-27-BitTestsBadMask.ll CodeGen/X86/aliases.ll Transforms/PredicateSimplifier/2006-10-22-IntOr.ll Transforms/PredicateSimplifier/2006-10-25-AddSetCC.ll Transforms/PredicateSimplifier/predsimplify.ll Transforms/SimplifyLibCalls/ExitInMain.ll Message-ID: <200708151349.l7FDnY4M019639@zion.cs.uiuc.edu> Author: djg Date: Wed Aug 15 08:49:33 2007 New Revision: 41100 URL: http://llvm.org/viewvc/llvm-project?rev=41100&view=rev Log: Convert tests using "grep -c ... | grep ..." to use the count script. Modified: llvm/trunk/test/CFrontend/2007-06-15-AnnotateAttribute.c llvm/trunk/test/CFrontend/2007-08-01-LoadStoreAlign.c llvm/trunk/test/CodeGen/ARM/aliases.ll llvm/trunk/test/CodeGen/ARM/unaligned_load_store.ll llvm/trunk/test/CodeGen/Generic/2007-04-27-BitTestsBadMask.ll llvm/trunk/test/CodeGen/X86/aliases.ll llvm/trunk/test/Transforms/PredicateSimplifier/2006-10-22-IntOr.ll llvm/trunk/test/Transforms/PredicateSimplifier/2006-10-25-AddSetCC.ll llvm/trunk/test/Transforms/PredicateSimplifier/predsimplify.ll llvm/trunk/test/Transforms/SimplifyLibCalls/ExitInMain.ll Modified: llvm/trunk/test/CFrontend/2007-06-15-AnnotateAttribute.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CFrontend/2007-06-15-AnnotateAttribute.c?rev=41100&r1=41099&r2=41100&view=diff ============================================================================== --- llvm/trunk/test/CFrontend/2007-06-15-AnnotateAttribute.c (original) +++ llvm/trunk/test/CFrontend/2007-06-15-AnnotateAttribute.c Wed Aug 15 08:49:33 2007 @@ -1,5 +1,5 @@ // RUN: %llvmgxx -c -emit-llvm %s -o - | llvm-dis | grep llvm.global.annotations -// RUN: %llvmgxx -c -emit-llvm %s -o - | llvm-dis | grep -c llvm.var.annotation | grep 3 +// RUN: %llvmgxx -c -emit-llvm %s -o - | llvm-dis | grep llvm.var.annotation | count 3 #include Modified: llvm/trunk/test/CFrontend/2007-08-01-LoadStoreAlign.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CFrontend/2007-08-01-LoadStoreAlign.c?rev=41100&r1=41099&r2=41100&view=diff ============================================================================== --- llvm/trunk/test/CFrontend/2007-08-01-LoadStoreAlign.c (original) +++ llvm/trunk/test/CFrontend/2007-08-01-LoadStoreAlign.c Wed Aug 15 08:49:33 2007 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -O3 -S -o - -emit-llvm %s | grep -c {align 1} | grep 2 +// RUN: %llvmgcc -O3 -S -o - -emit-llvm %s | grep {align 1} | count 2 // RUN: %llvmgcc -O3 -S -o - -emit-llvm %s | llvm-as | llc struct p { Modified: llvm/trunk/test/CodeGen/ARM/aliases.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/aliases.ll?rev=41100&r1=41099&r2=41100&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/aliases.ll (original) +++ llvm/trunk/test/CodeGen/ARM/aliases.ll Wed Aug 15 08:49:33 2007 @@ -1,8 +1,8 @@ ; RUN: llvm-as < %s | \ ; RUN: llc -mtriple=arm-linux-gnueabi -o %t -f -; RUN: grep -c set %t | grep 5 -; RUN: grep -c globl %t | grep 4 -; RUN: grep -c weak %t | grep 1 +; RUN: grep set %t | count 5 +; RUN: grep globl %t | count 4 +; RUN: grep weak %t | count 1 @bar = external global i32 @foo1 = alias i32* @bar Modified: llvm/trunk/test/CodeGen/ARM/unaligned_load_store.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/unaligned_load_store.ll?rev=41100&r1=41099&r2=41100&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/unaligned_load_store.ll (original) +++ llvm/trunk/test/CodeGen/ARM/unaligned_load_store.ll Wed Aug 15 08:49:33 2007 @@ -1,7 +1,7 @@ ; RUN: llvm-as < %s | \ ; RUN: llc -march=arm -o %t -f -; RUN: grep -c ldrb %t | grep 4 -; RUN: grep -c strb %t | grep 4 +; RUN: grep ldrb %t | count 4 +; RUN: grep strb %t | count 4 %struct.p = type <{ i8, i32 }> Modified: llvm/trunk/test/CodeGen/Generic/2007-04-27-BitTestsBadMask.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Generic/2007-04-27-BitTestsBadMask.ll?rev=41100&r1=41099&r2=41100&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/Generic/2007-04-27-BitTestsBadMask.ll (original) +++ llvm/trunk/test/CodeGen/Generic/2007-04-27-BitTestsBadMask.ll Wed Aug 15 08:49:33 2007 @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep -c je | grep 3 +; RUN: llvm-as < %s | llc -march=x86 | grep je | count 3 ; RUN: llvm-as < %s | llc -march=x86-64 | grep 4297064449 ; PR 1325+ Modified: llvm/trunk/test/CodeGen/X86/aliases.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/aliases.ll?rev=41100&r1=41099&r2=41100&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/aliases.ll (original) +++ llvm/trunk/test/CodeGen/X86/aliases.ll Wed Aug 15 08:49:33 2007 @@ -1,8 +1,8 @@ ; RUN: llvm-as < %s | \ ; RUN: llc -mtriple=i686-pc-linux-gnu -o %t -f -; RUN: grep -c set %t | grep 5 -; RUN: grep -c globl %t | grep 4 -; RUN: grep -c weak %t | grep 1 +; RUN: grep set %t | count 5 +; RUN: grep globl %t | count 4 +; RUN: grep weak %t | count 1 @bar = external global i32 @foo1 = alias i32* @bar Modified: llvm/trunk/test/Transforms/PredicateSimplifier/2006-10-22-IntOr.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/PredicateSimplifier/2006-10-22-IntOr.ll?rev=41100&r1=41099&r2=41100&view=diff ============================================================================== --- llvm/trunk/test/Transforms/PredicateSimplifier/2006-10-22-IntOr.ll (original) +++ llvm/trunk/test/Transforms/PredicateSimplifier/2006-10-22-IntOr.ll Wed Aug 15 08:49:33 2007 @@ -1,7 +1,7 @@ ; RUN: llvm-upgrade < %s | llvm-as | \ ; RUN: opt -predsimplify -instcombine -simplifycfg | llvm-dis > %t ; RUN: grep -v declare %t | not grep fail -; RUN: grep -v declare %t | grep -c pass | grep 3 +; RUN: grep -v declare %t | grep pass | count 3 int %test1(int %x, int %y) { entry: Modified: llvm/trunk/test/Transforms/PredicateSimplifier/2006-10-25-AddSetCC.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/PredicateSimplifier/2006-10-25-AddSetCC.ll?rev=41100&r1=41099&r2=41100&view=diff ============================================================================== --- llvm/trunk/test/Transforms/PredicateSimplifier/2006-10-25-AddSetCC.ll (original) +++ llvm/trunk/test/Transforms/PredicateSimplifier/2006-10-25-AddSetCC.ll Wed Aug 15 08:49:33 2007 @@ -1,6 +1,6 @@ ; RUN: llvm-upgrade < %s | llvm-as | \ ; RUN: opt -predsimplify -instcombine -simplifycfg | llvm-dis | \ -; RUN: grep -v declare | grep -c pass | grep 2 +; RUN: grep -v declare | grep pass | count 2 int %test(int %x, int %y) { entry: Modified: llvm/trunk/test/Transforms/PredicateSimplifier/predsimplify.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/PredicateSimplifier/predsimplify.ll?rev=41100&r1=41099&r2=41100&view=diff ============================================================================== --- llvm/trunk/test/Transforms/PredicateSimplifier/predsimplify.ll (original) +++ llvm/trunk/test/Transforms/PredicateSimplifier/predsimplify.ll Wed Aug 15 08:49:33 2007 @@ -1,7 +1,7 @@ ; RUN: llvm-upgrade < %s | llvm-as | \ ; RUN: opt -predsimplify -instcombine -simplifycfg | llvm-dis > %t ; RUN: grep -v declare %t | not grep fail -; RUN: grep -v declare %t | grep -c pass | grep 4 +; RUN: grep -v declare %t | grep pass | count 4 void %test1(int %x) { entry: Modified: llvm/trunk/test/Transforms/SimplifyLibCalls/ExitInMain.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/SimplifyLibCalls/ExitInMain.ll?rev=41100&r1=41099&r2=41100&view=diff ============================================================================== --- llvm/trunk/test/Transforms/SimplifyLibCalls/ExitInMain.ll (original) +++ llvm/trunk/test/Transforms/SimplifyLibCalls/ExitInMain.ll Wed Aug 15 08:49:33 2007 @@ -1,6 +1,6 @@ ; Test that the ExitInMainOptimization pass works correctly ; RUN: llvm-upgrade < %s | llvm-as | opt -simplify-libcalls | llvm-dis | \ -; RUN: grep -c {ret i32 3} | grep 1 +; RUN: grep {ret i32 3} | count 1 ; END. declare void %exit(int) From djg at cray.com Wed Aug 15 08:55:47 2007 From: djg at cray.com (Dan Gohman) Date: Wed, 15 Aug 2007 13:55:47 -0000 Subject: [llvm-commits] [llvm] r41101 - /llvm/trunk/test/CodeGen/ARM/align.ll Message-ID: <200708151355.l7FDtl0x019814@zion.cs.uiuc.edu> Author: djg Date: Wed Aug 15 08:55:47 2007 New Revision: 41101 URL: http://llvm.org/viewvc/llvm-project?rev=41101&view=rev Log: This test used "wc | grep ..."; convert it to use the count script. Modified: llvm/trunk/test/CodeGen/ARM/align.ll Modified: llvm/trunk/test/CodeGen/ARM/align.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/align.ll?rev=41101&r1=41100&r2=41101&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/align.ll (original) +++ llvm/trunk/test/CodeGen/ARM/align.ll Wed Aug 15 08:55:47 2007 @@ -1,11 +1,11 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \ -; RUN: grep align.*1 | wc | grep 1 +; RUN: grep align.*1 | count 1 ; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-linux-gnueabi | \ -; RUN: grep align.*2 | wc | grep 2 +; RUN: grep align.*2 | count 2 ; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-linux-gnueabi | \ -; RUN: grep align.*3 | wc | grep 2 +; RUN: grep align.*3 | count 2 ; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-apple-darwin | \ -; RUN: grep align.*2 | wc | grep 4 +; RUN: grep align.*2 | count 4 %a = global bool true %b = global sbyte 1 From djg at cray.com Wed Aug 15 09:03:58 2007 From: djg at cray.com (Dan Gohman) Date: Wed, 15 Aug 2007 14:03:58 -0000 Subject: [llvm-commits] [llvm] r41102 - in /llvm/trunk/test: C++Frontend/ CFrontend/ Message-ID: <200708151403.l7FE3xu6020118@zion.cs.uiuc.edu> Author: djg Date: Wed Aug 15 09:03:58 2007 New Revision: 41102 URL: http://llvm.org/viewvc/llvm-project?rev=41102&view=rev Log: svn propdel the svn:mime-type property of application/x-troff. Modified: llvm/trunk/test/C++Frontend/2003-08-24-Cleanup.cpp.tr (props changed) llvm/trunk/test/C++Frontend/2003-08-29-ArgPassingBug.cpp.tr (props changed) llvm/trunk/test/C++Frontend/2003-10-21-InnerClass.cpp.tr (props changed) llvm/trunk/test/C++Frontend/2003-11-02-WeakLinkage.cpp.tr (props changed) llvm/trunk/test/C++Frontend/2003-11-08-ArrayAddress.cpp.tr (props changed) llvm/trunk/test/C++Frontend/2003-11-09-ConstructorTypeSafety.cpp.tr (props changed) llvm/trunk/test/C++Frontend/2003-11-18-MemberInitializationCasting.cpp.tr (props changed) llvm/trunk/test/C++Frontend/2004-01-11-DynamicInitializedConstant.cpp.tr (props changed) llvm/trunk/test/C++Frontend/2004-03-09-UnmangledBuiltinMethods.cpp.tr (props changed) llvm/trunk/test/C++Frontend/2004-09-27-DidntEmitTemplate.cpp.tr (props changed) llvm/trunk/test/CFrontend/2003-07-22-ArrayAccessTypeSafety.c.tr (props changed) llvm/trunk/test/CFrontend/2003-08-06-BuiltinSetjmpLongjmp.c.tr (props changed) llvm/trunk/test/CFrontend/2003-08-17-DeadCodeShortCircuit.c.tr (props changed) llvm/trunk/test/CFrontend/2003-11-03-AddrArrayElement.c.tr (props changed) llvm/trunk/test/CFrontend/2003-11-08-PointerSubNotGetelementptr.c.tr (props changed) llvm/trunk/test/CFrontend/2003-11-13-TypeSafety.c.tr (props changed) llvm/trunk/test/CFrontend/2003-11-19-AddressOfRegister.c.tr (props changed) llvm/trunk/test/CFrontend/2003-12-14-ExternInlineSupport.c.tr (props changed) llvm/trunk/test/CFrontend/2004-02-12-LargeAggregateCopy.c.tr (props changed) llvm/trunk/test/CFrontend/2004-02-13-BuiltinFrameReturnAddress.c.tr (props changed) llvm/trunk/test/CFrontend/2004-02-13-IllegalVararg.c.tr (props changed) llvm/trunk/test/CFrontend/2004-02-20-Builtins.c.tr (props changed) llvm/trunk/test/CFrontend/2004-03-07-ExternalConstant.c.tr (props changed) llvm/trunk/test/CFrontend/2004-06-17-UnorderedCompares.c.tr (props changed) llvm/trunk/test/CFrontend/2005-01-02-PointerDifference.c.tr (props changed) Propchange: llvm/trunk/test/C++Frontend/2003-08-24-Cleanup.cpp.tr ------------------------------------------------------------------------------ --- svn:mime-type (original) +++ svn:mime-type (removed) @@ -1 +0,0 @@ -application/x-troff Propchange: llvm/trunk/test/C++Frontend/2003-08-29-ArgPassingBug.cpp.tr ------------------------------------------------------------------------------ --- svn:mime-type (original) +++ svn:mime-type (removed) @@ -1 +0,0 @@ -application/x-troff Propchange: llvm/trunk/test/C++Frontend/2003-10-21-InnerClass.cpp.tr ------------------------------------------------------------------------------ --- svn:mime-type (original) +++ svn:mime-type (removed) @@ -1 +0,0 @@ -application/x-troff Propchange: llvm/trunk/test/C++Frontend/2003-11-02-WeakLinkage.cpp.tr ------------------------------------------------------------------------------ --- svn:mime-type (original) +++ svn:mime-type (removed) @@ -1 +0,0 @@ -application/x-troff Propchange: llvm/trunk/test/C++Frontend/2003-11-08-ArrayAddress.cpp.tr ------------------------------------------------------------------------------ --- svn:mime-type (original) +++ svn:mime-type (removed) @@ -1 +0,0 @@ -application/x-troff Propchange: llvm/trunk/test/C++Frontend/2003-11-09-ConstructorTypeSafety.cpp.tr ------------------------------------------------------------------------------ --- svn:mime-type (original) +++ svn:mime-type (removed) @@ -1 +0,0 @@ -application/x-troff Propchange: llvm/trunk/test/C++Frontend/2003-11-18-MemberInitializationCasting.cpp.tr ------------------------------------------------------------------------------ --- svn:mime-type (original) +++ svn:mime-type (removed) @@ -1 +0,0 @@ -application/x-troff Propchange: llvm/trunk/test/C++Frontend/2004-01-11-DynamicInitializedConstant.cpp.tr ------------------------------------------------------------------------------ --- svn:mime-type (original) +++ svn:mime-type (removed) @@ -1 +0,0 @@ -application/x-troff Propchange: llvm/trunk/test/C++Frontend/2004-03-09-UnmangledBuiltinMethods.cpp.tr ------------------------------------------------------------------------------ --- svn:mime-type (original) +++ svn:mime-type (removed) @@ -1 +0,0 @@ -application/x-troff Propchange: llvm/trunk/test/C++Frontend/2004-09-27-DidntEmitTemplate.cpp.tr ------------------------------------------------------------------------------ --- svn:mime-type (original) +++ svn:mime-type (removed) @@ -1 +0,0 @@ -application/x-troff Propchange: llvm/trunk/test/CFrontend/2003-07-22-ArrayAccessTypeSafety.c.tr ------------------------------------------------------------------------------ --- svn:mime-type (original) +++ svn:mime-type (removed) @@ -1 +0,0 @@ -application/x-troff Propchange: llvm/trunk/test/CFrontend/2003-08-06-BuiltinSetjmpLongjmp.c.tr ------------------------------------------------------------------------------ --- svn:mime-type (original) +++ svn:mime-type (removed) @@ -1 +0,0 @@ -application/x-troff Propchange: llvm/trunk/test/CFrontend/2003-08-17-DeadCodeShortCircuit.c.tr ------------------------------------------------------------------------------ --- svn:mime-type (original) +++ svn:mime-type (removed) @@ -1 +0,0 @@ -application/x-troff Propchange: llvm/trunk/test/CFrontend/2003-11-03-AddrArrayElement.c.tr ------------------------------------------------------------------------------ --- svn:mime-type (original) +++ svn:mime-type (removed) @@ -1 +0,0 @@ -application/x-troff Propchange: llvm/trunk/test/CFrontend/2003-11-08-PointerSubNotGetelementptr.c.tr ------------------------------------------------------------------------------ --- svn:mime-type (original) +++ svn:mime-type (removed) @@ -1 +0,0 @@ -application/x-troff Propchange: llvm/trunk/test/CFrontend/2003-11-13-TypeSafety.c.tr ------------------------------------------------------------------------------ --- svn:mime-type (original) +++ svn:mime-type (removed) @@ -1 +0,0 @@ -application/x-troff Propchange: llvm/trunk/test/CFrontend/2003-11-19-AddressOfRegister.c.tr ------------------------------------------------------------------------------ --- svn:mime-type (original) +++ svn:mime-type (removed) @@ -1 +0,0 @@ -application/x-troff Propchange: llvm/trunk/test/CFrontend/2003-12-14-ExternInlineSupport.c.tr ------------------------------------------------------------------------------ --- svn:mime-type (original) +++ svn:mime-type (removed) @@ -1 +0,0 @@ -application/x-troff Propchange: llvm/trunk/test/CFrontend/2004-02-12-LargeAggregateCopy.c.tr ------------------------------------------------------------------------------ --- svn:mime-type (original) +++ svn:mime-type (removed) @@ -1 +0,0 @@ -application/x-troff Propchange: llvm/trunk/test/CFrontend/2004-02-13-BuiltinFrameReturnAddress.c.tr ------------------------------------------------------------------------------ --- svn:mime-type (original) +++ svn:mime-type (removed) @@ -1 +0,0 @@ -application/x-troff Propchange: llvm/trunk/test/CFrontend/2004-02-13-IllegalVararg.c.tr ------------------------------------------------------------------------------ --- svn:mime-type (original) +++ svn:mime-type (removed) @@ -1 +0,0 @@ -application/x-troff Propchange: llvm/trunk/test/CFrontend/2004-02-20-Builtins.c.tr ------------------------------------------------------------------------------ --- svn:mime-type (original) +++ svn:mime-type (removed) @@ -1 +0,0 @@ -application/x-troff Propchange: llvm/trunk/test/CFrontend/2004-03-07-ExternalConstant.c.tr ------------------------------------------------------------------------------ --- svn:mime-type (original) +++ svn:mime-type (removed) @@ -1 +0,0 @@ -application/x-troff Propchange: llvm/trunk/test/CFrontend/2004-06-17-UnorderedCompares.c.tr ------------------------------------------------------------------------------ --- svn:mime-type (original) +++ svn:mime-type (removed) @@ -1 +0,0 @@ -application/x-troff Propchange: llvm/trunk/test/CFrontend/2005-01-02-PointerDifference.c.tr ------------------------------------------------------------------------------ --- svn:mime-type (original) +++ svn:mime-type (removed) @@ -1 +0,0 @@ -application/x-troff From sabre at nondot.org Wed Aug 15 11:58:39 2007 From: sabre at nondot.org (Chris Lattner) Date: Wed, 15 Aug 2007 16:58:39 -0000 Subject: [llvm-commits] [llvm] r41103 - /llvm/trunk/lib/Target/X86/README-SSE.txt Message-ID: <200708151658.l7FGwdAO026937@zion.cs.uiuc.edu> Author: lattner Date: Wed Aug 15 11:58:38 2007 New Revision: 41103 URL: http://llvm.org/viewvc/llvm-project?rev=41103&view=rev Log: add a note. Modified: llvm/trunk/lib/Target/X86/README-SSE.txt Modified: llvm/trunk/lib/Target/X86/README-SSE.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/README-SSE.txt?rev=41103&r1=41102&r2=41103&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/README-SSE.txt (original) +++ llvm/trunk/lib/Target/X86/README-SSE.txt Wed Aug 15 11:58:38 2007 @@ -2,6 +2,9 @@ // Random ideas for the X86 backend: SSE-specific stuff. //===---------------------------------------------------------------------===// +- Consider eliminating the unaligned SSE load intrinsics, replacing them with + unaligned LLVM load instructions. + //===---------------------------------------------------------------------===// Expand libm rounding functions inline: Significant speedups possible. From asl at math.spbu.ru Wed Aug 15 12:12:32 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Wed, 15 Aug 2007 17:12:32 -0000 Subject: [llvm-commits] [llvm] r41104 - in /llvm/trunk/lib/Target/X86: X86ISelLowering.cpp X86ISelLowering.h X86MachineFunctionInfo.h Message-ID: <200708151712.l7FHCWaH027498@zion.cs.uiuc.edu> Author: asl Date: Wed Aug 15 12:12:32 2007 New Revision: 41104 URL: http://llvm.org/viewvc/llvm-project?rev=41104&view=rev Log: Move ReturnAddrIndex variable to X86MachineFunctionInfo structure. This fixed hard to catch bugs with retaddr lowering Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp llvm/trunk/lib/Target/X86/X86ISelLowering.h llvm/trunk/lib/Target/X86/X86MachineFunctionInfo.h Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=41104&r1=41103&r2=41104&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Wed Aug 15 12:12:32 2007 @@ -781,12 +781,11 @@ BytesCallerReserves = StackSize; } - + RegSaveFrameIndex = 0xAAAAAAA; // X86-64 only. - ReturnAddrIndex = 0; // No return address slot generated yet. - MF.getInfo() - ->setBytesToPopOnReturn(BytesToPopOnReturn); + X86MachineFunctionInfo *FuncInfo = MF.getInfo(); + FuncInfo->setBytesToPopOnReturn(BytesToPopOnReturn); // Return the new list of results. return DAG.getNode(ISD::MERGE_VALUES, Op.Val->getVTList(), @@ -1027,12 +1026,11 @@ VarArgsFrameIndex = 0xAAAAAAA; // fastcc functions can't have varargs. RegSaveFrameIndex = 0xAAAAAAA; // X86-64 only. - ReturnAddrIndex = 0; // No return address slot generated yet. BytesToPopOnReturn = StackSize; // Callee pops all stack arguments. BytesCallerReserves = 0; - MF.getInfo() - ->setBytesToPopOnReturn(BytesToPopOnReturn); + X86MachineFunctionInfo *FuncInfo = MF.getInfo(); + FuncInfo->setBytesToPopOnReturn(BytesToPopOnReturn); // Return the new list of results. return DAG.getNode(ISD::MERGE_VALUES, Op.Val->getVTList(), @@ -1319,10 +1317,12 @@ ArgValues.push_back(Root); - ReturnAddrIndex = 0; // No return address slot generated yet. BytesToPopOnReturn = 0; // Callee pops nothing. BytesCallerReserves = StackSize; + X86MachineFunctionInfo *FuncInfo = MF.getInfo(); + FuncInfo->setBytesToPopOnReturn(BytesToPopOnReturn); + // Return the new list of results. return DAG.getNode(ISD::MERGE_VALUES, Op.Val->getVTList(), &ArgValues[0], ArgValues.size()).getValue(Op.ResNo); @@ -1471,13 +1471,18 @@ SDOperand X86TargetLowering::getReturnAddressFrameIndex(SelectionDAG &DAG) { + MachineFunction &MF = DAG.getMachineFunction(); + X86MachineFunctionInfo *FuncInfo = MF.getInfo(); + int ReturnAddrIndex = FuncInfo->getRAIndex(); + if (ReturnAddrIndex == 0) { // Set up a frame object for the return address. - MachineFunction &MF = DAG.getMachineFunction(); if (Subtarget->is64Bit()) ReturnAddrIndex = MF.getFrameInfo()->CreateFixedObject(8, -8); else ReturnAddrIndex = MF.getFrameInfo()->CreateFixedObject(4, -4); + + FuncInfo->setRAIndex(ReturnAddrIndex); } return DAG.getFrameIndex(ReturnAddrIndex, getPointerTy()); Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.h?rev=41104&r1=41103&r2=41104&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.h (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.h Wed Aug 15 12:12:32 2007 @@ -282,7 +282,6 @@ int RegSaveFrameIndex; // X86-64 vararg func register save area. unsigned VarArgsGPOffset; // X86-64 vararg func int reg offset. unsigned VarArgsFPOffset; // X86-64 vararg func fp reg offset. - int ReturnAddrIndex; // FrameIndex for return slot. int BytesToPopOnReturn; // Number of arg bytes ret should pop. int BytesCallerReserves; // Number of arg bytes caller makes. public: Modified: llvm/trunk/lib/Target/X86/X86MachineFunctionInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86MachineFunctionInfo.h?rev=41104&r1=41103&r2=41104&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86MachineFunctionInfo.h (original) +++ llvm/trunk/lib/Target/X86/X86MachineFunctionInfo.h Wed Aug 15 12:12:32 2007 @@ -44,17 +44,21 @@ /// If the function requires additional name decoration, DecorationStyle holds /// the right way to do so. NameDecorationStyle DecorationStyle; - + + // FrameIndex for return slot. + int ReturnAddrIndex; public: X86MachineFunctionInfo() : ForceFramePointer(false), CalleeSavedFrameSize(0), BytesToPopOnReturn(0), - DecorationStyle(None) {} + DecorationStyle(None), + ReturnAddrIndex(0) {} X86MachineFunctionInfo(MachineFunction &MF) : ForceFramePointer(false), CalleeSavedFrameSize(0), BytesToPopOnReturn(0), - DecorationStyle(None) {} + DecorationStyle(None), + ReturnAddrIndex(0) {} bool getForceFramePointer() const { return ForceFramePointer;} void setForceFramePointer(bool forceFP) { ForceFramePointer = forceFP; } @@ -67,7 +71,9 @@ NameDecorationStyle getDecorationStyle() const { return DecorationStyle; } void setDecorationStyle(NameDecorationStyle style) { DecorationStyle = style;} - + + int getRAIndex() const { return ReturnAddrIndex; } + void setRAIndex(int Index) { ReturnAddrIndex = Index; } }; } // End llvm namespace From asl at math.spbu.ru Wed Aug 15 12:52:12 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Wed, 15 Aug 2007 17:52:12 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r41105 - /llvm-gcc-4.2/trunk/gcc/crtstuff.c Message-ID: <200708151752.l7FHqCGr029753@zion.cs.uiuc.edu> Author: asl Date: Wed Aug 15 12:52:12 2007 New Revision: 41105 URL: http://llvm.org/viewvc/llvm-project?rev=41105&view=rev Log: Mark more stuff as used. This is needed, because LLVM optimizers now are pretty clever :) Modified: llvm-gcc-4.2/trunk/gcc/crtstuff.c Modified: llvm-gcc-4.2/trunk/gcc/crtstuff.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/crtstuff.c?rev=41105&r1=41104&r2=41105&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/crtstuff.c (original) +++ llvm-gcc-4.2/trunk/gcc/crtstuff.c Wed Aug 15 12:52:12 2007 @@ -180,7 +180,6 @@ STATIC func_ptr __CTOR_LIST__[1] /* LLVM LOCAL begin */ #ifdef __llvm__ -/* FIXME: Remove when external weak linkage will be alive. */ __attribute__ ((__used__, aligned(sizeof(func_ptr)))) #else __attribute__ ((__unused__, aligned(sizeof(func_ptr)))) @@ -191,7 +190,6 @@ STATIC func_ptr __CTOR_LIST__[1] /* LLVM LOCAL begin */ #ifdef __llvm__ -/* FIXME: Remove when external weak linkage will be alive. */ __attribute__ ((__used__, section(".ctors"), aligned(sizeof(func_ptr)))) #else __attribute__ ((__unused__, section(".ctors"), aligned(sizeof(func_ptr)))) @@ -205,11 +203,23 @@ #elif defined(DTORS_SECTION_ASM_OP) asm (DTORS_SECTION_ASM_OP); STATIC func_ptr __DTOR_LIST__[1] +/* LLVM LOCAL begin */ +#ifdef __llvm__ + __attribute__ ((used, aligned(sizeof(func_ptr)))) +#else __attribute__ ((aligned(sizeof(func_ptr)))) +#endif +/* LLVM LOCAL end */ = { (func_ptr) (-1) }; #else STATIC func_ptr __DTOR_LIST__[1] +/* LLVM LOCAL begin */ +#ifdef __llvm__ + __attribute__((used, section(".dtors"), aligned(sizeof(func_ptr)))) +#else __attribute__((section(".dtors"), aligned(sizeof(func_ptr)))) +#endif +/* LLVM LOCAL end */ = { (func_ptr) (-1) }; #endif /* __DTOR_LIST__ alternatives */ @@ -217,7 +227,13 @@ /* Stick a label at the beginning of the frame unwind info so we can register and deregister it with the exception handling library code. */ STATIC EH_FRAME_SECTION_CONST char __EH_FRAME_BEGIN__[] +/* LLVM LOCAL begin */ +#ifdef __llvm__ + __attribute__((used, section(EH_FRAME_SECTION_NAME), aligned(4))) +#else __attribute__((section(EH_FRAME_SECTION_NAME), aligned(4))) +#endif +/* LLVM LOCAL end */ = { }; #endif /* USE_EH_FRAME_REGISTRY */ @@ -473,11 +489,23 @@ static func_ptr force_to_data[1] __attribute__ ((__unused__)) = { }; asm (CTORS_SECTION_ASM_OP); STATIC func_ptr __CTOR_END__[1] +/* LLVM LOCAL begin */ +#ifdef __llvm__ + __attribute__((used, aligned(sizeof(func_ptr)))) +#else __attribute__((aligned(sizeof(func_ptr)))) +#endif +/* LLVM LOCAL end */ = { (func_ptr) 0 }; #else STATIC func_ptr __CTOR_END__[1] +/* LLVM LOCAL begin */ +#ifdef __llvm__ + __attribute__((used, section(".ctors"), aligned(sizeof(func_ptr)))) +#else __attribute__((section(".ctors"), aligned(sizeof(func_ptr)))) +#endif +/* LLVM LOCAL end */ = { (func_ptr) 0 }; #endif @@ -488,8 +516,7 @@ STATIC func_ptr __DTOR_END__[1] /* LLVM LOCAL begin */ #ifdef __llvm__ -/* FIXME: Remove when external weak linkage will be alive. */ -__attribute__ ((__used__, aligned(sizeof(func_ptr)))) + __attribute__ ((__used__, aligned(sizeof(func_ptr)))) #else __attribute__ ((unused, aligned(sizeof(func_ptr)))) #endif From greened at obbligato.org Wed Aug 15 12:58:51 2007 From: greened at obbligato.org (David Greene) Date: Wed, 15 Aug 2007 17:58:51 -0000 Subject: [llvm-commits] [llvm] r41106 - /llvm/trunk/tools/llvm-upgrade/UpgradeParser.y.cvs Message-ID: <200708151758.l7FHwpia030092@zion.cs.uiuc.edu> Author: greened Date: Wed Aug 15 12:58:51 2007 New Revision: 41106 URL: http://llvm.org/viewvc/llvm-project?rev=41106&view=rev Log: Update .cvs file Modified: llvm/trunk/tools/llvm-upgrade/UpgradeParser.y.cvs Modified: llvm/trunk/tools/llvm-upgrade/UpgradeParser.y.cvs URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-upgrade/UpgradeParser.y.cvs?rev=41106&r1=41105&r2=41106&view=diff ============================================================================== --- llvm/trunk/tools/llvm-upgrade/UpgradeParser.y.cvs (original) +++ llvm/trunk/tools/llvm-upgrade/UpgradeParser.y.cvs Wed Aug 15 12:58:51 2007 @@ -1723,11 +1723,12 @@ while (!F->use_empty()) { CallInst* CI = cast(F->use_back()); - SmallVector Args; - Args.push_back(new AllocaInst(ArgTy, 0, "vacopy.fix.1", CI)); - Args.push_back(new AllocaInst(ArgTy, 0, "vacopy.fix.2", CI)); + Value *Args[2] = { + new AllocaInst(ArgTy, 0, "vacopy.fix.1", CI), + new AllocaInst(ArgTy, 0, "vacopy.fix.2", CI) + }; new StoreInst(CI->getOperand(1), Args[1], CI); - new CallInst(NF, Args.begin(), Args.end(), "", CI); + new CallInst(NF, Args, Args + 2, "", CI); Value* foo = new LoadInst(Args[0], "vacopy.fix.3", CI); CI->replaceAllUsesWith(foo); CI->getParent()->getInstList().erase(CI); From asl at math.spbu.ru Wed Aug 15 13:18:59 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Wed, 15 Aug 2007 18:18:59 -0000 Subject: [llvm-commits] [llvm-gcc-4.0] r41107 - /llvm-gcc-4.0/trunk/gcc/crtstuff.c Message-ID: <200708151818.l7FIIxEY031031@zion.cs.uiuc.edu> Author: asl Date: Wed Aug 15 13:18:58 2007 New Revision: 41107 URL: http://llvm.org/viewvc/llvm-project?rev=41107&view=rev Log: Propagate patch from 4.2 branch: Mark more stuff as used. This is needed, because LLVM optimizers now are pretty clever :) Modified: llvm-gcc-4.0/trunk/gcc/crtstuff.c Modified: llvm-gcc-4.0/trunk/gcc/crtstuff.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.0/trunk/gcc/crtstuff.c?rev=41107&r1=41106&r2=41107&view=diff ============================================================================== --- llvm-gcc-4.0/trunk/gcc/crtstuff.c (original) +++ llvm-gcc-4.0/trunk/gcc/crtstuff.c Wed Aug 15 13:18:58 2007 @@ -176,7 +176,6 @@ STATIC func_ptr __CTOR_LIST__[1] /* APPLE LOCAL begin LLVM */ #ifdef __llvm__ -/* FIXME: Remove when external weak linkage will be alive. */ __attribute__ ((__used__, aligned(sizeof(func_ptr)))) #else __attribute__ ((__unused__, aligned(sizeof(func_ptr)))) @@ -187,7 +186,6 @@ STATIC func_ptr __CTOR_LIST__[1] /* APPLE LOCAL begin LLVM */ #ifdef __llvm__ -/* FIXME: Remove when external weak linkage will be alive. */ __attribute__ ((__used__, section(".ctors"), aligned(sizeof(func_ptr)))) #else __attribute__ ((__unused__, section(".ctors"), aligned(sizeof(func_ptr)))) @@ -201,11 +199,23 @@ #elif defined(DTORS_SECTION_ASM_OP) asm (DTORS_SECTION_ASM_OP); STATIC func_ptr __DTOR_LIST__[1] +/* LLVM LOCAL begin */ +#ifdef __llvm__ + __attribute__ ((used, aligned(sizeof(func_ptr)))) +#else __attribute__ ((aligned(sizeof(func_ptr)))) +#endif +/* LLVM LOCAL end */ = { (func_ptr) (-1) }; #else STATIC func_ptr __DTOR_LIST__[1] +/* LLVM LOCAL begin */ +#ifdef __llvm__ + __attribute__((used, section(".dtors"), aligned(sizeof(func_ptr)))) +#else __attribute__((section(".dtors"), aligned(sizeof(func_ptr)))) +#endif +/* LLVM LOCAL end */ = { (func_ptr) (-1) }; #endif /* __DTOR_LIST__ alternatives */ @@ -213,7 +223,13 @@ /* Stick a label at the beginning of the frame unwind info so we can register and deregister it with the exception handling library code. */ STATIC EH_FRAME_SECTION_CONST char __EH_FRAME_BEGIN__[] +/* LLVM LOCAL begin */ +#ifdef __llvm__ + __attribute__((used, section(EH_FRAME_SECTION_NAME), aligned(4))) +#else __attribute__((section(EH_FRAME_SECTION_NAME), aligned(4))) +#endif +/* LLVM LOCAL end */ = { }; #endif /* USE_EH_FRAME_REGISTRY */ @@ -447,11 +463,23 @@ static func_ptr force_to_data[1] __attribute__ ((__unused__)) = { }; asm (CTORS_SECTION_ASM_OP); STATIC func_ptr __CTOR_END__[1] +/* LLVM LOCAL begin */ +#ifdef __llvm__ + __attribute__((used, aligned(sizeof(func_ptr)))) +#else __attribute__((aligned(sizeof(func_ptr)))) +#endif +/* LLVM LOCAL end */ = { (func_ptr) 0 }; #else STATIC func_ptr __CTOR_END__[1] +/* LLVM LOCAL begin */ +#ifdef __llvm__ + __attribute__((used, section(".ctors"), aligned(sizeof(func_ptr)))) +#else __attribute__((section(".ctors"), aligned(sizeof(func_ptr)))) +#endif +/* LLVM LOCAL end */ = { (func_ptr) 0 }; #endif @@ -462,8 +490,7 @@ STATIC func_ptr __DTOR_END__[1] /* APPLE LOCAL begin LLVM */ #ifdef __llvm__ -/* FIXME: Remove when external weak linkage will be alive. */ -__attribute__ ((__used__, aligned(sizeof(func_ptr)))) + __attribute__ ((__used__, aligned(sizeof(func_ptr)))) #else __attribute__ ((unused, aligned(sizeof(func_ptr)))) #endif From asl at math.spbu.ru Wed Aug 15 13:20:33 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Wed, 15 Aug 2007 18:20:33 -0000 Subject: [llvm-commits] [llvm-gcc-4.0] r41108 - in /llvm-gcc-4.0/trunk/gcc: llvm-backend.cpp toplev.c Message-ID: <200708151820.l7FIKXI6031126@zion.cs.uiuc.edu> Author: asl Date: Wed Aug 15 13:20:33 2007 New Revision: 41108 URL: http://llvm.org/viewvc/llvm-project?rev=41108&view=rev Log: Propagate patch from 4.2 branch: properly do the things, when PCHs are used for emitting PCHs :) Modified: llvm-gcc-4.0/trunk/gcc/llvm-backend.cpp llvm-gcc-4.0/trunk/gcc/toplev.c Modified: llvm-gcc-4.0/trunk/gcc/llvm-backend.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.0/trunk/gcc/llvm-backend.cpp?rev=41108&r1=41107&r2=41108&view=diff ============================================================================== --- llvm-gcc-4.0/trunk/gcc/llvm-backend.cpp (original) +++ llvm-gcc-4.0/trunk/gcc/llvm-backend.cpp Wed Aug 15 13:20:33 2007 @@ -233,7 +233,11 @@ delete PerModulePasses; delete CodeGenPasses; - createOptimizationPasses(); + // Don't run codegen, when we should output PCH + if (!flag_pch_file) + createOptimizationPasses(); + else + llvm_pch_write_init(); } // Read LLVM Types string table Modified: llvm-gcc-4.0/trunk/gcc/toplev.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.0/trunk/gcc/toplev.c?rev=41108&r1=41107&r2=41108&view=diff ============================================================================== --- llvm-gcc-4.0/trunk/gcc/toplev.c (original) +++ llvm-gcc-4.0/trunk/gcc/toplev.c Wed Aug 15 13:20:33 2007 @@ -1112,8 +1112,16 @@ lang_hooks.decls.final_write_globals (); cgraph_varpool_assemble_pending_decls (); + + /* LLVM LOCAL begin */ +#ifdef ENABLE_LLVM + if (!flag_pch_file) + finish_aliases_2 (); +#else finish_aliases_2 (); - +#endif + /* LLVM LOCAL end */ + /* This must occur after the loop to output deferred functions. Else the coverage initializer would not be emitted if all the functions in this compilation unit were deferred. */ From espindola at google.com Wed Aug 15 14:46:39 2007 From: espindola at google.com (Rafael Espindola) Date: Wed, 15 Aug 2007 20:46:39 +0100 Subject: [llvm-commits] [llvm] r41046 - /llvm/trunk/lib/VMCore/ConstantFold.cpp In-Reply-To: <200708131709.l7DH98IZ027284@zion.cs.uiuc.edu> References: <200708131709.l7DH98IZ027284@zion.cs.uiuc.edu> Message-ID: <38a0d8450708151246x44df8ce0t3c5936bbb7f1fdcb@mail.gmail.com> > define void @_Z1g1S(%struct.S* noalias %s) { > entry: %tmp131415 = getelementptr %struct.S* %s, i32 0, i32 0 ; [#uses=1] %tmp16 = load i32 (...)*** %tmp131415, align 4 ; [#uses=1] > %tmp26277 = load i32 (...)** %tmp16 ; [#uses=1] > %tmp2829 = bitcast i32 (...)* %tmp26277 to void (%struct.S*)* ; [#uses=1] > tail call void %tmp2829( %struct.S* %s ) > ret void > } > > This still has the vtable dispatch (as required) but does not have any pointer > to method cruft left. Is it really required? Since S is passed by value, I think one can be sure that method called is S::f and not one from a class that inherits from S. Maybe a LLVM type definition should include support for defining that part of it is constant? Cheers, -- Rafael Avila de Espindola Google Ireland Ltd. Gordon House Barrow Street Dublin 4 Ireland Registered in Dublin, Ireland Registration Number: 368047 From clattner at apple.com Wed Aug 15 15:03:51 2007 From: clattner at apple.com (Chris Lattner) Date: Wed, 15 Aug 2007 13:03:51 -0700 Subject: [llvm-commits] [llvm] r41046 - /llvm/trunk/lib/VMCore/ConstantFold.cpp In-Reply-To: <38a0d8450708151246x44df8ce0t3c5936bbb7f1fdcb@mail.gmail.com> References: <200708131709.l7DH98IZ027284@zion.cs.uiuc.edu> <38a0d8450708151246x44df8ce0t3c5936bbb7f1fdcb@mail.gmail.com> Message-ID: On Aug 15, 2007, at 12:46 PM, Rafael Espindola wrote: >> define void @_Z1g1S(%struct.S* noalias %s) { >> entry: %tmp131415 = getelementptr %struct.S* %s, i32 0, i32 >> 0 ; [#uses=1] %tmp16 = load i32 >> (...)*** %tmp131415, align 4 ; [#uses=1] >> %tmp26277 = load i32 (...)** %tmp16 ; > (...)*> [#uses=1] >> %tmp2829 = bitcast i32 (...)* %tmp26277 to void (% >> struct.S*)* ; [#uses=1] >> tail call void %tmp2829( %struct.S* %s ) >> ret void >> } >> >> This still has the vtable dispatch (as required) but does not have >> any pointer >> to method cruft left. > > Is it really required? Since S is passed by value, I think one can be > sure that method called is S::f and not one from a class that inherits > from S. Very good point. We would have to catch this in the GCC C++ front- end, which is independent of the LLVM stuff. > Maybe a LLVM type definition should include support for defining that > part of it is constant? There are a variety of possible things we could extend LLVM to support better, but this one would be tricky. Note that currently the optimizers don't even get the vtable for S at all, so it can't know what the real target is supposed to be. It would be better if the C++ Front-end replaced the load of the vtable pointer (%tmp16) with a pointer to the constant vtable itself (which would require it to emit it into this translation unit or use an extern of it). This would require LLVM to constant propagate the load of the actual function pointer form the vtable. In practice, most people don't pass dynamic classes by value, so I don't think this actually occurs often... -Chris From evan.cheng at apple.com Wed Aug 15 15:20:34 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 15 Aug 2007 20:20:34 -0000 Subject: [llvm-commits] [llvm] r41109 - /llvm/trunk/lib/CodeGen/VirtRegMap.cpp Message-ID: <200708152020.l7FKKZ0S010989@zion.cs.uiuc.edu> Author: evancheng Date: Wed Aug 15 15:20:34 2007 New Revision: 41109 URL: http://llvm.org/viewvc/llvm-project?rev=41109&view=rev Log: If the source of a move is in spill slot, the reload may be folded to essentially a load from stack slot. It's ok to mark the stack slot value as available for reuse. But it should not be clobbered since the destination of the move is live. Modified: llvm/trunk/lib/CodeGen/VirtRegMap.cpp Modified: llvm/trunk/lib/CodeGen/VirtRegMap.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/VirtRegMap.cpp?rev=41109&r1=41108&r2=41109&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/VirtRegMap.cpp (original) +++ llvm/trunk/lib/CodeGen/VirtRegMap.cpp Wed Aug 15 15:20:34 2007 @@ -320,7 +320,7 @@ ModifyStackSlotOrReMat(SlotOrReMat); PhysRegsAvailable.insert(std::make_pair(Reg, SlotOrReMat)); - SpillSlotsOrReMatsAvailable[SlotOrReMat] = (Reg << 1) | (unsigned)CanClobber; + SpillSlotsOrReMatsAvailable[SlotOrReMat]= (Reg << 1) | (unsigned)CanClobber; if (SlotOrReMat > VirtRegMap::MAX_STACK_SLOT) DOUT << "Remembering RM#" << SlotOrReMat-VirtRegMap::MAX_STACK_SLOT-1; @@ -333,7 +333,8 @@ /// value of the specified stackslot register if it desires. The specified /// stack slot must be available in a physreg for this query to make sense. bool canClobberPhysReg(int SlotOrReMat) const { - assert(SpillSlotsOrReMatsAvailable.count(SlotOrReMat) && "Value not available!"); + assert(SpillSlotsOrReMatsAvailable.count(SlotOrReMat) && + "Value not available!"); return SpillSlotsOrReMatsAvailable.find(SlotOrReMat)->second & 1; } @@ -347,9 +348,9 @@ /// it and any of its aliases. void ClobberPhysReg(unsigned PhysReg); - /// ModifyStackSlotOrReMat - This method is called when the value in a stack slot - /// changes. This removes information about which register the previous value - /// for this slot lives in (as the previous value is dead now). + /// ModifyStackSlotOrReMat - This method is called when the value in a stack + /// slot changes. This removes information about which register the previous + /// value for this slot lives in (as the previous value is dead now). void ModifyStackSlotOrReMat(int SlotOrReMat); }; } @@ -409,11 +410,12 @@ ClobberPhysRegOnly(PhysReg); } -/// ModifyStackSlotOrReMat - This method is called when the value in a stack slot -/// changes. This removes information about which register the previous value -/// for this slot lives in (as the previous value is dead now). +/// ModifyStackSlotOrReMat - This method is called when the value in a stack +/// slot changes. This removes information about which register the previous +/// value for this slot lives in (as the previous value is dead now). void AvailableSpills::ModifyStackSlotOrReMat(int SlotOrReMat) { - std::map::iterator It = SpillSlotsOrReMatsAvailable.find(SlotOrReMat); + std::map::iterator It = + SpillSlotsOrReMatsAvailable.find(SlotOrReMat); if (It == SpillSlotsOrReMatsAvailable.end()) return; unsigned Reg = It->second >> 1; SpillSlotsOrReMatsAvailable.erase(It); @@ -557,8 +559,8 @@ ReusedOp(unsigned o, unsigned ss, unsigned prr, unsigned apr, unsigned vreg) - : Operand(o), StackSlotOrReMat(ss), PhysRegReused(prr), AssignedPhysReg(apr), - VirtReg(vreg) {} + : Operand(o), StackSlotOrReMat(ss), PhysRegReused(prr), + AssignedPhysReg(apr), VirtReg(vreg) {} }; /// ReuseInfo - This maintains a collection of ReuseOp's for each operand that @@ -976,6 +978,7 @@ // If we have folded references to memory operands, make sure we clear all // physical registers that may contain the value of the spilled virtual // register + SmallSet FoldedSS; for (tie(I, End) = VRM.getFoldedVirts(&MI); I != End; ++I) { DOUT << "Folded vreg: " << I->second.first << " MR: " << I->second.second; @@ -986,6 +989,7 @@ continue; } int SS = VRM.getStackSlot(VirtReg); + FoldedSS.insert(SS); DOUT << " - StackSlot: " << SS << "\n"; // If this folded instruction is just a use, check to see if it's a @@ -1093,9 +1097,11 @@ int FrameIdx; if (unsigned DestReg = TII->isLoadFromStackSlot(&MI, FrameIdx)) { assert(DestReg == VirtReg && "Unknown load situation!"); - + + // If it is a folded reference, then it's not safe to clobber. + bool Folded = FoldedSS.count(FrameIdx); // Otherwise, if it wasn't available, remember that it is now! - Spills.addAvailable(FrameIdx, &MI, DestReg); + Spills.addAvailable(FrameIdx, &MI, DestReg, !Folded); goto ProcessNextInst; } From evan.cheng at apple.com Wed Aug 15 15:30:11 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 15 Aug 2007 20:30:11 -0000 Subject: [llvm-commits] [llvm] r41110 - /llvm/trunk/test/CodeGen/ARM/2007-08-15-ReuseBug.ll Message-ID: <200708152030.l7FKUBS8012021@zion.cs.uiuc.edu> Author: evancheng Date: Wed Aug 15 15:30:10 2007 New Revision: 41110 URL: http://llvm.org/viewvc/llvm-project?rev=41110&view=rev Log: Test case for PR1609. Added: llvm/trunk/test/CodeGen/ARM/2007-08-15-ReuseBug.ll Added: llvm/trunk/test/CodeGen/ARM/2007-08-15-ReuseBug.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/2007-08-15-ReuseBug.ll?rev=41110&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/ARM/2007-08-15-ReuseBug.ll (added) +++ llvm/trunk/test/CodeGen/ARM/2007-08-15-ReuseBug.ll Wed Aug 15 15:30:10 2007 @@ -0,0 +1,106 @@ +; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin -relocation-model=pic -mattr=+v6 | %prcontext {ldr.*\\!} 1 | grep mov +; PR1609 + + %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 } + %struct.__sFILEX = type opaque + %struct.__sbuf = type { i8*, i32 } + at _C_nextcmd = external global i32 ; [#uses=2] + at _C_cmds = external global [100 x i8*] ; <[100 x i8*]*> [#uses=2] + at .str44 = external constant [2 x i8] ; <[2 x i8]*> [#uses=1] + +define i32 @main(i32 %argc, i8** %argv) { +entry: + br label %cond_next212.i + +bb21.i: ; preds = %cond_next212.i + br label %cond_next212.i + +bb24.i: ; preds = %cond_next212.i + ret i32 0 + +bb27.i: ; preds = %cond_next212.i + ret i32 0 + +bb30.i: ; preds = %cond_next212.i + %tmp205399.i = add i32 %argc_addr.2358.0.i, -1 ; [#uses=1] + br label %cond_next212.i + +bb33.i: ; preds = %cond_next212.i + ret i32 0 + +cond_next73.i: ; preds = %cond_next212.i + ret i32 0 + +bb75.i: ; preds = %cond_next212.i + ret i32 0 + +bb77.i: ; preds = %cond_next212.i + ret i32 0 + +bb79.i: ; preds = %cond_next212.i + ret i32 0 + +bb102.i: ; preds = %cond_next212.i + br i1 false, label %cond_true110.i, label %cond_next123.i + +cond_true110.i: ; preds = %bb102.i + %tmp116.i = getelementptr i8** %argv_addr.2321.0.i, i32 2 ; [#uses=1] + %tmp117.i = load i8** %tmp116.i ; [#uses=1] + %tmp126425.i = call %struct.FILE* @fopen( i8* %tmp117.i, i8* getelementptr ([2 x i8]* @.str44, i32 0, i32 0) ) ; <%struct.FILE*> [#uses=0] + ret i32 0 + +cond_next123.i: ; preds = %bb102.i + %tmp122.i = getelementptr i8* %tmp215.i, i32 2 ; [#uses=0] + ret i32 0 + +bb162.i: ; preds = %cond_next212.i + ret i32 0 + +C_addcmd.exit120.i: ; preds = %cond_next212.i + %tmp3.i.i.i.i105.i = call i8* @calloc( i32 15, i32 1 ) ; [#uses=1] + %tmp1.i108.i = getelementptr [100 x i8*]* @_C_cmds, i32 0, i32 0 ; [#uses=1] + store i8* %tmp3.i.i.i.i105.i, i8** %tmp1.i108.i, align 4 + %tmp.i91.i = load i32* @_C_nextcmd, align 4 ; [#uses=1] + store i32 0, i32* @_C_nextcmd, align 4 + %tmp3.i.i.i.i95.i = call i8* @calloc( i32 15, i32 1 ) ; [#uses=1] + %tmp1.i98.i = getelementptr [100 x i8*]* @_C_cmds, i32 0, i32 %tmp.i91.i ; [#uses=1] + store i8* %tmp3.i.i.i.i95.i, i8** %tmp1.i98.i, align 4 + br label %cond_next212.i + +bb174.i: ; preds = %cond_next212.i + ret i32 0 + +bb192.i: ; preds = %cond_next212.i + br label %cond_next212.i + +cond_next212.i: ; preds = %cond_next212.i, %cond_next212.i, %cond_next212.i, %cond_next212.i, %bb192.i, %C_addcmd.exit120.i, %bb30.i, %bb21.i, %entry + %max_d.3 = phi i32 [ -1, %entry ], [ %max_d.3, %bb30.i ], [ %max_d.3, %bb21.i ], [ %max_d.3, %C_addcmd.exit120.i ], [ 0, %bb192.i ], [ %max_d.3, %cond_next212.i ], [ %max_d.3, %cond_next212.i ], [ %max_d.3, %cond_next212.i ], [ %max_d.3, %cond_next212.i ] ; [#uses=7] + %argv_addr.2321.0.i = phi i8** [ %argv, %entry ], [ %tmp214.i, %bb192.i ], [ %tmp214.i, %C_addcmd.exit120.i ], [ %tmp214.i, %bb30.i ], [ %tmp214.i, %bb21.i ], [ %tmp214.i, %cond_next212.i ], [ %tmp214.i, %cond_next212.i ], [ %tmp214.i, %cond_next212.i ], [ %tmp214.i, %cond_next212.i ] ; [#uses=2] + %argc_addr.2358.0.i = phi i32 [ %argc, %entry ], [ %tmp205399.i, %bb30.i ], [ 0, %bb21.i ], [ 0, %C_addcmd.exit120.i ], [ 0, %bb192.i ], [ 0, %cond_next212.i ], [ 0, %cond_next212.i ], [ 0, %cond_next212.i ], [ 0, %cond_next212.i ] ; [#uses=1] + %tmp214.i = getelementptr i8** %argv_addr.2321.0.i, i32 1 ; [#uses=9] + %tmp215.i = load i8** %tmp214.i ; [#uses=1] + %tmp1314.i = sext i8 0 to i32 ; [#uses=1] + switch i32 %tmp1314.i, label %bb192.i [ + i32 76, label %C_addcmd.exit120.i + i32 77, label %bb174.i + i32 83, label %bb162.i + i32 97, label %bb33.i + i32 98, label %bb21.i + i32 99, label %bb24.i + i32 100, label %bb27.i + i32 101, label %cond_next212.i + i32 102, label %bb102.i + i32 105, label %bb75.i + i32 109, label %bb30.i + i32 113, label %cond_next212.i + i32 114, label %cond_next73.i + i32 115, label %bb79.i + i32 116, label %cond_next212.i + i32 118, label %bb77.i + i32 119, label %cond_next212.i + ] +} + +declare %struct.FILE* @fopen(i8*, i8*) + +declare i8* @calloc(i32, i32) From asl at math.spbu.ru Wed Aug 15 16:12:31 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Wed, 15 Aug 2007 21:12:31 -0000 Subject: [llvm-commits] [llvm] r41111 - in /llvm/trunk: include/llvm/ADT/SmallPtrSet.h lib/Support/SmallPtrSet.cpp Message-ID: <200708152112.l7FLCVCu015619@zion.cs.uiuc.edu> Author: asl Date: Wed Aug 15 16:12:30 2007 New Revision: 41111 URL: http://llvm.org/viewvc/llvm-project?rev=41111&view=rev Log: Properly use const qualifiers Modified: llvm/trunk/include/llvm/ADT/SmallPtrSet.h llvm/trunk/lib/Support/SmallPtrSet.cpp Modified: llvm/trunk/include/llvm/ADT/SmallPtrSet.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/SmallPtrSet.h?rev=41111&r1=41110&r2=41111&view=diff ============================================================================== --- llvm/trunk/include/llvm/ADT/SmallPtrSet.h (original) +++ llvm/trunk/include/llvm/ADT/SmallPtrSet.h Wed Aug 15 16:12:30 2007 @@ -103,9 +103,9 @@ /// erase - If the set contains the specified pointer, remove it and return /// true, otherwise return false. - bool erase(void * const Ptr); + bool erase(const void * Ptr); - bool count(void * const Ptr) const { + bool count(const void * Ptr) const { if (isSmall()) { // Linear search for the item. for (const void *const *APtr = SmallArray, Modified: llvm/trunk/lib/Support/SmallPtrSet.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/SmallPtrSet.cpp?rev=41111&r1=41110&r2=41111&view=diff ============================================================================== --- llvm/trunk/lib/Support/SmallPtrSet.cpp (original) +++ llvm/trunk/lib/Support/SmallPtrSet.cpp Wed Aug 15 16:12:30 2007 @@ -69,7 +69,7 @@ return true; } -bool SmallPtrSetImpl::erase(void * const Ptr) { +bool SmallPtrSetImpl::erase(const void * Ptr) { if (isSmall()) { // Check to see if it is in the set. for (const void **APtr = SmallArray, **E = SmallArray+NumElements; From lauro.venancio at gmail.com Wed Aug 15 17:13:28 2007 From: lauro.venancio at gmail.com (Lauro Ramos Venancio) Date: Wed, 15 Aug 2007 22:13:28 -0000 Subject: [llvm-commits] [llvm] r41112 - in /llvm/trunk: lib/CodeGen/SelectionDAG/LegalizeDAG.cpp test/CodeGen/ARM/fpowi.ll Message-ID: <200708152213.l7FMDTcP018511@zion.cs.uiuc.edu> Author: laurov Date: Wed Aug 15 17:13:27 2007 New Revision: 41112 URL: http://llvm.org/viewvc/llvm-project?rev=41112&view=rev Log: Implement FPOWI ExpandOp. Fix PR1287. Added: llvm/trunk/test/CodeGen/ARM/fpowi.ll Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=41112&r1=41111&r2=41112&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Wed Aug 15 17:13:27 2007 @@ -5604,6 +5604,11 @@ case ISD::FP_ROUND: Lo = ExpandLibCall(TLI.getLibcallName(RTLIB::FPROUND_F64_F32),Node,true,Hi); break; + case ISD::FPOWI: + Lo = ExpandLibCall(TLI.getLibcallName((VT == MVT::f32) + ? RTLIB::POWI_F32 : RTLIB::POWI_F64), + Node, false, Hi); + break; case ISD::FSQRT: case ISD::FSIN: case ISD::FCOS: { Added: llvm/trunk/test/CodeGen/ARM/fpowi.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/fpowi.ll?rev=41112&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/ARM/fpowi.ll (added) +++ llvm/trunk/test/CodeGen/ARM/fpowi.ll Wed Aug 15 17:13:27 2007 @@ -0,0 +1,16 @@ +; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi | grep powidf2 +; PR1287 + +; ModuleID = '' +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64" +target triple = "arm-linux-gnueabi" + +define double @_ZSt3powdi(double %__x, i32 %__i) { +entry: + %tmp3 = call double @llvm.powi.f64( double 0.000000e+00, i32 0 ) ; [#uses=1] + store double %tmp3, double* null, align 8 + unreachable +} + +declare double @llvm.powi.f64(double, i32) + From resistor at mac.com Wed Aug 15 19:18:33 2007 From: resistor at mac.com (Owen Anderson) Date: Thu, 16 Aug 2007 00:18:33 -0000 Subject: [llvm-commits] [llvm] r41114 - /llvm/trunk/include/llvm/ADT/DenseMap.h Message-ID: <200708160018.l7G0IXH4023662@zion.cs.uiuc.edu> Author: resistor Date: Wed Aug 15 19:18:32 2007 New Revision: 41114 URL: http://llvm.org/viewvc/llvm-project?rev=41114&view=rev Log: Add a copy constructor and an assignment operator to DenseMap. Modified: llvm/trunk/include/llvm/ADT/DenseMap.h Modified: llvm/trunk/include/llvm/ADT/DenseMap.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/DenseMap.h?rev=41114&r1=41113&r2=41114&view=diff ============================================================================== --- llvm/trunk/include/llvm/ADT/DenseMap.h (original) +++ llvm/trunk/include/llvm/ADT/DenseMap.h Wed Aug 15 19:18:32 2007 @@ -57,11 +57,16 @@ unsigned NumEntries; unsigned NumTombstones; - DenseMap(const DenseMap &); // not implemented. public: + DenseMap(const DenseMap& other) { + NumBuckets = 0; + CopyFrom(other); + } + explicit DenseMap(unsigned NumInitBuckets = 64) { init(NumInitBuckets); } + ~DenseMap() { const KeyT EmptyKey = getEmptyKey(), TombstoneKey = getTombstoneKey(); for (BucketT *P = Buckets, *E = Buckets+NumBuckets; P != E; ++P) { @@ -169,7 +174,33 @@ return InsertIntoBucket(Key, ValueT(), TheBucket)->second; } + DenseMap& operator=(const DenseMap& other) { + CopyFrom(other); + } + private: + void CopyFrom(const DenseMap& other) { + if (NumEntries != 0) { + const KeyT EmptyKey = getEmptyKey(), TombstoneKey = getTombstoneKey(); + for (BucketT *P = Buckets, *E = Buckets+NumBuckets; P != E; ++P) { + if (P->first != EmptyKey && P->first != TombstoneKey) + P->second.~ValueT(); + P->first.~KeyT(); + } + } + + NumEntries = other.NumEntries; + NumTombstones = other.NumTombstones; + + if (NumBuckets) + delete[] reinterpret_cast(Buckets); + Buckets = reinterpret_cast(new char[sizeof(BucketT) * + other.NumBuckets]); + memcpy(Buckets, other.Buckets, other.NumBuckets * sizeof(BucketT)); + + NumBuckets = other.NumBuckets; + } + BucketT *InsertIntoBucket(const KeyT &Key, const ValueT &Value, BucketT *TheBucket) { // If the load of the hash table is more than 3/4, or if fewer than 1/8 of From resistor at mac.com Wed Aug 15 19:25:42 2007 From: resistor at mac.com (Owen Anderson) Date: Thu, 16 Aug 2007 00:25:42 -0000 Subject: [llvm-commits] [llvm] r41115 - /llvm/trunk/include/llvm/ADT/DenseMap.h Message-ID: <200708160025.l7G0Pgc7023954@zion.cs.uiuc.edu> Author: resistor Date: Wed Aug 15 19:25:42 2007 New Revision: 41115 URL: http://llvm.org/viewvc/llvm-project?rev=41115&view=rev Log: Forgot a line. Modified: llvm/trunk/include/llvm/ADT/DenseMap.h Modified: llvm/trunk/include/llvm/ADT/DenseMap.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/DenseMap.h?rev=41115&r1=41114&r2=41115&view=diff ============================================================================== --- llvm/trunk/include/llvm/ADT/DenseMap.h (original) +++ llvm/trunk/include/llvm/ADT/DenseMap.h Wed Aug 15 19:25:42 2007 @@ -176,6 +176,7 @@ DenseMap& operator=(const DenseMap& other) { CopyFrom(other); + return *this; } private: From rspencer at reidspencer.com Thu Aug 16 02:22:44 2007 From: rspencer at reidspencer.com (Reid Spencer) Date: Thu, 16 Aug 2007 07:22:44 -0000 Subject: [llvm-commits] [llvm] r41116 - /llvm/trunk/test/Linker/link-messages.ll Message-ID: <200708160722.l7G7MidJ005446@zion.cs.uiuc.edu> Author: reid Date: Thu Aug 16 02:22:43 2007 New Revision: 41116 URL: http://llvm.org/viewvc/llvm-project?rev=41116&view=rev Log: Add a test to ensure that obvious link messages are actually produced on the standard error. Added: llvm/trunk/test/Linker/link-messages.ll Added: llvm/trunk/test/Linker/link-messages.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Linker/link-messages.ll?rev=41116&view=auto ============================================================================== --- llvm/trunk/test/Linker/link-messages.ll (added) +++ llvm/trunk/test/Linker/link-messages.ll Thu Aug 16 02:22:43 2007 @@ -0,0 +1,11 @@ +; Test that linking two files with the same definition causes an error and +; that error is printed out. +; RUN: llvm-as %s -o %t.one.bc -f +; RUN: llvm-as %s -o %t.two.bc -f +; RUN: ignore llvm-ld -disable-opt -link-as-library %t.one.bc %t.two.bc \ +; RUN: -o %t.bc 2>%t.err +; RUN: grep "Function is already defined" %t.err + +define i32 @bar() { + ret i32 0 +} From rspencer at reidspencer.com Thu Aug 16 02:23:37 2007 From: rspencer at reidspencer.com (Reid Spencer) Date: Thu, 16 Aug 2007 07:23:37 -0000 Subject: [llvm-commits] [llvm] r41117 - /llvm/trunk/lib/Linker/LinkItems.cpp Message-ID: <200708160723.l7G7NbI5005480@zion.cs.uiuc.edu> Author: reid Date: Thu Aug 16 02:23:37 2007 New Revision: 41117 URL: http://llvm.org/viewvc/llvm-project?rev=41117&view=rev Log: Ensure that error messages a propagated from calls to LinkInModule so they get reported to the end user. Modified: llvm/trunk/lib/Linker/LinkItems.cpp Modified: llvm/trunk/lib/Linker/LinkItems.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Linker/LinkItems.cpp?rev=41117&r1=41116&r2=41117&view=diff ============================================================================== --- llvm/trunk/lib/Linker/LinkItems.cpp (original) +++ llvm/trunk/lib/Linker/LinkItems.cpp Thu Aug 16 02:23:37 2007 @@ -162,8 +162,9 @@ if (MemoryBuffer *Buffer = MemoryBuffer::getSTDIN()) { M.reset(ParseBitcodeFile(Buffer, &Error)); delete Buffer; - if (!LinkInModule(M.get())) - return false; + if (M.get()) + if (!LinkInModule(M.get(), &Error)) + return false; } else Error = "standard input is empty"; return error("Cannot link stdin: " + Error); @@ -195,7 +196,7 @@ std::auto_ptr M(LoadObject(File)); if (M.get() == 0) return error("Cannot load file '" + File.toString() + "'" + Error); - if (LinkInModule(M.get())) + if (LinkInModule(M.get(), &Error)) return error("Cannot link file '" + File.toString() + "'" + Error); verbose("Linked in file '" + File.toString() + "'"); From evan.cheng at apple.com Thu Aug 16 02:24:23 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Thu, 16 Aug 2007 07:24:23 -0000 Subject: [llvm-commits] [llvm] r41118 - in /llvm/trunk/lib/CodeGen: LiveIntervalAnalysis.cpp SimpleRegisterCoalescing.cpp Message-ID: <200708160724.l7G7ONrM005509@zion.cs.uiuc.edu> Author: evancheng Date: Thu Aug 16 02:24:22 2007 New Revision: 41118 URL: http://llvm.org/viewvc/llvm-project?rev=41118&view=rev Log: Fix some kill info update bugs; add hidden option -disable-rematerialization to turn off remat for debugging. Modified: llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Modified: llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp?rev=41118&r1=41117&r2=41118&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp (original) +++ llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp Thu Aug 16 02:24:22 2007 @@ -36,6 +36,12 @@ #include using namespace llvm; +namespace { + // Hidden options for help debugging. + cl::opt DisableReMat("disable-rematerialization", + cl::init(false), cl::Hidden); +} + STATISTIC(numIntervals, "Number of original intervals"); STATISTIC(numIntervalsAfter, "Number of intervals after coalescing"); STATISTIC(numFolded , "Number of loads/stores folded into instructions"); @@ -201,6 +207,9 @@ /// val# of the specified interval is re-materializable. bool LiveIntervals::isReMaterializable(const LiveInterval &li, unsigned ValNum, MachineInstr *MI) { + if (DisableReMat) + return false; + if (tii_->isTriviallyReMaterializable(MI)) return true; @@ -610,7 +619,7 @@ DOUT << " Removing [" << Start << "," << End << "] from: "; interval.print(DOUT, mri_); DOUT << "\n"; interval.removeRange(Start, End); - interval.addKillForValNum(0, Start-1); // odd # means phi node + interval.addKillForValNum(0, Start+1); // odd # means phi node DOUT << " RESULT: "; interval.print(DOUT, mri_); // Replace the interval with one of a NEW value number. Note that this Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp?rev=41118&r1=41117&r2=41118&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp (original) +++ llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Thu Aug 16 02:24:22 2007 @@ -683,6 +683,8 @@ RHSValNoAssignments[0] = RHSValID; if (RHSVal0DefinedFromLHS != -1) { int LHSValId = LHSValNoAssignments[RHSVal0DefinedFromLHS]; + unsigned DefIdx = RHS.getDefForValNum(0); + LiveInterval::removeKill(ValueNumberInfo[LHSValId], DefIdx); LHS.addKills(ValueNumberInfo[LHSValId], RHS.getKillsForValNum(0)); } } else { @@ -797,6 +799,8 @@ if (LHSValId == -1) continue; unsigned RHSValId = RHSValNoAssignments[i]; + unsigned DefIdx = RHS.getDefForValNum(i); + LiveInterval::removeKill(ValueNumberInfo[RHSValId], DefIdx); LHS.addKills(ValueNumberInfo[RHSValId], RHS.getKillsForValNum(i)); } for (unsigned i = 0, e = LHSValsDefinedFromRHS.size(); i != e; ++i) { @@ -804,6 +808,8 @@ if (RHSValId == -1) continue; unsigned LHSValId = LHSValNoAssignments[i]; + unsigned DefIdx = LHS.getDefForValNum(i); + LiveInterval::removeKill(ValueNumberInfo[LHSValId], DefIdx); RHS.addKills(ValueNumberInfo[LHSValId], LHS.getKillsForValNum(i)); } From evan.cheng at apple.com Thu Aug 16 02:25:37 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Thu, 16 Aug 2007 07:25:37 -0000 Subject: [llvm-commits] [llvm] r41119 - /llvm/trunk/include/llvm/CodeGen/LiveInterval.h Message-ID: <200708160725.l7G7PbHh005551@zion.cs.uiuc.edu> Author: evancheng Date: Thu Aug 16 02:25:37 2007 New Revision: 41119 URL: http://llvm.org/viewvc/llvm-project?rev=41119&view=rev Log: Comments. Modified: llvm/trunk/include/llvm/CodeGen/LiveInterval.h Modified: llvm/trunk/include/llvm/CodeGen/LiveInterval.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/LiveInterval.h?rev=41119&r1=41118&r2=41119&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/LiveInterval.h (original) +++ llvm/trunk/include/llvm/CodeGen/LiveInterval.h Thu Aug 16 02:25:37 2007 @@ -88,10 +88,14 @@ /// ValueNumberInfo - If the value number definition is undefined (e.g. phi /// merge point), it contains ~0u,x. If the value number is not in use, it /// contains ~1u,x to indicate that the value # is not used. + /// def - Instruction # of the definition. + /// reg - Source reg iff val# is defined by a copy; zero otherwise. + /// kills - Instruction # of the kills. If a kill is an odd #, it means + /// the kill is a phi join point. struct VNInfo { - unsigned def; // instruction # of the definition - unsigned reg; // src reg: non-zero iff val# is defined by a copy - SmallVector kills; // instruction #s of the kills + unsigned def; + unsigned reg; + SmallVector kills; VNInfo() : def(~1U), reg(0) {}; VNInfo(unsigned d, unsigned r) : def(d), reg(r) {}; }; From evan.cheng at apple.com Thu Aug 16 02:40:35 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Thu, 16 Aug 2007 07:40:35 -0000 Subject: [llvm-commits] [test-suite] r41120 - /test-suite/trunk/Makefile.programs Message-ID: <200708160740.l7G7eZZM010852@zion.cs.uiuc.edu> Author: evancheng Date: Thu Aug 16 02:40:34 2007 New Revision: 41120 URL: http://llvm.org/viewvc/llvm-project?rev=41120&view=rev Log: x86 / arm llcbeta is -disable-rematerialization. Modified: test-suite/trunk/Makefile.programs Modified: test-suite/trunk/Makefile.programs URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/Makefile.programs?rev=41120&r1=41119&r2=41120&view=diff ============================================================================== --- test-suite/trunk/Makefile.programs (original) +++ test-suite/trunk/Makefile.programs Thu Aug 16 02:40:34 2007 @@ -221,13 +221,16 @@ LLCBETAOPTION := -sched=simple endif ifeq ($(ARCH),x86) -LLCBETAOPTION := -regalloc=local -fast +LLCBETAOPTION := -disable-rematerialization +#-disable-fp-elim +#-regalloc=bigblock -fast endif ifeq ($(ARCH),Sparc) LLCBETAOPTION := -enable-sparc-v9-insts endif ifeq ($(ARCH),ARM) -LLCBETAOPTION := -enable-arm-if-conversion +LLCBETAOPTION := -disable-rematerialization +#-enable-arm-if-conversion #-march=thumb endif ifeq ($(ARCH),THUMB) From rspencer at reidspencer.com Thu Aug 16 02:47:30 2007 From: rspencer at reidspencer.com (Reid Spencer) Date: Thu, 16 Aug 2007 07:47:30 -0000 Subject: [llvm-commits] [llvm] r41121 - /llvm/trunk/lib/Linker/LinkItems.cpp Message-ID: <200708160747.l7G7lUtN013168@zion.cs.uiuc.edu> Author: reid Date: Thu Aug 16 02:47:30 2007 New Revision: 41121 URL: http://llvm.org/viewvc/llvm-project?rev=41121&view=rev Log: Improve error handling in the linker by: 1. Eliminate redundant error messages. LinkInFile and LinkInArchive already call the error() method in each case so there's no use telling the user again that an item couldn't be linked in. 2. Improve the formatting of error messages (separating content). 3. Change the wording for the warning about unrecognized files. Make it clear that the file is being ignored. Modified: llvm/trunk/lib/Linker/LinkItems.cpp Modified: llvm/trunk/lib/Linker/LinkItems.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Linker/LinkItems.cpp?rev=41121&r1=41120&r2=41121&view=diff ============================================================================== --- llvm/trunk/lib/Linker/LinkItems.cpp (original) +++ llvm/trunk/lib/Linker/LinkItems.cpp Thu Aug 16 02:47:30 2007 @@ -87,7 +87,7 @@ case sys::Bitcode_FileType: // LLVM ".so" file. if (LinkInFile(Pathname, is_native)) - return error("Cannot link file '" + Pathname.toString() + "'"); + return true; break; case sys::Archive_FileType: @@ -180,24 +180,24 @@ switch (sys::IdentifyFileType(Magic.c_str(), 64)) { default: assert(0 && "Bad file type identification"); case sys::Unknown_FileType: - return warning("Supposed object file '" + File.toString() + - "' not recognized as such"); + return warning("Ignoring file '" + File.toString() + + "' because does not contain bitcode."); case sys::Archive_FileType: // A user may specify an ar archive without -l, perhaps because it // is not installed as a library. Detect that and link the archive. verbose("Linking archive file '" + File.toString() + "'"); if (LinkInArchive(File, is_native)) - return error("Cannot link archive '" + File.toString() + "'"); + return true; break; case sys::Bitcode_FileType: { verbose("Linking bitcode file '" + File.toString() + "'"); std::auto_ptr M(LoadObject(File)); if (M.get() == 0) - return error("Cannot load file '" + File.toString() + "'" + Error); + return error("Cannot load file '" + File.toString() + "': " + Error); if (LinkInModule(M.get(), &Error)) - return error("Cannot link file '" + File.toString() + "'" + Error); + return error("Cannot link file '" + File.toString() + "': " + Error); verbose("Linked in file '" + File.toString() + "'"); break; From rspencer at reidspencer.com Thu Aug 16 02:58:29 2007 From: rspencer at reidspencer.com (Reid Spencer) Date: Thu, 16 Aug 2007 07:58:29 -0000 Subject: [llvm-commits] [llvm-top] r41122 - in /llvm-top/trunk: ./ README.txt Message-ID: <200708160758.l7G7wTc6013458@zion.cs.uiuc.edu> Author: reid Date: Thu Aug 16 02:58:29 2007 New Revision: 41122 URL: http://llvm.org/viewvc/llvm-project?rev=41122&view=rev Log: Update the documentation to include a description of the options command, fix some typos and relocate some content. Set the svn:ignore property to ignore checked out directories. Modified: llvm-top/trunk/ (props changed) llvm-top/trunk/README.txt Propchange: llvm-top/trunk/ ------------------------------------------------------------------------------ --- svn:ignore (original) +++ svn:ignore Thu Aug 16 02:58:29 2007 @@ -1,3 +1,11 @@ svn-commit*.tmp installed .options +sample +build.llvm-gcc-4.0 +website +llvm-gcc-4.0 +test-suite +build.llvm +llvm +support Modified: llvm-top/trunk/README.txt URL: http://llvm.org/viewvc/llvm-project/llvm-top/trunk/README.txt?rev=41122&r1=41121&r2=41122&view=diff ============================================================================== --- llvm-top/trunk/README.txt (original) +++ llvm-top/trunk/README.txt Thu Aug 16 02:58:29 2007 @@ -20,7 +20,10 @@ ./get llvm-gcc-4-0 which will check out both llvm and llvm-gcc-4-0 because the latter depends on -the former. +the former. You can check out any number of modules using the "get" script, +for example, like this: + + ./get llvm-gcc-4.0 test-suite stacker In addition to checking out software, there are several more scripts in @@ -33,16 +36,19 @@ get - check out modules and their dependencies from subversion info - get subversion information about one or more modules update - update one or more modules + options - specify options once that are "sticky" for all scripts. build - configure, compile and link one or more modules install - install one or more modules (presumes build already done) clean - clean (remove build products) one or more modules -The first three scripts just work with subversion. The last three scripts do -not dictate how to build, install or clean the modules; that is up to the -modules themselves. The only thing these scripts depend on is a file named -ModuleInfo.txt located in each module's top directory. This file can contain -the following definitions: + +The first four scripts just work with subversion or llvm-top itself. The last +three scripts implement an easier method for building, isntalling and cleaning +the LLVM modules themselves. However, these three do not dictate how to build, +install or clean the modules; that is up to the modules themselves. The only +thing these scripts depend on is a file named ModuleInfo.txt located in each +module's top directory. This file can contain the following definitions: DepModule: - the list of modules this module depends on BuildCmd: - a command to build (and configure) the module @@ -61,7 +67,7 @@ of arguments. The arguments recognized are listed below in the order they are recognized by the scripts: - VEROBSE={verbosity_level} + VERBOSE={verbosity_level} This controls how verbose the scripts are in their output. The default level is 0 which produces no output unless there's an error. At level 1 you'll get basic confirmation of the action taken. At level 2 you'll get @@ -89,7 +95,7 @@ build, install or clean commands. all - This is equivalent to specify all modules in the LLVM subversion + This is equivalent to specifying all modules in the LLVM subversion repository. Careful! All the scripts will check out EVERYTHING in the repository. @@ -111,7 +117,7 @@ 3. Specify "all" - all modules will be checked out (careful!) -So, for example: +So, for example, consider: ./build llvm-gcc-4.0 ENABLE_OPTIMIZED=1 PREFIX=/my/install/dir VERBOSE=1 @@ -120,7 +126,7 @@ 1. Check out the llvm-gcc-4.0 module 2. Check out the core module because llvm-gcc-4.0 depends on core 3. Check out the support module because core depends on support - 4. Build the support module in optimized mode and configured to install + 4. Build the support module in optimized mode and configure it to install into /my/install/dir 5. Build the core module the same way. 6. Build the llvm-gcc-4.0 module the same way. @@ -141,12 +147,6 @@ java - Java Front End (unfinished, out of date) poolalloc - The pooled allocator from Chris Lattner's thesis - -You can check out any number of modules using the "get" script, for example, -like this: - - ./get llvm-gcc-4.0 test-suite stacker - ----------------------------------------------------------------------------- Some Other Useful URLS From rafael.espindola at gmail.com Thu Aug 16 08:09:03 2007 From: rafael.espindola at gmail.com (Rafael Espindola) Date: Thu, 16 Aug 2007 13:09:03 -0000 Subject: [llvm-commits] [llvm] r41123 - /llvm/trunk/test/CodeGen/X86/byval.ll Message-ID: <200708161309.l7GD93WD021634@zion.cs.uiuc.edu> Author: rafael Date: Thu Aug 16 08:09:02 2007 New Revision: 41123 URL: http://llvm.org/viewvc/llvm-project?rev=41123&view=rev Log: add byval test Added: llvm/trunk/test/CodeGen/X86/byval.ll Added: llvm/trunk/test/CodeGen/X86/byval.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/byval.ll?rev=41123&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/X86/byval.ll (added) +++ llvm/trunk/test/CodeGen/X86/byval.ll Thu Aug 16 08:09:02 2007 @@ -0,0 +1,10 @@ +; RUN: llvm-as < %s | llc -march=x86-64 | grep movq.*8.*rsp.*rax + +%struct.s = type { i64, i64, i64 } + +define i64 @f(%struct.s* byval %a) { +entry: + %tmp2 = getelementptr %struct.s* %a, i32 0, i32 0 + %tmp3 = load i64* %tmp2, align 8 + ret i64 %tmp3 +} From sabre at nondot.org Thu Aug 16 10:56:55 2007 From: sabre at nondot.org (Chris Lattner) Date: Thu, 16 Aug 2007 15:56:55 -0000 Subject: [llvm-commits] [llvm] r41124 - in /llvm/trunk: include/llvm/ADT/APInt.h lib/Support/APInt.cpp Message-ID: <200708161556.l7GFutu9026440@zion.cs.uiuc.edu> Author: lattner Date: Thu Aug 16 10:56:55 2007 New Revision: 41124 URL: http://llvm.org/viewvc/llvm-project?rev=41124&view=rev Log: This adds a bunch of static functions that implement unsigned two's complement bignum arithmetic. They could be used to implement much of APInt, but the idea is they are enough to implement APFloat as well, which the current APInt interface is not suited for. Patch by Neil Booth! Modified: llvm/trunk/include/llvm/ADT/APInt.h llvm/trunk/lib/Support/APInt.cpp Modified: llvm/trunk/include/llvm/ADT/APInt.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/APInt.h?rev=41124&r1=41123&r2=41124&view=diff ============================================================================== --- llvm/trunk/include/llvm/ADT/APInt.h (original) +++ llvm/trunk/include/llvm/ADT/APInt.h Thu Aug 16 10:56:55 2007 @@ -19,8 +19,16 @@ #include #include +#define HOST_CHAR_BIT 8 +#define compileTimeAssert(cond) extern int CTAssert[(cond) ? 1 : -1] +#define integerPartWidth (HOST_CHAR_BIT * sizeof(llvm::integerPart)) + namespace llvm { + /* An unsigned host type used as a single part of a multi-part + bignum. */ + typedef uint64_t integerPart; + //===----------------------------------------------------------------------===// // APInt Class //===----------------------------------------------------------------------===// @@ -1038,6 +1046,124 @@ return -(*this); return *this; } + + /// @} + + /// @} + /// @name Building-block Operations for APInt and APFloat + /// @{ + + // These building block operations operate on a representation of + // arbitrary precision, two's-complement, bignum integer values. + // They should be sufficient to implement APInt and APFloat bignum + // requirements. Inputs are generally a pointer to the base of an + // array of integer parts, representing an unsigned bignum, and a + // count of how many parts there are. + + /// Sets the least significant part of a bignum to the input value, + /// and zeroes out higher parts. */ + static void tcSet(integerPart *, integerPart, unsigned int); + + /// Assign one bignum to another. + static void tcAssign(integerPart *, const integerPart *, unsigned int); + + /// Returns true if a bignum is zero, false otherwise. + static bool tcIsZero(const integerPart *, unsigned int); + + /// Extract the given bit of a bignum; returns 0 or 1. Zero-based. + static int tcExtractBit(const integerPart *, unsigned int bit); + + /// Set the given bit of a bignum. Zero-based. + static void tcSetBit(integerPart *, unsigned int bit); + + /// Returns the bit number of the least or most significant set bit + /// of a number. If the input number has no bits set -1U is + /// returned. + static unsigned int tcLSB(const integerPart *, unsigned int); + static unsigned int tcMSB(const integerPart *, unsigned int); + + /// Negate a bignum in-place. + static void tcNegate(integerPart *, unsigned int); + + /// DST += RHS + CARRY where CARRY is zero or one. Returns the + /// carry flag. + static integerPart tcAdd(integerPart *, const integerPart *, + integerPart carry, unsigned); + + /// DST -= RHS + CARRY where CARRY is zero or one. Returns the + /// carry flag. + static integerPart tcSubtract(integerPart *, const integerPart *, + integerPart carry, unsigned); + + /// DST += SRC * MULTIPLIER + PART if add is true + /// DST = SRC * MULTIPLIER + PART if add is false + /// + /// Requires 0 <= DSTPARTS <= SRCPARTS + 1. If DST overlaps SRC + /// they must start at the same point, i.e. DST == SRC. + /// + /// If DSTPARTS == SRC_PARTS + 1 no overflow occurs and zero is + /// returned. Otherwise DST is filled with the least significant + /// DSTPARTS parts of the result, and if all of the omitted higher + /// parts were zero return zero, otherwise overflow occurred and + /// return one. + static int tcMultiplyPart(integerPart *dst, const integerPart *src, + integerPart multiplier, integerPart carry, + unsigned int srcParts, unsigned int dstParts, + bool add); + + /// DST = LHS * RHS, where DST has the same width as the operands + /// and is filled with the least significant parts of the result. + /// Returns one if overflow occurred, otherwise zero. DST must be + /// disjoint from both operands. + static int tcMultiply(integerPart *, const integerPart *, + const integerPart *, unsigned); + + /// DST = LHS * RHS, where DST has twice the width as the operands. + /// No overflow occurs. DST must be disjoint from both operands. + static void tcFullMultiply(integerPart *, const integerPart *, + const integerPart *, unsigned); + + /// If RHS is zero LHS and REMAINDER are left unchanged, return one. + /// Otherwise set LHS to LHS / RHS with the fractional part + /// discarded, set REMAINDER to the remainder, return zero. i.e. + /// + /// OLD_LHS = RHS * LHS + REMAINDER + /// + /// SCRATCH is a bignum of the same size as the operands and result + /// for use by the routine; its contents need not be initialized + /// and are destroyed. LHS, REMAINDER and SCRATCH must be + /// distinct. + static int tcDivide(integerPart *lhs, const integerPart *rhs, + integerPart *remainder, integerPart *scratch, + unsigned int parts); + + /// Shift a bignum left COUNT bits. Shifted in bits are zero. + /// There are no restrictions on COUNT. + static void tcShiftLeft(integerPart *, unsigned int parts, + unsigned int count); + + /// Shift a bignum right COUNT bits. Shifted in bits are zero. + /// There are no restrictions on COUNT. + static void tcShiftRight(integerPart *, unsigned int parts, + unsigned int count); + + /// The obvious AND, OR and XOR and complement operations. + static void tcAnd(integerPart *, const integerPart *, unsigned int); + static void tcOr(integerPart *, const integerPart *, unsigned int); + static void tcXor(integerPart *, const integerPart *, unsigned int); + static void tcComplement(integerPart *, unsigned int); + + /// Comparison (unsigned) of two bignums. + static int tcCompare(const integerPart *, const integerPart *, + unsigned int); + + /// Increment a bignum in-place. Return the carry flag. + static integerPart tcIncrement(integerPart *, unsigned int); + + /// Set the least significant BITS and clear the rest. + static void tcSetLeastSignificantBits(integerPart *, unsigned int, + unsigned int bits); + /// @} }; Modified: llvm/trunk/lib/Support/APInt.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/APInt.cpp?rev=41124&r1=41123&r2=41124&view=diff ============================================================================== --- llvm/trunk/lib/Support/APInt.cpp (original) +++ llvm/trunk/lib/Support/APInt.cpp Thu Aug 16 10:56:55 2007 @@ -2012,3 +2012,569 @@ << ")\n" << std::setbase(10); } #endif + +// This implements a variety of operations on a representation of +// arbitrary precision, two's-complement, bignum integer values. + +/* Assumed by lowHalf, highHalf, partMSB and partLSB. A fairly safe + and unrestricting assumption. */ +compileTimeAssert(integerPartWidth % 2 == 0); + +#define lowBitMask(bits) (~(integerPart) 0 >> (integerPartWidth - (bits))) +#define lowHalf(part) ((part) & lowBitMask(integerPartWidth / 2)) +#define highHalf(part) ((part) >> (integerPartWidth / 2)) + +/* Some handy functions local to this file. */ +namespace { + + /* Returns the bit number of the most significant bit of a part. If + the input number has no bits set -1U is returned. */ + unsigned int + PartMSB(integerPart value) + { + unsigned int n, msb; + + if (value == 0) + return -1U; + + n = integerPartWidth / 2; + + msb = 0; + do { + if (value >> n) { + value >>= n; + msb += n; + } + + n >>= 1; + } while (n); + + return msb; + } + + /* Returns the bit number of the least significant bit of a part. + If the input number has no bits set -1U is returned. */ + unsigned int + partLSB(integerPart value) + { + unsigned int n, lsb; + + if (value == 0) + return -1U; + + lsb = integerPartWidth - 1; + n = integerPartWidth / 2; + + do { + if (value << n) { + value <<= n; + lsb -= n; + } + + n >>= 1; + } while (n); + + return lsb; + } +} + +/* Sets the least significant part of a bignum to the input value, and + zeroes out higher parts. */ +void +APInt::tcSet(integerPart *dst, integerPart part, unsigned int parts) +{ + unsigned int i; + + dst[0] = part; + for(i = 1; i < parts; i++) + dst[i] = 0; +} + +/* Assign one bignum to another. */ +void +APInt::tcAssign(integerPart *dst, const integerPart *src, unsigned int parts) +{ + unsigned int i; + + for(i = 0; i < parts; i++) + dst[i] = src[i]; +} + +/* Returns true if a bignum is zero, false otherwise. */ +bool +APInt::tcIsZero(const integerPart *src, unsigned int parts) +{ + unsigned int i; + + for(i = 0; i < parts; i++) + if (src[i]) + return false; + + return true; +} + +/* Extract the given bit of a bignum; returns 0 or 1. */ +int +APInt::tcExtractBit(const integerPart *parts, unsigned int bit) +{ + return(parts[bit / integerPartWidth] + & ((integerPart) 1 << bit % integerPartWidth)) != 0; +} + +/* Set the given bit of a bignum. */ +void +APInt::tcSetBit(integerPart *parts, unsigned int bit) +{ + parts[bit / integerPartWidth] |= (integerPart) 1 << (bit % integerPartWidth); +} + +/* Returns the bit number of the least significant bit of a number. + If the input number has no bits set -1U is returned. */ +unsigned int +APInt::tcLSB(const integerPart *parts, unsigned int n) +{ + unsigned int i, lsb; + + for(i = 0; i < n; i++) { + if (parts[i] != 0) { + lsb = partLSB(parts[i]); + + return lsb + i * integerPartWidth; + } + } + + return -1U; +} + +/* Returns the bit number of the most significant bit of a number. If + the input number has no bits set -1U is returned. */ +unsigned int +APInt::tcMSB(const integerPart *parts, unsigned int n) +{ + unsigned int msb; + + do { + --n; + + if (parts[n] != 0) { + msb = PartMSB(parts[n]); + + return msb + n * integerPartWidth; + } + } while (n); + + return -1U; +} + +/* DST += RHS + C where C is zero or one. Returns the carry flag. */ +integerPart +APInt::tcAdd(integerPart *dst, const integerPart *rhs, + integerPart c, unsigned int parts) +{ + unsigned int i; + + assert(c <= 1); + + for(i = 0; i < parts; i++) { + integerPart l; + + l = dst[i]; + if (c) { + dst[i] += rhs[i] + 1; + c = (dst[i] <= l); + } else { + dst[i] += rhs[i]; + c = (dst[i] < l); + } + } + + return c; +} + +/* DST -= RHS + C where C is zero or one. Returns the carry flag. */ +integerPart +APInt::tcSubtract(integerPart *dst, const integerPart *rhs, + integerPart c, unsigned int parts) +{ + unsigned int i; + + assert(c <= 1); + + for(i = 0; i < parts; i++) { + integerPart l; + + l = dst[i]; + if (c) { + dst[i] -= rhs[i] + 1; + c = (dst[i] >= l); + } else { + dst[i] -= rhs[i]; + c = (dst[i] > l); + } + } + + return c; +} + +/* Negate a bignum in-place. */ +void +APInt::tcNegate(integerPart *dst, unsigned int parts) +{ + tcComplement(dst, parts); + tcIncrement(dst, parts); +} + +/* DST += SRC * MULTIPLIER + PART if add is true + DST = SRC * MULTIPLIER + PART if add is false + + Requires 0 <= DSTPARTS <= SRCPARTS + 1. If DST overlaps SRC + they must start at the same point, i.e. DST == SRC. + + If DSTPARTS == SRCPARTS + 1 no overflow occurs and zero is + returned. Otherwise DST is filled with the least significant + DSTPARTS parts of the result, and if all of the omitted higher + parts were zero return zero, otherwise overflow occurred and + return one. */ +int +APInt::tcMultiplyPart(integerPart *dst, const integerPart *src, + integerPart multiplier, integerPart carry, + unsigned int srcParts, unsigned int dstParts, + bool add) +{ + unsigned int i, n; + + /* Otherwise our writes of DST kill our later reads of SRC. */ + assert(dst <= src || dst >= src + srcParts); + assert(dstParts <= srcParts + 1); + + /* N loops; minimum of dstParts and srcParts. */ + n = dstParts < srcParts ? dstParts: srcParts; + + for(i = 0; i < n; i++) { + integerPart low, mid, high, srcPart; + + /* [ LOW, HIGH ] = MULTIPLIER * SRC[i] + DST[i] + CARRY. + + This cannot overflow, because + + (n - 1) * (n - 1) + 2 (n - 1) = (n - 1) * (n + 1) + + which is less than n^2. */ + + srcPart = src[i]; + + if (multiplier == 0 || srcPart == 0) { + low = carry; + high = 0; + } else { + low = lowHalf(srcPart) * lowHalf(multiplier); + high = highHalf(srcPart) * highHalf(multiplier); + + mid = lowHalf(srcPart) * highHalf(multiplier); + high += highHalf(mid); + mid <<= integerPartWidth / 2; + if (low + mid < low) + high++; + low += mid; + + mid = highHalf(srcPart) * lowHalf(multiplier); + high += highHalf(mid); + mid <<= integerPartWidth / 2; + if (low + mid < low) + high++; + low += mid; + + /* Now add carry. */ + if (low + carry < low) + high++; + low += carry; + } + + if (add) { + /* And now DST[i], and store the new low part there. */ + if (low + dst[i] < low) + high++; + dst[i] += low; + } else + dst[i] = low; + + carry = high; + } + + if (i < dstParts) { + /* Full multiplication, there is no overflow. */ + assert(i + 1 == dstParts); + dst[i] = carry; + return 0; + } else { + /* We overflowed if there is carry. */ + if (carry) + return 1; + + /* We would overflow if any significant unwritten parts would be + non-zero. This is true if any remaining src parts are non-zero + and the multiplier is non-zero. */ + if (multiplier) + for(; i < srcParts; i++) + if (src[i]) + return 1; + + /* We fitted in the narrow destination. */ + return 0; + } +} + +/* DST = LHS * RHS, where DST has the same width as the operands and + is filled with the least significant parts of the result. Returns + one if overflow occurred, otherwise zero. DST must be disjoint + from both operands. */ +int +APInt::tcMultiply(integerPart *dst, const integerPart *lhs, + const integerPart *rhs, unsigned int parts) +{ + unsigned int i; + int overflow; + + assert(dst != lhs && dst != rhs); + + overflow = 0; + tcSet(dst, 0, parts); + + for(i = 0; i < parts; i++) + overflow |= tcMultiplyPart(&dst[i], lhs, rhs[i], 0, parts, + parts - i, true); + + return overflow; +} + +/* DST = LHS * RHS, where DST has twice the width as the operands. No + overflow occurs. DST must be disjoint from both operands. */ +void +APInt::tcFullMultiply(integerPart *dst, const integerPart *lhs, + const integerPart *rhs, unsigned int parts) +{ + unsigned int i; + int overflow; + + assert(dst != lhs && dst != rhs); + + overflow = 0; + tcSet(dst, 0, parts); + + for(i = 0; i < parts; i++) + overflow |= tcMultiplyPart(&dst[i], lhs, rhs[i], 0, parts, + parts + 1, true); + + assert(!overflow); +} + +/* If RHS is zero LHS and REMAINDER are left unchanged, return one. + Otherwise set LHS to LHS / RHS with the fractional part discarded, + set REMAINDER to the remainder, return zero. i.e. + + OLD_LHS = RHS * LHS + REMAINDER + + SCRATCH is a bignum of the same size as the operands and result for + use by the routine; its contents need not be initialized and are + destroyed. LHS, REMAINDER and SCRATCH must be distinct. +*/ +int +APInt::tcDivide(integerPart *lhs, const integerPart *rhs, + integerPart *remainder, integerPart *srhs, + unsigned int parts) +{ + unsigned int n, shiftCount; + integerPart mask; + + assert(lhs != remainder && lhs != srhs && remainder != srhs); + + shiftCount = tcMSB(rhs, parts); + if (shiftCount == -1U) + return true; + + shiftCount = parts * integerPartWidth - shiftCount - 1; + n = shiftCount / integerPartWidth; + mask = (integerPart) 1 << (shiftCount % integerPartWidth); + + tcAssign(srhs, rhs, parts); + tcShiftLeft(srhs, parts, shiftCount); + tcAssign(remainder, lhs, parts); + tcSet(lhs, 0, parts); + + /* Loop, subtracting SRHS if REMAINDER is greater and adding that to + the total. */ + for(;;) { + int compare; + + compare = tcCompare(remainder, srhs, parts); + if (compare >= 0) { + tcSubtract(remainder, srhs, 0, parts); + lhs[n] |= mask; + } + + if (shiftCount == 0) + break; + shiftCount--; + tcShiftRight(srhs, parts, 1); + if ((mask >>= 1) == 0) + mask = (integerPart) 1 << (integerPartWidth - 1), n--; + } + + return false; +} + +/* Shift a bignum left COUNT bits in-place. Shifted in bits are zero. + There are no restrictions on COUNT. */ +void +APInt::tcShiftLeft(integerPart *dst, unsigned int parts, unsigned int count) +{ + unsigned int jump, shift; + + /* Jump is the inter-part jump; shift is is intra-part shift. */ + jump = count / integerPartWidth; + shift = count % integerPartWidth; + + while (parts > jump) { + integerPart part; + + parts--; + + /* dst[i] comes from the two parts src[i - jump] and, if we have + an intra-part shift, src[i - jump - 1]. */ + part = dst[parts - jump]; + if (shift) { + part <<= shift; + if (parts >= jump + 1) + part |= dst[parts - jump - 1] >> (integerPartWidth - shift); + } + + dst[parts] = part; + } + + while (parts > 0) + dst[--parts] = 0; +} + +/* Shift a bignum right COUNT bits in-place. Shifted in bits are + zero. There are no restrictions on COUNT. */ +void +APInt::tcShiftRight(integerPart *dst, unsigned int parts, unsigned int count) +{ + unsigned int i, jump, shift; + + /* Jump is the inter-part jump; shift is is intra-part shift. */ + jump = count / integerPartWidth; + shift = count % integerPartWidth; + + /* Perform the shift. This leaves the most significant COUNT bits + of the result at zero. */ + for(i = 0; i < parts; i++) { + integerPart part; + + if (i + jump >= parts) { + part = 0; + } else { + part = dst[i + jump]; + if (shift) { + part >>= shift; + if (i + jump + 1 < parts) + part |= dst[i + jump + 1] << (integerPartWidth - shift); + } + } + + dst[i] = part; + } +} + +/* Bitwise and of two bignums. */ +void +APInt::tcAnd(integerPart *dst, const integerPart *rhs, unsigned int parts) +{ + unsigned int i; + + for(i = 0; i < parts; i++) + dst[i] &= rhs[i]; +} + +/* Bitwise inclusive or of two bignums. */ +void +APInt::tcOr(integerPart *dst, const integerPart *rhs, unsigned int parts) +{ + unsigned int i; + + for(i = 0; i < parts; i++) + dst[i] |= rhs[i]; +} + +/* Bitwise exclusive or of two bignums. */ +void +APInt::tcXor(integerPart *dst, const integerPart *rhs, unsigned int parts) +{ + unsigned int i; + + for(i = 0; i < parts; i++) + dst[i] ^= rhs[i]; +} + +/* Complement a bignum in-place. */ +void +APInt::tcComplement(integerPart *dst, unsigned int parts) +{ + unsigned int i; + + for(i = 0; i < parts; i++) + dst[i] = ~dst[i]; +} + +/* Comparison (unsigned) of two bignums. */ +int +APInt::tcCompare(const integerPart *lhs, const integerPart *rhs, + unsigned int parts) +{ + while (parts) { + parts--; + if (lhs[parts] == rhs[parts]) + continue; + + if (lhs[parts] > rhs[parts]) + return 1; + else + return -1; + } + + return 0; +} + +/* Increment a bignum in-place, return the carry flag. */ +integerPart +APInt::tcIncrement(integerPart *dst, unsigned int parts) +{ + unsigned int i; + + for(i = 0; i < parts; i++) + if (++dst[i] != 0) + break; + + return i == parts; +} + +/* Set the least significant BITS bits of a bignum, clear the + rest. */ +void +APInt::tcSetLeastSignificantBits(integerPart *dst, unsigned int parts, + unsigned int bits) +{ + unsigned int i; + + i = 0; + while (bits > integerPartWidth) { + dst[i++] = ~(integerPart) 0; + bits -= integerPartWidth; + } + + if (bits) + dst[i++] = ~(integerPart) 0 >> (integerPartWidth - bits); + + while (i < parts) + dst[i++] = 0; +} From raulherbster at gmail.com Thu Aug 16 16:07:55 2007 From: raulherbster at gmail.com (Raul Fernandes Herbster) Date: Thu, 16 Aug 2007 18:07:55 -0300 Subject: [llvm-commits] [PATCH] JIT support for ARM Message-ID: <6fbb4ff20708161407u49bd1833k8e6d147371d9515@mail.gmail.com> Multiply instructions are being generated. ARM/JIT runs an application with no calls to local functions, but library functions calls are supported. I hope fix such problem soon. Please, send me any feedback. Thanks in advance, Raul. -- Raul Fernandes Herbster Embedded and Pervasive Computing Laboratory - embedded.dee.ufcg.edu.br Electrical Engineering Department - DEE - www.dee.ufcg.edu.br Electrical Engineering and Informatics Center - CEEI Federal University of Campina Grande - UFCG - www.ufcg.edu.br Caixa Postal 10105 58109-970 Campina Grande - PB - Brasil -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20070816/b864f485/attachment.html -------------- next part -------------- A non-text attachment was scrubbed... Name: patch Type: application/octet-stream Size: 17507 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20070816/b864f485/attachment.obj From asl at math.spbu.ru Thu Aug 16 16:17:07 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Thu, 16 Aug 2007 21:17:07 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r41125 - /llvm-gcc-4.2/trunk/gcc/fortran/f95-lang.c Message-ID: <200708162117.l7GLH7Cw010379@zion.cs.uiuc.edu> Author: asl Date: Thu Aug 16 16:17:06 2007 New Revision: 41125 URL: http://llvm.org/viewvc/llvm-project?rev=41125&view=rev Log: Fix merge conflict. This enables gfortran build on llvm-gcc 4.2 branch Modified: llvm-gcc-4.2/trunk/gcc/fortran/f95-lang.c Modified: llvm-gcc-4.2/trunk/gcc/fortran/f95-lang.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/fortran/f95-lang.c?rev=41125&r1=41124&r2=41125&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/fortran/f95-lang.c (original) +++ llvm-gcc-4.2/trunk/gcc/fortran/f95-lang.c Thu Aug 16 16:17:06 2007 @@ -175,9 +175,6 @@ void pointer_int_sum (void); void decl_constant_value (void); void lookup_name (void); -tree decl_attributes (tree *ARG_UNUSED (tp), - tree ARG_UNUSED (p), - int ARG_UNUSED (s)); void build_modify_expr (void) { abort (); } void iasm_addr (void) { abort (); } void iasm_build_bracket (void) { abort (); } @@ -190,57 +187,8 @@ void pointer_int_sum (void) { abort (); } void decl_constant_value (void) { abort (); } void lookup_name (void) { abort (); } -tree decl_attributes (tree *ARG_UNUSED (tp), - tree ARG_UNUSED (p), - int ARG_UNUSED (s)) -{ - abort (); -} /* APPLE LOCAL end CW asm blocks */ -/* APPLE LOCAL begin 4174833 */ -tree objc_is_class_name (tree ARG_UNUSED (arg)); - -bool objc_method_decl (enum tree_code ARG_UNUSED (opcode)); -bool -objc_method_decl (enum tree_code ARG_UNUSED (opcode)) -{ - return false; -} -/* APPLE LOCAL end 4174833 */ -/* APPLE LOCAL begin radar 4441049 */ -tree objc_v2_bitfield_ivar_bitpos (tree); - -tree -objc_v2_bitfield_ivar_bitpos (tree ARG_UNUSED (exp)) -{ - return 0; -} - -tree objc_v2_component_ref_field_offset (tree); - -tree -objc_v2_component_ref_field_offset (tree ARG_UNUSED (exp)) -{ - return 0; -} -/* APPLE LOCAL end radar 4441049 */ -/* APPLE LOCAL begin fariborz 2996215 */ -tree objc_create_init_utf16_var (void); -tree -objc_create_init_utf16_var (void) -{ - return NULL; -} - -bool objc_anonymous_local_objc_name (const char * ARG_UNUSED (name)); -bool -objc_anonymous_local_objc_name (const char * ARG_UNUSED (name)) -{ - return false; -} -/* APPLE LOCAL end fariborz 2996215 */ - /* A list (chain of TREE_LIST nodes) of all LABEL_DECLs in the function that have names. Here so we can clear out their names' definitions at the end of the function. */ From resistor at mac.com Thu Aug 16 16:27:05 2007 From: resistor at mac.com (Owen Anderson) Date: Thu, 16 Aug 2007 21:27:05 -0000 Subject: [llvm-commits] [llvm] r41126 - in /llvm/trunk: include/llvm/Analysis/MemoryDependenceAnalysis.h lib/Analysis/MemoryDependenceAnalysis.cpp Message-ID: <200708162127.l7GLR68Z011290@zion.cs.uiuc.edu> Author: resistor Date: Thu Aug 16 16:27:05 2007 New Revision: 41126 URL: http://llvm.org/viewvc/llvm-project?rev=41126&view=rev Log: Cache non-local memory dependence analysis. This is a significant compile time performance win in most cases. Modified: llvm/trunk/include/llvm/Analysis/MemoryDependenceAnalysis.h llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp Modified: llvm/trunk/include/llvm/Analysis/MemoryDependenceAnalysis.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/MemoryDependenceAnalysis.h?rev=41126&r1=41125&r2=41126&view=diff ============================================================================== --- llvm/trunk/include/llvm/Analysis/MemoryDependenceAnalysis.h (original) +++ llvm/trunk/include/llvm/Analysis/MemoryDependenceAnalysis.h Thu Aug 16 16:27:05 2007 @@ -37,12 +37,20 @@ depMapType; depMapType depGraphLocal; + // A map from instructions to their non-local dependencies. + typedef DenseMap > + nonLocalDepMapType; + nonLocalDepMapType depGraphNonLocal; + // A reverse mapping form dependencies to the dependees. This is // used when removing instructions to keep the cache coherent. - typedef DenseMap > + typedef DenseMap > reverseDepMapType; reverseDepMapType reverseDep; + // A reverse mapping form dependencies to the non-local dependees. + reverseDepMapType reverseDepNonLocal; + public: // Special marker indicating that the query has no dependency // in the specified block. @@ -61,7 +69,9 @@ /// Clean up memory in between runs void releaseMemory() { depGraphLocal.clear(); + depGraphNonLocal.clear(); reverseDep.clear(); + reverseDepNonLocal.clear(); } /// getAnalysisUsage - Does not modify anything. It uses Value Numbering Modified: llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp?rev=41126&r1=41125&r2=41126&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp (original) +++ llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp Thu Aug 16 16:27:05 2007 @@ -203,6 +203,11 @@ /// blocks between the query and its dependencies. void MemoryDependenceAnalysis::getNonLocalDependency(Instruction* query, DenseMap& resp) { + if (depGraphNonLocal.count(query)) { + resp = depGraphNonLocal[query]; + return; + } + // First check that we don't actually have a local dependency. Instruction* localDep = getDependency(query); if (localDep != NonLocal) { @@ -212,6 +217,13 @@ // If not, go ahead and search for non-local ones. nonLocalHelper(query, query->getParent(), resp); + + // Update the non-local dependency cache + for (DenseMap::iterator I = resp.begin(), E = resp.end(); + I != E; ++I) { + depGraphNonLocal[query].insert(*I); + reverseDepNonLocal[I->second].insert(query); + } } /// getDependency - Return the instruction on which a memory operation @@ -380,8 +392,6 @@ Instruction* newDep = NonLocal; depMapType::iterator depGraphEntry = depGraphLocal.find(rem); - // We assume here that it's not in the reverse map if it's not in - // the dep map. Checking it could be expensive, so don't do it. if (depGraphEntry != depGraphLocal.end()) { if (depGraphEntry->second.first != NonLocal && @@ -410,8 +420,18 @@ // Mark it as unconfirmed as long as it is not the non-local flag depGraphLocal[*I] = std::make_pair(newDep, !newDep); } + reverseDep.erase(rem); } + + if (depGraphNonLocal.count(rem)) { + SmallPtrSet& set = reverseDepNonLocal[rem]; + for (SmallPtrSet::iterator I = set.begin(), E = set.end(); + I != E; ++I) + depGraphNonLocal.erase(*I); + + reverseDepNonLocal.erase(rem); + } getAnalysis().deleteValue(rem); } From djg at cray.com Thu Aug 16 16:57:20 2007 From: djg at cray.com (Dan Gohman) Date: Thu, 16 Aug 2007 21:57:20 -0000 Subject: [llvm-commits] [llvm] r41128 - in /llvm/trunk: include/llvm/CodeGen/ValueTypes.h include/llvm/CodeGen/ValueTypes.td include/llvm/Intrinsics.td lib/VMCore/Verifier.cpp utils/TableGen/CodeGenTarget.cpp utils/TableGen/IntrinsicEmitter.cpp Message-ID: <200708162157.l7GLvKHW014783@zion.cs.uiuc.edu> Author: djg Date: Thu Aug 16 16:57:19 2007 New Revision: 41128 URL: http://llvm.org/viewvc/llvm-project?rev=41128&view=rev Log: Add MVT::fAny for overloading intrinsics on floating-point types. Modified: llvm/trunk/include/llvm/CodeGen/ValueTypes.h llvm/trunk/include/llvm/CodeGen/ValueTypes.td llvm/trunk/include/llvm/Intrinsics.td llvm/trunk/lib/VMCore/Verifier.cpp llvm/trunk/utils/TableGen/CodeGenTarget.cpp llvm/trunk/utils/TableGen/IntrinsicEmitter.cpp Modified: llvm/trunk/include/llvm/CodeGen/ValueTypes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/ValueTypes.h?rev=41128&r1=41127&r2=41128&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/ValueTypes.h (original) +++ llvm/trunk/include/llvm/CodeGen/ValueTypes.h Thu Aug 16 16:57:19 2007 @@ -67,6 +67,11 @@ LAST_VALUETYPE = 27, // This always remains at the end of the list. + // fAny - Any floating-point or vector floating-point value. This is used + // for intrinsics that have overloadings based on floating-point types. + // This is only for tblgen's consumption! + fAny = 253, + // iAny - An integer or vector integer value of any bit width. This is // used for intrinsics that have overloadings based on integer bit widths. // This is only for tblgen's consumption! Modified: llvm/trunk/include/llvm/CodeGen/ValueTypes.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/ValueTypes.td?rev=41128&r1=41127&r2=41128&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/ValueTypes.td (original) +++ llvm/trunk/include/llvm/CodeGen/ValueTypes.td Thu Aug 16 16:57:19 2007 @@ -49,6 +49,9 @@ def v4f32 : ValueType<128, 25>; // 4 x f32 vector value def v2f64 : ValueType<128, 26>; // 2 x f64 vector value +// Pseudo valuetype to represent "float of any format" +def fAny : ValueType<0 , 253>; + // Pseudo valuetype to represent "integer of any bit width" def iAny : ValueType<0 , 254>; Modified: llvm/trunk/include/llvm/Intrinsics.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Intrinsics.td?rev=41128&r1=41127&r2=41128&view=diff ============================================================================== --- llvm/trunk/include/llvm/Intrinsics.td (original) +++ llvm/trunk/include/llvm/Intrinsics.td Thu Aug 16 16:57:19 2007 @@ -68,6 +68,7 @@ def llvm_void_ty : LLVMType; def llvm_anyint_ty : LLVMType; +def llvm_anyfloat_ty : LLVMType; def llvm_i1_ty : LLVMType; def llvm_i8_ty : LLVMType; def llvm_i16_ty : LLVMType; Modified: llvm/trunk/lib/VMCore/Verifier.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Verifier.cpp?rev=41128&r1=41127&r2=41128&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Verifier.cpp (original) +++ llvm/trunk/lib/VMCore/Verifier.cpp Thu Aug 16 16:57:19 2007 @@ -1157,6 +1157,20 @@ CheckFailed("Intrinsic requires even byte width argument", F); break; } + } else if (VT == MVT::fAny) { + Suffix += "."; + if (EltTy != Ty) + Suffix += "v" + utostr(NumElts); + Suffix += MVT::getValueTypeString(MVT::getValueType(EltTy)); + if (!EltTy->isFloatingPoint()) { + if (ArgNo == 0) + CheckFailed("Intrinsic result type is not " + "a floating-point type.", F); + else + CheckFailed("Intrinsic parameter #" + utostr(ArgNo-1) + " is not " + "a floating-point type.", F); + break; + } } else if (VT == MVT::iPTR) { if (!isa(Ty)) { CheckFailed("Intrinsic parameter #" + utostr(ArgNo-1) + " is not a " Modified: llvm/trunk/utils/TableGen/CodeGenTarget.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenTarget.cpp?rev=41128&r1=41127&r2=41128&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/CodeGenTarget.cpp (original) +++ llvm/trunk/utils/TableGen/CodeGenTarget.cpp Thu Aug 16 16:57:19 2007 @@ -44,6 +44,7 @@ case MVT::i64: return "MVT::i64"; case MVT::i128: return "MVT::i128"; case MVT::iAny: return "MVT::iAny"; + case MVT::fAny: return "MVT::fAny"; case MVT::f32: return "MVT::f32"; case MVT::f64: return "MVT::f64"; case MVT::f80: return "MVT::f80"; @@ -78,6 +79,7 @@ case MVT::i64: return "MVT::i64"; case MVT::i128: return "MVT::i128"; case MVT::iAny: return "MVT::iAny"; + case MVT::fAny: return "MVT::fAny"; case MVT::f32: return "MVT::f32"; case MVT::f64: return "MVT::f64"; case MVT::f80: return "MVT::f80"; @@ -652,7 +654,7 @@ Record *TyEl = TypeList->getElementAsRecord(i); assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!"); MVT::ValueType VT = getValueType(TyEl->getValueAsDef("VT")); - isOverloaded |= VT == MVT::iAny; + isOverloaded |= VT == MVT::iAny || VT == MVT::fAny; ArgVTs.push_back(VT); ArgTypeDefs.push_back(TyEl); } Modified: llvm/trunk/utils/TableGen/IntrinsicEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/IntrinsicEmitter.cpp?rev=41128&r1=41127&r2=41128&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/IntrinsicEmitter.cpp (original) +++ llvm/trunk/utils/TableGen/IntrinsicEmitter.cpp Thu Aug 16 16:57:19 2007 @@ -146,7 +146,7 @@ unsigned Number = ArgType->getValueAsInt("Number"); assert(Number < ArgNo && "Invalid matching number!"); OS << "Tys[" << Number << "]"; - } else if (VT == MVT::iAny) { + } else if (VT == MVT::iAny || VT == MVT::fAny) { // NOTE: The ArgNo variable here is not the absolute argument number, it is // the index of the "arbitrary" type in the Tys array passed to the // Intrinsic::getDeclaration function. Consequently, we only want to From resistor at mac.com Thu Aug 16 17:02:55 2007 From: resistor at mac.com (Owen Anderson) Date: Thu, 16 Aug 2007 22:02:55 -0000 Subject: [llvm-commits] [llvm] r41129 - /llvm/trunk/lib/Transforms/Scalar/GVN.cpp Message-ID: <200708162202.l7GM2ufH015317@zion.cs.uiuc.edu> Author: resistor Date: Thu Aug 16 17:02:55 2007 New Revision: 41129 URL: http://llvm.org/viewvc/llvm-project?rev=41129&view=rev Log: Add some more comments to GVN. Modified: llvm/trunk/lib/Transforms/Scalar/GVN.cpp Modified: llvm/trunk/lib/Transforms/Scalar/GVN.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/GVN.cpp?rev=41129&r1=41128&r2=41129&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/GVN.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/GVN.cpp Thu Aug 16 17:02:55 2007 @@ -756,6 +756,7 @@ PN->addIncoming(val, *PI); } + // Attempt to collapse PHI nodes that are trivially redundant Value* v = PN->hasConstantValue(); if (v) { if (Instruction* inst = dyn_cast(v)) { @@ -804,19 +805,24 @@ } } + // Cache our phi construction results phiMap[orig->getPointerOperand()].insert(PN); return PN; } +/// processNonLocalLoad - Attempt to eliminate a load whose dependencies are +/// non-local by performing PHI construction. bool GVN::processNonLocalLoad(LoadInst* L, SmallVector& toErase) { MemoryDependenceAnalysis& MD = getAnalysis(); + // Find the non-local dependencies of the load DenseMap deps; MD.getNonLocalDependency(L, deps); DenseMap repl; + // Filter out useless results (non-locals, etc) for (DenseMap::iterator I = deps.begin(), E = deps.end(); I != E; ++I) if (I->second == MemoryDependenceAnalysis::None) { @@ -837,6 +843,7 @@ return false; } + // Use cached PHI construction information from previous runs SmallPtrSet& p = phiMap[L->getPointerOperand()]; for (SmallPtrSet::iterator I = p.begin(), E = p.end(); I != E; ++I) { @@ -852,6 +859,7 @@ } } + // Perform PHI construction SmallPtrSet visited; Value* v = GetValueForBlock(L->getParent(), L, repl, true); @@ -863,6 +871,8 @@ return true; } +/// processLoad - Attempt to eliminate a load, first by eliminating it +/// locally, and then attempting non-local elimination if that fails. bool GVN::processLoad(LoadInst* L, DenseMap& lastLoad, SmallVector& toErase) { @@ -891,6 +901,8 @@ bool deletedLoad = false; + // Walk up the dependency chain until we either find + // a dependency we can use, or we can't walk any further while (dep != MemoryDependenceAnalysis::None && dep != MemoryDependenceAnalysis::NonLocal && (isa(dep) || isa(dep))) { @@ -946,6 +958,7 @@ unsigned num = VN.lookup_or_add(I); + // Collapse PHI nodes if (PHINode* p = dyn_cast(I)) { Value* constVal = p->hasConstantValue(); @@ -966,6 +979,7 @@ toErase.push_back(p); } } + // Perform value-number based elimination } else if (currAvail.test(num)) { Value* repl = find_leader(currAvail, num); From djg at cray.com Thu Aug 16 17:06:45 2007 From: djg at cray.com (Dan Gohman) Date: Thu, 16 Aug 2007 22:06:45 -0000 Subject: [llvm-commits] [llvm] r41130 - /llvm/trunk/lib/VMCore/Verifier.cpp Message-ID: <200708162206.l7GM6ked015509@zion.cs.uiuc.edu> Author: djg Date: Thu Aug 16 17:06:45 2007 New Revision: 41130 URL: http://llvm.org/viewvc/llvm-project?rev=41130&view=rev Log: Fix the verification for overloaded intrinsic types. Check that they are what they're supposed to be before using them. Modified: llvm/trunk/lib/VMCore/Verifier.cpp Modified: llvm/trunk/lib/VMCore/Verifier.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Verifier.cpp?rev=41130&r1=41129&r2=41130&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Verifier.cpp (original) +++ llvm/trunk/lib/VMCore/Verifier.cpp Thu Aug 16 17:06:45 2007 @@ -1144,6 +1144,15 @@ } } } else if (VT == MVT::iAny) { + if (!EltTy->isInteger()) { + if (ArgNo == 0) + CheckFailed("Intrinsic result type is not " + "an integer type.", F); + else + CheckFailed("Intrinsic parameter #" + utostr(ArgNo-1) + " is not " + "an integer type.", F); + break; + } unsigned GotBits = cast(EltTy)->getBitWidth(); Suffix += "."; if (EltTy != Ty) @@ -1158,10 +1167,6 @@ break; } } else if (VT == MVT::fAny) { - Suffix += "."; - if (EltTy != Ty) - Suffix += "v" + utostr(NumElts); - Suffix += MVT::getValueTypeString(MVT::getValueType(EltTy)); if (!EltTy->isFloatingPoint()) { if (ArgNo == 0) CheckFailed("Intrinsic result type is not " @@ -1171,10 +1176,18 @@ "a floating-point type.", F); break; } + Suffix += "."; + if (EltTy != Ty) + Suffix += "v" + utostr(NumElts); + Suffix += MVT::getValueTypeString(MVT::getValueType(EltTy)); } else if (VT == MVT::iPTR) { if (!isa(Ty)) { - CheckFailed("Intrinsic parameter #" + utostr(ArgNo-1) + " is not a " - "pointer and a pointer is required.", F); + if (ArgNo == 0) + CheckFailed("Intrinsic result type is not a " + "pointer and a pointer is required.", F); + else + CheckFailed("Intrinsic parameter #" + utostr(ArgNo-1) + " is not a " + "pointer and a pointer is required.", F); break; } } else if (MVT::isVector(VT)) { From resistor at mac.com Thu Aug 16 17:51:56 2007 From: resistor at mac.com (Owen Anderson) Date: Thu, 16 Aug 2007 22:51:56 -0000 Subject: [llvm-commits] [llvm] r41131 - /llvm/trunk/lib/Transforms/Scalar/GVN.cpp Message-ID: <200708162251.l7GMpu5J018603@zion.cs.uiuc.edu> Author: resistor Date: Thu Aug 16 17:51:56 2007 New Revision: 41131 URL: http://llvm.org/viewvc/llvm-project?rev=41131&view=rev Log: Factor out some code into a helper function. Modified: llvm/trunk/lib/Transforms/Scalar/GVN.cpp Modified: llvm/trunk/lib/Transforms/Scalar/GVN.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/GVN.cpp?rev=41131&r1=41130&r2=41131&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/GVN.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/GVN.cpp Thu Aug 16 17:51:56 2007 @@ -672,6 +672,7 @@ bool top_level = false); void dump(DenseMap& d); bool iterateOnFunction(Function &F); + Value* CollapsePhi(PHINode* p); }; char GVN::ID = 0; @@ -723,6 +724,21 @@ printf("}\n"); } +Value* GVN::CollapsePhi(PHINode* p) { + DominatorTree &DT = getAnalysis(); + Value* constVal = p->hasConstantValue(); + + if (constVal) { + if (Instruction* inst = dyn_cast(constVal)) { + if (DT.dominates(inst, p)) + return inst; + } else { + return constVal; + } + } + + return 0; +} /// GetValueForBlock - Get the value to use within the specified basic block. /// available values are in Phis. @@ -757,52 +773,23 @@ } // Attempt to collapse PHI nodes that are trivially redundant - Value* v = PN->hasConstantValue(); + Value* v = CollapsePhi(PN); if (v) { - if (Instruction* inst = dyn_cast(v)) { - DominatorTree &DT = getAnalysis(); - if (DT.dominates(inst, PN)) { - MemoryDependenceAnalysis& MD = getAnalysis(); - - MD.removeInstruction(PN); - PN->replaceAllUsesWith(inst); - - SmallVector toRemove; - for (DenseMap::iterator I = Phis.begin(), - E = Phis.end(); I != E; ++I) - if (I->second == PN) - toRemove.push_back(I->first); - for (SmallVector::iterator I = toRemove.begin(), - E= toRemove.end(); I != E; ++I) - Phis[*I] = inst; + MemoryDependenceAnalysis& MD = getAnalysis(); - PN->eraseFromParent(); + MD.removeInstruction(PN); + PN->replaceAllUsesWith(v); - Phis[BB] = inst; + for (DenseMap::iterator I = Phis.begin(), + E = Phis.end(); I != E; ++I) + if (I->second == PN) + I->second = v; - return inst; - } - } else { - MemoryDependenceAnalysis& MD = getAnalysis(); - - MD.removeInstruction(PN); - PN->replaceAllUsesWith(v); - - SmallVector toRemove; - for (DenseMap::iterator I = Phis.begin(), - E = Phis.end(); I != E; ++I) - if (I->second == PN) - toRemove.push_back(I->first); - for (SmallVector::iterator I = toRemove.begin(), - E= toRemove.end(); I != E; ++I) - Phis[*I] = v; + PN->eraseFromParent(); - PN->eraseFromParent(); + Phis[BB] = v; - Phis[BB] = v; - - return v; - } + return v; } // Cache our phi construction results @@ -960,24 +947,16 @@ // Collapse PHI nodes if (PHINode* p = dyn_cast(I)) { - Value* constVal = p->hasConstantValue(); + Value* constVal = CollapsePhi(p); if (constVal) { - if (Instruction* inst = dyn_cast(constVal)) { - DominatorTree &DT = getAnalysis(); - if (DT.dominates(inst, p)) { - for (PhiMapType::iterator PI = phiMap.begin(), PE = phiMap.end(); - PI != PE; ++PI) - if (PI->second.count(p)) - PI->second.erase(p); + for (PhiMapType::iterator PI = phiMap.begin(), PE = phiMap.end(); + PI != PE; ++PI) + if (PI->second.count(p)) + PI->second.erase(p); - p->replaceAllUsesWith(inst); - toErase.push_back(p); - } - } else { - p->replaceAllUsesWith(constVal); - toErase.push_back(p); - } + p->replaceAllUsesWith(constVal); + toErase.push_back(p); } // Perform value-number based elimination } else if (currAvail.test(num)) { From evan.cheng at apple.com Thu Aug 16 18:46:33 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Thu, 16 Aug 2007 23:46:33 -0000 Subject: [llvm-commits] [llvm] r41132 - /llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Message-ID: <200708162346.l7GNkXtK020331@zion.cs.uiuc.edu> Author: evancheng Date: Thu Aug 16 18:46:29 2007 New Revision: 41132 URL: http://llvm.org/viewvc/llvm-project?rev=41132&view=rev Log: - If a dynamic_stackalloc alignment requirement is <= stack alignment, then the alignment argument is ignored. - *Always* round up the size of the allocation to multiples of stack alignment to ensure the stack ptr is never left in an invalid state after a dynamic_stackalloc. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=41132&r1=41131&r2=41132&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Thu Aug 16 18:46:29 2007 @@ -2329,21 +2329,21 @@ AllocSize = DAG.getNode(ISD::MUL, IntPtr, AllocSize, getIntPtrConstant(TySize)); - // Handle alignment. If the requested alignment is less than the stack - // alignment, ignore it and round the size of the allocation up to the stack - // alignment size. If the size is greater than or equal to the stack - // alignment, we note this in the DYNAMIC_STACKALLOC node. + // Handle alignment. If the requested alignment is less than or equal to + // the stack alignment, ignore it. If the size is greater than or equal to + // the stack alignment, we note this in the DYNAMIC_STACKALLOC node. unsigned StackAlign = TLI.getTargetMachine().getFrameInfo()->getStackAlignment(); - if (Align < StackAlign) { + if (Align <= StackAlign) Align = 0; - // Add SA-1 to the size. - AllocSize = DAG.getNode(ISD::ADD, AllocSize.getValueType(), AllocSize, - getIntPtrConstant(StackAlign-1)); - // Mask out the low bits for alignment purposes. - AllocSize = DAG.getNode(ISD::AND, AllocSize.getValueType(), AllocSize, - getIntPtrConstant(~(uint64_t)(StackAlign-1))); - } + + // Round the size of the allocation up to the stack alignment size + // by add SA-1 to the size. + AllocSize = DAG.getNode(ISD::ADD, AllocSize.getValueType(), AllocSize, + getIntPtrConstant(StackAlign-1)); + // Mask out the low bits for alignment purposes. + AllocSize = DAG.getNode(ISD::AND, AllocSize.getValueType(), AllocSize, + getIntPtrConstant(~(uint64_t)(StackAlign-1))); SDOperand Ops[] = { getRoot(), AllocSize, getIntPtrConstant(Align) }; const MVT::ValueType *VTs = DAG.getNodeValueTypes(AllocSize.getValueType(), From evan.cheng at apple.com Thu Aug 16 18:50:06 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Thu, 16 Aug 2007 23:50:06 -0000 Subject: [llvm-commits] [llvm] r41133 - /llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Message-ID: <200708162350.l7GNo7qM020440@zion.cs.uiuc.edu> Author: evancheng Date: Thu Aug 16 18:50:06 2007 New Revision: 41133 URL: http://llvm.org/viewvc/llvm-project?rev=41133&view=rev Log: If dynamic_stackalloc alignment is > stack alignment, first issue an instruction to align the stack ptr before the decrement. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=41133&r1=41132&r2=41133&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Thu Aug 16 18:50:06 2007 @@ -15,6 +15,7 @@ #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineFrameInfo.h" #include "llvm/CodeGen/MachineJumpTableInfo.h" +#include "llvm/Target/TargetFrameInfo.h" #include "llvm/Target/TargetLowering.h" #include "llvm/Target/TargetData.h" #include "llvm/Target/TargetMachine.h" @@ -1355,6 +1356,7 @@ AddLegalizedOperand(SDOperand(Node, 1), Result.getValue(1)); return Result.getValue(Op.ResNo); case ISD::DYNAMIC_STACKALLOC: { + MVT::ValueType VT = Node->getValueType(0); Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain. Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the size. Tmp3 = LegalizeOp(Node->getOperand(2)); // Legalize the alignment. @@ -1362,8 +1364,7 @@ Tmp1 = Result.getValue(0); Tmp2 = Result.getValue(1); - switch (TLI.getOperationAction(Node->getOpcode(), - Node->getValueType(0))) { + switch (TLI.getOperationAction(Node->getOpcode(), VT)) { default: assert(0 && "This action is not supported yet!"); case TargetLowering::Expand: { unsigned SPReg = TLI.getStackPointerRegisterToSaveRestore(); @@ -1371,9 +1372,15 @@ " not tell us which reg is the stack pointer!"); SDOperand Chain = Tmp1.getOperand(0); SDOperand Size = Tmp2.getOperand(1); - SDOperand SP = DAG.getCopyFromReg(Chain, SPReg, Node->getValueType(0)); - Tmp1 = DAG.getNode(ISD::SUB, Node->getValueType(0), SP, Size); // Value - Tmp2 = DAG.getCopyToReg(SP.getValue(1), SPReg, Tmp1); // Output chain + SDOperand SP = DAG.getCopyFromReg(Chain, SPReg, VT); + Chain = SP.getValue(1); + unsigned Align = cast(Tmp3)->getValue(); + unsigned StackAlign = + TLI.getTargetMachine().getFrameInfo()->getStackAlignment(); + if (Align > StackAlign) + SP = DAG.getNode(ISD::AND, VT, SP, DAG.getConstant(-Align, VT)); + Tmp1 = DAG.getNode(ISD::SUB, VT, SP, Size); // Value + Tmp2 = DAG.getCopyToReg(Chain, SPReg, Tmp1); // Output chain Tmp1 = LegalizeOp(Tmp1); Tmp2 = LegalizeOp(Tmp2); break; From evan.cheng at apple.com Thu Aug 16 18:51:28 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Thu, 16 Aug 2007 23:51:28 -0000 Subject: [llvm-commits] [llvm] r41134 - /llvm/trunk/test/CodeGen/X86/alloca-align-rounding.ll Message-ID: <200708162351.l7GNpSGq020491@zion.cs.uiuc.edu> Author: evancheng Date: Thu Aug 16 18:51:28 2007 New Revision: 41134 URL: http://llvm.org/viewvc/llvm-project?rev=41134&view=rev Log: Update test: dynamic_stackalloc size *must* be rounded to ensure stack ptr be left in a valid state. Modified: llvm/trunk/test/CodeGen/X86/alloca-align-rounding.ll Modified: llvm/trunk/test/CodeGen/X86/alloca-align-rounding.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/alloca-align-rounding.ll?rev=41134&r1=41133&r2=41134&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/alloca-align-rounding.ll (original) +++ llvm/trunk/test/CodeGen/X86/alloca-align-rounding.ll Thu Aug 16 18:51:28 2007 @@ -1,4 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | not grep and +; RUN: llvm-as < %s | llc -march=x86 -mtriple=i686-apple-darwin | grep and | count 1 +; RUN: llvm-as < %s | llc -march=x86-64 -mtriple=i686-pc-linux | grep and | count 3 declare void @bar(<2 x i64>* %n) @@ -7,3 +8,9 @@ call void @bar(<2 x i64>* %p) ret void } + +define void @foo2(i32 %h) { + %p = alloca <2 x i64>, i32 %h, align 32 + call void @bar(<2 x i64>* %p) + ret void +} From evan.cheng at apple.com Thu Aug 16 18:52:23 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Thu, 16 Aug 2007 23:52:23 -0000 Subject: [llvm-commits] [llvm] r41135 - /llvm/trunk/test/CodeGen/X86/dyn-stackalloc.ll Message-ID: <200708162352.l7GNqNSe020526@zion.cs.uiuc.edu> Author: evancheng Date: Thu Aug 16 18:52:23 2007 New Revision: 41135 URL: http://llvm.org/viewvc/llvm-project?rev=41135&view=rev Log: New test. Make sure dynamic_stackalloc size is rounded up. Added: llvm/trunk/test/CodeGen/X86/dyn-stackalloc.ll Added: llvm/trunk/test/CodeGen/X86/dyn-stackalloc.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/dyn-stackalloc.ll?rev=41135&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/X86/dyn-stackalloc.ll (added) +++ llvm/trunk/test/CodeGen/X86/dyn-stackalloc.ll Thu Aug 16 18:52:23 2007 @@ -0,0 +1,16 @@ +; RUN: llvm-as < %s | llc -march=x86 | not grep 4294967289 +; RUN: llvm-as < %s | llc -march=x86 | grep 4294967280 +; RUN: llvm-as < %s | llc -march=x86-64 | grep {\\-16} + +define void @t() { +A: + br label %entry + +entry: + %m1 = alloca i32, align 4 + %m2 = alloca [7 x i8], align 16 + call void @s( i32* %m1, [7 x i8]* %m2 ) + ret void +} + +declare void @s(i32*, [7 x i8]*) From sabre at nondot.org Thu Aug 16 23:48:07 2007 From: sabre at nondot.org (Chris Lattner) Date: Thu, 16 Aug 2007 23:48:07 -0500 Subject: [llvm-commits] CVS: llvm-www/OpenProjects.html Message-ID: <200708170448.l7H4m7qe000768@zion.cs.uiuc.edu> Changes in directory llvm-www: OpenProjects.html updated: 1.27 -> 1.28 --- Log message: This has been started. --- Diffs of the changes: (+1 -10) OpenProjects.html | 11 +---------- 1 files changed, 1 insertion(+), 10 deletions(-) Index: llvm-www/OpenProjects.html diff -u llvm-www/OpenProjects.html:1.27 llvm-www/OpenProjects.html:1.28 --- llvm-www/OpenProjects.html:1.27 Tue Jul 31 18:59:07 2007 +++ llvm-www/OpenProjects.html Thu Aug 16 23:47:33 2007 @@ -369,15 +369,6 @@ output LLVM bytecode. It seems that it can already output .NET bytecode, JVM bytecode, and C, so LLVM would ostensibly be another good candidate. -
  • Write a new frontend for C/C++ that isn't GCC based. Possible starting points: - -
  • Write a new frontend for some other language (Java? OCaml? Forth?)
  • Write a disassembler for machine code that would use TableGen to output MachineInstrs for transformations, optimizations, etc.
    • @@ -411,7 +402,7 @@ src="http://www.w3.org/Icons/valid-html401" alt="Valid HTML 4.01!"> LLVM Compiler Infrastructure
    - Last modified: $Date: 2007/07/31 23:59:07 $ + Last modified: $Date: 2007/08/17 04:47:33 $ From rspencer at reidspencer.com Fri Aug 17 00:44:59 2007 From: rspencer at reidspencer.com (Reid Spencer) Date: Fri, 17 Aug 2007 05:44:59 -0000 Subject: [llvm-commits] [llvm] r41137 - in /llvm/trunk: autoconf/configure.ac include/llvm/Config/config.h.in Message-ID: <200708170544.l7H5ix8w004361@zion.cs.uiuc.edu> Author: reid Date: Fri Aug 17 00:44:59 2007 New Revision: 41137 URL: http://llvm.org/viewvc/llvm-project?rev=41137&view=rev Log: Fix PR1606: The AC_CHECK_HEADER macro was used instead of AC_CHECK_HEADERS. The former does not automatically add a #define to the configure variables while the latter does. Consequently, the HAVE_PTHREAD_H symbol was not defined which caused the Mutex.cpp file to compile to an empty implementation. Modified: llvm/trunk/autoconf/configure.ac llvm/trunk/include/llvm/Config/config.h.in Modified: llvm/trunk/autoconf/configure.ac URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/autoconf/configure.ac?rev=41137&r1=41136&r2=41137&view=diff ============================================================================== --- llvm/trunk/autoconf/configure.ac (original) +++ llvm/trunk/autoconf/configure.ac Fri Aug 17 00:44:59 2007 @@ -689,10 +689,11 @@ AC_CHECK_HEADERS([dlfcn.h execinfo.h fcntl.h inttypes.h limits.h link.h]) AC_CHECK_HEADERS([malloc.h setjmp.h signal.h stdint.h unistd.h utime.h]) -AC_CHECK_HEADERS([windows.h sys/mman.h sys/param.h sys/resource.h sys/time.h]) +AC_CHECK_HEADERS([windows.h]) +AC_CHECK_HEADERS([sys/mman.h sys/param.h sys/resource.h sys/time.h]) AC_CHECK_HEADERS([sys/types.h malloc/malloc.h mach/mach.h]) if test "$ENABLE_THREADS" -eq 1 ; then - AC_CHECK_HEADER(pthread.h, + AC_CHECK_HEADERS(pthread.h, AC_SUBST(HAVE_PTHREAD, 1), AC_SUBST(HAVE_PTHREAD, 0)) else Modified: llvm/trunk/include/llvm/Config/config.h.in URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Config/config.h.in?rev=41137&r1=41136&r2=41137&view=diff ============================================================================== --- llvm/trunk/include/llvm/Config/config.h.in (original) +++ llvm/trunk/include/llvm/Config/config.h.in Fri Aug 17 00:44:59 2007 @@ -282,6 +282,9 @@ /* Define to have the %a format string */ #undef HAVE_PRINTF_A +/* Define to 1 if you have the header file. */ +#undef HAVE_PTHREAD_H + /* Have pthread_mutex_lock */ #undef HAVE_PTHREAD_MUTEX_LOCK From rspencer at reidspencer.com Fri Aug 17 00:45:26 2007 From: rspencer at reidspencer.com (Reid Spencer) Date: Fri, 17 Aug 2007 05:45:26 -0000 Subject: [llvm-commits] [llvm] r41138 - /llvm/trunk/configure Message-ID: <200708170545.l7H5jR3t004382@zion.cs.uiuc.edu> Author: reid Date: Fri Aug 17 00:45:26 2007 New Revision: 41138 URL: http://llvm.org/viewvc/llvm-project?rev=41138&view=rev Log: Regenerate. Modified: llvm/trunk/configure Modified: llvm/trunk/configure URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/configure?rev=41138&r1=41137&r2=41138&view=diff ============================================================================== --- llvm/trunk/configure (original) +++ llvm/trunk/configure Fri Aug 17 00:45:26 2007 @@ -28874,11 +28874,179 @@ done +for ac_header in windows.h +do +as_ac_Header=`echo "ac_cv_header_$ac_header" | $as_tr_sh` +if { as_var=$as_ac_Header; eval "test \"\${$as_var+set}\" = set"; }; then + { echo "$as_me:$LINENO: checking for $ac_header" >&5 +echo $ECHO_N "checking for $ac_header... $ECHO_C" >&6; } +if { as_var=$as_ac_Header; eval "test \"\${$as_var+set}\" = set"; }; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +fi +ac_res=`eval echo '${'$as_ac_Header'}'` + { echo "$as_me:$LINENO: result: $ac_res" >&5 +echo "${ECHO_T}$ac_res" >&6; } +else + # Is the header compilable? +{ echo "$as_me:$LINENO: checking $ac_header usability" >&5 +echo $ECHO_N "checking $ac_header usability... $ECHO_C" >&6; } +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default +#include <$ac_header> +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_header_compiler=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + ac_header_compiler=no +fi +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +{ echo "$as_me:$LINENO: result: $ac_header_compiler" >&5 +echo "${ECHO_T}$ac_header_compiler" >&6; } +# Is the header present? +{ echo "$as_me:$LINENO: checking $ac_header presence" >&5 +echo $ECHO_N "checking $ac_header presence... $ECHO_C" >&6; } +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include <$ac_header> +_ACEOF +if { (ac_try="$ac_cpp conftest.$ac_ext" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_cpp conftest.$ac_ext") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } >/dev/null; then + if test -s conftest.err; then + ac_cpp_err=$ac_c_preproc_warn_flag + ac_cpp_err=$ac_cpp_err$ac_c_werror_flag + else + ac_cpp_err= + fi +else + ac_cpp_err=yes +fi +if test -z "$ac_cpp_err"; then + ac_header_preproc=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 -for ac_header in windows.h sys/mman.h sys/param.h sys/resource.h sys/time.h + ac_header_preproc=no +fi + +rm -f conftest.err conftest.$ac_ext +{ echo "$as_me:$LINENO: result: $ac_header_preproc" >&5 +echo "${ECHO_T}$ac_header_preproc" >&6; } + +# So? What about this header? +case $ac_header_compiler:$ac_header_preproc:$ac_c_preproc_warn_flag in + yes:no: ) + { echo "$as_me:$LINENO: WARNING: $ac_header: accepted by the compiler, rejected by the preprocessor!" >&5 +echo "$as_me: WARNING: $ac_header: accepted by the compiler, rejected by the preprocessor!" >&2;} + { echo "$as_me:$LINENO: WARNING: $ac_header: proceeding with the compiler's result" >&5 +echo "$as_me: WARNING: $ac_header: proceeding with the compiler's result" >&2;} + ac_header_preproc=yes + ;; + no:yes:* ) + { echo "$as_me:$LINENO: WARNING: $ac_header: present but cannot be compiled" >&5 +echo "$as_me: WARNING: $ac_header: present but cannot be compiled" >&2;} + { echo "$as_me:$LINENO: WARNING: $ac_header: check for missing prerequisite headers?" >&5 +echo "$as_me: WARNING: $ac_header: check for missing prerequisite headers?" >&2;} + { echo "$as_me:$LINENO: WARNING: $ac_header: see the Autoconf documentation" >&5 +echo "$as_me: WARNING: $ac_header: see the Autoconf documentation" >&2;} + { echo "$as_me:$LINENO: WARNING: $ac_header: section \"Present But Cannot Be Compiled\"" >&5 +echo "$as_me: WARNING: $ac_header: section \"Present But Cannot Be Compiled\"" >&2;} + { echo "$as_me:$LINENO: WARNING: $ac_header: proceeding with the preprocessor's result" >&5 +echo "$as_me: WARNING: $ac_header: proceeding with the preprocessor's result" >&2;} + { echo "$as_me:$LINENO: WARNING: $ac_header: in the future, the compiler will take precedence" >&5 +echo "$as_me: WARNING: $ac_header: in the future, the compiler will take precedence" >&2;} + ( cat <<\_ASBOX +## ----------------------------------- ## +## Report this to llvmbugs at cs.uiuc.edu ## +## ----------------------------------- ## +_ASBOX + ) | sed "s/^/$as_me: WARNING: /" >&2 + ;; +esac +{ echo "$as_me:$LINENO: checking for $ac_header" >&5 +echo $ECHO_N "checking for $ac_header... $ECHO_C" >&6; } +if { as_var=$as_ac_Header; eval "test \"\${$as_var+set}\" = set"; }; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + eval "$as_ac_Header=\$ac_header_preproc" +fi +ac_res=`eval echo '${'$as_ac_Header'}'` + { echo "$as_me:$LINENO: result: $ac_res" >&5 +echo "${ECHO_T}$ac_res" >&6; } + +fi +if test `eval echo '${'$as_ac_Header'}'` = yes; then + cat >>confdefs.h <<_ACEOF +#define `echo "HAVE_$ac_header" | $as_tr_cpp` 1 +_ACEOF + +fi + +done + + + + + +for ac_header in sys/mman.h sys/param.h sys/resource.h sys/time.h do as_ac_Header=`echo "ac_cv_header_$ac_header" | $as_tr_sh` if { as_var=$as_ac_Header; eval "test \"\${$as_var+set}\" = set"; }; then @@ -29218,18 +29386,23 @@ done if test "$ENABLE_THREADS" -eq 1 ; then - if test "${ac_cv_header_pthread_h+set}" = set; then - { echo "$as_me:$LINENO: checking for pthread.h" >&5 -echo $ECHO_N "checking for pthread.h... $ECHO_C" >&6; } -if test "${ac_cv_header_pthread_h+set}" = set; then + +for ac_header in pthread.h +do +as_ac_Header=`echo "ac_cv_header_$ac_header" | $as_tr_sh` +if { as_var=$as_ac_Header; eval "test \"\${$as_var+set}\" = set"; }; then + { echo "$as_me:$LINENO: checking for $ac_header" >&5 +echo $ECHO_N "checking for $ac_header... $ECHO_C" >&6; } +if { as_var=$as_ac_Header; eval "test \"\${$as_var+set}\" = set"; }; then echo $ECHO_N "(cached) $ECHO_C" >&6 fi -{ echo "$as_me:$LINENO: result: $ac_cv_header_pthread_h" >&5 -echo "${ECHO_T}$ac_cv_header_pthread_h" >&6; } +ac_res=`eval echo '${'$as_ac_Header'}'` + { echo "$as_me:$LINENO: result: $ac_res" >&5 +echo "${ECHO_T}$ac_res" >&6; } else # Is the header compilable? -{ echo "$as_me:$LINENO: checking pthread.h usability" >&5 -echo $ECHO_N "checking pthread.h usability... $ECHO_C" >&6; } +{ echo "$as_me:$LINENO: checking $ac_header usability" >&5 +echo $ECHO_N "checking $ac_header usability... $ECHO_C" >&6; } cat >conftest.$ac_ext <<_ACEOF /* confdefs.h. */ _ACEOF @@ -29237,7 +29410,7 @@ cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ $ac_includes_default -#include +#include <$ac_header> _ACEOF rm -f conftest.$ac_objext if { (ac_try="$ac_compile" @@ -29286,15 +29459,15 @@ echo "${ECHO_T}$ac_header_compiler" >&6; } # Is the header present? -{ echo "$as_me:$LINENO: checking pthread.h presence" >&5 -echo $ECHO_N "checking pthread.h presence... $ECHO_C" >&6; } +{ echo "$as_me:$LINENO: checking $ac_header presence" >&5 +echo $ECHO_N "checking $ac_header presence... $ECHO_C" >&6; } cat >conftest.$ac_ext <<_ACEOF /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ -#include +#include <$ac_header> _ACEOF if { (ac_try="$ac_cpp conftest.$ac_ext" case "(($ac_try" in @@ -29334,25 +29507,25 @@ # So? What about this header? case $ac_header_compiler:$ac_header_preproc:$ac_c_preproc_warn_flag in yes:no: ) - { echo "$as_me:$LINENO: WARNING: pthread.h: accepted by the compiler, rejected by the preprocessor!" >&5 -echo "$as_me: WARNING: pthread.h: accepted by the compiler, rejected by the preprocessor!" >&2;} - { echo "$as_me:$LINENO: WARNING: pthread.h: proceeding with the compiler's result" >&5 -echo "$as_me: WARNING: pthread.h: proceeding with the compiler's result" >&2;} + { echo "$as_me:$LINENO: WARNING: $ac_header: accepted by the compiler, rejected by the preprocessor!" >&5 +echo "$as_me: WARNING: $ac_header: accepted by the compiler, rejected by the preprocessor!" >&2;} + { echo "$as_me:$LINENO: WARNING: $ac_header: proceeding with the compiler's result" >&5 +echo "$as_me: WARNING: $ac_header: proceeding with the compiler's result" >&2;} ac_header_preproc=yes ;; no:yes:* ) - { echo "$as_me:$LINENO: WARNING: pthread.h: present but cannot be compiled" >&5 -echo "$as_me: WARNING: pthread.h: present but cannot be compiled" >&2;} - { echo "$as_me:$LINENO: WARNING: pthread.h: check for missing prerequisite headers?" >&5 -echo "$as_me: WARNING: pthread.h: check for missing prerequisite headers?" >&2;} - { echo "$as_me:$LINENO: WARNING: pthread.h: see the Autoconf documentation" >&5 -echo "$as_me: WARNING: pthread.h: see the Autoconf documentation" >&2;} - { echo "$as_me:$LINENO: WARNING: pthread.h: section \"Present But Cannot Be Compiled\"" >&5 -echo "$as_me: WARNING: pthread.h: section \"Present But Cannot Be Compiled\"" >&2;} - { echo "$as_me:$LINENO: WARNING: pthread.h: proceeding with the preprocessor's result" >&5 -echo "$as_me: WARNING: pthread.h: proceeding with the preprocessor's result" >&2;} - { echo "$as_me:$LINENO: WARNING: pthread.h: in the future, the compiler will take precedence" >&5 -echo "$as_me: WARNING: pthread.h: in the future, the compiler will take precedence" >&2;} + { echo "$as_me:$LINENO: WARNING: $ac_header: present but cannot be compiled" >&5 +echo "$as_me: WARNING: $ac_header: present but cannot be compiled" >&2;} + { echo "$as_me:$LINENO: WARNING: $ac_header: check for missing prerequisite headers?" >&5 +echo "$as_me: WARNING: $ac_header: check for missing prerequisite headers?" >&2;} + { echo "$as_me:$LINENO: WARNING: $ac_header: see the Autoconf documentation" >&5 +echo "$as_me: WARNING: $ac_header: see the Autoconf documentation" >&2;} + { echo "$as_me:$LINENO: WARNING: $ac_header: section \"Present But Cannot Be Compiled\"" >&5 +echo "$as_me: WARNING: $ac_header: section \"Present But Cannot Be Compiled\"" >&2;} + { echo "$as_me:$LINENO: WARNING: $ac_header: proceeding with the preprocessor's result" >&5 +echo "$as_me: WARNING: $ac_header: proceeding with the preprocessor's result" >&2;} + { echo "$as_me:$LINENO: WARNING: $ac_header: in the future, the compiler will take precedence" >&5 +echo "$as_me: WARNING: $ac_header: in the future, the compiler will take precedence" >&2;} ( cat <<\_ASBOX ## ----------------------------------- ## ## Report this to llvmbugs at cs.uiuc.edu ## @@ -29361,25 +29534,30 @@ ) | sed "s/^/$as_me: WARNING: /" >&2 ;; esac -{ echo "$as_me:$LINENO: checking for pthread.h" >&5 -echo $ECHO_N "checking for pthread.h... $ECHO_C" >&6; } -if test "${ac_cv_header_pthread_h+set}" = set; then +{ echo "$as_me:$LINENO: checking for $ac_header" >&5 +echo $ECHO_N "checking for $ac_header... $ECHO_C" >&6; } +if { as_var=$as_ac_Header; eval "test \"\${$as_var+set}\" = set"; }; then echo $ECHO_N "(cached) $ECHO_C" >&6 else - ac_cv_header_pthread_h=$ac_header_preproc + eval "$as_ac_Header=\$ac_header_preproc" fi -{ echo "$as_me:$LINENO: result: $ac_cv_header_pthread_h" >&5 -echo "${ECHO_T}$ac_cv_header_pthread_h" >&6; } +ac_res=`eval echo '${'$as_ac_Header'}'` + { echo "$as_me:$LINENO: result: $ac_res" >&5 +echo "${ECHO_T}$ac_res" >&6; } fi -if test $ac_cv_header_pthread_h = yes; then - HAVE_PTHREAD=1 +if test `eval echo '${'$as_ac_Header'}'` = yes; then + cat >>confdefs.h <<_ACEOF +#define `echo "HAVE_$ac_header" | $as_tr_cpp` 1 +_ACEOF + HAVE_PTHREAD=1 else HAVE_PTHREAD=0 fi +done else HAVE_PTHREAD=0 From greened at obbligato.org Fri Aug 17 10:13:55 2007 From: greened at obbligato.org (David Greene) Date: Fri, 17 Aug 2007 15:13:55 -0000 Subject: [llvm-commits] [llvm] r41139 - /llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp Message-ID: <200708171513.l7HFDtkK028711@zion.cs.uiuc.edu> Author: greened Date: Fri Aug 17 10:13:55 2007 New Revision: 41139 URL: http://llvm.org/viewvc/llvm-project?rev=41139&view=rev Log: Fix GLIBCXX_DEBUG error of comparing two singular iterators Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp?rev=41139&r1=41138&r2=41139&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp Fri Aug 17 10:13:55 2007 @@ -164,12 +164,14 @@ NodeInfo *NI; // Node info NIIterator NGI; // Node group iterator NIIterator NGE; // Node group iterator end + bool iter_valid; public: // Ctor. - NodeGroupIterator(NodeInfo *N) : NI(N) { + NodeGroupIterator(NodeInfo *N) : NI(N), iter_valid(false) { // If the node is in a group then set up the group iterator. Otherwise // the group iterators will trip first time out. + assert(N && "Bad node info"); if (N->isInGroup()) { // get Group NodeGroup *Group = NI->Group; @@ -177,14 +179,17 @@ NGE = Group->group_end(); // Prevent this node from being used (will be in members list NI = NULL; + iter_valid = true; } } /// next - Return the next node info, otherwise NULL. /// NodeInfo *next() { - // If members list - if (NGI != NGE) return *NGI++; + if (iter_valid) { + // If members list + if (NGI != NGE) return *NGI++; + } // Use node as the result (may be NULL) NodeInfo *Result = NI; // Only use once From clattner at apple.com Fri Aug 17 10:24:07 2007 From: clattner at apple.com (Chris Lattner) Date: Fri, 17 Aug 2007 08:24:07 -0700 Subject: [llvm-commits] [llvm] r41133 - /llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp In-Reply-To: <200708162350.l7GNo7qM020440@zion.cs.uiuc.edu> References: <200708162350.l7GNo7qM020440@zion.cs.uiuc.edu> Message-ID: > URL: http://llvm.org/viewvc/llvm-project?rev=41133&view=rev > Log: > If dynamic_stackalloc alignment is > stack alignment, first issue > an instruction to align the stack ptr before the decrement. Nifty! > + unsigned Align = cast(Tmp3)->getValue(); > + unsigned StackAlign = > + TLI.getTargetMachine().getFrameInfo()->getStackAlignment(); > + if (Align > StackAlign) > + SP = DAG.getNode(ISD::AND, VT, SP, DAG.getConstant(-Align, > VT)); Please declare Align as uint64_t, or use -(uint64_t)Align to avoid problems on 64-bit systems. Thanks Evan, -Chris From sabre at nondot.org Fri Aug 17 11:49:19 2007 From: sabre at nondot.org (Chris Lattner) Date: Fri, 17 Aug 2007 16:49:19 -0000 Subject: [llvm-commits] [llvm] r41142 - /llvm/trunk/include/llvm/ADT/ilist Message-ID: <200708171649.l7HGnJnp000832@zion.cs.uiuc.edu> Author: lattner Date: Fri Aug 17 11:49:19 2007 New Revision: 41142 URL: http://llvm.org/viewvc/llvm-project?rev=41142&view=rev Log: improve iplist comments. Switch iplist from allocating its sentinal object (for end()) eagerly to allocating it lazily. This saves a lot of memory for JIT applications that read a module but don't materialize most of the functions (e.g. 62K for 252.eon). Modified: llvm/trunk/include/llvm/ADT/ilist Modified: llvm/trunk/include/llvm/ADT/ilist URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/ilist?rev=41142&r1=41141&r2=41142&view=diff ============================================================================== --- llvm/trunk/include/llvm/ADT/ilist (original) +++ llvm/trunk/include/llvm/ADT/ilist Fri Aug 17 11:49:19 2007 @@ -212,13 +212,29 @@ //===----------------------------------------------------------------------===// // -// iplist - The subset of list functionality that can safely be used on nodes of -// polymorphic types, i.e. a heterogenous list with a common base class that -// holds the next/prev pointers... -// +/// iplist - The subset of list functionality that can safely be used on nodes +/// of polymorphic types, i.e. a heterogenous list with a common base class that +/// holds the next/prev pointers. The only state of the list itself is a single +/// pointer to the head of the list. +/// +/// This list can be in one of three interesting states: +/// 1. The list may be completely unconstructed. In this case, the head +/// pointer is null. When in this form, any query for an iterator (e.g. +/// begin() or end()) causes the list to transparently change to state #2. +/// 2. The list may be empty, but contain a sentinal for the end iterator. This +/// sentinal is created by the Traits::createSentinel method and is a link +/// in the list. When the list is empty, the pointer in the iplist points +/// to the sentinal. Once the sentinal is constructed, it +/// is not destroyed until the list is. +/// 3. The list may contain actual objects in it, which are stored as a doubly +/// linked list of nodes. One invariant of the list is that the predecessor +/// of the first node in the list always points to the last node in the list, +/// and the successor pointer for the sentinal (which always stays at the +/// end of the list) is always null. +/// template > class iplist : public Traits { - NodeTy *Head; + mutable NodeTy *Head; // Use the prev node pointer of 'head' as the tail pointer. This is really a // circularly linked list where we snip the 'next' link from the sentinel node @@ -226,7 +242,16 @@ // the end of the list). NodeTy *getTail() { return getPrev(Head); } const NodeTy *getTail() const { return getPrev(Head); } - void setTail(NodeTy *N) { setPrev(Head, N); } + void setTail(NodeTy *N) const { setPrev(Head, N); } + + /// CreateLazySentinal - This method verifies whether the sentinal for the + /// list has been created and lazily makes it if not. + void CreateLazySentinal() const { + if (Head != 0) return; + Head = Traits::createSentinel(); + setNext(Head, 0); + setTail(Head); + } static bool op_less(NodeTy &L, NodeTy &R) { return L < R; } static bool op_equal(NodeTy &L, NodeTy &R) { return L == R; } @@ -243,28 +268,41 @@ typedef std::reverse_iterator const_reverse_iterator; typedef std::reverse_iterator reverse_iterator; - iplist() : Head(Traits::createSentinel()) { - setNext(Head, 0); - setTail(Head); + iplist() : Head(0) {} + ~iplist() { + if (!Head) return; + clear(); + Traits::destroySentinel(getTail()); } - ~iplist() { clear(); Traits::destroySentinel(getTail()); } // Iterator creation methods. - iterator begin() { return iterator(Head); } - const_iterator begin() const { return const_iterator(Head); } - iterator end() { return iterator(getTail()); } - const_iterator end() const { return const_iterator(getTail()); } + iterator begin() { + CreateLazySentinal(); + return iterator(Head); + } + const_iterator begin() const { + CreateLazySentinal(); + return const_iterator(Head); + } + iterator end() { + CreateLazySentinal(); + return iterator(getTail()); + } + const_iterator end() const { + CreateLazySentinal(); + return const_iterator(getTail()); + } // reverse iterator creation methods. reverse_iterator rbegin() { return reverse_iterator(end()); } const_reverse_iterator rbegin() const{ return const_reverse_iterator(end()); } reverse_iterator rend() { return reverse_iterator(begin()); } - const_reverse_iterator rend() const { return const_reverse_iterator(begin()); } + const_reverse_iterator rend() const { return const_reverse_iterator(begin());} // Miscellaneous inspection routines. size_type max_size() const { return size_type(-1); } - bool empty() const { return Head == getTail(); } + bool empty() const { return Head == 0 || Head == getTail(); } // Front and back accessor functions... reference front() { @@ -386,6 +424,7 @@ // size_type size() const { + if (Head == 0) return 0; // Don't require construction of sentinal if empty. #if __GNUC__ == 2 // GCC 2.95 has a broken std::distance size_type Result = 0; @@ -402,7 +441,7 @@ return last; } - void clear() { erase(begin(), end()); } + void clear() { if (Head) erase(begin(), end()); } // Front and back inserters... void push_front(NodeTy *val) { insert(begin(), val); } From espindola at google.com Fri Aug 17 11:07:34 2007 From: espindola at google.com (Rafael Espindola) Date: Fri, 17 Aug 2007 17:07:34 +0100 Subject: [llvm-commits] Bug in the DAG legalizer? Message-ID: <38a0d8450708170907o6830d303o2367206e9477349@mail.gmail.com> I am trying to implement the calling of functions with byval arguments. The attached patch has the work in progress. The problem is that it creates a MEMCPY node to do the copying when expanding a call with to a function with a byval argument. This shouldn't be recursive, since memcpy has no byval arguments. The sequence of expansions that is happening is: *) the initial call is expanded *) MEMCPY is expanded into a call to memcpy *) the call to memcpy is expanded The attached DAG reflects the state at this point. The problem with it is that it has this structure callseq_start callseq_start memcpy The new callseq_start to the left is being constructed to replace the memcpy, but when the legalizer search its parents it find previous callseq_start. The legalizer then goes looking the callseq_end and find the memcpy again, since this link hasn't been update yet. This creates a infinity recursion that uses all memory. Should I not be using a MEMCPY node? What should I use? Thanks, -- Rafael Avila de Espindola Google Ireland Ltd. Gordon House Barrow Street Dublin 4 Ireland Registered in Dublin, Ireland Registration Number: 368047 -------------- next part -------------- A non-text attachment was scrubbed... Name: llvm.patch Type: text/x-patch Size: 3215 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20070817/f4b1c0fb/attachment.bin -------------- next part -------------- A non-text attachment was scrubbed... Name: dag.ps Type: application/postscript Size: 121436 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20070817/f4b1c0fb/attachment.ps From evan.cheng at apple.com Fri Aug 17 13:02:22 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Fri, 17 Aug 2007 18:02:22 -0000 Subject: [llvm-commits] [llvm] r41143 - /llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Message-ID: <200708171802.l7HI2MGY005606@zion.cs.uiuc.edu> Author: evancheng Date: Fri Aug 17 13:02:22 2007 New Revision: 41143 URL: http://llvm.org/viewvc/llvm-project?rev=41143&view=rev Log: Avoid issue on 64-bit hosts. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=41143&r1=41142&r2=41143&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Fri Aug 17 13:02:22 2007 @@ -1378,7 +1378,8 @@ unsigned StackAlign = TLI.getTargetMachine().getFrameInfo()->getStackAlignment(); if (Align > StackAlign) - SP = DAG.getNode(ISD::AND, VT, SP, DAG.getConstant(-Align, VT)); + SP = DAG.getNode(ISD::AND, VT, SP, + DAG.getConstant(-(uint64_t)Align, VT)); Tmp1 = DAG.getNode(ISD::SUB, VT, SP, Size); // Value Tmp2 = DAG.getCopyToReg(Chain, SPReg, Tmp1); // Output chain Tmp1 = LegalizeOp(Tmp1); From evan.cheng at apple.com Fri Aug 17 14:02:24 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Fri, 17 Aug 2007 12:02:24 -0700 Subject: [llvm-commits] [PATCH] JIT support for ARM In-Reply-To: <6fbb4ff20708161407u49bd1833k8e6d147371d9515@mail.gmail.com> References: <6fbb4ff20708161407u49bd1833k8e6d147371d9515@mail.gmail.com> Message-ID: <77A7A5D7-BDEF-4D8E-AA73-B7E488F72180@apple.com> Very good progress. Thanks! Comments inline. Evan > Index: lib/Target/ARM/ARMJITInfo.cpp > =================================================================== > --- lib/Target/ARM/ARMJITInfo.cpp (revis??o 41124) > +++ lib/Target/ARM/ARMJITInfo.cpp (c??pia de trabalho) > @@ -21,12 +21,7 @@ > using namespace llvm; > > void ARMJITInfo::replaceMachineCodeForFunction(void *Old, void > *New) { > - unsigned char *OldByte = (unsigned char *)Old; > - *OldByte++ = 0xEA; // Emit B opcode. > - unsigned *OldWord = (unsigned *)OldByte; > - unsigned NewAddr = (intptr_t)New; > - unsigned OldAddr = (intptr_t)OldWord; > - *OldWord = NewAddr - OldAddr - 4; // Emit PC-relative addr of New > code. > + assert(0); Please use abort() instead so it does what's expected in non-debug build. > } > > /// JITCompilerFunction - This contains the address of the JIT > function used to > @@ -65,7 +60,7 @@ > #endif > } > > -/// ARMCompilationCallbackC - This is the target-specific function > invoked by the > +/// ARMCompilationCallbackC - This i s the target-specific function > invoked by the i s -> is :-) Also, why the name "ARMCompilationCallbackC"? Is it language specific? > /// function stub when we did not know the real target of a call. > This function > /// must locate the start of the stub or call site and pass it into > the JIT > /// compiler function. > @@ -80,18 +75,16 @@ > << ": Resolving call to function: " > << TheVM->getFunctionReferencedName((void*)RetAddr) << "\n"; > #endif > + intptr_t Addr = RetAddr - 4; > > - // Sanity check to make sure this really is a branch and link > instruction. > - assert(((unsigned char*)RetAddr-1)[3] == 0xEB && "Not a branch > and link instr!"); > + intptr_t NewVal = (intptr_t)JITCompilerFunction((void*)Addr); Does a similar assertion makes sense here? > > - intptr_t NewVal = (intptr_t)JITCompilerFunction((void*)RetAddr); > - > // Rewrite the call target... so that we don't end up here every > time we > // execute the call. > - *(intptr_t *)RetAddr = (intptr_t)(NewVal-RetAddr-4); > + *(intptr_t *)Addr = NewVal; > > // Change the return address to reexecute the branch and link > instruction... > - *RetAddrLoc -= 1; > + *RetAddrLoc -= 8; > } > > TargetJITInfo::LazyResolverFn > @@ -101,23 +94,23 @@ > } > > void *ARMJITInfo::emitFunctionStub(void *Fn, MachineCodeEmitter > &MCE) { > - unsigned addr = (intptr_t)Fn-MCE.getCurrentPCValue()-4; > + unsigned addr = (intptr_t)Fn; > // If this is just a call to an external function, emit a branch > instead of a > // call. The code is the same except for one bit of the last > instruction. > if (Fn != (void*)(intptr_t)ARMCompilationCallback) { > - MCE.startFunctionStub(4, 2); > - MCE.emitByte(0xEA); // branch to the corresponding function addr > - MCE.emitByte((unsigned char)(addr >> 0)); > - MCE.emitByte((unsigned char)(addr >> 8)); > - MCE.emitByte((unsigned char)(addr >> 16)); > - return MCE.finishFunctionStub(0); > + // branch to the corresponding function addr > + MCE.startFunctionStub(8, 4); > + MCE.emitWordLE(0xE51FF004); // LDR PC, [PC,#-4] This is ok.... But I would rather see you refactor getBinaryCodeForInstr() so you can "manufacture" the value by passing it ARM::LDR, ARM::PC, etc.? Do you think that's possible? Also, in Emitter::getBinaryCodeForInstr(): unsigned Emitter::getBinaryCodeForInstr(const MachineInstr &MI) { const TargetInstrDescriptor *Desc = MI.getInstrDescriptor(); const unsigned opcode = MI.getOpcode(); unsigned Value = 0xE0000000; Comments? What is 0xe000000? unsigned op; switch (Desc->TSFlags & ARMII::AddrModeMask) { case ARMII::AddrModeNone: { switch(Desc->TSFlags & ARMII::FormMask) { default: { assert(0 && "Unknown instruction subtype!"); if(opcode == ARM::CLZ) { // set first operand op = getMachineOpValue(MI,0); Value |= op << 12; Can 12 (and all the magic shift amounts in this function) be defined in ARMII enum? So you add comments there rather than in this code. > + MCE.emitWordLE(addr); > } else { > - MCE.startFunctionStub(5, 2); > - MCE.emitByte(0xEB); // branch and link to the corresponding > function addr > + // branch and link to the corresponding function addr > + MCE.startFunctionStub(20, 4); > + MCE.emitWordLE(0xE92D4800); // STMFD SP!, [R11, LR] > + MCE.emitWordLE(0xE28FE004); // ADD LR, PC, #4 > + MCE.emitWordLE(0xE51FF004); // LDR PC, [PC,#-4] > + MCE.emitWordLE(addr); > + MCE.emitWordLE(0xE8BD8800); // LDMFD SP!, [R11, PC] Ditto. > } > - MCE.emitByte((unsigned char)(addr >> 0)); > - MCE.emitByte((unsigned char)(addr >> 8)); > - MCE.emitByte((unsigned char)(addr >> 16)); > > return MCE.finishFunctionStub(0); > } > @@ -133,14 +126,22 @@ > switch ((ARM::RelocationType)MR->getRelocationType()) { > case ARM::reloc_arm_relative: { > // PC relative relocation > - *((unsigned*)RelocPos) += (unsigned)ResultPtr; > + ResultPtr = ResultPtr-(intptr_t)RelocPos-8; > + if (ResultPtr >= 0) > + *((unsigned*)RelocPos) |= 1 << 23; > + else { > + ResultPtr *= -1; > + *((unsigned*)RelocPos) &= 0xFF7FFFFF; Please explain what's going on here? :-) > + } > + *((unsigned*)RelocPos) |= (unsigned)ResultPtr; > + *((unsigned*)RelocPos) |= 0xF << 16; > break; > } > - case ARM::reloc_arm_absolute: > - break; > case ARM::reloc_arm_branch: { > // relocation to b and bl instructions > - ResultPtr = (ResultPtr-(intptr_t)RelocPos) >> 2; > + ResultPtr = ResultPtr-(intptr_t)RelocPos-8; > + ResultPtr = (ResultPtr & 0x03FFFFFC) >> 2; > + //assert(ResultPtr >= -33554432 && ResultPtr <= 33554428); > *((unsigned*)RelocPos) |= ResultPtr; > break; > } > Index: lib/Target/ARM/ARMInstrInfo.td > =================================================================== > --- lib/Target/ARM/ARMInstrInfo.td (revis??o 41124) > +++ lib/Target/ARM/ARMInstrInfo.td (c??pia de trabalho) > @@ -342,33 +342,38 @@ > > def Pseudo : Format<1>; > def MulFrm : Format<2>; > -def Branch : Format<3>; > -def BranchMisc : Format<4>; > +def MulSMLAW : Format<3>; > +def MulSMULW : Format<4>; > +def MulSMLA : Format<5>; > +def MulSMUL : Format<6>; > +def Branch : Format<7>; > +def BranchMisc : Format<8>; > > -def DPRdIm : Format<5>; > -def DPRdReg : Format<6>; > -def DPRdSoReg : Format<7>; > -def DPRdMisc : Format<8>; > -def DPRnIm : Format<9>; > -def DPRnReg : Format<10>; > -def DPRnSoReg : Format<11>; > -def DPRIm : Format<12>; > -def DPRReg : Format<13>; > -def DPRSoReg : Format<14>; > -def DPRImS : Format<15>; > -def DPRRegS : Format<16>; > -def DPRSoRegS : Format<17>; > +def DPRdIm : Format<9>; > +def DPRdReg : Format<10>; > +def DPRdSoReg : Format<11>; > +def DPRdMisc : Format<12>; > +def DPRnIm : Format<13>; > +def DPRnReg : Format<14>; > +def DPRnSoReg : Format<15>; > +def DPRIm : Format<16>; > +def DPRReg : Format<17>; > +def DPRSoReg : Format<18>; > +def DPRImS : Format<19>; > +def DPRRegS : Format<20>; > +def DPRSoRegS : Format<21>; > > -def LdFrm : Format<18>; > -def StFrm : Format<19>; > +def LdFrm : Format<22>; > +def StFrm : Format<23>; > > -def ArithMisc : Format<20>; > -def ThumbFrm : Format<21>; > -def VFPFrm : Format<22>; > +def ArithMisc : Format<24>; > +def ThumbFrm : Format<25>; > +def VFPFrm : Format<26>; > > > > // > = > = > = > ----------------------------------------------------------------------= > ==// > + > // ARM Instruction templates. > // > > @@ -815,7 +820,7 @@ > [(set GPR:$dst, (sextloadi8 addrmode3:$addr))]>; > > // Load doubleword > -def LDRD : AI3<0x0, (outs GPR:$dst), (ins addrmode3:$addr), LdFrm, > +def LDRD : AI3<0xD, (outs GPR:$dst), (ins addrmode3:$addr), LdFrm, > "ldr", "d $dst, $addr", > []>, Requires<[IsARM, HasV5T]>; > > @@ -877,7 +882,7 @@ > [(truncstorei8 GPR:$src, addrmode2:$addr)]>; > > // Store doubleword > -def STRD : AI3<0x0, (outs), (ins GPR:$src, addrmode3:$addr), StFrm, > +def STRD : AI3<0xF, (outs), (ins GPR:$src, addrmode3:$addr), StFrm, > "str", "d $src, $addr", > []>, Requires<[IsARM, HasV5T]>; > > @@ -1125,76 +1130,86 @@ > [(set GPR:$dst, (sub GPR:$c, (mulhs GPR:$a, GPR: > $b)))]>, > Requires<[IsARM, HasV6]>; > > -multiclass AI_smul opcod, string opc, PatFrag opnode> { > - def BB : AI +multiclass AI_smul { > + def BB : AI<0x8, (outs GPR:$dst), (ins GPR:$a, GPR:$b), MulSMUL, > !strconcat(opc, "bb"), " $dst, $a, $b", > [(set GPR:$dst, (opnode (sext_inreg GPR:$a, i16), > (sext_inreg GPR:$b, i16)))]>, > Requires<[IsARM, HasV5TE]>; > - def BT : AI + > + def BT : AI<0xC, (outs GPR:$dst), (ins GPR:$a, GPR:$b), MulSMUL, > !strconcat(opc, "bt"), " $dst, $a, $b", > [(set GPR:$dst, (opnode (sext_inreg GPR:$a, i16), > (sra GPR:$b, 16)))]>, > Requires<[IsARM, HasV5TE]>; > - def TB : AI + > + def TB : AI<0xA, (outs GPR:$dst), (ins GPR:$a, GPR:$b), MulSMUL, > !strconcat(opc, "tb"), " $dst, $a, $b", > [(set GPR:$dst, (opnode (sra GPR:$a, 16), > (sext_inreg GPR:$b, i16)))]>, > Requires<[IsARM, HasV5TE]>; > - def TT : AI + > + def TT : AI<0xE, (outs GPR:$dst), (ins GPR:$a, GPR:$b), MulSMUL, > !strconcat(opc, "tt"), " $dst, $a, $b", > [(set GPR:$dst, (opnode (sra GPR:$a, 16), > (sra GPR:$b, 16)))]>, > Requires<[IsARM, HasV5TE]>; > - def WB : AI + > + def WB : AI<0xA, (outs GPR:$dst), (ins GPR:$a, GPR:$b), MulSMULW, > !strconcat(opc, "wb"), " $dst, $a, $b", > [(set GPR:$dst, (sra (opnode GPR:$a, > (sext_inreg GPR:$b, i16)), > 16))]>, > Requires<[IsARM, HasV5TE]>; > - def WT : AI + > + def WT : AI<0xE, (outs GPR:$dst), (ins GPR:$a, GPR:$b), MulSMULW, > !strconcat(opc, "wt"), " $dst, $a, $b", > [(set GPR:$dst, (sra (opnode GPR:$a, > (sra GPR:$b, 16)), 16))]>, > Requires<[IsARM, HasV5TE]>; > } > > -multiclass AI_smla opcod, string opc, PatFrag opnode> { > - def BB : AI $acc), MulFrm, > + > +multiclass AI_smla { > + def BB : AI<0x8, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:$acc), > MulSMLA, > !strconcat(opc, "bb"), " $dst, $a, $b, $acc", > [(set GPR:$dst, (add GPR:$acc, > (opnode (sext_inreg GPR:$a, i16), > (sext_inreg GPR:$b, i16))))]>, > Requires<[IsARM, HasV5TE]>; > - def BT : AI $acc), MulFrm, > + > + def BT : AI<0xC, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:$acc), > MulSMLA, > !strconcat(opc, "bt"), " $dst, $a, $b, $acc", > [(set GPR:$dst, (add GPR:$acc, (opnode (sext_inreg > GPR:$a, i16), > (sra GPR:$b, > 16))))]>, > Requires<[IsARM, HasV5TE]>; > - def TB : AI $acc), MulFrm, > + > + def TB : AI<0xA, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:$acc), > MulSMLA, > !strconcat(opc, "tb"), " $dst, $a, $b, $acc", > [(set GPR:$dst, (add GPR:$acc, (opnode (sra GPR:$a, > 16), > (sext_inreg GPR: > $b, i16))))]>, > Requires<[IsARM, HasV5TE]>; > - def TT : AI $acc), MulFrm, > + > + def TT : AI<0xE, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:$acc), > MulSMLA, > !strconcat(opc, "tt"), " $dst, $a, $b, $acc", > [(set GPR:$dst, (add GPR:$acc, (opnode (sra GPR:$a, > 16), > (sra GPR:$b, > 16))))]>, > Requires<[IsARM, HasV5TE]>; > > - def WB : AI $acc), MulFrm, > + def WB : AI<0xA, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:$acc), > MulSMLAW, > !strconcat(opc, "wb"), " $dst, $a, $b, $acc", > [(set GPR:$dst, (add GPR:$acc, (sra (opnode GPR:$a, > (sext_inreg GPR:$b, > i16)), 16)))]>, > Requires<[IsARM, HasV5TE]>; > - def WT : AI $acc), MulFrm, > + > + def WT : AI<0xE, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:$acc), > MulSMLAW, > !strconcat(opc, "wt"), " $dst, $a, $b, $acc", > [(set GPR:$dst, (add GPR:$acc, (sra (opnode GPR:$a, > (sra GPR:$b, > 16)), 16)))]>, > Requires<[IsARM, HasV5TE]>; > } > > -defm SMUL : AI_smul<0x0, "smul", BinOpFrag<(mul node:$LHS, node: > $RHS)>>; > -defm SMLA : AI_smla<0x0, "smla", BinOpFrag<(mul node:$LHS, node: > $RHS)>>; > +defm SMUL : AI_smul<"smul", BinOpFrag<(mul node:$LHS, node:$RHS)>>; > +defm SMLA : AI_smla<"smla", BinOpFrag<(mul node:$LHS, node:$RHS)>>; > > // TODO: Halfword multiple accumulate long: SMLAL > // TODO: Dual halfword multiple: SMUAD, SMUSD, SMLAD, SMLSD, > SMLALD, SMLSLD > Index: lib/Target/ARM/ARMCodeEmitter.cpp > =================================================================== > --- lib/Target/ARM/ARMCodeEmitter.cpp (revis??o 41124) > +++ lib/Target/ARM/ARMCodeEmitter.cpp (c??pia de trabalho) > @@ -54,9 +54,9 @@ > } > > void emitInstruction(const MachineInstr &MI); > - unsigned getBinaryCodeForInstr(const MachineInstr &MI); > int getMachineOpValue(const MachineInstr &MI, unsigned OpIndex); > unsigned getBaseOpcodeFor(const TargetInstrDescriptor *TID); > + unsigned getBinaryCodeForInstr(const MachineInstr &MI); > > void emitGlobalAddressForCall(GlobalValue *GV, bool > DoesntNeedStub); > void emitExternalSymbolAddress(const char *ES, unsigned Reloc); > @@ -64,6 +64,7 @@ > int Disp = 0, unsigned PCAdj = 0 ); > void emitJumpTableAddress(unsigned JTI, unsigned Reloc, > unsigned PCAdj = 0); > + void emitGlobalConstant(const Constant *CV); > > private: > int getShiftOp(const MachineOperand &MO); > @@ -137,7 +138,7 @@ > MO.isConstantPoolIndex() || MO.isJumpTableIndex()) { > > if (MO.isGlobalAddress()) { > - emitGlobalAddressForCall(MO.getGlobal(), true); > + emitGlobalAddressForCall(MO.getGlobal(), false); > } else if (MO.isExternalSymbol()) { > emitExternalSymbolAddress(MO.getSymbolName(), > ARM::reloc_arm_relative); > } else if (MO.isConstantPoolIndex()) { > @@ -186,8 +187,6 @@ > Reloc, JTI, > PCAdj)); > } > > - > - > void Emitter::emitInstruction(const MachineInstr &MI) { > NumEmitted++; // Keep track of the # of mi's emitted > MCE.emitWordLE(getBinaryCodeForInstr(MI)); > @@ -215,6 +214,37 @@ > } > break; > } > + case ARMII::MulSMLAW: > + case ARMII::MulSMULW: > + Value |= 1 << 21; > + case ARMII::MulSMLA: > + case ARMII::MulSMUL: { > + Value |= 1 << 24; > + > + unsigned char BaseOpcode = getBaseOpcodeFor(Desc); > + Value |= BaseOpcode << 4; > + > + unsigned Format = (Desc->TSFlags & ARMII::FormMask); > + > + if (Format == ARMII::MulSMUL) > + Value |= 1 << 22; > + > + op = getMachineOpValue(MI,0); > + Value |= op << 16; > + > + op = getMachineOpValue(MI,1); > + Value |= op; > + > + op = getMachineOpValue(MI,2); > + Value |= op << 8; > + > + if (Format != ARMII::MulSMULW && Format != ARMII::MulSMUL) { > + op = getMachineOpValue(MI,3); > + Value |= op << 12; > + } > + > + break; > + } > case ARMII::MulFrm: { > Value |= 9 << 4; > > @@ -460,7 +490,7 @@ > Value |= 1 << 24; > > unsigned Format = (Desc->TSFlags & ARMII::FormMask); > - if (Format == ARMII::LdFrm) > + if (Format == ARMII::LdFrm && opcode != ARM::LDRD) Instead of special casing it for LDRD, perhaps add a LB (L bit) class and attach to the other instructions that need it? See X86InstrFormats.td for examples (e.g. TB). I'd like to see PUWLSH bits modeled more clearly. > Value |= 1 << 20; > > unsigned char BaseOpcode = getBaseOpcodeFor(Desc); > Index: lib/Target/ARM/ARMInstrInfo.h > =================================================================== > --- lib/Target/ARM/ARMInstrInfo.h (revis??o 41124) > +++ lib/Target/ARM/ARMInstrInfo.h (c??pia de trabalho) > @@ -73,43 +73,46 @@ > > // Multiply instructions > MulFrm = 2 << FormShift, > + MulSMLAW = 3 << FormShift, > + MulSMULW = 4 << FormShift, > + MulSMLA = 5 << FormShift, > + MulSMUL = 6 << FormShift, > > // Branch instructions > - Branch = 3 << FormShift, > - BranchMisc = 4 << FormShift, > + Branch = 7 << FormShift, > + BranchMisc = 8 << FormShift, > > // Data Processing instructions > - DPRdIm = 5 << FormShift, > - DPRdReg = 6 << FormShift, > - DPRdSoReg = 7 << FormShift, > - DPRdMisc = 8 << FormShift, > + DPRdIm = 9 << FormShift, > + DPRdReg = 10 << FormShift, > + DPRdSoReg = 11 << FormShift, > + DPRdMisc = 12 << FormShift, > > - DPRnIm = 9 << FormShift, > - DPRnReg = 10 << FormShift, > - DPRnSoReg = 11 << FormShift, > + DPRnIm = 13 << FormShift, > + DPRnReg = 14 << FormShift, > + DPRnSoReg = 15 << FormShift, > > - DPRIm = 12 << FormShift, > - DPRReg = 13 << FormShift, > - DPRSoReg = 14 << FormShift, > + DPRIm = 16 << FormShift, > + DPRReg = 17 << FormShift, > + DPRSoReg = 18 << FormShift, > > - DPRImS = 15 << FormShift, > - DPRRegS = 16 << FormShift, > - DPRSoRegS = 17 << FormShift, > + DPRImS = 19 << FormShift, > + DPRRegS = 20 << FormShift, > + DPRSoRegS = 21 << FormShift, > > // Load and Store > - LdFrm = 18 << FormShift, > - StFrm = 19 << FormShift, > + LdFrm = 22 << FormShift, > + StFrm = 23 << FormShift, > > // Miscellaneous arithmetic instructions > - ArithMisc = 20 << FormShift, > + ArithMisc = 24 << FormShift, > > // Thumb format > - ThumbFrm = 21 << FormShift, > + ThumbFrm = 25 << FormShift, > > // VFP format > - VPFFrm = 22 << FormShift > + VPFFrm = 26 << FormShift > > - > }; > } > > Index: lib/Target/ARM/ARMRelocations.h > =================================================================== > --- lib/Target/ARM/ARMRelocations.h (revis??o 41124) > +++ lib/Target/ARM/ARMRelocations.h (c??pia de trabalho) > @@ -21,8 +21,6 @@ > enum RelocationType { > reloc_arm_relative, > > - reloc_arm_absolute, > - > reloc_arm_branch > }; > } On Aug 16, 2007, at 2:07 PM, Raul Fernandes Herbster wrote: > Multiply instructions are being generated. ARM/JIT runs an > application with no calls to local functions, but library functions > calls are supported. I hope fix such problem soon. Please, send me > any feedback. > > Thanks in advance, Raul. > > -- > Raul Fernandes Herbster > Embedded and Pervasive Computing Laboratory - embedded.dee.ufcg.edu.br > Electrical Engineering Department - DEE - www.dee.ufcg.edu.br > Electrical Engineering and Informatics Center - CEEI > Federal University of Campina Grande - UFCG - www.ufcg.edu.br > Caixa Postal 10105 > 58109-970 Campina Grande - PB - Brasil > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20070817/7fc9984e/attachment.html From clattner at apple.com Fri Aug 17 14:05:04 2007 From: clattner at apple.com (Chris Lattner) Date: Fri, 17 Aug 2007 12:05:04 -0700 Subject: [llvm-commits] [PATCH] JIT support for ARM In-Reply-To: <77A7A5D7-BDEF-4D8E-AA73-B7E488F72180@apple.com> References: <6fbb4ff20708161407u49bd1833k8e6d147371d9515@mail.gmail.com> <77A7A5D7-BDEF-4D8E-AA73-B7E488F72180@apple.com> Message-ID: On Aug 17, 2007, at 12:02 PM, Evan Cheng wrote: > void *ARMJITInfo::emitFunctionStub(void *Fn, MachineCodeEmitter > &MCE) { > - unsigned addr = (intptr_t)Fn-MCE.getCurrentPCValue()-4; > + unsigned addr = (intptr_t)Fn; > // If this is just a call to an external function, emit a branch > instead of a > // call. The code is the same except for one bit of the last > instruction. > if (Fn != (void*)(intptr_t)ARMCompilationCallback) { > + // branch to the corresponding function addr > + MCE.startFunctionStub(8, 4); > + MCE.emitWordLE(0xE51FF004); // LDR PC, [PC,#-4] > > This is ok.... But I would rather see you refactor > getBinaryCodeForInstr() so you can "manufacture" the value by > passing it ARM::LDR, ARM::PC, etc.? Do you think that's possible? This probably isn't possible, because it would require creating a machineinstr to pass in. Other JITs do similar things :( -Chris From dpatel at apple.com Fri Aug 17 16:59:17 2007 From: dpatel at apple.com (Devang Patel) Date: Fri, 17 Aug 2007 21:59:17 -0000 Subject: [llvm-commits] [llvm] r41144 - in /llvm/trunk: include/llvm/Analysis/Dominators.h lib/Transforms/Scalar/LoopIndexSplit.cpp lib/Transforms/Utils/LCSSA.cpp Message-ID: <200708172159.l7HLxH3m021028@zion.cs.uiuc.edu> Author: dpatel Date: Fri Aug 17 16:59:16 2007 New Revision: 41144 URL: http://llvm.org/viewvc/llvm-project?rev=41144&view=rev Log: When one branch of condition is eliminated then head of the other branch is not necessary immediate dominators of merge blcok in all cases. Modified: llvm/trunk/include/llvm/Analysis/Dominators.h llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp llvm/trunk/lib/Transforms/Utils/LCSSA.cpp Modified: llvm/trunk/include/llvm/Analysis/Dominators.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/Dominators.h?rev=41144&r1=41143&r2=41144&view=diff ============================================================================== --- llvm/trunk/include/llvm/Analysis/Dominators.h (original) +++ llvm/trunk/include/llvm/Analysis/Dominators.h Fri Aug 17 16:59:16 2007 @@ -438,6 +438,26 @@ /// frontier to reflect this change. void splitBlock(BasicBlock *BB); + /// BasicBlock BB's new dominator is NewBB. Update BB's dominance frontier + /// to reflect this change. + void changeImmediateDominator(BasicBlock *BB, BasicBlock *NewBB, + DominatorTree *DT) { + // NewBB is now dominating BB. Which means BB's dominance + // frontier is now part of NewBB's dominance frontier. However, BB + // itself is not member of NewBB's dominance frontier. + DominanceFrontier::iterator NewDFI = find(NewBB); + DominanceFrontier::iterator DFI = find(BB); + DominanceFrontier::DomSetType BBSet = DFI->second; + for (DominanceFrontier::DomSetType::iterator BBSetI = BBSet.begin(), + BBSetE = BBSet.end(); BBSetI != BBSetE; ++BBSetI) { + BasicBlock *DFMember = *BBSetI; + // Insert only if NewBB dominates DFMember. + if (!DT->dominates(NewBB, DFMember)) + NewDFI->second.insert(DFMember); + } + NewDFI->second.erase(BB); + } + private: const DomSetType &calculate(const DominatorTree &DT, const DomTreeNode *Node); Modified: llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp?rev=41144&r1=41143&r2=41144&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp Fri Aug 17 16:59:16 2007 @@ -603,6 +603,7 @@ BasicBlock *LiveBB) { // First update DeadBB's dominance frontier. + SmallVector FrontierBBs; DominanceFrontier::iterator DeadBBDF = DF->find(DeadBB); if (DeadBBDF != DF->end()) { SmallVector PredBlocks; @@ -611,7 +612,8 @@ for (DominanceFrontier::DomSetType::iterator DeadBBSetI = DeadBBSet.begin(), DeadBBSetE = DeadBBSet.end(); DeadBBSetI != DeadBBSetE; ++DeadBBSetI) { BasicBlock *FrontierBB = *DeadBBSetI; - + FrontierBBs.push_back(FrontierBB); + // Rremove any PHI incoming edge from blocks dominated by DeadBB. PredBlocks.clear(); for(pred_iterator PI = pred_begin(FrontierBB), PE = pred_end(FrontierBB); @@ -620,7 +622,8 @@ if (P == DeadBB || DT->dominates(DeadBB, P)) PredBlocks.push_back(P); } - + + BasicBlock *NewDominator = NULL; for(BasicBlock::iterator FBI = FrontierBB->begin(), FBE = FrontierBB->end(); FBI != FBE; ++FBI) { if (PHINode *PN = dyn_cast(FBI)) { @@ -629,27 +632,14 @@ BasicBlock *P = *PI; PN->removeIncomingValue(P); } + // If we have not identified new dominator then see if we can identify + // one based on remaining incoming PHINode values. + if (NewDominator == NULL && PN->getNumIncomingValues() == 1) + NewDominator = PN->getIncomingBlock(0); } else break; - } - - DT->changeImmediateDominator(FrontierBB, LiveBB); - - // LiveBB is now dominating FrontierBB. Which means FrontierBB's dominance - // frontier is member of LiveBB's dominance frontier. However, FrontierBB - // itself is not member of LiveBB's dominance frontier. - DominanceFrontier::iterator LiveDF = DF->find(LiveBB); - DominanceFrontier::iterator FrontierDF = DF->find(FrontierBB); - DominanceFrontier::DomSetType FrontierBBSet = FrontierDF->second; - for (DominanceFrontier::DomSetType::iterator FrontierBBSetI = FrontierBBSet.begin(), - FrontierBBSetE = FrontierBBSet.end(); FrontierBBSetI != FrontierBBSetE; ++FrontierBBSetI) { - BasicBlock *DFMember = *FrontierBBSetI; - // Insert only if LiveBB dominates DFMember. - if (!DT->dominates(LiveBB, DFMember)) - LiveDF->second.insert(DFMember); - } - LiveDF->second.erase(FrontierBB); + } } } @@ -660,7 +650,7 @@ E = df_end(DN); DI != E; ++DI) { BasicBlock *BB = DI->getBlock(); WorkList.push_back(BB); - BB->getTerminator()->eraseFromParent(); + BB->replaceAllUsesWith(UndefValue::get(Type::LabelTy)); } while (!WorkList.empty()) { @@ -677,6 +667,31 @@ LI->removeBlock(BB); BB->eraseFromParent(); } + + // Update Frontier BBs' dominator info. + while (!FrontierBBs.empty()) { + BasicBlock *FBB = FrontierBBs.back(); FrontierBBs.pop_back(); + BasicBlock *NewDominator = FBB->getSinglePredecessor(); + if (!NewDominator) { + pred_iterator PI = pred_begin(FBB), PE = pred_end(FBB); + NewDominator = *PI; + ++PI; + if (NewDominator != LiveBB) { + for(; PI != PE; ++PI) { + BasicBlock *P = *PI; + if (P == LiveBB) { + NewDominator = LiveBB; + break; + } + NewDominator = DT->findNearestCommonDominator(NewDominator, P); + } + } + } + assert (NewDominator && "Unable to fix dominator info."); + DT->changeImmediateDominator(FBB, NewDominator); + DF->changeImmediateDominator(FBB, NewDominator, DT); + } + } bool LoopIndexSplit::splitLoop(SplitInfo &SD) { @@ -696,6 +711,12 @@ || Latch == SplitTerminator->getSuccessor(1))) return false; + + BasicBlock *Succ0 = SplitTerminator->getSuccessor(0); + BasicBlock *Succ1 = SplitTerminator->getSuccessor(1); + if (DT->dominates(Succ0, Latch) || DT->dominates(Succ1, Latch)) + return false; + // True loop is original loop. False loop is cloned loop. bool SignedPredicate = ExitCondition->isSignedPredicate(); Modified: llvm/trunk/lib/Transforms/Utils/LCSSA.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/LCSSA.cpp?rev=41144&r1=41143&r2=41144&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/LCSSA.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/LCSSA.cpp Fri Aug 17 16:59:16 2007 @@ -107,7 +107,8 @@ LI = &LPM.getAnalysis(); DT = &getAnalysis(); - + DominanceFrontier *DF = getAnalysisToUpdate(); + // Speed up queries by creating a sorted list of blocks LoopBlocks.clear(); LoopBlocks.insert(LoopBlocks.end(), L->block_begin(), L->block_end()); From dpatel at apple.com Fri Aug 17 17:02:16 2007 From: dpatel at apple.com (Devang Patel) Date: Fri, 17 Aug 2007 22:02:16 -0000 Subject: [llvm-commits] [llvm] r41146 - in /llvm/trunk/test/Transforms/LoopIndexSplit: ./ Crash-2007-08-17.ll Crash2-2007-08-17.ll OneIterLoop-2007-08-17.ll OneIterLoop2-2007-08-17.ll OneIterLoop3-2007-08-17.ll Output/ SaveLastValue-2007-08-17.ll dg.exp Message-ID: <200708172202.l7HM2GNP021344@zion.cs.uiuc.edu> Author: dpatel Date: Fri Aug 17 17:02:15 2007 New Revision: 41146 URL: http://llvm.org/viewvc/llvm-project?rev=41146&view=rev Log: Add loop index split tests. Added: llvm/trunk/test/Transforms/LoopIndexSplit/ llvm/trunk/test/Transforms/LoopIndexSplit/Crash-2007-08-17.ll llvm/trunk/test/Transforms/LoopIndexSplit/Crash2-2007-08-17.ll llvm/trunk/test/Transforms/LoopIndexSplit/OneIterLoop-2007-08-17.ll llvm/trunk/test/Transforms/LoopIndexSplit/OneIterLoop2-2007-08-17.ll llvm/trunk/test/Transforms/LoopIndexSplit/OneIterLoop3-2007-08-17.ll llvm/trunk/test/Transforms/LoopIndexSplit/Output/ llvm/trunk/test/Transforms/LoopIndexSplit/SaveLastValue-2007-08-17.ll llvm/trunk/test/Transforms/LoopIndexSplit/dg.exp Added: llvm/trunk/test/Transforms/LoopIndexSplit/Crash-2007-08-17.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopIndexSplit/Crash-2007-08-17.ll?rev=41146&view=auto ============================================================================== --- llvm/trunk/test/Transforms/LoopIndexSplit/Crash-2007-08-17.ll (added) +++ llvm/trunk/test/Transforms/LoopIndexSplit/Crash-2007-08-17.ll Fri Aug 17 17:02:15 2007 @@ -0,0 +1,53 @@ +; RUN: llvm-as < %s | opt -loop-index-split -disable-output -stats |& \ +; RUN: grep "loop-index-split" | count 1 + + %struct._edit_script = type { %struct._edit_script*, i32, i8 } + +define void @align_path(i8* %seq1, i8* %seq2, i32 %i1, i32 %j1, i32 %i2, i32 %j2, i32 %dist, %struct._edit_script** %head, %struct._edit_script** %tail, i32 %M, i32 %N) { +entry: + br label %bb354 + +bb354: ; preds = %bb511, %entry + br i1 false, label %bb495, label %bb368 + +bb368: ; preds = %bb354 + ret void + +bb495: ; preds = %bb495, %bb354 + br i1 false, label %bb511, label %bb495 + +bb511: ; preds = %bb495 + br i1 false, label %xmalloc.exit69, label %bb354 + +xmalloc.exit69: ; preds = %bb511 + br i1 false, label %bb556, label %bb542.preheader + +bb542.preheader: ; preds = %xmalloc.exit69 + ret void + +bb556: ; preds = %xmalloc.exit69 + br label %bb583 + +bb583: ; preds = %cond_next693, %bb556 + %k.4342.0 = phi i32 [ %tmp707, %cond_next693 ], [ 0, %bb556 ] ; [#uses=2] + %tmp586 = icmp eq i32 %k.4342.0, 0 ; [#uses=1] + br i1 %tmp586, label %cond_true589, label %cond_false608 + +cond_true589: ; preds = %bb583 + br label %cond_next693 + +cond_false608: ; preds = %bb583 + br i1 false, label %cond_next661, label %cond_next693 + +cond_next661: ; preds = %cond_false608 + br label %cond_next693 + +cond_next693: ; preds = %cond_next661, %cond_false608, %cond_true589 + %tmp705 = getelementptr i32* null, i32 0 ; [#uses=0] + %tmp707 = add i32 %k.4342.0, 1 ; [#uses=2] + %tmp711 = icmp sgt i32 %tmp707, 0 ; [#uses=1] + br i1 %tmp711, label %bb726.preheader, label %bb583 + +bb726.preheader: ; preds = %cond_next693 + ret void +} Added: llvm/trunk/test/Transforms/LoopIndexSplit/Crash2-2007-08-17.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopIndexSplit/Crash2-2007-08-17.ll?rev=41146&view=auto ============================================================================== --- llvm/trunk/test/Transforms/LoopIndexSplit/Crash2-2007-08-17.ll (added) +++ llvm/trunk/test/Transforms/LoopIndexSplit/Crash2-2007-08-17.ll Fri Aug 17 17:02:15 2007 @@ -0,0 +1,59 @@ +; RUN: llvm-as < %s | opt -loop-index-split -disable-output -stats |& \ +; RUN: grep "loop-index-split" | count 1 + + %struct._edit_script = type { %struct._edit_script*, i32, i8 } + +define void @align_path(i8* %seq1, i8* %seq2, i32 %i1, i32 %j1, i32 %i2, i32 %j2, i32 %dist, %struct._edit_script** %head, %struct._edit_script** %tail, i32 %M, i32 %N) { +entry: + br label %bb354 + +bb354: ; preds = %bb511, %entry + br i1 false, label %bb495, label %bb368 + +bb368: ; preds = %bb354 + ret void + +bb495: ; preds = %bb495, %bb354 + br i1 false, label %bb511, label %bb495 + +bb511: ; preds = %bb495 + br i1 false, label %xmalloc.exit69, label %bb354 + +xmalloc.exit69: ; preds = %bb511 + br i1 false, label %bb556, label %bb542.preheader + +bb542.preheader: ; preds = %xmalloc.exit69 + ret void + +bb556: ; preds = %xmalloc.exit69 + br label %bb583 + +bb583: ; preds = %cond_next693, %bb556 + %k.4342.0 = phi i32 [ %tmp707, %cond_next693 ], [ 0, %bb556 ] ; [#uses=2] + %tmp586 = icmp eq i32 %k.4342.0, 0 ; [#uses=1] + br i1 %tmp586, label %cond_true589, label %cond_false608 + +cond_true589: ; preds = %bb583 + br label %cond_next693 + +cond_false608: ; preds = %bb583 + br i1 false, label %bb645, label %cond_next693 + +bb645: ; preds = %cond_false608 + br i1 false, label %bb684, label %cond_next661 + +cond_next661: ; preds = %bb645 + br i1 false, label %bb684, label %cond_next693 + +bb684: ; preds = %cond_next661, %bb645 + br label %cond_next693 + +cond_next693: ; preds = %bb684, %cond_next661, %cond_false608, %cond_true589 + %tmp705 = getelementptr i32* null, i32 0 ; [#uses=0] + %tmp707 = add i32 %k.4342.0, 1 ; [#uses=2] + %tmp711 = icmp sgt i32 %tmp707, 0 ; [#uses=1] + br i1 %tmp711, label %bb726.preheader, label %bb583 + +bb726.preheader: ; preds = %cond_next693 + ret void +} Added: llvm/trunk/test/Transforms/LoopIndexSplit/OneIterLoop-2007-08-17.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopIndexSplit/OneIterLoop-2007-08-17.ll?rev=41146&view=auto ============================================================================== --- llvm/trunk/test/Transforms/LoopIndexSplit/OneIterLoop-2007-08-17.ll (added) +++ llvm/trunk/test/Transforms/LoopIndexSplit/OneIterLoop-2007-08-17.ll Fri Aug 17 17:02:15 2007 @@ -0,0 +1,61 @@ +; Loop is elimianted +; RUN: llvm-as < %s | opt -loop-index-split -disable-output -stats |& \ +; RUN: grep "loop-index-split" | count 1 + %struct.anon = type { i32 } + at S1 = external global i32 ; [#uses=1] + at W1 = external global i32 ; [#uses=1] + at Y = weak global [100 x %struct.anon] zeroinitializer, align 32 ; <[100 x %struct.anon]*> [#uses=1] + at ti = external global i32 ; [#uses=1] + at T2 = external global [100 x [100 x i32]] ; <[100 x [100 x i32]]*> [#uses=1] + at d = external global i32 ; [#uses=1] + at T1 = external global i32 ; [#uses=2] + at N2 = external global i32 ; [#uses=2] + +define void @foo() { +entry: + %tmp = load i32* @S1, align 4 ; [#uses=2] + %tmp266 = load i32* @N2, align 4 ; [#uses=1] + %tmp288 = icmp ult i32 %tmp, %tmp266 ; [#uses=1] + br i1 %tmp288, label %bb.preheader, label %return + +bb.preheader: ; preds = %entry + %tmp1 = load i32* @W1, align 4 ; [#uses=1] + %tmp13 = load i32* @ti, align 4 ; [#uses=1] + %tmp18 = load i32* @d, align 4 ; [#uses=1] + %tmp26 = load i32* @N2, align 4 ; [#uses=1] + %T1.promoted = load i32* @T1 ; [#uses=1] + br label %bb + +bb: ; preds = %bb.preheader, %bb25 + %T1.tmp.1 = phi i32 [ %T1.promoted, %bb.preheader ], [ %T1.tmp.0, %bb25 ] ; [#uses=3] + %tj.01.0 = phi i32 [ %tmp24, %bb25 ], [ %tmp, %bb.preheader ] ; [#uses=4] + %tmp3 = icmp eq i32 %tj.01.0, %tmp1 ; [#uses=1] + br i1 %tmp3, label %cond_true, label %bb25 + +cond_true: ; preds = %bb + %tmp7 = getelementptr [100 x %struct.anon]* @Y, i32 0, i32 %tj.01.0, i32 0 ; [#uses=1] + %tmp8 = load i32* %tmp7, align 4 ; [#uses=1] + %tmp9 = icmp sgt i32 %tmp8, 0 ; [#uses=1] + br i1 %tmp9, label %cond_true12, label %bb25 + +cond_true12: ; preds = %cond_true + %tmp16 = getelementptr [100 x [100 x i32]]* @T2, i32 0, i32 %tmp13, i32 %tj.01.0 ; [#uses=1] + %tmp17 = load i32* %tmp16, align 4 ; [#uses=1] + %tmp19 = mul i32 %tmp18, %tmp17 ; [#uses=1] + %tmp21 = add i32 %tmp19, %T1.tmp.1 ; [#uses=1] + br label %bb25 + +bb25: ; preds = %cond_true, %bb, %cond_true12 + %T1.tmp.0 = phi i32 [ %T1.tmp.1, %bb ], [ %T1.tmp.1, %cond_true ], [ %tmp21, %cond_true12 ] ; [#uses=2] + %tmp24 = add i32 %tj.01.0, 1 ; [#uses=2] + %tmp28 = icmp ult i32 %tmp24, %tmp26 ; [#uses=1] + br i1 %tmp28, label %bb, label %return.loopexit + +return.loopexit: ; preds = %bb25 + %T1.tmp.0.lcssa = phi i32 [ %T1.tmp.0, %bb25 ] ; [#uses=1] + store i32 %T1.tmp.0.lcssa, i32* @T1 + br label %return + +return: ; preds = %return.loopexit, %entry + ret void +} Added: llvm/trunk/test/Transforms/LoopIndexSplit/OneIterLoop2-2007-08-17.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopIndexSplit/OneIterLoop2-2007-08-17.ll?rev=41146&view=auto ============================================================================== --- llvm/trunk/test/Transforms/LoopIndexSplit/OneIterLoop2-2007-08-17.ll (added) +++ llvm/trunk/test/Transforms/LoopIndexSplit/OneIterLoop2-2007-08-17.ll Fri Aug 17 17:02:15 2007 @@ -0,0 +1,62 @@ +; Loop is elimianted. Save last value assignment. +; RUN: llvm-as < %s | opt -loop-index-split -disable-output -stats |& \ +; RUN: grep "loop-index-split" | count 1 + + %struct.anon = type { i32 } + at S1 = external global i32 ; [#uses=1] + at W1 = external global i32 ; [#uses=1] + at Y = weak global [100 x %struct.anon] zeroinitializer, align 32 ; <[100 x %struct.anon]*> [#uses=1] + at ti = external global i32 ; [#uses=1] + at T2 = external global [100 x [100 x i32]] ; <[100 x [100 x i32]]*> [#uses=1] + at d = external global i32 ; [#uses=1] + at T1 = external global i32 ; [#uses=2] + at N1 = external global i32 ; [#uses=2] + +define void @foo() { +entry: + %tmp = load i32* @S1, align 4 ; [#uses=2] + %tmp266 = load i32* @N1, align 4 ; [#uses=1] + %tmp288 = icmp ult i32 %tmp, %tmp266 ; [#uses=1] + br i1 %tmp288, label %bb.preheader, label %return + +bb.preheader: ; preds = %entry + %tmp1 = load i32* @W1, align 4 ; [#uses=1] + %tmp13 = load i32* @ti, align 4 ; [#uses=1] + %tmp18 = load i32* @d, align 4 ; [#uses=1] + %tmp26 = load i32* @N1, align 4 ; [#uses=1] + %T1.promoted = load i32* @T1 ; [#uses=1] + br label %bb + +bb: ; preds = %bb.preheader, %bb25 + %T1.tmp.1 = phi i32 [ %T1.promoted, %bb.preheader ], [ %T1.tmp.0, %bb25 ] ; [#uses=3] + %tj.01.0 = phi i32 [ %tmp24, %bb25 ], [ %tmp, %bb.preheader ] ; [#uses=4] + %tmp24 = add i32 %tj.01.0, 1 ; [#uses=2] + %tmp3 = icmp eq i32 %tmp24, %tmp1 ; [#uses=1] + br i1 %tmp3, label %cond_true, label %bb25 + +cond_true: ; preds = %bb + %tmp7 = getelementptr [100 x %struct.anon]* @Y, i32 0, i32 %tj.01.0, i32 0 ; [#uses=1] + %tmp8 = load i32* %tmp7, align 4 ; [#uses=1] + %tmp9 = icmp sgt i32 %tmp8, 0 ; [#uses=1] + br i1 %tmp9, label %cond_true12, label %bb25 + +cond_true12: ; preds = %cond_true + %tmp16 = getelementptr [100 x [100 x i32]]* @T2, i32 0, i32 %tmp13, i32 %tj.01.0 ; [#uses=1] + %tmp17 = load i32* %tmp16, align 4 ; [#uses=1] + %tmp19 = mul i32 %tmp18, %tmp17 ; [#uses=1] + %tmp21 = add i32 %tmp19, %T1.tmp.1 ; [#uses=1] + br label %bb25 + +bb25: ; preds = %cond_true, %bb, %cond_true12 + %T1.tmp.0 = phi i32 [ %T1.tmp.1, %bb ], [ %T1.tmp.1, %cond_true ], [ %tmp21, %cond_true12 ] ; [#uses=2] + %tmp28 = icmp ult i32 %tmp24, %tmp26 ; [#uses=1] + br i1 %tmp28, label %bb, label %return.loopexit + +return.loopexit: ; preds = %bb25 + %T1.tmp.0.lcssa = phi i32 [ %T1.tmp.0, %bb25 ] ; [#uses=1] + store i32 %T1.tmp.0.lcssa, i32* @T1 + br label %return + +return: ; preds = %return.loopexit, %entry + ret void +} Added: llvm/trunk/test/Transforms/LoopIndexSplit/OneIterLoop3-2007-08-17.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopIndexSplit/OneIterLoop3-2007-08-17.ll?rev=41146&view=auto ============================================================================== --- llvm/trunk/test/Transforms/LoopIndexSplit/OneIterLoop3-2007-08-17.ll (added) +++ llvm/trunk/test/Transforms/LoopIndexSplit/OneIterLoop3-2007-08-17.ll Fri Aug 17 17:02:15 2007 @@ -0,0 +1,35 @@ +; Loop is elimianted. Save last value assignments, including induction variable. +; RUN: llvm-as < %s | opt -loop-index-split -disable-output -stats |& \ +; RUN: grep "loop-index-split" | count 1 + +declare i32 @foo(i32) +declare i32 @bar(i32, i32) + +define void @foobar(i32 %a, i32 %b) { +entry: + br label %bb + +bb: ; preds = %cond_next, %entry + %i.01.0 = phi i32 [ 0, %entry ], [ %tmp8, %cond_next ] ; [#uses=3] + %tsum.16.0 = phi i32 [ 42, %entry ], [ %tsum.0, %cond_next ] ; [#uses=2] + %tmp1 = icmp eq i32 %i.01.0, 50 ; [#uses=1] + br i1 %tmp1, label %cond_true, label %cond_next + +cond_true: ; preds = %bb + %tmp4 = tail call i32 @foo( i32 %i.01.0 ) ; [#uses=1] + %tmp6 = add i32 %tmp4, %tsum.16.0 ; [#uses=1] + br label %cond_next + +cond_next: ; preds = %bb, %cond_true + %tsum.0 = phi i32 [ %tmp6, %cond_true ], [ %tsum.16.0, %bb ] ; [#uses=2] + %tmp8 = add i32 %i.01.0, 1 ; [#uses=3] + %tmp11 = icmp slt i32 %tmp8, 100 ; [#uses=1] + br i1 %tmp11, label %bb, label %bb14 + +bb14: ; preds = %cond_next + %tmp8.lcssa = phi i32 [ %tmp8, %cond_next ] ; [#uses=1] + %tsum.0.lcssa = phi i32 [ %tsum.0, %cond_next ] ; [#uses=1] + %tmp17 = tail call i32 @bar( i32 %tmp8.lcssa, i32 %tsum.0.lcssa ) ; [#uses=0] + ret void +} + Added: llvm/trunk/test/Transforms/LoopIndexSplit/SaveLastValue-2007-08-17.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopIndexSplit/SaveLastValue-2007-08-17.ll?rev=41146&view=auto ============================================================================== --- llvm/trunk/test/Transforms/LoopIndexSplit/SaveLastValue-2007-08-17.ll (added) +++ llvm/trunk/test/Transforms/LoopIndexSplit/SaveLastValue-2007-08-17.ll Fri Aug 17 17:02:15 2007 @@ -0,0 +1,52 @@ +; Split loop. Save last value. +; RUN: llvm-as < %s | opt -loop-index-split -disable-output -stats |& \ +; RUN: grep "loop-index-split" | count 1 + + at k = external global i32 ; [#uses=2] + +define void @foobar(i32 %a, i32 %b) { +entry: + br label %bb + +bb: ; preds = %cond_next16, %entry + %i.01.0 = phi i32 [ 0, %entry ], [ %tmp18, %cond_next16 ] ; [#uses=5] + %tsum.18.0 = phi i32 [ 42, %entry ], [ %tsum.013.1, %cond_next16 ] ; [#uses=3] + %tmp1 = icmp slt i32 %i.01.0, 50 ; [#uses=1] + br i1 %tmp1, label %cond_true, label %cond_false + +cond_true: ; preds = %bb + %tmp4 = tail call i32 @foo( i32 %i.01.0 ) ; [#uses=1] + %tmp6 = add i32 %tmp4, %tsum.18.0 ; [#uses=2] + %tmp914 = load i32* @k, align 4 ; [#uses=1] + %tmp1015 = icmp eq i32 %tmp914, 0 ; [#uses=1] + br i1 %tmp1015, label %cond_next16, label %cond_true13 + +cond_false: ; preds = %bb + %tmp8 = tail call i32 @bar( i32 %i.01.0 ) ; [#uses=0] + %tmp9 = load i32* @k, align 4 ; [#uses=1] + %tmp10 = icmp eq i32 %tmp9, 0 ; [#uses=1] + br i1 %tmp10, label %cond_next16, label %cond_true13 + +cond_true13: ; preds = %cond_false, %cond_true + %tsum.013.0 = phi i32 [ %tmp6, %cond_true ], [ %tsum.18.0, %cond_false ] ; [#uses=1] + %tmp15 = tail call i32 @bar( i32 %i.01.0 ) ; [#uses=0] + br label %cond_next16 + +cond_next16: ; preds = %cond_false, %cond_true, %cond_true13 + %tsum.013.1 = phi i32 [ %tsum.013.0, %cond_true13 ], [ %tmp6, %cond_true ], [ %tsum.18.0, %cond_false ] ; [#uses=2] + %tmp18 = add i32 %i.01.0, 1 ; [#uses=3] + %tmp21 = icmp slt i32 %tmp18, 100 ; [#uses=1] + br i1 %tmp21, label %bb, label %bb24 + +bb24: ; preds = %cond_next16 + %tmp18.lcssa = phi i32 [ %tmp18, %cond_next16 ] ; [#uses=1] + %tsum.013.1.lcssa = phi i32 [ %tsum.013.1, %cond_next16 ] ; [#uses=1] + %tmp27 = tail call i32 @t( i32 %tmp18.lcssa, i32 %tsum.013.1.lcssa ) ; [#uses=0] + ret void +} + +declare i32 @foo(i32) + +declare i32 @bar(i32) + +declare i32 @t(i32, i32) Added: llvm/trunk/test/Transforms/LoopIndexSplit/dg.exp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopIndexSplit/dg.exp?rev=41146&view=auto ============================================================================== --- llvm/trunk/test/Transforms/LoopIndexSplit/dg.exp (added) +++ llvm/trunk/test/Transforms/LoopIndexSplit/dg.exp Fri Aug 17 17:02:15 2007 @@ -0,0 +1,3 @@ +load_lib llvm.exp + +RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,llx,c,cpp,tr}]] From dpatel at apple.com Fri Aug 17 19:00:32 2007 From: dpatel at apple.com (Devang Patel) Date: Sat, 18 Aug 2007 00:00:32 -0000 Subject: [llvm-commits] [llvm] r41148 - /llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp Message-ID: <200708180000.l7I00W63027363@zion.cs.uiuc.edu> Author: dpatel Date: Fri Aug 17 19:00:32 2007 New Revision: 41148 URL: http://llvm.org/viewvc/llvm-project?rev=41148&view=rev Log: Avoid spliting loops where two split condition branches are not independent. Modified: llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp Modified: llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp?rev=41148&r1=41147&r2=41148&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp Fri Aug 17 19:00:32 2007 @@ -711,12 +711,22 @@ || Latch == SplitTerminator->getSuccessor(1))) return false; - + // If one of the split condition branch is post dominating other then loop + // index split is not appropriate. BasicBlock *Succ0 = SplitTerminator->getSuccessor(0); BasicBlock *Succ1 = SplitTerminator->getSuccessor(1); if (DT->dominates(Succ0, Latch) || DT->dominates(Succ1, Latch)) return false; + // If one of the split condition branch is a predecessor of the other + // split condition branch head then do not split loop on this condition. + for(pred_iterator PI = pred_begin(Succ0), PE = pred_end(Succ0); PI != PE; ++PI) + if (Succ1 == *PI) + return false; + for(pred_iterator PI = pred_begin(Succ1), PE = pred_end(Succ1); PI != PE; ++PI) + if (Succ0 == *PI) + return false; + // True loop is original loop. False loop is cloned loop. bool SignedPredicate = ExitCondition->isSignedPredicate(); From raulherbster at gmail.com Fri Aug 17 19:15:12 2007 From: raulherbster at gmail.com (Raul Fernandes Herbster) Date: Fri, 17 Aug 2007 21:15:12 -0300 Subject: [llvm-commits] [PATCH] JIT support for ARM In-Reply-To: References: <6fbb4ff20708161407u49bd1833k8e6d147371d9515@mail.gmail.com> <77A7A5D7-BDEF-4D8E-AA73-B7E488F72180@apple.com> Message-ID: <6fbb4ff20708171715w4e58311w215330dd9a0b5dc5@mail.gmail.com> Yes, Chris. I'd have to create a big switch table. 2007/8/17, Chris Lattner : > > > On Aug 17, 2007, at 12:02 PM, Evan Cheng wrote: > > > void *ARMJITInfo::emitFunctionStub(void *Fn, MachineCodeEmitter > > &MCE) { > > - unsigned addr = (intptr_t)Fn-MCE.getCurrentPCValue()-4; > > + unsigned addr = (intptr_t)Fn; > > // If this is just a call to an external function, emit a branch > > instead of a > > // call. The code is the same except for one bit of the last > > instruction. > > if (Fn != (void*)(intptr_t)ARMCompilationCallback) { > > + // branch to the corresponding function addr > > + MCE.startFunctionStub(8, 4); > > + MCE.emitWordLE(0xE51FF004); // LDR PC, [PC,#-4] > > > > This is ok.... But I would rather see you refactor > > getBinaryCodeForInstr() so you can "manufacture" the value by > > passing it ARM::LDR, ARM::PC, etc.? Do you think that's possible? > > This probably isn't possible, because it would require creating a > machineinstr to pass in. Other JITs do similar things :( > > -Chris > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > -- Raul Fernandes Herbster Embedded and Pervasive Computing Laboratory - embedded.dee.ufcg.edu.br Electrical Engineering Department - DEE - www.ee.ufcg.edu.br Electrical Engineering and Informatics Center - CEEI Federal University of Campina Grande - UFCG - www.ufcg.edu.br Caixa Postal 10105 58109-970 Campina Grande - PB - Brasil -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20070817/7a8a350a/attachment.html From raulherbster at gmail.com Fri Aug 17 19:28:05 2007 From: raulherbster at gmail.com (Raul Fernandes Herbster) Date: Fri, 17 Aug 2007 21:28:05 -0300 Subject: [llvm-commits] [PATCH] JIT support for ARM In-Reply-To: <77A7A5D7-BDEF-4D8E-AA73-B7E488F72180@apple.com> References: <6fbb4ff20708161407u49bd1833k8e6d147371d9515@mail.gmail.com> <77A7A5D7-BDEF-4D8E-AA73-B7E488F72180@apple.com> Message-ID: <6fbb4ff20708171728u52190d10p7f5dc87268d5a46e@mail.gmail.com> 2007/8/17, Evan Cheng : > > Very good progress. Thanks! > > Comments inline. > > Evan > > ... > > Please use abort() instead so it does what's expected in non-debug build. > OK ... > > i s -> is :-) > OK Also, why the name "ARMCompilationCallbackC"? Is it language specific? > I used the same naming convention of PPCJITInfo.cpp("PPCCompilationCallbackC"). I can also use naming convention of X86ITInfo.cpp, which uses "X86CompilationCallback2"). ... > > Does a similar assertion makes sense here? > I dont think so. Such code is only called for branch and link instruction. In fact, the stub calls a function with MOV and LDR, instead of BL/B (because that problem of 24-bits field). ... > > This is ok.... But I would rather see you refactor getBinaryCodeForInstr() > so you can "manufacture" the value by passing it ARM::LDR, ARM::PC, etc.? Do > you think that's possible? > I don't think it is possible. If I "manufacture" the value by passing the opcode (ARM::LDR, ARM::PC...), I'll have to implement a big switch table as I did before (you have already comment this solution before). Generating the instructions using its classes it's better. Also, in Emitter::getBinaryCodeForInstr(): > > unsigned Emitter::getBinaryCodeForInstr(const MachineInstr &MI) { > const TargetInstrDescriptor *Desc = MI.getInstrDescriptor(); > const unsigned opcode = MI.getOpcode(); > unsigned Value = 0xE0000000; > > > Comments? What is 0xe000000? > Ok. I'll comment. It is an initial instruction mask. > > Can 12 (and all the magic shift amounts in this function) be defined in > ARMII enum? So you add comments there rather than in this code. > You're rigth. I'll define them in ARMII enum. + MCE.emitWordLE(addr); > } else { > - MCE.startFunctionStub(5, 2); > - MCE.emitByte(0xEB); // branch and link to the corresponding function > addr > + // branch and link to the corresponding function addr > + MCE.startFunctionStub(20, 4); > + MCE.emitWordLE(0xE92D4800); // STMFD SP!, [R11, LR] > + MCE.emitWordLE(0xE28FE004); // ADD LR, PC, #4 > + MCE.emitWordLE(0xE51FF004); // LDR PC, [PC,#-4] > + MCE.emitWordLE(addr); > + MCE.emitWordLE(0xE8BD8800); // LDMFD SP!, [R11, PC] > > Ditto. > There are comments for the hexa numbers emitted (MCE.emitWordLE). In such code, I'd better comment instructionsMCE.startFunctionStub(). > switch ((ARM::RelocationType)MR->getRelocationType()) { > case ARM::reloc_arm_relative: { > // PC relative relocation > - *((unsigned*)RelocPos) += (unsigned)ResultPtr; > + ResultPtr = ResultPtr-(intptr_t)RelocPos-8; > + if (ResultPtr >= 0) > + *((unsigned*)RelocPos) |= 1 << 23; > + else { > + ResultPtr *= -1; > + *((unsigned*)RelocPos) &= 0xFF7FFFFF; > > > Please explain what's going on here? :-) > :-). OK. Evan, sorry for not making comments. In certain functions of files PPCJITInfo.cpp and X86JITInfo.cpp , I did not see any comments so I though that I could ignore them. I'll explain it. Instead of special casing it for LDRD, perhaps add a LB (L bit) class and > attach to the other instructions that need it? > LdFrm/StFrm is used to set bit L. However, the instruction LDRD is an "Enhanced DSP Extension" instruction (page A10-8) and it doesn't have an L bit to be set (neither STRD). I'd like to see PUWLSH bits modeled more clearly. > > In order to model bits PUWLSH, I'll have to create more classes. However, some information about such bits can be retrieved from some other information: bit P: there are three classes of addr. I check if it is IndexModePost to set it to 1. bit U: I have to check immed value (U=1 is possitive, U=0 it is possitive) bit L: cI've created classes for it (ARMII::StFrm, ARMII::LdFrm). bit S: I've created classes for it (ARMII::DPRImS,ARMII::DPRRegS,ARMII::DPRSoRegS). bit W: is set according to addr mode. -- Raul Fernandes Herbster Embedded and Pervasive Computing Laboratory - embedded.dee.ufcg.edu.br Electrical Engineering Department - DEE - www.ee.ufcg.edu.br Electrical Engineering and Informatics Center - CEEI Federal University of Campina Grande - UFCG - www.ufcg.edu.br Caixa Postal 10105 58109-970 Campina Grande - PB - Brasil -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20070817/525fa54c/attachment.html From bruno.cardoso at gmail.com Fri Aug 17 20:46:45 2007 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Sat, 18 Aug 2007 01:46:45 -0000 Subject: [llvm-commits] [llvm] r41149 - /llvm/trunk/lib/Target/Mips/MipsSchedule.td Message-ID: <200708180146.l7I1kjfk000672@zion.cs.uiuc.edu> Author: bruno Date: Fri Aug 17 20:46:44 2007 New Revision: 41149 URL: http://llvm.org/viewvc/llvm-project?rev=41149&view=rev Log: Mips generic fallback instruction schedule support! Added: llvm/trunk/lib/Target/Mips/MipsSchedule.td Added: llvm/trunk/lib/Target/Mips/MipsSchedule.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsSchedule.td?rev=41149&view=auto ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsSchedule.td (added) +++ llvm/trunk/lib/Target/Mips/MipsSchedule.td Fri Aug 17 20:46:44 2007 @@ -0,0 +1,63 @@ +//===- MipsSchedule.td - Mips Scheduling Definitions ------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file was developed by Bruno Cardoso Lopes and is distributed under the +// University of Illinois Open Source License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +//===----------------------------------------------------------------------===// +// Functional units across Mips chips sets. Based on GCC/Mips backend files. +//===----------------------------------------------------------------------===// +def ALU : FuncUnit; +def IMULDIV : FuncUnit; + +//===----------------------------------------------------------------------===// +// Instruction Itinerary classes used for Mips +//===----------------------------------------------------------------------===// +def IIAlu : InstrItinClass; +def IILoad : InstrItinClass; +def IIStore : InstrItinClass; +def IIXfer : InstrItinClass; +def IIBranch : InstrItinClass; +def IIHiLo : InstrItinClass; +def IIImul : InstrItinClass; +def IIIdiv : InstrItinClass; +def IIFcvt : InstrItinClass; +def IIFmove : InstrItinClass; +def IIFcmp : InstrItinClass; +def IIFadd : InstrItinClass; +def IIFmulSingle : InstrItinClass; +def IIFmulDouble : InstrItinClass; +def IIFdivSingle : InstrItinClass; +def IIFdivDouble : InstrItinClass; +def IIFsqrtSingle : InstrItinClass; +def IIFsqrtDouble : InstrItinClass; +def IIFrecipFsqrtStep : InstrItinClass; +def IIPseudo : InstrItinClass; + +//===----------------------------------------------------------------------===// +// Mips Generic instruction itineraries. +//===----------------------------------------------------------------------===// +def MipsGenericItineraries : ProcessorItineraries<[ + InstrItinData]>, + InstrItinData]>, + InstrItinData]>, + InstrItinData]>, + InstrItinData]>, + InstrItinData]>, + InstrItinData]>, + InstrItinData]>, + InstrItinData]>, + InstrItinData]>, + InstrItinData]>, + InstrItinData]>, + InstrItinData]>, + InstrItinData]>, + InstrItinData]>, + InstrItinData]>, + InstrItinData]>, + InstrItinData]>, + InstrItinData]> +]>; From bruno.cardoso at gmail.com Fri Aug 17 20:50:47 2007 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Sat, 18 Aug 2007 01:50:47 -0000 Subject: [llvm-commits] [llvm] r41150 - /llvm/trunk/lib/Target/Mips/MipsDelaySlotFiller.cpp Message-ID: <200708180150.l7I1olg1001234@zion.cs.uiuc.edu> Author: bruno Date: Fri Aug 17 20:50:47 2007 New Revision: 41150 URL: http://llvm.org/viewvc/llvm-project?rev=41150&view=rev Log: A Pass to insert Nops on intructions with DelaySlot Added: llvm/trunk/lib/Target/Mips/MipsDelaySlotFiller.cpp Added: llvm/trunk/lib/Target/Mips/MipsDelaySlotFiller.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsDelaySlotFiller.cpp?rev=41150&view=auto ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsDelaySlotFiller.cpp (added) +++ llvm/trunk/lib/Target/Mips/MipsDelaySlotFiller.cpp Fri Aug 17 20:50:47 2007 @@ -0,0 +1,77 @@ +//===-- DelaySlotFiller.cpp - Mips delay slot filler ---------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file was developed by Bruno Cardoso Lopes and is distributed under +// the University of Illinois Open Source License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// Simple pass to fills delay slots with NOPs. +// +//===----------------------------------------------------------------------===// + +#define DEBUG_TYPE "delay-slot-filler" + +#include "Mips.h" +#include "MipsTargetMachine.h" +#include "llvm/CodeGen/MachineFunctionPass.h" +#include "llvm/CodeGen/MachineInstrBuilder.h" +#include "llvm/Target/TargetInstrInfo.h" +#include "llvm/ADT/Statistic.h" + +using namespace llvm; + +STATISTIC(FilledSlots, "Number of delay slots filled"); + +namespace { + struct Filler : public MachineFunctionPass { + + TargetMachine &TM; + const TargetInstrInfo *TII; + + static char ID; + Filler(TargetMachine &tm) + : MachineFunctionPass((intptr_t)&ID), TM(tm), TII(tm.getInstrInfo()) { } + + virtual const char *getPassName() const { + return "Mips Delay Slot Filler"; + } + + bool runOnMachineBasicBlock(MachineBasicBlock &MBB); + bool runOnMachineFunction(MachineFunction &F) { + bool Changed = false; + for (MachineFunction::iterator FI = F.begin(), FE = F.end(); + FI != FE; ++FI) + Changed |= runOnMachineBasicBlock(*FI); + return Changed; + } + + }; + char Filler::ID = 0; +} // end of anonymous namespace + +/// runOnMachineBasicBlock - Fill in delay slots for the given basic block. +/// Currently, we fill delay slots with NOPs. We assume there is only one +/// delay slot per delayed instruction. +bool Filler:: +runOnMachineBasicBlock(MachineBasicBlock &MBB) +{ + bool Changed = false; + for (MachineBasicBlock::iterator I = MBB.begin(); I != MBB.end(); ++I) + if (TII->hasDelaySlot(I->getOpcode())) { + MachineBasicBlock::iterator J = I; + ++J; + BuildMI(MBB, J, TII->get(Mips::NOP)); + ++FilledSlots; + Changed = true; + } + return Changed; +} + +/// createMipsDelaySlotFillerPass - Returns a pass that fills in delay +/// slots in Mips MachineFunctions +FunctionPass *llvm::createMipsDelaySlotFillerPass(MipsTargetMachine &tm) { + return new Filler(tm); +} + From bruno.cardoso at gmail.com Fri Aug 17 20:52:27 2007 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Sat, 18 Aug 2007 01:52:27 -0000 Subject: [llvm-commits] [llvm] r41151 - /llvm/trunk/lib/Target/Mips/MipsSubtarget.h Message-ID: <200708180152.l7I1qRZa001472@zion.cs.uiuc.edu> Author: bruno Date: Fri Aug 17 20:52:27 2007 New Revision: 41151 URL: http://llvm.org/viewvc/llvm-project?rev=41151&view=rev Log: InstrItineraryData support on added. Added Mips3 ISA feature (needed when supporting R4000 machines) Modified: llvm/trunk/lib/Target/Mips/MipsSubtarget.h Modified: llvm/trunk/lib/Target/Mips/MipsSubtarget.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsSubtarget.h?rev=41151&r1=41150&r2=41151&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsSubtarget.h (original) +++ llvm/trunk/lib/Target/Mips/MipsSubtarget.h Fri Aug 17 20:52:27 2007 @@ -23,8 +23,12 @@ class Module; class MipsSubtarget : public TargetSubtarget { + protected: - bool isR3000; + + bool IsMipsIII; + InstrItineraryData InstrItins; + public: /// This constructor initializes the data members to match that /// of the specified module. @@ -36,7 +40,9 @@ /// subtarget options. Definition of function is auto generated by tblgen. void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU); - bool IsR3000() const { return isR3000; } + /// isMipsIII - Return true if the selected CPU supports MipsIII ISA + /// support. + bool isMipsIII() const { return IsMipsIII; } }; } // End llvm namespace From bruno.cardoso at gmail.com Fri Aug 17 20:54:09 2007 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Sat, 18 Aug 2007 01:54:09 -0000 Subject: [llvm-commits] [llvm] r41152 - /llvm/trunk/lib/Target/Mips/MipsISelLowering.h Message-ID: <200708180154.l7I1s9Tw001774@zion.cs.uiuc.edu> Author: bruno Date: Fri Aug 17 20:54:09 2007 New Revision: 41152 URL: http://llvm.org/viewvc/llvm-project?rev=41152&view=rev Log: LowerRETURNADDR removed since it was wrong and does not have utility yet! MipsAdd opcode added Modified: llvm/trunk/lib/Target/Mips/MipsISelLowering.h Modified: llvm/trunk/lib/Target/Mips/MipsISelLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsISelLowering.h?rev=41152&r1=41151&r2=41152&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsISelLowering.h (original) +++ llvm/trunk/lib/Target/Mips/MipsISelLowering.h Fri Aug 17 20:54:09 2007 @@ -38,7 +38,9 @@ Lo, // Return - Ret + Ret, + + Add }; } @@ -76,7 +78,6 @@ SDOperand LowerFORMAL_ARGUMENTS(SDOperand Op, SelectionDAG &DAG); SDOperand LowerGlobalAddress(SDOperand Op, SelectionDAG &DAG); SDOperand LowerGlobalTLSAddress(SDOperand Op, SelectionDAG &DAG); - SDOperand LowerRETURNADDR(SDOperand Op, SelectionDAG &DAG); }; } From bruno.cardoso at gmail.com Fri Aug 17 20:56:49 2007 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Sat, 18 Aug 2007 01:56:49 -0000 Subject: [llvm-commits] [llvm] r41153 - /llvm/trunk/lib/Target/Mips/MipsInstrInfo.cpp Message-ID: <200708180156.l7I1unp5002242@zion.cs.uiuc.edu> Author: bruno Date: Fri Aug 17 20:56:48 2007 New Revision: 41153 URL: http://llvm.org/viewvc/llvm-project?rev=41153&view=rev Log: Added Branch Analysis support Added InsertNoop support Modified: llvm/trunk/lib/Target/Mips/MipsInstrInfo.cpp Modified: llvm/trunk/lib/Target/Mips/MipsInstrInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsInstrInfo.cpp?rev=41153&r1=41152&r2=41153&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsInstrInfo.cpp (original) +++ llvm/trunk/lib/Target/Mips/MipsInstrInfo.cpp Fri Aug 17 20:56:48 2007 @@ -67,7 +67,6 @@ unsigned MipsInstrInfo:: isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const { - // TODO: add lhu, lbu ??? if (MI->getOpcode() == Mips::LW) { if ((MI->getOperand(2).isFrameIndex()) && // is a stack slot @@ -90,7 +89,6 @@ unsigned MipsInstrInfo:: isStoreToStackSlot(MachineInstr *MI, int &FrameIndex) const { - // TODO: add sb, sh ??? if (MI->getOpcode() == Mips::SW) { if ((MI->getOperand(0).isFrameIndex()) && // is a stack slot (MI->getOperand(1).isImmediate()) && // the imm is zero @@ -103,12 +101,243 @@ return 0; } +/// insertNoop - If data hazard condition is found insert the target nop +/// instruction. +void MipsInstrInfo:: +insertNoop(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const +{ + BuildMI(MBB, MI, get(Mips::NOP)); +} + +//===----------------------------------------------------------------------===// +// Branch Analysis +//===----------------------------------------------------------------------===// + +/// GetCondFromBranchOpc - Return the Mips CC that matches +/// the correspondent Branch instruction opcode. +static Mips::CondCode GetCondFromBranchOpc(unsigned BrOpc) +{ + switch (BrOpc) { + default: return Mips::COND_INVALID; + case Mips::BEQ : return Mips::COND_E; + case Mips::BNE : return Mips::COND_NE; + case Mips::BGTZ : return Mips::COND_GZ; + case Mips::BGEZ : return Mips::COND_GEZ; + case Mips::BLTZ : return Mips::COND_LZ; + case Mips::BLEZ : return Mips::COND_LEZ; + } +} + +/// GetCondBranchFromCond - Return the Branch instruction +/// opcode that matches the cc. +unsigned Mips::GetCondBranchFromCond(Mips::CondCode CC) +{ + switch (CC) { + default: assert(0 && "Illegal condition code!"); + case Mips::COND_E : return Mips::BEQ; + case Mips::COND_NE : return Mips::BNE; + case Mips::COND_GZ : return Mips::BGTZ; + case Mips::COND_GEZ : return Mips::BGEZ; + case Mips::COND_LZ : return Mips::BLTZ; + case Mips::COND_LEZ : return Mips::BLEZ; + } +} + +/// GetOppositeBranchCondition - Return the inverse of the specified +/// condition, e.g. turning COND_E to COND_NE. +Mips::CondCode Mips::GetOppositeBranchCondition(Mips::CondCode CC) +{ + switch (CC) { + default: assert(0 && "Illegal condition code!"); + case Mips::COND_E : return Mips::COND_NE; + case Mips::COND_NE : return Mips::COND_E; + case Mips::COND_GZ : return Mips::COND_LEZ; + case Mips::COND_GEZ : return Mips::COND_LZ; + case Mips::COND_LZ : return Mips::COND_GEZ; + case Mips::COND_LEZ : return Mips::COND_GZ; + } +} + +bool MipsInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB, + MachineBasicBlock *&TBB, + MachineBasicBlock *&FBB, + std::vector &Cond) const +{ + // If the block has no terminators, it just falls into the block after it. + MachineBasicBlock::iterator I = MBB.end(); + if (I == MBB.begin() || !isUnpredicatedTerminator(--I)) + return false; + + // Get the last instruction in the block. + MachineInstr *LastInst = I; + + // If there is only one terminator instruction, process it. + unsigned LastOpc = LastInst->getOpcode(); + if (I == MBB.begin() || !isUnpredicatedTerminator(--I)) { + if (!isBranch(LastInst->getOpcode())) + return true; + + // Unconditional branch + if (LastOpc == Mips::J) { + TBB = LastInst->getOperand(0).getMachineBasicBlock(); + return false; + } + + Mips::CondCode BranchCode = GetCondFromBranchOpc(LastInst->getOpcode()); + if (BranchCode == Mips::COND_INVALID) + return true; // Can't handle indirect branch. + + // Conditional branch + // Block ends with fall-through condbranch. + if (LastOpc != Mips::COND_INVALID) { + int LastNumOp = LastInst->getNumOperands(); + + TBB = LastInst->getOperand(LastNumOp-1).getMachineBasicBlock(); + Cond.push_back(MachineOperand::CreateImm(BranchCode)); + + for (int i=0; igetOperand(i)); + } + + return false; + } + } + + // Get the instruction before it if it is a terminator. + MachineInstr *SecondLastInst = I; + + // If there are three terminators, we don't know what sort of block this is. + if (SecondLastInst && I != MBB.begin() && isUnpredicatedTerminator(--I)) + return true; + + // If the block ends with Mips::J and a Mips::BNE/Mips::BEQ, handle it. + unsigned SecondLastOpc = SecondLastInst->getOpcode(); + Mips::CondCode BranchCode = GetCondFromBranchOpc(SecondLastOpc); + + if (SecondLastOpc != Mips::COND_INVALID && LastOpc == Mips::J) { + int SecondNumOp = SecondLastInst->getNumOperands(); + + TBB = SecondLastInst->getOperand(SecondNumOp-1).getMachineBasicBlock(); + Cond.push_back(MachineOperand::CreateImm(BranchCode)); + + for (int i=0; igetOperand(i)); + } + + FBB = LastInst->getOperand(0).getMachineBasicBlock(); + return false; + } + + // If the block ends with two unconditional branches, handle it. The last + // one is not executed, so remove it. + if ((SecondLastOpc == Mips::J) && (LastOpc == Mips::J)) { + TBB = SecondLastInst->getOperand(0).getMachineBasicBlock(); + I = LastInst; + I->eraseFromParent(); + return false; + } + + // Otherwise, can't handle this. + return true; +} + unsigned MipsInstrInfo:: InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, const std::vector &Cond) const { - // TODO: add Mips::J here. - assert(0 && "Cant handle any kind of branches!"); - return 1; + // Shouldn't be a fall through. + assert(TBB && "InsertBranch must not be told to insert a fallthrough"); + assert((Cond.size() == 3 || Cond.size() == 2 || Cond.size() == 0) && + "Mips branch conditions can have two|three components!"); + + if (FBB == 0) { // One way branch. + if (Cond.empty()) { + // Unconditional branch? + BuildMI(&MBB, get(Mips::J)).addMBB(TBB); + } else { + // Conditional branch. + unsigned Opc = GetCondBranchFromCond((Mips::CondCode)Cond[0].getImm()); + const TargetInstrDescriptor &TID = get(Opc); + + if (TID.numOperands == 3) + BuildMI(&MBB, TID).addReg(Cond[1].getReg()) + .addReg(Cond[2].getReg()) + .addMBB(TBB); + else + BuildMI(&MBB, TID).addReg(Cond[1].getReg()) + .addMBB(TBB); + + } + return 1; + } + + // Two-way Conditional branch. + unsigned Opc = GetCondBranchFromCond((Mips::CondCode)Cond[0].getImm()); + const TargetInstrDescriptor &TID = get(Opc); + + if (TID.numOperands == 3) + BuildMI(&MBB, TID).addReg(Cond[1].getReg()) + .addReg(Cond[2].getReg()) + .addMBB(TBB); + else + BuildMI(&MBB, TID).addReg(Cond[1].getReg()) + .addMBB(TBB); + + BuildMI(&MBB, get(Mips::J)).addMBB(FBB); + return 2; +} + +unsigned MipsInstrInfo:: +RemoveBranch(MachineBasicBlock &MBB) const +{ + MachineBasicBlock::iterator I = MBB.end(); + if (I == MBB.begin()) return 0; + --I; + if (I->getOpcode() != Mips::J && + GetCondFromBranchOpc(I->getOpcode()) == Mips::COND_INVALID) + return 0; + + // Remove the branch. + I->eraseFromParent(); + + I = MBB.end(); + + if (I == MBB.begin()) return 1; + --I; + if (GetCondFromBranchOpc(I->getOpcode()) == Mips::COND_INVALID) + return 1; + + // Remove the branch. + I->eraseFromParent(); + return 2; +} + +/// BlockHasNoFallThrough - Analyse if MachineBasicBlock does not +/// fall-through into its successor block. +bool MipsInstrInfo:: +BlockHasNoFallThrough(MachineBasicBlock &MBB) const +{ + if (MBB.empty()) return false; + + switch (MBB.back().getOpcode()) { + case Mips::RET: // Return. + case Mips::JR: // Indirect branch. + case Mips::J: // Uncond branch. + return true; + default: return false; + } } + +/// ReverseBranchCondition - Return the inverse opcode of the +/// specified Branch instruction. +bool MipsInstrInfo:: +ReverseBranchCondition(std::vector &Cond) const +{ + assert( (Cond.size() == 3 || Cond.size() == 2) && + "Invalid Mips branch condition!"); + Cond[0].setImm(GetOppositeBranchCondition((Mips::CondCode)Cond[0].getImm())); + return false; +} + + From bruno.cardoso at gmail.com Fri Aug 17 20:58:16 2007 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Sat, 18 Aug 2007 01:58:16 -0000 Subject: [llvm-commits] [llvm] r41154 - /llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp Message-ID: <200708180158.l7I1wGgW002287@zion.cs.uiuc.edu> Author: bruno Date: Fri Aug 17 20:58:15 2007 New Revision: 41154 URL: http://llvm.org/viewvc/llvm-project?rev=41154&view=rev Log: createMipsDelaySlotFillerPass added to mips codegen runtime Modified: llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp Modified: llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp?rev=41154&r1=41153&r2=41154&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp (original) +++ llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp Fri Aug 17 20:58:15 2007 @@ -64,11 +64,11 @@ // Implemented by targets that want to run passes immediately before // machine code is emitted. return true if -print-machineinstrs should // print out the code after the passes. -// TODO: Delay slot must be implemented here. bool MipsTargetMachine:: addPreEmitPass(FunctionPassManager &PM, bool Fast) { - return false; + PM.add(createMipsDelaySlotFillerPass(*this)); + return true; } // Implements the AssemblyEmitter for the target. Must return From bruno.cardoso at gmail.com Fri Aug 17 20:59:45 2007 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Sat, 18 Aug 2007 01:59:45 -0000 Subject: [llvm-commits] [llvm] r41155 - /llvm/trunk/lib/Target/Mips/MipsInstrInfo.h Message-ID: <200708180159.l7I1xjOu002332@zion.cs.uiuc.edu> Author: bruno Date: Fri Aug 17 20:59:45 2007 New Revision: 41155 URL: http://llvm.org/viewvc/llvm-project?rev=41155&view=rev Log: Branch Analysis and InsertNoop inserted into header files Modified: llvm/trunk/lib/Target/Mips/MipsInstrInfo.h Modified: llvm/trunk/lib/Target/Mips/MipsInstrInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsInstrInfo.h?rev=41155&r1=41154&r2=41155&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsInstrInfo.h (original) +++ llvm/trunk/lib/Target/Mips/MipsInstrInfo.h Fri Aug 17 20:59:45 2007 @@ -20,6 +20,29 @@ namespace llvm { +namespace Mips { + + // All CC branch operations on Mips I are turned + // into BEQ and BNE CC branches instructions. + enum CondCode { + COND_E, + COND_GZ, + COND_GEZ, + COND_LZ, + COND_LEZ, + COND_NE, + COND_INVALID + }; + + // Turn condition code into conditional branch opcode. + unsigned GetCondBranchFromCond(CondCode CC); + + /// GetOppositeBranchCondition - Return the inverse of the specified cond, + /// e.g. turning COND_E to COND_NE. + CondCode GetOppositeBranchCondition(Mips::CondCode CC); + +} + class MipsInstrInfo : public TargetInstrInfo { MipsTargetMachine &TM; @@ -52,10 +75,21 @@ /// not, return 0. This predicate must return 0 if the instruction has /// any side effects other than storing to the stack slot. virtual unsigned isStoreToStackSlot(MachineInstr *MI, int &FrameIndex) const; - + + /// Branch Analysis + virtual bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, + MachineBasicBlock *&FBB, + std::vector &Cond) const; + virtual unsigned RemoveBranch(MachineBasicBlock &MBB) const; virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, - MachineBasicBlock *FBB, + MachineBasicBlock *FBB, const std::vector &Cond) const; + virtual bool BlockHasNoFallThrough(MachineBasicBlock &MBB) const; + virtual bool ReverseBranchCondition(std::vector &Cond) const; + + /// Insert nop instruction when hazard condition is found + virtual void insertNoop(MachineBasicBlock &MBB, + MachineBasicBlock::iterator MI) const; }; } From bruno.cardoso at gmail.com Fri Aug 17 21:01:28 2007 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Sat, 18 Aug 2007 02:01:28 -0000 Subject: [llvm-commits] [llvm] r41156 - /llvm/trunk/lib/Target/Mips/MipsInstrFormats.td Message-ID: <200708180201.l7I21SAm002402@zion.cs.uiuc.edu> Author: bruno Date: Fri Aug 17 21:01:28 2007 New Revision: 41156 URL: http://llvm.org/viewvc/llvm-project?rev=41156&view=rev Log: Added InstrItinClass support for instruction formats Modified: llvm/trunk/lib/Target/Mips/MipsInstrFormats.td Modified: llvm/trunk/lib/Target/Mips/MipsInstrFormats.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsInstrFormats.td?rev=41156&r1=41155&r2=41156&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsInstrFormats.td (original) +++ llvm/trunk/lib/Target/Mips/MipsInstrFormats.td Fri Aug 17 21:01:28 2007 @@ -22,8 +22,8 @@ //===----------------------------------------------------------------------===// // Generic Mips Format -class MipsInst pattern>: - Instruction +class MipsInst pattern, + InstrItinClass itin>: Instruction { field bits<32> Inst; @@ -35,7 +35,8 @@ let Inst{31-26} = opcode; dag OutOperandList = outs; - dag InOperandList = ins; + dag InOperandList = ins; + let AsmString = asmstr; let Pattern = pattern; } @@ -46,8 +47,8 @@ //===----------------------------------------------------------------------===// class FR op, bits<6> _funct, dag outs, dag ins, string asmstr, - list pattern>: - MipsInst + list pattern, InstrItinClass itin>: + MipsInst { bits<5> rd; bits<5> rs; @@ -69,8 +70,8 @@ // Format I instruction class in Mips : <|opcode|rs|rt|immediate|> //===----------------------------------------------------------------------===// -class FI op, dag outs, dag ins, string asmstr, list pattern>: - MipsInst +class FI op, dag outs, dag ins, string asmstr, list pattern, + InstrItinClass itin>: MipsInst { bits<5> rt; bits<5> rs; @@ -87,8 +88,8 @@ // Format J instruction class in Mips : <|opcode|address|> //===----------------------------------------------------------------------===// -class FJ op, dag outs, dag ins, string asmstr, list pattern>: - MipsInst +class FJ op, dag outs, dag ins, string asmstr, list pattern, + InstrItinClass itin>: MipsInst { bits<26> addr; From bruno.cardoso at gmail.com Fri Aug 17 21:05:25 2007 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Sat, 18 Aug 2007 02:05:25 -0000 Subject: [llvm-commits] [llvm] r41157 - in /llvm/trunk/lib/Target/Mips: Mips.h MipsAsmPrinter.cpp Message-ID: <200708180205.l7I25PIL002578@zion.cs.uiuc.edu> Author: bruno Date: Fri Aug 17 21:05:24 2007 New Revision: 41157 URL: http://llvm.org/viewvc/llvm-project?rev=41157&view=rev Log: Couple of small changes. Delay Slot handle header declared. Newline added after macros at function init on generated asm! Modified: llvm/trunk/lib/Target/Mips/Mips.h llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp Modified: llvm/trunk/lib/Target/Mips/Mips.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/Mips.h?rev=41157&r1=41156&r2=41157&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/Mips.h (original) +++ llvm/trunk/lib/Target/Mips/Mips.h Fri Aug 17 21:05:24 2007 @@ -23,9 +23,10 @@ class FunctionPass; class MachineCodeEmitter; + FunctionPass *createMipsISelDag(MipsTargetMachine &TM); + FunctionPass *createMipsDelaySlotFillerPass(MipsTargetMachine &TM); FunctionPass *createMipsCodePrinterPass(std::ostream &OS, MipsTargetMachine &TM); - FunctionPass *createMipsISelDag(MipsTargetMachine &TM); } // end namespace llvm; // Defines symbolic names for Mips registers. This defines a mapping from Modified: llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp?rev=41157&r1=41156&r2=41157&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp Fri Aug 17 21:05:24 2007 @@ -209,9 +209,9 @@ emitFrameDirective(MF); emitMaskDirective(MF); emitFMaskDirective(); - emitSetDirective(NOREORDER); emitSetDirective(NOMACRO); + O << "\n"; } /// Emit the directives used by GAS on the end of functions From bruno.cardoso at gmail.com Fri Aug 17 21:16:30 2007 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Sat, 18 Aug 2007 02:16:30 -0000 Subject: [llvm-commits] [llvm] r41158 - in /llvm/trunk/lib/Target/Mips: MipsISelDAGToDAG.cpp MipsISelLowering.cpp Message-ID: <200708180216.l7I2GUUa003359@zion.cs.uiuc.edu> Author: bruno Date: Fri Aug 17 21:16:30 2007 New Revision: 41158 URL: http://llvm.org/viewvc/llvm-project?rev=41158&view=rev Log: Removed LowerRETURADDR, fixed small bug into LowerRET, LowerGlobalAddress fixed to generate instructions (add, lui) glued! Modified: llvm/trunk/lib/Target/Mips/MipsISelDAGToDAG.cpp llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp Modified: llvm/trunk/lib/Target/Mips/MipsISelDAGToDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsISelDAGToDAG.cpp?rev=41158&r1=41157&r2=41158&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsISelDAGToDAG.cpp (original) +++ llvm/trunk/lib/Target/Mips/MipsISelDAGToDAG.cpp Fri Aug 17 21:16:30 2007 @@ -142,7 +142,7 @@ Addr.getOpcode() == ISD::TargetGlobalAddress)) return false; - // Operand is an result from an ADD. + // Operand is a result from an ADD. if (Addr.getOpcode() == ISD::ADD) { if (ConstantSDNode *CN = dyn_cast(Addr.getOperand(1))) Modified: llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp?rev=41158&r1=41157&r2=41158&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp (original) +++ llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp Fri Aug 17 21:16:30 2007 @@ -42,6 +42,7 @@ case MipsISD::Hi : return "MipsISD::Hi"; case MipsISD::Lo : return "MipsISD::Lo"; case MipsISD::Ret : return "MipsISD::Ret"; + case MipsISD::Add : return "MipsISD::Add"; default : return NULL; } } @@ -119,7 +120,6 @@ case ISD::RET: return LowerRET(Op, DAG); case ISD::GlobalAddress: return LowerGlobalAddress(Op, DAG); case ISD::GlobalTLSAddress: return LowerGlobalTLSAddress(Op, DAG); - case ISD::RETURNADDR: return LowerRETURNADDR(Op, DAG); } return SDOperand(); } @@ -140,17 +140,6 @@ return VReg; } -// Set up a frame object for the return address. -//SDOperand MipsTargetLowering::getReturnAddressFrameIndex(SelectionDAG &DAG) { -// if (ReturnAddrIndex == 0) { -// MachineFunction &MF = DAG.getMachineFunction(); -// ReturnAddrIndex = MF.getFrameInfo()->CreateFixedObject(4, 0); -// } -// -// return DAG.getFrameIndex(ReturnAddrIndex, getPointerTy()); -//} - - //===----------------------------------------------------------------------===// // Misc Lower Operation implementation //===----------------------------------------------------------------------===// @@ -160,10 +149,15 @@ GlobalValue *GV = cast(Op)->getGlobal(); SDOperand GA = DAG.getTargetGlobalAddress(GV, MVT::i32); - SDOperand Hi = DAG.getNode(MipsISD::Hi, MVT::i32, GA); + + const MVT::ValueType *VTs = DAG.getNodeValueTypes(MVT::i32, MVT::Flag); + SDOperand Ops[] = { GA }; + + SDOperand Hi = DAG.getNode(MipsISD::Hi, VTs, 2, Ops, 1); SDOperand Lo = DAG.getNode(MipsISD::Lo, MVT::i32, GA); - return DAG.getNode(ISD::ADD, MVT::i32, Lo, Hi); + SDOperand InFlag = Hi.getValue(1); + return DAG.getNode(MipsISD::Add, MVT::i32, Lo, Hi, InFlag); } SDOperand MipsTargetLowering:: @@ -370,8 +364,8 @@ SmallVector ResultVals; // Returns void - if (!RVLocs.size()) - return Chain.Val; + //if (!RVLocs.size()) + // return Chain.Val; // Copy all of the result registers out of their specified physreg. for (unsigned i = 0; i != RVLocs.size(); ++i) { From bruno.cardoso at gmail.com Fri Aug 17 21:18:07 2007 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Sat, 18 Aug 2007 02:18:07 -0000 Subject: [llvm-commits] [llvm] r41159 - in /llvm/trunk/lib/Target/Mips: Mips.td MipsSubtarget.cpp Message-ID: <200708180218.l7I2I78E003426@zion.cs.uiuc.edu> Author: bruno Date: Fri Aug 17 21:18:07 2007 New Revision: 41159 URL: http://llvm.org/viewvc/llvm-project?rev=41159&view=rev Log: support for Schedule included on Mips.td Modified: llvm/trunk/lib/Target/Mips/Mips.td llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp Modified: llvm/trunk/lib/Target/Mips/Mips.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/Mips.td?rev=41159&r1=41158&r2=41159&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/Mips.td (original) +++ llvm/trunk/lib/Target/Mips/Mips.td Fri Aug 17 21:18:07 2007 @@ -6,58 +6,44 @@ // University of Illinois Open Source License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// +// This is the top level entry point for the Mips target. +//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===// -// Target-independent interfaces which we are implementing +// Target-independent interfaces //===----------------------------------------------------------------------===// include "../Target.td" //===----------------------------------------------------------------------===// -// Register File Description +// Descriptions //===----------------------------------------------------------------------===// include "MipsRegisterInfo.td" - -//===----------------------------------------------------------------------===// -// Subtarget features -//===----------------------------------------------------------------------===// - -// TODO: dummy, needed to compile -def FeatureCIX : SubtargetFeature<"r3000", "isR3000", "true", - "Enable r3000 extentions">; - -//===----------------------------------------------------------------------===// -// Instruction Description -//===----------------------------------------------------------------------===// - +include "MipsSchedule.td" include "MipsInstrInfo.td" +include "MipsCallingConv.td" def MipsInstrInfo : InstrInfo { - // Define how we want to layout our target-specific information field. let TSFlagsFields = []; let TSFlagsShifts = []; } + //===----------------------------------------------------------------------===// -// Calling Conventions +// CPU Directives // //===----------------------------------------------------------------------===// -include "MipsCallingConv.td" +def FeatureMipsIII : SubtargetFeature<"mips3", "IsMipsIII", "true", + "MipsIII ISA Support">; //===----------------------------------------------------------------------===// // Mips processors supported. //===----------------------------------------------------------------------===// -class Proc Features> - : Processor; - -def : Proc<"generic", []>; - -//===----------------------------------------------------------------------===// -// Declare the target which we are implementing -//===----------------------------------------------------------------------===// +def : Processor<"generic", MipsGenericItineraries, []>; +//def : Processor<"r4000", MipsR4000Itineraries, [FeatureMipsIII]>; def Mips : Target { - // Pull in Instruction Info: let InstructionSet = MipsInstrInfo; } + Modified: llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp?rev=41159&r1=41158&r2=41159&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp (original) +++ llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp Fri Aug 17 21:18:07 2007 @@ -17,7 +17,8 @@ using namespace llvm; MipsSubtarget::MipsSubtarget(const TargetMachine &TM, const Module &M, - const std::string &FS) : isR3000(false) + const std::string &FS) : + IsMipsIII(false) { std::string CPU = "generic"; From bruno.cardoso at gmail.com Fri Aug 17 21:19:09 2007 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Sat, 18 Aug 2007 02:19:09 -0000 Subject: [llvm-commits] [llvm] r41160 - /llvm/trunk/lib/Target/Mips/MipsRegisterInfo.cpp Message-ID: <200708180219.l7I2J9CO003544@zion.cs.uiuc.edu> Author: bruno Date: Fri Aug 17 21:19:09 2007 New Revision: 41160 URL: http://llvm.org/viewvc/llvm-project?rev=41160&view=rev Log: Fixed stack frame addressing bug Modified: llvm/trunk/lib/Target/Mips/MipsRegisterInfo.cpp Modified: llvm/trunk/lib/Target/Mips/MipsRegisterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsRegisterInfo.cpp?rev=41160&r1=41159&r2=41160&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsRegisterInfo.cpp (original) +++ llvm/trunk/lib/Target/Mips/MipsRegisterInfo.cpp Fri Aug 17 21:19:09 2007 @@ -271,15 +271,15 @@ MipsFunctionInfo *MipsFI = MF.getInfo(); MachineBasicBlock::iterator MBBI = MBB.begin(); - // Get the number of bytes to allocate from the FrameInfo + // Get the number of bytes to allocate from the FrameInfo. int NumBytes = (int) MFI->getStackSize(); #ifndef NDEBUG - DOUT << "\n<--- EMIT PROLOGUE --->"; + DOUT << "\n<--- EMIT PROLOGUE --->\n"; DOUT << "Stack size :" << NumBytes << "\n"; #endif - // Do we need to allocate space on the stack? + // Don't need to allocate space on the stack. if (NumBytes == 0) return; int FPOffset, RAOffset; @@ -289,13 +289,13 @@ // using FP, the last stack slot becomes empty // and RA is saved before it. if ((hasFP(MF)) && (MFI->hasCalls())) { - FPOffset = NumBytes; - RAOffset = (NumBytes+4); + FPOffset = NumBytes+4; + RAOffset = (NumBytes+8); } else if ((!hasFP(MF)) && (MFI->hasCalls())) { FPOffset = 0; - RAOffset = NumBytes; + RAOffset = NumBytes+4; } else if ((hasFP(MF)) && (!MFI->hasCalls())) { - FPOffset = NumBytes; + FPOffset = NumBytes+4; RAOffset = 0; } @@ -310,7 +310,7 @@ #endif // Align stack. - NumBytes += 8; + NumBytes += 12; unsigned Align = MF.getTarget().getFrameInfo()->getStackAlignment(); NumBytes = ((NumBytes+Align-1)/Align*Align); From bruno.cardoso at gmail.com Fri Aug 17 21:37:46 2007 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Sat, 18 Aug 2007 02:37:46 -0000 Subject: [llvm-commits] [llvm] r41161 - /llvm/trunk/lib/Target/Mips/MipsInstrInfo.td Message-ID: <200708180237.l7I2bkfO004630@zion.cs.uiuc.edu> Author: bruno Date: Fri Aug 17 21:37:46 2007 New Revision: 41161 URL: http://llvm.org/viewvc/llvm-project?rev=41161&view=rev Log: MipsHi now has ouput flag MipsAdd SDNode created to add support to an Add opcode which supports input flag Added an instruction itinerary to all instruction classes Added branches with zero cond codes Now call clobbers all non-callee saved registers Call w/ register support added Added DelaySlot to branch and load instructions Added patterns to handle all setcc, brcond/setcc and MipsAdd instructions Modified: llvm/trunk/lib/Target/Mips/MipsInstrInfo.td Modified: llvm/trunk/lib/Target/Mips/MipsInstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsInstrInfo.td?rev=41161&r1=41160&r2=41161&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsInstrInfo.td (original) +++ llvm/trunk/lib/Target/Mips/MipsInstrInfo.td Fri Aug 17 21:37:46 2007 @@ -26,9 +26,14 @@ // handling 32-bit immediates. They are used on MipsISelLowering to // lower stuff like GlobalAddress, ExternalSymbol, ... // This two nodes have nothing to do with Mips Registers Hi and Lo. -def MipsHi : SDNode<"MipsISD::Hi", SDTIntUnaryOp>; +def MipsHi : SDNode<"MipsISD::Hi", SDTIntUnaryOp, [SDNPOutFlag]>; def MipsLo : SDNode<"MipsISD::Lo", SDTIntUnaryOp>; +// Necessary to generate glued instructions when loading GlobalAddress +// into registers. +def MipsAdd : SDNode<"MipsISD::Add", SDTIntBinOp, [SDNPCommutative, + SDNPAssociative, SDNPOptInFlag]>; + // Return def SDT_MipsRet : SDTypeProfile<0, 1, [SDTCisInt<0>]>; def MipsRet : SDNode<"MipsISD::Ret", SDT_MipsRet, [SDNPHasChain, @@ -88,6 +93,11 @@ return (uint64_t)N->getValue() == (unsigned short)N->getValue(); }], LO16>; +// Node immediate fits as 32-bit zero extended on target immediate. +//def immZExt32 : PatLeaf<(imm), [{ +// return (uint64_t)N->getValue() == (uint32_t)N->getValue(); +//}], LO16>; + // shamt field must fit in 5 bits. def immZExt5 : PatLeaf<(imm), [{ return N->getValue() == ((N->getValue()) & 0x1f) ; @@ -103,22 +113,23 @@ // Arithmetic 3 register operands let isCommutable = 1 in -class ArithR< bits<6> op, bits<6> func, string instr_asm, SDNode OpNode>: +class ArithR op, bits<6> func, string instr_asm, SDNode OpNode, + InstrItinClass itin>: FR< op, func, (outs CPURegs:$dst), (ins CPURegs:$b, CPURegs:$c), !strconcat(instr_asm, " $dst, $b, $c"), - [(set CPURegs:$dst, (OpNode CPURegs:$b, CPURegs:$c))] >; + [(set CPURegs:$dst, (OpNode CPURegs:$b, CPURegs:$c))], itin>; let isCommutable = 1 in -class ArithOverflowR< bits<6> op, bits<6> func, string instr_asm>: +class ArithOverflowR op, bits<6> func, string instr_asm>: FR< op, func, (outs CPURegs:$dst), (ins CPURegs:$b, CPURegs:$c), !strconcat(instr_asm, " $dst, $b, $c"), - []>; + [], IIAlu>; // Arithmetic 2 register operands let isCommutable = 1 in @@ -128,7 +139,7 @@ (outs CPURegs:$dst), (ins CPURegs:$b, Od:$c), !strconcat(instr_asm, " $dst, $b, $c"), - [(set CPURegs:$dst, (OpNode CPURegs:$b, imm_type:$c))] >; + [(set CPURegs:$dst, (OpNode CPURegs:$b, imm_type:$c))], IIAlu>; // Arithmetic Multiply ADD/SUB let rd=0 in @@ -138,7 +149,7 @@ (outs CPURegs:$rs), (ins CPURegs:$rt), !strconcat(instr_asm, " $rs, $rt"), - []>; + [], IIImul>; // Logical class LogicR func, string instr_asm, SDNode OpNode>: @@ -147,14 +158,14 @@ (outs CPURegs:$dst), (ins CPURegs:$b, CPURegs:$c), !strconcat(instr_asm, " $dst, $b, $c"), - [(set CPURegs:$dst, (OpNode CPURegs:$b, CPURegs:$c))] >; + [(set CPURegs:$dst, (OpNode CPURegs:$b, CPURegs:$c))], IIAlu>; class LogicI op, string instr_asm, SDNode OpNode>: FI< op, (outs CPURegs:$dst), (ins CPURegs:$b, uimm16:$c), !strconcat(instr_asm, " $dst, $b, $c"), - [(set CPURegs:$dst, (OpNode CPURegs:$b, immSExt16:$c))]>; + [(set CPURegs:$dst, (OpNode CPURegs:$b, immSExt16:$c))], IIAlu>; class LogicNOR op, bits<6> func, string instr_asm>: FR< op, @@ -162,7 +173,7 @@ (outs CPURegs:$dst), (ins CPURegs:$b, CPURegs:$c), !strconcat(instr_asm, " $dst, $b, $c"), - [(set CPURegs:$dst, (not (or CPURegs:$b, CPURegs:$c)))] >; + [(set CPURegs:$dst, (not (or CPURegs:$b, CPURegs:$c)))], IIAlu>; // Shifts let rt = 0 in @@ -172,7 +183,7 @@ (outs CPURegs:$dst), (ins CPURegs:$b, shamt:$c), !strconcat(instr_asm, " $dst, $b, $c"), - [(set CPURegs:$dst, (OpNode CPURegs:$b, immZExt5:$c))] >; + [(set CPURegs:$dst, (OpNode CPURegs:$b, immZExt5:$c))], IIAlu>; class LogicR_shift_reg func, string instr_asm, SDNode OpNode>: FR< 0x00, @@ -180,7 +191,7 @@ (outs CPURegs:$dst), (ins CPURegs:$b, CPURegs:$c), !strconcat(instr_asm, " $dst, $b, $c"), - [(set CPURegs:$dst, (OpNode CPURegs:$b, CPURegs:$c))] >; + [(set CPURegs:$dst, (OpNode CPURegs:$b, CPURegs:$c))], IIAlu>; // Load Upper Imediate class LoadUpper op, string instr_asm>: @@ -188,16 +199,16 @@ (outs CPURegs:$dst), (ins uimm16:$imm), !strconcat(instr_asm, " $dst, $imm"), - []>; + [], IIAlu>; // Memory Load/Store -let isLoad = 1 in +let isLoad = 1, hasDelaySlot = 1 in class LoadM op, string instr_asm, PatFrag OpNode>: FI< op, (outs CPURegs:$dst), (ins mem:$addr), !strconcat(instr_asm, " $dst, $addr"), - [(set CPURegs:$dst, (OpNode addr:$addr))]>; + [(set CPURegs:$dst, (OpNode addr:$addr))], IILoad>; let isStore = 1 in class StoreM op, string instr_asm, PatFrag OpNode>: @@ -205,17 +216,29 @@ (outs), (ins CPURegs:$dst, mem:$addr), !strconcat(instr_asm, " $dst, $addr"), - [(OpNode CPURegs:$dst, addr:$addr)]>; + [(OpNode CPURegs:$dst, addr:$addr)], IIStore>; // Conditional Branch -let isBranch = 1, isTerminator=1 in +let isBranch = 1, isTerminator=1, hasDelaySlot = 1 in { class CBranch op, string instr_asm, PatFrag cond_op>: FI< op, (outs), (ins CPURegs:$a, CPURegs:$b, brtarget:$offset), !strconcat(instr_asm, " $a, $b, $offset"), - [(brcond (cond_op CPURegs:$a, CPURegs:$b), bb:$offset)]>; + [(brcond (cond_op CPURegs:$a, CPURegs:$b), bb:$offset)], + IIBranch>; + + +class CBranchZero op, string instr_asm, PatFrag cond_op>: + FI< op, + (outs), + (ins CPURegs:$src, brtarget:$offset), + !strconcat(instr_asm, " $src, $offset"), + [(brcond (cond_op CPURegs:$src, 0), bb:$offset)], + IIBranch>; +} +// SetCC class SetCC_R op, bits<6> func, string instr_asm, PatFrag cond_op>: FR< op, @@ -223,7 +246,8 @@ (outs CPURegs:$dst), (ins CPURegs:$b, CPURegs:$c), !strconcat(instr_asm, " $dst, $b, $c"), - [(set CPURegs:$dst, (cond_op CPURegs:$b, CPURegs:$c))]>; + [(set CPURegs:$dst, (cond_op CPURegs:$b, CPURegs:$c))], + IIAlu>; class SetCC_I op, string instr_asm, PatFrag cond_op, Operand Od, PatLeaf imm_type>: @@ -231,52 +255,64 @@ (outs CPURegs:$dst), (ins CPURegs:$b, Od:$c), !strconcat(instr_asm, " $dst, $b, $c"), - [(set CPURegs:$dst, (cond_op CPURegs:$b, imm_type:$c))]>; + [(set CPURegs:$dst, (cond_op CPURegs:$b, imm_type:$c))], + IIAlu>; // Unconditional branch -let hasCtrlDep=1, isTerminator=1 in +let isBranch=1, isTerminator=1, isBarrier=1, hasDelaySlot = 1 in class JumpFJ op, string instr_asm>: FJ< op, (outs), (ins brtarget:$target), !strconcat(instr_asm, " $target"), - [(br bb:$target)]>; + [(br bb:$target)], IIBranch>; -let hasCtrlDep=1, isTerminator=1, rd=0 in +let isBranch=1, isTerminator=1, isBarrier=1, rd=0, hasDelaySlot = 1 in class JumpFR op, bits<6> func, string instr_asm>: FR< op, func, (outs), (ins CPURegs:$target), !strconcat(instr_asm, " $target"), - []>; + [], IIBranch>; // Jump and Link (Call) -let isCall=1 in -class JumpLink op, string instr_asm>: - FJ< op, - (outs), - (ins calltarget:$target), - !strconcat(instr_asm, " $target"), - [(MipsJmpLink imm:$target)]>; - -let isCall=1 in -class JumpLinkReg op, bits<6> func, string instr_asm>: - FR< op, - func, - (outs), - (ins CPURegs:$rd, CPURegs:$rs), - !strconcat(instr_asm, " $rs, $rd"), - []>; +let isCall=1, hasDelaySlot=1, + // All calls clobber the non-callee saved registers... + Defs = [AT, V0, V1, A0, A1, A2, A3, T0, T1, T2, + T3, T4, T5, T6, T7, T8, T9, K0, K1, GP] in { + class JumpLink op, string instr_asm>: + FJ< op, + (outs), + (ins calltarget:$target), + !strconcat(instr_asm, " $target"), + [(MipsJmpLink imm:$target)], IIBranch>; + + let rd=31 in + class JumpLinkReg op, bits<6> func, string instr_asm>: + FR< op, + func, + (outs), + (ins CPURegs:$rs), + !strconcat(instr_asm, " $rs"), + [(MipsJmpLink CPURegs:$rs)], IIBranch>; + + class BranchLink: + FI< 0x1, + (outs), + (ins CPURegs:$rs, brtarget:$target), + !strconcat(instr_asm, " $rs, $target"), + [], IIBranch>; +} // Mul, Div -class MulDiv func, string instr_asm>: +class MulDiv func, string instr_asm, InstrItinClass itin>: FR< 0x00, func, (outs), (ins CPURegs:$a, CPURegs:$b), !strconcat(instr_asm, " $a, $b"), - []>; + [], itin>; // Move from Hi/Lo class MoveFromTo func, string instr_asm>: @@ -285,7 +321,7 @@ (outs CPURegs:$dst), (ins), !strconcat(instr_asm, " $dst"), - []>; + [], IIHiLo>; // Count Leading Ones/Zeros in Word class CountLeading func, string instr_asm>: @@ -294,15 +330,15 @@ (outs CPURegs:$dst), (ins CPURegs:$src), !strconcat(instr_asm, " $dst, $src"), - []>; + [], IIAlu>; //===----------------------------------------------------------------------===// // Pseudo instructions //===----------------------------------------------------------------------===// -class Pseudo pattern>: - MipsInst; +class Pseudo pattern>: + MipsInst; // As stack alignment is always done with addiu, we need a 16-bit immediate def ADJCALLSTACKDOWN : Pseudo<(outs), (ins uimm16:$amt), @@ -321,15 +357,18 @@ //===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===// -// Mips32 I +// MipsI Instructions //===----------------------------------------------------------------------===// // Arithmetic -def ADDiu : ArithI<0x09, "addiu", add, uimm16, immSExt16>; -def ADDi : ArithI<0x08, "addi", add, simm16, immZExt16>; -def MUL : ArithR<0x1c, 0x02, "mul", mul>; -def ADDu : ArithR<0x00, 0x21, "addu", add>; -def SUBu : ArithR<0x00, 0x23, "subu", sub>; + +// ADDiu just accept 16-bit immediates but we handle this on Pat's. +// immZExt32 is used here so it can match GlobalAddress immediates. +def ADDiu : ArithI<0x09, "addiu", MipsAdd, uimm16, immZExt16>; +def ADDi : ArithI<0x08, "addi", add, simm16, immSExt16>; +def MUL : ArithR<0x1c, 0x02, "mul", mul, IIImul>; +def ADDu : ArithR<0x00, 0x21, "addu", add, IIAlu>; +def SUBu : ArithR<0x00, 0x23, "subu", sub, IIAlu>; def ADD : ArithOverflowR<0x00, 0x20, "add">; def SUB : ArithOverflowR<0x00, 0x22, "sub">; def MADD : MArithR<0x00, "madd">; @@ -370,6 +409,17 @@ // Conditional Branch def BEQ : CBranch<0x04, "beq", seteq>; def BNE : CBranch<0x05, "bne", setne>; + +let rt=1 in +def BGEZ : CBranchZero<0x01, "bgez", setge>; + +let rt=0 in { +def BGTZ : CBranchZero<0x07, "bgtz", setgt>; +def BLEZ : CBranchZero<0x07, "blez", setle>; +def BLTZ : CBranchZero<0x01, "bltz", setlt>; +} + +// Set Condition Code def SLT : SetCC_R<0x00, 0x2a, "slt", setlt>; def SLTu : SetCC_R<0x00, 0x2b, "sltu", setult>; def SLTi : SetCC_I<0x0a, "slti", setlt, simm16, immSExt16>; @@ -382,14 +432,16 @@ // Jump and Link (Call) def JAL : JumpLink<0x03, "jal">; def JALR : JumpLinkReg<0x00, 0x09, "jalr">; +def BGEZAL : BranchLink<"bgezal">; +def BLTZAL : BranchLink<"bltzal">; // MulDiv and Move From Hi/Lo operations, have // their correpondent SDNodes created on ISelDAG. // Special Mul, Div operations -def MULT : MulDiv<0x18, "mult">; -def MULTu : MulDiv<0x19, "multu">; -def DIV : MulDiv<0x1a, "div">; -def DIVu : MulDiv<0x1b, "divu">; +def MULT : MulDiv<0x18, "mult", IIImul>; +def MULTu : MulDiv<0x19, "multu", IIImul>; +def DIV : MulDiv<0x1a, "div", IIIdiv>; +def DIVu : MulDiv<0x1b, "divu", IIIdiv>; // Move From Hi/Lo def MFHI : MoveFromTo<0x10, "mfhi">; @@ -403,7 +455,7 @@ // No operation let addr=0 in -def NOOP : FJ<0, (outs), (ins), "nop", []>; +def NOP : FJ<0, (outs), (ins), "nop", [], IIAlu>; // Ret instruction - as mips does not have "ret" a // jr $ra must be generated. @@ -411,7 +463,7 @@ isBarrier=1, hasCtrlDep=1, rs=0, rt=0, shamt=0 in { def RET : FR <0x00, 0x02, (outs), (ins CPURegs:$target), - "jr $target", [(MipsRet CPURegs:$target)]>; + "jr $target", [(MipsRet CPURegs:$target)], IIBranch>; } //===----------------------------------------------------------------------===// @@ -433,59 +485,101 @@ (JAL tglobaladdr:$dst)>; def : Pat<(MipsJmpLink (i32 texternalsym:$dst)), (JAL texternalsym:$dst)>; +def : Pat<(MipsJmpLink CPURegs:$dst), + (JALR CPURegs:$dst)>; // GlobalAddress, Constant Pool, ExternalSymbol, and JumpTable def : Pat<(MipsHi tglobaladdr:$in), (LUi tglobaladdr:$in)>; def : Pat<(MipsLo tglobaladdr:$in), (ADDiu ZERO, tglobaladdr:$in)>; - -// When extracting the address from GlobalAddress we -// need something of the form "addiu $reg, %lo(addr)" -def : Pat<(add CPURegs:$a, (MipsLo tglobaladdr:$in)), - (ADDiu CPURegs:$a, tglobaladdr:$in)>; +def : Pat<(MipsAdd CPURegs:$hi, (MipsLo tglobaladdr:$lo)), + (ADDiu CPURegs:$hi, tglobaladdr:$lo)>; // Mips does not have not, so we increase the operation def : Pat<(not CPURegs:$in), - (NOR CPURegs:$in, CPURegs:$in)>; + (NOR CPURegs:$in, ZERO)>; // extended load and stores +def : Pat<(i32 (extloadi1 addr:$src)), (LBu addr:$src)>; def : Pat<(i32 (extloadi8 addr:$src)), (LBu addr:$src)>; def : Pat<(i32 (extloadi16 addr:$src)), (LHu addr:$src)>; def : Pat<(truncstorei1 CPURegs:$src, addr:$addr), - (SB CPURegs:$src, addr:$src)>; + (SB CPURegs:$src, addr:$addr)>; -def : Pat<(brcond (setne CPURegs:$lhs, (add ZERO, 0)), bb:$dst), +/// +/// brcond patterns +/// + +// direct match equal/notequal zero branches +def : Pat<(brcond (setne CPURegs:$lhs, 0), bb:$dst), (BNE CPURegs:$lhs, ZERO, bb:$dst)>; +def : Pat<(brcond (seteq CPURegs:$lhs, 0), bb:$dst), + (BEQ CPURegs:$lhs, ZERO, bb:$dst)>; +def : Pat<(brcond (setge CPURegs:$lhs, CPURegs:$rhs), bb:$dst), + (BGEZ (SUB CPURegs:$lhs, CPURegs:$rhs), bb:$dst)>; +def : Pat<(brcond (setuge CPURegs:$lhs, CPURegs:$rhs), bb:$dst), + (BGEZ (SUBu CPURegs:$lhs, CPURegs:$rhs), bb:$dst)>; -// Conditional branch patterns. -// cond branches patterns, 2 register operands signed. -def : Pat<(brcond (setlt CPURegs:$lhs, CPURegs:$rhs), bb:$dst), - (BNE (SLT CPURegs:$lhs, CPURegs:$rhs), ZERO, bb:$dst)>; -def : Pat<(brcond (setle CPURegs:$lhs, CPURegs:$rhs), bb:$dst), - (BEQ (SLT CPURegs:$rhs, CPURegs:$lhs), ZERO, bb:$dst)>; def : Pat<(brcond (setgt CPURegs:$lhs, CPURegs:$rhs), bb:$dst), - (BNE (SLT CPURegs:$rhs, CPURegs:$lhs), ZERO, bb:$dst)>; -def : Pat<(brcond (setge CPURegs:$lhs, CPURegs:$rhs), bb:$dst), - (BEQ (SLT CPURegs:$lhs, CPURegs:$rhs), ZERO, bb:$dst)>; + (BGTZ (SUB CPURegs:$lhs, CPURegs:$rhs), bb:$dst)>; +def : Pat<(brcond (setugt CPURegs:$lhs, CPURegs:$rhs), bb:$dst), + (BGTZ (SUBu CPURegs:$lhs, CPURegs:$rhs), bb:$dst)>; -// cond branches patterns, 2 register operands unsigned. -def : Pat<(brcond (setult CPURegs:$lhs, CPURegs:$rhs), bb:$dst), - (BNE (SLTu CPURegs:$lhs, CPURegs:$rhs), ZERO, bb:$dst)>; +def : Pat<(brcond (setle CPURegs:$lhs, CPURegs:$rhs), bb:$dst), + (BLEZ (SUB CPURegs:$lhs, CPURegs:$rhs), bb:$dst)>; def : Pat<(brcond (setule CPURegs:$lhs, CPURegs:$rhs), bb:$dst), - (BEQ (SLTu CPURegs:$rhs, CPURegs:$lhs), ZERO, bb:$dst)>; -def : Pat<(brcond (setugt CPURegs:$lhs, CPURegs:$rhs), bb:$dst), - (BNE (SLTu CPURegs:$rhs, CPURegs:$lhs), ZERO, bb:$dst)>; -def : Pat<(brcond (setuge CPURegs:$lhs, CPURegs:$rhs), bb:$dst), - (BEQ (SLTu CPURegs:$lhs, CPURegs:$rhs), ZERO, bb:$dst)>; + (BLEZ (SUBu CPURegs:$lhs, CPURegs:$rhs), bb:$dst)>; -// cond branches patterns, reg/imm operands signed. -def : Pat<(brcond (setult CPURegs:$lhs, immSExt16:$rhs), bb:$dst), +def : Pat<(brcond (setlt CPURegs:$lhs, immSExt16:$rhs), bb:$dst), (BNE (SLTi CPURegs:$lhs, immSExt16:$rhs), ZERO, bb:$dst)>; -def : Pat<(brcond (setuge CPURegs:$lhs, immSExt16:$rhs), bb:$dst), - (BEQ (SLTi CPURegs:$lhs, immSExt16:$rhs), ZERO, bb:$dst)>; - -// cond branches patterns, reg/imm operands unsigned. def : Pat<(brcond (setult CPURegs:$lhs, immZExt16:$rhs), bb:$dst), (BNE (SLTiu CPURegs:$lhs, immZExt16:$rhs), ZERO, bb:$dst)>; -def : Pat<(brcond (setuge CPURegs:$lhs, immZExt16:$rhs), bb:$dst), - (BEQ (SLTiu CPURegs:$lhs, immZExt16:$rhs), ZERO, bb:$dst)>; +def : Pat<(brcond (setlt CPURegs:$lhs, CPURegs:$rhs), bb:$dst), + (BNE (SLT CPURegs:$lhs, CPURegs:$rhs), ZERO, bb:$dst)>; +def : Pat<(brcond (setult CPURegs:$lhs, CPURegs:$rhs), bb:$dst), + (BNE (SLTu CPURegs:$lhs, CPURegs:$rhs), ZERO, bb:$dst)>; + +def : Pat<(brcond (setlt CPURegs:$lhs, CPURegs:$rhs), bb:$dst), + (BLTZ (SUB CPURegs:$lhs, CPURegs:$rhs), bb:$dst)>; +def : Pat<(brcond (setult CPURegs:$lhs, CPURegs:$rhs), bb:$dst), + (BLTZ (SUBu CPURegs:$lhs, CPURegs:$rhs), bb:$dst)>; + +// generic brcond pattern +def : Pat<(brcond CPURegs:$cond, bb:$dst), + (BNE CPURegs:$cond, ZERO, bb:$dst)>; + +/// +/// setcc patterns, only matched when there +/// is no brcond following a setcc operation +/// + +// setcc 2 register operands +def : Pat<(setle CPURegs:$lhs, CPURegs:$rhs), + (XORi (SLT CPURegs:$rhs, CPURegs:$lhs), 1)>; +def : Pat<(setule CPURegs:$lhs, CPURegs:$rhs), + (XORi (SLTu CPURegs:$rhs, CPURegs:$lhs), 1)>; + +def : Pat<(setgt CPURegs:$lhs, CPURegs:$rhs), + (SLT CPURegs:$rhs, CPURegs:$lhs)>; +def : Pat<(setugt CPURegs:$lhs, CPURegs:$rhs), + (SLTu CPURegs:$rhs, CPURegs:$lhs)>; + +def : Pat<(setge CPURegs:$lhs, CPURegs:$rhs), + (XORi (SLT CPURegs:$lhs, CPURegs:$rhs), 1)>; +def : Pat<(setuge CPURegs:$lhs, CPURegs:$rhs), + (XORi (SLTu CPURegs:$lhs, CPURegs:$rhs), 1)>; + +def : Pat<(setne CPURegs:$lhs, CPURegs:$rhs), + (OR (SLT CPURegs:$lhs, CPURegs:$rhs), + (SLT CPURegs:$rhs, CPURegs:$lhs))>; + +def : Pat<(seteq CPURegs:$lhs, CPURegs:$rhs), + (XORi (OR (SLT CPURegs:$lhs, CPURegs:$rhs), + (SLT CPURegs:$rhs, CPURegs:$lhs)), 1)>; + +// setcc reg/imm operands +def : Pat<(setge CPURegs:$lhs, immSExt16:$rhs), + (XORi (SLTi CPURegs:$lhs, immSExt16:$rhs), 1)>; +def : Pat<(setuge CPURegs:$lhs, immZExt16:$rhs), + (XORi (SLTiu CPURegs:$lhs, immZExt16:$rhs), 1)>; + From evan.cheng at apple.com Sat Aug 18 00:57:05 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Sat, 18 Aug 2007 05:57:05 -0000 Subject: [llvm-commits] [llvm] r41163 - /llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Message-ID: <200708180557.l7I5v6na011286@zion.cs.uiuc.edu> Author: evancheng Date: Sat Aug 18 00:57:05 2007 New Revision: 41163 URL: http://llvm.org/viewvc/llvm-project?rev=41163&view=rev Log: Fold C ? 0 : 1 to ~C or zext(~C) or trunc(~C) depending the types. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=41163&r1=41162&r2=41163&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Sat Aug 18 00:57:05 2007 @@ -2249,6 +2249,7 @@ ConstantSDNode *N1C = dyn_cast(N1); ConstantSDNode *N2C = dyn_cast(N2); MVT::ValueType VT = N->getValueType(0); + MVT::ValueType VT0 = N0.getValueType(); // fold select C, X, X -> X if (N1 == N2) @@ -2262,15 +2263,25 @@ // fold select C, 1, X -> C | X if (MVT::i1 == VT && N1C && N1C->getValue() == 1) return DAG.getNode(ISD::OR, VT, N0, N2); + // fold select C, 0, 1 -> ~C + if (MVT::isInteger(VT) && MVT::isInteger(VT0) && + N1C && N2C && N1C->isNullValue() && N2C->getValue() == 1) { + SDOperand XORNode = DAG.getNode(ISD::XOR, VT0, N0, DAG.getConstant(1, VT0)); + if (VT == VT0) + return XORNode; + AddToWorkList(XORNode.Val); + if (MVT::getSizeInBits(VT) > MVT::getSizeInBits(VT0)) + return DAG.getNode(ISD::ZERO_EXTEND, VT, XORNode); + return DAG.getNode(ISD::TRUNCATE, VT, XORNode); + } // fold select C, 0, X -> ~C & X - // FIXME: this should check for C type == X type, not i1? - if (MVT::i1 == VT && N1C && N1C->isNullValue()) { + if (VT == VT0 && N1C && N1C->isNullValue()) { SDOperand XORNode = DAG.getNode(ISD::XOR, VT, N0, DAG.getConstant(1, VT)); AddToWorkList(XORNode.Val); return DAG.getNode(ISD::AND, VT, XORNode, N2); } // fold select C, X, 1 -> ~C | X - if (MVT::i1 == VT && N2C && N2C->getValue() == 1) { + if (VT == VT0 && N2C && N2C->getValue() == 1) { SDOperand XORNode = DAG.getNode(ISD::XOR, VT, N0, DAG.getConstant(1, VT)); AddToWorkList(XORNode.Val); return DAG.getNode(ISD::OR, VT, XORNode, N1); From evan.cheng at apple.com Sat Aug 18 01:11:58 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Sat, 18 Aug 2007 06:11:58 -0000 Subject: [llvm-commits] [llvm] r41164 - /llvm/trunk/test/CodeGen/X86/select-zero-one.ll Message-ID: <200708180611.l7I6BwPF011657@zion.cs.uiuc.edu> Author: evancheng Date: Sat Aug 18 01:11:57 2007 New Revision: 41164 URL: http://llvm.org/viewvc/llvm-project?rev=41164&view=rev Log: Test dag xform: Fold C ? 0 : 1 to ~C or zext(~C) or trunc(~C) Added: llvm/trunk/test/CodeGen/X86/select-zero-one.ll Added: llvm/trunk/test/CodeGen/X86/select-zero-one.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/select-zero-one.ll?rev=41164&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/X86/select-zero-one.ll (added) +++ llvm/trunk/test/CodeGen/X86/select-zero-one.ll Sat Aug 18 01:11:57 2007 @@ -0,0 +1,25 @@ +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | not grep cmov +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | not grep xor +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movzbl | count 1 + + at r1 = weak global i32 0 + +define void @t1(i32 %a, double %b) { + %tmp114 = fcmp ugt double %b, 1.000000e-09 + %tmp120 = icmp eq i32 %a, 0 ; [#uses=1] + %bothcond = or i1 %tmp114, %tmp120 ; [#uses=1] + %storemerge = select i1 %bothcond, i32 0, i32 1 ; [#uses=2] + store i32 %storemerge, i32* @r1, align 4 + ret void +} + + at r2 = weak global i8 0 + +define void @t2(i32 %a, double %b) { + %tmp114 = fcmp ugt double %b, 1.000000e-09 + %tmp120 = icmp eq i32 %a, 0 ; [#uses=1] + %bothcond = or i1 %tmp114, %tmp120 ; [#uses=1] + %storemerge = select i1 %bothcond, i8 0, i8 1 ; [#uses=2] + store i8 %storemerge, i8* @r2, align 4 + ret void +} From sabre at nondot.org Sat Aug 18 01:13:20 2007 From: sabre at nondot.org (Chris Lattner) Date: Sat, 18 Aug 2007 06:13:20 -0000 Subject: [llvm-commits] [llvm] r41165 - /llvm/trunk/lib/VMCore/Verifier.cpp Message-ID: <200708180613.l7I6DK5Q011706@zion.cs.uiuc.edu> Author: lattner Date: Sat Aug 18 01:13:19 2007 New Revision: 41165 URL: http://llvm.org/viewvc/llvm-project?rev=41165&view=rev Log: use a nicer accessor. Modified: llvm/trunk/lib/VMCore/Verifier.cpp Modified: llvm/trunk/lib/VMCore/Verifier.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Verifier.cpp?rev=41165&r1=41164&r2=41165&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Verifier.cpp (original) +++ llvm/trunk/lib/VMCore/Verifier.cpp Sat Aug 18 01:13:19 2007 @@ -347,7 +347,7 @@ void Verifier::visitFunction(Function &F) { // Check function arguments. const FunctionType *FT = F.getFunctionType(); - unsigned NumArgs = F.getArgumentList().size(); + unsigned NumArgs = F.arg_size(); Assert2(FT->getNumParams() == NumArgs, "# formal arguments must match # of arguments for function type!", From sabre at nondot.org Sat Aug 18 01:14:52 2007 From: sabre at nondot.org (Chris Lattner) Date: Sat, 18 Aug 2007 06:14:52 -0000 Subject: [llvm-commits] [llvm] r41166 - in /llvm/trunk: include/llvm/Function.h lib/VMCore/Function.cpp Message-ID: <200708180614.l7I6EqdM011757@zion.cs.uiuc.edu> Author: lattner Date: Sat Aug 18 01:14:52 2007 New Revision: 41166 URL: http://llvm.org/viewvc/llvm-project?rev=41166&view=rev Log: Compute the argument list as lazily as possible. This ensures that clients that don't use it don't have to pay the memory cost for the arguments. This allows us to avoid creating Argument nodes for many prototypes and for clients who lazily deserialize code from a bytecode file. Modified: llvm/trunk/include/llvm/Function.h llvm/trunk/lib/VMCore/Function.cpp Modified: llvm/trunk/include/llvm/Function.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Function.h?rev=41166&r1=41165&r2=41166&view=diff ============================================================================== --- llvm/trunk/include/llvm/Function.h (original) +++ llvm/trunk/include/llvm/Function.h Sat Aug 18 01:14:52 2007 @@ -65,11 +65,10 @@ private: // Important things that make up a function! - BasicBlockListType BasicBlocks; ///< The basic blocks - ArgumentListType ArgumentList; ///< The formal arguments - ValueSymbolTable *SymTab; ///< Symbol table of args/instructions - ParamAttrsList *ParamAttrs; ///< Parameter attributes - + BasicBlockListType BasicBlocks; ///< The basic blocks + mutable ArgumentListType ArgumentList; ///< The formal arguments + ValueSymbolTable *SymTab; ///< Symbol table of args/instructions + ParamAttrsList *ParamAttrs; ///< Parameter attributes // The Calling Convention is stored in Value::SubclassData. /*unsigned CallingConvention;*/ @@ -90,6 +89,18 @@ Function *getPrev() { return Prev; } const Function *getPrev() const { return Prev; } + /// hasLazyArguments/CheckLazyArguments - The argument list of a function is + /// built on demand, so that the list isn't allocated until the first client + /// needs it. The hasLazyArguments predicate returns true if the arg list + /// hasn't been set up yet. + bool hasLazyArguments() const { + return SubclassData & 1; + } + void CheckLazyArguments() const { + if (hasLazyArguments()) + BuildLazyArguments(); + } + void BuildLazyArguments() const; public: /// Function ctor - If the (optional) Module argument is specified, the /// function is automatically inserted into the end of the function list for @@ -125,9 +136,11 @@ /// getCallingConv()/setCallingConv(uint) - These method get and set the /// calling convention of this function. The enum values for the known /// calling conventions are defined in CallingConv.h. - unsigned getCallingConv() const { return SubclassData; } - void setCallingConv(unsigned CC) { SubclassData = CC; } - + unsigned getCallingConv() const { return SubclassData >> 1; } + void setCallingConv(unsigned CC) { + SubclassData = (SubclassData & 1) | CC << 1; + } + /// Obtains a constant pointer to the ParamAttrsList object which holds the /// parameter attributes information, if any. /// @returns 0 if no parameter attributes have been set. @@ -161,8 +174,14 @@ /// Get the underlying elements of the Function... the basic block list is /// empty for external functions. /// - const ArgumentListType &getArgumentList() const { return ArgumentList; } - ArgumentListType &getArgumentList() { return ArgumentList; } + const ArgumentListType &getArgumentList() const { + CheckLazyArguments(); + return ArgumentList; + } + ArgumentListType &getArgumentList() { + CheckLazyArguments(); + return ArgumentList; + } const BasicBlockListType &getBasicBlockList() const { return BasicBlocks; } BasicBlockListType &getBasicBlockList() { return BasicBlocks; } @@ -197,13 +216,25 @@ //===--------------------------------------------------------------------===// // Argument iterator forwarding functions // - arg_iterator arg_begin() { return ArgumentList.begin(); } - const_arg_iterator arg_begin() const { return ArgumentList.begin(); } - arg_iterator arg_end () { return ArgumentList.end(); } - const_arg_iterator arg_end () const { return ArgumentList.end(); } + arg_iterator arg_begin() { + CheckLazyArguments(); + return ArgumentList.begin(); + } + const_arg_iterator arg_begin() const { + CheckLazyArguments(); + return ArgumentList.begin(); + } + arg_iterator arg_end() { + CheckLazyArguments(); + return ArgumentList.end(); + } + const_arg_iterator arg_end() const { + CheckLazyArguments(); + return ArgumentList.end(); + } - size_t arg_size () const { return ArgumentList.size(); } - bool arg_empty() const { return ArgumentList.empty(); } + size_t arg_size() const; + bool arg_empty() const; virtual void print(std::ostream &OS) const { print(OS, 0); } void print(std::ostream *OS) const { if (OS) print(*OS); } Modified: llvm/trunk/lib/VMCore/Function.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Function.cpp?rev=41166&r1=41165&r2=41166&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Function.cpp (original) +++ llvm/trunk/lib/VMCore/Function.cpp Sat Aug 18 01:14:52 2007 @@ -152,13 +152,10 @@ assert((getReturnType()->isFirstClassType() ||getReturnType() == Type::VoidTy) && "LLVM functions cannot return aggregate values!"); - // Create the arguments vector, all arguments start out unnamed. - for (unsigned i = 0, e = Ty->getNumParams(); i != e; ++i) { - assert(Ty->getParamType(i) != Type::VoidTy && - "Cannot have void typed arguments!"); - ArgumentList.push_back(new Argument(Ty->getParamType(i))); - } - + // If the function has arguments, mark them as lazily built. + if (Ty->getNumParams()) + SubclassData = 1; // Set the "has lazy arguments" bit. + // Make sure that we get added to a function LeakDetector::addGarbageObject(this); @@ -178,6 +175,26 @@ ParamAttrs->dropRef(); } +void Function::BuildLazyArguments() const { + // Create the arguments vector, all arguments start out unnamed. + const FunctionType *FT = getFunctionType(); + for (unsigned i = 0, e = FT->getNumParams(); i != e; ++i) { + assert(FT->getParamType(i) != Type::VoidTy && + "Cannot have void typed arguments!"); + ArgumentList.push_back(new Argument(FT->getParamType(i))); + } + + // Clear the lazy arguments bit. + const_cast(this)->SubclassData &= ~1; +} + +size_t Function::arg_size() const { + return getFunctionType()->getNumParams(); +} +bool Function::arg_empty() const { + return getFunctionType()->getNumParams() == 0; +} + void Function::setParent(Module *parent) { if (getParent()) LeakDetector::addGarbageObject(this); From nicholas at mxc.ca Sat Aug 18 09:46:56 2007 From: nicholas at mxc.ca (Nick Lewycky) Date: Sat, 18 Aug 2007 14:46:56 -0000 Subject: [llvm-commits] [llvm] r41167 - /llvm/trunk/include/llvm/Analysis/Dominators.h Message-ID: <200708181446.l7IEku73006607@zion.cs.uiuc.edu> Author: nicholas Date: Sat Aug 18 09:46:55 2007 New Revision: 41167 URL: http://llvm.org/viewvc/llvm-project?rev=41167&view=rev Log: Simplify. Modified: llvm/trunk/include/llvm/Analysis/Dominators.h Modified: llvm/trunk/include/llvm/Analysis/Dominators.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/Dominators.h?rev=41167&r1=41166&r2=41167&view=diff ============================================================================== --- llvm/trunk/include/llvm/Analysis/Dominators.h (original) +++ llvm/trunk/include/llvm/Analysis/Dominators.h Sat Aug 18 09:46:55 2007 @@ -379,8 +379,7 @@ void removeBlock(BasicBlock *BB) { assert(find(BB) != end() && "Block is not in DominanceFrontier!"); for (iterator I = begin(), E = end(); I != E; ++I) - if (I->second.count(BB)) - I->second.erase(BB); + I->second.erase(BB); Frontiers.erase(BB); } From nicholas at mxc.ca Sat Aug 18 10:08:57 2007 From: nicholas at mxc.ca (Nick Lewycky) Date: Sat, 18 Aug 2007 15:08:57 -0000 Subject: [llvm-commits] [llvm] r41168 - /llvm/trunk/lib/Transforms/Scalar/LICM.cpp Message-ID: <200708181508.l7IF8vMP007475@zion.cs.uiuc.edu> Author: nicholas Date: Sat Aug 18 10:08:56 2007 New Revision: 41168 URL: http://llvm.org/viewvc/llvm-project?rev=41168&view=rev Log: Typo. Modified: llvm/trunk/lib/Transforms/Scalar/LICM.cpp Modified: llvm/trunk/lib/Transforms/Scalar/LICM.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LICM.cpp?rev=41168&r1=41167&r2=41168&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/LICM.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/LICM.cpp Sat Aug 18 10:08:56 2007 @@ -265,7 +265,7 @@ // // Traverse the body of the loop in depth first order on the dominator tree so // that we are guaranteed to see definitions before we see uses. This allows - // us to sink instructions in one pass, without iteration. AFter sinking + // us to sink instructions in one pass, without iteration. After sinking // instructions, we perform another pass to hoist them out of the loop. // SinkRegion(DT->getNode(L->getHeader())); From gordonhenriksen at mac.com Sat Aug 18 18:09:53 2007 From: gordonhenriksen at mac.com (Gordon Henriksen) Date: Sat, 18 Aug 2007 19:09:53 -0400 Subject: [llvm-commits] [PATCH] Xcode project Message-ID: <2E5887D1-A447-4A52-892A-F719500523DB@mac.com> This reduces bitrot in the Xcode project and adds svn:ignores for a couple of test output directories. ? Gordon ? -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20070818/47678209/attachment.html -------------- next part -------------- A non-text attachment was scrubbed... Name: xcode.patch Type: application/octet-stream Size: 96293 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20070818/47678209/attachment.obj -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20070818/47678209/attachment-0001.html From nicholas at mxc.ca Sat Aug 18 18:18:04 2007 From: nicholas at mxc.ca (Nick Lewycky) Date: Sat, 18 Aug 2007 23:18:04 -0000 Subject: [llvm-commits] [llvm] r41169 - /llvm/trunk/lib/Transforms/Scalar/PredicateSimplifier.cpp Message-ID: <200708182318.l7INI5cx023293@zion.cs.uiuc.edu> Author: nicholas Date: Sat Aug 18 18:18:03 2007 New Revision: 41169 URL: http://llvm.org/viewvc/llvm-project?rev=41169&view=rev Log: Never insert duplicate edges. Modified: llvm/trunk/lib/Transforms/Scalar/PredicateSimplifier.cpp Modified: llvm/trunk/lib/Transforms/Scalar/PredicateSimplifier.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/PredicateSimplifier.cpp?rev=41169&r1=41168&r2=41169&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/PredicateSimplifier.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/PredicateSimplifier.cpp Sat Aug 18 18:18:03 2007 @@ -711,23 +711,27 @@ ++J; } - if (J != E && J->To == n && J->Subtree->dominates(Subtree)) { + if (J != E && J->To == n) { + assert(J->Subtree->dominates(Subtree)); + edge.LV = static_cast(J->LV & R); assert(validPredicate(edge.LV) && "Invalid union of lattice values."); - if (edge.LV != J->LV) { - // We have to tighten any edge beneath our update. - for (iterator K = I; K->To == n; --K) { - if (K->Subtree->DominatedBy(Subtree)) { - LatticeVal LV = static_cast(K->LV & edge.LV); - assert(validPredicate(LV) && "Invalid union of lattice values"); - K->LV = LV; - } - if (K == B) break; + if (edge.LV == J->LV) + return; // This update adds nothing new. + } + + if (I != B) { + // We also have to tighten any edge beneath our update. + for (iterator K = I - 1; K->To == n; --K) { + if (K->Subtree->DominatedBy(Subtree)) { + LatticeVal LV = static_cast(K->LV & edge.LV); + assert(validPredicate(LV) && "Invalid union of lattice values"); + K->LV = LV; } - + if (K == B) break; } - } + } // Insert new edge at Subtree if it isn't already there. if (I == E || I->To != n || Subtree != I->Subtree) From nicholas at mxc.ca Sat Aug 18 18:21:28 2007 From: nicholas at mxc.ca (Nick Lewycky) Date: Sat, 18 Aug 2007 23:21:28 -0000 Subject: [llvm-commits] [llvm] r41170 - /llvm/trunk/lib/Transforms/Scalar/PredicateSimplifier.cpp Message-ID: <200708182321.l7INLTm0023423@zion.cs.uiuc.edu> Author: nicholas Date: Sat Aug 18 18:21:28 2007 New Revision: 41170 URL: http://llvm.org/viewvc/llvm-project?rev=41170&view=rev Log: Oops, remove assert that wasn't meant to be committed. Modified: llvm/trunk/lib/Transforms/Scalar/PredicateSimplifier.cpp Modified: llvm/trunk/lib/Transforms/Scalar/PredicateSimplifier.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/PredicateSimplifier.cpp?rev=41170&r1=41169&r2=41170&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/PredicateSimplifier.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/PredicateSimplifier.cpp Sat Aug 18 18:21:28 2007 @@ -712,8 +712,6 @@ } if (J != E && J->To == n) { - assert(J->Subtree->dominates(Subtree)); - edge.LV = static_cast(J->LV & R); assert(validPredicate(edge.LV) && "Invalid union of lattice values."); From baldrick at free.fr Thu Aug 16 09:27:45 2007 From: baldrick at free.fr (Duncan Sands) Date: Thu, 16 Aug 2007 16:27:45 +0200 Subject: [llvm-commits] PR1146 patch for llvm-gcc-4.0 In-Reply-To: <1185732538.30786.45.camel@bashful.x10sys.com> References: <1185732538.30786.45.camel@bashful.x10sys.com> Message-ID: <200708161627.45660.baldrick@free.fr> Hi Reid, > + bool extend = false; it looks like extend is never assigned another value. Ciao, Duncan. From baldrick at free.fr Thu Aug 16 09:32:46 2007 From: baldrick at free.fr (Duncan Sands) Date: Thu, 16 Aug 2007 16:32:46 +0200 Subject: [llvm-commits] PR1146 patch for llvm-gcc-4.0 In-Reply-To: <1185732538.30786.45.camel@bashful.x10sys.com> References: <1185732538.30786.45.camel@bashful.x10sys.com> Message-ID: <200708161632.47097.baldrick@free.fr> Hi Reid, in ConvertFunctionType: > + PAL = 0; so there is no need for callers to set PAL = 0 before calling ConvertFunctionType, as they all do right now. For that matter, it's not clear that this assignment is needed since it looks like PAL is always assigned elsewhere before ConvertFunctionType returns (you could argue that initializing it to zero is defensive programming, defending against future changes). Ciao, Duncan. From baldrick at free.fr Thu Aug 16 10:56:07 2007 From: baldrick at free.fr (Duncan Sands) Date: Thu, 16 Aug 2007 17:56:07 +0200 Subject: [llvm-commits] PR1146 patch for llvm-gcc-4.0 In-Reply-To: <1185732538.30786.45.camel@bashful.x10sys.com> References: <1185732538.30786.45.camel@bashful.x10sys.com> Message-ID: <200708161756.08140.baldrick@free.fr> Hi Reid, > - Attrs.push_back(ParamAttrsWithIndex::get(ArgTypes.size(), Attributes)); > + Client.addAttributes(ArgTypes.size(), Attributes); all users of addAttributes seem to be adding a new attribute at the back. Given this, your implementation of addAttributes looks inefficient. Also, does it work correctly? - addAttributes doesn't add the attribute at all if there are no existing attributes for that index, which seems to be exactly the case for every use of it! Ciao, Duncan. From rspencer at reidspencer.com Sun Aug 19 01:13:24 2007 From: rspencer at reidspencer.com (Reid Spencer) Date: Sat, 18 Aug 2007 23:13:24 -0700 Subject: [llvm-commits] PR1146 patch for llvm-gcc-4.0 In-Reply-To: <200708161627.45660.baldrick@free.fr> References: <1185732538.30786.45.camel@bashful.x10sys.com> <200708161627.45660.baldrick@free.fr> Message-ID: <1187504004.32105.52.camel@bashful.x10sys.com> On Thu, 2007-08-16 at 16:27 +0200, Duncan Sands wrote: > Hi Reid, > > > + bool extend = false; > > it looks like extend is never assigned another value. This doesn't exist in the current patch. > > Ciao, > > Duncan. From rspencer at reidspencer.com Sun Aug 19 01:13:57 2007 From: rspencer at reidspencer.com (Reid Spencer) Date: Sat, 18 Aug 2007 23:13:57 -0700 Subject: [llvm-commits] PR1146 patch for llvm-gcc-4.0 In-Reply-To: <200708161632.47097.baldrick@free.fr> References: <1185732538.30786.45.camel@bashful.x10sys.com> <200708161632.47097.baldrick@free.fr> Message-ID: <1187504037.32105.54.camel@bashful.x10sys.com> On Thu, 2007-08-16 at 16:32 +0200, Duncan Sands wrote: > Hi Reid, > > in ConvertFunctionType: > > > + PAL = 0; > > so there is no need for callers to set PAL = 0 before > calling ConvertFunctionType, as they all do right now. > For that matter, it's not clear that this assignment is > needed since it looks like PAL is always assigned > elsewhere before ConvertFunctionType returns (you could > argue that initializing it to zero is defensive programming, > defending against future changes). That is exactly the reason why it is initialized. > > Ciao, > > Duncan. From rspencer at reidspencer.com Sun Aug 19 01:14:56 2007 From: rspencer at reidspencer.com (Reid Spencer) Date: Sat, 18 Aug 2007 23:14:56 -0700 Subject: [llvm-commits] PR1146 patch for llvm-gcc-4.0 In-Reply-To: <200708161756.08140.baldrick@free.fr> References: <1185732538.30786.45.camel@bashful.x10sys.com> <200708161756.08140.baldrick@free.fr> Message-ID: <1187504096.32105.56.camel@bashful.x10sys.com> On Thu, 2007-08-16 at 17:56 +0200, Duncan Sands wrote: > Hi Reid, > > > - Attrs.push_back(ParamAttrsWithIndex::get(ArgTypes.size(), Attributes)); > > + Client.addAttributes(ArgTypes.size(), Attributes); > > all users of addAttributes seem to be adding a new attribute at > the back. Given this, your implementation of addAttributes looks > inefficient. Also, does it work correctly? - addAttributes doesn't > add the attribute at all if there are no existing attributes for that > index, which seems to be exactly the case for every use of it! Again, this doesn't exist in the current patch. Please see the patch currently attached to PR1146 for the latest details. Thanks for taking a look at this though, I appreciate it. Reid. > > Ciao, > > Duncan. > From baldrick at free.fr Sun Aug 19 15:17:19 2007 From: baldrick at free.fr (Duncan Sands) Date: Sun, 19 Aug 2007 20:17:19 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r41171 - in /llvm-gcc-4.2/trunk/gcc: except.c except.h llvm-convert.cpp llvm-internal.h Message-ID: <200708192017.l7JKHKjY030288@zion.cs.uiuc.edu> Author: baldrick Date: Sun Aug 19 15:17:17 2007 New Revision: 41171 URL: http://llvm.org/viewvc/llvm-project?rev=41171&view=rev Log: Exception handling rewrite - let gcc do the heavy lifting. This patch strips out the existing LLVM eh code, and replaces it with simpler code that exploits gcc's eh machinery. It requires running gcc's eh lowering pass (it was already being run in gcc-4.2). Not only is the new code simpler, it also handles more cases correctly (essentially all of the gcc eh tests) and results in better quality bytecode. In order to handle all of the gcc tests correctly, some small tweaks need to be made to the way LLVM handles the "nounwind" attribute. I plan to take care of this later. Modified: llvm-gcc-4.2/trunk/gcc/except.c llvm-gcc-4.2/trunk/gcc/except.h llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp llvm-gcc-4.2/trunk/gcc/llvm-internal.h Modified: llvm-gcc-4.2/trunk/gcc/except.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/except.c?rev=41171&r1=41170&r2=41171&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/except.c (original) +++ llvm-gcc-4.2/trunk/gcc/except.c Sun Aug 19 15:17:17 2007 @@ -255,7 +255,8 @@ static int t2r_eq (const void *, const void *); static hashval_t t2r_hash (const void *); static void add_type_for_runtime (tree); -static tree lookup_type_for_runtime (tree); +/* LLVM local */ +/* static tree lookup_type_for_runtime (tree); */ static void remove_unreachable_regions (rtx); @@ -561,6 +562,62 @@ { region->tree_label = lab; } + +/* LLVM local begin */ +int +classify_eh_handler (struct eh_region *region) +{ + switch (region->type) + { + case ERT_ALLOWED_EXCEPTIONS: + case ERT_MUST_NOT_THROW: /* Equivalent to an empty filter */ + return -1; + case ERT_CLEANUP: + return 0; + case ERT_CATCH: + return 1; + default: + gcc_unreachable(); + } +} + +struct eh_region * +get_eh_next_catch (struct eh_region *region) +{ + gcc_assert(region->type == ERT_CATCH); + return region->u.catch.next_catch; +} + +struct eh_region * +get_eh_region (unsigned region_number) +{ + struct eh_region *region = + VEC_index (eh_region, cfun->eh->region_array, region_number); + + if (!region || region->region_number != (int)region_number) + return NULL; + + return region; +} + +tree +get_eh_type_list (struct eh_region *region) +{ + switch (region->type) + { + case ERT_ALLOWED_EXCEPTIONS: + return region->u.allowed.type_list; + case ERT_CATCH: + return region->u.catch.type_list; + case ERT_MUST_NOT_THROW: + /* Equivalent to an empty filter */ + return NULL_TREE; + default: + gcc_unreachable(); + } +} +/* LLVM local end */ + void expand_resx_expr (tree exp) @@ -1156,7 +1213,8 @@ } } -static tree +/* LLVM local */ +tree lookup_type_for_runtime (tree type) { tree *slot; Modified: llvm-gcc-4.2/trunk/gcc/except.h URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/except.h?rev=41171&r1=41170&r2=41171&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/except.h (original) +++ llvm-gcc-4.2/trunk/gcc/except.h Sun Aug 19 15:17:17 2007 @@ -117,6 +117,14 @@ extern int lookup_stmt_eh_region (tree); extern bool verify_eh_edges (tree); +/* LLVM local begin */ +extern int classify_eh_handler (struct eh_region *); +extern struct eh_region *get_eh_next_catch (struct eh_region *); +extern struct eh_region *get_eh_region (unsigned); +extern tree get_eh_type_list (struct eh_region *); +extern tree lookup_type_for_runtime (tree); +/* LLVM local end */ + /* If non-NULL, this is a function that returns an expression to be executed if an unhandled exception is propagated out of a cleanup region. For example, in C++, an exception thrown by a destructor Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=41171&r1=41170&r2=41171&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Sun Aug 19 15:17:17 2007 @@ -68,8 +68,6 @@ extern enum machine_mode reg_raw_mode[FIRST_PSEUDO_REGISTER]; } -#define ITANIUM_STYLE_EXCEPTIONS - // Check for GCC bug 17347: C++ FE sometimes creates bogus ctor trees // which we should throw out #define BOGUS_CTOR(exp) \ @@ -339,8 +337,7 @@ // ... High-Level Methods ... //===----------------------------------------------------------------------===// -/// TheTreeToLLVM - Keep track of the current function being compiled. This is -/// only to support the address of labels extension. +/// TheTreeToLLVM - Keep track of the current function being compiled. static TreeToLLVM *TheTreeToLLVM = 0; const TargetData &getTargetData() { @@ -365,20 +362,18 @@ } AllocaInsertionPoint = 0; - - CleanupFilter = NULL_TREE; + ExceptionValue = 0; ExceptionSelectorValue = 0; FuncEHException = 0; FuncEHSelector = 0; FuncEHGetTypeID = 0; FuncCPPPersonality = 0; - FuncUnwindResume = 0; - + FuncUnwindResume = 0; + NumAddressTakenBlocks = 0; IndirectGotoBlock = 0; - CurrentEHScopes.reserve(16); - + assert(TheTreeToLLVM == 0 && "Reentering function creation?"); TheTreeToLLVM = this; } @@ -733,24 +728,12 @@ } if (TheDebugInfo) TheDebugInfo->EmitRegionEnd(Fn, Builder.GetInsertBlock()); Builder.CreateRet(RetVal); - - // If this function has exceptions, emit the lazily created unwind block. - if (UnwindBB) { - EmitBlock(UnwindBB); -#ifdef ITANIUM_STYLE_EXCEPTIONS - if (ExceptionValue) { - // Fetch and store exception handler. - Value *Arg = Builder.CreateLoad(ExceptionValue, "eh_ptr"); - Builder.CreateCall(FuncUnwindResume, Arg); - Builder.CreateUnreachable(); - } else { - new UnwindInst(UnwindBB); - } -#else - new UnwindInst(UnwindBB); -#endif - } - + + // Emit pending exception handling code. + EmitLandingPads(); + EmitPostPads(); + EmitUnwindBlock(); + // If this function takes the address of a label, emit the indirect goto // block. if (IndirectGotoBlock) { @@ -814,16 +797,6 @@ debug_tree(exp); abort(); - // FIXME: EH handling trees. Blank right now - case FILTER_EXPR: - case RESX_EXPR: - { - const Type *Ty = ConvertType(TREE_TYPE(exp)); - if (Ty != Type::VoidTy) - Result = Constant::getNullValue(Ty); - } - break; - // Basic lists and binding scopes case BIND_EXPR: Result = EmitBIND_EXPR(exp, DestLoc); break; case STATEMENT_LIST: Result = EmitSTATEMENT_LIST(exp, DestLoc); break; @@ -834,12 +807,12 @@ case RETURN_EXPR: Result = EmitRETURN_EXPR(exp, DestLoc); break; case COND_EXPR: Result = EmitCOND_EXPR(exp); break; case SWITCH_EXPR: Result = EmitSWITCH_EXPR(exp); break; - case TRY_FINALLY_EXPR: - case TRY_CATCH_EXPR: Result = EmitTRY_EXPR(exp); break; + + // Exception handling. case EXC_PTR_EXPR: Result = EmitEXC_PTR_EXPR(exp); break; - case CATCH_EXPR: Result = EmitCATCH_EXPR(exp); break; - case EH_FILTER_EXPR: Result = EmitEH_FILTER_EXPR(exp); break; - + case FILTER_EXPR: Result = EmitFILTER_EXPR(exp); break; + case RESX_EXPR: Result = EmitRESX_EXPR(exp); break; + // Expressions case VAR_DECL: case PARM_DECL: @@ -990,6 +963,7 @@ /// EmitLV - Convert the specified l-value tree node to LLVM code, returning /// the address of the result. LValue TreeToLLVM::EmitLV(tree exp) { + // Needs to be in sync with EmitVIEW_CONVERT_EXPR. switch (TREE_CODE(exp)) { default: std::cerr << "Unhandled lvalue expression!\n"; @@ -1015,6 +989,10 @@ // Type Conversion. case VIEW_CONVERT_EXPR: return EmitLV_VIEW_CONVERT_EXPR(exp); + // Exception Handling. + case EXC_PTR_EXPR: return EmitLV_EXC_PTR_EXPR(exp); + case FILTER_EXPR: return EmitLV_FILTER_EXPR(exp); + // Trivial Cases. case WITH_SIZE_EXPR: // The address is the address of the operand. @@ -1022,10 +1000,6 @@ case INDIRECT_REF: // The lvalue is just the address. return Emit(TREE_OPERAND(exp, 0), 0); - - // EH stuff - case EXC_PTR_EXPR: return EmitLV_EXC_PTR_EXPR(exp); - case FILTER_EXPR: return EmitLV_FILTER_EXPR(exp); } } @@ -1154,40 +1128,23 @@ } /// EmitBlock - Add the specified basic block to the end of the function. If -/// the previous block falls through into it, add an explicit branch. Also, -/// manage fixups for EH info. +/// the previous block falls through into it, add an explicit branch. void TreeToLLVM::EmitBlock(BasicBlock *BB) { BasicBlock *CurBB = Builder.GetInsertBlock(); // If the previous block falls through to BB, add an explicit branch. if (CurBB->getTerminator() == 0) { // If the previous block has no label and is empty, remove it: it is a // post-terminator block. - if (CurBB->getName().empty() && CurBB->begin() == CurBB->end()) { + if (CurBB->getName().empty() && CurBB->begin() == CurBB->end()) CurBB->eraseFromParent(); - - if (!CurrentEHScopes.empty()) { - assert(CurrentEHScopes.back().Blocks.back() == CurBB); - CurrentEHScopes.back().Blocks.pop_back(); - BlockEHScope.erase(CurBB); - } - } else { + else // Otherwise, fall through to this block. Builder.CreateBr(BB); - } } // Add this block. Fn->getBasicBlockList().push_back(BB); Builder.SetInsertPoint(BB); // It is now the current block. - - // If there are no exception scopes that contain this block, exit. This is - // common for C++ code and almost uniformly true for C code. - if (CurrentEHScopes.empty()) return; - - // Otherwise, we now know that this block is in this exception scope. Update - // records. - CurrentEHScopes.back().Blocks.push_back(BB); - BlockEHScope[BB] = CurrentEHScopes.size()-1; } /// CopyAggregate - Recursively traverse the potientially aggregate src/dest @@ -1378,92 +1335,6 @@ } -/// EmitBranchInternal - Emit an unconditional branch to the specified basic -/// block, running cleanups if the branch exits scopes. The arguments specify -/// how to handle these cleanups. -/// -/// This function is used for a variety of control flow purposes. In particular, -/// it is responsible for determining which cleanups must be executed as a -/// result of leaving blocks with destructors. For branches that require -/// cleanups, it schedules cleanup insertion with a goto_fixup record. When the -/// block containing the cleanup is exited, the end-of-block code inserts the -/// cleanups as indicated by goto_fixups. -/// -/// Note that some cleanups only apply to exception edges. If this is an -/// exception edge (as indicated by IsExceptionEdge) these are expanded, -/// otherwise not. -/// -/// Note that all calling code should emit a new basic block after this, so that -/// future code does not fall after the terminator. -/// -void TreeToLLVM::EmitBranchInternal(BasicBlock *Dest, bool IsExceptionEdge) { - // Insert the branch. - BranchInst *BI = Builder.CreateBr(Dest); - - // If there are no current exception scopes, this edge *couldn't* need - // cleanups. It is not possible to jump into a scope that requires a cleanup. - // This keeps the C case fast. - if (CurrentEHScopes.empty()) return; - - // If the destination block has already been emitted, this is a backwards - // branch, and we can resolve it now. - if (Dest->getParent()) { - // This is a forward reference to a block. Since we know that we can't jump - // INTO a region that has cleanups, we can only be branching out. - std::map::iterator I = BlockEHScope.find(Dest); - if (I != BlockEHScope.end() && I->second == CurrentEHScopes.size() - 1) - return; // Branch within the same EH scope. - - assert((I == BlockEHScope.end() || I->second < CurrentEHScopes.size()) && - "Invalid branch into EH region"); - } - - AddBranchFixup(BI, IsExceptionEdge); -} - -/// AddBranchFixup - Add the specified unconditional branch to the fixup list -/// for the outermost exception scope, merging it if there is already a fixup -/// that works. -void TreeToLLVM::AddBranchFixup(BranchInst *BI, bool isExceptionEdge) { - BasicBlock *Dest = BI->getSuccessor(0); - - // Check to see if we already have a fixup for this destination. - std::vector &BranchFixups = CurrentEHScopes.back().BranchFixups; - for (unsigned i = 0, e = BranchFixups.size(); i != e; ++i) - if (BranchFixups[i].SrcBranch->getSuccessor(0) == Dest && - BranchFixups[i].isExceptionEdge == isExceptionEdge) { - BranchFixup &Fixup = BranchFixups[i]; - // We found a fixup for this destination already. Recycle it. - if (&Fixup.SrcBranch->getParent()->front() == Fixup.SrcBranch) { - // If the fixup's branch is the only instruction in its block, change - // the branch we just emitted to branch to that block instead. - BI->setSuccessor(0, Fixup.SrcBranch->getParent()); - return; - } - - if (&Builder.GetInsertBlock()->front() == BI) { - // Otherwise, if this block is empty except for the branch, change the - // fixup to jump here and change the fixup to fix this branch. - Fixup.SrcBranch->setSuccessor(0, Builder.GetInsertBlock()); - Fixup.SrcBranch = BI; - return; - } - - // Finally, if neither block is empty, create a new (empty) one and - // revector BOTH branches to the new block. - EmitBlock(new BasicBlock("cleanup")); - BranchInst *NewBI = Builder.CreateBr(Dest); - BI->setSuccessor(0, Builder.GetInsertBlock()); - Fixup.SrcBranch->setSuccessor(0, Builder.GetInsertBlock()); - Fixup.SrcBranch = NewBI; - return; - } - - // Otherwise, create a new fixup for this branch so we know that it needs - // cleanups when we finish up the scopes that it is in. - BranchFixups.push_back(BranchFixup(BI, isExceptionEdge)); -} - // Emits annotate intrinsic if the decl has the annotate attribute set. void TreeToLLVM::EmitAnnotateIntrinsic(Value *V, tree decl) { @@ -1772,7 +1643,7 @@ Value *TreeToLLVM::EmitGOTO_EXPR(tree exp) { if (TREE_CODE(TREE_OPERAND(exp, 0)) == LABEL_DECL) { // Direct branch. - EmitBranchInternal(getLabelDeclBlock(TREE_OPERAND(exp, 0)), false); + Builder.CreateBr(getLabelDeclBlock(TREE_OPERAND(exp, 0))); } else { // Otherwise we have an indirect goto. @@ -1787,7 +1658,7 @@ // There should be one collector block per cleanup level! Note that // standard GCC gets this wrong as well. // - EmitBranchInternal(DestBB, false); + Builder.CreateBr(DestBB); } EmitBlock(new BasicBlock("")); return 0; @@ -1807,7 +1678,7 @@ } // Emit a branch to the exit label. - EmitBranchInternal(ReturnBB, false); + Builder.CreateBr(ReturnBB); EmitBlock(new BasicBlock("")); return 0; } @@ -1829,11 +1700,7 @@ // // The generic code handles this below, but there is no reason to create a // cond branch to two blocks which just contain branches themselves. - // Note that we only do this if we're not in the presence of C++ exceptions. - // C++ exceptions could require information for the edge, which requires the - // uncond branch to be available. - if (CurrentEHScopes.empty() && TREE_CODE(Then) == STATEMENT_LIST && - TREE_CODE(Else) == STATEMENT_LIST) { + if (TREE_CODE(Then) == STATEMENT_LIST && TREE_CODE(Else) == STATEMENT_LIST) { tree_stmt_iterator ThenI = tsi_start(Then), ElseI = tsi_start(Else); if (!tsi_end_p(ThenI) && !tsi_end_p(ElseI)) { // {} isn't empty. tree ThenStmt = tsi_stmt(ThenI), ElseStmt = tsi_stmt(ElseI); @@ -1979,164 +1846,25 @@ return 0; } -#ifndef NDEBUG -void TreeToLLVM::dumpEHScopes() const { - std::cerr << CurrentEHScopes.size() << " EH Scopes:\n"; - for (unsigned i = 0, e = CurrentEHScopes.size(); i != e; ++i) { - std::cerr << " " << i << ". catch=" << (void*)CurrentEHScopes[i].CatchExpr - << " #blocks=" << CurrentEHScopes[i].Blocks.size() - << " #fixups=" << CurrentEHScopes[i].BranchFixups.size() << "\n"; - for (unsigned f = 0, e = CurrentEHScopes[i].BranchFixups.size(); f != e;++f) - std::cerr << " Fixup #" << f << ": isEH=" - << CurrentEHScopes[i].BranchFixups[f].isExceptionEdge - << " br = " << *CurrentEHScopes[i].BranchFixups[f].SrcBranch; - } -} -#endif - -/// StripLLVMTranslationFn - Recursive function called from walk_trees to -/// implement StripLLVMTranslation. -static tree StripLLVMTranslationFn(tree *nodep, int *walk_subtrees, - void *data) { - tree node = *nodep; - if (TYPE_P(node)) { - // Don't walk into types. - *walk_subtrees = 0; - } else if (TREE_CODE(node) == STATEMENT_LIST) { - // Look for basic block labels, clearing them out. - for (tree_stmt_iterator I = tsi_start(node); !tsi_end_p(I); tsi_next(&I)) - if (TREE_CODE(tsi_stmt(I)) == LABEL_EXPR) - SET_DECL_LLVM(TREE_OPERAND(tsi_stmt(I), 0), 0); - } else if (TREE_CODE(node) == BIND_EXPR) { - // Reset the declarations for local vars. - tree Var = BIND_EXPR_VARS(node); - for (; Var; Var = TREE_CHAIN(Var)) { - if (TREE_CODE(Var) == VAR_DECL && !TREE_STATIC(Var)) - SET_DECL_LLVM(Var, 0); - } - } - return NULL_TREE; -} - - -/// StripLLVMTranslation - Given a block of code, walk it stripping off LLVM -/// information from declarations. This permits the code to be expanded into -/// multiple places in the code without (e.g.) emitting the same LABEL_DECL node -/// into multiple places. -static void StripLLVMTranslation(tree code) { - // Strip off llvm code. - walk_tree_without_duplicates(&code, StripLLVMTranslationFn, 0); -} - - -/// GatherTypeInfo - Walk through the expression gathering all the -/// typeinfos that are used. -void TreeToLLVM::GatherTypeInfo(tree exp, - std::vector &TypeInfos) { - if (TREE_CODE(exp) == CATCH_EXPR || TREE_CODE(exp) == EH_FILTER_EXPR) { - tree Types = TREE_CODE(exp) == CATCH_EXPR ? CATCH_TYPES(exp) - : EH_FILTER_TYPES(exp); - - if (!Types) { - // Catch all or empty filter. - if (TREE_CODE(exp) == CATCH_EXPR) - // Catch all. - TypeInfos.push_back( - Constant::getNullValue(PointerType::get(Type::Int8Ty)) - ); - } else if (TREE_CODE(Types) != TREE_LIST) { - // Construct typeinfo object. Each call will produce a new expression - // even if duplicate. - tree TypeInfoNopExpr = (*lang_eh_runtime_type)(Types); - // Produce value. Duplicate typeinfo get folded here. - Value *TypeInfo = Emit(TypeInfoNopExpr, 0); - // Capture typeinfo. - TypeInfos.push_back(cast(TypeInfo)); - } else { - for (; Types; Types = TREE_CHAIN (Types)) { - // Construct typeinfo object. Each call will produce a new expression - // even if duplicate. - tree TypeInfoNopExpr = (*lang_eh_runtime_type)(TREE_VALUE(Types)); - // Produce value. Duplicate typeinfo get folded here. - Value *TypeInfo = Emit(TypeInfoNopExpr, 0); - // Capture typeinfo. - TypeInfos.push_back(cast(TypeInfo)); - } - } - } else if (TREE_CODE(exp) == STATEMENT_LIST) { - // Each statement in the statement list will be a catch, or none will. - for (tree_stmt_iterator I = tsi_start(exp); !tsi_end_p(I); tsi_next(&I)) - GatherTypeInfo(tsi_stmt(I), TypeInfos); - } else { - assert(TypeInfos.empty() && "Need an exp with typeinfo"); - } -} - - -/// AddLandingPad - Insert code to fetch and save the exception and exception -/// selector. -void TreeToLLVM::AddLandingPad() { - CreateExceptionValues(); - - // Fetch and store the exception. - Value *Ex = Builder.CreateCall(FuncEHException, "eh_ptr"); - Builder.CreateStore(Ex, ExceptionValue); - - // Fetch and store the exception selector. - std::vector Args; - - // The exception and the personality function. - Args.push_back(Builder.CreateLoad(ExceptionValue, "eh_ptr")); - Args.push_back(CastToType(Instruction::BitCast, FuncCPPPersonality, - PointerType::get(Type::Int8Ty))); - - for (std::vector::reverse_iterator I = CurrentEHScopes.rbegin(), - E = CurrentEHScopes.rend(); I != E; ++I) { - if (I->CatchExpr) { - if (I->InfosType == Unknown) { - // Gather the type info and determine the catch type. - GatherTypeInfo(I->CatchExpr, I->TypeInfos); - I->InfosType = (TREE_CODE(I->CatchExpr) == STATEMENT_LIST && - !tsi_end_p(tsi_start(I->CatchExpr)) && - TREE_CODE(tsi_stmt(tsi_start(I->CatchExpr))) == - EH_FILTER_EXPR) ? FilterExpr : CatchList; - } - - if (I->InfosType == FilterExpr) - // Filter - note the size. - Args.push_back(ConstantInt::get(Type::Int32Ty, I->TypeInfos.size())); - - Args.reserve(Args.size() + I->TypeInfos.size()); - for (unsigned j = 0, N = I->TypeInfos.size(); j < N; ++j) - Args.push_back(I->TypeInfos[j]); - } - } - - Value *Select = Builder.CreateCall(FuncEHSelector, Args.begin(), Args.end(), - "eh_select"); - Builder.CreateStore(Select, ExceptionSelectorValue); -} - /// CreateExceptionValues - Create values used internally by exception handling. -/// void TreeToLLVM::CreateExceptionValues() { // Check to see if the exception values have been constructed. if (ExceptionValue) return; - + ExceptionValue = CreateTemporary(PointerType::get(Type::Int8Ty)); ExceptionValue->setName("eh_exception"); - + ExceptionSelectorValue = CreateTemporary(Type::Int32Ty); ExceptionSelectorValue->setName("eh_selector"); - + FuncEHException = Intrinsic::getDeclaration(TheModule, Intrinsic::eh_exception); FuncEHSelector = Intrinsic::getDeclaration(TheModule, Intrinsic::eh_selector); FuncEHGetTypeID = Intrinsic::getDeclaration(TheModule, Intrinsic::eh_typeid_for); - + FuncCPPPersonality = TheModule->getOrInsertFunction("__gxx_personality_v0", Type::getPrimitiveType(Type::VoidTyID), @@ -2150,343 +1878,237 @@ } +/// getLandingPad - Return the landing pad for the given exception handling +/// region, creating it if necessary. +BasicBlock *TreeToLLVM::getLandingPad(unsigned RegionNo) { + LandingPads.grow(RegionNo); + BasicBlock *&LandingPad = LandingPads[RegionNo]; -/// EmitProtectedCleanups - Wrap cleanups in a TRY_FILTER_EXPR that executes the -/// code specified by lang_protect_cleanup_actions if an exception is thrown. -void TreeToLLVM::EmitProtectedCleanups(tree cleanups) { - if (!lang_protect_cleanup_actions) { - Emit(cleanups, 0); - return; - } + if (!LandingPad) + LandingPad = new BasicBlock("lpad"); - if (CleanupFilter == NULL_TREE) { - // Create a catch-all filter that routes exceptions to the code specified - // by the lang_protect_cleanup_actions langhook. - // FIXME: the handler is supposed to be a "nothrow region". Support for - // this is blocked on support for nothrow functions. - tree filter = build2 (EH_FILTER_EXPR, void_type_node, NULL, NULL); - append_to_statement_list (lang_protect_cleanup_actions(), - &EH_FILTER_FAILURE (filter)); - // CleanupFilter is the filter wrapped in a STATEMENT_LIST. - append_to_statement_list (filter, &CleanupFilter); - } - - EmitTryInternal(cleanups, CleanupFilter, true); + return LandingPad; } +/// getPostPad - Return the post landing pad for the given exception handling +/// region, creating it if necessary. +BasicBlock *TreeToLLVM::getPostPad(unsigned RegionNo) { + PostPads.grow(RegionNo); + BasicBlock *&PostPad = PostPads[RegionNo]; + + if (!PostPad) + PostPad = new BasicBlock("ppad"); -/// EmitTRY_EXPR - Handle TRY_FINALLY_EXPR and TRY_CATCH_EXPR. -Value *TreeToLLVM::EmitTRY_EXPR(tree exp) { - return EmitTryInternal(TREE_OPERAND(exp, 0), TREE_OPERAND(exp, 1), - TREE_CODE(exp) == TRY_CATCH_EXPR); + return PostPad; } +/// AddHandler - Append the given region to a vector of exception handlers. +/// A callback passed to foreach_reachable_handler. +static void AddHandler (struct eh_region *region, void *data) { + ((std::vector *)data)->push_back(region); +} -/// EmitTryInternal - Handle TRY_FINALLY_EXPR and TRY_CATCH_EXPR given only the -/// expression operands. Done to avoid having EmitProtectedCleanups build a new -/// TRY_CATCH_EXPR for every cleanup block it wraps. -Value *TreeToLLVM::EmitTryInternal(tree inner, tree handler, bool isCatch) { - // The C++ front-end produces a lot of TRY_FINALLY_EXPR nodes that have empty - // try blocks. When these are seen, just emit the finally block directly for - // a small compile time speedup. - if (TREE_CODE(inner) == STATEMENT_LIST && tsi_end_p(tsi_start(inner))) { - if (isCatch) - return 0; // TRY_CATCH_EXPR with empty try block: nothing thrown. - - // TRY_FINALLY_EXPR - Just run the finally block. - assert(!isCatch); - EmitProtectedCleanups(handler); - return 0; - } +/// EmitLandingPads - Emit EH landing pads. +void TreeToLLVM::EmitLandingPads() { + std::vector Args; + std::vector Handlers; - // Remember that we are in this scope. - CurrentEHScopes.push_back(isCatch ? handler : NULL); - - Emit(inner, 0); - - assert(!isCatch || CurrentEHScopes.back().CatchExpr == handler - && "Scope imbalance!"); - - // Emit a new block for the fall-through of the finally block. - BasicBlock *FinallyBlock = new BasicBlock("finally"); - EmitBlock(FinallyBlock); - - // Get the basic blocks in the current scope. - std::vector BlocksInScope; - std::swap(CurrentEHScopes.back().Blocks, BlocksInScope); - - // Get the fixups in the current scope. - std::vector BranchFixups; - std::swap(CurrentEHScopes.back().BranchFixups, BranchFixups); - - // Remove the current scope. The state of the function is no longer in this - // scope. - CurrentEHScopes.pop_back(); - - // The finally fall-through block actually goes into the parent EH scope. We - // must emit things in this order so that EmitBlock can choose to nuke the - // previous block, and correctly nuke it from the nested scope. - if (!CurrentEHScopes.empty()) { - CurrentEHScopes.back().Blocks.push_back(FinallyBlock); - BlockEHScope[FinallyBlock] = CurrentEHScopes.size()-1; - } else { - BlockEHScope.erase(FinallyBlock); - } - - // The finally block is not in the inner scope, it's actually in the outer - // one. - assert(BlocksInScope.back() == FinallyBlock); - BlocksInScope.pop_back(); - - // Give the FinallyBlock back a temporary terminator instruction. - new UnreachableInst(FinallyBlock); - - // If the try block falls through (i.e. it doesn't end with a return), make - // sure to add a fixup on that edge if needed. If it falls through, EmitBlock - // would add a branch from the fall-through source to FinallyBlock, otherwise - // there will be no uses of it. - if (!FinallyBlock->use_empty()) { - BranchInst *BI = cast(FinallyBlock->use_back()); - assert(FinallyBlock->hasOneUse() && BI->isUnconditional() && - "Unexpected behavior for EmitBlock"); - // Add an extra branch fixup for the try fall-through. - BranchFixups.push_back(BranchFixup(BI, false)); - } - - // Loop over all of the fixups. If the fixup destination was in the current - // scope, then there is nothing to do and the fixup is done. Remove these. - for (unsigned i = 0, e = BranchFixups.size(); i != e; ++i) { - BasicBlock *DestBlock = BranchFixups[i].SrcBranch->getSuccessor(0); - std::map::iterator I = BlockEHScope.find(DestBlock); - if (I != BlockEHScope.end() && I->second == CurrentEHScopes.size()) { - BranchFixups[i] = BranchFixups.back(); - BranchFixups.pop_back(); - --i; --e; - continue; - } - - // If this is a TRY_CATCH expression and the fixup isn't for an exception - // edge, punt the fixup up to the parent scope. - if (isCatch && !BranchFixups[i].isExceptionEdge) { - // Add the fixup to the parent cleanup scope if there is one. - if (!CurrentEHScopes.empty()) - AddBranchFixup(BranchFixups[i].SrcBranch, false); - // Remove the fixup from this scope. - BranchFixups[i] = BranchFixups.back(); - BranchFixups.pop_back(); - --i; --e; - continue; - } - } - - // Otherwise, the branch is to some block outside of the scope, which requires - // us to emit a copy of the finally code into the codepath. - while (!BranchFixups.empty()) { - BranchInst *FixupBr = BranchFixups.back().SrcBranch; - bool FixupIsExceptionEdge = BranchFixups.back().isExceptionEdge; - BranchFixups.pop_back(); - - // Okay, the destination is in a parent to this scope, which means that the - // branch fixup corresponds to an exit from this region. Expand the cleanup - // code then patch it into the code sequence. - - // Add a basic block to emit the code into. - BasicBlock *CleanupBB = new BasicBlock("cleanup"); - EmitBlock(CleanupBB); - - // Provide exit point for cleanup code. - FinallyStack.push_back(FinallyBlock); - - // Emit the code. - if (isCatch) - switch (TREE_CODE (tsi_stmt (tsi_start (handler)))) { - case CATCH_EXPR: - case EH_FILTER_EXPR: - Emit(handler, 0); - break; - default: - // Wrap the handler in a filter, like for TRY_FINALLY_EXPR, since this - // is what tree-eh.c does. - EmitProtectedCleanups(handler); - break; - } - else - EmitProtectedCleanups(handler); + for (unsigned i = 1; i < LandingPads.size(); ++i) { + BasicBlock *LandingPad = LandingPads[i]; - // Clear exit point for cleanup code. - FinallyStack.pop_back(); + if (!LandingPad) + continue; - // Because we can emit the same cleanup in more than one context, we must - // strip off LLVM information from the decls in the code. Otherwise, we - // will try to insert the same label into multiple places in the code. - StripLLVMTranslation(handler); + CreateExceptionValues(); + EmitBlock(LandingPad); - // Catches will supply own terminator. - if (!Builder.GetInsertBlock()->getTerminator()) { - // Emit a branch to the new target. - BranchInst *BI = Builder.CreateBr(FixupBr->getSuccessor(0)); - - // The old branch now goes to the cleanup block. - FixupBr->setSuccessor(0, CleanupBB); - - // Fixup this new branch now. - FixupBr = BI; - - // Add the fixup to the next cleanup scope if there is one. - if (!CurrentEHScopes.empty()) - AddBranchFixup(FixupBr, FixupIsExceptionEdge); - } else { - // The old branch now goes to the cleanup block. - FixupBr->setSuccessor(0, CleanupBB); + // Fetch and store the exception. + Value *Ex = Builder.CreateCall(FuncEHException, "eh_ptr"); + Builder.CreateStore(Ex, ExceptionValue); + + // Fetch and store the exception selector. + + // The exception and the personality function. + Args.push_back(Builder.CreateLoad(ExceptionValue, "eh_ptr")); + Args.push_back(CastToType(Instruction::BitCast, FuncCPPPersonality, + PointerType::get(Type::Int8Ty))); + + // Add selections for each handler. + foreach_reachable_handler (i, false, AddHandler, &Handlers); + + for (std::vector::iterator I = Handlers.begin(), + E = Handlers.end(); I != E; ++I) { + struct eh_region *region = *I; + + // Create a post landing pad for the handler. + getPostPad(get_eh_region_number(region)); + + int RegionKind = classify_eh_handler(region); + if (RegionKind < 0) { + // Filter - note the length. + tree TypeList = get_eh_type_list(region); + unsigned Length = list_length(TypeList); + Args.reserve(Args.size() + Length + 1); + Args.push_back(ConstantInt::get(Type::Int32Ty, Length)); + + // Add the type infos. + for (; TypeList; TypeList = TREE_CHAIN(TypeList)) { + tree TType = lookup_type_for_runtime(TREE_VALUE(TypeList)); + Args.push_back(Emit(TType, 0)); + } + } else if (RegionKind > 0) { + // Catch. + tree TypeList = get_eh_type_list(region); + + if (!TypeList) { + // Catch-all - push a null pointer. + Args.push_back( + Constant::getNullValue(PointerType::get(Type::Int8Ty)) + ); + } else { + // Add the type infos. + for (; TypeList; TypeList = TREE_CHAIN(TypeList)) { + tree TType = lookup_type_for_runtime(TREE_VALUE(TypeList)); + Args.push_back(Emit(TType, 0)); + } + } + } } - } - // Move the finally block to the end of the function so we can continue - // emitting code into it. - Fn->getBasicBlockList().splice(Fn->end(), Fn->getBasicBlockList(), - FinallyBlock); - Builder.SetInsertPoint(FinallyBlock); - - // Now that all of the cleanup blocks have been expanded, remove the temporary - // terminator we put on the FinallyBlock. - assert(isa(FinallyBlock->getTerminator())); - FinallyBlock->getInstList().pop_back(); - - // Finally, remove the blocks in the scope from the BlockEHScope map. - for (unsigned i = 0, e = BlocksInScope.size(); i != e; ++i) { - bool Erased = BlockEHScope.erase(BlocksInScope[i]); - assert(Erased && "Block wasn't in map!"); + // Emit the selector call. + Value *Select = Builder.CreateCall(FuncEHSelector, Args.begin(), Args.end(), + "eh_select"); + Builder.CreateStore(Select, ExceptionSelectorValue); + + // Branch to the post landing pad for the first reachable handler. + assert(!Handlers.empty() && "Landing pad but no handler?"); + Builder.CreateBr(getPostPad(get_eh_region_number(*Handlers.begin()))); + + Handlers.clear(); + Args.clear(); } - return 0; } +/// EmitPostPads - Emit EH post landing pads. +void TreeToLLVM::EmitPostPads() { + std::vector Handlers; -/// EmitCATCH_EXPR - Handle CATCH_EXPR. -/// -Value *TreeToLLVM::EmitCATCH_EXPR(tree exp) { -#ifndef ITANIUM_STYLE_EXCEPTIONS - return 0; -#endif + for (unsigned i = 1; i < PostPads.size(); ++i) { + BasicBlock *PostPad = PostPads[i]; - // Make sure we have all the exception values in place. - CreateExceptionValues(); + if (!PostPad) + continue; - // Break out parts of catch. - tree Types = CATCH_TYPES(exp); - tree Body = CATCH_BODY(exp); - - // Destinations of the catch entry conditions. - BasicBlock *ThenBlock = 0; - BasicBlock *ElseBlock = 0; - - // FiXME - Determine last case so we don't need to emit test. - if (!Types) { - // Catch all - no testing required. - } else if (TREE_CODE(Types) != TREE_LIST) { - // Construct typeinfo object. Each call will produce a new expression - // even if duplicate. - tree TypeInfoNopExpr = (*lang_eh_runtime_type)(Types); - // Produce value. Duplicate typeinfo get folded here. - Value *TypeInfo = Emit(TypeInfoNopExpr, 0); - TypeInfo = BitCastToType(TypeInfo, PointerType::get(Type::Int8Ty)); - - // Call get eh type id. - Value *TypeID = Builder.CreateCall(FuncEHGetTypeID, TypeInfo, - "eh_typeid"); - Value *Select = Builder.CreateLoad(ExceptionSelectorValue, "tmp"); - - // Compare with the exception selector. - Value *Compare = Builder.CreateICmpEQ(Select, TypeID, "tmp"); - ThenBlock = new BasicBlock("eh_then"); - ElseBlock = new BasicBlock("eh_else"); - - // Branch on the compare. - Builder.CreateCondBr(Compare, ThenBlock, ElseBlock); - } else { - ThenBlock = new BasicBlock("eh_then"); - - for (; Types; Types = TREE_CHAIN (Types)) { - if (ElseBlock) EmitBlock(ElseBlock); - - // Construct typeinfo object. Each call will produce a new expression - // even if duplicate. - tree TypeInfoNopExpr = (*lang_eh_runtime_type)(TREE_VALUE(Types)); - // Produce value. Duplicate typeinfo get folded here. - Value *TypeInfo = Emit(TypeInfoNopExpr, 0); - TypeInfo = BitCastToType(TypeInfo, PointerType::get(Type::Int8Ty)); - - // Call get eh type id. - Value *TypeID = Builder.CreateCall(FuncEHGetTypeID, TypeInfo, - "eh_typeid"); + CreateExceptionValues(); + + EmitBlock(PostPad); + + struct eh_region *region = get_eh_region(i); + BasicBlock *Dest = getLabelDeclBlock(get_eh_region_tree_label(region)); + + int RegionKind = classify_eh_handler(region); + if (!RegionKind || !get_eh_type_list(region)) { + // Cleanup, catch-all or empty filter - no testing required. + Builder.CreateBr(Dest); + continue; + } else if (RegionKind < 0) { + // Filter - the result of a filter selection will be a negative index if + // there is a match. Value *Select = Builder.CreateLoad(ExceptionSelectorValue, "tmp"); - // Compare with the exception selector. - Value *Compare = Builder.CreateICmpEQ(Select, TypeID, "tmp"); - ElseBlock = new BasicBlock("eh_else"); - + // Compare with the filter action value. + Value *Zero = ConstantInt::get(Type::Int32Ty, 0); + Value *Compare = Builder.CreateICmpSLT(Select, Zero, "tmp"); + // Branch on the compare. - Builder.CreateCondBr(Compare, ThenBlock, ElseBlock); + BasicBlock *NoFilterBB = new BasicBlock("nofilter"); + Builder.CreateCondBr(Compare, Dest, NoFilterBB); + EmitBlock(NoFilterBB); + } else if (RegionKind > 0) { + // Catch + tree TypeList = get_eh_type_list(region); + + Value *Cond = NULL; + for (; TypeList; TypeList = TREE_CHAIN (TypeList)) { + Value *TType = Emit(lookup_type_for_runtime(TREE_VALUE(TypeList)), 0); + TType = BitCastToType(TType, PointerType::get(Type::Int8Ty)); + + // Call get eh type id. + Value *TypeID = Builder.CreateCall(FuncEHGetTypeID, TType, "eh_typeid"); + Value *Select = Builder.CreateLoad(ExceptionSelectorValue, "tmp"); + + // Compare with the exception selector. + Value *Compare = Builder.CreateICmpEQ(Select, TypeID, "tmp"); + + Cond = Cond ? Builder.CreateOr(Cond, Compare, "tmp") : Compare; + } + + BasicBlock *NoCatchBB = NULL; + + // If the comparion fails, branch to the next catch that has a + // post landing pad. + struct eh_region *next_catch = get_eh_next_catch(region); + for (; next_catch; next_catch = get_eh_next_catch(next_catch)) { + unsigned CatchNo = get_eh_region_number(next_catch); + + if (CatchNo < PostPads.size()) + NoCatchBB = PostPads[CatchNo]; + + if (NoCatchBB) + break; + } + + if (NoCatchBB) { + // Branch on the compare. + Builder.CreateCondBr(Cond, Dest, NoCatchBB); + continue; + } + + // If there is no such catch, execute a RESX if the comparison fails. + NoCatchBB = new BasicBlock("nocatch"); + // Branch on the compare. + Builder.CreateCondBr(Cond, Dest, NoCatchBB); + EmitBlock(NoCatchBB); } - } - - // Start the then block. - if (ThenBlock) EmitBlock(ThenBlock); - - // Emit the body. - Emit(Body, 0); - // Branch to the try exit. - assert(!FinallyStack.empty() && "Need an exit point"); - if (!Builder.GetInsertBlock()->getTerminator()) - Builder.CreateBr(FinallyStack.back()); + // Emit a RESX_EXPR which skips handlers with no post landing pad. + foreach_reachable_handler (i, true, AddHandler, &Handlers); - // Start the else block. - if (ElseBlock) EmitBlock(ElseBlock); - - return 0; -} + BasicBlock *TargetBB = NULL; -/// EmitEXC_PTR_EXPR - Handle EXC_PTR_EXPR. -/// -Value *TreeToLLVM::EmitEXC_PTR_EXPR(tree exp) { -#ifndef ITANIUM_STYLE_EXCEPTIONS - return 0; -#endif + for (std::vector::iterator I = Handlers.begin(), + E = Handlers.end(); I != E; ++I) { + unsigned UnwindNo = get_eh_region_number(*I); - // Load exception address. - CreateExceptionValues(); - return Builder.CreateLoad(ExceptionValue, "eh_value"); -} + if (UnwindNo < PostPads.size()) + TargetBB = PostPads[UnwindNo]; -/// EmitEH_FILTER_EXPR - Handle EH_FILTER_EXPR. -/// -Value *TreeToLLVM::EmitEH_FILTER_EXPR(tree exp) { -#ifndef ITANIUM_STYLE_EXCEPTIONS - return 0; -#endif + if (TargetBB) + break; + } - CreateExceptionValues(); + if (!TargetBB) { + if (!UnwindBB) + UnwindBB = new BasicBlock("Unwind"); + TargetBB = UnwindBB; + } - // The result of a filter landing pad will be a negative index if there is - // a match. - Value *Select = Builder.CreateLoad(ExceptionSelectorValue, "tmp"); - - // Compare with the filter action value. - Value *Zero = ConstantInt::get(Type::Int32Ty, 0); - Value *Compare = Builder.CreateICmpSLT(Select, Zero, "tmp"); - - // Branch on the compare. - BasicBlock *FilterBB = new BasicBlock("filter"); - BasicBlock *NoFilterBB = new BasicBlock("nofilter"); - Builder.CreateCondBr(Compare, FilterBB, NoFilterBB); + Builder.CreateBr(TargetBB); + Handlers.clear(); + } +} - EmitBlock(FilterBB); - Emit(EH_FILTER_FAILURE(exp), 0); - - EmitBlock(NoFilterBB); - - return 0; +/// EmitUnwindBlock - Emit the lazily created EH unwind block. +void TreeToLLVM::EmitUnwindBlock() { + if (UnwindBB) { + CreateExceptionValues(); + EmitBlock(UnwindBB); + // Fetch and store exception handler. + Value *Arg = Builder.CreateLoad(ExceptionValue, "eh_ptr"); + Builder.CreateCall(FuncUnwindResume, Arg); + Builder.CreateUnreachable(); + } } //===----------------------------------------------------------------------===// @@ -2748,24 +2370,34 @@ }; } - /// EmitCallOf - Emit a call to the specified callee with the operands specified /// in the CALL_EXP 'exp'. If the result of the call is a scalar, return the /// result, otherwise store it in DestLoc. Value *TreeToLLVM::EmitCallOf(Value *Callee, tree exp, Value *DestLoc) { // Determine if we need to generate an invoke instruction (instead of a simple // call) and if so, what the exception destination will be. - BasicBlock *UnwindBlock = 0; - - // Do not turn intrinsic calls or no-throw calls into invokes. - if ((!isa(Callee) || !cast(Callee)->getIntrinsicID()) && - // Turn calls that throw that are inside of a cleanup scope into invokes. - !CurrentEHScopes.empty() && tree_could_throw_p(exp)) { - if (UnwindBB == 0) - UnwindBB = new BasicBlock("Unwind"); - UnwindBlock = UnwindBB; + BasicBlock *LandingPad = 0; + bool NoUnwind = false; + // FIXME: set the nounwind attribute if NoUnwind. + + // Do not turn intrinsic calls into invokes. + if (!isa(Callee) || !cast(Callee)->getIntrinsicID()) { + // Do not turn no-throw calls into invokes; mark them as "nounwind". + NoUnwind = !tree_could_throw_p(exp); + + if (!NoUnwind) { + int RegionNo = lookup_stmt_eh_region(exp); + + if (RegionNo > 0) { + if (can_throw_internal_1(RegionNo, false)) + // Turn the call into an invoke. + LandingPad = getLandingPad(RegionNo); + else + NoUnwind = !can_throw_external_1(RegionNo, false); + } + } } - + SmallVector CallOperands; CallingConv::ID CallingConvention; FunctionCallArgumentConversion Client(exp, CallOperands, CallingConvention, @@ -2837,31 +2469,14 @@ } Value *Call; - if (!UnwindBlock) { + if (!LandingPad) { Call = Builder.CreateCall(Callee, CallOperands.begin(), CallOperands.end()); cast(Call)->setCallingConv(CallingConvention); } else { BasicBlock *NextBlock = new BasicBlock("invcont"); - Call = Builder.CreateInvoke(Callee, NextBlock, UnwindBlock, + Call = Builder.CreateInvoke(Callee, NextBlock, LandingPad, &CallOperands[0], CallOperands.size()); cast(Call)->setCallingConv(CallingConvention); - - // Lazily create an unwind block for this scope, which we can emit a fixup - // branch in. - if (CurrentEHScopes.back().UnwindBlock == 0) { - EmitBlock(CurrentEHScopes.back().UnwindBlock = new BasicBlock("unwind")); - -#ifdef ITANIUM_STYLE_EXCEPTIONS - // Add landing pad entry code. - AddLandingPad(); -#endif - // This branch to the unwind edge should have exception cleanups - // inserted onto it. - EmitBranchInternal(UnwindBlock, true); - } - - cast(Call)->setUnwindDest(CurrentEHScopes.back().UnwindBlock); - EmitBlock(NextBlock); } @@ -3103,6 +2718,7 @@ // This is an aggregate-to-scalar VIEW_CONVERT_EXPR, evaluate, then load. CreateTemporary(OpTy); + // Needs to be in sync with EmitLV. switch (TREE_CODE(Op)) { default: { Value *OpVal = Emit(Op, Target); @@ -3650,6 +3266,49 @@ } //===----------------------------------------------------------------------===// +// ... Exception Handling ... +//===----------------------------------------------------------------------===// + + +/// EmitEXC_PTR_EXPR - Handle EXC_PTR_EXPR. +Value *TreeToLLVM::EmitEXC_PTR_EXPR(tree exp) { + CreateExceptionValues(); + // Load exception address. + return Builder.CreateLoad(ExceptionValue, "eh_value"); +} + +/// EmitFILTER_EXPR - Handle FILTER_EXPR. +Value *TreeToLLVM::EmitFILTER_EXPR(tree exp) { + CreateExceptionValues(); + // Load exception selector. + return Builder.CreateLoad(ExceptionSelectorValue, "eh_select"); +} + +/// EmitRESX_EXPR - Handle RESX_EXPR. +Value *TreeToLLVM::EmitRESX_EXPR(tree exp) { + unsigned RegionNo = TREE_INT_CST_LOW(TREE_OPERAND (exp, 0)); + std::vector Handlers; + + foreach_reachable_handler (RegionNo, true, AddHandler, &Handlers); + + if (!Handlers.empty()) { + for (std::vector::iterator I = Handlers.begin(), + E = Handlers.end(); I != E; ++I) + // Create a post landing pad for the handler. + getPostPad(get_eh_region_number(*I)); + + Builder.CreateBr(getPostPad(get_eh_region_number(*Handlers.begin()))); + } else { + if (!UnwindBB) + UnwindBB = new BasicBlock("Unwind"); + Builder.CreateBr(UnwindBB); + } + + EmitBlock(new BasicBlock("")); + return 0; +} + +//===----------------------------------------------------------------------===// // ... Inline Assembly and Register Variables ... //===----------------------------------------------------------------------===// @@ -5482,42 +5141,14 @@ return LV; } -/// EmitLV_EXC_PTR_EXPR - Handle EXC_PTR_EXPR as lvalue. -/// LValue TreeToLLVM::EmitLV_EXC_PTR_EXPR(tree exp) { - const Type *Ty = ConvertType(TREE_TYPE(exp)); - -#ifdef ITANIUM_STYLE_EXCEPTIONS - // Create exception values. CreateExceptionValues(); - LValue LV = ExceptionValue; -#else - Value* Tmp = CreateTemporary(PointerType::get(Ty)); - Tmp->setName("dummy"); - LValue LV = Tmp; -#endif - - LV.Ptr = BitCastToType(LV.Ptr, PointerType::get(Ty)); - return LV; + return ExceptionValue; } -/// EmitLV_FILTER_EXPR - Handle FILTER_EXPR as lvalue. -/// LValue TreeToLLVM::EmitLV_FILTER_EXPR(tree exp) { - const Type *Ty = ConvertType(TREE_TYPE(exp)); - -#ifdef ITANIUM_STYLE_EXCEPTIONS - // Create exception values. CreateExceptionValues(); - LValue LV = ExceptionSelectorValue; -#else - Value* Tmp = CreateTemporary(PointerType::get(Ty)); - Tmp->setName("dummy"); - LValue LV = Tmp; -#endif - - LV.Ptr = BitCastToType(LV.Ptr, PointerType::get(Ty)); - return LV; + return ExceptionSelectorValue; } //===----------------------------------------------------------------------===// Modified: llvm-gcc-4.2/trunk/gcc/llvm-internal.h URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-internal.h?rev=41171&r1=41170&r2=41171&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-internal.h (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-internal.h Sun Aug 19 15:17:17 2007 @@ -33,6 +33,7 @@ #include #include #include "llvm/Intrinsics.h" +#include "llvm/ADT/IndexedMap.h" #include "llvm/ADT/SmallVector.h" #include "llvm/Support/DataTypes.h" #include "llvm/Support/LLVMBuilder.h" @@ -42,6 +43,10 @@ #include "llvm.h" } +/// Internal gcc structure describing an exception handling region. Declared +/// here to avoid including all of except.h. +struct eh_region; + namespace llvm { class Module; class GlobalVariable; @@ -237,6 +242,8 @@ bool isBitfield() const { return BitStart != 255; } }; +typedef IndexedMap RegionMapType; + /// TreeToLLVM - An instance of this class is created and used to convert the /// body of each function to LLVM. /// @@ -258,105 +265,36 @@ // and managed by CreateTemporary. Instruction *AllocaInsertionPoint; - //===-------------- Exception / Finally Block Handling ------------------===// - - struct BranchFixup { - /// SrcBranch - This is the unconditional branch instruction that we are - /// fixing up. The destination of the fixup is the dest of the uncond - /// branch. - BranchInst *SrcBranch; - - /// isExceptionEdge - True if this fixup is for an exception. If not for - /// an exception, cleanups that only apply to exceptions don't get emitted - /// for this fixup. - bool isExceptionEdge; - - BranchFixup(BranchInst *srcBranch, bool IsExceptionEdge) - : SrcBranch(srcBranch), isExceptionEdge(IsExceptionEdge) {} - }; - - enum CatchTypes { Unknown = 0, CatchList, FilterExpr }; - - /// EHScope - One of these scopes is maintained for each TRY_CATCH_EXPR and - /// TRY_FINALLY_EXPR blocks that we are currently in. - struct EHScope { - /// CatchExpr - Contains the cleanup code for a TRY_CATCH_EXPR, and NULL for - /// a TRY_FINALLY_EXPR. - tree_node *CatchExpr; - - /// UnwindBlock - A basic block in this scope that branches to the unwind - /// destination. This is lazily created by the first invoke in this scope. - BasicBlock *UnwindBlock; - - // The basic blocks that are directly in this region. - std::vector Blocks; - - /// BranchFixups - This is a list of fixups we need to process in this scope - /// or in a parent scope. - std::vector BranchFixups; - - /// InfosType - The nature of the type infos CatchExpr contains: a list of - /// CATCH_EXPR (-> CatchList) or an EH_FILTER_EXPR (-> FilterExpr). Equal - /// to Unknown if type info information has not yet been gathered. - CatchTypes InfosType; - - /// TypeInfos - The type infos corresponding to the catches or filter in - /// CatchExpr. If InfosType is Unknown then this information has not yet - /// been gathered. - std::vector TypeInfos; - - EHScope(tree_node *expr) : - CatchExpr(expr), UnwindBlock(0), InfosType(Unknown) {} - }; - - /// CurrentEHScopes - The current stack of exception scopes we are - /// maintaining. - std::vector CurrentEHScopes; - void dumpEHScopes() const; - - /// BlockEHScope - If a block is in an exception scope, it is added to the - /// list of blocks maintained by the scope and the scope number is added to - /// this map. - std::map BlockEHScope; - - /// CleanupFilter - Lazily created EH_FILTER_EXPR wrapped in a STATEMENT_LIST - /// used to catch exceptions thrown by the finally part of a TRY_FINALLY_EXPR. - /// The handler code is specified by the lang_protect_cleanup_actions langhook - /// (which returns a call to "terminate" in the case of C++). - tree_node *CleanupFilter; + //===---------------------- Exception Handling --------------------------===// + + /// LandingPads - The landing pad for a given EH region. + RegionMapType LandingPads; + + /// PostPads - The post landing pad for a given EH region. + RegionMapType PostPads; /// ExceptionValue - Is the local to receive the current exception. - /// Value *ExceptionValue; - + /// ExceptionSelectorValue - Is the local to receive the current exception /// selector. Value *ExceptionSelectorValue; - + /// FuncEHException - Function used to receive the exception. - /// Function *FuncEHException; - + /// FuncEHSelector - Function used to receive the exception selector. - /// Function *FuncEHSelector; - + /// FuncEHGetTypeID - Function used to return type id for give typeinfo. - /// Function *FuncEHGetTypeID; - + /// FuncCPPPersonality - Function handling c++ personality. - /// Value *FuncCPPPersonality; - + /// FuncUnwindResume - Function used to continue exception unwinding. - /// Value *FuncUnwindResume; - - /// FinallyStack - Stack for nested try exit points. - /// - std::vector FinallyStack; - + /// NumAddressTakenBlocks - Count the number of labels whose addresses are /// taken. uint64_t NumAddressTakenBlocks; @@ -453,8 +391,7 @@ void EmitStatement(tree_node *stmt); /// EmitBlock - Add the specified basic block to the end of the function. If - /// the previous block falls through into it, add an explicit branch. Also, - /// manage fixups for EH info. + /// the previous block falls through into it, add an explicit branch. void EmitBlock(BasicBlock *BB); /// EmitAggregateCopy - Copy the elements from SrcPtr to DestPtr, using the @@ -472,15 +409,29 @@ void EmitMemMove(Value *DestPtr, Value *SrcPtr, Value *Size, unsigned Align); void EmitMemSet(Value *DestPtr, Value *SrcVal, Value *Size, unsigned Align); - /// EmitBranchInternal - Emit an unconditional branch to the specified basic - /// block, running cleanups if the branch exits scopes. The argument specify - /// how to handle these cleanups. - void EmitBranchInternal(BasicBlock *Dest, bool IsExceptionEdge); - - /// AddBranchFixup - Add the specified unconditional branch to the fixup list - /// for the outermost exception scope, merging it if there is already a fixup - /// that works. - void AddBranchFixup(BranchInst *BI, bool isExceptionEdge); + /// EmitLandingPads - Emit EH landing pads. + void EmitLandingPads(); + + /// EmitPostPads - Emit EH post landing pads. + void EmitPostPads(); + + /// EmitUnwindBlock - Emit the lazily created EH unwind block. + void EmitUnwindBlock(); + +private: // Helpers for exception handling. + + /// CreateExceptionValues - Create values used internally by exception + /// handling. + void CreateExceptionValues(); + + /// getLandingPad - Return the landing pad for the given exception handling + /// region, creating it if necessary. + BasicBlock *getLandingPad(unsigned RegionNo); + + /// getPostPad - Return the post landing pad for the given exception handling + /// region, creating it if necessary. + BasicBlock *getPostPad(unsigned RegionNo); + private: void EmitAutomaticVariableDecl(tree_node *decl); @@ -494,17 +445,6 @@ void EmitAnnotateIntrinsic(Value *V, tree_node *decl); private: - /// GatherTypeInfo - Walk through the expression gathering all the - /// typeinfos that are used. - void GatherTypeInfo(tree_node *exp, std::vector &TypeInfos); - - /// AddLandingPad - Insert code to fetch and save the exception and exception - /// selector. - void AddLandingPad(); - - /// CreateExceptionValues - Create values used internally by exception handling. - /// - void CreateExceptionValues(); // Emit* - These are delegates from Emit, and have the same parameter // characteristics. @@ -513,20 +453,12 @@ Value *EmitBIND_EXPR(tree_node *exp, Value *DestLoc); Value *EmitSTATEMENT_LIST(tree_node *exp, Value *DestLoc); - // Helpers for exception handling. - void EmitProtectedCleanups(tree_node *cleanups); - Value *EmitTryInternal(tree_node *inner, tree_node *handler, bool isCatch); - // Control flow. Value *EmitLABEL_EXPR(tree_node *exp); Value *EmitGOTO_EXPR(tree_node *exp); Value *EmitRETURN_EXPR(tree_node *exp, Value *DestLoc); Value *EmitCOND_EXPR(tree_node *exp); Value *EmitSWITCH_EXPR(tree_node *exp); - Value *EmitTRY_EXPR(tree_node *exp); - Value *EmitCATCH_EXPR(tree_node *exp); - Value *EmitEXC_PTR_EXPR(tree_node *exp); - Value *EmitEH_FILTER_EXPR(tree_node *exp); // Expressions. void EmitINTEGER_CST_Aggregate(tree_node *exp, Value *DestLoc); @@ -559,6 +491,11 @@ Value *EmitCEIL_DIV_EXPR(tree_node *exp); Value *EmitROUND_DIV_EXPR(tree_node *exp); + // Exception Handling. + Value *EmitEXC_PTR_EXPR(tree_node *exp); + Value *EmitFILTER_EXPR(tree_node *exp); + Value *EmitRESX_EXPR(tree_node *exp); + // Inline Assembly and Register Variables. Value *EmitASM_EXPR(tree_node *exp); Value *EmitReadOfRegisterVariable(tree_node *vardecl, Value *DestLoc); From sabre at nondot.org Sun Aug 19 15:45:12 2007 From: sabre at nondot.org (Chris Lattner) Date: Sun, 19 Aug 2007 20:45:12 -0000 Subject: [llvm-commits] [llvm] r41172 - /llvm/trunk/autoconf/configure.ac Message-ID: <200708192045.l7JKjCeD031554@zion.cs.uiuc.edu> Author: lattner Date: Sun Aug 19 15:45:10 2007 New Revision: 41172 URL: http://llvm.org/viewvc/llvm-project?rev=41172&view=rev Log: add mips target to builder. I'd appreciate it if someone with the right version of autoconf could regenerate the configure script. Modified: llvm/trunk/autoconf/configure.ac Modified: llvm/trunk/autoconf/configure.ac URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/autoconf/configure.ac?rev=41172&r1=41171&r2=41172&view=diff ============================================================================== --- llvm/trunk/autoconf/configure.ac (original) +++ llvm/trunk/autoconf/configure.ac Sun Aug 19 15:45:10 2007 @@ -215,6 +215,7 @@ alpha*-*) llvm_cv_target_arch="Alpha" ;; ia64-*) llvm_cv_target_arch="IA64" ;; arm-*) llvm_cv_target_arch="ARM" ;; + mips-*) llvm_cv_target_arch="Mips" ;; *) llvm_cv_target_arch="Unknown" ;; esac]) @@ -312,6 +313,7 @@ Alpha) AC_SUBST(TARGET_HAS_JIT,1) ;; IA64) AC_SUBST(TARGET_HAS_JIT,0) ;; ARM) AC_SUBST(TARGET_HAS_JIT,0) ;; + Mips) AC_SUBST(TARGET_HAS_JIT,0) ;; *) AC_SUBST(TARGET_HAS_JIT,0) ;; esac fi @@ -361,7 +363,7 @@ [Build specific host targets: all,host-only,{target-name} (default=all)]),, enableval=all) case "$enableval" in - all) TARGETS_TO_BUILD="X86 Sparc PowerPC Alpha IA64 ARM" ;; + all) TARGETS_TO_BUILD="X86 Sparc PowerPC Alpha IA64 ARM Mips" ;; host-only) case "$llvm_cv_target_arch" in x86) TARGETS_TO_BUILD="X86" ;; @@ -371,6 +373,7 @@ Alpha) TARGETS_TO_BUILD="Alpha" ;; IA64) TARGETS_TO_BUILD="IA64" ;; ARM) TARGETS_TO_BUILD="ARM" ;; + Mips) TARGETS_TO_BUILD="Mips" ;; *) AC_MSG_ERROR([Can not set target to build]) ;; esac ;; @@ -383,6 +386,7 @@ alpha) TARGETS_TO_BUILD="Alpha $TARGETS_TO_BUILD" ;; ia64) TARGETS_TO_BUILD="IA64 $TARGETS_TO_BUILD" ;; arm) TARGETS_TO_BUILD="ARM $TARGETS_TO_BUILD" ;; + mips) TARGETS_TO_BUILD="Mips $TARGETS_TO_BUILD" ;; *) AC_MSG_ERROR([Unrecognized target $a_target]) ;; esac done From clattner at apple.com Sun Aug 19 15:56:19 2007 From: clattner at apple.com (Chris Lattner) Date: Sun, 19 Aug 2007 13:56:19 -0700 Subject: [llvm-commits] [llvm-gcc-4.2] r41171 - in /llvm-gcc-4.2/trunk/gcc: except.c except.h llvm-convert.cpp llvm-internal.h In-Reply-To: <200708192017.l7JKHKjY030288@zion.cs.uiuc.edu> References: <200708192017.l7JKHKjY030288@zion.cs.uiuc.edu> Message-ID: <26CB5A9A-13F5-4DAA-A766-2ADBDFDC3E17@apple.com> On Aug 19, 2007, at 1:17 PM, Duncan Sands wrote: > Exception handling rewrite - let gcc do the heavy > lifting. This patch strips out the existing LLVM > eh code, and replaces it with simpler code that > exploits gcc's eh machinery. It requires running > gcc's eh lowering pass (it was already being run > in gcc-4.2). Not only is the new code simpler, > it also handles more cases correctly (essentially > all of the gcc eh tests) and results in better > quality bytecode. In order to handle all of the > gcc tests correctly, some small tweaks need to be > made to the way LLVM handles the "nounwind" > attribute. I plan to take care of this later. Excellent! Can you elaborate on what the nounwind change is? Welcome back Duncan, -Chris From asl at math.spbu.ru Sun Aug 19 16:20:13 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Mon, 20 Aug 2007 01:20:13 +0400 Subject: [llvm-commits] [llvm-gcc-4.2] r41171 - in /llvm-gcc-4.2/trunk/gcc: except.c except.h llvm-convert.cpp llvm-internal.h In-Reply-To: <26CB5A9A-13F5-4DAA-A766-2ADBDFDC3E17.SS905SS@apple.com> References: <200708192017.l7JKHKjY030288@zion.cs.uiuc.edu> <26CB5A9A-13F5-4DAA-A766-2ADBDFDC3E17.SS905SS@apple.com> Message-ID: <1187558413.29311.16.camel@asl.dorms.spbu.ru> Hello, > Excellent! Can you elaborate on what the nounwind change is? Just to confirm: llvm-gcc-4.2 compiles and runs fine such EH-using packages as omnetpp and xalan (original versions, not SPEC ones). I'll be happy to test any other EH-using package as well, if somebody has good candidate. -- With best regards, Anton Korobeynikov. Faculty of Mathematics & Mechanics, Saint Petersburg State University. From sabre at nondot.org Sun Aug 19 17:15:27 2007 From: sabre at nondot.org (Chris Lattner) Date: Sun, 19 Aug 2007 22:15:27 -0000 Subject: [llvm-commits] [llvm] r41173 - /llvm/trunk/lib/VMCore/AsmWriter.cpp Message-ID: <200708192215.l7JMFRvb003381@zion.cs.uiuc.edu> Author: lattner Date: Sun Aug 19 17:15:26 2007 New Revision: 41173 URL: http://llvm.org/viewvc/llvm-project?rev=41173&view=rev Log: simplify code and print visibility for declarations. Modified: llvm/trunk/lib/VMCore/AsmWriter.cpp Modified: llvm/trunk/lib/VMCore/AsmWriter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/AsmWriter.cpp?rev=41173&r1=41172&r2=41173&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/AsmWriter.cpp (original) +++ llvm/trunk/lib/VMCore/AsmWriter.cpp Sun Aug 19 17:15:26 2007 @@ -995,32 +995,28 @@ if (AnnotationWriter) AnnotationWriter->emitFunctionAnnot(F, Out); if (F->isDeclaration()) - switch (F->getLinkage()) { - case GlobalValue::DLLImportLinkage: Out << "declare dllimport "; break; - case GlobalValue::ExternalWeakLinkage: Out << "declare extern_weak "; break; - default: Out << "declare "; - } - else { + Out << "declare "; + else Out << "define "; - switch (F->getLinkage()) { - case GlobalValue::InternalLinkage: Out << "internal "; break; - case GlobalValue::LinkOnceLinkage: Out << "linkonce "; break; - case GlobalValue::WeakLinkage: Out << "weak "; break; - case GlobalValue::AppendingLinkage: Out << "appending "; break; - case GlobalValue::DLLImportLinkage: Out << "dllimport "; break; - case GlobalValue::DLLExportLinkage: Out << "dllexport "; break; - case GlobalValue::ExternalWeakLinkage: Out << "extern_weak "; break; - case GlobalValue::ExternalLinkage: break; - case GlobalValue::GhostLinkage: - cerr << "GhostLinkage not allowed in AsmWriter!\n"; - abort(); - } - switch (F->getVisibility()) { - default: assert(0 && "Invalid visibility style!"); - case GlobalValue::DefaultVisibility: break; - case GlobalValue::HiddenVisibility: Out << "hidden "; break; - case GlobalValue::ProtectedVisibility: Out << "protected "; break; - } + + switch (F->getLinkage()) { + case GlobalValue::InternalLinkage: Out << "internal "; break; + case GlobalValue::LinkOnceLinkage: Out << "linkonce "; break; + case GlobalValue::WeakLinkage: Out << "weak "; break; + case GlobalValue::AppendingLinkage: Out << "appending "; break; + case GlobalValue::DLLImportLinkage: Out << "dllimport "; break; + case GlobalValue::DLLExportLinkage: Out << "dllexport "; break; + case GlobalValue::ExternalWeakLinkage: Out << "extern_weak "; break; + case GlobalValue::ExternalLinkage: break; + case GlobalValue::GhostLinkage: + cerr << "GhostLinkage not allowed in AsmWriter!\n"; + abort(); + } + switch (F->getVisibility()) { + default: assert(0 && "Invalid visibility style!"); + case GlobalValue::DefaultVisibility: break; + case GlobalValue::HiddenVisibility: Out << "hidden "; break; + case GlobalValue::ProtectedVisibility: Out << "protected "; break; } // Print the calling convention. From sabre at nondot.org Sun Aug 19 17:22:54 2007 From: sabre at nondot.org (Chris Lattner) Date: Sun, 19 Aug 2007 22:22:54 -0000 Subject: [llvm-commits] [llvm] r41174 - /llvm/trunk/lib/Linker/LinkModules.cpp Message-ID: <200708192222.l7JMMs4O003820@zion.cs.uiuc.edu> Author: lattner Date: Sun Aug 19 17:22:54 2007 New Revision: 41174 URL: http://llvm.org/viewvc/llvm-project?rev=41174&view=rev Log: Fix PR1611 - Visibility should be ignored for a declaration when a definition's visibility is different. Likewise, the visibility of two declarations mismatching is not an error. Modified: llvm/trunk/lib/Linker/LinkModules.cpp Modified: llvm/trunk/lib/Linker/LinkModules.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Linker/LinkModules.cpp?rev=41174&r1=41173&r2=41174&view=diff ============================================================================== --- llvm/trunk/lib/Linker/LinkModules.cpp (original) +++ llvm/trunk/lib/Linker/LinkModules.cpp Sun Aug 19 17:22:54 2007 @@ -440,8 +440,9 @@ // Check visibility if (Dest && Src->getVisibility() != Dest->getVisibility()) - return Error(Err, "Linking globals named '" + Src->getName() + - "': symbols have different visibilities!"); + if (!Src->isDeclaration() && !Dest->isDeclaration()) + return Error(Err, "Linking globals named '" + Src->getName() + + "': symbols have different visibilities!"); return false; } @@ -651,9 +652,13 @@ // Check visibility if (DF && !DF->hasInternalLinkage() && - SF->getVisibility() != DF->getVisibility()) - return Error(Err, "Linking functions named '" + SF->getName() + - "': symbols have different visibilities!"); + SF->getVisibility() != DF->getVisibility()) { + // If one is a prototype, ignore its visibility. Prototypes are always + // overridden by the definition. + if (!SF->isDeclaration() && !DF->isDeclaration()) + return Error(Err, "Linking functions named '" + SF->getName() + + "': symbols have different visibilities!"); + } if (DF && DF->getType() != SF->getType()) { if (DF->isDeclaration() && !SF->isDeclaration()) { @@ -695,7 +700,7 @@ } } else if (!DF || SF->hasInternalLinkage() || DF->hasInternalLinkage()) { // Function does not already exist, simply insert an function signature - // identical to SF into the dest module... + // identical to SF into the dest module. Function *NewDF = new Function(SF->getFunctionType(), SF->getLinkage(), SF->getName(), Dest); CopyGVAttributes(NewDF, SF); @@ -724,6 +729,8 @@ // Link the external functions, update linkage qualifiers ValueMap.insert(std::make_pair(SF, DF)); DF->setLinkage(SF->getLinkage()); + // Visibility of prototype is overridden by vis of definition. + DF->setVisibility(SF->getVisibility()); } else if (SF->hasWeakLinkage() || SF->hasLinkOnceLinkage()) { // At this point we know that DF has LinkOnce, Weak, or External* linkage. ValueMap.insert(std::make_pair(SF, DF)); From sabre at nondot.org Sun Aug 19 19:56:13 2007 From: sabre at nondot.org (Chris Lattner) Date: Mon, 20 Aug 2007 00:56:13 -0000 Subject: [llvm-commits] [llvm] r41175 - /llvm/trunk/Xcode/LLVM.xcodeproj/project.pbxproj Message-ID: <200708200056.l7K0uDBN009728@zion.cs.uiuc.edu> Author: lattner Date: Sun Aug 19 19:56:12 2007 New Revision: 41175 URL: http://llvm.org/viewvc/llvm-project?rev=41175&view=rev Log: update the xcode project file, patch by Gordon Henriksen Modified: llvm/trunk/Xcode/LLVM.xcodeproj/project.pbxproj Modified: llvm/trunk/Xcode/LLVM.xcodeproj/project.pbxproj URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/Xcode/LLVM.xcodeproj/project.pbxproj?rev=41175&r1=41174&r2=41175&view=diff ============================================================================== --- llvm/trunk/Xcode/LLVM.xcodeproj/project.pbxproj (original) +++ llvm/trunk/Xcode/LLVM.xcodeproj/project.pbxproj Sun Aug 19 19:56:12 2007 @@ -69,10 +69,128 @@ 84115FFF0B66D89B00E1293E /* PPCMachOWriterInfo.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = PPCMachOWriterInfo.cpp; sourceTree = ""; }; 841160000B66D8AC00E1293E /* PPCMachOWriterInfo.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = PPCMachOWriterInfo.h; sourceTree = ""; }; 8443EF210B66B62D00959964 /* TargetMachOWriterInfo.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = TargetMachOWriterInfo.h; sourceTree = ""; }; + 9F68EB010C77AD02004AA152 /* LoopPass.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = LoopPass.cpp; sourceTree = ""; }; + 9F68EB020C77AD02004AA152 /* MemoryDependenceAnalysis.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = MemoryDependenceAnalysis.cpp; sourceTree = ""; }; + 9F68EB060C77AD2C004AA152 /* BitcodeReader.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = BitcodeReader.cpp; sourceTree = ""; }; + 9F68EB070C77AD2C004AA152 /* BitcodeReader.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = BitcodeReader.h; sourceTree = ""; }; + 9F68EB120C77AD2C004AA152 /* BitcodeWriter.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = BitcodeWriter.cpp; sourceTree = ""; }; + 9F68EB130C77AD2C004AA152 /* BitcodeWriterPass.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = BitcodeWriterPass.cpp; sourceTree = ""; }; + 9F68EB250C77AD2C004AA152 /* ValueEnumerator.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = ValueEnumerator.cpp; sourceTree = ""; }; + 9F68EB260C77AD2C004AA152 /* ValueEnumerator.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = ValueEnumerator.h; sourceTree = ""; }; + 9F7793460C73BC2000551F9C /* CodeGenPrepare.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = CodeGenPrepare.cpp; sourceTree = ""; }; + 9F7793470C73BC2000551F9C /* GVN.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = GVN.cpp; sourceTree = ""; }; + 9F7793480C73BC2000551F9C /* GVNPRE.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = GVNPRE.cpp; sourceTree = ""; }; + 9F7793490C73BC2000551F9C /* LoopIndexSplit.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = LoopIndexSplit.cpp; sourceTree = ""; }; + 9F77934A0C73BC2000551F9C /* LoopRotation.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = LoopRotation.cpp; sourceTree = ""; }; + 9F77934B0C73BC2000551F9C /* RedundantLoadElimination.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = RedundantLoadElimination.cpp; sourceTree = ""; }; + 9F7793500C73BD1500551F9C /* ELFWriter.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = ELFWriter.h; sourceTree = ""; }; + 9F7793510C73BD1500551F9C /* IfConversion.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = IfConversion.cpp; sourceTree = ""; }; + 9F7793520C73BD1500551F9C /* LowerSubregs.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = LowerSubregs.cpp; sourceTree = ""; }; + 9F7793530C73BD1500551F9C /* MachOWriter.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = MachOWriter.h; sourceTree = ""; }; + 9F7793540C73BD1500551F9C /* PostRASchedulerList.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = PostRASchedulerList.cpp; sourceTree = ""; }; + 9F7793550C73BD1500551F9C /* RegAllocBigBlock.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = RegAllocBigBlock.cpp; sourceTree = ""; }; + 9F7793560C73BD1500551F9C /* RegisterScavenging.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = RegisterScavenging.cpp; sourceTree = ""; }; + 9F7793570C73BD1500551F9C /* SimpleRegisterCoalescing.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = SimpleRegisterCoalescing.cpp; sourceTree = ""; }; + 9F7793770C73C48A00551F9C /* StripDeadPrototypes.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = StripDeadPrototypes.cpp; sourceTree = ""; }; + 9F7793780C73C49A00551F9C /* BasicInliner.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = BasicInliner.cpp; sourceTree = ""; }; + 9F7793790C73C49A00551F9C /* CloneLoop.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = CloneLoop.cpp; sourceTree = ""; }; + 9F77937A0C73C49A00551F9C /* InlineCost.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = InlineCost.cpp; sourceTree = ""; }; + 9F77937B0C73C4F400551F9C /* AutoUpgrade.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; name = AutoUpgrade.cpp; path = ../lib/VMCore/AutoUpgrade.cpp; sourceTree = SOURCE_ROOT; }; + 9F77937C0C73C4F400551F9C /* ConstantFold.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; name = ConstantFold.cpp; path = ../lib/VMCore/ConstantFold.cpp; sourceTree = SOURCE_ROOT; }; + 9F77937D0C73C4F400551F9C /* ConstantFold.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; name = ConstantFold.h; path = ../lib/VMCore/ConstantFold.h; sourceTree = SOURCE_ROOT; }; + 9F77937E0C73C53000551F9C /* ParameterAttributes.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = ParameterAttributes.h; sourceTree = ""; }; + 9F7793800C73C54C00551F9C /* Archive.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = Archive.h; sourceTree = ""; }; + 9F7793810C73C54C00551F9C /* BitCodes.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = BitCodes.h; sourceTree = ""; }; + 9F7793820C73C54C00551F9C /* BitstreamReader.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = BitstreamReader.h; sourceTree = ""; }; + 9F7793830C73C54C00551F9C /* BitstreamWriter.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = BitstreamWriter.h; sourceTree = ""; }; + 9F7793840C73C54C00551F9C /* LLVMBitCodes.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = LLVMBitCodes.h; sourceTree = ""; }; + 9F7793850C73C54C00551F9C /* ReaderWriter.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = ReaderWriter.h; sourceTree = ""; }; + 9F7793860C73C57100551F9C /* CallingConvLower.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = CallingConvLower.h; sourceTree = ""; }; + 9F7793870C73C57100551F9C /* ELFRelocation.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = ELFRelocation.h; sourceTree = ""; }; + 9F7793880C73C57100551F9C /* FileWriters.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = FileWriters.h; sourceTree = ""; }; + 9F7793890C73C57100551F9C /* MachORelocation.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = MachORelocation.h; sourceTree = ""; }; + 9F77938A0C73C57100551F9C /* RegisterScavenging.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = RegisterScavenging.h; sourceTree = ""; }; + 9F77938B0C73C57100551F9C /* SimpleRegisterCoalescing.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = SimpleRegisterCoalescing.h; sourceTree = ""; }; + 9F7794140C73CB6100551F9C /* Mips.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = Mips.h; sourceTree = ""; }; + 9F7794150C73CB6100551F9C /* Mips.td */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = text; path = Mips.td; sourceTree = ""; }; + 9F7794160C73CB6100551F9C /* MipsAsmPrinter.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = MipsAsmPrinter.cpp; sourceTree = ""; }; + 9F7794170C73CB6100551F9C /* MipsCallingConv.td */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = text; path = MipsCallingConv.td; sourceTree = ""; }; + 9F7794180C73CB6100551F9C /* MipsInstrFormats.td */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = text; path = MipsInstrFormats.td; sourceTree = ""; }; + 9F7794190C73CB6100551F9C /* MipsInstrInfo.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = MipsInstrInfo.cpp; sourceTree = ""; }; + 9F77941A0C73CB6100551F9C /* MipsInstrInfo.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = MipsInstrInfo.h; sourceTree = ""; }; + 9F77941B0C73CB6100551F9C /* MipsInstrInfo.td */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = text; path = MipsInstrInfo.td; sourceTree = ""; }; + 9F77941C0C73CB6100551F9C /* MipsISelDAGToDAG.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = MipsISelDAGToDAG.cpp; sourceTree = ""; }; + 9F77941D0C73CB6100551F9C /* MipsISelLowering.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = MipsISelLowering.cpp; sourceTree = ""; }; + 9F77941E0C73CB6100551F9C /* MipsISelLowering.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = MipsISelLowering.h; sourceTree = ""; }; + 9F77941F0C73CB6100551F9C /* MipsMachineFunction.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = MipsMachineFunction.h; sourceTree = ""; }; + 9F7794200C73CB6100551F9C /* MipsRegisterInfo.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = MipsRegisterInfo.cpp; sourceTree = ""; }; + 9F7794210C73CB6100551F9C /* MipsRegisterInfo.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = MipsRegisterInfo.h; sourceTree = ""; }; + 9F7794220C73CB6100551F9C /* MipsRegisterInfo.td */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = text; path = MipsRegisterInfo.td; sourceTree = ""; }; + 9F7794230C73CB6100551F9C /* MipsSubtarget.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = MipsSubtarget.cpp; sourceTree = ""; }; + 9F7794240C73CB6100551F9C /* MipsSubtarget.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = MipsSubtarget.h; sourceTree = ""; }; + 9F7794250C73CB6100551F9C /* MipsTargetAsmInfo.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = MipsTargetAsmInfo.cpp; sourceTree = ""; }; + 9F7794260C73CB6100551F9C /* MipsTargetAsmInfo.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = MipsTargetAsmInfo.h; sourceTree = ""; }; + 9F7794270C73CB6100551F9C /* MipsTargetMachine.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = MipsTargetMachine.cpp; sourceTree = ""; }; + 9F7794280C73CB6100551F9C /* MipsTargetMachine.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = MipsTargetMachine.h; sourceTree = ""; }; + 9F77942F0C73CB7900551F9C /* MSILWriter.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = MSILWriter.cpp; sourceTree = ""; }; + 9F7794300C73CB7900551F9C /* MSILWriter.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = MSILWriter.h; sourceTree = ""; }; + 9F7794870C73D51000551F9C /* LLVMBuilder.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = LLVMBuilder.h; sourceTree = ""; }; + 9F7794880C73D51000551F9C /* MemoryBuffer.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = MemoryBuffer.h; sourceTree = ""; }; + 9F7794890C73D51000551F9C /* Streams.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = Streams.h; sourceTree = ""; }; + 9FA638D90C77B184007F12AE /* AutoUpgrade.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = AutoUpgrade.h; sourceTree = ""; }; + 9FA638DA0C77B184007F12AE /* GlobalAlias.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = GlobalAlias.h; sourceTree = ""; }; + 9FA638DB0C77B1AB007F12AE /* APInt.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = APInt.h; sourceTree = ""; }; + 9FA638DC0C77B1AB007F12AE /* APSInt.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = APSInt.h; sourceTree = ""; }; + 9FA638DD0C77B1AB007F12AE /* BitVector.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = BitVector.h; sourceTree = ""; }; + 9FA638E00C77B1AB007F12AE /* IndexedMap.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = IndexedMap.h; sourceTree = ""; }; + 9FA638E20C77B1AB007F12AE /* SmallPtrSet.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = SmallPtrSet.h; sourceTree = ""; }; + 9FA638E30C77B1AB007F12AE /* SmallSet.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = SmallSet.h; sourceTree = ""; }; + 9FA638E40C77B1AB007F12AE /* StringMap.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = StringMap.h; sourceTree = ""; }; + 9FA638E50C77B203007F12AE /* LoopPass.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = LoopPass.h; sourceTree = ""; }; + 9FA638E60C77B203007F12AE /* MemoryDependenceAnalysis.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = MemoryDependenceAnalysis.h; sourceTree = ""; }; + 9FA638E70C77B222007F12AE /* Disassembler.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = Disassembler.h; sourceTree = ""; }; + 9FA638E80C77B231007F12AE /* TargetELFWriterInfo.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = TargetELFWriterInfo.h; sourceTree = ""; }; + 9FA638EA0C77B252007F12AE /* InlinerPass.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = InlinerPass.h; sourceTree = ""; }; + 9FA638EB0C77B26B007F12AE /* BasicInliner.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = BasicInliner.h; sourceTree = ""; }; + 9FA638EC0C77B26B007F12AE /* InlineCost.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = InlineCost.h; sourceTree = ""; }; + 9FE4508B0C77A77000C4FEA4 /* ARMCodeEmitter.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = ARMCodeEmitter.cpp; sourceTree = ""; }; + 9FE4508C0C77A77000C4FEA4 /* ARMGenAsmWriter.inc */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.pascal; path = ARMGenAsmWriter.inc; sourceTree = ""; }; + 9FE4508D0C77A77000C4FEA4 /* ARMGenDAGISel.inc */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.pascal; path = ARMGenDAGISel.inc; sourceTree = ""; }; + 9FE4508E0C77A77100C4FEA4 /* ARMGenInstrInfo.inc */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.pascal; path = ARMGenInstrInfo.inc; sourceTree = ""; }; + 9FE4508F0C77A77100C4FEA4 /* ARMGenInstrNames.inc */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.pascal; path = ARMGenInstrNames.inc; sourceTree = ""; }; + 9FE450900C77A77100C4FEA4 /* ARMGenRegisterInfo.h.inc */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.pascal; path = ARMGenRegisterInfo.h.inc; sourceTree = ""; }; + 9FE450910C77A77100C4FEA4 /* ARMGenRegisterInfo.inc */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.pascal; path = ARMGenRegisterInfo.inc; sourceTree = ""; }; + 9FE450920C77A77100C4FEA4 /* ARMGenRegisterNames.inc */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.pascal; path = ARMGenRegisterNames.inc; sourceTree = ""; }; + 9FE450930C77A77100C4FEA4 /* ARMGenSubtarget.inc */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.pascal; path = ARMGenSubtarget.inc; sourceTree = ""; }; + 9FE450940C77A77100C4FEA4 /* ARMJITInfo.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = ARMJITInfo.cpp; sourceTree = ""; }; + 9FE450950C77A77100C4FEA4 /* ARMJITInfo.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = ARMJITInfo.h; sourceTree = ""; }; + 9FE450960C77A77100C4FEA4 /* ARMRelocations.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = ARMRelocations.h; sourceTree = ""; }; + 9FE450970C77A77100C4FEA4 /* README-Thumb.txt */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = text; path = "README-Thumb.txt"; sourceTree = ""; }; + 9FE450980C77A77100C4FEA4 /* README.txt */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = text; path = README.txt; sourceTree = ""; }; + 9FE4509A0C77A79C00C4FEA4 /* PPCCallingConv.td */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = text; path = PPCCallingConv.td; sourceTree = ""; }; + 9FE4509B0C77A79C00C4FEA4 /* PPCGenCallingConv.inc */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.pascal; path = PPCGenCallingConv.inc; sourceTree = ""; }; + 9FE4509C0C77A7BC00C4FEA4 /* README-MMX.txt */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = text; path = "README-MMX.txt"; sourceTree = ""; }; + 9FE4509D0C77A7BC00C4FEA4 /* X86CallingConv.td */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = text; path = X86CallingConv.td; sourceTree = ""; }; + 9FE4509E0C77A7BC00C4FEA4 /* X86CodeEmitter.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = X86CodeEmitter.h; sourceTree = ""; }; + 9FE4509F0C77A7BC00C4FEA4 /* X86ELFWriterInfo.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = X86ELFWriterInfo.cpp; sourceTree = ""; }; + 9FE450A00C77A7BC00C4FEA4 /* X86ELFWriterInfo.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = X86ELFWriterInfo.h; sourceTree = ""; }; + 9FE450A10C77A7BC00C4FEA4 /* X86GenCallingConv.inc */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.pascal; path = X86GenCallingConv.inc; sourceTree = ""; }; + 9FE450A20C77A7BC00C4FEA4 /* X86InstrFormats.td */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = text; path = X86InstrFormats.td; sourceTree = ""; }; + 9FE450A50C77AAF000C4FEA4 /* Disassembler.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = Disassembler.cpp; sourceTree = ""; }; + 9FE450A60C77AB3200C4FEA4 /* APInt.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = APInt.cpp; sourceTree = ""; }; + 9FE450A70C77AB3200C4FEA4 /* ConstantRange.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = ConstantRange.cpp; sourceTree = ""; }; + 9FE450A80C77AB3200C4FEA4 /* MemoryBuffer.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = MemoryBuffer.cpp; sourceTree = ""; }; + 9FE450A90C77AB3200C4FEA4 /* SmallPtrSet.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = SmallPtrSet.cpp; sourceTree = ""; }; + 9FE450AA0C77AB3200C4FEA4 /* StringMap.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = StringMap.cpp; sourceTree = ""; }; + 9FE450AB0C77AB6100C4FEA4 /* README.txt */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = text; path = README.txt; sourceTree = ""; }; + 9FE450AC0C77AB6E00C4FEA4 /* CallingConvLower.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = CallingConvLower.cpp; sourceTree = ""; }; + 9FE450DF0C77ABE400C4FEA4 /* Archive.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = Archive.cpp; sourceTree = ""; }; + 9FE450E00C77ABE400C4FEA4 /* ArchiveInternals.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = ArchiveInternals.h; sourceTree = ""; }; + 9FE450E10C77ABE400C4FEA4 /* ArchiveReader.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = ArchiveReader.cpp; sourceTree = ""; }; + 9FE450E20C77ABE400C4FEA4 /* ArchiveWriter.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = ArchiveWriter.cpp; sourceTree = ""; }; CF1ACC9709C9DE4400D3C5EB /* IntrinsicInst.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; name = IntrinsicInst.cpp; path = ../lib/VMCore/IntrinsicInst.cpp; sourceTree = ""; }; CF26835B09178F5500C5F253 /* TargetInstrItineraries.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = TargetInstrItineraries.h; sourceTree = ""; }; CF32AF5C0AEE6A4E00D24CD4 /* LLVMTargetMachine.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = LLVMTargetMachine.cpp; sourceTree = ""; }; - CF33BE150AF62B4200E93805 /* CStringMap.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = CStringMap.h; sourceTree = ""; }; CF33BE160AF62B4200E93805 /* SmallString.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = SmallString.h; sourceTree = ""; }; CF341DAD0AB07A8B0099B064 /* AlphaTargetAsmInfo.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = AlphaTargetAsmInfo.h; sourceTree = ""; }; CF341DAE0AB07A8B0099B064 /* AlphaTargetAsmInfo.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = AlphaTargetAsmInfo.cpp; sourceTree = ""; }; @@ -131,7 +249,6 @@ CF73C0A3098A4FDF00627152 /* TypeSymbolTable.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = TypeSymbolTable.h; sourceTree = ""; }; CF73C0A4098A4FDF00627152 /* ValueSymbolTable.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = ValueSymbolTable.h; sourceTree = ""; }; CF73C0A5098A507300627152 /* ConstantFolding.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = ConstantFolding.h; sourceTree = ""; }; - CF73C0A6098A507300627152 /* ET-Forest.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = "ET-Forest.h"; sourceTree = ""; }; CF73C0A9098A50FD00627152 /* config.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = config.h; sourceTree = ""; }; CF73C0AD098A519400627152 /* DataTypes.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = DataTypes.h; sourceTree = ""; }; CF73C0AE098A51AD00627152 /* Alarm.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = Alarm.h; sourceTree = ""; }; @@ -158,7 +275,6 @@ CF8F1B470B64F74400BB4199 /* OutputBuffer.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = OutputBuffer.h; sourceTree = ""; }; CF8F1B490B64F7AB00BB4199 /* LinkTimeOptimizer.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = LinkTimeOptimizer.h; sourceTree = ""; }; CF8F1B4D0B64F80700BB4199 /* AliasDebugger.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = AliasDebugger.cpp; sourceTree = ""; }; - CF8F1B4E0B64F86A00BB4199 /* CStringMap.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = CStringMap.cpp; sourceTree = ""; }; CF8F1B500B64F86A00BB4199 /* ManagedStatic.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = ManagedStatic.cpp; sourceTree = ""; }; CF8F1B510B64F86A00BB4199 /* Streams.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = Streams.cpp; sourceTree = ""; }; CF8F1B530B64F8C000BB4199 /* IncludeFile.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = IncludeFile.cpp; sourceTree = ""; }; @@ -213,13 +329,11 @@ CF8F1BE90B64FC8A00BB4199 /* ARMTargetAsmInfo.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = ARMTargetAsmInfo.h; sourceTree = ""; }; CF8F1BEA0B64FC8A00BB4199 /* ARMTargetMachine.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = ARMTargetMachine.cpp; sourceTree = ""; }; CF8F1BEB0B64FC8A00BB4199 /* ARMTargetMachine.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = ARMTargetMachine.h; sourceTree = ""; }; - CF9720240A9F3969002CEEDD /* MachOWriter.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = MachOWriter.h; sourceTree = ""; }; CF9720260A9F39B9002CEEDD /* LinkAllPasses.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = LinkAllPasses.h; sourceTree = ""; }; CF9720270A9F39B9002CEEDD /* LinkTimeOptimizer.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = LinkTimeOptimizer.h; sourceTree = ""; }; CF9720340A9F3A41002CEEDD /* IncludeFile.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = IncludeFile.h; sourceTree = ""; }; CF9720350A9F3ADC002CEEDD /* MachOWriter.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = MachOWriter.cpp; sourceTree = ""; }; CF9720370A9F3B1C002CEEDD /* TargetLowering.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = TargetLowering.cpp; sourceTree = ""; }; - CF9720890A9F3C04002CEEDD /* PPCMachOWriter.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = PPCMachOWriter.cpp; sourceTree = ""; }; CF97208A0A9F3C6F002CEEDD /* LCSSA.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = LCSSA.cpp; sourceTree = ""; }; CF97208B0A9F3C6F002CEEDD /* LowerAllocations.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = LowerAllocations.cpp; sourceTree = ""; }; CF97208C0A9F3C6F002CEEDD /* LowerInvoke.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = LowerInvoke.cpp; sourceTree = ""; }; @@ -302,13 +416,11 @@ CFE420FF0A66F67300AB4BF6 /* IntrinsicsPowerPC.td */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = text; path = IntrinsicsPowerPC.td; sourceTree = ""; }; CFE421000A66F67300AB4BF6 /* IntrinsicsX86.td */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = text; path = IntrinsicsX86.td; sourceTree = ""; }; CFE421010A66F67300AB4BF6 /* LinkAllVMCore.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = LinkAllVMCore.h; sourceTree = ""; }; - CFE421040A66F7AB00AB4BF6 /* ConstantRange.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = ConstantRange.cpp; sourceTree = ""; }; CFE421060A66F86D00AB4BF6 /* ScheduleDAGRRList.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = ScheduleDAGRRList.cpp; sourceTree = ""; }; CFE421070A66F8DC00AB4BF6 /* GraphWriter.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = GraphWriter.cpp; sourceTree = ""; }; CFE421090A66F93300AB4BF6 /* Alarm.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = Alarm.cpp; sourceTree = ""; }; CFE4210A0A66F93300AB4BF6 /* Alarm.inc */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.pascal; path = Alarm.inc; sourceTree = ""; }; CFE4210B0A66F96400AB4BF6 /* AlphaSchedule.td */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = text; path = AlphaSchedule.td; sourceTree = ""; }; - CFE421130A66FA2D00AB4BF6 /* LICENSE.TXT */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = text; path = LICENSE.TXT; sourceTree = ""; }; CFE421140A66FA2D00AB4BF6 /* PPC.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = PPC.h; sourceTree = ""; }; CFE421150A66FA2D00AB4BF6 /* PPC.td */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = text; path = PPC.td; sourceTree = ""; }; CFE421160A66FA2D00AB4BF6 /* PPCAsmPrinter.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = PPCAsmPrinter.cpp; sourceTree = ""; }; @@ -362,8 +474,6 @@ DE4DA066091148520012D44B /* SubtargetEmitter.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; name = SubtargetEmitter.h; path = ../utils/TableGen/SubtargetEmitter.h; sourceTree = SOURCE_ROOT; }; DE66EC5B08ABE86900323D32 /* AsmWriter.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; name = AsmWriter.cpp; path = ../lib/VMCore/AsmWriter.cpp; sourceTree = SOURCE_ROOT; }; DE66EC5C08ABE86A00323D32 /* BasicBlock.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; name = BasicBlock.cpp; path = ../lib/VMCore/BasicBlock.cpp; sourceTree = SOURCE_ROOT; }; - DE66EC5D08ABE86A00323D32 /* ConstantFolding.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; name = ConstantFolding.cpp; path = ../lib/VMCore/ConstantFolding.cpp; sourceTree = SOURCE_ROOT; }; - DE66EC5E08ABE86A00323D32 /* ConstantFolding.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; name = ConstantFolding.h; path = ../lib/VMCore/ConstantFolding.h; sourceTree = SOURCE_ROOT; }; DE66EC6008ABE86A00323D32 /* Constants.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; name = Constants.cpp; path = ../lib/VMCore/Constants.cpp; sourceTree = SOURCE_ROOT; }; DE66EC6108ABE86A00323D32 /* Dominators.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; name = Dominators.cpp; path = ../lib/VMCore/Dominators.cpp; sourceTree = SOURCE_ROOT; }; DE66EC6208ABE86A00323D32 /* Function.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; name = Function.cpp; path = ../lib/VMCore/Function.cpp; sourceTree = SOURCE_ROOT; }; @@ -375,7 +485,6 @@ DE66EC6808ABE86A00323D32 /* Module.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; name = Module.cpp; path = ../lib/VMCore/Module.cpp; sourceTree = SOURCE_ROOT; }; DE66EC6908ABE86A00323D32 /* ModuleProvider.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; name = ModuleProvider.cpp; path = ../lib/VMCore/ModuleProvider.cpp; sourceTree = SOURCE_ROOT; }; DE66EC6A08ABE86A00323D32 /* Pass.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; name = Pass.cpp; path = ../lib/VMCore/Pass.cpp; sourceTree = SOURCE_ROOT; }; - DE66EC6C08ABE86A00323D32 /* SymbolTable.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; name = SymbolTable.cpp; path = ../lib/VMCore/SymbolTable.cpp; sourceTree = SOURCE_ROOT; }; DE66EC6D08ABE86A00323D32 /* SymbolTableListTraitsImpl.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; name = SymbolTableListTraitsImpl.h; path = ../lib/VMCore/SymbolTableListTraitsImpl.h; sourceTree = SOURCE_ROOT; }; DE66EC6E08ABE86A00323D32 /* Type.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; name = Type.cpp; path = ../lib/VMCore/Type.cpp; sourceTree = SOURCE_ROOT; }; DE66EC6F08ABE86A00323D32 /* Value.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; name = Value.cpp; path = ../lib/VMCore/Value.cpp; sourceTree = SOURCE_ROOT; }; @@ -384,18 +493,6 @@ DE66EC8E08ABEAF000323D32 /* llvmAsmParser.y */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.yacc; name = llvmAsmParser.y; path = ../lib/AsmParser/llvmAsmParser.y; sourceTree = SOURCE_ROOT; }; DE66EC8F08ABEAF000323D32 /* Parser.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; name = Parser.cpp; path = ../lib/AsmParser/Parser.cpp; sourceTree = SOURCE_ROOT; }; DE66EC9008ABEAF000323D32 /* ParserInternals.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; name = ParserInternals.h; path = ../lib/AsmParser/ParserInternals.h; sourceTree = SOURCE_ROOT; }; - DE66EC9408ABEB3900323D32 /* Analyzer.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = Analyzer.cpp; sourceTree = ""; }; - DE66EC9E08ABEB3900323D32 /* Reader.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = Reader.cpp; sourceTree = ""; }; - DE66EC9F08ABEB3900323D32 /* Reader.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = Reader.h; sourceTree = ""; }; - DE66ECA008ABEB3900323D32 /* ReaderWrappers.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = ReaderWrappers.cpp; sourceTree = ""; }; - DE66ECA208ABEB8000323D32 /* Archive.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = Archive.cpp; sourceTree = ""; }; - DE66ECA308ABEB8000323D32 /* ArchiveInternals.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = ArchiveInternals.h; sourceTree = ""; }; - DE66ECA408ABEB8000323D32 /* ArchiveReader.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = ArchiveReader.cpp; sourceTree = ""; }; - DE66ECA508ABEB8000323D32 /* ArchiveWriter.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = ArchiveWriter.cpp; sourceTree = ""; }; - DE66ECB708ABEB8000323D32 /* SlotCalculator.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = SlotCalculator.cpp; sourceTree = ""; }; - DE66ECB808ABEB8000323D32 /* SlotCalculator.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = SlotCalculator.h; sourceTree = ""; }; - DE66ECBA08ABEB8000323D32 /* Writer.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = Writer.cpp; sourceTree = ""; }; - DE66ECBB08ABEB8000323D32 /* WriterInternals.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = WriterInternals.h; sourceTree = ""; }; DE66ECBE08ABEC0700323D32 /* AliasAnalysis.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = AliasAnalysis.cpp; sourceTree = ""; }; DE66ECBF08ABEC0700323D32 /* AliasAnalysisCounter.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = AliasAnalysisCounter.cpp; sourceTree = ""; }; DE66ECC008ABEC0700323D32 /* AliasAnalysisEvaluator.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = AliasAnalysisEvaluator.cpp; sourceTree = ""; }; @@ -469,22 +566,7 @@ DE66EDF808ABEDD300323D32 /* LinkItems.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = LinkItems.cpp; sourceTree = ""; }; DE66EDF908ABEDD300323D32 /* LinkModules.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = LinkModules.cpp; sourceTree = ""; }; DE66EDFC08ABEDE600323D32 /* Annotation.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = Annotation.cpp; sourceTree = ""; }; - DE66EDFE08ABEDE600323D32 /* blocksort.c */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.c; path = blocksort.c; sourceTree = ""; }; - DE66EDFF08ABEDE600323D32 /* bzlib.c */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.c; path = bzlib.c; sourceTree = ""; }; - DE66EE0008ABEDE600323D32 /* bzlib.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = bzlib.h; sourceTree = ""; }; - DE66EE0108ABEDE600323D32 /* bzlib_private.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = bzlib_private.h; sourceTree = ""; }; - DE66EE0208ABEDE600323D32 /* CHANGES */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = text; path = CHANGES; sourceTree = ""; }; - DE66EE0308ABEDE600323D32 /* compress.c */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.c; path = compress.c; sourceTree = ""; }; - DE66EE0408ABEDE600323D32 /* crctable.c */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.c; path = crctable.c; sourceTree = ""; }; - DE66EE1508ABEDE600323D32 /* decompress.c */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.c; path = decompress.c; sourceTree = ""; }; - DE66EE1608ABEDE600323D32 /* huffman.c */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.c; path = huffman.c; sourceTree = ""; }; - DE66EE1708ABEDE600323D32 /* LICENSE */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = text; path = LICENSE; sourceTree = ""; }; - DE66EE1908ABEDE600323D32 /* randtable.c */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.c; path = randtable.c; sourceTree = ""; }; - DE66EE1A08ABEDE600323D32 /* README */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = text; path = README; sourceTree = ""; }; - DE66EE1B08ABEDE600323D32 /* README.COMPILATION.PROBLEMS */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = text; path = README.COMPILATION.PROBLEMS; sourceTree = ""; }; - DE66EE1C08ABEDE600323D32 /* Y2K_INFO */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = text; path = Y2K_INFO; sourceTree = ""; }; DE66EE1D08ABEDE600323D32 /* CommandLine.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = CommandLine.cpp; sourceTree = ""; }; - DE66EE1E08ABEDE600323D32 /* Compressor.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = Compressor.cpp; sourceTree = ""; }; DE66EE3D08ABEDE600323D32 /* Debug.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = Debug.cpp; sourceTree = ""; }; DE66EE3E08ABEDE600323D32 /* FileUtilities.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = FileUtilities.cpp; sourceTree = ""; }; DE66EE3F08ABEDE600323D32 /* IsInf.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = IsInf.cpp; sourceTree = ""; }; @@ -576,7 +658,6 @@ DE66F0C008ABEE6000323D32 /* X86ATTAsmPrinter.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = X86ATTAsmPrinter.cpp; sourceTree = ""; }; DE66F0C108ABEE6000323D32 /* X86ATTAsmPrinter.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = X86ATTAsmPrinter.h; sourceTree = ""; }; DE66F0C208ABEE6000323D32 /* X86CodeEmitter.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = X86CodeEmitter.cpp; sourceTree = ""; }; - DE66F0C308ABEE6000323D32 /* X86ELFWriter.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = X86ELFWriter.cpp; sourceTree = ""; }; DE66F0C408ABEE6000323D32 /* X86FloatingPoint.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = X86FloatingPoint.cpp; sourceTree = ""; }; DE66F0CC08ABEE6000323D32 /* X86InstrBuilder.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = X86InstrBuilder.h; sourceTree = ""; }; DE66F0CD08ABEE6000323D32 /* X86InstrInfo.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = X86InstrInfo.cpp; sourceTree = ""; }; @@ -594,23 +675,18 @@ DE66F0DD08ABEE6100323D32 /* X86Subtarget.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = X86Subtarget.h; sourceTree = ""; }; DE66F0DE08ABEE6100323D32 /* X86TargetMachine.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = X86TargetMachine.cpp; sourceTree = ""; }; DE66F0DF08ABEE6100323D32 /* X86TargetMachine.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = X86TargetMachine.h; sourceTree = ""; }; - DE66F0EA08ABEFB300323D32 /* ExprTypeConvert.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = ExprTypeConvert.cpp; sourceTree = ""; }; DE66F0EF08ABEFB300323D32 /* BlockProfiling.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = BlockProfiling.cpp; sourceTree = ""; }; DE66F0FE08ABEFB300323D32 /* EdgeProfiling.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = EdgeProfiling.cpp; sourceTree = ""; }; - DE66F0FF08ABEFB300323D32 /* EmitFunctions.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = EmitFunctions.cpp; sourceTree = ""; }; DE66F11B08ABEFB300323D32 /* ProfilingUtils.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = ProfilingUtils.cpp; sourceTree = ""; }; DE66F11C08ABEFB300323D32 /* ProfilingUtils.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = ProfilingUtils.h; sourceTree = ""; }; - DE66F11D08ABEFB300323D32 /* TraceBasicBlocks.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = TraceBasicBlocks.cpp; sourceTree = ""; }; DE66F12008ABEFB300323D32 /* ArgumentPromotion.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = ArgumentPromotion.cpp; sourceTree = ""; }; DE66F12108ABEFB300323D32 /* ConstantMerge.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = ConstantMerge.cpp; sourceTree = ""; }; DE66F12208ABEFB300323D32 /* DeadArgumentElimination.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = DeadArgumentElimination.cpp; sourceTree = ""; }; DE66F12308ABEFB300323D32 /* DeadTypeElimination.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = DeadTypeElimination.cpp; sourceTree = ""; }; DE66F14A08ABEFB400323D32 /* ExtractFunction.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = ExtractFunction.cpp; sourceTree = ""; }; - DE66F14B08ABEFB400323D32 /* FunctionResolution.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = FunctionResolution.cpp; sourceTree = ""; }; DE66F14C08ABEFB400323D32 /* GlobalDCE.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = GlobalDCE.cpp; sourceTree = ""; }; DE66F14D08ABEFB400323D32 /* GlobalOpt.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = GlobalOpt.cpp; sourceTree = ""; }; DE66F14E08ABEFB400323D32 /* Inliner.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = Inliner.cpp; sourceTree = ""; }; - DE66F14F08ABEFB400323D32 /* Inliner.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = Inliner.h; sourceTree = ""; }; DE66F15008ABEFB400323D32 /* InlineSimple.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = InlineSimple.cpp; sourceTree = ""; }; DE66F15108ABEFB400323D32 /* Internalize.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = Internalize.cpp; sourceTree = ""; }; DE66F15208ABEFB400323D32 /* IPConstantPropagation.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = IPConstantPropagation.cpp; sourceTree = ""; }; @@ -620,7 +696,6 @@ DE66F15708ABEFB400323D32 /* RaiseAllocations.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = RaiseAllocations.cpp; sourceTree = ""; }; DE66F15808ABEFB400323D32 /* SimplifyLibCalls.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = SimplifyLibCalls.cpp; sourceTree = ""; }; DE66F15908ABEFB400323D32 /* StripSymbols.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = StripSymbols.cpp; sourceTree = ""; }; - DE66F15A08ABEFB400323D32 /* LevelRaise.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = LevelRaise.cpp; sourceTree = ""; }; DE66F15E08ABEFB400323D32 /* ADCE.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = ADCE.cpp; sourceTree = ""; }; DE66F15F08ABEFB400323D32 /* BasicBlockPlacement.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = BasicBlockPlacement.cpp; sourceTree = ""; }; DE66F16008ABEFB400323D32 /* CondPropagate.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = CondPropagate.cpp; sourceTree = ""; }; @@ -643,8 +718,6 @@ DE66F1B808ABEFB400323D32 /* SimplifyCFG.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = SimplifyCFG.cpp; sourceTree = ""; }; DE66F1B908ABEFB400323D32 /* TailDuplication.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = TailDuplication.cpp; sourceTree = ""; }; DE66F1BA08ABEFB400323D32 /* TailRecursionElimination.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = TailRecursionElimination.cpp; sourceTree = ""; }; - DE66F1BB08ABEFB400323D32 /* TransformInternals.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = TransformInternals.cpp; sourceTree = ""; }; - DE66F1BC08ABEFB400323D32 /* TransformInternals.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = TransformInternals.h; sourceTree = ""; }; DE66F1BE08ABEFB400323D32 /* BasicBlockUtils.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = BasicBlockUtils.cpp; sourceTree = ""; }; DE66F1BF08ABEFB400323D32 /* BreakCriticalEdges.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = BreakCriticalEdges.cpp; sourceTree = ""; }; DE66F1C008ABEFB400323D32 /* CloneFunction.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = CloneFunction.cpp; sourceTree = ""; }; @@ -660,7 +733,6 @@ DE66F1E708ABEFB400323D32 /* ValueMapper.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = ValueMapper.cpp; sourceTree = ""; }; DE66F1E808ABEFB400323D32 /* ValueMapper.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = ValueMapper.h; sourceTree = ""; }; DE66F1EA08ABF03100323D32 /* AbstractTypeUser.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = AbstractTypeUser.h; sourceTree = ""; }; - DE66F1ED08ABF03100323D32 /* BitSetVector.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = BitSetVector.h; sourceTree = ""; }; DE66F1EE08ABF03100323D32 /* DenseMap.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = DenseMap.h; sourceTree = ""; }; DE66F1EF08ABF03100323D32 /* DepthFirstIterator.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = DepthFirstIterator.h; sourceTree = ""; }; DE66F1F008ABF03100323D32 /* EquivalenceClasses.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = EquivalenceClasses.h; sourceTree = ""; }; @@ -708,18 +780,9 @@ DE66F22808ABF03100323D32 /* PrintModulePass.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = PrintModulePass.h; sourceTree = ""; }; DE66F22908ABF03100323D32 /* Writer.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = Writer.h; sourceTree = ""; }; DE66F22A08ABF03100323D32 /* BasicBlock.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = BasicBlock.h; sourceTree = ""; }; - DE66F22C08ABF03100323D32 /* Analyzer.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = Analyzer.h; sourceTree = ""; }; - DE66F22D08ABF03100323D32 /* Archive.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = Archive.h; sourceTree = ""; }; - DE66F22E08ABF03100323D32 /* BytecodeHandler.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = BytecodeHandler.h; sourceTree = ""; }; - DE66F22F08ABF03100323D32 /* Format.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = Format.h; sourceTree = ""; }; - DE66F23008ABF03100323D32 /* Reader.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = Reader.h; sourceTree = ""; }; - DE66F23108ABF03100323D32 /* WriteBytecodePass.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = WriteBytecodePass.h; sourceTree = ""; }; - DE66F23208ABF03100323D32 /* Writer.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = Writer.h; sourceTree = ""; }; DE66F23308ABF03100323D32 /* CallGraphSCCPass.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = CallGraphSCCPass.h; sourceTree = ""; }; DE66F23408ABF03100323D32 /* CallingConv.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = CallingConv.h; sourceTree = ""; }; DE66F23608ABF03100323D32 /* AsmPrinter.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = AsmPrinter.h; sourceTree = ""; }; - DE66F23708ABF03100323D32 /* ELFWriter.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = ELFWriter.h; sourceTree = ""; }; - DE66F23808ABF03100323D32 /* InstrScheduling.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = InstrScheduling.h; sourceTree = ""; }; DE66F23908ABF03100323D32 /* IntrinsicLowering.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = IntrinsicLowering.h; sourceTree = ""; }; DE66F23A08ABF03100323D32 /* LiveVariables.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = LiveVariables.h; sourceTree = ""; }; DE66F23B08ABF03100323D32 /* MachineBasicBlock.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = MachineBasicBlock.h; sourceTree = ""; }; @@ -773,7 +836,6 @@ DE66F27308ABF03200323D32 /* Casting.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = Casting.h; sourceTree = ""; }; DE66F27408ABF03200323D32 /* CFG.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = CFG.h; sourceTree = ""; }; DE66F27508ABF03200323D32 /* CommandLine.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = CommandLine.h; sourceTree = ""; }; - DE66F27608ABF03200323D32 /* Compressor.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = Compressor.h; sourceTree = ""; }; DE66F27708ABF03200323D32 /* ConstantRange.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = ConstantRange.h; sourceTree = ""; }; DE66F27908ABF03200323D32 /* DataTypes.h.in */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = text; path = DataTypes.h.in; sourceTree = ""; }; DE66F27A08ABF03200323D32 /* Debug.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = Debug.h; sourceTree = ""; }; @@ -798,7 +860,6 @@ DE66F28E08ABF03200323D32 /* Timer.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = Timer.h; sourceTree = ""; }; DE66F29008ABF03200323D32 /* type_traits.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = type_traits.h; sourceTree = ""; }; DE66F29108ABF03200323D32 /* TypeInfo.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = TypeInfo.h; sourceTree = ""; }; - DE66F29208ABF03200323D32 /* SymbolTable.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = SymbolTable.h; sourceTree = ""; }; DE66F29308ABF03200323D32 /* SymbolTableListTraits.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = SymbolTableListTraits.h; sourceTree = ""; }; DE66F29508ABF03200323D32 /* DynamicLibrary.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = DynamicLibrary.h; sourceTree = ""; }; DE66F29608ABF03200323D32 /* LICENSE.TXT */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = text; path = LICENSE.TXT; sourceTree = ""; }; @@ -843,10 +904,6 @@ DE66F2E608ABF14400323D32 /* Miscompilation.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = Miscompilation.cpp; sourceTree = ""; }; DE66F2E708ABF14400323D32 /* OptimizerDriver.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = OptimizerDriver.cpp; sourceTree = ""; }; DE66F2E808ABF14400323D32 /* TestPasses.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = TestPasses.cpp; sourceTree = ""; }; - DE66F2EE08ABF14400323D32 /* gccas.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; name = gccas.cpp; path = gccas/gccas.cpp; sourceTree = ""; }; - DE66F2F708ABF14400323D32 /* gccld.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = gccld.cpp; sourceTree = ""; }; - DE66F2F808ABF14400323D32 /* gccld.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = gccld.h; sourceTree = ""; }; - DE66F2F908ABF14400323D32 /* GenerateCode.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = GenerateCode.cpp; sourceTree = ""; }; DE66F30008ABF14400323D32 /* llc.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; name = llc.cpp; path = llc/llc.cpp; sourceTree = ""; }; DE66F30708ABF14400323D32 /* lli.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; name = lli.cpp; path = lli/lli.cpp; sourceTree = ""; }; DE66F30E08ABF14400323D32 /* llvm-ar.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; name = "llvm-ar.cpp"; path = "llvm-ar/llvm-ar.cpp"; sourceTree = ""; }; @@ -878,13 +935,10 @@ DE66F38C08ABF35300323D32 /* CREDITS.TXT */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = text; name = CREDITS.TXT; path = ../CREDITS.TXT; sourceTree = SOURCE_ROOT; }; DE66F38F08ABF35C00323D32 /* AliasAnalysis.html */ = {isa = PBXFileReference; explicitFileType = text.html.documentation; fileEncoding = 30; path = AliasAnalysis.html; sourceTree = ""; }; DE66F39008ABF35C00323D32 /* Bugpoint.html */ = {isa = PBXFileReference; explicitFileType = text.html.documentation; fileEncoding = 30; path = Bugpoint.html; sourceTree = ""; }; - DE66F39108ABF35C00323D32 /* BytecodeFormat.html */ = {isa = PBXFileReference; explicitFileType = text.html.documentation; fileEncoding = 30; path = BytecodeFormat.html; sourceTree = ""; }; DE66F39208ABF35C00323D32 /* CFEBuildInstrs.html */ = {isa = PBXFileReference; explicitFileType = text.html.documentation; fileEncoding = 30; path = CFEBuildInstrs.html; sourceTree = ""; }; DE66F39308ABF35C00323D32 /* CodeGenerator.html */ = {isa = PBXFileReference; explicitFileType = text.html.documentation; fileEncoding = 30; path = CodeGenerator.html; sourceTree = ""; }; DE66F39408ABF35C00323D32 /* CodingStandards.html */ = {isa = PBXFileReference; explicitFileType = text.html.documentation; fileEncoding = 30; path = CodingStandards.html; sourceTree = ""; }; DE66F39808ABF35C00323D32 /* bugpoint.pod */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = text; path = bugpoint.pod; sourceTree = ""; }; - DE66F39908ABF35C00323D32 /* gccas.pod */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = text; path = gccas.pod; sourceTree = ""; }; - DE66F39A08ABF35C00323D32 /* gccld.pod */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = text; path = gccld.pod; sourceTree = ""; }; DE66F39E08ABF35C00323D32 /* index.html */ = {isa = PBXFileReference; explicitFileType = text.html.documentation; fileEncoding = 30; path = index.html; sourceTree = ""; }; DE66F39F08ABF35C00323D32 /* llc.pod */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = text; path = llc.pod; sourceTree = ""; }; DE66F3A008ABF35C00323D32 /* lli.pod */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = text; path = lli.pod; sourceTree = ""; }; @@ -941,7 +995,6 @@ DE66F3FA08ABF35D00323D32 /* UsingLibraries.html */ = {isa = PBXFileReference; explicitFileType = text.html.documentation; fileEncoding = 30; path = UsingLibraries.html; sourceTree = ""; }; DE66F3FB08ABF35D00323D32 /* WritingAnLLVMBackend.html */ = {isa = PBXFileReference; explicitFileType = text.html.documentation; fileEncoding = 30; path = WritingAnLLVMBackend.html; sourceTree = ""; }; DE66F3FC08ABF35D00323D32 /* WritingAnLLVMPass.html */ = {isa = PBXFileReference; explicitFileType = text.html.documentation; fileEncoding = 30; path = WritingAnLLVMPass.html; sourceTree = ""; }; - DE66F3FF08ABF37000323D32 /* BFtoLLVM.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; name = BFtoLLVM.cpp; path = BFtoLLVM/BFtoLLVM.cpp; sourceTree = ""; }; DE66F40E08ABF37000323D32 /* fibonacci.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; name = fibonacci.cpp; path = Fibonacci/fibonacci.cpp; sourceTree = ""; }; DE66F41508ABF37000323D32 /* HowToUseJIT.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; name = HowToUseJIT.cpp; path = HowToUseJIT/HowToUseJIT.cpp; sourceTree = ""; }; DE66F41E08ABF37000323D32 /* ModuleMaker.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; name = ModuleMaker.cpp; path = ModuleMaker/ModuleMaker.cpp; sourceTree = ""; }; @@ -981,8 +1034,9 @@ DE66F1E908ABF03100323D32 /* include/llvm */, CF8F1B480B64F7AB00BB4199 /* llvm-c */, DE66ECBD08ABEC0700323D32 /* lib/Analysis */, + 9FE450DE0C77ABE400C4FEA4 /* lib/Archive */, DE66EC8808ABEAC900323D32 /* lib/AsmParser */, - DE66ECBC08ABEB8E00323D32 /* lib/Bytecode */, + 9F68EB030C77AD2C004AA152 /* lib/Bitcode */, DE66ED3E08ABEC2A00323D32 /* lib/CodeGen */, DE66ED9A08ABEC7200323D32 /* lib/Debugger */, DE66EDBF08ABEC8F00323D32 /* lib/ExecutionEngine */, @@ -1003,6 +1057,106 @@ name = LLVM; sourceTree = ""; }; + 9F68EB030C77AD2C004AA152 /* lib/Bitcode */ = { + isa = PBXGroup; + children = ( + 9F68EB050C77AD2C004AA152 /* Reader */, + 9F68EB110C77AD2C004AA152 /* Writer */, + ); + name = lib/Bitcode; + path = ../lib/Bitcode; + sourceTree = SOURCE_ROOT; + }; + 9F68EB050C77AD2C004AA152 /* Reader */ = { + isa = PBXGroup; + children = ( + 9F68EB060C77AD2C004AA152 /* BitcodeReader.cpp */, + 9F68EB070C77AD2C004AA152 /* BitcodeReader.h */, + ); + path = Reader; + sourceTree = ""; + }; + 9F68EB110C77AD2C004AA152 /* Writer */ = { + isa = PBXGroup; + children = ( + 9F68EB120C77AD2C004AA152 /* BitcodeWriter.cpp */, + 9F68EB130C77AD2C004AA152 /* BitcodeWriterPass.cpp */, + 9F68EB250C77AD2C004AA152 /* ValueEnumerator.cpp */, + 9F68EB260C77AD2C004AA152 /* ValueEnumerator.h */, + ); + path = Writer; + sourceTree = ""; + }; + 9F77937F0C73C54C00551F9C /* Bitcode */ = { + isa = PBXGroup; + children = ( + 9F7793800C73C54C00551F9C /* Archive.h */, + 9F7793810C73C54C00551F9C /* BitCodes.h */, + 9F7793820C73C54C00551F9C /* BitstreamReader.h */, + 9F7793830C73C54C00551F9C /* BitstreamWriter.h */, + 9F7793840C73C54C00551F9C /* LLVMBitCodes.h */, + 9F7793850C73C54C00551F9C /* ReaderWriter.h */, + ); + path = Bitcode; + sourceTree = ""; + }; + 9F7794120C73CB6100551F9C /* Mips */ = { + isa = PBXGroup; + children = ( + 9F7794140C73CB6100551F9C /* Mips.h */, + 9F7794150C73CB6100551F9C /* Mips.td */, + 9F7794160C73CB6100551F9C /* MipsAsmPrinter.cpp */, + 9F7794170C73CB6100551F9C /* MipsCallingConv.td */, + 9F7794180C73CB6100551F9C /* MipsInstrFormats.td */, + 9F7794190C73CB6100551F9C /* MipsInstrInfo.cpp */, + 9F77941A0C73CB6100551F9C /* MipsInstrInfo.h */, + 9F77941B0C73CB6100551F9C /* MipsInstrInfo.td */, + 9F77941C0C73CB6100551F9C /* MipsISelDAGToDAG.cpp */, + 9F77941D0C73CB6100551F9C /* MipsISelLowering.cpp */, + 9F77941E0C73CB6100551F9C /* MipsISelLowering.h */, + 9F77941F0C73CB6100551F9C /* MipsMachineFunction.h */, + 9F7794200C73CB6100551F9C /* MipsRegisterInfo.cpp */, + 9F7794210C73CB6100551F9C /* MipsRegisterInfo.h */, + 9F7794220C73CB6100551F9C /* MipsRegisterInfo.td */, + 9F7794230C73CB6100551F9C /* MipsSubtarget.cpp */, + 9F7794240C73CB6100551F9C /* MipsSubtarget.h */, + 9F7794250C73CB6100551F9C /* MipsTargetAsmInfo.cpp */, + 9F7794260C73CB6100551F9C /* MipsTargetAsmInfo.h */, + 9F7794270C73CB6100551F9C /* MipsTargetMachine.cpp */, + 9F7794280C73CB6100551F9C /* MipsTargetMachine.h */, + ); + path = Mips; + sourceTree = ""; + }; + 9F7794290C73CB7900551F9C /* MSIL */ = { + isa = PBXGroup; + children = ( + 9F77942F0C73CB7900551F9C /* MSILWriter.cpp */, + 9F7794300C73CB7900551F9C /* MSILWriter.h */, + ); + path = MSIL; + sourceTree = ""; + }; + 9FA638E90C77B252007F12AE /* IPO */ = { + isa = PBXGroup; + children = ( + 9FA638EA0C77B252007F12AE /* InlinerPass.h */, + ); + path = IPO; + sourceTree = ""; + }; + 9FE450DE0C77ABE400C4FEA4 /* lib/Archive */ = { + isa = PBXGroup; + children = ( + 9FE450DF0C77ABE400C4FEA4 /* Archive.cpp */, + 9FE450E00C77ABE400C4FEA4 /* ArchiveInternals.h */, + 9FE450E10C77ABE400C4FEA4 /* ArchiveReader.cpp */, + 9FE450E20C77ABE400C4FEA4 /* ArchiveWriter.cpp */, + ); + name = lib/Archive; + path = ../lib/Archive; + sourceTree = SOURCE_ROOT; + }; CF8F1B480B64F7AB00BB4199 /* llvm-c */ = { isa = PBXGroup; children = ( @@ -1056,6 +1210,20 @@ CF8F1BCF0B64FC8A00BB4199 /* ARM */ = { isa = PBXGroup; children = ( + 9FE4508B0C77A77000C4FEA4 /* ARMCodeEmitter.cpp */, + 9FE4508C0C77A77000C4FEA4 /* ARMGenAsmWriter.inc */, + 9FE4508D0C77A77000C4FEA4 /* ARMGenDAGISel.inc */, + 9FE4508E0C77A77100C4FEA4 /* ARMGenInstrInfo.inc */, + 9FE4508F0C77A77100C4FEA4 /* ARMGenInstrNames.inc */, + 9FE450900C77A77100C4FEA4 /* ARMGenRegisterInfo.h.inc */, + 9FE450910C77A77100C4FEA4 /* ARMGenRegisterInfo.inc */, + 9FE450920C77A77100C4FEA4 /* ARMGenRegisterNames.inc */, + 9FE450930C77A77100C4FEA4 /* ARMGenSubtarget.inc */, + 9FE450940C77A77100C4FEA4 /* ARMJITInfo.cpp */, + 9FE450950C77A77100C4FEA4 /* ARMJITInfo.h */, + 9FE450960C77A77100C4FEA4 /* ARMRelocations.h */, + 9FE450970C77A77100C4FEA4 /* README-Thumb.txt */, + 9FE450980C77A77100C4FEA4 /* README.txt */, CF8F1BD10B64FC8A00BB4199 /* ARM.h */, CF8F1BD20B64FC8A00BB4199 /* ARM.td */, CF8F1BD30B64FC8A00BB4199 /* ARMAddressingModes.h */, @@ -1110,9 +1278,10 @@ isa = PBXGroup; children = ( DE66EC5B08ABE86900323D32 /* AsmWriter.cpp */, + 9F77937B0C73C4F400551F9C /* AutoUpgrade.cpp */, DE66EC5C08ABE86A00323D32 /* BasicBlock.cpp */, - DE66EC5D08ABE86A00323D32 /* ConstantFolding.cpp */, - DE66EC5E08ABE86A00323D32 /* ConstantFolding.h */, + 9F77937C0C73C4F400551F9C /* ConstantFold.cpp */, + 9F77937D0C73C4F400551F9C /* ConstantFold.h */, DE66EC6008ABE86A00323D32 /* Constants.cpp */, DE66EC6108ABE86A00323D32 /* Dominators.cpp */, DE66EC6208ABE86A00323D32 /* Function.cpp */, @@ -1127,7 +1296,6 @@ DE66EC6908ABE86A00323D32 /* ModuleProvider.cpp */, DE66EC6A08ABE86A00323D32 /* Pass.cpp */, CF8F1B5C0B64FA7300BB4199 /* PassManager.cpp */, - DE66EC6C08ABE86A00323D32 /* SymbolTable.cpp */, DE66EC6D08ABE86A00323D32 /* SymbolTableListTraitsImpl.h */, DE66EC6E08ABE86A00323D32 /* Type.cpp */, CF73C0BE098A551F00627152 /* TypeSymbolTable.cpp */, @@ -1150,55 +1318,11 @@ name = lib/AsmParser; sourceTree = ""; }; - DE66EC9308ABEB3900323D32 /* Reader */ = { - isa = PBXGroup; - children = ( - DE66EC9408ABEB3900323D32 /* Analyzer.cpp */, - DE66EC9E08ABEB3900323D32 /* Reader.cpp */, - DE66EC9F08ABEB3900323D32 /* Reader.h */, - DE66ECA008ABEB3900323D32 /* ReaderWrappers.cpp */, - ); - name = Reader; - path = ../lib/Bytecode/Reader; - sourceTree = SOURCE_ROOT; - }; - DE66ECA108ABEB8000323D32 /* Archive */ = { - isa = PBXGroup; - children = ( - DE66ECA208ABEB8000323D32 /* Archive.cpp */, - DE66ECA308ABEB8000323D32 /* ArchiveInternals.h */, - DE66ECA408ABEB8000323D32 /* ArchiveReader.cpp */, - DE66ECA508ABEB8000323D32 /* ArchiveWriter.cpp */, - ); - name = Archive; - path = ../lib/Bytecode/Archive; - sourceTree = SOURCE_ROOT; - }; - DE66ECAF08ABEB8000323D32 /* Writer */ = { - isa = PBXGroup; - children = ( - DE66ECB708ABEB8000323D32 /* SlotCalculator.cpp */, - DE66ECB808ABEB8000323D32 /* SlotCalculator.h */, - DE66ECBA08ABEB8000323D32 /* Writer.cpp */, - DE66ECBB08ABEB8000323D32 /* WriterInternals.h */, - ); - name = Writer; - path = ../lib/Bytecode/Writer; - sourceTree = SOURCE_ROOT; - }; - DE66ECBC08ABEB8E00323D32 /* lib/Bytecode */ = { - isa = PBXGroup; - children = ( - DE66ECA108ABEB8000323D32 /* Archive */, - DE66EC9308ABEB3900323D32 /* Reader */, - DE66ECAF08ABEB8000323D32 /* Writer */, - ); - name = lib/Bytecode; - sourceTree = ""; - }; DE66ECBD08ABEC0700323D32 /* lib/Analysis */ = { isa = PBXGroup; children = ( + 9F68EB010C77AD02004AA152 /* LoopPass.cpp */, + 9F68EB020C77AD02004AA152 /* MemoryDependenceAnalysis.cpp */, DE66ED1A08ABEC0800323D32 /* IPA */, DE66ECBE08ABEC0700323D32 /* AliasAnalysis.cpp */, DE66ECBF08ABEC0700323D32 /* AliasAnalysisCounter.cpp */, @@ -1208,7 +1332,6 @@ DE66ECC208ABEC0700323D32 /* BasicAliasAnalysis.cpp */, DE66ECC308ABEC0700323D32 /* CFGPrinter.cpp */, CF73C0B0098A523C00627152 /* ConstantFolding.cpp */, - CFE421040A66F7AB00AB4BF6 /* ConstantRange.cpp */, DE66ED1708ABEC0800323D32 /* InstCount.cpp */, DE66ED1808ABEC0800323D32 /* Interval.cpp */, DE66ED1908ABEC0800323D32 /* IntervalPartition.cpp */, @@ -1242,29 +1365,38 @@ DE66ED3E08ABEC2A00323D32 /* lib/CodeGen */ = { isa = PBXGroup; children = ( + 9FE450AB0C77AB6100C4FEA4 /* README.txt */, DE66ED8308ABEC2B00323D32 /* SelectionDAG */, DE66ED3F08ABEC2A00323D32 /* AsmPrinter.cpp */, DE66ED4008ABEC2A00323D32 /* BranchFolding.cpp */, CFC244570959DEF2009F8C47 /* DwarfWriter.cpp */, + 9F7793500C73BD1500551F9C /* ELFWriter.h */, DE66ED6F08ABEC2B00323D32 /* ELFWriter.cpp */, + 9F7793510C73BD1500551F9C /* IfConversion.cpp */, DE66ED7008ABEC2B00323D32 /* IntrinsicLowering.cpp */, DE66ED7108ABEC2B00323D32 /* LiveInterval.cpp */, DE66ED7308ABEC2B00323D32 /* LiveIntervalAnalysis.cpp */, DE66ED7508ABEC2B00323D32 /* LiveVariables.cpp */, CF32AF5C0AEE6A4E00D24CD4 /* LLVMTargetMachine.cpp */, + 9F7793520C73BD1500551F9C /* LowerSubregs.cpp */, DE66ED7608ABEC2B00323D32 /* MachineBasicBlock.cpp */, CF6529A6095B21A8007F884E /* MachineModuleInfo.cpp */, DE66ED7808ABEC2B00323D32 /* MachineFunction.cpp */, DE66ED7908ABEC2B00323D32 /* MachineInstr.cpp */, CF4F27F60A7B6FA3004359F6 /* MachinePassRegistry.cpp */, + 9F7793530C73BD1500551F9C /* MachOWriter.h */, CF9720350A9F3ADC002CEEDD /* MachOWriter.cpp */, DE66ED7B08ABEC2B00323D32 /* Passes.cpp */, DE66ED7C08ABEC2B00323D32 /* PHIElimination.cpp */, + 9F7793540C73BD1500551F9C /* PostRASchedulerList.cpp */, DE66ED7D08ABEC2B00323D32 /* PhysRegTracker.h */, DE66ED7E08ABEC2B00323D32 /* PrologEpilogInserter.cpp */, + 9F7793550C73BD1500551F9C /* RegAllocBigBlock.cpp */, DE66ED8008ABEC2B00323D32 /* RegAllocLinearScan.cpp */, DE66ED8108ABEC2B00323D32 /* RegAllocLocal.cpp */, + 9F7793560C73BD1500551F9C /* RegisterScavenging.cpp */, DE66ED8208ABEC2B00323D32 /* RegAllocSimple.cpp */, + 9F7793570C73BD1500551F9C /* SimpleRegisterCoalescing.cpp */, DE66ED9508ABEC2B00323D32 /* TwoAddressInstructionPass.cpp */, DE66ED9608ABEC2B00323D32 /* UnreachableBlockElim.cpp */, DE66ED9808ABEC2B00323D32 /* VirtRegMap.cpp */, @@ -1277,6 +1409,7 @@ DE66ED8308ABEC2B00323D32 /* SelectionDAG */ = { isa = PBXGroup; children = ( + 9FE450AC0C77AB6E00C4FEA4 /* CallingConvLower.cpp */, CF6B5AFD095C82C300D1EA42 /* DAGCombiner.cpp */, DE66ED9008ABEC2B00323D32 /* LegalizeDAG.cpp */, CF7FFA1F0985081C008B0087 /* ScheduleDAGList.cpp */, @@ -1357,12 +1490,14 @@ DE66EDFB08ABEDE600323D32 /* lib/Support */ = { isa = PBXGroup; children = ( - DE66EDFD08ABEDE600323D32 /* bzip2 */, + 9FE450A60C77AB3200C4FEA4 /* APInt.cpp */, + 9FE450A70C77AB3200C4FEA4 /* ConstantRange.cpp */, + 9FE450A80C77AB3200C4FEA4 /* MemoryBuffer.cpp */, + 9FE450A90C77AB3200C4FEA4 /* SmallPtrSet.cpp */, + 9FE450AA0C77AB3200C4FEA4 /* StringMap.cpp */, CFD99AB70AFE848A0068D19C /* Allocator.cpp */, DE66EDFC08ABEDE600323D32 /* Annotation.cpp */, DE66EE1D08ABEDE600323D32 /* CommandLine.cpp */, - DE66EE1E08ABEDE600323D32 /* Compressor.cpp */, - CF8F1B4E0B64F86A00BB4199 /* CStringMap.cpp */, DE66EE3D08ABEDE600323D32 /* Debug.cpp */, CF79495D09B326D4005ADFCA /* Dwarf.cpp */, DE66EE3E08ABEDE600323D32 /* FileUtilities.cpp */, @@ -1383,30 +1518,10 @@ path = ../lib/Support; sourceTree = SOURCE_ROOT; }; - DE66EDFD08ABEDE600323D32 /* bzip2 */ = { - isa = PBXGroup; - children = ( - DE66EDFE08ABEDE600323D32 /* blocksort.c */, - DE66EDFF08ABEDE600323D32 /* bzlib.c */, - DE66EE0008ABEDE600323D32 /* bzlib.h */, - DE66EE0108ABEDE600323D32 /* bzlib_private.h */, - DE66EE0208ABEDE600323D32 /* CHANGES */, - DE66EE0308ABEDE600323D32 /* compress.c */, - DE66EE0408ABEDE600323D32 /* crctable.c */, - DE66EE1508ABEDE600323D32 /* decompress.c */, - DE66EE1608ABEDE600323D32 /* huffman.c */, - DE66EE1708ABEDE600323D32 /* LICENSE */, - DE66EE1908ABEDE600323D32 /* randtable.c */, - DE66EE1A08ABEDE600323D32 /* README */, - DE66EE1B08ABEDE600323D32 /* README.COMPILATION.PROBLEMS */, - DE66EE1C08ABEDE600323D32 /* Y2K_INFO */, - ); - path = bzip2; - sourceTree = ""; - }; DE66EE4908ABEE3400323D32 /* lib/System */ = { isa = PBXGroup; children = ( + 9FE450A50C77AAF000C4FEA4 /* Disassembler.cpp */, DE66EE7E08ABEE3500323D32 /* Unix */, DE66EE8B08ABEE3500323D32 /* Win32 */, CFE421090A66F93300AB4BF6 /* Alarm.cpp */, @@ -1478,11 +1593,12 @@ DE66EE9608ABEE5D00323D32 /* lib/Target */ = { isa = PBXGroup; children = ( - 84115FFE0B66D87400E1293E /* TargetMachOWriterInfo.cpp */, + 9F7794290C73CB7900551F9C /* MSIL */, DE66EE9708ABEE5D00323D32 /* Alpha */, CF8F1BCF0B64FC8A00BB4199 /* ARM */, DE66EEC908ABEE5E00323D32 /* CBackend */, DE66EEE508ABEE5E00323D32 /* IA64 */, + 9F7794120C73CB6100551F9C /* Mips */, DE66EF1108ABEE5E00323D32 /* PowerPC */, DE66EF7008ABEE5F00323D32 /* Sparc */, DE66F09308ABEE6000323D32 /* X86 */, @@ -1495,6 +1611,7 @@ DE66F08D08ABEE6000323D32 /* TargetInstrInfo.cpp */, DE66F08F08ABEE6000323D32 /* TargetMachine.cpp */, DE66F09008ABEE6000323D32 /* TargetMachineRegistry.cpp */, + 84115FFE0B66D87400E1293E /* TargetMachOWriterInfo.cpp */, CF490D14090541D30072DB1C /* TargetSchedule.td */, CF490D15090541D30072DB1C /* TargetSelectionDAG.td */, DE66F09208ABEE6000323D32 /* TargetSubtarget.cpp */, @@ -1592,6 +1709,8 @@ DE66EF1108ABEE5E00323D32 /* PowerPC */ = { isa = PBXGroup; children = ( + 9FE4509A0C77A79C00C4FEA4 /* PPCCallingConv.td */, + 9FE4509B0C77A79C00C4FEA4 /* PPCGenCallingConv.inc */, 841160000B66D8AC00E1293E /* PPCMachOWriterInfo.h */, 84115FFF0B66D89B00E1293E /* PPCMachOWriterInfo.cpp */, CFA702CB0A6FA8AD0006009A /* PPCGenAsmWriter.inc */, @@ -1603,7 +1722,6 @@ CFA702D10A6FA8AD0006009A /* PPCGenRegisterInfo.inc */, CFA702D20A6FA8AD0006009A /* PPCGenRegisterNames.inc */, CFA702D30A6FA8AD0006009A /* PPCGenSubtarget.inc */, - CFE421130A66FA2D00AB4BF6 /* LICENSE.TXT */, CFE421140A66FA2D00AB4BF6 /* PPC.h */, CFE421150A66FA2D00AB4BF6 /* PPC.td */, CFE421160A66FA2D00AB4BF6 /* PPCAsmPrinter.cpp */, @@ -1625,7 +1743,6 @@ CFE421260A66FA2D00AB4BF6 /* PPCJITInfo.cpp */, CFE421270A66FA2D00AB4BF6 /* PPCJITInfo.h */, CFABD0A20B09E342003EB061 /* PPCMachineFunctionInfo.h */, - CF9720890A9F3C04002CEEDD /* PPCMachOWriter.cpp */, CFE421280A66FA2D00AB4BF6 /* PPCPerfectShuffle.h */, CF8F1B570B64F9AC00BB4199 /* PPCPredicates.cpp */, CF8F1B580B64F9AC00BB4199 /* PPCPredicates.h */, @@ -1689,6 +1806,13 @@ DE66F09308ABEE6000323D32 /* X86 */ = { isa = PBXGroup; children = ( + 9FE4509C0C77A7BC00C4FEA4 /* README-MMX.txt */, + 9FE4509D0C77A7BC00C4FEA4 /* X86CallingConv.td */, + 9FE4509E0C77A7BC00C4FEA4 /* X86CodeEmitter.h */, + 9FE4509F0C77A7BC00C4FEA4 /* X86ELFWriterInfo.cpp */, + 9FE450A00C77A7BC00C4FEA4 /* X86ELFWriterInfo.h */, + 9FE450A10C77A7BC00C4FEA4 /* X86GenCallingConv.inc */, + 9FE450A20C77A7BC00C4FEA4 /* X86InstrFormats.td */, CFA702D40A6FA8DD0006009A /* X86GenAsmWriter.inc */, CFA702D50A6FA8DD0006009A /* X86GenAsmWriter1.inc */, CFA702D60A6FA8DD0006009A /* X86GenDAGISel.inc */, @@ -1713,7 +1837,6 @@ DE66F0C108ABEE6000323D32 /* X86ATTAsmPrinter.h */, DE66F0C208ABEE6000323D32 /* X86CodeEmitter.cpp */, CF8F1B590B64F9E100BB4199 /* X86COFF.h */, - DE66F0C308ABEE6000323D32 /* X86ELFWriter.cpp */, DE66F0C408ABEE6000323D32 /* X86FloatingPoint.cpp */, DE66F0CC08ABEE6000323D32 /* X86InstrBuilder.h */, DE66F0CD08ABEE6000323D32 /* X86InstrInfo.cpp */, @@ -1750,10 +1873,6 @@ DE66F11F08ABEFB300323D32 /* IPO */, DE66F15C08ABEFB400323D32 /* Scalar */, DE66F1BD08ABEFB400323D32 /* Utils */, - DE66F0EA08ABEFB300323D32 /* ExprTypeConvert.cpp */, - DE66F15A08ABEFB400323D32 /* LevelRaise.cpp */, - DE66F1BB08ABEFB400323D32 /* TransformInternals.cpp */, - DE66F1BC08ABEFB400323D32 /* TransformInternals.h */, ); name = lib/Transforms; path = ../lib/Transforms; @@ -1764,12 +1883,10 @@ children = ( DE66F0EF08ABEFB300323D32 /* BlockProfiling.cpp */, DE66F0FE08ABEFB300323D32 /* EdgeProfiling.cpp */, - DE66F0FF08ABEFB300323D32 /* EmitFunctions.cpp */, DE66F11B08ABEFB300323D32 /* ProfilingUtils.cpp */, DE66F11C08ABEFB300323D32 /* ProfilingUtils.h */, CF73C0B7098A546000627152 /* RSProfiling.cpp */, CF73C0B8098A546000627152 /* RSProfiling.h */, - DE66F11D08ABEFB300323D32 /* TraceBasicBlocks.cpp */, ); path = Instrumentation; sourceTree = ""; @@ -1777,17 +1894,16 @@ DE66F11F08ABEFB300323D32 /* IPO */ = { isa = PBXGroup; children = ( + 9F7793770C73C48A00551F9C /* StripDeadPrototypes.cpp */, DE66F12008ABEFB300323D32 /* ArgumentPromotion.cpp */, DE66F12108ABEFB300323D32 /* ConstantMerge.cpp */, DE66F12208ABEFB300323D32 /* DeadArgumentElimination.cpp */, DE66F12308ABEFB300323D32 /* DeadTypeElimination.cpp */, DE66F14A08ABEFB400323D32 /* ExtractFunction.cpp */, - DE66F14B08ABEFB400323D32 /* FunctionResolution.cpp */, DE66F14C08ABEFB400323D32 /* GlobalDCE.cpp */, DE66F14D08ABEFB400323D32 /* GlobalOpt.cpp */, CFE4213F0A66FB5E00AB4BF6 /* IndMemRemoval.cpp */, DE66F14E08ABEFB400323D32 /* Inliner.cpp */, - DE66F14F08ABEFB400323D32 /* Inliner.h */, DE66F15008ABEFB400323D32 /* InlineSimple.cpp */, DE66F15108ABEFB400323D32 /* Internalize.cpp */, DE66F15208ABEFB400323D32 /* IPConstantPropagation.cpp */, @@ -1806,15 +1922,20 @@ children = ( DE66F15E08ABEFB400323D32 /* ADCE.cpp */, DE66F15F08ABEFB400323D32 /* BasicBlockPlacement.cpp */, + 9F7793460C73BC2000551F9C /* CodeGenPrepare.cpp */, DE66F16008ABEFB400323D32 /* CondPropagate.cpp */, DE66F16108ABEFB400323D32 /* ConstantProp.cpp */, DE66F16208ABEFB400323D32 /* CorrelatedExprs.cpp */, DE66F16308ABEFB400323D32 /* DCE.cpp */, DE66F16408ABEFB400323D32 /* DeadStoreElimination.cpp */, DE66F1A308ABEFB400323D32 /* GCSE.cpp */, + 9F7793470C73BC2000551F9C /* GVN.cpp */, + 9F7793480C73BC2000551F9C /* GVNPRE.cpp */, DE66F1A408ABEFB400323D32 /* IndVarSimplify.cpp */, DE66F1A508ABEFB400323D32 /* InstructionCombining.cpp */, DE66F1A608ABEFB400323D32 /* LICM.cpp */, + 9F77934A0C73BC2000551F9C /* LoopRotation.cpp */, + 9F7793490C73BC2000551F9C /* LoopIndexSplit.cpp */, DE66F1A808ABEFB400323D32 /* LoopStrengthReduce.cpp */, DE66F1A908ABEFB400323D32 /* LoopUnroll.cpp */, DE66F1AA08ABEFB400323D32 /* LoopUnswitch.cpp */, @@ -1822,6 +1943,7 @@ DE66F1AF08ABEFB400323D32 /* LowerPacked.cpp */, CF8F1B5B0B64FA2F00BB4199 /* PredicateSimplifier.cpp */, DE66F1B508ABEFB400323D32 /* Reassociate.cpp */, + 9F77934B0C73BC2000551F9C /* RedundantLoadElimination.cpp */, CF73C0B9098A546000627152 /* Reg2Mem.cpp */, DE66F1B608ABEFB400323D32 /* ScalarReplAggregates.cpp */, DE66F1B708ABEFB400323D32 /* SCCP.cpp */, @@ -1836,12 +1958,15 @@ isa = PBXGroup; children = ( DE66F1BE08ABEFB400323D32 /* BasicBlockUtils.cpp */, + 9F7793780C73C49A00551F9C /* BasicInliner.cpp */, DE66F1BF08ABEFB400323D32 /* BreakCriticalEdges.cpp */, DE66F1C008ABEFB400323D32 /* CloneFunction.cpp */, + 9F7793790C73C49A00551F9C /* CloneLoop.cpp */, DE66F1C108ABEFB400323D32 /* CloneModule.cpp */, DE66F1C208ABEFB400323D32 /* CloneTrace.cpp */, DE66F1C308ABEFB400323D32 /* CodeExtractor.cpp */, DE66F1E008ABEFB400323D32 /* DemoteRegToStack.cpp */, + 9F77937A0C73C49A00551F9C /* InlineCost.cpp */, DE66F1E108ABEFB400323D32 /* InlineFunction.cpp */, CF97208A0A9F3C6F002CEEDD /* LCSSA.cpp */, DE66F1E208ABEFB400323D32 /* Local.cpp */, @@ -1866,7 +1991,7 @@ DE66F1EB08ABF03100323D32 /* ADT */, DE66F20308ABF03100323D32 /* Analysis */, DE66F22408ABF03100323D32 /* Assembly */, - DE66F22B08ABF03100323D32 /* Bytecode */, + 9F77937F0C73C54C00551F9C /* Bitcode */, DE66F23508ABF03100323D32 /* CodeGen */, DE66F24C08ABF03100323D32 /* Config */, DE66F25308ABF03100323D32 /* Debugger */, @@ -1877,6 +2002,7 @@ DE66F2AB08ABF03200323D32 /* Transforms */, DE66F1EA08ABF03100323D32 /* AbstractTypeUser.h */, DE66F22308ABF03100323D32 /* Argument.h */, + 9FA638D90C77B184007F12AE /* AutoUpgrade.h */, DE66F22A08ABF03100323D32 /* BasicBlock.h */, DE66F23308ABF03100323D32 /* CallGraphSCCPass.h */, DE66F23408ABF03100323D32 /* CallingConv.h */, @@ -1884,6 +2010,7 @@ DE66F25208ABF03100323D32 /* Constants.h */, DE66F25A08ABF03100323D32 /* DerivedTypes.h */, DE66F25E08ABF03100323D32 /* Function.h */, + 9FA638DA0C77B184007F12AE /* GlobalAlias.h */, DE66F25F08ABF03100323D32 /* GlobalValue.h */, DE66F26008ABF03100323D32 /* GlobalVariable.h */, CF73C0A2098A4FDF00627152 /* InlineAsm.h */, @@ -1903,12 +2030,12 @@ DE66F26708ABF03100323D32 /* Linker.h */, DE66F26808ABF03100323D32 /* Module.h */, DE66F26908ABF03200323D32 /* ModuleProvider.h */, + 9F77937E0C73C53000551F9C /* ParameterAttributes.h */, DE66F26A08ABF03200323D32 /* Pass.h */, DE66F26B08ABF03200323D32 /* PassAnalysisSupport.h */, DE66F26C08ABF03200323D32 /* PassManager.h */, CF8F1B420B64F70B00BB4199 /* PassManagers.h */, DE66F26D08ABF03200323D32 /* PassSupport.h */, - DE66F29208ABF03200323D32 /* SymbolTable.h */, DE66F29308ABF03200323D32 /* SymbolTableListTraits.h */, DE66F2B708ABF03200323D32 /* Type.h */, CF73C0A3098A4FDF00627152 /* TypeSymbolTable.h */, @@ -1924,25 +2051,30 @@ DE66F1EB08ABF03100323D32 /* ADT */ = { isa = PBXGroup; children = ( - CF42B6BF0AF24F5300D5D47C /* FoldingSet.h */, - DE66F1ED08ABF03100323D32 /* BitSetVector.h */, - CF33BE150AF62B4200E93805 /* CStringMap.h */, + 9FA638DD0C77B1AB007F12AE /* BitVector.h */, DE66F1EE08ABF03100323D32 /* DenseMap.h */, DE66F1EF08ABF03100323D32 /* DepthFirstIterator.h */, DE66F1F008ABF03100323D32 /* EquivalenceClasses.h */, CF42B6BF0AF24F5300D5D47C /* FoldingSet.h */, + CF42B6BF0AF24F5300D5D47C /* FoldingSet.h */, DE66F1F108ABF03100323D32 /* GraphTraits.h */, DE66F1F308ABF03100323D32 /* hash_map.in */, DE66F1F508ABF03100323D32 /* hash_set.in */, DE66F1F608ABF03100323D32 /* HashExtras.h */, DE66F1F708ABF03100323D32 /* ilist */, + 9FA638E00C77B1AB007F12AE /* IndexedMap.h */, + 9FA638DB0C77B1AB007F12AE /* APInt.h */, + 9FA638DC0C77B1AB007F12AE /* APSInt.h */, DE66F1F908ABF03100323D32 /* iterator.in */, DE66F1FA08ABF03100323D32 /* PostOrderIterator.h */, DE66F1FB08ABF03100323D32 /* SCCIterator.h */, DE66F1FC08ABF03100323D32 /* SetOperations.h */, DE66F1FD08ABF03100323D32 /* SetVector.h */, + 9FA638E20C77B1AB007F12AE /* SmallPtrSet.h */, + 9FA638E30C77B1AB007F12AE /* SmallSet.h */, CF33BE160AF62B4200E93805 /* SmallString.h */, CF71B60F0AC45EDA0007F57C /* SmallVector.h */, + 9FA638E40C77B1AB007F12AE /* StringMap.h */, DE66F1FE08ABF03100323D32 /* Statistic.h */, DE66F1FF08ABF03100323D32 /* STLExtras.h */, DE66F20008ABF03100323D32 /* StringExtras.h */, @@ -1956,6 +2088,8 @@ DE66F20308ABF03100323D32 /* Analysis */ = { isa = PBXGroup; children = ( + 9FA638E50C77B203007F12AE /* LoopPass.h */, + 9FA638E60C77B203007F12AE /* MemoryDependenceAnalysis.h */, DE66F20408ABF03100323D32 /* AliasAnalysis.h */, DE66F20508ABF03100323D32 /* AliasSetTracker.h */, DE66F20608ABF03100323D32 /* CallGraph.h */, @@ -1963,7 +2097,6 @@ CF73C0A5098A507300627152 /* ConstantFolding.h */, DE66F20808ABF03100323D32 /* ConstantsScanner.h */, DE66F20F08ABF03100323D32 /* Dominators.h */, - CF73C0A6098A507300627152 /* ET-Forest.h */, DE66F21208ABF03100323D32 /* FindUsedTypes.h */, DE66F21308ABF03100323D32 /* Interval.h */, DE66F21408ABF03100323D32 /* IntervalIterator.h */, @@ -1996,27 +2129,14 @@ path = Assembly; sourceTree = ""; }; - DE66F22B08ABF03100323D32 /* Bytecode */ = { - isa = PBXGroup; - children = ( - DE66F22C08ABF03100323D32 /* Analyzer.h */, - DE66F22D08ABF03100323D32 /* Archive.h */, - DE66F22E08ABF03100323D32 /* BytecodeHandler.h */, - DE66F22F08ABF03100323D32 /* Format.h */, - DE66F23008ABF03100323D32 /* Reader.h */, - DE66F23108ABF03100323D32 /* WriteBytecodePass.h */, - DE66F23208ABF03100323D32 /* Writer.h */, - ); - path = Bytecode; - sourceTree = ""; - }; DE66F23508ABF03100323D32 /* CodeGen */ = { isa = PBXGroup; children = ( DE66F23608ABF03100323D32 /* AsmPrinter.h */, + 9F7793860C73C57100551F9C /* CallingConvLower.h */, DEFAB19D0959E9A100E0AB42 /* DwarfWriter.h */, - DE66F23708ABF03100323D32 /* ELFWriter.h */, - DE66F23808ABF03100323D32 /* InstrScheduling.h */, + 9F7793870C73C57100551F9C /* ELFRelocation.h */, + 9F7793880C73C57100551F9C /* FileWriters.h */, DE66F23908ABF03100323D32 /* IntrinsicLowering.h */, CFD7E4F30A798FC3000C7379 /* LinkAllCodegenComponents.h */, DE4DA03C091147920012D44B /* LiveInterval.h */, @@ -2035,9 +2155,10 @@ CF6527D909D1A53400C4B521 /* MachineLocation.h */, CF4F27E60A7B6E23004359F6 /* MachinePassRegistry.h */, DE66F24308ABF03100323D32 /* MachineRelocation.h */, - CF9720240A9F3969002CEEDD /* MachOWriter.h */, + 9F7793890C73C57100551F9C /* MachORelocation.h */, DE66F24408ABF03100323D32 /* Passes.h */, CFE21C780A80CC0600D3E908 /* RegAllocRegistry.h */, + 9F77938A0C73C57100551F9C /* RegisterScavenging.h */, CF8F1B410B64F6D100BB4199 /* RuntimeLibcalls.h */, DE66F24508ABF03100323D32 /* SchedGraphCommon.h */, CF7FFA2109850864008B0087 /* ScheduleDAG.h */, @@ -2045,6 +2166,7 @@ DE66F24608ABF03100323D32 /* SelectionDAG.h */, DE66F24708ABF03100323D32 /* SelectionDAGISel.h */, DE66F24808ABF03100323D32 /* SelectionDAGNodes.h */, + 9F77938B0C73C57100551F9C /* SimpleRegisterCoalescing.h */, DE66F24908ABF03100323D32 /* SSARegMap.h */, DE66F24B08ABF03100323D32 /* ValueTypes.h */, CFE420FC0A66F67300AB4BF6 /* ValueTypes.td */, @@ -2097,7 +2219,6 @@ DE66F27408ABF03200323D32 /* CFG.h */, DE66F27508ABF03200323D32 /* CommandLine.h */, CF8F1B440B64F74400BB4199 /* Compiler.h */, - DE66F27608ABF03200323D32 /* Compressor.h */, DE66F27708ABF03200323D32 /* ConstantRange.h */, CF73C0AD098A519400627152 /* DataTypes.h */, DE66F27908ABF03200323D32 /* DataTypes.h.in */, @@ -2112,9 +2233,11 @@ DE66F28108ABF03200323D32 /* InstIterator.h */, DE66F28208ABF03200323D32 /* InstVisitor.h */, DE66F28308ABF03200323D32 /* LeakDetector.h */, + 9F7794870C73D51000551F9C /* LLVMBuilder.h */, CF8F1B460B64F74400BB4199 /* ManagedStatic.h */, DE66F28408ABF03200323D32 /* Mangler.h */, DE66F28508ABF03200323D32 /* MathExtras.h */, + 9F7794880C73D51000551F9C /* MemoryBuffer.h */, DE66F28608ABF03200323D32 /* MutexGuard.h */, CF8F1B470B64F74400BB4199 /* OutputBuffer.h */, DE66F28708ABF03200323D32 /* PassNameParser.h */, @@ -2122,6 +2245,7 @@ DE66F28908ABF03200323D32 /* PluginLoader.h */, DE66F28A08ABF03200323D32 /* SlowOperationInformer.h */, DE66F28B08ABF03200323D32 /* StableBasicBlockNumbering.h */, + 9F7794890C73D51000551F9C /* Streams.h */, DE66F28C08ABF03200323D32 /* SystemUtils.h */, DE66F28E08ABF03200323D32 /* Timer.h */, DE66F29008ABF03200323D32 /* type_traits.h */, @@ -2134,6 +2258,7 @@ isa = PBXGroup; children = ( CF73C0AE098A51AD00627152 /* Alarm.h */, + 9FA638E70C77B222007F12AE /* Disassembler.h */, DE66F29508ABF03200323D32 /* DynamicLibrary.h */, CF9720340A9F3A41002CEEDD /* IncludeFile.h */, DE66F29608ABF03200323D32 /* LICENSE.TXT */, @@ -2152,11 +2277,11 @@ DE66F29F08ABF03200323D32 /* Target */ = { isa = PBXGroup; children = ( - 8443EF210B66B62D00959964 /* TargetMachOWriterInfo.h */, DE66F2A008ABF03200323D32 /* MRegisterInfo.h */, CF9BCD0808C74DE0001E7011 /* SubtargetFeature.h */, CF47BD380AAF40BC00A8B13E /* TargetAsmInfo.h */, DE66F2A108ABF03200323D32 /* TargetData.h */, + 9FA638E80C77B231007F12AE /* TargetELFWriterInfo.h */, DE66F2A208ABF03200323D32 /* TargetFrameInfo.h */, DE66F2A308ABF03200323D32 /* TargetInstrInfo.h */, CF26835B09178F5500C5F253 /* TargetInstrItineraries.h */, @@ -2164,6 +2289,7 @@ DE66F2A508ABF03200323D32 /* TargetLowering.h */, DE66F2A608ABF03200323D32 /* TargetMachine.h */, DE66F2A708ABF03200323D32 /* TargetMachineRegistry.h */, + 8443EF210B66B62D00959964 /* TargetMachOWriterInfo.h */, DE66F2A808ABF03200323D32 /* TargetOptions.h */, DE66F2AA08ABF03200323D32 /* TargetSubtarget.h */, ); @@ -2174,6 +2300,7 @@ isa = PBXGroup; children = ( DE66F2AC08ABF03200323D32 /* Instrumentation.h */, + 9FA638E90C77B252007F12AE /* IPO */, DE66F2AD08ABF03200323D32 /* IPO.h */, CF73C0AF098A51DD00627152 /* RSProfiling.h */, DE66F2AF08ABF03200323D32 /* Scalar.h */, @@ -2186,8 +2313,10 @@ isa = PBXGroup; children = ( DE66F2B108ABF03200323D32 /* BasicBlockUtils.h */, + 9FA638EB0C77B26B007F12AE /* BasicInliner.h */, DE66F2B208ABF03200323D32 /* Cloning.h */, DE66F2B308ABF03200323D32 /* FunctionUtils.h */, + 9FA638EC0C77B26B007F12AE /* InlineCost.h */, DE66F2B408ABF03200323D32 /* Local.h */, DE66F2B508ABF03200323D32 /* PromoteMemToReg.h */, DE66F2B608ABF03200323D32 /* UnifyFunctionExitNodes.h */, @@ -2206,7 +2335,6 @@ DE66F36808ABF14500323D32 /* llvmc */, CF8F1B5E0B64FADA00BB4199 /* llvm-upgrade */, CF8F1B7E0B64FADA00BB4199 /* llvm2cpp */, - DE66F2EE08ABF14400323D32 /* gccas.cpp */, CFD99ADA0AFE87650068D19C /* lto.cpp */, DE66F30008ABF14400323D32 /* llc.cpp */, DE66F30708ABF14400323D32 /* lli.cpp */, @@ -2249,9 +2377,6 @@ DE66F2F008ABF14400323D32 /* gccld */ = { isa = PBXGroup; children = ( - DE66F2F708ABF14400323D32 /* gccld.cpp */, - DE66F2F808ABF14400323D32 /* gccld.h */, - DE66F2F908ABF14400323D32 /* GenerateCode.cpp */, ); path = gccld; sourceTree = ""; @@ -2300,7 +2425,6 @@ children = ( DE66F38F08ABF35C00323D32 /* AliasAnalysis.html */, DE66F39008ABF35C00323D32 /* Bugpoint.html */, - DE66F39108ABF35C00323D32 /* BytecodeFormat.html */, DE66F39208ABF35C00323D32 /* CFEBuildInstrs.html */, DE66F39308ABF35C00323D32 /* CodeGenerator.html */, DE66F39408ABF35C00323D32 /* CodingStandards.html */, @@ -2345,8 +2469,6 @@ isa = PBXGroup; children = ( DE66F39808ABF35C00323D32 /* bugpoint.pod */, - DE66F39908ABF35C00323D32 /* gccas.pod */, - DE66F39A08ABF35C00323D32 /* gccld.pod */, DE66F39E08ABF35C00323D32 /* index.html */, DE66F39F08ABF35C00323D32 /* llc.pod */, DE66F3A008ABF35C00323D32 /* lli.pod */, @@ -2387,7 +2509,6 @@ DE66F3FD08ABF37000323D32 /* examples */ = { isa = PBXGroup; children = ( - DE66F3FF08ABF37000323D32 /* BFtoLLVM.cpp */, DE66F40E08ABF37000323D32 /* fibonacci.cpp */, DE66F41508ABF37000323D32 /* HowToUseJIT.cpp */, DE66F41E08ABF37000323D32 /* ModuleMaker.cpp */, From sabre at nondot.org Sun Aug 19 21:06:44 2007 From: sabre at nondot.org (Chris Lattner) Date: Mon, 20 Aug 2007 02:06:44 -0000 Subject: [llvm-commits] [llvm-gcc-4.0] r41176 - /llvm-gcc-4.0/trunk/gcc/config/i386/i386.c Message-ID: <200708200206.l7K26ie4011779@zion.cs.uiuc.edu> Author: lattner Date: Sun Aug 19 21:06:44 2007 New Revision: 41176 URL: http://llvm.org/viewvc/llvm-project?rev=41176&view=rev Log: Fix PR1222 by making the X86 backend use a valid MMX mode for MMX operands. Modified: llvm-gcc-4.0/trunk/gcc/config/i386/i386.c Modified: llvm-gcc-4.0/trunk/gcc/config/i386/i386.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.0/trunk/gcc/config/i386/i386.c?rev=41176&r1=41175&r2=41176&view=diff ============================================================================== --- llvm-gcc-4.0/trunk/gcc/config/i386/i386.c (original) +++ llvm-gcc-4.0/trunk/gcc/config/i386/i386.c Sun Aug 19 21:06:44 2007 @@ -19632,7 +19632,8 @@ else if (IDENTIFIER_POINTER (arg)[1] == 'x') mode = SFmode; else if (IDENTIFIER_POINTER (arg)[1] == 'm') - mode = SFmode; + /* APPLE LOCAL llvm - Force MMX to use a vector mode: PR1222. */ + mode = V2SImode; if (mode != VOIDmode) /* APPLE LOCAL llvm */ From sabre at nondot.org Sun Aug 19 21:08:24 2007 From: sabre at nondot.org (Chris Lattner) Date: Mon, 20 Aug 2007 02:08:24 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r41177 - /llvm-gcc-4.2/trunk/gcc/config/i386/i386.c Message-ID: <200708200208.l7K28PCk011837@zion.cs.uiuc.edu> Author: lattner Date: Sun Aug 19 21:08:24 2007 New Revision: 41177 URL: http://llvm.org/viewvc/llvm-project?rev=41177&view=rev Log: Fix PR1222 by making the X86 backend use a valid MMX mode for MMX operands. Modified: llvm-gcc-4.2/trunk/gcc/config/i386/i386.c Modified: llvm-gcc-4.2/trunk/gcc/config/i386/i386.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/i386/i386.c?rev=41177&r1=41176&r2=41177&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/config/i386/i386.c (original) +++ llvm-gcc-4.2/trunk/gcc/config/i386/i386.c Sun Aug 19 21:08:24 2007 @@ -20455,7 +20455,8 @@ else if (IDENTIFIER_POINTER (arg)[1] == 'x') mode = SFmode; else if (IDENTIFIER_POINTER (arg)[1] == 'm') - mode = SFmode; + /* APPLE LOCAL llvm - Force MMX to use a vector mode: PR1222. */ + mode = V2SImode; if (mode != VOIDmode) type = lang_hooks.types.type_for_mode (mode, 1); From sabre at nondot.org Sun Aug 19 21:14:33 2007 From: sabre at nondot.org (Chris Lattner) Date: Mon, 20 Aug 2007 02:14:33 -0000 Subject: [llvm-commits] [llvm] r41178 - /llvm/trunk/lib/Target/X86/README.txt Message-ID: <200708200214.l7K2EXfj012065@zion.cs.uiuc.edu> Author: lattner Date: Sun Aug 19 21:14:33 2007 New Revision: 41178 URL: http://llvm.org/viewvc/llvm-project?rev=41178&view=rev Log: add a note Modified: llvm/trunk/lib/Target/X86/README.txt Modified: llvm/trunk/lib/Target/X86/README.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/README.txt?rev=41178&r1=41177&r2=41178&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/README.txt (original) +++ llvm/trunk/lib/Target/X86/README.txt Sun Aug 19 21:14:33 2007 @@ -1116,3 +1116,21 @@ addps %xmm1, %xmm0 ret +//===---------------------------------------------------------------------===// + +Leaf functions that require one 4-byte spill slot have a prolog like this: + +_foo: + pushl %esi + subl $4, %esp +... +and an epilog like this: + addl $4, %esp + popl %esi + ret + +It would be smaller, and potentially faster, to push eax on entry and to +pop into a dummy register instead of using addl/subl of esp. Just don't pop +into any return registers :) + +//===---------------------------------------------------------------------===//